source: trunk/firmware/FSBL/CubeMX/blto2_FSBL.ioc@ 37

Last change on this file since 37 was 37, checked in by Zed, 2 weeks ago

This commit contains a working example of SDMMC interface initialization.
To be removed from FSBL and put into main App.
File size: 49.5 KB
RevLine 
[16]1#MicroXplorer Configuration settings - do not modify
[37]2Appli.IPs=CORTEX_M55_S,GPDMA1,HPDMA1,LINKEDLIST,RCC,GPIO,NVIC1\:I,SAU
[16]3CAD.formats=
4CAD.pinconfig=
5CAD.provider=
6CORTEX_M55_FSBL.CPU_DCache=Enabled
7CORTEX_M55_FSBL.CPU_ICache=Enabled
8CORTEX_M55_FSBL.IPParameters=CPU_ICache,CPU_DCache
9CORTEX_M55_S.AccessPermission-Cortex_Memory_Protection_Unit_Region0_Settings=MPU_REGION_ALL_RW
10CORTEX_M55_S.Attributes0=MPU_ATTRIBUTES_NUMBER0
11CORTEX_M55_S.BaseAddress-Cortex_Memory_Protection_Unit_Region0_Settings=__NON_CACHEABLE_SECTION_BEGIN
12CORTEX_M55_S.CPU_DCache=Enabled
13CORTEX_M55_S.CPU_ICache=Enabled
14CORTEX_M55_S.Enable-Cortex_Memory_Protection_Unit_Region0_Settings=MPU_REGION_ENABLE
15CORTEX_M55_S.IPParameters=CPU_ICache,CPU_DCache,MPU_Control,Enable-Cortex_Memory_Protection_Unit_Region0_Settings,Attributes0,BaseAddress-Cortex_Memory_Protection_Unit_Region0_Settings,LimitAddress-Cortex_Memory_Protection_Unit_Region0_Settings,AccessPermission-Cortex_Memory_Protection_Unit_Region0_Settings
16CORTEX_M55_S.LimitAddress-Cortex_Memory_Protection_Unit_Region0_Settings=__NON_CACHEABLE_SECTION_END
17CORTEX_M55_S.MPU_Control=MPU_HFNMI_PRIVDEF
[19]18EXTMEM_MANAGER.IPParameters=RefParam_MEMORY_1_ConfigType,RefParam_BOOT_enable,RefParam_XIP_ApplicationOffset
19EXTMEM_MANAGER.RefParam_BOOT_enable=true
[18]20EXTMEM_MANAGER.RefParam_MEMORY_1_ConfigType=EXTMEM_LINK_CONFIG_8LINES
[19]21EXTMEM_MANAGER.RefParam_XIP_ApplicationOffset=0x80000
[16]22ExtMemLoader.IPs=EXTMEM_LOADER,EXTMEM_MANAGER,RCC\:I,GPIO,TIM6
[37]23FSBL.IPs=CORTEX_M55_FSBL,GPDMA1\:I,HDP,HPDMA1\:I,LINKEDLIST,RCC,GPIO\:I,NVIC\:I,XSPIM,XSPI2,EXTMEM_MANAGER,BSEC,DEBUG,RAMCFG,SYS_S\:I,TIM18,SDMMC2,RIF
[28]24FSBL.Pins=PO1,PB12
[16]25File.Version=6
26GPIO.groupedBy=Group By Peripherals
27KeepUserPlacement=false
28Mcu.CPN=STM32N657X0H3Q
29Mcu.Context0=FSBL
30Mcu.Context1=Appli
31Mcu.Context2=ExtMemLoader
32Mcu.ContextNb=3
33Mcu.ContextProject=FullSecure
34Mcu.Family=STM32N6
[18]35Mcu.IP0=BSEC
36Mcu.IP1=CORTEX_M55_FSBL
[37]37Mcu.IP10=SDMMC2
38Mcu.IP11=SYS_S
39Mcu.IP12=XSPI2
40Mcu.IP13=XSPIM
[18]41Mcu.IP2=CORTEX_M55_S
[24]42Mcu.IP3=DEBUG
43Mcu.IP4=EXTMEM_MANAGER
44Mcu.IP5=NVIC1
45Mcu.IP6=NVIC
[27]46Mcu.IP7=RAMCFG
47Mcu.IP8=RCC
48Mcu.IP9=RIF
[37]49Mcu.IPNb=14
[16]50Mcu.Name=STM32N657X0HxQ
51Mcu.Package=VFBGA264
[37]52Mcu.Pin0=PC4
53Mcu.Pin1=PC5
54Mcu.Pin10=PN0
55Mcu.Pin11=PB12
56Mcu.Pin12=PN3
57Mcu.Pin13=PN5
58Mcu.Pin14=PN1
59Mcu.Pin15=PA14(JTCK/SWCLK)
60Mcu.Pin16=PN9
61Mcu.Pin17=PN2
62Mcu.Pin18=PA13(JTMS/SWDIO)
63Mcu.Pin19=PB5(JTDO/TRACESWO)
64Mcu.Pin2=PC0
65Mcu.Pin20=PN10
66Mcu.Pin21=PN11
67Mcu.Pin22=VP_BSEC_VS_BSEC
68Mcu.Pin23=VP_EXTMEM_MANAGER_SIG_Activate_EXTMEM
69Mcu.Pin24=VP_RAMCFG_VS_RAMCFG1
70Mcu.Pin25=VP_RAMCFG_VS_RAMCFG2
71Mcu.Pin26=VP_RAMCFG_VS_RAMCFG3
72Mcu.Pin27=VP_RAMCFG_VS_RAMCFG4
73Mcu.Pin28=VP_RAMCFG_VS_RAMCFG5
74Mcu.Pin29=VP_RAMCFG_VS_RAMCFG6
75Mcu.Pin3=PC2
76Mcu.Pin30=VP_RAMCFG_VS_AHBSRAM1
77Mcu.Pin31=VP_RAMCFG_VS_AHBSRAM2
78Mcu.Pin32=VP_RAMCFG_VS_BKPRAM
79Mcu.Pin33=VP_RAMCFG_VS_FLEXRAM
80Mcu.Pin34=VP_RAMCFG_VS_VENCRAM
81Mcu.Pin35=VP_RIF_VS_RIF1
82Mcu.Pin36=VP_SYS_S_VS_tim18
83Mcu.Pin37=VP_XSPI2_VS_octo
84Mcu.Pin38=VP_XSPIM_VS_IO
85Mcu.Pin4=PE4
86Mcu.Pin5=PC3
87Mcu.Pin6=PO1
88Mcu.Pin7=PN4
89Mcu.Pin8=PN6
90Mcu.Pin9=PN8
91Mcu.PinsNb=39
[16]92Mcu.ThirdPartyNb=0
93Mcu.UserConstants=
94Mcu.UserName=STM32N657X0HxQ
95MxCube.Version=6.18.1
96MxDb.Version=DB.6.0.181
97NVIC.BFHFNMINS=0
98NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
99NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
100NVIC.ForceEnableDMAVector=true
101NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
102NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
103NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
104NVIC.PRIS=0
105NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
106NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
[37]107NVIC.SDMMC2_IRQn=true\:5\:0\:true\:false\:true\:true\:true\:true
[16]108NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
109NVIC.SecureFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
110NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:true\:false\:true\:false
[36]111NVIC.TIM18_IRQn=true\:15\:0\:false\:false\:true\:false\:true\:true
112NVIC.TimeBase=TIM18_IRQn
113NVIC.TimeBaseIP=TIM18
[16]114NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
115NVIC1.BFHFNMINS=0
116NVIC1.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
117NVIC1.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
118NVIC1.ForceEnableDMAVector=true
119NVIC1.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
120NVIC1.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
121NVIC1.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
122NVIC1.PRIS=0
123NVIC1.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
124NVIC1.PriorityGroup=NVIC_PRIORITYGROUP_4
125NVIC1.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
126NVIC1.SecureFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
127NVIC1.SysTick_IRQn=true\:15\:0\:false\:false\:true\:false\:true\:false
128NVIC1.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
[24]129PA13(JTMS/SWDIO).GPIOParameters=PinAttribute
[16]130PA13(JTMS/SWDIO).Locked=true
[24]131PA13(JTMS/SWDIO).Mode=Serial_Wire
132PA13(JTMS/SWDIO).PinAttribute=FSBL
[16]133PA13(JTMS/SWDIO).Signal=DEBUG_JTMS-SWDIO
[24]134PA14(JTCK/SWCLK).GPIOParameters=PinAttribute
[16]135PA14(JTCK/SWCLK).Locked=true
[24]136PA14(JTCK/SWCLK).Mode=Serial_Wire
137PA14(JTCK/SWCLK).PinAttribute=FSBL
[16]138PA14(JTCK/SWCLK).Signal=DEBUG_JTCK-SWCLK
[25]139PB12.ContextOwner=FSBL
140PB12.GPIOParameters=PinState,GPIO_Label,PinAttribute
141PB12.GPIO_Label=EXT_SMPS
142PB12.Locked=true
143PB12.PinAttribute=FSBL
144PB12.PinState=GPIO_PIN_SET
145PB12.Signal=GPIO_Output
[24]146PB5(JTDO/TRACESWO).GPIOParameters=PinAttribute
147PB5(JTDO/TRACESWO).Locked=true
148PB5(JTDO/TRACESWO).PinAttribute=FSBL
149PB5(JTDO/TRACESWO).Signal=DEBUG_JTDO-SWO
[37]150PC0.GPIOParameters=GPIO_PuPd,GPIO_Speed_Medium_Default,PinAttribute
151PC0.GPIO_PuPd=GPIO_PULLUP
152PC0.GPIO_Speed_Medium_Default=GPIO_SPEED_FREQ_VERY_HIGH
153PC0.Mode=SD_4_bits_Wide_bus
154PC0.PinAttribute=FSBL
155PC0.Signal=SDMMC2_D2
156PC2.GPIOParameters=PinAttribute,GPIO_PuPd,GPIO_Speed_Medium_Default
157PC2.GPIO_PuPd=GPIO_PULLUP
158PC2.GPIO_Speed_Medium_Default=GPIO_SPEED_FREQ_VERY_HIGH
159PC2.Locked=true
160PC2.Mode=SD_4_bits_Wide_bus
161PC2.PinAttribute=FSBL
162PC2.Signal=SDMMC2_CK
163PC3.GPIOParameters=GPIO_PuPd,GPIO_Speed_Medium_Default,PinAttribute
164PC3.GPIO_PuPd=GPIO_PULLUP
165PC3.GPIO_Speed_Medium_Default=GPIO_SPEED_FREQ_VERY_HIGH
166PC3.Mode=SD_4_bits_Wide_bus
167PC3.PinAttribute=FSBL
168PC3.Signal=SDMMC2_CMD
169PC4.GPIOParameters=GPIO_PuPd,GPIO_Speed_Medium_Default,PinAttribute
170PC4.GPIO_PuPd=GPIO_PULLUP
171PC4.GPIO_Speed_Medium_Default=GPIO_SPEED_FREQ_VERY_HIGH
172PC4.Mode=SD_4_bits_Wide_bus
173PC4.PinAttribute=FSBL
174PC4.Signal=SDMMC2_D0
175PC5.GPIOParameters=GPIO_PuPd,GPIO_Speed_Medium_Default,PinAttribute
176PC5.GPIO_PuPd=GPIO_PULLUP
177PC5.GPIO_Speed_Medium_Default=GPIO_SPEED_FREQ_VERY_HIGH
178PC5.Mode=SD_4_bits_Wide_bus
179PC5.PinAttribute=FSBL
180PC5.Signal=SDMMC2_D1
[16]181PCC.Bar.Display=Horizontal Bar
182PCC.Checker=false
183PCC.Display=Plot\: All Steps
184PCC.Line=STM32N6x7
185PCC.MCU=STM32N657X0HxQ
186PCC.PartNumber=STM32N657X0HxQ
187PCC.SequenceTime=1.0 ms
188PCC.SequenceTime.Unit=ms
189PCC.Series=STM32N6
190PCC.Temperature=25
191PCC.Vdd=1.8
[37]192PE4.GPIOParameters=GPIO_PuPd,GPIO_Speed_Medium_Default,PinAttribute
193PE4.GPIO_PuPd=GPIO_PULLUP
194PE4.GPIO_Speed_Medium_Default=GPIO_SPEED_FREQ_VERY_HIGH
195PE4.Mode=SD_4_bits_Wide_bus
196PE4.PinAttribute=FSBL
197PE4.Signal=SDMMC2_D3
[16]198PN0.GPIOParameters=PinAttribute
199PN0.Mode=XSPI2_Port2Octo
200PN0.PinAttribute=FSBL
201PN0.Signal=XSPIM_P2_DQS0
202PN1.GPIOParameters=PinAttribute
203PN1.Mode=XSPI2_NCS1_Port2
204PN1.PinAttribute=FSBL
205PN1.Signal=XSPIM_P2_NCS1
206PN10.GPIOParameters=PinAttribute
207PN10.Mode=XSPI2_Port2Octo
208PN10.PinAttribute=FSBL
209PN10.Signal=XSPIM_P2_IO6
210PN11.GPIOParameters=PinAttribute
211PN11.Mode=XSPI2_Port2Octo
212PN11.PinAttribute=FSBL
213PN11.Signal=XSPIM_P2_IO7
214PN2.GPIOParameters=PinAttribute
215PN2.Mode=XSPI2_Port2Octo
216PN2.PinAttribute=FSBL
217PN2.Signal=XSPIM_P2_IO0
218PN3.GPIOParameters=PinAttribute
219PN3.Mode=XSPI2_Port2Octo
220PN3.PinAttribute=FSBL
221PN3.Signal=XSPIM_P2_IO1
222PN4.GPIOParameters=PinAttribute
223PN4.Mode=XSPI2_Port2Octo
224PN4.PinAttribute=FSBL
225PN4.Signal=XSPIM_P2_IO2
226PN5.GPIOParameters=PinAttribute
227PN5.Mode=XSPI2_Port2Octo
228PN5.PinAttribute=FSBL
229PN5.Signal=XSPIM_P2_IO3
230PN6.GPIOParameters=PinAttribute
231PN6.Mode=XSPI2_Port2Octo
232PN6.PinAttribute=FSBL
233PN6.Signal=XSPIM_P2_CLK
234PN8.GPIOParameters=PinAttribute
235PN8.Mode=XSPI2_Port2Octo
236PN8.PinAttribute=FSBL
237PN8.Signal=XSPIM_P2_IO4
238PN9.GPIOParameters=PinAttribute
239PN9.Mode=XSPI2_Port2Octo
240PN9.PinAttribute=FSBL
241PN9.Signal=XSPIM_P2_IO5
[28]242PO1.ContextOwner=FSBL
243PO1.GPIOParameters=GPIO_Label,PinAttribute
244PO1.GPIO_Label=LED_GREEN
245PO1.Locked=true
246PO1.PinAttribute=FSBL
247PO1.Signal=GPIO_Output
[16]248PinOutPanel.CurrentBGAView=Top
249PinOutPanel.RotationAngle=0
250ProjectManager.AskForMigrate=true
251ProjectManager.BackupPrevious=false
252ProjectManager.CompilerLinker=GCC
253ProjectManager.CompilerOptimize=6
254ProjectManager.ComputerToolchain=false
255ProjectManager.CoupleFile=true
[24]256ProjectManager.CustomerFirmwarePackage=..\\..\\..\\..\\..\\..\\STM32Cube\\Repository\\STM32Cube_FW_N6_V1.4.1
257ProjectManager.DefaultFWLocation=false
[16]258ProjectManager.DeletePrevious=true
259ProjectManager.DeviceId=STM32N657X0HxQ
260ProjectManager.Example=Template_FSBL_XIP
261ProjectManager.ExampleSource=CubeFw
262ProjectManager.FirmwarePackage=STM32Cube FW_N6 V1.4.1
[24]263ProjectManager.FreePins=false
[16]264ProjectManager.FreePinsContext=FSBL
265ProjectManager.HalAssertFull=true
266ProjectManager.HeapSize=FSBL-0x200,Appli-0x200,ExtMemLoader-0x200
267ProjectManager.KeepUserCode=true
268ProjectManager.LastFirmware=true
269ProjectManager.LibraryCopy=1
270ProjectManager.MainLocation=Src
271ProjectManager.NoMain=false
272ProjectManager.PreviousToolchain=
273ProjectManager.ProjectBuild=false
274ProjectManager.ProjectFileName=blto2_FSBL.ioc
275ProjectManager.ProjectName=blto2_FSBL
276ProjectManager.ProjectStructure=FSBL\:FSBL\:true;Appli\:Appli\:false;ExtMemLoader\:ExtMemLoader\:false;
277ProjectManager.RegisterCallBack=
278ProjectManager.StackSize=FSBL-0x800,Appli-0x800,ExtMemLoader-0x800
279ProjectManager.TargetToolchain=STM32CubeIDE
280ProjectManager.ToolChainLocation=
281ProjectManager.UAScriptAfterPath=
282ProjectManager.UAScriptBeforePath=
283ProjectManager.UnderRoot=false
[37]284ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false-FSBL,2-MX_GPIO_Init-GPIO-false-HAL-true-FSBL,3-MX_XSPI2_Init-XSPI2-false-HAL-true-FSBL,false-4-MX_XSPIM_Init-XSPIM-false-HAL-true-FSBL,5-MX_BSEC_Init-BSEC-false-HAL-true-FSBL,6-MX_RAMCFG_Init-RAMCFG-false-HAL-true-FSBL,7-MX_SDMMC2_SD_Init-SDMMC2-false-HAL-true-FSBL,9-SystemIsolation_Config-RIF-false-HAL-true-FSBL,10-MX_EXTMEM_MANAGER_Init-EXTMEM_MANAGER-false-HAL-false-FSBL,0-MX_CORTEX_M55_FSBL_Init-CORTEX_M55_FSBL-false-HAL-true-FSBL,0-MX_CORTEX_M55_S_Init-CORTEX_M55_S-false-HAL-true-Appli,1-MX_EXTMEM_MANAGER_Init-EXTMEM_MANAGER-false-HAL-false-ExtMemLoader
[27]285RAMCFG.IPParameters=Instance-RAMCFG1_Activate,Instance-RAMCFG2_Activate,Instance-RAMCFG3_Activate,Instance-RAMCFG4_Activate,Instance-RAMCFG5_Activate,Instance-RAMCFG6_Activate,Instance-AHBSRAMCFG1_Activate,Instance-AHBSRAMCFG2_Activate,Instance-BKPRAM_Activate,Instance-FLEXRAM_Activate,Instance-VENCRAM_Activate,SYSCFG_ITCM_size
286RAMCFG.Instance-AHBSRAMCFG1_Activate=RAMCFG_SRAM1_AHB
287RAMCFG.Instance-AHBSRAMCFG2_Activate=RAMCFG_SRAM2_AHB
288RAMCFG.Instance-BKPRAM_Activate=RAMCFG_BKPSRAM
289RAMCFG.Instance-FLEXRAM_Activate=RAMCFG_FLEXRAM
290RAMCFG.Instance-RAMCFG1_Activate=RAMCFG_SRAM1_AXI
291RAMCFG.Instance-RAMCFG2_Activate=RAMCFG_SRAM2_AXI
292RAMCFG.Instance-RAMCFG3_Activate=RAMCFG_SRAM3_AXI
293RAMCFG.Instance-RAMCFG4_Activate=RAMCFG_SRAM4_AXI
294RAMCFG.Instance-RAMCFG5_Activate=RAMCFG_SRAM5_AXI
295RAMCFG.Instance-RAMCFG6_Activate=RAMCFG_SRAM6_AXI
296RAMCFG.Instance-VENCRAM_Activate=RAMCFG_VENC_RAM
297RAMCFG.SYSCFG_ITCM_size=SYSCFG_ITCM_64K
[16]298RCC.ADC12Freq_Value=200000000
299RCC.ADFFreq_Value=200000000
300RCC.AHB1234Freq_Value=200000000
[25]301RCC.AHBFreq_Value=100000000
[16]302RCC.APB1Freq_Value=200000000
303RCC.APB2Freq_Value=200000000
304RCC.APB4Freq_Value=200000000
305RCC.APB5Freq_Value=200000000
306RCC.AXIClockFreq_Value=400000000
307RCC.CKPERFreq_Value=64000000
308RCC.CPUCLKSource=RCC_CPUCLKSOURCE_IC1
[25]309RCC.CortexFreq_Value=100000000
310RCC.CpuClockFreq_Value=800000000
[16]311RCC.DCMIPPFreq_Value=200000000
312RCC.ETH1Freq_Value=200000000
[25]313RCC.FBDIV4=125
[16]314RCC.FDCANFreq_Value=200000000
315RCC.FMCFreq_Value=200000000
[25]316RCC.FOUTPOSTDIV1Freq_Value=1600000000
[16]317RCC.FOUTPOSTDIV2Freq_Value=1600000000
318RCC.FOUTPOSTDIV3Freq_Value=1600000000
[25]319RCC.FOUTPOSTDIV4Freq_Value=1000000000
320RCC.FREFDIV4=8
[16]321RCC.FamilyName=M
322RCC.HSE_VALUE=48000000
323RCC.HSI_VALUE=64000000
324RCC.I2C1Freq_Value=200000000
325RCC.I2C2Freq_Value=200000000
326RCC.I2C3Freq_Value=200000000
327RCC.I2C4Freq_Value=200000000
328RCC.I3C1Freq_Value=200000000
329RCC.I3C2Freq_Value=200000000
330RCC.IC10Freq_VALUE=1600000000
331RCC.IC11Freq_VALUE=400000000
332RCC.IC12Freq_VALUE=1600000000
333RCC.IC13Freq_VALUE=1600000000
334RCC.IC14Freq_VALUE=1600000000
335RCC.IC15Freq_VALUE=1600000000
[25]336RCC.IC16Freq_VALUE=1000000000
337RCC.IC17Freq_VALUE=1000000000
338RCC.IC18Freq_VALUE=1000000000
339RCC.IC19Freq_VALUE=1000000000
[16]340RCC.IC1Div=2
[25]341RCC.IC1Freq_VALUE=800000000
342RCC.IC20Freq_VALUE=1000000000
[16]343RCC.IC2Freq_VALUE=400000000
[25]344RCC.IC3Div=32
[16]345RCC.IC3Freq_VALUE=50000000
[25]346RCC.IC4Freq_VALUE=1600000000
347RCC.IC5Freq_VALUE=1600000000
348RCC.IC6CLKSource=RCC_ICCLKSOURCE_PLL4
349RCC.IC6Div=1
350RCC.IC6Freq_VALUE=1000000000
[16]351RCC.IC7Freq_VALUE=1600000000
352RCC.IC8Freq_VALUE=1600000000
353RCC.IC9Freq_VALUE=1600000000
[26]354RCC.IPParameters=ADC12Freq_Value,ADFFreq_Value,AHB1234Freq_Value,AHBFreq_Value,APB1Freq_Value,APB2Freq_Value,APB4Freq_Value,APB5Freq_Value,AXIClockFreq_Value,CKPERFreq_Value,CPUCLKSource,CortexFreq_Value,CpuClockFreq_Value,DCMIPPFreq_Value,ETH1Freq_Value,FBDIV4,FDCANFreq_Value,FMCFreq_Value,FOUTPOSTDIV1Freq_Value,FOUTPOSTDIV2Freq_Value,FOUTPOSTDIV3Freq_Value,FOUTPOSTDIV4Freq_Value,FREFDIV4,FamilyName,HSE_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I3C1Freq_Value,I3C2Freq_Value,IC10Freq_VALUE,IC11Freq_VALUE,IC12Freq_VALUE,IC13Freq_VALUE,IC14Freq_VALUE,IC15Freq_VALUE,IC16Freq_VALUE,IC17Freq_VALUE,IC18Freq_VALUE,IC19Freq_VALUE,IC1Div,IC1Freq_VALUE,IC20Freq_VALUE,IC2Freq_VALUE,IC3Div,IC3Freq_VALUE,IC4Freq_VALUE,IC5Freq_VALUE,IC6CLKSource,IC6Div,IC6Freq_VALUE,IC7Freq_VALUE,IC8Freq_VALUE,IC9Freq_VALUE,LPTIM1Freq_Value,LPTIM2Freq_Value,LPTIM3Freq_Value,LPTIM4Freq_Value,LPTIM5Freq_Value,LPUART1Freq_Value,LSE_VALUE,LSI_VALUE,LTDCFreq_Value,MCO1PinFreq_Value,MCO2PinFreq_Value,MDFFreq_Value,MSI_VALUE,OTGHS1Freq_Value,OTGHS2Freq_Value,OTGPHY1Freq_Value,OTGPHY2Freq_Value,PSSIFreq_Value,RCC_MCO2Source,RCC_MCODiv1,RCC_MCODiv2,RTCFreq_Value,SAI1Freq_Value,SAI2Freq_Value,SDMMC1Freq_Value,SDMMC2Freq_Value,SPDIFRX1Freq_Value,SPI1Freq_Value,SPI2Freq_Value,SPI3Freq_Value,SPI4Freq_Value,SPI5Freq_Value,SPI6Freq_Value,SYSBCLKFreq_VALUE,SYSBCLKSource,SYSCCLKFreq_VALUE,SYSDCLKFreq_VALUE,TIMGFreq_Value,UART4Freq_Value,UART5Freq_Value,UART7Freq_Value,UART8Freq_Value,UART9Freq_Value,USART10Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USART6Freq_Value,VCO1OutputFreq_Value,VCO2OutputFreq_Value,VCO3OutputFreq_Value,VCO4OutputFreq_Value,VCOInput1Freq_Value,VCOInput2Freq_Value,VCOInput3Freq_Value,VCOInput4Freq_Value,XSPI1Freq_Value,XSPI2ClockSelection,XSPI2Freq_Value,XSPI3Freq_Value
[16]355RCC.LPTIM1Freq_Value=200000000
356RCC.LPTIM2Freq_Value=200000000
357RCC.LPTIM3Freq_Value=200000000
358RCC.LPTIM4Freq_Value=200000000
359RCC.LPTIM5Freq_Value=200000000
360RCC.LPUART1Freq_Value=200000000
361RCC.LSE_VALUE=32768
362RCC.LSI_VALUE=32000
363RCC.LTDCFreq_Value=200000000
[26]364RCC.MCO1PinFreq_Value=6400000
365RCC.MCO2PinFreq_Value=400000000
[16]366RCC.MDFFreq_Value=200000000
367RCC.MSI_VALUE=16000000
368RCC.OTGHS1Freq_Value=24000000
369RCC.OTGHS2Freq_Value=24000000
370RCC.OTGPHY1Freq_Value=24000000
371RCC.OTGPHY2Freq_Value=24000000
372RCC.PSSIFreq_Value=200000000
[26]373RCC.RCC_MCO2Source=RCC_MCO2SOURCE_IC15
374RCC.RCC_MCODiv1=RCC_MCODIV_10
375RCC.RCC_MCODiv2=RCC_MCODIV_4
[16]376RCC.RTCFreq_Value=32000
377RCC.SAI1Freq_Value=200000000
378RCC.SAI2Freq_Value=200000000
379RCC.SDMMC1Freq_Value=200000000
380RCC.SDMMC2Freq_Value=200000000
381RCC.SPDIFRX1Freq_Value=200000000
382RCC.SPI1Freq_Value=200000000
383RCC.SPI2Freq_Value=200000000
384RCC.SPI3Freq_Value=200000000
385RCC.SPI4Freq_Value=200000000
386RCC.SPI5Freq_Value=200000000
387RCC.SPI6Freq_Value=200000000
388RCC.SYSBCLKFreq_VALUE=400000000
389RCC.SYSBCLKSource=RCC_SYSCLKSOURCE_IC2_IC6_IC11
[25]390RCC.SYSCCLKFreq_VALUE=1000000000
[16]391RCC.SYSDCLKFreq_VALUE=400000000
392RCC.TIMGFreq_Value=400000000
393RCC.UART4Freq_Value=200000000
394RCC.UART5Freq_Value=200000000
395RCC.UART7Freq_Value=200000000
396RCC.UART8Freq_Value=200000000
397RCC.UART9Freq_Value=200000000
398RCC.USART10Freq_Value=200000000
399RCC.USART1Freq_Value=200000000
400RCC.USART2Freq_Value=200000000
401RCC.USART3Freq_Value=200000000
402RCC.USART6Freq_Value=200000000
[25]403RCC.VCO1OutputFreq_Value=1600000000
[16]404RCC.VCO2OutputFreq_Value=1600000000
405RCC.VCO3OutputFreq_Value=1600000000
[25]406RCC.VCO4OutputFreq_Value=1000000000
407RCC.VCOInput1Freq_Value=64000000
[16]408RCC.VCOInput2Freq_Value=64000000
409RCC.VCOInput3Freq_Value=64000000
[25]410RCC.VCOInput4Freq_Value=8000000
[16]411RCC.XSPI1Freq_Value=200000000
412RCC.XSPI2ClockSelection=RCC_XSPI2CLKSOURCE_IC3
413RCC.XSPI2Freq_Value=50000000
414RCC.XSPI3Freq_Value=200000000
415RIF.DCMIPP_CID_RIMU=0
416RIF.DMA2D_CID_RIMU=0
417RIF.ETH1_CID_RIMU=0
418RIF.ETR_CID_RIMU=0
419RIF.GPU_CID_RIMU=0
[37]420RIF.IPParameters=ETR_CID_RIMU,SDMMC1_CID_RIMU,SDMMC2_CID_RIMU,OTG1_CID_RIMU,OTG2_CID_RIMU,ETH1_CID_RIMU,GPU_CID_RIMU,DMA2D_CID_RIMU,DCMIPP_CID_RIMU,LTDC_L1_CID_RIMU,LTDC_L2_CID_RIMU,VENC_CID_RIMU
[16]421RIF.LTDC_L1_CID_RIMU=0
422RIF.LTDC_L2_CID_RIMU=0
423RIF.OTG1_CID_RIMU=0
424RIF.OTG2_CID_RIMU=0
425RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 0\ Cid=-
426RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 0\ Privilege=true
427RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 0\ Secure=false
428RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 1\ Cid=-
429RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 1\ Privilege=true
430RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 1\ Secure=false
431RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 10\ Cid=-
432RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 10\ Privilege=true
433RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 10\ Secure=false
434RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 11\ Cid=-
435RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 11\ Privilege=true
436RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 11\ Secure=false
437RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 12\ Cid=-
438RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 12\ Privilege=true
439RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 12\ Secure=false
440RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 13\ Cid=-
441RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 13\ Privilege=true
442RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 13\ Secure=false
443RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 14\ Cid=-
444RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 14\ Privilege=true
445RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 14\ Secure=false
446RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 15\ Cid=-
447RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 15\ Privilege=true
448RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 15\ Secure=false
449RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 2\ Cid=-
450RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 2\ Privilege=true
451RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 2\ Secure=false
452RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 3\ Cid=-
453RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 3\ Privilege=true
454RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 3\ Secure=false
455RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 4\ Cid=-
456RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 4\ Privilege=true
457RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 4\ Secure=false
458RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 5\ Cid=-
459RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 5\ Privilege=true
460RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 5\ Secure=false
461RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 6\ Cid=-
462RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 6\ Privilege=true
463RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 6\ Secure=false
464RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 7\ Cid=-
465RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 7\ Privilege=true
466RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 7\ Secure=false
467RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 8\ Cid=-
468RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 8\ Privilege=true
469RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 8\ Secure=false
470RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 9\ Cid=-
471RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 9\ Privilege=true
472RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 9\ Secure=false
473RIF.RIFAWARE.GPIO\ Feature\ PA0\ Cid=-
474RIF.RIFAWARE.GPIO\ Feature\ PA0\ Secure=false
475RIF.RIFAWARE.GPIO\ Feature\ PA1\ Cid=-
476RIF.RIFAWARE.GPIO\ Feature\ PA1\ Secure=false
477RIF.RIFAWARE.GPIO\ Feature\ PA10\ Cid=-
478RIF.RIFAWARE.GPIO\ Feature\ PA10\ Secure=false
479RIF.RIFAWARE.GPIO\ Feature\ PA11\ Cid=-
480RIF.RIFAWARE.GPIO\ Feature\ PA11\ Secure=false
481RIF.RIFAWARE.GPIO\ Feature\ PA12\ Cid=-
482RIF.RIFAWARE.GPIO\ Feature\ PA12\ Secure=false
483RIF.RIFAWARE.GPIO\ Feature\ PA2\ Cid=-
484RIF.RIFAWARE.GPIO\ Feature\ PA2\ Secure=false
485RIF.RIFAWARE.GPIO\ Feature\ PA3\ Cid=-
486RIF.RIFAWARE.GPIO\ Feature\ PA3\ Secure=false
487RIF.RIFAWARE.GPIO\ Feature\ PA4\ Cid=-
488RIF.RIFAWARE.GPIO\ Feature\ PA4\ Secure=false
489RIF.RIFAWARE.GPIO\ Feature\ PA5\ Cid=-
490RIF.RIFAWARE.GPIO\ Feature\ PA5\ Secure=false
491RIF.RIFAWARE.GPIO\ Feature\ PA6\ Cid=-
492RIF.RIFAWARE.GPIO\ Feature\ PA6\ Secure=false
493RIF.RIFAWARE.GPIO\ Feature\ PA7\ Cid=-
494RIF.RIFAWARE.GPIO\ Feature\ PA7\ Secure=false
495RIF.RIFAWARE.GPIO\ Feature\ PA8\ Cid=-
496RIF.RIFAWARE.GPIO\ Feature\ PA8\ Secure=false
497RIF.RIFAWARE.GPIO\ Feature\ PA9\ Cid=-
498RIF.RIFAWARE.GPIO\ Feature\ PA9\ Secure=false
499RIF.RIFAWARE.GPIO\ Feature\ PB0\ Cid=-
500RIF.RIFAWARE.GPIO\ Feature\ PB0\ Secure=false
501RIF.RIFAWARE.GPIO\ Feature\ PB1\ Cid=-
502RIF.RIFAWARE.GPIO\ Feature\ PB1\ Secure=false
503RIF.RIFAWARE.GPIO\ Feature\ PB10\ Cid=-
504RIF.RIFAWARE.GPIO\ Feature\ PB10\ Secure=false
505RIF.RIFAWARE.GPIO\ Feature\ PB11\ Cid=-
506RIF.RIFAWARE.GPIO\ Feature\ PB11\ Secure=false
[25]507RIF.RIFAWARE.GPIO\ Feature\ PB12\ Cid=1
508RIF.RIFAWARE.GPIO\ Feature\ PB12\ FSBL=true
509RIF.RIFAWARE.GPIO\ Feature\ PB12\ Secure=true
[16]510RIF.RIFAWARE.GPIO\ Feature\ PB13\ Cid=-
511RIF.RIFAWARE.GPIO\ Feature\ PB13\ Secure=false
512RIF.RIFAWARE.GPIO\ Feature\ PB14\ Cid=-
513RIF.RIFAWARE.GPIO\ Feature\ PB14\ Secure=false
514RIF.RIFAWARE.GPIO\ Feature\ PB15\ Cid=-
515RIF.RIFAWARE.GPIO\ Feature\ PB15\ Secure=false
516RIF.RIFAWARE.GPIO\ Feature\ PB2\ Cid=-
517RIF.RIFAWARE.GPIO\ Feature\ PB2\ Secure=false
518RIF.RIFAWARE.GPIO\ Feature\ PB3\ Cid=-
519RIF.RIFAWARE.GPIO\ Feature\ PB3\ Secure=false
520RIF.RIFAWARE.GPIO\ Feature\ PB6\ Cid=-
521RIF.RIFAWARE.GPIO\ Feature\ PB6\ Secure=false
522RIF.RIFAWARE.GPIO\ Feature\ PB7\ Cid=-
523RIF.RIFAWARE.GPIO\ Feature\ PB7\ Secure=false
524RIF.RIFAWARE.GPIO\ Feature\ PB8\ Cid=-
525RIF.RIFAWARE.GPIO\ Feature\ PB8\ Secure=false
526RIF.RIFAWARE.GPIO\ Feature\ PB9\ Cid=-
527RIF.RIFAWARE.GPIO\ Feature\ PB9\ Secure=false
[37]528RIF.RIFAWARE.GPIO\ Feature\ PC0\ Cid=1
529RIF.RIFAWARE.GPIO\ Feature\ PC0\ FSBL=true
530RIF.RIFAWARE.GPIO\ Feature\ PC0\ Secure=true
[16]531RIF.RIFAWARE.GPIO\ Feature\ PC1\ Cid=-
532RIF.RIFAWARE.GPIO\ Feature\ PC1\ Secure=false
533RIF.RIFAWARE.GPIO\ Feature\ PC10\ Cid=-
534RIF.RIFAWARE.GPIO\ Feature\ PC10\ Secure=false
535RIF.RIFAWARE.GPIO\ Feature\ PC11\ Cid=-
536RIF.RIFAWARE.GPIO\ Feature\ PC11\ Secure=false
537RIF.RIFAWARE.GPIO\ Feature\ PC12\ Cid=-
538RIF.RIFAWARE.GPIO\ Feature\ PC12\ Secure=false
539RIF.RIFAWARE.GPIO\ Feature\ PC13\ Cid=-
540RIF.RIFAWARE.GPIO\ Feature\ PC13\ Secure=false
[37]541RIF.RIFAWARE.GPIO\ Feature\ PC2\ Cid=1
542RIF.RIFAWARE.GPIO\ Feature\ PC2\ FSBL=true
543RIF.RIFAWARE.GPIO\ Feature\ PC2\ Secure=true
544RIF.RIFAWARE.GPIO\ Feature\ PC3\ Cid=1
545RIF.RIFAWARE.GPIO\ Feature\ PC3\ FSBL=true
546RIF.RIFAWARE.GPIO\ Feature\ PC3\ Secure=true
547RIF.RIFAWARE.GPIO\ Feature\ PC4\ Cid=1
548RIF.RIFAWARE.GPIO\ Feature\ PC4\ FSBL=true
549RIF.RIFAWARE.GPIO\ Feature\ PC4\ Secure=true
550RIF.RIFAWARE.GPIO\ Feature\ PC5\ Cid=1
551RIF.RIFAWARE.GPIO\ Feature\ PC5\ FSBL=true
552RIF.RIFAWARE.GPIO\ Feature\ PC5\ Secure=true
[16]553RIF.RIFAWARE.GPIO\ Feature\ PC6\ Cid=-
554RIF.RIFAWARE.GPIO\ Feature\ PC6\ Secure=false
555RIF.RIFAWARE.GPIO\ Feature\ PC7\ Cid=-
556RIF.RIFAWARE.GPIO\ Feature\ PC7\ Secure=false
557RIF.RIFAWARE.GPIO\ Feature\ PC8\ Cid=-
558RIF.RIFAWARE.GPIO\ Feature\ PC8\ Secure=false
559RIF.RIFAWARE.GPIO\ Feature\ PC9\ Cid=-
560RIF.RIFAWARE.GPIO\ Feature\ PC9\ Secure=false
561RIF.RIFAWARE.GPIO\ Feature\ PD0\ Cid=-
562RIF.RIFAWARE.GPIO\ Feature\ PD0\ Secure=false
563RIF.RIFAWARE.GPIO\ Feature\ PD1\ Cid=-
564RIF.RIFAWARE.GPIO\ Feature\ PD1\ Secure=false
565RIF.RIFAWARE.GPIO\ Feature\ PD10\ Cid=-
566RIF.RIFAWARE.GPIO\ Feature\ PD10\ Secure=false
567RIF.RIFAWARE.GPIO\ Feature\ PD11\ Cid=-
568RIF.RIFAWARE.GPIO\ Feature\ PD11\ Secure=false
569RIF.RIFAWARE.GPIO\ Feature\ PD12\ Cid=-
570RIF.RIFAWARE.GPIO\ Feature\ PD12\ Secure=false
571RIF.RIFAWARE.GPIO\ Feature\ PD13\ Cid=-
572RIF.RIFAWARE.GPIO\ Feature\ PD13\ Secure=false
573RIF.RIFAWARE.GPIO\ Feature\ PD14\ Cid=-
574RIF.RIFAWARE.GPIO\ Feature\ PD14\ Secure=false
575RIF.RIFAWARE.GPIO\ Feature\ PD15\ Cid=-
576RIF.RIFAWARE.GPIO\ Feature\ PD15\ Secure=false
577RIF.RIFAWARE.GPIO\ Feature\ PD2\ Cid=-
578RIF.RIFAWARE.GPIO\ Feature\ PD2\ Secure=false
579RIF.RIFAWARE.GPIO\ Feature\ PD3\ Cid=-
580RIF.RIFAWARE.GPIO\ Feature\ PD3\ Secure=false
581RIF.RIFAWARE.GPIO\ Feature\ PD4\ Cid=-
582RIF.RIFAWARE.GPIO\ Feature\ PD4\ Secure=false
583RIF.RIFAWARE.GPIO\ Feature\ PD5\ Cid=-
584RIF.RIFAWARE.GPIO\ Feature\ PD5\ Secure=false
585RIF.RIFAWARE.GPIO\ Feature\ PD6\ Cid=-
586RIF.RIFAWARE.GPIO\ Feature\ PD6\ Secure=false
587RIF.RIFAWARE.GPIO\ Feature\ PD7\ Cid=-
588RIF.RIFAWARE.GPIO\ Feature\ PD7\ Secure=false
589RIF.RIFAWARE.GPIO\ Feature\ PD8\ Cid=-
590RIF.RIFAWARE.GPIO\ Feature\ PD8\ Secure=false
591RIF.RIFAWARE.GPIO\ Feature\ PD9\ Cid=-
592RIF.RIFAWARE.GPIO\ Feature\ PD9\ Secure=false
593RIF.RIFAWARE.GPIO\ Feature\ PE0\ Cid=-
594RIF.RIFAWARE.GPIO\ Feature\ PE0\ Secure=false
595RIF.RIFAWARE.GPIO\ Feature\ PE1\ Cid=-
596RIF.RIFAWARE.GPIO\ Feature\ PE1\ Secure=false
597RIF.RIFAWARE.GPIO\ Feature\ PE10\ Cid=-
598RIF.RIFAWARE.GPIO\ Feature\ PE10\ Secure=false
599RIF.RIFAWARE.GPIO\ Feature\ PE11\ Cid=-
600RIF.RIFAWARE.GPIO\ Feature\ PE11\ Secure=false
601RIF.RIFAWARE.GPIO\ Feature\ PE12\ Cid=-
602RIF.RIFAWARE.GPIO\ Feature\ PE12\ Secure=false
603RIF.RIFAWARE.GPIO\ Feature\ PE13\ Cid=-
604RIF.RIFAWARE.GPIO\ Feature\ PE13\ Secure=false
605RIF.RIFAWARE.GPIO\ Feature\ PE14\ Cid=-
606RIF.RIFAWARE.GPIO\ Feature\ PE14\ Secure=false
607RIF.RIFAWARE.GPIO\ Feature\ PE15\ Cid=-
608RIF.RIFAWARE.GPIO\ Feature\ PE15\ Secure=false
609RIF.RIFAWARE.GPIO\ Feature\ PE2\ Cid=-
610RIF.RIFAWARE.GPIO\ Feature\ PE2\ Secure=false
611RIF.RIFAWARE.GPIO\ Feature\ PE3\ Cid=-
612RIF.RIFAWARE.GPIO\ Feature\ PE3\ Secure=false
[37]613RIF.RIFAWARE.GPIO\ Feature\ PE4\ Cid=1
614RIF.RIFAWARE.GPIO\ Feature\ PE4\ FSBL=true
615RIF.RIFAWARE.GPIO\ Feature\ PE4\ Secure=true
[16]616RIF.RIFAWARE.GPIO\ Feature\ PE5\ Cid=-
617RIF.RIFAWARE.GPIO\ Feature\ PE5\ Secure=false
618RIF.RIFAWARE.GPIO\ Feature\ PE6\ Cid=-
619RIF.RIFAWARE.GPIO\ Feature\ PE6\ Secure=false
620RIF.RIFAWARE.GPIO\ Feature\ PE7\ Cid=-
621RIF.RIFAWARE.GPIO\ Feature\ PE7\ Secure=false
622RIF.RIFAWARE.GPIO\ Feature\ PE8\ Cid=-
623RIF.RIFAWARE.GPIO\ Feature\ PE8\ Secure=false
624RIF.RIFAWARE.GPIO\ Feature\ PE9\ Cid=-
625RIF.RIFAWARE.GPIO\ Feature\ PE9\ Secure=false
626RIF.RIFAWARE.GPIO\ Feature\ PF0\ Cid=-
627RIF.RIFAWARE.GPIO\ Feature\ PF0\ Secure=false
628RIF.RIFAWARE.GPIO\ Feature\ PF1\ Cid=-
629RIF.RIFAWARE.GPIO\ Feature\ PF1\ Secure=false
630RIF.RIFAWARE.GPIO\ Feature\ PF10\ Cid=-
631RIF.RIFAWARE.GPIO\ Feature\ PF10\ Secure=false
632RIF.RIFAWARE.GPIO\ Feature\ PF11\ Cid=-
633RIF.RIFAWARE.GPIO\ Feature\ PF11\ Secure=false
634RIF.RIFAWARE.GPIO\ Feature\ PF12\ Cid=-
635RIF.RIFAWARE.GPIO\ Feature\ PF12\ Secure=false
636RIF.RIFAWARE.GPIO\ Feature\ PF13\ Cid=-
637RIF.RIFAWARE.GPIO\ Feature\ PF13\ Secure=false
638RIF.RIFAWARE.GPIO\ Feature\ PF14\ Cid=-
639RIF.RIFAWARE.GPIO\ Feature\ PF14\ Secure=false
640RIF.RIFAWARE.GPIO\ Feature\ PF15\ Cid=-
641RIF.RIFAWARE.GPIO\ Feature\ PF15\ Secure=false
642RIF.RIFAWARE.GPIO\ Feature\ PF2\ Cid=-
643RIF.RIFAWARE.GPIO\ Feature\ PF2\ Secure=false
644RIF.RIFAWARE.GPIO\ Feature\ PF3\ Cid=-
645RIF.RIFAWARE.GPIO\ Feature\ PF3\ Secure=false
646RIF.RIFAWARE.GPIO\ Feature\ PF4\ Cid=-
647RIF.RIFAWARE.GPIO\ Feature\ PF4\ Secure=false
648RIF.RIFAWARE.GPIO\ Feature\ PF5\ Cid=-
649RIF.RIFAWARE.GPIO\ Feature\ PF5\ Secure=false
650RIF.RIFAWARE.GPIO\ Feature\ PF6\ Cid=-
651RIF.RIFAWARE.GPIO\ Feature\ PF6\ Secure=false
652RIF.RIFAWARE.GPIO\ Feature\ PF7\ Cid=-
653RIF.RIFAWARE.GPIO\ Feature\ PF7\ Secure=false
654RIF.RIFAWARE.GPIO\ Feature\ PF8\ Cid=-
655RIF.RIFAWARE.GPIO\ Feature\ PF8\ Secure=false
656RIF.RIFAWARE.GPIO\ Feature\ PF9\ Cid=-
657RIF.RIFAWARE.GPIO\ Feature\ PF9\ Secure=false
[28]658RIF.RIFAWARE.GPIO\ Feature\ PG0\ Cid=-
659RIF.RIFAWARE.GPIO\ Feature\ PG0\ Secure=false
[16]660RIF.RIFAWARE.GPIO\ Feature\ PG1\ Cid=-
661RIF.RIFAWARE.GPIO\ Feature\ PG1\ Secure=false
662RIF.RIFAWARE.GPIO\ Feature\ PG10\ Cid=-
663RIF.RIFAWARE.GPIO\ Feature\ PG10\ Secure=false
664RIF.RIFAWARE.GPIO\ Feature\ PG11\ Cid=-
665RIF.RIFAWARE.GPIO\ Feature\ PG11\ Secure=false
666RIF.RIFAWARE.GPIO\ Feature\ PG12\ Cid=-
667RIF.RIFAWARE.GPIO\ Feature\ PG12\ Secure=false
668RIF.RIFAWARE.GPIO\ Feature\ PG13\ Cid=-
669RIF.RIFAWARE.GPIO\ Feature\ PG13\ Secure=false
670RIF.RIFAWARE.GPIO\ Feature\ PG14\ Cid=-
671RIF.RIFAWARE.GPIO\ Feature\ PG14\ Secure=false
672RIF.RIFAWARE.GPIO\ Feature\ PG15\ Cid=-
673RIF.RIFAWARE.GPIO\ Feature\ PG15\ Secure=false
674RIF.RIFAWARE.GPIO\ Feature\ PG2\ Cid=-
675RIF.RIFAWARE.GPIO\ Feature\ PG2\ Secure=false
676RIF.RIFAWARE.GPIO\ Feature\ PG3\ Cid=-
677RIF.RIFAWARE.GPIO\ Feature\ PG3\ Secure=false
678RIF.RIFAWARE.GPIO\ Feature\ PG4\ Cid=-
679RIF.RIFAWARE.GPIO\ Feature\ PG4\ Secure=false
680RIF.RIFAWARE.GPIO\ Feature\ PG5\ Cid=-
681RIF.RIFAWARE.GPIO\ Feature\ PG5\ Secure=false
682RIF.RIFAWARE.GPIO\ Feature\ PG6\ Cid=-
683RIF.RIFAWARE.GPIO\ Feature\ PG6\ Secure=false
684RIF.RIFAWARE.GPIO\ Feature\ PG7\ Cid=-
685RIF.RIFAWARE.GPIO\ Feature\ PG7\ Secure=false
686RIF.RIFAWARE.GPIO\ Feature\ PG8\ Cid=-
687RIF.RIFAWARE.GPIO\ Feature\ PG8\ Secure=false
688RIF.RIFAWARE.GPIO\ Feature\ PG9\ Cid=-
689RIF.RIFAWARE.GPIO\ Feature\ PG9\ Secure=false
690RIF.RIFAWARE.GPIO\ Feature\ PH2\ Cid=-
691RIF.RIFAWARE.GPIO\ Feature\ PH2\ Secure=false
692RIF.RIFAWARE.GPIO\ Feature\ PH3\ Cid=-
693RIF.RIFAWARE.GPIO\ Feature\ PH3\ Secure=false
694RIF.RIFAWARE.GPIO\ Feature\ PH4\ Cid=-
695RIF.RIFAWARE.GPIO\ Feature\ PH4\ Secure=false
696RIF.RIFAWARE.GPIO\ Feature\ PH5\ Cid=-
697RIF.RIFAWARE.GPIO\ Feature\ PH5\ Secure=false
698RIF.RIFAWARE.GPIO\ Feature\ PH6\ Cid=-
699RIF.RIFAWARE.GPIO\ Feature\ PH6\ Secure=false
700RIF.RIFAWARE.GPIO\ Feature\ PH7\ Cid=-
701RIF.RIFAWARE.GPIO\ Feature\ PH7\ Secure=false
702RIF.RIFAWARE.GPIO\ Feature\ PH8\ Cid=-
703RIF.RIFAWARE.GPIO\ Feature\ PH8\ Secure=false
704RIF.RIFAWARE.GPIO\ Feature\ PH9\ Cid=-
705RIF.RIFAWARE.GPIO\ Feature\ PH9\ Secure=false
706RIF.RIFAWARE.GPIO\ Feature\ PN0\ Cid=-
707RIF.RIFAWARE.GPIO\ Feature\ PN0\ Secure=false
708RIF.RIFAWARE.GPIO\ Feature\ PN1\ Cid=-
709RIF.RIFAWARE.GPIO\ Feature\ PN1\ Secure=false
710RIF.RIFAWARE.GPIO\ Feature\ PN10\ Cid=-
711RIF.RIFAWARE.GPIO\ Feature\ PN10\ Secure=false
712RIF.RIFAWARE.GPIO\ Feature\ PN11\ Cid=-
713RIF.RIFAWARE.GPIO\ Feature\ PN11\ Secure=false
714RIF.RIFAWARE.GPIO\ Feature\ PN12\ Cid=-
715RIF.RIFAWARE.GPIO\ Feature\ PN12\ Secure=false
716RIF.RIFAWARE.GPIO\ Feature\ PN2\ Cid=-
717RIF.RIFAWARE.GPIO\ Feature\ PN2\ Secure=false
718RIF.RIFAWARE.GPIO\ Feature\ PN3\ Cid=-
719RIF.RIFAWARE.GPIO\ Feature\ PN3\ Secure=false
720RIF.RIFAWARE.GPIO\ Feature\ PN4\ Cid=-
721RIF.RIFAWARE.GPIO\ Feature\ PN4\ Secure=false
722RIF.RIFAWARE.GPIO\ Feature\ PN5\ Cid=-
723RIF.RIFAWARE.GPIO\ Feature\ PN5\ Secure=false
724RIF.RIFAWARE.GPIO\ Feature\ PN6\ Cid=-
725RIF.RIFAWARE.GPIO\ Feature\ PN6\ Secure=false
726RIF.RIFAWARE.GPIO\ Feature\ PN7\ Cid=-
727RIF.RIFAWARE.GPIO\ Feature\ PN7\ Secure=false
728RIF.RIFAWARE.GPIO\ Feature\ PN8\ Cid=-
729RIF.RIFAWARE.GPIO\ Feature\ PN8\ Secure=false
730RIF.RIFAWARE.GPIO\ Feature\ PN9\ Cid=-
731RIF.RIFAWARE.GPIO\ Feature\ PN9\ Secure=false
732RIF.RIFAWARE.GPIO\ Feature\ PO0\ Cid=-
733RIF.RIFAWARE.GPIO\ Feature\ PO0\ Secure=false
[28]734RIF.RIFAWARE.GPIO\ Feature\ PO1\ Cid=1
735RIF.RIFAWARE.GPIO\ Feature\ PO1\ FSBL=true
736RIF.RIFAWARE.GPIO\ Feature\ PO1\ Secure=true
[16]737RIF.RIFAWARE.GPIO\ Feature\ PO2\ Cid=-
738RIF.RIFAWARE.GPIO\ Feature\ PO2\ Secure=false
739RIF.RIFAWARE.GPIO\ Feature\ PO3\ Cid=-
740RIF.RIFAWARE.GPIO\ Feature\ PO3\ Secure=false
741RIF.RIFAWARE.GPIO\ Feature\ PO4\ Cid=-
742RIF.RIFAWARE.GPIO\ Feature\ PO4\ Secure=false
743RIF.RIFAWARE.GPIO\ Feature\ PO5\ Cid=-
744RIF.RIFAWARE.GPIO\ Feature\ PO5\ Secure=false
745RIF.RIFAWARE.GPIO\ Feature\ PP0\ Cid=-
746RIF.RIFAWARE.GPIO\ Feature\ PP0\ Secure=false
747RIF.RIFAWARE.GPIO\ Feature\ PP1\ Cid=-
748RIF.RIFAWARE.GPIO\ Feature\ PP1\ Secure=false
749RIF.RIFAWARE.GPIO\ Feature\ PP10\ Cid=-
750RIF.RIFAWARE.GPIO\ Feature\ PP10\ Secure=false
751RIF.RIFAWARE.GPIO\ Feature\ PP11\ Cid=-
752RIF.RIFAWARE.GPIO\ Feature\ PP11\ Secure=false
753RIF.RIFAWARE.GPIO\ Feature\ PP12\ Cid=-
754RIF.RIFAWARE.GPIO\ Feature\ PP12\ Secure=false
755RIF.RIFAWARE.GPIO\ Feature\ PP13\ Cid=-
756RIF.RIFAWARE.GPIO\ Feature\ PP13\ Secure=false
757RIF.RIFAWARE.GPIO\ Feature\ PP14\ Cid=-
758RIF.RIFAWARE.GPIO\ Feature\ PP14\ Secure=false
759RIF.RIFAWARE.GPIO\ Feature\ PP15\ Cid=-
760RIF.RIFAWARE.GPIO\ Feature\ PP15\ Secure=false
761RIF.RIFAWARE.GPIO\ Feature\ PP2\ Cid=-
762RIF.RIFAWARE.GPIO\ Feature\ PP2\ Secure=false
763RIF.RIFAWARE.GPIO\ Feature\ PP3\ Cid=-
764RIF.RIFAWARE.GPIO\ Feature\ PP3\ Secure=false
765RIF.RIFAWARE.GPIO\ Feature\ PP4\ Cid=-
766RIF.RIFAWARE.GPIO\ Feature\ PP4\ Secure=false
767RIF.RIFAWARE.GPIO\ Feature\ PP5\ Cid=-
768RIF.RIFAWARE.GPIO\ Feature\ PP5\ Secure=false
769RIF.RIFAWARE.GPIO\ Feature\ PP6\ Cid=-
770RIF.RIFAWARE.GPIO\ Feature\ PP6\ Secure=false
771RIF.RIFAWARE.GPIO\ Feature\ PP7\ Cid=-
772RIF.RIFAWARE.GPIO\ Feature\ PP7\ Secure=false
773RIF.RIFAWARE.GPIO\ Feature\ PP8\ Cid=-
774RIF.RIFAWARE.GPIO\ Feature\ PP8\ Secure=false
775RIF.RIFAWARE.GPIO\ Feature\ PP9\ Cid=-
776RIF.RIFAWARE.GPIO\ Feature\ PP9\ Secure=false
777RIF.RIFAWARE.GPIO\ Feature\ PQ0\ Cid=-
778RIF.RIFAWARE.GPIO\ Feature\ PQ0\ Secure=false
779RIF.RIFAWARE.GPIO\ Feature\ PQ1\ Cid=-
780RIF.RIFAWARE.GPIO\ Feature\ PQ1\ Secure=false
781RIF.RIFAWARE.GPIO\ Feature\ PQ2\ Cid=-
782RIF.RIFAWARE.GPIO\ Feature\ PQ2\ Secure=false
783RIF.RIFAWARE.GPIO\ Feature\ PQ3\ Cid=-
784RIF.RIFAWARE.GPIO\ Feature\ PQ3\ Secure=false
785RIF.RIFAWARE.GPIO\ Feature\ PQ4\ Cid=-
786RIF.RIFAWARE.GPIO\ Feature\ PQ4\ Secure=false
787RIF.RIFAWARE.GPIO\ Feature\ PQ5\ Cid=-
788RIF.RIFAWARE.GPIO\ Feature\ PQ5\ Secure=false
789RIF.RIFAWARE.GPIO\ Feature\ PQ6\ Cid=-
790RIF.RIFAWARE.GPIO\ Feature\ PQ6\ Secure=false
791RIF.RIFAWARE.GPIO\ Feature\ PQ7\ Cid=-
792RIF.RIFAWARE.GPIO\ Feature\ PQ7\ Secure=false
793RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 0\ Cid=-
794RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 0\ Privilege=true
795RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 0\ Secure=false
796RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 1\ Cid=-
797RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 1\ Privilege=true
798RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 1\ Secure=false
799RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 10\ Cid=-
800RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 10\ Privilege=true
801RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 10\ Secure=false
802RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 11\ Cid=-
803RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 11\ Privilege=true
804RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 11\ Secure=false
805RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 12\ Cid=-
806RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 12\ Privilege=true
807RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 12\ Secure=false
808RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 13\ Cid=-
809RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 13\ Privilege=true
810RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 13\ Secure=false
811RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 14\ Cid=-
812RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 14\ Privilege=true
813RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 14\ Secure=false
814RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 15\ Cid=-
815RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 15\ Privilege=true
816RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 15\ Secure=false
817RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 2\ Cid=-
818RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 2\ Privilege=true
819RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 2\ Secure=false
820RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 3\ Cid=-
821RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 3\ Privilege=true
822RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 3\ Secure=false
823RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 4\ Cid=-
824RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 4\ Privilege=true
825RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 4\ Secure=false
826RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 5\ Cid=-
827RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 5\ Privilege=true
828RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 5\ Secure=false
829RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 6\ Cid=-
830RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 6\ Privilege=true
831RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 6\ Secure=false
832RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 7\ Cid=-
833RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 7\ Privilege=true
834RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 7\ Secure=false
835RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 8\ Cid=-
836RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 8\ Privilege=true
837RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 8\ Secure=false
838RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 9\ Cid=-
839RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 9\ Privilege=true
840RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 9\ Secure=false
841RIF.RIFAWARE.LTDC\ Feature\ LTDC_L1\ Cid=-
842RIF.RIFAWARE.LTDC\ Feature\ LTDC_L1\ Secure=false
843RIF.RIFAWARE.LTDC\ Feature\ LTDC_L2\ Cid=-
844RIF.RIFAWARE.LTDC\ Feature\ LTDC_L2\ Secure=false
845RIF.RIFAWARE.PWR\ Feature\ Backup\ domain\ protection\ Cid=-
846RIF.RIFAWARE.PWR\ Feature\ Backup\ domain\ protection\ Secure=false
847RIF.RIFAWARE.PWR\ Feature\ CPU\ power\ control\ protection\ Cid=-
848RIF.RIFAWARE.PWR\ Feature\ CPU\ power\ control\ protection\ Secure=false
849RIF.RIFAWARE.PWR\ Feature\ I-TCM,\ D-TCM,\ and\ I-TCM\ FLEXMEM\ low\ power\ control\ protection\ Cid=-
850RIF.RIFAWARE.PWR\ Feature\ I-TCM,\ D-TCM,\ and\ I-TCM\ FLEXMEM\ low\ power\ control\ protection\ Secure=false
851RIF.RIFAWARE.PWR\ Feature\ Peripheral\ voltage\ monitor\ protection\ Cid=-
852RIF.RIFAWARE.PWR\ Feature\ Peripheral\ voltage\ monitor\ protection\ Secure=false
853RIF.RIFAWARE.PWR\ Feature\ Programmable\ voltage\ detector\ protection\ Cid=-
854RIF.RIFAWARE.PWR\ Feature\ Programmable\ voltage\ detector\ protection\ Secure=false
855RIF.RIFAWARE.PWR\ Feature\ System\ supply\ configuration\ protection\ Cid=-
856RIF.RIFAWARE.PWR\ Feature\ System\ supply\ configuration\ protection\ Secure=false
857RIF.RIFAWARE.PWR\ Feature\ VDDCORE\ monitor\ protection\ Cid=-
858RIF.RIFAWARE.PWR\ Feature\ VDDCORE\ monitor\ protection\ Secure=false
859RIF.RIFAWARE.PWR\ Feature\ Voltage\ scaling\ selection\ protection\ Cid=-
860RIF.RIFAWARE.PWR\ Feature\ Voltage\ scaling\ selection\ protection\ Secure=false
861RIF.RIFAWARE.PWR\ Feature\ WKUP1\ pin\ protection\ Cid=-
862RIF.RIFAWARE.PWR\ Feature\ WKUP1\ pin\ protection\ Secure=false
863RIF.RIFAWARE.PWR\ Feature\ WKUP2\ pin\ protection\ Cid=-
864RIF.RIFAWARE.PWR\ Feature\ WKUP2\ pin\ protection\ Secure=false
865RIF.RIFAWARE.PWR\ Feature\ WKUP3\ pin\ protection\ Cid=-
866RIF.RIFAWARE.PWR\ Feature\ WKUP3\ pin\ protection\ Secure=false
867RIF.RIFAWARE.PWR\ Feature\ WKUP4\ pin\ protection\ Cid=-
868RIF.RIFAWARE.PWR\ Feature\ WKUP4\ pin\ protection\ Secure=false
869RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ BUS\ system\ configuration\ bits\ Cid=-
870RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ BUS\ system\ configuration\ bits\ Secure=false
871RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ DFT\ system\ configuration\ bits\ Cid=-
872RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ DFT\ system\ configuration\ bits\ Secure=false
873RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC1\ divider\ configuration\ bits\ Cid=-
874RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC1\ divider\ configuration\ bits\ Secure=false
875RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC10\ divider\ configuration\ bits\ Cid=-
876RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC10\ divider\ configuration\ bits\ Secure=false
877RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC11\ divider\ configuration\ bits\ Cid=-
878RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC11\ divider\ configuration\ bits\ Secure=false
879RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC12\ divider\ configuration\ bits\ Cid=-
880RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC12\ divider\ configuration\ bits\ Secure=false
881RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC13\ divider\ configuration\ bits\ Cid=-
882RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC13\ divider\ configuration\ bits\ Secure=false
883RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC14\ divider\ configuration\ bits\ Cid=-
884RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC14\ divider\ configuration\ bits\ Secure=false
885RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC15\ divider\ configuration\ bits\ Cid=-
886RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC15\ divider\ configuration\ bits\ Secure=false
887RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC16\ divider\ configuration\ bits\ Cid=-
888RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC16\ divider\ configuration\ bits\ Secure=false
889RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC17\ divider\ configuration\ bits\ Cid=-
890RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC17\ divider\ configuration\ bits\ Secure=false
891RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC18\ divider\ configuration\ bits\ Cid=-
892RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC18\ divider\ configuration\ bits\ Secure=false
893RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC19\ divider\ configuration\ bits\ Cid=-
894RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC19\ divider\ configuration\ bits\ Secure=false
895RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC2\ divider\ configuration\ bits\ Cid=-
896RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC2\ divider\ configuration\ bits\ Secure=false
897RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC20\ divider\ configuration\ bits\ Cid=-
898RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC20\ divider\ configuration\ bits\ Secure=false
899RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC3\ divider\ configuration\ bits\ Cid=-
900RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC3\ divider\ configuration\ bits\ Secure=false
901RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC4\ divider\ configuration\ bits\ Cid=-
902RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC4\ divider\ configuration\ bits\ Secure=false
903RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC5\ divider\ configuration\ bits\ Cid=-
904RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC5\ divider\ configuration\ bits\ Secure=false
905RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC6\ divider\ configuration\ bits\ Cid=-
906RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC6\ divider\ configuration\ bits\ Secure=false
907RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC7\ divider\ configuration\ bits\ Cid=-
908RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC7\ divider\ configuration\ bits\ Secure=false
909RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC8\ divider\ configuration\ bits\ Cid=-
910RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC8\ divider\ configuration\ bits\ Secure=false
911RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC9\ divider\ configuration\ bits\ Cid=-
912RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC9\ divider\ configuration\ bits\ Secure=false
913RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ INT\ system\ configuration\ bits\ Cid=-
914RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ INT\ system\ configuration\ bits\ Secure=false
915RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ MOD\ system\ configuration\ bits\ Cid=-
916RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ MOD\ system\ configuration\ bits\ Secure=false
917RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ PER\ system\ configuration\ bits\ Cid=-
918RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ PER\ system\ configuration\ bits\ Secure=false
919RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ PLL1\ configuration\ bits\u200B\ Cid=-
920RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ PLL1\ configuration\ bits\u200B\ Secure=false
921RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ PLL2\ configuration\ bits\ Cid=-
922RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ PLL2\ configuration\ bits\ Secure=false
923RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ PLL3\ configuration\ bits\ Cid=-
924RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ PLL3\ configuration\ bits\ Secure=false
925RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ PLL4\ configuration\ bits\ Cid=-
926RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ PLL4\ configuration\ bits\ Secure=false
927RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ RST\ system\ configuration\ bits\ Cid=-
928RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ RST\ system\ configuration\ bits\ Secure=false
929RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ SYS\ system\ configuration\ bit\ Cid=-
930RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ SYS\ system\ configuration\ bit\ Secure=false
931RIF.RIFAWARE.RCC\ Feature\ protection\ of\ ACLKN\ bus\ configuration\ bits\ Cid=-
932RIF.RIFAWARE.RCC\ Feature\ protection\ of\ ACLKN\ bus\ configuration\ bits\ Secure=false
933RIF.RIFAWARE.RCC\ Feature\ protection\ of\ ACLKNC\ bus\ configuration\ bits\ Cid=-
934RIF.RIFAWARE.RCC\ Feature\ protection\ of\ ACLKNC\ bus\ configuration\ bits\ Secure=false
935RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHB1\ bus\ configuration\ bits\ Cid=-
936RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHB1\ bus\ configuration\ bits\ Secure=false
937RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHB2\ bus\ configuration\ bits\ Cid=-
938RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHB2\ bus\ configuration\ bits\ Secure=false
939RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHB3\ bus\ configuration\ bits\ Cid=-
940RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHB3\ bus\ configuration\ bits\ Secure=false
941RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHB4\ bus\ configuration\ bits\ Cid=-
942RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHB4\ bus\ configuration\ bits\ Secure=false
943RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHB5\ bus\ configuration\ bits\ Cid=-
944RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHB5\ bus\ configuration\ bits\ Secure=false
945RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHBM\ bus\ configuration\ bits\ Cid=-
946RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHBM\ bus\ configuration\ bits\ Secure=false
947RIF.RIFAWARE.RCC\ Feature\ protection\ of\ APB1\ bus\ configuration\ bits\ Cid=-
948RIF.RIFAWARE.RCC\ Feature\ protection\ of\ APB1\ bus\ configuration\ bits\ Secure=false
949RIF.RIFAWARE.RCC\ Feature\ protection\ of\ APB2\ bus\ configuration\ bits\ Cid=-
950RIF.RIFAWARE.RCC\ Feature\ protection\ of\ APB2\ bus\ configuration\ bits\ Secure=false
951RIF.RIFAWARE.RCC\ Feature\ protection\ of\ APB3\ bus\ configuration\ bits\ Cid=-
952RIF.RIFAWARE.RCC\ Feature\ protection\ of\ APB3\ bus\ configuration\ bits\ Secure=false
953RIF.RIFAWARE.RCC\ Feature\ protection\ of\ APB4\ bus\ configuration\ bits\ Cid=-
954RIF.RIFAWARE.RCC\ Feature\ protection\ of\ APB4\ bus\ configuration\ bits\ Secure=false
955RIF.RIFAWARE.RCC\ Feature\ protection\ of\ APB5\ bus\ configuration\ bits\ Cid=-
956RIF.RIFAWARE.RCC\ Feature\ protection\ of\ APB5\ bus\ configuration\ bits\ Secure=false
957RIF.RIFAWARE.RCC\ Feature\ protection\ of\ NOC\ bus\ configuration\ bits\ Cid=-
958RIF.RIFAWARE.RCC\ Feature\ protection\ of\ NOC\ bus\ configuration\ bits\ Secure=false
959RIF.RIFAWARE.RTC\ Feature\ Alarm\ A\ and\ SSR\ underflow\ protection\u200B\ Cid=-
960RIF.RIFAWARE.RTC\ Feature\ Alarm\ A\ and\ SSR\ underflow\ protection\u200B\ Secure=false
961RIF.RIFAWARE.RTC\ Feature\ Alarm\ B\ protection\ Cid=-
962RIF.RIFAWARE.RTC\ Feature\ Alarm\ B\ protection\ Secure=false
963RIF.RIFAWARE.RTC\ Feature\ Initialization\ protection\ Cid=-
964RIF.RIFAWARE.RTC\ Feature\ Initialization\ protection\ Secure=false
965RIF.RIFAWARE.RTC\ Feature\ RTC\ global\ protection\ Cid=-
966RIF.RIFAWARE.RTC\ Feature\ RTC\ global\ protection\ Secure=false
967RIF.RIFAWARE.RTC\ Feature\ Shift\ register,\ daylight\ saving,\ calibration\ and\ reference\ clock\ protection\ Cid=-
968RIF.RIFAWARE.RTC\ Feature\ Shift\ register,\ daylight\ saving,\ calibration\ and\ reference\ clock\ protection\ Secure=false
969RIF.RIFAWARE.RTC\ Feature\ Timestamp\ protection\ Cid=-
970RIF.RIFAWARE.RTC\ Feature\ Timestamp\ protection\ Secure=false
971RIF.RIFAWARE.RTC\ Feature\ Wake-up\ timer\ protection\ Cid=-
972RIF.RIFAWARE.RTC\ Feature\ Wake-up\ timer\ protection\ Secure=false
[37]973RIF.RISUP.SDMMC2.Privilege=true
[16]974RIF.SDMMC1_CID_RIMU=0
[37]975RIF.SDMMC2_CID_RIMU=1
[16]976RIF.VENC_CID_RIMU=0
977RIF.default_config=false
[37]978SDMMC2.ClockDiv=2
979SDMMC2.IPParameters=ClockDiv
[18]980VP_BSEC_VS_BSEC.Mode=BSEC_Activate
981VP_BSEC_VS_BSEC.Signal=BSEC_VS_BSEC
982VP_EXTMEM_MANAGER_SIG_Activate_EXTMEM.Mode=Activate_EXTMEM
983VP_EXTMEM_MANAGER_SIG_Activate_EXTMEM.Signal=EXTMEM_MANAGER_SIG_Activate_EXTMEM
[27]984VP_RAMCFG_VS_AHBSRAM1.Mode=AHBSRAMCFG1_Activate
985VP_RAMCFG_VS_AHBSRAM1.Signal=RAMCFG_VS_AHBSRAM1
986VP_RAMCFG_VS_AHBSRAM2.Mode=AHBSRAMCFG2_Activate
987VP_RAMCFG_VS_AHBSRAM2.Signal=RAMCFG_VS_AHBSRAM2
988VP_RAMCFG_VS_BKPRAM.Mode=BKPRAM_Activate
989VP_RAMCFG_VS_BKPRAM.Signal=RAMCFG_VS_BKPRAM
990VP_RAMCFG_VS_FLEXRAM.Mode=FLEXRAM_Activate
991VP_RAMCFG_VS_FLEXRAM.Signal=RAMCFG_VS_FLEXRAM
992VP_RAMCFG_VS_RAMCFG1.Mode=RAMCFG1_Activate
993VP_RAMCFG_VS_RAMCFG1.Signal=RAMCFG_VS_RAMCFG1
994VP_RAMCFG_VS_RAMCFG2.Mode=RAMCFG2_Activate
995VP_RAMCFG_VS_RAMCFG2.Signal=RAMCFG_VS_RAMCFG2
996VP_RAMCFG_VS_RAMCFG3.Mode=RAMCFG3_Activate
997VP_RAMCFG_VS_RAMCFG3.Signal=RAMCFG_VS_RAMCFG3
998VP_RAMCFG_VS_RAMCFG4.Mode=RAMCFG4_Activate
999VP_RAMCFG_VS_RAMCFG4.Signal=RAMCFG_VS_RAMCFG4
1000VP_RAMCFG_VS_RAMCFG5.Mode=RAMCFG5_Activate
1001VP_RAMCFG_VS_RAMCFG5.Signal=RAMCFG_VS_RAMCFG5
1002VP_RAMCFG_VS_RAMCFG6.Mode=RAMCFG6_Activate
1003VP_RAMCFG_VS_RAMCFG6.Signal=RAMCFG_VS_RAMCFG6
1004VP_RAMCFG_VS_VENCRAM.Mode=VENCRAM_Activate
1005VP_RAMCFG_VS_VENCRAM.Signal=RAMCFG_VS_VENCRAM
[16]1006VP_RIF_VS_RIF1.Mode=RISUP
1007VP_RIF_VS_RIF1.Signal=RIF_VS_RIF1
[36]1008VP_SYS_S_VS_tim18.Mode=TIM18
1009VP_SYS_S_VS_tim18.Signal=SYS_S_VS_tim18
[16]1010VP_XSPI2_VS_octo.Mode=octo_mode
1011VP_XSPI2_VS_octo.Signal=XSPI2_VS_octo
1012VP_XSPIM_VS_IO.Mode=Direct
1013VP_XSPIM_VS_IO.Signal=XSPIM_VS_IO
1014XSPI2.ChipSelectHighTimeCycle=2
1015XSPI2.ClockPrescaler=0
1016XSPI2.DelayHoldQuarterCycle=HAL_XSPI_DHQC_ENABLE
1017XSPI2.FifoThresholdByte=4
1018XSPI2.IPParameters=FifoThresholdByte,MemoryType,MemorySize,ClockPrescaler,DelayHoldQuarterCycle,MemoryMode,ChipSelectHighTimeCycle
1019XSPI2.MemoryMode=HAL_XSPI_SINGLE_MEM
1020XSPI2.MemorySize=HAL_XSPI_SIZE_512MB
1021XSPI2.MemoryType=HAL_XSPI_MEMTYPE_MACRONIX
1022board=custom
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