Changeset 28 for trunk/firmware/FSBL/CubeMX/blto2_FSBL.ioc
- Timestamp:
- Oct 14, 2026, 8:59:26 AM (3 weeks ago)
- File:
-
- 1 edited
-
trunk/firmware/FSBL/CubeMX/blto2_FSBL.ioc (modified) (9 diffs)
Legend:
- Unmodified
- Added
- Removed
-
trunk/firmware/FSBL/CubeMX/blto2_FSBL.ioc
r27 r28 22 22 ExtMemLoader.IPs=EXTMEM_LOADER,EXTMEM_MANAGER,RCC\:I,GPIO,TIM6 23 23 FSBL.IPs=CORTEX_M55_FSBL,GPDMA1\:I,HDP,HPDMA1\:I,LINKEDLIST,RCC,GPIO\:I,NVIC\:I,XSPIM,XSPI2,EXTMEM_MANAGER,BSEC,DEBUG,RAMCFG 24 FSBL.Pins=P B12,PG024 FSBL.Pins=PO1,PB12 25 25 File.Version=6 26 26 GPIO.groupedBy=Group By Peripherals … … 48 48 Mcu.Name=STM32N657X0HxQ 49 49 Mcu.Package=VFBGA264 50 Mcu.Pin0=P N451 Mcu.Pin1=PN 650 Mcu.Pin0=PO1 51 Mcu.Pin1=PN4 52 52 Mcu.Pin10=PN9 53 53 Mcu.Pin11=PN2 … … 60 60 Mcu.Pin18=VP_RAMCFG_VS_RAMCFG1 61 61 Mcu.Pin19=VP_RAMCFG_VS_RAMCFG2 62 Mcu.Pin2=PN 862 Mcu.Pin2=PN6 63 63 Mcu.Pin20=VP_RAMCFG_VS_RAMCFG3 64 64 Mcu.Pin21=VP_RAMCFG_VS_RAMCFG4 … … 71 71 Mcu.Pin28=VP_RAMCFG_VS_VENCRAM 72 72 Mcu.Pin29=VP_RIF_VS_RIF1 73 Mcu.Pin3=PN 073 Mcu.Pin3=PN8 74 74 Mcu.Pin30=VP_XSPI2_VS_octo 75 75 Mcu.Pin31=VP_XSPIM_VS_IO 76 Mcu.Pin4=P B1277 Mcu.Pin5=P G076 Mcu.Pin4=PN0 77 Mcu.Pin5=PB12 78 78 Mcu.Pin6=PN3 79 79 Mcu.Pin7=PN5 … … 146 146 PCC.Temperature=25 147 147 PCC.Vdd=1.8 148 PG0.ContextOwner=FSBL149 PG0.GPIOParameters=GPIO_Label,PinAttribute150 PG0.GPIO_Label=GREEN_LED151 PG0.Locked=true152 PG0.PinAttribute=FSBL153 PG0.Signal=GPIO_Output154 148 PN0.GPIOParameters=PinAttribute 155 149 PN0.Mode=XSPI2_Port2Octo … … 196 190 PN9.PinAttribute=FSBL 197 191 PN9.Signal=XSPIM_P2_IO5 192 PO1.ContextOwner=FSBL 193 PO1.GPIOParameters=GPIO_Label,PinAttribute 194 PO1.GPIO_Label=LED_GREEN 195 PO1.Locked=true 196 PO1.PinAttribute=FSBL 197 PO1.Signal=GPIO_Output 198 198 PinOutPanel.CurrentBGAView=Top 199 199 PinOutPanel.RotationAngle=0 … … 232 232 ProjectManager.UAScriptBeforePath= 233 233 ProjectManager.UnderRoot=false 234 ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false-FSBL,2-MX_GPIO_Init-GPIO-false-HAL-true-FSBL,3-MX_XSPI2_Init-XSPI2-false-HAL-true-FSBL,false-4-MX_XSPIM_Init-XSPIM-false-HAL-true-FSBL,5-MX_BSEC_Init-BSEC-false-HAL-true-FSBL,6-MX_ EXTMEM_MANAGER_Init-EXTMEM_MANAGER-false-HAL-false-FSBL,1-SystemIsolation_Config-RIF-false-HAL-true-Appli,0-MX_CORTEX_M55_FSBL_Init-CORTEX_M55_FSBL-false-HAL-true-FSBL,0-MX_CORTEX_M55_S_Init-CORTEX_M55_S-false-HAL-true-Appli,1-MX_EXTMEM_MANAGER_Init-EXTMEM_MANAGER-false-HAL-false-ExtMemLoader234 ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false-FSBL,2-MX_GPIO_Init-GPIO-false-HAL-true-FSBL,3-MX_XSPI2_Init-XSPI2-false-HAL-true-FSBL,false-4-MX_XSPIM_Init-XSPIM-false-HAL-true-FSBL,5-MX_BSEC_Init-BSEC-false-HAL-true-FSBL,6-MX_RAMCFG_Init-RAMCFG-false-HAL-true-FSBL,7-MX_EXTMEM_MANAGER_Init-EXTMEM_MANAGER-false-HAL-false-FSBL,1-SystemIsolation_Config-RIF-false-HAL-true-Appli,0-MX_CORTEX_M55_FSBL_Init-CORTEX_M55_FSBL-false-HAL-true-FSBL,0-MX_CORTEX_M55_S_Init-CORTEX_M55_S-false-HAL-true-Appli,1-MX_EXTMEM_MANAGER_Init-EXTMEM_MANAGER-false-HAL-false-ExtMemLoader 235 235 RAMCFG.IPParameters=Instance-RAMCFG1_Activate,Instance-RAMCFG2_Activate,Instance-RAMCFG3_Activate,Instance-RAMCFG4_Activate,Instance-RAMCFG5_Activate,Instance-RAMCFG6_Activate,Instance-AHBSRAMCFG1_Activate,Instance-AHBSRAMCFG2_Activate,Instance-BKPRAM_Activate,Instance-FLEXRAM_Activate,Instance-VENCRAM_Activate,SYSCFG_ITCM_size 236 236 RAMCFG.Instance-AHBSRAMCFG1_Activate=RAMCFG_SRAM1_AHB … … 600 600 RIF.RIFAWARE.GPIO\ Feature\ PF9\ Cid=- 601 601 RIF.RIFAWARE.GPIO\ Feature\ PF9\ Secure=false 602 RIF.RIFAWARE.GPIO\ Feature\ PG0\ Cid=1 603 RIF.RIFAWARE.GPIO\ Feature\ PG0\ FSBL=true 604 RIF.RIFAWARE.GPIO\ Feature\ PG0\ Secure=true 602 RIF.RIFAWARE.GPIO\ Feature\ PG0\ Cid=- 603 RIF.RIFAWARE.GPIO\ Feature\ PG0\ Secure=false 605 604 RIF.RIFAWARE.GPIO\ Feature\ PG1\ Cid=- 606 605 RIF.RIFAWARE.GPIO\ Feature\ PG1\ Secure=false … … 677 676 RIF.RIFAWARE.GPIO\ Feature\ PO0\ Cid=- 678 677 RIF.RIFAWARE.GPIO\ Feature\ PO0\ Secure=false 679 RIF.RIFAWARE.GPIO\ Feature\ PO1\ Cid=- 680 RIF.RIFAWARE.GPIO\ Feature\ PO1\ Secure=false 678 RIF.RIFAWARE.GPIO\ Feature\ PO1\ Cid=1 679 RIF.RIFAWARE.GPIO\ Feature\ PO1\ FSBL=true 680 RIF.RIFAWARE.GPIO\ Feature\ PO1\ Secure=true 681 681 RIF.RIFAWARE.GPIO\ Feature\ PO2\ Cid=- 682 682 RIF.RIFAWARE.GPIO\ Feature\ PO2\ Secure=false
Note:
See TracChangeset
for help on using the changeset viewer.
