Ignore:
Timestamp:
Oct 20, 2026, 4:55:20 PM (2 weeks ago)
Author:
Zed
Message:

This commit contains a working example of SDMMC interface initialization.
To be removed from FSBL and put into main App.

File:
1 edited

Legend:

Unmodified
Added
Removed

  • trunk/firmware/FSBL/CubeMX/blto2_FSBL.ioc

    r36 r37  
    11#MicroXplorer Configuration settings - do not modify
    2 Appli.IPs=CORTEX_M55_S,GPDMA1,HPDMA1,LINKEDLIST,RCC,GPIO,NVIC1\:I,RIF,SAU
     2Appli.IPs=CORTEX_M55_S,GPDMA1,HPDMA1,LINKEDLIST,RCC,GPIO,NVIC1\:I,SAU
    33CAD.formats=
    44CAD.pinconfig=
    … …  
    2121EXTMEM_MANAGER.RefParam_XIP_ApplicationOffset=0x80000
    2222ExtMemLoader.IPs=EXTMEM_LOADER,EXTMEM_MANAGER,RCC\:I,GPIO,TIM6
    23 FSBL.IPs=CORTEX_M55_FSBL,GPDMA1\:I,HDP,HPDMA1\:I,LINKEDLIST,RCC,GPIO\:I,NVIC\:I,XSPIM,XSPI2,EXTMEM_MANAGER,BSEC,DEBUG,RAMCFG,SYS_S\:I,TIM18
     23FSBL.IPs=CORTEX_M55_FSBL,GPDMA1\:I,HDP,HPDMA1\:I,LINKEDLIST,RCC,GPIO\:I,NVIC\:I,XSPIM,XSPI2,EXTMEM_MANAGER,BSEC,DEBUG,RAMCFG,SYS_S\:I,TIM18,SDMMC2,RIF
    2424FSBL.Pins=PO1,PB12
    2525File.Version=6
    … …  
    3535Mcu.IP0=BSEC
    3636Mcu.IP1=CORTEX_M55_FSBL
    37 Mcu.IP10=SYS_S
    38 Mcu.IP11=XSPI2
    39 Mcu.IP12=XSPIM
     37Mcu.IP10=SDMMC2
     38Mcu.IP11=SYS_S
     39Mcu.IP12=XSPI2
     40Mcu.IP13=XSPIM
    4041Mcu.IP2=CORTEX_M55_S
    4142Mcu.IP3=DEBUG
    … …  
    4647Mcu.IP8=RCC
    4748Mcu.IP9=RIF
    48 Mcu.IPNb=13
     49Mcu.IPNb=14
    4950Mcu.Name=STM32N657X0HxQ
    5051Mcu.Package=VFBGA264
    51 Mcu.Pin0=PO1
    52 Mcu.Pin1=PN4
    53 Mcu.Pin10=PN9
    54 Mcu.Pin11=PN2
    55 Mcu.Pin12=PA13(JTMS/SWDIO)
    56 Mcu.Pin13=PB5(JTDO/TRACESWO)
    57 Mcu.Pin14=PN10
    58 Mcu.Pin15=PN11
    59 Mcu.Pin16=VP_BSEC_VS_BSEC
    60 Mcu.Pin17=VP_EXTMEM_MANAGER_SIG_Activate_EXTMEM
    61 Mcu.Pin18=VP_RAMCFG_VS_RAMCFG1
    62 Mcu.Pin19=VP_RAMCFG_VS_RAMCFG2
    63 Mcu.Pin2=PN6
    64 Mcu.Pin20=VP_RAMCFG_VS_RAMCFG3
    65 Mcu.Pin21=VP_RAMCFG_VS_RAMCFG4
    66 Mcu.Pin22=VP_RAMCFG_VS_RAMCFG5
    67 Mcu.Pin23=VP_RAMCFG_VS_RAMCFG6
    68 Mcu.Pin24=VP_RAMCFG_VS_AHBSRAM1
    69 Mcu.Pin25=VP_RAMCFG_VS_AHBSRAM2
    70 Mcu.Pin26=VP_RAMCFG_VS_BKPRAM
    71 Mcu.Pin27=VP_RAMCFG_VS_FLEXRAM
    72 Mcu.Pin28=VP_RAMCFG_VS_VENCRAM
    73 Mcu.Pin29=VP_RIF_VS_RIF1
    74 Mcu.Pin3=PN8
    75 Mcu.Pin30=VP_SYS_S_VS_tim18
    76 Mcu.Pin31=VP_XSPI2_VS_octo
    77 Mcu.Pin32=VP_XSPIM_VS_IO
    78 Mcu.Pin4=PN0
    79 Mcu.Pin5=PB12
    80 Mcu.Pin6=PN3
    81 Mcu.Pin7=PN5
    82 Mcu.Pin8=PN1
    83 Mcu.Pin9=PA14(JTCK/SWCLK)
    84 Mcu.PinsNb=33
     52Mcu.Pin0=PC4
     53Mcu.Pin1=PC5
     54Mcu.Pin10=PN0
     55Mcu.Pin11=PB12
     56Mcu.Pin12=PN3
     57Mcu.Pin13=PN5
     58Mcu.Pin14=PN1
     59Mcu.Pin15=PA14(JTCK/SWCLK)
     60Mcu.Pin16=PN9
     61Mcu.Pin17=PN2
     62Mcu.Pin18=PA13(JTMS/SWDIO)
     63Mcu.Pin19=PB5(JTDO/TRACESWO)
     64Mcu.Pin2=PC0
     65Mcu.Pin20=PN10
     66Mcu.Pin21=PN11
     67Mcu.Pin22=VP_BSEC_VS_BSEC
     68Mcu.Pin23=VP_EXTMEM_MANAGER_SIG_Activate_EXTMEM
     69Mcu.Pin24=VP_RAMCFG_VS_RAMCFG1
     70Mcu.Pin25=VP_RAMCFG_VS_RAMCFG2
     71Mcu.Pin26=VP_RAMCFG_VS_RAMCFG3
     72Mcu.Pin27=VP_RAMCFG_VS_RAMCFG4
     73Mcu.Pin28=VP_RAMCFG_VS_RAMCFG5
     74Mcu.Pin29=VP_RAMCFG_VS_RAMCFG6
     75Mcu.Pin3=PC2
     76Mcu.Pin30=VP_RAMCFG_VS_AHBSRAM1
     77Mcu.Pin31=VP_RAMCFG_VS_AHBSRAM2
     78Mcu.Pin32=VP_RAMCFG_VS_BKPRAM
     79Mcu.Pin33=VP_RAMCFG_VS_FLEXRAM
     80Mcu.Pin34=VP_RAMCFG_VS_VENCRAM
     81Mcu.Pin35=VP_RIF_VS_RIF1
     82Mcu.Pin36=VP_SYS_S_VS_tim18
     83Mcu.Pin37=VP_XSPI2_VS_octo
     84Mcu.Pin38=VP_XSPIM_VS_IO
     85Mcu.Pin4=PE4
     86Mcu.Pin5=PC3
     87Mcu.Pin6=PO1
     88Mcu.Pin7=PN4
     89Mcu.Pin8=PN6
     90Mcu.Pin9=PN8
     91Mcu.PinsNb=39
    8592Mcu.ThirdPartyNb=0
    8693Mcu.UserConstants=
    … …  
    98105NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
    99106NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
     107NVIC.SDMMC2_IRQn=true\:5\:0\:true\:false\:true\:true\:true\:true
    100108NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
    101109NVIC.SecureFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
    … …  
    140148PB5(JTDO/TRACESWO).PinAttribute=FSBL
    141149PB5(JTDO/TRACESWO).Signal=DEBUG_JTDO-SWO
     150PC0.GPIOParameters=GPIO_PuPd,GPIO_Speed_Medium_Default,PinAttribute
     151PC0.GPIO_PuPd=GPIO_PULLUP
     152PC0.GPIO_Speed_Medium_Default=GPIO_SPEED_FREQ_VERY_HIGH
     153PC0.Mode=SD_4_bits_Wide_bus
     154PC0.PinAttribute=FSBL
     155PC0.Signal=SDMMC2_D2
     156PC2.GPIOParameters=PinAttribute,GPIO_PuPd,GPIO_Speed_Medium_Default
     157PC2.GPIO_PuPd=GPIO_PULLUP
     158PC2.GPIO_Speed_Medium_Default=GPIO_SPEED_FREQ_VERY_HIGH
     159PC2.Locked=true
     160PC2.Mode=SD_4_bits_Wide_bus
     161PC2.PinAttribute=FSBL
     162PC2.Signal=SDMMC2_CK
     163PC3.GPIOParameters=GPIO_PuPd,GPIO_Speed_Medium_Default,PinAttribute
     164PC3.GPIO_PuPd=GPIO_PULLUP
     165PC3.GPIO_Speed_Medium_Default=GPIO_SPEED_FREQ_VERY_HIGH
     166PC3.Mode=SD_4_bits_Wide_bus
     167PC3.PinAttribute=FSBL
     168PC3.Signal=SDMMC2_CMD
     169PC4.GPIOParameters=GPIO_PuPd,GPIO_Speed_Medium_Default,PinAttribute
     170PC4.GPIO_PuPd=GPIO_PULLUP
     171PC4.GPIO_Speed_Medium_Default=GPIO_SPEED_FREQ_VERY_HIGH
     172PC4.Mode=SD_4_bits_Wide_bus
     173PC4.PinAttribute=FSBL
     174PC4.Signal=SDMMC2_D0
     175PC5.GPIOParameters=GPIO_PuPd,GPIO_Speed_Medium_Default,PinAttribute
     176PC5.GPIO_PuPd=GPIO_PULLUP
     177PC5.GPIO_Speed_Medium_Default=GPIO_SPEED_FREQ_VERY_HIGH
     178PC5.Mode=SD_4_bits_Wide_bus
     179PC5.PinAttribute=FSBL
     180PC5.Signal=SDMMC2_D1
    142181PCC.Bar.Display=Horizontal Bar
    143182PCC.Checker=false
    … …  
    151190PCC.Temperature=25
    152191PCC.Vdd=1.8
     192PE4.GPIOParameters=GPIO_PuPd,GPIO_Speed_Medium_Default,PinAttribute
     193PE4.GPIO_PuPd=GPIO_PULLUP
     194PE4.GPIO_Speed_Medium_Default=GPIO_SPEED_FREQ_VERY_HIGH
     195PE4.Mode=SD_4_bits_Wide_bus
     196PE4.PinAttribute=FSBL
     197PE4.Signal=SDMMC2_D3
    153198PN0.GPIOParameters=PinAttribute
    154199PN0.Mode=XSPI2_Port2Octo
    … …  
    237282ProjectManager.UAScriptBeforePath=
    238283ProjectManager.UnderRoot=false
    239 ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false-FSBL,2-MX_GPIO_Init-GPIO-false-HAL-true-FSBL,3-MX_XSPI2_Init-XSPI2-false-HAL-true-FSBL,false-4-MX_XSPIM_Init-XSPIM-false-HAL-true-FSBL,5-MX_BSEC_Init-BSEC-false-HAL-true-FSBL,6-MX_RAMCFG_Init-RAMCFG-false-HAL-true-FSBL,7-MX_EXTMEM_MANAGER_Init-EXTMEM_MANAGER-false-HAL-false-FSBL,1-SystemIsolation_Config-RIF-false-HAL-true-Appli,0-MX_CORTEX_M55_FSBL_Init-CORTEX_M55_FSBL-false-HAL-true-FSBL,0-MX_CORTEX_M55_S_Init-CORTEX_M55_S-false-HAL-true-Appli,1-MX_EXTMEM_MANAGER_Init-EXTMEM_MANAGER-false-HAL-false-ExtMemLoader
     284ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false-FSBL,2-MX_GPIO_Init-GPIO-false-HAL-true-FSBL,3-MX_XSPI2_Init-XSPI2-false-HAL-true-FSBL,false-4-MX_XSPIM_Init-XSPIM-false-HAL-true-FSBL,5-MX_BSEC_Init-BSEC-false-HAL-true-FSBL,6-MX_RAMCFG_Init-RAMCFG-false-HAL-true-FSBL,7-MX_SDMMC2_SD_Init-SDMMC2-false-HAL-true-FSBL,9-SystemIsolation_Config-RIF-false-HAL-true-FSBL,10-MX_EXTMEM_MANAGER_Init-EXTMEM_MANAGER-false-HAL-false-FSBL,0-MX_CORTEX_M55_FSBL_Init-CORTEX_M55_FSBL-false-HAL-true-FSBL,0-MX_CORTEX_M55_S_Init-CORTEX_M55_S-false-HAL-true-Appli,1-MX_EXTMEM_MANAGER_Init-EXTMEM_MANAGER-false-HAL-false-ExtMemLoader
    240285RAMCFG.IPParameters=Instance-RAMCFG1_Activate,Instance-RAMCFG2_Activate,Instance-RAMCFG3_Activate,Instance-RAMCFG4_Activate,Instance-RAMCFG5_Activate,Instance-RAMCFG6_Activate,Instance-AHBSRAMCFG1_Activate,Instance-AHBSRAMCFG2_Activate,Instance-BKPRAM_Activate,Instance-FLEXRAM_Activate,Instance-VENCRAM_Activate,SYSCFG_ITCM_size
    241286RAMCFG.Instance-AHBSRAMCFG1_Activate=RAMCFG_SRAM1_AHB
    … …  
    373418RIF.ETR_CID_RIMU=0
    374419RIF.GPU_CID_RIMU=0
    375 RIF.IPParameters=ETR_CID_RIMU,SDMMC1_CID_RIMU,SDMMC2_CID_RIMU,OTG1_CID_RIMU,OTG2_CID_RIMU,ETH1_CID_RIMU,GPU_CID_RIMU,DMA2D_CID_RIMU,DCMIPP_CID_RIMU,VENC_CID_RIMU,LTDC_L1_CID_RIMU,LTDC_L2_CID_RIMU
     420RIF.IPParameters=ETR_CID_RIMU,SDMMC1_CID_RIMU,SDMMC2_CID_RIMU,OTG1_CID_RIMU,OTG2_CID_RIMU,ETH1_CID_RIMU,GPU_CID_RIMU,DMA2D_CID_RIMU,DCMIPP_CID_RIMU,LTDC_L1_CID_RIMU,LTDC_L2_CID_RIMU,VENC_CID_RIMU
    376421RIF.LTDC_L1_CID_RIMU=0
    377422RIF.LTDC_L2_CID_RIMU=0
    … …  
    481526RIF.RIFAWARE.GPIO\ Feature\ PB9\ Cid=-
    482527RIF.RIFAWARE.GPIO\ Feature\ PB9\ Secure=false
    483 RIF.RIFAWARE.GPIO\ Feature\ PC0\ Cid=-
    484 RIF.RIFAWARE.GPIO\ Feature\ PC0\ Secure=false
     528RIF.RIFAWARE.GPIO\ Feature\ PC0\ Cid=1
     529RIF.RIFAWARE.GPIO\ Feature\ PC0\ FSBL=true
     530RIF.RIFAWARE.GPIO\ Feature\ PC0\ Secure=true
    485531RIF.RIFAWARE.GPIO\ Feature\ PC1\ Cid=-
    486532RIF.RIFAWARE.GPIO\ Feature\ PC1\ Secure=false
    … …  
    493539RIF.RIFAWARE.GPIO\ Feature\ PC13\ Cid=-
    494540RIF.RIFAWARE.GPIO\ Feature\ PC13\ Secure=false
    495 RIF.RIFAWARE.GPIO\ Feature\ PC2\ Cid=-
    496 RIF.RIFAWARE.GPIO\ Feature\ PC2\ Secure=false
    497 RIF.RIFAWARE.GPIO\ Feature\ PC3\ Cid=-
    498 RIF.RIFAWARE.GPIO\ Feature\ PC3\ Secure=false
    499 RIF.RIFAWARE.GPIO\ Feature\ PC4\ Cid=-
    500 RIF.RIFAWARE.GPIO\ Feature\ PC4\ Secure=false
    501 RIF.RIFAWARE.GPIO\ Feature\ PC5\ Cid=-
    502 RIF.RIFAWARE.GPIO\ Feature\ PC5\ Secure=false
     541RIF.RIFAWARE.GPIO\ Feature\ PC2\ Cid=1
     542RIF.RIFAWARE.GPIO\ Feature\ PC2\ FSBL=true
     543RIF.RIFAWARE.GPIO\ Feature\ PC2\ Secure=true
     544RIF.RIFAWARE.GPIO\ Feature\ PC3\ Cid=1
     545RIF.RIFAWARE.GPIO\ Feature\ PC3\ FSBL=true
     546RIF.RIFAWARE.GPIO\ Feature\ PC3\ Secure=true
     547RIF.RIFAWARE.GPIO\ Feature\ PC4\ Cid=1
     548RIF.RIFAWARE.GPIO\ Feature\ PC4\ FSBL=true
     549RIF.RIFAWARE.GPIO\ Feature\ PC4\ Secure=true
     550RIF.RIFAWARE.GPIO\ Feature\ PC5\ Cid=1
     551RIF.RIFAWARE.GPIO\ Feature\ PC5\ FSBL=true
     552RIF.RIFAWARE.GPIO\ Feature\ PC5\ Secure=true
    503553RIF.RIFAWARE.GPIO\ Feature\ PC6\ Cid=-
    504554RIF.RIFAWARE.GPIO\ Feature\ PC6\ Secure=false
    … …  
    561611RIF.RIFAWARE.GPIO\ Feature\ PE3\ Cid=-
    562612RIF.RIFAWARE.GPIO\ Feature\ PE3\ Secure=false
    563 RIF.RIFAWARE.GPIO\ Feature\ PE4\ Cid=-
    564 RIF.RIFAWARE.GPIO\ Feature\ PE4\ Secure=false
     613RIF.RIFAWARE.GPIO\ Feature\ PE4\ Cid=1
     614RIF.RIFAWARE.GPIO\ Feature\ PE4\ FSBL=true
     615RIF.RIFAWARE.GPIO\ Feature\ PE4\ Secure=true
    565616RIF.RIFAWARE.GPIO\ Feature\ PE5\ Cid=-
    566617RIF.RIFAWARE.GPIO\ Feature\ PE5\ Secure=false
    … …  
    920971RIF.RIFAWARE.RTC\ Feature\ Wake-up\ timer\ protection\ Cid=-
    921972RIF.RIFAWARE.RTC\ Feature\ Wake-up\ timer\ protection\ Secure=false
     973RIF.RISUP.SDMMC2.Privilege=true
    922974RIF.SDMMC1_CID_RIMU=0
    923 RIF.SDMMC2_CID_RIMU=0
     975RIF.SDMMC2_CID_RIMU=1
    924976RIF.VENC_CID_RIMU=0
    925977RIF.default_config=false
     978SDMMC2.ClockDiv=2
     979SDMMC2.IPParameters=ClockDiv
    926980VP_BSEC_VS_BSEC.Mode=BSEC_Activate
    927981VP_BSEC_VS_BSEC.Signal=BSEC_VS_BSEC
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