Ignore:
Timestamp:
Oct 14, 2026, 8:59:26 AM (3 weeks ago)
Author:
Zed
Message:

Green LED GPIO port was changed to PO1.

Location:
trunk/firmware/FSBL/CubeMX
Files:
5 edited

Legend:

Unmodified
Added
Removed
  • trunk/firmware/FSBL/CubeMX/FSBL/Inc/main.h

    r26 r28  
    7979
    8080/* Private defines -----------------------------------------------------------*/
     81#define LED_GREEN_Pin GPIO_PIN_1
     82#define LED_GREEN_GPIO_Port GPIOO
    8183#define EXT_SMPS_Pin GPIO_PIN_12
    8284#define EXT_SMPS_GPIO_Port GPIOB
    83 #define GREEN_LED_Pin GPIO_PIN_0
    84 #define GREEN_LED_GPIO_Port GPIOG
    8585
    8686/* USER CODE BEGIN Private defines */
  • trunk/firmware/FSBL/CubeMX/FSBL/Src/gpio.c

    r25 r28  
    4444
    4545  /* GPIO Ports Clock Enable */
     46  __HAL_RCC_GPIOO_CLK_ENABLE();
    4647  __HAL_RCC_GPION_CLK_ENABLE();
    4748  __HAL_RCC_GPIOB_CLK_ENABLE();
    48   __HAL_RCC_GPIOG_CLK_ENABLE();
    4949  __HAL_RCC_GPIOA_CLK_ENABLE();
     50
     51  /*Configure GPIO pin Output Level */
     52  HAL_GPIO_WritePin(LED_GREEN_GPIO_Port, LED_GREEN_Pin, GPIO_PIN_RESET);
    5053
    5154  /*Configure GPIO pin Output Level */
    5255  HAL_GPIO_WritePin(EXT_SMPS_GPIO_Port, EXT_SMPS_Pin, GPIO_PIN_SET);
    5356
    54   /*Configure GPIO pin Output Level */
    55   HAL_GPIO_WritePin(GREEN_LED_GPIO_Port, GREEN_LED_Pin, GPIO_PIN_RESET);
     57  /*Configure GPIO pin : LED_GREEN_Pin */
     58  GPIO_InitStruct.Pin = LED_GREEN_Pin;
     59  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
     60  GPIO_InitStruct.Pull = GPIO_NOPULL;
     61  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
     62  HAL_GPIO_Init(LED_GREEN_GPIO_Port, &GPIO_InitStruct);
    5663
    5764  /*Configure GPIO pin : EXT_SMPS_Pin */
    … …  
    6269  HAL_GPIO_Init(EXT_SMPS_GPIO_Port, &GPIO_InitStruct);
    6370
    64   /*Configure GPIO pin : GREEN_LED_Pin */
    65   GPIO_InitStruct.Pin = GREEN_LED_Pin;
    66   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
    67   GPIO_InitStruct.Pull = GPIO_NOPULL;
    68   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
    69   HAL_GPIO_Init(GREEN_LED_GPIO_Port, &GPIO_InitStruct);
    70 
    7171}
    7272
  • trunk/firmware/FSBL/CubeMX/FSBL/Src/main.c

    r27 r28  
    4545/* USER CODE BEGIN PM */
    4646
     47#define SomeSymbol              DoNothing
     48
    4749/* USER CODE END PM */
    4850
    … …  
    6163
    6264static int32_t OTP_Config(void);
     65void DoNothing(void) {}
    6366
    6467/* USER CODE END PFP */
    … …  
    114117  for (int i = 0; i < 1000; ++i)
    115118  {
    116         HAL_GPIO_WritePin(GREEN_LED_GPIO_Port, GREEN_LED_Pin, GREEN_LED_Pin_Off);
     119        HAL_GPIO_WritePin(LED_GREEN_GPIO_Port, LED_GREEN_Pin, GREEN_LED_Pin_Off);
    117120        HAL_Delay(25U);
    118         HAL_GPIO_WritePin(GREEN_LED_GPIO_Port, GREEN_LED_Pin, GREEN_LED_Pin_On);
     121        HAL_GPIO_WritePin(LED_GREEN_GPIO_Port, LED_GREEN_Pin, GREEN_LED_Pin_On);
    119122        HAL_Delay(25U);
    120123        printf("[%3d] Running at %u MHz\n", i, SystemCoreClock / 1000000U);
  • trunk/firmware/FSBL/CubeMX/FSBL/Src/stm32n6xx_hal_msp.c

    r16 r28  
    6969  /* System interrupt init*/
    7070
     71  HAL_PWREx_EnableVddIO2();
     72
    7173  HAL_PWREx_EnableVddIO3();
    7274
  • trunk/firmware/FSBL/CubeMX/blto2_FSBL.ioc

    r27 r28  
    2222ExtMemLoader.IPs=EXTMEM_LOADER,EXTMEM_MANAGER,RCC\:I,GPIO,TIM6
    2323FSBL.IPs=CORTEX_M55_FSBL,GPDMA1\:I,HDP,HPDMA1\:I,LINKEDLIST,RCC,GPIO\:I,NVIC\:I,XSPIM,XSPI2,EXTMEM_MANAGER,BSEC,DEBUG,RAMCFG
    24 FSBL.Pins=PB12,PG0
     24FSBL.Pins=PO1,PB12
    2525File.Version=6
    2626GPIO.groupedBy=Group By Peripherals
    … …  
    4848Mcu.Name=STM32N657X0HxQ
    4949Mcu.Package=VFBGA264
    50 Mcu.Pin0=PN4
    51 Mcu.Pin1=PN6
     50Mcu.Pin0=PO1
     51Mcu.Pin1=PN4
    5252Mcu.Pin10=PN9
    5353Mcu.Pin11=PN2
    … …  
    6060Mcu.Pin18=VP_RAMCFG_VS_RAMCFG1
    6161Mcu.Pin19=VP_RAMCFG_VS_RAMCFG2
    62 Mcu.Pin2=PN8
     62Mcu.Pin2=PN6
    6363Mcu.Pin20=VP_RAMCFG_VS_RAMCFG3
    6464Mcu.Pin21=VP_RAMCFG_VS_RAMCFG4
    … …  
    7171Mcu.Pin28=VP_RAMCFG_VS_VENCRAM
    7272Mcu.Pin29=VP_RIF_VS_RIF1
    73 Mcu.Pin3=PN0
     73Mcu.Pin3=PN8
    7474Mcu.Pin30=VP_XSPI2_VS_octo
    7575Mcu.Pin31=VP_XSPIM_VS_IO
    76 Mcu.Pin4=PB12
    77 Mcu.Pin5=PG0
     76Mcu.Pin4=PN0
     77Mcu.Pin5=PB12
    7878Mcu.Pin6=PN3
    7979Mcu.Pin7=PN5
    … …  
    146146PCC.Temperature=25
    147147PCC.Vdd=1.8
    148 PG0.ContextOwner=FSBL
    149 PG0.GPIOParameters=GPIO_Label,PinAttribute
    150 PG0.GPIO_Label=GREEN_LED
    151 PG0.Locked=true
    152 PG0.PinAttribute=FSBL
    153 PG0.Signal=GPIO_Output
    154148PN0.GPIOParameters=PinAttribute
    155149PN0.Mode=XSPI2_Port2Octo
    … …  
    196190PN9.PinAttribute=FSBL
    197191PN9.Signal=XSPIM_P2_IO5
     192PO1.ContextOwner=FSBL
     193PO1.GPIOParameters=GPIO_Label,PinAttribute
     194PO1.GPIO_Label=LED_GREEN
     195PO1.Locked=true
     196PO1.PinAttribute=FSBL
     197PO1.Signal=GPIO_Output
    198198PinOutPanel.CurrentBGAView=Top
    199199PinOutPanel.RotationAngle=0
    … …  
    232232ProjectManager.UAScriptBeforePath=
    233233ProjectManager.UnderRoot=false
    234 ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false-FSBL,2-MX_GPIO_Init-GPIO-false-HAL-true-FSBL,3-MX_XSPI2_Init-XSPI2-false-HAL-true-FSBL,false-4-MX_XSPIM_Init-XSPIM-false-HAL-true-FSBL,5-MX_BSEC_Init-BSEC-false-HAL-true-FSBL,6-MX_EXTMEM_MANAGER_Init-EXTMEM_MANAGER-false-HAL-false-FSBL,1-SystemIsolation_Config-RIF-false-HAL-true-Appli,0-MX_CORTEX_M55_FSBL_Init-CORTEX_M55_FSBL-false-HAL-true-FSBL,0-MX_CORTEX_M55_S_Init-CORTEX_M55_S-false-HAL-true-Appli,1-MX_EXTMEM_MANAGER_Init-EXTMEM_MANAGER-false-HAL-false-ExtMemLoader
     234ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false-FSBL,2-MX_GPIO_Init-GPIO-false-HAL-true-FSBL,3-MX_XSPI2_Init-XSPI2-false-HAL-true-FSBL,false-4-MX_XSPIM_Init-XSPIM-false-HAL-true-FSBL,5-MX_BSEC_Init-BSEC-false-HAL-true-FSBL,6-MX_RAMCFG_Init-RAMCFG-false-HAL-true-FSBL,7-MX_EXTMEM_MANAGER_Init-EXTMEM_MANAGER-false-HAL-false-FSBL,1-SystemIsolation_Config-RIF-false-HAL-true-Appli,0-MX_CORTEX_M55_FSBL_Init-CORTEX_M55_FSBL-false-HAL-true-FSBL,0-MX_CORTEX_M55_S_Init-CORTEX_M55_S-false-HAL-true-Appli,1-MX_EXTMEM_MANAGER_Init-EXTMEM_MANAGER-false-HAL-false-ExtMemLoader
    235235RAMCFG.IPParameters=Instance-RAMCFG1_Activate,Instance-RAMCFG2_Activate,Instance-RAMCFG3_Activate,Instance-RAMCFG4_Activate,Instance-RAMCFG5_Activate,Instance-RAMCFG6_Activate,Instance-AHBSRAMCFG1_Activate,Instance-AHBSRAMCFG2_Activate,Instance-BKPRAM_Activate,Instance-FLEXRAM_Activate,Instance-VENCRAM_Activate,SYSCFG_ITCM_size
    236236RAMCFG.Instance-AHBSRAMCFG1_Activate=RAMCFG_SRAM1_AHB
    … …  
    600600RIF.RIFAWARE.GPIO\ Feature\ PF9\ Cid=-
    601601RIF.RIFAWARE.GPIO\ Feature\ PF9\ Secure=false
    602 RIF.RIFAWARE.GPIO\ Feature\ PG0\ Cid=1
    603 RIF.RIFAWARE.GPIO\ Feature\ PG0\ FSBL=true
    604 RIF.RIFAWARE.GPIO\ Feature\ PG0\ Secure=true
     602RIF.RIFAWARE.GPIO\ Feature\ PG0\ Cid=-
     603RIF.RIFAWARE.GPIO\ Feature\ PG0\ Secure=false
    605604RIF.RIFAWARE.GPIO\ Feature\ PG1\ Cid=-
    606605RIF.RIFAWARE.GPIO\ Feature\ PG1\ Secure=false
    … …  
    677676RIF.RIFAWARE.GPIO\ Feature\ PO0\ Cid=-
    678677RIF.RIFAWARE.GPIO\ Feature\ PO0\ Secure=false
    679 RIF.RIFAWARE.GPIO\ Feature\ PO1\ Cid=-
    680 RIF.RIFAWARE.GPIO\ Feature\ PO1\ Secure=false
     678RIF.RIFAWARE.GPIO\ Feature\ PO1\ Cid=1
     679RIF.RIFAWARE.GPIO\ Feature\ PO1\ FSBL=true
     680RIF.RIFAWARE.GPIO\ Feature\ PO1\ Secure=true
    681681RIF.RIFAWARE.GPIO\ Feature\ PO2\ Cid=-
    682682RIF.RIFAWARE.GPIO\ Feature\ PO2\ Secure=false
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