source: trunk/firmware/FSBL/CubeMX/blto2_FSBL.ioc@ 36

Last change on this file since 36 was 36, checked in by Zed, 2 weeks ago

Commiting the project to add SDMMC2 device into FSBL to be able to deal with it correctly in debugger.
File size: 47.6 KB
RevLine 
[16]1#MicroXplorer Configuration settings - do not modify
2Appli.IPs=CORTEX_M55_S,GPDMA1,HPDMA1,LINKEDLIST,RCC,GPIO,NVIC1\:I,RIF,SAU
3CAD.formats=
4CAD.pinconfig=
5CAD.provider=
6CORTEX_M55_FSBL.CPU_DCache=Enabled
7CORTEX_M55_FSBL.CPU_ICache=Enabled
8CORTEX_M55_FSBL.IPParameters=CPU_ICache,CPU_DCache
9CORTEX_M55_S.AccessPermission-Cortex_Memory_Protection_Unit_Region0_Settings=MPU_REGION_ALL_RW
10CORTEX_M55_S.Attributes0=MPU_ATTRIBUTES_NUMBER0
11CORTEX_M55_S.BaseAddress-Cortex_Memory_Protection_Unit_Region0_Settings=__NON_CACHEABLE_SECTION_BEGIN
12CORTEX_M55_S.CPU_DCache=Enabled
13CORTEX_M55_S.CPU_ICache=Enabled
14CORTEX_M55_S.Enable-Cortex_Memory_Protection_Unit_Region0_Settings=MPU_REGION_ENABLE
15CORTEX_M55_S.IPParameters=CPU_ICache,CPU_DCache,MPU_Control,Enable-Cortex_Memory_Protection_Unit_Region0_Settings,Attributes0,BaseAddress-Cortex_Memory_Protection_Unit_Region0_Settings,LimitAddress-Cortex_Memory_Protection_Unit_Region0_Settings,AccessPermission-Cortex_Memory_Protection_Unit_Region0_Settings
16CORTEX_M55_S.LimitAddress-Cortex_Memory_Protection_Unit_Region0_Settings=__NON_CACHEABLE_SECTION_END
17CORTEX_M55_S.MPU_Control=MPU_HFNMI_PRIVDEF
[19]18EXTMEM_MANAGER.IPParameters=RefParam_MEMORY_1_ConfigType,RefParam_BOOT_enable,RefParam_XIP_ApplicationOffset
19EXTMEM_MANAGER.RefParam_BOOT_enable=true
[18]20EXTMEM_MANAGER.RefParam_MEMORY_1_ConfigType=EXTMEM_LINK_CONFIG_8LINES
[19]21EXTMEM_MANAGER.RefParam_XIP_ApplicationOffset=0x80000
[16]22ExtMemLoader.IPs=EXTMEM_LOADER,EXTMEM_MANAGER,RCC\:I,GPIO,TIM6
[36]23FSBL.IPs=CORTEX_M55_FSBL,GPDMA1\:I,HDP,HPDMA1\:I,LINKEDLIST,RCC,GPIO\:I,NVIC\:I,XSPIM,XSPI2,EXTMEM_MANAGER,BSEC,DEBUG,RAMCFG,SYS_S\:I,TIM18
[28]24FSBL.Pins=PO1,PB12
[16]25File.Version=6
26GPIO.groupedBy=Group By Peripherals
27KeepUserPlacement=false
28Mcu.CPN=STM32N657X0H3Q
29Mcu.Context0=FSBL
30Mcu.Context1=Appli
31Mcu.Context2=ExtMemLoader
32Mcu.ContextNb=3
33Mcu.ContextProject=FullSecure
34Mcu.Family=STM32N6
[18]35Mcu.IP0=BSEC
36Mcu.IP1=CORTEX_M55_FSBL
[36]37Mcu.IP10=SYS_S
38Mcu.IP11=XSPI2
39Mcu.IP12=XSPIM
[18]40Mcu.IP2=CORTEX_M55_S
[24]41Mcu.IP3=DEBUG
42Mcu.IP4=EXTMEM_MANAGER
43Mcu.IP5=NVIC1
44Mcu.IP6=NVIC
[27]45Mcu.IP7=RAMCFG
46Mcu.IP8=RCC
47Mcu.IP9=RIF
[36]48Mcu.IPNb=13
[16]49Mcu.Name=STM32N657X0HxQ
50Mcu.Package=VFBGA264
[28]51Mcu.Pin0=PO1
52Mcu.Pin1=PN4
[25]53Mcu.Pin10=PN9
54Mcu.Pin11=PN2
55Mcu.Pin12=PA13(JTMS/SWDIO)
56Mcu.Pin13=PB5(JTDO/TRACESWO)
57Mcu.Pin14=PN10
58Mcu.Pin15=PN11
59Mcu.Pin16=VP_BSEC_VS_BSEC
60Mcu.Pin17=VP_EXTMEM_MANAGER_SIG_Activate_EXTMEM
[27]61Mcu.Pin18=VP_RAMCFG_VS_RAMCFG1
62Mcu.Pin19=VP_RAMCFG_VS_RAMCFG2
[28]63Mcu.Pin2=PN6
[27]64Mcu.Pin20=VP_RAMCFG_VS_RAMCFG3
65Mcu.Pin21=VP_RAMCFG_VS_RAMCFG4
66Mcu.Pin22=VP_RAMCFG_VS_RAMCFG5
67Mcu.Pin23=VP_RAMCFG_VS_RAMCFG6
68Mcu.Pin24=VP_RAMCFG_VS_AHBSRAM1
69Mcu.Pin25=VP_RAMCFG_VS_AHBSRAM2
70Mcu.Pin26=VP_RAMCFG_VS_BKPRAM
71Mcu.Pin27=VP_RAMCFG_VS_FLEXRAM
72Mcu.Pin28=VP_RAMCFG_VS_VENCRAM
73Mcu.Pin29=VP_RIF_VS_RIF1
[28]74Mcu.Pin3=PN8
[36]75Mcu.Pin30=VP_SYS_S_VS_tim18
76Mcu.Pin31=VP_XSPI2_VS_octo
77Mcu.Pin32=VP_XSPIM_VS_IO
[28]78Mcu.Pin4=PN0
79Mcu.Pin5=PB12
[25]80Mcu.Pin6=PN3
81Mcu.Pin7=PN5
82Mcu.Pin8=PN1
83Mcu.Pin9=PA14(JTCK/SWCLK)
[36]84Mcu.PinsNb=33
[16]85Mcu.ThirdPartyNb=0
86Mcu.UserConstants=
87Mcu.UserName=STM32N657X0HxQ
88MxCube.Version=6.18.1
89MxDb.Version=DB.6.0.181
90NVIC.BFHFNMINS=0
91NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
92NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
93NVIC.ForceEnableDMAVector=true
94NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
95NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
96NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
97NVIC.PRIS=0
98NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
99NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
100NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
101NVIC.SecureFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
102NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:true\:false\:true\:false
[36]103NVIC.TIM18_IRQn=true\:15\:0\:false\:false\:true\:false\:true\:true
104NVIC.TimeBase=TIM18_IRQn
105NVIC.TimeBaseIP=TIM18
[16]106NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
107NVIC1.BFHFNMINS=0
108NVIC1.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
109NVIC1.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
110NVIC1.ForceEnableDMAVector=true
111NVIC1.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
112NVIC1.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
113NVIC1.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
114NVIC1.PRIS=0
115NVIC1.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
116NVIC1.PriorityGroup=NVIC_PRIORITYGROUP_4
117NVIC1.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
118NVIC1.SecureFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
119NVIC1.SysTick_IRQn=true\:15\:0\:false\:false\:true\:false\:true\:false
120NVIC1.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
[24]121PA13(JTMS/SWDIO).GPIOParameters=PinAttribute
[16]122PA13(JTMS/SWDIO).Locked=true
[24]123PA13(JTMS/SWDIO).Mode=Serial_Wire
124PA13(JTMS/SWDIO).PinAttribute=FSBL
[16]125PA13(JTMS/SWDIO).Signal=DEBUG_JTMS-SWDIO
[24]126PA14(JTCK/SWCLK).GPIOParameters=PinAttribute
[16]127PA14(JTCK/SWCLK).Locked=true
[24]128PA14(JTCK/SWCLK).Mode=Serial_Wire
129PA14(JTCK/SWCLK).PinAttribute=FSBL
[16]130PA14(JTCK/SWCLK).Signal=DEBUG_JTCK-SWCLK
[25]131PB12.ContextOwner=FSBL
132PB12.GPIOParameters=PinState,GPIO_Label,PinAttribute
133PB12.GPIO_Label=EXT_SMPS
134PB12.Locked=true
135PB12.PinAttribute=FSBL
136PB12.PinState=GPIO_PIN_SET
137PB12.Signal=GPIO_Output
[24]138PB5(JTDO/TRACESWO).GPIOParameters=PinAttribute
139PB5(JTDO/TRACESWO).Locked=true
140PB5(JTDO/TRACESWO).PinAttribute=FSBL
141PB5(JTDO/TRACESWO).Signal=DEBUG_JTDO-SWO
[16]142PCC.Bar.Display=Horizontal Bar
143PCC.Checker=false
144PCC.Display=Plot\: All Steps
145PCC.Line=STM32N6x7
146PCC.MCU=STM32N657X0HxQ
147PCC.PartNumber=STM32N657X0HxQ
148PCC.SequenceTime=1.0 ms
149PCC.SequenceTime.Unit=ms
150PCC.Series=STM32N6
151PCC.Temperature=25
152PCC.Vdd=1.8
153PN0.GPIOParameters=PinAttribute
154PN0.Mode=XSPI2_Port2Octo
155PN0.PinAttribute=FSBL
156PN0.Signal=XSPIM_P2_DQS0
157PN1.GPIOParameters=PinAttribute
158PN1.Mode=XSPI2_NCS1_Port2
159PN1.PinAttribute=FSBL
160PN1.Signal=XSPIM_P2_NCS1
161PN10.GPIOParameters=PinAttribute
162PN10.Mode=XSPI2_Port2Octo
163PN10.PinAttribute=FSBL
164PN10.Signal=XSPIM_P2_IO6
165PN11.GPIOParameters=PinAttribute
166PN11.Mode=XSPI2_Port2Octo
167PN11.PinAttribute=FSBL
168PN11.Signal=XSPIM_P2_IO7
169PN2.GPIOParameters=PinAttribute
170PN2.Mode=XSPI2_Port2Octo
171PN2.PinAttribute=FSBL
172PN2.Signal=XSPIM_P2_IO0
173PN3.GPIOParameters=PinAttribute
174PN3.Mode=XSPI2_Port2Octo
175PN3.PinAttribute=FSBL
176PN3.Signal=XSPIM_P2_IO1
177PN4.GPIOParameters=PinAttribute
178PN4.Mode=XSPI2_Port2Octo
179PN4.PinAttribute=FSBL
180PN4.Signal=XSPIM_P2_IO2
181PN5.GPIOParameters=PinAttribute
182PN5.Mode=XSPI2_Port2Octo
183PN5.PinAttribute=FSBL
184PN5.Signal=XSPIM_P2_IO3
185PN6.GPIOParameters=PinAttribute
186PN6.Mode=XSPI2_Port2Octo
187PN6.PinAttribute=FSBL
188PN6.Signal=XSPIM_P2_CLK
189PN8.GPIOParameters=PinAttribute
190PN8.Mode=XSPI2_Port2Octo
191PN8.PinAttribute=FSBL
192PN8.Signal=XSPIM_P2_IO4
193PN9.GPIOParameters=PinAttribute
194PN9.Mode=XSPI2_Port2Octo
195PN9.PinAttribute=FSBL
196PN9.Signal=XSPIM_P2_IO5
[28]197PO1.ContextOwner=FSBL
198PO1.GPIOParameters=GPIO_Label,PinAttribute
199PO1.GPIO_Label=LED_GREEN
200PO1.Locked=true
201PO1.PinAttribute=FSBL
202PO1.Signal=GPIO_Output
[16]203PinOutPanel.CurrentBGAView=Top
204PinOutPanel.RotationAngle=0
205ProjectManager.AskForMigrate=true
206ProjectManager.BackupPrevious=false
207ProjectManager.CompilerLinker=GCC
208ProjectManager.CompilerOptimize=6
209ProjectManager.ComputerToolchain=false
210ProjectManager.CoupleFile=true
[24]211ProjectManager.CustomerFirmwarePackage=..\\..\\..\\..\\..\\..\\STM32Cube\\Repository\\STM32Cube_FW_N6_V1.4.1
212ProjectManager.DefaultFWLocation=false
[16]213ProjectManager.DeletePrevious=true
214ProjectManager.DeviceId=STM32N657X0HxQ
215ProjectManager.Example=Template_FSBL_XIP
216ProjectManager.ExampleSource=CubeFw
217ProjectManager.FirmwarePackage=STM32Cube FW_N6 V1.4.1
[24]218ProjectManager.FreePins=false
[16]219ProjectManager.FreePinsContext=FSBL
220ProjectManager.HalAssertFull=true
221ProjectManager.HeapSize=FSBL-0x200,Appli-0x200,ExtMemLoader-0x200
222ProjectManager.KeepUserCode=true
223ProjectManager.LastFirmware=true
224ProjectManager.LibraryCopy=1
225ProjectManager.MainLocation=Src
226ProjectManager.NoMain=false
227ProjectManager.PreviousToolchain=
228ProjectManager.ProjectBuild=false
229ProjectManager.ProjectFileName=blto2_FSBL.ioc
230ProjectManager.ProjectName=blto2_FSBL
231ProjectManager.ProjectStructure=FSBL\:FSBL\:true;Appli\:Appli\:false;ExtMemLoader\:ExtMemLoader\:false;
232ProjectManager.RegisterCallBack=
233ProjectManager.StackSize=FSBL-0x800,Appli-0x800,ExtMemLoader-0x800
234ProjectManager.TargetToolchain=STM32CubeIDE
235ProjectManager.ToolChainLocation=
236ProjectManager.UAScriptAfterPath=
237ProjectManager.UAScriptBeforePath=
238ProjectManager.UnderRoot=false
[28]239ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false-FSBL,2-MX_GPIO_Init-GPIO-false-HAL-true-FSBL,3-MX_XSPI2_Init-XSPI2-false-HAL-true-FSBL,false-4-MX_XSPIM_Init-XSPIM-false-HAL-true-FSBL,5-MX_BSEC_Init-BSEC-false-HAL-true-FSBL,6-MX_RAMCFG_Init-RAMCFG-false-HAL-true-FSBL,7-MX_EXTMEM_MANAGER_Init-EXTMEM_MANAGER-false-HAL-false-FSBL,1-SystemIsolation_Config-RIF-false-HAL-true-Appli,0-MX_CORTEX_M55_FSBL_Init-CORTEX_M55_FSBL-false-HAL-true-FSBL,0-MX_CORTEX_M55_S_Init-CORTEX_M55_S-false-HAL-true-Appli,1-MX_EXTMEM_MANAGER_Init-EXTMEM_MANAGER-false-HAL-false-ExtMemLoader
[27]240RAMCFG.IPParameters=Instance-RAMCFG1_Activate,Instance-RAMCFG2_Activate,Instance-RAMCFG3_Activate,Instance-RAMCFG4_Activate,Instance-RAMCFG5_Activate,Instance-RAMCFG6_Activate,Instance-AHBSRAMCFG1_Activate,Instance-AHBSRAMCFG2_Activate,Instance-BKPRAM_Activate,Instance-FLEXRAM_Activate,Instance-VENCRAM_Activate,SYSCFG_ITCM_size
241RAMCFG.Instance-AHBSRAMCFG1_Activate=RAMCFG_SRAM1_AHB
242RAMCFG.Instance-AHBSRAMCFG2_Activate=RAMCFG_SRAM2_AHB
243RAMCFG.Instance-BKPRAM_Activate=RAMCFG_BKPSRAM
244RAMCFG.Instance-FLEXRAM_Activate=RAMCFG_FLEXRAM
245RAMCFG.Instance-RAMCFG1_Activate=RAMCFG_SRAM1_AXI
246RAMCFG.Instance-RAMCFG2_Activate=RAMCFG_SRAM2_AXI
247RAMCFG.Instance-RAMCFG3_Activate=RAMCFG_SRAM3_AXI
248RAMCFG.Instance-RAMCFG4_Activate=RAMCFG_SRAM4_AXI
249RAMCFG.Instance-RAMCFG5_Activate=RAMCFG_SRAM5_AXI
250RAMCFG.Instance-RAMCFG6_Activate=RAMCFG_SRAM6_AXI
251RAMCFG.Instance-VENCRAM_Activate=RAMCFG_VENC_RAM
252RAMCFG.SYSCFG_ITCM_size=SYSCFG_ITCM_64K
[16]253RCC.ADC12Freq_Value=200000000
254RCC.ADFFreq_Value=200000000
255RCC.AHB1234Freq_Value=200000000
[25]256RCC.AHBFreq_Value=100000000
[16]257RCC.APB1Freq_Value=200000000
258RCC.APB2Freq_Value=200000000
259RCC.APB4Freq_Value=200000000
260RCC.APB5Freq_Value=200000000
261RCC.AXIClockFreq_Value=400000000
262RCC.CKPERFreq_Value=64000000
263RCC.CPUCLKSource=RCC_CPUCLKSOURCE_IC1
[25]264RCC.CortexFreq_Value=100000000
265RCC.CpuClockFreq_Value=800000000
[16]266RCC.DCMIPPFreq_Value=200000000
267RCC.ETH1Freq_Value=200000000
[25]268RCC.FBDIV4=125
[16]269RCC.FDCANFreq_Value=200000000
270RCC.FMCFreq_Value=200000000
[25]271RCC.FOUTPOSTDIV1Freq_Value=1600000000
[16]272RCC.FOUTPOSTDIV2Freq_Value=1600000000
273RCC.FOUTPOSTDIV3Freq_Value=1600000000
[25]274RCC.FOUTPOSTDIV4Freq_Value=1000000000
275RCC.FREFDIV4=8
[16]276RCC.FamilyName=M
277RCC.HSE_VALUE=48000000
278RCC.HSI_VALUE=64000000
279RCC.I2C1Freq_Value=200000000
280RCC.I2C2Freq_Value=200000000
281RCC.I2C3Freq_Value=200000000
282RCC.I2C4Freq_Value=200000000
283RCC.I3C1Freq_Value=200000000
284RCC.I3C2Freq_Value=200000000
285RCC.IC10Freq_VALUE=1600000000
286RCC.IC11Freq_VALUE=400000000
287RCC.IC12Freq_VALUE=1600000000
288RCC.IC13Freq_VALUE=1600000000
289RCC.IC14Freq_VALUE=1600000000
290RCC.IC15Freq_VALUE=1600000000
[25]291RCC.IC16Freq_VALUE=1000000000
292RCC.IC17Freq_VALUE=1000000000
293RCC.IC18Freq_VALUE=1000000000
294RCC.IC19Freq_VALUE=1000000000
[16]295RCC.IC1Div=2
[25]296RCC.IC1Freq_VALUE=800000000
297RCC.IC20Freq_VALUE=1000000000
[16]298RCC.IC2Freq_VALUE=400000000
[25]299RCC.IC3Div=32
[16]300RCC.IC3Freq_VALUE=50000000
[25]301RCC.IC4Freq_VALUE=1600000000
302RCC.IC5Freq_VALUE=1600000000
303RCC.IC6CLKSource=RCC_ICCLKSOURCE_PLL4
304RCC.IC6Div=1
305RCC.IC6Freq_VALUE=1000000000
[16]306RCC.IC7Freq_VALUE=1600000000
307RCC.IC8Freq_VALUE=1600000000
308RCC.IC9Freq_VALUE=1600000000
[26]309RCC.IPParameters=ADC12Freq_Value,ADFFreq_Value,AHB1234Freq_Value,AHBFreq_Value,APB1Freq_Value,APB2Freq_Value,APB4Freq_Value,APB5Freq_Value,AXIClockFreq_Value,CKPERFreq_Value,CPUCLKSource,CortexFreq_Value,CpuClockFreq_Value,DCMIPPFreq_Value,ETH1Freq_Value,FBDIV4,FDCANFreq_Value,FMCFreq_Value,FOUTPOSTDIV1Freq_Value,FOUTPOSTDIV2Freq_Value,FOUTPOSTDIV3Freq_Value,FOUTPOSTDIV4Freq_Value,FREFDIV4,FamilyName,HSE_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I3C1Freq_Value,I3C2Freq_Value,IC10Freq_VALUE,IC11Freq_VALUE,IC12Freq_VALUE,IC13Freq_VALUE,IC14Freq_VALUE,IC15Freq_VALUE,IC16Freq_VALUE,IC17Freq_VALUE,IC18Freq_VALUE,IC19Freq_VALUE,IC1Div,IC1Freq_VALUE,IC20Freq_VALUE,IC2Freq_VALUE,IC3Div,IC3Freq_VALUE,IC4Freq_VALUE,IC5Freq_VALUE,IC6CLKSource,IC6Div,IC6Freq_VALUE,IC7Freq_VALUE,IC8Freq_VALUE,IC9Freq_VALUE,LPTIM1Freq_Value,LPTIM2Freq_Value,LPTIM3Freq_Value,LPTIM4Freq_Value,LPTIM5Freq_Value,LPUART1Freq_Value,LSE_VALUE,LSI_VALUE,LTDCFreq_Value,MCO1PinFreq_Value,MCO2PinFreq_Value,MDFFreq_Value,MSI_VALUE,OTGHS1Freq_Value,OTGHS2Freq_Value,OTGPHY1Freq_Value,OTGPHY2Freq_Value,PSSIFreq_Value,RCC_MCO2Source,RCC_MCODiv1,RCC_MCODiv2,RTCFreq_Value,SAI1Freq_Value,SAI2Freq_Value,SDMMC1Freq_Value,SDMMC2Freq_Value,SPDIFRX1Freq_Value,SPI1Freq_Value,SPI2Freq_Value,SPI3Freq_Value,SPI4Freq_Value,SPI5Freq_Value,SPI6Freq_Value,SYSBCLKFreq_VALUE,SYSBCLKSource,SYSCCLKFreq_VALUE,SYSDCLKFreq_VALUE,TIMGFreq_Value,UART4Freq_Value,UART5Freq_Value,UART7Freq_Value,UART8Freq_Value,UART9Freq_Value,USART10Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USART6Freq_Value,VCO1OutputFreq_Value,VCO2OutputFreq_Value,VCO3OutputFreq_Value,VCO4OutputFreq_Value,VCOInput1Freq_Value,VCOInput2Freq_Value,VCOInput3Freq_Value,VCOInput4Freq_Value,XSPI1Freq_Value,XSPI2ClockSelection,XSPI2Freq_Value,XSPI3Freq_Value
[16]310RCC.LPTIM1Freq_Value=200000000
311RCC.LPTIM2Freq_Value=200000000
312RCC.LPTIM3Freq_Value=200000000
313RCC.LPTIM4Freq_Value=200000000
314RCC.LPTIM5Freq_Value=200000000
315RCC.LPUART1Freq_Value=200000000
316RCC.LSE_VALUE=32768
317RCC.LSI_VALUE=32000
318RCC.LTDCFreq_Value=200000000
[26]319RCC.MCO1PinFreq_Value=6400000
320RCC.MCO2PinFreq_Value=400000000
[16]321RCC.MDFFreq_Value=200000000
322RCC.MSI_VALUE=16000000
323RCC.OTGHS1Freq_Value=24000000
324RCC.OTGHS2Freq_Value=24000000
325RCC.OTGPHY1Freq_Value=24000000
326RCC.OTGPHY2Freq_Value=24000000
327RCC.PSSIFreq_Value=200000000
[26]328RCC.RCC_MCO2Source=RCC_MCO2SOURCE_IC15
329RCC.RCC_MCODiv1=RCC_MCODIV_10
330RCC.RCC_MCODiv2=RCC_MCODIV_4
[16]331RCC.RTCFreq_Value=32000
332RCC.SAI1Freq_Value=200000000
333RCC.SAI2Freq_Value=200000000
334RCC.SDMMC1Freq_Value=200000000
335RCC.SDMMC2Freq_Value=200000000
336RCC.SPDIFRX1Freq_Value=200000000
337RCC.SPI1Freq_Value=200000000
338RCC.SPI2Freq_Value=200000000
339RCC.SPI3Freq_Value=200000000
340RCC.SPI4Freq_Value=200000000
341RCC.SPI5Freq_Value=200000000
342RCC.SPI6Freq_Value=200000000
343RCC.SYSBCLKFreq_VALUE=400000000
344RCC.SYSBCLKSource=RCC_SYSCLKSOURCE_IC2_IC6_IC11
[25]345RCC.SYSCCLKFreq_VALUE=1000000000
[16]346RCC.SYSDCLKFreq_VALUE=400000000
347RCC.TIMGFreq_Value=400000000
348RCC.UART4Freq_Value=200000000
349RCC.UART5Freq_Value=200000000
350RCC.UART7Freq_Value=200000000
351RCC.UART8Freq_Value=200000000
352RCC.UART9Freq_Value=200000000
353RCC.USART10Freq_Value=200000000
354RCC.USART1Freq_Value=200000000
355RCC.USART2Freq_Value=200000000
356RCC.USART3Freq_Value=200000000
357RCC.USART6Freq_Value=200000000
[25]358RCC.VCO1OutputFreq_Value=1600000000
[16]359RCC.VCO2OutputFreq_Value=1600000000
360RCC.VCO3OutputFreq_Value=1600000000
[25]361RCC.VCO4OutputFreq_Value=1000000000
362RCC.VCOInput1Freq_Value=64000000
[16]363RCC.VCOInput2Freq_Value=64000000
364RCC.VCOInput3Freq_Value=64000000
[25]365RCC.VCOInput4Freq_Value=8000000
[16]366RCC.XSPI1Freq_Value=200000000
367RCC.XSPI2ClockSelection=RCC_XSPI2CLKSOURCE_IC3
368RCC.XSPI2Freq_Value=50000000
369RCC.XSPI3Freq_Value=200000000
370RIF.DCMIPP_CID_RIMU=0
371RIF.DMA2D_CID_RIMU=0
372RIF.ETH1_CID_RIMU=0
373RIF.ETR_CID_RIMU=0
374RIF.GPU_CID_RIMU=0
375RIF.IPParameters=ETR_CID_RIMU,SDMMC1_CID_RIMU,SDMMC2_CID_RIMU,OTG1_CID_RIMU,OTG2_CID_RIMU,ETH1_CID_RIMU,GPU_CID_RIMU,DMA2D_CID_RIMU,DCMIPP_CID_RIMU,VENC_CID_RIMU,LTDC_L1_CID_RIMU,LTDC_L2_CID_RIMU
376RIF.LTDC_L1_CID_RIMU=0
377RIF.LTDC_L2_CID_RIMU=0
378RIF.OTG1_CID_RIMU=0
379RIF.OTG2_CID_RIMU=0
380RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 0\ Cid=-
381RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 0\ Privilege=true
382RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 0\ Secure=false
383RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 1\ Cid=-
384RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 1\ Privilege=true
385RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 1\ Secure=false
386RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 10\ Cid=-
387RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 10\ Privilege=true
388RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 10\ Secure=false
389RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 11\ Cid=-
390RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 11\ Privilege=true
391RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 11\ Secure=false
392RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 12\ Cid=-
393RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 12\ Privilege=true
394RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 12\ Secure=false
395RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 13\ Cid=-
396RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 13\ Privilege=true
397RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 13\ Secure=false
398RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 14\ Cid=-
399RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 14\ Privilege=true
400RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 14\ Secure=false
401RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 15\ Cid=-
402RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 15\ Privilege=true
403RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 15\ Secure=false
404RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 2\ Cid=-
405RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 2\ Privilege=true
406RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 2\ Secure=false
407RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 3\ Cid=-
408RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 3\ Privilege=true
409RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 3\ Secure=false
410RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 4\ Cid=-
411RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 4\ Privilege=true
412RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 4\ Secure=false
413RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 5\ Cid=-
414RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 5\ Privilege=true
415RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 5\ Secure=false
416RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 6\ Cid=-
417RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 6\ Privilege=true
418RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 6\ Secure=false
419RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 7\ Cid=-
420RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 7\ Privilege=true
421RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 7\ Secure=false
422RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 8\ Cid=-
423RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 8\ Privilege=true
424RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 8\ Secure=false
425RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 9\ Cid=-
426RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 9\ Privilege=true
427RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 9\ Secure=false
428RIF.RIFAWARE.GPIO\ Feature\ PA0\ Cid=-
429RIF.RIFAWARE.GPIO\ Feature\ PA0\ Secure=false
430RIF.RIFAWARE.GPIO\ Feature\ PA1\ Cid=-
431RIF.RIFAWARE.GPIO\ Feature\ PA1\ Secure=false
432RIF.RIFAWARE.GPIO\ Feature\ PA10\ Cid=-
433RIF.RIFAWARE.GPIO\ Feature\ PA10\ Secure=false
434RIF.RIFAWARE.GPIO\ Feature\ PA11\ Cid=-
435RIF.RIFAWARE.GPIO\ Feature\ PA11\ Secure=false
436RIF.RIFAWARE.GPIO\ Feature\ PA12\ Cid=-
437RIF.RIFAWARE.GPIO\ Feature\ PA12\ Secure=false
438RIF.RIFAWARE.GPIO\ Feature\ PA2\ Cid=-
439RIF.RIFAWARE.GPIO\ Feature\ PA2\ Secure=false
440RIF.RIFAWARE.GPIO\ Feature\ PA3\ Cid=-
441RIF.RIFAWARE.GPIO\ Feature\ PA3\ Secure=false
442RIF.RIFAWARE.GPIO\ Feature\ PA4\ Cid=-
443RIF.RIFAWARE.GPIO\ Feature\ PA4\ Secure=false
444RIF.RIFAWARE.GPIO\ Feature\ PA5\ Cid=-
445RIF.RIFAWARE.GPIO\ Feature\ PA5\ Secure=false
446RIF.RIFAWARE.GPIO\ Feature\ PA6\ Cid=-
447RIF.RIFAWARE.GPIO\ Feature\ PA6\ Secure=false
448RIF.RIFAWARE.GPIO\ Feature\ PA7\ Cid=-
449RIF.RIFAWARE.GPIO\ Feature\ PA7\ Secure=false
450RIF.RIFAWARE.GPIO\ Feature\ PA8\ Cid=-
451RIF.RIFAWARE.GPIO\ Feature\ PA8\ Secure=false
452RIF.RIFAWARE.GPIO\ Feature\ PA9\ Cid=-
453RIF.RIFAWARE.GPIO\ Feature\ PA9\ Secure=false
454RIF.RIFAWARE.GPIO\ Feature\ PB0\ Cid=-
455RIF.RIFAWARE.GPIO\ Feature\ PB0\ Secure=false
456RIF.RIFAWARE.GPIO\ Feature\ PB1\ Cid=-
457RIF.RIFAWARE.GPIO\ Feature\ PB1\ Secure=false
458RIF.RIFAWARE.GPIO\ Feature\ PB10\ Cid=-
459RIF.RIFAWARE.GPIO\ Feature\ PB10\ Secure=false
460RIF.RIFAWARE.GPIO\ Feature\ PB11\ Cid=-
461RIF.RIFAWARE.GPIO\ Feature\ PB11\ Secure=false
[25]462RIF.RIFAWARE.GPIO\ Feature\ PB12\ Cid=1
463RIF.RIFAWARE.GPIO\ Feature\ PB12\ FSBL=true
464RIF.RIFAWARE.GPIO\ Feature\ PB12\ Secure=true
[16]465RIF.RIFAWARE.GPIO\ Feature\ PB13\ Cid=-
466RIF.RIFAWARE.GPIO\ Feature\ PB13\ Secure=false
467RIF.RIFAWARE.GPIO\ Feature\ PB14\ Cid=-
468RIF.RIFAWARE.GPIO\ Feature\ PB14\ Secure=false
469RIF.RIFAWARE.GPIO\ Feature\ PB15\ Cid=-
470RIF.RIFAWARE.GPIO\ Feature\ PB15\ Secure=false
471RIF.RIFAWARE.GPIO\ Feature\ PB2\ Cid=-
472RIF.RIFAWARE.GPIO\ Feature\ PB2\ Secure=false
473RIF.RIFAWARE.GPIO\ Feature\ PB3\ Cid=-
474RIF.RIFAWARE.GPIO\ Feature\ PB3\ Secure=false
475RIF.RIFAWARE.GPIO\ Feature\ PB6\ Cid=-
476RIF.RIFAWARE.GPIO\ Feature\ PB6\ Secure=false
477RIF.RIFAWARE.GPIO\ Feature\ PB7\ Cid=-
478RIF.RIFAWARE.GPIO\ Feature\ PB7\ Secure=false
479RIF.RIFAWARE.GPIO\ Feature\ PB8\ Cid=-
480RIF.RIFAWARE.GPIO\ Feature\ PB8\ Secure=false
481RIF.RIFAWARE.GPIO\ Feature\ PB9\ Cid=-
482RIF.RIFAWARE.GPIO\ Feature\ PB9\ Secure=false
483RIF.RIFAWARE.GPIO\ Feature\ PC0\ Cid=-
484RIF.RIFAWARE.GPIO\ Feature\ PC0\ Secure=false
485RIF.RIFAWARE.GPIO\ Feature\ PC1\ Cid=-
486RIF.RIFAWARE.GPIO\ Feature\ PC1\ Secure=false
487RIF.RIFAWARE.GPIO\ Feature\ PC10\ Cid=-
488RIF.RIFAWARE.GPIO\ Feature\ PC10\ Secure=false
489RIF.RIFAWARE.GPIO\ Feature\ PC11\ Cid=-
490RIF.RIFAWARE.GPIO\ Feature\ PC11\ Secure=false
491RIF.RIFAWARE.GPIO\ Feature\ PC12\ Cid=-
492RIF.RIFAWARE.GPIO\ Feature\ PC12\ Secure=false
493RIF.RIFAWARE.GPIO\ Feature\ PC13\ Cid=-
494RIF.RIFAWARE.GPIO\ Feature\ PC13\ Secure=false
495RIF.RIFAWARE.GPIO\ Feature\ PC2\ Cid=-
496RIF.RIFAWARE.GPIO\ Feature\ PC2\ Secure=false
497RIF.RIFAWARE.GPIO\ Feature\ PC3\ Cid=-
498RIF.RIFAWARE.GPIO\ Feature\ PC3\ Secure=false
499RIF.RIFAWARE.GPIO\ Feature\ PC4\ Cid=-
500RIF.RIFAWARE.GPIO\ Feature\ PC4\ Secure=false
501RIF.RIFAWARE.GPIO\ Feature\ PC5\ Cid=-
502RIF.RIFAWARE.GPIO\ Feature\ PC5\ Secure=false
503RIF.RIFAWARE.GPIO\ Feature\ PC6\ Cid=-
504RIF.RIFAWARE.GPIO\ Feature\ PC6\ Secure=false
505RIF.RIFAWARE.GPIO\ Feature\ PC7\ Cid=-
506RIF.RIFAWARE.GPIO\ Feature\ PC7\ Secure=false
507RIF.RIFAWARE.GPIO\ Feature\ PC8\ Cid=-
508RIF.RIFAWARE.GPIO\ Feature\ PC8\ Secure=false
509RIF.RIFAWARE.GPIO\ Feature\ PC9\ Cid=-
510RIF.RIFAWARE.GPIO\ Feature\ PC9\ Secure=false
511RIF.RIFAWARE.GPIO\ Feature\ PD0\ Cid=-
512RIF.RIFAWARE.GPIO\ Feature\ PD0\ Secure=false
513RIF.RIFAWARE.GPIO\ Feature\ PD1\ Cid=-
514RIF.RIFAWARE.GPIO\ Feature\ PD1\ Secure=false
515RIF.RIFAWARE.GPIO\ Feature\ PD10\ Cid=-
516RIF.RIFAWARE.GPIO\ Feature\ PD10\ Secure=false
517RIF.RIFAWARE.GPIO\ Feature\ PD11\ Cid=-
518RIF.RIFAWARE.GPIO\ Feature\ PD11\ Secure=false
519RIF.RIFAWARE.GPIO\ Feature\ PD12\ Cid=-
520RIF.RIFAWARE.GPIO\ Feature\ PD12\ Secure=false
521RIF.RIFAWARE.GPIO\ Feature\ PD13\ Cid=-
522RIF.RIFAWARE.GPIO\ Feature\ PD13\ Secure=false
523RIF.RIFAWARE.GPIO\ Feature\ PD14\ Cid=-
524RIF.RIFAWARE.GPIO\ Feature\ PD14\ Secure=false
525RIF.RIFAWARE.GPIO\ Feature\ PD15\ Cid=-
526RIF.RIFAWARE.GPIO\ Feature\ PD15\ Secure=false
527RIF.RIFAWARE.GPIO\ Feature\ PD2\ Cid=-
528RIF.RIFAWARE.GPIO\ Feature\ PD2\ Secure=false
529RIF.RIFAWARE.GPIO\ Feature\ PD3\ Cid=-
530RIF.RIFAWARE.GPIO\ Feature\ PD3\ Secure=false
531RIF.RIFAWARE.GPIO\ Feature\ PD4\ Cid=-
532RIF.RIFAWARE.GPIO\ Feature\ PD4\ Secure=false
533RIF.RIFAWARE.GPIO\ Feature\ PD5\ Cid=-
534RIF.RIFAWARE.GPIO\ Feature\ PD5\ Secure=false
535RIF.RIFAWARE.GPIO\ Feature\ PD6\ Cid=-
536RIF.RIFAWARE.GPIO\ Feature\ PD6\ Secure=false
537RIF.RIFAWARE.GPIO\ Feature\ PD7\ Cid=-
538RIF.RIFAWARE.GPIO\ Feature\ PD7\ Secure=false
539RIF.RIFAWARE.GPIO\ Feature\ PD8\ Cid=-
540RIF.RIFAWARE.GPIO\ Feature\ PD8\ Secure=false
541RIF.RIFAWARE.GPIO\ Feature\ PD9\ Cid=-
542RIF.RIFAWARE.GPIO\ Feature\ PD9\ Secure=false
543RIF.RIFAWARE.GPIO\ Feature\ PE0\ Cid=-
544RIF.RIFAWARE.GPIO\ Feature\ PE0\ Secure=false
545RIF.RIFAWARE.GPIO\ Feature\ PE1\ Cid=-
546RIF.RIFAWARE.GPIO\ Feature\ PE1\ Secure=false
547RIF.RIFAWARE.GPIO\ Feature\ PE10\ Cid=-
548RIF.RIFAWARE.GPIO\ Feature\ PE10\ Secure=false
549RIF.RIFAWARE.GPIO\ Feature\ PE11\ Cid=-
550RIF.RIFAWARE.GPIO\ Feature\ PE11\ Secure=false
551RIF.RIFAWARE.GPIO\ Feature\ PE12\ Cid=-
552RIF.RIFAWARE.GPIO\ Feature\ PE12\ Secure=false
553RIF.RIFAWARE.GPIO\ Feature\ PE13\ Cid=-
554RIF.RIFAWARE.GPIO\ Feature\ PE13\ Secure=false
555RIF.RIFAWARE.GPIO\ Feature\ PE14\ Cid=-
556RIF.RIFAWARE.GPIO\ Feature\ PE14\ Secure=false
557RIF.RIFAWARE.GPIO\ Feature\ PE15\ Cid=-
558RIF.RIFAWARE.GPIO\ Feature\ PE15\ Secure=false
559RIF.RIFAWARE.GPIO\ Feature\ PE2\ Cid=-
560RIF.RIFAWARE.GPIO\ Feature\ PE2\ Secure=false
561RIF.RIFAWARE.GPIO\ Feature\ PE3\ Cid=-
562RIF.RIFAWARE.GPIO\ Feature\ PE3\ Secure=false
563RIF.RIFAWARE.GPIO\ Feature\ PE4\ Cid=-
564RIF.RIFAWARE.GPIO\ Feature\ PE4\ Secure=false
565RIF.RIFAWARE.GPIO\ Feature\ PE5\ Cid=-
566RIF.RIFAWARE.GPIO\ Feature\ PE5\ Secure=false
567RIF.RIFAWARE.GPIO\ Feature\ PE6\ Cid=-
568RIF.RIFAWARE.GPIO\ Feature\ PE6\ Secure=false
569RIF.RIFAWARE.GPIO\ Feature\ PE7\ Cid=-
570RIF.RIFAWARE.GPIO\ Feature\ PE7\ Secure=false
571RIF.RIFAWARE.GPIO\ Feature\ PE8\ Cid=-
572RIF.RIFAWARE.GPIO\ Feature\ PE8\ Secure=false
573RIF.RIFAWARE.GPIO\ Feature\ PE9\ Cid=-
574RIF.RIFAWARE.GPIO\ Feature\ PE9\ Secure=false
575RIF.RIFAWARE.GPIO\ Feature\ PF0\ Cid=-
576RIF.RIFAWARE.GPIO\ Feature\ PF0\ Secure=false
577RIF.RIFAWARE.GPIO\ Feature\ PF1\ Cid=-
578RIF.RIFAWARE.GPIO\ Feature\ PF1\ Secure=false
579RIF.RIFAWARE.GPIO\ Feature\ PF10\ Cid=-
580RIF.RIFAWARE.GPIO\ Feature\ PF10\ Secure=false
581RIF.RIFAWARE.GPIO\ Feature\ PF11\ Cid=-
582RIF.RIFAWARE.GPIO\ Feature\ PF11\ Secure=false
583RIF.RIFAWARE.GPIO\ Feature\ PF12\ Cid=-
584RIF.RIFAWARE.GPIO\ Feature\ PF12\ Secure=false
585RIF.RIFAWARE.GPIO\ Feature\ PF13\ Cid=-
586RIF.RIFAWARE.GPIO\ Feature\ PF13\ Secure=false
587RIF.RIFAWARE.GPIO\ Feature\ PF14\ Cid=-
588RIF.RIFAWARE.GPIO\ Feature\ PF14\ Secure=false
589RIF.RIFAWARE.GPIO\ Feature\ PF15\ Cid=-
590RIF.RIFAWARE.GPIO\ Feature\ PF15\ Secure=false
591RIF.RIFAWARE.GPIO\ Feature\ PF2\ Cid=-
592RIF.RIFAWARE.GPIO\ Feature\ PF2\ Secure=false
593RIF.RIFAWARE.GPIO\ Feature\ PF3\ Cid=-
594RIF.RIFAWARE.GPIO\ Feature\ PF3\ Secure=false
595RIF.RIFAWARE.GPIO\ Feature\ PF4\ Cid=-
596RIF.RIFAWARE.GPIO\ Feature\ PF4\ Secure=false
597RIF.RIFAWARE.GPIO\ Feature\ PF5\ Cid=-
598RIF.RIFAWARE.GPIO\ Feature\ PF5\ Secure=false
599RIF.RIFAWARE.GPIO\ Feature\ PF6\ Cid=-
600RIF.RIFAWARE.GPIO\ Feature\ PF6\ Secure=false
601RIF.RIFAWARE.GPIO\ Feature\ PF7\ Cid=-
602RIF.RIFAWARE.GPIO\ Feature\ PF7\ Secure=false
603RIF.RIFAWARE.GPIO\ Feature\ PF8\ Cid=-
604RIF.RIFAWARE.GPIO\ Feature\ PF8\ Secure=false
605RIF.RIFAWARE.GPIO\ Feature\ PF9\ Cid=-
606RIF.RIFAWARE.GPIO\ Feature\ PF9\ Secure=false
[28]607RIF.RIFAWARE.GPIO\ Feature\ PG0\ Cid=-
608RIF.RIFAWARE.GPIO\ Feature\ PG0\ Secure=false
[16]609RIF.RIFAWARE.GPIO\ Feature\ PG1\ Cid=-
610RIF.RIFAWARE.GPIO\ Feature\ PG1\ Secure=false
611RIF.RIFAWARE.GPIO\ Feature\ PG10\ Cid=-
612RIF.RIFAWARE.GPIO\ Feature\ PG10\ Secure=false
613RIF.RIFAWARE.GPIO\ Feature\ PG11\ Cid=-
614RIF.RIFAWARE.GPIO\ Feature\ PG11\ Secure=false
615RIF.RIFAWARE.GPIO\ Feature\ PG12\ Cid=-
616RIF.RIFAWARE.GPIO\ Feature\ PG12\ Secure=false
617RIF.RIFAWARE.GPIO\ Feature\ PG13\ Cid=-
618RIF.RIFAWARE.GPIO\ Feature\ PG13\ Secure=false
619RIF.RIFAWARE.GPIO\ Feature\ PG14\ Cid=-
620RIF.RIFAWARE.GPIO\ Feature\ PG14\ Secure=false
621RIF.RIFAWARE.GPIO\ Feature\ PG15\ Cid=-
622RIF.RIFAWARE.GPIO\ Feature\ PG15\ Secure=false
623RIF.RIFAWARE.GPIO\ Feature\ PG2\ Cid=-
624RIF.RIFAWARE.GPIO\ Feature\ PG2\ Secure=false
625RIF.RIFAWARE.GPIO\ Feature\ PG3\ Cid=-
626RIF.RIFAWARE.GPIO\ Feature\ PG3\ Secure=false
627RIF.RIFAWARE.GPIO\ Feature\ PG4\ Cid=-
628RIF.RIFAWARE.GPIO\ Feature\ PG4\ Secure=false
629RIF.RIFAWARE.GPIO\ Feature\ PG5\ Cid=-
630RIF.RIFAWARE.GPIO\ Feature\ PG5\ Secure=false
631RIF.RIFAWARE.GPIO\ Feature\ PG6\ Cid=-
632RIF.RIFAWARE.GPIO\ Feature\ PG6\ Secure=false
633RIF.RIFAWARE.GPIO\ Feature\ PG7\ Cid=-
634RIF.RIFAWARE.GPIO\ Feature\ PG7\ Secure=false
635RIF.RIFAWARE.GPIO\ Feature\ PG8\ Cid=-
636RIF.RIFAWARE.GPIO\ Feature\ PG8\ Secure=false
637RIF.RIFAWARE.GPIO\ Feature\ PG9\ Cid=-
638RIF.RIFAWARE.GPIO\ Feature\ PG9\ Secure=false
639RIF.RIFAWARE.GPIO\ Feature\ PH2\ Cid=-
640RIF.RIFAWARE.GPIO\ Feature\ PH2\ Secure=false
641RIF.RIFAWARE.GPIO\ Feature\ PH3\ Cid=-
642RIF.RIFAWARE.GPIO\ Feature\ PH3\ Secure=false
643RIF.RIFAWARE.GPIO\ Feature\ PH4\ Cid=-
644RIF.RIFAWARE.GPIO\ Feature\ PH4\ Secure=false
645RIF.RIFAWARE.GPIO\ Feature\ PH5\ Cid=-
646RIF.RIFAWARE.GPIO\ Feature\ PH5\ Secure=false
647RIF.RIFAWARE.GPIO\ Feature\ PH6\ Cid=-
648RIF.RIFAWARE.GPIO\ Feature\ PH6\ Secure=false
649RIF.RIFAWARE.GPIO\ Feature\ PH7\ Cid=-
650RIF.RIFAWARE.GPIO\ Feature\ PH7\ Secure=false
651RIF.RIFAWARE.GPIO\ Feature\ PH8\ Cid=-
652RIF.RIFAWARE.GPIO\ Feature\ PH8\ Secure=false
653RIF.RIFAWARE.GPIO\ Feature\ PH9\ Cid=-
654RIF.RIFAWARE.GPIO\ Feature\ PH9\ Secure=false
655RIF.RIFAWARE.GPIO\ Feature\ PN0\ Cid=-
656RIF.RIFAWARE.GPIO\ Feature\ PN0\ Secure=false
657RIF.RIFAWARE.GPIO\ Feature\ PN1\ Cid=-
658RIF.RIFAWARE.GPIO\ Feature\ PN1\ Secure=false
659RIF.RIFAWARE.GPIO\ Feature\ PN10\ Cid=-
660RIF.RIFAWARE.GPIO\ Feature\ PN10\ Secure=false
661RIF.RIFAWARE.GPIO\ Feature\ PN11\ Cid=-
662RIF.RIFAWARE.GPIO\ Feature\ PN11\ Secure=false
663RIF.RIFAWARE.GPIO\ Feature\ PN12\ Cid=-
664RIF.RIFAWARE.GPIO\ Feature\ PN12\ Secure=false
665RIF.RIFAWARE.GPIO\ Feature\ PN2\ Cid=-
666RIF.RIFAWARE.GPIO\ Feature\ PN2\ Secure=false
667RIF.RIFAWARE.GPIO\ Feature\ PN3\ Cid=-
668RIF.RIFAWARE.GPIO\ Feature\ PN3\ Secure=false
669RIF.RIFAWARE.GPIO\ Feature\ PN4\ Cid=-
670RIF.RIFAWARE.GPIO\ Feature\ PN4\ Secure=false
671RIF.RIFAWARE.GPIO\ Feature\ PN5\ Cid=-
672RIF.RIFAWARE.GPIO\ Feature\ PN5\ Secure=false
673RIF.RIFAWARE.GPIO\ Feature\ PN6\ Cid=-
674RIF.RIFAWARE.GPIO\ Feature\ PN6\ Secure=false
675RIF.RIFAWARE.GPIO\ Feature\ PN7\ Cid=-
676RIF.RIFAWARE.GPIO\ Feature\ PN7\ Secure=false
677RIF.RIFAWARE.GPIO\ Feature\ PN8\ Cid=-
678RIF.RIFAWARE.GPIO\ Feature\ PN8\ Secure=false
679RIF.RIFAWARE.GPIO\ Feature\ PN9\ Cid=-
680RIF.RIFAWARE.GPIO\ Feature\ PN9\ Secure=false
681RIF.RIFAWARE.GPIO\ Feature\ PO0\ Cid=-
682RIF.RIFAWARE.GPIO\ Feature\ PO0\ Secure=false
[28]683RIF.RIFAWARE.GPIO\ Feature\ PO1\ Cid=1
684RIF.RIFAWARE.GPIO\ Feature\ PO1\ FSBL=true
685RIF.RIFAWARE.GPIO\ Feature\ PO1\ Secure=true
[16]686RIF.RIFAWARE.GPIO\ Feature\ PO2\ Cid=-
687RIF.RIFAWARE.GPIO\ Feature\ PO2\ Secure=false
688RIF.RIFAWARE.GPIO\ Feature\ PO3\ Cid=-
689RIF.RIFAWARE.GPIO\ Feature\ PO3\ Secure=false
690RIF.RIFAWARE.GPIO\ Feature\ PO4\ Cid=-
691RIF.RIFAWARE.GPIO\ Feature\ PO4\ Secure=false
692RIF.RIFAWARE.GPIO\ Feature\ PO5\ Cid=-
693RIF.RIFAWARE.GPIO\ Feature\ PO5\ Secure=false
694RIF.RIFAWARE.GPIO\ Feature\ PP0\ Cid=-
695RIF.RIFAWARE.GPIO\ Feature\ PP0\ Secure=false
696RIF.RIFAWARE.GPIO\ Feature\ PP1\ Cid=-
697RIF.RIFAWARE.GPIO\ Feature\ PP1\ Secure=false
698RIF.RIFAWARE.GPIO\ Feature\ PP10\ Cid=-
699RIF.RIFAWARE.GPIO\ Feature\ PP10\ Secure=false
700RIF.RIFAWARE.GPIO\ Feature\ PP11\ Cid=-
701RIF.RIFAWARE.GPIO\ Feature\ PP11\ Secure=false
702RIF.RIFAWARE.GPIO\ Feature\ PP12\ Cid=-
703RIF.RIFAWARE.GPIO\ Feature\ PP12\ Secure=false
704RIF.RIFAWARE.GPIO\ Feature\ PP13\ Cid=-
705RIF.RIFAWARE.GPIO\ Feature\ PP13\ Secure=false
706RIF.RIFAWARE.GPIO\ Feature\ PP14\ Cid=-
707RIF.RIFAWARE.GPIO\ Feature\ PP14\ Secure=false
708RIF.RIFAWARE.GPIO\ Feature\ PP15\ Cid=-
709RIF.RIFAWARE.GPIO\ Feature\ PP15\ Secure=false
710RIF.RIFAWARE.GPIO\ Feature\ PP2\ Cid=-
711RIF.RIFAWARE.GPIO\ Feature\ PP2\ Secure=false
712RIF.RIFAWARE.GPIO\ Feature\ PP3\ Cid=-
713RIF.RIFAWARE.GPIO\ Feature\ PP3\ Secure=false
714RIF.RIFAWARE.GPIO\ Feature\ PP4\ Cid=-
715RIF.RIFAWARE.GPIO\ Feature\ PP4\ Secure=false
716RIF.RIFAWARE.GPIO\ Feature\ PP5\ Cid=-
717RIF.RIFAWARE.GPIO\ Feature\ PP5\ Secure=false
718RIF.RIFAWARE.GPIO\ Feature\ PP6\ Cid=-
719RIF.RIFAWARE.GPIO\ Feature\ PP6\ Secure=false
720RIF.RIFAWARE.GPIO\ Feature\ PP7\ Cid=-
721RIF.RIFAWARE.GPIO\ Feature\ PP7\ Secure=false
722RIF.RIFAWARE.GPIO\ Feature\ PP8\ Cid=-
723RIF.RIFAWARE.GPIO\ Feature\ PP8\ Secure=false
724RIF.RIFAWARE.GPIO\ Feature\ PP9\ Cid=-
725RIF.RIFAWARE.GPIO\ Feature\ PP9\ Secure=false
726RIF.RIFAWARE.GPIO\ Feature\ PQ0\ Cid=-
727RIF.RIFAWARE.GPIO\ Feature\ PQ0\ Secure=false
728RIF.RIFAWARE.GPIO\ Feature\ PQ1\ Cid=-
729RIF.RIFAWARE.GPIO\ Feature\ PQ1\ Secure=false
730RIF.RIFAWARE.GPIO\ Feature\ PQ2\ Cid=-
731RIF.RIFAWARE.GPIO\ Feature\ PQ2\ Secure=false
732RIF.RIFAWARE.GPIO\ Feature\ PQ3\ Cid=-
733RIF.RIFAWARE.GPIO\ Feature\ PQ3\ Secure=false
734RIF.RIFAWARE.GPIO\ Feature\ PQ4\ Cid=-
735RIF.RIFAWARE.GPIO\ Feature\ PQ4\ Secure=false
736RIF.RIFAWARE.GPIO\ Feature\ PQ5\ Cid=-
737RIF.RIFAWARE.GPIO\ Feature\ PQ5\ Secure=false
738RIF.RIFAWARE.GPIO\ Feature\ PQ6\ Cid=-
739RIF.RIFAWARE.GPIO\ Feature\ PQ6\ Secure=false
740RIF.RIFAWARE.GPIO\ Feature\ PQ7\ Cid=-
741RIF.RIFAWARE.GPIO\ Feature\ PQ7\ Secure=false
742RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 0\ Cid=-
743RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 0\ Privilege=true
744RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 0\ Secure=false
745RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 1\ Cid=-
746RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 1\ Privilege=true
747RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 1\ Secure=false
748RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 10\ Cid=-
749RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 10\ Privilege=true
750RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 10\ Secure=false
751RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 11\ Cid=-
752RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 11\ Privilege=true
753RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 11\ Secure=false
754RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 12\ Cid=-
755RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 12\ Privilege=true
756RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 12\ Secure=false
757RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 13\ Cid=-
758RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 13\ Privilege=true
759RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 13\ Secure=false
760RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 14\ Cid=-
761RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 14\ Privilege=true
762RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 14\ Secure=false
763RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 15\ Cid=-
764RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 15\ Privilege=true
765RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 15\ Secure=false
766RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 2\ Cid=-
767RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 2\ Privilege=true
768RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 2\ Secure=false
769RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 3\ Cid=-
770RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 3\ Privilege=true
771RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 3\ Secure=false
772RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 4\ Cid=-
773RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 4\ Privilege=true
774RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 4\ Secure=false
775RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 5\ Cid=-
776RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 5\ Privilege=true
777RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 5\ Secure=false
778RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 6\ Cid=-
779RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 6\ Privilege=true
780RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 6\ Secure=false
781RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 7\ Cid=-
782RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 7\ Privilege=true
783RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 7\ Secure=false
784RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 8\ Cid=-
785RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 8\ Privilege=true
786RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 8\ Secure=false
787RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 9\ Cid=-
788RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 9\ Privilege=true
789RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 9\ Secure=false
790RIF.RIFAWARE.LTDC\ Feature\ LTDC_L1\ Cid=-
791RIF.RIFAWARE.LTDC\ Feature\ LTDC_L1\ Secure=false
792RIF.RIFAWARE.LTDC\ Feature\ LTDC_L2\ Cid=-
793RIF.RIFAWARE.LTDC\ Feature\ LTDC_L2\ Secure=false
794RIF.RIFAWARE.PWR\ Feature\ Backup\ domain\ protection\ Cid=-
795RIF.RIFAWARE.PWR\ Feature\ Backup\ domain\ protection\ Secure=false
796RIF.RIFAWARE.PWR\ Feature\ CPU\ power\ control\ protection\ Cid=-
797RIF.RIFAWARE.PWR\ Feature\ CPU\ power\ control\ protection\ Secure=false
798RIF.RIFAWARE.PWR\ Feature\ I-TCM,\ D-TCM,\ and\ I-TCM\ FLEXMEM\ low\ power\ control\ protection\ Cid=-
799RIF.RIFAWARE.PWR\ Feature\ I-TCM,\ D-TCM,\ and\ I-TCM\ FLEXMEM\ low\ power\ control\ protection\ Secure=false
800RIF.RIFAWARE.PWR\ Feature\ Peripheral\ voltage\ monitor\ protection\ Cid=-
801RIF.RIFAWARE.PWR\ Feature\ Peripheral\ voltage\ monitor\ protection\ Secure=false
802RIF.RIFAWARE.PWR\ Feature\ Programmable\ voltage\ detector\ protection\ Cid=-
803RIF.RIFAWARE.PWR\ Feature\ Programmable\ voltage\ detector\ protection\ Secure=false
804RIF.RIFAWARE.PWR\ Feature\ System\ supply\ configuration\ protection\ Cid=-
805RIF.RIFAWARE.PWR\ Feature\ System\ supply\ configuration\ protection\ Secure=false
806RIF.RIFAWARE.PWR\ Feature\ VDDCORE\ monitor\ protection\ Cid=-
807RIF.RIFAWARE.PWR\ Feature\ VDDCORE\ monitor\ protection\ Secure=false
808RIF.RIFAWARE.PWR\ Feature\ Voltage\ scaling\ selection\ protection\ Cid=-
809RIF.RIFAWARE.PWR\ Feature\ Voltage\ scaling\ selection\ protection\ Secure=false
810RIF.RIFAWARE.PWR\ Feature\ WKUP1\ pin\ protection\ Cid=-
811RIF.RIFAWARE.PWR\ Feature\ WKUP1\ pin\ protection\ Secure=false
812RIF.RIFAWARE.PWR\ Feature\ WKUP2\ pin\ protection\ Cid=-
813RIF.RIFAWARE.PWR\ Feature\ WKUP2\ pin\ protection\ Secure=false
814RIF.RIFAWARE.PWR\ Feature\ WKUP3\ pin\ protection\ Cid=-
815RIF.RIFAWARE.PWR\ Feature\ WKUP3\ pin\ protection\ Secure=false
816RIF.RIFAWARE.PWR\ Feature\ WKUP4\ pin\ protection\ Cid=-
817RIF.RIFAWARE.PWR\ Feature\ WKUP4\ pin\ protection\ Secure=false
818RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ BUS\ system\ configuration\ bits\ Cid=-
819RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ BUS\ system\ configuration\ bits\ Secure=false
820RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ DFT\ system\ configuration\ bits\ Cid=-
821RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ DFT\ system\ configuration\ bits\ Secure=false
822RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC1\ divider\ configuration\ bits\ Cid=-
823RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC1\ divider\ configuration\ bits\ Secure=false
824RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC10\ divider\ configuration\ bits\ Cid=-
825RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC10\ divider\ configuration\ bits\ Secure=false
826RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC11\ divider\ configuration\ bits\ Cid=-
827RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC11\ divider\ configuration\ bits\ Secure=false
828RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC12\ divider\ configuration\ bits\ Cid=-
829RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC12\ divider\ configuration\ bits\ Secure=false
830RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC13\ divider\ configuration\ bits\ Cid=-
831RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC13\ divider\ configuration\ bits\ Secure=false
832RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC14\ divider\ configuration\ bits\ Cid=-
833RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC14\ divider\ configuration\ bits\ Secure=false
834RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC15\ divider\ configuration\ bits\ Cid=-
835RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC15\ divider\ configuration\ bits\ Secure=false
836RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC16\ divider\ configuration\ bits\ Cid=-
837RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC16\ divider\ configuration\ bits\ Secure=false
838RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC17\ divider\ configuration\ bits\ Cid=-
839RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC17\ divider\ configuration\ bits\ Secure=false
840RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC18\ divider\ configuration\ bits\ Cid=-
841RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC18\ divider\ configuration\ bits\ Secure=false
842RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC19\ divider\ configuration\ bits\ Cid=-
843RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC19\ divider\ configuration\ bits\ Secure=false
844RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC2\ divider\ configuration\ bits\ Cid=-
845RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC2\ divider\ configuration\ bits\ Secure=false
846RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC20\ divider\ configuration\ bits\ Cid=-
847RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC20\ divider\ configuration\ bits\ Secure=false
848RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC3\ divider\ configuration\ bits\ Cid=-
849RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC3\ divider\ configuration\ bits\ Secure=false
850RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC4\ divider\ configuration\ bits\ Cid=-
851RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC4\ divider\ configuration\ bits\ Secure=false
852RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC5\ divider\ configuration\ bits\ Cid=-
853RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC5\ divider\ configuration\ bits\ Secure=false
854RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC6\ divider\ configuration\ bits\ Cid=-
855RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC6\ divider\ configuration\ bits\ Secure=false
856RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC7\ divider\ configuration\ bits\ Cid=-
857RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC7\ divider\ configuration\ bits\ Secure=false
858RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC8\ divider\ configuration\ bits\ Cid=-
859RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC8\ divider\ configuration\ bits\ Secure=false
860RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC9\ divider\ configuration\ bits\ Cid=-
861RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC9\ divider\ configuration\ bits\ Secure=false
862RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ INT\ system\ configuration\ bits\ Cid=-
863RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ INT\ system\ configuration\ bits\ Secure=false
864RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ MOD\ system\ configuration\ bits\ Cid=-
865RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ MOD\ system\ configuration\ bits\ Secure=false
866RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ PER\ system\ configuration\ bits\ Cid=-
867RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ PER\ system\ configuration\ bits\ Secure=false
868RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ PLL1\ configuration\ bits\u200B\ Cid=-
869RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ PLL1\ configuration\ bits\u200B\ Secure=false
870RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ PLL2\ configuration\ bits\ Cid=-
871RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ PLL2\ configuration\ bits\ Secure=false
872RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ PLL3\ configuration\ bits\ Cid=-
873RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ PLL3\ configuration\ bits\ Secure=false
874RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ PLL4\ configuration\ bits\ Cid=-
875RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ PLL4\ configuration\ bits\ Secure=false
876RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ RST\ system\ configuration\ bits\ Cid=-
877RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ RST\ system\ configuration\ bits\ Secure=false
878RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ SYS\ system\ configuration\ bit\ Cid=-
879RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ SYS\ system\ configuration\ bit\ Secure=false
880RIF.RIFAWARE.RCC\ Feature\ protection\ of\ ACLKN\ bus\ configuration\ bits\ Cid=-
881RIF.RIFAWARE.RCC\ Feature\ protection\ of\ ACLKN\ bus\ configuration\ bits\ Secure=false
882RIF.RIFAWARE.RCC\ Feature\ protection\ of\ ACLKNC\ bus\ configuration\ bits\ Cid=-
883RIF.RIFAWARE.RCC\ Feature\ protection\ of\ ACLKNC\ bus\ configuration\ bits\ Secure=false
884RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHB1\ bus\ configuration\ bits\ Cid=-
885RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHB1\ bus\ configuration\ bits\ Secure=false
886RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHB2\ bus\ configuration\ bits\ Cid=-
887RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHB2\ bus\ configuration\ bits\ Secure=false
888RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHB3\ bus\ configuration\ bits\ Cid=-
889RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHB3\ bus\ configuration\ bits\ Secure=false
890RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHB4\ bus\ configuration\ bits\ Cid=-
891RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHB4\ bus\ configuration\ bits\ Secure=false
892RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHB5\ bus\ configuration\ bits\ Cid=-
893RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHB5\ bus\ configuration\ bits\ Secure=false
894RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHBM\ bus\ configuration\ bits\ Cid=-
895RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHBM\ bus\ configuration\ bits\ Secure=false
896RIF.RIFAWARE.RCC\ Feature\ protection\ of\ APB1\ bus\ configuration\ bits\ Cid=-
897RIF.RIFAWARE.RCC\ Feature\ protection\ of\ APB1\ bus\ configuration\ bits\ Secure=false
898RIF.RIFAWARE.RCC\ Feature\ protection\ of\ APB2\ bus\ configuration\ bits\ Cid=-
899RIF.RIFAWARE.RCC\ Feature\ protection\ of\ APB2\ bus\ configuration\ bits\ Secure=false
900RIF.RIFAWARE.RCC\ Feature\ protection\ of\ APB3\ bus\ configuration\ bits\ Cid=-
901RIF.RIFAWARE.RCC\ Feature\ protection\ of\ APB3\ bus\ configuration\ bits\ Secure=false
902RIF.RIFAWARE.RCC\ Feature\ protection\ of\ APB4\ bus\ configuration\ bits\ Cid=-
903RIF.RIFAWARE.RCC\ Feature\ protection\ of\ APB4\ bus\ configuration\ bits\ Secure=false
904RIF.RIFAWARE.RCC\ Feature\ protection\ of\ APB5\ bus\ configuration\ bits\ Cid=-
905RIF.RIFAWARE.RCC\ Feature\ protection\ of\ APB5\ bus\ configuration\ bits\ Secure=false
906RIF.RIFAWARE.RCC\ Feature\ protection\ of\ NOC\ bus\ configuration\ bits\ Cid=-
907RIF.RIFAWARE.RCC\ Feature\ protection\ of\ NOC\ bus\ configuration\ bits\ Secure=false
908RIF.RIFAWARE.RTC\ Feature\ Alarm\ A\ and\ SSR\ underflow\ protection\u200B\ Cid=-
909RIF.RIFAWARE.RTC\ Feature\ Alarm\ A\ and\ SSR\ underflow\ protection\u200B\ Secure=false
910RIF.RIFAWARE.RTC\ Feature\ Alarm\ B\ protection\ Cid=-
911RIF.RIFAWARE.RTC\ Feature\ Alarm\ B\ protection\ Secure=false
912RIF.RIFAWARE.RTC\ Feature\ Initialization\ protection\ Cid=-
913RIF.RIFAWARE.RTC\ Feature\ Initialization\ protection\ Secure=false
914RIF.RIFAWARE.RTC\ Feature\ RTC\ global\ protection\ Cid=-
915RIF.RIFAWARE.RTC\ Feature\ RTC\ global\ protection\ Secure=false
916RIF.RIFAWARE.RTC\ Feature\ Shift\ register,\ daylight\ saving,\ calibration\ and\ reference\ clock\ protection\ Cid=-
917RIF.RIFAWARE.RTC\ Feature\ Shift\ register,\ daylight\ saving,\ calibration\ and\ reference\ clock\ protection\ Secure=false
918RIF.RIFAWARE.RTC\ Feature\ Timestamp\ protection\ Cid=-
919RIF.RIFAWARE.RTC\ Feature\ Timestamp\ protection\ Secure=false
920RIF.RIFAWARE.RTC\ Feature\ Wake-up\ timer\ protection\ Cid=-
921RIF.RIFAWARE.RTC\ Feature\ Wake-up\ timer\ protection\ Secure=false
922RIF.SDMMC1_CID_RIMU=0
923RIF.SDMMC2_CID_RIMU=0
924RIF.VENC_CID_RIMU=0
925RIF.default_config=false
[18]926VP_BSEC_VS_BSEC.Mode=BSEC_Activate
927VP_BSEC_VS_BSEC.Signal=BSEC_VS_BSEC
928VP_EXTMEM_MANAGER_SIG_Activate_EXTMEM.Mode=Activate_EXTMEM
929VP_EXTMEM_MANAGER_SIG_Activate_EXTMEM.Signal=EXTMEM_MANAGER_SIG_Activate_EXTMEM
[27]930VP_RAMCFG_VS_AHBSRAM1.Mode=AHBSRAMCFG1_Activate
931VP_RAMCFG_VS_AHBSRAM1.Signal=RAMCFG_VS_AHBSRAM1
932VP_RAMCFG_VS_AHBSRAM2.Mode=AHBSRAMCFG2_Activate
933VP_RAMCFG_VS_AHBSRAM2.Signal=RAMCFG_VS_AHBSRAM2
934VP_RAMCFG_VS_BKPRAM.Mode=BKPRAM_Activate
935VP_RAMCFG_VS_BKPRAM.Signal=RAMCFG_VS_BKPRAM
936VP_RAMCFG_VS_FLEXRAM.Mode=FLEXRAM_Activate
937VP_RAMCFG_VS_FLEXRAM.Signal=RAMCFG_VS_FLEXRAM
938VP_RAMCFG_VS_RAMCFG1.Mode=RAMCFG1_Activate
939VP_RAMCFG_VS_RAMCFG1.Signal=RAMCFG_VS_RAMCFG1
940VP_RAMCFG_VS_RAMCFG2.Mode=RAMCFG2_Activate
941VP_RAMCFG_VS_RAMCFG2.Signal=RAMCFG_VS_RAMCFG2
942VP_RAMCFG_VS_RAMCFG3.Mode=RAMCFG3_Activate
943VP_RAMCFG_VS_RAMCFG3.Signal=RAMCFG_VS_RAMCFG3
944VP_RAMCFG_VS_RAMCFG4.Mode=RAMCFG4_Activate
945VP_RAMCFG_VS_RAMCFG4.Signal=RAMCFG_VS_RAMCFG4
946VP_RAMCFG_VS_RAMCFG5.Mode=RAMCFG5_Activate
947VP_RAMCFG_VS_RAMCFG5.Signal=RAMCFG_VS_RAMCFG5
948VP_RAMCFG_VS_RAMCFG6.Mode=RAMCFG6_Activate
949VP_RAMCFG_VS_RAMCFG6.Signal=RAMCFG_VS_RAMCFG6
950VP_RAMCFG_VS_VENCRAM.Mode=VENCRAM_Activate
951VP_RAMCFG_VS_VENCRAM.Signal=RAMCFG_VS_VENCRAM
[16]952VP_RIF_VS_RIF1.Mode=RISUP
953VP_RIF_VS_RIF1.Signal=RIF_VS_RIF1
[36]954VP_SYS_S_VS_tim18.Mode=TIM18
955VP_SYS_S_VS_tim18.Signal=SYS_S_VS_tim18
[16]956VP_XSPI2_VS_octo.Mode=octo_mode
957VP_XSPI2_VS_octo.Signal=XSPI2_VS_octo
958VP_XSPIM_VS_IO.Mode=Direct
959VP_XSPIM_VS_IO.Signal=XSPIM_VS_IO
960XSPI2.ChipSelectHighTimeCycle=2
961XSPI2.ClockPrescaler=0
962XSPI2.DelayHoldQuarterCycle=HAL_XSPI_DHQC_ENABLE
963XSPI2.FifoThresholdByte=4
964XSPI2.IPParameters=FifoThresholdByte,MemoryType,MemorySize,ClockPrescaler,DelayHoldQuarterCycle,MemoryMode,ChipSelectHighTimeCycle
965XSPI2.MemoryMode=HAL_XSPI_SINGLE_MEM
966XSPI2.MemorySize=HAL_XSPI_SIZE_512MB
967XSPI2.MemoryType=HAL_XSPI_MEMTYPE_MACRONIX
968board=custom
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