source: trunk/firmware/FSBL/CubeMX/blto2_FSBL.ioc@ 27

Last change on this file since 27 was 27, checked in by Zed, 3 weeks ago

In FSBL all RAM ranges were activated.

File size: 47.3 KB
RevLine 
[16]1#MicroXplorer Configuration settings - do not modify
2Appli.IPs=CORTEX_M55_S,GPDMA1,HPDMA1,LINKEDLIST,RCC,GPIO,NVIC1\:I,RIF,SAU
3CAD.formats=
4CAD.pinconfig=
5CAD.provider=
6CORTEX_M55_FSBL.CPU_DCache=Enabled
7CORTEX_M55_FSBL.CPU_ICache=Enabled
8CORTEX_M55_FSBL.IPParameters=CPU_ICache,CPU_DCache
9CORTEX_M55_S.AccessPermission-Cortex_Memory_Protection_Unit_Region0_Settings=MPU_REGION_ALL_RW
10CORTEX_M55_S.Attributes0=MPU_ATTRIBUTES_NUMBER0
11CORTEX_M55_S.BaseAddress-Cortex_Memory_Protection_Unit_Region0_Settings=__NON_CACHEABLE_SECTION_BEGIN
12CORTEX_M55_S.CPU_DCache=Enabled
13CORTEX_M55_S.CPU_ICache=Enabled
14CORTEX_M55_S.Enable-Cortex_Memory_Protection_Unit_Region0_Settings=MPU_REGION_ENABLE
15CORTEX_M55_S.IPParameters=CPU_ICache,CPU_DCache,MPU_Control,Enable-Cortex_Memory_Protection_Unit_Region0_Settings,Attributes0,BaseAddress-Cortex_Memory_Protection_Unit_Region0_Settings,LimitAddress-Cortex_Memory_Protection_Unit_Region0_Settings,AccessPermission-Cortex_Memory_Protection_Unit_Region0_Settings
16CORTEX_M55_S.LimitAddress-Cortex_Memory_Protection_Unit_Region0_Settings=__NON_CACHEABLE_SECTION_END
17CORTEX_M55_S.MPU_Control=MPU_HFNMI_PRIVDEF
[19]18EXTMEM_MANAGER.IPParameters=RefParam_MEMORY_1_ConfigType,RefParam_BOOT_enable,RefParam_XIP_ApplicationOffset
19EXTMEM_MANAGER.RefParam_BOOT_enable=true
[18]20EXTMEM_MANAGER.RefParam_MEMORY_1_ConfigType=EXTMEM_LINK_CONFIG_8LINES
[19]21EXTMEM_MANAGER.RefParam_XIP_ApplicationOffset=0x80000
[16]22ExtMemLoader.IPs=EXTMEM_LOADER,EXTMEM_MANAGER,RCC\:I,GPIO,TIM6
[27]23FSBL.IPs=CORTEX_M55_FSBL,GPDMA1\:I,HDP,HPDMA1\:I,LINKEDLIST,RCC,GPIO\:I,NVIC\:I,XSPIM,XSPI2,EXTMEM_MANAGER,BSEC,DEBUG,RAMCFG
[25]24FSBL.Pins=PB12,PG0
[16]25File.Version=6
26GPIO.groupedBy=Group By Peripherals
27KeepUserPlacement=false
28Mcu.CPN=STM32N657X0H3Q
29Mcu.Context0=FSBL
30Mcu.Context1=Appli
31Mcu.Context2=ExtMemLoader
32Mcu.ContextNb=3
33Mcu.ContextProject=FullSecure
34Mcu.Family=STM32N6
[18]35Mcu.IP0=BSEC
36Mcu.IP1=CORTEX_M55_FSBL
[27]37Mcu.IP10=XSPI2
38Mcu.IP11=XSPIM
[18]39Mcu.IP2=CORTEX_M55_S
[24]40Mcu.IP3=DEBUG
41Mcu.IP4=EXTMEM_MANAGER
42Mcu.IP5=NVIC1
43Mcu.IP6=NVIC
[27]44Mcu.IP7=RAMCFG
45Mcu.IP8=RCC
46Mcu.IP9=RIF
47Mcu.IPNb=12
[16]48Mcu.Name=STM32N657X0HxQ
49Mcu.Package=VFBGA264
50Mcu.Pin0=PN4
51Mcu.Pin1=PN6
[25]52Mcu.Pin10=PN9
53Mcu.Pin11=PN2
54Mcu.Pin12=PA13(JTMS/SWDIO)
55Mcu.Pin13=PB5(JTDO/TRACESWO)
56Mcu.Pin14=PN10
57Mcu.Pin15=PN11
58Mcu.Pin16=VP_BSEC_VS_BSEC
59Mcu.Pin17=VP_EXTMEM_MANAGER_SIG_Activate_EXTMEM
[27]60Mcu.Pin18=VP_RAMCFG_VS_RAMCFG1
61Mcu.Pin19=VP_RAMCFG_VS_RAMCFG2
[16]62Mcu.Pin2=PN8
[27]63Mcu.Pin20=VP_RAMCFG_VS_RAMCFG3
64Mcu.Pin21=VP_RAMCFG_VS_RAMCFG4
65Mcu.Pin22=VP_RAMCFG_VS_RAMCFG5
66Mcu.Pin23=VP_RAMCFG_VS_RAMCFG6
67Mcu.Pin24=VP_RAMCFG_VS_AHBSRAM1
68Mcu.Pin25=VP_RAMCFG_VS_AHBSRAM2
69Mcu.Pin26=VP_RAMCFG_VS_BKPRAM
70Mcu.Pin27=VP_RAMCFG_VS_FLEXRAM
71Mcu.Pin28=VP_RAMCFG_VS_VENCRAM
72Mcu.Pin29=VP_RIF_VS_RIF1
[16]73Mcu.Pin3=PN0
[27]74Mcu.Pin30=VP_XSPI2_VS_octo
75Mcu.Pin31=VP_XSPIM_VS_IO
[25]76Mcu.Pin4=PB12
77Mcu.Pin5=PG0
78Mcu.Pin6=PN3
79Mcu.Pin7=PN5
80Mcu.Pin8=PN1
81Mcu.Pin9=PA14(JTCK/SWCLK)
[27]82Mcu.PinsNb=32
[16]83Mcu.ThirdPartyNb=0
84Mcu.UserConstants=
85Mcu.UserName=STM32N657X0HxQ
86MxCube.Version=6.18.1
87MxDb.Version=DB.6.0.181
88NVIC.BFHFNMINS=0
89NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
90NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
91NVIC.ForceEnableDMAVector=true
92NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
93NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
94NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
95NVIC.PRIS=0
96NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
97NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
98NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
99NVIC.SecureFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
100NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:true\:false\:true\:false
101NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
102NVIC1.BFHFNMINS=0
103NVIC1.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
104NVIC1.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
105NVIC1.ForceEnableDMAVector=true
106NVIC1.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
107NVIC1.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
108NVIC1.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
109NVIC1.PRIS=0
110NVIC1.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
111NVIC1.PriorityGroup=NVIC_PRIORITYGROUP_4
112NVIC1.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
113NVIC1.SecureFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
114NVIC1.SysTick_IRQn=true\:15\:0\:false\:false\:true\:false\:true\:false
115NVIC1.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
[24]116PA13(JTMS/SWDIO).GPIOParameters=PinAttribute
[16]117PA13(JTMS/SWDIO).Locked=true
[24]118PA13(JTMS/SWDIO).Mode=Serial_Wire
119PA13(JTMS/SWDIO).PinAttribute=FSBL
[16]120PA13(JTMS/SWDIO).Signal=DEBUG_JTMS-SWDIO
[24]121PA14(JTCK/SWCLK).GPIOParameters=PinAttribute
[16]122PA14(JTCK/SWCLK).Locked=true
[24]123PA14(JTCK/SWCLK).Mode=Serial_Wire
124PA14(JTCK/SWCLK).PinAttribute=FSBL
[16]125PA14(JTCK/SWCLK).Signal=DEBUG_JTCK-SWCLK
[25]126PB12.ContextOwner=FSBL
127PB12.GPIOParameters=PinState,GPIO_Label,PinAttribute
128PB12.GPIO_Label=EXT_SMPS
129PB12.Locked=true
130PB12.PinAttribute=FSBL
131PB12.PinState=GPIO_PIN_SET
132PB12.Signal=GPIO_Output
[24]133PB5(JTDO/TRACESWO).GPIOParameters=PinAttribute
134PB5(JTDO/TRACESWO).Locked=true
135PB5(JTDO/TRACESWO).PinAttribute=FSBL
136PB5(JTDO/TRACESWO).Signal=DEBUG_JTDO-SWO
[16]137PCC.Bar.Display=Horizontal Bar
138PCC.Checker=false
139PCC.Display=Plot\: All Steps
140PCC.Line=STM32N6x7
141PCC.MCU=STM32N657X0HxQ
142PCC.PartNumber=STM32N657X0HxQ
143PCC.SequenceTime=1.0 ms
144PCC.SequenceTime.Unit=ms
145PCC.Series=STM32N6
146PCC.Temperature=25
147PCC.Vdd=1.8
148PG0.ContextOwner=FSBL
149PG0.GPIOParameters=GPIO_Label,PinAttribute
150PG0.GPIO_Label=GREEN_LED
151PG0.Locked=true
152PG0.PinAttribute=FSBL
153PG0.Signal=GPIO_Output
154PN0.GPIOParameters=PinAttribute
155PN0.Mode=XSPI2_Port2Octo
156PN0.PinAttribute=FSBL
157PN0.Signal=XSPIM_P2_DQS0
158PN1.GPIOParameters=PinAttribute
159PN1.Mode=XSPI2_NCS1_Port2
160PN1.PinAttribute=FSBL
161PN1.Signal=XSPIM_P2_NCS1
162PN10.GPIOParameters=PinAttribute
163PN10.Mode=XSPI2_Port2Octo
164PN10.PinAttribute=FSBL
165PN10.Signal=XSPIM_P2_IO6
166PN11.GPIOParameters=PinAttribute
167PN11.Mode=XSPI2_Port2Octo
168PN11.PinAttribute=FSBL
169PN11.Signal=XSPIM_P2_IO7
170PN2.GPIOParameters=PinAttribute
171PN2.Mode=XSPI2_Port2Octo
172PN2.PinAttribute=FSBL
173PN2.Signal=XSPIM_P2_IO0
174PN3.GPIOParameters=PinAttribute
175PN3.Mode=XSPI2_Port2Octo
176PN3.PinAttribute=FSBL
177PN3.Signal=XSPIM_P2_IO1
178PN4.GPIOParameters=PinAttribute
179PN4.Mode=XSPI2_Port2Octo
180PN4.PinAttribute=FSBL
181PN4.Signal=XSPIM_P2_IO2
182PN5.GPIOParameters=PinAttribute
183PN5.Mode=XSPI2_Port2Octo
184PN5.PinAttribute=FSBL
185PN5.Signal=XSPIM_P2_IO3
186PN6.GPIOParameters=PinAttribute
187PN6.Mode=XSPI2_Port2Octo
188PN6.PinAttribute=FSBL
189PN6.Signal=XSPIM_P2_CLK
190PN8.GPIOParameters=PinAttribute
191PN8.Mode=XSPI2_Port2Octo
192PN8.PinAttribute=FSBL
193PN8.Signal=XSPIM_P2_IO4
194PN9.GPIOParameters=PinAttribute
195PN9.Mode=XSPI2_Port2Octo
196PN9.PinAttribute=FSBL
197PN9.Signal=XSPIM_P2_IO5
198PinOutPanel.CurrentBGAView=Top
199PinOutPanel.RotationAngle=0
200ProjectManager.AskForMigrate=true
201ProjectManager.BackupPrevious=false
202ProjectManager.CompilerLinker=GCC
203ProjectManager.CompilerOptimize=6
204ProjectManager.ComputerToolchain=false
205ProjectManager.CoupleFile=true
[24]206ProjectManager.CustomerFirmwarePackage=..\\..\\..\\..\\..\\..\\STM32Cube\\Repository\\STM32Cube_FW_N6_V1.4.1
207ProjectManager.DefaultFWLocation=false
[16]208ProjectManager.DeletePrevious=true
209ProjectManager.DeviceId=STM32N657X0HxQ
210ProjectManager.Example=Template_FSBL_XIP
211ProjectManager.ExampleSource=CubeFw
212ProjectManager.FirmwarePackage=STM32Cube FW_N6 V1.4.1
[24]213ProjectManager.FreePins=false
[16]214ProjectManager.FreePinsContext=FSBL
215ProjectManager.HalAssertFull=true
216ProjectManager.HeapSize=FSBL-0x200,Appli-0x200,ExtMemLoader-0x200
217ProjectManager.KeepUserCode=true
218ProjectManager.LastFirmware=true
219ProjectManager.LibraryCopy=1
220ProjectManager.MainLocation=Src
221ProjectManager.NoMain=false
222ProjectManager.PreviousToolchain=
223ProjectManager.ProjectBuild=false
224ProjectManager.ProjectFileName=blto2_FSBL.ioc
225ProjectManager.ProjectName=blto2_FSBL
226ProjectManager.ProjectStructure=FSBL\:FSBL\:true;Appli\:Appli\:false;ExtMemLoader\:ExtMemLoader\:false;
227ProjectManager.RegisterCallBack=
228ProjectManager.StackSize=FSBL-0x800,Appli-0x800,ExtMemLoader-0x800
229ProjectManager.TargetToolchain=STM32CubeIDE
230ProjectManager.ToolChainLocation=
231ProjectManager.UAScriptAfterPath=
232ProjectManager.UAScriptBeforePath=
233ProjectManager.UnderRoot=false
[26]234ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false-FSBL,2-MX_GPIO_Init-GPIO-false-HAL-true-FSBL,3-MX_XSPI2_Init-XSPI2-false-HAL-true-FSBL,false-4-MX_XSPIM_Init-XSPIM-false-HAL-true-FSBL,5-MX_BSEC_Init-BSEC-false-HAL-true-FSBL,6-MX_EXTMEM_MANAGER_Init-EXTMEM_MANAGER-false-HAL-false-FSBL,1-SystemIsolation_Config-RIF-false-HAL-true-Appli,0-MX_CORTEX_M55_FSBL_Init-CORTEX_M55_FSBL-false-HAL-true-FSBL,0-MX_CORTEX_M55_S_Init-CORTEX_M55_S-false-HAL-true-Appli,1-MX_EXTMEM_MANAGER_Init-EXTMEM_MANAGER-false-HAL-false-ExtMemLoader
[27]235RAMCFG.IPParameters=Instance-RAMCFG1_Activate,Instance-RAMCFG2_Activate,Instance-RAMCFG3_Activate,Instance-RAMCFG4_Activate,Instance-RAMCFG5_Activate,Instance-RAMCFG6_Activate,Instance-AHBSRAMCFG1_Activate,Instance-AHBSRAMCFG2_Activate,Instance-BKPRAM_Activate,Instance-FLEXRAM_Activate,Instance-VENCRAM_Activate,SYSCFG_ITCM_size
236RAMCFG.Instance-AHBSRAMCFG1_Activate=RAMCFG_SRAM1_AHB
237RAMCFG.Instance-AHBSRAMCFG2_Activate=RAMCFG_SRAM2_AHB
238RAMCFG.Instance-BKPRAM_Activate=RAMCFG_BKPSRAM
239RAMCFG.Instance-FLEXRAM_Activate=RAMCFG_FLEXRAM
240RAMCFG.Instance-RAMCFG1_Activate=RAMCFG_SRAM1_AXI
241RAMCFG.Instance-RAMCFG2_Activate=RAMCFG_SRAM2_AXI
242RAMCFG.Instance-RAMCFG3_Activate=RAMCFG_SRAM3_AXI
243RAMCFG.Instance-RAMCFG4_Activate=RAMCFG_SRAM4_AXI
244RAMCFG.Instance-RAMCFG5_Activate=RAMCFG_SRAM5_AXI
245RAMCFG.Instance-RAMCFG6_Activate=RAMCFG_SRAM6_AXI
246RAMCFG.Instance-VENCRAM_Activate=RAMCFG_VENC_RAM
247RAMCFG.SYSCFG_ITCM_size=SYSCFG_ITCM_64K
[16]248RCC.ADC12Freq_Value=200000000
249RCC.ADFFreq_Value=200000000
250RCC.AHB1234Freq_Value=200000000
[25]251RCC.AHBFreq_Value=100000000
[16]252RCC.APB1Freq_Value=200000000
253RCC.APB2Freq_Value=200000000
254RCC.APB4Freq_Value=200000000
255RCC.APB5Freq_Value=200000000
256RCC.AXIClockFreq_Value=400000000
257RCC.CKPERFreq_Value=64000000
258RCC.CPUCLKSource=RCC_CPUCLKSOURCE_IC1
[25]259RCC.CortexFreq_Value=100000000
260RCC.CpuClockFreq_Value=800000000
[16]261RCC.DCMIPPFreq_Value=200000000
262RCC.ETH1Freq_Value=200000000
[25]263RCC.FBDIV4=125
[16]264RCC.FDCANFreq_Value=200000000
265RCC.FMCFreq_Value=200000000
[25]266RCC.FOUTPOSTDIV1Freq_Value=1600000000
[16]267RCC.FOUTPOSTDIV2Freq_Value=1600000000
268RCC.FOUTPOSTDIV3Freq_Value=1600000000
[25]269RCC.FOUTPOSTDIV4Freq_Value=1000000000
270RCC.FREFDIV4=8
[16]271RCC.FamilyName=M
272RCC.HSE_VALUE=48000000
273RCC.HSI_VALUE=64000000
274RCC.I2C1Freq_Value=200000000
275RCC.I2C2Freq_Value=200000000
276RCC.I2C3Freq_Value=200000000
277RCC.I2C4Freq_Value=200000000
278RCC.I3C1Freq_Value=200000000
279RCC.I3C2Freq_Value=200000000
280RCC.IC10Freq_VALUE=1600000000
281RCC.IC11Freq_VALUE=400000000
282RCC.IC12Freq_VALUE=1600000000
283RCC.IC13Freq_VALUE=1600000000
284RCC.IC14Freq_VALUE=1600000000
285RCC.IC15Freq_VALUE=1600000000
[25]286RCC.IC16Freq_VALUE=1000000000
287RCC.IC17Freq_VALUE=1000000000
288RCC.IC18Freq_VALUE=1000000000
289RCC.IC19Freq_VALUE=1000000000
[16]290RCC.IC1Div=2
[25]291RCC.IC1Freq_VALUE=800000000
292RCC.IC20Freq_VALUE=1000000000
[16]293RCC.IC2Freq_VALUE=400000000
[25]294RCC.IC3Div=32
[16]295RCC.IC3Freq_VALUE=50000000
[25]296RCC.IC4Freq_VALUE=1600000000
297RCC.IC5Freq_VALUE=1600000000
298RCC.IC6CLKSource=RCC_ICCLKSOURCE_PLL4
299RCC.IC6Div=1
300RCC.IC6Freq_VALUE=1000000000
[16]301RCC.IC7Freq_VALUE=1600000000
302RCC.IC8Freq_VALUE=1600000000
303RCC.IC9Freq_VALUE=1600000000
[26]304RCC.IPParameters=ADC12Freq_Value,ADFFreq_Value,AHB1234Freq_Value,AHBFreq_Value,APB1Freq_Value,APB2Freq_Value,APB4Freq_Value,APB5Freq_Value,AXIClockFreq_Value,CKPERFreq_Value,CPUCLKSource,CortexFreq_Value,CpuClockFreq_Value,DCMIPPFreq_Value,ETH1Freq_Value,FBDIV4,FDCANFreq_Value,FMCFreq_Value,FOUTPOSTDIV1Freq_Value,FOUTPOSTDIV2Freq_Value,FOUTPOSTDIV3Freq_Value,FOUTPOSTDIV4Freq_Value,FREFDIV4,FamilyName,HSE_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I3C1Freq_Value,I3C2Freq_Value,IC10Freq_VALUE,IC11Freq_VALUE,IC12Freq_VALUE,IC13Freq_VALUE,IC14Freq_VALUE,IC15Freq_VALUE,IC16Freq_VALUE,IC17Freq_VALUE,IC18Freq_VALUE,IC19Freq_VALUE,IC1Div,IC1Freq_VALUE,IC20Freq_VALUE,IC2Freq_VALUE,IC3Div,IC3Freq_VALUE,IC4Freq_VALUE,IC5Freq_VALUE,IC6CLKSource,IC6Div,IC6Freq_VALUE,IC7Freq_VALUE,IC8Freq_VALUE,IC9Freq_VALUE,LPTIM1Freq_Value,LPTIM2Freq_Value,LPTIM3Freq_Value,LPTIM4Freq_Value,LPTIM5Freq_Value,LPUART1Freq_Value,LSE_VALUE,LSI_VALUE,LTDCFreq_Value,MCO1PinFreq_Value,MCO2PinFreq_Value,MDFFreq_Value,MSI_VALUE,OTGHS1Freq_Value,OTGHS2Freq_Value,OTGPHY1Freq_Value,OTGPHY2Freq_Value,PSSIFreq_Value,RCC_MCO2Source,RCC_MCODiv1,RCC_MCODiv2,RTCFreq_Value,SAI1Freq_Value,SAI2Freq_Value,SDMMC1Freq_Value,SDMMC2Freq_Value,SPDIFRX1Freq_Value,SPI1Freq_Value,SPI2Freq_Value,SPI3Freq_Value,SPI4Freq_Value,SPI5Freq_Value,SPI6Freq_Value,SYSBCLKFreq_VALUE,SYSBCLKSource,SYSCCLKFreq_VALUE,SYSDCLKFreq_VALUE,TIMGFreq_Value,UART4Freq_Value,UART5Freq_Value,UART7Freq_Value,UART8Freq_Value,UART9Freq_Value,USART10Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USART6Freq_Value,VCO1OutputFreq_Value,VCO2OutputFreq_Value,VCO3OutputFreq_Value,VCO4OutputFreq_Value,VCOInput1Freq_Value,VCOInput2Freq_Value,VCOInput3Freq_Value,VCOInput4Freq_Value,XSPI1Freq_Value,XSPI2ClockSelection,XSPI2Freq_Value,XSPI3Freq_Value
[16]305RCC.LPTIM1Freq_Value=200000000
306RCC.LPTIM2Freq_Value=200000000
307RCC.LPTIM3Freq_Value=200000000
308RCC.LPTIM4Freq_Value=200000000
309RCC.LPTIM5Freq_Value=200000000
310RCC.LPUART1Freq_Value=200000000
311RCC.LSE_VALUE=32768
312RCC.LSI_VALUE=32000
313RCC.LTDCFreq_Value=200000000
[26]314RCC.MCO1PinFreq_Value=6400000
315RCC.MCO2PinFreq_Value=400000000
[16]316RCC.MDFFreq_Value=200000000
317RCC.MSI_VALUE=16000000
318RCC.OTGHS1Freq_Value=24000000
319RCC.OTGHS2Freq_Value=24000000
320RCC.OTGPHY1Freq_Value=24000000
321RCC.OTGPHY2Freq_Value=24000000
322RCC.PSSIFreq_Value=200000000
[26]323RCC.RCC_MCO2Source=RCC_MCO2SOURCE_IC15
324RCC.RCC_MCODiv1=RCC_MCODIV_10
325RCC.RCC_MCODiv2=RCC_MCODIV_4
[16]326RCC.RTCFreq_Value=32000
327RCC.SAI1Freq_Value=200000000
328RCC.SAI2Freq_Value=200000000
329RCC.SDMMC1Freq_Value=200000000
330RCC.SDMMC2Freq_Value=200000000
331RCC.SPDIFRX1Freq_Value=200000000
332RCC.SPI1Freq_Value=200000000
333RCC.SPI2Freq_Value=200000000
334RCC.SPI3Freq_Value=200000000
335RCC.SPI4Freq_Value=200000000
336RCC.SPI5Freq_Value=200000000
337RCC.SPI6Freq_Value=200000000
338RCC.SYSBCLKFreq_VALUE=400000000
339RCC.SYSBCLKSource=RCC_SYSCLKSOURCE_IC2_IC6_IC11
[25]340RCC.SYSCCLKFreq_VALUE=1000000000
[16]341RCC.SYSDCLKFreq_VALUE=400000000
342RCC.TIMGFreq_Value=400000000
343RCC.UART4Freq_Value=200000000
344RCC.UART5Freq_Value=200000000
345RCC.UART7Freq_Value=200000000
346RCC.UART8Freq_Value=200000000
347RCC.UART9Freq_Value=200000000
348RCC.USART10Freq_Value=200000000
349RCC.USART1Freq_Value=200000000
350RCC.USART2Freq_Value=200000000
351RCC.USART3Freq_Value=200000000
352RCC.USART6Freq_Value=200000000
[25]353RCC.VCO1OutputFreq_Value=1600000000
[16]354RCC.VCO2OutputFreq_Value=1600000000
355RCC.VCO3OutputFreq_Value=1600000000
[25]356RCC.VCO4OutputFreq_Value=1000000000
357RCC.VCOInput1Freq_Value=64000000
[16]358RCC.VCOInput2Freq_Value=64000000
359RCC.VCOInput3Freq_Value=64000000
[25]360RCC.VCOInput4Freq_Value=8000000
[16]361RCC.XSPI1Freq_Value=200000000
362RCC.XSPI2ClockSelection=RCC_XSPI2CLKSOURCE_IC3
363RCC.XSPI2Freq_Value=50000000
364RCC.XSPI3Freq_Value=200000000
365RIF.DCMIPP_CID_RIMU=0
366RIF.DMA2D_CID_RIMU=0
367RIF.ETH1_CID_RIMU=0
368RIF.ETR_CID_RIMU=0
369RIF.GPU_CID_RIMU=0
370RIF.IPParameters=ETR_CID_RIMU,SDMMC1_CID_RIMU,SDMMC2_CID_RIMU,OTG1_CID_RIMU,OTG2_CID_RIMU,ETH1_CID_RIMU,GPU_CID_RIMU,DMA2D_CID_RIMU,DCMIPP_CID_RIMU,VENC_CID_RIMU,LTDC_L1_CID_RIMU,LTDC_L2_CID_RIMU
371RIF.LTDC_L1_CID_RIMU=0
372RIF.LTDC_L2_CID_RIMU=0
373RIF.OTG1_CID_RIMU=0
374RIF.OTG2_CID_RIMU=0
375RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 0\ Cid=-
376RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 0\ Privilege=true
377RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 0\ Secure=false
378RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 1\ Cid=-
379RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 1\ Privilege=true
380RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 1\ Secure=false
381RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 10\ Cid=-
382RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 10\ Privilege=true
383RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 10\ Secure=false
384RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 11\ Cid=-
385RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 11\ Privilege=true
386RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 11\ Secure=false
387RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 12\ Cid=-
388RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 12\ Privilege=true
389RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 12\ Secure=false
390RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 13\ Cid=-
391RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 13\ Privilege=true
392RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 13\ Secure=false
393RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 14\ Cid=-
394RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 14\ Privilege=true
395RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 14\ Secure=false
396RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 15\ Cid=-
397RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 15\ Privilege=true
398RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 15\ Secure=false
399RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 2\ Cid=-
400RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 2\ Privilege=true
401RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 2\ Secure=false
402RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 3\ Cid=-
403RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 3\ Privilege=true
404RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 3\ Secure=false
405RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 4\ Cid=-
406RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 4\ Privilege=true
407RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 4\ Secure=false
408RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 5\ Cid=-
409RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 5\ Privilege=true
410RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 5\ Secure=false
411RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 6\ Cid=-
412RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 6\ Privilege=true
413RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 6\ Secure=false
414RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 7\ Cid=-
415RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 7\ Privilege=true
416RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 7\ Secure=false
417RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 8\ Cid=-
418RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 8\ Privilege=true
419RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 8\ Secure=false
420RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 9\ Cid=-
421RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 9\ Privilege=true
422RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 9\ Secure=false
423RIF.RIFAWARE.GPIO\ Feature\ PA0\ Cid=-
424RIF.RIFAWARE.GPIO\ Feature\ PA0\ Secure=false
425RIF.RIFAWARE.GPIO\ Feature\ PA1\ Cid=-
426RIF.RIFAWARE.GPIO\ Feature\ PA1\ Secure=false
427RIF.RIFAWARE.GPIO\ Feature\ PA10\ Cid=-
428RIF.RIFAWARE.GPIO\ Feature\ PA10\ Secure=false
429RIF.RIFAWARE.GPIO\ Feature\ PA11\ Cid=-
430RIF.RIFAWARE.GPIO\ Feature\ PA11\ Secure=false
431RIF.RIFAWARE.GPIO\ Feature\ PA12\ Cid=-
432RIF.RIFAWARE.GPIO\ Feature\ PA12\ Secure=false
433RIF.RIFAWARE.GPIO\ Feature\ PA2\ Cid=-
434RIF.RIFAWARE.GPIO\ Feature\ PA2\ Secure=false
435RIF.RIFAWARE.GPIO\ Feature\ PA3\ Cid=-
436RIF.RIFAWARE.GPIO\ Feature\ PA3\ Secure=false
437RIF.RIFAWARE.GPIO\ Feature\ PA4\ Cid=-
438RIF.RIFAWARE.GPIO\ Feature\ PA4\ Secure=false
439RIF.RIFAWARE.GPIO\ Feature\ PA5\ Cid=-
440RIF.RIFAWARE.GPIO\ Feature\ PA5\ Secure=false
441RIF.RIFAWARE.GPIO\ Feature\ PA6\ Cid=-
442RIF.RIFAWARE.GPIO\ Feature\ PA6\ Secure=false
443RIF.RIFAWARE.GPIO\ Feature\ PA7\ Cid=-
444RIF.RIFAWARE.GPIO\ Feature\ PA7\ Secure=false
445RIF.RIFAWARE.GPIO\ Feature\ PA8\ Cid=-
446RIF.RIFAWARE.GPIO\ Feature\ PA8\ Secure=false
447RIF.RIFAWARE.GPIO\ Feature\ PA9\ Cid=-
448RIF.RIFAWARE.GPIO\ Feature\ PA9\ Secure=false
449RIF.RIFAWARE.GPIO\ Feature\ PB0\ Cid=-
450RIF.RIFAWARE.GPIO\ Feature\ PB0\ Secure=false
451RIF.RIFAWARE.GPIO\ Feature\ PB1\ Cid=-
452RIF.RIFAWARE.GPIO\ Feature\ PB1\ Secure=false
453RIF.RIFAWARE.GPIO\ Feature\ PB10\ Cid=-
454RIF.RIFAWARE.GPIO\ Feature\ PB10\ Secure=false
455RIF.RIFAWARE.GPIO\ Feature\ PB11\ Cid=-
456RIF.RIFAWARE.GPIO\ Feature\ PB11\ Secure=false
[25]457RIF.RIFAWARE.GPIO\ Feature\ PB12\ Cid=1
458RIF.RIFAWARE.GPIO\ Feature\ PB12\ FSBL=true
459RIF.RIFAWARE.GPIO\ Feature\ PB12\ Secure=true
[16]460RIF.RIFAWARE.GPIO\ Feature\ PB13\ Cid=-
461RIF.RIFAWARE.GPIO\ Feature\ PB13\ Secure=false
462RIF.RIFAWARE.GPIO\ Feature\ PB14\ Cid=-
463RIF.RIFAWARE.GPIO\ Feature\ PB14\ Secure=false
464RIF.RIFAWARE.GPIO\ Feature\ PB15\ Cid=-
465RIF.RIFAWARE.GPIO\ Feature\ PB15\ Secure=false
466RIF.RIFAWARE.GPIO\ Feature\ PB2\ Cid=-
467RIF.RIFAWARE.GPIO\ Feature\ PB2\ Secure=false
468RIF.RIFAWARE.GPIO\ Feature\ PB3\ Cid=-
469RIF.RIFAWARE.GPIO\ Feature\ PB3\ Secure=false
470RIF.RIFAWARE.GPIO\ Feature\ PB6\ Cid=-
471RIF.RIFAWARE.GPIO\ Feature\ PB6\ Secure=false
472RIF.RIFAWARE.GPIO\ Feature\ PB7\ Cid=-
473RIF.RIFAWARE.GPIO\ Feature\ PB7\ Secure=false
474RIF.RIFAWARE.GPIO\ Feature\ PB8\ Cid=-
475RIF.RIFAWARE.GPIO\ Feature\ PB8\ Secure=false
476RIF.RIFAWARE.GPIO\ Feature\ PB9\ Cid=-
477RIF.RIFAWARE.GPIO\ Feature\ PB9\ Secure=false
478RIF.RIFAWARE.GPIO\ Feature\ PC0\ Cid=-
479RIF.RIFAWARE.GPIO\ Feature\ PC0\ Secure=false
480RIF.RIFAWARE.GPIO\ Feature\ PC1\ Cid=-
481RIF.RIFAWARE.GPIO\ Feature\ PC1\ Secure=false
482RIF.RIFAWARE.GPIO\ Feature\ PC10\ Cid=-
483RIF.RIFAWARE.GPIO\ Feature\ PC10\ Secure=false
484RIF.RIFAWARE.GPIO\ Feature\ PC11\ Cid=-
485RIF.RIFAWARE.GPIO\ Feature\ PC11\ Secure=false
486RIF.RIFAWARE.GPIO\ Feature\ PC12\ Cid=-
487RIF.RIFAWARE.GPIO\ Feature\ PC12\ Secure=false
488RIF.RIFAWARE.GPIO\ Feature\ PC13\ Cid=-
489RIF.RIFAWARE.GPIO\ Feature\ PC13\ Secure=false
490RIF.RIFAWARE.GPIO\ Feature\ PC2\ Cid=-
491RIF.RIFAWARE.GPIO\ Feature\ PC2\ Secure=false
492RIF.RIFAWARE.GPIO\ Feature\ PC3\ Cid=-
493RIF.RIFAWARE.GPIO\ Feature\ PC3\ Secure=false
494RIF.RIFAWARE.GPIO\ Feature\ PC4\ Cid=-
495RIF.RIFAWARE.GPIO\ Feature\ PC4\ Secure=false
496RIF.RIFAWARE.GPIO\ Feature\ PC5\ Cid=-
497RIF.RIFAWARE.GPIO\ Feature\ PC5\ Secure=false
498RIF.RIFAWARE.GPIO\ Feature\ PC6\ Cid=-
499RIF.RIFAWARE.GPIO\ Feature\ PC6\ Secure=false
500RIF.RIFAWARE.GPIO\ Feature\ PC7\ Cid=-
501RIF.RIFAWARE.GPIO\ Feature\ PC7\ Secure=false
502RIF.RIFAWARE.GPIO\ Feature\ PC8\ Cid=-
503RIF.RIFAWARE.GPIO\ Feature\ PC8\ Secure=false
504RIF.RIFAWARE.GPIO\ Feature\ PC9\ Cid=-
505RIF.RIFAWARE.GPIO\ Feature\ PC9\ Secure=false
506RIF.RIFAWARE.GPIO\ Feature\ PD0\ Cid=-
507RIF.RIFAWARE.GPIO\ Feature\ PD0\ Secure=false
508RIF.RIFAWARE.GPIO\ Feature\ PD1\ Cid=-
509RIF.RIFAWARE.GPIO\ Feature\ PD1\ Secure=false
510RIF.RIFAWARE.GPIO\ Feature\ PD10\ Cid=-
511RIF.RIFAWARE.GPIO\ Feature\ PD10\ Secure=false
512RIF.RIFAWARE.GPIO\ Feature\ PD11\ Cid=-
513RIF.RIFAWARE.GPIO\ Feature\ PD11\ Secure=false
514RIF.RIFAWARE.GPIO\ Feature\ PD12\ Cid=-
515RIF.RIFAWARE.GPIO\ Feature\ PD12\ Secure=false
516RIF.RIFAWARE.GPIO\ Feature\ PD13\ Cid=-
517RIF.RIFAWARE.GPIO\ Feature\ PD13\ Secure=false
518RIF.RIFAWARE.GPIO\ Feature\ PD14\ Cid=-
519RIF.RIFAWARE.GPIO\ Feature\ PD14\ Secure=false
520RIF.RIFAWARE.GPIO\ Feature\ PD15\ Cid=-
521RIF.RIFAWARE.GPIO\ Feature\ PD15\ Secure=false
522RIF.RIFAWARE.GPIO\ Feature\ PD2\ Cid=-
523RIF.RIFAWARE.GPIO\ Feature\ PD2\ Secure=false
524RIF.RIFAWARE.GPIO\ Feature\ PD3\ Cid=-
525RIF.RIFAWARE.GPIO\ Feature\ PD3\ Secure=false
526RIF.RIFAWARE.GPIO\ Feature\ PD4\ Cid=-
527RIF.RIFAWARE.GPIO\ Feature\ PD4\ Secure=false
528RIF.RIFAWARE.GPIO\ Feature\ PD5\ Cid=-
529RIF.RIFAWARE.GPIO\ Feature\ PD5\ Secure=false
530RIF.RIFAWARE.GPIO\ Feature\ PD6\ Cid=-
531RIF.RIFAWARE.GPIO\ Feature\ PD6\ Secure=false
532RIF.RIFAWARE.GPIO\ Feature\ PD7\ Cid=-
533RIF.RIFAWARE.GPIO\ Feature\ PD7\ Secure=false
534RIF.RIFAWARE.GPIO\ Feature\ PD8\ Cid=-
535RIF.RIFAWARE.GPIO\ Feature\ PD8\ Secure=false
536RIF.RIFAWARE.GPIO\ Feature\ PD9\ Cid=-
537RIF.RIFAWARE.GPIO\ Feature\ PD9\ Secure=false
538RIF.RIFAWARE.GPIO\ Feature\ PE0\ Cid=-
539RIF.RIFAWARE.GPIO\ Feature\ PE0\ Secure=false
540RIF.RIFAWARE.GPIO\ Feature\ PE1\ Cid=-
541RIF.RIFAWARE.GPIO\ Feature\ PE1\ Secure=false
542RIF.RIFAWARE.GPIO\ Feature\ PE10\ Cid=-
543RIF.RIFAWARE.GPIO\ Feature\ PE10\ Secure=false
544RIF.RIFAWARE.GPIO\ Feature\ PE11\ Cid=-
545RIF.RIFAWARE.GPIO\ Feature\ PE11\ Secure=false
546RIF.RIFAWARE.GPIO\ Feature\ PE12\ Cid=-
547RIF.RIFAWARE.GPIO\ Feature\ PE12\ Secure=false
548RIF.RIFAWARE.GPIO\ Feature\ PE13\ Cid=-
549RIF.RIFAWARE.GPIO\ Feature\ PE13\ Secure=false
550RIF.RIFAWARE.GPIO\ Feature\ PE14\ Cid=-
551RIF.RIFAWARE.GPIO\ Feature\ PE14\ Secure=false
552RIF.RIFAWARE.GPIO\ Feature\ PE15\ Cid=-
553RIF.RIFAWARE.GPIO\ Feature\ PE15\ Secure=false
554RIF.RIFAWARE.GPIO\ Feature\ PE2\ Cid=-
555RIF.RIFAWARE.GPIO\ Feature\ PE2\ Secure=false
556RIF.RIFAWARE.GPIO\ Feature\ PE3\ Cid=-
557RIF.RIFAWARE.GPIO\ Feature\ PE3\ Secure=false
558RIF.RIFAWARE.GPIO\ Feature\ PE4\ Cid=-
559RIF.RIFAWARE.GPIO\ Feature\ PE4\ Secure=false
560RIF.RIFAWARE.GPIO\ Feature\ PE5\ Cid=-
561RIF.RIFAWARE.GPIO\ Feature\ PE5\ Secure=false
562RIF.RIFAWARE.GPIO\ Feature\ PE6\ Cid=-
563RIF.RIFAWARE.GPIO\ Feature\ PE6\ Secure=false
564RIF.RIFAWARE.GPIO\ Feature\ PE7\ Cid=-
565RIF.RIFAWARE.GPIO\ Feature\ PE7\ Secure=false
566RIF.RIFAWARE.GPIO\ Feature\ PE8\ Cid=-
567RIF.RIFAWARE.GPIO\ Feature\ PE8\ Secure=false
568RIF.RIFAWARE.GPIO\ Feature\ PE9\ Cid=-
569RIF.RIFAWARE.GPIO\ Feature\ PE9\ Secure=false
570RIF.RIFAWARE.GPIO\ Feature\ PF0\ Cid=-
571RIF.RIFAWARE.GPIO\ Feature\ PF0\ Secure=false
572RIF.RIFAWARE.GPIO\ Feature\ PF1\ Cid=-
573RIF.RIFAWARE.GPIO\ Feature\ PF1\ Secure=false
574RIF.RIFAWARE.GPIO\ Feature\ PF10\ Cid=-
575RIF.RIFAWARE.GPIO\ Feature\ PF10\ Secure=false
576RIF.RIFAWARE.GPIO\ Feature\ PF11\ Cid=-
577RIF.RIFAWARE.GPIO\ Feature\ PF11\ Secure=false
578RIF.RIFAWARE.GPIO\ Feature\ PF12\ Cid=-
579RIF.RIFAWARE.GPIO\ Feature\ PF12\ Secure=false
580RIF.RIFAWARE.GPIO\ Feature\ PF13\ Cid=-
581RIF.RIFAWARE.GPIO\ Feature\ PF13\ Secure=false
582RIF.RIFAWARE.GPIO\ Feature\ PF14\ Cid=-
583RIF.RIFAWARE.GPIO\ Feature\ PF14\ Secure=false
584RIF.RIFAWARE.GPIO\ Feature\ PF15\ Cid=-
585RIF.RIFAWARE.GPIO\ Feature\ PF15\ Secure=false
586RIF.RIFAWARE.GPIO\ Feature\ PF2\ Cid=-
587RIF.RIFAWARE.GPIO\ Feature\ PF2\ Secure=false
588RIF.RIFAWARE.GPIO\ Feature\ PF3\ Cid=-
589RIF.RIFAWARE.GPIO\ Feature\ PF3\ Secure=false
590RIF.RIFAWARE.GPIO\ Feature\ PF4\ Cid=-
591RIF.RIFAWARE.GPIO\ Feature\ PF4\ Secure=false
592RIF.RIFAWARE.GPIO\ Feature\ PF5\ Cid=-
593RIF.RIFAWARE.GPIO\ Feature\ PF5\ Secure=false
594RIF.RIFAWARE.GPIO\ Feature\ PF6\ Cid=-
595RIF.RIFAWARE.GPIO\ Feature\ PF6\ Secure=false
596RIF.RIFAWARE.GPIO\ Feature\ PF7\ Cid=-
597RIF.RIFAWARE.GPIO\ Feature\ PF7\ Secure=false
598RIF.RIFAWARE.GPIO\ Feature\ PF8\ Cid=-
599RIF.RIFAWARE.GPIO\ Feature\ PF8\ Secure=false
600RIF.RIFAWARE.GPIO\ Feature\ PF9\ Cid=-
601RIF.RIFAWARE.GPIO\ Feature\ PF9\ Secure=false
602RIF.RIFAWARE.GPIO\ Feature\ PG0\ Cid=1
603RIF.RIFAWARE.GPIO\ Feature\ PG0\ FSBL=true
604RIF.RIFAWARE.GPIO\ Feature\ PG0\ Secure=true
605RIF.RIFAWARE.GPIO\ Feature\ PG1\ Cid=-
606RIF.RIFAWARE.GPIO\ Feature\ PG1\ Secure=false
607RIF.RIFAWARE.GPIO\ Feature\ PG10\ Cid=-
608RIF.RIFAWARE.GPIO\ Feature\ PG10\ Secure=false
609RIF.RIFAWARE.GPIO\ Feature\ PG11\ Cid=-
610RIF.RIFAWARE.GPIO\ Feature\ PG11\ Secure=false
611RIF.RIFAWARE.GPIO\ Feature\ PG12\ Cid=-
612RIF.RIFAWARE.GPIO\ Feature\ PG12\ Secure=false
613RIF.RIFAWARE.GPIO\ Feature\ PG13\ Cid=-
614RIF.RIFAWARE.GPIO\ Feature\ PG13\ Secure=false
615RIF.RIFAWARE.GPIO\ Feature\ PG14\ Cid=-
616RIF.RIFAWARE.GPIO\ Feature\ PG14\ Secure=false
617RIF.RIFAWARE.GPIO\ Feature\ PG15\ Cid=-
618RIF.RIFAWARE.GPIO\ Feature\ PG15\ Secure=false
619RIF.RIFAWARE.GPIO\ Feature\ PG2\ Cid=-
620RIF.RIFAWARE.GPIO\ Feature\ PG2\ Secure=false
621RIF.RIFAWARE.GPIO\ Feature\ PG3\ Cid=-
622RIF.RIFAWARE.GPIO\ Feature\ PG3\ Secure=false
623RIF.RIFAWARE.GPIO\ Feature\ PG4\ Cid=-
624RIF.RIFAWARE.GPIO\ Feature\ PG4\ Secure=false
625RIF.RIFAWARE.GPIO\ Feature\ PG5\ Cid=-
626RIF.RIFAWARE.GPIO\ Feature\ PG5\ Secure=false
627RIF.RIFAWARE.GPIO\ Feature\ PG6\ Cid=-
628RIF.RIFAWARE.GPIO\ Feature\ PG6\ Secure=false
629RIF.RIFAWARE.GPIO\ Feature\ PG7\ Cid=-
630RIF.RIFAWARE.GPIO\ Feature\ PG7\ Secure=false
631RIF.RIFAWARE.GPIO\ Feature\ PG8\ Cid=-
632RIF.RIFAWARE.GPIO\ Feature\ PG8\ Secure=false
633RIF.RIFAWARE.GPIO\ Feature\ PG9\ Cid=-
634RIF.RIFAWARE.GPIO\ Feature\ PG9\ Secure=false
635RIF.RIFAWARE.GPIO\ Feature\ PH2\ Cid=-
636RIF.RIFAWARE.GPIO\ Feature\ PH2\ Secure=false
637RIF.RIFAWARE.GPIO\ Feature\ PH3\ Cid=-
638RIF.RIFAWARE.GPIO\ Feature\ PH3\ Secure=false
639RIF.RIFAWARE.GPIO\ Feature\ PH4\ Cid=-
640RIF.RIFAWARE.GPIO\ Feature\ PH4\ Secure=false
641RIF.RIFAWARE.GPIO\ Feature\ PH5\ Cid=-
642RIF.RIFAWARE.GPIO\ Feature\ PH5\ Secure=false
643RIF.RIFAWARE.GPIO\ Feature\ PH6\ Cid=-
644RIF.RIFAWARE.GPIO\ Feature\ PH6\ Secure=false
645RIF.RIFAWARE.GPIO\ Feature\ PH7\ Cid=-
646RIF.RIFAWARE.GPIO\ Feature\ PH7\ Secure=false
647RIF.RIFAWARE.GPIO\ Feature\ PH8\ Cid=-
648RIF.RIFAWARE.GPIO\ Feature\ PH8\ Secure=false
649RIF.RIFAWARE.GPIO\ Feature\ PH9\ Cid=-
650RIF.RIFAWARE.GPIO\ Feature\ PH9\ Secure=false
651RIF.RIFAWARE.GPIO\ Feature\ PN0\ Cid=-
652RIF.RIFAWARE.GPIO\ Feature\ PN0\ Secure=false
653RIF.RIFAWARE.GPIO\ Feature\ PN1\ Cid=-
654RIF.RIFAWARE.GPIO\ Feature\ PN1\ Secure=false
655RIF.RIFAWARE.GPIO\ Feature\ PN10\ Cid=-
656RIF.RIFAWARE.GPIO\ Feature\ PN10\ Secure=false
657RIF.RIFAWARE.GPIO\ Feature\ PN11\ Cid=-
658RIF.RIFAWARE.GPIO\ Feature\ PN11\ Secure=false
659RIF.RIFAWARE.GPIO\ Feature\ PN12\ Cid=-
660RIF.RIFAWARE.GPIO\ Feature\ PN12\ Secure=false
661RIF.RIFAWARE.GPIO\ Feature\ PN2\ Cid=-
662RIF.RIFAWARE.GPIO\ Feature\ PN2\ Secure=false
663RIF.RIFAWARE.GPIO\ Feature\ PN3\ Cid=-
664RIF.RIFAWARE.GPIO\ Feature\ PN3\ Secure=false
665RIF.RIFAWARE.GPIO\ Feature\ PN4\ Cid=-
666RIF.RIFAWARE.GPIO\ Feature\ PN4\ Secure=false
667RIF.RIFAWARE.GPIO\ Feature\ PN5\ Cid=-
668RIF.RIFAWARE.GPIO\ Feature\ PN5\ Secure=false
669RIF.RIFAWARE.GPIO\ Feature\ PN6\ Cid=-
670RIF.RIFAWARE.GPIO\ Feature\ PN6\ Secure=false
671RIF.RIFAWARE.GPIO\ Feature\ PN7\ Cid=-
672RIF.RIFAWARE.GPIO\ Feature\ PN7\ Secure=false
673RIF.RIFAWARE.GPIO\ Feature\ PN8\ Cid=-
674RIF.RIFAWARE.GPIO\ Feature\ PN8\ Secure=false
675RIF.RIFAWARE.GPIO\ Feature\ PN9\ Cid=-
676RIF.RIFAWARE.GPIO\ Feature\ PN9\ Secure=false
677RIF.RIFAWARE.GPIO\ Feature\ PO0\ Cid=-
678RIF.RIFAWARE.GPIO\ Feature\ PO0\ Secure=false
679RIF.RIFAWARE.GPIO\ Feature\ PO1\ Cid=-
680RIF.RIFAWARE.GPIO\ Feature\ PO1\ Secure=false
681RIF.RIFAWARE.GPIO\ Feature\ PO2\ Cid=-
682RIF.RIFAWARE.GPIO\ Feature\ PO2\ Secure=false
683RIF.RIFAWARE.GPIO\ Feature\ PO3\ Cid=-
684RIF.RIFAWARE.GPIO\ Feature\ PO3\ Secure=false
685RIF.RIFAWARE.GPIO\ Feature\ PO4\ Cid=-
686RIF.RIFAWARE.GPIO\ Feature\ PO4\ Secure=false
687RIF.RIFAWARE.GPIO\ Feature\ PO5\ Cid=-
688RIF.RIFAWARE.GPIO\ Feature\ PO5\ Secure=false
689RIF.RIFAWARE.GPIO\ Feature\ PP0\ Cid=-
690RIF.RIFAWARE.GPIO\ Feature\ PP0\ Secure=false
691RIF.RIFAWARE.GPIO\ Feature\ PP1\ Cid=-
692RIF.RIFAWARE.GPIO\ Feature\ PP1\ Secure=false
693RIF.RIFAWARE.GPIO\ Feature\ PP10\ Cid=-
694RIF.RIFAWARE.GPIO\ Feature\ PP10\ Secure=false
695RIF.RIFAWARE.GPIO\ Feature\ PP11\ Cid=-
696RIF.RIFAWARE.GPIO\ Feature\ PP11\ Secure=false
697RIF.RIFAWARE.GPIO\ Feature\ PP12\ Cid=-
698RIF.RIFAWARE.GPIO\ Feature\ PP12\ Secure=false
699RIF.RIFAWARE.GPIO\ Feature\ PP13\ Cid=-
700RIF.RIFAWARE.GPIO\ Feature\ PP13\ Secure=false
701RIF.RIFAWARE.GPIO\ Feature\ PP14\ Cid=-
702RIF.RIFAWARE.GPIO\ Feature\ PP14\ Secure=false
703RIF.RIFAWARE.GPIO\ Feature\ PP15\ Cid=-
704RIF.RIFAWARE.GPIO\ Feature\ PP15\ Secure=false
705RIF.RIFAWARE.GPIO\ Feature\ PP2\ Cid=-
706RIF.RIFAWARE.GPIO\ Feature\ PP2\ Secure=false
707RIF.RIFAWARE.GPIO\ Feature\ PP3\ Cid=-
708RIF.RIFAWARE.GPIO\ Feature\ PP3\ Secure=false
709RIF.RIFAWARE.GPIO\ Feature\ PP4\ Cid=-
710RIF.RIFAWARE.GPIO\ Feature\ PP4\ Secure=false
711RIF.RIFAWARE.GPIO\ Feature\ PP5\ Cid=-
712RIF.RIFAWARE.GPIO\ Feature\ PP5\ Secure=false
713RIF.RIFAWARE.GPIO\ Feature\ PP6\ Cid=-
714RIF.RIFAWARE.GPIO\ Feature\ PP6\ Secure=false
715RIF.RIFAWARE.GPIO\ Feature\ PP7\ Cid=-
716RIF.RIFAWARE.GPIO\ Feature\ PP7\ Secure=false
717RIF.RIFAWARE.GPIO\ Feature\ PP8\ Cid=-
718RIF.RIFAWARE.GPIO\ Feature\ PP8\ Secure=false
719RIF.RIFAWARE.GPIO\ Feature\ PP9\ Cid=-
720RIF.RIFAWARE.GPIO\ Feature\ PP9\ Secure=false
721RIF.RIFAWARE.GPIO\ Feature\ PQ0\ Cid=-
722RIF.RIFAWARE.GPIO\ Feature\ PQ0\ Secure=false
723RIF.RIFAWARE.GPIO\ Feature\ PQ1\ Cid=-
724RIF.RIFAWARE.GPIO\ Feature\ PQ1\ Secure=false
725RIF.RIFAWARE.GPIO\ Feature\ PQ2\ Cid=-
726RIF.RIFAWARE.GPIO\ Feature\ PQ2\ Secure=false
727RIF.RIFAWARE.GPIO\ Feature\ PQ3\ Cid=-
728RIF.RIFAWARE.GPIO\ Feature\ PQ3\ Secure=false
729RIF.RIFAWARE.GPIO\ Feature\ PQ4\ Cid=-
730RIF.RIFAWARE.GPIO\ Feature\ PQ4\ Secure=false
731RIF.RIFAWARE.GPIO\ Feature\ PQ5\ Cid=-
732RIF.RIFAWARE.GPIO\ Feature\ PQ5\ Secure=false
733RIF.RIFAWARE.GPIO\ Feature\ PQ6\ Cid=-
734RIF.RIFAWARE.GPIO\ Feature\ PQ6\ Secure=false
735RIF.RIFAWARE.GPIO\ Feature\ PQ7\ Cid=-
736RIF.RIFAWARE.GPIO\ Feature\ PQ7\ Secure=false
737RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 0\ Cid=-
738RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 0\ Privilege=true
739RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 0\ Secure=false
740RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 1\ Cid=-
741RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 1\ Privilege=true
742RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 1\ Secure=false
743RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 10\ Cid=-
744RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 10\ Privilege=true
745RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 10\ Secure=false
746RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 11\ Cid=-
747RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 11\ Privilege=true
748RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 11\ Secure=false
749RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 12\ Cid=-
750RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 12\ Privilege=true
751RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 12\ Secure=false
752RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 13\ Cid=-
753RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 13\ Privilege=true
754RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 13\ Secure=false
755RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 14\ Cid=-
756RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 14\ Privilege=true
757RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 14\ Secure=false
758RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 15\ Cid=-
759RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 15\ Privilege=true
760RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 15\ Secure=false
761RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 2\ Cid=-
762RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 2\ Privilege=true
763RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 2\ Secure=false
764RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 3\ Cid=-
765RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 3\ Privilege=true
766RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 3\ Secure=false
767RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 4\ Cid=-
768RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 4\ Privilege=true
769RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 4\ Secure=false
770RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 5\ Cid=-
771RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 5\ Privilege=true
772RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 5\ Secure=false
773RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 6\ Cid=-
774RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 6\ Privilege=true
775RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 6\ Secure=false
776RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 7\ Cid=-
777RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 7\ Privilege=true
778RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 7\ Secure=false
779RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 8\ Cid=-
780RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 8\ Privilege=true
781RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 8\ Secure=false
782RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 9\ Cid=-
783RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 9\ Privilege=true
784RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 9\ Secure=false
785RIF.RIFAWARE.LTDC\ Feature\ LTDC_L1\ Cid=-
786RIF.RIFAWARE.LTDC\ Feature\ LTDC_L1\ Secure=false
787RIF.RIFAWARE.LTDC\ Feature\ LTDC_L2\ Cid=-
788RIF.RIFAWARE.LTDC\ Feature\ LTDC_L2\ Secure=false
789RIF.RIFAWARE.PWR\ Feature\ Backup\ domain\ protection\ Cid=-
790RIF.RIFAWARE.PWR\ Feature\ Backup\ domain\ protection\ Secure=false
791RIF.RIFAWARE.PWR\ Feature\ CPU\ power\ control\ protection\ Cid=-
792RIF.RIFAWARE.PWR\ Feature\ CPU\ power\ control\ protection\ Secure=false
793RIF.RIFAWARE.PWR\ Feature\ I-TCM,\ D-TCM,\ and\ I-TCM\ FLEXMEM\ low\ power\ control\ protection\ Cid=-
794RIF.RIFAWARE.PWR\ Feature\ I-TCM,\ D-TCM,\ and\ I-TCM\ FLEXMEM\ low\ power\ control\ protection\ Secure=false
795RIF.RIFAWARE.PWR\ Feature\ Peripheral\ voltage\ monitor\ protection\ Cid=-
796RIF.RIFAWARE.PWR\ Feature\ Peripheral\ voltage\ monitor\ protection\ Secure=false
797RIF.RIFAWARE.PWR\ Feature\ Programmable\ voltage\ detector\ protection\ Cid=-
798RIF.RIFAWARE.PWR\ Feature\ Programmable\ voltage\ detector\ protection\ Secure=false
799RIF.RIFAWARE.PWR\ Feature\ System\ supply\ configuration\ protection\ Cid=-
800RIF.RIFAWARE.PWR\ Feature\ System\ supply\ configuration\ protection\ Secure=false
801RIF.RIFAWARE.PWR\ Feature\ VDDCORE\ monitor\ protection\ Cid=-
802RIF.RIFAWARE.PWR\ Feature\ VDDCORE\ monitor\ protection\ Secure=false
803RIF.RIFAWARE.PWR\ Feature\ Voltage\ scaling\ selection\ protection\ Cid=-
804RIF.RIFAWARE.PWR\ Feature\ Voltage\ scaling\ selection\ protection\ Secure=false
805RIF.RIFAWARE.PWR\ Feature\ WKUP1\ pin\ protection\ Cid=-
806RIF.RIFAWARE.PWR\ Feature\ WKUP1\ pin\ protection\ Secure=false
807RIF.RIFAWARE.PWR\ Feature\ WKUP2\ pin\ protection\ Cid=-
808RIF.RIFAWARE.PWR\ Feature\ WKUP2\ pin\ protection\ Secure=false
809RIF.RIFAWARE.PWR\ Feature\ WKUP3\ pin\ protection\ Cid=-
810RIF.RIFAWARE.PWR\ Feature\ WKUP3\ pin\ protection\ Secure=false
811RIF.RIFAWARE.PWR\ Feature\ WKUP4\ pin\ protection\ Cid=-
812RIF.RIFAWARE.PWR\ Feature\ WKUP4\ pin\ protection\ Secure=false
813RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ BUS\ system\ configuration\ bits\ Cid=-
814RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ BUS\ system\ configuration\ bits\ Secure=false
815RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ DFT\ system\ configuration\ bits\ Cid=-
816RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ DFT\ system\ configuration\ bits\ Secure=false
817RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC1\ divider\ configuration\ bits\ Cid=-
818RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC1\ divider\ configuration\ bits\ Secure=false
819RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC10\ divider\ configuration\ bits\ Cid=-
820RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC10\ divider\ configuration\ bits\ Secure=false
821RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC11\ divider\ configuration\ bits\ Cid=-
822RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC11\ divider\ configuration\ bits\ Secure=false
823RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC12\ divider\ configuration\ bits\ Cid=-
824RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC12\ divider\ configuration\ bits\ Secure=false
825RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC13\ divider\ configuration\ bits\ Cid=-
826RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC13\ divider\ configuration\ bits\ Secure=false
827RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC14\ divider\ configuration\ bits\ Cid=-
828RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC14\ divider\ configuration\ bits\ Secure=false
829RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC15\ divider\ configuration\ bits\ Cid=-
830RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC15\ divider\ configuration\ bits\ Secure=false
831RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC16\ divider\ configuration\ bits\ Cid=-
832RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC16\ divider\ configuration\ bits\ Secure=false
833RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC17\ divider\ configuration\ bits\ Cid=-
834RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC17\ divider\ configuration\ bits\ Secure=false
835RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC18\ divider\ configuration\ bits\ Cid=-
836RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC18\ divider\ configuration\ bits\ Secure=false
837RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC19\ divider\ configuration\ bits\ Cid=-
838RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC19\ divider\ configuration\ bits\ Secure=false
839RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC2\ divider\ configuration\ bits\ Cid=-
840RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC2\ divider\ configuration\ bits\ Secure=false
841RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC20\ divider\ configuration\ bits\ Cid=-
842RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC20\ divider\ configuration\ bits\ Secure=false
843RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC3\ divider\ configuration\ bits\ Cid=-
844RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC3\ divider\ configuration\ bits\ Secure=false
845RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC4\ divider\ configuration\ bits\ Cid=-
846RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC4\ divider\ configuration\ bits\ Secure=false
847RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC5\ divider\ configuration\ bits\ Cid=-
848RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC5\ divider\ configuration\ bits\ Secure=false
849RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC6\ divider\ configuration\ bits\ Cid=-
850RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC6\ divider\ configuration\ bits\ Secure=false
851RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC7\ divider\ configuration\ bits\ Cid=-
852RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC7\ divider\ configuration\ bits\ Secure=false
853RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC8\ divider\ configuration\ bits\ Cid=-
854RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC8\ divider\ configuration\ bits\ Secure=false
855RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC9\ divider\ configuration\ bits\ Cid=-
856RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC9\ divider\ configuration\ bits\ Secure=false
857RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ INT\ system\ configuration\ bits\ Cid=-
858RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ INT\ system\ configuration\ bits\ Secure=false
859RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ MOD\ system\ configuration\ bits\ Cid=-
860RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ MOD\ system\ configuration\ bits\ Secure=false
861RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ PER\ system\ configuration\ bits\ Cid=-
862RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ PER\ system\ configuration\ bits\ Secure=false
863RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ PLL1\ configuration\ bits\u200B\ Cid=-
864RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ PLL1\ configuration\ bits\u200B\ Secure=false
865RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ PLL2\ configuration\ bits\ Cid=-
866RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ PLL2\ configuration\ bits\ Secure=false
867RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ PLL3\ configuration\ bits\ Cid=-
868RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ PLL3\ configuration\ bits\ Secure=false
869RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ PLL4\ configuration\ bits\ Cid=-
870RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ PLL4\ configuration\ bits\ Secure=false
871RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ RST\ system\ configuration\ bits\ Cid=-
872RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ RST\ system\ configuration\ bits\ Secure=false
873RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ SYS\ system\ configuration\ bit\ Cid=-
874RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ SYS\ system\ configuration\ bit\ Secure=false
875RIF.RIFAWARE.RCC\ Feature\ protection\ of\ ACLKN\ bus\ configuration\ bits\ Cid=-
876RIF.RIFAWARE.RCC\ Feature\ protection\ of\ ACLKN\ bus\ configuration\ bits\ Secure=false
877RIF.RIFAWARE.RCC\ Feature\ protection\ of\ ACLKNC\ bus\ configuration\ bits\ Cid=-
878RIF.RIFAWARE.RCC\ Feature\ protection\ of\ ACLKNC\ bus\ configuration\ bits\ Secure=false
879RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHB1\ bus\ configuration\ bits\ Cid=-
880RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHB1\ bus\ configuration\ bits\ Secure=false
881RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHB2\ bus\ configuration\ bits\ Cid=-
882RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHB2\ bus\ configuration\ bits\ Secure=false
883RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHB3\ bus\ configuration\ bits\ Cid=-
884RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHB3\ bus\ configuration\ bits\ Secure=false
885RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHB4\ bus\ configuration\ bits\ Cid=-
886RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHB4\ bus\ configuration\ bits\ Secure=false
887RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHB5\ bus\ configuration\ bits\ Cid=-
888RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHB5\ bus\ configuration\ bits\ Secure=false
889RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHBM\ bus\ configuration\ bits\ Cid=-
890RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHBM\ bus\ configuration\ bits\ Secure=false
891RIF.RIFAWARE.RCC\ Feature\ protection\ of\ APB1\ bus\ configuration\ bits\ Cid=-
892RIF.RIFAWARE.RCC\ Feature\ protection\ of\ APB1\ bus\ configuration\ bits\ Secure=false
893RIF.RIFAWARE.RCC\ Feature\ protection\ of\ APB2\ bus\ configuration\ bits\ Cid=-
894RIF.RIFAWARE.RCC\ Feature\ protection\ of\ APB2\ bus\ configuration\ bits\ Secure=false
895RIF.RIFAWARE.RCC\ Feature\ protection\ of\ APB3\ bus\ configuration\ bits\ Cid=-
896RIF.RIFAWARE.RCC\ Feature\ protection\ of\ APB3\ bus\ configuration\ bits\ Secure=false
897RIF.RIFAWARE.RCC\ Feature\ protection\ of\ APB4\ bus\ configuration\ bits\ Cid=-
898RIF.RIFAWARE.RCC\ Feature\ protection\ of\ APB4\ bus\ configuration\ bits\ Secure=false
899RIF.RIFAWARE.RCC\ Feature\ protection\ of\ APB5\ bus\ configuration\ bits\ Cid=-
900RIF.RIFAWARE.RCC\ Feature\ protection\ of\ APB5\ bus\ configuration\ bits\ Secure=false
901RIF.RIFAWARE.RCC\ Feature\ protection\ of\ NOC\ bus\ configuration\ bits\ Cid=-
902RIF.RIFAWARE.RCC\ Feature\ protection\ of\ NOC\ bus\ configuration\ bits\ Secure=false
903RIF.RIFAWARE.RTC\ Feature\ Alarm\ A\ and\ SSR\ underflow\ protection\u200B\ Cid=-
904RIF.RIFAWARE.RTC\ Feature\ Alarm\ A\ and\ SSR\ underflow\ protection\u200B\ Secure=false
905RIF.RIFAWARE.RTC\ Feature\ Alarm\ B\ protection\ Cid=-
906RIF.RIFAWARE.RTC\ Feature\ Alarm\ B\ protection\ Secure=false
907RIF.RIFAWARE.RTC\ Feature\ Initialization\ protection\ Cid=-
908RIF.RIFAWARE.RTC\ Feature\ Initialization\ protection\ Secure=false
909RIF.RIFAWARE.RTC\ Feature\ RTC\ global\ protection\ Cid=-
910RIF.RIFAWARE.RTC\ Feature\ RTC\ global\ protection\ Secure=false
911RIF.RIFAWARE.RTC\ Feature\ Shift\ register,\ daylight\ saving,\ calibration\ and\ reference\ clock\ protection\ Cid=-
912RIF.RIFAWARE.RTC\ Feature\ Shift\ register,\ daylight\ saving,\ calibration\ and\ reference\ clock\ protection\ Secure=false
913RIF.RIFAWARE.RTC\ Feature\ Timestamp\ protection\ Cid=-
914RIF.RIFAWARE.RTC\ Feature\ Timestamp\ protection\ Secure=false
915RIF.RIFAWARE.RTC\ Feature\ Wake-up\ timer\ protection\ Cid=-
916RIF.RIFAWARE.RTC\ Feature\ Wake-up\ timer\ protection\ Secure=false
917RIF.SDMMC1_CID_RIMU=0
918RIF.SDMMC2_CID_RIMU=0
919RIF.VENC_CID_RIMU=0
920RIF.default_config=false
[18]921VP_BSEC_VS_BSEC.Mode=BSEC_Activate
922VP_BSEC_VS_BSEC.Signal=BSEC_VS_BSEC
923VP_EXTMEM_MANAGER_SIG_Activate_EXTMEM.Mode=Activate_EXTMEM
924VP_EXTMEM_MANAGER_SIG_Activate_EXTMEM.Signal=EXTMEM_MANAGER_SIG_Activate_EXTMEM
[27]925VP_RAMCFG_VS_AHBSRAM1.Mode=AHBSRAMCFG1_Activate
926VP_RAMCFG_VS_AHBSRAM1.Signal=RAMCFG_VS_AHBSRAM1
927VP_RAMCFG_VS_AHBSRAM2.Mode=AHBSRAMCFG2_Activate
928VP_RAMCFG_VS_AHBSRAM2.Signal=RAMCFG_VS_AHBSRAM2
929VP_RAMCFG_VS_BKPRAM.Mode=BKPRAM_Activate
930VP_RAMCFG_VS_BKPRAM.Signal=RAMCFG_VS_BKPRAM
931VP_RAMCFG_VS_FLEXRAM.Mode=FLEXRAM_Activate
932VP_RAMCFG_VS_FLEXRAM.Signal=RAMCFG_VS_FLEXRAM
933VP_RAMCFG_VS_RAMCFG1.Mode=RAMCFG1_Activate
934VP_RAMCFG_VS_RAMCFG1.Signal=RAMCFG_VS_RAMCFG1
935VP_RAMCFG_VS_RAMCFG2.Mode=RAMCFG2_Activate
936VP_RAMCFG_VS_RAMCFG2.Signal=RAMCFG_VS_RAMCFG2
937VP_RAMCFG_VS_RAMCFG3.Mode=RAMCFG3_Activate
938VP_RAMCFG_VS_RAMCFG3.Signal=RAMCFG_VS_RAMCFG3
939VP_RAMCFG_VS_RAMCFG4.Mode=RAMCFG4_Activate
940VP_RAMCFG_VS_RAMCFG4.Signal=RAMCFG_VS_RAMCFG4
941VP_RAMCFG_VS_RAMCFG5.Mode=RAMCFG5_Activate
942VP_RAMCFG_VS_RAMCFG5.Signal=RAMCFG_VS_RAMCFG5
943VP_RAMCFG_VS_RAMCFG6.Mode=RAMCFG6_Activate
944VP_RAMCFG_VS_RAMCFG6.Signal=RAMCFG_VS_RAMCFG6
945VP_RAMCFG_VS_VENCRAM.Mode=VENCRAM_Activate
946VP_RAMCFG_VS_VENCRAM.Signal=RAMCFG_VS_VENCRAM
[16]947VP_RIF_VS_RIF1.Mode=RISUP
948VP_RIF_VS_RIF1.Signal=RIF_VS_RIF1
949VP_XSPI2_VS_octo.Mode=octo_mode
950VP_XSPI2_VS_octo.Signal=XSPI2_VS_octo
951VP_XSPIM_VS_IO.Mode=Direct
952VP_XSPIM_VS_IO.Signal=XSPIM_VS_IO
953XSPI2.ChipSelectHighTimeCycle=2
954XSPI2.ClockPrescaler=0
955XSPI2.DelayHoldQuarterCycle=HAL_XSPI_DHQC_ENABLE
956XSPI2.FifoThresholdByte=4
957XSPI2.IPParameters=FifoThresholdByte,MemoryType,MemorySize,ClockPrescaler,DelayHoldQuarterCycle,MemoryMode,ChipSelectHighTimeCycle
958XSPI2.MemoryMode=HAL_XSPI_SINGLE_MEM
959XSPI2.MemorySize=HAL_XSPI_SIZE_512MB
960XSPI2.MemoryType=HAL_XSPI_MEMTYPE_MACRONIX
961board=custom
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