#MicroXplorer Configuration settings - do not modify
Appli.IPs=CORTEX_M55_S,GPDMA1,HPDMA1,LINKEDLIST,RCC,GPIO,NVIC1\:I,RIF,SAU
CAD.formats=
CAD.pinconfig=
CAD.provider=
CORTEX_M55_FSBL.CPU_DCache=Enabled
CORTEX_M55_FSBL.CPU_ICache=Enabled
CORTEX_M55_FSBL.IPParameters=CPU_ICache,CPU_DCache
CORTEX_M55_S.AccessPermission-Cortex_Memory_Protection_Unit_Region0_Settings=MPU_REGION_ALL_RW
CORTEX_M55_S.Attributes0=MPU_ATTRIBUTES_NUMBER0
CORTEX_M55_S.BaseAddress-Cortex_Memory_Protection_Unit_Region0_Settings=__NON_CACHEABLE_SECTION_BEGIN
CORTEX_M55_S.CPU_DCache=Enabled
CORTEX_M55_S.CPU_ICache=Enabled
CORTEX_M55_S.Enable-Cortex_Memory_Protection_Unit_Region0_Settings=MPU_REGION_ENABLE
CORTEX_M55_S.IPParameters=CPU_ICache,CPU_DCache,MPU_Control,Enable-Cortex_Memory_Protection_Unit_Region0_Settings,Attributes0,BaseAddress-Cortex_Memory_Protection_Unit_Region0_Settings,LimitAddress-Cortex_Memory_Protection_Unit_Region0_Settings,AccessPermission-Cortex_Memory_Protection_Unit_Region0_Settings
CORTEX_M55_S.LimitAddress-Cortex_Memory_Protection_Unit_Region0_Settings=__NON_CACHEABLE_SECTION_END
CORTEX_M55_S.MPU_Control=MPU_HFNMI_PRIVDEF
EXTMEM_MANAGER.IPParameters=RefParam_MEMORY_1_ConfigType,RefParam_BOOT_enable,RefParam_XIP_ApplicationOffset
EXTMEM_MANAGER.RefParam_BOOT_enable=true
EXTMEM_MANAGER.RefParam_MEMORY_1_ConfigType=EXTMEM_LINK_CONFIG_8LINES
EXTMEM_MANAGER.RefParam_XIP_ApplicationOffset=0x80000
ExtMemLoader.IPs=EXTMEM_LOADER,EXTMEM_MANAGER,RCC\:I,GPIO,TIM6
FSBL.IPs=CORTEX_M55_FSBL,GPDMA1\:I,HDP,HPDMA1\:I,LINKEDLIST,RCC,GPIO\:I,NVIC\:I,XSPIM,XSPI2,EXTMEM_MANAGER,BSEC,DEBUG,RAMCFG
FSBL.Pins=PB12,PG0
File.Version=6
GPIO.groupedBy=Group By Peripherals
KeepUserPlacement=false
Mcu.CPN=STM32N657X0H3Q
Mcu.Context0=FSBL
Mcu.Context1=Appli
Mcu.Context2=ExtMemLoader
Mcu.ContextNb=3
Mcu.ContextProject=FullSecure
Mcu.Family=STM32N6
Mcu.IP0=BSEC
Mcu.IP1=CORTEX_M55_FSBL
Mcu.IP10=XSPI2
Mcu.IP11=XSPIM
Mcu.IP2=CORTEX_M55_S
Mcu.IP3=DEBUG
Mcu.IP4=EXTMEM_MANAGER
Mcu.IP5=NVIC1
Mcu.IP6=NVIC
Mcu.IP7=RAMCFG
Mcu.IP8=RCC
Mcu.IP9=RIF
Mcu.IPNb=12
Mcu.Name=STM32N657X0HxQ
Mcu.Package=VFBGA264
Mcu.Pin0=PN4
Mcu.Pin1=PN6
Mcu.Pin10=PN9
Mcu.Pin11=PN2
Mcu.Pin12=PA13(JTMS/SWDIO)
Mcu.Pin13=PB5(JTDO/TRACESWO)
Mcu.Pin14=PN10
Mcu.Pin15=PN11
Mcu.Pin16=VP_BSEC_VS_BSEC
Mcu.Pin17=VP_EXTMEM_MANAGER_SIG_Activate_EXTMEM
Mcu.Pin18=VP_RAMCFG_VS_RAMCFG1
Mcu.Pin19=VP_RAMCFG_VS_RAMCFG2
Mcu.Pin2=PN8
Mcu.Pin20=VP_RAMCFG_VS_RAMCFG3
Mcu.Pin21=VP_RAMCFG_VS_RAMCFG4
Mcu.Pin22=VP_RAMCFG_VS_RAMCFG5
Mcu.Pin23=VP_RAMCFG_VS_RAMCFG6
Mcu.Pin24=VP_RAMCFG_VS_AHBSRAM1
Mcu.Pin25=VP_RAMCFG_VS_AHBSRAM2
Mcu.Pin26=VP_RAMCFG_VS_BKPRAM
Mcu.Pin27=VP_RAMCFG_VS_FLEXRAM
Mcu.Pin28=VP_RAMCFG_VS_VENCRAM
Mcu.Pin29=VP_RIF_VS_RIF1
Mcu.Pin3=PN0
Mcu.Pin30=VP_XSPI2_VS_octo
Mcu.Pin31=VP_XSPIM_VS_IO
Mcu.Pin4=PB12
Mcu.Pin5=PG0
Mcu.Pin6=PN3
Mcu.Pin7=PN5
Mcu.Pin8=PN1
Mcu.Pin9=PA14(JTCK/SWCLK)
Mcu.PinsNb=32
Mcu.ThirdPartyNb=0
Mcu.UserConstants=
Mcu.UserName=STM32N657X0HxQ
MxCube.Version=6.18.1
MxDb.Version=DB.6.0.181
NVIC.BFHFNMINS=0
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.ForceEnableDMAVector=true
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.PRIS=0
NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.SecureFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:true\:false\:true\:false
NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC1.BFHFNMINS=0
NVIC1.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC1.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC1.ForceEnableDMAVector=true
NVIC1.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC1.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC1.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC1.PRIS=0
NVIC1.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC1.PriorityGroup=NVIC_PRIORITYGROUP_4
NVIC1.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC1.SecureFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC1.SysTick_IRQn=true\:15\:0\:false\:false\:true\:false\:true\:false
NVIC1.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
PA13(JTMS/SWDIO).GPIOParameters=PinAttribute
PA13(JTMS/SWDIO).Locked=true
PA13(JTMS/SWDIO).Mode=Serial_Wire
PA13(JTMS/SWDIO).PinAttribute=FSBL
PA13(JTMS/SWDIO).Signal=DEBUG_JTMS-SWDIO
PA14(JTCK/SWCLK).GPIOParameters=PinAttribute
PA14(JTCK/SWCLK).Locked=true
PA14(JTCK/SWCLK).Mode=Serial_Wire
PA14(JTCK/SWCLK).PinAttribute=FSBL
PA14(JTCK/SWCLK).Signal=DEBUG_JTCK-SWCLK
PB12.ContextOwner=FSBL
PB12.GPIOParameters=PinState,GPIO_Label,PinAttribute
PB12.GPIO_Label=EXT_SMPS
PB12.Locked=true
PB12.PinAttribute=FSBL
PB12.PinState=GPIO_PIN_SET
PB12.Signal=GPIO_Output
PB5(JTDO/TRACESWO).GPIOParameters=PinAttribute
PB5(JTDO/TRACESWO).Locked=true
PB5(JTDO/TRACESWO).PinAttribute=FSBL
PB5(JTDO/TRACESWO).Signal=DEBUG_JTDO-SWO
PCC.Bar.Display=Horizontal Bar
PCC.Checker=false
PCC.Display=Plot\: All Steps
PCC.Line=STM32N6x7
PCC.MCU=STM32N657X0HxQ
PCC.PartNumber=STM32N657X0HxQ
PCC.SequenceTime=1.0 ms
PCC.SequenceTime.Unit=ms
PCC.Series=STM32N6
PCC.Temperature=25
PCC.Vdd=1.8
PG0.ContextOwner=FSBL
PG0.GPIOParameters=GPIO_Label,PinAttribute
PG0.GPIO_Label=GREEN_LED
PG0.Locked=true
PG0.PinAttribute=FSBL
PG0.Signal=GPIO_Output
PN0.GPIOParameters=PinAttribute
PN0.Mode=XSPI2_Port2Octo
PN0.PinAttribute=FSBL
PN0.Signal=XSPIM_P2_DQS0
PN1.GPIOParameters=PinAttribute
PN1.Mode=XSPI2_NCS1_Port2
PN1.PinAttribute=FSBL
PN1.Signal=XSPIM_P2_NCS1
PN10.GPIOParameters=PinAttribute
PN10.Mode=XSPI2_Port2Octo
PN10.PinAttribute=FSBL
PN10.Signal=XSPIM_P2_IO6
PN11.GPIOParameters=PinAttribute
PN11.Mode=XSPI2_Port2Octo
PN11.PinAttribute=FSBL
PN11.Signal=XSPIM_P2_IO7
PN2.GPIOParameters=PinAttribute
PN2.Mode=XSPI2_Port2Octo
PN2.PinAttribute=FSBL
PN2.Signal=XSPIM_P2_IO0
PN3.GPIOParameters=PinAttribute
PN3.Mode=XSPI2_Port2Octo
PN3.PinAttribute=FSBL
PN3.Signal=XSPIM_P2_IO1
PN4.GPIOParameters=PinAttribute
PN4.Mode=XSPI2_Port2Octo
PN4.PinAttribute=FSBL
PN4.Signal=XSPIM_P2_IO2
PN5.GPIOParameters=PinAttribute
PN5.Mode=XSPI2_Port2Octo
PN5.PinAttribute=FSBL
PN5.Signal=XSPIM_P2_IO3
PN6.GPIOParameters=PinAttribute
PN6.Mode=XSPI2_Port2Octo
PN6.PinAttribute=FSBL
PN6.Signal=XSPIM_P2_CLK
PN8.GPIOParameters=PinAttribute
PN8.Mode=XSPI2_Port2Octo
PN8.PinAttribute=FSBL
PN8.Signal=XSPIM_P2_IO4
PN9.GPIOParameters=PinAttribute
PN9.Mode=XSPI2_Port2Octo
PN9.PinAttribute=FSBL
PN9.Signal=XSPIM_P2_IO5
PinOutPanel.CurrentBGAView=Top
PinOutPanel.RotationAngle=0
ProjectManager.AskForMigrate=true
ProjectManager.BackupPrevious=false
ProjectManager.CompilerLinker=GCC
ProjectManager.CompilerOptimize=6
ProjectManager.ComputerToolchain=false
ProjectManager.CoupleFile=true
ProjectManager.CustomerFirmwarePackage=..\\..\\..\\..\\..\\..\\STM32Cube\\Repository\\STM32Cube_FW_N6_V1.4.1
ProjectManager.DefaultFWLocation=false
ProjectManager.DeletePrevious=true
ProjectManager.DeviceId=STM32N657X0HxQ
ProjectManager.Example=Template_FSBL_XIP
ProjectManager.ExampleSource=CubeFw
ProjectManager.FirmwarePackage=STM32Cube FW_N6 V1.4.1
ProjectManager.FreePins=false
ProjectManager.FreePinsContext=FSBL
ProjectManager.HalAssertFull=true
ProjectManager.HeapSize=FSBL-0x200,Appli-0x200,ExtMemLoader-0x200
ProjectManager.KeepUserCode=true
ProjectManager.LastFirmware=true
ProjectManager.LibraryCopy=1
ProjectManager.MainLocation=Src
ProjectManager.NoMain=false
ProjectManager.PreviousToolchain=
ProjectManager.ProjectBuild=false
ProjectManager.ProjectFileName=blto2_FSBL.ioc
ProjectManager.ProjectName=blto2_FSBL
ProjectManager.ProjectStructure=FSBL\:FSBL\:true;Appli\:Appli\:false;ExtMemLoader\:ExtMemLoader\:false;
ProjectManager.RegisterCallBack=
ProjectManager.StackSize=FSBL-0x800,Appli-0x800,ExtMemLoader-0x800
ProjectManager.TargetToolchain=STM32CubeIDE
ProjectManager.ToolChainLocation=
ProjectManager.UAScriptAfterPath=
ProjectManager.UAScriptBeforePath=
ProjectManager.UnderRoot=false
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false-FSBL,2-MX_GPIO_Init-GPIO-false-HAL-true-FSBL,3-MX_XSPI2_Init-XSPI2-false-HAL-true-FSBL,false-4-MX_XSPIM_Init-XSPIM-false-HAL-true-FSBL,5-MX_BSEC_Init-BSEC-false-HAL-true-FSBL,6-MX_EXTMEM_MANAGER_Init-EXTMEM_MANAGER-false-HAL-false-FSBL,1-SystemIsolation_Config-RIF-false-HAL-true-Appli,0-MX_CORTEX_M55_FSBL_Init-CORTEX_M55_FSBL-false-HAL-true-FSBL,0-MX_CORTEX_M55_S_Init-CORTEX_M55_S-false-HAL-true-Appli,1-MX_EXTMEM_MANAGER_Init-EXTMEM_MANAGER-false-HAL-false-ExtMemLoader
RAMCFG.IPParameters=Instance-RAMCFG1_Activate,Instance-RAMCFG2_Activate,Instance-RAMCFG3_Activate,Instance-RAMCFG4_Activate,Instance-RAMCFG5_Activate,Instance-RAMCFG6_Activate,Instance-AHBSRAMCFG1_Activate,Instance-AHBSRAMCFG2_Activate,Instance-BKPRAM_Activate,Instance-FLEXRAM_Activate,Instance-VENCRAM_Activate,SYSCFG_ITCM_size
RAMCFG.Instance-AHBSRAMCFG1_Activate=RAMCFG_SRAM1_AHB
RAMCFG.Instance-AHBSRAMCFG2_Activate=RAMCFG_SRAM2_AHB
RAMCFG.Instance-BKPRAM_Activate=RAMCFG_BKPSRAM
RAMCFG.Instance-FLEXRAM_Activate=RAMCFG_FLEXRAM
RAMCFG.Instance-RAMCFG1_Activate=RAMCFG_SRAM1_AXI
RAMCFG.Instance-RAMCFG2_Activate=RAMCFG_SRAM2_AXI
RAMCFG.Instance-RAMCFG3_Activate=RAMCFG_SRAM3_AXI
RAMCFG.Instance-RAMCFG4_Activate=RAMCFG_SRAM4_AXI
RAMCFG.Instance-RAMCFG5_Activate=RAMCFG_SRAM5_AXI
RAMCFG.Instance-RAMCFG6_Activate=RAMCFG_SRAM6_AXI
RAMCFG.Instance-VENCRAM_Activate=RAMCFG_VENC_RAM
RAMCFG.SYSCFG_ITCM_size=SYSCFG_ITCM_64K
RCC.ADC12Freq_Value=200000000
RCC.ADFFreq_Value=200000000
RCC.AHB1234Freq_Value=200000000
RCC.AHBFreq_Value=100000000
RCC.APB1Freq_Value=200000000
RCC.APB2Freq_Value=200000000
RCC.APB4Freq_Value=200000000
RCC.APB5Freq_Value=200000000
RCC.AXIClockFreq_Value=400000000
RCC.CKPERFreq_Value=64000000
RCC.CPUCLKSource=RCC_CPUCLKSOURCE_IC1
RCC.CortexFreq_Value=100000000
RCC.CpuClockFreq_Value=800000000
RCC.DCMIPPFreq_Value=200000000
RCC.ETH1Freq_Value=200000000
RCC.FBDIV4=125
RCC.FDCANFreq_Value=200000000
RCC.FMCFreq_Value=200000000
RCC.FOUTPOSTDIV1Freq_Value=1600000000
RCC.FOUTPOSTDIV2Freq_Value=1600000000
RCC.FOUTPOSTDIV3Freq_Value=1600000000
RCC.FOUTPOSTDIV4Freq_Value=1000000000
RCC.FREFDIV4=8
RCC.FamilyName=M
RCC.HSE_VALUE=48000000
RCC.HSI_VALUE=64000000
RCC.I2C1Freq_Value=200000000
RCC.I2C2Freq_Value=200000000
RCC.I2C3Freq_Value=200000000
RCC.I2C4Freq_Value=200000000
RCC.I3C1Freq_Value=200000000
RCC.I3C2Freq_Value=200000000
RCC.IC10Freq_VALUE=1600000000
RCC.IC11Freq_VALUE=400000000
RCC.IC12Freq_VALUE=1600000000
RCC.IC13Freq_VALUE=1600000000
RCC.IC14Freq_VALUE=1600000000
RCC.IC15Freq_VALUE=1600000000
RCC.IC16Freq_VALUE=1000000000
RCC.IC17Freq_VALUE=1000000000
RCC.IC18Freq_VALUE=1000000000
RCC.IC19Freq_VALUE=1000000000
RCC.IC1Div=2
RCC.IC1Freq_VALUE=800000000
RCC.IC20Freq_VALUE=1000000000
RCC.IC2Freq_VALUE=400000000
RCC.IC3Div=32
RCC.IC3Freq_VALUE=50000000
RCC.IC4Freq_VALUE=1600000000
RCC.IC5Freq_VALUE=1600000000
RCC.IC6CLKSource=RCC_ICCLKSOURCE_PLL4
RCC.IC6Div=1
RCC.IC6Freq_VALUE=1000000000
RCC.IC7Freq_VALUE=1600000000
RCC.IC8Freq_VALUE=1600000000
RCC.IC9Freq_VALUE=1600000000
RCC.IPParameters=ADC12Freq_Value,ADFFreq_Value,AHB1234Freq_Value,AHBFreq_Value,APB1Freq_Value,APB2Freq_Value,APB4Freq_Value,APB5Freq_Value,AXIClockFreq_Value,CKPERFreq_Value,CPUCLKSource,CortexFreq_Value,CpuClockFreq_Value,DCMIPPFreq_Value,ETH1Freq_Value,FBDIV4,FDCANFreq_Value,FMCFreq_Value,FOUTPOSTDIV1Freq_Value,FOUTPOSTDIV2Freq_Value,FOUTPOSTDIV3Freq_Value,FOUTPOSTDIV4Freq_Value,FREFDIV4,FamilyName,HSE_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I3C1Freq_Value,I3C2Freq_Value,IC10Freq_VALUE,IC11Freq_VALUE,IC12Freq_VALUE,IC13Freq_VALUE,IC14Freq_VALUE,IC15Freq_VALUE,IC16Freq_VALUE,IC17Freq_VALUE,IC18Freq_VALUE,IC19Freq_VALUE,IC1Div,IC1Freq_VALUE,IC20Freq_VALUE,IC2Freq_VALUE,IC3Div,IC3Freq_VALUE,IC4Freq_VALUE,IC5Freq_VALUE,IC6CLKSource,IC6Div,IC6Freq_VALUE,IC7Freq_VALUE,IC8Freq_VALUE,IC9Freq_VALUE,LPTIM1Freq_Value,LPTIM2Freq_Value,LPTIM3Freq_Value,LPTIM4Freq_Value,LPTIM5Freq_Value,LPUART1Freq_Value,LSE_VALUE,LSI_VALUE,LTDCFreq_Value,MCO1PinFreq_Value,MCO2PinFreq_Value,MDFFreq_Value,MSI_VALUE,OTGHS1Freq_Value,OTGHS2Freq_Value,OTGPHY1Freq_Value,OTGPHY2Freq_Value,PSSIFreq_Value,RCC_MCO2Source,RCC_MCODiv1,RCC_MCODiv2,RTCFreq_Value,SAI1Freq_Value,SAI2Freq_Value,SDMMC1Freq_Value,SDMMC2Freq_Value,SPDIFRX1Freq_Value,SPI1Freq_Value,SPI2Freq_Value,SPI3Freq_Value,SPI4Freq_Value,SPI5Freq_Value,SPI6Freq_Value,SYSBCLKFreq_VALUE,SYSBCLKSource,SYSCCLKFreq_VALUE,SYSDCLKFreq_VALUE,TIMGFreq_Value,UART4Freq_Value,UART5Freq_Value,UART7Freq_Value,UART8Freq_Value,UART9Freq_Value,USART10Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USART6Freq_Value,VCO1OutputFreq_Value,VCO2OutputFreq_Value,VCO3OutputFreq_Value,VCO4OutputFreq_Value,VCOInput1Freq_Value,VCOInput2Freq_Value,VCOInput3Freq_Value,VCOInput4Freq_Value,XSPI1Freq_Value,XSPI2ClockSelection,XSPI2Freq_Value,XSPI3Freq_Value
RCC.LPTIM1Freq_Value=200000000
RCC.LPTIM2Freq_Value=200000000
RCC.LPTIM3Freq_Value=200000000
RCC.LPTIM4Freq_Value=200000000
RCC.LPTIM5Freq_Value=200000000
RCC.LPUART1Freq_Value=200000000
RCC.LSE_VALUE=32768
RCC.LSI_VALUE=32000
RCC.LTDCFreq_Value=200000000
RCC.MCO1PinFreq_Value=6400000
RCC.MCO2PinFreq_Value=400000000
RCC.MDFFreq_Value=200000000
RCC.MSI_VALUE=16000000
RCC.OTGHS1Freq_Value=24000000
RCC.OTGHS2Freq_Value=24000000
RCC.OTGPHY1Freq_Value=24000000
RCC.OTGPHY2Freq_Value=24000000
RCC.PSSIFreq_Value=200000000
RCC.RCC_MCO2Source=RCC_MCO2SOURCE_IC15
RCC.RCC_MCODiv1=RCC_MCODIV_10
RCC.RCC_MCODiv2=RCC_MCODIV_4
RCC.RTCFreq_Value=32000
RCC.SAI1Freq_Value=200000000
RCC.SAI2Freq_Value=200000000
RCC.SDMMC1Freq_Value=200000000
RCC.SDMMC2Freq_Value=200000000
RCC.SPDIFRX1Freq_Value=200000000
RCC.SPI1Freq_Value=200000000
RCC.SPI2Freq_Value=200000000
RCC.SPI3Freq_Value=200000000
RCC.SPI4Freq_Value=200000000
RCC.SPI5Freq_Value=200000000
RCC.SPI6Freq_Value=200000000
RCC.SYSBCLKFreq_VALUE=400000000
RCC.SYSBCLKSource=RCC_SYSCLKSOURCE_IC2_IC6_IC11
RCC.SYSCCLKFreq_VALUE=1000000000
RCC.SYSDCLKFreq_VALUE=400000000
RCC.TIMGFreq_Value=400000000
RCC.UART4Freq_Value=200000000
RCC.UART5Freq_Value=200000000
RCC.UART7Freq_Value=200000000
RCC.UART8Freq_Value=200000000
RCC.UART9Freq_Value=200000000
RCC.USART10Freq_Value=200000000
RCC.USART1Freq_Value=200000000
RCC.USART2Freq_Value=200000000
RCC.USART3Freq_Value=200000000
RCC.USART6Freq_Value=200000000
RCC.VCO1OutputFreq_Value=1600000000
RCC.VCO2OutputFreq_Value=1600000000
RCC.VCO3OutputFreq_Value=1600000000
RCC.VCO4OutputFreq_Value=1000000000
RCC.VCOInput1Freq_Value=64000000
RCC.VCOInput2Freq_Value=64000000
RCC.VCOInput3Freq_Value=64000000
RCC.VCOInput4Freq_Value=8000000
RCC.XSPI1Freq_Value=200000000
RCC.XSPI2ClockSelection=RCC_XSPI2CLKSOURCE_IC3
RCC.XSPI2Freq_Value=50000000
RCC.XSPI3Freq_Value=200000000
RIF.DCMIPP_CID_RIMU=0
RIF.DMA2D_CID_RIMU=0
RIF.ETH1_CID_RIMU=0
RIF.ETR_CID_RIMU=0
RIF.GPU_CID_RIMU=0
RIF.IPParameters=ETR_CID_RIMU,SDMMC1_CID_RIMU,SDMMC2_CID_RIMU,OTG1_CID_RIMU,OTG2_CID_RIMU,ETH1_CID_RIMU,GPU_CID_RIMU,DMA2D_CID_RIMU,DCMIPP_CID_RIMU,VENC_CID_RIMU,LTDC_L1_CID_RIMU,LTDC_L2_CID_RIMU
RIF.LTDC_L1_CID_RIMU=0
RIF.LTDC_L2_CID_RIMU=0
RIF.OTG1_CID_RIMU=0
RIF.OTG2_CID_RIMU=0
RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 0\ Cid=-
RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 0\ Privilege=true
RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 0\ Secure=false
RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 1\ Cid=-
RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 1\ Privilege=true
RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 1\ Secure=false
RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 10\ Cid=-
RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 10\ Privilege=true
RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 10\ Secure=false
RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 11\ Cid=-
RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 11\ Privilege=true
RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 11\ Secure=false
RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 12\ Cid=-
RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 12\ Privilege=true
RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 12\ Secure=false
RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 13\ Cid=-
RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 13\ Privilege=true
RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 13\ Secure=false
RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 14\ Cid=-
RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 14\ Privilege=true
RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 14\ Secure=false
RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 15\ Cid=-
RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 15\ Privilege=true
RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 15\ Secure=false
RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 2\ Cid=-
RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 2\ Privilege=true
RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 2\ Secure=false
RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 3\ Cid=-
RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 3\ Privilege=true
RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 3\ Secure=false
RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 4\ Cid=-
RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 4\ Privilege=true
RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 4\ Secure=false
RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 5\ Cid=-
RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 5\ Privilege=true
RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 5\ Secure=false
RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 6\ Cid=-
RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 6\ Privilege=true
RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 6\ Secure=false
RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 7\ Cid=-
RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 7\ Privilege=true
RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 7\ Secure=false
RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 8\ Cid=-
RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 8\ Privilege=true
RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 8\ Secure=false
RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 9\ Cid=-
RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 9\ Privilege=true
RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 9\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PA0\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PA0\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PA1\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PA1\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PA10\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PA10\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PA11\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PA11\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PA12\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PA12\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PA2\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PA2\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PA3\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PA3\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PA4\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PA4\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PA5\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PA5\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PA6\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PA6\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PA7\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PA7\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PA8\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PA8\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PA9\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PA9\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PB0\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PB0\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PB1\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PB1\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PB10\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PB10\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PB11\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PB11\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PB12\ Cid=1
RIF.RIFAWARE.GPIO\ Feature\ PB12\ FSBL=true
RIF.RIFAWARE.GPIO\ Feature\ PB12\ Secure=true
RIF.RIFAWARE.GPIO\ Feature\ PB13\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PB13\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PB14\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PB14\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PB15\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PB15\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PB2\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PB2\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PB3\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PB3\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PB6\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PB6\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PB7\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PB7\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PB8\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PB8\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PB9\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PB9\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PC0\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PC0\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PC1\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PC1\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PC10\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PC10\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PC11\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PC11\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PC12\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PC12\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PC13\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PC13\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PC2\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PC2\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PC3\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PC3\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PC4\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PC4\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PC5\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PC5\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PC6\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PC6\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PC7\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PC7\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PC8\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PC8\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PC9\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PC9\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PD0\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PD0\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PD1\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PD1\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PD10\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PD10\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PD11\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PD11\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PD12\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PD12\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PD13\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PD13\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PD14\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PD14\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PD15\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PD15\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PD2\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PD2\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PD3\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PD3\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PD4\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PD4\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PD5\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PD5\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PD6\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PD6\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PD7\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PD7\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PD8\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PD8\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PD9\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PD9\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PE0\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PE0\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PE1\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PE1\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PE10\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PE10\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PE11\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PE11\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PE12\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PE12\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PE13\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PE13\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PE14\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PE14\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PE15\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PE15\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PE2\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PE2\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PE3\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PE3\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PE4\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PE4\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PE5\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PE5\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PE6\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PE6\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PE7\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PE7\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PE8\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PE8\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PE9\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PE9\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PF0\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PF0\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PF1\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PF1\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PF10\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PF10\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PF11\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PF11\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PF12\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PF12\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PF13\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PF13\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PF14\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PF14\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PF15\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PF15\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PF2\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PF2\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PF3\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PF3\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PF4\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PF4\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PF5\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PF5\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PF6\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PF6\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PF7\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PF7\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PF8\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PF8\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PF9\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PF9\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PG0\ Cid=1
RIF.RIFAWARE.GPIO\ Feature\ PG0\ FSBL=true
RIF.RIFAWARE.GPIO\ Feature\ PG0\ Secure=true
RIF.RIFAWARE.GPIO\ Feature\ PG1\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PG1\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PG10\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PG10\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PG11\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PG11\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PG12\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PG12\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PG13\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PG13\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PG14\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PG14\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PG15\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PG15\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PG2\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PG2\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PG3\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PG3\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PG4\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PG4\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PG5\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PG5\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PG6\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PG6\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PG7\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PG7\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PG8\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PG8\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PG9\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PG9\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PH2\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PH2\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PH3\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PH3\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PH4\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PH4\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PH5\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PH5\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PH6\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PH6\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PH7\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PH7\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PH8\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PH8\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PH9\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PH9\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PN0\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PN0\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PN1\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PN1\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PN10\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PN10\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PN11\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PN11\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PN12\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PN12\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PN2\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PN2\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PN3\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PN3\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PN4\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PN4\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PN5\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PN5\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PN6\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PN6\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PN7\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PN7\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PN8\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PN8\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PN9\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PN9\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PO0\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PO0\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PO1\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PO1\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PO2\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PO2\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PO3\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PO3\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PO4\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PO4\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PO5\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PO5\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PP0\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PP0\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PP1\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PP1\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PP10\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PP10\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PP11\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PP11\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PP12\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PP12\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PP13\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PP13\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PP14\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PP14\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PP15\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PP15\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PP2\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PP2\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PP3\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PP3\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PP4\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PP4\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PP5\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PP5\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PP6\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PP6\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PP7\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PP7\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PP8\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PP8\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PP9\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PP9\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PQ0\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PQ0\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PQ1\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PQ1\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PQ2\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PQ2\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PQ3\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PQ3\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PQ4\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PQ4\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PQ5\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PQ5\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PQ6\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PQ6\ Secure=false
RIF.RIFAWARE.GPIO\ Feature\ PQ7\ Cid=-
RIF.RIFAWARE.GPIO\ Feature\ PQ7\ Secure=false
RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 0\ Cid=-
RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 0\ Privilege=true
RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 0\ Secure=false
RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 1\ Cid=-
RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 1\ Privilege=true
RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 1\ Secure=false
RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 10\ Cid=-
RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 10\ Privilege=true
RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 10\ Secure=false
RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 11\ Cid=-
RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 11\ Privilege=true
RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 11\ Secure=false
RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 12\ Cid=-
RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 12\ Privilege=true
RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 12\ Secure=false
RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 13\ Cid=-
RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 13\ Privilege=true
RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 13\ Secure=false
RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 14\ Cid=-
RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 14\ Privilege=true
RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 14\ Secure=false
RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 15\ Cid=-
RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 15\ Privilege=true
RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 15\ Secure=false
RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 2\ Cid=-
RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 2\ Privilege=true
RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 2\ Secure=false
RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 3\ Cid=-
RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 3\ Privilege=true
RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 3\ Secure=false
RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 4\ Cid=-
RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 4\ Privilege=true
RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 4\ Secure=false
RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 5\ Cid=-
RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 5\ Privilege=true
RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 5\ Secure=false
RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 6\ Cid=-
RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 6\ Privilege=true
RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 6\ Secure=false
RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 7\ Cid=-
RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 7\ Privilege=true
RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 7\ Secure=false
RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 8\ Cid=-
RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 8\ Privilege=true
RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 8\ Secure=false
RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 9\ Cid=-
RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 9\ Privilege=true
RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 9\ Secure=false
RIF.RIFAWARE.LTDC\ Feature\ LTDC_L1\ Cid=-
RIF.RIFAWARE.LTDC\ Feature\ LTDC_L1\ Secure=false
RIF.RIFAWARE.LTDC\ Feature\ LTDC_L2\ Cid=-
RIF.RIFAWARE.LTDC\ Feature\ LTDC_L2\ Secure=false
RIF.RIFAWARE.PWR\ Feature\ Backup\ domain\ protection\ Cid=-
RIF.RIFAWARE.PWR\ Feature\ Backup\ domain\ protection\ Secure=false
RIF.RIFAWARE.PWR\ Feature\ CPU\ power\ control\ protection\ Cid=-
RIF.RIFAWARE.PWR\ Feature\ CPU\ power\ control\ protection\ Secure=false
RIF.RIFAWARE.PWR\ Feature\ I-TCM,\ D-TCM,\ and\ I-TCM\ FLEXMEM\ low\ power\ control\ protection\ Cid=-
RIF.RIFAWARE.PWR\ Feature\ I-TCM,\ D-TCM,\ and\ I-TCM\ FLEXMEM\ low\ power\ control\ protection\ Secure=false
RIF.RIFAWARE.PWR\ Feature\ Peripheral\ voltage\ monitor\ protection\ Cid=-
RIF.RIFAWARE.PWR\ Feature\ Peripheral\ voltage\ monitor\ protection\ Secure=false
RIF.RIFAWARE.PWR\ Feature\ Programmable\ voltage\ detector\ protection\ Cid=-
RIF.RIFAWARE.PWR\ Feature\ Programmable\ voltage\ detector\ protection\ Secure=false
RIF.RIFAWARE.PWR\ Feature\ System\ supply\ configuration\ protection\ Cid=-
RIF.RIFAWARE.PWR\ Feature\ System\ supply\ configuration\ protection\ Secure=false
RIF.RIFAWARE.PWR\ Feature\ VDDCORE\ monitor\ protection\ Cid=-
RIF.RIFAWARE.PWR\ Feature\ VDDCORE\ monitor\ protection\ Secure=false
RIF.RIFAWARE.PWR\ Feature\ Voltage\ scaling\ selection\ protection\ Cid=-
RIF.RIFAWARE.PWR\ Feature\ Voltage\ scaling\ selection\ protection\ Secure=false
RIF.RIFAWARE.PWR\ Feature\ WKUP1\ pin\ protection\ Cid=-
RIF.RIFAWARE.PWR\ Feature\ WKUP1\ pin\ protection\ Secure=false
RIF.RIFAWARE.PWR\ Feature\ WKUP2\ pin\ protection\ Cid=-
RIF.RIFAWARE.PWR\ Feature\ WKUP2\ pin\ protection\ Secure=false
RIF.RIFAWARE.PWR\ Feature\ WKUP3\ pin\ protection\ Cid=-
RIF.RIFAWARE.PWR\ Feature\ WKUP3\ pin\ protection\ Secure=false
RIF.RIFAWARE.PWR\ Feature\ WKUP4\ pin\ protection\ Cid=-
RIF.RIFAWARE.PWR\ Feature\ WKUP4\ pin\ protection\ Secure=false
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ BUS\ system\ configuration\ bits\ Cid=-
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ BUS\ system\ configuration\ bits\ Secure=false
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ DFT\ system\ configuration\ bits\ Cid=-
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ DFT\ system\ configuration\ bits\ Secure=false
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC1\ divider\ configuration\ bits\ Cid=-
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC1\ divider\ configuration\ bits\ Secure=false
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC10\ divider\ configuration\ bits\ Cid=-
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC10\ divider\ configuration\ bits\ Secure=false
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC11\ divider\ configuration\ bits\ Cid=-
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC11\ divider\ configuration\ bits\ Secure=false
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC12\ divider\ configuration\ bits\ Cid=-
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC12\ divider\ configuration\ bits\ Secure=false
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC13\ divider\ configuration\ bits\ Cid=-
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC13\ divider\ configuration\ bits\ Secure=false
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC14\ divider\ configuration\ bits\ Cid=-
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC14\ divider\ configuration\ bits\ Secure=false
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC15\ divider\ configuration\ bits\ Cid=-
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC15\ divider\ configuration\ bits\ Secure=false
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC16\ divider\ configuration\ bits\ Cid=-
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC16\ divider\ configuration\ bits\ Secure=false
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC17\ divider\ configuration\ bits\ Cid=-
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC17\ divider\ configuration\ bits\ Secure=false
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC18\ divider\ configuration\ bits\ Cid=-
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC18\ divider\ configuration\ bits\ Secure=false
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC19\ divider\ configuration\ bits\ Cid=-
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC19\ divider\ configuration\ bits\ Secure=false
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC2\ divider\ configuration\ bits\ Cid=-
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC2\ divider\ configuration\ bits\ Secure=false
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC20\ divider\ configuration\ bits\ Cid=-
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC20\ divider\ configuration\ bits\ Secure=false
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC3\ divider\ configuration\ bits\ Cid=-
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC3\ divider\ configuration\ bits\ Secure=false
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC4\ divider\ configuration\ bits\ Cid=-
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC4\ divider\ configuration\ bits\ Secure=false
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC5\ divider\ configuration\ bits\ Cid=-
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC5\ divider\ configuration\ bits\ Secure=false
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC6\ divider\ configuration\ bits\ Cid=-
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC6\ divider\ configuration\ bits\ Secure=false
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC7\ divider\ configuration\ bits\ Cid=-
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC7\ divider\ configuration\ bits\ Secure=false
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC8\ divider\ configuration\ bits\ Cid=-
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC8\ divider\ configuration\ bits\ Secure=false
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC9\ divider\ configuration\ bits\ Cid=-
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC9\ divider\ configuration\ bits\ Secure=false
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ INT\ system\ configuration\ bits\ Cid=-
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ INT\ system\ configuration\ bits\ Secure=false
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ MOD\ system\ configuration\ bits\ Cid=-
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ MOD\ system\ configuration\ bits\ Secure=false
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ PER\ system\ configuration\ bits\ Cid=-
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ PER\ system\ configuration\ bits\ Secure=false
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ PLL1\ configuration\ bits\u200B\ Cid=-
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ PLL1\ configuration\ bits\u200B\ Secure=false
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ PLL2\ configuration\ bits\ Cid=-
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ PLL2\ configuration\ bits\ Secure=false
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ PLL3\ configuration\ bits\ Cid=-
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ PLL3\ configuration\ bits\ Secure=false
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ PLL4\ configuration\ bits\ Cid=-
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ PLL4\ configuration\ bits\ Secure=false
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ RST\ system\ configuration\ bits\ Cid=-
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ RST\ system\ configuration\ bits\ Secure=false
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ SYS\ system\ configuration\ bit\ Cid=-
RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ SYS\ system\ configuration\ bit\ Secure=false
RIF.RIFAWARE.RCC\ Feature\ protection\ of\ ACLKN\ bus\ configuration\ bits\ Cid=-
RIF.RIFAWARE.RCC\ Feature\ protection\ of\ ACLKN\ bus\ configuration\ bits\ Secure=false
RIF.RIFAWARE.RCC\ Feature\ protection\ of\ ACLKNC\ bus\ configuration\ bits\ Cid=-
RIF.RIFAWARE.RCC\ Feature\ protection\ of\ ACLKNC\ bus\ configuration\ bits\ Secure=false
RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHB1\ bus\ configuration\ bits\ Cid=-
RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHB1\ bus\ configuration\ bits\ Secure=false
RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHB2\ bus\ configuration\ bits\ Cid=-
RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHB2\ bus\ configuration\ bits\ Secure=false
RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHB3\ bus\ configuration\ bits\ Cid=-
RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHB3\ bus\ configuration\ bits\ Secure=false
RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHB4\ bus\ configuration\ bits\ Cid=-
RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHB4\ bus\ configuration\ bits\ Secure=false
RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHB5\ bus\ configuration\ bits\ Cid=-
RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHB5\ bus\ configuration\ bits\ Secure=false
RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHBM\ bus\ configuration\ bits\ Cid=-
RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHBM\ bus\ configuration\ bits\ Secure=false
RIF.RIFAWARE.RCC\ Feature\ protection\ of\ APB1\ bus\ configuration\ bits\ Cid=-
RIF.RIFAWARE.RCC\ Feature\ protection\ of\ APB1\ bus\ configuration\ bits\ Secure=false
RIF.RIFAWARE.RCC\ Feature\ protection\ of\ APB2\ bus\ configuration\ bits\ Cid=-
RIF.RIFAWARE.RCC\ Feature\ protection\ of\ APB2\ bus\ configuration\ bits\ Secure=false
RIF.RIFAWARE.RCC\ Feature\ protection\ of\ APB3\ bus\ configuration\ bits\ Cid=-
RIF.RIFAWARE.RCC\ Feature\ protection\ of\ APB3\ bus\ configuration\ bits\ Secure=false
RIF.RIFAWARE.RCC\ Feature\ protection\ of\ APB4\ bus\ configuration\ bits\ Cid=-
RIF.RIFAWARE.RCC\ Feature\ protection\ of\ APB4\ bus\ configuration\ bits\ Secure=false
RIF.RIFAWARE.RCC\ Feature\ protection\ of\ APB5\ bus\ configuration\ bits\ Cid=-
RIF.RIFAWARE.RCC\ Feature\ protection\ of\ APB5\ bus\ configuration\ bits\ Secure=false
RIF.RIFAWARE.RCC\ Feature\ protection\ of\ NOC\ bus\ configuration\ bits\ Cid=-
RIF.RIFAWARE.RCC\ Feature\ protection\ of\ NOC\ bus\ configuration\ bits\ Secure=false
RIF.RIFAWARE.RTC\ Feature\ Alarm\ A\ and\ SSR\ underflow\ protection\u200B\ Cid=-
RIF.RIFAWARE.RTC\ Feature\ Alarm\ A\ and\ SSR\ underflow\ protection\u200B\ Secure=false
RIF.RIFAWARE.RTC\ Feature\ Alarm\ B\ protection\ Cid=-
RIF.RIFAWARE.RTC\ Feature\ Alarm\ B\ protection\ Secure=false
RIF.RIFAWARE.RTC\ Feature\ Initialization\ protection\ Cid=-
RIF.RIFAWARE.RTC\ Feature\ Initialization\ protection\ Secure=false
RIF.RIFAWARE.RTC\ Feature\ RTC\ global\ protection\ Cid=-
RIF.RIFAWARE.RTC\ Feature\ RTC\ global\ protection\ Secure=false
RIF.RIFAWARE.RTC\ Feature\ Shift\ register,\ daylight\ saving,\ calibration\ and\ reference\ clock\ protection\ Cid=-
RIF.RIFAWARE.RTC\ Feature\ Shift\ register,\ daylight\ saving,\ calibration\ and\ reference\ clock\ protection\ Secure=false
RIF.RIFAWARE.RTC\ Feature\ Timestamp\ protection\ Cid=-
RIF.RIFAWARE.RTC\ Feature\ Timestamp\ protection\ Secure=false
RIF.RIFAWARE.RTC\ Feature\ Wake-up\ timer\ protection\ Cid=-
RIF.RIFAWARE.RTC\ Feature\ Wake-up\ timer\ protection\ Secure=false
RIF.SDMMC1_CID_RIMU=0
RIF.SDMMC2_CID_RIMU=0
RIF.VENC_CID_RIMU=0
RIF.default_config=false
VP_BSEC_VS_BSEC.Mode=BSEC_Activate
VP_BSEC_VS_BSEC.Signal=BSEC_VS_BSEC
VP_EXTMEM_MANAGER_SIG_Activate_EXTMEM.Mode=Activate_EXTMEM
VP_EXTMEM_MANAGER_SIG_Activate_EXTMEM.Signal=EXTMEM_MANAGER_SIG_Activate_EXTMEM
VP_RAMCFG_VS_AHBSRAM1.Mode=AHBSRAMCFG1_Activate
VP_RAMCFG_VS_AHBSRAM1.Signal=RAMCFG_VS_AHBSRAM1
VP_RAMCFG_VS_AHBSRAM2.Mode=AHBSRAMCFG2_Activate
VP_RAMCFG_VS_AHBSRAM2.Signal=RAMCFG_VS_AHBSRAM2
VP_RAMCFG_VS_BKPRAM.Mode=BKPRAM_Activate
VP_RAMCFG_VS_BKPRAM.Signal=RAMCFG_VS_BKPRAM
VP_RAMCFG_VS_FLEXRAM.Mode=FLEXRAM_Activate
VP_RAMCFG_VS_FLEXRAM.Signal=RAMCFG_VS_FLEXRAM
VP_RAMCFG_VS_RAMCFG1.Mode=RAMCFG1_Activate
VP_RAMCFG_VS_RAMCFG1.Signal=RAMCFG_VS_RAMCFG1
VP_RAMCFG_VS_RAMCFG2.Mode=RAMCFG2_Activate
VP_RAMCFG_VS_RAMCFG2.Signal=RAMCFG_VS_RAMCFG2
VP_RAMCFG_VS_RAMCFG3.Mode=RAMCFG3_Activate
VP_RAMCFG_VS_RAMCFG3.Signal=RAMCFG_VS_RAMCFG3
VP_RAMCFG_VS_RAMCFG4.Mode=RAMCFG4_Activate
VP_RAMCFG_VS_RAMCFG4.Signal=RAMCFG_VS_RAMCFG4
VP_RAMCFG_VS_RAMCFG5.Mode=RAMCFG5_Activate
VP_RAMCFG_VS_RAMCFG5.Signal=RAMCFG_VS_RAMCFG5
VP_RAMCFG_VS_RAMCFG6.Mode=RAMCFG6_Activate
VP_RAMCFG_VS_RAMCFG6.Signal=RAMCFG_VS_RAMCFG6
VP_RAMCFG_VS_VENCRAM.Mode=VENCRAM_Activate
VP_RAMCFG_VS_VENCRAM.Signal=RAMCFG_VS_VENCRAM
VP_RIF_VS_RIF1.Mode=RISUP
VP_RIF_VS_RIF1.Signal=RIF_VS_RIF1
VP_XSPI2_VS_octo.Mode=octo_mode
VP_XSPI2_VS_octo.Signal=XSPI2_VS_octo
VP_XSPIM_VS_IO.Mode=Direct
VP_XSPIM_VS_IO.Signal=XSPIM_VS_IO
XSPI2.ChipSelectHighTimeCycle=2
XSPI2.ClockPrescaler=0
XSPI2.DelayHoldQuarterCycle=HAL_XSPI_DHQC_ENABLE
XSPI2.FifoThresholdByte=4
XSPI2.IPParameters=FifoThresholdByte,MemoryType,MemorySize,ClockPrescaler,DelayHoldQuarterCycle,MemoryMode,ChipSelectHighTimeCycle
XSPI2.MemoryMode=HAL_XSPI_SINGLE_MEM
XSPI2.MemorySize=HAL_XSPI_SIZE_512MB
XSPI2.MemoryType=HAL_XSPI_MEMTYPE_MACRONIX
board=custom