Changeset 71 for trunk/fw_g473rct/Core/Src/adc.c
- Timestamp:
- Jun 5, 2026, 1:30:00 PM (5 days ago)
- File:
-
- 1 edited
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trunk/fw_g473rct/Core/Src/adc.c (modified) (10 diffs)
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trunk/fw_g473rct/Core/Src/adc.c
r55 r71 54 54 */ 55 55 hadc1.Instance = ADC1; 56 hadc1.Init.ClockPrescaler = ADC_CLOCK_ ASYNC_DIV1;56 hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV1; 57 57 hadc1.Init.Resolution = ADC_RESOLUTION_12B; 58 58 hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; … … 120 120 */ 121 121 hadc2.Instance = ADC2; 122 hadc2.Init.ClockPrescaler = ADC_CLOCK_ ASYNC_DIV1;122 hadc2.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV1; 123 123 hadc2.Init.Resolution = ADC_RESOLUTION_12B; 124 124 hadc2.Init.DataAlign = ADC_DATAALIGN_RIGHT; … … 179 179 */ 180 180 hadc3.Instance = ADC3; 181 hadc3.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV 1;181 hadc3.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV256; 182 182 hadc3.Init.Resolution = ADC_RESOLUTION_12B; 183 183 hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT; … … 192 192 hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; 193 193 hadc3.Init.DMAContinuousRequests = ENABLE; 194 hadc3.Init.Overrun = ADC_OVR_DATA_ OVERWRITTEN;194 hadc3.Init.Overrun = ADC_OVR_DATA_PRESERVED; 195 195 hadc3.Init.OversamplingMode = ENABLE; 196 196 hadc3.Init.Oversampling.Ratio = ADC_OVERSAMPLING_RATIO_256; … … 263 263 */ 264 264 hadc4.Instance = ADC4; 265 hadc4.Init.ClockPrescaler = ADC_CLOCK_ ASYNC_DIV1;265 hadc4.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV1; 266 266 hadc4.Init.Resolution = ADC_RESOLUTION_12B; 267 267 hadc4.Init.DataAlign = ADC_DATAALIGN_RIGHT; … … 276 276 hadc4.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_RISING; 277 277 hadc4.Init.DMAContinuousRequests = DISABLE; 278 hadc4.Init.Overrun = ADC_OVR_DATA_ PRESERVED;278 hadc4.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN; 279 279 hadc4.Init.OversamplingMode = ENABLE; 280 280 hadc4.Init.Oversampling.Ratio = ADC_OVERSAMPLING_RATIO_256; … … 291 291 sConfig.Channel = ADC_CHANNEL_4; 292 292 sConfig.Rank = ADC_REGULAR_RANK_1; 293 sConfig.SamplingTime = ADC_SAMPLETIME_6 40CYCLES_5;293 sConfig.SamplingTime = ADC_SAMPLETIME_6CYCLES_5; 294 294 sConfig.SingleDiff = ADC_DIFFERENTIAL_ENDED; 295 295 sConfig.OffsetNumber = ADC_OFFSET_NONE; … … 321 321 */ 322 322 hadc5.Instance = ADC5; 323 hadc5.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV 1;323 hadc5.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV256; 324 324 hadc5.Init.Resolution = ADC_RESOLUTION_12B; 325 325 hadc5.Init.DataAlign = ADC_DATAALIGN_RIGHT; … … 596 596 hdma_adc4.Init.PeriphInc = DMA_PINC_DISABLE; 597 597 hdma_adc4.Init.MemInc = DMA_MINC_ENABLE; 598 hdma_adc4.Init.PeriphDataAlignment = DMA_PDATAALIGN_ HALFWORD;598 hdma_adc4.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD; 599 599 hdma_adc4.Init.MemDataAlignment = DMA_MDATAALIGN_WORD; 600 600 hdma_adc4.Init.Mode = DMA_NORMAL; … … 788 788 789 789 /* USER CODE BEGIN 1 */ 790 790 uint32_t GetADCClockHz(void) 791 { 792 uint32_t hclk = HAL_RCC_GetHCLKFreq(); 793 794 uint32_t ckmode = 795 (ADC12_COMMON->CCR & ADC_CCR_CKMODE) >> ADC_CCR_CKMODE_Pos; 796 797 switch (ckmode) 798 { 799 case 0x1: // HCLK/1 800 return hclk; 801 802 case 0x2: // HCLK/2 803 return hclk / 2; 804 805 case 0x3: // HCLK/4 806 return hclk / 4; 807 808 default: // Asynchroner ADC-Takt 809 // Hier muss die RCC-Konfiguration ausgewertet werden 810 // (PLL, SYSCLK, HSI usw.) 811 return 0; 812 } 813 } 814 815 float GetADCSampleRate(void) 816 { 817 uint32_t adc_clk = GetADCClockHz(); 818 819 if(adc_clk == 0) 820 return 0.0f; 821 822 float sample_cycles = 6.5f; 823 float conversion_cycles = 12.5f; 824 825 return adc_clk / (sample_cycles + conversion_cycles); 826 } 791 827 /* USER CODE END 1 */ 792 828
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