Index: trunk/firmware/FSBL/CubeMX/.mxproject =================================================================== --- trunk/firmware/FSBL/CubeMX/.mxproject (revision 37) +++ trunk/firmware/FSBL/CubeMX/.mxproject (revision 38) @@ -6,5 +6,5 @@ [FSBL:PreviousLibFiles] -LibFiles=Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_tim.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_tim_ex.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_bsec.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_bsec.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_rcc.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_rcc_ex.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_bus.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_rcc.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_system.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_utils.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_gpio.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_gpio_ex.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_gpio.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_dma.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_dma_ex.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_dma.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_pwr.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_pwr_ex.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_pwr.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_cortex.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_cortex.h;Drivers\CMSIS\Device\ST\STM32N6xx\Include\partition_stm32n6xx.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_def.h;Drivers\STM32N6xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_exti.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_exti.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_ramcfg.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_rif.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_sdmmc.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_sd.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_sd_ex.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_dlyb.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_mmc.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_mmc_ex.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_sdio.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_xspi.h;Middlewares\ST\STM32_ExtMem_Manager\stm32_extmem.h;Middlewares\ST\STM32_ExtMem_Manager\boot\stm32_boot_xip.h;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_xspi_type.h;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_xspi_api.h;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_sd_type.h;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_sd_api.h;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_data.h;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_driver_api.h;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_driver_type.h;Middlewares\ST\STM32_ExtMem_Manager\psram\stm32_psram_driver_api.h;Middlewares\ST\STM32_ExtMem_Manager\psram\stm32_psram_driver_type.h;Middlewares\ST\STM32_ExtMem_Manager\sdcard\stm32_sdcard_driver_api.h;Middlewares\ST\STM32_ExtMem_Manager\sdcard\stm32_sdcard_driver_type.h;Middlewares\ST\STM32_ExtMem_Manager\user\stm32_user_driver_api.h;Middlewares\ST\STM32_ExtMem_Manager\user\stm32_user_driver_type.h;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_tim.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_tim_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_bsec.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_rcc.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_rcc_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_gpio.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_dma.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_dma_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_pwr.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_pwr_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_cortex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_exti.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_ramcfg.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_rif.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_sd.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_sd_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_ll_sdmmc.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_mmc.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_mmc_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_sdio.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_xspi.c;Middlewares\ST\STM32_ExtMem_Manager\stm32_extmem.c;Middlewares\ST\STM32_ExtMem_Manager\stm32_extmem_type.h;Middlewares\ST\STM32_ExtMem_Manager\boot\stm32_boot_xip.c;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_xspi.c;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_sd.c;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_data.c;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_driver.c;Middlewares\ST\STM32_ExtMem_Manager\psram\stm32_psram_driver.c;Middlewares\ST\STM32_ExtMem_Manager\sdcard\stm32_sdcard_driver.c;Middlewares\ST\STM32_ExtMem_Manager\user\stm32_user_driver.c;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_tim.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_tim_ex.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_bsec.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_bsec.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_rcc.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_rcc_ex.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_bus.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_rcc.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_system.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_utils.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_gpio.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_gpio_ex.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_gpio.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_dma.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_dma_ex.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_dma.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_pwr.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_pwr_ex.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_pwr.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_cortex.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_cortex.h;Drivers\CMSIS\Device\ST\STM32N6xx\Include\partition_stm32n6xx.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_def.h;Drivers\STM32N6xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_exti.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_exti.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_ramcfg.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_rif.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_sdmmc.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_sd.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_sd_ex.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_dlyb.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_mmc.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_mmc_ex.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_sdio.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_xspi.h;Middlewares\ST\STM32_ExtMem_Manager\stm32_extmem.h;Middlewares\ST\STM32_ExtMem_Manager\boot\stm32_boot_xip.h;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_xspi_type.h;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_xspi_api.h;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_sd_type.h;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_sd_api.h;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_data.h;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_driver_api.h;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_driver_type.h;Middlewares\ST\STM32_ExtMem_Manager\psram\stm32_psram_driver_api.h;Middlewares\ST\STM32_ExtMem_Manager\psram\stm32_psram_driver_type.h;Middlewares\ST\STM32_ExtMem_Manager\sdcard\stm32_sdcard_driver_api.h;Middlewares\ST\STM32_ExtMem_Manager\sdcard\stm32_sdcard_driver_type.h;Middlewares\ST\STM32_ExtMem_Manager\user\stm32_user_driver_api.h;Middlewares\ST\STM32_ExtMem_Manager\user\stm32_user_driver_type.h;Drivers\CMSIS\Device\ST\STM32N6xx\Include\stm32n657xx.h;Drivers\CMSIS\Device\ST\STM32N6xx\Include\stm32n6xx.h;Drivers\CMSIS\Device\ST\STM32N6xx\Include\system_stm32n6xx.h;Drivers\CMSIS\Device\ST\STM32N6xx\Source\Templates\system_stm32n6xx.c;Drivers\CMSIS\Include\cmsis_armclang.h;Drivers\CMSIS\Include\cmsis_clang.h;Drivers\CMSIS\Include\cmsis_compiler.h;Drivers\CMSIS\Include\cmsis_gcc.h;Drivers\CMSIS\Include\cmsis_iccarm.h;Drivers\CMSIS\Include\cmsis_version.h;Drivers\CMSIS\Include\core_cm0.h;Drivers\CMSIS\Include\core_cm0plus.h;Drivers\CMSIS\Include\core_cm1.h;Drivers\CMSIS\Include\core_cm23.h;Drivers\CMSIS\Include\core_cm3.h;Drivers\CMSIS\Include\core_cm33.h;Drivers\CMSIS\Include\core_cm35p.h;Drivers\CMSIS\Include\core_cm4.h;Drivers\CMSIS\Include\core_cm52.h;Drivers\CMSIS\Include\core_cm55.h;Drivers\CMSIS\Include\core_cm7.h;Drivers\CMSIS\Include\core_cm85.h;Drivers\CMSIS\Include\core_sc000.h;Drivers\CMSIS\Include\core_sc300.h;Drivers\CMSIS\Include\core_starmc1.h;Drivers\CMSIS\Include\tz_context.h; +LibFiles=Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_tim.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_tim_ex.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_bsec.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_bsec.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_rcc.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_rcc_ex.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_bus.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_rcc.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_system.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_utils.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_gpio.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_gpio_ex.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_gpio.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_dma.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_dma_ex.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_dma.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_pwr.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_pwr_ex.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_pwr.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_cortex.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_cortex.h;Drivers\CMSIS\Device\ST\STM32N6xx\Include\partition_stm32n6xx.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_def.h;Drivers\STM32N6xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_exti.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_exti.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_ramcfg.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_xspi.h;Middlewares\ST\STM32_ExtMem_Manager\stm32_extmem.h;Middlewares\ST\STM32_ExtMem_Manager\boot\stm32_boot_xip.h;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_xspi_type.h;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_xspi_api.h;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_sd_type.h;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_sd_api.h;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_data.h;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_driver_api.h;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_driver_type.h;Middlewares\ST\STM32_ExtMem_Manager\psram\stm32_psram_driver_api.h;Middlewares\ST\STM32_ExtMem_Manager\psram\stm32_psram_driver_type.h;Middlewares\ST\STM32_ExtMem_Manager\sdcard\stm32_sdcard_driver_api.h;Middlewares\ST\STM32_ExtMem_Manager\sdcard\stm32_sdcard_driver_type.h;Middlewares\ST\STM32_ExtMem_Manager\user\stm32_user_driver_api.h;Middlewares\ST\STM32_ExtMem_Manager\user\stm32_user_driver_type.h;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_tim.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_tim_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_bsec.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_rcc.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_rcc_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_gpio.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_dma.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_dma_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_pwr.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_pwr_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_cortex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_exti.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_ramcfg.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_xspi.c;Middlewares\ST\STM32_ExtMem_Manager\stm32_extmem.c;Middlewares\ST\STM32_ExtMem_Manager\stm32_extmem_type.h;Middlewares\ST\STM32_ExtMem_Manager\boot\stm32_boot_xip.c;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_xspi.c;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_sd.c;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_data.c;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_driver.c;Middlewares\ST\STM32_ExtMem_Manager\psram\stm32_psram_driver.c;Middlewares\ST\STM32_ExtMem_Manager\sdcard\stm32_sdcard_driver.c;Middlewares\ST\STM32_ExtMem_Manager\user\stm32_user_driver.c;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_tim.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_tim_ex.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_bsec.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_bsec.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_rcc.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_rcc_ex.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_bus.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_rcc.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_system.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_utils.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_gpio.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_gpio_ex.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_gpio.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_dma.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_dma_ex.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_dma.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_pwr.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_pwr_ex.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_pwr.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_cortex.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_cortex.h;Drivers\CMSIS\Device\ST\STM32N6xx\Include\partition_stm32n6xx.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_def.h;Drivers\STM32N6xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_exti.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_exti.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_ramcfg.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_xspi.h;Middlewares\ST\STM32_ExtMem_Manager\stm32_extmem.h;Middlewares\ST\STM32_ExtMem_Manager\boot\stm32_boot_xip.h;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_xspi_type.h;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_xspi_api.h;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_sd_type.h;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_sd_api.h;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_data.h;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_driver_api.h;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_driver_type.h;Middlewares\ST\STM32_ExtMem_Manager\psram\stm32_psram_driver_api.h;Middlewares\ST\STM32_ExtMem_Manager\psram\stm32_psram_driver_type.h;Middlewares\ST\STM32_ExtMem_Manager\sdcard\stm32_sdcard_driver_api.h;Middlewares\ST\STM32_ExtMem_Manager\sdcard\stm32_sdcard_driver_type.h;Middlewares\ST\STM32_ExtMem_Manager\user\stm32_user_driver_api.h;Middlewares\ST\STM32_ExtMem_Manager\user\stm32_user_driver_type.h;Drivers\CMSIS\Device\ST\STM32N6xx\Include\stm32n657xx.h;Drivers\CMSIS\Device\ST\STM32N6xx\Include\stm32n6xx.h;Drivers\CMSIS\Device\ST\STM32N6xx\Include\system_stm32n6xx.h;Drivers\CMSIS\Device\ST\STM32N6xx\Source\Templates\system_stm32n6xx.c;Drivers\CMSIS\Include\cmsis_armclang.h;Drivers\CMSIS\Include\cmsis_clang.h;Drivers\CMSIS\Include\cmsis_compiler.h;Drivers\CMSIS\Include\cmsis_gcc.h;Drivers\CMSIS\Include\cmsis_iccarm.h;Drivers\CMSIS\Include\cmsis_version.h;Drivers\CMSIS\Include\core_cm0.h;Drivers\CMSIS\Include\core_cm0plus.h;Drivers\CMSIS\Include\core_cm1.h;Drivers\CMSIS\Include\core_cm23.h;Drivers\CMSIS\Include\core_cm3.h;Drivers\CMSIS\Include\core_cm33.h;Drivers\CMSIS\Include\core_cm35p.h;Drivers\CMSIS\Include\core_cm4.h;Drivers\CMSIS\Include\core_cm52.h;Drivers\CMSIS\Include\core_cm55.h;Drivers\CMSIS\Include\core_cm7.h;Drivers\CMSIS\Include\core_cm85.h;Drivers\CMSIS\Include\core_sc000.h;Drivers\CMSIS\Include\core_sc300.h;Drivers\CMSIS\Include\core_starmc1.h;Drivers\CMSIS\Include\tz_context.h; [FSBL:PreviousUsedMakefileFiles] @@ -30,5 +30,5 @@ [PreviousLibFiles] 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[PreviousUsedMakefileFiles] @@ -38,5 +38,5 @@ [FSBL:PreviousUsedCubeIDEFiles] -SourceFiles=FSBL\Src\main.c;FSBL\Src\gpio.c;FSBL\Src\bsec.c;FSBL\Src\extmem_manager.c;FSBL\Src\ramcfg.c;FSBL\Src\sdmmc.c;FSBL\Src\xspi.c;FSBL\Src\stm32n6xx_it.c;FSBL\Src\stm32n6xx_hal_msp.c;FSBL\Src\stm32n6xx_hal_timebase_tim.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_tim.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_tim_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_bsec.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_rcc.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_rcc_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_gpio.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_dma.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_dma_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_pwr.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_pwr_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_cortex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_exti.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_ramcfg.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_rif.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_sd.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_sd_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_ll_sdmmc.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_mmc.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_mmc_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_sdio.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_xspi.c;Middlewares\ST\STM32_ExtMem_Manager\stm32_extmem.c;Middlewares\ST\STM32_ExtMem_Manager\boot\stm32_boot_xip.c;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_xspi.c;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_sd.c;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_data.c;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_driver.c;Middlewares\ST\STM32_ExtMem_Manager\psram\stm32_psram_driver.c;Middlewares\ST\STM32_ExtMem_Manager\sdcard\stm32_sdcard_driver.c;Middlewares\ST\STM32_ExtMem_Manager\user\stm32_user_driver.c;Drivers\CMSIS\Device\ST\STM32N6xx\Source\Templates\system_stm32n6xx.c;;; +SourceFiles=FSBL\Src\main.c;FSBL\Src\gpio.c;FSBL\Src\bsec.c;FSBL\Src\extmem_manager.c;FSBL\Src\ramcfg.c;FSBL\Src\xspi.c;FSBL\Src\stm32n6xx_it.c;FSBL\Src\stm32n6xx_hal_msp.c;FSBL\Src\stm32n6xx_hal_timebase_tim.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_tim.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_tim_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_bsec.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_rcc.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_rcc_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_gpio.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_dma.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_dma_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_pwr.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_pwr_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_cortex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_exti.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_ramcfg.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_xspi.c;Middlewares\ST\STM32_ExtMem_Manager\stm32_extmem.c;Middlewares\ST\STM32_ExtMem_Manager\boot\stm32_boot_xip.c;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_xspi.c;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_sd.c;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_data.c;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_driver.c;Middlewares\ST\STM32_ExtMem_Manager\psram\stm32_psram_driver.c;Middlewares\ST\STM32_ExtMem_Manager\sdcard\stm32_sdcard_driver.c;Middlewares\ST\STM32_ExtMem_Manager\user\stm32_user_driver.c;Drivers\CMSIS\Device\ST\STM32N6xx\Source\Templates\system_stm32n6xx.c;;; HeaderPath=Drivers\STM32N6xx_HAL_Driver\Inc;Drivers\CMSIS\Device\ST\STM32N6xx\Include;Drivers\STM32N6xx_HAL_Driver\Inc\Legacy;Middlewares\ST\STM32_ExtMem_Manager;Middlewares\ST\STM32_ExtMem_Manager\boot;Middlewares\ST\STM32_ExtMem_Manager\sal;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp;Middlewares\ST\STM32_ExtMem_Manager\psram;Middlewares\ST\STM32_ExtMem_Manager\sdcard;Middlewares\ST\STM32_ExtMem_Manager\user;Drivers\CMSIS\Include;FSBL\Inc;Drivers\STM32N6xx_HAL_Driver\Inc;Drivers\CMSIS\Device\ST\STM32N6xx\Include;Drivers\STM32N6xx_HAL_Driver\Inc\Legacy;Middlewares\ST\STM32_ExtMem_Manager;Middlewares\ST\STM32_ExtMem_Manager\boot;Middlewares\ST\STM32_ExtMem_Manager\sal;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp;Middlewares\ST\STM32_ExtMem_Manager\psram;Middlewares\ST\STM32_ExtMem_Manager\sdcard;Middlewares\ST\STM32_ExtMem_Manager\user;Drivers\CMSIS\Include; CDefines=USE_HAL_DRIVER;STM32N657xx;USE_HAL_DRIVER;USE_HAL_DRIVER;USE_HAL_DRIVER; @@ -53,5 +53,5 @@ [PreviousUsedCubeIDEFiles] -SourceFiles=FSBL\Src\main.c;FSBL\Src\gpio.c;FSBL\Src\bsec.c;FSBL\Src\extmem_manager.c;FSBL\Src\ramcfg.c;FSBL\Src\sdmmc.c;FSBL\Src\xspi.c;FSBL\Src\stm32n6xx_it.c;FSBL\Src\stm32n6xx_hal_msp.c;FSBL\Src\stm32n6xx_hal_timebase_tim.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_tim.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_tim_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_bsec.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_rcc.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_rcc_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_gpio.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_dma.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_dma_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_pwr.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_pwr_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_cortex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_exti.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_ramcfg.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_rif.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_sd.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_sd_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_ll_sdmmc.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_mmc.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_mmc_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_sdio.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_xspi.c;Middlewares\ST\STM32_ExtMem_Manager\stm32_extmem.c;Middlewares\ST\STM32_ExtMem_Manager\boot\stm32_boot_xip.c;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_xspi.c;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_sd.c;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_data.c;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_driver.c;Middlewares\ST\STM32_ExtMem_Manager\psram\stm32_psram_driver.c;Middlewares\ST\STM32_ExtMem_Manager\sdcard\stm32_sdcard_driver.c;Middlewares\ST\STM32_ExtMem_Manager\user\stm32_user_driver.c;Drivers\CMSIS\Device\ST\STM32N6xx\Source\Templates\system_stm32n6xx_s.c;Src\;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_tim.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_tim_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_bsec.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_rcc.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_rcc_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_gpio.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_dma.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_dma_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_pwr.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_pwr_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_cortex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_exti.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_ramcfg.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_rif.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_sd.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_sd_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_ll_sdmmc.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_mmc.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_mmc_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_sdio.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_xspi.c;Middlewares\ST\STM32_ExtMem_Manager\stm32_extmem.c;Middlewares\ST\STM32_ExtMem_Manager\boot\stm32_boot_xip.c;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_xspi.c;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_sd.c;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_data.c;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_driver.c;Middlewares\ST\STM32_ExtMem_Manager\psram\stm32_psram_driver.c;Middlewares\ST\STM32_ExtMem_Manager\sdcard\stm32_sdcard_driver.c;Middlewares\ST\STM32_ExtMem_Manager\user\stm32_user_driver.c;Drivers\CMSIS\Device\ST\STM32N6xx\Source\Templates\system_stm32n6xx_s.c;Src\;Drivers\CMSIS\Device\ST\STM32N6xx\Source\Templates\system_stm32n6xx.c;FSBL\Src\system_stm32n6xx_fsbl.c;Appli\Src\;ExtMemLoader\Src\system_stm32n6xx_fsbl.c;;; +SourceFiles=FSBL\Src\main.c;FSBL\Src\gpio.c;FSBL\Src\bsec.c;FSBL\Src\extmem_manager.c;FSBL\Src\ramcfg.c;FSBL\Src\xspi.c;FSBL\Src\stm32n6xx_it.c;FSBL\Src\stm32n6xx_hal_msp.c;FSBL\Src\stm32n6xx_hal_timebase_tim.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_tim.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_tim_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_bsec.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_rcc.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_rcc_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_gpio.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_dma.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_dma_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_pwr.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_pwr_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_cortex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_exti.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_ramcfg.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_xspi.c;Middlewares\ST\STM32_ExtMem_Manager\stm32_extmem.c;Middlewares\ST\STM32_ExtMem_Manager\boot\stm32_boot_xip.c;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_xspi.c;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_sd.c;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_data.c;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_driver.c;Middlewares\ST\STM32_ExtMem_Manager\psram\stm32_psram_driver.c;Middlewares\ST\STM32_ExtMem_Manager\sdcard\stm32_sdcard_driver.c;Middlewares\ST\STM32_ExtMem_Manager\user\stm32_user_driver.c;Drivers\CMSIS\Device\ST\STM32N6xx\Source\Templates\system_stm32n6xx_s.c;Src\;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_tim.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_tim_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_bsec.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_rcc.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_rcc_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_gpio.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_dma.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_dma_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_pwr.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_pwr_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_cortex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_exti.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_ramcfg.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_xspi.c;Middlewares\ST\STM32_ExtMem_Manager\stm32_extmem.c;Middlewares\ST\STM32_ExtMem_Manager\boot\stm32_boot_xip.c;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_xspi.c;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_sd.c;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_data.c;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_driver.c;Middlewares\ST\STM32_ExtMem_Manager\psram\stm32_psram_driver.c;Middlewares\ST\STM32_ExtMem_Manager\sdcard\stm32_sdcard_driver.c;Middlewares\ST\STM32_ExtMem_Manager\user\stm32_user_driver.c;Drivers\CMSIS\Device\ST\STM32N6xx\Source\Templates\system_stm32n6xx_s.c;Src\;Drivers\CMSIS\Device\ST\STM32N6xx\Source\Templates\system_stm32n6xx.c;FSBL\Src\system_stm32n6xx_fsbl.c;Appli\Src\;ExtMemLoader\Src\system_stm32n6xx_fsbl.c;;; HeaderPath=Drivers\STM32N6xx_HAL_Driver\Inc;Drivers\CMSIS\Device\ST\STM32N6xx\Include;Drivers\STM32N6xx_HAL_Driver\Inc\Legacy;Middlewares\ST\STM32_ExtMem_Manager;Middlewares\ST\STM32_ExtMem_Manager\boot;Middlewares\ST\STM32_ExtMem_Manager\sal;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp;Middlewares\ST\STM32_ExtMem_Manager\psram;Middlewares\ST\STM32_ExtMem_Manager\sdcard;Middlewares\ST\STM32_ExtMem_Manager\user;Drivers\CMSIS\Include;Drivers\CMSIS\Include\m-profile;Drivers\CMSIS\Include\r-profile;FSBL\Inc; CDefines=USE_HAL_DRIVER;STM32N657xx;USE_HAL_DRIVER;USE_HAL_DRIVER;USE_HAL_DRIVER;USE_HAL_DRIVER;STM32N657xx;USE_HAL_DRIVER;USE_HAL_DRIVER;USE_HAL_DRIVER;USE_HAL_DRIVER;STM32N657xx;USE_HAL_DRIVER;USE_HAL_DRIVER;USE_HAL_DRIVER;USE_HAL_DRIVER; @@ -65,6 +65,6 @@ [PreviousGenFiles] HeaderPath=..\FSBL\Inc -HeaderFiles=gpio.h;bsec.h;extmem_manager.h;stm32_extmem_conf.h;ramcfg.h;sdmmc.h;xspi.h;stm32n6xx_it.h;stm32n6xx_hal_conf.h;main.h; +HeaderFiles=gpio.h;bsec.h;extmem_manager.h;stm32_extmem_conf.h;ramcfg.h;xspi.h;stm32n6xx_it.h;stm32n6xx_hal_conf.h;main.h; SourcePath=..\FSBL\Src -SourceFiles=gpio.c;bsec.c;extmem_manager.c;ramcfg.c;sdmmc.c;xspi.c;stm32n6xx_it.c;stm32n6xx_hal_msp.c;stm32n6xx_hal_timebase_tim.c;main.c; +SourceFiles=gpio.c;bsec.c;extmem_manager.c;ramcfg.c;xspi.c;stm32n6xx_it.c;stm32n6xx_hal_msp.c;stm32n6xx_hal_timebase_tim.c;main.c; Index: trunk/firmware/FSBL/CubeMX/Drivers/STM32N6xx_HAL_Driver/Inc/stm32n6xx_hal_mmc.h =================================================================== --- trunk/firmware/FSBL/CubeMX/Drivers/STM32N6xx_HAL_Driver/Inc/stm32n6xx_hal_mmc.h (revision 37) +++ (revision ) @@ -1,873 +1,0 @@ -/** - ****************************************************************************** - * @file stm32n6xx_hal_mmc.h - * @author MCD Application Team - * @brief Header file of MMC HAL module. - ****************************************************************************** - * @attention - * - * Copyright (c) 2023 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef STM32N6xx_HAL_MMC_H -#define STM32N6xx_HAL_MMC_H - -#ifdef __cplusplus -extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32n6xx_ll_sdmmc.h" - -/** @addtogroup STM32N6xx_HAL_Driver - * @{ - */ -#if defined (SDMMC1) || defined (SDMMC2) - -/** @addtogroup MMC - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup MMC_Exported_Types MMC Exported Types - * @{ - */ - -/** @defgroup MMC_Exported_Types_Group1 MMC State enumeration structure - * @{ - */ -typedef enum -{ - HAL_MMC_STATE_RESET = ((uint32_t)0x00000000U), /*!< MMC not yet initialized or disabled */ - HAL_MMC_STATE_READY = ((uint32_t)0x00000001U), /*!< MMC initialized and ready for use */ - HAL_MMC_STATE_TIMEOUT = ((uint32_t)0x00000002U), /*!< MMC Timeout state */ - HAL_MMC_STATE_BUSY = ((uint32_t)0x00000003U), /*!< MMC process ongoing */ - HAL_MMC_STATE_PROGRAMMING = ((uint32_t)0x00000004U), /*!< MMC Programming State */ - HAL_MMC_STATE_RECEIVING = ((uint32_t)0x00000005U), /*!< MMC Receinving State */ - HAL_MMC_STATE_TRANSFER = ((uint32_t)0x00000006U), /*!< MMC Transfer State */ - HAL_MMC_STATE_ERROR = ((uint32_t)0x0000000FU) /*!< MMC is in error state */ -} HAL_MMC_StateTypeDef; -/** - * @} - */ - -/** @defgroup MMC_Exported_Types_Group2 MMC Card State enumeration structure - * @{ - */ -typedef uint32_t HAL_MMC_CardStateTypeDef; - -#define HAL_MMC_CARD_IDLE 0x00000000U /*!< Card is in idle state (can't be checked by CMD13) */ -#define HAL_MMC_CARD_READY 0x00000001U /*!< Card state is ready (can't be checked by CMD13) */ -#define HAL_MMC_CARD_IDENTIFICATION 0x00000002U /*!< Card is in identification state (can't be checked by CMD13) */ -#define HAL_MMC_CARD_STANDBY 0x00000003U /*!< Card is in standby state */ -#define HAL_MMC_CARD_TRANSFER 0x00000004U /*!< Card is in transfer state */ -#define HAL_MMC_CARD_SENDING 0x00000005U /*!< Card is sending an operation */ -#define HAL_MMC_CARD_RECEIVING 0x00000006U /*!< Card is receiving operation information */ -#define HAL_MMC_CARD_PROGRAMMING 0x00000007U /*!< Card is in programming state */ -#define HAL_MMC_CARD_DISCONNECTED 0x00000008U /*!< Card is disconnected */ -#define HAL_MMC_CARD_BUSTEST 0x00000009U /*!< Card is in bus test state */ -#define HAL_MMC_CARD_SLEEP 0x0000000AU /*!< Card is in sleep state (can't be checked by CMD13) */ -#define HAL_MMC_CARD_ERROR 0x000000FFU /*!< Card response Error (can't be checked by CMD13) */ -/** - * @} - */ - -/** @defgroup MMC_Exported_Types_Group3 MMC Handle Structure definition - * @{ - */ -#define MMC_InitTypeDef SDMMC_InitTypeDef -#define MMC_TypeDef SDMMC_TypeDef - -/** - * @brief MMC Card Information Structure definition - */ -typedef struct -{ - uint32_t CardType; /*!< Specifies the card Type */ - - uint32_t Class; /*!< Specifies the class of the card class */ - - uint32_t RelCardAdd; /*!< Specifies the Relative Card Address */ - - uint32_t BlockNbr; /*!< Specifies the Card Capacity in blocks */ - - uint32_t BlockSize; /*!< Specifies one block size in bytes */ - - uint32_t LogBlockNbr; /*!< Specifies the Card logical Capacity in blocks */ - - uint32_t LogBlockSize; /*!< Specifies logical block size in bytes */ - -} HAL_MMC_CardInfoTypeDef; - -/** - * @brief MMC handle Structure definition - */ -#if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) -typedef struct __MMC_HandleTypeDef -#else -typedef struct -#endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ -{ - MMC_TypeDef *Instance; /*!< MMC registers base address */ - - MMC_InitTypeDef Init; /*!< MMC required parameters */ - - HAL_LockTypeDef Lock; /*!< MMC locking object */ - - const uint8_t *pTxBuffPtr; /*!< Pointer to MMC Tx transfer Buffer */ - - uint32_t TxXferSize; /*!< MMC Tx Transfer size */ - - uint8_t *pRxBuffPtr; /*!< Pointer to MMC Rx transfer Buffer */ - - uint32_t RxXferSize; /*!< MMC Rx Transfer size */ - - __IO uint32_t Context; /*!< MMC transfer context */ - - __IO HAL_MMC_StateTypeDef State; /*!< MMC card State */ - - __IO uint32_t ErrorCode; /*!< MMC Card Error codes */ - - __IO uint16_t RPMBErrorCode; /*!< MMC RPMB Area Error codes */ - - HAL_MMC_CardInfoTypeDef MmcCard; /*!< MMC Card information */ - - uint32_t CSD[4U]; /*!< MMC card specific data table */ - - uint32_t CID[4U]; /*!< MMC card identification number table */ - - uint32_t Ext_CSD[128]; - -#if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) - void (* TxCpltCallback)(struct __MMC_HandleTypeDef *hmmc); - void (* RxCpltCallback)(struct __MMC_HandleTypeDef *hmmc); - void (* ErrorCallback)(struct __MMC_HandleTypeDef *hmmc); - void (* AbortCpltCallback)(struct __MMC_HandleTypeDef *hmmc); - void (* Read_DMALnkLstBufCpltCallback)(struct __MMC_HandleTypeDef *hmmc); - void (* Write_DMALnkLstBufCpltCallback)(struct __MMC_HandleTypeDef *hmmc); - - void (* MspInitCallback)(struct __MMC_HandleTypeDef *hmmc); - void (* MspDeInitCallback)(struct __MMC_HandleTypeDef *hmmc); -#endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ -} MMC_HandleTypeDef; - - -/** - * @} - */ - -/** @defgroup MMC_Exported_Types_Group4 Card Specific Data: CSD Register - * @{ - */ -typedef struct -{ - __IO uint8_t CSDStruct; /*!< CSD structure */ - __IO uint8_t SysSpecVersion; /*!< System specification version */ - __IO uint8_t Reserved1; /*!< Reserved */ - __IO uint8_t TAAC; /*!< Data read access time 1 */ - __IO uint8_t NSAC; /*!< Data read access time 2 in CLK cycles */ - __IO uint8_t MaxBusClkFrec; /*!< Max. bus clock frequency */ - __IO uint16_t CardComdClasses; /*!< Card command classes */ - __IO uint8_t RdBlockLen; /*!< Max. read data block length */ - __IO uint8_t PartBlockRead; /*!< Partial blocks for read allowed */ - __IO uint8_t WrBlockMisalign; /*!< Write block misalignment */ - __IO uint8_t RdBlockMisalign; /*!< Read block misalignment */ - __IO uint8_t DSRImpl; /*!< DSR implemented */ - __IO uint8_t Reserved2; /*!< Reserved */ - __IO uint32_t DeviceSize; /*!< Device Size */ - __IO uint8_t MaxRdCurrentVDDMin; /*!< Max. read current @ VDD min */ - __IO uint8_t MaxRdCurrentVDDMax; /*!< Max. read current @ VDD max */ - __IO uint8_t MaxWrCurrentVDDMin; /*!< Max. write current @ VDD min */ - __IO uint8_t MaxWrCurrentVDDMax; /*!< Max. write current @ VDD max */ - __IO uint8_t DeviceSizeMul; /*!< Device size multiplier */ - __IO uint8_t EraseGrSize; /*!< Erase group size */ - __IO uint8_t EraseGrMul; /*!< Erase group size multiplier */ - __IO uint8_t WrProtectGrSize; /*!< Write protect group size */ - __IO uint8_t WrProtectGrEnable; /*!< Write protect group enable */ - __IO uint8_t ManDeflECC; /*!< Manufacturer default ECC */ - __IO uint8_t WrSpeedFact; /*!< Write speed factor */ - __IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */ - __IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */ - __IO uint8_t Reserved3; /*!< Reserved */ - __IO uint8_t ContentProtectAppli; /*!< Content protection application */ - __IO uint8_t FileFormatGroup; /*!< File format group */ - __IO uint8_t CopyFlag; /*!< Copy flag (OTP) */ - __IO uint8_t PermWrProtect; /*!< Permanent write protection */ - __IO uint8_t TempWrProtect; /*!< Temporary write protection */ - __IO uint8_t FileFormat; /*!< File format */ - __IO uint8_t ECC; /*!< ECC code */ - __IO uint8_t CSD_CRC; /*!< CSD CRC */ - __IO uint8_t Reserved4; /*!< Always 1 */ - -} HAL_MMC_CardCSDTypeDef; -/** - * @} - */ - -/** @defgroup MMC_Exported_Types_Group5 Card Identification Data: CID Register - * @{ - */ -typedef struct -{ - __IO uint8_t ManufacturerID; /*!< Manufacturer ID */ - __IO uint16_t OEM_AppliID; /*!< OEM/Application ID */ - __IO uint32_t ProdName1; /*!< Product Name part1 */ - __IO uint8_t ProdName2; /*!< Product Name part2 */ - __IO uint8_t ProdRev; /*!< Product Revision */ - __IO uint32_t ProdSN; /*!< Product Serial Number */ - __IO uint8_t Reserved1; /*!< Reserved1 */ - __IO uint16_t ManufactDate; /*!< Manufacturing Date */ - __IO uint8_t CID_CRC; /*!< CID CRC */ - __IO uint8_t Reserved2; /*!< Always 1 */ - -} HAL_MMC_CardCIDTypeDef; -/** - * @} - */ - -#if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) -/** @defgroup MMC_Exported_Types_Group6 MMC Callback ID enumeration definition - * @{ - */ -typedef enum -{ - HAL_MMC_TX_CPLT_CB_ID = 0x00U, /*!< MMC Tx Complete Callback ID */ - HAL_MMC_RX_CPLT_CB_ID = 0x01U, /*!< MMC Rx Complete Callback ID */ - HAL_MMC_ERROR_CB_ID = 0x02U, /*!< MMC Error Callback ID */ - HAL_MMC_ABORT_CB_ID = 0x03U, /*!< MMC Abort Callback ID */ - HAL_MMC_READ_DMA_LNKLST_BUF_CPLT_CB_ID = 0x04U, /*!< MMC DMA Rx Linked List Node buffer Callback ID */ - HAL_MMC_WRITE_DMA_LNKLST_BUF_CPLT_CB_ID = 0x05U, /*!< MMC DMA Tx Linked List Node buffer Callback ID */ - - HAL_MMC_MSP_INIT_CB_ID = 0x10U, /*!< MMC MspInit Callback ID */ - HAL_MMC_MSP_DEINIT_CB_ID = 0x11U /*!< MMC MspDeInit Callback ID */ -} HAL_MMC_CallbackIDTypeDef; -/** - * @} - */ - -/** @defgroup MMC_Exported_Types_Group7 MMC Callback pointer definition - * @{ - */ -typedef void (*pMMC_CallbackTypeDef)(MMC_HandleTypeDef *hmmc); -/** - * @} - */ -#endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup MMC_Exported_Constants Exported Constants - * @{ - */ - -#define MMC_BLOCKSIZE ((uint32_t)512U) /*!< Block size is 512 bytes */ - -/** @defgroup MMC_Exported_Constansts_Group1 MMC Error status enumeration Structure definition - * @{ - */ -#define HAL_MMC_ERROR_NONE SDMMC_ERROR_NONE /*!< No error */ -#define HAL_MMC_ERROR_CMD_CRC_FAIL SDMMC_ERROR_CMD_CRC_FAIL /*!< Command response received (but CRC check failed) */ -#define HAL_MMC_ERROR_DATA_CRC_FAIL SDMMC_ERROR_DATA_CRC_FAIL /*!< Data block sent/received (CRC check failed) */ -#define HAL_MMC_ERROR_CMD_RSP_TIMEOUT SDMMC_ERROR_CMD_RSP_TIMEOUT /*!< Command response timeout */ -#define HAL_MMC_ERROR_DATA_TIMEOUT SDMMC_ERROR_DATA_TIMEOUT /*!< Data timeout */ -#define HAL_MMC_ERROR_TX_UNDERRUN SDMMC_ERROR_TX_UNDERRUN /*!< Transmit FIFO underrun */ -#define HAL_MMC_ERROR_RX_OVERRUN SDMMC_ERROR_RX_OVERRUN /*!< Receive FIFO overrun */ -#define HAL_MMC_ERROR_ADDR_MISALIGNED SDMMC_ERROR_ADDR_MISALIGNED /*!< Misaligned address */ -#define HAL_MMC_ERROR_BLOCK_LEN_ERR SDMMC_ERROR_BLOCK_LEN_ERR /*!< Transferred block length is not allowed for the card or the */ -/*!< number of transferred bytes does not match the block length */ -#define HAL_MMC_ERROR_ERASE_SEQ_ERR SDMMC_ERROR_ERASE_SEQ_ERR /*!< An error in the sequence of erase command occurs */ -#define HAL_MMC_ERROR_BAD_ERASE_PARAM SDMMC_ERROR_BAD_ERASE_PARAM /*!< An invalid selection for erase groups */ -#define HAL_MMC_ERROR_WRITE_PROT_VIOLATION SDMMC_ERROR_WRITE_PROT_VIOLATION /*!< Attempt to program a write protect block */ -#define HAL_MMC_ERROR_LOCK_UNLOCK_FAILED SDMMC_ERROR_LOCK_UNLOCK_FAILED /*!< Sequence or password error has been detected in unlock */ -/*!< command or if there was an attempt to access a locked card */ -#define HAL_MMC_ERROR_COM_CRC_FAILED SDMMC_ERROR_COM_CRC_FAILED /*!< CRC check of the previous command failed */ -#define HAL_MMC_ERROR_ILLEGAL_CMD SDMMC_ERROR_ILLEGAL_CMD /*!< Command is not legal for the card state */ -#define HAL_MMC_ERROR_CARD_ECC_FAILED SDMMC_ERROR_CARD_ECC_FAILED /*!< Card internal ECC was applied but failed to correct the data */ -#define HAL_MMC_ERROR_CC_ERR SDMMC_ERROR_CC_ERR /*!< Internal card controller error */ -#define HAL_MMC_ERROR_GENERAL_UNKNOWN_ERR SDMMC_ERROR_GENERAL_UNKNOWN_ERR /*!< General or unknown error */ -#define HAL_MMC_ERROR_STREAM_READ_UNDERRUN SDMMC_ERROR_STREAM_READ_UNDERRUN /*!< The card could not sustain data reading in stream rmode */ -#define HAL_MMC_ERROR_STREAM_WRITE_OVERRUN SDMMC_ERROR_STREAM_WRITE_OVERRUN /*!< The card could not sustain data programming in stream mode */ -#define HAL_MMC_ERROR_CID_CSD_OVERWRITE SDMMC_ERROR_CID_CSD_OVERWRITE /*!< CID/CSD overwrite error */ -#define HAL_MMC_ERROR_WP_ERASE_SKIP SDMMC_ERROR_WP_ERASE_SKIP /*!< Only partial address space was erased */ -#define HAL_MMC_ERROR_CARD_ECC_DISABLED SDMMC_ERROR_CARD_ECC_DISABLED /*!< Command has been executed without using internal ECC */ -#define HAL_MMC_ERROR_ERASE_RESET SDMMC_ERROR_ERASE_RESET /*!< Erase sequence was cleared before executing because an out */ -/*!< of erase sequence command was received */ -#define HAL_MMC_ERROR_AKE_SEQ_ERR SDMMC_ERROR_AKE_SEQ_ERR /*!< Error in sequence of authentication */ -#define HAL_MMC_ERROR_INVALID_VOLTRANGE SDMMC_ERROR_INVALID_VOLTRANGE /*!< Error in case of invalid voltage range */ -#define HAL_MMC_ERROR_ADDR_OUT_OF_RANGE SDMMC_ERROR_ADDR_OUT_OF_RANGE /*!< Error when addressed block is out of range */ -#define HAL_MMC_ERROR_REQUEST_NOT_APPLICABLE SDMMC_ERROR_REQUEST_NOT_APPLICABLE /*!< Error when command request is not applicable */ -#define HAL_MMC_ERROR_PARAM SDMMC_ERROR_INVALID_PARAMETER /*!< the used parameter is not valid */ -#define HAL_MMC_ERROR_UNSUPPORTED_FEATURE SDMMC_ERROR_UNSUPPORTED_FEATURE /*!< Error when feature is not insupported */ -#define HAL_MMC_ERROR_BUSY SDMMC_ERROR_BUSY /*!< Error when transfer process is busy */ -#define HAL_MMC_ERROR_DMA SDMMC_ERROR_DMA /*!< Error while DMA transfer */ -#define HAL_MMC_ERROR_TIMEOUT SDMMC_ERROR_TIMEOUT /*!< Timeout error */ -/*!< response results after operating with RPMB partition */ -#define HAL_MMC_ERROR_RPMB_OPERATION_OK 0x0000U /*!< Operation OK */ -#define HAL_MMC_ERROR_RPMB_GENERAL_FAILURE 0x0001U /*!< General failure */ -#define HAL_MMC_ERROR_RPMB_AUTHENTICATION_FAILURE 0x0002U /*!< Authentication failure */ -#define HAL_MMC_ERROR_RPMB_COUNTER_FAILURE 0x0003U /*!< Counter failure */ -#define HAL_MMC_ERROR_RPMB_ADDRESS_FAILURE 0x0004U /*!< Address failure */ -#define HAL_MMC_ERROR_RPMB_WRITE_FAILURE 0x0005U /*!< Write failure */ -#define HAL_MMC_ERROR_RPMB_READ_FAILURE 0x0006U /*!< Read failure */ -#define HAL_MMC_ERROR_RPMB_KEY_NOT_YET_PROG 0x0007U /*!< Authentication Key not yet programmed */ -#define HAL_MMC_ERROR_RPMB_COUNTER_EXPIRED 0x0080U /*!< Write Counter has expired i.e. reached its max value */ - -#if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) -#define HAL_MMC_ERROR_INVALID_CALLBACK SDMMC_ERROR_INVALID_PARAMETER /*!< Invalid callback error */ -#endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ -/** - * @} - */ - -/** @defgroup MMC_Exported_Constansts_Group2 MMC context enumeration - * @{ - */ -#define MMC_CONTEXT_NONE ((uint32_t)0x00000000U) /*!< None */ -#define MMC_CONTEXT_READ_SINGLE_BLOCK ((uint32_t)0x00000001U) /*!< Read single block operation */ -#define MMC_CONTEXT_READ_MULTIPLE_BLOCK ((uint32_t)0x00000002U) /*!< Read multiple blocks operation */ -#define MMC_CONTEXT_WRITE_SINGLE_BLOCK ((uint32_t)0x00000010U) /*!< Write single block operation */ -#define MMC_CONTEXT_WRITE_MULTIPLE_BLOCK ((uint32_t)0x00000020U) /*!< Write multiple blocks operation */ -#define MMC_CONTEXT_IT ((uint32_t)0x00000008U) /*!< Process in Interrupt mode */ -#define MMC_CONTEXT_DMA ((uint32_t)0x00000080U) /*!< Process in DMA mode */ - -/** - * @} - */ - -/** @defgroup MMC_Exported_Constansts_Group3 MMC Voltage mode - * @{ - */ -/** - * @brief - */ -#define MMC_HIGH_VOLTAGE_RANGE 0x80FF8000U /*!< High voltage in byte mode */ -#define MMC_DUAL_VOLTAGE_RANGE 0x80FF8080U /*!< Dual voltage in byte mode */ -#define MMC_LOW_VOLTAGE_RANGE 0x80000080U /*!< Low voltage in byte mode */ -#define EMMC_HIGH_VOLTAGE_RANGE 0xC0FF8000U /*!< High voltage in sector mode */ -#define EMMC_DUAL_VOLTAGE_RANGE 0xC0FF8080U /*!< Dual voltage in sector mode */ -#define EMMC_LOW_VOLTAGE_RANGE 0xC0000080U /*!< Low voltage in sector mode */ -#define MMC_INVALID_VOLTAGE_RANGE 0x0001FF01U -/** - * @} - */ - -/** @defgroup MMC_Exported_Constansts_Group4 MMC Memory Cards - * @{ - */ -#define MMC_LOW_CAPACITY_CARD ((uint32_t)0x00000000U) /*!< MMC Card Capacity <=2Gbytes */ -#define MMC_HIGH_CAPACITY_CARD ((uint32_t)0x00000001U) /*!< MMC Card Capacity >2Gbytes and <2Tbytes */ - -/** - * @} - */ - -/** @defgroup MMC_Exported_Constansts_Group5 MMC Erase Type - * @{ - */ -#define HAL_MMC_ERASE 0x00000000U /*!< Erase the erase groups identified by CMD35 & 36 */ -#define HAL_MMC_TRIM 0x00000001U /*!< Erase the write blocks identified by CMD35 & 36 */ -#define HAL_MMC_DISCARD 0x00000003U /*!< Discard the write blocks identified by CMD35 & 36 */ -#define HAL_MMC_SECURE_ERASE 0x80000000U /*!< Perform a secure purge according SRT on the erase groups identified by CMD35 & 36 */ -#define HAL_MMC_SECURE_TRIM_STEP1 0x80000001U /*!< Mark the write blocks identified by CMD35 & 36 for secure erase */ -#define HAL_MMC_SECURE_TRIM_STEP2 0x80008000U /*!< Perform a secure purge according SRT on the write blocks previously identified */ - -#define IS_MMC_ERASE_TYPE(TYPE) (((TYPE) == HAL_MMC_ERASE) || \ - ((TYPE) == HAL_MMC_TRIM) || \ - ((TYPE) == HAL_MMC_DISCARD) || \ - ((TYPE) == HAL_MMC_SECURE_ERASE) || \ - ((TYPE) == HAL_MMC_SECURE_TRIM_STEP1) || \ - ((TYPE) == HAL_MMC_SECURE_TRIM_STEP2)) -/** - * @} - */ - -/** @defgroup MMC_Exported_Constansts_Group6 MMC Secure Removal Type - * @{ - */ -#define HAL_MMC_SRT_ERASE 0x00000001U /*!< Information removed by an erase */ -#define HAL_MMC_SRT_WRITE_CHAR_ERASE 0x00000002U /*!< Information removed by an overwriting with a character followed by an erase */ -#define HAL_MMC_SRT_WRITE_CHAR_COMPL_RANDOM 0x00000004U /*!< Information removed by an overwriting with a character, its complement then a random character */ -#define HAL_MMC_SRT_VENDOR_DEFINED 0x00000008U /*!< Information removed using a vendor defined */ - - -#define IS_MMC_SRT_TYPE(TYPE) (((TYPE) == HAL_MMC_SRT_ERASE) || \ - ((TYPE) == HAL_MMC_SRT_WRITE_CHAR_ERASE) || \ - ((TYPE) == HAL_MMC_SRT_WRITE_CHAR_COMPL_RANDOM) || \ - ((TYPE) == HAL_MMC_SRT_VENDOR_DEFINED)) -/** - * @} - */ - -/** @defgroup MMC_Exported_Constansts_Group7 MMC Partitions types - * @{ - */ -typedef uint32_t HAL_MMC_PartitionTypeDef; - -#define HAL_MMC_USER_AREA_PARTITION 0x00000000U /*!< User area partition */ -#define HAL_MMC_BOOT_PARTITION1 0x00000100U /*!< Boot partition 1 */ -#define HAL_MMC_BOOT_PARTITION2 0x00000200U /*!< Boot partition 2 */ -#define HAL_MMC_RPMB_PARTITION 0x00000300U /*!< RPMB partition */ -/** - * @} - */ - -/** - * @} - */ - -/* Exported macro ------------------------------------------------------------*/ -/** @defgroup MMC_Exported_macros MMC Exported Macros - * @brief macros to handle interrupts and specific clock configurations - * @{ - */ -/** @brief Reset MMC handle state. - * @param __HANDLE__ MMC Handle. - * @retval None - */ -#if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) -#define __HAL_MMC_RESET_HANDLE_STATE(__HANDLE__) do { \ - (__HANDLE__)->State = HAL_MMC_STATE_RESET; \ - (__HANDLE__)->MspInitCallback = NULL; \ - (__HANDLE__)->MspDeInitCallback = NULL; \ - } while(0) -#else -#define __HAL_MMC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_MMC_STATE_RESET) -#endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ - -/** - * @brief Enable the MMC device interrupt. - * @param __HANDLE__ MMC Handle. - * @param __INTERRUPT__ specifies the SDMMC interrupt sources to be enabled. - * This parameter can be one or a combination of the following values: - * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt - * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt - * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt - * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt - * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt - * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt - * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt - * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt - * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt - * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt - * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt - * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt - * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt - * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt - * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt - * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt - * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt - * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt - * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt - * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt - * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt - * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt - * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt - * @retval None - */ -#define __HAL_MMC_ENABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_ENABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) - -/** - * @brief Disable the MMC device interrupt. - * @param __HANDLE__ MMC Handle. - * @param __INTERRUPT__ specifies the SDMMC interrupt sources to be disabled. - * This parameter can be one or a combination of the following values: - * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt - * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt - * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt - * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt - * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt - * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt - * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt - * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt - * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt - * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt - * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt - * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt - * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt - * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt - * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt - * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt - * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt - * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt - * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt - * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt - * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt - * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt - * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt - * @retval None - */ -#define __HAL_MMC_DISABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_DISABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) - -/** - * @brief Check whether the specified MMC flag is set or not. - * @param __HANDLE__ MMC Handle. - * @param __FLAG__ specifies the flag to check. - * This parameter can be one of the following values: - * @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed) - * @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) - * @arg SDMMC_FLAG_CTIMEOUT: Command response timeout - * @arg SDMMC_FLAG_DTIMEOUT: Data timeout - * @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error - * @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error - * @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed) - * @arg SDMMC_FLAG_CMDSENT: Command sent (no response required) - * @arg SDMMC_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero) - * @arg SDMMC_FLAG_DHOLD: Data transfer Hold - * @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed) - * @arg SDMMC_FLAG_DABORT: Data transfer aborted by CMD12 - * @arg SDMMC_FLAG_DPSMACT: Data path state machine active - * @arg SDMMC_FLAG_CPSMACT: Command path state machine active - * @arg SDMMC_FLAG_TXFIFOHE: Transmit FIFO Half Empty - * @arg SDMMC_FLAG_RXFIFOHF: Receive FIFO Half Full - * @arg SDMMC_FLAG_TXFIFOF: Transmit FIFO full - * @arg SDMMC_FLAG_RXFIFOF: Receive FIFO full - * @arg SDMMC_FLAG_TXFIFOE: Transmit FIFO empty - * @arg SDMMC_FLAG_RXFIFOE: Receive FIFO empty - * @arg SDMMC_FLAG_BUSYD0: Inverted value of SDMMC_D0 line (Busy) - * @arg SDMMC_FLAG_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected - * @arg SDMMC_FLAG_SDIOIT: SD I/O interrupt received - * @arg SDMMC_FLAG_ACKFAIL: Boot Acknowledgment received - * @arg SDMMC_FLAG_ACKTIMEOUT: Boot Acknowledgment timeout - * @arg SDMMC_FLAG_VSWEND: Voltage switch critical timing section completion - * @arg SDMMC_FLAG_CKSTOP: SDMMC_CK stopped in Voltage switch procedure - * @arg SDMMC_FLAG_IDMATE: IDMA transfer error - * @arg SDMMC_FLAG_IDMABTC: IDMA buffer transfer complete - * @retval The new state of MMC FLAG (SET or RESET). - */ -#define __HAL_MMC_GET_FLAG(__HANDLE__, __FLAG__) __SDMMC_GET_FLAG((__HANDLE__)->Instance, (__FLAG__)) - -/** - * @brief Clear the MMC's pending flags. - * @param __HANDLE__ MMC Handle. - * @param __FLAG__ specifies the flag to clear. - * This parameter can be one or a combination of the following values: - * @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed) - * @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) - * @arg SDMMC_FLAG_CTIMEOUT: Command response timeout - * @arg SDMMC_FLAG_DTIMEOUT: Data timeout - * @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error - * @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error - * @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed) - * @arg SDMMC_FLAG_CMDSENT: Command sent (no response required) - * @arg SDMMC_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero) - * @arg SDMMC_FLAG_DHOLD: Data transfer Hold - * @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed) - * @arg SDMMC_FLAG_DABORT: Data transfer aborted by CMD12 - * @arg SDMMC_FLAG_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected - * @arg SDMMC_FLAG_SDIOIT: SD I/O interrupt received - * @arg SDMMC_FLAG_ACKFAIL: Boot Acknowledgment received - * @arg SDMMC_FLAG_ACKTIMEOUT: Boot Acknowledgment timeout - * @arg SDMMC_FLAG_VSWEND: Voltage switch critical timing section completion - * @arg SDMMC_FLAG_CKSTOP: SDMMC_CK stopped in Voltage switch procedure - * @arg SDMMC_FLAG_IDMATE: IDMA transfer error - * @arg SDMMC_FLAG_IDMABTC: IDMA buffer transfer complete - * @retval None - */ -#define __HAL_MMC_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDMMC_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__)) - -/** - * @brief Check whether the specified MMC interrupt has occurred or not. - * @param __HANDLE__ MMC Handle. - * @param __INTERRUPT__ specifies the SDMMC interrupt source to check. - * This parameter can be one of the following values: - * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt - * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt - * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt - * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt - * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt - * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt - * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt - * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt - * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt - * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt - * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt - * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt - * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt - * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt - * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt - * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt - * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt - * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt - * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt - * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt - * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt - * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt - * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt - * @retval The new state of MMC IT (SET or RESET). - */ -#define __HAL_MMC_GET_IT(__HANDLE__, __INTERRUPT__) __SDMMC_GET_IT((__HANDLE__)->Instance, (__INTERRUPT__)) - -/** - * @brief Clear the MMC's interrupt pending bits. - * @param __HANDLE__ MMC Handle. - * @param __INTERRUPT__ specifies the interrupt pending bit to clear. - * This parameter can be one or a combination of the following values: - * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt - * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt - * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt - * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt - * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt - * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt - * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt - * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt - * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt - * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt - * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt - * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt - * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt - * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt - * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt - * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt - * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt - * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt - * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt - * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt - * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt - * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt - * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt - * @retval None - */ -#define __HAL_MMC_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDMMC_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__)) - -/** - * @} - */ - -/* Include MMC HAL Extension module */ -#include "stm32n6xx_hal_mmc_ex.h" - -/* Exported functions --------------------------------------------------------*/ -/** @defgroup MMC_Exported_Functions MMC Exported Functions - * @{ - */ - -/** @defgroup MMC_Exported_Functions_Group1 Initialization and de-initialization functions - * @{ - */ -HAL_StatusTypeDef HAL_MMC_Init(MMC_HandleTypeDef *hmmc); -HAL_StatusTypeDef HAL_MMC_InitCard(MMC_HandleTypeDef *hmmc); -HAL_StatusTypeDef HAL_MMC_DeInit(MMC_HandleTypeDef *hmmc); -void HAL_MMC_MspInit(MMC_HandleTypeDef *hmmc); -void HAL_MMC_MspDeInit(MMC_HandleTypeDef *hmmc); - -/** - * @} - */ - -/** @defgroup MMC_Exported_Functions_Group2 Input and Output operation functions - * @{ - */ -/* Blocking mode: Polling */ -HAL_StatusTypeDef HAL_MMC_ReadBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, - uint32_t NumberOfBlocks, - uint32_t Timeout); -HAL_StatusTypeDef HAL_MMC_WriteBlocks(MMC_HandleTypeDef *hmmc, const uint8_t *pData, uint32_t BlockAdd, - uint32_t NumberOfBlocks, uint32_t Timeout); -HAL_StatusTypeDef HAL_MMC_Erase(MMC_HandleTypeDef *hmmc, uint32_t BlockStartAdd, uint32_t BlockEndAdd); -/* Non-Blocking mode: IT */ -HAL_StatusTypeDef HAL_MMC_ReadBlocks_IT(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, - uint32_t NumberOfBlocks); -HAL_StatusTypeDef HAL_MMC_WriteBlocks_IT(MMC_HandleTypeDef *hmmc, const uint8_t *pData, uint32_t BlockAdd, - uint32_t NumberOfBlocks); -/* Non-Blocking mode: DMA */ -HAL_StatusTypeDef HAL_MMC_ReadBlocks_DMA(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, - uint32_t NumberOfBlocks); -HAL_StatusTypeDef HAL_MMC_WriteBlocks_DMA(MMC_HandleTypeDef *hmmc, const uint8_t *pData, uint32_t BlockAdd, - uint32_t NumberOfBlocks); - -void HAL_MMC_IRQHandler(MMC_HandleTypeDef *hmmc); - -/* Callback in non blocking modes (DMA) */ -void HAL_MMC_TxCpltCallback(MMC_HandleTypeDef *hmmc); -void HAL_MMC_RxCpltCallback(MMC_HandleTypeDef *hmmc); -void HAL_MMC_ErrorCallback(MMC_HandleTypeDef *hmmc); -void HAL_MMC_AbortCallback(MMC_HandleTypeDef *hmmc); - -#if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) -/* MMC callback registering/unregistering */ -HAL_StatusTypeDef HAL_MMC_RegisterCallback(MMC_HandleTypeDef *hmmc, HAL_MMC_CallbackIDTypeDef CallbackId, - pMMC_CallbackTypeDef pCallback); -HAL_StatusTypeDef HAL_MMC_UnRegisterCallback(MMC_HandleTypeDef *hmmc, HAL_MMC_CallbackIDTypeDef CallbackId); -#endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ -/** - * @} - */ - -/** @defgroup MMC_Exported_Functions_Group3 Peripheral Control functions - * @{ - */ -HAL_StatusTypeDef HAL_MMC_ConfigWideBusOperation(MMC_HandleTypeDef *hmmc, uint32_t WideMode); -HAL_StatusTypeDef HAL_MMC_ConfigSpeedBusOperation(MMC_HandleTypeDef *hmmc, uint32_t SpeedMode); -HAL_StatusTypeDef HAL_MMC_SwitchPartition(MMC_HandleTypeDef *hmmc, HAL_MMC_PartitionTypeDef Partition); -/** - * @} - */ - -/** @defgroup MMC_Exported_Functions_Group4 MMC card related functions - * @{ - */ -HAL_MMC_CardStateTypeDef HAL_MMC_GetCardState(MMC_HandleTypeDef *hmmc); -HAL_StatusTypeDef HAL_MMC_GetCardCID(const MMC_HandleTypeDef *hmmc, HAL_MMC_CardCIDTypeDef *pCID); -HAL_StatusTypeDef HAL_MMC_GetCardCSD(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCSDTypeDef *pCSD); -HAL_StatusTypeDef HAL_MMC_GetCardInfo(const MMC_HandleTypeDef *hmmc, HAL_MMC_CardInfoTypeDef *pCardInfo); -HAL_StatusTypeDef HAL_MMC_GetCardExtCSD(MMC_HandleTypeDef *hmmc, uint32_t *pExtCSD, uint32_t Timeout); -/** - * @} - */ - -/** @defgroup MMC_Exported_Functions_Group5 Peripheral State and Errors functions - * @{ - */ -HAL_MMC_StateTypeDef HAL_MMC_GetState(const MMC_HandleTypeDef *hmmc); -uint32_t HAL_MMC_GetError(const MMC_HandleTypeDef *hmmc); -uint32_t HAL_MMC_GetRPMBError(const MMC_HandleTypeDef *hmmc); -/** - * @} - */ - -/** @defgroup MMC_Exported_Functions_Group6 Peripheral Abort management - * @{ - */ -HAL_StatusTypeDef HAL_MMC_Abort(MMC_HandleTypeDef *hmmc); -HAL_StatusTypeDef HAL_MMC_Abort_IT(MMC_HandleTypeDef *hmmc); -/** - * @} - */ - -/** @defgroup MMC_Exported_Functions_Group7 Peripheral Erase management - * @{ - */ -HAL_StatusTypeDef HAL_MMC_EraseSequence(MMC_HandleTypeDef *hmmc, uint32_t EraseType, uint32_t BlockStartAdd, - uint32_t BlockEndAdd); -HAL_StatusTypeDef HAL_MMC_Sanitize(MMC_HandleTypeDef *hmmc); -HAL_StatusTypeDef HAL_MMC_ConfigSecRemovalType(MMC_HandleTypeDef *hmmc, uint32_t SRTMode); -HAL_StatusTypeDef HAL_MMC_GetSupportedSecRemovalType(MMC_HandleTypeDef *hmmc, uint32_t *SupportedSRT); -/** - * @} - */ - -/** @defgroup MMC_Exported_Functions_Group8 Peripheral Sleep management - * @{ - */ -HAL_StatusTypeDef HAL_MMC_SleepDevice(MMC_HandleTypeDef *hmmc); -HAL_StatusTypeDef HAL_MMC_AwakeDevice(MMC_HandleTypeDef *hmmc); -/** - * @} - */ - -/** @defgroup MMC_Exported_Functions_Group9 Replay Protected Memory Block management - * @{ - */ -HAL_StatusTypeDef HAL_MMC_RPMB_ProgramAuthenticationKey(MMC_HandleTypeDef *hmmc, const uint8_t *pKey, uint32_t Timeout); -HAL_StatusTypeDef HAL_MMC_RPMB_ProgramAuthenticationKey_IT(MMC_HandleTypeDef *hmmc, const uint8_t *pKey, - uint32_t Timeout); -uint32_t HAL_MMC_RPMB_GetWriteCounter(MMC_HandleTypeDef *hmmc, uint8_t *pNonce, uint32_t Timeout); -uint32_t HAL_MMC_RPMB_GetWriteCounter_IT(MMC_HandleTypeDef *hmmc, uint8_t *pNonce); -HAL_StatusTypeDef HAL_MMC_RPMB_WriteBlocks(MMC_HandleTypeDef *hmmc, const uint8_t *pData, uint16_t BlockAdd, - uint16_t NumberOfBlocks, const uint8_t *pMAC, uint32_t Timeout); -HAL_StatusTypeDef HAL_MMC_RPMB_WriteBlocks_IT(MMC_HandleTypeDef *hmmc, const uint8_t *pData, uint16_t BlockAdd, - uint16_t NumberOfBlocks, const uint8_t *pMAC); -HAL_StatusTypeDef HAL_MMC_RPMB_ReadBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint16_t BlockAdd, - uint16_t NumberOfBlocks, const uint8_t *pNonce, uint8_t *pMAC, - uint32_t Timeout); -HAL_StatusTypeDef HAL_MMC_RPMB_ReadBlocks_IT(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint16_t BlockAdd, - uint16_t NumberOfBlocks, const uint8_t *pNonce, uint8_t *pMAC); - -/** - * @} - */ - -/* Private types -------------------------------------------------------------*/ -/** @defgroup MMC_Private_Types MMC Private Types - * @{ - */ - -/** - * @} - */ - -/* Private defines -----------------------------------------------------------*/ -/** @defgroup MMC_Private_Defines MMC Private Defines - * @{ - */ -#define MMC_EXT_CSD_DATA_SEC_SIZE_INDEX 61 -#define MMC_EXT_CSD_DATA_SEC_SIZE_POS 8 -/** - * @} - */ - -/* Private variables ---------------------------------------------------------*/ -/** @defgroup MMC_Private_Variables MMC Private Variables - * @{ - */ - -/** - * @} - */ - -/* Private constants ---------------------------------------------------------*/ -/** @defgroup MMC_Private_Constants MMC Private Constants - * @{ - */ - -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/** @defgroup MMC_Private_Macros MMC Private Macros - * @{ - */ - -/** - * @} - */ - -/* Private functions prototypes ----------------------------------------------*/ -/** @defgroup MMC_Private_Functions_Prototypes MMC Private Functions Prototypes - * @{ - */ - -/** - * @} - */ - -/* Private functions ---------------------------------------------------------*/ -/** @defgroup MMC_Private_Functions MMC Private Functions - * @{ - */ - -/** - * @} - */ - - -/** - * @} - */ - -/** - * @} - */ -#endif /* SDMMC1 || SDMMC2 */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - - -#endif /* STM32N6xx_HAL_MMC_H */ Index: trunk/firmware/FSBL/CubeMX/Drivers/STM32N6xx_HAL_Driver/Inc/stm32n6xx_hal_mmc_ex.h =================================================================== --- trunk/firmware/FSBL/CubeMX/Drivers/STM32N6xx_HAL_Driver/Inc/stm32n6xx_hal_mmc_ex.h (revision 37) +++ (revision ) @@ -1,124 +1,0 @@ -/** - ****************************************************************************** - * @file stm32n6xx_hal_mmc_ex.h - * @author MCD Application Team - * @brief Header file of SD HAL extended module. - ****************************************************************************** - * @attention - * - * Copyright (c) 2023 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef STM32N6xx_HAL_MMC_EX_H -#define STM32N6xx_HAL_MMC_EX_H - -#ifdef __cplusplus -extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32n6xx_hal_def.h" - -/** @addtogroup STM32N6xx_HAL_Driver - * @{ - */ -#if defined (SDMMC1) || defined (SDMMC2) -/** @addtogroup MMCEx - * @brief SD HAL extended module driver - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup MMCEx_Exported_Types MMCEx Exported Types - * @{ - */ - -/** @defgroup MMCEx_Exported_Types_Group1 Linked List Wrapper - * @{ - */ -/* Exported constants --------------------------------------------------------*/ -/* Exported macro ------------------------------------------------------------*/ -/* -----------------Linked List Wrapper --------------------------------------*/ - -#define MMC_DMALinkNodeTypeDef SDMMC_DMALinkNodeTypeDef -#define MMC_DMALinkNodeConfTypeDef SDMMC_DMALinkNodeConfTypeDef -#define MMC_DMALinkedListTypeDef SDMMC_DMALinkedListTypeDef -/* ----------------- Linked Aliases ------------------------------------------*/ -#define HAL_MMCx_DMALinkedList_WriteCpltCallback HAL_MMC_TxCpltCallback -#define HAL_MMCx_DMALinkedList_ReadCpltCallback HAL_MMC_RxCpltCallback -/** - * @} - */ - -/** - * @} - */ -/* Exported functions --------------------------------------------------------*/ -/** @defgroup MMCEx_Exported_Functions MMCEx Exported Functions - * @{ - */ - -/** @defgroup MMCEx_Exported_Functions_Group1 MultiBuffer functions - * @{ - */ -HAL_StatusTypeDef HAL_MMCEx_DMALinkedList_ReadBlocks(MMC_HandleTypeDef *hmmc, - const MMC_DMALinkedListTypeDef *pLinkedList, - uint32_t BlockAdd, uint32_t NumberOfBlocks); -HAL_StatusTypeDef HAL_MMCEx_DMALinkedList_WriteBlocks(MMC_HandleTypeDef *hmmc, - const MMC_DMALinkedListTypeDef *pLinkedList, - uint32_t BlockAdd, uint32_t NumberOfBlocks); - -HAL_StatusTypeDef HAL_MMCEx_DMALinkedList_BuildNode(MMC_DMALinkNodeTypeDef *pNode, - MMC_DMALinkNodeConfTypeDef *pNodeConf); -HAL_StatusTypeDef HAL_MMCEx_DMALinkedList_InsertNode(MMC_DMALinkedListTypeDef *pLinkedList, - MMC_DMALinkNodeTypeDef *pPrevNode, - MMC_DMALinkNodeTypeDef *pNewNode); -HAL_StatusTypeDef HAL_MMCEx_DMALinkedList_RemoveNode(MMC_DMALinkedListTypeDef *pLinkedList, - MMC_DMALinkNodeTypeDef *pNode); -HAL_StatusTypeDef HAL_MMCEx_DMALinkedList_LockNode(MMC_DMALinkNodeTypeDef *pNode); -HAL_StatusTypeDef HAL_MMCEx_DMALinkedList_UnlockNode(MMC_DMALinkNodeTypeDef *pNode); -HAL_StatusTypeDef HAL_MMCEx_DMALinkedList_EnableCircularMode(SDMMC_DMALinkedListTypeDef *pLinkedList); -HAL_StatusTypeDef HAL_MMCEx_DMALinkedList_DisableCircularMode(SDMMC_DMALinkedListTypeDef *pLinkedList); - -void HAL_MMCEx_Read_DMALnkLstBufCpltCallback(MMC_HandleTypeDef *hmmc); -void HAL_MMCEx_Write_DMALnkLstBufCpltCallback(MMC_HandleTypeDef *hmmc); - - -/** - * @} - */ - -/** - * @} - */ - -/* Private types -------------------------------------------------------------*/ -/* Private defines -----------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private constants ---------------------------------------------------------*/ -/* Private macros ------------------------------------------------------------*/ -/* Private functions prototypes ----------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ - -/** - * @} - */ -#endif /* SDMMC1 || SDMMC2 */ - -/** - * @} - */ -#ifdef __cplusplus -} -#endif - - -#endif /* STM32N6xx_HAL_MMCEx_H */ Index: trunk/firmware/FSBL/CubeMX/Drivers/STM32N6xx_HAL_Driver/Inc/stm32n6xx_hal_rif.h =================================================================== --- trunk/firmware/FSBL/CubeMX/Drivers/STM32N6xx_HAL_Driver/Inc/stm32n6xx_hal_rif.h (revision 37) +++ (revision ) @@ -1,1546 +1,0 @@ -/** - ****************************************************************************** - * @file stm32n6xx_hal_rif.h - * @author MCD Application Team - * @brief Header file of RIF HAL module. - ****************************************************************************** - * @attention - * - * Copyright (c) 2023 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef STM32N6xx_HAL_RIF_H -#define STM32N6xx_HAL_RIF_H - -#ifdef __cplusplus -extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32n6xx_hal_def.h" - -/** @addtogroup STM32N6xx_HAL_Driver - * @{ - */ - -/** @addtogroup RIF - * @{ - */ - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup RIF_EXPORTED_CONSTANTS_COMMON RIF exported constants - Common - * @{ - */ - -/** @defgroup RIF_COMPARTMENT_ID RIF CID number definition - * @{ - */ -#define RIF_CID_NONE 0x00000000U -#define RIF_CID_0 0x00000001U -#define RIF_CID_1 0x00000002U -#define RIF_CID_2 0x00000004U -#define RIF_CID_3 0x00000008U -#define RIF_CID_4 0x00000010U -#define RIF_CID_5 0x00000020U -#define RIF_CID_6 0x00000040U -#define RIF_CID_7 0x00000080U -/** - * @} - */ - -/** @defgroup RIF_MASTER_INDEX RIF Master index - * @{ - */ -#define RIF_MASTER_INDEX_ETR 0U -#if defined(NPU_PRESENT) -#define RIF_MASTER_INDEX_NPU 1U -#endif /* defined(NPU_PRESENT) */ -#define RIF_MASTER_INDEX_SDMMC1 2U -#define RIF_MASTER_INDEX_SDMMC2 3U -#define RIF_MASTER_INDEX_OTG1 4U -#define RIF_MASTER_INDEX_OTG2 5U -#define RIF_MASTER_INDEX_ETH1 6U -#define RIF_MASTER_INDEX_GPU2D 7U -#define RIF_MASTER_INDEX_DMA2D 8U -#define RIF_MASTER_INDEX_DCMIPP 9U -#define RIF_MASTER_INDEX_LTDC1 10U -#define RIF_MASTER_INDEX_LTDC2 11U -#define RIF_MASTER_INDEX_VENC 12U -/** - * @} - */ - -/** @defgroup RIF_PERIPHERAL_INDEX RIF RISUP Peripheral index - * @{ - */ -/** @defgroup RIF_PERIPH_PERIPHERAL_INDEX RIF RISUP Peripheral index - * @{ - */ -#define RIF_RISC_PERIPH_INDEX_SPI1 (RIF_PERIPH_REG0 | RIFSC_RISC_SECCFGRx_SEC0_Pos) -#define RIF_RISC_PERIPH_INDEX_SPI2 (RIF_PERIPH_REG0 | RIFSC_RISC_SECCFGRx_SEC1_Pos) -#define RIF_RISC_PERIPH_INDEX_SPI3 (RIF_PERIPH_REG0 | RIFSC_RISC_SECCFGRx_SEC2_Pos) -#define RIF_RISC_PERIPH_INDEX_SPI4 (RIF_PERIPH_REG0 | RIFSC_RISC_SECCFGRx_SEC3_Pos) -#define RIF_RISC_PERIPH_INDEX_SPI5 (RIF_PERIPH_REG0 | RIFSC_RISC_SECCFGRx_SEC4_Pos) -#define RIF_RISC_PERIPH_INDEX_SPI6 (RIF_PERIPH_REG0 | RIFSC_RISC_SECCFGRx_SEC5_Pos) -#define RIF_RISC_PERIPH_INDEX_SAI1 (RIF_PERIPH_REG0 | RIFSC_RISC_SECCFGRx_SEC6_Pos) -#define RIF_RISC_PERIPH_INDEX_SAI2 (RIF_PERIPH_REG0 | RIFSC_RISC_SECCFGRx_SEC8_Pos) -#define RIF_RISC_PERIPH_INDEX_I2C1 (RIF_PERIPH_REG0 | RIFSC_RISC_SECCFGRx_SEC9_Pos) -#define RIF_RISC_PERIPH_INDEX_I2C2 (RIF_PERIPH_REG0 | RIFSC_RISC_SECCFGRx_SEC10_Pos) -#define RIF_RISC_PERIPH_INDEX_I2C3 (RIF_PERIPH_REG0 | RIFSC_RISC_SECCFGRx_SEC11_Pos) -#define RIF_RISC_PERIPH_INDEX_I2C4 (RIF_PERIPH_REG0 | RIFSC_RISC_SECCFGRx_SEC12_Pos) -#define RIF_RISC_PERIPH_INDEX_I3C1 (RIF_PERIPH_REG0 | RIFSC_RISC_SECCFGRx_SEC13_Pos) -#define RIF_RISC_PERIPH_INDEX_I3C2 (RIF_PERIPH_REG0 | RIFSC_RISC_SECCFGRx_SEC14_Pos) -#define RIF_RISC_PERIPH_INDEX_USART1 (RIF_PERIPH_REG0 | RIFSC_RISC_SECCFGRx_SEC15_Pos) -#define RIF_RISC_PERIPH_INDEX_USART2 (RIF_PERIPH_REG0 | RIFSC_RISC_SECCFGRx_SEC16_Pos) -#define RIF_RISC_PERIPH_INDEX_USART3 (RIF_PERIPH_REG0 | RIFSC_RISC_SECCFGRx_SEC17_Pos) -#define RIF_RISC_PERIPH_INDEX_UART4 (RIF_PERIPH_REG0 | RIFSC_RISC_SECCFGRx_SEC18_Pos) -#define RIF_RISC_PERIPH_INDEX_UART5 (RIF_PERIPH_REG0 | RIFSC_RISC_SECCFGRx_SEC19_Pos) -#define RIF_RISC_PERIPH_INDEX_USART6 (RIF_PERIPH_REG0 | RIFSC_RISC_SECCFGRx_SEC20_Pos) -#define RIF_RISC_PERIPH_INDEX_UART7 (RIF_PERIPH_REG0 | RIFSC_RISC_SECCFGRx_SEC21_Pos) -#define RIF_RISC_PERIPH_INDEX_UART8 (RIF_PERIPH_REG0 | RIFSC_RISC_SECCFGRx_SEC22_Pos) -#define RIF_RISC_PERIPH_INDEX_UART9 (RIF_PERIPH_REG0 | RIFSC_RISC_SECCFGRx_SEC23_Pos) -#define RIF_RISC_PERIPH_INDEX_USART10 (RIF_PERIPH_REG0 | RIFSC_RISC_SECCFGRx_SEC24_Pos) -#define RIF_RISC_PERIPH_INDEX_LPUART1 (RIF_PERIPH_REG0 | RIFSC_RISC_SECCFGRx_SEC25_Pos) -#define RIF_RISC_PERIPH_INDEX_FDCAN1 (RIF_PERIPH_REG0 | RIFSC_RISC_SECCFGRx_SEC26_Pos) -#define RIF_RISC_PERIPH_INDEX_FDCAN2 (RIF_PERIPH_REG0 | RIFSC_RISC_SECCFGRx_SEC26_Pos) -#define RIF_RISC_PERIPH_INDEX_FDCAN3 (RIF_PERIPH_REG0 | RIFSC_RISC_SECCFGRx_SEC26_Pos) -#define RIF_RISC_PERIPH_INDEX_TIM1 (RIF_PERIPH_REG0 | RIFSC_RISC_SECCFGRx_SEC27_Pos) -#define RIF_RISC_PERIPH_INDEX_TIM2 (RIF_PERIPH_REG0 | RIFSC_RISC_SECCFGRx_SEC28_Pos) -#define RIF_RISC_PERIPH_INDEX_TIM3 (RIF_PERIPH_REG0 | RIFSC_RISC_SECCFGRx_SEC29_Pos) -#define RIF_RISC_PERIPH_INDEX_TIM4 (RIF_PERIPH_REG0 | RIFSC_RISC_SECCFGRx_SEC30_Pos) -#define RIF_RISC_PERIPH_INDEX_TIM5 (RIF_PERIPH_REG0 | RIFSC_RISC_SECCFGRx_SEC31_Pos) -#define RIF_RISC_PERIPH_INDEX_TIM6 (RIF_PERIPH_REG1 | RIFSC_RISC_SECCFGRx_SEC0_Pos) -#define RIF_RISC_PERIPH_INDEX_TIM7 (RIF_PERIPH_REG1 | RIFSC_RISC_SECCFGRx_SEC1_Pos) -#define RIF_RISC_PERIPH_INDEX_TIM8 (RIF_PERIPH_REG1 | RIFSC_RISC_SECCFGRx_SEC2_Pos) -#define RIF_RISC_PERIPH_INDEX_TIM9 (RIF_PERIPH_REG1 | RIFSC_RISC_SECCFGRx_SEC3_Pos) -#define RIF_RISC_PERIPH_INDEX_TIM10 (RIF_PERIPH_REG1 | RIFSC_RISC_SECCFGRx_SEC4_Pos) -#define RIF_RISC_PERIPH_INDEX_TIM11 (RIF_PERIPH_REG1 | RIFSC_RISC_SECCFGRx_SEC5_Pos) -#define RIF_RISC_PERIPH_INDEX_TIM12 (RIF_PERIPH_REG1 | RIFSC_RISC_SECCFGRx_SEC6_Pos) -#define RIF_RISC_PERIPH_INDEX_TIM13 (RIF_PERIPH_REG1 | RIFSC_RISC_SECCFGRx_SEC7_Pos) -#define RIF_RISC_PERIPH_INDEX_TIM14 (RIF_PERIPH_REG1 | RIFSC_RISC_SECCFGRx_SEC8_Pos) -#define RIF_RISC_PERIPH_INDEX_TIM15 (RIF_PERIPH_REG1 | RIFSC_RISC_SECCFGRx_SEC9_Pos) -#define RIF_RISC_PERIPH_INDEX_TIM16 (RIF_PERIPH_REG1 | RIFSC_RISC_SECCFGRx_SEC10_Pos) -#define RIF_RISC_PERIPH_INDEX_TIM17 (RIF_PERIPH_REG1 | RIFSC_RISC_SECCFGRx_SEC11_Pos) -#define RIF_RISC_PERIPH_INDEX_TIM18 (RIF_PERIPH_REG1 | RIFSC_RISC_SECCFGRx_SEC12_Pos) -#define RIF_RISC_PERIPH_INDEX_GFXTIM (RIF_PERIPH_REG1 | RIFSC_RISC_SECCFGRx_SEC13_Pos) -#define RIF_RISC_PERIPH_INDEX_LPTIM1 (RIF_PERIPH_REG1 | RIFSC_RISC_SECCFGRx_SEC14_Pos) -#define RIF_RISC_PERIPH_INDEX_LPTIM2 (RIF_PERIPH_REG1 | RIFSC_RISC_SECCFGRx_SEC15_Pos) -#define RIF_RISC_PERIPH_INDEX_LPTIM3 (RIF_PERIPH_REG1 | RIFSC_RISC_SECCFGRx_SEC16_Pos) -#define RIF_RISC_PERIPH_INDEX_LPTIM4 (RIF_PERIPH_REG1 | RIFSC_RISC_SECCFGRx_SEC17_Pos) -#define RIF_RISC_PERIPH_INDEX_LPTIM5 (RIF_PERIPH_REG1 | RIFSC_RISC_SECCFGRx_SEC18_Pos) -#define RIF_RISC_PERIPH_INDEX_ADF1 (RIF_PERIPH_REG1 | RIFSC_RISC_SECCFGRx_SEC19_Pos) -#define RIF_RISC_PERIPH_INDEX_MDF1 (RIF_PERIPH_REG1 | RIFSC_RISC_SECCFGRx_SEC20_Pos) -#define RIF_RISC_PERIPH_INDEX_SDMMC1 (RIF_PERIPH_REG1 | RIFSC_RISC_SECCFGRx_SEC21_Pos) -#define RIF_RISC_PERIPH_INDEX_SDMMC2 (RIF_PERIPH_REG1 | RIFSC_RISC_SECCFGRx_SEC22_Pos) -#define RIF_RISC_PERIPH_INDEX_MDIOS (RIF_PERIPH_REG1 | RIFSC_RISC_SECCFGRx_SEC23_Pos) -#define RIF_RISC_PERIPH_INDEX_OTG1HS (RIF_PERIPH_REG1 | RIFSC_RISC_SECCFGRx_SEC24_Pos) -#define RIF_RISC_PERIPH_INDEX_OTG2HS (RIF_PERIPH_REG1 | RIFSC_RISC_SECCFGRx_SEC25_Pos) -#define RIF_RISC_PERIPH_INDEX_UCPD1 (RIF_PERIPH_REG1 | RIFSC_RISC_SECCFGRx_SEC26_Pos) -#define RIF_RISC_PERIPH_INDEX_ETH1 (RIF_PERIPH_REG1 | RIFSC_RISC_SECCFGRx_SEC28_Pos) -#define RIF_RISC_PERIPH_INDEX_SPDIFRX (RIF_PERIPH_REG1 | RIFSC_RISC_SECCFGRx_SEC29_Pos) -#define RIF_RISC_PERIPH_INDEX_SYSCFG (RIF_PERIPH_REG1 | RIFSC_RISC_SECCFGRx_SEC30_Pos) -#define RIF_RISC_PERIPH_INDEX_ADC12 (RIF_PERIPH_REG2 | RIFSC_RISC_SECCFGRx_SEC0_Pos) -#define RIF_RISC_PERIPH_INDEX_VREFBUF (RIF_PERIPH_REG2 | RIFSC_RISC_SECCFGRx_SEC1_Pos) -#define RIF_RISC_PERIPH_INDEX_CRC (RIF_PERIPH_REG2 | RIFSC_RISC_SECCFGRx_SEC3_Pos) -#define RIF_RISC_PERIPH_INDEX_IWDG (RIF_PERIPH_REG2 | RIFSC_RISC_SECCFGRx_SEC4_Pos) -#define RIF_RISC_PERIPH_INDEX_WWDG (RIF_PERIPH_REG2 | RIFSC_RISC_SECCFGRx_SEC5_Pos) -#define RIF_RISC_PERIPH_INDEX_RNG (RIF_PERIPH_REG2 | RIFSC_RISC_SECCFGRx_SEC12_Pos) -#define RIF_RISC_PERIPH_INDEX_PKA (RIF_PERIPH_REG2 | RIFSC_RISC_SECCFGRx_SEC13_Pos) -#if defined(CRYP) -#define RIF_RISC_PERIPH_INDEX_SAES (RIF_PERIPH_REG2 | RIFSC_RISC_SECCFGRx_SEC14_Pos) -#endif /* defined(CRYP) */ -#define RIF_RISC_PERIPH_INDEX_HASH (RIF_PERIPH_REG2 | RIFSC_RISC_SECCFGRx_SEC15_Pos) -#if defined(CRYP) -#define RIF_RISC_PERIPH_INDEX_CRYP (RIF_PERIPH_REG2 | RIFSC_RISC_SECCFGRx_SEC16_Pos) -#define RIF_RISC_PERIPH_INDEX_MCE1 (RIF_PERIPH_REG2 | RIFSC_RISC_SECCFGRx_SEC17_Pos) -#define RIF_RISC_PERIPH_INDEX_MCE2 (RIF_PERIPH_REG2 | RIFSC_RISC_SECCFGRx_SEC18_Pos) -#define RIF_RISC_PERIPH_INDEX_MCE3 (RIF_PERIPH_REG2 | RIFSC_RISC_SECCFGRx_SEC19_Pos) -#define RIF_RISC_PERIPH_INDEX_MCE4 (RIF_PERIPH_REG2 | RIFSC_RISC_SECCFGRx_SEC20_Pos) -#endif /* defined(CRYP) */ -#define RIF_RISC_PERIPH_INDEX_XSPI1 (RIF_PERIPH_REG2 | RIFSC_RISC_SECCFGRx_SEC22_Pos) -#define RIF_RISC_PERIPH_INDEX_XSPI2 (RIF_PERIPH_REG2 | RIFSC_RISC_SECCFGRx_SEC23_Pos) -#define RIF_RISC_PERIPH_INDEX_XSPI3 (RIF_PERIPH_REG2 | RIFSC_RISC_SECCFGRx_SEC24_Pos) -#define RIF_RISC_PERIPH_INDEX_XSPIM (RIF_PERIPH_REG2 | RIFSC_RISC_SECCFGRx_SEC25_Pos) -#define RIF_RISC_PERIPH_INDEX_FMC (RIF_PERIPH_REG2 | RIFSC_RISC_SECCFGRx_SEC26_Pos) -#define RIF_RISC_PERIPH_INDEX_CSI (RIF_PERIPH_REG2 | RIFSC_RISC_SECCFGRx_SEC28_Pos) -#define RIF_RISC_PERIPH_INDEX_DCMIPP (RIF_PERIPH_REG2 | RIFSC_RISC_SECCFGRx_SEC29_Pos) -#define RIF_RISC_PERIPH_INDEX_DCMI (RIF_PERIPH_REG2 | RIFSC_RISC_SECCFGRx_SEC30_Pos) -#define RIF_RISC_PERIPH_INDEX_JPEG (RIF_PERIPH_REG3 | RIFSC_RISC_SECCFGRx_SEC0_Pos) -#define RIF_RISC_PERIPH_INDEX_VENC (RIF_PERIPH_REG3 | RIFSC_RISC_SECCFGRx_SEC1_Pos) -#define RIF_RISC_PERIPH_INDEX_ICACHE (RIF_PERIPH_REG3 | RIFSC_RISC_SECCFGRx_SEC2_Pos) -#define RIF_RISC_PERIPH_INDEX_GPU2D (RIF_PERIPH_REG3 | RIFSC_RISC_SECCFGRx_SEC3_Pos) -#define RIF_RISC_PERIPH_INDEX_GFXMMU (RIF_PERIPH_REG3 | RIFSC_RISC_SECCFGRx_SEC4_Pos) -#define RIF_RISC_PERIPH_INDEX_DMA2D (RIF_PERIPH_REG3 | RIFSC_RISC_SECCFGRx_SEC5_Pos) -#define RIF_RISC_PERIPH_INDEX_LTDC (RIF_PERIPH_REG3 | RIFSC_RISC_SECCFGRx_SEC6_Pos) -#define RIF_RISC_PERIPH_INDEX_LTDCL1 (RIF_PERIPH_REG3 | RIFSC_RISC_SECCFGRx_SEC7_Pos) -#define RIF_RISC_PERIPH_INDEX_LTDCL2 (RIF_PERIPH_REG3 | RIFSC_RISC_SECCFGRx_SEC8_Pos) -#if defined(NPU_PRESENT) -#define RIF_RISC_PERIPH_INDEX_NPU (RIF_PERIPH_REG3 | RIFSC_RISC_SECCFGRx_SEC10_Pos) -#endif /* defined(NPU_PRESENT) */ -/** - * @} - */ - -/** @defgroup RIF_RCC_PERIPHERAL_INDEX RIF RCC Security Control Peripheral index - * @{ - */ -#define RIF_RCC_PERIPH_INDEX_GPDMA1 (RIF_PERIPH_REG4 | RIFSC_RISC_SECCFGRx_SEC2_Pos) -#define RIF_RCC_PERIPH_INDEX_HPDMA1 (RIF_PERIPH_REG4 | RIFSC_RISC_SECCFGRx_SEC3_Pos) -#define RIF_RCC_PERIPH_INDEX_RTC (RIF_PERIPH_REG4 | RIFSC_RISC_SECCFGRx_SEC5_Pos) -#define RIF_RCC_PERIPH_INDEX_AXISRAM1 (RIF_PERIPH_REG4 | RIFSC_RISC_SECCFGRx_SEC12_Pos) -#define RIF_RCC_PERIPH_INDEX_AXISRAM2 (RIF_PERIPH_REG4 | RIFSC_RISC_SECCFGRx_SEC13_Pos) -#define RIF_RCC_PERIPH_INDEX_FLEXRAM (RIF_PERIPH_REG4 | RIFSC_RISC_SECCFGRx_SEC17_Pos) -#define RIF_RCC_PERIPH_INDEX_CACHEAXIRAM (RIF_PERIPH_REG4 | RIFSC_RISC_SECCFGRx_SEC18_Pos) -#define RIF_RCC_PERIPH_INDEX_VENCRAM (RIF_PERIPH_REG4 | RIFSC_RISC_SECCFGRx_SEC19_Pos) -#if defined(NPU_PRESENT) -#define RIF_RCC_PERIPH_INDEX_CACHECONFIG (RIF_PERIPH_REG4 | RIFSC_RISC_SECCFGRx_SEC25_Pos) -#endif /* defined(NPU_PRESENT) */ -#define RIF_RCC_PERIPH_INDEX_AHBRAM1 (RIF_PERIPH_REG4 | RIFSC_RISC_SECCFGRx_SEC27_Pos) -#define RIF_RCC_PERIPH_INDEX_AHBRAM2 (RIF_PERIPH_REG4 | RIFSC_RISC_SECCFGRx_SEC28_Pos) -#define RIF_RCC_PERIPH_INDEX_BKPRAM (RIF_PERIPH_REG4 | RIFSC_RISC_SECCFGRx_SEC29_Pos) -#define RIF_RCC_PERIPH_INDEX_GPIOA (RIF_PERIPH_REG4 | RIFSC_RISC_SECCFGRx_SEC31_Pos) -#define RIF_RCC_PERIPH_INDEX_GPIOB (RIF_PERIPH_REG5 | RIFSC_RISC_SECCFGRx_SEC0_Pos) -#define RIF_RCC_PERIPH_INDEX_GPIOC (RIF_PERIPH_REG5 | RIFSC_RISC_SECCFGRx_SEC1_Pos) -#define RIF_RCC_PERIPH_INDEX_GPIOD (RIF_PERIPH_REG5 | RIFSC_RISC_SECCFGRx_SEC2_Pos) -#define RIF_RCC_PERIPH_INDEX_GPIOE (RIF_PERIPH_REG5 | RIFSC_RISC_SECCFGRx_SEC3_Pos) -#define RIF_RCC_PERIPH_INDEX_GPIOF (RIF_PERIPH_REG5 | RIFSC_RISC_SECCFGRx_SEC4_Pos) -#define RIF_RCC_PERIPH_INDEX_GPIOG (RIF_PERIPH_REG5 | RIFSC_RISC_SECCFGRx_SEC5_Pos) -#define RIF_RCC_PERIPH_INDEX_GPIOH (RIF_PERIPH_REG5 | RIFSC_RISC_SECCFGRx_SEC6_Pos) -#define RIF_RCC_PERIPH_INDEX_GPION (RIF_PERIPH_REG5 | RIFSC_RISC_SECCFGRx_SEC8_Pos) -#define RIF_RCC_PERIPH_INDEX_GPIOO (RIF_PERIPH_REG5 | RIFSC_RISC_SECCFGRx_SEC9_Pos) -#define RIF_RCC_PERIPH_INDEX_GPIOP (RIF_PERIPH_REG5 | RIFSC_RISC_SECCFGRx_SEC10_Pos) -#define RIF_RCC_PERIPH_INDEX_GPIOQ (RIF_PERIPH_REG5 | RIFSC_RISC_SECCFGRx_SEC11_Pos) -#define RIF_RCC_PERIPH_INDEX_DTS (RIF_PERIPH_REG5 | RIFSC_RISC_SECCFGRx_SEC13_Pos) -#define RIF_RCC_PERIPH_INDEX_MCO1 (RIF_PERIPH_REG5 | RIFSC_RISC_SECCFGRx_SEC14_Pos) -#define RIF_RCC_PERIPH_INDEX_MCO2 (RIF_PERIPH_REG5 | RIFSC_RISC_SECCFGRx_SEC15_Pos) -#if defined(NPU_PRESENT) -#define RIF_RCC_PERIPH_INDEX_NPURAM0 (RIF_PERIPH_REG5 | RIFSC_RISC_SECCFGRx_SEC17_Pos) -#define RIF_RCC_PERIPH_INDEX_NPURAM1 (RIF_PERIPH_REG5 | RIFSC_RISC_SECCFGRx_SEC18_Pos) -#define RIF_RCC_PERIPH_INDEX_NPURAM2 (RIF_PERIPH_REG5 | RIFSC_RISC_SECCFGRx_SEC19_Pos) -#define RIF_RCC_PERIPH_INDEX_NPURAM3 (RIF_PERIPH_REG5 | RIFSC_RISC_SECCFGRx_SEC20_Pos) -#endif /* defined(NPU_PRESENT) */ -#define RIF_RCC_PERIPH_INDEX_XSPIPHYCOMP (RIF_PERIPH_REG5 | RIFSC_RISC_SECCFGRx_SEC22_Pos) -#define RIF_RCC_PERIPH_INDEX_XSPIPHY1 (RIF_PERIPH_REG5 | RIFSC_RISC_SECCFGRx_SEC23_Pos) -#define RIF_RCC_PERIPH_INDEX_XSPIPHY2 (RIF_PERIPH_REG5 | RIFSC_RISC_SECCFGRx_SEC24_Pos) -#define RIF_RCC_PERIPH_INDEX_HDP (RIF_PERIPH_REG5 | RIFSC_RISC_SECCFGRx_SEC27_Pos) -#define RIF_RCC_PERIPH_INDEX_RAMCFG (RIF_PERIPH_REG5 | RIFSC_RISC_SECCFGRx_SEC30_Pos) -/** - * @} - */ - -/** @defgroup RIF_AWARE_PERIPHERAL_INDEX RIF-aware Peripheral index - * @{ - */ -#define RIF_AWARE_PERIPH_INDEX_CM55 (RIF_PERIPH_REG4 | IAC_IERx_IAIE0_Pos) -#define RIF_AWARE_PERIPH_INDEX_EXTI (RIF_PERIPH_REG4 | IAC_IERx_IAIE1_Pos) -#define RIF_AWARE_PERIPH_INDEX_GPDMA1 RIF_RCC_PERIPH_INDEX_GPDMA1 -#define RIF_AWARE_PERIPH_INDEX_HPDMA1 RIF_RCC_PERIPH_INDEX_HPDMA1 -#define RIF_AWARE_PERIPH_INDEX_RTC RIF_RCC_PERIPH_INDEX_RTC -#define RIF_AWARE_PERIPH_INDEX_TAMP (RIF_PERIPH_REG4 | IAC_IERx_IAIE6_Pos) -#define RIF_AWARE_PERIPH_INDEX_BSEC (RIF_PERIPH_REG4 | IAC_IERx_IAIE7_Pos) -#define RIF_AWARE_PERIPH_INDEX_RCC (RIF_PERIPH_REG4 | IAC_IERx_IAIE8_Pos) -#define RIF_AWARE_PERIPH_INDEX_PWR (RIF_PERIPH_REG4 | IAC_IERx_IAIE9_Pos) -#define RIF_AWARE_PERIPH_INDEX_IAC (RIF_PERIPH_REG4 | IAC_IERx_IAIE10_Pos) -#define RIF_AWARE_PERIPH_INDEX_RISAF1 (RIF_PERIPH_REG4 | IAC_IERx_IAIE11_Pos) -#define RIF_AWARE_PERIPH_INDEX_RISAF2 RIF_RCC_PERIPH_INDEX_AXISRAM1 -#define RIF_AWARE_PERIPH_INDEX_RISAF3 RIF_RCC_PERIPH_INDEX_AXISRAM2 -#if defined(NPU_PRESENT) -#define RIF_AWARE_PERIPH_INDEX_RISAF4 (RIF_PERIPH_REG4 | IAC_IERx_IAIE14_Pos) -#define RIF_AWARE_PERIPH_INDEX_RISAF5 (RIF_PERIPH_REG4 | IAC_IERx_IAIE15_Pos) -#endif /* if defined(NPU_PRESENT) */ -#define RIF_AWARE_PERIPH_INDEX_RISAF6 (RIF_PERIPH_REG4 | IAC_IERx_IAIE16_Pos) -#define RIF_AWARE_PERIPH_INDEX_RISAF7 RIF_RCC_PERIPH_INDEX_FLEXRAM -#define RIF_AWARE_PERIPH_INDEX_RISAF8 RIF_RCC_PERIPH_INDEX_CACHEAXIRAM -#define RIF_AWARE_PERIPH_INDEX_RISAF9 RIF_RCC_PERIPH_INDEX_VENCRAM -#define RIF_AWARE_PERIPH_INDEX_RISAF11 (RIF_PERIPH_REG4 | IAC_IERx_IAIE21_Pos) -#define RIF_AWARE_PERIPH_INDEX_RISAF12 (RIF_PERIPH_REG4 | IAC_IERx_IAIE22_Pos) -#define RIF_AWARE_PERIPH_INDEX_RISAF13 (RIF_PERIPH_REG4 | IAC_IERx_IAIE23_Pos) -#define RIF_AWARE_PERIPH_INDEX_RISAF14 (RIF_PERIPH_REG4 | IAC_IERx_IAIE24_Pos) -#if defined(NPU_PRESENT) -#define RIF_AWARE_PERIPH_INDEX_RISAF15 RIF_RCC_PERIPH_INDEX_CACHECONFIG -#endif /* if defined(NPU_PRESENT) */ -#define RIF_AWARE_PERIPH_INDEX_RISAF21 RIF_RCC_PERIPH_INDEX_AHBRAM1 -#define RIF_AWARE_PERIPH_INDEX_RISAF22 RIF_RCC_PERIPH_INDEX_AHBRAM2 -#define RIF_AWARE_PERIPH_INDEX_RISAF23 RIF_RCC_PERIPH_INDEX_BKPRAM -#define RIF_AWARE_PERIPH_INDEX_RIFSC (RIF_PERIPH_REG4 | IAC_IERx_IAIE30_Pos) -/** - * @} - */ -/** - * @} - */ - -/** @defgroup RIF_SEC_PRIV RIF Secure Privileged attributes definitions - * @{ - */ -#define RIF_ATTRIBUTE_NSEC 0x00000000U -#define RIF_ATTRIBUTE_SEC 0x00000001U -#define RIF_ATTRIBUTE_NPRIV 0x00000000U -#define RIF_ATTRIBUTE_PRIV 0x00000002U -/** - * @} - */ - -/** @defgroup RIF_ACCESS_TYPE RIF Access type definitions - * @{ - */ -#define RIF_ACCTYPE_READ_FETCH 0U -#define RIF_ACCTYPE_WRITE 1U -/** - * @} - */ - -/** @defgroup RIF_LOCK_STATE RIF Lock states definitions - * @{ - */ -#define RIF_LOCK_DISABLE 0U -#define RIF_LOCK_ENABLE RIFSC_RIMC_CR_GLOCK -/** - * @} - */ - -/** - * @} - */ - - -/** @defgroup RIF_EXPORTED_CONSTANTS_RISAF RIF Exported Constants - RISAF - * @{ - */ - -/** @defgroup RIF_RISAF_REGION RISAF Base region definitions - * @{ - */ -#define RISAF_REGION_1 0U -#define RISAF_REGION_2 1U -#define RISAF_REGION_3 2U -#define RISAF_REGION_4 3U -#define RISAF_REGION_5 4U -#define RISAF_REGION_6 5U -#define RISAF_REGION_7 6U -#define RISAF_REGION_8 7U -#define RISAF_REGION_9 8U -#define RISAF_REGION_10 9U -#define RISAF_REGION_11 10U -#define RISAF_REGION_12 11U -#define RISAF_REGION_13 12U -#define RISAF_REGION_14 13U -#define RISAF_REGION_15 14U -/** - * @} - */ - -/** @defgroup RIF_RISAF_GRANULARITY RISAF granularity definitions - * @{ - */ -#if !defined(NPU_PRESENT) -#define RISAF1_GRANULARITY 0x1000U -#define RISAF2_GRANULARITY 0x1000U -#define RISAF3_GRANULARITY 0x1000U -#define RISAF6_GRANULARITY 0x1000U -#define RISAF7_GRANULARITY 0x1000U -#define RISAF8_GRANULARITY 0x1000U -#define RISAF9_GRANULARITY 0x1000U -#define RISAF11_GRANULARITY 0x1000U -#define RISAF12_GRANULARITY 0x1000U -#define RISAF13_GRANULARITY 0x1000U -#define RISAF14_GRANULARITY 0x1000U -#define RISAF21_GRANULARITY 0x0200U -#define RISAF22_GRANULARITY 0x0200U -#define RISAF23_GRANULARITY 0x0200U -#else -#define RISAF1_GRANULARITY 0x1000U -#define RISAF2_GRANULARITY 0x1000U -#define RISAF3_GRANULARITY 0x1000U -#define RISAF4_GRANULARITY 0x1000U -#define RISAF5_GRANULARITY 0x1000U -#define RISAF6_GRANULARITY 0x1000U -#define RISAF7_GRANULARITY 0x1000U -#define RISAF8_GRANULARITY 0x1000U -#define RISAF9_GRANULARITY 0x1000U -#define RISAF11_GRANULARITY 0x1000U -#define RISAF12_GRANULARITY 0x1000U -#define RISAF13_GRANULARITY 0x1000U -#define RISAF14_GRANULARITY 0x1000U -#define RISAF15_GRANULARITY 0x0004U -#define RISAF21_GRANULARITY 0x0200U -#define RISAF22_GRANULARITY 0x0200U -#define RISAF23_GRANULARITY 0x0200U -#endif /* !defined(NPU_PRESENT) */ -/** - * @} - */ - -/** @defgroup RIF_RISAF_ADDSPACE RISAF address space sizes definitions - * @{ - */ -#if !defined(NPU_PRESENT) -#define RISAF1_LIMIT_ADDRESS_SPACE_SIZE 0x3FFFFFFFU -#define RISAF2_LIMIT_ADDRESS_SPACE_SIZE 0x000FFFFFU -#define RISAF3_LIMIT_ADDRESS_SPACE_SIZE 0x000FFFFFU -#define RISAF6_LIMIT_ADDRESS_SPACE_SIZE 0xFFFFFFFFU -#define RISAF7_LIMIT_ADDRESS_SPACE_SIZE 0x0007FFFFU -#define RISAF8_LIMIT_ADDRESS_SPACE_SIZE 0x0003FFFFU -#define RISAF9_LIMIT_ADDRESS_SPACE_SIZE 0x0001FFFFU -#define RISAF11_LIMIT_ADDRESS_SPACE_SIZE 0x0FFFFFFFU -#define RISAF12_LIMIT_ADDRESS_SPACE_SIZE 0x0FFFFFFFU -#define RISAF13_LIMIT_ADDRESS_SPACE_SIZE 0x0FFFFFFFU -#define RISAF14_LIMIT_ADDRESS_SPACE_SIZE 0x0FFFFFFFU -#define RISAF21_LIMIT_ADDRESS_SPACE_SIZE 0x00001FFFU -#define RISAF22_LIMIT_ADDRESS_SPACE_SIZE 0x00001FFFU -#define RISAF23_LIMIT_ADDRESS_SPACE_SIZE 0x00000FFFU -#else -#define RISAF1_LIMIT_ADDRESS_SPACE_SIZE 0x3FFFFFFFU -#define RISAF2_LIMIT_ADDRESS_SPACE_SIZE 0x000FFFFFU -#define RISAF3_LIMIT_ADDRESS_SPACE_SIZE 0x000FFFFFU -#define RISAF4_LIMIT_ADDRESS_SPACE_SIZE 0xFFFFFFFFU -#define RISAF5_LIMIT_ADDRESS_SPACE_SIZE 0xFFFFFFFFU -#define RISAF6_LIMIT_ADDRESS_SPACE_SIZE 0xFFFFFFFFU -#define RISAF7_LIMIT_ADDRESS_SPACE_SIZE 0x0007FFFFU -#define RISAF8_LIMIT_ADDRESS_SPACE_SIZE 0x0003FFFFU -#define RISAF9_LIMIT_ADDRESS_SPACE_SIZE 0x0001FFFFU -#define RISAF11_LIMIT_ADDRESS_SPACE_SIZE 0x0FFFFFFFU -#define RISAF12_LIMIT_ADDRESS_SPACE_SIZE 0x0FFFFFFFU -#define RISAF13_LIMIT_ADDRESS_SPACE_SIZE 0x0FFFFFFFU -#define RISAF14_LIMIT_ADDRESS_SPACE_SIZE 0x0FFFFFFFU -#define RISAF15_LIMIT_ADDRESS_SPACE_SIZE 0x00000FFFU -#define RISAF21_LIMIT_ADDRESS_SPACE_SIZE 0x00001FFFU -#define RISAF22_LIMIT_ADDRESS_SPACE_SIZE 0x00001FFFU -#define RISAF23_LIMIT_ADDRESS_SPACE_SIZE 0x00000FFFU -#endif /* !defined(NPU_PRESENT) */ -/** - * @} - */ - -/** @defgroup RIF_RISAF_SUBREGION RIF subregion definitions - * @{ - */ -#define RISAF_SUBREGION_A 0U -#define RISAF_SUBREGION_B 1U -/** - * @} - */ - -/** @defgroup RIF_RISAF_FILTERING_MODE RISAF Filtering mode definitions - * @{ - */ -#define RISAF_FILTER_DISABLE 0U -#define RISAF_FILTER_ENABLE RISAF_REGx_CFGR_BREN -/** - * @} - */ - -/** @defgroup RIF_RISAF_DELEGATION_MODE RISAF Delegation mode definitions - * @{ - */ -#define RISAF_DELEGATION_DISABLE 0U -#define RISAF_DELEGATION_ENABLE RISAF_REGx_zNESTR_DCEN -/** - * @} - */ - -/** @defgroup RIF_RISAF_READ_WRITE RISAF Read/Write definitions - * @{ - */ -#define RISAF_READ_DISABLE 0U -#define RISAF_READ_ENABLE RISAF_REGx_zCFGR_RDEN -#define RISAF_WRITE_DISABLE 0U -#define RISAF_WRITE_ENABLE RISAF_REGx_zCFGR_WREN -/** - * @} - */ - -/** @defgroup RIF_RISAF_ILLEGAL_ACCESS RISAF Illegal Access definitions - * @{ - */ -#define RISAF_ILLEGAL_ACCESS_NONE 0U -#define RISAF_ILLEGAL_CONFIGURATION_ACCESS RISAF_IASR_CAEF -#define RISAF_ILLEGAL_ACCESS RISAF_IASR_IAEF -/** - * @} - */ - -/** - * @} - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup RIF_Exported_Types RIF Exported Types - * @{ - */ - -/** - * @brief RIFSC Master CID attributes configuration structure - */ -typedef struct -{ - uint32_t MasterCID; /*!< One of @ref RIF_COMPARTMENT_ID */ - uint32_t SecPriv; /*!< A combination of @ref RIF_SEC_PRIV */ -} RIMC_MasterConfig_t; - -/** - * @brief RISAF base region configuration structure - */ -typedef struct -{ - uint32_t Filtering; /*!< One of @ref RIF_RISAF_FILTERING_MODE */ - uint32_t Secure; /*!< One of @ref RIF_SEC_PRIV */ - uint32_t PrivWhitelist; /*!< A combination of @ref RIF_COMPARTMENT_ID */ - uint32_t ReadWhitelist; /*!< A combination of @ref RIF_COMPARTMENT_ID */ - uint32_t WriteWhitelist; /*!< A combination of @ref RIF_COMPARTMENT_ID */ - uint32_t StartAddress; /*!< Base region start, address offset to the base address of the protected address space */ - uint32_t EndAddress; /*!< Base region end, address offset to the base address of the protected address space */ -} RISAF_BaseRegionConfig_t; - -/** - * @brief RISAF subregion configuration structure - */ -typedef struct -{ - uint32_t Filtering; /*!< One of @ref RIF_RISAF_FILTERING_MODE */ - uint32_t CID; /*!< One of @ref RIF_COMPARTMENT_ID */ - uint32_t SecPriv; /*!< A combination of @ref RIF_SEC_PRIV */ - uint32_t ReadWrite; /*!< A combination of @ref RIF_RISAF_READ_WRITE */ - uint32_t Lock; /*!< One of @ref RIF_LOCK_STATE */ - uint32_t StartAddress; /*!< Subregion start, address offset to the base address of the protected address space */ - uint32_t EndAddress; /*!< Subregion end, address offset to the base address of the protected address space */ -} RISAF_SubRegionConfig_t; - -/** - * @brief RISAF delegation structure - */ -typedef struct -{ - uint32_t Delegation; /*!< Enable or Disable */ - uint32_t DelegatedCID; /*!< One of @ref RIF_COMPARTMENT_ID */ -} RISAF_DelegationConfig_t; - -/** - * @brief RISAF illegal access detection structure - */ -/** - * @brief RISAF illegal access detection data structure - */ -typedef struct -{ - uint32_t CID; /*!< One of @ref RIF_COMPARTMENT_ID */ - uint32_t SecPriv; /*!< A combination of @ref RIF_SEC_PRIV */ - uint32_t AccessType; /*!< One of @ref RIF_ACCESS_TYPE */ - uint32_t Address; -} RISAF_IllegalAccessData_t; - -typedef struct -{ - uint32_t ErrorType; /*!< One of @ref RIF_RISAF_ILLEGAL_ACCESS */ - RISAF_IllegalAccessData_t Data; -} RISAF_IllegalAccess_t; - -/** - * @} - */ - -/* Private constants ---------------------------------------------------------*/ -/** @defgroup RIF_Private_Constants RIF Private Constants - * @{ - */ - -/** @defgroup RIF_REG_INDEX RIF register index definition - * @{ - */ -/* Composition definition for Peripheral identifier parameter (PeriphId) used in - * RIF RISC and IAC related functions. - * Bitmap Definition - * bits[31:28] define the register index a peripheral belongs to, value from 0 to 5. - * bits[4:0] define the bit position within the register, value from 0 to 31. - */ -#define RIF_PERIPH_REG_SHIFT 28U -#define RIF_PERIPH_REG 0xF0000000U -#define RIF_PERIPH_REG0 0x00000000U -#define RIF_PERIPH_REG1 0x10000000U -#define RIF_PERIPH_REG2 0x20000000U -#define RIF_PERIPH_REG3 0x30000000U -#define RIF_PERIPH_REG4 0x40000000U -#define RIF_PERIPH_REG5 0x50000000U -#define RIF_PERIPH_BIT_POSITION 0x0000001FU -/** - * @} - */ - -/** @defgroup RIF_MASK RIF register masks - * @{ - */ -#define RIF_CID_MASK 0x000000FFUL -#define RIF_ATTRIBUTE_MASK 0x00000003UL -#define RISAF_READ_WRITE_MASK (RISAF_READ_ENABLE | RISAF_WRITE_ENABLE) -/** - * @} - */ - -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/** @defgroup RIF_Private_Macros_Common RIF Private Macros - Common - * @{ - */ -#define IS_RIF_CID(__CID__) (((uint32_t)(__CID__) & ~RIF_CID_MASK) == 0x00U) - -#define IS_RIF_SINGLE_CID(__CID__) (((__CID__) == RIF_CID_0) || \ - ((__CID__) == RIF_CID_1) || \ - ((__CID__) == RIF_CID_2) || \ - ((__CID__) == RIF_CID_3) || \ - ((__CID__) == RIF_CID_4) || \ - ((__CID__) == RIF_CID_5) || \ - ((__CID__) == RIF_CID_6) || \ - ((__CID__) == RIF_CID_7)) - -#define IS_RIF_MASTER_CID(__CID__) (((uint32_t)(__CID__) != RIF_CID_7) && \ - (((uint32_t)(__CID__) & ~RIF_CID_MASK) == 0x00U)) - - -#if defined(NPU_PRESENT) -#define IS_RIF_MASTER_INDEX(__INDEX__) (((__INDEX__) == RIF_MASTER_INDEX_ETR) || \ - ((__INDEX__) == RIF_MASTER_INDEX_NPU) || \ - ((__INDEX__) == RIF_MASTER_INDEX_SDMMC1) || \ - ((__INDEX__) == RIF_MASTER_INDEX_SDMMC2) || \ - ((__INDEX__) == RIF_MASTER_INDEX_OTG1) || \ - ((__INDEX__) == RIF_MASTER_INDEX_OTG2) || \ - ((__INDEX__) == RIF_MASTER_INDEX_ETH1) || \ - ((__INDEX__) == RIF_MASTER_INDEX_GPU2D) || \ - ((__INDEX__) == RIF_MASTER_INDEX_DMA2D) || \ - ((__INDEX__) == RIF_MASTER_INDEX_DCMIPP) || \ - ((__INDEX__) == RIF_MASTER_INDEX_LTDC1) || \ - ((__INDEX__) == RIF_MASTER_INDEX_LTDC2) || \ - ((__INDEX__) == RIF_MASTER_INDEX_VENC)) -#else -#define IS_RIF_MASTER_INDEX(__INDEX__) (((__INDEX__) == RIF_MASTER_INDEX_ETR) || \ - ((__INDEX__) == RIF_MASTER_INDEX_SDMMC1) || \ - ((__INDEX__) == RIF_MASTER_INDEX_SDMMC2) || \ - ((__INDEX__) == RIF_MASTER_INDEX_OTG1) || \ - ((__INDEX__) == RIF_MASTER_INDEX_OTG2) || \ - ((__INDEX__) == RIF_MASTER_INDEX_ETH1) || \ - ((__INDEX__) == RIF_MASTER_INDEX_GPU2D) || \ - ((__INDEX__) == RIF_MASTER_INDEX_DMA2D) || \ - ((__INDEX__) == RIF_MASTER_INDEX_DCMIPP) || \ - ((__INDEX__) == RIF_MASTER_INDEX_LTDC1) || \ - ((__INDEX__) == RIF_MASTER_INDEX_LTDC2) || \ - ((__INDEX__) == RIF_MASTER_INDEX_VENC)) -#endif /* defined(NPU_PRESENT) */ - -#if !defined(NPU_PRESENT) && !defined(CRYP) -#define IS_RIF_RISC_PERIPH_INDEX(__INDEX__) (((__INDEX__) == RIF_RISC_PERIPH_INDEX_SPI1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_SPI2) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_SPI3) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_SPI4) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_SPI5) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_SPI6) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_SAI1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_SAI2) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_I2C1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_I2C2) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_I2C3) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_I2C4) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_I3C1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_I3C2) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_USART1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_USART2) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_USART3) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_UART4) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_UART5) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_USART6) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_UART7) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_UART8) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_UART9) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_USART10) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_LPUART1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_FDCAN1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM2) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM3) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM4) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM5) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM6) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM7) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM8) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM9) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM10) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM11) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM12) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM13) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM14) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM15) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM16) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM17) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM18) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_GFXTIM) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_LPTIM1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_LPTIM2) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_LPTIM3) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_LPTIM4) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_LPTIM5) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_ADF1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_MDF1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_SDMMC1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_SDMMC2) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_MDIOS) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_OTG1HS) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_OTG2HS) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_UCPD1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_ETH1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_SPDIFRX) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_SYSCFG) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_ADC12) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_VREFBUF) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_CRC) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_IWDG) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_WWDG) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_RNG) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_PKA) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_HASH) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_XSPI1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_XSPI2) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_XSPI3) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_XSPIM) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_FMC) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_CSI) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_DCMIPP) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_DCMI) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_JPEG) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_VENC) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_ICACHE) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_GPU2D) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_GFXMMU) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_DMA2D) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_LTDC) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_LTDCL1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_LTDCL2)) - -#define IS_RIF_RCC_PERIPH_INDEX(__INDEX__) (((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPDMA1) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_HPDMA1) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_RTC) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_AXISRAM1) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_AXISRAM2) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_FLEXRAM) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_CACHEAXIRAM) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_VENCRAM) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_AHBRAM1) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_AHBRAM2) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_BKPRAM) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPIOA) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPIOB) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPIOC) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPIOD) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPIOE) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPIOF) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPIOG) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPIOH) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPION) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPIOO) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPIOP) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPIOQ) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_DTS) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_MCO1) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_MCO2) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_XSPIPHYCOMP) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_XSPIPHY1) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_XSPIPHY2) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_HDP) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_RAMCFG)) - -#define IS_RIF_AWARE_PERIPH_INDEX(__INDEX__) (((__INDEX__) == RIF_AWARE_PERIPH_INDEX_CM55) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_EXTI) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_GPDMA1) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_HPDMA1) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RTC) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_TAMP) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_BSEC) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RCC) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_PWR) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_IAC) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF1) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF2) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF3) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF6) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF7) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF8) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF9) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF11) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF12) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF13) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF14) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF21) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF22) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF23) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RIFSC)) -#endif /* !defined(NPU_PRESENT) && !defined(CRYP) */ - -#if defined(NPU_PRESENT) && !defined(CRYP) -#define IS_RIF_RISC_PERIPH_INDEX(__INDEX__) (((__INDEX__) == RIF_RISC_PERIPH_INDEX_SPI1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_SPI2) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_SPI3) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_SPI4) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_SPI5) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_SPI6) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_SAI1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_SAI2) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_I2C1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_I2C2) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_I2C3) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_I2C4) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_I3C1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_I3C2) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_USART1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_USART2) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_USART3) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_UART4) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_UART5) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_USART6) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_UART7) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_UART8) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_UART9) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_USART10) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_LPUART1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_FDCAN1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM2) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM3) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM4) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM5) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM6) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM7) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM8) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM9) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM10) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM11) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM12) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM13) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM14) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM15) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM16) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM17) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM18) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_GFXTIM) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_LPTIM1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_LPTIM2) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_LPTIM3) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_LPTIM4) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_LPTIM5) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_ADF1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_MDF1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_SDMMC1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_SDMMC2) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_MDIOS) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_OTG1HS) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_OTG2HS) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_UCPD1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_ETH1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_SPDIFRX) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_SYSCFG) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_ADC12) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_VREFBUF) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_CRC) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_IWDG) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_WWDG) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_RNG) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_PKA) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_HASH) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_XSPI1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_XSPI2) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_XSPI3) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_XSPIM) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_FMC) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_CSI) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_DCMIPP) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_DCMI) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_JPEG) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_VENC) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_ICACHE) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_GPU2D) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_GFXMMU) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_DMA2D) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_LTDC) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_LTDCL1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_LTDCL2) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_NPU)) - -#define IS_RIF_RCC_PERIPH_INDEX(__INDEX__) (((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPDMA1) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_HPDMA1) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_RTC) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_AXISRAM1) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_AXISRAM2) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_FLEXRAM) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_CACHEAXIRAM) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_VENCRAM) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_CACHECONFIG) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_AHBRAM1) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_AHBRAM2) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_BKPRAM) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPIOA) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPIOB) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPIOC) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPIOD) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPIOE) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPIOF) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPIOG) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPIOH) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPION) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPIOO) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPIOP) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPIOQ) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_DTS) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_MCO1) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_MCO2) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_NPURAM0) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_NPURAM1) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_NPURAM2) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_NPURAM3) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_XSPIPHYCOMP) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_XSPIPHY1) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_XSPIPHY2) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_HDP) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_RAMCFG)) - -#define IS_RIF_AWARE_PERIPH_INDEX(__INDEX__) (((__INDEX__) == RIF_AWARE_PERIPH_INDEX_CM55) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_EXTI) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_GPDMA1) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_HPDMA1) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RTC) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_TAMP) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_BSEC) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RCC) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_PWR) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_IAC) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF1) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF2) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF3) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF4) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF5) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF6) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF7) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF8) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF9) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF11) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF12) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF13) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF14) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF15) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF21) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF22) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF23) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RIFSC)) -#endif /* defined(NPU_PRESENT) && !defined(CRYP) */ - -#if !defined(NPU_PRESENT) && defined(CRYP) -#define IS_RIF_RISC_PERIPH_INDEX(__INDEX__) (((__INDEX__) == RIF_RISC_PERIPH_INDEX_SPI1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_SPI2) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_SPI3) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_SPI4) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_SPI5) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_SPI6) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_SAI1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_SAI2) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_I2C1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_I2C2) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_I2C3) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_I2C4) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_I3C1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_I3C2) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_USART1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_USART2) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_USART3) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_UART4) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_UART5) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_USART6) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_UART7) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_UART8) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_UART9) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_USART10) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_LPUART1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_FDCAN1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM2) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM3) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM4) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM5) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM6) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM7) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM8) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM9) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM10) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM11) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM12) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM13) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM14) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM15) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM16) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM17) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM18) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_GFXTIM) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_LPTIM1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_LPTIM2) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_LPTIM3) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_LPTIM4) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_LPTIM5) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_ADF1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_MDF1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_SDMMC1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_SDMMC2) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_MDIOS) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_OTG1HS) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_OTG2HS) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_UCPD1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_ETH1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_SPDIFRX) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_SYSCFG) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_ADC12) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_VREFBUF) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_CRC) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_IWDG) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_WWDG) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_RNG) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_PKA) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_SAES) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_HASH) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_CRYP) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_MCE1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_MCE2) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_MCE3) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_MCE4) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_XSPI1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_XSPI2) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_XSPI3) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_XSPIM) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_FMC) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_CSI) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_DCMIPP) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_DCMI) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_JPEG) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_VENC) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_ICACHE) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_GPU2D) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_GFXMMU) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_DMA2D) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_LTDC) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_LTDCL1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_LTDCL2)) - -#define IS_RIF_RCC_PERIPH_INDEX(__INDEX__) (((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPDMA1) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_HPDMA1) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_RTC) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_AXISRAM1) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_AXISRAM2) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_FLEXRAM) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_CACHEAXIRAM) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_VENCRAM) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_AHBRAM1) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_AHBRAM2) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_BKPRAM) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPIOA) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPIOB) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPIOC) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPIOD) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPIOE) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPIOF) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPIOG) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPIOH) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPION) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPIOO) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPIOP) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPIOQ) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_DTS) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_MCO1) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_MCO2) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_XSPIPHYCOMP) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_XSPIPHY1) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_XSPIPHY2) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_HDP) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_RAMCFG)) - -#define IS_RIF_AWARE_PERIPH_INDEX(__INDEX__) (((__INDEX__) == RIF_AWARE_PERIPH_INDEX_CM55) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_EXTI) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_GPDMA1) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_HPDMA1) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RTC) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_TAMP) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_BSEC) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RCC) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_PWR) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_IAC) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF1) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF2) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF3) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF6) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF7) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF8) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF9) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF11) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF12) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF13) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF14) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF21) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF22) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF23) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RIFSC)) -#endif /* !defined(NPU_PRESENT) && defined(CRYP) */ - -#if defined(NPU_PRESENT) && defined(CRYP) -#define IS_RIF_RISC_PERIPH_INDEX(__INDEX__) (((__INDEX__) == RIF_RISC_PERIPH_INDEX_SPI1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_SPI2) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_SPI3) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_SPI4) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_SPI5) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_SPI6) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_SAI1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_SAI2) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_I2C1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_I2C2) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_I2C3) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_I2C4) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_I3C1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_I3C2) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_USART1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_USART2) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_USART3) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_UART4) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_UART5) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_USART6) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_UART7) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_UART8) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_UART9) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_USART10) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_LPUART1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_FDCAN1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM2) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM3) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM4) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM5) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM6) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM7) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM8) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM9) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM10) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM11) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM12) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM13) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM14) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM15) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM16) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM17) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_TIM18) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_GFXTIM) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_LPTIM1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_LPTIM2) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_LPTIM3) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_LPTIM4) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_LPTIM5) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_ADF1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_MDF1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_SDMMC1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_SDMMC2) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_MDIOS) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_OTG1HS) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_OTG2HS) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_UCPD1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_ETH1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_SPDIFRX) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_SYSCFG) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_ADC12) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_VREFBUF) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_CRC) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_IWDG) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_WWDG) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_RNG) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_PKA) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_SAES) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_HASH) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_CRYP) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_MCE1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_MCE2) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_MCE3) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_MCE4) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_XSPI1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_XSPI2) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_XSPI3) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_XSPIM) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_FMC) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_CSI) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_DCMIPP) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_DCMI) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_JPEG) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_VENC) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_ICACHE) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_GPU2D) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_GFXMMU) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_DMA2D) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_LTDC) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_LTDCL1) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_LTDCL2) || \ - ((__INDEX__) == RIF_RISC_PERIPH_INDEX_NPU)) - -#define IS_RIF_RCC_PERIPH_INDEX(__INDEX__) (((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPDMA1) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_HPDMA1) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_RTC) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_AXISRAM1) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_AXISRAM2) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_FLEXRAM) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_CACHEAXIRAM) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_VENCRAM) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_CACHECONFIG) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_AHBRAM1) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_AHBRAM2) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_BKPRAM) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPIOA) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPIOB) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPIOC) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPIOD) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPIOE) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPIOF) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPIOG) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPIOH) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPION) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPIOO) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPIOP) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_GPIOQ) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_DTS) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_MCO1) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_MCO2) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_NPURAM0) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_NPURAM1) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_NPURAM2) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_NPURAM3) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_XSPIPHYCOMP) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_XSPIPHY1) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_XSPIPHY2) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_HDP) || \ - ((__INDEX__) == RIF_RCC_PERIPH_INDEX_RAMCFG)) - -#define IS_RIF_AWARE_PERIPH_INDEX(__INDEX__) (((__INDEX__) == RIF_AWARE_PERIPH_INDEX_CM55) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_EXTI) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_GPDMA1) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_HPDMA1) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RTC) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_TAMP) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_BSEC) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RCC) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_PWR) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_IAC) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF1) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF2) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF3) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF4) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF5) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF6) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF7) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF8) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF9) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF11) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF12) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF13) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF14) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF15) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF21) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF22) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RISAF23) || \ - ((__INDEX__) == RIF_AWARE_PERIPH_INDEX_RIFSC)) -#endif /* defined(NPU_PRESENT) && defined(CRYP) */ - -#define IS_RIF_SEC_PRIV_ATTRIBUTE(__ATTRIBUTE__) (((uint32_t)(__ATTRIBUTE__) & ~RIF_ATTRIBUTE_MASK) == 0x00U) - -#define IS_RIF_ACCESS_TYPE(__ACCTYPE__) (((__ACCTYPE__) == RIF_ACCTYPE_READ_FETCH) || \ - ((__ACCTYPE__) == RIF_ACCTYPE_WRITE)) - -#define IS_RIF_LOCK_STATE(__LOCK__) (((__LOCK__) == RIF_LOCK_DISABLE) || \ - ((__LOCK__) == RIF_LOCK_ENABLE)) -/** - * @} - */ - -/** @defgroup RIF_Private_Macros_RISAF RIF Private Macros - RISAF - * @{ - */ - -#if !defined(NPU_PRESENT) -#define IS_RISAF_INSTANCE(__INSTANCE__) (((__INSTANCE__) == RISAF1) || \ - ((__INSTANCE__) == RISAF2) || \ - ((__INSTANCE__) == RISAF3) || \ - ((__INSTANCE__) == RISAF6) || \ - ((__INSTANCE__) == RISAF7) || \ - ((__INSTANCE__) == RISAF8) || \ - ((__INSTANCE__) == RISAF9) || \ - ((__INSTANCE__) == RISAF11) || \ - ((__INSTANCE__) == RISAF12) || \ - ((__INSTANCE__) == RISAF13) || \ - ((__INSTANCE__) == RISAF14) || \ - ((__INSTANCE__) == RISAF21) || \ - ((__INSTANCE__) == RISAF22) || \ - ((__INSTANCE__) == RISAF23)) -#else -#define IS_RISAF_INSTANCE(__INSTANCE__) (((__INSTANCE__) == RISAF1) || \ - ((__INSTANCE__) == RISAF2) || \ - ((__INSTANCE__) == RISAF3) || \ - ((__INSTANCE__) == RISAF4) || \ - ((__INSTANCE__) == RISAF5) || \ - ((__INSTANCE__) == RISAF6) || \ - ((__INSTANCE__) == RISAF7) || \ - ((__INSTANCE__) == RISAF8) || \ - ((__INSTANCE__) == RISAF9) || \ - ((__INSTANCE__) == RISAF11) || \ - ((__INSTANCE__) == RISAF12) || \ - ((__INSTANCE__) == RISAF13) || \ - ((__INSTANCE__) == RISAF14) || \ - ((__INSTANCE__) == RISAF15) || \ - ((__INSTANCE__) == RISAF21) || \ - ((__INSTANCE__) == RISAF22) || \ - ((__INSTANCE__) == RISAF23)) -#endif /* !defined(NPU_PRESENT) */ - -#define IS_RISAF_REGION(__REGION__) (((__REGION__) == RISAF_REGION_1) || \ - ((__REGION__) == RISAF_REGION_2) || \ - ((__REGION__) == RISAF_REGION_3) || \ - ((__REGION__) == RISAF_REGION_4) || \ - ((__REGION__) == RISAF_REGION_5) || \ - ((__REGION__) == RISAF_REGION_6) || \ - ((__REGION__) == RISAF_REGION_7) || \ - ((__REGION__) == RISAF_REGION_8) || \ - ((__REGION__) == RISAF_REGION_9) || \ - ((__REGION__) == RISAF_REGION_10) || \ - ((__REGION__) == RISAF_REGION_11) || \ - ((__REGION__) == RISAF_REGION_12) || \ - ((__REGION__) == RISAF_REGION_13) || \ - ((__REGION__) == RISAF_REGION_14) || \ - ((__REGION__) == RISAF_REGION_15)) - -#if !defined(NPU_PRESENT) -#define IS_RISAF_MAX_REGION(__INSTANCE__, __REGION__) (((__INSTANCE__) == RISAF1) ? ((__REGION__) <= RISAF_REGION_7) : \ - ((__INSTANCE__) == RISAF2) ? ((__REGION__) <= RISAF_REGION_7) : \ - ((__INSTANCE__) == RISAF3) ? ((__REGION__) <= RISAF_REGION_7) : \ - ((__INSTANCE__) == RISAF6) ? ((__REGION__) <= RISAF_REGION_11) : \ - ((__INSTANCE__) == RISAF7) ? ((__REGION__) <= RISAF_REGION_7) : \ - ((__INSTANCE__) == RISAF8) ? ((__REGION__) <= RISAF_REGION_7) : \ - ((__INSTANCE__) == RISAF9) ? ((__REGION__) <= RISAF_REGION_7) : \ - ((__INSTANCE__) == RISAF11) ? ((__REGION__) <= RISAF_REGION_7) : \ - ((__INSTANCE__) == RISAF12) ? ((__REGION__) <= RISAF_REGION_7) : \ - ((__INSTANCE__) == RISAF13) ? ((__REGION__) <= RISAF_REGION_7) : \ - ((__INSTANCE__) == RISAF14) ? ((__REGION__) <= RISAF_REGION_7) : \ - ((__INSTANCE__) == RISAF21) ? ((__REGION__) <= RISAF_REGION_7) : \ - ((__INSTANCE__) == RISAF22) ? ((__REGION__) <= RISAF_REGION_7) : \ - ((__REGION__) <= RISAF_REGION_3)) -#else -#define IS_RISAF_MAX_REGION(__INSTANCE__, __REGION__) (((__INSTANCE__) == RISAF1) ? ((__REGION__) <= RISAF_REGION_7) : \ - ((__INSTANCE__) == RISAF2) ? ((__REGION__) <= RISAF_REGION_7) : \ - ((__INSTANCE__) == RISAF3) ? ((__REGION__) <= RISAF_REGION_7) : \ - ((__INSTANCE__) == RISAF4) ? ((__REGION__) <= RISAF_REGION_11) : \ - ((__INSTANCE__) == RISAF5) ? ((__REGION__) <= RISAF_REGION_11) : \ - ((__INSTANCE__) == RISAF6) ? ((__REGION__) <= RISAF_REGION_11) : \ - ((__INSTANCE__) == RISAF7) ? ((__REGION__) <= RISAF_REGION_7) : \ - ((__INSTANCE__) == RISAF8) ? ((__REGION__) <= RISAF_REGION_7) : \ - ((__INSTANCE__) == RISAF9) ? ((__REGION__) <= RISAF_REGION_7) : \ - ((__INSTANCE__) == RISAF11) ? ((__REGION__) <= RISAF_REGION_7) : \ - ((__INSTANCE__) == RISAF12) ? ((__REGION__) <= RISAF_REGION_7) : \ - ((__INSTANCE__) == RISAF13) ? ((__REGION__) <= RISAF_REGION_7) : \ - ((__INSTANCE__) == RISAF14) ? ((__REGION__) <= RISAF_REGION_7) : \ - ((__INSTANCE__) == RISAF15) ? ((__REGION__) <= RISAF_REGION_2) : \ - ((__INSTANCE__) == RISAF21) ? ((__REGION__) <= RISAF_REGION_7) : \ - ((__INSTANCE__) == RISAF22) ? ((__REGION__) <= RISAF_REGION_7) : \ - ((__REGION__) <= RISAF_REGION_3)) -#endif /* !defined(NPU_PRESENT) */ - -#if !defined(NPU_PRESENT) -#define IS_RISAF_GRANULARITY(__INSTANCE__, __ADDRESS__) ((((__INSTANCE__) == RISAF1) ? ((__ADDRESS__) % RISAF1_GRANULARITY) : \ - ((__INSTANCE__) == RISAF2) ? ((__ADDRESS__) % RISAF2_GRANULARITY) : \ - ((__INSTANCE__) == RISAF3) ? ((__ADDRESS__) % RISAF3_GRANULARITY) : \ - ((__INSTANCE__) == RISAF6) ? ((__ADDRESS__) % RISAF6_GRANULARITY) : \ - ((__INSTANCE__) == RISAF7) ? ((__ADDRESS__) % RISAF7_GRANULARITY) : \ - ((__INSTANCE__) == RISAF8) ? ((__ADDRESS__) % RISAF8_GRANULARITY) : \ - ((__INSTANCE__) == RISAF9) ? ((__ADDRESS__) % RISAF9_GRANULARITY) : \ - ((__INSTANCE__) == RISAF11) ? ((__ADDRESS__) % RISAF11_GRANULARITY) : \ - ((__INSTANCE__) == RISAF12) ? ((__ADDRESS__) % RISAF12_GRANULARITY) : \ - ((__INSTANCE__) == RISAF13) ? ((__ADDRESS__) % RISAF13_GRANULARITY) : \ - ((__INSTANCE__) == RISAF14) ? ((__ADDRESS__) % RISAF14_GRANULARITY) : \ - ((__INSTANCE__) == RISAF21) ? ((__ADDRESS__) % RISAF21_GRANULARITY) : \ - ((__INSTANCE__) == RISAF22) ? ((__ADDRESS__) % RISAF22_GRANULARITY) : \ - ((__ADDRESS__) % RISAF23_GRANULARITY)) == 0x00U) -#else -#define IS_RISAF_GRANULARITY(__INSTANCE__, __ADDRESS__) ((((__INSTANCE__) == RISAF1) ? ((__ADDRESS__) % RISAF1_GRANULARITY) : \ - ((__INSTANCE__) == RISAF2) ? ((__ADDRESS__) % RISAF2_GRANULARITY) : \ - ((__INSTANCE__) == RISAF3) ? ((__ADDRESS__) % RISAF3_GRANULARITY) : \ - ((__INSTANCE__) == RISAF4) ? ((__ADDRESS__) % RISAF4_GRANULARITY) : \ - ((__INSTANCE__) == RISAF5) ? ((__ADDRESS__) % RISAF5_GRANULARITY) : \ - ((__INSTANCE__) == RISAF6) ? ((__ADDRESS__) % RISAF6_GRANULARITY) : \ - ((__INSTANCE__) == RISAF7) ? ((__ADDRESS__) % RISAF7_GRANULARITY) : \ - ((__INSTANCE__) == RISAF8) ? ((__ADDRESS__) % RISAF8_GRANULARITY) : \ - ((__INSTANCE__) == RISAF9) ? ((__ADDRESS__) % RISAF9_GRANULARITY) : \ - ((__INSTANCE__) == RISAF11) ? ((__ADDRESS__) % RISAF11_GRANULARITY) : \ - ((__INSTANCE__) == RISAF12) ? ((__ADDRESS__) % RISAF12_GRANULARITY) : \ - ((__INSTANCE__) == RISAF13) ? ((__ADDRESS__) % RISAF13_GRANULARITY) : \ - ((__INSTANCE__) == RISAF14) ? ((__ADDRESS__) % RISAF14_GRANULARITY) : \ - ((__INSTANCE__) == RISAF15) ? ((__ADDRESS__) % RISAF15_GRANULARITY) : \ - ((__INSTANCE__) == RISAF21) ? ((__ADDRESS__) % RISAF21_GRANULARITY) : \ - ((__INSTANCE__) == RISAF22) ? ((__ADDRESS__) % RISAF22_GRANULARITY) : \ - ((__ADDRESS__) % RISAF23_GRANULARITY)) == 0x00U) -#endif /* !defined(NPU_PRESENT) */ - -#if !defined(NPU_PRESENT) -#define IS_RISAF_LIMIT_ADDRESS_SPACE_SIZE(__INSTANCE__, __ADDRESS__) ((((__INSTANCE__) == RISAF1) && ((__ADDRESS__) < (RISAF1_LIMIT_ADDRESS_SPACE_SIZE + 1U))) || \ - (((__INSTANCE__) == RISAF2) && ((__ADDRESS__) < (RISAF2_LIMIT_ADDRESS_SPACE_SIZE + 1U))) || \ - (((__INSTANCE__) == RISAF3) && ((__ADDRESS__) < (RISAF3_LIMIT_ADDRESS_SPACE_SIZE + 1U))) || \ - ((__INSTANCE__) == RISAF6) || \ - (((__INSTANCE__) == RISAF7) && ((__ADDRESS__) < (RISAF7_LIMIT_ADDRESS_SPACE_SIZE + 1U))) || \ - (((__INSTANCE__) == RISAF8) && ((__ADDRESS__) < (RISAF8_LIMIT_ADDRESS_SPACE_SIZE + 1U))) || \ - (((__INSTANCE__) == RISAF9) && ((__ADDRESS__) < (RISAF9_LIMIT_ADDRESS_SPACE_SIZE + 1U))) || \ - (((__INSTANCE__) == RISAF11) && ((__ADDRESS__) < (RISAF11_LIMIT_ADDRESS_SPACE_SIZE + 1U))) || \ - (((__INSTANCE__) == RISAF12) && ((__ADDRESS__) < (RISAF12_LIMIT_ADDRESS_SPACE_SIZE + 1U))) || \ - (((__INSTANCE__) == RISAF13) && ((__ADDRESS__) < (RISAF13_LIMIT_ADDRESS_SPACE_SIZE + 1U))) || \ - (((__INSTANCE__) == RISAF14) && ((__ADDRESS__) < (RISAF14_LIMIT_ADDRESS_SPACE_SIZE + 1U))) || \ - (((__INSTANCE__) == RISAF21) && ((__ADDRESS__) < (RISAF21_LIMIT_ADDRESS_SPACE_SIZE + 1U))) || \ - (((__INSTANCE__) == RISAF22) && ((__ADDRESS__) < (RISAF22_LIMIT_ADDRESS_SPACE_SIZE + 1U))) || \ - (((__INSTANCE__) == RISAF23) && ((__ADDRESS__) < (RISAF23_LIMIT_ADDRESS_SPACE_SIZE + 1U)))) -#else -#define IS_RISAF_LIMIT_ADDRESS_SPACE_SIZE(__INSTANCE__, __ADDRESS__) ((((__INSTANCE__) == RISAF1) && ((__ADDRESS__) < (RISAF1_LIMIT_ADDRESS_SPACE_SIZE + 1U))) || \ - (((__INSTANCE__) == RISAF2) && ((__ADDRESS__) < (RISAF2_LIMIT_ADDRESS_SPACE_SIZE + 1U))) || \ - (((__INSTANCE__) == RISAF3) && ((__ADDRESS__) < (RISAF3_LIMIT_ADDRESS_SPACE_SIZE + 1U))) || \ - ((__INSTANCE__) == RISAF4) || \ - ((__INSTANCE__) == RISAF5) || \ - ((__INSTANCE__) == RISAF6) || \ - (((__INSTANCE__) == RISAF7) && ((__ADDRESS__) < (RISAF7_LIMIT_ADDRESS_SPACE_SIZE + 1U))) || \ - (((__INSTANCE__) == RISAF8) && ((__ADDRESS__) < (RISAF8_LIMIT_ADDRESS_SPACE_SIZE + 1U))) || \ - (((__INSTANCE__) == RISAF9) && ((__ADDRESS__) < (RISAF9_LIMIT_ADDRESS_SPACE_SIZE + 1U))) || \ - (((__INSTANCE__) == RISAF11) && ((__ADDRESS__) < (RISAF11_LIMIT_ADDRESS_SPACE_SIZE + 1U))) || \ - (((__INSTANCE__) == RISAF12) && ((__ADDRESS__) < (RISAF12_LIMIT_ADDRESS_SPACE_SIZE + 1U))) || \ - (((__INSTANCE__) == RISAF13) && ((__ADDRESS__) < (RISAF13_LIMIT_ADDRESS_SPACE_SIZE + 1U))) || \ - (((__INSTANCE__) == RISAF14) && ((__ADDRESS__) < (RISAF14_LIMIT_ADDRESS_SPACE_SIZE + 1U))) || \ - (((__INSTANCE__) == RISAF15) && ((__ADDRESS__) < (RISAF15_LIMIT_ADDRESS_SPACE_SIZE + 1U))) || \ - (((__INSTANCE__) == RISAF21) && ((__ADDRESS__) < (RISAF21_LIMIT_ADDRESS_SPACE_SIZE + 1U))) || \ - (((__INSTANCE__) == RISAF22) && ((__ADDRESS__) < (RISAF22_LIMIT_ADDRESS_SPACE_SIZE + 1U))) || \ - (((__INSTANCE__) == RISAF23) && ((__ADDRESS__) < (RISAF23_LIMIT_ADDRESS_SPACE_SIZE + 1U)))) -#endif /* !defined(NPU_PRESENT) */ - -#define IS_RISAF_SUBREGION(__SUBREGION__) (((__SUBREGION__) == RISAF_SUBREGION_A) || \ - ((__SUBREGION__) == RISAF_SUBREGION_B)) - -#define IS_RISAF_FILTERING(__FILTERING__) (((__FILTERING__) == RISAF_FILTER_DISABLE) || \ - ((__FILTERING__) == RISAF_FILTER_ENABLE)) - -#define IS_RISAF_DELEGATION(__DELEGATION__) (((__DELEGATION__) == RISAF_DELEGATION_DISABLE) || \ - ((__DELEGATION__) == RISAF_DELEGATION_ENABLE)) - - -#define IS_RISAF_READ_WRITE(__RW__) (((uint32_t)(__RW__) == RISAF_READ_DISABLE) || \ - (((uint32_t)(__RW__) & ~RISAF_READ_WRITE_MASK) == 0x00U)) -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ -/** @defgroup RIF_Exported_Functions RIF Exported Functions - * @{ - */ -/** @defgroup RIF_Exported_Functions_Group1 RIMC Configuration functions - * @{ - */ -#if defined(CPU_AS_TRUSTED_DOMAIN) -void HAL_RIF_RIMC_Lock(void); -#endif /* CPU_AS_TRUSTED_DOMAIN */ -uint32_t HAL_RIF_RIMC_GetLock(void); -#if defined(CPU_AS_TRUSTED_DOMAIN) -void HAL_RIF_RIMC_SetDebugAccessPortCID(uint32_t CID); -#endif /* CPU_AS_TRUSTED_DOMAIN */ -uint32_t HAL_RIF_RIMC_GetDebugAccessPortCID(void); -#if defined(CPU_AS_TRUSTED_DOMAIN) -void HAL_RIF_RIMC_ConfigMasterAttributes(uint32_t MasterId, const RIMC_MasterConfig_t *pConfig); -void HAL_RIF_RIMC_GetConfigMasterAttributes(uint32_t MasterId, RIMC_MasterConfig_t *pConfig); -#endif /* CPU_AS_TRUSTED_DOMAIN */ -/** - * @} - */ - -/** @defgroup RIF_Exported_Functions_Group2 RIFSC Configuration functions - * @{ - */ -#if defined(CPU_AS_TRUSTED_DOMAIN) -void HAL_RIF_RISC_Lock(void); -#endif /* CPU_AS_TRUSTED_DOMAIN */ -uint32_t HAL_RIF_RISC_GetLock(void); -void HAL_RIF_RISC_SetSlaveSecureAttributes(uint32_t PeriphId, uint32_t SecPriv); -uint32_t HAL_RIF_RISC_GetSlaveSecureAttributes(uint32_t PeriphId); -void HAL_RIF_RISC_SlaveConfigLock(uint32_t PeriphId); -uint32_t HAL_RIF_RISC_GetSlaveConfigLock(uint32_t PeriphId); -/** - * @} - */ - -/** @defgroup RIF_Exported_Functions_Group4 RISAF Configuration functions - * @{ - */ -#if defined(CPU_AS_TRUSTED_DOMAIN) -void HAL_RIF_RISAF_Lock(RISAF_TypeDef *RISAFx); -#endif /* CPU_AS_TRUSTED_DOMAIN */ -uint32_t HAL_RIF_RISAF_GetLock(const RISAF_TypeDef *RISAFx); -#if defined(CPU_AS_TRUSTED_DOMAIN) -void HAL_RIF_RISAF_ConfigBaseRegion(RISAF_TypeDef *RISAFx, uint32_t Region, - const RISAF_BaseRegionConfig_t *pConfig); -#endif /* CPU_AS_TRUSTED_DOMAIN */ -void HAL_RIF_RISAF_GetConfigBaseRegion(const RISAF_TypeDef *RISAFx, uint32_t Region, - RISAF_BaseRegionConfig_t *pConfig); -#if defined(CPU_AS_TRUSTED_DOMAIN) -void HAL_RIF_RISAF_ConfigSubRegionDelegation(RISAF_TypeDef *RISAFx, uint32_t Region, uint32_t SubRegion, - const RISAF_DelegationConfig_t *pConfig); -#endif /* CPU_AS_TRUSTED_DOMAIN */ -void HAL_RIF_RISAF_GetConfigSubRegionDelegation(const RISAF_TypeDef *RISAFx, uint32_t Region, uint32_t SubRegion, - RISAF_DelegationConfig_t *pConfig); -#if defined(CPU_AS_TRUSTED_DOMAIN) -void HAL_RIF_RISAF_ConfigSubRegion(RISAF_TypeDef *RISAFx, uint32_t Region, uint32_t SubRegion, - const RISAF_SubRegionConfig_t *pConfig); -#endif /* CPU_AS_TRUSTED_DOMAIN */ -void HAL_RIF_RISAF_GetConfigSubRegion(const RISAF_TypeDef *RISAFx, uint32_t Region, uint32_t SubRegion, - RISAF_SubRegionConfig_t *pConfig); -#if defined(CPU_AS_TRUSTED_DOMAIN) -void HAL_RIF_RISAF_GetIllegalAccess(RISAF_TypeDef *RISAFx, RISAF_IllegalAccess_t *IllegalAccess); -#endif /* CPU_AS_TRUSTED_DOMAIN */ -/** - * @} - */ - -/** @defgroup RIF_Exported_Functions_Group6 IAC Configuration functions - * @{ - */ -#if defined(CPU_AS_TRUSTED_DOMAIN) && defined(CPU_IN_SECURE_STATE) -void HAL_RIF_IAC_EnableIT(uint32_t PeriphId); -void HAL_RIF_IAC_DisableIT(uint32_t PeriphId); -uint32_t HAL_RIF_IAC_GetFlag(uint32_t PeriphId); -void HAL_RIF_IAC_ClearFlag(uint32_t PeriphId); -void HAL_RIF_IRQHandler(void); -void HAL_RIF_ILA_Callback(uint32_t PeriphId); -#endif /* CPU_AS_TRUSTED_DOMAIN && CPU_IN_SECURE_STATE */ -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* STM32N6xx_HAL_RIF_H */ - Index: trunk/firmware/FSBL/CubeMX/Drivers/STM32N6xx_HAL_Driver/Inc/stm32n6xx_hal_sd.h =================================================================== --- trunk/firmware/FSBL/CubeMX/Drivers/STM32N6xx_HAL_Driver/Inc/stm32n6xx_hal_sd.h (revision 37) +++ (revision ) @@ -1,798 +1,0 @@ -/** - ****************************************************************************** - * @file stm32n6xx_hal_sd.h - * @author MCD Application Team - * @brief Header file of SD HAL module. - ****************************************************************************** - * @attention - * - * Copyright (c) 2023 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef STM32N6xx_HAL_SD_H -#define STM32N6xx_HAL_SD_H - -#ifdef __cplusplus -extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32n6xx_ll_sdmmc.h" -#if defined (DLYB_SDMMC1) || defined (DLYB_SDMMC2) || defined (DLYB_SDMMC3) -#include "stm32n6xx_ll_dlyb.h" -#endif /* (DLYB_SDMMC1) || (DLYB_SDMMC2) */ - -/** @addtogroup STM32N6xx_HAL_Driver - * @{ - */ -#if defined (SDMMC1) || defined (SDMMC2) - -/** @defgroup SD SD - * @brief SD HAL module driver - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup SD_Exported_Types SD Exported Types - * @{ - */ - -/** @defgroup SD_Exported_Types_Group1 SD State enumeration structure - * @{ - */ -typedef enum -{ - HAL_SD_STATE_RESET = ((uint32_t)0x00000000U), /*!< SD not yet initialized or disabled */ - HAL_SD_STATE_READY = ((uint32_t)0x00000001U), /*!< SD initialized and ready for use */ - HAL_SD_STATE_TIMEOUT = ((uint32_t)0x00000002U), /*!< SD Timeout state */ - HAL_SD_STATE_BUSY = ((uint32_t)0x00000003U), /*!< SD process ongoing */ - HAL_SD_STATE_PROGRAMMING = ((uint32_t)0x00000004U), /*!< SD Programming State */ - HAL_SD_STATE_RECEIVING = ((uint32_t)0x00000005U), /*!< SD Receiving State */ - HAL_SD_STATE_TRANSFER = ((uint32_t)0x00000006U), /*!< SD Transfer State */ - HAL_SD_STATE_ERROR = ((uint32_t)0x0000000FU) /*!< SD is in error state */ -} HAL_SD_StateTypeDef; -/** - * @} - */ - -/** @defgroup SD_Exported_Types_Group2 SD Card State enumeration structure - * @{ - */ -typedef uint32_t HAL_SD_CardStateTypeDef; - -#define HAL_SD_CARD_READY 0x00000001U /*!< Card state is ready */ -#define HAL_SD_CARD_IDENTIFICATION 0x00000002U /*!< Card is in identification state */ -#define HAL_SD_CARD_STANDBY 0x00000003U /*!< Card is in standby state */ -#define HAL_SD_CARD_TRANSFER 0x00000004U /*!< Card is in transfer state */ -#define HAL_SD_CARD_SENDING 0x00000005U /*!< Card is sending an operation */ -#define HAL_SD_CARD_RECEIVING 0x00000006U /*!< Card is receiving operation information */ -#define HAL_SD_CARD_PROGRAMMING 0x00000007U /*!< Card is in programming state */ -#define HAL_SD_CARD_DISCONNECTED 0x00000008U /*!< Card is disconnected */ -#define HAL_SD_CARD_ERROR 0x000000FFU /*!< Card response Error */ -/** - * @} - */ - -/** @defgroup SD_Exported_Types_Group3 SD Handle Structure definition - * @{ - */ -#define SD_InitTypeDef SDMMC_InitTypeDef -#define SD_TypeDef SDMMC_TypeDef - -/** - * @brief SD Card Information Structure definition - */ -typedef struct -{ - uint32_t CardType; /*!< Specifies the card Type */ - - uint32_t CardVersion; /*!< Specifies the card version */ - - uint32_t Class; /*!< Specifies the class of the card class */ - - uint32_t RelCardAdd; /*!< Specifies the Relative Card Address */ - - uint32_t BlockNbr; /*!< Specifies the Card Capacity in blocks */ - - uint32_t BlockSize; /*!< Specifies one block size in bytes */ - - uint32_t LogBlockNbr; /*!< Specifies the Card logical Capacity in blocks */ - - uint32_t LogBlockSize; /*!< Specifies logical block size in bytes */ - - uint32_t CardSpeed; /*!< Specifies the card Speed */ - -} HAL_SD_CardInfoTypeDef; - -/** - * @brief SD handle Structure definition - */ -#if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U) -typedef struct __SD_HandleTypeDef -#else -typedef struct -#endif /* USE_HAL_SD_REGISTER_CALLBACKS */ -{ - SD_TypeDef *Instance; /*!< SD registers base address */ - - SD_InitTypeDef Init; /*!< SD required parameters */ - - HAL_LockTypeDef Lock; /*!< SD locking object */ - - const uint8_t *pTxBuffPtr; /*!< Pointer to SD Tx transfer Buffer */ - - uint32_t TxXferSize; /*!< SD Tx Transfer size */ - - uint8_t *pRxBuffPtr; /*!< Pointer to SD Rx transfer Buffer */ - - uint32_t RxXferSize; /*!< SD Rx Transfer size */ - - __IO uint32_t Context; /*!< SD transfer context */ - - __IO HAL_SD_StateTypeDef State; /*!< SD card State */ - - __IO uint32_t ErrorCode; /*!< SD Card Error codes */ - - HAL_SD_CardInfoTypeDef SdCard; /*!< SD Card information */ - - uint32_t CSD[4]; /*!< SD card specific data table */ - - uint32_t CID[4]; /*!< SD card identification number table */ - -#if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U) - void (* TxCpltCallback)(struct __SD_HandleTypeDef *hsd); - void (* RxCpltCallback)(struct __SD_HandleTypeDef *hsd); - void (* ErrorCallback)(struct __SD_HandleTypeDef *hsd); - void (* AbortCpltCallback)(struct __SD_HandleTypeDef *hsd); - void (* Read_DMALnkLstBufCpltCallback)(struct __SD_HandleTypeDef *hsd); - void (* Write_DMALnkLstBufCpltCallback)(struct __SD_HandleTypeDef *hsd); -#if (USE_SD_TRANSCEIVER != 0U) - void (* DriveTransceiver_1_8V_Callback)(FlagStatus status); -#endif /* USE_SD_TRANSCEIVER */ - - void (* MspInitCallback)(struct __SD_HandleTypeDef *hsd); - void (* MspDeInitCallback)(struct __SD_HandleTypeDef *hsd); -#endif /* USE_HAL_SD_REGISTER_CALLBACKS */ -} SD_HandleTypeDef; - -/** - * @} - */ - -/** @defgroup SD_Exported_Types_Group4 Card Specific Data: CSD Register - * @{ - */ -typedef struct -{ - __IO uint8_t CSDStruct; /*!< CSD structure */ - __IO uint8_t SysSpecVersion; /*!< System specification version */ - __IO uint8_t Reserved1; /*!< Reserved */ - __IO uint8_t TAAC; /*!< Data read access time 1 */ - __IO uint8_t NSAC; /*!< Data read access time 2 in CLK cycles */ - __IO uint8_t MaxBusClkFrec; /*!< Max. bus clock frequency */ - __IO uint16_t CardComdClasses; /*!< Card command classes */ - __IO uint8_t RdBlockLen; /*!< Max. read data block length */ - __IO uint8_t PartBlockRead; /*!< Partial blocks for read allowed */ - __IO uint8_t WrBlockMisalign; /*!< Write block misalignment */ - __IO uint8_t RdBlockMisalign; /*!< Read block misalignment */ - __IO uint8_t DSRImpl; /*!< DSR implemented */ - __IO uint8_t Reserved2; /*!< Reserved */ - __IO uint32_t DeviceSize; /*!< Device Size */ - __IO uint8_t MaxRdCurrentVDDMin; /*!< Max. read current @ VDD min */ - __IO uint8_t MaxRdCurrentVDDMax; /*!< Max. read current @ VDD max */ - __IO uint8_t MaxWrCurrentVDDMin; /*!< Max. write current @ VDD min */ - __IO uint8_t MaxWrCurrentVDDMax; /*!< Max. write current @ VDD max */ - __IO uint8_t DeviceSizeMul; /*!< Device size multiplier */ - __IO uint8_t EraseGrSize; /*!< Erase group size */ - __IO uint8_t EraseGrMul; /*!< Erase group size multiplier */ - __IO uint8_t WrProtectGrSize; /*!< Write protect group size */ - __IO uint8_t WrProtectGrEnable; /*!< Write protect group enable */ - __IO uint8_t ManDeflECC; /*!< Manufacturer default ECC */ - __IO uint8_t WrSpeedFact; /*!< Write speed factor */ - __IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */ - __IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */ - __IO uint8_t Reserved3; /*!< Reserved */ - __IO uint8_t ContentProtectAppli; /*!< Content protection application */ - __IO uint8_t FileFormatGroup; /*!< File format group */ - __IO uint8_t CopyFlag; /*!< Copy flag (OTP) */ - __IO uint8_t PermWrProtect; /*!< Permanent write protection */ - __IO uint8_t TempWrProtect; /*!< Temporary write protection */ - __IO uint8_t FileFormat; /*!< File format */ - __IO uint8_t ECC; /*!< ECC code */ - __IO uint8_t CSD_CRC; /*!< CSD CRC */ - __IO uint8_t Reserved4; /*!< Always 1 */ -} HAL_SD_CardCSDTypeDef; -/** - * @} - */ - -/** @defgroup SD_Exported_Types_Group5 Card Identification Data: CID Register - * @{ - */ -typedef struct -{ - __IO uint8_t ManufacturerID; /*!< Manufacturer ID */ - __IO uint16_t OEM_AppliID; /*!< OEM/Application ID */ - __IO uint32_t ProdName1; /*!< Product Name part1 */ - __IO uint8_t ProdName2; /*!< Product Name part2 */ - __IO uint8_t ProdRev; /*!< Product Revision */ - __IO uint32_t ProdSN; /*!< Product Serial Number */ - __IO uint8_t Reserved1; /*!< Reserved1 */ - __IO uint16_t ManufactDate; /*!< Manufacturing Date */ - __IO uint8_t CID_CRC; /*!< CID CRC */ - __IO uint8_t Reserved2; /*!< Always 1 */ - -} HAL_SD_CardCIDTypeDef; -/** - * @} - */ - -/** @defgroup SD_Exported_Types_Group6 SD Card Status returned by ACMD13 - * @{ - */ -typedef struct -{ - __IO uint8_t DataBusWidth; /*!< Shows the currently defined data bus width */ - __IO uint8_t SecuredMode; /*!< Card is in secured mode of operation */ - __IO uint16_t CardType; /*!< Carries information about card type */ - __IO uint32_t ProtectedAreaSize; /*!< Carries information about the capacity of protected area */ - __IO uint8_t SpeedClass; /*!< Carries information about the speed class of the card */ - __IO uint8_t PerformanceMove; /*!< Carries information about the card's performance move */ - __IO uint8_t AllocationUnitSize; /*!< Carries information about the card's allocation unit size */ - __IO uint16_t EraseSize; /*!< Determines the number of AUs to be erased in one operation */ - __IO uint8_t EraseTimeout; /*!< Determines the timeout for any number of AU erase */ - __IO uint8_t EraseOffset; /*!< Carries information about the erase offset */ - __IO uint8_t UhsSpeedGrade; /*!< Carries information about the speed grade of UHS card */ - __IO uint8_t UhsAllocationUnitSize; /*!< Carries information about the UHS card's allocation unit size */ - __IO uint8_t VideoSpeedClass; /*!< Carries information about the Video Speed Class of UHS card */ -} HAL_SD_CardStatusTypeDef; -/** - * @} - */ - -#if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U) -/** @defgroup SD_Exported_Types_Group7 SD Callback ID enumeration definition - * @{ - */ -typedef enum -{ - HAL_SD_TX_CPLT_CB_ID = 0x00U, /*!< SD Tx Complete Callback ID */ - HAL_SD_RX_CPLT_CB_ID = 0x01U, /*!< SD Rx Complete Callback ID */ - HAL_SD_ERROR_CB_ID = 0x02U, /*!< SD Error Callback ID */ - HAL_SD_ABORT_CB_ID = 0x03U, /*!< SD Abort Callback ID */ - HAL_SD_READ_DMA_LNKLST_BUF_CPLT_CB_ID = 0x04U, /*!< SD DMA Rx Linked List Node buffer Callback ID */ - HAL_SD_WRITE_DMA_LNKLST_BUF_CPLT_CB_ID = 0x05U, /*!< SD DMA Tx Linked List Node buffer Callback ID */ - - HAL_SD_MSP_INIT_CB_ID = 0x10U, /*!< SD MspInit Callback ID */ - HAL_SD_MSP_DEINIT_CB_ID = 0x11U /*!< SD MspDeInit Callback ID */ -} HAL_SD_CallbackIDTypeDef; -/** - * @} - */ - -/** @defgroup SD_Exported_Types_Group8 SD Callback pointer definition - * @{ - */ -typedef void (*pSD_CallbackTypeDef)(SD_HandleTypeDef *hsd); -#if (USE_SD_TRANSCEIVER != 0U) -typedef void (*pSD_TransceiverCallbackTypeDef)(FlagStatus status); -#endif /* USE_SD_TRANSCEIVER */ -/** - * @} - */ -#endif /* USE_HAL_SD_REGISTER_CALLBACKS */ -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup SD_Exported_Constants SD Exported Constants - * @{ - */ - -#define BLOCKSIZE ((uint32_t)512U) /*!< Block size is 512 bytes */ - -/** @defgroup SD_Exported_Constansts_Group1 SD Error status enumeration Structure definition - * @{ - */ -#define HAL_SD_ERROR_NONE SDMMC_ERROR_NONE /*!< No error */ -#define HAL_SD_ERROR_CMD_CRC_FAIL SDMMC_ERROR_CMD_CRC_FAIL /*!< Command response received (but CRC check failed) */ -#define HAL_SD_ERROR_DATA_CRC_FAIL SDMMC_ERROR_DATA_CRC_FAIL /*!< Data block sent/received (CRC check failed) */ -#define HAL_SD_ERROR_CMD_RSP_TIMEOUT SDMMC_ERROR_CMD_RSP_TIMEOUT /*!< Command response timeout */ -#define HAL_SD_ERROR_DATA_TIMEOUT SDMMC_ERROR_DATA_TIMEOUT /*!< Data timeout */ -#define HAL_SD_ERROR_TX_UNDERRUN SDMMC_ERROR_TX_UNDERRUN /*!< Transmit FIFO underrun */ -#define HAL_SD_ERROR_RX_OVERRUN SDMMC_ERROR_RX_OVERRUN /*!< Receive FIFO overrun */ -#define HAL_SD_ERROR_ADDR_MISALIGNED SDMMC_ERROR_ADDR_MISALIGNED /*!< Misaligned address */ -#define HAL_SD_ERROR_BLOCK_LEN_ERR SDMMC_ERROR_BLOCK_LEN_ERR /*!< Transferred block length is not allowed for the card or the */ -/*!< number of transferred bytes does not match the block length */ -#define HAL_SD_ERROR_ERASE_SEQ_ERR SDMMC_ERROR_ERASE_SEQ_ERR /*!< An error in the sequence of erase command occurs */ -#define HAL_SD_ERROR_BAD_ERASE_PARAM SDMMC_ERROR_BAD_ERASE_PARAM /*!< An invalid selection for erase groups */ -#define HAL_SD_ERROR_WRITE_PROT_VIOLATION SDMMC_ERROR_WRITE_PROT_VIOLATION /*!< Attempt to program a write protect block */ -#define HAL_SD_ERROR_LOCK_UNLOCK_FAILED SDMMC_ERROR_LOCK_UNLOCK_FAILED /*!< Sequence or password error has been detected in unlock */ -/*!< command or if there was an attempt to access a locked card */ -#define HAL_SD_ERROR_COM_CRC_FAILED SDMMC_ERROR_COM_CRC_FAILED /*!< CRC check of the previous command failed */ -#define HAL_SD_ERROR_ILLEGAL_CMD SDMMC_ERROR_ILLEGAL_CMD /*!< Command is not legal for the card state */ -#define HAL_SD_ERROR_CARD_ECC_FAILED SDMMC_ERROR_CARD_ECC_FAILED /*!< Card internal ECC was applied but failed to correct the data */ -#define HAL_SD_ERROR_CC_ERR SDMMC_ERROR_CC_ERR /*!< Internal card controller error */ -#define HAL_SD_ERROR_GENERAL_UNKNOWN_ERR SDMMC_ERROR_GENERAL_UNKNOWN_ERR /*!< General or unknown error */ -#define HAL_SD_ERROR_STREAM_READ_UNDERRUN SDMMC_ERROR_STREAM_READ_UNDERRUN /*!< The card could not sustain data reading in stream rmode */ -#define HAL_SD_ERROR_STREAM_WRITE_OVERRUN SDMMC_ERROR_STREAM_WRITE_OVERRUN /*!< The card could not sustain data programming in stream mode */ -#define HAL_SD_ERROR_CID_CSD_OVERWRITE SDMMC_ERROR_CID_CSD_OVERWRITE /*!< CID/CSD overwrite error */ -#define HAL_SD_ERROR_WP_ERASE_SKIP SDMMC_ERROR_WP_ERASE_SKIP /*!< Only partial address space was erased */ -#define HAL_SD_ERROR_CARD_ECC_DISABLED SDMMC_ERROR_CARD_ECC_DISABLED /*!< Command has been executed without using internal ECC */ -#define HAL_SD_ERROR_ERASE_RESET SDMMC_ERROR_ERASE_RESET /*!< Erase sequence was cleared before executing because an out */ -/*!< of erase sequence command was received */ -#define HAL_SD_ERROR_AKE_SEQ_ERR SDMMC_ERROR_AKE_SEQ_ERR /*!< Error in sequence of authentication */ -#define HAL_SD_ERROR_INVALID_VOLTRANGE SDMMC_ERROR_INVALID_VOLTRANGE /*!< Error in case of invalid voltage range */ -#define HAL_SD_ERROR_ADDR_OUT_OF_RANGE SDMMC_ERROR_ADDR_OUT_OF_RANGE /*!< Error when addressed block is out of range */ -#define HAL_SD_ERROR_REQUEST_NOT_APPLICABLE SDMMC_ERROR_REQUEST_NOT_APPLICABLE /*!< Error when command request is not applicable */ -#define HAL_SD_ERROR_PARAM SDMMC_ERROR_INVALID_PARAMETER /*!< the used parameter is not valid */ -#define HAL_SD_ERROR_UNSUPPORTED_FEATURE SDMMC_ERROR_UNSUPPORTED_FEATURE /*!< Error when feature is not insupported */ -#define HAL_SD_ERROR_BUSY SDMMC_ERROR_BUSY /*!< Error when transfer process is busy */ -#define HAL_SD_ERROR_DMA SDMMC_ERROR_DMA /*!< Error while DMA transfer */ -#define HAL_SD_ERROR_TIMEOUT SDMMC_ERROR_TIMEOUT /*!< Timeout error */ - -#if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U) -#define HAL_SD_ERROR_INVALID_CALLBACK SDMMC_ERROR_INVALID_PARAMETER /*!< Invalid callback error */ -#endif /* USE_HAL_SD_REGISTER_CALLBACKS */ -/** - * @} - */ - -/** @defgroup SD_Exported_Constansts_Group2 SD context enumeration - * @{ - */ -#define SD_CONTEXT_NONE ((uint32_t)0x00000000U) /*!< None */ -#define SD_CONTEXT_READ_SINGLE_BLOCK ((uint32_t)0x00000001U) /*!< Read single block operation */ -#define SD_CONTEXT_READ_MULTIPLE_BLOCK ((uint32_t)0x00000002U) /*!< Read multiple blocks operation */ -#define SD_CONTEXT_WRITE_SINGLE_BLOCK ((uint32_t)0x00000010U) /*!< Write single block operation */ -#define SD_CONTEXT_WRITE_MULTIPLE_BLOCK ((uint32_t)0x00000020U) /*!< Write multiple blocks operation */ -#define SD_CONTEXT_IT ((uint32_t)0x00000008U) /*!< Process in Interrupt mode */ -#define SD_CONTEXT_DMA ((uint32_t)0x00000080U) /*!< Process in DMA mode */ - -/** - * @} - */ - -/** @defgroup SD_Exported_Constansts_Group3 SD Supported Memory Cards - * @{ - */ -#define CARD_NORMAL_SPEED ((uint32_t)0x00000000U) /*!< Normal Speed Card <12.5Mo/s , Spec Version 1.01 */ -#define CARD_HIGH_SPEED ((uint32_t)0x00000100U) /*!< High Speed Card <25Mo/s , Spec version 2.00 */ -#define CARD_ULTRA_HIGH_SPEED ((uint32_t)0x00000200U) /*!< UHS-I SD Card <50Mo/s for SDR50, DDR5 Cards - and <104Mo/s for SDR104, Spec version 3.01 */ - -#define CARD_SDSC ((uint32_t)0x00000000U) /*!< SD Standard Capacity <2Go */ -#define CARD_SDHC_SDXC ((uint32_t)0x00000001U) /*!< SD High Capacity <32Go, SD Extended Capacity <2To */ -#define CARD_SECURED ((uint32_t)0x00000003U) - -/** - * @} - */ - -/** @defgroup SD_Exported_Constansts_Group4 SD Supported Version - * @{ - */ -#define CARD_V1_X ((uint32_t)0x00000000U) -#define CARD_V2_X ((uint32_t)0x00000001U) -/** - * @} - */ - -/** - * @} - */ - -/* Exported macro ------------------------------------------------------------*/ -/** @defgroup SD_Exported_macros SD Exported Macros - * @brief macros to handle interrupts and specific clock configurations - * @{ - */ -/** @brief Reset SD handle state. - * @param __HANDLE__ SD Handle. - * @retval None - */ -#if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U) -#define __HAL_SD_RESET_HANDLE_STATE(__HANDLE__) do { \ - (__HANDLE__)->State = HAL_SD_STATE_RESET; \ - (__HANDLE__)->MspInitCallback = NULL; \ - (__HANDLE__)->MspDeInitCallback = NULL; \ - } while(0) -#else -#define __HAL_SD_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SD_STATE_RESET) -#endif /* USE_HAL_SD_REGISTER_CALLBACKS */ - -/** - * @brief Enable the SD device interrupt. - * @param __HANDLE__ SD Handle. - * @param __INTERRUPT__ specifies the SDMMC interrupt sources to be enabled. - * This parameter can be one or a combination of the following values: - * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt - * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt - * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt - * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt - * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt - * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt - * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt - * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt - * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt - * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt - * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt - * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt - * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt - * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt - * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt - * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt - * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt - * @arg SDMMC_IT_SDIOIT: SDIO interrupt received interrupt - * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt - * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt - * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt - * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt - * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt - * @retval None - */ -#define __HAL_SD_ENABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_ENABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) - -/** - * @brief Disable the SD device interrupt. - * @param __HANDLE__ SD Handle. - * @param __INTERRUPT__ specifies the SDMMC interrupt sources to be disabled. - * This parameter can be one or a combination of the following values: - * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt - * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt - * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt - * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt - * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt - * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt - * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt - * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt - * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt - * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt - * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt - * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt - * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt - * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt - * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt - * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt - * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt - * @arg SDMMC_IT_SDIOIT: SDIO interrupt received interrupt - * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt - * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt - * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt - * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt - * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt - * @retval None - */ -#define __HAL_SD_DISABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_DISABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) - -/** - * @brief Check whether the specified SD flag is set or not. - * @param __HANDLE__ SD Handle. - * @param __FLAG__ specifies the flag to check. - * This parameter can be one of the following values: - * @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed) - * @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) - * @arg SDMMC_FLAG_CTIMEOUT: Command response timeout - * @arg SDMMC_FLAG_DTIMEOUT: Data timeout - * @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error - * @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error - * @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed) - * @arg SDMMC_FLAG_CMDSENT: Command sent (no response required) - * @arg SDMMC_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero) - * @arg SDMMC_FLAG_DHOLD: Data transfer Hold - * @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed) - * @arg SDMMC_FLAG_DABORT: Data transfer aborted by CMD12 - * @arg SDMMC_FLAG_DPSMACT: Data path state machine active - * @arg SDMMC_FLAG_CPSMACT: Command path state machine active - * @arg SDMMC_FLAG_TXFIFOHE: Transmit FIFO Half Empty - * @arg SDMMC_FLAG_RXFIFOHF: Receive FIFO Half Full - * @arg SDMMC_FLAG_TXFIFOF: Transmit FIFO full - * @arg SDMMC_FLAG_RXFIFOF: Receive FIFO full - * @arg SDMMC_FLAG_TXFIFOE: Transmit FIFO empty - * @arg SDMMC_FLAG_RXFIFOE: Receive FIFO empty - * @arg SDMMC_FLAG_BUSYD0: Inverted value of SDMMC_D0 line (Busy) - * @arg SDMMC_FLAG_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected - * @arg SDMMC_FLAG_SDIOIT: SDIO interrupt received - * @arg SDMMC_FLAG_ACKFAIL: Boot Acknowledgment received - * @arg SDMMC_FLAG_ACKTIMEOUT: Boot Acknowledgment timeout - * @arg SDMMC_FLAG_VSWEND: Voltage switch critical timing section completion - * @arg SDMMC_FLAG_CKSTOP: SDMMC_CK stopped in Voltage switch procedure - * @arg SDMMC_FLAG_IDMATE: IDMA transfer error - * @arg SDMMC_FLAG_IDMABTC: IDMA buffer transfer complete - * @retval The new state of SD FLAG (SET or RESET). - */ -#define __HAL_SD_GET_FLAG(__HANDLE__, __FLAG__) __SDMMC_GET_FLAG((__HANDLE__)->Instance, (__FLAG__)) - -/** - * @brief Clear the SD's pending flags. - * @param __HANDLE__ SD Handle. - * @param __FLAG__ specifies the flag to clear. - * This parameter can be one or a combination of the following values: - * @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed) - * @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) - * @arg SDMMC_FLAG_CTIMEOUT: Command response timeout - * @arg SDMMC_FLAG_DTIMEOUT: Data timeout - * @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error - * @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error - * @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed) - * @arg SDMMC_FLAG_CMDSENT: Command sent (no response required) - * @arg SDMMC_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero) - * @arg SDMMC_FLAG_DHOLD: Data transfer Hold - * @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed) - * @arg SDMMC_FLAG_DABORT: Data transfer aborted by CMD12 - * @arg SDMMC_FLAG_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected - * @arg SDMMC_FLAG_SDIOIT: SDIO interrupt received - * @arg SDMMC_FLAG_ACKFAIL: Boot Acknowledgment received - * @arg SDMMC_FLAG_ACKTIMEOUT: Boot Acknowledgment timeout - * @arg SDMMC_FLAG_VSWEND: Voltage switch critical timing section completion - * @arg SDMMC_FLAG_CKSTOP: SDMMC_CK stopped in Voltage switch procedure - * @arg SDMMC_FLAG_IDMATE: IDMA transfer error - * @arg SDMMC_FLAG_IDMABTC: IDMA buffer transfer complete - * @retval None - */ -#define __HAL_SD_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDMMC_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__)) - -/** - * @brief Check whether the specified SD interrupt has occurred or not. - * @param __HANDLE__ SD Handle. - * @param __INTERRUPT__ specifies the SDMMC interrupt source to check. - * This parameter can be one of the following values: - * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt - * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt - * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt - * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt - * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt - * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt - * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt - * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt - * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt - * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt - * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt - * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt - * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt - * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt - * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt - * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt - * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt - * @arg SDMMC_IT_SDIOIT: SDIO interrupt received interrupt - * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt - * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt - * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt - * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt - * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt - * @retval The new state of SD IT (SET or RESET). - */ -#define __HAL_SD_GET_IT(__HANDLE__, __INTERRUPT__) __SDMMC_GET_IT((__HANDLE__)->Instance, (__INTERRUPT__)) - -/** - * @brief Clear the SD's interrupt pending bits. - * @param __HANDLE__ SD Handle. - * @param __INTERRUPT__ specifies the interrupt pending bit to clear. - * This parameter can be one or a combination of the following values: - * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt - * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt - * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt - * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt - * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt - * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt - * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt - * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt - * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt - * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt - * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt - * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt - * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt - * @arg SDMMC_IT_SDIOIT: SDIO interrupt received interrupt - * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt - * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt - * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt - * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt - * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt - * @retval None - */ -#define __HAL_SD_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDMMC_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__)) - -/** - * @} - */ - -/* Include SD HAL Extension module */ -#include "stm32n6xx_hal_sd_ex.h" - -/* Exported functions --------------------------------------------------------*/ -/** @defgroup SD_Exported_Functions SD Exported Functions - * @{ - */ - -/** @defgroup SD_Exported_Functions_Group1 Initialization and de-initialization functions - * @{ - */ -HAL_StatusTypeDef HAL_SD_Init(SD_HandleTypeDef *hsd); -HAL_StatusTypeDef HAL_SD_InitCard(SD_HandleTypeDef *hsd); -HAL_StatusTypeDef HAL_SD_DeInit(SD_HandleTypeDef *hsd); -void HAL_SD_MspInit(SD_HandleTypeDef *hsd); -void HAL_SD_MspDeInit(SD_HandleTypeDef *hsd); -/** - * @} - */ - -/** @defgroup SD_Exported_Functions_Group2 Input and Output operation functions - * @{ - */ -/* Blocking mode: Polling */ -HAL_StatusTypeDef HAL_SD_ReadBlocks(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, - uint32_t Timeout); -HAL_StatusTypeDef HAL_SD_WriteBlocks(SD_HandleTypeDef *hsd, const uint8_t *pData, uint32_t BlockAdd, - uint32_t NumberOfBlocks, uint32_t Timeout); -HAL_StatusTypeDef HAL_SD_Erase(SD_HandleTypeDef *hsd, uint32_t BlockStartAdd, uint32_t BlockEndAdd); -/* Non-Blocking mode: IT */ -HAL_StatusTypeDef HAL_SD_ReadBlocks_IT(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, - uint32_t NumberOfBlocks); -HAL_StatusTypeDef HAL_SD_WriteBlocks_IT(SD_HandleTypeDef *hsd, const uint8_t *pData, uint32_t BlockAdd, - uint32_t NumberOfBlocks); -/* Non-Blocking mode: DMA */ -HAL_StatusTypeDef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, - uint32_t NumberOfBlocks); -HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, const uint8_t *pData, uint32_t BlockAdd, - uint32_t NumberOfBlocks); - -void HAL_SD_IRQHandler(SD_HandleTypeDef *hsd); - -/* Callback in non blocking modes (DMA) */ -void HAL_SD_TxCpltCallback(SD_HandleTypeDef *hsd); -void HAL_SD_RxCpltCallback(SD_HandleTypeDef *hsd); -void HAL_SD_ErrorCallback(SD_HandleTypeDef *hsd); -void HAL_SD_AbortCallback(SD_HandleTypeDef *hsd); - -#if (USE_SD_TRANSCEIVER != 0U) -/* Callback to switch in 1.8V mode */ -void HAL_SD_DriveTransceiver_1_8V_Callback(FlagStatus status); -#endif /* USE_SD_TRANSCEIVER */ - -#if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U) -/* SD callback registering/unregistering */ -HAL_StatusTypeDef HAL_SD_RegisterCallback(SD_HandleTypeDef *hsd, HAL_SD_CallbackIDTypeDef CallbackID, - pSD_CallbackTypeDef pCallback); -HAL_StatusTypeDef HAL_SD_UnRegisterCallback(SD_HandleTypeDef *hsd, HAL_SD_CallbackIDTypeDef CallbackID); - -#if (USE_SD_TRANSCEIVER != 0U) -HAL_StatusTypeDef HAL_SD_RegisterTransceiverCallback(SD_HandleTypeDef *hsd, pSD_TransceiverCallbackTypeDef pCallback); -HAL_StatusTypeDef HAL_SD_UnRegisterTransceiverCallback(SD_HandleTypeDef *hsd); -#endif /* USE_SD_TRANSCEIVER */ -#endif /* USE_HAL_SD_REGISTER_CALLBACKS */ - -/** - * @} - */ - -/** @defgroup SD_Exported_Functions_Group3 Peripheral Control functions - * @{ - */ -HAL_StatusTypeDef HAL_SD_ConfigWideBusOperation(SD_HandleTypeDef *hsd, uint32_t WideMode); -HAL_StatusTypeDef HAL_SD_ConfigSpeedBusOperation(SD_HandleTypeDef *hsd, uint32_t SpeedMode); -/** - * @} - */ - -/** @defgroup SD_Exported_Functions_Group4 SD card related functions - * @{ - */ -HAL_SD_CardStateTypeDef HAL_SD_GetCardState(SD_HandleTypeDef *hsd); -HAL_StatusTypeDef HAL_SD_GetCardCID(const SD_HandleTypeDef *hsd, HAL_SD_CardCIDTypeDef *pCID); -HAL_StatusTypeDef HAL_SD_GetCardCSD(SD_HandleTypeDef *hsd, HAL_SD_CardCSDTypeDef *pCSD); -HAL_StatusTypeDef HAL_SD_GetCardStatus(SD_HandleTypeDef *hsd, HAL_SD_CardStatusTypeDef *pStatus); -HAL_StatusTypeDef HAL_SD_GetCardInfo(const SD_HandleTypeDef *hsd, HAL_SD_CardInfoTypeDef *pCardInfo); -/** - * @} - */ - -/** @defgroup SD_Exported_Functions_Group5 Peripheral State and Errors functions - * @{ - */ -HAL_SD_StateTypeDef HAL_SD_GetState(const SD_HandleTypeDef *hsd); -uint32_t HAL_SD_GetError(const SD_HandleTypeDef *hsd); -/** - * @} - */ - -/** @defgroup SD_Exported_Functions_Group6 Perioheral Abort management - * @{ - */ -HAL_StatusTypeDef HAL_SD_Abort(SD_HandleTypeDef *hsd); -HAL_StatusTypeDef HAL_SD_Abort_IT(SD_HandleTypeDef *hsd); -/** - * @} - */ - -/* Private types -------------------------------------------------------------*/ -/** @defgroup SD_Private_Types SD Private Types - * @{ - */ - -/** - * @} - */ - -/* Private defines -----------------------------------------------------------*/ -/** @defgroup SD_Private_Defines SD Private Defines - * @{ - */ - -/** - * @} - */ - -/* Private variables ---------------------------------------------------------*/ -/** @defgroup SD_Private_Variables SD Private Variables - * @{ - */ - -/** - * @} - */ - -/* Private constants ---------------------------------------------------------*/ -/** @defgroup SD_Private_Constants SD Private Constants - * @{ - */ - -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/** @defgroup SD_Private_Macros SD Private Macros - * @{ - */ - -/** - * @} - */ - -/* Private functions prototypes ----------------------------------------------*/ -/** @defgroup SD_Private_Functions_Prototypes SD Private Functions Prototypes - * @{ - */ - -/** - * @} - */ - -/* Private functions ---------------------------------------------------------*/ -/** @defgroup SD_Private_Functions SD Private Functions - * @{ - */ - -/** - * @} - */ - - -/** - * @} - */ - -/** - * @} - */ -#endif /* SDMMC1 || SDMMC2 */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - - -#endif /* STM32N6xx_HAL_SD_H */ Index: trunk/firmware/FSBL/CubeMX/Drivers/STM32N6xx_HAL_Driver/Inc/stm32n6xx_hal_sd_ex.h =================================================================== --- trunk/firmware/FSBL/CubeMX/Drivers/STM32N6xx_HAL_Driver/Inc/stm32n6xx_hal_sd_ex.h (revision 37) +++ (revision ) @@ -1,119 +1,0 @@ -/** - ****************************************************************************** - * @file stm32n6xx_hal_sd_ex.h - * @author MCD Application Team - * @brief Header file of SD HAL extended module. - ****************************************************************************** - * @attention - * - * Copyright (c) 2023 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef STM32N6xx_HAL_SD_EX_H -#define STM32N6xx_HAL_SD_EX_H - -#ifdef __cplusplus -extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32n6xx_hal_def.h" - -/** @addtogroup STM32N6xx_HAL_Driver - * @{ - */ -#if defined (SDMMC1) || defined (SDMMC2) - -/** @addtogroup SDEx - * @brief SD HAL extended module driver - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup SDEx_Exported_Types SDEx Exported Types - * @{ - */ - -/** @defgroup SDEx_Exported_Types_Group1 Linked List Wrapper - * @{ - */ -/* Exported constants --------------------------------------------------------*/ -/* Exported macro ------------------------------------------------------------*/ -/* -----------------Linked List Wrapper --------------------------------------*/ - -#define SD_DMALinkNodeTypeDef SDMMC_DMALinkNodeTypeDef -#define SD_DMALinkNodeConfTypeDef SDMMC_DMALinkNodeConfTypeDef -#define SD_DMALinkedListTypeDef SDMMC_DMALinkedListTypeDef -/* ----------------- Linked Aliases ------------------------------------------*/ -#define HAL_SDEx_DMALinkedList_WriteCpltCallback HAL_SD_TxCpltCallback -#define HAL_SDEx_DMALinkedList_ReadCpltCallback HAL_SD_RxCpltCallback -/** - * @} - */ -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ -/** @defgroup SDEx_Exported_Functions SDEx Exported Functions - * @{ - */ -/** @defgroup SDEx_Exported_Functions_Group1 Linked List functions - * @{ - */ -HAL_StatusTypeDef HAL_SDEx_DMALinkedList_ReadBlocks(SD_HandleTypeDef *hsd, const SD_DMALinkedListTypeDef *pLinkedList, - uint32_t BlockAdd, uint32_t NumberOfBlocks); -HAL_StatusTypeDef HAL_SDEx_DMALinkedList_WriteBlocks(SD_HandleTypeDef *hsd, const SD_DMALinkedListTypeDef *pLinkedList, - uint32_t BlockAdd, uint32_t NumberOfBlocks); - -HAL_StatusTypeDef HAL_SDEx_DMALinkedList_BuildNode(SD_DMALinkNodeTypeDef *pNode, SD_DMALinkNodeConfTypeDef *pNodeConf); -HAL_StatusTypeDef HAL_SDEx_DMALinkedList_InsertNode(SD_DMALinkedListTypeDef *pLinkedList, - SD_DMALinkNodeTypeDef *pPrevNode, SD_DMALinkNodeTypeDef *pNewNode); -HAL_StatusTypeDef HAL_SDEx_DMALinkedList_RemoveNode(SD_DMALinkedListTypeDef *pLinkedList, SD_DMALinkNodeTypeDef *pNode); -HAL_StatusTypeDef HAL_SDEx_DMALinkedList_LockNode(SD_DMALinkNodeTypeDef *pNode); -HAL_StatusTypeDef HAL_SDEx_DMALinkedList_UnlockNode(SD_DMALinkNodeTypeDef *pNode); -HAL_StatusTypeDef HAL_SDEx_DMALinkedList_EnableCircularMode(SD_DMALinkedListTypeDef *pLinkedList); -HAL_StatusTypeDef HAL_SDEx_DMALinkedList_DisableCircularMode(SD_DMALinkedListTypeDef *pLinkedList); - -void HAL_SDEx_Read_DMALnkLstBufCpltCallback(SD_HandleTypeDef *hsd); -void HAL_SDEx_Write_DMALnkLstBufCpltCallback(SD_HandleTypeDef *hsd); - - -/** - * @} - */ - -/** - * @} - */ - -/* Private types -------------------------------------------------------------*/ -/* Private defines -----------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private constants ---------------------------------------------------------*/ -/* Private macros ------------------------------------------------------------*/ -/* Private functions prototypes ----------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ - -/** - * @} - */ -#endif /* SDMMC1 || SDMMC2 */ - -/** - * @} - */ -#ifdef __cplusplus -} -#endif - - -#endif /* stm32n6xx_HAL_SD_EX_H */ Index: trunk/firmware/FSBL/CubeMX/Drivers/STM32N6xx_HAL_Driver/Inc/stm32n6xx_hal_sdio.h =================================================================== --- trunk/firmware/FSBL/CubeMX/Drivers/STM32N6xx_HAL_Driver/Inc/stm32n6xx_hal_sdio.h (revision 37) +++ (revision ) @@ -1,598 +1,0 @@ -/** - ********************************************************************************************************************** - * @file stm32n6xx_hal_sdio.h - * @author MCD Application Team - * @brief Header file of SDIO HAL module. - ********************************************************************************************************************** - * @attention - * - * Copyright (c) 2023 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ********************************************************************************************************************** - */ - -/* Define to prevent recursive inclusion -----------------------------------------------------------------------------*/ -#ifndef STM32N6xx_HAL_SDIO_H -#define STM32N6xx_HAL_SDIO_H - -#ifdef __cplusplus -extern "C" { -#endif - -/* Includes ----------------------------------------------------------------------------------------------------------*/ -#include "stm32n6xx_ll_sdmmc.h" - -/** @addtogroup STM32N6xx_HAL_Driver - * @{ - */ -#if defined (SDMMC1) || defined (SDMMC2) - -/** @defgroup SDIO SDIO - * @brief SDIO HAL module driver - * @{ - */ - -/* Exported types ----------------------------------------------------------------------------------------------------*/ -/** @defgroup SDIO_Exported_Types SDIO Exported Types - * @{ - */ - -/** @defgroup SDIO_Exported_Types_Group1 SDIO State enumeration structure - * @{ - - */ -typedef enum -{ - HAL_SDIO_STATE_RESET = 0x00U, /*!< SDIO not yet initialized or disabled */ - HAL_SDIO_STATE_READY = 0x01U, /*!< SDIO initialized and ready for us */ - HAL_SDIO_STATE_BUSY = 0x02U, /*!< SDIO process ongoing */ -} HAL_SDIO_StateTypeDef; - -/** - * @} - */ - -/** @defgroup SDIO_Exported_Types_Group2 SDIO Handle and Structure definition - * @{ - */ -/** - * @brief SDIO Card Common Control Register Structure definition - */ -typedef struct -{ - uint8_t sdio_revision; /*!< SDIO revision */ - uint8_t cccr_revision; /*!< CCCR version */ - uint8_t sd_spec_revision; /*!< SD revision */ - uint8_t bus_width_8Bit; /*!< SDIO bus width 8 bit support */ - uint32_t card_capability; /*!< SDIO card capability */ - uint32_t commonCISPointer; /*!< point to common CIS */ -} HAL_SDIO_CCCR_TypeDef; - -/** - * @brief sdio card FBR register(Function Basic Register) - */ -typedef struct -{ - uint8_t flags; /*!< SDIO current IO flags */ - uint8_t ioStdFunctionCode; /*!< SDIO current IO standard function code */ - uint8_t ioExtFunctionCode; /*!< SDIO current IO extended function code */ - uint32_t ioPointerToCIS; /*!< SDIO current IO pointer to CIS */ - uint32_t ioPointerToCSA; /*!< SDIO current IO pointer to CSA */ -} HAL_SDIO_FBR_t; - -/** - * @brief SDIO CMD52 Structure definition - */ -typedef struct -{ - uint32_t Reg_Addr; /*!< This is the address of the byte of data inside of the selected function to read or write */ - uint8_t ReadAfterWrite; /*!< This is the read after write flag, it is used for write access only. */ - uint8_t IOFunctionNbr; /*!< The number of the function within the IO card you wish to read or write */ -} HAL_SDIO_DirectCmd_TypeDef; - -/** - * @brief SDIO CMD53 Structure definition - */ -typedef struct -{ - uint32_t Reg_Addr; /*!< This is the address of the byte of data inside of the selected function to read or write */ - uint32_t OpCode; /*!< Read/Write operation mode */ - uint32_t Block_Mode; /*!< Bytes or Blocks mode */ - uint32_t IOFunctionNbr; /*!< The number of the function within the IO card you wish to read or write */ -} HAL_SDIO_ExtendedCmd_TypeDef; - -#define SDIO_InitTypeDef SDMMC_InitTypeDef -#define SDIO_TypeDef SDMMC_TypeDef - -/** - * @brief SDIO handle Structure definition - */ -typedef struct __SDIO_HandleTypeDef -{ - SDIO_TypeDef *Instance; /*!< SDIO registers base address */ - - SDIO_InitTypeDef Init; /*!< SDIO required parameters */ - - HAL_LockTypeDef Lock; /*!< SDIO locking object */ - - uint8_t *pTxBuffPtr; /*!< Pointer to SDIO Tx transfer Buffer */ - - uint32_t TxXferSize; /*!< SDIO Tx Transfer size */ - - uint8_t *pRxBuffPtr; /*!< Pointer to SDIO Rx transfer Buffer */ - - uint32_t RxXferSize; /*!< SDIO Rx Transfer size */ - - uint32_t remaining_data; /*!< Remaining data to transfer */ - - uint32_t next_data_addr; /*!< SDIO Next data address */ - - __IO uint32_t next_reg_addr; /*!< SDIO Next register address */ - - uint16_t block_size; /*!< SDIO Block size */ - - __IO uint32_t Context; /*!< SDIO transfer context */ - - __IO HAL_SDIO_StateTypeDef State; /*!< SDIO card State */ - - __IO uint32_t ErrorCode; /*!< SDIO Card Error codes */ - - uint8_t IOFunctionMask; /*!< SDIO used to record current enabled io interrupt */ - - volatile uint8_t IOInterruptNbr; /*!< SDIO used to record total enabled io interrupt numbers */ - - void (* SDIO_IOFunction_Callback[SDIO_MAX_IO_NUMBER])(struct __SDIO_HandleTypeDef *hsdio, uint32_t func); - -#if defined (USE_HAL_SDIO_REGISTER_CALLBACKS) && (USE_HAL_SDIO_REGISTER_CALLBACKS == 1U) - void (* TxCpltCallback)(struct __SDIO_HandleTypeDef *hsdio); - void (* RxCpltCallback)(struct __SDIO_HandleTypeDef *hsdio); - void (* ErrorCallback)(struct __SDIO_HandleTypeDef *hsdio); - void (* MspInitCallback)(struct __SDIO_HandleTypeDef *hsdio); - void (* MspDeInitCallback)(struct __SDIO_HandleTypeDef *hsdio); -#endif /* USE_HAL_SDIO_REGISTER_CALLBACKS */ - -#if (USE_SDIO_TRANSCEIVER != 0U) - void (* DriveTransceiver_1_8V_Callback)(struct __SDIO_HandleTypeDef *hsdio, FlagStatus status); -#endif /* USE_SDIO_TRANSCEIVER */ - - HAL_StatusTypeDef(* SDIO_IdentifyCard)(struct __SDIO_HandleTypeDef *hsdio); - -} SDIO_HandleTypeDef; - -/** - * @} - */ -#if defined (USE_HAL_SDIO_REGISTER_CALLBACKS) && (USE_HAL_SDIO_REGISTER_CALLBACKS == 1U) -/** @defgroup SDIO_Exported_Types_Group3 SDIO Callback ID enumeration definition - * @{ - */ -typedef enum -{ - HAL_SDIO_TX_CPLT_CB_ID = 0x00U, /*!< SDIO Tx Complete Callback ID */ - HAL_SDIO_RX_CPLT_CB_ID = 0x01U, /*!< SDIO Rx Complete Callback ID */ - HAL_SDIO_ERROR_CB_ID = 0x02U, /*!< SDIO Error Callback ID */ - HAL_SDIO_MSP_INIT_CB_ID = 0x10U, /*!< SDIO MspInit Callback ID */ - HAL_SDIO_MSP_DEINIT_CB_ID = 0x11U /*!< SDIO MspDeInit Callback ID */ -} HAL_SDIO_CallbackIDTypeDef; -/** - * @} - */ - -/** @defgroup SDIO_Exported_Types_Group4 SDIO Callback pointer definition - * @{ - */ -typedef void (*pSDIO_CallbackTypeDef)(SDIO_HandleTypeDef *hsdio); -/** - * @} - */ -#endif /* USE_HAL_SDIO_REGISTER_CALLBACKS */ - -#if (USE_SDIO_TRANSCEIVER != 0U) -typedef void (*pSDIO_TransceiverCallbackTypeDef)(SDIO_HandleTypeDef *hsdio, FlagStatus status); -#endif /* USE_SDIO_TRANSCEIVER */ - -typedef HAL_StatusTypeDef(*pSDIO_IdentifyCardCallbackTypeDef)(SDIO_HandleTypeDef *hsdio); -typedef void (*HAL_SDIO_IOFunction_CallbackTypeDef)(SDIO_HandleTypeDef *hsdio, uint32_t func); -/** - * @} - */ - -/* Exported constants ------------------------------------------------------------------------------------------------*/ -/** @defgroup SDIO_Exported_Constants SDIO Exported Constants - * @{ - */ - -/** @defgroup SDIO_Exported_Constansts_Group1 SDIO Error status Structure definition - * @{ - */ -#define HAL_SDIO_ERROR_NONE SDMMC_ERROR_NONE /*!< No error */ -#define HAL_SDIO_ERROR_DATA_CRC_FAIL SDMMC_ERROR_DATA_CRC_FAIL /*!< Data block sent/received (CRC check failed) */ -#define HAL_SDIO_ERROR_DATA_TIMEOUT SDMMC_ERROR_DATA_TIMEOUT /*!< Data timeout */ -#define HAL_SDIO_ERROR_TX_UNDERRUN SDMMC_ERROR_TX_UNDERRUN /*!< Transmit FIFO underrun */ -#define HAL_SDIO_ERROR_RX_OVERRUN SDMMC_ERROR_RX_OVERRUN /*!< Receive FIFO overrun */ -#define HAL_SDIO_ERROR_TIMEOUT SDMMC_ERROR_TIMEOUT /*!< Timeout error */ -#define HAL_SDIO_ERROR_INVALID_CALLBACK SDMMC_ERROR_INVALID_PARAMETER /*!< Invalid callback error */ -/** - * @} - */ - -/** @defgroup SDIO_Exported_Constansts_Group2 SDIO context enumeration - * @{ - */ -#define SDIO_CONTEXT_NONE 0x00U /*!< None */ -#define SDIO_CONTEXT_READ_SINGLE_BLOCK 0x01U /*!< Read single block operation */ -#define SDIO_CONTEXT_READ_MULTIPLE_BLOCK 0x02U /*!< Read multiple blocks operation */ -#define SDIO_CONTEXT_WRITE_SINGLE_BLOCK 0x10U /*!< Write single block operation */ -#define SDIO_CONTEXT_WRITE_MULTIPLE_BLOCK 0x20U /*!< Write multiple blocks operation */ -#define SDIO_CONTEXT_IT 0x08U /*!< Process in Interrupt mode */ -#define SDIO_CONTEXT_DMA 0x80U /*!< Process in DMA mode */ -/** - * @} - */ - -/** @defgroup SDIO_Exported_Constansts_Group3 SDIO Block mode enumeration - * @{ - */ -#define HAL_SDIO_MODE_BYTE SDMMC_SDIO_MODE_BYTE -#define HAL_SDIO_MODE_BLOCK SDMMC_SDIO_MODE_BLOCK -/** - * @} - */ - -/** @defgroup SDIO_Exported_Constansts_Group4 SDIO operation code enumeration - * @{ - */ -#define HAL_SDIO_OP_CODE_NO_INC SDMMC_SDIO_NO_INC -#define HAL_SDIO_OP_CODE_AUTO_INC SDMMC_SDIO_AUTO_INC -/** - * @} - */ - -/** @defgroup SDIO_Exported_Constansts_Group5 SDIO Read After Write(RAW) enumeration - * @{ - */ -#define HAL_SDIO_WRITE_ONLY SDMMC_SDIO_WO /*!< SDIO Write only */ -#define HAL_SDIO_READ_AFTER_WRITE SDMMC_SDIO_RAW /*!< SDIO Read after write */ -/** - * @} - */ - -/** @defgroup SDIO_Exported_Constansts_Group6 SDIO wire mode enumeration - * @{ - */ -#define HAL_SDIO_1_WIRE_MODE 0U /*!< SDIO wire support 1 wire */ -#define HAL_SDIO_4_WIRES_MODE 1U /*!< SDIO wire support 4 wires */ -/** - * @} - */ - -/** @defgroup SDIO_Exported_Constansts_Group7 SDIO Data block size enumeration - * @{ - */ -#define HAL_SDIO_DATA_BLOCK_SIZE_1BYTE 1U /*!< SDIO data block size 1 byte */ -#define HAL_SDIO_DATA_BLOCK_SIZE_2BYTE 2U /*!< SDIO data block size 2 byte */ -#define HAL_SDIO_DATA_BLOCK_SIZE_4BYTE 4U /*!< SDIO data block size 4 byte */ -#define HAL_SDIO_DATA_BLOCK_SIZE_8BYTE 8U /*!< SDIO data block size 8 byte */ -#define HAL_SDIO_DATA_BLOCK_SIZE_16BYTE 16U /*!< SDIO data block size 16 byte */ -#define HAL_SDIO_DATA_BLOCK_SIZE_32BYTE 32U /*!< SDIO data block size 32 byte */ -#define HAL_SDIO_DATA_BLOCK_SIZE_64BYTE 64U /*!< SDIO data block size 64 byte */ -#define HAL_SDIO_DATA_BLOCK_SIZE_128BYTE 128U /*!< SDIO data block size 128 byte */ -#define HAL_SDIO_DATA_BLOCK_SIZE_256BYTE 256U /*!< SDIO data block size 256 byte */ -#define HAL_SDIO_DATA_BLOCK_SIZE_512BYTE 512U /*!< SDIO data block size 512 byte */ -#define HAL_SDIO_DATA_BLOCK_SIZE_1024BYTE 1024U /*!< SDIO data block size 1024 byte */ -#define HAL_SDIO_DATA_BLOCK_SIZE_2048BYTE 2048U /*!< SDIO data block size 2048 byte */ -/** - * @} - */ - -/** @defgroup SDIO_Exported_Constansts_Group8 SDIO Bus Width enumeration - * @{ - */ -#define HAL_SDIO_BUS_WIDTH_8BIT_NOT_SUPPORTED 0U /*!< SDIO bus width 8 bit is not supported */ -#define HAL_SDIO_BUS_WIDTH_8BIT_SUPPORTED 1U /*!< SDIO bus width 8 bit is supported */ -/** - * @} - */ - -/** @defgroup SDIO_Exported_Constansts_Group9 SDIO Data rate definitions - * @{ - */ -#define HAL_SDIOS_DATA_RATE_SDR12 0U /*!< SDIO Data rate SDR12 */ -#define HAL_SDIOS_DATA_RATE_SDR25 1U /*!< SDIO Data rate SDR25 */ -#define HAL_SDIOS_DATA_RATE_SDR50 2U /*!< SDIO Data rate SDR50 */ -#define HAL_SDIOS_DATA_RATE_DDR50 3U /*!< SDIO Data rate DDR50 */ -/** - * @} - */ - -/** @defgroup SDIO_Exported_Constansts_Group10 SDIO Functions definitions - * @{ - */ -#define HAL_SDIO_FUNCTION_0 0U /*!< SDIO function 0 */ -#define HAL_SDIO_FUNCTION_1 1U /*!< SDIO function 1 */ -#define HAL_SDIO_FUNCTION_2 2U /*!< SDIO function 2 */ -#define HAL_SDIO_FUNCTION_3 3U /*!< SDIO function 3 */ -#define HAL_SDIO_FUNCTION_4 4U /*!< SDIO function 4 */ -#define HAL_SDIO_FUNCTION_5 5U /*!< SDIO function 5 */ -#define HAL_SDIO_FUNCTION_6 6U /*!< SDIO function 6 */ -#define HAL_SDIO_FUNCTION_7 7U /*!< SDIO function 7 */ -/** - * @} - */ - -/** @defgroup SDIO_Exported_Constansts_Group11 SDIO FBR definitions - * @{ - */ -#define HAL_SDIO_FBR_SUPPORT_CSA 1U /*!< SDIO function support CSA */ -#define HAL_SDIO_FBR_SUPPORT_POWER_SELECTION 1U /*!< SDIO function support power selection */ -/** - * @} - */ - -/** - * @} - */ -/* Exported macro ----------------------------------------------------------------------------------------------------*/ -/** @defgroup SDIO_Exported_macros SDIO Exported Macros - * @brief macros to handle interrupts and specific clock configurations - * @{ - */ -/** - * @brief Enable the SDIO device interrupt. - * @param __HANDLE__ SDIO Handle. - * @param __INTERRUPT__ specifies the SDMMC interrupt sources to be enabled. - * @retval None - */ -#define __HAL_SDIO_ENABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_ENABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) - -/** - * @brief Disable the SDIO device interrupt. - * @param __HANDLE__ SDIO Handle. - * @param __INTERRUPT__ specifies the SDMMC interrupt sources to be disabled. - * @retval None - */ -#define __HAL_SDIO_DISABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_DISABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) - -/** - * @brief Check whether the specified SDIO flag is set or not. - * @param __HANDLE__ SDIO Handle. - * @param __FLAG__ specifies the flag to check. - * @retval The new state of SDIO FLAG (SET or RESET). - */ -#define __HAL_SDIO_GET_FLAG(__HANDLE__, __FLAG__) __SDMMC_GET_FLAG((__HANDLE__)->Instance, (__FLAG__)) - -/** - * @brief Clear the SDIO's pending flags. - * @param __HANDLE__ SDIO Handle. - * @param __FLAG__ specifies the flag to clear. - * @retval None - */ -#define __HAL_SDIO_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDMMC_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__)) - -/** - * @brief Check whether the specified SDIO interrupt has occurred or not. - * @param __HANDLE__ SDIO Handle. - * @param __INTERRUPT__ specifies the SDMMC interrupt source to check. - * @retval The new state of SDIO IT (SET or RESET). - */ -#define __HAL_SDIO_GET_IT(__HANDLE__, __INTERRUPT__) __SDMMC_GET_IT((__HANDLE__)->Instance, (__INTERRUPT__)) - -/** - * @brief Checks whether the specified SDIO interrupt is enabled or not. - * @param __HANDLE__ : SDIO handle. - * @param __INTERRUPT__ : specifies the SDMMC interrupt source to check. - * @retval The state of SDIO IT (SET or RESET). - */ -#define __HAL_SDIO_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) \ - __SDMMC_GET_IT_SOURCE((__HANDLE__)->Instance, (__INTERRUPT__)) -/** - * @} - */ - -/* Exported functions ------------------------------------------------------------------------------------------------*/ -/** @defgroup SDIO_Exported_Functions SDIO Exported Functions - * @{ - */ -/** @defgroup SDIO_Exported_Functions_Group1 Initialization and de-initialization functions - * @{ - */ -HAL_StatusTypeDef HAL_SDIO_Init(SDIO_HandleTypeDef *hsdio); -HAL_StatusTypeDef HAL_SDIO_DeInit(SDIO_HandleTypeDef *hsdio); - -void HAL_SDIO_MspInit(SDIO_HandleTypeDef *hsdio); -void HAL_SDIO_MspDeInit(SDIO_HandleTypeDef *hsdio); -/** - * @} - */ - -/** @defgroup SDIO_Exported_Functions_Group2 Peripheral Control functions - * @{ - */ -HAL_StatusTypeDef HAL_SDIO_SetDataBusWidth(SDIO_HandleTypeDef *hsdio, uint32_t BusWide); -HAL_StatusTypeDef HAL_SDIO_ConfigFrequency(SDIO_HandleTypeDef *hsdio, uint32_t ClockSpeed); - -HAL_StatusTypeDef HAL_SDIO_SetBlockSize(SDIO_HandleTypeDef *hsdio, uint8_t function_nbr, uint16_t BlockSize); -HAL_StatusTypeDef HAL_SDIO_SetSpeedMode(SDIO_HandleTypeDef *hsdio, uint32_t DataRate); - -HAL_StatusTypeDef HAL_SDIO_CardReset(SDIO_HandleTypeDef *hsdio); -HAL_StatusTypeDef HAL_SDIO_GetCardCommonControlRegister(SDIO_HandleTypeDef *hsdio, HAL_SDIO_CCCR_TypeDef *pCccr); -HAL_StatusTypeDef HAL_SDIO_GetCardFBRRegister(SDIO_HandleTypeDef *hsdio, HAL_SDIO_FBR_t *pFbr); -/** - * @} - */ - -/** @defgroup SDIO_Exported_Functions_Group3 Process functions - * @{ - */ -HAL_StatusTypeDef HAL_SDIO_ReadDirect(SDIO_HandleTypeDef *hsdio, const HAL_SDIO_DirectCmd_TypeDef *Argument, - uint8_t *pData); -HAL_StatusTypeDef HAL_SDIO_WriteDirect(SDIO_HandleTypeDef *hsdio, const HAL_SDIO_DirectCmd_TypeDef *Argument, - uint8_t Data); - -HAL_StatusTypeDef HAL_SDIO_ReadExtended(SDIO_HandleTypeDef *hsdio, const HAL_SDIO_ExtendedCmd_TypeDef *Argument, - uint8_t *pData, uint32_t Size_byte, uint32_t Timeout_Ms); - -HAL_StatusTypeDef HAL_SDIO_WriteExtended(SDIO_HandleTypeDef *hsdio, const HAL_SDIO_ExtendedCmd_TypeDef *Argument, - uint8_t *pData, uint32_t Size_byte, uint32_t Timeout_Ms); - -HAL_StatusTypeDef HAL_SDIO_ReadExtended_DMA(SDIO_HandleTypeDef *hsdio, const HAL_SDIO_ExtendedCmd_TypeDef *Argument, - uint8_t *pData, uint32_t Size_byte); - -HAL_StatusTypeDef HAL_SDIO_WriteExtended_DMA(SDIO_HandleTypeDef *hsdio, const HAL_SDIO_ExtendedCmd_TypeDef *Argument, - uint8_t *pData, uint32_t Size_byte); -/** - * @} - */ - -/** @defgroup SDIO_Exported_Functions_Group4 IRQHandler and callback functions - * @{ - */ -void HAL_SDIO_IRQHandler(SDIO_HandleTypeDef *hsdio); - -void HAL_SDIO_TxCpltCallback(SDIO_HandleTypeDef *hsdio); -void HAL_SDIO_RxCpltCallback(SDIO_HandleTypeDef *hsdio); -void HAL_SDIO_ErrorCallback(SDIO_HandleTypeDef *hsdio); -void HAL_SDIO_IOFunctionCallback(SDIO_HandleTypeDef *hsdio, uint32_t func); -#if (USE_SDIO_TRANSCEIVER != 0U) -/* Callback to switch in 1.8V mode */ -void HAL_SDIO_DriveTransceiver_1_8V_Callback(SDIO_HandleTypeDef *hsdio, FlagStatus status); -#endif /* USE_SDIO_TRANSCEIVER */ - -#if defined (USE_HAL_SDIO_REGISTER_CALLBACKS) && (USE_HAL_SDIO_REGISTER_CALLBACKS == 1U) -HAL_StatusTypeDef HAL_SDIO_RegisterCallback(SDIO_HandleTypeDef *hsdio, HAL_SDIO_CallbackIDTypeDef CallbackID, - pSDIO_CallbackTypeDef pCallback); - -HAL_StatusTypeDef HAL_SDIO_UnRegisterCallback(SDIO_HandleTypeDef *hsdio, HAL_SDIO_CallbackIDTypeDef CallbackID); -#endif /* USE_HAL_SDIO_REGISTER_CALLBACKS */ - -#if (USE_SDIO_TRANSCEIVER != 0U) -HAL_StatusTypeDef HAL_SDIO_RegisterTransceiverCallback(SDIO_HandleTypeDef *hsdio, - pSDIO_TransceiverCallbackTypeDef pCallback); -HAL_StatusTypeDef HAL_SDIO_UnRegisterTransceiverCallback(SDIO_HandleTypeDef *hsdio); -#endif /* USE_SDIO_TRANSCEIVER */ - -HAL_StatusTypeDef HAL_SDIO_RegisterIOFunctionCallback(SDIO_HandleTypeDef *hsdio, uint32_t IOFunction, - HAL_SDIO_IOFunction_CallbackTypeDef pCallback); - -HAL_StatusTypeDef HAL_SDIO_RegisterIdentifyCardCallback(SDIO_HandleTypeDef *hsdio, - pSDIO_IdentifyCardCallbackTypeDef pCallback); -/** - * @} - */ - -/** @defgroup SDIO_Exported_Functions_Group5 Peripheral State and Errors functions - * @{ - */ -HAL_SDIO_StateTypeDef HAL_SDIO_GetState(const SDIO_HandleTypeDef *hsdio); -uint32_t HAL_SDIO_GetError(const SDIO_HandleTypeDef *hsdio); -/** - * @} - */ - -/** @defgroup SDIO_Exported_Functions_Group6 Peripheral IO interrupt - * @{ - */ -HAL_StatusTypeDef HAL_SDIO_EnableIOFunctionInterrupt(SDIO_HandleTypeDef *hsdio, uint32_t IOFunction); -HAL_StatusTypeDef HAL_SDIO_DisableIOFunctionInterrupt(SDIO_HandleTypeDef *hsdio, uint32_t IOFunction); - -HAL_StatusTypeDef HAL_SDIO_EnableIOFunction(SDIO_HandleTypeDef *hsdio, uint32_t IOFunction); -HAL_StatusTypeDef HAL_SDIO_DisableIOFunction(SDIO_HandleTypeDef *hsdio, uint32_t IOFunction); - -HAL_StatusTypeDef HAL_SDIO_SelectIOFunction(SDIO_HandleTypeDef *hsdio, uint32_t IOFunction); -HAL_StatusTypeDef HAL_SDIO_AbortIOFunction(SDIO_HandleTypeDef *hsdio, uint32_t IOFunction); - -HAL_StatusTypeDef HAL_SDIO_EnableIOAsynInterrupt(SDIO_HandleTypeDef *hsdio); -HAL_StatusTypeDef HAL_SDIO_DisableIOAsynInterrupt(SDIO_HandleTypeDef *hsdio); - -/** - * @} - */ - -/* Private types -----------------------------------------------------------------------------------------------------*/ -/** @defgroup SDIO_Private_Types SDIO Private Types - * @{ - */ - -/** - * @} - */ - -/* Private defines ---------------------------------------------------------------------------------------------------*/ -/** @defgroup SDIO_Private_Defines SDIO Private Defines - * @{ - */ - -/** - * @} - */ - -/* Private variables -------------------------------------------------------------------------------------------------*/ -/** @defgroup SDIO_Private_Variables SDIO Private Variables - * @{ - */ - -/** - * @} - */ - -/* Private constants -------------------------------------------------------------------------------------------------*/ -/** @defgroup SDIO_Private_Constants SDIO Private Constants - * @{ - */ - -/** - * @} - */ - -/* Private macros ----------------------------------------------------------------------------------------------------*/ -/** @defgroup SDIO_Private_Macros SDIO Private Macros - * @{ - */ - -/** - * @} - */ - -/* Private functions prototypes --------------------------------------------------------------------------------------*/ -/** @defgroup SDIO_Private_Functions_Prototypes SDIO Private Functions Prototypes - * @{ - */ - -/** - * @} - */ - -/* Private functions -------------------------------------------------------------------------------------------------*/ -/** @defgroup SDIO_Private_Functions SDIO Private Functions - * @{ - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ -#endif /* SDMMC1 || SDMMC2 */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - - -#endif /* STM32N6xx_HAL_SDIO_H */ - Index: trunk/firmware/FSBL/CubeMX/Drivers/STM32N6xx_HAL_Driver/Inc/stm32n6xx_ll_dlyb.h =================================================================== --- trunk/firmware/FSBL/CubeMX/Drivers/STM32N6xx_HAL_Driver/Inc/stm32n6xx_ll_dlyb.h (revision 37) +++ (revision ) @@ -1,118 +1,0 @@ -/** - ****************************************************************************** - * @file stm32n6xx_ll_dlyb.h - * @author MCD Application Team - * @brief Header file of DelayBlock module. - ****************************************************************************** - * @attention - * - * Copyright (c) 2023 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef STM32N6xx_LL_DLYB_H -#define STM32N6xx_LL_DLYB_H - -#ifdef __cplusplus -extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32n6xx_hal_def.h" - -/** @addtogroup STM32N6xx_LL_Driver - * @{ - */ - -#if defined(HAL_SD_MODULE_ENABLED) || defined(HAL_OSPI_MODULE_ENABLED) || defined(HAL_XSPI_MODULE_ENABLED) -#if defined (DLYB_SDMMC1) || defined (DLYB_SDMMC2) || defined (DLYB_OCTOSPI1) || defined (DLYB_OCTOSPI2) - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup DLYB_LL DLYB - * @{ - */ - -/** - * @brief DLYB Configuration Structure definition - */ - -typedef struct -{ - uint32_t Units; /*!< Specifies the Delay of a unit delay cell. - This parameter can be a value between 0 and DLYB_MAX_UNIT */ - - uint32_t PhaseSel; /*!< Specifies the Phase for the output clock. - This parameter can be a value between 0 and DLYB_MAX_SELECT */ -} LL_DLYB_CfgTypeDef; - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup DLYB_Exported_Constants DLYB Exported Constants - * @{ - */ - -#define DLYB_MAX_UNIT ((uint32_t)0x00000080U) /*!< Max UNIT value (128) */ -#define DLYB_MAX_SELECT ((uint32_t)0x0000000CU) /*!< Max SELECT value (12) */ - -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup DLYB_LL_Exported_Functions DLYB Exported Functions - * @{ - */ - -/** @defgroup DLYB_LL_Configuration Configuration functions - * @{ - */ - -/** - * @brief DLYB Enable - * @param DLYBx DLYB Instance - * @retval None - */ - - -/** - * @} - */ - -/** @defgroup DLYB_Control_Functions DLYB Control functions - * @{ - */ - -uint32_t LL_DLYB_SetDelayNormalSpeed(DLYB_TypeDef *DLYBx, const LL_DLYB_CfgTypeDef *pdlyb_cfg); -uint32_t LL_DLYB_SetDelayHighSpeed(DLYB_TypeDef *DLYBx, const uint32_t SDMMC_RX_TAP_SEL); - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#endif /* DLYB_SDMMC1 || DLYB_SDMMC2 || DLYB_OCTOSPI1 || DLYB_OCTOSPI2 */ -#endif /* HAL_SD_MODULE_ENABLED || HAL_OSPI_MODULE_ENABLED || HAL_XSPI_MODULE_ENABLED */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* STM32N6xx_LL_DLYB_H */ Index: trunk/firmware/FSBL/CubeMX/Drivers/STM32N6xx_HAL_Driver/Inc/stm32n6xx_ll_sdmmc.h =================================================================== --- trunk/firmware/FSBL/CubeMX/Drivers/STM32N6xx_HAL_Driver/Inc/stm32n6xx_ll_sdmmc.h (revision 37) +++ (revision ) @@ -1,1321 +1,0 @@ -/** - ****************************************************************************** - * @file stm32n6xx_ll_sdmmc.h - * @author MCD Application Team - * @brief Header file of SDMMC HAL module. - ****************************************************************************** - * @attention - * - * Copyright (c) 2023 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef STM32N6xx_LL_SDMMC_H -#define STM32N6xx_LL_SDMMC_H - -#ifdef __cplusplus -extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32n6xx_hal_def.h" - -/** @addtogroup STM32N6xx_Driver - * @{ - */ -#if defined (SDMMC1) || defined (SDMMC2) -/** @addtogroup SDMMC_LL - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup SDMMC_LL_Exported_Types SDMMC_LL Exported Types - * @{ - */ - -/** - * @brief SDMMC Configuration Structure definition - */ -typedef struct -{ - uint32_t ClockEdge; /*!< Specifies the SDMMC_CCK clock transition on which Data and Command change. - This parameter can be a value of @ref SDMMC_LL_Clock_Edge */ - - uint32_t ClockPowerSave; /*!< Specifies whether SDMMC Clock output is enabled or - disabled when the bus is idle. - This parameter can be a value of @ref SDMMC_LL_Clock_Power_Save */ - - uint32_t BusWide; /*!< Specifies the SDMMC bus width. - This parameter can be a value of @ref SDMMC_LL_Bus_Wide */ - - uint32_t HardwareFlowControl; /*!< Specifies whether the SDMMC hardware flow control is enabled or disabled. - This parameter can be a value of @ref SDMMC_LL_Hardware_Flow_Control */ - - uint32_t ClockDiv; /*!< Specifies the clock frequency of the SDMMC controller. - This parameter can be a value between Min_Data = 0 and Max_Data = 1023 */ - -#if (USE_SD_TRANSCEIVER != 0U) || (USE_SDIO_TRANSCEIVER != 0U) - uint32_t TranceiverPresent; /*!< Specifies if there is a 1V8 Transceiver/Switcher. - This parameter can be a value of @ref SDMMC_LL_TRANSCEIVER_PRESENT */ -#endif /* USE_SD_TRANSCEIVER || USE_SDIO_TRANSCEIVER */ -} SDMMC_InitTypeDef; - - -/** - * @brief SDMMC Command Control structure - */ -typedef struct -{ - uint32_t Argument; /*!< Specifies the SDMMC command argument which is sent - to a card as part of a command message. If a command - contains an argument, it must be loaded into this register - before writing the command to the command register. */ - - uint32_t CmdIndex; /*!< Specifies the SDMMC command index. It must be Min_Data = 0 and - Max_Data = 64 */ - - uint32_t Response; /*!< Specifies the SDMMC response type. - This parameter can be a value of @ref SDMMC_LL_Response_Type */ - - uint32_t WaitForInterrupt; /*!< Specifies whether SDMMC wait for interrupt request is - enabled or disabled. - This parameter can be a value of @ref SDMMC_LL_Wait_Interrupt_State */ - - uint32_t CPSM; /*!< Specifies whether SDMMC Command path state machine (CPSM) - is enabled or disabled. - This parameter can be a value of @ref SDMMC_LL_CPSM_State */ -} SDMMC_CmdInitTypeDef; - - -/** - * @brief SDMMC Data Control structure - */ -typedef struct -{ - uint32_t DataTimeOut; /*!< Specifies the data timeout period in card bus clock periods. */ - - uint32_t DataLength; /*!< Specifies the number of data bytes to be transferred. */ - - uint32_t DataBlockSize; /*!< Specifies the data block size for block transfer. - This parameter can be a value of @ref SDMMC_LL_Data_Block_Size */ - - uint32_t TransferDir; /*!< Specifies the data transfer direction, whether the transfer - is a read or write. - This parameter can be a value of @ref SDMMC_LL_Transfer_Direction */ - - uint32_t TransferMode; /*!< Specifies whether data transfer is in stream or block mode. - This parameter can be a value of @ref SDMMC_LL_Transfer_Type */ - - uint32_t DPSM; /*!< Specifies whether SDMMC Data path state machine (DPSM) - is enabled or disabled. - This parameter can be a value of @ref SDMMC_LL_DPSM_State */ -} SDMMC_DataInitTypeDef; - -/** @defgroup SDEx_Exported_Types_Group1 SD Card Internal DMA Buffer structure - * @{ - */ -typedef struct -{ - __IO uint32_t IDMALAR; /*!< SDMMC DMA linked list configuration register */ - __IO uint32_t IDMABASER; /*!< SDMMC DMA buffer base address register */ - __IO uint32_t IDMABSIZE; /*!< SDMMC DMA buffer size register */ -} SDMMC_DMALinkNodeTypeDef; - -typedef struct -{ - uint32_t BufferAddress; /*!< Node Buffer address */ - uint32_t BufferSize ; /*!< Node Buffer size */ -} SDMMC_DMALinkNodeConfTypeDef; - -typedef struct -{ - SDMMC_DMALinkNodeTypeDef *pHeadNode; /*!< Linked List Node Head */ - SDMMC_DMALinkNodeTypeDef *pTailNode; /*!< Linked List Node Head */ - uint32_t NodesCounter ; /*!< Node is ready for execution */ -} SDMMC_DMALinkedListTypeDef; -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup SDMMC_LL_Exported_Constants SDMMC_LL Exported Constants - * @{ - */ -#define SDMMC_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */ -#define SDMMC_ERROR_CMD_CRC_FAIL ((uint32_t)0x00000001U) /*!< Command response received (but CRC check failed) */ -#define SDMMC_ERROR_DATA_CRC_FAIL ((uint32_t)0x00000002U) /*!< Data block sent/received (CRC check failed) */ -#define SDMMC_ERROR_CMD_RSP_TIMEOUT ((uint32_t)0x00000004U) /*!< Command response timeout */ -#define SDMMC_ERROR_DATA_TIMEOUT ((uint32_t)0x00000008U) /*!< Data timeout */ -#define SDMMC_ERROR_TX_UNDERRUN ((uint32_t)0x00000010U) /*!< Transmit FIFO underrun */ -#define SDMMC_ERROR_RX_OVERRUN ((uint32_t)0x00000020U) /*!< Receive FIFO overrun */ -#define SDMMC_ERROR_ADDR_MISALIGNED ((uint32_t)0x00000040U) /*!< Misaligned address */ -#define SDMMC_ERROR_BLOCK_LEN_ERR ((uint32_t)0x00000080U) /*!< Transferred block length is not allowed for the card or the number of transferred bytes does not match the block length */ -#define SDMMC_ERROR_ERASE_SEQ_ERR ((uint32_t)0x00000100U) /*!< An error in the sequence of erase command occurs */ -#define SDMMC_ERROR_BAD_ERASE_PARAM ((uint32_t)0x00000200U) /*!< An invalid selection for erase groups */ -#define SDMMC_ERROR_WRITE_PROT_VIOLATION ((uint32_t)0x00000400U) /*!< Attempt to program a write protect block */ -#define SDMMC_ERROR_LOCK_UNLOCK_FAILED ((uint32_t)0x00000800U) /*!< Sequence or password error has been detected in unlock command or if there was an attempt to access a locked card */ -#define SDMMC_ERROR_COM_CRC_FAILED ((uint32_t)0x00001000U) /*!< CRC check of the previous command failed */ -#define SDMMC_ERROR_ILLEGAL_CMD ((uint32_t)0x00002000U) /*!< Command is not legal for the card state */ -#define SDMMC_ERROR_CARD_ECC_FAILED ((uint32_t)0x00004000U) /*!< Card internal ECC was applied but failed to correct the data */ -#define SDMMC_ERROR_CC_ERR ((uint32_t)0x00008000U) /*!< Internal card controller error */ -#define SDMMC_ERROR_GENERAL_UNKNOWN_ERR ((uint32_t)0x00010000U) /*!< General or unknown error */ -#define SDMMC_ERROR_STREAM_READ_UNDERRUN ((uint32_t)0x00020000U) /*!< The card could not sustain data reading in stream rmode */ -#define SDMMC_ERROR_STREAM_WRITE_OVERRUN ((uint32_t)0x00040000U) /*!< The card could not sustain data programming in stream mode */ -#define SDMMC_ERROR_CID_CSD_OVERWRITE ((uint32_t)0x00080000U) /*!< CID/CSD overwrite error */ -#define SDMMC_ERROR_WP_ERASE_SKIP ((uint32_t)0x00100000U) /*!< Only partial address space was erased */ -#define SDMMC_ERROR_CARD_ECC_DISABLED ((uint32_t)0x00200000U) /*!< Command has been executed without using internal ECC */ -#define SDMMC_ERROR_ERASE_RESET ((uint32_t)0x00400000U) /*!< Erase sequence was cleared before executing because an out of erase sequence command was received */ -#define SDMMC_ERROR_AKE_SEQ_ERR ((uint32_t)0x00800000U) /*!< Error in sequence of authentication */ -#define SDMMC_ERROR_INVALID_VOLTRANGE ((uint32_t)0x01000000U) /*!< Error in case of invalid voltage range */ -#define SDMMC_ERROR_ADDR_OUT_OF_RANGE ((uint32_t)0x02000000U) /*!< Error when addressed block is out of range */ -#define SDMMC_ERROR_REQUEST_NOT_APPLICABLE ((uint32_t)0x04000000U) /*!< Error when command request is not applicable */ -#define SDMMC_ERROR_INVALID_PARAMETER ((uint32_t)0x08000000U) /*!< the used parameter is not valid */ -#define SDMMC_ERROR_UNSUPPORTED_FEATURE ((uint32_t)0x10000000U) /*!< Error when feature is not insupported */ -#define SDMMC_ERROR_BUSY ((uint32_t)0x20000000U) /*!< Error when transfer process is busy */ -#define SDMMC_ERROR_DMA ((uint32_t)0x40000000U) /*!< Error while DMA transfer */ -#define SDMMC_ERROR_TIMEOUT ((uint32_t)0x80000000U) /*!< Timeout error */ - -/** - * @brief Masks for R5 Response - */ -/** this is the reserved for future use in spec RFU */ -#define SDMMC_SDIO_R5_ERROR ((uint32_t)0x00000400U) -/** Out of range error */ -#define SDMMC_SDIO_R5_OUT_OF_RANGE ((uint32_t)0x00000100U) -/** Invalid function number */ -#define SDMMC_SDIO_R5_INVALID_FUNCTION_NUMBER ((uint32_t)0x00000200U) -/** General or an unknown error */ -#define SDMMC_SDIO_R5_GENERAL_UNKNOWN_ERROR ((uint32_t)0x00000800U) -/** SDIO Card current state - * 00=DIS (card not selected) - * 01=CMD (data line free) - * 10=TRN (transfer on data lines) */ -#define SDMMC_SDIO_R5_IO_CURRENT_STATE ((uint32_t)0x00003000U) -/** Illegal command error */ -#define SDMMC_SDIO_R5_ILLEGAL_CMD ((uint32_t)0x00004000U) -/** CRC check of previous cmd failed */ -#define SDMMC_SDIO_R5_COM_CRC_FAILED ((uint32_t)0x00008000U) - -#define SDMMC_SDIO_R5_ERRORBITS (SDMMC_SDIO_R5_COM_CRC_FAILED | \ - SDMMC_SDIO_R5_ILLEGAL_CMD | \ - SDMMC_SDIO_R5_GENERAL_UNKNOWN_ERROR | \ - SDMMC_SDIO_R5_INVALID_FUNCTION_NUMBER | \ - SDMMC_SDIO_R5_OUT_OF_RANGE) -/** - * @brief SDIO_CMD53_MODE - */ -#define SDMMC_SDIO_MODE_BYTE 0x00U /*!< Byte Mode */ -#define SDMMC_SDIO_MODE_BLOCK 0x01U /*!< Block Mode */ - -/** - * @brief SDIO_CMD53_OP_CODE - */ -#define SDMMC_SDIO_NO_INC 0x00U /*!< No auto indentation */ -#define SDMMC_SDIO_AUTO_INC 0x01U /*!< Auto indentation */ - -/** - * @brief SDIO_CMD53_RAW - */ -#define SDMMC_SDIO_WO 0x00U /*!< Write only Flag */ -#define SDMMC_SDIO_RAW 0x01U /*!< Read after write Flag */ - -/** - * @brief SDMMC Commands Index - */ -#define SDMMC_CMD_GO_IDLE_STATE 0U /*!< Resets the SD memory card. */ -#define SDMMC_CMD_SEND_OP_COND 1U /*!< Sends host capacity support information and activates the card's initialization process. */ -#define SDMMC_CMD_ALL_SEND_CID 2U /*!< Asks any card connected to the host to send the CID numbers on the CMD line. */ -#define SDMMC_CMD_SET_REL_ADDR 3U /*!< Asks the card to publish a new relative address (RCA). */ -#define SDMMC_CMD_SET_DSR 4U /*!< Programs the DSR of all cards. */ -#define SDMMC_CMD_SDMMC_SEN_OP_COND 5U /*!< Sends host capacity support information (HCS) and asks the accessed card to send its operating condition register (OCR) content in the response on the CMD line.*/ -#define SDMMC_CMD_HS_SWITCH 6U /*!< Checks switchable function (mode 0) and switch card function (mode 1). */ -#define SDMMC_CMD_SEL_DESEL_CARD 7U /*!< Selects the card by its own relative address and gets deselected by any other address */ -#define SDMMC_CMD_HS_SEND_EXT_CSD 8U /*!< Sends SD Memory Card interface condition, which includes host supply voltage information and asks the card whether card supports voltage. */ -#define SDMMC_CMD_SEND_CSD 9U /*!< Addressed card sends its card specific data (CSD) on the CMD line. */ -#define SDMMC_CMD_SEND_CID 10U /*!< Addressed card sends its card identification (CID) on the CMD line. */ -#define SDMMC_CMD_VOLTAGE_SWITCH 11U /*!< SD card Voltage switch to 1.8V mode. */ -#define SDMMC_CMD_STOP_TRANSMISSION 12U /*!< Forces the card to stop transmission. */ -#define SDMMC_CMD_SEND_STATUS 13U /*!< Addressed card sends its status register. */ -#define SDMMC_CMD_HS_BUSTEST_READ 14U /*!< Reserved */ -#define SDMMC_CMD_GO_INACTIVE_STATE 15U /*!< Sends an addressed card into the inactive state. */ -#define SDMMC_CMD_SET_BLOCKLEN 16U /*!< Sets the block length (in bytes for SDSC) for all following block commands (read, write, lock). Default block length is fixed to 512 Bytes. Not effective */ -/*!< for SDHS and SDXC. */ -#define SDMMC_CMD_READ_SINGLE_BLOCK 17U /*!< Reads single block of size selected by SET_BLOCKLEN in case of SDSC, and a block of fixed 512 bytes in case of SDHC and SDXC. */ -#define SDMMC_CMD_READ_MULT_BLOCK 18U /*!< Continuously transfers data blocks from card to host until interrupted by STOP_TRANSMISSION command. */ -#define SDMMC_CMD_HS_BUSTEST_WRITE 19U /*!< 64 bytes tuning pattern is sent for SDR50 and SDR104. */ -#define SDMMC_CMD_WRITE_DAT_UNTIL_STOP 20U /*!< Speed class control command. */ -#define SDMMC_CMD_SET_BLOCK_COUNT 23U /*!< Specify block count for CMD18 and CMD25. */ -#define SDMMC_CMD_WRITE_SINGLE_BLOCK 24U /*!< Writes single block of size selected by SET_BLOCKLEN in case of SDSC, and a block of fixed 512 bytes in case of SDHC and SDXC. */ -#define SDMMC_CMD_WRITE_MULT_BLOCK 25U /*!< Continuously writes blocks of data until a STOP_TRANSMISSION follows. */ -#define SDMMC_CMD_PROG_CID 26U /*!< Reserved for manufacturers. */ -#define SDMMC_CMD_PROG_CSD 27U /*!< Programming of the programmable bits of the CSD. */ -#define SDMMC_CMD_SET_WRITE_PROT 28U /*!< Sets the write protection bit of the addressed group. */ -#define SDMMC_CMD_CLR_WRITE_PROT 29U /*!< Clears the write protection bit of the addressed group. */ -#define SDMMC_CMD_SEND_WRITE_PROT 30U /*!< Asks the card to send the status of the write protection bits. */ -#define SDMMC_CMD_SD_ERASE_GRP_START 32U /*!< Sets the address of the first write block to be erased. (For SD card only). */ -#define SDMMC_CMD_SD_ERASE_GRP_END 33U /*!< Sets the address of the last write block of the continuous range to be erased. */ -#define SDMMC_CMD_ERASE_GRP_START 35U /*!< Sets the address of the first write block to be erased. Reserved for each command system set by switch function command (CMD6). */ -#define SDMMC_CMD_ERASE_GRP_END 36U /*!< Sets the address of the last write block of the continuous range to be erased. Reserved for each command system set by switch function command (CMD6). */ -#define SDMMC_CMD_ERASE 38U /*!< Reserved for SD security applications. */ -#define SDMMC_CMD_FAST_IO 39U /*!< SD card doesn't support it (Reserved). */ -#define SDMMC_CMD_GO_IRQ_STATE 40U /*!< SD card doesn't support it (Reserved). */ -#define SDMMC_CMD_LOCK_UNLOCK 42U /*!< Sets/resets the password or lock/unlock the card. The size of the data block is set by the SET_BLOCK_LEN command. */ -#define SDMMC_CMD_APP_CMD 55U /*!< Indicates to the card that the next command is an application specific command rather than a standard command. */ -#define SDMMC_CMD_GEN_CMD 56U /*!< Used either to transfer a data block to the card or to get a data block from the card for general purpose/application specific commands. */ -#define SDMMC_CMD_NO_CMD 64U /*!< No command */ - -/** - * @brief Following commands are SD Card Specific commands. - * SDMMC_APP_CMD should be sent before sending these commands. - */ -#define SDMMC_CMD_APP_SD_SET_BUSWIDTH 6U /*!< (ACMD6) Defines the data bus width to be used for data transfer. The allowed data bus widths are given in SCR register. */ -#define SDMMC_CMD_SD_APP_STATUS 13U /*!< (ACMD13) Sends the SD status. */ -#define SDMMC_CMD_SD_APP_SEND_NUM_WRITE_BLOCKS 22U /*!< (ACMD22) Sends the number of the written (without errors) write blocks. Responds with 32bit+CRC data block. */ -#define SDMMC_CMD_SD_APP_OP_COND 41U /*!< (ACMD41) Sends host capacity support information (HCS) and asks the accessed card to send its operating condition register (OCR) content in the response on the CMD line. */ -#define SDMMC_CMD_SD_APP_SET_CLR_CARD_DETECT 42U /*!< (ACMD42) Connect/Disconnect the 50 KOhm pull-up resistor on CD/DAT3 (pin 1) of the card */ -#define SDMMC_CMD_SD_APP_SEND_SCR 51U /*!< Reads the SD Configuration Register (SCR). */ -#define SDMMC_CMD_SDMMC_RW_DIRECT 52U /*!< For SD I/O card only, reserved for security specification. */ -#define SDMMC_CMD_SDMMC_RW_EXTENDED 53U /*!< For SD I/O card only, reserved for security specification. */ - -/** - * @brief Following commands are MMC Specific commands. - */ -#define SDMMC_CMD_MMC_SLEEP_AWAKE 5U /*!< Toggle the device between Sleep state and Standby state. */ - -/** - * @brief Following commands are SD Card Specific security commands. - * SDMMC_CMD_APP_CMD should be sent before sending these commands. - */ -#define SDMMC_CMD_SD_APP_GET_MKB 43U -#define SDMMC_CMD_SD_APP_GET_MID 44U -#define SDMMC_CMD_SD_APP_SET_CER_RN1 45U -#define SDMMC_CMD_SD_APP_GET_CER_RN2 46U -#define SDMMC_CMD_SD_APP_SET_CER_RES2 47U -#define SDMMC_CMD_SD_APP_GET_CER_RES1 48U -#define SDMMC_CMD_SD_APP_SECURE_READ_MULTIPLE_BLOCK 18U -#define SDMMC_CMD_SD_APP_SECURE_WRITE_MULTIPLE_BLOCK 25U -#define SDMMC_CMD_SD_APP_SECURE_ERASE 38U -#define SDMMC_CMD_SD_APP_CHANGE_SECURE_AREA 49U -#define SDMMC_CMD_SD_APP_SECURE_WRITE_MKB 48U - -/** - * @brief Masks for errors Card Status R1 (OCR Register) - */ -#define SDMMC_OCR_ADDR_OUT_OF_RANGE ((uint32_t)0x80000000U) -#define SDMMC_OCR_ADDR_MISALIGNED ((uint32_t)0x40000000U) -#define SDMMC_OCR_BLOCK_LEN_ERR ((uint32_t)0x20000000U) -#define SDMMC_OCR_ERASE_SEQ_ERR ((uint32_t)0x10000000U) -#define SDMMC_OCR_BAD_ERASE_PARAM ((uint32_t)0x08000000U) -#define SDMMC_OCR_WRITE_PROT_VIOLATION ((uint32_t)0x04000000U) -#define SDMMC_OCR_LOCK_UNLOCK_FAILED ((uint32_t)0x01000000U) -#define SDMMC_OCR_COM_CRC_FAILED ((uint32_t)0x00800000U) -#define SDMMC_OCR_ILLEGAL_CMD ((uint32_t)0x00400000U) -#define SDMMC_OCR_CARD_ECC_FAILED ((uint32_t)0x00200000U) -#define SDMMC_OCR_CC_ERROR ((uint32_t)0x00100000U) -#define SDMMC_OCR_GENERAL_UNKNOWN_ERROR ((uint32_t)0x00080000U) -#define SDMMC_OCR_STREAM_READ_UNDERRUN ((uint32_t)0x00040000U) -#define SDMMC_OCR_STREAM_WRITE_OVERRUN ((uint32_t)0x00020000U) -#define SDMMC_OCR_CID_CSD_OVERWRITE ((uint32_t)0x00010000U) -#define SDMMC_OCR_WP_ERASE_SKIP ((uint32_t)0x00008000U) -#define SDMMC_OCR_CARD_ECC_DISABLED ((uint32_t)0x00004000U) -#define SDMMC_OCR_ERASE_RESET ((uint32_t)0x00002000U) -#define SDMMC_OCR_AKE_SEQ_ERROR ((uint32_t)0x00000008U) -#define SDMMC_OCR_ERRORBITS ((uint32_t)0xFDFFE008U) - -/** - * @brief Masks for R6 Response - */ -#define SDMMC_R6_GENERAL_UNKNOWN_ERROR ((uint32_t)0x00002000U) -#define SDMMC_R6_ILLEGAL_CMD ((uint32_t)0x00004000U) -#define SDMMC_R6_COM_CRC_FAILED ((uint32_t)0x00008000U) - -#define SDMMC_VOLTAGE_WINDOW_SD ((uint32_t)0x80100000U) -#define SDMMC_HIGH_CAPACITY ((uint32_t)0x40000000U) -#define SDMMC_STD_CAPACITY ((uint32_t)0x00000000U) -#define SDMMC_CHECK_PATTERN ((uint32_t)0x000001AAU) -#define SD_SWITCH_1_8V_CAPACITY ((uint32_t)0x01000000U) -#define SDMMC_DDR50_SWITCH_PATTERN ((uint32_t)0x80FFFF04U) -#define SDMMC_SDR104_SWITCH_PATTERN ((uint32_t)0x80FF1F03U) -#define SDMMC_SDR50_SWITCH_PATTERN ((uint32_t)0x80FF1F02U) -#define SDMMC_SDR25_SWITCH_PATTERN ((uint32_t)0x80FFFF01U) -#define SDMMC_SDR12_SWITCH_PATTERN ((uint32_t)0x80FFFF00U) - -#define SDMMC_MAX_VOLT_TRIAL ((uint32_t)0x0000FFFFU) - -#define SDMMC_MAX_TRIAL ((uint32_t)0x0000FFFFU) - -#define SDMMC_ALLZERO ((uint32_t)0x00000000U) - -#define SDMMC_WIDE_BUS_SUPPORT ((uint32_t)0x00040000U) -#define SDMMC_SINGLE_BUS_SUPPORT ((uint32_t)0x00010000U) -#define SDMMC_CARD_LOCKED ((uint32_t)0x02000000U) - -#ifndef SDMMC_DATATIMEOUT /*Hardware Data Timeout (cycles) */ -#define SDMMC_DATATIMEOUT ((uint32_t)0xFFFFFFFFU) -#endif /* SDMMC_DATATIMEOUT */ - -#ifndef SDMMC_SWDATATIMEOUT /*Software Data Timeout (ms) */ -#define SDMMC_SWDATATIMEOUT ((uint32_t)0xFFFFFFFFU) -#endif /* SDMMC_SWDATATIMEOUT */ - -#define SDMMC_0TO7BITS ((uint32_t)0x000000FFU) -#define SDMMC_8TO15BITS ((uint32_t)0x0000FF00U) -#define SDMMC_16TO23BITS ((uint32_t)0x00FF0000U) -#define SDMMC_24TO31BITS ((uint32_t)0xFF000000U) -#define SDMMC_MAX_DATA_LENGTH ((uint32_t)0x01FFFFFFU) - -#define SDMMC_HALFFIFO ((uint32_t)0x00000008U) -#define SDMMC_HALFFIFOBYTES ((uint32_t)0x00000020U) - -/* SDMMC FIFO Size */ -#define SDMMC_FIFO_SIZE 512U -/** - * @brief Command Class supported - */ -#define SDMMC_CCCC_ERASE ((uint32_t)0x00000020U) - -#define SDMMC_CMDTIMEOUT ((uint32_t)5000U) /* Command send and response timeout */ -#define SDMMC_MAXERASETIMEOUT ((uint32_t)63000U) /* Max erase Timeout 63 s */ -#define SDMMC_STOPTRANSFERTIMEOUT ((uint32_t)100000000U) /* Timeout for STOP TRANSMISSION command */ - -/** @defgroup SDMMC_LL_Clock_Edge Clock Edge - * @{ - */ -#define SDMMC_CLOCK_EDGE_RISING ((uint32_t)0x00000000U) -#define SDMMC_CLOCK_EDGE_FALLING SDMMC_CLKCR_NEGEDGE - -#define IS_SDMMC_CLOCK_EDGE(EDGE) (((EDGE) == SDMMC_CLOCK_EDGE_RISING) || \ - ((EDGE) == SDMMC_CLOCK_EDGE_FALLING)) -/** - * @} - */ - -/** @defgroup SDMMC_LL_Clock_Power_Save Clock Power Saving - * @{ - */ -#define SDMMC_CLOCK_POWER_SAVE_DISABLE ((uint32_t)0x00000000U) -#define SDMMC_CLOCK_POWER_SAVE_ENABLE SDMMC_CLKCR_PWRSAV - -#define IS_SDMMC_CLOCK_POWER_SAVE(SAVE) (((SAVE) == SDMMC_CLOCK_POWER_SAVE_DISABLE) || \ - ((SAVE) == SDMMC_CLOCK_POWER_SAVE_ENABLE)) -/** - * @} - */ - -/** @defgroup SDMMC_LL_Bus_Wide Bus Width - * @{ - */ -#define SDMMC_BUS_WIDE_1B ((uint32_t)0x00000000U) -#define SDMMC_BUS_WIDE_4B SDMMC_CLKCR_WIDBUS_0 -#define SDMMC_BUS_WIDE_8B SDMMC_CLKCR_WIDBUS_1 - -#define IS_SDMMC_BUS_WIDE(WIDE) (((WIDE) == SDMMC_BUS_WIDE_1B) || \ - ((WIDE) == SDMMC_BUS_WIDE_4B) || \ - ((WIDE) == SDMMC_BUS_WIDE_8B)) -/** - * @} - */ - -/** @defgroup SDMMC_LL_Speed_Mode - * @{ - */ -#define SDMMC_SPEED_MODE_AUTO ((uint32_t)0x00000000U) -#define SDMMC_SPEED_MODE_DEFAULT ((uint32_t)0x00000001U) -#define SDMMC_SPEED_MODE_HIGH ((uint32_t)0x00000002U) -#define SDMMC_SPEED_MODE_ULTRA ((uint32_t)0x00000003U) -#define SDMMC_SPEED_MODE_ULTRA_SDR104 SDMMC_SPEED_MODE_ULTRA -#define SDMMC_SPEED_MODE_DDR ((uint32_t)0x00000004U) -#define SDMMC_SPEED_MODE_ULTRA_SDR50 ((uint32_t)0x00000005U) - -#define IS_SDMMC_SPEED_MODE(MODE) (((MODE) == SDMMC_SPEED_MODE_AUTO) || \ - ((MODE) == SDMMC_SPEED_MODE_DEFAULT) || \ - ((MODE) == SDMMC_SPEED_MODE_HIGH) || \ - ((MODE) == SDMMC_SPEED_MODE_ULTRA) || \ - ((MODE) == SDMMC_SPEED_MODE_ULTRA_SDR50) || \ - ((MODE) == SDMMC_SPEED_MODE_DDR)) - -/** - * @} - */ - -/** @defgroup SDMMC_LL_Hardware_Flow_Control Hardware Flow Control - * @{ - */ -#define SDMMC_HARDWARE_FLOW_CONTROL_DISABLE ((uint32_t)0x00000000U) -#define SDMMC_HARDWARE_FLOW_CONTROL_ENABLE SDMMC_CLKCR_HWFC_EN - -#define IS_SDMMC_HARDWARE_FLOW_CONTROL(CONTROL) (((CONTROL) == SDMMC_HARDWARE_FLOW_CONTROL_DISABLE) || \ - ((CONTROL) == SDMMC_HARDWARE_FLOW_CONTROL_ENABLE)) -/** - * @} - */ - -/** @defgroup SDMMC_LL_Clock_Division Clock Division - * @{ - */ -/* SDMMC_CK frequency = SDMMCCLK / [2 * CLKDIV] */ -#define IS_SDMMC_CLKDIV(DIV) ((DIV) < 0x400U) -/** - * @} - */ - -/** @defgroup SDMMC_LL_TRANSCEIVER_PRESENT Transceiver Present - * @{ - */ -#define SDMMC_TRANSCEIVER_UNKNOWN ((uint32_t)0x00000000U) -#define SDMMC_TRANSCEIVER_NOT_PRESENT ((uint32_t)0x00000001U) -#define SDMMC_TRANSCEIVER_PRESENT ((uint32_t)0x00000002U) - -/** - * @} - */ - -/** @defgroup SDMMC_LL_Command_Index Command Index - * @{ - */ -#define IS_SDMMC_CMD_INDEX(INDEX) ((INDEX) < 0x40U) -/** - * @} - */ - -/** @defgroup SDMMC_LL_Response_Type Response Type - * @{ - */ -#define SDMMC_RESPONSE_NO ((uint32_t)0x00000000U) -#define SDMMC_RESPONSE_SHORT SDMMC_CMD_WAITRESP_0 -#define SDMMC_RESPONSE_LONG SDMMC_CMD_WAITRESP - -#define IS_SDMMC_RESPONSE(RESPONSE) (((RESPONSE) == SDMMC_RESPONSE_NO) || \ - ((RESPONSE) == SDMMC_RESPONSE_SHORT) || \ - ((RESPONSE) == SDMMC_RESPONSE_LONG)) -/** - * @} - */ - -/** @defgroup SDMMC_LL_Wait_Interrupt_State Wait Interrupt - * @{ - */ -#define SDMMC_WAIT_NO ((uint32_t)0x00000000U) -#define SDMMC_WAIT_IT SDMMC_CMD_WAITINT -#define SDMMC_WAIT_PEND SDMMC_CMD_WAITPEND - -#define IS_SDMMC_WAIT(WAIT) (((WAIT) == SDMMC_WAIT_NO) || \ - ((WAIT) == SDMMC_WAIT_IT) || \ - ((WAIT) == SDMMC_WAIT_PEND)) -/** - * @} - */ - -/** @defgroup SDMMC_LL_CPSM_State CPSM State - * @{ - */ -#define SDMMC_CPSM_DISABLE ((uint32_t)0x00000000U) -#define SDMMC_CPSM_ENABLE SDMMC_CMD_CPSMEN - -#define IS_SDMMC_CPSM(CPSM) (((CPSM) == SDMMC_CPSM_DISABLE) || \ - ((CPSM) == SDMMC_CPSM_ENABLE)) -/** - * @} - */ - -/** @defgroup SDMMC_LL_Response_Registers Response Register - * @{ - */ -#define SDMMC_RESP1 ((uint32_t)0x00000000U) -#define SDMMC_RESP2 ((uint32_t)0x00000004U) -#define SDMMC_RESP3 ((uint32_t)0x00000008U) -#define SDMMC_RESP4 ((uint32_t)0x0000000CU) - -#define IS_SDMMC_RESP(RESP) (((RESP) == SDMMC_RESP1) || \ - ((RESP) == SDMMC_RESP2) || \ - ((RESP) == SDMMC_RESP3) || \ - ((RESP) == SDMMC_RESP4)) - -/** @defgroup SDMMC_Internal_DMA_Mode SDMMC Internal DMA Mode - * @{ - */ -#define SDMMC_DISABLE_IDMA ((uint32_t)0x00000000) -#define SDMMC_ENABLE_IDMA_SINGLE_BUFF (SDMMC_IDMA_IDMAEN) -#define SDMMC_ENABLE_IDMA_DOUBLE_BUFF0 (SDMMC_IDMA_IDMAEN | SDMMC_IDMA_IDMABMODE) -#define SDMMC_ENABLE_IDMA_DOUBLE_BUFF1 (SDMMC_IDMA_IDMAEN | SDMMC_IDMA_IDMABMODE | SDMMC_IDMA_IDMABACT) - -/** - * @} - */ - -/** @defgroup SDMMC_LL_Data_Length Data Length - * @{ - */ -#define IS_SDMMC_DATA_LENGTH(LENGTH) ((LENGTH) <= 0x01FFFFFFU) -/** - * @} - */ - -/** @defgroup SDMMC_LL_Data_Block_Size Data Block Size - * @{ - */ -#define SDMMC_DATABLOCK_SIZE_1B ((uint32_t)0x00000000U) -#define SDMMC_DATABLOCK_SIZE_2B SDMMC_DCTRL_DBLOCKSIZE_0 -#define SDMMC_DATABLOCK_SIZE_4B SDMMC_DCTRL_DBLOCKSIZE_1 -#define SDMMC_DATABLOCK_SIZE_8B (SDMMC_DCTRL_DBLOCKSIZE_0|SDMMC_DCTRL_DBLOCKSIZE_1) -#define SDMMC_DATABLOCK_SIZE_16B SDMMC_DCTRL_DBLOCKSIZE_2 -#define SDMMC_DATABLOCK_SIZE_32B (SDMMC_DCTRL_DBLOCKSIZE_0|SDMMC_DCTRL_DBLOCKSIZE_2) -#define SDMMC_DATABLOCK_SIZE_64B (SDMMC_DCTRL_DBLOCKSIZE_1|SDMMC_DCTRL_DBLOCKSIZE_2) -#define SDMMC_DATABLOCK_SIZE_128B (SDMMC_DCTRL_DBLOCKSIZE_0| \ - SDMMC_DCTRL_DBLOCKSIZE_1|SDMMC_DCTRL_DBLOCKSIZE_2) -#define SDMMC_DATABLOCK_SIZE_256B SDMMC_DCTRL_DBLOCKSIZE_3 -#define SDMMC_DATABLOCK_SIZE_512B (SDMMC_DCTRL_DBLOCKSIZE_0|SDMMC_DCTRL_DBLOCKSIZE_3) -#define SDMMC_DATABLOCK_SIZE_1024B (SDMMC_DCTRL_DBLOCKSIZE_1|SDMMC_DCTRL_DBLOCKSIZE_3) -#define SDMMC_DATABLOCK_SIZE_2048B (SDMMC_DCTRL_DBLOCKSIZE_0| \ - SDMMC_DCTRL_DBLOCKSIZE_1|SDMMC_DCTRL_DBLOCKSIZE_3) -#define SDMMC_DATABLOCK_SIZE_4096B (SDMMC_DCTRL_DBLOCKSIZE_2|SDMMC_DCTRL_DBLOCKSIZE_3) -#define SDMMC_DATABLOCK_SIZE_8192B (SDMMC_DCTRL_DBLOCKSIZE_0| \ - SDMMC_DCTRL_DBLOCKSIZE_2|SDMMC_DCTRL_DBLOCKSIZE_3) -#define SDMMC_DATABLOCK_SIZE_16384B (SDMMC_DCTRL_DBLOCKSIZE_1| \ - SDMMC_DCTRL_DBLOCKSIZE_2|SDMMC_DCTRL_DBLOCKSIZE_3) - -#define IS_SDMMC_BLOCK_SIZE(SIZE) (((SIZE) == SDMMC_DATABLOCK_SIZE_1B) || \ - ((SIZE) == SDMMC_DATABLOCK_SIZE_2B) || \ - ((SIZE) == SDMMC_DATABLOCK_SIZE_4B) || \ - ((SIZE) == SDMMC_DATABLOCK_SIZE_8B) || \ - ((SIZE) == SDMMC_DATABLOCK_SIZE_16B) || \ - ((SIZE) == SDMMC_DATABLOCK_SIZE_32B) || \ - ((SIZE) == SDMMC_DATABLOCK_SIZE_64B) || \ - ((SIZE) == SDMMC_DATABLOCK_SIZE_128B) || \ - ((SIZE) == SDMMC_DATABLOCK_SIZE_256B) || \ - ((SIZE) == SDMMC_DATABLOCK_SIZE_512B) || \ - ((SIZE) == SDMMC_DATABLOCK_SIZE_1024B) || \ - ((SIZE) == SDMMC_DATABLOCK_SIZE_2048B) || \ - ((SIZE) == SDMMC_DATABLOCK_SIZE_4096B) || \ - ((SIZE) == SDMMC_DATABLOCK_SIZE_8192B) || \ - ((SIZE) == SDMMC_DATABLOCK_SIZE_16384B)) -/** - * @} - */ - -/** @defgroup SDMMC_LL_Transfer_Direction Transfer Direction - * @{ - */ -#define SDMMC_TRANSFER_DIR_TO_CARD ((uint32_t)0x00000000U) -#define SDMMC_TRANSFER_DIR_TO_SDMMC SDMMC_DCTRL_DTDIR - -#define IS_SDMMC_TRANSFER_DIR(DIR) (((DIR) == SDMMC_TRANSFER_DIR_TO_CARD) || \ - ((DIR) == SDMMC_TRANSFER_DIR_TO_SDMMC)) -/** - * @} - */ - -/** @defgroup SDMMC_LL_Transfer_Type Transfer Type - * @{ - */ -#define SDMMC_TRANSFER_MODE_BLOCK ((uint32_t)0x00000000U) -#define SDMMC_TRANSFER_MODE_SDIO SDMMC_DCTRL_DTMODE_0 -#define SDMMC_TRANSFER_MODE_STREAM SDMMC_DCTRL_DTMODE_1 - -#define IS_SDMMC_TRANSFER_MODE(MODE) (((MODE) == SDMMC_TRANSFER_MODE_BLOCK) || \ - ((MODE) == SDMMC_TRANSFER_MODE_SDIO) || \ - ((MODE) == SDMMC_TRANSFER_MODE_STREAM)) -/** - * @} - */ - -/** @defgroup SDMMC_LL_DPSM_State DPSM State - * @{ - */ -#define SDMMC_DPSM_DISABLE ((uint32_t)0x00000000U) -#define SDMMC_DPSM_ENABLE SDMMC_DCTRL_DTEN - -#define IS_SDMMC_DPSM(DPSM) (((DPSM) == SDMMC_DPSM_DISABLE) ||\ - ((DPSM) == SDMMC_DPSM_ENABLE)) -/** - * @} - */ - -/** @defgroup SDMMC_LL_Read_Wait_Mode Read Wait Mode - * @{ - */ -#define SDMMC_READ_WAIT_MODE_DATA2 ((uint32_t)0x00000000U) -#define SDMMC_READ_WAIT_MODE_CLK (SDMMC_DCTRL_RWMOD) - -#define IS_SDMMC_READWAIT_MODE(MODE) (((MODE) == SDMMC_READ_WAIT_MODE_CLK) || \ - ((MODE) == SDMMC_READ_WAIT_MODE_DATA2)) -/** - * @} - */ - -/** @defgroup SDMMC_LL_Interrupt_sources Interrupt Sources - * @{ - */ -#define SDMMC_IT_CCRCFAIL SDMMC_MASK_CCRCFAILIE -#define SDMMC_IT_DCRCFAIL SDMMC_MASK_DCRCFAILIE -#define SDMMC_IT_CTIMEOUT SDMMC_MASK_CTIMEOUTIE -#define SDMMC_IT_DTIMEOUT SDMMC_MASK_DTIMEOUTIE -#define SDMMC_IT_TXUNDERR SDMMC_MASK_TXUNDERRIE -#define SDMMC_IT_RXOVERR SDMMC_MASK_RXOVERRIE -#define SDMMC_IT_CMDREND SDMMC_MASK_CMDRENDIE -#define SDMMC_IT_CMDSENT SDMMC_MASK_CMDSENTIE -#define SDMMC_IT_DATAEND SDMMC_MASK_DATAENDIE -#define SDMMC_IT_DHOLD SDMMC_MASK_DHOLDIE -#define SDMMC_IT_DBCKEND SDMMC_MASK_DBCKENDIE -#define SDMMC_IT_DABORT SDMMC_MASK_DABORTIE -#define SDMMC_IT_TXFIFOHE SDMMC_MASK_TXFIFOHEIE -#define SDMMC_IT_RXFIFOHF SDMMC_MASK_RXFIFOHFIE -#define SDMMC_IT_RXFIFOF SDMMC_MASK_RXFIFOFIE -#define SDMMC_IT_TXFIFOE SDMMC_MASK_TXFIFOEIE -#define SDMMC_IT_BUSYD0END SDMMC_MASK_BUSYD0ENDIE -#define SDMMC_IT_SDIOIT SDMMC_MASK_SDIOITIE -#define SDMMC_IT_ACKFAIL SDMMC_MASK_ACKFAILIE -#define SDMMC_IT_ACKTIMEOUT SDMMC_MASK_ACKTIMEOUTIE -#define SDMMC_IT_VSWEND SDMMC_MASK_VSWENDIE -#define SDMMC_IT_CKSTOP SDMMC_MASK_CKSTOPIE -#define SDMMC_IT_IDMABTC SDMMC_MASK_IDMABTCIE -/** - * @} - */ - -/** @defgroup SDMMC_LL_Flags Flags - * @{ - */ -#define SDMMC_FLAG_CCRCFAIL SDMMC_STA_CCRCFAIL -#define SDMMC_FLAG_DCRCFAIL SDMMC_STA_DCRCFAIL -#define SDMMC_FLAG_CTIMEOUT SDMMC_STA_CTIMEOUT -#define SDMMC_FLAG_DTIMEOUT SDMMC_STA_DTIMEOUT -#define SDMMC_FLAG_TXUNDERR SDMMC_STA_TXUNDERR -#define SDMMC_FLAG_RXOVERR SDMMC_STA_RXOVERR -#define SDMMC_FLAG_CMDREND SDMMC_STA_CMDREND -#define SDMMC_FLAG_CMDSENT SDMMC_STA_CMDSENT -#define SDMMC_FLAG_DATAEND SDMMC_STA_DATAEND -#define SDMMC_FLAG_DHOLD SDMMC_STA_DHOLD -#define SDMMC_FLAG_DBCKEND SDMMC_STA_DBCKEND -#define SDMMC_FLAG_DABORT SDMMC_STA_DABORT -#define SDMMC_FLAG_DPSMACT SDMMC_STA_DPSMACT -#define SDMMC_FLAG_CMDACT SDMMC_STA_CPSMACT -#define SDMMC_FLAG_TXFIFOHE SDMMC_STA_TXFIFOHE -#define SDMMC_FLAG_RXFIFOHF SDMMC_STA_RXFIFOHF -#define SDMMC_FLAG_TXFIFOF SDMMC_STA_TXFIFOF -#define SDMMC_FLAG_RXFIFOF SDMMC_STA_RXFIFOF -#define SDMMC_FLAG_TXFIFOE SDMMC_STA_TXFIFOE -#define SDMMC_FLAG_RXFIFOE SDMMC_STA_RXFIFOE -#define SDMMC_FLAG_BUSYD0 SDMMC_STA_BUSYD0 -#define SDMMC_FLAG_BUSYD0END SDMMC_STA_BUSYD0END -#define SDMMC_FLAG_SDIOIT SDMMC_STA_SDIOIT -#define SDMMC_FLAG_ACKFAIL SDMMC_STA_ACKFAIL -#define SDMMC_FLAG_ACKTIMEOUT SDMMC_STA_ACKTIMEOUT -#define SDMMC_FLAG_VSWEND SDMMC_STA_VSWEND -#define SDMMC_FLAG_CKSTOP SDMMC_STA_CKSTOP -#define SDMMC_FLAG_IDMATE SDMMC_STA_IDMATE -#define SDMMC_FLAG_IDMABTC SDMMC_STA_IDMABTC - -#define SDMMC_STATIC_FLAGS ((uint32_t)(SDMMC_FLAG_CCRCFAIL | SDMMC_FLAG_DCRCFAIL | SDMMC_FLAG_CTIMEOUT |\ - SDMMC_FLAG_DTIMEOUT | SDMMC_FLAG_TXUNDERR | SDMMC_FLAG_RXOVERR |\ - SDMMC_FLAG_CMDREND | SDMMC_FLAG_CMDSENT | SDMMC_FLAG_DATAEND |\ - SDMMC_FLAG_DHOLD | SDMMC_FLAG_DBCKEND | SDMMC_FLAG_DABORT |\ - SDMMC_FLAG_BUSYD0END | SDMMC_FLAG_SDIOIT | SDMMC_FLAG_ACKFAIL |\ - SDMMC_FLAG_ACKTIMEOUT | SDMMC_FLAG_VSWEND | SDMMC_FLAG_CKSTOP |\ - SDMMC_FLAG_IDMATE | SDMMC_FLAG_IDMABTC)) - -#define SDMMC_STATIC_CMD_FLAGS ((uint32_t)(SDMMC_FLAG_CCRCFAIL | SDMMC_FLAG_CTIMEOUT | SDMMC_FLAG_CMDREND |\ - SDMMC_FLAG_CMDSENT | SDMMC_FLAG_BUSYD0END)) - -#define SDMMC_STATIC_DATA_FLAGS ((uint32_t)(SDMMC_FLAG_DCRCFAIL | SDMMC_FLAG_DTIMEOUT | SDMMC_FLAG_TXUNDERR |\ - SDMMC_FLAG_RXOVERR | SDMMC_FLAG_DATAEND | SDMMC_FLAG_DHOLD |\ - SDMMC_FLAG_DBCKEND | SDMMC_FLAG_DABORT | SDMMC_FLAG_IDMATE |\ - SDMMC_FLAG_IDMABTC)) -/** - * @} - */ - -/** @defgroup SDMMC_SDIO_CCCR_Registers - * @{ - */ -/*-------------------------------- CCCR0 ----------------------------------*/ -#define SDMMC_SDIO_CCCR0 0x000U /*!< SDIOS Card Common Control Register 0 */ -#define SDMMC_SDIO_CCCR0_SD_BYTE0 0x000U /*!< SDIOS Card Common Control Register 0 Byte 0 */ -#define SDMMC_SDIO_CCCR0_SD_BYTE1 0x001U /*!< SDIOS Card Common Control Register 0 Byte 1 */ -#define SDMMC_SDIO_CCCR0_SD_BYTE2 0x002U /*!< SDIOS Card Common Control Register 0 Byte 2 */ -#define SDMMC_SDIO_CCCR0_SD_BYTE3 0x003U /*!< SDIOS Card Common Control Register 0 Byte 3 */ - -/*-------------------------------- CCCR4 ----------------------------------*/ -#define SDMMC_SDIO_CCCR4 0x004U /*!< SDIOS Card Common Control Register 4 */ -#define SDMMC_SDIO_CCCR4_SD_BYTE0 0x004U /*!< SDIOS Card Common Control Register 4 Byte 0 */ -#define SDMMC_SDIO_CCCR4_SD_BYTE1 0x005U /*!< SDIOS Card Common Control Register 4 Byte 1 */ -#define SDMMC_SDIO_CCCR4_SD_BYTE2 0x006U /*!< SDIOS Card Common Control Register 4 Byte 2 */ -#define SDMMC_SDIO_CCCR4_SD_BYTE3 0x007U /*!< SDIOS Card Common Control Register 4 Byte 3 */ - -/*-------------------------------- CCCR8 ----------------------------------*/ -#define SDMMC_SDIO_CCCR8 0x008U /*!< SDIOS Card Common Control Register 8 */ -#define SDMMC_SDIO_CCCR8_SD_BYTE0 0x008U /*!< SDIOS Card Common Control Register 8 Byte 0 */ -#define SDMMC_SDIO_CCCR8_SD_BYTE1 0x009U /*!< SDIOS Card Common Control Register 8 Byte 1 */ -#define SDMMC_SDIO_CCCR8_SD_BYTE2 0x00AU /*!< SDIOS Card Common Control Register 8 Byte 2 */ -#define SDMMC_SDIO_CCCR8_SD_BYTE3 0x00BU /*!< SDIOS Card Common Control Register 8 Byte 3 */ - -/*-------------------------------- CCCR12 ---------------------------------*/ -#define SDMMC_SDIO_CCCR12 0x00CU /*!< SDIOS Card Common Control Register 12 */ -#define SDMMC_SDIO_CCCR12_SD_BYTE0 0x00CU /*!< SDIOS Card Common Control Register 12 Byte 0 */ -#define SDMMC_SDIO_CCCR12_SD_BYTE1 0x00DU /*!< SDIOS Card Common Control Register 12 Byte 1 */ -#define SDMMC_SDIO_CCCR12_SD_BYTE2 0x00EU /*!< SDIOS Card Common Control Register 12 Byte 2 */ -#define SDMMC_SDIO_CCCR12_SD_BYTE3 0x00FU /*!< SDIOS Card Common Control Register 12 Byte 3 */ - -/*-------------------------------- CCCR16 ---------------------------------*/ -#define SDMMC_SDIO_CCCR16 0x010U /*!< SDIOS Card Common Control Register 16 */ -#define SDMMC_SDIO_CCCR16_SD_BYTE0 0x010U /*!< SDIOS Card Common Control Register 16 Byte 0 */ -#define SDMMC_SDIO_CCCR16_SD_BYTE1 0x011U /*!< SDIOS Card Common Control Register 16 Byte 1 */ -#define SDMMC_SDIO_CCCR16_SD_BYTE2 0x012U /*!< SDIOS Card Common Control Register 16 Byte 2 */ -#define SDMMC_SDIO_CCCR16_SD_BYTE3 0x013U /*!< SDIOS Card Common Control Register 16 Byte 3 */ - -/*-------------------------------- CCCR20 ---------------------------------*/ -#define SDMMC_SDIO_CCCR20 0x014U /*!< SDIOS Card Common Control Register 20 */ -#define SDMMC_SDIO_CCCR20_SD_BYTE0 0x014U /*!< SDIOS Card Common Control Register 20 Byte 0 */ -#define SDMMC_SDIO_CCCR20_SD_BYTE1 0x015U /*!< SDIOS Card Common Control Register 20 Byte 1 */ -#define SDMMC_SDIO_CCCR20_SD_BYTE2 0x016U /*!< SDIOS Card Common Control Register 20 Byte 2 */ -#define SDMMC_SDIO_CCCR20_SD_BYTE3 0x017U /*!< SDIOS Card Common Control Register 20 Byte 3 */ - -/*-------------------------------- F1BR0 ----------------------------------*/ -#define SDMMC_SDIO_F1BR0 0x100U /*!< SDIOS Function 1 Basic Register 0 */ -#define SDMMC_SDIO_F1BR0_SD_BYTE0 0x100U /*!< SDIOS Function 1 Basic Register 0 Byte 0 */ -#define SDMMC_SDIO_F1BR0_SD_BYTE1 0x101U /*!< SDIOS Function 1 Basic Register 0 Byte 1 */ -#define SDMMC_SDIO_F1BR0_SD_BYTE2 0x102U /*!< SDIOS Function 1 Basic Register 0 Byte 2 */ -#define SDMMC_SDIO_F1BR0_SD_BYTE3 0x103U /*!< SDIOS Function 1 Basic Register 0 Byte 3 */ - -/*-------------------------------- F1BR8 ----------------------------------*/ -#define SDMMC_SDIO_F1BR8 0x108U /*!< SDIOS Function 1 Basic Register 8 */ -#define SDMMC_SDIO_F1BR8_SD_BYTE0 0x108U /*!< SDIOS Function 1 Basic Register 8 Byte 0 */ -#define SDMMC_SDIO_F1BR8_SD_BYTE1 0x109U /*!< SDIOS Function 1 Basic Register 8 Byte 1 */ -#define SDMMC_SDIO_F1BR8_SD_BYTE2 0x10AU /*!< SDIOS Function 1 Basic Register 8 Byte 2 */ -#define SDMMC_SDIO_F1BR8_SD_BYTE3 0x10BU /*!< SDIOS Function 1 Basic Register 8 Byte 3 */ - -/*-------------------------------- F1BR12 ---------------------------------*/ -#define SDMMC_SDIO_F1BR12 0x10CU /*!< SDIOS Function 1 Basic Register 12 */ -#define SDMMC_SDIO_F1BR12_SD_BYTE0 0x10CU /*!< SDIOS Function 1 Basic Register 12 Byte 0 */ -#define SDMMC_SDIO_F1BR12_SD_BYTE1 0x10DU /*!< SDIOS Function 1 Basic Register 12 Byte 1 */ -#define SDMMC_SDIO_F1BR12_SD_BYTE2 0x10EU /*!< SDIOS Function 1 Basic Register 12 Byte 2 */ -#define SDMMC_SDIO_F1BR12_SD_BYTE3 0x10FU /*!< SDIOS Function 1 Basic Register 12 Byte 3 */ - -/*-------------------------------- F1BR16 ---------------------------------*/ -#define SDMMC_SDIO_F1BR16 0x110U /*!< SDIOS Function 1 Basic Register 16 */ -#define SDMMC_SDIO_F1BR16_SD_BYTE0 0x110U /*!< SDIOS Function 1 Basic Register 16 Byte 0 */ -#define SDMMC_SDIO_F1BR16_SD_BYTE1 0x111U /*!< SDIOS Function 1 Basic Register 16 Byte 1 */ -#define SDMMC_SDIO_F1BR16_SD_BYTE2 0x112U /*!< SDIOS Function 1 Basic Register 16 Byte 2 */ -#define SDMMC_SDIO_F1BR16_SD_BYTE3 0x113U /*!< SDIOS Function 1 Basic Register 16 Byte 3 */ -/** - * @} - */ - -/** - * @} - */ - -/* Exported macro ------------------------------------------------------------*/ -/** @defgroup SDMMC_LL_Exported_macros SDMMC_LL Exported Macros - * @{ - */ - -/** @defgroup SDMMC_LL_Register Bits And Addresses Definitions - * @brief SDMMC_LL registers bit address in the alias region - * @{ - */ -/* ---------------------- SDMMC registers bit mask --------------------------- */ -/* --- CLKCR Register ---*/ -/* CLKCR register clear mask */ -#define CLKCR_CLEAR_MASK ((uint32_t)(SDMMC_CLKCR_CLKDIV | SDMMC_CLKCR_PWRSAV |\ - SDMMC_CLKCR_WIDBUS |\ - SDMMC_CLKCR_NEGEDGE | SDMMC_CLKCR_HWFC_EN |\ - SDMMC_CLKCR_DDR | SDMMC_CLKCR_BUSSPEED |\ - SDMMC_CLKCR_SELCLKRX)) - -/* --- DCTRL Register ---*/ -/* SDMMC DCTRL Clear Mask */ -#define DCTRL_CLEAR_MASK ((uint32_t)(SDMMC_DCTRL_DTEN | SDMMC_DCTRL_DTDIR |\ - SDMMC_DCTRL_DTMODE | SDMMC_DCTRL_DBLOCKSIZE)) - -/* --- CMD Register ---*/ -/* CMD Register clear mask */ -#define CMD_CLEAR_MASK ((uint32_t)(SDMMC_CMD_CMDINDEX | SDMMC_CMD_WAITRESP |\ - SDMMC_CMD_WAITINT | SDMMC_CMD_WAITPEND |\ - SDMMC_CMD_CPSMEN | SDMMC_CMD_CMDSUSPEND)) - -/* SDMMC Initialization Frequency (400KHz max) for Peripheral CLK 200MHz*/ -#define SDMMC_INIT_CLK_DIV ((uint8_t)0xFA) - -/* SDMMC Default Speed Frequency (25Mhz max) for Peripheral CLK 200MHz*/ -#define SDMMC_NSPEED_CLK_DIV ((uint8_t)0x4) - -/* SDMMC High Speed Frequency (50Mhz max) for Peripheral CLK 200MHz*/ -#define SDMMC_HSPEED_CLK_DIV ((uint8_t)0x2) -/** - * @} - */ - -/** @defgroup SDMMC_LL_Interrupt_Clock Interrupt And Clock Configuration - * @brief macros to handle interrupts and specific clock configurations - * @{ - */ - -/** - * @brief Enable the SDMMC device interrupt. - * @param __INSTANCE__ Pointer to SDMMC register base - * @param __INTERRUPT__ specifies the SDMMC interrupt sources to be enabled. - * This parameter can be one or a combination of the following values: - * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt - * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt - * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt - * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt - * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt - * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt - * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt - * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt - * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt - * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt - * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt - * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt - * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt - * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt - * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt - * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt - * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt - * @arg SDMMC_IT_SDIOIT: SDIO interrupt received interrupt - * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt - * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt - * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt - * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt - * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt - * @retval None - */ -#define __SDMMC_ENABLE_IT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->MASK |= (__INTERRUPT__)) - -/** - * @brief Disable the SDMMC device interrupt. - * @param __INSTANCE__ Pointer to SDMMC register base - * @param __INTERRUPT__ specifies the SDMMC interrupt sources to be disabled. - * This parameter can be one or a combination of the following values: - * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt - * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt - * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt - * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt - * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt - * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt - * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt - * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt - * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt - * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt - * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt - * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt - * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt - * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt - * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt - * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt - * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt - * @arg SDMMC_IT_SDIOIT: SDIO interrupt received interrupt - * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt - * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt - * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt - * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt - * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt - * @retval None - */ -#define __SDMMC_DISABLE_IT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->MASK &= ~(__INTERRUPT__)) - -/** - * @brief Checks whether the specified SDMMC flag is set or not. - * @param __INSTANCE__ Pointer to SDMMC register base - * @param __FLAG__ specifies the flag to check. - * This parameter can be one of the following values: - * @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed) - * @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) - * @arg SDMMC_FLAG_CTIMEOUT: Command response timeout - * @arg SDMMC_FLAG_DTIMEOUT: Data timeout - * @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error - * @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error - * @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed) - * @arg SDMMC_FLAG_CMDSENT: Command sent (no response required) - * @arg SDMMC_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero) - * @arg SDMMC_FLAG_DHOLD: Data transfer Hold - * @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed) - * @arg SDMMC_FLAG_DABORT: Data transfer aborted by CMD12 - * @arg SDMMC_FLAG_DPSMACT: Data path state machine active - * @arg SDMMC_FLAG_CPSMACT: Command path state machine active - * @arg SDMMC_FLAG_TXFIFOHE: Transmit FIFO Half Empty - * @arg SDMMC_FLAG_RXFIFOHF: Receive FIFO Half Full - * @arg SDMMC_FLAG_TXFIFOF: Transmit FIFO full - * @arg SDMMC_FLAG_RXFIFOF: Receive FIFO full - * @arg SDMMC_FLAG_TXFIFOE: Transmit FIFO empty - * @arg SDMMC_FLAG_RXFIFOE: Receive FIFO empty - * @arg SDMMC_FLAG_BUSYD0: Inverted value of SDMMC_D0 line (Busy) - * @arg SDMMC_FLAG_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected - * @arg SDMMC_FLAG_SDIOIT: SDIO interrupt received - * @arg SDMMC_FLAG_ACKFAIL: Boot Acknowledgment received - * @arg SDMMC_FLAG_ACKTIMEOUT: Boot Acknowledgment timeout - * @arg SDMMC_FLAG_VSWEND: Voltage switch critical timing section completion - * @arg SDMMC_FLAG_CKSTOP: SDMMC_CK stopped in Voltage switch procedure - * @arg SDMMC_FLAG_IDMATE: IDMA transfer error - * @arg SDMMC_FLAG_IDMABTC: IDMA buffer transfer complete - * @retval The new state of SDMMC_FLAG (SET or RESET). - */ -#define __SDMMC_GET_FLAG(__INSTANCE__, __FLAG__) (((__INSTANCE__)->STA &(__FLAG__)) != 0U) - - -/** - * @brief Clears the SDMMC pending flags. - * @param __INSTANCE__ Pointer to SDMMC register base - * @param __FLAG__ specifies the flag to clear. - * This parameter can be one or a combination of the following values: - * @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed) - * @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) - * @arg SDMMC_FLAG_CTIMEOUT: Command response timeout - * @arg SDMMC_FLAG_DTIMEOUT: Data timeout - * @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error - * @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error - * @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed) - * @arg SDMMC_FLAG_CMDSENT: Command sent (no response required) - * @arg SDMMC_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero) - * @arg SDMMC_FLAG_DHOLD: Data transfer Hold - * @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed) - * @arg SDMMC_FLAG_DABORT: Data transfer aborted by CMD12 - * @arg SDMMC_FLAG_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected - * @arg SDMMC_FLAG_SDIOIT: SDIO interrupt received - * @arg SDMMC_FLAG_ACKFAIL: Boot Acknowledgment received - * @arg SDMMC_FLAG_ACKTIMEOUT: Boot Acknowledgment timeout - * @arg SDMMC_FLAG_VSWEND: Voltage switch critical timing section completion - * @arg SDMMC_FLAG_CKSTOP: SDMMC_CK stopped in Voltage switch procedure - * @arg SDMMC_FLAG_IDMATE: IDMA transfer error - * @arg SDMMC_FLAG_IDMABTC: IDMA buffer transfer complete - * @retval None - */ -#define __SDMMC_CLEAR_FLAG(__INSTANCE__, __FLAG__) ((__INSTANCE__)->ICR = (__FLAG__)) - -/** - * @brief Checks whether the specified SDMMC interrupt has occurred or not. - * @param __INSTANCE__ Pointer to SDMMC register base - * @param __INTERRUPT__ specifies the SDMMC interrupt source to check. - * This parameter can be one of the following values: - * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt - * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt - * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt - * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt - * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt - * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt - * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt - * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt - * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt - * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt - * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt - * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt - * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt - * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt - * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt - * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt - * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt - * @arg SDMMC_IT_SDIOIT: SDIO interrupt received interrupt - * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt - * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt - * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt - * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt - * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt - * @retval The new state of SDMMC_IT (SET or RESET). - */ -#define __SDMMC_GET_IT(__INSTANCE__, __INTERRUPT__) (((__INSTANCE__)->STA &(__INTERRUPT__)) == (__INTERRUPT__)) - -/** - * @brief Checks the source of specified interrupt. - * @param __INSTANCE__ Pointer to SDMMC register base - * @param __INTERRUPT__ specifies the SDMMC interrupt source to check. - * This parameter can be one of the following values: - * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt - * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt - * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt - * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt - * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt - * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt - * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt - * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt - * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt - * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt - * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt - * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt - * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt - * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt - * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt - * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt - * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt - * @arg SDMMC_IT_SDIOIT: SDIO interrupt received interrupt - * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt - * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt - * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt - * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt - * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt - * @retval The new state of SDMMC_IT (SET or RESET). - */ -#define __SDMMC_GET_IT_SOURCE(__INSTANCE__, __INTERRUPT__) (((__HANDLE__)->Instance->STA & (__INTERRUPT__))) - -/** - * @brief Clears the SDMMC's interrupt pending bits. - * @param __INSTANCE__ Pointer to SDMMC register base - * @param __INTERRUPT__ specifies the interrupt pending bit to clear. - * This parameter can be one or a combination of the following values: - * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt - * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt - * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt - * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt - * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt - * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt - * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt - * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt - * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt - * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt - * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt - * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt - * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt - * @arg SDMMC_IT_SDIOIT: SDIO interrupt received interrupt - * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt - * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt - * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt - * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt - * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt - * @retval None - */ -#define __SDMMC_CLEAR_IT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->ICR = (__INTERRUPT__)) - -/** - * @brief Enable Start the SD I/O Read Wait operation. - * @param __INSTANCE__ Pointer to SDMMC register base - * @retval None - */ -#define __SDMMC_START_READWAIT_ENABLE(__INSTANCE__) ((__INSTANCE__)->DCTRL |= SDMMC_DCTRL_RWSTART) - -/** - * @brief Disable Start the SD I/O Read Wait operations. - * @param __INSTANCE__ Pointer to SDMMC register base - * @retval None - */ -#define __SDMMC_START_READWAIT_DISABLE(__INSTANCE__) ((__INSTANCE__)->DCTRL &= ~SDMMC_DCTRL_RWSTART) - -/** - * @brief Enable Start the SD I/O Read Wait operation. - * @param __INSTANCE__ Pointer to SDMMC register base - * @retval None - */ -#define __SDMMC_STOP_READWAIT_ENABLE(__INSTANCE__) ((__INSTANCE__)->DCTRL |= SDMMC_DCTRL_RWSTOP) - -/** - * @brief Disable Stop the SD I/O Read Wait operations. - * @param __INSTANCE__ Pointer to SDMMC register base - * @retval None - */ -#define __SDMMC_STOP_READWAIT_DISABLE(__INSTANCE__) ((__INSTANCE__)->DCTRL &= ~SDMMC_DCTRL_RWSTOP) - -/** - * @brief Enable the SD I/O Mode Operation. - * @param __INSTANCE__ Pointer to SDMMC register base - * @retval None - */ -#define __SDMMC_OPERATION_ENABLE(__INSTANCE__) ((__INSTANCE__)->DCTRL |= SDMMC_DCTRL_SDIOEN) - -/** - * @brief Disable the SD I/O Mode Operation. - * @param __INSTANCE__ Pointer to SDMMC register base - * @retval None - */ -#define __SDMMC_OPERATION_DISABLE(__INSTANCE__) ((__INSTANCE__)->DCTRL &= ~SDMMC_DCTRL_SDIOEN) - -/** - * @brief Enable the SD I/O Suspend command sending. - * @param __INSTANCE__ Pointer to SDMMC register base - * @retval None - */ -#define __SDMMC_SUSPEND_CMD_ENABLE(__INSTANCE__) ((__INSTANCE__)->CMD |= SDMMC_CMD_CMDSUSPEND) - -/** - * @brief Disable the SD I/O Suspend command sending. - * @param __INSTANCE__ Pointer to SDMMC register base - * @retval None - */ -#define __SDMMC_SUSPEND_CMD_DISABLE(__INSTANCE__) ((__INSTANCE__)->CMD &= ~SDMMC_CMD_CMDSUSPEND) - -/** - * @brief Enable the CMDTRANS mode. - * @param __INSTANCE__ Pointer to SDMMC register base - * @retval None - */ -#define __SDMMC_CMDTRANS_ENABLE(__INSTANCE__) ((__INSTANCE__)->CMD |= SDMMC_CMD_CMDTRANS) - -/** - * @brief Disable the CMDTRANS mode. - * @param __INSTANCE__ Pointer to SDMMC register base - * @retval None - */ -#define __SDMMC_CMDTRANS_DISABLE(__INSTANCE__) ((__INSTANCE__)->CMD &= ~SDMMC_CMD_CMDTRANS) - -/** - * @brief Enable the CMDSTOP mode. - * @param __INSTANCE__ Pointer to SDMMC register base - * @retval None - */ -#define __SDMMC_CMDSTOP_ENABLE(__INSTANCE__) ((__INSTANCE__)->CMD |= SDMMC_CMD_CMDSTOP) - -/** - * @brief Disable the CMDSTOP mode. - * @param __INSTANCE__ Pointer to SDMMC register base - * @retval None - */ -#define __SDMMC_CMDSTOP_DISABLE(__INSTANCE__) ((__INSTANCE__)->CMD &= ~SDMMC_CMD_CMDSTOP) - -/** - * @} - */ - -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup SDMMC_LL_Exported_Functions - * @{ - */ - -/* Initialization/de-initialization functions **********************************/ -/** @addtogroup HAL_SDMMC_LL_Group1 - * @{ - */ -HAL_StatusTypeDef SDMMC_Init(SDMMC_TypeDef *SDMMCx, SDMMC_InitTypeDef Init); -/** - * @} - */ - -/* I/O operation functions *****************************************************/ -/** @addtogroup HAL_SDMMC_LL_Group2 - * @{ - */ -uint32_t SDMMC_ReadFIFO(const SDMMC_TypeDef *SDMMCx); -HAL_StatusTypeDef SDMMC_WriteFIFO(SDMMC_TypeDef *SDMMCx, uint32_t *pWriteData); -/** - * @} - */ - -/* Peripheral Control functions ************************************************/ -/** @addtogroup HAL_SDMMC_LL_Group3 - * @{ - */ -HAL_StatusTypeDef SDMMC_PowerState_ON(SDMMC_TypeDef *SDMMCx); -HAL_StatusTypeDef SDMMC_PowerState_Cycle(SDMMC_TypeDef *SDMMCx); -HAL_StatusTypeDef SDMMC_PowerState_OFF(SDMMC_TypeDef *SDMMCx); -uint32_t SDMMC_GetPowerState(const SDMMC_TypeDef *SDMMCx); - -/* Command path state machine (CPSM) management functions */ -HAL_StatusTypeDef SDMMC_SendCommand(SDMMC_TypeDef *SDMMCx, const SDMMC_CmdInitTypeDef *Command); -uint8_t SDMMC_GetCommandResponse(const SDMMC_TypeDef *SDMMCx); -uint32_t SDMMC_GetResponse(const SDMMC_TypeDef *SDMMCx, uint32_t Response); - -/* Data path state machine (DPSM) management functions */ -HAL_StatusTypeDef SDMMC_ConfigData(SDMMC_TypeDef *SDMMCx, const SDMMC_DataInitTypeDef *Data); -uint32_t SDMMC_GetDataCounter(const SDMMC_TypeDef *SDMMCx); -uint32_t SDMMC_GetFIFOCount(const SDMMC_TypeDef *SDMMCx); - -/* SDMMC Cards mode management functions */ -HAL_StatusTypeDef SDMMC_SetSDMMCReadWaitMode(SDMMC_TypeDef *SDMMCx, uint32_t SDMMC_ReadWaitMode); -/** - * @} - */ - -/* SDMMC Commands management functions ******************************************/ -/** @addtogroup HAL_SDMMC_LL_Group4 - * @{ - */ -uint32_t SDMMC_CmdBlockLength(SDMMC_TypeDef *SDMMCx, uint32_t BlockSize); -uint32_t SDMMC_CmdReadSingleBlock(SDMMC_TypeDef *SDMMCx, uint32_t ReadAdd); -uint32_t SDMMC_CmdReadMultiBlock(SDMMC_TypeDef *SDMMCx, uint32_t ReadAdd); -uint32_t SDMMC_CmdWriteSingleBlock(SDMMC_TypeDef *SDMMCx, uint32_t WriteAdd); -uint32_t SDMMC_CmdWriteMultiBlock(SDMMC_TypeDef *SDMMCx, uint32_t WriteAdd); -uint32_t SDMMC_CmdEraseStartAdd(SDMMC_TypeDef *SDMMCx, uint32_t StartAdd); -uint32_t SDMMC_CmdSDEraseStartAdd(SDMMC_TypeDef *SDMMCx, uint32_t StartAdd); -uint32_t SDMMC_CmdEraseEndAdd(SDMMC_TypeDef *SDMMCx, uint32_t EndAdd); -uint32_t SDMMC_CmdSDEraseEndAdd(SDMMC_TypeDef *SDMMCx, uint32_t EndAdd); -uint32_t SDMMC_CmdErase(SDMMC_TypeDef *SDMMCx, uint32_t EraseType); -uint32_t SDMMC_CmdStopTransfer(SDMMC_TypeDef *SDMMCx); -uint32_t SDMMC_CmdSelDesel(SDMMC_TypeDef *SDMMCx, uint32_t Addr); -uint32_t SDMMC_CmdGoIdleState(SDMMC_TypeDef *SDMMCx); -uint32_t SDMMC_CmdOperCond(SDMMC_TypeDef *SDMMCx); -uint32_t SDMMC_CmdAppCommand(SDMMC_TypeDef *SDMMCx, uint32_t Argument); -uint32_t SDMMC_CmdAppOperCommand(SDMMC_TypeDef *SDMMCx, uint32_t Argument); -uint32_t SDMMC_CmdBusWidth(SDMMC_TypeDef *SDMMCx, uint32_t BusWidth); -uint32_t SDMMC_CmdSendSCR(SDMMC_TypeDef *SDMMCx); -uint32_t SDMMC_CmdSendCID(SDMMC_TypeDef *SDMMCx); -uint32_t SDMMC_CmdSendCSD(SDMMC_TypeDef *SDMMCx, uint32_t Argument); -uint32_t SDMMC_CmdSetRelAdd(SDMMC_TypeDef *SDMMCx, uint16_t *pRCA); -uint32_t SDMMC_CmdSetRelAddMmc(SDMMC_TypeDef *SDMMCx, uint16_t RCA); -uint32_t SDMMC_CmdSleepMmc(SDMMC_TypeDef *SDMMCx, uint32_t Argument); -uint32_t SDMMC_CmdSendStatus(SDMMC_TypeDef *SDMMCx, uint32_t Argument); -uint32_t SDMMC_CmdStatusRegister(SDMMC_TypeDef *SDMMCx); -uint32_t SDMMC_CmdVoltageSwitch(SDMMC_TypeDef *SDMMCx); -uint32_t SDMMC_CmdOpCondition(SDMMC_TypeDef *SDMMCx, uint32_t Argument); -uint32_t SDMMC_CmdSwitch(SDMMC_TypeDef *SDMMCx, uint32_t Argument); -uint32_t SDMMC_CmdSendEXTCSD(SDMMC_TypeDef *SDMMCx, uint32_t Argument); -uint32_t SDMMC_CmdBlockCount(SDMMC_TypeDef *SDMMCx, uint32_t BlockCount); -uint32_t SDMMC_SDIO_CmdReadWriteDirect(SDMMC_TypeDef *SDMMCx, uint32_t Argument, uint8_t *pResponse); -uint32_t SDMMC_SDIO_CmdReadWriteExtended(SDMMC_TypeDef *SDMMCx, uint32_t Argument); -uint32_t SDMMC_CmdSendOperationcondition(SDMMC_TypeDef *SDMMCx, uint32_t Argument, uint32_t *pResp); -/** - * @} - */ - -/* SDMMC Responses management functions *****************************************/ -/** @addtogroup HAL_SDMMC_LL_Group5 - * @{ - */ -uint32_t SDMMC_GetCmdResp1(SDMMC_TypeDef *SDMMCx, uint8_t SD_CMD, uint32_t Timeout); -uint32_t SDMMC_GetCmdResp2(SDMMC_TypeDef *SDMMCx); -uint32_t SDMMC_GetCmdResp3(SDMMC_TypeDef *SDMMCx); -uint32_t SDMMC_GetCmdResp4(SDMMC_TypeDef *SDMMCx, uint32_t *pResp); -uint32_t SDMMC_GetCmdResp5(SDMMC_TypeDef *SDMMCx, uint8_t SDIO_CMD, uint8_t *pData); -uint32_t SDMMC_GetCmdResp6(SDMMC_TypeDef *SDMMCx, uint8_t SD_CMD, uint16_t *pRCA); -uint32_t SDMMC_GetCmdResp7(SDMMC_TypeDef *SDMMCx); -/** - * @} - */ - -/* Linked List functions *******************************************************/ -/** @addtogroup HAL_SDMMC_LL_Group6 - * @{ - */ -uint32_t SDMMC_DMALinkedList_BuildNode(SDMMC_DMALinkNodeTypeDef *pNode, const SDMMC_DMALinkNodeConfTypeDef *pNodeConf); -uint32_t SDMMC_DMALinkedList_InsertNode(SDMMC_DMALinkedListTypeDef *pLinkedList, SDMMC_DMALinkNodeTypeDef *pPrevNode, - SDMMC_DMALinkNodeTypeDef *pNode); -uint32_t SDMMC_DMALinkedList_RemoveNode(SDMMC_DMALinkedListTypeDef *pLinkedList, SDMMC_DMALinkNodeTypeDef *pNode); -uint32_t SDMMC_DMALinkedList_LockNode(SDMMC_DMALinkNodeTypeDef *pNode); -uint32_t SDMMC_DMALinkedList_UnlockNode(SDMMC_DMALinkNodeTypeDef *pNode); -uint32_t SDMMC_DMALinkedList_EnableCircularMode(SDMMC_DMALinkedListTypeDef *pLinkedList); -uint32_t SDMMC_DMALinkedList_DisableCircularMode(SDMMC_DMALinkedListTypeDef *pLinkedList); -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ -#endif /* SDMMC1 || SDMMC2 */ -/** - * @} - */ -#ifdef __cplusplus -} -#endif - -#endif /* STM32N6xx_LL_SDMMC_H */ Index: trunk/firmware/FSBL/CubeMX/Drivers/STM32N6xx_HAL_Driver/Src/stm32n6xx_hal_mmc.c =================================================================== --- trunk/firmware/FSBL/CubeMX/Drivers/STM32N6xx_HAL_Driver/Src/stm32n6xx_hal_mmc.c (revision 37) +++ (revision ) @@ -1,5925 +1,0 @@ -/** - ****************************************************************************** - * @file stm32n6xx_hal_mmc.c - * @author MCD Application Team - * @brief MMC card HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the Secure Digital (MMC) peripheral: - * + Initialization and de-initialization functions - * + IO operation functions - * + Peripheral Control functions - * + MMC card Control functions - * - ****************************************************************************** - * @attention - * - * Copyright (c) 2023 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - @verbatim - ============================================================================== - ##### How to use this driver ##### - ============================================================================== - [..] - This driver implements a high level communication layer for read and write from/to - this memory. The needed STM32 hardware resources (SDMMC and GPIO) are performed by - the user in HAL_MMC_MspInit() function (MSP layer). - Basically, the MSP layer configuration should be the same as we provide in the - examples. - You can easily tailor this configuration according to hardware resources. - - [..] - This driver is a generic layered driver for SDMMC memories which uses the HAL - SDMMC driver functions to interface with MMC and eMMC cards devices. - It is used as follows: - - (#)Initialize the SDMMC low level resources by implement the HAL_MMC_MspInit() API: - (##) Enable the SDMMC interface clock using __HAL_RCC_SDMMC_CLK_ENABLE(); - (##) SDMMC pins configuration for MMC card - (+++) Enable the clock for the SDMMC GPIOs using the functions __HAL_RCC_GPIOx_CLK_ENABLE(); - (+++) Configure these SDMMC pins as alternate function pull-up using HAL_GPIO_Init() - and according to your pin assignment; - (##) NVIC configuration if you need to use interrupt process (HAL_MMC_ReadBlocks_IT() - and HAL_MMC_WriteBlocks_IT() APIs). - (+++) Configure the SDMMC interrupt priorities using function HAL_NVIC_SetPriority(); - (+++) Enable the NVIC SDMMC IRQs using function HAL_NVIC_EnableIRQ() - (+++) SDMMC interrupts are managed using the macros __HAL_MMC_ENABLE_IT() - and __HAL_MMC_DISABLE_IT() inside the communication process. - (+++) SDMMC interrupts pending bits are managed using the macros __HAL_MMC_GET_IT() - and __HAL_MMC_CLEAR_IT() - (##) No general propose DMA Configuration is needed, an Internal DMA for SDMMC Peripheral are used. - - (#) At this stage, you can perform MMC read/write/erase operations after MMC card initialization - - *** MMC Card Initialization and configuration *** - ================================================ - [..] - To initialize the MMC Card, use the HAL_MMC_Init() function. It Initializes - SDMMC Peripheral (STM32 side) and the MMC Card, and put it into StandBy State (Ready for data transfer). - This function provide the following operations: - - (#) Initialize the SDMMC peripheral interface with default configuration. - The initialization process is done at 400KHz. You can change or adapt - this frequency by adjusting the "ClockDiv" field. - The MMC Card frequency (SDMMC_CK) is computed as follows: - - SDMMC_CK = SDMMCCLK / (2 * ClockDiv) - - In initialization mode and according to the MMC Card standard, - make sure that the SDMMC_CK frequency doesn't exceed 400KHz. - - This phase of initialization is done through SDMMC_Init() and - SDMMC_PowerState_ON() SDMMC low level APIs. - - (#) Initialize the MMC card. The API used is HAL_MMC_InitCard(). - This phase allows the card initialization and identification - and check the MMC Card type (Standard Capacity or High Capacity) - The initialization flow is compatible with MMC standard. - - This API (HAL_MMC_InitCard()) could be used also to reinitialize the card in case - of plug-off plug-in. - - (#) Configure the MMC Card Data transfer frequency. By Default, the card transfer - frequency by adjusting the "ClockDiv" field. - In transfer mode and according to the MMC Card standard, make sure that the - SDMMC_CK frequency doesn't exceed 25MHz and 100MHz in High-speed mode switch. - - (#) Select the corresponding MMC Card according to the address read with the step 2. - - (#) Configure the MMC Card in wide bus mode: 4-bits data. - (#) Select the MMC Card partition using HAL_MMC_SwitchPartition() - - *** MMC Card Read operation *** - ============================== - [..] - (+) You can read from MMC card in polling mode by using function HAL_MMC_ReadBlocks(). - This function support only 512-bytes block length (the block size should be - chosen as 512 bytes). - You can choose either one block read operation or multiple block read operation - by adjusting the "NumberOfBlocks" parameter. - After this, you have to ensure that the transfer is done correctly. The check is done - through HAL_MMC_GetCardState() function for MMC card state. - - (+) You can read from MMC card in DMA mode by using function HAL_MMC_ReadBlocks_DMA(). - This function support only 512-bytes block length (the block size should be - chosen as 512 bytes). - You can choose either one block read operation or multiple block read operation - by adjusting the "NumberOfBlocks" parameter. - After this, you have to ensure that the transfer is done correctly. The check is done - through HAL_MMC_GetCardState() function for MMC card state. - You could also check the DMA transfer process through the MMC Rx interrupt event. - - (+) You can read from MMC card in Interrupt mode by using function HAL_MMC_ReadBlocks_IT(). - This function allows the read of 512 bytes blocks. - You can choose either one block read operation or multiple block read operation - by adjusting the "NumberOfBlocks" parameter. - After this, you have to ensure that the transfer is done correctly. The check is done - through HAL_MMC_GetCardState() function for MMC card state. - You could also check the IT transfer process through the MMC Rx interrupt event. - - *** MMC Card Write operation *** - =============================== - [..] - (+) You can write to MMC card in polling mode by using function HAL_MMC_WriteBlocks(). - This function support only 512-bytes block length (the block size should be - chosen as 512 bytes). - You can choose either one block read operation or multiple block read operation - by adjusting the "NumberOfBlocks" parameter. - After this, you have to ensure that the transfer is done correctly. The check is done - through HAL_MMC_GetCardState() function for MMC card state. - - (+) You can write to MMC card in DMA mode by using function HAL_MMC_WriteBlocks_DMA(). - This function support only 512-bytes block length (the block size should be - chosen as 512 byte). - You can choose either one block read operation or multiple block read operation - by adjusting the "NumberOfBlocks" parameter. - After this, you have to ensure that the transfer is done correctly. The check is done - through HAL_MMC_GetCardState() function for MMC card state. - You could also check the DMA transfer process through the MMC Tx interrupt event. - - (+) You can write to MMC card in Interrupt mode by using function HAL_MMC_WriteBlocks_IT(). - This function allows the read of 512 bytes blocks. - You can choose either one block read operation or multiple block read operation - by adjusting the "NumberOfBlocks" parameter. - After this, you have to ensure that the transfer is done correctly. The check is done - through HAL_MMC_GetCardState() function for MMC card state. - You could also check the IT transfer process through the MMC Tx interrupt event. - - *** MMC card information *** - =========================== - [..] - (+) To get MMC card information, you can use the function HAL_MMC_GetCardInfo(). - It returns useful information about the MMC card such as block size, card type, - block number ... - - *** MMC card CSD register *** - ============================ - [..] - (+) The HAL_MMC_GetCardCSD() API allows to get the parameters of the CSD register. - Some of the CSD parameters are useful for card initialization and identification. - - *** MMC card CID register *** - ============================ - [..] - (+) The HAL_MMC_GetCardCID() API allows to get the parameters of the CID register. - Some of the CID parameters are useful for card initialization and identification. - - *** MMC Card Reply Protected Memory Block (RPMB) Key Programming operation *** - ============================== - [..] - (+) You can program the authentication key of RPMB area in polling mode by using function - HAL_MMC_RPMB_ProgramAuthenticationKey(). - This function is only used once during the life of an MMC card. - After this, you have to ensure that the transfer is done correctly. The check is done - through HAL_MMC_GetRPMBError() function for operation state. - (+) You can program the authentication key of RPMB area in Interrupt mode by using function - HAL_MMC_RPMB_ProgramAuthenticationKey_IT(). - This function is only used once during the life of an MMC card. - After this, you have to ensure that the transfer is done correctly. The check is done - through HAL_MMC_GetRPMBError() function for operation state. - - *** MMC Card Reply Protected Memory Block (RPMB) write counter operation *** - ============================== - [..] - (+) You can get the write counter value of RPMB area in polling mode by using function - HAL_MMC_RPMB_GetWriteCounter(). - (+) You can get the write counter value of RPMB area in Interrupt mode by using function - HAL_MMC_RPMB_GetWriteCounter_IT(). - - *** MMC Card Reply Protected Memory Block (RPMB) write operation *** - ============================== - [..] - (+) You can write to the RPMB area of MMC card in polling mode by using function - HAL_MMC_WriteBlocks(). - This function supports the one, two, or thirty two blocks write operation - (with 512-bytes block length). - You can choose the number of blocks at the multiple block read operation by adjusting - the "NumberOfBlocks" parameter. - After this, you have to ensure that the transfer is done correctly. The check is done - through HAL_MMC_GetRPMBError() function for operation state. - (+) You can write to the RPMB area of MMC card in Interrupt mode by using function - HAL_MMC_WriteBlocks_IT(). - This function supports the one, two, or thirty two blocks write operation - (with 512-bytes block length). - You can choose the number of blocks at the multiple block read operation by adjusting - the "NumberOfBlocks" parameter. - After this, you have to ensure that the transfer is done correctly. The check is done - through HAL_MMC_GetRPMBError() function for operation state. - - *** MMC Card Reply Protected Memory Block (RPMB) read operation *** - ============================== - [..] - (+) You can read from the RPMB area of MMC card in polling mode by using function - HAL_MMC_RPMB_ReadBlocks(). - The block size should be chosen as multiple of 512 bytes. - You can choose the number of blocks by adjusting the "NumberOfBlocks" parameter. - After this, you have to ensure that the transfer is done correctly. The check is done - through HAL_MMC_GetRPMBError() function for MMC card state. - (+) You can read from the RPMB area of MMC card in Interrupt mode by using function - HAL_MMC_RPMB_ReadBlocks_IT(). - The block size should be chosen as multiple of 512 bytes. - You can choose the number of blocks by adjusting the "NumberOfBlocks" parameter. - After this, you have to ensure that the transfer is done correctly. The check is done - through HAL_MMC_GetRPMBError() function for MMC card state. - - *** MMC HAL driver macros list *** - ================================== - [..] - Below the list of most used macros in MMC HAL driver. - - (+) __HAL_MMC_ENABLE_IT: Enable the MMC device interrupt - (+) __HAL_MMC_DISABLE_IT: Disable the MMC device interrupt - (+) __HAL_MMC_GET_FLAG:Check whether the specified MMC flag is set or not - (+) __HAL_MMC_CLEAR_FLAG: Clear the MMC's pending flags - - [..] - (@) You can refer to the MMC HAL driver header file for more useful macros - - *** Callback registration *** - ============================================= - [..] - The compilation define USE_HAL_MMC_REGISTER_CALLBACKS when set to 1 - allows the user to configure dynamically the driver callbacks. - - Use Functions HAL_MMC_RegisterCallback() to register a user callback, - it allows to register following callbacks: - (+) TxCpltCallback : callback when a transmission transfer is completed. - (+) RxCpltCallback : callback when a reception transfer is completed. - (+) ErrorCallback : callback when error occurs. - (+) AbortCpltCallback : callback when abort is completed. - (+) Read_DMALnkLstBufCpltCallback : callback when the DMA reception of linked list node buffer is completed. - (+) Write_DMALnkLstBufCpltCallback : callback when the DMA transmission of linked list node buffer is completed. - (+) MspInitCallback : MMC MspInit. - (+) MspDeInitCallback : MMC MspDeInit. - This function takes as parameters the HAL peripheral handle, the Callback ID - and a pointer to the user callback function. - - Use function HAL_MMC_UnRegisterCallback() to reset a callback to the default - weak (overridden) function. It allows to reset following callbacks: - (+) TxCpltCallback : callback when a transmission transfer is completed. - (+) RxCpltCallback : callback when a reception transfer is completed. - (+) ErrorCallback : callback when error occurs. - (+) AbortCpltCallback : callback when abort is completed. - (+) Read_DMADblBuf0CpltCallback : callback when the DMA reception of first buffer is completed. - (+) Read_DMADblBuf1CpltCallback : callback when the DMA reception of second buffer is completed. - (+) Write_DMADblBuf0CpltCallback : callback when the DMA transmission of first buffer is completed. - (+) Write_DMADblBuf1CpltCallback : callback when the DMA transmission of second buffer is completed. - (+) MspInitCallback : MMC MspInit. - (+) MspDeInitCallback : MMC MspDeInit. - This function) takes as parameters the HAL peripheral handle and the Callback ID. - - By default, after the HAL_MMC_Init and if the state is HAL_MMC_STATE_RESET - all callbacks are reset to the corresponding legacy weak (overridden) functions. - Exception done for MspInit and MspDeInit callbacks that are respectively - reset to the legacy weak (overridden) functions in the HAL_MMC_Init - and HAL_MMC_DeInit only when these callbacks are null (not registered beforehand). - If not, MspInit or MspDeInit are not null, the HAL_MMC_Init and HAL_MMC_DeInit - keep and use the user MspInit/MspDeInit callbacks (registered beforehand) - - Callbacks can be registered/unregistered in READY state only. - Exception done for MspInit/MspDeInit callbacks that can be registered/unregistered - in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used - during the Init/DeInit. - In that case first register the MspInit/MspDeInit user callbacks - using HAL_MMC_RegisterCallback before calling HAL_MMC_DeInit - or HAL_MMC_Init function. - - When The compilation define USE_HAL_MMC_REGISTER_CALLBACKS is set to 0 or - not defined, the callback registering feature is not available - and weak (overridden) callbacks are used. - - @endverbatim - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32n6xx_hal.h" - -/** @addtogroup STM32N6xx_HAL_Driver - * @{ - */ - -/** @defgroup MMC MMC - * @brief MMC HAL module driver - * @{ - */ - -#if defined (SDMMC1) || defined (SDMMC2) -#ifdef HAL_MMC_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/** @addtogroup MMC_Private_Defines - * @{ - */ -#if defined (VDD_VALUE) && (VDD_VALUE <= 1950U) -#define MMC_VOLTAGE_RANGE EMMC_LOW_VOLTAGE_RANGE - -#define MMC_EXT_CSD_PWR_CL_26_INDEX 201 -#define MMC_EXT_CSD_PWR_CL_52_INDEX 200 -#define MMC_EXT_CSD_PWR_CL_DDR_52_INDEX 238 - -#define MMC_EXT_CSD_PWR_CL_26_POS 8 -#define MMC_EXT_CSD_PWR_CL_52_POS 0 -#define MMC_EXT_CSD_PWR_CL_DDR_52_POS 16 -#else -#define MMC_VOLTAGE_RANGE EMMC_HIGH_VOLTAGE_RANGE - -#define MMC_EXT_CSD_PWR_CL_26_INDEX 203 -#define MMC_EXT_CSD_PWR_CL_52_INDEX 202 -#define MMC_EXT_CSD_PWR_CL_DDR_52_INDEX 239 - -#define MMC_EXT_CSD_PWR_CL_26_POS 24 -#define MMC_EXT_CSD_PWR_CL_52_POS 16 -#define MMC_EXT_CSD_PWR_CL_DDR_52_POS 24 -#endif /* (VDD_VALUE) && (VDD_VALUE <= 1950U)*/ - -#define MMC_EXT_CSD_SLEEP_NOTIFICATION_TIME_INDEX 216 -#define MMC_EXT_CSD_SLEEP_NOTIFICATION_TIME_POS 0 -#define MMC_EXT_CSD_S_A_TIMEOUT_INDEX 217 -#define MMC_EXT_CSD_S_A_TIMEOUT_POS 8 - -/* Frequencies used in the driver for clock divider calculation */ -#define MMC_INIT_FREQ 400000U /* Initialization phase : 400 kHz max */ -#define MMC_HIGH_SPEED_FREQ 52000000U /* High speed phase : 52 MHz max */ - -/* The Data elements' postitions in the frame Frame for RPMB area */ -#define MMC_RPMB_KEYMAC_POSITION 196U -#define MMC_RPMB_DATA_POSITION 228U -#define MMC_RPMB_NONCE_POSITION 484U -#define MMC_RPMB_WRITE_COUNTER_POSITION 500U -/** - * @} - */ - -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ -/** @defgroup MMC_Private_Functions MMC Private Functions - * @{ - */ -static uint32_t MMC_InitCard(MMC_HandleTypeDef *hmmc); -static uint32_t MMC_PowerON(MMC_HandleTypeDef *hmmc); -static uint32_t MMC_SendStatus(MMC_HandleTypeDef *hmmc, uint32_t *pCardStatus); -static void MMC_PowerOFF(MMC_HandleTypeDef *hmmc); -static void MMC_Write_IT(MMC_HandleTypeDef *hmmc); -static void MMC_Read_IT(MMC_HandleTypeDef *hmmc); -static uint32_t MMC_HighSpeed(MMC_HandleTypeDef *hmmc, FunctionalState state); -static uint32_t MMC_DDR_Mode(MMC_HandleTypeDef *hmmc, FunctionalState state); -static HAL_StatusTypeDef MMC_ReadExtCSD(MMC_HandleTypeDef *hmmc, uint32_t *pFieldData, uint16_t FieldIndex, - uint32_t Timeout); -static uint32_t MMC_PwrClassUpdate(MMC_HandleTypeDef *hmmc, uint32_t Wide, uint32_t Speed); - -/** - * @} - */ -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup MMC_Exported_Functions - * @{ - */ - -/** @addtogroup MMC_Exported_Functions_Group1 - * @brief Initialization and de-initialization functions - * -@verbatim - ============================================================================== - ##### Initialization and de-initialization functions ##### - ============================================================================== - [..] - This section provides functions allowing to initialize/de-initialize the MMC - card device to be ready for use. - -@endverbatim - * @{ - */ - -/** - * @brief Initializes the MMC according to the specified parameters in the - MMC_HandleTypeDef and create the associated handle. - * @param hmmc: Pointer to the MMC handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_MMC_Init(MMC_HandleTypeDef *hmmc) -{ - /* Check the MMC handle allocation */ - if (hmmc == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_SDMMC_ALL_INSTANCE(hmmc->Instance)); - assert_param(IS_SDMMC_CLOCK_EDGE(hmmc->Init.ClockEdge)); - assert_param(IS_SDMMC_CLOCK_POWER_SAVE(hmmc->Init.ClockPowerSave)); - assert_param(IS_SDMMC_BUS_WIDE(hmmc->Init.BusWide)); - assert_param(IS_SDMMC_HARDWARE_FLOW_CONTROL(hmmc->Init.HardwareFlowControl)); - assert_param(IS_SDMMC_CLKDIV(hmmc->Init.ClockDiv)); - - if (hmmc->State == HAL_MMC_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - hmmc->Lock = HAL_UNLOCKED; -#if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) - /* Reset Callback pointers in HAL_MMC_STATE_RESET only */ - hmmc->TxCpltCallback = HAL_MMC_TxCpltCallback; - hmmc->RxCpltCallback = HAL_MMC_RxCpltCallback; - hmmc->ErrorCallback = HAL_MMC_ErrorCallback; - hmmc->AbortCpltCallback = HAL_MMC_AbortCallback; - hmmc->Read_DMALnkLstBufCpltCallback = HAL_MMCEx_Read_DMALnkLstBufCpltCallback; - hmmc->Write_DMALnkLstBufCpltCallback = HAL_MMCEx_Write_DMALnkLstBufCpltCallback; - - if (hmmc->MspInitCallback == NULL) - { - hmmc->MspInitCallback = HAL_MMC_MspInit; - } - - /* Init the low level hardware */ - hmmc->MspInitCallback(hmmc); -#else - /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */ - HAL_MMC_MspInit(hmmc); -#endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ - } - - hmmc->State = HAL_MMC_STATE_BUSY; - - /* Initialize the Card parameters */ - if (HAL_MMC_InitCard(hmmc) == HAL_ERROR) - { - return HAL_ERROR; - } - - /* Initialize the error code */ - hmmc->ErrorCode = HAL_DMA_ERROR_NONE; - - /* Initialize the MMC operation */ - hmmc->Context = MMC_CONTEXT_NONE; - - /* Initialize the MMC state */ - hmmc->State = HAL_MMC_STATE_READY; - - /* Configure bus width */ - if (hmmc->Init.BusWide != SDMMC_BUS_WIDE_1B) - { - if (HAL_MMC_ConfigWideBusOperation(hmmc, hmmc->Init.BusWide) != HAL_OK) - { - return HAL_ERROR; - } - } - - return HAL_OK; -} - -/** - * @brief Initializes the MMC Card. - * @param hmmc: Pointer to MMC handle - * @note This function initializes the MMC card. It could be used when a card - re-initialization is needed. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_MMC_InitCard(MMC_HandleTypeDef *hmmc) -{ - uint32_t errorstate; - MMC_InitTypeDef Init = {0U}; - uint32_t sdmmc_clk; - - /* Default SDMMC peripheral configuration for MMC card initialization */ - Init.ClockEdge = SDMMC_CLOCK_EDGE_RISING; - Init.ClockPowerSave = SDMMC_CLOCK_POWER_SAVE_DISABLE; - Init.BusWide = SDMMC_BUS_WIDE_1B; - Init.HardwareFlowControl = SDMMC_HARDWARE_FLOW_CONTROL_DISABLE; - - /* Init Clock should be less or equal to 400Khz*/ - if (hmmc->Instance == SDMMC1) - { - sdmmc_clk = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_SDMMC1); - } - else if (hmmc->Instance == SDMMC2) - { - sdmmc_clk = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_SDMMC2); - } - else - { - sdmmc_clk = 0; - } - if (sdmmc_clk == 0U) - { - hmmc->State = HAL_MMC_STATE_READY; - hmmc->ErrorCode = SDMMC_ERROR_INVALID_PARAMETER; - return HAL_ERROR; - } - if (sdmmc_clk <= MMC_INIT_FREQ) - { - Init.ClockDiv = 0U; - } - else - { - Init.ClockDiv = (sdmmc_clk / (2U * MMC_INIT_FREQ)) + 1U; - } - -#if (USE_SD_TRANSCEIVER != 0U) - Init.TranceiverPresent = SDMMC_TRANSCEIVER_NOT_PRESENT; -#endif /* USE_SD_TRANSCEIVER */ - - /* Initialize SDMMC peripheral interface with default configuration */ - (void)SDMMC_Init(hmmc->Instance, Init); - - /* Set Power State to ON */ - (void)SDMMC_PowerState_ON(hmmc->Instance); - - /* wait 74 Cycles: required power up waiting time before starting - the MMC initialization sequence */ - if (Init.ClockDiv != 0U) - { - sdmmc_clk = sdmmc_clk / (2U * Init.ClockDiv); - } - - if (sdmmc_clk != 0U) - { - HAL_Delay(1U + (74U * 1000U / (sdmmc_clk))); - } - - /* Identify card operating voltage */ - errorstate = MMC_PowerON(hmmc); - if (errorstate != HAL_MMC_ERROR_NONE) - { - hmmc->State = HAL_MMC_STATE_READY; - hmmc->ErrorCode |= errorstate; - return HAL_ERROR; - } - - /* Card initialization */ - errorstate = MMC_InitCard(hmmc); - if (errorstate != HAL_MMC_ERROR_NONE) - { - hmmc->State = HAL_MMC_STATE_READY; - hmmc->ErrorCode |= errorstate; - return HAL_ERROR; - } - - /* Set Block Size for Card */ - errorstate = SDMMC_CmdBlockLength(hmmc->Instance, MMC_BLOCKSIZE); - if (errorstate != HAL_MMC_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= errorstate; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - - return HAL_OK; -} - -/** - * @brief De-Initializes the MMC card. - * @param hmmc: Pointer to MMC handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_MMC_DeInit(MMC_HandleTypeDef *hmmc) -{ - /* Check the MMC handle allocation */ - if (hmmc == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_SDMMC_ALL_INSTANCE(hmmc->Instance)); - - hmmc->State = HAL_MMC_STATE_BUSY; - - /* Set MMC power state to off */ - MMC_PowerOFF(hmmc); - -#if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) - if (hmmc->MspDeInitCallback == NULL) - { - hmmc->MspDeInitCallback = HAL_MMC_MspDeInit; - } - - /* DeInit the low level hardware */ - hmmc->MspDeInitCallback(hmmc); -#else - /* De-Initialize the MSP layer */ - HAL_MMC_MspDeInit(hmmc); -#endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ - - hmmc->ErrorCode = HAL_MMC_ERROR_NONE; - hmmc->State = HAL_MMC_STATE_RESET; - - return HAL_OK; -} - -/** - * @brief Initializes the MMC MSP. - * @param hmmc: Pointer to MMC handle - * @retval None - */ -__weak void HAL_MMC_MspInit(MMC_HandleTypeDef *hmmc) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hmmc); - - /* NOTE : This function Should not be modified, when the callback is needed, - the HAL_MMC_MspInit could be implemented in the user file - */ -} - -/** - * @brief De-Initialize MMC MSP. - * @param hmmc: Pointer to MMC handle - * @retval None - */ -__weak void HAL_MMC_MspDeInit(MMC_HandleTypeDef *hmmc) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hmmc); - - /* NOTE : This function Should not be modified, when the callback is needed, - the HAL_MMC_MspDeInit could be implemented in the user file - */ -} - -/** - * @} - */ - -/** @addtogroup MMC_Exported_Functions_Group2 - * @brief Data transfer functions - * -@verbatim - ============================================================================== - ##### IO operation functions ##### - ============================================================================== - [..] - This subsection provides a set of functions allowing to manage the data - transfer from/to MMC card. - -@endverbatim - * @{ - */ - -/** - * @brief Reads block(s) from a specified address in a card. The Data transfer - * is managed by polling mode. - * @note This API should be followed by a check on the card state through - * HAL_MMC_GetCardState(). - * @param hmmc: Pointer to MMC handle - * @param pData: pointer to the buffer that will contain the received data - * @param BlockAdd: Block Address from where data is to be read - * @param NumberOfBlocks: Number of MMC blocks to read - * @param Timeout: Specify timeout value - * @retval HAL status - */ -HAL_StatusTypeDef HAL_MMC_ReadBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, - uint32_t NumberOfBlocks, - uint32_t Timeout) -{ - SDMMC_DataInitTypeDef config; - uint32_t errorstate; - uint32_t tickstart = HAL_GetTick(); - uint32_t count; - uint32_t data; - uint32_t dataremaining; - uint32_t add = BlockAdd; - uint8_t *tempbuff = pData; - - if (NULL == pData) - { - hmmc->ErrorCode |= HAL_MMC_ERROR_PARAM; - return HAL_ERROR; - } - - if (hmmc->State == HAL_MMC_STATE_READY) - { - hmmc->ErrorCode = HAL_MMC_ERROR_NONE; - - if ((BlockAdd + NumberOfBlocks) > (hmmc->MmcCard.LogBlockNbr)) - { - hmmc->ErrorCode |= HAL_MMC_ERROR_ADDR_OUT_OF_RANGE; - return HAL_ERROR; - } - - /* Check the case of 4kB blocks (field DATA SECTOR SIZE of extended CSD register) */ - if (((hmmc->Ext_CSD[(MMC_EXT_CSD_DATA_SEC_SIZE_INDEX / 4)] >> MMC_EXT_CSD_DATA_SEC_SIZE_POS) - & 0x000000FFU) != 0x0U) - { - if ((NumberOfBlocks % 8U) != 0U) - { - /* The number of blocks should be a multiple of 8 sectors of 512 bytes = 4 KBytes */ - hmmc->ErrorCode |= HAL_MMC_ERROR_BLOCK_LEN_ERR; - return HAL_ERROR; - } - - if ((BlockAdd % 8U) != 0U) - { - /* The address should be aligned to 8 (corresponding to 4 KBytes blocks) */ - hmmc->ErrorCode |= HAL_MMC_ERROR_ADDR_MISALIGNED; - return HAL_ERROR; - } - } - - hmmc->State = HAL_MMC_STATE_BUSY; - - /* Initialize data control register */ - hmmc->Instance->DCTRL = 0U; - - if ((hmmc->MmcCard.CardType) != MMC_HIGH_CAPACITY_CARD) - { - add *= MMC_BLOCKSIZE; - } - - /* Configure the MMC DPSM (Data Path State Machine) */ - config.DataTimeOut = SDMMC_DATATIMEOUT; - config.DataLength = NumberOfBlocks * MMC_BLOCKSIZE; - config.DataBlockSize = SDMMC_DATABLOCK_SIZE_512B; - config.TransferDir = SDMMC_TRANSFER_DIR_TO_SDMMC; - config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK; - config.DPSM = SDMMC_DPSM_DISABLE; - (void)SDMMC_ConfigData(hmmc->Instance, &config); - __SDMMC_CMDTRANS_ENABLE(hmmc->Instance); - - /* Read block(s) in polling mode */ - if (NumberOfBlocks > 1U) - { - hmmc->Context = MMC_CONTEXT_READ_MULTIPLE_BLOCK; - - /* Read Multi Block command */ - errorstate = SDMMC_CmdReadMultiBlock(hmmc->Instance, add); - } - else - { - hmmc->Context = MMC_CONTEXT_READ_SINGLE_BLOCK; - - /* Read Single Block command */ - errorstate = SDMMC_CmdReadSingleBlock(hmmc->Instance, add); - } - if (errorstate != HAL_MMC_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= errorstate; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - - /* Poll on SDMMC flags */ - dataremaining = config.DataLength; - while (!__HAL_MMC_GET_FLAG(hmmc, - SDMMC_FLAG_RXOVERR | SDMMC_FLAG_DCRCFAIL | SDMMC_FLAG_DTIMEOUT | SDMMC_FLAG_DATAEND)) - { - if (__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_RXFIFOHF) && (dataremaining >= SDMMC_FIFO_SIZE)) - { - /* Read data from SDMMC Rx FIFO */ - for (count = 0U; count < (SDMMC_FIFO_SIZE / 4U); count++) - { - data = SDMMC_ReadFIFO(hmmc->Instance); - *tempbuff = (uint8_t)(data & 0xFFU); - tempbuff++; - *tempbuff = (uint8_t)((data >> 8U) & 0xFFU); - tempbuff++; - *tempbuff = (uint8_t)((data >> 16U) & 0xFFU); - tempbuff++; - *tempbuff = (uint8_t)((data >> 24U) & 0xFFU); - tempbuff++; - } - dataremaining -= SDMMC_FIFO_SIZE; - } - - if (((HAL_GetTick() - tickstart) >= Timeout) || (Timeout == 0U)) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= HAL_MMC_ERROR_TIMEOUT; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_TIMEOUT; - } - } - __SDMMC_CMDTRANS_DISABLE(hmmc->Instance); - - /* Send stop transmission command in case of multiblock read */ - if (__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_DATAEND) && (NumberOfBlocks > 1U)) - { - /* Send stop transmission command */ - errorstate = SDMMC_CmdStopTransfer(hmmc->Instance); - if (errorstate != HAL_MMC_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= errorstate; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - } - - /* Get error state */ - if (__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_DTIMEOUT)) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= HAL_MMC_ERROR_DATA_TIMEOUT; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - else if (__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_DCRCFAIL)) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= HAL_MMC_ERROR_DATA_CRC_FAIL; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - else if (__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_RXOVERR)) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= HAL_MMC_ERROR_RX_OVERRUN; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - else - { - /* Nothing to do */ - } - - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_DATA_FLAGS); - - hmmc->State = HAL_MMC_STATE_READY; - - return HAL_OK; - } - else - { - hmmc->ErrorCode |= HAL_MMC_ERROR_BUSY; - return HAL_ERROR; - } -} - -/** - * @brief Allows to write block(s) to a specified address in a card. The Data - * transfer is managed by polling mode. - * @note This API should be followed by a check on the card state through - * HAL_MMC_GetCardState(). - * @param hmmc: Pointer to MMC handle - * @param pData: pointer to the buffer that will contain the data to transmit - * @param BlockAdd: Block Address where data will be written - * @param NumberOfBlocks: Number of MMC blocks to write - * @param Timeout: Specify timeout value - * @retval HAL status - */ -HAL_StatusTypeDef HAL_MMC_WriteBlocks(MMC_HandleTypeDef *hmmc, const uint8_t *pData, uint32_t BlockAdd, - uint32_t NumberOfBlocks, uint32_t Timeout) -{ - SDMMC_DataInitTypeDef config; - uint32_t errorstate; - uint32_t tickstart = HAL_GetTick(); - uint32_t count; - uint32_t data; - uint32_t dataremaining; - uint32_t add = BlockAdd; - const uint8_t *tempbuff = pData; - - if (NULL == pData) - { - hmmc->ErrorCode |= HAL_MMC_ERROR_PARAM; - return HAL_ERROR; - } - - if (hmmc->State == HAL_MMC_STATE_READY) - { - hmmc->ErrorCode = HAL_MMC_ERROR_NONE; - - if ((BlockAdd + NumberOfBlocks) > (hmmc->MmcCard.LogBlockNbr)) - { - hmmc->ErrorCode |= HAL_MMC_ERROR_ADDR_OUT_OF_RANGE; - return HAL_ERROR; - } - - /* Check the case of 4kB blocks (field DATA SECTOR SIZE of extended CSD register) */ - if (((hmmc->Ext_CSD[(MMC_EXT_CSD_DATA_SEC_SIZE_INDEX / 4)] >> MMC_EXT_CSD_DATA_SEC_SIZE_POS) & 0x000000FFU) != 0x0U) - { - if ((NumberOfBlocks % 8U) != 0U) - { - /* The number of blocks should be a multiple of 8 sectors of 512 bytes = 4 KBytes */ - hmmc->ErrorCode |= HAL_MMC_ERROR_BLOCK_LEN_ERR; - return HAL_ERROR; - } - - if ((BlockAdd % 8U) != 0U) - { - /* The address should be aligned to 8 (corresponding to 4 KBytes blocks) */ - hmmc->ErrorCode |= HAL_MMC_ERROR_ADDR_MISALIGNED; - return HAL_ERROR; - } - } - - hmmc->State = HAL_MMC_STATE_BUSY; - - /* Initialize data control register */ - hmmc->Instance->DCTRL = 0U; - - if ((hmmc->MmcCard.CardType) != MMC_HIGH_CAPACITY_CARD) - { - add *= MMC_BLOCKSIZE; - } - - /* Configure the MMC DPSM (Data Path State Machine) */ - config.DataTimeOut = SDMMC_DATATIMEOUT; - config.DataLength = NumberOfBlocks * MMC_BLOCKSIZE; - config.DataBlockSize = SDMMC_DATABLOCK_SIZE_512B; - config.TransferDir = SDMMC_TRANSFER_DIR_TO_CARD; - config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK; - config.DPSM = SDMMC_DPSM_DISABLE; - (void)SDMMC_ConfigData(hmmc->Instance, &config); - __SDMMC_CMDTRANS_ENABLE(hmmc->Instance); - - /* Write Blocks in Polling mode */ - if (NumberOfBlocks > 1U) - { - hmmc->Context = MMC_CONTEXT_WRITE_MULTIPLE_BLOCK; - - /* Write Multi Block command */ - errorstate = SDMMC_CmdWriteMultiBlock(hmmc->Instance, add); - } - else - { - hmmc->Context = MMC_CONTEXT_WRITE_SINGLE_BLOCK; - - /* Write Single Block command */ - errorstate = SDMMC_CmdWriteSingleBlock(hmmc->Instance, add); - } - if (errorstate != HAL_MMC_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= errorstate; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - - /* Write block(s) in polling mode */ - dataremaining = config.DataLength; - while (!__HAL_MMC_GET_FLAG(hmmc, - SDMMC_FLAG_TXUNDERR | SDMMC_FLAG_DCRCFAIL | SDMMC_FLAG_DTIMEOUT | SDMMC_FLAG_DATAEND)) - { - if (__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_TXFIFOHE) && (dataremaining >= SDMMC_FIFO_SIZE)) - { - /* Write data to SDMMC Tx FIFO */ - for (count = 0U; count < (SDMMC_FIFO_SIZE / 4U); count++) - { - data = (uint32_t)(*tempbuff); - tempbuff++; - data |= ((uint32_t)(*tempbuff) << 8U); - tempbuff++; - data |= ((uint32_t)(*tempbuff) << 16U); - tempbuff++; - data |= ((uint32_t)(*tempbuff) << 24U); - tempbuff++; - (void)SDMMC_WriteFIFO(hmmc->Instance, &data); - } - dataremaining -= SDMMC_FIFO_SIZE; - } - - if (((HAL_GetTick() - tickstart) >= Timeout) || (Timeout == 0U)) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= errorstate; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_TIMEOUT; - } - } - __SDMMC_CMDTRANS_DISABLE(hmmc->Instance); - - /* Send stop transmission command in case of multiblock write */ - if (__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_DATAEND) && (NumberOfBlocks > 1U)) - { - /* Send stop transmission command */ - errorstate = SDMMC_CmdStopTransfer(hmmc->Instance); - if (errorstate != HAL_MMC_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= errorstate; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - } - - /* Get error state */ - if (__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_DTIMEOUT)) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= HAL_MMC_ERROR_DATA_TIMEOUT; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - else if (__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_DCRCFAIL)) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= HAL_MMC_ERROR_DATA_CRC_FAIL; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - else if (__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_TXUNDERR)) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= HAL_MMC_ERROR_TX_UNDERRUN; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - else - { - /* Nothing to do */ - } - - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_DATA_FLAGS); - - hmmc->State = HAL_MMC_STATE_READY; - - return HAL_OK; - } - else - { - hmmc->ErrorCode |= HAL_MMC_ERROR_BUSY; - return HAL_ERROR; - } -} - -/** - * @brief Reads block(s) from a specified address in a card. The Data transfer - * is managed in interrupt mode. - * @note This API should be followed by a check on the card state through - * HAL_MMC_GetCardState(). - * @note You could also check the IT transfer process through the MMC Rx - * interrupt event. - * @param hmmc: Pointer to MMC handle - * @param pData: Pointer to the buffer that will contain the received data - * @param BlockAdd: Block Address from where data is to be read - * @param NumberOfBlocks: Number of blocks to read. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_MMC_ReadBlocks_IT(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, - uint32_t NumberOfBlocks) -{ - SDMMC_DataInitTypeDef config; - uint32_t errorstate; - uint32_t add = BlockAdd; - - if (NULL == pData) - { - hmmc->ErrorCode |= HAL_MMC_ERROR_PARAM; - return HAL_ERROR; - } - - if (hmmc->State == HAL_MMC_STATE_READY) - { - hmmc->ErrorCode = HAL_MMC_ERROR_NONE; - - if ((BlockAdd + NumberOfBlocks) > (hmmc->MmcCard.LogBlockNbr)) - { - hmmc->ErrorCode |= HAL_MMC_ERROR_ADDR_OUT_OF_RANGE; - return HAL_ERROR; - } - - /* Check the case of 4kB blocks (field DATA SECTOR SIZE of extended CSD register) */ - if (((hmmc->Ext_CSD[(MMC_EXT_CSD_DATA_SEC_SIZE_INDEX / 4)] >> MMC_EXT_CSD_DATA_SEC_SIZE_POS) & 0x000000FFU) != 0x0U) - { - if ((NumberOfBlocks % 8U) != 0U) - { - /* The number of blocks should be a multiple of 8 sectors of 512 bytes = 4 KBytes */ - hmmc->ErrorCode |= HAL_MMC_ERROR_BLOCK_LEN_ERR; - return HAL_ERROR; - } - - if ((BlockAdd % 8U) != 0U) - { - /* The address should be aligned to 8 (corresponding to 4 KBytes blocks) */ - hmmc->ErrorCode |= HAL_MMC_ERROR_ADDR_MISALIGNED; - return HAL_ERROR; - } - } - - hmmc->State = HAL_MMC_STATE_BUSY; - - /* Initialize data control register */ - hmmc->Instance->DCTRL = 0U; - - hmmc->pRxBuffPtr = pData; - hmmc->RxXferSize = MMC_BLOCKSIZE * NumberOfBlocks; - - if ((hmmc->MmcCard.CardType) != MMC_HIGH_CAPACITY_CARD) - { - add *= MMC_BLOCKSIZE; - } - - /* Configure the MMC DPSM (Data Path State Machine) */ - config.DataTimeOut = SDMMC_DATATIMEOUT; - config.DataLength = MMC_BLOCKSIZE * NumberOfBlocks; - config.DataBlockSize = SDMMC_DATABLOCK_SIZE_512B; - config.TransferDir = SDMMC_TRANSFER_DIR_TO_SDMMC; - config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK; - config.DPSM = SDMMC_DPSM_DISABLE; - (void)SDMMC_ConfigData(hmmc->Instance, &config); - __SDMMC_CMDTRANS_ENABLE(hmmc->Instance); - - /* Read Blocks in IT mode */ - if (NumberOfBlocks > 1U) - { - hmmc->Context = (MMC_CONTEXT_READ_MULTIPLE_BLOCK | MMC_CONTEXT_IT); - - /* Read Multi Block command */ - errorstate = SDMMC_CmdReadMultiBlock(hmmc->Instance, add); - } - else - { - hmmc->Context = (MMC_CONTEXT_READ_SINGLE_BLOCK | MMC_CONTEXT_IT); - - /* Read Single Block command */ - errorstate = SDMMC_CmdReadSingleBlock(hmmc->Instance, add); - } - - if (errorstate != HAL_MMC_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= errorstate; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - - __HAL_MMC_ENABLE_IT(hmmc, (SDMMC_IT_DCRCFAIL | SDMMC_IT_DTIMEOUT | SDMMC_IT_RXOVERR | SDMMC_IT_DATAEND | - SDMMC_FLAG_RXFIFOHF)); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Writes block(s) to a specified address in a card. The Data transfer - * is managed in interrupt mode. - * @note This API should be followed by a check on the card state through - * HAL_MMC_GetCardState(). - * @note You could also check the IT transfer process through the MMC Tx - * interrupt event. - * @param hmmc: Pointer to MMC handle - * @param pData: Pointer to the buffer that will contain the data to transmit - * @param BlockAdd: Block Address where data will be written - * @param NumberOfBlocks: Number of blocks to write - * @retval HAL status - */ -HAL_StatusTypeDef HAL_MMC_WriteBlocks_IT(MMC_HandleTypeDef *hmmc, const uint8_t *pData, - uint32_t BlockAdd, uint32_t NumberOfBlocks) -{ - SDMMC_DataInitTypeDef config; - uint32_t errorstate; - uint32_t add = BlockAdd; - - if (NULL == pData) - { - hmmc->ErrorCode |= HAL_MMC_ERROR_PARAM; - return HAL_ERROR; - } - - if (hmmc->State == HAL_MMC_STATE_READY) - { - hmmc->ErrorCode = HAL_MMC_ERROR_NONE; - - if ((BlockAdd + NumberOfBlocks) > (hmmc->MmcCard.LogBlockNbr)) - { - hmmc->ErrorCode |= HAL_MMC_ERROR_ADDR_OUT_OF_RANGE; - return HAL_ERROR; - } - - /* Check the case of 4kB blocks (field DATA SECTOR SIZE of extended CSD register) */ - if (((hmmc->Ext_CSD[(MMC_EXT_CSD_DATA_SEC_SIZE_INDEX / 4)] >> MMC_EXT_CSD_DATA_SEC_SIZE_POS) & 0x000000FFU) != 0x0U) - { - if ((NumberOfBlocks % 8U) != 0U) - { - /* The number of blocks should be a multiple of 8 sectors of 512 bytes = 4 KBytes */ - hmmc->ErrorCode |= HAL_MMC_ERROR_BLOCK_LEN_ERR; - return HAL_ERROR; - } - - if ((BlockAdd % 8U) != 0U) - { - /* The address should be aligned to 8 (corresponding to 4 KBytes blocks) */ - hmmc->ErrorCode |= HAL_MMC_ERROR_ADDR_MISALIGNED; - return HAL_ERROR; - } - } - - hmmc->State = HAL_MMC_STATE_BUSY; - - /* Initialize data control register */ - hmmc->Instance->DCTRL = 0U; - - hmmc->pTxBuffPtr = pData; - hmmc->TxXferSize = MMC_BLOCKSIZE * NumberOfBlocks; - - if ((hmmc->MmcCard.CardType) != MMC_HIGH_CAPACITY_CARD) - { - add *= MMC_BLOCKSIZE; - } - - /* Configure the MMC DPSM (Data Path State Machine) */ - config.DataTimeOut = SDMMC_DATATIMEOUT; - config.DataLength = MMC_BLOCKSIZE * NumberOfBlocks; - config.DataBlockSize = SDMMC_DATABLOCK_SIZE_512B; - config.TransferDir = SDMMC_TRANSFER_DIR_TO_CARD; - config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK; - config.DPSM = SDMMC_DPSM_DISABLE; - (void)SDMMC_ConfigData(hmmc->Instance, &config); - - __SDMMC_CMDTRANS_ENABLE(hmmc->Instance); - - /* Write Blocks in Polling mode */ - if (NumberOfBlocks > 1U) - { - hmmc->Context = (MMC_CONTEXT_WRITE_MULTIPLE_BLOCK | MMC_CONTEXT_IT); - - /* Write Multi Block command */ - errorstate = SDMMC_CmdWriteMultiBlock(hmmc->Instance, add); - } - else - { - hmmc->Context = (MMC_CONTEXT_WRITE_SINGLE_BLOCK | MMC_CONTEXT_IT); - - /* Write Single Block command */ - errorstate = SDMMC_CmdWriteSingleBlock(hmmc->Instance, add); - } - if (errorstate != HAL_MMC_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= errorstate; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - - /* Enable transfer interrupts */ - __HAL_MMC_ENABLE_IT(hmmc, (SDMMC_IT_DCRCFAIL | SDMMC_IT_DTIMEOUT | SDMMC_IT_TXUNDERR | SDMMC_IT_DATAEND | - SDMMC_FLAG_TXFIFOHE)); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Reads block(s) from a specified address in a card. The Data transfer - * is managed by DMA mode. - * @note This API should be followed by a check on the card state through - * HAL_MMC_GetCardState(). - * @note You could also check the DMA transfer process through the MMC Rx - * interrupt event. - * @param hmmc: Pointer MMC handle - * @param pData: Pointer to the buffer that will contain the received data - * @param BlockAdd: Block Address from where data is to be read - * @param NumberOfBlocks: Number of blocks to read. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_MMC_ReadBlocks_DMA(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, - uint32_t NumberOfBlocks) -{ - SDMMC_DataInitTypeDef config; - uint32_t errorstate; - uint32_t add = BlockAdd; - - if (NULL == pData) - { - hmmc->ErrorCode |= HAL_MMC_ERROR_PARAM; - return HAL_ERROR; - } - - if (hmmc->State == HAL_MMC_STATE_READY) - { - hmmc->ErrorCode = HAL_DMA_ERROR_NONE; - - if ((BlockAdd + NumberOfBlocks) > (hmmc->MmcCard.LogBlockNbr)) - { - hmmc->ErrorCode |= HAL_MMC_ERROR_ADDR_OUT_OF_RANGE; - return HAL_ERROR; - } - - /* Check the case of 4kB blocks (field DATA SECTOR SIZE of extended CSD register) */ - if (((hmmc->Ext_CSD[(MMC_EXT_CSD_DATA_SEC_SIZE_INDEX / 4)] >> MMC_EXT_CSD_DATA_SEC_SIZE_POS) & 0x000000FFU) != 0x0U) - { - if ((NumberOfBlocks % 8U) != 0U) - { - /* The number of blocks should be a multiple of 8 sectors of 512 bytes = 4 KBytes */ - hmmc->ErrorCode |= HAL_MMC_ERROR_BLOCK_LEN_ERR; - return HAL_ERROR; - } - - if ((BlockAdd % 8U) != 0U) - { - /* The address should be aligned to 8 (corresponding to 4 KBytes blocks) */ - hmmc->ErrorCode |= HAL_MMC_ERROR_ADDR_MISALIGNED; - return HAL_ERROR; - } - } - - hmmc->State = HAL_MMC_STATE_BUSY; - - /* Initialize data control register */ - hmmc->Instance->DCTRL = 0U; - - hmmc->pRxBuffPtr = pData; - hmmc->RxXferSize = MMC_BLOCKSIZE * NumberOfBlocks; - - if ((hmmc->MmcCard.CardType) != MMC_HIGH_CAPACITY_CARD) - { - add *= MMC_BLOCKSIZE; - } - - /* Configure the MMC DPSM (Data Path State Machine) */ - config.DataTimeOut = SDMMC_DATATIMEOUT; - config.DataLength = MMC_BLOCKSIZE * NumberOfBlocks; - config.DataBlockSize = SDMMC_DATABLOCK_SIZE_512B; - config.TransferDir = SDMMC_TRANSFER_DIR_TO_SDMMC; - config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK; - config.DPSM = SDMMC_DPSM_DISABLE; - (void)SDMMC_ConfigData(hmmc->Instance, &config); - - __SDMMC_CMDTRANS_ENABLE(hmmc->Instance); - hmmc->Instance->IDMABASER = (uint32_t) pData ; - hmmc->Instance->IDMACTRL = SDMMC_ENABLE_IDMA_SINGLE_BUFF; - - /* Read Blocks in DMA mode */ - if (NumberOfBlocks > 1U) - { - hmmc->Context = (MMC_CONTEXT_READ_MULTIPLE_BLOCK | MMC_CONTEXT_DMA); - - /* Read Multi Block command */ - errorstate = SDMMC_CmdReadMultiBlock(hmmc->Instance, add); - } - else - { - hmmc->Context = (MMC_CONTEXT_READ_SINGLE_BLOCK | MMC_CONTEXT_DMA); - - /* Read Single Block command */ - errorstate = SDMMC_CmdReadSingleBlock(hmmc->Instance, add); - } - if (errorstate != HAL_MMC_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode = errorstate; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - - /* Enable transfer interrupts */ - __HAL_MMC_ENABLE_IT(hmmc, (SDMMC_IT_DCRCFAIL | SDMMC_IT_DTIMEOUT | SDMMC_IT_RXOVERR | SDMMC_IT_DATAEND)); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Writes block(s) to a specified address in a card. The Data transfer - * is managed by DMA mode. - * @note This API should be followed by a check on the card state through - * HAL_MMC_GetCardState(). - * @note You could also check the DMA transfer process through the MMC Tx - * interrupt event. - * @param hmmc: Pointer to MMC handle - * @param pData: Pointer to the buffer that will contain the data to transmit - * @param BlockAdd: Block Address where data will be written - * @param NumberOfBlocks: Number of blocks to write - * @retval HAL status - */ -HAL_StatusTypeDef HAL_MMC_WriteBlocks_DMA(MMC_HandleTypeDef *hmmc, const uint8_t *pData, - uint32_t BlockAdd, uint32_t NumberOfBlocks) -{ - SDMMC_DataInitTypeDef config; - uint32_t errorstate; - uint32_t add = BlockAdd; - - if (NULL == pData) - { - hmmc->ErrorCode |= HAL_MMC_ERROR_PARAM; - return HAL_ERROR; - } - - if (hmmc->State == HAL_MMC_STATE_READY) - { - hmmc->ErrorCode = HAL_MMC_ERROR_NONE; - - if ((BlockAdd + NumberOfBlocks) > (hmmc->MmcCard.LogBlockNbr)) - { - hmmc->ErrorCode |= HAL_MMC_ERROR_ADDR_OUT_OF_RANGE; - return HAL_ERROR; - } - - /* Check the case of 4kB blocks (field DATA SECTOR SIZE of extended CSD register) */ - if (((hmmc->Ext_CSD[(MMC_EXT_CSD_DATA_SEC_SIZE_INDEX / 4)] >> MMC_EXT_CSD_DATA_SEC_SIZE_POS) & 0x000000FFU) != 0x0U) - { - if ((NumberOfBlocks % 8U) != 0U) - { - /* The number of blocks should be a multiple of 8 sectors of 512 bytes = 4 KBytes */ - hmmc->ErrorCode |= HAL_MMC_ERROR_BLOCK_LEN_ERR; - return HAL_ERROR; - } - - if ((BlockAdd % 8U) != 0U) - { - /* The address should be aligned to 8 (corresponding to 4 KBytes blocks) */ - hmmc->ErrorCode |= HAL_MMC_ERROR_ADDR_MISALIGNED; - return HAL_ERROR; - } - } - - hmmc->State = HAL_MMC_STATE_BUSY; - - /* Initialize data control register */ - hmmc->Instance->DCTRL = 0U; - - hmmc->pTxBuffPtr = pData; - hmmc->TxXferSize = MMC_BLOCKSIZE * NumberOfBlocks; - - if ((hmmc->MmcCard.CardType) != MMC_HIGH_CAPACITY_CARD) - { - add *= MMC_BLOCKSIZE; - } - - /* Configure the MMC DPSM (Data Path State Machine) */ - config.DataTimeOut = SDMMC_DATATIMEOUT; - config.DataLength = MMC_BLOCKSIZE * NumberOfBlocks; - config.DataBlockSize = SDMMC_DATABLOCK_SIZE_512B; - config.TransferDir = SDMMC_TRANSFER_DIR_TO_CARD; - config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK; - config.DPSM = SDMMC_DPSM_DISABLE; - (void)SDMMC_ConfigData(hmmc->Instance, &config); - - __SDMMC_CMDTRANS_ENABLE(hmmc->Instance); - - hmmc->Instance->IDMABASER = (uint32_t) pData ; - hmmc->Instance->IDMACTRL = SDMMC_ENABLE_IDMA_SINGLE_BUFF; - - /* Write Blocks in Polling mode */ - if (NumberOfBlocks > 1U) - { - hmmc->Context = (MMC_CONTEXT_WRITE_MULTIPLE_BLOCK | MMC_CONTEXT_DMA); - - /* Write Multi Block command */ - errorstate = SDMMC_CmdWriteMultiBlock(hmmc->Instance, add); - } - else - { - hmmc->Context = (MMC_CONTEXT_WRITE_SINGLE_BLOCK | MMC_CONTEXT_DMA); - - /* Write Single Block command */ - errorstate = SDMMC_CmdWriteSingleBlock(hmmc->Instance, add); - } - if (errorstate != HAL_MMC_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= errorstate; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - - /* Enable transfer interrupts */ - __HAL_MMC_ENABLE_IT(hmmc, (SDMMC_IT_DCRCFAIL | SDMMC_IT_DTIMEOUT | SDMMC_IT_TXUNDERR | SDMMC_IT_DATAEND)); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Erases the specified memory area of the given MMC card. - * @note This API should be followed by a check on the card state through - * HAL_MMC_GetCardState(). - * @param hmmc: Pointer to MMC handle - * @param BlockStartAdd: Start Block address - * @param BlockEndAdd: End Block address - * @retval HAL status - */ -HAL_StatusTypeDef HAL_MMC_Erase(MMC_HandleTypeDef *hmmc, uint32_t BlockStartAdd, uint32_t BlockEndAdd) -{ - uint32_t errorstate; - uint32_t start_add = BlockStartAdd; - uint32_t end_add = BlockEndAdd; - - if (hmmc->State == HAL_MMC_STATE_READY) - { - hmmc->ErrorCode = HAL_MMC_ERROR_NONE; - - if (end_add < start_add) - { - hmmc->ErrorCode |= HAL_MMC_ERROR_PARAM; - return HAL_ERROR; - } - - if (end_add > (hmmc->MmcCard.LogBlockNbr)) - { - hmmc->ErrorCode |= HAL_MMC_ERROR_ADDR_OUT_OF_RANGE; - return HAL_ERROR; - } - - /* Check the case of 4kB blocks (field DATA SECTOR SIZE of extended CSD register) */ - if (((hmmc->Ext_CSD[(MMC_EXT_CSD_DATA_SEC_SIZE_INDEX / 4)] >> MMC_EXT_CSD_DATA_SEC_SIZE_POS) - & 0x000000FFU) != 0x0U) - { - if (((start_add % 8U) != 0U) || ((end_add % 8U) != 0U)) - { - /* The address should be aligned to 8 (corresponding to 4 KBytes blocks) */ - hmmc->ErrorCode |= HAL_MMC_ERROR_ADDR_MISALIGNED; - return HAL_ERROR; - } - } - - hmmc->State = HAL_MMC_STATE_BUSY; - - /* Check if the card command class supports erase command */ - if (((hmmc->MmcCard.Class) & SDMMC_CCCC_ERASE) == 0U) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= HAL_MMC_ERROR_REQUEST_NOT_APPLICABLE; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - - if ((SDMMC_GetResponse(hmmc->Instance, SDMMC_RESP1) & SDMMC_CARD_LOCKED) == SDMMC_CARD_LOCKED) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= HAL_MMC_ERROR_LOCK_UNLOCK_FAILED; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - - if ((hmmc->MmcCard.CardType) != MMC_HIGH_CAPACITY_CARD) - { - start_add *= MMC_BLOCKSIZE; - end_add *= MMC_BLOCKSIZE; - } - - /* Send CMD35 MMC_ERASE_GRP_START with argument as addr */ - errorstate = SDMMC_CmdEraseStartAdd(hmmc->Instance, start_add); - if (errorstate != HAL_MMC_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= errorstate; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - - /* Send CMD36 MMC_ERASE_GRP_END with argument as addr */ - errorstate = SDMMC_CmdEraseEndAdd(hmmc->Instance, end_add); - if (errorstate != HAL_MMC_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= errorstate; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - - /* Send CMD38 ERASE */ - errorstate = SDMMC_CmdErase(hmmc->Instance, 0UL); - if (errorstate != HAL_MMC_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= errorstate; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - - hmmc->State = HAL_MMC_STATE_READY; - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief This function handles MMC card interrupt request. - * @param hmmc: Pointer to MMC handle - * @retval None - */ -void HAL_MMC_IRQHandler(MMC_HandleTypeDef *hmmc) -{ - uint32_t errorstate; - uint32_t context = hmmc->Context; - - /* Check for SDMMC interrupt flags */ - if ((__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_RXFIFOHF) != RESET) && ((context & MMC_CONTEXT_IT) != 0U)) - { - MMC_Read_IT(hmmc); - } - - else if (__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_DATAEND) != RESET) - { - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_FLAG_DATAEND); - - __HAL_MMC_DISABLE_IT(hmmc, SDMMC_IT_DATAEND | SDMMC_IT_DCRCFAIL | SDMMC_IT_DTIMEOUT | \ - SDMMC_IT_TXUNDERR | SDMMC_IT_RXOVERR | SDMMC_IT_TXFIFOHE | \ - SDMMC_IT_RXFIFOHF); - - __HAL_MMC_DISABLE_IT(hmmc, SDMMC_IT_IDMABTC); - __SDMMC_CMDTRANS_DISABLE(hmmc->Instance); - - if ((context & MMC_CONTEXT_DMA) != 0U) - { - hmmc->Instance->DLEN = 0; - hmmc->Instance->DCTRL = 0; - hmmc->Instance->IDMACTRL = SDMMC_DISABLE_IDMA ; - - /* Stop Transfer for Write Multi blocks or Read Multi blocks */ - if (((context & MMC_CONTEXT_READ_MULTIPLE_BLOCK) != 0U) || ((context & MMC_CONTEXT_WRITE_MULTIPLE_BLOCK) != 0U)) - { - errorstate = SDMMC_CmdStopTransfer(hmmc->Instance); - if (errorstate != HAL_MMC_ERROR_NONE) - { - hmmc->ErrorCode |= errorstate; -#if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) - hmmc->ErrorCallback(hmmc); -#else - HAL_MMC_ErrorCallback(hmmc); -#endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ - } - } - - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_DATA_FLAGS); - - hmmc->State = HAL_MMC_STATE_READY; - if (((context & MMC_CONTEXT_WRITE_SINGLE_BLOCK) != 0U) || ((context & MMC_CONTEXT_WRITE_MULTIPLE_BLOCK) != 0U)) - { -#if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) - hmmc->TxCpltCallback(hmmc); -#else - HAL_MMC_TxCpltCallback(hmmc); -#endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ - } - if (((context & MMC_CONTEXT_READ_SINGLE_BLOCK) != 0U) || ((context & MMC_CONTEXT_READ_MULTIPLE_BLOCK) != 0U)) - { -#if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) - hmmc->RxCpltCallback(hmmc); -#else - HAL_MMC_RxCpltCallback(hmmc); -#endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ - } - } - else if ((context & MMC_CONTEXT_IT) != 0U) - { - /* Stop Transfer for Write Multi blocks or Read Multi blocks */ - if (((context & MMC_CONTEXT_READ_MULTIPLE_BLOCK) != 0U) || ((context & MMC_CONTEXT_WRITE_MULTIPLE_BLOCK) != 0U)) - { - errorstate = SDMMC_CmdStopTransfer(hmmc->Instance); - if (errorstate != HAL_MMC_ERROR_NONE) - { - hmmc->ErrorCode |= errorstate; -#if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) - hmmc->ErrorCallback(hmmc); -#else - HAL_MMC_ErrorCallback(hmmc); -#endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ - } - } - - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_DATA_FLAGS); - - hmmc->State = HAL_MMC_STATE_READY; - if (((context & MMC_CONTEXT_READ_SINGLE_BLOCK) != 0U) || ((context & MMC_CONTEXT_READ_MULTIPLE_BLOCK) != 0U)) - { -#if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) - hmmc->RxCpltCallback(hmmc); -#else - HAL_MMC_RxCpltCallback(hmmc); -#endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ - } - else - { -#if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) - hmmc->TxCpltCallback(hmmc); -#else - HAL_MMC_TxCpltCallback(hmmc); -#endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ - } - } - else - { - /* Nothing to do */ - } - } - - else if ((__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_TXFIFOHE) != RESET) && ((context & MMC_CONTEXT_IT) != 0U)) - { - MMC_Write_IT(hmmc); - } - - else if (__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_DCRCFAIL | - SDMMC_FLAG_DTIMEOUT | SDMMC_FLAG_RXOVERR | SDMMC_FLAG_TXUNDERR) != RESET) - { - /* Set Error code */ - if (__HAL_MMC_GET_FLAG(hmmc, SDMMC_IT_DCRCFAIL) != RESET) - { - hmmc->ErrorCode |= HAL_MMC_ERROR_DATA_CRC_FAIL; - } - if (__HAL_MMC_GET_FLAG(hmmc, SDMMC_IT_DTIMEOUT) != RESET) - { - hmmc->ErrorCode |= HAL_MMC_ERROR_DATA_TIMEOUT; - } - if (__HAL_MMC_GET_FLAG(hmmc, SDMMC_IT_RXOVERR) != RESET) - { - hmmc->ErrorCode |= HAL_MMC_ERROR_RX_OVERRUN; - } - if (__HAL_MMC_GET_FLAG(hmmc, SDMMC_IT_TXUNDERR) != RESET) - { - hmmc->ErrorCode |= HAL_MMC_ERROR_TX_UNDERRUN; - } - - /* Clear All flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_DATA_FLAGS); - - /* Disable all interrupts */ - __HAL_MMC_DISABLE_IT(hmmc, SDMMC_IT_DATAEND | SDMMC_IT_DCRCFAIL | SDMMC_IT_DTIMEOUT | \ - SDMMC_IT_TXUNDERR | SDMMC_IT_RXOVERR); - - __SDMMC_CMDTRANS_DISABLE(hmmc->Instance); - hmmc->Instance->DCTRL |= SDMMC_DCTRL_FIFORST; - hmmc->Instance->CMD |= SDMMC_CMD_CMDSTOP; - hmmc->ErrorCode |= SDMMC_CmdStopTransfer(hmmc->Instance); - hmmc->Instance->CMD &= ~(SDMMC_CMD_CMDSTOP); - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_FLAG_DABORT); - - if ((context & MMC_CONTEXT_IT) != 0U) - { - /* Set the MMC state to ready to be able to start again the process */ - hmmc->State = HAL_MMC_STATE_READY; -#if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) - hmmc->ErrorCallback(hmmc); -#else - HAL_MMC_ErrorCallback(hmmc); -#endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ - } - else if ((context & MMC_CONTEXT_DMA) != 0U) - { - if (hmmc->ErrorCode != HAL_MMC_ERROR_NONE) - { - /* Disable Internal DMA */ - __HAL_MMC_DISABLE_IT(hmmc, SDMMC_IT_IDMABTC); - hmmc->Instance->IDMACTRL = SDMMC_DISABLE_IDMA; - - /* Set the MMC state to ready to be able to start again the process */ - hmmc->State = HAL_MMC_STATE_READY; -#if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) - hmmc->ErrorCallback(hmmc); -#else - HAL_MMC_ErrorCallback(hmmc); -#endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ - } - } - else - { - /* Nothing to do */ - } - } - - else if (__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_IDMABTC) != RESET) - { - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_IT_IDMABTC); - - if ((context & MMC_CONTEXT_WRITE_MULTIPLE_BLOCK) != 0U) - { -#if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) - hmmc->Write_DMALnkLstBufCpltCallback(hmmc); -#else - HAL_MMCEx_Write_DMALnkLstBufCpltCallback(hmmc); -#endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ - } - else /* MMC_CONTEXT_READ_MULTIPLE_BLOCK */ - { -#if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) - hmmc->Read_DMALnkLstBufCpltCallback(hmmc); -#else - HAL_MMCEx_Read_DMALnkLstBufCpltCallback(hmmc); -#endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ - } - } - - else - { - /* Nothing to do */ - } -} - -/** - * @brief return the MMC state - * @param hmmc: Pointer to mmc handle - * @retval HAL state - */ -HAL_MMC_StateTypeDef HAL_MMC_GetState(const MMC_HandleTypeDef *hmmc) -{ - return hmmc->State; -} - -/** - * @brief Return the MMC error code - * @param hmmc : Pointer to a MMC_HandleTypeDef structure that contains - * the configuration information. - * @retval MMC Error Code - */ -uint32_t HAL_MMC_GetError(const MMC_HandleTypeDef *hmmc) -{ - return hmmc->ErrorCode; -} - -/** - * @brief Tx Transfer completed callbacks - * @param hmmc: Pointer to MMC handle - * @retval None - */ -__weak void HAL_MMC_TxCpltCallback(MMC_HandleTypeDef *hmmc) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hmmc); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_MMC_TxCpltCallback can be implemented in the user file - */ -} - -/** - * @brief Rx Transfer completed callbacks - * @param hmmc: Pointer MMC handle - * @retval None - */ -__weak void HAL_MMC_RxCpltCallback(MMC_HandleTypeDef *hmmc) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hmmc); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_MMC_RxCpltCallback can be implemented in the user file - */ -} - -/** - * @brief MMC error callbacks - * @param hmmc: Pointer MMC handle - * @retval None - */ -__weak void HAL_MMC_ErrorCallback(MMC_HandleTypeDef *hmmc) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hmmc); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_MMC_ErrorCallback can be implemented in the user file - */ -} - -/** - * @brief MMC Abort callbacks - * @param hmmc: Pointer MMC handle - * @retval None - */ -__weak void HAL_MMC_AbortCallback(MMC_HandleTypeDef *hmmc) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hmmc); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_MMC_AbortCallback can be implemented in the user file - */ -} - -#if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) -/** - * @brief Register a User MMC Callback - * To be used instead of the weak (overridden) predefined callback - * @note The HAL_MMC_RegisterCallback() may be called before HAL_MMC_Init() in - * HAL_MMC_STATE_RESET to register callbacks for HAL_MMC_MSP_INIT_CB_ID - * and HAL_MMC_MSP_DEINIT_CB_ID. - * @param hmmc : MMC handle - * @param CallbackId : ID of the callback to be registered - * This parameter can be one of the following values: - * @arg @ref HAL_MMC_TX_CPLT_CB_ID MMC Tx Complete Callback ID - * @arg @ref HAL_MMC_RX_CPLT_CB_ID MMC Rx Complete Callback ID - * @arg @ref HAL_MMC_ERROR_CB_ID MMC Error Callback ID - * @arg @ref HAL_MMC_ABORT_CB_ID MMC Abort Callback ID - * @arg @ref HAL_MMC_READ_DMA_LNKLST_BUF_CPLT_CB_ID MMC DMA Rx Linked List Node buffer Callback ID - * @arg @ref HAL_MMC_WRITE_DMA_LNKLST_BUF_CPLT_CB_ID MMC DMA Tx Linked List Node buffer Callback ID - * @arg @ref HAL_MMC_MSP_INIT_CB_ID MMC MspInit Callback ID - * @arg @ref HAL_MMC_MSP_DEINIT_CB_ID MMC MspDeInit Callback ID - * @param pCallback : pointer to the Callback function - * @retval status - */ -HAL_StatusTypeDef HAL_MMC_RegisterCallback(MMC_HandleTypeDef *hmmc, HAL_MMC_CallbackIDTypeDef CallbackId, - pMMC_CallbackTypeDef pCallback) -{ - HAL_StatusTypeDef status = HAL_OK; - - if (pCallback == NULL) - { - /* Update the error code */ - hmmc->ErrorCode |= HAL_MMC_ERROR_INVALID_CALLBACK; - return HAL_ERROR; - } - - if (hmmc->State == HAL_MMC_STATE_READY) - { - switch (CallbackId) - { - case HAL_MMC_TX_CPLT_CB_ID : - hmmc->TxCpltCallback = pCallback; - break; - case HAL_MMC_RX_CPLT_CB_ID : - hmmc->RxCpltCallback = pCallback; - break; - case HAL_MMC_ERROR_CB_ID : - hmmc->ErrorCallback = pCallback; - break; - case HAL_MMC_ABORT_CB_ID : - hmmc->AbortCpltCallback = pCallback; - break; - case HAL_MMC_READ_DMA_LNKLST_BUF_CPLT_CB_ID : - hmmc->Read_DMALnkLstBufCpltCallback = pCallback; - break; - case HAL_MMC_WRITE_DMA_LNKLST_BUF_CPLT_CB_ID : - hmmc->Write_DMALnkLstBufCpltCallback = pCallback; - break; - case HAL_MMC_MSP_INIT_CB_ID : - hmmc->MspInitCallback = pCallback; - break; - case HAL_MMC_MSP_DEINIT_CB_ID : - hmmc->MspDeInitCallback = pCallback; - break; - default : - /* Update the error code */ - hmmc->ErrorCode |= HAL_MMC_ERROR_INVALID_CALLBACK; - /* update return status */ - status = HAL_ERROR; - break; - } - } - else if (hmmc->State == HAL_MMC_STATE_RESET) - { - switch (CallbackId) - { - case HAL_MMC_MSP_INIT_CB_ID : - hmmc->MspInitCallback = pCallback; - break; - case HAL_MMC_MSP_DEINIT_CB_ID : - hmmc->MspDeInitCallback = pCallback; - break; - default : - /* Update the error code */ - hmmc->ErrorCode |= HAL_MMC_ERROR_INVALID_CALLBACK; - /* update return status */ - status = HAL_ERROR; - break; - } - } - else - { - /* Update the error code */ - hmmc->ErrorCode |= HAL_MMC_ERROR_INVALID_CALLBACK; - /* update return status */ - status = HAL_ERROR; - } - - return status; -} - -/** - * @brief Unregister a User MMC Callback - * MMC Callback is redirected to the weak (overridden) predefined callback - * @note The HAL_MMC_UnRegisterCallback() may be called before HAL_MMC_Init() in - * HAL_MMC_STATE_RESET to register callbacks for HAL_MMC_MSP_INIT_CB_ID - * and HAL_MMC_MSP_DEINIT_CB_ID. - * @param hmmc : MMC handle - * @param CallbackId : ID of the callback to be unregistered - * This parameter can be one of the following values: - * @arg @ref HAL_MMC_TX_CPLT_CB_ID MMC Tx Complete Callback ID - * @arg @ref HAL_MMC_RX_CPLT_CB_ID MMC Rx Complete Callback ID - * @arg @ref HAL_MMC_ERROR_CB_ID MMC Error Callback ID - * @arg @ref HAL_MMC_ABORT_CB_ID MMC Abort Callback ID - * @arg @ref HAL_MMC_READ_DMA_LNKLST_BUF_CPLT_CB_ID MMC DMA Rx Linked List Node buffer Callback ID - * @arg @ref HAL_MMC_WRITE_DMA_LNKLST_BUF_CPLT_CB_ID MMC DMA Tx Linked List Node buffer Callback ID - * @arg @ref HAL_MMC_MSP_INIT_CB_ID MMC MspInit Callback ID - * @arg @ref HAL_MMC_MSP_DEINIT_CB_ID MMC MspDeInit Callback ID - * @retval status - */ -HAL_StatusTypeDef HAL_MMC_UnRegisterCallback(MMC_HandleTypeDef *hmmc, HAL_MMC_CallbackIDTypeDef CallbackId) -{ - HAL_StatusTypeDef status = HAL_OK; - - if (hmmc->State == HAL_MMC_STATE_READY) - { - switch (CallbackId) - { - case HAL_MMC_TX_CPLT_CB_ID : - hmmc->TxCpltCallback = HAL_MMC_TxCpltCallback; - break; - case HAL_MMC_RX_CPLT_CB_ID : - hmmc->RxCpltCallback = HAL_MMC_RxCpltCallback; - break; - case HAL_MMC_ERROR_CB_ID : - hmmc->ErrorCallback = HAL_MMC_ErrorCallback; - break; - case HAL_MMC_ABORT_CB_ID : - hmmc->AbortCpltCallback = HAL_MMC_AbortCallback; - break; - case HAL_MMC_READ_DMA_LNKLST_BUF_CPLT_CB_ID : - hmmc->Read_DMALnkLstBufCpltCallback = HAL_MMCEx_Read_DMALnkLstBufCpltCallback; - break; - case HAL_MMC_WRITE_DMA_LNKLST_BUF_CPLT_CB_ID : - hmmc->Write_DMALnkLstBufCpltCallback = HAL_MMCEx_Write_DMALnkLstBufCpltCallback; - break; - case HAL_MMC_MSP_INIT_CB_ID : - hmmc->MspInitCallback = HAL_MMC_MspInit; - break; - case HAL_MMC_MSP_DEINIT_CB_ID : - hmmc->MspDeInitCallback = HAL_MMC_MspDeInit; - break; - default : - /* Update the error code */ - hmmc->ErrorCode |= HAL_MMC_ERROR_INVALID_CALLBACK; - /* update return status */ - status = HAL_ERROR; - break; - } - } - else if (hmmc->State == HAL_MMC_STATE_RESET) - { - switch (CallbackId) - { - case HAL_MMC_MSP_INIT_CB_ID : - hmmc->MspInitCallback = HAL_MMC_MspInit; - break; - case HAL_MMC_MSP_DEINIT_CB_ID : - hmmc->MspDeInitCallback = HAL_MMC_MspDeInit; - break; - default : - /* Update the error code */ - hmmc->ErrorCode |= HAL_MMC_ERROR_INVALID_CALLBACK; - /* update return status */ - status = HAL_ERROR; - break; - } - } - else - { - /* Update the error code */ - hmmc->ErrorCode |= HAL_MMC_ERROR_INVALID_CALLBACK; - /* update return status */ - status = HAL_ERROR; - } - - return status; -} -#endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ - -/** - * @} - */ - -/** @addtogroup MMC_Exported_Functions_Group3 - * @brief management functions - * -@verbatim - ============================================================================== - ##### Peripheral Control functions ##### - ============================================================================== - [..] - This subsection provides a set of functions allowing to control the MMC card - operations and get the related information - -@endverbatim - * @{ - */ - -/** - * @brief Returns information the information of the card which are stored on - * the CID register. - * @param hmmc: Pointer to MMC handle - * @param pCID: Pointer to a HAL_MMC_CIDTypedef structure that - * contains all CID register parameters - * @retval HAL status - */ -HAL_StatusTypeDef HAL_MMC_GetCardCID(const MMC_HandleTypeDef *hmmc, HAL_MMC_CardCIDTypeDef *pCID) -{ - pCID->ManufacturerID = (uint8_t)((hmmc->CID[0] & 0xFF000000U) >> 24U); - - pCID->OEM_AppliID = (uint16_t)((hmmc->CID[0] & 0x00FFFF00U) >> 8U); - - pCID->ProdName1 = (((hmmc->CID[0] & 0x000000FFU) << 24U) | ((hmmc->CID[1] & 0xFFFFFF00U) >> 8U)); - - pCID->ProdName2 = (uint8_t)(hmmc->CID[1] & 0x000000FFU); - - pCID->ProdRev = (uint8_t)((hmmc->CID[2] & 0xFF000000U) >> 24U); - - pCID->ProdSN = (((hmmc->CID[2] & 0x00FFFFFFU) << 8U) | ((hmmc->CID[3] & 0xFF000000U) >> 24U)); - - pCID->Reserved1 = (uint8_t)((hmmc->CID[3] & 0x00F00000U) >> 20U); - - pCID->ManufactDate = (uint16_t)((hmmc->CID[3] & 0x000FFF00U) >> 8U); - - pCID->CID_CRC = (uint8_t)((hmmc->CID[3] & 0x000000FEU) >> 1U); - - pCID->Reserved2 = 1U; - - return HAL_OK; -} - -/** - * @brief Returns information the information of the card which are stored on - * the CSD register. - * @param hmmc: Pointer to MMC handle - * @param pCSD: Pointer to a HAL_MMC_CardCSDTypeDef structure that - * contains all CSD register parameters - * @retval HAL status - */ -HAL_StatusTypeDef HAL_MMC_GetCardCSD(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCSDTypeDef *pCSD) -{ - uint32_t block_nbr = 0; - - pCSD->CSDStruct = (uint8_t)((hmmc->CSD[0] & 0xC0000000U) >> 30U); - - pCSD->SysSpecVersion = (uint8_t)((hmmc->CSD[0] & 0x3C000000U) >> 26U); - - pCSD->Reserved1 = (uint8_t)((hmmc->CSD[0] & 0x03000000U) >> 24U); - - pCSD->TAAC = (uint8_t)((hmmc->CSD[0] & 0x00FF0000U) >> 16U); - - pCSD->NSAC = (uint8_t)((hmmc->CSD[0] & 0x0000FF00U) >> 8U); - - pCSD->MaxBusClkFrec = (uint8_t)(hmmc->CSD[0] & 0x000000FFU); - - pCSD->CardComdClasses = (uint16_t)((hmmc->CSD[1] & 0xFFF00000U) >> 20U); - - pCSD->RdBlockLen = (uint8_t)((hmmc->CSD[1] & 0x000F0000U) >> 16U); - - pCSD->PartBlockRead = (uint8_t)((hmmc->CSD[1] & 0x00008000U) >> 15U); - - pCSD->WrBlockMisalign = (uint8_t)((hmmc->CSD[1] & 0x00004000U) >> 14U); - - pCSD->RdBlockMisalign = (uint8_t)((hmmc->CSD[1] & 0x00002000U) >> 13U); - - pCSD->DSRImpl = (uint8_t)((hmmc->CSD[1] & 0x00001000U) >> 12U); - - pCSD->Reserved2 = 0U; /*!< Reserved */ - - if (MMC_ReadExtCSD(hmmc, &block_nbr, 212, 0x0FFFFFFFU) != HAL_OK) /* Field SEC_COUNT [215:212] */ - { - return HAL_ERROR; - } - - if (hmmc->MmcCard.CardType == MMC_LOW_CAPACITY_CARD) - { - pCSD->DeviceSize = (((hmmc->CSD[1] & 0x000003FFU) << 2U) | ((hmmc->CSD[2] & 0xC0000000U) >> 30U)); - - pCSD->MaxRdCurrentVDDMin = (uint8_t)((hmmc->CSD[2] & 0x38000000U) >> 27U); - - pCSD->MaxRdCurrentVDDMax = (uint8_t)((hmmc->CSD[2] & 0x07000000U) >> 24U); - - pCSD->MaxWrCurrentVDDMin = (uint8_t)((hmmc->CSD[2] & 0x00E00000U) >> 21U); - - pCSD->MaxWrCurrentVDDMax = (uint8_t)((hmmc->CSD[2] & 0x001C0000U) >> 18U); - - pCSD->DeviceSizeMul = (uint8_t)((hmmc->CSD[2] & 0x00038000U) >> 15U); - - hmmc->MmcCard.BlockNbr = (pCSD->DeviceSize + 1U) ; - hmmc->MmcCard.BlockNbr *= (1UL << ((pCSD->DeviceSizeMul & 0x07U) + 2U)); - hmmc->MmcCard.BlockSize = (1UL << (pCSD->RdBlockLen & 0x0FU)); - - hmmc->MmcCard.LogBlockNbr = (hmmc->MmcCard.BlockNbr) * ((hmmc->MmcCard.BlockSize) / MMC_BLOCKSIZE); - hmmc->MmcCard.LogBlockSize = MMC_BLOCKSIZE; - } - else if (hmmc->MmcCard.CardType == MMC_HIGH_CAPACITY_CARD) - { - hmmc->MmcCard.BlockNbr = block_nbr; - hmmc->MmcCard.LogBlockNbr = hmmc->MmcCard.BlockNbr; - hmmc->MmcCard.BlockSize = MMC_BLOCKSIZE; - hmmc->MmcCard.LogBlockSize = hmmc->MmcCard.BlockSize; - } - else - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= HAL_MMC_ERROR_UNSUPPORTED_FEATURE; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - - pCSD->EraseGrSize = (uint8_t)((hmmc->CSD[2] & 0x00004000U) >> 14U); - - pCSD->EraseGrMul = (uint8_t)((hmmc->CSD[2] & 0x00003F80U) >> 7U); - - pCSD->WrProtectGrSize = (uint8_t)(hmmc->CSD[2] & 0x0000007FU); - - pCSD->WrProtectGrEnable = (uint8_t)((hmmc->CSD[3] & 0x80000000U) >> 31U); - - pCSD->ManDeflECC = (uint8_t)((hmmc->CSD[3] & 0x60000000U) >> 29U); - - pCSD->WrSpeedFact = (uint8_t)((hmmc->CSD[3] & 0x1C000000U) >> 26U); - - pCSD->MaxWrBlockLen = (uint8_t)((hmmc->CSD[3] & 0x03C00000U) >> 22U); - - pCSD->WriteBlockPaPartial = (uint8_t)((hmmc->CSD[3] & 0x00200000U) >> 21U); - - pCSD->Reserved3 = 0; - - pCSD->ContentProtectAppli = (uint8_t)((hmmc->CSD[3] & 0x00010000U) >> 16U); - - pCSD->FileFormatGroup = (uint8_t)((hmmc->CSD[3] & 0x00008000U) >> 15U); - - pCSD->CopyFlag = (uint8_t)((hmmc->CSD[3] & 0x00004000U) >> 14U); - - pCSD->PermWrProtect = (uint8_t)((hmmc->CSD[3] & 0x00002000U) >> 13U); - - pCSD->TempWrProtect = (uint8_t)((hmmc->CSD[3] & 0x00001000U) >> 12U); - - pCSD->FileFormat = (uint8_t)((hmmc->CSD[3] & 0x00000C00U) >> 10U); - - pCSD->ECC = (uint8_t)((hmmc->CSD[3] & 0x00000300U) >> 8U); - - pCSD->CSD_CRC = (uint8_t)((hmmc->CSD[3] & 0x000000FEU) >> 1U); - - pCSD->Reserved4 = 1; - - return HAL_OK; -} - -/** - * @brief Gets the MMC card info. - * @param hmmc: Pointer to MMC handle - * @param pCardInfo: Pointer to the HAL_MMC_CardInfoTypeDef structure that - * will contain the MMC card status information - * @retval HAL status - */ -HAL_StatusTypeDef HAL_MMC_GetCardInfo(const MMC_HandleTypeDef *hmmc, HAL_MMC_CardInfoTypeDef *pCardInfo) -{ - pCardInfo->CardType = (uint32_t)(hmmc->MmcCard.CardType); - pCardInfo->Class = (uint32_t)(hmmc->MmcCard.Class); - pCardInfo->RelCardAdd = (uint32_t)(hmmc->MmcCard.RelCardAdd); - pCardInfo->BlockNbr = (uint32_t)(hmmc->MmcCard.BlockNbr); - pCardInfo->BlockSize = (uint32_t)(hmmc->MmcCard.BlockSize); - pCardInfo->LogBlockNbr = (uint32_t)(hmmc->MmcCard.LogBlockNbr); - pCardInfo->LogBlockSize = (uint32_t)(hmmc->MmcCard.LogBlockSize); - - return HAL_OK; -} - -/** - * @brief Returns information the information of the card which are stored on - * the Extended CSD register. - * @param hmmc Pointer to MMC handle - * @param pExtCSD Pointer to a memory area (512 bytes) that contains all - * Extended CSD register parameters - * @param Timeout Specify timeout value - * @retval HAL status - */ -HAL_StatusTypeDef HAL_MMC_GetCardExtCSD(MMC_HandleTypeDef *hmmc, uint32_t *pExtCSD, uint32_t Timeout) -{ - SDMMC_DataInitTypeDef config; - uint32_t errorstate; - uint32_t tickstart = HAL_GetTick(); - uint32_t count; - uint32_t dataremaining; - uint32_t *tmp_buf; - - if (NULL == pExtCSD) - { - hmmc->ErrorCode |= HAL_MMC_ERROR_PARAM; - return HAL_ERROR; - } - - if (hmmc->State == HAL_MMC_STATE_READY) - { - hmmc->ErrorCode = HAL_MMC_ERROR_NONE; - - hmmc->State = HAL_MMC_STATE_BUSY; - - /* Initialize data control register */ - hmmc->Instance->DCTRL = 0; - - /* Initiaize the destination pointer */ - tmp_buf = pExtCSD; - - /* Configure the MMC DPSM (Data Path State Machine) */ - config.DataTimeOut = SDMMC_DATATIMEOUT; - config.DataLength = MMC_BLOCKSIZE; - config.DataBlockSize = SDMMC_DATABLOCK_SIZE_512B; - config.TransferDir = SDMMC_TRANSFER_DIR_TO_SDMMC; - config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK; - config.DPSM = SDMMC_DPSM_DISABLE; - (void)SDMMC_ConfigData(hmmc->Instance, &config); - __SDMMC_CMDTRANS_ENABLE(hmmc->Instance); - - /* Send ExtCSD Read command to Card */ - errorstate = SDMMC_CmdSendEXTCSD(hmmc->Instance, 0); - if (errorstate != HAL_MMC_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= errorstate; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - - /* Poll on SDMMC flags */ - dataremaining = config.DataLength; - while (!__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_RXOVERR | - SDMMC_FLAG_DCRCFAIL | SDMMC_FLAG_DTIMEOUT | SDMMC_FLAG_DATAEND)) - { - if (__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_RXFIFOHF) && (dataremaining >= SDMMC_FIFO_SIZE)) - { - /* Read data from SDMMC Rx FIFO */ - for (count = 0U; count < (SDMMC_FIFO_SIZE / 4U); count++) - { - *tmp_buf = SDMMC_ReadFIFO(hmmc->Instance); - tmp_buf++; - } - dataremaining -= SDMMC_FIFO_SIZE; - } - - if (((HAL_GetTick() - tickstart) >= Timeout) || (Timeout == 0U)) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= HAL_MMC_ERROR_TIMEOUT; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_TIMEOUT; - } - } - - __SDMMC_CMDTRANS_DISABLE(hmmc->Instance); - - /* Get error state */ - if (__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_DTIMEOUT)) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= HAL_MMC_ERROR_DATA_TIMEOUT; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - else if (__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_DCRCFAIL)) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= HAL_MMC_ERROR_DATA_CRC_FAIL; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - else if (__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_RXOVERR)) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= HAL_MMC_ERROR_RX_OVERRUN; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - else - { - /* Nothing to do */ - } - - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_DATA_FLAGS); - hmmc->State = HAL_MMC_STATE_READY; - } - - return HAL_OK; -} - -/** - * @brief Enables wide bus operation for the requested card if supported by - * card. - * @param hmmc: Pointer to MMC handle - * @param WideMode: Specifies the MMC card wide bus mode - * This parameter can be one of the following values: - * @arg SDMMC_BUS_WIDE_8B: 8-bit data transfer - * @arg SDMMC_BUS_WIDE_4B: 4-bit data transfer - * @arg SDMMC_BUS_WIDE_1B: 1-bit data transfer - * @retval HAL status - */ -HAL_StatusTypeDef HAL_MMC_ConfigWideBusOperation(MMC_HandleTypeDef *hmmc, uint32_t WideMode) -{ - uint32_t count; - SDMMC_InitTypeDef Init = {0U}; - uint32_t errorstate; - uint32_t response = 0U; - - /* Check the parameters */ - assert_param(IS_SDMMC_BUS_WIDE(WideMode)); - - /* Change State */ - hmmc->State = HAL_MMC_STATE_BUSY; - - /* Check and update the power class if needed */ - if ((hmmc->Instance->CLKCR & SDMMC_CLKCR_BUSSPEED) != 0U) - { - if ((hmmc->Instance->CLKCR & SDMMC_CLKCR_DDR) != 0U) - { - errorstate = MMC_PwrClassUpdate(hmmc, WideMode, SDMMC_SPEED_MODE_DDR); - } - else - { - errorstate = MMC_PwrClassUpdate(hmmc, WideMode, SDMMC_SPEED_MODE_HIGH); - } - } - else - { - errorstate = MMC_PwrClassUpdate(hmmc, WideMode, SDMMC_SPEED_MODE_DEFAULT); - } - - if (errorstate == HAL_MMC_ERROR_NONE) - { - if (WideMode == SDMMC_BUS_WIDE_8B) - { - errorstate = SDMMC_CmdSwitch(hmmc->Instance, 0x03B70200U); - } - else if (WideMode == SDMMC_BUS_WIDE_4B) - { - errorstate = SDMMC_CmdSwitch(hmmc->Instance, 0x03B70100U); - } - else if (WideMode == SDMMC_BUS_WIDE_1B) - { - errorstate = SDMMC_CmdSwitch(hmmc->Instance, 0x03B70000U); - } - else - { - /* WideMode is not a valid argument*/ - errorstate = HAL_MMC_ERROR_PARAM; - } - - /* Check for switch error and violation of the trial number of sending CMD 13 */ - if (errorstate == HAL_MMC_ERROR_NONE) - { - /* While card is not ready for data and trial number for sending CMD13 is not exceeded */ - count = SDMMC_MAX_TRIAL; - do - { - errorstate = SDMMC_CmdSendStatus(hmmc->Instance, (uint32_t)(((uint32_t)hmmc->MmcCard.RelCardAdd) << 16U)); - if (errorstate != HAL_MMC_ERROR_NONE) - { - break; - } - - /* Get command response */ - response = SDMMC_GetResponse(hmmc->Instance, SDMMC_RESP1); - count--; - } while (((response & 0x100U) == 0U) && (count != 0U)); - - /* Check the status after the switch command execution */ - if ((count != 0U) && (errorstate == HAL_MMC_ERROR_NONE)) - { - /* Check the bit SWITCH_ERROR of the device status */ - if ((response & 0x80U) != 0U) - { - errorstate = SDMMC_ERROR_GENERAL_UNKNOWN_ERR; - } - else - { - /* Configure the SDMMC peripheral */ - Init = hmmc->Init; - Init.BusWide = WideMode; - (void)SDMMC_Init(hmmc->Instance, Init); - } - } - else if (count == 0U) - { - errorstate = SDMMC_ERROR_TIMEOUT; - } - else - { - /* Nothing to do */ - } - } - } - - /* Change State */ - hmmc->State = HAL_MMC_STATE_READY; - - if (errorstate != HAL_MMC_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= errorstate; - return HAL_ERROR; - } - - return HAL_OK; -} - -/** - * @brief Configure the speed bus mode - * @param hmmc: Pointer to the MMC handle - * @param SpeedMode: Specifies the MMC card speed bus mode - * This parameter can be one of the following values: - * @arg SDMMC_SPEED_MODE_AUTO: Max speed mode supported by the card - * @arg SDMMC_SPEED_MODE_DEFAULT: Default Speed (MMC @ 26MHz) - * @arg SDMMC_SPEED_MODE_HIGH: High Speed (MMC @ 52 MHz) - * @arg SDMMC_SPEED_MODE_DDR: High Speed DDR (MMC DDR @ 52 MHz) - * @retval HAL status - */ - -HAL_StatusTypeDef HAL_MMC_ConfigSpeedBusOperation(MMC_HandleTypeDef *hmmc, uint32_t SpeedMode) -{ - uint32_t tickstart; - HAL_StatusTypeDef status = HAL_OK; - uint32_t device_type; - uint32_t errorstate; - - /* Check the parameters */ - assert_param(IS_SDMMC_SPEED_MODE(SpeedMode)); - - /* Change State */ - hmmc->State = HAL_MMC_STATE_BUSY; - - /* Field DEVICE_TYPE [196 = 49*4] of Extended CSD register */ - device_type = (hmmc->Ext_CSD[49] & 0x000000FFU); - - switch (SpeedMode) - { - case SDMMC_SPEED_MODE_AUTO: - { - if (((hmmc->Instance->CLKCR & SDMMC_CLKCR_WIDBUS) != 0U) && ((device_type & 0x04U) != 0U)) - { - /* High Speed DDR mode allowed */ - errorstate = MMC_HighSpeed(hmmc, ENABLE); - if (errorstate != HAL_MMC_ERROR_NONE) - { - hmmc->ErrorCode |= errorstate; - } - else - { - if ((hmmc->Instance->CLKCR & SDMMC_CLKCR_CLKDIV) != 0U) - { - /* DDR mode not supported with CLKDIV = 0 */ - errorstate = MMC_DDR_Mode(hmmc, ENABLE); - if (errorstate != HAL_MMC_ERROR_NONE) - { - hmmc->ErrorCode |= errorstate; - } - } - } - } - else if ((device_type & 0x02U) != 0U) - { - /* High Speed mode allowed */ - errorstate = MMC_HighSpeed(hmmc, ENABLE); - if (errorstate != HAL_MMC_ERROR_NONE) - { - hmmc->ErrorCode |= errorstate; - } - } - else - { - /* Nothing to do : keep current speed */ - } - break; - } - case SDMMC_SPEED_MODE_DDR: - { - if (((hmmc->Instance->CLKCR & SDMMC_CLKCR_WIDBUS) != 0U) && ((device_type & 0x04U) != 0U)) - { - /* High Speed DDR mode allowed */ - errorstate = MMC_HighSpeed(hmmc, ENABLE); - if (errorstate != HAL_MMC_ERROR_NONE) - { - hmmc->ErrorCode |= errorstate; - } - else - { - if ((hmmc->Instance->CLKCR & SDMMC_CLKCR_CLKDIV) != 0U) - { - /* DDR mode not supported with CLKDIV = 0 */ - errorstate = MMC_DDR_Mode(hmmc, ENABLE); - if (errorstate != HAL_MMC_ERROR_NONE) - { - hmmc->ErrorCode |= errorstate; - } - } - } - } - else - { - /* High Speed DDR mode not allowed */ - hmmc->ErrorCode |= HAL_MMC_ERROR_UNSUPPORTED_FEATURE; - status = HAL_ERROR; - } - break; - } - case SDMMC_SPEED_MODE_HIGH: - { - if ((device_type & 0x02U) != 0U) - { - /* High Speed mode allowed */ - errorstate = MMC_HighSpeed(hmmc, ENABLE); - if (errorstate != HAL_MMC_ERROR_NONE) - { - hmmc->ErrorCode |= errorstate; - } - } - else - { - /* High Speed mode not allowed */ - hmmc->ErrorCode |= HAL_MMC_ERROR_UNSUPPORTED_FEATURE; - status = HAL_ERROR; - } - break; - } - case SDMMC_SPEED_MODE_DEFAULT: - { - if ((hmmc->Instance->CLKCR & SDMMC_CLKCR_DDR) != 0U) - { - /* High Speed DDR mode activated */ - errorstate = MMC_DDR_Mode(hmmc, DISABLE); - if (errorstate != HAL_MMC_ERROR_NONE) - { - hmmc->ErrorCode |= errorstate; - } - } - if ((hmmc->Instance->CLKCR & SDMMC_CLKCR_BUSSPEED) != 0U) - { - /* High Speed mode activated */ - errorstate = MMC_HighSpeed(hmmc, DISABLE); - if (errorstate != HAL_MMC_ERROR_NONE) - { - hmmc->ErrorCode |= errorstate; - } - } - break; - } - default: - hmmc->ErrorCode |= HAL_MMC_ERROR_PARAM; - status = HAL_ERROR; - break; - } - - /* Verify that MMC card is ready to use after Speed mode switch*/ - tickstart = HAL_GetTick(); - while ((HAL_MMC_GetCardState(hmmc) != HAL_MMC_CARD_TRANSFER)) - { - if ((HAL_GetTick() - tickstart) >= SDMMC_DATATIMEOUT) - { - hmmc->ErrorCode = HAL_MMC_ERROR_TIMEOUT; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_TIMEOUT; - } - } - - /* Change State */ - hmmc->State = HAL_MMC_STATE_READY; - return status; -} - -/** - * @brief Gets the current mmc card data state. - * @param hmmc: pointer to MMC handle - * @retval Card state - */ -HAL_MMC_CardStateTypeDef HAL_MMC_GetCardState(MMC_HandleTypeDef *hmmc) -{ - uint32_t cardstate; - uint32_t errorstate; - uint32_t resp1 = 0U; - - errorstate = MMC_SendStatus(hmmc, &resp1); - if (errorstate != HAL_MMC_ERROR_NONE) - { - hmmc->ErrorCode |= errorstate; - } - - cardstate = ((resp1 >> 9U) & 0x0FU); - - return (HAL_MMC_CardStateTypeDef)cardstate; -} - -/** - * @brief Abort the current transfer and disable the MMC. - * @param hmmc: pointer to a MMC_HandleTypeDef structure that contains - * the configuration information for MMC module. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_MMC_Abort(MMC_HandleTypeDef *hmmc) -{ - uint32_t error_code; - uint32_t tickstart; - - if (hmmc->State == HAL_MMC_STATE_BUSY) - { - /* DIsable All interrupts */ - __HAL_MMC_DISABLE_IT(hmmc, SDMMC_IT_DATAEND | SDMMC_IT_DCRCFAIL | SDMMC_IT_DTIMEOUT | \ - SDMMC_IT_TXUNDERR | SDMMC_IT_RXOVERR); - __SDMMC_CMDTRANS_DISABLE(hmmc->Instance); - - /*we will send the CMD12 in all cases in order to stop the data transfers*/ - /*In case the data transfer just finished, the external memory will not respond - and will return HAL_MMC_ERROR_CMD_RSP_TIMEOUT*/ - /*In case the data transfer aborted , the external memory will respond and will return HAL_MMC_ERROR_NONE*/ - /*Other scenario will return HAL_ERROR*/ - - hmmc->ErrorCode = SDMMC_CmdStopTransfer(hmmc->Instance); - error_code = hmmc->ErrorCode; - if ((error_code != HAL_MMC_ERROR_NONE) && (error_code != HAL_MMC_ERROR_CMD_RSP_TIMEOUT)) - { - return HAL_ERROR; - } - - tickstart = HAL_GetTick(); - if ((hmmc->Instance->DCTRL & SDMMC_DCTRL_DTDIR) == SDMMC_TRANSFER_DIR_TO_CARD) - { - if (hmmc->ErrorCode == HAL_MMC_ERROR_NONE) - { - while (!__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_DABORT | SDMMC_FLAG_BUSYD0END)) - { - if ((HAL_GetTick() - tickstart) >= SDMMC_DATATIMEOUT) - { - hmmc->ErrorCode = HAL_MMC_ERROR_TIMEOUT; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_TIMEOUT; - } - } - } - - if (hmmc->ErrorCode == HAL_MMC_ERROR_CMD_RSP_TIMEOUT) - { - while (!__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_DATAEND)) - { - if ((HAL_GetTick() - tickstart) >= SDMMC_DATATIMEOUT) - { - hmmc->ErrorCode = HAL_MMC_ERROR_TIMEOUT; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_TIMEOUT; - } - } - } - } - else if ((hmmc->Instance->DCTRL & SDMMC_DCTRL_DTDIR) == SDMMC_TRANSFER_DIR_TO_SDMMC) - { - while (!__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_DABORT | SDMMC_FLAG_DATAEND)) - { - if ((HAL_GetTick() - tickstart) >= SDMMC_DATATIMEOUT) - { - hmmc->ErrorCode = HAL_MMC_ERROR_TIMEOUT; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_TIMEOUT; - } - } - } - else - { - /* Nothing to do*/ - } - - /*The reason of all these while conditions previously is that we need to wait the SDMMC and clear - the appropriate flags that will be set depending of the abort/non abort of the memory */ - /*Not waiting the SDMMC flags will cause the next SDMMC_DISABLE_IDMA to not get cleared and will result - in next SDMMC read/write operation to fail */ - - /*SDMMC ready for clear data flags*/ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_FLAG_BUSYD0END); - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_DATA_FLAGS); - /* If IDMA Context, disable Internal DMA */ - hmmc->Instance->IDMACTRL = SDMMC_DISABLE_IDMA; - - hmmc->State = HAL_MMC_STATE_READY; - - /* Initialize the MMC operation */ - hmmc->Context = MMC_CONTEXT_NONE; - } - return HAL_OK; -} -/** - * @brief Abort the current transfer and disable the MMC (IT mode). - * @param hmmc: pointer to a MMC_HandleTypeDef structure that contains - * the configuration information for MMC module. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_MMC_Abort_IT(MMC_HandleTypeDef *hmmc) -{ - HAL_MMC_CardStateTypeDef CardState; - - /* DIsable All interrupts */ - __HAL_MMC_DISABLE_IT(hmmc, SDMMC_IT_DATAEND | SDMMC_IT_DCRCFAIL | SDMMC_IT_DTIMEOUT | \ - SDMMC_IT_TXUNDERR | SDMMC_IT_RXOVERR); - - /* If IDMA Context, disable Internal DMA */ - hmmc->Instance->IDMACTRL = SDMMC_DISABLE_IDMA; - - /* Clear All flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_DATA_FLAGS); - - CardState = HAL_MMC_GetCardState(hmmc); - hmmc->State = HAL_MMC_STATE_READY; - - if ((CardState == HAL_MMC_CARD_RECEIVING) || (CardState == HAL_MMC_CARD_SENDING)) - { - hmmc->ErrorCode = SDMMC_CmdStopTransfer(hmmc->Instance); - } - if (hmmc->ErrorCode != HAL_MMC_ERROR_NONE) - { - return HAL_ERROR; - } - else - { -#if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) - hmmc->AbortCpltCallback(hmmc); -#else - HAL_MMC_AbortCallback(hmmc); -#endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ - } - - return HAL_OK; -} - -/** - * @brief Perform specific commands sequence for the different type of erase. - * @note This API should be followed by a check on the card state through - * HAL_MMC_GetCardState(). - * @param hmmc Pointer to MMC handle - * @param EraseType Specifies the type of erase to be performed - * This parameter can be one of the following values: - * @arg HAL_MMC_TRIM Erase the write blocks identified by CMD35 & 36 - * @arg HAL_MMC_ERASE Erase the erase groups identified by CMD35 & 36 - * @arg HAL_MMC_DISCARD Discard the write blocks identified by CMD35 & 36 - * @arg HAL_MMC_SECURE_ERASE Perform a secure purge according SRT on the erase groups identified - * by CMD35 & 36 - * @arg HAL_MMC_SECURE_TRIM_STEP1 Mark the write blocks identified by CMD35 & 36 for secure erase - * @arg HAL_MMC_SECURE_TRIM_STEP2 Perform a secure purge according SRT on the write blocks - * previously identified - * @param BlockStartAdd Start Block address - * @param BlockEndAdd End Block address - * @retval HAL status - */ -HAL_StatusTypeDef HAL_MMC_EraseSequence(MMC_HandleTypeDef *hmmc, uint32_t EraseType, - uint32_t BlockStartAdd, uint32_t BlockEndAdd) -{ - uint32_t errorstate; - uint32_t start_add = BlockStartAdd; - uint32_t end_add = BlockEndAdd; - uint32_t tickstart = HAL_GetTick(); - - /* Check the erase type value is correct */ - assert_param(IS_MMC_ERASE_TYPE(EraseType)); - - /* Check the coherence between start and end address */ - if (end_add < start_add) - { - hmmc->ErrorCode |= HAL_MMC_ERROR_PARAM; - return HAL_ERROR; - } - - /* Check that the end address is not out of range of device memory */ - if (end_add > (hmmc->MmcCard.LogBlockNbr)) - { - hmmc->ErrorCode |= HAL_MMC_ERROR_ADDR_OUT_OF_RANGE; - return HAL_ERROR; - } - - /* Check the case of 4kB blocks (field DATA SECTOR SIZE of extended CSD register) */ - if (((hmmc->Ext_CSD[(MMC_EXT_CSD_DATA_SEC_SIZE_INDEX / 4)] >> MMC_EXT_CSD_DATA_SEC_SIZE_POS) & 0x000000FFU) != 0x0U) - { - if (((start_add % 8U) != 0U) || ((end_add % 8U) != 0U)) - { - /* The address should be aligned to 8 (corresponding to 4 KBytes blocks) */ - hmmc->ErrorCode |= HAL_MMC_ERROR_ADDR_MISALIGNED; - return HAL_ERROR; - } - } - - /* Check if the card command class supports erase command */ - if (((hmmc->MmcCard.Class) & SDMMC_CCCC_ERASE) == 0U) - { - hmmc->ErrorCode |= HAL_MMC_ERROR_REQUEST_NOT_APPLICABLE; - return HAL_ERROR; - } - - /* Check the state of the driver */ - if (hmmc->State == HAL_MMC_STATE_READY) - { - /* Change State */ - hmmc->State = HAL_MMC_STATE_BUSY; - - /* Check that the card is not locked */ - if ((SDMMC_GetResponse(hmmc->Instance, SDMMC_RESP1) & SDMMC_CARD_LOCKED) == SDMMC_CARD_LOCKED) - { - hmmc->ErrorCode |= HAL_MMC_ERROR_LOCK_UNLOCK_FAILED; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - - /* In case of low capacity card, the address is not block number but bytes */ - if ((hmmc->MmcCard.CardType) != MMC_HIGH_CAPACITY_CARD) - { - start_add *= MMC_BLOCKSIZE; - end_add *= MMC_BLOCKSIZE; - } - - /* Send CMD35 MMC_ERASE_GRP_START with start address as argument */ - errorstate = SDMMC_CmdEraseStartAdd(hmmc->Instance, start_add); - if (errorstate == HAL_MMC_ERROR_NONE) - { - /* Send CMD36 MMC_ERASE_GRP_END with end address as argument */ - errorstate = SDMMC_CmdEraseEndAdd(hmmc->Instance, end_add); - if (errorstate == HAL_MMC_ERROR_NONE) - { - /* Send CMD38 ERASE with erase type as argument */ - errorstate = SDMMC_CmdErase(hmmc->Instance, EraseType); - if (errorstate == HAL_MMC_ERROR_NONE) - { - if ((EraseType == HAL_MMC_SECURE_ERASE) || (EraseType == HAL_MMC_SECURE_TRIM_STEP2)) - { - /* Wait that the device is ready by checking the D0 line */ - while ((!__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_BUSYD0END)) && (errorstate == HAL_MMC_ERROR_NONE)) - { - if ((HAL_GetTick() - tickstart) >= SDMMC_MAXERASETIMEOUT) - { - errorstate = HAL_MMC_ERROR_TIMEOUT; - } - } - - /* Clear the flag corresponding to end D0 bus line */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_FLAG_BUSYD0END); - } - } - } - } - - /* Change State */ - hmmc->State = HAL_MMC_STATE_READY; - - /* Manage errors */ - if (errorstate != HAL_MMC_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= errorstate; - - if (errorstate != HAL_MMC_ERROR_TIMEOUT) - { - return HAL_ERROR; - } - else - { - return HAL_TIMEOUT; - } - } - else - { - return HAL_OK; - } - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Perform sanitize operation on the device. - * @note This API should be followed by a check on the card state through - * HAL_MMC_GetCardState(). - * @param hmmc Pointer to MMC handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_MMC_Sanitize(MMC_HandleTypeDef *hmmc) -{ - uint32_t errorstate; - uint32_t response = 0U; - uint32_t count; - uint32_t tickstart = HAL_GetTick(); - - /* Check the state of the driver */ - if (hmmc->State == HAL_MMC_STATE_READY) - { - /* Change State */ - hmmc->State = HAL_MMC_STATE_BUSY; - - /* Index : 165 - Value : 0x01 */ - errorstate = SDMMC_CmdSwitch(hmmc->Instance, 0x03A50100U); - if (errorstate == HAL_MMC_ERROR_NONE) - { - /* Wait that the device is ready by checking the D0 line */ - while ((!__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_BUSYD0END)) && (errorstate == HAL_MMC_ERROR_NONE)) - { - if ((HAL_GetTick() - tickstart) >= SDMMC_MAXERASETIMEOUT) - { - errorstate = HAL_MMC_ERROR_TIMEOUT; - } - } - - /* Clear the flag corresponding to end D0 bus line */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_FLAG_BUSYD0END); - - if (errorstate == HAL_MMC_ERROR_NONE) - { - /* While card is not ready for data and trial number for sending CMD13 is not exceeded */ - count = SDMMC_MAX_TRIAL; - do - { - errorstate = SDMMC_CmdSendStatus(hmmc->Instance, (uint32_t)(((uint32_t)hmmc->MmcCard.RelCardAdd) << 16U)); - if (errorstate != HAL_MMC_ERROR_NONE) - { - break; - } - - /* Get command response */ - response = SDMMC_GetResponse(hmmc->Instance, SDMMC_RESP1); - count--; - } while (((response & 0x100U) == 0U) && (count != 0U)); - - /* Check the status after the switch command execution */ - if ((count != 0U) && (errorstate == HAL_MMC_ERROR_NONE)) - { - /* Check the bit SWITCH_ERROR of the device status */ - if ((response & 0x80U) != 0U) - { - errorstate = SDMMC_ERROR_GENERAL_UNKNOWN_ERR; - } - } - else if (count == 0U) - { - errorstate = SDMMC_ERROR_TIMEOUT; - } - else - { - /* Nothing to do */ - } - } - } - - /* Change State */ - hmmc->State = HAL_MMC_STATE_READY; - - /* Manage errors */ - if (errorstate != HAL_MMC_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= errorstate; - - if (errorstate != HAL_MMC_ERROR_TIMEOUT) - { - return HAL_ERROR; - } - else - { - return HAL_TIMEOUT; - } - } - else - { - return HAL_OK; - } - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Configure the Secure Removal Type (SRT) in the Extended CSD register. - * @note This API should be followed by a check on the card state through - * HAL_MMC_GetCardState(). - * @param hmmc Pointer to MMC handle - * @param SRTMode Specifies the type of erase to be performed - * This parameter can be one of the following values: - * @arg HAL_MMC_SRT_ERASE Information removed by an erase - * @arg HAL_MMC_SRT_WRITE_CHAR_ERASE Information removed by an overwriting with a character - * followed by an erase - * @arg HAL_MMC_SRT_WRITE_CHAR_COMPL_RANDOM Information removed by an overwriting with a character, - * its complement then a random character - * @arg HAL_MMC_SRT_VENDOR_DEFINED Information removed using a vendor defined - * @retval HAL status - */ -HAL_StatusTypeDef HAL_MMC_ConfigSecRemovalType(MMC_HandleTypeDef *hmmc, uint32_t SRTMode) -{ - uint32_t srt; - uint32_t errorstate; - uint32_t response = 0U; - uint32_t count; - - /* Check the erase type value is correct */ - assert_param(IS_MMC_SRT_TYPE(SRTMode)); - - /* Check the state of the driver */ - if (hmmc->State == HAL_MMC_STATE_READY) - { - /* Get the supported values by the device */ - if (HAL_MMC_GetSupportedSecRemovalType(hmmc, &srt) == HAL_OK) - { - /* Change State */ - hmmc->State = HAL_MMC_STATE_BUSY; - - /* Check the value passed as parameter is supported by the device */ - if ((SRTMode & srt) != 0U) - { - /* Index : 16 - Value : SRTMode */ - srt |= ((POSITION_VAL(SRTMode)) << 4U); - errorstate = SDMMC_CmdSwitch(hmmc->Instance, (0x03100000U | (srt << 8U))); - if (errorstate == HAL_MMC_ERROR_NONE) - { - /* While card is not ready for data and trial number for sending CMD13 is not exceeded */ - count = SDMMC_MAX_TRIAL; - do - { - errorstate = SDMMC_CmdSendStatus(hmmc->Instance, (uint32_t)(((uint32_t)hmmc->MmcCard.RelCardAdd) << 16U)); - if (errorstate != HAL_MMC_ERROR_NONE) - { - break; - } - - /* Get command response */ - response = SDMMC_GetResponse(hmmc->Instance, SDMMC_RESP1); - count--; - } while (((response & 0x100U) == 0U) && (count != 0U)); - - /* Check the status after the switch command execution */ - if ((count != 0U) && (errorstate == HAL_MMC_ERROR_NONE)) - { - /* Check the bit SWITCH_ERROR of the device status */ - if ((response & 0x80U) != 0U) - { - errorstate = SDMMC_ERROR_GENERAL_UNKNOWN_ERR; - } - } - else if (count == 0U) - { - errorstate = SDMMC_ERROR_TIMEOUT; - } - else - { - /* Nothing to do */ - } - } - } - else - { - errorstate = SDMMC_ERROR_UNSUPPORTED_FEATURE; - } - - /* Change State */ - hmmc->State = HAL_MMC_STATE_READY; - } - else - { - errorstate = SDMMC_ERROR_GENERAL_UNKNOWN_ERR; - } - - /* Manage errors */ - if (errorstate != HAL_MMC_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= errorstate; - return HAL_ERROR; - } - else - { - return HAL_OK; - } - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Gets the supported values of the the Secure Removal Type (SRT). - * @param hmmc pointer to MMC handle - * @param SupportedSRT pointer for supported SRT value - * This parameter is a bit field of the following values: - * @arg HAL_MMC_SRT_ERASE Information removed by an erase - * @arg HAL_MMC_SRT_WRITE_CHAR_ERASE Information removed by an overwriting with a character followed - * by an erase - * @arg HAL_MMC_SRT_WRITE_CHAR_COMPL_RANDOM Information removed by an overwriting with a character, - * its complement then a random character - * @arg HAL_MMC_SRT_VENDOR_DEFINED Information removed using a vendor defined - * @retval HAL status - */ -HAL_StatusTypeDef HAL_MMC_GetSupportedSecRemovalType(MMC_HandleTypeDef *hmmc, uint32_t *SupportedSRT) -{ - /* Check the state of the driver */ - if (hmmc->State == HAL_MMC_STATE_READY) - { - /* Change State */ - hmmc->State = HAL_MMC_STATE_BUSY; - - /* Read field SECURE_REMOVAL_TYPE [16 = 4*4] of the Extended CSD register */ - *SupportedSRT = (hmmc->Ext_CSD[4] & 0x0000000FU); /* Bits [3:0] of field 16 */ - - /* Change State */ - hmmc->State = HAL_MMC_STATE_READY; - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Switch the device from Standby State to Sleep State. - * @param hmmc pointer to MMC handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_MMC_SleepDevice(MMC_HandleTypeDef *hmmc) -{ - uint32_t errorstate, - sleep_timeout, - timeout, - count, - response = 0U ; - uint32_t tickstart = HAL_GetTick(); - - /* Check the state of the driver */ - if (hmmc->State == HAL_MMC_STATE_READY) - { - /* Change State */ - hmmc->State = HAL_MMC_STATE_BUSY; - - /* Set the power-off notification to powered-on : Ext_CSD[34] = 1 */ - errorstate = SDMMC_CmdSwitch(hmmc->Instance, (0x03220100U)); - if (errorstate == HAL_MMC_ERROR_NONE) - { - /* While card is not ready for data and trial number for sending CMD13 is not exceeded */ - count = SDMMC_MAX_TRIAL; - do - { - errorstate = SDMMC_CmdSendStatus(hmmc->Instance, (uint32_t)(((uint32_t)hmmc->MmcCard.RelCardAdd) << 16U)); - if (errorstate != HAL_MMC_ERROR_NONE) - { - break; - } - - /* Get command response */ - response = SDMMC_GetResponse(hmmc->Instance, SDMMC_RESP1); - count--; - } while (((response & 0x100U) == 0U) && (count != 0U)); - - /* Check the status after the switch command execution */ - if (count == 0U) - { - errorstate = SDMMC_ERROR_TIMEOUT; - } - else if (errorstate == HAL_MMC_ERROR_NONE) - { - /* Check the bit SWITCH_ERROR of the device status */ - if ((response & 0x80U) != 0U) - { - errorstate = SDMMC_ERROR_UNSUPPORTED_FEATURE; - } - else - { - /* Set the power-off notification to sleep notification : Ext_CSD[34] = 4 */ - errorstate = SDMMC_CmdSwitch(hmmc->Instance, (0x03220400U)); - if (errorstate == HAL_MMC_ERROR_NONE) - { - /* Field SLEEP_NOTIFICATION_TIME [216] */ - sleep_timeout = ((hmmc->Ext_CSD[(MMC_EXT_CSD_SLEEP_NOTIFICATION_TIME_INDEX / 4)] >> - MMC_EXT_CSD_SLEEP_NOTIFICATION_TIME_POS) & 0x000000FFU); - - /* Sleep/Awake Timeout = 10us * 2^SLEEP_NOTIFICATION_TIME */ - /* In HAL, the tick interrupt occurs each ms */ - if ((sleep_timeout == 0U) || (sleep_timeout > 0x17U)) - { - sleep_timeout = 0x17U; /* Max register value defined is 0x17 */ - } - timeout = (((1UL << sleep_timeout) / 100U) + 1U); - - /* Wait that the device is ready by checking the D0 line */ - while ((!__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_BUSYD0END)) && (errorstate == HAL_MMC_ERROR_NONE)) - { - if ((HAL_GetTick() - tickstart) >= timeout) - { - errorstate = SDMMC_ERROR_TIMEOUT; - } - } - - /* Clear the flag corresponding to end D0 bus line */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_FLAG_BUSYD0END); - - if (errorstate == HAL_MMC_ERROR_NONE) - { - /* While card is not ready for data and trial number for sending CMD13 is not exceeded */ - count = SDMMC_MAX_TRIAL; - do - { - errorstate = SDMMC_CmdSendStatus(hmmc->Instance, - (uint32_t)(((uint32_t)hmmc->MmcCard.RelCardAdd) << 16U)); - if (errorstate != HAL_MMC_ERROR_NONE) - { - break; - } - - /* Get command response */ - response = SDMMC_GetResponse(hmmc->Instance, SDMMC_RESP1); - count--; - } while (((response & 0x100U) == 0U) && (count != 0U)); - - /* Check the status after the switch command execution */ - if (count == 0U) - { - errorstate = SDMMC_ERROR_TIMEOUT; - } - else if (errorstate == HAL_MMC_ERROR_NONE) - { - /* Check the bit SWITCH_ERROR of the device status */ - if ((response & 0x80U) != 0U) - { - errorstate = SDMMC_ERROR_UNSUPPORTED_FEATURE; - } - else - { - /* Switch the device in stand-by mode */ - (void)SDMMC_CmdSelDesel(hmmc->Instance, 0U); - - /* Field S_A_TIEMOUT [217] */ - sleep_timeout = ((hmmc->Ext_CSD[(MMC_EXT_CSD_S_A_TIMEOUT_INDEX / 4)] >> - MMC_EXT_CSD_S_A_TIMEOUT_POS) & 0x000000FFU); - - /* Sleep/Awake Timeout = 100ns * 2^S_A_TIMEOUT */ - /* In HAL, the tick interrupt occurs each ms */ - if ((sleep_timeout == 0U) || (sleep_timeout > 0x17U)) - { - sleep_timeout = 0x17U; /* Max register value defined is 0x17 */ - } - timeout = (((1UL << sleep_timeout) / 10000U) + 1U); - - if (HAL_MMC_GetCardState(hmmc) == HAL_MMC_CARD_STANDBY) - { - /* Send CMD5 CMD_MMC_SLEEP_AWAKE with RCA and SLEEP as argument */ - errorstate = SDMMC_CmdSleepMmc(hmmc->Instance, - ((hmmc->MmcCard.RelCardAdd << 16UL) | (0x1UL << 15UL))); - if (errorstate == HAL_MMC_ERROR_NONE) - { - /* Wait that the device is ready by checking the D0 line */ - while ((!__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_BUSYD0END)) && (errorstate == HAL_MMC_ERROR_NONE)) - { - if ((HAL_GetTick() - tickstart) >= timeout) - { - errorstate = SDMMC_ERROR_TIMEOUT; - } - } - - /* Clear the flag corresponding to end D0 bus line */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_FLAG_BUSYD0END); - } - } - else - { - errorstate = SDMMC_ERROR_REQUEST_NOT_APPLICABLE; - } - } - } - else - { - /* Nothing to do */ - } - } - } - } - } - else - { - /* Nothing to do */ - } - } - - /* Change State */ - hmmc->State = HAL_MMC_STATE_READY; - - /* Manage errors */ - if (errorstate != HAL_MMC_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= errorstate; - - if (errorstate != HAL_MMC_ERROR_TIMEOUT) - { - return HAL_ERROR; - } - else - { - return HAL_TIMEOUT; - } - } - else - { - return HAL_OK; - } - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Switch the device from Sleep State to Standby State. - * @param hmmc pointer to MMC handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_MMC_AwakeDevice(MMC_HandleTypeDef *hmmc) -{ - uint32_t errorstate; - uint32_t sleep_timeout; - uint32_t timeout; - uint32_t count; - uint32_t response = 0U; - uint32_t tickstart = HAL_GetTick(); - - /* Check the state of the driver */ - if (hmmc->State == HAL_MMC_STATE_READY) - { - /* Change State */ - hmmc->State = HAL_MMC_STATE_BUSY; - - /* Field S_A_TIEMOUT [217] */ - sleep_timeout = ((hmmc->Ext_CSD[(MMC_EXT_CSD_S_A_TIMEOUT_INDEX / 4)] >> MMC_EXT_CSD_S_A_TIMEOUT_POS) & - 0x000000FFU); - - /* Sleep/Awake Timeout = 100ns * 2^S_A_TIMEOUT */ - /* In HAL, the tick interrupt occurs each ms */ - if ((sleep_timeout == 0U) || (sleep_timeout > 0x17U)) - { - sleep_timeout = 0x17U; /* Max register value defined is 0x17 */ - } - timeout = (((1UL << sleep_timeout) / 10000U) + 1U); - - /* Send CMD5 CMD_MMC_SLEEP_AWAKE with RCA and AWAKE as argument */ - errorstate = SDMMC_CmdSleepMmc(hmmc->Instance, (hmmc->MmcCard.RelCardAdd << 16U)); - if (errorstate == HAL_MMC_ERROR_NONE) - { - /* Wait that the device is ready by checking the D0 line */ - while ((!__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_BUSYD0END)) && (errorstate == HAL_MMC_ERROR_NONE)) - { - if ((HAL_GetTick() - tickstart) >= timeout) - { - errorstate = SDMMC_ERROR_TIMEOUT; - } - } - - /* Clear the flag corresponding to end D0 bus line */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_FLAG_BUSYD0END); - - if (errorstate == HAL_MMC_ERROR_NONE) - { - if (HAL_MMC_GetCardState(hmmc) == HAL_MMC_CARD_STANDBY) - { - /* Switch the device in transfer mode */ - errorstate = SDMMC_CmdSelDesel(hmmc->Instance, (hmmc->MmcCard.RelCardAdd << 16U)); - if (errorstate == HAL_MMC_ERROR_NONE) - { - if (HAL_MMC_GetCardState(hmmc) == HAL_MMC_CARD_TRANSFER) - { - /* Set the power-off notification to powered-on : Ext_CSD[34] = 1 */ - errorstate = SDMMC_CmdSwitch(hmmc->Instance, (0x03220100U)); - if (errorstate == HAL_MMC_ERROR_NONE) - { - /* While card is not ready for data and trial number for sending CMD13 is not exceeded */ - count = SDMMC_MAX_TRIAL; - do - { - errorstate = SDMMC_CmdSendStatus(hmmc->Instance, - (uint32_t)(((uint32_t)hmmc->MmcCard.RelCardAdd) << 16U)); - if (errorstate != HAL_MMC_ERROR_NONE) - { - break; - } - - /* Get command response */ - response = SDMMC_GetResponse(hmmc->Instance, SDMMC_RESP1); - count--; - } while (((response & 0x100U) == 0U) && (count != 0U)); - - /* Check the status after the switch command execution */ - if (count == 0U) - { - errorstate = SDMMC_ERROR_TIMEOUT; - } - else if (errorstate == HAL_MMC_ERROR_NONE) - { - /* Check the bit SWITCH_ERROR of the device status */ - if ((response & 0x80U) != 0U) - { - errorstate = SDMMC_ERROR_UNSUPPORTED_FEATURE; - } - } - else - { - /* NOthing to do */ - } - } - } - else - { - errorstate = SDMMC_ERROR_REQUEST_NOT_APPLICABLE; - } - } - } - else - { - errorstate = SDMMC_ERROR_REQUEST_NOT_APPLICABLE; - } - } - } - - /* Change State */ - hmmc->State = HAL_MMC_STATE_READY; - - /* Manage errors */ - if (errorstate != HAL_MMC_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= errorstate; - - if (errorstate != HAL_MMC_ERROR_TIMEOUT) - { - return HAL_ERROR; - } - else - { - return HAL_TIMEOUT; - } - } - else - { - return HAL_OK; - } - } - else - { - return HAL_BUSY; - } -} -/** - * @} - */ - -/** - * @} - */ - -/* Private function ----------------------------------------------------------*/ -/** @addtogroup MMC_Private_Functions - * @{ - */ - -/** - * @brief Initializes the mmc card. - * @param hmmc: Pointer to MMC handle - * @retval MMC Card error state - */ -static uint32_t MMC_InitCard(MMC_HandleTypeDef *hmmc) -{ - HAL_MMC_CardCSDTypeDef CSD; - uint32_t errorstate; - uint16_t mmc_rca = 2U; - MMC_InitTypeDef Init = {0U}; - - /* Check the power State */ - if (SDMMC_GetPowerState(hmmc->Instance) == 0U) - { - /* Power off */ - return HAL_MMC_ERROR_REQUEST_NOT_APPLICABLE; - } - - /* Send CMD2 ALL_SEND_CID */ - errorstate = SDMMC_CmdSendCID(hmmc->Instance); - if (errorstate != HAL_MMC_ERROR_NONE) - { - return errorstate; - } - else - { - /* Get Card identification number data */ - hmmc->CID[0U] = SDMMC_GetResponse(hmmc->Instance, SDMMC_RESP1); - hmmc->CID[1U] = SDMMC_GetResponse(hmmc->Instance, SDMMC_RESP2); - hmmc->CID[2U] = SDMMC_GetResponse(hmmc->Instance, SDMMC_RESP3); - hmmc->CID[3U] = SDMMC_GetResponse(hmmc->Instance, SDMMC_RESP4); - } - - /* Send CMD3 SET_REL_ADDR with RCA = 2 (should be greater than 1) */ - /* MMC Card publishes its RCA. */ - errorstate = SDMMC_CmdSetRelAddMmc(hmmc->Instance, mmc_rca); - if (errorstate != HAL_MMC_ERROR_NONE) - { - return errorstate; - } - - /* Get the MMC card RCA */ - hmmc->MmcCard.RelCardAdd = mmc_rca; - - /* Send CMD9 SEND_CSD with argument as card's RCA */ - errorstate = SDMMC_CmdSendCSD(hmmc->Instance, (uint32_t)(hmmc->MmcCard.RelCardAdd << 16U)); - if (errorstate != HAL_MMC_ERROR_NONE) - { - return errorstate; - } - else - { - /* Get Card Specific Data */ - hmmc->CSD[0U] = SDMMC_GetResponse(hmmc->Instance, SDMMC_RESP1); - hmmc->CSD[1U] = SDMMC_GetResponse(hmmc->Instance, SDMMC_RESP2); - hmmc->CSD[2U] = SDMMC_GetResponse(hmmc->Instance, SDMMC_RESP3); - hmmc->CSD[3U] = SDMMC_GetResponse(hmmc->Instance, SDMMC_RESP4); - } - - /* Get the Card Class */ - hmmc->MmcCard.Class = (SDMMC_GetResponse(hmmc->Instance, SDMMC_RESP2) >> 20U); - - /* Select the Card */ - errorstate = SDMMC_CmdSelDesel(hmmc->Instance, (uint32_t)(((uint32_t)hmmc->MmcCard.RelCardAdd) << 16U)); - if (errorstate != HAL_MMC_ERROR_NONE) - { - return errorstate; - } - - /* Get CSD parameters */ - if (HAL_MMC_GetCardCSD(hmmc, &CSD) != HAL_OK) - { - return hmmc->ErrorCode; - } - - /* While card is not ready for data and trial number for sending CMD13 is not exceeded */ - errorstate = SDMMC_CmdSendStatus(hmmc->Instance, (uint32_t)(((uint32_t)hmmc->MmcCard.RelCardAdd) << 16U)); - if (errorstate != HAL_MMC_ERROR_NONE) - { - hmmc->ErrorCode |= errorstate; - } - - /* Get Extended CSD parameters */ - if (HAL_MMC_GetCardExtCSD(hmmc, hmmc->Ext_CSD, SDMMC_DATATIMEOUT) != HAL_OK) - { - return hmmc->ErrorCode; - } - - /* While card is not ready for data and trial number for sending CMD13 is not exceeded */ - errorstate = SDMMC_CmdSendStatus(hmmc->Instance, (uint32_t)(((uint32_t)hmmc->MmcCard.RelCardAdd) << 16U)); - if (errorstate != HAL_MMC_ERROR_NONE) - { - hmmc->ErrorCode |= errorstate; - } - - /* Configure the SDMMC peripheral */ - Init = hmmc->Init; - Init.BusWide = SDMMC_BUS_WIDE_1B; - (void)SDMMC_Init(hmmc->Instance, Init); - - /* All cards are initialized */ - return HAL_MMC_ERROR_NONE; -} - -/** - * @brief Enquires cards about their operating voltage and configures clock - * controls and stores MMC information that will be needed in future - * in the MMC handle. - * @param hmmc: Pointer to MMC handle - * @retval error state - */ -static uint32_t MMC_PowerON(MMC_HandleTypeDef *hmmc) -{ - __IO uint32_t count = 0U; - uint32_t response = 0U; - uint32_t validvoltage = 0U; - uint32_t errorstate; - - /* CMD0: GO_IDLE_STATE */ - errorstate = SDMMC_CmdGoIdleState(hmmc->Instance); - if (errorstate != HAL_MMC_ERROR_NONE) - { - return errorstate; - } - - while (validvoltage == 0U) - { - if (count++ == SDMMC_MAX_VOLT_TRIAL) - { - return HAL_MMC_ERROR_INVALID_VOLTRANGE; - } - - /* SEND CMD1 APP_CMD with voltage range as argument */ - errorstate = SDMMC_CmdOpCondition(hmmc->Instance, MMC_VOLTAGE_RANGE); - if (errorstate != HAL_MMC_ERROR_NONE) - { - return HAL_MMC_ERROR_UNSUPPORTED_FEATURE; - } - - /* Get command response */ - response = SDMMC_GetResponse(hmmc->Instance, SDMMC_RESP1); - - /* Get operating voltage*/ - validvoltage = (((response >> 31U) == 1U) ? 1U : 0U); - } - - /* When power routine is finished and command returns valid voltage */ - if (((response & (0xFF000000U)) >> 24) == 0xC0U) - { - hmmc->MmcCard.CardType = MMC_HIGH_CAPACITY_CARD; - } - else - { - hmmc->MmcCard.CardType = MMC_LOW_CAPACITY_CARD; - } - - return HAL_MMC_ERROR_NONE; -} - -/** - * @brief Turns the SDMMC output signals off. - * @param hmmc: Pointer to MMC handle - * @retval None - */ -static void MMC_PowerOFF(MMC_HandleTypeDef *hmmc) -{ - /* Set Power State to OFF */ - (void)SDMMC_PowerState_OFF(hmmc->Instance); -} - -/** - * @brief Returns the current card's status. - * @param hmmc: Pointer to MMC handle - * @param pCardStatus: pointer to the buffer that will contain the MMC card - * status (Card Status register) - * @retval error state - */ -static uint32_t MMC_SendStatus(MMC_HandleTypeDef *hmmc, uint32_t *pCardStatus) -{ - uint32_t errorstate; - - if (pCardStatus == NULL) - { - return HAL_MMC_ERROR_PARAM; - } - - /* Send Status command */ - errorstate = SDMMC_CmdSendStatus(hmmc->Instance, (uint32_t)(hmmc->MmcCard.RelCardAdd << 16U)); - if (errorstate != HAL_MMC_ERROR_NONE) - { - return errorstate; - } - - /* Get MMC card status */ - *pCardStatus = SDMMC_GetResponse(hmmc->Instance, SDMMC_RESP1); - - return HAL_MMC_ERROR_NONE; -} - -/** - * @brief Reads extended CSD register to get the sectors number of the device - * @param hmmc: Pointer to MMC handle - * @param pFieldData: Pointer to the read buffer - * @param FieldIndex: Index of the field to be read - * @param Timeout: Specify timeout value - * @retval HAL status - */ -static HAL_StatusTypeDef MMC_ReadExtCSD(MMC_HandleTypeDef *hmmc, uint32_t *pFieldData, - uint16_t FieldIndex, uint32_t Timeout) -{ - SDMMC_DataInitTypeDef config; - uint32_t errorstate; - uint32_t tickstart = HAL_GetTick(); - uint32_t count; - uint32_t i = 0; - uint32_t tmp_data; - uint32_t dataremaining; - - hmmc->ErrorCode = HAL_MMC_ERROR_NONE; - - /* Initialize data control register */ - hmmc->Instance->DCTRL = 0; - - /* Configure the MMC DPSM (Data Path State Machine) */ - config.DataTimeOut = SDMMC_DATATIMEOUT; - config.DataLength = MMC_BLOCKSIZE; - config.DataBlockSize = SDMMC_DATABLOCK_SIZE_512B; - config.TransferDir = SDMMC_TRANSFER_DIR_TO_SDMMC; - config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK; - config.DPSM = SDMMC_DPSM_ENABLE; - (void)SDMMC_ConfigData(hmmc->Instance, &config); - - /* Set Block Size for Card */ - errorstate = SDMMC_CmdSendEXTCSD(hmmc->Instance, 0); - if (errorstate != HAL_MMC_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= errorstate; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - - /* Poll on SDMMC flags */ - dataremaining = config.DataLength; - while (!__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_RXOVERR | SDMMC_FLAG_DCRCFAIL | SDMMC_FLAG_DTIMEOUT | - SDMMC_FLAG_DATAEND)) - { - if (__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_RXFIFOHF) && (dataremaining >= SDMMC_FIFO_SIZE)) - { - /* Read data from SDMMC Rx FIFO */ - for (count = 0U; count < (SDMMC_FIFO_SIZE / 4U); count++) - { - tmp_data = SDMMC_ReadFIFO(hmmc->Instance); - /* eg : SEC_COUNT : FieldIndex = 212 => i+count = 53 */ - /* DEVICE_TYPE : FieldIndex = 196 => i+count = 49 */ - if ((i + count) == ((uint32_t)FieldIndex / 4U)) - { - *pFieldData = tmp_data; - } - } - i += 8U; - dataremaining -= SDMMC_FIFO_SIZE; - } - - if (((HAL_GetTick() - tickstart) >= Timeout) || (Timeout == 0U)) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= HAL_MMC_ERROR_TIMEOUT; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_TIMEOUT; - } - } - - /* Get error state */ - if (__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_DTIMEOUT)) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= HAL_MMC_ERROR_DATA_TIMEOUT; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - else if (__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_DCRCFAIL)) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= HAL_MMC_ERROR_DATA_CRC_FAIL; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - else if (__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_RXOVERR)) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= HAL_MMC_ERROR_RX_OVERRUN; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - else - { - /* Nothing to do */ - } - - /* While card is not ready for data and trial number for sending CMD13 is not exceeded */ - errorstate = SDMMC_CmdSendStatus(hmmc->Instance, (uint32_t)(((uint32_t)hmmc->MmcCard.RelCardAdd) << 16)); - if (errorstate != HAL_MMC_ERROR_NONE) - { - hmmc->ErrorCode |= errorstate; - } - - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_DATA_FLAGS); - - hmmc->State = HAL_MMC_STATE_READY; - - return HAL_OK; -} - -/** - * @brief Wrap up reading in non-blocking mode. - * @param hmmc: pointer to a MMC_HandleTypeDef structure that contains - * the configuration information. - * @retval None - */ -static void MMC_Read_IT(MMC_HandleTypeDef *hmmc) -{ - uint32_t count; - uint32_t data; - uint8_t *tmp; - - tmp = hmmc->pRxBuffPtr; - - if (hmmc->RxXferSize >= SDMMC_FIFO_SIZE) - { - /* Read data from SDMMC Rx FIFO */ - for (count = 0U; count < (SDMMC_FIFO_SIZE / 4U); count++) - { - data = SDMMC_ReadFIFO(hmmc->Instance); - *tmp = (uint8_t)(data & 0xFFU); - tmp++; - *tmp = (uint8_t)((data >> 8U) & 0xFFU); - tmp++; - *tmp = (uint8_t)((data >> 16U) & 0xFFU); - tmp++; - *tmp = (uint8_t)((data >> 24U) & 0xFFU); - tmp++; - } - - hmmc->pRxBuffPtr = tmp; - hmmc->RxXferSize -= SDMMC_FIFO_SIZE; - } -} - -/** - * @brief Wrap up writing in non-blocking mode. - * @param hmmc: pointer to a MMC_HandleTypeDef structure that contains - * the configuration information. - * @retval None - */ -static void MMC_Write_IT(MMC_HandleTypeDef *hmmc) -{ - uint32_t count; - uint32_t data; - const uint8_t *tmp; - - tmp = hmmc->pTxBuffPtr; - - if (hmmc->TxXferSize >= SDMMC_FIFO_SIZE) - { - /* Write data to SDMMC Tx FIFO */ - for (count = 0U; count < (SDMMC_FIFO_SIZE / 4U); count++) - { - data = (uint32_t)(*tmp); - tmp++; - data |= ((uint32_t)(*tmp) << 8U); - tmp++; - data |= ((uint32_t)(*tmp) << 16U); - tmp++; - data |= ((uint32_t)(*tmp) << 24U); - tmp++; - (void)SDMMC_WriteFIFO(hmmc->Instance, &data); - } - - hmmc->pTxBuffPtr = tmp; - hmmc->TxXferSize -= SDMMC_FIFO_SIZE; - } -} - -/** - * @brief Switches the MMC card to high speed mode. - * @param hmmc: MMC handle - * @param state: State of high speed mode - * @retval MMC Card error state - */ -static uint32_t MMC_HighSpeed(MMC_HandleTypeDef *hmmc, FunctionalState state) -{ - uint32_t errorstate = HAL_MMC_ERROR_NONE; - uint32_t response = 0U; - uint32_t count; - uint32_t sdmmc_clk; - SDMMC_InitTypeDef Init = {0U}; - - if (((hmmc->Instance->CLKCR & SDMMC_CLKCR_BUSSPEED) != 0U) && (state == DISABLE)) - { - errorstate = MMC_PwrClassUpdate(hmmc, (hmmc->Instance->CLKCR & SDMMC_CLKCR_WIDBUS), SDMMC_SPEED_MODE_DEFAULT); - if (errorstate == HAL_MMC_ERROR_NONE) - { - /* Index : 185 - Value : 0 */ - errorstate = SDMMC_CmdSwitch(hmmc->Instance, 0x03B90000U); - } - } - - if (((hmmc->Instance->CLKCR & SDMMC_CLKCR_BUSSPEED) == 0U) && (state != DISABLE)) - { - errorstate = MMC_PwrClassUpdate(hmmc, (hmmc->Instance->CLKCR & SDMMC_CLKCR_WIDBUS), SDMMC_SPEED_MODE_HIGH); - if (errorstate == HAL_MMC_ERROR_NONE) - { - /* Index : 185 - Value : 1 */ - errorstate = SDMMC_CmdSwitch(hmmc->Instance, 0x03B90100U); - } - } - - if (errorstate == HAL_MMC_ERROR_NONE) - { - /* While card is not ready for data and trial number for sending CMD13 is not exceeded */ - count = SDMMC_MAX_TRIAL; - do - { - errorstate = SDMMC_CmdSendStatus(hmmc->Instance, (uint32_t)(((uint32_t)hmmc->MmcCard.RelCardAdd) << 16U)); - if (errorstate != HAL_MMC_ERROR_NONE) - { - break; - } - - /* Get command response */ - response = SDMMC_GetResponse(hmmc->Instance, SDMMC_RESP1); - count--; - } while (((response & 0x100U) == 0U) && (count != 0U)); - - /* Check the status after the switch command execution */ - if ((count != 0U) && (errorstate == HAL_MMC_ERROR_NONE)) - { - /* Check the bit SWITCH_ERROR of the device status */ - if ((response & 0x80U) != 0U) - { - errorstate = SDMMC_ERROR_UNSUPPORTED_FEATURE; - } - else - { - /* Configure high speed */ - Init.ClockEdge = hmmc->Init.ClockEdge; - Init.ClockPowerSave = hmmc->Init.ClockPowerSave; - Init.BusWide = (hmmc->Instance->CLKCR & SDMMC_CLKCR_WIDBUS); - Init.HardwareFlowControl = hmmc->Init.HardwareFlowControl; - - if (state == DISABLE) - { - Init.ClockDiv = hmmc->Init.ClockDiv; - (void)SDMMC_Init(hmmc->Instance, Init); - - CLEAR_BIT(hmmc->Instance->CLKCR, SDMMC_CLKCR_BUSSPEED); - } - else - { - /* High Speed Clock should be less or equal to 52MHz*/ - if (hmmc->Instance == SDMMC1) - { - sdmmc_clk = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_SDMMC1); - } - else if (hmmc->Instance == SDMMC2) - { - sdmmc_clk = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_SDMMC2); - } - else - { - sdmmc_clk = 0; - } - - if (sdmmc_clk == 0U) - { - errorstate = SDMMC_ERROR_INVALID_PARAMETER; - } - else - { - if (sdmmc_clk <= MMC_HIGH_SPEED_FREQ) - { - Init.ClockDiv = 0; - } - else - { - Init.ClockDiv = (sdmmc_clk / (2U * MMC_HIGH_SPEED_FREQ)) + 1U; - } - (void)SDMMC_Init(hmmc->Instance, Init); - - SET_BIT(hmmc->Instance->CLKCR, SDMMC_CLKCR_BUSSPEED); - } - } - } - } - else if (count == 0U) - { - errorstate = SDMMC_ERROR_TIMEOUT; - } - else - { - /* Nothing to do */ - } - } - - return errorstate; -} - -/** - * @brief Switches the MMC card to Double Data Rate (DDR) mode. - * @param hmmc: MMC handle - * @param state: State of DDR mode - * @retval MMC Card error state - */ -static uint32_t MMC_DDR_Mode(MMC_HandleTypeDef *hmmc, FunctionalState state) -{ - uint32_t errorstate = HAL_MMC_ERROR_NONE; - uint32_t response = 0U; - uint32_t count; - - if (((hmmc->Instance->CLKCR & SDMMC_CLKCR_DDR) != 0U) && (state == DISABLE)) - { - if ((hmmc->Instance->CLKCR & SDMMC_CLKCR_WIDBUS_0) != 0U) - { - errorstate = MMC_PwrClassUpdate(hmmc, SDMMC_BUS_WIDE_4B, SDMMC_SPEED_MODE_HIGH); - if (errorstate == HAL_MMC_ERROR_NONE) - { - /* Index : 183 - Value : 1 */ - errorstate = SDMMC_CmdSwitch(hmmc->Instance, 0x03B70100U); - } - } - else - { - errorstate = MMC_PwrClassUpdate(hmmc, SDMMC_BUS_WIDE_8B, SDMMC_SPEED_MODE_HIGH); - if (errorstate == HAL_MMC_ERROR_NONE) - { - /* Index : 183 - Value : 2 */ - errorstate = SDMMC_CmdSwitch(hmmc->Instance, 0x03B70200U); - } - } - } - - if (((hmmc->Instance->CLKCR & SDMMC_CLKCR_DDR) == 0U) && (state != DISABLE)) - { - if ((hmmc->Instance->CLKCR & SDMMC_CLKCR_WIDBUS_0) != 0U) - { - errorstate = MMC_PwrClassUpdate(hmmc, SDMMC_BUS_WIDE_4B, SDMMC_SPEED_MODE_DDR); - if (errorstate == HAL_MMC_ERROR_NONE) - { - /* Index : 183 - Value : 5 */ - errorstate = SDMMC_CmdSwitch(hmmc->Instance, 0x03B70500U); - } - } - else - { - errorstate = MMC_PwrClassUpdate(hmmc, SDMMC_BUS_WIDE_8B, SDMMC_SPEED_MODE_DDR); - if (errorstate == HAL_MMC_ERROR_NONE) - { - /* Index : 183 - Value : 6 */ - errorstate = SDMMC_CmdSwitch(hmmc->Instance, 0x03B70600U); - } - } - } - - if (errorstate == HAL_MMC_ERROR_NONE) - { - /* While card is not ready for data and trial number for sending CMD13 is not exceeded */ - count = SDMMC_MAX_TRIAL; - do - { - errorstate = SDMMC_CmdSendStatus(hmmc->Instance, (uint32_t)(((uint32_t)hmmc->MmcCard.RelCardAdd) << 16U)); - if (errorstate != HAL_MMC_ERROR_NONE) - { - break; - } - - /* Get command response */ - response = SDMMC_GetResponse(hmmc->Instance, SDMMC_RESP1); - count--; - } while (((response & 0x100U) == 0U) && (count != 0U)); - - /* Check the status after the switch command execution */ - if ((count != 0U) && (errorstate == HAL_MMC_ERROR_NONE)) - { - /* Check the bit SWITCH_ERROR of the device status */ - if ((response & 0x80U) != 0U) - { - errorstate = SDMMC_ERROR_UNSUPPORTED_FEATURE; - } - else - { - /* Configure DDR mode */ - if (state == DISABLE) - { - CLEAR_BIT(hmmc->Instance->CLKCR, SDMMC_CLKCR_DDR); - } - else - { - SET_BIT(hmmc->Instance->CLKCR, SDMMC_CLKCR_DDR); - } - } - } - else if (count == 0U) - { - errorstate = SDMMC_ERROR_TIMEOUT; - } - else - { - /* Nothing to do */ - } - } - - return errorstate; -} - -/** - * @brief Update the power class of the device. - * @param hmmc MMC handle - * @param Wide Wide of MMC bus - * @param Speed Speed of the MMC bus - * @retval MMC Card error state - */ -static uint32_t MMC_PwrClassUpdate(MMC_HandleTypeDef *hmmc, uint32_t Wide, uint32_t Speed) -{ - uint32_t count; - uint32_t response = 0U; - uint32_t errorstate = HAL_MMC_ERROR_NONE; - uint32_t power_class; - uint32_t supported_pwr_class; - - if ((Wide == SDMMC_BUS_WIDE_8B) || (Wide == SDMMC_BUS_WIDE_4B)) - { - power_class = 0U; /* Default value after power-on or software reset */ - - /* Read the PowerClass field of the Extended CSD register */ - if (MMC_ReadExtCSD(hmmc, &power_class, 187, SDMMC_DATATIMEOUT) != HAL_OK) /* Field POWER_CLASS [187] */ - { - errorstate = SDMMC_ERROR_GENERAL_UNKNOWN_ERR; - } - else - { - power_class = ((power_class >> 24U) & 0x000000FFU); - } - - /* Get the supported PowerClass field of the Extended CSD register */ - if (Speed == SDMMC_SPEED_MODE_DDR) - { - /* Field PWR_CL_DDR_52_xxx [238 or 239] */ - supported_pwr_class = ((hmmc->Ext_CSD[(MMC_EXT_CSD_PWR_CL_DDR_52_INDEX / 4)] >> MMC_EXT_CSD_PWR_CL_DDR_52_POS) & - 0x000000FFU); - } - else if (Speed == SDMMC_SPEED_MODE_HIGH) - { - /* Field PWR_CL_52_xxx [200 or 202] */ - supported_pwr_class = ((hmmc->Ext_CSD[(MMC_EXT_CSD_PWR_CL_52_INDEX / 4)] >> MMC_EXT_CSD_PWR_CL_52_POS) & - 0x000000FFU); - } - else - { - /* Field PWR_CL_26_xxx [201 or 203] */ - supported_pwr_class = ((hmmc->Ext_CSD[(MMC_EXT_CSD_PWR_CL_26_INDEX / 4)] >> MMC_EXT_CSD_PWR_CL_26_POS) & - 0x000000FFU); - } - - if (errorstate == HAL_MMC_ERROR_NONE) - { - if (Wide == SDMMC_BUS_WIDE_8B) - { - /* Bit [7:4]: power class for 8-bits bus configuration - Bit [3:0]: power class for 4-bits bus configuration */ - supported_pwr_class = (supported_pwr_class >> 4U); - } - - if ((power_class & 0x0FU) != (supported_pwr_class & 0x0FU)) - { - /* Need to change current power class */ - errorstate = SDMMC_CmdSwitch(hmmc->Instance, (0x03BB0000U | ((supported_pwr_class & 0x0FU) << 8U))); - - if (errorstate == HAL_MMC_ERROR_NONE) - { - /* While card is not ready for data and trial number for sending CMD13 is not exceeded */ - count = SDMMC_MAX_TRIAL; - do - { - errorstate = SDMMC_CmdSendStatus(hmmc->Instance, (uint32_t)(((uint32_t)hmmc->MmcCard.RelCardAdd) << 16U)); - if (errorstate != HAL_MMC_ERROR_NONE) - { - break; - } - - /* Get command response */ - response = SDMMC_GetResponse(hmmc->Instance, SDMMC_RESP1); - count--; - } while (((response & 0x100U) == 0U) && (count != 0U)); - - /* Check the status after the switch command execution */ - if ((count != 0U) && (errorstate == HAL_MMC_ERROR_NONE)) - { - /* Check the bit SWITCH_ERROR of the device status */ - if ((response & 0x80U) != 0U) - { - errorstate = SDMMC_ERROR_UNSUPPORTED_FEATURE; - } - } - else if (count == 0U) - { - errorstate = SDMMC_ERROR_TIMEOUT; - } - else - { - /* Nothing to do */ - } - } - } - } - } - - return errorstate; -} - -/** - * @brief Used to select the partition. - * @param hmmc: Pointer to MMC handle - * @param Partition: Partition type - * @retval HAL status - */ -HAL_StatusTypeDef HAL_MMC_SwitchPartition(MMC_HandleTypeDef *hmmc, HAL_MMC_PartitionTypeDef Partition) -{ - uint32_t errorstate; - uint32_t response = 0U; - uint32_t count; - uint32_t tickstart = HAL_GetTick(); - uint32_t arg = Partition | 0x03B30000U; - - /* Check the state of the driver */ - if (hmmc->State == HAL_MMC_STATE_READY) - { - /* Change State */ - hmmc->State = HAL_MMC_STATE_BUSY; - - /* Index : 179 - Value : partition */ - errorstate = SDMMC_CmdSwitch(hmmc->Instance, arg); - if (errorstate == HAL_MMC_ERROR_NONE) - { - /* Wait that the device is ready by checking the D0 line */ - while ((!__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_BUSYD0END)) && (errorstate == HAL_MMC_ERROR_NONE)) - { - if ((HAL_GetTick() - tickstart) >= SDMMC_MAXERASETIMEOUT) - { - errorstate = HAL_MMC_ERROR_TIMEOUT; - } - } - - /* Clear the flag corresponding to end D0 bus line */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_FLAG_BUSYD0END); - - if (errorstate == HAL_MMC_ERROR_NONE) - { - /* While card is not ready for data and trial number for sending CMD13 is not exceeded */ - count = SDMMC_MAX_TRIAL; - do - { - errorstate = SDMMC_CmdSendStatus(hmmc->Instance, (uint32_t)(((uint32_t)hmmc->MmcCard.RelCardAdd) << 16U)); - if (errorstate != HAL_MMC_ERROR_NONE) - { - break; - } - - /* Get command response */ - response = SDMMC_GetResponse(hmmc->Instance, SDMMC_RESP1); - count--; - } while (((response & 0x100U) == 0U) && (count != 0U)); - - /* Check the status after the switch command execution */ - if ((count != 0U) && (errorstate == HAL_MMC_ERROR_NONE)) - { - /* Check the bit SWITCH_ERROR of the device status */ - if ((response & 0x80U) != 0U) - { - errorstate = SDMMC_ERROR_GENERAL_UNKNOWN_ERR; - } - } - else if (count == 0U) - { - errorstate = SDMMC_ERROR_TIMEOUT; - } - else - { - /* Nothing to do */ - } - } - } - - /* Change State */ - hmmc->State = HAL_MMC_STATE_READY; - - /* Manage errors */ - if (errorstate != HAL_MMC_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= errorstate; - - if (errorstate != HAL_MMC_ERROR_TIMEOUT) - { - return HAL_ERROR; - } - else - { - return HAL_TIMEOUT; - } - } - else - { - return HAL_OK; - } - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Allows to program the authentication key within the RPMB partition - * @param hmmc: Pointer to MMC handle - * @param pKey: pointer to the authentication key (32 bytes) - * @param Timeout: Specify timeout value - * @retval HAL status - */ -HAL_StatusTypeDef HAL_MMC_RPMB_ProgramAuthenticationKey(MMC_HandleTypeDef *hmmc, const uint8_t *pKey, uint32_t Timeout) -{ - SDMMC_DataInitTypeDef config; - uint32_t errorstate; - uint32_t tickstart = HAL_GetTick(); - uint32_t count; - uint32_t byte_count = 0; - uint32_t data; - uint32_t dataremaining; - uint8_t tail_pack[12] = {0}; - uint8_t zero_pack[4] = {0}; - const uint8_t *rtempbuff; - uint8_t *tempbuff; - - tail_pack[11] = 0x01; - - if (NULL == pKey) - { - hmmc->ErrorCode |= HAL_MMC_ERROR_PARAM; - return HAL_ERROR; - } - - if (hmmc->State == HAL_MMC_STATE_READY) - { - hmmc->ErrorCode = HAL_MMC_ERROR_NONE; - - hmmc->State = HAL_MMC_STATE_BUSY; - - /* Initialize data control register */ - hmmc->Instance->DCTRL = 0U; - - errorstate = SDMMC_CmdBlockCount(hmmc->Instance, 0x80000001U); - if (errorstate != HAL_MMC_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= errorstate; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - - /* Configure the MMC DPSM (Data Path State Machine) */ - config.DataTimeOut = SDMMC_DATATIMEOUT; - config.DataLength = MMC_BLOCKSIZE; - config.DataBlockSize = SDMMC_DATABLOCK_SIZE_512B; - config.TransferDir = SDMMC_TRANSFER_DIR_TO_CARD; - config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK; - config.DPSM = SDMMC_DPSM_DISABLE; - (void)SDMMC_ConfigData(hmmc->Instance, &config); - __SDMMC_CMDTRANS_ENABLE(hmmc->Instance); - - /* Write Blocks in Polling mode */ - { - hmmc->Context = MMC_CONTEXT_WRITE_MULTIPLE_BLOCK; - - /* Write Multi Block command */ - errorstate = SDMMC_CmdWriteMultiBlock(hmmc->Instance, 0); - } - - if (errorstate != HAL_MMC_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= errorstate; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - - /* Write block(s) in polling mode */ - rtempbuff = zero_pack; - dataremaining = config.DataLength; - while (!__HAL_MMC_GET_FLAG(hmmc, - SDMMC_FLAG_TXUNDERR | SDMMC_FLAG_DCRCFAIL | SDMMC_FLAG_DTIMEOUT | SDMMC_FLAG_DATAEND)) - { - if (__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_TXFIFOHE) && (dataremaining >= SDMMC_FIFO_SIZE)) - { - /* Write data to SDMMC Tx FIFO */ - for (count = 0U; count < (SDMMC_FIFO_SIZE / 4U); count++) - { - data = (uint32_t)(*rtempbuff); - rtempbuff++; - byte_count++; - data |= ((uint32_t)(*rtempbuff) << 8U); - rtempbuff++; - byte_count++; - data |= ((uint32_t)(*rtempbuff) << 16U); - rtempbuff++; - byte_count++; - data |= ((uint32_t)(*rtempbuff) << 24U); - rtempbuff++; - byte_count++; - (void)SDMMC_WriteFIFO(hmmc->Instance, &data); - if (byte_count < MMC_RPMB_KEYMAC_POSITION) - { - rtempbuff = zero_pack; - } - else if (byte_count == MMC_RPMB_KEYMAC_POSITION) - { - rtempbuff = pKey; - } - else if ((byte_count < MMC_RPMB_WRITE_COUNTER_POSITION) && \ - (byte_count >= MMC_RPMB_DATA_POSITION)) - { - rtempbuff = zero_pack; - } - else if (byte_count == MMC_RPMB_WRITE_COUNTER_POSITION) - { - rtempbuff = tail_pack; - } - else - { - /* Nothing to do */ - } - - } - dataremaining -= SDMMC_FIFO_SIZE; - } - - if (((HAL_GetTick() - tickstart) >= Timeout) || (Timeout == 0U)) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= errorstate; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_TIMEOUT; - } - } - __SDMMC_CMDTRANS_DISABLE(hmmc->Instance); - - /* Read Response Packet */ - errorstate = SDMMC_CmdBlockCount(hmmc->Instance, 0x00000001); - if (errorstate != HAL_MMC_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= errorstate; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - - /* Configure the MMC DPSM (Data Path State Machine) */ - config.DataTimeOut = SDMMC_DATATIMEOUT; - config.DataLength = MMC_BLOCKSIZE; - config.DataBlockSize = SDMMC_DATABLOCK_SIZE_512B; - config.TransferDir = SDMMC_TRANSFER_DIR_TO_SDMMC; - config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK; - config.DPSM = SDMMC_DPSM_DISABLE; - (void)SDMMC_ConfigData(hmmc->Instance, &config); - __SDMMC_CMDTRANS_ENABLE(hmmc->Instance); - - /* Write Blocks in Polling mode */ - hmmc->Context = MMC_CONTEXT_READ_MULTIPLE_BLOCK; - - /* Write Multi Block command */ - errorstate = SDMMC_CmdReadMultiBlock(hmmc->Instance, 0); - - if (errorstate != HAL_MMC_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= errorstate; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_DATA_FLAGS); - /* Poll on SDMMC flags */ - tempbuff = zero_pack; - byte_count = 0; - - dataremaining = config.DataLength; - while (!__HAL_MMC_GET_FLAG(hmmc, - SDMMC_FLAG_RXOVERR | SDMMC_FLAG_DCRCFAIL | SDMMC_FLAG_DTIMEOUT | SDMMC_FLAG_DATAEND)) - { - if (__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_RXFIFOHF) && (dataremaining >= SDMMC_FIFO_SIZE)) - { - /* Read data from SDMMC Rx FIFO */ - for (count = 0U; count < (SDMMC_FIFO_SIZE / 4U); count++) - { - data = SDMMC_ReadFIFO(hmmc->Instance); - *tempbuff = (uint8_t)(data & 0xFFU); - tempbuff++; - byte_count++; - *tempbuff = (uint8_t)((data >> 8U) & 0xFFU); - tempbuff++; - byte_count++; - *tempbuff = (uint8_t)((data >> 16U) & 0xFFU); - tempbuff++; - byte_count++; - *tempbuff = (uint8_t)((data >> 24U) & 0xFFU); - tempbuff++; - byte_count++; - if (byte_count < MMC_RPMB_WRITE_COUNTER_POSITION) - { - tempbuff = zero_pack; - } - else if (byte_count == MMC_RPMB_WRITE_COUNTER_POSITION) - { - tempbuff = tail_pack; - } - else - { - /* Nothing to do */ - } - } - dataremaining -= SDMMC_FIFO_SIZE; - } - - if (((HAL_GetTick() - tickstart) >= Timeout) || (Timeout == 0U)) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= HAL_MMC_ERROR_TIMEOUT; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_TIMEOUT; - } - } - __SDMMC_CMDTRANS_DISABLE(hmmc->Instance); - - /* Get error state */ - if (__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_DTIMEOUT)) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= HAL_MMC_ERROR_DATA_TIMEOUT; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - else if (__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_DCRCFAIL)) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= HAL_MMC_ERROR_DATA_CRC_FAIL; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - else if (__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_TXUNDERR)) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= HAL_MMC_ERROR_TX_UNDERRUN; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - else - { - /* Nothing to do */ - } - - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_DATA_FLAGS); - - hmmc->State = HAL_MMC_STATE_READY; - - /* Check result of operation */ - if ((tail_pack[9] != 0x00U) || (tail_pack[10] != 0x01U)) - { - hmmc->RPMBErrorCode |= tail_pack[9]; - return HAL_ERROR; - } - - return HAL_OK; - } - else - { - hmmc->ErrorCode |= HAL_MMC_ERROR_BUSY; - return HAL_ERROR; - } -} - -/** - * @brief Allows to get the value of write counter within the RPMB partition. - * @param hmmc: Pointer to MMC handle - * @param pNonce: pointer to the value of nonce (16 bytes) - * @param Timeout: Specify timeout value - * @retval write counter value. - */ -uint32_t HAL_MMC_RPMB_GetWriteCounter(MMC_HandleTypeDef *hmmc, uint8_t *pNonce, uint32_t Timeout) -{ - SDMMC_DataInitTypeDef config; - uint32_t errorstate; - uint32_t tickstart = HAL_GetTick(); - uint32_t count; - uint32_t byte_count = 0; - uint32_t data; - uint32_t dataremaining; - uint8_t tail_pack[12] = {0}; - uint8_t zero_pack[4] = {0}; - uint8_t echo_nonce[16] = {0}; - uint8_t *tempbuff = zero_pack; - - tail_pack[11] = 0x02; - - if (NULL == pNonce) - { - hmmc->ErrorCode |= HAL_MMC_ERROR_PARAM; - hmmc->RPMBErrorCode |= HAL_MMC_ERROR_RPMB_COUNTER_FAILURE; - return 0; - } - - if (hmmc->State == HAL_MMC_STATE_READY) - { - hmmc->ErrorCode = HAL_MMC_ERROR_NONE; - hmmc->State = HAL_MMC_STATE_BUSY; - - /* Initialize data control register */ - hmmc->Instance->DCTRL = 0U; - - errorstate = SDMMC_CmdBlockCount(hmmc->Instance, 0x00000001U); - if (errorstate != HAL_MMC_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= errorstate; - hmmc->State = HAL_MMC_STATE_READY; - hmmc->RPMBErrorCode |= HAL_MMC_ERROR_RPMB_COUNTER_FAILURE; - return 0; - } - - /* Send Request Packet */ - - /* Configure the MMC DPSM (Data Path State Machine) */ - config.DataTimeOut = SDMMC_DATATIMEOUT; - config.DataLength = MMC_BLOCKSIZE; - config.DataBlockSize = SDMMC_DATABLOCK_SIZE_512B; - config.TransferDir = SDMMC_TRANSFER_DIR_TO_CARD; - config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK; - config.DPSM = SDMMC_DPSM_DISABLE; - (void)SDMMC_ConfigData(hmmc->Instance, &config); - __SDMMC_CMDTRANS_ENABLE(hmmc->Instance); - - /* Write Blocks in Polling mode */ - hmmc->Context = MMC_CONTEXT_WRITE_MULTIPLE_BLOCK; - - /* Write Multi Block command */ - errorstate = SDMMC_CmdWriteMultiBlock(hmmc->Instance, 0); - - if (errorstate != HAL_MMC_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= errorstate; - hmmc->State = HAL_MMC_STATE_READY; - hmmc->RPMBErrorCode |= HAL_MMC_ERROR_RPMB_COUNTER_FAILURE; - return 0; - } - - /* Write block(s) in polling mode */ - dataremaining = config.DataLength; - while (!__HAL_MMC_GET_FLAG(hmmc, - SDMMC_FLAG_TXUNDERR | SDMMC_FLAG_DCRCFAIL | SDMMC_FLAG_DTIMEOUT | SDMMC_FLAG_DATAEND)) - { - if (__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_TXFIFOHE) && (dataremaining >= SDMMC_FIFO_SIZE)) - { - - /* Write data to SDMMC Tx FIFO */ - for (count = 0U; count < (SDMMC_FIFO_SIZE / 4U); count++) - { - data = (uint32_t)(*tempbuff); - tempbuff++; - byte_count++; - data |= ((uint32_t)(*tempbuff) << 8U); - tempbuff++; - byte_count++; - data |= ((uint32_t)(*tempbuff) << 16U); - tempbuff++; - byte_count++; - data |= ((uint32_t)(*tempbuff) << 24U); - tempbuff++; - byte_count++; - (void)SDMMC_WriteFIFO(hmmc->Instance, &data); - if (byte_count < MMC_RPMB_NONCE_POSITION) - { - tempbuff = zero_pack; - } - else if (byte_count == MMC_RPMB_NONCE_POSITION) - { - tempbuff = (uint8_t *)pNonce; - } - else if (byte_count == MMC_RPMB_WRITE_COUNTER_POSITION) - { - tempbuff = tail_pack; - } - else - { - /* Nothing to do */ - } - - } - dataremaining -= SDMMC_FIFO_SIZE; - } - - if (((HAL_GetTick() - tickstart) >= Timeout) || (Timeout == 0U)) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= errorstate; - hmmc->State = HAL_MMC_STATE_READY; - hmmc->RPMBErrorCode |= HAL_MMC_ERROR_RPMB_COUNTER_FAILURE; - return 0; - } - } - __SDMMC_CMDTRANS_DISABLE(hmmc->Instance); - - /* Read Response Packt */ - errorstate = SDMMC_CmdBlockCount(hmmc->Instance, 0x00000001U); - if (errorstate != HAL_MMC_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= errorstate; - hmmc->State = HAL_MMC_STATE_READY; - hmmc->RPMBErrorCode |= HAL_MMC_ERROR_RPMB_COUNTER_FAILURE; - return 0; - } - - /* Configure the MMC DPSM (Data Path State Machine) */ - config.DataTimeOut = SDMMC_DATATIMEOUT; - config.DataLength = MMC_BLOCKSIZE; - config.DataBlockSize = SDMMC_DATABLOCK_SIZE_512B; - config.TransferDir = SDMMC_TRANSFER_DIR_TO_SDMMC; - config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK; - config.DPSM = SDMMC_DPSM_DISABLE; - (void)SDMMC_ConfigData(hmmc->Instance, &config); - __SDMMC_CMDTRANS_ENABLE(hmmc->Instance); - - /* Write Blocks in Polling mode */ - hmmc->Context = MMC_CONTEXT_READ_MULTIPLE_BLOCK; - - /* Write Multi Block command */ - errorstate = SDMMC_CmdReadMultiBlock(hmmc->Instance, 0); - - if (errorstate != HAL_MMC_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= errorstate; - hmmc->State = HAL_MMC_STATE_READY; - hmmc->RPMBErrorCode |= HAL_MMC_ERROR_RPMB_COUNTER_FAILURE; - return 0; - } - - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_DATA_FLAGS); - /* Poll on SDMMC flags */ - tempbuff = zero_pack; - - byte_count = 0; - dataremaining = config.DataLength; - while (!__HAL_MMC_GET_FLAG(hmmc, - SDMMC_FLAG_RXOVERR | SDMMC_FLAG_DCRCFAIL | SDMMC_FLAG_DTIMEOUT | SDMMC_FLAG_DATAEND)) - { - if (__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_RXFIFOHF) && (dataremaining >= SDMMC_FIFO_SIZE)) - { - /* Read data from SDMMC Rx FIFO */ - for (count = 0U; count < (SDMMC_FIFO_SIZE / 4U); count++) - { - data = SDMMC_ReadFIFO(hmmc->Instance); - *tempbuff = (uint8_t)(data & 0xFFU); - tempbuff++; - byte_count++; - *tempbuff = (uint8_t)((data >> 8U) & 0xFFU); - tempbuff++; - byte_count++; - *tempbuff = (uint8_t)((data >> 16U) & 0xFFU); - tempbuff++; - byte_count++; - *tempbuff = (uint8_t)((data >> 24U) & 0xFFU); - tempbuff++; - byte_count++; - if (byte_count < MMC_RPMB_NONCE_POSITION) - { - tempbuff = zero_pack; - } - else if (byte_count == MMC_RPMB_NONCE_POSITION) - { - tempbuff = echo_nonce; - } - else if (byte_count == MMC_RPMB_WRITE_COUNTER_POSITION) - { - tempbuff = tail_pack; - } - else - { - /* Nothing to do */ - } - } - dataremaining -= SDMMC_FIFO_SIZE; - } - - if (((HAL_GetTick() - tickstart) >= Timeout) || (Timeout == 0U)) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= HAL_MMC_ERROR_TIMEOUT; - hmmc->State = HAL_MMC_STATE_READY; - hmmc->RPMBErrorCode |= HAL_MMC_ERROR_RPMB_COUNTER_FAILURE; - return 0; - } - } - __SDMMC_CMDTRANS_DISABLE(hmmc->Instance); - - /* Get error state */ - if (__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_DTIMEOUT)) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= HAL_MMC_ERROR_DATA_TIMEOUT; - hmmc->State = HAL_MMC_STATE_READY; - hmmc->RPMBErrorCode |= HAL_MMC_ERROR_RPMB_COUNTER_FAILURE; - return 0; - } - else if (__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_DCRCFAIL)) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= HAL_MMC_ERROR_DATA_CRC_FAIL; - hmmc->State = HAL_MMC_STATE_READY; - hmmc->RPMBErrorCode |= HAL_MMC_ERROR_RPMB_COUNTER_FAILURE; - return 0; - } - else if (__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_TXUNDERR)) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= HAL_MMC_ERROR_TX_UNDERRUN; - hmmc->State = HAL_MMC_STATE_READY; - hmmc->RPMBErrorCode |= HAL_MMC_ERROR_RPMB_COUNTER_FAILURE; - return 0; - } - else - { - /* Nothing to do */ - } - - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_DATA_FLAGS); - - hmmc->State = HAL_MMC_STATE_READY; - - for (uint8_t i = 0; i < 16U; i++) - { - if (pNonce[i] != echo_nonce[i]) - { - hmmc->RPMBErrorCode |= HAL_MMC_ERROR_RPMB_COUNTER_FAILURE; - return 0; - } - } - - return ((uint32_t)tail_pack[3] | ((uint32_t)tail_pack[2] << 8) | ((uint32_t)tail_pack[1] << 16) | \ - ((uint32_t)tail_pack[0] << 24)); - } - else - { - hmmc->ErrorCode |= HAL_MMC_ERROR_BUSY; - hmmc->RPMBErrorCode |= HAL_MMC_ERROR_RPMB_COUNTER_FAILURE; - return 0; - } -} - -/** - * @brief Allows to write block(s) to a specified address in the RPMB partition. The Data - * transfer is managed by polling mode. - * @param hmmc: Pointer to MMC handle - * @param pData: Pointer to the buffer that will contain the data to transmit - * @param BlockAdd: Block Address where data will be written - * @param NumberOfBlocks: Number of blocks to write - * @param pMAC: Pointer to the authentication MAC buffer - * @param Timeout: Specify timeout value - * @retval HAL status - */ -HAL_StatusTypeDef HAL_MMC_RPMB_WriteBlocks(MMC_HandleTypeDef *hmmc, const uint8_t *pData, uint16_t BlockAdd, - uint16_t NumberOfBlocks, const uint8_t *pMAC, uint32_t Timeout) -{ - - SDMMC_DataInitTypeDef config; - uint32_t errorstate; - uint32_t tickstart = HAL_GetTick(); - uint32_t count; - uint32_t byte_count = 0; - uint32_t data; - uint32_t dataremaining; - uint8_t tail_pack[12] = {0}; - uint8_t zero_pack[4] = {0}; - uint8_t echo_nonce[16] = {0}; - const uint8_t local_nonce[16] = {0x00, 0x01, 0x02, 0x03, 0x04, 0x00, 0x01, 0x02, - 0x03, 0x04, 0x00, 0x01, 0x02, 0x03, 0x04, 0x08 - }; - const uint8_t *rtempbuff; - uint8_t *tempbuff; - uint32_t arg = 0x80000000U; - uint32_t offset = 0; - - if ((NumberOfBlocks != 0x1U) && (NumberOfBlocks != 0x2U) && (NumberOfBlocks != 0x20U)) - { - hmmc->ErrorCode |= HAL_MMC_ERROR_PARAM; - return HAL_ERROR; - } - - if ((NULL == pData) || (NULL == pMAC)) - { - hmmc->ErrorCode |= HAL_MMC_ERROR_PARAM; - return HAL_ERROR; - } - - tail_pack[11] = 0x02; - - if (hmmc->State == HAL_MMC_STATE_READY) - { - hmmc->ErrorCode = HAL_MMC_ERROR_NONE; - hmmc->State = HAL_MMC_STATE_BUSY; - - /* Initialize data control register */ - hmmc->Instance->DCTRL = 0U; - - errorstate = SDMMC_CmdBlockCount(hmmc->Instance, 0x00000001U); - if (errorstate != HAL_MMC_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= errorstate; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - - /* Send Request Packet */ - - /* Configure the MMC DPSM (Data Path State Machine) */ - config.DataTimeOut = SDMMC_DATATIMEOUT; - config.DataLength = MMC_BLOCKSIZE; - config.DataBlockSize = SDMMC_DATABLOCK_SIZE_512B; - config.TransferDir = SDMMC_TRANSFER_DIR_TO_CARD; - config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK; - config.DPSM = SDMMC_DPSM_DISABLE; - (void)SDMMC_ConfigData(hmmc->Instance, &config); - __SDMMC_CMDTRANS_ENABLE(hmmc->Instance); - - /* Write Blocks in Polling mode */ - hmmc->Context = MMC_CONTEXT_WRITE_MULTIPLE_BLOCK; - - /* Write Multi Block command */ - errorstate = SDMMC_CmdWriteMultiBlock(hmmc->Instance, 0); - - if (errorstate != HAL_MMC_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= errorstate; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - - /* Write block(s) in polling mode */ - rtempbuff = zero_pack; - dataremaining = config.DataLength; - while (!__HAL_MMC_GET_FLAG(hmmc, - SDMMC_FLAG_TXUNDERR | SDMMC_FLAG_DCRCFAIL | SDMMC_FLAG_DTIMEOUT | SDMMC_FLAG_DATAEND)) - { - if (__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_TXFIFOHE) && (dataremaining >= SDMMC_FIFO_SIZE)) - { - - /* Write data to SDMMC Tx FIFO */ - for (count = 0U; count < (SDMMC_FIFO_SIZE / 4U); count++) - { - data = (uint32_t)(*rtempbuff); - rtempbuff++; - byte_count++; - data |= ((uint32_t)(*rtempbuff) << 8U); - rtempbuff++; - byte_count++; - data |= ((uint32_t)(*rtempbuff) << 16U); - rtempbuff++; - byte_count++; - data |= ((uint32_t)(*rtempbuff) << 24U); - rtempbuff++; - byte_count++; - (void)SDMMC_WriteFIFO(hmmc->Instance, &data); - if (byte_count < MMC_RPMB_NONCE_POSITION) - { - rtempbuff = zero_pack; - } - else if (byte_count == MMC_RPMB_NONCE_POSITION) - { - rtempbuff = local_nonce; - } - else if (byte_count == MMC_RPMB_WRITE_COUNTER_POSITION) - { - rtempbuff = tail_pack; - } - else - { - /* Nothing to do */ - } - } - dataremaining -= SDMMC_FIFO_SIZE; - } - - if (((HAL_GetTick() - tickstart) >= Timeout) || (Timeout == 0U)) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= errorstate; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_TIMEOUT; - } - } - __SDMMC_CMDTRANS_DISABLE(hmmc->Instance); - - /* Read Response Packt */ - errorstate = SDMMC_CmdBlockCount(hmmc->Instance, 0x00000001); - if (errorstate != HAL_MMC_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= errorstate; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - - /* Configure the MMC DPSM (Data Path State Machine) */ - config.DataTimeOut = SDMMC_DATATIMEOUT; - config.DataLength = MMC_BLOCKSIZE; - config.DataBlockSize = SDMMC_DATABLOCK_SIZE_512B; - config.TransferDir = SDMMC_TRANSFER_DIR_TO_SDMMC; - config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK; - config.DPSM = SDMMC_DPSM_DISABLE; - (void)SDMMC_ConfigData(hmmc->Instance, &config); - __SDMMC_CMDTRANS_ENABLE(hmmc->Instance); - - /* Write Blocks in Polling mode */ - hmmc->Context = MMC_CONTEXT_READ_MULTIPLE_BLOCK; - - /* Write Multi Block command */ - errorstate = SDMMC_CmdReadMultiBlock(hmmc->Instance, 0); - - if (errorstate != HAL_MMC_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= errorstate; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_DATA_FLAGS); - /* Poll on SDMMC flags */ - tempbuff = zero_pack; - - byte_count = 0; - dataremaining = config.DataLength; - while (!__HAL_MMC_GET_FLAG(hmmc, - SDMMC_FLAG_RXOVERR | SDMMC_FLAG_DCRCFAIL | SDMMC_FLAG_DTIMEOUT | SDMMC_FLAG_DATAEND)) - { - if (__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_RXFIFOHF) && (dataremaining >= SDMMC_FIFO_SIZE)) - { - /* Read data from SDMMC Rx FIFO */ - for (count = 0U; count < (SDMMC_FIFO_SIZE / 4U); count++) - { - data = SDMMC_ReadFIFO(hmmc->Instance); - *tempbuff = (uint8_t)(data & 0xFFU); - tempbuff++; - byte_count++; - *tempbuff = (uint8_t)((data >> 8U) & 0xFFU); - tempbuff++; - byte_count++; - *tempbuff = (uint8_t)((data >> 16U) & 0xFFU); - tempbuff++; - byte_count++; - *tempbuff = (uint8_t)((data >> 24U) & 0xFFU); - tempbuff++; - byte_count++; - if (byte_count < MMC_RPMB_NONCE_POSITION) - { - tempbuff = zero_pack; - } - else if (byte_count == MMC_RPMB_NONCE_POSITION) - { - tempbuff = echo_nonce; - } - else if (byte_count == MMC_RPMB_WRITE_COUNTER_POSITION) - { - tempbuff = tail_pack; - } - else - { - /* Nothing to do */ - } - } - dataremaining -= SDMMC_FIFO_SIZE; - } - - if (((HAL_GetTick() - tickstart) >= Timeout) || (Timeout == 0U)) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= HAL_MMC_ERROR_TIMEOUT; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_TIMEOUT; - } - } - __SDMMC_CMDTRANS_DISABLE(hmmc->Instance); - - /* Get error state */ - if (__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_DTIMEOUT)) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= HAL_MMC_ERROR_DATA_TIMEOUT; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - else if (__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_DCRCFAIL)) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= HAL_MMC_ERROR_DATA_CRC_FAIL; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - else if (__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_TXUNDERR)) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= HAL_MMC_ERROR_TX_UNDERRUN; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - else - { - /* Nothing to do */ - } - - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_DATA_FLAGS); - - hmmc->State = HAL_MMC_STATE_READY; - - for (uint8_t i = 0; i < 16U; i++) - { - if (local_nonce[i] != echo_nonce[i]) - { - return HAL_ERROR; - } - } - } - else - { - hmmc->ErrorCode |= HAL_MMC_ERROR_BUSY; - return HAL_ERROR; - } - tail_pack[11] = 0x03; - tail_pack[10] = 0x00; - tail_pack[7] = (uint8_t)(NumberOfBlocks) & 0xFFU; - tail_pack[6] = (uint8_t)(NumberOfBlocks >> 8) & 0xFFU; - tail_pack[5] = (uint8_t)(BlockAdd) & 0xFFU; - tail_pack[4] = (uint8_t)(BlockAdd >> 8) & 0xFFU; - - rtempbuff = zero_pack; - byte_count = 0; - arg |= NumberOfBlocks; - - if (hmmc->State == HAL_MMC_STATE_READY) - { - hmmc->ErrorCode = HAL_MMC_ERROR_NONE; - - - hmmc->State = HAL_MMC_STATE_BUSY; - - /* Initialize data control register */ - hmmc->Instance->DCTRL = 0U; - - errorstate = SDMMC_CmdBlockCount(hmmc->Instance, arg); - if (errorstate != HAL_MMC_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= errorstate; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - - /* Send Request Packet */ - /* Configure the MMC DPSM (Data Path State Machine) */ - config.DataTimeOut = SDMMC_DATATIMEOUT; - config.DataLength = NumberOfBlocks * MMC_BLOCKSIZE; - config.DataBlockSize = SDMMC_DATABLOCK_SIZE_512B; - config.TransferDir = SDMMC_TRANSFER_DIR_TO_CARD; - config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK; - config.DPSM = SDMMC_DPSM_DISABLE; - (void)SDMMC_ConfigData(hmmc->Instance, &config); - __SDMMC_CMDTRANS_ENABLE(hmmc->Instance); - - /* Write Blocks in Polling mode */ - - { - hmmc->Context = MMC_CONTEXT_WRITE_MULTIPLE_BLOCK; - - /* Write Multi Block command */ - errorstate = SDMMC_CmdWriteMultiBlock(hmmc->Instance, 0); - } - - if (errorstate != HAL_MMC_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= errorstate; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - - - /* Write block(s) in polling mode */ - dataremaining = config.DataLength; - while (!__HAL_MMC_GET_FLAG(hmmc, - SDMMC_FLAG_TXUNDERR | SDMMC_FLAG_DCRCFAIL | SDMMC_FLAG_DTIMEOUT | SDMMC_FLAG_DATAEND)) - { - if (__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_TXFIFOHE) && (dataremaining >= SDMMC_FIFO_SIZE)) - { - - /* Write data to SDMMC Tx FIFO */ - for (count = 0U; count < (SDMMC_FIFO_SIZE / 4U); count++) - { - data = (uint32_t)(*rtempbuff); - rtempbuff++; - byte_count++; - data |= ((uint32_t)(*rtempbuff) << 8U); - rtempbuff++; - byte_count++; - data |= ((uint32_t)(*rtempbuff) << 16U); - rtempbuff++; - byte_count++; - data |= ((uint32_t)(*rtempbuff) << 24U); - rtempbuff++; - byte_count++; - (void)SDMMC_WriteFIFO(hmmc->Instance, &data); - if (byte_count == MMC_RPMB_KEYMAC_POSITION) - { - rtempbuff = pMAC; - } - if (byte_count == MMC_RPMB_DATA_POSITION) - { - rtempbuff = &pData[offset]; - } - if ((byte_count >= MMC_RPMB_NONCE_POSITION) && \ - (byte_count < MMC_RPMB_WRITE_COUNTER_POSITION)) - { - rtempbuff = zero_pack; - } - if (byte_count == MMC_RPMB_WRITE_COUNTER_POSITION) - { - rtempbuff = tail_pack; - } - else if (byte_count == MMC_BLOCKSIZE) - { - offset += (uint32_t)256U; - byte_count = 0; - } - else - { - /* Nothing to do */ - } - } - dataremaining -= SDMMC_FIFO_SIZE; - } - - if (((HAL_GetTick() - tickstart) >= Timeout) || (Timeout == 0U)) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= errorstate; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_TIMEOUT; - } - } - __SDMMC_CMDTRANS_DISABLE(hmmc->Instance); - - /* Response Packet */ - - errorstate = SDMMC_CmdBlockCount(hmmc->Instance, arg); - if (errorstate != HAL_MMC_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= errorstate; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - - /* Configure the MMC DPSM (Data Path State Machine) */ - config.DataTimeOut = SDMMC_DATATIMEOUT; - config.DataLength = MMC_BLOCKSIZE; - config.DataBlockSize = SDMMC_DATABLOCK_SIZE_512B; - config.TransferDir = SDMMC_TRANSFER_DIR_TO_SDMMC; - config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK; - config.DPSM = SDMMC_DPSM_DISABLE; - (void)SDMMC_ConfigData(hmmc->Instance, &config); - __SDMMC_CMDTRANS_ENABLE(hmmc->Instance); - - /* Write Blocks in Polling mode */ - - { - hmmc->Context = MMC_CONTEXT_READ_MULTIPLE_BLOCK; - - /* Write Multi Block command */ - errorstate = SDMMC_CmdReadMultiBlock(hmmc->Instance, 0); - } - - if (errorstate != HAL_MMC_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= errorstate; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - - - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_DATA_FLAGS); - /* Poll on SDMMC flags */ - tempbuff = zero_pack; - byte_count = 0; - dataremaining = config.DataLength; - while (!__HAL_MMC_GET_FLAG(hmmc, - SDMMC_FLAG_RXOVERR | SDMMC_FLAG_DCRCFAIL | SDMMC_FLAG_DTIMEOUT | SDMMC_FLAG_DATAEND)) - { - if (__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_RXFIFOHF) && (dataremaining >= SDMMC_FIFO_SIZE)) - { - /* Read data from SDMMC Rx FIFO */ - for (count = 0U; count < (SDMMC_FIFO_SIZE / 4U); count++) - { - data = SDMMC_ReadFIFO(hmmc->Instance); - *tempbuff = (uint8_t)(data & 0xFFU); - tempbuff++; - byte_count++; - *tempbuff = (uint8_t)((data >> 8U) & 0xFFU); - tempbuff++; - byte_count++; - *tempbuff = (uint8_t)((data >> 16U) & 0xFFU); - tempbuff++; - byte_count++; - *tempbuff = (uint8_t)((data >> 24U) & 0xFFU); - tempbuff++; - byte_count++; - if (byte_count < MMC_RPMB_WRITE_COUNTER_POSITION) - { - tempbuff = zero_pack; - } - else if (byte_count == MMC_RPMB_WRITE_COUNTER_POSITION) - { - tempbuff = tail_pack; - } - else - { - /* Nothing to do */ - } - } - dataremaining -= SDMMC_FIFO_SIZE; - } - - if (((HAL_GetTick() - tickstart) >= Timeout) || (Timeout == 0U)) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= HAL_MMC_ERROR_TIMEOUT; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_TIMEOUT; - } - } - __SDMMC_CMDTRANS_DISABLE(hmmc->Instance); - - /* Get error state */ - if (__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_DTIMEOUT)) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= HAL_MMC_ERROR_DATA_TIMEOUT; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - else if (__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_DCRCFAIL)) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= HAL_MMC_ERROR_DATA_CRC_FAIL; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - else if (__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_TXUNDERR)) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= HAL_MMC_ERROR_TX_UNDERRUN; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - else - { - /* Nothing to do */ - } - - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_DATA_FLAGS); - - hmmc->State = HAL_MMC_STATE_READY; - - /* Check result of operation */ - if (((tail_pack[9] & (uint8_t)0xFEU) != 0x00U) || (tail_pack[10] != 0x03U)) - { - hmmc->RPMBErrorCode |= tail_pack[9]; - return HAL_ERROR; - } - - return HAL_OK; - } - else - { - hmmc->ErrorCode |= HAL_MMC_ERROR_BUSY; - return HAL_ERROR; - } -} - -/** - * @brief Allows to read block(s) to a specified address in the RPMB partition. The Data - * transfer is managed by polling mode. - * @param hmmc: Pointer to MMC handle - * @param pData: Pointer to the buffer that will contain the data to transmit - * @param BlockAdd: Block Address where data will be written - * @param NumberOfBlocks: Number of blocks to write - * @param pNonce: Pointer to the buffer that will contain the nonce to transmit - * @param pMAC: Pointer to the authentication MAC buffer - * @param Timeout: Specify timeout value - * @retval HAL status - */ -HAL_StatusTypeDef HAL_MMC_RPMB_ReadBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint16_t BlockAdd, - uint16_t NumberOfBlocks, const uint8_t *pNonce, uint8_t *pMAC, - uint32_t Timeout) -{ - SDMMC_DataInitTypeDef config; - uint32_t errorstate; - uint32_t tickstart = HAL_GetTick(); - uint32_t count; - uint32_t byte_count = 0; - uint32_t data; - uint8_t tail_pack[12] = {0}; - uint8_t zero_pack[4] = {0}; - uint8_t echo_nonce[16] = {0}; - uint32_t dataremaining; - const uint8_t *rtempbuff; - uint8_t *tempbuff; - uint32_t arg = 0; - uint32_t offset = 0; - - arg |= NumberOfBlocks; - - tail_pack[11] = 0x04; - tail_pack[10] = 0x00; - tail_pack[7] = 0x00; - tail_pack[6] = 0x00; - tail_pack[5] = (uint8_t)(BlockAdd) & 0xFFU; - tail_pack[4] = (uint8_t)(BlockAdd >> 8) & 0xFFU; - tail_pack[3] = 0x00; - tail_pack[2] = 0x00; - tail_pack[1] = 0x00; - tail_pack[0] = 0x00; - - if (hmmc->State == HAL_MMC_STATE_READY) - { - hmmc->ErrorCode = HAL_MMC_ERROR_NONE; - hmmc->State = HAL_MMC_STATE_BUSY; - - /* Initialize data control register */ - hmmc->Instance->DCTRL = 0U; - - errorstate = SDMMC_CmdBlockCount(hmmc->Instance, 1); - if (errorstate != HAL_MMC_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= errorstate; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - - /* Send Request Packet */ - - /* Configure the MMC DPSM (Data Path State Machine) */ - config.DataTimeOut = SDMMC_DATATIMEOUT; - config.DataLength = MMC_BLOCKSIZE; - config.DataBlockSize = SDMMC_DATABLOCK_SIZE_512B; - config.TransferDir = SDMMC_TRANSFER_DIR_TO_CARD; - config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK; - config.DPSM = SDMMC_DPSM_DISABLE; - (void)SDMMC_ConfigData(hmmc->Instance, &config); - __SDMMC_CMDTRANS_ENABLE(hmmc->Instance); - - /* Write Blocks in Polling mode */ - hmmc->Context = MMC_CONTEXT_WRITE_MULTIPLE_BLOCK; - - /* Write Multi Block command */ - errorstate = SDMMC_CmdWriteMultiBlock(hmmc->Instance, 0); - - if (errorstate != HAL_MMC_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= errorstate; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - - /* Write block(s) in polling mode */ - rtempbuff = zero_pack; - dataremaining = config.DataLength; - while (!__HAL_MMC_GET_FLAG(hmmc, - SDMMC_FLAG_TXUNDERR | SDMMC_FLAG_DCRCFAIL | SDMMC_FLAG_DTIMEOUT | SDMMC_FLAG_DATAEND)) - { - if (__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_TXFIFOHE) && (dataremaining >= SDMMC_FIFO_SIZE)) - { - - /* Write data to SDMMC Tx FIFO */ - for (count = 0U; count < (SDMMC_FIFO_SIZE / 4U); count++) - { - data = (uint32_t)(*rtempbuff); - rtempbuff++; - byte_count++; - data |= ((uint32_t)(*rtempbuff) << 8U); - rtempbuff++; - byte_count++; - data |= ((uint32_t)(*rtempbuff) << 16U); - rtempbuff++; - byte_count++; - data |= ((uint32_t)(*rtempbuff) << 24U); - rtempbuff++; - byte_count++; - (void)SDMMC_WriteFIFO(hmmc->Instance, &data); - if (byte_count < MMC_RPMB_NONCE_POSITION) - { - rtempbuff = zero_pack; - } - else if (byte_count == MMC_RPMB_NONCE_POSITION) - { - rtempbuff = pNonce; - } - else if (byte_count == MMC_RPMB_WRITE_COUNTER_POSITION) - { - rtempbuff = tail_pack; - } - else - { - /* Nothing to do */ - } - } - dataremaining -= SDMMC_FIFO_SIZE; - } - - if (((HAL_GetTick() - tickstart) >= Timeout) || (Timeout == 0U)) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= errorstate; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_TIMEOUT; - } - } - __SDMMC_CMDTRANS_DISABLE(hmmc->Instance); - - /* Read Response Packet */ - errorstate = SDMMC_CmdBlockCount(hmmc->Instance, arg); - if (errorstate != HAL_MMC_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= errorstate; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - - /* Configure the MMC DPSM (Data Path State Machine) */ - config.DataTimeOut = SDMMC_DATATIMEOUT; - config.DataLength = NumberOfBlocks * MMC_BLOCKSIZE; - config.DataBlockSize = SDMMC_DATABLOCK_SIZE_512B; - config.TransferDir = SDMMC_TRANSFER_DIR_TO_SDMMC; - config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK; - config.DPSM = SDMMC_DPSM_DISABLE; - (void)SDMMC_ConfigData(hmmc->Instance, &config); - __SDMMC_CMDTRANS_ENABLE(hmmc->Instance); - - /* Write Blocks in Polling mode */ - hmmc->Context = MMC_CONTEXT_READ_MULTIPLE_BLOCK; - - /* Write Multi Block command */ - errorstate = SDMMC_CmdReadMultiBlock(hmmc->Instance, 0); - - if (errorstate != HAL_MMC_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= errorstate; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_DATA_FLAGS); - /* Poll on SDMMC flags */ - tempbuff = zero_pack; - byte_count = 0; - - dataremaining = config.DataLength; - while (!__HAL_MMC_GET_FLAG(hmmc, - SDMMC_FLAG_RXOVERR | SDMMC_FLAG_DCRCFAIL | SDMMC_FLAG_DTIMEOUT | SDMMC_FLAG_DATAEND)) - { - if (__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_RXFIFOHF) && (dataremaining >= SDMMC_FIFO_SIZE)) - { - /* Read data from SDMMC Rx FIFO */ - for (count = 0U; count < (SDMMC_FIFO_SIZE / 4U); count++) - { - data = SDMMC_ReadFIFO(hmmc->Instance); - *tempbuff = (uint8_t)(data & 0xFFU); - tempbuff++; - byte_count++; - *tempbuff = (uint8_t)((data >> 8U) & 0xFFU); - tempbuff++; - byte_count++; - *tempbuff = (uint8_t)((data >> 16U) & 0xFFU); - tempbuff++; - byte_count++; - *tempbuff = (uint8_t)((data >> 24U) & 0xFFU); - tempbuff++; - byte_count++; - if (byte_count < MMC_RPMB_KEYMAC_POSITION) - { - tempbuff = zero_pack; - } - else if (byte_count == MMC_RPMB_KEYMAC_POSITION) - { - tempbuff = (uint8_t *)pMAC; - } - else if (byte_count == MMC_RPMB_DATA_POSITION) - { - tempbuff = &pData[offset]; - } - else if (byte_count == MMC_RPMB_NONCE_POSITION) - { - tempbuff = echo_nonce; - } - else if (byte_count == MMC_RPMB_WRITE_COUNTER_POSITION) - { - tempbuff = tail_pack; - } - else if (byte_count == MMC_BLOCKSIZE) - { - byte_count = 0; - offset += (uint32_t)256U; - } - else - { - /* Nothing to do */ - } - } - dataremaining -= SDMMC_FIFO_SIZE; - } - - if (((HAL_GetTick() - tickstart) >= Timeout) || (Timeout == 0U)) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= HAL_MMC_ERROR_TIMEOUT; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_TIMEOUT; - } - } - __SDMMC_CMDTRANS_DISABLE(hmmc->Instance); - - /* Get error state */ - if (__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_DTIMEOUT)) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= HAL_MMC_ERROR_DATA_TIMEOUT; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - else if (__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_DCRCFAIL)) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= HAL_MMC_ERROR_DATA_CRC_FAIL; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - else if (__HAL_MMC_GET_FLAG(hmmc, SDMMC_FLAG_TXUNDERR)) - { - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); - hmmc->ErrorCode |= HAL_MMC_ERROR_TX_UNDERRUN; - hmmc->State = HAL_MMC_STATE_READY; - return HAL_ERROR; - } - else - { - /* Nothing to do */ - } - - /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_DATA_FLAGS); - - hmmc->State = HAL_MMC_STATE_READY; - - for (uint8_t i = 0; i < 16U; i++) - { - if (pNonce[i] != echo_nonce[i]) - { - return HAL_ERROR; - } - } - - /* Check result of operation */ - if ((tail_pack[9] != 0x00U) || (tail_pack[10] != 0x04U)) - { - hmmc->RPMBErrorCode |= tail_pack[9]; - return HAL_ERROR; - } - - return HAL_OK; - } - else - { - hmmc->ErrorCode |= HAL_MMC_ERROR_BUSY; - return HAL_ERROR; - } -} - - -/** - * @brief Read DMA Linked list node Transfer completed callbacks - * @param hmmc: MMC handle - * @retval None - */ -__weak void HAL_MMCEx_Read_DMALnkLstBufCpltCallback(MMC_HandleTypeDef *hmmc) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hmmc); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_MMCEx_Read_DMALnkLstBufCpltCallback can be implemented in the user file - */ -} -/** - * @brief Read DMA Linked list node Transfer completed callbacks - * @param hmmc: MMC handle - * @retval None - */ -__weak void HAL_MMCEx_Write_DMALnkLstBufCpltCallback(MMC_HandleTypeDef *hmmc) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hmmc); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_MMCEx_Write_DMALnkLstBufCpltCallback can be implemented in the user file - */ -} - -/** - * @} - */ - -#endif /* HAL_MMC_MODULE_ENABLED */ -#endif /* SDMMC1 || SDMMC2 */ - -/** - * @} - */ - -/** - * @} - */ Index: trunk/firmware/FSBL/CubeMX/Drivers/STM32N6xx_HAL_Driver/Src/stm32n6xx_hal_mmc_ex.c =================================================================== --- trunk/firmware/FSBL/CubeMX/Drivers/STM32N6xx_HAL_Driver/Src/stm32n6xx_hal_mmc_ex.c (revision 37) +++ (revision ) @@ -1,448 +1,0 @@ -/** - ****************************************************************************** - * @file stm32n6xx_hal_mmc_ex.c - * @author MCD Application Team - * @brief MMC card Extended HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the Secure Digital (MMC) peripheral: - * + Extended features functions - * - ****************************************************************************** - * @attention - * - * Copyright (c) 2023 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - @verbatim - ============================================================================== - ##### How to use this driver ##### - ============================================================================== - [..] - The MMC Extension HAL driver can be used as follows: - (+) Configure Buffer0 and Buffer1 start address and Buffer size using HAL_MMCEx_ConfigDMAMultiBuffer() function. - - (+) Start Read and Write for multibuffer mode using HAL_MMCEx_ReadBlocksDMAMultiBuffer() and - HAL_MMCEx_WriteBlocksDMAMultiBuffer() functions. - - @endverbatim - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32n6xx_hal.h" - -/** @addtogroup STM32N6xx_HAL_Driver - * @{ - */ - -/** @defgroup MMCEx MMCEx - * @brief MMC Extended HAL module driver - * @{ - */ - -#if defined (SDMMC1) || defined (SDMMC2) -#ifdef HAL_MMC_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup MMCEx_Exported_Functions - * @{ - */ - - -/** @addtogroup MMCEx_Exported_Functions_Group1 - * @brief Linked List management functions - * -@verbatim - =============================================================================== - ##### Linked List management functions ##### - =============================================================================== - [..] - This subsection provides a set of functions allowing to manage the needed functions. - -@endverbatim - * @{ - */ - -/** - * @brief Build Linked List node. - * @param pNode: Pointer to new node to add. - * @param pNodeConf: Pointer to configuration parameters for new node to add. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_MMCEx_DMALinkedList_BuildNode(MMC_DMALinkNodeTypeDef *pNode, - MMC_DMALinkNodeConfTypeDef *pNodeConf) -{ - - if (SDMMC_DMALinkedList_BuildNode(pNode, pNodeConf) != SDMMC_ERROR_NONE) - { - return (HAL_ERROR); - } - else - { - return (HAL_OK); - } - -} -/** - * @brief Insert Linked List node. - * @param pLinkedList: Pointer to the linkedlist that contains transfer nodes - * @param pPrevNode: Pointer to previous node. - * @param pNewNode: Pointer to new node to insert. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_MMCEx_DMALinkedList_InsertNode(MMC_DMALinkedListTypeDef *pLinkedList, - MMC_DMALinkNodeTypeDef *pPrevNode, - MMC_DMALinkNodeTypeDef *pNewNode) -{ - - if (SDMMC_DMALinkedList_InsertNode(pLinkedList, pPrevNode, pNewNode) != SDMMC_ERROR_NONE) - { - return (HAL_ERROR); - } - else - { - return (HAL_OK); - } - -} -/** - * @brief Remove Linked List node. - * @param pLinkedList: Pointer to the linkedlist that contains transfer nodes - * @param pNode: Pointer to node to remove. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_MMCEx_DMALinkedList_RemoveNode(MMC_DMALinkedListTypeDef *pLinkedList, - MMC_DMALinkNodeTypeDef *pNode) -{ - - if (SDMMC_DMALinkedList_RemoveNode(pLinkedList, pNode) != SDMMC_ERROR_NONE) - { - return (HAL_ERROR); - } - else - { - return (HAL_OK); - } -} - -/** - * @brief Lock Linked List node. - * @param pNode: Pointer to node to remove. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_MMCEx_DMALinkedList_LockNode(MMC_DMALinkNodeTypeDef *pNode) -{ - - if (SDMMC_DMALinkedList_LockNode(pNode) != SDMMC_ERROR_NONE) - { - return HAL_ERROR; - } - else - { - return HAL_OK; - } -} - -/** - * @brief Unlock Linked List node. - * @param pNode: Pointer to node to remove. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_MMCEx_DMALinkedList_UnlockNode(MMC_DMALinkNodeTypeDef *pNode) -{ - - if (SDMMC_DMALinkedList_UnlockNode(pNode) != SDMMC_ERROR_NONE) - { - return HAL_ERROR; - } - else - { - return HAL_OK; - } -} - -/** - * @brief Enable Circular mode for DMA Linked List mode. - * @param pLinkedList: Pointer to the linkedlist that contains transfer nodes - * @retval HAL status - */ -HAL_StatusTypeDef HAL_MMCEx_DMALinkedList_EnableCircularMode(MMC_DMALinkedListTypeDef *pLinkedList) -{ - - if (SDMMC_DMALinkedList_EnableCircularMode(pLinkedList) != SDMMC_ERROR_NONE) - { - return HAL_ERROR; - } - else - { - return HAL_OK; - } -} -/** - * @brief Disable Circular mode for DMA Linked List mode. - * @param pLinkedList: Pointer to the linkedlist that contains transfer nodes - * @retval HAL status - */ -HAL_StatusTypeDef HAL_MMCEx_DMALinkedList_DisableCircularMode(MMC_DMALinkedListTypeDef *pLinkedList) -{ - - if (SDMMC_DMALinkedList_DisableCircularMode(pLinkedList) != SDMMC_ERROR_NONE) - { - return HAL_ERROR; - } - else - { - return HAL_OK; - } -} - - -/** - * @brief Reads block(s) from a specified address in a card. The received Data will be stored in linked list buffers. - * linked list should be prepared before call this function . - * @param hmmc: MMC handle - * @param pLinkedList: pointer to first linked list node - * @param BlockAdd: Block Address from where data is to be read - * @param NumberOfBlocks: Total number of blocks to read - * @retval HAL status - */ -HAL_StatusTypeDef HAL_MMCEx_DMALinkedList_ReadBlocks(MMC_HandleTypeDef *hmmc, - const MMC_DMALinkedListTypeDef *pLinkedList, - uint32_t BlockAdd, uint32_t NumberOfBlocks) -{ - SDMMC_DataInitTypeDef config; - uint32_t DmaBase0_reg; - uint32_t DmaBase1_reg; - uint32_t errorstate; - uint32_t add = BlockAdd; - - if (hmmc->State == HAL_MMC_STATE_READY) - { - if ((BlockAdd + NumberOfBlocks) > (hmmc->MmcCard.LogBlockNbr)) - { - hmmc->ErrorCode |= HAL_MMC_ERROR_ADDR_OUT_OF_RANGE; - return HAL_ERROR; - } - - /* Check the case of 4kB blocks (field DATA SECTOR SIZE of extended CSD register) */ - if (((hmmc->Ext_CSD[(MMC_EXT_CSD_DATA_SEC_SIZE_INDEX / 4)] >> MMC_EXT_CSD_DATA_SEC_SIZE_POS) & 0x000000FFU) != 0x0U) - { - if ((NumberOfBlocks % 8U) != 0U) - { - /* The number of blocks should be a multiple of 8 sectors of 512 bytes = 4 KBytes */ - hmmc->ErrorCode |= HAL_MMC_ERROR_BLOCK_LEN_ERR; - return HAL_ERROR; - } - - if ((BlockAdd % 8U) != 0U) - { - /* The address should be aligned to 8 (corresponding to 4 KBytes blocks) */ - hmmc->ErrorCode |= HAL_MMC_ERROR_ADDR_MISALIGNED; - return HAL_ERROR; - } - } - - hmmc->Instance->IDMABASER = (uint32_t) pLinkedList->pHeadNode->IDMABASER; - hmmc->Instance->IDMABSIZE = (uint32_t) pLinkedList->pHeadNode->IDMABSIZE; - hmmc->Instance->IDMABAR = (uint32_t) pLinkedList->pHeadNode; - hmmc->Instance->IDMALAR = (uint32_t) SDMMC_IDMALAR_ABR | SDMMC_IDMALAR_ULS | SDMMC_IDMALAR_ULA | - sizeof(SDMMC_DMALinkNodeTypeDef) ; /* Initial configuration */ - - DmaBase0_reg = hmmc->Instance->IDMABASER; - DmaBase1_reg = hmmc->Instance->IDMABAR; - - if ((hmmc->Instance->IDMABSIZE == 0U) || (DmaBase0_reg == 0U) || (DmaBase1_reg == 0U)) - { - hmmc->ErrorCode = HAL_MMC_ERROR_ADDR_OUT_OF_RANGE; - return HAL_ERROR; - } - - /* Initialize data control register */ - hmmc->Instance->DCTRL = 0; - - hmmc->ErrorCode = HAL_MMC_ERROR_NONE; - hmmc->State = HAL_MMC_STATE_BUSY; - - if ((hmmc->MmcCard.CardType) != MMC_HIGH_CAPACITY_CARD) - { - add *= 512U; - } - - /* Configure the MMC DPSM (Data Path State Machine) */ - config.DataTimeOut = SDMMC_DATATIMEOUT; - config.DataLength = MMC_BLOCKSIZE * NumberOfBlocks; - config.DataBlockSize = SDMMC_DATABLOCK_SIZE_512B; - config.TransferDir = SDMMC_TRANSFER_DIR_TO_SDMMC; - config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK; - config.DPSM = SDMMC_DPSM_DISABLE; - (void)SDMMC_ConfigData(hmmc->Instance, &config); - - hmmc->Instance->DCTRL |= SDMMC_DCTRL_FIFORST; - - __SDMMC_CMDTRANS_ENABLE(hmmc->Instance); - - hmmc->Instance->IDMACTRL = SDMMC_ENABLE_IDMA_DOUBLE_BUFF0; - - /* Read Blocks in DMA mode */ - hmmc->Context = (MMC_CONTEXT_READ_MULTIPLE_BLOCK | MMC_CONTEXT_DMA); - - /* Read Multi Block command */ - errorstate = SDMMC_CmdReadMultiBlock(hmmc->Instance, add); - if (errorstate != HAL_MMC_ERROR_NONE) - { - hmmc->State = HAL_MMC_STATE_READY; - hmmc->ErrorCode |= errorstate; - return HAL_ERROR; - } - - __HAL_MMC_ENABLE_IT(hmmc, (SDMMC_IT_DCRCFAIL | SDMMC_IT_DTIMEOUT | SDMMC_IT_RXOVERR | SDMMC_IT_DATAEND | - SDMMC_FLAG_IDMATE | SDMMC_FLAG_IDMABTC)); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } - -} - -/** - * @brief Write block(s) to a specified address in a card. The transferred Data are stored linked list nodes buffers . - * linked list should be prepared before call this function . - * @param hmmc: MMC handle - * @param pLinkedList: pointer to first linked list node - * @param BlockAdd: Block Address from where data is to be read - * @param NumberOfBlocks: Total number of blocks to read - * @retval HAL status - */ -HAL_StatusTypeDef HAL_MMCEx_DMALinkedList_WriteBlocks(MMC_HandleTypeDef *hmmc, - const MMC_DMALinkedListTypeDef *pLinkedList, - uint32_t BlockAdd, uint32_t NumberOfBlocks) -{ - SDMMC_DataInitTypeDef config; - uint32_t errorstate; - uint32_t DmaBase0_reg; - uint32_t DmaBase1_reg; - uint32_t add = BlockAdd; - - if (hmmc->State == HAL_MMC_STATE_READY) - { - if ((BlockAdd + NumberOfBlocks) > (hmmc->MmcCard.LogBlockNbr)) - { - hmmc->ErrorCode |= HAL_MMC_ERROR_ADDR_OUT_OF_RANGE; - return HAL_ERROR; - } - - /* Check the case of 4kB blocks (field DATA SECTOR SIZE of extended CSD register) */ - if (((hmmc->Ext_CSD[(MMC_EXT_CSD_DATA_SEC_SIZE_INDEX / 4)] >> MMC_EXT_CSD_DATA_SEC_SIZE_POS) & 0x000000FFU) != 0x0U) - { - if ((NumberOfBlocks % 8U) != 0U) - { - /* The number of blocks should be a multiple of 8 sectors of 512 bytes = 4 KBytes */ - hmmc->ErrorCode |= HAL_MMC_ERROR_BLOCK_LEN_ERR; - return HAL_ERROR; - } - - if ((BlockAdd % 8U) != 0U) - { - /* The address should be aligned to 8 (corresponding to 4 KBytes blocks) */ - hmmc->ErrorCode |= HAL_MMC_ERROR_ADDR_MISALIGNED; - return HAL_ERROR; - } - } - - hmmc->Instance->IDMABASER = (uint32_t) pLinkedList->pHeadNode->IDMABASER; - hmmc->Instance->IDMABSIZE = (uint32_t) pLinkedList->pHeadNode->IDMABSIZE; - - hmmc->Instance->IDMABAR = (uint32_t) pLinkedList->pHeadNode; - hmmc->Instance->IDMALAR = (uint32_t) SDMMC_IDMALAR_ABR | SDMMC_IDMALAR_ULS | SDMMC_IDMALAR_ULA | - sizeof(SDMMC_DMALinkNodeTypeDef) ; /* Initial configuration */ - - DmaBase0_reg = hmmc->Instance->IDMABASER; - DmaBase1_reg = hmmc->Instance->IDMABAR; - - if ((hmmc->Instance->IDMABSIZE == 0U) || (DmaBase0_reg == 0U) || (DmaBase1_reg == 0U)) - { - hmmc->ErrorCode = HAL_MMC_ERROR_ADDR_OUT_OF_RANGE; - return HAL_ERROR; - } - - /* Initialize data control register */ - hmmc->Instance->DCTRL = 0; - - hmmc->ErrorCode = HAL_MMC_ERROR_NONE; - - hmmc->State = HAL_MMC_STATE_BUSY; - - if ((hmmc->MmcCard.CardType) != MMC_HIGH_CAPACITY_CARD) - { - add *= 512U; - } - - /* Configure the MMC DPSM (Data Path State Machine) */ - config.DataTimeOut = SDMMC_DATATIMEOUT; - config.DataLength = MMC_BLOCKSIZE * NumberOfBlocks; - config.DataBlockSize = SDMMC_DATABLOCK_SIZE_512B; - config.TransferDir = SDMMC_TRANSFER_DIR_TO_CARD; - config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK; - config.DPSM = SDMMC_DPSM_DISABLE; - (void)SDMMC_ConfigData(hmmc->Instance, &config); - - __SDMMC_CMDTRANS_ENABLE(hmmc->Instance); - - hmmc->Instance->IDMACTRL = SDMMC_ENABLE_IDMA_DOUBLE_BUFF0; - - /* Write Blocks in DMA mode */ - hmmc->Context = (MMC_CONTEXT_WRITE_MULTIPLE_BLOCK | MMC_CONTEXT_DMA); - - /* Write Multi Block command */ - errorstate = SDMMC_CmdWriteMultiBlock(hmmc->Instance, add); - if (errorstate != HAL_MMC_ERROR_NONE) - { - hmmc->State = HAL_MMC_STATE_READY; - hmmc->ErrorCode |= errorstate; - return HAL_ERROR; - } - - __HAL_MMC_ENABLE_IT(hmmc, (SDMMC_IT_DCRCFAIL | SDMMC_IT_DTIMEOUT | SDMMC_IT_TXUNDERR | SDMMC_IT_DATAEND | - SDMMC_FLAG_IDMATE | SDMMC_FLAG_IDMABTC)); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - - -/** - * @} - */ - -/** - * @} - */ - -#endif /* HAL_MMC_MODULE_ENABLED */ -#endif /* SDMMC1 || SDMMC2 */ - -/** - * @} - */ - -/** - * @} - */ Index: trunk/firmware/FSBL/CubeMX/Drivers/STM32N6xx_HAL_Driver/Src/stm32n6xx_hal_rif.c =================================================================== --- trunk/firmware/FSBL/CubeMX/Drivers/STM32N6xx_HAL_Driver/Src/stm32n6xx_hal_rif.c (revision 37) +++ (revision ) @@ -1,1153 +1,0 @@ -/** - ****************************************************************************** - * @file stm32n6xx_hal_rif.c - * @author MCD Application Team - * @brief RIF HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the Resource Isolation Framework (RIF) peripheral: - * + Initialization and de-initialization functions - * + Peripheral Control functions - * - ****************************************************************************** - * @attention - * - * Copyright (c) 2023 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - @verbatim - ============================================================================== - ##### RIF main features ##### - ============================================================================== - [..] - (+) Resource Isolation framework (RIF) is a comprehensive set of hardware - blocks designed to enforce and manage isolation of STM32 hardware resources - like memory and peripherals. - - (+) Resource Isolation Framework (RIF) composed of the following sub-blocks: - (++) RIMC: Resource Isolation Master Controller - This sub-block assigns all non RIF-aware bus master to one - security domain by setting secure, privileged and compartment - information on the system bus. - Note that if non-secure software is permitted to configure one of - these peripherals, then this setting is ignored and all accesses - initiated by the peripheral are forced to be non-secure. - (++) RISC: Resource Isolation Slave Controller - This sub-block assigns all non-RIF aware peripherals to zero, - one or any security domains (secure, privilege, compartment). - (++) RISAF: Resource Isolation Slave unit for Address space (Full version) - This sub-block assigns memory regions and subregions to one or - more security domains (secure, privilege, compartment). - (++) IAC: Illegal Access Controller - This sub-block centralizes detection of RIF-related accesses, - managed by a secure application. Supported illegal accesses are: - secure, privileged. - - [..] - (+) All the setter functions are protected under the CPU_AS_TRUSTED_DOMAIN - directive. - It ensures that only the trusted domain can manage the critical - configurations of the RIF. - This directive is defined in the CMSIS file. - - =============================================================================== - ##### How to use this driver ##### - =============================================================================== - [..] - *** Locking RIF components configuration *** - ============================================================ - [..] - (#) Lock and get the lock configuration of RIMC registers until next reset - with HAL_RIF_RIMC_Lock / HAL_RIF_RIMC_GetLock. - (#) Lock and get the lock configuration of RISC registers until next reset - with HAL_RIF_RISC_Lock / HAL_RIF_RISC_GetLock. - (#) Lock and get the lock configuration of slave resources registers until - next reset with HAL_RIF_RISC_SlaveConfigLock / HAL_RIF_RISC_GetSlaveConfigLock. - (#) Lock and get the lock configuration of RISAF registers until next reset - with HAL_RIF_RISAF_Lock / HAL_RIF_RISAF_GetLock. - - *** Context-related functions *** - ============================================================ - [..] - (#) Set or get Debugger Access Port Compartment ID with HAL_RIF_RIMC_SetDebugAccessPortCID / - HAL_RIF_RIMC_GetDebugAccessPortCID functions. - (#) Check the Debug Domain and Global Debug Domain status with - HAL_RIF_RIMC_GetDebugStatus. - -#if defined(GENERATOR_RIF_FEATURE_ENCRYPTION_IMPLEMENTED) - *** Encryption-related functions *** - ============================================================ - [..] - (#) Read of write RISAF encryption keys and related flags. - -#endif - *** Configuration of master-related attributes *** - ============================================================ - [..] - (#) Set or get the secure, privilege and compartment configuration of a - bus master thanks to the HAL_RIF_RIMC_ConfigMasterAttributes / - HAL_RIF_RIMC_GetConfigMasterAttributes functions. - (#) Lock and get lock status the bus master attributes configuration until - next system reset using HAL_RIF_RIMC_Lock. - - *** Configuration of slave-related attributes *** - ============================================================ - [..] - (#) Set or get the secure and privilege configuration of a bus slave - thanks to the HAL_RIF_RISC_SetSlaveSecureAttributes / - HAL_RIF_RISC_GetSlaveSecureAttributes functions. - (#) Lock and get lock status each bus slave attributes configuration using - HAL_RIF_RISC_SlaveConfigLock or lock the whole RISC configuration with - HAL_RIF_RISC_Lock until next system reset. - - *** Configuration of RISAF attributes *** - ============================================================ - [..] - (#) Set or get a base region configuration with HAL_RIF_RISAF_ConfigBaseRegion / - HAL_RIF_RISAF_GetConfigBaseRegion. - (#) Set or get a subregion configuration with HAL_RIF_RISAF_ConfigSubRegion / - HAL_RIF_RISAF_GetConfigSubRegion. - (#) Delegate a subregion configuration to another CID with HAL_RIF_RISAF_ConfigSubRegionDelegation. - (#) Get the data from an illegal access to a protected memory region with - HAL_RIF_RISAF_GetIllegalAccess. - - *** IAC related functions *** - ============================================================ - [..] - (#) Enable or disable peripheral illegal access detection with HAL_RIF_IAC_EnableIT / - HAL_RIF_IAC_DisableIT. - (#) Retrieve an illegal access flag from a designated peripheral with HAL_RIF_IAC_GetFlag - or clear it with HAL_RIF_IAC_ClearFlag. - (#) Illegal access interrupt service routines are served by HAL_RIF_IRQHandler() - and user can add his own code using HAL_RIF_ILA_Callback(). - - @endverbatim - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32n6xx_hal.h" - -/** @addtogroup STM32N6xx_HAL_Driver - * @{ - */ - -/** @defgroup RIF RIF - * @brief RIF HAL module driver. - * @{ - */ - -#ifdef HAL_RIF_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private defines ------------------------------------------------------------*/ -/** @addtogroup RIF_Private_Defines RIF Private Defines - * @{ - */ -#define RIF_PERIPH_IAC_REG_MAX 4U -/** - * @} - */ - -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup RIF_Exported_Functions RIF Exported Functions - * @{ - */ - -/** @defgroup RIF_Exported_Functions_Group1 RIMC Configuration functions - * @brief RIMC Configuration functions - * -@verbatim - ============================================================================== - ##### RIMC Configuration functions ##### - ============================================================================== - [..] - This section provides functions allowing to configure RIMC - RIMC is Resource Isolation Master Controller -@endverbatim - * @{ - */ -#if defined(CPU_AS_TRUSTED_DOMAIN) && defined(CPU_IN_SECURE_STATE) -/** - * @brief Lock overall configuration of RIMC. - * @note Once set, the overall configuration of RIMC cannot be modified - * upon next system reset. - * @note This API is protected by the Trusted Domain compilation directive. - * @note This API is protected by the TrustZone Enabled compilation directive. - * @retval None - */ -void HAL_RIF_RIMC_Lock(void) -{ - /* Set RIMC Lock bit */ - RIFSC->RIMC_CR |= RIFSC_RIMC_CR_GLOCK; -} -#endif /* defined(CPU_AS_TRUSTED_DOMAIN) && defined(CPU_IN_SECURE_STATE) */ - -/** - * @brief Get RIMC global lock status. - * @retval RIF_LOCK_ENABLE if RIMC configuration is locked, else RIF_LOCK_DISABLE - */ -uint32_t HAL_RIF_RIMC_GetLock(void) -{ - uint32_t lock_status; - - /* Read RIMC lock bit */ - lock_status = (RIFSC->RIMC_CR & RIF_LOCK_ENABLE); - - return lock_status; -} - -#if defined(CPU_AS_TRUSTED_DOMAIN) && defined(CPU_IN_SECURE_STATE) -/** - * @brief Change the Debugger Access Port ID - * @note This API is protected by the Trusted Domain compilation directive. - * @note This API is protected by the TrustZone Enabled compilation directive. - * @param CID specifies the Debugger Access Port CID - * This parameter can be a combination of following values: - * @arg @ref RIF_CID_0 Compartment 0 ID selected as Debug access port ID - * @arg @ref RIF_CID_1 Compartment 1 ID selected as Debug access port ID - * @arg @ref RIF_CID_2 Compartment 2 ID selected as Debug access port ID - * @arg @ref RIF_CID_3 Compartment 3 ID selected as Debug access port ID - * @arg @ref RIF_CID_4 Compartment 4 ID selected as Debug access port ID - * @arg @ref RIF_CID_5 Compartment 5 ID selected as Debug access port ID - * @arg @ref RIF_CID_6 Compartment 6 ID selected as Debug access port ID - * @arg @ref RIF_CID_7 Compartment 7 ID selected as Debug access port ID - * @retval None - */ -void HAL_RIF_RIMC_SetDebugAccessPortCID(uint32_t CID) -{ - uint32_t dap_cid; - uint32_t rimc_cr_reg; - - /* Check the parameter */ - assert_param(IS_RIF_SINGLE_CID(CID)); - - /* Set Debug Access Port CID bits */ - dap_cid = POSITION_VAL(CID); - rimc_cr_reg = RIFSC->RIMC_CR; - rimc_cr_reg &= (~RIFSC_RIMC_CR_DAPCID); - rimc_cr_reg |= (dap_cid << RIFSC_RIMC_CR_DAPCID_Pos); - RIFSC->RIMC_CR = rimc_cr_reg; -} -#endif /* defined(CPU_AS_TRUSTED_DOMAIN) && defined(CPU_IN_SECURE_STATE) */ - -/** - * @brief Get the Debugger Access Port ID - * @retval Debugger Access Port ID - */ -uint32_t HAL_RIF_RIMC_GetDebugAccessPortCID(void) -{ - uint32_t dap_cid; - - /* Read Debug Access Port CID bits */ - dap_cid = (RIFSC->RIMC_CR & RIFSC_RIMC_CR_DAPCID) >> RIFSC_RIMC_CR_DAPCID_Pos; - dap_cid = (1UL << dap_cid); - return dap_cid; -} - -#if defined(CPU_AS_TRUSTED_DOMAIN) && defined(CPU_IN_SECURE_STATE) -/** - * @brief Configure CID, Secure and Privilege attributes for the designated master. - * @note RIF_CID_7 is not an authorized value for the MasterCID field. - * @note This API is protected by the Trusted Domain compilation directive. - * @note This API is protected by the TrustZone Enabled compilation directive. - * @param MasterId specifies the index of the bus master. - * This parameter can be one of @ref RIF_MASTER_INDEX - * @param pConfig Pointer on Master Isolation configuration structure - * @retval None - */ -void HAL_RIF_RIMC_ConfigMasterAttributes(uint32_t MasterId, const RIMC_MasterConfig_t *pConfig) -{ - uint32_t master_cid; - uint32_t rimc_attr_val; - - /* Check the parameter */ - assert_param(pConfig != (void *)NULL); - assert_param(IS_RIF_MASTER_INDEX(MasterId)); - assert_param(IS_RIF_SINGLE_CID(pConfig->MasterCID)); - assert_param(IS_RIF_MASTER_CID(pConfig->MasterCID)); - assert_param(IS_RIF_SEC_PRIV_ATTRIBUTE(pConfig->SecPriv)); - - master_cid = POSITION_VAL(pConfig->MasterCID); - rimc_attr_val = RIFSC->RIMC_ATTRx[MasterId]; - rimc_attr_val &= (~(RIFSC_RIMC_ATTRx_MCID | RIFSC_RIMC_ATTRx_MPRIV | RIFSC_RIMC_ATTRx_MSEC)); - rimc_attr_val |= ((master_cid << RIFSC_RIMC_ATTRx_MCID_Pos) | (pConfig->SecPriv << RIFSC_RIMC_ATTRx_MSEC_Pos)); - RIFSC->RIMC_ATTRx[MasterId] = rimc_attr_val; -} -#endif /* defined(CPU_AS_TRUSTED_DOMAIN) && defined(CPU_IN_SECURE_STATE) */ - -/** - * @brief Get the CID, Secure and Privilege attributes for the designated master. - * @note This API is protected by the Trusted Domain compilation directive. - * @param MasterId specifies the index of the bus master. - * This parameter can be one of @ref RIF_MASTER_INDEX - * @param pConfig Pointer on Master Isolation configuration structure - * @retval None - */ -void HAL_RIF_RIMC_GetConfigMasterAttributes(uint32_t MasterId, RIMC_MasterConfig_t *pConfig) -{ - uint32_t master_cid; - uint32_t rimc_attr_val; - - /* Check the parameter */ - assert_param(pConfig != (void *)NULL); - assert_param(IS_RIF_MASTER_INDEX(MasterId)); - - rimc_attr_val = RIFSC->RIMC_ATTRx[MasterId]; - pConfig->SecPriv = ((rimc_attr_val & (RIFSC_RIMC_ATTRx_MPRIV | RIFSC_RIMC_ATTRx_MSEC)) - >> RIFSC_RIMC_ATTRx_MSEC_Pos); - master_cid = ((rimc_attr_val & RIFSC_RIMC_ATTRx_MCID) >> RIFSC_RIMC_ATTRx_MCID_Pos); - pConfig->MasterCID = (1UL << master_cid); -} -/** - * @} - */ - -/** @defgroup RIF_Exported_Functions_Group2 RIFSC Configuration functions - * @brief RIFSC Configuration functions - * -@verbatim - ============================================================================== - ##### RIFSC Configuration functions ##### - ============================================================================== - [..] - This section provides functions allowing to configure RIFSC - RIFSC is Resource Isolation Framework Secure Controller -@endverbatim - * @{ - */ -#if defined(CPU_AS_TRUSTED_DOMAIN) && defined(CPU_IN_SECURE_STATE) -/** - * @brief Lock overall configuration of RISC. - * @note Once set, the overall configuration of RIFSC cannot be modified - * upon next system reset. - * @note This API is protected by the Trusted Domain compilation directive. - * @note This API is protected by the TrustZone Enabled compilation directive. - * @retval None - */ -void HAL_RIF_RISC_Lock(void) -{ - /* Set RISC Lock bit */ - RIFSC->RISC_CR |= RIFSC_RISC_CR_GLOCK; -} -#endif /* defined(CPU_AS_TRUSTED_DOMAIN) && defined(CPU_IN_SECURE_STATE) */ - -/** - * @brief Get the RIFSC global lock status. - * @retval 1 if RISC configuration is locked, else 0 - */ -uint32_t HAL_RIF_RISC_GetLock(void) -{ - uint32_t lock_status; - - /* Read RISC lock bit */ - lock_status = (RIFSC->RISC_CR & RIF_LOCK_ENABLE); - - return lock_status; -} - -/** - * @brief Configure the Security and Privilege of a designated slave peripheral. - * @param PeriphId specifies the index of the bus slave. - * This parameter can be one of @ref RIF_PERIPHERAL_INDEX - * bits[31:28] define the register index a peripheral belongs to, value from 0 to 5 - * bits[4:0] define the bit position within the register, value from 0 to 31 - * @param SecPriv specifies the security and privilege attributes of the peripheral. - * This parameter can be one or a combination of @ref RIF_SEC_PRIV - * @retval None - */ -void HAL_RIF_RISC_SetSlaveSecureAttributes(uint32_t PeriphId, uint32_t SecPriv) -{ - __IO uint32_t sec_reg_val; - - assert_param(IS_RIF_RISC_PERIPH_INDEX(PeriphId) || IS_RIF_RCC_PERIPH_INDEX(PeriphId)); - assert_param(IS_RIF_SEC_PRIV_ATTRIBUTE(SecPriv)); - - sec_reg_val = RIFSC->RISC_SECCFGRx[PeriphId >> RIF_PERIPH_REG_SHIFT]; - sec_reg_val &= (~(1UL << (PeriphId & RIF_PERIPH_BIT_POSITION))); - sec_reg_val |= ((SecPriv & RIF_ATTRIBUTE_SEC) << (PeriphId & RIF_PERIPH_BIT_POSITION)); - RIFSC->RISC_SECCFGRx[PeriphId >> RIF_PERIPH_REG_SHIFT] = sec_reg_val; - - sec_reg_val = RIFSC->RISC_PRIVCFGRx[PeriphId >> RIF_PERIPH_REG_SHIFT]; - sec_reg_val &= (~(1UL << (PeriphId & RIF_PERIPH_BIT_POSITION))); - sec_reg_val |= (((SecPriv & RIF_ATTRIBUTE_PRIV) >> 1U) << (PeriphId & RIF_PERIPH_BIT_POSITION)); - RIFSC->RISC_PRIVCFGRx[PeriphId >> RIF_PERIPH_REG_SHIFT] = sec_reg_val; -} - -/** - * @brief Get the Security and Privilege configuration of a designated slave peripheral. - * @param PeriphId specifies the index of the bus slave. - * This parameter can be one of @ref RIF_PERIPHERAL_INDEX - * bits[31:28] define the register index a peripheral belongs to, value from 0 to 5 - * bits[4:0] define the bit position within the register, value from 0 to 31 - * @retval can be a combination of @ref RIF_SEC_PRIV - */ -uint32_t HAL_RIF_RISC_GetSlaveSecureAttributes(uint32_t PeriphId) -{ - uint32_t sec_attr; - const __IO uint32_t *p_sec_reg; - - assert_param(IS_RIF_RISC_PERIPH_INDEX(PeriphId) || IS_RIF_RCC_PERIPH_INDEX(PeriphId)); - - p_sec_reg = &(RIFSC->RISC_SECCFGRx[PeriphId >> RIF_PERIPH_REG_SHIFT]); - sec_attr = ((*p_sec_reg & ((uint32_t)RIF_ATTRIBUTE_SEC << (PeriphId & RIF_PERIPH_BIT_POSITION))) >> (PeriphId & RIF_PERIPH_BIT_POSITION)); - - p_sec_reg = &(RIFSC->RISC_PRIVCFGRx[PeriphId >> RIF_PERIPH_REG_SHIFT]); - sec_attr |= (((*p_sec_reg & ((uint32_t)RIF_ATTRIBUTE_SEC << (PeriphId & RIF_PERIPH_BIT_POSITION))) >> (PeriphId & RIF_PERIPH_BIT_POSITION)) << 1U); - - return sec_attr; -} - -#if defined(CPU_AS_TRUSTED_DOMAIN) -/** - * @brief Lock the Isolation and Security configuration of the designated slave peripheral. - * @note This API is protected by the Trusted Domain compilation directive. - * @param PeriphId specifies the index of the bus slave. - * This parameter can be one of @ref RIF_PERIPHERAL_INDEX - * bits[31:28] define the register index a peripheral belongs to, value from 0 to 5 - * bits[4:0] define the bit position within the register, value from 0 to 31 - * @retval None - */ -void HAL_RIF_RISC_SlaveConfigLock(uint32_t PeriphId) -{ - __IO uint32_t *p_lock_reg; - - assert_param(IS_RIF_RISC_PERIPH_INDEX(PeriphId) || IS_RIF_RCC_PERIPH_INDEX(PeriphId)); - - /* Set RISC Peripheral Lock bit */ - p_lock_reg = &(RIFSC->RISC_RCFGLOCKRx[PeriphId >> RIF_PERIPH_REG_SHIFT]); - *p_lock_reg |= (RIF_LOCK_ENABLE << (PeriphId & RIF_PERIPH_BIT_POSITION)); -} -#endif /* defined(CPU_AS_TRUSTED_DOMAIN) */ - -/** - * @brief Get the Isolation and Security configuration lock status. - * @param PeriphId specifies the index of the bus slave. - * This parameter can be one of @ref RIF_PERIPHERAL_INDEX - * bits[31:28] define the register index a peripheral belongs to, value from 0 to 5 - * bits[4:0] define the bit position within the register, value from 0 to 31 - * @retval 1 if the Isolation and Security configuration is locked, else 0 - */ -uint32_t HAL_RIF_RISC_GetSlaveConfigLock(uint32_t PeriphId) -{ - uint32_t lock_status; - const __IO uint32_t *p_lock_reg; - - assert_param(IS_RIF_RISC_PERIPH_INDEX(PeriphId) || IS_RIF_RCC_PERIPH_INDEX(PeriphId)); - - p_lock_reg = &(RIFSC->RISC_RCFGLOCKRx[PeriphId >> RIF_PERIPH_REG_SHIFT]); - lock_status = ((*p_lock_reg & (RIF_LOCK_ENABLE << (PeriphId & RIF_PERIPH_BIT_POSITION))) >> (PeriphId & RIF_PERIPH_BIT_POSITION)); - - return lock_status; -} - -/** - * @} - */ - -/** @defgroup RIF_Exported_Functions_Group4 RISAF Configuration functions - * @brief RISAF Configuration functions - * -@verbatim - ============================================================================== - ##### RISAF Configuration functions ##### - ============================================================================== - [..] - This section provides functions allowing to configure RISAF - RISAL is Resource Isolation Slave unit for Address space protection (Full version) -@endverbatim - * @{ - */ -#if defined(CPU_AS_TRUSTED_DOMAIN) -/** - * @brief Lock overall configuration of RISAF. - * @note Once set, the overall configuration of RISAF cannot be modified - * upon next system reset. - * @note This API is protected by the Trusted Domain compilation directive. - * @param RISAFx specifies the RISAF instance. - * This parameter is one of the RISAF instances defined in the CMSIS. - * @retval None - */ -void HAL_RIF_RISAF_Lock(RISAF_TypeDef *RISAFx) -{ - /* Check the parameters */ - assert_param(IS_RISAF_INSTANCE(RISAFx)); - - /* Set RISAF Lock bit */ - RISAFx->CR |= RISAF_CR_GLOCK; -} -#endif /* defined(CPU_AS_TRUSTED_DOMAIN) */ - -/** - * @brief Get RISAF global lock status. - * @param RISAFx specifies the RISAF instance. - * This parameter is one of the RISAF instances defined in the CMSIS. - * @retval 1 if RISAF configuration is locked, else 0 - */ -uint32_t HAL_RIF_RISAF_GetLock(const RISAF_TypeDef *RISAFx) -{ - uint32_t lock_status; - - /* Read RIMC lock bit */ - lock_status = (RISAFx->CR & RIF_LOCK_ENABLE); - - return lock_status; -} - -#if defined(GENERATOR_RIF_FEATURE_ENCRYPTION_IMPLEMENTED) -/** - * @brief Get encryption and key related flags. - * @param RISAFx specifies the RISAF instance. - * This parameter is one of the RISAF instances defined in the CMSIS. - * @retval A combination of the three encryption related flags - */ -uint32_t HAL_RIF_RISAF_GetEncryptionStatus(RISAF_TypeDef *RISAFx) -{ - uint32_t tmp = 0; - - return tmp; -} - -#if defined(CPU_AS_TRUSTED_DOMAIN) -/** - * @brief Write the encryption keys used by the DDRMCE. - * @note This API is protected by the Trusted Domain compilation directive. - * @param RISAFx specifies the RISAF instance. - * This parameter is one of the RISAF instances defined in the CMSIS. - * @param Keys Pointer on the Encryption keys structure - * @retval None - */ -void HAL_RIF_RISAF_WriteEncryptionKeys(RISAF_TypeDef *RISAFx, RISAF_EncryptionKeys_t *Keys) -{ -} -#endif /* defined(CPU_AS_TRUSTED_DOMAIN) */ - -#endif /* defined(GENERATOR_RIF_FEATURE_ENCRYPTION_IMPLEMENTED) */ -#if defined(CPU_AS_TRUSTED_DOMAIN) -/** - * @brief Configure a RISAF Base region. - * @note If pConfig->Filtering is equal to RISAF_FILTER_DISABLE, this API only disable the filtering without modifying - * its configuration. - * @note It is not possible to modify the start and end address of the region if the filtering is already enabled. - * @note This API is protected by the Trusted Domain compilation directive. - * @param RISAFx specifies the RISAF instance. - * This parameter is one of the RISAF instances defined in the CMSIS. - * @param Region specifies the RISAF region index - * This parameter can be one one of the following values: - * @arg @ref RISAF_REGION_1 - * @arg @ref RISAF_REGION_2 - * @arg @ref RISAF_REGION_3 - * @arg @ref RISAF_REGION_4 - * @arg @ref RISAF_REGION_5 - * @arg @ref RISAF_REGION_6 - * @arg @ref RISAF_REGION_7 - * @arg @ref RISAF_REGION_8 - * @arg @ref RISAF_REGION_9 - * @arg @ref RISAF_REGION_10 - * @arg @ref RISAF_REGION_11 - * @arg @ref RISAF_REGION_12 - * @arg @ref RISAF_REGION_13 - * @arg @ref RISAF_REGION_14 - * @arg @ref RISAF_REGION_15 - * @param pConfig Pointer on RISAF Base Region configuration structure - * @retval None - */ -void HAL_RIF_RISAF_ConfigBaseRegion(RISAF_TypeDef *RISAFx, uint32_t Region, const RISAF_BaseRegionConfig_t *pConfig) -{ - /* Check the parameters */ - assert_param(pConfig != (void *)NULL); - assert_param(IS_RISAF_INSTANCE(RISAFx)); - assert_param(IS_RISAF_REGION(Region)); - assert_param(IS_RISAF_MAX_REGION(RISAFx, Region)); - - /* Only disable the section */ - if (pConfig->Filtering == RISAF_FILTER_DISABLE) - { - RISAFx->REG[Region].CFGR &= (~(RISAF_FILTER_ENABLE)); - } - else - { - /* Check the parameters */ - assert_param(IS_RISAF_FILTERING(pConfig->Filtering)); - assert_param(IS_RIF_CID(pConfig->PrivWhitelist)); - assert_param(IS_RIF_CID(pConfig->ReadWhitelist)); - assert_param(IS_RIF_CID(pConfig->WriteWhitelist)); - assert_param(IS_RIF_SEC_PRIV_ATTRIBUTE(pConfig->Secure)); - assert_param(IS_RISAF_GRANULARITY(RISAFx, pConfig->StartAddress)); - assert_param(IS_RISAF_LIMIT_ADDRESS_SPACE_SIZE(RISAFx, pConfig->StartAddress)); - assert_param(IS_RISAF_GRANULARITY(RISAFx, (pConfig->EndAddress + 1U))); - assert_param(IS_RISAF_LIMIT_ADDRESS_SPACE_SIZE(RISAFx, pConfig->EndAddress)); - assert_param(pConfig->StartAddress < pConfig->EndAddress); - - /* Update region start and end addresses */ - RISAFx->REG[Region].STARTR = pConfig->StartAddress; - RISAFx->REG[Region].ENDR = pConfig->EndAddress; - - /* Update filtering mode, security and privilege attributes and whitelists */ - RISAFx->REG[Region].CIDCFGR = (pConfig->ReadWhitelist | (pConfig->WriteWhitelist << RISAF_REGx_CIDCFGR_WRENC0_Pos)); - RISAFx->REG[Region].CFGR = (pConfig->Filtering | (pConfig->Secure << RISAF_REGx_CFGR_SEC_Pos) - | (pConfig->PrivWhitelist << RISAF_REGx_CFGR_PRIVC0_Pos)); - } -} -#endif /* defined(CPU_AS_TRUSTED_DOMAIN) */ - -/** - * @brief Get the configuration of a RISAF Base region. - * @param RISAFx specifies the RISAF instance. - * This parameter is one of the RISAF instances defined in the CMSIS. - * @param Region specifies the RISAF region index - * This parameter can be one one of the following values: - * @arg @ref RISAF_REGION_1 - * @arg @ref RISAF_REGION_2 - * @arg @ref RISAF_REGION_3 - * @arg @ref RISAF_REGION_4 - * @arg @ref RISAF_REGION_5 - * @arg @ref RISAF_REGION_6 - * @arg @ref RISAF_REGION_7 - * @arg @ref RISAF_REGION_8 - * @arg @ref RISAF_REGION_9 - * @arg @ref RISAF_REGION_10 - * @arg @ref RISAF_REGION_11 - * @arg @ref RISAF_REGION_12 - * @arg @ref RISAF_REGION_13 - * @arg @ref RISAF_REGION_14 - * @arg @ref RISAF_REGION_15 - * @param pConfig Pointer on RISAF Base Region configuration structure - * @retval None - */ -void HAL_RIF_RISAF_GetConfigBaseRegion(const RISAF_TypeDef *RISAFx, uint32_t Region, RISAF_BaseRegionConfig_t *pConfig) -{ - uint32_t cfgr_reg; - uint32_t cidcfgr_reg; - - /* Check the parameters */ - assert_param(IS_RISAF_INSTANCE(RISAFx)); - assert_param(IS_RISAF_REGION(Region)); - assert_param(IS_RISAF_MAX_REGION(RISAFx, Region)); - assert_param(pConfig != (void *)NULL); - - cfgr_reg = RISAFx->REG[Region].CFGR; - cidcfgr_reg = RISAFx->REG[Region].CIDCFGR; - - pConfig->Filtering = (cfgr_reg & RISAF_REGx_CFGR_BREN); - pConfig->Secure = ((cfgr_reg & RISAF_REGx_CFGR_SEC) >> RISAF_REGx_CFGR_SEC_Pos); - pConfig->PrivWhitelist = ((cfgr_reg & (RIF_CID_MASK << RISAF_REGx_CFGR_PRIVC0_Pos)) >> RISAF_REGx_CFGR_PRIVC0_Pos); - pConfig->ReadWhitelist = (cidcfgr_reg & RIF_CID_MASK); - pConfig->WriteWhitelist = ((cidcfgr_reg & (RIF_CID_MASK << RISAF_REGx_CIDCFGR_WRENC0_Pos)) >> RISAF_REGx_CIDCFGR_WRENC0_Pos); - pConfig->StartAddress = RISAFx->REG[Region].STARTR; - pConfig->EndAddress = RISAFx->REG[Region].ENDR; -} - -#if defined(CPU_AS_TRUSTED_DOMAIN) -/** - * @brief Delegate a Subregion configuration to another CID. - * @note This API is protected by the Trusted Domain compilation directive. - * @param RISAFx specifies the RISAF instance. - * This parameter is one of the RISAF instances defined in the CMSIS. - * @param Region specifies the RISAF region index - * This parameter can be one one of the following values: - * @arg @ref RISAF_REGION_1 - * @arg @ref RISAF_REGION_2 - * @arg @ref RISAF_REGION_3 - * @arg @ref RISAF_REGION_4 - * @arg @ref RISAF_REGION_5 - * @arg @ref RISAF_REGION_6 - * @arg @ref RISAF_REGION_7 - * @arg @ref RISAF_REGION_8 - * @arg @ref RISAF_REGION_9 - * @arg @ref RISAF_REGION_10 - * @arg @ref RISAF_REGION_11 - * @arg @ref RISAF_REGION_12 - * @arg @ref RISAF_REGION_13 - * @arg @ref RISAF_REGION_14 - * @arg @ref RISAF_REGION_15 - * @param SubRegion specifies the RISAB Subregion index - * This parameter can be one of the following values: - * @arg @ref RISAF_SUBREGION_A - * @arg @ref RISAF_SUBREGION_B - * @param pConfig Pointer on RISAF Subregion configuration structure - * @retval None - */ -void HAL_RIF_RISAF_ConfigSubRegionDelegation(RISAF_TypeDef *RISAFx, uint32_t Region, uint32_t SubRegion, - const RISAF_DelegationConfig_t *pConfig) -{ - uint32_t cid; - uint32_t nestr_reg; - - /* Check the parameters */ - assert_param(pConfig != (void *)NULL); - assert_param(IS_RISAF_INSTANCE(RISAFx)); - assert_param(IS_RISAF_REGION(Region)); - assert_param(IS_RISAF_MAX_REGION(RISAFx, Region)); - assert_param(IS_RISAF_SUBREGION(SubRegion)); - assert_param(IS_RISAF_DELEGATION(pConfig->Delegation)); - assert_param(IS_RIF_SINGLE_CID(pConfig->DelegatedCID)); - - /* Convert mask into bit position */ - cid = POSITION_VAL(pConfig->DelegatedCID); - - if (SubRegion == RISAF_SUBREGION_A) - { - nestr_reg = RISAFx->REG[Region].ANESTR; - nestr_reg &= (~(RISAF_REGx_zNESTR_DCCID | RISAF_REGx_zNESTR_DCEN)); - nestr_reg |= ((cid << RISAF_REGx_zNESTR_DCCID_Pos) | pConfig->Delegation); - RISAFx->REG[Region].ANESTR = nestr_reg; - } - else - { - nestr_reg = RISAFx->REG[Region].BNESTR; - nestr_reg &= (~(RISAF_REGx_zNESTR_DCCID | RISAF_REGx_zNESTR_DCEN)); - nestr_reg |= ((cid << RISAF_REGx_zNESTR_DCCID_Pos) | pConfig->Delegation); - RISAFx->REG[Region].BNESTR = nestr_reg; - } -} -#endif /* defined(CPU_AS_TRUSTED_DOMAIN) */ - -/** - * @brief Get the delegation configuration of a RISAF Subregion. - * @param RISAFx specifies the RISAF instance. - * This parameter is one of the RISAF instances defined in the CMSIS. - * @param Region specifies the RISAF region index - * This parameter can be one one of the following values: - * @arg @ref RISAF_REGION_1 - * @arg @ref RISAF_REGION_2 - * @arg @ref RISAF_REGION_3 - * @arg @ref RISAF_REGION_4 - * @arg @ref RISAF_REGION_5 - * @arg @ref RISAF_REGION_6 - * @arg @ref RISAF_REGION_7 - * @arg @ref RISAF_REGION_8 - * @arg @ref RISAF_REGION_9 - * @arg @ref RISAF_REGION_10 - * @arg @ref RISAF_REGION_11 - * @arg @ref RISAF_REGION_12 - * @arg @ref RISAF_REGION_13 - * @arg @ref RISAF_REGION_14 - * @arg @ref RISAF_REGION_15 - * @param SubRegion specifies the RISAB Subregion index - * This parameter can be one of the following values: - * @arg @ref RISAF_SUBREGION_A - * @arg @ref RISAF_SUBREGION_B - * @param pConfig Pointer on RISAF Subregion configuration structure - * @retval None - */ -void HAL_RIF_RISAF_GetConfigSubRegionDelegation(const RISAF_TypeDef *RISAFx, uint32_t Region, uint32_t SubRegion, - RISAF_DelegationConfig_t *pConfig) -{ - uint32_t cid; - - /* Check the parameters */ - assert_param(pConfig != (void *)NULL); - assert_param(IS_RISAF_INSTANCE(RISAFx)); - assert_param(IS_RISAF_REGION(Region)); - assert_param(IS_RISAF_MAX_REGION(RISAFx, Region)); - assert_param(IS_RISAF_SUBREGION(SubRegion)); - - if (SubRegion == RISAF_SUBREGION_A) - { - pConfig->Delegation = (RISAFx->REG[Region].ANESTR & RISAF_REGx_zNESTR_DCEN); - cid = ((RISAFx->REG[Region].ANESTR & RISAF_REGx_zNESTR_DCCID) >> RISAF_REGx_zNESTR_DCCID_Pos); - } - else - { - pConfig->Delegation = (RISAFx->REG[Region].BNESTR & RISAF_REGx_zNESTR_DCEN); - cid = ((RISAFx->REG[Region].BNESTR & RISAF_REGx_zNESTR_DCCID) >> RISAF_REGx_zNESTR_DCCID_Pos); - } - - pConfig->DelegatedCID = (1UL << cid); -} - -/** - * @brief Configure a RISAF subregion. - * @note If pConfig->Filtering is equal to RISAF_FILTER_DISABLE, this API only disable the filtering without modifying - * its configuration. It also can lock the current subregion configuration. - * @note It is not possible to modify the start and end address of a subregion if the filtering is already enabled. - * @param RISAFx specifies the RISAF instance. - * This parameter is one of the RISAF instances defined in the CMSIS. - * @param Region specifies the RISAF region index - * This parameter can be one one of the following values: - * @arg @ref RISAF_REGION_1 - * @arg @ref RISAF_REGION_2 - * @arg @ref RISAF_REGION_3 - * @arg @ref RISAF_REGION_4 - * @arg @ref RISAF_REGION_5 - * @arg @ref RISAF_REGION_6 - * @arg @ref RISAF_REGION_7 - * @arg @ref RISAF_REGION_8 - * @arg @ref RISAF_REGION_9 - * @arg @ref RISAF_REGION_10 - * @arg @ref RISAF_REGION_11 - * @arg @ref RISAF_REGION_12 - * @arg @ref RISAF_REGION_13 - * @arg @ref RISAF_REGION_14 - * @arg @ref RISAF_REGION_15 - * @param SubRegion specifies the RISAB Subregion index - * This parameter can be one of the following values: - * @arg @ref RISAF_SUBREGION_A - * @arg @ref RISAF_SUBREGION_B - * @param pConfig Pointer on RISAF Base Region configuration structure - * @retval None - */ -void HAL_RIF_RISAF_ConfigSubRegion(RISAF_TypeDef *RISAFx, uint32_t Region, uint32_t SubRegion, - const RISAF_SubRegionConfig_t *pConfig) -{ - uint32_t cid; - - /* Check the parameters */ - assert_param(pConfig != (void *)NULL); - assert_param(IS_RISAF_INSTANCE(RISAFx)); - assert_param(IS_RISAF_REGION(Region)); - assert_param(IS_RISAF_MAX_REGION(RISAFx, Region)); - assert_param(IS_RISAF_SUBREGION(SubRegion)); - assert_param(IS_RISAF_FILTERING(pConfig->Filtering)); - assert_param(IS_RIF_LOCK_STATE(pConfig->Lock)); - - /* Convert mask into bit position */ - cid = POSITION_VAL(pConfig->CID); - - if (SubRegion == RISAF_SUBREGION_A) - { - if (pConfig->Filtering == RISAF_FILTER_DISABLE) - { - RISAFx->REG[Region].ACFGR &= (~(RISAF_FILTER_ENABLE | RISAF_REGx_zCFGR_RLOCK)); - RISAFx->REG[Region].ACFGR |= (pConfig->Lock << RISAF_REGx_zCFGR_RLOCK_Pos); - } - else - { - /* Check the parameters */ - assert_param(IS_RISAF_READ_WRITE(pConfig->ReadWrite)); - assert_param(IS_RIF_SEC_PRIV_ATTRIBUTE(pConfig->SecPriv)); - assert_param(IS_RISAF_GRANULARITY(RISAFx, pConfig->StartAddress)); - assert_param(IS_RISAF_LIMIT_ADDRESS_SPACE_SIZE(RISAFx, pConfig->StartAddress)); - assert_param(IS_RISAF_GRANULARITY(RISAFx, (pConfig->EndAddress + 1U))); - assert_param(IS_RISAF_LIMIT_ADDRESS_SPACE_SIZE(RISAFx, pConfig->EndAddress)); - assert_param(pConfig->StartAddress < pConfig->EndAddress); - - RISAFx->REG[Region].ASTARTR = pConfig->StartAddress; - RISAFx->REG[Region].AENDR = pConfig->EndAddress; - RISAFx->REG[Region].ACFGR = (pConfig->Filtering | (pConfig->Lock << RISAF_REGx_zCFGR_RLOCK_Pos) - | (cid << RISAF_REGx_zCFGR_SRCID_Pos) | (pConfig->SecPriv << RISAF_REGx_zCFGR_SEC_Pos) - | (pConfig->ReadWrite)); - } - } - else - { - if (pConfig->Filtering == RISAF_FILTER_DISABLE) - { - RISAFx->REG[Region].BCFGR &= (~(RISAF_FILTER_ENABLE | RISAF_REGx_zCFGR_RLOCK)); - RISAFx->REG[Region].BCFGR |= (pConfig->Lock << RISAF_REGx_zCFGR_RLOCK_Pos); - } - else - { - /* Check the parameters */ - assert_param(IS_RISAF_READ_WRITE(pConfig->ReadWrite)); - assert_param(IS_RIF_SEC_PRIV_ATTRIBUTE(pConfig->SecPriv)); - assert_param(IS_RISAF_GRANULARITY(RISAFx, pConfig->StartAddress)); - assert_param(IS_RISAF_LIMIT_ADDRESS_SPACE_SIZE(RISAFx, pConfig->StartAddress)); - assert_param(IS_RISAF_GRANULARITY(RISAFx, (pConfig->EndAddress + 1U))); - assert_param(IS_RISAF_LIMIT_ADDRESS_SPACE_SIZE(RISAFx, pConfig->EndAddress)); - assert_param(pConfig->StartAddress < pConfig->EndAddress); - - RISAFx->REG[Region].BSTARTR = pConfig->StartAddress; - RISAFx->REG[Region].BENDR = pConfig->EndAddress; - RISAFx->REG[Region].BCFGR = (pConfig->Filtering | (pConfig->Lock << RISAF_REGx_zCFGR_RLOCK_Pos) - | (cid << RISAF_REGx_zCFGR_SRCID_Pos) | (pConfig->SecPriv << RISAF_REGx_zCFGR_SEC_Pos) - | (pConfig->ReadWrite)); - } - } -} - -/** - * @brief Get the configuration of a RISAF Subregion. - * @param RISAFx specifies the RISAF instance. - * This parameter is one of the RISAF instances defined in the CMSIS. - * @param Region specifies the RISAF region index - * This parameter can be one one of the following values: - * @arg @ref RISAF_REGION_1 - * @arg @ref RISAF_REGION_2 - * @arg @ref RISAF_REGION_3 - * @arg @ref RISAF_REGION_4 - * @arg @ref RISAF_REGION_5 - * @arg @ref RISAF_REGION_6 - * @arg @ref RISAF_REGION_7 - * @arg @ref RISAF_REGION_8 - * @arg @ref RISAF_REGION_9 - * @arg @ref RISAF_REGION_10 - * @arg @ref RISAF_REGION_11 - * @arg @ref RISAF_REGION_12 - * @arg @ref RISAF_REGION_13 - * @arg @ref RISAF_REGION_14 - * @arg @ref RISAF_REGION_15 - * @param SubRegion specifies the RISAB Subregion index - * This parameter can be one of the following values: - * @arg @ref RISAF_SUBREGION_A - * @arg @ref RISAF_SUBREGION_B - * @param pConfig Pointer on RISAF Base Region configuration structure - * @retval None - */ -void HAL_RIF_RISAF_GetConfigSubRegion(const RISAF_TypeDef *RISAFx, uint32_t Region, uint32_t SubRegion, - RISAF_SubRegionConfig_t *pConfig) -{ - uint32_t cid; - uint32_t cfgr_reg; - - /* Check the parameters */ - assert_param(pConfig != (void *)NULL); - assert_param(IS_RISAF_INSTANCE(RISAFx)); - assert_param(IS_RISAF_REGION(Region)); - assert_param(IS_RISAF_MAX_REGION(RISAFx, Region)); - assert_param(IS_RISAF_SUBREGION(SubRegion)); - - if (SubRegion == RISAF_SUBREGION_A) - { - cfgr_reg = RISAFx->REG[Region].ACFGR; - pConfig->StartAddress = RISAFx->REG[Region].ASTARTR; - pConfig->EndAddress = RISAFx->REG[Region].AENDR; - } - else - { - cfgr_reg = RISAFx->REG[Region].BCFGR; - pConfig->StartAddress = RISAFx->REG[Region].BSTARTR; - pConfig->EndAddress = RISAFx->REG[Region].BENDR; - } - - pConfig->Filtering = (cfgr_reg & RISAF_REGx_zCFGR_SREN); - cid = ((cfgr_reg & RISAF_REGx_zCFGR_SRCID) >> RISAF_REGx_zCFGR_SRCID_Pos); - pConfig->CID = (1UL << cid); - pConfig->SecPriv = ((cfgr_reg & (RISAF_REGx_zCFGR_PRIV | RISAF_REGx_zCFGR_SEC)) >> RISAF_REGx_zCFGR_SEC_Pos); - pConfig->ReadWrite = (cfgr_reg & (RISAF_REGx_zCFGR_WREN | RISAF_REGx_zCFGR_RDEN)); - pConfig->Lock = ((cfgr_reg & RISAF_REGx_zCFGR_RLOCK) >> RISAF_REGx_zCFGR_RLOCK_Pos); -} - -#if defined(CPU_AS_TRUSTED_DOMAIN) -/** - * @brief Get the error detected by the RISAF control block, - * the illegal access data and clear related flags. - * Error information can be illegal access or control access type. In case of an illegal access detection, the - * error information is: - * - responsible CID; - * - security access type; - * - privilege access type; - * - read (fetch) or write access type; - * - targeted address. - * @note This API is protected by the Trusted Domain compilation directive. - * @param RISAFx specifies the RISAF instance. - * This parameter is one of the RISAF instances defined in the CMSIS. - * @param IllegalAccess Pointer on illegal access structure - * @retval None - */ -void HAL_RIF_RISAF_GetIllegalAccess(RISAF_TypeDef *RISAFx, RISAF_IllegalAccess_t *IllegalAccess) -{ - uint32_t cid; - uint32_t secpriv; - - /* Check the parameters */ - assert_param(IllegalAccess != (void *)NULL); - assert_param(IS_RISAF_INSTANCE(RISAFx)); - - /* Get illegal access type */ - IllegalAccess->ErrorType = (RISAFx->IASR & (RISAF_IASR_IAEF | RISAF_IASR_CAEF)); - - if (IllegalAccess->ErrorType != RISAF_ILLEGAL_ACCESS_NONE) - { - /* Get illegal access data */ - cid = (RISAFx->IAR->IAESR & RISAF_IAESR_IACID); - IllegalAccess->Data.CID = (1UL << cid); - secpriv = ((RISAFx->IAR->IAESR & (RISAF_IAESR_IASEC | RISAF_IAESR_IAPRIV)) >> RISAF_IAESR_IAPRIV_Pos); - IllegalAccess->Data.SecPriv = ((secpriv >> 1UL) | (secpriv << 1UL)) & 3UL; - IllegalAccess->Data.AccessType = ((RISAFx->IAR->IAESR & RISAF_IAESR_IANRW) >> RISAF_IAESR_IANRW_Pos); - - if ((IllegalAccess->ErrorType & RISAF_ILLEGAL_ACCESS) != 0U) - { - IllegalAccess->Data.Address = RISAFx->IAR->IADDR; - } - else - { - IllegalAccess->Data.Address = 0U; - } - - /* Clear flags */ - RISAFx->IACR = (RISAF_IACR_IAEF | RISAF_IACR_CAEF); - } -} -#endif /* defined(CPU_AS_TRUSTED_DOMAIN) */ -/** - * @} - */ - -/** @defgroup RIF_Exported_Functions_Group6 IAC Configuration functions - * @brief IAC Configuration functions - * -@verbatim - ============================================================================== - ##### IAC Configuration functions ##### - ============================================================================== - [..] - This section provides functions allowing to configure IAC - IAC is Illegal Access Controller -@endverbatim - * @{ - */ -#if defined(CPU_AS_TRUSTED_DOMAIN) && defined(CPU_IN_SECURE_STATE) -/** - * @brief Enable interrupt generation on illegal access detection on peripheral or memory access. - * @note This API is protected by the Trusted Domain compilation directive. - * @note This API is protected by the TrustZone Enabled compilation directive. - * @param PeriphId specifies the index of the bus slave. - * This parameter can be one of @ref RIF_PERIPHERAL_INDEX - * bits[31:28] define the register index a peripheral belongs to, value from 0 to 5 - * bits[4:0] define the bit position within the register, value from 0 to 31 - * @retval None - */ -void HAL_RIF_IAC_EnableIT(uint32_t PeriphId) -{ - __IO uint32_t *p_interrupt_reg; - - /* Check parameters */ - assert_param(IS_RIF_RISC_PERIPH_INDEX(PeriphId) || IS_RIF_AWARE_PERIPH_INDEX(PeriphId)); - - p_interrupt_reg = &(IAC->IER[PeriphId >> RIF_PERIPH_REG_SHIFT]); - *p_interrupt_reg |= (1UL << (PeriphId & RIF_PERIPH_BIT_POSITION)); - -} - -/** - * @brief Disable interrupt generation on illegal access detection on peripheral or memory access. - * @note This API is protected by the Trusted Domain compilation directive. - * @param PeriphId specifies the index of the bus slave. - * This parameter can be one of @ref RIF_PERIPHERAL_INDEX - * bits[31:28] define the register index a peripheral belongs to, value from 0 to 5 - * bits[4:0] define the bit position within the register, value from 0 to 31 - * @retval None - */ -void HAL_RIF_IAC_DisableIT(uint32_t PeriphId) -{ - __IO uint32_t *p_interrupt_reg; - - /* Check parameters */ - assert_param(IS_RIF_RISC_PERIPH_INDEX(PeriphId) || IS_RIF_AWARE_PERIPH_INDEX(PeriphId)); - - p_interrupt_reg = &(IAC->IER[PeriphId >> RIF_PERIPH_REG_SHIFT]); - *p_interrupt_reg &= (~(1UL << (PeriphId & RIF_PERIPH_BIT_POSITION))); -} - -/** - * @brief Get illegal access detection flag. - * @note This API is protected by the Trusted Domain compilation directive. - * @param PeriphId specifies the index of the bus slave. - * This parameter can be one of @ref RIF_PERIPHERAL_INDEX - * bits[31:28] define the register index a peripheral belongs to, value from 0 to 5 - * bits[4:0] define the bit position within the register, value from 0 to 31 - * @retval Detection flag value - */ -uint32_t HAL_RIF_IAC_GetFlag(uint32_t PeriphId) -{ - uint32_t interrupt_flag; - const __IO uint32_t *p_interrupt_reg; - uint32_t shift_var; - - /* Check parameters */ - assert_param(IS_RIF_RISC_PERIPH_INDEX(PeriphId) || IS_RIF_AWARE_PERIPH_INDEX(PeriphId)); - - shift_var = (PeriphId & RIF_PERIPH_BIT_POSITION); - p_interrupt_reg = &(IAC->ISR[PeriphId >> RIF_PERIPH_REG_SHIFT]); - interrupt_flag = ((*p_interrupt_reg & (1UL << shift_var)) >> shift_var); - - return interrupt_flag; -} - -/** - * @brief Clear illegal access detection flag. - * @note This API is protected by the Trusted Domain compilation directive. - * @param PeriphId specifies the index of the bus slave. - * This parameter can be one of @ref RIF_PERIPHERAL_INDEX - * bits[31:28] define the register index a peripheral belongs to, value from 0 to 5 - * bits[4:0] define the bit position within the register, value from 0 to 31 - * @retval None - */ -void HAL_RIF_IAC_ClearFlag(uint32_t PeriphId) -{ - __IO uint32_t *p_interrupt_reg; - - /* Check parameters */ - assert_param(IS_RIF_RISC_PERIPH_INDEX(PeriphId) || IS_RIF_AWARE_PERIPH_INDEX(PeriphId)); - - p_interrupt_reg = &(IAC->ICR[PeriphId >> RIF_PERIPH_REG_SHIFT]); - *p_interrupt_reg = (1UL << (PeriphId & RIF_PERIPH_BIT_POSITION)); -} - -/** - * @brief Parse all pending flags and call callback when necessary. - * @note This API is protected by the Trusted Domain compilation directive. - * @retval None - */ -void HAL_RIF_IRQHandler(void) -{ - uint32_t reg_index; - uint32_t flag_mask; - uint32_t position; - uint32_t periph_id; - - for (reg_index = 0 ; reg_index < (RIF_PERIPH_IAC_REG_MAX + 1U) ; reg_index++) - { - flag_mask = IAC->ISR[reg_index]; - - position = 0U; - while ((flag_mask >> position) != 0U) - { - if ((flag_mask & (1UL << position)) != 0U) - { - periph_id = ((reg_index << RIF_PERIPH_REG_SHIFT) | position); - HAL_RIF_IAC_ClearFlag(periph_id); - HAL_RIF_ILA_Callback(periph_id); - } - position++; - } - } -} - -/** - * @brief RIF illegal access callback. - * @note This API is protected by the Trusted Domain compilation directive. - * @note This API is protected by the TrustZone Enabled compilation directive. - * @param PeriphId specifies the index of the bus slave. - * This parameter can be one of @ref RIF_PERIPHERAL_INDEX - * bits[31:28] define the register index a peripheral belongs to, value from 0 to 5 - * bits[4:0] define the bit position within the register, value from 0 to 31 - * @retval None - */ -__weak void HAL_RIF_ILA_Callback(uint32_t PeriphId) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(PeriphId); - - /* NOTE: This function should not be modified, when the callback is needed, - the HAL_RIF_ILA_Callback could be implemented in the user file - */ -} -#endif /* CPU_AS_TRUSTED_DOMAIN && CPU_IN_SECURE_STATE */ -/** - * @} - */ - -/** - * @} - */ - -#endif /* HAL_RIF_MODULE_ENABLED */ - -/** - * @} - */ - -/** - * @} - */ Index: trunk/firmware/FSBL/CubeMX/Drivers/STM32N6xx_HAL_Driver/Src/stm32n6xx_hal_sd.c =================================================================== --- trunk/firmware/FSBL/CubeMX/Drivers/STM32N6xx_HAL_Driver/Src/stm32n6xx_hal_sd.c (revision 37) +++ (revision ) @@ -1,4089 +1,0 @@ -/** - ****************************************************************************** - * @file stm32n6xx_hal_sd.c - * @author MCD Application Team - * @brief SD card HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the Secure Digital (SD) peripheral: - * + Initialization and de-initialization functions - * + IO operation functions - * + Peripheral Control functions - * + Peripheral State functions - * - ****************************************************************************** - * @attention - * - * Copyright (c) 2023 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - @verbatim - ============================================================================== - ##### How to use this driver ##### - ============================================================================== - [..] - This driver implements a high level communication layer for read and write from/to - this memory. The needed STM32 hardware resources (SDMMC and GPIO) are performed by - the user in HAL_SD_MspInit() function (MSP layer). - Basically, the MSP layer configuration should be the same as we provide in the - examples. - You can easily tailor this configuration according to hardware resources. - - [..] - This driver is a generic layered driver for SDMMC memories which uses the HAL - SDMMC driver functions to interface with SD and uSD cards devices. - It is used as follows: - - (#)Initialize the SDMMC low level resources by implementing the HAL_SD_MspInit() API: - (##) Enable the SDMMC interface clock using __HAL_RCC_SDMMC_CLK_ENABLE(); - (##) SDMMC pins configuration for SD card - (+++) Enable the clock for the SDMMC GPIOs using the functions __HAL_RCC_GPIOx_CLK_ENABLE(); - (+++) Configure these SDMMC pins as alternate function pull-up using HAL_GPIO_Init() - and according to your pin assignment; - (##) NVIC configuration if you need to use interrupt process (HAL_SD_ReadBlocks_IT() - and HAL_SD_WriteBlocks_IT() APIs). - (+++) Configure the SDMMC interrupt priorities using function HAL_NVIC_SetPriority(); - (+++) Enable the NVIC SDMMC IRQs using function HAL_NVIC_EnableIRQ() - (+++) SDMMC interrupts are managed using the macros __HAL_SD_ENABLE_IT() - and __HAL_SD_DISABLE_IT() inside the communication process. - (+++) SDMMC interrupts pending bits are managed using the macros __HAL_SD_GET_IT() - and __HAL_SD_CLEAR_IT() - (##) No general propose DMA Configuration is needed, an Internal DMA for SDMMC Peripheral are used. - - (#) At this stage, you can perform SD read/write/erase operations after SD card initialization - - *** SD Card Initialization and configuration *** - ================================================ - [..] - To initialize the SD Card, use the HAL_SD_Init() function. It Initializes - SDMMC Peripheral(STM32 side) and the SD Card, and put it into StandBy State (Ready for data transfer). - This function provide the following operations: - - (#) Apply the SD Card initialization process at 400KHz and check the SD Card - type (Standard Capacity or High Capacity). You can change or adapt this - frequency by adjusting the "ClockDiv" field. - The SD Card frequency (SDMMC_CK) is computed as follows: - - SDMMC_CK = SDMMCCLK / (2 * ClockDiv) - - In initialization mode and according to the SD Card standard, - make sure that the SDMMC_CK frequency doesn't exceed 400KHz. - - This phase of initialization is done through SDMMC_Init() and - SDMMC_PowerState_ON() SDMMC low level APIs. - - (#) Initialize the SD card. The API used is HAL_SD_InitCard(). - This phase allows the card initialization and identification - and check the SD Card type (Standard Capacity or High Capacity) - The initialization flow is compatible with SD standard. - - This API (HAL_SD_InitCard()) could be used also to reinitialize the card in case - of plug-off plug-in. - - (#) Configure the SD Card Data transfer frequency. You can change or adapt this - frequency by adjusting the "ClockDiv" field. - In transfer mode and according to the SD Card standard, make sure that the - SDMMC_CK frequency doesn't exceed 25MHz and 100MHz in High-speed mode switch. - - (#) Select the corresponding SD Card according to the address read with the step 2. - - (#) Configure the SD Card in wide bus mode: 4-bits data. - - *** SD Card Read operation *** - ============================== - [..] - (+) You can read from SD card in polling mode by using function HAL_SD_ReadBlocks(). - This function support only 512-bytes block length (the block size should be - chosen as 512 bytes). - You can choose either one block read operation or multiple block read operation - by adjusting the "NumberOfBlocks" parameter. - After this, you have to ensure that the transfer is done correctly. The check is done - through HAL_SD_GetCardState() function for SD card state. - - (+) You can read from SD card in DMA mode by using function HAL_SD_ReadBlocks_DMA(). - This function support only 512-bytes block length (the block size should be - chosen as 512 bytes). - You can choose either one block read operation or multiple block read operation - by adjusting the "NumberOfBlocks" parameter. - After this, you have to ensure that the transfer is done correctly. The check is done - through HAL_SD_GetCardState() function for SD card state. - You could also check the DMA transfer process through the SD Rx interrupt event. - - (+) You can read from SD card in Interrupt mode by using function HAL_SD_ReadBlocks_IT(). - This function support only 512-bytes block length (the block size should be - chosen as 512 bytes). - You can choose either one block read operation or multiple block read operation - by adjusting the "NumberOfBlocks" parameter. - After this, you have to ensure that the transfer is done correctly. The check is done - through HAL_SD_GetCardState() function for SD card state. - You could also check the IT transfer process through the SD Rx interrupt event. - - *** SD Card Write operation *** - =============================== - [..] - (+) You can write to SD card in polling mode by using function HAL_SD_WriteBlocks(). - This function support only 512-bytes block length (the block size should be - chosen as 512 bytes). - You can choose either one block read operation or multiple block read operation - by adjusting the "NumberOfBlocks" parameter. - After this, you have to ensure that the transfer is done correctly. The check is done - through HAL_SD_GetCardState() function for SD card state. - - (+) You can write to SD card in DMA mode by using function HAL_SD_WriteBlocks_DMA(). - This function support only 512-bytes block length (the block size should be - chosen as 512 bytes). - You can choose either one block read operation or multiple block read operation - by adjusting the "NumberOfBlocks" parameter. - After this, you have to ensure that the transfer is done correctly. The check is done - through HAL_SD_GetCardState() function for SD card state. - You could also check the DMA transfer process through the SD Tx interrupt event. - - (+) You can write to SD card in Interrupt mode by using function HAL_SD_WriteBlocks_IT(). - This function support only 512-bytes block length (the block size should be - chosen as 512 bytes). - You can choose either one block read operation or multiple block read operation - by adjusting the "NumberOfBlocks" parameter. - After this, you have to ensure that the transfer is done correctly. The check is done - through HAL_SD_GetCardState() function for SD card state. - You could also check the IT transfer process through the SD Tx interrupt event. - - *** SD card status *** - ====================== - [..] - (+) The SD Status contains status bits that are related to the SD Memory - Card proprietary features. To get SD card status use the HAL_SD_GetCardStatus(). - - *** SD card information *** - =========================== - [..] - (+) To get SD card information, you can use the function HAL_SD_GetCardInfo(). - It returns useful information about the SD card such as block size, card type, - block number ... - - *** SD card CSD register *** - ============================ - (+) The HAL_SD_GetCardCSD() API allows to get the parameters of the CSD register. - Some of the CSD parameters are useful for card initialization and identification. - - *** SD card CID register *** - ============================ - (+) The HAL_SD_GetCardCID() API allows to get the parameters of the CID register. - Some of the CSD parameters are useful for card initialization and identification. - - *** SD HAL driver macros list *** - ================================== - [..] - Below the list of most used macros in SD HAL driver. - - (+) __HAL_SD_ENABLE_IT: Enable the SD device interrupt - (+) __HAL_SD_DISABLE_IT: Disable the SD device interrupt - (+) __HAL_SD_GET_FLAG:Check whether the specified SD flag is set or not - (+) __HAL_SD_CLEAR_FLAG: Clear the SD's pending flags - - (@) You can refer to the SD HAL driver header file for more useful macros - - *** Callback registration *** - ============================================= - [..] - The compilation define USE_HAL_SD_REGISTER_CALLBACKS when set to 1 - allows the user to configure dynamically the driver callbacks. - - Use Functions HAL_SD_RegisterCallback() to register a user callback, - it allows to register following callbacks: - (+) TxCpltCallback : callback when a transmission transfer is completed. - (+) RxCpltCallback : callback when a reception transfer is completed. - (+) ErrorCallback : callback when error occurs. - (+) AbortCpltCallback : callback when abort is completed. - (+) Read_DMADblBuf0CpltCallback : callback when the DMA reception of first buffer is completed. - (+) Read_DMADblBuf1CpltCallback : callback when the DMA reception of second buffer is completed. - (+) Write_DMADblBuf0CpltCallback : callback when the DMA transmission of first buffer is completed. - (+) Write_DMADblBuf1CpltCallback : callback when the DMA transmission of second buffer is completed. - (+) MspInitCallback : SD MspInit. - (+) MspDeInitCallback : SD MspDeInit. - This function takes as parameters the HAL peripheral handle, the Callback ID - and a pointer to the user callback function. - For specific callbacks TransceiverCallback use dedicated register callbacks: - respectively HAL_SD_RegisterTransceiverCallback(). - - Use function HAL_SD_UnRegisterCallback() to reset a callback to the default - weak (overridden) function. It allows to reset following callbacks: - (+) TxCpltCallback : callback when a transmission transfer is completed. - (+) RxCpltCallback : callback when a reception transfer is completed. - (+) ErrorCallback : callback when error occurs. - (+) AbortCpltCallback : callback when abort is completed. - (+) Read_DMALnkLstBufCpltCallback : callback when the DMA reception of linked list node buffer is completed. - (+) Write_DMALnkLstBufCpltCallback : callback when the DMA transmission of linked list node buffer is completed. - (+) MspInitCallback : SD MspInit. - (+) MspDeInitCallback : SD MspDeInit. - This function) takes as parameters the HAL peripheral handle and the Callback ID. - For specific callbacks TransceiverCallback use dedicated unregister callbacks: - respectively HAL_SD_UnRegisterTransceiverCallback(). - - By default, after the HAL_SD_Init and if the state is HAL_SD_STATE_RESET - all callbacks are reset to the corresponding legacy weak (overridden) functions. - Exception done for MspInit and MspDeInit callbacks that are respectively - reset to the legacy weak (overridden) functions in the HAL_SD_Init - and HAL_SD_DeInit only when these callbacks are null (not registered beforehand). - If not, MspInit or MspDeInit are not null, the HAL_SD_Init and HAL_SD_DeInit - keep and use the user MspInit/MspDeInit callbacks (registered beforehand) - - Callbacks can be registered/unregistered in READY state only. - Exception done for MspInit/MspDeInit callbacks that can be registered/unregistered - in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used - during the Init/DeInit. - In that case first register the MspInit/MspDeInit user callbacks - using HAL_SD_RegisterCallback before calling HAL_SD_DeInit - or HAL_SD_Init function. - - When The compilation define USE_HAL_SD_REGISTER_CALLBACKS is set to 0 or - not defined, the callback registering feature is not available - and weak (overridden) callbacks are used. - - @endverbatim - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32n6xx_hal.h" - -/** @addtogroup STM32N6xx_HAL_Driver - * @{ - */ - -/** @addtogroup SD - * @{ - */ - -#if defined (SDMMC1) || defined (SDMMC2) -#ifdef HAL_SD_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/** @addtogroup SD_Private_Defines - * @{ - */ -/* Frequencies used in the driver for clock divider calculation */ -#define SD_INIT_FREQ 400000U /* Initialization phase : 400 kHz max */ -#define SD_NORMAL_SPEED_FREQ 25000000U /* Normal speed phase : 25 MHz max */ -#define SD_HIGH_SPEED_FREQ 50000000U /* High speed phase : 50 MHz max */ -/* Private macro -------------------------------------------------------------*/ -#if defined (DLYB_SDMMC1) && defined (DLYB_SDMMC2) -#define SD_GET_DLYB_INSTANCE(SDMMC_INSTANCE) (((SDMMC_INSTANCE) == SDMMC1)? \ - DLYB_SDMMC1 : DLYB_SDMMC2 ) -#elif defined (DLYB_SDMMC1) -#define SD_GET_DLYB_INSTANCE(SDMMC_INSTANCE) ( DLYB_SDMMC1 ) -#endif /* (DLYB_SDMMC1) && defined (DLYB_SDMMC2) */ - -/** - * @} - */ - -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ -/** @defgroup SD_Private_Functions SD Private Functions - * @{ - */ -static uint32_t SD_InitCard(SD_HandleTypeDef *hsd); -static uint32_t SD_PowerON(SD_HandleTypeDef *hsd); -static uint32_t SD_SendSDStatus(SD_HandleTypeDef *hsd, uint32_t *pSDstatus); -static uint32_t SD_SendStatus(SD_HandleTypeDef *hsd, uint32_t *pCardStatus); -static uint32_t SD_WideBus_Enable(SD_HandleTypeDef *hsd); -static uint32_t SD_WideBus_Disable(SD_HandleTypeDef *hsd); -static uint32_t SD_FindSCR(SD_HandleTypeDef *hsd, uint32_t *pSCR); -static void SD_PowerOFF(SD_HandleTypeDef *hsd); -static void SD_Write_IT(SD_HandleTypeDef *hsd); -static void SD_Read_IT(SD_HandleTypeDef *hsd); -static uint32_t SD_SwitchSpeed(SD_HandleTypeDef *hsd, uint32_t SwitchSpeedMode); -#if (USE_SD_TRANSCEIVER != 0U) -static uint32_t SD_UltraHighSpeed(SD_HandleTypeDef *hsd, uint32_t UltraHighSpeedMode); -static uint32_t SD_DDR_Mode(SD_HandleTypeDef *hsd); -#endif /* USE_SD_TRANSCEIVER */ -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup SD_Exported_Functions - * @{ - */ - -/** @addtogroup SD_Exported_Functions_Group1 - * @brief Initialization and de-initialization functions - * -@verbatim - ============================================================================== - ##### Initialization and de-initialization functions ##### - ============================================================================== - [..] - This section provides functions allowing to initialize/de-initialize the SD - card device to be ready for use. - -@endverbatim - * @{ - */ - -/** - * @brief Initializes the SD according to the specified parameters in the - SD_HandleTypeDef and create the associated handle. - * @param hsd: Pointer to the SD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SD_Init(SD_HandleTypeDef *hsd) -{ - HAL_SD_CardStatusTypeDef CardStatus; - uint32_t speedgrade; - uint32_t unitsize; - uint32_t tickstart; - - /* Check the SD handle allocation */ - if (hsd == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_SDMMC_ALL_INSTANCE(hsd->Instance)); - assert_param(IS_SDMMC_CLOCK_EDGE(hsd->Init.ClockEdge)); - assert_param(IS_SDMMC_CLOCK_POWER_SAVE(hsd->Init.ClockPowerSave)); - assert_param(IS_SDMMC_BUS_WIDE(hsd->Init.BusWide)); - assert_param(IS_SDMMC_HARDWARE_FLOW_CONTROL(hsd->Init.HardwareFlowControl)); - assert_param(IS_SDMMC_CLKDIV(hsd->Init.ClockDiv)); - - if (hsd->State == HAL_SD_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - hsd->Lock = HAL_UNLOCKED; - -#if (USE_SD_TRANSCEIVER != 0U) - /* Force SDMMC_TRANSCEIVER_PRESENT for Legacy usage */ - if (hsd->Init.TranceiverPresent == SDMMC_TRANSCEIVER_UNKNOWN) - { - hsd->Init.TranceiverPresent = SDMMC_TRANSCEIVER_PRESENT; - } -#endif /*USE_SD_TRANSCEIVER */ -#if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U) - /* Reset Callback pointers in HAL_SD_STATE_RESET only */ - hsd->TxCpltCallback = HAL_SD_TxCpltCallback; - hsd->RxCpltCallback = HAL_SD_RxCpltCallback; - hsd->ErrorCallback = HAL_SD_ErrorCallback; - hsd->AbortCpltCallback = HAL_SD_AbortCallback; - hsd->Read_DMALnkLstBufCpltCallback = HAL_SDEx_Read_DMALnkLstBufCpltCallback; - hsd->Write_DMALnkLstBufCpltCallback = HAL_SDEx_Write_DMALnkLstBufCpltCallback; -#if (USE_SD_TRANSCEIVER != 0U) - if (hsd->Init.TranceiverPresent == SDMMC_TRANSCEIVER_PRESENT) - { - hsd->DriveTransceiver_1_8V_Callback = HAL_SD_DriveTransceiver_1_8V_Callback; - } -#endif /* USE_SD_TRANSCEIVER */ - - if (hsd->MspInitCallback == NULL) - { - hsd->MspInitCallback = HAL_SD_MspInit; - } - - /* Init the low level hardware */ - hsd->MspInitCallback(hsd); -#else - /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */ - HAL_SD_MspInit(hsd); -#endif /* USE_HAL_SD_REGISTER_CALLBACKS */ - } - - hsd->State = HAL_SD_STATE_PROGRAMMING; - - /* Initialize the Card parameters */ - if (HAL_SD_InitCard(hsd) != HAL_OK) - { - return HAL_ERROR; - } - - if (HAL_SD_GetCardStatus(hsd, &CardStatus) != HAL_OK) - { - return HAL_ERROR; - } - /* Get Initial Card Speed from Card Status*/ - speedgrade = CardStatus.UhsSpeedGrade; - unitsize = CardStatus.UhsAllocationUnitSize; - if ((hsd->SdCard.CardType == CARD_SDHC_SDXC) && ((speedgrade != 0U) || (unitsize != 0U))) - { - hsd->SdCard.CardSpeed = CARD_ULTRA_HIGH_SPEED; - } - else - { - if (hsd->SdCard.CardType == CARD_SDHC_SDXC) - { - hsd->SdCard.CardSpeed = CARD_HIGH_SPEED; - } - else - { - hsd->SdCard.CardSpeed = CARD_NORMAL_SPEED; - } - - } - /* Configure the bus wide */ - if (HAL_SD_ConfigWideBusOperation(hsd, hsd->Init.BusWide) != HAL_OK) - { - return HAL_ERROR; - } - - /* Verify that SD card is ready to use after Initialization */ - tickstart = HAL_GetTick(); - while ((HAL_SD_GetCardState(hsd) != HAL_SD_CARD_TRANSFER)) - { - if ((HAL_GetTick() - tickstart) >= SDMMC_SWDATATIMEOUT) - { - hsd->ErrorCode = HAL_SD_ERROR_TIMEOUT; - hsd->State = HAL_SD_STATE_READY; - return HAL_TIMEOUT; - } - } - - /* Initialize the error code */ - hsd->ErrorCode = HAL_SD_ERROR_NONE; - - /* Initialize the SD operation */ - hsd->Context = SD_CONTEXT_NONE; - - /* Initialize the SD state */ - hsd->State = HAL_SD_STATE_READY; - - return HAL_OK; -} - -/** - * @brief Initializes the SD Card. - * @param hsd: Pointer to SD handle - * @note This function initializes the SD card. It could be used when a card - re-initialization is needed. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SD_InitCard(SD_HandleTypeDef *hsd) -{ - uint32_t errorstate; - SD_InitTypeDef Init = {0U}; - uint32_t sdmmc_clk; - - /* Default SDMMC peripheral configuration for SD card initialization */ - Init.ClockEdge = SDMMC_CLOCK_EDGE_RISING; - Init.ClockPowerSave = SDMMC_CLOCK_POWER_SAVE_DISABLE; - Init.BusWide = SDMMC_BUS_WIDE_1B; - Init.HardwareFlowControl = SDMMC_HARDWARE_FLOW_CONTROL_DISABLE; - - /* Init Clock should be less or equal to 400Khz*/ - if (hsd->Instance == SDMMC1) - { - sdmmc_clk = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_SDMMC1); - } - else if (hsd->Instance == SDMMC2) - { - sdmmc_clk = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_SDMMC2); - } - else - { - sdmmc_clk = 0; - } - if (sdmmc_clk == 0U) - { - hsd->State = HAL_SD_STATE_READY; - hsd->ErrorCode = SDMMC_ERROR_INVALID_PARAMETER; - return HAL_ERROR; - } - if (sdmmc_clk <= SD_INIT_FREQ) - { - Init.ClockDiv = 0U; - } - else - { - Init.ClockDiv = (sdmmc_clk / (2U * SD_INIT_FREQ)) + 1U; - } - -#if (USE_SD_TRANSCEIVER != 0U) - Init.TranceiverPresent = hsd->Init.TranceiverPresent; - - if (hsd->Init.TranceiverPresent == SDMMC_TRANSCEIVER_PRESENT) - { - /* Set Transceiver polarity */ - hsd->Instance->POWER |= SDMMC_POWER_DIRPOL; - } -#elif defined (USE_SD_DIRPOL) - /* Set Transceiver polarity */ - hsd->Instance->POWER |= SDMMC_POWER_DIRPOL; -#endif /* USE_SD_TRANSCEIVER */ - - /* Initialize SDMMC peripheral interface with default configuration */ - (void)SDMMC_Init(hsd->Instance, Init); - - /* Set Power State to ON */ - (void)SDMMC_PowerState_ON(hsd->Instance); - - /* wait 74 Cycles: required power up waiting time before starting - the SD initialization sequence */ - if (Init.ClockDiv != 0U) - { - sdmmc_clk = sdmmc_clk / (2U * Init.ClockDiv); - } - - if (sdmmc_clk != 0U) - { - HAL_Delay(1U + (74U * 1000U / (sdmmc_clk))); - } - - /* Identify card operating voltage */ - errorstate = SD_PowerON(hsd); - if (errorstate != HAL_SD_ERROR_NONE) - { - hsd->State = HAL_SD_STATE_READY; - hsd->ErrorCode |= errorstate; - return HAL_ERROR; - } - - /* Card initialization */ - errorstate = SD_InitCard(hsd); - if (errorstate != HAL_SD_ERROR_NONE) - { - hsd->State = HAL_SD_STATE_READY; - hsd->ErrorCode |= errorstate; - return HAL_ERROR; - } - - /* Set Block Size for Card */ - errorstate = SDMMC_CmdBlockLength(hsd->Instance, BLOCKSIZE); - if (errorstate != HAL_SD_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_STATIC_FLAGS); - hsd->ErrorCode |= errorstate; - hsd->State = HAL_SD_STATE_READY; - return HAL_ERROR; - } - - return HAL_OK; -} - -/** - * @brief De-Initializes the SD card. - * @param hsd: Pointer to SD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SD_DeInit(SD_HandleTypeDef *hsd) -{ - /* Check the SD handle allocation */ - if (hsd == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_SDMMC_ALL_INSTANCE(hsd->Instance)); - - hsd->State = HAL_SD_STATE_BUSY; - -#if (USE_SD_TRANSCEIVER != 0U) - /* Deactivate the 1.8V Mode */ - if (hsd->Init.TranceiverPresent == SDMMC_TRANSCEIVER_PRESENT) - { -#if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U) - if (hsd->DriveTransceiver_1_8V_Callback == NULL) - { - hsd->DriveTransceiver_1_8V_Callback = HAL_SD_DriveTransceiver_1_8V_Callback; - } - hsd->DriveTransceiver_1_8V_Callback(RESET); -#else - HAL_SD_DriveTransceiver_1_8V_Callback(RESET); -#endif /* USE_HAL_SD_REGISTER_CALLBACKS */ - } -#endif /* USE_SD_TRANSCEIVER */ - - /* Set SD power state to off */ - SD_PowerOFF(hsd); - -#if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U) - if (hsd->MspDeInitCallback == NULL) - { - hsd->MspDeInitCallback = HAL_SD_MspDeInit; - } - - /* DeInit the low level hardware */ - hsd->MspDeInitCallback(hsd); -#else - /* De-Initialize the MSP layer */ - HAL_SD_MspDeInit(hsd); -#endif /* USE_HAL_SD_REGISTER_CALLBACKS */ - - hsd->ErrorCode = HAL_SD_ERROR_NONE; - hsd->State = HAL_SD_STATE_RESET; - - return HAL_OK; -} - -/** - * @brief Initializes the SD MSP. - * @param hsd: Pointer to SD handle - * @retval None - */ -__weak void HAL_SD_MspInit(SD_HandleTypeDef *hsd) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hsd); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_SD_MspInit could be implemented in the user file - */ -} - -/** - * @brief De-Initialize SD MSP. - * @param hsd: Pointer to SD handle - * @retval None - */ -__weak void HAL_SD_MspDeInit(SD_HandleTypeDef *hsd) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hsd); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_SD_MspDeInit could be implemented in the user file - */ -} - -/** - * @} - */ - -/** @addtogroup SD_Exported_Functions_Group2 - * @brief Data transfer functions - * -@verbatim - ============================================================================== - ##### IO operation functions ##### - ============================================================================== - [..] - This subsection provides a set of functions allowing to manage the data - transfer from/to SD card. - -@endverbatim - * @{ - */ - -/** - * @brief Reads block(s) from a specified address in a card. The Data transfer - * is managed by polling mode. - * @note This API should be followed by a check on the card state through - * HAL_SD_GetCardState(). - * @param hsd: Pointer to SD handle - * @param pData: pointer to the buffer that will contain the received data - * @param BlockAdd: Block Address from where data is to be read - * @param NumberOfBlocks: Number of SD blocks to read - * @param Timeout: Specify timeout value - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SD_ReadBlocks(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, - uint32_t Timeout) -{ - SDMMC_DataInitTypeDef config; - uint32_t errorstate; - uint32_t tickstart = HAL_GetTick(); - uint32_t count; - uint32_t data; - uint32_t dataremaining; - uint32_t add = BlockAdd; - uint8_t *tempbuff = pData; - - if (NULL == pData) - { - hsd->ErrorCode |= HAL_SD_ERROR_PARAM; - return HAL_ERROR; - } - - if (hsd->State == HAL_SD_STATE_READY) - { - hsd->ErrorCode = HAL_SD_ERROR_NONE; - - if ((add + NumberOfBlocks) > (hsd->SdCard.LogBlockNbr)) - { - hsd->ErrorCode |= HAL_SD_ERROR_ADDR_OUT_OF_RANGE; - return HAL_ERROR; - } - - hsd->State = HAL_SD_STATE_BUSY; - - /* Initialize data control register */ - hsd->Instance->DCTRL = 0U; - - if (hsd->SdCard.CardType != CARD_SDHC_SDXC) - { - add *= BLOCKSIZE; - } - - /* Configure the SD DPSM (Data Path State Machine) */ - config.DataTimeOut = SDMMC_DATATIMEOUT; - config.DataLength = NumberOfBlocks * BLOCKSIZE; - config.DataBlockSize = SDMMC_DATABLOCK_SIZE_512B; - config.TransferDir = SDMMC_TRANSFER_DIR_TO_SDMMC; - config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK; - config.DPSM = SDMMC_DPSM_DISABLE; - (void)SDMMC_ConfigData(hsd->Instance, &config); - __SDMMC_CMDTRANS_ENABLE(hsd->Instance); - - /* Read block(s) in polling mode */ - if (NumberOfBlocks > 1U) - { - hsd->Context = SD_CONTEXT_READ_MULTIPLE_BLOCK; - - /* Read Multi Block command */ - errorstate = SDMMC_CmdReadMultiBlock(hsd->Instance, add); - } - else - { - hsd->Context = SD_CONTEXT_READ_SINGLE_BLOCK; - - /* Read Single Block command */ - errorstate = SDMMC_CmdReadSingleBlock(hsd->Instance, add); - } - if (errorstate != HAL_SD_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_STATIC_FLAGS); - hsd->ErrorCode |= errorstate; - hsd->State = HAL_SD_STATE_READY; - hsd->Context = SD_CONTEXT_NONE; - return HAL_ERROR; - } - - /* Poll on SDMMC flags */ - dataremaining = config.DataLength; - while (!__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_RXOVERR | SDMMC_FLAG_DCRCFAIL | SDMMC_FLAG_DTIMEOUT | SDMMC_FLAG_DATAEND)) - { - if (__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_RXFIFOHF) && (dataremaining >= SDMMC_FIFO_SIZE)) - { - /* Read data from SDMMC Rx FIFO */ - for (count = 0U; count < (SDMMC_FIFO_SIZE / 4U); count++) - { - data = SDMMC_ReadFIFO(hsd->Instance); - *tempbuff = (uint8_t)(data & 0xFFU); - tempbuff++; - *tempbuff = (uint8_t)((data >> 8U) & 0xFFU); - tempbuff++; - *tempbuff = (uint8_t)((data >> 16U) & 0xFFU); - tempbuff++; - *tempbuff = (uint8_t)((data >> 24U) & 0xFFU); - tempbuff++; - } - dataremaining -= SDMMC_FIFO_SIZE; - } - - if (((HAL_GetTick() - tickstart) >= Timeout) || (Timeout == 0U)) - { - /* Clear all the static flags */ - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_STATIC_FLAGS); - hsd->ErrorCode |= HAL_SD_ERROR_TIMEOUT; - hsd->State = HAL_SD_STATE_READY; - hsd->Context = SD_CONTEXT_NONE; - return HAL_TIMEOUT; - } - } - __SDMMC_CMDTRANS_DISABLE(hsd->Instance); - - /* Send stop transmission command in case of multiblock read */ - if (__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_DATAEND) && (NumberOfBlocks > 1U)) - { - if (hsd->SdCard.CardType != CARD_SECURED) - { - /* Send stop transmission command */ - errorstate = SDMMC_CmdStopTransfer(hsd->Instance); - if (errorstate != HAL_SD_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_STATIC_FLAGS); - hsd->ErrorCode |= errorstate; - hsd->State = HAL_SD_STATE_READY; - hsd->Context = SD_CONTEXT_NONE; - return HAL_ERROR; - } - } - } - - /* Get error state */ - if (__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_DTIMEOUT)) - { - /* Clear all the static flags */ - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_STATIC_FLAGS); - hsd->ErrorCode |= HAL_SD_ERROR_DATA_TIMEOUT; - hsd->State = HAL_SD_STATE_READY; - hsd->Context = SD_CONTEXT_NONE; - return HAL_ERROR; - } - else if (__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_DCRCFAIL)) - { - /* Clear all the static flags */ - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_STATIC_FLAGS); - hsd->ErrorCode |= HAL_SD_ERROR_DATA_CRC_FAIL; - hsd->State = HAL_SD_STATE_READY; - hsd->Context = SD_CONTEXT_NONE; - return HAL_ERROR; - } - else if (__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_RXOVERR)) - { - /* Clear all the static flags */ - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_STATIC_FLAGS); - hsd->ErrorCode |= HAL_SD_ERROR_RX_OVERRUN; - hsd->State = HAL_SD_STATE_READY; - hsd->Context = SD_CONTEXT_NONE; - return HAL_ERROR; - } - else - { - /* Nothing to do */ - } - - /* Clear all the static flags */ - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_STATIC_DATA_FLAGS); - - hsd->State = HAL_SD_STATE_READY; - - return HAL_OK; - } - else - { - hsd->ErrorCode |= HAL_SD_ERROR_BUSY; - return HAL_ERROR; - } -} - -/** - * @brief Allows to write block(s) to a specified address in a card. The Data - * transfer is managed by polling mode. - * @note This API should be followed by a check on the card state through - * HAL_SD_GetCardState(). - * @param hsd: Pointer to SD handle - * @param pData: pointer to the buffer that will contain the data to transmit - * @param BlockAdd: Block Address where data will be written - * @param NumberOfBlocks: Number of SD blocks to write - * @param Timeout: Specify timeout value - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SD_WriteBlocks(SD_HandleTypeDef *hsd, const uint8_t *pData, uint32_t BlockAdd, - uint32_t NumberOfBlocks, uint32_t Timeout) -{ - SDMMC_DataInitTypeDef config; - uint32_t errorstate; - uint32_t tickstart = HAL_GetTick(); - uint32_t count; - uint32_t data; - uint32_t dataremaining; - uint32_t add = BlockAdd; - const uint8_t *tempbuff = pData; - - if (NULL == pData) - { - hsd->ErrorCode |= HAL_SD_ERROR_PARAM; - return HAL_ERROR; - } - - if (hsd->State == HAL_SD_STATE_READY) - { - hsd->ErrorCode = HAL_SD_ERROR_NONE; - - if ((add + NumberOfBlocks) > (hsd->SdCard.LogBlockNbr)) - { - hsd->ErrorCode |= HAL_SD_ERROR_ADDR_OUT_OF_RANGE; - return HAL_ERROR; - } - - hsd->State = HAL_SD_STATE_BUSY; - - /* Initialize data control register */ - hsd->Instance->DCTRL = 0U; - - if (hsd->SdCard.CardType != CARD_SDHC_SDXC) - { - add *= BLOCKSIZE; - } - - /* Configure the SD DPSM (Data Path State Machine) */ - config.DataTimeOut = SDMMC_DATATIMEOUT; - config.DataLength = NumberOfBlocks * BLOCKSIZE; - config.DataBlockSize = SDMMC_DATABLOCK_SIZE_512B; - config.TransferDir = SDMMC_TRANSFER_DIR_TO_CARD; - config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK; - config.DPSM = SDMMC_DPSM_DISABLE; - (void)SDMMC_ConfigData(hsd->Instance, &config); - __SDMMC_CMDTRANS_ENABLE(hsd->Instance); - - /* Write Blocks in Polling mode */ - if (NumberOfBlocks > 1U) - { - hsd->Context = SD_CONTEXT_WRITE_MULTIPLE_BLOCK; - - /* Write Multi Block command */ - errorstate = SDMMC_CmdWriteMultiBlock(hsd->Instance, add); - } - else - { - hsd->Context = SD_CONTEXT_WRITE_SINGLE_BLOCK; - - /* Write Single Block command */ - errorstate = SDMMC_CmdWriteSingleBlock(hsd->Instance, add); - } - if (errorstate != HAL_SD_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_STATIC_FLAGS); - hsd->ErrorCode |= errorstate; - hsd->State = HAL_SD_STATE_READY; - hsd->Context = SD_CONTEXT_NONE; - return HAL_ERROR; - } - - /* Write block(s) in polling mode */ - dataremaining = config.DataLength; - while (!__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_TXUNDERR | SDMMC_FLAG_DCRCFAIL | SDMMC_FLAG_DTIMEOUT | - SDMMC_FLAG_DATAEND)) - { - if (__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_TXFIFOHE) && (dataremaining >= SDMMC_FIFO_SIZE)) - { - /* Write data to SDMMC Tx FIFO */ - for (count = 0U; count < (SDMMC_FIFO_SIZE / 4U); count++) - { - data = (uint32_t)(*tempbuff); - tempbuff++; - data |= ((uint32_t)(*tempbuff) << 8U); - tempbuff++; - data |= ((uint32_t)(*tempbuff) << 16U); - tempbuff++; - data |= ((uint32_t)(*tempbuff) << 24U); - tempbuff++; - (void)SDMMC_WriteFIFO(hsd->Instance, &data); - } - dataremaining -= SDMMC_FIFO_SIZE; - } - - if (((HAL_GetTick() - tickstart) >= Timeout) || (Timeout == 0U)) - { - /* Clear all the static flags */ - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_STATIC_FLAGS); - hsd->ErrorCode |= errorstate; - hsd->State = HAL_SD_STATE_READY; - hsd->Context = SD_CONTEXT_NONE; - return HAL_TIMEOUT; - } - } - __SDMMC_CMDTRANS_DISABLE(hsd->Instance); - - /* Send stop transmission command in case of multiblock write */ - if (__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_DATAEND) && (NumberOfBlocks > 1U)) - { - if (hsd->SdCard.CardType != CARD_SECURED) - { - /* Send stop transmission command */ - errorstate = SDMMC_CmdStopTransfer(hsd->Instance); - if (errorstate != HAL_SD_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_STATIC_FLAGS); - hsd->ErrorCode |= errorstate; - hsd->State = HAL_SD_STATE_READY; - hsd->Context = SD_CONTEXT_NONE; - return HAL_ERROR; - } - } - } - - /* Get error state */ - if (__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_DTIMEOUT)) - { - /* Clear all the static flags */ - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_STATIC_FLAGS); - hsd->ErrorCode |= HAL_SD_ERROR_DATA_TIMEOUT; - hsd->State = HAL_SD_STATE_READY; - hsd->Context = SD_CONTEXT_NONE; - return HAL_ERROR; - } - else if (__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_DCRCFAIL)) - { - /* Clear all the static flags */ - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_STATIC_FLAGS); - hsd->ErrorCode |= HAL_SD_ERROR_DATA_CRC_FAIL; - hsd->State = HAL_SD_STATE_READY; - hsd->Context = SD_CONTEXT_NONE; - return HAL_ERROR; - } - else if (__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_TXUNDERR)) - { - /* Clear all the static flags */ - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_STATIC_FLAGS); - hsd->ErrorCode |= HAL_SD_ERROR_TX_UNDERRUN; - hsd->State = HAL_SD_STATE_READY; - hsd->Context = SD_CONTEXT_NONE; - return HAL_ERROR; - } - else - { - /* Nothing to do */ - } - - /* Clear all the static flags */ - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_STATIC_DATA_FLAGS); - - hsd->State = HAL_SD_STATE_READY; - - return HAL_OK; - } - else - { - hsd->ErrorCode |= HAL_SD_ERROR_BUSY; - return HAL_ERROR; - } -} - -/** - * @brief Reads block(s) from a specified address in a card. The Data transfer - * is managed in interrupt mode. - * @note This API should be followed by a check on the card state through - * HAL_SD_GetCardState(). - * @note You could also check the IT transfer process through the SD Rx - * interrupt event. - * @param hsd: Pointer to SD handle - * @param pData: Pointer to the buffer that will contain the received data - * @param BlockAdd: Block Address from where data is to be read - * @param NumberOfBlocks: Number of blocks to read. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SD_ReadBlocks_IT(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, - uint32_t NumberOfBlocks) -{ - SDMMC_DataInitTypeDef config; - uint32_t errorstate; - uint32_t add = BlockAdd; - - if (NULL == pData) - { - hsd->ErrorCode |= HAL_SD_ERROR_PARAM; - return HAL_ERROR; - } - - if (hsd->State == HAL_SD_STATE_READY) - { - hsd->ErrorCode = HAL_SD_ERROR_NONE; - - if ((add + NumberOfBlocks) > (hsd->SdCard.LogBlockNbr)) - { - hsd->ErrorCode |= HAL_SD_ERROR_ADDR_OUT_OF_RANGE; - return HAL_ERROR; - } - - hsd->State = HAL_SD_STATE_BUSY; - - /* Initialize data control register */ - hsd->Instance->DCTRL = 0U; - - hsd->pRxBuffPtr = pData; - hsd->RxXferSize = BLOCKSIZE * NumberOfBlocks; - - if (hsd->SdCard.CardType != CARD_SDHC_SDXC) - { - add *= BLOCKSIZE; - } - - /* Configure the SD DPSM (Data Path State Machine) */ - config.DataTimeOut = SDMMC_DATATIMEOUT; - config.DataLength = BLOCKSIZE * NumberOfBlocks; - config.DataBlockSize = SDMMC_DATABLOCK_SIZE_512B; - config.TransferDir = SDMMC_TRANSFER_DIR_TO_SDMMC; - config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK; - config.DPSM = SDMMC_DPSM_DISABLE; - (void)SDMMC_ConfigData(hsd->Instance, &config); - __SDMMC_CMDTRANS_ENABLE(hsd->Instance); - - /* Read Blocks in IT mode */ - if (NumberOfBlocks > 1U) - { - hsd->Context = (SD_CONTEXT_READ_MULTIPLE_BLOCK | SD_CONTEXT_IT); - - /* Read Multi Block command */ - errorstate = SDMMC_CmdReadMultiBlock(hsd->Instance, add); - } - else - { - hsd->Context = (SD_CONTEXT_READ_SINGLE_BLOCK | SD_CONTEXT_IT); - - /* Read Single Block command */ - errorstate = SDMMC_CmdReadSingleBlock(hsd->Instance, add); - } - if (errorstate != HAL_SD_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_STATIC_FLAGS); - hsd->ErrorCode |= errorstate; - hsd->State = HAL_SD_STATE_READY; - hsd->Context = SD_CONTEXT_NONE; - return HAL_ERROR; - } - - __HAL_SD_ENABLE_IT(hsd, (SDMMC_IT_DCRCFAIL | SDMMC_IT_DTIMEOUT | SDMMC_IT_RXOVERR | SDMMC_IT_DATAEND | - SDMMC_FLAG_RXFIFOHF)); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Writes block(s) to a specified address in a card. The Data transfer - * is managed in interrupt mode. - * @note This API should be followed by a check on the card state through - * HAL_SD_GetCardState(). - * @note You could also check the IT transfer process through the SD Tx - * interrupt event. - * @param hsd: Pointer to SD handle - * @param pData: Pointer to the buffer that will contain the data to transmit - * @param BlockAdd: Block Address where data will be written - * @param NumberOfBlocks: Number of blocks to write - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SD_WriteBlocks_IT(SD_HandleTypeDef *hsd, const uint8_t *pData, uint32_t BlockAdd, - uint32_t NumberOfBlocks) -{ - SDMMC_DataInitTypeDef config; - uint32_t errorstate; - uint32_t add = BlockAdd; - - if (NULL == pData) - { - hsd->ErrorCode |= HAL_SD_ERROR_PARAM; - return HAL_ERROR; - } - - if (hsd->State == HAL_SD_STATE_READY) - { - hsd->ErrorCode = HAL_SD_ERROR_NONE; - - if ((add + NumberOfBlocks) > (hsd->SdCard.LogBlockNbr)) - { - hsd->ErrorCode |= HAL_SD_ERROR_ADDR_OUT_OF_RANGE; - return HAL_ERROR; - } - - hsd->State = HAL_SD_STATE_BUSY; - - /* Initialize data control register */ - hsd->Instance->DCTRL = 0U; - - hsd->pTxBuffPtr = pData; - hsd->TxXferSize = BLOCKSIZE * NumberOfBlocks; - - if (hsd->SdCard.CardType != CARD_SDHC_SDXC) - { - add *= BLOCKSIZE; - } - - /* Configure the SD DPSM (Data Path State Machine) */ - config.DataTimeOut = SDMMC_DATATIMEOUT; - config.DataLength = BLOCKSIZE * NumberOfBlocks; - config.DataBlockSize = SDMMC_DATABLOCK_SIZE_512B; - config.TransferDir = SDMMC_TRANSFER_DIR_TO_CARD; - config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK; - config.DPSM = SDMMC_DPSM_DISABLE; - (void)SDMMC_ConfigData(hsd->Instance, &config); - - __SDMMC_CMDTRANS_ENABLE(hsd->Instance); - - /* Write Blocks in Polling mode */ - if (NumberOfBlocks > 1U) - { - hsd->Context = (SD_CONTEXT_WRITE_MULTIPLE_BLOCK | SD_CONTEXT_IT); - - /* Write Multi Block command */ - errorstate = SDMMC_CmdWriteMultiBlock(hsd->Instance, add); - } - else - { - hsd->Context = (SD_CONTEXT_WRITE_SINGLE_BLOCK | SD_CONTEXT_IT); - - /* Write Single Block command */ - errorstate = SDMMC_CmdWriteSingleBlock(hsd->Instance, add); - } - if (errorstate != HAL_SD_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_STATIC_FLAGS); - hsd->ErrorCode |= errorstate; - hsd->State = HAL_SD_STATE_READY; - hsd->Context = SD_CONTEXT_NONE; - return HAL_ERROR; - } - - /* Enable transfer interrupts */ - __HAL_SD_ENABLE_IT(hsd, (SDMMC_IT_DCRCFAIL | SDMMC_IT_DTIMEOUT | SDMMC_IT_TXUNDERR | SDMMC_IT_DATAEND | - SDMMC_FLAG_TXFIFOHE)); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Reads block(s) from a specified address in a card. The Data transfer - * is managed by DMA mode. - * @note This API should be followed by a check on the card state through - * HAL_SD_GetCardState(). - * @note You could also check the DMA transfer process through the SD Rx - * interrupt event. - * @param hsd: Pointer SD handle - * @param pData: Pointer to the buffer that will contain the received data - * @param BlockAdd: Block Address from where data is to be read - * @param NumberOfBlocks: Number of blocks to read. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, - uint32_t NumberOfBlocks) -{ - SDMMC_DataInitTypeDef config; - uint32_t errorstate; - uint32_t add = BlockAdd; - - if (NULL == pData) - { - hsd->ErrorCode |= HAL_SD_ERROR_PARAM; - return HAL_ERROR; - } - - if (hsd->State == HAL_SD_STATE_READY) - { - hsd->ErrorCode = HAL_SD_ERROR_NONE; - - if ((add + NumberOfBlocks) > (hsd->SdCard.LogBlockNbr)) - { - hsd->ErrorCode |= HAL_SD_ERROR_ADDR_OUT_OF_RANGE; - return HAL_ERROR; - } - - hsd->State = HAL_SD_STATE_BUSY; - - /* Initialize data control register */ - hsd->Instance->DCTRL = 0U; - - hsd->pRxBuffPtr = pData; - hsd->RxXferSize = BLOCKSIZE * NumberOfBlocks; - - if (hsd->SdCard.CardType != CARD_SDHC_SDXC) - { - add *= BLOCKSIZE; - } - - /* Configure the SD DPSM (Data Path State Machine) */ - config.DataTimeOut = SDMMC_DATATIMEOUT; - config.DataLength = BLOCKSIZE * NumberOfBlocks; - config.DataBlockSize = SDMMC_DATABLOCK_SIZE_512B; - config.TransferDir = SDMMC_TRANSFER_DIR_TO_SDMMC; - config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK; - config.DPSM = SDMMC_DPSM_DISABLE; - (void)SDMMC_ConfigData(hsd->Instance, &config); - - __SDMMC_CMDTRANS_ENABLE(hsd->Instance); - hsd->Instance->IDMABASER = (uint32_t) pData ; - hsd->Instance->IDMACTRL = SDMMC_ENABLE_IDMA_SINGLE_BUFF; - - /* Read Blocks in DMA mode */ - if (NumberOfBlocks > 1U) - { - hsd->Context = (SD_CONTEXT_READ_MULTIPLE_BLOCK | SD_CONTEXT_DMA); - - /* Read Multi Block command */ - errorstate = SDMMC_CmdReadMultiBlock(hsd->Instance, add); - } - else - { - hsd->Context = (SD_CONTEXT_READ_SINGLE_BLOCK | SD_CONTEXT_DMA); - - /* Read Single Block command */ - errorstate = SDMMC_CmdReadSingleBlock(hsd->Instance, add); - } - if (errorstate != HAL_SD_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_STATIC_FLAGS); - hsd->ErrorCode |= errorstate; - hsd->State = HAL_SD_STATE_READY; - hsd->Context = SD_CONTEXT_NONE; - return HAL_ERROR; - } - - /* Enable transfer interrupts */ - __HAL_SD_ENABLE_IT(hsd, (SDMMC_IT_DCRCFAIL | SDMMC_IT_DTIMEOUT | SDMMC_IT_RXOVERR | SDMMC_IT_DATAEND)); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Writes block(s) to a specified address in a card. The Data transfer - * is managed by DMA mode. - * @note This API should be followed by a check on the card state through - * HAL_SD_GetCardState(). - * @note You could also check the DMA transfer process through the SD Tx - * interrupt event. - * @param hsd: Pointer to SD handle - * @param pData: Pointer to the buffer that will contain the data to transmit - * @param BlockAdd: Block Address where data will be written - * @param NumberOfBlocks: Number of blocks to write - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, const uint8_t *pData, uint32_t BlockAdd, - uint32_t NumberOfBlocks) -{ - SDMMC_DataInitTypeDef config; - uint32_t errorstate; - uint32_t add = BlockAdd; - - if (NULL == pData) - { - hsd->ErrorCode |= HAL_SD_ERROR_PARAM; - return HAL_ERROR; - } - - if (hsd->State == HAL_SD_STATE_READY) - { - hsd->ErrorCode = HAL_SD_ERROR_NONE; - - if ((add + NumberOfBlocks) > (hsd->SdCard.LogBlockNbr)) - { - hsd->ErrorCode |= HAL_SD_ERROR_ADDR_OUT_OF_RANGE; - return HAL_ERROR; - } - - hsd->State = HAL_SD_STATE_BUSY; - - /* Initialize data control register */ - hsd->Instance->DCTRL = 0U; - - hsd->pTxBuffPtr = pData; - hsd->TxXferSize = BLOCKSIZE * NumberOfBlocks; - - if (hsd->SdCard.CardType != CARD_SDHC_SDXC) - { - add *= BLOCKSIZE; - } - - /* Configure the SD DPSM (Data Path State Machine) */ - config.DataTimeOut = SDMMC_DATATIMEOUT; - config.DataLength = BLOCKSIZE * NumberOfBlocks; - config.DataBlockSize = SDMMC_DATABLOCK_SIZE_512B; - config.TransferDir = SDMMC_TRANSFER_DIR_TO_CARD; - config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK; - config.DPSM = SDMMC_DPSM_DISABLE; - (void)SDMMC_ConfigData(hsd->Instance, &config); - - __SDMMC_CMDTRANS_ENABLE(hsd->Instance); - - hsd->Instance->IDMABASER = (uint32_t) pData ; - hsd->Instance->IDMACTRL = SDMMC_ENABLE_IDMA_SINGLE_BUFF; - - /* Write Blocks in Polling mode */ - if (NumberOfBlocks > 1U) - { - hsd->Context = (SD_CONTEXT_WRITE_MULTIPLE_BLOCK | SD_CONTEXT_DMA); - - /* Write Multi Block command */ - errorstate = SDMMC_CmdWriteMultiBlock(hsd->Instance, add); - } - else - { - hsd->Context = (SD_CONTEXT_WRITE_SINGLE_BLOCK | SD_CONTEXT_DMA); - - /* Write Single Block command */ - errorstate = SDMMC_CmdWriteSingleBlock(hsd->Instance, add); - } - if (errorstate != HAL_SD_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_STATIC_FLAGS); - hsd->ErrorCode |= errorstate; - hsd->State = HAL_SD_STATE_READY; - hsd->Context = SD_CONTEXT_NONE; - return HAL_ERROR; - } - - /* Enable transfer interrupts */ - __HAL_SD_ENABLE_IT(hsd, (SDMMC_IT_DCRCFAIL | SDMMC_IT_DTIMEOUT | SDMMC_IT_TXUNDERR | SDMMC_IT_DATAEND)); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Erases the specified memory area of the given SD card. - * @note This API should be followed by a check on the card state through - * HAL_SD_GetCardState(). - * @param hsd: Pointer to SD handle - * @param BlockStartAdd: Start Block address - * @param BlockEndAdd: End Block address - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SD_Erase(SD_HandleTypeDef *hsd, uint32_t BlockStartAdd, uint32_t BlockEndAdd) -{ - uint32_t errorstate; - uint32_t start_add = BlockStartAdd; - uint32_t end_add = BlockEndAdd; - - if (hsd->State == HAL_SD_STATE_READY) - { - hsd->ErrorCode = HAL_SD_ERROR_NONE; - - if (end_add < start_add) - { - hsd->ErrorCode |= HAL_SD_ERROR_PARAM; - return HAL_ERROR; - } - - if (end_add > (hsd->SdCard.LogBlockNbr)) - { - hsd->ErrorCode |= HAL_SD_ERROR_ADDR_OUT_OF_RANGE; - return HAL_ERROR; - } - - hsd->State = HAL_SD_STATE_BUSY; - - /* Check if the card command class supports erase command */ - if (((hsd->SdCard.Class) & SDMMC_CCCC_ERASE) == 0U) - { - /* Clear all the static flags */ - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_STATIC_FLAGS); - hsd->ErrorCode |= HAL_SD_ERROR_REQUEST_NOT_APPLICABLE; - hsd->State = HAL_SD_STATE_READY; - return HAL_ERROR; - } - - if ((SDMMC_GetResponse(hsd->Instance, SDMMC_RESP1) & SDMMC_CARD_LOCKED) == SDMMC_CARD_LOCKED) - { - /* Clear all the static flags */ - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_STATIC_FLAGS); - hsd->ErrorCode |= HAL_SD_ERROR_LOCK_UNLOCK_FAILED; - hsd->State = HAL_SD_STATE_READY; - return HAL_ERROR; - } - - /* Get start and end block for high capacity cards */ - if (hsd->SdCard.CardType != CARD_SDHC_SDXC) - { - start_add *= BLOCKSIZE; - end_add *= BLOCKSIZE; - } - - /* According to sd-card spec 1.0 ERASE_GROUP_START (CMD32) and erase_group_end(CMD33) */ - if (hsd->SdCard.CardType != CARD_SECURED) - { - /* Send CMD32 SD_ERASE_GRP_START with argument as addr */ - errorstate = SDMMC_CmdSDEraseStartAdd(hsd->Instance, start_add); - if (errorstate != HAL_SD_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_STATIC_FLAGS); - hsd->ErrorCode |= errorstate; - hsd->State = HAL_SD_STATE_READY; - return HAL_ERROR; - } - - /* Send CMD33 SD_ERASE_GRP_END with argument as addr */ - errorstate = SDMMC_CmdSDEraseEndAdd(hsd->Instance, end_add); - if (errorstate != HAL_SD_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_STATIC_FLAGS); - hsd->ErrorCode |= errorstate; - hsd->State = HAL_SD_STATE_READY; - return HAL_ERROR; - } - } - - /* Send CMD38 ERASE */ - errorstate = SDMMC_CmdErase(hsd->Instance, 0UL); - if (errorstate != HAL_SD_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_STATIC_FLAGS); - hsd->ErrorCode |= errorstate; - hsd->State = HAL_SD_STATE_READY; - return HAL_ERROR; - } - - hsd->State = HAL_SD_STATE_READY; - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief This function handles SD card interrupt request. - * @param hsd: Pointer to SD handle - * @retval None - */ -void HAL_SD_IRQHandler(SD_HandleTypeDef *hsd) -{ - uint32_t errorstate; - uint32_t context = hsd->Context; - - /* Check for SDMMC interrupt flags */ - if ((__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_RXFIFOHF) != RESET) && ((context & SD_CONTEXT_IT) != 0U)) - { - SD_Read_IT(hsd); - } - - else if (__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_DATAEND) != RESET) - { - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_FLAG_DATAEND); - - __HAL_SD_DISABLE_IT(hsd, SDMMC_IT_DATAEND | SDMMC_IT_DCRCFAIL | SDMMC_IT_DTIMEOUT | \ - SDMMC_IT_TXUNDERR | SDMMC_IT_RXOVERR | SDMMC_IT_TXFIFOHE | \ - SDMMC_IT_RXFIFOHF); - - __HAL_SD_DISABLE_IT(hsd, SDMMC_IT_IDMABTC); - __SDMMC_CMDTRANS_DISABLE(hsd->Instance); - - if ((context & SD_CONTEXT_IT) != 0U) - { - if (((context & SD_CONTEXT_READ_MULTIPLE_BLOCK) != 0U) || ((context & SD_CONTEXT_WRITE_MULTIPLE_BLOCK) != 0U)) - { - errorstate = SDMMC_CmdStopTransfer(hsd->Instance); - if (errorstate != HAL_SD_ERROR_NONE) - { - hsd->ErrorCode |= errorstate; -#if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U) - hsd->ErrorCallback(hsd); -#else - HAL_SD_ErrorCallback(hsd); -#endif /* USE_HAL_SD_REGISTER_CALLBACKS */ - } - } - - /* Clear all the static flags */ - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_STATIC_DATA_FLAGS); - - hsd->State = HAL_SD_STATE_READY; - hsd->Context = SD_CONTEXT_NONE; - if (((context & SD_CONTEXT_READ_SINGLE_BLOCK) != 0U) || ((context & SD_CONTEXT_READ_MULTIPLE_BLOCK) != 0U)) - { -#if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U) - hsd->RxCpltCallback(hsd); -#else - HAL_SD_RxCpltCallback(hsd); -#endif /* USE_HAL_SD_REGISTER_CALLBACKS */ - } - else - { -#if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U) - hsd->TxCpltCallback(hsd); -#else - HAL_SD_TxCpltCallback(hsd); -#endif /* USE_HAL_SD_REGISTER_CALLBACKS */ - } - } - else if ((context & SD_CONTEXT_DMA) != 0U) - { - hsd->Instance->DLEN = 0; - hsd->Instance->DCTRL = 0; - hsd->Instance->IDMACTRL = SDMMC_DISABLE_IDMA; - - /* Stop Transfer for Write Multi blocks or Read Multi blocks */ - if (((context & SD_CONTEXT_READ_MULTIPLE_BLOCK) != 0U) || ((context & SD_CONTEXT_WRITE_MULTIPLE_BLOCK) != 0U)) - { - errorstate = SDMMC_CmdStopTransfer(hsd->Instance); - if (errorstate != HAL_SD_ERROR_NONE) - { - hsd->ErrorCode |= errorstate; -#if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U) - hsd->ErrorCallback(hsd); -#else - HAL_SD_ErrorCallback(hsd); -#endif /* USE_HAL_SD_REGISTER_CALLBACKS */ - } - } - - hsd->State = HAL_SD_STATE_READY; - hsd->Context = SD_CONTEXT_NONE; - if (((context & SD_CONTEXT_WRITE_SINGLE_BLOCK) != 0U) || ((context & SD_CONTEXT_WRITE_MULTIPLE_BLOCK) != 0U)) - { -#if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U) - hsd->TxCpltCallback(hsd); -#else - HAL_SD_TxCpltCallback(hsd); -#endif /* USE_HAL_SD_REGISTER_CALLBACKS */ - } - if (((context & SD_CONTEXT_READ_SINGLE_BLOCK) != 0U) || ((context & SD_CONTEXT_READ_MULTIPLE_BLOCK) != 0U)) - { -#if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U) - hsd->RxCpltCallback(hsd); -#else - HAL_SD_RxCpltCallback(hsd); -#endif /* USE_HAL_SD_REGISTER_CALLBACKS */ - } - } - else - { - /* Nothing to do */ - } - } - - else if ((__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_TXFIFOHE) != RESET) && ((context & SD_CONTEXT_IT) != 0U)) - { - SD_Write_IT(hsd); - } - - else if (__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_DCRCFAIL | SDMMC_FLAG_DTIMEOUT | SDMMC_FLAG_RXOVERR | - SDMMC_FLAG_TXUNDERR) != RESET) - { - /* Set Error code */ - if (__HAL_SD_GET_FLAG(hsd, SDMMC_IT_DCRCFAIL) != RESET) - { - hsd->ErrorCode |= HAL_SD_ERROR_DATA_CRC_FAIL; - } - if (__HAL_SD_GET_FLAG(hsd, SDMMC_IT_DTIMEOUT) != RESET) - { - hsd->ErrorCode |= HAL_SD_ERROR_DATA_TIMEOUT; - } - if (__HAL_SD_GET_FLAG(hsd, SDMMC_IT_RXOVERR) != RESET) - { - hsd->ErrorCode |= HAL_SD_ERROR_RX_OVERRUN; - } - if (__HAL_SD_GET_FLAG(hsd, SDMMC_IT_TXUNDERR) != RESET) - { - hsd->ErrorCode |= HAL_SD_ERROR_TX_UNDERRUN; - } - - /* Clear All flags */ - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_STATIC_DATA_FLAGS); - - /* Disable all interrupts */ - __HAL_SD_DISABLE_IT(hsd, SDMMC_IT_DATAEND | SDMMC_IT_DCRCFAIL | SDMMC_IT_DTIMEOUT | \ - SDMMC_IT_TXUNDERR | SDMMC_IT_RXOVERR); - - __SDMMC_CMDTRANS_DISABLE(hsd->Instance); - hsd->Instance->DCTRL |= SDMMC_DCTRL_FIFORST; - hsd->Instance->CMD |= SDMMC_CMD_CMDSTOP; - hsd->ErrorCode |= SDMMC_CmdStopTransfer(hsd->Instance); - hsd->Instance->CMD &= ~(SDMMC_CMD_CMDSTOP); - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_FLAG_DABORT); - - if ((context & SD_CONTEXT_IT) != 0U) - { - /* Set the SD state to ready to be able to start again the process */ - hsd->State = HAL_SD_STATE_READY; - hsd->Context = SD_CONTEXT_NONE; -#if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U) - hsd->ErrorCallback(hsd); -#else - HAL_SD_ErrorCallback(hsd); -#endif /* USE_HAL_SD_REGISTER_CALLBACKS */ - } - else if ((context & SD_CONTEXT_DMA) != 0U) - { - if (hsd->ErrorCode != HAL_SD_ERROR_NONE) - { - /* Disable Internal DMA */ - __HAL_SD_DISABLE_IT(hsd, SDMMC_IT_IDMABTC); - hsd->Instance->IDMACTRL = SDMMC_DISABLE_IDMA; - - /* Set the SD state to ready to be able to start again the process */ - hsd->State = HAL_SD_STATE_READY; -#if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U) - hsd->ErrorCallback(hsd); -#else - HAL_SD_ErrorCallback(hsd); -#endif /* USE_HAL_SD_REGISTER_CALLBACKS */ - } - } - else - { - /* Nothing to do */ - } - } - - else if (__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_IDMABTC) != RESET) - { - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_FLAG_IDMABTC); - - if ((context & SD_CONTEXT_WRITE_MULTIPLE_BLOCK) != 0U) - { -#if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U) - hsd->Write_DMALnkLstBufCpltCallback(hsd); -#else - HAL_SDEx_Write_DMALnkLstBufCpltCallback(hsd); -#endif /* USE_HAL_SD_REGISTER_CALLBACKS */ - } - else /* SD_CONTEXT_READ_MULTIPLE_BLOCK */ - { -#if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U) - hsd->Read_DMALnkLstBufCpltCallback(hsd); -#else - HAL_SDEx_Read_DMALnkLstBufCpltCallback(hsd); -#endif /* USE_HAL_SD_REGISTER_CALLBACKS */ - } - } - else - { - /* Nothing to do */ - } -} - -/** - * @brief return the SD state - * @param hsd: Pointer to sd handle - * @retval HAL state - */ -HAL_SD_StateTypeDef HAL_SD_GetState(const SD_HandleTypeDef *hsd) -{ - return hsd->State; -} - -/** - * @brief Return the SD error code - * @param hsd : Pointer to a SD_HandleTypeDef structure that contains - * the configuration information. - * @retval SD Error Code - */ -uint32_t HAL_SD_GetError(const SD_HandleTypeDef *hsd) -{ - return hsd->ErrorCode; -} - -/** - * @brief Tx Transfer completed callbacks - * @param hsd: Pointer to SD handle - * @retval None - */ -__weak void HAL_SD_TxCpltCallback(SD_HandleTypeDef *hsd) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hsd); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_SD_TxCpltCallback can be implemented in the user file - */ -} - -/** - * @brief Rx Transfer completed callbacks - * @param hsd: Pointer SD handle - * @retval None - */ -__weak void HAL_SD_RxCpltCallback(SD_HandleTypeDef *hsd) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hsd); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_SD_RxCpltCallback can be implemented in the user file - */ -} - -/** - * @brief SD error callbacks - * @param hsd: Pointer SD handle - * @retval None - */ -__weak void HAL_SD_ErrorCallback(SD_HandleTypeDef *hsd) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hsd); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_SD_ErrorCallback can be implemented in the user file - */ -} - -/** - * @brief SD Abort callbacks - * @param hsd: Pointer SD handle - * @retval None - */ -__weak void HAL_SD_AbortCallback(SD_HandleTypeDef *hsd) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hsd); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_SD_AbortCallback can be implemented in the user file - */ -} - -#if (USE_SD_TRANSCEIVER != 0U) -/** - * @brief Enable/Disable the SD Transceiver 1.8V Mode Callback. - * @param status: Voltage Switch State - * @retval None - */ -__weak void HAL_SD_DriveTransceiver_1_8V_Callback(FlagStatus status) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(status); - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_SD_EnableTransceiver could be implemented in the user file - */ -} -#endif /* USE_SD_TRANSCEIVER */ - -#if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U) -/** - * @brief Register a User SD Callback - * To be used instead of the weak (overridden) predefined callback - * @note The HAL_SD_RegisterCallback() may be called before HAL_SD_Init() in - * HAL_SD_STATE_RESET to register callbacks for HAL_SD_MSP_INIT_CB_ID - * and HAL_SD_MSP_DEINIT_CB_ID. - * @param hsd : SD handle - * @param CallbackID : ID of the callback to be registered - * This parameter can be one of the following values: - * @arg @ref HAL_SD_TX_CPLT_CB_ID SD Tx Complete Callback ID - * @arg @ref HAL_SD_RX_CPLT_CB_ID SD Rx Complete Callback ID - * @arg @ref HAL_SD_ERROR_CB_ID SD Error Callback ID - * @arg @ref HAL_SD_ABORT_CB_ID SD Abort Callback ID - * @arg @ref HAL_SD_READ_DMA_LNKLST_BUF_CPLT_CB_ID SD DMA Rx Linked List Node buffer Callback ID - * @arg @ref HAL_SD_WRITE_DMA_LNKLST_BUF_CPLT_CB_ID SD DMA Tx Linked List Node buffer Callback ID - * @arg @ref HAL_SD_MSP_INIT_CB_ID SD MspInit Callback ID - * @arg @ref HAL_SD_MSP_DEINIT_CB_ID SD MspDeInit Callback ID - * @param pCallback : pointer to the Callback function - * @retval status - */ -HAL_StatusTypeDef HAL_SD_RegisterCallback(SD_HandleTypeDef *hsd, HAL_SD_CallbackIDTypeDef CallbackID, - pSD_CallbackTypeDef pCallback) -{ - HAL_StatusTypeDef status = HAL_OK; - - if (pCallback == NULL) - { - /* Update the error code */ - hsd->ErrorCode |= HAL_SD_ERROR_INVALID_CALLBACK; - return HAL_ERROR; - } - - if (hsd->State == HAL_SD_STATE_READY) - { - switch (CallbackID) - { - case HAL_SD_TX_CPLT_CB_ID : - hsd->TxCpltCallback = pCallback; - break; - case HAL_SD_RX_CPLT_CB_ID : - hsd->RxCpltCallback = pCallback; - break; - case HAL_SD_ERROR_CB_ID : - hsd->ErrorCallback = pCallback; - break; - case HAL_SD_ABORT_CB_ID : - hsd->AbortCpltCallback = pCallback; - break; - case HAL_SD_READ_DMA_LNKLST_BUF_CPLT_CB_ID : - hsd->Read_DMALnkLstBufCpltCallback = pCallback; - break; - case HAL_SD_WRITE_DMA_LNKLST_BUF_CPLT_CB_ID : - hsd->Write_DMALnkLstBufCpltCallback = pCallback; - break; - case HAL_SD_MSP_INIT_CB_ID : - hsd->MspInitCallback = pCallback; - break; - case HAL_SD_MSP_DEINIT_CB_ID : - hsd->MspDeInitCallback = pCallback; - break; - default : - /* Update the error code */ - hsd->ErrorCode |= HAL_SD_ERROR_INVALID_CALLBACK; - /* update return status */ - status = HAL_ERROR; - break; - } - } - else if (hsd->State == HAL_SD_STATE_RESET) - { - switch (CallbackID) - { - case HAL_SD_MSP_INIT_CB_ID : - hsd->MspInitCallback = pCallback; - break; - case HAL_SD_MSP_DEINIT_CB_ID : - hsd->MspDeInitCallback = pCallback; - break; - default : - /* Update the error code */ - hsd->ErrorCode |= HAL_SD_ERROR_INVALID_CALLBACK; - /* update return status */ - status = HAL_ERROR; - break; - } - } - else - { - /* Update the error code */ - hsd->ErrorCode |= HAL_SD_ERROR_INVALID_CALLBACK; - /* update return status */ - status = HAL_ERROR; - } - - return status; -} - -/** - * @brief Unregister a User SD Callback - * SD Callback is redirected to the weak (overridden) predefined callback - * @note The HAL_SD_UnRegisterCallback() may be called before HAL_SD_Init() in - * HAL_SD_STATE_RESET to register callbacks for HAL_SD_MSP_INIT_CB_ID - * and HAL_SD_MSP_DEINIT_CB_ID. - * @param hsd : SD handle - * @param CallbackID : ID of the callback to be unregistered - * This parameter can be one of the following values: - * @arg @ref HAL_SD_TX_CPLT_CB_ID SD Tx Complete Callback ID - * @arg @ref HAL_SD_RX_CPLT_CB_ID SD Rx Complete Callback ID - * @arg @ref HAL_SD_ERROR_CB_ID SD Error Callback ID - * @arg @ref HAL_SD_ABORT_CB_ID SD Abort Callback ID - * @arg @ref HAL_SD_READ_DMA_LNKLST_BUF_CPLT_CB_ID SD DMA Rx Linked List Node buffer Callback ID - * @arg @ref HAL_SD_WRITE_DMA_LNKLST_BUF_CPLT_CB_ID SD DMA Tx Linked List Node buffer Callback ID - * @arg @ref HAL_SD_MSP_INIT_CB_ID SD MspInit Callback ID - * @arg @ref HAL_SD_MSP_DEINIT_CB_ID SD MspDeInit Callback ID - * @retval status - */ -HAL_StatusTypeDef HAL_SD_UnRegisterCallback(SD_HandleTypeDef *hsd, HAL_SD_CallbackIDTypeDef CallbackID) -{ - HAL_StatusTypeDef status = HAL_OK; - - if (hsd->State == HAL_SD_STATE_READY) - { - switch (CallbackID) - { - case HAL_SD_TX_CPLT_CB_ID : - hsd->TxCpltCallback = HAL_SD_TxCpltCallback; - break; - case HAL_SD_RX_CPLT_CB_ID : - hsd->RxCpltCallback = HAL_SD_RxCpltCallback; - break; - case HAL_SD_ERROR_CB_ID : - hsd->ErrorCallback = HAL_SD_ErrorCallback; - break; - case HAL_SD_ABORT_CB_ID : - hsd->AbortCpltCallback = HAL_SD_AbortCallback; - break; - case HAL_SD_READ_DMA_LNKLST_BUF_CPLT_CB_ID : - hsd->Read_DMALnkLstBufCpltCallback = HAL_SDEx_Read_DMALnkLstBufCpltCallback; - break; - case HAL_SD_WRITE_DMA_LNKLST_BUF_CPLT_CB_ID : - hsd->Write_DMALnkLstBufCpltCallback = HAL_SDEx_Write_DMALnkLstBufCpltCallback; - break; - case HAL_SD_MSP_INIT_CB_ID : - hsd->MspInitCallback = HAL_SD_MspInit; - break; - case HAL_SD_MSP_DEINIT_CB_ID : - hsd->MspDeInitCallback = HAL_SD_MspDeInit; - break; - default : - /* Update the error code */ - hsd->ErrorCode |= HAL_SD_ERROR_INVALID_CALLBACK; - /* update return status */ - status = HAL_ERROR; - break; - } - } - else if (hsd->State == HAL_SD_STATE_RESET) - { - switch (CallbackID) - { - case HAL_SD_MSP_INIT_CB_ID : - hsd->MspInitCallback = HAL_SD_MspInit; - break; - case HAL_SD_MSP_DEINIT_CB_ID : - hsd->MspDeInitCallback = HAL_SD_MspDeInit; - break; - default : - /* Update the error code */ - hsd->ErrorCode |= HAL_SD_ERROR_INVALID_CALLBACK; - /* update return status */ - status = HAL_ERROR; - break; - } - } - else - { - /* Update the error code */ - hsd->ErrorCode |= HAL_SD_ERROR_INVALID_CALLBACK; - /* update return status */ - status = HAL_ERROR; - } - - return status; -} - -#if (USE_SD_TRANSCEIVER != 0U) -/** - * @brief Register a User SD Transceiver Callback - * To be used instead of the weak (overridden) predefined callback - * @param hsd : SD handle - * @param pCallback : pointer to the Callback function - * @retval status - */ -HAL_StatusTypeDef HAL_SD_RegisterTransceiverCallback(SD_HandleTypeDef *hsd, pSD_TransceiverCallbackTypeDef pCallback) -{ - HAL_StatusTypeDef status = HAL_OK; - - if (pCallback == NULL) - { - /* Update the error code */ - hsd->ErrorCode |= HAL_SD_ERROR_INVALID_CALLBACK; - return HAL_ERROR; - } - - /* Process locked */ - __HAL_LOCK(hsd); - - if (hsd->State == HAL_SD_STATE_READY) - { - hsd->DriveTransceiver_1_8V_Callback = pCallback; - } - else - { - /* Update the error code */ - hsd->ErrorCode |= HAL_SD_ERROR_INVALID_CALLBACK; - /* update return status */ - status = HAL_ERROR; - } - - /* Release Lock */ - __HAL_UNLOCK(hsd); - return status; -} - -/** - * @brief Unregister a User SD Transceiver Callback - * SD Callback is redirected to the weak (overridden) predefined callback - * @param hsd : SD handle - * @retval status - */ -HAL_StatusTypeDef HAL_SD_UnRegisterTransceiverCallback(SD_HandleTypeDef *hsd) -{ - HAL_StatusTypeDef status = HAL_OK; - - /* Process locked */ - __HAL_LOCK(hsd); - - if (hsd->State == HAL_SD_STATE_READY) - { - hsd->DriveTransceiver_1_8V_Callback = HAL_SD_DriveTransceiver_1_8V_Callback; - } - else - { - /* Update the error code */ - hsd->ErrorCode |= HAL_SD_ERROR_INVALID_CALLBACK; - /* update return status */ - status = HAL_ERROR; - } - - /* Release Lock */ - __HAL_UNLOCK(hsd); - return status; -} -#endif /* USE_SD_TRANSCEIVER */ -#endif /* USE_HAL_SD_REGISTER_CALLBACKS */ - -/** - * @} - */ - -/** @addtogroup SD_Exported_Functions_Group3 - * @brief management functions - * -@verbatim - ============================================================================== - ##### Peripheral Control functions ##### - ============================================================================== - [..] - This subsection provides a set of functions allowing to control the SD card - operations and get the related information - -@endverbatim - * @{ - */ - -/** - * @brief Returns information the information of the card which are stored on - * the CID register. - * @param hsd: Pointer to SD handle - * @param pCID: Pointer to a HAL_SD_CardCIDTypeDef structure that - * contains all CID register parameters - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SD_GetCardCID(const SD_HandleTypeDef *hsd, HAL_SD_CardCIDTypeDef *pCID) -{ - pCID->ManufacturerID = (uint8_t)((hsd->CID[0] & 0xFF000000U) >> 24U); - - pCID->OEM_AppliID = (uint16_t)((hsd->CID[0] & 0x00FFFF00U) >> 8U); - - pCID->ProdName1 = (((hsd->CID[0] & 0x000000FFU) << 24U) | ((hsd->CID[1] & 0xFFFFFF00U) >> 8U)); - - pCID->ProdName2 = (uint8_t)(hsd->CID[1] & 0x000000FFU); - - pCID->ProdRev = (uint8_t)((hsd->CID[2] & 0xFF000000U) >> 24U); - - pCID->ProdSN = (((hsd->CID[2] & 0x00FFFFFFU) << 8U) | ((hsd->CID[3] & 0xFF000000U) >> 24U)); - - pCID->Reserved1 = (uint8_t)((hsd->CID[3] & 0x00F00000U) >> 20U); - - pCID->ManufactDate = (uint16_t)((hsd->CID[3] & 0x000FFF00U) >> 8U); - - pCID->CID_CRC = (uint8_t)((hsd->CID[3] & 0x000000FEU) >> 1U); - - pCID->Reserved2 = 1U; - - return HAL_OK; -} - -/** - * @brief Returns information the information of the card which are stored on - * the CSD register. - * @param hsd: Pointer to SD handle - * @param pCSD: Pointer to a HAL_SD_CardCSDTypeDef structure that - * contains all CSD register parameters - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SD_GetCardCSD(SD_HandleTypeDef *hsd, HAL_SD_CardCSDTypeDef *pCSD) -{ - pCSD->CSDStruct = (uint8_t)((hsd->CSD[0] & 0xC0000000U) >> 30U); - - pCSD->SysSpecVersion = (uint8_t)((hsd->CSD[0] & 0x3C000000U) >> 26U); - - pCSD->Reserved1 = (uint8_t)((hsd->CSD[0] & 0x03000000U) >> 24U); - - pCSD->TAAC = (uint8_t)((hsd->CSD[0] & 0x00FF0000U) >> 16U); - - pCSD->NSAC = (uint8_t)((hsd->CSD[0] & 0x0000FF00U) >> 8U); - - pCSD->MaxBusClkFrec = (uint8_t)(hsd->CSD[0] & 0x000000FFU); - - pCSD->CardComdClasses = (uint16_t)((hsd->CSD[1] & 0xFFF00000U) >> 20U); - - pCSD->RdBlockLen = (uint8_t)((hsd->CSD[1] & 0x000F0000U) >> 16U); - - pCSD->PartBlockRead = (uint8_t)((hsd->CSD[1] & 0x00008000U) >> 15U); - - pCSD->WrBlockMisalign = (uint8_t)((hsd->CSD[1] & 0x00004000U) >> 14U); - - pCSD->RdBlockMisalign = (uint8_t)((hsd->CSD[1] & 0x00002000U) >> 13U); - - pCSD->DSRImpl = (uint8_t)((hsd->CSD[1] & 0x00001000U) >> 12U); - - pCSD->Reserved2 = 0U; /*!< Reserved */ - - if (hsd->SdCard.CardType == CARD_SDSC) - { - pCSD->DeviceSize = (((hsd->CSD[1] & 0x000003FFU) << 2U) | ((hsd->CSD[2] & 0xC0000000U) >> 30U)); - - pCSD->MaxRdCurrentVDDMin = (uint8_t)((hsd->CSD[2] & 0x38000000U) >> 27U); - - pCSD->MaxRdCurrentVDDMax = (uint8_t)((hsd->CSD[2] & 0x07000000U) >> 24U); - - pCSD->MaxWrCurrentVDDMin = (uint8_t)((hsd->CSD[2] & 0x00E00000U) >> 21U); - - pCSD->MaxWrCurrentVDDMax = (uint8_t)((hsd->CSD[2] & 0x001C0000U) >> 18U); - - pCSD->DeviceSizeMul = (uint8_t)((hsd->CSD[2] & 0x00038000U) >> 15U); - - hsd->SdCard.BlockNbr = (pCSD->DeviceSize + 1U) ; - hsd->SdCard.BlockNbr *= (1UL << ((pCSD->DeviceSizeMul & 0x07U) + 2U)); - hsd->SdCard.BlockSize = (1UL << (pCSD->RdBlockLen & 0x0FU)); - - hsd->SdCard.LogBlockNbr = (hsd->SdCard.BlockNbr) * ((hsd->SdCard.BlockSize) / BLOCKSIZE); - hsd->SdCard.LogBlockSize = BLOCKSIZE; - } - else if (hsd->SdCard.CardType == CARD_SDHC_SDXC) - { - /* Byte 7 */ - pCSD->DeviceSize = (((hsd->CSD[1] & 0x0000003FU) << 16U) | ((hsd->CSD[2] & 0xFFFF0000U) >> 16U)); - - hsd->SdCard.BlockNbr = ((pCSD->DeviceSize + 1U) * 1024U); - hsd->SdCard.LogBlockNbr = hsd->SdCard.BlockNbr; - hsd->SdCard.BlockSize = BLOCKSIZE; - hsd->SdCard.LogBlockSize = hsd->SdCard.BlockSize; - } - else - { - /* Clear all the static flags */ - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_STATIC_FLAGS); - hsd->ErrorCode |= HAL_SD_ERROR_UNSUPPORTED_FEATURE; - hsd->State = HAL_SD_STATE_READY; - return HAL_ERROR; - } - - pCSD->EraseGrSize = (uint8_t)((hsd->CSD[2] & 0x00004000U) >> 14U); - - pCSD->EraseGrMul = (uint8_t)((hsd->CSD[2] & 0x00003F80U) >> 7U); - - pCSD->WrProtectGrSize = (uint8_t)(hsd->CSD[2] & 0x0000007FU); - - pCSD->WrProtectGrEnable = (uint8_t)((hsd->CSD[3] & 0x80000000U) >> 31U); - - pCSD->ManDeflECC = (uint8_t)((hsd->CSD[3] & 0x60000000U) >> 29U); - - pCSD->WrSpeedFact = (uint8_t)((hsd->CSD[3] & 0x1C000000U) >> 26U); - - pCSD->MaxWrBlockLen = (uint8_t)((hsd->CSD[3] & 0x03C00000U) >> 22U); - - pCSD->WriteBlockPaPartial = (uint8_t)((hsd->CSD[3] & 0x00200000U) >> 21U); - - pCSD->Reserved3 = 0; - - pCSD->ContentProtectAppli = (uint8_t)((hsd->CSD[3] & 0x00010000U) >> 16U); - - pCSD->FileFormatGroup = (uint8_t)((hsd->CSD[3] & 0x00008000U) >> 15U); - - pCSD->CopyFlag = (uint8_t)((hsd->CSD[3] & 0x00004000U) >> 14U); - - pCSD->PermWrProtect = (uint8_t)((hsd->CSD[3] & 0x00002000U) >> 13U); - - pCSD->TempWrProtect = (uint8_t)((hsd->CSD[3] & 0x00001000U) >> 12U); - - pCSD->FileFormat = (uint8_t)((hsd->CSD[3] & 0x00000C00U) >> 10U); - - pCSD->ECC = (uint8_t)((hsd->CSD[3] & 0x00000300U) >> 8U); - - pCSD->CSD_CRC = (uint8_t)((hsd->CSD[3] & 0x000000FEU) >> 1U); - - pCSD->Reserved4 = 1; - - return HAL_OK; -} - -/** - * @brief Gets the SD status info.( shall be called if there is no SD transaction ongoing ) - * @param hsd: Pointer to SD handle - * @param pStatus: Pointer to the HAL_SD_CardStatusTypeDef structure that - * will contain the SD card status information - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SD_GetCardStatus(SD_HandleTypeDef *hsd, HAL_SD_CardStatusTypeDef *pStatus) -{ - uint32_t sd_status[16]; - uint32_t errorstate; - HAL_StatusTypeDef status = HAL_OK; - - if (hsd->State == HAL_SD_STATE_BUSY) - { - return HAL_ERROR; - } - - errorstate = SD_SendSDStatus(hsd, sd_status); - if (errorstate != HAL_SD_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_STATIC_FLAGS); - hsd->ErrorCode |= errorstate; - hsd->State = HAL_SD_STATE_READY; - status = HAL_ERROR; - } - else - { - pStatus->DataBusWidth = (uint8_t)((sd_status[0] & 0xC0U) >> 6U); - - pStatus->SecuredMode = (uint8_t)((sd_status[0] & 0x20U) >> 5U); - - pStatus->CardType = (uint16_t)(((sd_status[0] & 0x00FF0000U) >> 8U) | ((sd_status[0] & 0xFF000000U) >> 24U)); - - pStatus->ProtectedAreaSize = (((sd_status[1] & 0xFFU) << 24U) | ((sd_status[1] & 0xFF00U) << 8U) | - ((sd_status[1] & 0xFF0000U) >> 8U) | ((sd_status[1] & 0xFF000000U) >> 24U)); - - pStatus->SpeedClass = (uint8_t)(sd_status[2] & 0xFFU); - - pStatus->PerformanceMove = (uint8_t)((sd_status[2] & 0xFF00U) >> 8U); - - pStatus->AllocationUnitSize = (uint8_t)((sd_status[2] & 0xF00000U) >> 20U); - - pStatus->EraseSize = (uint16_t)(((sd_status[2] & 0xFF000000U) >> 16U) | (sd_status[3] & 0xFFU)); - - pStatus->EraseTimeout = (uint8_t)((sd_status[3] & 0xFC00U) >> 10U); - - pStatus->EraseOffset = (uint8_t)((sd_status[3] & 0x0300U) >> 8U); - - pStatus->UhsSpeedGrade = (uint8_t)((sd_status[3] & 0x00F0U) >> 4U); - pStatus->UhsAllocationUnitSize = (uint8_t)(sd_status[3] & 0x000FU) ; - pStatus->VideoSpeedClass = (uint8_t)((sd_status[4] & 0xFF000000U) >> 24U); - } - - /* Set Block Size for Card */ - errorstate = SDMMC_CmdBlockLength(hsd->Instance, BLOCKSIZE); - if (errorstate != HAL_SD_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_STATIC_FLAGS); - hsd->ErrorCode = errorstate; - hsd->State = HAL_SD_STATE_READY; - status = HAL_ERROR; - } - - return status; -} - -/** - * @brief Gets the SD card info. - * @param hsd: Pointer to SD handle - * @param pCardInfo: Pointer to the HAL_SD_CardInfoTypeDef structure that - * will contain the SD card status information - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SD_GetCardInfo(const SD_HandleTypeDef *hsd, HAL_SD_CardInfoTypeDef *pCardInfo) -{ - pCardInfo->CardType = (uint32_t)(hsd->SdCard.CardType); - pCardInfo->CardVersion = (uint32_t)(hsd->SdCard.CardVersion); - pCardInfo->Class = (uint32_t)(hsd->SdCard.Class); - pCardInfo->RelCardAdd = (uint32_t)(hsd->SdCard.RelCardAdd); - pCardInfo->BlockNbr = (uint32_t)(hsd->SdCard.BlockNbr); - pCardInfo->BlockSize = (uint32_t)(hsd->SdCard.BlockSize); - pCardInfo->LogBlockNbr = (uint32_t)(hsd->SdCard.LogBlockNbr); - pCardInfo->LogBlockSize = (uint32_t)(hsd->SdCard.LogBlockSize); - - return HAL_OK; -} - -/** - * @brief Enables wide bus operation for the requested card if supported by - * card. - * @param hsd: Pointer to SD handle - * @param WideMode: Specifies the SD card wide bus mode - * This parameter can be one of the following values: - * @arg SDMMC_BUS_WIDE_8B: 8-bit data transfer - * @arg SDMMC_BUS_WIDE_4B: 4-bit data transfer - * @arg SDMMC_BUS_WIDE_1B: 1-bit data transfer - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SD_ConfigWideBusOperation(SD_HandleTypeDef *hsd, uint32_t WideMode) -{ - SDMMC_InitTypeDef Init; - uint32_t errorstate; - uint32_t sdmmc_clk; - - HAL_StatusTypeDef status = HAL_OK; - - /* Check the parameters */ - assert_param(IS_SDMMC_BUS_WIDE(WideMode)); - - /* Change State */ - hsd->State = HAL_SD_STATE_BUSY; - - if (hsd->SdCard.CardType != CARD_SECURED) - { - if (WideMode == SDMMC_BUS_WIDE_8B) - { - hsd->ErrorCode |= HAL_SD_ERROR_UNSUPPORTED_FEATURE; - } - else if (WideMode == SDMMC_BUS_WIDE_4B) - { - errorstate = SD_WideBus_Enable(hsd); - - hsd->ErrorCode |= errorstate; - } - else if (WideMode == SDMMC_BUS_WIDE_1B) - { - errorstate = SD_WideBus_Disable(hsd); - - hsd->ErrorCode |= errorstate; - } - else - { - /* WideMode is not a valid argument*/ - hsd->ErrorCode |= HAL_SD_ERROR_PARAM; - } - } - else - { - /* SD Card does not support this feature */ - hsd->ErrorCode |= HAL_SD_ERROR_UNSUPPORTED_FEATURE; - } - - if (hsd->ErrorCode != HAL_SD_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_STATIC_FLAGS); - status = HAL_ERROR; - } - else - { - if (hsd->Instance == SDMMC1) - { - sdmmc_clk = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_SDMMC1); - } - else - { - sdmmc_clk = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_SDMMC2); - } - if (sdmmc_clk != 0U) - { - /* Configure the SDMMC peripheral */ - Init.ClockEdge = hsd->Init.ClockEdge; - Init.ClockPowerSave = hsd->Init.ClockPowerSave; - Init.BusWide = WideMode; - Init.HardwareFlowControl = hsd->Init.HardwareFlowControl; - - /* Check if user Clock div < Normal speed 25Mhz, no change in Clockdiv */ - if (hsd->Init.ClockDiv >= (sdmmc_clk / (2U * SD_NORMAL_SPEED_FREQ))) - { - Init.ClockDiv = hsd->Init.ClockDiv; - } - else if (hsd->SdCard.CardSpeed == CARD_ULTRA_HIGH_SPEED) - { - /* UltraHigh speed SD card,user Clock div */ - Init.ClockDiv = hsd->Init.ClockDiv; - } - else if (hsd->SdCard.CardSpeed == CARD_HIGH_SPEED) - { - /* High speed SD card, Max Frequency = 50Mhz */ - if (hsd->Init.ClockDiv == 0U) - { - if (sdmmc_clk > SD_HIGH_SPEED_FREQ) - { - Init.ClockDiv = sdmmc_clk / (2U * SD_HIGH_SPEED_FREQ); - } - else - { - Init.ClockDiv = hsd->Init.ClockDiv; - } - } - else - { - if ((sdmmc_clk / (2U * hsd->Init.ClockDiv)) > SD_HIGH_SPEED_FREQ) - { - Init.ClockDiv = sdmmc_clk / (2U * SD_HIGH_SPEED_FREQ); - } - else - { - Init.ClockDiv = hsd->Init.ClockDiv; - } - } - } - else - { - /* No High speed SD card, Max Frequency = 25Mhz */ - if (hsd->Init.ClockDiv == 0U) - { - if (sdmmc_clk > SD_NORMAL_SPEED_FREQ) - { - Init.ClockDiv = sdmmc_clk / (2U * SD_NORMAL_SPEED_FREQ); - } - else - { - Init.ClockDiv = hsd->Init.ClockDiv; - } - } - else - { - if ((sdmmc_clk / (2U * hsd->Init.ClockDiv)) > SD_NORMAL_SPEED_FREQ) - { - Init.ClockDiv = sdmmc_clk / (2U * SD_NORMAL_SPEED_FREQ); - } - else - { - Init.ClockDiv = hsd->Init.ClockDiv; - } - } - } - -#if (USE_SD_TRANSCEIVER != 0U) - Init.TranceiverPresent = hsd->Init.TranceiverPresent; -#endif /* USE_SD_TRANSCEIVER */ - - (void)SDMMC_Init(hsd->Instance, Init); - } - else - { - hsd->ErrorCode |= SDMMC_ERROR_INVALID_PARAMETER; - status = HAL_ERROR; - } - } - - /* Set Block Size for Card */ - errorstate = SDMMC_CmdBlockLength(hsd->Instance, BLOCKSIZE); - if (errorstate != HAL_SD_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_STATIC_FLAGS); - hsd->ErrorCode |= errorstate; - status = HAL_ERROR; - } - - /* Change State */ - hsd->State = HAL_SD_STATE_READY; - - return status; -} - -/** - * @brief Configure the speed bus mode - * @param hsd: Pointer to the SD handle - * @param SpeedMode: Specifies the SD card speed bus mode - * This parameter can be one of the following values: - * @arg SDMMC_SPEED_MODE_AUTO: Max speed mode supported by the card - * @arg SDMMC_SPEED_MODE_DEFAULT: Default Speed/SDR12 mode - * @arg SDMMC_SPEED_MODE_HIGH: High Speed/SDR25 mode - * @arg SDMMC_SPEED_MODE_ULTRA: Ultra high speed mode - * @retval HAL status - */ - -HAL_StatusTypeDef HAL_SD_ConfigSpeedBusOperation(SD_HandleTypeDef *hsd, uint32_t SpeedMode) -{ - uint32_t tickstart; - uint32_t errorstate; - HAL_StatusTypeDef status = HAL_OK; - - /* Check the parameters */ - assert_param(IS_SDMMC_SPEED_MODE(SpeedMode)); - /* Change State */ - hsd->State = HAL_SD_STATE_BUSY; - -#if (USE_SD_TRANSCEIVER != 0U) - if (hsd->Init.TranceiverPresent == SDMMC_TRANSCEIVER_PRESENT) - { - switch (SpeedMode) - { - case SDMMC_SPEED_MODE_AUTO: - { - if ((hsd->SdCard.CardSpeed == CARD_ULTRA_HIGH_SPEED) || - (hsd->SdCard.CardType == CARD_SDHC_SDXC)) - { - hsd->Instance->CLKCR |= SDMMC_CLKCR_BUSSPEED; - /* Enable Ultra High Speed */ - if (SD_UltraHighSpeed(hsd, SDMMC_SDR104_SWITCH_PATTERN) != HAL_SD_ERROR_NONE) - { - if (SD_SwitchSpeed(hsd, SDMMC_SDR25_SWITCH_PATTERN) != HAL_SD_ERROR_NONE) - { - hsd->ErrorCode |= HAL_SD_ERROR_UNSUPPORTED_FEATURE; - status = HAL_ERROR; - } - } - } - else if (hsd->SdCard.CardSpeed == CARD_HIGH_SPEED) - { - /* Enable High Speed */ - if (SD_SwitchSpeed(hsd, SDMMC_SDR25_SWITCH_PATTERN) != HAL_SD_ERROR_NONE) - { - hsd->ErrorCode |= HAL_SD_ERROR_UNSUPPORTED_FEATURE; - status = HAL_ERROR; - } - } - else - { - /*Nothing to do, Use defaultSpeed */ - } - break; - } - case SDMMC_SPEED_MODE_ULTRA_SDR104: - { - if ((hsd->SdCard.CardSpeed == CARD_ULTRA_HIGH_SPEED) || - (hsd->SdCard.CardType == CARD_SDHC_SDXC)) - { - /* Enable UltraHigh Speed */ - if (SD_UltraHighSpeed(hsd, SDMMC_SDR104_SWITCH_PATTERN) != HAL_SD_ERROR_NONE) - { - hsd->ErrorCode |= HAL_SD_ERROR_UNSUPPORTED_FEATURE; - status = HAL_ERROR; - } - hsd->Instance->CLKCR |= SDMMC_CLKCR_BUSSPEED; - } - else - { - hsd->ErrorCode |= HAL_SD_ERROR_UNSUPPORTED_FEATURE; - status = HAL_ERROR; - } - break; - } - case SDMMC_SPEED_MODE_ULTRA_SDR50: - { - if ((hsd->SdCard.CardSpeed == CARD_ULTRA_HIGH_SPEED) || - (hsd->SdCard.CardType == CARD_SDHC_SDXC)) - { - /* Enable UltraHigh Speed */ - if (SD_UltraHighSpeed(hsd, SDMMC_SDR50_SWITCH_PATTERN) != HAL_SD_ERROR_NONE) - { - hsd->ErrorCode |= HAL_SD_ERROR_UNSUPPORTED_FEATURE; - status = HAL_ERROR; - } - hsd->Instance->CLKCR |= SDMMC_CLKCR_BUSSPEED; - } - else - { - hsd->ErrorCode |= HAL_SD_ERROR_UNSUPPORTED_FEATURE; - status = HAL_ERROR; - } - break; - } - case SDMMC_SPEED_MODE_DDR: - { - if ((hsd->SdCard.CardSpeed == CARD_ULTRA_HIGH_SPEED) || - (hsd->SdCard.CardType == CARD_SDHC_SDXC)) - { - /* Enable DDR Mode*/ - if (SD_DDR_Mode(hsd) != HAL_SD_ERROR_NONE) - { - hsd->ErrorCode |= HAL_SD_ERROR_UNSUPPORTED_FEATURE; - status = HAL_ERROR; - } - hsd->Instance->CLKCR |= SDMMC_CLKCR_BUSSPEED | SDMMC_CLKCR_DDR; - } - else - { - hsd->ErrorCode |= HAL_SD_ERROR_UNSUPPORTED_FEATURE; - status = HAL_ERROR; - } - break; - } - case SDMMC_SPEED_MODE_HIGH: - { - if ((hsd->SdCard.CardSpeed == CARD_ULTRA_HIGH_SPEED) || - (hsd->SdCard.CardSpeed == CARD_HIGH_SPEED) || - (hsd->SdCard.CardType == CARD_SDHC_SDXC)) - { - /* Enable High Speed */ - if (SD_SwitchSpeed(hsd, SDMMC_SDR25_SWITCH_PATTERN) != HAL_SD_ERROR_NONE) - { - hsd->ErrorCode |= HAL_SD_ERROR_UNSUPPORTED_FEATURE; - status = HAL_ERROR; - } - } - else - { - hsd->ErrorCode |= HAL_SD_ERROR_UNSUPPORTED_FEATURE; - status = HAL_ERROR; - } - break; - } - case SDMMC_SPEED_MODE_DEFAULT: - { - /* Switch to default Speed */ - if (SD_SwitchSpeed(hsd, SDMMC_SDR12_SWITCH_PATTERN) != HAL_SD_ERROR_NONE) - { - hsd->ErrorCode |= HAL_SD_ERROR_UNSUPPORTED_FEATURE; - status = HAL_ERROR; - } - - break; - } - default: - hsd->ErrorCode |= HAL_SD_ERROR_PARAM; - status = HAL_ERROR; - break; - } - } - else - { - switch (SpeedMode) - { - case SDMMC_SPEED_MODE_AUTO: - { - if ((hsd->SdCard.CardSpeed == CARD_ULTRA_HIGH_SPEED) || - (hsd->SdCard.CardSpeed == CARD_HIGH_SPEED) || - (hsd->SdCard.CardType == CARD_SDHC_SDXC)) - { - /* Enable High Speed */ - if (SD_SwitchSpeed(hsd, SDMMC_SDR25_SWITCH_PATTERN) != HAL_SD_ERROR_NONE) - { - hsd->ErrorCode |= HAL_SD_ERROR_UNSUPPORTED_FEATURE; - status = HAL_ERROR; - } - } - else - { - /*Nothing to do, Use defaultSpeed */ - } - break; - } - case SDMMC_SPEED_MODE_HIGH: - { - if ((hsd->SdCard.CardSpeed == CARD_ULTRA_HIGH_SPEED) || - (hsd->SdCard.CardSpeed == CARD_HIGH_SPEED) || - (hsd->SdCard.CardType == CARD_SDHC_SDXC)) - { - /* Enable High Speed */ - if (SD_SwitchSpeed(hsd, SDMMC_SDR25_SWITCH_PATTERN) != HAL_SD_ERROR_NONE) - { - hsd->ErrorCode |= HAL_SD_ERROR_UNSUPPORTED_FEATURE; - status = HAL_ERROR; - } - } - else - { - hsd->ErrorCode |= HAL_SD_ERROR_UNSUPPORTED_FEATURE; - status = HAL_ERROR; - } - break; - } - case SDMMC_SPEED_MODE_DEFAULT: - { - /* Switch to default Speed */ - if (SD_SwitchSpeed(hsd, SDMMC_SDR12_SWITCH_PATTERN) != HAL_SD_ERROR_NONE) - { - hsd->ErrorCode |= HAL_SD_ERROR_UNSUPPORTED_FEATURE; - status = HAL_ERROR; - } - - break; - } - case SDMMC_SPEED_MODE_ULTRA: /*not valid without transceiver*/ - default: - hsd->ErrorCode |= HAL_SD_ERROR_PARAM; - status = HAL_ERROR; - break; - } - } -#else - switch (SpeedMode) - { - case SDMMC_SPEED_MODE_AUTO: - { - if ((hsd->SdCard.CardSpeed == CARD_ULTRA_HIGH_SPEED) || - (hsd->SdCard.CardSpeed == CARD_HIGH_SPEED) || - (hsd->SdCard.CardType == CARD_SDHC_SDXC)) - { - /* Enable High Speed */ - if (SD_SwitchSpeed(hsd, SDMMC_SDR25_SWITCH_PATTERN) != HAL_SD_ERROR_NONE) - { - hsd->ErrorCode |= HAL_SD_ERROR_UNSUPPORTED_FEATURE; - status = HAL_ERROR; - } - } - else - { - /*Nothing to do, Use defaultSpeed */ - } - break; - } - case SDMMC_SPEED_MODE_HIGH: - { - if ((hsd->SdCard.CardSpeed == CARD_ULTRA_HIGH_SPEED) || - (hsd->SdCard.CardSpeed == CARD_HIGH_SPEED) || - (hsd->SdCard.CardType == CARD_SDHC_SDXC)) - { - /* Enable High Speed */ - if (SD_SwitchSpeed(hsd, SDMMC_SDR25_SWITCH_PATTERN) != HAL_SD_ERROR_NONE) - { - hsd->ErrorCode |= HAL_SD_ERROR_UNSUPPORTED_FEATURE; - status = HAL_ERROR; - } - } - else - { - hsd->ErrorCode |= HAL_SD_ERROR_UNSUPPORTED_FEATURE; - status = HAL_ERROR; - } - break; - } - case SDMMC_SPEED_MODE_DEFAULT: - { - /* Switch to default Speed */ - if (SD_SwitchSpeed(hsd, SDMMC_SDR12_SWITCH_PATTERN) != HAL_SD_ERROR_NONE) - { - hsd->ErrorCode |= HAL_SD_ERROR_UNSUPPORTED_FEATURE; - status = HAL_ERROR; - } - - break; - } - case SDMMC_SPEED_MODE_ULTRA: /*not valid without transceiver*/ - default: - hsd->ErrorCode |= HAL_SD_ERROR_PARAM; - status = HAL_ERROR; - break; - } -#endif /* USE_SD_TRANSCEIVER */ - - /* Verify that SD card is ready to use after Speed mode switch*/ - tickstart = HAL_GetTick(); - while ((HAL_SD_GetCardState(hsd) != HAL_SD_CARD_TRANSFER)) - { - if ((HAL_GetTick() - tickstart) >= SDMMC_SWDATATIMEOUT) - { - hsd->ErrorCode = HAL_SD_ERROR_TIMEOUT; - hsd->State = HAL_SD_STATE_READY; - return HAL_TIMEOUT; - } - } - - /* Set Block Size for Card */ - errorstate = SDMMC_CmdBlockLength(hsd->Instance, BLOCKSIZE); - if (errorstate != HAL_SD_ERROR_NONE) - { - /* Clear all the static flags */ - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_STATIC_FLAGS); - hsd->ErrorCode |= errorstate; - status = HAL_ERROR; - } - - /* Change State */ - hsd->State = HAL_SD_STATE_READY; - return status; -} - -/** - * @brief Gets the current sd card data state. - * @param hsd: pointer to SD handle - * @retval Card state - */ -HAL_SD_CardStateTypeDef HAL_SD_GetCardState(SD_HandleTypeDef *hsd) -{ - uint32_t cardstate; - uint32_t errorstate; - uint32_t resp1 = 0; - - errorstate = SD_SendStatus(hsd, &resp1); - if (errorstate != HAL_SD_ERROR_NONE) - { - hsd->ErrorCode |= errorstate; - } - - cardstate = ((resp1 >> 9U) & 0x0FU); - - return (HAL_SD_CardStateTypeDef)cardstate; -} - -/** - * @brief Abort the current transfer and disable the SD. - * @param hsd: pointer to a SD_HandleTypeDef structure that contains - * the configuration information for SD module. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SD_Abort(SD_HandleTypeDef *hsd) -{ - uint32_t error_code; - uint32_t tickstart; - - if (hsd->State == HAL_SD_STATE_BUSY) - { - /* DIsable All interrupts */ - __HAL_SD_DISABLE_IT(hsd, SDMMC_IT_DATAEND | SDMMC_IT_DCRCFAIL | SDMMC_IT_DTIMEOUT | \ - SDMMC_IT_TXUNDERR | SDMMC_IT_RXOVERR); - __SDMMC_CMDTRANS_DISABLE(hsd->Instance); - - /*we will send the CMD12 in all cases in order to stop the data transfers*/ - /*In case the data transfer just finished , the external memory will not respond - and will return HAL_SD_ERROR_CMD_RSP_TIMEOUT*/ - /*In case the data transfer aborted , the external memory will respond and will return HAL_SD_ERROR_NONE*/ - /*Other scenario will return HAL_ERROR*/ - - hsd->ErrorCode = SDMMC_CmdStopTransfer(hsd->Instance); - error_code = hsd->ErrorCode; - if ((error_code != HAL_SD_ERROR_NONE) && (error_code != HAL_SD_ERROR_CMD_RSP_TIMEOUT)) - { - return HAL_ERROR; - } - - tickstart = HAL_GetTick(); - if ((hsd->Instance->DCTRL & SDMMC_DCTRL_DTDIR) == SDMMC_TRANSFER_DIR_TO_CARD) - { - if (hsd->ErrorCode == HAL_SD_ERROR_NONE) - { - while (!__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_DABORT | SDMMC_FLAG_BUSYD0END)) - { - if ((HAL_GetTick() - tickstart) >= SDMMC_SWDATATIMEOUT) - { - hsd->ErrorCode = HAL_SD_ERROR_TIMEOUT; - hsd->State = HAL_SD_STATE_READY; - return HAL_TIMEOUT; - } - } - } - - if (hsd->ErrorCode == HAL_SD_ERROR_CMD_RSP_TIMEOUT) - { - while (!__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_DATAEND)) - { - if ((HAL_GetTick() - tickstart) >= SDMMC_SWDATATIMEOUT) - { - hsd->ErrorCode = HAL_SD_ERROR_TIMEOUT; - hsd->State = HAL_SD_STATE_READY; - return HAL_TIMEOUT; - } - } - } - } - else if ((hsd->Instance->DCTRL & SDMMC_DCTRL_DTDIR) == SDMMC_TRANSFER_DIR_TO_SDMMC) - { - while (!__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_DABORT | SDMMC_FLAG_DATAEND)) - { - if ((HAL_GetTick() - tickstart) >= SDMMC_SWDATATIMEOUT) - { - hsd->ErrorCode = HAL_SD_ERROR_TIMEOUT; - hsd->State = HAL_SD_STATE_READY; - return HAL_TIMEOUT; - } - } - } - else - { - /* Nothing to do*/ - } - - /*The reason of all these while conditions previously is that we need to wait the SDMMC and clear - the appropriate flags that will be set depending of the abort/non abort of the memory */ - /*Not waiting the SDMMC flags will cause the next SDMMC_DISABLE_IDMA to not get cleared - and will result in next SDMMC read/write operation to fail */ - - /*SDMMC ready for clear data flags*/ - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_FLAG_BUSYD0END); - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_STATIC_DATA_FLAGS); - /* If IDMA Context, disable Internal DMA */ - hsd->Instance->IDMACTRL = SDMMC_DISABLE_IDMA; - - hsd->State = HAL_SD_STATE_READY; - - /* Initialize the SD operation */ - hsd->Context = SD_CONTEXT_NONE; - } - return HAL_OK; -} - -/** - * @brief Abort the current transfer and disable the SD (IT mode). - * @param hsd: pointer to a SD_HandleTypeDef structure that contains - * the configuration information for SD module. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SD_Abort_IT(SD_HandleTypeDef *hsd) -{ - HAL_SD_CardStateTypeDef CardState; - - /* Disable All interrupts */ - __HAL_SD_DISABLE_IT(hsd, SDMMC_IT_DATAEND | SDMMC_IT_DCRCFAIL | SDMMC_IT_DTIMEOUT | \ - SDMMC_IT_TXUNDERR | SDMMC_IT_RXOVERR); - - /* If IDMA Context, disable Internal DMA */ - hsd->Instance->IDMACTRL = SDMMC_DISABLE_IDMA; - - /* Clear All flags */ - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_STATIC_DATA_FLAGS); - - CardState = HAL_SD_GetCardState(hsd); - hsd->State = HAL_SD_STATE_READY; - - if ((CardState == HAL_SD_CARD_RECEIVING) || (CardState == HAL_SD_CARD_SENDING)) - { - hsd->ErrorCode = SDMMC_CmdStopTransfer(hsd->Instance); - } - - if (hsd->ErrorCode != HAL_SD_ERROR_NONE) - { - return HAL_ERROR; - } - else - { -#if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U) - hsd->AbortCpltCallback(hsd); -#else - HAL_SD_AbortCallback(hsd); -#endif /* USE_HAL_SD_REGISTER_CALLBACKS */ - } - - return HAL_OK; -} - -/** - * @} - */ - -/** - * @} - */ - -/* Private function ----------------------------------------------------------*/ -/** @addtogroup SD_Private_Functions - * @{ - */ - -/** - * @brief Initializes the sd card. - * @param hsd: Pointer to SD handle - * @retval SD Card error state - */ -static uint32_t SD_InitCard(SD_HandleTypeDef *hsd) -{ - HAL_SD_CardCSDTypeDef CSD; - uint32_t errorstate; - uint16_t sd_rca = 0U; - uint32_t tickstart = HAL_GetTick(); - - /* Check the power State */ - if (SDMMC_GetPowerState(hsd->Instance) == 0U) - { - /* Power off */ - return HAL_SD_ERROR_REQUEST_NOT_APPLICABLE; - } - - if (hsd->SdCard.CardType != CARD_SECURED) - { - /* Send CMD2 ALL_SEND_CID */ - errorstate = SDMMC_CmdSendCID(hsd->Instance); - if (errorstate != HAL_SD_ERROR_NONE) - { - return errorstate; - } - else - { - /* Get Card identification number data */ - hsd->CID[0U] = SDMMC_GetResponse(hsd->Instance, SDMMC_RESP1); - hsd->CID[1U] = SDMMC_GetResponse(hsd->Instance, SDMMC_RESP2); - hsd->CID[2U] = SDMMC_GetResponse(hsd->Instance, SDMMC_RESP3); - hsd->CID[3U] = SDMMC_GetResponse(hsd->Instance, SDMMC_RESP4); - } - } - - if (hsd->SdCard.CardType != CARD_SECURED) - { - /* Send CMD3 SET_REL_ADDR with argument 0 */ - /* SD Card publishes its RCA. */ - while (sd_rca == 0U) - { - errorstate = SDMMC_CmdSetRelAdd(hsd->Instance, &sd_rca); - if (errorstate != HAL_SD_ERROR_NONE) - { - return errorstate; - } - if ((HAL_GetTick() - tickstart) >= SDMMC_CMDTIMEOUT) - { - return HAL_SD_ERROR_TIMEOUT; - } - } - } - if (hsd->SdCard.CardType != CARD_SECURED) - { - /* Get the SD card RCA */ - hsd->SdCard.RelCardAdd = sd_rca; - - /* Send CMD9 SEND_CSD with argument as card's RCA */ - errorstate = SDMMC_CmdSendCSD(hsd->Instance, (uint32_t)(hsd->SdCard.RelCardAdd << 16U)); - if (errorstate != HAL_SD_ERROR_NONE) - { - return errorstate; - } - else - { - /* Get Card Specific Data */ - hsd->CSD[0U] = SDMMC_GetResponse(hsd->Instance, SDMMC_RESP1); - hsd->CSD[1U] = SDMMC_GetResponse(hsd->Instance, SDMMC_RESP2); - hsd->CSD[2U] = SDMMC_GetResponse(hsd->Instance, SDMMC_RESP3); - hsd->CSD[3U] = SDMMC_GetResponse(hsd->Instance, SDMMC_RESP4); - } - } - - /* Get the Card Class */ - hsd->SdCard.Class = (SDMMC_GetResponse(hsd->Instance, SDMMC_RESP2) >> 20U); - - /* Get CSD parameters */ - if (HAL_SD_GetCardCSD(hsd, &CSD) != HAL_OK) - { - return HAL_SD_ERROR_UNSUPPORTED_FEATURE; - } - - /* Select the Card */ - errorstate = SDMMC_CmdSelDesel(hsd->Instance, (uint32_t)(((uint32_t)hsd->SdCard.RelCardAdd) << 16U)); - if (errorstate != HAL_SD_ERROR_NONE) - { - return errorstate; - } - - /* All cards are initialized */ - return HAL_SD_ERROR_NONE; -} - -/** - * @brief Enquires cards about their operating voltage and configures clock - * controls and stores SD information that will be needed in future - * in the SD handle. - * @param hsd: Pointer to SD handle - * @retval error state - */ -static uint32_t SD_PowerON(SD_HandleTypeDef *hsd) -{ - __IO uint32_t count = 0U; - uint32_t response = 0U; - uint32_t validvoltage = 0U; - uint32_t errorstate; -#if (USE_SD_TRANSCEIVER != 0U) - uint32_t tickstart = HAL_GetTick(); -#endif /* USE_SD_TRANSCEIVER */ - - /* CMD0: GO_IDLE_STATE */ - errorstate = SDMMC_CmdGoIdleState(hsd->Instance); - if (errorstate != HAL_SD_ERROR_NONE) - { - return errorstate; - } - - /* CMD8: SEND_IF_COND: Command available only on V2.0 cards */ - errorstate = SDMMC_CmdOperCond(hsd->Instance); - if (errorstate == SDMMC_ERROR_CMD_RSP_TIMEOUT) /* No response to CMD8 */ - { - hsd->SdCard.CardVersion = CARD_V1_X; - /* CMD0: GO_IDLE_STATE */ - errorstate = SDMMC_CmdGoIdleState(hsd->Instance); - if (errorstate != HAL_SD_ERROR_NONE) - { - return errorstate; - } - - } - else - { - hsd->SdCard.CardVersion = CARD_V2_X; - } - - if (hsd->SdCard.CardVersion == CARD_V2_X) - { - /* SEND CMD55 APP_CMD with RCA as 0 */ - errorstate = SDMMC_CmdAppCommand(hsd->Instance, 0); - if (errorstate != HAL_SD_ERROR_NONE) - { - return HAL_SD_ERROR_UNSUPPORTED_FEATURE; - } - } - /* SD CARD */ - /* Send ACMD41 SD_APP_OP_COND with Argument 0x80100000 */ - while ((count < SDMMC_MAX_VOLT_TRIAL) && (validvoltage == 0U)) - { - /* SEND CMD55 APP_CMD with RCA as 0 */ - errorstate = SDMMC_CmdAppCommand(hsd->Instance, 0); - if (errorstate != HAL_SD_ERROR_NONE) - { - return errorstate; - } - - /* Send CMD41 */ - errorstate = SDMMC_CmdAppOperCommand(hsd->Instance, SDMMC_VOLTAGE_WINDOW_SD | SDMMC_HIGH_CAPACITY | - SD_SWITCH_1_8V_CAPACITY); - if (errorstate != HAL_SD_ERROR_NONE) - { - return HAL_SD_ERROR_UNSUPPORTED_FEATURE; - } - - /* Get command response */ - response = SDMMC_GetResponse(hsd->Instance, SDMMC_RESP1); - - /* Get operating voltage*/ - validvoltage = (((response >> 31U) == 1U) ? 1U : 0U); - - count++; - } - - if (count >= SDMMC_MAX_VOLT_TRIAL) - { - return HAL_SD_ERROR_INVALID_VOLTRANGE; - } - - /* Set default card type */ - hsd->SdCard.CardType = CARD_SDSC; - - if ((response & SDMMC_HIGH_CAPACITY) == SDMMC_HIGH_CAPACITY) - { - hsd->SdCard.CardType = CARD_SDHC_SDXC; -#if (USE_SD_TRANSCEIVER != 0U) - if (hsd->Init.TranceiverPresent == SDMMC_TRANSCEIVER_PRESENT) - { - if ((response & SD_SWITCH_1_8V_CAPACITY) == SD_SWITCH_1_8V_CAPACITY) - { - hsd->SdCard.CardSpeed = CARD_ULTRA_HIGH_SPEED; - - /* Start switching procedue */ - hsd->Instance->POWER |= SDMMC_POWER_VSWITCHEN; - - /* Send CMD11 to switch 1.8V mode */ - errorstate = SDMMC_CmdVoltageSwitch(hsd->Instance); - if (errorstate != HAL_SD_ERROR_NONE) - { - return errorstate; - } - - /* Check to CKSTOP */ - while ((hsd->Instance->STA & SDMMC_FLAG_CKSTOP) != SDMMC_FLAG_CKSTOP) - { - if ((HAL_GetTick() - tickstart) >= SDMMC_SWDATATIMEOUT) - { - return HAL_SD_ERROR_TIMEOUT; - } - } - - /* Clear CKSTOP Flag */ - hsd->Instance->ICR = SDMMC_FLAG_CKSTOP; - - /* Check to BusyD0 */ - if ((hsd->Instance->STA & SDMMC_FLAG_BUSYD0) != SDMMC_FLAG_BUSYD0) - { - /* Error when activate Voltage Switch in SDMMC Peripheral */ - return SDMMC_ERROR_UNSUPPORTED_FEATURE; - } - else - { - /* Enable Transceiver Switch PIN */ -#if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U) - hsd->DriveTransceiver_1_8V_Callback(SET); -#else - HAL_SD_DriveTransceiver_1_8V_Callback(SET); -#endif /* USE_HAL_SD_REGISTER_CALLBACKS */ - - /* Switch ready */ - hsd->Instance->POWER |= SDMMC_POWER_VSWITCH; - - /* Check VSWEND Flag */ - while ((hsd->Instance->STA & SDMMC_FLAG_VSWEND) != SDMMC_FLAG_VSWEND) - { - if ((HAL_GetTick() - tickstart) >= SDMMC_SWDATATIMEOUT) - { - return HAL_SD_ERROR_TIMEOUT; - } - } - - /* Clear VSWEND Flag */ - hsd->Instance->ICR = SDMMC_FLAG_VSWEND; - - /* Check BusyD0 status */ - if ((hsd->Instance->STA & SDMMC_FLAG_BUSYD0) == SDMMC_FLAG_BUSYD0) - { - /* Error when enabling 1.8V mode */ - return HAL_SD_ERROR_INVALID_VOLTRANGE; - } - /* Switch to 1.8V OK */ - - /* Disable VSWITCH FLAG from SDMMC Peripheral */ - hsd->Instance->POWER = 0x13U; - - /* Clean Status flags */ - hsd->Instance->ICR = 0xFFFFFFFFU; - } - } - } -#endif /* USE_SD_TRANSCEIVER */ - } - - return HAL_SD_ERROR_NONE; -} - -/** - * @brief Turns the SDMMC output signals off. - * @param hsd: Pointer to SD handle - * @retval None - */ -static void SD_PowerOFF(SD_HandleTypeDef *hsd) -{ - /* Set Power State to OFF */ - (void)SDMMC_PowerState_OFF(hsd->Instance); -} - -/** - * @brief Send Status info command. - * @param hsd: pointer to SD handle - * @param pSDstatus: Pointer to the buffer that will contain the SD card status - * SD Status register) - * @retval error state - */ -static uint32_t SD_SendSDStatus(SD_HandleTypeDef *hsd, uint32_t *pSDstatus) -{ - SDMMC_DataInitTypeDef config; - uint32_t errorstate; - uint32_t tickstart = HAL_GetTick(); - uint32_t count = 0; - uint32_t *pData = pSDstatus; - - /* Check SD response */ - if ((SDMMC_GetResponse(hsd->Instance, SDMMC_RESP1) & SDMMC_CARD_LOCKED) == SDMMC_CARD_LOCKED) - { - return HAL_SD_ERROR_LOCK_UNLOCK_FAILED; - } - - /* Set block size for card if it is not equal to current block size for card */ - errorstate = SDMMC_CmdBlockLength(hsd->Instance, 64U); - if (errorstate != HAL_SD_ERROR_NONE) - { - hsd->ErrorCode |= HAL_SD_ERROR_NONE; - return errorstate; - } - - /* Send CMD55 */ - errorstate = SDMMC_CmdAppCommand(hsd->Instance, (uint32_t)(hsd->SdCard.RelCardAdd << 16U)); - if (errorstate != HAL_SD_ERROR_NONE) - { - hsd->ErrorCode |= HAL_SD_ERROR_NONE; - return errorstate; - } - - /* Configure the SD DPSM (Data Path State Machine) */ - config.DataTimeOut = SDMMC_DATATIMEOUT; - config.DataLength = 64U; - config.DataBlockSize = SDMMC_DATABLOCK_SIZE_64B; - config.TransferDir = SDMMC_TRANSFER_DIR_TO_SDMMC; - config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK; - config.DPSM = SDMMC_DPSM_ENABLE; - (void)SDMMC_ConfigData(hsd->Instance, &config); - - /* Send ACMD13 (SD_APP_STAUS) with argument as card's RCA */ - errorstate = SDMMC_CmdStatusRegister(hsd->Instance); - if (errorstate != HAL_SD_ERROR_NONE) - { - hsd->ErrorCode |= HAL_SD_ERROR_NONE; - return errorstate; - } - - /* Get status data */ - while (!__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_RXOVERR | SDMMC_FLAG_DCRCFAIL | SDMMC_FLAG_DTIMEOUT | SDMMC_FLAG_DATAEND)) - { - if ((!__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_RXFIFOE)) && (count < 16U)) - { - *pData = SDMMC_ReadFIFO(hsd->Instance); - pData++; - count++; - } - - if ((HAL_GetTick() - tickstart) >= SDMMC_SWDATATIMEOUT) - { - return HAL_SD_ERROR_TIMEOUT; - } - } - - if (__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_DTIMEOUT)) - { - return HAL_SD_ERROR_DATA_TIMEOUT; - } - else if (__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_DCRCFAIL)) - { - return HAL_SD_ERROR_DATA_CRC_FAIL; - } - else if (__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_RXOVERR)) - { - return HAL_SD_ERROR_RX_OVERRUN; - } - else - { - /* Nothing to do */ - } - - while ((__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_DPSMACT))) - { - *pData = SDMMC_ReadFIFO(hsd->Instance); - pData++; - - if ((HAL_GetTick() - tickstart) >= SDMMC_SWDATATIMEOUT) - { - return HAL_SD_ERROR_TIMEOUT; - } - } - - /* Clear all the static status flags*/ - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_STATIC_DATA_FLAGS); - - return HAL_SD_ERROR_NONE; -} - -/** - * @brief Returns the current card's status. - * @param hsd: Pointer to SD handle - * @param pCardStatus: pointer to the buffer that will contain the SD card - * status (Card Status register) - * @retval error state - */ -static uint32_t SD_SendStatus(SD_HandleTypeDef *hsd, uint32_t *pCardStatus) -{ - uint32_t errorstate; - - if (pCardStatus == NULL) - { - return HAL_SD_ERROR_PARAM; - } - - /* Send Status command */ - errorstate = SDMMC_CmdSendStatus(hsd->Instance, (uint32_t)(hsd->SdCard.RelCardAdd << 16U)); - if (errorstate != HAL_SD_ERROR_NONE) - { - return errorstate; - } - - /* Get SD card status */ - *pCardStatus = SDMMC_GetResponse(hsd->Instance, SDMMC_RESP1); - - return HAL_SD_ERROR_NONE; -} - -/** - * @brief Enables the SDMMC wide bus mode. - * @param hsd: pointer to SD handle - * @retval error state - */ -static uint32_t SD_WideBus_Enable(SD_HandleTypeDef *hsd) -{ - uint32_t scr[2U] = {0UL, 0UL}; - uint32_t errorstate; - - if ((SDMMC_GetResponse(hsd->Instance, SDMMC_RESP1) & SDMMC_CARD_LOCKED) == SDMMC_CARD_LOCKED) - { - return HAL_SD_ERROR_LOCK_UNLOCK_FAILED; - } - - /* Get SCR Register */ - errorstate = SD_FindSCR(hsd, scr); - if (errorstate != HAL_SD_ERROR_NONE) - { - return errorstate; - } - - /* If requested card supports wide bus operation */ - if ((scr[1U] & SDMMC_WIDE_BUS_SUPPORT) != SDMMC_ALLZERO) - { - /* Send CMD55 APP_CMD with argument as card's RCA.*/ - errorstate = SDMMC_CmdAppCommand(hsd->Instance, (uint32_t)(hsd->SdCard.RelCardAdd << 16U)); - if (errorstate != HAL_SD_ERROR_NONE) - { - return errorstate; - } - - /* Send ACMD6 APP_CMD with argument as 2 for wide bus mode */ - errorstate = SDMMC_CmdBusWidth(hsd->Instance, 2U); - if (errorstate != HAL_SD_ERROR_NONE) - { - return errorstate; - } - - return HAL_SD_ERROR_NONE; - } - else - { - return HAL_SD_ERROR_REQUEST_NOT_APPLICABLE; - } -} - -/** - * @brief Disables the SDMMC wide bus mode. - * @param hsd: Pointer to SD handle - * @retval error state - */ -static uint32_t SD_WideBus_Disable(SD_HandleTypeDef *hsd) -{ - uint32_t scr[2U] = {0UL, 0UL}; - uint32_t errorstate; - - if ((SDMMC_GetResponse(hsd->Instance, SDMMC_RESP1) & SDMMC_CARD_LOCKED) == SDMMC_CARD_LOCKED) - { - return HAL_SD_ERROR_LOCK_UNLOCK_FAILED; - } - - /* Get SCR Register */ - errorstate = SD_FindSCR(hsd, scr); - if (errorstate != HAL_SD_ERROR_NONE) - { - return errorstate; - } - - /* If requested card supports 1 bit mode operation */ - if ((scr[1U] & SDMMC_SINGLE_BUS_SUPPORT) != SDMMC_ALLZERO) - { - /* Send CMD55 APP_CMD with argument as card's RCA */ - errorstate = SDMMC_CmdAppCommand(hsd->Instance, (uint32_t)(hsd->SdCard.RelCardAdd << 16U)); - if (errorstate != HAL_SD_ERROR_NONE) - { - return errorstate; - } - - /* Send ACMD6 APP_CMD with argument as 0 for single bus mode */ - errorstate = SDMMC_CmdBusWidth(hsd->Instance, 0U); - if (errorstate != HAL_SD_ERROR_NONE) - { - return errorstate; - } - - return HAL_SD_ERROR_NONE; - } - else - { - return HAL_SD_ERROR_REQUEST_NOT_APPLICABLE; - } -} - -/** - * @brief Finds the SD card SCR register value. - * @param hsd: Pointer to SD handle - * @param pSCR: pointer to the buffer that will contain the SCR value - * @retval error state - */ -static uint32_t SD_FindSCR(SD_HandleTypeDef *hsd, uint32_t *pSCR) -{ - SDMMC_DataInitTypeDef config; - uint32_t errorstate; - uint32_t tickstart = HAL_GetTick(); - uint32_t index = 0U; - uint32_t tempscr[2U] = {0UL, 0UL}; - uint32_t *scr = pSCR; - - /* Set Block Size To 8 Bytes */ - errorstate = SDMMC_CmdBlockLength(hsd->Instance, 8U); - if (errorstate != HAL_SD_ERROR_NONE) - { - return errorstate; - } - - /* Send CMD55 APP_CMD with argument as card's RCA */ - errorstate = SDMMC_CmdAppCommand(hsd->Instance, (uint32_t)((hsd->SdCard.RelCardAdd) << 16U)); - if (errorstate != HAL_SD_ERROR_NONE) - { - return errorstate; - } - - config.DataTimeOut = SDMMC_DATATIMEOUT; - config.DataLength = 8U; - config.DataBlockSize = SDMMC_DATABLOCK_SIZE_8B; - config.TransferDir = SDMMC_TRANSFER_DIR_TO_SDMMC; - config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK; - config.DPSM = SDMMC_DPSM_ENABLE; - (void)SDMMC_ConfigData(hsd->Instance, &config); - - /* Send ACMD51 SD_APP_SEND_SCR with argument as 0 */ - errorstate = SDMMC_CmdSendSCR(hsd->Instance); - if (errorstate != HAL_SD_ERROR_NONE) - { - return errorstate; - } - - while (!__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_RXOVERR | SDMMC_FLAG_DCRCFAIL | SDMMC_FLAG_DTIMEOUT | SDMMC_FLAG_DBCKEND | - SDMMC_FLAG_DATAEND)) - { - if ((!__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_RXFIFOE)) && (index == 0U)) - { - tempscr[0] = SDMMC_ReadFIFO(hsd->Instance); - tempscr[1] = SDMMC_ReadFIFO(hsd->Instance); - index++; - } - - if ((HAL_GetTick() - tickstart) >= SDMMC_SWDATATIMEOUT) - { - return HAL_SD_ERROR_TIMEOUT; - } - } - - if (__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_DTIMEOUT)) - { - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_FLAG_DTIMEOUT); - - return HAL_SD_ERROR_DATA_TIMEOUT; - } - else if (__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_DCRCFAIL)) - { - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_FLAG_DCRCFAIL); - - return HAL_SD_ERROR_DATA_CRC_FAIL; - } - else if (__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_RXOVERR)) - { - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_FLAG_RXOVERR); - - return HAL_SD_ERROR_RX_OVERRUN; - } - else - { - /* No error flag set */ - /* Clear all the static flags */ - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_STATIC_DATA_FLAGS); - - *scr = (((tempscr[1] & SDMMC_0TO7BITS) << 24U) | ((tempscr[1] & SDMMC_8TO15BITS) << 8U) | \ - ((tempscr[1] & SDMMC_16TO23BITS) >> 8U) | ((tempscr[1] & SDMMC_24TO31BITS) >> 24U)); - scr++; - *scr = (((tempscr[0] & SDMMC_0TO7BITS) << 24U) | ((tempscr[0] & SDMMC_8TO15BITS) << 8U) | \ - ((tempscr[0] & SDMMC_16TO23BITS) >> 8U) | ((tempscr[0] & SDMMC_24TO31BITS) >> 24U)); - - } - - return HAL_SD_ERROR_NONE; -} - -/** - * @brief Wrap up reading in non-blocking mode. - * @param hsd: pointer to a SD_HandleTypeDef structure that contains - * the configuration information. - * @retval None - */ -static void SD_Read_IT(SD_HandleTypeDef *hsd) -{ - uint32_t count; - uint32_t data; - uint8_t *tmp; - - tmp = hsd->pRxBuffPtr; - - if (hsd->RxXferSize >= SDMMC_FIFO_SIZE) - { - /* Read data from SDMMC Rx FIFO */ - for (count = 0U; count < (SDMMC_FIFO_SIZE / 4U); count++) - { - data = SDMMC_ReadFIFO(hsd->Instance); - *tmp = (uint8_t)(data & 0xFFU); - tmp++; - *tmp = (uint8_t)((data >> 8U) & 0xFFU); - tmp++; - *tmp = (uint8_t)((data >> 16U) & 0xFFU); - tmp++; - *tmp = (uint8_t)((data >> 24U) & 0xFFU); - tmp++; - } - - hsd->pRxBuffPtr = tmp; - hsd->RxXferSize -= SDMMC_FIFO_SIZE; - } -} - -/** - * @brief Wrap up writing in non-blocking mode. - * @param hsd: pointer to a SD_HandleTypeDef structure that contains - * the configuration information. - * @retval None - */ -static void SD_Write_IT(SD_HandleTypeDef *hsd) -{ - uint32_t count; - uint32_t data; - const uint8_t *tmp; - - tmp = hsd->pTxBuffPtr; - - if (hsd->TxXferSize >= SDMMC_FIFO_SIZE) - { - /* Write data to SDMMC Tx FIFO */ - for (count = 0U; count < (SDMMC_FIFO_SIZE / 4U); count++) - { - data = (uint32_t)(*tmp); - tmp++; - data |= ((uint32_t)(*tmp) << 8U); - tmp++; - data |= ((uint32_t)(*tmp) << 16U); - tmp++; - data |= ((uint32_t)(*tmp) << 24U); - tmp++; - (void)SDMMC_WriteFIFO(hsd->Instance, &data); - } - - hsd->pTxBuffPtr = tmp; - hsd->TxXferSize -= SDMMC_FIFO_SIZE; - } -} - -/** - * @brief Switches the SD card to High Speed mode. - * This API must be used after "Transfer State" - * @note This operation should be followed by the configuration - * of PLL to have SDMMCCK clock between 25 and 50 MHz - * @param hsd: SD handle - * @param SwitchSpeedMode: SD speed mode( SDMMC_SDR12_SWITCH_PATTERN, SDMMC_SDR25_SWITCH_PATTERN) - * @retval SD Card error state - */ -uint32_t SD_SwitchSpeed(SD_HandleTypeDef *hsd, uint32_t SwitchSpeedMode) -{ - uint32_t errorstate = HAL_SD_ERROR_NONE; - SDMMC_DataInitTypeDef sdmmc_datainitstructure; - uint32_t SD_hs[16] = {0}; - uint32_t count = 0; - uint32_t Timeout = HAL_GetTick(); - - if (hsd->SdCard.CardSpeed == CARD_NORMAL_SPEED) - { - /* Standard Speed Card <= 12.5Mhz */ - return HAL_SD_ERROR_REQUEST_NOT_APPLICABLE; - } - - if (hsd->SdCard.CardSpeed >= CARD_HIGH_SPEED) - { - /* Initialize the Data control register */ - hsd->Instance->DCTRL = 0; - errorstate = SDMMC_CmdBlockLength(hsd->Instance, 64U); - - if (errorstate != HAL_SD_ERROR_NONE) - { - return errorstate; - } - - /* Configure the SD DPSM (Data Path State Machine) */ - sdmmc_datainitstructure.DataTimeOut = SDMMC_DATATIMEOUT; - sdmmc_datainitstructure.DataLength = 64U; - sdmmc_datainitstructure.DataBlockSize = SDMMC_DATABLOCK_SIZE_64B ; - sdmmc_datainitstructure.TransferDir = SDMMC_TRANSFER_DIR_TO_SDMMC; - sdmmc_datainitstructure.TransferMode = SDMMC_TRANSFER_MODE_BLOCK; - sdmmc_datainitstructure.DPSM = SDMMC_DPSM_ENABLE; - - (void)SDMMC_ConfigData(hsd->Instance, &sdmmc_datainitstructure); - - errorstate = SDMMC_CmdSwitch(hsd->Instance, SwitchSpeedMode); - if (errorstate != HAL_SD_ERROR_NONE) - { - return errorstate; - } - - while (!__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_RXOVERR | SDMMC_FLAG_DCRCFAIL | SDMMC_FLAG_DTIMEOUT | SDMMC_FLAG_DBCKEND | - SDMMC_FLAG_DATAEND)) - { - if ((!__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_RXFIFOE)) && (count < 16U)) - { - SD_hs[count] = SDMMC_ReadFIFO(hsd->Instance); - count++; - } - if ((HAL_GetTick() - Timeout) >= SDMMC_SWDATATIMEOUT) - { - hsd->ErrorCode = HAL_SD_ERROR_TIMEOUT; - hsd->State = HAL_SD_STATE_READY; - return HAL_SD_ERROR_TIMEOUT; - } - } - - if (__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_DTIMEOUT)) - { - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_FLAG_DTIMEOUT); - - return errorstate; - } - else if (__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_DCRCFAIL)) - { - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_FLAG_DCRCFAIL); - - errorstate = SDMMC_ERROR_DATA_CRC_FAIL; - - return errorstate; - } - else if (__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_RXOVERR)) - { - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_FLAG_RXOVERR); - - errorstate = SDMMC_ERROR_RX_OVERRUN; - - return errorstate; - } - else - { - /* No error flag set */ - } - - /* Clear all the static flags */ - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_STATIC_DATA_FLAGS); - - /* Test if the switch mode HS is ok */ - if ((((uint8_t *)SD_hs)[13] & 2U) != 2U) - { - errorstate = SDMMC_ERROR_UNSUPPORTED_FEATURE; - } - - } - - return errorstate; -} - -#if (USE_SD_TRANSCEIVER != 0U) -/** - * @brief Switches the SD card to Ultra High Speed mode. - * This API must be used after "Transfer State" - * @note This operation should be followed by the configuration - * of PLL to have SDMMCCK clock between 50 and 120 MHz - * @param hsd: SD handle - * @param UltraHighSpeedMode: SD speed mode( SDMMC_SDR50_SWITCH_PATTERN, SDMMC_SDR104_SWITCH_PATTERN) - * @retval SD Card error state - */ -static uint32_t SD_UltraHighSpeed(SD_HandleTypeDef *hsd, uint32_t UltraHighSpeedMode) -{ - uint32_t errorstate = HAL_SD_ERROR_NONE; - SDMMC_DataInitTypeDef sdmmc_datainitstructure; - uint32_t SD_hs[16] = {0}; - uint32_t count; - uint32_t loop = 0 ; - uint32_t Timeout = HAL_GetTick(); - - if (hsd->SdCard.CardSpeed == CARD_NORMAL_SPEED) - { - /* Standard Speed Card <= 12.5Mhz */ - return HAL_SD_ERROR_REQUEST_NOT_APPLICABLE; - } - - if (hsd->SdCard.CardSpeed == CARD_ULTRA_HIGH_SPEED) - { - /* Initialize the Data control register */ - hsd->Instance->DCTRL = 0; - errorstate = SDMMC_CmdBlockLength(hsd->Instance, 64U); - - if (errorstate != HAL_SD_ERROR_NONE) - { - return errorstate; - } - - /* Configure the SD DPSM (Data Path State Machine) */ - sdmmc_datainitstructure.DataTimeOut = SDMMC_DATATIMEOUT; - sdmmc_datainitstructure.DataLength = 64U; - sdmmc_datainitstructure.DataBlockSize = SDMMC_DATABLOCK_SIZE_64B ; - sdmmc_datainitstructure.TransferDir = SDMMC_TRANSFER_DIR_TO_SDMMC; - sdmmc_datainitstructure.TransferMode = SDMMC_TRANSFER_MODE_BLOCK; - sdmmc_datainitstructure.DPSM = SDMMC_DPSM_ENABLE; - - if (SDMMC_ConfigData(hsd->Instance, &sdmmc_datainitstructure) != HAL_OK) - { - return (HAL_SD_ERROR_GENERAL_UNKNOWN_ERR); - } - - errorstate = SDMMC_CmdSwitch(hsd->Instance, UltraHighSpeedMode); - if (errorstate != HAL_SD_ERROR_NONE) - { - return errorstate; - } - - while (!__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_RXOVERR | SDMMC_FLAG_DCRCFAIL | SDMMC_FLAG_DTIMEOUT | SDMMC_FLAG_DBCKEND | - SDMMC_FLAG_DATAEND)) - { - if (__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_RXFIFOHF)) - { - for (count = 0U; count < 8U; count++) - { - SD_hs[(8U * loop) + count] = SDMMC_ReadFIFO(hsd->Instance); - } - loop ++; - } - - if ((HAL_GetTick() - Timeout) >= SDMMC_SWDATATIMEOUT) - { - hsd->ErrorCode = HAL_SD_ERROR_TIMEOUT; - hsd->State = HAL_SD_STATE_READY; - return HAL_SD_ERROR_TIMEOUT; - } - } - - if (__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_DTIMEOUT)) - { - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_FLAG_DTIMEOUT); - - return errorstate; - } - else if (__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_DCRCFAIL)) - { - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_FLAG_DCRCFAIL); - - errorstate = SDMMC_ERROR_DATA_CRC_FAIL; - - return errorstate; - } - else if (__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_RXOVERR)) - { - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_FLAG_RXOVERR); - - errorstate = SDMMC_ERROR_RX_OVERRUN; - - return errorstate; - } - else - { - /* No error flag set */ - } - - /* Clear all the static flags */ - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_STATIC_DATA_FLAGS); - - /* Test if the switch mode HS is ok */ - if ((((uint8_t *)SD_hs)[13] & 2U) != 2U) - { - errorstate = SDMMC_ERROR_UNSUPPORTED_FEATURE; - } - else - { -#if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U) - hsd->DriveTransceiver_1_8V_Callback(SET); -#else - HAL_SD_DriveTransceiver_1_8V_Callback(SET); -#endif /* USE_HAL_SD_REGISTER_CALLBACKS */ -#if defined (DLYB_SDMMC1) || defined (DLYB_SDMMC2) - /* Enable DelayBlock Peripheral */ - /* SDMMC_FB_CLK tuned feedback clock selected as receive clock, for SDR104 */ - MODIFY_REG(hsd->Instance->CLKCR, SDMMC_CLKCR_SELCLKRX, SDMMC_CLKCR_SELCLKRX_1); - LL_DLYB_Enable(SD_GET_DLYB_INSTANCE(hsd->Instance)); -#endif /* (DLYB_SDMMC1) || (DLYB_SDMMC2) */ - } - } - - return errorstate; -} - -/** - * @brief Switches the SD card to Double Data Rate (DDR) mode. - * This API must be used after "Transfer State" - * @note This operation should be followed by the configuration - * of PLL to have SDMMCCK clock less than 50MHz - * @param hsd: SD handle - * @retval SD Card error state - */ -static uint32_t SD_DDR_Mode(SD_HandleTypeDef *hsd) -{ - uint32_t errorstate = HAL_SD_ERROR_NONE; - SDMMC_DataInitTypeDef sdmmc_datainitstructure; - uint32_t SD_hs[16] = {0}; - uint32_t count; - uint32_t loop = 0 ; - uint32_t Timeout = HAL_GetTick(); - - if (hsd->SdCard.CardSpeed == CARD_NORMAL_SPEED) - { - /* Standard Speed Card <= 12.5Mhz */ - return HAL_SD_ERROR_REQUEST_NOT_APPLICABLE; - } - - if (hsd->SdCard.CardSpeed == CARD_ULTRA_HIGH_SPEED) - { - /* Initialize the Data control register */ - hsd->Instance->DCTRL = 0; - errorstate = SDMMC_CmdBlockLength(hsd->Instance, 64U); - - if (errorstate != HAL_SD_ERROR_NONE) - { - return errorstate; - } - - /* Configure the SD DPSM (Data Path State Machine) */ - sdmmc_datainitstructure.DataTimeOut = SDMMC_DATATIMEOUT; - sdmmc_datainitstructure.DataLength = 64U; - sdmmc_datainitstructure.DataBlockSize = SDMMC_DATABLOCK_SIZE_64B ; - sdmmc_datainitstructure.TransferDir = SDMMC_TRANSFER_DIR_TO_SDMMC; - sdmmc_datainitstructure.TransferMode = SDMMC_TRANSFER_MODE_BLOCK; - sdmmc_datainitstructure.DPSM = SDMMC_DPSM_ENABLE; - - if (SDMMC_ConfigData(hsd->Instance, &sdmmc_datainitstructure) != HAL_OK) - { - return (HAL_SD_ERROR_GENERAL_UNKNOWN_ERR); - } - - errorstate = SDMMC_CmdSwitch(hsd->Instance, SDMMC_DDR50_SWITCH_PATTERN); - if (errorstate != HAL_SD_ERROR_NONE) - { - return errorstate; - } - - while (!__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_RXOVERR | SDMMC_FLAG_DCRCFAIL | SDMMC_FLAG_DTIMEOUT | SDMMC_FLAG_DBCKEND | - SDMMC_FLAG_DATAEND)) - { - if (__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_RXFIFOHF)) - { - for (count = 0U; count < 8U; count++) - { - SD_hs[(8U * loop) + count] = SDMMC_ReadFIFO(hsd->Instance); - } - loop ++; - } - - if ((HAL_GetTick() - Timeout) >= SDMMC_SWDATATIMEOUT) - { - hsd->ErrorCode = HAL_SD_ERROR_TIMEOUT; - hsd->State = HAL_SD_STATE_READY; - return HAL_SD_ERROR_TIMEOUT; - } - } - - if (__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_DTIMEOUT)) - { - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_FLAG_DTIMEOUT); - - return errorstate; - } - else if (__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_DCRCFAIL)) - { - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_FLAG_DCRCFAIL); - - errorstate = SDMMC_ERROR_DATA_CRC_FAIL; - - return errorstate; - } - else if (__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_RXOVERR)) - { - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_FLAG_RXOVERR); - - errorstate = SDMMC_ERROR_RX_OVERRUN; - - return errorstate; - } - else - { - /* No error flag set */ - } - - /* Clear all the static flags */ - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_STATIC_DATA_FLAGS); - - /* Test if the switch mode is ok */ - if ((((uint8_t *)SD_hs)[13] & 2U) != 2U) - { - errorstate = SDMMC_ERROR_UNSUPPORTED_FEATURE; - } - else - { -#if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U) - hsd->DriveTransceiver_1_8V_Callback(SET); -#else - HAL_SD_DriveTransceiver_1_8V_Callback(SET); -#endif /* USE_HAL_SD_REGISTER_CALLBACKS */ -#if defined (DLYB_SDMMC1) || defined (DLYB_SDMMC2) - /* Enable DelayBlock Peripheral */ - /* SDMMC_CKin feedback clock selected as receive clock, for DDR50 */ - MODIFY_REG(hsd->Instance->CLKCR, SDMMC_CLKCR_SELCLKRX, SDMMC_CLKCR_SELCLKRX_0); - LL_DLYB_Enable(SD_GET_DLYB_INSTANCE(hsd->Instance)); -#endif /* (DLYB_SDMMC1) || (DLYB_SDMMC2) */ - } - } - - return errorstate; -} - -#endif /* USE_SD_TRANSCEIVER */ - -/** - * @brief Read DMA Linked list node Transfer completed callbacks - * @param hsd: SD handle - * @retval None - */ -__weak void HAL_SDEx_Read_DMALnkLstBufCpltCallback(SD_HandleTypeDef *hsd) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hsd); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_SDEx_Read_DMALnkLstBufCpltCallback can be implemented in the user file - */ -} -/** - * @brief Read DMA Linked list node Transfer completed callbacks - * @param hsd: SD handle - * @retval None - */ -__weak void HAL_SDEx_Write_DMALnkLstBufCpltCallback(SD_HandleTypeDef *hsd) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hsd); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_SDEx_Write_DMALnkLstBufCpltCallback can be implemented in the user file - */ -} - -/** - * @} - */ - -#endif /* HAL_SD_MODULE_ENABLED */ -#endif /* SDMMC1 || SDMMC2 */ - -/** - * @} - */ - -/** - * @} - */ Index: trunk/firmware/FSBL/CubeMX/Drivers/STM32N6xx_HAL_Driver/Src/stm32n6xx_hal_sd_ex.c =================================================================== --- trunk/firmware/FSBL/CubeMX/Drivers/STM32N6xx_HAL_Driver/Src/stm32n6xx_hal_sd_ex.c (revision 37) +++ (revision ) @@ -1,395 +1,0 @@ -/** - ****************************************************************************** - * @file stm32n6xx_hal_sd_ex.c - * @author MCD Application Team - * @brief SD card Extended HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the Secure Digital (SD) peripheral: - * + Extended features functions - * - ****************************************************************************** - * @attention - * - * Copyright (c) 2023 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - @verbatim - ============================================================================== - ##### How to use this driver ##### - ============================================================================== - [..] - The SD Extension HAL driver can be used as follows: - (+) Configure Buffer0 and Buffer1 start address and Buffer size using HAL_SDEx_ConfigDMAMultiBuffer() function. - (+) Start Read and Write for multibuffer mode using HAL_SDEx_ReadBlocksDMAMultiBuffer() - and HAL_SDEx_WriteBlocksDMAMultiBuffer() functions. - - @endverbatim - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32n6xx_hal.h" - -/** @addtogroup STM32N6xx_HAL_Driver - * @{ - */ - -/** @defgroup SDEx SDEx - * @brief SD Extended HAL module driver - * @{ - */ - -#if defined (SDMMC1) || defined (SDMMC2) -#ifdef HAL_SD_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup SDEx_Exported_Functions - * @{ - */ - - -/** @addtogroup SDEx_Exported_Functions_Group1 - * @brief Linked List management functions - * -@verbatim - =============================================================================== - ##### Linked List management functions ##### - =============================================================================== - [..] - This subsection provides a set of functions allowing to manage the needed functions. - -@endverbatim - * @{ - */ - -/** - * @brief Build Linked List node. - * @param pNode: Pointer to new node to add. - * @param pNodeConf: Pointer to configuration parameters for new node to add. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SDEx_DMALinkedList_BuildNode(SD_DMALinkNodeTypeDef *pNode, SD_DMALinkNodeConfTypeDef *pNodeConf) -{ - - (void)SDMMC_DMALinkedList_BuildNode(pNode, pNodeConf); - - return (HAL_OK); - -} - -/** - * @brief Insert new Linked List node. - * @param pLinkedList: Pointer to the linkedlist that contains transfer nodes - * @param pPrevNode: Pointer to previous node. - * @param pNewNode: Pointer to new node to insert. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SDEx_DMALinkedList_InsertNode(SD_DMALinkedListTypeDef *pLinkedList, - SD_DMALinkNodeTypeDef *pPrevNode, SD_DMALinkNodeTypeDef *pNewNode) -{ - - (void)SDMMC_DMALinkedList_InsertNode(pLinkedList, pPrevNode, pNewNode); - - return (HAL_OK); - -} -/** - * @brief Remove Linked List node. - * @param pLinkedList: Pointer to the linkedlist that contains transfer nodes - * @param pNode: Pointer to node to remove. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SDEx_DMALinkedList_RemoveNode(SD_DMALinkedListTypeDef *pLinkedList, SD_DMALinkNodeTypeDef *pNode) -{ - - if (SDMMC_DMALinkedList_RemoveNode(pLinkedList, pNode) != SDMMC_ERROR_NONE) - { - return HAL_ERROR; - } - else - { - return HAL_OK; - } -} - -/** - * @brief Lock Linked List node. - * @param pNode: Pointer to node to remove. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SDEx_DMALinkedList_LockNode(SD_DMALinkNodeTypeDef *pNode) -{ - - if (SDMMC_DMALinkedList_LockNode(pNode) != SDMMC_ERROR_NONE) - { - return HAL_ERROR; - } - else - { - return HAL_OK; - } -} - -/** - * @brief Unlock Linked List node. - * @param pNode: Pointer to node to remove. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SDEx_DMALinkedList_UnlockNode(SD_DMALinkNodeTypeDef *pNode) -{ - - if (SDMMC_DMALinkedList_UnlockNode(pNode) != SDMMC_ERROR_NONE) - { - return HAL_ERROR; - } - else - { - return HAL_OK; - } -} - -/** - * @brief Enable Circular mode for DMA Linked List. - * @param pLinkedList: Pointer to the linkedlist that contains transfer nodes - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SDEx_DMALinkedList_EnableCircularMode(SD_DMALinkedListTypeDef *pLinkedList) -{ - - (void)SDMMC_DMALinkedList_EnableCircularMode(pLinkedList); - - return HAL_OK; - -} -/** - * @brief Disable Circular mode for DMA Linked List. - * @param pLinkedList: Pointer to the linkedlist that contains transfer nodes - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SDEx_DMALinkedList_DisableCircularMode(SD_DMALinkedListTypeDef *pLinkedList) -{ - - (void)SDMMC_DMALinkedList_DisableCircularMode(pLinkedList); - - return HAL_OK; - -} - - -/** - * @brief Reads block(s) from a specified address in a card. The received Data will be stored in linked list buffers. - * linked list should be prepared before call this function . - * @param hsd: SD handle - * @param pLinkedList: pointer to first linked list node - * @param BlockAdd: Block Address from where data is to be read - * @param NumberOfBlocks: Total number of blocks to read - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SDEx_DMALinkedList_ReadBlocks(SD_HandleTypeDef *hsd, - const SDMMC_DMALinkedListTypeDef *pLinkedList, - uint32_t BlockAdd, uint32_t NumberOfBlocks) -{ - SDMMC_DataInitTypeDef config; - uint32_t errorstate; - uint32_t DmaBase0_reg; - uint32_t DmaBase1_reg; - uint32_t add = BlockAdd; - - if (hsd->State == HAL_SD_STATE_READY) - { - if ((add + NumberOfBlocks) > (hsd->SdCard.LogBlockNbr)) - { - hsd->ErrorCode |= HAL_SD_ERROR_ADDR_OUT_OF_RANGE; - return HAL_ERROR; - } - - hsd->Instance->IDMABASER = (uint32_t) pLinkedList->pHeadNode->IDMABASER; - hsd->Instance->IDMABSIZE = (uint32_t) pLinkedList->pHeadNode->IDMABSIZE; - - hsd->Instance->IDMABAR = (uint32_t) pLinkedList->pHeadNode; - hsd->Instance->IDMALAR = (uint32_t) SDMMC_IDMALAR_ABR | SDMMC_IDMALAR_ULS | SDMMC_IDMALAR_ULA | - sizeof(SDMMC_DMALinkNodeTypeDef) ; /* Initial configuration */ - - DmaBase0_reg = hsd->Instance->IDMABASER; - DmaBase1_reg = hsd->Instance->IDMABAR; - - if ((hsd->Instance->IDMABSIZE == 0U) || (DmaBase0_reg == 0U) || (DmaBase1_reg == 0U)) - { - hsd->ErrorCode = HAL_SD_ERROR_ADDR_OUT_OF_RANGE; - return HAL_ERROR; - } - - /* Initialize data control register */ - hsd->Instance->DCTRL = 0; - /* Clear old Flags*/ - __HAL_SD_CLEAR_FLAG(hsd, SDMMC_STATIC_DATA_FLAGS); - - hsd->ErrorCode = HAL_SD_ERROR_NONE; - hsd->State = HAL_SD_STATE_BUSY; - - if (hsd->SdCard.CardType != CARD_SDHC_SDXC) - { - add *= 512U; - } - - /* Configure the SD DPSM (Data Path State Machine) */ - config.DataTimeOut = SDMMC_DATATIMEOUT; - config.DataLength = BLOCKSIZE * NumberOfBlocks; - config.DataBlockSize = SDMMC_DATABLOCK_SIZE_512B; - config.TransferDir = SDMMC_TRANSFER_DIR_TO_SDMMC; - config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK; - config.DPSM = SDMMC_DPSM_DISABLE; - (void)SDMMC_ConfigData(hsd->Instance, &config); - - hsd->Instance->DCTRL |= SDMMC_DCTRL_FIFORST; - - __SDMMC_CMDTRANS_ENABLE(hsd->Instance); - - hsd->Instance->IDMACTRL = SDMMC_ENABLE_IDMA_DOUBLE_BUFF0; - - /* Read Blocks in DMA mode */ - hsd->Context = (SD_CONTEXT_READ_MULTIPLE_BLOCK | SD_CONTEXT_DMA); - - /* Read Multi Block command */ - errorstate = SDMMC_CmdReadMultiBlock(hsd->Instance, add); - if (errorstate != HAL_SD_ERROR_NONE) - { - hsd->State = HAL_SD_STATE_READY; - hsd->ErrorCode |= errorstate; - return HAL_ERROR; - } - - __HAL_SD_ENABLE_IT(hsd, (SDMMC_IT_DCRCFAIL | SDMMC_IT_DTIMEOUT | SDMMC_IT_RXOVERR | SDMMC_IT_DATAEND | - SDMMC_IT_IDMABTC)); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } - -} - -/** - * @brief Write block(s) to a specified address in a card. The transferred Data are stored linked list nodes buffers . - * linked list should be prepared before call this function . - * @param hsd: SD handle - * @param pLinkedList: pointer to first linked list node - * @param BlockAdd: Block Address from where data is to be read - * @param NumberOfBlocks: Total number of blocks to read - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SDEx_DMALinkedList_WriteBlocks(SD_HandleTypeDef *hsd, - const SDMMC_DMALinkedListTypeDef *pLinkedList, - uint32_t BlockAdd, uint32_t NumberOfBlocks) - -{ - SDMMC_DataInitTypeDef config; - uint32_t errorstate; - uint32_t DmaBase0_reg; - uint32_t DmaBase1_reg; - uint32_t add = BlockAdd; - - if (hsd->State == HAL_SD_STATE_READY) - { - if ((add + NumberOfBlocks) > (hsd->SdCard.LogBlockNbr)) - { - hsd->ErrorCode |= HAL_SD_ERROR_ADDR_OUT_OF_RANGE; - return HAL_ERROR; - } - - hsd->Instance->IDMABASER = (uint32_t) pLinkedList->pHeadNode->IDMABASER; - hsd->Instance->IDMABSIZE = (uint32_t) pLinkedList->pHeadNode->IDMABSIZE; - - hsd->Instance->IDMABAR = (uint32_t) pLinkedList->pHeadNode; - hsd->Instance->IDMALAR = (uint32_t) SDMMC_IDMALAR_ABR | SDMMC_IDMALAR_ULS | SDMMC_IDMALAR_ULA | - sizeof(SDMMC_DMALinkNodeTypeDef) ; /* Initial configuration */ - - DmaBase0_reg = hsd->Instance->IDMABASER; - DmaBase1_reg = hsd->Instance->IDMABAR; - - if ((hsd->Instance->IDMABSIZE == 0U) || (DmaBase0_reg == 0U) || (DmaBase1_reg == 0U)) - { - hsd->ErrorCode = HAL_SD_ERROR_ADDR_OUT_OF_RANGE; - return HAL_ERROR; - } - - /* Initialize data control register */ - hsd->Instance->DCTRL = 0; - - hsd->ErrorCode = HAL_SD_ERROR_NONE; - - hsd->State = HAL_SD_STATE_BUSY; - - if (hsd->SdCard.CardType != CARD_SDHC_SDXC) - { - add *= 512U; - } - - /* Configure the SD DPSM (Data Path State Machine) */ - config.DataTimeOut = SDMMC_DATATIMEOUT; - config.DataLength = BLOCKSIZE * NumberOfBlocks; - config.DataBlockSize = SDMMC_DATABLOCK_SIZE_512B; - config.TransferDir = SDMMC_TRANSFER_DIR_TO_CARD; - config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK; - config.DPSM = SDMMC_DPSM_DISABLE; - (void)SDMMC_ConfigData(hsd->Instance, &config); - - __SDMMC_CMDTRANS_ENABLE(hsd->Instance); - - hsd->Instance->IDMACTRL = SDMMC_ENABLE_IDMA_DOUBLE_BUFF0; - - /* Write Blocks in DMA mode */ - hsd->Context = (SD_CONTEXT_WRITE_MULTIPLE_BLOCK | SD_CONTEXT_DMA); - - /* Write Multi Block command */ - errorstate = SDMMC_CmdWriteMultiBlock(hsd->Instance, add); - if (errorstate != HAL_SD_ERROR_NONE) - { - hsd->State = HAL_SD_STATE_READY; - hsd->ErrorCode |= errorstate; - return HAL_ERROR; - } - - __HAL_SD_ENABLE_IT(hsd, (SDMMC_IT_DCRCFAIL | SDMMC_IT_DTIMEOUT | SDMMC_IT_TXUNDERR | SDMMC_IT_DATAEND | - SDMMC_IT_IDMABTC)); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - - -/** - * @} - */ - -/** - * @} - */ - -#endif /* HAL_SD_MODULE_ENABLED */ -#endif /* SDMMC1 || SDMMC2 */ - -/** - * @} - */ - -/** - * @} - */ Index: trunk/firmware/FSBL/CubeMX/Drivers/STM32N6xx_HAL_Driver/Src/stm32n6xx_hal_sdio.c =================================================================== --- trunk/firmware/FSBL/CubeMX/Drivers/STM32N6xx_HAL_Driver/Src/stm32n6xx_hal_sdio.c (revision 37) +++ (revision ) @@ -1,2922 +1,0 @@ -/** - ****************************************************************************** - * @file stm32n6xx_hal_sdio.c - * @author MCD Application Team - * @brief SDIO HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the Secure Digital Input Output (SDIO) peripheral: - * + Initialization and de-initialization functions - * + IO operation functions - * + Peripheral Control functions - * + Peripheral State functions - * - ****************************************************************************** - * @attention - * - * Copyright (c) 2023 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - @verbatim - ============================================================================== - ##### How to use this driver ##### - ============================================================================== - [..] - This driver implements a high level communication layer for read and write from/to - this SDIO card. The needed STM32 hardware resources (SDMMC and GPIO) are performed by - the user in HAL_SDIO_MspInit() function (MSP layer). - Basically, the MSP layer configuration should be the same as we provide in the - examples. - You can easily tailor this configuration according to hardware resources. - - [..] - This driver is a generic layered driver for SDMMC memories which uses the HAL - SDMMC driver functions to interface with SDIO cards devices. - It is used as follows: - - (#)Initialize the SDMMC low level resources by implementing the HAL_SDIO_MspInit() API: - (##) Enable the SDMMC interface clock using __HAL_RCC_SDMMC_CLK_ENABLE(); - (##) SDMMC pins configuration for SDIO card - (+++) Enable the clock for the SDMMC GPIOs using the functions __HAL_RCC_GPIOx_CLK_ENABLE(); - (+++) Configure these SDMMC pins as alternate function pull-up using HAL_GPIO_Init() - and according to your pin assignment; - (##) NVIC configuration if you need to use interrupt process (HAL_SDIO_ReadExtended_DMA() - and HAL_SDIO_WriteExtended_DMA() APIs). - (+++) Configure the SDMMC interrupt priorities using function HAL_NVIC_SetPriority(); - (+++) Enable the NVIC SDMMC IRQs using function HAL_NVIC_EnableIRQ() - (+++) SDMMC interrupts are managed using the macros __HAL_SDIO_ENABLE_IT() - and __HAL_SDIO_DISABLE_IT() inside the communication process. - (+++) SDMMC interrupts pending bits are managed using the macros __HAL_SDIO_GET_IT(). - (##) No general propose DMA Configuration is needed, an Internal DMA for SDMMC Peripheral are used. - - (#) At this stage, you can perform SDIO read/write/erase operations after SDIO card initialization. - - *** SDIO Card Initialization and configuration *** - ================================================ - [..] - To initialize the SDIO Card, use the HAL_SDIO_Init() function. It Initializes - SDMMC Peripheral(STM32 side) and the SDIO Card, and put it into StandBy State (Ready for data transfer). - This function provide the following operations: - - (#) Apply the SDIO Card initialization process at 400KHz. You can change or adapt this - frequency by adjusting the "ClockDiv" field. - The SDIO Card frequency (SDMMC_CK) is computed as follows: - - SDMMC_CK = SDMMCCLK / (2 * ClockDiv) - - In initialization mode and according to the SDIO Card standard, - make sure that the SDMMC_CK frequency doesn't exceed 400KHz. - - This phase of initialization is done through SDMMC_Init() and - SDMMC_PowerState_ON() SDMMC low level APIs. - - (#) Initialize the SDIO card. The API used is HAL_SDIO_Init(). - This phase allows the card initialization and identification. - - (#) Configure the SDIO Card Data transfer frequency. You can change or adapt this - frequency by adjusting the "ClockDiv" field by the API HAL_SDIO_ConfigFrequency(). - - (#) Configure the SDIO Card in wide bus mode: 4-bits data by the API HAL_SDIO_SetDataBusWidth(). - - (#) Configure the SDIO Card data block size by the API : HAL_SDIO_SetBlockSize(). - - (#) Configure the SDIO Card speed mode by the API : HAL_SDIO_SetSpeedMode(). - - (#) To custumize the SDIO Init card function for the enumeration card sequence, you can register a user callback - function by calling the HAL_SDIO_RegisterIdentifyCardCallback before the HAL_SDIO_Init() function. - - *** SDIO Card Read operation *** - ============================== - [..] - (+) You can read from SDIO card in polling mode by using function HAL_SDIO_ReadExtended(). - This function support only 2048-bytes block length (the block size should be - chosen by using the API HAL_SDIO_SetBlockSize). - - (+) You can read from SDIO card in DMA mode by using function HAL_SDIO_ReadExtended_DMA(). - This function support only 2048-bytes block length (the block size should be - chosen by using the API HAL_SDIO_SetBlockSize). - After this, you have to ensure that the transfer is done correctly. - You could also check the DMA transfer process through the SDIO Rx interrupt event. - - *** SDIO Card Write operation *** - =============================== - [..] - (+) You can write to SDIO card in polling mode by using function HAL_SDIO_WriteExtended(). - This function support only 2048-bytes block length (the block size should be - chosen by using the API HAL_SDIO_SetBlockSize). - - (+) You can write to SDIO card in DMA mode by using function HAL_SDIO_WriteExtended_DMA(). - This function support only 2048-bytes block length (the block size should be - chosen by using the API HAL_SDIO_SetBlockSize). - You could also check the DMA transfer process through the SDIO Tx interrupt event. - - - *** SDIO card common control register (CCCR) *** - ====================== - [..] - (+) The SDIO CCCR allow for quick host checking and control of an IO card's enable and interrupts on a per card and - per function basis. - To get the Card common control registers field, you can use the API HAL_SDIO_GetCardCommonControlRegister(). - - *** SDIO card Function basic register (FBR) *** - =========================== - [..] - (+) The SDIO card function basic register are used to allow the host to quickly determine the abilities and - requirements of each function. - (+) To get the SDIO function basic register information, you can use the API HAL_SDIO_GetCardFBRRegister(). - - *** SDIO HAL driver macros list *** - ================================== - [..] - Below the list of most used macros in SDIO HAL driver. - - (+) __HAL_SDIO_ENABLE_IT: Enable the SDIO device interrupt - (+) __HAL_SDIO_DISABLE_IT: Disable the SDIO device interrupt - (+) __HAL_SDIO_GET_FLAG: Check whether the specified SDIO flag is set or not - (+) __HAL_SDIO_CLEAR_FLAG: Clear the SDIO's pending flags - (+) __HAL_SDIO_GET_IT: Check whether the specified SDIO interrupt has occurred or not - (+) __HAL_SDIO_GET_IT_SOURCE: Checks whether the specified SDIO interrupt is enabled or not - - (@) You can refer to the SDIO HAL driver header file for more useful macros - - *** Callback registration *** - ============================================= - [..] - The compilation define USE_HAL_SDIO_REGISTER_CALLBACKS when set to 1 - allows the user to configure dynamically the driver callbacks. - - Use Functions HAL_SDIO_RegisterCallback() to register a user callback, - it allows to register following callbacks: - (+) TxCpltCallback : callback when a transmission transfer is completed. - (+) RxCpltCallback : callback when a reception transfer is completed. - (+) ErrorCallback : callback when error occurs. - (+) MspInitCallback : SDIO MspInit. - (+) MspDeInitCallback : SDIO MspDeInit. - This function takes as parameters the HAL peripheral handle, the Callback ID - and a pointer to the user callback function. - For specific callbacks TransceiverCallback use dedicated register callbacks: - respectively HAL_SDIO_RegisterTransceiverCallback(). - - Use function HAL_SDIO_UnRegisterCallback() to reset a callback to the default - weak (overridden) function. It allows to reset following callbacks: - (+) TxCpltCallback : callback when a transmission transfer is completed. - (+) RxCpltCallback : callback when a reception transfer is completed. - (+) ErrorCallback : callback when error occurs. - (+) MspInitCallback : SDIO MspInit. - (+) MspDeInitCallback : SDIO MspDeInit. - This function) takes as parameters the HAL peripheral handle and the Callback ID. - For specific callbacks TransceiverCallback use dedicated unregister callbacks: - respectively HAL_SDIO_UnRegisterTransceiverCallback(). - - By default, after the HAL_SDIO_Init and if the state is HAL_SDIO_STATE_RESET - all callbacks are reset to the corresponding legacy weak (overridden) functions. - Exception done for MspInit and MspDeInit callbacks that are respectively - reset to the legacy weak (overridden) functions in the HAL_SDIO_Init - and HAL_SDIO_DeInit only when these callbacks are null (not registered beforehand). - If not, MspInit or MspDeInit are not null, the HAL_SDIO_Init and HAL_SDIO_DeInit - keep and use the user MspInit/MspDeInit callbacks (registered beforehand) - - Callbacks can be registered/unregistered in READY state only. - Exception done for MspInit/MspDeInit callbacks that can be registered/unregistered - in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used - during the Init/DeInit. - In that case first register the MspInit/MspDeInit user callbacks - using HAL_SDIO_RegisterCallback before calling HAL_SDIO_DeInit - or HAL_SDIO_Init function. - - When The compilation define USE_HAL_SDIO_REGISTER_CALLBACKS is set to 0 or - not defined, the callback registering feature is not available - and weak (overridden) callbacks are used. - - *** SDIO peripheral IO interrupt *** - ============================================= - [..] - (+) Below the list of most used SDIO function to check and control the IO card's enable and interrupts on a per - functions basis. - - (+) HAL_SDIO_EnableIOFunctionInterrupt: Enable SDIO IO interrupt. - (+) HAL_SDIO_DisableIOFunctionInterrupt: Disable SDIO IO interrupt. - (+) HAL_SDIO_EnableIOFunction: Enable Function number(0-7) - (+) HAL_SDIO_DisableIOFunction: Disable Function number(0-7) - (+) HAL_SDIO_SelectIOFunction: Select a function number(0-7) - (+) HAL_SDIO_AbortIOFunction: Abort an IO read or write operation and free the SDIO bus. - (+) HAL_SDIO_EnableIOAsynInterrupt: Enable Bit of asynchronous interrupt - (+) HAL_SDIO_DisableIOAsynInterrupt: Disable Bit of asynchronous interrupt - - @endverbatim - ****************************************************************************** - */ - -/* Includes ----------------------------------------------------------------------------------------------------------*/ -#include "stm32n6xx_hal.h" - -/** @addtogroup STM32N6xx_HAL_Driver - * @{ - */ - -/** @addtogroup SDIO - * @{ - */ -#if defined (SDMMC1) || defined (SDMMC2) -#ifdef HAL_SDIO_MODULE_ENABLED - -/* Private define ----------------------------------------------------------------------------------------------------*/ -/** @addtogroup SDIO_Private_Defines - * @{ - */ -#define SDIO_INIT_FREQ 400000U /*!< Initialization phase : 400 kHz max */ -#define SDIO_TIMEOUT 1000U /*!< SDIO timeout millisecond */ - -#define SDIO_FUNCTION_0 0x00UL /*!< SDIO_Functions 0 */ -#define SDIO_FUNCTION_1 0x01UL /*!< SDIO_Functions 1 */ - -#define SDIO_READ 0x0UL /*!< Read flag for cmd52 and cmd53 */ -#define SDIO_WRITE 0x1UL /*!< Write flag for cmd52 and cmd53 */ - -#define SDIO_BUS_SPEED_SDR12 0x00U /*!< SDIO bus speed mode SDR12 */ -#define SDIO_BUS_SPEED_SDR25 0x02U /*!< SDIO bus speed mode SDR25 */ -#define SDIO_BUS_SPEED_SDR50 0x04U /*!< SDIO bus speed mode SDR50 */ -#define SDIO_BUS_SPEED_DDR50 0x08U /*!< SDIO bus speed mode DDR50 */ - -#define SDIO_CCCR_REG_NUMBER 0x16U /*!< SDIO card cccr register number */ - -#define SDIO_OCR_VDD_32_33 (1UL << 20U) -#define SDIO_OCR_SDIO_S18R (1UL << 24U) -/** - * @} - */ - -/* Private macro -----------------------------------------------------------------------------------------------------*/ -#define IS_SDIO_RAW_FLAG(ReadAfterWrite) (((ReadAfterWrite) == HAL_SDIO_WRITE_ONLY) || \ - ((ReadAfterWrite) == HAL_SDIO_READ_AFTER_WRITE)) - -#define IS_SDIO_FUNCTION(FN) (((FN) >= HAL_SDIO_FUNCTION_1) && ((FN) <= HAL_SDIO_FUNCTION_7)) - -#define IS_SDIO_SUPPORTED_BLOCK_SIZE(SDIO_BLOCKSIZE) (((SDIO_BLOCKSIZE) == HAL_SDIO_DATA_BLOCK_SIZE_1BYTE) || \ - ((SDIO_BLOCKSIZE) == HAL_SDIO_DATA_BLOCK_SIZE_2BYTE) || \ - ((SDIO_BLOCKSIZE) == HAL_SDIO_DATA_BLOCK_SIZE_4BYTE) || \ - ((SDIO_BLOCKSIZE) == HAL_SDIO_DATA_BLOCK_SIZE_8BYTE) || \ - ((SDIO_BLOCKSIZE) == HAL_SDIO_DATA_BLOCK_SIZE_16BYTE) || \ - ((SDIO_BLOCKSIZE) == HAL_SDIO_DATA_BLOCK_SIZE_32BYTE) || \ - ((SDIO_BLOCKSIZE) == HAL_SDIO_DATA_BLOCK_SIZE_64BYTE) || \ - ((SDIO_BLOCKSIZE) == HAL_SDIO_DATA_BLOCK_SIZE_128BYTE) || \ - ((SDIO_BLOCKSIZE) == HAL_SDIO_DATA_BLOCK_SIZE_256BYTE) || \ - ((SDIO_BLOCKSIZE) == HAL_SDIO_DATA_BLOCK_SIZE_512BYTE) || \ - ((SDIO_BLOCKSIZE) == HAL_SDIO_DATA_BLOCK_SIZE_1024BYTE) || \ - ((SDIO_BLOCKSIZE) == HAL_SDIO_DATA_BLOCK_SIZE_2048BYTE)) - -/* Private functions -------------------------------------------------------------------------------------------------*/ -/** @defgroup SDIO_Private_Functions SDIO Private Functions - * @{ - */ -static HAL_StatusTypeDef SDIO_InitCard(SDIO_HandleTypeDef *hsdio); -static HAL_StatusTypeDef SDIO_ReadDirect(SDIO_HandleTypeDef *hsdio, uint32_t addr, uint32_t raw, uint32_t function_nbr, - uint8_t *pData); -static HAL_StatusTypeDef SDIO_WriteDirect(SDIO_HandleTypeDef *hsdio, uint32_t addr, uint32_t raw, uint32_t function_nbr, - const uint8_t *pData); -static HAL_StatusTypeDef SDIO_WriteExtended(SDIO_HandleTypeDef *hsdio, const HAL_SDIO_ExtendedCmd_TypeDef *cmd_arg, - uint8_t *pData, uint16_t Size_byte); -static uint8_t SDIO_Convert_Block_Size(const SDIO_HandleTypeDef *hsdio, uint32_t block_size); -static HAL_StatusTypeDef SDIO_IOFunction_IRQHandler(SDIO_HandleTypeDef *hsdio); -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup SDIO_Exported_Functions - * @{ - */ -/** @addtogroup SDIO_Exported_Functions_Group1 - * @brief Initialization and de-initialization functions - * -@verbatim - ============================================================================== - ##### Initialization and de-initialization functions ##### - ============================================================================== - [..] - This section provides functions allowing to initialize/de-initialize the SDIO - device to be ready for use. - -@endverbatim - * @{ - */ -/** - * @brief Initializes the SDIO according to the specified parameters in the - SDIO_HandleTypeDef and create the associated handle. - * @param hsdio: Pointer to the SDIO handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SDIO_Init(SDIO_HandleTypeDef *hsdio) -{ - SDIO_InitTypeDef Init = {0U}; - uint32_t sdmmc_clk; - uint8_t data; - - /* Check the parameters */ - assert_param(hsdio != NULL); - assert_param(IS_SDMMC_ALL_INSTANCE(hsdio->Instance)); - assert_param(IS_SDMMC_CLOCK_EDGE(hsdio->Init.ClockEdge)); - assert_param(IS_SDMMC_CLOCK_POWER_SAVE(hsdio->Init.ClockPowerSave)); - assert_param(IS_SDMMC_BUS_WIDE(hsdio->Init.BusWide)); - assert_param(IS_SDMMC_HARDWARE_FLOW_CONTROL(hsdio->Init.HardwareFlowControl)); - assert_param(IS_SDMMC_CLKDIV(hsdio->Init.ClockDiv)); - - /* Check the SDIO handle allocation */ - if (hsdio == NULL) - { - return HAL_ERROR; - } - - if (hsdio->State == HAL_SDIO_STATE_RESET) - { -#if defined (USE_HAL_SDIO_REGISTER_CALLBACKS) && (USE_HAL_SDIO_REGISTER_CALLBACKS == 1U) - /* Reset Callback pointers in HAL_SDIO_STATE_RESET only */ - hsdio->TxCpltCallback = HAL_SDIO_TxCpltCallback; - hsdio->RxCpltCallback = HAL_SDIO_RxCpltCallback; - hsdio->ErrorCallback = HAL_SDIO_ErrorCallback; -#if (USE_SDIO_TRANSCEIVER != 0U) - if (hsdio->Init.TranceiverPresent == SDMMC_TRANSCEIVER_PRESENT) - { - hsdio->DriveTransceiver_1_8V_Callback = HAL_SDIO_DriveTransceiver_1_8V_Callback; - } -#endif /* USE_SDIO_TRANSCEIVER */ - - if (hsdio->MspInitCallback == NULL) - { - hsdio->MspInitCallback = HAL_SDIO_MspInit; - } - /* Init the low level hardware */ - hsdio->MspInitCallback(hsdio); -#else - /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */ - HAL_SDIO_MspInit(hsdio); -#endif /* USE_HAL_SDIO_REGISTER_CALLBACKS */ - } - - Init.ClockEdge = SDMMC_CLOCK_EDGE_RISING; - Init.ClockPowerSave = SDMMC_CLOCK_POWER_SAVE_DISABLE; - Init.BusWide = SDMMC_BUS_WIDE_1B; - Init.HardwareFlowControl = SDMMC_HARDWARE_FLOW_CONTROL_DISABLE; - - if (hsdio->Instance == SDMMC1) - { - sdmmc_clk = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_SDMMC1); - } - else if (hsdio->Instance == SDMMC2) - { - sdmmc_clk = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_SDMMC2); - } - else - { - sdmmc_clk = 0; - } - if (sdmmc_clk == 0U) - { - hsdio->ErrorCode = SDMMC_ERROR_INVALID_PARAMETER; - return HAL_ERROR; - } - Init.ClockDiv = sdmmc_clk / (2U * SDIO_INIT_FREQ); - /* Initialize SDMMC peripheral interface with default configuration */ - (void)SDMMC_Init(hsdio->Instance, Init); - - /* Set Power State to ON */ - (void)SDMMC_PowerState_ON(hsdio->Instance); - - /* wait 74 Cycles: required power up waiting time before starting the SDIO initialization sequence */ - if (Init.ClockDiv != 0U) - { - sdmmc_clk = sdmmc_clk / (2U * Init.ClockDiv); - } - - if (sdmmc_clk != 0U) - { - HAL_Delay(1U + (74U * 1000U / (sdmmc_clk))); - } - - if (hsdio->SDIO_IdentifyCard == NULL) - { - hsdio->SDIO_IdentifyCard = SDIO_InitCard; - } - /* SDIO enumeration sequence */ - if (hsdio->SDIO_IdentifyCard(hsdio) != HAL_OK) - { - hsdio->State = HAL_SDIO_STATE_RESET; - return HAL_ERROR; - } - - /* Configure the SDMMC user parameters */ - Init.ClockEdge = hsdio->Init.ClockEdge; - Init.ClockPowerSave = hsdio->Init.ClockPowerSave; - Init.BusWide = hsdio->Init.BusWide; - Init.HardwareFlowControl = hsdio->Init.HardwareFlowControl; - Init.ClockDiv = hsdio->Init.ClockDiv; - (void)SDMMC_Init(hsdio->Instance, Init); - - data = (hsdio->Init.BusWide == HAL_SDIO_4_WIRES_MODE) ? 2U : 0U; - if (SDIO_WriteDirect(hsdio, SDMMC_SDIO_CCCR4_SD_BYTE3, HAL_SDIO_WRITE_ONLY, SDIO_FUNCTION_0, &data) != HAL_OK) - { - return HAL_ERROR; - } - - hsdio->Context = SDIO_CONTEXT_NONE; - hsdio->State = HAL_SDIO_STATE_READY; - - return HAL_OK; -} - -/** - * @brief De-Initializes the SDIO device. - * @param hsdio: Pointer to the SDIO handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SDIO_DeInit(SDIO_HandleTypeDef *hsdio) -{ - /* Check the parameters */ - assert_param(IS_SDMMC_ALL_INSTANCE(hsdio->Instance)); - - /* Check the SDIO handle allocation */ - if (hsdio == NULL) - { - return HAL_ERROR; - } - - /* Set Power State to OFF */ - (void)SDMMC_PowerState_OFF(hsdio->Instance); - -#if defined (USE_HAL_SDIO_REGISTER_CALLBACKS) && (USE_HAL_SDIO_REGISTER_CALLBACKS == 1U) - if (hsdio->MspDeInitCallback == NULL) - { - hsdio->MspDeInitCallback = HAL_SDIO_MspDeInit; - } - - /* DeInit the low level hardware */ - hsdio->MspDeInitCallback(hsdio); -#else - /* De-Initialize the MSP layer */ - HAL_SDIO_MspDeInit(hsdio); -#endif /* USE_HAL_SDIO_REGISTER_CALLBACKS */ - - hsdio->ErrorCode = HAL_SDIO_ERROR_NONE; - hsdio->State = HAL_SDIO_STATE_RESET; - - return HAL_OK; -} - -/** - * @brief Initializes the SDIO MSP. - * @param hsdio: Pointer to SDIO handle - * @retval None - */ -__weak void HAL_SDIO_MspInit(SDIO_HandleTypeDef *hsdio) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hsdio); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_SDIO_MspInit could be implemented in the user file - */ -} - -/** - * @brief De-Initialize SDIO MSP. - * @param hsdio: Pointer to SDIO handle - * @retval None - */ -__weak void HAL_SDIO_MspDeInit(SDIO_HandleTypeDef *hsdio) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hsdio); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_SDIO_MspDeInit could be implemented in the user file - */ -} -/** - * @} - */ - -/** @addtogroup SDIO_Exported_Functions_Group2 - * @brief - * -@verbatim - ============================================================================== - ##### Initialization and de-initialization functions ##### - ============================================================================== - [..] - This subsection provides a set of functions allowing to re-configure the SDIO peripheral. - -@endverbatim - * @{ - */ -/** - * @brief Enables wide bus operation for the requested card if supported by card. - * @param hsdio: Pointer to SDIO handle - * @param BusWide: Specifies the SDIO card wide bus mode - * This parameter can be one of the following values: - * @arg SDMMC_BUS_WIDE_8B: 8-bit data transfer - * @arg SDMMC_BUS_WIDE_4B: 4-bit data transfer - * @arg SDMMC_BUS_WIDE_1B: 1-bit data transfer - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SDIO_SetDataBusWidth(SDIO_HandleTypeDef *hsdio, uint32_t BusWide) -{ - uint8_t data; - HAL_StatusTypeDef error_state = HAL_OK; - - /* Check the parameters */ - assert_param(hsdio != NULL); - - /* Check the SDIO peripheral handle parameter */ - if (hsdio == NULL) - { - return HAL_ERROR; - } - - if (hsdio->State == HAL_SDIO_STATE_READY) - { - data = (BusWide == HAL_SDIO_4_WIRES_MODE) ? 2U : 0U; - MODIFY_REG(hsdio->Instance->CLKCR, SDMMC_CLKCR_WIDBUS, - (BusWide == HAL_SDIO_4_WIRES_MODE) ? SDMMC_BUS_WIDE_4B : SDMMC_BUS_WIDE_1B); - - if (SDIO_WriteDirect(hsdio, SDMMC_SDIO_CCCR4_SD_BYTE3, HAL_SDIO_WRITE_ONLY, SDIO_FUNCTION_0, &data) != HAL_OK) - { - error_state = HAL_ERROR; - } - } - else - { - error_state = HAL_ERROR; - } - - return error_state; -} - -/** - * @brief Update the SDIO Clock. - * @param hsdio: Pointer to SDIO handle. - * @param ClockSpeed: SDIO Clock speed. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SDIO_ConfigFrequency(SDIO_HandleTypeDef *hsdio, uint32_t ClockSpeed) -{ - uint32_t ClockDiv; - - /* Check the parameters */ - assert_param(hsdio != NULL); - - /* Check the SDIO peripheral handle parameter */ - if (hsdio == NULL) - { - return HAL_ERROR; - } - - if (hsdio->State == HAL_SDIO_STATE_READY) - { - if (hsdio->Instance == SDMMC1) - { - ClockDiv = (HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_SDMMC1)) / (2U * ClockSpeed); - } -#if defined(SDMMC2) - if (hsdio->Instance == SDMMC2) - { - ClockDiv = (HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_SDMMC2)) / (2U * ClockSpeed); - } -#endif /* SDMMC2 */ - MODIFY_REG(hsdio->Instance->CLKCR, SDMMC_CLKCR_CLKDIV, ClockDiv); - } - else - { - return HAL_ERROR; - } - - return HAL_OK; -} - -/** - * @brief Set the SDIO block size. - * @param hsdio: Pointer to SDIO handle - * @param function_nbr: Specifies the SDIO function number. - * @param BlockSize: Specifies the SDIO Block size to set. - * This parameter can be one of the following values @ref SDIO_Exported_Constansts_Group7. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SDIO_SetBlockSize(SDIO_HandleTypeDef *hsdio, uint8_t function_nbr, uint16_t BlockSize) -{ - HAL_SDIO_ExtendedCmd_TypeDef cmd53; - - /* Check the parameters */ - assert_param(hsdio != NULL); - assert_param(IS_SDIO_FUNCTION(function_nbr)); - assert_param(IS_SDIO_SUPPORTED_BLOCK_SIZE(BlockSize)); - - /* Check the SDIO peripheral handle parameter */ - if (hsdio == NULL) - { - return HAL_ERROR; - } - - /* Set SDIO F1 block size */ - cmd53.IOFunctionNbr = SDIO_FUNCTION_0; - cmd53.OpCode = HAL_SDIO_OP_CODE_AUTO_INC; - cmd53.Block_Mode = HAL_SDIO_MODE_BYTE; - cmd53.Reg_Addr = (function_nbr * 0x100UL) + 0x10UL; - if (SDIO_WriteExtended(hsdio, &cmd53, (uint8_t *)(&BlockSize), 2U) != HAL_OK) - { - return HAL_ERROR; - } - - hsdio->block_size = BlockSize; - - return HAL_OK; -} - -/** - * @brief Configure the data rate. - * @param hsdio: Pointer to SDIO handle - * @param DataRate: Specifies the SDIO data rate to set. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SDIO_SetSpeedMode(SDIO_HandleTypeDef *hsdio, uint32_t DataRate) -{ - HAL_StatusTypeDef errorstate = HAL_OK; - uint8_t data; - - /* Check the parameters */ - assert_param(hsdio != NULL); - - /* Check the SDIO peripheral handle parameter */ - if (hsdio == NULL) - { - return HAL_ERROR; - } - - switch (DataRate) - { - case HAL_SDIOS_DATA_RATE_SDR25: - data = (uint8_t)SDIO_BUS_SPEED_SDR25; - errorstate = SDIO_WriteDirect(hsdio, SDMMC_SDIO_CCCR16_SD_BYTE3, HAL_SDIO_WRITE_ONLY, SDIO_FUNCTION_0, &data); - break; - - case HAL_SDIOS_DATA_RATE_SDR50: - data = (uint8_t)SDIO_BUS_SPEED_SDR50; - errorstate = SDIO_WriteDirect(hsdio, ((SDIO_FUNCTION_0 << 2U) | (SDIO_FUNCTION_0 << 1U) | (SDIO_FUNCTION_0 << 14U) - | SDMMC_SDIO_CCCR16_SD_BYTE3), HAL_SDIO_WRITE_ONLY, SDIO_FUNCTION_0, &data); - MODIFY_REG(hsdio->Instance->CLKCR, SDMMC_CLKCR_BUSSPEED, SDMMC_CLKCR_BUSSPEED); - break; - - case HAL_SDIOS_DATA_RATE_DDR50: - data = (uint8_t)SDIO_BUS_SPEED_DDR50; - errorstate = SDIO_WriteDirect(hsdio, ((SDIO_FUNCTION_0 << 2) | (SDIO_FUNCTION_0 << 1) | (SDIO_FUNCTION_0 << 14) | - SDMMC_SDIO_CCCR16_SD_BYTE3), HAL_SDIO_WRITE_ONLY, SDIO_FUNCTION_0, &data); - MODIFY_REG(hsdio->Instance->CLKCR, SDMMC_CLKCR_DDR | SDMMC_CLKCR_BUSSPEED, - SDMMC_CLKCR_DDR | SDMMC_CLKCR_BUSSPEED); - break; - default: /* SDR12 */ - break; - } - - return (errorstate != HAL_OK) ? HAL_ERROR : HAL_OK; -} - -/** - * @brief Reset SDIO Card - * @param hsdio: Pointer to SDIO handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SDIO_CardReset(SDIO_HandleTypeDef *hsdio) -{ - uint8_t data = 0U; - - /* Check the parameters */ - assert_param(hsdio != NULL); - - /* Check the SDIO peripheral handle parameter */ - if (hsdio == NULL) - { - return HAL_ERROR; - } - - /** To reset the SDIO module by CMD52 with writing to RES in CCCR or send CMD0 the card shall change the speed mode - * default speed mode. - * The reset cmd (cmd0) is only used for memory. In order to reset an I/O card or the I/O portion of a combo card, - * Use CMD52 to write 1 to the RES bit in the CCC(bit3 of register 6). - */ - if (SDIO_WriteDirect(hsdio, ((SDIO_FUNCTION_0 << 2) | (SDIO_FUNCTION_0 << 1) | (SDIO_FUNCTION_0 << 14) | - SDMMC_SDIO_CCCR4_SD_BYTE2), - HAL_SDIO_WRITE_ONLY, - 0U, - &data) != HAL_OK) - { - return HAL_ERROR; - } - - hsdio->State = HAL_SDIO_STATE_RESET; - - return HAL_OK; -} - -/** - * @brief Get Card Common Control register (CCCR). - * @param hsdio: Pointer to SDIO handle. - * @param pCccr: Pointer to Cccr register. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SDIO_GetCardCommonControlRegister(SDIO_HandleTypeDef *hsdio, HAL_SDIO_CCCR_TypeDef *pCccr) -{ - uint8_t tempBuffer[256] = {0U}; - uint32_t count; - - assert_param(hsdio != NULL); - assert_param(pCccr != NULL); - - if ((hsdio == NULL) || (pCccr == NULL)) - { - return HAL_ERROR; - } - - for (count = 0U; count <= SDIO_CCCR_REG_NUMBER; count++) - { - if (SDIO_ReadDirect(hsdio, SDMMC_SDIO_CCCR0 + count, HAL_SDIO_WRITE_ONLY, SDIO_FUNCTION_0, &tempBuffer[count]) != - HAL_OK) - { - return HAL_ERROR; - } - } - - pCccr->cccr_revision = tempBuffer[0] & 0x0FU; - pCccr->sdio_revision = (tempBuffer[0] & 0xF0U) >> 4U; - pCccr->sd_spec_revision = tempBuffer[0x01U] & 0x0FU; - pCccr->bus_width_8Bit = ((tempBuffer[0x07U] & 0x04U) != 0U) ? HAL_SDIO_BUS_WIDTH_8BIT_SUPPORTED - : HAL_SDIO_BUS_WIDTH_8BIT_NOT_SUPPORTED; - pCccr->card_capability = (tempBuffer[0x08U] & 0xDFUL); - /* common CIS pointer */ - pCccr->commonCISPointer = tempBuffer[0x09U] | ((uint32_t)tempBuffer[(uint32_t)0x09U + 1U] << 8U) | - ((uint32_t)tempBuffer[(uint32_t)0x09U + 2U] << 16U); - - return HAL_OK; -} - -/** - * @brief Get Card Function Basic register(FBR). - * @param hsdio: Pointer to SDIO handle. - * @param pFbr: Pointer to Fbr register. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SDIO_GetCardFBRRegister(SDIO_HandleTypeDef *hsdio, HAL_SDIO_FBR_t *pFbr) -{ - uint8_t tempBuffer[256] = {0U}; - uint32_t count; - uint8_t func_idx; - - assert_param(hsdio != NULL); - assert_param(pFbr != NULL); - - if ((hsdio == NULL) || (pFbr == NULL)) - { - return HAL_ERROR; - } - - for (func_idx = 2U; func_idx <= SDIO_MAX_IO_NUMBER; func_idx++) - { - for (count = 0U; count <= SDIO_CCCR_REG_NUMBER; count++) - { - if (SDIO_ReadDirect(hsdio, (((uint32_t)SDMMC_SDIO_F1BR0 * (uint32_t)func_idx) + count), - HAL_SDIO_WRITE_ONLY, SDIO_FUNCTION_0, &tempBuffer[count]) != HAL_OK) - { - return HAL_ERROR; - } - } - pFbr[(uint32_t)func_idx - 1U].ioStdFunctionCode = tempBuffer[0U] & 0x0FU; - pFbr[(uint32_t)func_idx - 1U].ioExtFunctionCode = tempBuffer[1U]; - pFbr[(uint32_t)func_idx - 1U].ioPointerToCIS = tempBuffer[9U] | ((uint32_t)tempBuffer[10U] << 8U) | - ((uint32_t)tempBuffer[11U] << 16U); - pFbr[(uint32_t)func_idx - 1U].ioPointerToCSA = tempBuffer[12U] | ((uint32_t)tempBuffer[13U] << 8U) | - ((uint32_t)tempBuffer[14U] << 16U); - if ((tempBuffer[2U] & 0x01U) != 0U) - { - pFbr[(uint32_t)func_idx - 1U].flags |= (uint8_t)HAL_SDIO_FBR_SUPPORT_POWER_SELECTION; - } - if ((tempBuffer[0U] & 0x40U) != 0U) - { - pFbr[(uint32_t)func_idx - 1U].flags |= (uint8_t)HAL_SDIO_FBR_SUPPORT_CSA; - } - } - - return HAL_OK; -} -/** - * @} - */ - -/** @addtogroup SDIO_Exported_Functions_Group3 - * @brief - * -@verbatim - ============================================================================== - ##### Data management functions ##### - ============================================================================== - [..] - This subsection provides a set of functions allowing to manage the data transfer from/to SDIO card. - -@endverbatim - * @{ - */ -/** - * @brief Read data from a specified address using the direct mode through cmd52. - * @param hsdio: Pointer to SDIO handle - * @param Argument: Specifies the SDIO Argument. - * @param pData: pointer to the buffer that will contain the received data. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SDIO_ReadDirect(SDIO_HandleTypeDef *hsdio, const HAL_SDIO_DirectCmd_TypeDef *Argument, - uint8_t *pData) -{ - uint32_t cmd; - uint32_t errorstate; - - /* Check the parameters */ - assert_param(hsdio != NULL); - assert_param(Argument != NULL); - assert_param(pData != NULL); - assert_param(IS_SDIO_RAW_FLAG(Argument->ReadAfterWrite)); - - if ((hsdio == NULL) || (Argument == NULL) || (NULL == pData)) - { - return HAL_ERROR; - } - - if (hsdio->State == HAL_SDIO_STATE_READY) - { - hsdio->ErrorCode = HAL_SDIO_ERROR_NONE; - hsdio->State = HAL_SDIO_STATE_BUSY; - - cmd = SDIO_READ << 31U; - cmd |= (((uint32_t)Argument->IOFunctionNbr) << 28U); - cmd |= (((uint32_t)Argument->ReadAfterWrite) << 27U); - cmd |= (Argument->Reg_Addr & 0x1FFFFU) << 9U; - cmd |= 0U; - errorstate = SDMMC_SDIO_CmdReadWriteDirect(hsdio->Instance, cmd, pData); - - if (errorstate != HAL_SDIO_ERROR_NONE) - { - hsdio->ErrorCode |= errorstate; - if (errorstate != (SDMMC_ERROR_ADDR_OUT_OF_RANGE | SDMMC_ERROR_ILLEGAL_CMD | SDMMC_ERROR_COM_CRC_FAILED | - SDMMC_ERROR_GENERAL_UNKNOWN_ERR)) - { - /* Clear all the static flags */ - __HAL_SDIO_CLEAR_FLAG(hsdio, SDMMC_STATIC_FLAGS); - hsdio->State = HAL_SDIO_STATE_READY; - hsdio->Context = SDIO_CONTEXT_NONE; - return HAL_ERROR; - } - } - - __SDMMC_CMDTRANS_DISABLE(hsdio->Instance); - - /* Clear all the static flags */ - __HAL_SDIO_CLEAR_FLAG(hsdio, SDMMC_STATIC_DATA_FLAGS); - - hsdio->State = HAL_SDIO_STATE_READY; - } - else - { - return HAL_BUSY; - } - - return HAL_OK; -} - - -/** - * @brief Read data from a specified address using the direct mode through cmd52. - * @param hsdio: Pointer to SDIO handle - * @param Argument: Specifies the SDIO Argument. - * @param Data: pointer to the buffer that will contain the received data. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SDIO_WriteDirect(SDIO_HandleTypeDef *hsdio, const HAL_SDIO_DirectCmd_TypeDef *Argument, - uint8_t Data) -{ - uint32_t cmd; - uint32_t errorstate; - - /* Check the parameters */ - assert_param(hsdio != NULL); - assert_param(Argument != NULL); - assert_param(IS_SDIO_RAW_FLAG(Argument->ReadAfterWrite)); - - if ((hsdio == NULL) || (Argument == NULL)) - { - return HAL_ERROR; - } - - if (hsdio->State == HAL_SDIO_STATE_READY) - { - hsdio->ErrorCode = HAL_SDIO_ERROR_NONE; - hsdio->State = HAL_SDIO_STATE_BUSY; - - cmd = SDIO_WRITE << 31U; - cmd |= ((uint32_t)Argument->IOFunctionNbr) << 28U; - cmd |= ((uint32_t)Argument->ReadAfterWrite) << 27U; - cmd |= (Argument->Reg_Addr & 0x1FFFFU) << 9U; - cmd |= Data; - errorstate = SDMMC_SDIO_CmdReadWriteDirect(hsdio->Instance, cmd, &Data); - if (errorstate != HAL_SDIO_ERROR_NONE) - { - hsdio->ErrorCode |= errorstate; - if (errorstate != (SDMMC_ERROR_ADDR_OUT_OF_RANGE | SDMMC_ERROR_ILLEGAL_CMD | SDMMC_ERROR_COM_CRC_FAILED | - SDMMC_ERROR_GENERAL_UNKNOWN_ERR)) - { - /* Clear all the static flags */ - __HAL_SDIO_CLEAR_FLAG(hsdio, SDMMC_STATIC_FLAGS); - hsdio->State = HAL_SDIO_STATE_READY; - hsdio->Context = SDIO_CONTEXT_NONE; - return HAL_ERROR; - } - } - - __SDMMC_CMDTRANS_DISABLE(hsdio->Instance); - - /* Clear all the static flags */ - __HAL_SDIO_CLEAR_FLAG(hsdio, SDMMC_STATIC_DATA_FLAGS); - - hsdio->State = HAL_SDIO_STATE_READY; - } - else - { - return HAL_BUSY; - } - - return HAL_OK; -} - -/** - * @brief Read data from a specified address using extended mode through cmd53. - * @param hsdio: Pointer to SDIO handle - * @param Argument: Pointer to SDIO argument - * @param pData: pointer to the buffer that will contain the data to transmit - * @param Size_byte: size to read. - * @param Timeout_Ms: Specify timeout value - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SDIO_ReadExtended(SDIO_HandleTypeDef *hsdio, const HAL_SDIO_ExtendedCmd_TypeDef *Argument, - uint8_t *pData, uint32_t Size_byte, uint32_t Timeout_Ms) -{ - uint32_t cmd; - SDMMC_DataInitTypeDef config; - uint32_t errorstate; - uint32_t tickstart = HAL_GetTick(); - uint32_t regCount; - uint8_t byteCount; - uint32_t data; - uint32_t dataremaining; - uint8_t *tempbuff = pData; - uint32_t nbr_of_block; - - /* Check the parameters */ - assert_param(hsdio != NULL); - assert_param(Argument != NULL); - assert_param(pData != NULL); - - if ((hsdio == NULL) || (Argument == NULL) || (pData == NULL)) - { - return HAL_ERROR; - } - - if (hsdio->State == HAL_SDIO_STATE_READY) - { - hsdio->ErrorCode = HAL_SDIO_ERROR_NONE; - hsdio->State = HAL_SDIO_STATE_BUSY; - - /* Compute how many blocks are to be send for pData of length data_size to be send */ - nbr_of_block = (Size_byte & ~(hsdio->block_size & 1U)) >> __CLZ(__RBIT(hsdio->block_size)); - - /* Initialize data control register */ - if ((hsdio->Instance->DCTRL & SDMMC_DCTRL_SDIOEN) != 0U) - { - hsdio->Instance->DCTRL = SDMMC_DCTRL_SDIOEN; - } - else - { - hsdio->Instance->DCTRL = 0U; - } - - /* Configure the SDIO DPSM (Data Path State Machine) */ - config.DataTimeOut = SDMMC_DATATIMEOUT; - /* (HAL_SDIO_MODE_BLOCK << 27) corresponds to the block mode bit of the CMD argument */ - if (Argument->Block_Mode == HAL_SDIO_MODE_BLOCK) - { - /* (Argument & 0x1FFU) is to get the 9 bits of Block/Byte counts */ - config.DataLength = (uint32_t)(nbr_of_block * hsdio->block_size); - config.DataBlockSize = SDIO_Convert_Block_Size(hsdio, hsdio->block_size); - } - else - { - /* (Argument & 0x1FFU) is to get the 9 bits of Block/Byte counts */ - config.DataLength = (Size_byte > 0U) ? Size_byte : HAL_SDIO_DATA_BLOCK_SIZE_512BYTE; - config.DataBlockSize = SDMMC_DATABLOCK_SIZE_1B; - } - - config.TransferDir = SDMMC_TRANSFER_DIR_TO_SDMMC ; - /* (HAL_SDIO_MODE_BLOCK << 27) corresponds to the block mode bit of the CMD argument */ - config.TransferMode = (Argument->Block_Mode == HAL_SDIO_MODE_BLOCK) ? SDMMC_TRANSFER_MODE_BLOCK : - SDMMC_TRANSFER_MODE_SDIO; - config.DPSM = SDMMC_DPSM_DISABLE; - (void)SDMMC_ConfigData(hsdio->Instance, &config); - __SDMMC_CMDTRANS_ENABLE(hsdio->Instance); - - /* Correspond to the write or read bit of the CMD argument */ - /* Read */ - hsdio->Context = (Argument->Block_Mode == HAL_SDIO_MODE_BLOCK) ? SDIO_CONTEXT_READ_MULTIPLE_BLOCK : - SDIO_CONTEXT_READ_SINGLE_BLOCK; - cmd = SDIO_READ << 31U; - cmd |= Argument->IOFunctionNbr << 28U; - cmd |= Argument->Block_Mode << 27U; - cmd |= Argument->OpCode << 26U; - cmd |= (Argument->Reg_Addr & 0x1FFFFU) << 9U; - if (Argument->Block_Mode == HAL_SDIO_MODE_BYTE) - { - cmd |= (((uint32_t)Size_byte) & 0x1FFU); - } - else /* HAL_SDIO_BLOCK_MODE_BLOCK */ - { - cmd |= nbr_of_block & 0x1FFU; - } - errorstate = SDMMC_SDIO_CmdReadWriteExtended(hsdio->Instance, cmd); - if (errorstate != HAL_SDIO_ERROR_NONE) - { - hsdio->ErrorCode |= errorstate; - if (errorstate != (SDMMC_ERROR_ADDR_OUT_OF_RANGE | SDMMC_ERROR_ILLEGAL_CMD | SDMMC_ERROR_COM_CRC_FAILED | - SDMMC_ERROR_GENERAL_UNKNOWN_ERR)) - { - MODIFY_REG(hsdio->Instance->DCTRL, SDMMC_DCTRL_FIFORST, SDMMC_DCTRL_FIFORST); - __HAL_SDIO_CLEAR_FLAG(hsdio, SDMMC_STATIC_FLAGS); - __HAL_SDIO_CLEAR_FLAG(hsdio, SDMMC_STATIC_DATA_FLAGS); - hsdio->State = HAL_SDIO_STATE_READY; - hsdio->Context = SDIO_CONTEXT_NONE; - return HAL_ERROR; - } - } - /* (SDIO_WRITE << 31) correspond to the write or read bit of the CMD argument */ - /* Poll on SDMMC flags */ - dataremaining = config.DataLength; - - while (!__HAL_SDIO_GET_FLAG(hsdio, SDMMC_FLAG_RXOVERR | SDMMC_FLAG_DCRCFAIL | - SDMMC_FLAG_DTIMEOUT | SDMMC_FLAG_DATAEND)) - { - if (__HAL_SDIO_GET_FLAG(hsdio, SDMMC_FLAG_RXFIFOHF) && (dataremaining >= SDMMC_FIFO_SIZE)) - { - /* Read data from SDMMC Rx FIFO */ - for (regCount = 0U; regCount < (SDMMC_FIFO_SIZE / 4U); regCount++) - { - data = SDMMC_ReadFIFO(hsdio->Instance); - *tempbuff = (uint8_t)(data & 0xFFU); - tempbuff++; - *tempbuff = (uint8_t)((data >> 8U) & 0xFFU); - tempbuff++; - *tempbuff = (uint8_t)((data >> 16U) & 0xFFU); - tempbuff++; - *tempbuff = (uint8_t)((data >> 24U) & 0xFFU); - tempbuff++; - } - dataremaining -= SDMMC_FIFO_SIZE; - } - else if (dataremaining < SDMMC_FIFO_SIZE) - { - while (!(__HAL_SDIO_GET_FLAG(hsdio, SDMMC_FLAG_RXFIFOE)) && (dataremaining > 0U)) - { - data = SDMMC_ReadFIFO(hsdio->Instance); - for (byteCount = 0U; byteCount < 4U; byteCount++) - { - if (dataremaining > 0U) - { - *tempbuff = (uint8_t)((data >> (byteCount * 8U)) & 0xFFU); - tempbuff++; - dataremaining--; - } - } - } - } - else - { - /* Nothing to do */ - } - if ((HAL_GetTick() - tickstart) >= Timeout_Ms) - { - /* Clear all the static flags */ - __HAL_SDIO_CLEAR_FLAG(hsdio, SDMMC_STATIC_FLAGS); - hsdio->ErrorCode |= HAL_SDIO_ERROR_TIMEOUT; - hsdio->State = HAL_SDIO_STATE_READY; - hsdio->Context = SDIO_CONTEXT_NONE; - return HAL_TIMEOUT; - } - } - __SDMMC_CMDTRANS_DISABLE(hsdio->Instance); - /* Get error state */ - if (__HAL_SDIO_GET_FLAG(hsdio, SDMMC_FLAG_DTIMEOUT)) - { - /* Clear all the static flags */ - __HAL_SDIO_CLEAR_FLAG(hsdio, SDMMC_STATIC_FLAGS); - hsdio->ErrorCode |= HAL_SDIO_ERROR_DATA_TIMEOUT; - hsdio->State = HAL_SDIO_STATE_READY; - hsdio->Context = SDIO_CONTEXT_NONE; - return HAL_ERROR; - } - else if (__HAL_SDIO_GET_FLAG(hsdio, SDMMC_FLAG_DCRCFAIL)) - { - /* Clear all the static flags */ - __HAL_SDIO_CLEAR_FLAG(hsdio, SDMMC_STATIC_FLAGS); - hsdio->ErrorCode |= HAL_SDIO_ERROR_DATA_CRC_FAIL; - hsdio->State = HAL_SDIO_STATE_READY; - hsdio->Context = SDIO_CONTEXT_NONE; - return HAL_ERROR; - } - else if (__HAL_SDIO_GET_FLAG(hsdio, SDMMC_FLAG_RXOVERR)) - { - /* Clear all the static flags */ - __HAL_SDIO_CLEAR_FLAG(hsdio, SDMMC_STATIC_FLAGS); - /* (SDIO_WRITE << 31) correspond to the write or read bit of the CMD argument */ - hsdio->ErrorCode |= HAL_SDIO_ERROR_RX_OVERRUN; - hsdio->State = HAL_SDIO_STATE_READY; - hsdio->Context = SDIO_CONTEXT_NONE; - return HAL_ERROR; - } - else if (hsdio->ErrorCode == SDMMC_ERROR_INVALID_PARAMETER) - { - __HAL_SDIO_CLEAR_FLAG(hsdio, SDMMC_STATIC_DATA_FLAGS); - hsdio->State = HAL_SDIO_STATE_READY; - hsdio->Context = SDIO_CONTEXT_NONE; - return HAL_ERROR; - } - else - { - /* Nothing to do */ - } - - /* Clear all the static flags */ - __HAL_SDIO_CLEAR_FLAG(hsdio, SDMMC_STATIC_DATA_FLAGS); - - hsdio->State = HAL_SDIO_STATE_READY; - } - else - { - return HAL_BUSY; - } - - return HAL_OK; -} - -/** - * @brief Write data from a specified address using extended mode through cmd53. - * @param hsdio: Pointer to SDIO handle - * @param Argument: Pointer to SDIO argument - * @param pData: pointer to the buffer that will contain the data to transmit - * @param Size_byte: Block size to write. - * @param Timeout_Ms: Specify timeout value - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SDIO_WriteExtended(SDIO_HandleTypeDef *hsdio, const HAL_SDIO_ExtendedCmd_TypeDef *Argument, - uint8_t *pData, uint32_t Size_byte, uint32_t Timeout_Ms) -{ - uint32_t cmd; - SDMMC_DataInitTypeDef config; - uint32_t errorstate; - uint32_t tickstart = HAL_GetTick(); - uint32_t regCount; - uint8_t byteCount; - uint32_t data; - uint32_t dataremaining; - uint32_t *u32tempbuff = (uint32_t *)(uint32_t)pData; - uint32_t nbr_of_block; - - /* Check the parameters */ - assert_param(hsdio != NULL); - assert_param(Argument != NULL); - assert_param(pData != NULL); - - if ((hsdio == NULL) || (Argument == NULL) || (pData == NULL)) - { - return HAL_ERROR; - } - - if (hsdio->State == HAL_SDIO_STATE_READY) - { - hsdio->ErrorCode = HAL_SDIO_ERROR_NONE; - hsdio->State = HAL_SDIO_STATE_BUSY; - - /* Compute how many blocks are to be send for pData of length data_size to be send */ - nbr_of_block = (Size_byte & ~(hsdio->block_size & 1U)) >> __CLZ(__RBIT(hsdio->block_size)); - - /* Initialize data control register */ - if ((hsdio->Instance->DCTRL & SDMMC_DCTRL_SDIOEN) != 0U) - { - hsdio->Instance->DCTRL = SDMMC_DCTRL_SDIOEN; - } - else - { - hsdio->Instance->DCTRL = 0U; - } - - /* Configure the SDIO DPSM (Data Path State Machine) */ - config.DataTimeOut = SDMMC_DATATIMEOUT; - if (Argument->Block_Mode == HAL_SDIO_MODE_BLOCK) - { - config.DataLength = (uint32_t)(nbr_of_block * hsdio->block_size); - config.DataBlockSize = SDIO_Convert_Block_Size(hsdio, hsdio->block_size); - } - else - { - config.DataLength = (Size_byte > 0U) ? Size_byte : HAL_SDIO_DATA_BLOCK_SIZE_512BYTE; - config.DataBlockSize = SDMMC_DATABLOCK_SIZE_1B; - } - - config.TransferDir = SDMMC_TRANSFER_DIR_TO_CARD; - /* (HAL_SDIO_MODE_BLOCK << 27) corresponds to the block mode bit of the CMD argument */ - config.TransferMode = (Argument->Block_Mode == HAL_SDIO_MODE_BLOCK) ? SDMMC_TRANSFER_MODE_BLOCK : - SDMMC_TRANSFER_MODE_SDIO; - config.DPSM = SDMMC_DPSM_DISABLE; - (void)SDMMC_ConfigData(hsdio->Instance, &config); - __SDMMC_CMDTRANS_ENABLE(hsdio->Instance); - - /* Correspond to the write or read bit of the CMD argument */ - hsdio->Context = (Argument->Block_Mode == HAL_SDIO_MODE_BLOCK) ? SDIO_CONTEXT_WRITE_MULTIPLE_BLOCK : - SDIO_CONTEXT_WRITE_SINGLE_BLOCK; - cmd = SDIO_WRITE << 31U; - cmd |= Argument->IOFunctionNbr << 28U; - cmd |= Argument->Block_Mode << 27U; - cmd |= Argument->OpCode << 26U; - cmd |= (Argument->Reg_Addr & 0x1FFFFU) << 9U; - if (Argument->Block_Mode == HAL_SDIO_MODE_BYTE) - { - cmd |= (((uint32_t)Size_byte) & 0x1FFU); - } - else /* HAL_SDIO_BLOCK_MODE_BLOCK */ - { - cmd |= nbr_of_block & 0x1FFU; - } - errorstate = SDMMC_SDIO_CmdReadWriteExtended(hsdio->Instance, cmd); - if (errorstate != HAL_SDIO_ERROR_NONE) - { - hsdio->ErrorCode |= errorstate; - if (errorstate != (SDMMC_ERROR_ADDR_OUT_OF_RANGE | SDMMC_ERROR_ILLEGAL_CMD | SDMMC_ERROR_COM_CRC_FAILED | - SDMMC_ERROR_GENERAL_UNKNOWN_ERR)) - { - MODIFY_REG(hsdio->Instance->DCTRL, SDMMC_DCTRL_FIFORST, SDMMC_DCTRL_FIFORST); - __HAL_SDIO_CLEAR_FLAG(hsdio, SDMMC_STATIC_FLAGS); - __HAL_SDIO_CLEAR_FLAG(hsdio, SDMMC_STATIC_DATA_FLAGS); - hsdio->State = HAL_SDIO_STATE_READY; - hsdio->Context = SDIO_CONTEXT_NONE; - return HAL_ERROR; - } - } - /* Write block(s) in polling mode */ - dataremaining = config.DataLength; - while (!__HAL_SDIO_GET_FLAG(hsdio, SDMMC_FLAG_TXUNDERR | SDMMC_FLAG_DCRCFAIL | SDMMC_FLAG_DTIMEOUT | - SDMMC_FLAG_DATAEND)) - { - - if (__HAL_SDIO_GET_FLAG(hsdio, SDMMC_FLAG_TXFIFOHE) && (dataremaining >= SDMMC_FIFO_SIZE)) - { - /* Read data from SDMMC Rx FIFO */ - for (regCount = 0U; regCount < (SDMMC_FIFO_SIZE / 4U); regCount++) - { - hsdio->Instance->FIFO = *u32tempbuff; - u32tempbuff++; - } - dataremaining -= SDMMC_FIFO_SIZE; - } - else if ((__HAL_SDIO_GET_FLAG(hsdio, SDMMC_FLAG_TXFIFOHE | SDMMC_FLAG_TXFIFOE)) && - (dataremaining < SDMMC_FIFO_SIZE)) - { - const uint8_t *u8buff = (uint8_t *)u32tempbuff; - while (dataremaining > 0U) - { - data = 0U; - for (byteCount = 0U; (byteCount < 4U) && (dataremaining > 0U); byteCount++) - { - data |= ((uint32_t)(*u8buff) << (byteCount << 3U)); - u8buff++; - dataremaining--; - } - hsdio->Instance->FIFO = data; - } - } - if (((HAL_GetTick() - tickstart) >= Timeout_Ms)) - { - /* Clear all the static flags */ - __HAL_SDIO_CLEAR_FLAG(hsdio, SDMMC_STATIC_FLAGS); - hsdio->ErrorCode |= HAL_SDIO_ERROR_TIMEOUT; - hsdio->State = HAL_SDIO_STATE_READY; - hsdio->Context = SDIO_CONTEXT_NONE; - return HAL_TIMEOUT; - } - } - - __SDMMC_CMDTRANS_DISABLE(hsdio->Instance); - /* Get error state */ - if (__HAL_SDIO_GET_FLAG(hsdio, SDMMC_FLAG_DTIMEOUT)) - { - /* Clear all the static flags */ - __HAL_SDIO_CLEAR_FLAG(hsdio, SDMMC_STATIC_FLAGS); - hsdio->ErrorCode |= HAL_SDIO_ERROR_DATA_TIMEOUT; - hsdio->State = HAL_SDIO_STATE_READY; - hsdio->Context = SDIO_CONTEXT_NONE; - return HAL_ERROR; - } - else if (__HAL_SDIO_GET_FLAG(hsdio, SDMMC_FLAG_DCRCFAIL)) - { - /* Clear all the static flags */ - __HAL_SDIO_CLEAR_FLAG(hsdio, SDMMC_STATIC_FLAGS); - hsdio->ErrorCode |= HAL_SDIO_ERROR_DATA_CRC_FAIL; - hsdio->State = HAL_SDIO_STATE_READY; - hsdio->Context = SDIO_CONTEXT_NONE; - return HAL_ERROR; - } - else if (__HAL_SDIO_GET_FLAG(hsdio, SDMMC_FLAG_TXUNDERR)) - { - /* Clear all the static flags */ - __HAL_SDIO_CLEAR_FLAG(hsdio, SDMMC_STATIC_FLAGS); - /* (SDIO_WRITE << 31) correspond to the write or read bit of the CMD argument */ - hsdio->ErrorCode |= HAL_SDIO_ERROR_TX_UNDERRUN; - hsdio->State = HAL_SDIO_STATE_READY; - hsdio->Context = SDIO_CONTEXT_NONE; - return HAL_ERROR; - } - else if (hsdio->ErrorCode == SDMMC_ERROR_INVALID_PARAMETER) - { - __HAL_SDIO_CLEAR_FLAG(hsdio, SDMMC_STATIC_DATA_FLAGS); - hsdio->State = HAL_SDIO_STATE_READY; - hsdio->Context = SDIO_CONTEXT_NONE; - return HAL_ERROR; - } - else - { - /* Nothing to do */ - } - - /* Clear all the static flags */ - __HAL_SDIO_CLEAR_FLAG(hsdio, SDMMC_STATIC_DATA_FLAGS); - - hsdio->State = HAL_SDIO_STATE_READY; - } - else - { - return HAL_BUSY; - } - - return HAL_OK; -} - -/** - * @brief Read data from a specified address using extended mode through cmd53 in DMA mode. - * @param hsdio: Pointer to SDIO handle - * @param Argument: Pointer to SDIO argument - * @param pData: pointer to the buffer that will contain the data to transmit - * @param Size_byte: Block size to write. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SDIO_ReadExtended_DMA(SDIO_HandleTypeDef *hsdio, const HAL_SDIO_ExtendedCmd_TypeDef *Argument, - uint8_t *pData, uint32_t Size_byte) -{ - SDMMC_DataInitTypeDef config; - uint32_t errorstate; - uint8_t *p_dma_buffer; - uint32_t cmd; - uint32_t nbr_of_block; - - /* Check the parameters */ - assert_param(hsdio != NULL); - assert_param(Argument != NULL); - assert_param(pData != NULL); - - if ((hsdio == NULL) || (Argument == NULL) || (pData == NULL)) - { - return HAL_ERROR; - } - - if (hsdio->State == HAL_SDIO_STATE_READY) - { - hsdio->ErrorCode = HAL_SDIO_ERROR_NONE; - hsdio->State = HAL_SDIO_STATE_BUSY; - - /* Initialize data control register */ - if ((hsdio->Instance->DCTRL & SDMMC_DCTRL_SDIOEN) != 0U) - { - hsdio->Instance->DCTRL = SDMMC_DCTRL_SDIOEN; - } - else - { - hsdio->Instance->DCTRL = 0U; - } - - p_dma_buffer = (uint8_t *)pData; - hsdio->pRxBuffPtr = (uint8_t *)pData; - hsdio->RxXferSize = Size_byte; - hsdio->next_data_addr = (uint32_t)pData; - - /* Compute how many blocks are to be send for pData of length data_size to be send */ - nbr_of_block = (Size_byte & ~(hsdio->block_size & 1U)) >> __CLZ(__RBIT(hsdio->block_size)); - - if (nbr_of_block != 0U) - { - hsdio->remaining_data = (Size_byte - (hsdio->block_size * nbr_of_block)); - hsdio->next_reg_addr = (Argument->Reg_Addr) | ((((nbr_of_block * hsdio->block_size) >> 1U) & 0x3FFFU) << 1U) - | ((hsdio->remaining_data <= HAL_SDIO_DATA_BLOCK_SIZE_512BYTE) ? 1U : 0U); - hsdio->next_data_addr += (nbr_of_block * hsdio->block_size); - } - else - { - hsdio->next_data_addr += (Size_byte < HAL_SDIO_DATA_BLOCK_SIZE_512BYTE) ? Size_byte : - HAL_SDIO_DATA_BLOCK_SIZE_512BYTE; - if (hsdio->remaining_data != 0U) - { - hsdio->remaining_data = (Size_byte >= HAL_SDIO_DATA_BLOCK_SIZE_512BYTE) ? - (Size_byte - HAL_SDIO_DATA_BLOCK_SIZE_512BYTE) : - (Size_byte - hsdio->remaining_data); - hsdio->next_reg_addr += (Size_byte >= HAL_SDIO_DATA_BLOCK_SIZE_512BYTE) ? \ - (HAL_SDIO_DATA_BLOCK_SIZE_512BYTE + 1U) : (Size_byte + 1U); - } - } - - /* DMA configuration (use single buffer) */ - hsdio->Instance->IDMACTRL = SDMMC_ENABLE_IDMA_SINGLE_BUFF; - hsdio->Instance->IDMABASER = (uint32_t)p_dma_buffer; - - /* Configure the SD DPSM (Data Path State Machine) */ - config.DataTimeOut = SDMMC_DATATIMEOUT; - if (Argument->Block_Mode == HAL_SDIO_MODE_BLOCK) - { - config.DataLength = (uint32_t)(nbr_of_block * hsdio->block_size); - config.DataBlockSize = SDIO_Convert_Block_Size(hsdio, hsdio->block_size); - } - else - { - config.DataLength = (Size_byte > 0U) ? Size_byte : HAL_SDIO_DATA_BLOCK_SIZE_512BYTE; - config.DataBlockSize = SDMMC_DATABLOCK_SIZE_1B; - } - - config.TransferDir = SDMMC_TRANSFER_DIR_TO_SDMMC ; - config.TransferMode = (Argument->Block_Mode == HAL_SDIO_MODE_BLOCK) ? SDMMC_TRANSFER_MODE_BLOCK : - SDMMC_TRANSFER_MODE_SDIO; - config.DPSM = SDMMC_DPSM_DISABLE; - (void)SDMMC_ConfigData(hsdio->Instance, &config); - - __SDMMC_CMDTRANS_ENABLE(hsdio->Instance); - - /* Read */ - hsdio->Context = (uint32_t)((Argument->Block_Mode == HAL_SDIO_MODE_BLOCK) ? SDIO_CONTEXT_READ_MULTIPLE_BLOCK : - SDIO_CONTEXT_READ_SINGLE_BLOCK) | SDIO_CONTEXT_DMA; - - cmd = SDIO_READ << 31U; - cmd |= Argument->IOFunctionNbr << 28U; - cmd |= Argument->Block_Mode << 27U; - cmd |= Argument->OpCode << 26U; - cmd |= (Argument->Reg_Addr & 0x1FFFFU) << 9U; - cmd |= ((nbr_of_block == 0U) ? Size_byte : nbr_of_block) & 0x1FFU; - errorstate = SDMMC_SDIO_CmdReadWriteExtended(hsdio->Instance, cmd); - if (errorstate != HAL_SDIO_ERROR_NONE) - { - hsdio->ErrorCode |= errorstate; - if (errorstate != (SDMMC_ERROR_ADDR_OUT_OF_RANGE | SDMMC_ERROR_ILLEGAL_CMD | SDMMC_ERROR_COM_CRC_FAILED | - SDMMC_ERROR_GENERAL_UNKNOWN_ERR)) - { - MODIFY_REG(hsdio->Instance->DCTRL, SDMMC_DCTRL_FIFORST, SDMMC_DCTRL_FIFORST); - __HAL_SDIO_CLEAR_FLAG(hsdio, SDMMC_STATIC_FLAGS); - __HAL_SDIO_CLEAR_FLAG(hsdio, SDMMC_STATIC_DATA_FLAGS); - hsdio->State = HAL_SDIO_STATE_READY; - hsdio->Context = SDIO_CONTEXT_NONE; - return HAL_ERROR; - } - } - /* Enable interrupt */ - __HAL_SDIO_ENABLE_IT(hsdio, (SDMMC_IT_DCRCFAIL | SDMMC_IT_DTIMEOUT | SDMMC_IT_RXOVERR | SDMMC_IT_DATAEND)); - } - else - { - return HAL_BUSY; - } - - return HAL_OK; -} - -/** - * @brief Write data from a specified address using extended mode through cmd53 in DMA mode. - * @param hsdio: Pointer to SDIO handle - * @param Argument: Pointer to SDIO argument - * @param pData: pointer to the buffer that will contain the data to transmit - * @param Size_byte: Block size to write. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SDIO_WriteExtended_DMA(SDIO_HandleTypeDef *hsdio, const HAL_SDIO_ExtendedCmd_TypeDef *Argument, - uint8_t *pData, uint32_t Size_byte) -{ - uint32_t cmd; - SDMMC_DataInitTypeDef config; - uint32_t errorstate; - uint8_t *p_dma_buffer; - uint32_t nbr_of_block; - - /* Check the parameters */ - assert_param(hsdio != NULL); - assert_param(Argument != NULL); - assert_param(pData != NULL); - - if ((hsdio == NULL) || (Argument == NULL) || (pData == NULL)) - { - return HAL_ERROR; - } - - if (hsdio->State == HAL_SDIO_STATE_READY) - { - hsdio->ErrorCode = HAL_SDIO_ERROR_NONE; - hsdio->State = HAL_SDIO_STATE_BUSY; - - /* Initialize data control register */ - if ((hsdio->Instance->DCTRL & SDMMC_DCTRL_SDIOEN) != 0U) - { - hsdio->Instance->DCTRL = SDMMC_DCTRL_SDIOEN; - } - else - { - hsdio->Instance->DCTRL = 0U; - } - - p_dma_buffer = (uint8_t *)pData; - hsdio->pTxBuffPtr = (uint8_t *)pData; - hsdio->TxXferSize = Size_byte; - hsdio->next_data_addr = (uint32_t)pData; - - nbr_of_block = (Size_byte & ~(hsdio->block_size & 1U)) >> __CLZ(__RBIT(hsdio->block_size)); - - if (nbr_of_block != 0U) - { - hsdio->remaining_data = (Size_byte - (hsdio->block_size * nbr_of_block)); - if (hsdio->block_size <= 128U) - { - hsdio->next_reg_addr = (Argument->Reg_Addr) | - ((((nbr_of_block * hsdio->block_size) >> 1U) & 0x3FFFU) << 1U) | - ((hsdio->remaining_data <= HAL_SDIO_DATA_BLOCK_SIZE_512BYTE) ? 1U : 0U); - } - else - { - hsdio->next_reg_addr = (nbr_of_block * hsdio->block_size) >> 1U; - } - hsdio->next_data_addr += (nbr_of_block * hsdio->block_size); - } - else - { - hsdio->remaining_data = (Size_byte >= HAL_SDIO_DATA_BLOCK_SIZE_512BYTE) ? - (Size_byte - HAL_SDIO_DATA_BLOCK_SIZE_512BYTE) : - (Size_byte - hsdio->remaining_data); - if (hsdio->remaining_data != 0U) - { - hsdio->remaining_data = (Size_byte >= HAL_SDIO_DATA_BLOCK_SIZE_512BYTE) ? - (Size_byte - HAL_SDIO_DATA_BLOCK_SIZE_512BYTE) : - (Size_byte - hsdio->remaining_data); - hsdio->next_reg_addr += ((Size_byte >= HAL_SDIO_DATA_BLOCK_SIZE_512BYTE) ? \ - (HAL_SDIO_DATA_BLOCK_SIZE_512BYTE >> 1U) : (Size_byte >> 1U)) | - (((hsdio->remaining_data > 0U) ? 0U : 1U)); - } - hsdio->next_data_addr += (Size_byte < HAL_SDIO_DATA_BLOCK_SIZE_512BYTE) ? Size_byte : - HAL_SDIO_DATA_BLOCK_SIZE_512BYTE; - } - - /* DMA configuration (use single buffer) */ - hsdio->Instance->IDMACTRL = SDMMC_ENABLE_IDMA_SINGLE_BUFF; - hsdio->Instance->IDMABASER = (uint32_t)p_dma_buffer; - - /* Configure the SDIO DPSM (Data Path State Machine) */ - config.DataTimeOut = SDMMC_DATATIMEOUT; - if (Argument->Block_Mode == HAL_SDIO_MODE_BLOCK) - { - config.DataLength = (uint32_t)(nbr_of_block * hsdio->block_size); - config.DataBlockSize = SDIO_Convert_Block_Size(hsdio, hsdio->block_size); - } - else - { - config.DataLength = (Size_byte > HAL_SDIO_DATA_BLOCK_SIZE_512BYTE) ? HAL_SDIO_DATA_BLOCK_SIZE_512BYTE : Size_byte; - config.DataBlockSize = SDMMC_DATABLOCK_SIZE_1B; - } - - config.TransferDir = SDMMC_TRANSFER_DIR_TO_CARD; - config.TransferMode = (Argument->Block_Mode == HAL_SDIO_MODE_BLOCK) ? SDMMC_TRANSFER_MODE_BLOCK - : SDMMC_TRANSFER_MODE_SDIO; - config.DPSM = SDMMC_DPSM_DISABLE; - (void)SDMMC_ConfigData(hsdio->Instance, &config); - - __SDMMC_CMDTRANS_ENABLE(hsdio->Instance); - - /* Write */ - hsdio->Context = (uint32_t)((Argument->Block_Mode == HAL_SDIO_MODE_BLOCK) ? - SDIO_CONTEXT_WRITE_MULTIPLE_BLOCK : - SDIO_CONTEXT_WRITE_SINGLE_BLOCK) | SDIO_CONTEXT_DMA; - cmd = SDIO_WRITE << 31U; - cmd |= Argument->IOFunctionNbr << 28U; - cmd |= Argument->Block_Mode << 27U; - cmd |= Argument->OpCode << 26U; - cmd |= (Argument->Reg_Addr & 0x1FFFFU) << 9U; - cmd |= ((nbr_of_block == 0U) ? ((Size_byte > HAL_SDIO_DATA_BLOCK_SIZE_512BYTE) ? - HAL_SDIO_DATA_BLOCK_SIZE_512BYTE : Size_byte) : nbr_of_block) & 0x1FFU; - errorstate = SDMMC_SDIO_CmdReadWriteExtended(hsdio->Instance, cmd); - if (errorstate != HAL_SDIO_ERROR_NONE) - { - hsdio->ErrorCode |= errorstate; - if (errorstate != (SDMMC_ERROR_ADDR_OUT_OF_RANGE | SDMMC_ERROR_ILLEGAL_CMD | SDMMC_ERROR_COM_CRC_FAILED | - SDMMC_ERROR_GENERAL_UNKNOWN_ERR)) - { - MODIFY_REG(hsdio->Instance->DCTRL, SDMMC_DCTRL_FIFORST, SDMMC_DCTRL_FIFORST); - __HAL_SDIO_CLEAR_FLAG(hsdio, SDMMC_STATIC_FLAGS); - __HAL_SDIO_CLEAR_FLAG(hsdio, SDMMC_STATIC_DATA_FLAGS); - hsdio->State = HAL_SDIO_STATE_READY; - hsdio->Context = SDIO_CONTEXT_NONE; - return HAL_ERROR; - } - } - /* Enable interrupt */ - __HAL_SDIO_ENABLE_IT(hsdio, (SDMMC_IT_DCRCFAIL | SDMMC_IT_DTIMEOUT | SDMMC_IT_TXUNDERR | SDMMC_IT_DATAEND)); - } - else - { - return HAL_BUSY; - } - - return HAL_OK; -} - -/** - * @} - */ - -/** @addtogroup SDIO_Exported_Functions_Group4 - * @brief - * -@verbatim - ============================================================================== - ##### IO operation functions ##### - ============================================================================== - [..] - This subsection provides a set callback functions allowing to manage the data transfer from/to SDIO card. - -@endverbatim - * @{ - */ -/** - * @brief This function handles SDIO device interrupt request. - * @param hsdio: Pointer to SDIO handle - * @retval None - */ -void HAL_SDIO_IRQHandler(SDIO_HandleTypeDef *hsdio) -{ - HAL_SDIO_ExtendedCmd_TypeDef CMD53_desc; - HAL_StatusTypeDef errorstate; - uint32_t ctx = hsdio->Context; - uint32_t flags; - - flags = READ_REG(((SDMMC_TypeDef *)((uint32_t)(hsdio)->Instance))->STA); - - if (READ_BIT(flags, SDMMC_FLAG_SDIOIT) != 0U) - { - (void)SDIO_IOFunction_IRQHandler(hsdio); - } - - if (READ_BIT(flags, SDMMC_FLAG_DATAEND) != 0U) - { - __HAL_SDIO_CLEAR_FLAG(hsdio, SDMMC_FLAG_DATAEND); - - hsdio->State = HAL_SDIO_STATE_READY; - - __HAL_SDIO_DISABLE_IT(hsdio, SDMMC_IT_DATAEND | SDMMC_IT_DCRCFAIL | SDMMC_IT_DTIMEOUT | SDMMC_IT_TXUNDERR | - SDMMC_IT_RXOVERR | SDMMC_IT_TXFIFOHE | SDMMC_IT_RXFIFOHF); - - __HAL_SDIO_DISABLE_IT(hsdio, SDMMC_IT_IDMABTC); - __SDMMC_CMDTRANS_DISABLE(hsdio->Instance); - - if ((ctx & SDIO_CONTEXT_DMA) != 0U) - { - hsdio->Instance->DLEN = 0; - hsdio->Instance->IDMACTRL = SDMMC_DISABLE_IDMA; - if ((hsdio->Instance->DCTRL & SDMMC_DCTRL_SDIOEN) != 0U) - { - hsdio->Instance->DCTRL = SDMMC_DCTRL_SDIOEN; - } - else - { - hsdio->Instance->DCTRL = 0U; - } - - hsdio->Context = SDIO_CONTEXT_NONE; - } - - if (hsdio->remaining_data != 0U) - { - CMD53_desc.Block_Mode = HAL_SDIO_MODE_BYTE; - CMD53_desc.Reg_Addr = hsdio->next_reg_addr; - CMD53_desc.IOFunctionNbr = 1; - CMD53_desc.OpCode = 1; - if (((ctx & SDIO_CONTEXT_READ_SINGLE_BLOCK) != 0U) || ((ctx & SDIO_CONTEXT_READ_MULTIPLE_BLOCK) != 0U)) - { - hsdio->pRxBuffPtr = (uint8_t *)hsdio->next_data_addr; - errorstate = HAL_SDIO_ReadExtended_DMA(hsdio, &CMD53_desc, hsdio->pRxBuffPtr, hsdio->remaining_data); - } - else - { - hsdio->pTxBuffPtr = (uint8_t *)hsdio->next_data_addr; - errorstate = HAL_SDIO_WriteExtended_DMA(hsdio, &CMD53_desc, hsdio->pTxBuffPtr, hsdio->remaining_data); - } - if (errorstate != HAL_OK) - { -#if defined (USE_HAL_SDIO_REGISTER_CALLBACKS) && (USE_HAL_SDIO_REGISTER_CALLBACKS == 1) - hsdio->ErrorCallback(hsdio); -#else - HAL_SDIO_ErrorCallback(hsdio); -#endif /* USE_HAL_SDIO_REGISTER_CALLBACKS */ - } - } - else if (((ctx & SDIO_CONTEXT_READ_SINGLE_BLOCK) != 0U) || ((ctx & SDIO_CONTEXT_READ_MULTIPLE_BLOCK) != 0U)) - { -#if defined (USE_HAL_SDIO_REGISTER_CALLBACKS) && (USE_HAL_SDIO_REGISTER_CALLBACKS == 1U) - hsdio->RxCpltCallback(hsdio); -#else - HAL_SDIO_RxCpltCallback(hsdio); -#endif /* USE_HAL_SDIO_REGISTER_CALLBACKS */ - } - else - { -#if defined (USE_HAL_SDIO_REGISTER_CALLBACKS) && (USE_HAL_SDIO_REGISTER_CALLBACKS == 1U) - hsdio->TxCpltCallback(hsdio); -#else - HAL_SDIO_TxCpltCallback(hsdio); -#endif /* USE_HAL_SDIO_REGISTER_CALLBACKS */ - } - } - - if (__HAL_SDIO_GET_FLAG(hsdio, SDMMC_FLAG_DCRCFAIL | SDMMC_FLAG_DTIMEOUT | SDMMC_FLAG_RXOVERR | SDMMC_FLAG_TXUNDERR)) - { -#if defined (USE_HAL_SDIO_REGISTER_CALLBACKS) && (USE_HAL_SDIO_REGISTER_CALLBACKS == 1) - hsdio->ErrorCallback(hsdio); -#else - HAL_SDIO_ErrorCallback(hsdio); -#endif /* USE_HAL_SDIO_REGISTER_CALLBACKS */ - } -} - -/** - * @brief Tx Transfer completed callbacks - * @param hsdio: Pointer to SDIO handle - * @retval None - */ -__weak void HAL_SDIO_TxCpltCallback(SDIO_HandleTypeDef *hsdio) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hsdio); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_SDIO_TxCpltCallback can be implemented in the user file - */ -} - -/** - * @brief Rx Transfer completed callbacks - * @param hsdio: Pointer SDIO handle - * @retval None - */ -__weak void HAL_SDIO_RxCpltCallback(SDIO_HandleTypeDef *hsdio) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hsdio); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_SDIO_RxCpltCallback can be implemented in the user file - */ -} - -/** - * @brief SDIO error callbacks - * @param hsdio: Pointer SDIO handle - * @retval None - */ -__weak void HAL_SDIO_ErrorCallback(SDIO_HandleTypeDef *hsdio) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hsdio); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_SDIO_ErrorCallback can be implemented in the user file - */ -} - -/** - * @brief SDIO IO Function complete callback - * @param hsdio: Pointer SDIO handle - * @param func: SDIO IO Function - * @retval None - */ -__weak void HAL_SDIO_IOFunctionCallback(SDIO_HandleTypeDef *hsdio, uint32_t func) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hsdio); - UNUSED(func); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_SDIO_ErrorCallback can be implemented in the user file - */ -} - -#if (USE_SDIO_TRANSCEIVER != 0U) -/** - * @brief Enable/Disable the SDIO Transceiver 1.8V Mode Callback. - * @param hsdio: Pointer SDIO handle - * @param status: Voltage Switch State - * @retval None - */ -__weak void HAL_SDIO_DriveTransceiver_1_8V_Callback(SDIO_HandleTypeDef *hsdio, FlagStatus status) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hsdio); - UNUSED(status); - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_SDIO_EnableTransceiver could be implemented in the user file - */ -} -#endif /* USE_SDIO_TRANSCEIVER */ - -#if defined (USE_HAL_SDIO_REGISTER_CALLBACKS) && (USE_HAL_SDIO_REGISTER_CALLBACKS == 1U) -/** - * @brief Register a User SDIO Callback - * To be used instead of the weak (overridden) predefined callback - * @param hsdio : SDIO handle - * @param CallbackID : ID of the callback to be registered - * This parameter can be one of the following values: - * @arg @ref HAL_SDIO_TX_CPLT_CB_ID SDIO Tx Complete Callback ID - * @arg @ref HAL_SDIO_RX_CPLT_CB_ID SDIO Rx Complete Callback ID - * @arg @ref HAL_SDIO_ERROR_CB_ID SDIO Error Callback ID - * @arg @ref HAL_SDIO_MSP_INIT_CB_ID SDIO MspInit Callback ID - * @arg @ref HAL_SDIO_MSP_DEINIT_CB_ID SDIO MspDeInit Callback ID - * @param pCallback : pointer to the Callback function - * @retval status - */ -HAL_StatusTypeDef HAL_SDIO_RegisterCallback(SDIO_HandleTypeDef *hsdio, HAL_SDIO_CallbackIDTypeDef CallbackID, - pSDIO_CallbackTypeDef pCallback) -{ - HAL_StatusTypeDef status = HAL_OK; - - /* Check the parameters */ - assert_param(hsdio != NULL); - assert_param(pCallback != NULL); - - if (pCallback == NULL) - { - /* Update the error code */ - hsdio->ErrorCode |= HAL_SDIO_ERROR_INVALID_CALLBACK; - return HAL_ERROR; - } - - if (hsdio->State == HAL_SDIO_STATE_READY) - { - switch (CallbackID) - { - case HAL_SDIO_TX_CPLT_CB_ID : - hsdio->TxCpltCallback = pCallback; - break; - case HAL_SDIO_RX_CPLT_CB_ID : - hsdio->RxCpltCallback = pCallback; - break; - case HAL_SDIO_ERROR_CB_ID : - hsdio->ErrorCallback = pCallback; - break; - case HAL_SDIO_MSP_INIT_CB_ID : - hsdio->MspInitCallback = pCallback; - break; - case HAL_SDIO_MSP_DEINIT_CB_ID : - hsdio->MspDeInitCallback = pCallback; - break; - default : - /* Update the error code */ - hsdio->ErrorCode |= HAL_SDIO_ERROR_INVALID_CALLBACK; - /* update return status */ - status = HAL_ERROR; - break; - } - } - else if (hsdio->State == HAL_SDIO_STATE_RESET) - { - switch (CallbackID) - { - case HAL_SDIO_MSP_INIT_CB_ID : - hsdio->MspInitCallback = pCallback; - break; - case HAL_SDIO_MSP_DEINIT_CB_ID : - hsdio->MspDeInitCallback = pCallback; - break; - default : - /* Update the error code */ - hsdio->ErrorCode |= HAL_SDIO_ERROR_INVALID_CALLBACK; - /* update return status */ - status = HAL_ERROR; - break; - } - } - else - { - /* Update the error code */ - hsdio->ErrorCode |= HAL_SDIO_ERROR_INVALID_CALLBACK; - /* update return status */ - status = HAL_ERROR; - } - - return status; -} - -/** - * @brief Unregister a User SDIO Callback - * SDIO Callback is redirected to the weak (overridden) predefined callback. - * @note The HAL_SDIO_UnRegisterCallback() may be called before HAL_SDIO_Init() in - * HAL_SDIO_STATE_RESET to register callbacks for HAL_SDIO_MSP_INIT_CB_ID - * and HAL_SDIO_MSP_DEINIT_CB_ID. - * @param hsdio : SDIO handle - * @param CallbackID : ID of the callback to be unregistered - * This parameter can be one of the following values @ref SDIO_Exported_Types_Group3. - * @retval status - */ -HAL_StatusTypeDef HAL_SDIO_UnRegisterCallback(SDIO_HandleTypeDef *hsdio, HAL_SDIO_CallbackIDTypeDef CallbackID) -{ - HAL_StatusTypeDef status = HAL_OK; - - assert_param(hsdio != NULL); - - /* Check the SDIO peripheral handle parameter */ - if (hsdio == NULL) - { - return HAL_ERROR; - } - - if (hsdio->State == HAL_SDIO_STATE_READY) - { - switch (CallbackID) - { - case HAL_SDIO_TX_CPLT_CB_ID : - hsdio->TxCpltCallback = HAL_SDIO_TxCpltCallback; - break; - case HAL_SDIO_RX_CPLT_CB_ID : - hsdio->RxCpltCallback = HAL_SDIO_RxCpltCallback; - break; - case HAL_SDIO_ERROR_CB_ID : - hsdio->ErrorCallback = HAL_SDIO_ErrorCallback; - break; - case HAL_SDIO_MSP_INIT_CB_ID : - hsdio->MspInitCallback = HAL_SDIO_MspInit; - break; - case HAL_SDIO_MSP_DEINIT_CB_ID : - hsdio->MspDeInitCallback = HAL_SDIO_MspDeInit; - break; - default : - hsdio->ErrorCode |= HAL_SDIO_ERROR_INVALID_CALLBACK; - status = HAL_ERROR; - break; - } - } - else if (hsdio->State == HAL_SDIO_STATE_RESET) - { - switch (CallbackID) - { - case HAL_SDIO_MSP_INIT_CB_ID : - hsdio->MspInitCallback = HAL_SDIO_MspInit; - break; - case HAL_SDIO_MSP_DEINIT_CB_ID : - hsdio->MspDeInitCallback = HAL_SDIO_MspDeInit; - break; - default : - hsdio->ErrorCode |= HAL_SDIO_ERROR_INVALID_CALLBACK; - status = HAL_ERROR; - break; - } - } - else - { - hsdio->ErrorCode |= HAL_SDIO_ERROR_INVALID_CALLBACK; - status = HAL_ERROR; - } - - return status; -} -#endif /* USE_HAL_SDIO_REGISTER_CALLBACKS */ - -#if (USE_SDIO_TRANSCEIVER != 0U) -/** - * @brief Register a User SDIO Transceiver Callback - * To be used instead of the weak (overridden) predefined callback - * @param hsdio : SDIO handle - * @param pCallback : pointer to the Callback function - * @retval status - */ -HAL_StatusTypeDef HAL_SDIO_RegisterTransceiverCallback(SDIO_HandleTypeDef *hsdio, - pSDIO_TransceiverCallbackTypeDef pCallback) -{ - HAL_StatusTypeDef status = HAL_OK; - - if (pCallback == NULL) - { - /* Update the error code */ - hsdio->ErrorCode |= HAL_SDIO_ERROR_INVALID_CALLBACK; - return HAL_ERROR; - } - - if (hsdio->State == HAL_SDIO_STATE_READY) - { - hsdio->DriveTransceiver_1_8V_Callback = pCallback; - } - else - { - /* Update the error code */ - hsdio->ErrorCode |= HAL_SDIO_ERROR_INVALID_CALLBACK; - /* update return status */ - status = HAL_ERROR; - } - - return status; -} - -/** - * @brief Unregister a User SDIO Transceiver Callback - * SDIO Callback is redirected to the weak (overridden) predefined callback - * @param hsdio : SDIO handle - * @retval status - */ -HAL_StatusTypeDef HAL_SDIO_UnRegisterTransceiverCallback(SDIO_HandleTypeDef *hsdio) -{ - HAL_StatusTypeDef status = HAL_OK; - - if (hsdio->State == HAL_SDIO_STATE_READY) - { - hsdio->DriveTransceiver_1_8V_Callback = HAL_SDIO_DriveTransceiver_1_8V_Callback; - } - else - { - /* Update the error code */ - hsdio->ErrorCode |= HAL_SDIO_ERROR_INVALID_CALLBACK; - /* update return status */ - status = HAL_ERROR; - } - - return status; -} -#endif /* USE_SDIO_TRANSCEIVER */ - -/** - * @brief Register a User SDIO Identification Callback - * @param hsdio: Pointer to SDIO handle - * @param pCallback: pointer to the Callback function - * @retval status - */ -HAL_StatusTypeDef HAL_SDIO_RegisterIdentifyCardCallback(SDIO_HandleTypeDef *hsdio, - pSDIO_IdentifyCardCallbackTypeDef pCallback) -{ - /* Check the parameters */ - assert_param(hsdio != NULL); - assert_param(pCallback != NULL); - - if (pCallback == NULL) - { - /* Update the error code */ - hsdio->ErrorCode |= HAL_SDIO_ERROR_INVALID_CALLBACK; - return HAL_ERROR; - } - - hsdio->SDIO_IdentifyCard = pCallback; - - return HAL_OK; -} -/** - * @} - */ - -/** @addtogroup SDIO_Exported_Functions_Group5 - * @brief - * -@verbatim - ============================================================================== - ##### Peripheral State and Errors functions ##### - ============================================================================== - [..] - This subsection provides a set of functions allowing to control the SDIO card operations. - -@endverbatim - * @{ - */ -/** - * @brief return the SDIO state - * @param hsdio: Pointer to SDIO handle - * @retval HAL state - */ -HAL_SDIO_StateTypeDef HAL_SDIO_GetState(const SDIO_HandleTypeDef *hsdio) -{ - return hsdio->State; -} - -/** - * @brief Return the SDIO error code - * @param hsdio : Pointer to a SDIO_HandleTypeDef structure that contains the configuration information. - * @retval SDIO Error Code - */ -uint32_t HAL_SDIO_GetError(const SDIO_HandleTypeDef *hsdio) -{ - return hsdio->ErrorCode; -} - -/** - * @} - */ - -/** @addtogroup SDIO_Exported_Functions_Group6 - * @brief - * -@verbatim - ============================================================================== - ##### Peripheral IO interrupt ##### - ============================================================================== - [..] - This subsection provides a set functions allowing to enable/disable IO functions interrupt features - on the SDIO card. - -@endverbatim - * @{ - */ -/** - * @brief Enable SDIO IO interrupt. - * @param hsdio: Pointer to SDIO handle - * @param IOFunction: Specifies the SDIO IO function. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SDIO_EnableIOFunctionInterrupt(SDIO_HandleTypeDef *hsdio, uint32_t IOFunction) -{ - uint8_t intEn = 0U; - - /* Check the parameters */ - assert_param(hsdio != NULL); - assert_param(IS_SDIO_FUNCTION(IOFunction)); - - /* Check the SDIO peripheral handle parameter */ - if (hsdio == NULL) - { - return HAL_ERROR; - } - - if (SDIO_ReadDirect(hsdio, SDMMC_SDIO_CCCR4, HAL_SDIO_WRITE_ONLY, SDIO_FUNCTION_0, &intEn) != HAL_OK) - { - return HAL_ERROR; - } - - /* if already enable , do not need enable again */ - if ((((intEn >> (uint32_t)IOFunction) & 0x01U) == 0x01U) && ((intEn & 0x01U) != 0U)) - { - return HAL_OK; - } - else - { - intEn |= (1U << (uint32_t)IOFunction) | 0x01U; - hsdio->IOInterruptNbr++; - } - - if (SDIO_WriteDirect(hsdio, SDMMC_SDIO_CCCR4, HAL_SDIO_WRITE_ONLY, SDIO_FUNCTION_0, - &intEn) != HAL_OK) - { - return HAL_ERROR; - } - - __HAL_SDIO_ENABLE_IT(hsdio, SDMMC_IT_SDIOIT); - - /* Enable host SDIO interrupt operations */ - __SDMMC_OPERATION_ENABLE(hsdio->Instance); - - return HAL_OK; -} - -/** - * @brief Enable SDIO IO interrupt. - * @param hsdio: Pointer to SDIO handle - * @param IOFunction: Specifies the SDIO IO function. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SDIO_DisableIOFunctionInterrupt(SDIO_HandleTypeDef *hsdio, uint32_t IOFunction) -{ - uint8_t intEn = 0U; - - /* Check the parameters */ - assert_param(hsdio != NULL); - assert_param(IS_SDIO_FUNCTION(IOFunction)); - - /* Check the SDIO peripheral handle parameter */ - if (hsdio == NULL) - { - return HAL_ERROR; - } - - if (SDIO_ReadDirect(hsdio, SDMMC_SDIO_CCCR4, HAL_SDIO_WRITE_ONLY, SDIO_FUNCTION_0, &intEn) != HAL_OK) - { - return HAL_ERROR; - } - - /* if already disable , do not need enable again */ - if (((intEn >> (uint32_t)IOFunction) & 0x01U) == 0x00U) - { - return HAL_OK; - } - else - { - /* disable the interrupt, don't disable the interrupt master here */ - intEn &= ~(1U << (uint32_t)IOFunction); - } - - if (SDIO_WriteDirect(hsdio, SDMMC_SDIO_CCCR4, HAL_SDIO_READ_AFTER_WRITE, SDIO_FUNCTION_0, - &intEn) != HAL_OK) - { - return HAL_ERROR; - } - - if (hsdio->IOInterruptNbr > 1U) - { - hsdio->IOInterruptNbr--; - } - else - { - hsdio->IOInterruptNbr = 0U; - __HAL_SDIO_DISABLE_IT(hsdio, SDMMC_IT_SDIOIT); - } - return HAL_OK; -} - -/** - * @brief Enable SDIO IO Enable. - * @param hsdio: Pointer to SDIO handle - * @param IOFunction: Specifies the SDIO IO function. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SDIO_EnableIOFunction(SDIO_HandleTypeDef *hsdio, uint32_t IOFunction) -{ - uint8_t ioEn = 0U; - uint8_t ioReady = 0U; - - /* Check the parameters */ - assert_param(hsdio != NULL); - assert_param(IS_SDIO_FUNCTION(IOFunction)); - - /* Check the SDIO peripheral handle parameter */ - if (hsdio == NULL) - { - return HAL_ERROR; - } - - if (SDIO_ReadDirect(hsdio, SDMMC_SDIO_CCCR0_SD_BYTE2, HAL_SDIO_WRITE_ONLY, SDIO_FUNCTION_0, &ioEn) != HAL_OK) - { - return HAL_ERROR; - } - - /* if already enable , do not need to enable again */ - if (((ioEn >> (uint32_t)IOFunction) & 0x01U) == 0x01U) - { - return HAL_OK; - } - else - { - ioEn |= (1U << (uint32_t)IOFunction); - } - - if (SDIO_WriteDirect(hsdio, SDMMC_SDIO_CCCR0_SD_BYTE2, HAL_SDIO_READ_AFTER_WRITE, SDIO_FUNCTION_0, &ioEn) != HAL_OK) - { - return HAL_ERROR; - } - - if (SDIO_ReadDirect(hsdio, SDMMC_SDIO_CCCR0_SD_BYTE3, HAL_SDIO_WRITE_ONLY, SDIO_FUNCTION_0, &ioReady) != HAL_OK) - { - return HAL_ERROR; - } - /* check if IO ready */ - if ((ioReady & (1U << (uint32_t)IOFunction)) != 0U) - { - return HAL_OK; - } - - return HAL_ERROR; -} - -/** - * @brief Disable SDIO IO Enable. - * @param hsdio: Pointer to SDIO handle - * @param IOFunction: Specifies the SDIO IO function. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SDIO_DisableIOFunction(SDIO_HandleTypeDef *hsdio, uint32_t IOFunction) -{ - uint8_t ioEn = 0U; - - /* Check the parameters */ - assert_param(hsdio != NULL); - assert_param(IS_SDIO_FUNCTION(IOFunction)); - - /* Check the SDIO peripheral handle parameter */ - if (hsdio == NULL) - { - return HAL_ERROR; - } - - if (SDIO_ReadDirect(hsdio, SDMMC_SDIO_CCCR0_SD_BYTE2, HAL_SDIO_WRITE_ONLY, SDIO_FUNCTION_0, &ioEn) != HAL_OK) - { - return HAL_ERROR; - } - - /* if already enable , do not need enable again */ - if (((ioEn >> (uint32_t)IOFunction) & 0x01U) == 0x00U) - { - return HAL_OK; - } - else - { - ioEn &= ~(1U << (uint32_t)IOFunction); - } - - if (SDIO_WriteDirect(hsdio, SDMMC_SDIO_CCCR0_SD_BYTE2, HAL_SDIO_READ_AFTER_WRITE, SDIO_FUNCTION_0, &ioEn) != HAL_OK) - { - return HAL_ERROR; - } - - return HAL_OK; -} - -/** - * @brief Select SDIO IO Enable. - * @param hsdio: Pointer to SDIO handle - * @param IOFunction: Specifies the SDIO IO function. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SDIO_SelectIOFunction(SDIO_HandleTypeDef *hsdio, uint32_t IOFunction) -{ - /* Check the parameters */ - assert_param(hsdio != NULL); - assert_param(IS_SDIO_FUNCTION(IOFunction)); - - /* Check the SDIO peripheral handle parameter */ - if (hsdio == NULL) - { - return HAL_ERROR; - } - - if (SDIO_WriteDirect(hsdio, SDMMC_SDIO_CCCR12_SD_BYTE1, HAL_SDIO_READ_AFTER_WRITE, SDIO_FUNCTION_0, - (uint8_t *)&IOFunction) != HAL_OK) - { - return HAL_ERROR; - } - - return HAL_OK; -} - -/** - * @brief Abort IO transfer. - * @param hsdio: Pointer to SDIO handle - * @param IOFunction IO number - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SDIO_AbortIOFunction(SDIO_HandleTypeDef *hsdio, uint32_t IOFunction) -{ - /* Check the parameters */ - assert_param(hsdio != NULL); - assert_param(IS_SDIO_FUNCTION(IOFunction)); - - /* Check the SDIO peripheral handle parameter */ - if (hsdio == NULL) - { - return HAL_ERROR; - } - - if (SDIO_WriteDirect(hsdio, SDMMC_SDIO_CCCR4_SD_BYTE2, HAL_SDIO_READ_AFTER_WRITE, SDIO_FUNCTION_0, - (uint8_t *)&IOFunction) != HAL_OK) - { - return HAL_ERROR; - } - - return HAL_OK; -} - -/** - * @brief Enable Assynchrone interrupt. - * @param hsdio: Pointer to SDIO handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SDIO_EnableIOAsynInterrupt(SDIO_HandleTypeDef *hsdio) -{ - uint8_t enable_asyn_it = 0U; - - /* Check the parameters */ - assert_param(hsdio != NULL); - - /* Check the SDIO peripheral handle parameter */ - if (hsdio == NULL) - { - return HAL_ERROR; - } - - if (SDIO_ReadDirect(hsdio, SDMMC_SDIO_CCCR20_SD_BYTE2, HAL_SDIO_WRITE_ONLY, SDIO_FUNCTION_0, &enable_asyn_it) - != HAL_OK) - { - return HAL_ERROR; - } - - /* if already enable , do not need enable again */ - if ((enable_asyn_it & 0x02U) == 0x02U) - { - return HAL_OK; - } - else - { - enable_asyn_it |= 0x02U; - } - - if (SDIO_WriteDirect(hsdio, SDMMC_SDIO_CCCR20_SD_BYTE2, HAL_SDIO_READ_AFTER_WRITE, SDIO_FUNCTION_0, - &enable_asyn_it) != HAL_OK) - { - return HAL_ERROR; - } - - return HAL_OK; -} - -/** - * @brief Disable Assynchrone interrupt. - * @param hsdio: Pointer to SDIO handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SDIO_DisableIOAsynInterrupt(SDIO_HandleTypeDef *hsdio) -{ - uint8_t enable_asyn_it = 0U; - - /* Check the parameters */ - assert_param(hsdio != NULL); - - /* Check the SDIO peripheral handle parameter */ - if (hsdio == NULL) - { - return HAL_ERROR; - } - - if (SDIO_ReadDirect(hsdio, SDMMC_SDIO_CCCR20_SD_BYTE2, HAL_SDIO_WRITE_ONLY, SDIO_FUNCTION_0, &enable_asyn_it) - != HAL_OK) - { - return HAL_ERROR; - } - - /* if already disable , do not need disable again */ - if ((enable_asyn_it & 0x02U) == 0x00U) - { - return HAL_OK; - } - else - { - enable_asyn_it &= (uint8_t) ~(0x02U); - } - - if (SDIO_WriteDirect(hsdio, SDMMC_SDIO_CCCR20_SD_BYTE2, HAL_SDIO_READ_AFTER_WRITE, SDIO_FUNCTION_0, - &enable_asyn_it) != HAL_OK) - { - return HAL_ERROR; - } - - return HAL_OK; -} - -/** - * @brief sdio set io IRQ handler. - * @param hsdio Pointer to SDIO handle - * @param IOFunction IO function io number. - * @param Callback io IRQ handler. - */ -HAL_StatusTypeDef HAL_SDIO_RegisterIOFunctionCallback(SDIO_HandleTypeDef *hsdio, uint32_t IOFunction, - HAL_SDIO_IOFunction_CallbackTypeDef pCallback) -{ - /* Check the parameters */ - assert_param(hsdio != NULL); - assert_param(IS_SDIO_FUNCTION(IOFunction)); - - /* Check the SDIO peripheral handle parameter */ - if (hsdio == NULL) - { - return HAL_ERROR; - } - - hsdio->SDIO_IOFunction_Callback[(uint32_t)IOFunction] = pCallback; - hsdio->IOFunctionMask |= (1U << (uint8_t)IOFunction); - - return HAL_OK; -} -/** - * @} - */ - -/** - * @} - */ - -/* Private function --------------------------------------------------------------------------------------------------*/ -/** @addtogroup SDIO_Private_Functions - * @{ - */ -/** - * @brief Initializes the SDIO device. - * @param hsdio: Pointer to the SDIO handle - * @retval HAL status - */ -static HAL_StatusTypeDef SDIO_InitCard(SDIO_HandleTypeDef *hsdio) -{ - uint32_t errorstate; - uint32_t timeout = 0U; - uint16_t sdio_rca = 1U; - uint32_t Resp4 = 0U; - uint32_t nbr_of_func; - - /* Identify card operating voltage */ - errorstate = SDMMC_CmdGoIdleState(hsdio->Instance); - if (errorstate != HAL_SDIO_ERROR_NONE) - { - return HAL_ERROR; - } - - /* Check the power State */ - if (SDMMC_GetPowerState(hsdio->Instance) == 0U) - { - return HAL_ERROR; - } - - /* Send CMD5 */ - errorstate = SDMMC_CmdSendOperationcondition(hsdio->Instance, 0U, &Resp4); - if (errorstate != HAL_SDIO_ERROR_NONE) - { - return HAL_ERROR; - } - - nbr_of_func = ((Resp4 & 0x70000000U) >> 28U); - /* Check if Nbr of function > 0 and OCR valid */ - if (nbr_of_func > 0U) - { - /* Send CMD5 with arg= S18R, WV*/ - if (SDMMC_CmdSendOperationcondition(hsdio->Instance, (SDIO_OCR_VDD_32_33 | SDIO_OCR_SDIO_S18R), &Resp4) - != HAL_SDIO_ERROR_NONE) - { - return HAL_ERROR; - } - /* Check if IORDY = 1 and S18A = 1 */ - if ((((Resp4 & 0x80000000U) >> 31U) != 0U) && (((Resp4 & 0x1000000U) >> 24U) != 0U)) - { - /* Send CMD11 to switch 1.8V mode */ - errorstate = SDMMC_CmdVoltageSwitch(hsdio->Instance); - if (errorstate != HAL_SDIO_ERROR_NONE) - { - return HAL_ERROR; - } - } - else - { - /* S18A is not supported */ - } - } - - /** Cmd3 is sent while response is SDMMC_ERROR_ILLEGAL_CMD, due to the partial init test done before - * (sending cmd0 after the sequence cmd0/cmd3 is sent is considered illegal). - */ - do - { - errorstate = SDMMC_CmdSetRelAdd(hsdio->Instance, &sdio_rca); - timeout++; - HAL_Delay(1); - } while ((errorstate == SDMMC_ERROR_ILLEGAL_CMD) && (timeout != SDIO_TIMEOUT)); - - if ((timeout == SDIO_TIMEOUT) || (errorstate != HAL_SDIO_ERROR_NONE)) - { - return HAL_ERROR; - } - - /* Select the Card ( Sending CMD7)*/ - errorstate = SDMMC_CmdSelDesel(hsdio->Instance, (uint32_t)(((uint32_t)sdio_rca) << 16U)); - if (errorstate != HAL_SDIO_ERROR_NONE) - { - return HAL_ERROR; - } - - return HAL_OK; -} - -/** - * @brief Read 1 byte data. - * @param hsdio: Pointer to SDIO handle - * @param cmd_arg: formatted CMD52 structure - * @param pData: pointer to write or read data - * @retval HAL status - */ -static HAL_StatusTypeDef SDIO_ReadDirect(SDIO_HandleTypeDef *hsdio, uint32_t addr, uint32_t raw, - uint32_t function_nbr, uint8_t *pData) -{ - uint32_t errorstate; - uint32_t cmd; - - cmd = SDIO_READ << 31U; - cmd |= function_nbr << 28U; - cmd |= raw << 27U; - cmd |= (addr & 0x1FFFFU) << 9U; - errorstate = SDMMC_SDIO_CmdReadWriteDirect(hsdio->Instance, cmd, pData); - if (errorstate != HAL_SDIO_ERROR_NONE) - { - hsdio->ErrorCode |= errorstate; - /* Clear all the static flags */ - __HAL_SDIO_CLEAR_FLAG(hsdio, SDMMC_STATIC_FLAGS); - hsdio->State = HAL_SDIO_STATE_READY; - hsdio->Context = SDIO_CONTEXT_NONE; - return HAL_ERROR; - } - __SDMMC_CMDTRANS_DISABLE(hsdio->Instance); - - /* Clear all the static flags */ - __HAL_SDIO_CLEAR_FLAG(hsdio, SDMMC_STATIC_DATA_FLAGS); - - return HAL_OK; -} - -/** - * @brief Write 1 byte data. - * @param hsdio: Pointer to SDIO handle - * @param cmd_arg: formatted CMD52 structure - * @param pData: pointer to write or read data - * @retval HAL status - */ -static HAL_StatusTypeDef SDIO_WriteDirect(SDIO_HandleTypeDef *hsdio, uint32_t addr, uint32_t raw, - uint32_t function_nbr, const uint8_t *pData) -{ - uint32_t errorstate; - uint32_t cmd; - uint8_t response; - - cmd = SDIO_WRITE << 31U; - cmd |= function_nbr << 28U; - cmd |= raw << 27U; - cmd |= (addr & 0x1FFFFU) << 9U; - cmd |= ((uint32_t) * pData & 0x000000FFU); - errorstate = SDMMC_SDIO_CmdReadWriteDirect(hsdio->Instance, cmd, &response); - - if (errorstate != HAL_SDIO_ERROR_NONE) - { - hsdio->ErrorCode |= errorstate; - /* Clear all the static flags */ - __HAL_SDIO_CLEAR_FLAG(hsdio, SDMMC_STATIC_FLAGS); - hsdio->State = HAL_SDIO_STATE_READY; - hsdio->Context = SDIO_CONTEXT_NONE; - return HAL_ERROR; - } - __SDMMC_CMDTRANS_DISABLE(hsdio->Instance); - - /* Clear all the static flags */ - __HAL_SDIO_CLEAR_FLAG(hsdio, SDMMC_STATIC_DATA_FLAGS); - - return HAL_OK; -} - -/** - * @brief Write multiple data with a single command. - * @param hsdio: Pointer to SDIO handle - * @param cmd_arg: formatted cmd53 structure - * @param Size_byte: block size if CMD53 defined in HAL_SDIO_MODE_BLOCK - * @param pData: pointer to write or read data - * @retval HAL status - */ -static HAL_StatusTypeDef SDIO_WriteExtended(SDIO_HandleTypeDef *hsdio, const HAL_SDIO_ExtendedCmd_TypeDef *cmd_arg, - uint8_t *pData, uint16_t Size_byte) -{ - SDMMC_DataInitTypeDef config; - uint32_t errorstate; - uint32_t tickstart = HAL_GetTick(); - uint32_t regCount; - uint8_t byteCount; - uint32_t data; - uint32_t dataremaining; - uint32_t *u32tempbuff = (uint32_t *)(uint32_t)pData; - SDMMC_TypeDef *SDMMCx; - uint32_t cmd; - uint32_t nbr_of_block; - - hsdio->ErrorCode = HAL_SDIO_ERROR_NONE; - - /* Compute how many blocks are to be send for pData of length data_size to be send */ - nbr_of_block = (((uint32_t)Size_byte & ~((uint32_t)hsdio->block_size & 1U))) >> __CLZ(__RBIT(hsdio->block_size)); - - /* Initialize data control register */ - if ((hsdio->Instance->DCTRL & SDMMC_DCTRL_SDIOEN) != 0U) - { - hsdio->Instance->DCTRL = SDMMC_DCTRL_SDIOEN; - } - else - { - hsdio->Instance->DCTRL = 0U; - } - - /* Configure the SDIO DPSM (Data Path State Machine) */ - config.DataTimeOut = SDMMC_DATATIMEOUT; - if (cmd_arg->Block_Mode == HAL_SDIO_MODE_BLOCK) - { - config.DataLength = (uint32_t)(nbr_of_block * hsdio->block_size); - config.DataBlockSize = SDIO_Convert_Block_Size(hsdio, hsdio->block_size); - } - else - { - config.DataLength = Size_byte; - config.DataBlockSize = SDMMC_DATABLOCK_SIZE_1B; - } - - config.TransferDir = SDMMC_TRANSFER_DIR_TO_CARD; - config.TransferMode = (cmd_arg->Block_Mode == HAL_SDIO_MODE_BLOCK) ? SDMMC_TRANSFER_MODE_BLOCK : - SDMMC_TRANSFER_MODE_SDIO; - config.DPSM = SDMMC_DPSM_DISABLE; - (void)SDMMC_ConfigData(hsdio->Instance, &config); - __SDMMC_CMDTRANS_ENABLE(hsdio->Instance); - - hsdio->Context = (cmd_arg->Block_Mode == HAL_SDIO_MODE_BLOCK) ? SDIO_CONTEXT_WRITE_MULTIPLE_BLOCK : - SDIO_CONTEXT_WRITE_SINGLE_BLOCK; - cmd = SDIO_WRITE << 31U; - cmd |= cmd_arg->IOFunctionNbr << 28U; - cmd |= cmd_arg->Block_Mode << 27U; - cmd |= cmd_arg->OpCode << 26U; - cmd |= (cmd_arg->Reg_Addr & 0x1FFFFU) << 9U; - cmd |= (((uint32_t)Size_byte) & 0x1FFU); - errorstate = SDMMC_SDIO_CmdReadWriteExtended(hsdio->Instance, cmd); - if (errorstate != HAL_SDIO_ERROR_NONE) - { - MODIFY_REG(hsdio->Instance->DCTRL, SDMMC_DCTRL_FIFORST, SDMMC_DCTRL_FIFORST); - __HAL_SDIO_CLEAR_FLAG(hsdio, SDMMC_STATIC_FLAGS); - __HAL_SDIO_CLEAR_FLAG(hsdio, SDMMC_STATIC_DATA_FLAGS); - hsdio->ErrorCode |= errorstate; - hsdio->State = HAL_SDIO_STATE_READY; - hsdio->Context = SDIO_CONTEXT_NONE; - return HAL_ERROR; - } - - SDMMCx = hsdio->Instance; - dataremaining = config.DataLength; - while (!__HAL_SDIO_GET_FLAG(hsdio, SDMMC_FLAG_TXUNDERR | SDMMC_FLAG_DCRCFAIL | SDMMC_FLAG_DTIMEOUT | - SDMMC_FLAG_DATAEND)) - { - if (__HAL_SDIO_GET_FLAG(hsdio, SDMMC_FLAG_TXFIFOHE) && - (dataremaining >= SDMMC_FIFO_SIZE)) - { - for (regCount = SDMMC_FIFO_SIZE / 4U; regCount > 0U; regCount--) - { - SDMMCx->FIFO = *u32tempbuff; - u32tempbuff++; - } - dataremaining -= SDMMC_FIFO_SIZE; - } - else if ((__HAL_SDIO_GET_FLAG(hsdio, SDMMC_FLAG_TXFIFOHE | SDMMC_FLAG_TXFIFOE)) && - (dataremaining < SDMMC_FIFO_SIZE)) - { - const uint8_t *u8buff = (uint8_t *)u32tempbuff; - while (dataremaining > 0U) - { - data = 0U; - for (byteCount = 0U; (byteCount < 4U) && (dataremaining > 0U); byteCount++) - { - data |= ((uint32_t)(*u8buff) << (byteCount << 3U)); - u8buff++; - dataremaining--; - } - SDMMCx->FIFO = data; - } - } - if ((HAL_GetTick() - tickstart) >= SDMMC_DATATIMEOUT) - { - __HAL_SDIO_CLEAR_FLAG(hsdio, SDMMC_STATIC_FLAGS); - hsdio->ErrorCode |= HAL_SDIO_ERROR_TIMEOUT; - hsdio->State = HAL_SDIO_STATE_READY; - hsdio->Context = SDIO_CONTEXT_NONE; - return HAL_TIMEOUT; - } - } - - __SDMMC_CMDTRANS_DISABLE(hsdio->Instance); - if (__HAL_SDIO_GET_FLAG(hsdio, SDMMC_FLAG_DTIMEOUT)) - { - __HAL_SDIO_CLEAR_FLAG(hsdio, SDMMC_STATIC_FLAGS); - hsdio->ErrorCode |= HAL_SDIO_ERROR_DATA_TIMEOUT; - hsdio->State = HAL_SDIO_STATE_READY; - hsdio->Context = SDIO_CONTEXT_NONE; - return HAL_ERROR; - } - else if (__HAL_SDIO_GET_FLAG(hsdio, SDMMC_FLAG_DCRCFAIL)) - { - __HAL_SDIO_CLEAR_FLAG(hsdio, SDMMC_STATIC_FLAGS); - hsdio->ErrorCode |= HAL_SDIO_ERROR_DATA_CRC_FAIL; - hsdio->State = HAL_SDIO_STATE_READY; - hsdio->Context = SDIO_CONTEXT_NONE; - return HAL_ERROR; - } - else if (__HAL_SDIO_GET_FLAG(hsdio, SDMMC_FLAG_TXUNDERR)) - { - __HAL_SDIO_CLEAR_FLAG(hsdio, SDMMC_STATIC_FLAGS); - hsdio->ErrorCode |= HAL_SDIO_ERROR_TX_UNDERRUN; - hsdio->State = HAL_SDIO_STATE_READY; - hsdio->Context = SDIO_CONTEXT_NONE; - return HAL_ERROR; - } - else if (hsdio->ErrorCode == SDMMC_ERROR_INVALID_PARAMETER) - { - __HAL_SDIO_CLEAR_FLAG(hsdio, SDMMC_STATIC_DATA_FLAGS); - hsdio->State = HAL_SDIO_STATE_READY; - hsdio->Context = SDIO_CONTEXT_NONE; - return HAL_ERROR; - } - else - { - /* Nothing to do */ - } - - __HAL_SDIO_CLEAR_FLAG(hsdio, SDMMC_STATIC_DATA_FLAGS); - - return HAL_OK; -} - -/** - * @brief Allows to convert a block size in the according SDMMC value for configuring the SDMMC when doing a CMD53 - * @param hsdio: Pointer to the SDIO handle. - * @param block_size: block size in bytes - * @retval block size as DBLOCKSIZE[3:0] bits format - */ -static uint8_t SDIO_Convert_Block_Size(const SDIO_HandleTypeDef *hsdio, uint32_t block_size) -{ - UNUSED(hsdio); - - uint8_t most_bit = (uint8_t)__CLZ(__RBIT(block_size)); - /*(1 << most_bit) - 1) is the mask used for blocksize*/ - if (((uint8_t)block_size & ((1U << most_bit) - 1U)) != 0U) - { - return (uint8_t)SDMMC_DATABLOCK_SIZE_4B; - } - return most_bit << SDMMC_DCTRL_DBLOCKSIZE_Pos; -} - -/*! - * @brief SDIO card io pending interrupt handle function. - * @note This function is used to handle the pending io interrupt. - * To register a IO IRQ handler, Use HAL_SDIO_EnableIOInterrupt and HAL_SDIO_SetIOIRQHandler - * @param hsdio: Pointer to SDIO handle - * @retval HAL status - */ -static HAL_StatusTypeDef SDIO_IOFunction_IRQHandler(SDIO_HandleTypeDef *hsdio) -{ - uint8_t count; - uint8_t pendingInt = 0U; - - if (hsdio->IOInterruptNbr == 1U) - { - if ((hsdio->SDIO_IOFunction_Callback[hsdio->IOFunctionMask - 1U]) != NULL) - { - (hsdio->SDIO_IOFunction_Callback[hsdio->IOFunctionMask - 1U])(hsdio, hsdio->IOFunctionMask - 1U); - } - } - else if ((hsdio->IOInterruptNbr > 1U) && (hsdio->IOFunctionMask != 0U)) - { - /* Get pending int firstly */ - if (SDIO_ReadDirect(hsdio, SDMMC_SDIO_CCCR4_SD_BYTE1, HAL_SDIO_WRITE_ONLY, SDIO_FUNCTION_0, &pendingInt) != - HAL_OK) - { - return HAL_ERROR; - } - - if ((pendingInt != 0U) && (hsdio->IOFunctionMask != 0U)) - { - for (count = 1; count <= SDIO_MAX_IO_NUMBER; count++) - { - if (((pendingInt & (1U << count)) != 0U) && (((1U << count) & hsdio->IOFunctionMask) != 0U)) - { - if ((hsdio->SDIO_IOFunction_Callback[count - 1U]) != NULL) - { - (hsdio->SDIO_IOFunction_Callback[count - 1U])(hsdio, count); - } - } - } - } - } - else - { - /* Nothing to do */ - } - - return HAL_OK; -} -/** - * @} - */ -#endif /* HAL_SDIO_MODULE_ENABLED */ -#endif /* SDMMC1 || SDMMC2 */ -/** - * @} - */ - -/** - * @} - */ Index: trunk/firmware/FSBL/CubeMX/Drivers/STM32N6xx_HAL_Driver/Src/stm32n6xx_ll_sdmmc.c =================================================================== --- trunk/firmware/FSBL/CubeMX/Drivers/STM32N6xx_HAL_Driver/Src/stm32n6xx_ll_sdmmc.c (revision 37) +++ (revision ) @@ -1,2111 +1,0 @@ -/** - ****************************************************************************** - * @file stm32n6xx_ll_sdmmc.c - * @author MCD Application Team - * @brief SDMMC Low Layer HAL module driver. - * - * This file provides firmware functions to manage the following - * functionalities of the SDMMC peripheral: - * + Initialization/de-initialization functions - * + I/O operation functions - * + Peripheral Control functions - * + Peripheral State functions - * - ****************************************************************************** - * @attention - * - * Copyright (c) 2023 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - @verbatim - ============================================================================== - ##### SDMMC peripheral features ##### - ============================================================================== - [..] The SD/SDMMC MMC card host interface (SDMMC) provides an interface between the AHB - peripheral bus and MultiMedia cards (MMCs), SD memory cards, SDMMC cards and CE-ATA - devices. - - [..] The SDMMC features include the following: - (+) Full compliance with MultiMediaCard System Specification Version 4.51. Card support - for three different databus modes: 1-bit (default), 4-bit and 8-bit. - (+) Full compatibility with previous versions of MultiMediaCards (backward compatibility). - (+) Full compliance with SD memory card specifications version 4.1. - (SDR104 SDMMC_CK speed limited to maximum allowed IO speed, SPI mode and - UHS-II mode not supported). - (+) Full compliance with SDIO card specification version 4.0. Card support - for two different databus modes: 1-bit (default) and 4-bit. - (SDR104 SDMMC_CK speed limited to maximum allowed IO speed, SPI mode and - UHS-II mode not supported). - (+) Data transfer up to 208 Mbyte/s for the 8 bit mode. (depending maximum allowed IO speed). - (+) Data and command output enable signals to control external bidirectional drivers - - ##### How to use this driver ##### - ============================================================================== - [..] - This driver is a considered as a driver of service for external devices drivers - that interfaces with the SDMMC peripheral. - According to the device used (SD card/ MMC card / SDMMC card ...), a set of APIs - is used in the device's driver to perform SDMMC operations and functionalities. - - This driver is almost transparent for the final user, it is only used to implement other - functionalities of the external device. - - [..] - (+) The SDMMC clock is coming from output of PLL1_Q or PLL2_R. - Before start working with SDMMC peripheral make sure that the PLL is well configured. - The SDMMC peripheral uses two clock signals: - (++) PLL1_Q bus clock (default after reset) - (++) PLL2_R bus clock - - (+) Enable/Disable peripheral clock using RCC peripheral macros related to SDMMC - peripheral. - - (+) Enable the Power ON State using the SDMMC_PowerState_ON(SDMMCx) - function and disable it using the function SDMMC_PowerState_OFF(SDMMCx). - - (+) Enable/Disable the peripheral interrupts using the macros __SDMMC_ENABLE_IT(hSDMMC, IT) - and __SDMMC_DISABLE_IT(hSDMMC, IT) if you need to use interrupt mode. - - (+) When using the DMA mode - (++) Configure the IDMA mode (Single buffer or double) - (++) Configure the buffer address - (++) Configure Data Path State Machine - - (+) To control the CPSM (Command Path State Machine) and send - commands to the card use the SDMMC_SendCommand(SDMMCx), - SDMMC_GetCommandResponse() and SDMMC_GetResponse() functions. First, user has - to fill the command structure (pointer to SDMMC_CmdInitTypeDef) according - to the selected command to be sent. - The parameters that should be filled are: - (++) Command Argument - (++) Command Index - (++) Command Response type - (++) Command Wait - (++) CPSM Status (Enable or Disable). - - -@@- To check if the command is well received, read the SDMMC_CMDRESP - register using the SDMMC_GetCommandResponse(). - The SDMMC responses registers (SDMMC_RESP1 to SDMMC_RESP2), use the - SDMMC_GetResponse() function. - - (+) To control the DPSM (Data Path State Machine) and send/receive - data to/from the card use the SDMMC_DataConfig(), SDMMC_GetDataCounter(), - SDMMC_ReadFIFO(), SDMMC_WriteFIFO() and SDMMC_GetFIFOCount() functions. - - *** Read Operations *** - ======================= - [..] - (#) First, user has to fill the data structure (pointer to - SDMMC_DataInitTypeDef) according to the selected data type to be received. - The parameters that should be filled are: - (++) Data TimeOut - (++) Data Length - (++) Data Block size - (++) Data Transfer direction: should be from card (To SDMMC) - (++) Data Transfer mode - (++) DPSM Status (Enable or Disable) - - (#) Configure the SDMMC resources to receive the data from the card - according to selected transfer mode (Refer to Step 8, 9 and 10). - - (#) Send the selected Read command (refer to step 11). - - (#) Use the SDMMC flags/interrupts to check the transfer status. - - *** Write Operations *** - ======================== - [..] - (#) First, user has to fill the data structure (pointer to - SDMMC_DataInitTypeDef) according to the selected data type to be received. - The parameters that should be filled are: - (++) Data TimeOut - (++) Data Length - (++) Data Block size - (++) Data Transfer direction: should be to card (To CARD) - (++) Data Transfer mode - (++) DPSM Status (Enable or Disable) - - (#) Configure the SDMMC resources to send the data to the card according to - selected transfer mode. - - (#) Send the selected Write command. - - (#) Use the SDMMC flags/interrupts to check the transfer status. - - *** Command management operations *** - ===================================== - [..] - (#) The commands used for Read/Write/Erase operations are managed in - separate functions. - Each function allows to send the needed command with the related argument, - then check the response. - By the same approach, you could implement a command and check the response. - - @endverbatim - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32n6xx_hal.h" - -/** @addtogroup STM32N6xx_HAL_Driver - * @{ - */ - -/** @defgroup SDMMC_LL SDMMC Low Layer - * @brief Low layer module for SD - * @{ - */ - -#if defined (SDMMC1) || defined (SDMMC2) -#if defined (HAL_SD_MODULE_ENABLED) || defined (HAL_MMC_MODULE_ENABLED) || defined (HAL_SDIO_MODULE_ENABLED) - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -static uint32_t SDMMC_GetCmdError(SDMMC_TypeDef *SDMMCx); - -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup SDMMC_LL_Exported_Functions SDMMC Low Layer Exported Functions - * @{ - */ - -/** @defgroup HAL_SDMMC_LL_Group1 Initialization de-initialization functions - * @brief Initialization and Configuration functions - * -@verbatim - =============================================================================== - ##### Initialization/de-initialization functions ##### - =============================================================================== - [..] This section provides functions allowing to: - -@endverbatim - * @{ - */ - -/** - * @brief Initializes the SDMMC according to the specified - * parameters in the SDMMC_InitTypeDef and create the associated handle. - * @param SDMMCx: Pointer to SDMMC register base - * @param Init: SDMMC initialization structure - * @retval HAL status - */ -HAL_StatusTypeDef SDMMC_Init(SDMMC_TypeDef *SDMMCx, SDMMC_InitTypeDef Init) -{ - uint32_t tmpreg = 0; - - /* Check the parameters */ - assert_param(IS_SDMMC_ALL_INSTANCE(SDMMCx)); - assert_param(IS_SDMMC_CLOCK_EDGE(Init.ClockEdge)); - assert_param(IS_SDMMC_CLOCK_POWER_SAVE(Init.ClockPowerSave)); - assert_param(IS_SDMMC_BUS_WIDE(Init.BusWide)); - assert_param(IS_SDMMC_HARDWARE_FLOW_CONTROL(Init.HardwareFlowControl)); - assert_param(IS_SDMMC_CLKDIV(Init.ClockDiv)); - - /* Set SDMMC configuration parameters */ - tmpreg |= (Init.ClockEdge | \ - Init.ClockPowerSave | \ - Init.BusWide | \ - Init.HardwareFlowControl | \ - Init.ClockDiv - ); - - /* Write to SDMMC CLKCR */ - MODIFY_REG(SDMMCx->CLKCR, CLKCR_CLEAR_MASK, tmpreg); - - return HAL_OK; -} - - -/** - * @} - */ - -/** @defgroup HAL_SDMMC_LL_Group2 IO operation functions - * @brief Data transfers functions - * -@verbatim - =============================================================================== - ##### I/O operation functions ##### - =============================================================================== - [..] - This subsection provides a set of functions allowing to manage the SDMMC data - transfers. - -@endverbatim - * @{ - */ - -/** - * @brief Read data (word) from Rx FIFO in blocking mode (polling) - * @param SDMMCx: Pointer to SDMMC register base - * @retval HAL status - */ -uint32_t SDMMC_ReadFIFO(const SDMMC_TypeDef *SDMMCx) -{ - /* Read data from Rx FIFO */ - return (SDMMCx->FIFO); -} - -/** - * @brief Write data (word) to Tx FIFO in blocking mode (polling) - * @param SDMMCx: Pointer to SDMMC register base - * @param pWriteData: pointer to data to write - * @retval HAL status - */ -HAL_StatusTypeDef SDMMC_WriteFIFO(SDMMC_TypeDef *SDMMCx, uint32_t *pWriteData) -{ - /* Write data to FIFO */ - SDMMCx->FIFO = *pWriteData; - - return HAL_OK; -} - -/** - * @} - */ - -/** @defgroup HAL_SDMMC_LL_Group3 Peripheral Control functions - * @brief management functions - * -@verbatim - =============================================================================== - ##### Peripheral Control functions ##### - =============================================================================== - [..] - This subsection provides a set of functions allowing to control the SDMMC data - transfers. - -@endverbatim - * @{ - */ - -/** - * @brief Set SDMMC Power state to ON. - * @param SDMMCx: Pointer to SDMMC register base - * @retval HAL status - */ -HAL_StatusTypeDef SDMMC_PowerState_ON(SDMMC_TypeDef *SDMMCx) -{ - /* Set power state to ON */ - SDMMCx->POWER |= SDMMC_POWER_PWRCTRL; - - return HAL_OK; -} - -/** - * @brief Set SDMMC Power state to Power-Cycle. - * @param SDMMCx: Pointer to SDMMC register base - * @retval HAL status - */ -HAL_StatusTypeDef SDMMC_PowerState_Cycle(SDMMC_TypeDef *SDMMCx) -{ - /* Set power state to Power Cycle*/ - SDMMCx->POWER |= SDMMC_POWER_PWRCTRL_1; - - return HAL_OK; -} - -/** - * @brief Set SDMMC Power state to OFF. - * @param SDMMCx: Pointer to SDMMC register base - * @retval HAL status - */ -HAL_StatusTypeDef SDMMC_PowerState_OFF(SDMMC_TypeDef *SDMMCx) -{ - /* Set power state to OFF */ - SDMMCx->POWER &= ~(SDMMC_POWER_PWRCTRL); - - return HAL_OK; -} - -/** - * @brief Get SDMMC Power state. - * @param SDMMCx: Pointer to SDMMC register base - * @retval Power status of the controller. The returned value can be one of the - * following values: - * - 0x00: Power OFF - * - 0x02: Power UP - * - 0x03: Power ON - */ -uint32_t SDMMC_GetPowerState(const SDMMC_TypeDef *SDMMCx) -{ - return (SDMMCx->POWER & SDMMC_POWER_PWRCTRL); -} - -/** - * @brief Configure the SDMMC command path according to the specified parameters in - * SDMMC_CmdInitTypeDef structure and send the command - * @param SDMMCx: Pointer to SDMMC register base - * @param Command: pointer to a SDMMC_CmdInitTypeDef structure that contains - * the configuration information for the SDMMC command - * @retval HAL status - */ -HAL_StatusTypeDef SDMMC_SendCommand(SDMMC_TypeDef *SDMMCx, const SDMMC_CmdInitTypeDef *Command) -{ - uint32_t tmpreg = 0; - - /* Check the parameters */ - assert_param(IS_SDMMC_CMD_INDEX(Command->CmdIndex)); - assert_param(IS_SDMMC_RESPONSE(Command->Response)); - assert_param(IS_SDMMC_WAIT(Command->WaitForInterrupt)); - assert_param(IS_SDMMC_CPSM(Command->CPSM)); - - /* Set the SDMMC Argument value */ - SDMMCx->ARG = Command->Argument; - - /* Set SDMMC command parameters */ - tmpreg |= (uint32_t)(Command->CmdIndex | \ - Command->Response | \ - Command->WaitForInterrupt | \ - Command->CPSM); - - /* Write to SDMMC CMD register */ - MODIFY_REG(SDMMCx->CMD, CMD_CLEAR_MASK, tmpreg); - - return HAL_OK; -} - -/** - * @brief Return the command index of last command for which response received - * @param SDMMCx: Pointer to SDMMC register base - * @retval Command index of the last command response received - */ -uint8_t SDMMC_GetCommandResponse(const SDMMC_TypeDef *SDMMCx) -{ - return (uint8_t)(SDMMCx->RESPCMD); -} - - -/** - * @brief Return the response received from the card for the last command - * @param SDMMCx: Pointer to SDMMC register base - * @param Response: Specifies the SDMMC response register. - * This parameter can be one of the following values: - * @arg SDMMC_RESP1: Response Register 1 - * @arg SDMMC_RESP2: Response Register 2 - * @arg SDMMC_RESP3: Response Register 3 - * @arg SDMMC_RESP4: Response Register 4 - * @retval The Corresponding response register value - */ -uint32_t SDMMC_GetResponse(const SDMMC_TypeDef *SDMMCx, uint32_t Response) -{ - uint32_t tmp; - - /* Check the parameters */ - assert_param(IS_SDMMC_RESP(Response)); - - /* Get the response */ - tmp = (uint32_t)(&(SDMMCx->RESP1)) + Response; - - return (*(__IO uint32_t *) tmp); -} - -/** - * @brief Configure the SDMMC data path according to the specified - * parameters in the SDMMC_DataInitTypeDef. - * @param SDMMCx: Pointer to SDMMC register base - * @param Data : pointer to a SDMMC_DataInitTypeDef structure - * that contains the configuration information for the SDMMC data. - * @retval HAL status - */ -HAL_StatusTypeDef SDMMC_ConfigData(SDMMC_TypeDef *SDMMCx, const SDMMC_DataInitTypeDef *Data) -{ - uint32_t tmpreg = 0; - - /* Check the parameters */ - assert_param(IS_SDMMC_DATA_LENGTH(Data->DataLength)); - assert_param(IS_SDMMC_BLOCK_SIZE(Data->DataBlockSize)); - assert_param(IS_SDMMC_TRANSFER_DIR(Data->TransferDir)); - assert_param(IS_SDMMC_TRANSFER_MODE(Data->TransferMode)); - assert_param(IS_SDMMC_DPSM(Data->DPSM)); - - /* Set the SDMMC Data TimeOut value */ - SDMMCx->DTIMER = Data->DataTimeOut; - - /* Set the SDMMC DataLength value */ - SDMMCx->DLEN = Data->DataLength; - - /* Set the SDMMC data configuration parameters */ - tmpreg |= (uint32_t)(Data->DataBlockSize | \ - Data->TransferDir | \ - Data->TransferMode | \ - Data->DPSM); - - /* Write to SDMMC DCTRL */ - MODIFY_REG(SDMMCx->DCTRL, DCTRL_CLEAR_MASK, tmpreg); - - return HAL_OK; - -} - -/** - * @brief Returns number of remaining data bytes to be transferred. - * @param SDMMCx: Pointer to SDMMC register base - * @retval Number of remaining data bytes to be transferred - */ -uint32_t SDMMC_GetDataCounter(const SDMMC_TypeDef *SDMMCx) -{ - return (SDMMCx->DCOUNT); -} - -/** - * @brief Get the FIFO data - * @param SDMMCx: Pointer to SDMMC register base - * @retval Data received - */ -uint32_t SDMMC_GetFIFOCount(const SDMMC_TypeDef *SDMMCx) -{ - return (SDMMCx->FIFO); -} - -/** - * @brief Sets one of the two options of inserting read wait interval. - * @param SDMMCx: Pointer to SDMMC register base - * @param SDMMC_ReadWaitMode: SDMMC Read Wait operation mode. - * This parameter can be: - * @arg SDMMC_READ_WAIT_MODE_CLK: Read Wait control by stopping SDMMCCLK - * @arg SDMMC_READ_WAIT_MODE_DATA2: Read Wait control using SDMMC_DATA2 - * @retval None - */ -HAL_StatusTypeDef SDMMC_SetSDMMCReadWaitMode(SDMMC_TypeDef *SDMMCx, uint32_t SDMMC_ReadWaitMode) -{ - /* Check the parameters */ - assert_param(IS_SDMMC_READWAIT_MODE(SDMMC_ReadWaitMode)); - - /* Set SDMMC read wait mode */ - MODIFY_REG(SDMMCx->DCTRL, SDMMC_DCTRL_RWMOD, SDMMC_ReadWaitMode); - - return HAL_OK; -} - -/** - * @} - */ - - -/** @defgroup HAL_SDMMC_LL_Group4 Command management functions - * @brief Data transfers functions - * -@verbatim - =============================================================================== - ##### Commands management functions ##### - =============================================================================== - [..] - This subsection provides a set of functions allowing to manage the needed commands. - -@endverbatim - * @{ - */ - -/** - * @brief Send the Data Block Length command and check the response - * @param SDMMCx: Pointer to SDMMC register base - * @retval HAL status - */ -uint32_t SDMMC_CmdBlockLength(SDMMC_TypeDef *SDMMCx, uint32_t BlockSize) -{ - SDMMC_CmdInitTypeDef sdmmc_cmdinit; - uint32_t errorstate; - - /* Set Block Size for Card */ - sdmmc_cmdinit.Argument = (uint32_t)BlockSize; - sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SET_BLOCKLEN; - sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT; - sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO; - sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE; - (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit); - - /* Check for error conditions */ - errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_SET_BLOCKLEN, SDMMC_CMDTIMEOUT); - - return errorstate; -} - -/** - * @brief Send the Data Block number command and check the response - * @param SDMMCx: Pointer to SDMMC register base - * @retval HAL status - */ -uint32_t SDMMC_CmdBlockCount(SDMMC_TypeDef *SDMMCx, uint32_t BlockCount) -{ - SDMMC_CmdInitTypeDef sdmmc_cmdinit; - uint32_t errorstate; - - /* Set Block Size for Card */ - sdmmc_cmdinit.Argument = (uint32_t)BlockCount; - sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SET_BLOCK_COUNT; - sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT; - sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO; - sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE; - (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit); - - /* Check for error conditions */ - errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_SET_BLOCK_COUNT, SDMMC_CMDTIMEOUT); - - return errorstate; -} - -/** - * @brief Send the Read Single Block command and check the response - * @param SDMMCx: Pointer to SDMMC register base - * @retval HAL status - */ -uint32_t SDMMC_CmdReadSingleBlock(SDMMC_TypeDef *SDMMCx, uint32_t ReadAdd) -{ - SDMMC_CmdInitTypeDef sdmmc_cmdinit; - uint32_t errorstate; - - /* Set Block Size for Card */ - sdmmc_cmdinit.Argument = (uint32_t)ReadAdd; - sdmmc_cmdinit.CmdIndex = SDMMC_CMD_READ_SINGLE_BLOCK; - sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT; - sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO; - sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE; - (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit); - - /* Check for error conditions */ - errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_READ_SINGLE_BLOCK, SDMMC_CMDTIMEOUT); - - return errorstate; -} - -/** - * @brief Send the Read Multi Block command and check the response - * @param SDMMCx: Pointer to SDMMC register base - * @retval HAL status - */ -uint32_t SDMMC_CmdReadMultiBlock(SDMMC_TypeDef *SDMMCx, uint32_t ReadAdd) -{ - SDMMC_CmdInitTypeDef sdmmc_cmdinit; - uint32_t errorstate; - - /* Set Block Size for Card */ - sdmmc_cmdinit.Argument = (uint32_t)ReadAdd; - sdmmc_cmdinit.CmdIndex = SDMMC_CMD_READ_MULT_BLOCK; - sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT; - sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO; - sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE; - (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit); - - /* Check for error conditions */ - errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_READ_MULT_BLOCK, SDMMC_CMDTIMEOUT); - - return errorstate; -} - -/** - * @brief Send the Write Single Block command and check the response - * @param SDMMCx: Pointer to SDMMC register base - * @retval HAL status - */ -uint32_t SDMMC_CmdWriteSingleBlock(SDMMC_TypeDef *SDMMCx, uint32_t WriteAdd) -{ - SDMMC_CmdInitTypeDef sdmmc_cmdinit; - uint32_t errorstate; - - /* Set Block Size for Card */ - sdmmc_cmdinit.Argument = (uint32_t)WriteAdd; - sdmmc_cmdinit.CmdIndex = SDMMC_CMD_WRITE_SINGLE_BLOCK; - sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT; - sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO; - sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE; - (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit); - - /* Check for error conditions */ - errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_WRITE_SINGLE_BLOCK, SDMMC_CMDTIMEOUT); - - return errorstate; -} - -/** - * @brief Send the Write Multi Block command and check the response - * @param SDMMCx: Pointer to SDMMC register base - * @retval HAL status - */ -uint32_t SDMMC_CmdWriteMultiBlock(SDMMC_TypeDef *SDMMCx, uint32_t WriteAdd) -{ - SDMMC_CmdInitTypeDef sdmmc_cmdinit; - uint32_t errorstate; - - /* Set Block Size for Card */ - sdmmc_cmdinit.Argument = (uint32_t)WriteAdd; - sdmmc_cmdinit.CmdIndex = SDMMC_CMD_WRITE_MULT_BLOCK; - sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT; - sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO; - sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE; - (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit); - - /* Check for error conditions */ - errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_WRITE_MULT_BLOCK, SDMMC_CMDTIMEOUT); - - return errorstate; -} - -/** - * @brief Send the Start Address Erase command for SD and check the response - * @param SDMMCx: Pointer to SDMMC register base - * @retval HAL status - */ -uint32_t SDMMC_CmdSDEraseStartAdd(SDMMC_TypeDef *SDMMCx, uint32_t StartAdd) -{ - SDMMC_CmdInitTypeDef sdmmc_cmdinit; - uint32_t errorstate; - - /* Set Block Size for Card */ - sdmmc_cmdinit.Argument = (uint32_t)StartAdd; - sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_ERASE_GRP_START; - sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT; - sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO; - sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE; - (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit); - - /* Check for error conditions */ - errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_SD_ERASE_GRP_START, SDMMC_CMDTIMEOUT); - - return errorstate; -} - -/** - * @brief Send the End Address Erase command for SD and check the response - * @param SDMMCx: Pointer to SDMMC register base - * @retval HAL status - */ -uint32_t SDMMC_CmdSDEraseEndAdd(SDMMC_TypeDef *SDMMCx, uint32_t EndAdd) -{ - SDMMC_CmdInitTypeDef sdmmc_cmdinit; - uint32_t errorstate; - - /* Set Block Size for Card */ - sdmmc_cmdinit.Argument = (uint32_t)EndAdd; - sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_ERASE_GRP_END; - sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT; - sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO; - sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE; - (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit); - - /* Check for error conditions */ - errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_SD_ERASE_GRP_END, SDMMC_CMDTIMEOUT); - - return errorstate; -} - -/** - * @brief Send the Start Address Erase command and check the response - * @param SDMMCx: Pointer to SDMMC register base - * @retval HAL status - */ -uint32_t SDMMC_CmdEraseStartAdd(SDMMC_TypeDef *SDMMCx, uint32_t StartAdd) -{ - SDMMC_CmdInitTypeDef sdmmc_cmdinit; - uint32_t errorstate; - - /* Set Block Size for Card */ - sdmmc_cmdinit.Argument = (uint32_t)StartAdd; - sdmmc_cmdinit.CmdIndex = SDMMC_CMD_ERASE_GRP_START; - sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT; - sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO; - sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE; - (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit); - - /* Check for error conditions */ - errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_ERASE_GRP_START, SDMMC_CMDTIMEOUT); - - return errorstate; -} - -/** - * @brief Send the End Address Erase command and check the response - * @param SDMMCx: Pointer to SDMMC register base - * @retval HAL status - */ -uint32_t SDMMC_CmdEraseEndAdd(SDMMC_TypeDef *SDMMCx, uint32_t EndAdd) -{ - SDMMC_CmdInitTypeDef sdmmc_cmdinit; - uint32_t errorstate; - - /* Set Block Size for Card */ - sdmmc_cmdinit.Argument = (uint32_t)EndAdd; - sdmmc_cmdinit.CmdIndex = SDMMC_CMD_ERASE_GRP_END; - sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT; - sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO; - sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE; - (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit); - - /* Check for error conditions */ - errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_ERASE_GRP_END, SDMMC_CMDTIMEOUT); - - return errorstate; -} - -/** - * @brief Send the Erase command and check the response - * @param SDMMCx Pointer to SDMMC register base - * @param EraseType Type of erase to be performed - * @retval HAL status - */ -uint32_t SDMMC_CmdErase(SDMMC_TypeDef *SDMMCx, uint32_t EraseType) -{ - SDMMC_CmdInitTypeDef sdmmc_cmdinit; - uint32_t errorstate; - - /* Set Block Size for Card */ - sdmmc_cmdinit.Argument = EraseType; - sdmmc_cmdinit.CmdIndex = SDMMC_CMD_ERASE; - sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT; - sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO; - sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE; - (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit); - - /* Check for error conditions */ - errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_ERASE, SDMMC_MAXERASETIMEOUT); - - return errorstate; -} - -/** - * @brief Send the Stop Transfer command and check the response. - * @param SDMMCx: Pointer to SDMMC register base - * @retval HAL status - */ -uint32_t SDMMC_CmdStopTransfer(SDMMC_TypeDef *SDMMCx) -{ - SDMMC_CmdInitTypeDef sdmmc_cmdinit; - uint32_t errorstate; - - /* Send CMD12 STOP_TRANSMISSION */ - sdmmc_cmdinit.Argument = 0U; - sdmmc_cmdinit.CmdIndex = SDMMC_CMD_STOP_TRANSMISSION; - sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT; - sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO; - sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE; - - __SDMMC_CMDSTOP_ENABLE(SDMMCx); - __SDMMC_CMDTRANS_DISABLE(SDMMCx); - - (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit); - - /* Check for error conditions */ - errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_STOP_TRANSMISSION, SDMMC_STOPTRANSFERTIMEOUT); - - __SDMMC_CMDSTOP_DISABLE(SDMMCx); - - /* Ignore Address Out Of Range Error, Not relevant at end of memory */ - if (errorstate == SDMMC_ERROR_ADDR_OUT_OF_RANGE) - { - errorstate = SDMMC_ERROR_NONE; - } - - return errorstate; -} - -/** - * @brief Send the Select Deselect command and check the response. - * @param SDMMCx: Pointer to SDMMC register base - * @param addr: Address of the card to be selected - * @retval HAL status - */ -uint32_t SDMMC_CmdSelDesel(SDMMC_TypeDef *SDMMCx, uint32_t Addr) -{ - SDMMC_CmdInitTypeDef sdmmc_cmdinit; - uint32_t errorstate; - - /* Send CMD7 SDMMC_SEL_DESEL_CARD */ - sdmmc_cmdinit.Argument = (uint32_t)Addr; - sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEL_DESEL_CARD; - sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT; - sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO; - sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE; - (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit); - - /* Check for error conditions */ - errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_SEL_DESEL_CARD, SDMMC_CMDTIMEOUT); - - return errorstate; -} - -/** - * @brief Send the Go Idle State command and check the response. - * @param SDMMCx: Pointer to SDMMC register base - * @retval HAL status - */ -uint32_t SDMMC_CmdGoIdleState(SDMMC_TypeDef *SDMMCx) -{ - SDMMC_CmdInitTypeDef sdmmc_cmdinit; - uint32_t errorstate; - - sdmmc_cmdinit.Argument = 0U; - sdmmc_cmdinit.CmdIndex = SDMMC_CMD_GO_IDLE_STATE; - sdmmc_cmdinit.Response = SDMMC_RESPONSE_NO; - sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO; - sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE; - (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit); - - /* Check for error conditions */ - errorstate = SDMMC_GetCmdError(SDMMCx); - - return errorstate; -} - -/** - * @brief Send the Operating Condition command and check the response. - * @param SDMMCx: Pointer to SDMMC register base - * @retval HAL status - */ -uint32_t SDMMC_CmdOperCond(SDMMC_TypeDef *SDMMCx) -{ - SDMMC_CmdInitTypeDef sdmmc_cmdinit; - uint32_t errorstate; - - /* Send CMD8 to verify SD card interface operating condition */ - /* Argument: - [31:12]: Reserved (shall be set to '0') - - [11:8]: Supply Voltage (VHS) 0x1 (Range: 2.7-3.6 V) - - [7:0]: Check Pattern (recommended 0xAA) */ - /* CMD Response: R7 */ - sdmmc_cmdinit.Argument = SDMMC_CHECK_PATTERN; - sdmmc_cmdinit.CmdIndex = SDMMC_CMD_HS_SEND_EXT_CSD; - sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT; - sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO; - sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE; - (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit); - - /* Check for error conditions */ - errorstate = SDMMC_GetCmdResp7(SDMMCx); - - return errorstate; -} - -/** - * @brief Send the Application command to verify that that the next command - * is an application specific com-mand rather than a standard command - * and check the response. - * @param SDMMCx: Pointer to SDMMC register base - * @param Argument: Command Argument - * @retval HAL status - */ -uint32_t SDMMC_CmdAppCommand(SDMMC_TypeDef *SDMMCx, uint32_t Argument) -{ - SDMMC_CmdInitTypeDef sdmmc_cmdinit; - uint32_t errorstate; - - sdmmc_cmdinit.Argument = (uint32_t)Argument; - sdmmc_cmdinit.CmdIndex = SDMMC_CMD_APP_CMD; - sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT; - sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO; - sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE; - (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit); - - /* Check for error conditions */ - /* If there is a HAL_ERROR, it is a MMC card, else - it is a SD card: SD card 2.0 (voltage range mismatch) - or SD card 1.x */ - errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_APP_CMD, SDMMC_CMDTIMEOUT); - - return errorstate; -} - -/** - * @brief Send the command asking the accessed card to send its operating - * condition register (OCR) - * @param SDMMCx: Pointer to SDMMC register base - * @param Argument: Command Argument - * @retval HAL status - */ -uint32_t SDMMC_CmdAppOperCommand(SDMMC_TypeDef *SDMMCx, uint32_t Argument) -{ - SDMMC_CmdInitTypeDef sdmmc_cmdinit; - uint32_t errorstate; - - sdmmc_cmdinit.Argument = Argument; - sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_APP_OP_COND; - sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT; - sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO; - sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE; - (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit); - - /* Check for error conditions */ - errorstate = SDMMC_GetCmdResp3(SDMMCx); - - return errorstate; -} - -/** - * @brief Send the Bus Width command and check the response. - * @param SDMMCx: Pointer to SDMMC register base - * @param BusWidth: BusWidth - * @retval HAL status - */ -uint32_t SDMMC_CmdBusWidth(SDMMC_TypeDef *SDMMCx, uint32_t BusWidth) -{ - SDMMC_CmdInitTypeDef sdmmc_cmdinit; - uint32_t errorstate; - - sdmmc_cmdinit.Argument = (uint32_t)BusWidth; - sdmmc_cmdinit.CmdIndex = SDMMC_CMD_APP_SD_SET_BUSWIDTH; - sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT; - sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO; - sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE; - (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit); - - /* Check for error conditions */ - errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_APP_SD_SET_BUSWIDTH, SDMMC_CMDTIMEOUT); - - return errorstate; -} - -/** - * @brief Send the Send SCR command and check the response. - * @param SDMMCx: Pointer to SDMMC register base - * @retval HAL status - */ -uint32_t SDMMC_CmdSendSCR(SDMMC_TypeDef *SDMMCx) -{ - SDMMC_CmdInitTypeDef sdmmc_cmdinit; - uint32_t errorstate; - - /* Send CMD51 SD_APP_SEND_SCR */ - sdmmc_cmdinit.Argument = 0U; - sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_APP_SEND_SCR; - sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT; - sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO; - sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE; - (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit); - - /* Check for error conditions */ - errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_SD_APP_SEND_SCR, SDMMC_CMDTIMEOUT); - - return errorstate; -} - -/** - * @brief Send the Send CID command and check the response. - * @param SDMMCx: Pointer to SDMMC register base - * @retval HAL status - */ -uint32_t SDMMC_CmdSendCID(SDMMC_TypeDef *SDMMCx) -{ - SDMMC_CmdInitTypeDef sdmmc_cmdinit; - uint32_t errorstate; - - /* Send CMD2 ALL_SEND_CID */ - sdmmc_cmdinit.Argument = 0U; - sdmmc_cmdinit.CmdIndex = SDMMC_CMD_ALL_SEND_CID; - sdmmc_cmdinit.Response = SDMMC_RESPONSE_LONG; - sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO; - sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE; - (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit); - - /* Check for error conditions */ - errorstate = SDMMC_GetCmdResp2(SDMMCx); - - return errorstate; -} - -/** - * @brief Send the Send CSD command and check the response. - * @param SDMMCx: Pointer to SDMMC register base - * @param Argument: Command Argument - * @retval HAL status - */ -uint32_t SDMMC_CmdSendCSD(SDMMC_TypeDef *SDMMCx, uint32_t Argument) -{ - SDMMC_CmdInitTypeDef sdmmc_cmdinit; - uint32_t errorstate; - - /* Send CMD9 SEND_CSD */ - sdmmc_cmdinit.Argument = Argument; - sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEND_CSD; - sdmmc_cmdinit.Response = SDMMC_RESPONSE_LONG; - sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO; - sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE; - (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit); - - /* Check for error conditions */ - errorstate = SDMMC_GetCmdResp2(SDMMCx); - - return errorstate; -} - -/** - * @brief Send the Send CSD command and check the response. - * @param SDMMCx: Pointer to SDMMC register base - * @param pRCA: Card RCA - * @retval HAL status - */ -uint32_t SDMMC_CmdSetRelAdd(SDMMC_TypeDef *SDMMCx, uint16_t *pRCA) -{ - SDMMC_CmdInitTypeDef sdmmc_cmdinit; - uint32_t errorstate; - - /* Send CMD3 SD_CMD_SET_REL_ADDR */ - sdmmc_cmdinit.Argument = 0U; - sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SET_REL_ADDR; - sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT; - sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO; - sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE; - (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit); - - /* Check for error conditions */ - errorstate = SDMMC_GetCmdResp6(SDMMCx, SDMMC_CMD_SET_REL_ADDR, pRCA); - - return errorstate; -} - -/** - * @brief Send the Set Relative Address command to MMC card (not SD card). - * @param SDMMCx Pointer to SDMMC register base - * @param RCA Card RCA - * @retval HAL status - */ -uint32_t SDMMC_CmdSetRelAddMmc(SDMMC_TypeDef *SDMMCx, uint16_t RCA) -{ - SDMMC_CmdInitTypeDef sdmmc_cmdinit; - uint32_t errorstate; - - /* Send CMD3 SD_CMD_SET_REL_ADDR */ - sdmmc_cmdinit.Argument = ((uint32_t)RCA << 16U); - sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SET_REL_ADDR; - sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT; - sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO; - sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE; - (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit); - - /* Check for error conditions */ - errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_SET_REL_ADDR, SDMMC_CMDTIMEOUT); - - return errorstate; -} - -/** - * @brief Send the Sleep command to MMC card (not SD card). - * @param SDMMCx Pointer to SDMMC register base - * @param Argument Argument of the command (RCA and Sleep/Awake) - * @retval HAL status - */ -uint32_t SDMMC_CmdSleepMmc(SDMMC_TypeDef *SDMMCx, uint32_t Argument) -{ - SDMMC_CmdInitTypeDef sdmmc_cmdinit; - uint32_t errorstate; - - /* Send CMD5 SDMMC_CMD_MMC_SLEEP_AWAKE */ - sdmmc_cmdinit.Argument = Argument; - sdmmc_cmdinit.CmdIndex = SDMMC_CMD_MMC_SLEEP_AWAKE; - sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT; - sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO; - sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE; - (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit); - - /* Check for error conditions */ - errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_MMC_SLEEP_AWAKE, SDMMC_CMDTIMEOUT); - - return errorstate; -} - -/** - * @brief Send the Status command and check the response. - * @param SDMMCx: Pointer to SDMMC register base - * @param Argument: Command Argument - * @retval HAL status - */ -uint32_t SDMMC_CmdSendStatus(SDMMC_TypeDef *SDMMCx, uint32_t Argument) -{ - SDMMC_CmdInitTypeDef sdmmc_cmdinit; - uint32_t errorstate; - - sdmmc_cmdinit.Argument = Argument; - sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEND_STATUS; - sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT; - sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO; - sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE; - (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit); - - /* Check for error conditions */ - errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_SEND_STATUS, SDMMC_CMDTIMEOUT); - - return errorstate; -} - -/** - * @brief Send the Status register command and check the response. - * @param SDMMCx: Pointer to SDMMC register base - * @retval HAL status - */ -uint32_t SDMMC_CmdStatusRegister(SDMMC_TypeDef *SDMMCx) -{ - SDMMC_CmdInitTypeDef sdmmc_cmdinit; - uint32_t errorstate; - - sdmmc_cmdinit.Argument = 0U; - sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_APP_STATUS; - sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT; - sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO; - sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE; - (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit); - - /* Check for error conditions */ - errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_SD_APP_STATUS, SDMMC_CMDTIMEOUT); - - return errorstate; -} - -/** - * @brief Sends host capacity support information and activates the card's - * initialization process. Send SDMMC_CMD_SEND_OP_COND command - * @param SDMMCx: Pointer to SDMMC register base - * @parame Argument: Argument used for the command - * @retval HAL status - */ -uint32_t SDMMC_CmdOpCondition(SDMMC_TypeDef *SDMMCx, uint32_t Argument) -{ - SDMMC_CmdInitTypeDef sdmmc_cmdinit; - uint32_t errorstate; - - sdmmc_cmdinit.Argument = Argument; - sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEND_OP_COND; - sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT; - sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO; - sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE; - (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit); - - /* Check for error conditions */ - errorstate = SDMMC_GetCmdResp3(SDMMCx); - - return errorstate; -} - -/** - * @brief Checks switchable function and switch card function. SDMMC_CMD_HS_SWITCH command - * @param SDMMCx: Pointer to SDMMC register base - * @parame Argument: Argument used for the command - * @retval HAL status - */ -uint32_t SDMMC_CmdSwitch(SDMMC_TypeDef *SDMMCx, uint32_t Argument) -{ - SDMMC_CmdInitTypeDef sdmmc_cmdinit; - uint32_t errorstate; - - /* Send CMD6 to activate SDR50 Mode and Power Limit 1.44W */ - /* CMD Response: R1 */ - sdmmc_cmdinit.Argument = Argument; /* SDMMC_SDR25_SWITCH_PATTERN*/ - sdmmc_cmdinit.CmdIndex = SDMMC_CMD_HS_SWITCH; - sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT; - sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO; - sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE; - (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit); - - /* Check for error conditions */ - errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_HS_SWITCH, SDMMC_CMDTIMEOUT); - - return errorstate; -} - -/** - * @brief Send the command asking the accessed card to send its operating - * condition register (OCR) - * @param None - * @retval HAL status - */ -uint32_t SDMMC_CmdVoltageSwitch(SDMMC_TypeDef *SDMMCx) -{ - SDMMC_CmdInitTypeDef sdmmc_cmdinit; - uint32_t errorstate; - - sdmmc_cmdinit.Argument = 0x00000000; - sdmmc_cmdinit.CmdIndex = SDMMC_CMD_VOLTAGE_SWITCH; - sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT; - sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO; - sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE; - (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit); - - /* Check for error conditions */ - errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_VOLTAGE_SWITCH, SDMMC_CMDTIMEOUT); - - return errorstate; -} - -/** - * @brief Send the Send EXT_CSD command and check the response. - * @param SDMMCx: Pointer to SDMMC register base - * @param Argument: Command Argument - * @retval HAL status - */ -uint32_t SDMMC_CmdSendEXTCSD(SDMMC_TypeDef *SDMMCx, uint32_t Argument) -{ - SDMMC_CmdInitTypeDef sdmmc_cmdinit; - uint32_t errorstate; - - /* Send CMD9 SEND_CSD */ - sdmmc_cmdinit.Argument = Argument; - sdmmc_cmdinit.CmdIndex = SDMMC_CMD_HS_SEND_EXT_CSD; - sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT; - sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO; - sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE; - (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit); - - /* Check for error conditions */ - errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_HS_SEND_EXT_CSD, SDMMC_CMDTIMEOUT); - - return errorstate; -} - -/** - * @brief Execute a cmd52 to write single byte data and read single byte data if needed - * @param SDMMCx: Pointer to SDMMC register base - * @param Argument: SDMMC command argument which is sent to a card as part of a command message - * @param pData: pointer to read response if needed - * @retval SD Card error state - */ -uint32_t SDMMC_SDIO_CmdReadWriteDirect(SDMMC_TypeDef *SDMMCx, uint32_t Argument, uint8_t *pResponse) -{ - SDMMC_CmdInitTypeDef sdmmc_cmdinit; - uint32_t errorstate; - - sdmmc_cmdinit.Argument = Argument; - sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SDMMC_RW_DIRECT; - sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT; - sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO; - sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE; - (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit); - - /* Check for error conditions */ - errorstate = SDMMC_GetCmdResp5(SDMMCx, SDMMC_CMD_SDMMC_RW_DIRECT, pResponse); - - return errorstate; -} - -/** - * @brief Execute a cmd53 to write or read multiple data with a single command - * @param SDMMCx: Pointer to SDMMC register base - * @param Argument: SDMMC command argument which is sent to a card as part of a command message - * @retval SD Card error state - */ -uint32_t SDMMC_SDIO_CmdReadWriteExtended(SDMMC_TypeDef *SDMMCx, uint32_t Argument) -{ - SDMMC_CmdInitTypeDef sdmmc_cmdinit; - uint32_t errorstate; - - sdmmc_cmdinit.Argument = Argument; - sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SDMMC_RW_EXTENDED; - sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT; - sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO; - sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE; - (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit); - - /* Check for error conditions */ - errorstate = SDMMC_GetCmdResp5(SDMMCx, SDMMC_CMD_SDMMC_RW_EXTENDED, NULL); - - return errorstate; -} - -/** - * @brief Execute a cmd5 to write or read multiple data with a single command - * @param SDMMCx: Pointer to SDMMC register base - * @param Argument: SDMMC command argument which is sent to a card as part of a command message - * @retval SD Card error state - */ -uint32_t SDMMC_CmdSendOperationcondition(SDMMC_TypeDef *SDMMCx, uint32_t Argument, uint32_t *pResp) -{ - SDMMC_CmdInitTypeDef sdmmc_cmdinit; - uint32_t errorstate; - - sdmmc_cmdinit.Argument = Argument; - sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SDMMC_SEN_OP_COND; - sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT; - sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO; - sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE; - (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit); - - /* Check for error conditions */ - errorstate = SDMMC_GetCmdResp4(SDMMCx, pResp); - - return errorstate; -} -/** - * @} - */ - - -/** @defgroup HAL_SDMMC_LL_Group5 Responses management functions - * @brief Responses functions - * -@verbatim - =============================================================================== - ##### Responses management functions ##### - =============================================================================== - [..] - This subsection provides a set of functions allowing to manage the needed responses. - -@endverbatim - * @{ - */ -/** - * @brief Checks for error conditions for R1 response. - * @param hsd: SD handle - * @param SD_CMD: The sent command index - * @retval SD Card error state - */ -uint32_t SDMMC_GetCmdResp1(SDMMC_TypeDef *SDMMCx, uint8_t SD_CMD, uint32_t Timeout) -{ - uint32_t response_r1; - uint32_t sta_reg; - - /* 8 is the number of required instructions cycles for the below loop statement. - The Timeout is expressed in ms */ - uint32_t count = Timeout * (SystemCoreClock / 8U / 1000U); - - do - { - if (count-- == 0U) - { - return SDMMC_ERROR_TIMEOUT; - } - sta_reg = SDMMCx->STA; - } while (((sta_reg & (SDMMC_FLAG_CCRCFAIL | SDMMC_FLAG_CMDREND | SDMMC_FLAG_CTIMEOUT | - SDMMC_FLAG_BUSYD0END)) == 0U) || ((sta_reg & SDMMC_FLAG_CMDACT) != 0U)); - - if (__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CTIMEOUT)) - { - __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_FLAG_CTIMEOUT); - - return SDMMC_ERROR_CMD_RSP_TIMEOUT; - } - else if (__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CCRCFAIL)) - { - __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_FLAG_CCRCFAIL); - - return SDMMC_ERROR_CMD_CRC_FAIL; - } - else - { - /* Nothing to do */ - } - - /* Clear all the static flags */ - __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_STATIC_CMD_FLAGS); - - /* Check response received is of desired command */ - if (SDMMC_GetCommandResponse(SDMMCx) != SD_CMD) - { - return SDMMC_ERROR_CMD_CRC_FAIL; - } - - /* We have received response, retrieve it for analysis */ - response_r1 = SDMMC_GetResponse(SDMMCx, SDMMC_RESP1); - - if ((response_r1 & SDMMC_OCR_ERRORBITS) == SDMMC_ALLZERO) - { - return SDMMC_ERROR_NONE; - } - else if ((response_r1 & SDMMC_OCR_ADDR_OUT_OF_RANGE) == SDMMC_OCR_ADDR_OUT_OF_RANGE) - { - return SDMMC_ERROR_ADDR_OUT_OF_RANGE; - } - else if ((response_r1 & SDMMC_OCR_ADDR_MISALIGNED) == SDMMC_OCR_ADDR_MISALIGNED) - { - return SDMMC_ERROR_ADDR_MISALIGNED; - } - else if ((response_r1 & SDMMC_OCR_BLOCK_LEN_ERR) == SDMMC_OCR_BLOCK_LEN_ERR) - { - return SDMMC_ERROR_BLOCK_LEN_ERR; - } - else if ((response_r1 & SDMMC_OCR_ERASE_SEQ_ERR) == SDMMC_OCR_ERASE_SEQ_ERR) - { - return SDMMC_ERROR_ERASE_SEQ_ERR; - } - else if ((response_r1 & SDMMC_OCR_BAD_ERASE_PARAM) == SDMMC_OCR_BAD_ERASE_PARAM) - { - return SDMMC_ERROR_BAD_ERASE_PARAM; - } - else if ((response_r1 & SDMMC_OCR_WRITE_PROT_VIOLATION) == SDMMC_OCR_WRITE_PROT_VIOLATION) - { - return SDMMC_ERROR_WRITE_PROT_VIOLATION; - } - else if ((response_r1 & SDMMC_OCR_LOCK_UNLOCK_FAILED) == SDMMC_OCR_LOCK_UNLOCK_FAILED) - { - return SDMMC_ERROR_LOCK_UNLOCK_FAILED; - } - else if ((response_r1 & SDMMC_OCR_COM_CRC_FAILED) == SDMMC_OCR_COM_CRC_FAILED) - { - return SDMMC_ERROR_COM_CRC_FAILED; - } - else if ((response_r1 & SDMMC_OCR_ILLEGAL_CMD) == SDMMC_OCR_ILLEGAL_CMD) - { - return SDMMC_ERROR_ILLEGAL_CMD; - } - else if ((response_r1 & SDMMC_OCR_CARD_ECC_FAILED) == SDMMC_OCR_CARD_ECC_FAILED) - { - return SDMMC_ERROR_CARD_ECC_FAILED; - } - else if ((response_r1 & SDMMC_OCR_CC_ERROR) == SDMMC_OCR_CC_ERROR) - { - return SDMMC_ERROR_CC_ERR; - } - else if ((response_r1 & SDMMC_OCR_STREAM_READ_UNDERRUN) == SDMMC_OCR_STREAM_READ_UNDERRUN) - { - return SDMMC_ERROR_STREAM_READ_UNDERRUN; - } - else if ((response_r1 & SDMMC_OCR_STREAM_WRITE_OVERRUN) == SDMMC_OCR_STREAM_WRITE_OVERRUN) - { - return SDMMC_ERROR_STREAM_WRITE_OVERRUN; - } - else if ((response_r1 & SDMMC_OCR_CID_CSD_OVERWRITE) == SDMMC_OCR_CID_CSD_OVERWRITE) - { - return SDMMC_ERROR_CID_CSD_OVERWRITE; - } - else if ((response_r1 & SDMMC_OCR_WP_ERASE_SKIP) == SDMMC_OCR_WP_ERASE_SKIP) - { - return SDMMC_ERROR_WP_ERASE_SKIP; - } - else if ((response_r1 & SDMMC_OCR_CARD_ECC_DISABLED) == SDMMC_OCR_CARD_ECC_DISABLED) - { - return SDMMC_ERROR_CARD_ECC_DISABLED; - } - else if ((response_r1 & SDMMC_OCR_ERASE_RESET) == SDMMC_OCR_ERASE_RESET) - { - return SDMMC_ERROR_ERASE_RESET; - } - else if ((response_r1 & SDMMC_OCR_AKE_SEQ_ERROR) == SDMMC_OCR_AKE_SEQ_ERROR) - { - return SDMMC_ERROR_AKE_SEQ_ERR; - } - else - { - return SDMMC_ERROR_GENERAL_UNKNOWN_ERR; - } -} - -/** - * @brief Checks for error conditions for R2 (CID or CSD) response. - * @param hsd: SD handle - * @retval SD Card error state - */ -uint32_t SDMMC_GetCmdResp2(SDMMC_TypeDef *SDMMCx) -{ - uint32_t sta_reg; - /* 8 is the number of required instructions cycles for the below loop statement. - The SDMMC_CMDTIMEOUT is expressed in ms */ - uint32_t count = SDMMC_CMDTIMEOUT * (SystemCoreClock / 8U / 1000U); - - do - { - if (count-- == 0U) - { - return SDMMC_ERROR_TIMEOUT; - } - sta_reg = SDMMCx->STA; - } while (((sta_reg & (SDMMC_FLAG_CCRCFAIL | SDMMC_FLAG_CMDREND | SDMMC_FLAG_CTIMEOUT)) == 0U) || - ((sta_reg & SDMMC_FLAG_CMDACT) != 0U)); - - if (__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CTIMEOUT)) - { - __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_FLAG_CTIMEOUT); - - return SDMMC_ERROR_CMD_RSP_TIMEOUT; - } - else if (__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CCRCFAIL)) - { - __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_FLAG_CCRCFAIL); - - return SDMMC_ERROR_CMD_CRC_FAIL; - } - else - { - /* No error flag set */ - /* Clear all the static flags */ - __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_STATIC_CMD_FLAGS); - } - - return SDMMC_ERROR_NONE; -} - -/** - * @brief Checks for error conditions for R3 (OCR) response. - * @param hsd: SD handle - * @retval SD Card error state - */ -uint32_t SDMMC_GetCmdResp3(SDMMC_TypeDef *SDMMCx) -{ - uint32_t sta_reg; - /* 8 is the number of required instructions cycles for the below loop statement. - The SDMMC_CMDTIMEOUT is expressed in ms */ - uint32_t count = SDMMC_CMDTIMEOUT * (SystemCoreClock / 8U / 1000U); - - do - { - if (count-- == 0U) - { - return SDMMC_ERROR_TIMEOUT; - } - sta_reg = SDMMCx->STA; - } while (((sta_reg & (SDMMC_FLAG_CCRCFAIL | SDMMC_FLAG_CMDREND | SDMMC_FLAG_CTIMEOUT)) == 0U) || - ((sta_reg & SDMMC_FLAG_CMDACT) != 0U)); - - if (__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CTIMEOUT)) - { - __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_FLAG_CTIMEOUT); - - return SDMMC_ERROR_CMD_RSP_TIMEOUT; - } - else - { - /* Clear all the static flags */ - __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_STATIC_CMD_FLAGS); - } - - return SDMMC_ERROR_NONE; -} - -/** - * @brief Checks for error conditions for R4 response. - * @param SDMMCx: Pointer to SDMMC register base - * @param pResp: pointer to response - * @retval error state - */ -uint32_t SDMMC_GetCmdResp4(SDMMC_TypeDef *SDMMCx, uint32_t *pResp) -{ - uint32_t sta_reg; - - /* 8 is the number of required instructions cycles for the below loop statement. - The SDMMC_CMDTIMEOUT is expressed in ms */ - uint32_t count = SDMMC_CMDTIMEOUT * (SystemCoreClock / 8U / 1000U); - - do - { - if (count-- == 0U) - { - return SDMMC_ERROR_TIMEOUT; - } - sta_reg = SDMMCx->STA; - } while (((sta_reg & (SDMMC_FLAG_CCRCFAIL | SDMMC_FLAG_CMDREND | SDMMC_FLAG_CTIMEOUT)) == 0U) || - ((sta_reg & SDMMC_FLAG_CMDACT) != 0U)); - - if (__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CTIMEOUT)) - { - __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_FLAG_CTIMEOUT); - - return SDMMC_ERROR_CMD_RSP_TIMEOUT; - } - else - { - /* Clear all the static flags */ - __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_STATIC_CMD_FLAGS); - } - - /* Clear all the static flags */ - __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_STATIC_CMD_FLAGS); - - /* We have received response, retrieve it. */ - *pResp = SDMMC_GetResponse(SDMMCx, SDMMC_RESP1); - - return SDMMC_ERROR_NONE; -} - -/** - * @brief Checks for error conditions for R5 (cmd52/cmd53) response. - * @param SDMMCx: Pointer to SDMMC register base - * @param SDIO_CMD: The sent command index - * @param pData: pointer to the read/write buffer needed for cmd52 - * @retval SDIO Card error state - */ -uint32_t SDMMC_GetCmdResp5(SDMMC_TypeDef *SDMMCx, uint8_t SDIO_CMD, uint8_t *pData) -{ - uint32_t response_r5; - uint32_t sta_reg; - - /* 8 is the number of required instructions cycles for the below loop statement. - The SDMMC_CMDTIMEOUT is expressed in ms */ - uint32_t count = SDMMC_CMDTIMEOUT * (SystemCoreClock / 8U / 1000U); - - do - { - if (count-- == 0U) - { - return SDMMC_ERROR_TIMEOUT; - } - sta_reg = SDMMCx->STA; - } while (((sta_reg & (SDMMC_FLAG_CCRCFAIL | SDMMC_FLAG_CMDREND | SDMMC_FLAG_CTIMEOUT)) == 0U) || - ((sta_reg & SDMMC_FLAG_CMDACT) != 0U)); - - if (__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CTIMEOUT)) - { - __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_FLAG_CTIMEOUT); - - return SDMMC_ERROR_CMD_RSP_TIMEOUT; - } - else if (__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CCRCFAIL)) - { - __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_FLAG_CCRCFAIL); - - return SDMMC_ERROR_CMD_CRC_FAIL; - } - else - { - /* Nothing to do */ - } - - /* Check response received is of desired command */ - if (SDMMC_GetCommandResponse(SDMMCx) != SDIO_CMD) - { - return SDMMC_ERROR_CMD_CRC_FAIL; - } - - /* Clear all the static flags */ - __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_STATIC_CMD_FLAGS); - - /* We have received response, retrieve it. */ - response_r5 = SDMMC_GetResponse(SDMMCx, SDMMC_RESP1); - - if ((response_r5 & SDMMC_SDIO_R5_ERRORBITS) == SDMMC_ALLZERO) - { - /* we only want 8 bit read or write data and the 8 bit response flags are masked in the data pointer */ - if (pData != NULL) - { - *pData = (uint8_t)(response_r5 & 0xFFU); - } - - return SDMMC_ERROR_NONE; - } - else if ((response_r5 & SDMMC_SDIO_R5_OUT_OF_RANGE) == SDMMC_SDIO_R5_OUT_OF_RANGE) - { - return SDMMC_ERROR_ADDR_OUT_OF_RANGE; - } - else if ((response_r5 & SDMMC_SDIO_R5_INVALID_FUNCTION_NUMBER) == SDMMC_SDIO_R5_INVALID_FUNCTION_NUMBER) - { - return SDMMC_ERROR_INVALID_PARAMETER; - } - else if ((response_r5 & SDMMC_SDIO_R5_ILLEGAL_CMD) == SDMMC_SDIO_R5_ILLEGAL_CMD) - { - return SDMMC_ERROR_ILLEGAL_CMD; - } - else if ((response_r5 & SDMMC_SDIO_R5_COM_CRC_FAILED) == SDMMC_SDIO_R5_COM_CRC_FAILED) - { - return SDMMC_ERROR_COM_CRC_FAILED; - } - else - { - return SDMMC_ERROR_GENERAL_UNKNOWN_ERR; - } -} - -/** - * @brief Checks for error conditions for R6 (RCA) response. - * @param hsd: SD handle - * @param SD_CMD: The sent command index - * @param pRCA: Pointer to the variable that will contain the SD card relative - * address RCA - * @retval SD Card error state - */ -uint32_t SDMMC_GetCmdResp6(SDMMC_TypeDef *SDMMCx, uint8_t SD_CMD, uint16_t *pRCA) -{ - uint32_t response_r1; - uint32_t sta_reg; - - /* 8 is the number of required instructions cycles for the below loop statement. - The SDMMC_CMDTIMEOUT is expressed in ms */ - uint32_t count = SDMMC_CMDTIMEOUT * (SystemCoreClock / 8U / 1000U); - - do - { - if (count-- == 0U) - { - return SDMMC_ERROR_TIMEOUT; - } - sta_reg = SDMMCx->STA; - } while (((sta_reg & (SDMMC_FLAG_CCRCFAIL | SDMMC_FLAG_CMDREND | SDMMC_FLAG_CTIMEOUT)) == 0U) || - ((sta_reg & SDMMC_FLAG_CMDACT) != 0U)); - - if (__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CTIMEOUT)) - { - __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_FLAG_CTIMEOUT); - - return SDMMC_ERROR_CMD_RSP_TIMEOUT; - } - else if (__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CCRCFAIL)) - { - __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_FLAG_CCRCFAIL); - - return SDMMC_ERROR_CMD_CRC_FAIL; - } - else - { - /* Nothing to do */ - } - - /* Check response received is of desired command */ - if (SDMMC_GetCommandResponse(SDMMCx) != SD_CMD) - { - return SDMMC_ERROR_CMD_CRC_FAIL; - } - - /* Clear all the static flags */ - __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_STATIC_CMD_FLAGS); - - /* We have received response, retrieve it. */ - response_r1 = SDMMC_GetResponse(SDMMCx, SDMMC_RESP1); - - if ((response_r1 & (SDMMC_R6_GENERAL_UNKNOWN_ERROR | SDMMC_R6_ILLEGAL_CMD | - SDMMC_R6_COM_CRC_FAILED)) == SDMMC_ALLZERO) - { - *pRCA = (uint16_t)(response_r1 >> 16); - - return SDMMC_ERROR_NONE; - } - else if ((response_r1 & SDMMC_R6_ILLEGAL_CMD) == SDMMC_R6_ILLEGAL_CMD) - { - return SDMMC_ERROR_ILLEGAL_CMD; - } - else if ((response_r1 & SDMMC_R6_COM_CRC_FAILED) == SDMMC_R6_COM_CRC_FAILED) - { - return SDMMC_ERROR_COM_CRC_FAILED; - } - else - { - return SDMMC_ERROR_GENERAL_UNKNOWN_ERR; - } -} - -/** - * @brief Checks for error conditions for R7 response. - * @param hsd: SD handle - * @retval SD Card error state - */ -uint32_t SDMMC_GetCmdResp7(SDMMC_TypeDef *SDMMCx) -{ - uint32_t sta_reg; - /* 8 is the number of required instructions cycles for the below loop statement. - The SDMMC_CMDTIMEOUT is expressed in ms */ - uint32_t count = SDMMC_CMDTIMEOUT * (SystemCoreClock / 8U / 1000U); - - do - { - if (count-- == 0U) - { - return SDMMC_ERROR_TIMEOUT; - } - sta_reg = SDMMCx->STA; - } while (((sta_reg & (SDMMC_FLAG_CCRCFAIL | SDMMC_FLAG_CMDREND | SDMMC_FLAG_CTIMEOUT)) == 0U) || - ((sta_reg & SDMMC_FLAG_CMDACT) != 0U)); - - if (__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CTIMEOUT)) - { - /* Card is not SD V2.0 compliant */ - __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_FLAG_CTIMEOUT); - - return SDMMC_ERROR_CMD_RSP_TIMEOUT; - } - - else if (__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CCRCFAIL)) - { - /* Card is not SD V2.0 compliant */ - __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_FLAG_CCRCFAIL); - - return SDMMC_ERROR_CMD_CRC_FAIL; - } - else - { - /* Nothing to do */ - } - - if (__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CMDREND)) - { - /* Card is SD V2.0 compliant */ - __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_FLAG_CMDREND); - } - - return SDMMC_ERROR_NONE; - -} - -/** - * @} - */ - - -/** @defgroup HAL_SDMMC_LL_Group6 Linked List functions - * @brief Linked List management functions - * -@verbatim - =============================================================================== - ##### Linked List management functions ##### - =============================================================================== - [..] - This subsection provides a set of functions allowing to manage the needed functions. - -@endverbatim - * @{ - */ - -/** - * @brief Build new Linked List node. - * @param pNode: Pointer to new node to add. - * @param pNodeConf: Pointer to configuration parameters for new node to add. - * @retval Error status - */ -uint32_t SDMMC_DMALinkedList_BuildNode(SDMMC_DMALinkNodeTypeDef *pNode, const SDMMC_DMALinkNodeConfTypeDef *pNodeConf) -{ - - if ((pNode == NULL) || (pNodeConf == NULL)) - { - return SDMMC_ERROR_INVALID_PARAMETER; - } - /* Configure the Link Node registers*/ - pNode->IDMABASER = pNodeConf->BufferAddress; - pNode->IDMABSIZE = pNodeConf->BufferSize; - pNode->IDMALAR = SDMMC_IDMALAR_ULS | SDMMC_IDMALAR_ABR; - - return SDMMC_ERROR_NONE; -} - -/** - * @brief Insert new Linked List node. - * @param pLinkedList: Pointer to the linkedlist that contains transfer nodes - * @param pPrevNode: Pointer to previous node . - * @param pNewNode: Pointer to new node to add. - * @retval Error status - */ -uint32_t SDMMC_DMALinkedList_InsertNode(SDMMC_DMALinkedListTypeDef *pLinkedList, SDMMC_DMALinkNodeTypeDef *pPrevNode, - SDMMC_DMALinkNodeTypeDef *pNode) -{ - uint32_t link_list_offset; - uint32_t node_address = (uint32_t) pNode; - - /* First Node */ - if (pLinkedList->NodesCounter == 0U) - { - - pLinkedList->pHeadNode = pNode; - pLinkedList->pTailNode = pNode; - pLinkedList->NodesCounter = 1U; - - } - else if (pPrevNode == pLinkedList->pTailNode) - { - if (pNode <= pLinkedList->pHeadNode) - { - /* Node Address should greater than Head Node Address*/ - return SDMMC_ERROR_INVALID_PARAMETER; - } - - /*Last Node, no next node */ - MODIFY_REG(pPrevNode->IDMALAR, SDMMC_IDMALAR_ULA, 0U); - - /*link Prev node with new one */ - MODIFY_REG(pPrevNode->IDMALAR, SDMMC_IDMALAR_ULA, SDMMC_IDMALAR_ULA); - MODIFY_REG(pPrevNode->IDMALAR, SDMMC_IDMALAR_IDMALA, (node_address - (uint32_t)pLinkedList->pHeadNode)); - - pLinkedList->NodesCounter ++; - pLinkedList->pTailNode = pNode; - - } - else - { - - if (pNode <= pLinkedList->pHeadNode) - { - /* Node Address should greater than Head Node Address*/ - return SDMMC_ERROR_INVALID_PARAMETER; - } - - /*link New node with Next one */ - link_list_offset = pNode->IDMALAR; - MODIFY_REG(pPrevNode->IDMALAR, SDMMC_IDMALAR_IDMALA, link_list_offset); - - /*link Prev node with new one */ - MODIFY_REG(pPrevNode->IDMALAR, SDMMC_IDMALAR_ULA, SDMMC_IDMALAR_ULA); - MODIFY_REG(pPrevNode->IDMALAR, SDMMC_IDMALAR_IDMALA, (node_address - (uint32_t)pLinkedList->pHeadNode)); - - pLinkedList->NodesCounter ++; - - } - return SDMMC_ERROR_NONE; -} - -/** - * @brief Remove node from the Linked List. - * @param pLinkedList: Pointer to the linkedlist that contains transfer nodes - * @param pNode: Pointer to new node to add. - * @retval Error status - */ -uint32_t SDMMC_DMALinkedList_RemoveNode(SDMMC_DMALinkedListTypeDef *pLinkedList, SDMMC_DMALinkNodeTypeDef *pNode) -{ - uint32_t count = 0U; - uint32_t linked_list_offset; - SDMMC_DMALinkNodeTypeDef *prev_node = NULL; - SDMMC_DMALinkNodeTypeDef *curr_node ; - - /* First Node */ - if (pLinkedList->NodesCounter == 0U) - { - - return SDMMC_ERROR_INVALID_PARAMETER; - } - else - { - curr_node = pLinkedList->pHeadNode; - while ((curr_node != pNode) && (count <= pLinkedList->NodesCounter)) - { - prev_node = curr_node; - curr_node = (SDMMC_DMALinkNodeTypeDef *)((prev_node->IDMALAR & SDMMC_IDMALAR_IDMALA) + - (uint32_t)pLinkedList->pHeadNode); - count++; - } - - if ((count == 0U) || (count > pLinkedList->NodesCounter)) - { - /* Node not found in the linked list */ - return SDMMC_ERROR_INVALID_PARAMETER; - } - - pLinkedList->NodesCounter--; - - if (pLinkedList->NodesCounter == 0U) - { - pLinkedList->pHeadNode = 0U; - pLinkedList->pTailNode = 0U; - } - else - { - /*link prev node with next one */ - linked_list_offset = curr_node->IDMALAR; - MODIFY_REG(prev_node->IDMALAR, SDMMC_IDMALAR_IDMALA, linked_list_offset); - /* Configure the new Link Node registers*/ - pNode->IDMALAR |= linked_list_offset; - - pLinkedList->pTailNode = prev_node; - } - } - return SDMMC_ERROR_NONE; -} - -/** - * @brief Lock Linked List Node - * @param pNode: Pointer to node to lock. - * @retval Error status - - */ -uint32_t SDMMC_DMALinkedList_LockNode(SDMMC_DMALinkNodeTypeDef *pNode) -{ - - if (pNode == NULL) - { - return SDMMC_ERROR_INVALID_PARAMETER; - } - - MODIFY_REG(pNode->IDMALAR, SDMMC_IDMALAR_ABR, 0U); - - return SDMMC_ERROR_NONE; -} - -/** - * @brief Unlock Linked List Node - * @param pNode: Pointer to node to unlock. - * @retval Error status - - */ -uint32_t SDMMC_DMALinkedList_UnlockNode(SDMMC_DMALinkNodeTypeDef *pNode) -{ - - if (pNode == NULL) - { - return SDMMC_ERROR_INVALID_PARAMETER; - } - - MODIFY_REG(pNode->IDMALAR, SDMMC_IDMALAR_ABR, SDMMC_IDMALAR_ABR); - - return SDMMC_ERROR_NONE; -} - -/** - * @brief Enable Linked List circular mode - * @param pLinkedList: Pointer to the linkedlist that contains transfer nodes - * @retval Error status - - */ -uint32_t SDMMC_DMALinkedList_EnableCircularMode(SDMMC_DMALinkedListTypeDef *pLinkedList) -{ - - if (pLinkedList == NULL) - { - return SDMMC_ERROR_INVALID_PARAMETER; - } - - MODIFY_REG(pLinkedList->pTailNode->IDMALAR, SDMMC_IDMALAR_ULA | SDMMC_IDMALAR_IDMALA, SDMMC_IDMALAR_ULA); - - return SDMMC_ERROR_NONE; -} - -/** - * @brief Disable DMA Linked List Circular mode - * @param pLinkedList: Pointer to the linkedlist that contains transfer nodes - * @retval Error status - */ -uint32_t SDMMC_DMALinkedList_DisableCircularMode(SDMMC_DMALinkedListTypeDef *pLinkedList) -{ - - if (pLinkedList == NULL) - { - return SDMMC_ERROR_INVALID_PARAMETER; - } - - MODIFY_REG(pLinkedList->pTailNode->IDMALAR, SDMMC_IDMALAR_ULA, 0U); - - return SDMMC_ERROR_NONE; -} - -/** - * @} - */ - - -/* Private function ----------------------------------------------------------*/ -/** @addtogroup SD_Private_Functions - * @{ - */ - -/** - * @brief Checks for error conditions for CMD0. - * @param hsd: SD handle - * @retval SD Card error state - */ -static uint32_t SDMMC_GetCmdError(SDMMC_TypeDef *SDMMCx) -{ - /* 8 is the number of required instructions cycles for the below loop statement. - The SDMMC_CMDTIMEOUT is expressed in ms */ - uint32_t count = SDMMC_CMDTIMEOUT * (SystemCoreClock / 8U / 1000U); - - do - { - if (count-- == 0U) - { - return SDMMC_ERROR_TIMEOUT; - } - - } while (!__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CMDSENT)); - - /* Clear all the static flags */ - __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_STATIC_CMD_FLAGS); - - return SDMMC_ERROR_NONE; -} - -/** - * @} - */ - -#endif /* HAL_SD_MODULE_ENABLED || HAL_MMC_MODULE_ENABLED */ -#endif /* SDMMC1 || SDMMC2 */ -/** - * @} - */ - -/** - * @} - */ Index: trunk/firmware/FSBL/CubeMX/FSBL/Inc/sdmmc.h =================================================================== --- trunk/firmware/FSBL/CubeMX/FSBL/Inc/sdmmc.h (revision 37) +++ (revision ) @@ -1,52 +1,0 @@ -/* USER CODE BEGIN Header */ -/** - ****************************************************************************** - * @file sdmmc.h - * @brief This file contains all the function prototypes for - * the sdmmc.c file - ****************************************************************************** - * @attention - * - * Copyright (c) 2026 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ -/* USER CODE END Header */ -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __SDMMC_H__ -#define __SDMMC_H__ - -#ifdef __cplusplus -extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "main.h" - -/* USER CODE BEGIN Includes */ - -/* USER CODE END Includes */ - -extern SD_HandleTypeDef hsd2; - -/* USER CODE BEGIN Private defines */ - -/* USER CODE END Private defines */ - -void MX_SDMMC2_SD_Init(void); - -/* USER CODE BEGIN Prototypes */ - -/* USER CODE END Prototypes */ - -#ifdef __cplusplus -} -#endif - -#endif /* __SDMMC_H__ */ - Index: trunk/firmware/FSBL/CubeMX/FSBL/Inc/stm32n6xx_hal_conf.h =================================================================== --- trunk/firmware/FSBL/CubeMX/FSBL/Inc/stm32n6xx_hal_conf.h (revision 37) +++ trunk/firmware/FSBL/CubeMX/FSBL/Inc/stm32n6xx_hal_conf.h (revision 38) @@ -68,9 +68,9 @@ /*#define HAL_PSSI_MODULE_ENABLED */ #define HAL_RAMCFG_MODULE_ENABLED -#define HAL_RIF_MODULE_ENABLED +/*#define HAL_RIF_MODULE_ENABLED */ /*#define HAL_RNG_MODULE_ENABLED */ /*#define HAL_RTC_MODULE_ENABLED */ /*#define HAL_SAI_MODULE_ENABLED */ -#define HAL_SD_MODULE_ENABLED +/*#define HAL_SD_MODULE_ENABLED */ /*#define HAL_SDIO_MODULE_ENABLED */ /*#define HAL_SDRAM_MODULE_ENABLED */ Index: trunk/firmware/FSBL/CubeMX/FSBL/Inc/stm32n6xx_it.h =================================================================== --- trunk/firmware/FSBL/CubeMX/FSBL/Inc/stm32n6xx_it.h (revision 37) +++ trunk/firmware/FSBL/CubeMX/FSBL/Inc/stm32n6xx_it.h (revision 38) @@ -58,5 +58,4 @@ void SysTick_Handler(void); void TIM18_IRQHandler(void); -void SDMMC2_IRQHandler(void); /* USER CODE BEGIN EFP */ Index: trunk/firmware/FSBL/CubeMX/FSBL/Src/gpio.c =================================================================== --- trunk/firmware/FSBL/CubeMX/FSBL/Src/gpio.c (revision 37) +++ trunk/firmware/FSBL/CubeMX/FSBL/Src/gpio.c (revision 38) @@ -45,5 +45,4 @@ /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOC_CLK_ENABLE(); - __HAL_RCC_GPIOE_CLK_ENABLE(); __HAL_RCC_GPIOO_CLK_ENABLE(); __HAL_RCC_GPION_CLK_ENABLE(); @@ -56,4 +55,12 @@ /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(EXT_SMPS_GPIO_Port, EXT_SMPS_Pin, GPIO_PIN_SET); + + /*Configure GPIO pin : PC2 */ + GPIO_InitStruct.Pin = GPIO_PIN_2; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF11_SDMMC2; + HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); /*Configure GPIO pin : LED_GREEN_Pin */ Index: trunk/firmware/FSBL/CubeMX/FSBL/Src/main.c =================================================================== --- trunk/firmware/FSBL/CubeMX/FSBL/Src/main.c (revision 37) +++ trunk/firmware/FSBL/CubeMX/FSBL/Src/main.c (revision 38) @@ -22,5 +22,4 @@ #include "extmem_manager.h" #include "ramcfg.h" -#include "sdmmc.h" #include "xspi.h" #include "gpio.h" @@ -61,5 +60,4 @@ /* Private function prototypes -----------------------------------------------*/ void SystemClock_Config(void); -static void SystemIsolation_Config(void); /* USER CODE BEGIN PFP */ @@ -114,6 +112,4 @@ MX_BSEC_Init(); MX_RAMCFG_Init(); - SystemIsolation_Config(); - MX_SDMMC2_SD_Init(); MX_EXTMEM_MANAGER_Init(); /* USER CODE BEGIN 2 */ @@ -265,49 +261,4 @@ Error_Handler(); } -} - -/** - * @brief RIF Initialization Function - * @param None - * @retval None - */ -static void SystemIsolation_Config(void) -{ - -/* USER CODE BEGIN RIF_Init 0 */ - -/* USER CODE END RIF_Init 0 */ - - /* set all required IPs as secure privileged */ - __HAL_RCC_RIFSC_CLK_ENABLE(); - - /*RIMC configuration*/ - RIMC_MasterConfig_t RIMC_master = {0}; - RIMC_master.MasterCID = RIF_CID_1; - RIMC_master.SecPriv = RIF_ATTRIBUTE_SEC | RIF_ATTRIBUTE_PRIV; - HAL_RIF_RIMC_ConfigMasterAttributes(RIF_MASTER_INDEX_SDMMC2, &RIMC_master); - - /*RISUP configuration*/ - HAL_RIF_RISC_SetSlaveSecureAttributes(RIF_RISC_PERIPH_INDEX_SDMMC2 , RIF_ATTRIBUTE_SEC | RIF_ATTRIBUTE_PRIV); - - /* RIF-Aware IPs Config */ - - /* set up GPIO configuration */ - /*HAL_GPIO_ConfigPinAttributes(GPIOB,GPIO_PIN_12,GPIO_PIN_SEC|GPIO_PIN_NPRIV); - HAL_GPIO_ConfigPinAttributes(GPIOC,GPIO_PIN_0,GPIO_PIN_SEC|GPIO_PIN_NPRIV); - HAL_GPIO_ConfigPinAttributes(GPIOC,GPIO_PIN_2,GPIO_PIN_SEC|GPIO_PIN_NPRIV); - HAL_GPIO_ConfigPinAttributes(GPIOC,GPIO_PIN_3,GPIO_PIN_SEC|GPIO_PIN_NPRIV); - HAL_GPIO_ConfigPinAttributes(GPIOC,GPIO_PIN_4,GPIO_PIN_SEC|GPIO_PIN_NPRIV); - HAL_GPIO_ConfigPinAttributes(GPIOC,GPIO_PIN_5,GPIO_PIN_SEC|GPIO_PIN_NPRIV); - HAL_GPIO_ConfigPinAttributes(GPIOE,GPIO_PIN_4,GPIO_PIN_SEC|GPIO_PIN_NPRIV); - HAL_GPIO_ConfigPinAttributes(GPIOO,GPIO_PIN_1,GPIO_PIN_SEC|GPIO_PIN_NPRIV);*/ - -/* USER CODE BEGIN RIF_Init 1 */ - -/* USER CODE END RIF_Init 1 */ -/* USER CODE BEGIN RIF_Init 2 */ - -/* USER CODE END RIF_Init 2 */ - } Index: trunk/firmware/FSBL/CubeMX/FSBL/Src/sdmmc.c =================================================================== --- trunk/firmware/FSBL/CubeMX/FSBL/Src/sdmmc.c (revision 37) +++ (revision ) @@ -1,152 +1,0 @@ -/* USER CODE BEGIN Header */ -/** - ****************************************************************************** - * @file sdmmc.c - * @brief This file provides code for the configuration - * of the SDMMC instances. - ****************************************************************************** - * @attention - * - * Copyright (c) 2026 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ -/* USER CODE END Header */ -/* Includes ------------------------------------------------------------------*/ -#include "sdmmc.h" - -/* USER CODE BEGIN 0 */ - -/* USER CODE END 0 */ - -SD_HandleTypeDef hsd2; - -/* SDMMC2 init function */ - -void MX_SDMMC2_SD_Init(void) -{ - - /* USER CODE BEGIN SDMMC2_Init 0 */ - - //__HAL_RCC_SDMMC2_FORCE_RESET(); - //__HAL_RCC_SDMMC2_RELEASE_RESET(); - - /* USER CODE END SDMMC2_Init 0 */ - - /* USER CODE BEGIN SDMMC2_Init 1 */ - - /* USER CODE END SDMMC2_Init 1 */ - hsd2.Instance = SDMMC2; - hsd2.Init.ClockEdge = SDMMC_CLOCK_EDGE_RISING; - hsd2.Init.ClockPowerSave = SDMMC_CLOCK_POWER_SAVE_DISABLE; - hsd2.Init.BusWide = SDMMC_BUS_WIDE_4B; - hsd2.Init.HardwareFlowControl = SDMMC_HARDWARE_FLOW_CONTROL_DISABLE; - hsd2.Init.ClockDiv = 2; - if (HAL_SD_Init(&hsd2) != HAL_OK) - { - Error_Handler(); - } - /* USER CODE BEGIN SDMMC2_Init 2 */ - - /* USER CODE END SDMMC2_Init 2 */ - -} - -void HAL_SD_MspInit(SD_HandleTypeDef* sdHandle) -{ - - GPIO_InitTypeDef GPIO_InitStruct = {0}; - RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; - if(sdHandle->Instance==SDMMC2) - { - /* USER CODE BEGIN SDMMC2_MspInit 0 */ - - /* USER CODE END SDMMC2_MspInit 0 */ - - /** Initializes the peripherals clock - */ - PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SDMMC2; - PeriphClkInitStruct.Sdmmc2ClockSelection = RCC_SDMMC2CLKSOURCE_HCLK; - if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) - { - Error_Handler(); - } - - /* SDMMC2 clock enable */ - __HAL_RCC_SDMMC2_CLK_ENABLE(); - - __HAL_RCC_GPIOC_CLK_ENABLE(); - __HAL_RCC_GPIOE_CLK_ENABLE(); - /**SDMMC2 GPIO Configuration - PC4 ------> SDMMC2_D0 - PC5 ------> SDMMC2_D1 - PC0 ------> SDMMC2_D2 - PC2 ------> SDMMC2_CK - PE4 ------> SDMMC2_D3 - PC3 ------> SDMMC2_CMD - */ - GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_0|GPIO_PIN_2 - |GPIO_PIN_3; - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.Pull = GPIO_PULLUP; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - GPIO_InitStruct.Alternate = GPIO_AF11_SDMMC2; - HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); - - GPIO_InitStruct.Pin = GPIO_PIN_4; - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.Pull = GPIO_PULLUP; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - GPIO_InitStruct.Alternate = GPIO_AF11_SDMMC2; - HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); - - /* SDMMC2 interrupt Init */ - HAL_NVIC_SetPriority(SDMMC2_IRQn, 5, 0); - HAL_NVIC_EnableIRQ(SDMMC2_IRQn); - /* USER CODE BEGIN SDMMC2_MspInit 1 */ - - /* USER CODE END SDMMC2_MspInit 1 */ - } -} - -void HAL_SD_MspDeInit(SD_HandleTypeDef* sdHandle) -{ - - if(sdHandle->Instance==SDMMC2) - { - /* USER CODE BEGIN SDMMC2_MspDeInit 0 */ - - /* USER CODE END SDMMC2_MspDeInit 0 */ - /* Peripheral clock disable */ - __HAL_RCC_SDMMC2_CLK_DISABLE(); - - /**SDMMC2 GPIO Configuration - PC4 ------> SDMMC2_D0 - PC5 ------> SDMMC2_D1 - PC0 ------> SDMMC2_D2 - PC2 ------> SDMMC2_CK - PE4 ------> SDMMC2_D3 - PC3 ------> SDMMC2_CMD - */ - HAL_GPIO_DeInit(GPIOC, GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_0|GPIO_PIN_2 - |GPIO_PIN_3); - - HAL_GPIO_DeInit(GPIOE, GPIO_PIN_4); - - /* SDMMC2 interrupt Deinit */ - HAL_NVIC_DisableIRQ(SDMMC2_IRQn); - /* USER CODE BEGIN SDMMC2_MspDeInit 1 */ - - /* USER CODE END SDMMC2_MspDeInit 1 */ - } -} - -/* USER CODE BEGIN 1 */ - -/* USER CODE END 1 */ - Index: trunk/firmware/FSBL/CubeMX/FSBL/Src/stm32n6xx_it.c =================================================================== --- trunk/firmware/FSBL/CubeMX/FSBL/Src/stm32n6xx_it.c (revision 37) +++ trunk/firmware/FSBL/CubeMX/FSBL/Src/stm32n6xx_it.c (revision 38) @@ -56,5 +56,4 @@ /* External variables --------------------------------------------------------*/ -extern SD_HandleTypeDef hsd2; extern TIM_HandleTypeDef htim18; @@ -230,18 +229,4 @@ } -/** - * @brief This function handles SDMMC2 global interrupt. - */ -void SDMMC2_IRQHandler(void) -{ - /* USER CODE BEGIN SDMMC2_IRQn 0 */ - - /* USER CODE END SDMMC2_IRQn 0 */ - HAL_SD_IRQHandler(&hsd2); - /* USER CODE BEGIN SDMMC2_IRQn 1 */ - - /* USER CODE END SDMMC2_IRQn 1 */ -} - /* USER CODE BEGIN 1 */ Index: trunk/firmware/FSBL/CubeMX/blto2_FSBL.ioc =================================================================== --- trunk/firmware/FSBL/CubeMX/blto2_FSBL.ioc (revision 37) +++ trunk/firmware/FSBL/CubeMX/blto2_FSBL.ioc (revision 38) @@ -1,4 +1,4 @@ #MicroXplorer Configuration settings - do not modify -Appli.IPs=CORTEX_M55_S,GPDMA1,HPDMA1,LINKEDLIST,RCC,GPIO,NVIC1\:I,SAU +Appli.IPs=CORTEX_M55_S,GPDMA1,HPDMA1,LINKEDLIST,RCC,GPIO,NVIC1\:I,SAU,RIF CAD.formats= CAD.pinconfig= @@ -21,5 +21,5 @@ EXTMEM_MANAGER.RefParam_XIP_ApplicationOffset=0x80000 ExtMemLoader.IPs=EXTMEM_LOADER,EXTMEM_MANAGER,RCC\:I,GPIO,TIM6 -FSBL.IPs=CORTEX_M55_FSBL,GPDMA1\:I,HDP,HPDMA1\:I,LINKEDLIST,RCC,GPIO\:I,NVIC\:I,XSPIM,XSPI2,EXTMEM_MANAGER,BSEC,DEBUG,RAMCFG,SYS_S\:I,TIM18,SDMMC2,RIF +FSBL.IPs=CORTEX_M55_FSBL,GPDMA1\:I,HDP,HPDMA1\:I,LINKEDLIST,RCC,GPIO\:I,NVIC\:I,XSPIM,XSPI2,EXTMEM_MANAGER,BSEC,DEBUG,RAMCFG,SYS_S\:I,TIM18 FSBL.Pins=PO1,PB12 File.Version=6 @@ -35,8 +35,7 @@ Mcu.IP0=BSEC Mcu.IP1=CORTEX_M55_FSBL -Mcu.IP10=SDMMC2 -Mcu.IP11=SYS_S -Mcu.IP12=XSPI2 -Mcu.IP13=XSPIM +Mcu.IP10=SYS_S +Mcu.IP11=XSPI2 +Mcu.IP12=XSPIM Mcu.IP2=CORTEX_M55_S Mcu.IP3=DEBUG @@ -47,47 +46,42 @@ Mcu.IP8=RCC Mcu.IP9=RIF -Mcu.IPNb=14 +Mcu.IPNb=13 Mcu.Name=STM32N657X0HxQ Mcu.Package=VFBGA264 -Mcu.Pin0=PC4 -Mcu.Pin1=PC5 -Mcu.Pin10=PN0 -Mcu.Pin11=PB12 -Mcu.Pin12=PN3 -Mcu.Pin13=PN5 -Mcu.Pin14=PN1 -Mcu.Pin15=PA14(JTCK/SWCLK) -Mcu.Pin16=PN9 -Mcu.Pin17=PN2 -Mcu.Pin18=PA13(JTMS/SWDIO) -Mcu.Pin19=PB5(JTDO/TRACESWO) -Mcu.Pin2=PC0 -Mcu.Pin20=PN10 -Mcu.Pin21=PN11 -Mcu.Pin22=VP_BSEC_VS_BSEC -Mcu.Pin23=VP_EXTMEM_MANAGER_SIG_Activate_EXTMEM -Mcu.Pin24=VP_RAMCFG_VS_RAMCFG1 -Mcu.Pin25=VP_RAMCFG_VS_RAMCFG2 -Mcu.Pin26=VP_RAMCFG_VS_RAMCFG3 -Mcu.Pin27=VP_RAMCFG_VS_RAMCFG4 -Mcu.Pin28=VP_RAMCFG_VS_RAMCFG5 -Mcu.Pin29=VP_RAMCFG_VS_RAMCFG6 -Mcu.Pin3=PC2 -Mcu.Pin30=VP_RAMCFG_VS_AHBSRAM1 -Mcu.Pin31=VP_RAMCFG_VS_AHBSRAM2 -Mcu.Pin32=VP_RAMCFG_VS_BKPRAM -Mcu.Pin33=VP_RAMCFG_VS_FLEXRAM -Mcu.Pin34=VP_RAMCFG_VS_VENCRAM -Mcu.Pin35=VP_RIF_VS_RIF1 -Mcu.Pin36=VP_SYS_S_VS_tim18 -Mcu.Pin37=VP_XSPI2_VS_octo -Mcu.Pin38=VP_XSPIM_VS_IO -Mcu.Pin4=PE4 -Mcu.Pin5=PC3 -Mcu.Pin6=PO1 -Mcu.Pin7=PN4 -Mcu.Pin8=PN6 -Mcu.Pin9=PN8 -Mcu.PinsNb=39 +Mcu.Pin0=PC2 +Mcu.Pin1=PO1 +Mcu.Pin10=PA14(JTCK/SWCLK) +Mcu.Pin11=PN9 +Mcu.Pin12=PN2 +Mcu.Pin13=PA13(JTMS/SWDIO) +Mcu.Pin14=PB5(JTDO/TRACESWO) +Mcu.Pin15=PN10 +Mcu.Pin16=PN11 +Mcu.Pin17=VP_BSEC_VS_BSEC +Mcu.Pin18=VP_EXTMEM_MANAGER_SIG_Activate_EXTMEM +Mcu.Pin19=VP_RAMCFG_VS_RAMCFG1 +Mcu.Pin2=PN4 +Mcu.Pin20=VP_RAMCFG_VS_RAMCFG2 +Mcu.Pin21=VP_RAMCFG_VS_RAMCFG3 +Mcu.Pin22=VP_RAMCFG_VS_RAMCFG4 +Mcu.Pin23=VP_RAMCFG_VS_RAMCFG5 +Mcu.Pin24=VP_RAMCFG_VS_RAMCFG6 +Mcu.Pin25=VP_RAMCFG_VS_AHBSRAM1 +Mcu.Pin26=VP_RAMCFG_VS_AHBSRAM2 +Mcu.Pin27=VP_RAMCFG_VS_BKPRAM +Mcu.Pin28=VP_RAMCFG_VS_FLEXRAM +Mcu.Pin29=VP_RAMCFG_VS_VENCRAM +Mcu.Pin3=PN6 +Mcu.Pin30=VP_RIF_VS_RIF1 +Mcu.Pin31=VP_SYS_S_VS_tim18 +Mcu.Pin32=VP_XSPI2_VS_octo +Mcu.Pin33=VP_XSPIM_VS_IO +Mcu.Pin4=PN8 +Mcu.Pin5=PN0 +Mcu.Pin6=PB12 +Mcu.Pin7=PN3 +Mcu.Pin8=PN5 +Mcu.Pin9=PN1 +Mcu.PinsNb=34 Mcu.ThirdPartyNb=0 Mcu.UserConstants= @@ -105,5 +99,4 @@ NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4 -NVIC.SDMMC2_IRQn=true\:5\:0\:true\:false\:true\:true\:true\:true NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false NVIC.SecureFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false @@ -148,35 +141,10 @@ PB5(JTDO/TRACESWO).PinAttribute=FSBL PB5(JTDO/TRACESWO).Signal=DEBUG_JTDO-SWO -PC0.GPIOParameters=GPIO_PuPd,GPIO_Speed_Medium_Default,PinAttribute -PC0.GPIO_PuPd=GPIO_PULLUP -PC0.GPIO_Speed_Medium_Default=GPIO_SPEED_FREQ_VERY_HIGH -PC0.Mode=SD_4_bits_Wide_bus -PC0.PinAttribute=FSBL -PC0.Signal=SDMMC2_D2 PC2.GPIOParameters=PinAttribute,GPIO_PuPd,GPIO_Speed_Medium_Default PC2.GPIO_PuPd=GPIO_PULLUP PC2.GPIO_Speed_Medium_Default=GPIO_SPEED_FREQ_VERY_HIGH PC2.Locked=true -PC2.Mode=SD_4_bits_Wide_bus PC2.PinAttribute=FSBL PC2.Signal=SDMMC2_CK -PC3.GPIOParameters=GPIO_PuPd,GPIO_Speed_Medium_Default,PinAttribute -PC3.GPIO_PuPd=GPIO_PULLUP -PC3.GPIO_Speed_Medium_Default=GPIO_SPEED_FREQ_VERY_HIGH -PC3.Mode=SD_4_bits_Wide_bus -PC3.PinAttribute=FSBL -PC3.Signal=SDMMC2_CMD -PC4.GPIOParameters=GPIO_PuPd,GPIO_Speed_Medium_Default,PinAttribute -PC4.GPIO_PuPd=GPIO_PULLUP -PC4.GPIO_Speed_Medium_Default=GPIO_SPEED_FREQ_VERY_HIGH -PC4.Mode=SD_4_bits_Wide_bus -PC4.PinAttribute=FSBL -PC4.Signal=SDMMC2_D0 -PC5.GPIOParameters=GPIO_PuPd,GPIO_Speed_Medium_Default,PinAttribute -PC5.GPIO_PuPd=GPIO_PULLUP -PC5.GPIO_Speed_Medium_Default=GPIO_SPEED_FREQ_VERY_HIGH -PC5.Mode=SD_4_bits_Wide_bus -PC5.PinAttribute=FSBL -PC5.Signal=SDMMC2_D1 PCC.Bar.Display=Horizontal Bar PCC.Checker=false @@ -190,10 +158,4 @@ PCC.Temperature=25 PCC.Vdd=1.8 -PE4.GPIOParameters=GPIO_PuPd,GPIO_Speed_Medium_Default,PinAttribute -PE4.GPIO_PuPd=GPIO_PULLUP -PE4.GPIO_Speed_Medium_Default=GPIO_SPEED_FREQ_VERY_HIGH -PE4.Mode=SD_4_bits_Wide_bus -PE4.PinAttribute=FSBL -PE4.Signal=SDMMC2_D3 PN0.GPIOParameters=PinAttribute PN0.Mode=XSPI2_Port2Octo @@ -526,7 +488,6 @@ RIF.RIFAWARE.GPIO\ Feature\ PB9\ Cid=- RIF.RIFAWARE.GPIO\ Feature\ PB9\ Secure=false -RIF.RIFAWARE.GPIO\ Feature\ PC0\ Cid=1 -RIF.RIFAWARE.GPIO\ Feature\ PC0\ FSBL=true -RIF.RIFAWARE.GPIO\ Feature\ PC0\ Secure=true +RIF.RIFAWARE.GPIO\ Feature\ PC0\ Cid=- +RIF.RIFAWARE.GPIO\ Feature\ PC0\ Secure=false RIF.RIFAWARE.GPIO\ Feature\ PC1\ Cid=- RIF.RIFAWARE.GPIO\ Feature\ PC1\ Secure=false @@ -539,16 +500,12 @@ RIF.RIFAWARE.GPIO\ Feature\ PC13\ Cid=- RIF.RIFAWARE.GPIO\ Feature\ PC13\ Secure=false -RIF.RIFAWARE.GPIO\ Feature\ PC2\ Cid=1 -RIF.RIFAWARE.GPIO\ Feature\ PC2\ FSBL=true -RIF.RIFAWARE.GPIO\ Feature\ PC2\ Secure=true -RIF.RIFAWARE.GPIO\ Feature\ PC3\ Cid=1 -RIF.RIFAWARE.GPIO\ Feature\ PC3\ FSBL=true -RIF.RIFAWARE.GPIO\ Feature\ PC3\ Secure=true -RIF.RIFAWARE.GPIO\ Feature\ PC4\ Cid=1 -RIF.RIFAWARE.GPIO\ Feature\ PC4\ FSBL=true -RIF.RIFAWARE.GPIO\ Feature\ PC4\ Secure=true -RIF.RIFAWARE.GPIO\ Feature\ PC5\ Cid=1 -RIF.RIFAWARE.GPIO\ Feature\ PC5\ FSBL=true -RIF.RIFAWARE.GPIO\ Feature\ PC5\ Secure=true +RIF.RIFAWARE.GPIO\ Feature\ PC2\ Cid=- +RIF.RIFAWARE.GPIO\ Feature\ PC2\ Secure=false +RIF.RIFAWARE.GPIO\ Feature\ PC3\ Cid=- +RIF.RIFAWARE.GPIO\ Feature\ PC3\ Secure=false +RIF.RIFAWARE.GPIO\ Feature\ PC4\ Cid=- +RIF.RIFAWARE.GPIO\ Feature\ PC4\ Secure=false +RIF.RIFAWARE.GPIO\ Feature\ PC5\ Cid=- +RIF.RIFAWARE.GPIO\ Feature\ PC5\ Secure=false RIF.RIFAWARE.GPIO\ Feature\ PC6\ Cid=- RIF.RIFAWARE.GPIO\ Feature\ PC6\ Secure=false @@ -611,7 +568,6 @@ RIF.RIFAWARE.GPIO\ Feature\ PE3\ Cid=- RIF.RIFAWARE.GPIO\ Feature\ PE3\ Secure=false -RIF.RIFAWARE.GPIO\ Feature\ PE4\ Cid=1 -RIF.RIFAWARE.GPIO\ Feature\ PE4\ FSBL=true -RIF.RIFAWARE.GPIO\ Feature\ PE4\ Secure=true +RIF.RIFAWARE.GPIO\ Feature\ PE4\ Cid=- +RIF.RIFAWARE.GPIO\ Feature\ PE4\ Secure=false RIF.RIFAWARE.GPIO\ Feature\ PE5\ Cid=- RIF.RIFAWARE.GPIO\ Feature\ PE5\ Secure=false @@ -973,9 +929,7 @@ RIF.RISUP.SDMMC2.Privilege=true RIF.SDMMC1_CID_RIMU=0 -RIF.SDMMC2_CID_RIMU=1 +RIF.SDMMC2_CID_RIMU=0 RIF.VENC_CID_RIMU=0 RIF.default_config=false -SDMMC2.ClockDiv=2 -SDMMC2.IPParameters=ClockDiv VP_BSEC_VS_BSEC.Mode=BSEC_Activate VP_BSEC_VS_BSEC.Signal=BSEC_VS_BSEC