Index: trunk/firmware/FSBL/CubeMX/.mxproject =================================================================== --- trunk/firmware/FSBL/CubeMX/.mxproject (revision 26) +++ trunk/firmware/FSBL/CubeMX/.mxproject (revision 27) @@ -1,10 +1,10 @@ [FSBL:PreviousGenFiles] HeaderPath=..\FSBL\Inc -HeaderFiles=gpio.h;xspi.h;stm32n6xx_it.h;stm32n6xx_hal_conf.h;main.h;extmem_manager.h;stm32_extmem_conf.h;bsec.h;icache.h; +HeaderFiles=gpio.h;xspi.h;stm32n6xx_it.h;stm32n6xx_hal_conf.h;main.h;extmem_manager.h;stm32_extmem_conf.h;bsec.h;icache.h;ramcfg.h; SourcePath=..\FSBL\Src -SourceFiles=gpio.c;xspi.c;stm32n6xx_it.c;stm32n6xx_hal_msp.c;main.c;extmem_manager.c;bsec.c;icache.c; +SourceFiles=gpio.c;xspi.c;stm32n6xx_it.c;stm32n6xx_hal_msp.c;main.c;extmem_manager.c;bsec.c;icache.c;ramcfg.c; [FSBL:PreviousLibFiles] -LibFiles=Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_bsec.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_bsec.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_rcc.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_rcc_ex.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_bus.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_rcc.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_system.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_utils.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_gpio.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_gpio_ex.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_gpio.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_dma.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_dma_ex.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_dma.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_pwr.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_pwr_ex.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_pwr.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_cortex.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_cortex.h;Drivers\CMSIS\Device\ST\STM32N6xx\Include\partition_stm32n6xx.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_def.h;Drivers\STM32N6xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_exti.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_exti.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_xspi.h;Middlewares\ST\STM32_ExtMem_Manager\stm32_extmem.h;Middlewares\ST\STM32_ExtMem_Manager\boot\stm32_boot_xip.h;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_xspi_type.h;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_xspi_api.h;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_sd_type.h;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_sd_api.h;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_data.h;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_driver_api.h;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_driver_type.h;Middlewares\ST\STM32_ExtMem_Manager\psram\stm32_psram_driver_api.h;Middlewares\ST\STM32_ExtMem_Manager\psram\stm32_psram_driver_type.h;Middlewares\ST\STM32_ExtMem_Manager\sdcard\stm32_sdcard_driver_api.h;Middlewares\ST\STM32_ExtMem_Manager\sdcard\stm32_sdcard_driver_type.h;Middlewares\ST\STM32_ExtMem_Manager\user\stm32_user_driver_api.h;Middlewares\ST\STM32_ExtMem_Manager\user\stm32_user_driver_type.h;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_bsec.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_rcc.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_rcc_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_gpio.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_dma.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_dma_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_pwr.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_pwr_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_cortex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_exti.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_xspi.c;Middlewares\ST\STM32_ExtMem_Manager\stm32_extmem.c;Middlewares\ST\STM32_ExtMem_Manager\stm32_extmem_type.h;Middlewares\ST\STM32_ExtMem_Manager\boot\stm32_boot_xip.c;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_xspi.c;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_sd.c;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_data.c;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_driver.c;Middlewares\ST\STM32_ExtMem_Manager\psram\stm32_psram_driver.c;Middlewares\ST\STM32_ExtMem_Manager\sdcard\stm32_sdcard_driver.c;Middlewares\ST\STM32_ExtMem_Manager\user\stm32_user_driver.c;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_bsec.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_bsec.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_rcc.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_rcc_ex.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_bus.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_rcc.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_system.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_utils.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_gpio.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_gpio_ex.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_gpio.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_dma.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_dma_ex.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_dma.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_pwr.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_pwr_ex.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_pwr.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_cortex.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_cortex.h;Drivers\CMSIS\Device\ST\STM32N6xx\Include\partition_stm32n6xx.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_def.h;Drivers\STM32N6xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_exti.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_exti.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_xspi.h;Middlewares\ST\STM32_ExtMem_Manager\stm32_extmem.h;Middlewares\ST\STM32_ExtMem_Manager\boot\stm32_boot_xip.h;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_xspi_type.h;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_xspi_api.h;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_sd_type.h;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_sd_api.h;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_data.h;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_driver_api.h;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_driver_type.h;Middlewares\ST\STM32_ExtMem_Manager\psram\stm32_psram_driver_api.h;Middlewares\ST\STM32_ExtMem_Manager\psram\stm32_psram_driver_type.h;Middlewares\ST\STM32_ExtMem_Manager\sdcard\stm32_sdcard_driver_api.h;Middlewares\ST\STM32_ExtMem_Manager\sdcard\stm32_sdcard_driver_type.h;Middlewares\ST\STM32_ExtMem_Manager\user\stm32_user_driver_api.h;Middlewares\ST\STM32_ExtMem_Manager\user\stm32_user_driver_type.h;Drivers\CMSIS\Device\ST\STM32N6xx\Include\stm32n657xx.h;Drivers\CMSIS\Device\ST\STM32N6xx\Include\stm32n6xx.h;Drivers\CMSIS\Device\ST\STM32N6xx\Include\system_stm32n6xx.h;Drivers\CMSIS\Device\ST\STM32N6xx\Source\Templates\system_stm32n6xx.c;Drivers\CMSIS\Include\cmsis_armclang.h;Drivers\CMSIS\Include\cmsis_clang.h;Drivers\CMSIS\Include\cmsis_compiler.h;Drivers\CMSIS\Include\cmsis_gcc.h;Drivers\CMSIS\Include\cmsis_iccarm.h;Drivers\CMSIS\Include\cmsis_version.h;Drivers\CMSIS\Include\core_cm0.h;Drivers\CMSIS\Include\core_cm0plus.h;Drivers\CMSIS\Include\core_cm1.h;Drivers\CMSIS\Include\core_cm23.h;Drivers\CMSIS\Include\core_cm3.h;Drivers\CMSIS\Include\core_cm33.h;Drivers\CMSIS\Include\core_cm35p.h;Drivers\CMSIS\Include\core_cm4.h;Drivers\CMSIS\Include\core_cm52.h;Drivers\CMSIS\Include\core_cm55.h;Drivers\CMSIS\Include\core_cm7.h;Drivers\CMSIS\Include\core_cm85.h;Drivers\CMSIS\Include\core_sc000.h;Drivers\CMSIS\Include\core_sc300.h;Drivers\CMSIS\Include\core_starmc1.h;Drivers\CMSIS\Include\tz_context.h; +LibFiles=Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_bsec.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_bsec.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_rcc.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_rcc_ex.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_bus.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_rcc.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_system.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_utils.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_gpio.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_gpio_ex.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_gpio.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_dma.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_dma_ex.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_dma.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_pwr.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_pwr_ex.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_pwr.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_cortex.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_cortex.h;Drivers\CMSIS\Device\ST\STM32N6xx\Include\partition_stm32n6xx.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_def.h;Drivers\STM32N6xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_exti.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_exti.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_ramcfg.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_xspi.h;Middlewares\ST\STM32_ExtMem_Manager\stm32_extmem.h;Middlewares\ST\STM32_ExtMem_Manager\boot\stm32_boot_xip.h;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_xspi_type.h;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_xspi_api.h;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_sd_type.h;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_sd_api.h;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_data.h;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_driver_api.h;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_driver_type.h;Middlewares\ST\STM32_ExtMem_Manager\psram\stm32_psram_driver_api.h;Middlewares\ST\STM32_ExtMem_Manager\psram\stm32_psram_driver_type.h;Middlewares\ST\STM32_ExtMem_Manager\sdcard\stm32_sdcard_driver_api.h;Middlewares\ST\STM32_ExtMem_Manager\sdcard\stm32_sdcard_driver_type.h;Middlewares\ST\STM32_ExtMem_Manager\user\stm32_user_driver_api.h;Middlewares\ST\STM32_ExtMem_Manager\user\stm32_user_driver_type.h;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_bsec.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_rcc.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_rcc_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_gpio.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_dma.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_dma_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_pwr.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_pwr_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_cortex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_exti.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_ramcfg.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_xspi.c;Middlewares\ST\STM32_ExtMem_Manager\stm32_extmem.c;Middlewares\ST\STM32_ExtMem_Manager\stm32_extmem_type.h;Middlewares\ST\STM32_ExtMem_Manager\boot\stm32_boot_xip.c;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_xspi.c;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_sd.c;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_data.c;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_driver.c;Middlewares\ST\STM32_ExtMem_Manager\psram\stm32_psram_driver.c;Middlewares\ST\STM32_ExtMem_Manager\sdcard\stm32_sdcard_driver.c;Middlewares\ST\STM32_ExtMem_Manager\user\stm32_user_driver.c;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_bsec.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_bsec.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_rcc.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_rcc_ex.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_bus.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_rcc.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_system.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_utils.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_gpio.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_gpio_ex.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_gpio.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_dma.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_dma_ex.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_dma.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_pwr.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_pwr_ex.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_pwr.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_cortex.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_cortex.h;Drivers\CMSIS\Device\ST\STM32N6xx\Include\partition_stm32n6xx.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_def.h;Drivers\STM32N6xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_exti.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_exti.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_ramcfg.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_xspi.h;Middlewares\ST\STM32_ExtMem_Manager\stm32_extmem.h;Middlewares\ST\STM32_ExtMem_Manager\boot\stm32_boot_xip.h;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_xspi_type.h;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_xspi_api.h;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_sd_type.h;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_sd_api.h;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_data.h;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_driver_api.h;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_driver_type.h;Middlewares\ST\STM32_ExtMem_Manager\psram\stm32_psram_driver_api.h;Middlewares\ST\STM32_ExtMem_Manager\psram\stm32_psram_driver_type.h;Middlewares\ST\STM32_ExtMem_Manager\sdcard\stm32_sdcard_driver_api.h;Middlewares\ST\STM32_ExtMem_Manager\sdcard\stm32_sdcard_driver_type.h;Middlewares\ST\STM32_ExtMem_Manager\user\stm32_user_driver_api.h;Middlewares\ST\STM32_ExtMem_Manager\user\stm32_user_driver_type.h;Drivers\CMSIS\Device\ST\STM32N6xx\Include\stm32n657xx.h;Drivers\CMSIS\Device\ST\STM32N6xx\Include\stm32n6xx.h;Drivers\CMSIS\Device\ST\STM32N6xx\Include\system_stm32n6xx.h;Drivers\CMSIS\Device\ST\STM32N6xx\Source\Templates\system_stm32n6xx.c;Drivers\CMSIS\Include\cmsis_armclang.h;Drivers\CMSIS\Include\cmsis_clang.h;Drivers\CMSIS\Include\cmsis_compiler.h;Drivers\CMSIS\Include\cmsis_gcc.h;Drivers\CMSIS\Include\cmsis_iccarm.h;Drivers\CMSIS\Include\cmsis_version.h;Drivers\CMSIS\Include\core_cm0.h;Drivers\CMSIS\Include\core_cm0plus.h;Drivers\CMSIS\Include\core_cm1.h;Drivers\CMSIS\Include\core_cm23.h;Drivers\CMSIS\Include\core_cm3.h;Drivers\CMSIS\Include\core_cm33.h;Drivers\CMSIS\Include\core_cm35p.h;Drivers\CMSIS\Include\core_cm4.h;Drivers\CMSIS\Include\core_cm52.h;Drivers\CMSIS\Include\core_cm55.h;Drivers\CMSIS\Include\core_cm7.h;Drivers\CMSIS\Include\core_cm85.h;Drivers\CMSIS\Include\core_sc000.h;Drivers\CMSIS\Include\core_sc300.h;Drivers\CMSIS\Include\core_starmc1.h;Drivers\CMSIS\Include\tz_context.h; [FSBL:PreviousUsedMakefileFiles] @@ -30,5 +30,5 @@ [PreviousLibFiles] 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xx_HAL_Driver\Inc\stm32n6xx_hal_exti.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_ll_exti.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_ramcfg.h;Drivers\STM32N6xx_HAL_Driver\Inc\stm32n6xx_hal_xspi.h;Middlewares\ST\STM32_ExtMem_Manager\stm32_extmem.h;Middlewares\ST\STM32_ExtMem_Manager\boot\stm32_boot_xip.h;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_xspi_type.h;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_xspi_api.h;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_sd_type.h;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_sd_api.h;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_data.h;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_driver_api.h;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_driver_type.h;Middlewares\ST\STM32_ExtMem_Manager\psram\stm32_psram_driver_api.h;Middlewares\ST\STM32_ExtMem_Manager\psram\stm32_psram_driver_type.h;Middlewares\ST\STM32_ExtMem_Manager\sdcard\stm32_sdcard_driver_api.h;Middlewares\ST\STM32_ExtMem_Manager\sdcard\stm32_sdcard_driver_type.h;Middlewares\ST\STM32_ExtMem_Manager\user\stm32_user_driver_api.h;Middlewares\ST\STM32_ExtMem_Manager\user\stm32_user_driver_type.h;Drivers\CMSIS\Device\ST\STM32N6xx\Include\stm32n657xx.h;Drivers\CMSIS\Device\ST\STM32N6xx\Include\stm32n6xx.h;Drivers\CMSIS\Device\ST\STM32N6xx\Include\system_stm32n6xx.h;Drivers\CMSIS\Device\ST\STM32N6xx\Include\system_stm32n6xx.h;Drivers\CMSIS\Device\ST\STM32N6xx\Source\Templates\system_stm32n6xx_s.c;Drivers\CMSIS\Device\ST\STM32N6xx\Source\Templates\system_stm32n6xx_s.c;Drivers\CMSIS\Device\ST\STM32N6xx\Source\Templates\system_stm32n6xx_s.c;Drivers\CMSIS\Include\cmsis_armclang.h;Drivers\CMSIS\Include\cmsis_clang.h;Drivers\CMSIS\Include\cmsis_compiler.h;Drivers\CMSIS\Include\cmsis_gcc.h;Drivers\CMSIS\Include\cmsis_iccarm.h;Drivers\CMSIS\Include\cmsis_version.h;Drivers\CMSIS\Include\core_cm0.h;Drivers\CMSIS\Include\core_cm0plus.h;Drivers\CMSIS\Include\core_cm1.h;Drivers\CMSIS\Include\core_cm23.h;Drivers\CMSIS\Include\core_cm3.h;Drivers\CMSIS\Include\core_cm33.h;Drivers\CMSIS\Include\core_cm35p.h;Drivers\CMSIS\Include\core_cm4.h;Drivers\CMSIS\Include\core_cm52.h;Drivers\CMSIS\Include\core_cm55.h;Drivers\CMSIS\Include\core_cm7.h;Drivers\CMSIS\Include\core_cm85.h;Drivers\CMSIS\Include\core_sc000.h;Drivers\CMSIS\Include\core_sc300.h;Drivers\CMSIS\Include\core_starmc1.h;Drivers\CMSIS\Include\tz_context.h;Drivers\CMSIS\Include\m-profile\armv7m_cachel1.h;Drivers\CMSIS\Include\m-profile\armv7m_mpu.h;Drivers\CMSIS\Include\m-profile\armv81m_pac.h;Drivers\CMSIS\Include\m-profile\armv8m_mpu.h;Drivers\CMSIS\Include\m-profile\armv8m_pmu.h;Drivers\CMSIS\Include\m-profile\cmsis_armclang_m.h;Drivers\CMSIS\Include\m-profile\cmsis_clang_m.h;Drivers\CMSIS\Include\m-profile\cmsis_gcc_m.h;Drivers\CMSIS\Include\m-profile\cmsis_iccarm_m.h;Drivers\CMSIS\Include\m-profile\cmsis_tiarmclang_m.h;Drivers\CMSIS\Include\r-profile\cmsis_armclang_r.h;Drivers\CMSIS\Include\r-profile\cmsis_clang_r.h;Drivers\CMSIS\Include\r-profile\cmsis_gcc_r.h;Drivers\CMSIS\Include\r-profile\cmsis_iccarm_r.h; [PreviousUsedMakefileFiles] @@ -38,5 +38,5 @@ [FSBL:PreviousUsedCubeIDEFiles] -SourceFiles=FSBL\Src\main.c;FSBL\Src\gpio.c;FSBL\Src\bsec.c;FSBL\Src\extmem_manager.c;FSBL\Src\xspi.c;FSBL\Src\stm32n6xx_it.c;FSBL\Src\stm32n6xx_hal_msp.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_bsec.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_rcc.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_rcc_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_gpio.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_dma.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_dma_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_pwr.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_pwr_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_cortex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_exti.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_xspi.c;Middlewares\ST\STM32_ExtMem_Manager\stm32_extmem.c;Middlewares\ST\STM32_ExtMem_Manager\boot\stm32_boot_xip.c;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_xspi.c;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_sd.c;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_data.c;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_driver.c;Middlewares\ST\STM32_ExtMem_Manager\psram\stm32_psram_driver.c;Middlewares\ST\STM32_ExtMem_Manager\sdcard\stm32_sdcard_driver.c;Middlewares\ST\STM32_ExtMem_Manager\user\stm32_user_driver.c;Drivers\CMSIS\Device\ST\STM32N6xx\Source\Templates\system_stm32n6xx.c;;; +SourceFiles=FSBL\Src\main.c;FSBL\Src\gpio.c;FSBL\Src\bsec.c;FSBL\Src\extmem_manager.c;FSBL\Src\ramcfg.c;FSBL\Src\xspi.c;FSBL\Src\stm32n6xx_it.c;FSBL\Src\stm32n6xx_hal_msp.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_bsec.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_rcc.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_rcc_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_gpio.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_dma.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_dma_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_pwr.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_pwr_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_cortex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_exti.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_ramcfg.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_xspi.c;Middlewares\ST\STM32_ExtMem_Manager\stm32_extmem.c;Middlewares\ST\STM32_ExtMem_Manager\boot\stm32_boot_xip.c;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_xspi.c;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_sd.c;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_data.c;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_driver.c;Middlewares\ST\STM32_ExtMem_Manager\psram\stm32_psram_driver.c;Middlewares\ST\STM32_ExtMem_Manager\sdcard\stm32_sdcard_driver.c;Middlewares\ST\STM32_ExtMem_Manager\user\stm32_user_driver.c;Drivers\CMSIS\Device\ST\STM32N6xx\Source\Templates\system_stm32n6xx.c;;; HeaderPath=Drivers\STM32N6xx_HAL_Driver\Inc;Drivers\CMSIS\Device\ST\STM32N6xx\Include;Drivers\STM32N6xx_HAL_Driver\Inc\Legacy;Middlewares\ST\STM32_ExtMem_Manager;Middlewares\ST\STM32_ExtMem_Manager\boot;Middlewares\ST\STM32_ExtMem_Manager\sal;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp;Middlewares\ST\STM32_ExtMem_Manager\psram;Middlewares\ST\STM32_ExtMem_Manager\sdcard;Middlewares\ST\STM32_ExtMem_Manager\user;Drivers\CMSIS\Include;FSBL\Inc;Drivers\STM32N6xx_HAL_Driver\Inc;Drivers\CMSIS\Device\ST\STM32N6xx\Include;Drivers\STM32N6xx_HAL_Driver\Inc\Legacy;Middlewares\ST\STM32_ExtMem_Manager;Middlewares\ST\STM32_ExtMem_Manager\boot;Middlewares\ST\STM32_ExtMem_Manager\sal;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp;Middlewares\ST\STM32_ExtMem_Manager\psram;Middlewares\ST\STM32_ExtMem_Manager\sdcard;Middlewares\ST\STM32_ExtMem_Manager\user;Drivers\CMSIS\Include; CDefines=USE_HAL_DRIVER;STM32N657xx;USE_HAL_DRIVER;USE_HAL_DRIVER;USE_HAL_DRIVER; @@ -53,5 +53,5 @@ [PreviousUsedCubeIDEFiles] -SourceFiles=FSBL\Src\main.c;FSBL\Src\gpio.c;FSBL\Src\bsec.c;FSBL\Src\extmem_manager.c;FSBL\Src\xspi.c;FSBL\Src\stm32n6xx_it.c;FSBL\Src\stm32n6xx_hal_msp.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_bsec.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_rcc.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_rcc_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_gpio.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_dma.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_dma_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_pwr.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_pwr_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_cortex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_exti.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_xspi.c;Middlewares\ST\STM32_ExtMem_Manager\stm32_extmem.c;Middlewares\ST\STM32_ExtMem_Manager\boot\stm32_boot_xip.c;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_xspi.c;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_sd.c;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_data.c;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_driver.c;Middlewares\ST\STM32_ExtMem_Manager\psram\stm32_psram_driver.c;Middlewares\ST\STM32_ExtMem_Manager\sdcard\stm32_sdcard_driver.c;Middlewares\ST\STM32_ExtMem_Manager\user\stm32_user_driver.c;Drivers\CMSIS\Device\ST\STM32N6xx\Source\Templates\system_stm32n6xx_s.c;Src\;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_bsec.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_rcc.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_rcc_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_gpio.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_dma.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_dma_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_pwr.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_pwr_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_cortex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_exti.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_xspi.c;Middlewares\ST\STM32_ExtMem_Manager\stm32_extmem.c;Middlewares\ST\STM32_ExtMem_Manager\boot\stm32_boot_xip.c;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_xspi.c;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_sd.c;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_data.c;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_driver.c;Middlewares\ST\STM32_ExtMem_Manager\psram\stm32_psram_driver.c;Middlewares\ST\STM32_ExtMem_Manager\sdcard\stm32_sdcard_driver.c;Middlewares\ST\STM32_ExtMem_Manager\user\stm32_user_driver.c;Drivers\CMSIS\Device\ST\STM32N6xx\Source\Templates\system_stm32n6xx_s.c;Src\;Drivers\CMSIS\Device\ST\STM32N6xx\Source\Templates\system_stm32n6xx.c;FSBL\Src\system_stm32n6xx_fsbl.c;Appli\Src\;ExtMemLoader\Src\system_stm32n6xx_fsbl.c;;; +SourceFiles=FSBL\Src\main.c;FSBL\Src\gpio.c;FSBL\Src\bsec.c;FSBL\Src\extmem_manager.c;FSBL\Src\ramcfg.c;FSBL\Src\xspi.c;FSBL\Src\stm32n6xx_it.c;FSBL\Src\stm32n6xx_hal_msp.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_bsec.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_rcc.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_rcc_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_gpio.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_dma.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_dma_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_pwr.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_pwr_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_cortex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_exti.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_ramcfg.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_xspi.c;Middlewares\ST\STM32_ExtMem_Manager\stm32_extmem.c;Middlewares\ST\STM32_ExtMem_Manager\boot\stm32_boot_xip.c;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_xspi.c;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_sd.c;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_data.c;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_driver.c;Middlewares\ST\STM32_ExtMem_Manager\psram\stm32_psram_driver.c;Middlewares\ST\STM32_ExtMem_Manager\sdcard\stm32_sdcard_driver.c;Middlewares\ST\STM32_ExtMem_Manager\user\stm32_user_driver.c;Drivers\CMSIS\Device\ST\STM32N6xx\Source\Templates\system_stm32n6xx_s.c;Src\;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_bsec.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_rcc.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_rcc_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_gpio.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_dma.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_dma_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_pwr.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_pwr_ex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_cortex.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_exti.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_ramcfg.c;Drivers\STM32N6xx_HAL_Driver\Src\stm32n6xx_hal_xspi.c;Middlewares\ST\STM32_ExtMem_Manager\stm32_extmem.c;Middlewares\ST\STM32_ExtMem_Manager\boot\stm32_boot_xip.c;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_xspi.c;Middlewares\ST\STM32_ExtMem_Manager\sal\stm32_sal_sd.c;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_data.c;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp\stm32_sfdp_driver.c;Middlewares\ST\STM32_ExtMem_Manager\psram\stm32_psram_driver.c;Middlewares\ST\STM32_ExtMem_Manager\sdcard\stm32_sdcard_driver.c;Middlewares\ST\STM32_ExtMem_Manager\user\stm32_user_driver.c;Drivers\CMSIS\Device\ST\STM32N6xx\Source\Templates\system_stm32n6xx_s.c;Src\;Drivers\CMSIS\Device\ST\STM32N6xx\Source\Templates\system_stm32n6xx.c;FSBL\Src\system_stm32n6xx_fsbl.c;Appli\Src\;ExtMemLoader\Src\system_stm32n6xx_fsbl.c;;; HeaderPath=Drivers\STM32N6xx_HAL_Driver\Inc;Drivers\CMSIS\Device\ST\STM32N6xx\Include;Drivers\STM32N6xx_HAL_Driver\Inc\Legacy;Middlewares\ST\STM32_ExtMem_Manager;Middlewares\ST\STM32_ExtMem_Manager\boot;Middlewares\ST\STM32_ExtMem_Manager\sal;Middlewares\ST\STM32_ExtMem_Manager\nor_sfdp;Middlewares\ST\STM32_ExtMem_Manager\psram;Middlewares\ST\STM32_ExtMem_Manager\sdcard;Middlewares\ST\STM32_ExtMem_Manager\user;Drivers\CMSIS\Include;Drivers\CMSIS\Include\m-profile;Drivers\CMSIS\Include\r-profile;FSBL\Inc; CDefines=USE_HAL_DRIVER;STM32N657xx;USE_HAL_DRIVER;USE_HAL_DRIVER;USE_HAL_DRIVER;USE_HAL_DRIVER;STM32N657xx;USE_HAL_DRIVER;USE_HAL_DRIVER;USE_HAL_DRIVER;USE_HAL_DRIVER;STM32N657xx;USE_HAL_DRIVER;USE_HAL_DRIVER;USE_HAL_DRIVER;USE_HAL_DRIVER; @@ -59,6 +59,6 @@ [PreviousGenFiles] HeaderPath=..\FSBL\Inc -HeaderFiles=gpio.h;bsec.h;extmem_manager.h;stm32_extmem_conf.h;xspi.h;stm32n6xx_it.h;stm32n6xx_hal_conf.h;main.h; +HeaderFiles=gpio.h;bsec.h;extmem_manager.h;stm32_extmem_conf.h;ramcfg.h;xspi.h;stm32n6xx_it.h;stm32n6xx_hal_conf.h;main.h; SourcePath=..\FSBL\Src -SourceFiles=gpio.c;bsec.c;extmem_manager.c;xspi.c;stm32n6xx_it.c;stm32n6xx_hal_msp.c;main.c; +SourceFiles=gpio.c;bsec.c;extmem_manager.c;ramcfg.c;xspi.c;stm32n6xx_it.c;stm32n6xx_hal_msp.c;main.c; Index: trunk/firmware/FSBL/CubeMX/Drivers/STM32N6xx_HAL_Driver/Inc/stm32n6xx_hal_ramcfg.h =================================================================== --- trunk/firmware/FSBL/CubeMX/Drivers/STM32N6xx_HAL_Driver/Inc/stm32n6xx_hal_ramcfg.h (revision 27) +++ trunk/firmware/FSBL/CubeMX/Drivers/STM32N6xx_HAL_Driver/Inc/stm32n6xx_hal_ramcfg.h (revision 27) @@ -0,0 +1,396 @@ +/** + ****************************************************************************** + * @file stm32n6xx_hal_ramcfg.h + * @author MCD Application Team + * @brief Header file of RAMCFG HAL module. + ****************************************************************************** + * @attention + * + * Copyright (c) 2023 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef STM32N6xx_HAL_RAMCFG_H +#define STM32N6xx_HAL_RAMCFG_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32n6xx_hal_def.h" + +/** @addtogroup STM32N6xx_HAL_Driver + * @{ + */ + +/** @addtogroup RAMCFG + * @{ + */ + + +/* Exported types ------------------------------------------------------------*/ + +/** @defgroup RAMCFG_Exported_Types RAMCFG Exported Types + * @brief RAMCFG Exported Types + * @{ + */ + +/** + * @brief HAL RAMCFG State Enumeration Definition + */ +typedef enum +{ + HAL_RAMCFG_STATE_RESET = 0x00U, /*!< RAMCFG not yet initialized or disabled */ + HAL_RAMCFG_STATE_READY = 0x01U, /*!< RAMCFG initialized and ready for use */ + HAL_RAMCFG_STATE_BUSY = 0x02U, /*!< RAMCFG process is ongoing */ + HAL_RAMCFG_STATE_ERROR = 0x03U, /*!< RAMCFG error state */ +} HAL_RAMCFG_StateTypeDef; + +#if (USE_HAL_RAMCFG_REGISTER_CALLBACKS == 1) +/** + * @brief HAL RAMCFG Callbacks IDs Enumeration Definition + */ +typedef enum +{ + HAL_RAMCFG_MSPINIT_CB_ID = 0x00U, /*!< RAMCFG MSP Init Callback ID */ + HAL_RAMCFG_MSPDEINIT_CB_ID = 0x01U, /*!< RAMCFG MSP DeInit Callback ID */ + HAL_RAMCFG_SE_DETECT_CB_ID = 0x02U, /*!< RAMCFG Single Error Detect Callback ID */ + HAL_RAMCFG_DE_DETECT_CB_ID = 0x03U, /*!< RAMCFG Double Error Detect Callback ID */ + HAL_RAMCFG_ALL_CB_ID = 0x04U, /*!< RAMCFG All callback ID */ +} HAL_RAMCFG_CallbackIDTypeDef; +#endif /* USE_HAL_RAMCFG_REGISTER_CALLBACKS */ + +/** + * @brief RAMCFG Handle Structure Definition + */ +#if (USE_HAL_RAMCFG_REGISTER_CALLBACKS == 1) +typedef struct __RAMCFG_HandleTypeDef +#else +typedef struct +#endif /* (USE_HAL_RAMCFG_REGISTER_CALLBACKS) */ +{ + RAMCFG_TypeDef *Instance; /*!< RAMCFG Register Base Address */ + __IO HAL_RAMCFG_StateTypeDef State; /*!< RAMCFG State */ + __IO uint32_t ErrorCode; /*!< RAMCFG Error Code */ +#if (USE_HAL_RAMCFG_REGISTER_CALLBACKS == 1) + void (* MspInitCallback)(struct __RAMCFG_HandleTypeDef *hramcfg); /*!< RAMCFG MSP Init Callback */ + void (* MspDeInitCallback)(struct __RAMCFG_HandleTypeDef *hramcfg); /*!< RAMCFG MSP DeInit Callback */ + void (* DetectSingleErrorCallback)(struct __RAMCFG_HandleTypeDef *hramcfg);/*!< RAMCFG Single Error Detect Callback */ + void (* DetectDoubleErrorCallback)(struct __RAMCFG_HandleTypeDef *hramcfg);/*!< RAMCFG Double Error Detect Callback */ +#endif /* USE_HAL_RAMCFG_REGISTER_CALLBACKS */ +} RAMCFG_HandleTypeDef; + +/** + * @} + */ + + +/* Exported constants --------------------------------------------------------*/ + +/** @defgroup RAMCFG_Exported_Constants RAMCFG Exported Constants + * @brief RAMCFG Exported Constants + * @{ + */ + +/** @defgroup RAMCFG_Error_Codes RAMCFG Error Codes + * @brief RAMCFG Error Codes + * @{ + */ +#define HAL_RAMCFG_ERROR_NONE 0x00000000U /*!< RAMCFG No Error */ +#define HAL_RAMCFG_ERROR_TIMEOUT 0x00000001U /*!< RAMCFG Timeout Error */ +#define HAL_RAMCFG_ERROR_BUSY 0x00000002U /*!< RAMCFG Busy Error */ +#if (USE_HAL_RAMCFG_REGISTER_CALLBACKS == 1) +#define HAL_RAMCFG_ERROR_INVALID_CALLBACK 0x00000003U /*!< Invalid Callback error */ +#endif /* USE_HAL_RAMCFG_REGISTER_CALLBACKS */ +/** + * @} + */ + +/** @defgroup RAMCFG_Interrupt RAMCFG Interrupts + * @brief RAMCFG Interrupts + * @{ + */ +#define RAMCFG_IT_SINGLEERR RAMCFG_IER_SEIE /*!< RAMCFG Single Error Interrupt */ +#define RAMCFG_IT_DOUBLEERR RAMCFG_IER_DEIE /*!< RAMCFG Double Error Interrupt */ +#define RAMCFG_IT_ALL \ + (RAMCFG_IER_SEIE | RAMCFG_IER_DEIE) /*!Instance->IER |= (__INTERRUPT__)) + +/** + * @brief Disable the specified RAMCFG interrupts. + * @note This macros is used only to disable RAMCFG_IT_SINGLEERR and RAMCFG_IT_DOUBLEERR + * interrupts. RAMCFG_IT_NMIERR interrupt can only be disabled by global peripheral reset or system reset. + * @param __HANDLE__ : Specifies RAMCFG handle. + * @param __INTERRUPT__: Specifies the RAMCFG interrupt sources to be disabled. + * This parameter can be one of the following values: + * @arg RAMCFG_IT_SINGLEERR : Single Error Interrupt Mask. + * @arg RAMCFG_IT_DOUBLEERR : Double Error Interrupt Mask. + * @retval None + */ +#define __HAL_RAMCFG_DISABLE_IT(__HANDLE__, __INTERRUPT__) \ + ((__HANDLE__)->Instance->IER &= ~(__INTERRUPT__)) + +/** + * @brief Check whether the specified RAMCFG interrupt source is enabled or not. + * @param __HANDLE__ : Specifies the RAMCFG Handle. + * @param __INTERRUPT__ : Specifies the RAMCFG interrupt source to check. + * This parameter can be one of the following values: + * @arg RAMCFG_IT_SINGLEERR : Single Error Interrupt Mask. + * @arg RAMCFG_IT_DOUBLEERR : Double Error Interrupt Mask. + * @arg RAMCFG_IT_NMIERR : Double Error Interrupt Redirection to NMI Mask. + * @retval The new state of __INTERRUPT__ (SET or RESET). + */ +#define __HAL_RAMCFG_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) \ + ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? 1U : 0U) + +/** + * @brief Get the RAMCFG pending flags. + * @param __HANDLE__ : Specifies RAMCFG handle. + * @param __FLAG__ : Specifies the flag to be checked. + * This parameter can be one of the following values: + * @arg RAMCFG_FLAG_SINGLEERR : Single Error Detected and Corrected Flag. + * @arg RAMCFG_FLAG_DOUBLEERR : Double Error Detected Flag. + * @arg RAMCFG_FLAG_SRAMBUSY : SRAM Busy Flag. + * @retval The state of FLAG (SET or RESET). + */ +#define __HAL_RAMCFG_GET_FLAG(__HANDLE__, __FLAG__) \ + (READ_BIT((__HANDLE__)->Instance->ISR, (__FLAG__)) == (__FLAG__)) + +/** + * @brief Clear the RAMCFG pending flags. + * @param __HANDLE__ : Specifies RAMCFG handle. + * @param __FLAG__ : Specifies the flag to be cleared. + * This parameter can be any combination of the following values: + * @arg RAMCFG_FLAG_SINGLEERR : Single Error Detected and Corrected Flag. + * @arg RAMCFG_FLAG_DOUBLEERR : Double Error Detected Flag. + * @retval None. + */ +#define __HAL_RAMCFG_CLEAR_FLAG(__HANDLE__, __FLAG__) \ + ((__HANDLE__)->Instance->ICR |= (__FLAG__)) + +/** @brief Reset the RAMCFG handle state. + * @param __HANDLE__ : Specifies the RAMCFG Handle. + * @retval None. + */ +#if (USE_HAL_RAMCFG_REGISTER_CALLBACKS == 1) +#define __HAL_RAMCFG_RESET_HANDLE_STATE(__HANDLE__) \ + do{\ + (__HANDLE__)->State = HAL_RAMCFG_STATE_RESET; \ + (__HANDLE__)->MspInitCallback = NULL; \ + (__HANDLE__)->MspDeInitCallback = NULL; \ + }while(0) +#else +#define __HAL_RAMCFG_RESET_HANDLE_STATE(__HANDLE__) \ + do{\ + (__HANDLE__)->State = HAL_RAMCFG_STATE_RESET; \ + }while(0) +#endif /* USE_HAL_RAMCFG_REGISTER_CALLBACKS */ + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ + +/** @defgroup RAMCFG_Exported_Functions RAMCFG Exported Functions + * @brief RAMCFG Exported Functions + * @{ + */ + +/** @defgroup RAMCFG_Exported_Functions_Group1 Initialization and De-Initialization Functions + * @brief Initialization and De-Initialization Functions + * @{ + */ +HAL_StatusTypeDef HAL_RAMCFG_Init(RAMCFG_HandleTypeDef *hramcfg); +HAL_StatusTypeDef HAL_RAMCFG_DeInit(RAMCFG_HandleTypeDef *hramcfg); +void HAL_RAMCFG_MspInit(RAMCFG_HandleTypeDef *hramcfg); +void HAL_RAMCFG_MspDeInit(RAMCFG_HandleTypeDef *hramcfg); +/** + * @} + */ + +/** @defgroup RAMCFG_Exported_Functions_Group2 ECC Operation Functions + * @brief ECC Operation Functions + * @{ + */ +HAL_StatusTypeDef HAL_RAMCFG_StartECC(RAMCFG_HandleTypeDef *hramcfg); +HAL_StatusTypeDef HAL_RAMCFG_StopECC(RAMCFG_HandleTypeDef *hramcfg); +HAL_StatusTypeDef HAL_RAMCFG_EnableNotification(RAMCFG_HandleTypeDef *hramcfg, uint32_t Notifications); +HAL_StatusTypeDef HAL_RAMCFG_DisableNotification(RAMCFG_HandleTypeDef *hramcfg, uint32_t Notifications); +uint32_t HAL_RAMCFG_IsECCSingleErrorDetected(const RAMCFG_HandleTypeDef *hramcfg); +uint32_t HAL_RAMCFG_IsECCDoubleErrorDetected(const RAMCFG_HandleTypeDef *hramcfg); +uint32_t HAL_RAMCFG_GetSingleErrorAddress(const RAMCFG_HandleTypeDef *hramcfg); +uint32_t HAL_RAMCFG_GetDoubleErrorAddress(const RAMCFG_HandleTypeDef *hramcfg); +/** + * @} + */ + +/** @defgroup RAMCFG_Exported_Functions_Group5 Erase Operation Functions + * @brief Erase Operation Functions + * @{ + */ +HAL_StatusTypeDef HAL_RAMCFG_Erase(RAMCFG_HandleTypeDef *hramcfg); +/** + * @} + */ + +/** @defgroup RAMCFG_Exported_Functions_Group6 Handle Interrupt and Callbacks Functions + * @brief Handle Interrupt and Callbacks Functions + * @{ + */ +void HAL_RAMCFG_IRQHandler(RAMCFG_HandleTypeDef *hramcfg); +void HAL_RAMCFG_DetectSingleErrorCallback(RAMCFG_HandleTypeDef *hramcfg); +void HAL_RAMCFG_DetectDoubleErrorCallback(RAMCFG_HandleTypeDef *hramcfg); +#if (USE_HAL_RAMCFG_REGISTER_CALLBACKS == 1) +HAL_StatusTypeDef HAL_RAMCFG_RegisterCallback(RAMCFG_HandleTypeDef *hramcfg, + HAL_RAMCFG_CallbackIDTypeDef CallbackID, + void (* pCallback)(RAMCFG_HandleTypeDef *_hramcfg)); +HAL_StatusTypeDef HAL_RAMCFG_UnRegisterCallback(RAMCFG_HandleTypeDef *hramcfg, HAL_RAMCFG_CallbackIDTypeDef CallbackID); +#endif /* USE_HAL_RAMCFG_REGISTER_CALLBACKS */ +/** + * @} + */ + +/** @defgroup RAMCFG_Exported_Functions_Group7 State and Error Functions + * @brief State and Error Functions + * @{ + */ +uint32_t HAL_RAMCFG_GetError(const RAMCFG_HandleTypeDef *hramcfg); +HAL_RAMCFG_StateTypeDef HAL_RAMCFG_GetState(const RAMCFG_HandleTypeDef *hramcfg); +/** + * @} + */ + + +/** @defgroup RAMCFG_Exported_Functions_Group9 AXISRAM Powerdown Functions + * @brief AXISRAM Powerdown Functions + * @{ + */ +void HAL_RAMCFG_EnableAXISRAM(const RAMCFG_HandleTypeDef *hramcfg); +void HAL_RAMCFG_DisableAXISRAM(const RAMCFG_HandleTypeDef *hramcfg); +/** + * @} + */ + +/** + * @} + */ + + +/* Private Constants ---------------------------------------------------------*/ + +/** @defgroup RAMCFG_Private_Constants RAMCFG Private Defines and Constants + * @brief RAMCFG Private Defines and Constants + * @{ + */ +/** + * @} + */ + + +/* Private macros ------------------------------------------------------------*/ + +/** @defgroup RAMCFG_Private_Macros RAMCFG Private Macros + * @brief RAMCFG Private Macros + * @{ + */ +#define IS_RAMCFG_INTERRUPT(INTERRUPT) \ + (((INTERRUPT) != 0U) && (((INTERRUPT) & ~(RAMCFG_IT_SINGLEERR | RAMCFG_IT_DOUBLEERR)) == 0U)) + + +/** + * @} + */ + + +/* Private functions ---------------------------------------------------------*/ + +/** @defgroup RAMCFG_Private_Functions RAMCFG Private Functions + * @brief RAMCFG Private Functions + * @{ + */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* STM32N6xx_HAL_RAMCFG_H */ Index: trunk/firmware/FSBL/CubeMX/Drivers/STM32N6xx_HAL_Driver/Src/stm32n6xx_hal_ramcfg.c =================================================================== --- trunk/firmware/FSBL/CubeMX/Drivers/STM32N6xx_HAL_Driver/Src/stm32n6xx_hal_ramcfg.c (revision 27) +++ trunk/firmware/FSBL/CubeMX/Drivers/STM32N6xx_HAL_Driver/Src/stm32n6xx_hal_ramcfg.c (revision 27) @@ -0,0 +1,1072 @@ +/** + ****************************************************************************** + * @file stm32n6xx_hal_ramcfg.c + * @author GPM Application Team + * @brief RAMCFG HAL module driver. + * This file provides firmware functions to manage the following + * functionalities of the RAMs configuration controller peripheral: + * + RAMCFG Initialization and De-initialization Functions. + * + RAMCFG ECC Operation Functions. + * + RAMCFG Erase Operation Functions. + * + RAMCFG Handle Interrupt and Callbacks Functions. + * + RAMCFG State and Error Functions. + ****************************************************************************** + * @attention + * + * Copyright (c) 2023 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + @verbatim + ============================================================================== + ##### RAMCFG Peripheral features ##### + ============================================================================== + [..] + (+) Each SRAM is managed by a RAMCFG instance (AHBSRAM1/2, AXISRAM1 to 6, + BKPSRAM, FLEXRAM, and VENCRAM). + + (+) Each SRAM can be erased independently through its RAMCFG instance. + + (+) AXISRAM 1 to 6 are the main SRAMs. AHBSRAM1/2 are preferably for DMA-controlled + peripheral-to-memory data flow. + AXISRAM 2 to 6 can be shut down when the application is in Run mode. + + (+) FLEXMEM can be either allocated as Cortex-M55 TCM, or as system RAM + (FLEXRAM). + 80 Kbytes of the FLEXMEM are retained in Standby mode, either allocated as + extended ITCM (64 +16-Kbyte ECC), or allocated as FLEXRAM. + + (+) The BKPSRAM content is retained in low-power modes, even when VDD is off + in VBAT mode. On a tamper event detection, the BKPSRAM content is erased. + + (+) The VENCRAM implements hardware and software erases. + + (+) FLEXRAM and BKPRAM support ECC correction feature: + (++) Single error detection and correction with interrupt generation. + (++) Double error detection with interrupt generation. + (++) Status with failing address + ============================================================================== + ##### How to use this driver ##### + ============================================================================== + [..] + (#) Call HAL_RAMCFG_Init() to initialize the RAMCFG peripheral before using + any feature. Call HAL_RAMCFG_DeInit() to de-initialize the RAMCFG when + using this peripheral is no more needed or a hardware issue has occurred. + (+) HAL_RAMCFG_Init() and HAL_RAMCFG_DeInit() APIs do not change the + activation status of ECC feature. It is managed by + HAL_RAMCFG_StartECC(), HAL_RAMCFG_StopECC() or option bytes (When + available on the device). + + *** ECC feature *** + =================== + [..] + (+) Call HAL_RAMCFG_StartECC() and HAL_RAMCFG_StopECC() to enable and + disable ECC hardware mechanism. + (++) When ECC feature is previously enabled (case of option + byte activation), calling HAL_RAMCFG_StartECC() is + recommended to enable the ECC address latching feature. + + (+) Call HAL_RAMCFG_EnableNotification() and HAL_RAMCFG_DisableNotification() + to enable and disable ECC interrupts. Interrupts can be: + (++) Single error interrupt. + (++) Double error interrupt. + (++) Double error interrupt redirected to Non maskable + interrupt (NMI). + + (+) Call HAL_RAMCFG_GetSingleErrorAddress() to get the address of the + last fail RAM word detected (only for single error) and + call HAL_RAMCFG_GetDoubleErrorAddress() to get the address of the + last fail RAM word detected (only for double error). + + (+) Call HAL_RAMCFG_IsECCSingleErrorDetected() to check if an ECC single + error was detected. + Call HAL_RAMCFG_IsECCDoubleErrorDetected() to check if an ECC double + error was detected. + These APIs are used in silent mode (No ECC interrupt + is enabled). + + *** Erase feature *** + ===================== + [..] + (+) Call HAL_RAMCFG_Erase() to launch a hardware erase for the given + SRAM. + + (+) The erase value is equal to 0 when launching erase hardware through + RAMCFG. + + (+) SRAM2 write protected pages are erased when performing an erase + through RAMCFG. + + *** RAMCFG HAL driver macros list *** + ===================================== + [..] + Below the list of used macros in RAMCFG HAL driver. + + (+) __HAL_RAMCFG_ENABLE_IT : Enable the specified RAMCFG interrupts. + (+) __HAL_RAMCFG_DISABLE_IT : Disable the specified RAMCFG interrupts. + (+) __HAL_RAMCFG_GET_FLAG : Get the RAMCFG pending flags. + (+) __HAL_RAMCFG_CLEAR_FLAG : Clear the RAMCFG pending flags. + (+) __HAL_RAMCFG_GET_IT_SOURCE : Check whether the specified RAMCFG + interrupt source is enabled or not. + @endverbatim + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32n6xx_hal.h" + +/** @addtogroup STM32N6xx_HAL_Driver + * @{ + */ + +/** @defgroup RAMCFG RAMCFG + * @brief RAMCFG HAL module driver + * @{ + */ + +#ifdef HAL_RAMCFG_MODULE_ENABLED + +/* Private types -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/* Private constants ---------------------------------------------------------*/ + +/** @addtogroup RAMCFG_Private_Constants + * @{ + */ +#define RAMCFG_TIMEOUT_VALUE 50000U +/** + * @} + */ + +/* Private macros ------------------------------------------------------------*/ +/* Private functions ---------------------------------------------------------*/ +/* Exported functions --------------------------------------------------------*/ + +/** @addtogroup RAMCFG_Exported_Functions + * @{ + */ + +/** @addtogroup RAMCFG_Exported_Functions_Group1 + * +@verbatim + =============================================================================== + ##### Initialization and de-initialization Functions ##### + =============================================================================== + [..] + This section provides functions allowing to initialize and de-initialize the + RAMCFG instance. + [..] + The HAL_RAMCFG_Init() function follows the RAMCFG instance configuration + procedures as described in the reference manual. + The HAL_RAMCFG_DeInit() function allows to deinitialize the RAMCFG instance. + HAL_RAMCFG_Init() and HAL_RAMCFG_DeInit() APIs do not change the activation + status of ECC feature. It is managed by HAL_RAMCFG_StartECC(), + HAL_RAMCFG_StopECC() or option bytes (When available on the device). + +@endverbatim + * @{ + */ + +/** + * @brief Initialize the RAMCFG by clearing flags and disabling interrupts. + * @param hramcfg : Pointer to a RAMCFG_HandleTypeDef structure that contains + * the configuration information for the specified RAMCFG + * instance. + * @retval HAL status. + */ +HAL_StatusTypeDef HAL_RAMCFG_Init(RAMCFG_HandleTypeDef *hramcfg) +{ + /* Check the RAMCFG peripheral handle */ + if (hramcfg == NULL) + { + return HAL_ERROR; + } + + /* Check the parameters */ + assert_param(IS_RAMCFG_ALL_INSTANCE(hramcfg->Instance)); + + /* Update RAMCFG peripheral state */ + hramcfg->State = HAL_RAMCFG_STATE_BUSY; + +#if (USE_HAL_RAMCFG_REGISTER_CALLBACKS == 1) + /* Check if a valid MSP API was registered */ + if (hramcfg->MspInitCallback == NULL) + { + /* Init the low level hardware */ + hramcfg->MspInitCallback = HAL_RAMCFG_MspInit; + } + + /* Init the low level hardware */ + hramcfg->MspInitCallback(hramcfg); +#else + HAL_RAMCFG_MspInit(hramcfg); +#endif /* USE_HAL_RAMCFG_REGISTER_CALLBACKS */ + + /* Disable the ECC Address latch */ + hramcfg->Instance->CR &= ~(RAMCFG_CR_ALE); + + /* Disable all RAMCFG interrupts */ + __HAL_RAMCFG_DISABLE_IT(hramcfg, RAMCFG_IT_ALL); + + /* Clear RAMCFG monitor flags */ + __HAL_RAMCFG_CLEAR_FLAG(hramcfg, RAMCFG_FLAGS_ALL); + + /* Initialize the RAMCFG error code */ + hramcfg->ErrorCode = HAL_RAMCFG_ERROR_NONE; + + /* Initialize the RAMCFG state */ + hramcfg->State = HAL_RAMCFG_STATE_READY; + + return HAL_OK; +} + +/** + * @brief DeInitialize the RAMCFG peripheral. + * @param hramcfg : Pointer to a RAMCFG_HandleTypeDef structure that contains + * the configuration information for the specified RAMCFG + * instance. + * @retval HAL status. + */ +HAL_StatusTypeDef HAL_RAMCFG_DeInit(RAMCFG_HandleTypeDef *hramcfg) +{ + /* Check the RAMCFG peripheral handle */ + if (hramcfg == NULL) + { + return HAL_ERROR; + } + + /* Check the parameters */ + assert_param(IS_RAMCFG_ALL_INSTANCE(hramcfg->Instance)); + + /* Disable the ECC Address latch */ + hramcfg->Instance->CR &= ~(RAMCFG_CR_ALE); + + /* Disable all RAMCFG interrupts */ + __HAL_RAMCFG_DISABLE_IT(hramcfg, RAMCFG_IT_ALL); + + /* Clear RAMCFG monitor flags */ + __HAL_RAMCFG_CLEAR_FLAG(hramcfg, RAMCFG_FLAGS_ALL); + +#if (USE_HAL_RAMCFG_REGISTER_CALLBACKS == 1) + /* Check if a valid MSP API was registered */ + if (hramcfg->MspDeInitCallback != NULL) + { + /* Init the low level hardware */ + hramcfg->MspDeInitCallback(hramcfg); + } + + /* Clean callbacks */ + hramcfg->DetectSingleErrorCallback = NULL; + hramcfg->DetectDoubleErrorCallback = NULL; +#else + HAL_RAMCFG_MspDeInit(hramcfg); +#endif /* USE_HAL_RAMCFG_REGISTER_CALLBACKS */ + + /* Reset the RAMCFG error code */ + hramcfg->ErrorCode = HAL_RAMCFG_ERROR_NONE; + + /* Reset the RAMCFG state */ + hramcfg->State = HAL_RAMCFG_STATE_RESET; + + return HAL_OK; +} + +/** + * @brief Initialize the RAMCFG MSP. + * @param hramcfg : Pointer to a RAMCFG_HandleTypeDef structure that contains + * the configuration information for the specified RAMCFG. + * @retval None. + */ +__weak void HAL_RAMCFG_MspInit(RAMCFG_HandleTypeDef *hramcfg) +{ + /* Prevent unused argument(s) compilation warning */ + UNUSED(hramcfg); + + /* NOTE : This function should not be modified, when the callback is needed, + the HAL_RAMCFG_MspInit can be implemented in the user file */ +} + +/** + * @brief DeInitialize the RAMCFG MSP. + * @param hramcfg : Pointer to a RAMCFG_HandleTypeDef structure that contains + * the configuration information for the specified RAMCFG. + * @retval None. + */ +__weak void HAL_RAMCFG_MspDeInit(RAMCFG_HandleTypeDef *hramcfg) +{ + /* Prevent unused argument(s) compilation warning */ + UNUSED(hramcfg); + + /* NOTE : This function should not be modified, when the callback is needed, + the HAL_RAMCFG_MspDeInit can be implemented in the user file */ +} +/** + * @} + */ + +/** @addtogroup RAMCFG_Exported_Functions_Group2 + * +@verbatim + =============================================================================== + ##### ECC Operations Functions ##### + =============================================================================== + [..] + This section provides functions allowing to manage ECC feature provided by + the RAMCFG peripheral. + [..] + The HAL_RAMCFG_StartECC() function allows starting the ECC mechanism and + enabling ECC address latching for the selected RAMCFG instance. + The HAL_RAMCFG_StopECC() function allows stopping the ECC mechanism and + disabling ECC address latching for the selected RAMCFG instance. + The HAL_RAMCFG_EnableNotification() function allows enabling interrupts + for single ECC error, double ECC error and NMI error. + The HAL_RAMCFG_DisableNotification() function allows disabling interrupts + for single ECC error, double ECC error. When NMI interrupt is enabled it + can only be disabled by a global peripheral reset or by a system reset. + The HAL_RAMCFG_IsECCSingleErrorDetected() function allows to check if an + single ECC error has occurred. + The HAL_RAMCFG_IsECCDoubleErrorDetected() function allows to check if an + double ECC error has occurred. + The HAL_RAMCFG_GetSingleErrorAddress() function allows to get the address of + the last single ECC error detected. + The HAL_RAMCFG_GetDoubleErrorAddress() function allows to get the address of + the last double ECC error detected. + +@endverbatim + * @{ + */ + +/** + * @brief Start ECC mechanism for the given SRAM. + * @param hramcfg : Pointer to a RAMCFG_HandleTypeDef structure that contains + * the configuration information for the specified RAMCFG + * instance. + * @retval HAL status. + */ +HAL_StatusTypeDef HAL_RAMCFG_StartECC(RAMCFG_HandleTypeDef *hramcfg) +{ + HAL_StatusTypeDef status = HAL_OK; + /* Check the parameters */ + assert_param(IS_RAMCFG_ECC_INSTANCE(hramcfg->Instance)); + + /* Check RAMCFG state */ + if (hramcfg->State == HAL_RAMCFG_STATE_READY) + { + /* Update RAMCFG peripheral state */ + hramcfg->State = HAL_RAMCFG_STATE_BUSY; + + /* Check if ECC mechanism is non active */ + if ((hramcfg->Instance->CR & RAMCFG_CR_ECCE) != RAMCFG_CR_ECCE) + { + /* Start the SRAM ECC mechanism and latching the error address */ + hramcfg->Instance->CR |= (RAMCFG_CR_ECCE | RAMCFG_CR_ALE); + } + else + { + /* Start latching the error address */ + hramcfg->Instance->CR |= RAMCFG_CR_ALE; + } + + /* Update the RAMCFG state */ + hramcfg->State = HAL_RAMCFG_STATE_READY; + } + else + { + /* Update the RAMCFG error code and return error */ + hramcfg->ErrorCode = HAL_RAMCFG_ERROR_BUSY; + status = HAL_ERROR; + } + + return status; +} + +/** + * @brief Stop ECC mechanism for the given SRAM. + * @param hramcfg : Pointer to a RAMCFG_HandleTypeDef structure that contains + * the configuration information for the specified RAMCFG + * instance. + * @retval HAL status. + */ +HAL_StatusTypeDef HAL_RAMCFG_StopECC(RAMCFG_HandleTypeDef *hramcfg) +{ + HAL_StatusTypeDef status = HAL_OK; + /* Check the parameters */ + assert_param(IS_RAMCFG_ECC_INSTANCE(hramcfg->Instance)); + + /* Check RAMCFG state */ + if (hramcfg->State == HAL_RAMCFG_STATE_READY) + { + /* Update RAMCFG peripheral state */ + hramcfg->State = HAL_RAMCFG_STATE_BUSY; + + /* Check if ECC mechanism is active */ + if ((hramcfg->Instance->CR & RAMCFG_CR_ECCE) == RAMCFG_CR_ECCE) + { + /* Unlock the SRAM ECC bit */ + WRITE_REG(hramcfg->Instance->ECCKEYR, RAMCFG_ECC_KEY1); + WRITE_REG(hramcfg->Instance->ECCKEYR, RAMCFG_ECC_KEY2); + + /* Stop the SRAM ECC mechanism and latching the error address */ + hramcfg->Instance->CR &= ~(RAMCFG_CR_ECCE | RAMCFG_CR_ALE); + } + /* Update the RAMCFG state */ + hramcfg->State = HAL_RAMCFG_STATE_READY; + } + else + { + /* Update the RAMCFG error code and return error */ + hramcfg->ErrorCode = HAL_RAMCFG_ERROR_BUSY; + status = HAL_ERROR; + } + + return status; +} + +/** + * @brief Enable the RAMCFG error interrupts. + * @param hramcfg : Pointer to a RAMCFG_HandleTypeDef structure that + * contains the configuration information for the + * specified RAMCFG instance. + * @param Notifications : Select the notification to be enabled. + * This parameter can be any value of @ref + * RAMCFG_Interrupt group. + * @retval HAL status. + */ +HAL_StatusTypeDef HAL_RAMCFG_EnableNotification(RAMCFG_HandleTypeDef *hramcfg, uint32_t Notifications) +{ + HAL_StatusTypeDef status = HAL_OK; + /* Check the parameters */ + assert_param(IS_RAMCFG_ECC_INSTANCE(hramcfg->Instance)); + assert_param(IS_RAMCFG_INTERRUPT(Notifications)); + + /* Check RAMCFG state */ + if (hramcfg->State == HAL_RAMCFG_STATE_READY) + { + /* Update RAMCFG peripheral state */ + hramcfg->State = HAL_RAMCFG_STATE_BUSY; + + /* Enable RAMCFG interrupts */ + __HAL_RAMCFG_ENABLE_IT(hramcfg, Notifications); + + /* Update the RAMCFG state */ + hramcfg->State = HAL_RAMCFG_STATE_READY; + + } + else + { + /* Update the RAMCFG error code and return error */ + hramcfg->ErrorCode = HAL_RAMCFG_ERROR_BUSY; + status = HAL_ERROR; + } + + return status; +} + +/** + * @brief Disable the RAMCFG error interrupts. + * @param hramcfg : Pointer to a RAMCFG_HandleTypeDef structure that + * contains the configuration information for the + * specified RAMCFG instance. + * @param Notifications : Select the notification to be disabled. + * This parameter can be : + * RAMCFG_IT_SINGLEERR : Single Error Interrupt. + * RAMCFG_IT_DOUBLEERR : Double Error Interrupt. + * @retval HAL status. + */ +HAL_StatusTypeDef HAL_RAMCFG_DisableNotification(RAMCFG_HandleTypeDef *hramcfg, uint32_t Notifications) +{ + HAL_StatusTypeDef status = HAL_OK; + /* Check the parameters */ + assert_param(IS_RAMCFG_ECC_INSTANCE(hramcfg->Instance)); + assert_param(IS_RAMCFG_INTERRUPT(Notifications)); + + /* Check RAMCFG state */ + if (hramcfg->State == HAL_RAMCFG_STATE_READY) + { + /* Update RAMCFG peripheral state */ + hramcfg->State = HAL_RAMCFG_STATE_BUSY; + + /* Disable RAMCFG interrupts */ + __HAL_RAMCFG_DISABLE_IT(hramcfg, Notifications); + + /* Update the RAMCFG state */ + hramcfg->State = HAL_RAMCFG_STATE_READY; + } + else + { + /* Update the RAMCFG error code and return error */ + hramcfg->ErrorCode = HAL_RAMCFG_ERROR_BUSY; + status = HAL_ERROR; + } + + return status; +} + +/** + * @brief Check if an ECC single error has occurred. + * @param hramcfg : Pointer to a RAMCFG_HandleTypeDef structure that + * contains the configuration information for the + * specified RAMCFG instance. + * @retval State of bit (1 or 0). + */ +uint32_t HAL_RAMCFG_IsECCSingleErrorDetected(const RAMCFG_HandleTypeDef *hramcfg) +{ + /* Check the parameters */ + assert_param(IS_RAMCFG_ECC_INSTANCE(hramcfg->Instance)); + + /* Return the state of SEDC flag */ + return ((READ_BIT(hramcfg->Instance->ISR, RAMCFG_FLAG_SINGLEERR) == (RAMCFG_FLAG_SINGLEERR)) ? 1UL : 0UL); +} + +/** + * @brief Check if an ECC double error was occurred. + * @param hramcfg : Pointer to a RAMCFG_HandleTypeDef structure that + * contains the configuration information for the + * specified RAMCFG instance. + * @retval State of bit (1 or 0). + */ +uint32_t HAL_RAMCFG_IsECCDoubleErrorDetected(const RAMCFG_HandleTypeDef *hramcfg) +{ + /* Check the parameters */ + assert_param(IS_RAMCFG_ECC_INSTANCE(hramcfg->Instance)); + + /* Return the state of DED flag */ + return ((READ_BIT(hramcfg->Instance->ISR, RAMCFG_FLAG_DOUBLEERR) == (RAMCFG_FLAG_DOUBLEERR)) ? 1UL : 0UL); +} + +/** + * @brief Get the RAMCFG single error address. + * @param hramcfg : Pointer to a RAMCFG_HandleTypeDef structure that + * contains the configuration information for the + * specified RAMCFG instance. + * @retval Single error address offset. + */ +uint32_t HAL_RAMCFG_GetSingleErrorAddress(const RAMCFG_HandleTypeDef *hramcfg) +{ + /* Check the parameters */ + assert_param(IS_RAMCFG_ECC_INSTANCE(hramcfg->Instance)); + + return hramcfg->Instance->ESEAR; +} + +/** + * @brief Get the RAMCFG double error address. + * @param hramcfg : Pointer to a RAMCFG_HandleTypeDef structure that + * contains the configuration information for the + * specified RAMCFG instance. + * @retval Double error address offset. + */ +uint32_t HAL_RAMCFG_GetDoubleErrorAddress(const RAMCFG_HandleTypeDef *hramcfg) +{ + /* Check the parameters */ + assert_param(IS_RAMCFG_ECC_INSTANCE(hramcfg->Instance)); + + return hramcfg->Instance->EDEAR; +} + +/** + * @} + */ + +/** @addtogroup RAMCFG_Exported_Functions_Group5 + * +@verbatim + =============================================================================== + ##### Erase Operation Functions ##### + =============================================================================== + [..] + This section provides functions allowing a hardware erase for the given SRAM. + [..] + The HAL_RAMCFG_Erase() function allows a hardware mass erase for the given + SRAM. The erase value for all SRAMs is 0. + +@endverbatim + * @{ + */ + +/** + * @brief Launch a Mass Erase for the given SRAM. + * @param hramcfg : Pointer to a RAMCFG_HandleTypeDef structure that + * contains the configuration information for the + * specified RAMCFG instance. + + * @retval HAL status. + */ +HAL_StatusTypeDef HAL_RAMCFG_Erase(RAMCFG_HandleTypeDef *hramcfg) +{ + uint32_t tickstart = HAL_GetTick(); + + /* Check the parameters */ + assert_param(IS_RAMCFG_ALL_INSTANCE(hramcfg->Instance)); + + /* Check RAMCFG state */ + if (hramcfg->State == HAL_RAMCFG_STATE_READY) + { + /* Update RAMCFG peripheral state */ + hramcfg->State = HAL_RAMCFG_STATE_BUSY; + + /* Unlock the RAMCFG erase bit */ + WRITE_REG(hramcfg->Instance->ERKEYR, RAMCFG_ERASE_KEY1); + WRITE_REG(hramcfg->Instance->ERKEYR, RAMCFG_ERASE_KEY2); + + /* Start the SRAM erase operation */ + hramcfg->Instance->CR |= RAMCFG_CR_SRAMER; + + /* + Wait for the SRAM hardware erase operation to complete by polling on + SRAMBUSY flag to be reset. + */ + while (__HAL_RAMCFG_GET_FLAG(hramcfg, RAMCFG_FLAG_SRAMBUSY) != 0U) + { + if ((HAL_GetTick() - tickstart) > RAMCFG_TIMEOUT_VALUE) + { + /* Update the RAMCFG error code */ + hramcfg->ErrorCode = HAL_RAMCFG_ERROR_TIMEOUT; + + /* Update the RAMCFG state and return error status */ + hramcfg->State = HAL_RAMCFG_STATE_ERROR; + return HAL_ERROR; + } + } + } + else + { + /* Update the error code and return error status */ + hramcfg->ErrorCode = HAL_RAMCFG_ERROR_BUSY; + return HAL_ERROR; + } + + /* Update the RAMCFG state */ + hramcfg->State = HAL_RAMCFG_STATE_READY; + + return HAL_OK; +} + +/** + * @} + */ + +/** @addtogroup RAMCFG_Exported_Functions_Group6 + * +@verbatim + =============================================================================== + ##### Handle Interrupt and Callbacks Functions ##### + =============================================================================== + [..] + This section provides functions to handle RAMCFG interrupts and + Register / UnRegister the different callbacks. + [..] + The HAL_RAMCFG_IRQHandler() function allows the user to handle the active RAMCFG + interrupt request. + The HAL_RAMCFG_RegisterCallback() function allows the user to register the selected + RAMCFG callbacks. + The HAL_RAMCFG_UnRegisterCallback() function allows the user to unregister the + selected RAMCFG callbacks. +@endverbatim + * @{ + */ + +/** + * @brief Handles RAMCFG interrupt request. + * @param hramcfg : Pointer to a RAMCFG_HandleTypeDef structure that + * contains the configuration information for the + * specified RAMCFG instance. + * @retval None. + */ +void HAL_RAMCFG_IRQHandler(RAMCFG_HandleTypeDef *hramcfg) +{ + /* Single Error Interrupt Management ****************************************/ + if (__HAL_RAMCFG_GET_IT_SOURCE(hramcfg, RAMCFG_IT_SINGLEERR) != 0U) + { + if (__HAL_RAMCFG_GET_FLAG(hramcfg, RAMCFG_FLAG_SINGLEERR) != 0U) + { + /* Clear active flags */ + __HAL_RAMCFG_CLEAR_FLAG(hramcfg, RAMCFG_FLAG_SINGLEERR); + +#if (USE_HAL_RAMCFG_REGISTER_CALLBACKS == 1) + /* Check if a valid single error callback is registered */ + if (hramcfg->DetectSingleErrorCallback != NULL) + { + /* Single error detection callback */ + hramcfg->DetectSingleErrorCallback(hramcfg); + } +#else + HAL_RAMCFG_DetectSingleErrorCallback(hramcfg); +#endif /* USE_HAL_RAMCFG_REGISTER_CALLBACKS */ + } + } + + /* Double Error Interrupt Management ****************************************/ + if (__HAL_RAMCFG_GET_IT_SOURCE(hramcfg, RAMCFG_IT_DOUBLEERR) != 0U) + { + if (__HAL_RAMCFG_GET_FLAG(hramcfg, RAMCFG_FLAG_DOUBLEERR) != 0U) + { + /* Clear active flags */ + __HAL_RAMCFG_CLEAR_FLAG(hramcfg, RAMCFG_FLAG_DOUBLEERR); + +#if (USE_HAL_RAMCFG_REGISTER_CALLBACKS == 1) + /* Check if a valid double error callback is registered */ + if (hramcfg->DetectDoubleErrorCallback != NULL) + { + /* Double error detection callback */ + hramcfg->DetectDoubleErrorCallback(hramcfg); + } +#else + HAL_RAMCFG_DetectDoubleErrorCallback(hramcfg); +#endif /* USE_HAL_RAMCFG_REGISTER_CALLBACKS */ + } + } +} + +/** + * @brief RAMCFG single error detection callback. + * @param hramcfg : Pointer to a RAMCFG_HandleTypeDef structure that contains + * the configuration information for the specified RAMCFG. + * @retval None. + */ +__weak void HAL_RAMCFG_DetectSingleErrorCallback(RAMCFG_HandleTypeDef *hramcfg) +{ + /* Prevent unused argument(s) compilation warning */ + UNUSED(hramcfg); + + /* NOTE : This function should not be modified, when the callback is needed, + the HAL_RAMCFG_DetectSingleErrorCallback can be implemented in + the user file. */ +} + +/** + * @brief RAMCFG double error detection callback. + * @param hramcfg : Pointer to a RAMCFG_HandleTypeDef structure that contains + * the configuration information for the specified RAMCFG. + * @retval None. + */ +__weak void HAL_RAMCFG_DetectDoubleErrorCallback(RAMCFG_HandleTypeDef *hramcfg) +{ + /* Prevent unused argument(s) compilation warning */ + UNUSED(hramcfg); + + /* NOTE : This function should not be modified, when the callback is needed, + the HAL_RAMCFG_DetectDoubleErrorCallback can be implemented in + the user file. */ +} + +#if (USE_HAL_RAMCFG_REGISTER_CALLBACKS == 1) +/** + * @brief Register RAMCFG callbacks. + * @param hramcfg : Pointer to a RAMCFG_HandleTypeDef structure that + * contains the configuration information for the + * specified RAMCFG instance. + * @param CallbackID : User Callback identifier a HAL_RAMCFG_CallbackIDTypeDef + * ENUM as parameter. + * @param pCallback : Pointer to private callback function. + * @retval HAL status. + */ +HAL_StatusTypeDef HAL_RAMCFG_RegisterCallback(RAMCFG_HandleTypeDef *hramcfg, + HAL_RAMCFG_CallbackIDTypeDef CallbackID, + void (* pCallback)(RAMCFG_HandleTypeDef *_hramcfg)) +{ + HAL_StatusTypeDef status = HAL_OK; + + /* Check the parameters */ + assert_param(IS_RAMCFG_ALL_INSTANCE(hramcfg->Instance)); + + if (pCallback == NULL) + { + /* Update the error code and return error */ + hramcfg->ErrorCode |= HAL_RAMCFG_ERROR_INVALID_CALLBACK; + return HAL_ERROR; + } + + /* Check RAMCFG state */ + if (hramcfg->State == HAL_RAMCFG_STATE_READY) + { + switch (CallbackID) + { + case HAL_RAMCFG_SE_DETECT_CB_ID: + /* Register single error callback */ + hramcfg->DetectSingleErrorCallback = pCallback; + break; + + case HAL_RAMCFG_DE_DETECT_CB_ID: + /* Register double error callback */ + hramcfg->DetectDoubleErrorCallback = pCallback; + break; + + case HAL_RAMCFG_MSPINIT_CB_ID : + /* Register msp init callback */ + hramcfg->MspInitCallback = pCallback; + break; + + case HAL_RAMCFG_MSPDEINIT_CB_ID : + /* Register msp de-init callback */ + hramcfg->MspDeInitCallback = pCallback; + break; + + default: + /* Update the error code and return error */ + hramcfg->ErrorCode |= HAL_RAMCFG_ERROR_INVALID_CALLBACK; + status = HAL_ERROR; + break; + } + } + else if (hramcfg->State == HAL_RAMCFG_STATE_RESET) + { + switch (CallbackID) + { + case HAL_RAMCFG_MSPINIT_CB_ID : + /* Register msp init callback */ + hramcfg->MspInitCallback = pCallback; + break; + + case HAL_RAMCFG_MSPDEINIT_CB_ID : + /* Register msp de-init callback */ + hramcfg->MspDeInitCallback = pCallback; + break; + + default : + /* Update the error code and return error */ + hramcfg->ErrorCode |= HAL_RAMCFG_ERROR_INVALID_CALLBACK; + status = HAL_ERROR; + break; + } + } + else + { + /* Update the error code and return error */ + hramcfg->ErrorCode = HAL_RAMCFG_ERROR_INVALID_CALLBACK; + status = HAL_ERROR; + } + + return status; +} + +/** + * @brief UnRegister RAMCFG callbacks. + * @param hramcfg : Pointer to a RAMCFG_HandleTypeDef structure that + * contains the configuration information for the + * specified RAMCFG instance. + * @param CallbackID : User Callback identifier a HAL_RAMCFG_CallbackIDTypeDef + * ENUM as parameter. + * @retval HAL status. + */ +HAL_StatusTypeDef HAL_RAMCFG_UnRegisterCallback(RAMCFG_HandleTypeDef *hramcfg, HAL_RAMCFG_CallbackIDTypeDef CallbackID) +{ + HAL_StatusTypeDef status = HAL_OK; + + /* Check the parameters */ + assert_param(IS_RAMCFG_ALL_INSTANCE(hramcfg->Instance)); + + /* Check RAMCFG state */ + if (hramcfg->State == HAL_RAMCFG_STATE_READY) + { + switch (CallbackID) + { + case HAL_RAMCFG_SE_DETECT_CB_ID: + /* UnRegister single error callback */ + hramcfg->DetectSingleErrorCallback = NULL; + break; + + case HAL_RAMCFG_DE_DETECT_CB_ID: + /* UnRegister double error callback */ + hramcfg->DetectDoubleErrorCallback = NULL; + break; + + case HAL_RAMCFG_MSPINIT_CB_ID : + /* UnRegister msp init callback */ + hramcfg->MspInitCallback = NULL; + break; + + case HAL_RAMCFG_MSPDEINIT_CB_ID : + /* UnRegister msp de-init callback */ + hramcfg->MspDeInitCallback = NULL; + break; + + case HAL_RAMCFG_ALL_CB_ID: + /* UnRegister all available callbacks */ + hramcfg->DetectSingleErrorCallback = NULL; + hramcfg->DetectDoubleErrorCallback = NULL; + hramcfg->MspDeInitCallback = NULL; + hramcfg->MspInitCallback = NULL; + break; + + default: + /* Return error status */ + status = HAL_ERROR; + break; + } + } + else if (hramcfg->State == HAL_RAMCFG_STATE_RESET) + { + switch (CallbackID) + { + case HAL_RAMCFG_MSPINIT_CB_ID : + /* UnRegister msp init callback */ + hramcfg->MspInitCallback = NULL; + break; + + case HAL_RAMCFG_MSPDEINIT_CB_ID : + /* UnRegister msp de-init callback */ + hramcfg->MspDeInitCallback = NULL; + break; + + case HAL_RAMCFG_ALL_CB_ID: + /* UnRegister all available callbacks */ + hramcfg->MspDeInitCallback = NULL; + hramcfg->MspInitCallback = NULL; + break; + + default : + /* Update the error code */ + hramcfg->ErrorCode |= HAL_RAMCFG_ERROR_INVALID_CALLBACK; + + /* Update return status */ + status = HAL_ERROR; + break; + } + } + else + { + /* Update the error code and return error */ + hramcfg->ErrorCode = HAL_RAMCFG_ERROR_INVALID_CALLBACK; + status = HAL_ERROR; + } + + return status; +} + +/** + * @} + */ +#endif /* USE_HAL_RAMCFG_REGISTER_CALLBACKS */ + +/** @addtogroup RAMCFG_Exported_Functions_Group7 + * +@verbatim + =============================================================================== + ##### State and Error Functions ##### + =============================================================================== + [..] + This section provides functions to check and get the RAMCFG state + and the error code. + [..] + The HAL_RAMCFG_GetState() function allows the user to get the RAMCFG peripheral + state. + The HAL_RAMCFG_GetError() function allows the user to get the RAMCFG peripheral error + code. + +@endverbatim + * @{ + */ + +/** + * @brief Get the RAMCFG peripheral state. + * @param hramcfg : Pointer to a RAMCFG_HandleTypeDef structure that + * contains the configuration information for the + * specified RAMCFG instance. + * @retval RAMCFG state. + */ +HAL_RAMCFG_StateTypeDef HAL_RAMCFG_GetState(const RAMCFG_HandleTypeDef *hramcfg) +{ + /* Check the parameters */ + assert_param(IS_RAMCFG_ALL_INSTANCE(hramcfg->Instance)); + + /* Return the RAMCFG state */ + return hramcfg->State; +} + +/** + * @brief Get the RAMCFG peripheral error code. + * @param hramcfg : Pointer to a RAMCFG_HandleTypeDef structure that + * contains the configuration information for the + * specified RAMCFG instance. + * @retval RAMCFG error code. + */ +uint32_t HAL_RAMCFG_GetError(const RAMCFG_HandleTypeDef *hramcfg) +{ + /* Check the parameters */ + assert_param(IS_RAMCFG_ALL_INSTANCE(hramcfg->Instance)); + + /* Return the RAMCFG error code */ + return hramcfg->ErrorCode; +} + +/** + * @} + */ + + + +/** @addtogroup RAMCFG_Exported_Functions_Group9 + * +@verbatim + =============================================================================== + ##### AXISRAM Powerdown Functions ##### + =============================================================================== + [..] + This section provides functions allowing to shutdown some AXISRAM memories + reduce the consumption. + [..] + The HAL_RAMCFG_EnableAXISRAM() function allows to power on the selected AXISRAM. + [..] + The HAL_RAMCFG_DisableAXISRAM() function allows to power off the selected AXISRAM. + AXISRAMi memory is in shutdown, and its content is not retained. +@endverbatim + * @{ + */ + +/** + * @brief Enable AXISRAM power on. + * @note Only AXISRAM2 to AXISRAM6 are available for this feature. + * @param hramcfg : Pointer to a RAMCFG_HandleTypeDef structure that + * contains the configuration information for the + * specified RAMCFG instance. + * @retval None. + */ +void HAL_RAMCFG_EnableAXISRAM(const RAMCFG_HandleTypeDef *hramcfg) +{ + /* Check the parameters */ + assert_param(IS_RAMCFG_AXISRAM_POWERDOWN_INSTANCE(hramcfg->Instance)); + + /* AXISRAMi power on */ + CLEAR_BIT(hramcfg->Instance->CR, RAMCFG_AXISRAM_POWERDOWN); +} + +/** + * @brief Disable AXISRAM power on. + * @note Only AXISRAM2 to AXISRAM6 are available for this feature. + * @note AXISRAMi memory is in shutdown, and its content is not retained. + * @note This bit is used to reduce the consumption by powering off the AXISRAMi. + * @param hramcfg : Pointer to a RAMCFG_HandleTypeDef structure that + * contains the configuration information for the + * specified RAMCFG instance. + * @retval None. + */ +void HAL_RAMCFG_DisableAXISRAM(const RAMCFG_HandleTypeDef *hramcfg) +{ + /* Check the parameters */ + assert_param(IS_RAMCFG_AXISRAM_POWERDOWN_INSTANCE(hramcfg->Instance)); + + /* AXISRAMi powered off */ + SET_BIT(hramcfg->Instance->CR, RAMCFG_AXISRAM_POWERDOWN); +} +#endif /* HAL_RAMCFG_MODULE_ENABLED */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + + Index: trunk/firmware/FSBL/CubeMX/FSBL/Inc/ramcfg.h =================================================================== --- trunk/firmware/FSBL/CubeMX/FSBL/Inc/ramcfg.h (revision 27) +++ trunk/firmware/FSBL/CubeMX/FSBL/Inc/ramcfg.h (revision 27) @@ -0,0 +1,72 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file ramcfg.h + * @brief This file contains all the function prototypes for + * the ramcfg.c file + ****************************************************************************** + * @attention + * + * Copyright (c) 2026 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __RAMCFG_H__ +#define __RAMCFG_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" + +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +extern RAMCFG_HandleTypeDef hramcfg_SRAM1; + +extern RAMCFG_HandleTypeDef hramcfg_SRAM2; + +extern RAMCFG_HandleTypeDef hramcfg_SRAM3; + +extern RAMCFG_HandleTypeDef hramcfg_SRAM4; + +extern RAMCFG_HandleTypeDef hramcfg_SRAM5; + +extern RAMCFG_HandleTypeDef hramcfg_SRAM6; + +extern RAMCFG_HandleTypeDef hramcfg_AHBSRAM1; + +extern RAMCFG_HandleTypeDef hramcfg_AHBSRAM2; + +extern RAMCFG_HandleTypeDef hramcfg_BKPSRAM; + +extern RAMCFG_HandleTypeDef hramcfg_FLEXRAM; + +extern RAMCFG_HandleTypeDef hramcfg_VENCRAM; + +/* USER CODE BEGIN Private defines */ + +/* USER CODE END Private defines */ + +void MX_RAMCFG_Init(void); + +/* USER CODE BEGIN Prototypes */ + +/* USER CODE END Prototypes */ + +#ifdef __cplusplus +} +#endif + +#endif /* __RAMCFG_H__ */ + Index: trunk/firmware/FSBL/CubeMX/FSBL/Inc/stm32n6xx_hal_conf.h =================================================================== --- trunk/firmware/FSBL/CubeMX/FSBL/Inc/stm32n6xx_hal_conf.h (revision 26) +++ trunk/firmware/FSBL/CubeMX/FSBL/Inc/stm32n6xx_hal_conf.h (revision 27) @@ -67,5 +67,5 @@ /*#define HAL_PKA_MODULE_ENABLED */ /*#define HAL_PSSI_MODULE_ENABLED */ -/*#define HAL_RAMCFG_MODULE_ENABLED */ +#define HAL_RAMCFG_MODULE_ENABLED /*#define HAL_RIF_MODULE_ENABLED */ /*#define HAL_RNG_MODULE_ENABLED */ Index: trunk/firmware/FSBL/CubeMX/FSBL/Src/main.c =================================================================== --- trunk/firmware/FSBL/CubeMX/FSBL/Src/main.c (revision 26) +++ trunk/firmware/FSBL/CubeMX/FSBL/Src/main.c (revision 27) @@ -21,4 +21,5 @@ #include "bsec.h" #include "extmem_manager.h" +#include "ramcfg.h" #include "xspi.h" #include "gpio.h" @@ -107,4 +108,5 @@ MX_XSPI2_Init(); MX_BSEC_Init(); + MX_RAMCFG_Init(); MX_EXTMEM_MANAGER_Init(); /* USER CODE BEGIN 2 */ Index: trunk/firmware/FSBL/CubeMX/FSBL/Src/ramcfg.c =================================================================== --- trunk/firmware/FSBL/CubeMX/FSBL/Src/ramcfg.c (revision 27) +++ trunk/firmware/FSBL/CubeMX/FSBL/Src/ramcfg.c (revision 27) @@ -0,0 +1,235 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file ramcfg.c + * @brief This file provides code for the configuration + * of the RAMCFG instances. + ****************************************************************************** + * @attention + * + * Copyright (c) 2026 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ +/* Includes ------------------------------------------------------------------*/ +#include "ramcfg.h" + +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +RAMCFG_HandleTypeDef hramcfg_SRAM1; +RAMCFG_HandleTypeDef hramcfg_SRAM2; +RAMCFG_HandleTypeDef hramcfg_SRAM3; +RAMCFG_HandleTypeDef hramcfg_SRAM4; +RAMCFG_HandleTypeDef hramcfg_SRAM5; +RAMCFG_HandleTypeDef hramcfg_SRAM6; +RAMCFG_HandleTypeDef hramcfg_AHBSRAM1; +RAMCFG_HandleTypeDef hramcfg_AHBSRAM2; +RAMCFG_HandleTypeDef hramcfg_BKPSRAM; +RAMCFG_HandleTypeDef hramcfg_FLEXRAM; +RAMCFG_HandleTypeDef hramcfg_VENCRAM; + +/* RAMCFG init function */ +void MX_RAMCFG_Init(void) +{ + + /* USER CODE BEGIN RAMCFG_Init 0 */ + + /* USER CODE END RAMCFG_Init 0 */ + + /* USER CODE BEGIN RAMCFG_Init 1 */ + + /* USER CODE END RAMCFG_Init 1 */ + + /** Initialize RAMCFG SRAM1 + */ + hramcfg_SRAM1.Instance = RAMCFG_SRAM1_AXI; + if (HAL_RAMCFG_Init(&hramcfg_SRAM1) != HAL_OK) + { + Error_Handler(); + } + + /** Initialize RAMCFG SRAM2 + */ + hramcfg_SRAM2.Instance = RAMCFG_SRAM2_AXI; + if (HAL_RAMCFG_Init(&hramcfg_SRAM2) != HAL_OK) + { + Error_Handler(); + } + HAL_RAMCFG_EnableAXISRAM(&hramcfg_SRAM2); + + /** Initialize RAMCFG SRAM3 + */ + hramcfg_SRAM3.Instance = RAMCFG_SRAM3_AXI; + if (HAL_RAMCFG_Init(&hramcfg_SRAM3) != HAL_OK) + { + Error_Handler(); + } + HAL_RAMCFG_EnableAXISRAM(&hramcfg_SRAM3); + + /** Initialize RAMCFG SRAM4 + */ + hramcfg_SRAM4.Instance = RAMCFG_SRAM4_AXI; + if (HAL_RAMCFG_Init(&hramcfg_SRAM4) != HAL_OK) + { + Error_Handler(); + } + HAL_RAMCFG_EnableAXISRAM(&hramcfg_SRAM4); + + /** Initialize RAMCFG SRAM5 + */ + hramcfg_SRAM5.Instance = RAMCFG_SRAM5_AXI; + if (HAL_RAMCFG_Init(&hramcfg_SRAM5) != HAL_OK) + { + Error_Handler(); + } + HAL_RAMCFG_EnableAXISRAM(&hramcfg_SRAM5); + + /** Initialize RAMCFG SRAM6 + */ + hramcfg_SRAM6.Instance = RAMCFG_SRAM6_AXI; + if (HAL_RAMCFG_Init(&hramcfg_SRAM6) != HAL_OK) + { + Error_Handler(); + } + HAL_RAMCFG_EnableAXISRAM(&hramcfg_SRAM6); + + /** Initialize RAMCFG AHBSRAM1 + */ + hramcfg_AHBSRAM1.Instance = RAMCFG_SRAM1_AHB; + if (HAL_RAMCFG_Init(&hramcfg_AHBSRAM1) != HAL_OK) + { + Error_Handler(); + } + + /** Initialize RAMCFG AHBSRAM2 + */ + hramcfg_AHBSRAM2.Instance = RAMCFG_SRAM2_AHB; + if (HAL_RAMCFG_Init(&hramcfg_AHBSRAM2) != HAL_OK) + { + Error_Handler(); + } + + /** Initialize RAMCFG BKPSRAM + */ + hramcfg_BKPSRAM.Instance = RAMCFG_BKPSRAM; + if (HAL_RAMCFG_Init(&hramcfg_BKPSRAM) != HAL_OK) + { + Error_Handler(); + } + + /** Initialize RAMCFG FLEXRAM + */ + hramcfg_FLEXRAM.Instance = RAMCFG_FLEXRAM; + if (HAL_RAMCFG_Init(&hramcfg_FLEXRAM) != HAL_OK) + { + Error_Handler(); + } + + /** Initialize RAMCFG VENCRAM + */ + hramcfg_VENCRAM.Instance = RAMCFG_VENC_RAM; + if (HAL_RAMCFG_Init(&hramcfg_VENCRAM) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN RAMCFG_Init 2 */ + + /* USER CODE END RAMCFG_Init 2 */ + +} + +void HAL_RAMCFG_MspInit(RAMCFG_HandleTypeDef* ramcfgHandle) +{ + + /* USER CODE BEGIN RAMCFG_MspInit 0 */ + + /* USER CODE END RAMCFG_MspInit 0 */ + /* RAMCFG clock enable */ + __HAL_RCC_RAMCFG_CLK_ENABLE(); + if (ramcfgHandle->Instance == RAMCFG_SRAM1_AXI) + { + __HAL_RCC_AXISRAM1_MEM_CLK_ENABLE(); + + HAL_RAMCFG_EnableAXISRAM(ramcfgHandle); + } + else if (ramcfgHandle->Instance == RAMCFG_SRAM2_AXI) + { + __HAL_RCC_AXISRAM2_MEM_CLK_ENABLE(); + + HAL_RAMCFG_EnableAXISRAM(ramcfgHandle); + } + else if (ramcfgHandle->Instance == RAMCFG_SRAM3_AXI) + { + __HAL_RCC_AXISRAM3_MEM_CLK_ENABLE(); + + HAL_RAMCFG_EnableAXISRAM(ramcfgHandle); + } + else if (ramcfgHandle->Instance == RAMCFG_SRAM4_AXI) + { + __HAL_RCC_AXISRAM4_MEM_CLK_ENABLE(); + + HAL_RAMCFG_EnableAXISRAM(ramcfgHandle); + } + else if (ramcfgHandle->Instance == RAMCFG_SRAM5_AXI) + { + __HAL_RCC_AXISRAM5_MEM_CLK_ENABLE(); + + HAL_RAMCFG_EnableAXISRAM(ramcfgHandle); + } + else if (ramcfgHandle->Instance == RAMCFG_SRAM6_AXI) + { + __HAL_RCC_AXISRAM6_MEM_CLK_ENABLE(); + + HAL_RAMCFG_EnableAXISRAM(ramcfgHandle); + } + else if (ramcfgHandle->Instance == RAMCFG_SRAM1_AHB) + { + __HAL_RCC_AHBSRAM1_MEM_CLK_ENABLE(); + } + else if (ramcfgHandle->Instance == RAMCFG_SRAM2_AHB) + { + __HAL_RCC_AHBSRAM2_MEM_CLK_ENABLE(); + } + else if (ramcfgHandle->Instance == RAMCFG_BKPSRAM) + { + __HAL_RCC_BKPSRAM_MEM_CLK_ENABLE(); + } + else if (ramcfgHandle->Instance == RAMCFG_FLEXRAM) + { + __HAL_RCC_FLEXRAM_MEM_CLK_ENABLE(); + } + else if (ramcfgHandle->Instance == RAMCFG_VENC_RAM) + { + __HAL_RCC_VENCRAM_MEM_CLK_ENABLE(); + } + + /* USER CODE BEGIN RAMCFG_MspInit 1 */ + + /* USER CODE END RAMCFG_MspInit 1 */ +} + +void HAL_RAMCFG_MspDeInit(RAMCFG_HandleTypeDef* ramcfgHandle) +{ + + /* USER CODE BEGIN RAMCFG_MspDeInit 0 */ + + /* USER CODE END RAMCFG_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_RAMCFG_CLK_DISABLE(); + /* USER CODE BEGIN RAMCFG_MspDeInit 1 */ + + /* USER CODE END RAMCFG_MspDeInit 1 */ +} + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ + Index: trunk/firmware/FSBL/CubeMX/blto2_FSBL.ioc =================================================================== --- trunk/firmware/FSBL/CubeMX/blto2_FSBL.ioc (revision 26) +++ trunk/firmware/FSBL/CubeMX/blto2_FSBL.ioc (revision 27) @@ -21,5 +21,5 @@ EXTMEM_MANAGER.RefParam_XIP_ApplicationOffset=0x80000 ExtMemLoader.IPs=EXTMEM_LOADER,EXTMEM_MANAGER,RCC\:I,GPIO,TIM6 -FSBL.IPs=CORTEX_M55_FSBL,GPDMA1\:I,HDP,HPDMA1\:I,LINKEDLIST,RCC,GPIO\:I,NVIC\:I,XSPIM,XSPI2,EXTMEM_MANAGER,BSEC,DEBUG +FSBL.IPs=CORTEX_M55_FSBL,GPDMA1\:I,HDP,HPDMA1\:I,LINKEDLIST,RCC,GPIO\:I,NVIC\:I,XSPIM,XSPI2,EXTMEM_MANAGER,BSEC,DEBUG,RAMCFG FSBL.Pins=PB12,PG0 File.Version=6 @@ -35,5 +35,6 @@ Mcu.IP0=BSEC Mcu.IP1=CORTEX_M55_FSBL -Mcu.IP10=XSPIM +Mcu.IP10=XSPI2 +Mcu.IP11=XSPIM Mcu.IP2=CORTEX_M55_S Mcu.IP3=DEBUG @@ -41,8 +42,8 @@ Mcu.IP5=NVIC1 Mcu.IP6=NVIC -Mcu.IP7=RCC -Mcu.IP8=RIF -Mcu.IP9=XSPI2 -Mcu.IPNb=11 +Mcu.IP7=RAMCFG +Mcu.IP8=RCC +Mcu.IP9=RIF +Mcu.IPNb=12 Mcu.Name=STM32N657X0HxQ Mcu.Package=VFBGA264 @@ -57,9 +58,20 @@ Mcu.Pin16=VP_BSEC_VS_BSEC Mcu.Pin17=VP_EXTMEM_MANAGER_SIG_Activate_EXTMEM -Mcu.Pin18=VP_RIF_VS_RIF1 -Mcu.Pin19=VP_XSPI2_VS_octo +Mcu.Pin18=VP_RAMCFG_VS_RAMCFG1 +Mcu.Pin19=VP_RAMCFG_VS_RAMCFG2 Mcu.Pin2=PN8 -Mcu.Pin20=VP_XSPIM_VS_IO +Mcu.Pin20=VP_RAMCFG_VS_RAMCFG3 +Mcu.Pin21=VP_RAMCFG_VS_RAMCFG4 +Mcu.Pin22=VP_RAMCFG_VS_RAMCFG5 +Mcu.Pin23=VP_RAMCFG_VS_RAMCFG6 +Mcu.Pin24=VP_RAMCFG_VS_AHBSRAM1 +Mcu.Pin25=VP_RAMCFG_VS_AHBSRAM2 +Mcu.Pin26=VP_RAMCFG_VS_BKPRAM +Mcu.Pin27=VP_RAMCFG_VS_FLEXRAM +Mcu.Pin28=VP_RAMCFG_VS_VENCRAM +Mcu.Pin29=VP_RIF_VS_RIF1 Mcu.Pin3=PN0 +Mcu.Pin30=VP_XSPI2_VS_octo +Mcu.Pin31=VP_XSPIM_VS_IO Mcu.Pin4=PB12 Mcu.Pin5=PG0 @@ -68,5 +80,5 @@ Mcu.Pin8=PN1 Mcu.Pin9=PA14(JTCK/SWCLK) -Mcu.PinsNb=21 +Mcu.PinsNb=32 Mcu.ThirdPartyNb=0 Mcu.UserConstants= @@ -221,4 +233,17 @@ ProjectManager.UnderRoot=false ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false-FSBL,2-MX_GPIO_Init-GPIO-false-HAL-true-FSBL,3-MX_XSPI2_Init-XSPI2-false-HAL-true-FSBL,false-4-MX_XSPIM_Init-XSPIM-false-HAL-true-FSBL,5-MX_BSEC_Init-BSEC-false-HAL-true-FSBL,6-MX_EXTMEM_MANAGER_Init-EXTMEM_MANAGER-false-HAL-false-FSBL,1-SystemIsolation_Config-RIF-false-HAL-true-Appli,0-MX_CORTEX_M55_FSBL_Init-CORTEX_M55_FSBL-false-HAL-true-FSBL,0-MX_CORTEX_M55_S_Init-CORTEX_M55_S-false-HAL-true-Appli,1-MX_EXTMEM_MANAGER_Init-EXTMEM_MANAGER-false-HAL-false-ExtMemLoader +RAMCFG.IPParameters=Instance-RAMCFG1_Activate,Instance-RAMCFG2_Activate,Instance-RAMCFG3_Activate,Instance-RAMCFG4_Activate,Instance-RAMCFG5_Activate,Instance-RAMCFG6_Activate,Instance-AHBSRAMCFG1_Activate,Instance-AHBSRAMCFG2_Activate,Instance-BKPRAM_Activate,Instance-FLEXRAM_Activate,Instance-VENCRAM_Activate,SYSCFG_ITCM_size +RAMCFG.Instance-AHBSRAMCFG1_Activate=RAMCFG_SRAM1_AHB +RAMCFG.Instance-AHBSRAMCFG2_Activate=RAMCFG_SRAM2_AHB +RAMCFG.Instance-BKPRAM_Activate=RAMCFG_BKPSRAM +RAMCFG.Instance-FLEXRAM_Activate=RAMCFG_FLEXRAM +RAMCFG.Instance-RAMCFG1_Activate=RAMCFG_SRAM1_AXI +RAMCFG.Instance-RAMCFG2_Activate=RAMCFG_SRAM2_AXI +RAMCFG.Instance-RAMCFG3_Activate=RAMCFG_SRAM3_AXI +RAMCFG.Instance-RAMCFG4_Activate=RAMCFG_SRAM4_AXI +RAMCFG.Instance-RAMCFG5_Activate=RAMCFG_SRAM5_AXI +RAMCFG.Instance-RAMCFG6_Activate=RAMCFG_SRAM6_AXI +RAMCFG.Instance-VENCRAM_Activate=RAMCFG_VENC_RAM +RAMCFG.SYSCFG_ITCM_size=SYSCFG_ITCM_64K RCC.ADC12Freq_Value=200000000 RCC.ADFFreq_Value=200000000 @@ -898,4 +923,26 @@ VP_EXTMEM_MANAGER_SIG_Activate_EXTMEM.Mode=Activate_EXTMEM VP_EXTMEM_MANAGER_SIG_Activate_EXTMEM.Signal=EXTMEM_MANAGER_SIG_Activate_EXTMEM +VP_RAMCFG_VS_AHBSRAM1.Mode=AHBSRAMCFG1_Activate +VP_RAMCFG_VS_AHBSRAM1.Signal=RAMCFG_VS_AHBSRAM1 +VP_RAMCFG_VS_AHBSRAM2.Mode=AHBSRAMCFG2_Activate +VP_RAMCFG_VS_AHBSRAM2.Signal=RAMCFG_VS_AHBSRAM2 +VP_RAMCFG_VS_BKPRAM.Mode=BKPRAM_Activate +VP_RAMCFG_VS_BKPRAM.Signal=RAMCFG_VS_BKPRAM +VP_RAMCFG_VS_FLEXRAM.Mode=FLEXRAM_Activate +VP_RAMCFG_VS_FLEXRAM.Signal=RAMCFG_VS_FLEXRAM +VP_RAMCFG_VS_RAMCFG1.Mode=RAMCFG1_Activate +VP_RAMCFG_VS_RAMCFG1.Signal=RAMCFG_VS_RAMCFG1 +VP_RAMCFG_VS_RAMCFG2.Mode=RAMCFG2_Activate +VP_RAMCFG_VS_RAMCFG2.Signal=RAMCFG_VS_RAMCFG2 +VP_RAMCFG_VS_RAMCFG3.Mode=RAMCFG3_Activate +VP_RAMCFG_VS_RAMCFG3.Signal=RAMCFG_VS_RAMCFG3 +VP_RAMCFG_VS_RAMCFG4.Mode=RAMCFG4_Activate +VP_RAMCFG_VS_RAMCFG4.Signal=RAMCFG_VS_RAMCFG4 +VP_RAMCFG_VS_RAMCFG5.Mode=RAMCFG5_Activate +VP_RAMCFG_VS_RAMCFG5.Signal=RAMCFG_VS_RAMCFG5 +VP_RAMCFG_VS_RAMCFG6.Mode=RAMCFG6_Activate +VP_RAMCFG_VS_RAMCFG6.Signal=RAMCFG_VS_RAMCFG6 +VP_RAMCFG_VS_VENCRAM.Mode=VENCRAM_Activate +VP_RAMCFG_VS_VENCRAM.Signal=RAMCFG_VS_VENCRAM VP_RIF_VS_RIF1.Mode=RISUP VP_RIF_VS_RIF1.Signal=RIF_VS_RIF1