CONTENTS

LINK INFORMATION

SEGGER ARM Linker 4.44.5 compiled Aug  7 2026 18:47:09
Copyright (c) 2017-2026 SEGGER Microcontroller GmbH    www.segger.com
--add-region:ITCM_RAM=0x00010000@0x10000000
--add-region:DTCM_RAM=0x00020000@0x30000000
--add-region:FLEX_RAM=0x00064000@0x34000000
--add-region:AXI_RAM1=0x0009c000@0x34064000
--add-region:AXI_RAM2=0x0007fc00@0x34180400
--add-region:AXI_RAM3=0x00070000@0x34200000
--add-region:AXI_RAM4=0x00070000@0x34270000
--add-region:AXI_RAM5=0x00070000@0x342e0000
--add-region:AXI_RAM6=0x00070000@0x34350000
--add-region:AXI_RAM7=0x00040000@0x343c0000
--add-region:AXI_RAM8=0x00020000@0x34400000
--add-region:AHB_RAM1=0x00004000@0x38000000
--add-region:AHB_RAM2=0x00004000@0x38004000
--add-region:BKP_RAM=0x00002000@0x3c000000
--full-section-headers
--merge-sections
--merge-strings
--map-html
--map-file=Output/Debug/Exe/blto2_FSBL.htm
--map-full
--list-all-undefineds
-eReset_Handler
-EL
-mcpu=8.1-M.main
--silent
-TD:/Projekte/hadewe_blto2/trunk/firmware/FSBL/SES/STM32N6xx_RAM.icf
--defsym=__STACKSIZE__=8192
--defsym=__STACKSIZE_PROCESS__=0
--defsym=__HEAPSIZE__=256
--defsym=__SEGGER_RTL_vfprintf=__SEGGER_RTL_vfprintf_short_float_long_long
--defsym=__SEGGER_RTL_vfscanf=__SEGGER_RTL_vfscanf_int
-u_vectors
-uFW_VERSION
-o
D:/Projekte/hadewe_blto2/trunk/firmware/FSBL/SES/Output/Debug/Exe/blto2_FSBL.elf
D:/Projekte/hadewe_blto2/trunk/firmware/FSBL/SES/Output/Debug/Obj/blto2_FSBL_lto.o
Output/Debug/Obj/SEGGER_THUMB_Startup.o
Output/Debug/Obj/stm32n657xx_Vectors.o
Output/Debug/Obj/STM32N6xx_Startup.o
C:/Program Files/SEGGER/SEGGER Embedded Studio 8.30a/lib/libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a
C:/Program Files/SEGGER/SEGGER Embedded Studio 8.30a/lib/SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a
C:/Program Files/SEGGER/SEGGER Embedded Studio 8.30a/lib/prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a
C:/Program Files/SEGGER/SEGGER Embedded Studio 8.30a/lib/heapops_disable_interrupts_locking_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a
C:/Program Files/SEGGER/SEGGER Embedded Studio 8.30a/lib/strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a
C:/Program Files/SEGGER/SEGGER Embedded Studio 8.30a/lib/mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a

LINKER SCRIPT

Linker script 'D:/Projekte/hadewe_blto2/trunk/firmware/FSBL/SES/STM32N6xx_RAM.icf'

/*********************************************************************
*                    SEGGER Microcontroller GmbH                     *
*                        The Embedded Experts                        *
**********************************************************************
*                                                                    *
*            (c) 2014 - 2026 SEGGER Microcontroller GmbH             *
*                                                                    *
*       www.segger.com     Support: support@segger.com               *
*                                                                    *
**********************************************************************
*                                                                    *
* All rights reserved.                                               *
*                                                                    *
* Redistribution and use in source and binary forms, with or         *
* without modification, are permitted provided that the following    *
* condition is met:                                                  *
*                                                                    *
* - Redistributions of source code must retain the above copyright   *
*   notice, this condition and the following disclaimer.             *
*                                                                    *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND             *
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,        *
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF           *
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE           *
* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR           *
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT  *
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;    *
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF      *
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT          *
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE  *
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH   *
* DAMAGE.                                                            *
*                                                                    *
**********************************************************************
-------------------------- END-OF-HEADER -----------------------------

File    : STM32N6xx_RAM.icf
Purpose : STM32N6xx linker script for application placement in RAM
          (to be copied to RAM by bootloader or debugger)
          for use with the SEGGER Linker.
Maps    : STM32N645A0HxQ, STM32N645B0HxQ, STM32N645I0HxQ, STM32N645L0HxQ,
          STM32N645X0HxQ, STM32N645Z0HxQ, STM32N647A0HxQ, STM32N647B0HxQ,
          STM32N647I0HxQ, STM32N647L0HxQ, STM32N647X0HxQ, STM32N647Z0HxQ,
          STM32N655A0HxQ, STM32N655B0HxQ, STM32N655I0HxQ, STM32N655L0HxQ,
          STM32N655X0HxQ, STM32N655Z0HxQ, STM32N657A0HxQ, STM32N657B0HxQ,
          STM32N657I0HxQ, STM32N657L0HxQ, STM32N657X0HxQ, STM32N657Z0HxQ
Literature:
  [1]  SEGGER Linker User Guide (https://www.segger.com/doc/UM20005_Linker.html)
  [2]  SEGGER Linker Section Placement (https://wiki.segger.com/SEGGER_Linker_Script_Files)
*/

define memory with size = 4G;

//
// Combined regions per memory type
//
define region FLASH = AXI_RAM2;
define region RAM   = FLEX_RAM;

//
// Block definitions
//
define block ctors                          { section .ctors,     section .ctors.*, block with         alphabetical order { init_array } };
define block dtors                          { section .dtors,     section .dtors.*, block with reverse alphabetical order { fini_array } };
define block exidx                          { section .ARM.exidx, section .ARM.exidx.* };
define block tbss                           { section .tbss,      section .tbss.*  };
define block tdata                          { section .tdata,     section .tdata.* };
define block tls with fixed order           { block tbss, block tdata };
define block tdata_load                     { copy of block tdata };
define block heap           with auto size = __HEAPSIZE__,  alignment = 8, readwrite access { };
define block stack          with      size = __STACKSIZE__, alignment = 8, readwrite access { };
define block stack_process  with      size = __STACKSIZE_PROCESS__, alignment = 8, /* fill =0xCD, */ readwrite access { };

//
// Explicit initialization settings for sections
// Packing options for initialize by copy: packing=auto/lzss/zpak/packbits
//
do not initialize                           { section .non_init, section .non_init.*, section .*.non_init, section .*.non_init.* };
do not initialize                           { section .no_init, section .no_init.*, section .*.no_init, section .*.no_init.* };   // Legacy sections, kept for backwards compatibility
do not initialize                           { section .noinit, section .noinit.*, section .*.noinit, section .*.noinit.* };       // Legacy sections, used by some SDKs/HALs
do not initialize                           { section .vectors_ram };
initialize by copy with packing=auto        { section .data, section .data.*, section .*.data, section .*.data.* };               // Static data sections
initialize by copy with packing=auto        { section .fast, section .fast.*, section .*.fast, section .*.fast.* };               // "RAM Code" sections

initialize by calling __SEGGER_STOP_X_InitLimits    { section .data.stop.* };

#define USES_ALLOC_FUNC                                   \
  linked symbol malloc || linked symbol aligned_alloc ||  \
  linked symbol calloc || linked symbol realloc

initialize by calling __SEGGER_init_heap if USES_ALLOC_FUNC { block heap };                        // Init the heap if one is required
initialize by calling __SEGGER_init_ctors    { block ctors };                                      // Call constructors for global objects which need to be constructed before reaching main (if any). Make sure this is done after setting up heap.

//assert with warning "free() linked into application but there are no calls to an allocation function!" {
//  linked symbol free => USES_ALLOC_FUNC
//};

assert with error "heap is too small!"              { USES_ALLOC_FUNC => size  of block heap >= 48 };
assert with error "heap size not a multiple of 8!"  { USES_ALLOC_FUNC => size  of block heap % 8 == 0 };
assert with error "heap not correctly aligned!"     { USES_ALLOC_FUNC => start of block heap % 8 == 0 };

//
// FLASH Placement
//
place at start of FLASH                     { section vectors };                                    // Vector table section
place in FLASH with minimum size order      { block tdata_load,                                     // Thread-local-storage load image
                                              block exidx,                                          // ARM exception unwinding block
                                              block ctors,                                          // Constructors block
                                              block dtors,                                          // Destructors block
                                              readonly,                                             // Catch-all for readonly data (e.g. .rodata, .srodata)
                                              readexec                                              // Catch-all for (readonly) executable code (e.g. .text)
                                            };


//
// Explicit placement in RAMn
//
place in AHB_RAM1                           { section .AHB_RAM1, section .AHB_RAM1.* };
place in AHB_RAM2                           { section .AHB_RAM2, section .AHB_RAM2.* };
place in AXI_RAM1                           { section .AXI_RAM1, section .AXI_RAM1.* };  // This region may be deactivated and not accessible
place in AXI_RAM2                           { section .AXI_RAM2, section .AXI_RAM2.* };  // This region may be deactivated and not accessible
place in AXI_RAM3                           { section .AXI_RAM3, section .AXI_RAM3.* };  // This region may be deactivated and not accessible
place in AXI_RAM4                           { section .AXI_RAM4, section .AXI_RAM4.* };  // This region may be deactivated and not accessible
place in BKP_RAM                            { section .BKP_RAM,  section .BKP_RAM.*  };  // This region may be deactivated and not accessible
place in DTCM_RAM                           { section .DTCM_RAM, section .DTCM_RAM.* };  // This region may be deactivated and not accessible
place in FLEX_RAM                           { section .FLEX_RAM, section .FLEX_RAM.* };
place in ITCM_RAM                           { section .ITCM_RAM, section .ITCM_RAM.* };  // This region may be deactivated and not accessible

//
// RAM Placement
//
place in RAM                                { section .fast, section .fast.* };                     // "ramfunc" section
place in RAM with auto order                { block tls,                                            // Thread-local-storage block
                                              readwrite,                                            // Catch-all for initialized/uninitialized data sections (e.g. .data, .noinit)
                                              zeroinit                                              // Catch-all for zero-initialized data sections (e.g. .bss)
                                            };
place in RAM                                { block heap };                                         // Heap reserved block
place at end of RAM                         { block stack };                                        // Stack reserved block at the end

PLACEMENT SUMMARY

place at 0x34064000

Symbol or [section] name Type Address Size Align Object File
[.bss.block.stack] None 0x34062000 8 192 8 [ Linker created ]

"<#4> at line 107, col 45": place in [0x34180400 to 0x341FFFFF] with maximum packing

Symbol or [section] name Type Address Size Align Object File
_vectors Code 0x34180400 844 1024 stm32n657xx_Vectors.o
Error_Handler Code 0x3418074C 4 4 blto2_FSBL_lto.o
__SEGGER_RTL_ipow10 Cnst 0x34180750 160 8 prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_vfprintf_short_float_long_long Code 0x341807F0 3 036 8 __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
HAL_MspInit Code 0x341813CC 8 4 blto2_FSBL_lto.o
SysTick_Handler Code 0x341813D4 8 4 blto2_FSBL_lto.o
SystemCoreClockUpdate Code 0x341813DC 828 4 blto2_FSBL_lto.o
HAL_XSPI_MspInit Code 0x34181718 324 4 blto2_FSBL_lto.o
HAL_Init Code 0x3418185C 48 4 blto2_FSBL_lto.o
HAL_GetTick Code 0x3418188C 12 4 blto2_FSBL_lto.o
HAL_BSEC_OTP_Read Code 0x34181898 124 4 blto2_FSBL_lto.o
__NVIC_SetPriorityGrouping Code 0x34181914 60 4 blto2_FSBL_lto.o
HAL_NVIC_SetPriority Code 0x34181950 168 4 blto2_FSBL_lto.o
__NVIC_GetPriorityGrouping Code 0x341819F8 16 4 blto2_FSBL_lto.o
NVIC_EncodePriority Code 0x34181A08 100 4 blto2_FSBL_lto.o
HAL_SYSTICK_Config Code 0x34181A6C 16 4 blto2_FSBL_lto.o
HAL_DMA_Abort Code 0x34181A7C 244 4 blto2_FSBL_lto.o
HAL_GPIO_Init Code 0x34181B70 1 928 4 blto2_FSBL_lto.o
LL_RCC_HSI_SetDivider Code 0x341822F8 28 4 blto2_FSBL_lto.o
LL_RCC_HSI_IsReady Code 0x34182314 16 4 blto2_FSBL_lto.o
LL_RCC_GetCpuClkSource Code 0x34182324 16 4 blto2_FSBL_lto.o
LL_RCC_GetSysClkSource Code 0x34182334 16 4 blto2_FSBL_lto.o
LL_RCC_PLL1_GetSource Code 0x34182344 16 4 blto2_FSBL_lto.o
LL_RCC_PLL2_GetSource Code 0x34182354 16 4 blto2_FSBL_lto.o
LL_RCC_PLL3_GetSource Code 0x34182364 16 4 blto2_FSBL_lto.o
LL_RCC_PLL4_GetSource Code 0x34182374 16 4 blto2_FSBL_lto.o
LL_RCC_MSI_SetFrequency Code 0x34182384 28 4 blto2_FSBL_lto.o
LL_RCC_MSI_IsReady Code 0x341823A0 16 4 blto2_FSBL_lto.o
LL_RCC_LSI_IsReady Code 0x341823B0 16 4 blto2_FSBL_lto.o
LL_RCC_LSE_IsReady Code 0x341823C0 16 4 blto2_FSBL_lto.o
LL_RCC_PLL1_IsReady Code 0x341823D0 16 4 blto2_FSBL_lto.o
LL_RCC_IC1_GetSource Code 0x341823E0 16 4 blto2_FSBL_lto.o
LL_RCC_IC2_GetSource Code 0x341823F0 16 4 blto2_FSBL_lto.o
LL_RCC_IC6_GetSource Code 0x34182400 16 4 blto2_FSBL_lto.o
LL_RCC_IC11_GetSource Code 0x34182410 16 4 blto2_FSBL_lto.o
LL_RCC_PLL2_IsReady Code 0x34182420 16 4 blto2_FSBL_lto.o
LL_RCC_PLL3_IsReady Code 0x34182430 16 4 blto2_FSBL_lto.o
LL_RCC_PLL4_IsReady Code 0x34182440 16 4 blto2_FSBL_lto.o
RCC_PLL_Source_IsReady Code 0x34182450 84 4 blto2_FSBL_lto.o
LL_RCC_HSE_IsReady Code 0x341824A4 16 4 blto2_FSBL_lto.o
LL_RCC_HSI_GetDivider Code 0x341824B4 16 4 blto2_FSBL_lto.o
LL_RCC_PLL1_IsEnabledBypass Code 0x341824C4 16 4 blto2_FSBL_lto.o
LL_RCC_PLL2_IsEnabledBypass Code 0x341824D4 16 4 blto2_FSBL_lto.o
LL_RCC_PLL3_IsEnabledBypass Code 0x341824E4 16 4 blto2_FSBL_lto.o
LL_RCC_PLL4_IsEnabledBypass Code 0x341824F4 16 4 blto2_FSBL_lto.o
RCC_GetSysClockFreq Code 0x34182504 232 4 blto2_FSBL_lto.o
HAL_RCC_GetClockConfig Code 0x341825EC 240 4 blto2_FSBL_lto.o
HAL_RCCEx_PeriphCLKConfig Code 0x341826DC 24 268 4 blto2_FSBL_lto.o
LL_RCC_GetRTCClockSource Code 0x341885A8 16 4 blto2_FSBL_lto.o
LL_RCC_LSE_IsReady.59 Code 0x341885B8 16 4 blto2_FSBL_lto.o
LL_RCC_SetRTC_HSEPrescaler Code 0x341885C8 28 4 blto2_FSBL_lto.o
LL_RCC_SetRTCClockSource Code 0x341885E4 28 4 blto2_FSBL_lto.o
LL_RCC_IC10_Enable.61 Code 0x34188600 16 4 blto2_FSBL_lto.o
LL_RCC_IC15_Enable.62 Code 0x34188610 16 4 blto2_FSBL_lto.o
LL_RCC_IC19_Enable Code 0x34188620 16 4 blto2_FSBL_lto.o
LL_RCC_IC20_Enable.63 Code 0x34188630 16 4 blto2_FSBL_lto.o
LL_RCC_SetCLKPClockSource Code 0x34188640 28 4 blto2_FSBL_lto.o
LL_RCC_SetXSPIClockSource Code 0x3418865C 16 4 blto2_FSBL_lto.o
LL_RCC_SetFMCClockSource Code 0x3418866C 28 4 blto2_FSBL_lto.o
LL_RCC_SetSDMMCClockSource Code 0x34188688 16 4 blto2_FSBL_lto.o
LL_RCC_SetADFClockSource Code 0x34188698 28 4 blto2_FSBL_lto.o
LL_RCC_IC18_Enable Code 0x341886B4 16 4 blto2_FSBL_lto.o
LL_RCC_IC17_Enable Code 0x341886C4 16 4 blto2_FSBL_lto.o
LL_RCC_SetDCMIPPClockSource Code 0x341886D4 28 4 blto2_FSBL_lto.o
LL_RCC_IC12_Enable Code 0x341886F0 16 4 blto2_FSBL_lto.o
LL_RCC_SetETHClockSource Code 0x34188700 28 4 blto2_FSBL_lto.o
LL_RCC_SetETHPHYInterface Code 0x3418871C 28 4 blto2_FSBL_lto.o
LL_RCC_SetETHREFRXClockSource Code 0x34188738 28 4 blto2_FSBL_lto.o
LL_RCC_SetETHREFTXClockSource Code 0x34188754 28 4 blto2_FSBL_lto.o
LL_RCC_IC13_Enable Code 0x34188770 16 4 blto2_FSBL_lto.o
LL_RCC_SetFDCANClockSource Code 0x34188780 28 4 blto2_FSBL_lto.o
LL_RCC_SetI2CClockSource Code 0x3418879C 16 4 blto2_FSBL_lto.o
LL_RCC_SetI3CClockSource Code 0x341887AC 16 4 blto2_FSBL_lto.o
LL_RCC_SetLPTIMClockSource Code 0x341887BC 16 4 blto2_FSBL_lto.o
LL_RCC_IC9_Enable Code 0x341887CC 16 4 blto2_FSBL_lto.o
LL_RCC_IC14_Enable Code 0x341887DC 16 4 blto2_FSBL_lto.o
LL_RCC_SetLPUARTClockSource Code 0x341887EC 28 4 blto2_FSBL_lto.o
LL_RCC_IC16_Enable Code 0x34188808 16 4 blto2_FSBL_lto.o
LL_RCC_SetLTDCClockSource Code 0x34188818 28 4 blto2_FSBL_lto.o
LL_RCC_SetMDFClockSource Code 0x34188834 28 4 blto2_FSBL_lto.o
LL_RCC_SetPSSIClockSource Code 0x34188850 28 4 blto2_FSBL_lto.o
LL_RCC_SetSAIClockSource Code 0x3418886C 16 4 blto2_FSBL_lto.o
LL_RCC_SetSPDIFRXClockSource Code 0x3418887C 28 4 blto2_FSBL_lto.o
LL_RCC_SetSPIClockSource Code 0x34188898 16 4 blto2_FSBL_lto.o
LL_RCC_SetUSARTClockSource Code 0x341888A8 16 4 blto2_FSBL_lto.o
LL_RCC_SetOTGPHYClockSource Code 0x341888B8 16 4 blto2_FSBL_lto.o
LL_RCC_SetOTGPHYCKREFClockSource Code 0x341888C8 16 4 blto2_FSBL_lto.o
LL_RCC_SetClockSource Code 0x341888D8 52 4 blto2_FSBL_lto.o
LL_RCC_GetADCPrescaler Code 0x3418890C 16 4 blto2_FSBL_lto.o
LL_RCC_GetETH1PTPDivider Code 0x3418891C 16 4 blto2_FSBL_lto.o
LL_RCC_GetI2CClockSource Code 0x3418892C 16 4 blto2_FSBL_lto.o
LL_RCC_GetI3CClockSource Code 0x3418893C 16 4 blto2_FSBL_lto.o
LL_RCC_GetLPTIMClockSource Code 0x3418894C 16 4 blto2_FSBL_lto.o
LL_RCC_GetSAIClockSource Code 0x3418895C 16 4 blto2_FSBL_lto.o
LL_RCC_GetSDMMCClockSource Code 0x3418896C 16 4 blto2_FSBL_lto.o
LL_RCC_GetSPIClockSource Code 0x3418897C 16 4 blto2_FSBL_lto.o
LL_RCC_GetTIMPrescaler Code 0x3418898C 16 4 blto2_FSBL_lto.o
LL_RCC_GetUSARTClockSource Code 0x3418899C 16 4 blto2_FSBL_lto.o
LL_RCC_HSE_IsSelectedHSEDiv2AsDiv2Clock Code 0x341889AC 16 4 blto2_FSBL_lto.o
LL_RCC_GetXSPIClockSource Code 0x341889BC 16 4 blto2_FSBL_lto.o
LL_RCC_GetClockSource Code 0x341889CC 48 4 blto2_FSBL_lto.o
RCCEx_GetADFCLKFreq Code 0x341889FC 388 4 blto2_FSBL_lto.o
RCCEx_GetCLKPCLKFreq Code 0x34188B80 736 4 blto2_FSBL_lto.o
RCCEx_GetDCMIPPCLKFreq Code 0x34188E60 228 4 blto2_FSBL_lto.o
RCCEx_GetETH1CLKFreq Code 0x34188F44 216 4 blto2_FSBL_lto.o
RCCEx_GetI3CCLKFreq Code 0x3418901C 516 4 blto2_FSBL_lto.o
RCCEx_GetLPUARTCLKFreq Code 0x34189220 412 4 blto2_FSBL_lto.o
RCCEx_GetLTDCCLKFreq Code 0x341893BC 228 4 blto2_FSBL_lto.o
RCCEx_GetMDFCLKFreq Code 0x341894A0 436 4 blto2_FSBL_lto.o
RCCEx_GetSDMMCCLKFreq Code 0x34189654 396 4 blto2_FSBL_lto.o
RCCEx_GetSPDIFRXCLKFreq Code 0x341897E0 372 4 blto2_FSBL_lto.o
RCCEx_GetSPICLKFreq Code 0x34189954 1 196 4 blto2_FSBL_lto.o
RCCEx_GetUSARTCLKFreq Code 0x34189E00 916 4 blto2_FSBL_lto.o
RCCEx_GetUARTCLKFreq Code 0x3418A194 916 4 blto2_FSBL_lto.o
RCCEx_GetOTGPHYCLKFreq Code 0x3418A528 324 4 blto2_FSBL_lto.o
RCCEx_GetOTGPHYCKREFCLKFreq Code 0x3418A66C 148 4 blto2_FSBL_lto.o
RCCEx_GetXSPICLKFreq Code 0x3418A700 452 4 blto2_FSBL_lto.o
RCCEx_GetHCLKFreq Code 0x3418A8C4 28 4 blto2_FSBL_lto.o
LL_RCC_IC3_IsEnabled Code 0x3418A8E0 16 4 blto2_FSBL_lto.o
LL_RCC_IC3_GetSource Code 0x3418A8F0 16 4 blto2_FSBL_lto.o
LL_RCC_IC4_IsEnabled Code 0x3418A900 16 4 blto2_FSBL_lto.o
LL_RCC_IC4_GetSource Code 0x3418A910 16 4 blto2_FSBL_lto.o
LL_RCC_PLL4_IsReady.74 Code 0x3418A920 16 4 blto2_FSBL_lto.o
LL_RCC_PLL4P_IsEnabled Code 0x3418A930 16 4 blto2_FSBL_lto.o
LL_RCC_PLL4_GetSource.75 Code 0x3418A940 16 4 blto2_FSBL_lto.o
RCCEx_GetPLLSourceFreq Code 0x3418A950 140 4 blto2_FSBL_lto.o
LL_RCC_PLL4_GetM Code 0x3418A9DC 16 4 blto2_FSBL_lto.o
LL_RCC_PLL4_GetN Code 0x3418A9EC 16 4 blto2_FSBL_lto.o
LL_RCC_PLL4_GetFRACN Code 0x3418A9FC 16 4 blto2_FSBL_lto.o
LL_RCC_PLL4_GetP1 Code 0x3418AA0C 16 4 blto2_FSBL_lto.o
LL_RCC_PLL4_GetP2 Code 0x3418AA1C 16 4 blto2_FSBL_lto.o
RCCEx_CalcPLLFreq Code 0x3418AA2C 136 4 blto2_FSBL_lto.o
LL_RCC_PLL4_IsEnabledBypass.76 Code 0x3418AAB4 16 4 blto2_FSBL_lto.o
LL_RCC_HSI_IsReady.77 Code 0x3418AAC4 16 4 blto2_FSBL_lto.o
LL_RCC_HSI_GetDivider.78 Code 0x3418AAD4 16 4 blto2_FSBL_lto.o
LL_RCC_MSI_IsReady.79 Code 0x3418AAE4 16 4 blto2_FSBL_lto.o
LL_RCC_MSI_GetFrequency Code 0x3418AAF4 16 4 blto2_FSBL_lto.o
LL_RCC_HSE_IsReady.80 Code 0x3418AB04 16 4 blto2_FSBL_lto.o
LL_RCC_PLL3_IsReady.81 Code 0x3418AB14 16 4 blto2_FSBL_lto.o
LL_RCC_PLL3P_IsEnabled Code 0x3418AB24 16 4 blto2_FSBL_lto.o
LL_RCC_PLL3_GetSource.82 Code 0x3418AB34 16 4 blto2_FSBL_lto.o
LL_RCC_PLL3_GetM Code 0x3418AB44 16 4 blto2_FSBL_lto.o
LL_RCC_PLL3_GetN Code 0x3418AB54 16 4 blto2_FSBL_lto.o
LL_RCC_PLL3_GetFRACN Code 0x3418AB64 16 4 blto2_FSBL_lto.o
LL_RCC_PLL3_GetP1 Code 0x3418AB74 16 4 blto2_FSBL_lto.o
LL_RCC_PLL3_GetP2 Code 0x3418AB84 16 4 blto2_FSBL_lto.o
LL_RCC_PLL3_IsEnabledBypass.83 Code 0x3418AB94 16 4 blto2_FSBL_lto.o
LL_RCC_PLL2_IsReady.84 Code 0x3418ABA4 16 4 blto2_FSBL_lto.o
LL_RCC_PLL2P_IsEnabled Code 0x3418ABB4 16 4 blto2_FSBL_lto.o
LL_RCC_PLL2_GetSource.85 Code 0x3418ABC4 16 4 blto2_FSBL_lto.o
LL_RCC_PLL2_GetM Code 0x3418ABD4 16 4 blto2_FSBL_lto.o
LL_RCC_PLL2_GetN Code 0x3418ABE4 16 4 blto2_FSBL_lto.o
LL_RCC_PLL2_GetFRACN Code 0x3418ABF4 16 4 blto2_FSBL_lto.o
LL_RCC_PLL2_GetP1 Code 0x3418AC04 16 4 blto2_FSBL_lto.o
LL_RCC_PLL2_GetP2 Code 0x3418AC14 16 4 blto2_FSBL_lto.o
LL_RCC_PLL2_IsEnabledBypass.86 Code 0x3418AC24 16 4 blto2_FSBL_lto.o
LL_RCC_PLL1_IsReady.87 Code 0x3418AC34 16 4 blto2_FSBL_lto.o
LL_RCC_PLL1P_IsEnabled Code 0x3418AC44 16 4 blto2_FSBL_lto.o
LL_RCC_PLL1_GetSource.88 Code 0x3418AC54 16 4 blto2_FSBL_lto.o
LL_RCC_PLL1_GetM Code 0x3418AC64 16 4 blto2_FSBL_lto.o
LL_RCC_PLL1_GetN Code 0x3418AC74 16 4 blto2_FSBL_lto.o
LL_RCC_PLL1_GetFRACN Code 0x3418AC84 16 4 blto2_FSBL_lto.o
LL_RCC_PLL1_GetP1 Code 0x3418AC94 16 4 blto2_FSBL_lto.o
LL_RCC_PLL1_GetP2 Code 0x3418ACA4 16 4 blto2_FSBL_lto.o
LL_RCC_PLL1_IsEnabledBypass.89 Code 0x3418ACB4 16 4 blto2_FSBL_lto.o
LL_RCC_GetAHBPrescaler.90 Code 0x3418ACC4 16 4 blto2_FSBL_lto.o
LL_RCC_GetUSBClockSource Code 0x3418ACD4 16 4 blto2_FSBL_lto.o
LL_RCC_IC15_IsEnabled Code 0x3418ACE4 16 4 blto2_FSBL_lto.o
LL_RCC_IC15_GetSource Code 0x3418ACF4 16 4 blto2_FSBL_lto.o
LL_RCC_GetUARTClockSource Code 0x3418AD04 16 4 blto2_FSBL_lto.o
RCCEx_GetPCLK1Freq Code 0x3418AD14 28 4 blto2_FSBL_lto.o
RCCEx_GetPCLK2Freq Code 0x3418AD30 28 4 blto2_FSBL_lto.o
LL_RCC_IC9_IsEnabled Code 0x3418AD4C 16 4 blto2_FSBL_lto.o
LL_RCC_IC9_GetSource Code 0x3418AD5C 16 4 blto2_FSBL_lto.o
LL_RCC_IC14_IsEnabled Code 0x3418AD6C 16 4 blto2_FSBL_lto.o
LL_RCC_IC14_GetSource Code 0x3418AD7C 16 4 blto2_FSBL_lto.o
LL_RCC_GetAPB2Prescaler.91 Code 0x3418AD8C 16 4 blto2_FSBL_lto.o
LL_RCC_GetAPB1Prescaler.92 Code 0x3418AD9C 16 4 blto2_FSBL_lto.o
RCCEx_GetPCLK4Freq Code 0x3418ADAC 28 4 blto2_FSBL_lto.o
LL_RCC_IC8_IsEnabled Code 0x3418ADC8 16 4 blto2_FSBL_lto.o
LL_RCC_IC8_GetSource Code 0x3418ADD8 16 4 blto2_FSBL_lto.o
LL_RCC_GetAPB4Prescaler.93 Code 0x3418ADE8 16 4 blto2_FSBL_lto.o
LL_RCC_IC7_IsEnabled Code 0x3418ADF8 16 4 blto2_FSBL_lto.o
LL_RCC_IC7_GetSource Code 0x3418AE08 16 4 blto2_FSBL_lto.o
LL_RCC_IC5_IsEnabled Code 0x3418AE18 16 4 blto2_FSBL_lto.o
LL_RCC_IC5_GetSource Code 0x3418AE28 16 4 blto2_FSBL_lto.o
LL_RCC_LSI_IsReady.94 Code 0x3418AE38 16 4 blto2_FSBL_lto.o
LL_RCC_IC20_IsEnabled Code 0x3418AE48 16 4 blto2_FSBL_lto.o
LL_RCC_IC20_GetSource Code 0x3418AE58 16 4 blto2_FSBL_lto.o
RCCEx_GetPCLK5Freq Code 0x3418AE68 28 4 blto2_FSBL_lto.o
LL_RCC_IC16_IsEnabled Code 0x3418AE84 16 4 blto2_FSBL_lto.o
LL_RCC_IC16_GetSource Code 0x3418AE94 16 4 blto2_FSBL_lto.o
LL_RCC_GetAPB5Prescaler.95 Code 0x3418AEA4 16 4 blto2_FSBL_lto.o
LL_RCC_IC10_IsEnabled Code 0x3418AEB4 16 4 blto2_FSBL_lto.o
LL_RCC_IC10_GetSource Code 0x3418AEC4 16 4 blto2_FSBL_lto.o
LL_RCC_IC19_IsEnabled Code 0x3418AED4 16 4 blto2_FSBL_lto.o
LL_RCC_IC19_GetSource Code 0x3418AEE4 16 4 blto2_FSBL_lto.o
LL_RCC_IC13_IsEnabled Code 0x3418AEF4 16 4 blto2_FSBL_lto.o
LL_RCC_IC13_GetSource Code 0x3418AF04 16 4 blto2_FSBL_lto.o
LL_RCC_IC12_IsEnabled Code 0x3418AF14 16 4 blto2_FSBL_lto.o
LL_RCC_IC12_GetSource Code 0x3418AF24 16 4 blto2_FSBL_lto.o
LL_RCC_IC17_IsEnabled Code 0x3418AF34 16 4 blto2_FSBL_lto.o
LL_RCC_IC17_GetSource Code 0x3418AF44 16 4 blto2_FSBL_lto.o
LL_RCC_CLKP_IsEnabled Code 0x3418AF54 16 4 blto2_FSBL_lto.o
LL_RCC_IC18_IsEnabled Code 0x3418AF64 16 4 blto2_FSBL_lto.o
LL_RCC_IC18_GetSource Code 0x3418AF74 16 4 blto2_FSBL_lto.o
HAL_XSPI_Init Code 0x3418AF84 1 548 4 blto2_FSBL_lto.o
XSPI_WaitFlagStateUntilTimeout Code 0x3418B590 104 4 blto2_FSBL_lto.o
XSPI_ConfigCmd Code 0x3418B5F8 924 4 blto2_FSBL_lto.o
HAL_XSPI_Receive Code 0x3418B994 300 4 blto2_FSBL_lto.o
LL_AHB5_GRP1_IsEnabledClock Code 0x3418BAC0 28 4 blto2_FSBL_lto.o
JumpToApplication Code 0x3418BADC 356 4 blto2_FSBL_lto.o
CheckSFDP_Signature Code 0x3418BC40 80 4 blto2_FSBL_lto.o
SFDP_GetHeader Code 0x3418BC90 256 4 blto2_FSBL_lto.o
sfdp_get_paraminfo Code 0x3418BD90 652 4 blto2_FSBL_lto.o
SFDP_BuildGenericDriver Code 0x3418C01C 3 092 4 blto2_FSBL_lto.o
JEDEC_Basic_Manage4S4S4SEnableSequence Code 0x3418CC30 132 4 blto2_FSBL_lto.o
sfdp_getfrequencevalue Code 0x3418CCB4 64 4 blto2_FSBL_lto.o
sfdp_set_dummycycle Code 0x3418CCF4 420 4 blto2_FSBL_lto.o
EXTMEM_DRIVER_NOR_SFDP_DeInit Code 0x3418CE98 16 4 blto2_FSBL_lto.o
EXTMEM_DRIVER_NOR_SFDP_Disable_MemoryMappedMode Code 0x3418CEA8 36 4 blto2_FSBL_lto.o
SAL_XSPI_SetClock Code 0x3418CECC 116 4 blto2_FSBL_lto.o
XSPI_FormatCommand Code 0x3418CF40 88 4 blto2_FSBL_lto.o
SAL_XSPI_GetId Code 0x3418CF98 152 4 blto2_FSBL_lto.o
XSPI_Transmit Code 0x3418D030 32 4 blto2_FSBL_lto.o
SAL_XSPI_CommandSendData Code 0x3418D050 136 4 blto2_FSBL_lto.o
SAL_XSPI_SendReadCommand Code 0x3418D0D8 136 4 blto2_FSBL_lto.o
SAL_XSPI_CheckStatusRegister Code 0x3418D160 232 4 blto2_FSBL_lto.o
SAL_XSPI_EnableMapMode Code 0x3418D248 200 4 blto2_FSBL_lto.o
SAL_XSPI_UpdateMemoryType Code 0x3418D310 116 4 blto2_FSBL_lto.o
EXTMEM_MemoryMappedMode Code 0x3418D384 140 4 blto2_FSBL_lto.o
EXTMEM_GetMapAddress Code 0x3418D410 196 4 blto2_FSBL_lto.o
SFDP_BuildGenericDriver.chip_erase_unit Cnst 0x3418D4D4 16 4 blto2_FSBL_lto.o
_start Code 0x3418D4E4 20 4 SEGGER_THUMB_Startup.o
reset_handler Code 0x3418D4F8 68 4 STM32N6xx_Startup.o
fmodf Code 0x3418D53C 284 4 floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
floorf Code 0x3418D658 104 4 floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_aPower2f Cnst 0x3418D6C0 24 4 utilops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__aeabi_ul2f Code 0x3418D6D8 84 4 floatasmops_arm.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
memcpy Code 0x3418D72C 92 4 strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__aeabi_memclr Code 0x3418D788 104 4 strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_c_locale Cnst 0x3418D7F0 12 4 mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_codeset_ascii Cnst 0x3418D7FC 32 4 mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_c_locale_data Cnst 0x3418D81C 88 4 mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
MX_BSEC_Init Code 0x3418D874 2 4 blto2_FSBL_lto.o
[.rodata..L__const.sfdp_getfrequencevalue.freqMhz_table] Cnst 0x3418D876 26 2 blto2_FSBL_lto.o
MX_EXTMEM_MANAGER_Init Code 0x3418D890 62 4 blto2_FSBL_lto.o
PVD_PVM_IRQHandler Code 0x3418D8CE 2 2 stm32n657xx_Vectors.o
MX_GPIO_Init Code 0x3418D8D0 134 4 blto2_FSBL_lto.o
DTS_IRQHandler Code 0x3418D956 2 2 stm32n657xx_Vectors.o
LL_AHB4_GRP1_EnableClock Code 0x3418D958 34 4 blto2_FSBL_lto.o
RCC_IRQHandler Code 0x3418D97A 2 2 stm32n657xx_Vectors.o
main Code 0x3418D97C 362 4 blto2_FSBL_lto.o
LOCKUP_IRQHandler Code 0x3418DAE6 2 2 stm32n657xx_Vectors.o
SystemClock_Config Code 0x3418DAE8 254 4 blto2_FSBL_lto.o
CACHE_ECC_IRQHandler Code 0x3418DBE6 2 2 stm32n657xx_Vectors.o
OTP_Config Code 0x3418DBE8 142 4 blto2_FSBL_lto.o
TCM_ECC_IRQHandler Code 0x3418DC76 2 2 stm32n657xx_Vectors.o
LL_APB4_GRP2_EnableClock Code 0x3418DC78 34 4 blto2_FSBL_lto.o
BCK_ECC_IRQHandler Code 0x3418DC9A 2 2 stm32n657xx_Vectors.o
assert_failed Code 0x3418DC9C 10 4 blto2_FSBL_lto.o
FPU_IRQHandler Code 0x3418DCA6 2 2 stm32n657xx_Vectors.o
NMI_Handler Code 0x3418DCA8 2 4 blto2_FSBL_lto.o
RTC_S_IRQHandler Code 0x3418DCAA 2 2 stm32n657xx_Vectors.o
HardFault_Handler Code 0x3418DCAC 2 4 blto2_FSBL_lto.o
TAMP_IRQHandler Code 0x3418DCAE 2 2 stm32n657xx_Vectors.o
MemManage_Handler Code 0x3418DCB0 2 4 blto2_FSBL_lto.o
RIFSC_TAMPER_IRQHandler Code 0x3418DCB2 2 2 stm32n657xx_Vectors.o
BusFault_Handler Code 0x3418DCB4 2 4 blto2_FSBL_lto.o
IAC_IRQHandler Code 0x3418DCB6 2 2 stm32n657xx_Vectors.o
UsageFault_Handler Code 0x3418DCB8 2 4 blto2_FSBL_lto.o
RCC_S_IRQHandler Code 0x3418DCBA 2 2 stm32n657xx_Vectors.o
SVC_Handler Code 0x3418DCBC 2 4 blto2_FSBL_lto.o
RTC_IRQHandler Code 0x3418DCBE 2 2 stm32n657xx_Vectors.o
DebugMon_Handler Code 0x3418DCC0 2 4 blto2_FSBL_lto.o
IWDG_IRQHandler Code 0x3418DCC2 2 2 stm32n657xx_Vectors.o
PendSV_Handler Code 0x3418DCC4 2 4 blto2_FSBL_lto.o
WWDG_IRQHandler Code 0x3418DCC6 2 2 stm32n657xx_Vectors.o
SystemInit Code 0x3418DCC8 510 4 blto2_FSBL_lto.o
EXTI0_IRQHandler Code 0x3418DEC6 2 2 stm32n657xx_Vectors.o
MX_XSPI2_Init Code 0x3418DEC8 126 4 blto2_FSBL_lto.o
EXTI1_IRQHandler Code 0x3418DF46 2 2 stm32n657xx_Vectors.o
LL_APB4_GRP2_EnableClock.7 Code 0x3418DF48 34 4 blto2_FSBL_lto.o
EXTI2_IRQHandler Code 0x3418DF6A 2 2 stm32n657xx_Vectors.o
LL_AHB4_GRP1_EnableClock.8 Code 0x3418DF6C 34 4 blto2_FSBL_lto.o
EXTI3_IRQHandler Code 0x3418DF8E 2 2 stm32n657xx_Vectors.o
LL_AHB5_GRP1_EnableClock Code 0x3418DF90 34 4 blto2_FSBL_lto.o
EXTI4_IRQHandler Code 0x3418DFB2 2 2 stm32n657xx_Vectors.o
HAL_InitTick Code 0x3418DFB4 126 4 blto2_FSBL_lto.o
EXTI5_IRQHandler Code 0x3418E032 2 2 stm32n657xx_Vectors.o
HAL_IncTick Code 0x3418E034 26 4 blto2_FSBL_lto.o
EXTI6_IRQHandler Code 0x3418E04E 2 2 stm32n657xx_Vectors.o
HAL_Delay Code 0x3418E050 58 4 blto2_FSBL_lto.o
EXTI7_IRQHandler Code 0x3418E08A 2 2 stm32n657xx_Vectors.o
HAL_SuspendTick Code 0x3418E08C 18 4 blto2_FSBL_lto.o
EXTI8_IRQHandler Code 0x3418E09E 2 2 stm32n657xx_Vectors.o
HAL_BSEC_OTP_Reload Code 0x3418E0A0 250 4 blto2_FSBL_lto.o
EXTI9_IRQHandler Code 0x3418E19A 2 2 stm32n657xx_Vectors.o
HAL_BSEC_OTP_Program Code 0x3418E19C 342 4 blto2_FSBL_lto.o
EXTI10_IRQHandler Code 0x3418E2F2 2 2 stm32n657xx_Vectors.o
HAL_NVIC_SetPriorityGrouping Code 0x3418E2F4 62 4 blto2_FSBL_lto.o
EXTI11_IRQHandler Code 0x3418E332 2 2 stm32n657xx_Vectors.o
__NVIC_SetPriority Code 0x3418E334 62 4 blto2_FSBL_lto.o
EXTI12_IRQHandler Code 0x3418E372 2 2 stm32n657xx_Vectors.o
SysTick_Config Code 0x3418E374 78 4 blto2_FSBL_lto.o
EXTI13_IRQHandler Code 0x3418E3C2 2 2 stm32n657xx_Vectors.o
HAL_GPIO_WritePin Code 0x3418E3C4 102 4 blto2_FSBL_lto.o
EXTI14_IRQHandler Code 0x3418E42A 2 2 stm32n657xx_Vectors.o
HAL_PWREx_ConfigSupply Code 0x3418E42C 114 4 blto2_FSBL_lto.o
EXTI15_IRQHandler Code 0x3418E49E 2 2 stm32n657xx_Vectors.o
HAL_PWREx_ControlVoltageScaling Code 0x3418E4A0 114 4 blto2_FSBL_lto.o
SAES_IRQHandler Code 0x3418E512 2 2 stm32n657xx_Vectors.o
HAL_PWREx_ConfigVddIORange Code 0x3418E514 226 4 blto2_FSBL_lto.o
CRYP_IRQHandler Code 0x3418E5F6 2 2 stm32n657xx_Vectors.o
HAL_PWREx_EnableVddIO3 Code 0x3418E5F8 18 4 blto2_FSBL_lto.o
PKA_IRQHandler Code 0x3418E60A 2 2 stm32n657xx_Vectors.o
LL_RCC_HSI_Enable Code 0x3418E60C 14 4 blto2_FSBL_lto.o
HASH_IRQHandler Code 0x3418E61A 2 2 stm32n657xx_Vectors.o
HAL_RCC_OscConfig Code 0x3418E61C 2 810 4 blto2_FSBL_lto.o
RNG_IRQHandler Code 0x3418F116 2 2 stm32n657xx_Vectors.o
LL_RCC_HSI_SetCalibTrimming Code 0x3418F118 30 4 blto2_FSBL_lto.o
MCE1_IRQHandler Code 0x3418F136 2 2 stm32n657xx_Vectors.o
LL_RCC_HSI_Disable Code 0x3418F138 14 4 blto2_FSBL_lto.o
MCE2_IRQHandler Code 0x3418F146 2 2 stm32n657xx_Vectors.o
LL_RCC_MSI_SetCalibTrimming Code 0x3418F148 30 4 blto2_FSBL_lto.o
MCE3_IRQHandler Code 0x3418F166 2 2 stm32n657xx_Vectors.o
LL_RCC_MSI_Enable Code 0x3418F168 14 4 blto2_FSBL_lto.o
MCE4_IRQHandler Code 0x3418F176 2 2 stm32n657xx_Vectors.o
LL_RCC_MSI_Disable Code 0x3418F178 14 4 blto2_FSBL_lto.o
ADC1_2_IRQHandler Code 0x3418F186 2 2 stm32n657xx_Vectors.o
LL_RCC_LSI_Enable Code 0x3418F188 14 4 blto2_FSBL_lto.o
CSI_IRQHandler Code 0x3418F196 2 2 stm32n657xx_Vectors.o
LL_RCC_LSI_Disable Code 0x3418F198 14 4 blto2_FSBL_lto.o
DCMIPP_IRQHandler Code 0x3418F1A6 2 2 stm32n657xx_Vectors.o
RCC_PLL_IsNewConfig Code 0x3418F1A8 218 4 blto2_FSBL_lto.o
PAHB_ERR_IRQHandler Code 0x3418F282 2 2 stm32n657xx_Vectors.o
RCC_PLL_Config Code 0x3418F284 846 4 blto2_FSBL_lto.o
NPU0_IRQHandler Code 0x3418F5D2 2 2 stm32n657xx_Vectors.o
RCC_PLL_Enable Code 0x3418F5D4 94 4 blto2_FSBL_lto.o
NPU1_IRQHandler Code 0x3418F632 2 2 stm32n657xx_Vectors.o
HAL_RCC_ClockConfig Code 0x3418F634 2 498 4 blto2_FSBL_lto.o
NPU2_IRQHandler Code 0x3418FFF6 2 2 stm32n657xx_Vectors.o
RCC_IC_CheckPLLSources Code 0x3418FFF8 234 4 blto2_FSBL_lto.o
NPU3_IRQHandler Code 0x341900E2 2 2 stm32n657xx_Vectors.o
LL_RCC_IC1_Enable Code 0x341900E4 14 4 blto2_FSBL_lto.o
CACHEAXI_IRQHandler Code 0x341900F2 2 2 stm32n657xx_Vectors.o
HAL_RCC_GetCpuClockFreq Code 0x341900F4 238 4 blto2_FSBL_lto.o
LTDC_LO_IRQHandler Code 0x341901E2 2 2 stm32n657xx_Vectors.o
LL_RCC_IC1_GetDivider Code 0x341901E4 22 4 blto2_FSBL_lto.o
LTDC_LO_ERR_IRQHandler Code 0x341901FA 2 2 stm32n657xx_Vectors.o
HAL_RCC_GetSysClockFreq Code 0x341901FC 26 4 blto2_FSBL_lto.o
DMA2D_IRQHandler Code 0x34190216 2 2 stm32n657xx_Vectors.o
LL_RCC_IC2_GetDivider Code 0x34190218 22 4 blto2_FSBL_lto.o
JPEG_IRQHandler Code 0x3419022E 2 2 stm32n657xx_Vectors.o
LL_RCC_IC5_Enable.60 Code 0x34190230 14 4 blto2_FSBL_lto.o
VENC_IRQHandler Code 0x3419023E 2 2 stm32n657xx_Vectors.o
LL_RCC_IC3_Enable Code 0x34190240 14 4 blto2_FSBL_lto.o
GFXMMU_IRQHandler Code 0x3419024E 2 2 stm32n657xx_Vectors.o
LL_RCC_IC4_Enable Code 0x34190250 14 4 blto2_FSBL_lto.o
GFXTIM_IRQHandler Code 0x3419025E 2 2 stm32n657xx_Vectors.o
LL_RCC_CLKP_Enable Code 0x34190260 14 4 blto2_FSBL_lto.o
GPU2D_IRQHandler Code 0x3419026E 2 2 stm32n657xx_Vectors.o
LL_RCC_IC7_Enable Code 0x34190270 14 4 blto2_FSBL_lto.o
GPU2D_ER_IRQHandler Code 0x3419027E 2 2 stm32n657xx_Vectors.o
LL_RCC_IC8_Enable Code 0x34190280 14 4 blto2_FSBL_lto.o
ICACHE_IRQHandler Code 0x3419028E 2 2 stm32n657xx_Vectors.o
LL_RCC_HSE_SelectHSEDiv2AsDiv2Clock Code 0x34190290 18 4 blto2_FSBL_lto.o
HPDMA1_Channel0_IRQHandler Code 0x341902A2 2 2 stm32n657xx_Vectors.o
LL_RCC_HSE_SelectHSEAsDiv2Clock Code 0x341902A4 18 4 blto2_FSBL_lto.o
HPDMA1_Channel1_IRQHandler Code 0x341902B6 2 2 stm32n657xx_Vectors.o
LL_RCC_SetTIMPrescaler Code 0x341902B8 30 4 blto2_FSBL_lto.o
HPDMA1_Channel2_IRQHandler Code 0x341902D6 2 2 stm32n657xx_Vectors.o
LL_RCC_GetADCClockSource Code 0x341902D8 22 4 blto2_FSBL_lto.o
HPDMA1_Channel3_IRQHandler Code 0x341902EE 2 2 stm32n657xx_Vectors.o
LL_RCC_GetADFClockSource Code 0x341902F0 22 4 blto2_FSBL_lto.o
HPDMA1_Channel4_IRQHandler Code 0x34190306 2 2 stm32n657xx_Vectors.o
LL_RCC_GetCLKPClockSource Code 0x34190308 22 4 blto2_FSBL_lto.o
HPDMA1_Channel5_IRQHandler Code 0x3419031E 2 2 stm32n657xx_Vectors.o
LL_RCC_GetDCMIPPClockSource Code 0x34190320 22 4 blto2_FSBL_lto.o
HPDMA1_Channel6_IRQHandler Code 0x34190336 2 2 stm32n657xx_Vectors.o
LL_RCC_GetETHClockSource Code 0x34190338 22 4 blto2_FSBL_lto.o
HPDMA1_Channel7_IRQHandler Code 0x3419034E 2 2 stm32n657xx_Vectors.o
LL_RCC_GetETHPTPClockSource Code 0x34190350 22 4 blto2_FSBL_lto.o
HPDMA1_Channel8_IRQHandler Code 0x34190366 2 2 stm32n657xx_Vectors.o
LL_RCC_GetFDCANClockSource Code 0x34190368 22 4 blto2_FSBL_lto.o
HPDMA1_Channel9_IRQHandler Code 0x3419037E 2 2 stm32n657xx_Vectors.o
LL_RCC_GetFMCClockSource Code 0x34190380 22 4 blto2_FSBL_lto.o
HPDMA1_Channel10_IRQHandler Code 0x34190396 2 2 stm32n657xx_Vectors.o
LL_RCC_GetLPUARTClockSource Code 0x34190398 22 4 blto2_FSBL_lto.o
HPDMA1_Channel11_IRQHandler Code 0x341903AE 2 2 stm32n657xx_Vectors.o
LL_RCC_GetLTDCClockSource Code 0x341903B0 22 4 blto2_FSBL_lto.o
HPDMA1_Channel12_IRQHandler Code 0x341903C6 2 2 stm32n657xx_Vectors.o
LL_RCC_GetMDFClockSource Code 0x341903C8 22 4 blto2_FSBL_lto.o
HPDMA1_Channel13_IRQHandler Code 0x341903DE 2 2 stm32n657xx_Vectors.o
LL_RCC_GetPSSIClockSource Code 0x341903E0 22 4 blto2_FSBL_lto.o
HPDMA1_Channel14_IRQHandler Code 0x341903F6 2 2 stm32n657xx_Vectors.o
LL_RCC_GetSPDIFRXClockSource Code 0x341903F8 22 4 blto2_FSBL_lto.o
HPDMA1_Channel15_IRQHandler Code 0x3419040E 2 2 stm32n657xx_Vectors.o
HAL_RCCEx_GetPeriphCLKFreq Code 0x34190410 1 626 4 blto2_FSBL_lto.o
GPDMA1_Channel0_IRQHandler Code 0x34190A6A 2 2 stm32n657xx_Vectors.o
RCCEx_GetADCCLKFreq Code 0x34190A6C 438 4 blto2_FSBL_lto.o
GPDMA1_Channel1_IRQHandler Code 0x34190C22 2 2 stm32n657xx_Vectors.o
RCCEx_GetCSICLKFreq Code 0x34190C24 134 4 blto2_FSBL_lto.o
GPDMA1_Channel2_IRQHandler Code 0x34190CAA 2 2 stm32n657xx_Vectors.o
RCCEx_GetETH1PTPCLKFreq Code 0x34190CAC 222 4 blto2_FSBL_lto.o
GPDMA1_Channel3_IRQHandler Code 0x34190D8A 2 2 stm32n657xx_Vectors.o
RCCEx_GetFDCANCLKFreq Code 0x34190D8C 206 4 blto2_FSBL_lto.o
GPDMA1_Channel4_IRQHandler Code 0x34190E5A 2 2 stm32n657xx_Vectors.o
RCCEx_GetFMCCLKFreq Code 0x34190E5C 314 4 blto2_FSBL_lto.o
GPDMA1_Channel5_IRQHandler Code 0x34190F96 2 2 stm32n657xx_Vectors.o
RCCEx_GetI2CCLKFreq Code 0x34190F98 706 4 blto2_FSBL_lto.o
GPDMA1_Channel6_IRQHandler Code 0x3419125A 2 2 stm32n657xx_Vectors.o
RCCEx_GetLPTIMCLKFreq Code 0x3419125C 706 4 blto2_FSBL_lto.o
GPDMA1_Channel7_IRQHandler Code 0x3419151E 2 2 stm32n657xx_Vectors.o
RCCEx_GetPSSICLKFreq Code 0x34191520 218 4 blto2_FSBL_lto.o
GPDMA1_Channel8_IRQHandler Code 0x341915FA 2 2 stm32n657xx_Vectors.o
RCCEx_GetRTCCLKFreq Code 0x341915FC 126 4 blto2_FSBL_lto.o
GPDMA1_Channel9_IRQHandler Code 0x3419167A 2 2 stm32n657xx_Vectors.o
RCCEx_GetSAICLKFreq Code 0x3419167C 606 4 blto2_FSBL_lto.o
GPDMA1_Channel10_IRQHandler Code 0x341918DA 2 2 stm32n657xx_Vectors.o
LL_RCC_IC3_GetDivider Code 0x341918DC 22 4 blto2_FSBL_lto.o
GPDMA1_Channel11_IRQHandler Code 0x341918F2 2 2 stm32n657xx_Vectors.o
HAL_RCCEx_GetPLL1CLKFreq Code 0x341918F4 130 4 blto2_FSBL_lto.o
GPDMA1_Channel12_IRQHandler Code 0x34191976 2 2 stm32n657xx_Vectors.o
HAL_RCCEx_GetPLL2CLKFreq Code 0x34191978 130 4 blto2_FSBL_lto.o
GPDMA1_Channel13_IRQHandler Code 0x341919FA 2 2 stm32n657xx_Vectors.o
HAL_RCCEx_GetPLL3CLKFreq Code 0x341919FC 130 4 blto2_FSBL_lto.o
GPDMA1_Channel14_IRQHandler Code 0x34191A7E 2 2 stm32n657xx_Vectors.o
HAL_RCCEx_GetPLL4CLKFreq Code 0x34191A80 130 4 blto2_FSBL_lto.o
GPDMA1_Channel15_IRQHandler Code 0x34191B02 2 2 stm32n657xx_Vectors.o
LL_RCC_IC4_GetDivider Code 0x34191B04 22 4 blto2_FSBL_lto.o
I2C1_EV_IRQHandler Code 0x34191B1A 2 2 stm32n657xx_Vectors.o
LL_RCC_IC15_GetDivider Code 0x34191B1C 22 4 blto2_FSBL_lto.o
I2C1_ER_IRQHandler Code 0x34191B32 2 2 stm32n657xx_Vectors.o
LL_RCC_IC9_GetDivider Code 0x34191B34 22 4 blto2_FSBL_lto.o
I2C2_EV_IRQHandler Code 0x34191B4A 2 2 stm32n657xx_Vectors.o
LL_RCC_IC14_GetDivider Code 0x34191B4C 22 4 blto2_FSBL_lto.o
I2C2_ER_IRQHandler Code 0x34191B62 2 2 stm32n657xx_Vectors.o
LL_RCC_IC8_GetDivider Code 0x34191B64 22 4 blto2_FSBL_lto.o
I2C3_EV_IRQHandler Code 0x34191B7A 2 2 stm32n657xx_Vectors.o
LL_RCC_IC7_GetDivider Code 0x34191B7C 22 4 blto2_FSBL_lto.o
I2C3_ER_IRQHandler Code 0x34191B92 2 2 stm32n657xx_Vectors.o
LL_RCC_IC5_GetDivider Code 0x34191B94 22 4 blto2_FSBL_lto.o
I2C4_EV_IRQHandler Code 0x34191BAA 2 2 stm32n657xx_Vectors.o
LL_RCC_IC20_GetDivider Code 0x34191BAC 22 4 blto2_FSBL_lto.o
I2C4_ER_IRQHandler Code 0x34191BC2 2 2 stm32n657xx_Vectors.o
LL_RCC_IC16_GetDivider Code 0x34191BC4 22 4 blto2_FSBL_lto.o
I3C1_EV_IRQHandler Code 0x34191BDA 2 2 stm32n657xx_Vectors.o
LL_RCC_IC10_GetDivider Code 0x34191BDC 22 4 blto2_FSBL_lto.o
I3C1_ER_IRQHandler Code 0x34191BF2 2 2 stm32n657xx_Vectors.o
LL_RCC_IC19_GetDivider Code 0x34191BF4 22 4 blto2_FSBL_lto.o
I3C2_EV_IRQHandler Code 0x34191C0A 2 2 stm32n657xx_Vectors.o
LL_RCC_IC13_GetDivider Code 0x34191C0C 22 4 blto2_FSBL_lto.o
I3C2_ER_IRQHandler Code 0x34191C22 2 2 stm32n657xx_Vectors.o
LL_RCC_IC12_GetDivider Code 0x34191C24 22 4 blto2_FSBL_lto.o
TIM1_BRK_IRQHandler Code 0x34191C3A 2 2 stm32n657xx_Vectors.o
LL_RCC_IC17_GetDivider Code 0x34191C3C 22 4 blto2_FSBL_lto.o
TIM1_UP_IRQHandler Code 0x34191C52 2 2 stm32n657xx_Vectors.o
LL_RCC_IC18_GetDivider Code 0x34191C54 22 4 blto2_FSBL_lto.o
TIM1_TRG_CCU_IRQHandler Code 0x34191C6A 2 2 stm32n657xx_Vectors.o
HAL_XSPI_SetTimeout Code 0x34191C6C 18 4 blto2_FSBL_lto.o
TIM1_CC_IRQHandler Code 0x34191C7E 2 2 stm32n657xx_Vectors.o
HAL_XSPI_Command Code 0x34191C80 1 106 4 blto2_FSBL_lto.o
TIM2_IRQHandler Code 0x341920D2 2 2 stm32n657xx_Vectors.o
HAL_XSPI_Transmit Code 0x341920D4 226 4 blto2_FSBL_lto.o
TIM3_IRQHandler Code 0x341921B6 2 2 stm32n657xx_Vectors.o
HAL_XSPI_AutoPolling Code 0x341921B8 406 4 blto2_FSBL_lto.o
TIM4_IRQHandler Code 0x3419234E 2 2 stm32n657xx_Vectors.o
HAL_XSPI_MemoryMapped Code 0x34192350 330 4 blto2_FSBL_lto.o
TIM5_IRQHandler Code 0x3419249A 2 2 stm32n657xx_Vectors.o
HAL_XSPI_Abort Code 0x3419249C 246 4 blto2_FSBL_lto.o
TIM6_IRQHandler Code 0x34192592 2 2 stm32n657xx_Vectors.o
HAL_XSPIM_Config Code 0x34192594 878 4 blto2_FSBL_lto.o
TIM7_IRQHandler Code 0x34192902 2 2 stm32n657xx_Vectors.o
XSPIM_GetConfig Code 0x34192904 210 4 blto2_FSBL_lto.o
TIM8_BRK_IRQHandler Code 0x341929D6 2 2 stm32n657xx_Vectors.o
BOOT_Application Code 0x341929D8 34 4 blto2_FSBL_lto.o
TIM8_UP_IRQHandler Code 0x341929FA 2 2 stm32n657xx_Vectors.o
MapMemory Code 0x341929FC 94 4 blto2_FSBL_lto.o
TIM8_TRG_CCU_IRQHandler Code 0x34192A5A 2 2 stm32n657xx_Vectors.o
SFDP_ReadHeader Code 0x34192A5C 126 4 blto2_FSBL_lto.o
TIM8_CC_IRQHandler Code 0x34192ADA 2 2 stm32n657xx_Vectors.o
SFDP_CollectData Code 0x34192ADC 458 4 blto2_FSBL_lto.o
TIM9_IRQHandler Code 0x34192CA6 2 2 stm32n657xx_Vectors.o
SFDP_MemoryReset Code 0x34192CA8 458 4 blto2_FSBL_lto.o
TIM10_IRQHandler Code 0x34192E72 2 2 stm32n657xx_Vectors.o
JEDEC_Basic_ManageQuadEnableRequirement Code 0x34192E74 338 4 blto2_FSBL_lto.o
TIM11_IRQHandler Code 0x34192FC6 2 2 stm32n657xx_Vectors.o
sfdp_enter_octal_mode Code 0x34192FC8 482 4 blto2_FSBL_lto.o
TIM12_IRQHandler Code 0x341931AA 2 2 stm32n657xx_Vectors.o
driver_check_FlagBUSY Code 0x341931AC 102 4 blto2_FSBL_lto.o
TIM13_IRQHandler Code 0x34193212 2 2 stm32n657xx_Vectors.o
EXTMEM_DRIVER_NOR_SFDP_Init Code 0x34193214 306 4 blto2_FSBL_lto.o
TIM14_IRQHandler Code 0x34193346 2 2 stm32n657xx_Vectors.o
EXTMEM_DRIVER_NOR_SFDP_Enable_MemoryMappedMode Code 0x34193348 58 4 blto2_FSBL_lto.o
TIM15_IRQHandler Code 0x34193382 2 2 stm32n657xx_Vectors.o
SAL_XSPI_Init Code 0x34193384 86 4 blto2_FSBL_lto.o
TIM16_IRQHandler Code 0x341933DA 2 2 stm32n657xx_Vectors.o
SAL_XSPI_MemoryConfig Code 0x341933DC 666 4 blto2_FSBL_lto.o
TIM17_IRQHandler Code 0x34193676 2 2 stm32n657xx_Vectors.o
SAL_XSPI_GetSFDP Code 0x34193678 222 4 blto2_FSBL_lto.o
TIM18_IRQHandler Code 0x34193756 2 2 stm32n657xx_Vectors.o
SAL_XSPI_Write Code 0x34193758 138 4 blto2_FSBL_lto.o
LPTIM1_IRQHandler Code 0x341937E2 2 2 stm32n657xx_Vectors.o
SAL_XSPI_CommandSendReadAddress Code 0x341937E4 190 4 blto2_FSBL_lto.o
LPTIM2_IRQHandler Code 0x341938A2 2 2 stm32n657xx_Vectors.o
SAL_XSPI_DisableMapMode Code 0x341938A4 22 4 blto2_FSBL_lto.o
LPTIM3_IRQHandler Code 0x341938BA 2 2 stm32n657xx_Vectors.o
SAL_XSPI_Abort Code 0x341938BC 18 4 blto2_FSBL_lto.o
LPTIM4_IRQHandler Code 0x341938CE 2 2 stm32n657xx_Vectors.o
EXTMEM_Init Code 0x341938D0 94 4 blto2_FSBL_lto.o
LPTIM5_IRQHandler Code 0x3419392E 2 2 stm32n657xx_Vectors.o
EXTMEM_DeInit Code 0x34193930 78 4 blto2_FSBL_lto.o
ADF1_FLT0_IRQHandler Code 0x3419397E 2 2 stm32n657xx_Vectors.o
__aeabi_f2ulz Code 0x34193980 62 4 floatasmops_arm.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
MDF1_FLT0_IRQHandler Code 0x341939BE 2 2 stm32n657xx_Vectors.o
__aeabi_uldivmod Code 0x341939C0 302 4 intasmops_arm.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
MDF1_FLT1_IRQHandler Code 0x34193AEE 2 2 stm32n657xx_Vectors.o
MDF1_FLT2_IRQHandler Code 0x34193AF0 2 2 stm32n657xx_Vectors.o
MDF1_FLT3_IRQHandler Code 0x34193AF2 2 2 stm32n657xx_Vectors.o
MDF1_FLT4_IRQHandler Code 0x34193AF4 2 2 stm32n657xx_Vectors.o
MDF1_FLT5_IRQHandler Code 0x34193AF6 2 2 stm32n657xx_Vectors.o
SAI1_A_IRQHandler Code 0x34193AF8 2 2 stm32n657xx_Vectors.o
SAI1_B_IRQHandler Code 0x34193AFA 2 2 stm32n657xx_Vectors.o
SAI2_A_IRQHandler Code 0x34193AFC 2 2 stm32n657xx_Vectors.o
SAI2_B_IRQHandler Code 0x34193AFE 2 2 stm32n657xx_Vectors.o
SPDIFRX_IRQHandler Code 0x34193B00 2 2 stm32n657xx_Vectors.o
SPI1_IRQHandler Code 0x34193B02 2 2 stm32n657xx_Vectors.o
SPI2_IRQHandler Code 0x34193B04 2 2 stm32n657xx_Vectors.o
SPI3_IRQHandler Code 0x34193B06 2 2 stm32n657xx_Vectors.o
SPI4_IRQHandler Code 0x34193B08 2 2 stm32n657xx_Vectors.o
SPI5_IRQHandler Code 0x34193B0A 2 2 stm32n657xx_Vectors.o
SPI6_IRQHandler Code 0x34193B0C 2 2 stm32n657xx_Vectors.o
USART1_IRQHandler Code 0x34193B0E 2 2 stm32n657xx_Vectors.o
USART2_IRQHandler Code 0x34193B10 2 2 stm32n657xx_Vectors.o
USART3_IRQHandler Code 0x34193B12 2 2 stm32n657xx_Vectors.o
UART4_IRQHandler Code 0x34193B14 2 2 stm32n657xx_Vectors.o
UART5_IRQHandler Code 0x34193B16 2 2 stm32n657xx_Vectors.o
USART6_IRQHandler Code 0x34193B18 2 2 stm32n657xx_Vectors.o
UART7_IRQHandler Code 0x34193B1A 2 2 stm32n657xx_Vectors.o
UART8_IRQHandler Code 0x34193B1C 2 2 stm32n657xx_Vectors.o
UART9_IRQHandler Code 0x34193B1E 2 2 stm32n657xx_Vectors.o
USART10_IRQHandler Code 0x34193B20 2 2 stm32n657xx_Vectors.o
LPUART1_IRQHandler Code 0x34193B22 2 2 stm32n657xx_Vectors.o
XSPI1_IRQHandler Code 0x34193B24 2 2 stm32n657xx_Vectors.o
XSPI2_IRQHandler Code 0x34193B26 2 2 stm32n657xx_Vectors.o
XSPI3_IRQHandler Code 0x34193B28 2 2 stm32n657xx_Vectors.o
FMC_IRQHandler Code 0x34193B2A 2 2 stm32n657xx_Vectors.o
SDMMC1_IRQHandler Code 0x34193B2C 2 2 stm32n657xx_Vectors.o
SDMMC2_IRQHandler Code 0x34193B2E 2 2 stm32n657xx_Vectors.o
UCPD1_IRQHandler Code 0x34193B30 2 2 stm32n657xx_Vectors.o
USB1_OTG_HS_IRQHandler Code 0x34193B32 2 2 stm32n657xx_Vectors.o
USB2_OTG_HS_IRQHandler Code 0x34193B34 2 2 stm32n657xx_Vectors.o
ETH1_IRQHandler Code 0x34193B36 2 2 stm32n657xx_Vectors.o
FDCAN1_IT0_IRQHandler Code 0x34193B38 2 2 stm32n657xx_Vectors.o
FDCAN1_IT1_IRQHandler Code 0x34193B3A 2 2 stm32n657xx_Vectors.o
FDCAN2_IT0_IRQHandler Code 0x34193B3C 2 2 stm32n657xx_Vectors.o
FDCAN2_IT1_IRQHandler Code 0x34193B3E 2 2 stm32n657xx_Vectors.o
FDCAN3_IT0_IRQHandler Code 0x34193B40 2 2 stm32n657xx_Vectors.o
FDCAN3_IT1_IRQHandler Code 0x34193B42 2 2 stm32n657xx_Vectors.o
FDCAN_CU_IRQHandler Code 0x34193B44 2 2 stm32n657xx_Vectors.o
MDIOS_IRQHandler Code 0x34193B46 2 2 stm32n657xx_Vectors.o
DCMI_PSSI_IRQHandler Code 0x34193B48 2 2 stm32n657xx_Vectors.o
WAKEUP_PIN_IRQHandler Code 0x34193B4A 2 2 stm32n657xx_Vectors.o
CTI_INT0_IRQHandler Code 0x34193B4C 2 2 stm32n657xx_Vectors.o
CTI_INT1_IRQHandler Code 0x34193B4E 2 2 stm32n657xx_Vectors.o
LTDC_UP_IRQHandler Code 0x34193B50 2 2 stm32n657xx_Vectors.o
LTDC_UP_ERR_IRQHandler Code 0x34193B52 2 2 stm32n657xx_Vectors.o
fwrite Code 0x34193B54 46 2 fileops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_float32_isnan Code 0x34193B82 14 2 floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_float32_isinf Code 0x34193B90 18 2 floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
ldexpf Code 0x34193BA2 54 2 floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_pow10f Code 0x34193BD8 58 2 utilops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_prin_flush Code 0x34193C12 26 2 prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_stream_write Code 0x34193C2C 10 2 prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_X_file_write Code 0x34193C36 6 2 prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
_DoInit Code 0x34193C3C 98 2 SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
_GetAvailWriteSpace Code 0x34193C9E 22 2 SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
_WriteNoCheck Code 0x34193CB4 58 2 SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
strlen Code 0x34193CEE 42 2 strops.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_current_locale Code 0x34193D18 26 2 mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_ascii_wctomb Code 0x34193D32 14 2 mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
SFDP_BuildGenericDriver.block_erase_unit Cnst 0x34193D40 8 2 blto2_FSBL_lto.o
__SEGGER_RTL_float32_isnormal Code 0x34193D48 24 2 floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_float32_signbit Code 0x34193D60 8 2 floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
frexpf Code 0x34193D68 36 2 floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
abs Code 0x34193D8C 8 2 intops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_putc Code 0x34193D94 132 2 prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_print_padding Code 0x34193E18 32 2 prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_pre_padding Code 0x34193E38 20 2 prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
vfprintf Code 0x34193E4C 28 2 prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
vfprintf_l Code 0x34193E68 104 2 prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
printf Code 0x34193ED0 44 2 prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_X_file_stat Code 0x34193EFC 52 2 prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_X_file_bufsize Code 0x34193F30 4 2 prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
_WriteBlocking Code 0x34193F34 88 2 SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
SEGGER_RTT_WriteNoLock Code 0x34193F8C 88 2 SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
SEGGER_RTT_Write Code 0x34193FE4 40 2 SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
strnlen Code 0x3419400C 92 2 strops.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_ascii_mbtowc Code 0x34194068 48 2 mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
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[.rodata.libc..L.str] Cnst 0x34194108 7 1 __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_c_locale_month_names Cnst 0x3419410F 87 1 mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_c_locale_am_pm_indicator Cnst 0x34194166 7 1 mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_c_locale_date_time_format Cnst 0x3419416D 15 1 mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
[.rodata..L.str.20] Cnst 0x3419417C 106 1 blto2_FSBL_lto.o
[.rodata..L.str.33] Cnst 0x341941E6 106 1 blto2_FSBL_lto.o
[.rodata..L.str.98] Cnst 0x34194250 106 1 blto2_FSBL_lto.o
__SEGGER_RTL_c_locale_day_names Cnst 0x341942BA 58 1 mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
[.rodata.libc..L.str] Cnst 0x341942F4 2 1 mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_data_utf8_period Cnst 0x341942F6 2 1 mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
FW_VERSION Cnst 0x341942F8 33 1 blto2_FSBL_lto.o
[.rodata..L.str] Cnst 0x34194319 25 1 blto2_FSBL_lto.o
[.rodata..L.str.50] Cnst 0x34194332 105 1 blto2_FSBL_lto.o
[.rodata.libc..L.str.1] Cnst 0x3419439B 5 1 __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
[.rodata.libc..L.str.2] Cnst 0x341943A0 5 1 __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
[.rodata.libc..L.str.3] Cnst 0x341943A5 5 1 __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
[.rodata.libc..L.str.4] Cnst 0x341943AA 5 1 __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
_DoInit._aInitStr Cnst 0x341943AF 17 1 SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
[.rodata.libc..L.str] Cnst 0x341943C0 9 1 SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_c_locale_date_format Cnst 0x341943C9 9 1 mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_c_locale_time_format Cnst 0x341943D2 9 1 mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_c_locale_abbrev_day_names Cnst 0x341943DB 29 1 mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_c_locale_abbrev_month_names Cnst 0x341943F8 49 1 mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_data_empty_string Cnst 0x34194429 1 1 mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_ascii_ctype_mask Cnst 0x3419442A 13 1 mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
[.rodata.block.tdata.copy] Cnst 0x34194437 1 [ Linker created ]
[.init_array] ---- 0x34194438 4 4 STM32N6xx_Startup.o
[.rodata..L.str.23] Cnst 0x3419443C 108 1 blto2_FSBL_lto.o
[.rodata..L.str.41] Cnst 0x341944A8 108 1 blto2_FSBL_lto.o
[.rodata..L.str.58] Cnst 0x34194514 108 1 blto2_FSBL_lto.o
__SEGGER_RTL_hex_uc Cnst 0x34194580 16 1 prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_hex_lc Cnst 0x34194590 16 1 prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
[.rodata.libc..L.str.5] Cnst 0x341945A0 4 1 __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
[.rodata.libc..L.str.6] Cnst 0x341945A4 4 1 __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_ascii_ctype_map Cnst 0x341945A8 128 1 mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_init_ctors Code 0x34194628 36 4 SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_init_table__ Cnst 0x3419464C 36 4 [ Linker created ]
__SEGGER_init_data__ Cnst 0x34194670 44 4 [ Linker created ]
__SEGGER_init_zero Code 0x3419469C 18 2 SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_init_copy Code 0x341946AE 20 2 SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)

"<#16> at line 134, col 45": place in [0x34000000 to 0x34063FFF] with auto order

Symbol or [section] name Type Address Size Align Object File
extmem_list_config Zero 0x34000000 172 4 blto2_FSBL_lto.o
_SEGGER_RTT Zero 0x340000AC 168 4 SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
sfdp_param_info Zero 0x34000154 120 4 blto2_FSBL_lto.o
JEDEC_SCCR_Map Zero 0x340001CC 112 4 blto2_FSBL_lto.o
hxspi2 Zero 0x3400023C 100 4 blto2_FSBL_lto.o
JEDEC_Basic Zero 0x340002A0 96 4 blto2_FSBL_lto.o
JEDEC_OctalDdr Zero 0x34000300 32 4 blto2_FSBL_lto.o
JEDEC_XSPI10 Zero 0x34000320 24 4 blto2_FSBL_lto.o
JEDEC_Address4Bytes Zero 0x34000338 8 4 blto2_FSBL_lto.o
uwTick Zero 0x34000340 4 4 blto2_FSBL_lto.o
__SEGGER_RTL_stdout_file Zero 0x34000344 4 4 prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_stdin_file Zero 0x34000348 4 4 prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_stderr_file Zero 0x3400034C 4 4 prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_locale_ptr Zero 0x34000350 4 4 mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
JumpToApplication.JumpToApp Zero 0x34000354 4 4 blto2_FSBL_lto.o
_acUpBuffer Zero 0x34000358 1 024 1 SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
_acDownBuffer Zero 0x34000758 16 1 SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_global_locale Init 0x34000768 20 4 mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
uwTickPrio Init 0x3400077C 4 4 blto2_FSBL_lto.o
stdout Init 0x34000780 4 4 prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
stdin Init 0x34000784 4 4 prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
stderr Init 0x34000788 4 4 prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
SystemCoreClock Init 0x3400078C 4 4 blto2_FSBL_lto.o
uwTickFreq Init 0x34000790 1 1 blto2_FSBL_lto.o
[.bss.block.heap] None 0x34000798 8 [ Linker created ]
[.bss.block.stack] None 0x34062000 8 192 8 [ Linker created ]

"<#17> at line 138, col 45": place in [0x34000000 to 0x34063FFF] with auto order

Symbol or [section] name Type Address Size Align Object File
[.bss.block.heap] None 0x34000798 8 [ Linker created ]

MODULE SUMMARY

Memory use by input file

Object File RX Code RO Data RW Data ZI Data
blto2_FSBL_lto.o 73 970 855 9 672
SEGGER_THUMB_Startup.o 20
stm32n657xx_Vectors.o 1 216
STM32N6xx_Startup.o 68
Subtotal (4 objects) 75 274 855 9 672
libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a 4 534 251
mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a 200 541 20 4
prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a 456 26 12 1 220
SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a 74
strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a 330
Subtotal (5archives) 5 594 818 32 1 224
Linker created (shared data, fills, blocks): 80 8 192
Total: 80 868 1 753 41 10 088

Memory use by archive member

Archive member RX Code RO Data RW Data ZI Data
__SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) 3 036 35
fileops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) 46
floatasmops_arm.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) 146
floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) 542
intasmops_arm.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) 302
intops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) 8
mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) 200 541 20 4
prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) 396 192
prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) 62 12 12
SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) 74
SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) 394 26 1 208
strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) 196
strops.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) 134
utilops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) 58 24
Subtotal (14 members from 5 archives) 5 594 818 32 1 224
Objects (4 files) 75 274 855 9 672
Linker created (shared data, fills, blocks): 80 8 192
Total: 80 868 1 753 41 10 088

Memory use by linker

Description RX Code RO Data RW Data ZI Data
Initialization table 80
Memory for block 'stack' 8 192
Subtotal (linker created): 80 8 192
Objects (4 files) 75 274 855 9 672
Archives (5 files) 5 594 818 32 1 224
Total: 80 868 1 753 41 10 088

MODULE DETAIL

Module blto2_FSBL_lto.o

Symbol or [section] name Code RO Data RW Data ZI Data
HAL_RCCEx_PeriphCLKConfig 24 268
SFDP_BuildGenericDriver 3 092
HAL_RCC_OscConfig 2 810
HAL_RCC_ClockConfig 2 498
HAL_GPIO_Init 1 928
HAL_RCCEx_GetPeriphCLKFreq 1 626
HAL_XSPI_Init 1 548
RCCEx_GetSPICLKFreq 1 196
HAL_XSPI_Command 1 106
XSPI_ConfigCmd 924
RCCEx_GetUSARTCLKFreq 916
RCCEx_GetUARTCLKFreq 916
HAL_XSPIM_Config 878
RCC_PLL_Config 846
SystemCoreClockUpdate 828
RCCEx_GetCLKPCLKFreq 736
RCCEx_GetI2CCLKFreq 706
RCCEx_GetLPTIMCLKFreq 706
SAL_XSPI_MemoryConfig 666
sfdp_get_paraminfo 652
RCCEx_GetSAICLKFreq 606
RCCEx_GetI3CCLKFreq 516
SystemInit 510
sfdp_enter_octal_mode 482
SFDP_CollectData 458
SFDP_MemoryReset 458
RCCEx_GetXSPICLKFreq 452
RCCEx_GetADCCLKFreq 438
RCCEx_GetMDFCLKFreq 436
sfdp_set_dummycycle 420
RCCEx_GetLPUARTCLKFreq 412
HAL_XSPI_AutoPolling 406
RCCEx_GetSDMMCCLKFreq 396
RCCEx_GetADFCLKFreq 388
RCCEx_GetSPDIFRXCLKFreq 372
main 362
JumpToApplication 356
HAL_BSEC_OTP_Program 342
JEDEC_Basic_ManageQuadEnableRequirement 338
HAL_XSPI_MemoryMapped 330
HAL_XSPI_MspInit 324
RCCEx_GetOTGPHYCLKFreq 324
RCCEx_GetFMCCLKFreq 314
EXTMEM_DRIVER_NOR_SFDP_Init 306
HAL_XSPI_Receive 300
SFDP_GetHeader 256
SystemClock_Config 254
HAL_BSEC_OTP_Reload 250
HAL_XSPI_Abort 246
HAL_DMA_Abort 244
HAL_RCC_GetClockConfig 240
HAL_RCC_GetCpuClockFreq 238
RCC_IC_CheckPLLSources 234
RCC_GetSysClockFreq 232
SAL_XSPI_CheckStatusRegister 232
RCCEx_GetDCMIPPCLKFreq 228
RCCEx_GetLTDCCLKFreq 228
HAL_PWREx_ConfigVddIORange 226
HAL_XSPI_Transmit 226
RCCEx_GetETH1PTPCLKFreq 222
SAL_XSPI_GetSFDP 222
RCC_PLL_IsNewConfig 218
RCCEx_GetPSSICLKFreq 218
RCCEx_GetETH1CLKFreq 216
XSPIM_GetConfig 210
RCCEx_GetFDCANCLKFreq 206
SAL_XSPI_EnableMapMode 200
EXTMEM_GetMapAddress 196
SAL_XSPI_CommandSendReadAddress 190
HAL_NVIC_SetPriority 168
SAL_XSPI_GetId 152
RCCEx_GetOTGPHYCKREFCLKFreq 148
OTP_Config 142
RCCEx_GetPLLSourceFreq 140
EXTMEM_MemoryMappedMode 140
SAL_XSPI_Write 138
RCCEx_CalcPLLFreq 136
SAL_XSPI_CommandSendData 136
SAL_XSPI_SendReadCommand 136
MX_GPIO_Init 134
RCCEx_GetCSICLKFreq 134
JEDEC_Basic_Manage4S4S4SEnableSequence 132
HAL_RCCEx_GetPLL1CLKFreq 130
HAL_RCCEx_GetPLL2CLKFreq 130
HAL_RCCEx_GetPLL3CLKFreq 130
HAL_RCCEx_GetPLL4CLKFreq 130
MX_XSPI2_Init 126
HAL_InitTick 126
RCCEx_GetRTCCLKFreq 126
SFDP_ReadHeader 126
HAL_BSEC_OTP_Read 124
SAL_XSPI_SetClock 116
SAL_XSPI_UpdateMemoryType 116
HAL_PWREx_ConfigSupply 114
HAL_PWREx_ControlVoltageScaling 114
XSPI_WaitFlagStateUntilTimeout 104
HAL_GPIO_WritePin 102
driver_check_FlagBUSY 102
NVIC_EncodePriority 100
RCC_PLL_Enable 94
MapMemory 94
EXTMEM_Init 94
XSPI_FormatCommand 88
SAL_XSPI_Init 86
RCC_PLL_Source_IsReady 84
CheckSFDP_Signature 80
SysTick_Config 78
EXTMEM_DeInit 78
sfdp_getfrequencevalue 64
MX_EXTMEM_MANAGER_Init 62
HAL_NVIC_SetPriorityGrouping 62
__NVIC_SetPriority 62
__NVIC_SetPriorityGrouping 60
HAL_Delay 58
EXTMEM_DRIVER_NOR_SFDP_Enable_MemoryMappedMode 58
LL_RCC_SetClockSource 52
HAL_Init 48
LL_RCC_GetClockSource 48
EXTMEM_DRIVER_NOR_SFDP_Disable_MemoryMappedMode 36
LL_AHB4_GRP1_EnableClock 34
LL_APB4_GRP2_EnableClock 34
LL_APB4_GRP2_EnableClock.7 34
LL_AHB4_GRP1_EnableClock.8 34
LL_AHB5_GRP1_EnableClock 34
BOOT_Application 34
XSPI_Transmit 32
LL_RCC_HSI_SetCalibTrimming 30
LL_RCC_MSI_SetCalibTrimming 30
LL_RCC_SetTIMPrescaler 30
LL_RCC_HSI_SetDivider 28
LL_RCC_MSI_SetFrequency 28
LL_RCC_SetRTC_HSEPrescaler 28
LL_RCC_SetRTCClockSource 28
LL_RCC_SetCLKPClockSource 28
LL_RCC_SetFMCClockSource 28
LL_RCC_SetADFClockSource 28
LL_RCC_SetDCMIPPClockSource 28
LL_RCC_SetETHClockSource 28
LL_RCC_SetETHPHYInterface 28
LL_RCC_SetETHREFRXClockSource 28
LL_RCC_SetETHREFTXClockSource 28
LL_RCC_SetFDCANClockSource 28
LL_RCC_SetLPUARTClockSource 28
LL_RCC_SetLTDCClockSource 28
LL_RCC_SetMDFClockSource 28
LL_RCC_SetPSSIClockSource 28
LL_RCC_SetSPDIFRXClockSource 28
RCCEx_GetHCLKFreq 28
RCCEx_GetPCLK1Freq 28
RCCEx_GetPCLK2Freq 28
RCCEx_GetPCLK4Freq 28
RCCEx_GetPCLK5Freq 28
LL_AHB5_GRP1_IsEnabledClock 28
HAL_IncTick 26
HAL_RCC_GetSysClockFreq 26
LL_RCC_IC1_GetDivider 22
LL_RCC_IC2_GetDivider 22
LL_RCC_GetADCClockSource 22
LL_RCC_GetADFClockSource 22
LL_RCC_GetCLKPClockSource 22
LL_RCC_GetDCMIPPClockSource 22
LL_RCC_GetETHClockSource 22
LL_RCC_GetETHPTPClockSource 22
LL_RCC_GetFDCANClockSource 22
LL_RCC_GetFMCClockSource 22
LL_RCC_GetLPUARTClockSource 22
LL_RCC_GetLTDCClockSource 22
LL_RCC_GetMDFClockSource 22
LL_RCC_GetPSSIClockSource 22
LL_RCC_GetSPDIFRXClockSource 22
LL_RCC_IC3_GetDivider 22
LL_RCC_IC4_GetDivider 22
LL_RCC_IC15_GetDivider 22
LL_RCC_IC9_GetDivider 22
LL_RCC_IC14_GetDivider 22
LL_RCC_IC8_GetDivider 22
LL_RCC_IC7_GetDivider 22
LL_RCC_IC5_GetDivider 22
LL_RCC_IC20_GetDivider 22
LL_RCC_IC16_GetDivider 22
LL_RCC_IC10_GetDivider 22
LL_RCC_IC19_GetDivider 22
LL_RCC_IC13_GetDivider 22
LL_RCC_IC12_GetDivider 22
LL_RCC_IC17_GetDivider 22
LL_RCC_IC18_GetDivider 22
SAL_XSPI_DisableMapMode 22
HAL_SuspendTick 18
HAL_PWREx_EnableVddIO3 18
LL_RCC_HSE_SelectHSEDiv2AsDiv2Clock 18
LL_RCC_HSE_SelectHSEAsDiv2Clock 18
HAL_XSPI_SetTimeout 18
SAL_XSPI_Abort 18
__NVIC_GetPriorityGrouping 16
HAL_SYSTICK_Config 16
LL_RCC_HSI_IsReady 16
LL_RCC_GetCpuClkSource 16
LL_RCC_GetSysClkSource 16
LL_RCC_PLL1_GetSource 16
LL_RCC_PLL2_GetSource 16
LL_RCC_PLL3_GetSource 16
LL_RCC_PLL4_GetSource 16
LL_RCC_MSI_IsReady 16
LL_RCC_LSI_IsReady 16
LL_RCC_LSE_IsReady 16
LL_RCC_PLL1_IsReady 16
LL_RCC_IC1_GetSource 16
LL_RCC_IC2_GetSource 16
LL_RCC_IC6_GetSource 16
LL_RCC_IC11_GetSource 16
LL_RCC_PLL2_IsReady 16
LL_RCC_PLL3_IsReady 16
LL_RCC_PLL4_IsReady 16
LL_RCC_HSE_IsReady 16
LL_RCC_HSI_GetDivider 16
LL_RCC_PLL1_IsEnabledBypass 16
LL_RCC_PLL2_IsEnabledBypass 16
LL_RCC_PLL3_IsEnabledBypass 16
LL_RCC_PLL4_IsEnabledBypass 16
LL_RCC_GetRTCClockSource 16
LL_RCC_LSE_IsReady.59 16
LL_RCC_IC10_Enable.61 16
LL_RCC_IC15_Enable.62 16
LL_RCC_IC19_Enable 16
LL_RCC_IC20_Enable.63 16
LL_RCC_SetXSPIClockSource 16
LL_RCC_SetSDMMCClockSource 16
LL_RCC_IC18_Enable 16
LL_RCC_IC17_Enable 16
LL_RCC_IC12_Enable 16
LL_RCC_IC13_Enable 16
LL_RCC_SetI2CClockSource 16
LL_RCC_SetI3CClockSource 16
LL_RCC_SetLPTIMClockSource 16
LL_RCC_IC9_Enable 16
LL_RCC_IC14_Enable 16
LL_RCC_IC16_Enable 16
LL_RCC_SetSAIClockSource 16
LL_RCC_SetSPIClockSource 16
LL_RCC_SetUSARTClockSource 16
LL_RCC_SetOTGPHYClockSource 16
LL_RCC_SetOTGPHYCKREFClockSource 16
LL_RCC_GetADCPrescaler 16
LL_RCC_GetETH1PTPDivider 16
LL_RCC_GetI2CClockSource 16
LL_RCC_GetI3CClockSource 16
LL_RCC_GetLPTIMClockSource 16
LL_RCC_GetSAIClockSource 16
LL_RCC_GetSDMMCClockSource 16
LL_RCC_GetSPIClockSource 16
LL_RCC_GetTIMPrescaler 16
LL_RCC_GetUSARTClockSource 16
LL_RCC_HSE_IsSelectedHSEDiv2AsDiv2Clock 16
LL_RCC_GetXSPIClockSource 16
LL_RCC_IC3_IsEnabled 16
LL_RCC_IC3_GetSource 16
LL_RCC_IC4_IsEnabled 16
LL_RCC_IC4_GetSource 16
LL_RCC_PLL4_IsReady.74 16
LL_RCC_PLL4P_IsEnabled 16
LL_RCC_PLL4_GetSource.75 16
LL_RCC_PLL4_GetM 16
LL_RCC_PLL4_GetN 16
LL_RCC_PLL4_GetFRACN 16
LL_RCC_PLL4_GetP1 16
LL_RCC_PLL4_GetP2 16
LL_RCC_PLL4_IsEnabledBypass.76 16
LL_RCC_HSI_IsReady.77 16
LL_RCC_HSI_GetDivider.78 16
LL_RCC_MSI_IsReady.79 16
LL_RCC_MSI_GetFrequency 16
LL_RCC_HSE_IsReady.80 16
LL_RCC_PLL3_IsReady.81 16
LL_RCC_PLL3P_IsEnabled 16
LL_RCC_PLL3_GetSource.82 16
LL_RCC_PLL3_GetM 16
LL_RCC_PLL3_GetN 16
LL_RCC_PLL3_GetFRACN 16
LL_RCC_PLL3_GetP1 16
LL_RCC_PLL3_GetP2 16
LL_RCC_PLL3_IsEnabledBypass.83 16
LL_RCC_PLL2_IsReady.84 16
LL_RCC_PLL2P_IsEnabled 16
LL_RCC_PLL2_GetSource.85 16
LL_RCC_PLL2_GetM 16
LL_RCC_PLL2_GetN 16
LL_RCC_PLL2_GetFRACN 16
LL_RCC_PLL2_GetP1 16
LL_RCC_PLL2_GetP2 16
LL_RCC_PLL2_IsEnabledBypass.86 16
LL_RCC_PLL1_IsReady.87 16
LL_RCC_PLL1P_IsEnabled 16
LL_RCC_PLL1_GetSource.88 16
LL_RCC_PLL1_GetM 16
LL_RCC_PLL1_GetN 16
LL_RCC_PLL1_GetFRACN 16
LL_RCC_PLL1_GetP1 16
LL_RCC_PLL1_GetP2 16
LL_RCC_PLL1_IsEnabledBypass.89 16
LL_RCC_GetAHBPrescaler.90 16
LL_RCC_GetUSBClockSource 16
LL_RCC_IC15_IsEnabled 16
LL_RCC_IC15_GetSource 16
LL_RCC_GetUARTClockSource 16
LL_RCC_IC9_IsEnabled 16
LL_RCC_IC9_GetSource 16
LL_RCC_IC14_IsEnabled 16
LL_RCC_IC14_GetSource 16
LL_RCC_GetAPB2Prescaler.91 16
LL_RCC_GetAPB1Prescaler.92 16
LL_RCC_IC8_IsEnabled 16
LL_RCC_IC8_GetSource 16
LL_RCC_GetAPB4Prescaler.93 16
LL_RCC_IC7_IsEnabled 16
LL_RCC_IC7_GetSource 16
LL_RCC_IC5_IsEnabled 16
LL_RCC_IC5_GetSource 16
LL_RCC_LSI_IsReady.94 16
LL_RCC_IC20_IsEnabled 16
LL_RCC_IC20_GetSource 16
LL_RCC_IC16_IsEnabled 16
LL_RCC_IC16_GetSource 16
LL_RCC_GetAPB5Prescaler.95 16
LL_RCC_IC10_IsEnabled 16
LL_RCC_IC10_GetSource 16
LL_RCC_IC19_IsEnabled 16
LL_RCC_IC19_GetSource 16
LL_RCC_IC13_IsEnabled 16
LL_RCC_IC13_GetSource 16
LL_RCC_IC12_IsEnabled 16
LL_RCC_IC12_GetSource 16
LL_RCC_IC17_IsEnabled 16
LL_RCC_IC17_GetSource 16
LL_RCC_CLKP_IsEnabled 16
LL_RCC_IC18_IsEnabled 16
LL_RCC_IC18_GetSource 16
EXTMEM_DRIVER_NOR_SFDP_DeInit 16
LL_RCC_HSI_Enable 14
LL_RCC_HSI_Disable 14
LL_RCC_MSI_Enable 14
LL_RCC_MSI_Disable 14
LL_RCC_LSI_Enable 14
LL_RCC_LSI_Disable 14
LL_RCC_IC1_Enable 14
LL_RCC_IC5_Enable.60 14
LL_RCC_IC3_Enable 14
LL_RCC_IC4_Enable 14
LL_RCC_CLKP_Enable 14
LL_RCC_IC7_Enable 14
LL_RCC_IC8_Enable 14
HAL_GetTick 12
assert_failed 10
HAL_MspInit 8
SysTick_Handler 8
Error_Handler 4
MX_BSEC_Init 2
NMI_Handler 2
HardFault_Handler 2
MemManage_Handler 2
BusFault_Handler 2
UsageFault_Handler 2
SVC_Handler 2
DebugMon_Handler 2
PendSV_Handler 2
[.rodata..L.str.23] 108
[.rodata..L.str.41] 108
[.rodata..L.str.58] 108
[.rodata..L.str.20] 106
[.rodata..L.str.33] 106
[.rodata..L.str.98] 106
[.rodata..L.str.50] 105
FW_VERSION 33
[.rodata..L__const.sfdp_getfrequencevalue.freqMhz_table] 26
[.rodata..L.str] 25
SFDP_BuildGenericDriver.chip_erase_unit 16
SFDP_BuildGenericDriver.block_erase_unit 8
SystemCoreClock 4
uwTickPrio 4
uwTickFreq 1
extmem_list_config 172
sfdp_param_info 120
JEDEC_SCCR_Map 112
hxspi2 100
JEDEC_Basic 96
JEDEC_OctalDdr 32
JEDEC_XSPI10 24
JEDEC_Address4Bytes 8
uwTick 4
JumpToApplication.JumpToApp 4
Total: 73 970 855 9 672

Module SEGGER_THUMB_Startup.o

Symbol or [section] name Code RO Data RW Data ZI Data
_start 20
Total: 20

Module stm32n657xx_Vectors.o

Symbol or [section] name Code RO Data RW Data ZI Data
_vectors 844
PVD_PVM_IRQHandler 2
DTS_IRQHandler 2
RCC_IRQHandler 2
LOCKUP_IRQHandler 2
CACHE_ECC_IRQHandler 2
TCM_ECC_IRQHandler 2
BCK_ECC_IRQHandler 2
FPU_IRQHandler 2
RTC_S_IRQHandler 2
TAMP_IRQHandler 2
RIFSC_TAMPER_IRQHandler 2
IAC_IRQHandler 2
RCC_S_IRQHandler 2
RTC_IRQHandler 2
IWDG_IRQHandler 2
WWDG_IRQHandler 2
EXTI0_IRQHandler 2
EXTI1_IRQHandler 2
EXTI2_IRQHandler 2
EXTI3_IRQHandler 2
EXTI4_IRQHandler 2
EXTI5_IRQHandler 2
EXTI6_IRQHandler 2
EXTI7_IRQHandler 2
EXTI8_IRQHandler 2
EXTI9_IRQHandler 2
EXTI10_IRQHandler 2
EXTI11_IRQHandler 2
EXTI12_IRQHandler 2
EXTI13_IRQHandler 2
EXTI14_IRQHandler 2
EXTI15_IRQHandler 2
SAES_IRQHandler 2
CRYP_IRQHandler 2
PKA_IRQHandler 2
HASH_IRQHandler 2
RNG_IRQHandler 2
MCE1_IRQHandler 2
MCE2_IRQHandler 2
MCE3_IRQHandler 2
MCE4_IRQHandler 2
ADC1_2_IRQHandler 2
CSI_IRQHandler 2
DCMIPP_IRQHandler 2
PAHB_ERR_IRQHandler 2
NPU0_IRQHandler 2
NPU1_IRQHandler 2
NPU2_IRQHandler 2
NPU3_IRQHandler 2
CACHEAXI_IRQHandler 2
LTDC_LO_IRQHandler 2
LTDC_LO_ERR_IRQHandler 2
DMA2D_IRQHandler 2
JPEG_IRQHandler 2
VENC_IRQHandler 2
GFXMMU_IRQHandler 2
GFXTIM_IRQHandler 2
GPU2D_IRQHandler 2
GPU2D_ER_IRQHandler 2
ICACHE_IRQHandler 2
HPDMA1_Channel0_IRQHandler 2
HPDMA1_Channel1_IRQHandler 2
HPDMA1_Channel2_IRQHandler 2
HPDMA1_Channel3_IRQHandler 2
HPDMA1_Channel4_IRQHandler 2
HPDMA1_Channel5_IRQHandler 2
HPDMA1_Channel6_IRQHandler 2
HPDMA1_Channel7_IRQHandler 2
HPDMA1_Channel8_IRQHandler 2
HPDMA1_Channel9_IRQHandler 2
HPDMA1_Channel10_IRQHandler 2
HPDMA1_Channel11_IRQHandler 2
HPDMA1_Channel12_IRQHandler 2
HPDMA1_Channel13_IRQHandler 2
HPDMA1_Channel14_IRQHandler 2
HPDMA1_Channel15_IRQHandler 2
GPDMA1_Channel0_IRQHandler 2
GPDMA1_Channel1_IRQHandler 2
GPDMA1_Channel2_IRQHandler 2
GPDMA1_Channel3_IRQHandler 2
GPDMA1_Channel4_IRQHandler 2
GPDMA1_Channel5_IRQHandler 2
GPDMA1_Channel6_IRQHandler 2
GPDMA1_Channel7_IRQHandler 2
GPDMA1_Channel8_IRQHandler 2
GPDMA1_Channel9_IRQHandler 2
GPDMA1_Channel10_IRQHandler 2
GPDMA1_Channel11_IRQHandler 2
GPDMA1_Channel12_IRQHandler 2
GPDMA1_Channel13_IRQHandler 2
GPDMA1_Channel14_IRQHandler 2
GPDMA1_Channel15_IRQHandler 2
I2C1_EV_IRQHandler 2
I2C1_ER_IRQHandler 2
I2C2_EV_IRQHandler 2
I2C2_ER_IRQHandler 2
I2C3_EV_IRQHandler 2
I2C3_ER_IRQHandler 2
I2C4_EV_IRQHandler 2
I2C4_ER_IRQHandler 2
I3C1_EV_IRQHandler 2
I3C1_ER_IRQHandler 2
I3C2_EV_IRQHandler 2
I3C2_ER_IRQHandler 2
TIM1_BRK_IRQHandler 2
TIM1_UP_IRQHandler 2
TIM1_TRG_CCU_IRQHandler 2
TIM1_CC_IRQHandler 2
TIM2_IRQHandler 2
TIM3_IRQHandler 2
TIM4_IRQHandler 2
TIM5_IRQHandler 2
TIM6_IRQHandler 2
TIM7_IRQHandler 2
TIM8_BRK_IRQHandler 2
TIM8_UP_IRQHandler 2
TIM8_TRG_CCU_IRQHandler 2
TIM8_CC_IRQHandler 2
TIM9_IRQHandler 2
TIM10_IRQHandler 2
TIM11_IRQHandler 2
TIM12_IRQHandler 2
TIM13_IRQHandler 2
TIM14_IRQHandler 2
TIM15_IRQHandler 2
TIM16_IRQHandler 2
TIM17_IRQHandler 2
TIM18_IRQHandler 2
LPTIM1_IRQHandler 2
LPTIM2_IRQHandler 2
LPTIM3_IRQHandler 2
LPTIM4_IRQHandler 2
LPTIM5_IRQHandler 2
ADF1_FLT0_IRQHandler 2
MDF1_FLT0_IRQHandler 2
MDF1_FLT1_IRQHandler 2
MDF1_FLT2_IRQHandler 2
MDF1_FLT3_IRQHandler 2
MDF1_FLT4_IRQHandler 2
MDF1_FLT5_IRQHandler 2
SAI1_A_IRQHandler 2
SAI1_B_IRQHandler 2
SAI2_A_IRQHandler 2
SAI2_B_IRQHandler 2
SPDIFRX_IRQHandler 2
SPI1_IRQHandler 2
SPI2_IRQHandler 2
SPI3_IRQHandler 2
SPI4_IRQHandler 2
SPI5_IRQHandler 2
SPI6_IRQHandler 2
USART1_IRQHandler 2
USART2_IRQHandler 2
USART3_IRQHandler 2
UART4_IRQHandler 2
UART5_IRQHandler 2
USART6_IRQHandler 2
UART7_IRQHandler 2
UART8_IRQHandler 2
UART9_IRQHandler 2
USART10_IRQHandler 2
LPUART1_IRQHandler 2
XSPI1_IRQHandler 2
XSPI2_IRQHandler 2
XSPI3_IRQHandler 2
FMC_IRQHandler 2
SDMMC1_IRQHandler 2
SDMMC2_IRQHandler 2
UCPD1_IRQHandler 2
USB1_OTG_HS_IRQHandler 2
USB2_OTG_HS_IRQHandler 2
ETH1_IRQHandler 2
FDCAN1_IT0_IRQHandler 2
FDCAN1_IT1_IRQHandler 2
FDCAN2_IT0_IRQHandler 2
FDCAN2_IT1_IRQHandler 2
FDCAN3_IT0_IRQHandler 2
FDCAN3_IT1_IRQHandler 2
FDCAN_CU_IRQHandler 2
MDIOS_IRQHandler 2
DCMI_PSSI_IRQHandler 2
WAKEUP_PIN_IRQHandler 2
CTI_INT0_IRQHandler 2
CTI_INT1_IRQHandler 2
LTDC_UP_IRQHandler 2
LTDC_UP_ERR_IRQHandler 2
Total: 1 216

Module STM32N6xx_Startup.o

Symbol or [section] name Code RO Data RW Data ZI Data
reset_handler 68
Total: 68

Module fileops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)

Symbol or [section] name Code RO Data RW Data ZI Data
fwrite 46
Total: 46

Module floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)

Symbol or [section] name Code RO Data RW Data ZI Data
fmodf 284
floorf 104
ldexpf 54
frexpf 36
__SEGGER_RTL_float32_isnormal 24
__SEGGER_RTL_float32_isinf 18
__SEGGER_RTL_float32_isnan 14
__SEGGER_RTL_float32_signbit 8
Total: 542

Module intops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)

Symbol or [section] name Code RO Data RW Data ZI Data
abs 8
Total: 8

Module utilops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)

Symbol or [section] name Code RO Data RW Data ZI Data
__SEGGER_RTL_pow10f 58
__SEGGER_RTL_aPower2f 24
Total: 58 24

Module floatasmops_arm.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)

Symbol or [section] name Code RO Data RW Data ZI Data
__aeabi_ul2f 84
__aeabi_f2ulz 62
Total: 146

Module intasmops_arm.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)

Symbol or [section] name Code RO Data RW Data ZI Data
__aeabi_uldivmod 302
Total: 302

Module prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)

Symbol or [section] name Code RO Data RW Data ZI Data
__SEGGER_RTL_putc 132
vfprintf_l 104
printf 44
__SEGGER_RTL_print_padding 32
vfprintf 28
__SEGGER_RTL_prin_flush 26
__SEGGER_RTL_pre_padding 20
__SEGGER_RTL_stream_write 10
__SEGGER_RTL_ipow10 160
__SEGGER_RTL_hex_uc 16
__SEGGER_RTL_hex_lc 16
Total: 396 192

Module __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)

Symbol or [section] name Code RO Data RW Data ZI Data
__SEGGER_RTL_vfprintf_short_float_long_long 3 036
[.rodata.libc..L.str] 7
[.rodata.libc..L.str.1] 5
[.rodata.libc..L.str.2] 5
[.rodata.libc..L.str.3] 5
[.rodata.libc..L.str.4] 5
[.rodata.libc..L.str.5] 4
[.rodata.libc..L.str.6] 4
Total: 3 036 35

Module SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)

Symbol or [section] name Code RO Data RW Data ZI Data
__SEGGER_init_ctors 36
__SEGGER_init_copy 20
__SEGGER_init_zero 18
Total: 74

Module prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)

Symbol or [section] name Code RO Data RW Data ZI Data
__SEGGER_RTL_X_file_stat 52
__SEGGER_RTL_X_file_write 6
__SEGGER_RTL_X_file_bufsize 4
stdin 4
stdout 4
stderr 4
__SEGGER_RTL_stdin_file 4
__SEGGER_RTL_stdout_file 4
__SEGGER_RTL_stderr_file 4
Total: 62 12 12

Module SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)

Symbol or [section] name Code RO Data RW Data ZI Data
_DoInit 98
_WriteBlocking 88
SEGGER_RTT_WriteNoLock 88
_WriteNoCheck 58
SEGGER_RTT_Write 40
_GetAvailWriteSpace 22
_DoInit._aInitStr 17
[.rodata.libc..L.str] 9
_acUpBuffer 1 024
_SEGGER_RTT 168
_acDownBuffer 16
Total: 394 26 1 208

Module strops.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)

Symbol or [section] name Code RO Data RW Data ZI Data
strnlen 92
strlen 42
Total: 134

Module strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)

Symbol or [section] name Code RO Data RW Data ZI Data
__aeabi_memclr 104
memcpy 92
Total: 196

Module mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)

Symbol or [section] name Code RO Data RW Data ZI Data
__SEGGER_RTL_ascii_mbtowc 48
__SEGGER_RTL_ascii_isctype 32
__SEGGER_RTL_ascii_iswctype 32
__SEGGER_RTL_current_locale 26
__SEGGER_RTL_ascii_wctomb 14
__SEGGER_RTL_ascii_toupper 12
__SEGGER_RTL_ascii_tolower 12
__SEGGER_RTL_ascii_towupper 12
__SEGGER_RTL_ascii_towlower 12
__SEGGER_RTL_ascii_ctype_map 128
__SEGGER_RTL_c_locale_data 88
__SEGGER_RTL_c_locale_month_names 87
__SEGGER_RTL_c_locale_day_names 58
__SEGGER_RTL_c_locale_abbrev_month_names 49
__SEGGER_RTL_codeset_ascii 32
__SEGGER_RTL_c_locale_abbrev_day_names 29
__SEGGER_RTL_c_locale_date_time_format 15
__SEGGER_RTL_ascii_ctype_mask 13
__SEGGER_RTL_c_locale 12
__SEGGER_RTL_c_locale_date_format 9
__SEGGER_RTL_c_locale_time_format 9
__SEGGER_RTL_c_locale_am_pm_indicator 7
[.rodata.libc..L.str] 2
__SEGGER_RTL_data_utf8_period 2
__SEGGER_RTL_data_empty_string 1
__SEGGER_RTL_global_locale 20
__SEGGER_RTL_locale_ptr 4
Total: 200 541 20 4

All modules

Code RO Data RW Data ZI Data
Grand total: 80 868 1 673 41 1 896

SECTION DETAIL

Sections by address

Range Symbol or [section] Name Size Al Init Ac Object File
34000000-340000AB extmem_list_config 172 4 Zero ZI blto2_FSBL_lto.o
340000AC-34000153 _SEGGER_RTT 168 4 Zero ZI SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34000154-340001CB sfdp_param_info 120 4 Zero ZI blto2_FSBL_lto.o
340001CC-3400023B JEDEC_SCCR_Map 112 4 Zero ZI blto2_FSBL_lto.o
3400023C-3400029F hxspi2 100 4 Zero ZI blto2_FSBL_lto.o
340002A0-340002FF JEDEC_Basic 96 4 Zero ZI blto2_FSBL_lto.o
34000300-3400031F JEDEC_OctalDdr 32 4 Zero ZI blto2_FSBL_lto.o
34000320-34000337 JEDEC_XSPI10 24 4 Zero ZI blto2_FSBL_lto.o
34000338-3400033F JEDEC_Address4Bytes 8 4 Zero ZI blto2_FSBL_lto.o
34000340-34000343 uwTick 4 4 Zero ZI blto2_FSBL_lto.o
34000344-34000347 __SEGGER_RTL_stdout_file 4 4 Zero ZI prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34000348-3400034B __SEGGER_RTL_stdin_file 4 4 Zero ZI prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
3400034C-3400034F __SEGGER_RTL_stderr_file 4 4 Zero ZI prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34000350-34000353 __SEGGER_RTL_locale_ptr 4 4 Zero ZI mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34000354-34000357 JumpToApplication.JumpToApp 4 4 Zero ZI blto2_FSBL_lto.o
34000358-34000757 _acUpBuffer 1 024 1 Zero ZI SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34000758-34000767 _acDownBuffer 16 1 Zero ZI SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34000768-3400077B __SEGGER_RTL_global_locale 20 4 Init RW mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
3400077C-3400077F uwTickPrio 4 4 Init RW blto2_FSBL_lto.o
34000780-34000783 stdout 4 4 Init RW prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34000784-34000787 stdin 4 4 Init RW prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34000788-3400078B stderr 4 4 Init RW prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
3400078C-3400078F SystemCoreClock 4 4 Init RW blto2_FSBL_lto.o
34000790-34000790 uwTickFreq 1 1 Init RW blto2_FSBL_lto.o
34000791-34061FFF ( UNUSED .=.+399471 ) 399 471 - ---- - -
34062000-34063FFF [.bss.block.stack] 8 192 8 None ZI [ Linker created ]
34180400-3418074B _vectors 844 1024 Code RX stm32n657xx_Vectors.o
3418074C-3418074F Error_Handler 4 4 Code RX blto2_FSBL_lto.o
34180750-341807EF __SEGGER_RTL_ipow10 160 8 Cnst RO prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
341807F0-341813CB __SEGGER_RTL_vfprintf_short_float_long_long 3 036 8 Code RX __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
341813CC-341813D3 HAL_MspInit 8 4 Code RX blto2_FSBL_lto.o
341813D4-341813DB SysTick_Handler 8 4 Code RX blto2_FSBL_lto.o
341813DC-34181717 SystemCoreClockUpdate 828 4 Code RX blto2_FSBL_lto.o
34181718-3418185B HAL_XSPI_MspInit 324 4 Code RX blto2_FSBL_lto.o
3418185C-3418188B HAL_Init 48 4 Code RX blto2_FSBL_lto.o
3418188C-34181897 HAL_GetTick 12 4 Code RX blto2_FSBL_lto.o
34181898-34181913 HAL_BSEC_OTP_Read 124 4 Code RX blto2_FSBL_lto.o
34181914-3418194F __NVIC_SetPriorityGrouping 60 4 Code RX blto2_FSBL_lto.o
34181950-341819F7 HAL_NVIC_SetPriority 168 4 Code RX blto2_FSBL_lto.o
341819F8-34181A07 __NVIC_GetPriorityGrouping 16 4 Code RX blto2_FSBL_lto.o
34181A08-34181A6B NVIC_EncodePriority 100 4 Code RX blto2_FSBL_lto.o
34181A6C-34181A7B HAL_SYSTICK_Config 16 4 Code RX blto2_FSBL_lto.o
34181A7C-34181B6F HAL_DMA_Abort 244 4 Code RX blto2_FSBL_lto.o
34181B70-341822F7 HAL_GPIO_Init 1 928 4 Code RX blto2_FSBL_lto.o
341822F8-34182313 LL_RCC_HSI_SetDivider 28 4 Code RX blto2_FSBL_lto.o
34182314-34182323 LL_RCC_HSI_IsReady 16 4 Code RX blto2_FSBL_lto.o
34182324-34182333 LL_RCC_GetCpuClkSource 16 4 Code RX blto2_FSBL_lto.o
34182334-34182343 LL_RCC_GetSysClkSource 16 4 Code RX blto2_FSBL_lto.o
34182344-34182353 LL_RCC_PLL1_GetSource 16 4 Code RX blto2_FSBL_lto.o
34182354-34182363 LL_RCC_PLL2_GetSource 16 4 Code RX blto2_FSBL_lto.o
34182364-34182373 LL_RCC_PLL3_GetSource 16 4 Code RX blto2_FSBL_lto.o
34182374-34182383 LL_RCC_PLL4_GetSource 16 4 Code RX blto2_FSBL_lto.o
34182384-3418239F LL_RCC_MSI_SetFrequency 28 4 Code RX blto2_FSBL_lto.o
341823A0-341823AF LL_RCC_MSI_IsReady 16 4 Code RX blto2_FSBL_lto.o
341823B0-341823BF LL_RCC_LSI_IsReady 16 4 Code RX blto2_FSBL_lto.o
341823C0-341823CF LL_RCC_LSE_IsReady 16 4 Code RX blto2_FSBL_lto.o
341823D0-341823DF LL_RCC_PLL1_IsReady 16 4 Code RX blto2_FSBL_lto.o
341823E0-341823EF LL_RCC_IC1_GetSource 16 4 Code RX blto2_FSBL_lto.o
341823F0-341823FF LL_RCC_IC2_GetSource 16 4 Code RX blto2_FSBL_lto.o
34182400-3418240F LL_RCC_IC6_GetSource 16 4 Code RX blto2_FSBL_lto.o
34182410-3418241F LL_RCC_IC11_GetSource 16 4 Code RX blto2_FSBL_lto.o
34182420-3418242F LL_RCC_PLL2_IsReady 16 4 Code RX blto2_FSBL_lto.o
34182430-3418243F LL_RCC_PLL3_IsReady 16 4 Code RX blto2_FSBL_lto.o
34182440-3418244F LL_RCC_PLL4_IsReady 16 4 Code RX blto2_FSBL_lto.o
34182450-341824A3 RCC_PLL_Source_IsReady 84 4 Code RX blto2_FSBL_lto.o
341824A4-341824B3 LL_RCC_HSE_IsReady 16 4 Code RX blto2_FSBL_lto.o
341824B4-341824C3 LL_RCC_HSI_GetDivider 16 4 Code RX blto2_FSBL_lto.o
341824C4-341824D3 LL_RCC_PLL1_IsEnabledBypass 16 4 Code RX blto2_FSBL_lto.o
341824D4-341824E3 LL_RCC_PLL2_IsEnabledBypass 16 4 Code RX blto2_FSBL_lto.o
341824E4-341824F3 LL_RCC_PLL3_IsEnabledBypass 16 4 Code RX blto2_FSBL_lto.o
341824F4-34182503 LL_RCC_PLL4_IsEnabledBypass 16 4 Code RX blto2_FSBL_lto.o
34182504-341825EB RCC_GetSysClockFreq 232 4 Code RX blto2_FSBL_lto.o
341825EC-341826DB HAL_RCC_GetClockConfig 240 4 Code RX blto2_FSBL_lto.o
341826DC-341885A7 HAL_RCCEx_PeriphCLKConfig 24 268 4 Code RX blto2_FSBL_lto.o
341885A8-341885B7 LL_RCC_GetRTCClockSource 16 4 Code RX blto2_FSBL_lto.o
341885B8-341885C7 LL_RCC_LSE_IsReady.59 16 4 Code RX blto2_FSBL_lto.o
341885C8-341885E3 LL_RCC_SetRTC_HSEPrescaler 28 4 Code RX blto2_FSBL_lto.o
341885E4-341885FF LL_RCC_SetRTCClockSource 28 4 Code RX blto2_FSBL_lto.o
34188600-3418860F LL_RCC_IC10_Enable.61 16 4 Code RX blto2_FSBL_lto.o
34188610-3418861F LL_RCC_IC15_Enable.62 16 4 Code RX blto2_FSBL_lto.o
34188620-3418862F LL_RCC_IC19_Enable 16 4 Code RX blto2_FSBL_lto.o
34188630-3418863F LL_RCC_IC20_Enable.63 16 4 Code RX blto2_FSBL_lto.o
34188640-3418865B LL_RCC_SetCLKPClockSource 28 4 Code RX blto2_FSBL_lto.o
3418865C-3418866B LL_RCC_SetXSPIClockSource 16 4 Code RX blto2_FSBL_lto.o
3418866C-34188687 LL_RCC_SetFMCClockSource 28 4 Code RX blto2_FSBL_lto.o
34188688-34188697 LL_RCC_SetSDMMCClockSource 16 4 Code RX blto2_FSBL_lto.o
34188698-341886B3 LL_RCC_SetADFClockSource 28 4 Code RX blto2_FSBL_lto.o
341886B4-341886C3 LL_RCC_IC18_Enable 16 4 Code RX blto2_FSBL_lto.o
341886C4-341886D3 LL_RCC_IC17_Enable 16 4 Code RX blto2_FSBL_lto.o
341886D4-341886EF LL_RCC_SetDCMIPPClockSource 28 4 Code RX blto2_FSBL_lto.o
341886F0-341886FF LL_RCC_IC12_Enable 16 4 Code RX blto2_FSBL_lto.o
34188700-3418871B LL_RCC_SetETHClockSource 28 4 Code RX blto2_FSBL_lto.o
3418871C-34188737 LL_RCC_SetETHPHYInterface 28 4 Code RX blto2_FSBL_lto.o
34188738-34188753 LL_RCC_SetETHREFRXClockSource 28 4 Code RX blto2_FSBL_lto.o
34188754-3418876F LL_RCC_SetETHREFTXClockSource 28 4 Code RX blto2_FSBL_lto.o
34188770-3418877F LL_RCC_IC13_Enable 16 4 Code RX blto2_FSBL_lto.o
34188780-3418879B LL_RCC_SetFDCANClockSource 28 4 Code RX blto2_FSBL_lto.o
3418879C-341887AB LL_RCC_SetI2CClockSource 16 4 Code RX blto2_FSBL_lto.o
341887AC-341887BB LL_RCC_SetI3CClockSource 16 4 Code RX blto2_FSBL_lto.o
341887BC-341887CB LL_RCC_SetLPTIMClockSource 16 4 Code RX blto2_FSBL_lto.o
341887CC-341887DB LL_RCC_IC9_Enable 16 4 Code RX blto2_FSBL_lto.o
341887DC-341887EB LL_RCC_IC14_Enable 16 4 Code RX blto2_FSBL_lto.o
341887EC-34188807 LL_RCC_SetLPUARTClockSource 28 4 Code RX blto2_FSBL_lto.o
34188808-34188817 LL_RCC_IC16_Enable 16 4 Code RX blto2_FSBL_lto.o
34188818-34188833 LL_RCC_SetLTDCClockSource 28 4 Code RX blto2_FSBL_lto.o
34188834-3418884F LL_RCC_SetMDFClockSource 28 4 Code RX blto2_FSBL_lto.o
34188850-3418886B LL_RCC_SetPSSIClockSource 28 4 Code RX blto2_FSBL_lto.o
3418886C-3418887B LL_RCC_SetSAIClockSource 16 4 Code RX blto2_FSBL_lto.o
3418887C-34188897 LL_RCC_SetSPDIFRXClockSource 28 4 Code RX blto2_FSBL_lto.o
34188898-341888A7 LL_RCC_SetSPIClockSource 16 4 Code RX blto2_FSBL_lto.o
341888A8-341888B7 LL_RCC_SetUSARTClockSource 16 4 Code RX blto2_FSBL_lto.o
341888B8-341888C7 LL_RCC_SetOTGPHYClockSource 16 4 Code RX blto2_FSBL_lto.o
341888C8-341888D7 LL_RCC_SetOTGPHYCKREFClockSource 16 4 Code RX blto2_FSBL_lto.o
341888D8-3418890B LL_RCC_SetClockSource 52 4 Code RX blto2_FSBL_lto.o
3418890C-3418891B LL_RCC_GetADCPrescaler 16 4 Code RX blto2_FSBL_lto.o
3418891C-3418892B LL_RCC_GetETH1PTPDivider 16 4 Code RX blto2_FSBL_lto.o
3418892C-3418893B LL_RCC_GetI2CClockSource 16 4 Code RX blto2_FSBL_lto.o
3418893C-3418894B LL_RCC_GetI3CClockSource 16 4 Code RX blto2_FSBL_lto.o
3418894C-3418895B LL_RCC_GetLPTIMClockSource 16 4 Code RX blto2_FSBL_lto.o
3418895C-3418896B LL_RCC_GetSAIClockSource 16 4 Code RX blto2_FSBL_lto.o
3418896C-3418897B LL_RCC_GetSDMMCClockSource 16 4 Code RX blto2_FSBL_lto.o
3418897C-3418898B LL_RCC_GetSPIClockSource 16 4 Code RX blto2_FSBL_lto.o
3418898C-3418899B LL_RCC_GetTIMPrescaler 16 4 Code RX blto2_FSBL_lto.o
3418899C-341889AB LL_RCC_GetUSARTClockSource 16 4 Code RX blto2_FSBL_lto.o
341889AC-341889BB LL_RCC_HSE_IsSelectedHSEDiv2AsDiv2Clock 16 4 Code RX blto2_FSBL_lto.o
341889BC-341889CB LL_RCC_GetXSPIClockSource 16 4 Code RX blto2_FSBL_lto.o
341889CC-341889FB LL_RCC_GetClockSource 48 4 Code RX blto2_FSBL_lto.o
341889FC-34188B7F RCCEx_GetADFCLKFreq 388 4 Code RX blto2_FSBL_lto.o
34188B80-34188E5F RCCEx_GetCLKPCLKFreq 736 4 Code RX blto2_FSBL_lto.o
34188E60-34188F43 RCCEx_GetDCMIPPCLKFreq 228 4 Code RX blto2_FSBL_lto.o
34188F44-3418901B RCCEx_GetETH1CLKFreq 216 4 Code RX blto2_FSBL_lto.o
3418901C-3418921F RCCEx_GetI3CCLKFreq 516 4 Code RX blto2_FSBL_lto.o
34189220-341893BB RCCEx_GetLPUARTCLKFreq 412 4 Code RX blto2_FSBL_lto.o
341893BC-3418949F RCCEx_GetLTDCCLKFreq 228 4 Code RX blto2_FSBL_lto.o
341894A0-34189653 RCCEx_GetMDFCLKFreq 436 4 Code RX blto2_FSBL_lto.o
34189654-341897DF RCCEx_GetSDMMCCLKFreq 396 4 Code RX blto2_FSBL_lto.o
341897E0-34189953 RCCEx_GetSPDIFRXCLKFreq 372 4 Code RX blto2_FSBL_lto.o
34189954-34189DFF RCCEx_GetSPICLKFreq 1 196 4 Code RX blto2_FSBL_lto.o
34189E00-3418A193 RCCEx_GetUSARTCLKFreq 916 4 Code RX blto2_FSBL_lto.o
3418A194-3418A527 RCCEx_GetUARTCLKFreq 916 4 Code RX blto2_FSBL_lto.o
3418A528-3418A66B RCCEx_GetOTGPHYCLKFreq 324 4 Code RX blto2_FSBL_lto.o
3418A66C-3418A6FF RCCEx_GetOTGPHYCKREFCLKFreq 148 4 Code RX blto2_FSBL_lto.o
3418A700-3418A8C3 RCCEx_GetXSPICLKFreq 452 4 Code RX blto2_FSBL_lto.o
3418A8C4-3418A8DF RCCEx_GetHCLKFreq 28 4 Code RX blto2_FSBL_lto.o
3418A8E0-3418A8EF LL_RCC_IC3_IsEnabled 16 4 Code RX blto2_FSBL_lto.o
3418A8F0-3418A8FF LL_RCC_IC3_GetSource 16 4 Code RX blto2_FSBL_lto.o
3418A900-3418A90F LL_RCC_IC4_IsEnabled 16 4 Code RX blto2_FSBL_lto.o
3418A910-3418A91F LL_RCC_IC4_GetSource 16 4 Code RX blto2_FSBL_lto.o
3418A920-3418A92F LL_RCC_PLL4_IsReady.74 16 4 Code RX blto2_FSBL_lto.o
3418A930-3418A93F LL_RCC_PLL4P_IsEnabled 16 4 Code RX blto2_FSBL_lto.o
3418A940-3418A94F LL_RCC_PLL4_GetSource.75 16 4 Code RX blto2_FSBL_lto.o
3418A950-3418A9DB RCCEx_GetPLLSourceFreq 140 4 Code RX blto2_FSBL_lto.o
3418A9DC-3418A9EB LL_RCC_PLL4_GetM 16 4 Code RX blto2_FSBL_lto.o
3418A9EC-3418A9FB LL_RCC_PLL4_GetN 16 4 Code RX blto2_FSBL_lto.o
3418A9FC-3418AA0B LL_RCC_PLL4_GetFRACN 16 4 Code RX blto2_FSBL_lto.o
3418AA0C-3418AA1B LL_RCC_PLL4_GetP1 16 4 Code RX blto2_FSBL_lto.o
3418AA1C-3418AA2B LL_RCC_PLL4_GetP2 16 4 Code RX blto2_FSBL_lto.o
3418AA2C-3418AAB3 RCCEx_CalcPLLFreq 136 4 Code RX blto2_FSBL_lto.o
3418AAB4-3418AAC3 LL_RCC_PLL4_IsEnabledBypass.76 16 4 Code RX blto2_FSBL_lto.o
3418AAC4-3418AAD3 LL_RCC_HSI_IsReady.77 16 4 Code RX blto2_FSBL_lto.o
3418AAD4-3418AAE3 LL_RCC_HSI_GetDivider.78 16 4 Code RX blto2_FSBL_lto.o
3418AAE4-3418AAF3 LL_RCC_MSI_IsReady.79 16 4 Code RX blto2_FSBL_lto.o
3418AAF4-3418AB03 LL_RCC_MSI_GetFrequency 16 4 Code RX blto2_FSBL_lto.o
3418AB04-3418AB13 LL_RCC_HSE_IsReady.80 16 4 Code RX blto2_FSBL_lto.o
3418AB14-3418AB23 LL_RCC_PLL3_IsReady.81 16 4 Code RX blto2_FSBL_lto.o
3418AB24-3418AB33 LL_RCC_PLL3P_IsEnabled 16 4 Code RX blto2_FSBL_lto.o
3418AB34-3418AB43 LL_RCC_PLL3_GetSource.82 16 4 Code RX blto2_FSBL_lto.o
3418AB44-3418AB53 LL_RCC_PLL3_GetM 16 4 Code RX blto2_FSBL_lto.o
3418AB54-3418AB63 LL_RCC_PLL3_GetN 16 4 Code RX blto2_FSBL_lto.o
3418AB64-3418AB73 LL_RCC_PLL3_GetFRACN 16 4 Code RX blto2_FSBL_lto.o
3418AB74-3418AB83 LL_RCC_PLL3_GetP1 16 4 Code RX blto2_FSBL_lto.o
3418AB84-3418AB93 LL_RCC_PLL3_GetP2 16 4 Code RX blto2_FSBL_lto.o
3418AB94-3418ABA3 LL_RCC_PLL3_IsEnabledBypass.83 16 4 Code RX blto2_FSBL_lto.o
3418ABA4-3418ABB3 LL_RCC_PLL2_IsReady.84 16 4 Code RX blto2_FSBL_lto.o
3418ABB4-3418ABC3 LL_RCC_PLL2P_IsEnabled 16 4 Code RX blto2_FSBL_lto.o
3418ABC4-3418ABD3 LL_RCC_PLL2_GetSource.85 16 4 Code RX blto2_FSBL_lto.o
3418ABD4-3418ABE3 LL_RCC_PLL2_GetM 16 4 Code RX blto2_FSBL_lto.o
3418ABE4-3418ABF3 LL_RCC_PLL2_GetN 16 4 Code RX blto2_FSBL_lto.o
3418ABF4-3418AC03 LL_RCC_PLL2_GetFRACN 16 4 Code RX blto2_FSBL_lto.o
3418AC04-3418AC13 LL_RCC_PLL2_GetP1 16 4 Code RX blto2_FSBL_lto.o
3418AC14-3418AC23 LL_RCC_PLL2_GetP2 16 4 Code RX blto2_FSBL_lto.o
3418AC24-3418AC33 LL_RCC_PLL2_IsEnabledBypass.86 16 4 Code RX blto2_FSBL_lto.o
3418AC34-3418AC43 LL_RCC_PLL1_IsReady.87 16 4 Code RX blto2_FSBL_lto.o
3418AC44-3418AC53 LL_RCC_PLL1P_IsEnabled 16 4 Code RX blto2_FSBL_lto.o
3418AC54-3418AC63 LL_RCC_PLL1_GetSource.88 16 4 Code RX blto2_FSBL_lto.o
3418AC64-3418AC73 LL_RCC_PLL1_GetM 16 4 Code RX blto2_FSBL_lto.o
3418AC74-3418AC83 LL_RCC_PLL1_GetN 16 4 Code RX blto2_FSBL_lto.o
3418AC84-3418AC93 LL_RCC_PLL1_GetFRACN 16 4 Code RX blto2_FSBL_lto.o
3418AC94-3418ACA3 LL_RCC_PLL1_GetP1 16 4 Code RX blto2_FSBL_lto.o
3418ACA4-3418ACB3 LL_RCC_PLL1_GetP2 16 4 Code RX blto2_FSBL_lto.o
3418ACB4-3418ACC3 LL_RCC_PLL1_IsEnabledBypass.89 16 4 Code RX blto2_FSBL_lto.o
3418ACC4-3418ACD3 LL_RCC_GetAHBPrescaler.90 16 4 Code RX blto2_FSBL_lto.o
3418ACD4-3418ACE3 LL_RCC_GetUSBClockSource 16 4 Code RX blto2_FSBL_lto.o
3418ACE4-3418ACF3 LL_RCC_IC15_IsEnabled 16 4 Code RX blto2_FSBL_lto.o
3418ACF4-3418AD03 LL_RCC_IC15_GetSource 16 4 Code RX blto2_FSBL_lto.o
3418AD04-3418AD13 LL_RCC_GetUARTClockSource 16 4 Code RX blto2_FSBL_lto.o
3418AD14-3418AD2F RCCEx_GetPCLK1Freq 28 4 Code RX blto2_FSBL_lto.o
3418AD30-3418AD4B RCCEx_GetPCLK2Freq 28 4 Code RX blto2_FSBL_lto.o
3418AD4C-3418AD5B LL_RCC_IC9_IsEnabled 16 4 Code RX blto2_FSBL_lto.o
3418AD5C-3418AD6B LL_RCC_IC9_GetSource 16 4 Code RX blto2_FSBL_lto.o
3418AD6C-3418AD7B LL_RCC_IC14_IsEnabled 16 4 Code RX blto2_FSBL_lto.o
3418AD7C-3418AD8B LL_RCC_IC14_GetSource 16 4 Code RX blto2_FSBL_lto.o
3418AD8C-3418AD9B LL_RCC_GetAPB2Prescaler.91 16 4 Code RX blto2_FSBL_lto.o
3418AD9C-3418ADAB LL_RCC_GetAPB1Prescaler.92 16 4 Code RX blto2_FSBL_lto.o
3418ADAC-3418ADC7 RCCEx_GetPCLK4Freq 28 4 Code RX blto2_FSBL_lto.o
3418ADC8-3418ADD7 LL_RCC_IC8_IsEnabled 16 4 Code RX blto2_FSBL_lto.o
3418ADD8-3418ADE7 LL_RCC_IC8_GetSource 16 4 Code RX blto2_FSBL_lto.o
3418ADE8-3418ADF7 LL_RCC_GetAPB4Prescaler.93 16 4 Code RX blto2_FSBL_lto.o
3418ADF8-3418AE07 LL_RCC_IC7_IsEnabled 16 4 Code RX blto2_FSBL_lto.o
3418AE08-3418AE17 LL_RCC_IC7_GetSource 16 4 Code RX blto2_FSBL_lto.o
3418AE18-3418AE27 LL_RCC_IC5_IsEnabled 16 4 Code RX blto2_FSBL_lto.o
3418AE28-3418AE37 LL_RCC_IC5_GetSource 16 4 Code RX blto2_FSBL_lto.o
3418AE38-3418AE47 LL_RCC_LSI_IsReady.94 16 4 Code RX blto2_FSBL_lto.o
3418AE48-3418AE57 LL_RCC_IC20_IsEnabled 16 4 Code RX blto2_FSBL_lto.o
3418AE58-3418AE67 LL_RCC_IC20_GetSource 16 4 Code RX blto2_FSBL_lto.o
3418AE68-3418AE83 RCCEx_GetPCLK5Freq 28 4 Code RX blto2_FSBL_lto.o
3418AE84-3418AE93 LL_RCC_IC16_IsEnabled 16 4 Code RX blto2_FSBL_lto.o
3418AE94-3418AEA3 LL_RCC_IC16_GetSource 16 4 Code RX blto2_FSBL_lto.o
3418AEA4-3418AEB3 LL_RCC_GetAPB5Prescaler.95 16 4 Code RX blto2_FSBL_lto.o
3418AEB4-3418AEC3 LL_RCC_IC10_IsEnabled 16 4 Code RX blto2_FSBL_lto.o
3418AEC4-3418AED3 LL_RCC_IC10_GetSource 16 4 Code RX blto2_FSBL_lto.o
3418AED4-3418AEE3 LL_RCC_IC19_IsEnabled 16 4 Code RX blto2_FSBL_lto.o
3418AEE4-3418AEF3 LL_RCC_IC19_GetSource 16 4 Code RX blto2_FSBL_lto.o
3418AEF4-3418AF03 LL_RCC_IC13_IsEnabled 16 4 Code RX blto2_FSBL_lto.o
3418AF04-3418AF13 LL_RCC_IC13_GetSource 16 4 Code RX blto2_FSBL_lto.o
3418AF14-3418AF23 LL_RCC_IC12_IsEnabled 16 4 Code RX blto2_FSBL_lto.o
3418AF24-3418AF33 LL_RCC_IC12_GetSource 16 4 Code RX blto2_FSBL_lto.o
3418AF34-3418AF43 LL_RCC_IC17_IsEnabled 16 4 Code RX blto2_FSBL_lto.o
3418AF44-3418AF53 LL_RCC_IC17_GetSource 16 4 Code RX blto2_FSBL_lto.o
3418AF54-3418AF63 LL_RCC_CLKP_IsEnabled 16 4 Code RX blto2_FSBL_lto.o
3418AF64-3418AF73 LL_RCC_IC18_IsEnabled 16 4 Code RX blto2_FSBL_lto.o
3418AF74-3418AF83 LL_RCC_IC18_GetSource 16 4 Code RX blto2_FSBL_lto.o
3418AF84-3418B58F HAL_XSPI_Init 1 548 4 Code RX blto2_FSBL_lto.o
3418B590-3418B5F7 XSPI_WaitFlagStateUntilTimeout 104 4 Code RX blto2_FSBL_lto.o
3418B5F8-3418B993 XSPI_ConfigCmd 924 4 Code RX blto2_FSBL_lto.o
3418B994-3418BABF HAL_XSPI_Receive 300 4 Code RX blto2_FSBL_lto.o
3418BAC0-3418BADB LL_AHB5_GRP1_IsEnabledClock 28 4 Code RX blto2_FSBL_lto.o
3418BADC-3418BC3F JumpToApplication 356 4 Code RX blto2_FSBL_lto.o
3418BC40-3418BC8F CheckSFDP_Signature 80 4 Code RX blto2_FSBL_lto.o
3418BC90-3418BD8F SFDP_GetHeader 256 4 Code RX blto2_FSBL_lto.o
3418BD90-3418C01B sfdp_get_paraminfo 652 4 Code RX blto2_FSBL_lto.o
3418C01C-3418CC2F SFDP_BuildGenericDriver 3 092 4 Code RX blto2_FSBL_lto.o
3418CC30-3418CCB3 JEDEC_Basic_Manage4S4S4SEnableSequence 132 4 Code RX blto2_FSBL_lto.o
3418CCB4-3418CCF3 sfdp_getfrequencevalue 64 4 Code RX blto2_FSBL_lto.o
3418CCF4-3418CE97 sfdp_set_dummycycle 420 4 Code RX blto2_FSBL_lto.o
3418CE98-3418CEA7 EXTMEM_DRIVER_NOR_SFDP_DeInit 16 4 Code RX blto2_FSBL_lto.o
3418CEA8-3418CECB EXTMEM_DRIVER_NOR_SFDP_Disable_MemoryMappedMode 36 4 Code RX blto2_FSBL_lto.o
3418CECC-3418CF3F SAL_XSPI_SetClock 116 4 Code RX blto2_FSBL_lto.o
3418CF40-3418CF97 XSPI_FormatCommand 88 4 Code RX blto2_FSBL_lto.o
3418CF98-3418D02F SAL_XSPI_GetId 152 4 Code RX blto2_FSBL_lto.o
3418D030-3418D04F XSPI_Transmit 32 4 Code RX blto2_FSBL_lto.o
3418D050-3418D0D7 SAL_XSPI_CommandSendData 136 4 Code RX blto2_FSBL_lto.o
3418D0D8-3418D15F SAL_XSPI_SendReadCommand 136 4 Code RX blto2_FSBL_lto.o
3418D160-3418D247 SAL_XSPI_CheckStatusRegister 232 4 Code RX blto2_FSBL_lto.o
3418D248-3418D30F SAL_XSPI_EnableMapMode 200 4 Code RX blto2_FSBL_lto.o
3418D310-3418D383 SAL_XSPI_UpdateMemoryType 116 4 Code RX blto2_FSBL_lto.o
3418D384-3418D40F EXTMEM_MemoryMappedMode 140 4 Code RX blto2_FSBL_lto.o
3418D410-3418D4D3 EXTMEM_GetMapAddress 196 4 Code RX blto2_FSBL_lto.o
3418D4D4-3418D4E3 SFDP_BuildGenericDriver.chip_erase_unit 16 4 Cnst RO blto2_FSBL_lto.o
3418D4E4-3418D4F7 _start 20 4 Code RX SEGGER_THUMB_Startup.o
3418D4F8-3418D53B reset_handler 68 4 Code RX STM32N6xx_Startup.o
3418D53C-3418D657 fmodf 284 4 Code RX floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
3418D658-3418D6BF floorf 104 4 Code RX floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
3418D6C0-3418D6D7 __SEGGER_RTL_aPower2f 24 4 Cnst RO utilops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
3418D6D8-3418D72B __aeabi_ul2f 84 4 Code RX floatasmops_arm.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
3418D72C-3418D787 memcpy 92 4 Code RX strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
3418D788-3418D7EF __aeabi_memclr 104 4 Code RX strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
3418D7F0-3418D7FB __SEGGER_RTL_c_locale 12 4 Cnst RO mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
3418D7FC-3418D81B __SEGGER_RTL_codeset_ascii 32 4 Cnst RO mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
3418D81C-3418D873 __SEGGER_RTL_c_locale_data 88 4 Cnst RO mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
3418D874-3418D875 MX_BSEC_Init 2 4 Code RX blto2_FSBL_lto.o
3418D876-3418D88F [.rodata..L__const.sfdp_getfrequencevalue.freqMhz_table] 26 2 Cnst RO blto2_FSBL_lto.o
3418D890-3418D8CD MX_EXTMEM_MANAGER_Init 62 4 Code RX blto2_FSBL_lto.o
3418D8CE-3418D8CF PVD_PVM_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418D8D0-3418D955 MX_GPIO_Init 134 4 Code RX blto2_FSBL_lto.o
3418D956-3418D957 DTS_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418D958-3418D979 LL_AHB4_GRP1_EnableClock 34 4 Code RX blto2_FSBL_lto.o
3418D97A-3418D97B RCC_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418D97C-3418DAE5 main 362 4 Code RX blto2_FSBL_lto.o
3418DAE6-3418DAE7 LOCKUP_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418DAE8-3418DBE5 SystemClock_Config 254 4 Code RX blto2_FSBL_lto.o
3418DBE6-3418DBE7 CACHE_ECC_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418DBE8-3418DC75 OTP_Config 142 4 Code RX blto2_FSBL_lto.o
3418DC76-3418DC77 TCM_ECC_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418DC78-3418DC99 LL_APB4_GRP2_EnableClock 34 4 Code RX blto2_FSBL_lto.o
3418DC9A-3418DC9B BCK_ECC_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418DC9C-3418DCA5 assert_failed 10 4 Code RX blto2_FSBL_lto.o
3418DCA6-3418DCA7 FPU_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418DCA8-3418DCA9 NMI_Handler 2 4 Code RX blto2_FSBL_lto.o
3418DCAA-3418DCAB RTC_S_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418DCAC-3418DCAD HardFault_Handler 2 4 Code RX blto2_FSBL_lto.o
3418DCAE-3418DCAF TAMP_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418DCB0-3418DCB1 MemManage_Handler 2 4 Code RX blto2_FSBL_lto.o
3418DCB2-3418DCB3 RIFSC_TAMPER_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418DCB4-3418DCB5 BusFault_Handler 2 4 Code RX blto2_FSBL_lto.o
3418DCB6-3418DCB7 IAC_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418DCB8-3418DCB9 UsageFault_Handler 2 4 Code RX blto2_FSBL_lto.o
3418DCBA-3418DCBB RCC_S_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418DCBC-3418DCBD SVC_Handler 2 4 Code RX blto2_FSBL_lto.o
3418DCBE-3418DCBF RTC_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418DCC0-3418DCC1 DebugMon_Handler 2 4 Code RX blto2_FSBL_lto.o
3418DCC2-3418DCC3 IWDG_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418DCC4-3418DCC5 PendSV_Handler 2 4 Code RX blto2_FSBL_lto.o
3418DCC6-3418DCC7 WWDG_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418DCC8-3418DEC5 SystemInit 510 4 Code RX blto2_FSBL_lto.o
3418DEC6-3418DEC7 EXTI0_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418DEC8-3418DF45 MX_XSPI2_Init 126 4 Code RX blto2_FSBL_lto.o
3418DF46-3418DF47 EXTI1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418DF48-3418DF69 LL_APB4_GRP2_EnableClock.7 34 4 Code RX blto2_FSBL_lto.o
3418DF6A-3418DF6B EXTI2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418DF6C-3418DF8D LL_AHB4_GRP1_EnableClock.8 34 4 Code RX blto2_FSBL_lto.o
3418DF8E-3418DF8F EXTI3_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418DF90-3418DFB1 LL_AHB5_GRP1_EnableClock 34 4 Code RX blto2_FSBL_lto.o
3418DFB2-3418DFB3 EXTI4_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418DFB4-3418E031 HAL_InitTick 126 4 Code RX blto2_FSBL_lto.o
3418E032-3418E033 EXTI5_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418E034-3418E04D HAL_IncTick 26 4 Code RX blto2_FSBL_lto.o
3418E04E-3418E04F EXTI6_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418E050-3418E089 HAL_Delay 58 4 Code RX blto2_FSBL_lto.o
3418E08A-3418E08B EXTI7_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418E08C-3418E09D HAL_SuspendTick 18 4 Code RX blto2_FSBL_lto.o
3418E09E-3418E09F EXTI8_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418E0A0-3418E199 HAL_BSEC_OTP_Reload 250 4 Code RX blto2_FSBL_lto.o
3418E19A-3418E19B EXTI9_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418E19C-3418E2F1 HAL_BSEC_OTP_Program 342 4 Code RX blto2_FSBL_lto.o
3418E2F2-3418E2F3 EXTI10_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418E2F4-3418E331 HAL_NVIC_SetPriorityGrouping 62 4 Code RX blto2_FSBL_lto.o
3418E332-3418E333 EXTI11_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418E334-3418E371 __NVIC_SetPriority 62 4 Code RX blto2_FSBL_lto.o
3418E372-3418E373 EXTI12_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418E374-3418E3C1 SysTick_Config 78 4 Code RX blto2_FSBL_lto.o
3418E3C2-3418E3C3 EXTI13_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418E3C4-3418E429 HAL_GPIO_WritePin 102 4 Code RX blto2_FSBL_lto.o
3418E42A-3418E42B EXTI14_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418E42C-3418E49D HAL_PWREx_ConfigSupply 114 4 Code RX blto2_FSBL_lto.o
3418E49E-3418E49F EXTI15_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418E4A0-3418E511 HAL_PWREx_ControlVoltageScaling 114 4 Code RX blto2_FSBL_lto.o
3418E512-3418E513 SAES_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418E514-3418E5F5 HAL_PWREx_ConfigVddIORange 226 4 Code RX blto2_FSBL_lto.o
3418E5F6-3418E5F7 CRYP_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418E5F8-3418E609 HAL_PWREx_EnableVddIO3 18 4 Code RX blto2_FSBL_lto.o
3418E60A-3418E60B PKA_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418E60C-3418E619 LL_RCC_HSI_Enable 14 4 Code RX blto2_FSBL_lto.o
3418E61A-3418E61B HASH_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418E61C-3418F115 HAL_RCC_OscConfig 2 810 4 Code RX blto2_FSBL_lto.o
3418F116-3418F117 RNG_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418F118-3418F135 LL_RCC_HSI_SetCalibTrimming 30 4 Code RX blto2_FSBL_lto.o
3418F136-3418F137 MCE1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418F138-3418F145 LL_RCC_HSI_Disable 14 4 Code RX blto2_FSBL_lto.o
3418F146-3418F147 MCE2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418F148-3418F165 LL_RCC_MSI_SetCalibTrimming 30 4 Code RX blto2_FSBL_lto.o
3418F166-3418F167 MCE3_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418F168-3418F175 LL_RCC_MSI_Enable 14 4 Code RX blto2_FSBL_lto.o
3418F176-3418F177 MCE4_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418F178-3418F185 LL_RCC_MSI_Disable 14 4 Code RX blto2_FSBL_lto.o
3418F186-3418F187 ADC1_2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418F188-3418F195 LL_RCC_LSI_Enable 14 4 Code RX blto2_FSBL_lto.o
3418F196-3418F197 CSI_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418F198-3418F1A5 LL_RCC_LSI_Disable 14 4 Code RX blto2_FSBL_lto.o
3418F1A6-3418F1A7 DCMIPP_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418F1A8-3418F281 RCC_PLL_IsNewConfig 218 4 Code RX blto2_FSBL_lto.o
3418F282-3418F283 PAHB_ERR_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418F284-3418F5D1 RCC_PLL_Config 846 4 Code RX blto2_FSBL_lto.o
3418F5D2-3418F5D3 NPU0_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418F5D4-3418F631 RCC_PLL_Enable 94 4 Code RX blto2_FSBL_lto.o
3418F632-3418F633 NPU1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418F634-3418FFF5 HAL_RCC_ClockConfig 2 498 4 Code RX blto2_FSBL_lto.o
3418FFF6-3418FFF7 NPU2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418FFF8-341900E1 RCC_IC_CheckPLLSources 234 4 Code RX blto2_FSBL_lto.o
341900E2-341900E3 NPU3_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341900E4-341900F1 LL_RCC_IC1_Enable 14 4 Code RX blto2_FSBL_lto.o
341900F2-341900F3 CACHEAXI_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341900F4-341901E1 HAL_RCC_GetCpuClockFreq 238 4 Code RX blto2_FSBL_lto.o
341901E2-341901E3 LTDC_LO_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341901E4-341901F9 LL_RCC_IC1_GetDivider 22 4 Code RX blto2_FSBL_lto.o
341901FA-341901FB LTDC_LO_ERR_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341901FC-34190215 HAL_RCC_GetSysClockFreq 26 4 Code RX blto2_FSBL_lto.o
34190216-34190217 DMA2D_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34190218-3419022D LL_RCC_IC2_GetDivider 22 4 Code RX blto2_FSBL_lto.o
3419022E-3419022F JPEG_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34190230-3419023D LL_RCC_IC5_Enable.60 14 4 Code RX blto2_FSBL_lto.o
3419023E-3419023F VENC_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34190240-3419024D LL_RCC_IC3_Enable 14 4 Code RX blto2_FSBL_lto.o
3419024E-3419024F GFXMMU_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34190250-3419025D LL_RCC_IC4_Enable 14 4 Code RX blto2_FSBL_lto.o
3419025E-3419025F GFXTIM_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34190260-3419026D LL_RCC_CLKP_Enable 14 4 Code RX blto2_FSBL_lto.o
3419026E-3419026F GPU2D_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34190270-3419027D LL_RCC_IC7_Enable 14 4 Code RX blto2_FSBL_lto.o
3419027E-3419027F GPU2D_ER_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34190280-3419028D LL_RCC_IC8_Enable 14 4 Code RX blto2_FSBL_lto.o
3419028E-3419028F ICACHE_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34190290-341902A1 LL_RCC_HSE_SelectHSEDiv2AsDiv2Clock 18 4 Code RX blto2_FSBL_lto.o
341902A2-341902A3 HPDMA1_Channel0_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341902A4-341902B5 LL_RCC_HSE_SelectHSEAsDiv2Clock 18 4 Code RX blto2_FSBL_lto.o
341902B6-341902B7 HPDMA1_Channel1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341902B8-341902D5 LL_RCC_SetTIMPrescaler 30 4 Code RX blto2_FSBL_lto.o
341902D6-341902D7 HPDMA1_Channel2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341902D8-341902ED LL_RCC_GetADCClockSource 22 4 Code RX blto2_FSBL_lto.o
341902EE-341902EF HPDMA1_Channel3_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341902F0-34190305 LL_RCC_GetADFClockSource 22 4 Code RX blto2_FSBL_lto.o
34190306-34190307 HPDMA1_Channel4_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34190308-3419031D LL_RCC_GetCLKPClockSource 22 4 Code RX blto2_FSBL_lto.o
3419031E-3419031F HPDMA1_Channel5_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34190320-34190335 LL_RCC_GetDCMIPPClockSource 22 4 Code RX blto2_FSBL_lto.o
34190336-34190337 HPDMA1_Channel6_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34190338-3419034D LL_RCC_GetETHClockSource 22 4 Code RX blto2_FSBL_lto.o
3419034E-3419034F HPDMA1_Channel7_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34190350-34190365 LL_RCC_GetETHPTPClockSource 22 4 Code RX blto2_FSBL_lto.o
34190366-34190367 HPDMA1_Channel8_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34190368-3419037D LL_RCC_GetFDCANClockSource 22 4 Code RX blto2_FSBL_lto.o
3419037E-3419037F HPDMA1_Channel9_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34190380-34190395 LL_RCC_GetFMCClockSource 22 4 Code RX blto2_FSBL_lto.o
34190396-34190397 HPDMA1_Channel10_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34190398-341903AD LL_RCC_GetLPUARTClockSource 22 4 Code RX blto2_FSBL_lto.o
341903AE-341903AF HPDMA1_Channel11_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341903B0-341903C5 LL_RCC_GetLTDCClockSource 22 4 Code RX blto2_FSBL_lto.o
341903C6-341903C7 HPDMA1_Channel12_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341903C8-341903DD LL_RCC_GetMDFClockSource 22 4 Code RX blto2_FSBL_lto.o
341903DE-341903DF HPDMA1_Channel13_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341903E0-341903F5 LL_RCC_GetPSSIClockSource 22 4 Code RX blto2_FSBL_lto.o
341903F6-341903F7 HPDMA1_Channel14_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341903F8-3419040D LL_RCC_GetSPDIFRXClockSource 22 4 Code RX blto2_FSBL_lto.o
3419040E-3419040F HPDMA1_Channel15_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34190410-34190A69 HAL_RCCEx_GetPeriphCLKFreq 1 626 4 Code RX blto2_FSBL_lto.o
34190A6A-34190A6B GPDMA1_Channel0_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34190A6C-34190C21 RCCEx_GetADCCLKFreq 438 4 Code RX blto2_FSBL_lto.o
34190C22-34190C23 GPDMA1_Channel1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34190C24-34190CA9 RCCEx_GetCSICLKFreq 134 4 Code RX blto2_FSBL_lto.o
34190CAA-34190CAB GPDMA1_Channel2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34190CAC-34190D89 RCCEx_GetETH1PTPCLKFreq 222 4 Code RX blto2_FSBL_lto.o
34190D8A-34190D8B GPDMA1_Channel3_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34190D8C-34190E59 RCCEx_GetFDCANCLKFreq 206 4 Code RX blto2_FSBL_lto.o
34190E5A-34190E5B GPDMA1_Channel4_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34190E5C-34190F95 RCCEx_GetFMCCLKFreq 314 4 Code RX blto2_FSBL_lto.o
34190F96-34190F97 GPDMA1_Channel5_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34190F98-34191259 RCCEx_GetI2CCLKFreq 706 4 Code RX blto2_FSBL_lto.o
3419125A-3419125B GPDMA1_Channel6_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3419125C-3419151D RCCEx_GetLPTIMCLKFreq 706 4 Code RX blto2_FSBL_lto.o
3419151E-3419151F GPDMA1_Channel7_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34191520-341915F9 RCCEx_GetPSSICLKFreq 218 4 Code RX blto2_FSBL_lto.o
341915FA-341915FB GPDMA1_Channel8_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341915FC-34191679 RCCEx_GetRTCCLKFreq 126 4 Code RX blto2_FSBL_lto.o
3419167A-3419167B GPDMA1_Channel9_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3419167C-341918D9 RCCEx_GetSAICLKFreq 606 4 Code RX blto2_FSBL_lto.o
341918DA-341918DB GPDMA1_Channel10_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341918DC-341918F1 LL_RCC_IC3_GetDivider 22 4 Code RX blto2_FSBL_lto.o
341918F2-341918F3 GPDMA1_Channel11_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341918F4-34191975 HAL_RCCEx_GetPLL1CLKFreq 130 4 Code RX blto2_FSBL_lto.o
34191976-34191977 GPDMA1_Channel12_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34191978-341919F9 HAL_RCCEx_GetPLL2CLKFreq 130 4 Code RX blto2_FSBL_lto.o
341919FA-341919FB GPDMA1_Channel13_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341919FC-34191A7D HAL_RCCEx_GetPLL3CLKFreq 130 4 Code RX blto2_FSBL_lto.o
34191A7E-34191A7F GPDMA1_Channel14_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34191A80-34191B01 HAL_RCCEx_GetPLL4CLKFreq 130 4 Code RX blto2_FSBL_lto.o
34191B02-34191B03 GPDMA1_Channel15_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34191B04-34191B19 LL_RCC_IC4_GetDivider 22 4 Code RX blto2_FSBL_lto.o
34191B1A-34191B1B I2C1_EV_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34191B1C-34191B31 LL_RCC_IC15_GetDivider 22 4 Code RX blto2_FSBL_lto.o
34191B32-34191B33 I2C1_ER_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34191B34-34191B49 LL_RCC_IC9_GetDivider 22 4 Code RX blto2_FSBL_lto.o
34191B4A-34191B4B I2C2_EV_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34191B4C-34191B61 LL_RCC_IC14_GetDivider 22 4 Code RX blto2_FSBL_lto.o
34191B62-34191B63 I2C2_ER_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34191B64-34191B79 LL_RCC_IC8_GetDivider 22 4 Code RX blto2_FSBL_lto.o
34191B7A-34191B7B I2C3_EV_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34191B7C-34191B91 LL_RCC_IC7_GetDivider 22 4 Code RX blto2_FSBL_lto.o
34191B92-34191B93 I2C3_ER_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34191B94-34191BA9 LL_RCC_IC5_GetDivider 22 4 Code RX blto2_FSBL_lto.o
34191BAA-34191BAB I2C4_EV_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34191BAC-34191BC1 LL_RCC_IC20_GetDivider 22 4 Code RX blto2_FSBL_lto.o
34191BC2-34191BC3 I2C4_ER_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34191BC4-34191BD9 LL_RCC_IC16_GetDivider 22 4 Code RX blto2_FSBL_lto.o
34191BDA-34191BDB I3C1_EV_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34191BDC-34191BF1 LL_RCC_IC10_GetDivider 22 4 Code RX blto2_FSBL_lto.o
34191BF2-34191BF3 I3C1_ER_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34191BF4-34191C09 LL_RCC_IC19_GetDivider 22 4 Code RX blto2_FSBL_lto.o
34191C0A-34191C0B I3C2_EV_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34191C0C-34191C21 LL_RCC_IC13_GetDivider 22 4 Code RX blto2_FSBL_lto.o
34191C22-34191C23 I3C2_ER_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34191C24-34191C39 LL_RCC_IC12_GetDivider 22 4 Code RX blto2_FSBL_lto.o
34191C3A-34191C3B TIM1_BRK_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34191C3C-34191C51 LL_RCC_IC17_GetDivider 22 4 Code RX blto2_FSBL_lto.o
34191C52-34191C53 TIM1_UP_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34191C54-34191C69 LL_RCC_IC18_GetDivider 22 4 Code RX blto2_FSBL_lto.o
34191C6A-34191C6B TIM1_TRG_CCU_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34191C6C-34191C7D HAL_XSPI_SetTimeout 18 4 Code RX blto2_FSBL_lto.o
34191C7E-34191C7F TIM1_CC_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34191C80-341920D1 HAL_XSPI_Command 1 106 4 Code RX blto2_FSBL_lto.o
341920D2-341920D3 TIM2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341920D4-341921B5 HAL_XSPI_Transmit 226 4 Code RX blto2_FSBL_lto.o
341921B6-341921B7 TIM3_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341921B8-3419234D HAL_XSPI_AutoPolling 406 4 Code RX blto2_FSBL_lto.o
3419234E-3419234F TIM4_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34192350-34192499 HAL_XSPI_MemoryMapped 330 4 Code RX blto2_FSBL_lto.o
3419249A-3419249B TIM5_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3419249C-34192591 HAL_XSPI_Abort 246 4 Code RX blto2_FSBL_lto.o
34192592-34192593 TIM6_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34192594-34192901 HAL_XSPIM_Config 878 4 Code RX blto2_FSBL_lto.o
34192902-34192903 TIM7_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34192904-341929D5 XSPIM_GetConfig 210 4 Code RX blto2_FSBL_lto.o
341929D6-341929D7 TIM8_BRK_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341929D8-341929F9 BOOT_Application 34 4 Code RX blto2_FSBL_lto.o
341929FA-341929FB TIM8_UP_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341929FC-34192A59 MapMemory 94 4 Code RX blto2_FSBL_lto.o
34192A5A-34192A5B TIM8_TRG_CCU_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34192A5C-34192AD9 SFDP_ReadHeader 126 4 Code RX blto2_FSBL_lto.o
34192ADA-34192ADB TIM8_CC_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34192ADC-34192CA5 SFDP_CollectData 458 4 Code RX blto2_FSBL_lto.o
34192CA6-34192CA7 TIM9_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34192CA8-34192E71 SFDP_MemoryReset 458 4 Code RX blto2_FSBL_lto.o
34192E72-34192E73 TIM10_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34192E74-34192FC5 JEDEC_Basic_ManageQuadEnableRequirement 338 4 Code RX blto2_FSBL_lto.o
34192FC6-34192FC7 TIM11_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34192FC8-341931A9 sfdp_enter_octal_mode 482 4 Code RX blto2_FSBL_lto.o
341931AA-341931AB TIM12_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341931AC-34193211 driver_check_FlagBUSY 102 4 Code RX blto2_FSBL_lto.o
34193212-34193213 TIM13_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193214-34193345 EXTMEM_DRIVER_NOR_SFDP_Init 306 4 Code RX blto2_FSBL_lto.o
34193346-34193347 TIM14_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193348-34193381 EXTMEM_DRIVER_NOR_SFDP_Enable_MemoryMappedMode 58 4 Code RX blto2_FSBL_lto.o
34193382-34193383 TIM15_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193384-341933D9 SAL_XSPI_Init 86 4 Code RX blto2_FSBL_lto.o
341933DA-341933DB TIM16_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341933DC-34193675 SAL_XSPI_MemoryConfig 666 4 Code RX blto2_FSBL_lto.o
34193676-34193677 TIM17_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193678-34193755 SAL_XSPI_GetSFDP 222 4 Code RX blto2_FSBL_lto.o
34193756-34193757 TIM18_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193758-341937E1 SAL_XSPI_Write 138 4 Code RX blto2_FSBL_lto.o
341937E2-341937E3 LPTIM1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341937E4-341938A1 SAL_XSPI_CommandSendReadAddress 190 4 Code RX blto2_FSBL_lto.o
341938A2-341938A3 LPTIM2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341938A4-341938B9 SAL_XSPI_DisableMapMode 22 4 Code RX blto2_FSBL_lto.o
341938BA-341938BB LPTIM3_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341938BC-341938CD SAL_XSPI_Abort 18 4 Code RX blto2_FSBL_lto.o
341938CE-341938CF LPTIM4_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341938D0-3419392D EXTMEM_Init 94 4 Code RX blto2_FSBL_lto.o
3419392E-3419392F LPTIM5_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193930-3419397D EXTMEM_DeInit 78 4 Code RX blto2_FSBL_lto.o
3419397E-3419397F ADF1_FLT0_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193980-341939BD __aeabi_f2ulz 62 4 Code RX floatasmops_arm.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
341939BE-341939BF MDF1_FLT0_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341939C0-34193AED __aeabi_uldivmod 302 4 Code RX intasmops_arm.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193AEE-34193AEF MDF1_FLT1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193AF0-34193AF1 MDF1_FLT2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193AF2-34193AF3 MDF1_FLT3_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193AF4-34193AF5 MDF1_FLT4_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193AF6-34193AF7 MDF1_FLT5_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193AF8-34193AF9 SAI1_A_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193AFA-34193AFB SAI1_B_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193AFC-34193AFD SAI2_A_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193AFE-34193AFF SAI2_B_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B00-34193B01 SPDIFRX_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B02-34193B03 SPI1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B04-34193B05 SPI2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B06-34193B07 SPI3_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B08-34193B09 SPI4_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B0A-34193B0B SPI5_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B0C-34193B0D SPI6_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B0E-34193B0F USART1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B10-34193B11 USART2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B12-34193B13 USART3_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B14-34193B15 UART4_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B16-34193B17 UART5_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B18-34193B19 USART6_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B1A-34193B1B UART7_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B1C-34193B1D UART8_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B1E-34193B1F UART9_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B20-34193B21 USART10_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B22-34193B23 LPUART1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B24-34193B25 XSPI1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B26-34193B27 XSPI2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B28-34193B29 XSPI3_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B2A-34193B2B FMC_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B2C-34193B2D SDMMC1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B2E-34193B2F SDMMC2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B30-34193B31 UCPD1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B32-34193B33 USB1_OTG_HS_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B34-34193B35 USB2_OTG_HS_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B36-34193B37 ETH1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B38-34193B39 FDCAN1_IT0_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B3A-34193B3B FDCAN1_IT1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B3C-34193B3D FDCAN2_IT0_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B3E-34193B3F FDCAN2_IT1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B40-34193B41 FDCAN3_IT0_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B42-34193B43 FDCAN3_IT1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B44-34193B45 FDCAN_CU_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B46-34193B47 MDIOS_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B48-34193B49 DCMI_PSSI_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B4A-34193B4B WAKEUP_PIN_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B4C-34193B4D CTI_INT0_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B4E-34193B4F CTI_INT1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B50-34193B51 LTDC_UP_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B52-34193B53 LTDC_UP_ERR_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B54-34193B81 fwrite 46 2 Code RX fileops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193B82-34193B8F __SEGGER_RTL_float32_isnan 14 2 Code RX floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193B90-34193BA1 __SEGGER_RTL_float32_isinf 18 2 Code RX floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193BA2-34193BD7 ldexpf 54 2 Code RX floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193BD8-34193C11 __SEGGER_RTL_pow10f 58 2 Code RX utilops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193C12-34193C2B __SEGGER_RTL_prin_flush 26 2 Code RX prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193C2C-34193C35 __SEGGER_RTL_stream_write 10 2 Code RX prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193C36-34193C3B __SEGGER_RTL_X_file_write 6 2 Code RX prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193C3C-34193C9D _DoInit 98 2 Code RX SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193C9E-34193CB3 _GetAvailWriteSpace 22 2 Code RX SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193CB4-34193CED _WriteNoCheck 58 2 Code RX SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193CEE-34193D17 strlen 42 2 Code RX strops.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193D18-34193D31 __SEGGER_RTL_current_locale 26 2 Code RX mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193D32-34193D3F __SEGGER_RTL_ascii_wctomb 14 2 Code RX mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193D40-34193D47 SFDP_BuildGenericDriver.block_erase_unit 8 2 Cnst RO blto2_FSBL_lto.o
34193D48-34193D5F __SEGGER_RTL_float32_isnormal 24 2 Code RX floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193D60-34193D67 __SEGGER_RTL_float32_signbit 8 2 Code RX floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193D68-34193D8B frexpf 36 2 Code RX floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193D8C-34193D93 abs 8 2 Code RX intops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193D94-34193E17 __SEGGER_RTL_putc 132 2 Code RX prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193E18-34193E37 __SEGGER_RTL_print_padding 32 2 Code RX prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193E38-34193E4B __SEGGER_RTL_pre_padding 20 2 Code RX prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193E4C-34193E67 vfprintf 28 2 Code RX prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193E68-34193ECF vfprintf_l 104 2 Code RX prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193ED0-34193EFB printf 44 2 Code RX prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193EFC-34193F2F __SEGGER_RTL_X_file_stat 52 2 Code RX prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193F30-34193F33 __SEGGER_RTL_X_file_bufsize 4 2 Code RX prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193F34-34193F8B _WriteBlocking 88 2 Code RX SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193F8C-34193FE3 SEGGER_RTT_WriteNoLock 88 2 Code RX SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193FE4-3419400B SEGGER_RTT_Write 40 2 Code RX SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
3419400C-34194067 strnlen 92 2 Code RX strops.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34194068-34194097 __SEGGER_RTL_ascii_mbtowc 48 2 Code RX mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34194098-341940B7 __SEGGER_RTL_ascii_isctype 32 2 Code RX mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
341940B8-341940C3 __SEGGER_RTL_ascii_toupper 12 2 Code RX mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
341940C4-341940CF __SEGGER_RTL_ascii_tolower 12 2 Code RX mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
341940D0-341940EF __SEGGER_RTL_ascii_iswctype 32 2 Code RX mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
341940F0-341940FB __SEGGER_RTL_ascii_towupper 12 2 Code RX mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
341940FC-34194107 __SEGGER_RTL_ascii_towlower 12 2 Code RX mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34194108-3419410E [.rodata.libc..L.str] 7 1 Cnst RO __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
3419410F-34194165 __SEGGER_RTL_c_locale_month_names 87 1 Cnst RO mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34194166-3419416C __SEGGER_RTL_c_locale_am_pm_indicator 7 1 Cnst RO mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
3419416D-3419417B __SEGGER_RTL_c_locale_date_time_format 15 1 Cnst RO mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
3419417C-341941E5 [.rodata..L.str.20] 106 1 Cnst RO blto2_FSBL_lto.o
341941E6-3419424F [.rodata..L.str.33] 106 1 Cnst RO blto2_FSBL_lto.o
34194250-341942B9 [.rodata..L.str.98] 106 1 Cnst RO blto2_FSBL_lto.o
341942BA-341942F3 __SEGGER_RTL_c_locale_day_names 58 1 Cnst RO mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
341942F4-341942F5 [.rodata.libc..L.str] 2 1 Cnst RO mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
341942F6-341942F7 __SEGGER_RTL_data_utf8_period 2 1 Cnst RO mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
341942F8-34194318 FW_VERSION 33 1 Cnst RO blto2_FSBL_lto.o
34194319-34194331 [.rodata..L.str] 25 1 Cnst RO blto2_FSBL_lto.o
34194332-3419439A [.rodata..L.str.50] 105 1 Cnst RO blto2_FSBL_lto.o
3419439B-3419439F [.rodata.libc..L.str.1] 5 1 Cnst RO __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
341943A0-341943A4 [.rodata.libc..L.str.2] 5 1 Cnst RO __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
341943A5-341943A9 [.rodata.libc..L.str.3] 5 1 Cnst RO __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
341943AA-341943AE [.rodata.libc..L.str.4] 5 1 Cnst RO __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
341943AF-341943BF _DoInit._aInitStr 17 1 Cnst RO SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
341943C0-341943C8 [.rodata.libc..L.str] 9 1 Cnst RO SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
341943C9-341943D1 __SEGGER_RTL_c_locale_date_format 9 1 Cnst RO mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
341943D2-341943DA __SEGGER_RTL_c_locale_time_format 9 1 Cnst RO mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
341943DB-341943F7 __SEGGER_RTL_c_locale_abbrev_day_names 29 1 Cnst RO mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
341943F8-34194428 __SEGGER_RTL_c_locale_abbrev_month_names 49 1 Cnst RO mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34194429-34194429 __SEGGER_RTL_data_empty_string 1 1 Cnst RO mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
3419442A-34194436 __SEGGER_RTL_ascii_ctype_mask 13 1 Cnst RO mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34194437-34194437 ( UNUSED .=.+1 ) 1 - ---- - -
34194438-3419443B [.init_array] 4 4 ---- -- STM32N6xx_Startup.o
3419443C-341944A7 [.rodata..L.str.23] 108 1 Cnst RO blto2_FSBL_lto.o
341944A8-34194513 [.rodata..L.str.41] 108 1 Cnst RO blto2_FSBL_lto.o
34194514-3419457F [.rodata..L.str.58] 108 1 Cnst RO blto2_FSBL_lto.o
34194580-3419458F __SEGGER_RTL_hex_uc 16 1 Cnst RO prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34194590-3419459F __SEGGER_RTL_hex_lc 16 1 Cnst RO prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
341945A0-341945A3 [.rodata.libc..L.str.5] 4 1 Cnst RO __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
341945A4-341945A7 [.rodata.libc..L.str.6] 4 1 Cnst RO __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
341945A8-34194627 __SEGGER_RTL_ascii_ctype_map 128 1 Cnst RO mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34194628-3419464B __SEGGER_init_ctors 36 4 Code RX SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
3419464C-3419466F __SEGGER_init_table__ 36 4 Cnst RO [ Linker created ]
34194670-3419469B __SEGGER_init_data__ 44 4 Cnst RO [ Linker created ]
3419469C-341946AD __SEGGER_init_zero 18 2 Code RX SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
341946AE-341946C1 __SEGGER_init_copy 20 2 Code RX SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)

UNUSED MEMORY SUMMARY

Detail

Range Size Reason
34000791-34061FFF 399 471 Unused memory between sections '.data.uwTickFreq' and '.bss.block.stack'
34194437-34194437 1 Unused memory between sections '.rodata.libc.__SEGGER_RTL_ascii_ctype_mask' and '.init_array'

INITIALIZATION TABLE

Constructor list

Table
Address
Called
Address
Called
Symbol or [section] name
0x34194438 0x341813DD SystemCoreClockUpdate

Initialize by zero

Initialize by copy with packing=none

Range Size Symbol or [section] name
34000000-340000AB 172 extmem_list_config
340000AC-34000153 168 _SEGGER_RTT
34000154-340001CB 120 sfdp_param_info
340001CC-3400023B 112 JEDEC_SCCR_Map
3400023C-3400029F 100 hxspi2
340002A0-340002FF 96 JEDEC_Basic
34000300-3400031F 32 JEDEC_OctalDdr
34000320-34000337 24 JEDEC_XSPI10
34000338-3400033F 8 JEDEC_Address4Bytes
34000340-34000343 4 uwTick
34000344-34000347 4 __SEGGER_RTL_stdout_file
34000348-3400034B 4 __SEGGER_RTL_stdin_file
3400034C-3400034F 4 __SEGGER_RTL_stderr_file
34000350-34000353 4 __SEGGER_RTL_locale_ptr
34000354-34000357 4 JumpToApplication.JumpToApp
34000358-34000757 1 024 _acUpBuffer
34000758-34000767 16 _acDownBuffer
34000000-34000767 1 896 Total (17 sections)

Summary

Range Size Symbol or [section] name
34000768-3400077B 20 __SEGGER_RTL_global_locale
3400077C-3400077F 4 uwTickPrio
34000780-34000783 4 stdout
34000784-34000787 4 stdin
34000788-3400078B 4 stderr
3400078C-3400078F 4 SystemCoreClock
34000790-34000790 1 uwTickFreq
34000768-34000790 41 Total (7 sections)
Description Size
Initialization table 36 bytes
Source image 41 bytes
Destination image 1 937 bytes
Saving 1 860 bytes

LINKER-CREATED VENEERS

Arm-Arm range extension veneers

Veneer Size Target Source
0 Total

Thumb-Thumb range extension veneers

Veneer Size Target Source
0 Total

Arm-Thumb mode switch veneers

Veneer Size Target Source
0 Total

Thumb-Arm mode switch veneers

Veneer Size Target Source
0 Total

Summary

Veneer Type Size
Thumb-Arm mode switch 0
Arm-Thumb mode switch 0
Thumb-Thumb range extension 0
Arm-Arm range extension 0
Total: 0

SYMBOL LIST

Function symbols by name

Symbol name Address Size Align Type Bd Object File
ADC1_2_IRQHandler 0x3418F187 2 Code Wk stm32n657xx_Vectors.o
ADF1_FLT0_IRQHandler 0x3419397F 2 Code Wk stm32n657xx_Vectors.o
BCK_ECC_IRQHandler 0x3418DC9B 2 Code Wk stm32n657xx_Vectors.o
BOOT_Application 0x341929D9 34 4 Code Lc blto2_FSBL_lto.o
BusFault_Handler 0x3418DCB5 2 4 Code Gb blto2_FSBL_lto.o
CACHEAXI_IRQHandler 0x341900F3 2 Code Wk stm32n657xx_Vectors.o
CACHE_ECC_IRQHandler 0x3418DBE7 2 Code Wk stm32n657xx_Vectors.o
CRYP_IRQHandler 0x3418E5F7 2 Code Wk stm32n657xx_Vectors.o
CSI_IRQHandler 0x3418F197 2 Code Wk stm32n657xx_Vectors.o
CTI_INT0_IRQHandler 0x34193B4D 2 Code Wk stm32n657xx_Vectors.o
CTI_INT1_IRQHandler 0x34193B4F 2 Code Wk stm32n657xx_Vectors.o
CheckSFDP_Signature 0x3418BC41 80 4 Code Lc blto2_FSBL_lto.o
DCMIPP_IRQHandler 0x3418F1A7 2 Code Wk stm32n657xx_Vectors.o
DCMI_PSSI_IRQHandler 0x34193B49 2 Code Wk stm32n657xx_Vectors.o
DMA2D_IRQHandler 0x34190217 2 Code Wk stm32n657xx_Vectors.o
DTS_IRQHandler 0x3418D957 2 Code Wk stm32n657xx_Vectors.o
DebugMon_Handler 0x3418DCC1 2 4 Code Gb blto2_FSBL_lto.o
ETH1_IRQHandler 0x34193B37 2 Code Wk stm32n657xx_Vectors.o
EXTI0_IRQHandler 0x3418DEC7 2 Code Wk stm32n657xx_Vectors.o
EXTI10_IRQHandler 0x3418E2F3 2 Code Wk stm32n657xx_Vectors.o
EXTI11_IRQHandler 0x3418E333 2 Code Wk stm32n657xx_Vectors.o
EXTI12_IRQHandler 0x3418E373 2 Code Wk stm32n657xx_Vectors.o
EXTI13_IRQHandler 0x3418E3C3 2 Code Wk stm32n657xx_Vectors.o
EXTI14_IRQHandler 0x3418E42B 2 Code Wk stm32n657xx_Vectors.o
EXTI15_IRQHandler 0x3418E49F 2 Code Wk stm32n657xx_Vectors.o
EXTI1_IRQHandler 0x3418DF47 2 Code Wk stm32n657xx_Vectors.o
EXTI2_IRQHandler 0x3418DF6B 2 Code Wk stm32n657xx_Vectors.o
EXTI3_IRQHandler 0x3418DF8F 2 Code Wk stm32n657xx_Vectors.o
EXTI4_IRQHandler 0x3418DFB3 2 Code Wk stm32n657xx_Vectors.o
EXTI5_IRQHandler 0x3418E033 2 Code Wk stm32n657xx_Vectors.o
EXTI6_IRQHandler 0x3418E04F 2 Code Wk stm32n657xx_Vectors.o
EXTI7_IRQHandler 0x3418E08B 2 Code Wk stm32n657xx_Vectors.o
EXTI8_IRQHandler 0x3418E09F 2 Code Wk stm32n657xx_Vectors.o
EXTI9_IRQHandler 0x3418E19B 2 Code Wk stm32n657xx_Vectors.o
EXTMEM_DRIVER_NOR_SFDP_DeInit 0x3418CE99 16 4 Code Lc blto2_FSBL_lto.o
EXTMEM_DRIVER_NOR_SFDP_Disable_MemoryMappedMode 0x3418CEA9 36 4 Code Lc blto2_FSBL_lto.o
EXTMEM_DRIVER_NOR_SFDP_Enable_MemoryMappedMode 0x34193349 58 4 Code Lc blto2_FSBL_lto.o
EXTMEM_DRIVER_NOR_SFDP_Init 0x34193215 306 4 Code Lc blto2_FSBL_lto.o
EXTMEM_DeInit 0x34193931 78 4 Code Lc blto2_FSBL_lto.o
EXTMEM_GetMapAddress 0x3418D411 196 4 Code Lc blto2_FSBL_lto.o
EXTMEM_Init 0x341938D1 94 4 Code Lc blto2_FSBL_lto.o
EXTMEM_MemoryMappedMode 0x3418D385 140 4 Code Lc blto2_FSBL_lto.o
Error_Handler 0x3418074D 4 4 Code Lc blto2_FSBL_lto.o
FDCAN1_IT0_IRQHandler 0x34193B39 2 Code Wk stm32n657xx_Vectors.o
FDCAN1_IT1_IRQHandler 0x34193B3B 2 Code Wk stm32n657xx_Vectors.o
FDCAN2_IT0_IRQHandler 0x34193B3D 2 Code Wk stm32n657xx_Vectors.o
FDCAN2_IT1_IRQHandler 0x34193B3F 2 Code Wk stm32n657xx_Vectors.o
FDCAN3_IT0_IRQHandler 0x34193B41 2 Code Wk stm32n657xx_Vectors.o
FDCAN3_IT1_IRQHandler 0x34193B43 2 Code Wk stm32n657xx_Vectors.o
FDCAN_CU_IRQHandler 0x34193B45 2 Code Wk stm32n657xx_Vectors.o
FMC_IRQHandler 0x34193B2B 2 Code Wk stm32n657xx_Vectors.o
FPU_IRQHandler 0x3418DCA7 2 Code Wk stm32n657xx_Vectors.o
GFXMMU_IRQHandler 0x3419024F 2 Code Wk stm32n657xx_Vectors.o
GFXTIM_IRQHandler 0x3419025F 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel0_IRQHandler 0x34190A6B 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel10_IRQHandler 0x341918DB 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel11_IRQHandler 0x341918F3 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel12_IRQHandler 0x34191977 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel13_IRQHandler 0x341919FB 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel14_IRQHandler 0x34191A7F 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel15_IRQHandler 0x34191B03 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel1_IRQHandler 0x34190C23 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel2_IRQHandler 0x34190CAB 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel3_IRQHandler 0x34190D8B 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel4_IRQHandler 0x34190E5B 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel5_IRQHandler 0x34190F97 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel6_IRQHandler 0x3419125B 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel7_IRQHandler 0x3419151F 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel8_IRQHandler 0x341915FB 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel9_IRQHandler 0x3419167B 2 Code Wk stm32n657xx_Vectors.o
GPU2D_ER_IRQHandler 0x3419027F 2 Code Wk stm32n657xx_Vectors.o
GPU2D_IRQHandler 0x3419026F 2 Code Wk stm32n657xx_Vectors.o
HAL_BSEC_OTP_Program 0x3418E19D 342 4 Code Lc blto2_FSBL_lto.o
HAL_BSEC_OTP_Read 0x34181899 124 4 Code Lc blto2_FSBL_lto.o
HAL_BSEC_OTP_Reload 0x3418E0A1 250 4 Code Lc blto2_FSBL_lto.o
HAL_DMA_Abort 0x34181A7D 244 4 Code Lc blto2_FSBL_lto.o
HAL_Delay 0x3418E051 58 4 Code Lc blto2_FSBL_lto.o
HAL_GPIO_Init 0x34181B71 1 928 4 Code Lc blto2_FSBL_lto.o
HAL_GPIO_WritePin 0x3418E3C5 102 4 Code Lc blto2_FSBL_lto.o
HAL_GetTick 0x3418188D 12 4 Code Lc blto2_FSBL_lto.o
HAL_IncTick 0x3418E035 26 4 Code Lc blto2_FSBL_lto.o
HAL_Init 0x3418185D 48 4 Code Lc blto2_FSBL_lto.o
HAL_InitTick 0x3418DFB5 126 4 Code Lc blto2_FSBL_lto.o
HAL_MspInit 0x341813CD 8 4 Code Lc blto2_FSBL_lto.o
HAL_NVIC_SetPriority 0x34181951 168 4 Code Lc blto2_FSBL_lto.o
HAL_NVIC_SetPriorityGrouping 0x3418E2F5 62 4 Code Lc blto2_FSBL_lto.o
HAL_PWREx_ConfigSupply 0x3418E42D 114 4 Code Lc blto2_FSBL_lto.o
HAL_PWREx_ConfigVddIORange 0x3418E515 226 4 Code Lc blto2_FSBL_lto.o
HAL_PWREx_ControlVoltageScaling 0x3418E4A1 114 4 Code Lc blto2_FSBL_lto.o
HAL_PWREx_EnableVddIO3 0x3418E5F9 18 4 Code Lc blto2_FSBL_lto.o
HAL_RCCEx_GetPLL1CLKFreq 0x341918F5 130 4 Code Lc blto2_FSBL_lto.o
HAL_RCCEx_GetPLL2CLKFreq 0x34191979 130 4 Code Lc blto2_FSBL_lto.o
HAL_RCCEx_GetPLL3CLKFreq 0x341919FD 130 4 Code Lc blto2_FSBL_lto.o
HAL_RCCEx_GetPLL4CLKFreq 0x34191A81 130 4 Code Lc blto2_FSBL_lto.o
HAL_RCCEx_GetPeriphCLKFreq 0x34190411 1 626 4 Code Lc blto2_FSBL_lto.o
HAL_RCCEx_PeriphCLKConfig 0x341826DD 24 268 4 Code Lc blto2_FSBL_lto.o
HAL_RCC_ClockConfig 0x3418F635 2 498 4 Code Lc blto2_FSBL_lto.o
HAL_RCC_GetClockConfig 0x341825ED 240 4 Code Lc blto2_FSBL_lto.o
HAL_RCC_GetCpuClockFreq 0x341900F5 238 4 Code Lc blto2_FSBL_lto.o
HAL_RCC_GetSysClockFreq 0x341901FD 26 4 Code Lc blto2_FSBL_lto.o
HAL_RCC_OscConfig 0x3418E61D 2 810 4 Code Lc blto2_FSBL_lto.o
HAL_SYSTICK_Config 0x34181A6D 16 4 Code Lc blto2_FSBL_lto.o
HAL_SuspendTick 0x3418E08D 18 4 Code Lc blto2_FSBL_lto.o
HAL_XSPIM_Config 0x34192595 878 4 Code Lc blto2_FSBL_lto.o
HAL_XSPI_Abort 0x3419249D 246 4 Code Lc blto2_FSBL_lto.o
HAL_XSPI_AutoPolling 0x341921B9 406 4 Code Lc blto2_FSBL_lto.o
HAL_XSPI_Command 0x34191C81 1 106 4 Code Lc blto2_FSBL_lto.o
HAL_XSPI_Init 0x3418AF85 1 548 4 Code Lc blto2_FSBL_lto.o
HAL_XSPI_MemoryMapped 0x34192351 330 4 Code Lc blto2_FSBL_lto.o
HAL_XSPI_MspInit 0x34181719 324 4 Code Lc blto2_FSBL_lto.o
HAL_XSPI_Receive 0x3418B995 300 4 Code Lc blto2_FSBL_lto.o
HAL_XSPI_SetTimeout 0x34191C6D 18 4 Code Lc blto2_FSBL_lto.o
HAL_XSPI_Transmit 0x341920D5 226 4 Code Lc blto2_FSBL_lto.o
HASH_IRQHandler 0x3418E61B 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel0_IRQHandler 0x341902A3 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel10_IRQHandler 0x34190397 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel11_IRQHandler 0x341903AF 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel12_IRQHandler 0x341903C7 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel13_IRQHandler 0x341903DF 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel14_IRQHandler 0x341903F7 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel15_IRQHandler 0x3419040F 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel1_IRQHandler 0x341902B7 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel2_IRQHandler 0x341902D7 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel3_IRQHandler 0x341902EF 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel4_IRQHandler 0x34190307 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel5_IRQHandler 0x3419031F 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel6_IRQHandler 0x34190337 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel7_IRQHandler 0x3419034F 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel8_IRQHandler 0x34190367 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel9_IRQHandler 0x3419037F 2 Code Wk stm32n657xx_Vectors.o
HardFault_Handler 0x3418DCAD 2 4 Code Gb blto2_FSBL_lto.o
I2C1_ER_IRQHandler 0x34191B33 2 Code Wk stm32n657xx_Vectors.o
I2C1_EV_IRQHandler 0x34191B1B 2 Code Wk stm32n657xx_Vectors.o
I2C2_ER_IRQHandler 0x34191B63 2 Code Wk stm32n657xx_Vectors.o
I2C2_EV_IRQHandler 0x34191B4B 2 Code Wk stm32n657xx_Vectors.o
I2C3_ER_IRQHandler 0x34191B93 2 Code Wk stm32n657xx_Vectors.o
I2C3_EV_IRQHandler 0x34191B7B 2 Code Wk stm32n657xx_Vectors.o
I2C4_ER_IRQHandler 0x34191BC3 2 Code Wk stm32n657xx_Vectors.o
I2C4_EV_IRQHandler 0x34191BAB 2 Code Wk stm32n657xx_Vectors.o
I3C1_ER_IRQHandler 0x34191BF3 2 Code Wk stm32n657xx_Vectors.o
I3C1_EV_IRQHandler 0x34191BDB 2 Code Wk stm32n657xx_Vectors.o
I3C2_ER_IRQHandler 0x34191C23 2 Code Wk stm32n657xx_Vectors.o
I3C2_EV_IRQHandler 0x34191C0B 2 Code Wk stm32n657xx_Vectors.o
IAC_IRQHandler 0x3418DCB7 2 Code Wk stm32n657xx_Vectors.o
ICACHE_IRQHandler 0x3419028F 2 Code Wk stm32n657xx_Vectors.o
IWDG_IRQHandler 0x3418DCC3 2 Code Wk stm32n657xx_Vectors.o
JEDEC_Basic_Manage4S4S4SEnableSequence 0x3418CC31 132 4 Code Lc blto2_FSBL_lto.o
JEDEC_Basic_ManageQuadEnableRequirement 0x34192E75 338 4 Code Lc blto2_FSBL_lto.o
JPEG_IRQHandler 0x3419022F 2 Code Wk stm32n657xx_Vectors.o
JumpToApplication 0x3418BADD 356 4 Code Lc blto2_FSBL_lto.o
LL_AHB4_GRP1_EnableClock 0x3418D959 34 4 Code Lc blto2_FSBL_lto.o
LL_AHB4_GRP1_EnableClock.8 0x3418DF6D 34 4 Code Lc blto2_FSBL_lto.o
LL_AHB5_GRP1_EnableClock 0x3418DF91 34 4 Code Lc blto2_FSBL_lto.o
LL_AHB5_GRP1_IsEnabledClock 0x3418BAC1 28 4 Code Lc blto2_FSBL_lto.o
LL_APB4_GRP2_EnableClock 0x3418DC79 34 4 Code Lc blto2_FSBL_lto.o
LL_APB4_GRP2_EnableClock.7 0x3418DF49 34 4 Code Lc blto2_FSBL_lto.o
LL_RCC_CLKP_Enable 0x34190261 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_CLKP_IsEnabled 0x3418AF55 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetADCClockSource 0x341902D9 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetADCPrescaler 0x3418890D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetADFClockSource 0x341902F1 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetAHBPrescaler.90 0x3418ACC5 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetAPB1Prescaler.92 0x3418AD9D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetAPB2Prescaler.91 0x3418AD8D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetAPB4Prescaler.93 0x3418ADE9 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetAPB5Prescaler.95 0x3418AEA5 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetCLKPClockSource 0x34190309 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetClockSource 0x341889CD 48 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetCpuClkSource 0x34182325 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetDCMIPPClockSource 0x34190321 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetETH1PTPDivider 0x3418891D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetETHClockSource 0x34190339 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetETHPTPClockSource 0x34190351 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetFDCANClockSource 0x34190369 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetFMCClockSource 0x34190381 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetI2CClockSource 0x3418892D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetI3CClockSource 0x3418893D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetLPTIMClockSource 0x3418894D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetLPUARTClockSource 0x34190399 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetLTDCClockSource 0x341903B1 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetMDFClockSource 0x341903C9 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetPSSIClockSource 0x341903E1 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetRTCClockSource 0x341885A9 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetSAIClockSource 0x3418895D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetSDMMCClockSource 0x3418896D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetSPDIFRXClockSource 0x341903F9 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetSPIClockSource 0x3418897D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetSysClkSource 0x34182335 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetTIMPrescaler 0x3418898D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetUARTClockSource 0x3418AD05 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetUSARTClockSource 0x3418899D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetUSBClockSource 0x3418ACD5 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetXSPIClockSource 0x341889BD 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSE_IsReady 0x341824A5 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSE_IsReady.80 0x3418AB05 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSE_IsSelectedHSEDiv2AsDiv2Clock 0x341889AD 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSE_SelectHSEAsDiv2Clock 0x341902A5 18 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSE_SelectHSEDiv2AsDiv2Clock 0x34190291 18 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSI_Disable 0x3418F139 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSI_Enable 0x3418E60D 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSI_GetDivider 0x341824B5 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSI_GetDivider.78 0x3418AAD5 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSI_IsReady 0x34182315 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSI_IsReady.77 0x3418AAC5 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSI_SetCalibTrimming 0x3418F119 30 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSI_SetDivider 0x341822F9 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC10_Enable.61 0x34188601 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC10_GetDivider 0x34191BDD 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC10_GetSource 0x3418AEC5 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC10_IsEnabled 0x3418AEB5 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC11_GetSource 0x34182411 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC12_Enable 0x341886F1 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC12_GetDivider 0x34191C25 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC12_GetSource 0x3418AF25 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC12_IsEnabled 0x3418AF15 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC13_Enable 0x34188771 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC13_GetDivider 0x34191C0D 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC13_GetSource 0x3418AF05 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC13_IsEnabled 0x3418AEF5 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC14_Enable 0x341887DD 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC14_GetDivider 0x34191B4D 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC14_GetSource 0x3418AD7D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC14_IsEnabled 0x3418AD6D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC15_Enable.62 0x34188611 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC15_GetDivider 0x34191B1D 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC15_GetSource 0x3418ACF5 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC15_IsEnabled 0x3418ACE5 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC16_Enable 0x34188809 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC16_GetDivider 0x34191BC5 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC16_GetSource 0x3418AE95 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC16_IsEnabled 0x3418AE85 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC17_Enable 0x341886C5 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC17_GetDivider 0x34191C3D 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC17_GetSource 0x3418AF45 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC17_IsEnabled 0x3418AF35 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC18_Enable 0x341886B5 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC18_GetDivider 0x34191C55 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC18_GetSource 0x3418AF75 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC18_IsEnabled 0x3418AF65 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC19_Enable 0x34188621 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC19_GetDivider 0x34191BF5 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC19_GetSource 0x3418AEE5 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC19_IsEnabled 0x3418AED5 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC1_Enable 0x341900E5 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC1_GetDivider 0x341901E5 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC1_GetSource 0x341823E1 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC20_Enable.63 0x34188631 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC20_GetDivider 0x34191BAD 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC20_GetSource 0x3418AE59 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC20_IsEnabled 0x3418AE49 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC2_GetDivider 0x34190219 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC2_GetSource 0x341823F1 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC3_Enable 0x34190241 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC3_GetDivider 0x341918DD 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC3_GetSource 0x3418A8F1 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC3_IsEnabled 0x3418A8E1 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC4_Enable 0x34190251 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC4_GetDivider 0x34191B05 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC4_GetSource 0x3418A911 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC4_IsEnabled 0x3418A901 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC5_Enable.60 0x34190231 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC5_GetDivider 0x34191B95 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC5_GetSource 0x3418AE29 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC5_IsEnabled 0x3418AE19 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC6_GetSource 0x34182401 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC7_Enable 0x34190271 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC7_GetDivider 0x34191B7D 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC7_GetSource 0x3418AE09 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC7_IsEnabled 0x3418ADF9 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC8_Enable 0x34190281 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC8_GetDivider 0x34191B65 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC8_GetSource 0x3418ADD9 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC8_IsEnabled 0x3418ADC9 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC9_Enable 0x341887CD 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC9_GetDivider 0x34191B35 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC9_GetSource 0x3418AD5D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC9_IsEnabled 0x3418AD4D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_LSE_IsReady 0x341823C1 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_LSE_IsReady.59 0x341885B9 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_LSI_Disable 0x3418F199 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_LSI_Enable 0x3418F189 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_LSI_IsReady 0x341823B1 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_LSI_IsReady.94 0x3418AE39 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_MSI_Disable 0x3418F179 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_MSI_Enable 0x3418F169 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_MSI_GetFrequency 0x3418AAF5 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_MSI_IsReady 0x341823A1 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_MSI_IsReady.79 0x3418AAE5 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_MSI_SetCalibTrimming 0x3418F149 30 4 Code Lc blto2_FSBL_lto.o
LL_RCC_MSI_SetFrequency 0x34182385 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1P_IsEnabled 0x3418AC45 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_GetFRACN 0x3418AC85 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_GetM 0x3418AC65 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_GetN 0x3418AC75 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_GetP1 0x3418AC95 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_GetP2 0x3418ACA5 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_GetSource 0x34182345 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_GetSource.88 0x3418AC55 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_IsEnabledBypass 0x341824C5 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_IsEnabledBypass.89 0x3418ACB5 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_IsReady 0x341823D1 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_IsReady.87 0x3418AC35 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2P_IsEnabled 0x3418ABB5 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_GetFRACN 0x3418ABF5 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_GetM 0x3418ABD5 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_GetN 0x3418ABE5 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_GetP1 0x3418AC05 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_GetP2 0x3418AC15 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_GetSource 0x34182355 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_GetSource.85 0x3418ABC5 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_IsEnabledBypass 0x341824D5 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_IsEnabledBypass.86 0x3418AC25 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_IsReady 0x34182421 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_IsReady.84 0x3418ABA5 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3P_IsEnabled 0x3418AB25 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_GetFRACN 0x3418AB65 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_GetM 0x3418AB45 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_GetN 0x3418AB55 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_GetP1 0x3418AB75 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_GetP2 0x3418AB85 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_GetSource 0x34182365 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_GetSource.82 0x3418AB35 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_IsEnabledBypass 0x341824E5 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_IsEnabledBypass.83 0x3418AB95 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_IsReady 0x34182431 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_IsReady.81 0x3418AB15 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4P_IsEnabled 0x3418A931 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_GetFRACN 0x3418A9FD 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_GetM 0x3418A9DD 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_GetN 0x3418A9ED 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_GetP1 0x3418AA0D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_GetP2 0x3418AA1D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_GetSource 0x34182375 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_GetSource.75 0x3418A941 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_IsEnabledBypass 0x341824F5 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_IsEnabledBypass.76 0x3418AAB5 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_IsReady 0x34182441 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_IsReady.74 0x3418A921 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetADFClockSource 0x34188699 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetCLKPClockSource 0x34188641 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetClockSource 0x341888D9 52 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetDCMIPPClockSource 0x341886D5 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetETHClockSource 0x34188701 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetETHPHYInterface 0x3418871D 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetETHREFRXClockSource 0x34188739 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetETHREFTXClockSource 0x34188755 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetFDCANClockSource 0x34188781 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetFMCClockSource 0x3418866D 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetI2CClockSource 0x3418879D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetI3CClockSource 0x341887AD 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetLPTIMClockSource 0x341887BD 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetLPUARTClockSource 0x341887ED 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetLTDCClockSource 0x34188819 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetMDFClockSource 0x34188835 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetOTGPHYCKREFClockSource 0x341888C9 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetOTGPHYClockSource 0x341888B9 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetPSSIClockSource 0x34188851 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetRTCClockSource 0x341885E5 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetRTC_HSEPrescaler 0x341885C9 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetSAIClockSource 0x3418886D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetSDMMCClockSource 0x34188689 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetSPDIFRXClockSource 0x3418887D 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetSPIClockSource 0x34188899 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetTIMPrescaler 0x341902B9 30 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetUSARTClockSource 0x341888A9 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetXSPIClockSource 0x3418865D 16 4 Code Lc blto2_FSBL_lto.o
LOCKUP_IRQHandler 0x3418DAE7 2 Code Wk stm32n657xx_Vectors.o
LPTIM1_IRQHandler 0x341937E3 2 Code Wk stm32n657xx_Vectors.o
LPTIM2_IRQHandler 0x341938A3 2 Code Wk stm32n657xx_Vectors.o
LPTIM3_IRQHandler 0x341938BB 2 Code Wk stm32n657xx_Vectors.o
LPTIM4_IRQHandler 0x341938CF 2 Code Wk stm32n657xx_Vectors.o
LPTIM5_IRQHandler 0x3419392F 2 Code Wk stm32n657xx_Vectors.o
LPUART1_IRQHandler 0x34193B23 2 Code Wk stm32n657xx_Vectors.o
LTDC_LO_ERR_IRQHandler 0x341901FB 2 Code Wk stm32n657xx_Vectors.o
LTDC_LO_IRQHandler 0x341901E3 2 Code Wk stm32n657xx_Vectors.o
LTDC_UP_ERR_IRQHandler 0x34193B53 2 Code Wk stm32n657xx_Vectors.o
LTDC_UP_IRQHandler 0x34193B51 2 Code Wk stm32n657xx_Vectors.o
MCE1_IRQHandler 0x3418F137 2 Code Wk stm32n657xx_Vectors.o
MCE2_IRQHandler 0x3418F147 2 Code Wk stm32n657xx_Vectors.o
MCE3_IRQHandler 0x3418F167 2 Code Wk stm32n657xx_Vectors.o
MCE4_IRQHandler 0x3418F177 2 Code Wk stm32n657xx_Vectors.o
MDF1_FLT0_IRQHandler 0x341939BF 2 Code Wk stm32n657xx_Vectors.o
MDF1_FLT1_IRQHandler 0x34193AEF 2 Code Wk stm32n657xx_Vectors.o
MDF1_FLT2_IRQHandler 0x34193AF1 2 Code Wk stm32n657xx_Vectors.o
MDF1_FLT3_IRQHandler 0x34193AF3 2 Code Wk stm32n657xx_Vectors.o
MDF1_FLT4_IRQHandler 0x34193AF5 2 Code Wk stm32n657xx_Vectors.o
MDF1_FLT5_IRQHandler 0x34193AF7 2 Code Wk stm32n657xx_Vectors.o
MDIOS_IRQHandler 0x34193B47 2 Code Wk stm32n657xx_Vectors.o
MX_BSEC_Init 0x3418D875 2 4 Code Lc blto2_FSBL_lto.o
MX_EXTMEM_MANAGER_Init 0x3418D891 62 4 Code Lc blto2_FSBL_lto.o
MX_GPIO_Init 0x3418D8D1 134 4 Code Lc blto2_FSBL_lto.o
MX_XSPI2_Init 0x3418DEC9 126 4 Code Lc blto2_FSBL_lto.o
MapMemory 0x341929FD 94 4 Code Lc blto2_FSBL_lto.o
MemManage_Handler 0x3418DCB1 2 4 Code Gb blto2_FSBL_lto.o
NMI_Handler 0x3418DCA9 2 4 Code Gb blto2_FSBL_lto.o
NPU0_IRQHandler 0x3418F5D3 2 Code Wk stm32n657xx_Vectors.o
NPU1_IRQHandler 0x3418F633 2 Code Wk stm32n657xx_Vectors.o
NPU2_IRQHandler 0x3418FFF7 2 Code Wk stm32n657xx_Vectors.o
NPU3_IRQHandler 0x341900E3 2 Code Wk stm32n657xx_Vectors.o
NVIC_EncodePriority 0x34181A09 100 4 Code Lc blto2_FSBL_lto.o
OTP_Config 0x3418DBE9 142 4 Code Lc blto2_FSBL_lto.o
PAHB_ERR_IRQHandler 0x3418F283 2 Code Wk stm32n657xx_Vectors.o
PKA_IRQHandler 0x3418E60B 2 Code Wk stm32n657xx_Vectors.o
PVD_PVM_IRQHandler 0x3418D8CF 2 Code Wk stm32n657xx_Vectors.o
PendSV_Handler 0x3418DCC5 2 4 Code Gb blto2_FSBL_lto.o
RCCEx_CalcPLLFreq 0x3418AA2D 136 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetADCCLKFreq 0x34190A6D 438 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetADFCLKFreq 0x341889FD 388 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetCLKPCLKFreq 0x34188B81 736 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetCSICLKFreq 0x34190C25 134 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetDCMIPPCLKFreq 0x34188E61 228 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetETH1CLKFreq 0x34188F45 216 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetETH1PTPCLKFreq 0x34190CAD 222 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetFDCANCLKFreq 0x34190D8D 206 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetFMCCLKFreq 0x34190E5D 314 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetHCLKFreq 0x3418A8C5 28 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetI2CCLKFreq 0x34190F99 706 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetI3CCLKFreq 0x3418901D 516 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetLPTIMCLKFreq 0x3419125D 706 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetLPUARTCLKFreq 0x34189221 412 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetLTDCCLKFreq 0x341893BD 228 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetMDFCLKFreq 0x341894A1 436 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetOTGPHYCKREFCLKFreq 0x3418A66D 148 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetOTGPHYCLKFreq 0x3418A529 324 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetPCLK1Freq 0x3418AD15 28 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetPCLK2Freq 0x3418AD31 28 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetPCLK4Freq 0x3418ADAD 28 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetPCLK5Freq 0x3418AE69 28 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetPLLSourceFreq 0x3418A951 140 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetPSSICLKFreq 0x34191521 218 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetRTCCLKFreq 0x341915FD 126 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetSAICLKFreq 0x3419167D 606 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetSDMMCCLKFreq 0x34189655 396 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetSPDIFRXCLKFreq 0x341897E1 372 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetSPICLKFreq 0x34189955 1 196 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetUARTCLKFreq 0x3418A195 916 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetUSARTCLKFreq 0x34189E01 916 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetXSPICLKFreq 0x3418A701 452 4 Code Lc blto2_FSBL_lto.o
RCC_GetSysClockFreq 0x34182505 232 4 Code Lc blto2_FSBL_lto.o
RCC_IC_CheckPLLSources 0x3418FFF9 234 4 Code Lc blto2_FSBL_lto.o
RCC_IRQHandler 0x3418D97B 2 Code Wk stm32n657xx_Vectors.o
RCC_PLL_Config 0x3418F285 846 4 Code Lc blto2_FSBL_lto.o
RCC_PLL_Enable 0x3418F5D5 94 4 Code Lc blto2_FSBL_lto.o
RCC_PLL_IsNewConfig 0x3418F1A9 218 4 Code Lc blto2_FSBL_lto.o
RCC_PLL_Source_IsReady 0x34182451 84 4 Code Lc blto2_FSBL_lto.o
RCC_S_IRQHandler 0x3418DCBB 2 Code Wk stm32n657xx_Vectors.o
RIFSC_TAMPER_IRQHandler 0x3418DCB3 2 Code Wk stm32n657xx_Vectors.o
RNG_IRQHandler 0x3418F117 2 Code Wk stm32n657xx_Vectors.o
RTC_IRQHandler 0x3418DCBF 2 Code Wk stm32n657xx_Vectors.o
RTC_S_IRQHandler 0x3418DCAB 2 Code Wk stm32n657xx_Vectors.o
Reset_Handler 0x3418D4F9 4 Code Gb STM32N6xx_Startup.o
SAES_IRQHandler 0x3418E513 2 Code Wk stm32n657xx_Vectors.o
SAI1_A_IRQHandler 0x34193AF9 2 Code Wk stm32n657xx_Vectors.o
SAI1_B_IRQHandler 0x34193AFB 2 Code Wk stm32n657xx_Vectors.o
SAI2_A_IRQHandler 0x34193AFD 2 Code Wk stm32n657xx_Vectors.o
SAI2_B_IRQHandler 0x34193AFF 2 Code Wk stm32n657xx_Vectors.o
SAL_XSPI_Abort 0x341938BD 18 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_CheckStatusRegister 0x3418D161 232 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_CommandSendData 0x3418D051 136 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_CommandSendReadAddress 0x341937E5 190 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_DisableMapMode 0x341938A5 22 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_EnableMapMode 0x3418D249 200 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_GetId 0x3418CF99 152 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_GetSFDP 0x34193679 222 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_Init 0x34193385 86 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_MemoryConfig 0x341933DD 666 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_SendReadCommand 0x3418D0D9 136 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_SetClock 0x3418CECD 116 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_UpdateMemoryType 0x3418D311 116 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_Write 0x34193759 138 4 Code Lc blto2_FSBL_lto.o
SDMMC1_IRQHandler 0x34193B2D 2 Code Wk stm32n657xx_Vectors.o
SDMMC2_IRQHandler 0x34193B2F 2 Code Wk stm32n657xx_Vectors.o
SEGGER_RTT_Write 0x34193FE5 40 2 Code Gb SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
SEGGER_RTT_WriteNoLock 0x34193F8D 88 2 Code Gb SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
SFDP_BuildGenericDriver 0x3418C01D 3 092 4 Code Lc blto2_FSBL_lto.o
SFDP_CollectData 0x34192ADD 458 4 Code Lc blto2_FSBL_lto.o
SFDP_GetHeader 0x3418BC91 256 4 Code Lc blto2_FSBL_lto.o
SFDP_MemoryReset 0x34192CA9 458 4 Code Lc blto2_FSBL_lto.o
SFDP_ReadHeader 0x34192A5D 126 4 Code Lc blto2_FSBL_lto.o
SPDIFRX_IRQHandler 0x34193B01 2 Code Wk stm32n657xx_Vectors.o
SPI1_IRQHandler 0x34193B03 2 Code Wk stm32n657xx_Vectors.o
SPI2_IRQHandler 0x34193B05 2 Code Wk stm32n657xx_Vectors.o
SPI3_IRQHandler 0x34193B07 2 Code Wk stm32n657xx_Vectors.o
SPI4_IRQHandler 0x34193B09 2 Code Wk stm32n657xx_Vectors.o
SPI5_IRQHandler 0x34193B0B 2 Code Wk stm32n657xx_Vectors.o
SPI6_IRQHandler 0x34193B0D 2 Code Wk stm32n657xx_Vectors.o
SVC_Handler 0x3418DCBD 2 4 Code Gb blto2_FSBL_lto.o
SysTick_Config 0x3418E375 78 4 Code Lc blto2_FSBL_lto.o
SysTick_Handler 0x341813D5 8 4 Code Gb blto2_FSBL_lto.o
SystemClock_Config 0x3418DAE9 254 4 Code Lc blto2_FSBL_lto.o
SystemCoreClockUpdate 0x341813DD 828 4 Code Gb blto2_FSBL_lto.o
SystemInit 0x3418DCC9 510 4 Code Gb blto2_FSBL_lto.o
TAMP_IRQHandler 0x3418DCAF 2 Code Wk stm32n657xx_Vectors.o
TCM_ECC_IRQHandler 0x3418DC77 2 Code Wk stm32n657xx_Vectors.o
TIM10_IRQHandler 0x34192E73 2 Code Wk stm32n657xx_Vectors.o
TIM11_IRQHandler 0x34192FC7 2 Code Wk stm32n657xx_Vectors.o
TIM12_IRQHandler 0x341931AB 2 Code Wk stm32n657xx_Vectors.o
TIM13_IRQHandler 0x34193213 2 Code Wk stm32n657xx_Vectors.o
TIM14_IRQHandler 0x34193347 2 Code Wk stm32n657xx_Vectors.o
TIM15_IRQHandler 0x34193383 2 Code Wk stm32n657xx_Vectors.o
TIM16_IRQHandler 0x341933DB 2 Code Wk stm32n657xx_Vectors.o
TIM17_IRQHandler 0x34193677 2 Code Wk stm32n657xx_Vectors.o
TIM18_IRQHandler 0x34193757 2 Code Wk stm32n657xx_Vectors.o
TIM1_BRK_IRQHandler 0x34191C3B 2 Code Wk stm32n657xx_Vectors.o
TIM1_CC_IRQHandler 0x34191C7F 2 Code Wk stm32n657xx_Vectors.o
TIM1_TRG_CCU_IRQHandler 0x34191C6B 2 Code Wk stm32n657xx_Vectors.o
TIM1_UP_IRQHandler 0x34191C53 2 Code Wk stm32n657xx_Vectors.o
TIM2_IRQHandler 0x341920D3 2 Code Wk stm32n657xx_Vectors.o
TIM3_IRQHandler 0x341921B7 2 Code Wk stm32n657xx_Vectors.o
TIM4_IRQHandler 0x3419234F 2 Code Wk stm32n657xx_Vectors.o
TIM5_IRQHandler 0x3419249B 2 Code Wk stm32n657xx_Vectors.o
TIM6_IRQHandler 0x34192593 2 Code Wk stm32n657xx_Vectors.o
TIM7_IRQHandler 0x34192903 2 Code Wk stm32n657xx_Vectors.o
TIM8_BRK_IRQHandler 0x341929D7 2 Code Wk stm32n657xx_Vectors.o
TIM8_CC_IRQHandler 0x34192ADB 2 Code Wk stm32n657xx_Vectors.o
TIM8_TRG_CCU_IRQHandler 0x34192A5B 2 Code Wk stm32n657xx_Vectors.o
TIM8_UP_IRQHandler 0x341929FB 2 Code Wk stm32n657xx_Vectors.o
TIM9_IRQHandler 0x34192CA7 2 Code Wk stm32n657xx_Vectors.o
UART4_IRQHandler 0x34193B15 2 Code Wk stm32n657xx_Vectors.o
UART5_IRQHandler 0x34193B17 2 Code Wk stm32n657xx_Vectors.o
UART7_IRQHandler 0x34193B1B 2 Code Wk stm32n657xx_Vectors.o
UART8_IRQHandler 0x34193B1D 2 Code Wk stm32n657xx_Vectors.o
UART9_IRQHandler 0x34193B1F 2 Code Wk stm32n657xx_Vectors.o
UCPD1_IRQHandler 0x34193B31 2 Code Wk stm32n657xx_Vectors.o
USART10_IRQHandler 0x34193B21 2 Code Wk stm32n657xx_Vectors.o
USART1_IRQHandler 0x34193B0F 2 Code Wk stm32n657xx_Vectors.o
USART2_IRQHandler 0x34193B11 2 Code Wk stm32n657xx_Vectors.o
USART3_IRQHandler 0x34193B13 2 Code Wk stm32n657xx_Vectors.o
USART6_IRQHandler 0x34193B19 2 Code Wk stm32n657xx_Vectors.o
USB1_OTG_HS_IRQHandler 0x34193B33 2 Code Wk stm32n657xx_Vectors.o
USB2_OTG_HS_IRQHandler 0x34193B35 2 Code Wk stm32n657xx_Vectors.o
UsageFault_Handler 0x3418DCB9 2 4 Code Gb blto2_FSBL_lto.o
VENC_IRQHandler 0x3419023F 2 Code Wk stm32n657xx_Vectors.o
WAKEUP_PIN_IRQHandler 0x34193B4B 2 Code Wk stm32n657xx_Vectors.o
WWDG_IRQHandler 0x3418DCC7 2 Code Wk stm32n657xx_Vectors.o
XSPI1_IRQHandler 0x34193B25 2 Code Wk stm32n657xx_Vectors.o
XSPI2_IRQHandler 0x34193B27 2 Code Wk stm32n657xx_Vectors.o
XSPI3_IRQHandler 0x34193B29 2 Code Wk stm32n657xx_Vectors.o
XSPIM_GetConfig 0x34192905 210 4 Code Lc blto2_FSBL_lto.o
XSPI_ConfigCmd 0x3418B5F9 924 4 Code Lc blto2_FSBL_lto.o
XSPI_FormatCommand 0x3418CF41 88 4 Code Lc blto2_FSBL_lto.o
XSPI_Transmit 0x3418D031 32 4 Code Lc blto2_FSBL_lto.o
XSPI_WaitFlagStateUntilTimeout 0x3418B591 104 4 Code Lc blto2_FSBL_lto.o
_DoInit 0x34193C3D 98 2 Code Lc SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
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__NVIC_GetPriorityGrouping 0x341819F9 16 4 Code Lc blto2_FSBL_lto.o
__NVIC_SetPriority 0x3418E335 62 4 Code Lc blto2_FSBL_lto.o
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__SEGGER_RTL_float32_isnan 0x34193B83 14 2 Code Wk floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
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__SEGGER_RTL_putc 0x34193D95 132 2 Code Gb prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_stream_write 0x34193C2D 10 2 Code Lc prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_vfprintf 0x341807F1 3 036 8 Code Gb __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_vfprintf_short_float_long_long 0x341807F1 3 036 8 Code Gb __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_init_copy 0x341946AF 20 2 Code Wk SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_init_ctors 0x34194629 26 4 Code Wk SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_init_done 0x3418D4EF 4 Code Gb SEGGER_THUMB_Startup.o
__SEGGER_init_zero 0x3419469D 18 2 Code Wk SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__aeabi_f2ulz 0x34193981 62 4 Code Wk floatasmops_arm.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__aeabi_memclr 0x3418D789 104 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__aeabi_memclr4 0x3418D789 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__aeabi_memclr8 0x3418D789 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__aeabi_memcpy 0x3418D72D 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__aeabi_memcpy4 0x3418D74B 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__aeabi_memcpy8 0x3418D74B 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__aeabi_memset 0x3418D78B 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__aeabi_memset4 0x3418D78B 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__aeabi_memset8 0x3418D78B 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__aeabi_ul2f 0x3418D6D9 84 4 Code Wk floatasmops_arm.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__aeabi_uldivmod 0x341939C1 302 4 Code Wk intasmops_arm.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__startup_complete 0x3418D4EF 4 Code Gb SEGGER_THUMB_Startup.o
_start 0x3418D4E5 14 4 Code Gb SEGGER_THUMB_Startup.o
abs 0x34193D8D 8 2 Code Wk intops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
assert_failed 0x3418DC9D 10 4 Code Lc blto2_FSBL_lto.o
driver_check_FlagBUSY 0x341931AD 102 4 Code Lc blto2_FSBL_lto.o
exit 0x3418D4F3 2 4 Code Gb SEGGER_THUMB_Startup.o
floorf 0x3418D659 104 4 Code Wk floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
fmodf 0x3418D53D 284 4 Code Wk floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
frexpf 0x34193D69 36 2 Code Wk floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
fwrite 0x34193B55 46 2 Code Wk fileops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
ldexpf 0x34193BA3 54 2 Code Wk floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
main 0x3418D97D 362 4 Code Gb blto2_FSBL_lto.o
memcpy 0x3418D72D 92 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
memset 0x3418D791 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
printf 0x34193ED1 44 2 Code Wk prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
reset_handler 0x3418D4F9 4 Code Gb STM32N6xx_Startup.o
sfdp_enter_octal_mode 0x34192FC9 482 4 Code Lc blto2_FSBL_lto.o
sfdp_get_paraminfo 0x3418BD91 652 4 Code Lc blto2_FSBL_lto.o
sfdp_getfrequencevalue 0x3418CCB5 64 4 Code Lc blto2_FSBL_lto.o
sfdp_set_dummycycle 0x3418CCF5 420 4 Code Lc blto2_FSBL_lto.o
strlen 0x34193CEF 42 2 Code Wk strops.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
strnlen 0x3419400D 92 2 Code Wk strops.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
vfprintf 0x34193E4D 28 2 Code Wk prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
vfprintf_l 0x34193E69 104 2 Code Wk prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)

Function symbols by address

Address Symbol name Size Align Type Bd Object File
0x3418074D Error_Handler 4 4 Code Lc blto2_FSBL_lto.o
0x341807F1 __SEGGER_RTL_vfprintf_short_float_long_long 3 036 8 Code Gb __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x341807F1 __SEGGER_RTL_vfprintf 3 036 8 Code Gb __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x341813CD HAL_MspInit 8 4 Code Lc blto2_FSBL_lto.o
0x341813D5 SysTick_Handler 8 4 Code Gb blto2_FSBL_lto.o
0x341813DD SystemCoreClockUpdate 828 4 Code Gb blto2_FSBL_lto.o
0x34181719 HAL_XSPI_MspInit 324 4 Code Lc blto2_FSBL_lto.o
0x3418185D HAL_Init 48 4 Code Lc blto2_FSBL_lto.o
0x3418188D HAL_GetTick 12 4 Code Lc blto2_FSBL_lto.o
0x34181899 HAL_BSEC_OTP_Read 124 4 Code Lc blto2_FSBL_lto.o
0x34181915 __NVIC_SetPriorityGrouping 60 4 Code Lc blto2_FSBL_lto.o
0x34181951 HAL_NVIC_SetPriority 168 4 Code Lc blto2_FSBL_lto.o
0x341819F9 __NVIC_GetPriorityGrouping 16 4 Code Lc blto2_FSBL_lto.o
0x34181A09 NVIC_EncodePriority 100 4 Code Lc blto2_FSBL_lto.o
0x34181A6D HAL_SYSTICK_Config 16 4 Code Lc blto2_FSBL_lto.o
0x34181A7D HAL_DMA_Abort 244 4 Code Lc blto2_FSBL_lto.o
0x34181B71 HAL_GPIO_Init 1 928 4 Code Lc blto2_FSBL_lto.o
0x341822F9 LL_RCC_HSI_SetDivider 28 4 Code Lc blto2_FSBL_lto.o
0x34182315 LL_RCC_HSI_IsReady 16 4 Code Lc blto2_FSBL_lto.o
0x34182325 LL_RCC_GetCpuClkSource 16 4 Code Lc blto2_FSBL_lto.o
0x34182335 LL_RCC_GetSysClkSource 16 4 Code Lc blto2_FSBL_lto.o
0x34182345 LL_RCC_PLL1_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x34182355 LL_RCC_PLL2_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x34182365 LL_RCC_PLL3_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x34182375 LL_RCC_PLL4_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x34182385 LL_RCC_MSI_SetFrequency 28 4 Code Lc blto2_FSBL_lto.o
0x341823A1 LL_RCC_MSI_IsReady 16 4 Code Lc blto2_FSBL_lto.o
0x341823B1 LL_RCC_LSI_IsReady 16 4 Code Lc blto2_FSBL_lto.o
0x341823C1 LL_RCC_LSE_IsReady 16 4 Code Lc blto2_FSBL_lto.o
0x341823D1 LL_RCC_PLL1_IsReady 16 4 Code Lc blto2_FSBL_lto.o
0x341823E1 LL_RCC_IC1_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x341823F1 LL_RCC_IC2_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x34182401 LL_RCC_IC6_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x34182411 LL_RCC_IC11_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x34182421 LL_RCC_PLL2_IsReady 16 4 Code Lc blto2_FSBL_lto.o
0x34182431 LL_RCC_PLL3_IsReady 16 4 Code Lc blto2_FSBL_lto.o
0x34182441 LL_RCC_PLL4_IsReady 16 4 Code Lc blto2_FSBL_lto.o
0x34182451 RCC_PLL_Source_IsReady 84 4 Code Lc blto2_FSBL_lto.o
0x341824A5 LL_RCC_HSE_IsReady 16 4 Code Lc blto2_FSBL_lto.o
0x341824B5 LL_RCC_HSI_GetDivider 16 4 Code Lc blto2_FSBL_lto.o
0x341824C5 LL_RCC_PLL1_IsEnabledBypass 16 4 Code Lc blto2_FSBL_lto.o
0x341824D5 LL_RCC_PLL2_IsEnabledBypass 16 4 Code Lc blto2_FSBL_lto.o
0x341824E5 LL_RCC_PLL3_IsEnabledBypass 16 4 Code Lc blto2_FSBL_lto.o
0x341824F5 LL_RCC_PLL4_IsEnabledBypass 16 4 Code Lc blto2_FSBL_lto.o
0x34182505 RCC_GetSysClockFreq 232 4 Code Lc blto2_FSBL_lto.o
0x341825ED HAL_RCC_GetClockConfig 240 4 Code Lc blto2_FSBL_lto.o
0x341826DD HAL_RCCEx_PeriphCLKConfig 24 268 4 Code Lc blto2_FSBL_lto.o
0x341885A9 LL_RCC_GetRTCClockSource 16 4 Code Lc blto2_FSBL_lto.o
0x341885B9 LL_RCC_LSE_IsReady.59 16 4 Code Lc blto2_FSBL_lto.o
0x341885C9 LL_RCC_SetRTC_HSEPrescaler 28 4 Code Lc blto2_FSBL_lto.o
0x341885E5 LL_RCC_SetRTCClockSource 28 4 Code Lc blto2_FSBL_lto.o
0x34188601 LL_RCC_IC10_Enable.61 16 4 Code Lc blto2_FSBL_lto.o
0x34188611 LL_RCC_IC15_Enable.62 16 4 Code Lc blto2_FSBL_lto.o
0x34188621 LL_RCC_IC19_Enable 16 4 Code Lc blto2_FSBL_lto.o
0x34188631 LL_RCC_IC20_Enable.63 16 4 Code Lc blto2_FSBL_lto.o
0x34188641 LL_RCC_SetCLKPClockSource 28 4 Code Lc blto2_FSBL_lto.o
0x3418865D LL_RCC_SetXSPIClockSource 16 4 Code Lc blto2_FSBL_lto.o
0x3418866D LL_RCC_SetFMCClockSource 28 4 Code Lc blto2_FSBL_lto.o
0x34188689 LL_RCC_SetSDMMCClockSource 16 4 Code Lc blto2_FSBL_lto.o
0x34188699 LL_RCC_SetADFClockSource 28 4 Code Lc blto2_FSBL_lto.o
0x341886B5 LL_RCC_IC18_Enable 16 4 Code Lc blto2_FSBL_lto.o
0x341886C5 LL_RCC_IC17_Enable 16 4 Code Lc blto2_FSBL_lto.o
0x341886D5 LL_RCC_SetDCMIPPClockSource 28 4 Code Lc blto2_FSBL_lto.o
0x341886F1 LL_RCC_IC12_Enable 16 4 Code Lc blto2_FSBL_lto.o
0x34188701 LL_RCC_SetETHClockSource 28 4 Code Lc blto2_FSBL_lto.o
0x3418871D LL_RCC_SetETHPHYInterface 28 4 Code Lc blto2_FSBL_lto.o
0x34188739 LL_RCC_SetETHREFRXClockSource 28 4 Code Lc blto2_FSBL_lto.o
0x34188755 LL_RCC_SetETHREFTXClockSource 28 4 Code Lc blto2_FSBL_lto.o
0x34188771 LL_RCC_IC13_Enable 16 4 Code Lc blto2_FSBL_lto.o
0x34188781 LL_RCC_SetFDCANClockSource 28 4 Code Lc blto2_FSBL_lto.o
0x3418879D LL_RCC_SetI2CClockSource 16 4 Code Lc blto2_FSBL_lto.o
0x341887AD LL_RCC_SetI3CClockSource 16 4 Code Lc blto2_FSBL_lto.o
0x341887BD LL_RCC_SetLPTIMClockSource 16 4 Code Lc blto2_FSBL_lto.o
0x341887CD LL_RCC_IC9_Enable 16 4 Code Lc blto2_FSBL_lto.o
0x341887DD LL_RCC_IC14_Enable 16 4 Code Lc blto2_FSBL_lto.o
0x341887ED LL_RCC_SetLPUARTClockSource 28 4 Code Lc blto2_FSBL_lto.o
0x34188809 LL_RCC_IC16_Enable 16 4 Code Lc blto2_FSBL_lto.o
0x34188819 LL_RCC_SetLTDCClockSource 28 4 Code Lc blto2_FSBL_lto.o
0x34188835 LL_RCC_SetMDFClockSource 28 4 Code Lc blto2_FSBL_lto.o
0x34188851 LL_RCC_SetPSSIClockSource 28 4 Code Lc blto2_FSBL_lto.o
0x3418886D LL_RCC_SetSAIClockSource 16 4 Code Lc blto2_FSBL_lto.o
0x3418887D LL_RCC_SetSPDIFRXClockSource 28 4 Code Lc blto2_FSBL_lto.o
0x34188899 LL_RCC_SetSPIClockSource 16 4 Code Lc blto2_FSBL_lto.o
0x341888A9 LL_RCC_SetUSARTClockSource 16 4 Code Lc blto2_FSBL_lto.o
0x341888B9 LL_RCC_SetOTGPHYClockSource 16 4 Code Lc blto2_FSBL_lto.o
0x341888C9 LL_RCC_SetOTGPHYCKREFClockSource 16 4 Code Lc blto2_FSBL_lto.o
0x341888D9 LL_RCC_SetClockSource 52 4 Code Lc blto2_FSBL_lto.o
0x3418890D LL_RCC_GetADCPrescaler 16 4 Code Lc blto2_FSBL_lto.o
0x3418891D LL_RCC_GetETH1PTPDivider 16 4 Code Lc blto2_FSBL_lto.o
0x3418892D LL_RCC_GetI2CClockSource 16 4 Code Lc blto2_FSBL_lto.o
0x3418893D LL_RCC_GetI3CClockSource 16 4 Code Lc blto2_FSBL_lto.o
0x3418894D LL_RCC_GetLPTIMClockSource 16 4 Code Lc blto2_FSBL_lto.o
0x3418895D LL_RCC_GetSAIClockSource 16 4 Code Lc blto2_FSBL_lto.o
0x3418896D LL_RCC_GetSDMMCClockSource 16 4 Code Lc blto2_FSBL_lto.o
0x3418897D LL_RCC_GetSPIClockSource 16 4 Code Lc blto2_FSBL_lto.o
0x3418898D LL_RCC_GetTIMPrescaler 16 4 Code Lc blto2_FSBL_lto.o
0x3418899D LL_RCC_GetUSARTClockSource 16 4 Code Lc blto2_FSBL_lto.o
0x341889AD LL_RCC_HSE_IsSelectedHSEDiv2AsDiv2Clock 16 4 Code Lc blto2_FSBL_lto.o
0x341889BD LL_RCC_GetXSPIClockSource 16 4 Code Lc blto2_FSBL_lto.o
0x341889CD LL_RCC_GetClockSource 48 4 Code Lc blto2_FSBL_lto.o
0x341889FD RCCEx_GetADFCLKFreq 388 4 Code Lc blto2_FSBL_lto.o
0x34188B81 RCCEx_GetCLKPCLKFreq 736 4 Code Lc blto2_FSBL_lto.o
0x34188E61 RCCEx_GetDCMIPPCLKFreq 228 4 Code Lc blto2_FSBL_lto.o
0x34188F45 RCCEx_GetETH1CLKFreq 216 4 Code Lc blto2_FSBL_lto.o
0x3418901D RCCEx_GetI3CCLKFreq 516 4 Code Lc blto2_FSBL_lto.o
0x34189221 RCCEx_GetLPUARTCLKFreq 412 4 Code Lc blto2_FSBL_lto.o
0x341893BD RCCEx_GetLTDCCLKFreq 228 4 Code Lc blto2_FSBL_lto.o
0x341894A1 RCCEx_GetMDFCLKFreq 436 4 Code Lc blto2_FSBL_lto.o
0x34189655 RCCEx_GetSDMMCCLKFreq 396 4 Code Lc blto2_FSBL_lto.o
0x341897E1 RCCEx_GetSPDIFRXCLKFreq 372 4 Code Lc blto2_FSBL_lto.o
0x34189955 RCCEx_GetSPICLKFreq 1 196 4 Code Lc blto2_FSBL_lto.o
0x34189E01 RCCEx_GetUSARTCLKFreq 916 4 Code Lc blto2_FSBL_lto.o
0x3418A195 RCCEx_GetUARTCLKFreq 916 4 Code Lc blto2_FSBL_lto.o
0x3418A529 RCCEx_GetOTGPHYCLKFreq 324 4 Code Lc blto2_FSBL_lto.o
0x3418A66D RCCEx_GetOTGPHYCKREFCLKFreq 148 4 Code Lc blto2_FSBL_lto.o
0x3418A701 RCCEx_GetXSPICLKFreq 452 4 Code Lc blto2_FSBL_lto.o
0x3418A8C5 RCCEx_GetHCLKFreq 28 4 Code Lc blto2_FSBL_lto.o
0x3418A8E1 LL_RCC_IC3_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
0x3418A8F1 LL_RCC_IC3_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x3418A901 LL_RCC_IC4_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
0x3418A911 LL_RCC_IC4_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x3418A921 LL_RCC_PLL4_IsReady.74 16 4 Code Lc blto2_FSBL_lto.o
0x3418A931 LL_RCC_PLL4P_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
0x3418A941 LL_RCC_PLL4_GetSource.75 16 4 Code Lc blto2_FSBL_lto.o
0x3418A951 RCCEx_GetPLLSourceFreq 140 4 Code Lc blto2_FSBL_lto.o
0x3418A9DD LL_RCC_PLL4_GetM 16 4 Code Lc blto2_FSBL_lto.o
0x3418A9ED LL_RCC_PLL4_GetN 16 4 Code Lc blto2_FSBL_lto.o
0x3418A9FD LL_RCC_PLL4_GetFRACN 16 4 Code Lc blto2_FSBL_lto.o
0x3418AA0D LL_RCC_PLL4_GetP1 16 4 Code Lc blto2_FSBL_lto.o
0x3418AA1D LL_RCC_PLL4_GetP2 16 4 Code Lc blto2_FSBL_lto.o
0x3418AA2D RCCEx_CalcPLLFreq 136 4 Code Lc blto2_FSBL_lto.o
0x3418AAB5 LL_RCC_PLL4_IsEnabledBypass.76 16 4 Code Lc blto2_FSBL_lto.o
0x3418AAC5 LL_RCC_HSI_IsReady.77 16 4 Code Lc blto2_FSBL_lto.o
0x3418AAD5 LL_RCC_HSI_GetDivider.78 16 4 Code Lc blto2_FSBL_lto.o
0x3418AAE5 LL_RCC_MSI_IsReady.79 16 4 Code Lc blto2_FSBL_lto.o
0x3418AAF5 LL_RCC_MSI_GetFrequency 16 4 Code Lc blto2_FSBL_lto.o
0x3418AB05 LL_RCC_HSE_IsReady.80 16 4 Code Lc blto2_FSBL_lto.o
0x3418AB15 LL_RCC_PLL3_IsReady.81 16 4 Code Lc blto2_FSBL_lto.o
0x3418AB25 LL_RCC_PLL3P_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
0x3418AB35 LL_RCC_PLL3_GetSource.82 16 4 Code Lc blto2_FSBL_lto.o
0x3418AB45 LL_RCC_PLL3_GetM 16 4 Code Lc blto2_FSBL_lto.o
0x3418AB55 LL_RCC_PLL3_GetN 16 4 Code Lc blto2_FSBL_lto.o
0x3418AB65 LL_RCC_PLL3_GetFRACN 16 4 Code Lc blto2_FSBL_lto.o
0x3418AB75 LL_RCC_PLL3_GetP1 16 4 Code Lc blto2_FSBL_lto.o
0x3418AB85 LL_RCC_PLL3_GetP2 16 4 Code Lc blto2_FSBL_lto.o
0x3418AB95 LL_RCC_PLL3_IsEnabledBypass.83 16 4 Code Lc blto2_FSBL_lto.o
0x3418ABA5 LL_RCC_PLL2_IsReady.84 16 4 Code Lc blto2_FSBL_lto.o
0x3418ABB5 LL_RCC_PLL2P_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
0x3418ABC5 LL_RCC_PLL2_GetSource.85 16 4 Code Lc blto2_FSBL_lto.o
0x3418ABD5 LL_RCC_PLL2_GetM 16 4 Code Lc blto2_FSBL_lto.o
0x3418ABE5 LL_RCC_PLL2_GetN 16 4 Code Lc blto2_FSBL_lto.o
0x3418ABF5 LL_RCC_PLL2_GetFRACN 16 4 Code Lc blto2_FSBL_lto.o
0x3418AC05 LL_RCC_PLL2_GetP1 16 4 Code Lc blto2_FSBL_lto.o
0x3418AC15 LL_RCC_PLL2_GetP2 16 4 Code Lc blto2_FSBL_lto.o
0x3418AC25 LL_RCC_PLL2_IsEnabledBypass.86 16 4 Code Lc blto2_FSBL_lto.o
0x3418AC35 LL_RCC_PLL1_IsReady.87 16 4 Code Lc blto2_FSBL_lto.o
0x3418AC45 LL_RCC_PLL1P_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
0x3418AC55 LL_RCC_PLL1_GetSource.88 16 4 Code Lc blto2_FSBL_lto.o
0x3418AC65 LL_RCC_PLL1_GetM 16 4 Code Lc blto2_FSBL_lto.o
0x3418AC75 LL_RCC_PLL1_GetN 16 4 Code Lc blto2_FSBL_lto.o
0x3418AC85 LL_RCC_PLL1_GetFRACN 16 4 Code Lc blto2_FSBL_lto.o
0x3418AC95 LL_RCC_PLL1_GetP1 16 4 Code Lc blto2_FSBL_lto.o
0x3418ACA5 LL_RCC_PLL1_GetP2 16 4 Code Lc blto2_FSBL_lto.o
0x3418ACB5 LL_RCC_PLL1_IsEnabledBypass.89 16 4 Code Lc blto2_FSBL_lto.o
0x3418ACC5 LL_RCC_GetAHBPrescaler.90 16 4 Code Lc blto2_FSBL_lto.o
0x3418ACD5 LL_RCC_GetUSBClockSource 16 4 Code Lc blto2_FSBL_lto.o
0x3418ACE5 LL_RCC_IC15_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
0x3418ACF5 LL_RCC_IC15_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x3418AD05 LL_RCC_GetUARTClockSource 16 4 Code Lc blto2_FSBL_lto.o
0x3418AD15 RCCEx_GetPCLK1Freq 28 4 Code Lc blto2_FSBL_lto.o
0x3418AD31 RCCEx_GetPCLK2Freq 28 4 Code Lc blto2_FSBL_lto.o
0x3418AD4D LL_RCC_IC9_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
0x3418AD5D LL_RCC_IC9_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x3418AD6D LL_RCC_IC14_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
0x3418AD7D LL_RCC_IC14_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x3418AD8D LL_RCC_GetAPB2Prescaler.91 16 4 Code Lc blto2_FSBL_lto.o
0x3418AD9D LL_RCC_GetAPB1Prescaler.92 16 4 Code Lc blto2_FSBL_lto.o
0x3418ADAD RCCEx_GetPCLK4Freq 28 4 Code Lc blto2_FSBL_lto.o
0x3418ADC9 LL_RCC_IC8_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
0x3418ADD9 LL_RCC_IC8_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x3418ADE9 LL_RCC_GetAPB4Prescaler.93 16 4 Code Lc blto2_FSBL_lto.o
0x3418ADF9 LL_RCC_IC7_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
0x3418AE09 LL_RCC_IC7_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x3418AE19 LL_RCC_IC5_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
0x3418AE29 LL_RCC_IC5_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x3418AE39 LL_RCC_LSI_IsReady.94 16 4 Code Lc blto2_FSBL_lto.o
0x3418AE49 LL_RCC_IC20_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
0x3418AE59 LL_RCC_IC20_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x3418AE69 RCCEx_GetPCLK5Freq 28 4 Code Lc blto2_FSBL_lto.o
0x3418AE85 LL_RCC_IC16_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
0x3418AE95 LL_RCC_IC16_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x3418AEA5 LL_RCC_GetAPB5Prescaler.95 16 4 Code Lc blto2_FSBL_lto.o
0x3418AEB5 LL_RCC_IC10_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
0x3418AEC5 LL_RCC_IC10_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x3418AED5 LL_RCC_IC19_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
0x3418AEE5 LL_RCC_IC19_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x3418AEF5 LL_RCC_IC13_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
0x3418AF05 LL_RCC_IC13_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x3418AF15 LL_RCC_IC12_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
0x3418AF25 LL_RCC_IC12_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x3418AF35 LL_RCC_IC17_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
0x3418AF45 LL_RCC_IC17_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x3418AF55 LL_RCC_CLKP_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
0x3418AF65 LL_RCC_IC18_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
0x3418AF75 LL_RCC_IC18_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x3418AF85 HAL_XSPI_Init 1 548 4 Code Lc blto2_FSBL_lto.o
0x3418B591 XSPI_WaitFlagStateUntilTimeout 104 4 Code Lc blto2_FSBL_lto.o
0x3418B5F9 XSPI_ConfigCmd 924 4 Code Lc blto2_FSBL_lto.o
0x3418B995 HAL_XSPI_Receive 300 4 Code Lc blto2_FSBL_lto.o
0x3418BAC1 LL_AHB5_GRP1_IsEnabledClock 28 4 Code Lc blto2_FSBL_lto.o
0x3418BADD JumpToApplication 356 4 Code Lc blto2_FSBL_lto.o
0x3418BC41 CheckSFDP_Signature 80 4 Code Lc blto2_FSBL_lto.o
0x3418BC91 SFDP_GetHeader 256 4 Code Lc blto2_FSBL_lto.o
0x3418BD91 sfdp_get_paraminfo 652 4 Code Lc blto2_FSBL_lto.o
0x3418C01D SFDP_BuildGenericDriver 3 092 4 Code Lc blto2_FSBL_lto.o
0x3418CC31 JEDEC_Basic_Manage4S4S4SEnableSequence 132 4 Code Lc blto2_FSBL_lto.o
0x3418CCB5 sfdp_getfrequencevalue 64 4 Code Lc blto2_FSBL_lto.o
0x3418CCF5 sfdp_set_dummycycle 420 4 Code Lc blto2_FSBL_lto.o
0x3418CE99 EXTMEM_DRIVER_NOR_SFDP_DeInit 16 4 Code Lc blto2_FSBL_lto.o
0x3418CEA9 EXTMEM_DRIVER_NOR_SFDP_Disable_MemoryMappedMode 36 4 Code Lc blto2_FSBL_lto.o
0x3418CECD SAL_XSPI_SetClock 116 4 Code Lc blto2_FSBL_lto.o
0x3418CF41 XSPI_FormatCommand 88 4 Code Lc blto2_FSBL_lto.o
0x3418CF99 SAL_XSPI_GetId 152 4 Code Lc blto2_FSBL_lto.o
0x3418D031 XSPI_Transmit 32 4 Code Lc blto2_FSBL_lto.o
0x3418D051 SAL_XSPI_CommandSendData 136 4 Code Lc blto2_FSBL_lto.o
0x3418D0D9 SAL_XSPI_SendReadCommand 136 4 Code Lc blto2_FSBL_lto.o
0x3418D161 SAL_XSPI_CheckStatusRegister 232 4 Code Lc blto2_FSBL_lto.o
0x3418D249 SAL_XSPI_EnableMapMode 200 4 Code Lc blto2_FSBL_lto.o
0x3418D311 SAL_XSPI_UpdateMemoryType 116 4 Code Lc blto2_FSBL_lto.o
0x3418D385 EXTMEM_MemoryMappedMode 140 4 Code Lc blto2_FSBL_lto.o
0x3418D411 EXTMEM_GetMapAddress 196 4 Code Lc blto2_FSBL_lto.o
0x3418D4E5 _start 14 4 Code Gb SEGGER_THUMB_Startup.o
0x3418D4EF __startup_complete 4 Code Gb SEGGER_THUMB_Startup.o
0x3418D4EF __SEGGER_init_done 4 Code Gb SEGGER_THUMB_Startup.o
0x3418D4F3 exit 2 4 Code Gb SEGGER_THUMB_Startup.o
0x3418D4F9 reset_handler 4 Code Gb STM32N6xx_Startup.o
0x3418D4F9 Reset_Handler 4 Code Gb STM32N6xx_Startup.o
0x3418D53D fmodf 284 4 Code Wk floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x3418D659 floorf 104 4 Code Wk floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x3418D6D9 __aeabi_ul2f 84 4 Code Wk floatasmops_arm.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x3418D72D memcpy 92 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x3418D72D __aeabi_memcpy 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x3418D74B __aeabi_memcpy8 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x3418D74B __aeabi_memcpy4 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x3418D789 __aeabi_memclr8 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x3418D789 __aeabi_memclr4 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x3418D789 __aeabi_memclr 104 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x3418D78B __aeabi_memset8 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x3418D78B __aeabi_memset4 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x3418D78B __aeabi_memset 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x3418D791 memset 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x3418D875 MX_BSEC_Init 2 4 Code Lc blto2_FSBL_lto.o
0x3418D891 MX_EXTMEM_MANAGER_Init 62 4 Code Lc blto2_FSBL_lto.o
0x3418D8CF PVD_PVM_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418D8D1 MX_GPIO_Init 134 4 Code Lc blto2_FSBL_lto.o
0x3418D957 DTS_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418D959 LL_AHB4_GRP1_EnableClock 34 4 Code Lc blto2_FSBL_lto.o
0x3418D97B RCC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418D97D main 362 4 Code Gb blto2_FSBL_lto.o
0x3418DAE7 LOCKUP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418DAE9 SystemClock_Config 254 4 Code Lc blto2_FSBL_lto.o
0x3418DBE7 CACHE_ECC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418DBE9 OTP_Config 142 4 Code Lc blto2_FSBL_lto.o
0x3418DC77 TCM_ECC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418DC79 LL_APB4_GRP2_EnableClock 34 4 Code Lc blto2_FSBL_lto.o
0x3418DC9B BCK_ECC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418DC9D assert_failed 10 4 Code Lc blto2_FSBL_lto.o
0x3418DCA7 FPU_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418DCA9 NMI_Handler 2 4 Code Gb blto2_FSBL_lto.o
0x3418DCAB RTC_S_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418DCAD HardFault_Handler 2 4 Code Gb blto2_FSBL_lto.o
0x3418DCAF TAMP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418DCB1 MemManage_Handler 2 4 Code Gb blto2_FSBL_lto.o
0x3418DCB3 RIFSC_TAMPER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418DCB5 BusFault_Handler 2 4 Code Gb blto2_FSBL_lto.o
0x3418DCB7 IAC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418DCB9 UsageFault_Handler 2 4 Code Gb blto2_FSBL_lto.o
0x3418DCBB RCC_S_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418DCBD SVC_Handler 2 4 Code Gb blto2_FSBL_lto.o
0x3418DCBF RTC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418DCC1 DebugMon_Handler 2 4 Code Gb blto2_FSBL_lto.o
0x3418DCC3 IWDG_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418DCC5 PendSV_Handler 2 4 Code Gb blto2_FSBL_lto.o
0x3418DCC7 WWDG_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418DCC9 SystemInit 510 4 Code Gb blto2_FSBL_lto.o
0x3418DEC7 EXTI0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418DEC9 MX_XSPI2_Init 126 4 Code Lc blto2_FSBL_lto.o
0x3418DF47 EXTI1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418DF49 LL_APB4_GRP2_EnableClock.7 34 4 Code Lc blto2_FSBL_lto.o
0x3418DF6B EXTI2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418DF6D LL_AHB4_GRP1_EnableClock.8 34 4 Code Lc blto2_FSBL_lto.o
0x3418DF8F EXTI3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418DF91 LL_AHB5_GRP1_EnableClock 34 4 Code Lc blto2_FSBL_lto.o
0x3418DFB3 EXTI4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418DFB5 HAL_InitTick 126 4 Code Lc blto2_FSBL_lto.o
0x3418E033 EXTI5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418E035 HAL_IncTick 26 4 Code Lc blto2_FSBL_lto.o
0x3418E04F EXTI6_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418E051 HAL_Delay 58 4 Code Lc blto2_FSBL_lto.o
0x3418E08B EXTI7_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418E08D HAL_SuspendTick 18 4 Code Lc blto2_FSBL_lto.o
0x3418E09F EXTI8_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418E0A1 HAL_BSEC_OTP_Reload 250 4 Code Lc blto2_FSBL_lto.o
0x3418E19B EXTI9_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418E19D HAL_BSEC_OTP_Program 342 4 Code Lc blto2_FSBL_lto.o
0x3418E2F3 EXTI10_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418E2F5 HAL_NVIC_SetPriorityGrouping 62 4 Code Lc blto2_FSBL_lto.o
0x3418E333 EXTI11_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418E335 __NVIC_SetPriority 62 4 Code Lc blto2_FSBL_lto.o
0x3418E373 EXTI12_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418E375 SysTick_Config 78 4 Code Lc blto2_FSBL_lto.o
0x3418E3C3 EXTI13_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418E3C5 HAL_GPIO_WritePin 102 4 Code Lc blto2_FSBL_lto.o
0x3418E42B EXTI14_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418E42D HAL_PWREx_ConfigSupply 114 4 Code Lc blto2_FSBL_lto.o
0x3418E49F EXTI15_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418E4A1 HAL_PWREx_ControlVoltageScaling 114 4 Code Lc blto2_FSBL_lto.o
0x3418E513 SAES_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418E515 HAL_PWREx_ConfigVddIORange 226 4 Code Lc blto2_FSBL_lto.o
0x3418E5F7 CRYP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418E5F9 HAL_PWREx_EnableVddIO3 18 4 Code Lc blto2_FSBL_lto.o
0x3418E60B PKA_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418E60D LL_RCC_HSI_Enable 14 4 Code Lc blto2_FSBL_lto.o
0x3418E61B HASH_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418E61D HAL_RCC_OscConfig 2 810 4 Code Lc blto2_FSBL_lto.o
0x3418F117 RNG_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418F119 LL_RCC_HSI_SetCalibTrimming 30 4 Code Lc blto2_FSBL_lto.o
0x3418F137 MCE1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418F139 LL_RCC_HSI_Disable 14 4 Code Lc blto2_FSBL_lto.o
0x3418F147 MCE2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418F149 LL_RCC_MSI_SetCalibTrimming 30 4 Code Lc blto2_FSBL_lto.o
0x3418F167 MCE3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418F169 LL_RCC_MSI_Enable 14 4 Code Lc blto2_FSBL_lto.o
0x3418F177 MCE4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418F179 LL_RCC_MSI_Disable 14 4 Code Lc blto2_FSBL_lto.o
0x3418F187 ADC1_2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418F189 LL_RCC_LSI_Enable 14 4 Code Lc blto2_FSBL_lto.o
0x3418F197 CSI_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418F199 LL_RCC_LSI_Disable 14 4 Code Lc blto2_FSBL_lto.o
0x3418F1A7 DCMIPP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418F1A9 RCC_PLL_IsNewConfig 218 4 Code Lc blto2_FSBL_lto.o
0x3418F283 PAHB_ERR_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418F285 RCC_PLL_Config 846 4 Code Lc blto2_FSBL_lto.o
0x3418F5D3 NPU0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418F5D5 RCC_PLL_Enable 94 4 Code Lc blto2_FSBL_lto.o
0x3418F633 NPU1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418F635 HAL_RCC_ClockConfig 2 498 4 Code Lc blto2_FSBL_lto.o
0x3418FFF7 NPU2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418FFF9 RCC_IC_CheckPLLSources 234 4 Code Lc blto2_FSBL_lto.o
0x341900E3 NPU3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341900E5 LL_RCC_IC1_Enable 14 4 Code Lc blto2_FSBL_lto.o
0x341900F3 CACHEAXI_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341900F5 HAL_RCC_GetCpuClockFreq 238 4 Code Lc blto2_FSBL_lto.o
0x341901E3 LTDC_LO_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341901E5 LL_RCC_IC1_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
0x341901FB LTDC_LO_ERR_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341901FD HAL_RCC_GetSysClockFreq 26 4 Code Lc blto2_FSBL_lto.o
0x34190217 DMA2D_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34190219 LL_RCC_IC2_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
0x3419022F JPEG_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34190231 LL_RCC_IC5_Enable.60 14 4 Code Lc blto2_FSBL_lto.o
0x3419023F VENC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34190241 LL_RCC_IC3_Enable 14 4 Code Lc blto2_FSBL_lto.o
0x3419024F GFXMMU_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34190251 LL_RCC_IC4_Enable 14 4 Code Lc blto2_FSBL_lto.o
0x3419025F GFXTIM_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34190261 LL_RCC_CLKP_Enable 14 4 Code Lc blto2_FSBL_lto.o
0x3419026F GPU2D_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34190271 LL_RCC_IC7_Enable 14 4 Code Lc blto2_FSBL_lto.o
0x3419027F GPU2D_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34190281 LL_RCC_IC8_Enable 14 4 Code Lc blto2_FSBL_lto.o
0x3419028F ICACHE_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34190291 LL_RCC_HSE_SelectHSEDiv2AsDiv2Clock 18 4 Code Lc blto2_FSBL_lto.o
0x341902A3 HPDMA1_Channel0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341902A5 LL_RCC_HSE_SelectHSEAsDiv2Clock 18 4 Code Lc blto2_FSBL_lto.o
0x341902B7 HPDMA1_Channel1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341902B9 LL_RCC_SetTIMPrescaler 30 4 Code Lc blto2_FSBL_lto.o
0x341902D7 HPDMA1_Channel2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341902D9 LL_RCC_GetADCClockSource 22 4 Code Lc blto2_FSBL_lto.o
0x341902EF HPDMA1_Channel3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341902F1 LL_RCC_GetADFClockSource 22 4 Code Lc blto2_FSBL_lto.o
0x34190307 HPDMA1_Channel4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34190309 LL_RCC_GetCLKPClockSource 22 4 Code Lc blto2_FSBL_lto.o
0x3419031F HPDMA1_Channel5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34190321 LL_RCC_GetDCMIPPClockSource 22 4 Code Lc blto2_FSBL_lto.o
0x34190337 HPDMA1_Channel6_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34190339 LL_RCC_GetETHClockSource 22 4 Code Lc blto2_FSBL_lto.o
0x3419034F HPDMA1_Channel7_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34190351 LL_RCC_GetETHPTPClockSource 22 4 Code Lc blto2_FSBL_lto.o
0x34190367 HPDMA1_Channel8_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34190369 LL_RCC_GetFDCANClockSource 22 4 Code Lc blto2_FSBL_lto.o
0x3419037F HPDMA1_Channel9_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34190381 LL_RCC_GetFMCClockSource 22 4 Code Lc blto2_FSBL_lto.o
0x34190397 HPDMA1_Channel10_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34190399 LL_RCC_GetLPUARTClockSource 22 4 Code Lc blto2_FSBL_lto.o
0x341903AF HPDMA1_Channel11_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341903B1 LL_RCC_GetLTDCClockSource 22 4 Code Lc blto2_FSBL_lto.o
0x341903C7 HPDMA1_Channel12_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341903C9 LL_RCC_GetMDFClockSource 22 4 Code Lc blto2_FSBL_lto.o
0x341903DF HPDMA1_Channel13_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341903E1 LL_RCC_GetPSSIClockSource 22 4 Code Lc blto2_FSBL_lto.o
0x341903F7 HPDMA1_Channel14_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341903F9 LL_RCC_GetSPDIFRXClockSource 22 4 Code Lc blto2_FSBL_lto.o
0x3419040F HPDMA1_Channel15_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34190411 HAL_RCCEx_GetPeriphCLKFreq 1 626 4 Code Lc blto2_FSBL_lto.o
0x34190A6B GPDMA1_Channel0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34190A6D RCCEx_GetADCCLKFreq 438 4 Code Lc blto2_FSBL_lto.o
0x34190C23 GPDMA1_Channel1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34190C25 RCCEx_GetCSICLKFreq 134 4 Code Lc blto2_FSBL_lto.o
0x34190CAB GPDMA1_Channel2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34190CAD RCCEx_GetETH1PTPCLKFreq 222 4 Code Lc blto2_FSBL_lto.o
0x34190D8B GPDMA1_Channel3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34190D8D RCCEx_GetFDCANCLKFreq 206 4 Code Lc blto2_FSBL_lto.o
0x34190E5B GPDMA1_Channel4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34190E5D RCCEx_GetFMCCLKFreq 314 4 Code Lc blto2_FSBL_lto.o
0x34190F97 GPDMA1_Channel5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34190F99 RCCEx_GetI2CCLKFreq 706 4 Code Lc blto2_FSBL_lto.o
0x3419125B GPDMA1_Channel6_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3419125D RCCEx_GetLPTIMCLKFreq 706 4 Code Lc blto2_FSBL_lto.o
0x3419151F GPDMA1_Channel7_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34191521 RCCEx_GetPSSICLKFreq 218 4 Code Lc blto2_FSBL_lto.o
0x341915FB GPDMA1_Channel8_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341915FD RCCEx_GetRTCCLKFreq 126 4 Code Lc blto2_FSBL_lto.o
0x3419167B GPDMA1_Channel9_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3419167D RCCEx_GetSAICLKFreq 606 4 Code Lc blto2_FSBL_lto.o
0x341918DB GPDMA1_Channel10_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341918DD LL_RCC_IC3_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
0x341918F3 GPDMA1_Channel11_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341918F5 HAL_RCCEx_GetPLL1CLKFreq 130 4 Code Lc blto2_FSBL_lto.o
0x34191977 GPDMA1_Channel12_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34191979 HAL_RCCEx_GetPLL2CLKFreq 130 4 Code Lc blto2_FSBL_lto.o
0x341919FB GPDMA1_Channel13_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341919FD HAL_RCCEx_GetPLL3CLKFreq 130 4 Code Lc blto2_FSBL_lto.o
0x34191A7F GPDMA1_Channel14_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34191A81 HAL_RCCEx_GetPLL4CLKFreq 130 4 Code Lc blto2_FSBL_lto.o
0x34191B03 GPDMA1_Channel15_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34191B05 LL_RCC_IC4_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
0x34191B1B I2C1_EV_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34191B1D LL_RCC_IC15_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
0x34191B33 I2C1_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34191B35 LL_RCC_IC9_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
0x34191B4B I2C2_EV_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34191B4D LL_RCC_IC14_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
0x34191B63 I2C2_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34191B65 LL_RCC_IC8_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
0x34191B7B I2C3_EV_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34191B7D LL_RCC_IC7_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
0x34191B93 I2C3_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34191B95 LL_RCC_IC5_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
0x34191BAB I2C4_EV_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34191BAD LL_RCC_IC20_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
0x34191BC3 I2C4_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34191BC5 LL_RCC_IC16_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
0x34191BDB I3C1_EV_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34191BDD LL_RCC_IC10_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
0x34191BF3 I3C1_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34191BF5 LL_RCC_IC19_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
0x34191C0B I3C2_EV_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34191C0D LL_RCC_IC13_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
0x34191C23 I3C2_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34191C25 LL_RCC_IC12_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
0x34191C3B TIM1_BRK_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34191C3D LL_RCC_IC17_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
0x34191C53 TIM1_UP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34191C55 LL_RCC_IC18_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
0x34191C6B TIM1_TRG_CCU_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34191C6D HAL_XSPI_SetTimeout 18 4 Code Lc blto2_FSBL_lto.o
0x34191C7F TIM1_CC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34191C81 HAL_XSPI_Command 1 106 4 Code Lc blto2_FSBL_lto.o
0x341920D3 TIM2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341920D5 HAL_XSPI_Transmit 226 4 Code Lc blto2_FSBL_lto.o
0x341921B7 TIM3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341921B9 HAL_XSPI_AutoPolling 406 4 Code Lc blto2_FSBL_lto.o
0x3419234F TIM4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34192351 HAL_XSPI_MemoryMapped 330 4 Code Lc blto2_FSBL_lto.o
0x3419249B TIM5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3419249D HAL_XSPI_Abort 246 4 Code Lc blto2_FSBL_lto.o
0x34192593 TIM6_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34192595 HAL_XSPIM_Config 878 4 Code Lc blto2_FSBL_lto.o
0x34192903 TIM7_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34192905 XSPIM_GetConfig 210 4 Code Lc blto2_FSBL_lto.o
0x341929D7 TIM8_BRK_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341929D9 BOOT_Application 34 4 Code Lc blto2_FSBL_lto.o
0x341929FB TIM8_UP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341929FD MapMemory 94 4 Code Lc blto2_FSBL_lto.o
0x34192A5B TIM8_TRG_CCU_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34192A5D SFDP_ReadHeader 126 4 Code Lc blto2_FSBL_lto.o
0x34192ADB TIM8_CC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34192ADD SFDP_CollectData 458 4 Code Lc blto2_FSBL_lto.o
0x34192CA7 TIM9_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34192CA9 SFDP_MemoryReset 458 4 Code Lc blto2_FSBL_lto.o
0x34192E73 TIM10_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34192E75 JEDEC_Basic_ManageQuadEnableRequirement 338 4 Code Lc blto2_FSBL_lto.o
0x34192FC7 TIM11_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34192FC9 sfdp_enter_octal_mode 482 4 Code Lc blto2_FSBL_lto.o
0x341931AB TIM12_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341931AD driver_check_FlagBUSY 102 4 Code Lc blto2_FSBL_lto.o
0x34193213 TIM13_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193215 EXTMEM_DRIVER_NOR_SFDP_Init 306 4 Code Lc blto2_FSBL_lto.o
0x34193347 TIM14_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193349 EXTMEM_DRIVER_NOR_SFDP_Enable_MemoryMappedMode 58 4 Code Lc blto2_FSBL_lto.o
0x34193383 TIM15_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193385 SAL_XSPI_Init 86 4 Code Lc blto2_FSBL_lto.o
0x341933DB TIM16_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341933DD SAL_XSPI_MemoryConfig 666 4 Code Lc blto2_FSBL_lto.o
0x34193677 TIM17_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193679 SAL_XSPI_GetSFDP 222 4 Code Lc blto2_FSBL_lto.o
0x34193757 TIM18_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193759 SAL_XSPI_Write 138 4 Code Lc blto2_FSBL_lto.o
0x341937E3 LPTIM1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341937E5 SAL_XSPI_CommandSendReadAddress 190 4 Code Lc blto2_FSBL_lto.o
0x341938A3 LPTIM2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341938A5 SAL_XSPI_DisableMapMode 22 4 Code Lc blto2_FSBL_lto.o
0x341938BB LPTIM3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341938BD SAL_XSPI_Abort 18 4 Code Lc blto2_FSBL_lto.o
0x341938CF LPTIM4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341938D1 EXTMEM_Init 94 4 Code Lc blto2_FSBL_lto.o
0x3419392F LPTIM5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193931 EXTMEM_DeInit 78 4 Code Lc blto2_FSBL_lto.o
0x3419397F ADF1_FLT0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193981 __aeabi_f2ulz 62 4 Code Wk floatasmops_arm.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x341939BF MDF1_FLT0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341939C1 __aeabi_uldivmod 302 4 Code Wk intasmops_arm.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193AEF MDF1_FLT1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193AF1 MDF1_FLT2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193AF3 MDF1_FLT3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193AF5 MDF1_FLT4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193AF7 MDF1_FLT5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193AF9 SAI1_A_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193AFB SAI1_B_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193AFD SAI2_A_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193AFF SAI2_B_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B01 SPDIFRX_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B03 SPI1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B05 SPI2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B07 SPI3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B09 SPI4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B0B SPI5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B0D SPI6_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B0F USART1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B11 USART2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B13 USART3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B15 UART4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B17 UART5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B19 USART6_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B1B UART7_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B1D UART8_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B1F UART9_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B21 USART10_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B23 LPUART1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B25 XSPI1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B27 XSPI2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B29 XSPI3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B2B FMC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B2D SDMMC1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B2F SDMMC2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B31 UCPD1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B33 USB1_OTG_HS_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B35 USB2_OTG_HS_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B37 ETH1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B39 FDCAN1_IT0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B3B FDCAN1_IT1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B3D FDCAN2_IT0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B3F FDCAN2_IT1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B41 FDCAN3_IT0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B43 FDCAN3_IT1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B45 FDCAN_CU_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B47 MDIOS_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B49 DCMI_PSSI_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B4B WAKEUP_PIN_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B4D CTI_INT0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B4F CTI_INT1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B51 LTDC_UP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B53 LTDC_UP_ERR_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B55 fwrite 46 2 Code Wk fileops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193B83 __SEGGER_RTL_float32_isnan 14 2 Code Wk floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193B91 __SEGGER_RTL_float32_isinf 18 2 Code Wk floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193BA3 ldexpf 54 2 Code Wk floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193BD9 __SEGGER_RTL_pow10f 58 2 Code Gb utilops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193C13 __SEGGER_RTL_prin_flush 26 2 Code Gb prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193C2D __SEGGER_RTL_stream_write 10 2 Code Lc prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193C37 __SEGGER_RTL_X_file_write 6 2 Code Gb prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193C3D _DoInit 98 2 Code Lc SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193C9F _GetAvailWriteSpace 22 2 Code Lc SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193CB5 _WriteNoCheck 58 2 Code Lc SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193CEF strlen 42 2 Code Wk strops.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193D19 __SEGGER_RTL_current_locale 26 2 Code Gb mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193D33 __SEGGER_RTL_ascii_wctomb 14 2 Code Gb mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193D49 __SEGGER_RTL_float32_isnormal 24 2 Code Wk floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193D61 __SEGGER_RTL_float32_signbit 8 2 Code Wk floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193D69 frexpf 36 2 Code Wk floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193D8D abs 8 2 Code Wk intops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193D95 __SEGGER_RTL_putc 132 2 Code Gb prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193E19 __SEGGER_RTL_print_padding 32 2 Code Gb prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193E39 __SEGGER_RTL_pre_padding 20 2 Code Gb prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193E4D vfprintf 28 2 Code Wk prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193E69 vfprintf_l 104 2 Code Wk prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193ED1 printf 44 2 Code Wk prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193EFD __SEGGER_RTL_X_file_stat 52 2 Code Gb prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193F31 __SEGGER_RTL_X_file_bufsize 4 2 Code Gb prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193F35 _WriteBlocking 88 2 Code Lc SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193F8D SEGGER_RTT_WriteNoLock 88 2 Code Gb SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193FE5 SEGGER_RTT_Write 40 2 Code Gb SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x3419400D strnlen 92 2 Code Wk strops.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34194069 __SEGGER_RTL_ascii_mbtowc 48 2 Code Gb mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34194099 __SEGGER_RTL_ascii_isctype 32 2 Code Lc mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x341940B9 __SEGGER_RTL_ascii_toupper 12 2 Code Lc mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x341940C5 __SEGGER_RTL_ascii_tolower 12 2 Code Lc mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x341940D1 __SEGGER_RTL_ascii_iswctype 32 2 Code Lc mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x341940F1 __SEGGER_RTL_ascii_towupper 12 2 Code Lc mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x341940FD __SEGGER_RTL_ascii_towlower 12 2 Code Lc mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34194629 __SEGGER_init_ctors 26 4 Code Wk SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x3419469D __SEGGER_init_zero 18 2 Code Wk SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x341946AF __SEGGER_init_copy 20 2 Code Wk SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)

Function symbols by descending size

Symbol name Size Align Type Bd Object File
HAL_RCCEx_PeriphCLKConfig 24 268 4 Code Lc blto2_FSBL_lto.o
SFDP_BuildGenericDriver 3 092 4 Code Lc blto2_FSBL_lto.o
__SEGGER_RTL_vfprintf 3 036 8 Code Gb __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_vfprintf_short_float_long_long 3 036 8 Code Gb __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
HAL_RCC_OscConfig 2 810 4 Code Lc blto2_FSBL_lto.o
HAL_RCC_ClockConfig 2 498 4 Code Lc blto2_FSBL_lto.o
HAL_GPIO_Init 1 928 4 Code Lc blto2_FSBL_lto.o
HAL_RCCEx_GetPeriphCLKFreq 1 626 4 Code Lc blto2_FSBL_lto.o
HAL_XSPI_Init 1 548 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetSPICLKFreq 1 196 4 Code Lc blto2_FSBL_lto.o
HAL_XSPI_Command 1 106 4 Code Lc blto2_FSBL_lto.o
XSPI_ConfigCmd 924 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetUARTCLKFreq 916 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetUSARTCLKFreq 916 4 Code Lc blto2_FSBL_lto.o
HAL_XSPIM_Config 878 4 Code Lc blto2_FSBL_lto.o
RCC_PLL_Config 846 4 Code Lc blto2_FSBL_lto.o
SystemCoreClockUpdate 828 4 Code Gb blto2_FSBL_lto.o
RCCEx_GetCLKPCLKFreq 736 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetI2CCLKFreq 706 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetLPTIMCLKFreq 706 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_MemoryConfig 666 4 Code Lc blto2_FSBL_lto.o
sfdp_get_paraminfo 652 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetSAICLKFreq 606 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetI3CCLKFreq 516 4 Code Lc blto2_FSBL_lto.o
SystemInit 510 4 Code Gb blto2_FSBL_lto.o
sfdp_enter_octal_mode 482 4 Code Lc blto2_FSBL_lto.o
SFDP_CollectData 458 4 Code Lc blto2_FSBL_lto.o
SFDP_MemoryReset 458 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetXSPICLKFreq 452 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetADCCLKFreq 438 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetMDFCLKFreq 436 4 Code Lc blto2_FSBL_lto.o
sfdp_set_dummycycle 420 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetLPUARTCLKFreq 412 4 Code Lc blto2_FSBL_lto.o
HAL_XSPI_AutoPolling 406 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetSDMMCCLKFreq 396 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetADFCLKFreq 388 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetSPDIFRXCLKFreq 372 4 Code Lc blto2_FSBL_lto.o
main 362 4 Code Gb blto2_FSBL_lto.o
JumpToApplication 356 4 Code Lc blto2_FSBL_lto.o
HAL_BSEC_OTP_Program 342 4 Code Lc blto2_FSBL_lto.o
JEDEC_Basic_ManageQuadEnableRequirement 338 4 Code Lc blto2_FSBL_lto.o
HAL_XSPI_MemoryMapped 330 4 Code Lc blto2_FSBL_lto.o
HAL_XSPI_MspInit 324 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetOTGPHYCLKFreq 324 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetFMCCLKFreq 314 4 Code Lc blto2_FSBL_lto.o
EXTMEM_DRIVER_NOR_SFDP_Init 306 4 Code Lc blto2_FSBL_lto.o
__aeabi_uldivmod 302 4 Code Wk intasmops_arm.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
HAL_XSPI_Receive 300 4 Code Lc blto2_FSBL_lto.o
fmodf 284 4 Code Wk floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
SFDP_GetHeader 256 4 Code Lc blto2_FSBL_lto.o
SystemClock_Config 254 4 Code Lc blto2_FSBL_lto.o
HAL_BSEC_OTP_Reload 250 4 Code Lc blto2_FSBL_lto.o
HAL_XSPI_Abort 246 4 Code Lc blto2_FSBL_lto.o
HAL_DMA_Abort 244 4 Code Lc blto2_FSBL_lto.o
HAL_RCC_GetClockConfig 240 4 Code Lc blto2_FSBL_lto.o
HAL_RCC_GetCpuClockFreq 238 4 Code Lc blto2_FSBL_lto.o
RCC_IC_CheckPLLSources 234 4 Code Lc blto2_FSBL_lto.o
RCC_GetSysClockFreq 232 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_CheckStatusRegister 232 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetDCMIPPCLKFreq 228 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetLTDCCLKFreq 228 4 Code Lc blto2_FSBL_lto.o
HAL_PWREx_ConfigVddIORange 226 4 Code Lc blto2_FSBL_lto.o
HAL_XSPI_Transmit 226 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetETH1PTPCLKFreq 222 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_GetSFDP 222 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetPSSICLKFreq 218 4 Code Lc blto2_FSBL_lto.o
RCC_PLL_IsNewConfig 218 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetETH1CLKFreq 216 4 Code Lc blto2_FSBL_lto.o
XSPIM_GetConfig 210 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetFDCANCLKFreq 206 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_EnableMapMode 200 4 Code Lc blto2_FSBL_lto.o
EXTMEM_GetMapAddress 196 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_CommandSendReadAddress 190 4 Code Lc blto2_FSBL_lto.o
HAL_NVIC_SetPriority 168 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_GetId 152 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetOTGPHYCKREFCLKFreq 148 4 Code Lc blto2_FSBL_lto.o
OTP_Config 142 4 Code Lc blto2_FSBL_lto.o
EXTMEM_MemoryMappedMode 140 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetPLLSourceFreq 140 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_Write 138 4 Code Lc blto2_FSBL_lto.o
RCCEx_CalcPLLFreq 136 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_CommandSendData 136 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_SendReadCommand 136 4 Code Lc blto2_FSBL_lto.o
MX_GPIO_Init 134 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetCSICLKFreq 134 4 Code Lc blto2_FSBL_lto.o
JEDEC_Basic_Manage4S4S4SEnableSequence 132 4 Code Lc blto2_FSBL_lto.o
__SEGGER_RTL_putc 132 2 Code Gb prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
HAL_RCCEx_GetPLL1CLKFreq 130 4 Code Lc blto2_FSBL_lto.o
HAL_RCCEx_GetPLL2CLKFreq 130 4 Code Lc blto2_FSBL_lto.o
HAL_RCCEx_GetPLL3CLKFreq 130 4 Code Lc blto2_FSBL_lto.o
HAL_RCCEx_GetPLL4CLKFreq 130 4 Code Lc blto2_FSBL_lto.o
HAL_InitTick 126 4 Code Lc blto2_FSBL_lto.o
MX_XSPI2_Init 126 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetRTCCLKFreq 126 4 Code Lc blto2_FSBL_lto.o
SFDP_ReadHeader 126 4 Code Lc blto2_FSBL_lto.o
HAL_BSEC_OTP_Read 124 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_SetClock 116 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_UpdateMemoryType 116 4 Code Lc blto2_FSBL_lto.o
HAL_PWREx_ConfigSupply 114 4 Code Lc blto2_FSBL_lto.o
HAL_PWREx_ControlVoltageScaling 114 4 Code Lc blto2_FSBL_lto.o
XSPI_WaitFlagStateUntilTimeout 104 4 Code Lc blto2_FSBL_lto.o
__aeabi_memclr 104 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
floorf 104 4 Code Wk floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
vfprintf_l 104 2 Code Wk prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
HAL_GPIO_WritePin 102 4 Code Lc blto2_FSBL_lto.o
driver_check_FlagBUSY 102 4 Code Lc blto2_FSBL_lto.o
NVIC_EncodePriority 100 4 Code Lc blto2_FSBL_lto.o
_DoInit 98 2 Code Lc SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
EXTMEM_Init 94 4 Code Lc blto2_FSBL_lto.o
MapMemory 94 4 Code Lc blto2_FSBL_lto.o
RCC_PLL_Enable 94 4 Code Lc blto2_FSBL_lto.o
memcpy 92 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
strnlen 92 2 Code Wk strops.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
SEGGER_RTT_WriteNoLock 88 2 Code Gb SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
XSPI_FormatCommand 88 4 Code Lc blto2_FSBL_lto.o
_WriteBlocking 88 2 Code Lc SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
SAL_XSPI_Init 86 4 Code Lc blto2_FSBL_lto.o
RCC_PLL_Source_IsReady 84 4 Code Lc blto2_FSBL_lto.o
__aeabi_ul2f 84 4 Code Wk floatasmops_arm.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
CheckSFDP_Signature 80 4 Code Lc blto2_FSBL_lto.o
EXTMEM_DeInit 78 4 Code Lc blto2_FSBL_lto.o
SysTick_Config 78 4 Code Lc blto2_FSBL_lto.o
sfdp_getfrequencevalue 64 4 Code Lc blto2_FSBL_lto.o
HAL_NVIC_SetPriorityGrouping 62 4 Code Lc blto2_FSBL_lto.o
MX_EXTMEM_MANAGER_Init 62 4 Code Lc blto2_FSBL_lto.o
__NVIC_SetPriority 62 4 Code Lc blto2_FSBL_lto.o
__aeabi_f2ulz 62 4 Code Wk floatasmops_arm.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__NVIC_SetPriorityGrouping 60 4 Code Lc blto2_FSBL_lto.o
EXTMEM_DRIVER_NOR_SFDP_Enable_MemoryMappedMode 58 4 Code Lc blto2_FSBL_lto.o
HAL_Delay 58 4 Code Lc blto2_FSBL_lto.o
_WriteNoCheck 58 2 Code Lc SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_pow10f 58 2 Code Gb utilops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
ldexpf 54 2 Code Wk floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
LL_RCC_SetClockSource 52 4 Code Lc blto2_FSBL_lto.o
__SEGGER_RTL_X_file_stat 52 2 Code Gb prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
HAL_Init 48 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetClockSource 48 4 Code Lc blto2_FSBL_lto.o
__SEGGER_RTL_ascii_mbtowc 48 2 Code Gb mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
fwrite 46 2 Code Wk fileops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
printf 44 2 Code Wk prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
strlen 42 2 Code Wk strops.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
SEGGER_RTT_Write 40 2 Code Gb SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
EXTMEM_DRIVER_NOR_SFDP_Disable_MemoryMappedMode 36 4 Code Lc blto2_FSBL_lto.o
frexpf 36 2 Code Wk floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
BOOT_Application 34 4 Code Lc blto2_FSBL_lto.o
LL_AHB4_GRP1_EnableClock 34 4 Code Lc blto2_FSBL_lto.o
LL_AHB4_GRP1_EnableClock.8 34 4 Code Lc blto2_FSBL_lto.o
LL_AHB5_GRP1_EnableClock 34 4 Code Lc blto2_FSBL_lto.o
LL_APB4_GRP2_EnableClock 34 4 Code Lc blto2_FSBL_lto.o
LL_APB4_GRP2_EnableClock.7 34 4 Code Lc blto2_FSBL_lto.o
XSPI_Transmit 32 4 Code Lc blto2_FSBL_lto.o
__SEGGER_RTL_ascii_isctype 32 2 Code Lc mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_ascii_iswctype 32 2 Code Lc mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_print_padding 32 2 Code Gb prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
LL_RCC_HSI_SetCalibTrimming 30 4 Code Lc blto2_FSBL_lto.o
LL_RCC_MSI_SetCalibTrimming 30 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetTIMPrescaler 30 4 Code Lc blto2_FSBL_lto.o
LL_AHB5_GRP1_IsEnabledClock 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSI_SetDivider 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_MSI_SetFrequency 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetADFClockSource 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetCLKPClockSource 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetDCMIPPClockSource 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetETHClockSource 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetETHPHYInterface 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetETHREFRXClockSource 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetETHREFTXClockSource 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetFDCANClockSource 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetFMCClockSource 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetLPUARTClockSource 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetLTDCClockSource 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetMDFClockSource 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetPSSIClockSource 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetRTCClockSource 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetRTC_HSEPrescaler 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetSPDIFRXClockSource 28 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetHCLKFreq 28 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetPCLK1Freq 28 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetPCLK2Freq 28 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetPCLK4Freq 28 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetPCLK5Freq 28 4 Code Lc blto2_FSBL_lto.o
vfprintf 28 2 Code Wk prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
HAL_IncTick 26 4 Code Lc blto2_FSBL_lto.o
HAL_RCC_GetSysClockFreq 26 4 Code Lc blto2_FSBL_lto.o
__SEGGER_RTL_current_locale 26 2 Code Gb mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_prin_flush 26 2 Code Gb prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_init_ctors 26 4 Code Wk SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_float32_isnormal 24 2 Code Wk floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
LL_RCC_GetADCClockSource 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetADFClockSource 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetCLKPClockSource 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetDCMIPPClockSource 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetETHClockSource 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetETHPTPClockSource 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetFDCANClockSource 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetFMCClockSource 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetLPUARTClockSource 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetLTDCClockSource 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetMDFClockSource 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetPSSIClockSource 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetSPDIFRXClockSource 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC10_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC12_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC13_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC14_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC15_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC16_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC17_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC18_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC19_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC1_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC20_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC2_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC3_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC4_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC5_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC7_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC8_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC9_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_DisableMapMode 22 4 Code Lc blto2_FSBL_lto.o
_GetAvailWriteSpace 22 2 Code Lc SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_pre_padding 20 2 Code Gb prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_init_copy 20 2 Code Wk SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
HAL_PWREx_EnableVddIO3 18 4 Code Lc blto2_FSBL_lto.o
HAL_SuspendTick 18 4 Code Lc blto2_FSBL_lto.o
HAL_XSPI_SetTimeout 18 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSE_SelectHSEAsDiv2Clock 18 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSE_SelectHSEDiv2AsDiv2Clock 18 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_Abort 18 4 Code Lc blto2_FSBL_lto.o
__SEGGER_RTL_float32_isinf 18 2 Code Wk floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_init_zero 18 2 Code Wk SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
EXTMEM_DRIVER_NOR_SFDP_DeInit 16 4 Code Lc blto2_FSBL_lto.o
HAL_SYSTICK_Config 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_CLKP_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetADCPrescaler 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetAHBPrescaler.90 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetAPB1Prescaler.92 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetAPB2Prescaler.91 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetAPB4Prescaler.93 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetAPB5Prescaler.95 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetCpuClkSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetETH1PTPDivider 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetI2CClockSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetI3CClockSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetLPTIMClockSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetRTCClockSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetSAIClockSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetSDMMCClockSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetSPIClockSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetSysClkSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetTIMPrescaler 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetUARTClockSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetUSARTClockSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetUSBClockSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetXSPIClockSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSE_IsReady 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSE_IsReady.80 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSE_IsSelectedHSEDiv2AsDiv2Clock 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSI_GetDivider 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSI_GetDivider.78 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSI_IsReady 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSI_IsReady.77 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC10_Enable.61 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC10_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC10_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC11_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC12_Enable 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC12_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC12_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC13_Enable 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC13_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC13_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC14_Enable 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC14_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC14_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC15_Enable.62 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC15_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC15_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC16_Enable 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC16_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC16_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC17_Enable 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC17_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC17_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC18_Enable 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC18_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC18_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC19_Enable 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC19_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC19_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC1_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC20_Enable.63 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC20_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC20_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC2_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC3_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC3_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC4_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC4_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC5_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC5_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC6_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC7_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC7_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC8_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC8_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC9_Enable 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC9_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC9_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_LSE_IsReady 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_LSE_IsReady.59 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_LSI_IsReady 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_LSI_IsReady.94 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_MSI_GetFrequency 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_MSI_IsReady 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_MSI_IsReady.79 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1P_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_GetFRACN 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_GetM 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_GetN 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_GetP1 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_GetP2 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_GetSource.88 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_IsEnabledBypass 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_IsEnabledBypass.89 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_IsReady 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_IsReady.87 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2P_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_GetFRACN 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_GetM 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_GetN 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_GetP1 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_GetP2 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_GetSource.85 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_IsEnabledBypass 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_IsEnabledBypass.86 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_IsReady 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_IsReady.84 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3P_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_GetFRACN 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_GetM 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_GetN 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_GetP1 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_GetP2 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_GetSource.82 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_IsEnabledBypass 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_IsEnabledBypass.83 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_IsReady 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_IsReady.81 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4P_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_GetFRACN 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_GetM 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_GetN 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_GetP1 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_GetP2 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_GetSource.75 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_IsEnabledBypass 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_IsEnabledBypass.76 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_IsReady 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_IsReady.74 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetI2CClockSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetI3CClockSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetLPTIMClockSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetOTGPHYCKREFClockSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetOTGPHYClockSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetSAIClockSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetSDMMCClockSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetSPIClockSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetUSARTClockSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetXSPIClockSource 16 4 Code Lc blto2_FSBL_lto.o
__NVIC_GetPriorityGrouping 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_CLKP_Enable 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSI_Disable 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSI_Enable 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC1_Enable 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC3_Enable 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC4_Enable 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC5_Enable.60 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC7_Enable 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC8_Enable 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_LSI_Disable 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_LSI_Enable 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_MSI_Disable 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_MSI_Enable 14 4 Code Lc blto2_FSBL_lto.o
__SEGGER_RTL_ascii_wctomb 14 2 Code Gb mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_float32_isnan 14 2 Code Wk floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
_start 14 4 Code Gb SEGGER_THUMB_Startup.o
HAL_GetTick 12 4 Code Lc blto2_FSBL_lto.o
__SEGGER_RTL_ascii_tolower 12 2 Code Lc mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_ascii_toupper 12 2 Code Lc mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_ascii_towlower 12 2 Code Lc mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_ascii_towupper 12 2 Code Lc mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_stream_write 10 2 Code Lc prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
assert_failed 10 4 Code Lc blto2_FSBL_lto.o
HAL_MspInit 8 4 Code Lc blto2_FSBL_lto.o
SysTick_Handler 8 4 Code Gb blto2_FSBL_lto.o
__SEGGER_RTL_float32_signbit 8 2 Code Wk floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
abs 8 2 Code Wk intops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_X_file_write 6 2 Code Gb prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
Error_Handler 4 4 Code Lc blto2_FSBL_lto.o
__SEGGER_RTL_X_file_bufsize 4 2 Code Gb prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
BusFault_Handler 2 4 Code Gb blto2_FSBL_lto.o
DebugMon_Handler 2 4 Code Gb blto2_FSBL_lto.o
HardFault_Handler 2 4 Code Gb blto2_FSBL_lto.o
MX_BSEC_Init 2 4 Code Lc blto2_FSBL_lto.o
MemManage_Handler 2 4 Code Gb blto2_FSBL_lto.o
NMI_Handler 2 4 Code Gb blto2_FSBL_lto.o
PendSV_Handler 2 4 Code Gb blto2_FSBL_lto.o
SVC_Handler 2 4 Code Gb blto2_FSBL_lto.o
UsageFault_Handler 2 4 Code Gb blto2_FSBL_lto.o
exit 2 4 Code Gb SEGGER_THUMB_Startup.o
ADC1_2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
ADF1_FLT0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
BCK_ECC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
CACHEAXI_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
CACHE_ECC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
CRYP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
CSI_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
CTI_INT0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
CTI_INT1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
DCMIPP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
DCMI_PSSI_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
DMA2D_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
DTS_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
ETH1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI10_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI11_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI12_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI13_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI14_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI15_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI6_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI7_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI8_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI9_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
FDCAN1_IT0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
FDCAN1_IT1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
FDCAN2_IT0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
FDCAN2_IT1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
FDCAN3_IT0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
FDCAN3_IT1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
FDCAN_CU_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
FMC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
FPU_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GFXMMU_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GFXTIM_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel10_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel11_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel12_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel13_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel14_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel15_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel6_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel7_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel8_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel9_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPU2D_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPU2D_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HASH_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel10_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel11_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel12_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel13_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel14_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel15_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel6_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel7_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel8_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel9_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
I2C1_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
I2C1_EV_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
I2C2_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
I2C2_EV_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
I2C3_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
I2C3_EV_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
I2C4_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
I2C4_EV_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
I3C1_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
I3C1_EV_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
I3C2_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
I3C2_EV_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
IAC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
ICACHE_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
IWDG_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
JPEG_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
LOCKUP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
LPTIM1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
LPTIM2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
LPTIM3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
LPTIM4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
LPTIM5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
LPUART1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
LTDC_LO_ERR_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
LTDC_LO_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
LTDC_UP_ERR_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
LTDC_UP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
MCE1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
MCE2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
MCE3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
MCE4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
MDF1_FLT0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
MDF1_FLT1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
MDF1_FLT2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
MDF1_FLT3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
MDF1_FLT4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
MDF1_FLT5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
MDIOS_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
NPU0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
NPU1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
NPU2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
NPU3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
PAHB_ERR_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
PKA_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
PVD_PVM_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
RCC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
RCC_S_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
RIFSC_TAMPER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
RNG_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
RTC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
RTC_S_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
Reset_Handler 4 Code Gb STM32N6xx_Startup.o
SAES_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SAI1_A_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SAI1_B_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SAI2_A_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SAI2_B_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SDMMC1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SDMMC2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SPDIFRX_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SPI1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SPI2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SPI3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SPI4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SPI5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SPI6_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TAMP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TCM_ECC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM10_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM11_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM12_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM13_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM14_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM15_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM16_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM17_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM18_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM1_BRK_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM1_CC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM1_TRG_CCU_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM1_UP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM6_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM7_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM8_BRK_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM8_CC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM8_TRG_CCU_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM8_UP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM9_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
UART4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
UART5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
UART7_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
UART8_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
UART9_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
UCPD1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
USART10_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
USART1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
USART2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
USART3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
USART6_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
USB1_OTG_HS_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
USB2_OTG_HS_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
VENC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
WAKEUP_PIN_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
WWDG_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
XSPI1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
XSPI2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
XSPI3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
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__aeabi_memcpy8 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__aeabi_memset 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
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stdout 0x34000780 4 4 Init Gb prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
uwTick 0x34000340 4 4 Zero Lc blto2_FSBL_lto.o
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0x3400077C uwTickPrio 4 4 Init Lc blto2_FSBL_lto.o
0x34000780 stdout 4 4 Init Gb prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34000784 stdin 4 4 Init Gb prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34000788 stderr 4 4 Init Gb prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
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sfdp_param_info 120 4 Zero Lc blto2_FSBL_lto.o
JEDEC_SCCR_Map 112 4 Zero Lc blto2_FSBL_lto.o
hxspi2 100 4 Zero Lc blto2_FSBL_lto.o
JEDEC_Basic 96 4 Zero Lc blto2_FSBL_lto.o
JEDEC_OctalDdr 32 4 Zero Lc blto2_FSBL_lto.o
JEDEC_XSPI10 24 4 Zero Lc blto2_FSBL_lto.o
__RAL_global_locale 20 4 Init Gb mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_global_locale 20 4 Init Gb mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
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JEDEC_Address4Bytes 8 4 Zero Lc blto2_FSBL_lto.o
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__SEGGER_RTL_locale_ptr 4 4 Zero Gb mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_stderr_file 4 4 Zero Lc prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_stdin_file 4 4 Zero Lc prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_stdout_file 4 4 Zero Lc prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
stderr 4 4 Init Gb prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
stdin 4 4 Init Gb prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
stdout 4 4 Init Gb prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
uwTick 4 4 Zero Lc blto2_FSBL_lto.o
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Symbol name Address Size Align Type Bd Object File
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__SEGGER_RTL_ascii_ctype_mask 0x3419442A 13 Cnst Lc mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
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__SEGGER_RTL_hex_uc 0x34194580 16 Cnst Gb prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
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Read-only data symbols by address

Address Symbol name Size Align Type Bd Object File
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0x34193D40 SFDP_BuildGenericDriver.block_erase_unit 8 2 Cnst Lc blto2_FSBL_lto.o
0x3419410F __SEGGER_RTL_c_locale_month_names 87 Cnst Gb mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34194166 __SEGGER_RTL_c_locale_am_pm_indicator 7 Cnst Gb mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x3419416D __SEGGER_RTL_c_locale_date_time_format 15 Cnst Gb mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x341942BA __SEGGER_RTL_c_locale_day_names 58 Cnst Gb mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
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0x341943AF _DoInit._aInitStr 17 Cnst Lc SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x341943C9 __SEGGER_RTL_c_locale_date_format 9 Cnst Gb mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x341943D2 __SEGGER_RTL_c_locale_time_format 9 Cnst Gb mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x341943DB __SEGGER_RTL_c_locale_abbrev_day_names 29 Cnst Gb mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x341943F8 __SEGGER_RTL_c_locale_abbrev_month_names 49 Cnst Gb mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34194429 __SEGGER_RTL_data_empty_string 1 Cnst Gb mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x3419442A __SEGGER_RTL_ascii_ctype_mask 13 Cnst Lc mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34194580 __SEGGER_RTL_hex_uc 16 Cnst Gb prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34194590 __SEGGER_RTL_hex_lc 16 Cnst Gb prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x341945A8 __SEGGER_RTL_ascii_ctype_map 128 Cnst Lc mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
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Value Symbol name Size Align Type Bd Object File
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REGION LIST

Regions by name

Name Range Size
AHB_RAM1 38000000-38003FFF 16 384
AHB_RAM2 38004000-38007FFF 16 384
AXI_RAM1 34064000-340FFFFF 638 976
AXI_RAM2 34180400-341FFFFF 523 264
AXI_RAM3 34200000-3426FFFF 458 752
AXI_RAM4 34270000-342DFFFF 458 752
AXI_RAM5 342E0000-3434FFFF 458 752
AXI_RAM6 34350000-343BFFFF 458 752
AXI_RAM7 343C0000-343FFFFF 262 144
AXI_RAM8 34400000-3441FFFF 131 072
BKP_RAM 3C000000-3C001FFF 8 192
DTCM_RAM 30000000-3001FFFF 131 072
FLASH 34180400-341FFFFF 523 264
FLEX_RAM 34000000-34063FFF 409 600
ITCM_RAM 10000000-1000FFFF 65 536
RAM 34000000-34063FFF 409 600

Analysis

AXI_RAM2: Identical to region FLASH FLASH: Identical to region AXI_RAM2 FLEX_RAM: Identical to region RAM RAM: Identical to region FLEX_RAM

BLOCK LIST

Blocks by name

Name Range Size Ordering
ctors 34194438-3419443B 4 Auto
stack 34062000-34063FFF 8 192 Auto

Blocks by address

Range Size Name Ordering
34062000-34063FFF 8 192 stack Auto
34194438-3419443B 4 ctors Auto

STACK SIZES

Functions by stack size

Function name Stack Object File

Functions without stack size information

MX_BSEC_Init HAL_RCCEx_GetPeriphCLKFreq EXTMEM_Init MX_EXTMEM_MANAGER_Init MX_GPIO_Init LL_AHB4_GRP1_EnableClock HAL_GPIO_WritePin HAL_GPIO_Init HAL_Init SystemClock_Config OTP_Config Error_Handler MX_XSPI2_Init HAL_Delay BOOT_Application HAL_PWREx_ConfigSupply HAL_PWREx_ControlVoltageScaling HAL_RCC_OscConfig HAL_RCC_GetClockConfig HAL_RCC_ClockConfig LL_APB4_GRP2_EnableClock HAL_BSEC_OTP_Read HAL_BSEC_OTP_Program assert_failed HAL_MspInit HAL_PWREx_EnableVddIO3 HAL_IncTick HAL_XSPI_Init HAL_XSPIM_Config HAL_XSPI_MspInit LL_APB4_GRP2_EnableClock.7 LL_AHB4_GRP1_EnableClock.8 HAL_PWREx_ConfigVddIORange HAL_RCCEx_PeriphCLKConfig LL_AHB5_GRP1_EnableClock HAL_NVIC_SetPriorityGrouping HAL_InitTick HAL_SYSTICK_Config HAL_NVIC_SetPriority HAL_GetTick HAL_SuspendTick HAL_BSEC_OTP_Reload __NVIC_SetPriorityGrouping __NVIC_GetPriorityGrouping NVIC_EncodePriority __NVIC_SetPriority SysTick_Config HAL_DMA_Abort LL_RCC_HSI_SetDivider LL_RCC_HSI_Enable LL_RCC_HSI_IsReady LL_RCC_GetCpuClkSource LL_RCC_GetSysClkSource LL_RCC_PLL1_GetSource LL_RCC_PLL2_GetSource LL_RCC_PLL3_GetSource LL_RCC_PLL4_GetSource LL_RCC_HSI_SetCalibTrimming LL_RCC_HSI_Disable LL_RCC_MSI_SetCalibTrimming LL_RCC_MSI_SetFrequency LL_RCC_MSI_Enable LL_RCC_MSI_IsReady LL_RCC_MSI_Disable LL_RCC_LSI_Enable LL_RCC_LSI_IsReady LL_RCC_LSI_Disable LL_RCC_LSE_IsReady RCC_PLL_IsNewConfig LL_RCC_PLL1_IsReady LL_RCC_IC1_GetSource LL_RCC_IC2_GetSource LL_RCC_IC6_GetSource LL_RCC_IC11_GetSource RCC_PLL_Config RCC_PLL_Enable LL_RCC_PLL2_IsReady LL_RCC_PLL3_IsReady LL_RCC_PLL4_IsReady RCC_PLL_Source_IsReady LL_RCC_HSE_IsReady RCC_IC_CheckPLLSources LL_RCC_IC1_Enable HAL_RCC_GetCpuClockFreq LL_RCC_PLL1_IsEnabledBypass LL_RCC_PLL2_IsEnabledBypass LL_RCC_PLL3_IsEnabledBypass LL_RCC_PLL4_IsEnabledBypass LL_RCC_HSI_GetDivider LL_RCC_IC1_GetDivider HAL_RCCEx_GetPLL1CLKFreq HAL_RCCEx_GetPLL2CLKFreq HAL_RCCEx_GetPLL3CLKFreq HAL_RCCEx_GetPLL4CLKFreq HAL_RCC_GetSysClockFreq LL_RCC_IC2_GetDivider RCC_GetSysClockFreq LL_RCC_GetRTCClockSource LL_RCC_LSE_IsReady.59 LL_RCC_SetRTC_HSEPrescaler LL_RCC_SetRTCClockSource LL_RCC_IC5_Enable.60 LL_RCC_IC10_Enable.61 LL_RCC_IC15_Enable.62 LL_RCC_IC19_Enable LL_RCC_IC20_Enable.63 LL_RCC_SetCLKPClockSource LL_RCC_IC3_Enable LL_RCC_IC4_Enable LL_RCC_CLKP_Enable LL_RCC_SetXSPIClockSource LL_RCC_SetFMCClockSource LL_RCC_SetSDMMCClockSource LL_RCC_IC7_Enable LL_RCC_IC8_Enable LL_RCC_SetADFClockSource LL_RCC_IC18_Enable LL_RCC_IC17_Enable LL_RCC_SetDCMIPPClockSource LL_RCC_IC12_Enable LL_RCC_SetETHClockSource LL_RCC_SetETHPHYInterface LL_RCC_SetETHREFRXClockSource LL_RCC_SetETHREFTXClockSource LL_RCC_IC13_Enable LL_RCC_SetFDCANClockSource LL_RCC_SetI2CClockSource LL_RCC_SetI3CClockSource LL_RCC_SetLPTIMClockSource LL_RCC_IC9_Enable LL_RCC_IC14_Enable LL_RCC_SetLPUARTClockSource LL_RCC_IC16_Enable LL_RCC_SetLTDCClockSource LL_RCC_SetMDFClockSource LL_RCC_SetPSSIClockSource LL_RCC_SetSAIClockSource LL_RCC_SetSPDIFRXClockSource LL_RCC_SetSPIClockSource LL_RCC_SetUSARTClockSource LL_RCC_SetOTGPHYClockSource LL_RCC_HSE_SelectHSEDiv2AsDiv2Clock LL_RCC_HSE_SelectHSEAsDiv2Clock LL_RCC_SetOTGPHYCKREFClockSource LL_RCC_SetTIMPrescaler LL_RCC_SetClockSource LL_RCC_GetADCClockSource LL_RCC_GetADCPrescaler LL_RCC_GetADFClockSource LL_RCC_GetCLKPClockSource LL_RCC_GetDCMIPPClockSource LL_RCC_GetETHClockSource LL_RCC_GetETHPTPClockSource LL_RCC_GetETH1PTPDivider LL_RCC_GetFDCANClockSource LL_RCC_GetFMCClockSource LL_RCC_GetI2CClockSource LL_RCC_GetI3CClockSource LL_RCC_GetLPTIMClockSource LL_RCC_GetLPUARTClockSource LL_RCC_GetLTDCClockSource LL_RCC_GetMDFClockSource LL_RCC_GetPSSIClockSource LL_RCC_GetSAIClockSource LL_RCC_GetSDMMCClockSource LL_RCC_GetSPDIFRXClockSource LL_RCC_GetSPIClockSource LL_RCC_GetTIMPrescaler LL_RCC_GetUSARTClockSource LL_RCC_HSE_IsSelectedHSEDiv2AsDiv2Clock LL_RCC_GetXSPIClockSource LL_RCC_GetClockSource RCCEx_GetADCCLKFreq RCCEx_GetADFCLKFreq RCCEx_GetCSICLKFreq RCCEx_GetCLKPCLKFreq RCCEx_GetDCMIPPCLKFreq RCCEx_GetETH1CLKFreq RCCEx_GetETH1PTPCLKFreq RCCEx_GetFDCANCLKFreq RCCEx_GetFMCCLKFreq RCCEx_GetI2CCLKFreq RCCEx_GetI3CCLKFreq RCCEx_GetLPTIMCLKFreq RCCEx_GetLPUARTCLKFreq RCCEx_GetLTDCCLKFreq RCCEx_GetMDFCLKFreq RCCEx_GetPSSICLKFreq RCCEx_GetRTCCLKFreq RCCEx_GetSAICLKFreq RCCEx_GetSDMMCCLKFreq RCCEx_GetSPDIFRXCLKFreq RCCEx_GetSPICLKFreq RCCEx_GetUSARTCLKFreq RCCEx_GetUARTCLKFreq RCCEx_GetOTGPHYCLKFreq RCCEx_GetOTGPHYCKREFCLKFreq RCCEx_GetXSPICLKFreq RCCEx_GetHCLKFreq LL_RCC_IC7_IsEnabled LL_RCC_IC7_GetDivider LL_RCC_IC7_GetSource LL_RCC_IC8_IsEnabled LL_RCC_IC8_GetDivider LL_RCC_IC8_GetSource LL_RCC_HSI_IsReady.77 LL_RCC_HSI_GetDivider.78 LL_RCC_MSI_IsReady.79 LL_RCC_IC18_IsEnabled LL_RCC_IC18_GetDivider LL_RCC_IC18_GetSource LL_RCC_CLKP_IsEnabled LL_RCC_HSE_IsReady.80 LL_RCC_IC5_IsEnabled LL_RCC_IC5_GetDivider LL_RCC_IC5_GetSource LL_RCC_IC10_IsEnabled LL_RCC_IC10_GetDivider LL_RCC_IC10_GetSource LL_RCC_IC15_IsEnabled LL_RCC_IC15_GetDivider LL_RCC_IC15_GetSource LL_RCC_IC19_IsEnabled LL_RCC_IC19_GetDivider LL_RCC_IC19_GetSource LL_RCC_IC20_IsEnabled LL_RCC_IC20_GetDivider LL_RCC_IC20_GetSource RCCEx_GetPCLK5Freq LL_RCC_IC17_IsEnabled LL_RCC_IC17_GetDivider LL_RCC_IC17_GetSource LL_RCC_IC12_IsEnabled LL_RCC_IC12_GetDivider LL_RCC_IC12_GetSource LL_RCC_IC13_IsEnabled LL_RCC_IC13_GetDivider LL_RCC_IC13_GetSource RCCEx_GetPCLK1Freq LL_RCC_IC3_IsEnabled LL_RCC_IC3_GetDivider LL_RCC_IC3_GetSource LL_RCC_IC4_IsEnabled LL_RCC_IC4_GetDivider LL_RCC_IC4_GetSource RCCEx_GetPCLK4Freq LL_RCC_LSI_IsReady.94 LL_RCC_IC9_IsEnabled LL_RCC_IC9_GetDivider LL_RCC_IC9_GetSource LL_RCC_IC14_IsEnabled LL_RCC_IC14_GetDivider LL_RCC_IC14_GetSource LL_RCC_IC16_IsEnabled LL_RCC_IC16_GetDivider LL_RCC_IC16_GetSource RCCEx_GetPCLK2Freq LL_RCC_GetUARTClockSource LL_RCC_GetUSBClockSource LL_RCC_GetAHBPrescaler.90 LL_RCC_PLL1_IsReady.87 LL_RCC_PLL1P_IsEnabled LL_RCC_PLL1_GetSource.88 RCCEx_GetPLLSourceFreq LL_RCC_PLL1_GetM LL_RCC_PLL1_GetN LL_RCC_PLL1_GetFRACN LL_RCC_PLL1_GetP1 LL_RCC_PLL1_GetP2 RCCEx_CalcPLLFreq LL_RCC_PLL1_IsEnabledBypass.89 LL_RCC_PLL2_IsReady.84 LL_RCC_PLL2P_IsEnabled LL_RCC_PLL2_GetSource.85 LL_RCC_PLL2_GetM LL_RCC_PLL2_GetN LL_RCC_PLL2_GetFRACN LL_RCC_PLL2_GetP1 LL_RCC_PLL2_GetP2 LL_RCC_PLL2_IsEnabledBypass.86 LL_RCC_PLL3_IsReady.81 LL_RCC_PLL3P_IsEnabled LL_RCC_PLL3_GetSource.82 LL_RCC_PLL3_GetM LL_RCC_PLL3_GetN LL_RCC_PLL3_GetFRACN LL_RCC_PLL3_GetP1 LL_RCC_PLL3_GetP2 LL_RCC_PLL3_IsEnabledBypass.83 LL_RCC_PLL4_IsReady.74 LL_RCC_PLL4P_IsEnabled LL_RCC_PLL4_GetSource.75 LL_RCC_PLL4_GetM LL_RCC_PLL4_GetN LL_RCC_PLL4_GetFRACN LL_RCC_PLL4_GetP1 LL_RCC_PLL4_GetP2 LL_RCC_PLL4_IsEnabledBypass.76 LL_RCC_MSI_GetFrequency LL_RCC_GetAPB1Prescaler.92 LL_RCC_GetAPB2Prescaler.91 LL_RCC_GetAPB4Prescaler.93 LL_RCC_GetAPB5Prescaler.95 HAL_XSPI_SetTimeout XSPI_WaitFlagStateUntilTimeout HAL_XSPI_Command XSPI_ConfigCmd HAL_XSPI_Transmit HAL_XSPI_Receive HAL_XSPI_AutoPolling HAL_XSPI_MemoryMapped HAL_XSPI_Abort XSPIM_GetConfig LL_AHB5_GRP1_IsEnabledClock MapMemory JumpToApplication EXTMEM_MemoryMappedMode EXTMEM_DeInit EXTMEM_GetMapAddress SFDP_ReadHeader SAL_XSPI_GetSFDP CheckSFDP_Signature SAL_XSPI_UpdateMemoryType SFDP_GetHeader SAL_XSPI_MemoryConfig SFDP_CollectData sfdp_get_paraminfo SFDP_MemoryReset SAL_XSPI_CommandSendData SFDP_BuildGenericDriver JEDEC_Basic_Manage4S4S4SEnableSequence JEDEC_Basic_ManageQuadEnableRequirement sfdp_enter_octal_mode driver_check_FlagBUSY SAL_XSPI_CheckStatusRegister sfdp_getfrequencevalue SAL_XSPI_SetClock sfdp_set_dummycycle SAL_XSPI_SendReadCommand SAL_XSPI_Abort SAL_XSPI_CommandSendReadAddress SAL_XSPI_Write EXTMEM_DRIVER_NOR_SFDP_Init SAL_XSPI_Init SAL_XSPI_DisableMapMode SAL_XSPI_GetId EXTMEM_DRIVER_NOR_SFDP_DeInit EXTMEM_DRIVER_NOR_SFDP_Enable_MemoryMappedMode EXTMEM_DRIVER_NOR_SFDP_Disable_MemoryMappedMode SAL_XSPI_EnableMapMode XSPI_FormatCommand XSPI_Transmit main NMI_Handler HardFault_Handler MemManage_Handler BusFault_Handler UsageFault_Handler SVC_Handler DebugMon_Handler PendSV_Handler SysTick_Handler SystemInit SystemCoreClockUpdate _start __SEGGER_init_done __startup_complete exit PVD_PVM_IRQHandler DTS_IRQHandler RCC_IRQHandler LOCKUP_IRQHandler CACHE_ECC_IRQHandler TCM_ECC_IRQHandler BCK_ECC_IRQHandler FPU_IRQHandler RTC_S_IRQHandler TAMP_IRQHandler RIFSC_TAMPER_IRQHandler IAC_IRQHandler RCC_S_IRQHandler RTC_IRQHandler IWDG_IRQHandler WWDG_IRQHandler EXTI0_IRQHandler EXTI1_IRQHandler EXTI2_IRQHandler EXTI3_IRQHandler EXTI4_IRQHandler EXTI5_IRQHandler EXTI6_IRQHandler EXTI7_IRQHandler EXTI8_IRQHandler EXTI9_IRQHandler EXTI10_IRQHandler EXTI11_IRQHandler EXTI12_IRQHandler EXTI13_IRQHandler EXTI14_IRQHandler EXTI15_IRQHandler SAES_IRQHandler CRYP_IRQHandler PKA_IRQHandler HASH_IRQHandler RNG_IRQHandler MCE1_IRQHandler MCE2_IRQHandler MCE3_IRQHandler MCE4_IRQHandler ADC1_2_IRQHandler CSI_IRQHandler DCMIPP_IRQHandler PAHB_ERR_IRQHandler NPU0_IRQHandler NPU1_IRQHandler NPU2_IRQHandler NPU3_IRQHandler CACHEAXI_IRQHandler LTDC_LO_IRQHandler LTDC_LO_ERR_IRQHandler DMA2D_IRQHandler JPEG_IRQHandler VENC_IRQHandler GFXMMU_IRQHandler GFXTIM_IRQHandler GPU2D_IRQHandler GPU2D_ER_IRQHandler ICACHE_IRQHandler HPDMA1_Channel0_IRQHandler HPDMA1_Channel1_IRQHandler HPDMA1_Channel2_IRQHandler HPDMA1_Channel3_IRQHandler HPDMA1_Channel4_IRQHandler HPDMA1_Channel5_IRQHandler HPDMA1_Channel6_IRQHandler HPDMA1_Channel7_IRQHandler HPDMA1_Channel8_IRQHandler HPDMA1_Channel9_IRQHandler HPDMA1_Channel10_IRQHandler HPDMA1_Channel11_IRQHandler HPDMA1_Channel12_IRQHandler HPDMA1_Channel13_IRQHandler HPDMA1_Channel14_IRQHandler HPDMA1_Channel15_IRQHandler GPDMA1_Channel0_IRQHandler GPDMA1_Channel1_IRQHandler GPDMA1_Channel2_IRQHandler GPDMA1_Channel3_IRQHandler GPDMA1_Channel4_IRQHandler GPDMA1_Channel5_IRQHandler GPDMA1_Channel6_IRQHandler GPDMA1_Channel7_IRQHandler GPDMA1_Channel8_IRQHandler GPDMA1_Channel9_IRQHandler GPDMA1_Channel10_IRQHandler GPDMA1_Channel11_IRQHandler GPDMA1_Channel12_IRQHandler GPDMA1_Channel13_IRQHandler GPDMA1_Channel14_IRQHandler GPDMA1_Channel15_IRQHandler I2C1_EV_IRQHandler I2C1_ER_IRQHandler I2C2_EV_IRQHandler I2C2_ER_IRQHandler I2C3_EV_IRQHandler I2C3_ER_IRQHandler I2C4_EV_IRQHandler I2C4_ER_IRQHandler I3C1_EV_IRQHandler I3C1_ER_IRQHandler I3C2_EV_IRQHandler I3C2_ER_IRQHandler TIM1_BRK_IRQHandler TIM1_UP_IRQHandler TIM1_TRG_CCU_IRQHandler TIM1_CC_IRQHandler TIM2_IRQHandler TIM3_IRQHandler TIM4_IRQHandler TIM5_IRQHandler TIM6_IRQHandler TIM7_IRQHandler TIM8_BRK_IRQHandler TIM8_UP_IRQHandler TIM8_TRG_CCU_IRQHandler TIM8_CC_IRQHandler TIM9_IRQHandler TIM10_IRQHandler TIM11_IRQHandler TIM12_IRQHandler TIM13_IRQHandler TIM14_IRQHandler TIM15_IRQHandler TIM16_IRQHandler TIM17_IRQHandler TIM18_IRQHandler LPTIM1_IRQHandler LPTIM2_IRQHandler LPTIM3_IRQHandler LPTIM4_IRQHandler LPTIM5_IRQHandler ADF1_FLT0_IRQHandler MDF1_FLT0_IRQHandler MDF1_FLT1_IRQHandler MDF1_FLT2_IRQHandler MDF1_FLT3_IRQHandler MDF1_FLT4_IRQHandler MDF1_FLT5_IRQHandler SAI1_A_IRQHandler SAI1_B_IRQHandler SAI2_A_IRQHandler SAI2_B_IRQHandler SPDIFRX_IRQHandler SPI1_IRQHandler SPI2_IRQHandler SPI3_IRQHandler SPI4_IRQHandler SPI5_IRQHandler SPI6_IRQHandler USART1_IRQHandler USART2_IRQHandler USART3_IRQHandler UART4_IRQHandler UART5_IRQHandler USART6_IRQHandler UART7_IRQHandler UART8_IRQHandler UART9_IRQHandler USART10_IRQHandler LPUART1_IRQHandler XSPI1_IRQHandler XSPI2_IRQHandler XSPI3_IRQHandler FMC_IRQHandler SDMMC1_IRQHandler SDMMC2_IRQHandler UCPD1_IRQHandler USB1_OTG_HS_IRQHandler USB2_OTG_HS_IRQHandler ETH1_IRQHandler FDCAN1_IT0_IRQHandler FDCAN1_IT1_IRQHandler FDCAN2_IT0_IRQHandler FDCAN2_IT1_IRQHandler FDCAN3_IT0_IRQHandler FDCAN3_IT1_IRQHandler FDCAN_CU_IRQHandler MDIOS_IRQHandler DCMI_PSSI_IRQHandler WAKEUP_PIN_IRQHandler CTI_INT0_IRQHandler CTI_INT1_IRQHandler LTDC_UP_IRQHandler LTDC_UP_ERR_IRQHandler reset_handler Reset_Handler fwrite ldexpf __SEGGER_RTL_float32_isnan __SEGGER_RTL_float32_isinf __SEGGER_RTL_float32_isnormal __SEGGER_RTL_float32_signbit frexpf fmodf floorf abs __SEGGER_RTL_pow10f __aeabi_f2ulz __aeabi_ul2f __aeabi_uldivmod __SEGGER_RTL_stream_write __SEGGER_RTL_putc __SEGGER_RTL_prin_flush __SEGGER_RTL_print_padding __SEGGER_RTL_pre_padding vfprintf vfprintf_l printf __SEGGER_RTL_vfprintf_short_float_long_long __SEGGER_init_zero __SEGGER_init_copy __SEGGER_init_ctors __SEGGER_RTL_X_file_stat __SEGGER_RTL_X_file_bufsize __SEGGER_RTL_X_file_write _DoInit _GetAvailWriteSpace _WriteNoCheck _WriteBlocking SEGGER_RTT_WriteNoLock SEGGER_RTT_Write strlen strnlen memcpy __aeabi_memcpy __aeabi_memcpy4 __aeabi_memcpy8 __aeabi_memclr __aeabi_memclr8 __aeabi_memclr4 __aeabi_memset8 __aeabi_memset4 __aeabi_memset memset __SEGGER_RTL_ascii_isctype __SEGGER_RTL_ascii_toupper __SEGGER_RTL_ascii_tolower __SEGGER_RTL_ascii_iswctype __SEGGER_RTL_ascii_towupper __SEGGER_RTL_ascii_towlower __SEGGER_RTL_current_locale __SEGGER_RTL_ascii_mbtowc __SEGGER_RTL_ascii_wctomb __SEGGER_RTL_vfprintf

UNUSED INPUTS

Unused object files

No unused object files

ABSOLUTE LISTING

Section .bss.extmem_list_config from blto2_FSBL_lto.o, size=172, align=4


extmem_list_config: 0x34000000: 01 DC.B 0x01 ; '\x01' 0x34000001: 11 DC.B 0x11 ; '\x11' 0x34000002: 01 DC.B 0x01 ; '\x01' 0x34000003: 25 DC.B 0x25 ; '%' 0x34000004: 0E DC.B 0x0E ; '\x0E' 0x34000005: 13 DC.B 0x13 ; '\x13' 0x34000006: 05 DC.B 0x05 ; '\x05' 0x34000007: 03 DC.B 0x03 ; '\x03' 0x34000008: 0E DC.B 0x0E ; '\x0E' 0x34000009: 10 DC.B 0x10 ; '\x10' 0x3400000A: 17 DC.B 0x17 ; '\x17' 0x3400000B: B4 DC.B 0xB4 ; '\xB4' 0x3400000C: 42 DC.B 0x42 ; 'B' 0x3400000D: 19 DC.B 0x19 ; '\x19' 0x3400000E: 11 DC.B 0x11 ; '\x11' 0x3400000F: 01 DC.B 0x01 ; '\x01' 0x34000010: 12 DC.B 0x12 ; '\x12' 0x34000011: 06 DC.B 0x06 ; '\x06' 0x34000012: 43 DC.B 0x43 ; 'C' 0x34000013: 17 DC.B 0x17 ; '\x17' 0x34000014: 00 DC.B 0x00 ; '\0' 0x34000015: 00 DC.B 0x00 ; '\0' 0x34000016: 02 DC.B 0x02 ; '\x02' 0x34000017: 2E DC.B 0x2E ; '.' 0x34000018: 00 DC.B 0x00 ; '\0' 0x34000019: 11 DC.B 0x11 ; '\x11' 0x3400001A: 01 DC.B 0x01 ; '\x01' 0x3400001B: 12 DC.B 0x12 ; '\x12' 0x3400001C: 06 DC.B 0x06 ; '\x06' 0x3400001D: 40 DC.B 0x40 ; '@' 0x3400001E: 18 DC.B 0x18 ; '\x18' 0x3400001F: 03 DC.B 0x03 ; '\x03' 0x34000020: 0E DC.B 0x0E ; '\x0E' 0x34000021: 3A DC.B 0x3A ; ':' 0x34000022: 0B DC.B 0x0B ; '\v' 0x34000023: 3B DC.B 0x3B ; ';' 0x34000024: 0B DC.B 0x0B ; '\v' 0x34000025: 27 DC.B 0x27 ; ''' 0x34000026: 19 DC.B 0x19 ; '\x19' 0x34000027: 3F DC.B 0x3F ; '?' 0x34000028: 19 DC.B 0x19 ; '\x19' 0x34000029: 00 DC.B 0x00 ; '\0' 0x3400002A: 00 DC.B 0x00 ; '\0' 0x3400002B: 03 DC.B 0x03 ; '\x03' 0x3400002C: 04 DC.B 0x04 ; '\x04' 0x3400002D: 01 DC.B 0x01 ; '\x01' 0x3400002E: 49 DC.B 0x49 ; 'I' 0x3400002F: 13 DC.B 0x13 ; '\x13' 0x34000030: 0B DC.B 0x0B ; '\v' 0x34000031: 0B DC.B 0x0B ; '\v' 0x34000032: 3A DC.B 0x3A ; ':' 0x34000033: 0B DC.B 0x0B ; '\v' 0x34000034: 3B DC.B 0x3B ; ';' 0x34000035: 0B DC.B 0x0B ; '\v' 0x34000036: 00 DC.B 0x00 ; '\0' 0x34000037: 00 DC.B 0x00 ; '\0' 0x34000038: 04 DC.B 0x04 ; '\x04' 0x34000039: 28 DC.B 0x28 ; '(' 0x3400003A: 00 DC.B 0x00 ; '\0' 0x3400003B: 03 DC.B 0x03 ; '\x03' 0x3400003C: 0E DC.B 0x0E ; '\x0E' 0x3400003D: 1C DC.B 0x1C ; '\x1C' 0x3400003E: 0F DC.B 0x0F ; '\x0F' 0x3400003F: 00 DC.B 0x00 ; '\0' 0x34000040: 00 DC.B 0x00 ; '\0' 0x34000041: 05 DC.B 0x05 ; '\x05' 0x34000042: 24 DC.B 0x24 ; '$' 0x34000043: 00 DC.B 0x00 ; '\0' 0x34000044: 03 DC.B 0x03 ; '\x03' 0x34000045: 0E DC.B 0x0E ; '\x0E' 0x34000046: 3E DC.B 0x3E ; '>' 0x34000047: 0B DC.B 0x0B ; '\v' 0x34000048: 0B DC.B 0x0B ; '\v' 0x34000049: 0B DC.B 0x0B ; '\v' 0x3400004A: 00 DC.B 0x00 ; '\0' 0x3400004B: 00 DC.B 0x00 ; '\0' 0x3400004C: 06 DC.B 0x06 ; '\x06' 0x3400004D: 04 DC.B 0x04 ; '\x04' 0x3400004E: 01 DC.B 0x01 ; '\x01' 0x3400004F: 49 DC.B 0x49 ; 'I' 0x34000050: 10 DC.B 0x10 ; '\x10' 0x34000051: 0B DC.B 0x0B ; '\v' 0x34000052: 0B DC.B 0x0B ; '\v' 0x34000053: 3A DC.B 0x3A ; ':' 0x34000054: 0B DC.B 0x0B ; '\v' 0x34000055: 3B DC.B 0x3B ; ';' 0x34000056: 0B DC.B 0x0B ; '\v' 0x34000057: 00 DC.B 0x00 ; '\0' 0x34000058: 00 DC.B 0x00 ; '\0' 0x34000059: 07 DC.B 0x07 ; '\x07' 0x3400005A: 0F DC.B 0x0F ; '\x0F' 0x3400005B: 00 DC.B 0x00 ; '\0' 0x3400005C: 00 DC.B 0x00 ; '\0' 0x3400005D: 00 DC.B 0x00 ; '\0' 0x3400005E: 08 DC.B 0x08 ; '\b' 0x3400005F: 11 DC.B 0x11 ; '\x11' 0x34000060: 01 DC.B 0x01 ; '\x01' 0x34000061: 25 DC.B 0x25 ; '%' 0x34000062: 0E DC.B 0x0E ; '\x0E' 0x34000063: 13 DC.B 0x13 ; '\x13' 0x34000064: 05 DC.B 0x05 ; '\x05' 0x34000065: 03 DC.B 0x03 ; '\x03' 0x34000066: 0E DC.B 0x0E ; '\x0E' 0x34000067: 10 DC.B 0x10 ; '\x10' 0x34000068: 17 DC.B 0x17 ; '\x17' 0x34000069: B4 DC.B 0xB4 ; '\xB4' 0x3400006A: 42 DC.B 0x42 ; 'B' 0x3400006B: 19 DC.B 0x19 ; '\x19' 0x3400006C: 11 DC.B 0x11 ; '\x11' 0x3400006D: 01 DC.B 0x01 ; '\x01' 0x3400006E: 55 DC.B 0x55 ; 'U' 0x3400006F: 17 DC.B 0x17 ; '\x17' 0x34000070: 43 DC.B 0x43 ; 'C' 0x34000071: 17 DC.B 0x17 ; '\x17' 0x34000072: 00 DC.B 0x00 ; '\0' 0x34000073: 00 DC.B 0x00 ; '\0' 0x34000074: 09 DC.B 0x09 ; '\t' 0x34000075: 0F DC.B 0x0F ; '\x0F' 0x34000076: 00 DC.B 0x00 ; '\0' 0x34000077: 49 DC.B 0x49 ; 'I' 0x34000078: 13 DC.B 0x13 ; '\x13' 0x34000079: 00 DC.B 0x00 ; '\0' 0x3400007A: 00 DC.B 0x00 ; '\0' 0x3400007B: 0A DC.B 0x0A ; '\n' 0x3400007C: 16 DC.B 0x16 ; '\x16' 0x3400007D: 00 DC.B 0x00 ; '\0' 0x3400007E: 49 DC.B 0x49 ; 'I' 0x3400007F: 13 DC.B 0x13 ; '\x13' 0x34000080: 03 DC.B 0x03 ; '\x03' 0x34000081: 0E DC.B 0x0E ; '\x0E' 0x34000082: 3A DC.B 0x3A ; ':' 0x34000083: 0B DC.B 0x0B ; '\v' 0x34000084: 3B DC.B 0x3B ; ';' 0x34000085: 05 DC.B 0x05 ; '\x05' 0x34000086: 00 DC.B 0x00 ; '\0' 0x34000087: 00 DC.B 0x00 ; '\0' 0x34000088: 0B DC.B 0x0B ; '\v' 0x34000089: 13 DC.B 0x13 ; '\x13' 0x3400008A: 01 DC.B 0x01 ; '\x01' 0x3400008B: 0B DC.B 0x0B ; '\v' 0x3400008C: 0B DC.B 0x0B ; '\v' 0x3400008D: 3A DC.B 0x3A ; ':' 0x3400008E: 0B DC.B 0x0B ; '\v' 0x3400008F: 3B DC.B 0x3B ; ';' 0x34000090: 05 DC.B 0x05 ; '\x05' 0x34000091: 00 DC.B 0x00 ; '\0' 0x34000092: 00 DC.B 0x00 ; '\0' 0x34000093: 0C DC.B 0x0C ; '\x0C' 0x34000094: 0D DC.B 0x0D ; '\r' 0x34000095: 00 DC.B 0x00 ; '\0' 0x34000096: 03 DC.B 0x03 ; '\x03' 0x34000097: 0E DC.B 0x0E ; '\x0E' 0x34000098: 49 DC.B 0x49 ; 'I' 0x34000099: 13 DC.B 0x13 ; '\x13' 0x3400009A: 3A DC.B 0x3A ; ':' 0x3400009B: 0B DC.B 0x0B ; '\v' 0x3400009C: 3B DC.B 0x3B ; ';' 0x3400009D: 05 DC.B 0x05 ; '\x05' 0x3400009E: 38 DC.B 0x38 ; '8' 0x3400009F: 0B DC.B 0x0B ; '\v' 0x340000A0: 00 DC.B 0x00 ; '\0' 0x340000A1: 00 DC.B 0x00 ; '\0' 0x340000A2: 0D DC.B 0x0D ; '\r' 0x340000A3: 35 DC.B 0x35 ; '5' 0x340000A4: 00 DC.B 0x00 ; '\0' 0x340000A5: 49 DC.B 0x49 ; 'I' 0x340000A6: 13 DC.B 0x13 ; '\x13' 0x340000A7: 00 DC.B 0x00 ; '\0' 0x340000A8: 00 DC.B 0x00 ; '\0' 0x340000A9: 0E DC.B 0x0E ; '\x0E' 0x340000AA: 01 DC.B 0x01 ; '\x01' 0x340000AB: 01 DC.B 0x01 ; '\x01'

Section .bss.libc._SEGGER_RTT from SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=168, align=4


_SEGGER_RTT: 0x340000AC: 30 DC.B 0x30 ; '0' 0x340000AD: 31 DC.B 0x31 ; '1' 0x340000AE: 32 DC.B 0x32 ; '2' 0x340000AF: 33 DC.B 0x33 ; '3' 0x340000B0: 34 DC.B 0x34 ; '4' 0x340000B1: 35 DC.B 0x35 ; '5' 0x340000B2: 36 DC.B 0x36 ; '6' 0x340000B3: 37 DC.B 0x37 ; '7' 0x340000B4: 38 DC.B 0x38 ; '8' 0x340000B5: 39 DC.B 0x39 ; '9' 0x340000B6: 41 DC.B 0x41 ; 'A' 0x340000B7: 42 DC.B 0x42 ; 'B' 0x340000B8: 43 DC.B 0x43 ; 'C' 0x340000B9: 44 DC.B 0x44 ; 'D' 0x340000BA: 45 DC.B 0x45 ; 'E' 0x340000BB: 46 DC.B 0x46 ; 'F' 0x340000BC: 00 DC.B 0x00 ; '\0' 0x340000BD: 00 DC.B 0x00 ; '\0' 0x340000BE: 00 DC.B 0x00 ; '\0' 0x340000BF: 00 DC.B 0x00 ; '\0' 0x340000C0: 00 DC.B 0x00 ; '\0' 0x340000C1: 00 DC.B 0x00 ; '\0' 0x340000C2: 54 DC.B 0x54 ; 'T' 0x340000C3: 54 DC.B 0x54 ; 'T' 0x340000C4: 52 DC.B 0x52 ; 'R' 0x340000C5: 20 DC.B 0x20 ; ' ' 0x340000C6: 52 DC.B 0x52 ; 'R' 0x340000C7: 45 DC.B 0x45 ; 'E' 0x340000C8: 47 DC.B 0x47 ; 'G' 0x340000C9: 47 DC.B 0x47 ; 'G' 0x340000CA: 45 DC.B 0x45 ; 'E' 0x340000CB: 53 DC.B 0x53 ; 'S' 0x340000CC: 00 DC.B 0x00 ; '\0' 0x340000CD: 54 DC.B 0x54 ; 'T' 0x340000CE: 65 DC.B 0x65 ; 'e' 0x340000CF: 72 DC.B 0x72 ; 'r' 0x340000D0: 6D DC.B 0x6D ; 'm' 0x340000D1: 69 DC.B 0x69 ; 'i' 0x340000D2: 6E DC.B 0x6E ; 'n' 0x340000D3: 61 DC.B 0x61 ; 'a' 0x340000D4: 6C DC.B 0x6C ; 'l' 0x340000D5: 00 DC.B 0x00 ; '\0' 0x340000D6: 00 DC.B 0x00 ; '\0' 0x340000D7: 53 DC.B 0x53 ; 'S' 0x340000D8: 45 DC.B 0x45 ; 'E' 0x340000D9: 47 DC.B 0x47 ; 'G' 0x340000DA: 47 DC.B 0x47 ; 'G' 0x340000DB: 45 DC.B 0x45 ; 'E' 0x340000DC: 52 DC.B 0x52 ; 'R' 0x340000DD: 20 DC.B 0x20 ; ' ' 0x340000DE: 43 DC.B 0x43 ; 'C' 0x340000DF: 2F DC.B 0x2F ; '/' 0x340000E0: 43 DC.B 0x43 ; 'C' 0x340000E1: 2B DC.B 0x2B ; '+' 0x340000E2: 2B DC.B 0x2B ; '+' 0x340000E3: 20 DC.B 0x20 ; ' ' 0x340000E4: 63 DC.B 0x63 ; 'c' 0x340000E5: 6F DC.B 0x6F ; 'o' 0x340000E6: 6D DC.B 0x6D ; 'm' 0x340000E7: 70 DC.B 0x70 ; 'p' 0x340000E8: 69 DC.B 0x69 ; 'i' 0x340000E9: 6C DC.B 0x6C ; 'l' 0x340000EA: 65 DC.B 0x65 ; 'e' 0x340000EB: 72 DC.B 0x72 ; 'r' 0x340000EC: 20 DC.B 0x20 ; ' ' 0x340000ED: 76 DC.B 0x76 ; 'v' 0x340000EE: 65 DC.B 0x65 ; 'e' 0x340000EF: 72 DC.B 0x72 ; 'r' 0x340000F0: 73 DC.B 0x73 ; 's' 0x340000F1: 69 DC.B 0x69 ; 'i' 0x340000F2: 6F DC.B 0x6F ; 'o' 0x340000F3: 6E DC.B 0x6E ; 'n' 0x340000F4: 20 DC.B 0x20 ; ' ' 0x340000F5: 32 DC.B 0x32 ; '2' 0x340000F6: 32 DC.B 0x32 ; '2' 0x340000F7: 2E DC.B 0x2E ; '.' 0x340000F8: 31 DC.B 0x31 ; '1' 0x340000F9: 2E DC.B 0x2E ; '.' 0x340000FA: 32 DC.B 0x32 ; '2' 0x340000FB: 20 DC.B 0x20 ; ' ' 0x340000FC: 28 DC.B 0x28 ; '(' 0x340000FD: 62 DC.B 0x62 ; 'b' 0x340000FE: 61 DC.B 0x61 ; 'a' 0x340000FF: 73 DC.B 0x73 ; 's' 0x34000100: 65 DC.B 0x65 ; 'e' 0x34000101: 64 DC.B 0x64 ; 'd' 0x34000102: 20 DC.B 0x20 ; ' ' 0x34000103: 6F DC.B 0x6F ; 'o' 0x34000104: 6E DC.B 0x6E ; 'n' 0x34000105: 20 DC.B 0x20 ; ' ' 0x34000106: 63 DC.B 0x63 ; 'c' 0x34000107: 6C DC.B 0x6C ; 'l' 0x34000108: 61 DC.B 0x61 ; 'a' 0x34000109: 6E DC.B 0x6E ; 'n' 0x3400010A: 67 DC.B 0x67 ; 'g' 0x3400010B: 20 DC.B 0x20 ; ' ' 0x3400010C: 32 DC.B 0x32 ; '2' 0x3400010D: 32 DC.B 0x32 ; '2' 0x3400010E: 2E DC.B 0x2E ; '.' 0x3400010F: 31 DC.B 0x31 ; '1' 0x34000110: 2E DC.B 0x2E ; '.' 0x34000111: 38 DC.B 0x38 ; '8' 0x34000112: 29 DC.B 0x29 ; ')' 0x34000113: 00 DC.B 0x00 ; '\0' 0x34000114: 41 DC.B 0x41 ; 'A' 0x34000115: 3B DC.B 0x3B ; ';' 0x34000116: 00 DC.B 0x00 ; '\0' 0x34000117: 00 DC.B 0x00 ; '\0' 0x34000118: 00 DC.B 0x00 ; '\0' 0x34000119: 61 DC.B 0x61 ; 'a' 0x3400011A: 65 DC.B 0x65 ; 'e' 0x3400011B: 61 DC.B 0x61 ; 'a' 0x3400011C: 62 DC.B 0x62 ; 'b' 0x3400011D: 69 DC.B 0x69 ; 'i' 0x3400011E: 00 DC.B 0x00 ; '\0' 0x3400011F: 01 DC.B 0x01 ; '\x01' 0x34000120: 31 DC.B 0x31 ; '1' 0x34000121: 00 DC.B 0x00 ; '\0' 0x34000122: 00 DC.B 0x00 ; '\0' 0x34000123: 00 DC.B 0x00 ; '\0' 0x34000124: 43 DC.B 0x43 ; 'C' 0x34000125: 32 DC.B 0x32 ; '2' 0x34000126: 2E DC.B 0x2E ; '.' 0x34000127: 30 DC.B 0x30 ; '0' 0x34000128: 39 DC.B 0x39 ; '9' 0x34000129: 00 DC.B 0x00 ; '\0' 0x3400012A: 06 DC.B 0x06 ; '\x06' 0x3400012B: 15 DC.B 0x15 ; '\x15' 0x3400012C: 07 DC.B 0x07 ; '\x07' 0x3400012D: 4D DC.B 0x4D ; 'M' 0x3400012E: 08 DC.B 0x08 ; '\b' 0x3400012F: 00 DC.B 0x00 ; '\0' 0x34000130: 09 DC.B 0x09 ; '\t' 0x34000131: 03 DC.B 0x03 ; '\x03' 0x34000132: 0A DC.B 0x0A ; '\n' 0x34000133: 08 DC.B 0x08 ; '\b' 0x34000134: 0E DC.B 0x0E ; '\x0E' 0x34000135: 00 DC.B 0x00 ; '\0' 0x34000136: 11 DC.B 0x11 ; '\x11' 0x34000137: 01 DC.B 0x01 ; '\x01' 0x34000138: 12 DC.B 0x12 ; '\x12' 0x34000139: 04 DC.B 0x04 ; '\x04' 0x3400013A: 14 DC.B 0x14 ; '\x14' 0x3400013B: 01 DC.B 0x01 ; '\x01' 0x3400013C: 15 DC.B 0x15 ; '\x15' 0x3400013D: 00 DC.B 0x00 ; '\0' 0x3400013E: 17 DC.B 0x17 ; '\x17' 0x3400013F: 03 DC.B 0x03 ; '\x03' 0x34000140: 18 DC.B 0x18 ; '\x18' 0x34000141: 01 DC.B 0x01 ; '\x01' 0x34000142: 19 DC.B 0x19 ; '\x19' 0x34000143: 01 DC.B 0x01 ; '\x01' 0x34000144: 1A DC.B 0x1A ; '\x1A' 0x34000145: 01 DC.B 0x01 ; '\x01' 0x34000146: 1C DC.B 0x1C ; '\x1C' 0x34000147: 01 DC.B 0x01 ; '\x01' 0x34000148: 1E DC.B 0x1E ; '\x1E' 0x34000149: 03 DC.B 0x03 ; '\x03' 0x3400014A: 22 DC.B 0x22 ; '\"' 0x3400014B: 00 DC.B 0x00 ; '\0' 0x3400014C: 24 DC.B 0x24 ; '$' 0x3400014D: 01 DC.B 0x01 ; '\x01' 0x3400014E: 26 DC.B 0x26 ; '&' 0x3400014F: 01 DC.B 0x01 ; '\x01' 0x34000150: 10 DC.B 0x10 ; '\x10' 0x34000151: 00 DC.B 0x00 ; '\0' 0x34000152: 00 DC.B 0x00 ; '\0' 0x34000153: 00 DC.B 0x00 ; '\0'

Section .bss.sfdp_param_info from blto2_FSBL_lto.o, size=120, align=4


sfdp_param_info: 0x34000154: 10 DC.B 0x10 ; '\x10' 0x34000155: 00 DC.B 0x00 ; '\0' 0x34000156: 00 DC.B 0x00 ; '\0' 0x34000157: 01 DC.B 0x01 ; '\x01' 0x34000158: A0 DC.B 0xA0 ; '\xA0' 0x34000159: 0F DC.B 0x0F ; '\x0F' 0x3400015A: 00 DC.B 0x00 ; '\0' 0x3400015B: FA DC.B 0xFA ; '\xFA' 0x3400015C: 10 DC.B 0x10 ; '\x10' 0x3400015D: 00 DC.B 0x00 ; '\0' 0x3400015E: 00 DC.B 0x00 ; '\0' 0x3400015F: 00 DC.B 0x00 ; '\0' 0x34000160: 00 DC.B 0x00 ; '\0' 0x34000161: 01 DC.B 0x01 ; '\x01' 0x34000162: 00 DC.B 0x00 ; '\0' 0x34000163: 00 DC.B 0x00 ; '\0' 0x34000164: A0 DC.B 0xA0 ; '\xA0' 0x34000165: 0F DC.B 0x0F ; '\x0F' 0x34000166: 00 DC.B 0x00 ; '\0' 0x34000167: 00 DC.B 0x00 ; '\0' 0x34000168: 00 DC.B 0x00 ; '\0' 0x34000169: FA DC.B 0xFA ; '\xFA' 0x3400016A: 00 DC.B 0x00 ; '\0' 0x3400016B: 00 DC.B 0x00 ; '\0' 0x3400016C: 00 DC.B 0x00 ; '\0' 0x3400016D: 00 DC.B 0x00 ; '\0' 0x3400016E: 21 DC.B 0x21 ; '!' 0x3400016F: 00 DC.B 0x00 ; '\0' 0x34000170: 32 DC.B 0x32 ; '2' 0x34000171: 00 DC.B 0x00 ; '\0' 0x34000172: 42 DC.B 0x42 ; 'B' 0x34000173: 00 DC.B 0x00 ; '\0' 0x34000174: 50 DC.B 0x50 ; 'P' 0x34000175: 00 DC.B 0x00 ; '\0' 0x34000176: 64 DC.B 0x64 ; 'd' 0x34000177: 00 DC.B 0x00 ; '\0' 0x34000178: 85 DC.B 0x85 ; '\x85' 0x34000179: 00 DC.B 0x00 ; '\0' 0x3400017A: A6 DC.B 0xA6 ; '\xA6' 0x3400017B: 00 DC.B 0x00 ; '\0' 0x3400017C: C8 DC.B 0xC8 ; '\xC8' 0x3400017D: 00 DC.B 0x00 ; '\0' 0x3400017E: FA DC.B 0xFA ; '\xFA' 0x3400017F: 00 DC.B 0x00 ; '\0' 0x34000180: 0A DC.B 0x0A ; '\n' 0x34000181: 01 DC.B 0x01 ; '\x01' 0x34000182: 4D DC.B 0x4D ; 'M' 0x34000183: 01 DC.B 0x01 ; '\x01' 0x34000184: 90 DC.B 0x90 ; '\x90' 0x34000185: 01 DC.B 0x01 ; '\x01' 0x34000186: 03 DC.B 0x03 ; '\x03' 0x34000187: 07 DC.B 0x07 ; '\x07' 0x34000188: 0F DC.B 0x0F ; '\x0F' 0x34000189: 1F DC.B 0x1F ; '\x1F' 0x3400018A: 00 DC.B 0x00 ; '\0' 0x3400018B: 00 DC.B 0x00 ; '\0' 0x3400018C: 01 DC.B 0x01 ; '\x01' 0x3400018D: 11 DC.B 0x11 ; '\x11' 0x3400018E: 01 DC.B 0x01 ; '\x01' 0x3400018F: 25 DC.B 0x25 ; '%' 0x34000190: 0E DC.B 0x0E ; '\x0E' 0x34000191: 13 DC.B 0x13 ; '\x13' 0x34000192: 05 DC.B 0x05 ; '\x05' 0x34000193: 03 DC.B 0x03 ; '\x03' 0x34000194: 0E DC.B 0x0E ; '\x0E' 0x34000195: 10 DC.B 0x10 ; '\x10' 0x34000196: 17 DC.B 0x17 ; '\x17' 0x34000197: B4 DC.B 0xB4 ; '\xB4' 0x34000198: 42 DC.B 0x42 ; 'B' 0x34000199: 19 DC.B 0x19 ; '\x19' 0x3400019A: 11 DC.B 0x11 ; '\x11' 0x3400019B: 01 DC.B 0x01 ; '\x01' 0x3400019C: 12 DC.B 0x12 ; '\x12' 0x3400019D: 06 DC.B 0x06 ; '\x06' 0x3400019E: 43 DC.B 0x43 ; 'C' 0x3400019F: 17 DC.B 0x17 ; '\x17' 0x340001A0: 00 DC.B 0x00 ; '\0' 0x340001A1: 00 DC.B 0x00 ; '\0' 0x340001A2: 02 DC.B 0x02 ; '\x02' 0x340001A3: 2E DC.B 0x2E ; '.' 0x340001A4: 00 DC.B 0x00 ; '\0' 0x340001A5: 11 DC.B 0x11 ; '\x11' 0x340001A6: 01 DC.B 0x01 ; '\x01' 0x340001A7: 12 DC.B 0x12 ; '\x12' 0x340001A8: 06 DC.B 0x06 ; '\x06' 0x340001A9: 40 DC.B 0x40 ; '@' 0x340001AA: 18 DC.B 0x18 ; '\x18' 0x340001AB: 03 DC.B 0x03 ; '\x03' 0x340001AC: 0E DC.B 0x0E ; '\x0E' 0x340001AD: 3A DC.B 0x3A ; ':' 0x340001AE: 0B DC.B 0x0B ; '\v' 0x340001AF: 3B DC.B 0x3B ; ';' 0x340001B0: 0B DC.B 0x0B ; '\v' 0x340001B1: 27 DC.B 0x27 ; ''' 0x340001B2: 19 DC.B 0x19 ; '\x19' 0x340001B3: 3F DC.B 0x3F ; '?' 0x340001B4: 19 DC.B 0x19 ; '\x19' 0x340001B5: 00 DC.B 0x00 ; '\0' 0x340001B6: 00 DC.B 0x00 ; '\0' 0x340001B7: 03 DC.B 0x03 ; '\x03' 0x340001B8: 04 DC.B 0x04 ; '\x04' 0x340001B9: 01 DC.B 0x01 ; '\x01' 0x340001BA: 49 DC.B 0x49 ; 'I' 0x340001BB: 13 DC.B 0x13 ; '\x13' 0x340001BC: 0B DC.B 0x0B ; '\v' 0x340001BD: 0B DC.B 0x0B ; '\v' 0x340001BE: 3A DC.B 0x3A ; ':' 0x340001BF: 0B DC.B 0x0B ; '\v' 0x340001C0: 3B DC.B 0x3B ; ';' 0x340001C1: 0B DC.B 0x0B ; '\v' 0x340001C2: 00 DC.B 0x00 ; '\0' 0x340001C3: 00 DC.B 0x00 ; '\0' 0x340001C4: 04 DC.B 0x04 ; '\x04' 0x340001C5: 28 DC.B 0x28 ; '(' 0x340001C6: 00 DC.B 0x00 ; '\0' 0x340001C7: 03 DC.B 0x03 ; '\x03' 0x340001C8: 0E DC.B 0x0E ; '\x0E' 0x340001C9: 1C DC.B 0x1C ; '\x1C' 0x340001CA: 0F DC.B 0x0F ; '\x0F' 0x340001CB: 00 DC.B 0x00 ; '\0'

Section .bss.JEDEC_SCCR_Map from blto2_FSBL_lto.o, size=112, align=4


JEDEC_SCCR_Map: 0x340001CC: 10 DC.B 0x10 ; '\x10' 0x340001CD: 00 DC.B 0x00 ; '\0' 0x340001CE: 00 DC.B 0x00 ; '\0' 0x340001CF: 01 DC.B 0x01 ; '\x01' 0x340001D0: A0 DC.B 0xA0 ; '\xA0' 0x340001D1: 0F DC.B 0x0F ; '\x0F' 0x340001D2: 00 DC.B 0x00 ; '\0' 0x340001D3: FA DC.B 0xFA ; '\xFA' 0x340001D4: 10 DC.B 0x10 ; '\x10' 0x340001D5: 00 DC.B 0x00 ; '\0' 0x340001D6: 00 DC.B 0x00 ; '\0' 0x340001D7: 00 DC.B 0x00 ; '\0' 0x340001D8: 00 DC.B 0x00 ; '\0' 0x340001D9: 01 DC.B 0x01 ; '\x01' 0x340001DA: 00 DC.B 0x00 ; '\0' 0x340001DB: 00 DC.B 0x00 ; '\0' 0x340001DC: A0 DC.B 0xA0 ; '\xA0' 0x340001DD: 0F DC.B 0x0F ; '\x0F' 0x340001DE: 00 DC.B 0x00 ; '\0' 0x340001DF: 00 DC.B 0x00 ; '\0' 0x340001E0: 00 DC.B 0x00 ; '\0' 0x340001E1: FA DC.B 0xFA ; '\xFA' 0x340001E2: 00 DC.B 0x00 ; '\0' 0x340001E3: 00 DC.B 0x00 ; '\0' 0x340001E4: 00 DC.B 0x00 ; '\0' 0x340001E5: 00 DC.B 0x00 ; '\0' 0x340001E6: 21 DC.B 0x21 ; '!' 0x340001E7: 00 DC.B 0x00 ; '\0' 0x340001E8: 32 DC.B 0x32 ; '2' 0x340001E9: 00 DC.B 0x00 ; '\0' 0x340001EA: 42 DC.B 0x42 ; 'B' 0x340001EB: 00 DC.B 0x00 ; '\0' 0x340001EC: 50 DC.B 0x50 ; 'P' 0x340001ED: 00 DC.B 0x00 ; '\0' 0x340001EE: 64 DC.B 0x64 ; 'd' 0x340001EF: 00 DC.B 0x00 ; '\0' 0x340001F0: 85 DC.B 0x85 ; '\x85' 0x340001F1: 00 DC.B 0x00 ; '\0' 0x340001F2: A6 DC.B 0xA6 ; '\xA6' 0x340001F3: 00 DC.B 0x00 ; '\0' 0x340001F4: C8 DC.B 0xC8 ; '\xC8' 0x340001F5: 00 DC.B 0x00 ; '\0' 0x340001F6: FA DC.B 0xFA ; '\xFA' 0x340001F7: 00 DC.B 0x00 ; '\0' 0x340001F8: 0A DC.B 0x0A ; '\n' 0x340001F9: 01 DC.B 0x01 ; '\x01' 0x340001FA: 4D DC.B 0x4D ; 'M' 0x340001FB: 01 DC.B 0x01 ; '\x01' 0x340001FC: 90 DC.B 0x90 ; '\x90' 0x340001FD: 01 DC.B 0x01 ; '\x01' 0x340001FE: 03 DC.B 0x03 ; '\x03' 0x340001FF: 07 DC.B 0x07 ; '\x07' 0x34000200: 0F DC.B 0x0F ; '\x0F' 0x34000201: 1F DC.B 0x1F ; '\x1F' 0x34000202: 00 DC.B 0x00 ; '\0' 0x34000203: 00 DC.B 0x00 ; '\0' 0x34000204: 01 DC.B 0x01 ; '\x01' 0x34000205: 11 DC.B 0x11 ; '\x11' 0x34000206: 01 DC.B 0x01 ; '\x01' 0x34000207: 25 DC.B 0x25 ; '%' 0x34000208: 0E DC.B 0x0E ; '\x0E' 0x34000209: 13 DC.B 0x13 ; '\x13' 0x3400020A: 05 DC.B 0x05 ; '\x05' 0x3400020B: 03 DC.B 0x03 ; '\x03' 0x3400020C: 0E DC.B 0x0E ; '\x0E' 0x3400020D: 10 DC.B 0x10 ; '\x10' 0x3400020E: 17 DC.B 0x17 ; '\x17' 0x3400020F: B4 DC.B 0xB4 ; '\xB4' 0x34000210: 42 DC.B 0x42 ; 'B' 0x34000211: 19 DC.B 0x19 ; '\x19' 0x34000212: 11 DC.B 0x11 ; '\x11' 0x34000213: 01 DC.B 0x01 ; '\x01' 0x34000214: 12 DC.B 0x12 ; '\x12' 0x34000215: 06 DC.B 0x06 ; '\x06' 0x34000216: 43 DC.B 0x43 ; 'C' 0x34000217: 17 DC.B 0x17 ; '\x17' 0x34000218: 00 DC.B 0x00 ; '\0' 0x34000219: 00 DC.B 0x00 ; '\0' 0x3400021A: 02 DC.B 0x02 ; '\x02' 0x3400021B: 2E DC.B 0x2E ; '.' 0x3400021C: 00 DC.B 0x00 ; '\0' 0x3400021D: 11 DC.B 0x11 ; '\x11' 0x3400021E: 01 DC.B 0x01 ; '\x01' 0x3400021F: 12 DC.B 0x12 ; '\x12' 0x34000220: 06 DC.B 0x06 ; '\x06' 0x34000221: 40 DC.B 0x40 ; '@' 0x34000222: 18 DC.B 0x18 ; '\x18' 0x34000223: 03 DC.B 0x03 ; '\x03' 0x34000224: 0E DC.B 0x0E ; '\x0E' 0x34000225: 3A DC.B 0x3A ; ':' 0x34000226: 0B DC.B 0x0B ; '\v' 0x34000227: 3B DC.B 0x3B ; ';' 0x34000228: 0B DC.B 0x0B ; '\v' 0x34000229: 27 DC.B 0x27 ; ''' 0x3400022A: 19 DC.B 0x19 ; '\x19' 0x3400022B: 3F DC.B 0x3F ; '?' 0x3400022C: 19 DC.B 0x19 ; '\x19' 0x3400022D: 00 DC.B 0x00 ; '\0' 0x3400022E: 00 DC.B 0x00 ; '\0' 0x3400022F: 03 DC.B 0x03 ; '\x03' 0x34000230: 04 DC.B 0x04 ; '\x04' 0x34000231: 01 DC.B 0x01 ; '\x01' 0x34000232: 49 DC.B 0x49 ; 'I' 0x34000233: 13 DC.B 0x13 ; '\x13' 0x34000234: 0B DC.B 0x0B ; '\v' 0x34000235: 0B DC.B 0x0B ; '\v' 0x34000236: 3A DC.B 0x3A ; ':' 0x34000237: 0B DC.B 0x0B ; '\v' 0x34000238: 3B DC.B 0x3B ; ';' 0x34000239: 0B DC.B 0x0B ; '\v' 0x3400023A: 00 DC.B 0x00 ; '\0' 0x3400023B: 00 DC.B 0x00 ; '\0'

Section .bss.hxspi2 from blto2_FSBL_lto.o, size=100, align=4


hxspi2: 0x3400023C: 01 DC.B 0x01 ; '\x01' 0x3400023D: 00 DC.B 0x00 ; '\0' 0x3400023E: 00 DC.B 0x00 ; '\0' 0x3400023F: 00 DC.B 0x00 ; '\0' 0x34000240: 44 DC.B 0x44 ; 'D' 0x34000241: 3A DC.B 0x3A ; ':' 0x34000242: 5C DC.B 0x5C ; '\\' 0x34000243: 50 DC.B 0x50 ; 'P' 0x34000244: 72 DC.B 0x72 ; 'r' 0x34000245: 6F DC.B 0x6F ; 'o' 0x34000246: 6A DC.B 0x6A ; 'j' 0x34000247: 65 DC.B 0x65 ; 'e' 0x34000248: 6B DC.B 0x6B ; 'k' 0x34000249: 74 DC.B 0x74 ; 't' 0x3400024A: 65 DC.B 0x65 ; 'e' 0x3400024B: 5C DC.B 0x5C ; '\\' 0x3400024C: 68 DC.B 0x68 ; 'h' 0x3400024D: 61 DC.B 0x61 ; 'a' 0x3400024E: 64 DC.B 0x64 ; 'd' 0x3400024F: 65 DC.B 0x65 ; 'e' 0x34000250: 77 DC.B 0x77 ; 'w' 0x34000251: 65 DC.B 0x65 ; 'e' 0x34000252: 5F DC.B 0x5F ; '_' 0x34000253: 62 DC.B 0x62 ; 'b' 0x34000254: 6C DC.B 0x6C ; 'l' 0x34000255: 74 DC.B 0x74 ; 't' 0x34000256: 6F DC.B 0x6F ; 'o' 0x34000257: 32 DC.B 0x32 ; '2' 0x34000258: 5C DC.B 0x5C ; '\\' 0x34000259: 74 DC.B 0x74 ; 't' 0x3400025A: 72 DC.B 0x72 ; 'r' 0x3400025B: 75 DC.B 0x75 ; 'u' 0x3400025C: 6E DC.B 0x6E ; 'n' 0x3400025D: 6B DC.B 0x6B ; 'k' 0x3400025E: 5C DC.B 0x5C ; '\\' 0x3400025F: 66 DC.B 0x66 ; 'f' 0x34000260: 69 DC.B 0x69 ; 'i' 0x34000261: 72 DC.B 0x72 ; 'r' 0x34000262: 6D DC.B 0x6D ; 'm' 0x34000263: 77 DC.B 0x77 ; 'w' 0x34000264: 61 DC.B 0x61 ; 'a' 0x34000265: 72 DC.B 0x72 ; 'r' 0x34000266: 65 DC.B 0x65 ; 'e' 0x34000267: 5C DC.B 0x5C ; '\\' 0x34000268: 46 DC.B 0x46 ; 'F' 0x34000269: 53 DC.B 0x53 ; 'S' 0x3400026A: 42 DC.B 0x42 ; 'B' 0x3400026B: 4C DC.B 0x4C ; 'L' 0x3400026C: 5C DC.B 0x5C ; '\\' 0x3400026D: 43 DC.B 0x43 ; 'C' 0x3400026E: 75 DC.B 0x75 ; 'u' 0x3400026F: 62 DC.B 0x62 ; 'b' 0x34000270: 65 DC.B 0x65 ; 'e' 0x34000271: 4D DC.B 0x4D ; 'M' 0x34000272: 58 DC.B 0x58 ; 'X' 0x34000273: 5C DC.B 0x5C ; '\\' 0x34000274: 44 DC.B 0x44 ; 'D' 0x34000275: 72 DC.B 0x72 ; 'r' 0x34000276: 69 DC.B 0x69 ; 'i' 0x34000277: 76 DC.B 0x76 ; 'v' 0x34000278: 65 DC.B 0x65 ; 'e' 0x34000279: 72 DC.B 0x72 ; 'r' 0x3400027A: 73 DC.B 0x73 ; 's' 0x3400027B: 5C DC.B 0x5C ; '\\' 0x3400027C: 53 DC.B 0x53 ; 'S' 0x3400027D: 54 DC.B 0x54 ; 'T' 0x3400027E: 4D DC.B 0x4D ; 'M' 0x3400027F: 33 DC.B 0x33 ; '3' 0x34000280: 32 DC.B 0x32 ; '2' 0x34000281: 4E DC.B 0x4E ; 'N' 0x34000282: 36 DC.B 0x36 ; '6' 0x34000283: 78 DC.B 0x78 ; 'x' 0x34000284: 78 DC.B 0x78 ; 'x' 0x34000285: 5F DC.B 0x5F ; '_' 0x34000286: 48 DC.B 0x48 ; 'H' 0x34000287: 41 DC.B 0x41 ; 'A' 0x34000288: 4C DC.B 0x4C ; 'L' 0x34000289: 5F DC.B 0x5F ; '_' 0x3400028A: 44 DC.B 0x44 ; 'D' 0x3400028B: 72 DC.B 0x72 ; 'r' 0x3400028C: 69 DC.B 0x69 ; 'i' 0x3400028D: 76 DC.B 0x76 ; 'v' 0x3400028E: 65 DC.B 0x65 ; 'e' 0x3400028F: 72 DC.B 0x72 ; 'r' 0x34000290: 5C DC.B 0x5C ; '\\' 0x34000291: 53 DC.B 0x53 ; 'S' 0x34000292: 72 DC.B 0x72 ; 'r' 0x34000293: 63 DC.B 0x63 ; 'c' 0x34000294: 5C DC.B 0x5C ; '\\' 0x34000295: 73 DC.B 0x73 ; 's' 0x34000296: 74 DC.B 0x74 ; 't' 0x34000297: 6D DC.B 0x6D ; 'm' 0x34000298: 33 DC.B 0x33 ; '3' 0x34000299: 32 DC.B 0x32 ; '2' 0x3400029A: 6E DC.B 0x6E ; 'n' 0x3400029B: 36 DC.B 0x36 ; '6' 0x3400029C: 78 DC.B 0x78 ; 'x' 0x3400029D: 78 DC.B 0x78 ; 'x' 0x3400029E: 5F DC.B 0x5F ; '_' 0x3400029F: 68 DC.B 0x68 ; 'h'

Section .bss.JEDEC_Basic from blto2_FSBL_lto.o, size=96, align=4


JEDEC_Basic: 0x340002A0: 10 DC.B 0x10 ; '\x10' 0x340002A1: 00 DC.B 0x00 ; '\0' 0x340002A2: 00 DC.B 0x00 ; '\0' 0x340002A3: 01 DC.B 0x01 ; '\x01' 0x340002A4: A0 DC.B 0xA0 ; '\xA0' 0x340002A5: 0F DC.B 0x0F ; '\x0F' 0x340002A6: 00 DC.B 0x00 ; '\0' 0x340002A7: FA DC.B 0xFA ; '\xFA' 0x340002A8: 10 DC.B 0x10 ; '\x10' 0x340002A9: 00 DC.B 0x00 ; '\0' 0x340002AA: 00 DC.B 0x00 ; '\0' 0x340002AB: 00 DC.B 0x00 ; '\0' 0x340002AC: 00 DC.B 0x00 ; '\0' 0x340002AD: 01 DC.B 0x01 ; '\x01' 0x340002AE: 00 DC.B 0x00 ; '\0' 0x340002AF: 00 DC.B 0x00 ; '\0' 0x340002B0: A0 DC.B 0xA0 ; '\xA0' 0x340002B1: 0F DC.B 0x0F ; '\x0F' 0x340002B2: 00 DC.B 0x00 ; '\0' 0x340002B3: 00 DC.B 0x00 ; '\0' 0x340002B4: 00 DC.B 0x00 ; '\0' 0x340002B5: FA DC.B 0xFA ; '\xFA' 0x340002B6: 00 DC.B 0x00 ; '\0' 0x340002B7: 00 DC.B 0x00 ; '\0' 0x340002B8: 00 DC.B 0x00 ; '\0' 0x340002B9: 00 DC.B 0x00 ; '\0' 0x340002BA: 21 DC.B 0x21 ; '!' 0x340002BB: 00 DC.B 0x00 ; '\0' 0x340002BC: 32 DC.B 0x32 ; '2' 0x340002BD: 00 DC.B 0x00 ; '\0' 0x340002BE: 42 DC.B 0x42 ; 'B' 0x340002BF: 00 DC.B 0x00 ; '\0' 0x340002C0: 50 DC.B 0x50 ; 'P' 0x340002C1: 00 DC.B 0x00 ; '\0' 0x340002C2: 64 DC.B 0x64 ; 'd' 0x340002C3: 00 DC.B 0x00 ; '\0' 0x340002C4: 85 DC.B 0x85 ; '\x85' 0x340002C5: 00 DC.B 0x00 ; '\0' 0x340002C6: A6 DC.B 0xA6 ; '\xA6' 0x340002C7: 00 DC.B 0x00 ; '\0' 0x340002C8: C8 DC.B 0xC8 ; '\xC8' 0x340002C9: 00 DC.B 0x00 ; '\0' 0x340002CA: FA DC.B 0xFA ; '\xFA' 0x340002CB: 00 DC.B 0x00 ; '\0' 0x340002CC: 0A DC.B 0x0A ; '\n' 0x340002CD: 01 DC.B 0x01 ; '\x01' 0x340002CE: 4D DC.B 0x4D ; 'M' 0x340002CF: 01 DC.B 0x01 ; '\x01' 0x340002D0: 90 DC.B 0x90 ; '\x90' 0x340002D1: 01 DC.B 0x01 ; '\x01' 0x340002D2: 03 DC.B 0x03 ; '\x03' 0x340002D3: 07 DC.B 0x07 ; '\x07' 0x340002D4: 0F DC.B 0x0F ; '\x0F' 0x340002D5: 1F DC.B 0x1F ; '\x1F' 0x340002D6: 00 DC.B 0x00 ; '\0' 0x340002D7: 00 DC.B 0x00 ; '\0' 0x340002D8: 01 DC.B 0x01 ; '\x01' 0x340002D9: 11 DC.B 0x11 ; '\x11' 0x340002DA: 01 DC.B 0x01 ; '\x01' 0x340002DB: 25 DC.B 0x25 ; '%' 0x340002DC: 0E DC.B 0x0E ; '\x0E' 0x340002DD: 13 DC.B 0x13 ; '\x13' 0x340002DE: 05 DC.B 0x05 ; '\x05' 0x340002DF: 03 DC.B 0x03 ; '\x03' 0x340002E0: 0E DC.B 0x0E ; '\x0E' 0x340002E1: 10 DC.B 0x10 ; '\x10' 0x340002E2: 17 DC.B 0x17 ; '\x17' 0x340002E3: B4 DC.B 0xB4 ; '\xB4' 0x340002E4: 42 DC.B 0x42 ; 'B' 0x340002E5: 19 DC.B 0x19 ; '\x19' 0x340002E6: 11 DC.B 0x11 ; '\x11' 0x340002E7: 01 DC.B 0x01 ; '\x01' 0x340002E8: 12 DC.B 0x12 ; '\x12' 0x340002E9: 06 DC.B 0x06 ; '\x06' 0x340002EA: 43 DC.B 0x43 ; 'C' 0x340002EB: 17 DC.B 0x17 ; '\x17' 0x340002EC: 00 DC.B 0x00 ; '\0' 0x340002ED: 00 DC.B 0x00 ; '\0' 0x340002EE: 02 DC.B 0x02 ; '\x02' 0x340002EF: 2E DC.B 0x2E ; '.' 0x340002F0: 00 DC.B 0x00 ; '\0' 0x340002F1: 11 DC.B 0x11 ; '\x11' 0x340002F2: 01 DC.B 0x01 ; '\x01' 0x340002F3: 12 DC.B 0x12 ; '\x12' 0x340002F4: 06 DC.B 0x06 ; '\x06' 0x340002F5: 40 DC.B 0x40 ; '@' 0x340002F6: 18 DC.B 0x18 ; '\x18' 0x340002F7: 03 DC.B 0x03 ; '\x03' 0x340002F8: 0E DC.B 0x0E ; '\x0E' 0x340002F9: 3A DC.B 0x3A ; ':' 0x340002FA: 0B DC.B 0x0B ; '\v' 0x340002FB: 3B DC.B 0x3B ; ';' 0x340002FC: 0B DC.B 0x0B ; '\v' 0x340002FD: 27 DC.B 0x27 ; ''' 0x340002FE: 19 DC.B 0x19 ; '\x19' 0x340002FF: 3F DC.B 0x3F ; '?'

Section .bss.JEDEC_OctalDdr from blto2_FSBL_lto.o, size=32, align=4


JEDEC_OctalDdr: 0x34000300: 10 DC.B 0x10 ; '\x10' 0x34000301: 00 DC.B 0x00 ; '\0' 0x34000302: 00 DC.B 0x00 ; '\0' 0x34000303: 01 DC.B 0x01 ; '\x01' 0x34000304: A0 DC.B 0xA0 ; '\xA0' 0x34000305: 0F DC.B 0x0F ; '\x0F' 0x34000306: 00 DC.B 0x00 ; '\0' 0x34000307: FA DC.B 0xFA ; '\xFA' 0x34000308: 10 DC.B 0x10 ; '\x10' 0x34000309: 00 DC.B 0x00 ; '\0' 0x3400030A: 00 DC.B 0x00 ; '\0' 0x3400030B: 00 DC.B 0x00 ; '\0' 0x3400030C: 00 DC.B 0x00 ; '\0' 0x3400030D: 01 DC.B 0x01 ; '\x01' 0x3400030E: 00 DC.B 0x00 ; '\0' 0x3400030F: 00 DC.B 0x00 ; '\0' 0x34000310: A0 DC.B 0xA0 ; '\xA0' 0x34000311: 0F DC.B 0x0F ; '\x0F' 0x34000312: 00 DC.B 0x00 ; '\0' 0x34000313: 00 DC.B 0x00 ; '\0' 0x34000314: 00 DC.B 0x00 ; '\0' 0x34000315: FA DC.B 0xFA ; '\xFA' 0x34000316: 00 DC.B 0x00 ; '\0' 0x34000317: 00 DC.B 0x00 ; '\0' 0x34000318: 00 DC.B 0x00 ; '\0' 0x34000319: 00 DC.B 0x00 ; '\0' 0x3400031A: 21 DC.B 0x21 ; '!' 0x3400031B: 00 DC.B 0x00 ; '\0' 0x3400031C: 32 DC.B 0x32 ; '2' 0x3400031D: 00 DC.B 0x00 ; '\0' 0x3400031E: 42 DC.B 0x42 ; 'B' 0x3400031F: 00 DC.B 0x00 ; '\0'

Section .bss.JEDEC_XSPI10 from blto2_FSBL_lto.o, size=24, align=4


JEDEC_XSPI10: 0x34000320: 10 DC.B 0x10 ; '\x10' 0x34000321: 00 DC.B 0x00 ; '\0' 0x34000322: 00 DC.B 0x00 ; '\0' 0x34000323: 01 DC.B 0x01 ; '\x01' 0x34000324: A0 DC.B 0xA0 ; '\xA0' 0x34000325: 0F DC.B 0x0F ; '\x0F' 0x34000326: 00 DC.B 0x00 ; '\0' 0x34000327: FA DC.B 0xFA ; '\xFA' 0x34000328: 10 DC.B 0x10 ; '\x10' 0x34000329: 00 DC.B 0x00 ; '\0' 0x3400032A: 00 DC.B 0x00 ; '\0' 0x3400032B: 00 DC.B 0x00 ; '\0' 0x3400032C: 00 DC.B 0x00 ; '\0' 0x3400032D: 01 DC.B 0x01 ; '\x01' 0x3400032E: 00 DC.B 0x00 ; '\0' 0x3400032F: 00 DC.B 0x00 ; '\0' 0x34000330: A0 DC.B 0xA0 ; '\xA0' 0x34000331: 0F DC.B 0x0F ; '\x0F' 0x34000332: 00 DC.B 0x00 ; '\0' 0x34000333: 00 DC.B 0x00 ; '\0' 0x34000334: 00 DC.B 0x00 ; '\0' 0x34000335: FA DC.B 0xFA ; '\xFA' 0x34000336: 00 DC.B 0x00 ; '\0' 0x34000337: 00 DC.B 0x00 ; '\0'

Section .bss.JEDEC_Address4Bytes from blto2_FSBL_lto.o, size=8, align=4


JEDEC_Address4Bytes: 0x34000338: 01 DC.B 0x01 ; '\x01' 0x34000339: 11 DC.B 0x11 ; '\x11' 0x3400033A: 01 DC.B 0x01 ; '\x01' 0x3400033B: 25 DC.B 0x25 ; '%' 0x3400033C: 0E DC.B 0x0E ; '\x0E' 0x3400033D: 13 DC.B 0x13 ; '\x13' 0x3400033E: 05 DC.B 0x05 ; '\x05' 0x3400033F: 03 DC.B 0x03 ; '\x03'

Section .bss.uwTick from blto2_FSBL_lto.o, size=4, align=4


uwTick: 0x34000340: 44 DC.B 0x44 ; 'D' 0x34000341: 3A DC.B 0x3A ; ':' 0x34000342: 5C DC.B 0x5C ; '\\' 0x34000343: 50 DC.B 0x50 ; 'P'

Section .bss.libc.__SEGGER_RTL_stdout_file from prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=4, align=4


__SEGGER_RTL_stdout_file: 0x34000344: 00 DC.B 0x00 ; '\0' 0x34000345: 00 DC.B 0x00 ; '\0' 0x34000346: 00 DC.B 0x00 ; '\0' 0x34000347: 00 DC.B 0x00 ; '\0'

Section .bss.libc.__SEGGER_RTL_stdin_file from prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=4, align=4


__SEGGER_RTL_stdin_file: 0x34000348: 00 DC.B 0x00 ; '\0' 0x34000349: 00 DC.B 0x00 ; '\0' 0x3400034A: 00 DC.B 0x00 ; '\0' 0x3400034B: 00 DC.B 0x00 ; '\0'

Section .bss.libc.__SEGGER_RTL_stderr_file from prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=4, align=4


__SEGGER_RTL_stderr_file: 0x3400034C: 00 DC.B 0x00 ; '\0' 0x3400034D: 00 DC.B 0x00 ; '\0' 0x3400034E: 00 DC.B 0x00 ; '\0' 0x3400034F: 00 DC.B 0x00 ; '\0'

Section .bss.libc.__SEGGER_RTL_locale_ptr from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=4, align=4


__SEGGER_RTL_locale_ptr: 0x34000350: 43 DC.B 0x43 ; 'C' 0x34000351: 00 DC.B 0x00 ; '\0' 0x34000352: 50 DC.B 0x50 ; 'P' 0x34000353: 4F DC.B 0x4F ; 'O'

Section .bss.JumpToApplication.JumpToApp from blto2_FSBL_lto.o, size=4, align=4


JumpToApplication.JumpToApp: 0x34000354: 00 DC.B 0x00 ; '\0' 0x34000355: 08 DC.B 0x08 ; '\b' 0x34000356: 06 DC.B 0x06 ; '\x06' 0x34000357: 02 DC.B 0x02 ; '\x02'

Section .bss.libc._acUpBuffer from SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=1024, align=1


_acUpBuffer: 0x34000358: 00 DC.B 0x00 ; '\0' 0x34000359: 53 DC.B 0x53 ; 'S' 0x3400035A: 45 DC.B 0x45 ; 'E' 0x3400035B: 47 DC.B 0x47 ; 'G' 0x3400035C: 47 DC.B 0x47 ; 'G' 0x3400035D: 45 DC.B 0x45 ; 'E' 0x3400035E: 52 DC.B 0x52 ; 'R' 0x3400035F: 20 DC.B 0x20 ; ' ' 0x34000360: 43 DC.B 0x43 ; 'C' 0x34000361: 2F DC.B 0x2F ; '/' 0x34000362: 43 DC.B 0x43 ; 'C' 0x34000363: 2B DC.B 0x2B ; '+' 0x34000364: 2B DC.B 0x2B ; '+' 0x34000365: 20 DC.B 0x20 ; ' ' 0x34000366: 63 DC.B 0x63 ; 'c' 0x34000367: 6F DC.B 0x6F ; 'o' 0x34000368: 6D DC.B 0x6D ; 'm' 0x34000369: 70 DC.B 0x70 ; 'p' 0x3400036A: 69 DC.B 0x69 ; 'i' 0x3400036B: 6C DC.B 0x6C ; 'l' 0x3400036C: 65 DC.B 0x65 ; 'e' 0x3400036D: 72 DC.B 0x72 ; 'r' 0x3400036E: 20 DC.B 0x20 ; ' ' 0x3400036F: 76 DC.B 0x76 ; 'v' 0x34000370: 65 DC.B 0x65 ; 'e' 0x34000371: 72 DC.B 0x72 ; 'r' 0x34000372: 73 DC.B 0x73 ; 's' 0x34000373: 69 DC.B 0x69 ; 'i' 0x34000374: 6F DC.B 0x6F ; 'o' 0x34000375: 6E DC.B 0x6E ; 'n' 0x34000376: 20 DC.B 0x20 ; ' ' 0x34000377: 32 DC.B 0x32 ; '2' 0x34000378: 32 DC.B 0x32 ; '2' 0x34000379: 2E DC.B 0x2E ; '.' 0x3400037A: 31 DC.B 0x31 ; '1' 0x3400037B: 2E DC.B 0x2E ; '.' 0x3400037C: 32 DC.B 0x32 ; '2' 0x3400037D: 20 DC.B 0x20 ; ' ' 0x3400037E: 28 DC.B 0x28 ; '(' 0x3400037F: 62 DC.B 0x62 ; 'b' 0x34000380: 61 DC.B 0x61 ; 'a' 0x34000381: 73 DC.B 0x73 ; 's' 0x34000382: 65 DC.B 0x65 ; 'e' 0x34000383: 64 DC.B 0x64 ; 'd' 0x34000384: 20 DC.B 0x20 ; ' ' 0x34000385: 6F DC.B 0x6F ; 'o' 0x34000386: 6E DC.B 0x6E ; 'n' 0x34000387: 20 DC.B 0x20 ; ' ' 0x34000388: 63 DC.B 0x63 ; 'c' 0x34000389: 6C DC.B 0x6C ; 'l' 0x3400038A: 61 DC.B 0x61 ; 'a' 0x3400038B: 6E DC.B 0x6E ; 'n' 0x3400038C: 67 DC.B 0x67 ; 'g' 0x3400038D: 20 DC.B 0x20 ; ' ' 0x3400038E: 32 DC.B 0x32 ; '2' 0x3400038F: 32 DC.B 0x32 ; '2' 0x34000390: 2E DC.B 0x2E ; '.' 0x34000391: 31 DC.B 0x31 ; '1' 0x34000392: 2E DC.B 0x2E ; '.' 0x34000393: 38 DC.B 0x38 ; '8' 0x34000394: 29 DC.B 0x29 ; ')' 0x34000395: 00 DC.B 0x00 ; '\0' 0x34000396: 41 DC.B 0x41 ; 'A' 0x34000397: 3B DC.B 0x3B ; ';' 0x34000398: 00 DC.B 0x00 ; '\0' 0x34000399: 00 DC.B 0x00 ; '\0' 0x3400039A: 00 DC.B 0x00 ; '\0' 0x3400039B: 61 DC.B 0x61 ; 'a' 0x3400039C: 65 DC.B 0x65 ; 'e' 0x3400039D: 61 DC.B 0x61 ; 'a' 0x3400039E: 62 DC.B 0x62 ; 'b' 0x3400039F: 69 DC.B 0x69 ; 'i' 0x340003A0: 00 DC.B 0x00 ; '\0' 0x340003A1: 01 DC.B 0x01 ; '\x01' 0x340003A2: 31 DC.B 0x31 ; '1' 0x340003A3: 00 DC.B 0x00 ; '\0' 0x340003A4: 00 DC.B 0x00 ; '\0' 0x340003A5: 00 DC.B 0x00 ; '\0' 0x340003A6: 43 DC.B 0x43 ; 'C' 0x340003A7: 32 DC.B 0x32 ; '2' 0x340003A8: 2E DC.B 0x2E ; '.' 0x340003A9: 30 DC.B 0x30 ; '0' 0x340003AA: 39 DC.B 0x39 ; '9' 0x340003AB: 00 DC.B 0x00 ; '\0' 0x340003AC: 06 DC.B 0x06 ; '\x06' 0x340003AD: 15 DC.B 0x15 ; '\x15' 0x340003AE: 07 DC.B 0x07 ; '\x07' 0x340003AF: 4D DC.B 0x4D ; 'M' 0x340003B0: 08 DC.B 0x08 ; '\b' 0x340003B1: 00 DC.B 0x00 ; '\0' 0x340003B2: 09 DC.B 0x09 ; '\t' 0x340003B3: 03 DC.B 0x03 ; '\x03' 0x340003B4: 0A DC.B 0x0A ; '\n' 0x340003B5: 08 DC.B 0x08 ; '\b' 0x340003B6: 0E DC.B 0x0E ; '\x0E' 0x340003B7: 00 DC.B 0x00 ; '\0' 0x340003B8: 11 DC.B 0x11 ; '\x11' 0x340003B9: 01 DC.B 0x01 ; '\x01' 0x340003BA: 12 DC.B 0x12 ; '\x12' 0x340003BB: 04 DC.B 0x04 ; '\x04' 0x340003BC: 14 DC.B 0x14 ; '\x14' 0x340003BD: 01 DC.B 0x01 ; '\x01' 0x340003BE: 15 DC.B 0x15 ; '\x15' 0x340003BF: 00 DC.B 0x00 ; '\0' 0x340003C0: 17 DC.B 0x17 ; '\x17' 0x340003C1: 03 DC.B 0x03 ; '\x03' 0x340003C2: 18 DC.B 0x18 ; '\x18' 0x340003C3: 01 DC.B 0x01 ; '\x01' 0x340003C4: 19 DC.B 0x19 ; '\x19' 0x340003C5: 01 DC.B 0x01 ; '\x01' 0x340003C6: 1A DC.B 0x1A ; '\x1A' 0x340003C7: 01 DC.B 0x01 ; '\x01' 0x340003C8: 1C DC.B 0x1C ; '\x1C' 0x340003C9: 01 DC.B 0x01 ; '\x01' 0x340003CA: 1E DC.B 0x1E ; '\x1E' 0x340003CB: 03 DC.B 0x03 ; '\x03' 0x340003CC: 22 DC.B 0x22 ; '\"' 0x340003CD: 00 DC.B 0x00 ; '\0' 0x340003CE: 24 DC.B 0x24 ; '$' 0x340003CF: 01 DC.B 0x01 ; '\x01' 0x340003D0: 26 DC.B 0x26 ; '&' 0x340003D1: 01 DC.B 0x01 ; '\x01' 0x340003D2: 10 DC.B 0x10 ; '\x10' 0x340003D3: 00 DC.B 0x00 ; '\0' 0x340003D4: 00 DC.B 0x00 ; '\0' 0x340003D5: 00 DC.B 0x00 ; '\0' 0x340003D6: FF DC.B 0xFF ; '\xFF' 0x340003D7: FF DC.B 0xFF ; '\xFF' 0x340003D8: FF DC.B 0xFF ; '\xFF' 0x340003D9: FF DC.B 0xFF ; '\xFF' 0x340003DA: 04 DC.B 0x04 ; '\x04' 0x340003DB: 00 DC.B 0x00 ; '\0' 0x340003DC: 04 DC.B 0x04 ; '\x04' 0x340003DD: 00 DC.B 0x00 ; '\0' 0x340003DE: 01 DC.B 0x01 ; '\x01' 0x340003DF: 7C DC.B 0x7C ; '|' 0x340003E0: 0E DC.B 0x0E ; '\x0E' 0x340003E1: 0C DC.B 0x0C ; '\x0C' 0x340003E2: 0D DC.B 0x0D ; '\r' 0x340003E3: 00 DC.B 0x00 ; '\0' 0x340003E4: 00 DC.B 0x00 ; '\0' 0x340003E5: 00 DC.B 0x00 ; '\0' 0x340003E6: 20 DC.B 0x20 ; ' ' 0x340003E7: 00 DC.B 0x00 ; '\0' 0x340003E8: 00 DC.B 0x00 ; '\0' 0x340003E9: 00 DC.B 0x00 ; '\0' 0x340003EA: BC DC.B 0xBC ; '\xBC' 0x340003EB: 73 DC.B 0x73 ; 's' 0x340003EC: 00 DC.B 0x00 ; '\0' 0x340003ED: 00 DC.B 0x00 ; '\0' 0x340003EE: 00 DC.B 0x00 ; '\0' 0x340003EF: 00 DC.B 0x00 ; '\0' 0x340003F0: 00 DC.B 0x00 ; '\0' 0x340003F1: 00 DC.B 0x00 ; '\0' 0x340003F2: 7C DC.B 0x7C ; '|' 0x340003F3: 00 DC.B 0x00 ; '\0' 0x340003F4: 00 DC.B 0x00 ; '\0' 0x340003F5: 00 DC.B 0x00 ; '\0' 0x340003F6: 44 DC.B 0x44 ; 'D' 0x340003F7: 0E DC.B 0x0E ; '\x0E' 0x340003F8: 20 DC.B 0x20 ; ' ' 0x340003F9: 8E DC.B 0x8E ; '\x8E' 0x340003FA: 01 DC.B 0x01 ; '\x01' 0x340003FB: 89 DC.B 0x89 ; '\x89' 0x340003FC: 02 DC.B 0x02 ; '\x02' 0x340003FD: 88 DC.B 0x88 ; '\x88' 0x340003FE: 03 DC.B 0x03 ; '\x03' 0x340003FF: 87 DC.B 0x87 ; '\x87' 0x34000400: 04 DC.B 0x04 ; '\x04' 0x34000401: 86 DC.B 0x86 ; '\x86' 0x34000402: 05 DC.B 0x05 ; '\x05' 0x34000403: 85 DC.B 0x85 ; '\x85' 0x34000404: 06 DC.B 0x06 ; '\x06' 0x34000405: 84 DC.B 0x84 ; '\x84' 0x34000406: 07 DC.B 0x07 ; '\x07' 0x34000407: 00 DC.B 0x00 ; '\0' 0x34000408: 00 DC.B 0x00 ; '\0' 0x34000409: 00 DC.B 0x00 ; '\0' 0x3400040A: 14 DC.B 0x14 ; '\x14' 0x3400040B: 00 DC.B 0x00 ; '\0' 0x3400040C: 00 DC.B 0x00 ; '\0' 0x3400040D: 00 DC.B 0x00 ; '\0' 0x3400040E: BC DC.B 0xBC ; '\xBC' 0x3400040F: 73 DC.B 0x73 ; 's' 0x34000410: 00 DC.B 0x00 ; '\0' 0x34000411: 00 DC.B 0x00 ; '\0' 0x34000412: 3C DC.B 0x3C ; '<' 0x34000413: 3C DC.B 0x3C ; '<' 0x34000414: 19 DC.B 0x19 ; '\x19' 0x34000415: 34 DC.B 0x34 ; '4' 0x34000416: 62 DC.B 0x62 ; 'b' 0x34000417: 00 DC.B 0x00 ; '\0' 0x34000418: 00 DC.B 0x00 ; '\0' 0x34000419: 00 DC.B 0x00 ; '\0' 0x3400041A: 42 DC.B 0x42 ; 'B' 0x3400041B: 0E DC.B 0x0E ; '\x0E' 0x3400041C: 04 DC.B 0x04 ; '\x04' 0x3400041D: 8E DC.B 0x8E ; '\x8E' 0x3400041E: 01 DC.B 0x01 ; '\x01' 0x3400041F: 00 DC.B 0x00 ; '\0' 0x34000420: 00 DC.B 0x00 ; '\0' 0x34000421: 00 DC.B 0x00 ; '\0' 0x34000422: 20 DC.B 0x20 ; ' ' 0x34000423: 00 DC.B 0x00 ; '\0' 0x34000424: 00 DC.B 0x00 ; '\0' 0x34000425: 00 DC.B 0x00 ; '\0' 0x34000426: BC DC.B 0xBC ; '\xBC' 0x34000427: 73 DC.B 0x73 ; 's' 0x34000428: 00 DC.B 0x00 ; '\0' 0x34000429: 00 DC.B 0x00 ; '\0' 0x3400042A: 00 DC.B 0x00 ; '\0' 0x3400042B: 00 DC.B 0x00 ; '\0' 0x3400042C: 00 DC.B 0x00 ; '\0' 0x3400042D: 00 DC.B 0x00 ; '\0' 0x3400042E: 7C DC.B 0x7C ; '|' 0x3400042F: 00 DC.B 0x00 ; '\0' 0x34000430: 00 DC.B 0x00 ; '\0' 0x34000431: 00 DC.B 0x00 ; '\0' 0x34000432: 44 DC.B 0x44 ; 'D' 0x34000433: 0E DC.B 0x0E ; '\x0E' 0x34000434: 20 DC.B 0x20 ; ' ' 0x34000435: 8E DC.B 0x8E ; '\x8E' 0x34000436: 01 DC.B 0x01 ; '\x01' 0x34000437: 89 DC.B 0x89 ; '\x89' 0x34000438: 02 DC.B 0x02 ; '\x02' 0x34000439: 88 DC.B 0x88 ; '\x88' 0x3400043A: 03 DC.B 0x03 ; '\x03' 0x3400043B: 87 DC.B 0x87 ; '\x87' 0x3400043C: 04 DC.B 0x04 ; '\x04' 0x3400043D: 86 DC.B 0x86 ; '\x86' 0x3400043E: 05 DC.B 0x05 ; '\x05' 0x3400043F: 85 DC.B 0x85 ; '\x85' 0x34000440: 06 DC.B 0x06 ; '\x06' 0x34000441: 84 DC.B 0x84 ; '\x84' 0x34000442: 07 DC.B 0x07 ; '\x07' 0x34000443: 00 DC.B 0x00 ; '\0' 0x34000444: 00 DC.B 0x00 ; '\0' 0x34000445: 00 DC.B 0x00 ; '\0' 0x34000446: 0C DC.B 0x0C ; '\x0C' 0x34000447: 00 DC.B 0x00 ; '\0' 0x34000448: 00 DC.B 0x00 ; '\0' 0x34000449: 00 DC.B 0x00 ; '\0' 0x3400044A: BC DC.B 0xBC ; '\xBC' 0x3400044B: 73 DC.B 0x73 ; 's' 0x3400044C: 00 DC.B 0x00 ; '\0' 0x3400044D: 00 DC.B 0x00 ; '\0' 0x3400044E: 00 DC.B 0x00 ; '\0' 0x3400044F: 00 DC.B 0x00 ; '\0' 0x34000450: 00 DC.B 0x00 ; '\0' 0x34000451: 00 DC.B 0x00 ; '\0' 0x34000452: 04 DC.B 0x04 ; '\x04' 0x34000453: 00 DC.B 0x00 ; '\0' 0x34000454: 00 DC.B 0x00 ; '\0' 0x34000455: 00 DC.B 0x00 ; '\0' 0x34000456: 0C DC.B 0x0C ; '\x0C' 0x34000457: 00 DC.B 0x00 ; '\0' 0x34000458: 00 DC.B 0x00 ; '\0' 0x34000459: 00 DC.B 0x00 ; '\0' 0x3400045A: BC DC.B 0xBC ; '\xBC' 0x3400045B: 73 DC.B 0x73 ; 's' 0x3400045C: 00 DC.B 0x00 ; '\0' 0x3400045D: 00 DC.B 0x00 ; '\0' 0x3400045E: 00 DC.B 0x00 ; '\0' 0x3400045F: 00 DC.B 0x00 ; '\0' 0x34000460: 00 DC.B 0x00 ; '\0' 0x34000461: 00 DC.B 0x00 ; '\0' 0x34000462: 04 DC.B 0x04 ; '\x04' 0x34000463: 00 DC.B 0x00 ; '\0' 0x34000464: 00 DC.B 0x00 ; '\0' 0x34000465: 00 DC.B 0x00 ; '\0' 0x34000466: 1C DC.B 0x1C ; '\x1C' 0x34000467: 00 DC.B 0x00 ; '\0' 0x34000468: 00 DC.B 0x00 ; '\0' 0x34000469: 00 DC.B 0x00 ; '\0' 0x3400046A: BC DC.B 0xBC ; '\xBC' 0x3400046B: 73 DC.B 0x73 ; 's' 0x3400046C: 00 DC.B 0x00 ; '\0' 0x3400046D: 00 DC.B 0x00 ; '\0' 0x3400046E: 00 DC.B 0x00 ; '\0' 0x3400046F: 00 DC.B 0x00 ; '\0' 0x34000470: 00 DC.B 0x00 ; '\0' 0x34000471: 00 DC.B 0x00 ; '\0' 0x34000472: 80 DC.B 0x80 ; '\x80' 0x34000473: 00 DC.B 0x00 ; '\0' 0x34000474: 00 DC.B 0x00 ; '\0' 0x34000475: 00 DC.B 0x00 ; '\0' 0x34000476: 42 DC.B 0x42 ; 'B' 0x34000477: 0E DC.B 0x0E ; '\x0E' 0x34000478: 18 DC.B 0x18 ; '\x18' 0x34000479: 8E DC.B 0x8E ; '\x8E' 0x3400047A: 01 DC.B 0x01 ; '\x01' 0x3400047B: 87 DC.B 0x87 ; '\x87' 0x3400047C: 02 DC.B 0x02 ; '\x02' 0x3400047D: 86 DC.B 0x86 ; '\x86' 0x3400047E: 03 DC.B 0x03 ; '\x03' 0x3400047F: 85 DC.B 0x85 ; '\x85' 0x34000480: 04 DC.B 0x04 ; '\x04' 0x34000481: 84 DC.B 0x84 ; '\x84' 0x34000482: 05 DC.B 0x05 ; '\x05' 0x34000483: 00 DC.B 0x00 ; '\0' 0x34000484: 00 DC.B 0x00 ; '\0' 0x34000485: 00 DC.B 0x00 ; '\0' 0x34000486: 1C DC.B 0x1C ; '\x1C' 0x34000487: 00 DC.B 0x00 ; '\0' 0x34000488: 00 DC.B 0x00 ; '\0' 0x34000489: 00 DC.B 0x00 ; '\0' 0x3400048A: BC DC.B 0xBC ; '\xBC' 0x3400048B: 73 DC.B 0x73 ; 's' 0x3400048C: 00 DC.B 0x00 ; '\0' 0x3400048D: 00 DC.B 0x00 ; '\0' 0x3400048E: 00 DC.B 0x00 ; '\0' 0x3400048F: 00 DC.B 0x00 ; '\0' 0x34000490: 00 DC.B 0x00 ; '\0' 0x34000491: 00 DC.B 0x00 ; '\0' 0x34000492: 72 DC.B 0x72 ; 'r' 0x34000493: 00 DC.B 0x00 ; '\0' 0x34000494: 00 DC.B 0x00 ; '\0' 0x34000495: 00 DC.B 0x00 ; '\0' 0x34000496: 44 DC.B 0x44 ; 'D' 0x34000497: 0E DC.B 0x0E ; '\x0E' 0x34000498: 18 DC.B 0x18 ; '\x18' 0x34000499: 8E DC.B 0x8E ; '\x8E' 0x3400049A: 01 DC.B 0x01 ; '\x01' 0x3400049B: 88 DC.B 0x88 ; '\x88' 0x3400049C: 02 DC.B 0x02 ; '\x02' 0x3400049D: 87 DC.B 0x87 ; '\x87' 0x3400049E: 03 DC.B 0x03 ; '\x03' 0x3400049F: 86 DC.B 0x86 ; '\x86' 0x340004A0: 04 DC.B 0x04 ; '\x04' 0x340004A1: 85 DC.B 0x85 ; '\x85' 0x340004A2: 05 DC.B 0x05 ; '\x05' 0x340004A3: 84 DC.B 0x84 ; '\x84' 0x340004A4: 06 DC.B 0x06 ; '\x06' 0x340004A5: 00 DC.B 0x00 ; '\0' 0x340004A6: 18 DC.B 0x18 ; '\x18' 0x340004A7: 00 DC.B 0x00 ; '\0' 0x340004A8: 00 DC.B 0x00 ; '\0' 0x340004A9: 00 DC.B 0x00 ; '\0' 0x340004AA: BC DC.B 0xBC ; '\xBC' 0x340004AB: 73 DC.B 0x73 ; 's' 0x340004AC: 00 DC.B 0x00 ; '\0' 0x340004AD: 00 DC.B 0x00 ; '\0' 0x340004AE: 00 DC.B 0x00 ; '\0' 0x340004AF: 00 DC.B 0x00 ; '\0' 0x340004B0: 00 DC.B 0x00 ; '\0' 0x340004B1: 00 DC.B 0x00 ; '\0' 0x340004B2: 58 DC.B 0x58 ; 'X' 0x340004B3: 00 DC.B 0x00 ; '\0' 0x340004B4: 00 DC.B 0x00 ; '\0' 0x340004B5: 00 DC.B 0x00 ; '\0' 0x340004B6: 42 DC.B 0x42 ; 'B' 0x340004B7: 0E DC.B 0x0E ; '\x0E' 0x340004B8: 10 DC.B 0x10 ; '\x10' 0x340004B9: 8E DC.B 0x8E ; '\x8E' 0x340004BA: 01 DC.B 0x01 ; '\x01' 0x340004BB: 86 DC.B 0x86 ; '\x86' 0x340004BC: 02 DC.B 0x02 ; '\x02' 0x340004BD: 85 DC.B 0x85 ; '\x85' 0x340004BE: 03 DC.B 0x03 ; '\x03' 0x340004BF: 84 DC.B 0x84 ; '\x84' 0x340004C0: 04 DC.B 0x04 ; '\x04' 0x340004C1: 00 DC.B 0x00 ; '\0' 0x340004C2: 0C DC.B 0x0C ; '\x0C' 0x340004C3: 00 DC.B 0x00 ; '\0' 0x340004C4: 00 DC.B 0x00 ; '\0' 0x340004C5: 00 DC.B 0x00 ; '\0' 0x340004C6: BC DC.B 0xBC ; '\xBC' 0x340004C7: 73 DC.B 0x73 ; 's' 0x340004C8: 00 DC.B 0x00 ; '\0' 0x340004C9: 00 DC.B 0x00 ; '\0' 0x340004CA: 9E DC.B 0x9E ; '\x9E' 0x340004CB: 3C DC.B 0x3C ; '<' 0x340004CC: 19 DC.B 0x19 ; '\x19' 0x340004CD: 34 DC.B 0x34 ; '4' 0x340004CE: 16 DC.B 0x16 ; '\x16' 0x340004CF: 00 DC.B 0x00 ; '\0' 0x340004D0: 00 DC.B 0x00 ; '\0' 0x340004D1: 00 DC.B 0x00 ; '\0' 0x340004D2: 1C DC.B 0x1C ; '\x1C' 0x340004D3: 00 DC.B 0x00 ; '\0' 0x340004D4: 00 DC.B 0x00 ; '\0' 0x340004D5: 00 DC.B 0x00 ; '\0' 0x340004D6: BC DC.B 0xBC ; '\xBC' 0x340004D7: 73 DC.B 0x73 ; 's' 0x340004D8: 00 DC.B 0x00 ; '\0' 0x340004D9: 00 DC.B 0x00 ; '\0' 0x340004DA: B4 DC.B 0xB4 ; '\xB4' 0x340004DB: 3C DC.B 0x3C ; '<' 0x340004DC: 19 DC.B 0x19 ; '\x19' 0x340004DD: 34 DC.B 0x34 ; '4' 0x340004DE: 3A DC.B 0x3A ; ':' 0x340004DF: 00 DC.B 0x00 ; '\0' 0x340004E0: 00 DC.B 0x00 ; '\0' 0x340004E1: 00 DC.B 0x00 ; '\0' 0x340004E2: 44 DC.B 0x44 ; 'D' 0x340004E3: 0E DC.B 0x0E ; '\x0E' 0x340004E4: 18 DC.B 0x18 ; '\x18' 0x340004E5: 8E DC.B 0x8E ; '\x8E' 0x340004E6: 01 DC.B 0x01 ; '\x01' 0x340004E7: 88 DC.B 0x88 ; '\x88' 0x340004E8: 02 DC.B 0x02 ; '\x02' 0x340004E9: 87 DC.B 0x87 ; '\x87' 0x340004EA: 03 DC.B 0x03 ; '\x03' 0x340004EB: 86 DC.B 0x86 ; '\x86' 0x340004EC: 04 DC.B 0x04 ; '\x04' 0x340004ED: 85 DC.B 0x85 ; '\x85' 0x340004EE: 05 DC.B 0x05 ; '\x05' 0x340004EF: 84 DC.B 0x84 ; '\x84' 0x340004F0: 06 DC.B 0x06 ; '\x06' 0x340004F1: 00 DC.B 0x00 ; '\0' 0x340004F2: 20 DC.B 0x20 ; ' ' 0x340004F3: 00 DC.B 0x00 ; '\0' 0x340004F4: 00 DC.B 0x00 ; '\0' 0x340004F5: 00 DC.B 0x00 ; '\0' 0x340004F6: BC DC.B 0xBC ; '\xBC' 0x340004F7: 73 DC.B 0x73 ; 's' 0x340004F8: 00 DC.B 0x00 ; '\0' 0x340004F9: 00 DC.B 0x00 ; '\0' 0x340004FA: 34 DC.B 0x34 ; '4' 0x340004FB: 3F DC.B 0x3F ; '?' 0x340004FC: 19 DC.B 0x19 ; '\x19' 0x340004FD: 34 DC.B 0x34 ; '4' 0x340004FE: 58 DC.B 0x58 ; 'X' 0x340004FF: 00 DC.B 0x00 ; '\0' 0x34000500: 00 DC.B 0x00 ; '\0' 0x34000501: 00 DC.B 0x00 ; '\0' 0x34000502: 44 DC.B 0x44 ; 'D' 0x34000503: 0E DC.B 0x0E ; '\x0E' 0x34000504: 20 DC.B 0x20 ; ' ' 0x34000505: 8E DC.B 0x8E ; '\x8E' 0x34000506: 01 DC.B 0x01 ; '\x01' 0x34000507: 89 DC.B 0x89 ; '\x89' 0x34000508: 02 DC.B 0x02 ; '\x02' 0x34000509: 88 DC.B 0x88 ; '\x88' 0x3400050A: 03 DC.B 0x03 ; '\x03' 0x3400050B: 87 DC.B 0x87 ; '\x87' 0x3400050C: 04 DC.B 0x04 ; '\x04' 0x3400050D: 86 DC.B 0x86 ; '\x86' 0x3400050E: 05 DC.B 0x05 ; '\x05' 0x3400050F: 85 DC.B 0x85 ; '\x85' 0x34000510: 06 DC.B 0x06 ; '\x06' 0x34000511: 84 DC.B 0x84 ; '\x84' 0x34000512: 07 DC.B 0x07 ; '\x07' 0x34000513: 00 DC.B 0x00 ; '\0' 0x34000514: 00 DC.B 0x00 ; '\0' 0x34000515: 00 DC.B 0x00 ; '\0' 0x34000516: 18 DC.B 0x18 ; '\x18' 0x34000517: 00 DC.B 0x00 ; '\0' 0x34000518: 00 DC.B 0x00 ; '\0' 0x34000519: 00 DC.B 0x00 ; '\0' 0x3400051A: BC DC.B 0xBC ; '\xBC' 0x3400051B: 73 DC.B 0x73 ; 's' 0x3400051C: 00 DC.B 0x00 ; '\0' 0x3400051D: 00 DC.B 0x00 ; '\0' 0x3400051E: 8C DC.B 0x8C ; '\x8C' 0x3400051F: 3F DC.B 0x3F ; '?' 0x34000520: 19 DC.B 0x19 ; '\x19' 0x34000521: 34 DC.B 0x34 ; '4' 0x34000522: 58 DC.B 0x58 ; 'X' 0x34000523: 00 DC.B 0x00 ; '\0' 0x34000524: 00 DC.B 0x00 ; '\0' 0x34000525: 00 DC.B 0x00 ; '\0' 0x34000526: 42 DC.B 0x42 ; 'B' 0x34000527: 0E DC.B 0x0E ; '\x0E' 0x34000528: 10 DC.B 0x10 ; '\x10' 0x34000529: 8E DC.B 0x8E ; '\x8E' 0x3400052A: 01 DC.B 0x01 ; '\x01' 0x3400052B: 86 DC.B 0x86 ; '\x86' 0x3400052C: 02 DC.B 0x02 ; '\x02' 0x3400052D: 85 DC.B 0x85 ; '\x85' 0x3400052E: 03 DC.B 0x03 ; '\x03' 0x3400052F: 84 DC.B 0x84 ; '\x84' 0x34000530: 04 DC.B 0x04 ; '\x04' 0x34000531: 00 DC.B 0x00 ; '\0' 0x34000532: 18 DC.B 0x18 ; '\x18' 0x34000533: 00 DC.B 0x00 ; '\0' 0x34000534: 00 DC.B 0x00 ; '\0' 0x34000535: 00 DC.B 0x00 ; '\0' 0x34000536: BC DC.B 0xBC ; '\xBC' 0x34000537: 73 DC.B 0x73 ; 's' 0x34000538: 00 DC.B 0x00 ; '\0' 0x34000539: 00 DC.B 0x00 ; '\0' 0x3400053A: 00 DC.B 0x00 ; '\0' 0x3400053B: 00 DC.B 0x00 ; '\0' 0x3400053C: 00 DC.B 0x00 ; '\0' 0x3400053D: 00 DC.B 0x00 ; '\0' 0x3400053E: 28 DC.B 0x28 ; '(' 0x3400053F: 00 DC.B 0x00 ; '\0' 0x34000540: 00 DC.B 0x00 ; '\0' 0x34000541: 00 DC.B 0x00 ; '\0' 0x34000542: 42 DC.B 0x42 ; 'B' 0x34000543: 0E DC.B 0x0E ; '\x0E' 0x34000544: 10 DC.B 0x10 ; '\x10' 0x34000545: 8E DC.B 0x8E ; '\x8E' 0x34000546: 01 DC.B 0x01 ; '\x01' 0x34000547: 86 DC.B 0x86 ; '\x86' 0x34000548: 02 DC.B 0x02 ; '\x02' 0x34000549: 85 DC.B 0x85 ; '\x85' 0x3400054A: 03 DC.B 0x03 ; '\x03' 0x3400054B: 84 DC.B 0x84 ; '\x84' 0x3400054C: 04 DC.B 0x04 ; '\x04' 0x3400054D: 00 DC.B 0x00 ; '\0' 0x3400054E: 18 DC.B 0x18 ; '\x18' 0x3400054F: 00 DC.B 0x00 ; '\0' 0x34000550: 00 DC.B 0x00 ; '\0' 0x34000551: 00 DC.B 0x00 ; '\0' 0x34000552: BC DC.B 0xBC ; '\xBC' 0x34000553: 73 DC.B 0x73 ; 's' 0x34000554: 00 DC.B 0x00 ; '\0' 0x34000555: 00 DC.B 0x00 ; '\0' 0x34000556: E4 DC.B 0xE4 ; '\xE4' 0x34000557: 3F DC.B 0x3F ; '?' 0x34000558: 19 DC.B 0x19 ; '\x19' 0x34000559: 34 DC.B 0x34 ; '4' 0x3400055A: 28 DC.B 0x28 ; '(' 0x3400055B: 00 DC.B 0x00 ; '\0' 0x3400055C: 00 DC.B 0x00 ; '\0' 0x3400055D: 00 DC.B 0x00 ; '\0' 0x3400055E: 42 DC.B 0x42 ; 'B' 0x3400055F: 0E DC.B 0x0E ; '\x0E' 0x34000560: 10 DC.B 0x10 ; '\x10' 0x34000561: 8E DC.B 0x8E ; '\x8E' 0x34000562: 01 DC.B 0x01 ; '\x01' 0x34000563: 86 DC.B 0x86 ; '\x86' 0x34000564: 02 DC.B 0x02 ; '\x02' 0x34000565: 85 DC.B 0x85 ; '\x85' 0x34000566: 03 DC.B 0x03 ; '\x03' 0x34000567: 84 DC.B 0x84 ; '\x84' 0x34000568: 04 DC.B 0x04 ; '\x04' 0x34000569: 00 DC.B 0x00 ; '\0' 0x3400056A: 18 DC.B 0x18 ; '\x18' 0x3400056B: 00 DC.B 0x00 ; '\0' 0x3400056C: 00 DC.B 0x00 ; '\0' 0x3400056D: 00 DC.B 0x00 ; '\0' 0x3400056E: BC DC.B 0xBC ; '\xBC' 0x3400056F: 73 DC.B 0x73 ; 's' 0x34000570: 00 DC.B 0x00 ; '\0' 0x34000571: 00 DC.B 0x00 ; '\0' 0x34000572: 00 DC.B 0x00 ; '\0' 0x34000573: 00 DC.B 0x00 ; '\0' 0x34000574: 00 DC.B 0x00 ; '\0' 0x34000575: 00 DC.B 0x00 ; '\0' 0x34000576: 1A DC.B 0x1A ; '\x1A' 0x34000577: 00 DC.B 0x00 ; '\0' 0x34000578: 00 DC.B 0x00 ; '\0' 0x34000579: 00 DC.B 0x00 ; '\0' 0x3400057A: 42 DC.B 0x42 ; 'B' 0x3400057B: 0E DC.B 0x0E ; '\x0E' 0x3400057C: 10 DC.B 0x10 ; '\x10' 0x3400057D: 8E DC.B 0x8E ; '\x8E' 0x3400057E: 01 DC.B 0x01 ; '\x01' 0x3400057F: 85 DC.B 0x85 ; '\x85' 0x34000580: 02 DC.B 0x02 ; '\x02' 0x34000581: 84 DC.B 0x84 ; '\x84' 0x34000582: 03 DC.B 0x03 ; '\x03' 0x34000583: 00 DC.B 0x00 ; '\0' 0x34000584: 00 DC.B 0x00 ; '\0' 0x34000585: 00 DC.B 0x00 ; '\0' 0x34000586: 14 DC.B 0x14 ; '\x14' 0x34000587: 00 DC.B 0x00 ; '\0' 0x34000588: 00 DC.B 0x00 ; '\0' 0x34000589: 00 DC.B 0x00 ; '\0' 0x3400058A: BC DC.B 0xBC ; '\xBC' 0x3400058B: 73 DC.B 0x73 ; 's' 0x3400058C: 00 DC.B 0x00 ; '\0' 0x3400058D: 00 DC.B 0x00 ; '\0' 0x3400058E: 00 DC.B 0x00 ; '\0' 0x3400058F: 00 DC.B 0x00 ; '\0' 0x34000590: 00 DC.B 0x00 ; '\0' 0x34000591: 00 DC.B 0x00 ; '\0' 0x34000592: 38 DC.B 0x38 ; '8' 0x34000593: 00 DC.B 0x00 ; '\0' 0x34000594: 00 DC.B 0x00 ; '\0' 0x34000595: 00 DC.B 0x00 ; '\0' 0x34000596: 42 DC.B 0x42 ; 'B' 0x34000597: 0E DC.B 0x0E ; '\x0E' 0x34000598: 04 DC.B 0x04 ; '\x04' 0x34000599: 8E DC.B 0x8E ; '\x8E' 0x3400059A: 01 DC.B 0x01 ; '\x01' 0x3400059B: 00 DC.B 0x00 ; '\0' 0x3400059C: 00 DC.B 0x00 ; '\0' 0x3400059D: 00 DC.B 0x00 ; '\0' 0x3400059E: 18 DC.B 0x18 ; '\x18' 0x3400059F: 00 DC.B 0x00 ; '\0' 0x340005A0: 00 DC.B 0x00 ; '\0' 0x340005A1: 00 DC.B 0x00 ; '\0' 0x340005A2: BC DC.B 0xBC ; '\xBC' 0x340005A3: 73 DC.B 0x73 ; 's' 0x340005A4: 00 DC.B 0x00 ; '\0' 0x340005A5: 00 DC.B 0x00 ; '\0' 0x340005A6: 00 DC.B 0x00 ; '\0' 0x340005A7: 00 DC.B 0x00 ; '\0' 0x340005A8: 00 DC.B 0x00 ; '\0' 0x340005A9: 00 DC.B 0x00 ; '\0' 0x340005AA: 40 DC.B 0x40 ; '@' 0x340005AB: 00 DC.B 0x00 ; '\0' 0x340005AC: 00 DC.B 0x00 ; '\0' 0x340005AD: 00 DC.B 0x00 ; '\0' 0x340005AE: 42 DC.B 0x42 ; 'B' 0x340005AF: 0E DC.B 0x0E ; '\x0E' 0x340005B0: 10 DC.B 0x10 ; '\x10' 0x340005B1: 8E DC.B 0x8E ; '\x8E' 0x340005B2: 01 DC.B 0x01 ; '\x01' 0x340005B3: 86 DC.B 0x86 ; '\x86' 0x340005B4: 02 DC.B 0x02 ; '\x02' 0x340005B5: 85 DC.B 0x85 ; '\x85' 0x340005B6: 03 DC.B 0x03 ; '\x03' 0x340005B7: 84 DC.B 0x84 ; '\x84' 0x340005B8: 04 DC.B 0x04 ; '\x04' 0x340005B9: 00 DC.B 0x00 ; '\0' 0x340005BA: 18 DC.B 0x18 ; '\x18' 0x340005BB: 00 DC.B 0x00 ; '\0' 0x340005BC: 00 DC.B 0x00 ; '\0' 0x340005BD: 00 DC.B 0x00 ; '\0' 0x340005BE: BC DC.B 0xBC ; '\xBC' 0x340005BF: 73 DC.B 0x73 ; 's' 0x340005C0: 00 DC.B 0x00 ; '\0' 0x340005C1: 00 DC.B 0x00 ; '\0' 0x340005C2: 00 DC.B 0x00 ; '\0' 0x340005C3: 00 DC.B 0x00 ; '\0' 0x340005C4: 00 DC.B 0x00 ; '\0' 0x340005C5: 00 DC.B 0x00 ; '\0' 0x340005C6: 4C DC.B 0x4C ; 'L' 0x340005C7: 00 DC.B 0x00 ; '\0' 0x340005C8: 00 DC.B 0x00 ; '\0' 0x340005C9: 00 DC.B 0x00 ; '\0' 0x340005CA: 42 DC.B 0x42 ; 'B' 0x340005CB: 0E DC.B 0x0E ; '\x0E' 0x340005CC: 10 DC.B 0x10 ; '\x10' 0x340005CD: 8E DC.B 0x8E ; '\x8E' 0x340005CE: 01 DC.B 0x01 ; '\x01' 0x340005CF: 86 DC.B 0x86 ; '\x86' 0x340005D0: 02 DC.B 0x02 ; '\x02' 0x340005D1: 85 DC.B 0x85 ; '\x85' 0x340005D2: 03 DC.B 0x03 ; '\x03' 0x340005D3: 84 DC.B 0x84 ; '\x84' 0x340005D4: 04 DC.B 0x04 ; '\x04' 0x340005D5: 00 DC.B 0x00 ; '\0' 0x340005D6: 14 DC.B 0x14 ; '\x14' 0x340005D7: 00 DC.B 0x00 ; '\0' 0x340005D8: 00 DC.B 0x00 ; '\0' 0x340005D9: 00 DC.B 0x00 ; '\0' 0x340005DA: BC DC.B 0xBC ; '\xBC' 0x340005DB: 73 DC.B 0x73 ; 's' 0x340005DC: 00 DC.B 0x00 ; '\0' 0x340005DD: 00 DC.B 0x00 ; '\0' 0x340005DE: 00 DC.B 0x00 ; '\0' 0x340005DF: 00 DC.B 0x00 ; '\0' 0x340005E0: 00 DC.B 0x00 ; '\0' 0x340005E1: 00 DC.B 0x00 ; '\0' 0x340005E2: 1E DC.B 0x1E ; '\x1E' 0x340005E3: 00 DC.B 0x00 ; '\0' 0x340005E4: 00 DC.B 0x00 ; '\0' 0x340005E5: 00 DC.B 0x00 ; '\0' 0x340005E6: 42 DC.B 0x42 ; 'B' 0x340005E7: 0E DC.B 0x0E ; '\x0E' 0x340005E8: 08 DC.B 0x08 ; '\b' 0x340005E9: 8E DC.B 0x8E ; '\x8E' 0x340005EA: 01 DC.B 0x01 ; '\x01' 0x340005EB: 00 DC.B 0x00 ; '\0' 0x340005EC: 00 DC.B 0x00 ; '\0' 0x340005ED: 00 DC.B 0x00 ; '\0' 0x340005EE: 14 DC.B 0x14 ; '\x14' 0x340005EF: 00 DC.B 0x00 ; '\0' 0x340005F0: 00 DC.B 0x00 ; '\0' 0x340005F1: 00 DC.B 0x00 ; '\0' 0x340005F2: BC DC.B 0xBC ; '\xBC' 0x340005F3: 73 DC.B 0x73 ; 's' 0x340005F4: 00 DC.B 0x00 ; '\0' 0x340005F5: 00 DC.B 0x00 ; '\0' 0x340005F6: 00 DC.B 0x00 ; '\0' 0x340005F7: 00 DC.B 0x00 ; '\0' 0x340005F8: 00 DC.B 0x00 ; '\0' 0x340005F9: 00 DC.B 0x00 ; '\0' 0x340005FA: 0C DC.B 0x0C ; '\x0C' 0x340005FB: 00 DC.B 0x00 ; '\0' 0x340005FC: 00 DC.B 0x00 ; '\0' 0x340005FD: 00 DC.B 0x00 ; '\0' 0x340005FE: 42 DC.B 0x42 ; 'B' 0x340005FF: 0E DC.B 0x0E ; '\x0E' 0x34000600: 08 DC.B 0x08 ; '\b' 0x34000601: 8E DC.B 0x8E ; '\x8E' 0x34000602: 01 DC.B 0x01 ; '\x01' 0x34000603: 00 DC.B 0x00 ; '\0' 0x34000604: 00 DC.B 0x00 ; '\0' 0x34000605: 00 DC.B 0x00 ; '\0' 0x34000606: 14 DC.B 0x14 ; '\x14' 0x34000607: 00 DC.B 0x00 ; '\0' 0x34000608: 00 DC.B 0x00 ; '\0' 0x34000609: 00 DC.B 0x00 ; '\0' 0x3400060A: BC DC.B 0xBC ; '\xBC' 0x3400060B: 73 DC.B 0x73 ; 's' 0x3400060C: 00 DC.B 0x00 ; '\0' 0x3400060D: 00 DC.B 0x00 ; '\0' 0x3400060E: 00 DC.B 0x00 ; '\0' 0x3400060F: 00 DC.B 0x00 ; '\0' 0x34000610: 00 DC.B 0x00 ; '\0' 0x34000611: 00 DC.B 0x00 ; '\0' 0x34000612: 20 DC.B 0x20 ; ' ' 0x34000613: 00 DC.B 0x00 ; '\0' 0x34000614: 00 DC.B 0x00 ; '\0' 0x34000615: 00 DC.B 0x00 ; '\0' 0x34000616: 42 DC.B 0x42 ; 'B' 0x34000617: 0E DC.B 0x0E ; '\x0E' 0x34000618: 08 DC.B 0x08 ; '\b' 0x34000619: 8E DC.B 0x8E ; '\x8E' 0x3400061A: 01 DC.B 0x01 ; '\x01' 0x3400061B: 84 DC.B 0x84 ; '\x84' 0x3400061C: 02 DC.B 0x02 ; '\x02' 0x3400061D: 00 DC.B 0x00 ; '\0' 0x3400061E: 0C DC.B 0x0C ; '\x0C' 0x3400061F: 00 DC.B 0x00 ; '\0' 0x34000620: 00 DC.B 0x00 ; '\0' 0x34000621: 00 DC.B 0x00 ; '\0' 0x34000622: BC DC.B 0xBC ; '\xBC' 0x34000623: 73 DC.B 0x73 ; 's' 0x34000624: 00 DC.B 0x00 ; '\0' 0x34000625: 00 DC.B 0x00 ; '\0' 0x34000626: 00 DC.B 0x00 ; '\0' 0x34000627: 00 DC.B 0x00 ; '\0' 0x34000628: 00 DC.B 0x00 ; '\0' 0x34000629: 00 DC.B 0x00 ; '\0' 0x3400062A: 18 DC.B 0x18 ; '\x18' 0x3400062B: 00 DC.B 0x00 ; '\0' 0x3400062C: 00 DC.B 0x00 ; '\0' 0x3400062D: 00 DC.B 0x00 ; '\0' 0x3400062E: 0C DC.B 0x0C ; '\x0C' 0x3400062F: 00 DC.B 0x00 ; '\0' 0x34000630: 00 DC.B 0x00 ; '\0' 0x34000631: 00 DC.B 0x00 ; '\0' 0x34000632: BC DC.B 0xBC ; '\xBC' 0x34000633: 73 DC.B 0x73 ; 's' 0x34000634: 00 DC.B 0x00 ; '\0' 0x34000635: 00 DC.B 0x00 ; '\0' 0x34000636: 00 DC.B 0x00 ; '\0' 0x34000637: 00 DC.B 0x00 ; '\0' 0x34000638: 00 DC.B 0x00 ; '\0' 0x34000639: 00 DC.B 0x00 ; '\0' 0x3400063A: 18 DC.B 0x18 ; '\x18' 0x3400063B: 00 DC.B 0x00 ; '\0' 0x3400063C: 00 DC.B 0x00 ; '\0' 0x3400063D: 00 DC.B 0x00 ; '\0' 0x3400063E: 20 DC.B 0x20 ; ' ' 0x3400063F: 00 DC.B 0x00 ; '\0' 0x34000640: 00 DC.B 0x00 ; '\0' 0x34000641: 00 DC.B 0x00 ; '\0' 0x34000642: BC DC.B 0xBC ; '\xBC' 0x34000643: 73 DC.B 0x73 ; 's' 0x34000644: 00 DC.B 0x00 ; '\0' 0x34000645: 00 DC.B 0x00 ; '\0' 0x34000646: 00 DC.B 0x00 ; '\0' 0x34000647: 00 DC.B 0x00 ; '\0' 0x34000648: 00 DC.B 0x00 ; '\0' 0x34000649: 00 DC.B 0x00 ; '\0' 0x3400064A: 60 DC.B 0x60 ; '`' 0x3400064B: 00 DC.B 0x00 ; '\0' 0x3400064C: 00 DC.B 0x00 ; '\0' 0x3400064D: 00 DC.B 0x00 ; '\0' 0x3400064E: 44 DC.B 0x44 ; 'D' 0x3400064F: 0E DC.B 0x0E ; '\x0E' 0x34000650: 20 DC.B 0x20 ; ' ' 0x34000651: 8E DC.B 0x8E ; '\x8E' 0x34000652: 01 DC.B 0x01 ; '\x01' 0x34000653: 89 DC.B 0x89 ; '\x89' 0x34000654: 02 DC.B 0x02 ; '\x02' 0x34000655: 88 DC.B 0x88 ; '\x88' 0x34000656: 03 DC.B 0x03 ; '\x03' 0x34000657: 87 DC.B 0x87 ; '\x87' 0x34000658: 04 DC.B 0x04 ; '\x04' 0x34000659: 86 DC.B 0x86 ; '\x86' 0x3400065A: 05 DC.B 0x05 ; '\x05' 0x3400065B: 85 DC.B 0x85 ; '\x85' 0x3400065C: 06 DC.B 0x06 ; '\x06' 0x3400065D: 84 DC.B 0x84 ; '\x84' 0x3400065E: 07 DC.B 0x07 ; '\x07' 0x3400065F: 00 DC.B 0x00 ; '\0' 0x34000660: 00 DC.B 0x00 ; '\0' 0x34000661: 00 DC.B 0x00 ; '\0' 0x34000662: 20 DC.B 0x20 ; ' ' 0x34000663: 00 DC.B 0x00 ; '\0' 0x34000664: 00 DC.B 0x00 ; '\0' 0x34000665: 00 DC.B 0x00 ; '\0' 0x34000666: BC DC.B 0xBC ; '\xBC' 0x34000667: 73 DC.B 0x73 ; 's' 0x34000668: 00 DC.B 0x00 ; '\0' 0x34000669: 00 DC.B 0x00 ; '\0' 0x3400066A: 00 DC.B 0x00 ; '\0' 0x3400066B: 00 DC.B 0x00 ; '\0' 0x3400066C: 00 DC.B 0x00 ; '\0' 0x3400066D: 00 DC.B 0x00 ; '\0' 0x3400066E: 60 DC.B 0x60 ; '`' 0x3400066F: 00 DC.B 0x00 ; '\0' 0x34000670: 00 DC.B 0x00 ; '\0' 0x34000671: 00 DC.B 0x00 ; '\0' 0x34000672: 44 DC.B 0x44 ; 'D' 0x34000673: 0E DC.B 0x0E ; '\x0E' 0x34000674: 20 DC.B 0x20 ; ' ' 0x34000675: 8E DC.B 0x8E ; '\x8E' 0x34000676: 01 DC.B 0x01 ; '\x01' 0x34000677: 89 DC.B 0x89 ; '\x89' 0x34000678: 02 DC.B 0x02 ; '\x02' 0x34000679: 88 DC.B 0x88 ; '\x88' 0x3400067A: 03 DC.B 0x03 ; '\x03' 0x3400067B: 87 DC.B 0x87 ; '\x87' 0x3400067C: 04 DC.B 0x04 ; '\x04' 0x3400067D: 86 DC.B 0x86 ; '\x86' 0x3400067E: 05 DC.B 0x05 ; '\x05' 0x3400067F: 85 DC.B 0x85 ; '\x85' 0x34000680: 06 DC.B 0x06 ; '\x06' 0x34000681: 84 DC.B 0x84 ; '\x84' 0x34000682: 07 DC.B 0x07 ; '\x07' 0x34000683: 00 DC.B 0x00 ; '\0' 0x34000684: 00 DC.B 0x00 ; '\0' 0x34000685: 00 DC.B 0x00 ; '\0' 0x34000686: 20 DC.B 0x20 ; ' ' 0x34000687: 00 DC.B 0x00 ; '\0' 0x34000688: 00 DC.B 0x00 ; '\0' 0x34000689: 00 DC.B 0x00 ; '\0' 0x3400068A: BC DC.B 0xBC ; '\xBC' 0x3400068B: 73 DC.B 0x73 ; 's' 0x3400068C: 00 DC.B 0x00 ; '\0' 0x3400068D: 00 DC.B 0x00 ; '\0' 0x3400068E: 00 DC.B 0x00 ; '\0' 0x3400068F: 00 DC.B 0x00 ; '\0' 0x34000690: 00 DC.B 0x00 ; '\0' 0x34000691: 00 DC.B 0x00 ; '\0' 0x34000692: 52 DC.B 0x52 ; 'R' 0x34000693: 00 DC.B 0x00 ; '\0' 0x34000694: 00 DC.B 0x00 ; '\0' 0x34000695: 00 DC.B 0x00 ; '\0' 0x34000696: 44 DC.B 0x44 ; 'D' 0x34000697: 0E DC.B 0x0E ; '\x0E' 0x34000698: 20 DC.B 0x20 ; ' ' 0x34000699: 8E DC.B 0x8E ; '\x8E' 0x3400069A: 01 DC.B 0x01 ; '\x01' 0x3400069B: 89 DC.B 0x89 ; '\x89' 0x3400069C: 02 DC.B 0x02 ; '\x02' 0x3400069D: 88 DC.B 0x88 ; '\x88' 0x3400069E: 03 DC.B 0x03 ; '\x03' 0x3400069F: 87 DC.B 0x87 ; '\x87' 0x340006A0: 04 DC.B 0x04 ; '\x04' 0x340006A1: 86 DC.B 0x86 ; '\x86' 0x340006A2: 05 DC.B 0x05 ; '\x05' 0x340006A3: 85 DC.B 0x85 ; '\x85' 0x340006A4: 06 DC.B 0x06 ; '\x06' 0x340006A5: 84 DC.B 0x84 ; '\x84' 0x340006A6: 07 DC.B 0x07 ; '\x07' 0x340006A7: 00 DC.B 0x00 ; '\0' 0x340006A8: 00 DC.B 0x00 ; '\0' 0x340006A9: 00 DC.B 0x00 ; '\0' 0x340006AA: 20 DC.B 0x20 ; ' ' 0x340006AB: 00 DC.B 0x00 ; '\0' 0x340006AC: 00 DC.B 0x00 ; '\0' 0x340006AD: 00 DC.B 0x00 ; '\0' 0x340006AE: BC DC.B 0xBC ; '\xBC' 0x340006AF: 73 DC.B 0x73 ; 's' 0x340006B0: 00 DC.B 0x00 ; '\0' 0x340006B1: 00 DC.B 0x00 ; '\0' 0x340006B2: 00 DC.B 0x00 ; '\0' 0x340006B3: 00 DC.B 0x00 ; '\0' 0x340006B4: 00 DC.B 0x00 ; '\0' 0x340006B5: 00 DC.B 0x00 ; '\0' 0x340006B6: 52 DC.B 0x52 ; 'R' 0x340006B7: 00 DC.B 0x00 ; '\0' 0x340006B8: 00 DC.B 0x00 ; '\0' 0x340006B9: 00 DC.B 0x00 ; '\0' 0x340006BA: 44 DC.B 0x44 ; 'D' 0x340006BB: 0E DC.B 0x0E ; '\x0E' 0x340006BC: 20 DC.B 0x20 ; ' ' 0x340006BD: 8E DC.B 0x8E ; '\x8E' 0x340006BE: 01 DC.B 0x01 ; '\x01' 0x340006BF: 89 DC.B 0x89 ; '\x89' 0x340006C0: 02 DC.B 0x02 ; '\x02' 0x340006C1: 88 DC.B 0x88 ; '\x88' 0x340006C2: 03 DC.B 0x03 ; '\x03' 0x340006C3: 87 DC.B 0x87 ; '\x87' 0x340006C4: 04 DC.B 0x04 ; '\x04' 0x340006C5: 86 DC.B 0x86 ; '\x86' 0x340006C6: 05 DC.B 0x05 ; '\x05' 0x340006C7: 85 DC.B 0x85 ; '\x85' 0x340006C8: 06 DC.B 0x06 ; '\x06' 0x340006C9: 84 DC.B 0x84 ; '\x84' 0x340006CA: 07 DC.B 0x07 ; '\x07' 0x340006CB: 00 DC.B 0x00 ; '\0' 0x340006CC: 00 DC.B 0x00 ; '\0' 0x340006CD: 00 DC.B 0x00 ; '\0' 0x340006CE: 18 DC.B 0x18 ; '\x18' 0x340006CF: 00 DC.B 0x00 ; '\0' 0x340006D0: 00 DC.B 0x00 ; '\0' 0x340006D1: 00 DC.B 0x00 ; '\0' 0x340006D2: BC DC.B 0xBC ; '\xBC' 0x340006D3: 73 DC.B 0x73 ; 's' 0x340006D4: 00 DC.B 0x00 ; '\0' 0x340006D5: 00 DC.B 0x00 ; '\0' 0x340006D6: 00 DC.B 0x00 ; '\0' 0x340006D7: 00 DC.B 0x00 ; '\0' 0x340006D8: 00 DC.B 0x00 ; '\0' 0x340006D9: 00 DC.B 0x00 ; '\0' 0x340006DA: 30 DC.B 0x30 ; '0' 0x340006DB: 00 DC.B 0x00 ; '\0' 0x340006DC: 00 DC.B 0x00 ; '\0' 0x340006DD: 00 DC.B 0x00 ; '\0' 0x340006DE: 42 DC.B 0x42 ; 'B' 0x340006DF: 0E DC.B 0x0E ; '\x0E' 0x340006E0: 10 DC.B 0x10 ; '\x10' 0x340006E1: 8E DC.B 0x8E ; '\x8E' 0x340006E2: 01 DC.B 0x01 ; '\x01' 0x340006E3: 86 DC.B 0x86 ; '\x86' 0x340006E4: 02 DC.B 0x02 ; '\x02' 0x340006E5: 85 DC.B 0x85 ; '\x85' 0x340006E6: 03 DC.B 0x03 ; '\x03' 0x340006E7: 84 DC.B 0x84 ; '\x84' 0x340006E8: 04 DC.B 0x04 ; '\x04' 0x340006E9: 00 DC.B 0x00 ; '\0' 0x340006EA: 18 DC.B 0x18 ; '\x18' 0x340006EB: 00 DC.B 0x00 ; '\0' 0x340006EC: 00 DC.B 0x00 ; '\0' 0x340006ED: 00 DC.B 0x00 ; '\0' 0x340006EE: BC DC.B 0xBC ; '\xBC' 0x340006EF: 73 DC.B 0x73 ; 's' 0x340006F0: 00 DC.B 0x00 ; '\0' 0x340006F1: 00 DC.B 0x00 ; '\0' 0x340006F2: 00 DC.B 0x00 ; '\0' 0x340006F3: 00 DC.B 0x00 ; '\0' 0x340006F4: 00 DC.B 0x00 ; '\0' 0x340006F5: 00 DC.B 0x00 ; '\0' 0x340006F6: 30 DC.B 0x30 ; '0' 0x340006F7: 00 DC.B 0x00 ; '\0' 0x340006F8: 00 DC.B 0x00 ; '\0' 0x340006F9: 00 DC.B 0x00 ; '\0' 0x340006FA: 42 DC.B 0x42 ; 'B' 0x340006FB: 0E DC.B 0x0E ; '\x0E' 0x340006FC: 10 DC.B 0x10 ; '\x10' 0x340006FD: 8E DC.B 0x8E ; '\x8E' 0x340006FE: 01 DC.B 0x01 ; '\x01' 0x340006FF: 86 DC.B 0x86 ; '\x86' 0x34000700: 02 DC.B 0x02 ; '\x02' 0x34000701: 85 DC.B 0x85 ; '\x85' 0x34000702: 03 DC.B 0x03 ; '\x03' 0x34000703: 84 DC.B 0x84 ; '\x84' 0x34000704: 04 DC.B 0x04 ; '\x04' 0x34000705: 00 DC.B 0x00 ; '\0' 0x34000706: 18 DC.B 0x18 ; '\x18' 0x34000707: 00 DC.B 0x00 ; '\0' 0x34000708: 00 DC.B 0x00 ; '\0' 0x34000709: 00 DC.B 0x00 ; '\0' 0x3400070A: BC DC.B 0xBC ; '\xBC' 0x3400070B: 73 DC.B 0x73 ; 's' 0x3400070C: 00 DC.B 0x00 ; '\0' 0x3400070D: 00 DC.B 0x00 ; '\0' 0x3400070E: 00 DC.B 0x00 ; '\0' 0x3400070F: 00 DC.B 0x00 ; '\0' 0x34000710: 00 DC.B 0x00 ; '\0' 0x34000711: 00 DC.B 0x00 ; '\0' 0x34000712: 30 DC.B 0x30 ; '0' 0x34000713: 00 DC.B 0x00 ; '\0' 0x34000714: 00 DC.B 0x00 ; '\0' 0x34000715: 00 DC.B 0x00 ; '\0' 0x34000716: 42 DC.B 0x42 ; 'B' 0x34000717: 0E DC.B 0x0E ; '\x0E' 0x34000718: 10 DC.B 0x10 ; '\x10' 0x34000719: 8E DC.B 0x8E ; '\x8E' 0x3400071A: 01 DC.B 0x01 ; '\x01' 0x3400071B: 86 DC.B 0x86 ; '\x86' 0x3400071C: 02 DC.B 0x02 ; '\x02' 0x3400071D: 85 DC.B 0x85 ; '\x85' 0x3400071E: 03 DC.B 0x03 ; '\x03' 0x3400071F: 84 DC.B 0x84 ; '\x84' 0x34000720: 04 DC.B 0x04 ; '\x04' 0x34000721: 00 DC.B 0x00 ; '\0' 0x34000722: 18 DC.B 0x18 ; '\x18' 0x34000723: 00 DC.B 0x00 ; '\0' 0x34000724: 00 DC.B 0x00 ; '\0' 0x34000725: 00 DC.B 0x00 ; '\0' 0x34000726: BC DC.B 0xBC ; '\xBC' 0x34000727: 73 DC.B 0x73 ; 's' 0x34000728: 00 DC.B 0x00 ; '\0' 0x34000729: 00 DC.B 0x00 ; '\0' 0x3400072A: 00 DC.B 0x00 ; '\0' 0x3400072B: 00 DC.B 0x00 ; '\0' 0x3400072C: 00 DC.B 0x00 ; '\0' 0x3400072D: 00 DC.B 0x00 ; '\0' 0x3400072E: 30 DC.B 0x30 ; '0' 0x3400072F: 00 DC.B 0x00 ; '\0' 0x34000730: 00 DC.B 0x00 ; '\0' 0x34000731: 00 DC.B 0x00 ; '\0' 0x34000732: 42 DC.B 0x42 ; 'B' 0x34000733: 0E DC.B 0x0E ; '\x0E' 0x34000734: 10 DC.B 0x10 ; '\x10' 0x34000735: 8E DC.B 0x8E ; '\x8E' 0x34000736: 01 DC.B 0x01 ; '\x01' 0x34000737: 86 DC.B 0x86 ; '\x86' 0x34000738: 02 DC.B 0x02 ; '\x02' 0x34000739: 85 DC.B 0x85 ; '\x85' 0x3400073A: 03 DC.B 0x03 ; '\x03' 0x3400073B: 84 DC.B 0x84 ; '\x84' 0x3400073C: 04 DC.B 0x04 ; '\x04' 0x3400073D: 00 DC.B 0x00 ; '\0' 0x3400073E: 0C DC.B 0x0C ; '\x0C' 0x3400073F: 00 DC.B 0x00 ; '\0' 0x34000740: 00 DC.B 0x00 ; '\0' 0x34000741: 00 DC.B 0x00 ; '\0' 0x34000742: BC DC.B 0xBC ; '\xBC' 0x34000743: 73 DC.B 0x73 ; 's' 0x34000744: 00 DC.B 0x00 ; '\0' 0x34000745: 00 DC.B 0x00 ; '\0' 0x34000746: 00 DC.B 0x00 ; '\0' 0x34000747: 00 DC.B 0x00 ; '\0' 0x34000748: 00 DC.B 0x00 ; '\0' 0x34000749: 00 DC.B 0x00 ; '\0' 0x3400074A: 04 DC.B 0x04 ; '\x04' 0x3400074B: 00 DC.B 0x00 ; '\0' 0x3400074C: 00 DC.B 0x00 ; '\0' 0x3400074D: 00 DC.B 0x00 ; '\0' 0x3400074E: 18 DC.B 0x18 ; '\x18' 0x3400074F: 00 DC.B 0x00 ; '\0' 0x34000750: 00 DC.B 0x00 ; '\0' 0x34000751: 00 DC.B 0x00 ; '\0' 0x34000752: BC DC.B 0xBC ; '\xBC' 0x34000753: 73 DC.B 0x73 ; 's' 0x34000754: 00 DC.B 0x00 ; '\0' 0x34000755: 00 DC.B 0x00 ; '\0' 0x34000756: 00 DC.B 0x00 ; '\0' 0x34000757: 00 DC.B 0x00 ; '\0'

Section .bss.libc._acDownBuffer from SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=16, align=1


_acDownBuffer: 0x34000758: 00 DC.B 0x00 ; '\0' 0x34000759: 53 DC.B 0x53 ; 'S' 0x3400075A: 45 DC.B 0x45 ; 'E' 0x3400075B: 47 DC.B 0x47 ; 'G' 0x3400075C: 47 DC.B 0x47 ; 'G' 0x3400075D: 45 DC.B 0x45 ; 'E' 0x3400075E: 52 DC.B 0x52 ; 'R' 0x3400075F: 20 DC.B 0x20 ; ' ' 0x34000760: 43 DC.B 0x43 ; 'C' 0x34000761: 2F DC.B 0x2F ; '/' 0x34000762: 43 DC.B 0x43 ; 'C' 0x34000763: 2B DC.B 0x2B ; '+' 0x34000764: 2B DC.B 0x2B ; '+' 0x34000765: 20 DC.B 0x20 ; ' ' 0x34000766: 63 DC.B 0x63 ; 'c' 0x34000767: 6F DC.B 0x6F ; 'o'

Section .data.libc.__SEGGER_RTL_global_locale from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=20, align=4


__SEGGER_RTL_global_locale: __RAL_global_locale: 0x34000768: 3418D7F0 DC.W __SEGGER_RTL_c_locale 0x3400076C: 3418D7F0 DC.W __SEGGER_RTL_c_locale 0x34000770: 3418D7F0 DC.W __SEGGER_RTL_c_locale 0x34000774: 3418D7F0 DC.W __SEGGER_RTL_c_locale 0x34000778: 3418D7F0 DC.W __SEGGER_RTL_c_locale

Section .data.uwTickPrio from blto2_FSBL_lto.o, size=4, align=4


uwTickPrio: 0x3400077C: 10 DC.B 0x10 ; '\x10' 0x3400077D: 00 DC.B 0x00 ; '\0' 0x3400077E: 00 DC.B 0x00 ; '\0' 0x3400077F: 00 DC.B 0x00 ; '\0'

Section .data.libc.stdout from prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=4, align=4


stdout: 0x34000780: 34000344 DC.W __SEGGER_RTL_stdout_file

Section .data.libc.stdin from prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=4, align=4


stdin: 0x34000784: 34000348 DC.W __SEGGER_RTL_stdin_file

Section .data.libc.stderr from prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=4, align=4


stderr: 0x34000788: 3400034C DC.W __SEGGER_RTL_stderr_file

Section .data.SystemCoreClock from blto2_FSBL_lto.o, size=4, align=4


SystemCoreClock: 0x3400078C: 00 DC.B 0x00 ; '\0' 0x3400078D: 90 DC.B 0x90 ; '\x90' 0x3400078E: D0 DC.B 0xD0 ; '\xD0' 0x3400078F: 03 DC.B 0x03 ; '\x03'

Section .data.uwTickFreq from blto2_FSBL_lto.o, size=1, align=1


uwTickFreq: 0x34000790: 01 DC.B 0x01 ; '\x01'

Section .bss.block.stack from [ Linker created ], size=8192, align=8

(34062000-34063FFF excluded)

Section .vectors from stm32n657xx_Vectors.o, size=844, align=1024


_vectors: g_pfnVectors: 0x34180400: 34064000 DC.W 34064000 ; R_ARM_ABS32 0x34180404: 3418D4F9 DC.W reset_handler 0x34180408: 3418DCA9 DC.W NMI_Handler 0x3418040C: 3418DCAD DC.W HardFault_Handler 0x34180410: 3418DCB1 DC.W MemManage_Handler 0x34180414: 3418DCB5 DC.W BusFault_Handler 0x34180418: 3418DCB9 DC.W UsageFault_Handler 0x3418041C: 00 DC.B 0x00 ; '\0' 0x3418041D: 00 DC.B 0x00 ; '\0' 0x3418041E: 00 DC.B 0x00 ; '\0' 0x3418041F: 00 DC.B 0x00 ; '\0' 0x34180420: 00 DC.B 0x00 ; '\0' 0x34180421: 00 DC.B 0x00 ; '\0' 0x34180422: 00 DC.B 0x00 ; '\0' 0x34180423: 00 DC.B 0x00 ; '\0' 0x34180424: 00 DC.B 0x00 ; '\0' 0x34180425: 00 DC.B 0x00 ; '\0' 0x34180426: 00 DC.B 0x00 ; '\0' 0x34180427: 00 DC.B 0x00 ; '\0' 0x34180428: 00 DC.B 0x00 ; '\0' 0x34180429: 00 DC.B 0x00 ; '\0' 0x3418042A: 00 DC.B 0x00 ; '\0' 0x3418042B: 00 DC.B 0x00 ; '\0' 0x3418042C: 3418DCBD DC.W SVC_Handler 0x34180430: 3418DCC1 DC.W DebugMon_Handler 0x34180434: 00 DC.B 0x00 ; '\0' 0x34180435: 00 DC.B 0x00 ; '\0' 0x34180436: 00 DC.B 0x00 ; '\0' 0x34180437: 00 DC.B 0x00 ; '\0' 0x34180438: 3418DCC5 DC.W PendSV_Handler 0x3418043C: 341813D5 DC.W SysTick_Handler 0x34180440: 3418D8CF DC.W PVD_PVM_IRQHandler 0x34180444: 00 DC.B 0x00 ; '\0' 0x34180445: 00 DC.B 0x00 ; '\0' 0x34180446: 00 DC.B 0x00 ; '\0' 0x34180447: 00 DC.B 0x00 ; '\0' 0x34180448: 3418D957 DC.W DTS_IRQHandler 0x3418044C: 3418D97B DC.W RCC_IRQHandler 0x34180450: 3418DAE7 DC.W LOCKUP_IRQHandler 0x34180454: 3418DBE7 DC.W CACHE_ECC_IRQHandler 0x34180458: 3418DC77 DC.W TCM_ECC_IRQHandler 0x3418045C: 3418DC9B DC.W BCK_ECC_IRQHandler 0x34180460: 3418DCA7 DC.W FPU_IRQHandler 0x34180464: 00 DC.B 0x00 ; '\0' 0x34180465: 00 DC.B 0x00 ; '\0' 0x34180466: 00 DC.B 0x00 ; '\0' 0x34180467: 00 DC.B 0x00 ; '\0' 0x34180468: 3418DCAB DC.W RTC_S_IRQHandler 0x3418046C: 3418DCAF DC.W TAMP_IRQHandler 0x34180470: 3418DCB3 DC.W RIFSC_TAMPER_IRQHandler 0x34180474: 3418DCB7 DC.W IAC_IRQHandler 0x34180478: 3418DCBB DC.W RCC_S_IRQHandler 0x3418047C: 00 DC.B 0x00 ; '\0' 0x3418047D: 00 DC.B 0x00 ; '\0' 0x3418047E: 00 DC.B 0x00 ; '\0' 0x3418047F: 00 DC.B 0x00 ; '\0' 0x34180480: 3418DCBF DC.W RTC_IRQHandler 0x34180484: 00 DC.B 0x00 ; '\0' 0x34180485: 00 DC.B 0x00 ; '\0' 0x34180486: 00 DC.B 0x00 ; '\0' 0x34180487: 00 DC.B 0x00 ; '\0' 0x34180488: 3418DCC3 DC.W IWDG_IRQHandler 0x3418048C: 3418DCC7 DC.W WWDG_IRQHandler 0x34180490: 3418DEC7 DC.W EXTI0_IRQHandler 0x34180494: 3418DF47 DC.W EXTI1_IRQHandler 0x34180498: 3418DF6B DC.W EXTI2_IRQHandler 0x3418049C: 3418DF8F DC.W EXTI3_IRQHandler 0x341804A0: 3418DFB3 DC.W EXTI4_IRQHandler 0x341804A4: 3418E033 DC.W EXTI5_IRQHandler 0x341804A8: 3418E04F DC.W EXTI6_IRQHandler 0x341804AC: 3418E08B DC.W EXTI7_IRQHandler 0x341804B0: 3418E09F DC.W EXTI8_IRQHandler 0x341804B4: 3418E19B DC.W EXTI9_IRQHandler 0x341804B8: 3418E2F3 DC.W EXTI10_IRQHandler 0x341804BC: 3418E333 DC.W EXTI11_IRQHandler 0x341804C0: 3418E373 DC.W EXTI12_IRQHandler 0x341804C4: 3418E3C3 DC.W EXTI13_IRQHandler 0x341804C8: 3418E42B DC.W EXTI14_IRQHandler 0x341804CC: 3418E49F DC.W EXTI15_IRQHandler 0x341804D0: 3418E513 DC.W SAES_IRQHandler 0x341804D4: 3418E5F7 DC.W CRYP_IRQHandler 0x341804D8: 3418E60B DC.W PKA_IRQHandler 0x341804DC: 3418E61B DC.W HASH_IRQHandler 0x341804E0: 3418F117 DC.W RNG_IRQHandler 0x341804E4: 00 DC.B 0x00 ; '\0' 0x341804E5: 00 DC.B 0x00 ; '\0' 0x341804E6: 00 DC.B 0x00 ; '\0' 0x341804E7: 00 DC.B 0x00 ; '\0' 0x341804E8: 3418F137 DC.W MCE1_IRQHandler 0x341804EC: 3418F147 DC.W MCE2_IRQHandler 0x341804F0: 3418F167 DC.W MCE3_IRQHandler 0x341804F4: 3418F177 DC.W MCE4_IRQHandler 0x341804F8: 3418F187 DC.W ADC1_2_IRQHandler 0x341804FC: 3418F197 DC.W CSI_IRQHandler 0x34180500: 3418F1A7 DC.W DCMIPP_IRQHandler 0x34180504: 00 DC.B 0x00 ; '\0' 0x34180505: 00 DC.B 0x00 ; '\0' 0x34180506: 00 DC.B 0x00 ; '\0' 0x34180507: 00 DC.B 0x00 ; '\0' 0x34180508: 00 DC.B 0x00 ; '\0' 0x34180509: 00 DC.B 0x00 ; '\0' 0x3418050A: 00 DC.B 0x00 ; '\0' 0x3418050B: 00 DC.B 0x00 ; '\0' 0x3418050C: 00 DC.B 0x00 ; '\0' 0x3418050D: 00 DC.B 0x00 ; '\0' 0x3418050E: 00 DC.B 0x00 ; '\0' 0x3418050F: 00 DC.B 0x00 ; '\0' 0x34180510: 3418F283 DC.W PAHB_ERR_IRQHandler 0x34180514: 3418F5D3 DC.W NPU0_IRQHandler 0x34180518: 3418F633 DC.W NPU1_IRQHandler 0x3418051C: 3418FFF7 DC.W NPU2_IRQHandler 0x34180520: 341900E3 DC.W NPU3_IRQHandler 0x34180524: 341900F3 DC.W CACHEAXI_IRQHandler 0x34180528: 341901E3 DC.W LTDC_LO_IRQHandler 0x3418052C: 341901FB DC.W LTDC_LO_ERR_IRQHandler 0x34180530: 34190217 DC.W DMA2D_IRQHandler 0x34180534: 3419022F DC.W JPEG_IRQHandler 0x34180538: 3419023F DC.W VENC_IRQHandler 0x3418053C: 3419024F DC.W GFXMMU_IRQHandler 0x34180540: 3419025F DC.W GFXTIM_IRQHandler 0x34180544: 3419026F DC.W GPU2D_IRQHandler 0x34180548: 3419027F DC.W GPU2D_ER_IRQHandler 0x3418054C: 3419028F DC.W ICACHE_IRQHandler 0x34180550: 341902A3 DC.W HPDMA1_Channel0_IRQHandler 0x34180554: 341902B7 DC.W HPDMA1_Channel1_IRQHandler 0x34180558: 341902D7 DC.W HPDMA1_Channel2_IRQHandler 0x3418055C: 341902EF DC.W HPDMA1_Channel3_IRQHandler 0x34180560: 34190307 DC.W HPDMA1_Channel4_IRQHandler 0x34180564: 3419031F DC.W HPDMA1_Channel5_IRQHandler 0x34180568: 34190337 DC.W HPDMA1_Channel6_IRQHandler 0x3418056C: 3419034F DC.W HPDMA1_Channel7_IRQHandler 0x34180570: 34190367 DC.W HPDMA1_Channel8_IRQHandler 0x34180574: 3419037F DC.W HPDMA1_Channel9_IRQHandler 0x34180578: 34190397 DC.W HPDMA1_Channel10_IRQHandler 0x3418057C: 341903AF DC.W HPDMA1_Channel11_IRQHandler 0x34180580: 341903C7 DC.W HPDMA1_Channel12_IRQHandler 0x34180584: 341903DF DC.W HPDMA1_Channel13_IRQHandler 0x34180588: 341903F7 DC.W HPDMA1_Channel14_IRQHandler 0x3418058C: 3419040F DC.W HPDMA1_Channel15_IRQHandler 0x34180590: 34190A6B DC.W GPDMA1_Channel0_IRQHandler 0x34180594: 34190C23 DC.W GPDMA1_Channel1_IRQHandler 0x34180598: 34190CAB DC.W GPDMA1_Channel2_IRQHandler 0x3418059C: 34190D8B DC.W GPDMA1_Channel3_IRQHandler 0x341805A0: 34190E5B DC.W GPDMA1_Channel4_IRQHandler 0x341805A4: 34190F97 DC.W GPDMA1_Channel5_IRQHandler 0x341805A8: 3419125B DC.W GPDMA1_Channel6_IRQHandler 0x341805AC: 3419151F DC.W GPDMA1_Channel7_IRQHandler 0x341805B0: 341915FB DC.W GPDMA1_Channel8_IRQHandler 0x341805B4: 3419167B DC.W GPDMA1_Channel9_IRQHandler 0x341805B8: 341918DB DC.W GPDMA1_Channel10_IRQHandler 0x341805BC: 341918F3 DC.W GPDMA1_Channel11_IRQHandler 0x341805C0: 34191977 DC.W GPDMA1_Channel12_IRQHandler 0x341805C4: 341919FB DC.W GPDMA1_Channel13_IRQHandler 0x341805C8: 34191A7F DC.W GPDMA1_Channel14_IRQHandler 0x341805CC: 34191B03 DC.W GPDMA1_Channel15_IRQHandler 0x341805D0: 34191B1B DC.W I2C1_EV_IRQHandler 0x341805D4: 34191B33 DC.W I2C1_ER_IRQHandler 0x341805D8: 34191B4B DC.W I2C2_EV_IRQHandler 0x341805DC: 34191B63 DC.W I2C2_ER_IRQHandler 0x341805E0: 34191B7B DC.W I2C3_EV_IRQHandler 0x341805E4: 34191B93 DC.W I2C3_ER_IRQHandler 0x341805E8: 34191BAB DC.W I2C4_EV_IRQHandler 0x341805EC: 34191BC3 DC.W I2C4_ER_IRQHandler 0x341805F0: 34191BDB DC.W I3C1_EV_IRQHandler 0x341805F4: 34191BF3 DC.W I3C1_ER_IRQHandler 0x341805F8: 34191C0B DC.W I3C2_EV_IRQHandler 0x341805FC: 34191C23 DC.W I3C2_ER_IRQHandler 0x34180600: 34191C3B DC.W TIM1_BRK_IRQHandler 0x34180604: 34191C53 DC.W TIM1_UP_IRQHandler 0x34180608: 34191C6B DC.W TIM1_TRG_CCU_IRQHandler 0x3418060C: 34191C7F DC.W TIM1_CC_IRQHandler 0x34180610: 341920D3 DC.W TIM2_IRQHandler 0x34180614: 341921B7 DC.W TIM3_IRQHandler 0x34180618: 3419234F DC.W TIM4_IRQHandler 0x3418061C: 3419249B DC.W TIM5_IRQHandler 0x34180620: 34192593 DC.W TIM6_IRQHandler 0x34180624: 34192903 DC.W TIM7_IRQHandler 0x34180628: 341929D7 DC.W TIM8_BRK_IRQHandler 0x3418062C: 341929FB DC.W TIM8_UP_IRQHandler 0x34180630: 34192A5B DC.W TIM8_TRG_CCU_IRQHandler 0x34180634: 34192ADB DC.W TIM8_CC_IRQHandler 0x34180638: 34192CA7 DC.W TIM9_IRQHandler 0x3418063C: 34192E73 DC.W TIM10_IRQHandler 0x34180640: 34192FC7 DC.W TIM11_IRQHandler 0x34180644: 341931AB DC.W TIM12_IRQHandler 0x34180648: 34193213 DC.W TIM13_IRQHandler 0x3418064C: 34193347 DC.W TIM14_IRQHandler 0x34180650: 34193383 DC.W TIM15_IRQHandler 0x34180654: 341933DB DC.W TIM16_IRQHandler 0x34180658: 34193677 DC.W TIM17_IRQHandler 0x3418065C: 34193757 DC.W TIM18_IRQHandler 0x34180660: 341937E3 DC.W LPTIM1_IRQHandler 0x34180664: 341938A3 DC.W LPTIM2_IRQHandler 0x34180668: 341938BB DC.W LPTIM3_IRQHandler 0x3418066C: 341938CF DC.W LPTIM4_IRQHandler 0x34180670: 3419392F DC.W LPTIM5_IRQHandler 0x34180674: 3419397F DC.W ADF1_FLT0_IRQHandler 0x34180678: 341939BF DC.W MDF1_FLT0_IRQHandler 0x3418067C: 34193AEF DC.W MDF1_FLT1_IRQHandler 0x34180680: 34193AF1 DC.W MDF1_FLT2_IRQHandler 0x34180684: 34193AF3 DC.W MDF1_FLT3_IRQHandler 0x34180688: 34193AF5 DC.W MDF1_FLT4_IRQHandler 0x3418068C: 34193AF7 DC.W MDF1_FLT5_IRQHandler 0x34180690: 34193AF9 DC.W SAI1_A_IRQHandler 0x34180694: 34193AFB DC.W SAI1_B_IRQHandler 0x34180698: 34193AFD DC.W SAI2_A_IRQHandler 0x3418069C: 34193AFF DC.W SAI2_B_IRQHandler 0x341806A0: 34193B01 DC.W SPDIFRX_IRQHandler 0x341806A4: 34193B03 DC.W SPI1_IRQHandler 0x341806A8: 34193B05 DC.W SPI2_IRQHandler 0x341806AC: 34193B07 DC.W SPI3_IRQHandler 0x341806B0: 34193B09 DC.W SPI4_IRQHandler 0x341806B4: 34193B0B DC.W SPI5_IRQHandler 0x341806B8: 34193B0D DC.W SPI6_IRQHandler 0x341806BC: 34193B0F DC.W USART1_IRQHandler 0x341806C0: 34193B11 DC.W USART2_IRQHandler 0x341806C4: 34193B13 DC.W USART3_IRQHandler 0x341806C8: 34193B15 DC.W UART4_IRQHandler 0x341806CC: 34193B17 DC.W UART5_IRQHandler 0x341806D0: 34193B19 DC.W USART6_IRQHandler 0x341806D4: 34193B1B DC.W UART7_IRQHandler 0x341806D8: 34193B1D DC.W UART8_IRQHandler 0x341806DC: 34193B1F DC.W UART9_IRQHandler 0x341806E0: 34193B21 DC.W USART10_IRQHandler 0x341806E4: 34193B23 DC.W LPUART1_IRQHandler 0x341806E8: 34193B25 DC.W XSPI1_IRQHandler 0x341806EC: 34193B27 DC.W XSPI2_IRQHandler 0x341806F0: 34193B29 DC.W XSPI3_IRQHandler 0x341806F4: 34193B2B DC.W FMC_IRQHandler 0x341806F8: 34193B2D DC.W SDMMC1_IRQHandler 0x341806FC: 34193B2F DC.W SDMMC2_IRQHandler 0x34180700: 34193B31 DC.W UCPD1_IRQHandler 0x34180704: 34193B33 DC.W USB1_OTG_HS_IRQHandler 0x34180708: 34193B35 DC.W USB2_OTG_HS_IRQHandler 0x3418070C: 34193B37 DC.W ETH1_IRQHandler 0x34180710: 34193B39 DC.W FDCAN1_IT0_IRQHandler 0x34180714: 34193B3B DC.W FDCAN1_IT1_IRQHandler 0x34180718: 34193B3D DC.W FDCAN2_IT0_IRQHandler 0x3418071C: 34193B3F DC.W FDCAN2_IT1_IRQHandler 0x34180720: 34193B41 DC.W FDCAN3_IT0_IRQHandler 0x34180724: 34193B43 DC.W FDCAN3_IT1_IRQHandler 0x34180728: 34193B45 DC.W FDCAN_CU_IRQHandler 0x3418072C: 34193B47 DC.W MDIOS_IRQHandler 0x34180730: 34193B49 DC.W DCMI_PSSI_IRQHandler 0x34180734: 34193B4B DC.W WAKEUP_PIN_IRQHandler 0x34180738: 34193B4D DC.W CTI_INT0_IRQHandler 0x3418073C: 34193B4F DC.W CTI_INT1_IRQHandler 0x34180740: 00 DC.B 0x00 ; '\0' 0x34180741: 00 DC.B 0x00 ; '\0' 0x34180742: 00 DC.B 0x00 ; '\0' 0x34180743: 00 DC.B 0x00 ; '\0' 0x34180744: 34193B51 DC.W LTDC_UP_IRQHandler 0x34180748: 34193B53 DC.W LTDC_UP_ERR_IRQHandler

Section .text.Error_Handler from blto2_FSBL_lto.o, size=4, align=4


Error_Handler: _vectors_end: 0x3418074C: B672 CPSID i
.L1: 0x3418074E: E7FE B 46L1 ; 0x3418074E

Section .rodata.libc.__SEGGER_RTL_ipow10 from prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=160, align=8


__SEGGER_RTL_ipow10: 0x34180750: 01 DC.B 0x01 ; '\x01' 0x34180751: 00 DC.B 0x00 ; '\0' 0x34180752: 00 DC.B 0x00 ; '\0' 0x34180753: 00 DC.B 0x00 ; '\0' 0x34180754: 00 DC.B 0x00 ; '\0' 0x34180755: 00 DC.B 0x00 ; '\0' 0x34180756: 00 DC.B 0x00 ; '\0' 0x34180757: 00 DC.B 0x00 ; '\0' 0x34180758: 0A DC.B 0x0A ; '\n' 0x34180759: 00 DC.B 0x00 ; '\0' 0x3418075A: 00 DC.B 0x00 ; '\0' 0x3418075B: 00 DC.B 0x00 ; '\0' 0x3418075C: 00 DC.B 0x00 ; '\0' 0x3418075D: 00 DC.B 0x00 ; '\0' 0x3418075E: 00 DC.B 0x00 ; '\0' 0x3418075F: 00 DC.B 0x00 ; '\0' 0x34180760: 64 DC.B 0x64 ; 'd' 0x34180761: 00 DC.B 0x00 ; '\0' 0x34180762: 00 DC.B 0x00 ; '\0' 0x34180763: 00 DC.B 0x00 ; '\0' 0x34180764: 00 DC.B 0x00 ; '\0' 0x34180765: 00 DC.B 0x00 ; '\0' 0x34180766: 00 DC.B 0x00 ; '\0' 0x34180767: 00 DC.B 0x00 ; '\0' 0x34180768: E8 DC.B 0xE8 ; '\xE8' 0x34180769: 03 DC.B 0x03 ; '\x03' 0x3418076A: 00 DC.B 0x00 ; '\0' 0x3418076B: 00 DC.B 0x00 ; '\0' 0x3418076C: 00 DC.B 0x00 ; '\0' 0x3418076D: 00 DC.B 0x00 ; '\0' 0x3418076E: 00 DC.B 0x00 ; '\0' 0x3418076F: 00 DC.B 0x00 ; '\0' 0x34180770: 10 DC.B 0x10 ; '\x10' 0x34180771: 27 DC.B 0x27 ; ''' 0x34180772: 00 DC.B 0x00 ; '\0' 0x34180773: 00 DC.B 0x00 ; '\0' 0x34180774: 00 DC.B 0x00 ; '\0' 0x34180775: 00 DC.B 0x00 ; '\0' 0x34180776: 00 DC.B 0x00 ; '\0' 0x34180777: 00 DC.B 0x00 ; '\0' 0x34180778: A0 DC.B 0xA0 ; '\xA0' 0x34180779: 86 DC.B 0x86 ; '\x86' 0x3418077A: 01 DC.B 0x01 ; '\x01' 0x3418077B: 00 DC.B 0x00 ; '\0' 0x3418077C: 00 DC.B 0x00 ; '\0' 0x3418077D: 00 DC.B 0x00 ; '\0' 0x3418077E: 00 DC.B 0x00 ; '\0' 0x3418077F: 00 DC.B 0x00 ; '\0' 0x34180780: 40 DC.B 0x40 ; '@' 0x34180781: 42 DC.B 0x42 ; 'B' 0x34180782: 0F DC.B 0x0F ; '\x0F' 0x34180783: 00 DC.B 0x00 ; '\0' 0x34180784: 00 DC.B 0x00 ; '\0' 0x34180785: 00 DC.B 0x00 ; '\0' 0x34180786: 00 DC.B 0x00 ; '\0' 0x34180787: 00 DC.B 0x00 ; '\0' 0x34180788: 80 DC.B 0x80 ; '\x80' 0x34180789: 96 DC.B 0x96 ; '\x96' 0x3418078A: 98 DC.B 0x98 ; '\x98' 0x3418078B: 00 DC.B 0x00 ; '\0' 0x3418078C: 00 DC.B 0x00 ; '\0' 0x3418078D: 00 DC.B 0x00 ; '\0' 0x3418078E: 00 DC.B 0x00 ; '\0' 0x3418078F: 00 DC.B 0x00 ; '\0' 0x34180790: 00 DC.B 0x00 ; '\0' 0x34180791: E1 DC.B 0xE1 ; '\xE1' 0x34180792: F5 DC.B 0xF5 ; '\xF5' 0x34180793: 05 DC.B 0x05 ; '\x05' 0x34180794: 00 DC.B 0x00 ; '\0' 0x34180795: 00 DC.B 0x00 ; '\0' 0x34180796: 00 DC.B 0x00 ; '\0' 0x34180797: 00 DC.B 0x00 ; '\0' 0x34180798: 00 DC.B 0x00 ; '\0' 0x34180799: CA DC.B 0xCA ; '\xCA' 0x3418079A: 9A DC.B 0x9A ; '\x9A' 0x3418079B: 3B DC.B 0x3B ; ';' 0x3418079C: 00 DC.B 0x00 ; '\0' 0x3418079D: 00 DC.B 0x00 ; '\0' 0x3418079E: 00 DC.B 0x00 ; '\0' 0x3418079F: 00 DC.B 0x00 ; '\0' 0x341807A0: 00 DC.B 0x00 ; '\0' 0x341807A1: E4 DC.B 0xE4 ; '\xE4' 0x341807A2: 0B DC.B 0x0B ; '\v' 0x341807A3: 54 DC.B 0x54 ; 'T' 0x341807A4: 02 DC.B 0x02 ; '\x02' 0x341807A5: 00 DC.B 0x00 ; '\0' 0x341807A6: 00 DC.B 0x00 ; '\0' 0x341807A7: 00 DC.B 0x00 ; '\0' 0x341807A8: 00 DC.B 0x00 ; '\0' 0x341807A9: E8 DC.B 0xE8 ; '\xE8' 0x341807AA: 76 DC.B 0x76 ; 'v' 0x341807AB: 48 DC.B 0x48 ; 'H' 0x341807AC: 17 DC.B 0x17 ; '\x17' 0x341807AD: 00 DC.B 0x00 ; '\0' 0x341807AE: 00 DC.B 0x00 ; '\0' 0x341807AF: 00 DC.B 0x00 ; '\0' 0x341807B0: 00 DC.B 0x00 ; '\0' 0x341807B1: 10 DC.B 0x10 ; '\x10' 0x341807B2: A5 DC.B 0xA5 ; '\xA5' 0x341807B3: D4 DC.B 0xD4 ; '\xD4' 0x341807B4: E8 DC.B 0xE8 ; '\xE8' 0x341807B5: 00 DC.B 0x00 ; '\0' 0x341807B6: 00 DC.B 0x00 ; '\0' 0x341807B7: 00 DC.B 0x00 ; '\0' 0x341807B8: 00 DC.B 0x00 ; '\0' 0x341807B9: A0 DC.B 0xA0 ; '\xA0' 0x341807BA: 72 DC.B 0x72 ; 'r' 0x341807BB: 4E DC.B 0x4E ; 'N' 0x341807BC: 18 DC.B 0x18 ; '\x18' 0x341807BD: 09 DC.B 0x09 ; '\t' 0x341807BE: 00 DC.B 0x00 ; '\0' 0x341807BF: 00 DC.B 0x00 ; '\0' 0x341807C0: 00 DC.B 0x00 ; '\0' 0x341807C1: 40 DC.B 0x40 ; '@' 0x341807C2: 7A DC.B 0x7A ; 'z' 0x341807C3: 10 DC.B 0x10 ; '\x10' 0x341807C4: F3 DC.B 0xF3 ; '\xF3' 0x341807C5: 5A DC.B 0x5A ; 'Z' 0x341807C6: 00 DC.B 0x00 ; '\0' 0x341807C7: 00 DC.B 0x00 ; '\0' 0x341807C8: 00 DC.B 0x00 ; '\0' 0x341807C9: 80 DC.B 0x80 ; '\x80' 0x341807CA: C6 DC.B 0xC6 ; '\xC6' 0x341807CB: A4 DC.B 0xA4 ; '\xA4' 0x341807CC: 7E DC.B 0x7E ; '~' 0x341807CD: 8D DC.B 0x8D ; '\x8D' 0x341807CE: 03 DC.B 0x03 ; '\x03' 0x341807CF: 00 DC.B 0x00 ; '\0' 0x341807D0: 00 DC.B 0x00 ; '\0' 0x341807D1: 00 DC.B 0x00 ; '\0' 0x341807D2: C1 DC.B 0xC1 ; '\xC1' 0x341807D3: 6F DC.B 0x6F ; 'o' 0x341807D4: F2 DC.B 0xF2 ; '\xF2' 0x341807D5: 86 DC.B 0x86 ; '\x86' 0x341807D6: 23 DC.B 0x23 ; '#' 0x341807D7: 00 DC.B 0x00 ; '\0' 0x341807D8: 00 DC.B 0x00 ; '\0' 0x341807D9: 00 DC.B 0x00 ; '\0' 0x341807DA: 8A DC.B 0x8A ; '\x8A' 0x341807DB: 5D DC.B 0x5D ; ']' 0x341807DC: 78 DC.B 0x78 ; 'x' 0x341807DD: 45 DC.B 0x45 ; 'E' 0x341807DE: 63 DC.B 0x63 ; 'c' 0x341807DF: 01 DC.B 0x01 ; '\x01' 0x341807E0: 00 DC.B 0x00 ; '\0' 0x341807E1: 00 DC.B 0x00 ; '\0' 0x341807E2: 64 DC.B 0x64 ; 'd' 0x341807E3: A7 DC.B 0xA7 ; '\xA7' 0x341807E4: B3 DC.B 0xB3 ; '\xB3' 0x341807E5: B6 DC.B 0xB6 ; '\xB6' 0x341807E6: E0 DC.B 0xE0 ; '\xE0' 0x341807E7: 0D DC.B 0x0D ; '\r' 0x341807E8: 00 DC.B 0x00 ; '\0' 0x341807E9: 00 DC.B 0x00 ; '\0' 0x341807EA: E8 DC.B 0xE8 ; '\xE8' 0x341807EB: 89 DC.B 0x89 ; '\x89' 0x341807EC: 04 DC.B 0x04 ; '\x04' 0x341807ED: 23 DC.B 0x23 ; '#' 0x341807EE: C7 DC.B 0xC7 ; '\xC7' 0x341807EF: 8A DC.B 0x8A ; '\x8A'

Section .text.libc.__SEGGER_RTL_vfprintf_short_float_long_long from __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=3036, align=8


__SEGGER_RTL_vfprintf_short_float_long_long: __SEGGER_RTL_vfprintf: 0x341807F0: E92D 4FF8 PUSH.W 123R3-R11, LR} 0x341807F4: ED2D 8B0E VSTMDB SP!, {D8-D14} 0x341807F8: B08C SUB SP, SP, #48 0x341807FA: EEB2 8A04 VMOV.F32 S16, #10 0x341807FE: ED9F BAB9 VLDR S22, =0x00000000 ; [PC, #0x02E4] [0x34180AE4] 0x34180802: EEB7 DA00 VMOV.F32 S26, #1 0x34180806: ED9F CAB8 VLDR S24, =0x7E967699 ; [PC, #0x02E0] [0x34180AE8] 0x3418080A: ED9F EBB9 VLDR D14, =0xB690000000000000 ; [PC, #0x02E4] [0x34180AF0] 0x3418080E: 4683 MOV R11, R0 0x34180810: 2000 MOVS R0, #0 0x34180812: 4614 MOV R4, R2 0x34180814: 468A MOV R10, R1 0x34180816: F8CB 0000 STR.W R0, [R11]
.L1: 0x3418081A: F81A 1B01 LDRB R1, [R10], #1 0x3418081E: 2925 CMP R1, #37 0x34180820: D006 BEQ 46L2 ; 0x34180830 0x34180822: 2900 CMP R1, #0 0x34180824: F000 85B3 BEQ.W 46L123 ; 0x3418138E 0x34180828: 4658 MOV R0, R11 0x3418082A: F013 FAB3 BL __SEGGER_RTL_putc ; 0x34193D94 0x3418082E: E7F4 B 46L1 ; 0x3418081A
.L2: 0x34180830: 2600 MOVS R6, #0
.L3: 0x34180832: 4652 MOV R2, R10 0x34180834: F81A 0B01 LDRB R0, [R10], #1 0x34180838: F1A0 0320 SUB.W R3, R0, #32 0x3418083C: 2B10 CMP R3, #16 0x3418083E: D80D BHI 46L4 ; 0x3418085C 0x34180840: 2180 MOVS R1, #128 0x34180842: E8DF F003 TBB 91PC, R3] 0x34180846: 09 DC.B 0x09 ; '\t' 0x34180847: 1B DC.B 0x1B ; '\x1B' 0x34180848: 1B DC.B 0x1B ; '\x1B' 0x34180849: 19 DC.B 0x19 ; '\x19' 0x3418084A: 1B DC.B 0x1B ; '\x1B' 0x3418084B: 1B DC.B 0x1B ; '\x1B' 0x3418084C: 1B DC.B 0x1B ; '\x1B' 0x3418084D: 15 DC.B 0x15 ; '\x15' 0x3418084E: 1B DC.B 0x1B ; '\x1B' 0x3418084F: 1B DC.B 0x1B ; '\x1B' 0x34180850: 30 DC.B 0x30 ; '0' 0x34180851: 18 DC.B 0x18 ; '\x18' 0x34180852: 1B DC.B 0x1B ; '\x1B' 0x34180853: 10 DC.B 0x10 ; '\x10' 0x34180854: 1B DC.B 0x1B ; '\x1B' 0x34180855: 1B DC.B 0x1B ; '\x1B' 0x34180856: 12 DC.B 0x12 ; '\x12' 0x34180857: 00 DC.B 0x00 ; '\0' 0x34180858: 2140 MOVS R1, #64 0x3418085A: E00D B 46L5 ; 0x34180878
.L4: 0x3418085C: 285E CMP R0, #94 0x3418085E: D10D BNE 46L6 ; 0x3418087C 0x34180860: F44F 5180 MOV.W R1, #0x1000 0x34180864: E008 B 46L5 ; 0x34180878 0x34180866: 2110 MOVS R1, #16 0x34180868: E006 B 46L5 ; 0x34180878 0x3418086A: F44F 7100 MOV.W R1, #0x0200 0x3418086E: E003 B 46L5 ; 0x34180878 0x34180870: F44F 4100 MOV.W R1, #0x8000 0x34180874: E000 B 46L5 ; 0x34180878 0x34180876: 2120 MOVS R1, #32
.L5: 0x34180878: 430E ORRS R6, R1 0x3418087A: E7DA B 46L3 ; 0x34180832
.L6: 0x3418087C: F1A0 0130 SUB.W R1, R0, #48 0x34180880: B2C9 UXTB R1, R1 0x34180882: 2909 CMP R1, #9 0x34180884: D81C BHI 46L8 ; 0x341808C0 0x34180886: 2100 MOVS R1, #0
.L7: 0x34180888: EB01 0181 ADD.W R1, R1, R1, LSL #2 0x3418088C: EB00 0141 ADD.W R1, R0, R1, LSL #1 0x34180890: F81A 0B01 LDRB R0, [R10], #1 0x34180894: 3930 SUBS R1, #48 0x34180896: F1A0 0230 SUB.W R2, R0, #48 0x3418089A: B2D2 UXTB R2, R2 0x3418089C: 2A0A CMP R2, #10 0x3418089E: D3F3 BCC 46L7 ; 0x34180888 0x341808A0: EA21 78E1 BIC.W R8, R1, R1, ASR #31 0x341808A4: E00E B 46L9 ; 0x341808C4 0x341808A6: F854 0B04 LDR R0, [R4], #4 0x341808AA: 2110 MOVS R1, #16 0x341808AC: F102 0A02 ADD.W R10, R2, #2 0x341808B0: 2800 CMP R0, #0 0x341808B2: EA50 B850 CNEG R8, R0, MI 0x341808B6: EA01 61D0 AND.W R1, R1, R0, LSR #27 0x341808BA: 7850 LDRB R0, [R2, #1] 0x341808BC: 430E ORRS R6, R1 0x341808BE: E001 B 46L9 ; 0x341808C4
.L8: 0x341808C0: F04F 0800 MOV.W R8, #0
.L9: 0x341808C4: 282E CMP R0, #46 0x341808C6: D10B BNE 46L10 ; 0x341808E0 0x341808C8: 4651 MOV R1, R10 0x341808CA: F811 0B01 LDRB R0, [R1], #1 0x341808CE: 282A CMP R0, #42 0x341808D0: D109 BNE 46L11 ; 0x341808E6 0x341808D2: F854 9B04 LDR R9, [R4], #4 0x341808D6: F10A 0102 ADD.W R1, R10, #2 0x341808DA: F89A 0001 LDRB.W R0, [R10, #1] 0x341808DE: E016 B 46L13 ; 0x3418090E
.L10: 0x341808E0: F04F 0900 MOV.W R9, #0 0x341808E4: E01C B 46L16 ; 0x34180920
.L11: 0x341808E6: F1A0 0230 SUB.W R2, R0, #48 0x341808EA: F04F 0900 MOV.W R9, #0 0x341808EE: B2D2 UXTB R2, R2 0x341808F0: 2A09 CMP R2, #9 0x341808F2: D812 BHI 46L14 ; 0x3418091A
.L12: 0x341808F4: EB09 0289 ADD.W R2, R9, R9, LSL #2 0x341808F8: EB00 0242 ADD.W R2, R0, R2, LSL #1 0x341808FC: F811 0B01 LDRB R0, [R1], #1 0x34180900: F1A2 0930 SUB.W R9, R2, #48 0x34180904: F1A0 0330 SUB.W R3, R0, #48 0x34180908: B2DA UXTB R2, R3 0x3418090A: 2A0A CMP R2, #10 0x3418090C: D3F2 BCC 46L12 ; 0x341808F4
.L13: 0x3418090E: F1B9 0F00 CMP.W R9, #0 0x34180912: D404 BMI 46L15 ; 0x3418091E 0x34180914: F446 7680 ORR R6, R6, #0x0100 0x34180918: E001 B 46L15 ; 0x3418091E
.L14: 0x3418091A: F446 7680 ORR R6, R6, #0x0100
.L15: 0x3418091E: 468A MOV R10, R1
.L16: 0x34180920: F1A0 0168 SUB.W R1, R0, #104 0x34180924: B2CA UXTB R2, R1 0x34180926: 01C9 LSLS R1, R1, #7 0x34180928: EA41 0152 ORR.W R1, R1, R2, LSR #1 0x3418092C: B2C9 UXTB R1, R1 0x3418092E: 2909 CMP R1, #9 0x34180930: D822 BHI 46L21 ; 0x34180978 0x34180932: E8DF F001 TBB 91PC, R1] 0x34180936: 05 DC.B 0x05 ; '\x05' 0x34180937: 0E DC.B 0x0E ; '\x0E' 0x34180938: 12 DC.B 0x12 ; '\x12' 0x34180939: 21 DC.B 0x21 ; '!' 0x3418093A: 21 DC.B 0x21 ; '!' 0x3418093B: 21 DC.B 0x21 ; '!' 0x3418093C: 0F DC.B 0x0F ; '\x0F' 0x3418093D: 21 DC.B 0x21 ; '!' 0x3418093E: 21 DC.B 0x21 ; '!' 0x3418093F: 0F DC.B 0x0F ; '\x0F' 0x34180940: 4651 MOV R1, R10 0x34180942: F811 0B01 LDRB R0, [R1], #1 0x34180946: 2868 CMP R0, #104 0x34180948: D112 BNE 46L18 ; 0x34180970 0x3418094A: F89A 0001 LDRB.W R0, [R10, #1] 0x3418094E: 3608 ADDS R6, #8 0x34180950: E00B B 46L17 ; 0x3418096A 0x34180952: 3602 ADDS R6, #2 0x34180954: F81A 0B01 LDRB R0, [R10], #1 0x34180958: E00E B 46L21 ; 0x34180978 0x3418095A: 4651 MOV R1, R10 0x3418095C: F811 0B01 LDRB R0, [R1], #1 0x34180960: 286C CMP R0, #108 0x34180962: D107 BNE 46L19 ; 0x34180974 0x34180964: F89A 0001 LDRB.W R0, [R10, #1] 0x34180968: 3602 ADDS R6, #2
.L17: 0x3418096A: F10A 0A02 ADD.W R10, R10, #2 0x3418096E: E003 B 46L21 ; 0x34180978
.L18: 0x34180970: 3604 ADDS R6, #4 0x34180972: E000 B 46L20 ; 0x34180976
.L19: 0x34180974: 3601 ADDS R6, #1
.L20: 0x34180976: 468A MOV R10, R1
.L21: 0x34180978: 2846 CMP R0, #70 0x3418097A: DD1F BLE 46L22 ; 0x341809BC 0x3418097C: F1A0 0163 SUB.W R1, R0, #99 0x34180980: 2915 CMP R1, #21 0x34180982: D82F BHI 46L24 ; 0x341809E4 0x34180984: E8DF F011 TBH 91PC, R1, LSL #1] 0x34180988: 5F DC.B 0x5F ; '_' 0x34180989: 00 DC.B 0x00 ; '\0' 0x3418098A: 17 DC.B 0x17 ; '\x17' 0x3418098B: 00 DC.B 0x00 ; '\0' 0x3418098C: 3F DC.B 0x3F ; '?' 0x3418098D: 00 DC.B 0x00 ; '\0' 0x3418098E: 23 DC.B 0x23 ; '#' 0x3418098F: 00 DC.B 0x00 ; '\0' 0x34180990: 5D DC.B 0x5D ; ']' 0x34180991: 01 DC.B 0x01 ; '\x01' 0x34180992: 16 DC.B 0x16 ; '\x16' 0x34180993: 00 DC.B 0x00 ; '\0' 0x34180994: 17 DC.B 0x17 ; '\x17' 0x34180995: 00 DC.B 0x00 ; '\0' 0x34180996: 16 DC.B 0x16 ; '\x16' 0x34180997: 00 DC.B 0x00 ; '\0' 0x34180998: 16 DC.B 0x16 ; '\x16' 0x34180999: 00 DC.B 0x00 ; '\0' 0x3418099A: 16 DC.B 0x16 ; '\x16' 0x3418099B: 00 DC.B 0x00 ; '\0' 0x3418099C: 16 DC.B 0x16 ; '\x16' 0x3418099D: 00 DC.B 0x00 ; '\0' 0x3418099E: 6F DC.B 0x6F ; 'o' 0x3418099F: 00 DC.B 0x00 ; '\0' 0x341809A0: 80 DC.B 0x80 ; '\x80' 0x341809A1: 00 DC.B 0x00 ; '\0' 0x341809A2: 49 DC.B 0x49 ; 'I' 0x341809A3: 00 DC.B 0x00 ; '\0' 0x341809A4: 16 DC.B 0x16 ; '\x16' 0x341809A5: 00 DC.B 0x00 ; '\0' 0x341809A6: 16 DC.B 0x16 ; '\x16' 0x341809A7: 00 DC.B 0x00 ; '\0' 0x341809A8: 7C DC.B 0x7C ; '|' 0x341809A9: 00 DC.B 0x00 ; '\0' 0x341809AA: 16 DC.B 0x16 ; '\x16' 0x341809AB: 00 DC.B 0x00 ; '\0' 0x341809AC: 42 DC.B 0x42 ; 'B' 0x341809AD: 00 DC.B 0x00 ; '\0' 0x341809AE: 16 DC.B 0x16 ; '\x16' 0x341809AF: 00 DC.B 0x00 ; '\0' 0x341809B0: 16 DC.B 0x16 ; '\x16' 0x341809B1: 00 DC.B 0x00 ; '\0' 0x341809B2: 36 DC.B 0x36 ; '6' 0x341809B3: 00 DC.B 0x00 ; '\0' 0x341809B4: E731 B 46L1 ; 0x3418081A 0x341809B6: F446 4680 ORR R6, R6, #0x4000 0x341809BA: E02B B 46L26 ; 0x34180A14
.L22: 0x341809BC: 2844 CMP R0, #68 0x341809BE: DD09 BLE 46L23 ; 0x341809D4 0x341809C0: 2845 CMP R0, #69 0x341809C2: D01E BEQ 46L25 ; 0x34180A02 0x341809C4: 2846 CMP R0, #70 0x341809C6: F47F AF28 BNE.W 46L1 ; 0x3418081A 0x341809CA: F446 5600 ORR R6, R6, #0x2000 0x341809CE: F446 6700 ORR R7, R6, #0x0800 0x341809D2: E138 B 46L48 ; 0x34180C46
.L23: 0x341809D4: 2825 CMP R0, #37 0x341809D6: F040 84ED BNE.W 46L126 ; 0x341813B4 0x341809DA: 4658 MOV R0, R11 0x341809DC: 2125 MOVS R1, #37 0x341809DE: F013 F9D9 BL __SEGGER_RTL_putc ; 0x34193D94 0x341809E2: E71A B 46L1 ; 0x3418081A
.L24: 0x341809E4: 2847 CMP R0, #71 0x341809E6: F000 812A BEQ.W 46L47 ; 0x34180C3E 0x341809EA: 2858 CMP R0, #88 0x341809EC: F47F AF15 BNE.W 46L1 ; 0x3418081A 0x341809F0: F446 5600 ORR R6, R6, #0x2000 0x341809F4: F243 0258 MOVW R2, #0x3058 0x341809F8: 2878 CMP R0, #120 0x341809FA: D146 BNE 46L27 ; 0x34180A8A 0x341809FC: F243 0278 MOVW R2, #0x3078 0x34180A00: E043 B 46L27 ; 0x34180A8A
.L25: 0x34180A02: F446 5600 ORR R6, R6, #0x2000 0x34180A06: F446 6780 ORR R7, R6, #0x0400 0x34180A0A: E11C B 46L48 ; 0x34180C46 0x34180A0C: 05F1 LSLS R1, R6, #23 0x34180A0E: BF48 IT MI 0x34180A10: F426 7600 BICMI R6, R6, #0x0200
.L26: 0x34180A14: 2100 MOVS R1, #0 0x34180A16: 9103 STR R1, [SP, #12] 0x34180A18: E03F B 46L28 ; 0x34180A9A 0x34180A1A: 4620 MOV R0, R4 0x34180A1C: F8CD 8008 STR.W R8, [SP, #8] 0x34180A20: F850 4B04 LDR R4, [R0], #4 0x34180A24: F04F 0908 MOV.W R9, #8 0x34180A28: F04F 0800 MOV.W R8, #0 0x34180A2C: 9004 STR R0, [SP, #16] 0x34180A2E: 2C00 CMP R4, #0 0x34180A30: F000 81DD BEQ.W 46L65 ; 0x34180DEE 0x34180A34: 0630 LSLS R0, R6, #24 0x34180A36: 2123 MOVS R1, #35 0x34180A38: EA01 70E0 AND.W R0, R1, R0, ASR #31 0x34180A3C: 9003 STR R0, [SP, #12] 0x34180A3E: F446 7680 ORR R6, R6, #0x0100 0x34180A42: 2700 MOVS R7, #0 0x34180A44: E1DB B 46L68 ; 0x34180DFE 0x34180A46: 4620 MOV R0, R4 0x34180A48: F1A8 0801 SUB.W R8, R8, #1 0x34180A4C: F810 4B04 LDRB R4, [R0], #4 0x34180A50: 4631 MOV R1, R6 0x34180A52: 9004 STR R0, [SP, #16] 0x34180A54: 4658 MOV R0, R11 0x34180A56: 4642 MOV R2, R8 0x34180A58: F013 F9EE BL __SEGGER_RTL_pre_padding ; 0x34193E38 0x34180A5C: 4658 MOV R0, R11 0x34180A5E: 4621 MOV R1, R4 0x34180A60: F013 F998 BL __SEGGER_RTL_putc ; 0x34193D94 0x34180A64: E22E B 46L77 ; 0x34180EC4 0x34180A66: 0731 LSLS R1, R6, #28 0x34180A68: F854 0B04 LDR R0, [R4], #4 0x34180A6C: F8DB 1000 LDR.W R1, [R11] 0x34180A70: F100 81BB BMI.W 46L64 ; 0x34180DEA 0x34180A74: 07B2 LSLS R2, R6, #30 0x34180A76: BF52 ITEE PL 0x34180A78: 6001 STRPL R1, [R0] 0x34180A7A: 2200 MOVMI R2, #0 0x34180A7C: C006 STMMI R0!, {R1-R2} 0x34180A7E: E6CC B 46L1 ; 0x3418081A 0x34180A80: F854 0B04 LDR R0, [R4], #4 0x34180A84: 9404 STR R4, [SP, #16] 0x34180A86: E12D B 46L53 ; 0x34180CE4 0x34180A88: 2230 MOVS R2, #48
.L27: 0x34180A8A: 0631 LSLS R1, R6, #24 0x34180A8C: EA02 71E1 AND.W R1, R2, R1, ASR #31 0x34180A90: 9103 STR R1, [SP, #12] 0x34180A92: 05F1 LSLS R1, R6, #23 0x34180A94: BF48 IT MI 0x34180A96: F426 7600 BICMI R6, R6, #0x0200
.L28: 0x34180A9A: 0471 LSLS R1, R6, #17 0x34180A9C: F8CD 8008 STR.W R8, [SP, #8] 0x34180AA0: EA4F 7186 LSL.W R1, R6, #30 0x34180AA4: D404 BMI 46L29 ; 0x34180AB0 0x34180AA6: 2900 CMP R1, #0 0x34180AA8: D40A BMI 46L30 ; 0x34180AC0 0x34180AAA: 1D21 ADDS R1, R4, #4 0x34180AAC: 2200 MOVS R2, #0 0x34180AAE: E00D B 46L31 ; 0x34180ACC
.L29: 0x34180AB0: 2900 CMP R1, #0 0x34180AB2: D421 BMI 46L32 ; 0x34180AF8 0x34180AB4: 4621 MOV R1, R4 0x34180AB6: F851 4B04 LDR R4, [R1], #4 0x34180ABA: EA4F 78E4 ASR.W R8, R4, #31 0x34180ABE: E022 B 46L33 ; 0x34180B06
.L30: 0x34180AC0: 1DE1 ADDS R1, R4, #7 0x34180AC2: F021 0407 BIC R4, R1, #7 0x34180AC6: F104 0108 ADD.W R1, R4, #8 0x34180ACA: 6862 LDR R2, [R4, #4]
.L31: 0x34180ACC: 6824 LDR R4, [R4] 0x34180ACE: 0773 LSLS R3, R6, #29 0x34180AD0: 9104 STR R1, [SP, #16] 0x34180AD2: D421 BMI 46L34 ; 0x34180B18 0x34180AD4: 2300 MOVS R3, #0 0x34180AD6: F016 0F08 TST R6, #8 0x34180ADA: EA52 8803 CSEL R8, R2, R3, EQ 0x34180ADE: D037 BEQ 46L40 ; 0x34180B50 0x34180AE0: B2E4 UXTB R4, R4 0x34180AE2: E035 B 46L40 ; 0x34180B50 0x34180AE4: 00000000 DC.W 0x00000000 0x34180AE8: 7E967699 DC.W 0x7E967699 0x34180AEC: 00 DC.B 0x00 ; '\0' 0x34180AED: BF DC.B 0xBF ; '\xBF' 0x34180AEE: 00 DC.B 0x00 ; '\0' 0x34180AEF: BF DC.B 0xBF ; '\xBF' 0x34180AF0: 00000000 DC64 0xB690000000000000 0x34180AF4: B6900000
.L32: 0x34180AF8: 1DE1 ADDS R1, R4, #7 0x34180AFA: F021 0107 BIC R1, R1, #7 0x34180AFE: F8D1 8004 LDR.W R8, [R1, #4] 0x34180B02: F851 4B08 LDR R4, [R1], #8
.L33: 0x34180B06: 9104 STR R1, [SP, #16] 0x34180B08: 0771 LSLS R1, R6, #29 0x34180B0A: D409 BMI 46L35 ; 0x34180B20 0x34180B0C: 0731 LSLS R1, R6, #28 0x34180B0E: D50A BPL 46L36 ; 0x34180B26 0x34180B10: F344 18C0 SBFX R8, R4, #7, #1 0x34180B14: B264 SXTB R4, R4 0x34180B16: E006 B 46L36 ; 0x34180B26
.L34: 0x34180B18: B2A4 UXTH R4, R4 0x34180B1A: F04F 0800 MOV.W R8, #0 0x34180B1E: E017 B 46L40 ; 0x34180B50
.L35: 0x34180B20: F344 38C0 SBFX R8, R4, #15, #1 0x34180B24: B224 SXTH R4, R4
.L36: 0x34180B26: F1B8 0F00 CMP.W R8, #0 0x34180B2A: DB09 BLT 46L37 ; 0x34180B40 0x34180B2C: 06B1 LSLS R1, R6, #26 0x34180B2E: D40D BMI 46L38 ; 0x34180B4C 0x34180B30: 0671 LSLS R1, R6, #25 0x34180B32: 9A03 LDR R2, [SP, #12] 0x34180B34: F04F 0120 MOV.W R1, #32 0x34180B38: EA52 8251 CSEL R2, R2, R1, PL 0x34180B3C: 9203 STR R2, [SP, #12] 0x34180B3E: E007 B 46L40 ; 0x34180B50
.L37: 0x34180B40: 2100 MOVS R1, #0 0x34180B42: 4264 RSBS R4, R4, #0 0x34180B44: EB61 0808 SBC.W R8, R1, R8 0x34180B48: 212D MOVS R1, #45 0x34180B4A: E000 B 46L39 ; 0x34180B4E
.L38: 0x34180B4C: 212B MOVS R1, #43
.L39: 0x34180B4E: 9103 STR R1, [SP, #12]
.L40: 0x34180B50: 05F1 LSLS R1, R6, #23 0x34180B52: BF48 IT MI 0x34180B54: F426 7600 BICMI R6, R6, #0x0200 0x34180B58: 464B MOV R3, R9 0x34180B5A: 2700 MOVS R7, #0 0x34180B5C: 05F1 LSLS R1, R6, #23 0x34180B5E: BF58 IT PL 0x34180B60: 2301 MOVPL R3, #1 0x34180B62: 286E CMP R0, #110 0x34180B64: DD28 BLE 46L42 ; 0x34180BB8 0x34180B66: 386F SUBS R0, #111 0x34180B68: 2809 CMP R0, #9 0x34180B6A: F200 816C BHI.W 46L71 ; 0x34180E46 0x34180B6E: E8DF F010 TBH 91PC, R0, LSL #1] 0x34180B72: 0A DC.B 0x0A ; '\n' 0x34180B73: 00 DC.B 0x00 ; '\0' 0x34180B74: 53 DC.B 0x53 ; 'S' 0x34180B75: 00 DC.B 0x00 ; '\0' 0x34180B76: 6A DC.B 0x6A ; 'j' 0x34180B77: 01 DC.B 0x01 ; '\x01' 0x34180B78: 6A DC.B 0x6A ; 'j' 0x34180B79: 01 DC.B 0x01 ; '\x01' 0x34180B7A: 6A DC.B 0x6A ; 'j' 0x34180B7B: 01 DC.B 0x01 ; '\x01' 0x34180B7C: 6A DC.B 0x6A ; 'j' 0x34180B7D: 01 DC.B 0x01 ; '\x01' 0x34180B7E: 2A DC.B 0x2A ; '*' 0x34180B7F: 00 DC.B 0x00 ; '\0' 0x34180B80: 6A DC.B 0x6A ; 'j' 0x34180B81: 01 DC.B 0x01 ; '\x01' 0x34180B82: 6A DC.B 0x6A ; 'j' 0x34180B83: 01 DC.B 0x01 ; '\x01' 0x34180B84: 53 DC.B 0x53 ; 'S' 0x34180B85: 00 DC.B 0x00 ; '\0' 0x34180B86: EA54 0008 ORRS.W R0, R4, R8 0x34180B8A: F000 815C BEQ.W 46L71 ; 0x34180E46 0x34180B8E: 08E0 LSRS R0, R4, #3 0x34180B90: F10D 011A ADD.W R1, SP, #26 0x34180B94: EA40 7048 ORR.W R0, R0, R8, LSL #29 0x34180B98: 2206 MOVS R2, #6
.L41: 0x34180B9A: F362 04DF BFI R4, R2, #3, #29 0x34180B9E: 55CC STRB R4, [R1, R7] 0x34180BA0: 4604 MOV R4, R0 0x34180BA2: 3701 ADDS R7, #1 0x34180BA4: EA50 00D8 ORRS.W R0, R0, R8, LSR #3 0x34180BA8: EA4F 08D8 LSR.W R8, R8, #3 0x34180BAC: EA4F 00D4 LSR.W R0, R4, #3 0x34180BB0: EA40 7048 ORR.W R0, R0, R8, LSL #29 0x34180BB4: D1F1 BNE 46L41 ; 0x34180B9A 0x34180BB6: E146 B 46L71 ; 0x34180E46
.L42: 0x34180BB8: 2858 CMP R0, #88 0x34180BBA: D02D BEQ 46L45 ; 0x34180C18 0x34180BBC: 2864 CMP R0, #100 0x34180BBE: BF18 IT NE 0x34180BC0: 2869 CMPNE R0, #105 0x34180BC2: F040 8140 BNE.W 46L71 ; 0x34180E46 0x34180BC6: EA54 0008 ORRS.W R0, R4, R8 0x34180BCA: F000 813C BEQ.W 46L71 ; 0x34180E46 0x34180BCE: F10D 051A ADD.W R5, SP, #26 0x34180BD2: 46B9 MOV R9, R7 0x34180BD4: 9301 STR R3, [SP, #4]
.L43: 0x34180BD6: 0430 LSLS R0, R6, #16 0x34180BD8: D506 BPL 46L44 ; 0x34180BE8 0x34180BDA: F007 0003 AND R0, R7, #3 0x34180BDE: 2803 CMP R0, #3 0x34180BE0: BF02 ITTT EQ 0x34180BE2: 202C MOVEQ R0, #44 0x34180BE4: 55E8 STRBEQ R0, [R5, R7] 0x34180BE6: 3701 ADDEQ R7, #1
.L44: 0x34180BE8: 4620 MOV R0, R4 0x34180BEA: 4641 MOV R1, R8 0x34180BEC: 220A MOVS R2, #10 0x34180BEE: 2300 MOVS R3, #0 0x34180BF0: F012 FEE6 BL __aeabi_uldivmod ; 0x341939C0 0x34180BF4: EB00 0280 ADD.W R2, R0, R0, LSL #2 0x34180BF8: F1D4 0309 RSBS R3, R4, #9 0x34180BFC: EB79 0308 SBCS.W R3, R9, R8 0x34180C00: 4688 MOV R8, R1 0x34180C02: EBA4 0242 SUB.W R2, R4, R2, LSL #1 0x34180C06: 4604 MOV R4, R0 0x34180C08: F042 0230 ORR R2, R2, #48 0x34180C0C: 55EA STRB R2, [R5, R7] 0x34180C0E: F107 0701 ADD.W R7, R7, #1 0x34180C12: D3E0 BCC 46L43 ; 0x34180BD6 0x34180C14: 9B01 LDR R3, [SP, #4] 0x34180C16: E116 B 46L71 ; 0x34180E46
.L45: 0x34180C18: EA44 0008 ORR.W R0, R4, R8 0x34180C1C: 2900 CMP R1, #0 0x34180C1E: D405 BMI 46L46 ; 0x34180C2C 0x34180C20: F04F 0901 MOV.W R9, #1 0x34180C24: 2800 CMP R0, #0 0x34180C26: F000 80E4 BEQ.W 46L66 ; 0x34180DF2 0x34180C2A: E0E8 B 46L68 ; 0x34180DFE
.L46: 0x34180C2C: 2800 CMP R0, #0 0x34180C2E: F040 80E6 BNE.W 46L68 ; 0x34180DFE 0x34180C32: F426 7680 BIC R6, R6, #0x0100 0x34180C36: 4581 CMP R9, R0 0x34180C38: F040 80DB BNE.W 46L66 ; 0x34180DF2 0x34180C3C: E0DE B 46L67 ; 0x34180DFC
.L47: 0x34180C3E: F446 5600 ORR R6, R6, #0x2000 0x34180C42: F446 6740 ORR R7, R6, #0x0C00
.L48: 0x34180C46: 1DE0 ADDS R0, R4, #7 0x34180C48: 43F9 MVNS R1, R7 0x34180C4A: F020 0007 BIC R0, R0, #7 0x34180C4E: 05FA LSLS R2, R7, #23 0x34180C50: F100 0408 ADD.W R4, R0, #8 0x34180C54: ED90 AB00 VLDR D10, [R0] 0x34180C58: BF58 IT PL 0x34180C5A: F04F 0906 MOVPL.W R9, #6 0x34180C5E: F411 6F40 TST R1, #0x0C00 0x34180C62: EA5F 911F CSET R1, EQ 0x34180C66: F1B9 0F00 CMP.W R9, #0 0x34180C6A: EEB7 9BCA VCVT.F32.F64 S18, D10 0x34180C6E: EA51 8909 CSEL R9, R1, R9, EQ 0x34180C72: EEB0 0A49 VMOV.F32 S0, S18 0x34180C76: F012 FF8B BL __SEGGER_RTL_float32_isinf ; 0x34193B90 0x34180C7A: 9404 STR R4, [SP, #16] 0x34180C7C: B170 CBZ R0, .L50 ; 0x34180C9C 0x34180C7E: EEB4 AB4E VCMP.F64 D10, D14
.L49: 0x34180C82: EEF1 FA10 VMRS APSR_nzcv, FPSCR 0x34180C86: D519 BPL 46L51 ; 0x34180CBC 0x34180C88: 04B8 LSLS R0, R7, #18 0x34180C8A: F244 319B MOVW R1, #0x439B ; 0x3419439B = .rodata.libc..L.str.1 0x34180C8E: F244 30A0 MOVW R0, #0x43A0 ; 0x341943A0 = .rodata.libc..L.str.2 0x34180C92: F2C3 4119 MOVT R1, #0x3419 ; 0x3419439B = .rodata.libc..L.str.1 0x34180C96: F2C3 4019 MOVT R0, #0x3419 ; 0x341943A0 = .rodata.libc..L.str.2 0x34180C9A: E01F B 46L52 ; 0x34180CDC
.L50: 0x34180C9C: EEB0 0A49 VMOV.F32 S0, S18 0x34180CA0: F012 FF6F BL __SEGGER_RTL_float32_isnan ; 0x34193B82 0x34180CA4: 2800 CMP R0, #0 0x34180CA6: D042 BEQ 46L57 ; 0x34180D2E 0x34180CA8: 04B8 LSLS R0, R7, #18 0x34180CAA: F244 51A0 MOVW R1, #0x45A0 ; 0x341945A0 = .rodata.libc..L.str.5 0x34180CAE: F244 50A4 MOVW R0, #0x45A4 ; 0x341945A4 = .rodata.libc..L.str.6 0x34180CB2: F2C3 4119 MOVT R1, #0x3419 ; 0x341945A0 = .rodata.libc..L.str.5 0x34180CB6: F2C3 4019 MOVT R0, #0x3419 ; 0x341945A4 = .rodata.libc..L.str.6 0x34180CBA: E00F B 46L52 ; 0x34180CDC
.L51: 0x34180CBC: F244 31AA MOVW R1, #0x43AA ; 0x341943AA = .rodata.libc..L.str.4 0x34180CC0: F244 32A5 MOVW R2, #0x43A5 ; 0x341943A5 = .rodata.libc..L.str.3 0x34180CC4: F2C3 4119 MOVT R1, #0x3419 ; 0x341943AA = .rodata.libc..L.str.4 0x34180CC8: 1C48 ADDS R0, R1, #1 0x34180CCA: F417 5F00 TST R7, #0x2000 0x34180CCE: F2C3 4219 MOVT R2, #0x3419 ; 0x341943A5 = .rodata.libc..L.str.3 0x34180CD2: EA51 8102 CSEL R1, R1, R2, EQ 0x34180CD6: EA50 9002 CSINC R0, R0, R2, EQ 0x34180CDA: 06BA LSLS R2, R7, #26
.L52: 0x34180CDC: EA50 8051 CSEL R0, R0, R1, PL 0x34180CE0: F427 7680 BIC R6, R7, #0x0100
.L53: 0x34180CE4: F244 1108 MOVW R1, #0x4108 ; 0x34194108 = .rodata.libc..L.str 0x34180CE8: 2800 CMP R0, #0 0x34180CEA: F2C3 4119 MOVT R1, #0x3419 ; 0x34194108 = .rodata.libc..L.str 0x34180CEE: EA51 8400 CSEL R4, R1, R0, EQ 0x34180CF2: 05F0 LSLS R0, R6, #23 0x34180CF4: 4620 MOV R0, R4 0x34180CF6: D402 BMI 46L54 ; 0x34180CFE 0x34180CF8: F012 FFF9 BL strlen ; 0x34193CEE 0x34180CFC: E002 B 46L55 ; 0x34180D04
.L54: 0x34180CFE: 4649 MOV R1, R9 0x34180D00: F013 F984 BL strnlen ; 0x3419400C
.L55: 0x34180D04: F426 7600 BIC R6, R6, #0x0200 0x34180D08: EBA8 0800 SUB.W R8, R8, R0 0x34180D0C: 4605 MOV R5, R0 0x34180D0E: 4658 MOV R0, R11 0x34180D10: 4631 MOV R1, R6 0x34180D12: 4642 MOV R2, R8 0x34180D14: F013 F890 BL __SEGGER_RTL_pre_padding ; 0x34193E38 0x34180D18: 2D00 CMP R5, #0 0x34180D1A: F000 80D3 BEQ.W 46L77 ; 0x34180EC4
.L56: 0x34180D1E: F814 1B01 LDRB R1, [R4], #1 0x34180D22: 4658 MOV R0, R11 0x34180D24: F013 F836 BL __SEGGER_RTL_putc ; 0x34193D94 0x34180D28: 3D01 SUBS R5, #1 0x34180D2A: D1F8 BNE 46L56 ; 0x34180D1E 0x34180D2C: E0CA B 46L77 ; 0x34180EC4
.L57: 0x34180D2E: EEB0 0A49 VMOV.F32 S0, S18 0x34180D32: F013 F809 BL __SEGGER_RTL_float32_isnormal ; 0x34193D48 0x34180D36: 2800 CMP R0, #0 0x34180D38: FE0B AA09 VSELEQ.F32 S20, S22, S18 0x34180D3C: EEB0 0A4A VMOV.F32 S0, S20 0x34180D40: F013 F80E BL __SEGGER_RTL_float32_signbit ; 0x34193D60 0x34180D44: EEB1 0A4A VNEG.F32 S0, S20 0x34180D48: 2800 CMP R0, #0 0x34180D4A: FE0A 9A00 VSELEQ.F32 S18, S20, S0 0x34180D4E: A805 ADD R0, SP, #20 0x34180D50: BF18 IT NE 0x34180D52: F047 0760 ORRNE R7, R7, #96 0x34180D56: EEB0 0A49 VMOV.F32 S0, S18 0x34180D5A: F013 F805 BL frexpf ; 0x34193D68 0x34180D5E: EEB5 AA40 VCMP.F32 S20, #0.0 0x34180D62: 9805 LDR R0, [SP, #20] 0x34180D64: F246 6167 MOVW R1, #0x6667 0x34180D68: F2C6 6166 MOVT R1, #0x6666 0x34180D6C: EB00 0040 ADD.W R0, R0, R0, LSL #1 0x34180D70: FB80 0101 SMULL R0, R1, R0, R1 0x34180D74: 1088 ASRS R0, R1, #2 0x34180D76: EEF1 FA10 VMRS APSR_nzcv, FPSCR 0x34180D7A: EB00 70D1 ADD.W R0, R0, R1, LSR #31 0x34180D7E: 9005 STR R0, [SP, #20] 0x34180D80: D016 BEQ 46L61 ; 0x34180DB0 0x34180D82: 3001 ADDS R0, #1
.L58: 0x34180D84: F012 FF28 BL __SEGGER_RTL_pow10f ; 0x34193BD8 0x34180D88: EEB4 9A40 VCMP.F32 S18, S0 0x34180D8C: 9805 LDR R0, [SP, #20] 0x34180D8E: EEF1 FA10 VMRS APSR_nzcv, FPSCR 0x34180D92: DD06 BLE 46L60 ; 0x34180DA2 0x34180D94: 1C41 ADDS R1, R0, #1 0x34180D96: 9105 STR R1, [SP, #20] 0x34180D98: 3002 ADDS R0, #2 0x34180D9A: E7F3 B 46L58 ; 0x34180D84
.L59: 0x34180D9C: 9805 LDR R0, [SP, #20] 0x34180D9E: 3801 SUBS R0, #1 0x34180DA0: 9005 STR R0, [SP, #20]
.L60: 0x34180DA2: F012 FF19 BL __SEGGER_RTL_pow10f ; 0x34193BD8 0x34180DA6: EEB4 9A40 VCMP.F32 S18, S0 0x34180DAA: EEF1 FA10 VMRS APSR_nzcv, FPSCR 0x34180DAE: D4F5 BMI 46L59 ; 0x34180D9C
.L61: 0x34180DB0: 9805 LDR R0, [SP, #20] 0x34180DB2: F407 6440 AND R4, R7, #0x0C00 0x34180DB6: F5B4 6F80 CMP.W R4, #0x0400 0x34180DBA: D007 BEQ 46L62 ; 0x34180DCC 0x34180DBC: F5B4 6F40 CMP.W R4, #0x0C00 0x34180DC0: D10A BNE 46L63 ; 0x34180DD8 0x34180DC2: 4581 CMP R9, R0 0x34180DC4: BFC8 IT GT 0x34180DC6: F110 0F05 CMNGT R0, #5 0x34180DCA: DC05 BGT 46L63 ; 0x34180DD8
.L62: 0x34180DCC: 2826 CMP R0, #38 0x34180DCE: F040 8084 BNE.W 46L78 ; 0x34180EDA 0x34180DD2: EE89 9A0C VDIV.F32 S18, S18, S24 0x34180DD6: E085 B 46L79 ; 0x34180EE4
.L63: 0x34180DD8: 0579 LSLS R1, R7, #21 0x34180DDA: F140 80B4 BPL.W 46L83 ; 0x34180F46 0x34180DDE: 280E CMP R0, #14 0x34180DE0: F340 8090 BLE.W 46L80 ; 0x34180F04 0x34180DE4: F04F 0900 MOV.W R9, #0 0x34180DE8: E0AD B 46L83 ; 0x34180F46
.L64: 0x34180DEA: 7001 STRB R1, [R0] 0x34180DEC: E515 B 46L1 ; 0x3418081A
.L65: 0x34180DEE: F426 7680 BIC R6, R6, #0x0100
.L66: 0x34180DF2: 2030 MOVS R0, #48 0x34180DF4: 2701 MOVS R7, #1 0x34180DF6: F88D 001A STRB.W R0, [SP, #26] 0x34180DFA: 2000 MOVS R0, #0
.L67: 0x34180DFC: 9003 STR R0, [SP, #12]
.L68: 0x34180DFE: EA54 0008 ORRS.W R0, R4, R8 0x34180E02: D01F BEQ 46L70 ; 0x34180E44 0x34180E04: 0920 LSRS R0, R4, #4 0x34180E06: EA40 7108 ORR.W R1, R0, R8, LSL #28 0x34180E0A: 04B0 LSLS R0, R6, #18 0x34180E0C: F244 5280 MOVW R2, #0x4580 ; 0x34194580 = __SEGGER_RTL_hex_uc 0x34180E10: F244 5090 MOVW R0, #0x4590 ; 0x34194590 = __SEGGER_RTL_hex_lc 0x34180E14: F2C3 4219 MOVT R2, #0x3419 ; 0x34194580 = __SEGGER_RTL_hex_uc 0x34180E18: F2C3 4019 MOVT R0, #0x3419 ; 0x34194590 = __SEGGER_RTL_hex_lc 0x34180E1C: F10D 031A ADD.W R3, SP, #26 0x34180E20: EA50 8052 CSEL R0, R0, R2, PL
.L69: 0x34180E24: F004 020F AND R2, R4, #15 0x34180E28: 460C MOV R4, R1 0x34180E2A: EA51 1118 ORRS.W R1, R1, R8, LSR #4 0x34180E2E: EA4F 1818 LSR.W R8, R8, #4 0x34180E32: 5C82 LDRB R2, [R0, R2] 0x34180E34: EA4F 1114 LSR.W R1, R4, #4 0x34180E38: EA41 7108 ORR.W R1, R1, R8, LSL #28 0x34180E3C: 55DA STRB R2, [R3, R7] 0x34180E3E: F107 0701 ADD.W R7, R7, #1 0x34180E42: D1EF BNE 46L69 ; 0x34180E24
.L70: 0x34180E44: 464B MOV R3, R9
.L71: 0x34180E46: 1BD8 SUBS R0, R3, R7 0x34180E48: E9DD 1502 LDRD R1, R5, [SP, #8] 0x34180E4C: 2DFF CMP R5, #255 0x34180E4E: EA20 79E0 BIC.W R9, R0, R0, ASR #31 0x34180E52: EB07 0009 ADD.W R0, R7, R9 0x34180E56: EBA1 0800 SUB.W R8, R1, R0 0x34180E5A: 4640 MOV R0, R8 0x34180E5C: BF88 IT HI 0x34180E5E: 3801 SUBHI R0, #1 0x34180E60: 2D00 CMP R5, #0 0x34180E62: BF18 IT NE 0x34180E64: F1A0 0801 SUBNE.W R8, R0, #1 0x34180E68: F416 7F04 TST R6, #0x0210 0x34180E6C: D106 BNE 46L72 ; 0x34180E7C 0x34180E6E: 4658 MOV R0, R11 0x34180E70: 4631 MOV R1, R6 0x34180E72: 4642 MOV R2, R8 0x34180E74: F012 FFE0 BL __SEGGER_RTL_pre_padding ; 0x34193E38 0x34180E78: F04F 0800 MOV.W R8, #0
.L72: 0x34180E7C: 2DFF CMP R5, #255 0x34180E7E: D906 BLS 46L73 ; 0x34180E8E 0x34180E80: 0A29 LSRS R1, R5, #8 0x34180E82: 4658 MOV R0, R11 0x34180E84: F012 FF86 BL __SEGGER_RTL_putc ; 0x34193D94 0x34180E88: F10D 041A ADD.W R4, SP, #26 0x34180E8C: E002 B 46L74 ; 0x34180E94
.L73: 0x34180E8E: F10D 041A ADD.W R4, SP, #26 0x34180E92: B11D CBZ R5, .L75 ; 0x34180E9C
.L74: 0x34180E94: 4658 MOV R0, R11 0x34180E96: 4629 MOV R1, R5 0x34180E98: F012 FF7C BL __SEGGER_RTL_putc ; 0x34193D94
.L75: 0x34180E9C: 4658 MOV R0, R11 0x34180E9E: 4631 MOV R1, R6 0x34180EA0: 4642 MOV R2, R8 0x34180EA2: F012 FFC9 BL __SEGGER_RTL_pre_padding ; 0x34193E38 0x34180EA6: 4658 MOV R0, R11 0x34180EA8: 2130 MOVS R1, #48 0x34180EAA: 464A MOV R2, R9 0x34180EAC: F012 FFB4 BL __SEGGER_RTL_print_padding ; 0x34193E18 0x34180EB0: 2F01 CMP R7, #1 0x34180EB2: DB07 BLT 46L77 ; 0x34180EC4
.L76: 0x34180EB4: 463D MOV R5, R7 0x34180EB6: 3F01 SUBS R7, #1 0x34180EB8: 4658 MOV R0, R11 0x34180EBA: 5DE1 LDRB R1, [R4, R7] 0x34180EBC: F012 FF6A BL __SEGGER_RTL_putc ; 0x34193D94 0x34180EC0: 2D01 CMP R5, #1 0x34180EC2: D8F7 BHI 46L76 ; 0x34180EB4
.L77: 0x34180EC4: 9C04 LDR R4, [SP, #16] 0x34180EC6: 06F0 LSLS R0, R6, #27 0x34180EC8: F57F ACA7 BPL.W 46L1 ; 0x3418081A 0x34180ECC: 4658 MOV R0, R11 0x34180ECE: 2120 MOVS R1, #32 0x34180ED0: 4642 MOV R2, R8 0x34180ED2: F012 FFA1 BL __SEGGER_RTL_print_padding ; 0x34193E18 0x34180ED6: F7FF BCA0 B.W 46L1 ; 0x3418081A
.L78: 0x34180EDA: 4240 RSBS R0, R0, #0 0x34180EDC: F012 FE7C BL __SEGGER_RTL_pow10f ; 0x34193BD8 0x34180EE0: EE29 9A00 VMUL.F32 S18, S18, S0
.L79: 0x34180EE4: EEB5 9A40 VCMP.F32 S18, #0.0 0x34180EE8: EEF1 FA10 VMRS APSR_nzcv, FPSCR 0x34180EEC: F000 80AC BEQ.W 46L92 ; 0x34181048 0x34180EF0: EEB0 0A49 VMOV.F32 S0, S18 0x34180EF4: F012 FE4C BL __SEGGER_RTL_float32_isinf ; 0x34193B90 0x34180EF8: 2800 CMP R0, #0 0x34180EFA: F000 8088 BEQ.W 46L88 ; 0x3418100E 0x34180EFE: EEB5 9A40 VCMP.F32 S18, #0.0 0x34180F02: E6BE B 46L49 ; 0x34180C82
.L80: 0x34180F04: 43C1 MVNS R1, R0 0x34180F06: 2210 MOVS R2, #16 0x34180F08: 4449 ADD R1, R9 0x34180F0A: 2910 CMP R1, #16 0x34180F0C: EA51 89B2 CSEL R9, R1, R2, LT 0x34180F10: 063A LSLS R2, R7, #24 0x34180F12: D418 BMI 46L83 ; 0x34180F46 0x34180F14: B1B9 CBZ R1, .L83 ; 0x34180F46
.L81: 0x34180F16: 4648 MOV R0, R9 0x34180F18: F012 FE5E BL __SEGGER_RTL_pow10f ; 0x34193BD8 0x34180F1C: EEB6 1A00 VMOV.F32 S2, #0.5 0x34180F20: EE09 1A00 VMLA.F32 S2, S18, S0 0x34180F24: EEB0 0A41 VMOV.F32 S0, S2 0x34180F28: F00C FB96 BL floorf ; 0x3418D658 0x34180F2C: EEF0 0A48 VMOV.F32 S1, S16 0x34180F30: F00C FB04 BL fmodf ; 0x3418D53C 0x34180F34: EEB5 0A40 VCMP.F32 S0, #0.0 0x34180F38: EEF1 FA10 VMRS APSR_nzcv, FPSCR 0x34180F3C: D102 BNE 46L82 ; 0x34180F44 0x34180F3E: F1B9 0901 SUBS.W R9, R9, #1 0x34180F42: D1E8 BNE 46L81 ; 0x34180F16
.L82: 0x34180F44: 9805 LDR R0, [SP, #20]
.L83: 0x34180F46: F1C9 0100 RSB R1, R9, #0 0x34180F4A: 3810 SUBS R0, #16 0x34180F4C: 4288 CMP R0, R1 0x34180F4E: EA50 B0C9 CSNEG R0, R0, R9, GT 0x34180F52: F012 FE41 BL __SEGGER_RTL_pow10f ; 0x34193BD8 0x34180F56: F04F 30FF MOV.W R0, #0xFFFFFFFF 0x34180F5A: F012 FE22 BL ldexpf ; 0x34193BA2 0x34180F5E: 9805 LDR R0, [SP, #20] 0x34180F60: EE39 9A00 VADD.F32 S18, S18, S0 0x34180F64: 3001 ADDS R0, #1 0x34180F66: F012 FE37 BL __SEGGER_RTL_pow10f ; 0x34193BD8 0x34180F6A: EEB4 9A40 VCMP.F32 S18, S0 0x34180F6E: 9805 LDR R0, [SP, #20] 0x34180F70: EEF1 FA10 VMRS APSR_nzcv, FPSCR 0x34180F74: 4645 MOV R5, R8 0x34180F76: EA50 90B0 CINC R0, R0, GE 0x34180F7A: 2800 CMP R0, #0 0x34180F7C: D413 BMI 46L84 ; 0x34180FA6 0x34180F7E: 2811 CMP R0, #17 0x34180F80: D315 BCC 46L85 ; 0x34180FAE 0x34180F82: F1A0 0110 SUB.W R1, R0, #16 0x34180F86: F1C0 0010 RSB R0, R0, #16 0x34180F8A: 9105 STR R1, [SP, #20] 0x34180F8C: F012 FE24 BL __SEGGER_RTL_pow10f ; 0x34193BD8 0x34180F90: EE29 0A00 VMUL.F32 S0, S18, S0 0x34180F94: EE10 0A10 VMOV R0, S0 0x34180F98: F012 FCF2 BL __aeabi_f2ulz ; 0x34193980 0x34180F9C: 4604 MOV R4, R0 0x34180F9E: 460E MOV R6, R1 0x34180FA0: EEB0 9A4B VMOV.F32 S18, S22 0x34180FA4: E011 B 46L86 ; 0x34180FCA
.L84: 0x34180FA6: E89F 0050 CLRM 123R4, R6} 0x34180FAA: 9405 STR R4, [SP, #20] 0x34180FAC: E00D B 46L86 ; 0x34180FCA
.L85: 0x34180FAE: 2000 MOVS R0, #0 0x34180FB0: 9005 STR R0, [SP, #20] 0x34180FB2: EE19 0A10 VMOV R0, S18 0x34180FB6: F012 FCE3 BL __aeabi_f2ulz ; 0x34193980 0x34180FBA: 4604 MOV R4, R0 0x34180FBC: 460E MOV R6, R1 0x34180FBE: F00C FB8B BL __aeabi_ul2f ; 0x3418D6D8 0x34180FC2: EE00 0A10 VMOV S0, R0 0x34180FC6: EE39 9A40 VSUB.F32 S18, S18, S0
.L86: 0x34180FCA: F240 7050 MOVW R0, #0x0750 ; 0x34180750 = __SEGGER_RTL_ipow10 0x34180FCE: F427 6C80 BIC R12, R7, #0x0400 0x34180FD2: F2C3 4018 MOVT R0, #0x3418 ; 0x34180750 = __SEGGER_RTL_ipow10 0x34180FD6: 2101 MOVS R1, #1 0x34180FD8: 3008 ADDS R0, #8
.L87: 0x34180FDA: C80C LDM R0!, {R2-R3} 0x34180FDC: 4688 MOV R8, R1 0x34180FDE: 1AA1 SUBS R1, R4, R2 0x34180FE0: EB76 0103 SBCS.W R1, R6, R3 0x34180FE4: F108 0101 ADD.W R1, R8, #1 0x34180FE8: D2F7 BCS 46L87 ; 0x34180FDA 0x34180FEA: F007 0080 AND R0, R7, #128 0x34180FEE: 9905 LDR R1, [SP, #20] 0x34180FF0: EA40 0009 ORR.W R0, R0, R9 0x34180FF4: F017 0F60 TST R7, #96 0x34180FF8: BF18 IT NE 0x34180FFA: 3D01 SUBNE R5, #1 0x34180FFC: 2800 CMP R0, #0 0x34180FFE: EB09 0008 ADD.W R0, R9, R8 0x34181002: 4408 ADD R0, R1 0x34181004: BF18 IT NE 0x34181006: 3D01 SUBNE R5, #1 0x34181008: 4667 MOV R7, R12 0x3418100A: 1A29 SUBS R1, R5, R0 0x3418100C: E0C9 B 46L97 ; 0x341811A2
.L88: 0x3418100E: EEB4 9A48 VCMP.F32 S18, S16 0x34181012: 9805 LDR R0, [SP, #20] 0x34181014: EEF1 FA10 VMRS APSR_nzcv, FPSCR 0x34181018: DB08 BLT 46L90 ; 0x3418102C
.L89: 0x3418101A: EE89 9A08 VDIV.F32 S18, S18, S16 0x3418101E: 3001 ADDS R0, #1 0x34181020: EEB4 9A48 VCMP.F32 S18, S16 0x34181024: EEF1 FA10 VMRS APSR_nzcv, FPSCR 0x34181028: DAF7 BGE 46L89 ; 0x3418101A 0x3418102A: 9005 STR R0, [SP, #20]
.L90: 0x3418102C: EEB4 9A4D VCMP.F32 S18, S26 0x34181030: EEF1 FA10 VMRS APSR_nzcv, FPSCR 0x34181034: D508 BPL 46L92 ; 0x34181048
.L91: 0x34181036: EE29 9A08 VMUL.F32 S18, S18, S16 0x3418103A: 3801 SUBS R0, #1 0x3418103C: EEB4 9A4D VCMP.F32 S18, S26 0x34181040: EEF1 FA10 VMRS APSR_nzcv, FPSCR 0x34181044: D4F7 BMI 46L91 ; 0x34181036 0x34181046: 9005 STR R0, [SP, #20]
.L92: 0x34181048: 4648 MOV R0, R9 0x3418104A: F5B4 6F40 CMP.W R4, #0x0C00 0x3418104E: BF08 IT EQ 0x34181050: 3801 SUBEQ R0, #1 0x34181052: F1B9 0F00 CMP.W R9, #0 0x34181056: EA50 8419 CSEL R4, R0, R9, NE 0x3418105A: 4681 MOV R9, R0 0x3418105C: 4260 RSBS R0, R4, #0 0x3418105E: F012 FDBB BL __SEGGER_RTL_pow10f ; 0x34193BD8 0x34181062: F04F 30FF MOV.W R0, #0xFFFFFFFF 0x34181066: F012 FD9C BL ldexpf ; 0x34193BA2 0x3418106A: EE39 9A00 VADD.F32 S18, S18, S0 0x3418106E: EEB4 9A48 VCMP.F32 S18, S16 0x34181072: EEF1 FA10 VMRS APSR_nzcv, FPSCR 0x34181076: BFA1 ITTTT GE 0x34181078: EE89 9A08 VDIVGE.F32 S18, S18, S16 0x3418107C: 9805 LDRGE R0, [SP, #20] 0x3418107E: 3001 ADDGE R0, #1 0x34181080: 9005 STRGE R0, [SP, #20] 0x34181082: 2C00 CMP R4, #0 0x34181084: D044 BEQ 46L94 ; 0x34181110 0x34181086: F407 6008 AND R0, R7, #0x0880 0x3418108A: F5B0 6F00 CMP.W R0, #0x0800 0x3418108E: D141 BNE 46L95 ; 0x34181114 0x34181090: 2010 MOVS R0, #16 0x34181092: 2C10 CMP R4, #16 0x34181094: EA54 89B0 CSEL R9, R4, R0, LT 0x34181098: 4648 MOV R0, R9 0x3418109A: F012 FD9D BL __SEGGER_RTL_pow10f ; 0x34193BD8 0x3418109E: EE29 0A00 VMUL.F32 S0, S18, S0 0x341810A2: EE10 0A10 VMOV R0, S0 0x341810A6: F012 FC6B BL __aeabi_f2ulz ; 0x34193980 0x341810AA: 4604 MOV R4, R0 0x341810AC: 4308 ORRS R0, R1 0x341810AE: D02F BEQ 46L94 ; 0x34181110 0x341810B0: F64C 42CD MOVW R2, #0xCCCD 0x341810B4: 460D MOV R5, R1 0x341810B6: F6CC 42CC MOVT R2, #0xCCCC 0x341810BA: 1E53 SUBS R3, R2, #1 0x341810BC: FBA4 0102 UMULL R0, R1, R4, R2 0x341810C0: FB04 1103 MLA R1, R4, R3, R1 0x341810C4: FB05 1102 MLA R1, R5, R2, R1 0x341810C8: 07CA LSLS R2, R1, #31 0x341810CA: EA42 0250 ORR.W R2, R2, R0, LSR #1 0x341810CE: 07C0 LSLS R0, R0, #31 0x341810D0: EA40 0051 ORR.W R0, R0, R1, LSR #1 0x341810D4: F1D2 3199 RSBS R1, R2, #0x99999999 0x341810D8: F649 1199 MOVW R1, #0x9999 0x341810DC: F6C1 1199 MOVT R1, #0x1999 0x341810E0: EB71 0000 SBCS.W R0, R1, R0 0x341810E4: D316 BCC 46L95 ; 0x34181114
.L93: 0x341810E6: 4620 MOV R0, R4 0x341810E8: 4629 MOV R1, R5 0x341810EA: 220A MOVS R2, #10 0x341810EC: 2300 MOVS R3, #0 0x341810EE: F1A9 0901 SUB.W R9, R9, #1 0x341810F2: F012 FC65 BL __aeabi_uldivmod ; 0x341939C0 0x341810F6: 220A MOVS R2, #10 0x341810F8: 2300 MOVS R3, #0 0x341810FA: 4604 MOV R4, R0 0x341810FC: 460D MOV R5, R1 0x341810FE: F012 FC5F BL __aeabi_uldivmod ; 0x341939C0 0x34181102: F1B9 0F00 CMP.W R9, #0 0x34181106: D005 BEQ 46L95 ; 0x34181114 0x34181108: EA52 0003 ORRS.W R0, R2, R3 0x3418110C: D0EB BEQ 46L93 ; 0x341810E6 0x3418110E: E001 B 46L95 ; 0x34181114
.L94: 0x34181110: F04F 0900 MOV.W R9, #0
.L95: 0x34181114: EBA8 0009 SUB.W R0, R8, R9 0x34181118: F007 0180 AND R1, R7, #128 0x3418111C: 1F45 SUBS R5, R0, #5 0x3418111E: EA51 0109 ORRS.W R1, R1, R9 0x34181122: BF18 IT NE 0x34181124: 1F85 SUBNE R5, R0, #6 0x34181126: 9805 LDR R0, [SP, #20] 0x34181128: F04F 0801 MOV.W R8, #1 0x3418112C: 04F9 LSLS R1, R7, #19 0x3418112E: D520 BPL 46L96 ; 0x34181172 0x34181130: F245 5156 MOVW R1, #0x5556 0x34181134: F2C5 5155 MOVT R1, #0x5555 0x34181138: EEB0 0A48 VMOV.F32 S0, S16 0x3418113C: FB80 1201 SMULL R1, R2, R0, R1 0x34181140: EB02 71D2 ADD.W R1, R2, R2, LSR #31 0x34181144: EB01 0141 ADD.W R1, R1, R1, LSL #1 0x34181148: 1A43 SUBS R3, R0, R1 0x3418114A: 2102 MOVS R1, #2 0x3418114C: 1ECA SUBS R2, R1, #3 0x3418114E: 3302 ADDS R3, #2 0x34181150: E8DF F003 TBB 91PC, R3] 0x34181154: 07 DC.B 0x07 ; '\x07' 0x34181155: 03 DC.B 0x03 ; '\x03' 0x34181156: 0D DC.B 0x0D ; '\r' 0x34181157: 07 DC.B 0x07 ; '\x07' 0x34181158: 03 DC.B 0x03 ; '\x03' 0x34181159: 00 DC.B 0x00 ; '\0' 0x3418115A: ED9F 0A9B VLDR S0, =0x42C80000 ; [PC, #0x026C] [0x341813C8] 0x3418115E: 2103 MOVS R1, #3 0x34181160: 1F4A SUBS R2, R1, #5 0x34181162: EE29 9A00 VMUL.F32 S18, S18, S0 0x34181166: 4410 ADD R0, R2 0x34181168: 4415 ADD R5, R2 0x3418116A: 4688 MOV R8, R1 0x3418116C: 9005 STR R0, [SP, #20] 0x3418116E: EA29 79E9 BIC.W R9, R9, R9, ASR #31
.L96: 0x34181172: F017 0F60 TST R7, #96 0x34181176: F427 6700 BIC R7, R7, #0x0800 0x3418117A: BF18 IT NE 0x3418117C: 3D01 SUBNE R5, #1 0x3418117E: F012 FE05 BL abs ; 0x34193D8C 0x34181182: 2863 CMP R0, #99 0x34181184: EE19 0A10 VMOV R0, S18 0x34181188: BFC8 IT GT 0x3418118A: 3D01 SUBGT R5, #1 0x3418118C: F012 FBF8 BL __aeabi_f2ulz ; 0x34193980 0x34181190: 4604 MOV R4, R0 0x34181192: 460E MOV R6, R1 0x34181194: F00C FAA0 BL __aeabi_ul2f ; 0x3418D6D8 0x34181198: EE00 0A10 VMOV S0, R0 0x3418119C: 4629 MOV R1, R5 0x3418119E: EE39 9A40 VSUB.F32 S18, S18, S0
.L97: 0x341811A2: EA21 75E1 BIC.W R5, R1, R1, ASR #31 0x341811A6: F417 7F04 TST R7, #0x0210 0x341811AA: D107 BNE 46L99 ; 0x341811BC 0x341811AC: 2901 CMP R1, #1 0x341811AE: DB05 BLT 46L99 ; 0x341811BC
.L98: 0x341811B0: 4658 MOV R0, R11 0x341811B2: 2120 MOVS R1, #32 0x341811B4: F012 FDEE BL __SEGGER_RTL_putc ; 0x34193D94 0x341811B8: 3D01 SUBS R5, #1 0x341811BA: D1F9 BNE 46L98 ; 0x341811B0
.L99: 0x341811BC: 06B8 LSLS R0, R7, #26 0x341811BE: EA4F 6047 LSL.W R0, R7, #25 0x341811C2: D403 BMI 46L100 ; 0x341811CC 0x341811C4: 2800 CMP R0, #0 0x341811C6: D508 BPL 46L102 ; 0x341811DA 0x341811C8: 2120 MOVS R1, #32 0x341811CA: E003 B 46L101 ; 0x341811D4
.L100: 0x341811CC: 212D MOVS R1, #45 0x341811CE: 2800 CMP R0, #0 0x341811D0: BF58 IT PL 0x341811D2: 212B MOVPL R1, #43
.L101: 0x341811D4: 4658 MOV R0, R11 0x341811D6: F012 FDDD BL __SEGGER_RTL_putc ; 0x34193D94
.L102: 0x341811DA: 06F8 LSLS R0, R7, #27 0x341811DC: 9703 STR R7, [SP, #12] 0x341811DE: D406 BMI 46L104 ; 0x341811EE 0x341811E0: B12D CBZ R5, .L104 ; 0x341811EE
.L103: 0x341811E2: 4658 MOV R0, R11 0x341811E4: 2130 MOVS R1, #48 0x341811E6: F012 FDD5 BL __SEGGER_RTL_putc ; 0x34193D94 0x341811EA: 3D01 SUBS R5, #1 0x341811EC: D1F9 BNE 46L103 ; 0x341811E2
.L104: 0x341811EE: F240 7050 MOVW R0, #0x0750 ; 0x34180750 = __SEGGER_RTL_ipow10 0x341811F2: F2C3 4018 MOVT R0, #0x3418 ; 0x34180750 = __SEGGER_RTL_ipow10 0x341811F6: EB00 07C8 ADD.W R7, R0, R8, LSL #3
.L105: 0x341811FA: E977 0102 LDRD R0, R1, [R7, #-8]! 0x341811FE: 1A22 SUBS R2, R4, R0 0x34181200: EB76 0201 SBCS.W R2, R6, R1 0x34181204: D201 BCS 46L106 ; 0x3418120A 0x34181206: 2130 MOVS R1, #48 0x34181208: E008 B 46L108 ; 0x3418121C
.L106: 0x3418120A: 2230 MOVS R2, #48
.L107: 0x3418120C: 1A24 SUBS R4, R4, R0 0x3418120E: 418E SBCS R6, R1 0x34181210: 3201 ADDS R2, #1 0x34181212: 1A23 SUBS R3, R4, R0 0x34181214: EB76 0301 SBCS.W R3, R6, R1 0x34181218: D2F8 BCS 46L107 ; 0x3418120C 0x3418121A: B2D1 UXTB R1, R2
.L108: 0x3418121C: 4658 MOV R0, R11 0x3418121E: F012 FDB9 BL __SEGGER_RTL_putc ; 0x34193D94 0x34181222: F1B8 0801 SUBS.W R8, R8, #1 0x34181226: D1E8 BNE 46L105 ; 0x341811FA 0x34181228: 9E03 LDR R6, [SP, #12] 0x3418122A: 0534 LSLS R4, R6, #20 0x3418122C: D50B BPL 46L110 ; 0x34181246 0x3418122E: 9805 LDR R0, [SP, #20] 0x34181230: 2801 CMP R0, #1 0x34181232: DB08 BLT 46L110 ; 0x34181246
.L109: 0x34181234: 3801 SUBS R0, #1 0x34181236: 9005 STR R0, [SP, #20] 0x34181238: 4658 MOV R0, R11 0x3418123A: 2130 MOVS R1, #48 0x3418123C: F012 FDAA BL __SEGGER_RTL_putc ; 0x34193D94 0x34181240: 9805 LDR R0, [SP, #20] 0x34181242: 2800 CMP R0, #0 0x34181244: DCF6 BGT 46L109 ; 0x34181234
.L110: 0x34181246: F006 0080 AND R0, R6, #128 0x3418124A: EA50 0009 ORRS.W R0, R0, R9 0x3418124E: D045 BEQ 46L117 ; 0x341812DC 0x34181250: 4658 MOV R0, R11 0x34181252: 212E MOVS R1, #46 0x34181254: F012 FD9E BL __SEGGER_RTL_putc ; 0x34193D94 0x34181258: EA29 70E9 BIC.W R0, R9, R9, ASR #31 0x3418125C: 2110 MOVS R1, #16 0x3418125E: 2810 CMP R0, #16 0x34181260: EA50 80B1 CSEL R0, R0, R1, LT 0x34181264: 9905 LDR R1, [SP, #20] 0x34181266: 9002 STR R0, [SP, #8] 0x34181268: 2C00 CMP R4, #0 0x3418126A: BF48 IT MI 0x3418126C: 1A40 SUBMI R0, R0, R1 0x3418126E: F012 FCB3 BL __SEGGER_RTL_pow10f ; 0x34193BD8 0x34181272: F1B9 0F01 CMP.W R9, #1 0x34181276: DB26 BLT 46L115 ; 0x341812C6 0x34181278: EE29 0A00 VMUL.F32 S0, S18, S0 0x3418127C: EE10 0A10 VMOV R0, S0 0x34181280: F012 FB7E BL __aeabi_f2ulz ; 0x34193980 0x34181284: F8DD 8008 LDR.W R8, [SP, #8] 0x34181288: 4604 MOV R4, R0 0x3418128A: F240 7050 MOVW R0, #0x0750 ; 0x34180750 = __SEGGER_RTL_ipow10 0x3418128E: 460E MOV R6, R1 0x34181290: F2C3 4018 MOVT R0, #0x3418 ; 0x34180750 = __SEGGER_RTL_ipow10 0x34181294: EB00 07C8 ADD.W R7, R0, R8, LSL #3
.L111: 0x34181298: E977 0102 LDRD R0, R1, [R7, #-8]! 0x3418129C: 1A22 SUBS R2, R4, R0 0x3418129E: EB76 0201 SBCS.W R2, R6, R1 0x341812A2: D201 BCS 46L112 ; 0x341812A8 0x341812A4: 2130 MOVS R1, #48 0x341812A6: E008 B 46L114 ; 0x341812BA
.L112: 0x341812A8: 2230 MOVS R2, #48
.L113: 0x341812AA: 1A24 SUBS R4, R4, R0 0x341812AC: 418E SBCS R6, R1 0x341812AE: 3201 ADDS R2, #1 0x341812B0: 1A23 SUBS R3, R4, R0 0x341812B2: EB76 0301 SBCS.W R3, R6, R1 0x341812B6: D2F8 BCS 46L113 ; 0x341812AA 0x341812B8: B2D1 UXTB R1, R2
.L114: 0x341812BA: 4658 MOV R0, R11 0x341812BC: F012 FD6A BL __SEGGER_RTL_putc ; 0x34193D94 0x341812C0: F1B8 0801 SUBS.W R8, R8, #1 0x341812C4: D1E8 BNE 46L111 ; 0x34181298
.L115: 0x341812C6: E9DD 0602 LDRD R0, R6, [SP, #8] 0x341812CA: EBB9 0400 SUBS.W R4, R9, R0 0x341812CE: D005 BEQ 46L117 ; 0x341812DC
.L116: 0x341812D0: 4658 MOV R0, R11 0x341812D2: 2130 MOVS R1, #48 0x341812D4: F012 FD5E BL __SEGGER_RTL_putc ; 0x34193D94 0x341812D8: 3C01 SUBS R4, #1 0x341812DA: D1F9 BNE 46L116 ; 0x341812D0
.L117: 0x341812DC: 0570 LSLS R0, R6, #21 0x341812DE: D54A BPL 46L121 ; 0x34181376 0x341812E0: 2145 MOVS R1, #69 0x341812E2: 04B0 LSLS R0, R6, #18 0x341812E4: 4658 MOV R0, R11 0x341812E6: BF58 IT PL 0x341812E8: 2165 MOVPL R1, #101 0x341812EA: F012 FD53 BL __SEGGER_RTL_putc ; 0x34193D94 0x341812EE: 9805 LDR R0, [SP, #20] 0x341812F0: 2800 CMP R0, #0 0x341812F2: 4658 MOV R0, R11 0x341812F4: DB04 BLT 46L118 ; 0x34181300 0x341812F6: 212B MOVS R1, #43 0x341812F8: F012 FD4C BL __SEGGER_RTL_putc ; 0x34193D94 0x341812FC: 9805 LDR R0, [SP, #20] 0x341812FE: E005 B 46L119 ; 0x3418130C
.L118: 0x34181300: 212D MOVS R1, #45 0x34181302: F012 FD47 BL __SEGGER_RTL_putc ; 0x34193D94 0x34181306: 9805 LDR R0, [SP, #20] 0x34181308: 4240 RSBS R0, R0, #0 0x3418130A: 9005 STR R0, [SP, #20]
.L119: 0x3418130C: 2864 CMP R0, #100 0x3418130E: DB15 BLT 46L120 ; 0x3418133C 0x34181310: F248 541F MOVW R4, #0x851F 0x34181314: F2C5 14EB MOVT R4, #0x51EB 0x34181318: FBA0 0104 UMULL R0, R1, R0, R4 0x3418131C: 2030 MOVS R0, #48 0x3418131E: EB00 1151 ADD.W R1, R0, R1, LSR #5 0x34181322: 4658 MOV R0, R11 0x34181324: F012 FD36 BL __SEGGER_RTL_putc ; 0x34193D94 0x34181328: 9805 LDR R0, [SP, #20] 0x3418132A: FB80 1204 SMULL R1, R2, R0, R4 0x3418132E: 1151 ASRS R1, R2, #5 0x34181330: EB01 71D2 ADD.W R1, R1, R2, LSR #31 0x34181334: 2264 MOVS R2, #100 0x34181336: FB01 0012 MLS R0, R1, R2, R0 0x3418133A: 9005 STR R0, [SP, #20]
.L120: 0x3418133C: F246 6467 MOVW R4, #0x6667 0x34181340: F2C6 6466 MOVT R4, #0x6666 0x34181344: FB80 0104 SMULL R0, R1, R0, R4 0x34181348: 1088 ASRS R0, R1, #2 0x3418134A: EB00 70D1 ADD.W R0, R0, R1, LSR #31 0x3418134E: F100 0130 ADD.W R1, R0, #48 0x34181352: 4658 MOV R0, R11 0x34181354: F012 FD1E BL __SEGGER_RTL_putc ; 0x34193D94 0x34181358: 9805 LDR R0, [SP, #20] 0x3418135A: FB80 1204 SMULL R1, R2, R0, R4 0x3418135E: 1091 ASRS R1, R2, #2 0x34181360: EB01 71D2 ADD.W R1, R1, R2, LSR #31 0x34181364: EB01 0181 ADD.W R1, R1, R1, LSL #2 0x34181368: EBA0 0041 SUB.W R0, R0, R1, LSL #1 0x3418136C: F100 0130 ADD.W R1, R0, #48 0x34181370: 4658 MOV R0, R11 0x34181372: F012 FD0F BL __SEGGER_RTL_putc ; 0x34193D94
.L121: 0x34181376: 9C04 LDR R4, [SP, #16] 0x34181378: B90D CBNZ R5, .L122 ; 0x3418137E 0x3418137A: F02F C5B3 LE 46L1 ; 0x3418081A
.L122: 0x3418137E: 4658 MOV R0, R11 0x34181380: 2120 MOVS R1, #32 0x34181382: F012 FD07 BL __SEGGER_RTL_putc ; 0x34193D94 0x34181386: 3D01 SUBS R5, #1 0x34181388: D1F9 BNE 46L122 ; 0x3418137E 0x3418138A: F7FF BA46 B.W 46L1 ; 0x3418081A
.L123: 0x3418138E: F8DB 000C LDR.W R0, [R11, #12] 0x34181392: B128 CBZ R0, .L124 ; 0x341813A0 0x34181394: E9DB 1200 LDRD R1, R2, [R11] 0x34181398: 4291 CMP R1, R2 0x3418139A: BF3C ITT CC 0x3418139C: 2200 MOVCC R2, #0 0x3418139E: 5442 STRBCC R2, [R0, R1]
.L124: 0x341813A0: 4658 MOV R0, R11 0x341813A2: F012 FC36 BL __SEGGER_RTL_prin_flush ; 0x34193C12 0x341813A6: F8DB 0000 LDR.W R0, [R11]
.L125: 0x341813AA: B00C ADD SP, SP, #48 0x341813AC: ECBD 8B0E VLDM SP!, {D8-D14} 0x341813B0: E8BD 8FF8 POP.W 123R3-R11, PC}
.L126: 0x341813B4: B108 CBZ R0, .L127 ; 0x341813BA 0x341813B6: F02F C5D1 LE 46L1 ; 0x3418081A
.L127: 0x341813BA: 4658 MOV R0, R11 0x341813BC: F012 FC29 BL __SEGGER_RTL_prin_flush ; 0x34193C12 0x341813C0: F04F 30FF MOV.W R0, #0xFFFFFFFF 0x341813C4: E7F1 B 46L125 ; 0x341813AA 0x341813C6: BF00 NOP 0x341813C8: 42C80000 DC.W 0x42C80000

Section .text.HAL_MspInit from blto2_FSBL_lto.o, size=8, align=4


HAL_MspInit: 0x341813CC: B580 PUSH 123R7, LR} 0x341813CE: F00D F913 BL HAL_PWREx_EnableVddIO3 ; 0x3418E5F8 0x341813D2: BD80 POP 123R7, PC}

Section .text.SysTick_Handler from blto2_FSBL_lto.o, size=8, align=4


SysTick_Handler: 0x341813D4: B580 PUSH 123R7, LR} 0x341813D6: F00C FE2D BL HAL_IncTick ; 0x3418E034 0x341813DA: BD80 POP 123R7, PC}

Section .text.SystemCoreClockUpdate from blto2_FSBL_lto.o, size=828, align=4


SystemCoreClockUpdate: 0x341813DC: B08E SUB SP, SP, #56 0x341813DE: 2000 MOVS R0, #0 0x341813E0: 900D STR R0, [SP, #52] 0x341813E2: 900C STR R0, [SP, #48] 0x341813E4: 900B STR R0, [SP, #44] 0x341813E6: 900A STR R0, [SP, #40] 0x341813E8: 9009 STR R0, [SP, #36] 0x341813EA: 9008 STR R0, [SP, #32] 0x341813EC: F248 0020 MOVW R0, #0x8020 0x341813F0: F2C5 6002 MOVT R0, #0x5602 0x341813F4: 6800 LDR R0, [R0] 0x341813F6: F400 1040 AND R0, R0, #0x300000 0x341813FA: 4601 MOV R1, R0 0x341813FC: 9102 STR R1, [SP, #8] 0x341813FE: B160 CBZ R0, .L1 ; 0x3418141A 0x34181400: 9802 LDR R0, [SP, #8] 0x34181402: F5B0 1F80 CMP.W R0, #0x100000 0x34181406: D016 BEQ 46L2 ; 0x34181436 0x34181408: 9802 LDR R0, [SP, #8] 0x3418140A: F5B0 1F00 CMP.W R0, #0x200000 0x3418140E: D026 BEQ 46L5 ; 0x3418145E 0x34181410: 9802 LDR R0, [SP, #8] 0x34181412: F5B0 1F40 CMP.W R0, #0x300000 0x34181416: D028 BEQ 46L6 ; 0x3418146A 0x34181418: E174 B 46L23 ; 0x34181704
.L1: 0x3418141A: F248 0048 MOVW R0, #0x8048 0x3418141E: F2C5 6002 MOVT R0, #0x5602 0x34181422: 6800 LDR R0, [R0] 0x34181424: F3C0 11C1 UBFX R1, R0, #7, #2 0x34181428: F249 0000 MOVW R0, #0x9000 0x3418142C: F2C0 30D0 MOVT R0, #0x03D0 0x34181430: 40C8 LSRS R0, R1 0x34181432: 900D STR R0, [SP, #52] 0x34181434: E166 B 46L23 ; 0x34181704
.L2: 0x34181436: F248 0044 MOVW R0, #0x8044 0x3418143A: F2C5 6002 MOVT R0, #0x5602 0x3418143E: 6800 LDR R0, [R0] 0x34181440: 0580 LSLS R0, R0, #22 0x34181442: 2800 CMP R0, #0 0x34181444: D405 BMI 46L3 ; 0x34181452 0x34181446: F640 1000 MOVW R0, #0x0900 0x3418144A: F2C0 003D MOVT R0, #61 0x3418144E: 900D STR R0, [SP, #52] 0x34181450: E004 B 46L4 ; 0x3418145C
.L3: 0x34181452: F242 4000 MOVW R0, #0x2400 0x34181456: F2C0 00F4 MOVT R0, #244 0x3418145A: 900D STR R0, [SP, #52]
.L4: 0x3418145C: E152 B 46L23 ; 0x34181704
.L5: 0x3418145E: F646 4000 MOVW R0, #0x6C00 0x34181462: F2C0 20DC MOVT R0, #0x02DC 0x34181466: 900D STR R0, [SP, #52] 0x34181468: E14C B 46L23 ; 0x34181704
.L6: 0x3418146A: F248 00C4 MOVW R0, #0x80C4 0x3418146E: F2C5 6002 MOVT R0, #0x5602 0x34181472: 6800 LDR R0, [R0] 0x34181474: F000 5040 AND R0, R0, #0x30000000 0x34181478: 4601 MOV R1, R0 0x3418147A: 9101 STR R1, [SP, #4] 0x3418147C: B140 CBZ R0, .L7 ; 0x34181490 0x3418147E: 9801 LDR R0, [SP, #4] 0x34181480: F1B0 5F80 CMP.W R0, #0x10000000 0x34181484: D033 BEQ 46L9 ; 0x341814EE 0x34181486: 9801 LDR R0, [SP, #4] 0x34181488: F1B0 5F00 CMP.W R0, #0x20000000 0x3418148C: D05E BEQ 46L11 ; 0x3418154C 0x3418148E: E08C B 46L13 ; 0x341815AA
.L7: 0x34181490: F248 0080 MOVW R0, #0x8080 0x34181494: F2C5 6002 MOVT R0, #0x5602 0x34181498: 6800 LDR R0, [R0] 0x3418149A: 9007 STR R0, [SP, #28] 0x3418149C: 9807 LDR R0, [SP, #28] 0x3418149E: F000 40E0 AND R0, R0, #0x70000000 0x341814A2: 9006 STR R0, [SP, #24] 0x341814A4: 9807 LDR R0, [SP, #28] 0x341814A6: F000 6000 AND R0, R0, #0x08000000 0x341814AA: 9005 STR R0, [SP, #20] 0x341814AC: 9805 LDR R0, [SP, #20] 0x341814AE: B9E8 CBNZ R0, .L8 ; 0x341814EC 0x341814B0: 9807 LDR R0, [SP, #28] 0x341814B2: F3C0 5005 UBFX R0, R0, #20, #6 0x341814B6: 900C STR R0, [SP, #48] 0x341814B8: 9807 LDR R0, [SP, #28] 0x341814BA: F3C0 200B UBFX R0, R0, #8, #12 0x341814BE: 900B STR R0, [SP, #44] 0x341814C0: F248 0084 MOVW R0, #0x8084 0x341814C4: F2C5 6002 MOVT R0, #0x5602 0x341814C8: 6800 LDR R0, [R0] 0x341814CA: F020 407F BIC R0, R0, #0xFF000000 0x341814CE: 900A STR R0, [SP, #40] 0x341814D0: F248 0088 MOVW R0, #0x8088 0x341814D4: F2C5 6002 MOVT R0, #0x5602 0x341814D8: 6800 LDR R0, [R0] 0x341814DA: 9007 STR R0, [SP, #28] 0x341814DC: 9807 LDR R0, [SP, #28] 0x341814DE: F3C0 60C2 UBFX R0, R0, #27, #3 0x341814E2: 9009 STR R0, [SP, #36] 0x341814E4: 9807 LDR R0, [SP, #28] 0x341814E6: F3C0 6002 UBFX R0, R0, #24, #3 0x341814EA: 9008 STR R0, [SP, #32]
.L8: 0x341814EC: E08B B 46L14 ; 0x34181606
.L9: 0x341814EE: F248 0090 MOVW R0, #0x8090 0x341814F2: F2C5 6002 MOVT R0, #0x5602 0x341814F6: 6800 LDR R0, [R0] 0x341814F8: 9007 STR R0, [SP, #28] 0x341814FA: 9807 LDR R0, [SP, #28] 0x341814FC: F000 40E0 AND R0, R0, #0x70000000 0x34181500: 9006 STR R0, [SP, #24] 0x34181502: 9807 LDR R0, [SP, #28] 0x34181504: F000 6000 AND R0, R0, #0x08000000 0x34181508: 9005 STR R0, [SP, #20] 0x3418150A: 9805 LDR R0, [SP, #20] 0x3418150C: B9E8 CBNZ R0, .L10 ; 0x3418154A 0x3418150E: 9807 LDR R0, [SP, #28] 0x34181510: F3C0 5005 UBFX R0, R0, #20, #6 0x34181514: 900C STR R0, [SP, #48] 0x34181516: 9807 LDR R0, [SP, #28] 0x34181518: F3C0 200B UBFX R0, R0, #8, #12 0x3418151C: 900B STR R0, [SP, #44] 0x3418151E: F248 0094 MOVW R0, #0x8094 0x34181522: F2C5 6002 MOVT R0, #0x5602 0x34181526: 6800 LDR R0, [R0] 0x34181528: F020 407F BIC R0, R0, #0xFF000000 0x3418152C: 900A STR R0, [SP, #40] 0x3418152E: F248 0098 MOVW R0, #0x8098 0x34181532: F2C5 6002 MOVT R0, #0x5602 0x34181536: 6800 LDR R0, [R0] 0x34181538: 9007 STR R0, [SP, #28] 0x3418153A: 9807 LDR R0, [SP, #28] 0x3418153C: F3C0 60C2 UBFX R0, R0, #27, #3 0x34181540: 9009 STR R0, [SP, #36] 0x34181542: 9807 LDR R0, [SP, #28] 0x34181544: F3C0 6002 UBFX R0, R0, #24, #3 0x34181548: 9008 STR R0, [SP, #32]
.L10: 0x3418154A: E05C B 46L14 ; 0x34181606
.L11: 0x3418154C: F248 00A0 MOVW R0, #0x80A0 0x34181550: F2C5 6002 MOVT R0, #0x5602 0x34181554: 6800 LDR R0, [R0] 0x34181556: 9007 STR R0, [SP, #28] 0x34181558: 9807 LDR R0, [SP, #28] 0x3418155A: F000 40E0 AND R0, R0, #0x70000000 0x3418155E: 9006 STR R0, [SP, #24] 0x34181560: 9807 LDR R0, [SP, #28] 0x34181562: F000 6000 AND R0, R0, #0x08000000 0x34181566: 9005 STR R0, [SP, #20] 0x34181568: 9805 LDR R0, [SP, #20] 0x3418156A: B9E8 CBNZ R0, .L12 ; 0x341815A8 0x3418156C: 9807 LDR R0, [SP, #28] 0x3418156E: F3C0 5005 UBFX R0, R0, #20, #6 0x34181572: 900C STR R0, [SP, #48] 0x34181574: 9807 LDR R0, [SP, #28] 0x34181576: F3C0 200B UBFX R0, R0, #8, #12 0x3418157A: 900B STR R0, [SP, #44] 0x3418157C: F248 00A4 MOVW R0, #0x80A4 0x34181580: F2C5 6002 MOVT R0, #0x5602 0x34181584: 6800 LDR R0, [R0] 0x34181586: F020 407F BIC R0, R0, #0xFF000000 0x3418158A: 900A STR R0, [SP, #40] 0x3418158C: F248 00A8 MOVW R0, #0x80A8 0x34181590: F2C5 6002 MOVT R0, #0x5602 0x34181594: 6800 LDR R0, [R0] 0x34181596: 9007 STR R0, [SP, #28] 0x34181598: 9807 LDR R0, [SP, #28] 0x3418159A: F3C0 60C2 UBFX R0, R0, #27, #3 0x3418159E: 9009 STR R0, [SP, #36] 0x341815A0: 9807 LDR R0, [SP, #28] 0x341815A2: F3C0 6002 UBFX R0, R0, #24, #3 0x341815A6: 9008 STR R0, [SP, #32]
.L12: 0x341815A8: E02D B 46L14 ; 0x34181606
.L13: 0x341815AA: F248 00B0 MOVW R0, #0x80B0 0x341815AE: F2C5 6002 MOVT R0, #0x5602 0x341815B2: 6800 LDR R0, [R0] 0x341815B4: 9007 STR R0, [SP, #28] 0x341815B6: 9807 LDR R0, [SP, #28] 0x341815B8: F000 40E0 AND R0, R0, #0x70000000 0x341815BC: 9006 STR R0, [SP, #24] 0x341815BE: 9807 LDR R0, [SP, #28] 0x341815C0: F000 6000 AND R0, R0, #0x08000000 0x341815C4: 9005 STR R0, [SP, #20] 0x341815C6: 9805 LDR R0, [SP, #20] 0x341815C8: B9E8 CBNZ R0, .L14 ; 0x34181606 0x341815CA: 9807 LDR R0, [SP, #28] 0x341815CC: F3C0 5005 UBFX R0, R0, #20, #6 0x341815D0: 900C STR R0, [SP, #48] 0x341815D2: 9807 LDR R0, [SP, #28] 0x341815D4: F3C0 200B UBFX R0, R0, #8, #12 0x341815D8: 900B STR R0, [SP, #44] 0x341815DA: F248 00B4 MOVW R0, #0x80B4 0x341815DE: F2C5 6002 MOVT R0, #0x5602 0x341815E2: 6800 LDR R0, [R0] 0x341815E4: F020 407F BIC R0, R0, #0xFF000000 0x341815E8: 900A STR R0, [SP, #40] 0x341815EA: F248 00B8 MOVW R0, #0x80B8 0x341815EE: F2C5 6002 MOVT R0, #0x5602 0x341815F2: 6800 LDR R0, [R0] 0x341815F4: 9007 STR R0, [SP, #28] 0x341815F6: 9807 LDR R0, [SP, #28] 0x341815F8: F3C0 60C2 UBFX R0, R0, #27, #3 0x341815FC: 9009 STR R0, [SP, #36] 0x341815FE: 9807 LDR R0, [SP, #28] 0x34181600: F3C0 6002 UBFX R0, R0, #24, #3 0x34181604: 9008 STR R0, [SP, #32]
.L14: 0x34181606: 9806 LDR R0, [SP, #24] 0x34181608: 9000 STR R0, [SP, #0] 0x3418160A: B160 CBZ R0, .L15 ; 0x34181626 0x3418160C: 9800 LDR R0, [SP, #0] 0x3418160E: F1B0 5F80 CMP.W R0, #0x10000000 0x34181612: D016 BEQ 46L16 ; 0x34181642 0x34181614: 9800 LDR R0, [SP, #0] 0x34181616: F1B0 5F00 CMP.W R0, #0x20000000 0x3418161A: D026 BEQ 46L19 ; 0x3418166A 0x3418161C: 9800 LDR R0, [SP, #0] 0x3418161E: F1B0 5F40 CMP.W R0, #0x30000000 0x34181622: D028 BEQ 46L20 ; 0x34181676 0x34181624: E02D B 46L21 ; 0x34181682
.L15: 0x34181626: F248 0048 MOVW R0, #0x8048 0x3418162A: F2C5 6002 MOVT R0, #0x5602 0x3418162E: 6800 LDR R0, [R0] 0x34181630: F3C0 11C1 UBFX R1, R0, #7, #2 0x34181634: F249 0000 MOVW R0, #0x9000 0x34181638: F2C0 30D0 MOVT R0, #0x03D0 0x3418163C: 40C8 LSRS R0, R1 0x3418163E: 900D STR R0, [SP, #52] 0x34181640: E01F B 46L21 ; 0x34181682
.L16: 0x34181642: F248 0044 MOVW R0, #0x8044 0x34181646: F2C5 6002 MOVT R0, #0x5602 0x3418164A: 6800 LDR R0, [R0] 0x3418164C: 0580 LSLS R0, R0, #22 0x3418164E: 2800 CMP R0, #0 0x34181650: D405 BMI 46L17 ; 0x3418165E 0x34181652: F640 1000 MOVW R0, #0x0900 0x34181656: F2C0 003D MOVT R0, #61 0x3418165A: 900D STR R0, [SP, #52] 0x3418165C: E004 B 46L18 ; 0x34181668
.L17: 0x3418165E: F242 4000 MOVW R0, #0x2400 0x34181662: F2C0 00F4 MOVT R0, #244 0x34181666: 900D STR R0, [SP, #52]
.L18: 0x34181668: E00B B 46L21 ; 0x34181682
.L19: 0x3418166A: F646 4000 MOVW R0, #0x6C00 0x3418166E: F2C0 20DC MOVT R0, #0x02DC 0x34181672: 900D STR R0, [SP, #52] 0x34181674: E005 B 46L21 ; 0x34181682
.L20: 0x34181676: F248 0000 MOVW R0, #0x8000 0x3418167A: F2C0 00BB MOVT R0, #187 0x3418167E: 900D STR R0, [SP, #52] 0x34181680: E7FF B 46L21 ; 0x34181682
.L21: 0x34181682: 9805 LDR R0, [SP, #20] 0x34181684: BB68 CBNZ R0, .L22 ; 0x341816E2 0x34181686: ED9D 0A0D VLDR S0, [SP, #52] 0x3418168A: EEB8 0A40 VCVT.F32.U32 S0, S0 0x3418168E: ED9D 1A0B VLDR S2, [SP, #44] 0x34181692: EEB8 1A41 VCVT.F32.U32 S2, S2 0x34181696: ED9D 2A0A VLDR S4, [SP, #40] 0x3418169A: EEB8 2A42 VCVT.F32.U32 S4, S4 0x3418169E: ED9F 3A1D VLDR S6, =0x33800000 ; [PC, #116] [0x34181714] 0x341816A2: EE22 2A03 VMUL.F32 S4, S4, S6 0x341816A6: EE31 1A02 VADD.F32 S2, S2, S4 0x341816AA: EE20 0A01 VMUL.F32 S0, S0, S2 0x341816AE: ED9D 1A0C VLDR S2, [SP, #48] 0x341816B2: EEB8 1A41 VCVT.F32.U32 S2, S2 0x341816B6: EE80 0A01 VDIV.F32 S0, S0, S2 0x341816BA: ED8D 0A03 VSTR S0, [SP, #12] 0x341816BE: ED9D 0A03 VLDR S0, [SP, #12] 0x341816C2: ED9D 1A09 VLDR S2, [SP, #36] 0x341816C6: EEB8 1A41 VCVT.F32.U32 S2, S2 0x341816CA: ED9D 2A08 VLDR S4, [SP, #32] 0x341816CE: EEB8 2A42 VCVT.F32.U32 S4, S4 0x341816D2: EE21 1A02 VMUL.F32 S2, S2, S4 0x341816D6: EE80 0A01 VDIV.F32 S0, S0, S2 0x341816DA: EEBC 0AC0 VCVT.U32.F32 S0, S0 0x341816DE: ED8D 0A0D VSTR S0, [SP, #52]
.L22: 0x341816E2: F248 00C4 MOVW R0, #0x80C4 0x341816E6: F2C5 6002 MOVT R0, #0x5602 0x341816EA: 6800 LDR R0, [R0] 0x341816EC: F400 017F AND R1, R0, #0xFF0000 0x341816F0: 2001 MOVS R0, #1 0x341816F2: EB00 4011 ADD.W R0, R0, R1, LSR #16 0x341816F6: 9004 STR R0, [SP, #16] 0x341816F8: 980D LDR R0, [SP, #52] 0x341816FA: 9904 LDR R1, [SP, #16] 0x341816FC: FBB0 F0F1 UDIV R0, R0, R1 0x34181700: 900D STR R0, [SP, #52] 0x34181702: E7FF B 46L23 ; 0x34181704
.L23: 0x34181704: 980D LDR R0, [SP, #52] 0x34181706: F240 718C MOVW R1, #0x078C ; 0x3400078C = SystemCoreClock 0x3418170A: F2C3 4100 MOVT R1, #0x3400 ; 0x3400078C = SystemCoreClock 0x3418170E: 6008 STR R0, [R1] 0x34181710: B00E ADD SP, SP, #56 0x34181712: 4770 BX LR 0x34181714: 33800000 DC.W 0x33800000

Section .text.HAL_XSPI_MspInit from blto2_FSBL_lto.o, size=324, align=4


HAL_XSPI_MspInit: 0x34181718: B580 PUSH 123R7, LR} 0x3418171A: B0F2 SUB SP, SP, #0x01C8 0x3418171C: 9071 STR R0, [SP, #0x01C4] 0x3418171E: 2000 MOVS R0, #0 0x34181720: 9070 STR R0, [SP, #0x01C0] 0x34181722: 906F STR R0, [SP, #0x01BC] 0x34181724: 906E STR R0, [SP, #0x01B8] 0x34181726: 906D STR R0, [SP, #0x01B4] 0x34181728: 906C STR R0, [SP, #0x01B0] 0x3418172A: A808 ADD R0, SP, #32 0x3418172C: F44F 71C8 MOV.W R1, #0x0190 0x34181730: F00C F82A BL __aeabi_memclr ; 0x3418D788 0x34181734: 9871 LDR R0, [SP, #0x01C4] 0x34181736: 6800 LDR R0, [R0] 0x34181738: F24A 0100 MOVW R1, #0xA000 0x3418173C: F6C5 0102 MOVT R1, #0x5802 0x34181740: 4288 CMP R0, R1 0x34181742: F040 8089 BNE.W 46L5 ; 0x34181858 0x34181746: 2000 MOVS R0, #0 0x34181748: 9005 STR R0, [SP, #20] 0x3418174A: 2002 MOVS R0, #2 0x3418174C: 9003 STR R0, [SP, #12] 0x3418174E: F00C FBFB BL LL_APB4_GRP2_EnableClock.7 ; 0x3418DF48 0x34181752: 2001 MOVS R0, #1 0x34181754: 9004 STR R0, [SP, #16] 0x34181756: F00C FBF7 BL LL_APB4_GRP2_EnableClock.7 ; 0x3418DF48 0x3418175A: F44F 2080 MOV.W R0, #0x040000 0x3418175E: F00C FC05 BL LL_AHB4_GRP1_EnableClock.8 ; 0x3418DF6C 0x34181762: F00C FF49 BL HAL_PWREx_EnableVddIO3 ; 0x3418E5F8 0x34181766: 9803 LDR R0, [SP, #12] 0x34181768: 9904 LDR R1, [SP, #16] 0x3418176A: F00C FED3 BL HAL_PWREx_ConfigVddIORange ; 0x3418E514 0x3418176E: F249 0000 MOVW R0, #0x9000 0x34181772: F2C5 6000 MOVT R0, #0x5600 0x34181776: 9006 STR R0, [SP, #24] 0x34181778: A806 ADD R0, SP, #24 0x3418177A: 217C MOVS R1, #124 0x3418177C: AA05 ADD R2, SP, #20 0x3418177E: F000 F88B BL HAL_BSEC_OTP_Read ; 0x34181898 0x34181782: B108 CBZ R0, .L1 ; 0x34181788 0x34181784: F7FE FFE2 BL Error_Handler ; 0x3418074C
.L1: 0x34181788: F89D 0015 LDRB.W R0, [SP, #21] 0x3418178C: 0600 LSLS R0, R0, #24 0x3418178E: 2800 CMP R0, #0 0x34181790: D531 BPL 46L3 ; 0x341817F6 0x34181792: 2000 MOVS R0, #0 0x34181794: 900E STR R0, [SP, #56] 0x34181796: 2108 MOVS R1, #8 0x34181798: 910F STR R1, [SP, #60] 0x3418179A: F44F 0100 MOV.W R1, #0x800000 0x3418179E: 9109 STR R1, [SP, #36] 0x341817A0: 9008 STR R0, [SP, #32] 0x341817A2: F240 4014 MOVW R0, #0x0414 0x341817A6: F2C0 3002 MOVT R0, #0x0302 0x341817AA: 9034 STR R0, [SP, #208] 0x341817AC: A808 ADD R0, SP, #32 0x341817AE: F000 FF95 BL HAL_RCCEx_PeriphCLKConfig ; 0x341826DC 0x341817B2: B108 CBZ R0, .L2 ; 0x341817B8 0x341817B4: F7FE FFCA BL Error_Handler ; 0x3418074C
.L2: 0x341817B8: F44F 5000 MOV.W R0, #0x2000 0x341817BC: 9002 STR R0, [SP, #8] 0x341817BE: F00C FBE7 BL LL_AHB5_GRP1_EnableClock ; 0x3418DF90 0x341817C2: F44F 5080 MOV.W R0, #0x1000 0x341817C6: F00C FBE3 BL LL_AHB5_GRP1_EnableClock ; 0x3418DF90 0x341817CA: 9802 LDR R0, [SP, #8] 0x341817CC: F00C FBCE BL LL_AHB4_GRP1_EnableClock.8 ; 0x3418DF6C 0x341817D0: F640 707F MOVW R0, #0x0F7F 0x341817D4: 906C STR R0, [SP, #0x01B0] 0x341817D6: 2002 MOVS R0, #2 0x341817D8: 906D STR R0, [SP, #0x01B4] 0x341817DA: 2000 MOVS R0, #0 0x341817DC: 906E STR R0, [SP, #0x01B8] 0x341817DE: 2003 MOVS R0, #3 0x341817E0: 906F STR R0, [SP, #0x01BC] 0x341817E2: 2009 MOVS R0, #9 0x341817E4: 9070 STR R0, [SP, #0x01C0] 0x341817E6: F243 4000 MOVW R0, #0x3400 0x341817EA: F2C5 6002 MOVT R0, #0x5602 0x341817EE: A96C ADD R1, SP, #0x01B0 0x341817F0: F000 F9BE BL HAL_GPIO_Init ; 0x34181B70 0x341817F4: E030 B 46L5 ; 0x34181858
.L3: 0x341817F6: F44F 0000 MOV.W R0, #0x800000 0x341817FA: 9009 STR R0, [SP, #36] 0x341817FC: 2000 MOVS R0, #0 0x341817FE: 9008 STR R0, [SP, #32] 0x34181800: F240 4114 MOVW R1, #0x0414 0x34181804: F2C0 3102 MOVT R1, #0x0302 0x34181808: 9134 STR R1, [SP, #208] 0x3418180A: 900E STR R0, [SP, #56] 0x3418180C: 2020 MOVS R0, #32 0x3418180E: 900F STR R0, [SP, #60] 0x34181810: A808 ADD R0, SP, #32 0x34181812: F000 FF63 BL HAL_RCCEx_PeriphCLKConfig ; 0x341826DC 0x34181816: B108 CBZ R0, .L4 ; 0x3418181C 0x34181818: F7FE FF98 BL Error_Handler ; 0x3418074C
.L4: 0x3418181C: F44F 5000 MOV.W R0, #0x2000 0x34181820: 9001 STR R0, [SP, #4] 0x34181822: F00C FBB5 BL LL_AHB5_GRP1_EnableClock ; 0x3418DF90 0x34181826: F44F 5080 MOV.W R0, #0x1000 0x3418182A: F00C FBB1 BL LL_AHB5_GRP1_EnableClock ; 0x3418DF90 0x3418182E: 9801 LDR R0, [SP, #4] 0x34181830: F00C FB9C BL LL_AHB4_GRP1_EnableClock.8 ; 0x3418DF6C 0x34181834: F640 707F MOVW R0, #0x0F7F 0x34181838: 906C STR R0, [SP, #0x01B0] 0x3418183A: 2002 MOVS R0, #2 0x3418183C: 906D STR R0, [SP, #0x01B4] 0x3418183E: 2000 MOVS R0, #0 0x34181840: 906E STR R0, [SP, #0x01B8] 0x34181842: 2003 MOVS R0, #3 0x34181844: 906F STR R0, [SP, #0x01BC] 0x34181846: 2009 MOVS R0, #9 0x34181848: 9070 STR R0, [SP, #0x01C0] 0x3418184A: F243 4000 MOVW R0, #0x3400 0x3418184E: F2C5 6002 MOVT R0, #0x5602 0x34181852: A96C ADD R1, SP, #0x01B0 0x34181854: F000 F98C BL HAL_GPIO_Init ; 0x34181B70
.L5: 0x34181858: B072 ADD SP, SP, #0x01C8 0x3418185A: BD80 POP 123R7, PC}

Section .text.HAL_Init from blto2_FSBL_lto.o, size=48, align=4


HAL_Init: 0x3418185C: B580 PUSH 123R7, LR} 0x3418185E: B082 SUB SP, SP, #8 0x34181860: 2003 MOVS R0, #3 0x34181862: F00C FD47 BL HAL_NVIC_SetPriorityGrouping ; 0x3418E2F4 0x34181866: F7FF FDB9 BL SystemCoreClockUpdate ; 0x341813DC 0x3418186A: 200F MOVS R0, #15 0x3418186C: F00C FBA2 BL HAL_InitTick ; 0x3418DFB4 0x34181870: B118 CBZ R0, .L1 ; 0x3418187A 0x34181872: 2001 MOVS R0, #1 0x34181874: F88D 0007 STRB.W R0, [SP, #7] 0x34181878: E004 B 46L2 ; 0x34181884
.L1: 0x3418187A: F7FF FDA7 BL HAL_MspInit ; 0x341813CC 0x3418187E: 2000 MOVS R0, #0 0x34181880: F88D 0007 STRB.W R0, [SP, #7]
.L2: 0x34181884: F89D 0007 LDRB.W R0, [SP, #7] 0x34181888: B002 ADD SP, SP, #8 0x3418188A: BD80 POP 123R7, PC}

Section .text.HAL_GetTick from blto2_FSBL_lto.o, size=12, align=4


HAL_GetTick: 0x3418188C: F240 3040 MOVW R0, #0x0340 ; 0x34000340 = uwTick 0x34181890: F2C3 4000 MOVT R0, #0x3400 ; 0x34000340 = uwTick 0x34181894: 6800 LDR R0, [R0] 0x34181896: 4770 BX LR

Section .text.HAL_BSEC_OTP_Read from blto2_FSBL_lto.o, size=124, align=4


HAL_BSEC_OTP_Read: 0x34181898: B580 PUSH 123R7, LR} 0x3418189A: B084 SUB SP, SP, #16 0x3418189C: 9002 STR R0, [SP, #8] 0x3418189E: 9101 STR R1, [SP, #4] 0x341818A0: 9200 STR R2, [SP, #0] 0x341818A2: 9802 LDR R0, [SP, #8] 0x341818A4: B918 CBNZ R0, .L1 ; 0x341818AE 0x341818A6: 2001 MOVS R0, #1 0x341818A8: F88D 000F STRB.W R0, [SP, #15] 0x341818AC: E02E B 46L8 ; 0x3418190C
.L1: 0x341818AE: 9800 LDR R0, [SP, #0] 0x341818B0: B138 CBZ R0, .L2 ; 0x341818C2 0x341818B2: 9802 LDR R0, [SP, #8] 0x341818B4: 6800 LDR R0, [R0] 0x341818B6: F249 0100 MOVW R1, #0x9000 0x341818BA: F2C5 6100 MOVT R1, #0x5600 0x341818BE: 4288 CMP R0, R1 0x341818C0: D005 BEQ 46L3 ; 0x341818CE
.L2: 0x341818C2: 9902 LDR R1, [SP, #8] 0x341818C4: 2001 MOVS R0, #1 0x341818C6: 6048 STR R0, [R1, #4] 0x341818C8: F88D 000F STRB.W R0, [SP, #15] 0x341818CC: E01E B 46L8 ; 0x3418190C
.L3: 0x341818CE: 9801 LDR R0, [SP, #4] 0x341818D0: 08C0 LSRS R0, R0, #3 0x341818D2: 282E CMP R0, #46 0x341818D4: D811 BHI 46L6 ; 0x341818FA 0x341818D6: 9802 LDR R0, [SP, #8] 0x341818D8: 9901 LDR R1, [SP, #4] 0x341818DA: F00C FBE1 BL HAL_BSEC_OTP_Reload ; 0x3418E0A0 0x341818DE: B938 CBNZ R0, .L4 ; 0x341818F0 0x341818E0: 9802 LDR R0, [SP, #8] 0x341818E2: 6800 LDR R0, [R0] 0x341818E4: 9901 LDR R1, [SP, #4] 0x341818E6: F850 0021 LDR.W R0, [R0, R1, LSL #2] 0x341818EA: 9900 LDR R1, [SP, #0] 0x341818EC: 6008 STR R0, [R1] 0x341818EE: E003 B 46L5 ; 0x341818F8
.L4: 0x341818F0: 2001 MOVS R0, #1 0x341818F2: F88D 000F STRB.W R0, [SP, #15] 0x341818F6: E009 B 46L8 ; 0x3418190C
.L5: 0x341818F8: E005 B 46L7 ; 0x34181906
.L6: 0x341818FA: 9902 LDR R1, [SP, #8] 0x341818FC: 2001 MOVS R0, #1 0x341818FE: 6048 STR R0, [R1, #4] 0x34181900: F88D 000F STRB.W R0, [SP, #15] 0x34181904: E002 B 46L8 ; 0x3418190C
.L7: 0x34181906: 2000 MOVS R0, #0 0x34181908: F88D 000F STRB.W R0, [SP, #15]
.L8: 0x3418190C: F89D 000F LDRB.W R0, [SP, #15] 0x34181910: B004 ADD SP, SP, #16 0x34181912: BD80 POP 123R7, PC}

Section .text.__NVIC_SetPriorityGrouping from blto2_FSBL_lto.o, size=60, align=4


__NVIC_SetPriorityGrouping: 0x34181914: B083 SUB SP, SP, #12 0x34181916: 9002 STR R0, [SP, #8] 0x34181918: 9802 LDR R0, [SP, #8] 0x3418191A: F000 0007 AND R0, R0, #7 0x3418191E: 9000 STR R0, [SP, #0] 0x34181920: F64E 510C MOVW R1, #0xED0C 0x34181924: F2CE 0100 MOVT R1, #0xE000 0x34181928: 6808 LDR R0, [R1] 0x3418192A: 9001 STR R0, [SP, #4] 0x3418192C: 9801 LDR R0, [SP, #4] 0x3418192E: F64F 02FF MOVW R2, #0xF8FF 0x34181932: 4010 ANDS R0, R2 0x34181934: 9001 STR R0, [SP, #4] 0x34181936: 9801 LDR R0, [SP, #4] 0x34181938: 9A00 LDR R2, [SP, #0] 0x3418193A: EA40 2002 ORR.W R0, R0, R2, LSL #8 0x3418193E: 2200 MOVS R2, #0 0x34181940: F2C0 52FA MOVT R2, #0x05FA 0x34181944: 4310 ORRS R0, R2 0x34181946: 9001 STR R0, [SP, #4] 0x34181948: 9801 LDR R0, [SP, #4] 0x3418194A: 6008 STR R0, [R1] 0x3418194C: B003 ADD SP, SP, #12 0x3418194E: 4770 BX LR

Section .text.HAL_NVIC_SetPriority from blto2_FSBL_lto.o, size=168, align=4


HAL_NVIC_SetPriority: 0x34181950: B580 PUSH 123R7, LR} 0x34181952: B086 SUB SP, SP, #24 0x34181954: F8AD 0016 STRH.W R0, [SP, #22] 0x34181958: 9104 STR R1, [SP, #16] 0x3418195A: 9203 STR R2, [SP, #12] 0x3418195C: F9BD 0016 LDRSH.W R0, [SP, #22] 0x34181960: F110 0F0C CMN R0, #12 0x34181964: DB04 BLT 46L1 ; 0x34181970 0x34181966: F9BD 0016 LDRSH.W R0, [SP, #22] 0x3418196A: 3004 ADDS R0, #4 0x3418196C: B100 CBZ R0, .L1 ; 0x34181970 0x3418196E: E006 B 46L2 ; 0x3418197E
.L1: 0x34181970: F244 403C MOVW R0, #0x443C ; 0x3419443C = .rodata..L.str.23 0x34181974: F2C3 4019 MOVT R0, #0x3419 ; 0x3419443C = .rodata..L.str.23 0x34181978: 21FF MOVS R1, #255 0x3418197A: F00C F98F BL assert_failed ; 0x3418DC9C
.L2: 0x3418197E: F000 F83B BL __NVIC_GetPriorityGrouping ; 0x341819F8 0x34181982: F000 0007 AND R0, R0, #7 0x34181986: 9002 STR R0, [SP, #8] 0x34181988: 9802 LDR R0, [SP, #8] 0x3418198A: 2802 CMP R0, #2 0x3418198C: D802 BHI 46L3 ; 0x34181994 0x3418198E: 9803 LDR R0, [SP, #12] 0x34181990: B138 CBZ R0, .L4 ; 0x341819A2 0x34181992: E007 B 46L5 ; 0x341819A4
.L3: 0x34181994: 9803 LDR R0, [SP, #12] 0x34181996: 9902 LDR R1, [SP, #8] 0x34181998: 1ECA SUBS R2, R1, #3 0x3418199A: 2101 MOVS R1, #1 0x3418199C: 4091 LSLS R1, R2 0x3418199E: 4288 CMP R0, R1 0x341819A0: D200 BCS 46L5 ; 0x341819A4
.L4: 0x341819A2: E007 B 46L6 ; 0x341819B4
.L5: 0x341819A4: F244 403C MOVW R0, #0x443C ; 0x3419443C = .rodata..L.str.23 0x341819A8: F2C3 4019 MOVT R0, #0x3419 ; 0x3419443C = .rodata..L.str.23 0x341819AC: F44F 7181 MOV.W R1, #0x0102 0x341819B0: F00C F974 BL assert_failed ; 0x3418DC9C
.L6: 0x341819B4: 9804 LDR R0, [SP, #16] 0x341819B6: 280F CMP R0, #15 0x341819B8: D808 BHI 46L7 ; 0x341819CC 0x341819BA: 9804 LDR R0, [SP, #16] 0x341819BC: 9902 LDR R1, [SP, #8] 0x341819BE: F1C1 0207 RSB R2, R1, #7 0x341819C2: 2101 MOVS R1, #1 0x341819C4: 4091 LSLS R1, R2 0x341819C6: 4288 CMP R0, R1 0x341819C8: D200 BCS 46L7 ; 0x341819CC 0x341819CA: E007 B 46L8 ; 0x341819DC
.L7: 0x341819CC: F244 403C MOVW R0, #0x443C ; 0x3419443C = .rodata..L.str.23 0x341819D0: F2C3 4019 MOVT R0, #0x3419 ; 0x3419443C = .rodata..L.str.23 0x341819D4: F240 1103 MOVW R1, #0x0103 0x341819D8: F00C F960 BL assert_failed ; 0x3418DC9C
.L8: 0x341819DC: F9BD 0016 LDRSH.W R0, [SP, #22] 0x341819E0: 9001 STR R0, [SP, #4] 0x341819E2: 9802 LDR R0, [SP, #8] 0x341819E4: 9904 LDR R1, [SP, #16] 0x341819E6: 9A03 LDR R2, [SP, #12] 0x341819E8: F000 F80E BL NVIC_EncodePriority ; 0x34181A08 0x341819EC: 4601 MOV R1, R0 0x341819EE: 9801 LDR R0, [SP, #4] 0x341819F0: F00C FCA0 BL __NVIC_SetPriority ; 0x3418E334 0x341819F4: B006 ADD SP, SP, #24 0x341819F6: BD80 POP 123R7, PC}

Section .text.__NVIC_GetPriorityGrouping from blto2_FSBL_lto.o, size=16, align=4


__NVIC_GetPriorityGrouping: 0x341819F8: F64E 500C MOVW R0, #0xED0C 0x341819FC: F2CE 0000 MOVT R0, #0xE000 0x34181A00: 6800 LDR R0, [R0] 0x34181A02: F3C0 2002 UBFX R0, R0, #8, #3 0x34181A06: 4770 BX LR

Section .text.NVIC_EncodePriority from blto2_FSBL_lto.o, size=100, align=4


NVIC_EncodePriority: 0x34181A08: B088 SUB SP, SP, #32 0x34181A0A: 9007 STR R0, [SP, #28] 0x34181A0C: 9106 STR R1, [SP, #24] 0x34181A0E: 9205 STR R2, [SP, #20] 0x34181A10: 9807 LDR R0, [SP, #28] 0x34181A12: F000 0007 AND R0, R0, #7 0x34181A16: 9004 STR R0, [SP, #16] 0x34181A18: 9804 LDR R0, [SP, #16] 0x34181A1A: F1C0 0007 RSB R0, R0, #7 0x34181A1E: 2805 CMP R0, #5 0x34181A20: D302 BCC 46L1 ; 0x34181A28 0x34181A22: 2004 MOVS R0, #4 0x34181A24: 9001 STR R0, [SP, #4] 0x34181A26: E003 B 46L2 ; 0x34181A30
.L1: 0x34181A28: 9804 LDR R0, [SP, #16] 0x34181A2A: F1C0 0007 RSB R0, R0, #7 0x34181A2E: 9001 STR R0, [SP, #4]
.L2: 0x34181A30: 9801 LDR R0, [SP, #4] 0x34181A32: 9003 STR R0, [SP, #12] 0x34181A34: 9804 LDR R0, [SP, #16] 0x34181A36: 3004 ADDS R0, #4 0x34181A38: 2806 CMP R0, #6 0x34181A3A: D802 BHI 46L3 ; 0x34181A42 0x34181A3C: 2000 MOVS R0, #0 0x34181A3E: 9000 STR R0, [SP, #0] 0x34181A40: E002 B 46L4 ; 0x34181A48
.L3: 0x34181A42: 9804 LDR R0, [SP, #16] 0x34181A44: 3803 SUBS R0, #3 0x34181A46: 9000 STR R0, [SP, #0]
.L4: 0x34181A48: 9800 LDR R0, [SP, #0] 0x34181A4A: 9002 STR R0, [SP, #8] 0x34181A4C: 9806 LDR R0, [SP, #24] 0x34181A4E: 9903 LDR R1, [SP, #12] 0x34181A50: 2201 MOVS R2, #1 0x34181A52: FA02 F101 LSL.W R1, R2, R1 0x34181A56: 3901 SUBS R1, #1 0x34181A58: 4008 ANDS R0, R1 0x34181A5A: 9B02 LDR R3, [SP, #8] 0x34181A5C: 4098 LSLS R0, R3 0x34181A5E: 9905 LDR R1, [SP, #20] 0x34181A60: 409A LSLS R2, R3 0x34181A62: 3A01 SUBS R2, #1 0x34181A64: 4011 ANDS R1, R2 0x34181A66: 4308 ORRS R0, R1 0x34181A68: B008 ADD SP, SP, #32 0x34181A6A: 4770 BX LR

Section .text.HAL_SYSTICK_Config from blto2_FSBL_lto.o, size=16, align=4


HAL_SYSTICK_Config: 0x34181A6C: B580 PUSH 123R7, LR} 0x34181A6E: B082 SUB SP, SP, #8 0x34181A70: 9001 STR R0, [SP, #4] 0x34181A72: 9801 LDR R0, [SP, #4] 0x34181A74: F00C FC7E BL SysTick_Config ; 0x3418E374 0x34181A78: B002 ADD SP, SP, #8 0x34181A7A: BD80 POP 123R7, PC}

Section .text.HAL_DMA_Abort from blto2_FSBL_lto.o, size=244, align=4


HAL_DMA_Abort: 0x34181A7C: B580 PUSH 123R7, LR} 0x34181A7E: B084 SUB SP, SP, #16 0x34181A80: 9002 STR R0, [SP, #8] 0x34181A82: F7FF FF03 BL HAL_GetTick ; 0x3418188C 0x34181A86: 9001 STR R0, [SP, #4] 0x34181A88: 9802 LDR R0, [SP, #8] 0x34181A8A: B918 CBNZ R0, .L1 ; 0x34181A94 0x34181A8C: 2001 MOVS R0, #1 0x34181A8E: F88D 000F STRB.W R0, [SP, #15] 0x34181A92: E069 B 46L8 ; 0x34181B68
.L1: 0x34181A94: 9802 LDR R0, [SP, #8] 0x34181A96: F890 0054 LDRB.W R0, [R0, #84] 0x34181A9A: 2802 CMP R0, #2 0x34181A9C: D00A BEQ 46L2 ; 0x34181AB4 0x34181A9E: 9902 LDR R1, [SP, #8] 0x34181AA0: 2020 MOVS R0, #32 0x34181AA2: 6588 STR R0, [R1, #88] 0x34181AA4: 9902 LDR R1, [SP, #8] 0x34181AA6: 2000 MOVS R0, #0 0x34181AA8: F881 004C STRB.W R0, [R1, #76] 0x34181AAC: 2001 MOVS R0, #1 0x34181AAE: F88D 000F STRB.W R0, [SP, #15] 0x34181AB2: E059 B 46L8 ; 0x34181B68
.L2: 0x34181AB4: 9802 LDR R0, [SP, #8] 0x34181AB6: 6801 LDR R1, [R0] 0x34181AB8: 6948 LDR R0, [R1, #20] 0x34181ABA: F040 0004 ORR R0, R0, #4 0x34181ABE: 6148 STR R0, [R1, #20] 0x34181AC0: 9902 LDR R1, [SP, #8] 0x34181AC2: 2005 MOVS R0, #5 0x34181AC4: F881 0054 STRB.W R0, [R1, #84]
.L3: 0x34181AC8: 9802 LDR R0, [SP, #8] 0x34181ACA: 6800 LDR R0, [R0] 0x34181ACC: 6900 LDR R0, [R0, #16] 0x34181ACE: 0480 LSLS R0, R0, #18 0x34181AD0: 2800 CMP R0, #0 0x34181AD2: D421 BMI 46L6 ; 0x34181B18 0x34181AD4: F7FF FEDA BL HAL_GetTick ; 0x3418188C 0x34181AD8: 9901 LDR R1, [SP, #4] 0x34181ADA: 1A40 SUBS R0, R0, R1 0x34181ADC: 2806 CMP R0, #6 0x34181ADE: D31A BCC 46L5 ; 0x34181B16 0x34181AE0: 9902 LDR R1, [SP, #8] 0x34181AE2: 6D88 LDR R0, [R1, #88] 0x34181AE4: F040 0010 ORR R0, R0, #16 0x34181AE8: 6588 STR R0, [R1, #88] 0x34181AEA: 9902 LDR R1, [SP, #8] 0x34181AEC: 2003 MOVS R0, #3 0x34181AEE: F881 0054 STRB.W R0, [R1, #84] 0x34181AF2: 9802 LDR R0, [SP, #8] 0x34181AF4: F890 0050 LDRB.W R0, [R0, #80] 0x34181AF8: 0600 LSLS R0, R0, #24 0x34181AFA: 2800 CMP R0, #0 0x34181AFC: D503 BPL 46L4 ; 0x34181B06 0x34181AFE: 9802 LDR R0, [SP, #8] 0x34181B00: 6F41 LDR R1, [R0, #116] 0x34181B02: 2001 MOVS R0, #1 0x34181B04: 7308 STRB R0, [R1, #12]
.L4: 0x34181B06: 9902 LDR R1, [SP, #8] 0x34181B08: 2000 MOVS R0, #0 0x34181B0A: F881 004C STRB.W R0, [R1, #76] 0x34181B0E: 2001 MOVS R0, #1 0x34181B10: F88D 000F STRB.W R0, [SP, #15] 0x34181B14: E028 B 46L8 ; 0x34181B68
.L5: 0x34181B16: E7D7 B 46L3 ; 0x34181AC8
.L6: 0x34181B18: 9802 LDR R0, [SP, #8] 0x34181B1A: 6801 LDR R1, [R0] 0x34181B1C: 6948 LDR R0, [R1, #20] 0x34181B1E: F040 0002 ORR R0, R0, #2 0x34181B22: 6148 STR R0, [R1, #20] 0x34181B24: 9902 LDR R1, [SP, #8] 0x34181B26: 2004 MOVS R0, #4 0x34181B28: F881 0054 STRB.W R0, [R1, #84] 0x34181B2C: 9802 LDR R0, [SP, #8] 0x34181B2E: 6801 LDR R1, [R0] 0x34181B30: F44F 40FE MOV.W R0, #0x7F00 0x34181B34: 60C8 STR R0, [R1, #12] 0x34181B36: 9902 LDR R1, [SP, #8] 0x34181B38: 2001 MOVS R0, #1 0x34181B3A: F881 0054 STRB.W R0, [R1, #84] 0x34181B3E: 9802 LDR R0, [SP, #8] 0x34181B40: F890 0050 LDRB.W R0, [R0, #80] 0x34181B44: 0600 LSLS R0, R0, #24 0x34181B46: 2800 CMP R0, #0 0x34181B48: D507 BPL 46L7 ; 0x34181B5A 0x34181B4A: 9802 LDR R0, [SP, #8] 0x34181B4C: 6F41 LDR R1, [R0, #116] 0x34181B4E: 2001 MOVS R0, #1 0x34181B50: 7308 STRB R0, [R1, #12] 0x34181B52: 9802 LDR R0, [SP, #8] 0x34181B54: 6801 LDR R1, [R0] 0x34181B56: 2000 MOVS R0, #0 0x34181B58: 6488 STR R0, [R1, #72]
.L7: 0x34181B5A: 9902 LDR R1, [SP, #8] 0x34181B5C: 2000 MOVS R0, #0 0x34181B5E: F881 004C STRB.W R0, [R1, #76] 0x34181B62: 2000 MOVS R0, #0 0x34181B64: F88D 000F STRB.W R0, [SP, #15]
.L8: 0x34181B68: F89D 000F LDRB.W R0, [SP, #15] 0x34181B6C: B004 ADD SP, SP, #16 0x34181B6E: BD80 POP 123R7, PC}

Section .text.HAL_GPIO_Init from blto2_FSBL_lto.o, size=1928, align=4


HAL_GPIO_Init: 0x34181B70: B580 PUSH 123R7, LR} 0x34181B72: B090 SUB SP, SP, #64 0x34181B74: 900F STR R0, [SP, #60] 0x34181B76: 910E STR R1, [SP, #56] 0x34181B78: 2000 MOVS R0, #0 0x34181B7A: 900D STR R0, [SP, #52] 0x34181B7C: 980F LDR R0, [SP, #60] 0x34181B7E: 2100 MOVS R1, #0 0x34181B80: F2C5 6102 MOVT R1, #0x5602 0x34181B84: 4288 CMP R0, R1 0x34181B86: F000 80A4 BEQ.W 46L1 ; 0x34181CD2 0x34181B8A: 980F LDR R0, [SP, #60] 0x34181B8C: 2100 MOVS R1, #0 0x34181B8E: F2C4 6102 MOVT R1, #0x4602 0x34181B92: 4288 CMP R0, R1 0x34181B94: F000 809D BEQ.W 46L1 ; 0x34181CD2 0x34181B98: 980F LDR R0, [SP, #60] 0x34181B9A: F240 4100 MOVW R1, #0x0400 0x34181B9E: F2C5 6102 MOVT R1, #0x5602 0x34181BA2: 4288 CMP R0, R1 0x34181BA4: F000 8095 BEQ.W 46L1 ; 0x34181CD2 0x34181BA8: 980F LDR R0, [SP, #60] 0x34181BAA: F240 4100 MOVW R1, #0x0400 0x34181BAE: F2C4 6102 MOVT R1, #0x4602 0x34181BB2: 4288 CMP R0, R1 0x34181BB4: F000 808D BEQ.W 46L1 ; 0x34181CD2 0x34181BB8: 980F LDR R0, [SP, #60] 0x34181BBA: F640 0100 MOVW R1, #0x0800 0x34181BBE: F2C5 6102 MOVT R1, #0x5602 0x34181BC2: 4288 CMP R0, R1 0x34181BC4: F000 8085 BEQ.W 46L1 ; 0x34181CD2 0x34181BC8: 980F LDR R0, [SP, #60] 0x34181BCA: F640 0100 MOVW R1, #0x0800 0x34181BCE: F2C4 6102 MOVT R1, #0x4602 0x34181BD2: 4288 CMP R0, R1 0x34181BD4: D07D BEQ 46L1 ; 0x34181CD2 0x34181BD6: 980F LDR R0, [SP, #60] 0x34181BD8: F640 4100 MOVW R1, #0x0C00 0x34181BDC: F2C5 6102 MOVT R1, #0x5602 0x34181BE0: 4288 CMP R0, R1 0x34181BE2: D076 BEQ 46L1 ; 0x34181CD2 0x34181BE4: 980F LDR R0, [SP, #60] 0x34181BE6: F640 4100 MOVW R1, #0x0C00 0x34181BEA: F2C4 6102 MOVT R1, #0x4602 0x34181BEE: 4288 CMP R0, R1 0x34181BF0: D06F BEQ 46L1 ; 0x34181CD2 0x34181BF2: 980F LDR R0, [SP, #60] 0x34181BF4: F241 0100 MOVW R1, #0x1000 0x34181BF8: F2C5 6102 MOVT R1, #0x5602 0x34181BFC: 4288 CMP R0, R1 0x34181BFE: D068 BEQ 46L1 ; 0x34181CD2 0x34181C00: 980F LDR R0, [SP, #60] 0x34181C02: F241 0100 MOVW R1, #0x1000 0x34181C06: F2C4 6102 MOVT R1, #0x4602 0x34181C0A: 4288 CMP R0, R1 0x34181C0C: D061 BEQ 46L1 ; 0x34181CD2 0x34181C0E: 980F LDR R0, [SP, #60] 0x34181C10: F241 4100 MOVW R1, #0x1400 0x34181C14: F2C5 6102 MOVT R1, #0x5602 0x34181C18: 4288 CMP R0, R1 0x34181C1A: D05A BEQ 46L1 ; 0x34181CD2 0x34181C1C: 980F LDR R0, [SP, #60] 0x34181C1E: F241 4100 MOVW R1, #0x1400 0x34181C22: F2C4 6102 MOVT R1, #0x4602 0x34181C26: 4288 CMP R0, R1 0x34181C28: D053 BEQ 46L1 ; 0x34181CD2 0x34181C2A: 980F LDR R0, [SP, #60] 0x34181C2C: F641 0100 MOVW R1, #0x1800 0x34181C30: F2C5 6102 MOVT R1, #0x5602 0x34181C34: 4288 CMP R0, R1 0x34181C36: D04C BEQ 46L1 ; 0x34181CD2 0x34181C38: 980F LDR R0, [SP, #60] 0x34181C3A: F641 0100 MOVW R1, #0x1800 0x34181C3E: F2C4 6102 MOVT R1, #0x4602 0x34181C42: 4288 CMP R0, R1 0x34181C44: D045 BEQ 46L1 ; 0x34181CD2 0x34181C46: 980F LDR R0, [SP, #60] 0x34181C48: F641 4100 MOVW R1, #0x1C00 0x34181C4C: F2C5 6102 MOVT R1, #0x5602 0x34181C50: 4288 CMP R0, R1 0x34181C52: D03E BEQ 46L1 ; 0x34181CD2 0x34181C54: 980F LDR R0, [SP, #60] 0x34181C56: F641 4100 MOVW R1, #0x1C00 0x34181C5A: F2C4 6102 MOVT R1, #0x4602 0x34181C5E: 4288 CMP R0, R1 0x34181C60: D037 BEQ 46L1 ; 0x34181CD2 0x34181C62: 980F LDR R0, [SP, #60] 0x34181C64: F243 4100 MOVW R1, #0x3400 0x34181C68: F2C5 6102 MOVT R1, #0x5602 0x34181C6C: 4288 CMP R0, R1 0x34181C6E: D030 BEQ 46L1 ; 0x34181CD2 0x34181C70: 980F LDR R0, [SP, #60] 0x34181C72: F243 4100 MOVW R1, #0x3400 0x34181C76: F2C4 6102 MOVT R1, #0x4602 0x34181C7A: 4288 CMP R0, R1 0x34181C7C: D029 BEQ 46L1 ; 0x34181CD2 0x34181C7E: 980F LDR R0, [SP, #60] 0x34181C80: F643 0100 MOVW R1, #0x3800 0x34181C84: F2C5 6102 MOVT R1, #0x5602 0x34181C88: 4288 CMP R0, R1 0x34181C8A: D022 BEQ 46L1 ; 0x34181CD2 0x34181C8C: 980F LDR R0, [SP, #60] 0x34181C8E: F643 0100 MOVW R1, #0x3800 0x34181C92: F2C4 6102 MOVT R1, #0x4602 0x34181C96: 4288 CMP R0, R1 0x34181C98: D01B BEQ 46L1 ; 0x34181CD2 0x34181C9A: 980F LDR R0, [SP, #60] 0x34181C9C: F643 4100 MOVW R1, #0x3C00 0x34181CA0: F2C5 6102 MOVT R1, #0x5602 0x34181CA4: 4288 CMP R0, R1 0x34181CA6: D014 BEQ 46L1 ; 0x34181CD2 0x34181CA8: 980F LDR R0, [SP, #60] 0x34181CAA: F643 4100 MOVW R1, #0x3C00 0x34181CAE: F2C4 6102 MOVT R1, #0x4602 0x34181CB2: 4288 CMP R0, R1 0x34181CB4: D00D BEQ 46L1 ; 0x34181CD2 0x34181CB6: 980F LDR R0, [SP, #60] 0x34181CB8: F244 0100 MOVW R1, #0x4000 0x34181CBC: F2C5 6102 MOVT R1, #0x5602 0x34181CC0: 4288 CMP R0, R1 0x34181CC2: D006 BEQ 46L1 ; 0x34181CD2 0x34181CC4: 980F LDR R0, [SP, #60] 0x34181CC6: F244 0100 MOVW R1, #0x4000 0x34181CCA: F2C4 6102 MOVT R1, #0x4602 0x34181CCE: 4288 CMP R0, R1 0x34181CD0: D100 BNE 46L2 ; 0x34181CD4
.L1: 0x34181CD2: E006 B 46L3 ; 0x34181CE2
.L2: 0x34181CD4: F244 10E6 MOVW R0, #0x41E6 ; 0x341941E6 = .rodata..L.str.33 0x34181CD8: F2C3 4019 MOVT R0, #0x3419 ; 0x341941E6 = .rodata..L.str.33 0x34181CDC: 21AD MOVS R1, #173 0x34181CDE: F00B FFDD BL assert_failed ; 0x3418DC9C
.L3: 0x34181CE2: 980E LDR R0, [SP, #56] 0x34181CE4: 8800 LDRH R0, [R0] 0x34181CE6: B118 CBZ R0, .L4 ; 0x34181CF0 0x34181CE8: 980E LDR R0, [SP, #56] 0x34181CEA: 8840 LDRH R0, [R0, #2] 0x34181CEC: B900 CBNZ R0, .L4 ; 0x34181CF0 0x34181CEE: E006 B 46L5 ; 0x34181CFE
.L4: 0x34181CF0: F244 10E6 MOVW R0, #0x41E6 ; 0x341941E6 = .rodata..L.str.33 0x34181CF4: F2C3 4019 MOVT R0, #0x3419 ; 0x341941E6 = .rodata..L.str.33 0x34181CF8: 21AE MOVS R1, #174 0x34181CFA: F00B FFCF BL assert_failed ; 0x3418DC9C
.L5: 0x34181CFE: 980E LDR R0, [SP, #56] 0x34181D00: 6840 LDR R0, [R0, #4] 0x34181D02: B388 CBZ R0, .L6 ; 0x34181D68 0x34181D04: 980E LDR R0, [SP, #56] 0x34181D06: 6840 LDR R0, [R0, #4] 0x34181D08: 2801 CMP R0, #1 0x34181D0A: D02D BEQ 46L6 ; 0x34181D68 0x34181D0C: 980E LDR R0, [SP, #56] 0x34181D0E: 6840 LDR R0, [R0, #4] 0x34181D10: 2811 CMP R0, #17 0x34181D12: D029 BEQ 46L6 ; 0x34181D68 0x34181D14: 980E LDR R0, [SP, #56] 0x34181D16: 6840 LDR R0, [R0, #4] 0x34181D18: 2802 CMP R0, #2 0x34181D1A: D025 BEQ 46L6 ; 0x34181D68 0x34181D1C: 980E LDR R0, [SP, #56] 0x34181D1E: 6840 LDR R0, [R0, #4] 0x34181D20: 2812 CMP R0, #18 0x34181D22: D021 BEQ 46L6 ; 0x34181D68 0x34181D24: 980E LDR R0, [SP, #56] 0x34181D26: 6840 LDR R0, [R0, #4] 0x34181D28: F5B0 1F88 CMP.W R0, #0x110000 0x34181D2C: D01C BEQ 46L6 ; 0x34181D68 0x34181D2E: 980E LDR R0, [SP, #56] 0x34181D30: 6840 LDR R0, [R0, #4] 0x34181D32: F5B0 1F04 CMP.W R0, #0x210000 0x34181D36: D017 BEQ 46L6 ; 0x34181D68 0x34181D38: 980E LDR R0, [SP, #56] 0x34181D3A: 6840 LDR R0, [R0, #4] 0x34181D3C: F5B0 1F44 CMP.W R0, #0x310000 0x34181D40: D012 BEQ 46L6 ; 0x34181D68 0x34181D42: 980E LDR R0, [SP, #56] 0x34181D44: 6840 LDR R0, [R0, #4] 0x34181D46: F5B0 1F90 CMP.W R0, #0x120000 0x34181D4A: D00D BEQ 46L6 ; 0x34181D68 0x34181D4C: 980E LDR R0, [SP, #56] 0x34181D4E: 6840 LDR R0, [R0, #4] 0x34181D50: F5B0 1F08 CMP.W R0, #0x220000 0x34181D54: D008 BEQ 46L6 ; 0x34181D68 0x34181D56: 980E LDR R0, [SP, #56] 0x34181D58: 6840 LDR R0, [R0, #4] 0x34181D5A: F5B0 1F48 CMP.W R0, #0x320000 0x34181D5E: D003 BEQ 46L6 ; 0x34181D68 0x34181D60: 980E LDR R0, [SP, #56] 0x34181D62: 6840 LDR R0, [R0, #4] 0x34181D64: 2803 CMP R0, #3 0x34181D66: D100 BNE 46L7 ; 0x34181D6A
.L6: 0x34181D68: E006 B 46L8 ; 0x34181D78
.L7: 0x34181D6A: F244 10E6 MOVW R0, #0x41E6 ; 0x341941E6 = .rodata..L.str.33 0x34181D6E: F2C3 4019 MOVT R0, #0x3419 ; 0x341941E6 = .rodata..L.str.33 0x34181D72: 21AF MOVS R1, #175 0x34181D74: F00B FF92 BL assert_failed ; 0x3418DC9C
.L8: 0x34181D78: 980E LDR R0, [SP, #56] 0x34181D7A: 6800 LDR R0, [R0] 0x34181D7C: 990D LDR R1, [SP, #52] 0x34181D7E: 40C8 LSRS R0, R1 0x34181D80: 2800 CMP R0, #0 0x34181D82: F000 82B7 BEQ.W 46L52 ; 0x341822F4 0x34181D86: 980E LDR R0, [SP, #56] 0x34181D88: 6800 LDR R0, [R0] 0x34181D8A: 9A0D LDR R2, [SP, #52] 0x34181D8C: 2101 MOVS R1, #1 0x34181D8E: 4091 LSLS R1, R2 0x34181D90: 4008 ANDS R0, R1 0x34181D92: 900C STR R0, [SP, #48] 0x34181D94: 980C LDR R0, [SP, #48] 0x34181D96: 2800 CMP R0, #0 0x34181D98: F000 82A8 BEQ.W 46L51 ; 0x341822EC 0x34181D9C: 980E LDR R0, [SP, #56] 0x34181D9E: 6840 LDR R0, [R0, #4] 0x34181DA0: F000 0003 AND R0, R0, #3 0x34181DA4: 2801 CMP R0, #1 0x34181DA6: D005 BEQ 46L9 ; 0x34181DB4 0x34181DA8: 980E LDR R0, [SP, #56] 0x34181DAA: 6840 LDR R0, [R0, #4] 0x34181DAC: F000 0003 AND R0, R0, #3 0x34181DB0: 2802 CMP R0, #2 0x34181DB2: D144 BNE 46L13 ; 0x34181E3E
.L9: 0x34181DB4: 980E LDR R0, [SP, #56] 0x34181DB6: 68C0 LDR R0, [R0, #12] 0x34181DB8: B158 CBZ R0, .L10 ; 0x34181DD2 0x34181DBA: 980E LDR R0, [SP, #56] 0x34181DBC: 68C0 LDR R0, [R0, #12] 0x34181DBE: 2801 CMP R0, #1 0x34181DC0: D007 BEQ 46L10 ; 0x34181DD2 0x34181DC2: 980E LDR R0, [SP, #56] 0x34181DC4: 68C0 LDR R0, [R0, #12] 0x34181DC6: 2802 CMP R0, #2 0x34181DC8: D003 BEQ 46L10 ; 0x34181DD2 0x34181DCA: 980E LDR R0, [SP, #56] 0x34181DCC: 68C0 LDR R0, [R0, #12] 0x34181DCE: 2803 CMP R0, #3 0x34181DD0: D100 BNE 46L11 ; 0x34181DD4
.L10: 0x34181DD2: E006 B 46L12 ; 0x34181DE2
.L11: 0x34181DD4: F244 10E6 MOVW R0, #0x41E6 ; 0x341941E6 = .rodata..L.str.33 0x34181DD8: F2C3 4019 MOVT R0, #0x3419 ; 0x341941E6 = .rodata..L.str.33 0x34181DDC: 21BE MOVS R1, #190 0x34181DDE: F00B FF5D BL assert_failed ; 0x3418DC9C
.L12: 0x34181DE2: 980F LDR R0, [SP, #60] 0x34181DE4: 6880 LDR R0, [R0, #8] 0x34181DE6: 900B STR R0, [SP, #44] 0x34181DE8: 980D LDR R0, [SP, #52] 0x34181DEA: 0041 LSLS R1, R0, #1 0x34181DEC: 2003 MOVS R0, #3 0x34181DEE: FA00 F101 LSL.W R1, R0, R1 0x34181DF2: 980B LDR R0, [SP, #44] 0x34181DF4: 4388 BICS R0, R1 0x34181DF6: 900B STR R0, [SP, #44] 0x34181DF8: 980E LDR R0, [SP, #56] 0x34181DFA: 68C0 LDR R0, [R0, #12] 0x34181DFC: 990D LDR R1, [SP, #52] 0x34181DFE: 0049 LSLS R1, R1, #1 0x34181E00: FA00 F101 LSL.W R1, R0, R1 0x34181E04: 980B LDR R0, [SP, #44] 0x34181E06: 4308 ORRS R0, R1 0x34181E08: 900B STR R0, [SP, #44] 0x34181E0A: 980B LDR R0, [SP, #44] 0x34181E0C: 990F LDR R1, [SP, #60] 0x34181E0E: 6088 STR R0, [R1, #8] 0x34181E10: 980F LDR R0, [SP, #60] 0x34181E12: 6840 LDR R0, [R0, #4] 0x34181E14: 900B STR R0, [SP, #44] 0x34181E16: 990D LDR R1, [SP, #52] 0x34181E18: 2001 MOVS R0, #1 0x34181E1A: FA00 F101 LSL.W R1, R0, R1 0x34181E1E: 980B LDR R0, [SP, #44] 0x34181E20: 4388 BICS R0, R1 0x34181E22: 900B STR R0, [SP, #44] 0x34181E24: 980E LDR R0, [SP, #56] 0x34181E26: 6840 LDR R0, [R0, #4] 0x34181E28: F3C0 1000 UBFX R0, R0, #4, #1 0x34181E2C: 990D LDR R1, [SP, #52] 0x34181E2E: FA00 F101 LSL.W R1, R0, R1 0x34181E32: 980B LDR R0, [SP, #44] 0x34181E34: 4308 ORRS R0, R1 0x34181E36: 900B STR R0, [SP, #44] 0x34181E38: 980B LDR R0, [SP, #44] 0x34181E3A: 990F LDR R1, [SP, #60] 0x34181E3C: 6048 STR R0, [R1, #4]
.L13: 0x34181E3E: 980E LDR R0, [SP, #56] 0x34181E40: 6840 LDR R0, [R0, #4] 0x34181E42: 43C0 MVNS R0, R0 0x34181E44: 0780 LSLS R0, R0, #30 0x34181E46: B940 CBNZ R0, .L14 ; 0x34181E5A 0x34181E48: 980E LDR R0, [SP, #56] 0x34181E4A: 6840 LDR R0, [R0, #4] 0x34181E4C: 43C0 MVNS R0, R0 0x34181E4E: 0780 LSLS R0, R0, #30 0x34181E50: BB68 CBNZ R0, .L18 ; 0x34181EAE 0x34181E52: 980E LDR R0, [SP, #56] 0x34181E54: 6880 LDR R0, [R0, #8] 0x34181E56: 2801 CMP R0, #1 0x34181E58: D029 BEQ 46L18 ; 0x34181EAE
.L14: 0x34181E5A: 980E LDR R0, [SP, #56] 0x34181E5C: 6880 LDR R0, [R0, #8] 0x34181E5E: B138 CBZ R0, .L15 ; 0x34181E70 0x34181E60: 980E LDR R0, [SP, #56] 0x34181E62: 6880 LDR R0, [R0, #8] 0x34181E64: 2801 CMP R0, #1 0x34181E66: D003 BEQ 46L15 ; 0x34181E70 0x34181E68: 980E LDR R0, [SP, #56] 0x34181E6A: 6880 LDR R0, [R0, #8] 0x34181E6C: 2802 CMP R0, #2 0x34181E6E: D100 BNE 46L16 ; 0x34181E72
.L15: 0x34181E70: E006 B 46L17 ; 0x34181E80
.L16: 0x34181E72: F244 10E6 MOVW R0, #0x41E6 ; 0x341941E6 = .rodata..L.str.33 0x34181E76: F2C3 4019 MOVT R0, #0x3419 ; 0x341941E6 = .rodata..L.str.33 0x34181E7A: 21D1 MOVS R1, #209 0x34181E7C: F00B FF0E BL assert_failed ; 0x3418DC9C
.L17: 0x34181E80: 980F LDR R0, [SP, #60] 0x34181E82: 68C0 LDR R0, [R0, #12] 0x34181E84: 900B STR R0, [SP, #44] 0x34181E86: 980D LDR R0, [SP, #52] 0x34181E88: 0041 LSLS R1, R0, #1 0x34181E8A: 2003 MOVS R0, #3 0x34181E8C: FA00 F101 LSL.W R1, R0, R1 0x34181E90: 980B LDR R0, [SP, #44] 0x34181E92: 4388 BICS R0, R1 0x34181E94: 900B STR R0, [SP, #44] 0x34181E96: 980E LDR R0, [SP, #56] 0x34181E98: 6880 LDR R0, [R0, #8] 0x34181E9A: 990D LDR R1, [SP, #52] 0x34181E9C: 0049 LSLS R1, R1, #1 0x34181E9E: FA00 F101 LSL.W R1, R0, R1 0x34181EA2: 980B LDR R0, [SP, #44] 0x34181EA4: 4308 ORRS R0, R1 0x34181EA6: 900B STR R0, [SP, #44] 0x34181EA8: 980B LDR R0, [SP, #44] 0x34181EAA: 990F LDR R1, [SP, #60] 0x34181EAC: 60C8 STR R0, [R1, #12]
.L18: 0x34181EAE: 980E LDR R0, [SP, #56] 0x34181EB0: 6840 LDR R0, [R0, #4] 0x34181EB2: F000 0003 AND R0, R0, #3 0x34181EB6: 2802 CMP R0, #2 0x34181EB8: F040 80E4 BNE.W 46L24 ; 0x34182084 0x34181EBC: 980F LDR R0, [SP, #60] 0x34181EBE: 2100 MOVS R1, #0 0x34181EC0: F2C5 6102 MOVT R1, #0x5602 0x34181EC4: 4288 CMP R0, R1 0x34181EC6: F000 80A4 BEQ.W 46L19 ; 0x34182012 0x34181ECA: 980F LDR R0, [SP, #60] 0x34181ECC: 2100 MOVS R1, #0 0x34181ECE: F2C4 6102 MOVT R1, #0x4602 0x34181ED2: 4288 CMP R0, R1 0x34181ED4: F000 809D BEQ.W 46L19 ; 0x34182012 0x34181ED8: 980F LDR R0, [SP, #60] 0x34181EDA: F240 4100 MOVW R1, #0x0400 0x34181EDE: F2C5 6102 MOVT R1, #0x5602 0x34181EE2: 4288 CMP R0, R1 0x34181EE4: F000 8095 BEQ.W 46L19 ; 0x34182012 0x34181EE8: 980F LDR R0, [SP, #60] 0x34181EEA: F240 4100 MOVW R1, #0x0400 0x34181EEE: F2C4 6102 MOVT R1, #0x4602 0x34181EF2: 4288 CMP R0, R1 0x34181EF4: F000 808D BEQ.W 46L19 ; 0x34182012 0x34181EF8: 980F LDR R0, [SP, #60] 0x34181EFA: F640 0100 MOVW R1, #0x0800 0x34181EFE: F2C5 6102 MOVT R1, #0x5602 0x34181F02: 4288 CMP R0, R1 0x34181F04: F000 8085 BEQ.W 46L19 ; 0x34182012 0x34181F08: 980F LDR R0, [SP, #60] 0x34181F0A: F640 0100 MOVW R1, #0x0800 0x34181F0E: F2C4 6102 MOVT R1, #0x4602 0x34181F12: 4288 CMP R0, R1 0x34181F14: D07D BEQ 46L19 ; 0x34182012 0x34181F16: 980F LDR R0, [SP, #60] 0x34181F18: F640 4100 MOVW R1, #0x0C00 0x34181F1C: F2C5 6102 MOVT R1, #0x5602 0x34181F20: 4288 CMP R0, R1 0x34181F22: D076 BEQ 46L19 ; 0x34182012 0x34181F24: 980F LDR R0, [SP, #60] 0x34181F26: F640 4100 MOVW R1, #0x0C00 0x34181F2A: F2C4 6102 MOVT R1, #0x4602 0x34181F2E: 4288 CMP R0, R1 0x34181F30: D06F BEQ 46L19 ; 0x34182012 0x34181F32: 980F LDR R0, [SP, #60] 0x34181F34: F241 0100 MOVW R1, #0x1000 0x34181F38: F2C5 6102 MOVT R1, #0x5602 0x34181F3C: 4288 CMP R0, R1 0x34181F3E: D068 BEQ 46L19 ; 0x34182012 0x34181F40: 980F LDR R0, [SP, #60] 0x34181F42: F241 0100 MOVW R1, #0x1000 0x34181F46: F2C4 6102 MOVT R1, #0x4602 0x34181F4A: 4288 CMP R0, R1 0x34181F4C: D061 BEQ 46L19 ; 0x34182012 0x34181F4E: 980F LDR R0, [SP, #60] 0x34181F50: F241 4100 MOVW R1, #0x1400 0x34181F54: F2C5 6102 MOVT R1, #0x5602 0x34181F58: 4288 CMP R0, R1 0x34181F5A: D05A BEQ 46L19 ; 0x34182012 0x34181F5C: 980F LDR R0, [SP, #60] 0x34181F5E: F241 4100 MOVW R1, #0x1400 0x34181F62: F2C4 6102 MOVT R1, #0x4602 0x34181F66: 4288 CMP R0, R1 0x34181F68: D053 BEQ 46L19 ; 0x34182012 0x34181F6A: 980F LDR R0, [SP, #60] 0x34181F6C: F641 0100 MOVW R1, #0x1800 0x34181F70: F2C5 6102 MOVT R1, #0x5602 0x34181F74: 4288 CMP R0, R1 0x34181F76: D04C BEQ 46L19 ; 0x34182012 0x34181F78: 980F LDR R0, [SP, #60] 0x34181F7A: F641 0100 MOVW R1, #0x1800 0x34181F7E: F2C4 6102 MOVT R1, #0x4602 0x34181F82: 4288 CMP R0, R1 0x34181F84: D045 BEQ 46L19 ; 0x34182012 0x34181F86: 980F LDR R0, [SP, #60] 0x34181F88: F641 4100 MOVW R1, #0x1C00 0x34181F8C: F2C5 6102 MOVT R1, #0x5602 0x34181F90: 4288 CMP R0, R1 0x34181F92: D03E BEQ 46L19 ; 0x34182012 0x34181F94: 980F LDR R0, [SP, #60] 0x34181F96: F641 4100 MOVW R1, #0x1C00 0x34181F9A: F2C4 6102 MOVT R1, #0x4602 0x34181F9E: 4288 CMP R0, R1 0x34181FA0: D037 BEQ 46L19 ; 0x34182012 0x34181FA2: 980F LDR R0, [SP, #60] 0x34181FA4: F243 4100 MOVW R1, #0x3400 0x34181FA8: F2C5 6102 MOVT R1, #0x5602 0x34181FAC: 4288 CMP R0, R1 0x34181FAE: D030 BEQ 46L19 ; 0x34182012 0x34181FB0: 980F LDR R0, [SP, #60] 0x34181FB2: F243 4100 MOVW R1, #0x3400 0x34181FB6: F2C4 6102 MOVT R1, #0x4602 0x34181FBA: 4288 CMP R0, R1 0x34181FBC: D029 BEQ 46L19 ; 0x34182012 0x34181FBE: 980F LDR R0, [SP, #60] 0x34181FC0: F643 0100 MOVW R1, #0x3800 0x34181FC4: F2C5 6102 MOVT R1, #0x5602 0x34181FC8: 4288 CMP R0, R1 0x34181FCA: D022 BEQ 46L19 ; 0x34182012 0x34181FCC: 980F LDR R0, [SP, #60] 0x34181FCE: F643 0100 MOVW R1, #0x3800 0x34181FD2: F2C4 6102 MOVT R1, #0x4602 0x34181FD6: 4288 CMP R0, R1 0x34181FD8: D01B BEQ 46L19 ; 0x34182012 0x34181FDA: 980F LDR R0, [SP, #60] 0x34181FDC: F643 4100 MOVW R1, #0x3C00 0x34181FE0: F2C5 6102 MOVT R1, #0x5602 0x34181FE4: 4288 CMP R0, R1 0x34181FE6: D014 BEQ 46L19 ; 0x34182012 0x34181FE8: 980F LDR R0, [SP, #60] 0x34181FEA: F643 4100 MOVW R1, #0x3C00 0x34181FEE: F2C4 6102 MOVT R1, #0x4602 0x34181FF2: 4288 CMP R0, R1 0x34181FF4: D00D BEQ 46L19 ; 0x34182012 0x34181FF6: 980F LDR R0, [SP, #60] 0x34181FF8: F244 0100 MOVW R1, #0x4000 0x34181FFC: F2C5 6102 MOVT R1, #0x5602 0x34182000: 4288 CMP R0, R1 0x34182002: D006 BEQ 46L19 ; 0x34182012 0x34182004: 980F LDR R0, [SP, #60] 0x34182006: F244 0100 MOVW R1, #0x4000 0x3418200A: F2C4 6102 MOVT R1, #0x4602 0x3418200E: 4288 CMP R0, R1 0x34182010: D100 BNE 46L20 ; 0x34182014
.L19: 0x34182012: E006 B 46L21 ; 0x34182022
.L20: 0x34182014: F244 10E6 MOVW R0, #0x41E6 ; 0x341941E6 = .rodata..L.str.33 0x34182018: F2C3 4019 MOVT R0, #0x3419 ; 0x341941E6 = .rodata..L.str.33 0x3418201C: 21DE MOVS R1, #222 0x3418201E: F00B FE3D BL assert_failed ; 0x3418DC9C
.L21: 0x34182022: 980E LDR R0, [SP, #56] 0x34182024: 6900 LDR R0, [R0, #16] 0x34182026: 280F CMP R0, #15 0x34182028: D800 BHI 46L22 ; 0x3418202C 0x3418202A: E006 B 46L23 ; 0x3418203A
.L22: 0x3418202C: F244 10E6 MOVW R0, #0x41E6 ; 0x341941E6 = .rodata..L.str.33 0x34182030: F2C3 4019 MOVT R0, #0x3419 ; 0x341941E6 = .rodata..L.str.33 0x34182034: 21DF MOVS R1, #223 0x34182036: F00B FE31 BL assert_failed ; 0x3418DC9C
.L23: 0x3418203A: 980F LDR R0, [SP, #60] 0x3418203C: 990D LDR R1, [SP, #52] 0x3418203E: F06F 0203 MVN R2, #3 0x34182042: EA02 0151 AND.W R1, R2, R1, LSR #1 0x34182046: 4408 ADD R0, R1 0x34182048: 6A00 LDR R0, [R0, #32] 0x3418204A: 900B STR R0, [SP, #44] 0x3418204C: 980D LDR R0, [SP, #52] 0x3418204E: F000 0007 AND R0, R0, #7 0x34182052: 0081 LSLS R1, R0, #2 0x34182054: 200F MOVS R0, #15 0x34182056: FA00 F101 LSL.W R1, R0, R1 0x3418205A: 980B LDR R0, [SP, #44] 0x3418205C: 4388 BICS R0, R1 0x3418205E: 900B STR R0, [SP, #44] 0x34182060: 980E LDR R0, [SP, #56] 0x34182062: 6900 LDR R0, [R0, #16] 0x34182064: 990D LDR R1, [SP, #52] 0x34182066: F001 0107 AND R1, R1, #7 0x3418206A: 0089 LSLS R1, R1, #2 0x3418206C: FA00 F101 LSL.W R1, R0, R1 0x34182070: 980B LDR R0, [SP, #44] 0x34182072: 4308 ORRS R0, R1 0x34182074: 900B STR R0, [SP, #44] 0x34182076: 980B LDR R0, [SP, #44] 0x34182078: 990F LDR R1, [SP, #60] 0x3418207A: 9B0D LDR R3, [SP, #52] 0x3418207C: EA02 0253 AND.W R2, R2, R3, LSR #1 0x34182080: 4411 ADD R1, R2 0x34182082: 6208 STR R0, [R1, #32]
.L24: 0x34182084: 980F LDR R0, [SP, #60] 0x34182086: 6800 LDR R0, [R0] 0x34182088: 900B STR R0, [SP, #44] 0x3418208A: 980D LDR R0, [SP, #52] 0x3418208C: 0041 LSLS R1, R0, #1 0x3418208E: 2003 MOVS R0, #3 0x34182090: FA00 F101 LSL.W R1, R0, R1 0x34182094: 980B LDR R0, [SP, #44] 0x34182096: 4388 BICS R0, R1 0x34182098: 900B STR R0, [SP, #44] 0x3418209A: 980E LDR R0, [SP, #56] 0x3418209C: 6840 LDR R0, [R0, #4] 0x3418209E: F000 0003 AND R0, R0, #3 0x341820A2: 990D LDR R1, [SP, #52] 0x341820A4: 0049 LSLS R1, R1, #1 0x341820A6: FA00 F101 LSL.W R1, R0, R1 0x341820AA: 980B LDR R0, [SP, #44] 0x341820AC: 4308 ORRS R0, R1 0x341820AE: 900B STR R0, [SP, #44] 0x341820B0: 980B LDR R0, [SP, #44] 0x341820B2: 990F LDR R1, [SP, #60] 0x341820B4: 6008 STR R0, [R1] 0x341820B6: 980E LDR R0, [SP, #56] 0x341820B8: 7980 LDRB R0, [R0, #6] 0x341820BA: 0780 LSLS R0, R0, #30 0x341820BC: 2800 CMP R0, #0 0x341820BE: F000 8115 BEQ.W 46L51 ; 0x341822EC 0x341820C2: 980D LDR R0, [SP, #52] 0x341820C4: F020 0003 BIC R0, R0, #3 0x341820C8: F245 0160 MOVW R1, #0x5060 0x341820CC: F2C5 6102 MOVT R1, #0x5602 0x341820D0: 5840 LDR R0, [R0, R1] 0x341820D2: 900B STR R0, [SP, #44] 0x341820D4: 980D LDR R0, [SP, #52] 0x341820D6: F000 0003 AND R0, R0, #3 0x341820DA: 00C1 LSLS R1, R0, #3 0x341820DC: 200F MOVS R0, #15 0x341820DE: FA00 F101 LSL.W R1, R0, R1 0x341820E2: 980B LDR R0, [SP, #44] 0x341820E4: 4388 BICS R0, R1 0x341820E6: 900B STR R0, [SP, #44] 0x341820E8: 980F LDR R0, [SP, #60] 0x341820EA: 2100 MOVS R1, #0 0x341820EC: F2C5 6102 MOVT R1, #0x5602 0x341820F0: 4288 CMP R0, R1 0x341820F2: D102 BNE 46L25 ; 0x341820FA 0x341820F4: 2000 MOVS R0, #0 0x341820F6: 900A STR R0, [SP, #40] 0x341820F8: E082 B 46L46 ; 0x34182200
.L25: 0x341820FA: 980F LDR R0, [SP, #60] 0x341820FC: F240 4100 MOVW R1, #0x0400 0x34182100: F2C5 6102 MOVT R1, #0x5602 0x34182104: 4288 CMP R0, R1 0x34182106: D102 BNE 46L26 ; 0x3418210E 0x34182108: 2001 MOVS R0, #1 0x3418210A: 9009 STR R0, [SP, #36] 0x3418210C: E076 B 46L45 ; 0x341821FC
.L26: 0x3418210E: 980F LDR R0, [SP, #60] 0x34182110: F640 0100 MOVW R1, #0x0800 0x34182114: F2C5 6102 MOVT R1, #0x5602 0x34182118: 4288 CMP R0, R1 0x3418211A: D102 BNE 46L27 ; 0x34182122 0x3418211C: 2002 MOVS R0, #2 0x3418211E: 9008 STR R0, [SP, #32] 0x34182120: E06A B 46L44 ; 0x341821F8
.L27: 0x34182122: 980F LDR R0, [SP, #60] 0x34182124: F640 4100 MOVW R1, #0x0C00 0x34182128: F2C5 6102 MOVT R1, #0x5602 0x3418212C: 4288 CMP R0, R1 0x3418212E: D102 BNE 46L28 ; 0x34182136 0x34182130: 2003 MOVS R0, #3 0x34182132: 9007 STR R0, [SP, #28] 0x34182134: E05E B 46L43 ; 0x341821F4
.L28: 0x34182136: 980F LDR R0, [SP, #60] 0x34182138: F241 0100 MOVW R1, #0x1000 0x3418213C: F2C5 6102 MOVT R1, #0x5602 0x34182140: 4288 CMP R0, R1 0x34182142: D102 BNE 46L29 ; 0x3418214A 0x34182144: 2004 MOVS R0, #4 0x34182146: 9006 STR R0, [SP, #24] 0x34182148: E052 B 46L42 ; 0x341821F0
.L29: 0x3418214A: 980F LDR R0, [SP, #60] 0x3418214C: F241 4100 MOVW R1, #0x1400 0x34182150: F2C5 6102 MOVT R1, #0x5602 0x34182154: 4288 CMP R0, R1 0x34182156: D102 BNE 46L30 ; 0x3418215E 0x34182158: 2005 MOVS R0, #5 0x3418215A: 9005 STR R0, [SP, #20] 0x3418215C: E046 B 46L41 ; 0x341821EC
.L30: 0x3418215E: 980F LDR R0, [SP, #60] 0x34182160: F641 0100 MOVW R1, #0x1800 0x34182164: F2C5 6102 MOVT R1, #0x5602 0x34182168: 4288 CMP R0, R1 0x3418216A: D102 BNE 46L31 ; 0x34182172 0x3418216C: 2006 MOVS R0, #6 0x3418216E: 9004 STR R0, [SP, #16] 0x34182170: E03A B 46L40 ; 0x341821E8
.L31: 0x34182172: 980F LDR R0, [SP, #60] 0x34182174: F641 4100 MOVW R1, #0x1C00 0x34182178: F2C5 6102 MOVT R1, #0x5602 0x3418217C: 4288 CMP R0, R1 0x3418217E: D102 BNE 46L32 ; 0x34182186 0x34182180: 2007 MOVS R0, #7 0x34182182: 9003 STR R0, [SP, #12] 0x34182184: E02E B 46L39 ; 0x341821E4
.L32: 0x34182186: 980F LDR R0, [SP, #60] 0x34182188: F243 4100 MOVW R1, #0x3400 0x3418218C: F2C5 6102 MOVT R1, #0x5602 0x34182190: 4288 CMP R0, R1 0x34182192: D102 BNE 46L33 ; 0x3418219A 0x34182194: 2008 MOVS R0, #8 0x34182196: 9002 STR R0, [SP, #8] 0x34182198: E022 B 46L38 ; 0x341821E0
.L33: 0x3418219A: 980F LDR R0, [SP, #60] 0x3418219C: F643 0100 MOVW R1, #0x3800 0x341821A0: F2C5 6102 MOVT R1, #0x5602 0x341821A4: 4288 CMP R0, R1 0x341821A6: D102 BNE 46L34 ; 0x341821AE 0x341821A8: 2009 MOVS R0, #9 0x341821AA: 9001 STR R0, [SP, #4] 0x341821AC: E016 B 46L37 ; 0x341821DC
.L34: 0x341821AE: 980F LDR R0, [SP, #60] 0x341821B0: F643 4100 MOVW R1, #0x3C00 0x341821B4: F2C5 6102 MOVT R1, #0x5602 0x341821B8: 4288 CMP R0, R1 0x341821BA: D102 BNE 46L35 ; 0x341821C2 0x341821BC: 200A MOVS R0, #10 0x341821BE: 9000 STR R0, [SP, #0] 0x341821C0: E00A B 46L36 ; 0x341821D8
.L35: 0x341821C2: 980F LDR R0, [SP, #60] 0x341821C4: F244 0100 MOVW R1, #0x4000 0x341821C8: F2C5 6102 MOVT R1, #0x5602 0x341821CC: 4288 CMP R0, R1 0x341821CE: F04F 0010 MOV.W R0, #16 0x341821D2: BF08 IT EQ 0x341821D4: 200B MOVEQ R0, #11 0x341821D6: 9000 STR R0, [SP, #0]
.L36: 0x341821D8: 9800 LDR R0, [SP, #0] 0x341821DA: 9001 STR R0, [SP, #4]
.L37: 0x341821DC: 9801 LDR R0, [SP, #4] 0x341821DE: 9002 STR R0, [SP, #8]
.L38: 0x341821E0: 9802 LDR R0, [SP, #8] 0x341821E2: 9003 STR R0, [SP, #12]
.L39: 0x341821E4: 9803 LDR R0, [SP, #12] 0x341821E6: 9004 STR R0, [SP, #16]
.L40: 0x341821E8: 9804 LDR R0, [SP, #16] 0x341821EA: 9005 STR R0, [SP, #20]
.L41: 0x341821EC: 9805 LDR R0, [SP, #20] 0x341821EE: 9006 STR R0, [SP, #24]
.L42: 0x341821F0: 9806 LDR R0, [SP, #24] 0x341821F2: 9007 STR R0, [SP, #28]
.L43: 0x341821F4: 9807 LDR R0, [SP, #28] 0x341821F6: 9008 STR R0, [SP, #32]
.L44: 0x341821F8: 9808 LDR R0, [SP, #32] 0x341821FA: 9009 STR R0, [SP, #36]
.L45: 0x341821FC: 9809 LDR R0, [SP, #36] 0x341821FE: 900A STR R0, [SP, #40]
.L46: 0x34182200: 980A LDR R0, [SP, #40] 0x34182202: 990D LDR R1, [SP, #52] 0x34182204: F001 0103 AND R1, R1, #3 0x34182208: 00C9 LSLS R1, R1, #3 0x3418220A: FA00 F101 LSL.W R1, R0, R1 0x3418220E: 980B LDR R0, [SP, #44] 0x34182210: 4308 ORRS R0, R1 0x34182212: 900B STR R0, [SP, #44] 0x34182214: 980B LDR R0, [SP, #44] 0x34182216: 990D LDR R1, [SP, #52] 0x34182218: F021 0103 BIC R1, R1, #3 0x3418221C: F245 0260 MOVW R2, #0x5060 0x34182220: F2C5 6202 MOVT R2, #0x5602 0x34182224: 5088 STR R0, [R1, R2] 0x34182226: F245 0080 MOVW R0, #0x5080 0x3418222A: F2C5 6002 MOVT R0, #0x5602 0x3418222E: 6800 LDR R0, [R0] 0x34182230: 900B STR R0, [SP, #44] 0x34182232: 990C LDR R1, [SP, #48] 0x34182234: 980B LDR R0, [SP, #44] 0x34182236: 4388 BICS R0, R1 0x34182238: 900B STR R0, [SP, #44] 0x3418223A: 980E LDR R0, [SP, #56] 0x3418223C: 7980 LDRB R0, [R0, #6] 0x3418223E: 07C0 LSLS R0, R0, #31 0x34182240: B118 CBZ R0, .L47 ; 0x3418224A 0x34182242: 990C LDR R1, [SP, #48] 0x34182244: 980B LDR R0, [SP, #44] 0x34182246: 4308 ORRS R0, R1 0x34182248: 900B STR R0, [SP, #44]
.L47: 0x3418224A: 980B LDR R0, [SP, #44] 0x3418224C: F245 0180 MOVW R1, #0x5080 0x34182250: F2C5 6102 MOVT R1, #0x5602 0x34182254: 6008 STR R0, [R1] 0x34182256: F245 0084 MOVW R0, #0x5084 0x3418225A: F2C5 6002 MOVT R0, #0x5602 0x3418225E: 6800 LDR R0, [R0] 0x34182260: 900B STR R0, [SP, #44] 0x34182262: 990C LDR R1, [SP, #48] 0x34182264: 980B LDR R0, [SP, #44] 0x34182266: 4388 BICS R0, R1 0x34182268: 900B STR R0, [SP, #44] 0x3418226A: 980E LDR R0, [SP, #56] 0x3418226C: 7980 LDRB R0, [R0, #6] 0x3418226E: 0780 LSLS R0, R0, #30 0x34182270: 2800 CMP R0, #0 0x34182272: D503 BPL 46L48 ; 0x3418227C 0x34182274: 990C LDR R1, [SP, #48] 0x34182276: 980B LDR R0, [SP, #44] 0x34182278: 4308 ORRS R0, R1 0x3418227A: 900B STR R0, [SP, #44]
.L48: 0x3418227C: 980B LDR R0, [SP, #44] 0x3418227E: F245 0184 MOVW R1, #0x5084 0x34182282: F2C5 6102 MOVT R1, #0x5602 0x34182286: 6008 STR R0, [R1] 0x34182288: F245 0000 MOVW R0, #0x5000 0x3418228C: F2C5 6002 MOVT R0, #0x5602 0x34182290: 6800 LDR R0, [R0] 0x34182292: 900B STR R0, [SP, #44] 0x34182294: 990C LDR R1, [SP, #48] 0x34182296: 980B LDR R0, [SP, #44] 0x34182298: 4388 BICS R0, R1 0x3418229A: 900B STR R0, [SP, #44] 0x3418229C: 980E LDR R0, [SP, #56] 0x3418229E: 7980 LDRB R0, [R0, #6] 0x341822A0: 06C0 LSLS R0, R0, #27 0x341822A2: 2800 CMP R0, #0 0x341822A4: D503 BPL 46L49 ; 0x341822AE 0x341822A6: 990C LDR R1, [SP, #48] 0x341822A8: 980B LDR R0, [SP, #44] 0x341822AA: 4308 ORRS R0, R1 0x341822AC: 900B STR R0, [SP, #44]
.L49: 0x341822AE: 980B LDR R0, [SP, #44] 0x341822B0: F245 0100 MOVW R1, #0x5000 0x341822B4: F2C5 6102 MOVT R1, #0x5602 0x341822B8: 6008 STR R0, [R1] 0x341822BA: F245 0004 MOVW R0, #0x5004 0x341822BE: F2C5 6002 MOVT R0, #0x5602 0x341822C2: 6800 LDR R0, [R0] 0x341822C4: 900B STR R0, [SP, #44] 0x341822C6: 990C LDR R1, [SP, #48] 0x341822C8: 980B LDR R0, [SP, #44] 0x341822CA: 4388 BICS R0, R1 0x341822CC: 900B STR R0, [SP, #44] 0x341822CE: 980E LDR R0, [SP, #56] 0x341822D0: 7980 LDRB R0, [R0, #6] 0x341822D2: 0680 LSLS R0, R0, #26 0x341822D4: 2800 CMP R0, #0 0x341822D6: D503 BPL 46L50 ; 0x341822E0 0x341822D8: 990C LDR R1, [SP, #48] 0x341822DA: 980B LDR R0, [SP, #44] 0x341822DC: 4308 ORRS R0, R1 0x341822DE: 900B STR R0, [SP, #44]
.L50: 0x341822E0: 980B LDR R0, [SP, #44] 0x341822E2: F245 0104 MOVW R1, #0x5004 0x341822E6: F2C5 6102 MOVT R1, #0x5602 0x341822EA: 6008 STR R0, [R1]
.L51: 0x341822EC: 980D LDR R0, [SP, #52] 0x341822EE: 3001 ADDS R0, #1 0x341822F0: 900D STR R0, [SP, #52] 0x341822F2: E541 B 46L8 ; 0x34181D78
.L52: 0x341822F4: B010 ADD SP, SP, #64 0x341822F6: BD80 POP 123R7, PC}

Section .text.LL_RCC_HSI_SetDivider from blto2_FSBL_lto.o, size=28, align=4


LL_RCC_HSI_SetDivider: 0x341822F8: B081 SUB SP, SP, #4 0x341822FA: 9000 STR R0, [SP, #0] 0x341822FC: F248 0148 MOVW R1, #0x8048 0x34182300: F2C5 6102 MOVT R1, #0x5602 0x34182304: 6808 LDR R0, [R1] 0x34182306: F420 70C0 BIC R0, R0, #0x0180 0x3418230A: 9A00 LDR R2, [SP, #0] 0x3418230C: 4310 ORRS R0, R2 0x3418230E: 6008 STR R0, [R1] 0x34182310: B001 ADD SP, SP, #4 0x34182312: 4770 BX LR

Section .text.LL_RCC_HSI_IsReady from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_HSI_IsReady: 0x34182314: F248 0004 MOVW R0, #0x8004 0x34182318: F2C5 6002 MOVT R0, #0x5602 0x3418231C: 6800 LDR R0, [R0] 0x3418231E: F3C0 00C0 UBFX R0, R0, #3, #1 0x34182322: 4770 BX LR

Section .text.LL_RCC_GetCpuClkSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_GetCpuClkSource: 0x34182324: F248 0020 MOVW R0, #0x8020 0x34182328: F2C5 6002 MOVT R0, #0x5602 0x3418232C: 6800 LDR R0, [R0] 0x3418232E: F400 1040 AND R0, R0, #0x300000 0x34182332: 4770 BX LR

Section .text.LL_RCC_GetSysClkSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_GetSysClkSource: 0x34182334: F248 0020 MOVW R0, #0x8020 0x34182338: F2C5 6002 MOVT R0, #0x5602 0x3418233C: 6800 LDR R0, [R0] 0x3418233E: F000 5040 AND R0, R0, #0x30000000 0x34182342: 4770 BX LR

Section .text.LL_RCC_PLL1_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL1_GetSource: 0x34182344: F248 0080 MOVW R0, #0x8080 0x34182348: F2C5 6002 MOVT R0, #0x5602 0x3418234C: 6800 LDR R0, [R0] 0x3418234E: F000 40E0 AND R0, R0, #0x70000000 0x34182352: 4770 BX LR

Section .text.LL_RCC_PLL2_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL2_GetSource: 0x34182354: F248 0090 MOVW R0, #0x8090 0x34182358: F2C5 6002 MOVT R0, #0x5602 0x3418235C: 6800 LDR R0, [R0] 0x3418235E: F000 40E0 AND R0, R0, #0x70000000 0x34182362: 4770 BX LR

Section .text.LL_RCC_PLL3_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL3_GetSource: 0x34182364: F248 00A0 MOVW R0, #0x80A0 0x34182368: F2C5 6002 MOVT R0, #0x5602 0x3418236C: 6800 LDR R0, [R0] 0x3418236E: F000 40E0 AND R0, R0, #0x70000000 0x34182372: 4770 BX LR

Section .text.LL_RCC_PLL4_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL4_GetSource: 0x34182374: F248 00B0 MOVW R0, #0x80B0 0x34182378: F2C5 6002 MOVT R0, #0x5602 0x3418237C: 6800 LDR R0, [R0] 0x3418237E: F000 40E0 AND R0, R0, #0x70000000 0x34182382: 4770 BX LR

Section .text.LL_RCC_MSI_SetFrequency from blto2_FSBL_lto.o, size=28, align=4


LL_RCC_MSI_SetFrequency: 0x34182384: B081 SUB SP, SP, #4 0x34182386: 9000 STR R0, [SP, #0] 0x34182388: F248 0144 MOVW R1, #0x8044 0x3418238C: F2C5 6102 MOVT R1, #0x5602 0x34182390: 6808 LDR R0, [R1] 0x34182392: F420 7000 BIC R0, R0, #0x0200 0x34182396: 9A00 LDR R2, [SP, #0] 0x34182398: 4310 ORRS R0, R2 0x3418239A: 6008 STR R0, [R1] 0x3418239C: B001 ADD SP, SP, #4 0x3418239E: 4770 BX LR

Section .text.LL_RCC_MSI_IsReady from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_MSI_IsReady: 0x341823A0: F248 0004 MOVW R0, #0x8004 0x341823A4: F2C5 6002 MOVT R0, #0x5602 0x341823A8: 6800 LDR R0, [R0] 0x341823AA: F3C0 0080 UBFX R0, R0, #2, #1 0x341823AE: 4770 BX LR

Section .text.LL_RCC_LSI_IsReady from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_LSI_IsReady: 0x341823B0: F248 0004 MOVW R0, #0x8004 0x341823B4: F2C5 6002 MOVT R0, #0x5602 0x341823B8: 6800 LDR R0, [R0] 0x341823BA: F000 0001 AND R0, R0, #1 0x341823BE: 4770 BX LR

Section .text.LL_RCC_LSE_IsReady from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_LSE_IsReady: 0x341823C0: F248 0004 MOVW R0, #0x8004 0x341823C4: F2C5 6002 MOVT R0, #0x5602 0x341823C8: 6800 LDR R0, [R0] 0x341823CA: F3C0 0040 UBFX R0, R0, #1, #1 0x341823CE: 4770 BX LR

Section .text.LL_RCC_PLL1_IsReady from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL1_IsReady: 0x341823D0: F248 0004 MOVW R0, #0x8004 0x341823D4: F2C5 6002 MOVT R0, #0x5602 0x341823D8: 6800 LDR R0, [R0] 0x341823DA: F3C0 2000 UBFX R0, R0, #8, #1 0x341823DE: 4770 BX LR

Section .text.LL_RCC_IC1_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC1_GetSource: 0x341823E0: F248 00C4 MOVW R0, #0x80C4 0x341823E4: F2C5 6002 MOVT R0, #0x5602 0x341823E8: 6800 LDR R0, [R0] 0x341823EA: F000 5040 AND R0, R0, #0x30000000 0x341823EE: 4770 BX LR

Section .text.LL_RCC_IC2_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC2_GetSource: 0x341823F0: F248 00C8 MOVW R0, #0x80C8 0x341823F4: F2C5 6002 MOVT R0, #0x5602 0x341823F8: 6800 LDR R0, [R0] 0x341823FA: F000 5040 AND R0, R0, #0x30000000 0x341823FE: 4770 BX LR

Section .text.LL_RCC_IC6_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC6_GetSource: 0x34182400: F248 00D8 MOVW R0, #0x80D8 0x34182404: F2C5 6002 MOVT R0, #0x5602 0x34182408: 6800 LDR R0, [R0] 0x3418240A: F000 5040 AND R0, R0, #0x30000000 0x3418240E: 4770 BX LR

Section .text.LL_RCC_IC11_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC11_GetSource: 0x34182410: F248 00EC MOVW R0, #0x80EC 0x34182414: F2C5 6002 MOVT R0, #0x5602 0x34182418: 6800 LDR R0, [R0] 0x3418241A: F000 5040 AND R0, R0, #0x30000000 0x3418241E: 4770 BX LR

Section .text.LL_RCC_PLL2_IsReady from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL2_IsReady: 0x34182420: F248 0004 MOVW R0, #0x8004 0x34182424: F2C5 6002 MOVT R0, #0x5602 0x34182428: 6800 LDR R0, [R0] 0x3418242A: F3C0 2040 UBFX R0, R0, #9, #1 0x3418242E: 4770 BX LR

Section .text.LL_RCC_PLL3_IsReady from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL3_IsReady: 0x34182430: F248 0004 MOVW R0, #0x8004 0x34182434: F2C5 6002 MOVT R0, #0x5602 0x34182438: 6800 LDR R0, [R0] 0x3418243A: F3C0 2080 UBFX R0, R0, #10, #1 0x3418243E: 4770 BX LR

Section .text.LL_RCC_PLL4_IsReady from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL4_IsReady: 0x34182440: F248 0004 MOVW R0, #0x8004 0x34182444: F2C5 6002 MOVT R0, #0x5602 0x34182448: 6800 LDR R0, [R0] 0x3418244A: F3C0 20C0 UBFX R0, R0, #11, #1 0x3418244E: 4770 BX LR

Section .text.RCC_PLL_Source_IsReady from blto2_FSBL_lto.o, size=84, align=4


RCC_PLL_Source_IsReady: 0x34182450: B580 PUSH 123R7, LR} 0x34182452: B084 SUB SP, SP, #16 0x34182454: 9003 STR R0, [SP, #12] 0x34182456: 2001 MOVS R0, #1 0x34182458: 9002 STR R0, [SP, #8] 0x3418245A: 9803 LDR R0, [SP, #12] 0x3418245C: 9001 STR R0, [SP, #4] 0x3418245E: B160 CBZ R0, .L1 ; 0x3418247A 0x34182460: 9801 LDR R0, [SP, #4] 0x34182462: F1B0 5F80 CMP.W R0, #0x10000000 0x34182466: D00E BEQ 46L3 ; 0x34182486 0x34182468: 9801 LDR R0, [SP, #4] 0x3418246A: F1B0 5F00 CMP.W R0, #0x20000000 0x3418246E: D010 BEQ 46L5 ; 0x34182492 0x34182470: 9801 LDR R0, [SP, #4] 0x34182472: F1B0 5F40 CMP.W R0, #0x30000000 0x34182476: D012 BEQ 46L7 ; 0x3418249E 0x34182478: E011 B 46L7 ; 0x3418249E
.L1: 0x3418247A: F7FF FF4B BL LL_RCC_HSI_IsReady ; 0x34182314 0x3418247E: B908 CBNZ R0, .L2 ; 0x34182484 0x34182480: 2000 MOVS R0, #0 0x34182482: 9002 STR R0, [SP, #8]
.L2: 0x34182484: E00B B 46L7 ; 0x3418249E
.L3: 0x34182486: F7FF FF8B BL LL_RCC_MSI_IsReady ; 0x341823A0 0x3418248A: B908 CBNZ R0, .L4 ; 0x34182490 0x3418248C: 2000 MOVS R0, #0 0x3418248E: 9002 STR R0, [SP, #8]
.L4: 0x34182490: E005 B 46L7 ; 0x3418249E
.L5: 0x34182492: F000 F807 BL LL_RCC_HSE_IsReady ; 0x341824A4 0x34182496: B908 CBNZ R0, .L6 ; 0x3418249C 0x34182498: 2000 MOVS R0, #0 0x3418249A: 9002 STR R0, [SP, #8]
.L6: 0x3418249C: E7FF B 46L7 ; 0x3418249E
.L7: 0x3418249E: 9802 LDR R0, [SP, #8] 0x341824A0: B004 ADD SP, SP, #16 0x341824A2: BD80 POP 123R7, PC}

Section .text.LL_RCC_HSE_IsReady from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_HSE_IsReady: 0x341824A4: F248 0004 MOVW R0, #0x8004 0x341824A8: F2C5 6002 MOVT R0, #0x5602 0x341824AC: 6800 LDR R0, [R0] 0x341824AE: F3C0 1000 UBFX R0, R0, #4, #1 0x341824B2: 4770 BX LR

Section .text.LL_RCC_HSI_GetDivider from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_HSI_GetDivider: 0x341824B4: F248 0048 MOVW R0, #0x8048 0x341824B8: F2C5 6002 MOVT R0, #0x5602 0x341824BC: 6800 LDR R0, [R0] 0x341824BE: F400 70C0 AND R0, R0, #0x0180 0x341824C2: 4770 BX LR

Section .text.LL_RCC_PLL1_IsEnabledBypass from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL1_IsEnabledBypass: 0x341824C4: F248 0080 MOVW R0, #0x8080 0x341824C8: F2C5 6002 MOVT R0, #0x5602 0x341824CC: 6800 LDR R0, [R0] 0x341824CE: F3C0 60C0 UBFX R0, R0, #27, #1 0x341824D2: 4770 BX LR

Section .text.LL_RCC_PLL2_IsEnabledBypass from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL2_IsEnabledBypass: 0x341824D4: F248 0090 MOVW R0, #0x8090 0x341824D8: F2C5 6002 MOVT R0, #0x5602 0x341824DC: 6800 LDR R0, [R0] 0x341824DE: F3C0 60C0 UBFX R0, R0, #27, #1 0x341824E2: 4770 BX LR

Section .text.LL_RCC_PLL3_IsEnabledBypass from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL3_IsEnabledBypass: 0x341824E4: F248 00A0 MOVW R0, #0x80A0 0x341824E8: F2C5 6002 MOVT R0, #0x5602 0x341824EC: 6800 LDR R0, [R0] 0x341824EE: F3C0 60C0 UBFX R0, R0, #27, #1 0x341824F2: 4770 BX LR

Section .text.LL_RCC_PLL4_IsEnabledBypass from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL4_IsEnabledBypass: 0x341824F4: F248 00B0 MOVW R0, #0x80B0 0x341824F8: F2C5 6002 MOVT R0, #0x5602 0x341824FC: 6800 LDR R0, [R0] 0x341824FE: F3C0 60C0 UBFX R0, R0, #27, #1 0x34182502: 4770 BX LR

Section .text.RCC_GetSysClockFreq from blto2_FSBL_lto.o, size=232, align=4


RCC_GetSysClockFreq: 0x34182504: B580 PUSH 123R7, LR} 0x34182506: B086 SUB SP, SP, #24 0x34182508: 9005 STR R0, [SP, #20] 0x3418250A: 9104 STR R1, [SP, #16] 0x3418250C: 2000 MOVS R0, #0 0x3418250E: 9003 STR R0, [SP, #12] 0x34182510: F7FF FF10 BL LL_RCC_GetSysClkSource ; 0x34182334 0x34182514: 4601 MOV R1, R0 0x34182516: 9102 STR R1, [SP, #8] 0x34182518: B160 CBZ R0, .L1 ; 0x34182534 0x3418251A: 9802 LDR R0, [SP, #8] 0x3418251C: F1B0 5F80 CMP.W R0, #0x10000000 0x34182520: D012 BEQ 46L2 ; 0x34182548 0x34182522: 9802 LDR R0, [SP, #8] 0x34182524: F1B0 5F00 CMP.W R0, #0x20000000 0x34182528: D022 BEQ 46L3 ; 0x34182570 0x3418252A: 9802 LDR R0, [SP, #8] 0x3418252C: F1B0 5F40 CMP.W R0, #0x30000000 0x34182530: D024 BEQ 46L4 ; 0x3418257C 0x34182532: E058 B 46L10 ; 0x341825E6
.L1: 0x34182534: F7FF FFBE BL LL_RCC_HSI_GetDivider ; 0x341824B4 0x34182538: 09C1 LSRS R1, R0, #7 0x3418253A: F249 0000 MOVW R0, #0x9000 0x3418253E: F2C0 30D0 MOVT R0, #0x03D0 0x34182542: 40C8 LSRS R0, R1 0x34182544: 9003 STR R0, [SP, #12] 0x34182546: E04E B 46L10 ; 0x341825E6
.L2: 0x34182548: F248 0044 MOVW R0, #0x8044 0x3418254C: F2C5 6002 MOVT R0, #0x5602 0x34182550: 6800 LDR R0, [R0] 0x34182552: F400 7000 AND R0, R0, #0x0200 0x34182556: F5B0 7F00 CMP.W R0, #0x0200 0x3418255A: F640 1000 MOVW R0, #0x0900 0x3418255E: F2C0 003D MOVT R0, #61 0x34182562: BF04 ITT EQ 0x34182564: F242 4000 MOVWEQ R0, #0x2400 0x34182568: F2C0 00F4 MOVTEQ R0, #244 0x3418256C: 9003 STR R0, [SP, #12] 0x3418256E: E03A B 46L10 ; 0x341825E6
.L3: 0x34182570: F646 4000 MOVW R0, #0x6C00 0x34182574: F2C0 20DC MOVT R0, #0x02DC 0x34182578: 9003 STR R0, [SP, #12] 0x3418257A: E034 B 46L10 ; 0x341825E6
.L4: 0x3418257C: 9805 LDR R0, [SP, #20] 0x3418257E: 9001 STR R0, [SP, #4] 0x34182580: B160 CBZ R0, .L5 ; 0x3418259C 0x34182582: 9801 LDR R0, [SP, #4] 0x34182584: F1B0 5F80 CMP.W R0, #0x10000000 0x34182588: D011 BEQ 46L6 ; 0x341825AE 0x3418258A: 9801 LDR R0, [SP, #4] 0x3418258C: F1B0 5F00 CMP.W R0, #0x20000000 0x34182590: D016 BEQ 46L7 ; 0x341825C0 0x34182592: 9801 LDR R0, [SP, #4] 0x34182594: F1B0 5F40 CMP.W R0, #0x30000000 0x34182598: D01B BEQ 46L8 ; 0x341825D2 0x3418259A: E023 B 46L9 ; 0x341825E4
.L5: 0x3418259C: F00F F9AA BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F4 0x341825A0: 9003 STR R0, [SP, #12] 0x341825A2: 9803 LDR R0, [SP, #12] 0x341825A4: 9904 LDR R1, [SP, #16] 0x341825A6: FBB0 F0F1 UDIV R0, R0, R1 0x341825AA: 9003 STR R0, [SP, #12] 0x341825AC: E01A B 46L9 ; 0x341825E4
.L6: 0x341825AE: F00F F9E3 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191978 0x341825B2: 9003 STR R0, [SP, #12] 0x341825B4: 9803 LDR R0, [SP, #12] 0x341825B6: 9904 LDR R1, [SP, #16] 0x341825B8: FBB0 F0F1 UDIV R0, R0, R1 0x341825BC: 9003 STR R0, [SP, #12] 0x341825BE: E011 B 46L9 ; 0x341825E4
.L7: 0x341825C0: F00F FA1C BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919FC 0x341825C4: 9003 STR R0, [SP, #12] 0x341825C6: 9803 LDR R0, [SP, #12] 0x341825C8: 9904 LDR R1, [SP, #16] 0x341825CA: FBB0 F0F1 UDIV R0, R0, R1 0x341825CE: 9003 STR R0, [SP, #12] 0x341825D0: E008 B 46L9 ; 0x341825E4
.L8: 0x341825D2: F00F FA55 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A80 0x341825D6: 9003 STR R0, [SP, #12] 0x341825D8: 9803 LDR R0, [SP, #12] 0x341825DA: 9904 LDR R1, [SP, #16] 0x341825DC: FBB0 F0F1 UDIV R0, R0, R1 0x341825E0: 9003 STR R0, [SP, #12] 0x341825E2: E7FF B 46L9 ; 0x341825E4
.L9: 0x341825E4: E7FF B 46L10 ; 0x341825E6
.L10: 0x341825E6: 9803 LDR R0, [SP, #12] 0x341825E8: B006 ADD SP, SP, #24 0x341825EA: BD80 POP 123R7, PC}

Section .text.HAL_RCC_GetClockConfig from blto2_FSBL_lto.o, size=240, align=4


HAL_RCC_GetClockConfig: 0x341825EC: B082 SUB SP, SP, #8 0x341825EE: 9001 STR R0, [SP, #4] 0x341825F0: 9901 LDR R1, [SP, #4] 0x341825F2: 207F MOVS R0, #127 0x341825F4: 6008 STR R0, [R1] 0x341825F6: F248 0020 MOVW R0, #0x8020 0x341825FA: F2C5 6002 MOVT R0, #0x5602 0x341825FE: 6800 LDR R0, [R0] 0x34182600: 9000 STR R0, [SP, #0] 0x34182602: 9800 LDR R0, [SP, #0] 0x34182604: F400 1040 AND R0, R0, #0x300000 0x34182608: 0900 LSRS R0, R0, #4 0x3418260A: 9901 LDR R1, [SP, #4] 0x3418260C: 6048 STR R0, [R1, #4] 0x3418260E: 9800 LDR R0, [SP, #0] 0x34182610: F000 5040 AND R0, R0, #0x30000000 0x34182614: 0900 LSRS R0, R0, #4 0x34182616: 9901 LDR R1, [SP, #4] 0x34182618: 6088 STR R0, [R1, #8] 0x3418261A: F248 0024 MOVW R0, #0x8024 0x3418261E: F2C5 6002 MOVT R0, #0x5602 0x34182622: 6800 LDR R0, [R0] 0x34182624: 9000 STR R0, [SP, #0] 0x34182626: 9800 LDR R0, [SP, #0] 0x34182628: F400 00E0 AND R0, R0, #0x700000 0x3418262C: 9901 LDR R1, [SP, #4] 0x3418262E: 60C8 STR R0, [R1, #12] 0x34182630: 9800 LDR R0, [SP, #0] 0x34182632: F000 0007 AND R0, R0, #7 0x34182636: 9901 LDR R1, [SP, #4] 0x34182638: 6108 STR R0, [R1, #16] 0x3418263A: 9800 LDR R0, [SP, #0] 0x3418263C: F000 0070 AND R0, R0, #112 0x34182640: 9901 LDR R1, [SP, #4] 0x34182642: 6148 STR R0, [R1, #20] 0x34182644: 9800 LDR R0, [SP, #0] 0x34182646: F400 40E0 AND R0, R0, #0x7000 0x3418264A: 9901 LDR R1, [SP, #4] 0x3418264C: 6188 STR R0, [R1, #24] 0x3418264E: 9800 LDR R0, [SP, #0] 0x34182650: F400 20E0 AND R0, R0, #0x070000 0x34182654: 9901 LDR R1, [SP, #4] 0x34182656: 61C8 STR R0, [R1, #28] 0x34182658: F248 00C4 MOVW R0, #0x80C4 0x3418265C: F2C5 6002 MOVT R0, #0x5602 0x34182660: 6800 LDR R0, [R0] 0x34182662: 9000 STR R0, [SP, #0] 0x34182664: 9800 LDR R0, [SP, #0] 0x34182666: F000 5040 AND R0, R0, #0x30000000 0x3418266A: 9901 LDR R1, [SP, #4] 0x3418266C: 6208 STR R0, [R1, #32] 0x3418266E: F89D 0002 LDRB.W R0, [SP, #2] 0x34182672: 3001 ADDS R0, #1 0x34182674: 9901 LDR R1, [SP, #4] 0x34182676: 6248 STR R0, [R1, #36] 0x34182678: F248 00C8 MOVW R0, #0x80C8 0x3418267C: F2C5 6002 MOVT R0, #0x5602 0x34182680: 6800 LDR R0, [R0] 0x34182682: 9000 STR R0, [SP, #0] 0x34182684: 9800 LDR R0, [SP, #0] 0x34182686: F000 5040 AND R0, R0, #0x30000000 0x3418268A: 9901 LDR R1, [SP, #4] 0x3418268C: 6288 STR R0, [R1, #40] 0x3418268E: F89D 0002 LDRB.W R0, [SP, #2] 0x34182692: 3001 ADDS R0, #1 0x34182694: 9901 LDR R1, [SP, #4] 0x34182696: 62C8 STR R0, [R1, #44] 0x34182698: F248 00D8 MOVW R0, #0x80D8 0x3418269C: F2C5 6002 MOVT R0, #0x5602 0x341826A0: 6800 LDR R0, [R0] 0x341826A2: 9000 STR R0, [SP, #0] 0x341826A4: 9800 LDR R0, [SP, #0] 0x341826A6: F000 5040 AND R0, R0, #0x30000000 0x341826AA: 9901 LDR R1, [SP, #4] 0x341826AC: 6308 STR R0, [R1, #48] 0x341826AE: F89D 0002 LDRB.W R0, [SP, #2] 0x341826B2: 3001 ADDS R0, #1 0x341826B4: 9901 LDR R1, [SP, #4] 0x341826B6: 6348 STR R0, [R1, #52] 0x341826B8: F248 00EC MOVW R0, #0x80EC 0x341826BC: F2C5 6002 MOVT R0, #0x5602 0x341826C0: 6800 LDR R0, [R0] 0x341826C2: 9000 STR R0, [SP, #0] 0x341826C4: 9800 LDR R0, [SP, #0] 0x341826C6: F000 5040 AND R0, R0, #0x30000000 0x341826CA: 9901 LDR R1, [SP, #4] 0x341826CC: 6388 STR R0, [R1, #56] 0x341826CE: F89D 0002 LDRB.W R0, [SP, #2] 0x341826D2: 3001 ADDS R0, #1 0x341826D4: 9901 LDR R1, [SP, #4] 0x341826D6: 63C8 STR R0, [R1, #60] 0x341826D8: B002 ADD SP, SP, #8 0x341826DA: 4770 BX LR

Section .text.HAL_RCCEx_PeriphCLKConfig from blto2_FSBL_lto.o, size=24268, align=4


HAL_RCCEx_PeriphCLKConfig: 0x341826DC: B580 PUSH 123R7, LR} 0x341826DE: B086 SUB SP, SP, #24 0x341826E0: 9004 STR R0, [SP, #16] 0x341826E2: 2000 MOVS R0, #0 0x341826E4: F88D 0007 STRB.W R0, [SP, #7] 0x341826E8: F88D 0006 STRB.W R0, [SP, #6] 0x341826EC: 9804 LDR R0, [SP, #16] 0x341826EE: 7840 LDRB R0, [R0, #1] 0x341826F0: 0700 LSLS R0, R0, #28 0x341826F2: 2800 CMP R0, #0 0x341826F4: F100 8135 BMI.W 46L1 ; 0x34182962 0x341826F8: 9804 LDR R0, [SP, #16] 0x341826FA: 7980 LDRB R0, [R0, #6] 0x341826FC: 0640 LSLS R0, R0, #25 0x341826FE: 2800 CMP R0, #0 0x34182700: F100 812F BMI.W 46L1 ; 0x34182962 0x34182704: 9804 LDR R0, [SP, #16] 0x34182706: 7980 LDRB R0, [R0, #6] 0x34182708: 0600 LSLS R0, R0, #24 0x3418270A: 2800 CMP R0, #0 0x3418270C: F100 8129 BMI.W 46L1 ; 0x34182962 0x34182710: 9804 LDR R0, [SP, #16] 0x34182712: 79C0 LDRB R0, [R0, #7] 0x34182714: 07C0 LSLS R0, R0, #31 0x34182716: 2800 CMP R0, #0 0x34182718: F040 8123 BNE.W 46L1 ; 0x34182962 0x3418271C: 9804 LDR R0, [SP, #16] 0x3418271E: 7800 LDRB R0, [R0] 0x34182720: 0740 LSLS R0, R0, #29 0x34182722: 2800 CMP R0, #0 0x34182724: F100 811D BMI.W 46L1 ; 0x34182962 0x34182728: 9804 LDR R0, [SP, #16] 0x3418272A: 6800 LDR R0, [R0] 0x3418272C: 07C0 LSLS R0, R0, #31 0x3418272E: 2800 CMP R0, #0 0x34182730: F040 8117 BNE.W 46L1 ; 0x34182962 0x34182734: 9804 LDR R0, [SP, #16] 0x34182736: 7800 LDRB R0, [R0] 0x34182738: 0780 LSLS R0, R0, #30 0x3418273A: 2800 CMP R0, #0 0x3418273C: F100 8111 BMI.W 46L1 ; 0x34182962 0x34182740: 9804 LDR R0, [SP, #16] 0x34182742: 7800 LDRB R0, [R0] 0x34182744: 0700 LSLS R0, R0, #28 0x34182746: 2800 CMP R0, #0 0x34182748: F100 810B BMI.W 46L1 ; 0x34182962 0x3418274C: 9804 LDR R0, [SP, #16] 0x3418274E: 7800 LDRB R0, [R0] 0x34182750: 06C0 LSLS R0, R0, #27 0x34182752: 2800 CMP R0, #0 0x34182754: F100 8105 BMI.W 46L1 ; 0x34182962 0x34182758: 9804 LDR R0, [SP, #16] 0x3418275A: 7800 LDRB R0, [R0] 0x3418275C: 0680 LSLS R0, R0, #26 0x3418275E: 2800 CMP R0, #0 0x34182760: F100 80FF BMI.W 46L1 ; 0x34182962 0x34182764: 9804 LDR R0, [SP, #16] 0x34182766: 7800 LDRB R0, [R0] 0x34182768: 0640 LSLS R0, R0, #25 0x3418276A: 2800 CMP R0, #0 0x3418276C: F100 80F9 BMI.W 46L1 ; 0x34182962 0x34182770: 9804 LDR R0, [SP, #16] 0x34182772: 7800 LDRB R0, [R0] 0x34182774: 0600 LSLS R0, R0, #24 0x34182776: 2800 CMP R0, #0 0x34182778: F100 80F3 BMI.W 46L1 ; 0x34182962 0x3418277C: 9804 LDR R0, [SP, #16] 0x3418277E: 7840 LDRB R0, [R0, #1] 0x34182780: 07C0 LSLS R0, R0, #31 0x34182782: 2800 CMP R0, #0 0x34182784: F040 80ED BNE.W 46L1 ; 0x34182962 0x34182788: 9804 LDR R0, [SP, #16] 0x3418278A: 7840 LDRB R0, [R0, #1] 0x3418278C: 0780 LSLS R0, R0, #30 0x3418278E: 2800 CMP R0, #0 0x34182790: F100 80E7 BMI.W 46L1 ; 0x34182962 0x34182794: 9804 LDR R0, [SP, #16] 0x34182796: 7840 LDRB R0, [R0, #1] 0x34182798: 0740 LSLS R0, R0, #29 0x3418279A: 2800 CMP R0, #0 0x3418279C: F100 80E1 BMI.W 46L1 ; 0x34182962 0x341827A0: 9804 LDR R0, [SP, #16] 0x341827A2: 7840 LDRB R0, [R0, #1] 0x341827A4: 06C0 LSLS R0, R0, #27 0x341827A6: 2800 CMP R0, #0 0x341827A8: F100 80DB BMI.W 46L1 ; 0x34182962 0x341827AC: 9804 LDR R0, [SP, #16] 0x341827AE: 7840 LDRB R0, [R0, #1] 0x341827B0: 0680 LSLS R0, R0, #26 0x341827B2: 2800 CMP R0, #0 0x341827B4: F100 80D5 BMI.W 46L1 ; 0x34182962 0x341827B8: 9804 LDR R0, [SP, #16] 0x341827BA: 7840 LDRB R0, [R0, #1] 0x341827BC: 0640 LSLS R0, R0, #25 0x341827BE: 2800 CMP R0, #0 0x341827C0: F100 80CF BMI.W 46L1 ; 0x34182962 0x341827C4: 9804 LDR R0, [SP, #16] 0x341827C6: 7840 LDRB R0, [R0, #1] 0x341827C8: 0600 LSLS R0, R0, #24 0x341827CA: 2800 CMP R0, #0 0x341827CC: F100 80C9 BMI.W 46L1 ; 0x34182962 0x341827D0: 9804 LDR R0, [SP, #16] 0x341827D2: 7880 LDRB R0, [R0, #2] 0x341827D4: 07C0 LSLS R0, R0, #31 0x341827D6: 2800 CMP R0, #0 0x341827D8: F040 80C3 BNE.W 46L1 ; 0x34182962 0x341827DC: 9804 LDR R0, [SP, #16] 0x341827DE: 7880 LDRB R0, [R0, #2] 0x341827E0: 0780 LSLS R0, R0, #30 0x341827E2: 2800 CMP R0, #0 0x341827E4: F100 80BD BMI.W 46L1 ; 0x34182962 0x341827E8: 9804 LDR R0, [SP, #16] 0x341827EA: 7880 LDRB R0, [R0, #2] 0x341827EC: 0740 LSLS R0, R0, #29 0x341827EE: 2800 CMP R0, #0 0x341827F0: F100 80B7 BMI.W 46L1 ; 0x34182962 0x341827F4: 9804 LDR R0, [SP, #16] 0x341827F6: 7880 LDRB R0, [R0, #2] 0x341827F8: 0700 LSLS R0, R0, #28 0x341827FA: 2800 CMP R0, #0 0x341827FC: F100 80B1 BMI.W 46L1 ; 0x34182962 0x34182800: 9804 LDR R0, [SP, #16] 0x34182802: 7880 LDRB R0, [R0, #2] 0x34182804: 06C0 LSLS R0, R0, #27 0x34182806: 2800 CMP R0, #0 0x34182808: F100 80AB BMI.W 46L1 ; 0x34182962 0x3418280C: 9804 LDR R0, [SP, #16] 0x3418280E: 7880 LDRB R0, [R0, #2] 0x34182810: 0680 LSLS R0, R0, #26 0x34182812: 2800 CMP R0, #0 0x34182814: F100 80A5 BMI.W 46L1 ; 0x34182962 0x34182818: 9804 LDR R0, [SP, #16] 0x3418281A: 7880 LDRB R0, [R0, #2] 0x3418281C: 0640 LSLS R0, R0, #25 0x3418281E: 2800 CMP R0, #0 0x34182820: F100 809F BMI.W 46L1 ; 0x34182962 0x34182824: 9804 LDR R0, [SP, #16] 0x34182826: 7880 LDRB R0, [R0, #2] 0x34182828: 0600 LSLS R0, R0, #24 0x3418282A: 2800 CMP R0, #0 0x3418282C: F100 8099 BMI.W 46L1 ; 0x34182962 0x34182830: 9804 LDR R0, [SP, #16] 0x34182832: 78C0 LDRB R0, [R0, #3] 0x34182834: 07C0 LSLS R0, R0, #31 0x34182836: 2800 CMP R0, #0 0x34182838: F040 8093 BNE.W 46L1 ; 0x34182962 0x3418283C: 9804 LDR R0, [SP, #16] 0x3418283E: 78C0 LDRB R0, [R0, #3] 0x34182840: 0780 LSLS R0, R0, #30 0x34182842: 2800 CMP R0, #0 0x34182844: F100 808D BMI.W 46L1 ; 0x34182962 0x34182848: 9804 LDR R0, [SP, #16] 0x3418284A: 78C0 LDRB R0, [R0, #3] 0x3418284C: 0740 LSLS R0, R0, #29 0x3418284E: 2800 CMP R0, #0 0x34182850: F100 8087 BMI.W 46L1 ; 0x34182962 0x34182854: 9804 LDR R0, [SP, #16] 0x34182856: 78C0 LDRB R0, [R0, #3] 0x34182858: 0700 LSLS R0, R0, #28 0x3418285A: 2800 CMP R0, #0 0x3418285C: F100 8081 BMI.W 46L1 ; 0x34182962 0x34182860: 9804 LDR R0, [SP, #16] 0x34182862: 78C0 LDRB R0, [R0, #3] 0x34182864: 06C0 LSLS R0, R0, #27 0x34182866: 2800 CMP R0, #0 0x34182868: D47B BMI 46L1 ; 0x34182962 0x3418286A: 9804 LDR R0, [SP, #16] 0x3418286C: 78C0 LDRB R0, [R0, #3] 0x3418286E: 0680 LSLS R0, R0, #26 0x34182870: 2800 CMP R0, #0 0x34182872: D476 BMI 46L1 ; 0x34182962 0x34182874: 9804 LDR R0, [SP, #16] 0x34182876: 78C0 LDRB R0, [R0, #3] 0x34182878: 0640 LSLS R0, R0, #25 0x3418287A: 2800 CMP R0, #0 0x3418287C: D471 BMI 46L1 ; 0x34182962 0x3418287E: 9804 LDR R0, [SP, #16] 0x34182880: 78C0 LDRB R0, [R0, #3] 0x34182882: 0600 LSLS R0, R0, #24 0x34182884: 2800 CMP R0, #0 0x34182886: D46C BMI 46L1 ; 0x34182962 0x34182888: 9804 LDR R0, [SP, #16] 0x3418288A: 7900 LDRB R0, [R0, #4] 0x3418288C: 07C0 LSLS R0, R0, #31 0x3418288E: 2800 CMP R0, #0 0x34182890: D167 BNE 46L1 ; 0x34182962 0x34182892: 9804 LDR R0, [SP, #16] 0x34182894: 7900 LDRB R0, [R0, #4] 0x34182896: 0780 LSLS R0, R0, #30 0x34182898: 2800 CMP R0, #0 0x3418289A: D462 BMI 46L1 ; 0x34182962 0x3418289C: 9804 LDR R0, [SP, #16] 0x3418289E: 7900 LDRB R0, [R0, #4] 0x341828A0: 0740 LSLS R0, R0, #29 0x341828A2: 2800 CMP R0, #0 0x341828A4: D45D BMI 46L1 ; 0x34182962 0x341828A6: 9804 LDR R0, [SP, #16] 0x341828A8: 7900 LDRB R0, [R0, #4] 0x341828AA: 0700 LSLS R0, R0, #28 0x341828AC: 2800 CMP R0, #0 0x341828AE: D458 BMI 46L1 ; 0x34182962 0x341828B0: 9804 LDR R0, [SP, #16] 0x341828B2: 7900 LDRB R0, [R0, #4] 0x341828B4: 06C0 LSLS R0, R0, #27 0x341828B6: 2800 CMP R0, #0 0x341828B8: D453 BMI 46L1 ; 0x34182962 0x341828BA: 9804 LDR R0, [SP, #16] 0x341828BC: 7900 LDRB R0, [R0, #4] 0x341828BE: 0680 LSLS R0, R0, #26 0x341828C0: 2800 CMP R0, #0 0x341828C2: D44E BMI 46L1 ; 0x34182962 0x341828C4: 9804 LDR R0, [SP, #16] 0x341828C6: 7900 LDRB R0, [R0, #4] 0x341828C8: 0640 LSLS R0, R0, #25 0x341828CA: 2800 CMP R0, #0 0x341828CC: D449 BMI 46L1 ; 0x34182962 0x341828CE: 9804 LDR R0, [SP, #16] 0x341828D0: 7900 LDRB R0, [R0, #4] 0x341828D2: 0600 LSLS R0, R0, #24 0x341828D4: 2800 CMP R0, #0 0x341828D6: D444 BMI 46L1 ; 0x34182962 0x341828D8: 9804 LDR R0, [SP, #16] 0x341828DA: 7940 LDRB R0, [R0, #5] 0x341828DC: 07C0 LSLS R0, R0, #31 0x341828DE: 2800 CMP R0, #0 0x341828E0: D13F BNE 46L1 ; 0x34182962 0x341828E2: 9804 LDR R0, [SP, #16] 0x341828E4: 7940 LDRB R0, [R0, #5] 0x341828E6: 0780 LSLS R0, R0, #30 0x341828E8: 2800 CMP R0, #0 0x341828EA: D43A BMI 46L1 ; 0x34182962 0x341828EC: 9804 LDR R0, [SP, #16] 0x341828EE: 7940 LDRB R0, [R0, #5] 0x341828F0: 0740 LSLS R0, R0, #29 0x341828F2: 2800 CMP R0, #0 0x341828F4: D435 BMI 46L1 ; 0x34182962 0x341828F6: 9804 LDR R0, [SP, #16] 0x341828F8: 7940 LDRB R0, [R0, #5] 0x341828FA: 0700 LSLS R0, R0, #28 0x341828FC: 2800 CMP R0, #0 0x341828FE: D430 BMI 46L1 ; 0x34182962 0x34182900: 9804 LDR R0, [SP, #16] 0x34182902: 7940 LDRB R0, [R0, #5] 0x34182904: 06C0 LSLS R0, R0, #27 0x34182906: 2800 CMP R0, #0 0x34182908: D42B BMI 46L1 ; 0x34182962 0x3418290A: 9804 LDR R0, [SP, #16] 0x3418290C: 7940 LDRB R0, [R0, #5] 0x3418290E: 0680 LSLS R0, R0, #26 0x34182910: 2800 CMP R0, #0 0x34182912: D426 BMI 46L1 ; 0x34182962 0x34182914: 9804 LDR R0, [SP, #16] 0x34182916: 7940 LDRB R0, [R0, #5] 0x34182918: 0640 LSLS R0, R0, #25 0x3418291A: 2800 CMP R0, #0 0x3418291C: D421 BMI 46L1 ; 0x34182962 0x3418291E: 9804 LDR R0, [SP, #16] 0x34182920: 7940 LDRB R0, [R0, #5] 0x34182922: 0600 LSLS R0, R0, #24 0x34182924: 2800 CMP R0, #0 0x34182926: D41C BMI 46L1 ; 0x34182962 0x34182928: 9804 LDR R0, [SP, #16] 0x3418292A: 7980 LDRB R0, [R0, #6] 0x3418292C: 07C0 LSLS R0, R0, #31 0x3418292E: B9C0 CBNZ R0, .L1 ; 0x34182962 0x34182930: 9804 LDR R0, [SP, #16] 0x34182932: 7980 LDRB R0, [R0, #6] 0x34182934: 0780 LSLS R0, R0, #30 0x34182936: 2800 CMP R0, #0 0x34182938: D413 BMI 46L1 ; 0x34182962 0x3418293A: 9804 LDR R0, [SP, #16] 0x3418293C: 7980 LDRB R0, [R0, #6] 0x3418293E: 0740 LSLS R0, R0, #29 0x34182940: 2800 CMP R0, #0 0x34182942: D40E BMI 46L1 ; 0x34182962 0x34182944: 9804 LDR R0, [SP, #16] 0x34182946: 7980 LDRB R0, [R0, #6] 0x34182948: 06C0 LSLS R0, R0, #27 0x3418294A: 2800 CMP R0, #0 0x3418294C: D409 BMI 46L1 ; 0x34182962 0x3418294E: 9804 LDR R0, [SP, #16] 0x34182950: 7980 LDRB R0, [R0, #6] 0x34182952: 0700 LSLS R0, R0, #28 0x34182954: 2800 CMP R0, #0 0x34182956: D404 BMI 46L1 ; 0x34182962 0x34182958: 9804 LDR R0, [SP, #16] 0x3418295A: 7980 LDRB R0, [R0, #6] 0x3418295C: 0680 LSLS R0, R0, #26 0x3418295E: 2800 CMP R0, #0 0x34182960: D500 BPL 46L2 ; 0x34182964
.L1: 0x34182962: E006 B 46L3 ; 0x34182972
.L2: 0x34182964: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34182968: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x3418296C: 2188 MOVS R1, #136 0x3418296E: F00B F995 BL assert_failed ; 0x3418DC9C
.L3: 0x34182972: 9804 LDR R0, [SP, #16] 0x34182974: 78C0 LDRB R0, [R0, #3] 0x34182976: 0700 LSLS R0, R0, #28 0x34182978: 2800 CMP R0, #0 0x3418297A: F140 82B1 BPL.W 46L15 ; 0x34182EE0 0x3418297E: 9804 LDR R0, [SP, #16] 0x34182980: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182984: F5B0 7F80 CMP.W R0, #0x0100 0x34182988: F000 8248 BEQ.W 46L4 ; 0x34182E1C 0x3418298C: 9804 LDR R0, [SP, #16] 0x3418298E: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182992: F5B0 7F00 CMP.W R0, #0x0200 0x34182996: F000 8241 BEQ.W 46L4 ; 0x34182E1C 0x3418299A: 9804 LDR R0, [SP, #16] 0x3418299C: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x341829A0: F5B0 7F40 CMP.W R0, #0x0300 0x341829A4: F000 823A BEQ.W 46L4 ; 0x34182E1C 0x341829A8: 9804 LDR R0, [SP, #16] 0x341829AA: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x341829AE: F5B0 5F98 CMP.W R0, #0x1300 0x341829B2: F000 8233 BEQ.W 46L4 ; 0x34182E1C 0x341829B6: 9804 LDR R0, [SP, #16] 0x341829B8: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x341829BC: F5B0 5F0C CMP.W R0, #0x2300 0x341829C0: F000 822C BEQ.W 46L4 ; 0x34182E1C 0x341829C4: 9804 LDR R0, [SP, #16] 0x341829C6: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x341829CA: F5B0 5F4C CMP.W R0, #0x3300 0x341829CE: F000 8225 BEQ.W 46L4 ; 0x34182E1C 0x341829D2: 9804 LDR R0, [SP, #16] 0x341829D4: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x341829D8: F5B0 4F86 CMP.W R0, #0x4300 0x341829DC: F000 821E BEQ.W 46L4 ; 0x34182E1C 0x341829E0: 9804 LDR R0, [SP, #16] 0x341829E2: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x341829E6: F5B0 4FA6 CMP.W R0, #0x5300 0x341829EA: F000 8217 BEQ.W 46L4 ; 0x34182E1C 0x341829EE: 9804 LDR R0, [SP, #16] 0x341829F0: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x341829F4: F5B0 4FC6 CMP.W R0, #0x6300 0x341829F8: F000 8210 BEQ.W 46L4 ; 0x34182E1C 0x341829FC: 9804 LDR R0, [SP, #16] 0x341829FE: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182A02: F5B0 4FE6 CMP.W R0, #0x7300 0x34182A06: F000 8209 BEQ.W 46L4 ; 0x34182E1C 0x34182A0A: 9804 LDR R0, [SP, #16] 0x34182A0C: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182A10: F5B0 4F03 CMP.W R0, #0x8300 0x34182A14: F000 8202 BEQ.W 46L4 ; 0x34182E1C 0x34182A18: 9804 LDR R0, [SP, #16] 0x34182A1A: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182A1E: F5B0 4F13 CMP.W R0, #0x9300 0x34182A22: F000 81FB BEQ.W 46L4 ; 0x34182E1C 0x34182A26: 9804 LDR R0, [SP, #16] 0x34182A28: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182A2C: F5B0 4F23 CMP.W R0, #0xA300 0x34182A30: F000 81F4 BEQ.W 46L4 ; 0x34182E1C 0x34182A34: 9804 LDR R0, [SP, #16] 0x34182A36: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182A3A: F5B0 4F33 CMP.W R0, #0xB300 0x34182A3E: F000 81ED BEQ.W 46L4 ; 0x34182E1C 0x34182A42: 9804 LDR R0, [SP, #16] 0x34182A44: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182A48: F5B0 4F43 CMP.W R0, #0xC300 0x34182A4C: F000 81E6 BEQ.W 46L4 ; 0x34182E1C 0x34182A50: 9804 LDR R0, [SP, #16] 0x34182A52: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182A56: F5B0 4F53 CMP.W R0, #0xD300 0x34182A5A: F000 81DF BEQ.W 46L4 ; 0x34182E1C 0x34182A5E: 9804 LDR R0, [SP, #16] 0x34182A60: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182A64: F5B0 4F63 CMP.W R0, #0xE300 0x34182A68: F000 81D8 BEQ.W 46L4 ; 0x34182E1C 0x34182A6C: 9804 LDR R0, [SP, #16] 0x34182A6E: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182A72: F5B0 4F73 CMP.W R0, #0xF300 0x34182A76: F000 81D1 BEQ.W 46L4 ; 0x34182E1C 0x34182A7A: 9804 LDR R0, [SP, #16] 0x34182A7C: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182A80: F240 3100 MOVW R1, #0x0300 0x34182A84: F2C0 0101 MOVT R1, #1 0x34182A88: 4288 CMP R0, R1 0x34182A8A: F000 81C7 BEQ.W 46L4 ; 0x34182E1C 0x34182A8E: 9804 LDR R0, [SP, #16] 0x34182A90: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182A94: F241 3100 MOVW R1, #0x1300 0x34182A98: F2C0 0101 MOVT R1, #1 0x34182A9C: 4288 CMP R0, R1 0x34182A9E: F000 81BD BEQ.W 46L4 ; 0x34182E1C 0x34182AA2: 9804 LDR R0, [SP, #16] 0x34182AA4: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182AA8: F242 3100 MOVW R1, #0x2300 0x34182AAC: F2C0 0101 MOVT R1, #1 0x34182AB0: 4288 CMP R0, R1 0x34182AB2: F000 81B3 BEQ.W 46L4 ; 0x34182E1C 0x34182AB6: 9804 LDR R0, [SP, #16] 0x34182AB8: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182ABC: F243 3100 MOVW R1, #0x3300 0x34182AC0: F2C0 0101 MOVT R1, #1 0x34182AC4: 4288 CMP R0, R1 0x34182AC6: F000 81A9 BEQ.W 46L4 ; 0x34182E1C 0x34182ACA: 9804 LDR R0, [SP, #16] 0x34182ACC: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182AD0: F244 3100 MOVW R1, #0x4300 0x34182AD4: F2C0 0101 MOVT R1, #1 0x34182AD8: 4288 CMP R0, R1 0x34182ADA: F000 819F BEQ.W 46L4 ; 0x34182E1C 0x34182ADE: 9804 LDR R0, [SP, #16] 0x34182AE0: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182AE4: F245 3100 MOVW R1, #0x5300 0x34182AE8: F2C0 0101 MOVT R1, #1 0x34182AEC: 4288 CMP R0, R1 0x34182AEE: F000 8195 BEQ.W 46L4 ; 0x34182E1C 0x34182AF2: 9804 LDR R0, [SP, #16] 0x34182AF4: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182AF8: F246 3100 MOVW R1, #0x6300 0x34182AFC: F2C0 0101 MOVT R1, #1 0x34182B00: 4288 CMP R0, R1 0x34182B02: F000 818B BEQ.W 46L4 ; 0x34182E1C 0x34182B06: 9804 LDR R0, [SP, #16] 0x34182B08: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182B0C: F247 3100 MOVW R1, #0x7300 0x34182B10: F2C0 0101 MOVT R1, #1 0x34182B14: 4288 CMP R0, R1 0x34182B16: F000 8181 BEQ.W 46L4 ; 0x34182E1C 0x34182B1A: 9804 LDR R0, [SP, #16] 0x34182B1C: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182B20: F248 3100 MOVW R1, #0x8300 0x34182B24: F2C0 0101 MOVT R1, #1 0x34182B28: 4288 CMP R0, R1 0x34182B2A: F000 8177 BEQ.W 46L4 ; 0x34182E1C 0x34182B2E: 9804 LDR R0, [SP, #16] 0x34182B30: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182B34: F249 3100 MOVW R1, #0x9300 0x34182B38: F2C0 0101 MOVT R1, #1 0x34182B3C: 4288 CMP R0, R1 0x34182B3E: F000 816D BEQ.W 46L4 ; 0x34182E1C 0x34182B42: 9804 LDR R0, [SP, #16] 0x34182B44: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182B48: F24A 3100 MOVW R1, #0xA300 0x34182B4C: F2C0 0101 MOVT R1, #1 0x34182B50: 4288 CMP R0, R1 0x34182B52: F000 8163 BEQ.W 46L4 ; 0x34182E1C 0x34182B56: 9804 LDR R0, [SP, #16] 0x34182B58: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182B5C: F24B 3100 MOVW R1, #0xB300 0x34182B60: F2C0 0101 MOVT R1, #1 0x34182B64: 4288 CMP R0, R1 0x34182B66: F000 8159 BEQ.W 46L4 ; 0x34182E1C 0x34182B6A: 9804 LDR R0, [SP, #16] 0x34182B6C: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182B70: F24C 3100 MOVW R1, #0xC300 0x34182B74: F2C0 0101 MOVT R1, #1 0x34182B78: 4288 CMP R0, R1 0x34182B7A: F000 814F BEQ.W 46L4 ; 0x34182E1C 0x34182B7E: 9804 LDR R0, [SP, #16] 0x34182B80: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182B84: F24D 3100 MOVW R1, #0xD300 0x34182B88: F2C0 0101 MOVT R1, #1 0x34182B8C: 4288 CMP R0, R1 0x34182B8E: F000 8145 BEQ.W 46L4 ; 0x34182E1C 0x34182B92: 9804 LDR R0, [SP, #16] 0x34182B94: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182B98: F24E 3100 MOVW R1, #0xE300 0x34182B9C: F2C0 0101 MOVT R1, #1 0x34182BA0: 4288 CMP R0, R1 0x34182BA2: F000 813B BEQ.W 46L4 ; 0x34182E1C 0x34182BA6: 9804 LDR R0, [SP, #16] 0x34182BA8: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182BAC: F24F 3100 MOVW R1, #0xF300 0x34182BB0: F2C0 0101 MOVT R1, #1 0x34182BB4: 4288 CMP R0, R1 0x34182BB6: F000 8131 BEQ.W 46L4 ; 0x34182E1C 0x34182BBA: 9804 LDR R0, [SP, #16] 0x34182BBC: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182BC0: F240 3100 MOVW R1, #0x0300 0x34182BC4: F2C0 0102 MOVT R1, #2 0x34182BC8: 4288 CMP R0, R1 0x34182BCA: F000 8127 BEQ.W 46L4 ; 0x34182E1C 0x34182BCE: 9804 LDR R0, [SP, #16] 0x34182BD0: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182BD4: F241 3100 MOVW R1, #0x1300 0x34182BD8: F2C0 0102 MOVT R1, #2 0x34182BDC: 4288 CMP R0, R1 0x34182BDE: F000 811D BEQ.W 46L4 ; 0x34182E1C 0x34182BE2: 9804 LDR R0, [SP, #16] 0x34182BE4: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182BE8: F242 3100 MOVW R1, #0x2300 0x34182BEC: F2C0 0102 MOVT R1, #2 0x34182BF0: 4288 CMP R0, R1 0x34182BF2: F000 8113 BEQ.W 46L4 ; 0x34182E1C 0x34182BF6: 9804 LDR R0, [SP, #16] 0x34182BF8: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182BFC: F243 3100 MOVW R1, #0x3300 0x34182C00: F2C0 0102 MOVT R1, #2 0x34182C04: 4288 CMP R0, R1 0x34182C06: F000 8109 BEQ.W 46L4 ; 0x34182E1C 0x34182C0A: 9804 LDR R0, [SP, #16] 0x34182C0C: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182C10: F244 3100 MOVW R1, #0x4300 0x34182C14: F2C0 0102 MOVT R1, #2 0x34182C18: 4288 CMP R0, R1 0x34182C1A: F000 80FF BEQ.W 46L4 ; 0x34182E1C 0x34182C1E: 9804 LDR R0, [SP, #16] 0x34182C20: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182C24: F245 3100 MOVW R1, #0x5300 0x34182C28: F2C0 0102 MOVT R1, #2 0x34182C2C: 4288 CMP R0, R1 0x34182C2E: F000 80F5 BEQ.W 46L4 ; 0x34182E1C 0x34182C32: 9804 LDR R0, [SP, #16] 0x34182C34: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182C38: F246 3100 MOVW R1, #0x6300 0x34182C3C: F2C0 0102 MOVT R1, #2 0x34182C40: 4288 CMP R0, R1 0x34182C42: F000 80EB BEQ.W 46L4 ; 0x34182E1C 0x34182C46: 9804 LDR R0, [SP, #16] 0x34182C48: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182C4C: F247 3100 MOVW R1, #0x7300 0x34182C50: F2C0 0102 MOVT R1, #2 0x34182C54: 4288 CMP R0, R1 0x34182C56: F000 80E1 BEQ.W 46L4 ; 0x34182E1C 0x34182C5A: 9804 LDR R0, [SP, #16] 0x34182C5C: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182C60: F248 3100 MOVW R1, #0x8300 0x34182C64: F2C0 0102 MOVT R1, #2 0x34182C68: 4288 CMP R0, R1 0x34182C6A: F000 80D7 BEQ.W 46L4 ; 0x34182E1C 0x34182C6E: 9804 LDR R0, [SP, #16] 0x34182C70: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182C74: F249 3100 MOVW R1, #0x9300 0x34182C78: F2C0 0102 MOVT R1, #2 0x34182C7C: 4288 CMP R0, R1 0x34182C7E: F000 80CD BEQ.W 46L4 ; 0x34182E1C 0x34182C82: 9804 LDR R0, [SP, #16] 0x34182C84: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182C88: F24A 3100 MOVW R1, #0xA300 0x34182C8C: F2C0 0102 MOVT R1, #2 0x34182C90: 4288 CMP R0, R1 0x34182C92: F000 80C3 BEQ.W 46L4 ; 0x34182E1C 0x34182C96: 9804 LDR R0, [SP, #16] 0x34182C98: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182C9C: F24B 3100 MOVW R1, #0xB300 0x34182CA0: F2C0 0102 MOVT R1, #2 0x34182CA4: 4288 CMP R0, R1 0x34182CA6: F000 80B9 BEQ.W 46L4 ; 0x34182E1C 0x34182CAA: 9804 LDR R0, [SP, #16] 0x34182CAC: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182CB0: F24C 3100 MOVW R1, #0xC300 0x34182CB4: F2C0 0102 MOVT R1, #2 0x34182CB8: 4288 CMP R0, R1 0x34182CBA: F000 80AF BEQ.W 46L4 ; 0x34182E1C 0x34182CBE: 9804 LDR R0, [SP, #16] 0x34182CC0: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182CC4: F24D 3100 MOVW R1, #0xD300 0x34182CC8: F2C0 0102 MOVT R1, #2 0x34182CCC: 4288 CMP R0, R1 0x34182CCE: F000 80A5 BEQ.W 46L4 ; 0x34182E1C 0x34182CD2: 9804 LDR R0, [SP, #16] 0x34182CD4: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182CD8: F24E 3100 MOVW R1, #0xE300 0x34182CDC: F2C0 0102 MOVT R1, #2 0x34182CE0: 4288 CMP R0, R1 0x34182CE2: F000 809B BEQ.W 46L4 ; 0x34182E1C 0x34182CE6: 9804 LDR R0, [SP, #16] 0x34182CE8: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182CEC: F24F 3100 MOVW R1, #0xF300 0x34182CF0: F2C0 0102 MOVT R1, #2 0x34182CF4: 4288 CMP R0, R1 0x34182CF6: F000 8091 BEQ.W 46L4 ; 0x34182E1C 0x34182CFA: 9804 LDR R0, [SP, #16] 0x34182CFC: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182D00: F240 3100 MOVW R1, #0x0300 0x34182D04: F2C0 0103 MOVT R1, #3 0x34182D08: 4288 CMP R0, R1 0x34182D0A: F000 8087 BEQ.W 46L4 ; 0x34182E1C 0x34182D0E: 9804 LDR R0, [SP, #16] 0x34182D10: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182D14: F241 3100 MOVW R1, #0x1300 0x34182D18: F2C0 0103 MOVT R1, #3 0x34182D1C: 4288 CMP R0, R1 0x34182D1E: D07D BEQ 46L4 ; 0x34182E1C 0x34182D20: 9804 LDR R0, [SP, #16] 0x34182D22: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182D26: F242 3100 MOVW R1, #0x2300 0x34182D2A: F2C0 0103 MOVT R1, #3 0x34182D2E: 4288 CMP R0, R1 0x34182D30: D074 BEQ 46L4 ; 0x34182E1C 0x34182D32: 9804 LDR R0, [SP, #16] 0x34182D34: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182D38: F243 3100 MOVW R1, #0x3300 0x34182D3C: F2C0 0103 MOVT R1, #3 0x34182D40: 4288 CMP R0, R1 0x34182D42: D06B BEQ 46L4 ; 0x34182E1C 0x34182D44: 9804 LDR R0, [SP, #16] 0x34182D46: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182D4A: F244 3100 MOVW R1, #0x4300 0x34182D4E: F2C0 0103 MOVT R1, #3 0x34182D52: 4288 CMP R0, R1 0x34182D54: D062 BEQ 46L4 ; 0x34182E1C 0x34182D56: 9804 LDR R0, [SP, #16] 0x34182D58: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182D5C: F245 3100 MOVW R1, #0x5300 0x34182D60: F2C0 0103 MOVT R1, #3 0x34182D64: 4288 CMP R0, R1 0x34182D66: D059 BEQ 46L4 ; 0x34182E1C 0x34182D68: 9804 LDR R0, [SP, #16] 0x34182D6A: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182D6E: F246 3100 MOVW R1, #0x6300 0x34182D72: F2C0 0103 MOVT R1, #3 0x34182D76: 4288 CMP R0, R1 0x34182D78: D050 BEQ 46L4 ; 0x34182E1C 0x34182D7A: 9804 LDR R0, [SP, #16] 0x34182D7C: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182D80: F247 3100 MOVW R1, #0x7300 0x34182D84: F2C0 0103 MOVT R1, #3 0x34182D88: 4288 CMP R0, R1 0x34182D8A: D047 BEQ 46L4 ; 0x34182E1C 0x34182D8C: 9804 LDR R0, [SP, #16] 0x34182D8E: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182D92: F248 3100 MOVW R1, #0x8300 0x34182D96: F2C0 0103 MOVT R1, #3 0x34182D9A: 4288 CMP R0, R1 0x34182D9C: D03E BEQ 46L4 ; 0x34182E1C 0x34182D9E: 9804 LDR R0, [SP, #16] 0x34182DA0: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182DA4: F249 3100 MOVW R1, #0x9300 0x34182DA8: F2C0 0103 MOVT R1, #3 0x34182DAC: 4288 CMP R0, R1 0x34182DAE: D035 BEQ 46L4 ; 0x34182E1C 0x34182DB0: 9804 LDR R0, [SP, #16] 0x34182DB2: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182DB6: F24A 3100 MOVW R1, #0xA300 0x34182DBA: F2C0 0103 MOVT R1, #3 0x34182DBE: 4288 CMP R0, R1 0x34182DC0: D02C BEQ 46L4 ; 0x34182E1C 0x34182DC2: 9804 LDR R0, [SP, #16] 0x34182DC4: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182DC8: F24B 3100 MOVW R1, #0xB300 0x34182DCC: F2C0 0103 MOVT R1, #3 0x34182DD0: 4288 CMP R0, R1 0x34182DD2: D023 BEQ 46L4 ; 0x34182E1C 0x34182DD4: 9804 LDR R0, [SP, #16] 0x34182DD6: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182DDA: F24C 3100 MOVW R1, #0xC300 0x34182DDE: F2C0 0103 MOVT R1, #3 0x34182DE2: 4288 CMP R0, R1 0x34182DE4: D01A BEQ 46L4 ; 0x34182E1C 0x34182DE6: 9804 LDR R0, [SP, #16] 0x34182DE8: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182DEC: F24D 3100 MOVW R1, #0xD300 0x34182DF0: F2C0 0103 MOVT R1, #3 0x34182DF4: 4288 CMP R0, R1 0x34182DF6: D011 BEQ 46L4 ; 0x34182E1C 0x34182DF8: 9804 LDR R0, [SP, #16] 0x34182DFA: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182DFE: F24E 3100 MOVW R1, #0xE300 0x34182E02: F2C0 0103 MOVT R1, #3 0x34182E06: 4288 CMP R0, R1 0x34182E08: D008 BEQ 46L4 ; 0x34182E1C 0x34182E0A: 9804 LDR R0, [SP, #16] 0x34182E0C: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182E10: F24F 3100 MOVW R1, #0xF300 0x34182E14: F2C0 0103 MOVT R1, #3 0x34182E18: 4288 CMP R0, R1 0x34182E1A: D100 BNE 46L5 ; 0x34182E1E
.L4: 0x34182E1C: E006 B 46L6 ; 0x34182E2C
.L5: 0x34182E1E: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34182E22: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34182E26: 218E MOVS R1, #142 0x34182E28: F00A FF38 BL assert_failed ; 0x3418DC9C
.L6: 0x34182E2C: F005 FBBC BL LL_RCC_GetRTCClockSource ; 0x341885A8 0x34182E30: 9003 STR R0, [SP, #12] 0x34182E32: 9803 LDR R0, [SP, #12] 0x34182E34: B1B0 CBZ R0, .L7 ; 0x34182E64 0x34182E36: 9803 LDR R0, [SP, #12] 0x34182E38: 9904 LDR R1, [SP, #16] 0x34182E3A: F8D1 1188 LDR.W R1, [R1, #0x0188] 0x34182E3E: F401 7140 AND R1, R1, #0x0300 0x34182E42: 4288 CMP R0, R1 0x34182E44: D00E BEQ 46L7 ; 0x34182E64 0x34182E46: F644 002C MOVW R0, #0x482C 0x34182E4A: F2C5 6002 MOVT R0, #0x5602 0x34182E4E: 6801 LDR R1, [R0] 0x34182E50: F041 0101 ORR R1, R1, #1 0x34182E54: 6001 STR R1, [R0] 0x34182E56: 6800 LDR R0, [R0] 0x34182E58: 07C0 LSLS R0, R0, #31 0x34182E5A: B918 CBNZ R0, .L7 ; 0x34182E64 0x34182E5C: 2001 MOVS R0, #1 0x34182E5E: F88D 0007 STRB.W R0, [SP, #7] 0x34182E62: E7FF B 46L7 ; 0x34182E64
.L7: 0x34182E64: F89D 0007 LDRB.W R0, [SP, #7] 0x34182E68: BBB0 CBNZ R0, .L14 ; 0x34182ED8 0x34182E6A: 9804 LDR R0, [SP, #16] 0x34182E6C: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182E70: F5B0 7F80 CMP.W R0, #0x0100 0x34182E74: D112 BNE 46L10 ; 0x34182E9C 0x34182E76: F7FE FD09 BL HAL_GetTick ; 0x3418188C 0x34182E7A: 9002 STR R0, [SP, #8]
.L8: 0x34182E7C: F005 FB9C BL LL_RCC_LSE_IsReady.59 ; 0x341885B8 0x34182E80: B960 CBNZ R0, .L10 ; 0x34182E9C 0x34182E82: F7FE FD03 BL HAL_GetTick ; 0x3418188C 0x34182E86: 9902 LDR R1, [SP, #8] 0x34182E88: 1A40 SUBS R0, R0, R1 0x34182E8A: F241 3189 MOVW R1, #0x1389 0x34182E8E: 4288 CMP R0, R1 0x34182E90: D303 BCC 46L9 ; 0x34182E9A 0x34182E92: 2003 MOVS R0, #3 0x34182E94: F88D 0007 STRB.W R0, [SP, #7] 0x34182E98: E000 B 46L10 ; 0x34182E9C
.L9: 0x34182E9A: E7EF B 46L8 ; 0x34182E7C
.L10: 0x34182E9C: F89D 0007 LDRB.W R0, [SP, #7] 0x34182EA0: B9A8 CBNZ R0, .L12 ; 0x34182ECE 0x34182EA2: 9804 LDR R0, [SP, #16] 0x34182EA4: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182EA8: 43C0 MVNS R0, R0 0x34182EAA: F410 7F40 TST R0, #0x0300 0x34182EAE: D106 BNE 46L11 ; 0x34182EBE 0x34182EB0: 9804 LDR R0, [SP, #16] 0x34182EB2: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182EB6: F420 7040 BIC R0, R0, #0x0300 0x34182EBA: F005 FB85 BL LL_RCC_SetRTC_HSEPrescaler ; 0x341885C8
.L11: 0x34182EBE: 9804 LDR R0, [SP, #16] 0x34182EC0: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182EC4: F400 7040 AND R0, R0, #0x0300 0x34182EC8: F005 FB8C BL LL_RCC_SetRTCClockSource ; 0x341885E4 0x34182ECC: E003 B 46L13 ; 0x34182ED6
.L12: 0x34182ECE: F89D 0007 LDRB.W R0, [SP, #7] 0x34182ED2: F88D 0006 STRB.W R0, [SP, #6]
.L13: 0x34182ED6: E003 B 46L15 ; 0x34182EE0
.L14: 0x34182ED8: F89D 0007 LDRB.W R0, [SP, #7] 0x34182EDC: F88D 0006 STRB.W R0, [SP, #6]
.L15: 0x34182EE0: 9804 LDR R0, [SP, #16] 0x34182EE2: 7800 LDRB R0, [R0] 0x34182EE4: 0740 LSLS R0, R0, #29 0x34182EE6: 2800 CMP R0, #0 0x34182EE8: F140 81AE BPL.W 46L49 ; 0x34183248 0x34182EEC: 9804 LDR R0, [SP, #16] 0x34182EEE: F8D0 00B8 LDR.W R0, [R0, #184] 0x34182EF2: B310 CBZ R0, .L16 ; 0x34182F3A 0x34182EF4: 9804 LDR R0, [SP, #16] 0x34182EF6: F8D0 00B8 LDR.W R0, [R0, #184] 0x34182EFA: 2801 CMP R0, #1 0x34182EFC: D01D BEQ 46L16 ; 0x34182F3A 0x34182EFE: 9804 LDR R0, [SP, #16] 0x34182F00: F8D0 00B8 LDR.W R0, [R0, #184] 0x34182F04: 2802 CMP R0, #2 0x34182F06: D018 BEQ 46L16 ; 0x34182F3A 0x34182F08: 9804 LDR R0, [SP, #16] 0x34182F0A: F8D0 00B8 LDR.W R0, [R0, #184] 0x34182F0E: 2803 CMP R0, #3 0x34182F10: D013 BEQ 46L16 ; 0x34182F3A 0x34182F12: 9804 LDR R0, [SP, #16] 0x34182F14: F8D0 00B8 LDR.W R0, [R0, #184] 0x34182F18: 2804 CMP R0, #4 0x34182F1A: D00E BEQ 46L16 ; 0x34182F3A 0x34182F1C: 9804 LDR R0, [SP, #16] 0x34182F1E: F8D0 00B8 LDR.W R0, [R0, #184] 0x34182F22: 2805 CMP R0, #5 0x34182F24: D009 BEQ 46L16 ; 0x34182F3A 0x34182F26: 9804 LDR R0, [SP, #16] 0x34182F28: F8D0 00B8 LDR.W R0, [R0, #184] 0x34182F2C: 2806 CMP R0, #6 0x34182F2E: D004 BEQ 46L16 ; 0x34182F3A 0x34182F30: 9804 LDR R0, [SP, #16] 0x34182F32: F8D0 00B8 LDR.W R0, [R0, #184] 0x34182F36: 2807 CMP R0, #7 0x34182F38: D100 BNE 46L17 ; 0x34182F3C
.L16: 0x34182F3A: E006 B 46L18 ; 0x34182F4A
.L17: 0x34182F3C: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34182F40: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34182F44: 21D4 MOVS R1, #212 0x34182F46: F00A FEA9 BL assert_failed ; 0x3418DC9C
.L18: 0x34182F4A: 9804 LDR R0, [SP, #16] 0x34182F4C: F8D0 00B8 LDR.W R0, [R0, #184] 0x34182F50: 2804 CMP R0, #4 0x34182F52: D142 BNE 46L24 ; 0x34182FDA 0x34182F54: 9804 LDR R0, [SP, #16] 0x34182F56: 6A80 LDR R0, [R0, #40] 0x34182F58: B170 CBZ R0, .L19 ; 0x34182F78 0x34182F5A: 9804 LDR R0, [SP, #16] 0x34182F5C: 6A80 LDR R0, [R0, #40] 0x34182F5E: F1B0 5F80 CMP.W R0, #0x10000000 0x34182F62: D009 BEQ 46L19 ; 0x34182F78 0x34182F64: 9804 LDR R0, [SP, #16] 0x34182F66: 6A80 LDR R0, [R0, #40] 0x34182F68: F1B0 5F00 CMP.W R0, #0x20000000 0x34182F6C: D004 BEQ 46L19 ; 0x34182F78 0x34182F6E: 9804 LDR R0, [SP, #16] 0x34182F70: 6A80 LDR R0, [R0, #40] 0x34182F72: F1B0 5F40 CMP.W R0, #0x30000000 0x34182F76: D100 BNE 46L20 ; 0x34182F7A
.L19: 0x34182F78: E006 B 46L21 ; 0x34182F88
.L20: 0x34182F7A: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34182F7E: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34182F82: 21D9 MOVS R1, #217 0x34182F84: F00A FE8A BL assert_failed ; 0x3418DC9C
.L21: 0x34182F88: 9804 LDR R0, [SP, #16] 0x34182F8A: 6AC0 LDR R0, [R0, #44] 0x34182F8C: B128 CBZ R0, .L22 ; 0x34182F9A 0x34182F8E: 9804 LDR R0, [SP, #16] 0x34182F90: 6AC0 LDR R0, [R0, #44] 0x34182F92: F5B0 7F80 CMP.W R0, #0x0100 0x34182F96: D800 BHI 46L22 ; 0x34182F9A 0x34182F98: E006 B 46L23 ; 0x34182FA8
.L22: 0x34182F9A: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34182F9E: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34182FA2: 21DA MOVS R1, #218 0x34182FA4: F00A FE7A BL assert_failed ; 0x3418DC9C
.L23: 0x34182FA8: F248 01D4 MOVW R1, #0x80D4 0x34182FAC: F2C5 6102 MOVT R1, #0x5602 0x34182FB0: 6808 LDR R0, [R1] 0x34182FB2: F64F 72FF MOVW R2, #0xFFFF 0x34182FB6: F6CC 7200 MOVT R2, #0xCF00 0x34182FBA: 4010 ANDS R0, R2 0x34182FBC: 9B04 LDR R3, [SP, #16] 0x34182FBE: 6A9A LDR R2, [R3, #40] 0x34182FC0: F8D3 C02C LDR.W R12, [R3, #44] 0x34182FC4: 2300 MOVS R3, #0 0x34182FC6: F6CF 73FF MOVT R3, #0xFFFF 0x34182FCA: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34182FCE: 431A ORRS R2, R3 0x34182FD0: 4310 ORRS R0, R2 0x34182FD2: 6008 STR R0, [R1] 0x34182FD4: F00D F92C BL LL_RCC_IC5_Enable.60 ; 0x34190230 0x34182FD8: E131 B 46L48 ; 0x3418323E
.L24: 0x34182FDA: 9804 LDR R0, [SP, #16] 0x34182FDC: F8D0 00B8 LDR.W R0, [R0, #184] 0x34182FE0: 2805 CMP R0, #5 0x34182FE2: D142 BNE 46L30 ; 0x3418306A 0x34182FE4: 9804 LDR R0, [SP, #16] 0x34182FE6: 6D00 LDR R0, [R0, #80] 0x34182FE8: B170 CBZ R0, .L25 ; 0x34183008 0x34182FEA: 9804 LDR R0, [SP, #16] 0x34182FEC: 6D00 LDR R0, [R0, #80] 0x34182FEE: F1B0 5F80 CMP.W R0, #0x10000000 0x34182FF2: D009 BEQ 46L25 ; 0x34183008 0x34182FF4: 9804 LDR R0, [SP, #16] 0x34182FF6: 6D00 LDR R0, [R0, #80] 0x34182FF8: F1B0 5F00 CMP.W R0, #0x20000000 0x34182FFC: D004 BEQ 46L25 ; 0x34183008 0x34182FFE: 9804 LDR R0, [SP, #16] 0x34183000: 6D00 LDR R0, [R0, #80] 0x34183002: F1B0 5F40 CMP.W R0, #0x30000000 0x34183006: D100 BNE 46L26 ; 0x3418300A
.L25: 0x34183008: E006 B 46L27 ; 0x34183018
.L26: 0x3418300A: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x3418300E: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34183012: 21E6 MOVS R1, #230 0x34183014: F00A FE42 BL assert_failed ; 0x3418DC9C
.L27: 0x34183018: 9804 LDR R0, [SP, #16] 0x3418301A: 6D40 LDR R0, [R0, #84] 0x3418301C: B128 CBZ R0, .L28 ; 0x3418302A 0x3418301E: 9804 LDR R0, [SP, #16] 0x34183020: 6D40 LDR R0, [R0, #84] 0x34183022: F5B0 7F80 CMP.W R0, #0x0100 0x34183026: D800 BHI 46L28 ; 0x3418302A 0x34183028: E006 B 46L29 ; 0x34183038
.L28: 0x3418302A: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x3418302E: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34183032: 21E7 MOVS R1, #231 0x34183034: F00A FE32 BL assert_failed ; 0x3418DC9C
.L29: 0x34183038: F248 01E8 MOVW R1, #0x80E8 0x3418303C: F2C5 6102 MOVT R1, #0x5602 0x34183040: 6808 LDR R0, [R1] 0x34183042: F64F 72FF MOVW R2, #0xFFFF 0x34183046: F6CC 7200 MOVT R2, #0xCF00 0x3418304A: 4010 ANDS R0, R2 0x3418304C: 9B04 LDR R3, [SP, #16] 0x3418304E: 6D1A LDR R2, [R3, #80] 0x34183050: F8D3 C054 LDR.W R12, [R3, #84] 0x34183054: 2300 MOVS R3, #0 0x34183056: F6CF 73FF MOVT R3, #0xFFFF 0x3418305A: EB03 430C ADD.W R3, R3, R12, LSL #16 0x3418305E: 431A ORRS R2, R3 0x34183060: 4310 ORRS R0, R2 0x34183062: 6008 STR R0, [R1] 0x34183064: F005 FACC BL LL_RCC_IC10_Enable.61 ; 0x34188600 0x34183068: E0E9 B 46L48 ; 0x3418323E
.L30: 0x3418306A: 9804 LDR R0, [SP, #16] 0x3418306C: F8D0 00B8 LDR.W R0, [R0, #184] 0x34183070: 2806 CMP R0, #6 0x34183072: D142 BNE 46L36 ; 0x341830FA 0x34183074: 9804 LDR R0, [SP, #16] 0x34183076: 6F80 LDR R0, [R0, #120] 0x34183078: B170 CBZ R0, .L31 ; 0x34183098 0x3418307A: 9804 LDR R0, [SP, #16] 0x3418307C: 6F80 LDR R0, [R0, #120] 0x3418307E: F1B0 5F80 CMP.W R0, #0x10000000 0x34183082: D009 BEQ 46L31 ; 0x34183098 0x34183084: 9804 LDR R0, [SP, #16] 0x34183086: 6F80 LDR R0, [R0, #120] 0x34183088: F1B0 5F00 CMP.W R0, #0x20000000 0x3418308C: D004 BEQ 46L31 ; 0x34183098 0x3418308E: 9804 LDR R0, [SP, #16] 0x34183090: 6F80 LDR R0, [R0, #120] 0x34183092: F1B0 5F40 CMP.W R0, #0x30000000 0x34183096: D100 BNE 46L32 ; 0x3418309A
.L31: 0x34183098: E006 B 46L33 ; 0x341830A8
.L32: 0x3418309A: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x3418309E: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341830A2: 21F3 MOVS R1, #243 0x341830A4: F00A FDFA BL assert_failed ; 0x3418DC9C
.L33: 0x341830A8: 9804 LDR R0, [SP, #16] 0x341830AA: 6FC0 LDR R0, [R0, #124] 0x341830AC: B128 CBZ R0, .L34 ; 0x341830BA 0x341830AE: 9804 LDR R0, [SP, #16] 0x341830B0: 6FC0 LDR R0, [R0, #124] 0x341830B2: F5B0 7F80 CMP.W R0, #0x0100 0x341830B6: D800 BHI 46L34 ; 0x341830BA 0x341830B8: E006 B 46L35 ; 0x341830C8
.L34: 0x341830BA: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341830BE: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341830C2: 21F4 MOVS R1, #244 0x341830C4: F00A FDEA BL assert_failed ; 0x3418DC9C
.L35: 0x341830C8: F248 01FC MOVW R1, #0x80FC 0x341830CC: F2C5 6102 MOVT R1, #0x5602 0x341830D0: 6808 LDR R0, [R1] 0x341830D2: F64F 72FF MOVW R2, #0xFFFF 0x341830D6: F6CC 7200 MOVT R2, #0xCF00 0x341830DA: 4010 ANDS R0, R2 0x341830DC: 9B04 LDR R3, [SP, #16] 0x341830DE: 6F9A LDR R2, [R3, #120] 0x341830E0: F8D3 C07C LDR.W R12, [R3, #124] 0x341830E4: 2300 MOVS R3, #0 0x341830E6: F6CF 73FF MOVT R3, #0xFFFF 0x341830EA: EB03 430C ADD.W R3, R3, R12, LSL #16 0x341830EE: 431A ORRS R2, R3 0x341830F0: 4310 ORRS R0, R2 0x341830F2: 6008 STR R0, [R1] 0x341830F4: F005 FA8C BL LL_RCC_IC15_Enable.62 ; 0x34188610 0x341830F8: E0A1 B 46L48 ; 0x3418323E
.L36: 0x341830FA: 9804 LDR R0, [SP, #16] 0x341830FC: F8D0 00B8 LDR.W R0, [R0, #184] 0x34183100: 2803 CMP R0, #3 0x34183102: D14B BNE 46L42 ; 0x3418319C 0x34183104: 9804 LDR R0, [SP, #16] 0x34183106: F8D0 0098 LDR.W R0, [R0, #152] 0x3418310A: B188 CBZ R0, .L37 ; 0x34183130 0x3418310C: 9804 LDR R0, [SP, #16] 0x3418310E: F8D0 0098 LDR.W R0, [R0, #152] 0x34183112: F1B0 5F80 CMP.W R0, #0x10000000 0x34183116: D00B BEQ 46L37 ; 0x34183130 0x34183118: 9804 LDR R0, [SP, #16] 0x3418311A: F8D0 0098 LDR.W R0, [R0, #152] 0x3418311E: F1B0 5F00 CMP.W R0, #0x20000000 0x34183122: D005 BEQ 46L37 ; 0x34183130 0x34183124: 9804 LDR R0, [SP, #16] 0x34183126: F8D0 0098 LDR.W R0, [R0, #152] 0x3418312A: F1B0 5F40 CMP.W R0, #0x30000000 0x3418312E: D100 BNE 46L38 ; 0x34183132
.L37: 0x34183130: E007 B 46L39 ; 0x34183142
.L38: 0x34183132: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34183136: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x3418313A: F44F 7180 MOV.W R1, #0x0100 0x3418313E: F00A FDAD BL assert_failed ; 0x3418DC9C
.L39: 0x34183142: 9804 LDR R0, [SP, #16] 0x34183144: F8D0 009C LDR.W R0, [R0, #156] 0x34183148: B130 CBZ R0, .L40 ; 0x34183158 0x3418314A: 9804 LDR R0, [SP, #16] 0x3418314C: F8D0 009C LDR.W R0, [R0, #156] 0x34183150: F5B0 7F80 CMP.W R0, #0x0100 0x34183154: D800 BHI 46L40 ; 0x34183158 0x34183156: E007 B 46L41 ; 0x34183168
.L40: 0x34183158: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x3418315C: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34183160: F240 1101 MOVW R1, #0x0101 0x34183164: F00A FD9A BL assert_failed ; 0x3418DC9C
.L41: 0x34183168: F248 110C MOVW R1, #0x810C 0x3418316C: F2C5 6102 MOVT R1, #0x5602 0x34183170: 6808 LDR R0, [R1] 0x34183172: F64F 72FF MOVW R2, #0xFFFF 0x34183176: F6CC 7200 MOVT R2, #0xCF00 0x3418317A: 4010 ANDS R0, R2 0x3418317C: 9B04 LDR R3, [SP, #16] 0x3418317E: F8D3 2098 LDR.W R2, [R3, #152] 0x34183182: F8D3 C09C LDR.W R12, [R3, #156] 0x34183186: 2300 MOVS R3, #0 0x34183188: F6CF 73FF MOVT R3, #0xFFFF 0x3418318C: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34183190: 431A ORRS R2, R3 0x34183192: 4310 ORRS R0, R2 0x34183194: 6008 STR R0, [R1] 0x34183196: F005 FA43 BL LL_RCC_IC19_Enable ; 0x34188620 0x3418319A: E050 B 46L48 ; 0x3418323E
.L42: 0x3418319C: 9804 LDR R0, [SP, #16] 0x3418319E: F8D0 00B8 LDR.W R0, [R0, #184] 0x341831A2: 2807 CMP R0, #7 0x341831A4: D14B BNE 46L48 ; 0x3418323E 0x341831A6: 9804 LDR R0, [SP, #16] 0x341831A8: F8D0 00A0 LDR.W R0, [R0, #160] 0x341831AC: B188 CBZ R0, .L43 ; 0x341831D2 0x341831AE: 9804 LDR R0, [SP, #16] 0x341831B0: F8D0 00A0 LDR.W R0, [R0, #160] 0x341831B4: F1B0 5F80 CMP.W R0, #0x10000000 0x341831B8: D00B BEQ 46L43 ; 0x341831D2 0x341831BA: 9804 LDR R0, [SP, #16] 0x341831BC: F8D0 00A0 LDR.W R0, [R0, #160] 0x341831C0: F1B0 5F00 CMP.W R0, #0x20000000 0x341831C4: D005 BEQ 46L43 ; 0x341831D2 0x341831C6: 9804 LDR R0, [SP, #16] 0x341831C8: F8D0 00A0 LDR.W R0, [R0, #160] 0x341831CC: F1B0 5F40 CMP.W R0, #0x30000000 0x341831D0: D100 BNE 46L44 ; 0x341831D4
.L43: 0x341831D2: E007 B 46L45 ; 0x341831E4
.L44: 0x341831D4: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341831D8: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341831DC: F240 110D MOVW R1, #0x010D 0x341831E0: F00A FD5C BL assert_failed ; 0x3418DC9C
.L45: 0x341831E4: 9804 LDR R0, [SP, #16] 0x341831E6: F8D0 00A4 LDR.W R0, [R0, #164] 0x341831EA: B130 CBZ R0, .L46 ; 0x341831FA 0x341831EC: 9804 LDR R0, [SP, #16] 0x341831EE: F8D0 00A4 LDR.W R0, [R0, #164] 0x341831F2: F5B0 7F80 CMP.W R0, #0x0100 0x341831F6: D800 BHI 46L46 ; 0x341831FA 0x341831F8: E007 B 46L47 ; 0x3418320A
.L46: 0x341831FA: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341831FE: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34183202: F44F 7187 MOV.W R1, #0x010E 0x34183206: F00A FD49 BL assert_failed ; 0x3418DC9C
.L47: 0x3418320A: F248 1110 MOVW R1, #0x8110 0x3418320E: F2C5 6102 MOVT R1, #0x5602 0x34183212: 6808 LDR R0, [R1] 0x34183214: F64F 72FF MOVW R2, #0xFFFF 0x34183218: F6CC 7200 MOVT R2, #0xCF00 0x3418321C: 4010 ANDS R0, R2 0x3418321E: 9B04 LDR R3, [SP, #16] 0x34183220: F8D3 20A0 LDR.W R2, [R3, #160] 0x34183224: F8D3 C0A4 LDR.W R12, [R3, #164] 0x34183228: 2300 MOVS R3, #0 0x3418322A: F6CF 73FF MOVT R3, #0xFFFF 0x3418322E: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34183232: 431A ORRS R2, R3 0x34183234: 4310 ORRS R0, R2 0x34183236: 6008 STR R0, [R1] 0x34183238: F005 F9FA BL LL_RCC_IC20_Enable.63 ; 0x34188630 0x3418323C: E7FF B 46L48 ; 0x3418323E
.L48: 0x3418323E: 9804 LDR R0, [SP, #16] 0x34183240: F8D0 00B8 LDR.W R0, [R0, #184] 0x34183244: F005 F9FC BL LL_RCC_SetCLKPClockSource ; 0x34188640
.L49: 0x34183248: 9804 LDR R0, [SP, #16] 0x3418324A: 7980 LDRB R0, [R0, #6] 0x3418324C: 0640 LSLS R0, R0, #25 0x3418324E: 2800 CMP R0, #0 0x34183250: F140 80D3 BPL.W 46L66 ; 0x341833FA 0x34183254: 9804 LDR R0, [SP, #16] 0x34183256: F8D0 00AC LDR.W R0, [R0, #172] 0x3418325A: 2114 MOVS R1, #20 0x3418325C: F2C0 3100 MOVT R1, #0x0300 0x34183260: 4288 CMP R0, R1 0x34183262: D017 BEQ 46L50 ; 0x34183294 0x34183264: 9804 LDR R0, [SP, #16] 0x34183266: F8D0 00AC LDR.W R0, [R0, #172] 0x3418326A: 2114 MOVS R1, #20 0x3418326C: F2C0 3101 MOVT R1, #0x0301 0x34183270: 4288 CMP R0, R1 0x34183272: D00F BEQ 46L50 ; 0x34183294 0x34183274: 9804 LDR R0, [SP, #16] 0x34183276: F8D0 00AC LDR.W R0, [R0, #172] 0x3418327A: 2114 MOVS R1, #20 0x3418327C: F2C0 3102 MOVT R1, #0x0302 0x34183280: 4288 CMP R0, R1 0x34183282: D007 BEQ 46L50 ; 0x34183294 0x34183284: 9804 LDR R0, [SP, #16] 0x34183286: F8D0 00AC LDR.W R0, [R0, #172] 0x3418328A: 2114 MOVS R1, #20 0x3418328C: F2C0 3103 MOVT R1, #0x0303 0x34183290: 4288 CMP R0, R1 0x34183292: D100 BNE 46L51 ; 0x34183296
.L50: 0x34183294: E007 B 46L52 ; 0x341832A6
.L51: 0x34183296: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x3418329A: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x3418329E: F44F 7192 MOV.W R1, #0x0124 0x341832A2: F00A FCFB BL assert_failed ; 0x3418DC9C
.L52: 0x341832A6: 9804 LDR R0, [SP, #16] 0x341832A8: F8D0 00AC LDR.W R0, [R0, #172] 0x341832AC: 2114 MOVS R1, #20 0x341832AE: F2C0 3102 MOVT R1, #0x0302 0x341832B2: 4288 CMP R0, R1 0x341832B4: D144 BNE 46L58 ; 0x34183340 0x341832B6: 9804 LDR R0, [SP, #16] 0x341832B8: 6980 LDR R0, [R0, #24] 0x341832BA: B170 CBZ R0, .L53 ; 0x341832DA 0x341832BC: 9804 LDR R0, [SP, #16] 0x341832BE: 6980 LDR R0, [R0, #24] 0x341832C0: F1B0 5F80 CMP.W R0, #0x10000000 0x341832C4: D009 BEQ 46L53 ; 0x341832DA 0x341832C6: 9804 LDR R0, [SP, #16] 0x341832C8: 6980 LDR R0, [R0, #24] 0x341832CA: F1B0 5F00 CMP.W R0, #0x20000000 0x341832CE: D004 BEQ 46L53 ; 0x341832DA 0x341832D0: 9804 LDR R0, [SP, #16] 0x341832D2: 6980 LDR R0, [R0, #24] 0x341832D4: F1B0 5F40 CMP.W R0, #0x30000000 0x341832D8: D100 BNE 46L54 ; 0x341832DC
.L53: 0x341832DA: E007 B 46L55 ; 0x341832EC
.L54: 0x341832DC: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341832E0: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341832E4: F240 1129 MOVW R1, #0x0129 0x341832E8: F00A FCD8 BL assert_failed ; 0x3418DC9C
.L55: 0x341832EC: 9804 LDR R0, [SP, #16] 0x341832EE: 69C0 LDR R0, [R0, #28] 0x341832F0: B128 CBZ R0, .L56 ; 0x341832FE 0x341832F2: 9804 LDR R0, [SP, #16] 0x341832F4: 69C0 LDR R0, [R0, #28] 0x341832F6: F5B0 7F80 CMP.W R0, #0x0100 0x341832FA: D800 BHI 46L56 ; 0x341832FE 0x341832FC: E007 B 46L57 ; 0x3418330E
.L56: 0x341832FE: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34183302: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34183306: F44F 7195 MOV.W R1, #0x012A 0x3418330A: F00A FCC7 BL assert_failed ; 0x3418DC9C
.L57: 0x3418330E: F248 01CC MOVW R1, #0x80CC 0x34183312: F2C5 6102 MOVT R1, #0x5602 0x34183316: 6808 LDR R0, [R1] 0x34183318: F64F 72FF MOVW R2, #0xFFFF 0x3418331C: F6CC 7200 MOVT R2, #0xCF00 0x34183320: 4010 ANDS R0, R2 0x34183322: 9B04 LDR R3, [SP, #16] 0x34183324: 699A LDR R2, [R3, #24] 0x34183326: F8D3 C01C LDR.W R12, [R3, #28] 0x3418332A: 2300 MOVS R3, #0 0x3418332C: F6CF 73FF MOVT R3, #0xFFFF 0x34183330: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34183334: 431A ORRS R2, R3 0x34183336: 4310 ORRS R0, R2 0x34183338: 6008 STR R0, [R1] 0x3418333A: F00C FF81 BL LL_RCC_IC3_Enable ; 0x34190240 0x3418333E: E057 B 46L65 ; 0x341833F0
.L58: 0x34183340: 9804 LDR R0, [SP, #16] 0x34183342: F8D0 00AC LDR.W R0, [R0, #172] 0x34183346: 2114 MOVS R1, #20 0x34183348: F2C0 3103 MOVT R1, #0x0303 0x3418334C: 4288 CMP R0, R1 0x3418334E: D144 BNE 46L64 ; 0x341833DA 0x34183350: 9804 LDR R0, [SP, #16] 0x34183352: 6A00 LDR R0, [R0, #32] 0x34183354: B170 CBZ R0, .L59 ; 0x34183374 0x34183356: 9804 LDR R0, [SP, #16] 0x34183358: 6A00 LDR R0, [R0, #32] 0x3418335A: F1B0 5F80 CMP.W R0, #0x10000000 0x3418335E: D009 BEQ 46L59 ; 0x34183374 0x34183360: 9804 LDR R0, [SP, #16] 0x34183362: 6A00 LDR R0, [R0, #32] 0x34183364: F1B0 5F00 CMP.W R0, #0x20000000 0x34183368: D004 BEQ 46L59 ; 0x34183374 0x3418336A: 9804 LDR R0, [SP, #16] 0x3418336C: 6A00 LDR R0, [R0, #32] 0x3418336E: F1B0 5F40 CMP.W R0, #0x30000000 0x34183372: D100 BNE 46L60 ; 0x34183376
.L59: 0x34183374: E007 B 46L61 ; 0x34183386
.L60: 0x34183376: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x3418337A: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x3418337E: F44F 719B MOV.W R1, #0x0136 0x34183382: F00A FC8B BL assert_failed ; 0x3418DC9C
.L61: 0x34183386: 9804 LDR R0, [SP, #16] 0x34183388: 6A40 LDR R0, [R0, #36] 0x3418338A: B128 CBZ R0, .L62 ; 0x34183398 0x3418338C: 9804 LDR R0, [SP, #16] 0x3418338E: 6A40 LDR R0, [R0, #36] 0x34183390: F5B0 7F80 CMP.W R0, #0x0100 0x34183394: D800 BHI 46L62 ; 0x34183398 0x34183396: E007 B 46L63 ; 0x341833A8
.L62: 0x34183398: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x3418339C: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341833A0: F240 1137 MOVW R1, #0x0137 0x341833A4: F00A FC7A BL assert_failed ; 0x3418DC9C
.L63: 0x341833A8: F248 01D0 MOVW R1, #0x80D0 0x341833AC: F2C5 6102 MOVT R1, #0x5602 0x341833B0: 6808 LDR R0, [R1] 0x341833B2: F64F 72FF MOVW R2, #0xFFFF 0x341833B6: F6CC 7200 MOVT R2, #0xCF00 0x341833BA: 4010 ANDS R0, R2 0x341833BC: 9B04 LDR R3, [SP, #16] 0x341833BE: 6A1A LDR R2, [R3, #32] 0x341833C0: F8D3 C024 LDR.W R12, [R3, #36] 0x341833C4: 2300 MOVS R3, #0 0x341833C6: F6CF 73FF MOVT R3, #0xFFFF 0x341833CA: EB03 430C ADD.W R3, R3, R12, LSL #16 0x341833CE: 431A ORRS R2, R3 0x341833D0: 4310 ORRS R0, R2 0x341833D2: 6008 STR R0, [R1] 0x341833D4: F00C FF3C BL LL_RCC_IC4_Enable ; 0x34190250 0x341833D8: E00A B 46L65 ; 0x341833F0
.L64: 0x341833DA: 9804 LDR R0, [SP, #16] 0x341833DC: F8D0 00AC LDR.W R0, [R0, #172] 0x341833E0: 2114 MOVS R1, #20 0x341833E2: F2C0 3101 MOVT R1, #0x0301 0x341833E6: 4288 CMP R0, R1 0x341833E8: D102 BNE 46L65 ; 0x341833F0 0x341833EA: F00C FF39 BL LL_RCC_CLKP_Enable ; 0x34190260 0x341833EE: E7FF B 46L65 ; 0x341833F0
.L65: 0x341833F0: 9804 LDR R0, [SP, #16] 0x341833F2: F8D0 00AC LDR.W R0, [R0, #172] 0x341833F6: F005 F931 BL LL_RCC_SetXSPIClockSource ; 0x3418865C
.L66: 0x341833FA: 9804 LDR R0, [SP, #16] 0x341833FC: 7980 LDRB R0, [R0, #6] 0x341833FE: 0600 LSLS R0, R0, #24 0x34183400: 2800 CMP R0, #0 0x34183402: F140 80DA BPL.W 46L83 ; 0x341835BA 0x34183406: 9804 LDR R0, [SP, #16] 0x34183408: F8D0 00B0 LDR.W R0, [R0, #176] 0x3418340C: F240 4114 MOVW R1, #0x0414 0x34183410: F2C0 3100 MOVT R1, #0x0300 0x34183414: 4288 CMP R0, R1 0x34183416: D01A BEQ 46L67 ; 0x3418344E 0x34183418: 9804 LDR R0, [SP, #16] 0x3418341A: F8D0 00B0 LDR.W R0, [R0, #176] 0x3418341E: F240 4114 MOVW R1, #0x0414 0x34183422: F2C0 3101 MOVT R1, #0x0301 0x34183426: 4288 CMP R0, R1 0x34183428: D011 BEQ 46L67 ; 0x3418344E 0x3418342A: 9804 LDR R0, [SP, #16] 0x3418342C: F8D0 00B0 LDR.W R0, [R0, #176] 0x34183430: F240 4114 MOVW R1, #0x0414 0x34183434: F2C0 3102 MOVT R1, #0x0302 0x34183438: 4288 CMP R0, R1 0x3418343A: D008 BEQ 46L67 ; 0x3418344E 0x3418343C: 9804 LDR R0, [SP, #16] 0x3418343E: F8D0 00B0 LDR.W R0, [R0, #176] 0x34183442: F240 4114 MOVW R1, #0x0414 0x34183446: F2C0 3103 MOVT R1, #0x0303 0x3418344A: 4288 CMP R0, R1 0x3418344C: D100 BNE 46L68 ; 0x34183450
.L67: 0x3418344E: E007 B 46L69 ; 0x34183460
.L68: 0x34183450: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34183454: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34183458: F240 1151 MOVW R1, #0x0151 0x3418345C: F00A FC1E BL assert_failed ; 0x3418DC9C
.L69: 0x34183460: 9804 LDR R0, [SP, #16] 0x34183462: F8D0 00B0 LDR.W R0, [R0, #176] 0x34183466: F240 4114 MOVW R1, #0x0414 0x3418346A: F2C0 3102 MOVT R1, #0x0302 0x3418346E: 4288 CMP R0, R1 0x34183470: D144 BNE 46L75 ; 0x341834FC 0x34183472: 9804 LDR R0, [SP, #16] 0x34183474: 6980 LDR R0, [R0, #24] 0x34183476: B170 CBZ R0, .L70 ; 0x34183496 0x34183478: 9804 LDR R0, [SP, #16] 0x3418347A: 6980 LDR R0, [R0, #24] 0x3418347C: F1B0 5F80 CMP.W R0, #0x10000000 0x34183480: D009 BEQ 46L70 ; 0x34183496 0x34183482: 9804 LDR R0, [SP, #16] 0x34183484: 6980 LDR R0, [R0, #24] 0x34183486: F1B0 5F00 CMP.W R0, #0x20000000 0x3418348A: D004 BEQ 46L70 ; 0x34183496 0x3418348C: 9804 LDR R0, [SP, #16] 0x3418348E: 6980 LDR R0, [R0, #24] 0x34183490: F1B0 5F40 CMP.W R0, #0x30000000 0x34183494: D100 BNE 46L71 ; 0x34183498
.L70: 0x34183496: E007 B 46L72 ; 0x341834A8
.L71: 0x34183498: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x3418349C: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341834A0: F44F 71AB MOV.W R1, #0x0156 0x341834A4: F00A FBFA BL assert_failed ; 0x3418DC9C
.L72: 0x341834A8: 9804 LDR R0, [SP, #16] 0x341834AA: 69C0 LDR R0, [R0, #28] 0x341834AC: B128 CBZ R0, .L73 ; 0x341834BA 0x341834AE: 9804 LDR R0, [SP, #16] 0x341834B0: 69C0 LDR R0, [R0, #28] 0x341834B2: F5B0 7F80 CMP.W R0, #0x0100 0x341834B6: D800 BHI 46L73 ; 0x341834BA 0x341834B8: E007 B 46L74 ; 0x341834CA
.L73: 0x341834BA: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341834BE: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341834C2: F240 1157 MOVW R1, #0x0157 0x341834C6: F00A FBE9 BL assert_failed ; 0x3418DC9C
.L74: 0x341834CA: F248 01CC MOVW R1, #0x80CC 0x341834CE: F2C5 6102 MOVT R1, #0x5602 0x341834D2: 6808 LDR R0, [R1] 0x341834D4: F64F 72FF MOVW R2, #0xFFFF 0x341834D8: F6CC 7200 MOVT R2, #0xCF00 0x341834DC: 4010 ANDS R0, R2 0x341834DE: 9B04 LDR R3, [SP, #16] 0x341834E0: 699A LDR R2, [R3, #24] 0x341834E2: F8D3 C01C LDR.W R12, [R3, #28] 0x341834E6: 2300 MOVS R3, #0 0x341834E8: F6CF 73FF MOVT R3, #0xFFFF 0x341834EC: EB03 430C ADD.W R3, R3, R12, LSL #16 0x341834F0: 431A ORRS R2, R3 0x341834F2: 4310 ORRS R0, R2 0x341834F4: 6008 STR R0, [R1] 0x341834F6: F00C FEA3 BL LL_RCC_IC3_Enable ; 0x34190240 0x341834FA: E059 B 46L82 ; 0x341835B0
.L75: 0x341834FC: 9804 LDR R0, [SP, #16] 0x341834FE: F8D0 00B0 LDR.W R0, [R0, #176] 0x34183502: F240 4114 MOVW R1, #0x0414 0x34183506: F2C0 3103 MOVT R1, #0x0303 0x3418350A: 4288 CMP R0, R1 0x3418350C: D144 BNE 46L81 ; 0x34183598 0x3418350E: 9804 LDR R0, [SP, #16] 0x34183510: 6A00 LDR R0, [R0, #32] 0x34183512: B170 CBZ R0, .L76 ; 0x34183532 0x34183514: 9804 LDR R0, [SP, #16] 0x34183516: 6A00 LDR R0, [R0, #32] 0x34183518: F1B0 5F80 CMP.W R0, #0x10000000 0x3418351C: D009 BEQ 46L76 ; 0x34183532 0x3418351E: 9804 LDR R0, [SP, #16] 0x34183520: 6A00 LDR R0, [R0, #32] 0x34183522: F1B0 5F00 CMP.W R0, #0x20000000 0x34183526: D004 BEQ 46L76 ; 0x34183532 0x34183528: 9804 LDR R0, [SP, #16] 0x3418352A: 6A00 LDR R0, [R0, #32] 0x3418352C: F1B0 5F40 CMP.W R0, #0x30000000 0x34183530: D100 BNE 46L77 ; 0x34183534
.L76: 0x34183532: E007 B 46L78 ; 0x34183544
.L77: 0x34183534: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34183538: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x3418353C: F240 1163 MOVW R1, #0x0163 0x34183540: F00A FBAC BL assert_failed ; 0x3418DC9C
.L78: 0x34183544: 9804 LDR R0, [SP, #16] 0x34183546: 6A40 LDR R0, [R0, #36] 0x34183548: B128 CBZ R0, .L79 ; 0x34183556 0x3418354A: 9804 LDR R0, [SP, #16] 0x3418354C: 6A40 LDR R0, [R0, #36] 0x3418354E: F5B0 7F80 CMP.W R0, #0x0100 0x34183552: D800 BHI 46L79 ; 0x34183556 0x34183554: E007 B 46L80 ; 0x34183566
.L79: 0x34183556: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x3418355A: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x3418355E: F44F 71B2 MOV.W R1, #0x0164 0x34183562: F00A FB9B BL assert_failed ; 0x3418DC9C
.L80: 0x34183566: F248 01D0 MOVW R1, #0x80D0 0x3418356A: F2C5 6102 MOVT R1, #0x5602 0x3418356E: 6808 LDR R0, [R1] 0x34183570: F64F 72FF MOVW R2, #0xFFFF 0x34183574: F6CC 7200 MOVT R2, #0xCF00 0x34183578: 4010 ANDS R0, R2 0x3418357A: 9B04 LDR R3, [SP, #16] 0x3418357C: 6A1A LDR R2, [R3, #32] 0x3418357E: F8D3 C024 LDR.W R12, [R3, #36] 0x34183582: 2300 MOVS R3, #0 0x34183584: F6CF 73FF MOVT R3, #0xFFFF 0x34183588: EB03 430C ADD.W R3, R3, R12, LSL #16 0x3418358C: 431A ORRS R2, R3 0x3418358E: 4310 ORRS R0, R2 0x34183590: 6008 STR R0, [R1] 0x34183592: F00C FE5D BL LL_RCC_IC4_Enable ; 0x34190250 0x34183596: E00B B 46L82 ; 0x341835B0
.L81: 0x34183598: 9804 LDR R0, [SP, #16] 0x3418359A: F8D0 00B0 LDR.W R0, [R0, #176] 0x3418359E: F240 4114 MOVW R1, #0x0414 0x341835A2: F2C0 3101 MOVT R1, #0x0301 0x341835A6: 4288 CMP R0, R1 0x341835A8: D102 BNE 46L82 ; 0x341835B0 0x341835AA: F00C FE59 BL LL_RCC_CLKP_Enable ; 0x34190260 0x341835AE: E7FF B 46L82 ; 0x341835B0
.L82: 0x341835B0: 9804 LDR R0, [SP, #16] 0x341835B2: F8D0 00B0 LDR.W R0, [R0, #176] 0x341835B6: F005 F851 BL LL_RCC_SetXSPIClockSource ; 0x3418865C
.L83: 0x341835BA: 9804 LDR R0, [SP, #16] 0x341835BC: 79C0 LDRB R0, [R0, #7] 0x341835BE: 07C0 LSLS R0, R0, #31 0x341835C0: 2800 CMP R0, #0 0x341835C2: F000 80DA BEQ.W 46L100 ; 0x3418377A 0x341835C6: 9804 LDR R0, [SP, #16] 0x341835C8: F8D0 00B4 LDR.W R0, [R0, #180] 0x341835CC: F640 0114 MOVW R1, #0x0814 0x341835D0: F2C0 3100 MOVT R1, #0x0300 0x341835D4: 4288 CMP R0, R1 0x341835D6: D01A BEQ 46L84 ; 0x3418360E 0x341835D8: 9804 LDR R0, [SP, #16] 0x341835DA: F8D0 00B4 LDR.W R0, [R0, #180] 0x341835DE: F640 0114 MOVW R1, #0x0814 0x341835E2: F2C0 3101 MOVT R1, #0x0301 0x341835E6: 4288 CMP R0, R1 0x341835E8: D011 BEQ 46L84 ; 0x3418360E 0x341835EA: 9804 LDR R0, [SP, #16] 0x341835EC: F8D0 00B4 LDR.W R0, [R0, #180] 0x341835F0: F640 0114 MOVW R1, #0x0814 0x341835F4: F2C0 3102 MOVT R1, #0x0302 0x341835F8: 4288 CMP R0, R1 0x341835FA: D008 BEQ 46L84 ; 0x3418360E 0x341835FC: 9804 LDR R0, [SP, #16] 0x341835FE: F8D0 00B4 LDR.W R0, [R0, #180] 0x34183602: F640 0114 MOVW R1, #0x0814 0x34183606: F2C0 3103 MOVT R1, #0x0303 0x3418360A: 4288 CMP R0, R1 0x3418360C: D100 BNE 46L85 ; 0x34183610
.L84: 0x3418360E: E007 B 46L86 ; 0x34183620
.L85: 0x34183610: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34183614: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34183618: F44F 71BF MOV.W R1, #0x017E 0x3418361C: F00A FB3E BL assert_failed ; 0x3418DC9C
.L86: 0x34183620: 9804 LDR R0, [SP, #16] 0x34183622: F8D0 00B4 LDR.W R0, [R0, #180] 0x34183626: F640 0114 MOVW R1, #0x0814 0x3418362A: F2C0 3102 MOVT R1, #0x0302 0x3418362E: 4288 CMP R0, R1 0x34183630: D144 BNE 46L92 ; 0x341836BC 0x34183632: 9804 LDR R0, [SP, #16] 0x34183634: 6980 LDR R0, [R0, #24] 0x34183636: B170 CBZ R0, .L87 ; 0x34183656 0x34183638: 9804 LDR R0, [SP, #16] 0x3418363A: 6980 LDR R0, [R0, #24] 0x3418363C: F1B0 5F80 CMP.W R0, #0x10000000 0x34183640: D009 BEQ 46L87 ; 0x34183656 0x34183642: 9804 LDR R0, [SP, #16] 0x34183644: 6980 LDR R0, [R0, #24] 0x34183646: F1B0 5F00 CMP.W R0, #0x20000000 0x3418364A: D004 BEQ 46L87 ; 0x34183656 0x3418364C: 9804 LDR R0, [SP, #16] 0x3418364E: 6980 LDR R0, [R0, #24] 0x34183650: F1B0 5F40 CMP.W R0, #0x30000000 0x34183654: D100 BNE 46L88 ; 0x34183658
.L87: 0x34183656: E007 B 46L89 ; 0x34183668
.L88: 0x34183658: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x3418365C: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34183660: F240 1183 MOVW R1, #0x0183 0x34183664: F00A FB1A BL assert_failed ; 0x3418DC9C
.L89: 0x34183668: 9804 LDR R0, [SP, #16] 0x3418366A: 69C0 LDR R0, [R0, #28] 0x3418366C: B128 CBZ R0, .L90 ; 0x3418367A 0x3418366E: 9804 LDR R0, [SP, #16] 0x34183670: 69C0 LDR R0, [R0, #28] 0x34183672: F5B0 7F80 CMP.W R0, #0x0100 0x34183676: D800 BHI 46L90 ; 0x3418367A 0x34183678: E007 B 46L91 ; 0x3418368A
.L90: 0x3418367A: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x3418367E: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34183682: F44F 71C2 MOV.W R1, #0x0184 0x34183686: F00A FB09 BL assert_failed ; 0x3418DC9C
.L91: 0x3418368A: F248 01CC MOVW R1, #0x80CC 0x3418368E: F2C5 6102 MOVT R1, #0x5602 0x34183692: 6808 LDR R0, [R1] 0x34183694: F64F 72FF MOVW R2, #0xFFFF 0x34183698: F6CC 7200 MOVT R2, #0xCF00 0x3418369C: 4010 ANDS R0, R2 0x3418369E: 9B04 LDR R3, [SP, #16] 0x341836A0: 699A LDR R2, [R3, #24] 0x341836A2: F8D3 C01C LDR.W R12, [R3, #28] 0x341836A6: 2300 MOVS R3, #0 0x341836A8: F6CF 73FF MOVT R3, #0xFFFF 0x341836AC: EB03 430C ADD.W R3, R3, R12, LSL #16 0x341836B0: 431A ORRS R2, R3 0x341836B2: 4310 ORRS R0, R2 0x341836B4: 6008 STR R0, [R1] 0x341836B6: F00C FDC3 BL LL_RCC_IC3_Enable ; 0x34190240 0x341836BA: E059 B 46L99 ; 0x34183770
.L92: 0x341836BC: 9804 LDR R0, [SP, #16] 0x341836BE: F8D0 00B4 LDR.W R0, [R0, #180] 0x341836C2: F640 0114 MOVW R1, #0x0814 0x341836C6: F2C0 3103 MOVT R1, #0x0303 0x341836CA: 4288 CMP R0, R1 0x341836CC: D144 BNE 46L98 ; 0x34183758 0x341836CE: 9804 LDR R0, [SP, #16] 0x341836D0: 6A00 LDR R0, [R0, #32] 0x341836D2: B170 CBZ R0, .L93 ; 0x341836F2 0x341836D4: 9804 LDR R0, [SP, #16] 0x341836D6: 6A00 LDR R0, [R0, #32] 0x341836D8: F1B0 5F80 CMP.W R0, #0x10000000 0x341836DC: D009 BEQ 46L93 ; 0x341836F2 0x341836DE: 9804 LDR R0, [SP, #16] 0x341836E0: 6A00 LDR R0, [R0, #32] 0x341836E2: F1B0 5F00 CMP.W R0, #0x20000000 0x341836E6: D004 BEQ 46L93 ; 0x341836F2 0x341836E8: 9804 LDR R0, [SP, #16] 0x341836EA: 6A00 LDR R0, [R0, #32] 0x341836EC: F1B0 5F40 CMP.W R0, #0x30000000 0x341836F0: D100 BNE 46L94 ; 0x341836F4
.L93: 0x341836F2: E007 B 46L95 ; 0x34183704
.L94: 0x341836F4: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341836F8: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341836FC: F44F 71C8 MOV.W R1, #0x0190 0x34183700: F00A FACC BL assert_failed ; 0x3418DC9C
.L95: 0x34183704: 9804 LDR R0, [SP, #16] 0x34183706: 6A40 LDR R0, [R0, #36] 0x34183708: B128 CBZ R0, .L96 ; 0x34183716 0x3418370A: 9804 LDR R0, [SP, #16] 0x3418370C: 6A40 LDR R0, [R0, #36] 0x3418370E: F5B0 7F80 CMP.W R0, #0x0100 0x34183712: D800 BHI 46L96 ; 0x34183716 0x34183714: E007 B 46L97 ; 0x34183726
.L96: 0x34183716: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x3418371A: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x3418371E: F240 1191 MOVW R1, #0x0191 0x34183722: F00A FABB BL assert_failed ; 0x3418DC9C
.L97: 0x34183726: F248 01D0 MOVW R1, #0x80D0 0x3418372A: F2C5 6102 MOVT R1, #0x5602 0x3418372E: 6808 LDR R0, [R1] 0x34183730: F64F 72FF MOVW R2, #0xFFFF 0x34183734: F6CC 7200 MOVT R2, #0xCF00 0x34183738: 4010 ANDS R0, R2 0x3418373A: 9B04 LDR R3, [SP, #16] 0x3418373C: 6A1A LDR R2, [R3, #32] 0x3418373E: F8D3 C024 LDR.W R12, [R3, #36] 0x34183742: 2300 MOVS R3, #0 0x34183744: F6CF 73FF MOVT R3, #0xFFFF 0x34183748: EB03 430C ADD.W R3, R3, R12, LSL #16 0x3418374C: 431A ORRS R2, R3 0x3418374E: 4310 ORRS R0, R2 0x34183750: 6008 STR R0, [R1] 0x34183752: F00C FD7D BL LL_RCC_IC4_Enable ; 0x34190250 0x34183756: E00B B 46L99 ; 0x34183770
.L98: 0x34183758: 9804 LDR R0, [SP, #16] 0x3418375A: F8D0 00B4 LDR.W R0, [R0, #180] 0x3418375E: F640 0114 MOVW R1, #0x0814 0x34183762: F2C0 3101 MOVT R1, #0x0301 0x34183766: 4288 CMP R0, R1 0x34183768: D102 BNE 46L99 ; 0x34183770 0x3418376A: F00C FD79 BL LL_RCC_CLKP_Enable ; 0x34190260 0x3418376E: E7FF B 46L99 ; 0x34183770
.L99: 0x34183770: 9804 LDR R0, [SP, #16] 0x34183772: F8D0 00B4 LDR.W R0, [R0, #180] 0x34183776: F004 FF71 BL LL_RCC_SetXSPIClockSource ; 0x3418865C
.L100: 0x3418377A: 9804 LDR R0, [SP, #16] 0x3418377C: 7840 LDRB R0, [R0, #1] 0x3418377E: 0700 LSLS R0, R0, #28 0x34183780: 2800 CMP R0, #0 0x34183782: F140 80BD BPL.W 46L117 ; 0x34183900 0x34183786: 9804 LDR R0, [SP, #16] 0x34183788: F8D0 00A8 LDR.W R0, [R0, #168] 0x3418378C: B170 CBZ R0, .L101 ; 0x341837AC 0x3418378E: 9804 LDR R0, [SP, #16] 0x34183790: F8D0 00A8 LDR.W R0, [R0, #168] 0x34183794: 2810 CMP R0, #16 0x34183796: D009 BEQ 46L101 ; 0x341837AC 0x34183798: 9804 LDR R0, [SP, #16] 0x3418379A: F8D0 00A8 LDR.W R0, [R0, #168] 0x3418379E: 2820 CMP R0, #32 0x341837A0: D004 BEQ 46L101 ; 0x341837AC 0x341837A2: 9804 LDR R0, [SP, #16] 0x341837A4: F8D0 00A8 LDR.W R0, [R0, #168] 0x341837A8: 2830 CMP R0, #48 0x341837AA: D100 BNE 46L102 ; 0x341837AE
.L101: 0x341837AC: E007 B 46L103 ; 0x341837BE
.L102: 0x341837AE: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341837B2: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341837B6: F240 11AB MOVW R1, #0x01AB 0x341837BA: F00A FA6F BL assert_failed ; 0x3418DC9C
.L103: 0x341837BE: 9804 LDR R0, [SP, #16] 0x341837C0: F8D0 00A8 LDR.W R0, [R0, #168] 0x341837C4: 2820 CMP R0, #32 0x341837C6: D144 BNE 46L109 ; 0x34183852 0x341837C8: 9804 LDR R0, [SP, #16] 0x341837CA: 6980 LDR R0, [R0, #24] 0x341837CC: B170 CBZ R0, .L104 ; 0x341837EC 0x341837CE: 9804 LDR R0, [SP, #16] 0x341837D0: 6980 LDR R0, [R0, #24] 0x341837D2: F1B0 5F80 CMP.W R0, #0x10000000 0x341837D6: D009 BEQ 46L104 ; 0x341837EC 0x341837D8: 9804 LDR R0, [SP, #16] 0x341837DA: 6980 LDR R0, [R0, #24] 0x341837DC: F1B0 5F00 CMP.W R0, #0x20000000 0x341837E0: D004 BEQ 46L104 ; 0x341837EC 0x341837E2: 9804 LDR R0, [SP, #16] 0x341837E4: 6980 LDR R0, [R0, #24] 0x341837E6: F1B0 5F40 CMP.W R0, #0x30000000 0x341837EA: D100 BNE 46L105 ; 0x341837EE
.L104: 0x341837EC: E007 B 46L106 ; 0x341837FE
.L105: 0x341837EE: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341837F2: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341837F6: F44F 71D8 MOV.W R1, #0x01B0 0x341837FA: F00A FA4F BL assert_failed ; 0x3418DC9C
.L106: 0x341837FE: 9804 LDR R0, [SP, #16] 0x34183800: 69C0 LDR R0, [R0, #28] 0x34183802: B128 CBZ R0, .L107 ; 0x34183810 0x34183804: 9804 LDR R0, [SP, #16] 0x34183806: 69C0 LDR R0, [R0, #28] 0x34183808: F5B0 7F80 CMP.W R0, #0x0100 0x3418380C: D800 BHI 46L107 ; 0x34183810 0x3418380E: E007 B 46L108 ; 0x34183820
.L107: 0x34183810: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34183814: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34183818: F240 11B1 MOVW R1, #0x01B1 0x3418381C: F00A FA3E BL assert_failed ; 0x3418DC9C
.L108: 0x34183820: F248 01CC MOVW R1, #0x80CC 0x34183824: F2C5 6102 MOVT R1, #0x5602 0x34183828: 6808 LDR R0, [R1] 0x3418382A: F64F 72FF MOVW R2, #0xFFFF 0x3418382E: F6CC 7200 MOVT R2, #0xCF00 0x34183832: 4010 ANDS R0, R2 0x34183834: 9B04 LDR R3, [SP, #16] 0x34183836: 699A LDR R2, [R3, #24] 0x34183838: F8D3 C01C LDR.W R12, [R3, #28] 0x3418383C: 2300 MOVS R3, #0 0x3418383E: F6CF 73FF MOVT R3, #0xFFFF 0x34183842: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34183846: 431A ORRS R2, R3 0x34183848: 4310 ORRS R0, R2 0x3418384A: 6008 STR R0, [R1] 0x3418384C: F00C FCF8 BL LL_RCC_IC3_Enable ; 0x34190240 0x34183850: E051 B 46L116 ; 0x341838F6
.L109: 0x34183852: 9804 LDR R0, [SP, #16] 0x34183854: F8D0 00A8 LDR.W R0, [R0, #168] 0x34183858: 2830 CMP R0, #48 0x3418385A: D144 BNE 46L115 ; 0x341838E6 0x3418385C: 9804 LDR R0, [SP, #16] 0x3418385E: 6A00 LDR R0, [R0, #32] 0x34183860: B170 CBZ R0, .L110 ; 0x34183880 0x34183862: 9804 LDR R0, [SP, #16] 0x34183864: 6A00 LDR R0, [R0, #32] 0x34183866: F1B0 5F80 CMP.W R0, #0x10000000 0x3418386A: D009 BEQ 46L110 ; 0x34183880 0x3418386C: 9804 LDR R0, [SP, #16] 0x3418386E: 6A00 LDR R0, [R0, #32] 0x34183870: F1B0 5F00 CMP.W R0, #0x20000000 0x34183874: D004 BEQ 46L110 ; 0x34183880 0x34183876: 9804 LDR R0, [SP, #16] 0x34183878: 6A00 LDR R0, [R0, #32] 0x3418387A: F1B0 5F40 CMP.W R0, #0x30000000 0x3418387E: D100 BNE 46L111 ; 0x34183882
.L110: 0x34183880: E007 B 46L112 ; 0x34183892
.L111: 0x34183882: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34183886: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x3418388A: F240 11BD MOVW R1, #0x01BD 0x3418388E: F00A FA05 BL assert_failed ; 0x3418DC9C
.L112: 0x34183892: 9804 LDR R0, [SP, #16] 0x34183894: 6A40 LDR R0, [R0, #36] 0x34183896: B128 CBZ R0, .L113 ; 0x341838A4 0x34183898: 9804 LDR R0, [SP, #16] 0x3418389A: 6A40 LDR R0, [R0, #36] 0x3418389C: F5B0 7F80 CMP.W R0, #0x0100 0x341838A0: D800 BHI 46L113 ; 0x341838A4 0x341838A2: E007 B 46L114 ; 0x341838B4
.L113: 0x341838A4: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341838A8: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341838AC: F44F 71DF MOV.W R1, #0x01BE 0x341838B0: F00A F9F4 BL assert_failed ; 0x3418DC9C
.L114: 0x341838B4: F248 01D0 MOVW R1, #0x80D0 0x341838B8: F2C5 6102 MOVT R1, #0x5602 0x341838BC: 6808 LDR R0, [R1] 0x341838BE: F64F 72FF MOVW R2, #0xFFFF 0x341838C2: F6CC 7200 MOVT R2, #0xCF00 0x341838C6: 4010 ANDS R0, R2 0x341838C8: 9B04 LDR R3, [SP, #16] 0x341838CA: 6A1A LDR R2, [R3, #32] 0x341838CC: F8D3 C024 LDR.W R12, [R3, #36] 0x341838D0: 2300 MOVS R3, #0 0x341838D2: F6CF 73FF MOVT R3, #0xFFFF 0x341838D6: EB03 430C ADD.W R3, R3, R12, LSL #16 0x341838DA: 431A ORRS R2, R3 0x341838DC: 4310 ORRS R0, R2 0x341838DE: 6008 STR R0, [R1] 0x341838E0: F00C FCB6 BL LL_RCC_IC4_Enable ; 0x34190250 0x341838E4: E007 B 46L116 ; 0x341838F6
.L115: 0x341838E6: 9804 LDR R0, [SP, #16] 0x341838E8: F8D0 00A8 LDR.W R0, [R0, #168] 0x341838EC: 2810 CMP R0, #16 0x341838EE: D102 BNE 46L116 ; 0x341838F6 0x341838F0: F00C FCB6 BL LL_RCC_CLKP_Enable ; 0x34190260 0x341838F4: E7FF B 46L116 ; 0x341838F6
.L116: 0x341838F6: 9804 LDR R0, [SP, #16] 0x341838F8: F8D0 00A8 LDR.W R0, [R0, #168] 0x341838FC: F004 FEB6 BL LL_RCC_SetFMCClockSource ; 0x3418866C
.L117: 0x34183900: 9804 LDR R0, [SP, #16] 0x34183902: 78C0 LDRB R0, [R0, #3] 0x34183904: 0640 LSLS R0, R0, #25 0x34183906: 2800 CMP R0, #0 0x34183908: F140 80D3 BPL.W 46L134 ; 0x34183AB2 0x3418390C: 9804 LDR R0, [SP, #16] 0x3418390E: F8D0 012C LDR.W R0, [R0, #0x012C] 0x34183912: 211C MOVS R1, #28 0x34183914: F2C0 3100 MOVT R1, #0x0300 0x34183918: 4288 CMP R0, R1 0x3418391A: D017 BEQ 46L118 ; 0x3418394C 0x3418391C: 9804 LDR R0, [SP, #16] 0x3418391E: F8D0 012C LDR.W R0, [R0, #0x012C] 0x34183922: 211C MOVS R1, #28 0x34183924: F2C0 3101 MOVT R1, #0x0301 0x34183928: 4288 CMP R0, R1 0x3418392A: D00F BEQ 46L118 ; 0x3418394C 0x3418392C: 9804 LDR R0, [SP, #16] 0x3418392E: F8D0 012C LDR.W R0, [R0, #0x012C] 0x34183932: 211C MOVS R1, #28 0x34183934: F2C0 3102 MOVT R1, #0x0302 0x34183938: 4288 CMP R0, R1 0x3418393A: D007 BEQ 46L118 ; 0x3418394C 0x3418393C: 9804 LDR R0, [SP, #16] 0x3418393E: F8D0 012C LDR.W R0, [R0, #0x012C] 0x34183942: 211C MOVS R1, #28 0x34183944: F2C0 3103 MOVT R1, #0x0303 0x34183948: 4288 CMP R0, R1 0x3418394A: D100 BNE 46L119 ; 0x3418394E
.L118: 0x3418394C: E007 B 46L120 ; 0x3418395E
.L119: 0x3418394E: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34183952: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34183956: F44F 71EC MOV.W R1, #0x01D8 0x3418395A: F00A F99F BL assert_failed ; 0x3418DC9C
.L120: 0x3418395E: 9804 LDR R0, [SP, #16] 0x34183960: F8D0 012C LDR.W R0, [R0, #0x012C] 0x34183964: 211C MOVS R1, #28 0x34183966: F2C0 3102 MOVT R1, #0x0302 0x3418396A: 4288 CMP R0, R1 0x3418396C: D144 BNE 46L126 ; 0x341839F8 0x3418396E: 9804 LDR R0, [SP, #16] 0x34183970: 6A00 LDR R0, [R0, #32] 0x34183972: B170 CBZ R0, .L121 ; 0x34183992 0x34183974: 9804 LDR R0, [SP, #16] 0x34183976: 6A00 LDR R0, [R0, #32] 0x34183978: F1B0 5F80 CMP.W R0, #0x10000000 0x3418397C: D009 BEQ 46L121 ; 0x34183992 0x3418397E: 9804 LDR R0, [SP, #16] 0x34183980: 6A00 LDR R0, [R0, #32] 0x34183982: F1B0 5F00 CMP.W R0, #0x20000000 0x34183986: D004 BEQ 46L121 ; 0x34183992 0x34183988: 9804 LDR R0, [SP, #16] 0x3418398A: 6A00 LDR R0, [R0, #32] 0x3418398C: F1B0 5F40 CMP.W R0, #0x30000000 0x34183990: D100 BNE 46L122 ; 0x34183994
.L121: 0x34183992: E007 B 46L123 ; 0x341839A4
.L122: 0x34183994: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34183998: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x3418399C: F240 11DD MOVW R1, #0x01DD 0x341839A0: F00A F97C BL assert_failed ; 0x3418DC9C
.L123: 0x341839A4: 9804 LDR R0, [SP, #16] 0x341839A6: 6A40 LDR R0, [R0, #36] 0x341839A8: B128 CBZ R0, .L124 ; 0x341839B6 0x341839AA: 9804 LDR R0, [SP, #16] 0x341839AC: 6A40 LDR R0, [R0, #36] 0x341839AE: F5B0 7F80 CMP.W R0, #0x0100 0x341839B2: D800 BHI 46L124 ; 0x341839B6 0x341839B4: E007 B 46L125 ; 0x341839C6
.L124: 0x341839B6: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341839BA: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341839BE: F44F 71EF MOV.W R1, #0x01DE 0x341839C2: F00A F96B BL assert_failed ; 0x3418DC9C
.L125: 0x341839C6: F248 01D0 MOVW R1, #0x80D0 0x341839CA: F2C5 6102 MOVT R1, #0x5602 0x341839CE: 6808 LDR R0, [R1] 0x341839D0: F64F 72FF MOVW R2, #0xFFFF 0x341839D4: F6CC 7200 MOVT R2, #0xCF00 0x341839D8: 4010 ANDS R0, R2 0x341839DA: 9B04 LDR R3, [SP, #16] 0x341839DC: 6A1A LDR R2, [R3, #32] 0x341839DE: F8D3 C024 LDR.W R12, [R3, #36] 0x341839E2: 2300 MOVS R3, #0 0x341839E4: F6CF 73FF MOVT R3, #0xFFFF 0x341839E8: EB03 430C ADD.W R3, R3, R12, LSL #16 0x341839EC: 431A ORRS R2, R3 0x341839EE: 4310 ORRS R0, R2 0x341839F0: 6008 STR R0, [R1] 0x341839F2: F00C FC2D BL LL_RCC_IC4_Enable ; 0x34190250 0x341839F6: E057 B 46L133 ; 0x34183AA8
.L126: 0x341839F8: 9804 LDR R0, [SP, #16] 0x341839FA: F8D0 012C LDR.W R0, [R0, #0x012C] 0x341839FE: 211C MOVS R1, #28 0x34183A00: F2C0 3103 MOVT R1, #0x0303 0x34183A04: 4288 CMP R0, R1 0x34183A06: D144 BNE 46L132 ; 0x34183A92 0x34183A08: 9804 LDR R0, [SP, #16] 0x34183A0A: 6A80 LDR R0, [R0, #40] 0x34183A0C: B170 CBZ R0, .L127 ; 0x34183A2C 0x34183A0E: 9804 LDR R0, [SP, #16] 0x34183A10: 6A80 LDR R0, [R0, #40] 0x34183A12: F1B0 5F80 CMP.W R0, #0x10000000 0x34183A16: D009 BEQ 46L127 ; 0x34183A2C 0x34183A18: 9804 LDR R0, [SP, #16] 0x34183A1A: 6A80 LDR R0, [R0, #40] 0x34183A1C: F1B0 5F00 CMP.W R0, #0x20000000 0x34183A20: D004 BEQ 46L127 ; 0x34183A2C 0x34183A22: 9804 LDR R0, [SP, #16] 0x34183A24: 6A80 LDR R0, [R0, #40] 0x34183A26: F1B0 5F40 CMP.W R0, #0x30000000 0x34183A2A: D100 BNE 46L128 ; 0x34183A2E
.L127: 0x34183A2C: E007 B 46L129 ; 0x34183A3E
.L128: 0x34183A2E: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34183A32: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34183A36: F44F 71F5 MOV.W R1, #0x01EA 0x34183A3A: F00A F92F BL assert_failed ; 0x3418DC9C
.L129: 0x34183A3E: 9804 LDR R0, [SP, #16] 0x34183A40: 6AC0 LDR R0, [R0, #44] 0x34183A42: B128 CBZ R0, .L130 ; 0x34183A50 0x34183A44: 9804 LDR R0, [SP, #16] 0x34183A46: 6AC0 LDR R0, [R0, #44] 0x34183A48: F5B0 7F80 CMP.W R0, #0x0100 0x34183A4C: D800 BHI 46L130 ; 0x34183A50 0x34183A4E: E007 B 46L131 ; 0x34183A60
.L130: 0x34183A50: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34183A54: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34183A58: F240 11EB MOVW R1, #0x01EB 0x34183A5C: F00A F91E BL assert_failed ; 0x3418DC9C
.L131: 0x34183A60: F248 01D4 MOVW R1, #0x80D4 0x34183A64: F2C5 6102 MOVT R1, #0x5602 0x34183A68: 6808 LDR R0, [R1] 0x34183A6A: F64F 72FF MOVW R2, #0xFFFF 0x34183A6E: F6CC 7200 MOVT R2, #0xCF00 0x34183A72: 4010 ANDS R0, R2 0x34183A74: 9B04 LDR R3, [SP, #16] 0x34183A76: 6A9A LDR R2, [R3, #40] 0x34183A78: F8D3 C02C LDR.W R12, [R3, #44] 0x34183A7C: 2300 MOVS R3, #0 0x34183A7E: F6CF 73FF MOVT R3, #0xFFFF 0x34183A82: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34183A86: 431A ORRS R2, R3 0x34183A88: 4310 ORRS R0, R2 0x34183A8A: 6008 STR R0, [R1] 0x34183A8C: F00C FBD0 BL LL_RCC_IC5_Enable.60 ; 0x34190230 0x34183A90: E00A B 46L133 ; 0x34183AA8
.L132: 0x34183A92: 9804 LDR R0, [SP, #16] 0x34183A94: F8D0 012C LDR.W R0, [R0, #0x012C] 0x34183A98: 211C MOVS R1, #28 0x34183A9A: F2C0 3101 MOVT R1, #0x0301 0x34183A9E: 4288 CMP R0, R1 0x34183AA0: D102 BNE 46L133 ; 0x34183AA8 0x34183AA2: F00C FBDD BL LL_RCC_CLKP_Enable ; 0x34190260 0x34183AA6: E7FF B 46L133 ; 0x34183AA8
.L133: 0x34183AA8: 9804 LDR R0, [SP, #16] 0x34183AAA: F8D0 012C LDR.W R0, [R0, #0x012C] 0x34183AAE: F004 FDEB BL LL_RCC_SetSDMMCClockSource ; 0x34188688
.L134: 0x34183AB2: 9804 LDR R0, [SP, #16] 0x34183AB4: 78C0 LDRB R0, [R0, #3] 0x34183AB6: 0600 LSLS R0, R0, #24 0x34183AB8: 2800 CMP R0, #0 0x34183ABA: F140 80DA BPL.W 46L151 ; 0x34183C72 0x34183ABE: 9804 LDR R0, [SP, #16] 0x34183AC0: F8D0 0130 LDR.W R0, [R0, #0x0130] 0x34183AC4: F240 411C MOVW R1, #0x041C 0x34183AC8: F2C0 3100 MOVT R1, #0x0300 0x34183ACC: 4288 CMP R0, R1 0x34183ACE: D01A BEQ 46L135 ; 0x34183B06 0x34183AD0: 9804 LDR R0, [SP, #16] 0x34183AD2: F8D0 0130 LDR.W R0, [R0, #0x0130] 0x34183AD6: F240 411C MOVW R1, #0x041C 0x34183ADA: F2C0 3101 MOVT R1, #0x0301 0x34183ADE: 4288 CMP R0, R1 0x34183AE0: D011 BEQ 46L135 ; 0x34183B06 0x34183AE2: 9804 LDR R0, [SP, #16] 0x34183AE4: F8D0 0130 LDR.W R0, [R0, #0x0130] 0x34183AE8: F240 411C MOVW R1, #0x041C 0x34183AEC: F2C0 3102 MOVT R1, #0x0302 0x34183AF0: 4288 CMP R0, R1 0x34183AF2: D008 BEQ 46L135 ; 0x34183B06 0x34183AF4: 9804 LDR R0, [SP, #16] 0x34183AF6: F8D0 0130 LDR.W R0, [R0, #0x0130] 0x34183AFA: F240 411C MOVW R1, #0x041C 0x34183AFE: F2C0 3103 MOVT R1, #0x0303 0x34183B02: 4288 CMP R0, R1 0x34183B04: D100 BNE 46L136 ; 0x34183B08
.L135: 0x34183B06: E007 B 46L137 ; 0x34183B18
.L136: 0x34183B08: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34183B0C: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34183B10: F240 2105 MOVW R1, #0x0205 0x34183B14: F00A F8C2 BL assert_failed ; 0x3418DC9C
.L137: 0x34183B18: 9804 LDR R0, [SP, #16] 0x34183B1A: F8D0 0130 LDR.W R0, [R0, #0x0130] 0x34183B1E: F240 411C MOVW R1, #0x041C 0x34183B22: F2C0 3102 MOVT R1, #0x0302 0x34183B26: 4288 CMP R0, R1 0x34183B28: D144 BNE 46L143 ; 0x34183BB4 0x34183B2A: 9804 LDR R0, [SP, #16] 0x34183B2C: 6A00 LDR R0, [R0, #32] 0x34183B2E: B170 CBZ R0, .L138 ; 0x34183B4E 0x34183B30: 9804 LDR R0, [SP, #16] 0x34183B32: 6A00 LDR R0, [R0, #32] 0x34183B34: F1B0 5F80 CMP.W R0, #0x10000000 0x34183B38: D009 BEQ 46L138 ; 0x34183B4E 0x34183B3A: 9804 LDR R0, [SP, #16] 0x34183B3C: 6A00 LDR R0, [R0, #32] 0x34183B3E: F1B0 5F00 CMP.W R0, #0x20000000 0x34183B42: D004 BEQ 46L138 ; 0x34183B4E 0x34183B44: 9804 LDR R0, [SP, #16] 0x34183B46: 6A00 LDR R0, [R0, #32] 0x34183B48: F1B0 5F40 CMP.W R0, #0x30000000 0x34183B4C: D100 BNE 46L139 ; 0x34183B50
.L138: 0x34183B4E: E007 B 46L140 ; 0x34183B60
.L139: 0x34183B50: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34183B54: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34183B58: F240 210A MOVW R1, #0x020A 0x34183B5C: F00A F89E BL assert_failed ; 0x3418DC9C
.L140: 0x34183B60: 9804 LDR R0, [SP, #16] 0x34183B62: 6A40 LDR R0, [R0, #36] 0x34183B64: B128 CBZ R0, .L141 ; 0x34183B72 0x34183B66: 9804 LDR R0, [SP, #16] 0x34183B68: 6A40 LDR R0, [R0, #36] 0x34183B6A: F5B0 7F80 CMP.W R0, #0x0100 0x34183B6E: D800 BHI 46L141 ; 0x34183B72 0x34183B70: E007 B 46L142 ; 0x34183B82
.L141: 0x34183B72: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34183B76: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34183B7A: F240 210B MOVW R1, #0x020B 0x34183B7E: F00A F88D BL assert_failed ; 0x3418DC9C
.L142: 0x34183B82: F248 01D0 MOVW R1, #0x80D0 0x34183B86: F2C5 6102 MOVT R1, #0x5602 0x34183B8A: 6808 LDR R0, [R1] 0x34183B8C: F64F 72FF MOVW R2, #0xFFFF 0x34183B90: F6CC 7200 MOVT R2, #0xCF00 0x34183B94: 4010 ANDS R0, R2 0x34183B96: 9B04 LDR R3, [SP, #16] 0x34183B98: 6A1A LDR R2, [R3, #32] 0x34183B9A: F8D3 C024 LDR.W R12, [R3, #36] 0x34183B9E: 2300 MOVS R3, #0 0x34183BA0: F6CF 73FF MOVT R3, #0xFFFF 0x34183BA4: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34183BA8: 431A ORRS R2, R3 0x34183BAA: 4310 ORRS R0, R2 0x34183BAC: 6008 STR R0, [R1] 0x34183BAE: F00C FB4F BL LL_RCC_IC4_Enable ; 0x34190250 0x34183BB2: E059 B 46L150 ; 0x34183C68
.L143: 0x34183BB4: 9804 LDR R0, [SP, #16] 0x34183BB6: F8D0 0130 LDR.W R0, [R0, #0x0130] 0x34183BBA: F240 411C MOVW R1, #0x041C 0x34183BBE: F2C0 3103 MOVT R1, #0x0303 0x34183BC2: 4288 CMP R0, R1 0x34183BC4: D144 BNE 46L149 ; 0x34183C50 0x34183BC6: 9804 LDR R0, [SP, #16] 0x34183BC8: 6A80 LDR R0, [R0, #40] 0x34183BCA: B170 CBZ R0, .L144 ; 0x34183BEA 0x34183BCC: 9804 LDR R0, [SP, #16] 0x34183BCE: 6A80 LDR R0, [R0, #40] 0x34183BD0: F1B0 5F80 CMP.W R0, #0x10000000 0x34183BD4: D009 BEQ 46L144 ; 0x34183BEA 0x34183BD6: 9804 LDR R0, [SP, #16] 0x34183BD8: 6A80 LDR R0, [R0, #40] 0x34183BDA: F1B0 5F00 CMP.W R0, #0x20000000 0x34183BDE: D004 BEQ 46L144 ; 0x34183BEA 0x34183BE0: 9804 LDR R0, [SP, #16] 0x34183BE2: 6A80 LDR R0, [R0, #40] 0x34183BE4: F1B0 5F40 CMP.W R0, #0x30000000 0x34183BE8: D100 BNE 46L145 ; 0x34183BEC
.L144: 0x34183BEA: E007 B 46L146 ; 0x34183BFC
.L145: 0x34183BEC: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34183BF0: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34183BF4: F240 2117 MOVW R1, #0x0217 0x34183BF8: F00A F850 BL assert_failed ; 0x3418DC9C
.L146: 0x34183BFC: 9804 LDR R0, [SP, #16] 0x34183BFE: 6AC0 LDR R0, [R0, #44] 0x34183C00: B128 CBZ R0, .L147 ; 0x34183C0E 0x34183C02: 9804 LDR R0, [SP, #16] 0x34183C04: 6AC0 LDR R0, [R0, #44] 0x34183C06: F5B0 7F80 CMP.W R0, #0x0100 0x34183C0A: D800 BHI 46L147 ; 0x34183C0E 0x34183C0C: E007 B 46L148 ; 0x34183C1E
.L147: 0x34183C0E: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34183C12: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34183C16: F44F 7106 MOV.W R1, #0x0218 0x34183C1A: F00A F83F BL assert_failed ; 0x3418DC9C
.L148: 0x34183C1E: F248 01D4 MOVW R1, #0x80D4 0x34183C22: F2C5 6102 MOVT R1, #0x5602 0x34183C26: 6808 LDR R0, [R1] 0x34183C28: F64F 72FF MOVW R2, #0xFFFF 0x34183C2C: F6CC 7200 MOVT R2, #0xCF00 0x34183C30: 4010 ANDS R0, R2 0x34183C32: 9B04 LDR R3, [SP, #16] 0x34183C34: 6A9A LDR R2, [R3, #40] 0x34183C36: F8D3 C02C LDR.W R12, [R3, #44] 0x34183C3A: 2300 MOVS R3, #0 0x34183C3C: F6CF 73FF MOVT R3, #0xFFFF 0x34183C40: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34183C44: 431A ORRS R2, R3 0x34183C46: 4310 ORRS R0, R2 0x34183C48: 6008 STR R0, [R1] 0x34183C4A: F00C FAF1 BL LL_RCC_IC5_Enable.60 ; 0x34190230 0x34183C4E: E00B B 46L150 ; 0x34183C68
.L149: 0x34183C50: 9804 LDR R0, [SP, #16] 0x34183C52: F8D0 0130 LDR.W R0, [R0, #0x0130] 0x34183C56: F240 411C MOVW R1, #0x041C 0x34183C5A: F2C0 3101 MOVT R1, #0x0301 0x34183C5E: 4288 CMP R0, R1 0x34183C60: D102 BNE 46L150 ; 0x34183C68 0x34183C62: F00C FAFD BL LL_RCC_CLKP_Enable ; 0x34190260 0x34183C66: E7FF B 46L150 ; 0x34183C68
.L150: 0x34183C68: 9804 LDR R0, [SP, #16] 0x34183C6A: F8D0 0130 LDR.W R0, [R0, #0x0130] 0x34183C6E: F004 FD0B BL LL_RCC_SetSDMMCClockSource ; 0x34188688
.L151: 0x34183C72: 9804 LDR R0, [SP, #16] 0x34183C74: 6800 LDR R0, [R0] 0x34183C76: 07C0 LSLS R0, R0, #31 0x34183C78: 2800 CMP R0, #0 0x34183C7A: F000 80F3 BEQ.W 46L170 ; 0x34183E64 0x34183C7E: 9804 LDR R0, [SP, #16] 0x34183C80: F8D0 00BC LDR.W R0, [R0, #188] 0x34183C84: B310 CBZ R0, .L152 ; 0x34183CCC 0x34183C86: 9804 LDR R0, [SP, #16] 0x34183C88: F8D0 00BC LDR.W R0, [R0, #188] 0x34183C8C: 2810 CMP R0, #16 0x34183C8E: D01D BEQ 46L152 ; 0x34183CCC 0x34183C90: 9804 LDR R0, [SP, #16] 0x34183C92: F8D0 00BC LDR.W R0, [R0, #188] 0x34183C96: 2820 CMP R0, #32 0x34183C98: D018 BEQ 46L152 ; 0x34183CCC 0x34183C9A: 9804 LDR R0, [SP, #16] 0x34183C9C: F8D0 00BC LDR.W R0, [R0, #188] 0x34183CA0: 2830 CMP R0, #48 0x34183CA2: D013 BEQ 46L152 ; 0x34183CCC 0x34183CA4: 9804 LDR R0, [SP, #16] 0x34183CA6: F8D0 00BC LDR.W R0, [R0, #188] 0x34183CAA: 2840 CMP R0, #64 0x34183CAC: D00E BEQ 46L152 ; 0x34183CCC 0x34183CAE: 9804 LDR R0, [SP, #16] 0x34183CB0: F8D0 00BC LDR.W R0, [R0, #188] 0x34183CB4: 2850 CMP R0, #80 0x34183CB6: D009 BEQ 46L152 ; 0x34183CCC 0x34183CB8: 9804 LDR R0, [SP, #16] 0x34183CBA: F8D0 00BC LDR.W R0, [R0, #188] 0x34183CBE: 2860 CMP R0, #96 0x34183CC0: D004 BEQ 46L152 ; 0x34183CCC 0x34183CC2: 9804 LDR R0, [SP, #16] 0x34183CC4: F8D0 00BC LDR.W R0, [R0, #188] 0x34183CC8: 2870 CMP R0, #112 0x34183CCA: D100 BNE 46L153 ; 0x34183CCE
.L152: 0x34183CCC: E007 B 46L154 ; 0x34183CDE
.L153: 0x34183CCE: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34183CD2: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34183CD6: F240 2132 MOVW R1, #0x0232 0x34183CDA: F009 FFDF BL assert_failed ; 0x3418DC9C
.L154: 0x34183CDE: 9804 LDR R0, [SP, #16] 0x34183CE0: F8D0 00C0 LDR.W R0, [R0, #192] 0x34183CE4: B130 CBZ R0, .L155 ; 0x34183CF4 0x34183CE6: 9804 LDR R0, [SP, #16] 0x34183CE8: F8D0 00C0 LDR.W R0, [R0, #192] 0x34183CEC: F5B0 7F80 CMP.W R0, #0x0100 0x34183CF0: D800 BHI 46L155 ; 0x34183CF4 0x34183CF2: E007 B 46L156 ; 0x34183D04
.L155: 0x34183CF4: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34183CF8: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34183CFC: F240 2133 MOVW R1, #0x0233 0x34183D00: F009 FFCC BL assert_failed ; 0x3418DC9C
.L156: 0x34183D04: 9804 LDR R0, [SP, #16] 0x34183D06: F8D0 00BC LDR.W R0, [R0, #188] 0x34183D0A: 2820 CMP R0, #32 0x34183D0C: D144 BNE 46L162 ; 0x34183D98 0x34183D0E: 9804 LDR R0, [SP, #16] 0x34183D10: 6B80 LDR R0, [R0, #56] 0x34183D12: B170 CBZ R0, .L157 ; 0x34183D32 0x34183D14: 9804 LDR R0, [SP, #16] 0x34183D16: 6B80 LDR R0, [R0, #56] 0x34183D18: F1B0 5F80 CMP.W R0, #0x10000000 0x34183D1C: D009 BEQ 46L157 ; 0x34183D32 0x34183D1E: 9804 LDR R0, [SP, #16] 0x34183D20: 6B80 LDR R0, [R0, #56] 0x34183D22: F1B0 5F00 CMP.W R0, #0x20000000 0x34183D26: D004 BEQ 46L157 ; 0x34183D32 0x34183D28: 9804 LDR R0, [SP, #16] 0x34183D2A: 6B80 LDR R0, [R0, #56] 0x34183D2C: F1B0 5F40 CMP.W R0, #0x30000000 0x34183D30: D100 BNE 46L158 ; 0x34183D34
.L157: 0x34183D32: E007 B 46L159 ; 0x34183D44
.L158: 0x34183D34: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34183D38: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34183D3C: F44F 710E MOV.W R1, #0x0238 0x34183D40: F009 FFAC BL assert_failed ; 0x3418DC9C
.L159: 0x34183D44: 9804 LDR R0, [SP, #16] 0x34183D46: 6BC0 LDR R0, [R0, #60] 0x34183D48: B128 CBZ R0, .L160 ; 0x34183D56 0x34183D4A: 9804 LDR R0, [SP, #16] 0x34183D4C: 6BC0 LDR R0, [R0, #60] 0x34183D4E: F5B0 7F80 CMP.W R0, #0x0100 0x34183D52: D800 BHI 46L160 ; 0x34183D56 0x34183D54: E007 B 46L161 ; 0x34183D66
.L160: 0x34183D56: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34183D5A: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34183D5E: F240 2139 MOVW R1, #0x0239 0x34183D62: F009 FF9B BL assert_failed ; 0x3418DC9C
.L161: 0x34183D66: F248 01DC MOVW R1, #0x80DC 0x34183D6A: F2C5 6102 MOVT R1, #0x5602 0x34183D6E: 6808 LDR R0, [R1] 0x34183D70: F64F 72FF MOVW R2, #0xFFFF 0x34183D74: F6CC 7200 MOVT R2, #0xCF00 0x34183D78: 4010 ANDS R0, R2 0x34183D7A: 9B04 LDR R3, [SP, #16] 0x34183D7C: 6B9A LDR R2, [R3, #56] 0x34183D7E: F8D3 C03C LDR.W R12, [R3, #60] 0x34183D82: 2300 MOVS R3, #0 0x34183D84: F6CF 73FF MOVT R3, #0xFFFF 0x34183D88: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34183D8C: 431A ORRS R2, R3 0x34183D8E: 4310 ORRS R0, R2 0x34183D90: 6008 STR R0, [R1] 0x34183D92: F00C FA6D BL LL_RCC_IC7_Enable ; 0x34190270 0x34183D96: E051 B 46L169 ; 0x34183E3C
.L162: 0x34183D98: 9804 LDR R0, [SP, #16] 0x34183D9A: F8D0 00BC LDR.W R0, [R0, #188] 0x34183D9E: 2830 CMP R0, #48 0x34183DA0: D144 BNE 46L168 ; 0x34183E2C 0x34183DA2: 9804 LDR R0, [SP, #16] 0x34183DA4: 6C00 LDR R0, [R0, #64] 0x34183DA6: B170 CBZ R0, .L163 ; 0x34183DC6 0x34183DA8: 9804 LDR R0, [SP, #16] 0x34183DAA: 6C00 LDR R0, [R0, #64] 0x34183DAC: F1B0 5F80 CMP.W R0, #0x10000000 0x34183DB0: D009 BEQ 46L163 ; 0x34183DC6 0x34183DB2: 9804 LDR R0, [SP, #16] 0x34183DB4: 6C00 LDR R0, [R0, #64] 0x34183DB6: F1B0 5F00 CMP.W R0, #0x20000000 0x34183DBA: D004 BEQ 46L163 ; 0x34183DC6 0x34183DBC: 9804 LDR R0, [SP, #16] 0x34183DBE: 6C00 LDR R0, [R0, #64] 0x34183DC0: F1B0 5F40 CMP.W R0, #0x30000000 0x34183DC4: D100 BNE 46L164 ; 0x34183DC8
.L163: 0x34183DC6: E007 B 46L165 ; 0x34183DD8
.L164: 0x34183DC8: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34183DCC: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34183DD0: F240 2145 MOVW R1, #0x0245 0x34183DD4: F009 FF62 BL assert_failed ; 0x3418DC9C
.L165: 0x34183DD8: 9804 LDR R0, [SP, #16] 0x34183DDA: 6C40 LDR R0, [R0, #68] 0x34183DDC: B128 CBZ R0, .L166 ; 0x34183DEA 0x34183DDE: 9804 LDR R0, [SP, #16] 0x34183DE0: 6C40 LDR R0, [R0, #68] 0x34183DE2: F5B0 7F80 CMP.W R0, #0x0100 0x34183DE6: D800 BHI 46L166 ; 0x34183DEA 0x34183DE8: E007 B 46L167 ; 0x34183DFA
.L166: 0x34183DEA: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34183DEE: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34183DF2: F240 2146 MOVW R1, #0x0246 0x34183DF6: F009 FF51 BL assert_failed ; 0x3418DC9C
.L167: 0x34183DFA: F248 01E0 MOVW R1, #0x80E0 0x34183DFE: F2C5 6102 MOVT R1, #0x5602 0x34183E02: 6808 LDR R0, [R1] 0x34183E04: F64F 72FF MOVW R2, #0xFFFF 0x34183E08: F6CC 7200 MOVT R2, #0xCF00 0x34183E0C: 4010 ANDS R0, R2 0x34183E0E: 9B04 LDR R3, [SP, #16] 0x34183E10: 6C1A LDR R2, [R3, #64] 0x34183E12: F8D3 C044 LDR.W R12, [R3, #68] 0x34183E16: 2300 MOVS R3, #0 0x34183E18: F6CF 73FF MOVT R3, #0xFFFF 0x34183E1C: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34183E20: 431A ORRS R2, R3 0x34183E22: 4310 ORRS R0, R2 0x34183E24: 6008 STR R0, [R1] 0x34183E26: F00C FA2B BL LL_RCC_IC8_Enable ; 0x34190280 0x34183E2A: E007 B 46L169 ; 0x34183E3C
.L168: 0x34183E2C: 9804 LDR R0, [SP, #16] 0x34183E2E: F8D0 00BC LDR.W R0, [R0, #188] 0x34183E32: 2810 CMP R0, #16 0x34183E34: D102 BNE 46L169 ; 0x34183E3C 0x34183E36: F00C FA13 BL LL_RCC_CLKP_Enable ; 0x34190260 0x34183E3A: E7FF B 46L169 ; 0x34183E3C
.L169: 0x34183E3C: F248 1144 MOVW R1, #0x8144 0x34183E40: F2C5 6102 MOVT R1, #0x5602 0x34183E44: 6808 LDR R0, [R1] 0x34183E46: F64F 7270 MOVW R2, #0xFF70 0x34183E4A: 4390 BICS R0, R2 0x34183E4C: 9A04 LDR R2, [SP, #16] 0x34183E4E: F8D2 30BC LDR.W R3, [R2, #188] 0x34183E52: F8D2 C0C0 LDR.W R12, [R2, #192] 0x34183E56: F06F 02FF MVN R2, #255 0x34183E5A: EB02 220C ADD.W R2, R2, R12, LSL #8 0x34183E5E: 431A ORRS R2, R3 0x34183E60: 4310 ORRS R0, R2 0x34183E62: 6008 STR R0, [R1]
.L170: 0x34183E64: 9804 LDR R0, [SP, #16] 0x34183E66: 7800 LDRB R0, [R0] 0x34183E68: 0780 LSLS R0, R0, #30 0x34183E6A: 2800 CMP R0, #0 0x34183E6C: F140 80D1 BPL.W 46L187 ; 0x34184012 0x34183E70: 9804 LDR R0, [SP, #16] 0x34183E72: F8D0 00C4 LDR.W R0, [R0, #196] 0x34183E76: B310 CBZ R0, .L171 ; 0x34183EBE 0x34183E78: 9804 LDR R0, [SP, #16] 0x34183E7A: F8D0 00C4 LDR.W R0, [R0, #196] 0x34183E7E: 2801 CMP R0, #1 0x34183E80: D01D BEQ 46L171 ; 0x34183EBE 0x34183E82: 9804 LDR R0, [SP, #16] 0x34183E84: F8D0 00C4 LDR.W R0, [R0, #196] 0x34183E88: 2802 CMP R0, #2 0x34183E8A: D018 BEQ 46L171 ; 0x34183EBE 0x34183E8C: 9804 LDR R0, [SP, #16] 0x34183E8E: F8D0 00C4 LDR.W R0, [R0, #196] 0x34183E92: 2803 CMP R0, #3 0x34183E94: D013 BEQ 46L171 ; 0x34183EBE 0x34183E96: 9804 LDR R0, [SP, #16] 0x34183E98: F8D0 00C4 LDR.W R0, [R0, #196] 0x34183E9C: 2804 CMP R0, #4 0x34183E9E: D00E BEQ 46L171 ; 0x34183EBE 0x34183EA0: 9804 LDR R0, [SP, #16] 0x34183EA2: F8D0 00C4 LDR.W R0, [R0, #196] 0x34183EA6: 2805 CMP R0, #5 0x34183EA8: D009 BEQ 46L171 ; 0x34183EBE 0x34183EAA: 9804 LDR R0, [SP, #16] 0x34183EAC: F8D0 00C4 LDR.W R0, [R0, #196] 0x34183EB0: 2806 CMP R0, #6 0x34183EB2: D004 BEQ 46L171 ; 0x34183EBE 0x34183EB4: 9804 LDR R0, [SP, #16] 0x34183EB6: F8D0 00C4 LDR.W R0, [R0, #196] 0x34183EBA: 2807 CMP R0, #7 0x34183EBC: D100 BNE 46L172 ; 0x34183EC0
.L171: 0x34183EBE: E007 B 46L173 ; 0x34183ED0
.L172: 0x34183EC0: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34183EC4: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34183EC8: F240 2161 MOVW R1, #0x0261 0x34183ECC: F009 FEE6 BL assert_failed ; 0x3418DC9C
.L173: 0x34183ED0: 9804 LDR R0, [SP, #16] 0x34183ED2: F8D0 00C4 LDR.W R0, [R0, #196] 0x34183ED6: 2802 CMP R0, #2 0x34183ED8: D144 BNE 46L179 ; 0x34183F64 0x34183EDA: 9804 LDR R0, [SP, #16] 0x34183EDC: 6B80 LDR R0, [R0, #56] 0x34183EDE: B170 CBZ R0, .L174 ; 0x34183EFE 0x34183EE0: 9804 LDR R0, [SP, #16] 0x34183EE2: 6B80 LDR R0, [R0, #56] 0x34183EE4: F1B0 5F80 CMP.W R0, #0x10000000 0x34183EE8: D009 BEQ 46L174 ; 0x34183EFE 0x34183EEA: 9804 LDR R0, [SP, #16] 0x34183EEC: 6B80 LDR R0, [R0, #56] 0x34183EEE: F1B0 5F00 CMP.W R0, #0x20000000 0x34183EF2: D004 BEQ 46L174 ; 0x34183EFE 0x34183EF4: 9804 LDR R0, [SP, #16] 0x34183EF6: 6B80 LDR R0, [R0, #56] 0x34183EF8: F1B0 5F40 CMP.W R0, #0x30000000 0x34183EFC: D100 BNE 46L175 ; 0x34183F00
.L174: 0x34183EFE: E007 B 46L176 ; 0x34183F10
.L175: 0x34183F00: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34183F04: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34183F08: F240 2166 MOVW R1, #0x0266 0x34183F0C: F009 FEC6 BL assert_failed ; 0x3418DC9C
.L176: 0x34183F10: 9804 LDR R0, [SP, #16] 0x34183F12: 6BC0 LDR R0, [R0, #60] 0x34183F14: B128 CBZ R0, .L177 ; 0x34183F22 0x34183F16: 9804 LDR R0, [SP, #16] 0x34183F18: 6BC0 LDR R0, [R0, #60] 0x34183F1A: F5B0 7F80 CMP.W R0, #0x0100 0x34183F1E: D800 BHI 46L177 ; 0x34183F22 0x34183F20: E007 B 46L178 ; 0x34183F32
.L177: 0x34183F22: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34183F26: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34183F2A: F240 2167 MOVW R1, #0x0267 0x34183F2E: F009 FEB5 BL assert_failed ; 0x3418DC9C
.L178: 0x34183F32: F248 01DC MOVW R1, #0x80DC 0x34183F36: F2C5 6102 MOVT R1, #0x5602 0x34183F3A: 6808 LDR R0, [R1] 0x34183F3C: F64F 72FF MOVW R2, #0xFFFF 0x34183F40: F6CC 7200 MOVT R2, #0xCF00 0x34183F44: 4010 ANDS R0, R2 0x34183F46: 9B04 LDR R3, [SP, #16] 0x34183F48: 6B9A LDR R2, [R3, #56] 0x34183F4A: F8D3 C03C LDR.W R12, [R3, #60] 0x34183F4E: 2300 MOVS R3, #0 0x34183F50: F6CF 73FF MOVT R3, #0xFFFF 0x34183F54: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34183F58: 431A ORRS R2, R3 0x34183F5A: 4310 ORRS R0, R2 0x34183F5C: 6008 STR R0, [R1] 0x34183F5E: F00C F987 BL LL_RCC_IC7_Enable ; 0x34190270 0x34183F62: E051 B 46L186 ; 0x34184008
.L179: 0x34183F64: 9804 LDR R0, [SP, #16] 0x34183F66: F8D0 00C4 LDR.W R0, [R0, #196] 0x34183F6A: 2803 CMP R0, #3 0x34183F6C: D144 BNE 46L185 ; 0x34183FF8 0x34183F6E: 9804 LDR R0, [SP, #16] 0x34183F70: 6C00 LDR R0, [R0, #64] 0x34183F72: B170 CBZ R0, .L180 ; 0x34183F92 0x34183F74: 9804 LDR R0, [SP, #16] 0x34183F76: 6C00 LDR R0, [R0, #64] 0x34183F78: F1B0 5F80 CMP.W R0, #0x10000000 0x34183F7C: D009 BEQ 46L180 ; 0x34183F92 0x34183F7E: 9804 LDR R0, [SP, #16] 0x34183F80: 6C00 LDR R0, [R0, #64] 0x34183F82: F1B0 5F00 CMP.W R0, #0x20000000 0x34183F86: D004 BEQ 46L180 ; 0x34183F92 0x34183F88: 9804 LDR R0, [SP, #16] 0x34183F8A: 6C00 LDR R0, [R0, #64] 0x34183F8C: F1B0 5F40 CMP.W R0, #0x30000000 0x34183F90: D100 BNE 46L181 ; 0x34183F94
.L180: 0x34183F92: E007 B 46L182 ; 0x34183FA4
.L181: 0x34183F94: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34183F98: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34183F9C: F240 2173 MOVW R1, #0x0273 0x34183FA0: F009 FE7C BL assert_failed ; 0x3418DC9C
.L182: 0x34183FA4: 9804 LDR R0, [SP, #16] 0x34183FA6: 6C40 LDR R0, [R0, #68] 0x34183FA8: B128 CBZ R0, .L183 ; 0x34183FB6 0x34183FAA: 9804 LDR R0, [SP, #16] 0x34183FAC: 6C40 LDR R0, [R0, #68] 0x34183FAE: F5B0 7F80 CMP.W R0, #0x0100 0x34183FB2: D800 BHI 46L183 ; 0x34183FB6 0x34183FB4: E007 B 46L184 ; 0x34183FC6
.L183: 0x34183FB6: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34183FBA: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34183FBE: F44F 711D MOV.W R1, #0x0274 0x34183FC2: F009 FE6B BL assert_failed ; 0x3418DC9C
.L184: 0x34183FC6: F248 01E0 MOVW R1, #0x80E0 0x34183FCA: F2C5 6102 MOVT R1, #0x5602 0x34183FCE: 6808 LDR R0, [R1] 0x34183FD0: F64F 72FF MOVW R2, #0xFFFF 0x34183FD4: F6CC 7200 MOVT R2, #0xCF00 0x34183FD8: 4010 ANDS R0, R2 0x34183FDA: 9B04 LDR R3, [SP, #16] 0x34183FDC: 6C1A LDR R2, [R3, #64] 0x34183FDE: F8D3 C044 LDR.W R12, [R3, #68] 0x34183FE2: 2300 MOVS R3, #0 0x34183FE4: F6CF 73FF MOVT R3, #0xFFFF 0x34183FE8: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34183FEC: 431A ORRS R2, R3 0x34183FEE: 4310 ORRS R0, R2 0x34183FF0: 6008 STR R0, [R1] 0x34183FF2: F00C F945 BL LL_RCC_IC8_Enable ; 0x34190280 0x34183FF6: E007 B 46L186 ; 0x34184008
.L185: 0x34183FF8: 9804 LDR R0, [SP, #16] 0x34183FFA: F8D0 00C4 LDR.W R0, [R0, #196] 0x34183FFE: 2801 CMP R0, #1 0x34184000: D102 BNE 46L186 ; 0x34184008 0x34184002: F00C F92D BL LL_RCC_CLKP_Enable ; 0x34190260 0x34184006: E7FF B 46L186 ; 0x34184008
.L186: 0x34184008: 9804 LDR R0, [SP, #16] 0x3418400A: F8D0 00C4 LDR.W R0, [R0, #196] 0x3418400E: F004 FB43 BL LL_RCC_SetADFClockSource ; 0x34188698
.L187: 0x34184012: 9804 LDR R0, [SP, #16] 0x34184014: 7800 LDRB R0, [R0] 0x34184016: 0700 LSLS R0, R0, #28 0x34184018: 2800 CMP R0, #0 0x3418401A: D54A BPL 46L193 ; 0x341840B2 0x3418401C: 9804 LDR R0, [SP, #16] 0x3418401E: F8D0 0090 LDR.W R0, [R0, #144] 0x34184022: B188 CBZ R0, .L188 ; 0x34184048 0x34184024: 9804 LDR R0, [SP, #16] 0x34184026: F8D0 0090 LDR.W R0, [R0, #144] 0x3418402A: F1B0 5F80 CMP.W R0, #0x10000000 0x3418402E: D00B BEQ 46L188 ; 0x34184048 0x34184030: 9804 LDR R0, [SP, #16] 0x34184032: F8D0 0090 LDR.W R0, [R0, #144] 0x34184036: F1B0 5F00 CMP.W R0, #0x20000000 0x3418403A: D005 BEQ 46L188 ; 0x34184048 0x3418403C: 9804 LDR R0, [SP, #16] 0x3418403E: F8D0 0090 LDR.W R0, [R0, #144] 0x34184042: F1B0 5F40 CMP.W R0, #0x30000000 0x34184046: D100 BNE 46L189 ; 0x3418404A
.L188: 0x34184048: E007 B 46L190 ; 0x3418405A
.L189: 0x3418404A: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x3418404E: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34184052: F240 218E MOVW R1, #0x028E 0x34184056: F009 FE21 BL assert_failed ; 0x3418DC9C
.L190: 0x3418405A: 9804 LDR R0, [SP, #16] 0x3418405C: F8D0 0094 LDR.W R0, [R0, #148] 0x34184060: B130 CBZ R0, .L191 ; 0x34184070 0x34184062: 9804 LDR R0, [SP, #16] 0x34184064: F8D0 0094 LDR.W R0, [R0, #148] 0x34184068: F5B0 7F80 CMP.W R0, #0x0100 0x3418406C: D800 BHI 46L191 ; 0x34184070 0x3418406E: E007 B 46L192 ; 0x34184080
.L191: 0x34184070: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34184074: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34184078: F240 218F MOVW R1, #0x028F 0x3418407C: F009 FE0E BL assert_failed ; 0x3418DC9C
.L192: 0x34184080: F248 1108 MOVW R1, #0x8108 0x34184084: F2C5 6102 MOVT R1, #0x5602 0x34184088: 6808 LDR R0, [R1] 0x3418408A: F64F 72FF MOVW R2, #0xFFFF 0x3418408E: F6CC 7200 MOVT R2, #0xCF00 0x34184092: 4010 ANDS R0, R2 0x34184094: 9B04 LDR R3, [SP, #16] 0x34184096: F8D3 2090 LDR.W R2, [R3, #144] 0x3418409A: F8D3 C094 LDR.W R12, [R3, #148] 0x3418409E: 2300 MOVS R3, #0 0x341840A0: F6CF 73FF MOVT R3, #0xFFFF 0x341840A4: EB03 430C ADD.W R3, R3, R12, LSL #16 0x341840A8: 431A ORRS R2, R3 0x341840AA: 4310 ORRS R0, R2 0x341840AC: 6008 STR R0, [R1] 0x341840AE: F004 FB01 BL LL_RCC_IC18_Enable ; 0x341886B4
.L193: 0x341840B2: 9804 LDR R0, [SP, #16] 0x341840B4: 7800 LDRB R0, [R0] 0x341840B6: 06C0 LSLS R0, R0, #27 0x341840B8: 2800 CMP R0, #0 0x341840BA: D57E BPL 46L204 ; 0x341841BA 0x341840BC: 9804 LDR R0, [SP, #16] 0x341840BE: F8D0 00C8 LDR.W R0, [R0, #200] 0x341840C2: B188 CBZ R0, .L194 ; 0x341840E8 0x341840C4: 9804 LDR R0, [SP, #16] 0x341840C6: F8D0 00C8 LDR.W R0, [R0, #200] 0x341840CA: F5B0 1F80 CMP.W R0, #0x100000 0x341840CE: D00B BEQ 46L194 ; 0x341840E8 0x341840D0: 9804 LDR R0, [SP, #16] 0x341840D2: F8D0 00C8 LDR.W R0, [R0, #200] 0x341840D6: F5B0 1F00 CMP.W R0, #0x200000 0x341840DA: D005 BEQ 46L194 ; 0x341840E8 0x341840DC: 9804 LDR R0, [SP, #16] 0x341840DE: F8D0 00C8 LDR.W R0, [R0, #200] 0x341840E2: F5B0 1F40 CMP.W R0, #0x300000 0x341840E6: D100 BNE 46L195 ; 0x341840EA
.L194: 0x341840E8: E007 B 46L196 ; 0x341840FA
.L195: 0x341840EA: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341840EE: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341840F2: F240 219D MOVW R1, #0x029D 0x341840F6: F009 FDD1 BL assert_failed ; 0x3418DC9C
.L196: 0x341840FA: 9804 LDR R0, [SP, #16] 0x341840FC: F8D0 00C8 LDR.W R0, [R0, #200] 0x34184100: F5B0 1F00 CMP.W R0, #0x200000 0x34184104: D14B BNE 46L202 ; 0x3418419E 0x34184106: 9804 LDR R0, [SP, #16] 0x34184108: F8D0 0088 LDR.W R0, [R0, #136] 0x3418410C: B188 CBZ R0, .L197 ; 0x34184132 0x3418410E: 9804 LDR R0, [SP, #16] 0x34184110: F8D0 0088 LDR.W R0, [R0, #136] 0x34184114: F1B0 5F80 CMP.W R0, #0x10000000 0x34184118: D00B BEQ 46L197 ; 0x34184132 0x3418411A: 9804 LDR R0, [SP, #16] 0x3418411C: F8D0 0088 LDR.W R0, [R0, #136] 0x34184120: F1B0 5F00 CMP.W R0, #0x20000000 0x34184124: D005 BEQ 46L197 ; 0x34184132 0x34184126: 9804 LDR R0, [SP, #16] 0x34184128: F8D0 0088 LDR.W R0, [R0, #136] 0x3418412C: F1B0 5F40 CMP.W R0, #0x30000000 0x34184130: D100 BNE 46L198 ; 0x34184134
.L197: 0x34184132: E007 B 46L199 ; 0x34184144
.L198: 0x34184134: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34184138: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x3418413C: F240 21A2 MOVW R1, #0x02A2 0x34184140: F009 FDAC BL assert_failed ; 0x3418DC9C
.L199: 0x34184144: 9804 LDR R0, [SP, #16] 0x34184146: F8D0 008C LDR.W R0, [R0, #140] 0x3418414A: B130 CBZ R0, .L200 ; 0x3418415A 0x3418414C: 9804 LDR R0, [SP, #16] 0x3418414E: F8D0 008C LDR.W R0, [R0, #140] 0x34184152: F5B0 7F80 CMP.W R0, #0x0100 0x34184156: D800 BHI 46L200 ; 0x3418415A 0x34184158: E007 B 46L201 ; 0x3418416A
.L200: 0x3418415A: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x3418415E: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34184162: F240 21A3 MOVW R1, #0x02A3 0x34184166: F009 FD99 BL assert_failed ; 0x3418DC9C
.L201: 0x3418416A: F248 1104 MOVW R1, #0x8104 0x3418416E: F2C5 6102 MOVT R1, #0x5602 0x34184172: 6808 LDR R0, [R1] 0x34184174: F64F 72FF MOVW R2, #0xFFFF 0x34184178: F6CC 7200 MOVT R2, #0xCF00 0x3418417C: 4010 ANDS R0, R2 0x3418417E: 9B04 LDR R3, [SP, #16] 0x34184180: F8D3 2088 LDR.W R2, [R3, #136] 0x34184184: F8D3 C08C LDR.W R12, [R3, #140] 0x34184188: 2300 MOVS R3, #0 0x3418418A: F6CF 73FF MOVT R3, #0xFFFF 0x3418418E: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34184192: 431A ORRS R2, R3 0x34184194: 4310 ORRS R0, R2 0x34184196: 6008 STR R0, [R1] 0x34184198: F004 FA94 BL LL_RCC_IC17_Enable ; 0x341886C4 0x3418419C: E008 B 46L203 ; 0x341841B0
.L202: 0x3418419E: 9804 LDR R0, [SP, #16] 0x341841A0: F8D0 00C8 LDR.W R0, [R0, #200] 0x341841A4: F5B0 1F80 CMP.W R0, #0x100000 0x341841A8: D102 BNE 46L203 ; 0x341841B0 0x341841AA: F00C F859 BL LL_RCC_CLKP_Enable ; 0x34190260 0x341841AE: E7FF B 46L203 ; 0x341841B0
.L203: 0x341841B0: 9804 LDR R0, [SP, #16] 0x341841B2: F8D0 00C8 LDR.W R0, [R0, #200] 0x341841B6: F004 FA8D BL LL_RCC_SetDCMIPPClockSource ; 0x341886D4
.L204: 0x341841BA: 9804 LDR R0, [SP, #16] 0x341841BC: 7800 LDRB R0, [R0] 0x341841BE: 0680 LSLS R0, R0, #26 0x341841C0: 2800 CMP R0, #0 0x341841C2: D577 BPL 46L215 ; 0x341842B4 0x341841C4: 9804 LDR R0, [SP, #16] 0x341841C6: F8D0 00CC LDR.W R0, [R0, #204] 0x341841CA: B188 CBZ R0, .L205 ; 0x341841F0 0x341841CC: 9804 LDR R0, [SP, #16] 0x341841CE: F8D0 00CC LDR.W R0, [R0, #204] 0x341841D2: F5B0 5F80 CMP.W R0, #0x1000 0x341841D6: D00B BEQ 46L205 ; 0x341841F0 0x341841D8: 9804 LDR R0, [SP, #16] 0x341841DA: F8D0 00CC LDR.W R0, [R0, #204] 0x341841DE: F5B0 5F00 CMP.W R0, #0x2000 0x341841E2: D005 BEQ 46L205 ; 0x341841F0 0x341841E4: 9804 LDR R0, [SP, #16] 0x341841E6: F8D0 00CC LDR.W R0, [R0, #204] 0x341841EA: F5B0 5F40 CMP.W R0, #0x3000 0x341841EE: D100 BNE 46L206 ; 0x341841F2
.L205: 0x341841F0: E007 B 46L207 ; 0x34184202
.L206: 0x341841F2: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341841F6: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341841FA: F240 21BD MOVW R1, #0x02BD 0x341841FE: F009 FD4D BL assert_failed ; 0x3418DC9C
.L207: 0x34184202: 9804 LDR R0, [SP, #16] 0x34184204: F8D0 00CC LDR.W R0, [R0, #204] 0x34184208: F5B0 5F00 CMP.W R0, #0x2000 0x3418420C: D144 BNE 46L213 ; 0x34184298 0x3418420E: 9804 LDR R0, [SP, #16] 0x34184210: 6E00 LDR R0, [R0, #96] 0x34184212: B170 CBZ R0, .L208 ; 0x34184232 0x34184214: 9804 LDR R0, [SP, #16] 0x34184216: 6E00 LDR R0, [R0, #96] 0x34184218: F1B0 5F80 CMP.W R0, #0x10000000 0x3418421C: D009 BEQ 46L208 ; 0x34184232 0x3418421E: 9804 LDR R0, [SP, #16] 0x34184220: 6E00 LDR R0, [R0, #96] 0x34184222: F1B0 5F00 CMP.W R0, #0x20000000 0x34184226: D004 BEQ 46L208 ; 0x34184232 0x34184228: 9804 LDR R0, [SP, #16] 0x3418422A: 6E00 LDR R0, [R0, #96] 0x3418422C: F1B0 5F40 CMP.W R0, #0x30000000 0x34184230: D100 BNE 46L209 ; 0x34184234
.L208: 0x34184232: E007 B 46L210 ; 0x34184244
.L209: 0x34184234: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34184238: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x3418423C: F240 21C2 MOVW R1, #0x02C2 0x34184240: F009 FD2C BL assert_failed ; 0x3418DC9C
.L210: 0x34184244: 9804 LDR R0, [SP, #16] 0x34184246: 6E40 LDR R0, [R0, #100] 0x34184248: B128 CBZ R0, .L211 ; 0x34184256 0x3418424A: 9804 LDR R0, [SP, #16] 0x3418424C: 6E40 LDR R0, [R0, #100] 0x3418424E: F5B0 7F80 CMP.W R0, #0x0100 0x34184252: D800 BHI 46L211 ; 0x34184256 0x34184254: E007 B 46L212 ; 0x34184266
.L211: 0x34184256: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x3418425A: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x3418425E: F240 21C3 MOVW R1, #0x02C3 0x34184262: F009 FD1B BL assert_failed ; 0x3418DC9C
.L212: 0x34184266: F248 01F0 MOVW R1, #0x80F0 0x3418426A: F2C5 6102 MOVT R1, #0x5602 0x3418426E: 6808 LDR R0, [R1] 0x34184270: F64F 72FF MOVW R2, #0xFFFF 0x34184274: F6CC 7200 MOVT R2, #0xCF00 0x34184278: 4010 ANDS R0, R2 0x3418427A: 9B04 LDR R3, [SP, #16] 0x3418427C: 6E1A LDR R2, [R3, #96] 0x3418427E: F8D3 C064 LDR.W R12, [R3, #100] 0x34184282: 2300 MOVS R3, #0 0x34184284: F6CF 73FF MOVT R3, #0xFFFF 0x34184288: EB03 430C ADD.W R3, R3, R12, LSL #16 0x3418428C: 431A ORRS R2, R3 0x3418428E: 4310 ORRS R0, R2 0x34184290: 6008 STR R0, [R1] 0x34184292: F004 FA2D BL LL_RCC_IC12_Enable ; 0x341886F0 0x34184296: E008 B 46L214 ; 0x341842AA
.L213: 0x34184298: 9804 LDR R0, [SP, #16] 0x3418429A: F8D0 00CC LDR.W R0, [R0, #204] 0x3418429E: F5B0 5F80 CMP.W R0, #0x1000 0x341842A2: D102 BNE 46L214 ; 0x341842AA 0x341842A4: F00B FFDC BL LL_RCC_CLKP_Enable ; 0x34190260 0x341842A8: E7FF B 46L214 ; 0x341842AA
.L214: 0x341842AA: 9804 LDR R0, [SP, #16] 0x341842AC: F8D0 00CC LDR.W R0, [R0, #204] 0x341842B0: F004 FA26 BL LL_RCC_SetETHClockSource ; 0x34188700
.L215: 0x341842B4: 9804 LDR R0, [SP, #16] 0x341842B6: 7800 LDRB R0, [R0] 0x341842B8: 0640 LSLS R0, R0, #25 0x341842BA: 2800 CMP R0, #0 0x341842BC: D51D BPL 46L219 ; 0x341842FA 0x341842BE: 9804 LDR R0, [SP, #16] 0x341842C0: F8D0 00D0 LDR.W R0, [R0, #208] 0x341842C4: B158 CBZ R0, .L216 ; 0x341842DE 0x341842C6: 9804 LDR R0, [SP, #16] 0x341842C8: F8D0 00D0 LDR.W R0, [R0, #208] 0x341842CC: F5B0 3F80 CMP.W R0, #0x010000 0x341842D0: D005 BEQ 46L216 ; 0x341842DE 0x341842D2: 9804 LDR R0, [SP, #16] 0x341842D4: F8D0 00D0 LDR.W R0, [R0, #208] 0x341842D8: F5B0 2F80 CMP.W R0, #0x040000 0x341842DC: D100 BNE 46L217 ; 0x341842E0
.L216: 0x341842DE: E007 B 46L218 ; 0x341842F0
.L217: 0x341842E0: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341842E4: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341842E8: F240 21DD MOVW R1, #0x02DD 0x341842EC: F009 FCD6 BL assert_failed ; 0x3418DC9C
.L218: 0x341842F0: 9804 LDR R0, [SP, #16] 0x341842F2: F8D0 00D0 LDR.W R0, [R0, #208] 0x341842F6: F004 FA11 BL LL_RCC_SetETHPHYInterface ; 0x3418871C
.L219: 0x341842FA: 9804 LDR R0, [SP, #16] 0x341842FC: 7800 LDRB R0, [R0] 0x341842FE: 0600 LSLS R0, R0, #24 0x34184300: 2800 CMP R0, #0 0x34184302: D517 BPL 46L223 ; 0x34184334 0x34184304: 9804 LDR R0, [SP, #16] 0x34184306: F8D0 00D4 LDR.W R0, [R0, #212] 0x3418430A: B128 CBZ R0, .L220 ; 0x34184318 0x3418430C: 9804 LDR R0, [SP, #16] 0x3418430E: F8D0 00D4 LDR.W R0, [R0, #212] 0x34184312: F5B0 1F80 CMP.W R0, #0x100000 0x34184316: D100 BNE 46L221 ; 0x3418431A
.L220: 0x34184318: E007 B 46L222 ; 0x3418432A
.L221: 0x3418431A: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x3418431E: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34184322: F240 21E7 MOVW R1, #0x02E7 0x34184326: F009 FCB9 BL assert_failed ; 0x3418DC9C
.L222: 0x3418432A: 9804 LDR R0, [SP, #16] 0x3418432C: F8D0 00D4 LDR.W R0, [R0, #212] 0x34184330: F004 FA02 BL LL_RCC_SetETHREFRXClockSource ; 0x34188738
.L223: 0x34184334: 9804 LDR R0, [SP, #16] 0x34184336: 7840 LDRB R0, [R0, #1] 0x34184338: 07C0 LSLS R0, R0, #31 0x3418433A: B1B8 CBZ R0, .L227 ; 0x3418436C 0x3418433C: 9804 LDR R0, [SP, #16] 0x3418433E: F8D0 00D8 LDR.W R0, [R0, #216] 0x34184342: B128 CBZ R0, .L224 ; 0x34184350 0x34184344: 9804 LDR R0, [SP, #16] 0x34184346: F8D0 00D8 LDR.W R0, [R0, #216] 0x3418434A: F1B0 7F80 CMP.W R0, #0x01000000 0x3418434E: D100 BNE 46L225 ; 0x34184352
.L224: 0x34184350: E007 B 46L226 ; 0x34184362
.L225: 0x34184352: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34184356: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x3418435A: F240 21F1 MOVW R1, #0x02F1 0x3418435E: F009 FC9D BL assert_failed ; 0x3418DC9C
.L226: 0x34184362: 9804 LDR R0, [SP, #16] 0x34184364: F8D0 00D8 LDR.W R0, [R0, #216] 0x34184368: F004 F9F4 BL LL_RCC_SetETHREFTXClockSource ; 0x34188754
.L227: 0x3418436C: 9804 LDR R0, [SP, #16] 0x3418436E: 7840 LDRB R0, [R0, #1] 0x34184370: 0780 LSLS R0, R0, #30 0x34184372: 2800 CMP R0, #0 0x34184374: F140 8093 BPL.W 46L240 ; 0x3418449E 0x34184378: 9804 LDR R0, [SP, #16] 0x3418437A: F8D0 00DC LDR.W R0, [R0, #220] 0x3418437E: B170 CBZ R0, .L228 ; 0x3418439E 0x34184380: 9804 LDR R0, [SP, #16] 0x34184382: F8D0 00DC LDR.W R0, [R0, #220] 0x34184386: 2801 CMP R0, #1 0x34184388: D009 BEQ 46L228 ; 0x3418439E 0x3418438A: 9804 LDR R0, [SP, #16] 0x3418438C: F8D0 00DC LDR.W R0, [R0, #220] 0x34184390: 2802 CMP R0, #2 0x34184392: D004 BEQ 46L228 ; 0x3418439E 0x34184394: 9804 LDR R0, [SP, #16] 0x34184396: F8D0 00DC LDR.W R0, [R0, #220] 0x3418439A: 2803 CMP R0, #3 0x3418439C: D100 BNE 46L229 ; 0x341843A0
.L228: 0x3418439E: E007 B 46L230 ; 0x341843B0
.L229: 0x341843A0: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341843A4: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341843A8: F240 21FB MOVW R1, #0x02FB 0x341843AC: F009 FC76 BL assert_failed ; 0x3418DC9C
.L230: 0x341843B0: 9804 LDR R0, [SP, #16] 0x341843B2: F8D0 00E0 LDR.W R0, [R0, #224] 0x341843B6: B128 CBZ R0, .L231 ; 0x341843C4 0x341843B8: 9804 LDR R0, [SP, #16] 0x341843BA: F8D0 00E0 LDR.W R0, [R0, #224] 0x341843BE: 2810 CMP R0, #16 0x341843C0: D800 BHI 46L231 ; 0x341843C4 0x341843C2: E007 B 46L232 ; 0x341843D4
.L231: 0x341843C4: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341843C8: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341843CC: F44F 713F MOV.W R1, #0x02FC 0x341843D0: F009 FC64 BL assert_failed ; 0x3418DC9C
.L232: 0x341843D4: 9804 LDR R0, [SP, #16] 0x341843D6: F8D0 00DC LDR.W R0, [R0, #220] 0x341843DA: 2802 CMP R0, #2 0x341843DC: D144 BNE 46L238 ; 0x34184468 0x341843DE: 9804 LDR R0, [SP, #16] 0x341843E0: 6E80 LDR R0, [R0, #104] 0x341843E2: B170 CBZ R0, .L233 ; 0x34184402 0x341843E4: 9804 LDR R0, [SP, #16] 0x341843E6: 6E80 LDR R0, [R0, #104] 0x341843E8: F1B0 5F80 CMP.W R0, #0x10000000 0x341843EC: D009 BEQ 46L233 ; 0x34184402 0x341843EE: 9804 LDR R0, [SP, #16] 0x341843F0: 6E80 LDR R0, [R0, #104] 0x341843F2: F1B0 5F00 CMP.W R0, #0x20000000 0x341843F6: D004 BEQ 46L233 ; 0x34184402 0x341843F8: 9804 LDR R0, [SP, #16] 0x341843FA: 6E80 LDR R0, [R0, #104] 0x341843FC: F1B0 5F40 CMP.W R0, #0x30000000 0x34184400: D100 BNE 46L234 ; 0x34184404
.L233: 0x34184402: E007 B 46L235 ; 0x34184414
.L234: 0x34184404: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34184408: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x3418440C: F240 3101 MOVW R1, #0x0301 0x34184410: F009 FC44 BL assert_failed ; 0x3418DC9C
.L235: 0x34184414: 9804 LDR R0, [SP, #16] 0x34184416: 6EC0 LDR R0, [R0, #108] 0x34184418: B128 CBZ R0, .L236 ; 0x34184426 0x3418441A: 9804 LDR R0, [SP, #16] 0x3418441C: 6EC0 LDR R0, [R0, #108] 0x3418441E: F5B0 7F80 CMP.W R0, #0x0100 0x34184422: D800 BHI 46L236 ; 0x34184426 0x34184424: E007 B 46L237 ; 0x34184436
.L236: 0x34184426: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x3418442A: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x3418442E: F240 3102 MOVW R1, #0x0302 0x34184432: F009 FC33 BL assert_failed ; 0x3418DC9C
.L237: 0x34184436: F248 01F4 MOVW R1, #0x80F4 0x3418443A: F2C5 6102 MOVT R1, #0x5602 0x3418443E: 6808 LDR R0, [R1] 0x34184440: F64F 72FF MOVW R2, #0xFFFF 0x34184444: F6CC 7200 MOVT R2, #0xCF00 0x34184448: 4010 ANDS R0, R2 0x3418444A: 9B04 LDR R3, [SP, #16] 0x3418444C: 6E9A LDR R2, [R3, #104] 0x3418444E: F8D3 C06C LDR.W R12, [R3, #108] 0x34184452: 2300 MOVS R3, #0 0x34184454: F6CF 73FF MOVT R3, #0xFFFF 0x34184458: EB03 430C ADD.W R3, R3, R12, LSL #16 0x3418445C: 431A ORRS R2, R3 0x3418445E: 4310 ORRS R0, R2 0x34184460: 6008 STR R0, [R1] 0x34184462: F004 F985 BL LL_RCC_IC13_Enable ; 0x34188770 0x34184466: E007 B 46L239 ; 0x34184478
.L238: 0x34184468: 9804 LDR R0, [SP, #16] 0x3418446A: F8D0 00DC LDR.W R0, [R0, #220] 0x3418446E: 2801 CMP R0, #1 0x34184470: D102 BNE 46L239 ; 0x34184478 0x34184472: F00B FEF5 BL LL_RCC_CLKP_Enable ; 0x34190260 0x34184476: E7FF B 46L239 ; 0x34184478
.L239: 0x34184478: F248 1148 MOVW R1, #0x8148 0x3418447C: F2C5 6102 MOVT R1, #0x5602 0x34184480: 6808 LDR R0, [R1] 0x34184482: F020 00F3 BIC R0, R0, #243 0x34184486: 9A04 LDR R2, [SP, #16] 0x34184488: F8D2 30DC LDR.W R3, [R2, #220] 0x3418448C: F8D2 C0E0 LDR.W R12, [R2, #224] 0x34184490: F06F 020F MVN R2, #15 0x34184494: EB02 120C ADD.W R2, R2, R12, LSL #4 0x34184498: 431A ORRS R2, R3 0x3418449A: 4310 ORRS R0, R2 0x3418449C: 6008 STR R0, [R1]
.L240: 0x3418449E: 9804 LDR R0, [SP, #16] 0x341844A0: 7840 LDRB R0, [R0, #1] 0x341844A2: 0740 LSLS R0, R0, #29 0x341844A4: 2800 CMP R0, #0 0x341844A6: D579 BPL 46L251 ; 0x3418459C 0x341844A8: 9804 LDR R0, [SP, #16] 0x341844AA: F8D0 00E4 LDR.W R0, [R0, #228] 0x341844AE: B170 CBZ R0, .L241 ; 0x341844CE 0x341844B0: 9804 LDR R0, [SP, #16] 0x341844B2: F8D0 00E4 LDR.W R0, [R0, #228] 0x341844B6: 2801 CMP R0, #1 0x341844B8: D009 BEQ 46L241 ; 0x341844CE 0x341844BA: 9804 LDR R0, [SP, #16] 0x341844BC: F8D0 00E4 LDR.W R0, [R0, #228] 0x341844C0: 2802 CMP R0, #2 0x341844C2: D004 BEQ 46L241 ; 0x341844CE 0x341844C4: 9804 LDR R0, [SP, #16] 0x341844C6: F8D0 00E4 LDR.W R0, [R0, #228] 0x341844CA: 2803 CMP R0, #3 0x341844CC: D100 BNE 46L242 ; 0x341844D0
.L241: 0x341844CE: E007 B 46L243 ; 0x341844E0
.L242: 0x341844D0: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341844D4: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341844D8: F240 311E MOVW R1, #0x031E 0x341844DC: F009 FBDE BL assert_failed ; 0x3418DC9C
.L243: 0x341844E0: 9804 LDR R0, [SP, #16] 0x341844E2: F8D0 00E4 LDR.W R0, [R0, #228] 0x341844E6: 2802 CMP R0, #2 0x341844E8: D14B BNE 46L249 ; 0x34184582 0x341844EA: 9804 LDR R0, [SP, #16] 0x341844EC: F8D0 0098 LDR.W R0, [R0, #152] 0x341844F0: B188 CBZ R0, .L244 ; 0x34184516 0x341844F2: 9804 LDR R0, [SP, #16] 0x341844F4: F8D0 0098 LDR.W R0, [R0, #152] 0x341844F8: F1B0 5F80 CMP.W R0, #0x10000000 0x341844FC: D00B BEQ 46L244 ; 0x34184516 0x341844FE: 9804 LDR R0, [SP, #16] 0x34184500: F8D0 0098 LDR.W R0, [R0, #152] 0x34184504: F1B0 5F00 CMP.W R0, #0x20000000 0x34184508: D005 BEQ 46L244 ; 0x34184516 0x3418450A: 9804 LDR R0, [SP, #16] 0x3418450C: F8D0 0098 LDR.W R0, [R0, #152] 0x34184510: F1B0 5F40 CMP.W R0, #0x30000000 0x34184514: D100 BNE 46L245 ; 0x34184518
.L244: 0x34184516: E007 B 46L246 ; 0x34184528
.L245: 0x34184518: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x3418451C: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34184520: F240 3123 MOVW R1, #0x0323 0x34184524: F009 FBBA BL assert_failed ; 0x3418DC9C
.L246: 0x34184528: 9804 LDR R0, [SP, #16] 0x3418452A: F8D0 009C LDR.W R0, [R0, #156] 0x3418452E: B130 CBZ R0, .L247 ; 0x3418453E 0x34184530: 9804 LDR R0, [SP, #16] 0x34184532: F8D0 009C LDR.W R0, [R0, #156] 0x34184536: F5B0 7F80 CMP.W R0, #0x0100 0x3418453A: D800 BHI 46L247 ; 0x3418453E 0x3418453C: E007 B 46L248 ; 0x3418454E
.L247: 0x3418453E: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34184542: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34184546: F44F 7149 MOV.W R1, #0x0324 0x3418454A: F009 FBA7 BL assert_failed ; 0x3418DC9C
.L248: 0x3418454E: F248 110C MOVW R1, #0x810C 0x34184552: F2C5 6102 MOVT R1, #0x5602 0x34184556: 6808 LDR R0, [R1] 0x34184558: F64F 72FF MOVW R2, #0xFFFF 0x3418455C: F6CC 7200 MOVT R2, #0xCF00 0x34184560: 4010 ANDS R0, R2 0x34184562: 9B04 LDR R3, [SP, #16] 0x34184564: F8D3 2098 LDR.W R2, [R3, #152] 0x34184568: F8D3 C09C LDR.W R12, [R3, #156] 0x3418456C: 2300 MOVS R3, #0 0x3418456E: F6CF 73FF MOVT R3, #0xFFFF 0x34184572: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34184576: 431A ORRS R2, R3 0x34184578: 4310 ORRS R0, R2 0x3418457A: 6008 STR R0, [R1] 0x3418457C: F004 F850 BL LL_RCC_IC19_Enable ; 0x34188620 0x34184580: E007 B 46L250 ; 0x34184592
.L249: 0x34184582: 9804 LDR R0, [SP, #16] 0x34184584: F8D0 00E4 LDR.W R0, [R0, #228] 0x34184588: 2801 CMP R0, #1 0x3418458A: D102 BNE 46L250 ; 0x34184592 0x3418458C: F00B FE68 BL LL_RCC_CLKP_Enable ; 0x34190260 0x34184590: E7FF B 46L250 ; 0x34184592
.L250: 0x34184592: 9804 LDR R0, [SP, #16] 0x34184594: F8D0 00E4 LDR.W R0, [R0, #228] 0x34184598: F004 F8F2 BL LL_RCC_SetFDCANClockSource ; 0x34188780
.L251: 0x3418459C: 9804 LDR R0, [SP, #16] 0x3418459E: 7840 LDRB R0, [R0, #1] 0x341845A0: 06C0 LSLS R0, R0, #27 0x341845A2: 2800 CMP R0, #0 0x341845A4: F140 80E3 BPL.W 46L268 ; 0x3418476E 0x341845A8: 9804 LDR R0, [SP, #16] 0x341845AA: F8D0 00E8 LDR.W R0, [R0, #232] 0x341845AE: 210C MOVS R1, #12 0x341845B0: F2C0 7100 MOVT R1, #0x0700 0x341845B4: 4288 CMP R0, R1 0x341845B6: D027 BEQ 46L252 ; 0x34184608 0x341845B8: 9804 LDR R0, [SP, #16] 0x341845BA: F8D0 00E8 LDR.W R0, [R0, #232] 0x341845BE: 210C MOVS R1, #12 0x341845C0: F2C0 7101 MOVT R1, #0x0701 0x341845C4: 4288 CMP R0, R1 0x341845C6: D01F BEQ 46L252 ; 0x34184608 0x341845C8: 9804 LDR R0, [SP, #16] 0x341845CA: F8D0 00E8 LDR.W R0, [R0, #232] 0x341845CE: 210C MOVS R1, #12 0x341845D0: F2C0 7102 MOVT R1, #0x0702 0x341845D4: 4288 CMP R0, R1 0x341845D6: D017 BEQ 46L252 ; 0x34184608 0x341845D8: 9804 LDR R0, [SP, #16] 0x341845DA: F8D0 00E8 LDR.W R0, [R0, #232] 0x341845DE: 210C MOVS R1, #12 0x341845E0: F2C0 7103 MOVT R1, #0x0703 0x341845E4: 4288 CMP R0, R1 0x341845E6: D00F BEQ 46L252 ; 0x34184608 0x341845E8: 9804 LDR R0, [SP, #16] 0x341845EA: F8D0 00E8 LDR.W R0, [R0, #232] 0x341845EE: 210C MOVS R1, #12 0x341845F0: F2C0 7104 MOVT R1, #0x0704 0x341845F4: 4288 CMP R0, R1 0x341845F6: D007 BEQ 46L252 ; 0x34184608 0x341845F8: 9804 LDR R0, [SP, #16] 0x341845FA: F8D0 00E8 LDR.W R0, [R0, #232] 0x341845FE: 210C MOVS R1, #12 0x34184600: F2C0 7105 MOVT R1, #0x0705 0x34184604: 4288 CMP R0, R1 0x34184606: D100 BNE 46L253 ; 0x3418460A
.L252: 0x34184608: E007 B 46L254 ; 0x3418461A
.L253: 0x3418460A: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x3418460E: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34184612: F240 313E MOVW R1, #0x033E 0x34184616: F009 FB41 BL assert_failed ; 0x3418DC9C
.L254: 0x3418461A: 9804 LDR R0, [SP, #16] 0x3418461C: F8D0 00E8 LDR.W R0, [R0, #232] 0x34184620: 210C MOVS R1, #12 0x34184622: F2C0 7102 MOVT R1, #0x0702 0x34184626: 4288 CMP R0, R1 0x34184628: D144 BNE 46L260 ; 0x341846B4 0x3418462A: 9804 LDR R0, [SP, #16] 0x3418462C: 6D00 LDR R0, [R0, #80] 0x3418462E: B170 CBZ R0, .L255 ; 0x3418464E 0x34184630: 9804 LDR R0, [SP, #16] 0x34184632: 6D00 LDR R0, [R0, #80] 0x34184634: F1B0 5F80 CMP.W R0, #0x10000000 0x34184638: D009 BEQ 46L255 ; 0x3418464E 0x3418463A: 9804 LDR R0, [SP, #16] 0x3418463C: 6D00 LDR R0, [R0, #80] 0x3418463E: F1B0 5F00 CMP.W R0, #0x20000000 0x34184642: D004 BEQ 46L255 ; 0x3418464E 0x34184644: 9804 LDR R0, [SP, #16] 0x34184646: 6D00 LDR R0, [R0, #80] 0x34184648: F1B0 5F40 CMP.W R0, #0x30000000 0x3418464C: D100 BNE 46L256 ; 0x34184650
.L255: 0x3418464E: E007 B 46L257 ; 0x34184660
.L256: 0x34184650: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34184654: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34184658: F240 3143 MOVW R1, #0x0343 0x3418465C: F009 FB1E BL assert_failed ; 0x3418DC9C
.L257: 0x34184660: 9804 LDR R0, [SP, #16] 0x34184662: 6D40 LDR R0, [R0, #84] 0x34184664: B128 CBZ R0, .L258 ; 0x34184672 0x34184666: 9804 LDR R0, [SP, #16] 0x34184668: 6D40 LDR R0, [R0, #84] 0x3418466A: F5B0 7F80 CMP.W R0, #0x0100 0x3418466E: D800 BHI 46L258 ; 0x34184672 0x34184670: E007 B 46L259 ; 0x34184682
.L258: 0x34184672: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34184676: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x3418467A: F44F 7151 MOV.W R1, #0x0344 0x3418467E: F009 FB0D BL assert_failed ; 0x3418DC9C
.L259: 0x34184682: F248 01E8 MOVW R1, #0x80E8 0x34184686: F2C5 6102 MOVT R1, #0x5602 0x3418468A: 6808 LDR R0, [R1] 0x3418468C: F64F 72FF MOVW R2, #0xFFFF 0x34184690: F6CC 7200 MOVT R2, #0xCF00 0x34184694: 4010 ANDS R0, R2 0x34184696: 9B04 LDR R3, [SP, #16] 0x34184698: 6D1A LDR R2, [R3, #80] 0x3418469A: F8D3 C054 LDR.W R12, [R3, #84] 0x3418469E: 2300 MOVS R3, #0 0x341846A0: F6CF 73FF MOVT R3, #0xFFFF 0x341846A4: EB03 430C ADD.W R3, R3, R12, LSL #16 0x341846A8: 431A ORRS R2, R3 0x341846AA: 4310 ORRS R0, R2 0x341846AC: 6008 STR R0, [R1] 0x341846AE: F003 FFA7 BL LL_RCC_IC10_Enable.61 ; 0x34188600 0x341846B2: E057 B 46L267 ; 0x34184764
.L260: 0x341846B4: 9804 LDR R0, [SP, #16] 0x341846B6: F8D0 00E8 LDR.W R0, [R0, #232] 0x341846BA: 210C MOVS R1, #12 0x341846BC: F2C0 7103 MOVT R1, #0x0703 0x341846C0: 4288 CMP R0, R1 0x341846C2: D144 BNE 46L266 ; 0x3418474E 0x341846C4: 9804 LDR R0, [SP, #16] 0x341846C6: 6F80 LDR R0, [R0, #120] 0x341846C8: B170 CBZ R0, .L261 ; 0x341846E8 0x341846CA: 9804 LDR R0, [SP, #16] 0x341846CC: 6F80 LDR R0, [R0, #120] 0x341846CE: F1B0 5F80 CMP.W R0, #0x10000000 0x341846D2: D009 BEQ 46L261 ; 0x341846E8 0x341846D4: 9804 LDR R0, [SP, #16] 0x341846D6: 6F80 LDR R0, [R0, #120] 0x341846D8: F1B0 5F00 CMP.W R0, #0x20000000 0x341846DC: D004 BEQ 46L261 ; 0x341846E8 0x341846DE: 9804 LDR R0, [SP, #16] 0x341846E0: 6F80 LDR R0, [R0, #120] 0x341846E2: F1B0 5F40 CMP.W R0, #0x30000000 0x341846E6: D100 BNE 46L262 ; 0x341846EA
.L261: 0x341846E8: E007 B 46L263 ; 0x341846FA
.L262: 0x341846EA: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341846EE: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341846F2: F44F 7154 MOV.W R1, #0x0350 0x341846F6: F009 FAD1 BL assert_failed ; 0x3418DC9C
.L263: 0x341846FA: 9804 LDR R0, [SP, #16] 0x341846FC: 6FC0 LDR R0, [R0, #124] 0x341846FE: B128 CBZ R0, .L264 ; 0x3418470C 0x34184700: 9804 LDR R0, [SP, #16] 0x34184702: 6FC0 LDR R0, [R0, #124] 0x34184704: F5B0 7F80 CMP.W R0, #0x0100 0x34184708: D800 BHI 46L264 ; 0x3418470C 0x3418470A: E007 B 46L265 ; 0x3418471C
.L264: 0x3418470C: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34184710: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34184714: F240 3151 MOVW R1, #0x0351 0x34184718: F009 FAC0 BL assert_failed ; 0x3418DC9C
.L265: 0x3418471C: F248 01FC MOVW R1, #0x80FC 0x34184720: F2C5 6102 MOVT R1, #0x5602 0x34184724: 6808 LDR R0, [R1] 0x34184726: F64F 72FF MOVW R2, #0xFFFF 0x3418472A: F6CC 7200 MOVT R2, #0xCF00 0x3418472E: 4010 ANDS R0, R2 0x34184730: 9B04 LDR R3, [SP, #16] 0x34184732: 6F9A LDR R2, [R3, #120] 0x34184734: F8D3 C07C LDR.W R12, [R3, #124] 0x34184738: 2300 MOVS R3, #0 0x3418473A: F6CF 73FF MOVT R3, #0xFFFF 0x3418473E: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34184742: 431A ORRS R2, R3 0x34184744: 4310 ORRS R0, R2 0x34184746: 6008 STR R0, [R1] 0x34184748: F003 FF62 BL LL_RCC_IC15_Enable.62 ; 0x34188610 0x3418474C: E00A B 46L267 ; 0x34184764
.L266: 0x3418474E: 9804 LDR R0, [SP, #16] 0x34184750: F8D0 00E8 LDR.W R0, [R0, #232] 0x34184754: 210C MOVS R1, #12 0x34184756: F2C0 7101 MOVT R1, #0x0701 0x3418475A: 4288 CMP R0, R1 0x3418475C: D102 BNE 46L267 ; 0x34184764 0x3418475E: F00B FD7F BL LL_RCC_CLKP_Enable ; 0x34190260 0x34184762: E7FF B 46L267 ; 0x34184764
.L267: 0x34184764: 9804 LDR R0, [SP, #16] 0x34184766: F8D0 00E8 LDR.W R0, [R0, #232] 0x3418476A: F004 F817 BL LL_RCC_SetI2CClockSource ; 0x3418879C
.L268: 0x3418476E: 9804 LDR R0, [SP, #16] 0x34184770: 7840 LDRB R0, [R0, #1] 0x34184772: 0680 LSLS R0, R0, #26 0x34184774: 2800 CMP R0, #0 0x34184776: F140 80EC BPL.W 46L285 ; 0x34184952 0x3418477A: 9804 LDR R0, [SP, #16] 0x3418477C: F8D0 00EC LDR.W R0, [R0, #236] 0x34184780: F240 410C MOVW R1, #0x040C 0x34184784: F2C0 7100 MOVT R1, #0x0700 0x34184788: 4288 CMP R0, R1 0x3418478A: D02C BEQ 46L269 ; 0x341847E6 0x3418478C: 9804 LDR R0, [SP, #16] 0x3418478E: F8D0 00EC LDR.W R0, [R0, #236] 0x34184792: F240 410C MOVW R1, #0x040C 0x34184796: F2C0 7101 MOVT R1, #0x0701 0x3418479A: 4288 CMP R0, R1 0x3418479C: D023 BEQ 46L269 ; 0x341847E6 0x3418479E: 9804 LDR R0, [SP, #16] 0x341847A0: F8D0 00EC LDR.W R0, [R0, #236] 0x341847A4: F240 410C MOVW R1, #0x040C 0x341847A8: F2C0 7102 MOVT R1, #0x0702 0x341847AC: 4288 CMP R0, R1 0x341847AE: D01A BEQ 46L269 ; 0x341847E6 0x341847B0: 9804 LDR R0, [SP, #16] 0x341847B2: F8D0 00EC LDR.W R0, [R0, #236] 0x341847B6: F240 410C MOVW R1, #0x040C 0x341847BA: F2C0 7103 MOVT R1, #0x0703 0x341847BE: 4288 CMP R0, R1 0x341847C0: D011 BEQ 46L269 ; 0x341847E6 0x341847C2: 9804 LDR R0, [SP, #16] 0x341847C4: F8D0 00EC LDR.W R0, [R0, #236] 0x341847C8: F240 410C MOVW R1, #0x040C 0x341847CC: F2C0 7104 MOVT R1, #0x0704 0x341847D0: 4288 CMP R0, R1 0x341847D2: D008 BEQ 46L269 ; 0x341847E6 0x341847D4: 9804 LDR R0, [SP, #16] 0x341847D6: F8D0 00EC LDR.W R0, [R0, #236] 0x341847DA: F240 410C MOVW R1, #0x040C 0x341847DE: F2C0 7105 MOVT R1, #0x0705 0x341847E2: 4288 CMP R0, R1 0x341847E4: D100 BNE 46L270 ; 0x341847E8
.L269: 0x341847E6: E007 B 46L271 ; 0x341847F8
.L270: 0x341847E8: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341847EC: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341847F0: F240 316B MOVW R1, #0x036B 0x341847F4: F009 FA52 BL assert_failed ; 0x3418DC9C
.L271: 0x341847F8: 9804 LDR R0, [SP, #16] 0x341847FA: F8D0 00EC LDR.W R0, [R0, #236] 0x341847FE: F240 410C MOVW R1, #0x040C 0x34184802: F2C0 7102 MOVT R1, #0x0702 0x34184806: 4288 CMP R0, R1 0x34184808: D144 BNE 46L277 ; 0x34184894 0x3418480A: 9804 LDR R0, [SP, #16] 0x3418480C: 6D00 LDR R0, [R0, #80] 0x3418480E: B170 CBZ R0, .L272 ; 0x3418482E 0x34184810: 9804 LDR R0, [SP, #16] 0x34184812: 6D00 LDR R0, [R0, #80] 0x34184814: F1B0 5F80 CMP.W R0, #0x10000000 0x34184818: D009 BEQ 46L272 ; 0x3418482E 0x3418481A: 9804 LDR R0, [SP, #16] 0x3418481C: 6D00 LDR R0, [R0, #80] 0x3418481E: F1B0 5F00 CMP.W R0, #0x20000000 0x34184822: D004 BEQ 46L272 ; 0x3418482E 0x34184824: 9804 LDR R0, [SP, #16] 0x34184826: 6D00 LDR R0, [R0, #80] 0x34184828: F1B0 5F40 CMP.W R0, #0x30000000 0x3418482C: D100 BNE 46L273 ; 0x34184830
.L272: 0x3418482E: E007 B 46L274 ; 0x34184840
.L273: 0x34184830: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34184834: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34184838: F44F 715C MOV.W R1, #0x0370 0x3418483C: F009 FA2E BL assert_failed ; 0x3418DC9C
.L274: 0x34184840: 9804 LDR R0, [SP, #16] 0x34184842: 6D40 LDR R0, [R0, #84] 0x34184844: B128 CBZ R0, .L275 ; 0x34184852 0x34184846: 9804 LDR R0, [SP, #16] 0x34184848: 6D40 LDR R0, [R0, #84] 0x3418484A: F5B0 7F80 CMP.W R0, #0x0100 0x3418484E: D800 BHI 46L275 ; 0x34184852 0x34184850: E007 B 46L276 ; 0x34184862
.L275: 0x34184852: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34184856: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x3418485A: F240 3171 MOVW R1, #0x0371 0x3418485E: F009 FA1D BL assert_failed ; 0x3418DC9C
.L276: 0x34184862: F248 01E8 MOVW R1, #0x80E8 0x34184866: F2C5 6102 MOVT R1, #0x5602 0x3418486A: 6808 LDR R0, [R1] 0x3418486C: F64F 72FF MOVW R2, #0xFFFF 0x34184870: F6CC 7200 MOVT R2, #0xCF00 0x34184874: 4010 ANDS R0, R2 0x34184876: 9B04 LDR R3, [SP, #16] 0x34184878: 6D1A LDR R2, [R3, #80] 0x3418487A: F8D3 C054 LDR.W R12, [R3, #84] 0x3418487E: 2300 MOVS R3, #0 0x34184880: F6CF 73FF MOVT R3, #0xFFFF 0x34184884: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34184888: 431A ORRS R2, R3 0x3418488A: 4310 ORRS R0, R2 0x3418488C: 6008 STR R0, [R1] 0x3418488E: F003 FEB7 BL LL_RCC_IC10_Enable.61 ; 0x34188600 0x34184892: E059 B 46L284 ; 0x34184948
.L277: 0x34184894: 9804 LDR R0, [SP, #16] 0x34184896: F8D0 00EC LDR.W R0, [R0, #236] 0x3418489A: F240 410C MOVW R1, #0x040C 0x3418489E: F2C0 7103 MOVT R1, #0x0703 0x341848A2: 4288 CMP R0, R1 0x341848A4: D144 BNE 46L283 ; 0x34184930 0x341848A6: 9804 LDR R0, [SP, #16] 0x341848A8: 6F80 LDR R0, [R0, #120] 0x341848AA: B170 CBZ R0, .L278 ; 0x341848CA 0x341848AC: 9804 LDR R0, [SP, #16] 0x341848AE: 6F80 LDR R0, [R0, #120] 0x341848B0: F1B0 5F80 CMP.W R0, #0x10000000 0x341848B4: D009 BEQ 46L278 ; 0x341848CA 0x341848B6: 9804 LDR R0, [SP, #16] 0x341848B8: 6F80 LDR R0, [R0, #120] 0x341848BA: F1B0 5F00 CMP.W R0, #0x20000000 0x341848BE: D004 BEQ 46L278 ; 0x341848CA 0x341848C0: 9804 LDR R0, [SP, #16] 0x341848C2: 6F80 LDR R0, [R0, #120] 0x341848C4: F1B0 5F40 CMP.W R0, #0x30000000 0x341848C8: D100 BNE 46L279 ; 0x341848CC
.L278: 0x341848CA: E007 B 46L280 ; 0x341848DC
.L279: 0x341848CC: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341848D0: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341848D4: F240 317D MOVW R1, #0x037D 0x341848D8: F009 F9E0 BL assert_failed ; 0x3418DC9C
.L280: 0x341848DC: 9804 LDR R0, [SP, #16] 0x341848DE: 6FC0 LDR R0, [R0, #124] 0x341848E0: B128 CBZ R0, .L281 ; 0x341848EE 0x341848E2: 9804 LDR R0, [SP, #16] 0x341848E4: 6FC0 LDR R0, [R0, #124] 0x341848E6: F5B0 7F80 CMP.W R0, #0x0100 0x341848EA: D800 BHI 46L281 ; 0x341848EE 0x341848EC: E007 B 46L282 ; 0x341848FE
.L281: 0x341848EE: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341848F2: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341848F6: F240 317E MOVW R1, #0x037E 0x341848FA: F009 F9CF BL assert_failed ; 0x3418DC9C
.L282: 0x341848FE: F248 01FC MOVW R1, #0x80FC 0x34184902: F2C5 6102 MOVT R1, #0x5602 0x34184906: 6808 LDR R0, [R1] 0x34184908: F64F 72FF MOVW R2, #0xFFFF 0x3418490C: F6CC 7200 MOVT R2, #0xCF00 0x34184910: 4010 ANDS R0, R2 0x34184912: 9B04 LDR R3, [SP, #16] 0x34184914: 6F9A LDR R2, [R3, #120] 0x34184916: F8D3 C07C LDR.W R12, [R3, #124] 0x3418491A: 2300 MOVS R3, #0 0x3418491C: F6CF 73FF MOVT R3, #0xFFFF 0x34184920: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34184924: 431A ORRS R2, R3 0x34184926: 4310 ORRS R0, R2 0x34184928: 6008 STR R0, [R1] 0x3418492A: F003 FE71 BL LL_RCC_IC15_Enable.62 ; 0x34188610 0x3418492E: E00B B 46L284 ; 0x34184948
.L283: 0x34184930: 9804 LDR R0, [SP, #16] 0x34184932: F8D0 00EC LDR.W R0, [R0, #236] 0x34184936: F240 410C MOVW R1, #0x040C 0x3418493A: F2C0 7101 MOVT R1, #0x0701 0x3418493E: 4288 CMP R0, R1 0x34184940: D102 BNE 46L284 ; 0x34184948 0x34184942: F00B FC8D BL LL_RCC_CLKP_Enable ; 0x34190260 0x34184946: E7FF B 46L284 ; 0x34184948
.L284: 0x34184948: 9804 LDR R0, [SP, #16] 0x3418494A: F8D0 00EC LDR.W R0, [R0, #236] 0x3418494E: F003 FF25 BL LL_RCC_SetI2CClockSource ; 0x3418879C
.L285: 0x34184952: 9804 LDR R0, [SP, #16] 0x34184954: 7840 LDRB R0, [R0, #1] 0x34184956: 0640 LSLS R0, R0, #25 0x34184958: 2800 CMP R0, #0 0x3418495A: F140 80EC BPL.W 46L302 ; 0x34184B36 0x3418495E: 9804 LDR R0, [SP, #16] 0x34184960: F8D0 00F0 LDR.W R0, [R0, #240] 0x34184964: F640 010C MOVW R1, #0x080C 0x34184968: F2C0 7100 MOVT R1, #0x0700 0x3418496C: 4288 CMP R0, R1 0x3418496E: D02C BEQ 46L286 ; 0x341849CA 0x34184970: 9804 LDR R0, [SP, #16] 0x34184972: F8D0 00F0 LDR.W R0, [R0, #240] 0x34184976: F640 010C MOVW R1, #0x080C 0x3418497A: F2C0 7101 MOVT R1, #0x0701 0x3418497E: 4288 CMP R0, R1 0x34184980: D023 BEQ 46L286 ; 0x341849CA 0x34184982: 9804 LDR R0, [SP, #16] 0x34184984: F8D0 00F0 LDR.W R0, [R0, #240] 0x34184988: F640 010C MOVW R1, #0x080C 0x3418498C: F2C0 7102 MOVT R1, #0x0702 0x34184990: 4288 CMP R0, R1 0x34184992: D01A BEQ 46L286 ; 0x341849CA 0x34184994: 9804 LDR R0, [SP, #16] 0x34184996: F8D0 00F0 LDR.W R0, [R0, #240] 0x3418499A: F640 010C MOVW R1, #0x080C 0x3418499E: F2C0 7103 MOVT R1, #0x0703 0x341849A2: 4288 CMP R0, R1 0x341849A4: D011 BEQ 46L286 ; 0x341849CA 0x341849A6: 9804 LDR R0, [SP, #16] 0x341849A8: F8D0 00F0 LDR.W R0, [R0, #240] 0x341849AC: F640 010C MOVW R1, #0x080C 0x341849B0: F2C0 7104 MOVT R1, #0x0704 0x341849B4: 4288 CMP R0, R1 0x341849B6: D008 BEQ 46L286 ; 0x341849CA 0x341849B8: 9804 LDR R0, [SP, #16] 0x341849BA: F8D0 00F0 LDR.W R0, [R0, #240] 0x341849BE: F640 010C MOVW R1, #0x080C 0x341849C2: F2C0 7105 MOVT R1, #0x0705 0x341849C6: 4288 CMP R0, R1 0x341849C8: D100 BNE 46L287 ; 0x341849CC
.L286: 0x341849CA: E007 B 46L288 ; 0x341849DC
.L287: 0x341849CC: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341849D0: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341849D4: F44F 7166 MOV.W R1, #0x0398 0x341849D8: F009 F960 BL assert_failed ; 0x3418DC9C
.L288: 0x341849DC: 9804 LDR R0, [SP, #16] 0x341849DE: F8D0 00F0 LDR.W R0, [R0, #240] 0x341849E2: F640 010C MOVW R1, #0x080C 0x341849E6: F2C0 7102 MOVT R1, #0x0702 0x341849EA: 4288 CMP R0, R1 0x341849EC: D144 BNE 46L294 ; 0x34184A78 0x341849EE: 9804 LDR R0, [SP, #16] 0x341849F0: 6D00 LDR R0, [R0, #80] 0x341849F2: B170 CBZ R0, .L289 ; 0x34184A12 0x341849F4: 9804 LDR R0, [SP, #16] 0x341849F6: 6D00 LDR R0, [R0, #80] 0x341849F8: F1B0 5F80 CMP.W R0, #0x10000000 0x341849FC: D009 BEQ 46L289 ; 0x34184A12 0x341849FE: 9804 LDR R0, [SP, #16] 0x34184A00: 6D00 LDR R0, [R0, #80] 0x34184A02: F1B0 5F00 CMP.W R0, #0x20000000 0x34184A06: D004 BEQ 46L289 ; 0x34184A12 0x34184A08: 9804 LDR R0, [SP, #16] 0x34184A0A: 6D00 LDR R0, [R0, #80] 0x34184A0C: F1B0 5F40 CMP.W R0, #0x30000000 0x34184A10: D100 BNE 46L290 ; 0x34184A14
.L289: 0x34184A12: E007 B 46L291 ; 0x34184A24
.L290: 0x34184A14: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34184A18: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34184A1C: F240 319D MOVW R1, #0x039D 0x34184A20: F009 F93C BL assert_failed ; 0x3418DC9C
.L291: 0x34184A24: 9804 LDR R0, [SP, #16] 0x34184A26: 6D40 LDR R0, [R0, #84] 0x34184A28: B128 CBZ R0, .L292 ; 0x34184A36 0x34184A2A: 9804 LDR R0, [SP, #16] 0x34184A2C: 6D40 LDR R0, [R0, #84] 0x34184A2E: F5B0 7F80 CMP.W R0, #0x0100 0x34184A32: D800 BHI 46L292 ; 0x34184A36 0x34184A34: E007 B 46L293 ; 0x34184A46
.L292: 0x34184A36: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34184A3A: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34184A3E: F240 319E MOVW R1, #0x039E 0x34184A42: F009 F92B BL assert_failed ; 0x3418DC9C
.L293: 0x34184A46: F248 01E8 MOVW R1, #0x80E8 0x34184A4A: F2C5 6102 MOVT R1, #0x5602 0x34184A4E: 6808 LDR R0, [R1] 0x34184A50: F64F 72FF MOVW R2, #0xFFFF 0x34184A54: F6CC 7200 MOVT R2, #0xCF00 0x34184A58: 4010 ANDS R0, R2 0x34184A5A: 9B04 LDR R3, [SP, #16] 0x34184A5C: 6D1A LDR R2, [R3, #80] 0x34184A5E: F8D3 C054 LDR.W R12, [R3, #84] 0x34184A62: 2300 MOVS R3, #0 0x34184A64: F6CF 73FF MOVT R3, #0xFFFF 0x34184A68: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34184A6C: 431A ORRS R2, R3 0x34184A6E: 4310 ORRS R0, R2 0x34184A70: 6008 STR R0, [R1] 0x34184A72: F003 FDC5 BL LL_RCC_IC10_Enable.61 ; 0x34188600 0x34184A76: E059 B 46L301 ; 0x34184B2C
.L294: 0x34184A78: 9804 LDR R0, [SP, #16] 0x34184A7A: F8D0 00F0 LDR.W R0, [R0, #240] 0x34184A7E: F640 010C MOVW R1, #0x080C 0x34184A82: F2C0 7103 MOVT R1, #0x0703 0x34184A86: 4288 CMP R0, R1 0x34184A88: D144 BNE 46L300 ; 0x34184B14 0x34184A8A: 9804 LDR R0, [SP, #16] 0x34184A8C: 6F80 LDR R0, [R0, #120] 0x34184A8E: B170 CBZ R0, .L295 ; 0x34184AAE 0x34184A90: 9804 LDR R0, [SP, #16] 0x34184A92: 6F80 LDR R0, [R0, #120] 0x34184A94: F1B0 5F80 CMP.W R0, #0x10000000 0x34184A98: D009 BEQ 46L295 ; 0x34184AAE 0x34184A9A: 9804 LDR R0, [SP, #16] 0x34184A9C: 6F80 LDR R0, [R0, #120] 0x34184A9E: F1B0 5F00 CMP.W R0, #0x20000000 0x34184AA2: D004 BEQ 46L295 ; 0x34184AAE 0x34184AA4: 9804 LDR R0, [SP, #16] 0x34184AA6: 6F80 LDR R0, [R0, #120] 0x34184AA8: F1B0 5F40 CMP.W R0, #0x30000000 0x34184AAC: D100 BNE 46L296 ; 0x34184AB0
.L295: 0x34184AAE: E007 B 46L297 ; 0x34184AC0
.L296: 0x34184AB0: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34184AB4: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34184AB8: F240 31AA MOVW R1, #0x03AA 0x34184ABC: F009 F8EE BL assert_failed ; 0x3418DC9C
.L297: 0x34184AC0: 9804 LDR R0, [SP, #16] 0x34184AC2: 6FC0 LDR R0, [R0, #124] 0x34184AC4: B128 CBZ R0, .L298 ; 0x34184AD2 0x34184AC6: 9804 LDR R0, [SP, #16] 0x34184AC8: 6FC0 LDR R0, [R0, #124] 0x34184ACA: F5B0 7F80 CMP.W R0, #0x0100 0x34184ACE: D800 BHI 46L298 ; 0x34184AD2 0x34184AD0: E007 B 46L299 ; 0x34184AE2
.L298: 0x34184AD2: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34184AD6: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34184ADA: F240 31AB MOVW R1, #0x03AB 0x34184ADE: F009 F8DD BL assert_failed ; 0x3418DC9C
.L299: 0x34184AE2: F248 01FC MOVW R1, #0x80FC 0x34184AE6: F2C5 6102 MOVT R1, #0x5602 0x34184AEA: 6808 LDR R0, [R1] 0x34184AEC: F64F 72FF MOVW R2, #0xFFFF 0x34184AF0: F6CC 7200 MOVT R2, #0xCF00 0x34184AF4: 4010 ANDS R0, R2 0x34184AF6: 9B04 LDR R3, [SP, #16] 0x34184AF8: 6F9A LDR R2, [R3, #120] 0x34184AFA: F8D3 C07C LDR.W R12, [R3, #124] 0x34184AFE: 2300 MOVS R3, #0 0x34184B00: F6CF 73FF MOVT R3, #0xFFFF 0x34184B04: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34184B08: 431A ORRS R2, R3 0x34184B0A: 4310 ORRS R0, R2 0x34184B0C: 6008 STR R0, [R1] 0x34184B0E: F003 FD7F BL LL_RCC_IC15_Enable.62 ; 0x34188610 0x34184B12: E00B B 46L301 ; 0x34184B2C
.L300: 0x34184B14: 9804 LDR R0, [SP, #16] 0x34184B16: F8D0 00F0 LDR.W R0, [R0, #240] 0x34184B1A: F640 010C MOVW R1, #0x080C 0x34184B1E: F2C0 7101 MOVT R1, #0x0701 0x34184B22: 4288 CMP R0, R1 0x34184B24: D102 BNE 46L301 ; 0x34184B2C 0x34184B26: F00B FB9B BL LL_RCC_CLKP_Enable ; 0x34190260 0x34184B2A: E7FF B 46L301 ; 0x34184B2C
.L301: 0x34184B2C: 9804 LDR R0, [SP, #16] 0x34184B2E: F8D0 00F0 LDR.W R0, [R0, #240] 0x34184B32: F003 FE33 BL LL_RCC_SetI2CClockSource ; 0x3418879C
.L302: 0x34184B36: 9804 LDR R0, [SP, #16] 0x34184B38: 7840 LDRB R0, [R0, #1] 0x34184B3A: 0600 LSLS R0, R0, #24 0x34184B3C: 2800 CMP R0, #0 0x34184B3E: F140 80EC BPL.W 46L319 ; 0x34184D1A 0x34184B42: 9804 LDR R0, [SP, #16] 0x34184B44: F8D0 00F4 LDR.W R0, [R0, #244] 0x34184B48: F640 410C MOVW R1, #0x0C0C 0x34184B4C: F2C0 7100 MOVT R1, #0x0700 0x34184B50: 4288 CMP R0, R1 0x34184B52: D02C BEQ 46L303 ; 0x34184BAE 0x34184B54: 9804 LDR R0, [SP, #16] 0x34184B56: F8D0 00F4 LDR.W R0, [R0, #244] 0x34184B5A: F640 410C MOVW R1, #0x0C0C 0x34184B5E: F2C0 7101 MOVT R1, #0x0701 0x34184B62: 4288 CMP R0, R1 0x34184B64: D023 BEQ 46L303 ; 0x34184BAE 0x34184B66: 9804 LDR R0, [SP, #16] 0x34184B68: F8D0 00F4 LDR.W R0, [R0, #244] 0x34184B6C: F640 410C MOVW R1, #0x0C0C 0x34184B70: F2C0 7102 MOVT R1, #0x0702 0x34184B74: 4288 CMP R0, R1 0x34184B76: D01A BEQ 46L303 ; 0x34184BAE 0x34184B78: 9804 LDR R0, [SP, #16] 0x34184B7A: F8D0 00F4 LDR.W R0, [R0, #244] 0x34184B7E: F640 410C MOVW R1, #0x0C0C 0x34184B82: F2C0 7103 MOVT R1, #0x0703 0x34184B86: 4288 CMP R0, R1 0x34184B88: D011 BEQ 46L303 ; 0x34184BAE 0x34184B8A: 9804 LDR R0, [SP, #16] 0x34184B8C: F8D0 00F4 LDR.W R0, [R0, #244] 0x34184B90: F640 410C MOVW R1, #0x0C0C 0x34184B94: F2C0 7104 MOVT R1, #0x0704 0x34184B98: 4288 CMP R0, R1 0x34184B9A: D008 BEQ 46L303 ; 0x34184BAE 0x34184B9C: 9804 LDR R0, [SP, #16] 0x34184B9E: F8D0 00F4 LDR.W R0, [R0, #244] 0x34184BA2: F640 410C MOVW R1, #0x0C0C 0x34184BA6: F2C0 7105 MOVT R1, #0x0705 0x34184BAA: 4288 CMP R0, R1 0x34184BAC: D100 BNE 46L304 ; 0x34184BB0
.L303: 0x34184BAE: E007 B 46L305 ; 0x34184BC0
.L304: 0x34184BB0: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34184BB4: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34184BB8: F240 31C5 MOVW R1, #0x03C5 0x34184BBC: F009 F86E BL assert_failed ; 0x3418DC9C
.L305: 0x34184BC0: 9804 LDR R0, [SP, #16] 0x34184BC2: F8D0 00F4 LDR.W R0, [R0, #244] 0x34184BC6: F640 410C MOVW R1, #0x0C0C 0x34184BCA: F2C0 7102 MOVT R1, #0x0702 0x34184BCE: 4288 CMP R0, R1 0x34184BD0: D144 BNE 46L311 ; 0x34184C5C 0x34184BD2: 9804 LDR R0, [SP, #16] 0x34184BD4: 6D00 LDR R0, [R0, #80] 0x34184BD6: B170 CBZ R0, .L306 ; 0x34184BF6 0x34184BD8: 9804 LDR R0, [SP, #16] 0x34184BDA: 6D00 LDR R0, [R0, #80] 0x34184BDC: F1B0 5F80 CMP.W R0, #0x10000000 0x34184BE0: D009 BEQ 46L306 ; 0x34184BF6 0x34184BE2: 9804 LDR R0, [SP, #16] 0x34184BE4: 6D00 LDR R0, [R0, #80] 0x34184BE6: F1B0 5F00 CMP.W R0, #0x20000000 0x34184BEA: D004 BEQ 46L306 ; 0x34184BF6 0x34184BEC: 9804 LDR R0, [SP, #16] 0x34184BEE: 6D00 LDR R0, [R0, #80] 0x34184BF0: F1B0 5F40 CMP.W R0, #0x30000000 0x34184BF4: D100 BNE 46L307 ; 0x34184BF8
.L306: 0x34184BF6: E007 B 46L308 ; 0x34184C08
.L307: 0x34184BF8: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34184BFC: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34184C00: F240 31CA MOVW R1, #0x03CA 0x34184C04: F009 F84A BL assert_failed ; 0x3418DC9C
.L308: 0x34184C08: 9804 LDR R0, [SP, #16] 0x34184C0A: 6D40 LDR R0, [R0, #84] 0x34184C0C: B128 CBZ R0, .L309 ; 0x34184C1A 0x34184C0E: 9804 LDR R0, [SP, #16] 0x34184C10: 6D40 LDR R0, [R0, #84] 0x34184C12: F5B0 7F80 CMP.W R0, #0x0100 0x34184C16: D800 BHI 46L309 ; 0x34184C1A 0x34184C18: E007 B 46L310 ; 0x34184C2A
.L309: 0x34184C1A: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34184C1E: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34184C22: F240 31CB MOVW R1, #0x03CB 0x34184C26: F009 F839 BL assert_failed ; 0x3418DC9C
.L310: 0x34184C2A: F248 01E8 MOVW R1, #0x80E8 0x34184C2E: F2C5 6102 MOVT R1, #0x5602 0x34184C32: 6808 LDR R0, [R1] 0x34184C34: F64F 72FF MOVW R2, #0xFFFF 0x34184C38: F6CC 7200 MOVT R2, #0xCF00 0x34184C3C: 4010 ANDS R0, R2 0x34184C3E: 9B04 LDR R3, [SP, #16] 0x34184C40: 6D1A LDR R2, [R3, #80] 0x34184C42: F8D3 C054 LDR.W R12, [R3, #84] 0x34184C46: 2300 MOVS R3, #0 0x34184C48: F6CF 73FF MOVT R3, #0xFFFF 0x34184C4C: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34184C50: 431A ORRS R2, R3 0x34184C52: 4310 ORRS R0, R2 0x34184C54: 6008 STR R0, [R1] 0x34184C56: F003 FCD3 BL LL_RCC_IC10_Enable.61 ; 0x34188600 0x34184C5A: E059 B 46L318 ; 0x34184D10
.L311: 0x34184C5C: 9804 LDR R0, [SP, #16] 0x34184C5E: F8D0 00F4 LDR.W R0, [R0, #244] 0x34184C62: F640 410C MOVW R1, #0x0C0C 0x34184C66: F2C0 7103 MOVT R1, #0x0703 0x34184C6A: 4288 CMP R0, R1 0x34184C6C: D144 BNE 46L317 ; 0x34184CF8 0x34184C6E: 9804 LDR R0, [SP, #16] 0x34184C70: 6F80 LDR R0, [R0, #120] 0x34184C72: B170 CBZ R0, .L312 ; 0x34184C92 0x34184C74: 9804 LDR R0, [SP, #16] 0x34184C76: 6F80 LDR R0, [R0, #120] 0x34184C78: F1B0 5F80 CMP.W R0, #0x10000000 0x34184C7C: D009 BEQ 46L312 ; 0x34184C92 0x34184C7E: 9804 LDR R0, [SP, #16] 0x34184C80: 6F80 LDR R0, [R0, #120] 0x34184C82: F1B0 5F00 CMP.W R0, #0x20000000 0x34184C86: D004 BEQ 46L312 ; 0x34184C92 0x34184C88: 9804 LDR R0, [SP, #16] 0x34184C8A: 6F80 LDR R0, [R0, #120] 0x34184C8C: F1B0 5F40 CMP.W R0, #0x30000000 0x34184C90: D100 BNE 46L313 ; 0x34184C94
.L312: 0x34184C92: E007 B 46L314 ; 0x34184CA4
.L313: 0x34184C94: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34184C98: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34184C9C: F240 31D7 MOVW R1, #0x03D7 0x34184CA0: F008 FFFC BL assert_failed ; 0x3418DC9C
.L314: 0x34184CA4: 9804 LDR R0, [SP, #16] 0x34184CA6: 6FC0 LDR R0, [R0, #124] 0x34184CA8: B128 CBZ R0, .L315 ; 0x34184CB6 0x34184CAA: 9804 LDR R0, [SP, #16] 0x34184CAC: 6FC0 LDR R0, [R0, #124] 0x34184CAE: F5B0 7F80 CMP.W R0, #0x0100 0x34184CB2: D800 BHI 46L315 ; 0x34184CB6 0x34184CB4: E007 B 46L316 ; 0x34184CC6
.L315: 0x34184CB6: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34184CBA: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34184CBE: F44F 7176 MOV.W R1, #0x03D8 0x34184CC2: F008 FFEB BL assert_failed ; 0x3418DC9C
.L316: 0x34184CC6: F248 01FC MOVW R1, #0x80FC 0x34184CCA: F2C5 6102 MOVT R1, #0x5602 0x34184CCE: 6808 LDR R0, [R1] 0x34184CD0: F64F 72FF MOVW R2, #0xFFFF 0x34184CD4: F6CC 7200 MOVT R2, #0xCF00 0x34184CD8: 4010 ANDS R0, R2 0x34184CDA: 9B04 LDR R3, [SP, #16] 0x34184CDC: 6F9A LDR R2, [R3, #120] 0x34184CDE: F8D3 C07C LDR.W R12, [R3, #124] 0x34184CE2: 2300 MOVS R3, #0 0x34184CE4: F6CF 73FF MOVT R3, #0xFFFF 0x34184CE8: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34184CEC: 431A ORRS R2, R3 0x34184CEE: 4310 ORRS R0, R2 0x34184CF0: 6008 STR R0, [R1] 0x34184CF2: F003 FC8D BL LL_RCC_IC15_Enable.62 ; 0x34188610 0x34184CF6: E00B B 46L318 ; 0x34184D10
.L317: 0x34184CF8: 9804 LDR R0, [SP, #16] 0x34184CFA: F8D0 00F4 LDR.W R0, [R0, #244] 0x34184CFE: F640 410C MOVW R1, #0x0C0C 0x34184D02: F2C0 7101 MOVT R1, #0x0701 0x34184D06: 4288 CMP R0, R1 0x34184D08: D102 BNE 46L318 ; 0x34184D10 0x34184D0A: F00B FAA9 BL LL_RCC_CLKP_Enable ; 0x34190260 0x34184D0E: E7FF B 46L318 ; 0x34184D10
.L318: 0x34184D10: 9804 LDR R0, [SP, #16] 0x34184D12: F8D0 00F4 LDR.W R0, [R0, #244] 0x34184D16: F003 FD41 BL LL_RCC_SetI2CClockSource ; 0x3418879C
.L319: 0x34184D1A: 9804 LDR R0, [SP, #16] 0x34184D1C: 7880 LDRB R0, [R0, #2] 0x34184D1E: 07C0 LSLS R0, R0, #31 0x34184D20: 2800 CMP R0, #0 0x34184D22: F000 80EC BEQ.W 46L336 ; 0x34184EFE 0x34184D26: 9804 LDR R0, [SP, #16] 0x34184D28: F8D0 00F8 LDR.W R0, [R0, #248] 0x34184D2C: F241 010C MOVW R1, #0x100C 0x34184D30: F2C0 7100 MOVT R1, #0x0700 0x34184D34: 4288 CMP R0, R1 0x34184D36: D02C BEQ 46L320 ; 0x34184D92 0x34184D38: 9804 LDR R0, [SP, #16] 0x34184D3A: F8D0 00F8 LDR.W R0, [R0, #248] 0x34184D3E: F241 010C MOVW R1, #0x100C 0x34184D42: F2C0 7101 MOVT R1, #0x0701 0x34184D46: 4288 CMP R0, R1 0x34184D48: D023 BEQ 46L320 ; 0x34184D92 0x34184D4A: 9804 LDR R0, [SP, #16] 0x34184D4C: F8D0 00F8 LDR.W R0, [R0, #248] 0x34184D50: F241 010C MOVW R1, #0x100C 0x34184D54: F2C0 7102 MOVT R1, #0x0702 0x34184D58: 4288 CMP R0, R1 0x34184D5A: D01A BEQ 46L320 ; 0x34184D92 0x34184D5C: 9804 LDR R0, [SP, #16] 0x34184D5E: F8D0 00F8 LDR.W R0, [R0, #248] 0x34184D62: F241 010C MOVW R1, #0x100C 0x34184D66: F2C0 7103 MOVT R1, #0x0703 0x34184D6A: 4288 CMP R0, R1 0x34184D6C: D011 BEQ 46L320 ; 0x34184D92 0x34184D6E: 9804 LDR R0, [SP, #16] 0x34184D70: F8D0 00F8 LDR.W R0, [R0, #248] 0x34184D74: F241 010C MOVW R1, #0x100C 0x34184D78: F2C0 7104 MOVT R1, #0x0704 0x34184D7C: 4288 CMP R0, R1 0x34184D7E: D008 BEQ 46L320 ; 0x34184D92 0x34184D80: 9804 LDR R0, [SP, #16] 0x34184D82: F8D0 00F8 LDR.W R0, [R0, #248] 0x34184D86: F241 010C MOVW R1, #0x100C 0x34184D8A: F2C0 7105 MOVT R1, #0x0705 0x34184D8E: 4288 CMP R0, R1 0x34184D90: D100 BNE 46L321 ; 0x34184D94
.L320: 0x34184D92: E007 B 46L322 ; 0x34184DA4
.L321: 0x34184D94: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34184D98: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34184D9C: F240 31F2 MOVW R1, #0x03F2 0x34184DA0: F008 FF7C BL assert_failed ; 0x3418DC9C
.L322: 0x34184DA4: 9804 LDR R0, [SP, #16] 0x34184DA6: F8D0 00F8 LDR.W R0, [R0, #248] 0x34184DAA: F241 010C MOVW R1, #0x100C 0x34184DAE: F2C0 7102 MOVT R1, #0x0702 0x34184DB2: 4288 CMP R0, R1 0x34184DB4: D144 BNE 46L328 ; 0x34184E40 0x34184DB6: 9804 LDR R0, [SP, #16] 0x34184DB8: 6D00 LDR R0, [R0, #80] 0x34184DBA: B170 CBZ R0, .L323 ; 0x34184DDA 0x34184DBC: 9804 LDR R0, [SP, #16] 0x34184DBE: 6D00 LDR R0, [R0, #80] 0x34184DC0: F1B0 5F80 CMP.W R0, #0x10000000 0x34184DC4: D009 BEQ 46L323 ; 0x34184DDA 0x34184DC6: 9804 LDR R0, [SP, #16] 0x34184DC8: 6D00 LDR R0, [R0, #80] 0x34184DCA: F1B0 5F00 CMP.W R0, #0x20000000 0x34184DCE: D004 BEQ 46L323 ; 0x34184DDA 0x34184DD0: 9804 LDR R0, [SP, #16] 0x34184DD2: 6D00 LDR R0, [R0, #80] 0x34184DD4: F1B0 5F40 CMP.W R0, #0x30000000 0x34184DD8: D100 BNE 46L324 ; 0x34184DDC
.L323: 0x34184DDA: E007 B 46L325 ; 0x34184DEC
.L324: 0x34184DDC: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34184DE0: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34184DE4: F240 31F7 MOVW R1, #0x03F7 0x34184DE8: F008 FF58 BL assert_failed ; 0x3418DC9C
.L325: 0x34184DEC: 9804 LDR R0, [SP, #16] 0x34184DEE: 6D40 LDR R0, [R0, #84] 0x34184DF0: B128 CBZ R0, .L326 ; 0x34184DFE 0x34184DF2: 9804 LDR R0, [SP, #16] 0x34184DF4: 6D40 LDR R0, [R0, #84] 0x34184DF6: F5B0 7F80 CMP.W R0, #0x0100 0x34184DFA: D800 BHI 46L326 ; 0x34184DFE 0x34184DFC: E007 B 46L327 ; 0x34184E0E
.L326: 0x34184DFE: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34184E02: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34184E06: F44F 717E MOV.W R1, #0x03F8 0x34184E0A: F008 FF47 BL assert_failed ; 0x3418DC9C
.L327: 0x34184E0E: F248 01E8 MOVW R1, #0x80E8 0x34184E12: F2C5 6102 MOVT R1, #0x5602 0x34184E16: 6808 LDR R0, [R1] 0x34184E18: F64F 72FF MOVW R2, #0xFFFF 0x34184E1C: F6CC 7200 MOVT R2, #0xCF00 0x34184E20: 4010 ANDS R0, R2 0x34184E22: 9B04 LDR R3, [SP, #16] 0x34184E24: 6D1A LDR R2, [R3, #80] 0x34184E26: F8D3 C054 LDR.W R12, [R3, #84] 0x34184E2A: 2300 MOVS R3, #0 0x34184E2C: F6CF 73FF MOVT R3, #0xFFFF 0x34184E30: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34184E34: 431A ORRS R2, R3 0x34184E36: 4310 ORRS R0, R2 0x34184E38: 6008 STR R0, [R1] 0x34184E3A: F003 FBE1 BL LL_RCC_IC10_Enable.61 ; 0x34188600 0x34184E3E: E059 B 46L335 ; 0x34184EF4
.L328: 0x34184E40: 9804 LDR R0, [SP, #16] 0x34184E42: F8D0 00F8 LDR.W R0, [R0, #248] 0x34184E46: F241 010C MOVW R1, #0x100C 0x34184E4A: F2C0 7103 MOVT R1, #0x0703 0x34184E4E: 4288 CMP R0, R1 0x34184E50: D144 BNE 46L334 ; 0x34184EDC 0x34184E52: 9804 LDR R0, [SP, #16] 0x34184E54: 6F80 LDR R0, [R0, #120] 0x34184E56: B170 CBZ R0, .L329 ; 0x34184E76 0x34184E58: 9804 LDR R0, [SP, #16] 0x34184E5A: 6F80 LDR R0, [R0, #120] 0x34184E5C: F1B0 5F80 CMP.W R0, #0x10000000 0x34184E60: D009 BEQ 46L329 ; 0x34184E76 0x34184E62: 9804 LDR R0, [SP, #16] 0x34184E64: 6F80 LDR R0, [R0, #120] 0x34184E66: F1B0 5F00 CMP.W R0, #0x20000000 0x34184E6A: D004 BEQ 46L329 ; 0x34184E76 0x34184E6C: 9804 LDR R0, [SP, #16] 0x34184E6E: 6F80 LDR R0, [R0, #120] 0x34184E70: F1B0 5F40 CMP.W R0, #0x30000000 0x34184E74: D100 BNE 46L330 ; 0x34184E78
.L329: 0x34184E76: E007 B 46L331 ; 0x34184E88
.L330: 0x34184E78: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34184E7C: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34184E80: F240 4104 MOVW R1, #0x0404 0x34184E84: F008 FF0A BL assert_failed ; 0x3418DC9C
.L331: 0x34184E88: 9804 LDR R0, [SP, #16] 0x34184E8A: 6FC0 LDR R0, [R0, #124] 0x34184E8C: B128 CBZ R0, .L332 ; 0x34184E9A 0x34184E8E: 9804 LDR R0, [SP, #16] 0x34184E90: 6FC0 LDR R0, [R0, #124] 0x34184E92: F5B0 7F80 CMP.W R0, #0x0100 0x34184E96: D800 BHI 46L332 ; 0x34184E9A 0x34184E98: E007 B 46L333 ; 0x34184EAA
.L332: 0x34184E9A: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34184E9E: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34184EA2: F240 4105 MOVW R1, #0x0405 0x34184EA6: F008 FEF9 BL assert_failed ; 0x3418DC9C
.L333: 0x34184EAA: F248 01FC MOVW R1, #0x80FC 0x34184EAE: F2C5 6102 MOVT R1, #0x5602 0x34184EB2: 6808 LDR R0, [R1] 0x34184EB4: F64F 72FF MOVW R2, #0xFFFF 0x34184EB8: F6CC 7200 MOVT R2, #0xCF00 0x34184EBC: 4010 ANDS R0, R2 0x34184EBE: 9B04 LDR R3, [SP, #16] 0x34184EC0: 6F9A LDR R2, [R3, #120] 0x34184EC2: F8D3 C07C LDR.W R12, [R3, #124] 0x34184EC6: 2300 MOVS R3, #0 0x34184EC8: F6CF 73FF MOVT R3, #0xFFFF 0x34184ECC: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34184ED0: 431A ORRS R2, R3 0x34184ED2: 4310 ORRS R0, R2 0x34184ED4: 6008 STR R0, [R1] 0x34184ED6: F003 FB9B BL LL_RCC_IC15_Enable.62 ; 0x34188610 0x34184EDA: E00B B 46L335 ; 0x34184EF4
.L334: 0x34184EDC: 9804 LDR R0, [SP, #16] 0x34184EDE: F8D0 00F8 LDR.W R0, [R0, #248] 0x34184EE2: F241 010C MOVW R1, #0x100C 0x34184EE6: F2C0 7101 MOVT R1, #0x0701 0x34184EEA: 4288 CMP R0, R1 0x34184EEC: D102 BNE 46L335 ; 0x34184EF4 0x34184EEE: F00B F9B7 BL LL_RCC_CLKP_Enable ; 0x34190260 0x34184EF2: E7FF B 46L335 ; 0x34184EF4
.L335: 0x34184EF4: 9804 LDR R0, [SP, #16] 0x34184EF6: F8D0 00F8 LDR.W R0, [R0, #248] 0x34184EFA: F003 FC57 BL LL_RCC_SetI3CClockSource ; 0x341887AC
.L336: 0x34184EFE: 9804 LDR R0, [SP, #16] 0x34184F00: 7880 LDRB R0, [R0, #2] 0x34184F02: 0780 LSLS R0, R0, #30 0x34184F04: 2800 CMP R0, #0 0x34184F06: F140 80EC BPL.W 46L353 ; 0x341850E2 0x34184F0A: 9804 LDR R0, [SP, #16] 0x34184F0C: F8D0 00FC LDR.W R0, [R0, #252] 0x34184F10: F241 410C MOVW R1, #0x140C 0x34184F14: F2C0 7100 MOVT R1, #0x0700 0x34184F18: 4288 CMP R0, R1 0x34184F1A: D02C BEQ 46L337 ; 0x34184F76 0x34184F1C: 9804 LDR R0, [SP, #16] 0x34184F1E: F8D0 00FC LDR.W R0, [R0, #252] 0x34184F22: F241 410C MOVW R1, #0x140C 0x34184F26: F2C0 7101 MOVT R1, #0x0701 0x34184F2A: 4288 CMP R0, R1 0x34184F2C: D023 BEQ 46L337 ; 0x34184F76 0x34184F2E: 9804 LDR R0, [SP, #16] 0x34184F30: F8D0 00FC LDR.W R0, [R0, #252] 0x34184F34: F241 410C MOVW R1, #0x140C 0x34184F38: F2C0 7102 MOVT R1, #0x0702 0x34184F3C: 4288 CMP R0, R1 0x34184F3E: D01A BEQ 46L337 ; 0x34184F76 0x34184F40: 9804 LDR R0, [SP, #16] 0x34184F42: F8D0 00FC LDR.W R0, [R0, #252] 0x34184F46: F241 410C MOVW R1, #0x140C 0x34184F4A: F2C0 7103 MOVT R1, #0x0703 0x34184F4E: 4288 CMP R0, R1 0x34184F50: D011 BEQ 46L337 ; 0x34184F76 0x34184F52: 9804 LDR R0, [SP, #16] 0x34184F54: F8D0 00FC LDR.W R0, [R0, #252] 0x34184F58: F241 410C MOVW R1, #0x140C 0x34184F5C: F2C0 7104 MOVT R1, #0x0704 0x34184F60: 4288 CMP R0, R1 0x34184F62: D008 BEQ 46L337 ; 0x34184F76 0x34184F64: 9804 LDR R0, [SP, #16] 0x34184F66: F8D0 00FC LDR.W R0, [R0, #252] 0x34184F6A: F241 410C MOVW R1, #0x140C 0x34184F6E: F2C0 7105 MOVT R1, #0x0705 0x34184F72: 4288 CMP R0, R1 0x34184F74: D100 BNE 46L338 ; 0x34184F78
.L337: 0x34184F76: E007 B 46L339 ; 0x34184F88
.L338: 0x34184F78: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34184F7C: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34184F80: F240 411F MOVW R1, #0x041F 0x34184F84: F008 FE8A BL assert_failed ; 0x3418DC9C
.L339: 0x34184F88: 9804 LDR R0, [SP, #16] 0x34184F8A: F8D0 00FC LDR.W R0, [R0, #252] 0x34184F8E: F241 410C MOVW R1, #0x140C 0x34184F92: F2C0 7102 MOVT R1, #0x0702 0x34184F96: 4288 CMP R0, R1 0x34184F98: D144 BNE 46L345 ; 0x34185024 0x34184F9A: 9804 LDR R0, [SP, #16] 0x34184F9C: 6D00 LDR R0, [R0, #80] 0x34184F9E: B170 CBZ R0, .L340 ; 0x34184FBE 0x34184FA0: 9804 LDR R0, [SP, #16] 0x34184FA2: 6D00 LDR R0, [R0, #80] 0x34184FA4: F1B0 5F80 CMP.W R0, #0x10000000 0x34184FA8: D009 BEQ 46L340 ; 0x34184FBE 0x34184FAA: 9804 LDR R0, [SP, #16] 0x34184FAC: 6D00 LDR R0, [R0, #80] 0x34184FAE: F1B0 5F00 CMP.W R0, #0x20000000 0x34184FB2: D004 BEQ 46L340 ; 0x34184FBE 0x34184FB4: 9804 LDR R0, [SP, #16] 0x34184FB6: 6D00 LDR R0, [R0, #80] 0x34184FB8: F1B0 5F40 CMP.W R0, #0x30000000 0x34184FBC: D100 BNE 46L341 ; 0x34184FC0
.L340: 0x34184FBE: E007 B 46L342 ; 0x34184FD0
.L341: 0x34184FC0: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34184FC4: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34184FC8: F240 4124 MOVW R1, #0x0424 0x34184FCC: F008 FE66 BL assert_failed ; 0x3418DC9C
.L342: 0x34184FD0: 9804 LDR R0, [SP, #16] 0x34184FD2: 6D40 LDR R0, [R0, #84] 0x34184FD4: B128 CBZ R0, .L343 ; 0x34184FE2 0x34184FD6: 9804 LDR R0, [SP, #16] 0x34184FD8: 6D40 LDR R0, [R0, #84] 0x34184FDA: F5B0 7F80 CMP.W R0, #0x0100 0x34184FDE: D800 BHI 46L343 ; 0x34184FE2 0x34184FE0: E007 B 46L344 ; 0x34184FF2
.L343: 0x34184FE2: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34184FE6: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34184FEA: F240 4125 MOVW R1, #0x0425 0x34184FEE: F008 FE55 BL assert_failed ; 0x3418DC9C
.L344: 0x34184FF2: F248 01E8 MOVW R1, #0x80E8 0x34184FF6: F2C5 6102 MOVT R1, #0x5602 0x34184FFA: 6808 LDR R0, [R1] 0x34184FFC: F64F 72FF MOVW R2, #0xFFFF 0x34185000: F6CC 7200 MOVT R2, #0xCF00 0x34185004: 4010 ANDS R0, R2 0x34185006: 9B04 LDR R3, [SP, #16] 0x34185008: 6D1A LDR R2, [R3, #80] 0x3418500A: F8D3 C054 LDR.W R12, [R3, #84] 0x3418500E: 2300 MOVS R3, #0 0x34185010: F6CF 73FF MOVT R3, #0xFFFF 0x34185014: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34185018: 431A ORRS R2, R3 0x3418501A: 4310 ORRS R0, R2 0x3418501C: 6008 STR R0, [R1] 0x3418501E: F003 FAEF BL LL_RCC_IC10_Enable.61 ; 0x34188600 0x34185022: E059 B 46L352 ; 0x341850D8
.L345: 0x34185024: 9804 LDR R0, [SP, #16] 0x34185026: F8D0 00FC LDR.W R0, [R0, #252] 0x3418502A: F241 410C MOVW R1, #0x140C 0x3418502E: F2C0 7103 MOVT R1, #0x0703 0x34185032: 4288 CMP R0, R1 0x34185034: D144 BNE 46L351 ; 0x341850C0 0x34185036: 9804 LDR R0, [SP, #16] 0x34185038: 6F80 LDR R0, [R0, #120] 0x3418503A: B170 CBZ R0, .L346 ; 0x3418505A 0x3418503C: 9804 LDR R0, [SP, #16] 0x3418503E: 6F80 LDR R0, [R0, #120] 0x34185040: F1B0 5F80 CMP.W R0, #0x10000000 0x34185044: D009 BEQ 46L346 ; 0x3418505A 0x34185046: 9804 LDR R0, [SP, #16] 0x34185048: 6F80 LDR R0, [R0, #120] 0x3418504A: F1B0 5F00 CMP.W R0, #0x20000000 0x3418504E: D004 BEQ 46L346 ; 0x3418505A 0x34185050: 9804 LDR R0, [SP, #16] 0x34185052: 6F80 LDR R0, [R0, #120] 0x34185054: F1B0 5F40 CMP.W R0, #0x30000000 0x34185058: D100 BNE 46L347 ; 0x3418505C
.L346: 0x3418505A: E007 B 46L348 ; 0x3418506C
.L347: 0x3418505C: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34185060: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34185064: F240 4131 MOVW R1, #0x0431 0x34185068: F008 FE18 BL assert_failed ; 0x3418DC9C
.L348: 0x3418506C: 9804 LDR R0, [SP, #16] 0x3418506E: 6FC0 LDR R0, [R0, #124] 0x34185070: B128 CBZ R0, .L349 ; 0x3418507E 0x34185072: 9804 LDR R0, [SP, #16] 0x34185074: 6FC0 LDR R0, [R0, #124] 0x34185076: F5B0 7F80 CMP.W R0, #0x0100 0x3418507A: D800 BHI 46L349 ; 0x3418507E 0x3418507C: E007 B 46L350 ; 0x3418508E
.L349: 0x3418507E: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34185082: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34185086: F240 4132 MOVW R1, #0x0432 0x3418508A: F008 FE07 BL assert_failed ; 0x3418DC9C
.L350: 0x3418508E: F248 01FC MOVW R1, #0x80FC 0x34185092: F2C5 6102 MOVT R1, #0x5602 0x34185096: 6808 LDR R0, [R1] 0x34185098: F64F 72FF MOVW R2, #0xFFFF 0x3418509C: F6CC 7200 MOVT R2, #0xCF00 0x341850A0: 4010 ANDS R0, R2 0x341850A2: 9B04 LDR R3, [SP, #16] 0x341850A4: 6F9A LDR R2, [R3, #120] 0x341850A6: F8D3 C07C LDR.W R12, [R3, #124] 0x341850AA: 2300 MOVS R3, #0 0x341850AC: F6CF 73FF MOVT R3, #0xFFFF 0x341850B0: EB03 430C ADD.W R3, R3, R12, LSL #16 0x341850B4: 431A ORRS R2, R3 0x341850B6: 4310 ORRS R0, R2 0x341850B8: 6008 STR R0, [R1] 0x341850BA: F003 FAA9 BL LL_RCC_IC15_Enable.62 ; 0x34188610 0x341850BE: E00B B 46L352 ; 0x341850D8
.L351: 0x341850C0: 9804 LDR R0, [SP, #16] 0x341850C2: F8D0 00FC LDR.W R0, [R0, #252] 0x341850C6: F241 410C MOVW R1, #0x140C 0x341850CA: F2C0 7101 MOVT R1, #0x0701 0x341850CE: 4288 CMP R0, R1 0x341850D0: D102 BNE 46L352 ; 0x341850D8 0x341850D2: F00B F8C5 BL LL_RCC_CLKP_Enable ; 0x34190260 0x341850D6: E7FF B 46L352 ; 0x341850D8
.L352: 0x341850D8: 9804 LDR R0, [SP, #16] 0x341850DA: F8D0 00FC LDR.W R0, [R0, #252] 0x341850DE: F003 FB65 BL LL_RCC_SetI3CClockSource ; 0x341887AC
.L353: 0x341850E2: 9804 LDR R0, [SP, #16] 0x341850E4: 7880 LDRB R0, [R0, #2] 0x341850E6: 0740 LSLS R0, R0, #29 0x341850E8: 2800 CMP R0, #0 0x341850EA: F140 809E BPL.W 46L364 ; 0x3418522A 0x341850EE: 9804 LDR R0, [SP, #16] 0x341850F0: F8D0 0100 LDR.W R0, [R0, #0x0100] 0x341850F4: F640 012C MOVW R1, #0x082C 0x341850F8: F2C0 7100 MOVT R1, #0x0700 0x341850FC: 4288 CMP R0, R1 0x341850FE: D02C BEQ 46L354 ; 0x3418515A 0x34185100: 9804 LDR R0, [SP, #16] 0x34185102: F8D0 0100 LDR.W R0, [R0, #0x0100] 0x34185106: F640 012C MOVW R1, #0x082C 0x3418510A: F2C0 7101 MOVT R1, #0x0701 0x3418510E: 4288 CMP R0, R1 0x34185110: D023 BEQ 46L354 ; 0x3418515A 0x34185112: 9804 LDR R0, [SP, #16] 0x34185114: F8D0 0100 LDR.W R0, [R0, #0x0100] 0x34185118: F640 012C MOVW R1, #0x082C 0x3418511C: F2C0 7102 MOVT R1, #0x0702 0x34185120: 4288 CMP R0, R1 0x34185122: D01A BEQ 46L354 ; 0x3418515A 0x34185124: 9804 LDR R0, [SP, #16] 0x34185126: F8D0 0100 LDR.W R0, [R0, #0x0100] 0x3418512A: F640 012C MOVW R1, #0x082C 0x3418512E: F2C0 7103 MOVT R1, #0x0703 0x34185132: 4288 CMP R0, R1 0x34185134: D011 BEQ 46L354 ; 0x3418515A 0x34185136: 9804 LDR R0, [SP, #16] 0x34185138: F8D0 0100 LDR.W R0, [R0, #0x0100] 0x3418513C: F640 012C MOVW R1, #0x082C 0x34185140: F2C0 7104 MOVT R1, #0x0704 0x34185144: 4288 CMP R0, R1 0x34185146: D008 BEQ 46L354 ; 0x3418515A 0x34185148: 9804 LDR R0, [SP, #16] 0x3418514A: F8D0 0100 LDR.W R0, [R0, #0x0100] 0x3418514E: F640 012C MOVW R1, #0x082C 0x34185152: F2C0 7105 MOVT R1, #0x0705 0x34185156: 4288 CMP R0, R1 0x34185158: D100 BNE 46L355 ; 0x3418515C
.L354: 0x3418515A: E007 B 46L356 ; 0x3418516C
.L355: 0x3418515C: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34185160: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34185164: F240 414C MOVW R1, #0x044C 0x34185168: F008 FD98 BL assert_failed ; 0x3418DC9C
.L356: 0x3418516C: 9804 LDR R0, [SP, #16] 0x3418516E: F8D0 0100 LDR.W R0, [R0, #0x0100] 0x34185172: F640 012C MOVW R1, #0x082C 0x34185176: F2C0 7102 MOVT R1, #0x0702 0x3418517A: 4288 CMP R0, R1 0x3418517C: D144 BNE 46L362 ; 0x34185208 0x3418517E: 9804 LDR R0, [SP, #16] 0x34185180: 6F80 LDR R0, [R0, #120] 0x34185182: B170 CBZ R0, .L357 ; 0x341851A2 0x34185184: 9804 LDR R0, [SP, #16] 0x34185186: 6F80 LDR R0, [R0, #120] 0x34185188: F1B0 5F80 CMP.W R0, #0x10000000 0x3418518C: D009 BEQ 46L357 ; 0x341851A2 0x3418518E: 9804 LDR R0, [SP, #16] 0x34185190: 6F80 LDR R0, [R0, #120] 0x34185192: F1B0 5F00 CMP.W R0, #0x20000000 0x34185196: D004 BEQ 46L357 ; 0x341851A2 0x34185198: 9804 LDR R0, [SP, #16] 0x3418519A: 6F80 LDR R0, [R0, #120] 0x3418519C: F1B0 5F40 CMP.W R0, #0x30000000 0x341851A0: D100 BNE 46L358 ; 0x341851A4
.L357: 0x341851A2: E007 B 46L359 ; 0x341851B4
.L358: 0x341851A4: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341851A8: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341851AC: F240 4151 MOVW R1, #0x0451 0x341851B0: F008 FD74 BL assert_failed ; 0x3418DC9C
.L359: 0x341851B4: 9804 LDR R0, [SP, #16] 0x341851B6: 6FC0 LDR R0, [R0, #124] 0x341851B8: B128 CBZ R0, .L360 ; 0x341851C6 0x341851BA: 9804 LDR R0, [SP, #16] 0x341851BC: 6FC0 LDR R0, [R0, #124] 0x341851BE: F5B0 7F80 CMP.W R0, #0x0100 0x341851C2: D800 BHI 46L360 ; 0x341851C6 0x341851C4: E007 B 46L361 ; 0x341851D6
.L360: 0x341851C6: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341851CA: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341851CE: F240 4152 MOVW R1, #0x0452 0x341851D2: F008 FD63 BL assert_failed ; 0x3418DC9C
.L361: 0x341851D6: F248 01FC MOVW R1, #0x80FC 0x341851DA: F2C5 6102 MOVT R1, #0x5602 0x341851DE: 6808 LDR R0, [R1] 0x341851E0: F64F 72FF MOVW R2, #0xFFFF 0x341851E4: F6CC 7200 MOVT R2, #0xCF00 0x341851E8: 4010 ANDS R0, R2 0x341851EA: 9B04 LDR R3, [SP, #16] 0x341851EC: 6F9A LDR R2, [R3, #120] 0x341851EE: F8D3 C07C LDR.W R12, [R3, #124] 0x341851F2: 2300 MOVS R3, #0 0x341851F4: F6CF 73FF MOVT R3, #0xFFFF 0x341851F8: EB03 430C ADD.W R3, R3, R12, LSL #16 0x341851FC: 431A ORRS R2, R3 0x341851FE: 4310 ORRS R0, R2 0x34185200: 6008 STR R0, [R1] 0x34185202: F003 FA05 BL LL_RCC_IC15_Enable.62 ; 0x34188610 0x34185206: E00B B 46L363 ; 0x34185220
.L362: 0x34185208: 9804 LDR R0, [SP, #16] 0x3418520A: F8D0 0100 LDR.W R0, [R0, #0x0100] 0x3418520E: F640 012C MOVW R1, #0x082C 0x34185212: F2C0 7101 MOVT R1, #0x0701 0x34185216: 4288 CMP R0, R1 0x34185218: D102 BNE 46L363 ; 0x34185220 0x3418521A: F00B F821 BL LL_RCC_CLKP_Enable ; 0x34190260 0x3418521E: E7FF B 46L363 ; 0x34185220
.L363: 0x34185220: 9804 LDR R0, [SP, #16] 0x34185222: F8D0 0100 LDR.W R0, [R0, #0x0100] 0x34185226: F003 FAC9 BL LL_RCC_SetLPTIMClockSource ; 0x341887BC
.L364: 0x3418522A: 9804 LDR R0, [SP, #16] 0x3418522C: 7880 LDRB R0, [R0, #2] 0x3418522E: 0700 LSLS R0, R0, #28 0x34185230: 2800 CMP R0, #0 0x34185232: F140 809E BPL.W 46L375 ; 0x34185372 0x34185236: 9804 LDR R0, [SP, #16] 0x34185238: F8D0 0104 LDR.W R0, [R0, #0x0104] 0x3418523C: F640 412C MOVW R1, #0x0C2C 0x34185240: F2C0 7100 MOVT R1, #0x0700 0x34185244: 4288 CMP R0, R1 0x34185246: D02C BEQ 46L365 ; 0x341852A2 0x34185248: 9804 LDR R0, [SP, #16] 0x3418524A: F8D0 0104 LDR.W R0, [R0, #0x0104] 0x3418524E: F640 412C MOVW R1, #0x0C2C 0x34185252: F2C0 7101 MOVT R1, #0x0701 0x34185256: 4288 CMP R0, R1 0x34185258: D023 BEQ 46L365 ; 0x341852A2 0x3418525A: 9804 LDR R0, [SP, #16] 0x3418525C: F8D0 0104 LDR.W R0, [R0, #0x0104] 0x34185260: F640 412C MOVW R1, #0x0C2C 0x34185264: F2C0 7102 MOVT R1, #0x0702 0x34185268: 4288 CMP R0, R1 0x3418526A: D01A BEQ 46L365 ; 0x341852A2 0x3418526C: 9804 LDR R0, [SP, #16] 0x3418526E: F8D0 0104 LDR.W R0, [R0, #0x0104] 0x34185272: F640 412C MOVW R1, #0x0C2C 0x34185276: F2C0 7103 MOVT R1, #0x0703 0x3418527A: 4288 CMP R0, R1 0x3418527C: D011 BEQ 46L365 ; 0x341852A2 0x3418527E: 9804 LDR R0, [SP, #16] 0x34185280: F8D0 0104 LDR.W R0, [R0, #0x0104] 0x34185284: F640 412C MOVW R1, #0x0C2C 0x34185288: F2C0 7104 MOVT R1, #0x0704 0x3418528C: 4288 CMP R0, R1 0x3418528E: D008 BEQ 46L365 ; 0x341852A2 0x34185290: 9804 LDR R0, [SP, #16] 0x34185292: F8D0 0104 LDR.W R0, [R0, #0x0104] 0x34185296: F640 412C MOVW R1, #0x0C2C 0x3418529A: F2C0 7105 MOVT R1, #0x0705 0x3418529E: 4288 CMP R0, R1 0x341852A0: D100 BNE 46L366 ; 0x341852A4
.L365: 0x341852A2: E007 B 46L367 ; 0x341852B4
.L366: 0x341852A4: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341852A8: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341852AC: F240 416C MOVW R1, #0x046C 0x341852B0: F008 FCF4 BL assert_failed ; 0x3418DC9C
.L367: 0x341852B4: 9804 LDR R0, [SP, #16] 0x341852B6: F8D0 0104 LDR.W R0, [R0, #0x0104] 0x341852BA: F640 412C MOVW R1, #0x0C2C 0x341852BE: F2C0 7102 MOVT R1, #0x0702 0x341852C2: 4288 CMP R0, R1 0x341852C4: D144 BNE 46L373 ; 0x34185350 0x341852C6: 9804 LDR R0, [SP, #16] 0x341852C8: 6F80 LDR R0, [R0, #120] 0x341852CA: B170 CBZ R0, .L368 ; 0x341852EA 0x341852CC: 9804 LDR R0, [SP, #16] 0x341852CE: 6F80 LDR R0, [R0, #120] 0x341852D0: F1B0 5F80 CMP.W R0, #0x10000000 0x341852D4: D009 BEQ 46L368 ; 0x341852EA 0x341852D6: 9804 LDR R0, [SP, #16] 0x341852D8: 6F80 LDR R0, [R0, #120] 0x341852DA: F1B0 5F00 CMP.W R0, #0x20000000 0x341852DE: D004 BEQ 46L368 ; 0x341852EA 0x341852E0: 9804 LDR R0, [SP, #16] 0x341852E2: 6F80 LDR R0, [R0, #120] 0x341852E4: F1B0 5F40 CMP.W R0, #0x30000000 0x341852E8: D100 BNE 46L369 ; 0x341852EC
.L368: 0x341852EA: E007 B 46L370 ; 0x341852FC
.L369: 0x341852EC: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341852F0: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341852F4: F240 4171 MOVW R1, #0x0471 0x341852F8: F008 FCD0 BL assert_failed ; 0x3418DC9C
.L370: 0x341852FC: 9804 LDR R0, [SP, #16] 0x341852FE: 6FC0 LDR R0, [R0, #124] 0x34185300: B128 CBZ R0, .L371 ; 0x3418530E 0x34185302: 9804 LDR R0, [SP, #16] 0x34185304: 6FC0 LDR R0, [R0, #124] 0x34185306: F5B0 7F80 CMP.W R0, #0x0100 0x3418530A: D800 BHI 46L371 ; 0x3418530E 0x3418530C: E007 B 46L372 ; 0x3418531E
.L371: 0x3418530E: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34185312: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34185316: F240 4172 MOVW R1, #0x0472 0x3418531A: F008 FCBF BL assert_failed ; 0x3418DC9C
.L372: 0x3418531E: F248 01FC MOVW R1, #0x80FC 0x34185322: F2C5 6102 MOVT R1, #0x5602 0x34185326: 6808 LDR R0, [R1] 0x34185328: F64F 72FF MOVW R2, #0xFFFF 0x3418532C: F6CC 7200 MOVT R2, #0xCF00 0x34185330: 4010 ANDS R0, R2 0x34185332: 9B04 LDR R3, [SP, #16] 0x34185334: 6F9A LDR R2, [R3, #120] 0x34185336: F8D3 C07C LDR.W R12, [R3, #124] 0x3418533A: 2300 MOVS R3, #0 0x3418533C: F6CF 73FF MOVT R3, #0xFFFF 0x34185340: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34185344: 431A ORRS R2, R3 0x34185346: 4310 ORRS R0, R2 0x34185348: 6008 STR R0, [R1] 0x3418534A: F003 F961 BL LL_RCC_IC15_Enable.62 ; 0x34188610 0x3418534E: E00B B 46L374 ; 0x34185368
.L373: 0x34185350: 9804 LDR R0, [SP, #16] 0x34185352: F8D0 0104 LDR.W R0, [R0, #0x0104] 0x34185356: F640 412C MOVW R1, #0x0C2C 0x3418535A: F2C0 7101 MOVT R1, #0x0701 0x3418535E: 4288 CMP R0, R1 0x34185360: D102 BNE 46L374 ; 0x34185368 0x34185362: F00A FF7D BL LL_RCC_CLKP_Enable ; 0x34190260 0x34185366: E7FF B 46L374 ; 0x34185368
.L374: 0x34185368: 9804 LDR R0, [SP, #16] 0x3418536A: F8D0 0104 LDR.W R0, [R0, #0x0104] 0x3418536E: F003 FA25 BL LL_RCC_SetLPTIMClockSource ; 0x341887BC
.L375: 0x34185372: 9804 LDR R0, [SP, #16] 0x34185374: 7880 LDRB R0, [R0, #2] 0x34185376: 06C0 LSLS R0, R0, #27 0x34185378: 2800 CMP R0, #0 0x3418537A: F140 809E BPL.W 46L386 ; 0x341854BA 0x3418537E: 9804 LDR R0, [SP, #16] 0x34185380: F8D0 0108 LDR.W R0, [R0, #0x0108] 0x34185384: F241 012C MOVW R1, #0x102C 0x34185388: F2C0 7100 MOVT R1, #0x0700 0x3418538C: 4288 CMP R0, R1 0x3418538E: D02C BEQ 46L376 ; 0x341853EA 0x34185390: 9804 LDR R0, [SP, #16] 0x34185392: F8D0 0108 LDR.W R0, [R0, #0x0108] 0x34185396: F241 012C MOVW R1, #0x102C 0x3418539A: F2C0 7101 MOVT R1, #0x0701 0x3418539E: 4288 CMP R0, R1 0x341853A0: D023 BEQ 46L376 ; 0x341853EA 0x341853A2: 9804 LDR R0, [SP, #16] 0x341853A4: F8D0 0108 LDR.W R0, [R0, #0x0108] 0x341853A8: F241 012C MOVW R1, #0x102C 0x341853AC: F2C0 7102 MOVT R1, #0x0702 0x341853B0: 4288 CMP R0, R1 0x341853B2: D01A BEQ 46L376 ; 0x341853EA 0x341853B4: 9804 LDR R0, [SP, #16] 0x341853B6: F8D0 0108 LDR.W R0, [R0, #0x0108] 0x341853BA: F241 012C MOVW R1, #0x102C 0x341853BE: F2C0 7103 MOVT R1, #0x0703 0x341853C2: 4288 CMP R0, R1 0x341853C4: D011 BEQ 46L376 ; 0x341853EA 0x341853C6: 9804 LDR R0, [SP, #16] 0x341853C8: F8D0 0108 LDR.W R0, [R0, #0x0108] 0x341853CC: F241 012C MOVW R1, #0x102C 0x341853D0: F2C0 7104 MOVT R1, #0x0704 0x341853D4: 4288 CMP R0, R1 0x341853D6: D008 BEQ 46L376 ; 0x341853EA 0x341853D8: 9804 LDR R0, [SP, #16] 0x341853DA: F8D0 0108 LDR.W R0, [R0, #0x0108] 0x341853DE: F241 012C MOVW R1, #0x102C 0x341853E2: F2C0 7105 MOVT R1, #0x0705 0x341853E6: 4288 CMP R0, R1 0x341853E8: D100 BNE 46L377 ; 0x341853EC
.L376: 0x341853EA: E007 B 46L378 ; 0x341853FC
.L377: 0x341853EC: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341853F0: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341853F4: F240 418C MOVW R1, #0x048C 0x341853F8: F008 FC50 BL assert_failed ; 0x3418DC9C
.L378: 0x341853FC: 9804 LDR R0, [SP, #16] 0x341853FE: F8D0 0108 LDR.W R0, [R0, #0x0108] 0x34185402: F241 012C MOVW R1, #0x102C 0x34185406: F2C0 7102 MOVT R1, #0x0702 0x3418540A: 4288 CMP R0, R1 0x3418540C: D144 BNE 46L384 ; 0x34185498 0x3418540E: 9804 LDR R0, [SP, #16] 0x34185410: 6F80 LDR R0, [R0, #120] 0x34185412: B170 CBZ R0, .L379 ; 0x34185432 0x34185414: 9804 LDR R0, [SP, #16] 0x34185416: 6F80 LDR R0, [R0, #120] 0x34185418: F1B0 5F80 CMP.W R0, #0x10000000 0x3418541C: D009 BEQ 46L379 ; 0x34185432 0x3418541E: 9804 LDR R0, [SP, #16] 0x34185420: 6F80 LDR R0, [R0, #120] 0x34185422: F1B0 5F00 CMP.W R0, #0x20000000 0x34185426: D004 BEQ 46L379 ; 0x34185432 0x34185428: 9804 LDR R0, [SP, #16] 0x3418542A: 6F80 LDR R0, [R0, #120] 0x3418542C: F1B0 5F40 CMP.W R0, #0x30000000 0x34185430: D100 BNE 46L380 ; 0x34185434
.L379: 0x34185432: E007 B 46L381 ; 0x34185444
.L380: 0x34185434: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34185438: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x3418543C: F240 4191 MOVW R1, #0x0491 0x34185440: F008 FC2C BL assert_failed ; 0x3418DC9C
.L381: 0x34185444: 9804 LDR R0, [SP, #16] 0x34185446: 6FC0 LDR R0, [R0, #124] 0x34185448: B128 CBZ R0, .L382 ; 0x34185456 0x3418544A: 9804 LDR R0, [SP, #16] 0x3418544C: 6FC0 LDR R0, [R0, #124] 0x3418544E: F5B0 7F80 CMP.W R0, #0x0100 0x34185452: D800 BHI 46L382 ; 0x34185456 0x34185454: E007 B 46L383 ; 0x34185466
.L382: 0x34185456: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x3418545A: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x3418545E: F240 4192 MOVW R1, #0x0492 0x34185462: F008 FC1B BL assert_failed ; 0x3418DC9C
.L383: 0x34185466: F248 01FC MOVW R1, #0x80FC 0x3418546A: F2C5 6102 MOVT R1, #0x5602 0x3418546E: 6808 LDR R0, [R1] 0x34185470: F64F 72FF MOVW R2, #0xFFFF 0x34185474: F6CC 7200 MOVT R2, #0xCF00 0x34185478: 4010 ANDS R0, R2 0x3418547A: 9B04 LDR R3, [SP, #16] 0x3418547C: 6F9A LDR R2, [R3, #120] 0x3418547E: F8D3 C07C LDR.W R12, [R3, #124] 0x34185482: 2300 MOVS R3, #0 0x34185484: F6CF 73FF MOVT R3, #0xFFFF 0x34185488: EB03 430C ADD.W R3, R3, R12, LSL #16 0x3418548C: 431A ORRS R2, R3 0x3418548E: 4310 ORRS R0, R2 0x34185490: 6008 STR R0, [R1] 0x34185492: F003 F8BD BL LL_RCC_IC15_Enable.62 ; 0x34188610 0x34185496: E00B B 46L385 ; 0x341854B0
.L384: 0x34185498: 9804 LDR R0, [SP, #16] 0x3418549A: F8D0 0108 LDR.W R0, [R0, #0x0108] 0x3418549E: F241 012C MOVW R1, #0x102C 0x341854A2: F2C0 7101 MOVT R1, #0x0701 0x341854A6: 4288 CMP R0, R1 0x341854A8: D102 BNE 46L385 ; 0x341854B0 0x341854AA: F00A FED9 BL LL_RCC_CLKP_Enable ; 0x34190260 0x341854AE: E7FF B 46L385 ; 0x341854B0
.L385: 0x341854B0: 9804 LDR R0, [SP, #16] 0x341854B2: F8D0 0108 LDR.W R0, [R0, #0x0108] 0x341854B6: F003 F981 BL LL_RCC_SetLPTIMClockSource ; 0x341887BC
.L386: 0x341854BA: 9804 LDR R0, [SP, #16] 0x341854BC: 7880 LDRB R0, [R0, #2] 0x341854BE: 0680 LSLS R0, R0, #26 0x341854C0: 2800 CMP R0, #0 0x341854C2: F140 809E BPL.W 46L397 ; 0x34185602 0x341854C6: 9804 LDR R0, [SP, #16] 0x341854C8: F8D0 010C LDR.W R0, [R0, #0x010C] 0x341854CC: F241 412C MOVW R1, #0x142C 0x341854D0: F2C0 7100 MOVT R1, #0x0700 0x341854D4: 4288 CMP R0, R1 0x341854D6: D02C BEQ 46L387 ; 0x34185532 0x341854D8: 9804 LDR R0, [SP, #16] 0x341854DA: F8D0 010C LDR.W R0, [R0, #0x010C] 0x341854DE: F241 412C MOVW R1, #0x142C 0x341854E2: F2C0 7101 MOVT R1, #0x0701 0x341854E6: 4288 CMP R0, R1 0x341854E8: D023 BEQ 46L387 ; 0x34185532 0x341854EA: 9804 LDR R0, [SP, #16] 0x341854EC: F8D0 010C LDR.W R0, [R0, #0x010C] 0x341854F0: F241 412C MOVW R1, #0x142C 0x341854F4: F2C0 7102 MOVT R1, #0x0702 0x341854F8: 4288 CMP R0, R1 0x341854FA: D01A BEQ 46L387 ; 0x34185532 0x341854FC: 9804 LDR R0, [SP, #16] 0x341854FE: F8D0 010C LDR.W R0, [R0, #0x010C] 0x34185502: F241 412C MOVW R1, #0x142C 0x34185506: F2C0 7103 MOVT R1, #0x0703 0x3418550A: 4288 CMP R0, R1 0x3418550C: D011 BEQ 46L387 ; 0x34185532 0x3418550E: 9804 LDR R0, [SP, #16] 0x34185510: F8D0 010C LDR.W R0, [R0, #0x010C] 0x34185514: F241 412C MOVW R1, #0x142C 0x34185518: F2C0 7104 MOVT R1, #0x0704 0x3418551C: 4288 CMP R0, R1 0x3418551E: D008 BEQ 46L387 ; 0x34185532 0x34185520: 9804 LDR R0, [SP, #16] 0x34185522: F8D0 010C LDR.W R0, [R0, #0x010C] 0x34185526: F241 412C MOVW R1, #0x142C 0x3418552A: F2C0 7105 MOVT R1, #0x0705 0x3418552E: 4288 CMP R0, R1 0x34185530: D100 BNE 46L388 ; 0x34185534
.L387: 0x34185532: E007 B 46L389 ; 0x34185544
.L388: 0x34185534: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34185538: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x3418553C: F240 41AC MOVW R1, #0x04AC 0x34185540: F008 FBAC BL assert_failed ; 0x3418DC9C
.L389: 0x34185544: 9804 LDR R0, [SP, #16] 0x34185546: F8D0 010C LDR.W R0, [R0, #0x010C] 0x3418554A: F241 412C MOVW R1, #0x142C 0x3418554E: F2C0 7102 MOVT R1, #0x0702 0x34185552: 4288 CMP R0, R1 0x34185554: D144 BNE 46L395 ; 0x341855E0 0x34185556: 9804 LDR R0, [SP, #16] 0x34185558: 6F80 LDR R0, [R0, #120] 0x3418555A: B170 CBZ R0, .L390 ; 0x3418557A 0x3418555C: 9804 LDR R0, [SP, #16] 0x3418555E: 6F80 LDR R0, [R0, #120] 0x34185560: F1B0 5F80 CMP.W R0, #0x10000000 0x34185564: D009 BEQ 46L390 ; 0x3418557A 0x34185566: 9804 LDR R0, [SP, #16] 0x34185568: 6F80 LDR R0, [R0, #120] 0x3418556A: F1B0 5F00 CMP.W R0, #0x20000000 0x3418556E: D004 BEQ 46L390 ; 0x3418557A 0x34185570: 9804 LDR R0, [SP, #16] 0x34185572: 6F80 LDR R0, [R0, #120] 0x34185574: F1B0 5F40 CMP.W R0, #0x30000000 0x34185578: D100 BNE 46L391 ; 0x3418557C
.L390: 0x3418557A: E007 B 46L392 ; 0x3418558C
.L391: 0x3418557C: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34185580: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34185584: F240 41B1 MOVW R1, #0x04B1 0x34185588: F008 FB88 BL assert_failed ; 0x3418DC9C
.L392: 0x3418558C: 9804 LDR R0, [SP, #16] 0x3418558E: 6FC0 LDR R0, [R0, #124] 0x34185590: B128 CBZ R0, .L393 ; 0x3418559E 0x34185592: 9804 LDR R0, [SP, #16] 0x34185594: 6FC0 LDR R0, [R0, #124] 0x34185596: F5B0 7F80 CMP.W R0, #0x0100 0x3418559A: D800 BHI 46L393 ; 0x3418559E 0x3418559C: E007 B 46L394 ; 0x341855AE
.L393: 0x3418559E: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341855A2: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341855A6: F240 41B2 MOVW R1, #0x04B2 0x341855AA: F008 FB77 BL assert_failed ; 0x3418DC9C
.L394: 0x341855AE: F248 01FC MOVW R1, #0x80FC 0x341855B2: F2C5 6102 MOVT R1, #0x5602 0x341855B6: 6808 LDR R0, [R1] 0x341855B8: F64F 72FF MOVW R2, #0xFFFF 0x341855BC: F6CC 7200 MOVT R2, #0xCF00 0x341855C0: 4010 ANDS R0, R2 0x341855C2: 9B04 LDR R3, [SP, #16] 0x341855C4: 6F9A LDR R2, [R3, #120] 0x341855C6: F8D3 C07C LDR.W R12, [R3, #124] 0x341855CA: 2300 MOVS R3, #0 0x341855CC: F6CF 73FF MOVT R3, #0xFFFF 0x341855D0: EB03 430C ADD.W R3, R3, R12, LSL #16 0x341855D4: 431A ORRS R2, R3 0x341855D6: 4310 ORRS R0, R2 0x341855D8: 6008 STR R0, [R1] 0x341855DA: F003 F819 BL LL_RCC_IC15_Enable.62 ; 0x34188610 0x341855DE: E00B B 46L396 ; 0x341855F8
.L395: 0x341855E0: 9804 LDR R0, [SP, #16] 0x341855E2: F8D0 010C LDR.W R0, [R0, #0x010C] 0x341855E6: F241 412C MOVW R1, #0x142C 0x341855EA: F2C0 7101 MOVT R1, #0x0701 0x341855EE: 4288 CMP R0, R1 0x341855F0: D102 BNE 46L396 ; 0x341855F8 0x341855F2: F00A FE35 BL LL_RCC_CLKP_Enable ; 0x34190260 0x341855F6: E7FF B 46L396 ; 0x341855F8
.L396: 0x341855F8: 9804 LDR R0, [SP, #16] 0x341855FA: F8D0 010C LDR.W R0, [R0, #0x010C] 0x341855FE: F003 F8DD BL LL_RCC_SetLPTIMClockSource ; 0x341887BC
.L397: 0x34185602: 9804 LDR R0, [SP, #16] 0x34185604: 7880 LDRB R0, [R0, #2] 0x34185606: 0640 LSLS R0, R0, #25 0x34185608: 2800 CMP R0, #0 0x3418560A: F140 809E BPL.W 46L408 ; 0x3418574A 0x3418560E: 9804 LDR R0, [SP, #16] 0x34185610: F8D0 0110 LDR.W R0, [R0, #0x0110] 0x34185614: F641 012C MOVW R1, #0x182C 0x34185618: F2C0 7100 MOVT R1, #0x0700 0x3418561C: 4288 CMP R0, R1 0x3418561E: D02C BEQ 46L398 ; 0x3418567A 0x34185620: 9804 LDR R0, [SP, #16] 0x34185622: F8D0 0110 LDR.W R0, [R0, #0x0110] 0x34185626: F641 012C MOVW R1, #0x182C 0x3418562A: F2C0 7101 MOVT R1, #0x0701 0x3418562E: 4288 CMP R0, R1 0x34185630: D023 BEQ 46L398 ; 0x3418567A 0x34185632: 9804 LDR R0, [SP, #16] 0x34185634: F8D0 0110 LDR.W R0, [R0, #0x0110] 0x34185638: F641 012C MOVW R1, #0x182C 0x3418563C: F2C0 7102 MOVT R1, #0x0702 0x34185640: 4288 CMP R0, R1 0x34185642: D01A BEQ 46L398 ; 0x3418567A 0x34185644: 9804 LDR R0, [SP, #16] 0x34185646: F8D0 0110 LDR.W R0, [R0, #0x0110] 0x3418564A: F641 012C MOVW R1, #0x182C 0x3418564E: F2C0 7103 MOVT R1, #0x0703 0x34185652: 4288 CMP R0, R1 0x34185654: D011 BEQ 46L398 ; 0x3418567A 0x34185656: 9804 LDR R0, [SP, #16] 0x34185658: F8D0 0110 LDR.W R0, [R0, #0x0110] 0x3418565C: F641 012C MOVW R1, #0x182C 0x34185660: F2C0 7104 MOVT R1, #0x0704 0x34185664: 4288 CMP R0, R1 0x34185666: D008 BEQ 46L398 ; 0x3418567A 0x34185668: 9804 LDR R0, [SP, #16] 0x3418566A: F8D0 0110 LDR.W R0, [R0, #0x0110] 0x3418566E: F641 012C MOVW R1, #0x182C 0x34185672: F2C0 7105 MOVT R1, #0x0705 0x34185676: 4288 CMP R0, R1 0x34185678: D100 BNE 46L399 ; 0x3418567C
.L398: 0x3418567A: E007 B 46L400 ; 0x3418568C
.L399: 0x3418567C: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34185680: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34185684: F240 41CC MOVW R1, #0x04CC 0x34185688: F008 FB08 BL assert_failed ; 0x3418DC9C
.L400: 0x3418568C: 9804 LDR R0, [SP, #16] 0x3418568E: F8D0 0110 LDR.W R0, [R0, #0x0110] 0x34185692: F641 012C MOVW R1, #0x182C 0x34185696: F2C0 7102 MOVT R1, #0x0702 0x3418569A: 4288 CMP R0, R1 0x3418569C: D144 BNE 46L406 ; 0x34185728 0x3418569E: 9804 LDR R0, [SP, #16] 0x341856A0: 6F80 LDR R0, [R0, #120] 0x341856A2: B170 CBZ R0, .L401 ; 0x341856C2 0x341856A4: 9804 LDR R0, [SP, #16] 0x341856A6: 6F80 LDR R0, [R0, #120] 0x341856A8: F1B0 5F80 CMP.W R0, #0x10000000 0x341856AC: D009 BEQ 46L401 ; 0x341856C2 0x341856AE: 9804 LDR R0, [SP, #16] 0x341856B0: 6F80 LDR R0, [R0, #120] 0x341856B2: F1B0 5F00 CMP.W R0, #0x20000000 0x341856B6: D004 BEQ 46L401 ; 0x341856C2 0x341856B8: 9804 LDR R0, [SP, #16] 0x341856BA: 6F80 LDR R0, [R0, #120] 0x341856BC: F1B0 5F40 CMP.W R0, #0x30000000 0x341856C0: D100 BNE 46L402 ; 0x341856C4
.L401: 0x341856C2: E007 B 46L403 ; 0x341856D4
.L402: 0x341856C4: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341856C8: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341856CC: F240 41D1 MOVW R1, #0x04D1 0x341856D0: F008 FAE4 BL assert_failed ; 0x3418DC9C
.L403: 0x341856D4: 9804 LDR R0, [SP, #16] 0x341856D6: 6FC0 LDR R0, [R0, #124] 0x341856D8: B128 CBZ R0, .L404 ; 0x341856E6 0x341856DA: 9804 LDR R0, [SP, #16] 0x341856DC: 6FC0 LDR R0, [R0, #124] 0x341856DE: F5B0 7F80 CMP.W R0, #0x0100 0x341856E2: D800 BHI 46L404 ; 0x341856E6 0x341856E4: E007 B 46L405 ; 0x341856F6
.L404: 0x341856E6: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341856EA: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341856EE: F240 41D2 MOVW R1, #0x04D2 0x341856F2: F008 FAD3 BL assert_failed ; 0x3418DC9C
.L405: 0x341856F6: F248 01FC MOVW R1, #0x80FC 0x341856FA: F2C5 6102 MOVT R1, #0x5602 0x341856FE: 6808 LDR R0, [R1] 0x34185700: F64F 72FF MOVW R2, #0xFFFF 0x34185704: F6CC 7200 MOVT R2, #0xCF00 0x34185708: 4010 ANDS R0, R2 0x3418570A: 9B04 LDR R3, [SP, #16] 0x3418570C: 6F9A LDR R2, [R3, #120] 0x3418570E: F8D3 C07C LDR.W R12, [R3, #124] 0x34185712: 2300 MOVS R3, #0 0x34185714: F6CF 73FF MOVT R3, #0xFFFF 0x34185718: EB03 430C ADD.W R3, R3, R12, LSL #16 0x3418571C: 431A ORRS R2, R3 0x3418571E: 4310 ORRS R0, R2 0x34185720: 6008 STR R0, [R1] 0x34185722: F002 FF75 BL LL_RCC_IC15_Enable.62 ; 0x34188610 0x34185726: E00B B 46L407 ; 0x34185740
.L406: 0x34185728: 9804 LDR R0, [SP, #16] 0x3418572A: F8D0 0110 LDR.W R0, [R0, #0x0110] 0x3418572E: F641 012C MOVW R1, #0x182C 0x34185732: F2C0 7101 MOVT R1, #0x0701 0x34185736: 4288 CMP R0, R1 0x34185738: D102 BNE 46L407 ; 0x34185740 0x3418573A: F00A FD91 BL LL_RCC_CLKP_Enable ; 0x34190260 0x3418573E: E7FF B 46L407 ; 0x34185740
.L407: 0x34185740: 9804 LDR R0, [SP, #16] 0x34185742: F8D0 0110 LDR.W R0, [R0, #0x0110] 0x34185746: F003 F839 BL LL_RCC_SetLPTIMClockSource ; 0x341887BC
.L408: 0x3418574A: 9804 LDR R0, [SP, #16] 0x3418574C: 7880 LDRB R0, [R0, #2] 0x3418574E: 0600 LSLS R0, R0, #24 0x34185750: 2800 CMP R0, #0 0x34185752: F140 80D5 BPL.W 46L425 ; 0x34185900 0x34185756: 9804 LDR R0, [SP, #16] 0x34185758: F8D0 0114 LDR.W R0, [R0, #0x0114] 0x3418575C: B318 CBZ R0, .L409 ; 0x341857A6 0x3418575E: 9804 LDR R0, [SP, #16] 0x34185760: F8D0 0114 LDR.W R0, [R0, #0x0114] 0x34185764: F5B0 7F80 CMP.W R0, #0x0100 0x34185768: D01D BEQ 46L409 ; 0x341857A6 0x3418576A: 9804 LDR R0, [SP, #16] 0x3418576C: F8D0 0114 LDR.W R0, [R0, #0x0114] 0x34185770: F5B0 7F00 CMP.W R0, #0x0200 0x34185774: D017 BEQ 46L409 ; 0x341857A6 0x34185776: 9804 LDR R0, [SP, #16] 0x34185778: F8D0 0114 LDR.W R0, [R0, #0x0114] 0x3418577C: F5B0 7F40 CMP.W R0, #0x0300 0x34185780: D011 BEQ 46L409 ; 0x341857A6 0x34185782: 9804 LDR R0, [SP, #16] 0x34185784: F8D0 0114 LDR.W R0, [R0, #0x0114] 0x34185788: F5B0 6F80 CMP.W R0, #0x0400 0x3418578C: D00B BEQ 46L409 ; 0x341857A6 0x3418578E: 9804 LDR R0, [SP, #16] 0x34185790: F8D0 0114 LDR.W R0, [R0, #0x0114] 0x34185794: F5B0 6FA0 CMP.W R0, #0x0500 0x34185798: D005 BEQ 46L409 ; 0x341857A6 0x3418579A: 9804 LDR R0, [SP, #16] 0x3418579C: F8D0 0114 LDR.W R0, [R0, #0x0114] 0x341857A0: F5B0 6FC0 CMP.W R0, #0x0600 0x341857A4: D100 BNE 46L410 ; 0x341857A8
.L409: 0x341857A6: E007 B 46L411 ; 0x341857B8
.L410: 0x341857A8: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341857AC: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341857B0: F240 41EC MOVW R1, #0x04EC 0x341857B4: F008 FA72 BL assert_failed ; 0x3418DC9C
.L411: 0x341857B8: 9804 LDR R0, [SP, #16] 0x341857BA: F8D0 0114 LDR.W R0, [R0, #0x0114] 0x341857BE: F5B0 7F00 CMP.W R0, #0x0200 0x341857C2: D144 BNE 46L417 ; 0x3418584E 0x341857C4: 9804 LDR R0, [SP, #16] 0x341857C6: 6C80 LDR R0, [R0, #72] 0x341857C8: B170 CBZ R0, .L412 ; 0x341857E8 0x341857CA: 9804 LDR R0, [SP, #16] 0x341857CC: 6C80 LDR R0, [R0, #72] 0x341857CE: F1B0 5F80 CMP.W R0, #0x10000000 0x341857D2: D009 BEQ 46L412 ; 0x341857E8 0x341857D4: 9804 LDR R0, [SP, #16] 0x341857D6: 6C80 LDR R0, [R0, #72] 0x341857D8: F1B0 5F00 CMP.W R0, #0x20000000 0x341857DC: D004 BEQ 46L412 ; 0x341857E8 0x341857DE: 9804 LDR R0, [SP, #16] 0x341857E0: 6C80 LDR R0, [R0, #72] 0x341857E2: F1B0 5F40 CMP.W R0, #0x30000000 0x341857E6: D100 BNE 46L413 ; 0x341857EA
.L412: 0x341857E8: E007 B 46L414 ; 0x341857FA
.L413: 0x341857EA: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341857EE: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341857F2: F240 41F1 MOVW R1, #0x04F1 0x341857F6: F008 FA51 BL assert_failed ; 0x3418DC9C
.L414: 0x341857FA: 9804 LDR R0, [SP, #16] 0x341857FC: 6CC0 LDR R0, [R0, #76] 0x341857FE: B128 CBZ R0, .L415 ; 0x3418580C 0x34185800: 9804 LDR R0, [SP, #16] 0x34185802: 6CC0 LDR R0, [R0, #76] 0x34185804: F5B0 7F80 CMP.W R0, #0x0100 0x34185808: D800 BHI 46L415 ; 0x3418580C 0x3418580A: E007 B 46L416 ; 0x3418581C
.L415: 0x3418580C: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34185810: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34185814: F240 41F2 MOVW R1, #0x04F2 0x34185818: F008 FA40 BL assert_failed ; 0x3418DC9C
.L416: 0x3418581C: F248 01E4 MOVW R1, #0x80E4 0x34185820: F2C5 6102 MOVT R1, #0x5602 0x34185824: 6808 LDR R0, [R1] 0x34185826: F64F 72FF MOVW R2, #0xFFFF 0x3418582A: F6CC 7200 MOVT R2, #0xCF00 0x3418582E: 4010 ANDS R0, R2 0x34185830: 9B04 LDR R3, [SP, #16] 0x34185832: 6C9A LDR R2, [R3, #72] 0x34185834: F8D3 C04C LDR.W R12, [R3, #76] 0x34185838: 2300 MOVS R3, #0 0x3418583A: F6CF 73FF MOVT R3, #0xFFFF 0x3418583E: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34185842: 431A ORRS R2, R3 0x34185844: 4310 ORRS R0, R2 0x34185846: 6008 STR R0, [R1] 0x34185848: F002 FFC0 BL LL_RCC_IC9_Enable ; 0x341887CC 0x3418584C: E053 B 46L424 ; 0x341858F6
.L417: 0x3418584E: 9804 LDR R0, [SP, #16] 0x34185850: F8D0 0114 LDR.W R0, [R0, #0x0114] 0x34185854: F5B0 7F40 CMP.W R0, #0x0300 0x34185858: D144 BNE 46L423 ; 0x341858E4 0x3418585A: 9804 LDR R0, [SP, #16] 0x3418585C: 6F00 LDR R0, [R0, #112] 0x3418585E: B170 CBZ R0, .L418 ; 0x3418587E 0x34185860: 9804 LDR R0, [SP, #16] 0x34185862: 6F00 LDR R0, [R0, #112] 0x34185864: F1B0 5F80 CMP.W R0, #0x10000000 0x34185868: D009 BEQ 46L418 ; 0x3418587E 0x3418586A: 9804 LDR R0, [SP, #16] 0x3418586C: 6F00 LDR R0, [R0, #112] 0x3418586E: F1B0 5F00 CMP.W R0, #0x20000000 0x34185872: D004 BEQ 46L418 ; 0x3418587E 0x34185874: 9804 LDR R0, [SP, #16] 0x34185876: 6F00 LDR R0, [R0, #112] 0x34185878: F1B0 5F40 CMP.W R0, #0x30000000 0x3418587C: D100 BNE 46L419 ; 0x34185880
.L418: 0x3418587E: E007 B 46L420 ; 0x34185890
.L419: 0x34185880: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34185884: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34185888: F240 41FE MOVW R1, #0x04FE 0x3418588C: F008 FA06 BL assert_failed ; 0x3418DC9C
.L420: 0x34185890: 9804 LDR R0, [SP, #16] 0x34185892: 6F40 LDR R0, [R0, #116] 0x34185894: B128 CBZ R0, .L421 ; 0x341858A2 0x34185896: 9804 LDR R0, [SP, #16] 0x34185898: 6F40 LDR R0, [R0, #116] 0x3418589A: F5B0 7F80 CMP.W R0, #0x0100 0x3418589E: D800 BHI 46L421 ; 0x341858A2 0x341858A0: E007 B 46L422 ; 0x341858B2
.L421: 0x341858A2: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341858A6: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341858AA: F240 41FF MOVW R1, #0x04FF 0x341858AE: F008 F9F5 BL assert_failed ; 0x3418DC9C
.L422: 0x341858B2: F248 01F8 MOVW R1, #0x80F8 0x341858B6: F2C5 6102 MOVT R1, #0x5602 0x341858BA: 6808 LDR R0, [R1] 0x341858BC: F64F 72FF MOVW R2, #0xFFFF 0x341858C0: F6CC 7200 MOVT R2, #0xCF00 0x341858C4: 4010 ANDS R0, R2 0x341858C6: 9B04 LDR R3, [SP, #16] 0x341858C8: 6F1A LDR R2, [R3, #112] 0x341858CA: F8D3 C074 LDR.W R12, [R3, #116] 0x341858CE: 2300 MOVS R3, #0 0x341858D0: F6CF 73FF MOVT R3, #0xFFFF 0x341858D4: EB03 430C ADD.W R3, R3, R12, LSL #16 0x341858D8: 431A ORRS R2, R3 0x341858DA: 4310 ORRS R0, R2 0x341858DC: 6008 STR R0, [R1] 0x341858DE: F002 FF7D BL LL_RCC_IC14_Enable ; 0x341887DC 0x341858E2: E008 B 46L424 ; 0x341858F6
.L423: 0x341858E4: 9804 LDR R0, [SP, #16] 0x341858E6: F8D0 0114 LDR.W R0, [R0, #0x0114] 0x341858EA: F5B0 7F80 CMP.W R0, #0x0100 0x341858EE: D102 BNE 46L424 ; 0x341858F6 0x341858F0: F00A FCB6 BL LL_RCC_CLKP_Enable ; 0x34190260 0x341858F4: E7FF B 46L424 ; 0x341858F6
.L424: 0x341858F6: 9804 LDR R0, [SP, #16] 0x341858F8: F8D0 0114 LDR.W R0, [R0, #0x0114] 0x341858FC: F002 FF76 BL LL_RCC_SetLPUARTClockSource ; 0x341887EC
.L425: 0x34185900: 9804 LDR R0, [SP, #16] 0x34185902: 78C0 LDRB R0, [R0, #3] 0x34185904: 07C0 LSLS R0, R0, #31 0x34185906: 2800 CMP R0, #0 0x34185908: D07E BEQ 46L436 ; 0x34185A08 0x3418590A: 9804 LDR R0, [SP, #16] 0x3418590C: F8D0 0118 LDR.W R0, [R0, #0x0118] 0x34185910: B188 CBZ R0, .L426 ; 0x34185936 0x34185912: 9804 LDR R0, [SP, #16] 0x34185914: F8D0 0118 LDR.W R0, [R0, #0x0118] 0x34185918: F1B0 7F80 CMP.W R0, #0x01000000 0x3418591C: D00B BEQ 46L426 ; 0x34185936 0x3418591E: 9804 LDR R0, [SP, #16] 0x34185920: F8D0 0118 LDR.W R0, [R0, #0x0118] 0x34185924: F1B0 7F00 CMP.W R0, #0x02000000 0x34185928: D005 BEQ 46L426 ; 0x34185936 0x3418592A: 9804 LDR R0, [SP, #16] 0x3418592C: F8D0 0118 LDR.W R0, [R0, #0x0118] 0x34185930: F1B0 7F40 CMP.W R0, #0x03000000 0x34185934: D100 BNE 46L427 ; 0x34185938
.L426: 0x34185936: E007 B 46L428 ; 0x34185948
.L427: 0x34185938: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x3418593C: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34185940: F240 5119 MOVW R1, #0x0519 0x34185944: F008 F9AA BL assert_failed ; 0x3418DC9C
.L428: 0x34185948: 9804 LDR R0, [SP, #16] 0x3418594A: F8D0 0118 LDR.W R0, [R0, #0x0118] 0x3418594E: F1B0 7F00 CMP.W R0, #0x02000000 0x34185952: D14B BNE 46L434 ; 0x341859EC 0x34185954: 9804 LDR R0, [SP, #16] 0x34185956: F8D0 0080 LDR.W R0, [R0, #128] 0x3418595A: B188 CBZ R0, .L429 ; 0x34185980 0x3418595C: 9804 LDR R0, [SP, #16] 0x3418595E: F8D0 0080 LDR.W R0, [R0, #128] 0x34185962: F1B0 5F80 CMP.W R0, #0x10000000 0x34185966: D00B BEQ 46L429 ; 0x34185980 0x34185968: 9804 LDR R0, [SP, #16] 0x3418596A: F8D0 0080 LDR.W R0, [R0, #128] 0x3418596E: F1B0 5F00 CMP.W R0, #0x20000000 0x34185972: D005 BEQ 46L429 ; 0x34185980 0x34185974: 9804 LDR R0, [SP, #16] 0x34185976: F8D0 0080 LDR.W R0, [R0, #128] 0x3418597A: F1B0 5F40 CMP.W R0, #0x30000000 0x3418597E: D100 BNE 46L430 ; 0x34185982
.L429: 0x34185980: E007 B 46L431 ; 0x34185992
.L430: 0x34185982: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34185986: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x3418598A: F240 511E MOVW R1, #0x051E 0x3418598E: F008 F985 BL assert_failed ; 0x3418DC9C
.L431: 0x34185992: 9804 LDR R0, [SP, #16] 0x34185994: F8D0 0084 LDR.W R0, [R0, #132] 0x34185998: B130 CBZ R0, .L432 ; 0x341859A8 0x3418599A: 9804 LDR R0, [SP, #16] 0x3418599C: F8D0 0084 LDR.W R0, [R0, #132] 0x341859A0: F5B0 7F80 CMP.W R0, #0x0100 0x341859A4: D800 BHI 46L432 ; 0x341859A8 0x341859A6: E007 B 46L433 ; 0x341859B8
.L432: 0x341859A8: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341859AC: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341859B0: F240 511F MOVW R1, #0x051F 0x341859B4: F008 F972 BL assert_failed ; 0x3418DC9C
.L433: 0x341859B8: F248 1100 MOVW R1, #0x8100 0x341859BC: F2C5 6102 MOVT R1, #0x5602 0x341859C0: 6808 LDR R0, [R1] 0x341859C2: F64F 72FF MOVW R2, #0xFFFF 0x341859C6: F6CC 7200 MOVT R2, #0xCF00 0x341859CA: 4010 ANDS R0, R2 0x341859CC: 9B04 LDR R3, [SP, #16] 0x341859CE: F8D3 2080 LDR.W R2, [R3, #128] 0x341859D2: F8D3 C084 LDR.W R12, [R3, #132] 0x341859D6: 2300 MOVS R3, #0 0x341859D8: F6CF 73FF MOVT R3, #0xFFFF 0x341859DC: EB03 430C ADD.W R3, R3, R12, LSL #16 0x341859E0: 431A ORRS R2, R3 0x341859E2: 4310 ORRS R0, R2 0x341859E4: 6008 STR R0, [R1] 0x341859E6: F002 FF0F BL LL_RCC_IC16_Enable ; 0x34188808 0x341859EA: E008 B 46L435 ; 0x341859FE
.L434: 0x341859EC: 9804 LDR R0, [SP, #16] 0x341859EE: F8D0 0118 LDR.W R0, [R0, #0x0118] 0x341859F2: F1B0 7F80 CMP.W R0, #0x01000000 0x341859F6: D102 BNE 46L435 ; 0x341859FE 0x341859F8: F00A FC32 BL LL_RCC_CLKP_Enable ; 0x34190260 0x341859FC: E7FF B 46L435 ; 0x341859FE
.L435: 0x341859FE: 9804 LDR R0, [SP, #16] 0x34185A00: F8D0 0118 LDR.W R0, [R0, #0x0118] 0x34185A04: F002 FF08 BL LL_RCC_SetLTDCClockSource ; 0x34188818
.L436: 0x34185A08: 9804 LDR R0, [SP, #16] 0x34185A0A: 78C0 LDRB R0, [R0, #3] 0x34185A0C: 0780 LSLS R0, R0, #30 0x34185A0E: 2800 CMP R0, #0 0x34185A10: F140 80DB BPL.W 46L453 ; 0x34185BCA 0x34185A14: 9804 LDR R0, [SP, #16] 0x34185A16: F8D0 011C LDR.W R0, [R0, #0x011C] 0x34185A1A: B348 CBZ R0, .L437 ; 0x34185A70 0x34185A1C: 9804 LDR R0, [SP, #16] 0x34185A1E: F8D0 011C LDR.W R0, [R0, #0x011C] 0x34185A22: F5B0 3F80 CMP.W R0, #0x010000 0x34185A26: D023 BEQ 46L437 ; 0x34185A70 0x34185A28: 9804 LDR R0, [SP, #16] 0x34185A2A: F8D0 011C LDR.W R0, [R0, #0x011C] 0x34185A2E: F5B0 3F00 CMP.W R0, #0x020000 0x34185A32: D01D BEQ 46L437 ; 0x34185A70 0x34185A34: 9804 LDR R0, [SP, #16] 0x34185A36: F8D0 011C LDR.W R0, [R0, #0x011C] 0x34185A3A: F5B0 3F40 CMP.W R0, #0x030000 0x34185A3E: D017 BEQ 46L437 ; 0x34185A70 0x34185A40: 9804 LDR R0, [SP, #16] 0x34185A42: F8D0 011C LDR.W R0, [R0, #0x011C] 0x34185A46: F5B0 2F80 CMP.W R0, #0x040000 0x34185A4A: D011 BEQ 46L437 ; 0x34185A70 0x34185A4C: 9804 LDR R0, [SP, #16] 0x34185A4E: F8D0 011C LDR.W R0, [R0, #0x011C] 0x34185A52: F5B0 2FA0 CMP.W R0, #0x050000 0x34185A56: D00B BEQ 46L437 ; 0x34185A70 0x34185A58: 9804 LDR R0, [SP, #16] 0x34185A5A: F8D0 011C LDR.W R0, [R0, #0x011C] 0x34185A5E: F5B0 2FC0 CMP.W R0, #0x060000 0x34185A62: D005 BEQ 46L437 ; 0x34185A70 0x34185A64: 9804 LDR R0, [SP, #16] 0x34185A66: F8D0 011C LDR.W R0, [R0, #0x011C] 0x34185A6A: F5B0 2FE0 CMP.W R0, #0x070000 0x34185A6E: D100 BNE 46L438 ; 0x34185A72
.L437: 0x34185A70: E007 B 46L439 ; 0x34185A82
.L438: 0x34185A72: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34185A76: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34185A7A: F240 5139 MOVW R1, #0x0539 0x34185A7E: F008 F90D BL assert_failed ; 0x3418DC9C
.L439: 0x34185A82: 9804 LDR R0, [SP, #16] 0x34185A84: F8D0 011C LDR.W R0, [R0, #0x011C] 0x34185A88: F5B0 3F00 CMP.W R0, #0x020000 0x34185A8C: D144 BNE 46L445 ; 0x34185B18 0x34185A8E: 9804 LDR R0, [SP, #16] 0x34185A90: 6B80 LDR R0, [R0, #56] 0x34185A92: B170 CBZ R0, .L440 ; 0x34185AB2 0x34185A94: 9804 LDR R0, [SP, #16] 0x34185A96: 6B80 LDR R0, [R0, #56] 0x34185A98: F1B0 5F80 CMP.W R0, #0x10000000 0x34185A9C: D009 BEQ 46L440 ; 0x34185AB2 0x34185A9E: 9804 LDR R0, [SP, #16] 0x34185AA0: 6B80 LDR R0, [R0, #56] 0x34185AA2: F1B0 5F00 CMP.W R0, #0x20000000 0x34185AA6: D004 BEQ 46L440 ; 0x34185AB2 0x34185AA8: 9804 LDR R0, [SP, #16] 0x34185AAA: 6B80 LDR R0, [R0, #56] 0x34185AAC: F1B0 5F40 CMP.W R0, #0x30000000 0x34185AB0: D100 BNE 46L441 ; 0x34185AB4
.L440: 0x34185AB2: E007 B 46L442 ; 0x34185AC4
.L441: 0x34185AB4: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34185AB8: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34185ABC: F240 513E MOVW R1, #0x053E 0x34185AC0: F008 F8EC BL assert_failed ; 0x3418DC9C
.L442: 0x34185AC4: 9804 LDR R0, [SP, #16] 0x34185AC6: 6BC0 LDR R0, [R0, #60] 0x34185AC8: B128 CBZ R0, .L443 ; 0x34185AD6 0x34185ACA: 9804 LDR R0, [SP, #16] 0x34185ACC: 6BC0 LDR R0, [R0, #60] 0x34185ACE: F5B0 7F80 CMP.W R0, #0x0100 0x34185AD2: D800 BHI 46L443 ; 0x34185AD6 0x34185AD4: E007 B 46L444 ; 0x34185AE6
.L443: 0x34185AD6: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34185ADA: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34185ADE: F240 513F MOVW R1, #0x053F 0x34185AE2: F008 F8DB BL assert_failed ; 0x3418DC9C
.L444: 0x34185AE6: F248 01DC MOVW R1, #0x80DC 0x34185AEA: F2C5 6102 MOVT R1, #0x5602 0x34185AEE: 6808 LDR R0, [R1] 0x34185AF0: F64F 72FF MOVW R2, #0xFFFF 0x34185AF4: F6CC 7200 MOVT R2, #0xCF00 0x34185AF8: 4010 ANDS R0, R2 0x34185AFA: 9B04 LDR R3, [SP, #16] 0x34185AFC: 6B9A LDR R2, [R3, #56] 0x34185AFE: F8D3 C03C LDR.W R12, [R3, #60] 0x34185B02: 2300 MOVS R3, #0 0x34185B04: F6CF 73FF MOVT R3, #0xFFFF 0x34185B08: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34185B0C: 431A ORRS R2, R3 0x34185B0E: 4310 ORRS R0, R2 0x34185B10: 6008 STR R0, [R1] 0x34185B12: F00A FBAD BL LL_RCC_IC7_Enable ; 0x34190270 0x34185B16: E053 B 46L452 ; 0x34185BC0
.L445: 0x34185B18: 9804 LDR R0, [SP, #16] 0x34185B1A: F8D0 011C LDR.W R0, [R0, #0x011C] 0x34185B1E: F5B0 3F40 CMP.W R0, #0x030000 0x34185B22: D144 BNE 46L451 ; 0x34185BAE 0x34185B24: 9804 LDR R0, [SP, #16] 0x34185B26: 6C00 LDR R0, [R0, #64] 0x34185B28: B170 CBZ R0, .L446 ; 0x34185B48 0x34185B2A: 9804 LDR R0, [SP, #16] 0x34185B2C: 6C00 LDR R0, [R0, #64] 0x34185B2E: F1B0 5F80 CMP.W R0, #0x10000000 0x34185B32: D009 BEQ 46L446 ; 0x34185B48 0x34185B34: 9804 LDR R0, [SP, #16] 0x34185B36: 6C00 LDR R0, [R0, #64] 0x34185B38: F1B0 5F00 CMP.W R0, #0x20000000 0x34185B3C: D004 BEQ 46L446 ; 0x34185B48 0x34185B3E: 9804 LDR R0, [SP, #16] 0x34185B40: 6C00 LDR R0, [R0, #64] 0x34185B42: F1B0 5F40 CMP.W R0, #0x30000000 0x34185B46: D100 BNE 46L447 ; 0x34185B4A
.L446: 0x34185B48: E007 B 46L448 ; 0x34185B5A
.L447: 0x34185B4A: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34185B4E: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34185B52: F240 514B MOVW R1, #0x054B 0x34185B56: F008 F8A1 BL assert_failed ; 0x3418DC9C
.L448: 0x34185B5A: 9804 LDR R0, [SP, #16] 0x34185B5C: 6C40 LDR R0, [R0, #68] 0x34185B5E: B128 CBZ R0, .L449 ; 0x34185B6C 0x34185B60: 9804 LDR R0, [SP, #16] 0x34185B62: 6C40 LDR R0, [R0, #68] 0x34185B64: F5B0 7F80 CMP.W R0, #0x0100 0x34185B68: D800 BHI 46L449 ; 0x34185B6C 0x34185B6A: E007 B 46L450 ; 0x34185B7C
.L449: 0x34185B6C: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34185B70: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34185B74: F240 514C MOVW R1, #0x054C 0x34185B78: F008 F890 BL assert_failed ; 0x3418DC9C
.L450: 0x34185B7C: F248 01E0 MOVW R1, #0x80E0 0x34185B80: F2C5 6102 MOVT R1, #0x5602 0x34185B84: 6808 LDR R0, [R1] 0x34185B86: F64F 72FF MOVW R2, #0xFFFF 0x34185B8A: F6CC 7200 MOVT R2, #0xCF00 0x34185B8E: 4010 ANDS R0, R2 0x34185B90: 9B04 LDR R3, [SP, #16] 0x34185B92: 6C1A LDR R2, [R3, #64] 0x34185B94: F8D3 C044 LDR.W R12, [R3, #68] 0x34185B98: 2300 MOVS R3, #0 0x34185B9A: F6CF 73FF MOVT R3, #0xFFFF 0x34185B9E: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34185BA2: 431A ORRS R2, R3 0x34185BA4: 4310 ORRS R0, R2 0x34185BA6: 6008 STR R0, [R1] 0x34185BA8: F00A FB6A BL LL_RCC_IC8_Enable ; 0x34190280 0x34185BAC: E008 B 46L452 ; 0x34185BC0
.L451: 0x34185BAE: 9804 LDR R0, [SP, #16] 0x34185BB0: F8D0 011C LDR.W R0, [R0, #0x011C] 0x34185BB4: F5B0 3F80 CMP.W R0, #0x010000 0x34185BB8: D102 BNE 46L452 ; 0x34185BC0 0x34185BBA: F00A FB51 BL LL_RCC_CLKP_Enable ; 0x34190260 0x34185BBE: E7FF B 46L452 ; 0x34185BC0
.L452: 0x34185BC0: 9804 LDR R0, [SP, #16] 0x34185BC2: F8D0 011C LDR.W R0, [R0, #0x011C] 0x34185BC6: F002 FE35 BL LL_RCC_SetMDFClockSource ; 0x34188834
.L453: 0x34185BCA: 9804 LDR R0, [SP, #16] 0x34185BCC: 78C0 LDRB R0, [R0, #3] 0x34185BCE: 0740 LSLS R0, R0, #29 0x34185BD0: 2800 CMP R0, #0 0x34185BD2: D579 BPL 46L464 ; 0x34185CC8 0x34185BD4: 9804 LDR R0, [SP, #16] 0x34185BD6: F8D0 0120 LDR.W R0, [R0, #0x0120] 0x34185BDA: B170 CBZ R0, .L454 ; 0x34185BFA 0x34185BDC: 9804 LDR R0, [SP, #16] 0x34185BDE: F8D0 0120 LDR.W R0, [R0, #0x0120] 0x34185BE2: 2810 CMP R0, #16 0x34185BE4: D009 BEQ 46L454 ; 0x34185BFA 0x34185BE6: 9804 LDR R0, [SP, #16] 0x34185BE8: F8D0 0120 LDR.W R0, [R0, #0x0120] 0x34185BEC: 2820 CMP R0, #32 0x34185BEE: D004 BEQ 46L454 ; 0x34185BFA 0x34185BF0: 9804 LDR R0, [SP, #16] 0x34185BF2: F8D0 0120 LDR.W R0, [R0, #0x0120] 0x34185BF6: 2830 CMP R0, #48 0x34185BF8: D100 BNE 46L455 ; 0x34185BFC
.L454: 0x34185BFA: E007 B 46L456 ; 0x34185C0C
.L455: 0x34185BFC: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34185C00: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34185C04: F240 5166 MOVW R1, #0x0566 0x34185C08: F008 F848 BL assert_failed ; 0x3418DC9C
.L456: 0x34185C0C: 9804 LDR R0, [SP, #16] 0x34185C0E: F8D0 0120 LDR.W R0, [R0, #0x0120] 0x34185C12: 2820 CMP R0, #32 0x34185C14: D14B BNE 46L462 ; 0x34185CAE 0x34185C16: 9804 LDR R0, [SP, #16] 0x34185C18: F8D0 00A0 LDR.W R0, [R0, #160] 0x34185C1C: B188 CBZ R0, .L457 ; 0x34185C42 0x34185C1E: 9804 LDR R0, [SP, #16] 0x34185C20: F8D0 00A0 LDR.W R0, [R0, #160] 0x34185C24: F1B0 5F80 CMP.W R0, #0x10000000 0x34185C28: D00B BEQ 46L457 ; 0x34185C42 0x34185C2A: 9804 LDR R0, [SP, #16] 0x34185C2C: F8D0 00A0 LDR.W R0, [R0, #160] 0x34185C30: F1B0 5F00 CMP.W R0, #0x20000000 0x34185C34: D005 BEQ 46L457 ; 0x34185C42 0x34185C36: 9804 LDR R0, [SP, #16] 0x34185C38: F8D0 00A0 LDR.W R0, [R0, #160] 0x34185C3C: F1B0 5F40 CMP.W R0, #0x30000000 0x34185C40: D100 BNE 46L458 ; 0x34185C44
.L457: 0x34185C42: E007 B 46L459 ; 0x34185C54
.L458: 0x34185C44: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34185C48: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34185C4C: F240 516B MOVW R1, #0x056B 0x34185C50: F008 F824 BL assert_failed ; 0x3418DC9C
.L459: 0x34185C54: 9804 LDR R0, [SP, #16] 0x34185C56: F8D0 00A4 LDR.W R0, [R0, #164] 0x34185C5A: B130 CBZ R0, .L460 ; 0x34185C6A 0x34185C5C: 9804 LDR R0, [SP, #16] 0x34185C5E: F8D0 00A4 LDR.W R0, [R0, #164] 0x34185C62: F5B0 7F80 CMP.W R0, #0x0100 0x34185C66: D800 BHI 46L460 ; 0x34185C6A 0x34185C68: E007 B 46L461 ; 0x34185C7A
.L460: 0x34185C6A: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34185C6E: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34185C72: F240 516C MOVW R1, #0x056C 0x34185C76: F008 F811 BL assert_failed ; 0x3418DC9C
.L461: 0x34185C7A: F248 1110 MOVW R1, #0x8110 0x34185C7E: F2C5 6102 MOVT R1, #0x5602 0x34185C82: 6808 LDR R0, [R1] 0x34185C84: F64F 72FF MOVW R2, #0xFFFF 0x34185C88: F6CC 7200 MOVT R2, #0xCF00 0x34185C8C: 4010 ANDS R0, R2 0x34185C8E: 9B04 LDR R3, [SP, #16] 0x34185C90: F8D3 20A0 LDR.W R2, [R3, #160] 0x34185C94: F8D3 C0A4 LDR.W R12, [R3, #164] 0x34185C98: 2300 MOVS R3, #0 0x34185C9A: F6CF 73FF MOVT R3, #0xFFFF 0x34185C9E: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34185CA2: 431A ORRS R2, R3 0x34185CA4: 4310 ORRS R0, R2 0x34185CA6: 6008 STR R0, [R1] 0x34185CA8: F002 FCC2 BL LL_RCC_IC20_Enable.63 ; 0x34188630 0x34185CAC: E007 B 46L463 ; 0x34185CBE
.L462: 0x34185CAE: 9804 LDR R0, [SP, #16] 0x34185CB0: F8D0 0120 LDR.W R0, [R0, #0x0120] 0x34185CB4: 2810 CMP R0, #16 0x34185CB6: D102 BNE 46L463 ; 0x34185CBE 0x34185CB8: F00A FAD2 BL LL_RCC_CLKP_Enable ; 0x34190260 0x34185CBC: E7FF B 46L463 ; 0x34185CBE
.L463: 0x34185CBE: 9804 LDR R0, [SP, #16] 0x34185CC0: F8D0 0120 LDR.W R0, [R0, #0x0120] 0x34185CC4: F002 FDC4 BL LL_RCC_SetPSSIClockSource ; 0x34188850
.L464: 0x34185CC8: 9804 LDR R0, [SP, #16] 0x34185CCA: 78C0 LDRB R0, [R0, #3] 0x34185CCC: 06C0 LSLS R0, R0, #27 0x34185CCE: 2800 CMP R0, #0 0x34185CD0: F140 80FE BPL.W 46L481 ; 0x34185ED0 0x34185CD4: 9804 LDR R0, [SP, #16] 0x34185CD6: F8D0 0124 LDR.W R0, [R0, #0x0124] 0x34185CDA: F241 4118 MOVW R1, #0x1418 0x34185CDE: F2C0 7100 MOVT R1, #0x0700 0x34185CE2: 4288 CMP R0, R1 0x34185CE4: D03E BEQ 46L465 ; 0x34185D64 0x34185CE6: 9804 LDR R0, [SP, #16] 0x34185CE8: F8D0 0124 LDR.W R0, [R0, #0x0124] 0x34185CEC: F241 4118 MOVW R1, #0x1418 0x34185CF0: F2C0 7101 MOVT R1, #0x0701 0x34185CF4: 4288 CMP R0, R1 0x34185CF6: D035 BEQ 46L465 ; 0x34185D64 0x34185CF8: 9804 LDR R0, [SP, #16] 0x34185CFA: F8D0 0124 LDR.W R0, [R0, #0x0124] 0x34185CFE: F241 4118 MOVW R1, #0x1418 0x34185D02: F2C0 7102 MOVT R1, #0x0702 0x34185D06: 4288 CMP R0, R1 0x34185D08: D02C BEQ 46L465 ; 0x34185D64 0x34185D0A: 9804 LDR R0, [SP, #16] 0x34185D0C: F8D0 0124 LDR.W R0, [R0, #0x0124] 0x34185D10: F241 4118 MOVW R1, #0x1418 0x34185D14: F2C0 7103 MOVT R1, #0x0703 0x34185D18: 4288 CMP R0, R1 0x34185D1A: D023 BEQ 46L465 ; 0x34185D64 0x34185D1C: 9804 LDR R0, [SP, #16] 0x34185D1E: F8D0 0124 LDR.W R0, [R0, #0x0124] 0x34185D22: F241 4118 MOVW R1, #0x1418 0x34185D26: F2C0 7104 MOVT R1, #0x0704 0x34185D2A: 4288 CMP R0, R1 0x34185D2C: D01A BEQ 46L465 ; 0x34185D64 0x34185D2E: 9804 LDR R0, [SP, #16] 0x34185D30: F8D0 0124 LDR.W R0, [R0, #0x0124] 0x34185D34: F241 4118 MOVW R1, #0x1418 0x34185D38: F2C0 7105 MOVT R1, #0x0705 0x34185D3C: 4288 CMP R0, R1 0x34185D3E: D011 BEQ 46L465 ; 0x34185D64 0x34185D40: 9804 LDR R0, [SP, #16] 0x34185D42: F8D0 0124 LDR.W R0, [R0, #0x0124] 0x34185D46: F241 4118 MOVW R1, #0x1418 0x34185D4A: F2C0 7106 MOVT R1, #0x0706 0x34185D4E: 4288 CMP R0, R1 0x34185D50: D008 BEQ 46L465 ; 0x34185D64 0x34185D52: 9804 LDR R0, [SP, #16] 0x34185D54: F8D0 0124 LDR.W R0, [R0, #0x0124] 0x34185D58: F241 4118 MOVW R1, #0x1418 0x34185D5C: F2C0 7107 MOVT R1, #0x0707 0x34185D60: 4288 CMP R0, R1 0x34185D62: D100 BNE 46L466 ; 0x34185D66
.L465: 0x34185D64: E007 B 46L467 ; 0x34185D76
.L466: 0x34185D66: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34185D6A: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34185D6E: F240 5186 MOVW R1, #0x0586 0x34185D72: F007 FF93 BL assert_failed ; 0x3418DC9C
.L467: 0x34185D76: 9804 LDR R0, [SP, #16] 0x34185D78: F8D0 0124 LDR.W R0, [R0, #0x0124] 0x34185D7C: F241 4118 MOVW R1, #0x1418 0x34185D80: F2C0 7102 MOVT R1, #0x0702 0x34185D84: 4288 CMP R0, R1 0x34185D86: D144 BNE 46L473 ; 0x34185E12 0x34185D88: 9804 LDR R0, [SP, #16] 0x34185D8A: 6B80 LDR R0, [R0, #56] 0x34185D8C: B170 CBZ R0, .L468 ; 0x34185DAC 0x34185D8E: 9804 LDR R0, [SP, #16] 0x34185D90: 6B80 LDR R0, [R0, #56] 0x34185D92: F1B0 5F80 CMP.W R0, #0x10000000 0x34185D96: D009 BEQ 46L468 ; 0x34185DAC 0x34185D98: 9804 LDR R0, [SP, #16] 0x34185D9A: 6B80 LDR R0, [R0, #56] 0x34185D9C: F1B0 5F00 CMP.W R0, #0x20000000 0x34185DA0: D004 BEQ 46L468 ; 0x34185DAC 0x34185DA2: 9804 LDR R0, [SP, #16] 0x34185DA4: 6B80 LDR R0, [R0, #56] 0x34185DA6: F1B0 5F40 CMP.W R0, #0x30000000 0x34185DAA: D100 BNE 46L469 ; 0x34185DAE
.L468: 0x34185DAC: E007 B 46L470 ; 0x34185DBE
.L469: 0x34185DAE: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34185DB2: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34185DB6: F240 518B MOVW R1, #0x058B 0x34185DBA: F007 FF6F BL assert_failed ; 0x3418DC9C
.L470: 0x34185DBE: 9804 LDR R0, [SP, #16] 0x34185DC0: 6BC0 LDR R0, [R0, #60] 0x34185DC2: B128 CBZ R0, .L471 ; 0x34185DD0 0x34185DC4: 9804 LDR R0, [SP, #16] 0x34185DC6: 6BC0 LDR R0, [R0, #60] 0x34185DC8: F5B0 7F80 CMP.W R0, #0x0100 0x34185DCC: D800 BHI 46L471 ; 0x34185DD0 0x34185DCE: E007 B 46L472 ; 0x34185DE0
.L471: 0x34185DD0: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34185DD4: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34185DD8: F240 518C MOVW R1, #0x058C 0x34185DDC: F007 FF5E BL assert_failed ; 0x3418DC9C
.L472: 0x34185DE0: F248 01DC MOVW R1, #0x80DC 0x34185DE4: F2C5 6102 MOVT R1, #0x5602 0x34185DE8: 6808 LDR R0, [R1] 0x34185DEA: F64F 72FF MOVW R2, #0xFFFF 0x34185DEE: F6CC 7200 MOVT R2, #0xCF00 0x34185DF2: 4010 ANDS R0, R2 0x34185DF4: 9B04 LDR R3, [SP, #16] 0x34185DF6: 6B9A LDR R2, [R3, #56] 0x34185DF8: F8D3 C03C LDR.W R12, [R3, #60] 0x34185DFC: 2300 MOVS R3, #0 0x34185DFE: F6CF 73FF MOVT R3, #0xFFFF 0x34185E02: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34185E06: 431A ORRS R2, R3 0x34185E08: 4310 ORRS R0, R2 0x34185E0A: 6008 STR R0, [R1] 0x34185E0C: F00A FA30 BL LL_RCC_IC7_Enable ; 0x34190270 0x34185E10: E059 B 46L480 ; 0x34185EC6
.L473: 0x34185E12: 9804 LDR R0, [SP, #16] 0x34185E14: F8D0 0124 LDR.W R0, [R0, #0x0124] 0x34185E18: F241 4118 MOVW R1, #0x1418 0x34185E1C: F2C0 7103 MOVT R1, #0x0703 0x34185E20: 4288 CMP R0, R1 0x34185E22: D144 BNE 46L479 ; 0x34185EAE 0x34185E24: 9804 LDR R0, [SP, #16] 0x34185E26: 6C00 LDR R0, [R0, #64] 0x34185E28: B170 CBZ R0, .L474 ; 0x34185E48 0x34185E2A: 9804 LDR R0, [SP, #16] 0x34185E2C: 6C00 LDR R0, [R0, #64] 0x34185E2E: F1B0 5F80 CMP.W R0, #0x10000000 0x34185E32: D009 BEQ 46L474 ; 0x34185E48 0x34185E34: 9804 LDR R0, [SP, #16] 0x34185E36: 6C00 LDR R0, [R0, #64] 0x34185E38: F1B0 5F00 CMP.W R0, #0x20000000 0x34185E3C: D004 BEQ 46L474 ; 0x34185E48 0x34185E3E: 9804 LDR R0, [SP, #16] 0x34185E40: 6C00 LDR R0, [R0, #64] 0x34185E42: F1B0 5F40 CMP.W R0, #0x30000000 0x34185E46: D100 BNE 46L475 ; 0x34185E4A
.L474: 0x34185E48: E007 B 46L476 ; 0x34185E5A
.L475: 0x34185E4A: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34185E4E: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34185E52: F44F 61B3 MOV.W R1, #0x0598 0x34185E56: F007 FF21 BL assert_failed ; 0x3418DC9C
.L476: 0x34185E5A: 9804 LDR R0, [SP, #16] 0x34185E5C: 6C40 LDR R0, [R0, #68] 0x34185E5E: B128 CBZ R0, .L477 ; 0x34185E6C 0x34185E60: 9804 LDR R0, [SP, #16] 0x34185E62: 6C40 LDR R0, [R0, #68] 0x34185E64: F5B0 7F80 CMP.W R0, #0x0100 0x34185E68: D800 BHI 46L477 ; 0x34185E6C 0x34185E6A: E007 B 46L478 ; 0x34185E7C
.L477: 0x34185E6C: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34185E70: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34185E74: F240 5199 MOVW R1, #0x0599 0x34185E78: F007 FF10 BL assert_failed ; 0x3418DC9C
.L478: 0x34185E7C: F248 01E0 MOVW R1, #0x80E0 0x34185E80: F2C5 6102 MOVT R1, #0x5602 0x34185E84: 6808 LDR R0, [R1] 0x34185E86: F64F 72FF MOVW R2, #0xFFFF 0x34185E8A: F6CC 7200 MOVT R2, #0xCF00 0x34185E8E: 4010 ANDS R0, R2 0x34185E90: 9B04 LDR R3, [SP, #16] 0x34185E92: 6C1A LDR R2, [R3, #64] 0x34185E94: F8D3 C044 LDR.W R12, [R3, #68] 0x34185E98: 2300 MOVS R3, #0 0x34185E9A: F6CF 73FF MOVT R3, #0xFFFF 0x34185E9E: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34185EA2: 431A ORRS R2, R3 0x34185EA4: 4310 ORRS R0, R2 0x34185EA6: 6008 STR R0, [R1] 0x34185EA8: F00A F9EA BL LL_RCC_IC8_Enable ; 0x34190280 0x34185EAC: E00B B 46L480 ; 0x34185EC6
.L479: 0x34185EAE: 9804 LDR R0, [SP, #16] 0x34185EB0: F8D0 0124 LDR.W R0, [R0, #0x0124] 0x34185EB4: F241 4118 MOVW R1, #0x1418 0x34185EB8: F2C0 7101 MOVT R1, #0x0701 0x34185EBC: 4288 CMP R0, R1 0x34185EBE: D102 BNE 46L480 ; 0x34185EC6 0x34185EC0: F00A F9CE BL LL_RCC_CLKP_Enable ; 0x34190260 0x34185EC4: E7FF B 46L480 ; 0x34185EC6
.L480: 0x34185EC6: 9804 LDR R0, [SP, #16] 0x34185EC8: F8D0 0124 LDR.W R0, [R0, #0x0124] 0x34185ECC: F002 FCCE BL LL_RCC_SetSAIClockSource ; 0x3418886C
.L481: 0x34185ED0: 9804 LDR R0, [SP, #16] 0x34185ED2: 78C0 LDRB R0, [R0, #3] 0x34185ED4: 0680 LSLS R0, R0, #26 0x34185ED6: 2800 CMP R0, #0 0x34185ED8: F140 80FE BPL.W 46L498 ; 0x341860D8 0x34185EDC: 9804 LDR R0, [SP, #16] 0x34185EDE: F8D0 0128 LDR.W R0, [R0, #0x0128] 0x34185EE2: F641 0118 MOVW R1, #0x1818 0x34185EE6: F2C0 7100 MOVT R1, #0x0700 0x34185EEA: 4288 CMP R0, R1 0x34185EEC: D03E BEQ 46L482 ; 0x34185F6C 0x34185EEE: 9804 LDR R0, [SP, #16] 0x34185EF0: F8D0 0128 LDR.W R0, [R0, #0x0128] 0x34185EF4: F641 0118 MOVW R1, #0x1818 0x34185EF8: F2C0 7101 MOVT R1, #0x0701 0x34185EFC: 4288 CMP R0, R1 0x34185EFE: D035 BEQ 46L482 ; 0x34185F6C 0x34185F00: 9804 LDR R0, [SP, #16] 0x34185F02: F8D0 0128 LDR.W R0, [R0, #0x0128] 0x34185F06: F641 0118 MOVW R1, #0x1818 0x34185F0A: F2C0 7102 MOVT R1, #0x0702 0x34185F0E: 4288 CMP R0, R1 0x34185F10: D02C BEQ 46L482 ; 0x34185F6C 0x34185F12: 9804 LDR R0, [SP, #16] 0x34185F14: F8D0 0128 LDR.W R0, [R0, #0x0128] 0x34185F18: F641 0118 MOVW R1, #0x1818 0x34185F1C: F2C0 7103 MOVT R1, #0x0703 0x34185F20: 4288 CMP R0, R1 0x34185F22: D023 BEQ 46L482 ; 0x34185F6C 0x34185F24: 9804 LDR R0, [SP, #16] 0x34185F26: F8D0 0128 LDR.W R0, [R0, #0x0128] 0x34185F2A: F641 0118 MOVW R1, #0x1818 0x34185F2E: F2C0 7104 MOVT R1, #0x0704 0x34185F32: 4288 CMP R0, R1 0x34185F34: D01A BEQ 46L482 ; 0x34185F6C 0x34185F36: 9804 LDR R0, [SP, #16] 0x34185F38: F8D0 0128 LDR.W R0, [R0, #0x0128] 0x34185F3C: F641 0118 MOVW R1, #0x1818 0x34185F40: F2C0 7105 MOVT R1, #0x0705 0x34185F44: 4288 CMP R0, R1 0x34185F46: D011 BEQ 46L482 ; 0x34185F6C 0x34185F48: 9804 LDR R0, [SP, #16] 0x34185F4A: F8D0 0128 LDR.W R0, [R0, #0x0128] 0x34185F4E: F641 0118 MOVW R1, #0x1818 0x34185F52: F2C0 7106 MOVT R1, #0x0706 0x34185F56: 4288 CMP R0, R1 0x34185F58: D008 BEQ 46L482 ; 0x34185F6C 0x34185F5A: 9804 LDR R0, [SP, #16] 0x34185F5C: F8D0 0128 LDR.W R0, [R0, #0x0128] 0x34185F60: F641 0118 MOVW R1, #0x1818 0x34185F64: F2C0 7107 MOVT R1, #0x0707 0x34185F68: 4288 CMP R0, R1 0x34185F6A: D100 BNE 46L483 ; 0x34185F6E
.L482: 0x34185F6C: E007 B 46L484 ; 0x34185F7E
.L483: 0x34185F6E: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34185F72: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34185F76: F240 51B3 MOVW R1, #0x05B3 0x34185F7A: F007 FE8F BL assert_failed ; 0x3418DC9C
.L484: 0x34185F7E: 9804 LDR R0, [SP, #16] 0x34185F80: F8D0 0128 LDR.W R0, [R0, #0x0128] 0x34185F84: F641 0118 MOVW R1, #0x1818 0x34185F88: F2C0 7102 MOVT R1, #0x0702 0x34185F8C: 4288 CMP R0, R1 0x34185F8E: D144 BNE 46L490 ; 0x3418601A 0x34185F90: 9804 LDR R0, [SP, #16] 0x34185F92: 6B80 LDR R0, [R0, #56] 0x34185F94: B170 CBZ R0, .L485 ; 0x34185FB4 0x34185F96: 9804 LDR R0, [SP, #16] 0x34185F98: 6B80 LDR R0, [R0, #56] 0x34185F9A: F1B0 5F80 CMP.W R0, #0x10000000 0x34185F9E: D009 BEQ 46L485 ; 0x34185FB4 0x34185FA0: 9804 LDR R0, [SP, #16] 0x34185FA2: 6B80 LDR R0, [R0, #56] 0x34185FA4: F1B0 5F00 CMP.W R0, #0x20000000 0x34185FA8: D004 BEQ 46L485 ; 0x34185FB4 0x34185FAA: 9804 LDR R0, [SP, #16] 0x34185FAC: 6B80 LDR R0, [R0, #56] 0x34185FAE: F1B0 5F40 CMP.W R0, #0x30000000 0x34185FB2: D100 BNE 46L486 ; 0x34185FB6
.L485: 0x34185FB4: E007 B 46L487 ; 0x34185FC6
.L486: 0x34185FB6: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34185FBA: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34185FBE: F44F 61B7 MOV.W R1, #0x05B8 0x34185FC2: F007 FE6B BL assert_failed ; 0x3418DC9C
.L487: 0x34185FC6: 9804 LDR R0, [SP, #16] 0x34185FC8: 6BC0 LDR R0, [R0, #60] 0x34185FCA: B128 CBZ R0, .L488 ; 0x34185FD8 0x34185FCC: 9804 LDR R0, [SP, #16] 0x34185FCE: 6BC0 LDR R0, [R0, #60] 0x34185FD0: F5B0 7F80 CMP.W R0, #0x0100 0x34185FD4: D800 BHI 46L488 ; 0x34185FD8 0x34185FD6: E007 B 46L489 ; 0x34185FE8
.L488: 0x34185FD8: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34185FDC: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34185FE0: F240 51B9 MOVW R1, #0x05B9 0x34185FE4: F007 FE5A BL assert_failed ; 0x3418DC9C
.L489: 0x34185FE8: F248 01DC MOVW R1, #0x80DC 0x34185FEC: F2C5 6102 MOVT R1, #0x5602 0x34185FF0: 6808 LDR R0, [R1] 0x34185FF2: F64F 72FF MOVW R2, #0xFFFF 0x34185FF6: F6CC 7200 MOVT R2, #0xCF00 0x34185FFA: 4010 ANDS R0, R2 0x34185FFC: 9B04 LDR R3, [SP, #16] 0x34185FFE: 6B9A LDR R2, [R3, #56] 0x34186000: F8D3 C03C LDR.W R12, [R3, #60] 0x34186004: 2300 MOVS R3, #0 0x34186006: F6CF 73FF MOVT R3, #0xFFFF 0x3418600A: EB03 430C ADD.W R3, R3, R12, LSL #16 0x3418600E: 431A ORRS R2, R3 0x34186010: 4310 ORRS R0, R2 0x34186012: 6008 STR R0, [R1] 0x34186014: F00A F92C BL LL_RCC_IC7_Enable ; 0x34190270 0x34186018: E059 B 46L497 ; 0x341860CE
.L490: 0x3418601A: 9804 LDR R0, [SP, #16] 0x3418601C: F8D0 0128 LDR.W R0, [R0, #0x0128] 0x34186020: F641 0118 MOVW R1, #0x1818 0x34186024: F2C0 7103 MOVT R1, #0x0703 0x34186028: 4288 CMP R0, R1 0x3418602A: D144 BNE 46L496 ; 0x341860B6 0x3418602C: 9804 LDR R0, [SP, #16] 0x3418602E: 6C00 LDR R0, [R0, #64] 0x34186030: B170 CBZ R0, .L491 ; 0x34186050 0x34186032: 9804 LDR R0, [SP, #16] 0x34186034: 6C00 LDR R0, [R0, #64] 0x34186036: F1B0 5F80 CMP.W R0, #0x10000000 0x3418603A: D009 BEQ 46L491 ; 0x34186050 0x3418603C: 9804 LDR R0, [SP, #16] 0x3418603E: 6C00 LDR R0, [R0, #64] 0x34186040: F1B0 5F00 CMP.W R0, #0x20000000 0x34186044: D004 BEQ 46L491 ; 0x34186050 0x34186046: 9804 LDR R0, [SP, #16] 0x34186048: 6C00 LDR R0, [R0, #64] 0x3418604A: F1B0 5F40 CMP.W R0, #0x30000000 0x3418604E: D100 BNE 46L492 ; 0x34186052
.L491: 0x34186050: E007 B 46L493 ; 0x34186062
.L492: 0x34186052: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34186056: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x3418605A: F240 51C5 MOVW R1, #0x05C5 0x3418605E: F007 FE1D BL assert_failed ; 0x3418DC9C
.L493: 0x34186062: 9804 LDR R0, [SP, #16] 0x34186064: 6C40 LDR R0, [R0, #68] 0x34186066: B128 CBZ R0, .L494 ; 0x34186074 0x34186068: 9804 LDR R0, [SP, #16] 0x3418606A: 6C40 LDR R0, [R0, #68] 0x3418606C: F5B0 7F80 CMP.W R0, #0x0100 0x34186070: D800 BHI 46L494 ; 0x34186074 0x34186072: E007 B 46L495 ; 0x34186084
.L494: 0x34186074: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34186078: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x3418607C: F240 51C6 MOVW R1, #0x05C6 0x34186080: F007 FE0C BL assert_failed ; 0x3418DC9C
.L495: 0x34186084: F248 01E0 MOVW R1, #0x80E0 0x34186088: F2C5 6102 MOVT R1, #0x5602 0x3418608C: 6808 LDR R0, [R1] 0x3418608E: F64F 72FF MOVW R2, #0xFFFF 0x34186092: F6CC 7200 MOVT R2, #0xCF00 0x34186096: 4010 ANDS R0, R2 0x34186098: 9B04 LDR R3, [SP, #16] 0x3418609A: 6C1A LDR R2, [R3, #64] 0x3418609C: F8D3 C044 LDR.W R12, [R3, #68] 0x341860A0: 2300 MOVS R3, #0 0x341860A2: F6CF 73FF MOVT R3, #0xFFFF 0x341860A6: EB03 430C ADD.W R3, R3, R12, LSL #16 0x341860AA: 431A ORRS R2, R3 0x341860AC: 4310 ORRS R0, R2 0x341860AE: 6008 STR R0, [R1] 0x341860B0: F00A F8E6 BL LL_RCC_IC8_Enable ; 0x34190280 0x341860B4: E00B B 46L497 ; 0x341860CE
.L496: 0x341860B6: 9804 LDR R0, [SP, #16] 0x341860B8: F8D0 0128 LDR.W R0, [R0, #0x0128] 0x341860BC: F641 0118 MOVW R1, #0x1818 0x341860C0: F2C0 7101 MOVT R1, #0x0701 0x341860C4: 4288 CMP R0, R1 0x341860C6: D102 BNE 46L497 ; 0x341860CE 0x341860C8: F00A F8CA BL LL_RCC_CLKP_Enable ; 0x34190260 0x341860CC: E7FF B 46L497 ; 0x341860CE
.L497: 0x341860CE: 9804 LDR R0, [SP, #16] 0x341860D0: F8D0 0128 LDR.W R0, [R0, #0x0128] 0x341860D4: F002 FBCA BL LL_RCC_SetSAIClockSource ; 0x3418886C
.L498: 0x341860D8: 9804 LDR R0, [SP, #16] 0x341860DA: 7900 LDRB R0, [R0, #4] 0x341860DC: 07C0 LSLS R0, R0, #31 0x341860DE: 2800 CMP R0, #0 0x341860E0: F000 80CC BEQ.W 46L515 ; 0x3418627C 0x341860E4: 9804 LDR R0, [SP, #16] 0x341860E6: F8D0 014C LDR.W R0, [R0, #0x014C] 0x341860EA: B1E8 CBZ R0, .L499 ; 0x34186128 0x341860EC: 9804 LDR R0, [SP, #16] 0x341860EE: F8D0 014C LDR.W R0, [R0, #0x014C] 0x341860F2: 2801 CMP R0, #1 0x341860F4: D018 BEQ 46L499 ; 0x34186128 0x341860F6: 9804 LDR R0, [SP, #16] 0x341860F8: F8D0 014C LDR.W R0, [R0, #0x014C] 0x341860FC: 2802 CMP R0, #2 0x341860FE: D013 BEQ 46L499 ; 0x34186128 0x34186100: 9804 LDR R0, [SP, #16] 0x34186102: F8D0 014C LDR.W R0, [R0, #0x014C] 0x34186106: 2803 CMP R0, #3 0x34186108: D00E BEQ 46L499 ; 0x34186128 0x3418610A: 9804 LDR R0, [SP, #16] 0x3418610C: F8D0 014C LDR.W R0, [R0, #0x014C] 0x34186110: 2804 CMP R0, #4 0x34186112: D009 BEQ 46L499 ; 0x34186128 0x34186114: 9804 LDR R0, [SP, #16] 0x34186116: F8D0 014C LDR.W R0, [R0, #0x014C] 0x3418611A: 2805 CMP R0, #5 0x3418611C: D004 BEQ 46L499 ; 0x34186128 0x3418611E: 9804 LDR R0, [SP, #16] 0x34186120: F8D0 014C LDR.W R0, [R0, #0x014C] 0x34186124: 2806 CMP R0, #6 0x34186126: D100 BNE 46L500 ; 0x3418612A
.L499: 0x34186128: E007 B 46L501 ; 0x3418613A
.L500: 0x3418612A: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x3418612E: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34186132: F44F 61BC MOV.W R1, #0x05E0 0x34186136: F007 FDB1 BL assert_failed ; 0x3418DC9C
.L501: 0x3418613A: 9804 LDR R0, [SP, #16] 0x3418613C: F8D0 014C LDR.W R0, [R0, #0x014C] 0x34186140: 2802 CMP R0, #2 0x34186142: D144 BNE 46L507 ; 0x341861CE 0x34186144: 9804 LDR R0, [SP, #16] 0x34186146: 6B80 LDR R0, [R0, #56] 0x34186148: B170 CBZ R0, .L502 ; 0x34186168 0x3418614A: 9804 LDR R0, [SP, #16] 0x3418614C: 6B80 LDR R0, [R0, #56] 0x3418614E: F1B0 5F80 CMP.W R0, #0x10000000 0x34186152: D009 BEQ 46L502 ; 0x34186168 0x34186154: 9804 LDR R0, [SP, #16] 0x34186156: 6B80 LDR R0, [R0, #56] 0x34186158: F1B0 5F00 CMP.W R0, #0x20000000 0x3418615C: D004 BEQ 46L502 ; 0x34186168 0x3418615E: 9804 LDR R0, [SP, #16] 0x34186160: 6B80 LDR R0, [R0, #56] 0x34186162: F1B0 5F40 CMP.W R0, #0x30000000 0x34186166: D100 BNE 46L503 ; 0x3418616A
.L502: 0x34186168: E007 B 46L504 ; 0x3418617A
.L503: 0x3418616A: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x3418616E: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34186172: F240 51E5 MOVW R1, #0x05E5 0x34186176: F007 FD91 BL assert_failed ; 0x3418DC9C
.L504: 0x3418617A: 9804 LDR R0, [SP, #16] 0x3418617C: 6BC0 LDR R0, [R0, #60] 0x3418617E: B128 CBZ R0, .L505 ; 0x3418618C 0x34186180: 9804 LDR R0, [SP, #16] 0x34186182: 6BC0 LDR R0, [R0, #60] 0x34186184: F5B0 7F80 CMP.W R0, #0x0100 0x34186188: D800 BHI 46L505 ; 0x3418618C 0x3418618A: E007 B 46L506 ; 0x3418619C
.L505: 0x3418618C: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34186190: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34186194: F240 51E6 MOVW R1, #0x05E6 0x34186198: F007 FD80 BL assert_failed ; 0x3418DC9C
.L506: 0x3418619C: F248 01DC MOVW R1, #0x80DC 0x341861A0: F2C5 6102 MOVT R1, #0x5602 0x341861A4: 6808 LDR R0, [R1] 0x341861A6: F64F 72FF MOVW R2, #0xFFFF 0x341861AA: F6CC 7200 MOVT R2, #0xCF00 0x341861AE: 4010 ANDS R0, R2 0x341861B0: 9B04 LDR R3, [SP, #16] 0x341861B2: 6B9A LDR R2, [R3, #56] 0x341861B4: F8D3 C03C LDR.W R12, [R3, #60] 0x341861B8: 2300 MOVS R3, #0 0x341861BA: F6CF 73FF MOVT R3, #0xFFFF 0x341861BE: EB03 430C ADD.W R3, R3, R12, LSL #16 0x341861C2: 431A ORRS R2, R3 0x341861C4: 4310 ORRS R0, R2 0x341861C6: 6008 STR R0, [R1] 0x341861C8: F00A F852 BL LL_RCC_IC7_Enable ; 0x34190270 0x341861CC: E051 B 46L514 ; 0x34186272
.L507: 0x341861CE: 9804 LDR R0, [SP, #16] 0x341861D0: F8D0 014C LDR.W R0, [R0, #0x014C] 0x341861D4: 2803 CMP R0, #3 0x341861D6: D144 BNE 46L513 ; 0x34186262 0x341861D8: 9804 LDR R0, [SP, #16] 0x341861DA: 6C00 LDR R0, [R0, #64] 0x341861DC: B170 CBZ R0, .L508 ; 0x341861FC 0x341861DE: 9804 LDR R0, [SP, #16] 0x341861E0: 6C00 LDR R0, [R0, #64] 0x341861E2: F1B0 5F80 CMP.W R0, #0x10000000 0x341861E6: D009 BEQ 46L508 ; 0x341861FC 0x341861E8: 9804 LDR R0, [SP, #16] 0x341861EA: 6C00 LDR R0, [R0, #64] 0x341861EC: F1B0 5F00 CMP.W R0, #0x20000000 0x341861F0: D004 BEQ 46L508 ; 0x341861FC 0x341861F2: 9804 LDR R0, [SP, #16] 0x341861F4: 6C00 LDR R0, [R0, #64] 0x341861F6: F1B0 5F40 CMP.W R0, #0x30000000 0x341861FA: D100 BNE 46L509 ; 0x341861FE
.L508: 0x341861FC: E007 B 46L510 ; 0x3418620E
.L509: 0x341861FE: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34186202: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34186206: F240 51F2 MOVW R1, #0x05F2 0x3418620A: F007 FD47 BL assert_failed ; 0x3418DC9C
.L510: 0x3418620E: 9804 LDR R0, [SP, #16] 0x34186210: 6C40 LDR R0, [R0, #68] 0x34186212: B128 CBZ R0, .L511 ; 0x34186220 0x34186214: 9804 LDR R0, [SP, #16] 0x34186216: 6C40 LDR R0, [R0, #68] 0x34186218: F5B0 7F80 CMP.W R0, #0x0100 0x3418621C: D800 BHI 46L511 ; 0x34186220 0x3418621E: E007 B 46L512 ; 0x34186230
.L511: 0x34186220: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34186224: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34186228: F240 51F3 MOVW R1, #0x05F3 0x3418622C: F007 FD36 BL assert_failed ; 0x3418DC9C
.L512: 0x34186230: F248 01E0 MOVW R1, #0x80E0 0x34186234: F2C5 6102 MOVT R1, #0x5602 0x34186238: 6808 LDR R0, [R1] 0x3418623A: F64F 72FF MOVW R2, #0xFFFF 0x3418623E: F6CC 7200 MOVT R2, #0xCF00 0x34186242: 4010 ANDS R0, R2 0x34186244: 9B04 LDR R3, [SP, #16] 0x34186246: 6C1A LDR R2, [R3, #64] 0x34186248: F8D3 C044 LDR.W R12, [R3, #68] 0x3418624C: 2300 MOVS R3, #0 0x3418624E: F6CF 73FF MOVT R3, #0xFFFF 0x34186252: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34186256: 431A ORRS R2, R3 0x34186258: 4310 ORRS R0, R2 0x3418625A: 6008 STR R0, [R1] 0x3418625C: F00A F810 BL LL_RCC_IC8_Enable ; 0x34190280 0x34186260: E007 B 46L514 ; 0x34186272
.L513: 0x34186262: 9804 LDR R0, [SP, #16] 0x34186264: F8D0 014C LDR.W R0, [R0, #0x014C] 0x34186268: 2801 CMP R0, #1 0x3418626A: D102 BNE 46L514 ; 0x34186272 0x3418626C: F009 FFF8 BL LL_RCC_CLKP_Enable ; 0x34190260 0x34186270: E7FF B 46L514 ; 0x34186272
.L514: 0x34186272: 9804 LDR R0, [SP, #16] 0x34186274: F8D0 014C LDR.W R0, [R0, #0x014C] 0x34186278: F002 FB00 BL LL_RCC_SetSPDIFRXClockSource ; 0x3418887C
.L515: 0x3418627C: 9804 LDR R0, [SP, #16] 0x3418627E: 7900 LDRB R0, [R0, #4] 0x34186280: 0780 LSLS R0, R0, #30 0x34186282: 2800 CMP R0, #0 0x34186284: F140 80F5 BPL.W 46L532 ; 0x34186472 0x34186288: 9804 LDR R0, [SP, #16] 0x3418628A: F8D0 0134 LDR.W R0, [R0, #0x0134] 0x3418628E: F240 4120 MOVW R1, #0x0420 0x34186292: F2C0 7100 MOVT R1, #0x0700 0x34186296: 4288 CMP R0, R1 0x34186298: D035 BEQ 46L516 ; 0x34186306 0x3418629A: 9804 LDR R0, [SP, #16] 0x3418629C: F8D0 0134 LDR.W R0, [R0, #0x0134] 0x341862A0: F240 4120 MOVW R1, #0x0420 0x341862A4: F2C0 7101 MOVT R1, #0x0701 0x341862A8: 4288 CMP R0, R1 0x341862AA: D02C BEQ 46L516 ; 0x34186306 0x341862AC: 9804 LDR R0, [SP, #16] 0x341862AE: F8D0 0134 LDR.W R0, [R0, #0x0134] 0x341862B2: F240 4120 MOVW R1, #0x0420 0x341862B6: F2C0 7102 MOVT R1, #0x0702 0x341862BA: 4288 CMP R0, R1 0x341862BC: D023 BEQ 46L516 ; 0x34186306 0x341862BE: 9804 LDR R0, [SP, #16] 0x341862C0: F8D0 0134 LDR.W R0, [R0, #0x0134] 0x341862C4: F240 4120 MOVW R1, #0x0420 0x341862C8: F2C0 7103 MOVT R1, #0x0703 0x341862CC: 4288 CMP R0, R1 0x341862CE: D01A BEQ 46L516 ; 0x34186306 0x341862D0: 9804 LDR R0, [SP, #16] 0x341862D2: F8D0 0134 LDR.W R0, [R0, #0x0134] 0x341862D6: F240 4120 MOVW R1, #0x0420 0x341862DA: F2C0 7104 MOVT R1, #0x0704 0x341862DE: 4288 CMP R0, R1 0x341862E0: D011 BEQ 46L516 ; 0x34186306 0x341862E2: 9804 LDR R0, [SP, #16] 0x341862E4: F8D0 0134 LDR.W R0, [R0, #0x0134] 0x341862E8: F240 4120 MOVW R1, #0x0420 0x341862EC: F2C0 7105 MOVT R1, #0x0705 0x341862F0: 4288 CMP R0, R1 0x341862F2: D008 BEQ 46L516 ; 0x34186306 0x341862F4: 9804 LDR R0, [SP, #16] 0x341862F6: F8D0 0134 LDR.W R0, [R0, #0x0134] 0x341862FA: F240 4120 MOVW R1, #0x0420 0x341862FE: F2C0 7106 MOVT R1, #0x0706 0x34186302: 4288 CMP R0, R1 0x34186304: D100 BNE 46L517 ; 0x34186308
.L516: 0x34186306: E007 B 46L518 ; 0x34186318
.L517: 0x34186308: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x3418630C: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34186310: F240 610D MOVW R1, #0x060D 0x34186314: F007 FCC2 BL assert_failed ; 0x3418DC9C
.L518: 0x34186318: 9804 LDR R0, [SP, #16] 0x3418631A: F8D0 0134 LDR.W R0, [R0, #0x0134] 0x3418631E: F240 4120 MOVW R1, #0x0420 0x34186322: F2C0 7102 MOVT R1, #0x0702 0x34186326: 4288 CMP R0, R1 0x34186328: D144 BNE 46L524 ; 0x341863B4 0x3418632A: 9804 LDR R0, [SP, #16] 0x3418632C: 6C00 LDR R0, [R0, #64] 0x3418632E: B170 CBZ R0, .L519 ; 0x3418634E 0x34186330: 9804 LDR R0, [SP, #16] 0x34186332: 6C00 LDR R0, [R0, #64] 0x34186334: F1B0 5F80 CMP.W R0, #0x10000000 0x34186338: D009 BEQ 46L519 ; 0x3418634E 0x3418633A: 9804 LDR R0, [SP, #16] 0x3418633C: 6C00 LDR R0, [R0, #64] 0x3418633E: F1B0 5F00 CMP.W R0, #0x20000000 0x34186342: D004 BEQ 46L519 ; 0x3418634E 0x34186344: 9804 LDR R0, [SP, #16] 0x34186346: 6C00 LDR R0, [R0, #64] 0x34186348: F1B0 5F40 CMP.W R0, #0x30000000 0x3418634C: D100 BNE 46L520 ; 0x34186350
.L519: 0x3418634E: E007 B 46L521 ; 0x34186360
.L520: 0x34186350: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34186354: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34186358: F240 6112 MOVW R1, #0x0612 0x3418635C: F007 FC9E BL assert_failed ; 0x3418DC9C
.L521: 0x34186360: 9804 LDR R0, [SP, #16] 0x34186362: 6C40 LDR R0, [R0, #68] 0x34186364: B128 CBZ R0, .L522 ; 0x34186372 0x34186366: 9804 LDR R0, [SP, #16] 0x34186368: 6C40 LDR R0, [R0, #68] 0x3418636A: F5B0 7F80 CMP.W R0, #0x0100 0x3418636E: D800 BHI 46L522 ; 0x34186372 0x34186370: E007 B 46L523 ; 0x34186382
.L522: 0x34186372: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34186376: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x3418637A: F240 6113 MOVW R1, #0x0613 0x3418637E: F007 FC8D BL assert_failed ; 0x3418DC9C
.L523: 0x34186382: F248 01E0 MOVW R1, #0x80E0 0x34186386: F2C5 6102 MOVT R1, #0x5602 0x3418638A: 6808 LDR R0, [R1] 0x3418638C: F64F 72FF MOVW R2, #0xFFFF 0x34186390: F6CC 7200 MOVT R2, #0xCF00 0x34186394: 4010 ANDS R0, R2 0x34186396: 9B04 LDR R3, [SP, #16] 0x34186398: 6C1A LDR R2, [R3, #64] 0x3418639A: F8D3 C044 LDR.W R12, [R3, #68] 0x3418639E: 2300 MOVS R3, #0 0x341863A0: F6CF 73FF MOVT R3, #0xFFFF 0x341863A4: EB03 430C ADD.W R3, R3, R12, LSL #16 0x341863A8: 431A ORRS R2, R3 0x341863AA: 4310 ORRS R0, R2 0x341863AC: 6008 STR R0, [R1] 0x341863AE: F009 FF67 BL LL_RCC_IC8_Enable ; 0x34190280 0x341863B2: E059 B 46L531 ; 0x34186468
.L524: 0x341863B4: 9804 LDR R0, [SP, #16] 0x341863B6: F8D0 0134 LDR.W R0, [R0, #0x0134] 0x341863BA: F240 4120 MOVW R1, #0x0420 0x341863BE: F2C0 7103 MOVT R1, #0x0703 0x341863C2: 4288 CMP R0, R1 0x341863C4: D144 BNE 46L530 ; 0x34186450 0x341863C6: 9804 LDR R0, [SP, #16] 0x341863C8: 6C80 LDR R0, [R0, #72] 0x341863CA: B170 CBZ R0, .L525 ; 0x341863EA 0x341863CC: 9804 LDR R0, [SP, #16] 0x341863CE: 6C80 LDR R0, [R0, #72] 0x341863D0: F1B0 5F80 CMP.W R0, #0x10000000 0x341863D4: D009 BEQ 46L525 ; 0x341863EA 0x341863D6: 9804 LDR R0, [SP, #16] 0x341863D8: 6C80 LDR R0, [R0, #72] 0x341863DA: F1B0 5F00 CMP.W R0, #0x20000000 0x341863DE: D004 BEQ 46L525 ; 0x341863EA 0x341863E0: 9804 LDR R0, [SP, #16] 0x341863E2: 6C80 LDR R0, [R0, #72] 0x341863E4: F1B0 5F40 CMP.W R0, #0x30000000 0x341863E8: D100 BNE 46L526 ; 0x341863EC
.L525: 0x341863EA: E007 B 46L527 ; 0x341863FC
.L526: 0x341863EC: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341863F0: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341863F4: F240 611F MOVW R1, #0x061F 0x341863F8: F007 FC50 BL assert_failed ; 0x3418DC9C
.L527: 0x341863FC: 9804 LDR R0, [SP, #16] 0x341863FE: 6CC0 LDR R0, [R0, #76] 0x34186400: B128 CBZ R0, .L528 ; 0x3418640E 0x34186402: 9804 LDR R0, [SP, #16] 0x34186404: 6CC0 LDR R0, [R0, #76] 0x34186406: F5B0 7F80 CMP.W R0, #0x0100 0x3418640A: D800 BHI 46L528 ; 0x3418640E 0x3418640C: E007 B 46L529 ; 0x3418641E
.L528: 0x3418640E: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34186412: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34186416: F44F 61C4 MOV.W R1, #0x0620 0x3418641A: F007 FC3F BL assert_failed ; 0x3418DC9C
.L529: 0x3418641E: F248 01E4 MOVW R1, #0x80E4 0x34186422: F2C5 6102 MOVT R1, #0x5602 0x34186426: 6808 LDR R0, [R1] 0x34186428: F64F 72FF MOVW R2, #0xFFFF 0x3418642C: F6CC 7200 MOVT R2, #0xCF00 0x34186430: 4010 ANDS R0, R2 0x34186432: 9B04 LDR R3, [SP, #16] 0x34186434: 6C9A LDR R2, [R3, #72] 0x34186436: F8D3 C04C LDR.W R12, [R3, #76] 0x3418643A: 2300 MOVS R3, #0 0x3418643C: F6CF 73FF MOVT R3, #0xFFFF 0x34186440: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34186444: 431A ORRS R2, R3 0x34186446: 4310 ORRS R0, R2 0x34186448: 6008 STR R0, [R1] 0x3418644A: F002 F9BF BL LL_RCC_IC9_Enable ; 0x341887CC 0x3418644E: E00B B 46L531 ; 0x34186468
.L530: 0x34186450: 9804 LDR R0, [SP, #16] 0x34186452: F8D0 0134 LDR.W R0, [R0, #0x0134] 0x34186456: F240 4120 MOVW R1, #0x0420 0x3418645A: F2C0 7101 MOVT R1, #0x0701 0x3418645E: 4288 CMP R0, R1 0x34186460: D102 BNE 46L531 ; 0x34186468 0x34186462: F009 FEFD BL LL_RCC_CLKP_Enable ; 0x34190260 0x34186466: E7FF B 46L531 ; 0x34186468
.L531: 0x34186468: 9804 LDR R0, [SP, #16] 0x3418646A: F8D0 0134 LDR.W R0, [R0, #0x0134] 0x3418646E: F002 FA13 BL LL_RCC_SetSPIClockSource ; 0x34188898
.L532: 0x34186472: 9804 LDR R0, [SP, #16] 0x34186474: 7900 LDRB R0, [R0, #4] 0x34186476: 0740 LSLS R0, R0, #29 0x34186478: 2800 CMP R0, #0 0x3418647A: F140 80F5 BPL.W 46L549 ; 0x34186668 0x3418647E: 9804 LDR R0, [SP, #16] 0x34186480: F8D0 0138 LDR.W R0, [R0, #0x0138] 0x34186484: F640 0120 MOVW R1, #0x0820 0x34186488: F2C0 7100 MOVT R1, #0x0700 0x3418648C: 4288 CMP R0, R1 0x3418648E: D035 BEQ 46L533 ; 0x341864FC 0x34186490: 9804 LDR R0, [SP, #16] 0x34186492: F8D0 0138 LDR.W R0, [R0, #0x0138] 0x34186496: F640 0120 MOVW R1, #0x0820 0x3418649A: F2C0 7101 MOVT R1, #0x0701 0x3418649E: 4288 CMP R0, R1 0x341864A0: D02C BEQ 46L533 ; 0x341864FC 0x341864A2: 9804 LDR R0, [SP, #16] 0x341864A4: F8D0 0138 LDR.W R0, [R0, #0x0138] 0x341864A8: F640 0120 MOVW R1, #0x0820 0x341864AC: F2C0 7102 MOVT R1, #0x0702 0x341864B0: 4288 CMP R0, R1 0x341864B2: D023 BEQ 46L533 ; 0x341864FC 0x341864B4: 9804 LDR R0, [SP, #16] 0x341864B6: F8D0 0138 LDR.W R0, [R0, #0x0138] 0x341864BA: F640 0120 MOVW R1, #0x0820 0x341864BE: F2C0 7103 MOVT R1, #0x0703 0x341864C2: 4288 CMP R0, R1 0x341864C4: D01A BEQ 46L533 ; 0x341864FC 0x341864C6: 9804 LDR R0, [SP, #16] 0x341864C8: F8D0 0138 LDR.W R0, [R0, #0x0138] 0x341864CC: F640 0120 MOVW R1, #0x0820 0x341864D0: F2C0 7104 MOVT R1, #0x0704 0x341864D4: 4288 CMP R0, R1 0x341864D6: D011 BEQ 46L533 ; 0x341864FC 0x341864D8: 9804 LDR R0, [SP, #16] 0x341864DA: F8D0 0138 LDR.W R0, [R0, #0x0138] 0x341864DE: F640 0120 MOVW R1, #0x0820 0x341864E2: F2C0 7105 MOVT R1, #0x0705 0x341864E6: 4288 CMP R0, R1 0x341864E8: D008 BEQ 46L533 ; 0x341864FC 0x341864EA: 9804 LDR R0, [SP, #16] 0x341864EC: F8D0 0138 LDR.W R0, [R0, #0x0138] 0x341864F0: F640 0120 MOVW R1, #0x0820 0x341864F4: F2C0 7106 MOVT R1, #0x0706 0x341864F8: 4288 CMP R0, R1 0x341864FA: D100 BNE 46L534 ; 0x341864FE
.L533: 0x341864FC: E007 B 46L535 ; 0x3418650E
.L534: 0x341864FE: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34186502: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34186506: F240 613A MOVW R1, #0x063A 0x3418650A: F007 FBC7 BL assert_failed ; 0x3418DC9C
.L535: 0x3418650E: 9804 LDR R0, [SP, #16] 0x34186510: F8D0 0138 LDR.W R0, [R0, #0x0138] 0x34186514: F640 0120 MOVW R1, #0x0820 0x34186518: F2C0 7102 MOVT R1, #0x0702 0x3418651C: 4288 CMP R0, R1 0x3418651E: D144 BNE 46L541 ; 0x341865AA 0x34186520: 9804 LDR R0, [SP, #16] 0x34186522: 6C00 LDR R0, [R0, #64] 0x34186524: B170 CBZ R0, .L536 ; 0x34186544 0x34186526: 9804 LDR R0, [SP, #16] 0x34186528: 6C00 LDR R0, [R0, #64] 0x3418652A: F1B0 5F80 CMP.W R0, #0x10000000 0x3418652E: D009 BEQ 46L536 ; 0x34186544 0x34186530: 9804 LDR R0, [SP, #16] 0x34186532: 6C00 LDR R0, [R0, #64] 0x34186534: F1B0 5F00 CMP.W R0, #0x20000000 0x34186538: D004 BEQ 46L536 ; 0x34186544 0x3418653A: 9804 LDR R0, [SP, #16] 0x3418653C: 6C00 LDR R0, [R0, #64] 0x3418653E: F1B0 5F40 CMP.W R0, #0x30000000 0x34186542: D100 BNE 46L537 ; 0x34186546
.L536: 0x34186544: E007 B 46L538 ; 0x34186556
.L537: 0x34186546: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x3418654A: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x3418654E: F240 613F MOVW R1, #0x063F 0x34186552: F007 FBA3 BL assert_failed ; 0x3418DC9C
.L538: 0x34186556: 9804 LDR R0, [SP, #16] 0x34186558: 6C40 LDR R0, [R0, #68] 0x3418655A: B128 CBZ R0, .L539 ; 0x34186568 0x3418655C: 9804 LDR R0, [SP, #16] 0x3418655E: 6C40 LDR R0, [R0, #68] 0x34186560: F5B0 7F80 CMP.W R0, #0x0100 0x34186564: D800 BHI 46L539 ; 0x34186568 0x34186566: E007 B 46L540 ; 0x34186578
.L539: 0x34186568: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x3418656C: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34186570: F44F 61C8 MOV.W R1, #0x0640 0x34186574: F007 FB92 BL assert_failed ; 0x3418DC9C
.L540: 0x34186578: F248 01E0 MOVW R1, #0x80E0 0x3418657C: F2C5 6102 MOVT R1, #0x5602 0x34186580: 6808 LDR R0, [R1] 0x34186582: F64F 72FF MOVW R2, #0xFFFF 0x34186586: F6CC 7200 MOVT R2, #0xCF00 0x3418658A: 4010 ANDS R0, R2 0x3418658C: 9B04 LDR R3, [SP, #16] 0x3418658E: 6C1A LDR R2, [R3, #64] 0x34186590: F8D3 C044 LDR.W R12, [R3, #68] 0x34186594: 2300 MOVS R3, #0 0x34186596: F6CF 73FF MOVT R3, #0xFFFF 0x3418659A: EB03 430C ADD.W R3, R3, R12, LSL #16 0x3418659E: 431A ORRS R2, R3 0x341865A0: 4310 ORRS R0, R2 0x341865A2: 6008 STR R0, [R1] 0x341865A4: F009 FE6C BL LL_RCC_IC8_Enable ; 0x34190280 0x341865A8: E059 B 46L548 ; 0x3418665E
.L541: 0x341865AA: 9804 LDR R0, [SP, #16] 0x341865AC: F8D0 0138 LDR.W R0, [R0, #0x0138] 0x341865B0: F640 0120 MOVW R1, #0x0820 0x341865B4: F2C0 7103 MOVT R1, #0x0703 0x341865B8: 4288 CMP R0, R1 0x341865BA: D144 BNE 46L547 ; 0x34186646 0x341865BC: 9804 LDR R0, [SP, #16] 0x341865BE: 6C80 LDR R0, [R0, #72] 0x341865C0: B170 CBZ R0, .L542 ; 0x341865E0 0x341865C2: 9804 LDR R0, [SP, #16] 0x341865C4: 6C80 LDR R0, [R0, #72] 0x341865C6: F1B0 5F80 CMP.W R0, #0x10000000 0x341865CA: D009 BEQ 46L542 ; 0x341865E0 0x341865CC: 9804 LDR R0, [SP, #16] 0x341865CE: 6C80 LDR R0, [R0, #72] 0x341865D0: F1B0 5F00 CMP.W R0, #0x20000000 0x341865D4: D004 BEQ 46L542 ; 0x341865E0 0x341865D6: 9804 LDR R0, [SP, #16] 0x341865D8: 6C80 LDR R0, [R0, #72] 0x341865DA: F1B0 5F40 CMP.W R0, #0x30000000 0x341865DE: D100 BNE 46L543 ; 0x341865E2
.L542: 0x341865E0: E007 B 46L544 ; 0x341865F2
.L543: 0x341865E2: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341865E6: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341865EA: F240 614C MOVW R1, #0x064C 0x341865EE: F007 FB55 BL assert_failed ; 0x3418DC9C
.L544: 0x341865F2: 9804 LDR R0, [SP, #16] 0x341865F4: 6CC0 LDR R0, [R0, #76] 0x341865F6: B128 CBZ R0, .L545 ; 0x34186604 0x341865F8: 9804 LDR R0, [SP, #16] 0x341865FA: 6CC0 LDR R0, [R0, #76] 0x341865FC: F5B0 7F80 CMP.W R0, #0x0100 0x34186600: D800 BHI 46L545 ; 0x34186604 0x34186602: E007 B 46L546 ; 0x34186614
.L545: 0x34186604: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34186608: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x3418660C: F240 614D MOVW R1, #0x064D 0x34186610: F007 FB44 BL assert_failed ; 0x3418DC9C
.L546: 0x34186614: F248 01E4 MOVW R1, #0x80E4 0x34186618: F2C5 6102 MOVT R1, #0x5602 0x3418661C: 6808 LDR R0, [R1] 0x3418661E: F64F 72FF MOVW R2, #0xFFFF 0x34186622: F6CC 7200 MOVT R2, #0xCF00 0x34186626: 4010 ANDS R0, R2 0x34186628: 9B04 LDR R3, [SP, #16] 0x3418662A: 6C9A LDR R2, [R3, #72] 0x3418662C: F8D3 C04C LDR.W R12, [R3, #76] 0x34186630: 2300 MOVS R3, #0 0x34186632: F6CF 73FF MOVT R3, #0xFFFF 0x34186636: EB03 430C ADD.W R3, R3, R12, LSL #16 0x3418663A: 431A ORRS R2, R3 0x3418663C: 4310 ORRS R0, R2 0x3418663E: 6008 STR R0, [R1] 0x34186640: F002 F8C4 BL LL_RCC_IC9_Enable ; 0x341887CC 0x34186644: E00B B 46L548 ; 0x3418665E
.L547: 0x34186646: 9804 LDR R0, [SP, #16] 0x34186648: F8D0 0138 LDR.W R0, [R0, #0x0138] 0x3418664C: F640 0120 MOVW R1, #0x0820 0x34186650: F2C0 7101 MOVT R1, #0x0701 0x34186654: 4288 CMP R0, R1 0x34186656: D102 BNE 46L548 ; 0x3418665E 0x34186658: F009 FE02 BL LL_RCC_CLKP_Enable ; 0x34190260 0x3418665C: E7FF B 46L548 ; 0x3418665E
.L548: 0x3418665E: 9804 LDR R0, [SP, #16] 0x34186660: F8D0 0138 LDR.W R0, [R0, #0x0138] 0x34186664: F002 F918 BL LL_RCC_SetSPIClockSource ; 0x34188898
.L549: 0x34186668: 9804 LDR R0, [SP, #16] 0x3418666A: 7900 LDRB R0, [R0, #4] 0x3418666C: 0700 LSLS R0, R0, #28 0x3418666E: 2800 CMP R0, #0 0x34186670: F140 80F5 BPL.W 46L566 ; 0x3418685E 0x34186674: 9804 LDR R0, [SP, #16] 0x34186676: F8D0 013C LDR.W R0, [R0, #0x013C] 0x3418667A: F640 4120 MOVW R1, #0x0C20 0x3418667E: F2C0 7100 MOVT R1, #0x0700 0x34186682: 4288 CMP R0, R1 0x34186684: D035 BEQ 46L550 ; 0x341866F2 0x34186686: 9804 LDR R0, [SP, #16] 0x34186688: F8D0 013C LDR.W R0, [R0, #0x013C] 0x3418668C: F640 4120 MOVW R1, #0x0C20 0x34186690: F2C0 7101 MOVT R1, #0x0701 0x34186694: 4288 CMP R0, R1 0x34186696: D02C BEQ 46L550 ; 0x341866F2 0x34186698: 9804 LDR R0, [SP, #16] 0x3418669A: F8D0 013C LDR.W R0, [R0, #0x013C] 0x3418669E: F640 4120 MOVW R1, #0x0C20 0x341866A2: F2C0 7102 MOVT R1, #0x0702 0x341866A6: 4288 CMP R0, R1 0x341866A8: D023 BEQ 46L550 ; 0x341866F2 0x341866AA: 9804 LDR R0, [SP, #16] 0x341866AC: F8D0 013C LDR.W R0, [R0, #0x013C] 0x341866B0: F640 4120 MOVW R1, #0x0C20 0x341866B4: F2C0 7103 MOVT R1, #0x0703 0x341866B8: 4288 CMP R0, R1 0x341866BA: D01A BEQ 46L550 ; 0x341866F2 0x341866BC: 9804 LDR R0, [SP, #16] 0x341866BE: F8D0 013C LDR.W R0, [R0, #0x013C] 0x341866C2: F640 4120 MOVW R1, #0x0C20 0x341866C6: F2C0 7104 MOVT R1, #0x0704 0x341866CA: 4288 CMP R0, R1 0x341866CC: D011 BEQ 46L550 ; 0x341866F2 0x341866CE: 9804 LDR R0, [SP, #16] 0x341866D0: F8D0 013C LDR.W R0, [R0, #0x013C] 0x341866D4: F640 4120 MOVW R1, #0x0C20 0x341866D8: F2C0 7105 MOVT R1, #0x0705 0x341866DC: 4288 CMP R0, R1 0x341866DE: D008 BEQ 46L550 ; 0x341866F2 0x341866E0: 9804 LDR R0, [SP, #16] 0x341866E2: F8D0 013C LDR.W R0, [R0, #0x013C] 0x341866E6: F640 4120 MOVW R1, #0x0C20 0x341866EA: F2C0 7106 MOVT R1, #0x0706 0x341866EE: 4288 CMP R0, R1 0x341866F0: D100 BNE 46L551 ; 0x341866F4
.L550: 0x341866F2: E007 B 46L552 ; 0x34186704
.L551: 0x341866F4: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341866F8: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341866FC: F240 6167 MOVW R1, #0x0667 0x34186700: F007 FACC BL assert_failed ; 0x3418DC9C
.L552: 0x34186704: 9804 LDR R0, [SP, #16] 0x34186706: F8D0 013C LDR.W R0, [R0, #0x013C] 0x3418670A: F640 4120 MOVW R1, #0x0C20 0x3418670E: F2C0 7102 MOVT R1, #0x0702 0x34186712: 4288 CMP R0, R1 0x34186714: D144 BNE 46L558 ; 0x341867A0 0x34186716: 9804 LDR R0, [SP, #16] 0x34186718: 6C00 LDR R0, [R0, #64] 0x3418671A: B170 CBZ R0, .L553 ; 0x3418673A 0x3418671C: 9804 LDR R0, [SP, #16] 0x3418671E: 6C00 LDR R0, [R0, #64] 0x34186720: F1B0 5F80 CMP.W R0, #0x10000000 0x34186724: D009 BEQ 46L553 ; 0x3418673A 0x34186726: 9804 LDR R0, [SP, #16] 0x34186728: 6C00 LDR R0, [R0, #64] 0x3418672A: F1B0 5F00 CMP.W R0, #0x20000000 0x3418672E: D004 BEQ 46L553 ; 0x3418673A 0x34186730: 9804 LDR R0, [SP, #16] 0x34186732: 6C00 LDR R0, [R0, #64] 0x34186734: F1B0 5F40 CMP.W R0, #0x30000000 0x34186738: D100 BNE 46L554 ; 0x3418673C
.L553: 0x3418673A: E007 B 46L555 ; 0x3418674C
.L554: 0x3418673C: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34186740: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34186744: F240 616C MOVW R1, #0x066C 0x34186748: F007 FAA8 BL assert_failed ; 0x3418DC9C
.L555: 0x3418674C: 9804 LDR R0, [SP, #16] 0x3418674E: 6C40 LDR R0, [R0, #68] 0x34186750: B128 CBZ R0, .L556 ; 0x3418675E 0x34186752: 9804 LDR R0, [SP, #16] 0x34186754: 6C40 LDR R0, [R0, #68] 0x34186756: F5B0 7F80 CMP.W R0, #0x0100 0x3418675A: D800 BHI 46L556 ; 0x3418675E 0x3418675C: E007 B 46L557 ; 0x3418676E
.L556: 0x3418675E: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34186762: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34186766: F240 616D MOVW R1, #0x066D 0x3418676A: F007 FA97 BL assert_failed ; 0x3418DC9C
.L557: 0x3418676E: F248 01E0 MOVW R1, #0x80E0 0x34186772: F2C5 6102 MOVT R1, #0x5602 0x34186776: 6808 LDR R0, [R1] 0x34186778: F64F 72FF MOVW R2, #0xFFFF 0x3418677C: F6CC 7200 MOVT R2, #0xCF00 0x34186780: 4010 ANDS R0, R2 0x34186782: 9B04 LDR R3, [SP, #16] 0x34186784: 6C1A LDR R2, [R3, #64] 0x34186786: F8D3 C044 LDR.W R12, [R3, #68] 0x3418678A: 2300 MOVS R3, #0 0x3418678C: F6CF 73FF MOVT R3, #0xFFFF 0x34186790: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34186794: 431A ORRS R2, R3 0x34186796: 4310 ORRS R0, R2 0x34186798: 6008 STR R0, [R1] 0x3418679A: F009 FD71 BL LL_RCC_IC8_Enable ; 0x34190280 0x3418679E: E059 B 46L565 ; 0x34186854
.L558: 0x341867A0: 9804 LDR R0, [SP, #16] 0x341867A2: F8D0 013C LDR.W R0, [R0, #0x013C] 0x341867A6: F640 4120 MOVW R1, #0x0C20 0x341867AA: F2C0 7103 MOVT R1, #0x0703 0x341867AE: 4288 CMP R0, R1 0x341867B0: D144 BNE 46L564 ; 0x3418683C 0x341867B2: 9804 LDR R0, [SP, #16] 0x341867B4: 6C80 LDR R0, [R0, #72] 0x341867B6: B170 CBZ R0, .L559 ; 0x341867D6 0x341867B8: 9804 LDR R0, [SP, #16] 0x341867BA: 6C80 LDR R0, [R0, #72] 0x341867BC: F1B0 5F80 CMP.W R0, #0x10000000 0x341867C0: D009 BEQ 46L559 ; 0x341867D6 0x341867C2: 9804 LDR R0, [SP, #16] 0x341867C4: 6C80 LDR R0, [R0, #72] 0x341867C6: F1B0 5F00 CMP.W R0, #0x20000000 0x341867CA: D004 BEQ 46L559 ; 0x341867D6 0x341867CC: 9804 LDR R0, [SP, #16] 0x341867CE: 6C80 LDR R0, [R0, #72] 0x341867D0: F1B0 5F40 CMP.W R0, #0x30000000 0x341867D4: D100 BNE 46L560 ; 0x341867D8
.L559: 0x341867D6: E007 B 46L561 ; 0x341867E8
.L560: 0x341867D8: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341867DC: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341867E0: F240 6179 MOVW R1, #0x0679 0x341867E4: F007 FA5A BL assert_failed ; 0x3418DC9C
.L561: 0x341867E8: 9804 LDR R0, [SP, #16] 0x341867EA: 6CC0 LDR R0, [R0, #76] 0x341867EC: B128 CBZ R0, .L562 ; 0x341867FA 0x341867EE: 9804 LDR R0, [SP, #16] 0x341867F0: 6CC0 LDR R0, [R0, #76] 0x341867F2: F5B0 7F80 CMP.W R0, #0x0100 0x341867F6: D800 BHI 46L562 ; 0x341867FA 0x341867F8: E007 B 46L563 ; 0x3418680A
.L562: 0x341867FA: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341867FE: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34186802: F240 617A MOVW R1, #0x067A 0x34186806: F007 FA49 BL assert_failed ; 0x3418DC9C
.L563: 0x3418680A: F248 01E4 MOVW R1, #0x80E4 0x3418680E: F2C5 6102 MOVT R1, #0x5602 0x34186812: 6808 LDR R0, [R1] 0x34186814: F64F 72FF MOVW R2, #0xFFFF 0x34186818: F6CC 7200 MOVT R2, #0xCF00 0x3418681C: 4010 ANDS R0, R2 0x3418681E: 9B04 LDR R3, [SP, #16] 0x34186820: 6C9A LDR R2, [R3, #72] 0x34186822: F8D3 C04C LDR.W R12, [R3, #76] 0x34186826: 2300 MOVS R3, #0 0x34186828: F6CF 73FF MOVT R3, #0xFFFF 0x3418682C: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34186830: 431A ORRS R2, R3 0x34186832: 4310 ORRS R0, R2 0x34186834: 6008 STR R0, [R1] 0x34186836: F001 FFC9 BL LL_RCC_IC9_Enable ; 0x341887CC 0x3418683A: E00B B 46L565 ; 0x34186854
.L564: 0x3418683C: 9804 LDR R0, [SP, #16] 0x3418683E: F8D0 013C LDR.W R0, [R0, #0x013C] 0x34186842: F640 4120 MOVW R1, #0x0C20 0x34186846: F2C0 7101 MOVT R1, #0x0701 0x3418684A: 4288 CMP R0, R1 0x3418684C: D102 BNE 46L565 ; 0x34186854 0x3418684E: F009 FD07 BL LL_RCC_CLKP_Enable ; 0x34190260 0x34186852: E7FF B 46L565 ; 0x34186854
.L565: 0x34186854: 9804 LDR R0, [SP, #16] 0x34186856: F8D0 013C LDR.W R0, [R0, #0x013C] 0x3418685A: F002 F81D BL LL_RCC_SetSPIClockSource ; 0x34188898
.L566: 0x3418685E: 9804 LDR R0, [SP, #16] 0x34186860: 7900 LDRB R0, [R0, #4] 0x34186862: 06C0 LSLS R0, R0, #27 0x34186864: 2800 CMP R0, #0 0x34186866: F140 80F5 BPL.W 46L583 ; 0x34186A54 0x3418686A: 9804 LDR R0, [SP, #16] 0x3418686C: F8D0 0140 LDR.W R0, [R0, #0x0140] 0x34186870: F241 0120 MOVW R1, #0x1020 0x34186874: F2C0 7100 MOVT R1, #0x0700 0x34186878: 4288 CMP R0, R1 0x3418687A: D035 BEQ 46L567 ; 0x341868E8 0x3418687C: 9804 LDR R0, [SP, #16] 0x3418687E: F8D0 0140 LDR.W R0, [R0, #0x0140] 0x34186882: F241 0120 MOVW R1, #0x1020 0x34186886: F2C0 7101 MOVT R1, #0x0701 0x3418688A: 4288 CMP R0, R1 0x3418688C: D02C BEQ 46L567 ; 0x341868E8 0x3418688E: 9804 LDR R0, [SP, #16] 0x34186890: F8D0 0140 LDR.W R0, [R0, #0x0140] 0x34186894: F241 0120 MOVW R1, #0x1020 0x34186898: F2C0 7102 MOVT R1, #0x0702 0x3418689C: 4288 CMP R0, R1 0x3418689E: D023 BEQ 46L567 ; 0x341868E8 0x341868A0: 9804 LDR R0, [SP, #16] 0x341868A2: F8D0 0140 LDR.W R0, [R0, #0x0140] 0x341868A6: F241 0120 MOVW R1, #0x1020 0x341868AA: F2C0 7103 MOVT R1, #0x0703 0x341868AE: 4288 CMP R0, R1 0x341868B0: D01A BEQ 46L567 ; 0x341868E8 0x341868B2: 9804 LDR R0, [SP, #16] 0x341868B4: F8D0 0140 LDR.W R0, [R0, #0x0140] 0x341868B8: F241 0120 MOVW R1, #0x1020 0x341868BC: F2C0 7104 MOVT R1, #0x0704 0x341868C0: 4288 CMP R0, R1 0x341868C2: D011 BEQ 46L567 ; 0x341868E8 0x341868C4: 9804 LDR R0, [SP, #16] 0x341868C6: F8D0 0140 LDR.W R0, [R0, #0x0140] 0x341868CA: F241 0120 MOVW R1, #0x1020 0x341868CE: F2C0 7105 MOVT R1, #0x0705 0x341868D2: 4288 CMP R0, R1 0x341868D4: D008 BEQ 46L567 ; 0x341868E8 0x341868D6: 9804 LDR R0, [SP, #16] 0x341868D8: F8D0 0140 LDR.W R0, [R0, #0x0140] 0x341868DC: F241 0120 MOVW R1, #0x1020 0x341868E0: F2C0 7106 MOVT R1, #0x0706 0x341868E4: 4288 CMP R0, R1 0x341868E6: D100 BNE 46L568 ; 0x341868EA
.L567: 0x341868E8: E007 B 46L569 ; 0x341868FA
.L568: 0x341868EA: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341868EE: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341868F2: F240 6194 MOVW R1, #0x0694 0x341868F6: F007 F9D1 BL assert_failed ; 0x3418DC9C
.L569: 0x341868FA: 9804 LDR R0, [SP, #16] 0x341868FC: F8D0 0140 LDR.W R0, [R0, #0x0140] 0x34186900: F241 0120 MOVW R1, #0x1020 0x34186904: F2C0 7102 MOVT R1, #0x0702 0x34186908: 4288 CMP R0, R1 0x3418690A: D144 BNE 46L575 ; 0x34186996 0x3418690C: 9804 LDR R0, [SP, #16] 0x3418690E: 6C80 LDR R0, [R0, #72] 0x34186910: B170 CBZ R0, .L570 ; 0x34186930 0x34186912: 9804 LDR R0, [SP, #16] 0x34186914: 6C80 LDR R0, [R0, #72] 0x34186916: F1B0 5F80 CMP.W R0, #0x10000000 0x3418691A: D009 BEQ 46L570 ; 0x34186930 0x3418691C: 9804 LDR R0, [SP, #16] 0x3418691E: 6C80 LDR R0, [R0, #72] 0x34186920: F1B0 5F00 CMP.W R0, #0x20000000 0x34186924: D004 BEQ 46L570 ; 0x34186930 0x34186926: 9804 LDR R0, [SP, #16] 0x34186928: 6C80 LDR R0, [R0, #72] 0x3418692A: F1B0 5F40 CMP.W R0, #0x30000000 0x3418692E: D100 BNE 46L571 ; 0x34186932
.L570: 0x34186930: E007 B 46L572 ; 0x34186942
.L571: 0x34186932: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34186936: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x3418693A: F240 6199 MOVW R1, #0x0699 0x3418693E: F007 F9AD BL assert_failed ; 0x3418DC9C
.L572: 0x34186942: 9804 LDR R0, [SP, #16] 0x34186944: 6CC0 LDR R0, [R0, #76] 0x34186946: B128 CBZ R0, .L573 ; 0x34186954 0x34186948: 9804 LDR R0, [SP, #16] 0x3418694A: 6CC0 LDR R0, [R0, #76] 0x3418694C: F5B0 7F80 CMP.W R0, #0x0100 0x34186950: D800 BHI 46L573 ; 0x34186954 0x34186952: E007 B 46L574 ; 0x34186964
.L573: 0x34186954: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34186958: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x3418695C: F240 619A MOVW R1, #0x069A 0x34186960: F007 F99C BL assert_failed ; 0x3418DC9C
.L574: 0x34186964: F248 01E4 MOVW R1, #0x80E4 0x34186968: F2C5 6102 MOVT R1, #0x5602 0x3418696C: 6808 LDR R0, [R1] 0x3418696E: F64F 72FF MOVW R2, #0xFFFF 0x34186972: F6CC 7200 MOVT R2, #0xCF00 0x34186976: 4010 ANDS R0, R2 0x34186978: 9B04 LDR R3, [SP, #16] 0x3418697A: 6C9A LDR R2, [R3, #72] 0x3418697C: F8D3 C04C LDR.W R12, [R3, #76] 0x34186980: 2300 MOVS R3, #0 0x34186982: F6CF 73FF MOVT R3, #0xFFFF 0x34186986: EB03 430C ADD.W R3, R3, R12, LSL #16 0x3418698A: 431A ORRS R2, R3 0x3418698C: 4310 ORRS R0, R2 0x3418698E: 6008 STR R0, [R1] 0x34186990: F001 FF1C BL LL_RCC_IC9_Enable ; 0x341887CC 0x34186994: E059 B 46L582 ; 0x34186A4A
.L575: 0x34186996: 9804 LDR R0, [SP, #16] 0x34186998: F8D0 0140 LDR.W R0, [R0, #0x0140] 0x3418699C: F241 0120 MOVW R1, #0x1020 0x341869A0: F2C0 7103 MOVT R1, #0x0703 0x341869A4: 4288 CMP R0, R1 0x341869A6: D144 BNE 46L581 ; 0x34186A32 0x341869A8: 9804 LDR R0, [SP, #16] 0x341869AA: 6F00 LDR R0, [R0, #112] 0x341869AC: B170 CBZ R0, .L576 ; 0x341869CC 0x341869AE: 9804 LDR R0, [SP, #16] 0x341869B0: 6F00 LDR R0, [R0, #112] 0x341869B2: F1B0 5F80 CMP.W R0, #0x10000000 0x341869B6: D009 BEQ 46L576 ; 0x341869CC 0x341869B8: 9804 LDR R0, [SP, #16] 0x341869BA: 6F00 LDR R0, [R0, #112] 0x341869BC: F1B0 5F00 CMP.W R0, #0x20000000 0x341869C0: D004 BEQ 46L576 ; 0x341869CC 0x341869C2: 9804 LDR R0, [SP, #16] 0x341869C4: 6F00 LDR R0, [R0, #112] 0x341869C6: F1B0 5F40 CMP.W R0, #0x30000000 0x341869CA: D100 BNE 46L577 ; 0x341869CE
.L576: 0x341869CC: E007 B 46L578 ; 0x341869DE
.L577: 0x341869CE: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341869D2: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341869D6: F240 61A6 MOVW R1, #0x06A6 0x341869DA: F007 F95F BL assert_failed ; 0x3418DC9C
.L578: 0x341869DE: 9804 LDR R0, [SP, #16] 0x341869E0: 6F40 LDR R0, [R0, #116] 0x341869E2: B128 CBZ R0, .L579 ; 0x341869F0 0x341869E4: 9804 LDR R0, [SP, #16] 0x341869E6: 6F40 LDR R0, [R0, #116] 0x341869E8: F5B0 7F80 CMP.W R0, #0x0100 0x341869EC: D800 BHI 46L579 ; 0x341869F0 0x341869EE: E007 B 46L580 ; 0x34186A00
.L579: 0x341869F0: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341869F4: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341869F8: F240 61A7 MOVW R1, #0x06A7 0x341869FC: F007 F94E BL assert_failed ; 0x3418DC9C
.L580: 0x34186A00: F248 01F8 MOVW R1, #0x80F8 0x34186A04: F2C5 6102 MOVT R1, #0x5602 0x34186A08: 6808 LDR R0, [R1] 0x34186A0A: F64F 72FF MOVW R2, #0xFFFF 0x34186A0E: F6CC 7200 MOVT R2, #0xCF00 0x34186A12: 4010 ANDS R0, R2 0x34186A14: 9B04 LDR R3, [SP, #16] 0x34186A16: 6F1A LDR R2, [R3, #112] 0x34186A18: F8D3 C074 LDR.W R12, [R3, #116] 0x34186A1C: 2300 MOVS R3, #0 0x34186A1E: F6CF 73FF MOVT R3, #0xFFFF 0x34186A22: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34186A26: 431A ORRS R2, R3 0x34186A28: 4310 ORRS R0, R2 0x34186A2A: 6008 STR R0, [R1] 0x34186A2C: F001 FED6 BL LL_RCC_IC14_Enable ; 0x341887DC 0x34186A30: E00B B 46L582 ; 0x34186A4A
.L581: 0x34186A32: 9804 LDR R0, [SP, #16] 0x34186A34: F8D0 0140 LDR.W R0, [R0, #0x0140] 0x34186A38: F241 0120 MOVW R1, #0x1020 0x34186A3C: F2C0 7101 MOVT R1, #0x0701 0x34186A40: 4288 CMP R0, R1 0x34186A42: D102 BNE 46L582 ; 0x34186A4A 0x34186A44: F009 FC0C BL LL_RCC_CLKP_Enable ; 0x34190260 0x34186A48: E7FF B 46L582 ; 0x34186A4A
.L582: 0x34186A4A: 9804 LDR R0, [SP, #16] 0x34186A4C: F8D0 0140 LDR.W R0, [R0, #0x0140] 0x34186A50: F001 FF22 BL LL_RCC_SetSPIClockSource ; 0x34188898
.L583: 0x34186A54: 9804 LDR R0, [SP, #16] 0x34186A56: 7900 LDRB R0, [R0, #4] 0x34186A58: 0680 LSLS R0, R0, #26 0x34186A5A: 2800 CMP R0, #0 0x34186A5C: F140 80F5 BPL.W 46L600 ; 0x34186C4A 0x34186A60: 9804 LDR R0, [SP, #16] 0x34186A62: F8D0 0144 LDR.W R0, [R0, #0x0144] 0x34186A66: F241 4120 MOVW R1, #0x1420 0x34186A6A: F2C0 7100 MOVT R1, #0x0700 0x34186A6E: 4288 CMP R0, R1 0x34186A70: D035 BEQ 46L584 ; 0x34186ADE 0x34186A72: 9804 LDR R0, [SP, #16] 0x34186A74: F8D0 0144 LDR.W R0, [R0, #0x0144] 0x34186A78: F241 4120 MOVW R1, #0x1420 0x34186A7C: F2C0 7101 MOVT R1, #0x0701 0x34186A80: 4288 CMP R0, R1 0x34186A82: D02C BEQ 46L584 ; 0x34186ADE 0x34186A84: 9804 LDR R0, [SP, #16] 0x34186A86: F8D0 0144 LDR.W R0, [R0, #0x0144] 0x34186A8A: F241 4120 MOVW R1, #0x1420 0x34186A8E: F2C0 7102 MOVT R1, #0x0702 0x34186A92: 4288 CMP R0, R1 0x34186A94: D023 BEQ 46L584 ; 0x34186ADE 0x34186A96: 9804 LDR R0, [SP, #16] 0x34186A98: F8D0 0144 LDR.W R0, [R0, #0x0144] 0x34186A9C: F241 4120 MOVW R1, #0x1420 0x34186AA0: F2C0 7103 MOVT R1, #0x0703 0x34186AA4: 4288 CMP R0, R1 0x34186AA6: D01A BEQ 46L584 ; 0x34186ADE 0x34186AA8: 9804 LDR R0, [SP, #16] 0x34186AAA: F8D0 0144 LDR.W R0, [R0, #0x0144] 0x34186AAE: F241 4120 MOVW R1, #0x1420 0x34186AB2: F2C0 7104 MOVT R1, #0x0704 0x34186AB6: 4288 CMP R0, R1 0x34186AB8: D011 BEQ 46L584 ; 0x34186ADE 0x34186ABA: 9804 LDR R0, [SP, #16] 0x34186ABC: F8D0 0144 LDR.W R0, [R0, #0x0144] 0x34186AC0: F241 4120 MOVW R1, #0x1420 0x34186AC4: F2C0 7105 MOVT R1, #0x0705 0x34186AC8: 4288 CMP R0, R1 0x34186ACA: D008 BEQ 46L584 ; 0x34186ADE 0x34186ACC: 9804 LDR R0, [SP, #16] 0x34186ACE: F8D0 0144 LDR.W R0, [R0, #0x0144] 0x34186AD2: F241 4120 MOVW R1, #0x1420 0x34186AD6: F2C0 7106 MOVT R1, #0x0706 0x34186ADA: 4288 CMP R0, R1 0x34186ADC: D100 BNE 46L585 ; 0x34186AE0
.L584: 0x34186ADE: E007 B 46L586 ; 0x34186AF0
.L585: 0x34186AE0: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34186AE4: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34186AE8: F240 61C1 MOVW R1, #0x06C1 0x34186AEC: F007 F8D6 BL assert_failed ; 0x3418DC9C
.L586: 0x34186AF0: 9804 LDR R0, [SP, #16] 0x34186AF2: F8D0 0144 LDR.W R0, [R0, #0x0144] 0x34186AF6: F241 4120 MOVW R1, #0x1420 0x34186AFA: F2C0 7102 MOVT R1, #0x0702 0x34186AFE: 4288 CMP R0, R1 0x34186B00: D144 BNE 46L592 ; 0x34186B8C 0x34186B02: 9804 LDR R0, [SP, #16] 0x34186B04: 6C80 LDR R0, [R0, #72] 0x34186B06: B170 CBZ R0, .L587 ; 0x34186B26 0x34186B08: 9804 LDR R0, [SP, #16] 0x34186B0A: 6C80 LDR R0, [R0, #72] 0x34186B0C: F1B0 5F80 CMP.W R0, #0x10000000 0x34186B10: D009 BEQ 46L587 ; 0x34186B26 0x34186B12: 9804 LDR R0, [SP, #16] 0x34186B14: 6C80 LDR R0, [R0, #72] 0x34186B16: F1B0 5F00 CMP.W R0, #0x20000000 0x34186B1A: D004 BEQ 46L587 ; 0x34186B26 0x34186B1C: 9804 LDR R0, [SP, #16] 0x34186B1E: 6C80 LDR R0, [R0, #72] 0x34186B20: F1B0 5F40 CMP.W R0, #0x30000000 0x34186B24: D100 BNE 46L588 ; 0x34186B28
.L587: 0x34186B26: E007 B 46L589 ; 0x34186B38
.L588: 0x34186B28: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34186B2C: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34186B30: F240 61C6 MOVW R1, #0x06C6 0x34186B34: F007 F8B2 BL assert_failed ; 0x3418DC9C
.L589: 0x34186B38: 9804 LDR R0, [SP, #16] 0x34186B3A: 6CC0 LDR R0, [R0, #76] 0x34186B3C: B128 CBZ R0, .L590 ; 0x34186B4A 0x34186B3E: 9804 LDR R0, [SP, #16] 0x34186B40: 6CC0 LDR R0, [R0, #76] 0x34186B42: F5B0 7F80 CMP.W R0, #0x0100 0x34186B46: D800 BHI 46L590 ; 0x34186B4A 0x34186B48: E007 B 46L591 ; 0x34186B5A
.L590: 0x34186B4A: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34186B4E: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34186B52: F240 61C7 MOVW R1, #0x06C7 0x34186B56: F007 F8A1 BL assert_failed ; 0x3418DC9C
.L591: 0x34186B5A: F248 01E4 MOVW R1, #0x80E4 0x34186B5E: F2C5 6102 MOVT R1, #0x5602 0x34186B62: 6808 LDR R0, [R1] 0x34186B64: F64F 72FF MOVW R2, #0xFFFF 0x34186B68: F6CC 7200 MOVT R2, #0xCF00 0x34186B6C: 4010 ANDS R0, R2 0x34186B6E: 9B04 LDR R3, [SP, #16] 0x34186B70: 6C9A LDR R2, [R3, #72] 0x34186B72: F8D3 C04C LDR.W R12, [R3, #76] 0x34186B76: 2300 MOVS R3, #0 0x34186B78: F6CF 73FF MOVT R3, #0xFFFF 0x34186B7C: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34186B80: 431A ORRS R2, R3 0x34186B82: 4310 ORRS R0, R2 0x34186B84: 6008 STR R0, [R1] 0x34186B86: F001 FE21 BL LL_RCC_IC9_Enable ; 0x341887CC 0x34186B8A: E059 B 46L599 ; 0x34186C40
.L592: 0x34186B8C: 9804 LDR R0, [SP, #16] 0x34186B8E: F8D0 0144 LDR.W R0, [R0, #0x0144] 0x34186B92: F241 4120 MOVW R1, #0x1420 0x34186B96: F2C0 7103 MOVT R1, #0x0703 0x34186B9A: 4288 CMP R0, R1 0x34186B9C: D144 BNE 46L598 ; 0x34186C28 0x34186B9E: 9804 LDR R0, [SP, #16] 0x34186BA0: 6F00 LDR R0, [R0, #112] 0x34186BA2: B170 CBZ R0, .L593 ; 0x34186BC2 0x34186BA4: 9804 LDR R0, [SP, #16] 0x34186BA6: 6F00 LDR R0, [R0, #112] 0x34186BA8: F1B0 5F80 CMP.W R0, #0x10000000 0x34186BAC: D009 BEQ 46L593 ; 0x34186BC2 0x34186BAE: 9804 LDR R0, [SP, #16] 0x34186BB0: 6F00 LDR R0, [R0, #112] 0x34186BB2: F1B0 5F00 CMP.W R0, #0x20000000 0x34186BB6: D004 BEQ 46L593 ; 0x34186BC2 0x34186BB8: 9804 LDR R0, [SP, #16] 0x34186BBA: 6F00 LDR R0, [R0, #112] 0x34186BBC: F1B0 5F40 CMP.W R0, #0x30000000 0x34186BC0: D100 BNE 46L594 ; 0x34186BC4
.L593: 0x34186BC2: E007 B 46L595 ; 0x34186BD4
.L594: 0x34186BC4: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34186BC8: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34186BCC: F240 61D3 MOVW R1, #0x06D3 0x34186BD0: F007 F864 BL assert_failed ; 0x3418DC9C
.L595: 0x34186BD4: 9804 LDR R0, [SP, #16] 0x34186BD6: 6F40 LDR R0, [R0, #116] 0x34186BD8: B128 CBZ R0, .L596 ; 0x34186BE6 0x34186BDA: 9804 LDR R0, [SP, #16] 0x34186BDC: 6F40 LDR R0, [R0, #116] 0x34186BDE: F5B0 7F80 CMP.W R0, #0x0100 0x34186BE2: D800 BHI 46L596 ; 0x34186BE6 0x34186BE4: E007 B 46L597 ; 0x34186BF6
.L596: 0x34186BE6: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34186BEA: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34186BEE: F240 61D4 MOVW R1, #0x06D4 0x34186BF2: F007 F853 BL assert_failed ; 0x3418DC9C
.L597: 0x34186BF6: F248 01F8 MOVW R1, #0x80F8 0x34186BFA: F2C5 6102 MOVT R1, #0x5602 0x34186BFE: 6808 LDR R0, [R1] 0x34186C00: F64F 72FF MOVW R2, #0xFFFF 0x34186C04: F6CC 7200 MOVT R2, #0xCF00 0x34186C08: 4010 ANDS R0, R2 0x34186C0A: 9B04 LDR R3, [SP, #16] 0x34186C0C: 6F1A LDR R2, [R3, #112] 0x34186C0E: F8D3 C074 LDR.W R12, [R3, #116] 0x34186C12: 2300 MOVS R3, #0 0x34186C14: F6CF 73FF MOVT R3, #0xFFFF 0x34186C18: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34186C1C: 431A ORRS R2, R3 0x34186C1E: 4310 ORRS R0, R2 0x34186C20: 6008 STR R0, [R1] 0x34186C22: F001 FDDB BL LL_RCC_IC14_Enable ; 0x341887DC 0x34186C26: E00B B 46L599 ; 0x34186C40
.L598: 0x34186C28: 9804 LDR R0, [SP, #16] 0x34186C2A: F8D0 0144 LDR.W R0, [R0, #0x0144] 0x34186C2E: F241 4120 MOVW R1, #0x1420 0x34186C32: F2C0 7101 MOVT R1, #0x0701 0x34186C36: 4288 CMP R0, R1 0x34186C38: D102 BNE 46L599 ; 0x34186C40 0x34186C3A: F009 FB11 BL LL_RCC_CLKP_Enable ; 0x34190260 0x34186C3E: E7FF B 46L599 ; 0x34186C40
.L599: 0x34186C40: 9804 LDR R0, [SP, #16] 0x34186C42: F8D0 0144 LDR.W R0, [R0, #0x0144] 0x34186C46: F001 FE27 BL LL_RCC_SetSPIClockSource ; 0x34188898
.L600: 0x34186C4A: 9804 LDR R0, [SP, #16] 0x34186C4C: 7900 LDRB R0, [R0, #4] 0x34186C4E: 0640 LSLS R0, R0, #25 0x34186C50: 2800 CMP R0, #0 0x34186C52: F140 80F5 BPL.W 46L617 ; 0x34186E40 0x34186C56: 9804 LDR R0, [SP, #16] 0x34186C58: F8D0 0148 LDR.W R0, [R0, #0x0148] 0x34186C5C: F641 0120 MOVW R1, #0x1820 0x34186C60: F2C0 7100 MOVT R1, #0x0700 0x34186C64: 4288 CMP R0, R1 0x34186C66: D035 BEQ 46L601 ; 0x34186CD4 0x34186C68: 9804 LDR R0, [SP, #16] 0x34186C6A: F8D0 0148 LDR.W R0, [R0, #0x0148] 0x34186C6E: F641 0120 MOVW R1, #0x1820 0x34186C72: F2C0 7101 MOVT R1, #0x0701 0x34186C76: 4288 CMP R0, R1 0x34186C78: D02C BEQ 46L601 ; 0x34186CD4 0x34186C7A: 9804 LDR R0, [SP, #16] 0x34186C7C: F8D0 0148 LDR.W R0, [R0, #0x0148] 0x34186C80: F641 0120 MOVW R1, #0x1820 0x34186C84: F2C0 7102 MOVT R1, #0x0702 0x34186C88: 4288 CMP R0, R1 0x34186C8A: D023 BEQ 46L601 ; 0x34186CD4 0x34186C8C: 9804 LDR R0, [SP, #16] 0x34186C8E: F8D0 0148 LDR.W R0, [R0, #0x0148] 0x34186C92: F641 0120 MOVW R1, #0x1820 0x34186C96: F2C0 7103 MOVT R1, #0x0703 0x34186C9A: 4288 CMP R0, R1 0x34186C9C: D01A BEQ 46L601 ; 0x34186CD4 0x34186C9E: 9804 LDR R0, [SP, #16] 0x34186CA0: F8D0 0148 LDR.W R0, [R0, #0x0148] 0x34186CA4: F641 0120 MOVW R1, #0x1820 0x34186CA8: F2C0 7104 MOVT R1, #0x0704 0x34186CAC: 4288 CMP R0, R1 0x34186CAE: D011 BEQ 46L601 ; 0x34186CD4 0x34186CB0: 9804 LDR R0, [SP, #16] 0x34186CB2: F8D0 0148 LDR.W R0, [R0, #0x0148] 0x34186CB6: F641 0120 MOVW R1, #0x1820 0x34186CBA: F2C0 7105 MOVT R1, #0x0705 0x34186CBE: 4288 CMP R0, R1 0x34186CC0: D008 BEQ 46L601 ; 0x34186CD4 0x34186CC2: 9804 LDR R0, [SP, #16] 0x34186CC4: F8D0 0148 LDR.W R0, [R0, #0x0148] 0x34186CC8: F641 0120 MOVW R1, #0x1820 0x34186CCC: F2C0 7106 MOVT R1, #0x0706 0x34186CD0: 4288 CMP R0, R1 0x34186CD2: D100 BNE 46L602 ; 0x34186CD6
.L601: 0x34186CD4: E007 B 46L603 ; 0x34186CE6
.L602: 0x34186CD6: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34186CDA: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34186CDE: F240 61EE MOVW R1, #0x06EE 0x34186CE2: F006 FFDB BL assert_failed ; 0x3418DC9C
.L603: 0x34186CE6: 9804 LDR R0, [SP, #16] 0x34186CE8: F8D0 0148 LDR.W R0, [R0, #0x0148] 0x34186CEC: F641 0120 MOVW R1, #0x1820 0x34186CF0: F2C0 7102 MOVT R1, #0x0702 0x34186CF4: 4288 CMP R0, R1 0x34186CF6: D144 BNE 46L609 ; 0x34186D82 0x34186CF8: 9804 LDR R0, [SP, #16] 0x34186CFA: 6C00 LDR R0, [R0, #64] 0x34186CFC: B170 CBZ R0, .L604 ; 0x34186D1C 0x34186CFE: 9804 LDR R0, [SP, #16] 0x34186D00: 6C00 LDR R0, [R0, #64] 0x34186D02: F1B0 5F80 CMP.W R0, #0x10000000 0x34186D06: D009 BEQ 46L604 ; 0x34186D1C 0x34186D08: 9804 LDR R0, [SP, #16] 0x34186D0A: 6C00 LDR R0, [R0, #64] 0x34186D0C: F1B0 5F00 CMP.W R0, #0x20000000 0x34186D10: D004 BEQ 46L604 ; 0x34186D1C 0x34186D12: 9804 LDR R0, [SP, #16] 0x34186D14: 6C00 LDR R0, [R0, #64] 0x34186D16: F1B0 5F40 CMP.W R0, #0x30000000 0x34186D1A: D100 BNE 46L605 ; 0x34186D1E
.L604: 0x34186D1C: E007 B 46L606 ; 0x34186D2E
.L605: 0x34186D1E: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34186D22: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34186D26: F240 61F3 MOVW R1, #0x06F3 0x34186D2A: F006 FFB7 BL assert_failed ; 0x3418DC9C
.L606: 0x34186D2E: 9804 LDR R0, [SP, #16] 0x34186D30: 6C40 LDR R0, [R0, #68] 0x34186D32: B128 CBZ R0, .L607 ; 0x34186D40 0x34186D34: 9804 LDR R0, [SP, #16] 0x34186D36: 6C40 LDR R0, [R0, #68] 0x34186D38: F5B0 7F80 CMP.W R0, #0x0100 0x34186D3C: D800 BHI 46L607 ; 0x34186D40 0x34186D3E: E007 B 46L608 ; 0x34186D50
.L607: 0x34186D40: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34186D44: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34186D48: F240 61F4 MOVW R1, #0x06F4 0x34186D4C: F006 FFA6 BL assert_failed ; 0x3418DC9C
.L608: 0x34186D50: F248 01E0 MOVW R1, #0x80E0 0x34186D54: F2C5 6102 MOVT R1, #0x5602 0x34186D58: 6808 LDR R0, [R1] 0x34186D5A: F64F 72FF MOVW R2, #0xFFFF 0x34186D5E: F6CC 7200 MOVT R2, #0xCF00 0x34186D62: 4010 ANDS R0, R2 0x34186D64: 9B04 LDR R3, [SP, #16] 0x34186D66: 6C1A LDR R2, [R3, #64] 0x34186D68: F8D3 C044 LDR.W R12, [R3, #68] 0x34186D6C: 2300 MOVS R3, #0 0x34186D6E: F6CF 73FF MOVT R3, #0xFFFF 0x34186D72: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34186D76: 431A ORRS R2, R3 0x34186D78: 4310 ORRS R0, R2 0x34186D7A: 6008 STR R0, [R1] 0x34186D7C: F009 FA80 BL LL_RCC_IC8_Enable ; 0x34190280 0x34186D80: E059 B 46L616 ; 0x34186E36
.L609: 0x34186D82: 9804 LDR R0, [SP, #16] 0x34186D84: F8D0 0148 LDR.W R0, [R0, #0x0148] 0x34186D88: F641 0120 MOVW R1, #0x1820 0x34186D8C: F2C0 7103 MOVT R1, #0x0703 0x34186D90: 4288 CMP R0, R1 0x34186D92: D144 BNE 46L615 ; 0x34186E1E 0x34186D94: 9804 LDR R0, [SP, #16] 0x34186D96: 6C80 LDR R0, [R0, #72] 0x34186D98: B170 CBZ R0, .L610 ; 0x34186DB8 0x34186D9A: 9804 LDR R0, [SP, #16] 0x34186D9C: 6C80 LDR R0, [R0, #72] 0x34186D9E: F1B0 5F80 CMP.W R0, #0x10000000 0x34186DA2: D009 BEQ 46L610 ; 0x34186DB8 0x34186DA4: 9804 LDR R0, [SP, #16] 0x34186DA6: 6C80 LDR R0, [R0, #72] 0x34186DA8: F1B0 5F00 CMP.W R0, #0x20000000 0x34186DAC: D004 BEQ 46L610 ; 0x34186DB8 0x34186DAE: 9804 LDR R0, [SP, #16] 0x34186DB0: 6C80 LDR R0, [R0, #72] 0x34186DB2: F1B0 5F40 CMP.W R0, #0x30000000 0x34186DB6: D100 BNE 46L611 ; 0x34186DBA
.L610: 0x34186DB8: E007 B 46L612 ; 0x34186DCA
.L611: 0x34186DBA: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34186DBE: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34186DC2: F44F 61E0 MOV.W R1, #0x0700 0x34186DC6: F006 FF69 BL assert_failed ; 0x3418DC9C
.L612: 0x34186DCA: 9804 LDR R0, [SP, #16] 0x34186DCC: 6CC0 LDR R0, [R0, #76] 0x34186DCE: B128 CBZ R0, .L613 ; 0x34186DDC 0x34186DD0: 9804 LDR R0, [SP, #16] 0x34186DD2: 6CC0 LDR R0, [R0, #76] 0x34186DD4: F5B0 7F80 CMP.W R0, #0x0100 0x34186DD8: D800 BHI 46L613 ; 0x34186DDC 0x34186DDA: E007 B 46L614 ; 0x34186DEC
.L613: 0x34186DDC: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34186DE0: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34186DE4: F240 7101 MOVW R1, #0x0701 0x34186DE8: F006 FF58 BL assert_failed ; 0x3418DC9C
.L614: 0x34186DEC: F248 01E4 MOVW R1, #0x80E4 0x34186DF0: F2C5 6102 MOVT R1, #0x5602 0x34186DF4: 6808 LDR R0, [R1] 0x34186DF6: F64F 72FF MOVW R2, #0xFFFF 0x34186DFA: F6CC 7200 MOVT R2, #0xCF00 0x34186DFE: 4010 ANDS R0, R2 0x34186E00: 9B04 LDR R3, [SP, #16] 0x34186E02: 6C9A LDR R2, [R3, #72] 0x34186E04: F8D3 C04C LDR.W R12, [R3, #76] 0x34186E08: 2300 MOVS R3, #0 0x34186E0A: F6CF 73FF MOVT R3, #0xFFFF 0x34186E0E: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34186E12: 431A ORRS R2, R3 0x34186E14: 4310 ORRS R0, R2 0x34186E16: 6008 STR R0, [R1] 0x34186E18: F001 FCD8 BL LL_RCC_IC9_Enable ; 0x341887CC 0x34186E1C: E00B B 46L616 ; 0x34186E36
.L615: 0x34186E1E: 9804 LDR R0, [SP, #16] 0x34186E20: F8D0 0148 LDR.W R0, [R0, #0x0148] 0x34186E24: F641 0120 MOVW R1, #0x1820 0x34186E28: F2C0 7101 MOVT R1, #0x0701 0x34186E2C: 4288 CMP R0, R1 0x34186E2E: D102 BNE 46L616 ; 0x34186E36 0x34186E30: F009 FA16 BL LL_RCC_CLKP_Enable ; 0x34190260 0x34186E34: E7FF B 46L616 ; 0x34186E36
.L616: 0x34186E36: 9804 LDR R0, [SP, #16] 0x34186E38: F8D0 0148 LDR.W R0, [R0, #0x0148] 0x34186E3C: F001 FD2C BL LL_RCC_SetSPIClockSource ; 0x34188898
.L617: 0x34186E40: 9804 LDR R0, [SP, #16] 0x34186E42: 7940 LDRB R0, [R0, #5] 0x34186E44: 07C0 LSLS R0, R0, #31 0x34186E46: 2800 CMP R0, #0 0x34186E48: F000 80EB BEQ.W 46L634 ; 0x34187022 0x34186E4C: 9804 LDR R0, [SP, #16] 0x34186E4E: F8D0 0150 LDR.W R0, [R0, #0x0150] 0x34186E52: 2130 MOVS R1, #48 0x34186E54: F2C0 7100 MOVT R1, #0x0700 0x34186E58: 4288 CMP R0, R1 0x34186E5A: D02F BEQ 46L618 ; 0x34186EBC 0x34186E5C: 9804 LDR R0, [SP, #16] 0x34186E5E: F8D0 0150 LDR.W R0, [R0, #0x0150] 0x34186E62: 2130 MOVS R1, #48 0x34186E64: F2C0 7101 MOVT R1, #0x0701 0x34186E68: 4288 CMP R0, R1 0x34186E6A: D027 BEQ 46L618 ; 0x34186EBC 0x34186E6C: 9804 LDR R0, [SP, #16] 0x34186E6E: F8D0 0150 LDR.W R0, [R0, #0x0150] 0x34186E72: 2130 MOVS R1, #48 0x34186E74: F2C0 7102 MOVT R1, #0x0702 0x34186E78: 4288 CMP R0, R1 0x34186E7A: D01F BEQ 46L618 ; 0x34186EBC 0x34186E7C: 9804 LDR R0, [SP, #16] 0x34186E7E: F8D0 0150 LDR.W R0, [R0, #0x0150] 0x34186E82: 2130 MOVS R1, #48 0x34186E84: F2C0 7103 MOVT R1, #0x0703 0x34186E88: 4288 CMP R0, R1 0x34186E8A: D017 BEQ 46L618 ; 0x34186EBC 0x34186E8C: 9804 LDR R0, [SP, #16] 0x34186E8E: F8D0 0150 LDR.W R0, [R0, #0x0150] 0x34186E92: 2130 MOVS R1, #48 0x34186E94: F2C0 7104 MOVT R1, #0x0704 0x34186E98: 4288 CMP R0, R1 0x34186E9A: D00F BEQ 46L618 ; 0x34186EBC 0x34186E9C: 9804 LDR R0, [SP, #16] 0x34186E9E: F8D0 0150 LDR.W R0, [R0, #0x0150] 0x34186EA2: 2130 MOVS R1, #48 0x34186EA4: F2C0 7105 MOVT R1, #0x0705 0x34186EA8: 4288 CMP R0, R1 0x34186EAA: D007 BEQ 46L618 ; 0x34186EBC 0x34186EAC: 9804 LDR R0, [SP, #16] 0x34186EAE: F8D0 0150 LDR.W R0, [R0, #0x0150] 0x34186EB2: 2130 MOVS R1, #48 0x34186EB4: F2C0 7106 MOVT R1, #0x0706 0x34186EB8: 4288 CMP R0, R1 0x34186EBA: D100 BNE 46L619 ; 0x34186EBE
.L618: 0x34186EBC: E007 B 46L620 ; 0x34186ECE
.L619: 0x34186EBE: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34186EC2: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34186EC6: F240 711B MOVW R1, #0x071B 0x34186ECA: F006 FEE7 BL assert_failed ; 0x3418DC9C
.L620: 0x34186ECE: 9804 LDR R0, [SP, #16] 0x34186ED0: F8D0 0150 LDR.W R0, [R0, #0x0150] 0x34186ED4: 2130 MOVS R1, #48 0x34186ED6: F2C0 7102 MOVT R1, #0x0702 0x34186EDA: 4288 CMP R0, R1 0x34186EDC: D144 BNE 46L626 ; 0x34186F68 0x34186EDE: 9804 LDR R0, [SP, #16] 0x34186EE0: 6C80 LDR R0, [R0, #72] 0x34186EE2: B170 CBZ R0, .L621 ; 0x34186F02 0x34186EE4: 9804 LDR R0, [SP, #16] 0x34186EE6: 6C80 LDR R0, [R0, #72] 0x34186EE8: F1B0 5F80 CMP.W R0, #0x10000000 0x34186EEC: D009 BEQ 46L621 ; 0x34186F02 0x34186EEE: 9804 LDR R0, [SP, #16] 0x34186EF0: 6C80 LDR R0, [R0, #72] 0x34186EF2: F1B0 5F00 CMP.W R0, #0x20000000 0x34186EF6: D004 BEQ 46L621 ; 0x34186F02 0x34186EF8: 9804 LDR R0, [SP, #16] 0x34186EFA: 6C80 LDR R0, [R0, #72] 0x34186EFC: F1B0 5F40 CMP.W R0, #0x30000000 0x34186F00: D100 BNE 46L622 ; 0x34186F04
.L621: 0x34186F02: E007 B 46L623 ; 0x34186F14
.L622: 0x34186F04: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34186F08: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34186F0C: F44F 61E4 MOV.W R1, #0x0720 0x34186F10: F006 FEC4 BL assert_failed ; 0x3418DC9C
.L623: 0x34186F14: 9804 LDR R0, [SP, #16] 0x34186F16: 6CC0 LDR R0, [R0, #76] 0x34186F18: B128 CBZ R0, .L624 ; 0x34186F26 0x34186F1A: 9804 LDR R0, [SP, #16] 0x34186F1C: 6CC0 LDR R0, [R0, #76] 0x34186F1E: F5B0 7F80 CMP.W R0, #0x0100 0x34186F22: D800 BHI 46L624 ; 0x34186F26 0x34186F24: E007 B 46L625 ; 0x34186F36
.L624: 0x34186F26: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34186F2A: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34186F2E: F240 7121 MOVW R1, #0x0721 0x34186F32: F006 FEB3 BL assert_failed ; 0x3418DC9C
.L625: 0x34186F36: F248 01E4 MOVW R1, #0x80E4 0x34186F3A: F2C5 6102 MOVT R1, #0x5602 0x34186F3E: 6808 LDR R0, [R1] 0x34186F40: F64F 72FF MOVW R2, #0xFFFF 0x34186F44: F6CC 7200 MOVT R2, #0xCF00 0x34186F48: 4010 ANDS R0, R2 0x34186F4A: 9B04 LDR R3, [SP, #16] 0x34186F4C: 6C9A LDR R2, [R3, #72] 0x34186F4E: F8D3 C04C LDR.W R12, [R3, #76] 0x34186F52: 2300 MOVS R3, #0 0x34186F54: F6CF 73FF MOVT R3, #0xFFFF 0x34186F58: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34186F5C: 431A ORRS R2, R3 0x34186F5E: 4310 ORRS R0, R2 0x34186F60: 6008 STR R0, [R1] 0x34186F62: F001 FC33 BL LL_RCC_IC9_Enable ; 0x341887CC 0x34186F66: E057 B 46L633 ; 0x34187018
.L626: 0x34186F68: 9804 LDR R0, [SP, #16] 0x34186F6A: F8D0 0150 LDR.W R0, [R0, #0x0150] 0x34186F6E: 2130 MOVS R1, #48 0x34186F70: F2C0 7103 MOVT R1, #0x0703 0x34186F74: 4288 CMP R0, R1 0x34186F76: D144 BNE 46L632 ; 0x34187002 0x34186F78: 9804 LDR R0, [SP, #16] 0x34186F7A: 6F00 LDR R0, [R0, #112] 0x34186F7C: B170 CBZ R0, .L627 ; 0x34186F9C 0x34186F7E: 9804 LDR R0, [SP, #16] 0x34186F80: 6F00 LDR R0, [R0, #112] 0x34186F82: F1B0 5F80 CMP.W R0, #0x10000000 0x34186F86: D009 BEQ 46L627 ; 0x34186F9C 0x34186F88: 9804 LDR R0, [SP, #16] 0x34186F8A: 6F00 LDR R0, [R0, #112] 0x34186F8C: F1B0 5F00 CMP.W R0, #0x20000000 0x34186F90: D004 BEQ 46L627 ; 0x34186F9C 0x34186F92: 9804 LDR R0, [SP, #16] 0x34186F94: 6F00 LDR R0, [R0, #112] 0x34186F96: F1B0 5F40 CMP.W R0, #0x30000000 0x34186F9A: D100 BNE 46L628 ; 0x34186F9E
.L627: 0x34186F9C: E007 B 46L629 ; 0x34186FAE
.L628: 0x34186F9E: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34186FA2: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34186FA6: F240 712D MOVW R1, #0x072D 0x34186FAA: F006 FE77 BL assert_failed ; 0x3418DC9C
.L629: 0x34186FAE: 9804 LDR R0, [SP, #16] 0x34186FB0: 6F40 LDR R0, [R0, #116] 0x34186FB2: B128 CBZ R0, .L630 ; 0x34186FC0 0x34186FB4: 9804 LDR R0, [SP, #16] 0x34186FB6: 6F40 LDR R0, [R0, #116] 0x34186FB8: F5B0 7F80 CMP.W R0, #0x0100 0x34186FBC: D800 BHI 46L630 ; 0x34186FC0 0x34186FBE: E007 B 46L631 ; 0x34186FD0
.L630: 0x34186FC0: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34186FC4: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34186FC8: F240 712E MOVW R1, #0x072E 0x34186FCC: F006 FE66 BL assert_failed ; 0x3418DC9C
.L631: 0x34186FD0: F248 01F8 MOVW R1, #0x80F8 0x34186FD4: F2C5 6102 MOVT R1, #0x5602 0x34186FD8: 6808 LDR R0, [R1] 0x34186FDA: F64F 72FF MOVW R2, #0xFFFF 0x34186FDE: F6CC 7200 MOVT R2, #0xCF00 0x34186FE2: 4010 ANDS R0, R2 0x34186FE4: 9B04 LDR R3, [SP, #16] 0x34186FE6: 6F1A LDR R2, [R3, #112] 0x34186FE8: F8D3 C074 LDR.W R12, [R3, #116] 0x34186FEC: 2300 MOVS R3, #0 0x34186FEE: F6CF 73FF MOVT R3, #0xFFFF 0x34186FF2: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34186FF6: 431A ORRS R2, R3 0x34186FF8: 4310 ORRS R0, R2 0x34186FFA: 6008 STR R0, [R1] 0x34186FFC: F001 FBEE BL LL_RCC_IC14_Enable ; 0x341887DC 0x34187000: E00A B 46L633 ; 0x34187018
.L632: 0x34187002: 9804 LDR R0, [SP, #16] 0x34187004: F8D0 0150 LDR.W R0, [R0, #0x0150] 0x34187008: 2130 MOVS R1, #48 0x3418700A: F2C0 7101 MOVT R1, #0x0701 0x3418700E: 4288 CMP R0, R1 0x34187010: D102 BNE 46L633 ; 0x34187018 0x34187012: F009 F925 BL LL_RCC_CLKP_Enable ; 0x34190260 0x34187016: E7FF B 46L633 ; 0x34187018
.L633: 0x34187018: 9804 LDR R0, [SP, #16] 0x3418701A: F8D0 0150 LDR.W R0, [R0, #0x0150] 0x3418701E: F001 FC43 BL LL_RCC_SetUSARTClockSource ; 0x341888A8
.L634: 0x34187022: 9804 LDR R0, [SP, #16] 0x34187024: 7940 LDRB R0, [R0, #5] 0x34187026: 0780 LSLS R0, R0, #30 0x34187028: 2800 CMP R0, #0 0x3418702A: F140 80F5 BPL.W 46L651 ; 0x34187218 0x3418702E: 9804 LDR R0, [SP, #16] 0x34187030: F8D0 0154 LDR.W R0, [R0, #0x0154] 0x34187034: F240 4130 MOVW R1, #0x0430 0x34187038: F2C0 7100 MOVT R1, #0x0700 0x3418703C: 4288 CMP R0, R1 0x3418703E: D035 BEQ 46L635 ; 0x341870AC 0x34187040: 9804 LDR R0, [SP, #16] 0x34187042: F8D0 0154 LDR.W R0, [R0, #0x0154] 0x34187046: F240 4130 MOVW R1, #0x0430 0x3418704A: F2C0 7101 MOVT R1, #0x0701 0x3418704E: 4288 CMP R0, R1 0x34187050: D02C BEQ 46L635 ; 0x341870AC 0x34187052: 9804 LDR R0, [SP, #16] 0x34187054: F8D0 0154 LDR.W R0, [R0, #0x0154] 0x34187058: F240 4130 MOVW R1, #0x0430 0x3418705C: F2C0 7102 MOVT R1, #0x0702 0x34187060: 4288 CMP R0, R1 0x34187062: D023 BEQ 46L635 ; 0x341870AC 0x34187064: 9804 LDR R0, [SP, #16] 0x34187066: F8D0 0154 LDR.W R0, [R0, #0x0154] 0x3418706A: F240 4130 MOVW R1, #0x0430 0x3418706E: F2C0 7103 MOVT R1, #0x0703 0x34187072: 4288 CMP R0, R1 0x34187074: D01A BEQ 46L635 ; 0x341870AC 0x34187076: 9804 LDR R0, [SP, #16] 0x34187078: F8D0 0154 LDR.W R0, [R0, #0x0154] 0x3418707C: F240 4130 MOVW R1, #0x0430 0x34187080: F2C0 7104 MOVT R1, #0x0704 0x34187084: 4288 CMP R0, R1 0x34187086: D011 BEQ 46L635 ; 0x341870AC 0x34187088: 9804 LDR R0, [SP, #16] 0x3418708A: F8D0 0154 LDR.W R0, [R0, #0x0154] 0x3418708E: F240 4130 MOVW R1, #0x0430 0x34187092: F2C0 7105 MOVT R1, #0x0705 0x34187096: 4288 CMP R0, R1 0x34187098: D008 BEQ 46L635 ; 0x341870AC 0x3418709A: 9804 LDR R0, [SP, #16] 0x3418709C: F8D0 0154 LDR.W R0, [R0, #0x0154] 0x341870A0: F240 4130 MOVW R1, #0x0430 0x341870A4: F2C0 7106 MOVT R1, #0x0706 0x341870A8: 4288 CMP R0, R1 0x341870AA: D100 BNE 46L636 ; 0x341870AE
.L635: 0x341870AC: E007 B 46L637 ; 0x341870BE
.L636: 0x341870AE: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341870B2: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341870B6: F44F 61E9 MOV.W R1, #0x0748 0x341870BA: F006 FDEF BL assert_failed ; 0x3418DC9C
.L637: 0x341870BE: 9804 LDR R0, [SP, #16] 0x341870C0: F8D0 0154 LDR.W R0, [R0, #0x0154] 0x341870C4: F240 4130 MOVW R1, #0x0430 0x341870C8: F2C0 7102 MOVT R1, #0x0702 0x341870CC: 4288 CMP R0, R1 0x341870CE: D144 BNE 46L643 ; 0x3418715A 0x341870D0: 9804 LDR R0, [SP, #16] 0x341870D2: 6C80 LDR R0, [R0, #72] 0x341870D4: B170 CBZ R0, .L638 ; 0x341870F4 0x341870D6: 9804 LDR R0, [SP, #16] 0x341870D8: 6C80 LDR R0, [R0, #72] 0x341870DA: F1B0 5F80 CMP.W R0, #0x10000000 0x341870DE: D009 BEQ 46L638 ; 0x341870F4 0x341870E0: 9804 LDR R0, [SP, #16] 0x341870E2: 6C80 LDR R0, [R0, #72] 0x341870E4: F1B0 5F00 CMP.W R0, #0x20000000 0x341870E8: D004 BEQ 46L638 ; 0x341870F4 0x341870EA: 9804 LDR R0, [SP, #16] 0x341870EC: 6C80 LDR R0, [R0, #72] 0x341870EE: F1B0 5F40 CMP.W R0, #0x30000000 0x341870F2: D100 BNE 46L639 ; 0x341870F6
.L638: 0x341870F4: E007 B 46L640 ; 0x34187106
.L639: 0x341870F6: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341870FA: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341870FE: F240 714D MOVW R1, #0x074D 0x34187102: F006 FDCB BL assert_failed ; 0x3418DC9C
.L640: 0x34187106: 9804 LDR R0, [SP, #16] 0x34187108: 6CC0 LDR R0, [R0, #76] 0x3418710A: B128 CBZ R0, .L641 ; 0x34187118 0x3418710C: 9804 LDR R0, [SP, #16] 0x3418710E: 6CC0 LDR R0, [R0, #76] 0x34187110: F5B0 7F80 CMP.W R0, #0x0100 0x34187114: D800 BHI 46L641 ; 0x34187118 0x34187116: E007 B 46L642 ; 0x34187128
.L641: 0x34187118: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x3418711C: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34187120: F240 714E MOVW R1, #0x074E 0x34187124: F006 FDBA BL assert_failed ; 0x3418DC9C
.L642: 0x34187128: F248 01E4 MOVW R1, #0x80E4 0x3418712C: F2C5 6102 MOVT R1, #0x5602 0x34187130: 6808 LDR R0, [R1] 0x34187132: F64F 72FF MOVW R2, #0xFFFF 0x34187136: F6CC 7200 MOVT R2, #0xCF00 0x3418713A: 4010 ANDS R0, R2 0x3418713C: 9B04 LDR R3, [SP, #16] 0x3418713E: 6C9A LDR R2, [R3, #72] 0x34187140: F8D3 C04C LDR.W R12, [R3, #76] 0x34187144: 2300 MOVS R3, #0 0x34187146: F6CF 73FF MOVT R3, #0xFFFF 0x3418714A: EB03 430C ADD.W R3, R3, R12, LSL #16 0x3418714E: 431A ORRS R2, R3 0x34187150: 4310 ORRS R0, R2 0x34187152: 6008 STR R0, [R1] 0x34187154: F001 FB3A BL LL_RCC_IC9_Enable ; 0x341887CC 0x34187158: E059 B 46L650 ; 0x3418720E
.L643: 0x3418715A: 9804 LDR R0, [SP, #16] 0x3418715C: F8D0 0154 LDR.W R0, [R0, #0x0154] 0x34187160: F240 4130 MOVW R1, #0x0430 0x34187164: F2C0 7103 MOVT R1, #0x0703 0x34187168: 4288 CMP R0, R1 0x3418716A: D144 BNE 46L649 ; 0x341871F6 0x3418716C: 9804 LDR R0, [SP, #16] 0x3418716E: 6F00 LDR R0, [R0, #112] 0x34187170: B170 CBZ R0, .L644 ; 0x34187190 0x34187172: 9804 LDR R0, [SP, #16] 0x34187174: 6F00 LDR R0, [R0, #112] 0x34187176: F1B0 5F80 CMP.W R0, #0x10000000 0x3418717A: D009 BEQ 46L644 ; 0x34187190 0x3418717C: 9804 LDR R0, [SP, #16] 0x3418717E: 6F00 LDR R0, [R0, #112] 0x34187180: F1B0 5F00 CMP.W R0, #0x20000000 0x34187184: D004 BEQ 46L644 ; 0x34187190 0x34187186: 9804 LDR R0, [SP, #16] 0x34187188: 6F00 LDR R0, [R0, #112] 0x3418718A: F1B0 5F40 CMP.W R0, #0x30000000 0x3418718E: D100 BNE 46L645 ; 0x34187192
.L644: 0x34187190: E007 B 46L646 ; 0x341871A2
.L645: 0x34187192: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34187196: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x3418719A: F240 715A MOVW R1, #0x075A 0x3418719E: F006 FD7D BL assert_failed ; 0x3418DC9C
.L646: 0x341871A2: 9804 LDR R0, [SP, #16] 0x341871A4: 6F40 LDR R0, [R0, #116] 0x341871A6: B128 CBZ R0, .L647 ; 0x341871B4 0x341871A8: 9804 LDR R0, [SP, #16] 0x341871AA: 6F40 LDR R0, [R0, #116] 0x341871AC: F5B0 7F80 CMP.W R0, #0x0100 0x341871B0: D800 BHI 46L647 ; 0x341871B4 0x341871B2: E007 B 46L648 ; 0x341871C4
.L647: 0x341871B4: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341871B8: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341871BC: F240 715B MOVW R1, #0x075B 0x341871C0: F006 FD6C BL assert_failed ; 0x3418DC9C
.L648: 0x341871C4: F248 01F8 MOVW R1, #0x80F8 0x341871C8: F2C5 6102 MOVT R1, #0x5602 0x341871CC: 6808 LDR R0, [R1] 0x341871CE: F64F 72FF MOVW R2, #0xFFFF 0x341871D2: F6CC 7200 MOVT R2, #0xCF00 0x341871D6: 4010 ANDS R0, R2 0x341871D8: 9B04 LDR R3, [SP, #16] 0x341871DA: 6F1A LDR R2, [R3, #112] 0x341871DC: F8D3 C074 LDR.W R12, [R3, #116] 0x341871E0: 2300 MOVS R3, #0 0x341871E2: F6CF 73FF MOVT R3, #0xFFFF 0x341871E6: EB03 430C ADD.W R3, R3, R12, LSL #16 0x341871EA: 431A ORRS R2, R3 0x341871EC: 4310 ORRS R0, R2 0x341871EE: 6008 STR R0, [R1] 0x341871F0: F001 FAF4 BL LL_RCC_IC14_Enable ; 0x341887DC 0x341871F4: E00B B 46L650 ; 0x3418720E
.L649: 0x341871F6: 9804 LDR R0, [SP, #16] 0x341871F8: F8D0 0154 LDR.W R0, [R0, #0x0154] 0x341871FC: F240 4130 MOVW R1, #0x0430 0x34187200: F2C0 7101 MOVT R1, #0x0701 0x34187204: 4288 CMP R0, R1 0x34187206: D102 BNE 46L650 ; 0x3418720E 0x34187208: F009 F82A BL LL_RCC_CLKP_Enable ; 0x34190260 0x3418720C: E7FF B 46L650 ; 0x3418720E
.L650: 0x3418720E: 9804 LDR R0, [SP, #16] 0x34187210: F8D0 0154 LDR.W R0, [R0, #0x0154] 0x34187214: F001 FB48 BL LL_RCC_SetUSARTClockSource ; 0x341888A8
.L651: 0x34187218: 9804 LDR R0, [SP, #16] 0x3418721A: 7940 LDRB R0, [R0, #5] 0x3418721C: 0740 LSLS R0, R0, #29 0x3418721E: 2800 CMP R0, #0 0x34187220: F140 80F5 BPL.W 46L668 ; 0x3418740E 0x34187224: 9804 LDR R0, [SP, #16] 0x34187226: F8D0 0158 LDR.W R0, [R0, #0x0158] 0x3418722A: F640 0130 MOVW R1, #0x0830 0x3418722E: F2C0 7100 MOVT R1, #0x0700 0x34187232: 4288 CMP R0, R1 0x34187234: D035 BEQ 46L652 ; 0x341872A2 0x34187236: 9804 LDR R0, [SP, #16] 0x34187238: F8D0 0158 LDR.W R0, [R0, #0x0158] 0x3418723C: F640 0130 MOVW R1, #0x0830 0x34187240: F2C0 7101 MOVT R1, #0x0701 0x34187244: 4288 CMP R0, R1 0x34187246: D02C BEQ 46L652 ; 0x341872A2 0x34187248: 9804 LDR R0, [SP, #16] 0x3418724A: F8D0 0158 LDR.W R0, [R0, #0x0158] 0x3418724E: F640 0130 MOVW R1, #0x0830 0x34187252: F2C0 7102 MOVT R1, #0x0702 0x34187256: 4288 CMP R0, R1 0x34187258: D023 BEQ 46L652 ; 0x341872A2 0x3418725A: 9804 LDR R0, [SP, #16] 0x3418725C: F8D0 0158 LDR.W R0, [R0, #0x0158] 0x34187260: F640 0130 MOVW R1, #0x0830 0x34187264: F2C0 7103 MOVT R1, #0x0703 0x34187268: 4288 CMP R0, R1 0x3418726A: D01A BEQ 46L652 ; 0x341872A2 0x3418726C: 9804 LDR R0, [SP, #16] 0x3418726E: F8D0 0158 LDR.W R0, [R0, #0x0158] 0x34187272: F640 0130 MOVW R1, #0x0830 0x34187276: F2C0 7104 MOVT R1, #0x0704 0x3418727A: 4288 CMP R0, R1 0x3418727C: D011 BEQ 46L652 ; 0x341872A2 0x3418727E: 9804 LDR R0, [SP, #16] 0x34187280: F8D0 0158 LDR.W R0, [R0, #0x0158] 0x34187284: F640 0130 MOVW R1, #0x0830 0x34187288: F2C0 7105 MOVT R1, #0x0705 0x3418728C: 4288 CMP R0, R1 0x3418728E: D008 BEQ 46L652 ; 0x341872A2 0x34187290: 9804 LDR R0, [SP, #16] 0x34187292: F8D0 0158 LDR.W R0, [R0, #0x0158] 0x34187296: F640 0130 MOVW R1, #0x0830 0x3418729A: F2C0 7106 MOVT R1, #0x0706 0x3418729E: 4288 CMP R0, R1 0x341872A0: D100 BNE 46L653 ; 0x341872A4
.L652: 0x341872A2: E007 B 46L654 ; 0x341872B4
.L653: 0x341872A4: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341872A8: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341872AC: F240 7175 MOVW R1, #0x0775 0x341872B0: F006 FCF4 BL assert_failed ; 0x3418DC9C
.L654: 0x341872B4: 9804 LDR R0, [SP, #16] 0x341872B6: F8D0 0158 LDR.W R0, [R0, #0x0158] 0x341872BA: F640 0130 MOVW R1, #0x0830 0x341872BE: F2C0 7102 MOVT R1, #0x0702 0x341872C2: 4288 CMP R0, R1 0x341872C4: D144 BNE 46L660 ; 0x34187350 0x341872C6: 9804 LDR R0, [SP, #16] 0x341872C8: 6C80 LDR R0, [R0, #72] 0x341872CA: B170 CBZ R0, .L655 ; 0x341872EA 0x341872CC: 9804 LDR R0, [SP, #16] 0x341872CE: 6C80 LDR R0, [R0, #72] 0x341872D0: F1B0 5F80 CMP.W R0, #0x10000000 0x341872D4: D009 BEQ 46L655 ; 0x341872EA 0x341872D6: 9804 LDR R0, [SP, #16] 0x341872D8: 6C80 LDR R0, [R0, #72] 0x341872DA: F1B0 5F00 CMP.W R0, #0x20000000 0x341872DE: D004 BEQ 46L655 ; 0x341872EA 0x341872E0: 9804 LDR R0, [SP, #16] 0x341872E2: 6C80 LDR R0, [R0, #72] 0x341872E4: F1B0 5F40 CMP.W R0, #0x30000000 0x341872E8: D100 BNE 46L656 ; 0x341872EC
.L655: 0x341872EA: E007 B 46L657 ; 0x341872FC
.L656: 0x341872EC: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341872F0: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341872F4: F240 717A MOVW R1, #0x077A 0x341872F8: F006 FCD0 BL assert_failed ; 0x3418DC9C
.L657: 0x341872FC: 9804 LDR R0, [SP, #16] 0x341872FE: 6CC0 LDR R0, [R0, #76] 0x34187300: B128 CBZ R0, .L658 ; 0x3418730E 0x34187302: 9804 LDR R0, [SP, #16] 0x34187304: 6CC0 LDR R0, [R0, #76] 0x34187306: F5B0 7F80 CMP.W R0, #0x0100 0x3418730A: D800 BHI 46L658 ; 0x3418730E 0x3418730C: E007 B 46L659 ; 0x3418731E
.L658: 0x3418730E: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34187312: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34187316: F240 717B MOVW R1, #0x077B 0x3418731A: F006 FCBF BL assert_failed ; 0x3418DC9C
.L659: 0x3418731E: F248 01E4 MOVW R1, #0x80E4 0x34187322: F2C5 6102 MOVT R1, #0x5602 0x34187326: 6808 LDR R0, [R1] 0x34187328: F64F 72FF MOVW R2, #0xFFFF 0x3418732C: F6CC 7200 MOVT R2, #0xCF00 0x34187330: 4010 ANDS R0, R2 0x34187332: 9B04 LDR R3, [SP, #16] 0x34187334: 6C9A LDR R2, [R3, #72] 0x34187336: F8D3 C04C LDR.W R12, [R3, #76] 0x3418733A: 2300 MOVS R3, #0 0x3418733C: F6CF 73FF MOVT R3, #0xFFFF 0x34187340: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34187344: 431A ORRS R2, R3 0x34187346: 4310 ORRS R0, R2 0x34187348: 6008 STR R0, [R1] 0x3418734A: F001 FA3F BL LL_RCC_IC9_Enable ; 0x341887CC 0x3418734E: E059 B 46L667 ; 0x34187404
.L660: 0x34187350: 9804 LDR R0, [SP, #16] 0x34187352: F8D0 0158 LDR.W R0, [R0, #0x0158] 0x34187356: F640 0130 MOVW R1, #0x0830 0x3418735A: F2C0 7103 MOVT R1, #0x0703 0x3418735E: 4288 CMP R0, R1 0x34187360: D144 BNE 46L666 ; 0x341873EC 0x34187362: 9804 LDR R0, [SP, #16] 0x34187364: 6F00 LDR R0, [R0, #112] 0x34187366: B170 CBZ R0, .L661 ; 0x34187386 0x34187368: 9804 LDR R0, [SP, #16] 0x3418736A: 6F00 LDR R0, [R0, #112] 0x3418736C: F1B0 5F80 CMP.W R0, #0x10000000 0x34187370: D009 BEQ 46L661 ; 0x34187386 0x34187372: 9804 LDR R0, [SP, #16] 0x34187374: 6F00 LDR R0, [R0, #112] 0x34187376: F1B0 5F00 CMP.W R0, #0x20000000 0x3418737A: D004 BEQ 46L661 ; 0x34187386 0x3418737C: 9804 LDR R0, [SP, #16] 0x3418737E: 6F00 LDR R0, [R0, #112] 0x34187380: F1B0 5F40 CMP.W R0, #0x30000000 0x34187384: D100 BNE 46L662 ; 0x34187388
.L661: 0x34187386: E007 B 46L663 ; 0x34187398
.L662: 0x34187388: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x3418738C: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34187390: F240 7187 MOVW R1, #0x0787 0x34187394: F006 FC82 BL assert_failed ; 0x3418DC9C
.L663: 0x34187398: 9804 LDR R0, [SP, #16] 0x3418739A: 6F40 LDR R0, [R0, #116] 0x3418739C: B128 CBZ R0, .L664 ; 0x341873AA 0x3418739E: 9804 LDR R0, [SP, #16] 0x341873A0: 6F40 LDR R0, [R0, #116] 0x341873A2: F5B0 7F80 CMP.W R0, #0x0100 0x341873A6: D800 BHI 46L664 ; 0x341873AA 0x341873A8: E007 B 46L665 ; 0x341873BA
.L664: 0x341873AA: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341873AE: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341873B2: F44F 61F1 MOV.W R1, #0x0788 0x341873B6: F006 FC71 BL assert_failed ; 0x3418DC9C
.L665: 0x341873BA: F248 01F8 MOVW R1, #0x80F8 0x341873BE: F2C5 6102 MOVT R1, #0x5602 0x341873C2: 6808 LDR R0, [R1] 0x341873C4: F64F 72FF MOVW R2, #0xFFFF 0x341873C8: F6CC 7200 MOVT R2, #0xCF00 0x341873CC: 4010 ANDS R0, R2 0x341873CE: 9B04 LDR R3, [SP, #16] 0x341873D0: 6F1A LDR R2, [R3, #112] 0x341873D2: F8D3 C074 LDR.W R12, [R3, #116] 0x341873D6: 2300 MOVS R3, #0 0x341873D8: F6CF 73FF MOVT R3, #0xFFFF 0x341873DC: EB03 430C ADD.W R3, R3, R12, LSL #16 0x341873E0: 431A ORRS R2, R3 0x341873E2: 4310 ORRS R0, R2 0x341873E4: 6008 STR R0, [R1] 0x341873E6: F001 F9F9 BL LL_RCC_IC14_Enable ; 0x341887DC 0x341873EA: E00B B 46L667 ; 0x34187404
.L666: 0x341873EC: 9804 LDR R0, [SP, #16] 0x341873EE: F8D0 0158 LDR.W R0, [R0, #0x0158] 0x341873F2: F640 0130 MOVW R1, #0x0830 0x341873F6: F2C0 7101 MOVT R1, #0x0701 0x341873FA: 4288 CMP R0, R1 0x341873FC: D102 BNE 46L667 ; 0x34187404 0x341873FE: F008 FF2F BL LL_RCC_CLKP_Enable ; 0x34190260 0x34187402: E7FF B 46L667 ; 0x34187404
.L667: 0x34187404: 9804 LDR R0, [SP, #16] 0x34187406: F8D0 0158 LDR.W R0, [R0, #0x0158] 0x3418740A: F001 FA4D BL LL_RCC_SetUSARTClockSource ; 0x341888A8
.L668: 0x3418740E: 9804 LDR R0, [SP, #16] 0x34187410: 7940 LDRB R0, [R0, #5] 0x34187412: 0700 LSLS R0, R0, #28 0x34187414: 2800 CMP R0, #0 0x34187416: F140 80F5 BPL.W 46L685 ; 0x34187604 0x3418741A: 9804 LDR R0, [SP, #16] 0x3418741C: F8D0 015C LDR.W R0, [R0, #0x015C] 0x34187420: F640 4130 MOVW R1, #0x0C30 0x34187424: F2C0 7100 MOVT R1, #0x0700 0x34187428: 4288 CMP R0, R1 0x3418742A: D035 BEQ 46L669 ; 0x34187498 0x3418742C: 9804 LDR R0, [SP, #16] 0x3418742E: F8D0 015C LDR.W R0, [R0, #0x015C] 0x34187432: F640 4130 MOVW R1, #0x0C30 0x34187436: F2C0 7101 MOVT R1, #0x0701 0x3418743A: 4288 CMP R0, R1 0x3418743C: D02C BEQ 46L669 ; 0x34187498 0x3418743E: 9804 LDR R0, [SP, #16] 0x34187440: F8D0 015C LDR.W R0, [R0, #0x015C] 0x34187444: F640 4130 MOVW R1, #0x0C30 0x34187448: F2C0 7102 MOVT R1, #0x0702 0x3418744C: 4288 CMP R0, R1 0x3418744E: D023 BEQ 46L669 ; 0x34187498 0x34187450: 9804 LDR R0, [SP, #16] 0x34187452: F8D0 015C LDR.W R0, [R0, #0x015C] 0x34187456: F640 4130 MOVW R1, #0x0C30 0x3418745A: F2C0 7103 MOVT R1, #0x0703 0x3418745E: 4288 CMP R0, R1 0x34187460: D01A BEQ 46L669 ; 0x34187498 0x34187462: 9804 LDR R0, [SP, #16] 0x34187464: F8D0 015C LDR.W R0, [R0, #0x015C] 0x34187468: F640 4130 MOVW R1, #0x0C30 0x3418746C: F2C0 7104 MOVT R1, #0x0704 0x34187470: 4288 CMP R0, R1 0x34187472: D011 BEQ 46L669 ; 0x34187498 0x34187474: 9804 LDR R0, [SP, #16] 0x34187476: F8D0 015C LDR.W R0, [R0, #0x015C] 0x3418747A: F640 4130 MOVW R1, #0x0C30 0x3418747E: F2C0 7105 MOVT R1, #0x0705 0x34187482: 4288 CMP R0, R1 0x34187484: D008 BEQ 46L669 ; 0x34187498 0x34187486: 9804 LDR R0, [SP, #16] 0x34187488: F8D0 015C LDR.W R0, [R0, #0x015C] 0x3418748C: F640 4130 MOVW R1, #0x0C30 0x34187490: F2C0 7106 MOVT R1, #0x0706 0x34187494: 4288 CMP R0, R1 0x34187496: D100 BNE 46L670 ; 0x3418749A
.L669: 0x34187498: E007 B 46L671 ; 0x341874AA
.L670: 0x3418749A: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x3418749E: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341874A2: F240 71A2 MOVW R1, #0x07A2 0x341874A6: F006 FBF9 BL assert_failed ; 0x3418DC9C
.L671: 0x341874AA: 9804 LDR R0, [SP, #16] 0x341874AC: F8D0 015C LDR.W R0, [R0, #0x015C] 0x341874B0: F640 4130 MOVW R1, #0x0C30 0x341874B4: F2C0 7102 MOVT R1, #0x0702 0x341874B8: 4288 CMP R0, R1 0x341874BA: D144 BNE 46L677 ; 0x34187546 0x341874BC: 9804 LDR R0, [SP, #16] 0x341874BE: 6C80 LDR R0, [R0, #72] 0x341874C0: B170 CBZ R0, .L672 ; 0x341874E0 0x341874C2: 9804 LDR R0, [SP, #16] 0x341874C4: 6C80 LDR R0, [R0, #72] 0x341874C6: F1B0 5F80 CMP.W R0, #0x10000000 0x341874CA: D009 BEQ 46L672 ; 0x341874E0 0x341874CC: 9804 LDR R0, [SP, #16] 0x341874CE: 6C80 LDR R0, [R0, #72] 0x341874D0: F1B0 5F00 CMP.W R0, #0x20000000 0x341874D4: D004 BEQ 46L672 ; 0x341874E0 0x341874D6: 9804 LDR R0, [SP, #16] 0x341874D8: 6C80 LDR R0, [R0, #72] 0x341874DA: F1B0 5F40 CMP.W R0, #0x30000000 0x341874DE: D100 BNE 46L673 ; 0x341874E2
.L672: 0x341874E0: E007 B 46L674 ; 0x341874F2
.L673: 0x341874E2: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341874E6: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341874EA: F240 71A7 MOVW R1, #0x07A7 0x341874EE: F006 FBD5 BL assert_failed ; 0x3418DC9C
.L674: 0x341874F2: 9804 LDR R0, [SP, #16] 0x341874F4: 6CC0 LDR R0, [R0, #76] 0x341874F6: B128 CBZ R0, .L675 ; 0x34187504 0x341874F8: 9804 LDR R0, [SP, #16] 0x341874FA: 6CC0 LDR R0, [R0, #76] 0x341874FC: F5B0 7F80 CMP.W R0, #0x0100 0x34187500: D800 BHI 46L675 ; 0x34187504 0x34187502: E007 B 46L676 ; 0x34187514
.L675: 0x34187504: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34187508: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x3418750C: F44F 61F5 MOV.W R1, #0x07A8 0x34187510: F006 FBC4 BL assert_failed ; 0x3418DC9C
.L676: 0x34187514: F248 01E4 MOVW R1, #0x80E4 0x34187518: F2C5 6102 MOVT R1, #0x5602 0x3418751C: 6808 LDR R0, [R1] 0x3418751E: F64F 72FF MOVW R2, #0xFFFF 0x34187522: F6CC 7200 MOVT R2, #0xCF00 0x34187526: 4010 ANDS R0, R2 0x34187528: 9B04 LDR R3, [SP, #16] 0x3418752A: 6C9A LDR R2, [R3, #72] 0x3418752C: F8D3 C04C LDR.W R12, [R3, #76] 0x34187530: 2300 MOVS R3, #0 0x34187532: F6CF 73FF MOVT R3, #0xFFFF 0x34187536: EB03 430C ADD.W R3, R3, R12, LSL #16 0x3418753A: 431A ORRS R2, R3 0x3418753C: 4310 ORRS R0, R2 0x3418753E: 6008 STR R0, [R1] 0x34187540: F001 F944 BL LL_RCC_IC9_Enable ; 0x341887CC 0x34187544: E059 B 46L684 ; 0x341875FA
.L677: 0x34187546: 9804 LDR R0, [SP, #16] 0x34187548: F8D0 015C LDR.W R0, [R0, #0x015C] 0x3418754C: F640 4130 MOVW R1, #0x0C30 0x34187550: F2C0 7103 MOVT R1, #0x0703 0x34187554: 4288 CMP R0, R1 0x34187556: D144 BNE 46L683 ; 0x341875E2 0x34187558: 9804 LDR R0, [SP, #16] 0x3418755A: 6F00 LDR R0, [R0, #112] 0x3418755C: B170 CBZ R0, .L678 ; 0x3418757C 0x3418755E: 9804 LDR R0, [SP, #16] 0x34187560: 6F00 LDR R0, [R0, #112] 0x34187562: F1B0 5F80 CMP.W R0, #0x10000000 0x34187566: D009 BEQ 46L678 ; 0x3418757C 0x34187568: 9804 LDR R0, [SP, #16] 0x3418756A: 6F00 LDR R0, [R0, #112] 0x3418756C: F1B0 5F00 CMP.W R0, #0x20000000 0x34187570: D004 BEQ 46L678 ; 0x3418757C 0x34187572: 9804 LDR R0, [SP, #16] 0x34187574: 6F00 LDR R0, [R0, #112] 0x34187576: F1B0 5F40 CMP.W R0, #0x30000000 0x3418757A: D100 BNE 46L679 ; 0x3418757E
.L678: 0x3418757C: E007 B 46L680 ; 0x3418758E
.L679: 0x3418757E: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34187582: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34187586: F240 71B4 MOVW R1, #0x07B4 0x3418758A: F006 FB87 BL assert_failed ; 0x3418DC9C
.L680: 0x3418758E: 9804 LDR R0, [SP, #16] 0x34187590: 6F40 LDR R0, [R0, #116] 0x34187592: B128 CBZ R0, .L681 ; 0x341875A0 0x34187594: 9804 LDR R0, [SP, #16] 0x34187596: 6F40 LDR R0, [R0, #116] 0x34187598: F5B0 7F80 CMP.W R0, #0x0100 0x3418759C: D800 BHI 46L681 ; 0x341875A0 0x3418759E: E007 B 46L682 ; 0x341875B0
.L681: 0x341875A0: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341875A4: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341875A8: F240 71B5 MOVW R1, #0x07B5 0x341875AC: F006 FB76 BL assert_failed ; 0x3418DC9C
.L682: 0x341875B0: F248 01F8 MOVW R1, #0x80F8 0x341875B4: F2C5 6102 MOVT R1, #0x5602 0x341875B8: 6808 LDR R0, [R1] 0x341875BA: F64F 72FF MOVW R2, #0xFFFF 0x341875BE: F6CC 7200 MOVT R2, #0xCF00 0x341875C2: 4010 ANDS R0, R2 0x341875C4: 9B04 LDR R3, [SP, #16] 0x341875C6: 6F1A LDR R2, [R3, #112] 0x341875C8: F8D3 C074 LDR.W R12, [R3, #116] 0x341875CC: 2300 MOVS R3, #0 0x341875CE: F6CF 73FF MOVT R3, #0xFFFF 0x341875D2: EB03 430C ADD.W R3, R3, R12, LSL #16 0x341875D6: 431A ORRS R2, R3 0x341875D8: 4310 ORRS R0, R2 0x341875DA: 6008 STR R0, [R1] 0x341875DC: F001 F8FE BL LL_RCC_IC14_Enable ; 0x341887DC 0x341875E0: E00B B 46L684 ; 0x341875FA
.L683: 0x341875E2: 9804 LDR R0, [SP, #16] 0x341875E4: F8D0 015C LDR.W R0, [R0, #0x015C] 0x341875E8: F640 4130 MOVW R1, #0x0C30 0x341875EC: F2C0 7101 MOVT R1, #0x0701 0x341875F0: 4288 CMP R0, R1 0x341875F2: D102 BNE 46L684 ; 0x341875FA 0x341875F4: F008 FE34 BL LL_RCC_CLKP_Enable ; 0x34190260 0x341875F8: E7FF B 46L684 ; 0x341875FA
.L684: 0x341875FA: 9804 LDR R0, [SP, #16] 0x341875FC: F8D0 015C LDR.W R0, [R0, #0x015C] 0x34187600: F001 F952 BL LL_RCC_SetUSARTClockSource ; 0x341888A8
.L685: 0x34187604: 9804 LDR R0, [SP, #16] 0x34187606: 7940 LDRB R0, [R0, #5] 0x34187608: 06C0 LSLS R0, R0, #27 0x3418760A: 2800 CMP R0, #0 0x3418760C: F140 80F5 BPL.W 46L702 ; 0x341877FA 0x34187610: 9804 LDR R0, [SP, #16] 0x34187612: F8D0 0160 LDR.W R0, [R0, #0x0160] 0x34187616: F241 0130 MOVW R1, #0x1030 0x3418761A: F2C0 7100 MOVT R1, #0x0700 0x3418761E: 4288 CMP R0, R1 0x34187620: D035 BEQ 46L686 ; 0x3418768E 0x34187622: 9804 LDR R0, [SP, #16] 0x34187624: F8D0 0160 LDR.W R0, [R0, #0x0160] 0x34187628: F241 0130 MOVW R1, #0x1030 0x3418762C: F2C0 7101 MOVT R1, #0x0701 0x34187630: 4288 CMP R0, R1 0x34187632: D02C BEQ 46L686 ; 0x3418768E 0x34187634: 9804 LDR R0, [SP, #16] 0x34187636: F8D0 0160 LDR.W R0, [R0, #0x0160] 0x3418763A: F241 0130 MOVW R1, #0x1030 0x3418763E: F2C0 7102 MOVT R1, #0x0702 0x34187642: 4288 CMP R0, R1 0x34187644: D023 BEQ 46L686 ; 0x3418768E 0x34187646: 9804 LDR R0, [SP, #16] 0x34187648: F8D0 0160 LDR.W R0, [R0, #0x0160] 0x3418764C: F241 0130 MOVW R1, #0x1030 0x34187650: F2C0 7103 MOVT R1, #0x0703 0x34187654: 4288 CMP R0, R1 0x34187656: D01A BEQ 46L686 ; 0x3418768E 0x34187658: 9804 LDR R0, [SP, #16] 0x3418765A: F8D0 0160 LDR.W R0, [R0, #0x0160] 0x3418765E: F241 0130 MOVW R1, #0x1030 0x34187662: F2C0 7104 MOVT R1, #0x0704 0x34187666: 4288 CMP R0, R1 0x34187668: D011 BEQ 46L686 ; 0x3418768E 0x3418766A: 9804 LDR R0, [SP, #16] 0x3418766C: F8D0 0160 LDR.W R0, [R0, #0x0160] 0x34187670: F241 0130 MOVW R1, #0x1030 0x34187674: F2C0 7105 MOVT R1, #0x0705 0x34187678: 4288 CMP R0, R1 0x3418767A: D008 BEQ 46L686 ; 0x3418768E 0x3418767C: 9804 LDR R0, [SP, #16] 0x3418767E: F8D0 0160 LDR.W R0, [R0, #0x0160] 0x34187682: F241 0130 MOVW R1, #0x1030 0x34187686: F2C0 7106 MOVT R1, #0x0706 0x3418768A: 4288 CMP R0, R1 0x3418768C: D100 BNE 46L687 ; 0x34187690
.L686: 0x3418768E: E007 B 46L688 ; 0x341876A0
.L687: 0x34187690: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34187694: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34187698: F240 71CF MOVW R1, #0x07CF 0x3418769C: F006 FAFE BL assert_failed ; 0x3418DC9C
.L688: 0x341876A0: 9804 LDR R0, [SP, #16] 0x341876A2: F8D0 0160 LDR.W R0, [R0, #0x0160] 0x341876A6: F241 0130 MOVW R1, #0x1030 0x341876AA: F2C0 7102 MOVT R1, #0x0702 0x341876AE: 4288 CMP R0, R1 0x341876B0: D144 BNE 46L694 ; 0x3418773C 0x341876B2: 9804 LDR R0, [SP, #16] 0x341876B4: 6C80 LDR R0, [R0, #72] 0x341876B6: B170 CBZ R0, .L689 ; 0x341876D6 0x341876B8: 9804 LDR R0, [SP, #16] 0x341876BA: 6C80 LDR R0, [R0, #72] 0x341876BC: F1B0 5F80 CMP.W R0, #0x10000000 0x341876C0: D009 BEQ 46L689 ; 0x341876D6 0x341876C2: 9804 LDR R0, [SP, #16] 0x341876C4: 6C80 LDR R0, [R0, #72] 0x341876C6: F1B0 5F00 CMP.W R0, #0x20000000 0x341876CA: D004 BEQ 46L689 ; 0x341876D6 0x341876CC: 9804 LDR R0, [SP, #16] 0x341876CE: 6C80 LDR R0, [R0, #72] 0x341876D0: F1B0 5F40 CMP.W R0, #0x30000000 0x341876D4: D100 BNE 46L690 ; 0x341876D8
.L689: 0x341876D6: E007 B 46L691 ; 0x341876E8
.L690: 0x341876D8: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341876DC: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341876E0: F240 71D4 MOVW R1, #0x07D4 0x341876E4: F006 FADA BL assert_failed ; 0x3418DC9C
.L691: 0x341876E8: 9804 LDR R0, [SP, #16] 0x341876EA: 6CC0 LDR R0, [R0, #76] 0x341876EC: B128 CBZ R0, .L692 ; 0x341876FA 0x341876EE: 9804 LDR R0, [SP, #16] 0x341876F0: 6CC0 LDR R0, [R0, #76] 0x341876F2: F5B0 7F80 CMP.W R0, #0x0100 0x341876F6: D800 BHI 46L692 ; 0x341876FA 0x341876F8: E007 B 46L693 ; 0x3418770A
.L692: 0x341876FA: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341876FE: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34187702: F240 71D5 MOVW R1, #0x07D5 0x34187706: F006 FAC9 BL assert_failed ; 0x3418DC9C
.L693: 0x3418770A: F248 01E4 MOVW R1, #0x80E4 0x3418770E: F2C5 6102 MOVT R1, #0x5602 0x34187712: 6808 LDR R0, [R1] 0x34187714: F64F 72FF MOVW R2, #0xFFFF 0x34187718: F6CC 7200 MOVT R2, #0xCF00 0x3418771C: 4010 ANDS R0, R2 0x3418771E: 9B04 LDR R3, [SP, #16] 0x34187720: 6C9A LDR R2, [R3, #72] 0x34187722: F8D3 C04C LDR.W R12, [R3, #76] 0x34187726: 2300 MOVS R3, #0 0x34187728: F6CF 73FF MOVT R3, #0xFFFF 0x3418772C: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34187730: 431A ORRS R2, R3 0x34187732: 4310 ORRS R0, R2 0x34187734: 6008 STR R0, [R1] 0x34187736: F001 F849 BL LL_RCC_IC9_Enable ; 0x341887CC 0x3418773A: E059 B 46L701 ; 0x341877F0
.L694: 0x3418773C: 9804 LDR R0, [SP, #16] 0x3418773E: F8D0 0160 LDR.W R0, [R0, #0x0160] 0x34187742: F241 0130 MOVW R1, #0x1030 0x34187746: F2C0 7103 MOVT R1, #0x0703 0x3418774A: 4288 CMP R0, R1 0x3418774C: D144 BNE 46L700 ; 0x341877D8 0x3418774E: 9804 LDR R0, [SP, #16] 0x34187750: 6F00 LDR R0, [R0, #112] 0x34187752: B170 CBZ R0, .L695 ; 0x34187772 0x34187754: 9804 LDR R0, [SP, #16] 0x34187756: 6F00 LDR R0, [R0, #112] 0x34187758: F1B0 5F80 CMP.W R0, #0x10000000 0x3418775C: D009 BEQ 46L695 ; 0x34187772 0x3418775E: 9804 LDR R0, [SP, #16] 0x34187760: 6F00 LDR R0, [R0, #112] 0x34187762: F1B0 5F00 CMP.W R0, #0x20000000 0x34187766: D004 BEQ 46L695 ; 0x34187772 0x34187768: 9804 LDR R0, [SP, #16] 0x3418776A: 6F00 LDR R0, [R0, #112] 0x3418776C: F1B0 5F40 CMP.W R0, #0x30000000 0x34187770: D100 BNE 46L696 ; 0x34187774
.L695: 0x34187772: E007 B 46L697 ; 0x34187784
.L696: 0x34187774: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34187778: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x3418777C: F240 71E1 MOVW R1, #0x07E1 0x34187780: F006 FA8C BL assert_failed ; 0x3418DC9C
.L697: 0x34187784: 9804 LDR R0, [SP, #16] 0x34187786: 6F40 LDR R0, [R0, #116] 0x34187788: B128 CBZ R0, .L698 ; 0x34187796 0x3418778A: 9804 LDR R0, [SP, #16] 0x3418778C: 6F40 LDR R0, [R0, #116] 0x3418778E: F5B0 7F80 CMP.W R0, #0x0100 0x34187792: D800 BHI 46L698 ; 0x34187796 0x34187794: E007 B 46L699 ; 0x341877A6
.L698: 0x34187796: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x3418779A: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x3418779E: F240 71E2 MOVW R1, #0x07E2 0x341877A2: F006 FA7B BL assert_failed ; 0x3418DC9C
.L699: 0x341877A6: F248 01F8 MOVW R1, #0x80F8 0x341877AA: F2C5 6102 MOVT R1, #0x5602 0x341877AE: 6808 LDR R0, [R1] 0x341877B0: F64F 72FF MOVW R2, #0xFFFF 0x341877B4: F6CC 7200 MOVT R2, #0xCF00 0x341877B8: 4010 ANDS R0, R2 0x341877BA: 9B04 LDR R3, [SP, #16] 0x341877BC: 6F1A LDR R2, [R3, #112] 0x341877BE: F8D3 C074 LDR.W R12, [R3, #116] 0x341877C2: 2300 MOVS R3, #0 0x341877C4: F6CF 73FF MOVT R3, #0xFFFF 0x341877C8: EB03 430C ADD.W R3, R3, R12, LSL #16 0x341877CC: 431A ORRS R2, R3 0x341877CE: 4310 ORRS R0, R2 0x341877D0: 6008 STR R0, [R1] 0x341877D2: F001 F803 BL LL_RCC_IC14_Enable ; 0x341887DC 0x341877D6: E00B B 46L701 ; 0x341877F0
.L700: 0x341877D8: 9804 LDR R0, [SP, #16] 0x341877DA: F8D0 0160 LDR.W R0, [R0, #0x0160] 0x341877DE: F241 0130 MOVW R1, #0x1030 0x341877E2: F2C0 7101 MOVT R1, #0x0701 0x341877E6: 4288 CMP R0, R1 0x341877E8: D102 BNE 46L701 ; 0x341877F0 0x341877EA: F008 FD39 BL LL_RCC_CLKP_Enable ; 0x34190260 0x341877EE: E7FF B 46L701 ; 0x341877F0
.L701: 0x341877F0: 9804 LDR R0, [SP, #16] 0x341877F2: F8D0 0160 LDR.W R0, [R0, #0x0160] 0x341877F6: F001 F857 BL LL_RCC_SetUSARTClockSource ; 0x341888A8
.L702: 0x341877FA: 9804 LDR R0, [SP, #16] 0x341877FC: 7940 LDRB R0, [R0, #5] 0x341877FE: 0680 LSLS R0, R0, #26 0x34187800: 2800 CMP R0, #0 0x34187802: F140 80F5 BPL.W 46L719 ; 0x341879F0 0x34187806: 9804 LDR R0, [SP, #16] 0x34187808: F8D0 0164 LDR.W R0, [R0, #0x0164] 0x3418780C: F241 4130 MOVW R1, #0x1430 0x34187810: F2C0 7100 MOVT R1, #0x0700 0x34187814: 4288 CMP R0, R1 0x34187816: D035 BEQ 46L703 ; 0x34187884 0x34187818: 9804 LDR R0, [SP, #16] 0x3418781A: F8D0 0164 LDR.W R0, [R0, #0x0164] 0x3418781E: F241 4130 MOVW R1, #0x1430 0x34187822: F2C0 7101 MOVT R1, #0x0701 0x34187826: 4288 CMP R0, R1 0x34187828: D02C BEQ 46L703 ; 0x34187884 0x3418782A: 9804 LDR R0, [SP, #16] 0x3418782C: F8D0 0164 LDR.W R0, [R0, #0x0164] 0x34187830: F241 4130 MOVW R1, #0x1430 0x34187834: F2C0 7102 MOVT R1, #0x0702 0x34187838: 4288 CMP R0, R1 0x3418783A: D023 BEQ 46L703 ; 0x34187884 0x3418783C: 9804 LDR R0, [SP, #16] 0x3418783E: F8D0 0164 LDR.W R0, [R0, #0x0164] 0x34187842: F241 4130 MOVW R1, #0x1430 0x34187846: F2C0 7103 MOVT R1, #0x0703 0x3418784A: 4288 CMP R0, R1 0x3418784C: D01A BEQ 46L703 ; 0x34187884 0x3418784E: 9804 LDR R0, [SP, #16] 0x34187850: F8D0 0164 LDR.W R0, [R0, #0x0164] 0x34187854: F241 4130 MOVW R1, #0x1430 0x34187858: F2C0 7104 MOVT R1, #0x0704 0x3418785C: 4288 CMP R0, R1 0x3418785E: D011 BEQ 46L703 ; 0x34187884 0x34187860: 9804 LDR R0, [SP, #16] 0x34187862: F8D0 0164 LDR.W R0, [R0, #0x0164] 0x34187866: F241 4130 MOVW R1, #0x1430 0x3418786A: F2C0 7105 MOVT R1, #0x0705 0x3418786E: 4288 CMP R0, R1 0x34187870: D008 BEQ 46L703 ; 0x34187884 0x34187872: 9804 LDR R0, [SP, #16] 0x34187874: F8D0 0164 LDR.W R0, [R0, #0x0164] 0x34187878: F241 4130 MOVW R1, #0x1430 0x3418787C: F2C0 7106 MOVT R1, #0x0706 0x34187880: 4288 CMP R0, R1 0x34187882: D100 BNE 46L704 ; 0x34187886
.L703: 0x34187884: E007 B 46L705 ; 0x34187896
.L704: 0x34187886: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x3418788A: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x3418788E: F240 71FC MOVW R1, #0x07FC 0x34187892: F006 FA03 BL assert_failed ; 0x3418DC9C
.L705: 0x34187896: 9804 LDR R0, [SP, #16] 0x34187898: F8D0 0164 LDR.W R0, [R0, #0x0164] 0x3418789C: F241 4130 MOVW R1, #0x1430 0x341878A0: F2C0 7102 MOVT R1, #0x0702 0x341878A4: 4288 CMP R0, R1 0x341878A6: D144 BNE 46L711 ; 0x34187932 0x341878A8: 9804 LDR R0, [SP, #16] 0x341878AA: 6C80 LDR R0, [R0, #72] 0x341878AC: B170 CBZ R0, .L706 ; 0x341878CC 0x341878AE: 9804 LDR R0, [SP, #16] 0x341878B0: 6C80 LDR R0, [R0, #72] 0x341878B2: F1B0 5F80 CMP.W R0, #0x10000000 0x341878B6: D009 BEQ 46L706 ; 0x341878CC 0x341878B8: 9804 LDR R0, [SP, #16] 0x341878BA: 6C80 LDR R0, [R0, #72] 0x341878BC: F1B0 5F00 CMP.W R0, #0x20000000 0x341878C0: D004 BEQ 46L706 ; 0x341878CC 0x341878C2: 9804 LDR R0, [SP, #16] 0x341878C4: 6C80 LDR R0, [R0, #72] 0x341878C6: F1B0 5F40 CMP.W R0, #0x30000000 0x341878CA: D100 BNE 46L707 ; 0x341878CE
.L706: 0x341878CC: E007 B 46L708 ; 0x341878DE
.L707: 0x341878CE: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341878D2: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341878D6: F640 0101 MOVW R1, #0x0801 0x341878DA: F006 F9DF BL assert_failed ; 0x3418DC9C
.L708: 0x341878DE: 9804 LDR R0, [SP, #16] 0x341878E0: 6CC0 LDR R0, [R0, #76] 0x341878E2: B128 CBZ R0, .L709 ; 0x341878F0 0x341878E4: 9804 LDR R0, [SP, #16] 0x341878E6: 6CC0 LDR R0, [R0, #76] 0x341878E8: F5B0 7F80 CMP.W R0, #0x0100 0x341878EC: D800 BHI 46L709 ; 0x341878F0 0x341878EE: E007 B 46L710 ; 0x34187900
.L709: 0x341878F0: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341878F4: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341878F8: F640 0102 MOVW R1, #0x0802 0x341878FC: F006 F9CE BL assert_failed ; 0x3418DC9C
.L710: 0x34187900: F248 01E4 MOVW R1, #0x80E4 0x34187904: F2C5 6102 MOVT R1, #0x5602 0x34187908: 6808 LDR R0, [R1] 0x3418790A: F64F 72FF MOVW R2, #0xFFFF 0x3418790E: F6CC 7200 MOVT R2, #0xCF00 0x34187912: 4010 ANDS R0, R2 0x34187914: 9B04 LDR R3, [SP, #16] 0x34187916: 6C9A LDR R2, [R3, #72] 0x34187918: F8D3 C04C LDR.W R12, [R3, #76] 0x3418791C: 2300 MOVS R3, #0 0x3418791E: F6CF 73FF MOVT R3, #0xFFFF 0x34187922: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34187926: 431A ORRS R2, R3 0x34187928: 4310 ORRS R0, R2 0x3418792A: 6008 STR R0, [R1] 0x3418792C: F000 FF4E BL LL_RCC_IC9_Enable ; 0x341887CC 0x34187930: E059 B 46L718 ; 0x341879E6
.L711: 0x34187932: 9804 LDR R0, [SP, #16] 0x34187934: F8D0 0164 LDR.W R0, [R0, #0x0164] 0x34187938: F241 4130 MOVW R1, #0x1430 0x3418793C: F2C0 7103 MOVT R1, #0x0703 0x34187940: 4288 CMP R0, R1 0x34187942: D144 BNE 46L717 ; 0x341879CE 0x34187944: 9804 LDR R0, [SP, #16] 0x34187946: 6F00 LDR R0, [R0, #112] 0x34187948: B170 CBZ R0, .L712 ; 0x34187968 0x3418794A: 9804 LDR R0, [SP, #16] 0x3418794C: 6F00 LDR R0, [R0, #112] 0x3418794E: F1B0 5F80 CMP.W R0, #0x10000000 0x34187952: D009 BEQ 46L712 ; 0x34187968 0x34187954: 9804 LDR R0, [SP, #16] 0x34187956: 6F00 LDR R0, [R0, #112] 0x34187958: F1B0 5F00 CMP.W R0, #0x20000000 0x3418795C: D004 BEQ 46L712 ; 0x34187968 0x3418795E: 9804 LDR R0, [SP, #16] 0x34187960: 6F00 LDR R0, [R0, #112] 0x34187962: F1B0 5F40 CMP.W R0, #0x30000000 0x34187966: D100 BNE 46L713 ; 0x3418796A
.L712: 0x34187968: E007 B 46L714 ; 0x3418797A
.L713: 0x3418796A: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x3418796E: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34187972: F640 010E MOVW R1, #0x080E 0x34187976: F006 F991 BL assert_failed ; 0x3418DC9C
.L714: 0x3418797A: 9804 LDR R0, [SP, #16] 0x3418797C: 6F40 LDR R0, [R0, #116] 0x3418797E: B128 CBZ R0, .L715 ; 0x3418798C 0x34187980: 9804 LDR R0, [SP, #16] 0x34187982: 6F40 LDR R0, [R0, #116] 0x34187984: F5B0 7F80 CMP.W R0, #0x0100 0x34187988: D800 BHI 46L715 ; 0x3418798C 0x3418798A: E007 B 46L716 ; 0x3418799C
.L715: 0x3418798C: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34187990: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34187994: F640 010F MOVW R1, #0x080F 0x34187998: F006 F980 BL assert_failed ; 0x3418DC9C
.L716: 0x3418799C: F248 01F8 MOVW R1, #0x80F8 0x341879A0: F2C5 6102 MOVT R1, #0x5602 0x341879A4: 6808 LDR R0, [R1] 0x341879A6: F64F 72FF MOVW R2, #0xFFFF 0x341879AA: F6CC 7200 MOVT R2, #0xCF00 0x341879AE: 4010 ANDS R0, R2 0x341879B0: 9B04 LDR R3, [SP, #16] 0x341879B2: 6F1A LDR R2, [R3, #112] 0x341879B4: F8D3 C074 LDR.W R12, [R3, #116] 0x341879B8: 2300 MOVS R3, #0 0x341879BA: F6CF 73FF MOVT R3, #0xFFFF 0x341879BE: EB03 430C ADD.W R3, R3, R12, LSL #16 0x341879C2: 431A ORRS R2, R3 0x341879C4: 4310 ORRS R0, R2 0x341879C6: 6008 STR R0, [R1] 0x341879C8: F000 FF08 BL LL_RCC_IC14_Enable ; 0x341887DC 0x341879CC: E00B B 46L718 ; 0x341879E6
.L717: 0x341879CE: 9804 LDR R0, [SP, #16] 0x341879D0: F8D0 0164 LDR.W R0, [R0, #0x0164] 0x341879D4: F241 4130 MOVW R1, #0x1430 0x341879D8: F2C0 7101 MOVT R1, #0x0701 0x341879DC: 4288 CMP R0, R1 0x341879DE: D102 BNE 46L718 ; 0x341879E6 0x341879E0: F008 FC3E BL LL_RCC_CLKP_Enable ; 0x34190260 0x341879E4: E7FF B 46L718 ; 0x341879E6
.L718: 0x341879E6: 9804 LDR R0, [SP, #16] 0x341879E8: F8D0 0164 LDR.W R0, [R0, #0x0164] 0x341879EC: F000 FF5C BL LL_RCC_SetUSARTClockSource ; 0x341888A8
.L719: 0x341879F0: 9804 LDR R0, [SP, #16] 0x341879F2: 7940 LDRB R0, [R0, #5] 0x341879F4: 0640 LSLS R0, R0, #25 0x341879F6: 2800 CMP R0, #0 0x341879F8: F140 80F5 BPL.W 46L736 ; 0x34187BE6 0x341879FC: 9804 LDR R0, [SP, #16] 0x341879FE: F8D0 0168 LDR.W R0, [R0, #0x0168] 0x34187A02: F641 0130 MOVW R1, #0x1830 0x34187A06: F2C0 7100 MOVT R1, #0x0700 0x34187A0A: 4288 CMP R0, R1 0x34187A0C: D035 BEQ 46L720 ; 0x34187A7A 0x34187A0E: 9804 LDR R0, [SP, #16] 0x34187A10: F8D0 0168 LDR.W R0, [R0, #0x0168] 0x34187A14: F641 0130 MOVW R1, #0x1830 0x34187A18: F2C0 7101 MOVT R1, #0x0701 0x34187A1C: 4288 CMP R0, R1 0x34187A1E: D02C BEQ 46L720 ; 0x34187A7A 0x34187A20: 9804 LDR R0, [SP, #16] 0x34187A22: F8D0 0168 LDR.W R0, [R0, #0x0168] 0x34187A26: F641 0130 MOVW R1, #0x1830 0x34187A2A: F2C0 7102 MOVT R1, #0x0702 0x34187A2E: 4288 CMP R0, R1 0x34187A30: D023 BEQ 46L720 ; 0x34187A7A 0x34187A32: 9804 LDR R0, [SP, #16] 0x34187A34: F8D0 0168 LDR.W R0, [R0, #0x0168] 0x34187A38: F641 0130 MOVW R1, #0x1830 0x34187A3C: F2C0 7103 MOVT R1, #0x0703 0x34187A40: 4288 CMP R0, R1 0x34187A42: D01A BEQ 46L720 ; 0x34187A7A 0x34187A44: 9804 LDR R0, [SP, #16] 0x34187A46: F8D0 0168 LDR.W R0, [R0, #0x0168] 0x34187A4A: F641 0130 MOVW R1, #0x1830 0x34187A4E: F2C0 7104 MOVT R1, #0x0704 0x34187A52: 4288 CMP R0, R1 0x34187A54: D011 BEQ 46L720 ; 0x34187A7A 0x34187A56: 9804 LDR R0, [SP, #16] 0x34187A58: F8D0 0168 LDR.W R0, [R0, #0x0168] 0x34187A5C: F641 0130 MOVW R1, #0x1830 0x34187A60: F2C0 7105 MOVT R1, #0x0705 0x34187A64: 4288 CMP R0, R1 0x34187A66: D008 BEQ 46L720 ; 0x34187A7A 0x34187A68: 9804 LDR R0, [SP, #16] 0x34187A6A: F8D0 0168 LDR.W R0, [R0, #0x0168] 0x34187A6E: F641 0130 MOVW R1, #0x1830 0x34187A72: F2C0 7106 MOVT R1, #0x0706 0x34187A76: 4288 CMP R0, R1 0x34187A78: D100 BNE 46L721 ; 0x34187A7C
.L720: 0x34187A7A: E007 B 46L722 ; 0x34187A8C
.L721: 0x34187A7C: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34187A80: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34187A84: F640 0129 MOVW R1, #0x0829 0x34187A88: F006 F908 BL assert_failed ; 0x3418DC9C
.L722: 0x34187A8C: 9804 LDR R0, [SP, #16] 0x34187A8E: F8D0 0168 LDR.W R0, [R0, #0x0168] 0x34187A92: F641 0130 MOVW R1, #0x1830 0x34187A96: F2C0 7102 MOVT R1, #0x0702 0x34187A9A: 4288 CMP R0, R1 0x34187A9C: D144 BNE 46L728 ; 0x34187B28 0x34187A9E: 9804 LDR R0, [SP, #16] 0x34187AA0: 6C80 LDR R0, [R0, #72] 0x34187AA2: B170 CBZ R0, .L723 ; 0x34187AC2 0x34187AA4: 9804 LDR R0, [SP, #16] 0x34187AA6: 6C80 LDR R0, [R0, #72] 0x34187AA8: F1B0 5F80 CMP.W R0, #0x10000000 0x34187AAC: D009 BEQ 46L723 ; 0x34187AC2 0x34187AAE: 9804 LDR R0, [SP, #16] 0x34187AB0: 6C80 LDR R0, [R0, #72] 0x34187AB2: F1B0 5F00 CMP.W R0, #0x20000000 0x34187AB6: D004 BEQ 46L723 ; 0x34187AC2 0x34187AB8: 9804 LDR R0, [SP, #16] 0x34187ABA: 6C80 LDR R0, [R0, #72] 0x34187ABC: F1B0 5F40 CMP.W R0, #0x30000000 0x34187AC0: D100 BNE 46L724 ; 0x34187AC4
.L723: 0x34187AC2: E007 B 46L725 ; 0x34187AD4
.L724: 0x34187AC4: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34187AC8: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34187ACC: F640 012E MOVW R1, #0x082E 0x34187AD0: F006 F8E4 BL assert_failed ; 0x3418DC9C
.L725: 0x34187AD4: 9804 LDR R0, [SP, #16] 0x34187AD6: 6CC0 LDR R0, [R0, #76] 0x34187AD8: B128 CBZ R0, .L726 ; 0x34187AE6 0x34187ADA: 9804 LDR R0, [SP, #16] 0x34187ADC: 6CC0 LDR R0, [R0, #76] 0x34187ADE: F5B0 7F80 CMP.W R0, #0x0100 0x34187AE2: D800 BHI 46L726 ; 0x34187AE6 0x34187AE4: E007 B 46L727 ; 0x34187AF6
.L726: 0x34187AE6: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34187AEA: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34187AEE: F640 012F MOVW R1, #0x082F 0x34187AF2: F006 F8D3 BL assert_failed ; 0x3418DC9C
.L727: 0x34187AF6: F248 01E4 MOVW R1, #0x80E4 0x34187AFA: F2C5 6102 MOVT R1, #0x5602 0x34187AFE: 6808 LDR R0, [R1] 0x34187B00: F64F 72FF MOVW R2, #0xFFFF 0x34187B04: F6CC 7200 MOVT R2, #0xCF00 0x34187B08: 4010 ANDS R0, R2 0x34187B0A: 9B04 LDR R3, [SP, #16] 0x34187B0C: 6C9A LDR R2, [R3, #72] 0x34187B0E: F8D3 C04C LDR.W R12, [R3, #76] 0x34187B12: 2300 MOVS R3, #0 0x34187B14: F6CF 73FF MOVT R3, #0xFFFF 0x34187B18: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34187B1C: 431A ORRS R2, R3 0x34187B1E: 4310 ORRS R0, R2 0x34187B20: 6008 STR R0, [R1] 0x34187B22: F000 FE53 BL LL_RCC_IC9_Enable ; 0x341887CC 0x34187B26: E059 B 46L735 ; 0x34187BDC
.L728: 0x34187B28: 9804 LDR R0, [SP, #16] 0x34187B2A: F8D0 0168 LDR.W R0, [R0, #0x0168] 0x34187B2E: F641 0130 MOVW R1, #0x1830 0x34187B32: F2C0 7103 MOVT R1, #0x0703 0x34187B36: 4288 CMP R0, R1 0x34187B38: D144 BNE 46L734 ; 0x34187BC4 0x34187B3A: 9804 LDR R0, [SP, #16] 0x34187B3C: 6F00 LDR R0, [R0, #112] 0x34187B3E: B170 CBZ R0, .L729 ; 0x34187B5E 0x34187B40: 9804 LDR R0, [SP, #16] 0x34187B42: 6F00 LDR R0, [R0, #112] 0x34187B44: F1B0 5F80 CMP.W R0, #0x10000000 0x34187B48: D009 BEQ 46L729 ; 0x34187B5E 0x34187B4A: 9804 LDR R0, [SP, #16] 0x34187B4C: 6F00 LDR R0, [R0, #112] 0x34187B4E: F1B0 5F00 CMP.W R0, #0x20000000 0x34187B52: D004 BEQ 46L729 ; 0x34187B5E 0x34187B54: 9804 LDR R0, [SP, #16] 0x34187B56: 6F00 LDR R0, [R0, #112] 0x34187B58: F1B0 5F40 CMP.W R0, #0x30000000 0x34187B5C: D100 BNE 46L730 ; 0x34187B60
.L729: 0x34187B5E: E007 B 46L731 ; 0x34187B70
.L730: 0x34187B60: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34187B64: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34187B68: F640 013B MOVW R1, #0x083B 0x34187B6C: F006 F896 BL assert_failed ; 0x3418DC9C
.L731: 0x34187B70: 9804 LDR R0, [SP, #16] 0x34187B72: 6F40 LDR R0, [R0, #116] 0x34187B74: B128 CBZ R0, .L732 ; 0x34187B82 0x34187B76: 9804 LDR R0, [SP, #16] 0x34187B78: 6F40 LDR R0, [R0, #116] 0x34187B7A: F5B0 7F80 CMP.W R0, #0x0100 0x34187B7E: D800 BHI 46L732 ; 0x34187B82 0x34187B80: E007 B 46L733 ; 0x34187B92
.L732: 0x34187B82: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34187B86: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34187B8A: F640 013C MOVW R1, #0x083C 0x34187B8E: F006 F885 BL assert_failed ; 0x3418DC9C
.L733: 0x34187B92: F248 01F8 MOVW R1, #0x80F8 0x34187B96: F2C5 6102 MOVT R1, #0x5602 0x34187B9A: 6808 LDR R0, [R1] 0x34187B9C: F64F 72FF MOVW R2, #0xFFFF 0x34187BA0: F6CC 7200 MOVT R2, #0xCF00 0x34187BA4: 4010 ANDS R0, R2 0x34187BA6: 9B04 LDR R3, [SP, #16] 0x34187BA8: 6F1A LDR R2, [R3, #112] 0x34187BAA: F8D3 C074 LDR.W R12, [R3, #116] 0x34187BAE: 2300 MOVS R3, #0 0x34187BB0: F6CF 73FF MOVT R3, #0xFFFF 0x34187BB4: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34187BB8: 431A ORRS R2, R3 0x34187BBA: 4310 ORRS R0, R2 0x34187BBC: 6008 STR R0, [R1] 0x34187BBE: F000 FE0D BL LL_RCC_IC14_Enable ; 0x341887DC 0x34187BC2: E00B B 46L735 ; 0x34187BDC
.L734: 0x34187BC4: 9804 LDR R0, [SP, #16] 0x34187BC6: F8D0 0168 LDR.W R0, [R0, #0x0168] 0x34187BCA: F641 0130 MOVW R1, #0x1830 0x34187BCE: F2C0 7101 MOVT R1, #0x0701 0x34187BD2: 4288 CMP R0, R1 0x34187BD4: D102 BNE 46L735 ; 0x34187BDC 0x34187BD6: F008 FB43 BL LL_RCC_CLKP_Enable ; 0x34190260 0x34187BDA: E7FF B 46L735 ; 0x34187BDC
.L735: 0x34187BDC: 9804 LDR R0, [SP, #16] 0x34187BDE: F8D0 0168 LDR.W R0, [R0, #0x0168] 0x34187BE2: F000 FE61 BL LL_RCC_SetUSARTClockSource ; 0x341888A8
.L736: 0x34187BE6: 9804 LDR R0, [SP, #16] 0x34187BE8: 7940 LDRB R0, [R0, #5] 0x34187BEA: 0600 LSLS R0, R0, #24 0x34187BEC: 2800 CMP R0, #0 0x34187BEE: F140 80F5 BPL.W 46L753 ; 0x34187DDC 0x34187BF2: 9804 LDR R0, [SP, #16] 0x34187BF4: F8D0 016C LDR.W R0, [R0, #0x016C] 0x34187BF8: F641 4130 MOVW R1, #0x1C30 0x34187BFC: F2C0 7100 MOVT R1, #0x0700 0x34187C00: 4288 CMP R0, R1 0x34187C02: D035 BEQ 46L737 ; 0x34187C70 0x34187C04: 9804 LDR R0, [SP, #16] 0x34187C06: F8D0 016C LDR.W R0, [R0, #0x016C] 0x34187C0A: F641 4130 MOVW R1, #0x1C30 0x34187C0E: F2C0 7101 MOVT R1, #0x0701 0x34187C12: 4288 CMP R0, R1 0x34187C14: D02C BEQ 46L737 ; 0x34187C70 0x34187C16: 9804 LDR R0, [SP, #16] 0x34187C18: F8D0 016C LDR.W R0, [R0, #0x016C] 0x34187C1C: F641 4130 MOVW R1, #0x1C30 0x34187C20: F2C0 7102 MOVT R1, #0x0702 0x34187C24: 4288 CMP R0, R1 0x34187C26: D023 BEQ 46L737 ; 0x34187C70 0x34187C28: 9804 LDR R0, [SP, #16] 0x34187C2A: F8D0 016C LDR.W R0, [R0, #0x016C] 0x34187C2E: F641 4130 MOVW R1, #0x1C30 0x34187C32: F2C0 7103 MOVT R1, #0x0703 0x34187C36: 4288 CMP R0, R1 0x34187C38: D01A BEQ 46L737 ; 0x34187C70 0x34187C3A: 9804 LDR R0, [SP, #16] 0x34187C3C: F8D0 016C LDR.W R0, [R0, #0x016C] 0x34187C40: F641 4130 MOVW R1, #0x1C30 0x34187C44: F2C0 7104 MOVT R1, #0x0704 0x34187C48: 4288 CMP R0, R1 0x34187C4A: D011 BEQ 46L737 ; 0x34187C70 0x34187C4C: 9804 LDR R0, [SP, #16] 0x34187C4E: F8D0 016C LDR.W R0, [R0, #0x016C] 0x34187C52: F641 4130 MOVW R1, #0x1C30 0x34187C56: F2C0 7105 MOVT R1, #0x0705 0x34187C5A: 4288 CMP R0, R1 0x34187C5C: D008 BEQ 46L737 ; 0x34187C70 0x34187C5E: 9804 LDR R0, [SP, #16] 0x34187C60: F8D0 016C LDR.W R0, [R0, #0x016C] 0x34187C64: F641 4130 MOVW R1, #0x1C30 0x34187C68: F2C0 7106 MOVT R1, #0x0706 0x34187C6C: 4288 CMP R0, R1 0x34187C6E: D100 BNE 46L738 ; 0x34187C72
.L737: 0x34187C70: E007 B 46L739 ; 0x34187C82
.L738: 0x34187C72: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34187C76: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34187C7A: F640 0156 MOVW R1, #0x0856 0x34187C7E: F006 F80D BL assert_failed ; 0x3418DC9C
.L739: 0x34187C82: 9804 LDR R0, [SP, #16] 0x34187C84: F8D0 016C LDR.W R0, [R0, #0x016C] 0x34187C88: F641 4130 MOVW R1, #0x1C30 0x34187C8C: F2C0 7102 MOVT R1, #0x0702 0x34187C90: 4288 CMP R0, R1 0x34187C92: D144 BNE 46L745 ; 0x34187D1E 0x34187C94: 9804 LDR R0, [SP, #16] 0x34187C96: 6C80 LDR R0, [R0, #72] 0x34187C98: B170 CBZ R0, .L740 ; 0x34187CB8 0x34187C9A: 9804 LDR R0, [SP, #16] 0x34187C9C: 6C80 LDR R0, [R0, #72] 0x34187C9E: F1B0 5F80 CMP.W R0, #0x10000000 0x34187CA2: D009 BEQ 46L740 ; 0x34187CB8 0x34187CA4: 9804 LDR R0, [SP, #16] 0x34187CA6: 6C80 LDR R0, [R0, #72] 0x34187CA8: F1B0 5F00 CMP.W R0, #0x20000000 0x34187CAC: D004 BEQ 46L740 ; 0x34187CB8 0x34187CAE: 9804 LDR R0, [SP, #16] 0x34187CB0: 6C80 LDR R0, [R0, #72] 0x34187CB2: F1B0 5F40 CMP.W R0, #0x30000000 0x34187CB6: D100 BNE 46L741 ; 0x34187CBA
.L740: 0x34187CB8: E007 B 46L742 ; 0x34187CCA
.L741: 0x34187CBA: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34187CBE: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34187CC2: F640 015B MOVW R1, #0x085B 0x34187CC6: F005 FFE9 BL assert_failed ; 0x3418DC9C
.L742: 0x34187CCA: 9804 LDR R0, [SP, #16] 0x34187CCC: 6CC0 LDR R0, [R0, #76] 0x34187CCE: B128 CBZ R0, .L743 ; 0x34187CDC 0x34187CD0: 9804 LDR R0, [SP, #16] 0x34187CD2: 6CC0 LDR R0, [R0, #76] 0x34187CD4: F5B0 7F80 CMP.W R0, #0x0100 0x34187CD8: D800 BHI 46L743 ; 0x34187CDC 0x34187CDA: E007 B 46L744 ; 0x34187CEC
.L743: 0x34187CDC: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34187CE0: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34187CE4: F640 015C MOVW R1, #0x085C 0x34187CE8: F005 FFD8 BL assert_failed ; 0x3418DC9C
.L744: 0x34187CEC: F248 01E4 MOVW R1, #0x80E4 0x34187CF0: F2C5 6102 MOVT R1, #0x5602 0x34187CF4: 6808 LDR R0, [R1] 0x34187CF6: F64F 72FF MOVW R2, #0xFFFF 0x34187CFA: F6CC 7200 MOVT R2, #0xCF00 0x34187CFE: 4010 ANDS R0, R2 0x34187D00: 9B04 LDR R3, [SP, #16] 0x34187D02: 6C9A LDR R2, [R3, #72] 0x34187D04: F8D3 C04C LDR.W R12, [R3, #76] 0x34187D08: 2300 MOVS R3, #0 0x34187D0A: F6CF 73FF MOVT R3, #0xFFFF 0x34187D0E: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34187D12: 431A ORRS R2, R3 0x34187D14: 4310 ORRS R0, R2 0x34187D16: 6008 STR R0, [R1] 0x34187D18: F000 FD58 BL LL_RCC_IC9_Enable ; 0x341887CC 0x34187D1C: E059 B 46L752 ; 0x34187DD2
.L745: 0x34187D1E: 9804 LDR R0, [SP, #16] 0x34187D20: F8D0 016C LDR.W R0, [R0, #0x016C] 0x34187D24: F641 4130 MOVW R1, #0x1C30 0x34187D28: F2C0 7103 MOVT R1, #0x0703 0x34187D2C: 4288 CMP R0, R1 0x34187D2E: D144 BNE 46L751 ; 0x34187DBA 0x34187D30: 9804 LDR R0, [SP, #16] 0x34187D32: 6F00 LDR R0, [R0, #112] 0x34187D34: B170 CBZ R0, .L746 ; 0x34187D54 0x34187D36: 9804 LDR R0, [SP, #16] 0x34187D38: 6F00 LDR R0, [R0, #112] 0x34187D3A: F1B0 5F80 CMP.W R0, #0x10000000 0x34187D3E: D009 BEQ 46L746 ; 0x34187D54 0x34187D40: 9804 LDR R0, [SP, #16] 0x34187D42: 6F00 LDR R0, [R0, #112] 0x34187D44: F1B0 5F00 CMP.W R0, #0x20000000 0x34187D48: D004 BEQ 46L746 ; 0x34187D54 0x34187D4A: 9804 LDR R0, [SP, #16] 0x34187D4C: 6F00 LDR R0, [R0, #112] 0x34187D4E: F1B0 5F40 CMP.W R0, #0x30000000 0x34187D52: D100 BNE 46L747 ; 0x34187D56
.L746: 0x34187D54: E007 B 46L748 ; 0x34187D66
.L747: 0x34187D56: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34187D5A: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34187D5E: F640 0168 MOVW R1, #0x0868 0x34187D62: F005 FF9B BL assert_failed ; 0x3418DC9C
.L748: 0x34187D66: 9804 LDR R0, [SP, #16] 0x34187D68: 6F40 LDR R0, [R0, #116] 0x34187D6A: B128 CBZ R0, .L749 ; 0x34187D78 0x34187D6C: 9804 LDR R0, [SP, #16] 0x34187D6E: 6F40 LDR R0, [R0, #116] 0x34187D70: F5B0 7F80 CMP.W R0, #0x0100 0x34187D74: D800 BHI 46L749 ; 0x34187D78 0x34187D76: E007 B 46L750 ; 0x34187D88
.L749: 0x34187D78: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34187D7C: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34187D80: F640 0169 MOVW R1, #0x0869 0x34187D84: F005 FF8A BL assert_failed ; 0x3418DC9C
.L750: 0x34187D88: F248 01F8 MOVW R1, #0x80F8 0x34187D8C: F2C5 6102 MOVT R1, #0x5602 0x34187D90: 6808 LDR R0, [R1] 0x34187D92: F64F 72FF MOVW R2, #0xFFFF 0x34187D96: F6CC 7200 MOVT R2, #0xCF00 0x34187D9A: 4010 ANDS R0, R2 0x34187D9C: 9B04 LDR R3, [SP, #16] 0x34187D9E: 6F1A LDR R2, [R3, #112] 0x34187DA0: F8D3 C074 LDR.W R12, [R3, #116] 0x34187DA4: 2300 MOVS R3, #0 0x34187DA6: F6CF 73FF MOVT R3, #0xFFFF 0x34187DAA: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34187DAE: 431A ORRS R2, R3 0x34187DB0: 4310 ORRS R0, R2 0x34187DB2: 6008 STR R0, [R1] 0x34187DB4: F000 FD12 BL LL_RCC_IC14_Enable ; 0x341887DC 0x34187DB8: E00B B 46L752 ; 0x34187DD2
.L751: 0x34187DBA: 9804 LDR R0, [SP, #16] 0x34187DBC: F8D0 016C LDR.W R0, [R0, #0x016C] 0x34187DC0: F641 4130 MOVW R1, #0x1C30 0x34187DC4: F2C0 7101 MOVT R1, #0x0701 0x34187DC8: 4288 CMP R0, R1 0x34187DCA: D102 BNE 46L752 ; 0x34187DD2 0x34187DCC: F008 FA48 BL LL_RCC_CLKP_Enable ; 0x34190260 0x34187DD0: E7FF B 46L752 ; 0x34187DD2
.L752: 0x34187DD2: 9804 LDR R0, [SP, #16] 0x34187DD4: F8D0 016C LDR.W R0, [R0, #0x016C] 0x34187DD8: F000 FD66 BL LL_RCC_SetUSARTClockSource ; 0x341888A8
.L753: 0x34187DDC: 9804 LDR R0, [SP, #16] 0x34187DDE: 7980 LDRB R0, [R0, #6] 0x34187DE0: 07C0 LSLS R0, R0, #31 0x34187DE2: 2800 CMP R0, #0 0x34187DE4: F000 80EB BEQ.W 46L770 ; 0x34187FBE 0x34187DE8: 9804 LDR R0, [SP, #16] 0x34187DEA: F8D0 0170 LDR.W R0, [R0, #0x0170] 0x34187DEE: 2134 MOVS R1, #52 0x34187DF0: F2C0 7100 MOVT R1, #0x0700 0x34187DF4: 4288 CMP R0, R1 0x34187DF6: D02F BEQ 46L754 ; 0x34187E58 0x34187DF8: 9804 LDR R0, [SP, #16] 0x34187DFA: F8D0 0170 LDR.W R0, [R0, #0x0170] 0x34187DFE: 2134 MOVS R1, #52 0x34187E00: F2C0 7101 MOVT R1, #0x0701 0x34187E04: 4288 CMP R0, R1 0x34187E06: D027 BEQ 46L754 ; 0x34187E58 0x34187E08: 9804 LDR R0, [SP, #16] 0x34187E0A: F8D0 0170 LDR.W R0, [R0, #0x0170] 0x34187E0E: 2134 MOVS R1, #52 0x34187E10: F2C0 7102 MOVT R1, #0x0702 0x34187E14: 4288 CMP R0, R1 0x34187E16: D01F BEQ 46L754 ; 0x34187E58 0x34187E18: 9804 LDR R0, [SP, #16] 0x34187E1A: F8D0 0170 LDR.W R0, [R0, #0x0170] 0x34187E1E: 2134 MOVS R1, #52 0x34187E20: F2C0 7103 MOVT R1, #0x0703 0x34187E24: 4288 CMP R0, R1 0x34187E26: D017 BEQ 46L754 ; 0x34187E58 0x34187E28: 9804 LDR R0, [SP, #16] 0x34187E2A: F8D0 0170 LDR.W R0, [R0, #0x0170] 0x34187E2E: 2134 MOVS R1, #52 0x34187E30: F2C0 7104 MOVT R1, #0x0704 0x34187E34: 4288 CMP R0, R1 0x34187E36: D00F BEQ 46L754 ; 0x34187E58 0x34187E38: 9804 LDR R0, [SP, #16] 0x34187E3A: F8D0 0170 LDR.W R0, [R0, #0x0170] 0x34187E3E: 2134 MOVS R1, #52 0x34187E40: F2C0 7105 MOVT R1, #0x0705 0x34187E44: 4288 CMP R0, R1 0x34187E46: D007 BEQ 46L754 ; 0x34187E58 0x34187E48: 9804 LDR R0, [SP, #16] 0x34187E4A: F8D0 0170 LDR.W R0, [R0, #0x0170] 0x34187E4E: 2134 MOVS R1, #52 0x34187E50: F2C0 7106 MOVT R1, #0x0706 0x34187E54: 4288 CMP R0, R1 0x34187E56: D100 BNE 46L755 ; 0x34187E5A
.L754: 0x34187E58: E007 B 46L756 ; 0x34187E6A
.L755: 0x34187E5A: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34187E5E: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34187E62: F640 0183 MOVW R1, #0x0883 0x34187E66: F005 FF19 BL assert_failed ; 0x3418DC9C
.L756: 0x34187E6A: 9804 LDR R0, [SP, #16] 0x34187E6C: F8D0 0170 LDR.W R0, [R0, #0x0170] 0x34187E70: 2134 MOVS R1, #52 0x34187E72: F2C0 7102 MOVT R1, #0x0702 0x34187E76: 4288 CMP R0, R1 0x34187E78: D144 BNE 46L762 ; 0x34187F04 0x34187E7A: 9804 LDR R0, [SP, #16] 0x34187E7C: 6C80 LDR R0, [R0, #72] 0x34187E7E: B170 CBZ R0, .L757 ; 0x34187E9E 0x34187E80: 9804 LDR R0, [SP, #16] 0x34187E82: 6C80 LDR R0, [R0, #72] 0x34187E84: F1B0 5F80 CMP.W R0, #0x10000000 0x34187E88: D009 BEQ 46L757 ; 0x34187E9E 0x34187E8A: 9804 LDR R0, [SP, #16] 0x34187E8C: 6C80 LDR R0, [R0, #72] 0x34187E8E: F1B0 5F00 CMP.W R0, #0x20000000 0x34187E92: D004 BEQ 46L757 ; 0x34187E9E 0x34187E94: 9804 LDR R0, [SP, #16] 0x34187E96: 6C80 LDR R0, [R0, #72] 0x34187E98: F1B0 5F40 CMP.W R0, #0x30000000 0x34187E9C: D100 BNE 46L758 ; 0x34187EA0
.L757: 0x34187E9E: E007 B 46L759 ; 0x34187EB0
.L758: 0x34187EA0: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34187EA4: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34187EA8: F640 0188 MOVW R1, #0x0888 0x34187EAC: F005 FEF6 BL assert_failed ; 0x3418DC9C
.L759: 0x34187EB0: 9804 LDR R0, [SP, #16] 0x34187EB2: 6CC0 LDR R0, [R0, #76] 0x34187EB4: B128 CBZ R0, .L760 ; 0x34187EC2 0x34187EB6: 9804 LDR R0, [SP, #16] 0x34187EB8: 6CC0 LDR R0, [R0, #76] 0x34187EBA: F5B0 7F80 CMP.W R0, #0x0100 0x34187EBE: D800 BHI 46L760 ; 0x34187EC2 0x34187EC0: E007 B 46L761 ; 0x34187ED2
.L760: 0x34187EC2: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34187EC6: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34187ECA: F640 0189 MOVW R1, #0x0889 0x34187ECE: F005 FEE5 BL assert_failed ; 0x3418DC9C
.L761: 0x34187ED2: F248 01E4 MOVW R1, #0x80E4 0x34187ED6: F2C5 6102 MOVT R1, #0x5602 0x34187EDA: 6808 LDR R0, [R1] 0x34187EDC: F64F 72FF MOVW R2, #0xFFFF 0x34187EE0: F6CC 7200 MOVT R2, #0xCF00 0x34187EE4: 4010 ANDS R0, R2 0x34187EE6: 9B04 LDR R3, [SP, #16] 0x34187EE8: 6C9A LDR R2, [R3, #72] 0x34187EEA: F8D3 C04C LDR.W R12, [R3, #76] 0x34187EEE: 2300 MOVS R3, #0 0x34187EF0: F6CF 73FF MOVT R3, #0xFFFF 0x34187EF4: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34187EF8: 431A ORRS R2, R3 0x34187EFA: 4310 ORRS R0, R2 0x34187EFC: 6008 STR R0, [R1] 0x34187EFE: F000 FC65 BL LL_RCC_IC9_Enable ; 0x341887CC 0x34187F02: E057 B 46L769 ; 0x34187FB4
.L762: 0x34187F04: 9804 LDR R0, [SP, #16] 0x34187F06: F8D0 0170 LDR.W R0, [R0, #0x0170] 0x34187F0A: 2134 MOVS R1, #52 0x34187F0C: F2C0 7103 MOVT R1, #0x0703 0x34187F10: 4288 CMP R0, R1 0x34187F12: D144 BNE 46L768 ; 0x34187F9E 0x34187F14: 9804 LDR R0, [SP, #16] 0x34187F16: 6F00 LDR R0, [R0, #112] 0x34187F18: B170 CBZ R0, .L763 ; 0x34187F38 0x34187F1A: 9804 LDR R0, [SP, #16] 0x34187F1C: 6F00 LDR R0, [R0, #112] 0x34187F1E: F1B0 5F80 CMP.W R0, #0x10000000 0x34187F22: D009 BEQ 46L763 ; 0x34187F38 0x34187F24: 9804 LDR R0, [SP, #16] 0x34187F26: 6F00 LDR R0, [R0, #112] 0x34187F28: F1B0 5F00 CMP.W R0, #0x20000000 0x34187F2C: D004 BEQ 46L763 ; 0x34187F38 0x34187F2E: 9804 LDR R0, [SP, #16] 0x34187F30: 6F00 LDR R0, [R0, #112] 0x34187F32: F1B0 5F40 CMP.W R0, #0x30000000 0x34187F36: D100 BNE 46L764 ; 0x34187F3A
.L763: 0x34187F38: E007 B 46L765 ; 0x34187F4A
.L764: 0x34187F3A: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34187F3E: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34187F42: F640 0195 MOVW R1, #0x0895 0x34187F46: F005 FEA9 BL assert_failed ; 0x3418DC9C
.L765: 0x34187F4A: 9804 LDR R0, [SP, #16] 0x34187F4C: 6F40 LDR R0, [R0, #116] 0x34187F4E: B128 CBZ R0, .L766 ; 0x34187F5C 0x34187F50: 9804 LDR R0, [SP, #16] 0x34187F52: 6F40 LDR R0, [R0, #116] 0x34187F54: F5B0 7F80 CMP.W R0, #0x0100 0x34187F58: D800 BHI 46L766 ; 0x34187F5C 0x34187F5A: E007 B 46L767 ; 0x34187F6C
.L766: 0x34187F5C: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34187F60: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34187F64: F640 0196 MOVW R1, #0x0896 0x34187F68: F005 FE98 BL assert_failed ; 0x3418DC9C
.L767: 0x34187F6C: F248 01F8 MOVW R1, #0x80F8 0x34187F70: F2C5 6102 MOVT R1, #0x5602 0x34187F74: 6808 LDR R0, [R1] 0x34187F76: F64F 72FF MOVW R2, #0xFFFF 0x34187F7A: F6CC 7200 MOVT R2, #0xCF00 0x34187F7E: 4010 ANDS R0, R2 0x34187F80: 9B04 LDR R3, [SP, #16] 0x34187F82: 6F1A LDR R2, [R3, #112] 0x34187F84: F8D3 C074 LDR.W R12, [R3, #116] 0x34187F88: 2300 MOVS R3, #0 0x34187F8A: F6CF 73FF MOVT R3, #0xFFFF 0x34187F8E: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34187F92: 431A ORRS R2, R3 0x34187F94: 4310 ORRS R0, R2 0x34187F96: 6008 STR R0, [R1] 0x34187F98: F000 FC20 BL LL_RCC_IC14_Enable ; 0x341887DC 0x34187F9C: E00A B 46L769 ; 0x34187FB4
.L768: 0x34187F9E: 9804 LDR R0, [SP, #16] 0x34187FA0: F8D0 0170 LDR.W R0, [R0, #0x0170] 0x34187FA4: 2134 MOVS R1, #52 0x34187FA6: F2C0 7101 MOVT R1, #0x0701 0x34187FAA: 4288 CMP R0, R1 0x34187FAC: D102 BNE 46L769 ; 0x34187FB4 0x34187FAE: F008 F957 BL LL_RCC_CLKP_Enable ; 0x34190260 0x34187FB2: E7FF B 46L769 ; 0x34187FB4
.L769: 0x34187FB4: 9804 LDR R0, [SP, #16] 0x34187FB6: F8D0 0170 LDR.W R0, [R0, #0x0170] 0x34187FBA: F000 FC75 BL LL_RCC_SetUSARTClockSource ; 0x341888A8
.L770: 0x34187FBE: 9804 LDR R0, [SP, #16] 0x34187FC0: 7980 LDRB R0, [R0, #6] 0x34187FC2: 0780 LSLS R0, R0, #30 0x34187FC4: 2800 CMP R0, #0 0x34187FC6: F140 80F5 BPL.W 46L787 ; 0x341881B4 0x34187FCA: 9804 LDR R0, [SP, #16] 0x34187FCC: F8D0 0174 LDR.W R0, [R0, #0x0174] 0x34187FD0: F240 4134 MOVW R1, #0x0434 0x34187FD4: F2C0 7100 MOVT R1, #0x0700 0x34187FD8: 4288 CMP R0, R1 0x34187FDA: D035 BEQ 46L771 ; 0x34188048 0x34187FDC: 9804 LDR R0, [SP, #16] 0x34187FDE: F8D0 0174 LDR.W R0, [R0, #0x0174] 0x34187FE2: F240 4134 MOVW R1, #0x0434 0x34187FE6: F2C0 7101 MOVT R1, #0x0701 0x34187FEA: 4288 CMP R0, R1 0x34187FEC: D02C BEQ 46L771 ; 0x34188048 0x34187FEE: 9804 LDR R0, [SP, #16] 0x34187FF0: F8D0 0174 LDR.W R0, [R0, #0x0174] 0x34187FF4: F240 4134 MOVW R1, #0x0434 0x34187FF8: F2C0 7102 MOVT R1, #0x0702 0x34187FFC: 4288 CMP R0, R1 0x34187FFE: D023 BEQ 46L771 ; 0x34188048 0x34188000: 9804 LDR R0, [SP, #16] 0x34188002: F8D0 0174 LDR.W R0, [R0, #0x0174] 0x34188006: F240 4134 MOVW R1, #0x0434 0x3418800A: F2C0 7103 MOVT R1, #0x0703 0x3418800E: 4288 CMP R0, R1 0x34188010: D01A BEQ 46L771 ; 0x34188048 0x34188012: 9804 LDR R0, [SP, #16] 0x34188014: F8D0 0174 LDR.W R0, [R0, #0x0174] 0x34188018: F240 4134 MOVW R1, #0x0434 0x3418801C: F2C0 7104 MOVT R1, #0x0704 0x34188020: 4288 CMP R0, R1 0x34188022: D011 BEQ 46L771 ; 0x34188048 0x34188024: 9804 LDR R0, [SP, #16] 0x34188026: F8D0 0174 LDR.W R0, [R0, #0x0174] 0x3418802A: F240 4134 MOVW R1, #0x0434 0x3418802E: F2C0 7105 MOVT R1, #0x0705 0x34188032: 4288 CMP R0, R1 0x34188034: D008 BEQ 46L771 ; 0x34188048 0x34188036: 9804 LDR R0, [SP, #16] 0x34188038: F8D0 0174 LDR.W R0, [R0, #0x0174] 0x3418803C: F240 4134 MOVW R1, #0x0434 0x34188040: F2C0 7106 MOVT R1, #0x0706 0x34188044: 4288 CMP R0, R1 0x34188046: D100 BNE 46L772 ; 0x3418804A
.L771: 0x34188048: E007 B 46L773 ; 0x3418805A
.L772: 0x3418804A: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x3418804E: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34188052: F44F 610B MOV.W R1, #0x08B0 0x34188056: F005 FE21 BL assert_failed ; 0x3418DC9C
.L773: 0x3418805A: 9804 LDR R0, [SP, #16] 0x3418805C: F8D0 0174 LDR.W R0, [R0, #0x0174] 0x34188060: F240 4134 MOVW R1, #0x0434 0x34188064: F2C0 7102 MOVT R1, #0x0702 0x34188068: 4288 CMP R0, R1 0x3418806A: D144 BNE 46L779 ; 0x341880F6 0x3418806C: 9804 LDR R0, [SP, #16] 0x3418806E: 6C80 LDR R0, [R0, #72] 0x34188070: B170 CBZ R0, .L774 ; 0x34188090 0x34188072: 9804 LDR R0, [SP, #16] 0x34188074: 6C80 LDR R0, [R0, #72] 0x34188076: F1B0 5F80 CMP.W R0, #0x10000000 0x3418807A: D009 BEQ 46L774 ; 0x34188090 0x3418807C: 9804 LDR R0, [SP, #16] 0x3418807E: 6C80 LDR R0, [R0, #72] 0x34188080: F1B0 5F00 CMP.W R0, #0x20000000 0x34188084: D004 BEQ 46L774 ; 0x34188090 0x34188086: 9804 LDR R0, [SP, #16] 0x34188088: 6C80 LDR R0, [R0, #72] 0x3418808A: F1B0 5F40 CMP.W R0, #0x30000000 0x3418808E: D100 BNE 46L775 ; 0x34188092
.L774: 0x34188090: E007 B 46L776 ; 0x341880A2
.L775: 0x34188092: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34188096: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x3418809A: F640 01B5 MOVW R1, #0x08B5 0x3418809E: F005 FDFD BL assert_failed ; 0x3418DC9C
.L776: 0x341880A2: 9804 LDR R0, [SP, #16] 0x341880A4: 6CC0 LDR R0, [R0, #76] 0x341880A6: B128 CBZ R0, .L777 ; 0x341880B4 0x341880A8: 9804 LDR R0, [SP, #16] 0x341880AA: 6CC0 LDR R0, [R0, #76] 0x341880AC: F5B0 7F80 CMP.W R0, #0x0100 0x341880B0: D800 BHI 46L777 ; 0x341880B4 0x341880B2: E007 B 46L778 ; 0x341880C4
.L777: 0x341880B4: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341880B8: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341880BC: F640 01B6 MOVW R1, #0x08B6 0x341880C0: F005 FDEC BL assert_failed ; 0x3418DC9C
.L778: 0x341880C4: F248 01E4 MOVW R1, #0x80E4 0x341880C8: F2C5 6102 MOVT R1, #0x5602 0x341880CC: 6808 LDR R0, [R1] 0x341880CE: F64F 72FF MOVW R2, #0xFFFF 0x341880D2: F6CC 7200 MOVT R2, #0xCF00 0x341880D6: 4010 ANDS R0, R2 0x341880D8: 9B04 LDR R3, [SP, #16] 0x341880DA: 6C9A LDR R2, [R3, #72] 0x341880DC: F8D3 C04C LDR.W R12, [R3, #76] 0x341880E0: 2300 MOVS R3, #0 0x341880E2: F6CF 73FF MOVT R3, #0xFFFF 0x341880E6: EB03 430C ADD.W R3, R3, R12, LSL #16 0x341880EA: 431A ORRS R2, R3 0x341880EC: 4310 ORRS R0, R2 0x341880EE: 6008 STR R0, [R1] 0x341880F0: F000 FB6C BL LL_RCC_IC9_Enable ; 0x341887CC 0x341880F4: E059 B 46L786 ; 0x341881AA
.L779: 0x341880F6: 9804 LDR R0, [SP, #16] 0x341880F8: F8D0 0174 LDR.W R0, [R0, #0x0174] 0x341880FC: F240 4134 MOVW R1, #0x0434 0x34188100: F2C0 7103 MOVT R1, #0x0703 0x34188104: 4288 CMP R0, R1 0x34188106: D144 BNE 46L785 ; 0x34188192 0x34188108: 9804 LDR R0, [SP, #16] 0x3418810A: 6F00 LDR R0, [R0, #112] 0x3418810C: B170 CBZ R0, .L780 ; 0x3418812C 0x3418810E: 9804 LDR R0, [SP, #16] 0x34188110: 6F00 LDR R0, [R0, #112] 0x34188112: F1B0 5F80 CMP.W R0, #0x10000000 0x34188116: D009 BEQ 46L780 ; 0x3418812C 0x34188118: 9804 LDR R0, [SP, #16] 0x3418811A: 6F00 LDR R0, [R0, #112] 0x3418811C: F1B0 5F00 CMP.W R0, #0x20000000 0x34188120: D004 BEQ 46L780 ; 0x3418812C 0x34188122: 9804 LDR R0, [SP, #16] 0x34188124: 6F00 LDR R0, [R0, #112] 0x34188126: F1B0 5F40 CMP.W R0, #0x30000000 0x3418812A: D100 BNE 46L781 ; 0x3418812E
.L780: 0x3418812C: E007 B 46L782 ; 0x3418813E
.L781: 0x3418812E: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34188132: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34188136: F640 01C2 MOVW R1, #0x08C2 0x3418813A: F005 FDAF BL assert_failed ; 0x3418DC9C
.L782: 0x3418813E: 9804 LDR R0, [SP, #16] 0x34188140: 6F40 LDR R0, [R0, #116] 0x34188142: B128 CBZ R0, .L783 ; 0x34188150 0x34188144: 9804 LDR R0, [SP, #16] 0x34188146: 6F40 LDR R0, [R0, #116] 0x34188148: F5B0 7F80 CMP.W R0, #0x0100 0x3418814C: D800 BHI 46L783 ; 0x34188150 0x3418814E: E007 B 46L784 ; 0x34188160
.L783: 0x34188150: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34188154: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34188158: F640 01C3 MOVW R1, #0x08C3 0x3418815C: F005 FD9E BL assert_failed ; 0x3418DC9C
.L784: 0x34188160: F248 01F8 MOVW R1, #0x80F8 0x34188164: F2C5 6102 MOVT R1, #0x5602 0x34188168: 6808 LDR R0, [R1] 0x3418816A: F64F 72FF MOVW R2, #0xFFFF 0x3418816E: F6CC 7200 MOVT R2, #0xCF00 0x34188172: 4010 ANDS R0, R2 0x34188174: 9B04 LDR R3, [SP, #16] 0x34188176: 6F1A LDR R2, [R3, #112] 0x34188178: F8D3 C074 LDR.W R12, [R3, #116] 0x3418817C: 2300 MOVS R3, #0 0x3418817E: F6CF 73FF MOVT R3, #0xFFFF 0x34188182: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34188186: 431A ORRS R2, R3 0x34188188: 4310 ORRS R0, R2 0x3418818A: 6008 STR R0, [R1] 0x3418818C: F000 FB26 BL LL_RCC_IC14_Enable ; 0x341887DC 0x34188190: E00B B 46L786 ; 0x341881AA
.L785: 0x34188192: 9804 LDR R0, [SP, #16] 0x34188194: F8D0 0174 LDR.W R0, [R0, #0x0174] 0x34188198: F240 4134 MOVW R1, #0x0434 0x3418819C: F2C0 7101 MOVT R1, #0x0701 0x341881A0: 4288 CMP R0, R1 0x341881A2: D102 BNE 46L786 ; 0x341881AA 0x341881A4: F008 F85C BL LL_RCC_CLKP_Enable ; 0x34190260 0x341881A8: E7FF B 46L786 ; 0x341881AA
.L786: 0x341881AA: 9804 LDR R0, [SP, #16] 0x341881AC: F8D0 0174 LDR.W R0, [R0, #0x0174] 0x341881B0: F000 FB7A BL LL_RCC_SetUSARTClockSource ; 0x341888A8
.L787: 0x341881B4: 9804 LDR R0, [SP, #16] 0x341881B6: 7980 LDRB R0, [R0, #6] 0x341881B8: 0740 LSLS R0, R0, #29 0x341881BA: 2800 CMP R0, #0 0x341881BC: F140 80A2 BPL.W 46L799 ; 0x34188304 0x341881C0: 9804 LDR R0, [SP, #16] 0x341881C2: F8D0 0178 LDR.W R0, [R0, #0x0178] 0x341881C6: F640 4114 MOVW R1, #0x0C14 0x341881CA: F2C0 3100 MOVT R1, #0x0300 0x341881CE: 4288 CMP R0, R1 0x341881D0: D023 BEQ 46L788 ; 0x3418821A 0x341881D2: 9804 LDR R0, [SP, #16] 0x341881D4: F8D0 0178 LDR.W R0, [R0, #0x0178] 0x341881D8: F640 4114 MOVW R1, #0x0C14 0x341881DC: F2C0 3101 MOVT R1, #0x0301 0x341881E0: 4288 CMP R0, R1 0x341881E2: D01A BEQ 46L788 ; 0x3418821A 0x341881E4: 9804 LDR R0, [SP, #16] 0x341881E6: F8D0 0178 LDR.W R0, [R0, #0x0178] 0x341881EA: F640 4114 MOVW R1, #0x0C14 0x341881EE: F2C0 3102 MOVT R1, #0x0302 0x341881F2: 4288 CMP R0, R1 0x341881F4: D011 BEQ 46L788 ; 0x3418821A 0x341881F6: 9804 LDR R0, [SP, #16] 0x341881F8: F8D0 0178 LDR.W R0, [R0, #0x0178] 0x341881FC: F640 4114 MOVW R1, #0x0C14 0x34188200: F2C0 3103 MOVT R1, #0x0303 0x34188204: 4288 CMP R0, R1 0x34188206: D008 BEQ 46L788 ; 0x3418821A 0x34188208: 9804 LDR R0, [SP, #16] 0x3418820A: F8D0 0178 LDR.W R0, [R0, #0x0178] 0x3418820E: F640 4114 MOVW R1, #0x0C14 0x34188212: F2C8 3103 MOVT R1, #0x8303 0x34188216: 4288 CMP R0, R1 0x34188218: D100 BNE 46L789 ; 0x3418821C
.L788: 0x3418821A: E007 B 46L790 ; 0x3418822C
.L789: 0x3418821C: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34188220: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34188224: F640 01DD MOVW R1, #0x08DD 0x34188228: F005 FD38 BL assert_failed ; 0x3418DC9C
.L790: 0x3418822C: 9804 LDR R0, [SP, #16] 0x3418822E: F8D0 0178 LDR.W R0, [R0, #0x0178] 0x34188232: F640 4114 MOVW R1, #0x0C14 0x34188236: F2C0 3102 MOVT R1, #0x0302 0x3418823A: 4288 CMP R0, R1 0x3418823C: D144 BNE 46L796 ; 0x341882C8 0x3418823E: 9804 LDR R0, [SP, #16] 0x34188240: 6F80 LDR R0, [R0, #120] 0x34188242: B170 CBZ R0, .L791 ; 0x34188262 0x34188244: 9804 LDR R0, [SP, #16] 0x34188246: 6F80 LDR R0, [R0, #120] 0x34188248: F1B0 5F80 CMP.W R0, #0x10000000 0x3418824C: D009 BEQ 46L791 ; 0x34188262 0x3418824E: 9804 LDR R0, [SP, #16] 0x34188250: 6F80 LDR R0, [R0, #120] 0x34188252: F1B0 5F00 CMP.W R0, #0x20000000 0x34188256: D004 BEQ 46L791 ; 0x34188262 0x34188258: 9804 LDR R0, [SP, #16] 0x3418825A: 6F80 LDR R0, [R0, #120] 0x3418825C: F1B0 5F40 CMP.W R0, #0x30000000 0x34188260: D100 BNE 46L792 ; 0x34188264
.L791: 0x34188262: E007 B 46L793 ; 0x34188274
.L792: 0x34188264: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34188268: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x3418826C: F640 01E2 MOVW R1, #0x08E2 0x34188270: F005 FD14 BL assert_failed ; 0x3418DC9C
.L793: 0x34188274: 9804 LDR R0, [SP, #16] 0x34188276: 6FC0 LDR R0, [R0, #124] 0x34188278: B128 CBZ R0, .L794 ; 0x34188286 0x3418827A: 9804 LDR R0, [SP, #16] 0x3418827C: 6FC0 LDR R0, [R0, #124] 0x3418827E: F5B0 7F80 CMP.W R0, #0x0100 0x34188282: D800 BHI 46L794 ; 0x34188286 0x34188284: E007 B 46L795 ; 0x34188296
.L794: 0x34188286: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x3418828A: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x3418828E: F640 01E3 MOVW R1, #0x08E3 0x34188292: F005 FD03 BL assert_failed ; 0x3418DC9C
.L795: 0x34188296: F248 01FC MOVW R1, #0x80FC 0x3418829A: F2C5 6102 MOVT R1, #0x5602 0x3418829E: 6808 LDR R0, [R1] 0x341882A0: F64F 72FF MOVW R2, #0xFFFF 0x341882A4: F6CC 7200 MOVT R2, #0xCF00 0x341882A8: 4010 ANDS R0, R2 0x341882AA: 9B04 LDR R3, [SP, #16] 0x341882AC: 6F9A LDR R2, [R3, #120] 0x341882AE: F8D3 C07C LDR.W R12, [R3, #124] 0x341882B2: 2300 MOVS R3, #0 0x341882B4: F6CF 73FF MOVT R3, #0xFFFF 0x341882B8: EB03 430C ADD.W R3, R3, R12, LSL #16 0x341882BC: 431A ORRS R2, R3 0x341882BE: 4310 ORRS R0, R2 0x341882C0: 6008 STR R0, [R1] 0x341882C2: F000 F9A5 BL LL_RCC_IC15_Enable.62 ; 0x34188610 0x341882C6: E00B B 46L797 ; 0x341882E0
.L796: 0x341882C8: 9804 LDR R0, [SP, #16] 0x341882CA: F8D0 0178 LDR.W R0, [R0, #0x0178] 0x341882CE: F640 4114 MOVW R1, #0x0C14 0x341882D2: F2C0 3101 MOVT R1, #0x0301 0x341882D6: 4288 CMP R0, R1 0x341882D8: D102 BNE 46L797 ; 0x341882E0 0x341882DA: F007 FFC1 BL LL_RCC_CLKP_Enable ; 0x34190260 0x341882DE: E7FF B 46L797 ; 0x341882E0
.L797: 0x341882E0: 9804 LDR R0, [SP, #16] 0x341882E2: F8D0 0178 LDR.W R0, [R0, #0x0178] 0x341882E6: F020 4000 BIC R0, R0, #0x80000000 0x341882EA: F000 FAE5 BL LL_RCC_SetOTGPHYClockSource ; 0x341888B8 0x341882EE: 9804 LDR R0, [SP, #16] 0x341882F0: F8D0 0178 LDR.W R0, [R0, #0x0178] 0x341882F4: 0FC0 LSRS R0, R0, #31 0x341882F6: 2801 CMP R0, #1 0x341882F8: D102 BNE 46L798 ; 0x34188300 0x341882FA: F007 FFC9 BL LL_RCC_HSE_SelectHSEDiv2AsDiv2Clock ; 0x34190290 0x341882FE: E001 B 46L799 ; 0x34188304
.L798: 0x34188300: F007 FFD0 BL LL_RCC_HSE_SelectHSEAsDiv2Clock ; 0x341902A4
.L799: 0x34188304: 9804 LDR R0, [SP, #16] 0x34188306: 7980 LDRB R0, [R0, #6] 0x34188308: 06C0 LSLS R0, R0, #27 0x3418830A: 2800 CMP R0, #0 0x3418830C: F140 80A2 BPL.W 46L811 ; 0x34188454 0x34188310: 9804 LDR R0, [SP, #16] 0x34188312: F8D0 0180 LDR.W R0, [R0, #0x0180] 0x34188316: F241 4114 MOVW R1, #0x1414 0x3418831A: F2C0 3100 MOVT R1, #0x0300 0x3418831E: 4288 CMP R0, R1 0x34188320: D023 BEQ 46L800 ; 0x3418836A 0x34188322: 9804 LDR R0, [SP, #16] 0x34188324: F8D0 0180 LDR.W R0, [R0, #0x0180] 0x34188328: F241 4114 MOVW R1, #0x1414 0x3418832C: F2C0 3101 MOVT R1, #0x0301 0x34188330: 4288 CMP R0, R1 0x34188332: D01A BEQ 46L800 ; 0x3418836A 0x34188334: 9804 LDR R0, [SP, #16] 0x34188336: F8D0 0180 LDR.W R0, [R0, #0x0180] 0x3418833A: F241 4114 MOVW R1, #0x1414 0x3418833E: F2C0 3102 MOVT R1, #0x0302 0x34188342: 4288 CMP R0, R1 0x34188344: D011 BEQ 46L800 ; 0x3418836A 0x34188346: 9804 LDR R0, [SP, #16] 0x34188348: F8D0 0180 LDR.W R0, [R0, #0x0180] 0x3418834C: F241 4114 MOVW R1, #0x1414 0x34188350: F2C0 3103 MOVT R1, #0x0303 0x34188354: 4288 CMP R0, R1 0x34188356: D008 BEQ 46L800 ; 0x3418836A 0x34188358: 9804 LDR R0, [SP, #16] 0x3418835A: F8D0 0180 LDR.W R0, [R0, #0x0180] 0x3418835E: F241 4114 MOVW R1, #0x1414 0x34188362: F2C8 3103 MOVT R1, #0x8303 0x34188366: 4288 CMP R0, R1 0x34188368: D100 BNE 46L801 ; 0x3418836C
.L800: 0x3418836A: E007 B 46L802 ; 0x3418837C
.L801: 0x3418836C: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34188370: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34188374: F640 01FD MOVW R1, #0x08FD 0x34188378: F005 FC90 BL assert_failed ; 0x3418DC9C
.L802: 0x3418837C: 9804 LDR R0, [SP, #16] 0x3418837E: F8D0 0180 LDR.W R0, [R0, #0x0180] 0x34188382: F241 4114 MOVW R1, #0x1414 0x34188386: F2C0 3102 MOVT R1, #0x0302 0x3418838A: 4288 CMP R0, R1 0x3418838C: D144 BNE 46L808 ; 0x34188418 0x3418838E: 9804 LDR R0, [SP, #16] 0x34188390: 6F80 LDR R0, [R0, #120] 0x34188392: B170 CBZ R0, .L803 ; 0x341883B2 0x34188394: 9804 LDR R0, [SP, #16] 0x34188396: 6F80 LDR R0, [R0, #120] 0x34188398: F1B0 5F80 CMP.W R0, #0x10000000 0x3418839C: D009 BEQ 46L803 ; 0x341883B2 0x3418839E: 9804 LDR R0, [SP, #16] 0x341883A0: 6F80 LDR R0, [R0, #120] 0x341883A2: F1B0 5F00 CMP.W R0, #0x20000000 0x341883A6: D004 BEQ 46L803 ; 0x341883B2 0x341883A8: 9804 LDR R0, [SP, #16] 0x341883AA: 6F80 LDR R0, [R0, #120] 0x341883AC: F1B0 5F40 CMP.W R0, #0x30000000 0x341883B0: D100 BNE 46L804 ; 0x341883B4
.L803: 0x341883B2: E007 B 46L805 ; 0x341883C4
.L804: 0x341883B4: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341883B8: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341883BC: F640 1102 MOVW R1, #0x0902 0x341883C0: F005 FC6C BL assert_failed ; 0x3418DC9C
.L805: 0x341883C4: 9804 LDR R0, [SP, #16] 0x341883C6: 6FC0 LDR R0, [R0, #124] 0x341883C8: B128 CBZ R0, .L806 ; 0x341883D6 0x341883CA: 9804 LDR R0, [SP, #16] 0x341883CC: 6FC0 LDR R0, [R0, #124] 0x341883CE: F5B0 7F80 CMP.W R0, #0x0100 0x341883D2: D800 BHI 46L806 ; 0x341883D6 0x341883D4: E007 B 46L807 ; 0x341883E6
.L806: 0x341883D6: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x341883DA: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x341883DE: F640 1103 MOVW R1, #0x0903 0x341883E2: F005 FC5B BL assert_failed ; 0x3418DC9C
.L807: 0x341883E6: F248 01FC MOVW R1, #0x80FC 0x341883EA: F2C5 6102 MOVT R1, #0x5602 0x341883EE: 6808 LDR R0, [R1] 0x341883F0: F64F 72FF MOVW R2, #0xFFFF 0x341883F4: F6CC 7200 MOVT R2, #0xCF00 0x341883F8: 4010 ANDS R0, R2 0x341883FA: 9B04 LDR R3, [SP, #16] 0x341883FC: 6F9A LDR R2, [R3, #120] 0x341883FE: F8D3 C07C LDR.W R12, [R3, #124] 0x34188402: 2300 MOVS R3, #0 0x34188404: F6CF 73FF MOVT R3, #0xFFFF 0x34188408: EB03 430C ADD.W R3, R3, R12, LSL #16 0x3418840C: 431A ORRS R2, R3 0x3418840E: 4310 ORRS R0, R2 0x34188410: 6008 STR R0, [R1] 0x34188412: F000 F8FD BL LL_RCC_IC15_Enable.62 ; 0x34188610 0x34188416: E00B B 46L809 ; 0x34188430
.L808: 0x34188418: 9804 LDR R0, [SP, #16] 0x3418841A: F8D0 0180 LDR.W R0, [R0, #0x0180] 0x3418841E: F241 4114 MOVW R1, #0x1414 0x34188422: F2C0 3101 MOVT R1, #0x0301 0x34188426: 4288 CMP R0, R1 0x34188428: D102 BNE 46L809 ; 0x34188430 0x3418842A: F007 FF19 BL LL_RCC_CLKP_Enable ; 0x34190260 0x3418842E: E7FF B 46L809 ; 0x34188430
.L809: 0x34188430: 9804 LDR R0, [SP, #16] 0x34188432: F8D0 0180 LDR.W R0, [R0, #0x0180] 0x34188436: F020 4000 BIC R0, R0, #0x80000000 0x3418843A: F000 FA3D BL LL_RCC_SetOTGPHYClockSource ; 0x341888B8 0x3418843E: 9804 LDR R0, [SP, #16] 0x34188440: F8D0 0180 LDR.W R0, [R0, #0x0180] 0x34188444: 0FC0 LSRS R0, R0, #31 0x34188446: 2801 CMP R0, #1 0x34188448: D102 BNE 46L810 ; 0x34188450 0x3418844A: F007 FF21 BL LL_RCC_HSE_SelectHSEDiv2AsDiv2Clock ; 0x34190290 0x3418844E: E001 B 46L811 ; 0x34188454
.L810: 0x34188450: F007 FF28 BL LL_RCC_HSE_SelectHSEAsDiv2Clock ; 0x341902A4
.L811: 0x34188454: 9804 LDR R0, [SP, #16] 0x34188456: 7980 LDRB R0, [R0, #6] 0x34188458: 0700 LSLS R0, R0, #28 0x3418845A: 2800 CMP R0, #0 0x3418845C: D535 BPL 46L816 ; 0x341884CA 0x3418845E: 9804 LDR R0, [SP, #16] 0x34188460: F8D0 017C LDR.W R0, [R0, #0x017C] 0x34188464: F241 0114 MOVW R1, #0x1014 0x34188468: F2C0 1100 MOVT R1, #0x0100 0x3418846C: 4288 CMP R0, R1 0x3418846E: D011 BEQ 46L812 ; 0x34188494 0x34188470: 9804 LDR R0, [SP, #16] 0x34188472: F8D0 017C LDR.W R0, [R0, #0x017C] 0x34188476: F241 0114 MOVW R1, #0x1014 0x3418847A: F2C0 1101 MOVT R1, #0x0101 0x3418847E: 4288 CMP R0, R1 0x34188480: D008 BEQ 46L812 ; 0x34188494 0x34188482: 9804 LDR R0, [SP, #16] 0x34188484: F8D0 017C LDR.W R0, [R0, #0x017C] 0x34188488: F241 0114 MOVW R1, #0x1014 0x3418848C: F2C8 1101 MOVT R1, #0x8101 0x34188490: 4288 CMP R0, R1 0x34188492: D100 BNE 46L813 ; 0x34188496
.L812: 0x34188494: E007 B 46L814 ; 0x341884A6
.L813: 0x34188496: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x3418849A: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x3418849E: F640 111D MOVW R1, #0x091D 0x341884A2: F005 FBFB BL assert_failed ; 0x3418DC9C
.L814: 0x341884A6: 9804 LDR R0, [SP, #16] 0x341884A8: F8D0 017C LDR.W R0, [R0, #0x017C] 0x341884AC: F020 4000 BIC R0, R0, #0x80000000 0x341884B0: F000 FA0A BL LL_RCC_SetOTGPHYCKREFClockSource ; 0x341888C8 0x341884B4: 9804 LDR R0, [SP, #16] 0x341884B6: F8D0 017C LDR.W R0, [R0, #0x017C] 0x341884BA: 0FC0 LSRS R0, R0, #31 0x341884BC: 2801 CMP R0, #1 0x341884BE: D102 BNE 46L815 ; 0x341884C6 0x341884C0: F007 FEE6 BL LL_RCC_HSE_SelectHSEDiv2AsDiv2Clock ; 0x34190290 0x341884C4: E001 B 46L816 ; 0x341884CA
.L815: 0x341884C6: F007 FEED BL LL_RCC_HSE_SelectHSEAsDiv2Clock ; 0x341902A4
.L816: 0x341884CA: 9804 LDR R0, [SP, #16] 0x341884CC: 7980 LDRB R0, [R0, #6] 0x341884CE: 0680 LSLS R0, R0, #26 0x341884D0: 2800 CMP R0, #0 0x341884D2: D535 BPL 46L821 ; 0x34188540 0x341884D4: 9804 LDR R0, [SP, #16] 0x341884D6: F8D0 0184 LDR.W R0, [R0, #0x0184] 0x341884DA: F641 0114 MOVW R1, #0x1814 0x341884DE: F2C0 1100 MOVT R1, #0x0100 0x341884E2: 4288 CMP R0, R1 0x341884E4: D011 BEQ 46L817 ; 0x3418850A 0x341884E6: 9804 LDR R0, [SP, #16] 0x341884E8: F8D0 0184 LDR.W R0, [R0, #0x0184] 0x341884EC: F641 0114 MOVW R1, #0x1814 0x341884F0: F2C0 1101 MOVT R1, #0x0101 0x341884F4: 4288 CMP R0, R1 0x341884F6: D008 BEQ 46L817 ; 0x3418850A 0x341884F8: 9804 LDR R0, [SP, #16] 0x341884FA: F8D0 0184 LDR.W R0, [R0, #0x0184] 0x341884FE: F641 0114 MOVW R1, #0x1814 0x34188502: F2C8 1101 MOVT R1, #0x8101 0x34188506: 4288 CMP R0, R1 0x34188508: D100 BNE 46L818 ; 0x3418850C
.L817: 0x3418850A: E007 B 46L819 ; 0x3418851C
.L818: 0x3418850C: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34188510: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x34188514: F640 1127 MOVW R1, #0x0927 0x34188518: F005 FBC0 BL assert_failed ; 0x3418DC9C
.L819: 0x3418851C: 9804 LDR R0, [SP, #16] 0x3418851E: F8D0 0184 LDR.W R0, [R0, #0x0184] 0x34188522: F020 4000 BIC R0, R0, #0x80000000 0x34188526: F000 F9CF BL LL_RCC_SetOTGPHYCKREFClockSource ; 0x341888C8 0x3418852A: 9804 LDR R0, [SP, #16] 0x3418852C: F8D0 0184 LDR.W R0, [R0, #0x0184] 0x34188530: 0FC0 LSRS R0, R0, #31 0x34188532: 2801 CMP R0, #1 0x34188534: D102 BNE 46L820 ; 0x3418853C 0x34188536: F007 FEAB BL LL_RCC_HSE_SelectHSEDiv2AsDiv2Clock ; 0x34190290 0x3418853A: E001 B 46L821 ; 0x34188540
.L820: 0x3418853C: F007 FEB2 BL LL_RCC_HSE_SelectHSEAsDiv2Clock ; 0x341902A4
.L821: 0x34188540: 9804 LDR R0, [SP, #16] 0x34188542: 7900 LDRB R0, [R0, #4] 0x34188544: 0600 LSLS R0, R0, #24 0x34188546: 2800 CMP R0, #0 0x34188548: D520 BPL 46L825 ; 0x3418858C 0x3418854A: 9804 LDR R0, [SP, #16] 0x3418854C: F8D0 018C LDR.W R0, [R0, #0x018C] 0x34188550: B170 CBZ R0, .L822 ; 0x34188570 0x34188552: 9804 LDR R0, [SP, #16] 0x34188554: F8D0 018C LDR.W R0, [R0, #0x018C] 0x34188558: 2801 CMP R0, #1 0x3418855A: D009 BEQ 46L822 ; 0x34188570 0x3418855C: 9804 LDR R0, [SP, #16] 0x3418855E: F8D0 018C LDR.W R0, [R0, #0x018C] 0x34188562: 2802 CMP R0, #2 0x34188564: D004 BEQ 46L822 ; 0x34188570 0x34188566: 9804 LDR R0, [SP, #16] 0x34188568: F8D0 018C LDR.W R0, [R0, #0x018C] 0x3418856C: 2803 CMP R0, #3 0x3418856E: D100 BNE 46L823 ; 0x34188572
.L822: 0x34188570: E007 B 46L824 ; 0x34188582
.L823: 0x34188572: F244 5014 MOVW R0, #0x4514 ; 0x34194514 = .rodata..L.str.58 0x34188576: F2C3 4019 MOVT R0, #0x3419 ; 0x34194514 = .rodata..L.str.58 0x3418857A: F640 1131 MOVW R1, #0x0931 0x3418857E: F005 FB8D BL assert_failed ; 0x3418DC9C
.L824: 0x34188582: 9804 LDR R0, [SP, #16] 0x34188584: F8D0 018C LDR.W R0, [R0, #0x018C] 0x34188588: F007 FE96 BL LL_RCC_SetTIMPrescaler ; 0x341902B8
.L825: 0x3418858C: F89D 0006 LDRB.W R0, [SP, #6] 0x34188590: B918 CBNZ R0, .L826 ; 0x3418859A 0x34188592: 2000 MOVS R0, #0 0x34188594: F88D 0017 STRB.W R0, [SP, #23] 0x34188598: E002 B 46L827 ; 0x341885A0
.L826: 0x3418859A: 2001 MOVS R0, #1 0x3418859C: F88D 0017 STRB.W R0, [SP, #23]
.L827: 0x341885A0: F89D 0017 LDRB.W R0, [SP, #23] 0x341885A4: B006 ADD SP, SP, #24 0x341885A6: BD80 POP 123R7, PC}

Section .text.LL_RCC_GetRTCClockSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_GetRTCClockSource: 0x341885A8: F248 105C MOVW R0, #0x815C 0x341885AC: F2C5 6002 MOVT R0, #0x5602 0x341885B0: 6800 LDR R0, [R0] 0x341885B2: F400 7040 AND R0, R0, #0x0300 0x341885B6: 4770 BX LR

Section .text.LL_RCC_LSE_IsReady.59 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_LSE_IsReady.59: 0x341885B8: F248 0004 MOVW R0, #0x8004 0x341885BC: F2C5 6002 MOVT R0, #0x5602 0x341885C0: 6800 LDR R0, [R0] 0x341885C2: F3C0 0040 UBFX R0, R0, #1, #1 0x341885C6: 4770 BX LR

Section .text.LL_RCC_SetRTC_HSEPrescaler from blto2_FSBL_lto.o, size=28, align=4


LL_RCC_SetRTC_HSEPrescaler: 0x341885C8: B081 SUB SP, SP, #4 0x341885CA: 9000 STR R0, [SP, #0] 0x341885CC: F248 115C MOVW R1, #0x815C 0x341885D0: F2C5 6102 MOVT R1, #0x5602 0x341885D4: 6808 LDR R0, [R1] 0x341885D6: F420 307C BIC R0, R0, #0x03F000 0x341885DA: 9A00 LDR R2, [SP, #0] 0x341885DC: 4310 ORRS R0, R2 0x341885DE: 6008 STR R0, [R1] 0x341885E0: B001 ADD SP, SP, #4 0x341885E2: 4770 BX LR

Section .text.LL_RCC_SetRTCClockSource from blto2_FSBL_lto.o, size=28, align=4


LL_RCC_SetRTCClockSource: 0x341885E4: B081 SUB SP, SP, #4 0x341885E6: 9000 STR R0, [SP, #0] 0x341885E8: F248 115C MOVW R1, #0x815C 0x341885EC: F2C5 6102 MOVT R1, #0x5602 0x341885F0: 6808 LDR R0, [R1] 0x341885F2: F420 7040 BIC R0, R0, #0x0300 0x341885F6: 9A00 LDR R2, [SP, #0] 0x341885F8: 4310 ORRS R0, R2 0x341885FA: 6008 STR R0, [R1] 0x341885FC: B001 ADD SP, SP, #4 0x341885FE: 4770 BX LR

Section .text.LL_RCC_IC10_Enable.61 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC10_Enable.61: 0x34188600: F648 2140 MOVW R1, #0x8A40 0x34188604: F2C5 6102 MOVT R1, #0x5602 0x34188608: F44F 7000 MOV.W R0, #0x0200 0x3418860C: 6008 STR R0, [R1] 0x3418860E: 4770 BX LR

Section .text.LL_RCC_IC15_Enable.62 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC15_Enable.62: 0x34188610: F648 2140 MOVW R1, #0x8A40 0x34188614: F2C5 6102 MOVT R1, #0x5602 0x34188618: F44F 4080 MOV.W R0, #0x4000 0x3418861C: 6008 STR R0, [R1] 0x3418861E: 4770 BX LR

Section .text.LL_RCC_IC19_Enable from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC19_Enable: 0x34188620: F648 2140 MOVW R1, #0x8A40 0x34188624: F2C5 6102 MOVT R1, #0x5602 0x34188628: F44F 2080 MOV.W R0, #0x040000 0x3418862C: 6008 STR R0, [R1] 0x3418862E: 4770 BX LR

Section .text.LL_RCC_IC20_Enable.63 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC20_Enable.63: 0x34188630: F648 2140 MOVW R1, #0x8A40 0x34188634: F2C5 6102 MOVT R1, #0x5602 0x34188638: F44F 2000 MOV.W R0, #0x080000 0x3418863C: 6008 STR R0, [R1] 0x3418863E: 4770 BX LR

Section .text.LL_RCC_SetCLKPClockSource from blto2_FSBL_lto.o, size=28, align=4


LL_RCC_SetCLKPClockSource: 0x34188640: B081 SUB SP, SP, #4 0x34188642: 9000 STR R0, [SP, #0] 0x34188644: F248 115C MOVW R1, #0x815C 0x34188648: F2C5 6102 MOVT R1, #0x5602 0x3418864C: 6808 LDR R0, [R1] 0x3418864E: F020 0007 BIC R0, R0, #7 0x34188652: 9A00 LDR R2, [SP, #0] 0x34188654: 4310 ORRS R0, R2 0x34188656: 6008 STR R0, [R1] 0x34188658: B001 ADD SP, SP, #4 0x3418865A: 4770 BX LR

Section .text.LL_RCC_SetXSPIClockSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_SetXSPIClockSource: 0x3418865C: B580 PUSH 123R7, LR} 0x3418865E: B082 SUB SP, SP, #8 0x34188660: 9001 STR R0, [SP, #4] 0x34188662: 9801 LDR R0, [SP, #4] 0x34188664: F000 F938 BL LL_RCC_SetClockSource ; 0x341888D8 0x34188668: B002 ADD SP, SP, #8 0x3418866A: BD80 POP 123R7, PC}

Section .text.LL_RCC_SetFMCClockSource from blto2_FSBL_lto.o, size=28, align=4


LL_RCC_SetFMCClockSource: 0x3418866C: B081 SUB SP, SP, #4 0x3418866E: 9000 STR R0, [SP, #0] 0x34188670: F248 114C MOVW R1, #0x814C 0x34188674: F2C5 6102 MOVT R1, #0x5602 0x34188678: 6808 LDR R0, [R1] 0x3418867A: F020 0030 BIC R0, R0, #48 0x3418867E: 9A00 LDR R2, [SP, #0] 0x34188680: 4310 ORRS R0, R2 0x34188682: 6008 STR R0, [R1] 0x34188684: B001 ADD SP, SP, #4 0x34188686: 4770 BX LR

Section .text.LL_RCC_SetSDMMCClockSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_SetSDMMCClockSource: 0x34188688: B580 PUSH 123R7, LR} 0x3418868A: B082 SUB SP, SP, #8 0x3418868C: 9001 STR R0, [SP, #4] 0x3418868E: 9801 LDR R0, [SP, #4] 0x34188690: F000 F922 BL LL_RCC_SetClockSource ; 0x341888D8 0x34188694: B002 ADD SP, SP, #8 0x34188696: BD80 POP 123R7, PC}

Section .text.LL_RCC_SetADFClockSource from blto2_FSBL_lto.o, size=28, align=4


LL_RCC_SetADFClockSource: 0x34188698: B081 SUB SP, SP, #4 0x3418869A: 9000 STR R0, [SP, #0] 0x3418869C: F248 1144 MOVW R1, #0x8144 0x341886A0: F2C5 6102 MOVT R1, #0x5602 0x341886A4: 6808 LDR R0, [R1] 0x341886A6: F020 0007 BIC R0, R0, #7 0x341886AA: 9A00 LDR R2, [SP, #0] 0x341886AC: 4310 ORRS R0, R2 0x341886AE: 6008 STR R0, [R1] 0x341886B0: B001 ADD SP, SP, #4 0x341886B2: 4770 BX LR

Section .text.LL_RCC_IC18_Enable from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC18_Enable: 0x341886B4: F648 2140 MOVW R1, #0x8A40 0x341886B8: F2C5 6102 MOVT R1, #0x5602 0x341886BC: F44F 3000 MOV.W R0, #0x020000 0x341886C0: 6008 STR R0, [R1] 0x341886C2: 4770 BX LR

Section .text.LL_RCC_IC17_Enable from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC17_Enable: 0x341886C4: F648 2140 MOVW R1, #0x8A40 0x341886C8: F2C5 6102 MOVT R1, #0x5602 0x341886CC: F44F 3080 MOV.W R0, #0x010000 0x341886D0: 6008 STR R0, [R1] 0x341886D2: 4770 BX LR

Section .text.LL_RCC_SetDCMIPPClockSource from blto2_FSBL_lto.o, size=28, align=4


LL_RCC_SetDCMIPPClockSource: 0x341886D4: B081 SUB SP, SP, #4 0x341886D6: 9000 STR R0, [SP, #0] 0x341886D8: F248 1144 MOVW R1, #0x8144 0x341886DC: F2C5 6102 MOVT R1, #0x5602 0x341886E0: 6808 LDR R0, [R1] 0x341886E2: F420 1040 BIC R0, R0, #0x300000 0x341886E6: 9A00 LDR R2, [SP, #0] 0x341886E8: 4310 ORRS R0, R2 0x341886EA: 6008 STR R0, [R1] 0x341886EC: B001 ADD SP, SP, #4 0x341886EE: 4770 BX LR

Section .text.LL_RCC_IC12_Enable from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC12_Enable: 0x341886F0: F648 2140 MOVW R1, #0x8A40 0x341886F4: F2C5 6102 MOVT R1, #0x5602 0x341886F8: F44F 6000 MOV.W R0, #0x0800 0x341886FC: 6008 STR R0, [R1] 0x341886FE: 4770 BX LR

Section .text.LL_RCC_SetETHClockSource from blto2_FSBL_lto.o, size=28, align=4


LL_RCC_SetETHClockSource: 0x34188700: B081 SUB SP, SP, #4 0x34188702: 9000 STR R0, [SP, #0] 0x34188704: F248 1148 MOVW R1, #0x8148 0x34188708: F2C5 6102 MOVT R1, #0x5602 0x3418870C: 6808 LDR R0, [R1] 0x3418870E: F420 5040 BIC R0, R0, #0x3000 0x34188712: 9A00 LDR R2, [SP, #0] 0x34188714: 4310 ORRS R0, R2 0x34188716: 6008 STR R0, [R1] 0x34188718: B001 ADD SP, SP, #4 0x3418871A: 4770 BX LR

Section .text.LL_RCC_SetETHPHYInterface from blto2_FSBL_lto.o, size=28, align=4


LL_RCC_SetETHPHYInterface: 0x3418871C: B081 SUB SP, SP, #4 0x3418871E: 9000 STR R0, [SP, #0] 0x34188720: F248 1148 MOVW R1, #0x8148 0x34188724: F2C5 6102 MOVT R1, #0x5602 0x34188728: 6808 LDR R0, [R1] 0x3418872A: F420 20E0 BIC R0, R0, #0x070000 0x3418872E: 9A00 LDR R2, [SP, #0] 0x34188730: 4310 ORRS R0, R2 0x34188732: 6008 STR R0, [R1] 0x34188734: B001 ADD SP, SP, #4 0x34188736: 4770 BX LR

Section .text.LL_RCC_SetETHREFRXClockSource from blto2_FSBL_lto.o, size=28, align=4


LL_RCC_SetETHREFRXClockSource: 0x34188738: B081 SUB SP, SP, #4 0x3418873A: 9000 STR R0, [SP, #0] 0x3418873C: F248 1148 MOVW R1, #0x8148 0x34188740: F2C5 6102 MOVT R1, #0x5602 0x34188744: 6808 LDR R0, [R1] 0x34188746: F420 1080 BIC R0, R0, #0x100000 0x3418874A: 9A00 LDR R2, [SP, #0] 0x3418874C: 4310 ORRS R0, R2 0x3418874E: 6008 STR R0, [R1] 0x34188750: B001 ADD SP, SP, #4 0x34188752: 4770 BX LR

Section .text.LL_RCC_SetETHREFTXClockSource from blto2_FSBL_lto.o, size=28, align=4


LL_RCC_SetETHREFTXClockSource: 0x34188754: B081 SUB SP, SP, #4 0x34188756: 9000 STR R0, [SP, #0] 0x34188758: F248 1148 MOVW R1, #0x8148 0x3418875C: F2C5 6102 MOVT R1, #0x5602 0x34188760: 6808 LDR R0, [R1] 0x34188762: F020 7080 BIC R0, R0, #0x01000000 0x34188766: 9A00 LDR R2, [SP, #0] 0x34188768: 4310 ORRS R0, R2 0x3418876A: 6008 STR R0, [R1] 0x3418876C: B001 ADD SP, SP, #4 0x3418876E: 4770 BX LR

Section .text.LL_RCC_IC13_Enable from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC13_Enable: 0x34188770: F648 2140 MOVW R1, #0x8A40 0x34188774: F2C5 6102 MOVT R1, #0x5602 0x34188778: F44F 5080 MOV.W R0, #0x1000 0x3418877C: 6008 STR R0, [R1] 0x3418877E: 4770 BX LR

Section .text.LL_RCC_SetFDCANClockSource from blto2_FSBL_lto.o, size=28, align=4


LL_RCC_SetFDCANClockSource: 0x34188780: B081 SUB SP, SP, #4 0x34188782: 9000 STR R0, [SP, #0] 0x34188784: F248 114C MOVW R1, #0x814C 0x34188788: F2C5 6102 MOVT R1, #0x5602 0x3418878C: 6808 LDR R0, [R1] 0x3418878E: F020 0003 BIC R0, R0, #3 0x34188792: 9A00 LDR R2, [SP, #0] 0x34188794: 4310 ORRS R0, R2 0x34188796: 6008 STR R0, [R1] 0x34188798: B001 ADD SP, SP, #4 0x3418879A: 4770 BX LR

Section .text.LL_RCC_SetI2CClockSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_SetI2CClockSource: 0x3418879C: B580 PUSH 123R7, LR} 0x3418879E: B082 SUB SP, SP, #8 0x341887A0: 9001 STR R0, [SP, #4] 0x341887A2: 9801 LDR R0, [SP, #4] 0x341887A4: F000 F898 BL LL_RCC_SetClockSource ; 0x341888D8 0x341887A8: B002 ADD SP, SP, #8 0x341887AA: BD80 POP 123R7, PC}

Section .text.LL_RCC_SetI3CClockSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_SetI3CClockSource: 0x341887AC: B580 PUSH 123R7, LR} 0x341887AE: B082 SUB SP, SP, #8 0x341887B0: 9001 STR R0, [SP, #4] 0x341887B2: 9801 LDR R0, [SP, #4] 0x341887B4: F000 F890 BL LL_RCC_SetClockSource ; 0x341888D8 0x341887B8: B002 ADD SP, SP, #8 0x341887BA: BD80 POP 123R7, PC}

Section .text.LL_RCC_SetLPTIMClockSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_SetLPTIMClockSource: 0x341887BC: B580 PUSH 123R7, LR} 0x341887BE: B082 SUB SP, SP, #8 0x341887C0: 9001 STR R0, [SP, #4] 0x341887C2: 9801 LDR R0, [SP, #4] 0x341887C4: F000 F888 BL LL_RCC_SetClockSource ; 0x341888D8 0x341887C8: B002 ADD SP, SP, #8 0x341887CA: BD80 POP 123R7, PC}

Section .text.LL_RCC_IC9_Enable from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC9_Enable: 0x341887CC: F648 2140 MOVW R1, #0x8A40 0x341887D0: F2C5 6102 MOVT R1, #0x5602 0x341887D4: F44F 7080 MOV.W R0, #0x0100 0x341887D8: 6008 STR R0, [R1] 0x341887DA: 4770 BX LR

Section .text.LL_RCC_IC14_Enable from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC14_Enable: 0x341887DC: F648 2140 MOVW R1, #0x8A40 0x341887E0: F2C5 6102 MOVT R1, #0x5602 0x341887E4: F44F 5000 MOV.W R0, #0x2000 0x341887E8: 6008 STR R0, [R1] 0x341887EA: 4770 BX LR

Section .text.LL_RCC_SetLPUARTClockSource from blto2_FSBL_lto.o, size=28, align=4


LL_RCC_SetLPUARTClockSource: 0x341887EC: B081 SUB SP, SP, #4 0x341887EE: 9000 STR R0, [SP, #0] 0x341887F0: F248 1178 MOVW R1, #0x8178 0x341887F4: F2C5 6102 MOVT R1, #0x5602 0x341887F8: 6808 LDR R0, [R1] 0x341887FA: F420 60E0 BIC R0, R0, #0x0700 0x341887FE: 9A00 LDR R2, [SP, #0] 0x34188800: 4310 ORRS R0, R2 0x34188802: 6008 STR R0, [R1] 0x34188804: B001 ADD SP, SP, #4 0x34188806: 4770 BX LR

Section .text.LL_RCC_IC16_Enable from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC16_Enable: 0x34188808: F648 2140 MOVW R1, #0x8A40 0x3418880C: F2C5 6102 MOVT R1, #0x5602 0x34188810: F44F 4000 MOV.W R0, #0x8000 0x34188814: 6008 STR R0, [R1] 0x34188816: 4770 BX LR

Section .text.LL_RCC_SetLTDCClockSource from blto2_FSBL_lto.o, size=28, align=4


LL_RCC_SetLTDCClockSource: 0x34188818: B081 SUB SP, SP, #4 0x3418881A: 9000 STR R0, [SP, #0] 0x3418881C: F248 1150 MOVW R1, #0x8150 0x34188820: F2C5 6102 MOVT R1, #0x5602 0x34188824: 6808 LDR R0, [R1] 0x34188826: F020 7040 BIC R0, R0, #0x03000000 0x3418882A: 9A00 LDR R2, [SP, #0] 0x3418882C: 4310 ORRS R0, R2 0x3418882E: 6008 STR R0, [R1] 0x34188830: B001 ADD SP, SP, #4 0x34188832: 4770 BX LR

Section .text.LL_RCC_SetMDFClockSource from blto2_FSBL_lto.o, size=28, align=4


LL_RCC_SetMDFClockSource: 0x34188834: B081 SUB SP, SP, #4 0x34188836: 9000 STR R0, [SP, #0] 0x34188838: F248 1154 MOVW R1, #0x8154 0x3418883C: F2C5 6102 MOVT R1, #0x5602 0x34188840: 6808 LDR R0, [R1] 0x34188842: F420 20E0 BIC R0, R0, #0x070000 0x34188846: 9A00 LDR R2, [SP, #0] 0x34188848: 4310 ORRS R0, R2 0x3418884A: 6008 STR R0, [R1] 0x3418884C: B001 ADD SP, SP, #4 0x3418884E: 4770 BX LR

Section .text.LL_RCC_SetPSSIClockSource from blto2_FSBL_lto.o, size=28, align=4


LL_RCC_SetPSSIClockSource: 0x34188850: B081 SUB SP, SP, #4 0x34188852: 9000 STR R0, [SP, #0] 0x34188854: F248 115C MOVW R1, #0x815C 0x34188858: F2C5 6102 MOVT R1, #0x5602 0x3418885C: 6808 LDR R0, [R1] 0x3418885E: F020 0030 BIC R0, R0, #48 0x34188862: 9A00 LDR R2, [SP, #0] 0x34188864: 4310 ORRS R0, R2 0x34188866: 6008 STR R0, [R1] 0x34188868: B001 ADD SP, SP, #4 0x3418886A: 4770 BX LR

Section .text.LL_RCC_SetSAIClockSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_SetSAIClockSource: 0x3418886C: B580 PUSH 123R7, LR} 0x3418886E: B082 SUB SP, SP, #8 0x34188870: 9001 STR R0, [SP, #4] 0x34188872: 9801 LDR R0, [SP, #4] 0x34188874: F000 F830 BL LL_RCC_SetClockSource ; 0x341888D8 0x34188878: B002 ADD SP, SP, #8 0x3418887A: BD80 POP 123R7, PC}

Section .text.LL_RCC_SetSPDIFRXClockSource from blto2_FSBL_lto.o, size=28, align=4


LL_RCC_SetSPDIFRXClockSource: 0x3418887C: B081 SUB SP, SP, #4 0x3418887E: 9000 STR R0, [SP, #0] 0x34188880: F248 1164 MOVW R1, #0x8164 0x34188884: F2C5 6102 MOVT R1, #0x5602 0x34188888: 6808 LDR R0, [R1] 0x3418888A: F020 0007 BIC R0, R0, #7 0x3418888E: 9A00 LDR R2, [SP, #0] 0x34188890: 4310 ORRS R0, R2 0x34188892: 6008 STR R0, [R1] 0x34188894: B001 ADD SP, SP, #4 0x34188896: 4770 BX LR

Section .text.LL_RCC_SetSPIClockSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_SetSPIClockSource: 0x34188898: B580 PUSH 123R7, LR} 0x3418889A: B082 SUB SP, SP, #8 0x3418889C: 9001 STR R0, [SP, #4] 0x3418889E: 9801 LDR R0, [SP, #4] 0x341888A0: F000 F81A BL LL_RCC_SetClockSource ; 0x341888D8 0x341888A4: B002 ADD SP, SP, #8 0x341888A6: BD80 POP 123R7, PC}

Section .text.LL_RCC_SetUSARTClockSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_SetUSARTClockSource: 0x341888A8: B580 PUSH 123R7, LR} 0x341888AA: B082 SUB SP, SP, #8 0x341888AC: 9001 STR R0, [SP, #4] 0x341888AE: 9801 LDR R0, [SP, #4] 0x341888B0: F000 F812 BL LL_RCC_SetClockSource ; 0x341888D8 0x341888B4: B002 ADD SP, SP, #8 0x341888B6: BD80 POP 123R7, PC}

Section .text.LL_RCC_SetOTGPHYClockSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_SetOTGPHYClockSource: 0x341888B8: B580 PUSH 123R7, LR} 0x341888BA: B082 SUB SP, SP, #8 0x341888BC: 9001 STR R0, [SP, #4] 0x341888BE: 9801 LDR R0, [SP, #4] 0x341888C0: F000 F80A BL LL_RCC_SetClockSource ; 0x341888D8 0x341888C4: B002 ADD SP, SP, #8 0x341888C6: BD80 POP 123R7, PC}

Section .text.LL_RCC_SetOTGPHYCKREFClockSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_SetOTGPHYCKREFClockSource: 0x341888C8: B580 PUSH 123R7, LR} 0x341888CA: B082 SUB SP, SP, #8 0x341888CC: 9001 STR R0, [SP, #4] 0x341888CE: 9801 LDR R0, [SP, #4] 0x341888D0: F000 F802 BL LL_RCC_SetClockSource ; 0x341888D8 0x341888D4: B002 ADD SP, SP, #8 0x341888D6: BD80 POP 123R7, PC}

Section .text.LL_RCC_SetClockSource from blto2_FSBL_lto.o, size=52, align=4


LL_RCC_SetClockSource: 0x341888D8: B082 SUB SP, SP, #8 0x341888DA: 9001 STR R0, [SP, #4] 0x341888DC: F89D 0004 LDRB.W R0, [SP, #4] 0x341888E0: F248 1144 MOVW R1, #0x8144 0x341888E4: F2C5 6102 MOVT R1, #0x5602 0x341888E8: 4408 ADD R0, R1 0x341888EA: 9000 STR R0, [SP, #0] 0x341888EC: 9800 LDR R0, [SP, #0] 0x341888EE: 6800 LDR R0, [R0] 0x341888F0: 9901 LDR R1, [SP, #4] 0x341888F2: 0E0B LSRS R3, R1, #24 0x341888F4: F3C1 2204 UBFX R2, R1, #8, #5 0x341888F8: 4093 LSLS R3, R2 0x341888FA: 4398 BICS R0, R3 0x341888FC: F3C1 4107 UBFX R1, R1, #16, #8 0x34188900: 4091 LSLS R1, R2 0x34188902: 4308 ORRS R0, R1 0x34188904: 9900 LDR R1, [SP, #0] 0x34188906: 6008 STR R0, [R1] 0x34188908: B002 ADD SP, SP, #8 0x3418890A: 4770 BX LR

Section .text.LL_RCC_GetADCPrescaler from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_GetADCPrescaler: 0x3418890C: F248 1044 MOVW R0, #0x8144 0x34188910: F2C5 6002 MOVT R0, #0x5602 0x34188914: 6800 LDR R0, [R0] 0x34188916: B280 UXTH R0, R0 0x34188918: 0A00 LSRS R0, R0, #8 0x3418891A: 4770 BX LR

Section .text.LL_RCC_GetETH1PTPDivider from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_GetETH1PTPDivider: 0x3418891C: F248 1048 MOVW R0, #0x8148 0x34188920: F2C5 6002 MOVT R0, #0x5602 0x34188924: 6800 LDR R0, [R0] 0x34188926: F000 00F0 AND R0, R0, #240 0x3418892A: 4770 BX LR

Section .text.LL_RCC_GetI2CClockSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_GetI2CClockSource: 0x3418892C: B580 PUSH 123R7, LR} 0x3418892E: B082 SUB SP, SP, #8 0x34188930: 9001 STR R0, [SP, #4] 0x34188932: 9801 LDR R0, [SP, #4] 0x34188934: F000 F84A BL LL_RCC_GetClockSource ; 0x341889CC 0x34188938: B002 ADD SP, SP, #8 0x3418893A: BD80 POP 123R7, PC}

Section .text.LL_RCC_GetI3CClockSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_GetI3CClockSource: 0x3418893C: B580 PUSH 123R7, LR} 0x3418893E: B082 SUB SP, SP, #8 0x34188940: 9001 STR R0, [SP, #4] 0x34188942: 9801 LDR R0, [SP, #4] 0x34188944: F000 F842 BL LL_RCC_GetClockSource ; 0x341889CC 0x34188948: B002 ADD SP, SP, #8 0x3418894A: BD80 POP 123R7, PC}

Section .text.LL_RCC_GetLPTIMClockSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_GetLPTIMClockSource: 0x3418894C: B580 PUSH 123R7, LR} 0x3418894E: B082 SUB SP, SP, #8 0x34188950: 9001 STR R0, [SP, #4] 0x34188952: 9801 LDR R0, [SP, #4] 0x34188954: F000 F83A BL LL_RCC_GetClockSource ; 0x341889CC 0x34188958: B002 ADD SP, SP, #8 0x3418895A: BD80 POP 123R7, PC}

Section .text.LL_RCC_GetSAIClockSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_GetSAIClockSource: 0x3418895C: B580 PUSH 123R7, LR} 0x3418895E: B082 SUB SP, SP, #8 0x34188960: 9001 STR R0, [SP, #4] 0x34188962: 9801 LDR R0, [SP, #4] 0x34188964: F000 F832 BL LL_RCC_GetClockSource ; 0x341889CC 0x34188968: B002 ADD SP, SP, #8 0x3418896A: BD80 POP 123R7, PC}

Section .text.LL_RCC_GetSDMMCClockSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_GetSDMMCClockSource: 0x3418896C: B580 PUSH 123R7, LR} 0x3418896E: B082 SUB SP, SP, #8 0x34188970: 9001 STR R0, [SP, #4] 0x34188972: 9801 LDR R0, [SP, #4] 0x34188974: F000 F82A BL LL_RCC_GetClockSource ; 0x341889CC 0x34188978: B002 ADD SP, SP, #8 0x3418897A: BD80 POP 123R7, PC}

Section .text.LL_RCC_GetSPIClockSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_GetSPIClockSource: 0x3418897C: B580 PUSH 123R7, LR} 0x3418897E: B082 SUB SP, SP, #8 0x34188980: 9001 STR R0, [SP, #4] 0x34188982: 9801 LDR R0, [SP, #4] 0x34188984: F000 F822 BL LL_RCC_GetClockSource ; 0x341889CC 0x34188988: B002 ADD SP, SP, #8 0x3418898A: BD80 POP 123R7, PC}

Section .text.LL_RCC_GetTIMPrescaler from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_GetTIMPrescaler: 0x3418898C: F248 0024 MOVW R0, #0x8024 0x34188990: F2C5 6002 MOVT R0, #0x5602 0x34188994: 6800 LDR R0, [R0] 0x34188996: F3C0 6001 UBFX R0, R0, #24, #2 0x3418899A: 4770 BX LR

Section .text.LL_RCC_GetUSARTClockSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_GetUSARTClockSource: 0x3418899C: B580 PUSH 123R7, LR} 0x3418899E: B082 SUB SP, SP, #8 0x341889A0: 9001 STR R0, [SP, #4] 0x341889A2: 9801 LDR R0, [SP, #4] 0x341889A4: F000 F812 BL LL_RCC_GetClockSource ; 0x341889CC 0x341889A8: B002 ADD SP, SP, #8 0x341889AA: BD80 POP 123R7, PC}

Section .text.LL_RCC_HSE_IsSelectedHSEDiv2AsDiv2Clock from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_HSE_IsSelectedHSEDiv2AsDiv2Clock: 0x341889AC: F248 0054 MOVW R0, #0x8054 0x341889B0: F2C5 6002 MOVT R0, #0x5602 0x341889B4: 6800 LDR R0, [R0] 0x341889B6: F3C0 1080 UBFX R0, R0, #6, #1 0x341889BA: 4770 BX LR

Section .text.LL_RCC_GetXSPIClockSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_GetXSPIClockSource: 0x341889BC: B580 PUSH 123R7, LR} 0x341889BE: B082 SUB SP, SP, #8 0x341889C0: 9001 STR R0, [SP, #4] 0x341889C2: 9801 LDR R0, [SP, #4] 0x341889C4: F000 F802 BL LL_RCC_GetClockSource ; 0x341889CC 0x341889C8: B002 ADD SP, SP, #8 0x341889CA: BD80 POP 123R7, PC}

Section .text.LL_RCC_GetClockSource from blto2_FSBL_lto.o, size=48, align=4


LL_RCC_GetClockSource: 0x341889CC: B082 SUB SP, SP, #8 0x341889CE: 9001 STR R0, [SP, #4] 0x341889D0: F89D 0004 LDRB.W R0, [SP, #4] 0x341889D4: F248 1144 MOVW R1, #0x8144 0x341889D8: F2C5 6102 MOVT R1, #0x5602 0x341889DC: 4408 ADD R0, R1 0x341889DE: 9000 STR R0, [SP, #0] 0x341889E0: 9801 LDR R0, [SP, #4] 0x341889E2: 9900 LDR R1, [SP, #0] 0x341889E4: 6809 LDR R1, [R1] 0x341889E6: 9A01 LDR R2, [SP, #4] 0x341889E8: 0E13 LSRS R3, R2, #24 0x341889EA: F3C2 2204 UBFX R2, R2, #8, #5 0x341889EE: 4093 LSLS R3, R2 0x341889F0: 4019 ANDS R1, R3 0x341889F2: 40D1 LSRS R1, R2 0x341889F4: EA40 4001 ORR.W R0, R0, R1, LSL #16 0x341889F8: B002 ADD SP, SP, #8 0x341889FA: 4770 BX LR

Section .text.RCCEx_GetADFCLKFreq from blto2_FSBL_lto.o, size=388, align=4


RCCEx_GetADFCLKFreq: 0x341889FC: B580 PUSH 123R7, LR} 0x341889FE: B088 SUB SP, SP, #32 0x34188A00: 9007 STR R0, [SP, #28] 0x34188A02: 2000 MOVS R0, #0 0x34188A04: 9006 STR R0, [SP, #24] 0x34188A06: 9807 LDR R0, [SP, #28] 0x34188A08: F007 FC72 BL LL_RCC_GetADFClockSource ; 0x341902F0 0x34188A0C: 4601 MOV R1, R0 0x34188A0E: 9104 STR R1, [SP, #16] 0x34188A10: 2807 CMP R0, #7 0x34188A12: F200 80B2 BHI.W 46L13 ; 0x34188B7A 0x34188A16: 9904 LDR R1, [SP, #16] 0x34188A18: E8DF F001 TBB 91PC, R1] 0x34188A1C: 04 DC.B 0x04 ; '\x04' 0x34188A1D: 0A DC.B 0x0A ; '\n' 0x34188A1E: 0F DC.B 0x0F ; '\x0F' 0x34188A1F: 4C DC.B 0x4C ; 'L' 0x34188A20: 96 DC.B 0x96 ; '\x96' 0x34188A21: 89 DC.B 0x89 ; '\x89' 0x34188A22: 9F DC.B 0x9F ; '\x9F' 0x34188A23: A5 DC.B 0xA5 ; '\xA5' 0x34188A24: F007 FBEA BL HAL_RCC_GetSysClockFreq ; 0x341901FC 0x34188A28: F001 FF4C BL RCCEx_GetHCLKFreq ; 0x3418A8C4 0x34188A2C: 9006 STR R0, [SP, #24] 0x34188A2E: E0A4 B 46L13 ; 0x34188B7A 0x34188A30: 2007 MOVS R0, #7 0x34188A32: F000 F8A5 BL RCCEx_GetCLKPCLKFreq ; 0x34188B80 0x34188A36: 9006 STR R0, [SP, #24] 0x34188A38: E09F B 46L13 ; 0x34188B7A 0x34188A3A: F002 F9DD BL LL_RCC_IC7_IsEnabled ; 0x3418ADF8 0x34188A3E: B3C0 CBZ R0, .L5 ; 0x34188AB2 0x34188A40: F009 F89C BL LL_RCC_IC7_GetDivider ; 0x34191B7C 0x34188A44: 9005 STR R0, [SP, #20] 0x34188A46: F002 F9DF BL LL_RCC_IC7_GetSource ; 0x3418AE08 0x34188A4A: 4601 MOV R1, R0 0x34188A4C: 9103 STR R1, [SP, #12] 0x34188A4E: B160 CBZ R0, .L1 ; 0x34188A6A 0x34188A50: 9803 LDR R0, [SP, #12] 0x34188A52: F1B0 5F80 CMP.W R0, #0x10000000 0x34188A56: D011 BEQ 46L2 ; 0x34188A7C 0x34188A58: 9803 LDR R0, [SP, #12] 0x34188A5A: F1B0 5F00 CMP.W R0, #0x20000000 0x34188A5E: D016 BEQ 46L3 ; 0x34188A8E 0x34188A60: 9803 LDR R0, [SP, #12] 0x34188A62: F1B0 5F40 CMP.W R0, #0x30000000 0x34188A66: D01B BEQ 46L4 ; 0x34188AA0 0x34188A68: E023 B 46L5 ; 0x34188AB2
.L1: 0x34188A6A: F008 FF43 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F4 0x34188A6E: 9006 STR R0, [SP, #24] 0x34188A70: 9806 LDR R0, [SP, #24] 0x34188A72: 9905 LDR R1, [SP, #20] 0x34188A74: FBB0 F0F1 UDIV R0, R0, R1 0x34188A78: 9006 STR R0, [SP, #24] 0x34188A7A: E01A B 46L5 ; 0x34188AB2
.L2: 0x34188A7C: F008 FF7C BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191978 0x34188A80: 9006 STR R0, [SP, #24] 0x34188A82: 9806 LDR R0, [SP, #24] 0x34188A84: 9905 LDR R1, [SP, #20] 0x34188A86: FBB0 F0F1 UDIV R0, R0, R1 0x34188A8A: 9006 STR R0, [SP, #24] 0x34188A8C: E011 B 46L5 ; 0x34188AB2
.L3: 0x34188A8E: F008 FFB5 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919FC 0x34188A92: 9006 STR R0, [SP, #24] 0x34188A94: 9806 LDR R0, [SP, #24] 0x34188A96: 9905 LDR R1, [SP, #20] 0x34188A98: FBB0 F0F1 UDIV R0, R0, R1 0x34188A9C: 9006 STR R0, [SP, #24] 0x34188A9E: E008 B 46L5 ; 0x34188AB2
.L4: 0x34188AA0: F008 FFEE BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A80 0x34188AA4: 9006 STR R0, [SP, #24] 0x34188AA6: 9806 LDR R0, [SP, #24] 0x34188AA8: 9905 LDR R1, [SP, #20] 0x34188AAA: FBB0 F0F1 UDIV R0, R0, R1 0x34188AAE: 9006 STR R0, [SP, #24] 0x34188AB0: E7FF B 46L5 ; 0x34188AB2
.L5: 0x34188AB2: E062 B 46L13 ; 0x34188B7A 0x34188AB4: F002 F988 BL LL_RCC_IC8_IsEnabled ; 0x3418ADC8 0x34188AB8: B3C0 CBZ R0, .L10 ; 0x34188B2C 0x34188ABA: F009 F853 BL LL_RCC_IC8_GetDivider ; 0x34191B64 0x34188ABE: 9005 STR R0, [SP, #20] 0x34188AC0: F002 F98A BL LL_RCC_IC8_GetSource ; 0x3418ADD8 0x34188AC4: 4601 MOV R1, R0 0x34188AC6: 9102 STR R1, [SP, #8] 0x34188AC8: B160 CBZ R0, .L6 ; 0x34188AE4 0x34188ACA: 9802 LDR R0, [SP, #8] 0x34188ACC: F1B0 5F80 CMP.W R0, #0x10000000 0x34188AD0: D011 BEQ 46L7 ; 0x34188AF6 0x34188AD2: 9802 LDR R0, [SP, #8] 0x34188AD4: F1B0 5F00 CMP.W R0, #0x20000000 0x34188AD8: D016 BEQ 46L8 ; 0x34188B08 0x34188ADA: 9802 LDR R0, [SP, #8] 0x34188ADC: F1B0 5F40 CMP.W R0, #0x30000000 0x34188AE0: D01B BEQ 46L9 ; 0x34188B1A 0x34188AE2: E023 B 46L10 ; 0x34188B2C
.L6: 0x34188AE4: F008 FF06 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F4 0x34188AE8: 9006 STR R0, [SP, #24] 0x34188AEA: 9806 LDR R0, [SP, #24] 0x34188AEC: 9905 LDR R1, [SP, #20] 0x34188AEE: FBB0 F0F1 UDIV R0, R0, R1 0x34188AF2: 9006 STR R0, [SP, #24] 0x34188AF4: E01A B 46L10 ; 0x34188B2C
.L7: 0x34188AF6: F008 FF3F BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191978 0x34188AFA: 9006 STR R0, [SP, #24] 0x34188AFC: 9806 LDR R0, [SP, #24] 0x34188AFE: 9905 LDR R1, [SP, #20] 0x34188B00: FBB0 F0F1 UDIV R0, R0, R1 0x34188B04: 9006 STR R0, [SP, #24] 0x34188B06: E011 B 46L10 ; 0x34188B2C
.L8: 0x34188B08: F008 FF78 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919FC 0x34188B0C: 9006 STR R0, [SP, #24] 0x34188B0E: 9806 LDR R0, [SP, #24] 0x34188B10: 9905 LDR R1, [SP, #20] 0x34188B12: FBB0 F0F1 UDIV R0, R0, R1 0x34188B16: 9006 STR R0, [SP, #24] 0x34188B18: E008 B 46L10 ; 0x34188B2C
.L9: 0x34188B1A: F008 FFB1 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A80 0x34188B1E: 9006 STR R0, [SP, #24] 0x34188B20: 9806 LDR R0, [SP, #24] 0x34188B22: 9905 LDR R1, [SP, #20] 0x34188B24: FBB0 F0F1 UDIV R0, R0, R1 0x34188B28: 9006 STR R0, [SP, #24] 0x34188B2A: E7FF B 46L10 ; 0x34188B2C
.L10: 0x34188B2C: E025 B 46L13 ; 0x34188B7A 0x34188B2E: F001 FFC9 BL LL_RCC_HSI_IsReady.77 ; 0x3418AAC4 0x34188B32: B140 CBZ R0, .L11 ; 0x34188B46 0x34188B34: F001 FFCE BL LL_RCC_HSI_GetDivider.78 ; 0x3418AAD4 0x34188B38: 09C1 LSRS R1, R0, #7 0x34188B3A: F249 0000 MOVW R0, #0x9000 0x34188B3E: F2C0 30D0 MOVT R0, #0x03D0 0x34188B42: 40C8 LSRS R0, R1 0x34188B44: 9006 STR R0, [SP, #24]
.L11: 0x34188B46: E018 B 46L13 ; 0x34188B7A 0x34188B48: F001 FFCC BL LL_RCC_MSI_IsReady.79 ; 0x3418AAE4 0x34188B4C: B120 CBZ R0, .L12 ; 0x34188B58 0x34188B4E: F640 1000 MOVW R0, #0x0900 0x34188B52: F2C0 003D MOVT R0, #61 0x34188B56: 9006 STR R0, [SP, #24]
.L12: 0x34188B58: E00F B 46L13 ; 0x34188B7A 0x34188B5A: F248 0000 MOVW R0, #0x8000 0x34188B5E: F2C0 00BB MOVT R0, #187 0x34188B62: 9006 STR R0, [SP, #24] 0x34188B64: E009 B 46L13 ; 0x34188B7A 0x34188B66: F007 FB49 BL HAL_RCC_GetSysClockFreq ; 0x341901FC 0x34188B6A: 9001 STR R0, [SP, #4] 0x34188B6C: F7FF FF0E BL LL_RCC_GetTIMPrescaler ; 0x3418898C 0x34188B70: 4601 MOV R1, R0 0x34188B72: 9801 LDR R0, [SP, #4] 0x34188B74: 40C8 LSRS R0, R1 0x34188B76: 9006 STR R0, [SP, #24] 0x34188B78: E7FF B 46L13 ; 0x34188B7A
.L13: 0x34188B7A: 9806 LDR R0, [SP, #24] 0x34188B7C: B008 ADD SP, SP, #32 0x34188B7E: BD80 POP 123R7, PC}

Section .text.RCCEx_GetCLKPCLKFreq from blto2_FSBL_lto.o, size=736, align=4


RCCEx_GetCLKPCLKFreq: 0x34188B80: B580 PUSH 123R7, LR} 0x34188B82: B08A SUB SP, SP, #40 0x34188B84: 9009 STR R0, [SP, #36] 0x34188B86: 2000 MOVS R0, #0 0x34188B88: 9008 STR R0, [SP, #32] 0x34188B8A: F002 F9E3 BL LL_RCC_CLKP_IsEnabled ; 0x3418AF54 0x34188B8E: 2801 CMP R0, #1 0x34188B90: F040 8163 BNE.W 46L29 ; 0x34188E5A 0x34188B94: 9809 LDR R0, [SP, #36] 0x34188B96: F007 FBB7 BL LL_RCC_GetCLKPClockSource ; 0x34190308 0x34188B9A: 4601 MOV R1, R0 0x34188B9C: 9106 STR R1, [SP, #24] 0x34188B9E: 2807 CMP R0, #7 0x34188BA0: F200 815B BHI.W 46L29 ; 0x34188E5A 0x34188BA4: 9906 LDR R1, [SP, #24] 0x34188BA6: E8DF F011 TBH 91PC, R1, LSL #1] 0x34188BAA: 08 DC.B 0x08 ; '\b' 0x34188BAB: 00 DC.B 0x00 ; '\0' 0x34188BAC: 15 DC.B 0x15 ; '\x15' 0x34188BAD: 00 DC.B 0x00 ; '\0' 0x34188BAE: 1E DC.B 0x1E ; '\x1E' 0x34188BAF: 00 DC.B 0x00 ; '\0' 0x34188BB0: DE DC.B 0xDE ; '\xDE' 0x34188BB1: 00 DC.B 0x00 ; '\0' 0x34188BB2: 27 DC.B 0x27 ; ''' 0x34188BB3: 00 DC.B 0x00 ; '\0' 0x34188BB4: 64 DC.B 0x64 ; 'd' 0x34188BB5: 00 DC.B 0x00 ; '\0' 0x34188BB6: A1 DC.B 0xA1 ; '\xA1' 0x34188BB7: 00 DC.B 0x00 ; '\0' 0x34188BB8: 1B DC.B 0x1B ; '\x1B' 0x34188BB9: 01 DC.B 0x01 ; '\x01' 0x34188BBA: F001 FF83 BL LL_RCC_HSI_IsReady.77 ; 0x3418AAC4 0x34188BBE: B140 CBZ R0, .L1 ; 0x34188BD2 0x34188BC0: F001 FF88 BL LL_RCC_HSI_GetDivider.78 ; 0x3418AAD4 0x34188BC4: 09C1 LSRS R1, R0, #7 0x34188BC6: F249 0000 MOVW R0, #0x9000 0x34188BCA: F2C0 30D0 MOVT R0, #0x03D0 0x34188BCE: 40C8 LSRS R0, R1 0x34188BD0: 9008 STR R0, [SP, #32]
.L1: 0x34188BD2: E142 B 46L29 ; 0x34188E5A 0x34188BD4: F001 FF86 BL LL_RCC_MSI_IsReady.79 ; 0x3418AAE4 0x34188BD8: B120 CBZ R0, .L2 ; 0x34188BE4 0x34188BDA: F640 1000 MOVW R0, #0x0900 0x34188BDE: F2C0 003D MOVT R0, #61 0x34188BE2: 9008 STR R0, [SP, #32]
.L2: 0x34188BE4: E139 B 46L29 ; 0x34188E5A 0x34188BE6: F001 FF8D BL LL_RCC_HSE_IsReady.80 ; 0x3418AB04 0x34188BEA: B120 CBZ R0, .L3 ; 0x34188BF6 0x34188BEC: F646 4000 MOVW R0, #0x6C00 0x34188BF0: F2C0 20DC MOVT R0, #0x02DC 0x34188BF4: 9008 STR R0, [SP, #32]
.L3: 0x34188BF6: E130 B 46L29 ; 0x34188E5A 0x34188BF8: F002 F90E BL LL_RCC_IC5_IsEnabled ; 0x3418AE18 0x34188BFC: B3C0 CBZ R0, .L8 ; 0x34188C70 0x34188BFE: F008 FFC9 BL LL_RCC_IC5_GetDivider ; 0x34191B94 0x34188C02: 9007 STR R0, [SP, #28] 0x34188C04: F002 F910 BL LL_RCC_IC5_GetSource ; 0x3418AE28 0x34188C08: 4601 MOV R1, R0 0x34188C0A: 9105 STR R1, [SP, #20] 0x34188C0C: B160 CBZ R0, .L4 ; 0x34188C28 0x34188C0E: 9805 LDR R0, [SP, #20] 0x34188C10: F1B0 5F80 CMP.W R0, #0x10000000 0x34188C14: D011 BEQ 46L5 ; 0x34188C3A 0x34188C16: 9805 LDR R0, [SP, #20] 0x34188C18: F1B0 5F00 CMP.W R0, #0x20000000 0x34188C1C: D016 BEQ 46L6 ; 0x34188C4C 0x34188C1E: 9805 LDR R0, [SP, #20] 0x34188C20: F1B0 5F40 CMP.W R0, #0x30000000 0x34188C24: D01B BEQ 46L7 ; 0x34188C5E 0x34188C26: E023 B 46L8 ; 0x34188C70
.L4: 0x34188C28: F008 FE64 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F4 0x34188C2C: 9008 STR R0, [SP, #32] 0x34188C2E: 9808 LDR R0, [SP, #32] 0x34188C30: 9907 LDR R1, [SP, #28] 0x34188C32: FBB0 F0F1 UDIV R0, R0, R1 0x34188C36: 9008 STR R0, [SP, #32] 0x34188C38: E01A B 46L8 ; 0x34188C70
.L5: 0x34188C3A: F008 FE9D BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191978 0x34188C3E: 9008 STR R0, [SP, #32] 0x34188C40: 9808 LDR R0, [SP, #32] 0x34188C42: 9907 LDR R1, [SP, #28] 0x34188C44: FBB0 F0F1 UDIV R0, R0, R1 0x34188C48: 9008 STR R0, [SP, #32] 0x34188C4A: E011 B 46L8 ; 0x34188C70
.L6: 0x34188C4C: F008 FED6 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919FC 0x34188C50: 9008 STR R0, [SP, #32] 0x34188C52: 9808 LDR R0, [SP, #32] 0x34188C54: 9907 LDR R1, [SP, #28] 0x34188C56: FBB0 F0F1 UDIV R0, R0, R1 0x34188C5A: 9008 STR R0, [SP, #32] 0x34188C5C: E008 B 46L8 ; 0x34188C70
.L7: 0x34188C5E: F008 FF0F BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A80 0x34188C62: 9008 STR R0, [SP, #32] 0x34188C64: 9808 LDR R0, [SP, #32] 0x34188C66: 9907 LDR R1, [SP, #28] 0x34188C68: FBB0 F0F1 UDIV R0, R0, R1 0x34188C6C: 9008 STR R0, [SP, #32] 0x34188C6E: E7FF B 46L8 ; 0x34188C70
.L8: 0x34188C70: E0F3 B 46L29 ; 0x34188E5A 0x34188C72: F002 F91F BL LL_RCC_IC10_IsEnabled ; 0x3418AEB4 0x34188C76: B3C0 CBZ R0, .L13 ; 0x34188CEA 0x34188C78: F008 FFB0 BL LL_RCC_IC10_GetDivider ; 0x34191BDC 0x34188C7C: 9007 STR R0, [SP, #28] 0x34188C7E: F002 F921 BL LL_RCC_IC10_GetSource ; 0x3418AEC4 0x34188C82: 4601 MOV R1, R0 0x34188C84: 9104 STR R1, [SP, #16] 0x34188C86: B160 CBZ R0, .L9 ; 0x34188CA2 0x34188C88: 9804 LDR R0, [SP, #16] 0x34188C8A: F1B0 5F80 CMP.W R0, #0x10000000 0x34188C8E: D011 BEQ 46L10 ; 0x34188CB4 0x34188C90: 9804 LDR R0, [SP, #16] 0x34188C92: F1B0 5F00 CMP.W R0, #0x20000000 0x34188C96: D016 BEQ 46L11 ; 0x34188CC6 0x34188C98: 9804 LDR R0, [SP, #16] 0x34188C9A: F1B0 5F40 CMP.W R0, #0x30000000 0x34188C9E: D01B BEQ 46L12 ; 0x34188CD8 0x34188CA0: E023 B 46L13 ; 0x34188CEA
.L9: 0x34188CA2: F008 FE27 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F4 0x34188CA6: 9008 STR R0, [SP, #32] 0x34188CA8: 9808 LDR R0, [SP, #32] 0x34188CAA: 9907 LDR R1, [SP, #28] 0x34188CAC: FBB0 F0F1 UDIV R0, R0, R1 0x34188CB0: 9008 STR R0, [SP, #32] 0x34188CB2: E01A B 46L13 ; 0x34188CEA
.L10: 0x34188CB4: F008 FE60 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191978 0x34188CB8: 9008 STR R0, [SP, #32] 0x34188CBA: 9808 LDR R0, [SP, #32] 0x34188CBC: 9907 LDR R1, [SP, #28] 0x34188CBE: FBB0 F0F1 UDIV R0, R0, R1 0x34188CC2: 9008 STR R0, [SP, #32] 0x34188CC4: E011 B 46L13 ; 0x34188CEA
.L11: 0x34188CC6: F008 FE99 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919FC 0x34188CCA: 9008 STR R0, [SP, #32] 0x34188CCC: 9808 LDR R0, [SP, #32] 0x34188CCE: 9907 LDR R1, [SP, #28] 0x34188CD0: FBB0 F0F1 UDIV R0, R0, R1 0x34188CD4: 9008 STR R0, [SP, #32] 0x34188CD6: E008 B 46L13 ; 0x34188CEA
.L12: 0x34188CD8: F008 FED2 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A80 0x34188CDC: 9008 STR R0, [SP, #32] 0x34188CDE: 9808 LDR R0, [SP, #32] 0x34188CE0: 9907 LDR R1, [SP, #28] 0x34188CE2: FBB0 F0F1 UDIV R0, R0, R1 0x34188CE6: 9008 STR R0, [SP, #32] 0x34188CE8: E7FF B 46L13 ; 0x34188CEA
.L13: 0x34188CEA: E0B6 B 46L29 ; 0x34188E5A 0x34188CEC: F001 FFFA BL LL_RCC_IC15_IsEnabled ; 0x3418ACE4 0x34188CF0: B3C0 CBZ R0, .L18 ; 0x34188D64 0x34188CF2: F008 FF13 BL LL_RCC_IC15_GetDivider ; 0x34191B1C 0x34188CF6: 9007 STR R0, [SP, #28] 0x34188CF8: F001 FFFC BL LL_RCC_IC15_GetSource ; 0x3418ACF4 0x34188CFC: 4601 MOV R1, R0 0x34188CFE: 9103 STR R1, [SP, #12] 0x34188D00: B160 CBZ R0, .L14 ; 0x34188D1C 0x34188D02: 9803 LDR R0, [SP, #12] 0x34188D04: F1B0 5F80 CMP.W R0, #0x10000000 0x34188D08: D011 BEQ 46L15 ; 0x34188D2E 0x34188D0A: 9803 LDR R0, [SP, #12] 0x34188D0C: F1B0 5F00 CMP.W R0, #0x20000000 0x34188D10: D016 BEQ 46L16 ; 0x34188D40 0x34188D12: 9803 LDR R0, [SP, #12] 0x34188D14: F1B0 5F40 CMP.W R0, #0x30000000 0x34188D18: D01B BEQ 46L17 ; 0x34188D52 0x34188D1A: E023 B 46L18 ; 0x34188D64
.L14: 0x34188D1C: F008 FDEA BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F4 0x34188D20: 9008 STR R0, [SP, #32] 0x34188D22: 9808 LDR R0, [SP, #32] 0x34188D24: 9907 LDR R1, [SP, #28] 0x34188D26: FBB0 F0F1 UDIV R0, R0, R1 0x34188D2A: 9008 STR R0, [SP, #32] 0x34188D2C: E01A B 46L18 ; 0x34188D64
.L15: 0x34188D2E: F008 FE23 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191978 0x34188D32: 9008 STR R0, [SP, #32] 0x34188D34: 9808 LDR R0, [SP, #32] 0x34188D36: 9907 LDR R1, [SP, #28] 0x34188D38: FBB0 F0F1 UDIV R0, R0, R1 0x34188D3C: 9008 STR R0, [SP, #32] 0x34188D3E: E011 B 46L18 ; 0x34188D64
.L16: 0x34188D40: F008 FE5C BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919FC 0x34188D44: 9008 STR R0, [SP, #32] 0x34188D46: 9808 LDR R0, [SP, #32] 0x34188D48: 9907 LDR R1, [SP, #28] 0x34188D4A: FBB0 F0F1 UDIV R0, R0, R1 0x34188D4E: 9008 STR R0, [SP, #32] 0x34188D50: E008 B 46L18 ; 0x34188D64
.L17: 0x34188D52: F008 FE95 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A80 0x34188D56: 9008 STR R0, [SP, #32] 0x34188D58: 9808 LDR R0, [SP, #32] 0x34188D5A: 9907 LDR R1, [SP, #28] 0x34188D5C: FBB0 F0F1 UDIV R0, R0, R1 0x34188D60: 9008 STR R0, [SP, #32] 0x34188D62: E7FF B 46L18 ; 0x34188D64
.L18: 0x34188D64: E079 B 46L29 ; 0x34188E5A 0x34188D66: F002 F8B5 BL LL_RCC_IC19_IsEnabled ; 0x3418AED4 0x34188D6A: B3C0 CBZ R0, .L23 ; 0x34188DDE 0x34188D6C: F008 FF42 BL LL_RCC_IC19_GetDivider ; 0x34191BF4 0x34188D70: 9007 STR R0, [SP, #28] 0x34188D72: F002 F8B7 BL LL_RCC_IC19_GetSource ; 0x3418AEE4 0x34188D76: 4601 MOV R1, R0 0x34188D78: 9102 STR R1, [SP, #8] 0x34188D7A: B160 CBZ R0, .L19 ; 0x34188D96 0x34188D7C: 9802 LDR R0, [SP, #8] 0x34188D7E: F1B0 5F80 CMP.W R0, #0x10000000 0x34188D82: D011 BEQ 46L20 ; 0x34188DA8 0x34188D84: 9802 LDR R0, [SP, #8] 0x34188D86: F1B0 5F00 CMP.W R0, #0x20000000 0x34188D8A: D016 BEQ 46L21 ; 0x34188DBA 0x34188D8C: 9802 LDR R0, [SP, #8] 0x34188D8E: F1B0 5F40 CMP.W R0, #0x30000000 0x34188D92: D01B BEQ 46L22 ; 0x34188DCC 0x34188D94: E023 B 46L23 ; 0x34188DDE
.L19: 0x34188D96: F008 FDAD BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F4 0x34188D9A: 9008 STR R0, [SP, #32] 0x34188D9C: 9808 LDR R0, [SP, #32] 0x34188D9E: 9907 LDR R1, [SP, #28] 0x34188DA0: FBB0 F0F1 UDIV R0, R0, R1 0x34188DA4: 9008 STR R0, [SP, #32] 0x34188DA6: E01A B 46L23 ; 0x34188DDE
.L20: 0x34188DA8: F008 FDE6 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191978 0x34188DAC: 9008 STR R0, [SP, #32] 0x34188DAE: 9808 LDR R0, [SP, #32] 0x34188DB0: 9907 LDR R1, [SP, #28] 0x34188DB2: FBB0 F0F1 UDIV R0, R0, R1 0x34188DB6: 9008 STR R0, [SP, #32] 0x34188DB8: E011 B 46L23 ; 0x34188DDE
.L21: 0x34188DBA: F008 FE1F BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919FC 0x34188DBE: 9008 STR R0, [SP, #32] 0x34188DC0: 9808 LDR R0, [SP, #32] 0x34188DC2: 9907 LDR R1, [SP, #28] 0x34188DC4: FBB0 F0F1 UDIV R0, R0, R1 0x34188DC8: 9008 STR R0, [SP, #32] 0x34188DCA: E008 B 46L23 ; 0x34188DDE
.L22: 0x34188DCC: F008 FE58 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A80 0x34188DD0: 9008 STR R0, [SP, #32] 0x34188DD2: 9808 LDR R0, [SP, #32] 0x34188DD4: 9907 LDR R1, [SP, #28] 0x34188DD6: FBB0 F0F1 UDIV R0, R0, R1 0x34188DDA: 9008 STR R0, [SP, #32] 0x34188DDC: E7FF B 46L23 ; 0x34188DDE
.L23: 0x34188DDE: E03C B 46L29 ; 0x34188E5A 0x34188DE0: F002 F832 BL LL_RCC_IC20_IsEnabled ; 0x3418AE48 0x34188DE4: B3C0 CBZ R0, .L28 ; 0x34188E58 0x34188DE6: F008 FEE1 BL LL_RCC_IC20_GetDivider ; 0x34191BAC 0x34188DEA: 9007 STR R0, [SP, #28] 0x34188DEC: F002 F834 BL LL_RCC_IC20_GetSource ; 0x3418AE58 0x34188DF0: 4601 MOV R1, R0 0x34188DF2: 9101 STR R1, [SP, #4] 0x34188DF4: B160 CBZ R0, .L24 ; 0x34188E10 0x34188DF6: 9801 LDR R0, [SP, #4] 0x34188DF8: F1B0 5F80 CMP.W R0, #0x10000000 0x34188DFC: D011 BEQ 46L25 ; 0x34188E22 0x34188DFE: 9801 LDR R0, [SP, #4] 0x34188E00: F1B0 5F00 CMP.W R0, #0x20000000 0x34188E04: D016 BEQ 46L26 ; 0x34188E34 0x34188E06: 9801 LDR R0, [SP, #4] 0x34188E08: F1B0 5F40 CMP.W R0, #0x30000000 0x34188E0C: D01B BEQ 46L27 ; 0x34188E46 0x34188E0E: E023 B 46L28 ; 0x34188E58
.L24: 0x34188E10: F008 FD70 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F4 0x34188E14: 9008 STR R0, [SP, #32] 0x34188E16: 9808 LDR R0, [SP, #32] 0x34188E18: 9907 LDR R1, [SP, #28] 0x34188E1A: FBB0 F0F1 UDIV R0, R0, R1 0x34188E1E: 9008 STR R0, [SP, #32] 0x34188E20: E01A B 46L28 ; 0x34188E58
.L25: 0x34188E22: F008 FDA9 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191978 0x34188E26: 9008 STR R0, [SP, #32] 0x34188E28: 9808 LDR R0, [SP, #32] 0x34188E2A: 9907 LDR R1, [SP, #28] 0x34188E2C: FBB0 F0F1 UDIV R0, R0, R1 0x34188E30: 9008 STR R0, [SP, #32] 0x34188E32: E011 B 46L28 ; 0x34188E58
.L26: 0x34188E34: F008 FDE2 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919FC 0x34188E38: 9008 STR R0, [SP, #32] 0x34188E3A: 9808 LDR R0, [SP, #32] 0x34188E3C: 9907 LDR R1, [SP, #28] 0x34188E3E: FBB0 F0F1 UDIV R0, R0, R1 0x34188E42: 9008 STR R0, [SP, #32] 0x34188E44: E008 B 46L28 ; 0x34188E58
.L27: 0x34188E46: F008 FE1B BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A80 0x34188E4A: 9008 STR R0, [SP, #32] 0x34188E4C: 9808 LDR R0, [SP, #32] 0x34188E4E: 9907 LDR R1, [SP, #28] 0x34188E50: FBB0 F0F1 UDIV R0, R0, R1 0x34188E54: 9008 STR R0, [SP, #32] 0x34188E56: E7FF B 46L28 ; 0x34188E58
.L28: 0x34188E58: E7FF B 46L29 ; 0x34188E5A
.L29: 0x34188E5A: 9808 LDR R0, [SP, #32] 0x34188E5C: B00A ADD SP, SP, #40 0x34188E5E: BD80 POP 123R7, PC}

Section .text.RCCEx_GetDCMIPPCLKFreq from blto2_FSBL_lto.o, size=228, align=4


RCCEx_GetDCMIPPCLKFreq: 0x34188E60: B580 PUSH 123R7, LR} 0x34188E62: B086 SUB SP, SP, #24 0x34188E64: 9005 STR R0, [SP, #20] 0x34188E66: 2000 MOVS R0, #0 0x34188E68: 9004 STR R0, [SP, #16] 0x34188E6A: 9805 LDR R0, [SP, #20] 0x34188E6C: F007 FA58 BL LL_RCC_GetDCMIPPClockSource ; 0x34190320 0x34188E70: 4601 MOV R1, R0 0x34188E72: 9102 STR R1, [SP, #8] 0x34188E74: B160 CBZ R0, .L1 ; 0x34188E90 0x34188E76: 9802 LDR R0, [SP, #8] 0x34188E78: F5B0 1F80 CMP.W R0, #0x100000 0x34188E7C: D010 BEQ 46L2 ; 0x34188EA0 0x34188E7E: 9802 LDR R0, [SP, #8] 0x34188E80: F5B0 1F00 CMP.W R0, #0x200000 0x34188E84: D011 BEQ 46L3 ; 0x34188EAA 0x34188E86: 9802 LDR R0, [SP, #8] 0x34188E88: F5B0 1F40 CMP.W R0, #0x300000 0x34188E8C: D04A BEQ 46L9 ; 0x34188F24 0x34188E8E: E056 B 46L11 ; 0x34188F3E
.L1: 0x34188E90: F007 F9B4 BL HAL_RCC_GetSysClockFreq ; 0x341901FC 0x34188E94: F001 FD16 BL RCCEx_GetHCLKFreq ; 0x3418A8C4 0x34188E98: F001 FFE6 BL RCCEx_GetPCLK5Freq ; 0x3418AE68 0x34188E9C: 9004 STR R0, [SP, #16] 0x34188E9E: E04E B 46L11 ; 0x34188F3E
.L2: 0x34188EA0: 2007 MOVS R0, #7 0x34188EA2: F7FF FE6D BL RCCEx_GetCLKPCLKFreq ; 0x34188B80 0x34188EA6: 9004 STR R0, [SP, #16] 0x34188EA8: E049 B 46L11 ; 0x34188F3E
.L3: 0x34188EAA: F002 F843 BL LL_RCC_IC17_IsEnabled ; 0x3418AF34 0x34188EAE: B3C0 CBZ R0, .L8 ; 0x34188F22 0x34188EB0: F008 FEC4 BL LL_RCC_IC17_GetDivider ; 0x34191C3C 0x34188EB4: 9003 STR R0, [SP, #12] 0x34188EB6: F002 F845 BL LL_RCC_IC17_GetSource ; 0x3418AF44 0x34188EBA: 4601 MOV R1, R0 0x34188EBC: 9101 STR R1, [SP, #4] 0x34188EBE: B160 CBZ R0, .L4 ; 0x34188EDA 0x34188EC0: 9801 LDR R0, [SP, #4] 0x34188EC2: F1B0 5F80 CMP.W R0, #0x10000000 0x34188EC6: D011 BEQ 46L5 ; 0x34188EEC 0x34188EC8: 9801 LDR R0, [SP, #4] 0x34188ECA: F1B0 5F00 CMP.W R0, #0x20000000 0x34188ECE: D016 BEQ 46L6 ; 0x34188EFE 0x34188ED0: 9801 LDR R0, [SP, #4] 0x34188ED2: F1B0 5F40 CMP.W R0, #0x30000000 0x34188ED6: D01B BEQ 46L7 ; 0x34188F10 0x34188ED8: E023 B 46L8 ; 0x34188F22
.L4: 0x34188EDA: F008 FD0B BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F4 0x34188EDE: 9004 STR R0, [SP, #16] 0x34188EE0: 9804 LDR R0, [SP, #16] 0x34188EE2: 9903 LDR R1, [SP, #12] 0x34188EE4: FBB0 F0F1 UDIV R0, R0, R1 0x34188EE8: 9004 STR R0, [SP, #16] 0x34188EEA: E01A B 46L8 ; 0x34188F22
.L5: 0x34188EEC: F008 FD44 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191978 0x34188EF0: 9004 STR R0, [SP, #16] 0x34188EF2: 9804 LDR R0, [SP, #16] 0x34188EF4: 9903 LDR R1, [SP, #12] 0x34188EF6: FBB0 F0F1 UDIV R0, R0, R1 0x34188EFA: 9004 STR R0, [SP, #16] 0x34188EFC: E011 B 46L8 ; 0x34188F22
.L6: 0x34188EFE: F008 FD7D BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919FC 0x34188F02: 9004 STR R0, [SP, #16] 0x34188F04: 9804 LDR R0, [SP, #16] 0x34188F06: 9903 LDR R1, [SP, #12] 0x34188F08: FBB0 F0F1 UDIV R0, R0, R1 0x34188F0C: 9004 STR R0, [SP, #16] 0x34188F0E: E008 B 46L8 ; 0x34188F22
.L7: 0x34188F10: F008 FDB6 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A80 0x34188F14: 9004 STR R0, [SP, #16] 0x34188F16: 9804 LDR R0, [SP, #16] 0x34188F18: 9903 LDR R1, [SP, #12] 0x34188F1A: FBB0 F0F1 UDIV R0, R0, R1 0x34188F1E: 9004 STR R0, [SP, #16] 0x34188F20: E7FF B 46L8 ; 0x34188F22
.L8: 0x34188F22: E00C B 46L11 ; 0x34188F3E
.L9: 0x34188F24: F001 FDCE BL LL_RCC_HSI_IsReady.77 ; 0x3418AAC4 0x34188F28: B140 CBZ R0, .L10 ; 0x34188F3C 0x34188F2A: F001 FDD3 BL LL_RCC_HSI_GetDivider.78 ; 0x3418AAD4 0x34188F2E: 09C1 LSRS R1, R0, #7 0x34188F30: F249 0000 MOVW R0, #0x9000 0x34188F34: F2C0 30D0 MOVT R0, #0x03D0 0x34188F38: 40C8 LSRS R0, R1 0x34188F3A: 9004 STR R0, [SP, #16]
.L10: 0x34188F3C: E7FF B 46L11 ; 0x34188F3E
.L11: 0x34188F3E: 9804 LDR R0, [SP, #16] 0x34188F40: B006 ADD SP, SP, #24 0x34188F42: BD80 POP 123R7, PC}

Section .text.RCCEx_GetETH1CLKFreq from blto2_FSBL_lto.o, size=216, align=4


RCCEx_GetETH1CLKFreq: 0x34188F44: B580 PUSH 123R7, LR} 0x34188F46: B086 SUB SP, SP, #24 0x34188F48: 9005 STR R0, [SP, #20] 0x34188F4A: 2000 MOVS R0, #0 0x34188F4C: 9004 STR R0, [SP, #16] 0x34188F4E: 9805 LDR R0, [SP, #20] 0x34188F50: F007 F9F2 BL LL_RCC_GetETHClockSource ; 0x34190338 0x34188F54: 4601 MOV R1, R0 0x34188F56: 9102 STR R1, [SP, #8] 0x34188F58: B160 CBZ R0, .L1 ; 0x34188F74 0x34188F5A: 9802 LDR R0, [SP, #8] 0x34188F5C: F5B0 5F80 CMP.W R0, #0x1000 0x34188F60: D00E BEQ 46L2 ; 0x34188F80 0x34188F62: 9802 LDR R0, [SP, #8] 0x34188F64: F5B0 5F00 CMP.W R0, #0x2000 0x34188F68: D00F BEQ 46L3 ; 0x34188F8A 0x34188F6A: 9802 LDR R0, [SP, #8] 0x34188F6C: F5B0 5F40 CMP.W R0, #0x3000 0x34188F70: D048 BEQ 46L9 ; 0x34189004 0x34188F72: E050 B 46L11 ; 0x34189016
.L1: 0x34188F74: F007 F942 BL HAL_RCC_GetSysClockFreq ; 0x341901FC 0x34188F78: F001 FCA4 BL RCCEx_GetHCLKFreq ; 0x3418A8C4 0x34188F7C: 9004 STR R0, [SP, #16] 0x34188F7E: E04A B 46L11 ; 0x34189016
.L2: 0x34188F80: 2007 MOVS R0, #7 0x34188F82: F7FF FDFD BL RCCEx_GetCLKPCLKFreq ; 0x34188B80 0x34188F86: 9004 STR R0, [SP, #16] 0x34188F88: E045 B 46L11 ; 0x34189016
.L3: 0x34188F8A: F001 FFC3 BL LL_RCC_IC12_IsEnabled ; 0x3418AF14 0x34188F8E: B3C0 CBZ R0, .L8 ; 0x34189002 0x34188F90: F008 FE48 BL LL_RCC_IC12_GetDivider ; 0x34191C24 0x34188F94: 9003 STR R0, [SP, #12] 0x34188F96: F001 FFC5 BL LL_RCC_IC12_GetSource ; 0x3418AF24 0x34188F9A: 4601 MOV R1, R0 0x34188F9C: 9101 STR R1, [SP, #4] 0x34188F9E: B160 CBZ R0, .L4 ; 0x34188FBA 0x34188FA0: 9801 LDR R0, [SP, #4] 0x34188FA2: F1B0 5F80 CMP.W R0, #0x10000000 0x34188FA6: D011 BEQ 46L5 ; 0x34188FCC 0x34188FA8: 9801 LDR R0, [SP, #4] 0x34188FAA: F1B0 5F00 CMP.W R0, #0x20000000 0x34188FAE: D016 BEQ 46L6 ; 0x34188FDE 0x34188FB0: 9801 LDR R0, [SP, #4] 0x34188FB2: F1B0 5F40 CMP.W R0, #0x30000000 0x34188FB6: D01B BEQ 46L7 ; 0x34188FF0 0x34188FB8: E023 B 46L8 ; 0x34189002
.L4: 0x34188FBA: F008 FC9B BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F4 0x34188FBE: 9004 STR R0, [SP, #16] 0x34188FC0: 9804 LDR R0, [SP, #16] 0x34188FC2: 9903 LDR R1, [SP, #12] 0x34188FC4: FBB0 F0F1 UDIV R0, R0, R1 0x34188FC8: 9004 STR R0, [SP, #16] 0x34188FCA: E01A B 46L8 ; 0x34189002
.L5: 0x34188FCC: F008 FCD4 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191978 0x34188FD0: 9004 STR R0, [SP, #16] 0x34188FD2: 9804 LDR R0, [SP, #16] 0x34188FD4: 9903 LDR R1, [SP, #12] 0x34188FD6: FBB0 F0F1 UDIV R0, R0, R1 0x34188FDA: 9004 STR R0, [SP, #16] 0x34188FDC: E011 B 46L8 ; 0x34189002
.L6: 0x34188FDE: F008 FD0D BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919FC 0x34188FE2: 9004 STR R0, [SP, #16] 0x34188FE4: 9804 LDR R0, [SP, #16] 0x34188FE6: 9903 LDR R1, [SP, #12] 0x34188FE8: FBB0 F0F1 UDIV R0, R0, R1 0x34188FEC: 9004 STR R0, [SP, #16] 0x34188FEE: E008 B 46L8 ; 0x34189002
.L7: 0x34188FF0: F008 FD46 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A80 0x34188FF4: 9004 STR R0, [SP, #16] 0x34188FF6: 9804 LDR R0, [SP, #16] 0x34188FF8: 9903 LDR R1, [SP, #12] 0x34188FFA: FBB0 F0F1 UDIV R0, R0, R1 0x34188FFE: 9004 STR R0, [SP, #16] 0x34189000: E7FF B 46L8 ; 0x34189002
.L8: 0x34189002: E008 B 46L11 ; 0x34189016
.L9: 0x34189004: F001 FD7E BL LL_RCC_HSE_IsReady.80 ; 0x3418AB04 0x34189008: B120 CBZ R0, .L10 ; 0x34189014 0x3418900A: F646 4000 MOVW R0, #0x6C00 0x3418900E: F2C0 20DC MOVT R0, #0x02DC 0x34189012: 9004 STR R0, [SP, #16]
.L10: 0x34189014: E7FF B 46L11 ; 0x34189016
.L11: 0x34189016: 9804 LDR R0, [SP, #16] 0x34189018: B006 ADD SP, SP, #24 0x3418901A: BD80 POP 123R7, PC}

Section .text.RCCEx_GetI3CCLKFreq from blto2_FSBL_lto.o, size=516, align=4


RCCEx_GetI3CCLKFreq: 0x3418901C: B580 PUSH 123R7, LR} 0x3418901E: B086 SUB SP, SP, #24 0x34189020: 9005 STR R0, [SP, #20] 0x34189022: 2000 MOVS R0, #0 0x34189024: 9004 STR R0, [SP, #16] 0x34189026: 9805 LDR R0, [SP, #20] 0x34189028: F7FF FC88 BL LL_RCC_GetI3CClockSource ; 0x3418893C 0x3418902C: 4601 MOV R1, R0 0x3418902E: 9102 STR R1, [SP, #8] 0x34189030: F241 010C MOVW R1, #0x100C 0x34189034: F2C0 7100 MOVT R1, #0x0700 0x34189038: 4288 CMP R0, R1 0x3418903A: D051 BEQ 46L1 ; 0x341890E0 0x3418903C: 9802 LDR R0, [SP, #8] 0x3418903E: F241 410C MOVW R1, #0x140C 0x34189042: F2C0 7100 MOVT R1, #0x0700 0x34189046: 4288 CMP R0, R1 0x34189048: D04A BEQ 46L1 ; 0x341890E0 0x3418904A: 9802 LDR R0, [SP, #8] 0x3418904C: F241 010C MOVW R1, #0x100C 0x34189050: F2C0 7101 MOVT R1, #0x0701 0x34189054: 4288 CMP R0, R1 0x34189056: D04B BEQ 46L2 ; 0x341890F0 0x34189058: 9802 LDR R0, [SP, #8] 0x3418905A: F241 410C MOVW R1, #0x140C 0x3418905E: F2C0 7101 MOVT R1, #0x0701 0x34189062: 4288 CMP R0, R1 0x34189064: D044 BEQ 46L2 ; 0x341890F0 0x34189066: 9802 LDR R0, [SP, #8] 0x34189068: F241 010C MOVW R1, #0x100C 0x3418906C: F2C0 7102 MOVT R1, #0x0702 0x34189070: 4288 CMP R0, R1 0x34189072: D042 BEQ 46L3 ; 0x341890FA 0x34189074: 9802 LDR R0, [SP, #8] 0x34189076: F241 410C MOVW R1, #0x140C 0x3418907A: F2C0 7102 MOVT R1, #0x0702 0x3418907E: 4288 CMP R0, R1 0x34189080: D03B BEQ 46L3 ; 0x341890FA 0x34189082: 9802 LDR R0, [SP, #8] 0x34189084: F241 010C MOVW R1, #0x100C 0x34189088: F2C0 7103 MOVT R1, #0x0703 0x3418908C: 4288 CMP R0, R1 0x3418908E: D071 BEQ 46L9 ; 0x34189174 0x34189090: 9802 LDR R0, [SP, #8] 0x34189092: F241 410C MOVW R1, #0x140C 0x34189096: F2C0 7103 MOVT R1, #0x0703 0x3418909A: 4288 CMP R0, R1 0x3418909C: D06A BEQ 46L9 ; 0x34189174 0x3418909E: 9802 LDR R0, [SP, #8] 0x341890A0: F241 010C MOVW R1, #0x100C 0x341890A4: F2C0 7104 MOVT R1, #0x0704 0x341890A8: 4288 CMP R0, R1 0x341890AA: F000 80AD BEQ.W 46L17 ; 0x34189208 0x341890AE: 9802 LDR R0, [SP, #8] 0x341890B0: F241 410C MOVW R1, #0x140C 0x341890B4: F2C0 7104 MOVT R1, #0x0704 0x341890B8: 4288 CMP R0, R1 0x341890BA: F000 80A5 BEQ.W 46L17 ; 0x34189208 0x341890BE: 9802 LDR R0, [SP, #8] 0x341890C0: F241 010C MOVW R1, #0x100C 0x341890C4: F2C0 7105 MOVT R1, #0x0705 0x341890C8: 4288 CMP R0, R1 0x341890CA: F000 8090 BEQ.W 46L15 ; 0x341891EE 0x341890CE: 9802 LDR R0, [SP, #8] 0x341890D0: F241 410C MOVW R1, #0x140C 0x341890D4: F2C0 7105 MOVT R1, #0x0705 0x341890D8: 4288 CMP R0, R1 0x341890DA: F000 8088 BEQ.W 46L15 ; 0x341891EE 0x341890DE: E09C B 46L19 ; 0x3418921A
.L1: 0x341890E0: F007 F88C BL HAL_RCC_GetSysClockFreq ; 0x341901FC 0x341890E4: F001 FBEE BL RCCEx_GetHCLKFreq ; 0x3418A8C4 0x341890E8: F001 FE14 BL RCCEx_GetPCLK1Freq ; 0x3418AD14 0x341890EC: 9004 STR R0, [SP, #16] 0x341890EE: E094 B 46L19 ; 0x3418921A
.L2: 0x341890F0: 2007 MOVS R0, #7 0x341890F2: F7FF FD45 BL RCCEx_GetCLKPCLKFreq ; 0x34188B80 0x341890F6: 9004 STR R0, [SP, #16] 0x341890F8: E08F B 46L19 ; 0x3418921A
.L3: 0x341890FA: F001 FEDB BL LL_RCC_IC10_IsEnabled ; 0x3418AEB4 0x341890FE: B3C0 CBZ R0, .L8 ; 0x34189172 0x34189100: F008 FD6C BL LL_RCC_IC10_GetDivider ; 0x34191BDC 0x34189104: 9003 STR R0, [SP, #12] 0x34189106: F001 FEDD BL LL_RCC_IC10_GetSource ; 0x3418AEC4 0x3418910A: 4601 MOV R1, R0 0x3418910C: 9101 STR R1, [SP, #4] 0x3418910E: B160 CBZ R0, .L4 ; 0x3418912A 0x34189110: 9801 LDR R0, [SP, #4] 0x34189112: F1B0 5F80 CMP.W R0, #0x10000000 0x34189116: D011 BEQ 46L5 ; 0x3418913C 0x34189118: 9801 LDR R0, [SP, #4] 0x3418911A: F1B0 5F00 CMP.W R0, #0x20000000 0x3418911E: D016 BEQ 46L6 ; 0x3418914E 0x34189120: 9801 LDR R0, [SP, #4] 0x34189122: F1B0 5F40 CMP.W R0, #0x30000000 0x34189126: D01B BEQ 46L7 ; 0x34189160 0x34189128: E023 B 46L8 ; 0x34189172
.L4: 0x3418912A: F008 FBE3 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F4 0x3418912E: 9004 STR R0, [SP, #16] 0x34189130: 9804 LDR R0, [SP, #16] 0x34189132: 9903 LDR R1, [SP, #12] 0x34189134: FBB0 F0F1 UDIV R0, R0, R1 0x34189138: 9004 STR R0, [SP, #16] 0x3418913A: E01A B 46L8 ; 0x34189172
.L5: 0x3418913C: F008 FC1C BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191978 0x34189140: 9004 STR R0, [SP, #16] 0x34189142: 9804 LDR R0, [SP, #16] 0x34189144: 9903 LDR R1, [SP, #12] 0x34189146: FBB0 F0F1 UDIV R0, R0, R1 0x3418914A: 9004 STR R0, [SP, #16] 0x3418914C: E011 B 46L8 ; 0x34189172
.L6: 0x3418914E: F008 FC55 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919FC 0x34189152: 9004 STR R0, [SP, #16] 0x34189154: 9804 LDR R0, [SP, #16] 0x34189156: 9903 LDR R1, [SP, #12] 0x34189158: FBB0 F0F1 UDIV R0, R0, R1 0x3418915C: 9004 STR R0, [SP, #16] 0x3418915E: E008 B 46L8 ; 0x34189172
.L7: 0x34189160: F008 FC8E BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A80 0x34189164: 9004 STR R0, [SP, #16] 0x34189166: 9804 LDR R0, [SP, #16] 0x34189168: 9903 LDR R1, [SP, #12] 0x3418916A: FBB0 F0F1 UDIV R0, R0, R1 0x3418916E: 9004 STR R0, [SP, #16] 0x34189170: E7FF B 46L8 ; 0x34189172
.L8: 0x34189172: E052 B 46L19 ; 0x3418921A
.L9: 0x34189174: F001 FDB6 BL LL_RCC_IC15_IsEnabled ; 0x3418ACE4 0x34189178: B3C0 CBZ R0, .L14 ; 0x341891EC 0x3418917A: F008 FCCF BL LL_RCC_IC15_GetDivider ; 0x34191B1C 0x3418917E: 9003 STR R0, [SP, #12] 0x34189180: F001 FDB8 BL LL_RCC_IC15_GetSource ; 0x3418ACF4 0x34189184: 4601 MOV R1, R0 0x34189186: 9100 STR R1, [SP, #0] 0x34189188: B160 CBZ R0, .L10 ; 0x341891A4 0x3418918A: 9800 LDR R0, [SP, #0] 0x3418918C: F1B0 5F80 CMP.W R0, #0x10000000 0x34189190: D011 BEQ 46L11 ; 0x341891B6 0x34189192: 9800 LDR R0, [SP, #0] 0x34189194: F1B0 5F00 CMP.W R0, #0x20000000 0x34189198: D016 BEQ 46L12 ; 0x341891C8 0x3418919A: 9800 LDR R0, [SP, #0] 0x3418919C: F1B0 5F40 CMP.W R0, #0x30000000 0x341891A0: D01B BEQ 46L13 ; 0x341891DA 0x341891A2: E023 B 46L14 ; 0x341891EC
.L10: 0x341891A4: F008 FBA6 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F4 0x341891A8: 9004 STR R0, [SP, #16] 0x341891AA: 9804 LDR R0, [SP, #16] 0x341891AC: 9903 LDR R1, [SP, #12] 0x341891AE: FBB0 F0F1 UDIV R0, R0, R1 0x341891B2: 9004 STR R0, [SP, #16] 0x341891B4: E01A B 46L14 ; 0x341891EC
.L11: 0x341891B6: F008 FBDF BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191978 0x341891BA: 9004 STR R0, [SP, #16] 0x341891BC: 9804 LDR R0, [SP, #16] 0x341891BE: 9903 LDR R1, [SP, #12] 0x341891C0: FBB0 F0F1 UDIV R0, R0, R1 0x341891C4: 9004 STR R0, [SP, #16] 0x341891C6: E011 B 46L14 ; 0x341891EC
.L12: 0x341891C8: F008 FC18 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919FC 0x341891CC: 9004 STR R0, [SP, #16] 0x341891CE: 9804 LDR R0, [SP, #16] 0x341891D0: 9903 LDR R1, [SP, #12] 0x341891D2: FBB0 F0F1 UDIV R0, R0, R1 0x341891D6: 9004 STR R0, [SP, #16] 0x341891D8: E008 B 46L14 ; 0x341891EC
.L13: 0x341891DA: F008 FC51 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A80 0x341891DE: 9004 STR R0, [SP, #16] 0x341891E0: 9804 LDR R0, [SP, #16] 0x341891E2: 9903 LDR R1, [SP, #12] 0x341891E4: FBB0 F0F1 UDIV R0, R0, R1 0x341891E8: 9004 STR R0, [SP, #16] 0x341891EA: E7FF B 46L14 ; 0x341891EC
.L14: 0x341891EC: E015 B 46L19 ; 0x3418921A
.L15: 0x341891EE: F001 FC69 BL LL_RCC_HSI_IsReady.77 ; 0x3418AAC4 0x341891F2: B140 CBZ R0, .L16 ; 0x34189206 0x341891F4: F001 FC6E BL LL_RCC_HSI_GetDivider.78 ; 0x3418AAD4 0x341891F8: 09C1 LSRS R1, R0, #7 0x341891FA: F249 0000 MOVW R0, #0x9000 0x341891FE: F2C0 30D0 MOVT R0, #0x03D0 0x34189202: 40C8 LSRS R0, R1 0x34189204: 9004 STR R0, [SP, #16]
.L16: 0x34189206: E008 B 46L19 ; 0x3418921A
.L17: 0x34189208: F001 FC6C BL LL_RCC_MSI_IsReady.79 ; 0x3418AAE4 0x3418920C: B120 CBZ R0, .L18 ; 0x34189218 0x3418920E: F640 1000 MOVW R0, #0x0900 0x34189212: F2C0 003D MOVT R0, #61 0x34189216: 9004 STR R0, [SP, #16]
.L18: 0x34189218: E7FF B 46L19 ; 0x3418921A
.L19: 0x3418921A: 9804 LDR R0, [SP, #16] 0x3418921C: B006 ADD SP, SP, #24 0x3418921E: BD80 POP 123R7, PC}

Section .text.RCCEx_GetLPUARTCLKFreq from blto2_FSBL_lto.o, size=412, align=4


RCCEx_GetLPUARTCLKFreq: 0x34189220: B580 PUSH 123R7, LR} 0x34189222: B086 SUB SP, SP, #24 0x34189224: 9005 STR R0, [SP, #20] 0x34189226: 2000 MOVS R0, #0 0x34189228: 9004 STR R0, [SP, #16] 0x3418922A: 9805 LDR R0, [SP, #20] 0x3418922C: F007 F8B4 BL LL_RCC_GetLPUARTClockSource ; 0x34190398 0x34189230: 4601 MOV R1, R0 0x34189232: 9102 STR R1, [SP, #8] 0x34189234: B1D8 CBZ R0, .L1 ; 0x3418926E 0x34189236: 9802 LDR R0, [SP, #8] 0x34189238: F5B0 7F80 CMP.W R0, #0x0100 0x3418923C: D01F BEQ 46L2 ; 0x3418927E 0x3418923E: 9802 LDR R0, [SP, #8] 0x34189240: F5B0 7F00 CMP.W R0, #0x0200 0x34189244: D020 BEQ 46L3 ; 0x34189288 0x34189246: 9802 LDR R0, [SP, #8] 0x34189248: F5B0 7F40 CMP.W R0, #0x0300 0x3418924C: D059 BEQ 46L9 ; 0x34189302 0x3418924E: 9802 LDR R0, [SP, #8] 0x34189250: F5B0 6F80 CMP.W R0, #0x0400 0x34189254: F000 80A8 BEQ.W 46L19 ; 0x341893A8 0x34189258: 9802 LDR R0, [SP, #8] 0x3418925A: F5B0 6FA0 CMP.W R0, #0x0500 0x3418925E: F000 809A BEQ.W 46L17 ; 0x34189396 0x34189262: 9802 LDR R0, [SP, #8] 0x34189264: F5B0 6FC0 CMP.W R0, #0x0600 0x34189268: F000 8088 BEQ.W 46L15 ; 0x3418937C 0x3418926C: E0A3 B 46L21 ; 0x341893B6
.L1: 0x3418926E: F006 FFC5 BL HAL_RCC_GetSysClockFreq ; 0x341901FC 0x34189272: F001 FB27 BL RCCEx_GetHCLKFreq ; 0x3418A8C4 0x34189276: F001 FD99 BL RCCEx_GetPCLK4Freq ; 0x3418ADAC 0x3418927A: 9004 STR R0, [SP, #16] 0x3418927C: E09B B 46L21 ; 0x341893B6
.L2: 0x3418927E: 2007 MOVS R0, #7 0x34189280: F7FF FC7E BL RCCEx_GetCLKPCLKFreq ; 0x34188B80 0x34189284: 9004 STR R0, [SP, #16] 0x34189286: E096 B 46L21 ; 0x341893B6
.L3: 0x34189288: F001 FD60 BL LL_RCC_IC9_IsEnabled ; 0x3418AD4C 0x3418928C: B3C0 CBZ R0, .L8 ; 0x34189300 0x3418928E: F008 FC51 BL LL_RCC_IC9_GetDivider ; 0x34191B34 0x34189292: 9003 STR R0, [SP, #12] 0x34189294: F001 FD62 BL LL_RCC_IC9_GetSource ; 0x3418AD5C 0x34189298: 4601 MOV R1, R0 0x3418929A: 9101 STR R1, [SP, #4] 0x3418929C: B160 CBZ R0, .L4 ; 0x341892B8 0x3418929E: 9801 LDR R0, [SP, #4] 0x341892A0: F1B0 5F80 CMP.W R0, #0x10000000 0x341892A4: D011 BEQ 46L5 ; 0x341892CA 0x341892A6: 9801 LDR R0, [SP, #4] 0x341892A8: F1B0 5F00 CMP.W R0, #0x20000000 0x341892AC: D016 BEQ 46L6 ; 0x341892DC 0x341892AE: 9801 LDR R0, [SP, #4] 0x341892B0: F1B0 5F40 CMP.W R0, #0x30000000 0x341892B4: D01B BEQ 46L7 ; 0x341892EE 0x341892B6: E023 B 46L8 ; 0x34189300
.L4: 0x341892B8: F008 FB1C BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F4 0x341892BC: 9004 STR R0, [SP, #16] 0x341892BE: 9804 LDR R0, [SP, #16] 0x341892C0: 9903 LDR R1, [SP, #12] 0x341892C2: FBB0 F0F1 UDIV R0, R0, R1 0x341892C6: 9004 STR R0, [SP, #16] 0x341892C8: E01A B 46L8 ; 0x34189300
.L5: 0x341892CA: F008 FB55 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191978 0x341892CE: 9004 STR R0, [SP, #16] 0x341892D0: 9804 LDR R0, [SP, #16] 0x341892D2: 9903 LDR R1, [SP, #12] 0x341892D4: FBB0 F0F1 UDIV R0, R0, R1 0x341892D8: 9004 STR R0, [SP, #16] 0x341892DA: E011 B 46L8 ; 0x34189300
.L6: 0x341892DC: F008 FB8E BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919FC 0x341892E0: 9004 STR R0, [SP, #16] 0x341892E2: 9804 LDR R0, [SP, #16] 0x341892E4: 9903 LDR R1, [SP, #12] 0x341892E6: FBB0 F0F1 UDIV R0, R0, R1 0x341892EA: 9004 STR R0, [SP, #16] 0x341892EC: E008 B 46L8 ; 0x34189300
.L7: 0x341892EE: F008 FBC7 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A80 0x341892F2: 9004 STR R0, [SP, #16] 0x341892F4: 9804 LDR R0, [SP, #16] 0x341892F6: 9903 LDR R1, [SP, #12] 0x341892F8: FBB0 F0F1 UDIV R0, R0, R1 0x341892FC: 9004 STR R0, [SP, #16] 0x341892FE: E7FF B 46L8 ; 0x34189300
.L8: 0x34189300: E059 B 46L21 ; 0x341893B6
.L9: 0x34189302: F001 FD33 BL LL_RCC_IC14_IsEnabled ; 0x3418AD6C 0x34189306: B3C0 CBZ R0, .L14 ; 0x3418937A 0x34189308: F008 FC20 BL LL_RCC_IC14_GetDivider ; 0x34191B4C 0x3418930C: 9003 STR R0, [SP, #12] 0x3418930E: F001 FD35 BL LL_RCC_IC14_GetSource ; 0x3418AD7C 0x34189312: 4601 MOV R1, R0 0x34189314: 9100 STR R1, [SP, #0] 0x34189316: B160 CBZ R0, .L10 ; 0x34189332 0x34189318: 9800 LDR R0, [SP, #0] 0x3418931A: F1B0 5F80 CMP.W R0, #0x10000000 0x3418931E: D011 BEQ 46L11 ; 0x34189344 0x34189320: 9800 LDR R0, [SP, #0] 0x34189322: F1B0 5F00 CMP.W R0, #0x20000000 0x34189326: D016 BEQ 46L12 ; 0x34189356 0x34189328: 9800 LDR R0, [SP, #0] 0x3418932A: F1B0 5F40 CMP.W R0, #0x30000000 0x3418932E: D01B BEQ 46L13 ; 0x34189368 0x34189330: E023 B 46L14 ; 0x3418937A
.L10: 0x34189332: F008 FADF BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F4 0x34189336: 9004 STR R0, [SP, #16] 0x34189338: 9804 LDR R0, [SP, #16] 0x3418933A: 9903 LDR R1, [SP, #12] 0x3418933C: FBB0 F0F1 UDIV R0, R0, R1 0x34189340: 9004 STR R0, [SP, #16] 0x34189342: E01A B 46L14 ; 0x3418937A
.L11: 0x34189344: F008 FB18 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191978 0x34189348: 9004 STR R0, [SP, #16] 0x3418934A: 9804 LDR R0, [SP, #16] 0x3418934C: 9903 LDR R1, [SP, #12] 0x3418934E: FBB0 F0F1 UDIV R0, R0, R1 0x34189352: 9004 STR R0, [SP, #16] 0x34189354: E011 B 46L14 ; 0x3418937A
.L12: 0x34189356: F008 FB51 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919FC 0x3418935A: 9004 STR R0, [SP, #16] 0x3418935C: 9804 LDR R0, [SP, #16] 0x3418935E: 9903 LDR R1, [SP, #12] 0x34189360: FBB0 F0F1 UDIV R0, R0, R1 0x34189364: 9004 STR R0, [SP, #16] 0x34189366: E008 B 46L14 ; 0x3418937A
.L13: 0x34189368: F008 FB8A BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A80 0x3418936C: 9004 STR R0, [SP, #16] 0x3418936E: 9804 LDR R0, [SP, #16] 0x34189370: 9903 LDR R1, [SP, #12] 0x34189372: FBB0 F0F1 UDIV R0, R0, R1 0x34189376: 9004 STR R0, [SP, #16] 0x34189378: E7FF B 46L14 ; 0x3418937A
.L14: 0x3418937A: E01C B 46L21 ; 0x341893B6
.L15: 0x3418937C: F001 FBA2 BL LL_RCC_HSI_IsReady.77 ; 0x3418AAC4 0x34189380: B140 CBZ R0, .L16 ; 0x34189394 0x34189382: F001 FBA7 BL LL_RCC_HSI_GetDivider.78 ; 0x3418AAD4 0x34189386: 09C1 LSRS R1, R0, #7 0x34189388: F249 0000 MOVW R0, #0x9000 0x3418938C: F2C0 30D0 MOVT R0, #0x03D0 0x34189390: 40C8 LSRS R0, R1 0x34189392: 9004 STR R0, [SP, #16]
.L16: 0x34189394: E00F B 46L21 ; 0x341893B6
.L17: 0x34189396: F001 FBA5 BL LL_RCC_MSI_IsReady.79 ; 0x3418AAE4 0x3418939A: B120 CBZ R0, .L18 ; 0x341893A6 0x3418939C: F640 1000 MOVW R0, #0x0900 0x341893A0: F2C0 003D MOVT R0, #61 0x341893A4: 9004 STR R0, [SP, #16]
.L18: 0x341893A6: E006 B 46L21 ; 0x341893B6
.L19: 0x341893A8: F7FF F906 BL LL_RCC_LSE_IsReady.59 ; 0x341885B8 0x341893AC: B110 CBZ R0, .L20 ; 0x341893B4 0x341893AE: F44F 4000 MOV.W R0, #0x8000 0x341893B2: 9004 STR R0, [SP, #16]
.L20: 0x341893B4: E7FF B 46L21 ; 0x341893B6
.L21: 0x341893B6: 9804 LDR R0, [SP, #16] 0x341893B8: B006 ADD SP, SP, #24 0x341893BA: BD80 POP 123R7, PC}

Section .text.RCCEx_GetLTDCCLKFreq from blto2_FSBL_lto.o, size=228, align=4


RCCEx_GetLTDCCLKFreq: 0x341893BC: B580 PUSH 123R7, LR} 0x341893BE: B086 SUB SP, SP, #24 0x341893C0: 9005 STR R0, [SP, #20] 0x341893C2: 2000 MOVS R0, #0 0x341893C4: 9004 STR R0, [SP, #16] 0x341893C6: 9805 LDR R0, [SP, #20] 0x341893C8: F006 FFF2 BL LL_RCC_GetLTDCClockSource ; 0x341903B0 0x341893CC: 4601 MOV R1, R0 0x341893CE: 9102 STR R1, [SP, #8] 0x341893D0: B160 CBZ R0, .L1 ; 0x341893EC 0x341893D2: 9802 LDR R0, [SP, #8] 0x341893D4: F1B0 7F80 CMP.W R0, #0x01000000 0x341893D8: D010 BEQ 46L2 ; 0x341893FC 0x341893DA: 9802 LDR R0, [SP, #8] 0x341893DC: F1B0 7F00 CMP.W R0, #0x02000000 0x341893E0: D011 BEQ 46L3 ; 0x34189406 0x341893E2: 9802 LDR R0, [SP, #8] 0x341893E4: F1B0 7F40 CMP.W R0, #0x03000000 0x341893E8: D04A BEQ 46L9 ; 0x34189480 0x341893EA: E056 B 46L11 ; 0x3418949A
.L1: 0x341893EC: F006 FF06 BL HAL_RCC_GetSysClockFreq ; 0x341901FC 0x341893F0: F001 FA68 BL RCCEx_GetHCLKFreq ; 0x3418A8C4 0x341893F4: F001 FD38 BL RCCEx_GetPCLK5Freq ; 0x3418AE68 0x341893F8: 9004 STR R0, [SP, #16] 0x341893FA: E04E B 46L11 ; 0x3418949A
.L2: 0x341893FC: 2007 MOVS R0, #7 0x341893FE: F7FF FBBF BL RCCEx_GetCLKPCLKFreq ; 0x34188B80 0x34189402: 9004 STR R0, [SP, #16] 0x34189404: E049 B 46L11 ; 0x3418949A
.L3: 0x34189406: F001 FD3D BL LL_RCC_IC16_IsEnabled ; 0x3418AE84 0x3418940A: B3C0 CBZ R0, .L8 ; 0x3418947E 0x3418940C: F008 FBDA BL LL_RCC_IC16_GetDivider ; 0x34191BC4 0x34189410: 9003 STR R0, [SP, #12] 0x34189412: F001 FD3F BL LL_RCC_IC16_GetSource ; 0x3418AE94 0x34189416: 4601 MOV R1, R0 0x34189418: 9101 STR R1, [SP, #4] 0x3418941A: B160 CBZ R0, .L4 ; 0x34189436 0x3418941C: 9801 LDR R0, [SP, #4] 0x3418941E: F1B0 5F80 CMP.W R0, #0x10000000 0x34189422: D011 BEQ 46L5 ; 0x34189448 0x34189424: 9801 LDR R0, [SP, #4] 0x34189426: F1B0 5F00 CMP.W R0, #0x20000000 0x3418942A: D016 BEQ 46L6 ; 0x3418945A 0x3418942C: 9801 LDR R0, [SP, #4] 0x3418942E: F1B0 5F40 CMP.W R0, #0x30000000 0x34189432: D01B BEQ 46L7 ; 0x3418946C 0x34189434: E023 B 46L8 ; 0x3418947E
.L4: 0x34189436: F008 FA5D BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F4 0x3418943A: 9004 STR R0, [SP, #16] 0x3418943C: 9804 LDR R0, [SP, #16] 0x3418943E: 9903 LDR R1, [SP, #12] 0x34189440: FBB0 F0F1 UDIV R0, R0, R1 0x34189444: 9004 STR R0, [SP, #16] 0x34189446: E01A B 46L8 ; 0x3418947E
.L5: 0x34189448: F008 FA96 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191978 0x3418944C: 9004 STR R0, [SP, #16] 0x3418944E: 9804 LDR R0, [SP, #16] 0x34189450: 9903 LDR R1, [SP, #12] 0x34189452: FBB0 F0F1 UDIV R0, R0, R1 0x34189456: 9004 STR R0, [SP, #16] 0x34189458: E011 B 46L8 ; 0x3418947E
.L6: 0x3418945A: F008 FACF BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919FC 0x3418945E: 9004 STR R0, [SP, #16] 0x34189460: 9804 LDR R0, [SP, #16] 0x34189462: 9903 LDR R1, [SP, #12] 0x34189464: FBB0 F0F1 UDIV R0, R0, R1 0x34189468: 9004 STR R0, [SP, #16] 0x3418946A: E008 B 46L8 ; 0x3418947E
.L7: 0x3418946C: F008 FB08 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A80 0x34189470: 9004 STR R0, [SP, #16] 0x34189472: 9804 LDR R0, [SP, #16] 0x34189474: 9903 LDR R1, [SP, #12] 0x34189476: FBB0 F0F1 UDIV R0, R0, R1 0x3418947A: 9004 STR R0, [SP, #16] 0x3418947C: E7FF B 46L8 ; 0x3418947E
.L8: 0x3418947E: E00C B 46L11 ; 0x3418949A
.L9: 0x34189480: F001 FB20 BL LL_RCC_HSI_IsReady.77 ; 0x3418AAC4 0x34189484: B140 CBZ R0, .L10 ; 0x34189498 0x34189486: F001 FB25 BL LL_RCC_HSI_GetDivider.78 ; 0x3418AAD4 0x3418948A: 09C1 LSRS R1, R0, #7 0x3418948C: F249 0000 MOVW R0, #0x9000 0x34189490: F2C0 30D0 MOVT R0, #0x03D0 0x34189494: 40C8 LSRS R0, R1 0x34189496: 9004 STR R0, [SP, #16]
.L10: 0x34189498: E7FF B 46L11 ; 0x3418949A
.L11: 0x3418949A: 9804 LDR R0, [SP, #16] 0x3418949C: B006 ADD SP, SP, #24 0x3418949E: BD80 POP 123R7, PC}

Section .text.RCCEx_GetMDFCLKFreq from blto2_FSBL_lto.o, size=436, align=4


RCCEx_GetMDFCLKFreq: 0x341894A0: B580 PUSH 123R7, LR} 0x341894A2: B088 SUB SP, SP, #32 0x341894A4: 9007 STR R0, [SP, #28] 0x341894A6: 2000 MOVS R0, #0 0x341894A8: 9006 STR R0, [SP, #24] 0x341894AA: 9807 LDR R0, [SP, #28] 0x341894AC: F006 FF8C BL LL_RCC_GetMDFClockSource ; 0x341903C8 0x341894B0: 4601 MOV R1, R0 0x341894B2: 9104 STR R1, [SP, #16] 0x341894B4: B300 CBZ R0, .L1 ; 0x341894F8 0x341894B6: 9804 LDR R0, [SP, #16] 0x341894B8: F5B0 3F80 CMP.W R0, #0x010000 0x341894BC: D022 BEQ 46L2 ; 0x34189504 0x341894BE: 9804 LDR R0, [SP, #16] 0x341894C0: F5B0 3F00 CMP.W R0, #0x020000 0x341894C4: D023 BEQ 46L3 ; 0x3418950E 0x341894C6: 9804 LDR R0, [SP, #16] 0x341894C8: F5B0 3F40 CMP.W R0, #0x030000 0x341894CC: D05C BEQ 46L9 ; 0x34189588 0x341894CE: 9804 LDR R0, [SP, #16] 0x341894D0: F5B0 2F80 CMP.W R0, #0x040000 0x341894D4: F000 80A2 BEQ.W 46L17 ; 0x3418961C 0x341894D8: 9804 LDR R0, [SP, #16] 0x341894DA: F5B0 2FA0 CMP.W R0, #0x050000 0x341894DE: F000 8090 BEQ.W 46L15 ; 0x34189602 0x341894E2: 9804 LDR R0, [SP, #16] 0x341894E4: F5B0 2FC0 CMP.W R0, #0x060000 0x341894E8: F000 80A1 BEQ.W 46L19 ; 0x3418962E 0x341894EC: 9804 LDR R0, [SP, #16] 0x341894EE: F5B0 2FE0 CMP.W R0, #0x070000 0x341894F2: F000 80A2 BEQ.W 46L20 ; 0x3418963A 0x341894F6: E0AA B 46L21 ; 0x3418964E
.L1: 0x341894F8: F006 FE80 BL HAL_RCC_GetSysClockFreq ; 0x341901FC 0x341894FC: F001 F9E2 BL RCCEx_GetHCLKFreq ; 0x3418A8C4 0x34189500: 9006 STR R0, [SP, #24] 0x34189502: E0A4 B 46L21 ; 0x3418964E
.L2: 0x34189504: 2007 MOVS R0, #7 0x34189506: F7FF FB3B BL RCCEx_GetCLKPCLKFreq ; 0x34188B80 0x3418950A: 9006 STR R0, [SP, #24] 0x3418950C: E09F B 46L21 ; 0x3418964E
.L3: 0x3418950E: F001 FC73 BL LL_RCC_IC7_IsEnabled ; 0x3418ADF8 0x34189512: B3C0 CBZ R0, .L8 ; 0x34189586 0x34189514: F008 FB32 BL LL_RCC_IC7_GetDivider ; 0x34191B7C 0x34189518: 9005 STR R0, [SP, #20] 0x3418951A: F001 FC75 BL LL_RCC_IC7_GetSource ; 0x3418AE08 0x3418951E: 4601 MOV R1, R0 0x34189520: 9103 STR R1, [SP, #12] 0x34189522: B160 CBZ R0, .L4 ; 0x3418953E 0x34189524: 9803 LDR R0, [SP, #12] 0x34189526: F1B0 5F80 CMP.W R0, #0x10000000 0x3418952A: D011 BEQ 46L5 ; 0x34189550 0x3418952C: 9803 LDR R0, [SP, #12] 0x3418952E: F1B0 5F00 CMP.W R0, #0x20000000 0x34189532: D016 BEQ 46L6 ; 0x34189562 0x34189534: 9803 LDR R0, [SP, #12] 0x34189536: F1B0 5F40 CMP.W R0, #0x30000000 0x3418953A: D01B BEQ 46L7 ; 0x34189574 0x3418953C: E023 B 46L8 ; 0x34189586
.L4: 0x3418953E: F008 F9D9 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F4 0x34189542: 9006 STR R0, [SP, #24] 0x34189544: 9806 LDR R0, [SP, #24] 0x34189546: 9905 LDR R1, [SP, #20] 0x34189548: FBB0 F0F1 UDIV R0, R0, R1 0x3418954C: 9006 STR R0, [SP, #24] 0x3418954E: E01A B 46L8 ; 0x34189586
.L5: 0x34189550: F008 FA12 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191978 0x34189554: 9006 STR R0, [SP, #24] 0x34189556: 9806 LDR R0, [SP, #24] 0x34189558: 9905 LDR R1, [SP, #20] 0x3418955A: FBB0 F0F1 UDIV R0, R0, R1 0x3418955E: 9006 STR R0, [SP, #24] 0x34189560: E011 B 46L8 ; 0x34189586
.L6: 0x34189562: F008 FA4B BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919FC 0x34189566: 9006 STR R0, [SP, #24] 0x34189568: 9806 LDR R0, [SP, #24] 0x3418956A: 9905 LDR R1, [SP, #20] 0x3418956C: FBB0 F0F1 UDIV R0, R0, R1 0x34189570: 9006 STR R0, [SP, #24] 0x34189572: E008 B 46L8 ; 0x34189586
.L7: 0x34189574: F008 FA84 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A80 0x34189578: 9006 STR R0, [SP, #24] 0x3418957A: 9806 LDR R0, [SP, #24] 0x3418957C: 9905 LDR R1, [SP, #20] 0x3418957E: FBB0 F0F1 UDIV R0, R0, R1 0x34189582: 9006 STR R0, [SP, #24] 0x34189584: E7FF B 46L8 ; 0x34189586
.L8: 0x34189586: E062 B 46L21 ; 0x3418964E
.L9: 0x34189588: F001 FC1E BL LL_RCC_IC8_IsEnabled ; 0x3418ADC8 0x3418958C: B3C0 CBZ R0, .L14 ; 0x34189600 0x3418958E: F008 FAE9 BL LL_RCC_IC8_GetDivider ; 0x34191B64 0x34189592: 9005 STR R0, [SP, #20] 0x34189594: F001 FC20 BL LL_RCC_IC8_GetSource ; 0x3418ADD8 0x34189598: 4601 MOV R1, R0 0x3418959A: 9102 STR R1, [SP, #8] 0x3418959C: B160 CBZ R0, .L10 ; 0x341895B8 0x3418959E: 9802 LDR R0, [SP, #8] 0x341895A0: F1B0 5F80 CMP.W R0, #0x10000000 0x341895A4: D011 BEQ 46L11 ; 0x341895CA 0x341895A6: 9802 LDR R0, [SP, #8] 0x341895A8: F1B0 5F00 CMP.W R0, #0x20000000 0x341895AC: D016 BEQ 46L12 ; 0x341895DC 0x341895AE: 9802 LDR R0, [SP, #8] 0x341895B0: F1B0 5F40 CMP.W R0, #0x30000000 0x341895B4: D01B BEQ 46L13 ; 0x341895EE 0x341895B6: E023 B 46L14 ; 0x34189600
.L10: 0x341895B8: F008 F99C BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F4 0x341895BC: 9006 STR R0, [SP, #24] 0x341895BE: 9806 LDR R0, [SP, #24] 0x341895C0: 9905 LDR R1, [SP, #20] 0x341895C2: FBB0 F0F1 UDIV R0, R0, R1 0x341895C6: 9006 STR R0, [SP, #24] 0x341895C8: E01A B 46L14 ; 0x34189600
.L11: 0x341895CA: F008 F9D5 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191978 0x341895CE: 9006 STR R0, [SP, #24] 0x341895D0: 9806 LDR R0, [SP, #24] 0x341895D2: 9905 LDR R1, [SP, #20] 0x341895D4: FBB0 F0F1 UDIV R0, R0, R1 0x341895D8: 9006 STR R0, [SP, #24] 0x341895DA: E011 B 46L14 ; 0x34189600
.L12: 0x341895DC: F008 FA0E BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919FC 0x341895E0: 9006 STR R0, [SP, #24] 0x341895E2: 9806 LDR R0, [SP, #24] 0x341895E4: 9905 LDR R1, [SP, #20] 0x341895E6: FBB0 F0F1 UDIV R0, R0, R1 0x341895EA: 9006 STR R0, [SP, #24] 0x341895EC: E008 B 46L14 ; 0x34189600
.L13: 0x341895EE: F008 FA47 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A80 0x341895F2: 9006 STR R0, [SP, #24] 0x341895F4: 9806 LDR R0, [SP, #24] 0x341895F6: 9905 LDR R1, [SP, #20] 0x341895F8: FBB0 F0F1 UDIV R0, R0, R1 0x341895FC: 9006 STR R0, [SP, #24] 0x341895FE: E7FF B 46L14 ; 0x34189600
.L14: 0x34189600: E025 B 46L21 ; 0x3418964E
.L15: 0x34189602: F001 FA5F BL LL_RCC_HSI_IsReady.77 ; 0x3418AAC4 0x34189606: B140 CBZ R0, .L16 ; 0x3418961A 0x34189608: F001 FA64 BL LL_RCC_HSI_GetDivider.78 ; 0x3418AAD4 0x3418960C: 09C1 LSRS R1, R0, #7 0x3418960E: F249 0000 MOVW R0, #0x9000 0x34189612: F2C0 30D0 MOVT R0, #0x03D0 0x34189616: 40C8 LSRS R0, R1 0x34189618: 9006 STR R0, [SP, #24]
.L16: 0x3418961A: E018 B 46L21 ; 0x3418964E
.L17: 0x3418961C: F001 FA62 BL LL_RCC_MSI_IsReady.79 ; 0x3418AAE4 0x34189620: B120 CBZ R0, .L18 ; 0x3418962C 0x34189622: F640 1000 MOVW R0, #0x0900 0x34189626: F2C0 003D MOVT R0, #61 0x3418962A: 9006 STR R0, [SP, #24]
.L18: 0x3418962C: E00F B 46L21 ; 0x3418964E
.L19: 0x3418962E: F248 0000 MOVW R0, #0x8000 0x34189632: F2C0 00BB MOVT R0, #187 0x34189636: 9006 STR R0, [SP, #24] 0x34189638: E009 B 46L21 ; 0x3418964E
.L20: 0x3418963A: F006 FDDF BL HAL_RCC_GetSysClockFreq ; 0x341901FC 0x3418963E: 9001 STR R0, [SP, #4] 0x34189640: F7FF F9A4 BL LL_RCC_GetTIMPrescaler ; 0x3418898C 0x34189644: 4601 MOV R1, R0 0x34189646: 9801 LDR R0, [SP, #4] 0x34189648: 40C8 LSRS R0, R1 0x3418964A: 9006 STR R0, [SP, #24] 0x3418964C: E7FF B 46L21 ; 0x3418964E
.L21: 0x3418964E: 9806 LDR R0, [SP, #24] 0x34189650: B008 ADD SP, SP, #32 0x34189652: BD80 POP 123R7, PC}

Section .text.RCCEx_GetSDMMCCLKFreq from blto2_FSBL_lto.o, size=396, align=4


RCCEx_GetSDMMCCLKFreq: 0x34189654: B580 PUSH 123R7, LR} 0x34189656: B086 SUB SP, SP, #24 0x34189658: 9005 STR R0, [SP, #20] 0x3418965A: 2000 MOVS R0, #0 0x3418965C: 9004 STR R0, [SP, #16] 0x3418965E: 9805 LDR R0, [SP, #20] 0x34189660: F7FF F984 BL LL_RCC_GetSDMMCClockSource ; 0x3418896C 0x34189664: 4601 MOV R1, R0 0x34189666: 9102 STR R1, [SP, #8] 0x34189668: 211C MOVS R1, #28 0x3418966A: F2C0 3100 MOVT R1, #0x0300 0x3418966E: 4288 CMP R0, R1 0x34189670: D02E BEQ 46L1 ; 0x341896D0 0x34189672: 9802 LDR R0, [SP, #8] 0x34189674: F240 411C MOVW R1, #0x041C 0x34189678: F2C0 3100 MOVT R1, #0x0300 0x3418967C: 4288 CMP R0, R1 0x3418967E: D027 BEQ 46L1 ; 0x341896D0 0x34189680: 9802 LDR R0, [SP, #8] 0x34189682: 211C MOVS R1, #28 0x34189684: F2C0 3101 MOVT R1, #0x0301 0x34189688: 4288 CMP R0, R1 0x3418968A: D027 BEQ 46L2 ; 0x341896DC 0x3418968C: 9802 LDR R0, [SP, #8] 0x3418968E: F240 411C MOVW R1, #0x041C 0x34189692: F2C0 3101 MOVT R1, #0x0301 0x34189696: 4288 CMP R0, R1 0x34189698: D020 BEQ 46L2 ; 0x341896DC 0x3418969A: 9802 LDR R0, [SP, #8] 0x3418969C: 211C MOVS R1, #28 0x3418969E: F2C0 3102 MOVT R1, #0x0302 0x341896A2: 4288 CMP R0, R1 0x341896A4: D01F BEQ 46L3 ; 0x341896E6 0x341896A6: 9802 LDR R0, [SP, #8] 0x341896A8: F240 411C MOVW R1, #0x041C 0x341896AC: F2C0 3102 MOVT R1, #0x0302 0x341896B0: 4288 CMP R0, R1 0x341896B2: D018 BEQ 46L3 ; 0x341896E6 0x341896B4: 9802 LDR R0, [SP, #8] 0x341896B6: 211C MOVS R1, #28 0x341896B8: F2C0 3103 MOVT R1, #0x0303 0x341896BC: 4288 CMP R0, R1 0x341896BE: D04F BEQ 46L9 ; 0x34189760 0x341896C0: 9802 LDR R0, [SP, #8] 0x341896C2: F240 411C MOVW R1, #0x041C 0x341896C6: F2C0 3103 MOVT R1, #0x0303 0x341896CA: 4288 CMP R0, R1 0x341896CC: D048 BEQ 46L9 ; 0x34189760 0x341896CE: E084 B 46L15 ; 0x341897DA
.L1: 0x341896D0: F006 FD94 BL HAL_RCC_GetSysClockFreq ; 0x341901FC 0x341896D4: F001 F8F6 BL RCCEx_GetHCLKFreq ; 0x3418A8C4 0x341896D8: 9004 STR R0, [SP, #16] 0x341896DA: E07E B 46L15 ; 0x341897DA
.L2: 0x341896DC: 2007 MOVS R0, #7 0x341896DE: F7FF FA4F BL RCCEx_GetCLKPCLKFreq ; 0x34188B80 0x341896E2: 9004 STR R0, [SP, #16] 0x341896E4: E079 B 46L15 ; 0x341897DA
.L3: 0x341896E6: F001 F90B BL LL_RCC_IC4_IsEnabled ; 0x3418A900 0x341896EA: B3C0 CBZ R0, .L8 ; 0x3418975E 0x341896EC: F008 FA0A BL LL_RCC_IC4_GetDivider ; 0x34191B04 0x341896F0: 9003 STR R0, [SP, #12] 0x341896F2: F001 F90D BL LL_RCC_IC4_GetSource ; 0x3418A910 0x341896F6: 4601 MOV R1, R0 0x341896F8: 9101 STR R1, [SP, #4] 0x341896FA: B160 CBZ R0, .L4 ; 0x34189716 0x341896FC: 9801 LDR R0, [SP, #4] 0x341896FE: F1B0 5F80 CMP.W R0, #0x10000000 0x34189702: D011 BEQ 46L5 ; 0x34189728 0x34189704: 9801 LDR R0, [SP, #4] 0x34189706: F1B0 5F00 CMP.W R0, #0x20000000 0x3418970A: D016 BEQ 46L6 ; 0x3418973A 0x3418970C: 9801 LDR R0, [SP, #4] 0x3418970E: F1B0 5F40 CMP.W R0, #0x30000000 0x34189712: D01B BEQ 46L7 ; 0x3418974C 0x34189714: E023 B 46L8 ; 0x3418975E
.L4: 0x34189716: F008 F8ED BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F4 0x3418971A: 9004 STR R0, [SP, #16] 0x3418971C: 9804 LDR R0, [SP, #16] 0x3418971E: 9903 LDR R1, [SP, #12] 0x34189720: FBB0 F0F1 UDIV R0, R0, R1 0x34189724: 9004 STR R0, [SP, #16] 0x34189726: E01A B 46L8 ; 0x3418975E
.L5: 0x34189728: F008 F926 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191978 0x3418972C: 9004 STR R0, [SP, #16] 0x3418972E: 9804 LDR R0, [SP, #16] 0x34189730: 9903 LDR R1, [SP, #12] 0x34189732: FBB0 F0F1 UDIV R0, R0, R1 0x34189736: 9004 STR R0, [SP, #16] 0x34189738: E011 B 46L8 ; 0x3418975E
.L6: 0x3418973A: F008 F95F BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919FC 0x3418973E: 9004 STR R0, [SP, #16] 0x34189740: 9804 LDR R0, [SP, #16] 0x34189742: 9903 LDR R1, [SP, #12] 0x34189744: FBB0 F0F1 UDIV R0, R0, R1 0x34189748: 9004 STR R0, [SP, #16] 0x3418974A: E008 B 46L8 ; 0x3418975E
.L7: 0x3418974C: F008 F998 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A80 0x34189750: 9004 STR R0, [SP, #16] 0x34189752: 9804 LDR R0, [SP, #16] 0x34189754: 9903 LDR R1, [SP, #12] 0x34189756: FBB0 F0F1 UDIV R0, R0, R1 0x3418975A: 9004 STR R0, [SP, #16] 0x3418975C: E7FF B 46L8 ; 0x3418975E
.L8: 0x3418975E: E03C B 46L15 ; 0x341897DA
.L9: 0x34189760: F001 FB5A BL LL_RCC_IC5_IsEnabled ; 0x3418AE18 0x34189764: B3C0 CBZ R0, .L14 ; 0x341897D8 0x34189766: F008 FA15 BL LL_RCC_IC5_GetDivider ; 0x34191B94 0x3418976A: 9003 STR R0, [SP, #12] 0x3418976C: F001 FB5C BL LL_RCC_IC5_GetSource ; 0x3418AE28 0x34189770: 4601 MOV R1, R0 0x34189772: 9100 STR R1, [SP, #0] 0x34189774: B160 CBZ R0, .L10 ; 0x34189790 0x34189776: 9800 LDR R0, [SP, #0] 0x34189778: F1B0 5F80 CMP.W R0, #0x10000000 0x3418977C: D011 BEQ 46L11 ; 0x341897A2 0x3418977E: 9800 LDR R0, [SP, #0] 0x34189780: F1B0 5F00 CMP.W R0, #0x20000000 0x34189784: D016 BEQ 46L12 ; 0x341897B4 0x34189786: 9800 LDR R0, [SP, #0] 0x34189788: F1B0 5F40 CMP.W R0, #0x30000000 0x3418978C: D01B BEQ 46L13 ; 0x341897C6 0x3418978E: E023 B 46L14 ; 0x341897D8
.L10: 0x34189790: F008 F8B0 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F4 0x34189794: 9004 STR R0, [SP, #16] 0x34189796: 9804 LDR R0, [SP, #16] 0x34189798: 9903 LDR R1, [SP, #12] 0x3418979A: FBB0 F0F1 UDIV R0, R0, R1 0x3418979E: 9004 STR R0, [SP, #16] 0x341897A0: E01A B 46L14 ; 0x341897D8
.L11: 0x341897A2: F008 F8E9 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191978 0x341897A6: 9004 STR R0, [SP, #16] 0x341897A8: 9804 LDR R0, [SP, #16] 0x341897AA: 9903 LDR R1, [SP, #12] 0x341897AC: FBB0 F0F1 UDIV R0, R0, R1 0x341897B0: 9004 STR R0, [SP, #16] 0x341897B2: E011 B 46L14 ; 0x341897D8
.L12: 0x341897B4: F008 F922 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919FC 0x341897B8: 9004 STR R0, [SP, #16] 0x341897BA: 9804 LDR R0, [SP, #16] 0x341897BC: 9903 LDR R1, [SP, #12] 0x341897BE: FBB0 F0F1 UDIV R0, R0, R1 0x341897C2: 9004 STR R0, [SP, #16] 0x341897C4: E008 B 46L14 ; 0x341897D8
.L13: 0x341897C6: F008 F95B BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A80 0x341897CA: 9004 STR R0, [SP, #16] 0x341897CC: 9804 LDR R0, [SP, #16] 0x341897CE: 9903 LDR R1, [SP, #12] 0x341897D0: FBB0 F0F1 UDIV R0, R0, R1 0x341897D4: 9004 STR R0, [SP, #16] 0x341897D6: E7FF B 46L14 ; 0x341897D8
.L14: 0x341897D8: E7FF B 46L15 ; 0x341897DA
.L15: 0x341897DA: 9804 LDR R0, [SP, #16] 0x341897DC: B006 ADD SP, SP, #24 0x341897DE: BD80 POP 123R7, PC}

Section .text.RCCEx_GetSPDIFRXCLKFreq from blto2_FSBL_lto.o, size=372, align=4


RCCEx_GetSPDIFRXCLKFreq: 0x341897E0: B580 PUSH 123R7, LR} 0x341897E2: B086 SUB SP, SP, #24 0x341897E4: 9005 STR R0, [SP, #20] 0x341897E6: 2000 MOVS R0, #0 0x341897E8: 9004 STR R0, [SP, #16] 0x341897EA: 9805 LDR R0, [SP, #20] 0x341897EC: F006 FE04 BL LL_RCC_GetSPDIFRXClockSource ; 0x341903F8 0x341897F0: 4601 MOV R1, R0 0x341897F2: 9102 STR R1, [SP, #8] 0x341897F4: 2806 CMP R0, #6 0x341897F6: F200 80AA BHI.W 46L13 ; 0x3418994E 0x341897FA: 9902 LDR R1, [SP, #8] 0x341897FC: E8DF F001 TBB 91PC, R1] 0x34189800: 04 DC.B 0x04 ; '\x04' 0x34189801: 0C DC.B 0x0C ; '\x0C' 0x34189802: 11 DC.B 0x11 ; '\x11' 0x34189803: 4E DC.B 0x4E ; 'N' 0x34189804: 98 DC.B 0x98 ; '\x98' 0x34189805: 8B DC.B 0x8B ; '\x8B' 0x34189806: A1 DC.B 0xA1 ; '\xA1' 0x34189807: 00 DC.B 0x00 ; '\0' 0x34189808: F006 FCF8 BL HAL_RCC_GetSysClockFreq ; 0x341901FC 0x3418980C: F001 F85A BL RCCEx_GetHCLKFreq ; 0x3418A8C4 0x34189810: F001 FA80 BL RCCEx_GetPCLK1Freq ; 0x3418AD14 0x34189814: 9004 STR R0, [SP, #16] 0x34189816: E09A B 46L13 ; 0x3418994E 0x34189818: 2007 MOVS R0, #7 0x3418981A: F7FF F9B1 BL RCCEx_GetCLKPCLKFreq ; 0x34188B80 0x3418981E: 9004 STR R0, [SP, #16] 0x34189820: E095 B 46L13 ; 0x3418994E 0x34189822: F001 FAE9 BL LL_RCC_IC7_IsEnabled ; 0x3418ADF8 0x34189826: B3C0 CBZ R0, .L5 ; 0x3418989A 0x34189828: F008 F9A8 BL LL_RCC_IC7_GetDivider ; 0x34191B7C 0x3418982C: 9003 STR R0, [SP, #12] 0x3418982E: F001 FAEB BL LL_RCC_IC7_GetSource ; 0x3418AE08 0x34189832: 4601 MOV R1, R0 0x34189834: 9101 STR R1, [SP, #4] 0x34189836: B160 CBZ R0, .L1 ; 0x34189852 0x34189838: 9801 LDR R0, [SP, #4] 0x3418983A: F1B0 5F80 CMP.W R0, #0x10000000 0x3418983E: D011 BEQ 46L2 ; 0x34189864 0x34189840: 9801 LDR R0, [SP, #4] 0x34189842: F1B0 5F00 CMP.W R0, #0x20000000 0x34189846: D016 BEQ 46L3 ; 0x34189876 0x34189848: 9801 LDR R0, [SP, #4] 0x3418984A: F1B0 5F40 CMP.W R0, #0x30000000 0x3418984E: D01B BEQ 46L4 ; 0x34189888 0x34189850: E023 B 46L5 ; 0x3418989A
.L1: 0x34189852: F008 F84F BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F4 0x34189856: 9004 STR R0, [SP, #16] 0x34189858: 9804 LDR R0, [SP, #16] 0x3418985A: 9903 LDR R1, [SP, #12] 0x3418985C: FBB0 F0F1 UDIV R0, R0, R1 0x34189860: 9004 STR R0, [SP, #16] 0x34189862: E01A B 46L5 ; 0x3418989A
.L2: 0x34189864: F008 F888 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191978 0x34189868: 9004 STR R0, [SP, #16] 0x3418986A: 9804 LDR R0, [SP, #16] 0x3418986C: 9903 LDR R1, [SP, #12] 0x3418986E: FBB0 F0F1 UDIV R0, R0, R1 0x34189872: 9004 STR R0, [SP, #16] 0x34189874: E011 B 46L5 ; 0x3418989A
.L3: 0x34189876: F008 F8C1 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919FC 0x3418987A: 9004 STR R0, [SP, #16] 0x3418987C: 9804 LDR R0, [SP, #16] 0x3418987E: 9903 LDR R1, [SP, #12] 0x34189880: FBB0 F0F1 UDIV R0, R0, R1 0x34189884: 9004 STR R0, [SP, #16] 0x34189886: E008 B 46L5 ; 0x3418989A
.L4: 0x34189888: F008 F8FA BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A80 0x3418988C: 9004 STR R0, [SP, #16] 0x3418988E: 9804 LDR R0, [SP, #16] 0x34189890: 9903 LDR R1, [SP, #12] 0x34189892: FBB0 F0F1 UDIV R0, R0, R1 0x34189896: 9004 STR R0, [SP, #16] 0x34189898: E7FF B 46L5 ; 0x3418989A
.L5: 0x3418989A: E058 B 46L13 ; 0x3418994E 0x3418989C: F001 FA94 BL LL_RCC_IC8_IsEnabled ; 0x3418ADC8 0x341898A0: B3C0 CBZ R0, .L10 ; 0x34189914 0x341898A2: F008 F95F BL LL_RCC_IC8_GetDivider ; 0x34191B64 0x341898A6: 9003 STR R0, [SP, #12] 0x341898A8: F001 FA96 BL LL_RCC_IC8_GetSource ; 0x3418ADD8 0x341898AC: 4601 MOV R1, R0 0x341898AE: 9100 STR R1, [SP, #0] 0x341898B0: B160 CBZ R0, .L6 ; 0x341898CC 0x341898B2: 9800 LDR R0, [SP, #0] 0x341898B4: F1B0 5F80 CMP.W R0, #0x10000000 0x341898B8: D011 BEQ 46L7 ; 0x341898DE 0x341898BA: 9800 LDR R0, [SP, #0] 0x341898BC: F1B0 5F00 CMP.W R0, #0x20000000 0x341898C0: D016 BEQ 46L8 ; 0x341898F0 0x341898C2: 9800 LDR R0, [SP, #0] 0x341898C4: F1B0 5F40 CMP.W R0, #0x30000000 0x341898C8: D01B BEQ 46L9 ; 0x34189902 0x341898CA: E023 B 46L10 ; 0x34189914
.L6: 0x341898CC: F008 F812 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F4 0x341898D0: 9004 STR R0, [SP, #16] 0x341898D2: 9804 LDR R0, [SP, #16] 0x341898D4: 9903 LDR R1, [SP, #12] 0x341898D6: FBB0 F0F1 UDIV R0, R0, R1 0x341898DA: 9004 STR R0, [SP, #16] 0x341898DC: E01A B 46L10 ; 0x34189914
.L7: 0x341898DE: F008 F84B BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191978 0x341898E2: 9004 STR R0, [SP, #16] 0x341898E4: 9804 LDR R0, [SP, #16] 0x341898E6: 9903 LDR R1, [SP, #12] 0x341898E8: FBB0 F0F1 UDIV R0, R0, R1 0x341898EC: 9004 STR R0, [SP, #16] 0x341898EE: E011 B 46L10 ; 0x34189914
.L8: 0x341898F0: F008 F884 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919FC 0x341898F4: 9004 STR R0, [SP, #16] 0x341898F6: 9804 LDR R0, [SP, #16] 0x341898F8: 9903 LDR R1, [SP, #12] 0x341898FA: FBB0 F0F1 UDIV R0, R0, R1 0x341898FE: 9004 STR R0, [SP, #16] 0x34189900: E008 B 46L10 ; 0x34189914
.L9: 0x34189902: F008 F8BD BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A80 0x34189906: 9004 STR R0, [SP, #16] 0x34189908: 9804 LDR R0, [SP, #16] 0x3418990A: 9903 LDR R1, [SP, #12] 0x3418990C: FBB0 F0F1 UDIV R0, R0, R1 0x34189910: 9004 STR R0, [SP, #16] 0x34189912: E7FF B 46L10 ; 0x34189914
.L10: 0x34189914: E01B B 46L13 ; 0x3418994E 0x34189916: F001 F8D5 BL LL_RCC_HSI_IsReady.77 ; 0x3418AAC4 0x3418991A: B140 CBZ R0, .L11 ; 0x3418992E 0x3418991C: F001 F8DA BL LL_RCC_HSI_GetDivider.78 ; 0x3418AAD4 0x34189920: 09C1 LSRS R1, R0, #7 0x34189922: F249 0000 MOVW R0, #0x9000 0x34189926: F2C0 30D0 MOVT R0, #0x03D0 0x3418992A: 40C8 LSRS R0, R1 0x3418992C: 9004 STR R0, [SP, #16]
.L11: 0x3418992E: E00E B 46L13 ; 0x3418994E 0x34189930: F001 F8D8 BL LL_RCC_MSI_IsReady.79 ; 0x3418AAE4 0x34189934: B120 CBZ R0, .L12 ; 0x34189940 0x34189936: F640 1000 MOVW R0, #0x0900 0x3418993A: F2C0 003D MOVT R0, #61 0x3418993E: 9004 STR R0, [SP, #16]
.L12: 0x34189940: E005 B 46L13 ; 0x3418994E 0x34189942: F248 0000 MOVW R0, #0x8000 0x34189946: F2C0 00BB MOVT R0, #187 0x3418994A: 9004 STR R0, [SP, #16] 0x3418994C: E7FF B 46L13 ; 0x3418994E
.L13: 0x3418994E: 9804 LDR R0, [SP, #16] 0x34189950: B006 ADD SP, SP, #24 0x34189952: BD80 POP 123R7, PC}

Section .text.RCCEx_GetSPICLKFreq from blto2_FSBL_lto.o, size=1196, align=4


RCCEx_GetSPICLKFreq: 0x34189954: B580 PUSH 123R7, LR} 0x34189956: B088 SUB SP, SP, #32 0x34189958: 9007 STR R0, [SP, #28] 0x3418995A: 2000 MOVS R0, #0 0x3418995C: 9006 STR R0, [SP, #24] 0x3418995E: 9807 LDR R0, [SP, #28] 0x34189960: F7FF F80C BL LL_RCC_GetSPIClockSource ; 0x3418897C 0x34189964: 4601 MOV R1, R0 0x34189966: 9104 STR R1, [SP, #16] 0x34189968: F240 4120 MOVW R1, #0x0420 0x3418996C: F2C0 7100 MOVT R1, #0x0700 0x34189970: 4288 CMP R0, R1 0x34189972: F000 8151 BEQ.W 46L2 ; 0x34189C18 0x34189976: 9804 LDR R0, [SP, #16] 0x34189978: F640 0120 MOVW R1, #0x0820 0x3418997C: F2C0 7100 MOVT R1, #0x0700 0x34189980: 4288 CMP R0, R1 0x34189982: F000 8141 BEQ.W 46L1 ; 0x34189C08 0x34189986: 9804 LDR R0, [SP, #16] 0x34189988: F640 4120 MOVW R1, #0x0C20 0x3418998C: F2C0 7100 MOVT R1, #0x0700 0x34189990: 4288 CMP R0, R1 0x34189992: F000 8139 BEQ.W 46L1 ; 0x34189C08 0x34189996: 9804 LDR R0, [SP, #16] 0x34189998: F241 0120 MOVW R1, #0x1020 0x3418999C: F2C0 7100 MOVT R1, #0x0700 0x341899A0: 4288 CMP R0, R1 0x341899A2: F000 8139 BEQ.W 46L2 ; 0x34189C18 0x341899A6: 9804 LDR R0, [SP, #16] 0x341899A8: F241 4120 MOVW R1, #0x1420 0x341899AC: F2C0 7100 MOVT R1, #0x0700 0x341899B0: 4288 CMP R0, R1 0x341899B2: F000 8131 BEQ.W 46L2 ; 0x34189C18 0x341899B6: 9804 LDR R0, [SP, #16] 0x341899B8: F641 0120 MOVW R1, #0x1820 0x341899BC: F2C0 7100 MOVT R1, #0x0700 0x341899C0: 4288 CMP R0, R1 0x341899C2: F000 8131 BEQ.W 46L3 ; 0x34189C28 0x341899C6: 9804 LDR R0, [SP, #16] 0x341899C8: F240 4120 MOVW R1, #0x0420 0x341899CC: F2C0 7101 MOVT R1, #0x0701 0x341899D0: 4288 CMP R0, R1 0x341899D2: F000 8131 BEQ.W 46L4 ; 0x34189C38 0x341899D6: 9804 LDR R0, [SP, #16] 0x341899D8: F640 0120 MOVW R1, #0x0820 0x341899DC: F2C0 7101 MOVT R1, #0x0701 0x341899E0: 4288 CMP R0, R1 0x341899E2: F000 8129 BEQ.W 46L4 ; 0x34189C38 0x341899E6: 9804 LDR R0, [SP, #16] 0x341899E8: F640 4120 MOVW R1, #0x0C20 0x341899EC: F2C0 7101 MOVT R1, #0x0701 0x341899F0: 4288 CMP R0, R1 0x341899F2: F000 8121 BEQ.W 46L4 ; 0x34189C38 0x341899F6: 9804 LDR R0, [SP, #16] 0x341899F8: F241 0120 MOVW R1, #0x1020 0x341899FC: F2C0 7101 MOVT R1, #0x0701 0x34189A00: 4288 CMP R0, R1 0x34189A02: F000 8119 BEQ.W 46L4 ; 0x34189C38 0x34189A06: 9804 LDR R0, [SP, #16] 0x34189A08: F241 4120 MOVW R1, #0x1420 0x34189A0C: F2C0 7101 MOVT R1, #0x0701 0x34189A10: 4288 CMP R0, R1 0x34189A12: F000 8111 BEQ.W 46L4 ; 0x34189C38 0x34189A16: 9804 LDR R0, [SP, #16] 0x34189A18: F641 0120 MOVW R1, #0x1820 0x34189A1C: F2C0 7101 MOVT R1, #0x0701 0x34189A20: 4288 CMP R0, R1 0x34189A22: F000 8109 BEQ.W 46L4 ; 0x34189C38 0x34189A26: 9804 LDR R0, [SP, #16] 0x34189A28: F240 4120 MOVW R1, #0x0420 0x34189A2C: F2C0 7102 MOVT R1, #0x0702 0x34189A30: 4288 CMP R0, R1 0x34189A32: F000 8106 BEQ.W 46L5 ; 0x34189C42 0x34189A36: 9804 LDR R0, [SP, #16] 0x34189A38: F640 0120 MOVW R1, #0x0820 0x34189A3C: F2C0 7102 MOVT R1, #0x0702 0x34189A40: 4288 CMP R0, R1 0x34189A42: F000 80FE BEQ.W 46L5 ; 0x34189C42 0x34189A46: 9804 LDR R0, [SP, #16] 0x34189A48: F640 4120 MOVW R1, #0x0C20 0x34189A4C: F2C0 7102 MOVT R1, #0x0702 0x34189A50: 4288 CMP R0, R1 0x34189A52: F000 80F6 BEQ.W 46L5 ; 0x34189C42 0x34189A56: 9804 LDR R0, [SP, #16] 0x34189A58: F241 0120 MOVW R1, #0x1020 0x34189A5C: F2C0 7102 MOVT R1, #0x0702 0x34189A60: 4288 CMP R0, R1 0x34189A62: F000 812B BEQ.W 46L11 ; 0x34189CBC 0x34189A66: 9804 LDR R0, [SP, #16] 0x34189A68: F241 4120 MOVW R1, #0x1420 0x34189A6C: F2C0 7102 MOVT R1, #0x0702 0x34189A70: 4288 CMP R0, R1 0x34189A72: F000 8123 BEQ.W 46L11 ; 0x34189CBC 0x34189A76: 9804 LDR R0, [SP, #16] 0x34189A78: F641 0120 MOVW R1, #0x1820 0x34189A7C: F2C0 7102 MOVT R1, #0x0702 0x34189A80: 4288 CMP R0, R1 0x34189A82: F000 80DE BEQ.W 46L5 ; 0x34189C42 0x34189A86: 9804 LDR R0, [SP, #16] 0x34189A88: F240 4120 MOVW R1, #0x0420 0x34189A8C: F2C0 7103 MOVT R1, #0x0703 0x34189A90: 4288 CMP R0, R1 0x34189A92: F000 8113 BEQ.W 46L11 ; 0x34189CBC 0x34189A96: 9804 LDR R0, [SP, #16] 0x34189A98: F640 0120 MOVW R1, #0x0820 0x34189A9C: F2C0 7103 MOVT R1, #0x0703 0x34189AA0: 4288 CMP R0, R1 0x34189AA2: F000 810B BEQ.W 46L11 ; 0x34189CBC 0x34189AA6: 9804 LDR R0, [SP, #16] 0x34189AA8: F640 4120 MOVW R1, #0x0C20 0x34189AAC: F2C0 7103 MOVT R1, #0x0703 0x34189AB0: 4288 CMP R0, R1 0x34189AB2: F000 8103 BEQ.W 46L11 ; 0x34189CBC 0x34189AB6: 9804 LDR R0, [SP, #16] 0x34189AB8: F241 0120 MOVW R1, #0x1020 0x34189ABC: F2C0 7103 MOVT R1, #0x0703 0x34189AC0: 4288 CMP R0, R1 0x34189AC2: F000 8138 BEQ.W 46L17 ; 0x34189D36 0x34189AC6: 9804 LDR R0, [SP, #16] 0x34189AC8: F241 4120 MOVW R1, #0x1420 0x34189ACC: F2C0 7103 MOVT R1, #0x0703 0x34189AD0: 4288 CMP R0, R1 0x34189AD2: F000 8130 BEQ.W 46L17 ; 0x34189D36 0x34189AD6: 9804 LDR R0, [SP, #16] 0x34189AD8: F641 0120 MOVW R1, #0x1820 0x34189ADC: F2C0 7103 MOVT R1, #0x0703 0x34189AE0: 4288 CMP R0, R1 0x34189AE2: F000 80EB BEQ.W 46L11 ; 0x34189CBC 0x34189AE6: 9804 LDR R0, [SP, #16] 0x34189AE8: F240 4120 MOVW R1, #0x0420 0x34189AEC: F2C0 7104 MOVT R1, #0x0704 0x34189AF0: 4288 CMP R0, R1 0x34189AF2: F000 816A BEQ.W 46L25 ; 0x34189DCA 0x34189AF6: 9804 LDR R0, [SP, #16] 0x34189AF8: F640 0120 MOVW R1, #0x0820 0x34189AFC: F2C0 7104 MOVT R1, #0x0704 0x34189B00: 4288 CMP R0, R1 0x34189B02: F000 8162 BEQ.W 46L25 ; 0x34189DCA 0x34189B06: 9804 LDR R0, [SP, #16] 0x34189B08: F640 4120 MOVW R1, #0x0C20 0x34189B0C: F2C0 7104 MOVT R1, #0x0704 0x34189B10: 4288 CMP R0, R1 0x34189B12: F000 815A BEQ.W 46L25 ; 0x34189DCA 0x34189B16: 9804 LDR R0, [SP, #16] 0x34189B18: F241 0120 MOVW R1, #0x1020 0x34189B1C: F2C0 7104 MOVT R1, #0x0704 0x34189B20: 4288 CMP R0, R1 0x34189B22: F000 8152 BEQ.W 46L25 ; 0x34189DCA 0x34189B26: 9804 LDR R0, [SP, #16] 0x34189B28: F241 4120 MOVW R1, #0x1420 0x34189B2C: F2C0 7104 MOVT R1, #0x0704 0x34189B30: 4288 CMP R0, R1 0x34189B32: F000 814A BEQ.W 46L25 ; 0x34189DCA 0x34189B36: 9804 LDR R0, [SP, #16] 0x34189B38: F641 0120 MOVW R1, #0x1820 0x34189B3C: F2C0 7104 MOVT R1, #0x0704 0x34189B40: 4288 CMP R0, R1 0x34189B42: F000 8142 BEQ.W 46L25 ; 0x34189DCA 0x34189B46: 9804 LDR R0, [SP, #16] 0x34189B48: F240 4120 MOVW R1, #0x0420 0x34189B4C: F2C0 7105 MOVT R1, #0x0705 0x34189B50: 4288 CMP R0, R1 0x34189B52: F000 812D BEQ.W 46L23 ; 0x34189DB0 0x34189B56: 9804 LDR R0, [SP, #16] 0x34189B58: F640 0120 MOVW R1, #0x0820 0x34189B5C: F2C0 7105 MOVT R1, #0x0705 0x34189B60: 4288 CMP R0, R1 0x34189B62: F000 8125 BEQ.W 46L23 ; 0x34189DB0 0x34189B66: 9804 LDR R0, [SP, #16] 0x34189B68: F640 4120 MOVW R1, #0x0C20 0x34189B6C: F2C0 7105 MOVT R1, #0x0705 0x34189B70: 4288 CMP R0, R1 0x34189B72: F000 811D BEQ.W 46L23 ; 0x34189DB0 0x34189B76: 9804 LDR R0, [SP, #16] 0x34189B78: F241 0120 MOVW R1, #0x1020 0x34189B7C: F2C0 7105 MOVT R1, #0x0705 0x34189B80: 4288 CMP R0, R1 0x34189B82: F000 8115 BEQ.W 46L23 ; 0x34189DB0 0x34189B86: 9804 LDR R0, [SP, #16] 0x34189B88: F241 4120 MOVW R1, #0x1420 0x34189B8C: F2C0 7105 MOVT R1, #0x0705 0x34189B90: 4288 CMP R0, R1 0x34189B92: F000 810D BEQ.W 46L23 ; 0x34189DB0 0x34189B96: 9804 LDR R0, [SP, #16] 0x34189B98: F641 0120 MOVW R1, #0x1820 0x34189B9C: F2C0 7105 MOVT R1, #0x0705 0x34189BA0: 4288 CMP R0, R1 0x34189BA2: F000 8105 BEQ.W 46L23 ; 0x34189DB0 0x34189BA6: 9804 LDR R0, [SP, #16] 0x34189BA8: F240 4120 MOVW R1, #0x0420 0x34189BAC: F2C0 7106 MOVT R1, #0x0706 0x34189BB0: 4288 CMP R0, R1 0x34189BB2: F000 8113 BEQ.W 46L27 ; 0x34189DDC 0x34189BB6: 9804 LDR R0, [SP, #16] 0x34189BB8: F640 0120 MOVW R1, #0x0820 0x34189BBC: F2C0 7106 MOVT R1, #0x0706 0x34189BC0: 4288 CMP R0, R1 0x34189BC2: F000 810B BEQ.W 46L27 ; 0x34189DDC 0x34189BC6: 9804 LDR R0, [SP, #16] 0x34189BC8: F640 4120 MOVW R1, #0x0C20 0x34189BCC: F2C0 7106 MOVT R1, #0x0706 0x34189BD0: 4288 CMP R0, R1 0x34189BD2: F000 8103 BEQ.W 46L27 ; 0x34189DDC 0x34189BD6: 9804 LDR R0, [SP, #16] 0x34189BD8: F241 0120 MOVW R1, #0x1020 0x34189BDC: F2C0 7106 MOVT R1, #0x0706 0x34189BE0: 4288 CMP R0, R1 0x34189BE2: F000 8101 BEQ.W 46L28 ; 0x34189DE8 0x34189BE6: 9804 LDR R0, [SP, #16] 0x34189BE8: F241 4120 MOVW R1, #0x1420 0x34189BEC: F2C0 7106 MOVT R1, #0x0706 0x34189BF0: 4288 CMP R0, R1 0x34189BF2: F000 80F9 BEQ.W 46L28 ; 0x34189DE8 0x34189BF6: 9804 LDR R0, [SP, #16] 0x34189BF8: F641 0120 MOVW R1, #0x1820 0x34189BFC: F2C0 7106 MOVT R1, #0x0706 0x34189C00: 4288 CMP R0, R1 0x34189C02: F000 80EB BEQ.W 46L27 ; 0x34189DDC 0x34189C06: E0F8 B 46L30 ; 0x34189DFA
.L1: 0x34189C08: F006 FAF8 BL HAL_RCC_GetSysClockFreq ; 0x341901FC 0x34189C0C: F000 FE5A BL RCCEx_GetHCLKFreq ; 0x3418A8C4 0x34189C10: F001 F880 BL RCCEx_GetPCLK1Freq ; 0x3418AD14 0x34189C14: 9006 STR R0, [SP, #24] 0x34189C16: E0F0 B 46L30 ; 0x34189DFA
.L2: 0x34189C18: F006 FAF0 BL HAL_RCC_GetSysClockFreq ; 0x341901FC 0x34189C1C: F000 FE52 BL RCCEx_GetHCLKFreq ; 0x3418A8C4 0x34189C20: F001 F886 BL RCCEx_GetPCLK2Freq ; 0x3418AD30 0x34189C24: 9006 STR R0, [SP, #24] 0x34189C26: E0E8 B 46L30 ; 0x34189DFA
.L3: 0x34189C28: F006 FAE8 BL HAL_RCC_GetSysClockFreq ; 0x341901FC 0x34189C2C: F000 FE4A BL RCCEx_GetHCLKFreq ; 0x3418A8C4 0x34189C30: F001 F8BC BL RCCEx_GetPCLK4Freq ; 0x3418ADAC 0x34189C34: 9006 STR R0, [SP, #24] 0x34189C36: E0E0 B 46L30 ; 0x34189DFA
.L4: 0x34189C38: 2007 MOVS R0, #7 0x34189C3A: F7FE FFA1 BL RCCEx_GetCLKPCLKFreq ; 0x34188B80 0x34189C3E: 9006 STR R0, [SP, #24] 0x34189C40: E0DB B 46L30 ; 0x34189DFA
.L5: 0x34189C42: F001 F8C1 BL LL_RCC_IC8_IsEnabled ; 0x3418ADC8 0x34189C46: B3C0 CBZ R0, .L10 ; 0x34189CBA 0x34189C48: F007 FF8C BL LL_RCC_IC8_GetDivider ; 0x34191B64 0x34189C4C: 9005 STR R0, [SP, #20] 0x34189C4E: F001 F8C3 BL LL_RCC_IC8_GetSource ; 0x3418ADD8 0x34189C52: 4601 MOV R1, R0 0x34189C54: 9103 STR R1, [SP, #12] 0x34189C56: B160 CBZ R0, .L6 ; 0x34189C72 0x34189C58: 9803 LDR R0, [SP, #12] 0x34189C5A: F1B0 5F80 CMP.W R0, #0x10000000 0x34189C5E: D011 BEQ 46L7 ; 0x34189C84 0x34189C60: 9803 LDR R0, [SP, #12] 0x34189C62: F1B0 5F00 CMP.W R0, #0x20000000 0x34189C66: D016 BEQ 46L8 ; 0x34189C96 0x34189C68: 9803 LDR R0, [SP, #12] 0x34189C6A: F1B0 5F40 CMP.W R0, #0x30000000 0x34189C6E: D01B BEQ 46L9 ; 0x34189CA8 0x34189C70: E023 B 46L10 ; 0x34189CBA
.L6: 0x34189C72: F007 FE3F BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F4 0x34189C76: 9006 STR R0, [SP, #24] 0x34189C78: 9806 LDR R0, [SP, #24] 0x34189C7A: 9905 LDR R1, [SP, #20] 0x34189C7C: FBB0 F0F1 UDIV R0, R0, R1 0x34189C80: 9006 STR R0, [SP, #24] 0x34189C82: E01A B 46L10 ; 0x34189CBA
.L7: 0x34189C84: F007 FE78 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191978 0x34189C88: 9006 STR R0, [SP, #24] 0x34189C8A: 9806 LDR R0, [SP, #24] 0x34189C8C: 9905 LDR R1, [SP, #20] 0x34189C8E: FBB0 F0F1 UDIV R0, R0, R1 0x34189C92: 9006 STR R0, [SP, #24] 0x34189C94: E011 B 46L10 ; 0x34189CBA
.L8: 0x34189C96: F007 FEB1 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919FC 0x34189C9A: 9006 STR R0, [SP, #24] 0x34189C9C: 9806 LDR R0, [SP, #24] 0x34189C9E: 9905 LDR R1, [SP, #20] 0x34189CA0: FBB0 F0F1 UDIV R0, R0, R1 0x34189CA4: 9006 STR R0, [SP, #24] 0x34189CA6: E008 B 46L10 ; 0x34189CBA
.L9: 0x34189CA8: F007 FEEA BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A80 0x34189CAC: 9006 STR R0, [SP, #24] 0x34189CAE: 9806 LDR R0, [SP, #24] 0x34189CB0: 9905 LDR R1, [SP, #20] 0x34189CB2: FBB0 F0F1 UDIV R0, R0, R1 0x34189CB6: 9006 STR R0, [SP, #24] 0x34189CB8: E7FF B 46L10 ; 0x34189CBA
.L10: 0x34189CBA: E09E B 46L30 ; 0x34189DFA
.L11: 0x34189CBC: F001 F846 BL LL_RCC_IC9_IsEnabled ; 0x3418AD4C 0x34189CC0: B3C0 CBZ R0, .L16 ; 0x34189D34 0x34189CC2: F007 FF37 BL LL_RCC_IC9_GetDivider ; 0x34191B34 0x34189CC6: 9005 STR R0, [SP, #20] 0x34189CC8: F001 F848 BL LL_RCC_IC9_GetSource ; 0x3418AD5C 0x34189CCC: 4601 MOV R1, R0 0x34189CCE: 9102 STR R1, [SP, #8] 0x34189CD0: B160 CBZ R0, .L12 ; 0x34189CEC 0x34189CD2: 9802 LDR R0, [SP, #8] 0x34189CD4: F1B0 5F80 CMP.W R0, #0x10000000 0x34189CD8: D011 BEQ 46L13 ; 0x34189CFE 0x34189CDA: 9802 LDR R0, [SP, #8] 0x34189CDC: F1B0 5F00 CMP.W R0, #0x20000000 0x34189CE0: D016 BEQ 46L14 ; 0x34189D10 0x34189CE2: 9802 LDR R0, [SP, #8] 0x34189CE4: F1B0 5F40 CMP.W R0, #0x30000000 0x34189CE8: D01B BEQ 46L15 ; 0x34189D22 0x34189CEA: E023 B 46L16 ; 0x34189D34
.L12: 0x34189CEC: F007 FE02 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F4 0x34189CF0: 9006 STR R0, [SP, #24] 0x34189CF2: 9806 LDR R0, [SP, #24] 0x34189CF4: 9905 LDR R1, [SP, #20] 0x34189CF6: FBB0 F0F1 UDIV R0, R0, R1 0x34189CFA: 9006 STR R0, [SP, #24] 0x34189CFC: E01A B 46L16 ; 0x34189D34
.L13: 0x34189CFE: F007 FE3B BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191978 0x34189D02: 9006 STR R0, [SP, #24] 0x34189D04: 9806 LDR R0, [SP, #24] 0x34189D06: 9905 LDR R1, [SP, #20] 0x34189D08: FBB0 F0F1 UDIV R0, R0, R1 0x34189D0C: 9006 STR R0, [SP, #24] 0x34189D0E: E011 B 46L16 ; 0x34189D34
.L14: 0x34189D10: F007 FE74 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919FC 0x34189D14: 9006 STR R0, [SP, #24] 0x34189D16: 9806 LDR R0, [SP, #24] 0x34189D18: 9905 LDR R1, [SP, #20] 0x34189D1A: FBB0 F0F1 UDIV R0, R0, R1 0x34189D1E: 9006 STR R0, [SP, #24] 0x34189D20: E008 B 46L16 ; 0x34189D34
.L15: 0x34189D22: F007 FEAD BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A80 0x34189D26: 9006 STR R0, [SP, #24] 0x34189D28: 9806 LDR R0, [SP, #24] 0x34189D2A: 9905 LDR R1, [SP, #20] 0x34189D2C: FBB0 F0F1 UDIV R0, R0, R1 0x34189D30: 9006 STR R0, [SP, #24] 0x34189D32: E7FF B 46L16 ; 0x34189D34
.L16: 0x34189D34: E061 B 46L30 ; 0x34189DFA
.L17: 0x34189D36: F001 F819 BL LL_RCC_IC14_IsEnabled ; 0x3418AD6C 0x34189D3A: B3C0 CBZ R0, .L22 ; 0x34189DAE 0x34189D3C: F007 FF06 BL LL_RCC_IC14_GetDivider ; 0x34191B4C 0x34189D40: 9005 STR R0, [SP, #20] 0x34189D42: F001 F81B BL LL_RCC_IC14_GetSource ; 0x3418AD7C 0x34189D46: 4601 MOV R1, R0 0x34189D48: 9101 STR R1, [SP, #4] 0x34189D4A: B160 CBZ R0, .L18 ; 0x34189D66 0x34189D4C: 9801 LDR R0, [SP, #4] 0x34189D4E: F1B0 5F80 CMP.W R0, #0x10000000 0x34189D52: D011 BEQ 46L19 ; 0x34189D78 0x34189D54: 9801 LDR R0, [SP, #4] 0x34189D56: F1B0 5F00 CMP.W R0, #0x20000000 0x34189D5A: D016 BEQ 46L20 ; 0x34189D8A 0x34189D5C: 9801 LDR R0, [SP, #4] 0x34189D5E: F1B0 5F40 CMP.W R0, #0x30000000 0x34189D62: D01B BEQ 46L21 ; 0x34189D9C 0x34189D64: E023 B 46L22 ; 0x34189DAE
.L18: 0x34189D66: F007 FDC5 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F4 0x34189D6A: 9006 STR R0, [SP, #24] 0x34189D6C: 9806 LDR R0, [SP, #24] 0x34189D6E: 9905 LDR R1, [SP, #20] 0x34189D70: FBB0 F0F1 UDIV R0, R0, R1 0x34189D74: 9006 STR R0, [SP, #24] 0x34189D76: E01A B 46L22 ; 0x34189DAE
.L19: 0x34189D78: F007 FDFE BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191978 0x34189D7C: 9006 STR R0, [SP, #24] 0x34189D7E: 9806 LDR R0, [SP, #24] 0x34189D80: 9905 LDR R1, [SP, #20] 0x34189D82: FBB0 F0F1 UDIV R0, R0, R1 0x34189D86: 9006 STR R0, [SP, #24] 0x34189D88: E011 B 46L22 ; 0x34189DAE
.L20: 0x34189D8A: F007 FE37 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919FC 0x34189D8E: 9006 STR R0, [SP, #24] 0x34189D90: 9806 LDR R0, [SP, #24] 0x34189D92: 9905 LDR R1, [SP, #20] 0x34189D94: FBB0 F0F1 UDIV R0, R0, R1 0x34189D98: 9006 STR R0, [SP, #24] 0x34189D9A: E008 B 46L22 ; 0x34189DAE
.L21: 0x34189D9C: F007 FE70 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A80 0x34189DA0: 9006 STR R0, [SP, #24] 0x34189DA2: 9806 LDR R0, [SP, #24] 0x34189DA4: 9905 LDR R1, [SP, #20] 0x34189DA6: FBB0 F0F1 UDIV R0, R0, R1 0x34189DAA: 9006 STR R0, [SP, #24] 0x34189DAC: E7FF B 46L22 ; 0x34189DAE
.L22: 0x34189DAE: E024 B 46L30 ; 0x34189DFA
.L23: 0x34189DB0: F000 FE88 BL LL_RCC_HSI_IsReady.77 ; 0x3418AAC4 0x34189DB4: B140 CBZ R0, .L24 ; 0x34189DC8 0x34189DB6: F000 FE8D BL LL_RCC_HSI_GetDivider.78 ; 0x3418AAD4 0x34189DBA: 09C1 LSRS R1, R0, #7 0x34189DBC: F249 0000 MOVW R0, #0x9000 0x34189DC0: F2C0 30D0 MOVT R0, #0x03D0 0x34189DC4: 40C8 LSRS R0, R1 0x34189DC6: 9006 STR R0, [SP, #24]
.L24: 0x34189DC8: E017 B 46L30 ; 0x34189DFA
.L25: 0x34189DCA: F000 FE8B BL LL_RCC_MSI_IsReady.79 ; 0x3418AAE4 0x34189DCE: B120 CBZ R0, .L26 ; 0x34189DDA 0x34189DD0: F640 1000 MOVW R0, #0x0900 0x34189DD4: F2C0 003D MOVT R0, #61 0x34189DD8: 9006 STR R0, [SP, #24]
.L26: 0x34189DDA: E00E B 46L30 ; 0x34189DFA
.L27: 0x34189DDC: F248 0000 MOVW R0, #0x8000 0x34189DE0: F2C0 00BB MOVT R0, #187 0x34189DE4: 9006 STR R0, [SP, #24] 0x34189DE6: E008 B 46L30 ; 0x34189DFA
.L28: 0x34189DE8: F000 FE8C BL LL_RCC_HSE_IsReady.80 ; 0x3418AB04 0x34189DEC: B120 CBZ R0, .L29 ; 0x34189DF8 0x34189DEE: F646 4000 MOVW R0, #0x6C00 0x34189DF2: F2C0 20DC MOVT R0, #0x02DC 0x34189DF6: 9006 STR R0, [SP, #24]
.L29: 0x34189DF8: E7FF B 46L30 ; 0x34189DFA
.L30: 0x34189DFA: 9806 LDR R0, [SP, #24] 0x34189DFC: B008 ADD SP, SP, #32 0x34189DFE: BD80 POP 123R7, PC}

Section .text.RCCEx_GetUSARTCLKFreq from blto2_FSBL_lto.o, size=916, align=4


RCCEx_GetUSARTCLKFreq: 0x34189E00: B580 PUSH 123R7, LR} 0x34189E02: B086 SUB SP, SP, #24 0x34189E04: 9005 STR R0, [SP, #20] 0x34189E06: 2000 MOVS R0, #0 0x34189E08: 9004 STR R0, [SP, #16] 0x34189E0A: 9805 LDR R0, [SP, #20] 0x34189E0C: F7FE FDC6 BL LL_RCC_GetUSARTClockSource ; 0x3418899C 0x34189E10: 4601 MOV R1, R0 0x34189E12: 9102 STR R1, [SP, #8] 0x34189E14: 2130 MOVS R1, #48 0x34189E16: F2C0 7100 MOVT R1, #0x0700 0x34189E1A: 4288 CMP R0, R1 0x34189E1C: F000 810B BEQ.W 46L1 ; 0x3418A036 0x34189E20: 9802 LDR R0, [SP, #8] 0x34189E22: F240 4130 MOVW R1, #0x0430 0x34189E26: F2C0 7100 MOVT R1, #0x0700 0x34189E2A: 4288 CMP R0, R1 0x34189E2C: F000 810B BEQ.W 46L2 ; 0x3418A046 0x34189E30: 9802 LDR R0, [SP, #8] 0x34189E32: F240 4134 MOVW R1, #0x0434 0x34189E36: F2C0 7100 MOVT R1, #0x0700 0x34189E3A: 4288 CMP R0, R1 0x34189E3C: F000 80FB BEQ.W 46L1 ; 0x3418A036 0x34189E40: 9802 LDR R0, [SP, #8] 0x34189E42: F640 0130 MOVW R1, #0x0830 0x34189E46: F2C0 7100 MOVT R1, #0x0700 0x34189E4A: 4288 CMP R0, R1 0x34189E4C: F000 80FB BEQ.W 46L2 ; 0x3418A046 0x34189E50: 9802 LDR R0, [SP, #8] 0x34189E52: F241 4130 MOVW R1, #0x1430 0x34189E56: F2C0 7100 MOVT R1, #0x0700 0x34189E5A: 4288 CMP R0, R1 0x34189E5C: F000 80EB BEQ.W 46L1 ; 0x3418A036 0x34189E60: 9802 LDR R0, [SP, #8] 0x34189E62: 2130 MOVS R1, #48 0x34189E64: F2C0 7101 MOVT R1, #0x0701 0x34189E68: 4288 CMP R0, R1 0x34189E6A: F000 80F4 BEQ.W 46L3 ; 0x3418A056 0x34189E6E: 9802 LDR R0, [SP, #8] 0x34189E70: F240 4130 MOVW R1, #0x0430 0x34189E74: F2C0 7101 MOVT R1, #0x0701 0x34189E78: 4288 CMP R0, R1 0x34189E7A: F000 80EC BEQ.W 46L3 ; 0x3418A056 0x34189E7E: 9802 LDR R0, [SP, #8] 0x34189E80: F240 4134 MOVW R1, #0x0434 0x34189E84: F2C0 7101 MOVT R1, #0x0701 0x34189E88: 4288 CMP R0, R1 0x34189E8A: F000 80E4 BEQ.W 46L3 ; 0x3418A056 0x34189E8E: 9802 LDR R0, [SP, #8] 0x34189E90: F640 0130 MOVW R1, #0x0830 0x34189E94: F2C0 7101 MOVT R1, #0x0701 0x34189E98: 4288 CMP R0, R1 0x34189E9A: F000 80DC BEQ.W 46L3 ; 0x3418A056 0x34189E9E: 9802 LDR R0, [SP, #8] 0x34189EA0: F241 4130 MOVW R1, #0x1430 0x34189EA4: F2C0 7101 MOVT R1, #0x0701 0x34189EA8: 4288 CMP R0, R1 0x34189EAA: F000 80D4 BEQ.W 46L3 ; 0x3418A056 0x34189EAE: 9802 LDR R0, [SP, #8] 0x34189EB0: 2130 MOVS R1, #48 0x34189EB2: F2C0 7102 MOVT R1, #0x0702 0x34189EB6: 4288 CMP R0, R1 0x34189EB8: F000 80D2 BEQ.W 46L4 ; 0x3418A060 0x34189EBC: 9802 LDR R0, [SP, #8] 0x34189EBE: F240 4130 MOVW R1, #0x0430 0x34189EC2: F2C0 7102 MOVT R1, #0x0702 0x34189EC6: 4288 CMP R0, R1 0x34189EC8: F000 80CA BEQ.W 46L4 ; 0x3418A060 0x34189ECC: 9802 LDR R0, [SP, #8] 0x34189ECE: F240 4134 MOVW R1, #0x0434 0x34189ED2: F2C0 7102 MOVT R1, #0x0702 0x34189ED6: 4288 CMP R0, R1 0x34189ED8: F000 80C2 BEQ.W 46L4 ; 0x3418A060 0x34189EDC: 9802 LDR R0, [SP, #8] 0x34189EDE: F640 0130 MOVW R1, #0x0830 0x34189EE2: F2C0 7102 MOVT R1, #0x0702 0x34189EE6: 4288 CMP R0, R1 0x34189EE8: F000 80BA BEQ.W 46L4 ; 0x3418A060 0x34189EEC: 9802 LDR R0, [SP, #8] 0x34189EEE: F241 4130 MOVW R1, #0x1430 0x34189EF2: F2C0 7102 MOVT R1, #0x0702 0x34189EF6: 4288 CMP R0, R1 0x34189EF8: F000 80B2 BEQ.W 46L4 ; 0x3418A060 0x34189EFC: 9802 LDR R0, [SP, #8] 0x34189EFE: 2130 MOVS R1, #48 0x34189F00: F2C0 7103 MOVT R1, #0x0703 0x34189F04: 4288 CMP R0, R1 0x34189F06: F000 80E8 BEQ.W 46L10 ; 0x3418A0DA 0x34189F0A: 9802 LDR R0, [SP, #8] 0x34189F0C: F240 4130 MOVW R1, #0x0430 0x34189F10: F2C0 7103 MOVT R1, #0x0703 0x34189F14: 4288 CMP R0, R1 0x34189F16: F000 80E0 BEQ.W 46L10 ; 0x3418A0DA 0x34189F1A: 9802 LDR R0, [SP, #8] 0x34189F1C: F240 4134 MOVW R1, #0x0434 0x34189F20: F2C0 7103 MOVT R1, #0x0703 0x34189F24: 4288 CMP R0, R1 0x34189F26: F000 80D8 BEQ.W 46L10 ; 0x3418A0DA 0x34189F2A: 9802 LDR R0, [SP, #8] 0x34189F2C: F640 0130 MOVW R1, #0x0830 0x34189F30: F2C0 7103 MOVT R1, #0x0703 0x34189F34: 4288 CMP R0, R1 0x34189F36: F000 80D0 BEQ.W 46L10 ; 0x3418A0DA 0x34189F3A: 9802 LDR R0, [SP, #8] 0x34189F3C: F241 4130 MOVW R1, #0x1430 0x34189F40: F2C0 7103 MOVT R1, #0x0703 0x34189F44: 4288 CMP R0, R1 0x34189F46: F000 80C8 BEQ.W 46L10 ; 0x3418A0DA 0x34189F4A: 9802 LDR R0, [SP, #8] 0x34189F4C: 2130 MOVS R1, #48 0x34189F4E: F2C0 7104 MOVT R1, #0x0704 0x34189F52: 4288 CMP R0, R1 0x34189F54: F000 8114 BEQ.W 46L20 ; 0x3418A180 0x34189F58: 9802 LDR R0, [SP, #8] 0x34189F5A: F240 4130 MOVW R1, #0x0430 0x34189F5E: F2C0 7104 MOVT R1, #0x0704 0x34189F62: 4288 CMP R0, R1 0x34189F64: F000 810C BEQ.W 46L20 ; 0x3418A180 0x34189F68: 9802 LDR R0, [SP, #8] 0x34189F6A: F240 4134 MOVW R1, #0x0434 0x34189F6E: F2C0 7104 MOVT R1, #0x0704 0x34189F72: 4288 CMP R0, R1 0x34189F74: F000 8104 BEQ.W 46L20 ; 0x3418A180 0x34189F78: 9802 LDR R0, [SP, #8] 0x34189F7A: F640 0130 MOVW R1, #0x0830 0x34189F7E: F2C0 7104 MOVT R1, #0x0704 0x34189F82: 4288 CMP R0, R1 0x34189F84: F000 80FC BEQ.W 46L20 ; 0x3418A180 0x34189F88: 9802 LDR R0, [SP, #8] 0x34189F8A: F241 4130 MOVW R1, #0x1430 0x34189F8E: F2C0 7104 MOVT R1, #0x0704 0x34189F92: 4288 CMP R0, R1 0x34189F94: F000 80F4 BEQ.W 46L20 ; 0x3418A180 0x34189F98: 9802 LDR R0, [SP, #8] 0x34189F9A: 2130 MOVS R1, #48 0x34189F9C: F2C0 7105 MOVT R1, #0x0705 0x34189FA0: 4288 CMP R0, R1 0x34189FA2: F000 80E4 BEQ.W 46L18 ; 0x3418A16E 0x34189FA6: 9802 LDR R0, [SP, #8] 0x34189FA8: F240 4130 MOVW R1, #0x0430 0x34189FAC: F2C0 7105 MOVT R1, #0x0705 0x34189FB0: 4288 CMP R0, R1 0x34189FB2: F000 80DC BEQ.W 46L18 ; 0x3418A16E 0x34189FB6: 9802 LDR R0, [SP, #8] 0x34189FB8: F240 4134 MOVW R1, #0x0434 0x34189FBC: F2C0 7105 MOVT R1, #0x0705 0x34189FC0: 4288 CMP R0, R1 0x34189FC2: F000 80D4 BEQ.W 46L18 ; 0x3418A16E 0x34189FC6: 9802 LDR R0, [SP, #8] 0x34189FC8: F640 0130 MOVW R1, #0x0830 0x34189FCC: F2C0 7105 MOVT R1, #0x0705 0x34189FD0: 4288 CMP R0, R1 0x34189FD2: F000 80CC BEQ.W 46L18 ; 0x3418A16E 0x34189FD6: 9802 LDR R0, [SP, #8] 0x34189FD8: F241 4130 MOVW R1, #0x1430 0x34189FDC: F2C0 7105 MOVT R1, #0x0705 0x34189FE0: 4288 CMP R0, R1 0x34189FE2: F000 80C4 BEQ.W 46L18 ; 0x3418A16E 0x34189FE6: 9802 LDR R0, [SP, #8] 0x34189FE8: 2130 MOVS R1, #48 0x34189FEA: F2C0 7106 MOVT R1, #0x0706 0x34189FEE: 4288 CMP R0, R1 0x34189FF0: F000 80B0 BEQ.W 46L16 ; 0x3418A154 0x34189FF4: 9802 LDR R0, [SP, #8] 0x34189FF6: F240 4130 MOVW R1, #0x0430 0x34189FFA: F2C0 7106 MOVT R1, #0x0706 0x34189FFE: 4288 CMP R0, R1 0x3418A000: F000 80A8 BEQ.W 46L16 ; 0x3418A154 0x3418A004: 9802 LDR R0, [SP, #8] 0x3418A006: F240 4134 MOVW R1, #0x0434 0x3418A00A: F2C0 7106 MOVT R1, #0x0706 0x3418A00E: 4288 CMP R0, R1 0x3418A010: F000 80A0 BEQ.W 46L16 ; 0x3418A154 0x3418A014: 9802 LDR R0, [SP, #8] 0x3418A016: F640 0130 MOVW R1, #0x0830 0x3418A01A: F2C0 7106 MOVT R1, #0x0706 0x3418A01E: 4288 CMP R0, R1 0x3418A020: F000 8098 BEQ.W 46L16 ; 0x3418A154 0x3418A024: 9802 LDR R0, [SP, #8] 0x3418A026: F241 4130 MOVW R1, #0x1430 0x3418A02A: F2C0 7106 MOVT R1, #0x0706 0x3418A02E: 4288 CMP R0, R1 0x3418A030: F000 8090 BEQ.W 46L16 ; 0x3418A154 0x3418A034: E0AB B 46L22 ; 0x3418A18E
.L1: 0x3418A036: F006 F8E1 BL HAL_RCC_GetSysClockFreq ; 0x341901FC 0x3418A03A: F000 FC43 BL RCCEx_GetHCLKFreq ; 0x3418A8C4 0x3418A03E: F000 FE77 BL RCCEx_GetPCLK2Freq ; 0x3418AD30 0x3418A042: 9004 STR R0, [SP, #16] 0x3418A044: E0A3 B 46L22 ; 0x3418A18E
.L2: 0x3418A046: F006 F8D9 BL HAL_RCC_GetSysClockFreq ; 0x341901FC 0x3418A04A: F000 FC3B BL RCCEx_GetHCLKFreq ; 0x3418A8C4 0x3418A04E: F000 FE61 BL RCCEx_GetPCLK1Freq ; 0x3418AD14 0x3418A052: 9004 STR R0, [SP, #16] 0x3418A054: E09B B 46L22 ; 0x3418A18E
.L3: 0x3418A056: 2007 MOVS R0, #7 0x3418A058: F7FE FD92 BL RCCEx_GetCLKPCLKFreq ; 0x34188B80 0x3418A05C: 9004 STR R0, [SP, #16] 0x3418A05E: E096 B 46L22 ; 0x3418A18E
.L4: 0x3418A060: F000 FE74 BL LL_RCC_IC9_IsEnabled ; 0x3418AD4C 0x3418A064: B3C0 CBZ R0, .L9 ; 0x3418A0D8 0x3418A066: F007 FD65 BL LL_RCC_IC9_GetDivider ; 0x34191B34 0x3418A06A: 9003 STR R0, [SP, #12] 0x3418A06C: F000 FE76 BL LL_RCC_IC9_GetSource ; 0x3418AD5C 0x3418A070: 4601 MOV R1, R0 0x3418A072: 9101 STR R1, [SP, #4] 0x3418A074: B160 CBZ R0, .L5 ; 0x3418A090 0x3418A076: 9801 LDR R0, [SP, #4] 0x3418A078: F1B0 5F80 CMP.W R0, #0x10000000 0x3418A07C: D011 BEQ 46L6 ; 0x3418A0A2 0x3418A07E: 9801 LDR R0, [SP, #4] 0x3418A080: F1B0 5F00 CMP.W R0, #0x20000000 0x3418A084: D016 BEQ 46L7 ; 0x3418A0B4 0x3418A086: 9801 LDR R0, [SP, #4] 0x3418A088: F1B0 5F40 CMP.W R0, #0x30000000 0x3418A08C: D01B BEQ 46L8 ; 0x3418A0C6 0x3418A08E: E023 B 46L9 ; 0x3418A0D8
.L5: 0x3418A090: F007 FC30 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F4 0x3418A094: 9004 STR R0, [SP, #16] 0x3418A096: 9804 LDR R0, [SP, #16] 0x3418A098: 9903 LDR R1, [SP, #12] 0x3418A09A: FBB0 F0F1 UDIV R0, R0, R1 0x3418A09E: 9004 STR R0, [SP, #16] 0x3418A0A0: E01A B 46L9 ; 0x3418A0D8
.L6: 0x3418A0A2: F007 FC69 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191978 0x3418A0A6: 9004 STR R0, [SP, #16] 0x3418A0A8: 9804 LDR R0, [SP, #16] 0x3418A0AA: 9903 LDR R1, [SP, #12] 0x3418A0AC: FBB0 F0F1 UDIV R0, R0, R1 0x3418A0B0: 9004 STR R0, [SP, #16] 0x3418A0B2: E011 B 46L9 ; 0x3418A0D8
.L7: 0x3418A0B4: F007 FCA2 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919FC 0x3418A0B8: 9004 STR R0, [SP, #16] 0x3418A0BA: 9804 LDR R0, [SP, #16] 0x3418A0BC: 9903 LDR R1, [SP, #12] 0x3418A0BE: FBB0 F0F1 UDIV R0, R0, R1 0x3418A0C2: 9004 STR R0, [SP, #16] 0x3418A0C4: E008 B 46L9 ; 0x3418A0D8
.L8: 0x3418A0C6: F007 FCDB BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A80 0x3418A0CA: 9004 STR R0, [SP, #16] 0x3418A0CC: 9804 LDR R0, [SP, #16] 0x3418A0CE: 9903 LDR R1, [SP, #12] 0x3418A0D0: FBB0 F0F1 UDIV R0, R0, R1 0x3418A0D4: 9004 STR R0, [SP, #16] 0x3418A0D6: E7FF B 46L9 ; 0x3418A0D8
.L9: 0x3418A0D8: E059 B 46L22 ; 0x3418A18E
.L10: 0x3418A0DA: F000 FE47 BL LL_RCC_IC14_IsEnabled ; 0x3418AD6C 0x3418A0DE: B3C0 CBZ R0, .L15 ; 0x3418A152 0x3418A0E0: F007 FD34 BL LL_RCC_IC14_GetDivider ; 0x34191B4C 0x3418A0E4: 9003 STR R0, [SP, #12] 0x3418A0E6: F000 FE49 BL LL_RCC_IC14_GetSource ; 0x3418AD7C 0x3418A0EA: 4601 MOV R1, R0 0x3418A0EC: 9100 STR R1, [SP, #0] 0x3418A0EE: B160 CBZ R0, .L11 ; 0x3418A10A 0x3418A0F0: 9800 LDR R0, [SP, #0] 0x3418A0F2: F1B0 5F80 CMP.W R0, #0x10000000 0x3418A0F6: D011 BEQ 46L12 ; 0x3418A11C 0x3418A0F8: 9800 LDR R0, [SP, #0] 0x3418A0FA: F1B0 5F00 CMP.W R0, #0x20000000 0x3418A0FE: D016 BEQ 46L13 ; 0x3418A12E 0x3418A100: 9800 LDR R0, [SP, #0] 0x3418A102: F1B0 5F40 CMP.W R0, #0x30000000 0x3418A106: D01B BEQ 46L14 ; 0x3418A140 0x3418A108: E023 B 46L15 ; 0x3418A152
.L11: 0x3418A10A: F007 FBF3 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F4 0x3418A10E: 9004 STR R0, [SP, #16] 0x3418A110: 9804 LDR R0, [SP, #16] 0x3418A112: 9903 LDR R1, [SP, #12] 0x3418A114: FBB0 F0F1 UDIV R0, R0, R1 0x3418A118: 9004 STR R0, [SP, #16] 0x3418A11A: E01A B 46L15 ; 0x3418A152
.L12: 0x3418A11C: F007 FC2C BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191978 0x3418A120: 9004 STR R0, [SP, #16] 0x3418A122: 9804 LDR R0, [SP, #16] 0x3418A124: 9903 LDR R1, [SP, #12] 0x3418A126: FBB0 F0F1 UDIV R0, R0, R1 0x3418A12A: 9004 STR R0, [SP, #16] 0x3418A12C: E011 B 46L15 ; 0x3418A152
.L13: 0x3418A12E: F007 FC65 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919FC 0x3418A132: 9004 STR R0, [SP, #16] 0x3418A134: 9804 LDR R0, [SP, #16] 0x3418A136: 9903 LDR R1, [SP, #12] 0x3418A138: FBB0 F0F1 UDIV R0, R0, R1 0x3418A13C: 9004 STR R0, [SP, #16] 0x3418A13E: E008 B 46L15 ; 0x3418A152
.L14: 0x3418A140: F007 FC9E BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A80 0x3418A144: 9004 STR R0, [SP, #16] 0x3418A146: 9804 LDR R0, [SP, #16] 0x3418A148: 9903 LDR R1, [SP, #12] 0x3418A14A: FBB0 F0F1 UDIV R0, R0, R1 0x3418A14E: 9004 STR R0, [SP, #16] 0x3418A150: E7FF B 46L15 ; 0x3418A152
.L15: 0x3418A152: E01C B 46L22 ; 0x3418A18E
.L16: 0x3418A154: F000 FCB6 BL LL_RCC_HSI_IsReady.77 ; 0x3418AAC4 0x3418A158: B140 CBZ R0, .L17 ; 0x3418A16C 0x3418A15A: F000 FCBB BL LL_RCC_HSI_GetDivider.78 ; 0x3418AAD4 0x3418A15E: 09C1 LSRS R1, R0, #7 0x3418A160: F249 0000 MOVW R0, #0x9000 0x3418A164: F2C0 30D0 MOVT R0, #0x03D0 0x3418A168: 40C8 LSRS R0, R1 0x3418A16A: 9004 STR R0, [SP, #16]
.L17: 0x3418A16C: E00F B 46L22 ; 0x3418A18E
.L18: 0x3418A16E: F000 FCB9 BL LL_RCC_MSI_IsReady.79 ; 0x3418AAE4 0x3418A172: B120 CBZ R0, .L19 ; 0x3418A17E 0x3418A174: F640 1000 MOVW R0, #0x0900 0x3418A178: F2C0 003D MOVT R0, #61 0x3418A17C: 9004 STR R0, [SP, #16]
.L19: 0x3418A17E: E006 B 46L22 ; 0x3418A18E
.L20: 0x3418A180: F7FE FA1A BL LL_RCC_LSE_IsReady.59 ; 0x341885B8 0x3418A184: B110 CBZ R0, .L21 ; 0x3418A18C 0x3418A186: F44F 4000 MOV.W R0, #0x8000 0x3418A18A: 9004 STR R0, [SP, #16]
.L21: 0x3418A18C: E7FF B 46L22 ; 0x3418A18E
.L22: 0x3418A18E: 9804 LDR R0, [SP, #16] 0x3418A190: B006 ADD SP, SP, #24 0x3418A192: BD80 POP 123R7, PC}

Section .text.RCCEx_GetUARTCLKFreq from blto2_FSBL_lto.o, size=916, align=4


RCCEx_GetUARTCLKFreq: 0x3418A194: B580 PUSH 123R7, LR} 0x3418A196: B086 SUB SP, SP, #24 0x3418A198: 9005 STR R0, [SP, #20] 0x3418A19A: 2000 MOVS R0, #0 0x3418A19C: 9004 STR R0, [SP, #16] 0x3418A19E: 9805 LDR R0, [SP, #20] 0x3418A1A0: F000 FDB0 BL LL_RCC_GetUARTClockSource ; 0x3418AD04 0x3418A1A4: 4601 MOV R1, R0 0x3418A1A6: 9102 STR R1, [SP, #8] 0x3418A1A8: 2134 MOVS R1, #52 0x3418A1AA: F2C0 7100 MOVT R1, #0x0700 0x3418A1AE: 4288 CMP R0, R1 0x3418A1B0: F000 8113 BEQ.W 46L2 ; 0x3418A3DA 0x3418A1B4: 9802 LDR R0, [SP, #8] 0x3418A1B6: F640 4130 MOVW R1, #0x0C30 0x3418A1BA: F2C0 7100 MOVT R1, #0x0700 0x3418A1BE: 4288 CMP R0, R1 0x3418A1C0: F000 8103 BEQ.W 46L1 ; 0x3418A3CA 0x3418A1C4: 9802 LDR R0, [SP, #8] 0x3418A1C6: F241 0130 MOVW R1, #0x1030 0x3418A1CA: F2C0 7100 MOVT R1, #0x0700 0x3418A1CE: 4288 CMP R0, R1 0x3418A1D0: F000 80FB BEQ.W 46L1 ; 0x3418A3CA 0x3418A1D4: 9802 LDR R0, [SP, #8] 0x3418A1D6: F641 0130 MOVW R1, #0x1830 0x3418A1DA: F2C0 7100 MOVT R1, #0x0700 0x3418A1DE: 4288 CMP R0, R1 0x3418A1E0: F000 80F3 BEQ.W 46L1 ; 0x3418A3CA 0x3418A1E4: 9802 LDR R0, [SP, #8] 0x3418A1E6: F641 4130 MOVW R1, #0x1C30 0x3418A1EA: F2C0 7100 MOVT R1, #0x0700 0x3418A1EE: 4288 CMP R0, R1 0x3418A1F0: F000 80EB BEQ.W 46L1 ; 0x3418A3CA 0x3418A1F4: 9802 LDR R0, [SP, #8] 0x3418A1F6: 2134 MOVS R1, #52 0x3418A1F8: F2C0 7101 MOVT R1, #0x0701 0x3418A1FC: 4288 CMP R0, R1 0x3418A1FE: F000 80F4 BEQ.W 46L3 ; 0x3418A3EA 0x3418A202: 9802 LDR R0, [SP, #8] 0x3418A204: F640 4130 MOVW R1, #0x0C30 0x3418A208: F2C0 7101 MOVT R1, #0x0701 0x3418A20C: 4288 CMP R0, R1 0x3418A20E: F000 80EC BEQ.W 46L3 ; 0x3418A3EA 0x3418A212: 9802 LDR R0, [SP, #8] 0x3418A214: F241 0130 MOVW R1, #0x1030 0x3418A218: F2C0 7101 MOVT R1, #0x0701 0x3418A21C: 4288 CMP R0, R1 0x3418A21E: F000 80E4 BEQ.W 46L3 ; 0x3418A3EA 0x3418A222: 9802 LDR R0, [SP, #8] 0x3418A224: F641 0130 MOVW R1, #0x1830 0x3418A228: F2C0 7101 MOVT R1, #0x0701 0x3418A22C: 4288 CMP R0, R1 0x3418A22E: F000 80DC BEQ.W 46L3 ; 0x3418A3EA 0x3418A232: 9802 LDR R0, [SP, #8] 0x3418A234: F641 4130 MOVW R1, #0x1C30 0x3418A238: F2C0 7101 MOVT R1, #0x0701 0x3418A23C: 4288 CMP R0, R1 0x3418A23E: F000 80D4 BEQ.W 46L3 ; 0x3418A3EA 0x3418A242: 9802 LDR R0, [SP, #8] 0x3418A244: 2134 MOVS R1, #52 0x3418A246: F2C0 7102 MOVT R1, #0x0702 0x3418A24A: 4288 CMP R0, R1 0x3418A24C: F000 80D2 BEQ.W 46L4 ; 0x3418A3F4 0x3418A250: 9802 LDR R0, [SP, #8] 0x3418A252: F640 4130 MOVW R1, #0x0C30 0x3418A256: F2C0 7102 MOVT R1, #0x0702 0x3418A25A: 4288 CMP R0, R1 0x3418A25C: F000 80CA BEQ.W 46L4 ; 0x3418A3F4 0x3418A260: 9802 LDR R0, [SP, #8] 0x3418A262: F241 0130 MOVW R1, #0x1030 0x3418A266: F2C0 7102 MOVT R1, #0x0702 0x3418A26A: 4288 CMP R0, R1 0x3418A26C: F000 80C2 BEQ.W 46L4 ; 0x3418A3F4 0x3418A270: 9802 LDR R0, [SP, #8] 0x3418A272: F641 0130 MOVW R1, #0x1830 0x3418A276: F2C0 7102 MOVT R1, #0x0702 0x3418A27A: 4288 CMP R0, R1 0x3418A27C: F000 80BA BEQ.W 46L4 ; 0x3418A3F4 0x3418A280: 9802 LDR R0, [SP, #8] 0x3418A282: F641 4130 MOVW R1, #0x1C30 0x3418A286: F2C0 7102 MOVT R1, #0x0702 0x3418A28A: 4288 CMP R0, R1 0x3418A28C: F000 80B2 BEQ.W 46L4 ; 0x3418A3F4 0x3418A290: 9802 LDR R0, [SP, #8] 0x3418A292: 2134 MOVS R1, #52 0x3418A294: F2C0 7103 MOVT R1, #0x0703 0x3418A298: 4288 CMP R0, R1 0x3418A29A: F000 80E8 BEQ.W 46L10 ; 0x3418A46E 0x3418A29E: 9802 LDR R0, [SP, #8] 0x3418A2A0: F640 4130 MOVW R1, #0x0C30 0x3418A2A4: F2C0 7103 MOVT R1, #0x0703 0x3418A2A8: 4288 CMP R0, R1 0x3418A2AA: F000 80E0 BEQ.W 46L10 ; 0x3418A46E 0x3418A2AE: 9802 LDR R0, [SP, #8] 0x3418A2B0: F241 0130 MOVW R1, #0x1030 0x3418A2B4: F2C0 7103 MOVT R1, #0x0703 0x3418A2B8: 4288 CMP R0, R1 0x3418A2BA: F000 80D8 BEQ.W 46L10 ; 0x3418A46E 0x3418A2BE: 9802 LDR R0, [SP, #8] 0x3418A2C0: F641 0130 MOVW R1, #0x1830 0x3418A2C4: F2C0 7103 MOVT R1, #0x0703 0x3418A2C8: 4288 CMP R0, R1 0x3418A2CA: F000 80D0 BEQ.W 46L10 ; 0x3418A46E 0x3418A2CE: 9802 LDR R0, [SP, #8] 0x3418A2D0: F641 4130 MOVW R1, #0x1C30 0x3418A2D4: F2C0 7103 MOVT R1, #0x0703 0x3418A2D8: 4288 CMP R0, R1 0x3418A2DA: F000 80C8 BEQ.W 46L10 ; 0x3418A46E 0x3418A2DE: 9802 LDR R0, [SP, #8] 0x3418A2E0: 2134 MOVS R1, #52 0x3418A2E2: F2C0 7104 MOVT R1, #0x0704 0x3418A2E6: 4288 CMP R0, R1 0x3418A2E8: F000 8114 BEQ.W 46L20 ; 0x3418A514 0x3418A2EC: 9802 LDR R0, [SP, #8] 0x3418A2EE: F640 4130 MOVW R1, #0x0C30 0x3418A2F2: F2C0 7104 MOVT R1, #0x0704 0x3418A2F6: 4288 CMP R0, R1 0x3418A2F8: F000 810C BEQ.W 46L20 ; 0x3418A514 0x3418A2FC: 9802 LDR R0, [SP, #8] 0x3418A2FE: F241 0130 MOVW R1, #0x1030 0x3418A302: F2C0 7104 MOVT R1, #0x0704 0x3418A306: 4288 CMP R0, R1 0x3418A308: F000 8104 BEQ.W 46L20 ; 0x3418A514 0x3418A30C: 9802 LDR R0, [SP, #8] 0x3418A30E: F641 0130 MOVW R1, #0x1830 0x3418A312: F2C0 7104 MOVT R1, #0x0704 0x3418A316: 4288 CMP R0, R1 0x3418A318: F000 80FC BEQ.W 46L20 ; 0x3418A514 0x3418A31C: 9802 LDR R0, [SP, #8] 0x3418A31E: F641 4130 MOVW R1, #0x1C30 0x3418A322: F2C0 7104 MOVT R1, #0x0704 0x3418A326: 4288 CMP R0, R1 0x3418A328: F000 80F4 BEQ.W 46L20 ; 0x3418A514 0x3418A32C: 9802 LDR R0, [SP, #8] 0x3418A32E: 2134 MOVS R1, #52 0x3418A330: F2C0 7105 MOVT R1, #0x0705 0x3418A334: 4288 CMP R0, R1 0x3418A336: F000 80E4 BEQ.W 46L18 ; 0x3418A502 0x3418A33A: 9802 LDR R0, [SP, #8] 0x3418A33C: F640 4130 MOVW R1, #0x0C30 0x3418A340: F2C0 7105 MOVT R1, #0x0705 0x3418A344: 4288 CMP R0, R1 0x3418A346: F000 80DC BEQ.W 46L18 ; 0x3418A502 0x3418A34A: 9802 LDR R0, [SP, #8] 0x3418A34C: F241 0130 MOVW R1, #0x1030 0x3418A350: F2C0 7105 MOVT R1, #0x0705 0x3418A354: 4288 CMP R0, R1 0x3418A356: F000 80D4 BEQ.W 46L18 ; 0x3418A502 0x3418A35A: 9802 LDR R0, [SP, #8] 0x3418A35C: F641 0130 MOVW R1, #0x1830 0x3418A360: F2C0 7105 MOVT R1, #0x0705 0x3418A364: 4288 CMP R0, R1 0x3418A366: F000 80CC BEQ.W 46L18 ; 0x3418A502 0x3418A36A: 9802 LDR R0, [SP, #8] 0x3418A36C: F641 4130 MOVW R1, #0x1C30 0x3418A370: F2C0 7105 MOVT R1, #0x0705 0x3418A374: 4288 CMP R0, R1 0x3418A376: F000 80C4 BEQ.W 46L18 ; 0x3418A502 0x3418A37A: 9802 LDR R0, [SP, #8] 0x3418A37C: 2134 MOVS R1, #52 0x3418A37E: F2C0 7106 MOVT R1, #0x0706 0x3418A382: 4288 CMP R0, R1 0x3418A384: F000 80B0 BEQ.W 46L16 ; 0x3418A4E8 0x3418A388: 9802 LDR R0, [SP, #8] 0x3418A38A: F640 4130 MOVW R1, #0x0C30 0x3418A38E: F2C0 7106 MOVT R1, #0x0706 0x3418A392: 4288 CMP R0, R1 0x3418A394: F000 80A8 BEQ.W 46L16 ; 0x3418A4E8 0x3418A398: 9802 LDR R0, [SP, #8] 0x3418A39A: F241 0130 MOVW R1, #0x1030 0x3418A39E: F2C0 7106 MOVT R1, #0x0706 0x3418A3A2: 4288 CMP R0, R1 0x3418A3A4: F000 80A0 BEQ.W 46L16 ; 0x3418A4E8 0x3418A3A8: 9802 LDR R0, [SP, #8] 0x3418A3AA: F641 0130 MOVW R1, #0x1830 0x3418A3AE: F2C0 7106 MOVT R1, #0x0706 0x3418A3B2: 4288 CMP R0, R1 0x3418A3B4: F000 8098 BEQ.W 46L16 ; 0x3418A4E8 0x3418A3B8: 9802 LDR R0, [SP, #8] 0x3418A3BA: F641 4130 MOVW R1, #0x1C30 0x3418A3BE: F2C0 7106 MOVT R1, #0x0706 0x3418A3C2: 4288 CMP R0, R1 0x3418A3C4: F000 8090 BEQ.W 46L16 ; 0x3418A4E8 0x3418A3C8: E0AB B 46L22 ; 0x3418A522
.L1: 0x3418A3CA: F005 FF17 BL HAL_RCC_GetSysClockFreq ; 0x341901FC 0x3418A3CE: F000 FA79 BL RCCEx_GetHCLKFreq ; 0x3418A8C4 0x3418A3D2: F000 FC9F BL RCCEx_GetPCLK1Freq ; 0x3418AD14 0x3418A3D6: 9004 STR R0, [SP, #16] 0x3418A3D8: E0A3 B 46L22 ; 0x3418A522
.L2: 0x3418A3DA: F005 FF0F BL HAL_RCC_GetSysClockFreq ; 0x341901FC 0x3418A3DE: F000 FA71 BL RCCEx_GetHCLKFreq ; 0x3418A8C4 0x3418A3E2: F000 FCA5 BL RCCEx_GetPCLK2Freq ; 0x3418AD30 0x3418A3E6: 9004 STR R0, [SP, #16] 0x3418A3E8: E09B B 46L22 ; 0x3418A522
.L3: 0x3418A3EA: 2007 MOVS R0, #7 0x3418A3EC: F7FE FBC8 BL RCCEx_GetCLKPCLKFreq ; 0x34188B80 0x3418A3F0: 9004 STR R0, [SP, #16] 0x3418A3F2: E096 B 46L22 ; 0x3418A522
.L4: 0x3418A3F4: F000 FCAA BL LL_RCC_IC9_IsEnabled ; 0x3418AD4C 0x3418A3F8: B3C0 CBZ R0, .L9 ; 0x3418A46C 0x3418A3FA: F007 FB9B BL LL_RCC_IC9_GetDivider ; 0x34191B34 0x3418A3FE: 9003 STR R0, [SP, #12] 0x3418A400: F000 FCAC BL LL_RCC_IC9_GetSource ; 0x3418AD5C 0x3418A404: 4601 MOV R1, R0 0x3418A406: 9101 STR R1, [SP, #4] 0x3418A408: B160 CBZ R0, .L5 ; 0x3418A424 0x3418A40A: 9801 LDR R0, [SP, #4] 0x3418A40C: F1B0 5F80 CMP.W R0, #0x10000000 0x3418A410: D011 BEQ 46L6 ; 0x3418A436 0x3418A412: 9801 LDR R0, [SP, #4] 0x3418A414: F1B0 5F00 CMP.W R0, #0x20000000 0x3418A418: D016 BEQ 46L7 ; 0x3418A448 0x3418A41A: 9801 LDR R0, [SP, #4] 0x3418A41C: F1B0 5F40 CMP.W R0, #0x30000000 0x3418A420: D01B BEQ 46L8 ; 0x3418A45A 0x3418A422: E023 B 46L9 ; 0x3418A46C
.L5: 0x3418A424: F007 FA66 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F4 0x3418A428: 9004 STR R0, [SP, #16] 0x3418A42A: 9804 LDR R0, [SP, #16] 0x3418A42C: 9903 LDR R1, [SP, #12] 0x3418A42E: FBB0 F0F1 UDIV R0, R0, R1 0x3418A432: 9004 STR R0, [SP, #16] 0x3418A434: E01A B 46L9 ; 0x3418A46C
.L6: 0x3418A436: F007 FA9F BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191978 0x3418A43A: 9004 STR R0, [SP, #16] 0x3418A43C: 9804 LDR R0, [SP, #16] 0x3418A43E: 9903 LDR R1, [SP, #12] 0x3418A440: FBB0 F0F1 UDIV R0, R0, R1 0x3418A444: 9004 STR R0, [SP, #16] 0x3418A446: E011 B 46L9 ; 0x3418A46C
.L7: 0x3418A448: F007 FAD8 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919FC 0x3418A44C: 9004 STR R0, [SP, #16] 0x3418A44E: 9804 LDR R0, [SP, #16] 0x3418A450: 9903 LDR R1, [SP, #12] 0x3418A452: FBB0 F0F1 UDIV R0, R0, R1 0x3418A456: 9004 STR R0, [SP, #16] 0x3418A458: E008 B 46L9 ; 0x3418A46C
.L8: 0x3418A45A: F007 FB11 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A80 0x3418A45E: 9004 STR R0, [SP, #16] 0x3418A460: 9804 LDR R0, [SP, #16] 0x3418A462: 9903 LDR R1, [SP, #12] 0x3418A464: FBB0 F0F1 UDIV R0, R0, R1 0x3418A468: 9004 STR R0, [SP, #16] 0x3418A46A: E7FF B 46L9 ; 0x3418A46C
.L9: 0x3418A46C: E059 B 46L22 ; 0x3418A522
.L10: 0x3418A46E: F000 FC7D BL LL_RCC_IC14_IsEnabled ; 0x3418AD6C 0x3418A472: B3C0 CBZ R0, .L15 ; 0x3418A4E6 0x3418A474: F007 FB6A BL LL_RCC_IC14_GetDivider ; 0x34191B4C 0x3418A478: 9003 STR R0, [SP, #12] 0x3418A47A: F000 FC7F BL LL_RCC_IC14_GetSource ; 0x3418AD7C 0x3418A47E: 4601 MOV R1, R0 0x3418A480: 9100 STR R1, [SP, #0] 0x3418A482: B160 CBZ R0, .L11 ; 0x3418A49E 0x3418A484: 9800 LDR R0, [SP, #0] 0x3418A486: F1B0 5F80 CMP.W R0, #0x10000000 0x3418A48A: D011 BEQ 46L12 ; 0x3418A4B0 0x3418A48C: 9800 LDR R0, [SP, #0] 0x3418A48E: F1B0 5F00 CMP.W R0, #0x20000000 0x3418A492: D016 BEQ 46L13 ; 0x3418A4C2 0x3418A494: 9800 LDR R0, [SP, #0] 0x3418A496: F1B0 5F40 CMP.W R0, #0x30000000 0x3418A49A: D01B BEQ 46L14 ; 0x3418A4D4 0x3418A49C: E023 B 46L15 ; 0x3418A4E6
.L11: 0x3418A49E: F007 FA29 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F4 0x3418A4A2: 9004 STR R0, [SP, #16] 0x3418A4A4: 9804 LDR R0, [SP, #16] 0x3418A4A6: 9903 LDR R1, [SP, #12] 0x3418A4A8: FBB0 F0F1 UDIV R0, R0, R1 0x3418A4AC: 9004 STR R0, [SP, #16] 0x3418A4AE: E01A B 46L15 ; 0x3418A4E6
.L12: 0x3418A4B0: F007 FA62 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191978 0x3418A4B4: 9004 STR R0, [SP, #16] 0x3418A4B6: 9804 LDR R0, [SP, #16] 0x3418A4B8: 9903 LDR R1, [SP, #12] 0x3418A4BA: FBB0 F0F1 UDIV R0, R0, R1 0x3418A4BE: 9004 STR R0, [SP, #16] 0x3418A4C0: E011 B 46L15 ; 0x3418A4E6
.L13: 0x3418A4C2: F007 FA9B BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919FC 0x3418A4C6: 9004 STR R0, [SP, #16] 0x3418A4C8: 9804 LDR R0, [SP, #16] 0x3418A4CA: 9903 LDR R1, [SP, #12] 0x3418A4CC: FBB0 F0F1 UDIV R0, R0, R1 0x3418A4D0: 9004 STR R0, [SP, #16] 0x3418A4D2: E008 B 46L15 ; 0x3418A4E6
.L14: 0x3418A4D4: F007 FAD4 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A80 0x3418A4D8: 9004 STR R0, [SP, #16] 0x3418A4DA: 9804 LDR R0, [SP, #16] 0x3418A4DC: 9903 LDR R1, [SP, #12] 0x3418A4DE: FBB0 F0F1 UDIV R0, R0, R1 0x3418A4E2: 9004 STR R0, [SP, #16] 0x3418A4E4: E7FF B 46L15 ; 0x3418A4E6
.L15: 0x3418A4E6: E01C B 46L22 ; 0x3418A522
.L16: 0x3418A4E8: F000 FAEC BL LL_RCC_HSI_IsReady.77 ; 0x3418AAC4 0x3418A4EC: B140 CBZ R0, .L17 ; 0x3418A500 0x3418A4EE: F000 FAF1 BL LL_RCC_HSI_GetDivider.78 ; 0x3418AAD4 0x3418A4F2: 09C1 LSRS R1, R0, #7 0x3418A4F4: F249 0000 MOVW R0, #0x9000 0x3418A4F8: F2C0 30D0 MOVT R0, #0x03D0 0x3418A4FC: 40C8 LSRS R0, R1 0x3418A4FE: 9004 STR R0, [SP, #16]
.L17: 0x3418A500: E00F B 46L22 ; 0x3418A522
.L18: 0x3418A502: F000 FAEF BL LL_RCC_MSI_IsReady.79 ; 0x3418AAE4 0x3418A506: B120 CBZ R0, .L19 ; 0x3418A512 0x3418A508: F640 1000 MOVW R0, #0x0900 0x3418A50C: F2C0 003D MOVT R0, #61 0x3418A510: 9004 STR R0, [SP, #16]
.L19: 0x3418A512: E006 B 46L22 ; 0x3418A522
.L20: 0x3418A514: F7FE F850 BL LL_RCC_LSE_IsReady.59 ; 0x341885B8 0x3418A518: B110 CBZ R0, .L21 ; 0x3418A520 0x3418A51A: F44F 4000 MOV.W R0, #0x8000 0x3418A51E: 9004 STR R0, [SP, #16]
.L21: 0x3418A520: E7FF B 46L22 ; 0x3418A522
.L22: 0x3418A522: 9804 LDR R0, [SP, #16] 0x3418A524: B006 ADD SP, SP, #24 0x3418A526: BD80 POP 123R7, PC}

Section .text.RCCEx_GetOTGPHYCLKFreq from blto2_FSBL_lto.o, size=324, align=4


RCCEx_GetOTGPHYCLKFreq: 0x3418A528: B580 PUSH 123R7, LR} 0x3418A52A: B086 SUB SP, SP, #24 0x3418A52C: 9005 STR R0, [SP, #20] 0x3418A52E: 2000 MOVS R0, #0 0x3418A530: 9004 STR R0, [SP, #16] 0x3418A532: 9805 LDR R0, [SP, #20] 0x3418A534: F000 FBCE BL LL_RCC_GetUSBClockSource ; 0x3418ACD4 0x3418A538: 4601 MOV R1, R0 0x3418A53A: 9102 STR R1, [SP, #8] 0x3418A53C: F640 4114 MOVW R1, #0x0C14 0x3418A540: F2C0 3100 MOVT R1, #0x0300 0x3418A544: 4288 CMP R0, R1 0x3418A546: D036 BEQ 46L2 ; 0x3418A5B6 0x3418A548: 9802 LDR R0, [SP, #8] 0x3418A54A: F241 4114 MOVW R1, #0x1414 0x3418A54E: F2C0 3100 MOVT R1, #0x0300 0x3418A552: 4288 CMP R0, R1 0x3418A554: D02F BEQ 46L2 ; 0x3418A5B6 0x3418A556: 9802 LDR R0, [SP, #8] 0x3418A558: F640 4114 MOVW R1, #0x0C14 0x3418A55C: F2C0 3101 MOVT R1, #0x0301 0x3418A560: 4288 CMP R0, R1 0x3418A562: D023 BEQ 46L1 ; 0x3418A5AC 0x3418A564: 9802 LDR R0, [SP, #8] 0x3418A566: F241 4114 MOVW R1, #0x1414 0x3418A56A: F2C0 3101 MOVT R1, #0x0301 0x3418A56E: 4288 CMP R0, R1 0x3418A570: D01C BEQ 46L1 ; 0x3418A5AC 0x3418A572: 9802 LDR R0, [SP, #8] 0x3418A574: F640 4114 MOVW R1, #0x0C14 0x3418A578: F2C0 3102 MOVT R1, #0x0302 0x3418A57C: 4288 CMP R0, R1 0x3418A57E: D035 BEQ 46L7 ; 0x3418A5EC 0x3418A580: 9802 LDR R0, [SP, #8] 0x3418A582: F241 4114 MOVW R1, #0x1414 0x3418A586: F2C0 3102 MOVT R1, #0x0302 0x3418A58A: 4288 CMP R0, R1 0x3418A58C: D02E BEQ 46L7 ; 0x3418A5EC 0x3418A58E: 9802 LDR R0, [SP, #8] 0x3418A590: F640 4114 MOVW R1, #0x0C14 0x3418A594: F2C0 3103 MOVT R1, #0x0303 0x3418A598: 4288 CMP R0, R1 0x3418A59A: D015 BEQ 46L4 ; 0x3418A5C8 0x3418A59C: 9802 LDR R0, [SP, #8] 0x3418A59E: F241 4114 MOVW R1, #0x1414 0x3418A5A2: F2C0 3103 MOVT R1, #0x0303 0x3418A5A6: 4288 CMP R0, R1 0x3418A5A8: D00E BEQ 46L4 ; 0x3418A5C8 0x3418A5AA: E05C B 46L13 ; 0x3418A666
.L1: 0x3418A5AC: 2007 MOVS R0, #7 0x3418A5AE: F7FE FAE7 BL RCCEx_GetCLKPCLKFreq ; 0x34188B80 0x3418A5B2: 9004 STR R0, [SP, #16] 0x3418A5B4: E057 B 46L13 ; 0x3418A666
.L2: 0x3418A5B6: F000 FAA5 BL LL_RCC_HSE_IsReady.80 ; 0x3418AB04 0x3418A5BA: B120 CBZ R0, .L3 ; 0x3418A5C6 0x3418A5BC: F243 6000 MOVW R0, #0x3600 0x3418A5C0: F2C0 106E MOVT R0, #0x016E 0x3418A5C4: 9004 STR R0, [SP, #16]
.L3: 0x3418A5C6: E04E B 46L13 ; 0x3418A666
.L4: 0x3418A5C8: F000 FA9C BL LL_RCC_HSE_IsReady.80 ; 0x3418AB04 0x3418A5CC: B168 CBZ R0, .L6 ; 0x3418A5EA 0x3418A5CE: F7FE F9ED BL LL_RCC_HSE_IsSelectedHSEDiv2AsDiv2Clock ; 0x341889AC 0x3418A5D2: B928 CBNZ R0, .L5 ; 0x3418A5E0 0x3418A5D4: F646 4000 MOVW R0, #0x6C00 0x3418A5D8: F2C0 20DC MOVT R0, #0x02DC 0x3418A5DC: 9004 STR R0, [SP, #16] 0x3418A5DE: E004 B 46L6 ; 0x3418A5EA
.L5: 0x3418A5E0: F243 6000 MOVW R0, #0x3600 0x3418A5E4: F2C0 106E MOVT R0, #0x016E 0x3418A5E8: 9004 STR R0, [SP, #16]
.L6: 0x3418A5EA: E03C B 46L13 ; 0x3418A666
.L7: 0x3418A5EC: F000 FB7A BL LL_RCC_IC15_IsEnabled ; 0x3418ACE4 0x3418A5F0: B3C0 CBZ R0, .L12 ; 0x3418A664 0x3418A5F2: F007 FA93 BL LL_RCC_IC15_GetDivider ; 0x34191B1C 0x3418A5F6: 9003 STR R0, [SP, #12] 0x3418A5F8: F000 FB7C BL LL_RCC_IC15_GetSource ; 0x3418ACF4 0x3418A5FC: 4601 MOV R1, R0 0x3418A5FE: 9101 STR R1, [SP, #4] 0x3418A600: B160 CBZ R0, .L8 ; 0x3418A61C 0x3418A602: 9801 LDR R0, [SP, #4] 0x3418A604: F1B0 5F80 CMP.W R0, #0x10000000 0x3418A608: D011 BEQ 46L9 ; 0x3418A62E 0x3418A60A: 9801 LDR R0, [SP, #4] 0x3418A60C: F1B0 5F00 CMP.W R0, #0x20000000 0x3418A610: D016 BEQ 46L10 ; 0x3418A640 0x3418A612: 9801 LDR R0, [SP, #4] 0x3418A614: F1B0 5F40 CMP.W R0, #0x30000000 0x3418A618: D01B BEQ 46L11 ; 0x3418A652 0x3418A61A: E023 B 46L12 ; 0x3418A664
.L8: 0x3418A61C: F007 F96A BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F4 0x3418A620: 9004 STR R0, [SP, #16] 0x3418A622: 9804 LDR R0, [SP, #16] 0x3418A624: 9903 LDR R1, [SP, #12] 0x3418A626: FBB0 F0F1 UDIV R0, R0, R1 0x3418A62A: 9004 STR R0, [SP, #16] 0x3418A62C: E01A B 46L12 ; 0x3418A664
.L9: 0x3418A62E: F007 F9A3 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191978 0x3418A632: 9004 STR R0, [SP, #16] 0x3418A634: 9804 LDR R0, [SP, #16] 0x3418A636: 9903 LDR R1, [SP, #12] 0x3418A638: FBB0 F0F1 UDIV R0, R0, R1 0x3418A63C: 9004 STR R0, [SP, #16] 0x3418A63E: E011 B 46L12 ; 0x3418A664
.L10: 0x3418A640: F007 F9DC BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919FC 0x3418A644: 9004 STR R0, [SP, #16] 0x3418A646: 9804 LDR R0, [SP, #16] 0x3418A648: 9903 LDR R1, [SP, #12] 0x3418A64A: FBB0 F0F1 UDIV R0, R0, R1 0x3418A64E: 9004 STR R0, [SP, #16] 0x3418A650: E008 B 46L12 ; 0x3418A664
.L11: 0x3418A652: F007 FA15 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A80 0x3418A656: 9004 STR R0, [SP, #16] 0x3418A658: 9804 LDR R0, [SP, #16] 0x3418A65A: 9903 LDR R1, [SP, #12] 0x3418A65C: FBB0 F0F1 UDIV R0, R0, R1 0x3418A660: 9004 STR R0, [SP, #16] 0x3418A662: E7FF B 46L12 ; 0x3418A664
.L12: 0x3418A664: E7FF B 46L13 ; 0x3418A666
.L13: 0x3418A666: 9804 LDR R0, [SP, #16] 0x3418A668: B006 ADD SP, SP, #24 0x3418A66A: BD80 POP 123R7, PC}

Section .text.RCCEx_GetOTGPHYCKREFCLKFreq from blto2_FSBL_lto.o, size=148, align=4


RCCEx_GetOTGPHYCKREFCLKFreq: 0x3418A66C: B580 PUSH 123R7, LR} 0x3418A66E: B084 SUB SP, SP, #16 0x3418A670: 9003 STR R0, [SP, #12] 0x3418A672: 2000 MOVS R0, #0 0x3418A674: 9002 STR R0, [SP, #8] 0x3418A676: 9803 LDR R0, [SP, #12] 0x3418A678: F000 FB2C BL LL_RCC_GetUSBClockSource ; 0x3418ACD4 0x3418A67C: 4601 MOV R1, R0 0x3418A67E: 9101 STR R1, [SP, #4] 0x3418A680: F241 0114 MOVW R1, #0x1014 0x3418A684: F2C0 1100 MOVT R1, #0x0100 0x3418A688: 4288 CMP R0, R1 0x3418A68A: D026 BEQ 46L4 ; 0x3418A6DA 0x3418A68C: 9801 LDR R0, [SP, #4] 0x3418A68E: F641 0114 MOVW R1, #0x1814 0x3418A692: F2C0 1100 MOVT R1, #0x0100 0x3418A696: 4288 CMP R0, R1 0x3418A698: D027 BEQ 46L5 ; 0x3418A6EA 0x3418A69A: 9801 LDR R0, [SP, #4] 0x3418A69C: F241 0114 MOVW R1, #0x1014 0x3418A6A0: F2C0 1101 MOVT R1, #0x0101 0x3418A6A4: 4288 CMP R0, R1 0x3418A6A6: D006 BEQ 46L1 ; 0x3418A6B6 0x3418A6A8: 9801 LDR R0, [SP, #4] 0x3418A6AA: F641 0114 MOVW R1, #0x1814 0x3418A6AE: F2C0 1101 MOVT R1, #0x0101 0x3418A6B2: 4288 CMP R0, R1 0x3418A6B4: D121 BNE 46L6 ; 0x3418A6FA
.L1: 0x3418A6B6: F000 FA25 BL LL_RCC_HSE_IsReady.80 ; 0x3418AB04 0x3418A6BA: B168 CBZ R0, .L3 ; 0x3418A6D8 0x3418A6BC: F7FE F976 BL LL_RCC_HSE_IsSelectedHSEDiv2AsDiv2Clock ; 0x341889AC 0x3418A6C0: B928 CBNZ R0, .L2 ; 0x3418A6CE 0x3418A6C2: F646 4000 MOVW R0, #0x6C00 0x3418A6C6: F2C0 20DC MOVT R0, #0x02DC 0x3418A6CA: 9002 STR R0, [SP, #8] 0x3418A6CC: E004 B 46L3 ; 0x3418A6D8
.L2: 0x3418A6CE: F243 6000 MOVW R0, #0x3600 0x3418A6D2: F2C0 106E MOVT R0, #0x016E 0x3418A6D6: 9002 STR R0, [SP, #8]
.L3: 0x3418A6D8: E00F B 46L6 ; 0x3418A6FA
.L4: 0x3418A6DA: F640 4014 MOVW R0, #0x0C14 0x3418A6DE: F2C0 3000 MOVT R0, #0x0300 0x3418A6E2: F7FF FF21 BL RCCEx_GetOTGPHYCLKFreq ; 0x3418A528 0x3418A6E6: 9002 STR R0, [SP, #8] 0x3418A6E8: E007 B 46L6 ; 0x3418A6FA
.L5: 0x3418A6EA: F241 4014 MOVW R0, #0x1414 0x3418A6EE: F2C0 3000 MOVT R0, #0x0300 0x3418A6F2: F7FF FF19 BL RCCEx_GetOTGPHYCLKFreq ; 0x3418A528 0x3418A6F6: 9002 STR R0, [SP, #8] 0x3418A6F8: E7FF B 46L6 ; 0x3418A6FA
.L6: 0x3418A6FA: 9802 LDR R0, [SP, #8] 0x3418A6FC: B004 ADD SP, SP, #16 0x3418A6FE: BD80 POP 123R7, PC}

Section .text.RCCEx_GetXSPICLKFreq from blto2_FSBL_lto.o, size=452, align=4


RCCEx_GetXSPICLKFreq: 0x3418A700: B580 PUSH 123R7, LR} 0x3418A702: B086 SUB SP, SP, #24 0x3418A704: 9005 STR R0, [SP, #20] 0x3418A706: 2000 MOVS R0, #0 0x3418A708: 9004 STR R0, [SP, #16] 0x3418A70A: 9805 LDR R0, [SP, #20] 0x3418A70C: F7FE F956 BL LL_RCC_GetXSPIClockSource ; 0x341889BC 0x3418A710: 4601 MOV R1, R0 0x3418A712: 9102 STR R1, [SP, #8] 0x3418A714: 2114 MOVS R1, #20 0x3418A716: F2C0 3100 MOVT R1, #0x0300 0x3418A71A: 4288 CMP R0, R1 0x3418A71C: D04A BEQ 46L1 ; 0x3418A7B4 0x3418A71E: 9802 LDR R0, [SP, #8] 0x3418A720: F240 4114 MOVW R1, #0x0414 0x3418A724: F2C0 3100 MOVT R1, #0x0300 0x3418A728: 4288 CMP R0, R1 0x3418A72A: D043 BEQ 46L1 ; 0x3418A7B4 0x3418A72C: 9802 LDR R0, [SP, #8] 0x3418A72E: F640 0114 MOVW R1, #0x0814 0x3418A732: F2C0 3100 MOVT R1, #0x0300 0x3418A736: 4288 CMP R0, R1 0x3418A738: D03C BEQ 46L1 ; 0x3418A7B4 0x3418A73A: 9802 LDR R0, [SP, #8] 0x3418A73C: 2114 MOVS R1, #20 0x3418A73E: F2C0 3101 MOVT R1, #0x0301 0x3418A742: 4288 CMP R0, R1 0x3418A744: D03C BEQ 46L2 ; 0x3418A7C0 0x3418A746: 9802 LDR R0, [SP, #8] 0x3418A748: F240 4114 MOVW R1, #0x0414 0x3418A74C: F2C0 3101 MOVT R1, #0x0301 0x3418A750: 4288 CMP R0, R1 0x3418A752: D035 BEQ 46L2 ; 0x3418A7C0 0x3418A754: 9802 LDR R0, [SP, #8] 0x3418A756: F640 0114 MOVW R1, #0x0814 0x3418A75A: F2C0 3101 MOVT R1, #0x0301 0x3418A75E: 4288 CMP R0, R1 0x3418A760: D02E BEQ 46L2 ; 0x3418A7C0 0x3418A762: 9802 LDR R0, [SP, #8] 0x3418A764: 2114 MOVS R1, #20 0x3418A766: F2C0 3102 MOVT R1, #0x0302 0x3418A76A: 4288 CMP R0, R1 0x3418A76C: D02D BEQ 46L3 ; 0x3418A7CA 0x3418A76E: 9802 LDR R0, [SP, #8] 0x3418A770: F240 4114 MOVW R1, #0x0414 0x3418A774: F2C0 3102 MOVT R1, #0x0302 0x3418A778: 4288 CMP R0, R1 0x3418A77A: D026 BEQ 46L3 ; 0x3418A7CA 0x3418A77C: 9802 LDR R0, [SP, #8] 0x3418A77E: F640 0114 MOVW R1, #0x0814 0x3418A782: F2C0 3102 MOVT R1, #0x0302 0x3418A786: 4288 CMP R0, R1 0x3418A788: D01F BEQ 46L3 ; 0x3418A7CA 0x3418A78A: 9802 LDR R0, [SP, #8] 0x3418A78C: 2114 MOVS R1, #20 0x3418A78E: F2C0 3103 MOVT R1, #0x0303 0x3418A792: 4288 CMP R0, R1 0x3418A794: D056 BEQ 46L9 ; 0x3418A844 0x3418A796: 9802 LDR R0, [SP, #8] 0x3418A798: F240 4114 MOVW R1, #0x0414 0x3418A79C: F2C0 3103 MOVT R1, #0x0303 0x3418A7A0: 4288 CMP R0, R1 0x3418A7A2: D04F BEQ 46L9 ; 0x3418A844 0x3418A7A4: 9802 LDR R0, [SP, #8] 0x3418A7A6: F640 0114 MOVW R1, #0x0814 0x3418A7AA: F2C0 3103 MOVT R1, #0x0303 0x3418A7AE: 4288 CMP R0, R1 0x3418A7B0: D048 BEQ 46L9 ; 0x3418A844 0x3418A7B2: E084 B 46L15 ; 0x3418A8BE
.L1: 0x3418A7B4: F005 FD22 BL HAL_RCC_GetSysClockFreq ; 0x341901FC 0x3418A7B8: F000 F884 BL RCCEx_GetHCLKFreq ; 0x3418A8C4 0x3418A7BC: 9004 STR R0, [SP, #16] 0x3418A7BE: E07E B 46L15 ; 0x3418A8BE
.L2: 0x3418A7C0: 2007 MOVS R0, #7 0x3418A7C2: F7FE F9DD BL RCCEx_GetCLKPCLKFreq ; 0x34188B80 0x3418A7C6: 9004 STR R0, [SP, #16] 0x3418A7C8: E079 B 46L15 ; 0x3418A8BE
.L3: 0x3418A7CA: F000 F889 BL LL_RCC_IC3_IsEnabled ; 0x3418A8E0 0x3418A7CE: B3C0 CBZ R0, .L8 ; 0x3418A842 0x3418A7D0: F007 F884 BL LL_RCC_IC3_GetDivider ; 0x341918DC 0x3418A7D4: 9003 STR R0, [SP, #12] 0x3418A7D6: F000 F88B BL LL_RCC_IC3_GetSource ; 0x3418A8F0 0x3418A7DA: 4601 MOV R1, R0 0x3418A7DC: 9101 STR R1, [SP, #4] 0x3418A7DE: B160 CBZ R0, .L4 ; 0x3418A7FA 0x3418A7E0: 9801 LDR R0, [SP, #4] 0x3418A7E2: F1B0 5F80 CMP.W R0, #0x10000000 0x3418A7E6: D011 BEQ 46L5 ; 0x3418A80C 0x3418A7E8: 9801 LDR R0, [SP, #4] 0x3418A7EA: F1B0 5F00 CMP.W R0, #0x20000000 0x3418A7EE: D016 BEQ 46L6 ; 0x3418A81E 0x3418A7F0: 9801 LDR R0, [SP, #4] 0x3418A7F2: F1B0 5F40 CMP.W R0, #0x30000000 0x3418A7F6: D01B BEQ 46L7 ; 0x3418A830 0x3418A7F8: E023 B 46L8 ; 0x3418A842
.L4: 0x3418A7FA: F007 F87B BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F4 0x3418A7FE: 9004 STR R0, [SP, #16] 0x3418A800: 9804 LDR R0, [SP, #16] 0x3418A802: 9903 LDR R1, [SP, #12] 0x3418A804: FBB0 F0F1 UDIV R0, R0, R1 0x3418A808: 9004 STR R0, [SP, #16] 0x3418A80A: E01A B 46L8 ; 0x3418A842
.L5: 0x3418A80C: F007 F8B4 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191978 0x3418A810: 9004 STR R0, [SP, #16] 0x3418A812: 9804 LDR R0, [SP, #16] 0x3418A814: 9903 LDR R1, [SP, #12] 0x3418A816: FBB0 F0F1 UDIV R0, R0, R1 0x3418A81A: 9004 STR R0, [SP, #16] 0x3418A81C: E011 B 46L8 ; 0x3418A842
.L6: 0x3418A81E: F007 F8ED BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919FC 0x3418A822: 9004 STR R0, [SP, #16] 0x3418A824: 9804 LDR R0, [SP, #16] 0x3418A826: 9903 LDR R1, [SP, #12] 0x3418A828: FBB0 F0F1 UDIV R0, R0, R1 0x3418A82C: 9004 STR R0, [SP, #16] 0x3418A82E: E008 B 46L8 ; 0x3418A842
.L7: 0x3418A830: F007 F926 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A80 0x3418A834: 9004 STR R0, [SP, #16] 0x3418A836: 9804 LDR R0, [SP, #16] 0x3418A838: 9903 LDR R1, [SP, #12] 0x3418A83A: FBB0 F0F1 UDIV R0, R0, R1 0x3418A83E: 9004 STR R0, [SP, #16] 0x3418A840: E7FF B 46L8 ; 0x3418A842
.L8: 0x3418A842: E03C B 46L15 ; 0x3418A8BE
.L9: 0x3418A844: F000 F85C BL LL_RCC_IC4_IsEnabled ; 0x3418A900 0x3418A848: B3C0 CBZ R0, .L14 ; 0x3418A8BC 0x3418A84A: F007 F95B BL LL_RCC_IC4_GetDivider ; 0x34191B04 0x3418A84E: 9003 STR R0, [SP, #12] 0x3418A850: F000 F85E BL LL_RCC_IC4_GetSource ; 0x3418A910 0x3418A854: 4601 MOV R1, R0 0x3418A856: 9100 STR R1, [SP, #0] 0x3418A858: B160 CBZ R0, .L10 ; 0x3418A874 0x3418A85A: 9800 LDR R0, [SP, #0] 0x3418A85C: F1B0 5F80 CMP.W R0, #0x10000000 0x3418A860: D011 BEQ 46L11 ; 0x3418A886 0x3418A862: 9800 LDR R0, [SP, #0] 0x3418A864: F1B0 5F00 CMP.W R0, #0x20000000 0x3418A868: D016 BEQ 46L12 ; 0x3418A898 0x3418A86A: 9800 LDR R0, [SP, #0] 0x3418A86C: F1B0 5F40 CMP.W R0, #0x30000000 0x3418A870: D01B BEQ 46L13 ; 0x3418A8AA 0x3418A872: E023 B 46L14 ; 0x3418A8BC
.L10: 0x3418A874: F007 F83E BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F4 0x3418A878: 9004 STR R0, [SP, #16] 0x3418A87A: 9804 LDR R0, [SP, #16] 0x3418A87C: 9903 LDR R1, [SP, #12] 0x3418A87E: FBB0 F0F1 UDIV R0, R0, R1 0x3418A882: 9004 STR R0, [SP, #16] 0x3418A884: E01A B 46L14 ; 0x3418A8BC
.L11: 0x3418A886: F007 F877 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191978 0x3418A88A: 9004 STR R0, [SP, #16] 0x3418A88C: 9804 LDR R0, [SP, #16] 0x3418A88E: 9903 LDR R1, [SP, #12] 0x3418A890: FBB0 F0F1 UDIV R0, R0, R1 0x3418A894: 9004 STR R0, [SP, #16] 0x3418A896: E011 B 46L14 ; 0x3418A8BC
.L12: 0x3418A898: F007 F8B0 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919FC 0x3418A89C: 9004 STR R0, [SP, #16] 0x3418A89E: 9804 LDR R0, [SP, #16] 0x3418A8A0: 9903 LDR R1, [SP, #12] 0x3418A8A2: FBB0 F0F1 UDIV R0, R0, R1 0x3418A8A6: 9004 STR R0, [SP, #16] 0x3418A8A8: E008 B 46L14 ; 0x3418A8BC
.L13: 0x3418A8AA: F007 F8E9 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A80 0x3418A8AE: 9004 STR R0, [SP, #16] 0x3418A8B0: 9804 LDR R0, [SP, #16] 0x3418A8B2: 9903 LDR R1, [SP, #12] 0x3418A8B4: FBB0 F0F1 UDIV R0, R0, R1 0x3418A8B8: 9004 STR R0, [SP, #16] 0x3418A8BA: E7FF B 46L14 ; 0x3418A8BC
.L14: 0x3418A8BC: E7FF B 46L15 ; 0x3418A8BE
.L15: 0x3418A8BE: 9804 LDR R0, [SP, #16] 0x3418A8C0: B006 ADD SP, SP, #24 0x3418A8C2: BD80 POP 123R7, PC}

Section .text.RCCEx_GetHCLKFreq from blto2_FSBL_lto.o, size=28, align=4


RCCEx_GetHCLKFreq: 0x3418A8C4: B580 PUSH 123R7, LR} 0x3418A8C6: B082 SUB SP, SP, #8 0x3418A8C8: 9001 STR R0, [SP, #4] 0x3418A8CA: 9801 LDR R0, [SP, #4] 0x3418A8CC: 9000 STR R0, [SP, #0] 0x3418A8CE: F000 F9F9 BL LL_RCC_GetAHBPrescaler.90 ; 0x3418ACC4 0x3418A8D2: 4601 MOV R1, R0 0x3418A8D4: 9800 LDR R0, [SP, #0] 0x3418A8D6: F3C1 5102 UBFX R1, R1, #20, #3 0x3418A8DA: 40C8 LSRS R0, R1 0x3418A8DC: B002 ADD SP, SP, #8 0x3418A8DE: BD80 POP 123R7, PC}

Section .text.LL_RCC_IC3_IsEnabled from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC3_IsEnabled: 0x3418A8E0: F248 2040 MOVW R0, #0x8240 0x3418A8E4: F2C5 6002 MOVT R0, #0x5602 0x3418A8E8: 6800 LDR R0, [R0] 0x3418A8EA: F3C0 0080 UBFX R0, R0, #2, #1 0x3418A8EE: 4770 BX LR

Section .text.LL_RCC_IC3_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC3_GetSource: 0x3418A8F0: F248 00CC MOVW R0, #0x80CC 0x3418A8F4: F2C5 6002 MOVT R0, #0x5602 0x3418A8F8: 6800 LDR R0, [R0] 0x3418A8FA: F000 5040 AND R0, R0, #0x30000000 0x3418A8FE: 4770 BX LR

Section .text.LL_RCC_IC4_IsEnabled from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC4_IsEnabled: 0x3418A900: F248 2040 MOVW R0, #0x8240 0x3418A904: F2C5 6002 MOVT R0, #0x5602 0x3418A908: 6800 LDR R0, [R0] 0x3418A90A: F3C0 00C0 UBFX R0, R0, #3, #1 0x3418A90E: 4770 BX LR

Section .text.LL_RCC_IC4_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC4_GetSource: 0x3418A910: F248 00D0 MOVW R0, #0x80D0 0x3418A914: F2C5 6002 MOVT R0, #0x5602 0x3418A918: 6800 LDR R0, [R0] 0x3418A91A: F000 5040 AND R0, R0, #0x30000000 0x3418A91E: 4770 BX LR

Section .text.LL_RCC_PLL4_IsReady.74 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL4_IsReady.74: 0x3418A920: F248 0004 MOVW R0, #0x8004 0x3418A924: F2C5 6002 MOVT R0, #0x5602 0x3418A928: 6800 LDR R0, [R0] 0x3418A92A: F3C0 20C0 UBFX R0, R0, #11, #1 0x3418A92E: 4770 BX LR

Section .text.LL_RCC_PLL4P_IsEnabled from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL4P_IsEnabled: 0x3418A930: F248 00B8 MOVW R0, #0x80B8 0x3418A934: F2C5 6002 MOVT R0, #0x5602 0x3418A938: 6800 LDR R0, [R0] 0x3418A93A: F3C0 7080 UBFX R0, R0, #30, #1 0x3418A93E: 4770 BX LR

Section .text.LL_RCC_PLL4_GetSource.75 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL4_GetSource.75: 0x3418A940: F248 00B0 MOVW R0, #0x80B0 0x3418A944: F2C5 6002 MOVT R0, #0x5602 0x3418A948: 6800 LDR R0, [R0] 0x3418A94A: F000 40E0 AND R0, R0, #0x70000000 0x3418A94E: 4770 BX LR

Section .text.RCCEx_GetPLLSourceFreq from blto2_FSBL_lto.o, size=140, align=4


RCCEx_GetPLLSourceFreq: 0x3418A950: B580 PUSH 123R7, LR} 0x3418A952: B084 SUB SP, SP, #16 0x3418A954: 9003 STR R0, [SP, #12] 0x3418A956: 2000 MOVS R0, #0 0x3418A958: 9002 STR R0, [SP, #8] 0x3418A95A: 9803 LDR R0, [SP, #12] 0x3418A95C: 9001 STR R0, [SP, #4] 0x3418A95E: B160 CBZ R0, .L1 ; 0x3418A97A 0x3418A960: 9801 LDR R0, [SP, #4] 0x3418A962: F1B0 5F80 CMP.W R0, #0x10000000 0x3418A966: D015 BEQ 46L3 ; 0x3418A994 0x3418A968: 9801 LDR R0, [SP, #4] 0x3418A96A: F1B0 5F00 CMP.W R0, #0x20000000 0x3418A96E: D023 BEQ 46L6 ; 0x3418A9B8 0x3418A970: 9801 LDR R0, [SP, #4] 0x3418A972: F1B0 5F40 CMP.W R0, #0x30000000 0x3418A976: D028 BEQ 46L8 ; 0x3418A9CA 0x3418A978: E02D B 46L9 ; 0x3418A9D6
.L1: 0x3418A97A: F000 F8A3 BL LL_RCC_HSI_IsReady.77 ; 0x3418AAC4 0x3418A97E: B140 CBZ R0, .L2 ; 0x3418A992 0x3418A980: F000 F8A8 BL LL_RCC_HSI_GetDivider.78 ; 0x3418AAD4 0x3418A984: 09C1 LSRS R1, R0, #7 0x3418A986: F249 0000 MOVW R0, #0x9000 0x3418A98A: F2C0 30D0 MOVT R0, #0x03D0 0x3418A98E: 40C8 LSRS R0, R1 0x3418A990: 9002 STR R0, [SP, #8]
.L2: 0x3418A992: E020 B 46L9 ; 0x3418A9D6
.L3: 0x3418A994: F000 F8A6 BL LL_RCC_MSI_IsReady.79 ; 0x3418AAE4 0x3418A998: B168 CBZ R0, .L5 ; 0x3418A9B6 0x3418A99A: F000 F8AB BL LL_RCC_MSI_GetFrequency ; 0x3418AAF4 0x3418A99E: B928 CBNZ R0, .L4 ; 0x3418A9AC 0x3418A9A0: F640 1000 MOVW R0, #0x0900 0x3418A9A4: F2C0 003D MOVT R0, #61 0x3418A9A8: 9002 STR R0, [SP, #8] 0x3418A9AA: E004 B 46L5 ; 0x3418A9B6
.L4: 0x3418A9AC: F242 4000 MOVW R0, #0x2400 0x3418A9B0: F2C0 00F4 MOVT R0, #244 0x3418A9B4: 9002 STR R0, [SP, #8]
.L5: 0x3418A9B6: E00E B 46L9 ; 0x3418A9D6
.L6: 0x3418A9B8: F000 F8A4 BL LL_RCC_HSE_IsReady.80 ; 0x3418AB04 0x3418A9BC: B120 CBZ R0, .L7 ; 0x3418A9C8 0x3418A9BE: F646 4000 MOVW R0, #0x6C00 0x3418A9C2: F2C0 20DC MOVT R0, #0x02DC 0x3418A9C6: 9002 STR R0, [SP, #8]
.L7: 0x3418A9C8: E005 B 46L9 ; 0x3418A9D6
.L8: 0x3418A9CA: F248 0000 MOVW R0, #0x8000 0x3418A9CE: F2C0 00BB MOVT R0, #187 0x3418A9D2: 9002 STR R0, [SP, #8] 0x3418A9D4: E7FF B 46L9 ; 0x3418A9D6
.L9: 0x3418A9D6: 9802 LDR R0, [SP, #8] 0x3418A9D8: B004 ADD SP, SP, #16 0x3418A9DA: BD80 POP 123R7, PC}

Section .text.LL_RCC_PLL4_GetM from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL4_GetM: 0x3418A9DC: F248 00B0 MOVW R0, #0x80B0 0x3418A9E0: F2C5 6002 MOVT R0, #0x5602 0x3418A9E4: 6800 LDR R0, [R0] 0x3418A9E6: F3C0 5005 UBFX R0, R0, #20, #6 0x3418A9EA: 4770 BX LR

Section .text.LL_RCC_PLL4_GetN from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL4_GetN: 0x3418A9EC: F248 00B0 MOVW R0, #0x80B0 0x3418A9F0: F2C5 6002 MOVT R0, #0x5602 0x3418A9F4: 6800 LDR R0, [R0] 0x3418A9F6: F3C0 200B UBFX R0, R0, #8, #12 0x3418A9FA: 4770 BX LR

Section .text.LL_RCC_PLL4_GetFRACN from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL4_GetFRACN: 0x3418A9FC: F248 00B4 MOVW R0, #0x80B4 0x3418AA00: F2C5 6002 MOVT R0, #0x5602 0x3418AA04: 6800 LDR R0, [R0] 0x3418AA06: F020 407F BIC R0, R0, #0xFF000000 0x3418AA0A: 4770 BX LR

Section .text.LL_RCC_PLL4_GetP1 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL4_GetP1: 0x3418AA0C: F248 00B8 MOVW R0, #0x80B8 0x3418AA10: F2C5 6002 MOVT R0, #0x5602 0x3418AA14: 6800 LDR R0, [R0] 0x3418AA16: F3C0 60C2 UBFX R0, R0, #27, #3 0x3418AA1A: 4770 BX LR

Section .text.LL_RCC_PLL4_GetP2 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL4_GetP2: 0x3418AA1C: F248 00B8 MOVW R0, #0x80B8 0x3418AA20: F2C5 6002 MOVT R0, #0x5602 0x3418AA24: 6800 LDR R0, [R0] 0x3418AA26: F3C0 6002 UBFX R0, R0, #24, #3 0x3418AA2A: 4770 BX LR

Section .text.RCCEx_CalcPLLFreq from blto2_FSBL_lto.o, size=136, align=4


RCCEx_CalcPLLFreq: 0x3418AA2C: B085 SUB SP, SP, #20 0x3418AA2E: F8DD C018 LDR.W R12, [SP, #24] 0x3418AA32: F8DD C014 LDR.W R12, [SP, #20] 0x3418AA36: 9004 STR R0, [SP, #16] 0x3418AA38: 9103 STR R1, [SP, #12] 0x3418AA3A: 9202 STR R2, [SP, #8] 0x3418AA3C: 9301 STR R3, [SP, #4] 0x3418AA3E: ED9D 0A04 VLDR S0, [SP, #16] 0x3418AA42: EEB8 0A40 VCVT.F32.U32 S0, S0 0x3418AA46: ED9D 1A02 VLDR S2, [SP, #8] 0x3418AA4A: EEB8 1A41 VCVT.F32.U32 S2, S2 0x3418AA4E: ED9D 2A01 VLDR S4, [SP, #4] 0x3418AA52: EEB8 2A42 VCVT.F32.U32 S4, S4 0x3418AA56: ED9F 3A16 VLDR S6, =0x33800000 ; [PC, #88] [0x3418AAB0] 0x3418AA5A: EE22 2A03 VMUL.F32 S4, S4, S6 0x3418AA5E: EE31 1A02 VADD.F32 S2, S2, S4 0x3418AA62: EE20 0A01 VMUL.F32 S0, S0, S2 0x3418AA66: ED9D 1A03 VLDR S2, [SP, #12] 0x3418AA6A: EEB8 1A41 VCVT.F32.U32 S2, S2 0x3418AA6E: EE80 0A01 VDIV.F32 S0, S0, S2 0x3418AA72: ED8D 0A00 VSTR S0, [SP] 0x3418AA76: ED9D 0A00 VLDR S0, [SP] 0x3418AA7A: ED9D 1A05 VLDR S2, [SP, #20] 0x3418AA7E: EEB8 1A41 VCVT.F32.U32 S2, S2 0x3418AA82: EE80 0A01 VDIV.F32 S0, S0, S2 0x3418AA86: ED8D 0A00 VSTR S0, [SP] 0x3418AA8A: ED9D 0A00 VLDR S0, [SP] 0x3418AA8E: ED9D 1A06 VLDR S2, [SP, #24] 0x3418AA92: EEB8 1A41 VCVT.F32.U32 S2, S2 0x3418AA96: EE80 0A01 VDIV.F32 S0, S0, S2 0x3418AA9A: ED8D 0A00 VSTR S0, [SP] 0x3418AA9E: ED9D 0A00 VLDR S0, [SP] 0x3418AAA2: EEBC 0AC0 VCVT.U32.F32 S0, S0 0x3418AAA6: EE10 0A10 VMOV R0, S0 0x3418AAAA: B005 ADD SP, SP, #20 0x3418AAAC: 4770 BX LR 0x3418AAAE: BF00 NOP 0x3418AAB0: 33800000 DC.W 0x33800000

Section .text.LL_RCC_PLL4_IsEnabledBypass.76 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL4_IsEnabledBypass.76: 0x3418AAB4: F248 00B0 MOVW R0, #0x80B0 0x3418AAB8: F2C5 6002 MOVT R0, #0x5602 0x3418AABC: 6800 LDR R0, [R0] 0x3418AABE: F3C0 60C0 UBFX R0, R0, #27, #1 0x3418AAC2: 4770 BX LR

Section .text.LL_RCC_HSI_IsReady.77 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_HSI_IsReady.77: 0x3418AAC4: F248 0004 MOVW R0, #0x8004 0x3418AAC8: F2C5 6002 MOVT R0, #0x5602 0x3418AACC: 6800 LDR R0, [R0] 0x3418AACE: F3C0 00C0 UBFX R0, R0, #3, #1 0x3418AAD2: 4770 BX LR

Section .text.LL_RCC_HSI_GetDivider.78 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_HSI_GetDivider.78: 0x3418AAD4: F248 0048 MOVW R0, #0x8048 0x3418AAD8: F2C5 6002 MOVT R0, #0x5602 0x3418AADC: 6800 LDR R0, [R0] 0x3418AADE: F400 70C0 AND R0, R0, #0x0180 0x3418AAE2: 4770 BX LR

Section .text.LL_RCC_MSI_IsReady.79 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_MSI_IsReady.79: 0x3418AAE4: F248 0004 MOVW R0, #0x8004 0x3418AAE8: F2C5 6002 MOVT R0, #0x5602 0x3418AAEC: 6800 LDR R0, [R0] 0x3418AAEE: F3C0 0080 UBFX R0, R0, #2, #1 0x3418AAF2: 4770 BX LR

Section .text.LL_RCC_MSI_GetFrequency from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_MSI_GetFrequency: 0x3418AAF4: F248 0044 MOVW R0, #0x8044 0x3418AAF8: F2C5 6002 MOVT R0, #0x5602 0x3418AAFC: 6800 LDR R0, [R0] 0x3418AAFE: F400 7000 AND R0, R0, #0x0200 0x3418AB02: 4770 BX LR

Section .text.LL_RCC_HSE_IsReady.80 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_HSE_IsReady.80: 0x3418AB04: F248 0004 MOVW R0, #0x8004 0x3418AB08: F2C5 6002 MOVT R0, #0x5602 0x3418AB0C: 6800 LDR R0, [R0] 0x3418AB0E: F3C0 1000 UBFX R0, R0, #4, #1 0x3418AB12: 4770 BX LR

Section .text.LL_RCC_PLL3_IsReady.81 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL3_IsReady.81: 0x3418AB14: F248 0004 MOVW R0, #0x8004 0x3418AB18: F2C5 6002 MOVT R0, #0x5602 0x3418AB1C: 6800 LDR R0, [R0] 0x3418AB1E: F3C0 2080 UBFX R0, R0, #10, #1 0x3418AB22: 4770 BX LR

Section .text.LL_RCC_PLL3P_IsEnabled from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL3P_IsEnabled: 0x3418AB24: F248 00A8 MOVW R0, #0x80A8 0x3418AB28: F2C5 6002 MOVT R0, #0x5602 0x3418AB2C: 6800 LDR R0, [R0] 0x3418AB2E: F3C0 7080 UBFX R0, R0, #30, #1 0x3418AB32: 4770 BX LR

Section .text.LL_RCC_PLL3_GetSource.82 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL3_GetSource.82: 0x3418AB34: F248 00A0 MOVW R0, #0x80A0 0x3418AB38: F2C5 6002 MOVT R0, #0x5602 0x3418AB3C: 6800 LDR R0, [R0] 0x3418AB3E: F000 40E0 AND R0, R0, #0x70000000 0x3418AB42: 4770 BX LR

Section .text.LL_RCC_PLL3_GetM from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL3_GetM: 0x3418AB44: F248 00A0 MOVW R0, #0x80A0 0x3418AB48: F2C5 6002 MOVT R0, #0x5602 0x3418AB4C: 6800 LDR R0, [R0] 0x3418AB4E: F3C0 5005 UBFX R0, R0, #20, #6 0x3418AB52: 4770 BX LR

Section .text.LL_RCC_PLL3_GetN from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL3_GetN: 0x3418AB54: F248 00A0 MOVW R0, #0x80A0 0x3418AB58: F2C5 6002 MOVT R0, #0x5602 0x3418AB5C: 6800 LDR R0, [R0] 0x3418AB5E: F3C0 200B UBFX R0, R0, #8, #12 0x3418AB62: 4770 BX LR

Section .text.LL_RCC_PLL3_GetFRACN from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL3_GetFRACN: 0x3418AB64: F248 00A4 MOVW R0, #0x80A4 0x3418AB68: F2C5 6002 MOVT R0, #0x5602 0x3418AB6C: 6800 LDR R0, [R0] 0x3418AB6E: F020 407F BIC R0, R0, #0xFF000000 0x3418AB72: 4770 BX LR

Section .text.LL_RCC_PLL3_GetP1 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL3_GetP1: 0x3418AB74: F248 00A8 MOVW R0, #0x80A8 0x3418AB78: F2C5 6002 MOVT R0, #0x5602 0x3418AB7C: 6800 LDR R0, [R0] 0x3418AB7E: F3C0 60C2 UBFX R0, R0, #27, #3 0x3418AB82: 4770 BX LR

Section .text.LL_RCC_PLL3_GetP2 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL3_GetP2: 0x3418AB84: F248 00A8 MOVW R0, #0x80A8 0x3418AB88: F2C5 6002 MOVT R0, #0x5602 0x3418AB8C: 6800 LDR R0, [R0] 0x3418AB8E: F3C0 6002 UBFX R0, R0, #24, #3 0x3418AB92: 4770 BX LR

Section .text.LL_RCC_PLL3_IsEnabledBypass.83 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL3_IsEnabledBypass.83: 0x3418AB94: F248 00A0 MOVW R0, #0x80A0 0x3418AB98: F2C5 6002 MOVT R0, #0x5602 0x3418AB9C: 6800 LDR R0, [R0] 0x3418AB9E: F3C0 60C0 UBFX R0, R0, #27, #1 0x3418ABA2: 4770 BX LR

Section .text.LL_RCC_PLL2_IsReady.84 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL2_IsReady.84: 0x3418ABA4: F248 0004 MOVW R0, #0x8004 0x3418ABA8: F2C5 6002 MOVT R0, #0x5602 0x3418ABAC: 6800 LDR R0, [R0] 0x3418ABAE: F3C0 2040 UBFX R0, R0, #9, #1 0x3418ABB2: 4770 BX LR

Section .text.LL_RCC_PLL2P_IsEnabled from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL2P_IsEnabled: 0x3418ABB4: F248 0098 MOVW R0, #0x8098 0x3418ABB8: F2C5 6002 MOVT R0, #0x5602 0x3418ABBC: 6800 LDR R0, [R0] 0x3418ABBE: F3C0 7080 UBFX R0, R0, #30, #1 0x3418ABC2: 4770 BX LR

Section .text.LL_RCC_PLL2_GetSource.85 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL2_GetSource.85: 0x3418ABC4: F248 0090 MOVW R0, #0x8090 0x3418ABC8: F2C5 6002 MOVT R0, #0x5602 0x3418ABCC: 6800 LDR R0, [R0] 0x3418ABCE: F000 40E0 AND R0, R0, #0x70000000 0x3418ABD2: 4770 BX LR

Section .text.LL_RCC_PLL2_GetM from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL2_GetM: 0x3418ABD4: F248 0090 MOVW R0, #0x8090 0x3418ABD8: F2C5 6002 MOVT R0, #0x5602 0x3418ABDC: 6800 LDR R0, [R0] 0x3418ABDE: F3C0 5005 UBFX R0, R0, #20, #6 0x3418ABE2: 4770 BX LR

Section .text.LL_RCC_PLL2_GetN from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL2_GetN: 0x3418ABE4: F248 0090 MOVW R0, #0x8090 0x3418ABE8: F2C5 6002 MOVT R0, #0x5602 0x3418ABEC: 6800 LDR R0, [R0] 0x3418ABEE: F3C0 200B UBFX R0, R0, #8, #12 0x3418ABF2: 4770 BX LR

Section .text.LL_RCC_PLL2_GetFRACN from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL2_GetFRACN: 0x3418ABF4: F248 0094 MOVW R0, #0x8094 0x3418ABF8: F2C5 6002 MOVT R0, #0x5602 0x3418ABFC: 6800 LDR R0, [R0] 0x3418ABFE: F020 407F BIC R0, R0, #0xFF000000 0x3418AC02: 4770 BX LR

Section .text.LL_RCC_PLL2_GetP1 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL2_GetP1: 0x3418AC04: F248 0098 MOVW R0, #0x8098 0x3418AC08: F2C5 6002 MOVT R0, #0x5602 0x3418AC0C: 6800 LDR R0, [R0] 0x3418AC0E: F3C0 60C2 UBFX R0, R0, #27, #3 0x3418AC12: 4770 BX LR

Section .text.LL_RCC_PLL2_GetP2 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL2_GetP2: 0x3418AC14: F248 0098 MOVW R0, #0x8098 0x3418AC18: F2C5 6002 MOVT R0, #0x5602 0x3418AC1C: 6800 LDR R0, [R0] 0x3418AC1E: F3C0 6002 UBFX R0, R0, #24, #3 0x3418AC22: 4770 BX LR

Section .text.LL_RCC_PLL2_IsEnabledBypass.86 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL2_IsEnabledBypass.86: 0x3418AC24: F248 0090 MOVW R0, #0x8090 0x3418AC28: F2C5 6002 MOVT R0, #0x5602 0x3418AC2C: 6800 LDR R0, [R0] 0x3418AC2E: F3C0 60C0 UBFX R0, R0, #27, #1 0x3418AC32: 4770 BX LR

Section .text.LL_RCC_PLL1_IsReady.87 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL1_IsReady.87: 0x3418AC34: F248 0004 MOVW R0, #0x8004 0x3418AC38: F2C5 6002 MOVT R0, #0x5602 0x3418AC3C: 6800 LDR R0, [R0] 0x3418AC3E: F3C0 2000 UBFX R0, R0, #8, #1 0x3418AC42: 4770 BX LR

Section .text.LL_RCC_PLL1P_IsEnabled from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL1P_IsEnabled: 0x3418AC44: F248 0088 MOVW R0, #0x8088 0x3418AC48: F2C5 6002 MOVT R0, #0x5602 0x3418AC4C: 6800 LDR R0, [R0] 0x3418AC4E: F3C0 7080 UBFX R0, R0, #30, #1 0x3418AC52: 4770 BX LR

Section .text.LL_RCC_PLL1_GetSource.88 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL1_GetSource.88: 0x3418AC54: F248 0080 MOVW R0, #0x8080 0x3418AC58: F2C5 6002 MOVT R0, #0x5602 0x3418AC5C: 6800 LDR R0, [R0] 0x3418AC5E: F000 40E0 AND R0, R0, #0x70000000 0x3418AC62: 4770 BX LR

Section .text.LL_RCC_PLL1_GetM from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL1_GetM: 0x3418AC64: F248 0080 MOVW R0, #0x8080 0x3418AC68: F2C5 6002 MOVT R0, #0x5602 0x3418AC6C: 6800 LDR R0, [R0] 0x3418AC6E: F3C0 5005 UBFX R0, R0, #20, #6 0x3418AC72: 4770 BX LR

Section .text.LL_RCC_PLL1_GetN from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL1_GetN: 0x3418AC74: F248 0080 MOVW R0, #0x8080 0x3418AC78: F2C5 6002 MOVT R0, #0x5602 0x3418AC7C: 6800 LDR R0, [R0] 0x3418AC7E: F3C0 200B UBFX R0, R0, #8, #12 0x3418AC82: 4770 BX LR

Section .text.LL_RCC_PLL1_GetFRACN from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL1_GetFRACN: 0x3418AC84: F248 0084 MOVW R0, #0x8084 0x3418AC88: F2C5 6002 MOVT R0, #0x5602 0x3418AC8C: 6800 LDR R0, [R0] 0x3418AC8E: F020 407F BIC R0, R0, #0xFF000000 0x3418AC92: 4770 BX LR

Section .text.LL_RCC_PLL1_GetP1 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL1_GetP1: 0x3418AC94: F248 0088 MOVW R0, #0x8088 0x3418AC98: F2C5 6002 MOVT R0, #0x5602 0x3418AC9C: 6800 LDR R0, [R0] 0x3418AC9E: F3C0 60C2 UBFX R0, R0, #27, #3 0x3418ACA2: 4770 BX LR

Section .text.LL_RCC_PLL1_GetP2 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL1_GetP2: 0x3418ACA4: F248 0088 MOVW R0, #0x8088 0x3418ACA8: F2C5 6002 MOVT R0, #0x5602 0x3418ACAC: 6800 LDR R0, [R0] 0x3418ACAE: F3C0 6002 UBFX R0, R0, #24, #3 0x3418ACB2: 4770 BX LR

Section .text.LL_RCC_PLL1_IsEnabledBypass.89 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL1_IsEnabledBypass.89: 0x3418ACB4: F248 0080 MOVW R0, #0x8080 0x3418ACB8: F2C5 6002 MOVT R0, #0x5602 0x3418ACBC: 6800 LDR R0, [R0] 0x3418ACBE: F3C0 60C0 UBFX R0, R0, #27, #1 0x3418ACC2: 4770 BX LR

Section .text.LL_RCC_GetAHBPrescaler.90 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_GetAHBPrescaler.90: 0x3418ACC4: F248 0024 MOVW R0, #0x8024 0x3418ACC8: F2C5 6002 MOVT R0, #0x5602 0x3418ACCC: 6800 LDR R0, [R0] 0x3418ACCE: F400 00E0 AND R0, R0, #0x700000 0x3418ACD2: 4770 BX LR

Section .text.LL_RCC_GetUSBClockSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_GetUSBClockSource: 0x3418ACD4: B580 PUSH 123R7, LR} 0x3418ACD6: B082 SUB SP, SP, #8 0x3418ACD8: 9001 STR R0, [SP, #4] 0x3418ACDA: 9801 LDR R0, [SP, #4] 0x3418ACDC: F7FD FE76 BL LL_RCC_GetClockSource ; 0x341889CC 0x3418ACE0: B002 ADD SP, SP, #8 0x3418ACE2: BD80 POP 123R7, PC}

Section .text.LL_RCC_IC15_IsEnabled from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC15_IsEnabled: 0x3418ACE4: F248 2040 MOVW R0, #0x8240 0x3418ACE8: F2C5 6002 MOVT R0, #0x5602 0x3418ACEC: 6800 LDR R0, [R0] 0x3418ACEE: F3C0 3080 UBFX R0, R0, #14, #1 0x3418ACF2: 4770 BX LR

Section .text.LL_RCC_IC15_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC15_GetSource: 0x3418ACF4: F248 00FC MOVW R0, #0x80FC 0x3418ACF8: F2C5 6002 MOVT R0, #0x5602 0x3418ACFC: 6800 LDR R0, [R0] 0x3418ACFE: F000 5040 AND R0, R0, #0x30000000 0x3418AD02: 4770 BX LR

Section .text.LL_RCC_GetUARTClockSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_GetUARTClockSource: 0x3418AD04: B580 PUSH 123R7, LR} 0x3418AD06: B082 SUB SP, SP, #8 0x3418AD08: 9001 STR R0, [SP, #4] 0x3418AD0A: 9801 LDR R0, [SP, #4] 0x3418AD0C: F7FD FE5E BL LL_RCC_GetClockSource ; 0x341889CC 0x3418AD10: B002 ADD SP, SP, #8 0x3418AD12: BD80 POP 123R7, PC}

Section .text.RCCEx_GetPCLK1Freq from blto2_FSBL_lto.o, size=28, align=4


RCCEx_GetPCLK1Freq: 0x3418AD14: B580 PUSH 123R7, LR} 0x3418AD16: B082 SUB SP, SP, #8 0x3418AD18: 9001 STR R0, [SP, #4] 0x3418AD1A: 9801 LDR R0, [SP, #4] 0x3418AD1C: 9000 STR R0, [SP, #0] 0x3418AD1E: F000 F83D BL LL_RCC_GetAPB1Prescaler.92 ; 0x3418AD9C 0x3418AD22: 4601 MOV R1, R0 0x3418AD24: 9800 LDR R0, [SP, #0] 0x3418AD26: F001 0107 AND R1, R1, #7 0x3418AD2A: 40C8 LSRS R0, R1 0x3418AD2C: B002 ADD SP, SP, #8 0x3418AD2E: BD80 POP 123R7, PC}

Section .text.RCCEx_GetPCLK2Freq from blto2_FSBL_lto.o, size=28, align=4


RCCEx_GetPCLK2Freq: 0x3418AD30: B580 PUSH 123R7, LR} 0x3418AD32: B082 SUB SP, SP, #8 0x3418AD34: 9001 STR R0, [SP, #4] 0x3418AD36: 9801 LDR R0, [SP, #4] 0x3418AD38: 9000 STR R0, [SP, #0] 0x3418AD3A: F000 F827 BL LL_RCC_GetAPB2Prescaler.91 ; 0x3418AD8C 0x3418AD3E: 4601 MOV R1, R0 0x3418AD40: 9800 LDR R0, [SP, #0] 0x3418AD42: F3C1 1102 UBFX R1, R1, #4, #3 0x3418AD46: 40C8 LSRS R0, R1 0x3418AD48: B002 ADD SP, SP, #8 0x3418AD4A: BD80 POP 123R7, PC}

Section .text.LL_RCC_IC9_IsEnabled from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC9_IsEnabled: 0x3418AD4C: F248 2040 MOVW R0, #0x8240 0x3418AD50: F2C5 6002 MOVT R0, #0x5602 0x3418AD54: 6800 LDR R0, [R0] 0x3418AD56: F3C0 2000 UBFX R0, R0, #8, #1 0x3418AD5A: 4770 BX LR

Section .text.LL_RCC_IC9_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC9_GetSource: 0x3418AD5C: F248 00E4 MOVW R0, #0x80E4 0x3418AD60: F2C5 6002 MOVT R0, #0x5602 0x3418AD64: 6800 LDR R0, [R0] 0x3418AD66: F000 5040 AND R0, R0, #0x30000000 0x3418AD6A: 4770 BX LR

Section .text.LL_RCC_IC14_IsEnabled from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC14_IsEnabled: 0x3418AD6C: F248 2040 MOVW R0, #0x8240 0x3418AD70: F2C5 6002 MOVT R0, #0x5602 0x3418AD74: 6800 LDR R0, [R0] 0x3418AD76: F3C0 3040 UBFX R0, R0, #13, #1 0x3418AD7A: 4770 BX LR

Section .text.LL_RCC_IC14_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC14_GetSource: 0x3418AD7C: F248 00F8 MOVW R0, #0x80F8 0x3418AD80: F2C5 6002 MOVT R0, #0x5602 0x3418AD84: 6800 LDR R0, [R0] 0x3418AD86: F000 5040 AND R0, R0, #0x30000000 0x3418AD8A: 4770 BX LR

Section .text.LL_RCC_GetAPB2Prescaler.91 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_GetAPB2Prescaler.91: 0x3418AD8C: F248 0024 MOVW R0, #0x8024 0x3418AD90: F2C5 6002 MOVT R0, #0x5602 0x3418AD94: 6800 LDR R0, [R0] 0x3418AD96: F000 0070 AND R0, R0, #112 0x3418AD9A: 4770 BX LR

Section .text.LL_RCC_GetAPB1Prescaler.92 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_GetAPB1Prescaler.92: 0x3418AD9C: F248 0024 MOVW R0, #0x8024 0x3418ADA0: F2C5 6002 MOVT R0, #0x5602 0x3418ADA4: 6800 LDR R0, [R0] 0x3418ADA6: F000 0007 AND R0, R0, #7 0x3418ADAA: 4770 BX LR

Section .text.RCCEx_GetPCLK4Freq from blto2_FSBL_lto.o, size=28, align=4


RCCEx_GetPCLK4Freq: 0x3418ADAC: B580 PUSH 123R7, LR} 0x3418ADAE: B082 SUB SP, SP, #8 0x3418ADB0: 9001 STR R0, [SP, #4] 0x3418ADB2: 9801 LDR R0, [SP, #4] 0x3418ADB4: 9000 STR R0, [SP, #0] 0x3418ADB6: F000 F817 BL LL_RCC_GetAPB4Prescaler.93 ; 0x3418ADE8 0x3418ADBA: 4601 MOV R1, R0 0x3418ADBC: 9800 LDR R0, [SP, #0] 0x3418ADBE: F3C1 3102 UBFX R1, R1, #12, #3 0x3418ADC2: 40C8 LSRS R0, R1 0x3418ADC4: B002 ADD SP, SP, #8 0x3418ADC6: BD80 POP 123R7, PC}

Section .text.LL_RCC_IC8_IsEnabled from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC8_IsEnabled: 0x3418ADC8: F248 2040 MOVW R0, #0x8240 0x3418ADCC: F2C5 6002 MOVT R0, #0x5602 0x3418ADD0: 6800 LDR R0, [R0] 0x3418ADD2: B2C0 UXTB R0, R0 0x3418ADD4: 09C0 LSRS R0, R0, #7 0x3418ADD6: 4770 BX LR

Section .text.LL_RCC_IC8_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC8_GetSource: 0x3418ADD8: F248 00E0 MOVW R0, #0x80E0 0x3418ADDC: F2C5 6002 MOVT R0, #0x5602 0x3418ADE0: 6800 LDR R0, [R0] 0x3418ADE2: F000 5040 AND R0, R0, #0x30000000 0x3418ADE6: 4770 BX LR

Section .text.LL_RCC_GetAPB4Prescaler.93 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_GetAPB4Prescaler.93: 0x3418ADE8: F248 0024 MOVW R0, #0x8024 0x3418ADEC: F2C5 6002 MOVT R0, #0x5602 0x3418ADF0: 6800 LDR R0, [R0] 0x3418ADF2: F400 40E0 AND R0, R0, #0x7000 0x3418ADF6: 4770 BX LR

Section .text.LL_RCC_IC7_IsEnabled from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC7_IsEnabled: 0x3418ADF8: F248 2040 MOVW R0, #0x8240 0x3418ADFC: F2C5 6002 MOVT R0, #0x5602 0x3418AE00: 6800 LDR R0, [R0] 0x3418AE02: F3C0 1080 UBFX R0, R0, #6, #1 0x3418AE06: 4770 BX LR

Section .text.LL_RCC_IC7_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC7_GetSource: 0x3418AE08: F248 00DC MOVW R0, #0x80DC 0x3418AE0C: F2C5 6002 MOVT R0, #0x5602 0x3418AE10: 6800 LDR R0, [R0] 0x3418AE12: F000 5040 AND R0, R0, #0x30000000 0x3418AE16: 4770 BX LR

Section .text.LL_RCC_IC5_IsEnabled from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC5_IsEnabled: 0x3418AE18: F248 2040 MOVW R0, #0x8240 0x3418AE1C: F2C5 6002 MOVT R0, #0x5602 0x3418AE20: 6800 LDR R0, [R0] 0x3418AE22: F3C0 1000 UBFX R0, R0, #4, #1 0x3418AE26: 4770 BX LR

Section .text.LL_RCC_IC5_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC5_GetSource: 0x3418AE28: F248 00D4 MOVW R0, #0x80D4 0x3418AE2C: F2C5 6002 MOVT R0, #0x5602 0x3418AE30: 6800 LDR R0, [R0] 0x3418AE32: F000 5040 AND R0, R0, #0x30000000 0x3418AE36: 4770 BX LR

Section .text.LL_RCC_LSI_IsReady.94 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_LSI_IsReady.94: 0x3418AE38: F248 0004 MOVW R0, #0x8004 0x3418AE3C: F2C5 6002 MOVT R0, #0x5602 0x3418AE40: 6800 LDR R0, [R0] 0x3418AE42: F000 0001 AND R0, R0, #1 0x3418AE46: 4770 BX LR

Section .text.LL_RCC_IC20_IsEnabled from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC20_IsEnabled: 0x3418AE48: F248 2040 MOVW R0, #0x8240 0x3418AE4C: F2C5 6002 MOVT R0, #0x5602 0x3418AE50: 6800 LDR R0, [R0] 0x3418AE52: F3C0 40C0 UBFX R0, R0, #19, #1 0x3418AE56: 4770 BX LR

Section .text.LL_RCC_IC20_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC20_GetSource: 0x3418AE58: F248 1010 MOVW R0, #0x8110 0x3418AE5C: F2C5 6002 MOVT R0, #0x5602 0x3418AE60: 6800 LDR R0, [R0] 0x3418AE62: F000 5040 AND R0, R0, #0x30000000 0x3418AE66: 4770 BX LR

Section .text.RCCEx_GetPCLK5Freq from blto2_FSBL_lto.o, size=28, align=4


RCCEx_GetPCLK5Freq: 0x3418AE68: B580 PUSH 123R7, LR} 0x3418AE6A: B082 SUB SP, SP, #8 0x3418AE6C: 9001 STR R0, [SP, #4] 0x3418AE6E: 9801 LDR R0, [SP, #4] 0x3418AE70: 9000 STR R0, [SP, #0] 0x3418AE72: F000 F817 BL LL_RCC_GetAPB5Prescaler.95 ; 0x3418AEA4 0x3418AE76: 4601 MOV R1, R0 0x3418AE78: 9800 LDR R0, [SP, #0] 0x3418AE7A: F3C1 4102 UBFX R1, R1, #16, #3 0x3418AE7E: 40C8 LSRS R0, R1 0x3418AE80: B002 ADD SP, SP, #8 0x3418AE82: BD80 POP 123R7, PC}

Section .text.LL_RCC_IC16_IsEnabled from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC16_IsEnabled: 0x3418AE84: F248 2040 MOVW R0, #0x8240 0x3418AE88: F2C5 6002 MOVT R0, #0x5602 0x3418AE8C: 6800 LDR R0, [R0] 0x3418AE8E: B280 UXTH R0, R0 0x3418AE90: 0BC0 LSRS R0, R0, #15 0x3418AE92: 4770 BX LR

Section .text.LL_RCC_IC16_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC16_GetSource: 0x3418AE94: F248 1000 MOVW R0, #0x8100 0x3418AE98: F2C5 6002 MOVT R0, #0x5602 0x3418AE9C: 6800 LDR R0, [R0] 0x3418AE9E: F000 5040 AND R0, R0, #0x30000000 0x3418AEA2: 4770 BX LR

Section .text.LL_RCC_GetAPB5Prescaler.95 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_GetAPB5Prescaler.95: 0x3418AEA4: F248 0024 MOVW R0, #0x8024 0x3418AEA8: F2C5 6002 MOVT R0, #0x5602 0x3418AEAC: 6800 LDR R0, [R0] 0x3418AEAE: F400 20E0 AND R0, R0, #0x070000 0x3418AEB2: 4770 BX LR

Section .text.LL_RCC_IC10_IsEnabled from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC10_IsEnabled: 0x3418AEB4: F248 2040 MOVW R0, #0x8240 0x3418AEB8: F2C5 6002 MOVT R0, #0x5602 0x3418AEBC: 6800 LDR R0, [R0] 0x3418AEBE: F3C0 2040 UBFX R0, R0, #9, #1 0x3418AEC2: 4770 BX LR

Section .text.LL_RCC_IC10_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC10_GetSource: 0x3418AEC4: F248 00E8 MOVW R0, #0x80E8 0x3418AEC8: F2C5 6002 MOVT R0, #0x5602 0x3418AECC: 6800 LDR R0, [R0] 0x3418AECE: F000 5040 AND R0, R0, #0x30000000 0x3418AED2: 4770 BX LR

Section .text.LL_RCC_IC19_IsEnabled from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC19_IsEnabled: 0x3418AED4: F248 2040 MOVW R0, #0x8240 0x3418AED8: F2C5 6002 MOVT R0, #0x5602 0x3418AEDC: 6800 LDR R0, [R0] 0x3418AEDE: F3C0 4080 UBFX R0, R0, #18, #1 0x3418AEE2: 4770 BX LR

Section .text.LL_RCC_IC19_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC19_GetSource: 0x3418AEE4: F248 100C MOVW R0, #0x810C 0x3418AEE8: F2C5 6002 MOVT R0, #0x5602 0x3418AEEC: 6800 LDR R0, [R0] 0x3418AEEE: F000 5040 AND R0, R0, #0x30000000 0x3418AEF2: 4770 BX LR

Section .text.LL_RCC_IC13_IsEnabled from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC13_IsEnabled: 0x3418AEF4: F248 2040 MOVW R0, #0x8240 0x3418AEF8: F2C5 6002 MOVT R0, #0x5602 0x3418AEFC: 6800 LDR R0, [R0] 0x3418AEFE: F3C0 3000 UBFX R0, R0, #12, #1 0x3418AF02: 4770 BX LR

Section .text.LL_RCC_IC13_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC13_GetSource: 0x3418AF04: F248 00F4 MOVW R0, #0x80F4 0x3418AF08: F2C5 6002 MOVT R0, #0x5602 0x3418AF0C: 6800 LDR R0, [R0] 0x3418AF0E: F000 5040 AND R0, R0, #0x30000000 0x3418AF12: 4770 BX LR

Section .text.LL_RCC_IC12_IsEnabled from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC12_IsEnabled: 0x3418AF14: F248 2040 MOVW R0, #0x8240 0x3418AF18: F2C5 6002 MOVT R0, #0x5602 0x3418AF1C: 6800 LDR R0, [R0] 0x3418AF1E: F3C0 20C0 UBFX R0, R0, #11, #1 0x3418AF22: 4770 BX LR

Section .text.LL_RCC_IC12_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC12_GetSource: 0x3418AF24: F248 00F0 MOVW R0, #0x80F0 0x3418AF28: F2C5 6002 MOVT R0, #0x5602 0x3418AF2C: 6800 LDR R0, [R0] 0x3418AF2E: F000 5040 AND R0, R0, #0x30000000 0x3418AF32: 4770 BX LR

Section .text.LL_RCC_IC17_IsEnabled from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC17_IsEnabled: 0x3418AF34: F248 2040 MOVW R0, #0x8240 0x3418AF38: F2C5 6002 MOVT R0, #0x5602 0x3418AF3C: 6800 LDR R0, [R0] 0x3418AF3E: F3C0 4000 UBFX R0, R0, #16, #1 0x3418AF42: 4770 BX LR

Section .text.LL_RCC_IC17_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC17_GetSource: 0x3418AF44: F248 1004 MOVW R0, #0x8104 0x3418AF48: F2C5 6002 MOVT R0, #0x5602 0x3418AF4C: 6800 LDR R0, [R0] 0x3418AF4E: F000 5040 AND R0, R0, #0x30000000 0x3418AF52: 4770 BX LR

Section .text.LL_RCC_CLKP_IsEnabled from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_CLKP_IsEnabled: 0x3418AF54: F248 2048 MOVW R0, #0x8248 0x3418AF58: F2C5 6002 MOVT R0, #0x5602 0x3418AF5C: 6800 LDR R0, [R0] 0x3418AF5E: F3C0 1080 UBFX R0, R0, #6, #1 0x3418AF62: 4770 BX LR

Section .text.LL_RCC_IC18_IsEnabled from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC18_IsEnabled: 0x3418AF64: F248 2040 MOVW R0, #0x8240 0x3418AF68: F2C5 6002 MOVT R0, #0x5602 0x3418AF6C: 6800 LDR R0, [R0] 0x3418AF6E: F3C0 4040 UBFX R0, R0, #17, #1 0x3418AF72: 4770 BX LR

Section .text.LL_RCC_IC18_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC18_GetSource: 0x3418AF74: F248 1008 MOVW R0, #0x8108 0x3418AF78: F2C5 6002 MOVT R0, #0x5602 0x3418AF7C: 6800 LDR R0, [R0] 0x3418AF7E: F000 5040 AND R0, R0, #0x30000000 0x3418AF82: 4770 BX LR

Section .text.HAL_XSPI_Init from blto2_FSBL_lto.o, size=1548, align=4


HAL_XSPI_Init: 0x3418AF84: B580 PUSH 123R7, LR} 0x3418AF86: B086 SUB SP, SP, #24 0x3418AF88: 9004 STR R0, [SP, #16] 0x3418AF8A: 2000 MOVS R0, #0 0x3418AF8C: F88D 000F STRB.W R0, [SP, #15] 0x3418AF90: F7F6 FC7C BL HAL_GetTick ; 0x3418188C 0x3418AF94: 9002 STR R0, [SP, #8] 0x3418AF96: 9804 LDR R0, [SP, #16] 0x3418AF98: B918 CBNZ R0, .L1 ; 0x3418AFA2 0x3418AF9A: 2001 MOVS R0, #1 0x3418AF9C: F88D 000F STRB.W R0, [SP, #15] 0x3418AFA0: E2EE B 46L45 ; 0x3418B580
.L1: 0x3418AFA2: 9804 LDR R0, [SP, #16] 0x3418AFA4: 6880 LDR R0, [R0, #8] 0x3418AFA6: B118 CBZ R0, .L2 ; 0x3418AFB0 0x3418AFA8: 9804 LDR R0, [SP, #16] 0x3418AFAA: 6880 LDR R0, [R0, #8] 0x3418AFAC: 2840 CMP R0, #64 0x3418AFAE: D100 BNE 46L3 ; 0x3418AFB2
.L2: 0x3418AFB0: E007 B 46L4 ; 0x3418AFC2
.L3: 0x3418AFB2: F244 2050 MOVW R0, #0x4250 ; 0x34194250 = .rodata..L.str.98 0x3418AFB6: F2C3 4019 MOVT R0, #0x3419 ; 0x34194250 = .rodata..L.str.98 0x3418AFBA: F44F 71B2 MOV.W R1, #0x0164 0x3418AFBE: F002 FE6D BL assert_failed ; 0x3418DC9C
.L4: 0x3418AFC2: 9804 LDR R0, [SP, #16] 0x3418AFC4: 68C0 LDR R0, [R0, #12] 0x3418AFC6: B1C0 CBZ R0, .L5 ; 0x3418AFFA 0x3418AFC8: 9804 LDR R0, [SP, #16] 0x3418AFCA: 68C0 LDR R0, [R0, #12] 0x3418AFCC: F1B0 7F80 CMP.W R0, #0x01000000 0x3418AFD0: D013 BEQ 46L5 ; 0x3418AFFA 0x3418AFD2: 9804 LDR R0, [SP, #16] 0x3418AFD4: 68C0 LDR R0, [R0, #12] 0x3418AFD6: F1B0 7F00 CMP.W R0, #0x02000000 0x3418AFDA: D00E BEQ 46L5 ; 0x3418AFFA 0x3418AFDC: 9804 LDR R0, [SP, #16] 0x3418AFDE: 68C0 LDR R0, [R0, #12] 0x3418AFE0: F1B0 7F40 CMP.W R0, #0x03000000 0x3418AFE4: D009 BEQ 46L5 ; 0x3418AFFA 0x3418AFE6: 9804 LDR R0, [SP, #16] 0x3418AFE8: 68C0 LDR R0, [R0, #12] 0x3418AFEA: F1B0 6F80 CMP.W R0, #0x04000000 0x3418AFEE: D004 BEQ 46L5 ; 0x3418AFFA 0x3418AFF0: 9804 LDR R0, [SP, #16] 0x3418AFF2: 68C0 LDR R0, [R0, #12] 0x3418AFF4: F1B0 6FC0 CMP.W R0, #0x06000000 0x3418AFF8: D100 BNE 46L6 ; 0x3418AFFC
.L5: 0x3418AFFA: E007 B 46L7 ; 0x3418B00C
.L6: 0x3418AFFC: F244 2050 MOVW R0, #0x4250 ; 0x34194250 = .rodata..L.str.98 0x3418B000: F2C3 4019 MOVT R0, #0x3419 ; 0x34194250 = .rodata..L.str.98 0x3418B004: F240 1165 MOVW R1, #0x0165 0x3418B008: F002 FE48 BL assert_failed ; 0x3418DC9C
.L7: 0x3418B00C: 9804 LDR R0, [SP, #16] 0x3418B00E: 6900 LDR R0, [R0, #16] 0x3418B010: 2800 CMP R0, #0 0x3418B012: D07B BEQ 46L8 ; 0x3418B10C 0x3418B014: 9804 LDR R0, [SP, #16] 0x3418B016: 6900 LDR R0, [R0, #16] 0x3418B018: 2801 CMP R0, #1 0x3418B01A: D077 BEQ 46L8 ; 0x3418B10C 0x3418B01C: 9804 LDR R0, [SP, #16] 0x3418B01E: 6900 LDR R0, [R0, #16] 0x3418B020: 2802 CMP R0, #2 0x3418B022: D073 BEQ 46L8 ; 0x3418B10C 0x3418B024: 9804 LDR R0, [SP, #16] 0x3418B026: 6900 LDR R0, [R0, #16] 0x3418B028: 2803 CMP R0, #3 0x3418B02A: D06F BEQ 46L8 ; 0x3418B10C 0x3418B02C: 9804 LDR R0, [SP, #16] 0x3418B02E: 6900 LDR R0, [R0, #16] 0x3418B030: 2804 CMP R0, #4 0x3418B032: D06B BEQ 46L8 ; 0x3418B10C 0x3418B034: 9804 LDR R0, [SP, #16] 0x3418B036: 6900 LDR R0, [R0, #16] 0x3418B038: 2805 CMP R0, #5 0x3418B03A: D067 BEQ 46L8 ; 0x3418B10C 0x3418B03C: 9804 LDR R0, [SP, #16] 0x3418B03E: 6900 LDR R0, [R0, #16] 0x3418B040: 2806 CMP R0, #6 0x3418B042: D063 BEQ 46L8 ; 0x3418B10C 0x3418B044: 9804 LDR R0, [SP, #16] 0x3418B046: 6900 LDR R0, [R0, #16] 0x3418B048: 2807 CMP R0, #7 0x3418B04A: D05F BEQ 46L8 ; 0x3418B10C 0x3418B04C: 9804 LDR R0, [SP, #16] 0x3418B04E: 6900 LDR R0, [R0, #16] 0x3418B050: 2808 CMP R0, #8 0x3418B052: D05B BEQ 46L8 ; 0x3418B10C 0x3418B054: 9804 LDR R0, [SP, #16] 0x3418B056: 6900 LDR R0, [R0, #16] 0x3418B058: 2809 CMP R0, #9 0x3418B05A: D057 BEQ 46L8 ; 0x3418B10C 0x3418B05C: 9804 LDR R0, [SP, #16] 0x3418B05E: 6900 LDR R0, [R0, #16] 0x3418B060: 280A CMP R0, #10 0x3418B062: D053 BEQ 46L8 ; 0x3418B10C 0x3418B064: 9804 LDR R0, [SP, #16] 0x3418B066: 6900 LDR R0, [R0, #16] 0x3418B068: 280B CMP R0, #11 0x3418B06A: D04F BEQ 46L8 ; 0x3418B10C 0x3418B06C: 9804 LDR R0, [SP, #16] 0x3418B06E: 6900 LDR R0, [R0, #16] 0x3418B070: 280C CMP R0, #12 0x3418B072: D04B BEQ 46L8 ; 0x3418B10C 0x3418B074: 9804 LDR R0, [SP, #16] 0x3418B076: 6900 LDR R0, [R0, #16] 0x3418B078: 280D CMP R0, #13 0x3418B07A: D047 BEQ 46L8 ; 0x3418B10C 0x3418B07C: 9804 LDR R0, [SP, #16] 0x3418B07E: 6900 LDR R0, [R0, #16] 0x3418B080: 280E CMP R0, #14 0x3418B082: D043 BEQ 46L8 ; 0x3418B10C 0x3418B084: 9804 LDR R0, [SP, #16] 0x3418B086: 6900 LDR R0, [R0, #16] 0x3418B088: 280F CMP R0, #15 0x3418B08A: D03F BEQ 46L8 ; 0x3418B10C 0x3418B08C: 9804 LDR R0, [SP, #16] 0x3418B08E: 6900 LDR R0, [R0, #16] 0x3418B090: 2810 CMP R0, #16 0x3418B092: D03B BEQ 46L8 ; 0x3418B10C 0x3418B094: 9804 LDR R0, [SP, #16] 0x3418B096: 6900 LDR R0, [R0, #16] 0x3418B098: 2811 CMP R0, #17 0x3418B09A: D037 BEQ 46L8 ; 0x3418B10C 0x3418B09C: 9804 LDR R0, [SP, #16] 0x3418B09E: 6900 LDR R0, [R0, #16] 0x3418B0A0: 2812 CMP R0, #18 0x3418B0A2: D033 BEQ 46L8 ; 0x3418B10C 0x3418B0A4: 9804 LDR R0, [SP, #16] 0x3418B0A6: 6900 LDR R0, [R0, #16] 0x3418B0A8: 2813 CMP R0, #19 0x3418B0AA: D02F BEQ 46L8 ; 0x3418B10C 0x3418B0AC: 9804 LDR R0, [SP, #16] 0x3418B0AE: 6900 LDR R0, [R0, #16] 0x3418B0B0: 2814 CMP R0, #20 0x3418B0B2: D02B BEQ 46L8 ; 0x3418B10C 0x3418B0B4: 9804 LDR R0, [SP, #16] 0x3418B0B6: 6900 LDR R0, [R0, #16] 0x3418B0B8: 2815 CMP R0, #21 0x3418B0BA: D027 BEQ 46L8 ; 0x3418B10C 0x3418B0BC: 9804 LDR R0, [SP, #16] 0x3418B0BE: 6900 LDR R0, [R0, #16] 0x3418B0C0: 2816 CMP R0, #22 0x3418B0C2: D023 BEQ 46L8 ; 0x3418B10C 0x3418B0C4: 9804 LDR R0, [SP, #16] 0x3418B0C6: 6900 LDR R0, [R0, #16] 0x3418B0C8: 2817 CMP R0, #23 0x3418B0CA: D01F BEQ 46L8 ; 0x3418B10C 0x3418B0CC: 9804 LDR R0, [SP, #16] 0x3418B0CE: 6900 LDR R0, [R0, #16] 0x3418B0D0: 2818 CMP R0, #24 0x3418B0D2: D01B BEQ 46L8 ; 0x3418B10C 0x3418B0D4: 9804 LDR R0, [SP, #16] 0x3418B0D6: 6900 LDR R0, [R0, #16] 0x3418B0D8: 2819 CMP R0, #25 0x3418B0DA: D017 BEQ 46L8 ; 0x3418B10C 0x3418B0DC: 9804 LDR R0, [SP, #16] 0x3418B0DE: 6900 LDR R0, [R0, #16] 0x3418B0E0: 281A CMP R0, #26 0x3418B0E2: D013 BEQ 46L8 ; 0x3418B10C 0x3418B0E4: 9804 LDR R0, [SP, #16] 0x3418B0E6: 6900 LDR R0, [R0, #16] 0x3418B0E8: 281B CMP R0, #27 0x3418B0EA: D00F BEQ 46L8 ; 0x3418B10C 0x3418B0EC: 9804 LDR R0, [SP, #16] 0x3418B0EE: 6900 LDR R0, [R0, #16] 0x3418B0F0: 281C CMP R0, #28 0x3418B0F2: D00B BEQ 46L8 ; 0x3418B10C 0x3418B0F4: 9804 LDR R0, [SP, #16] 0x3418B0F6: 6900 LDR R0, [R0, #16] 0x3418B0F8: 281D CMP R0, #29 0x3418B0FA: D007 BEQ 46L8 ; 0x3418B10C 0x3418B0FC: 9804 LDR R0, [SP, #16] 0x3418B0FE: 6900 LDR R0, [R0, #16] 0x3418B100: 281E CMP R0, #30 0x3418B102: D003 BEQ 46L8 ; 0x3418B10C 0x3418B104: 9804 LDR R0, [SP, #16] 0x3418B106: 6900 LDR R0, [R0, #16] 0x3418B108: 281F CMP R0, #31 0x3418B10A: D100 BNE 46L9 ; 0x3418B10E
.L8: 0x3418B10C: E007 B 46L10 ; 0x3418B11E
.L9: 0x3418B10E: F244 2050 MOVW R0, #0x4250 ; 0x34194250 = .rodata..L.str.98 0x3418B112: F2C3 4019 MOVT R0, #0x3419 ; 0x34194250 = .rodata..L.str.98 0x3418B116: F44F 71B3 MOV.W R1, #0x0166 0x3418B11A: F002 FDBF BL assert_failed ; 0x3418DC9C
.L10: 0x3418B11E: 9804 LDR R0, [SP, #16] 0x3418B120: 6940 LDR R0, [R0, #20] 0x3418B122: B120 CBZ R0, .L11 ; 0x3418B12E 0x3418B124: 9804 LDR R0, [SP, #16] 0x3418B126: 6940 LDR R0, [R0, #20] 0x3418B128: 2840 CMP R0, #64 0x3418B12A: D800 BHI 46L11 ; 0x3418B12E 0x3418B12C: E007 B 46L12 ; 0x3418B13E
.L11: 0x3418B12E: F244 2050 MOVW R0, #0x4250 ; 0x34194250 = .rodata..L.str.98 0x3418B132: F2C3 4019 MOVT R0, #0x3419 ; 0x34194250 = .rodata..L.str.98 0x3418B136: F240 1167 MOVW R1, #0x0167 0x3418B13A: F002 FDAF BL assert_failed ; 0x3418DC9C
.L12: 0x3418B13E: 9804 LDR R0, [SP, #16] 0x3418B140: 6980 LDR R0, [R0, #24] 0x3418B142: B118 CBZ R0, .L13 ; 0x3418B14C 0x3418B144: 9804 LDR R0, [SP, #16] 0x3418B146: 6980 LDR R0, [R0, #24] 0x3418B148: 2802 CMP R0, #2 0x3418B14A: D100 BNE 46L14 ; 0x3418B14E
.L13: 0x3418B14C: E007 B 46L15 ; 0x3418B15E
.L14: 0x3418B14E: F244 2050 MOVW R0, #0x4250 ; 0x34194250 = .rodata..L.str.98 0x3418B152: F2C3 4019 MOVT R0, #0x3419 ; 0x34194250 = .rodata..L.str.98 0x3418B156: F44F 71B4 MOV.W R1, #0x0168 0x3418B15A: F002 FD9F BL assert_failed ; 0x3418DC9C
.L15: 0x3418B15E: 9804 LDR R0, [SP, #16] 0x3418B160: 69C0 LDR R0, [R0, #28] 0x3418B162: B118 CBZ R0, .L16 ; 0x3418B16C 0x3418B164: 9804 LDR R0, [SP, #16] 0x3418B166: 69C0 LDR R0, [R0, #28] 0x3418B168: 2801 CMP R0, #1 0x3418B16A: D100 BNE 46L17 ; 0x3418B16E
.L16: 0x3418B16C: E007 B 46L18 ; 0x3418B17E
.L17: 0x3418B16E: F244 2050 MOVW R0, #0x4250 ; 0x34194250 = .rodata..L.str.98 0x3418B172: F2C3 4019 MOVT R0, #0x3419 ; 0x34194250 = .rodata..L.str.98 0x3418B176: F240 1169 MOVW R1, #0x0169 0x3418B17A: F002 FD8F BL assert_failed ; 0x3418DC9C
.L18: 0x3418B17E: 9804 LDR R0, [SP, #16] 0x3418B180: 6A00 LDR R0, [R0, #32] 0x3418B182: B198 CBZ R0, .L19 ; 0x3418B1AC 0x3418B184: 9804 LDR R0, [SP, #16] 0x3418B186: 6A00 LDR R0, [R0, #32] 0x3418B188: F5B0 3F00 CMP.W R0, #0x020000 0x3418B18C: D00E BEQ 46L19 ; 0x3418B1AC 0x3418B18E: 9804 LDR R0, [SP, #16] 0x3418B190: 6A00 LDR R0, [R0, #32] 0x3418B192: F5B0 3F40 CMP.W R0, #0x030000 0x3418B196: D009 BEQ 46L19 ; 0x3418B1AC 0x3418B198: 9804 LDR R0, [SP, #16] 0x3418B19A: 6A00 LDR R0, [R0, #32] 0x3418B19C: F5B0 2F80 CMP.W R0, #0x040000 0x3418B1A0: D004 BEQ 46L19 ; 0x3418B1AC 0x3418B1A2: 9804 LDR R0, [SP, #16] 0x3418B1A4: 6A00 LDR R0, [R0, #32] 0x3418B1A6: F5B0 2FA0 CMP.W R0, #0x050000 0x3418B1AA: D100 BNE 46L20 ; 0x3418B1AE
.L19: 0x3418B1AC: E007 B 46L21 ; 0x3418B1BE
.L20: 0x3418B1AE: F244 2050 MOVW R0, #0x4250 ; 0x34194250 = .rodata..L.str.98 0x3418B1B2: F2C3 4019 MOVT R0, #0x3419 ; 0x34194250 = .rodata..L.str.98 0x3418B1B6: F44F 71B5 MOV.W R1, #0x016A 0x3418B1BA: F002 FD6F BL assert_failed ; 0x3418DC9C
.L21: 0x3418B1BE: 9804 LDR R0, [SP, #16] 0x3418B1C0: 6A40 LDR R0, [R0, #36] 0x3418B1C2: 28FF CMP R0, #255 0x3418B1C4: D800 BHI 46L22 ; 0x3418B1C8 0x3418B1C6: E007 B 46L23 ; 0x3418B1D8
.L22: 0x3418B1C8: F244 2050 MOVW R0, #0x4250 ; 0x34194250 = .rodata..L.str.98 0x3418B1CC: F2C3 4019 MOVT R0, #0x3419 ; 0x34194250 = .rodata..L.str.98 0x3418B1D0: F240 116B MOVW R1, #0x016B 0x3418B1D4: F002 FD62 BL assert_failed ; 0x3418DC9C
.L23: 0x3418B1D8: 9804 LDR R0, [SP, #16] 0x3418B1DA: 6A80 LDR R0, [R0, #40] 0x3418B1DC: B120 CBZ R0, .L24 ; 0x3418B1E8 0x3418B1DE: 9804 LDR R0, [SP, #16] 0x3418B1E0: 6A80 LDR R0, [R0, #40] 0x3418B1E2: F1B0 4F80 CMP.W R0, #0x40000000 0x3418B1E6: D100 BNE 46L25 ; 0x3418B1EA
.L24: 0x3418B1E8: E007 B 46L26 ; 0x3418B1FA
.L25: 0x3418B1EA: F244 2050 MOVW R0, #0x4250 ; 0x34194250 = .rodata..L.str.98 0x3418B1EE: F2C3 4019 MOVT R0, #0x3419 ; 0x34194250 = .rodata..L.str.98 0x3418B1F2: F44F 71B6 MOV.W R1, #0x016C 0x3418B1F6: F002 FD51 BL assert_failed ; 0x3418DC9C
.L26: 0x3418B1FA: 9804 LDR R0, [SP, #16] 0x3418B1FC: 6B00 LDR R0, [R0, #48] 0x3418B1FE: 2800 CMP R0, #0 0x3418B200: D07B BEQ 46L27 ; 0x3418B2FA 0x3418B202: 9804 LDR R0, [SP, #16] 0x3418B204: 6B00 LDR R0, [R0, #48] 0x3418B206: 2801 CMP R0, #1 0x3418B208: D077 BEQ 46L27 ; 0x3418B2FA 0x3418B20A: 9804 LDR R0, [SP, #16] 0x3418B20C: 6B00 LDR R0, [R0, #48] 0x3418B20E: 2802 CMP R0, #2 0x3418B210: D073 BEQ 46L27 ; 0x3418B2FA 0x3418B212: 9804 LDR R0, [SP, #16] 0x3418B214: 6B00 LDR R0, [R0, #48] 0x3418B216: 2803 CMP R0, #3 0x3418B218: D06F BEQ 46L27 ; 0x3418B2FA 0x3418B21A: 9804 LDR R0, [SP, #16] 0x3418B21C: 6B00 LDR R0, [R0, #48] 0x3418B21E: 2804 CMP R0, #4 0x3418B220: D06B BEQ 46L27 ; 0x3418B2FA 0x3418B222: 9804 LDR R0, [SP, #16] 0x3418B224: 6B00 LDR R0, [R0, #48] 0x3418B226: 2805 CMP R0, #5 0x3418B228: D067 BEQ 46L27 ; 0x3418B2FA 0x3418B22A: 9804 LDR R0, [SP, #16] 0x3418B22C: 6B00 LDR R0, [R0, #48] 0x3418B22E: 2806 CMP R0, #6 0x3418B230: D063 BEQ 46L27 ; 0x3418B2FA 0x3418B232: 9804 LDR R0, [SP, #16] 0x3418B234: 6B00 LDR R0, [R0, #48] 0x3418B236: 2807 CMP R0, #7 0x3418B238: D05F BEQ 46L27 ; 0x3418B2FA 0x3418B23A: 9804 LDR R0, [SP, #16] 0x3418B23C: 6B00 LDR R0, [R0, #48] 0x3418B23E: 2808 CMP R0, #8 0x3418B240: D05B BEQ 46L27 ; 0x3418B2FA 0x3418B242: 9804 LDR R0, [SP, #16] 0x3418B244: 6B00 LDR R0, [R0, #48] 0x3418B246: 2809 CMP R0, #9 0x3418B248: D057 BEQ 46L27 ; 0x3418B2FA 0x3418B24A: 9804 LDR R0, [SP, #16] 0x3418B24C: 6B00 LDR R0, [R0, #48] 0x3418B24E: 280A CMP R0, #10 0x3418B250: D053 BEQ 46L27 ; 0x3418B2FA 0x3418B252: 9804 LDR R0, [SP, #16] 0x3418B254: 6B00 LDR R0, [R0, #48] 0x3418B256: 280B CMP R0, #11 0x3418B258: D04F BEQ 46L27 ; 0x3418B2FA 0x3418B25A: 9804 LDR R0, [SP, #16] 0x3418B25C: 6B00 LDR R0, [R0, #48] 0x3418B25E: 280C CMP R0, #12 0x3418B260: D04B BEQ 46L27 ; 0x3418B2FA 0x3418B262: 9804 LDR R0, [SP, #16] 0x3418B264: 6B00 LDR R0, [R0, #48] 0x3418B266: 280D CMP R0, #13 0x3418B268: D047 BEQ 46L27 ; 0x3418B2FA 0x3418B26A: 9804 LDR R0, [SP, #16] 0x3418B26C: 6B00 LDR R0, [R0, #48] 0x3418B26E: 280E CMP R0, #14 0x3418B270: D043 BEQ 46L27 ; 0x3418B2FA 0x3418B272: 9804 LDR R0, [SP, #16] 0x3418B274: 6B00 LDR R0, [R0, #48] 0x3418B276: 280F CMP R0, #15 0x3418B278: D03F BEQ 46L27 ; 0x3418B2FA 0x3418B27A: 9804 LDR R0, [SP, #16] 0x3418B27C: 6B00 LDR R0, [R0, #48] 0x3418B27E: 2810 CMP R0, #16 0x3418B280: D03B BEQ 46L27 ; 0x3418B2FA 0x3418B282: 9804 LDR R0, [SP, #16] 0x3418B284: 6B00 LDR R0, [R0, #48] 0x3418B286: 2811 CMP R0, #17 0x3418B288: D037 BEQ 46L27 ; 0x3418B2FA 0x3418B28A: 9804 LDR R0, [SP, #16] 0x3418B28C: 6B00 LDR R0, [R0, #48] 0x3418B28E: 2812 CMP R0, #18 0x3418B290: D033 BEQ 46L27 ; 0x3418B2FA 0x3418B292: 9804 LDR R0, [SP, #16] 0x3418B294: 6B00 LDR R0, [R0, #48] 0x3418B296: 2813 CMP R0, #19 0x3418B298: D02F BEQ 46L27 ; 0x3418B2FA 0x3418B29A: 9804 LDR R0, [SP, #16] 0x3418B29C: 6B00 LDR R0, [R0, #48] 0x3418B29E: 2814 CMP R0, #20 0x3418B2A0: D02B BEQ 46L27 ; 0x3418B2FA 0x3418B2A2: 9804 LDR R0, [SP, #16] 0x3418B2A4: 6B00 LDR R0, [R0, #48] 0x3418B2A6: 2815 CMP R0, #21 0x3418B2A8: D027 BEQ 46L27 ; 0x3418B2FA 0x3418B2AA: 9804 LDR R0, [SP, #16] 0x3418B2AC: 6B00 LDR R0, [R0, #48] 0x3418B2AE: 2816 CMP R0, #22 0x3418B2B0: D023 BEQ 46L27 ; 0x3418B2FA 0x3418B2B2: 9804 LDR R0, [SP, #16] 0x3418B2B4: 6B00 LDR R0, [R0, #48] 0x3418B2B6: 2817 CMP R0, #23 0x3418B2B8: D01F BEQ 46L27 ; 0x3418B2FA 0x3418B2BA: 9804 LDR R0, [SP, #16] 0x3418B2BC: 6B00 LDR R0, [R0, #48] 0x3418B2BE: 2818 CMP R0, #24 0x3418B2C0: D01B BEQ 46L27 ; 0x3418B2FA 0x3418B2C2: 9804 LDR R0, [SP, #16] 0x3418B2C4: 6B00 LDR R0, [R0, #48] 0x3418B2C6: 2819 CMP R0, #25 0x3418B2C8: D017 BEQ 46L27 ; 0x3418B2FA 0x3418B2CA: 9804 LDR R0, [SP, #16] 0x3418B2CC: 6B00 LDR R0, [R0, #48] 0x3418B2CE: 281A CMP R0, #26 0x3418B2D0: D013 BEQ 46L27 ; 0x3418B2FA 0x3418B2D2: 9804 LDR R0, [SP, #16] 0x3418B2D4: 6B00 LDR R0, [R0, #48] 0x3418B2D6: 281B CMP R0, #27 0x3418B2D8: D00F BEQ 46L27 ; 0x3418B2FA 0x3418B2DA: 9804 LDR R0, [SP, #16] 0x3418B2DC: 6B00 LDR R0, [R0, #48] 0x3418B2DE: 281C CMP R0, #28 0x3418B2E0: D00B BEQ 46L27 ; 0x3418B2FA 0x3418B2E2: 9804 LDR R0, [SP, #16] 0x3418B2E4: 6B00 LDR R0, [R0, #48] 0x3418B2E6: 281D CMP R0, #29 0x3418B2E8: D007 BEQ 46L27 ; 0x3418B2FA 0x3418B2EA: 9804 LDR R0, [SP, #16] 0x3418B2EC: 6B00 LDR R0, [R0, #48] 0x3418B2EE: 281E CMP R0, #30 0x3418B2F0: D003 BEQ 46L27 ; 0x3418B2FA 0x3418B2F2: 9804 LDR R0, [SP, #16] 0x3418B2F4: 6B00 LDR R0, [R0, #48] 0x3418B2F6: 281F CMP R0, #31 0x3418B2F8: D100 BNE 46L28 ; 0x3418B2FC
.L27: 0x3418B2FA: E007 B 46L29 ; 0x3418B30C
.L28: 0x3418B2FC: F244 2050 MOVW R0, #0x4250 ; 0x34194250 = .rodata..L.str.98 0x3418B300: F2C3 4019 MOVT R0, #0x3419 ; 0x34194250 = .rodata..L.str.98 0x3418B304: F240 116D MOVW R1, #0x016D 0x3418B308: F002 FCC8 BL assert_failed ; 0x3418DC9C
.L29: 0x3418B30C: 9804 LDR R0, [SP, #16] 0x3418B30E: 6840 LDR R0, [R0, #4] 0x3418B310: B120 CBZ R0, .L30 ; 0x3418B31C 0x3418B312: 9804 LDR R0, [SP, #16] 0x3418B314: 6840 LDR R0, [R0, #4] 0x3418B316: 2840 CMP R0, #64 0x3418B318: D800 BHI 46L30 ; 0x3418B31C 0x3418B31A: E007 B 46L31 ; 0x3418B32C
.L30: 0x3418B31C: F244 2050 MOVW R0, #0x4250 ; 0x34194250 = .rodata..L.str.98 0x3418B320: F2C3 4019 MOVT R0, #0x3419 ; 0x34194250 = .rodata..L.str.98 0x3418B324: F44F 71B7 MOV.W R1, #0x016E 0x3418B328: F002 FCB8 BL assert_failed ; 0x3418DC9C
.L31: 0x3418B32C: 9804 LDR R0, [SP, #16] 0x3418B32E: 6B40 LDR R0, [R0, #52] 0x3418B330: 28FF CMP R0, #255 0x3418B332: D800 BHI 46L32 ; 0x3418B336 0x3418B334: E007 B 46L33 ; 0x3418B346
.L32: 0x3418B336: F244 2050 MOVW R0, #0x4250 ; 0x34194250 = .rodata..L.str.98 0x3418B33A: F2C3 4019 MOVT R0, #0x3419 ; 0x34194250 = .rodata..L.str.98 0x3418B33E: F240 116F MOVW R1, #0x016F 0x3418B342: F002 FCAB BL assert_failed ; 0x3418DC9C
.L33: 0x3418B346: 9804 LDR R0, [SP, #16] 0x3418B348: 6BC0 LDR R0, [R0, #60] 0x3418B34A: B120 CBZ R0, .L34 ; 0x3418B356 0x3418B34C: 9804 LDR R0, [SP, #16] 0x3418B34E: 6BC0 LDR R0, [R0, #60] 0x3418B350: F1B0 7F80 CMP.W R0, #0x01000000 0x3418B354: D100 BNE 46L35 ; 0x3418B358
.L34: 0x3418B356: E007 B 46L36 ; 0x3418B368
.L35: 0x3418B358: F244 2050 MOVW R0, #0x4250 ; 0x34194250 = .rodata..L.str.98 0x3418B35C: F2C3 4019 MOVT R0, #0x3419 ; 0x34194250 = .rodata..L.str.98 0x3418B360: F44F 71B8 MOV.W R1, #0x0170 0x3418B364: F002 FC9A BL assert_failed ; 0x3418DC9C
.L36: 0x3418B368: 9804 LDR R0, [SP, #16] 0x3418B36A: 6C00 LDR R0, [R0, #64] 0x3418B36C: B120 CBZ R0, .L37 ; 0x3418B378 0x3418B36E: 9804 LDR R0, [SP, #16] 0x3418B370: 6C00 LDR R0, [R0, #64] 0x3418B372: F5B0 1F00 CMP.W R0, #0x200000 0x3418B376: D100 BNE 46L38 ; 0x3418B37A
.L37: 0x3418B378: E007 B 46L39 ; 0x3418B38A
.L38: 0x3418B37A: F244 2050 MOVW R0, #0x4250 ; 0x34194250 = .rodata..L.str.98 0x3418B37E: F2C3 4019 MOVT R0, #0x3419 ; 0x34194250 = .rodata..L.str.98 0x3418B382: F240 1171 MOVW R1, #0x0171 0x3418B386: F002 FC89 BL assert_failed ; 0x3418DC9C
.L39: 0x3418B38A: 9904 LDR R1, [SP, #16] 0x3418B38C: 2000 MOVS R0, #0 0x3418B38E: 65C8 STR R0, [R1, #92] 0x3418B390: 9804 LDR R0, [SP, #16] 0x3418B392: 6D80 LDR R0, [R0, #88] 0x3418B394: 2800 CMP R0, #0 0x3418B396: F040 80F3 BNE.W 46L45 ; 0x3418B580 0x3418B39A: 9804 LDR R0, [SP, #16] 0x3418B39C: F7F6 F9BC BL HAL_XSPI_MspInit ; 0x34181718 0x3418B3A0: 9804 LDR R0, [SP, #16] 0x3418B3A2: F241 3188 MOVW R1, #0x1388 0x3418B3A6: F006 FC61 BL HAL_XSPI_SetTimeout ; 0x34191C6C 0x3418B3AA: 9804 LDR R0, [SP, #16] 0x3418B3AC: 6800 LDR R0, [R0] 0x3418B3AE: 6880 LDR R0, [R0, #8] 0x3418B3B0: F24C 01FC MOVW R1, #0xC0FC 0x3418B3B4: F6CF 01E0 MOVT R1, #0xF8E0 0x3418B3B8: 4008 ANDS R0, R1 0x3418B3BA: 9B04 LDR R3, [SP, #16] 0x3418B3BC: 6819 LDR R1, [R3] 0x3418B3BE: 68DA LDR R2, [R3, #12] 0x3418B3C0: F8D3 C010 LDR.W R12, [R3, #16] 0x3418B3C4: F8D3 E014 LDR.W LR, [R3, #20] 0x3418B3C8: EA42 420C ORR.W R2, R2, R12, LSL #16 0x3418B3CC: F06F 0CFF MVN R12, #255 0x3418B3D0: EB0C 2C0E ADD.W R12, R12, LR, LSL #8 0x3418B3D4: EA42 020C ORR.W R2, R2, R12 0x3418B3D8: 69DB LDR R3, [R3, #28] 0x3418B3DA: 431A ORRS R2, R3 0x3418B3DC: 4310 ORRS R0, R2 0x3418B3DE: 6088 STR R0, [R1, #8] 0x3418B3E0: 9804 LDR R0, [SP, #16] 0x3418B3E2: 6C00 LDR R0, [R0, #64] 0x3418B3E4: F5B0 1F00 CMP.W R0, #0x200000 0x3418B3E8: D105 BNE 46L40 ; 0x3418B3F6 0x3418B3EA: 9804 LDR R0, [SP, #16] 0x3418B3EC: 6801 LDR R1, [R0] 0x3418B3EE: 6888 LDR R0, [R1, #8] 0x3418B3F0: F440 1000 ORR R0, R0, #0x200000 0x3418B3F4: 6088 STR R0, [R1, #8]
.L40: 0x3418B3F6: 9804 LDR R0, [SP, #16] 0x3418B3F8: 6800 LDR R0, [R0] 0x3418B3FA: 68C0 LDR R0, [R0, #12] 0x3418B3FC: F420 20E0 BIC R0, R0, #0x070000 0x3418B400: 9A04 LDR R2, [SP, #16] 0x3418B402: 6811 LDR R1, [R2] 0x3418B404: 6A12 LDR R2, [R2, #32] 0x3418B406: 4310 ORRS R0, R2 0x3418B408: 60C8 STR R0, [R1, #12] 0x3418B40A: 9804 LDR R0, [SP, #16] 0x3418B40C: 6800 LDR R0, [R0] 0x3418B40E: 6900 LDR R0, [R0, #16] 0x3418B410: F420 10F8 BIC R0, R0, #0x1F0000 0x3418B414: 9A04 LDR R2, [SP, #16] 0x3418B416: 6811 LDR R1, [R2] 0x3418B418: 6B12 LDR R2, [R2, #48] 0x3418B41A: EA40 4002 ORR.W R0, R0, R2, LSL #16 0x3418B41E: 6108 STR R0, [R1, #16] 0x3418B420: 9804 LDR R0, [SP, #16] 0x3418B422: 6800 LDR R0, [R0] 0x3418B424: 6900 LDR R0, [R0, #16] 0x3418B426: F020 00FF BIC R0, R0, #255 0x3418B42A: 9A04 LDR R2, [SP, #16] 0x3418B42C: 6811 LDR R1, [R2] 0x3418B42E: 6B52 LDR R2, [R2, #52] 0x3418B430: 4310 ORRS R0, R2 0x3418B432: 6108 STR R0, [R1, #16] 0x3418B434: 9804 LDR R0, [SP, #16] 0x3418B436: 6801 LDR R1, [R0] 0x3418B438: 6B80 LDR R0, [R0, #56] 0x3418B43A: 6148 STR R0, [R1, #20] 0x3418B43C: 9804 LDR R0, [SP, #16] 0x3418B43E: 6800 LDR R0, [R0] 0x3418B440: 6800 LDR R0, [R0] 0x3418B442: F420 507C BIC R0, R0, #0x3F00 0x3418B446: 9A04 LDR R2, [SP, #16] 0x3418B448: 6811 LDR R1, [R2] 0x3418B44A: 6853 LDR R3, [R2, #4] 0x3418B44C: F06F 02FF MVN R2, #255 0x3418B450: EB02 2203 ADD.W R2, R2, R3, LSL #8 0x3418B454: 4310 ORRS R0, R2 0x3418B456: 6008 STR R0, [R1] 0x3418B458: 9804 LDR R0, [SP, #16] 0x3418B45A: 9B02 LDR R3, [SP, #8] 0x3418B45C: 6E01 LDR R1, [R0, #96] 0x3418B45E: 466A MOV R2, SP 0x3418B460: 6011 STR R1, [R2] 0x3418B462: 2120 MOVS R1, #32 0x3418B464: 2200 MOVS R2, #0 0x3418B466: F000 F893 BL XSPI_WaitFlagStateUntilTimeout ; 0x3418B590 0x3418B46A: F88D 000F STRB.W R0, [SP, #15] 0x3418B46E: F89D 000F LDRB.W R0, [SP, #15] 0x3418B472: 2800 CMP R0, #0 0x3418B474: F040 8084 BNE.W 46L45 ; 0x3418B580 0x3418B478: 9804 LDR R0, [SP, #16] 0x3418B47A: 6800 LDR R0, [R0] 0x3418B47C: 68C0 LDR R0, [R0, #12] 0x3418B47E: F020 00FF BIC R0, R0, #255 0x3418B482: 9A04 LDR R2, [SP, #16] 0x3418B484: 6811 LDR R1, [R2] 0x3418B486: 6A52 LDR R2, [R2, #36] 0x3418B488: 4310 ORRS R0, R2 0x3418B48A: 60C8 STR R0, [R1, #12] 0x3418B48C: 9804 LDR R0, [SP, #16] 0x3418B48E: 6800 LDR R0, [R0] 0x3418B490: F245 0100 MOVW R1, #0x5000 0x3418B494: F6C5 0102 MOVT R1, #0x5802 0x3418B498: 4288 CMP R0, R1 0x3418B49A: D027 BEQ 46L41 ; 0x3418B4EC 0x3418B49C: 9804 LDR R0, [SP, #16] 0x3418B49E: 6800 LDR R0, [R0] 0x3418B4A0: F245 0100 MOVW R1, #0x5000 0x3418B4A4: F6C4 0102 MOVT R1, #0x4802 0x3418B4A8: 4288 CMP R0, R1 0x3418B4AA: D01F BEQ 46L41 ; 0x3418B4EC 0x3418B4AC: 9804 LDR R0, [SP, #16] 0x3418B4AE: 6800 LDR R0, [R0] 0x3418B4B0: F24A 0100 MOVW R1, #0xA000 0x3418B4B4: F6C5 0102 MOVT R1, #0x5802 0x3418B4B8: 4288 CMP R0, R1 0x3418B4BA: D017 BEQ 46L41 ; 0x3418B4EC 0x3418B4BC: 9804 LDR R0, [SP, #16] 0x3418B4BE: 6800 LDR R0, [R0] 0x3418B4C0: F24A 0100 MOVW R1, #0xA000 0x3418B4C4: F6C4 0102 MOVT R1, #0x4802 0x3418B4C8: 4288 CMP R0, R1 0x3418B4CA: D00F BEQ 46L41 ; 0x3418B4EC 0x3418B4CC: 9804 LDR R0, [SP, #16] 0x3418B4CE: 6800 LDR R0, [R0] 0x3418B4D0: F24D 0100 MOVW R1, #0xD000 0x3418B4D4: F6C5 0102 MOVT R1, #0x5802 0x3418B4D8: 4288 CMP R0, R1 0x3418B4DA: D007 BEQ 46L41 ; 0x3418B4EC 0x3418B4DC: 9804 LDR R0, [SP, #16] 0x3418B4DE: 6800 LDR R0, [R0] 0x3418B4E0: F24D 0100 MOVW R1, #0xD000 0x3418B4E4: F6C4 0102 MOVT R1, #0x4802 0x3418B4E8: 4288 CMP R0, R1 0x3418B4EA: D112 BNE 46L42 ; 0x3418B512
.L41: 0x3418B4EC: 9804 LDR R0, [SP, #16] 0x3418B4EE: 9B02 LDR R3, [SP, #8] 0x3418B4F0: 6E01 LDR R1, [R0, #96] 0x3418B4F2: 466A MOV R2, SP 0x3418B4F4: 6011 STR R1, [R2] 0x3418B4F6: 2120 MOVS R1, #32 0x3418B4F8: 2200 MOVS R2, #0 0x3418B4FA: F000 F849 BL XSPI_WaitFlagStateUntilTimeout ; 0x3418B590 0x3418B4FE: F88D 000F STRB.W R0, [SP, #15] 0x3418B502: F89D 000F LDRB.W R0, [SP, #15] 0x3418B506: B120 CBZ R0, .L42 ; 0x3418B512 0x3418B508: F89D 000F LDRB.W R0, [SP, #15] 0x3418B50C: F88D 0017 STRB.W R0, [SP, #23] 0x3418B510: E03A B 46L46 ; 0x3418B588
.L42: 0x3418B512: 9804 LDR R0, [SP, #16] 0x3418B514: 6800 LDR R0, [R0] 0x3418B516: 6800 LDR R0, [R0] 0x3418B518: F64F 71BF MOVW R1, #0xFFBF 0x3418B51C: F6CF 61FF MOVT R1, #0xFEFF 0x3418B520: 4008 ANDS R0, R1 0x3418B522: 9B04 LDR R3, [SP, #16] 0x3418B524: 6819 LDR R1, [R3] 0x3418B526: 689A LDR R2, [R3, #8] 0x3418B528: 6BDB LDR R3, [R3, #60] 0x3418B52A: 431A ORRS R2, R3 0x3418B52C: 4310 ORRS R0, R2 0x3418B52E: 6008 STR R0, [R1] 0x3418B530: 9804 LDR R0, [SP, #16] 0x3418B532: 6800 LDR R0, [R0] 0x3418B534: F8D0 0108 LDR.W R0, [R0, #0x0108] 0x3418B538: F020 4080 BIC R0, R0, #0x40000000 0x3418B53C: 9A04 LDR R2, [SP, #16] 0x3418B53E: 6811 LDR R1, [R2] 0x3418B540: 6A92 LDR R2, [R2, #40] 0x3418B542: 4310 ORRS R0, R2 0x3418B544: F8C1 0108 STR.W R0, [R1, #0x0108] 0x3418B548: 9804 LDR R0, [SP, #16] 0x3418B54A: 6801 LDR R1, [R0] 0x3418B54C: 6808 LDR R0, [R1] 0x3418B54E: F040 0001 ORR R0, R0, #1 0x3418B552: 6008 STR R0, [R1] 0x3418B554: 9804 LDR R0, [SP, #16] 0x3418B556: 6980 LDR R0, [R0, #24] 0x3418B558: 2802 CMP R0, #2 0x3418B55A: D105 BNE 46L43 ; 0x3418B568 0x3418B55C: 9804 LDR R0, [SP, #16] 0x3418B55E: 6801 LDR R1, [R0] 0x3418B560: 6888 LDR R0, [R1, #8] 0x3418B562: F040 0002 ORR R0, R0, #2 0x3418B566: 6088 STR R0, [R1, #8]
.L43: 0x3418B568: 9804 LDR R0, [SP, #16] 0x3418B56A: 68C0 LDR R0, [R0, #12] 0x3418B56C: F1B0 6F80 CMP.W R0, #0x04000000 0x3418B570: D103 BNE 46L44 ; 0x3418B57A 0x3418B572: 9904 LDR R1, [SP, #16] 0x3418B574: 2001 MOVS R0, #1 0x3418B576: 6588 STR R0, [R1, #88] 0x3418B578: E002 B 46L45 ; 0x3418B580
.L44: 0x3418B57A: 9904 LDR R1, [SP, #16] 0x3418B57C: 2002 MOVS R0, #2 0x3418B57E: 6588 STR R0, [R1, #88]
.L45: 0x3418B580: F89D 000F LDRB.W R0, [SP, #15] 0x3418B584: F88D 0017 STRB.W R0, [SP, #23]
.L46: 0x3418B588: F89D 0017 LDRB.W R0, [SP, #23] 0x3418B58C: B006 ADD SP, SP, #24 0x3418B58E: BD80 POP 123R7, PC}

Section .text.XSPI_WaitFlagStateUntilTimeout from blto2_FSBL_lto.o, size=104, align=4


XSPI_WaitFlagStateUntilTimeout: 0x3418B590: B580 PUSH 123R7, LR} 0x3418B592: B086 SUB SP, SP, #24 0x3418B594: F8DD C020 LDR.W R12, [SP, #32] 0x3418B598: 9004 STR R0, [SP, #16] 0x3418B59A: 9103 STR R1, [SP, #12] 0x3418B59C: F88D 200B STRB.W R2, [SP, #11] 0x3418B5A0: 9301 STR R3, [SP, #4]
.L1: 0x3418B5A2: 9804 LDR R0, [SP, #16] 0x3418B5A4: 6800 LDR R0, [R0] 0x3418B5A6: 6A00 LDR R0, [R0, #32] 0x3418B5A8: 9903 LDR R1, [SP, #12] 0x3418B5AA: 4208 TST R0, R1 0x3418B5AC: EA5F 900F CSET R0, NE 0x3418B5B0: F89D 100B LDRB.W R1, [SP, #11] 0x3418B5B4: 4288 CMP R0, R1 0x3418B5B6: D018 BEQ 46L4 ; 0x3418B5EA 0x3418B5B8: 9808 LDR R0, [SP, #32] 0x3418B5BA: 3001 ADDS R0, #1 0x3418B5BC: B1A0 CBZ R0, .L3 ; 0x3418B5E8 0x3418B5BE: F7F6 F965 BL HAL_GetTick ; 0x3418188C 0x3418B5C2: 9901 LDR R1, [SP, #4] 0x3418B5C4: 1A40 SUBS R0, R0, R1 0x3418B5C6: 9908 LDR R1, [SP, #32] 0x3418B5C8: 4288 CMP R0, R1 0x3418B5CA: D801 BHI 46L2 ; 0x3418B5D0 0x3418B5CC: 9808 LDR R0, [SP, #32] 0x3418B5CE: B958 CBNZ R0, .L3 ; 0x3418B5E8
.L2: 0x3418B5D0: 9904 LDR R1, [SP, #16] 0x3418B5D2: 2002 MOVS R0, #2 0x3418B5D4: 6588 STR R0, [R1, #88] 0x3418B5D6: 9904 LDR R1, [SP, #16] 0x3418B5D8: 6DC8 LDR R0, [R1, #92] 0x3418B5DA: F040 0001 ORR R0, R0, #1 0x3418B5DE: 65C8 STR R0, [R1, #92] 0x3418B5E0: 2003 MOVS R0, #3 0x3418B5E2: F88D 0017 STRB.W R0, [SP, #23] 0x3418B5E6: E003 B 46L5 ; 0x3418B5F0
.L3: 0x3418B5E8: E7DB B 46L1 ; 0x3418B5A2
.L4: 0x3418B5EA: 2000 MOVS R0, #0 0x3418B5EC: F88D 0017 STRB.W R0, [SP, #23]
.L5: 0x3418B5F0: F89D 0017 LDRB.W R0, [SP, #23] 0x3418B5F4: B006 ADD SP, SP, #24 0x3418B5F6: BD80 POP 123R7, PC}

Section .text.XSPI_ConfigCmd from blto2_FSBL_lto.o, size=924, align=4


XSPI_ConfigCmd: 0x3418B5F8: B580 PUSH 123R7, LR} 0x3418B5FA: B088 SUB SP, SP, #32 0x3418B5FC: 9007 STR R0, [SP, #28] 0x3418B5FE: 9106 STR R1, [SP, #24] 0x3418B600: 2000 MOVS R0, #0 0x3418B602: F88D 0017 STRB.W R0, [SP, #23] 0x3418B606: 9807 LDR R0, [SP, #28] 0x3418B608: 6800 LDR R0, [R0] 0x3418B60A: 6800 LDR R0, [R0] 0x3418B60C: F020 5040 BIC R0, R0, #0x30000000 0x3418B610: 9907 LDR R1, [SP, #28] 0x3418B612: 6809 LDR R1, [R1] 0x3418B614: 6008 STR R0, [R1] 0x3418B616: 9807 LDR R0, [SP, #28] 0x3418B618: 6880 LDR R0, [R0, #8] 0x3418B61A: BB68 CBNZ R0, .L4 ; 0x3418B678 0x3418B61C: 9806 LDR R0, [SP, #24] 0x3418B61E: 6840 LDR R0, [R0, #4] 0x3418B620: B1B0 CBZ R0, .L1 ; 0x3418B650 0x3418B622: 9806 LDR R0, [SP, #24] 0x3418B624: 6840 LDR R0, [R0, #4] 0x3418B626: F1B0 4F80 CMP.W R0, #0x40000000 0x3418B62A: D011 BEQ 46L1 ; 0x3418B650 0x3418B62C: 9806 LDR R0, [SP, #24] 0x3418B62E: 6840 LDR R0, [R0, #4] 0x3418B630: F1B0 4F00 CMP.W R0, #0x80000000 0x3418B634: D00C BEQ 46L1 ; 0x3418B650 0x3418B636: 9806 LDR R0, [SP, #24] 0x3418B638: 6840 LDR R0, [R0, #4] 0x3418B63A: F1B0 4F40 CMP.W R0, #0xC0000000 0x3418B63E: D007 BEQ 46L1 ; 0x3418B650 0x3418B640: 9806 LDR R0, [SP, #24] 0x3418B642: 6840 LDR R0, [R0, #4] 0x3418B644: B120 CBZ R0, .L1 ; 0x3418B650 0x3418B646: 9806 LDR R0, [SP, #24] 0x3418B648: 6840 LDR R0, [R0, #4] 0x3418B64A: F1B0 4F00 CMP.W R0, #0x80000000 0x3418B64E: D100 BNE 46L2 ; 0x3418B652
.L1: 0x3418B650: E007 B 46L3 ; 0x3418B662
.L2: 0x3418B652: F244 2050 MOVW R0, #0x4250 ; 0x34194250 = .rodata..L.str.98 0x3418B656: F2C3 4019 MOVT R0, #0x3419 ; 0x34194250 = .rodata..L.str.98 0x3418B65A: F640 5102 MOVW R1, #0x0D02 0x3418B65E: F002 FB1D BL assert_failed ; 0x3418DC9C
.L3: 0x3418B662: 9807 LDR R0, [SP, #28] 0x3418B664: 6800 LDR R0, [R0] 0x3418B666: 6800 LDR R0, [R0] 0x3418B668: F020 4040 BIC R0, R0, #0xC0000000 0x3418B66C: 9906 LDR R1, [SP, #24] 0x3418B66E: 6849 LDR R1, [R1, #4] 0x3418B670: 4308 ORRS R0, R1 0x3418B672: 9907 LDR R1, [SP, #28] 0x3418B674: 6809 LDR R1, [R1] 0x3418B676: 6008 STR R0, [R1]
.L4: 0x3418B678: 9806 LDR R0, [SP, #24] 0x3418B67A: 6800 LDR R0, [R0] 0x3418B67C: 2802 CMP R0, #2 0x3418B67E: D114 BNE 46L5 ; 0x3418B6AA 0x3418B680: 9807 LDR R0, [SP, #28] 0x3418B682: 6800 LDR R0, [R0] 0x3418B684: F500 70C0 ADD.W R0, R0, #0x0180 0x3418B688: 9004 STR R0, [SP, #16] 0x3418B68A: 9807 LDR R0, [SP, #28] 0x3418B68C: 6800 LDR R0, [R0] 0x3418B68E: F500 70C4 ADD.W R0, R0, #0x0188 0x3418B692: 9003 STR R0, [SP, #12] 0x3418B694: 9807 LDR R0, [SP, #28] 0x3418B696: 6800 LDR R0, [R0] 0x3418B698: F500 70C8 ADD.W R0, R0, #0x0190 0x3418B69C: 9002 STR R0, [SP, #8] 0x3418B69E: 9807 LDR R0, [SP, #28] 0x3418B6A0: 6800 LDR R0, [R0] 0x3418B6A2: F500 70D0 ADD.W R0, R0, #0x01A0 0x3418B6A6: 9001 STR R0, [SP, #4] 0x3418B6A8: E02C B 46L7 ; 0x3418B704
.L5: 0x3418B6AA: 9806 LDR R0, [SP, #24] 0x3418B6AC: 6800 LDR R0, [R0] 0x3418B6AE: 2803 CMP R0, #3 0x3418B6B0: D114 BNE 46L6 ; 0x3418B6DC 0x3418B6B2: 9807 LDR R0, [SP, #28] 0x3418B6B4: 6800 LDR R0, [R0] 0x3418B6B6: F500 70A0 ADD.W R0, R0, #0x0140 0x3418B6BA: 9004 STR R0, [SP, #16] 0x3418B6BC: 9807 LDR R0, [SP, #28] 0x3418B6BE: 6800 LDR R0, [R0] 0x3418B6C0: F500 70A4 ADD.W R0, R0, #0x0148 0x3418B6C4: 9003 STR R0, [SP, #12] 0x3418B6C6: 9807 LDR R0, [SP, #28] 0x3418B6C8: 6800 LDR R0, [R0] 0x3418B6CA: F500 70A8 ADD.W R0, R0, #0x0150 0x3418B6CE: 9002 STR R0, [SP, #8] 0x3418B6D0: 9807 LDR R0, [SP, #28] 0x3418B6D2: 6800 LDR R0, [R0] 0x3418B6D4: F500 70B0 ADD.W R0, R0, #0x0160 0x3418B6D8: 9001 STR R0, [SP, #4] 0x3418B6DA: E013 B 46L7 ; 0x3418B704
.L6: 0x3418B6DC: 9807 LDR R0, [SP, #28] 0x3418B6DE: 6800 LDR R0, [R0] 0x3418B6E0: F500 7080 ADD.W R0, R0, #0x0100 0x3418B6E4: 9004 STR R0, [SP, #16] 0x3418B6E6: 9807 LDR R0, [SP, #28] 0x3418B6E8: 6800 LDR R0, [R0] 0x3418B6EA: F500 7084 ADD.W R0, R0, #0x0108 0x3418B6EE: 9003 STR R0, [SP, #12] 0x3418B6F0: 9807 LDR R0, [SP, #28] 0x3418B6F2: 6800 LDR R0, [R0] 0x3418B6F4: F500 7088 ADD.W R0, R0, #0x0110 0x3418B6F8: 9002 STR R0, [SP, #8] 0x3418B6FA: 9807 LDR R0, [SP, #28] 0x3418B6FC: 6800 LDR R0, [R0] 0x3418B6FE: F500 7090 ADD.W R0, R0, #0x0120 0x3418B702: 9001 STR R0, [SP, #4]
.L7: 0x3418B704: 9806 LDR R0, [SP, #24] 0x3418B706: 6C80 LDR R0, [R0, #72] 0x3418B708: 9904 LDR R1, [SP, #16] 0x3418B70A: 6008 STR R0, [R1] 0x3418B70C: 9806 LDR R0, [SP, #24] 0x3418B70E: 6AC0 LDR R0, [R0, #44] 0x3418B710: B180 CBZ R0, .L8 ; 0x3418B734 0x3418B712: 9806 LDR R0, [SP, #24] 0x3418B714: 6A80 LDR R0, [R0, #40] 0x3418B716: 9901 LDR R1, [SP, #4] 0x3418B718: 6008 STR R0, [R1] 0x3418B71A: 9804 LDR R0, [SP, #16] 0x3418B71C: 6800 LDR R0, [R0] 0x3418B71E: F420 107C BIC R0, R0, #0x3F0000 0x3418B722: 9B06 LDR R3, [SP, #24] 0x3418B724: 6AD9 LDR R1, [R3, #44] 0x3418B726: 6B1A LDR R2, [R3, #48] 0x3418B728: 6B5B LDR R3, [R3, #52] 0x3418B72A: 4319 ORRS R1, R3 0x3418B72C: 4311 ORRS R1, R2 0x3418B72E: 4308 ORRS R0, R1 0x3418B730: 9904 LDR R1, [SP, #16] 0x3418B732: 6008 STR R0, [R1]
.L8: 0x3418B734: 9803 LDR R0, [SP, #12] 0x3418B736: 6800 LDR R0, [R0] 0x3418B738: F020 001F BIC R0, R0, #31 0x3418B73C: 9906 LDR R1, [SP, #24] 0x3418B73E: 6C49 LDR R1, [R1, #68] 0x3418B740: 4308 ORRS R0, R1 0x3418B742: 9903 LDR R1, [SP, #12] 0x3418B744: 6008 STR R0, [R1] 0x3418B746: 9806 LDR R0, [SP, #24] 0x3418B748: 6B80 LDR R0, [R0, #56] 0x3418B74A: B140 CBZ R0, .L9 ; 0x3418B75E 0x3418B74C: 9806 LDR R0, [SP, #24] 0x3418B74E: 6800 LDR R0, [R0] 0x3418B750: B928 CBNZ R0, .L9 ; 0x3418B75E 0x3418B752: 9806 LDR R0, [SP, #24] 0x3418B754: 6BC0 LDR R0, [R0, #60] 0x3418B756: 3801 SUBS R0, #1 0x3418B758: 9907 LDR R1, [SP, #28] 0x3418B75A: 6809 LDR R1, [R1] 0x3418B75C: 6408 STR R0, [R1, #64]
.L9: 0x3418B75E: 9806 LDR R0, [SP, #24] 0x3418B760: 6B80 LDR R0, [R0, #56] 0x3418B762: B1D8 CBZ R0, .L11 ; 0x3418B79C 0x3418B764: 9806 LDR R0, [SP, #24] 0x3418B766: 6C00 LDR R0, [R0, #64] 0x3418B768: F1B0 6F00 CMP.W R0, #0x08000000 0x3418B76C: D108 BNE 46L10 ; 0x3418B780 0x3418B76E: 9807 LDR R0, [SP, #28] 0x3418B770: 6801 LDR R1, [R0] 0x3418B772: F8D1 0108 LDR.W R0, [R1, #0x0108] 0x3418B776: F020 4080 BIC R0, R0, #0x40000000 0x3418B77A: F8C1 0108 STR.W R0, [R1, #0x0108] 0x3418B77E: E00D B 46L11 ; 0x3418B79C
.L10: 0x3418B780: 9807 LDR R0, [SP, #28] 0x3418B782: 6A80 LDR R0, [R0, #40] 0x3418B784: F1B0 4F80 CMP.W R0, #0x40000000 0x3418B788: D108 BNE 46L11 ; 0x3418B79C 0x3418B78A: 9807 LDR R0, [SP, #28] 0x3418B78C: 6801 LDR R1, [R0] 0x3418B78E: F8D1 0108 LDR.W R0, [R1, #0x0108] 0x3418B792: F040 4080 ORR R0, R0, #0x40000000 0x3418B796: F8C1 0108 STR.W R0, [R1, #0x0108] 0x3418B79A: E7FF B 46L11 ; 0x3418B79C
.L11: 0x3418B79C: 9806 LDR R0, [SP, #24] 0x3418B79E: 68C0 LDR R0, [R0, #12] 0x3418B7A0: 2800 CMP R0, #0 0x3418B7A2: F000 808A BEQ.W 46L20 ; 0x3418B8BA 0x3418B7A6: 9806 LDR R0, [SP, #24] 0x3418B7A8: 69C0 LDR R0, [R0, #28] 0x3418B7AA: 2800 CMP R0, #0 0x3418B7AC: D057 BEQ 46L16 ; 0x3418B85E 0x3418B7AE: 9806 LDR R0, [SP, #24] 0x3418B7B0: 6B80 LDR R0, [R0, #56] 0x3418B7B2: B1F8 CBZ R0, .L12 ; 0x3418B7F4 0x3418B7B4: 9804 LDR R0, [SP, #16] 0x3418B7B6: 6800 LDR R0, [R0] 0x3418B7B8: F24C 01C0 MOVW R1, #0xC0C0 0x3418B7BC: F2CF 01FF MOVT R1, #0xF0FF 0x3418B7C0: 4008 ANDS R0, R1 0x3418B7C2: 9A06 LDR R2, [SP, #24] 0x3418B7C4: 9200 STR R2, [SP, #0] 0x3418B7C6: 68D1 LDR R1, [R2, #12] 0x3418B7C8: F8D2 C010 LDR.W R12, [R2, #16] 0x3418B7CC: F8D2 E014 LDR.W LR, [R2, #20] 0x3418B7D0: 69D3 LDR R3, [R2, #28] 0x3418B7D2: EA41 010E ORR.W R1, R1, LR 0x3418B7D6: EA41 010C ORR.W R1, R1, R12 0x3418B7DA: 4319 ORRS R1, R3 0x3418B7DC: 6A53 LDR R3, [R2, #36] 0x3418B7DE: 4319 ORRS R1, R3 0x3418B7E0: 6A13 LDR R3, [R2, #32] 0x3418B7E2: 4319 ORRS R1, R3 0x3418B7E4: 6B93 LDR R3, [R2, #56] 0x3418B7E6: 4319 ORRS R1, R3 0x3418B7E8: 6C12 LDR R2, [R2, #64] 0x3418B7EA: 4311 ORRS R1, R2 0x3418B7EC: 4308 ORRS R0, R1 0x3418B7EE: 9904 LDR R1, [SP, #16] 0x3418B7F0: 6008 STR R0, [R1] 0x3418B7F2: E017 B 46L13 ; 0x3418B824
.L12: 0x3418B7F4: 9804 LDR R0, [SP, #16] 0x3418B7F6: 6800 LDR R0, [R0] 0x3418B7F8: F643 713F MOVW R1, #0x3F3F 0x3418B7FC: 4388 BICS R0, R1 0x3418B7FE: 9A06 LDR R2, [SP, #24] 0x3418B800: 68D1 LDR R1, [R2, #12] 0x3418B802: F8D2 C010 LDR.W R12, [R2, #16] 0x3418B806: F8D2 E014 LDR.W LR, [R2, #20] 0x3418B80A: 69D3 LDR R3, [R2, #28] 0x3418B80C: EA41 010E ORR.W R1, R1, LR 0x3418B810: EA41 010C ORR.W R1, R1, R12 0x3418B814: 4319 ORRS R1, R3 0x3418B816: 6A53 LDR R3, [R2, #36] 0x3418B818: 4319 ORRS R1, R3 0x3418B81A: 6A12 LDR R2, [R2, #32] 0x3418B81C: 4311 ORRS R1, R2 0x3418B81E: 4308 ORRS R0, R1 0x3418B820: 9904 LDR R1, [SP, #16] 0x3418B822: 6008 STR R0, [R1]
.L13: 0x3418B824: 9806 LDR R0, [SP, #24] 0x3418B826: 6880 LDR R0, [R0, #8] 0x3418B828: 9902 LDR R1, [SP, #8] 0x3418B82A: 6008 STR R0, [R1] 0x3418B82C: 9806 LDR R0, [SP, #24] 0x3418B82E: 6980 LDR R0, [R0, #24] 0x3418B830: 9907 LDR R1, [SP, #28] 0x3418B832: 6809 LDR R1, [R1] 0x3418B834: 6488 STR R0, [R1, #72] 0x3418B836: 9806 LDR R0, [SP, #24] 0x3418B838: 6800 LDR R0, [R0] 0x3418B83A: B978 CBNZ R0, .L15 ; 0x3418B85C 0x3418B83C: 9807 LDR R0, [SP, #28] 0x3418B83E: 6800 LDR R0, [R0] 0x3418B840: 6C80 LDR R0, [R0, #72] 0x3418B842: 9906 LDR R1, [SP, #24] 0x3418B844: 6989 LDR R1, [R1, #24] 0x3418B846: 4288 CMP R0, R1 0x3418B848: D100 BNE 46L14 ; 0x3418B84C 0x3418B84A: E007 B 46L15 ; 0x3418B85C
.L14: 0x3418B84C: F244 2050 MOVW R0, #0x4250 ; 0x34194250 = .rodata..L.str.98 0x3418B850: F2C3 4019 MOVT R0, #0x3419 ; 0x34194250 = .rodata..L.str.98 0x3418B854: F640 516B MOVW R1, #0x0D6B 0x3418B858: F002 FA20 BL assert_failed ; 0x3418DC9C
.L15: 0x3418B85C: E02C B 46L19 ; 0x3418B8B8
.L16: 0x3418B85E: 9806 LDR R0, [SP, #24] 0x3418B860: 6B80 LDR R0, [R0, #56] 0x3418B862: B1C0 CBZ R0, .L17 ; 0x3418B896 0x3418B864: 9804 LDR R0, [SP, #16] 0x3418B866: 6800 LDR R0, [R0] 0x3418B868: F64F 71C0 MOVW R1, #0xFFC0 0x3418B86C: F2CF 01FF MOVT R1, #0xF0FF 0x3418B870: 4008 ANDS R0, R1 0x3418B872: 9A06 LDR R2, [SP, #24] 0x3418B874: 68D1 LDR R1, [R2, #12] 0x3418B876: F8D2 C010 LDR.W R12, [R2, #16] 0x3418B87A: F8D2 E014 LDR.W LR, [R2, #20] 0x3418B87E: 6B93 LDR R3, [R2, #56] 0x3418B880: EA41 010E ORR.W R1, R1, LR 0x3418B884: EA41 010C ORR.W R1, R1, R12 0x3418B888: 4319 ORRS R1, R3 0x3418B88A: 6C12 LDR R2, [R2, #64] 0x3418B88C: 4311 ORRS R1, R2 0x3418B88E: 4308 ORRS R0, R1 0x3418B890: 9904 LDR R1, [SP, #16] 0x3418B892: 6008 STR R0, [R1] 0x3418B894: E00C B 46L18 ; 0x3418B8B0
.L17: 0x3418B896: 9804 LDR R0, [SP, #16] 0x3418B898: 6800 LDR R0, [R0] 0x3418B89A: F020 003F BIC R0, R0, #63 0x3418B89E: 9B06 LDR R3, [SP, #24] 0x3418B8A0: 68D9 LDR R1, [R3, #12] 0x3418B8A2: 691A LDR R2, [R3, #16] 0x3418B8A4: 695B LDR R3, [R3, #20] 0x3418B8A6: 4319 ORRS R1, R3 0x3418B8A8: 4311 ORRS R1, R2 0x3418B8AA: 4308 ORRS R0, R1 0x3418B8AC: 9904 LDR R1, [SP, #16] 0x3418B8AE: 6008 STR R0, [R1]
.L18: 0x3418B8B0: 9806 LDR R0, [SP, #24] 0x3418B8B2: 6880 LDR R0, [R0, #8] 0x3418B8B4: 9902 LDR R1, [SP, #8] 0x3418B8B6: 6008 STR R0, [R1]
.L19: 0x3418B8B8: E04B B 46L26 ; 0x3418B952
.L20: 0x3418B8BA: 9806 LDR R0, [SP, #24] 0x3418B8BC: 69C0 LDR R0, [R0, #28] 0x3418B8BE: 2800 CMP R0, #0 0x3418B8C0: D041 BEQ 46L25 ; 0x3418B946 0x3418B8C2: 9806 LDR R0, [SP, #24] 0x3418B8C4: 6B80 LDR R0, [R0, #56] 0x3418B8C6: B1C0 CBZ R0, .L21 ; 0x3418B8FA 0x3418B8C8: 9804 LDR R0, [SP, #16] 0x3418B8CA: 6800 LDR R0, [R0] 0x3418B8CC: F24C 01FF MOVW R1, #0xC0FF 0x3418B8D0: F2CF 01FF MOVT R1, #0xF0FF 0x3418B8D4: 4008 ANDS R0, R1 0x3418B8D6: 9A06 LDR R2, [SP, #24] 0x3418B8D8: 69D1 LDR R1, [R2, #28] 0x3418B8DA: F8D2 C020 LDR.W R12, [R2, #32] 0x3418B8DE: F8D2 E024 LDR.W LR, [R2, #36] 0x3418B8E2: 6B93 LDR R3, [R2, #56] 0x3418B8E4: EA41 010E ORR.W R1, R1, LR 0x3418B8E8: EA41 010C ORR.W R1, R1, R12 0x3418B8EC: 4319 ORRS R1, R3 0x3418B8EE: 6C12 LDR R2, [R2, #64] 0x3418B8F0: 4311 ORRS R1, R2 0x3418B8F2: 4308 ORRS R0, R1 0x3418B8F4: 9904 LDR R1, [SP, #16] 0x3418B8F6: 6008 STR R0, [R1] 0x3418B8F8: E00C B 46L22 ; 0x3418B914
.L21: 0x3418B8FA: 9804 LDR R0, [SP, #16] 0x3418B8FC: 6800 LDR R0, [R0] 0x3418B8FE: F420 507C BIC R0, R0, #0x3F00 0x3418B902: 9B06 LDR R3, [SP, #24] 0x3418B904: 69D9 LDR R1, [R3, #28] 0x3418B906: 6A1A LDR R2, [R3, #32] 0x3418B908: 6A5B LDR R3, [R3, #36] 0x3418B90A: 4319 ORRS R1, R3 0x3418B90C: 4311 ORRS R1, R2 0x3418B90E: 4308 ORRS R0, R1 0x3418B910: 9904 LDR R1, [SP, #16] 0x3418B912: 6008 STR R0, [R1]
.L22: 0x3418B914: 9806 LDR R0, [SP, #24] 0x3418B916: 6980 LDR R0, [R0, #24] 0x3418B918: 9907 LDR R1, [SP, #28] 0x3418B91A: 6809 LDR R1, [R1] 0x3418B91C: 6488 STR R0, [R1, #72] 0x3418B91E: 9806 LDR R0, [SP, #24] 0x3418B920: 6800 LDR R0, [R0] 0x3418B922: B978 CBNZ R0, .L24 ; 0x3418B944 0x3418B924: 9807 LDR R0, [SP, #28] 0x3418B926: 6800 LDR R0, [R0] 0x3418B928: 6C80 LDR R0, [R0, #72] 0x3418B92A: 9906 LDR R1, [SP, #24] 0x3418B92C: 6989 LDR R1, [R1, #24] 0x3418B92E: 4288 CMP R0, R1 0x3418B930: D100 BNE 46L23 ; 0x3418B934 0x3418B932: E007 B 46L24 ; 0x3418B944
.L23: 0x3418B934: F244 2050 MOVW R0, #0x4250 ; 0x34194250 = .rodata..L.str.98 0x3418B938: F2C3 4019 MOVT R0, #0x3419 ; 0x34194250 = .rodata..L.str.98 0x3418B93C: F640 51A5 MOVW R1, #0x0DA5 0x3418B940: F002 F9AC BL assert_failed ; 0x3418DC9C
.L24: 0x3418B944: E005 B 46L26 ; 0x3418B952
.L25: 0x3418B946: 2001 MOVS R0, #1 0x3418B948: F88D 0017 STRB.W R0, [SP, #23] 0x3418B94C: 9907 LDR R1, [SP, #28] 0x3418B94E: 2008 MOVS R0, #8 0x3418B950: 65C8 STR R0, [R1, #92]
.L26: 0x3418B952: 9806 LDR R0, [SP, #24] 0x3418B954: 6B80 LDR R0, [R0, #56] 0x3418B956: B1C8 CBZ R0, .L28 ; 0x3418B98C 0x3418B958: 9806 LDR R0, [SP, #24] 0x3418B95A: 6800 LDR R0, [R0] 0x3418B95C: B9B0 CBNZ R0, .L28 ; 0x3418B98C 0x3418B95E: 9806 LDR R0, [SP, #24] 0x3418B960: 6BC0 LDR R0, [R0, #60] 0x3418B962: 3801 SUBS R0, #1 0x3418B964: 9907 LDR R1, [SP, #28] 0x3418B966: 6809 LDR R1, [R1] 0x3418B968: 6408 STR R0, [R1, #64] 0x3418B96A: 9807 LDR R0, [SP, #28] 0x3418B96C: 6800 LDR R0, [R0] 0x3418B96E: 6C00 LDR R0, [R0, #64] 0x3418B970: 9906 LDR R1, [SP, #24] 0x3418B972: 6BC9 LDR R1, [R1, #60] 0x3418B974: 3901 SUBS R1, #1 0x3418B976: 4288 CMP R0, R1 0x3418B978: D100 BNE 46L27 ; 0x3418B97C 0x3418B97A: E007 B 46L28 ; 0x3418B98C
.L27: 0x3418B97C: F244 2050 MOVW R0, #0x4250 ; 0x34194250 = .rodata..L.str.98 0x3418B980: F2C3 4019 MOVT R0, #0x3419 ; 0x34194250 = .rodata..L.str.98 0x3418B984: F640 51B8 MOVW R1, #0x0DB8 0x3418B988: F002 F988 BL assert_failed ; 0x3418DC9C
.L28: 0x3418B98C: F89D 0017 LDRB.W R0, [SP, #23] 0x3418B990: B008 ADD SP, SP, #32 0x3418B992: BD80 POP 123R7, PC}

Section .text.HAL_XSPI_Receive from blto2_FSBL_lto.o, size=300, align=4


HAL_XSPI_Receive: 0x3418B994: B580 PUSH 123R7, LR} 0x3418B996: B08A SUB SP, SP, #40 0x3418B998: 9009 STR R0, [SP, #36] 0x3418B99A: 9108 STR R1, [SP, #32] 0x3418B99C: 9207 STR R2, [SP, #28] 0x3418B99E: F7F5 FF75 BL HAL_GetTick ; 0x3418188C 0x3418B9A2: 9005 STR R0, [SP, #20] 0x3418B9A4: 9809 LDR R0, [SP, #36] 0x3418B9A6: 6800 LDR R0, [R0] 0x3418B9A8: 3050 ADDS R0, #80 0x3418B9AA: 9004 STR R0, [SP, #16] 0x3418B9AC: 9809 LDR R0, [SP, #36] 0x3418B9AE: 6800 LDR R0, [R0] 0x3418B9B0: 6C80 LDR R0, [R0, #72] 0x3418B9B2: 9003 STR R0, [SP, #12] 0x3418B9B4: 9809 LDR R0, [SP, #36] 0x3418B9B6: 6800 LDR R0, [R0] 0x3418B9B8: F8D0 0110 LDR.W R0, [R0, #0x0110] 0x3418B9BC: 9002 STR R0, [SP, #8] 0x3418B9BE: 9808 LDR R0, [SP, #32] 0x3418B9C0: B930 CBNZ R0, .L1 ; 0x3418B9D0 0x3418B9C2: 2001 MOVS R0, #1 0x3418B9C4: F88D 001B STRB.W R0, [SP, #27] 0x3418B9C8: 9909 LDR R1, [SP, #36] 0x3418B9CA: 2008 MOVS R0, #8 0x3418B9CC: 65C8 STR R0, [R1, #92] 0x3418B9CE: E073 B 46L9 ; 0x3418BAB8
.L1: 0x3418B9D0: 9809 LDR R0, [SP, #36] 0x3418B9D2: 6D80 LDR R0, [R0, #88] 0x3418B9D4: 2804 CMP R0, #4 0x3418B9D6: D169 BNE 46L8 ; 0x3418BAAC 0x3418B9D8: 9809 LDR R0, [SP, #36] 0x3418B9DA: 6800 LDR R0, [R0] 0x3418B9DC: 6C00 LDR R0, [R0, #64] 0x3418B9DE: 3001 ADDS R0, #1 0x3418B9E0: 9909 LDR R1, [SP, #36] 0x3418B9E2: 64C8 STR R0, [R1, #76] 0x3418B9E4: 9809 LDR R0, [SP, #36] 0x3418B9E6: 6CC0 LDR R0, [R0, #76] 0x3418B9E8: 9909 LDR R1, [SP, #36] 0x3418B9EA: 6488 STR R0, [R1, #72] 0x3418B9EC: 9808 LDR R0, [SP, #32] 0x3418B9EE: 9909 LDR R1, [SP, #36] 0x3418B9F0: 6448 STR R0, [R1, #68] 0x3418B9F2: 9809 LDR R0, [SP, #36] 0x3418B9F4: 6800 LDR R0, [R0] 0x3418B9F6: 6800 LDR R0, [R0] 0x3418B9F8: 2101 MOVS R1, #1 0x3418B9FA: F361 701D BFI R0, R1, #28, #2 0x3418B9FE: 9909 LDR R1, [SP, #36] 0x3418BA00: 6809 LDR R1, [R1] 0x3418BA02: 6008 STR R0, [R1] 0x3418BA04: 9809 LDR R0, [SP, #36] 0x3418BA06: 68C0 LDR R0, [R0, #12] 0x3418BA08: F1B0 6F80 CMP.W R0, #0x04000000 0x3418BA0C: D104 BNE 46L2 ; 0x3418BA18 0x3418BA0E: 9803 LDR R0, [SP, #12] 0x3418BA10: 9909 LDR R1, [SP, #36] 0x3418BA12: 6809 LDR R1, [R1] 0x3418BA14: 6488 STR R0, [R1, #72] 0x3418BA16: E010 B 46L4 ; 0x3418BA3A
.L2: 0x3418BA18: 9809 LDR R0, [SP, #36] 0x3418BA1A: 6800 LDR R0, [R0] 0x3418BA1C: F8D0 0100 LDR.W R0, [R0, #0x0100] 0x3418BA20: F410 6FE0 TST R0, #0x0700 0x3418BA24: D004 BEQ 46L3 ; 0x3418BA30 0x3418BA26: 9803 LDR R0, [SP, #12] 0x3418BA28: 9909 LDR R1, [SP, #36] 0x3418BA2A: 6809 LDR R1, [R1] 0x3418BA2C: 6488 STR R0, [R1, #72] 0x3418BA2E: E004 B 46L4 ; 0x3418BA3A
.L3: 0x3418BA30: 9802 LDR R0, [SP, #8] 0x3418BA32: 9909 LDR R1, [SP, #36] 0x3418BA34: 6809 LDR R1, [R1] 0x3418BA36: F8C1 0110 STR.W R0, [R1, #0x0110]
.L4: 0x3418BA3A: 9809 LDR R0, [SP, #36] 0x3418BA3C: 9B05 LDR R3, [SP, #20] 0x3418BA3E: 9907 LDR R1, [SP, #28] 0x3418BA40: 466A MOV R2, SP 0x3418BA42: 6011 STR R1, [R2] 0x3418BA44: 2106 MOVS R1, #6 0x3418BA46: 2201 MOVS R2, #1 0x3418BA48: F7FF FDA2 BL XSPI_WaitFlagStateUntilTimeout ; 0x3418B590 0x3418BA4C: F88D 001B STRB.W R0, [SP, #27] 0x3418BA50: F89D 001B LDRB.W R0, [SP, #27] 0x3418BA54: B100 CBZ R0, .L5 ; 0x3418BA58 0x3418BA56: E011 B 46L6 ; 0x3418BA7C
.L5: 0x3418BA58: 9804 LDR R0, [SP, #16] 0x3418BA5A: 7800 LDRB R0, [R0] 0x3418BA5C: 9909 LDR R1, [SP, #36] 0x3418BA5E: 6C49 LDR R1, [R1, #68] 0x3418BA60: 7008 STRB R0, [R1] 0x3418BA62: 9909 LDR R1, [SP, #36] 0x3418BA64: 6C48 LDR R0, [R1, #68] 0x3418BA66: 3001 ADDS R0, #1 0x3418BA68: 6448 STR R0, [R1, #68] 0x3418BA6A: 9909 LDR R1, [SP, #36] 0x3418BA6C: 6CC8 LDR R0, [R1, #76] 0x3418BA6E: 3801 SUBS R0, #1 0x3418BA70: 64C8 STR R0, [R1, #76] 0x3418BA72: 9809 LDR R0, [SP, #36] 0x3418BA74: 6CC0 LDR R0, [R0, #76] 0x3418BA76: B108 CBZ R0, .L6 ; 0x3418BA7C 0x3418BA78: F02F C821 LE 46L4 ; 0x3418BA3A
.L6: 0x3418BA7C: F89D 001B LDRB.W R0, [SP, #27] 0x3418BA80: B998 CBNZ R0, .L7 ; 0x3418BAAA 0x3418BA82: 9809 LDR R0, [SP, #36] 0x3418BA84: 9B05 LDR R3, [SP, #20] 0x3418BA86: 9907 LDR R1, [SP, #28] 0x3418BA88: 466A MOV R2, SP 0x3418BA8A: 6011 STR R1, [R2] 0x3418BA8C: 2102 MOVS R1, #2 0x3418BA8E: 2201 MOVS R2, #1 0x3418BA90: F7FF FD7E BL XSPI_WaitFlagStateUntilTimeout ; 0x3418B590 0x3418BA94: F88D 001B STRB.W R0, [SP, #27] 0x3418BA98: F89D 001B LDRB.W R0, [SP, #27] 0x3418BA9C: B928 CBNZ R0, .L7 ; 0x3418BAAA 0x3418BA9E: 9809 LDR R0, [SP, #36] 0x3418BAA0: 6801 LDR R1, [R0] 0x3418BAA2: 2002 MOVS R0, #2 0x3418BAA4: 6248 STR R0, [R1, #36] 0x3418BAA6: 9909 LDR R1, [SP, #36] 0x3418BAA8: 6588 STR R0, [R1, #88]
.L7: 0x3418BAAA: E005 B 46L9 ; 0x3418BAB8
.L8: 0x3418BAAC: 2001 MOVS R0, #1 0x3418BAAE: F88D 001B STRB.W R0, [SP, #27] 0x3418BAB2: 9909 LDR R1, [SP, #36] 0x3418BAB4: 2010 MOVS R0, #16 0x3418BAB6: 65C8 STR R0, [R1, #92]
.L9: 0x3418BAB8: F89D 001B LDRB.W R0, [SP, #27] 0x3418BABC: B00A ADD SP, SP, #40 0x3418BABE: BD80 POP 123R7, PC}

Section .text.LL_AHB5_GRP1_IsEnabledClock from blto2_FSBL_lto.o, size=28, align=4


LL_AHB5_GRP1_IsEnabledClock: 0x3418BAC0: B081 SUB SP, SP, #4 0x3418BAC2: 9000 STR R0, [SP, #0] 0x3418BAC4: F248 2060 MOVW R0, #0x8260 0x3418BAC8: F2C5 6002 MOVT R0, #0x5602 0x3418BACC: 6800 LDR R0, [R0] 0x3418BACE: 43C0 MVNS R0, R0 0x3418BAD0: 9900 LDR R1, [SP, #0] 0x3418BAD2: 4208 TST R0, R1 0x3418BAD4: EA5F 901F CSET R0, EQ 0x3418BAD8: B001 ADD SP, SP, #4 0x3418BADA: 4770 BX LR

Section .text.JumpToApplication from blto2_FSBL_lto.o, size=356, align=4


JumpToApplication: 0x3418BADC: B5D0 PUSH 123R4, R6-R7, LR} 0x3418BADE: AF02 ADD R7, SP, #8 0x3418BAE0: B094 SUB SP, SP, #80 0x3418BAE2: 466C MOV R4, SP 0x3418BAE4: F36F 0404 BFC R4, #0, #5 0x3418BAE8: 46A5 MOV SP, R4 0x3418BAEA: 2000 MOVS R0, #0 0x3418BAEC: A905 ADD R1, SP, #20 0x3418BAEE: F001 FC8F BL EXTMEM_GetMapAddress ; 0x3418D410 0x3418BAF2: B118 CBZ R0, .L1 ; 0x3418BAFC 0x3418BAF4: 2004 MOVS R0, #4 0x3418BAF6: F88D 001F STRB.W R0, [SP, #31] 0x3418BAFA: E09B B 46L8 ; 0x3418BC34
.L1: 0x3418BAFC: F002 FAC6 BL HAL_SuspendTick ; 0x3418E08C 0x3418BB00: F64E 5014 MOVW R0, #0xED14 0x3418BB04: F2CE 0000 MOVT R0, #0xE000 0x3418BB08: 6800 LDR R0, [R0] 0x3418BB0A: 0380 LSLS R0, R0, #14 0x3418BB0C: 2800 CMP R0, #0 0x3418BB0E: D515 BPL 46L2 ; 0x3418BB3C 0x3418BB10: F3BF 8F4F DSB SY 0x3418BB14: F3BF 8F6F ISB SY 0x3418BB18: F64E 5114 MOVW R1, #0xED14 0x3418BB1C: F2CE 0100 MOVT R1, #0xE000 0x3418BB20: 6808 LDR R0, [R1] 0x3418BB22: F420 3000 BIC R0, R0, #0x020000 0x3418BB26: 6008 STR R0, [R1] 0x3418BB28: F64E 7150 MOVW R1, #0xEF50 0x3418BB2C: F2CE 0100 MOVT R1, #0xE000 0x3418BB30: 2000 MOVS R0, #0 0x3418BB32: 6008 STR R0, [R1] 0x3418BB34: F3BF 8F4F DSB SY 0x3418BB38: F3BF 8F6F ISB SY
.L2: 0x3418BB3C: F64E 5014 MOVW R0, #0xED14 0x3418BB40: F2CE 0000 MOVT R0, #0xE000 0x3418BB44: 6800 LDR R0, [R0] 0x3418BB46: 03C0 LSLS R0, R0, #15 0x3418BB48: 2800 CMP R0, #0 0x3418BB4A: D543 BPL 46L7 ; 0x3418BBD4 0x3418BB4C: F64E 5184 MOVW R1, #0xED84 0x3418BB50: F2CE 0100 MOVT R1, #0xE000 0x3418BB54: 2000 MOVS R0, #0 0x3418BB56: 6008 STR R0, [R1] 0x3418BB58: F3BF 8F4F DSB SY 0x3418BB5C: F64E 5114 MOVW R1, #0xED14 0x3418BB60: F2CE 0100 MOVT R1, #0xE000 0x3418BB64: 6808 LDR R0, [R1] 0x3418BB66: F420 3080 BIC R0, R0, #0x010000 0x3418BB6A: 6008 STR R0, [R1] 0x3418BB6C: F3BF 8F4F DSB SY 0x3418BB70: F64E 7170 MOVW R1, #0xEF70 0x3418BB74: F2CE 0100 MOVT R1, #0xE000 0x3418BB78: A808 ADD R0, SP, #32 0x3418BB7A: 6008 STR R0, [R1] 0x3418BB7C: F3BF 8F4F DSB SY 0x3418BB80: F3BF 8F6F ISB SY 0x3418BB84: F64E 5080 MOVW R0, #0xED80 0x3418BB88: F2CE 0000 MOVT R0, #0xE000 0x3418BB8C: 6800 LDR R0, [R0] 0x3418BB8E: 9008 STR R0, [SP, #32] 0x3418BB90: 9808 LDR R0, [SP, #32] 0x3418BB92: F3C0 304E UBFX R0, R0, #13, #15 0x3418BB96: 9009 STR R0, [SP, #36]
.L3: 0x3418BB98: 9808 LDR R0, [SP, #32] 0x3418BB9A: F3C0 00C9 UBFX R0, R0, #3, #10 0x3418BB9E: 900A STR R0, [SP, #40]
.L4: 0x3418BBA0: 9909 LDR R1, [SP, #36] 0x3418BBA2: 980A LDR R0, [SP, #40] 0x3418BBA4: 0780 LSLS R0, R0, #30 0x3418BBA6: F361 104D BFI R0, R1, #5, #9 0x3418BBAA: F64E 7174 MOVW R1, #0xEF74 0x3418BBAE: F2CE 0100 MOVT R1, #0xE000 0x3418BBB2: 6008 STR R0, [R1] 0x3418BBB4: 980A LDR R0, [SP, #40] 0x3418BBB6: 1E41 SUBS R1, R0, #1 0x3418BBB8: 910A STR R1, [SP, #40] 0x3418BBBA: B108 CBZ R0, .L5 ; 0x3418BBC0 0x3418BBBC: F02F C011 LE 46L4 ; 0x3418BBA0
.L5: 0x3418BBC0: 9809 LDR R0, [SP, #36] 0x3418BBC2: 1E41 SUBS R1, R0, #1 0x3418BBC4: 9109 STR R1, [SP, #36] 0x3418BBC6: B108 CBZ R0, .L6 ; 0x3418BBCC 0x3418BBC8: F02F C01B LE 46L3 ; 0x3418BB98
.L6: 0x3418BBCC: F3BF 8F4F DSB SY 0x3418BBD0: F3BF 8F6F ISB SY
.L7: 0x3418BBD4: F3EF 8010 MRS R0, PRIMASK 0x3418BBD8: 9010 STR R0, [SP, #64] 0x3418BBDA: 9810 LDR R0, [SP, #64] 0x3418BBDC: 9006 STR R0, [SP, #24] 0x3418BBDE: B672 CPSID i 0x3418BBE0: 9805 LDR R0, [SP, #20] 0x3418BBE2: F240 4100 MOVW R1, #0x0400 0x3418BBE6: F2C0 0108 MOVT R1, #8 0x3418BBEA: 4408 ADD R0, R1 0x3418BBEC: 9005 STR R0, [SP, #20] 0x3418BBEE: 9805 LDR R0, [SP, #20] 0x3418BBF0: F64E 5108 MOVW R1, #0xED08 0x3418BBF4: F2CE 0100 MOVT R1, #0xE000 0x3418BBF8: 6008 STR R0, [R1] 0x3418BBFA: 9805 LDR R0, [SP, #20] 0x3418BBFC: 6841 LDR R1, [R0, #4] 0x3418BBFE: F240 3054 MOVW R0, #0x0354 ; 0x34000354 = JumpToApplication.JumpToApp 0x3418BC02: F2C3 4000 MOVT R0, #0x3400 ; 0x34000354 = JumpToApplication.JumpToApp 0x3418BC06: 6001 STR R1, [R0] 0x3418BC08: 2100 MOVS R1, #0 0x3418BC0A: 9104 STR R1, [SP, #16] 0x3418BC0C: 9111 STR R1, [SP, #68] 0x3418BC0E: 9911 LDR R1, [SP, #68] 0x3418BC10: F381 880A MSR MSPLIM, R1 0x3418BC14: 9905 LDR R1, [SP, #20] 0x3418BC16: 6809 LDR R1, [R1] 0x3418BC18: 9112 STR R1, [SP, #72] 0x3418BC1A: 9912 LDR R1, [SP, #72] 0x3418BC1C: F381 8808 MSR MSP, R1 0x3418BC20: 9906 LDR R1, [SP, #24] 0x3418BC22: 9113 STR R1, [SP, #76] 0x3418BC24: 9913 LDR R1, [SP, #76] 0x3418BC26: F381 8810 MSR PRIMASK, R1 0x3418BC2A: 6800 LDR R0, [R0] 0x3418BC2C: 4780 BLX R0 0x3418BC2E: 9804 LDR R0, [SP, #16] 0x3418BC30: F88D 001F STRB.W R0, [SP, #31]
.L8: 0x3418BC34: F89D 001F LDRB.W R0, [SP, #31] 0x3418BC38: F1A7 0408 SUB.W R4, R7, #8 0x3418BC3C: 46A5 MOV SP, R4 0x3418BC3E: BDD0 POP 123R4, R6-R7, PC}

Section .text.CheckSFDP_Signature from blto2_FSBL_lto.o, size=80, align=4


CheckSFDP_Signature: 0x3418BC40: B580 PUSH 123R7, LR} 0x3418BC42: B084 SUB SP, SP, #16 0x3418BC44: 9003 STR R0, [SP, #12] 0x3418BC46: 9102 STR R1, [SP, #8] 0x3418BC48: 2004 MOVS R0, #4 0x3418BC4A: F88D 0007 STRB.W R0, [SP, #7] 0x3418BC4E: 9802 LDR R0, [SP, #8] 0x3418BC50: 9000 STR R0, [SP, #0] 0x3418BC52: F245 3146 MOVW R1, #0x5346 0x3418BC56: F2C4 4150 MOVT R1, #0x4450 0x3418BC5A: 4288 CMP R0, R1 0x3418BC5C: D00A BEQ 46L1 ; 0x3418BC74 0x3418BC5E: 9800 LDR R0, [SP, #0] 0x3418BC60: F244 6153 MOVW R1, #0x4653 0x3418BC64: F2C5 0144 MOVT R1, #0x5044 0x3418BC68: 4288 CMP R0, R1 0x3418BC6A: D10D BNE 46L3 ; 0x3418BC88 0x3418BC6C: 2000 MOVS R0, #0 0x3418BC6E: F88D 0007 STRB.W R0, [SP, #7] 0x3418BC72: E009 B 46L3 ; 0x3418BC88
.L1: 0x3418BC74: 9803 LDR R0, [SP, #12] 0x3418BC76: 3008 ADDS R0, #8 0x3418BC78: 2100 MOVS R1, #0 0x3418BC7A: F001 FB49 BL SAL_XSPI_UpdateMemoryType ; 0x3418D310 0x3418BC7E: B910 CBNZ R0, .L2 ; 0x3418BC86 0x3418BC80: 2005 MOVS R0, #5 0x3418BC82: F88D 0007 STRB.W R0, [SP, #7]
.L2: 0x3418BC86: E7FF B 46L3 ; 0x3418BC88
.L3: 0x3418BC88: F89D 0007 LDRB.W R0, [SP, #7] 0x3418BC8C: B004 ADD SP, SP, #16 0x3418BC8E: BD80 POP 123R7, PC}

Section .text.SFDP_GetHeader from blto2_FSBL_lto.o, size=256, align=4


SFDP_GetHeader: 0x3418BC90: B580 PUSH 123R7, LR} 0x3418BC92: B08C SUB SP, SP, #48 0x3418BC94: 900B STR R0, [SP, #44] 0x3418BC96: 910A STR R1, [SP, #40] 0x3418BC98: 2004 MOVS R0, #4 0x3418BC9A: F88D 0027 STRB.W R0, [SP, #39] 0x3418BC9E: F640 200B MOVW R0, #0x0A0B 0x3418BCA2: F2C1 000B MOVT R0, #0x100B 0x3418BCA6: 9008 STR R0, [SP, #32] 0x3418BCA8: F640 000B MOVW R0, #0x080B 0x3418BCAC: F2C1 400B MOVT R0, #0x140B 0x3418BCB0: 9007 STR R0, [SP, #28] 0x3418BCB2: F640 0006 MOVW R0, #0x0806 0x3418BCB6: F2C0 6006 MOVT R0, #0x0606 0x3418BCBA: 9006 STR R0, [SP, #24] 0x3418BCBC: F640 0000 MOVW R0, #0x0800 0x3418BCC0: F2C0 2006 MOVT R0, #0x0206 0x3418BCC4: 9005 STR R0, [SP, #20] 0x3418BCC6: 2000 MOVS R0, #0 0x3418BCC8: F88D 0013 STRB.W R0, [SP, #19]
.L1: 0x3418BCCC: F89D 1013 LDRB.W R1, [SP, #19] 0x3418BCD0: 2000 MOVS R0, #0 0x3418BCD2: 2907 CMP R1, #7 0x3418BCD4: 9003 STR R0, [SP, #12] 0x3418BCD6: D805 BHI 46L2 ; 0x3418BCE4 0x3418BCD8: F89D 0027 LDRB.W R0, [SP, #39] 0x3418BCDC: 2804 CMP R0, #4 0x3418BCDE: EA5F 901F CSET R0, EQ 0x3418BCE2: 9003 STR R0, [SP, #12]
.L2: 0x3418BCE4: 9803 LDR R0, [SP, #12] 0x3418BCE6: 07C0 LSLS R0, R0, #31 0x3418BCE8: 2800 CMP R0, #0 0x3418BCEA: D04D BEQ 46L8 ; 0x3418BD88 0x3418BCEC: F89D 1013 LDRB.W R1, [SP, #19] 0x3418BCF0: A805 ADD R0, SP, #20 0x3418BCF2: 9001 STR R0, [SP, #4] 0x3418BCF4: F810 0011 LDRB.W R0, [R0, R1, LSL #1] 0x3418BCF8: 990B LDR R1, [SP, #44] 0x3418BCFA: F881 0064 STRB.W R0, [R1, #100] 0x3418BCFE: 990B LDR R1, [SP, #44] 0x3418BD00: F101 0008 ADD.W R0, R1, #8 0x3418BD04: F101 0264 ADD.W R2, R1, #100 0x3418BD08: 2100 MOVS R1, #0 0x3418BD0A: 9102 STR R1, [SP, #8] 0x3418BD0C: F007 FB66 BL SAL_XSPI_MemoryConfig ; 0x341933DC 0x3418BD10: 9901 LDR R1, [SP, #4] 0x3418BD12: 9802 LDR R0, [SP, #8] 0x3418BD14: F89D 2013 LDRB.W R2, [SP, #19] 0x3418BD18: EB01 0142 ADD.W R1, R1, R2, LSL #1 0x3418BD1C: 7849 LDRB R1, [R1, #1] 0x3418BD1E: 9A0B LDR R2, [SP, #44] 0x3418BD20: F882 1059 STRB.W R1, [R2, #89] 0x3418BD24: F88D 0012 STRB.W R0, [SP, #18]
.L3: 0x3418BD28: F89D 1012 LDRB.W R1, [SP, #18] 0x3418BD2C: 2000 MOVS R0, #0 0x3418BD2E: 2901 CMP R1, #1 0x3418BD30: 9000 STR R0, [SP, #0] 0x3418BD32: D805 BHI 46L4 ; 0x3418BD40 0x3418BD34: F89D 0027 LDRB.W R0, [SP, #39] 0x3418BD38: 2804 CMP R0, #4 0x3418BD3A: EA5F 901F CSET R0, EQ 0x3418BD3E: 9000 STR R0, [SP, #0]
.L4: 0x3418BD40: 9800 LDR R0, [SP, #0] 0x3418BD42: 07C0 LSLS R0, R0, #31 0x3418BD44: B1D0 CBZ R0, .L7 ; 0x3418BD7C 0x3418BD46: F89D 0012 LDRB.W R0, [SP, #18] 0x3418BD4A: 990B LDR R1, [SP, #44] 0x3418BD4C: F881 0058 STRB.W R0, [R1, #88] 0x3418BD50: 980B LDR R0, [SP, #44] 0x3418BD52: 990A LDR R1, [SP, #40] 0x3418BD54: F006 FE82 BL SFDP_ReadHeader ; 0x34192A5C 0x3418BD58: B910 CBNZ R0, .L5 ; 0x3418BD60 0x3418BD5A: 2000 MOVS R0, #0 0x3418BD5C: F88D 0027 STRB.W R0, [SP, #39]
.L5: 0x3418BD60: F89D 1013 LDRB.W R1, [SP, #19] 0x3418BD64: A805 ADD R0, SP, #20 0x3418BD66: F810 0011 LDRB.W R0, [R0, R1, LSL #1] 0x3418BD6A: 2805 CMP R0, #5 0x3418BD6C: DC00 BGT 46L6 ; 0x3418BD70 0x3418BD6E: E005 B 46L7 ; 0x3418BD7C
.L6: 0x3418BD70: F89D 0012 LDRB.W R0, [SP, #18] 0x3418BD74: 3001 ADDS R0, #1 0x3418BD76: F88D 0012 STRB.W R0, [SP, #18] 0x3418BD7A: E7D5 B 46L3 ; 0x3418BD28
.L7: 0x3418BD7C: F89D 0013 LDRB.W R0, [SP, #19] 0x3418BD80: 3001 ADDS R0, #1 0x3418BD82: F88D 0013 STRB.W R0, [SP, #19] 0x3418BD86: E7A1 B 46L1 ; 0x3418BCCC
.L8: 0x3418BD88: F89D 0027 LDRB.W R0, [SP, #39] 0x3418BD8C: B00C ADD SP, SP, #48 0x3418BD8E: BD80 POP 123R7, PC}

Section .text.sfdp_get_paraminfo from blto2_FSBL_lto.o, size=652, align=4


sfdp_get_paraminfo: 0x3418BD90: B580 PUSH 123R7, LR} 0x3418BD92: B088 SUB SP, SP, #32 0x3418BD94: 9007 STR R0, [SP, #28] 0x3418BD96: 9106 STR R1, [SP, #24] 0x3418BD98: 9205 STR R2, [SP, #20] 0x3418BD9A: 2000 MOVS R0, #0 0x3418BD9C: F88D 0013 STRB.W R0, [SP, #19] 0x3418BDA0: 9003 STR R0, [SP, #12] 0x3418BDA2: 9002 STR R0, [SP, #8] 0x3418BDA4: 9807 LDR R0, [SP, #28] 0x3418BDA6: 3008 ADDS R0, #8 0x3418BDA8: 9906 LDR R1, [SP, #24] 0x3418BDAA: AA02 ADD R2, SP, #8 0x3418BDAC: 2308 MOVS R3, #8 0x3418BDAE: F007 FC63 BL SAL_XSPI_GetSFDP ; 0x34193678 0x3418BDB2: B118 CBZ R0, .L1 ; 0x3418BDBC 0x3418BDB4: 2003 MOVS R0, #3 0x3418BDB6: F88D 0013 STRB.W R0, [SP, #19] 0x3418BDBA: E12B B 46L10 ; 0x3418C014
.L1: 0x3418BDBC: 9905 LDR R1, [SP, #20] 0x3418BDBE: 2000 MOVS R0, #0 0x3418BDC0: 6008 STR R0, [R1] 0x3418BDC2: F89D 000B LDRB.W R0, [SP, #11] 0x3418BDC6: 9905 LDR R1, [SP, #20] 0x3418BDC8: 7208 STRB R0, [R1, #8] 0x3418BDCA: F89D 100C LDRB.W R1, [SP, #12] 0x3418BDCE: F89D 200D LDRB.W R2, [SP, #13] 0x3418BDD2: F89D 000E LDRB.W R0, [SP, #14] 0x3418BDD6: 0400 LSLS R0, R0, #16 0x3418BDD8: EA40 2002 ORR.W R0, R0, R2, LSL #8 0x3418BDDC: 4408 ADD R0, R1 0x3418BDDE: 9905 LDR R1, [SP, #20] 0x3418BDE0: 6048 STR R0, [R1, #4] 0x3418BDE2: F89D 000F LDRB.W R0, [SP, #15] 0x3418BDE6: B178 CBZ R0, .L4 ; 0x3418BE08 0x3418BDE8: F99D 000F LDRSB.W R0, [SP, #15] 0x3418BDEC: 2800 CMP R0, #0 0x3418BDEE: D40B BMI 46L4 ; 0x3418BE08 0x3418BDF0: F89D 0008 LDRB.W R0, [SP, #8] 0x3418BDF4: 07C0 LSLS R0, R0, #31 0x3418BDF6: B118 CBZ R0, .L2 ; 0x3418BE00 0x3418BDF8: 9905 LDR R1, [SP, #20] 0x3418BDFA: 2001 MOVS R0, #1 0x3418BDFC: 6008 STR R0, [R1] 0x3418BDFE: E002 B 46L3 ; 0x3418BE06
.L2: 0x3418BE00: 9905 LDR R1, [SP, #20] 0x3418BE02: 2002 MOVS R0, #2 0x3418BE04: 6008 STR R0, [R1]
.L3: 0x3418BE06: E105 B 46L10 ; 0x3418C014
.L4: 0x3418BE08: F99D 000F LDRSB.W R0, [SP, #15] 0x3418BE0C: F1B0 3FFF CMP.W R0, #0xFFFFFFFF 0x3418BE10: F300 80FC BGT.W 46L9 ; 0x3418C00C 0x3418BE14: F89D 0008 LDRB.W R0, [SP, #8] 0x3418BE18: 07C0 LSLS R0, R0, #31 0x3418BE1A: B910 CBNZ R0, .L5 ; 0x3418BE22 0x3418BE1C: 9905 LDR R1, [SP, #20] 0x3418BE1E: 2004 MOVS R0, #4 0x3418BE20: 6008 STR R0, [R1]
.L5: 0x3418BE22: F89D 000F LDRB.W R0, [SP, #15] 0x3418BE26: 28FF CMP R0, #255 0x3418BE28: F040 80EC BNE.W 46L8 ; 0x3418C004 0x3418BE2C: F89D 0008 LDRB.W R0, [SP, #8] 0x3418BE30: 4601 MOV R1, R0 0x3418BE32: 9101 STR R1, [SP, #4] 0x3418BE34: 288E CMP R0, #142 0x3418BE36: F200 80E5 BHI.W 46L8 ; 0x3418C004 0x3418BE3A: 9901 LDR R1, [SP, #4] 0x3418BE3C: E8DF F011 TBH 91PC, R1, LSL #1] 0x3418BE40: 8F DC.B 0x8F ; '\x8F' 0x3418BE41: 00 DC.B 0x00 ; '\0' 0x3418BE42: E2 DC.B 0xE2 ; '\xE2' 0x3418BE43: 00 DC.B 0x00 ; '\0' 0x3418BE44: E2 DC.B 0xE2 ; '\xE2' 0x3418BE45: 00 DC.B 0x00 ; '\0' 0x3418BE46: A4 DC.B 0xA4 ; '\xA4' 0x3418BE47: 00 DC.B 0x00 ; '\0' 0x3418BE48: E2 DC.B 0xE2 ; '\xE2' 0x3418BE49: 00 DC.B 0x00 ; '\0' 0x3418BE4A: AC DC.B 0xAC ; '\xAC' 0x3418BE4B: 00 DC.B 0x00 ; '\0' 0x3418BE4C: B0 DC.B 0xB0 ; '\xB0' 0x3418BE4D: 00 DC.B 0x00 ; '\0' 0x3418BE4E: E2 DC.B 0xE2 ; '\xE2' 0x3418BE4F: 00 DC.B 0x00 ; '\0' 0x3418BE50: E2 DC.B 0xE2 ; '\xE2' 0x3418BE51: 00 DC.B 0x00 ; '\0' 0x3418BE52: BF DC.B 0xBF ; '\xBF' 0x3418BE53: 00 DC.B 0x00 ; '\0' 0x3418BE54: C4 DC.B 0xC4 ; '\xC4' 0x3418BE55: 00 DC.B 0x00 ; '\0' 0x3418BE56: E2 DC.B 0xE2 ; '\xE2' 0x3418BE57: 00 DC.B 0x00 ; '\0' 0x3418BE58: CE DC.B 0xCE ; '\xCE' 0x3418BE59: 00 DC.B 0x00 ; '\0' 0x3418BE5A: E2 DC.B 0xE2 ; '\xE2' 0x3418BE5B: 00 DC.B 0x00 ; '\0' 0x3418BE5C: E2 DC.B 0xE2 ; '\xE2' 0x3418BE5D: 00 DC.B 0x00 ; '\0' 0x3418BE5E: DD DC.B 0xDD ; '\xDD' 0x3418BE5F: 00 DC.B 0x00 ; '\0' 0x3418BE60: E2 DC.B 0xE2 ; '\xE2' 0x3418BE61: 00 DC.B 0x00 ; '\0' 0x3418BE62: E2 DC.B 0xE2 ; '\xE2' 0x3418BE63: 00 DC.B 0x00 ; '\0' 0x3418BE64: E2 DC.B 0xE2 ; '\xE2' 0x3418BE65: 00 DC.B 0x00 ; '\0' 0x3418BE66: E2 DC.B 0xE2 ; '\xE2' 0x3418BE67: 00 DC.B 0x00 ; '\0' 0x3418BE68: E2 DC.B 0xE2 ; '\xE2' 0x3418BE69: 00 DC.B 0x00 ; '\0' 0x3418BE6A: E2 DC.B 0xE2 ; '\xE2' 0x3418BE6B: 00 DC.B 0x00 ; '\0' 0x3418BE6C: E2 DC.B 0xE2 ; '\xE2' 0x3418BE6D: 00 DC.B 0x00 ; '\0' 0x3418BE6E: E2 DC.B 0xE2 ; '\xE2' 0x3418BE6F: 00 DC.B 0x00 ; '\0' 0x3418BE70: E2 DC.B 0xE2 ; '\xE2' 0x3418BE71: 00 DC.B 0x00 ; '\0' 0x3418BE72: E2 DC.B 0xE2 ; '\xE2' 0x3418BE73: 00 DC.B 0x00 ; '\0' 0x3418BE74: E2 DC.B 0xE2 ; '\xE2' 0x3418BE75: 00 DC.B 0x00 ; '\0' 0x3418BE76: E2 DC.B 0xE2 ; '\xE2' 0x3418BE77: 00 DC.B 0x00 ; '\0' 0x3418BE78: E2 DC.B 0xE2 ; '\xE2' 0x3418BE79: 00 DC.B 0x00 ; '\0' 0x3418BE7A: E2 DC.B 0xE2 ; '\xE2' 0x3418BE7B: 00 DC.B 0x00 ; '\0' 0x3418BE7C: E2 DC.B 0xE2 ; '\xE2' 0x3418BE7D: 00 DC.B 0x00 ; '\0' 0x3418BE7E: E2 DC.B 0xE2 ; '\xE2' 0x3418BE7F: 00 DC.B 0x00 ; '\0' 0x3418BE80: E2 DC.B 0xE2 ; '\xE2' 0x3418BE81: 00 DC.B 0x00 ; '\0' 0x3418BE82: E2 DC.B 0xE2 ; '\xE2' 0x3418BE83: 00 DC.B 0x00 ; '\0' 0x3418BE84: E2 DC.B 0xE2 ; '\xE2' 0x3418BE85: 00 DC.B 0x00 ; '\0' 0x3418BE86: E2 DC.B 0xE2 ; '\xE2' 0x3418BE87: 00 DC.B 0x00 ; '\0' 0x3418BE88: E2 DC.B 0xE2 ; '\xE2' 0x3418BE89: 00 DC.B 0x00 ; '\0' 0x3418BE8A: E2 DC.B 0xE2 ; '\xE2' 0x3418BE8B: 00 DC.B 0x00 ; '\0' 0x3418BE8C: E2 DC.B 0xE2 ; '\xE2' 0x3418BE8D: 00 DC.B 0x00 ; '\0' 0x3418BE8E: E2 DC.B 0xE2 ; '\xE2' 0x3418BE8F: 00 DC.B 0x00 ; '\0' 0x3418BE90: E2 DC.B 0xE2 ; '\xE2' 0x3418BE91: 00 DC.B 0x00 ; '\0' 0x3418BE92: E2 DC.B 0xE2 ; '\xE2' 0x3418BE93: 00 DC.B 0x00 ; '\0' 0x3418BE94: E2 DC.B 0xE2 ; '\xE2' 0x3418BE95: 00 DC.B 0x00 ; '\0' 0x3418BE96: E2 DC.B 0xE2 ; '\xE2' 0x3418BE97: 00 DC.B 0x00 ; '\0' 0x3418BE98: E2 DC.B 0xE2 ; '\xE2' 0x3418BE99: 00 DC.B 0x00 ; '\0' 0x3418BE9A: E2 DC.B 0xE2 ; '\xE2' 0x3418BE9B: 00 DC.B 0x00 ; '\0' 0x3418BE9C: E2 DC.B 0xE2 ; '\xE2' 0x3418BE9D: 00 DC.B 0x00 ; '\0' 0x3418BE9E: E2 DC.B 0xE2 ; '\xE2' 0x3418BE9F: 00 DC.B 0x00 ; '\0' 0x3418BEA0: E2 DC.B 0xE2 ; '\xE2' 0x3418BEA1: 00 DC.B 0x00 ; '\0' 0x3418BEA2: E2 DC.B 0xE2 ; '\xE2' 0x3418BEA3: 00 DC.B 0x00 ; '\0' 0x3418BEA4: E2 DC.B 0xE2 ; '\xE2' 0x3418BEA5: 00 DC.B 0x00 ; '\0' 0x3418BEA6: E2 DC.B 0xE2 ; '\xE2' 0x3418BEA7: 00 DC.B 0x00 ; '\0' 0x3418BEA8: E2 DC.B 0xE2 ; '\xE2' 0x3418BEA9: 00 DC.B 0x00 ; '\0' 0x3418BEAA: E2 DC.B 0xE2 ; '\xE2' 0x3418BEAB: 00 DC.B 0x00 ; '\0' 0x3418BEAC: E2 DC.B 0xE2 ; '\xE2' 0x3418BEAD: 00 DC.B 0x00 ; '\0' 0x3418BEAE: E2 DC.B 0xE2 ; '\xE2' 0x3418BEAF: 00 DC.B 0x00 ; '\0' 0x3418BEB0: E2 DC.B 0xE2 ; '\xE2' 0x3418BEB1: 00 DC.B 0x00 ; '\0' 0x3418BEB2: E2 DC.B 0xE2 ; '\xE2' 0x3418BEB3: 00 DC.B 0x00 ; '\0' 0x3418BEB4: E2 DC.B 0xE2 ; '\xE2' 0x3418BEB5: 00 DC.B 0x00 ; '\0' 0x3418BEB6: E2 DC.B 0xE2 ; '\xE2' 0x3418BEB7: 00 DC.B 0x00 ; '\0' 0x3418BEB8: E2 DC.B 0xE2 ; '\xE2' 0x3418BEB9: 00 DC.B 0x00 ; '\0' 0x3418BEBA: E2 DC.B 0xE2 ; '\xE2' 0x3418BEBB: 00 DC.B 0x00 ; '\0' 0x3418BEBC: E2 DC.B 0xE2 ; '\xE2' 0x3418BEBD: 00 DC.B 0x00 ; '\0' 0x3418BEBE: E2 DC.B 0xE2 ; '\xE2' 0x3418BEBF: 00 DC.B 0x00 ; '\0' 0x3418BEC0: E2 DC.B 0xE2 ; '\xE2' 0x3418BEC1: 00 DC.B 0x00 ; '\0' 0x3418BEC2: E2 DC.B 0xE2 ; '\xE2' 0x3418BEC3: 00 DC.B 0x00 ; '\0' 0x3418BEC4: E2 DC.B 0xE2 ; '\xE2' 0x3418BEC5: 00 DC.B 0x00 ; '\0' 0x3418BEC6: E2 DC.B 0xE2 ; '\xE2' 0x3418BEC7: 00 DC.B 0x00 ; '\0' 0x3418BEC8: E2 DC.B 0xE2 ; '\xE2' 0x3418BEC9: 00 DC.B 0x00 ; '\0' 0x3418BECA: E2 DC.B 0xE2 ; '\xE2' 0x3418BECB: 00 DC.B 0x00 ; '\0' 0x3418BECC: E2 DC.B 0xE2 ; '\xE2' 0x3418BECD: 00 DC.B 0x00 ; '\0' 0x3418BECE: E2 DC.B 0xE2 ; '\xE2' 0x3418BECF: 00 DC.B 0x00 ; '\0' 0x3418BED0: E2 DC.B 0xE2 ; '\xE2' 0x3418BED1: 00 DC.B 0x00 ; '\0' 0x3418BED2: E2 DC.B 0xE2 ; '\xE2' 0x3418BED3: 00 DC.B 0x00 ; '\0' 0x3418BED4: E2 DC.B 0xE2 ; '\xE2' 0x3418BED5: 00 DC.B 0x00 ; '\0' 0x3418BED6: E2 DC.B 0xE2 ; '\xE2' 0x3418BED7: 00 DC.B 0x00 ; '\0' 0x3418BED8: E2 DC.B 0xE2 ; '\xE2' 0x3418BED9: 00 DC.B 0x00 ; '\0' 0x3418BEDA: E2 DC.B 0xE2 ; '\xE2' 0x3418BEDB: 00 DC.B 0x00 ; '\0' 0x3418BEDC: E2 DC.B 0xE2 ; '\xE2' 0x3418BEDD: 00 DC.B 0x00 ; '\0' 0x3418BEDE: E2 DC.B 0xE2 ; '\xE2' 0x3418BEDF: 00 DC.B 0x00 ; '\0' 0x3418BEE0: E2 DC.B 0xE2 ; '\xE2' 0x3418BEE1: 00 DC.B 0x00 ; '\0' 0x3418BEE2: E2 DC.B 0xE2 ; '\xE2' 0x3418BEE3: 00 DC.B 0x00 ; '\0' 0x3418BEE4: E2 DC.B 0xE2 ; '\xE2' 0x3418BEE5: 00 DC.B 0x00 ; '\0' 0x3418BEE6: E2 DC.B 0xE2 ; '\xE2' 0x3418BEE7: 00 DC.B 0x00 ; '\0' 0x3418BEE8: E2 DC.B 0xE2 ; '\xE2' 0x3418BEE9: 00 DC.B 0x00 ; '\0' 0x3418BEEA: E2 DC.B 0xE2 ; '\xE2' 0x3418BEEB: 00 DC.B 0x00 ; '\0' 0x3418BEEC: E2 DC.B 0xE2 ; '\xE2' 0x3418BEED: 00 DC.B 0x00 ; '\0' 0x3418BEEE: E2 DC.B 0xE2 ; '\xE2' 0x3418BEEF: 00 DC.B 0x00 ; '\0' 0x3418BEF0: E2 DC.B 0xE2 ; '\xE2' 0x3418BEF1: 00 DC.B 0x00 ; '\0' 0x3418BEF2: E2 DC.B 0xE2 ; '\xE2' 0x3418BEF3: 00 DC.B 0x00 ; '\0' 0x3418BEF4: E2 DC.B 0xE2 ; '\xE2' 0x3418BEF5: 00 DC.B 0x00 ; '\0' 0x3418BEF6: E2 DC.B 0xE2 ; '\xE2' 0x3418BEF7: 00 DC.B 0x00 ; '\0' 0x3418BEF8: E2 DC.B 0xE2 ; '\xE2' 0x3418BEF9: 00 DC.B 0x00 ; '\0' 0x3418BEFA: E2 DC.B 0xE2 ; '\xE2' 0x3418BEFB: 00 DC.B 0x00 ; '\0' 0x3418BEFC: E2 DC.B 0xE2 ; '\xE2' 0x3418BEFD: 00 DC.B 0x00 ; '\0' 0x3418BEFE: E2 DC.B 0xE2 ; '\xE2' 0x3418BEFF: 00 DC.B 0x00 ; '\0' 0x3418BF00: E2 DC.B 0xE2 ; '\xE2' 0x3418BF01: 00 DC.B 0x00 ; '\0' 0x3418BF02: E2 DC.B 0xE2 ; '\xE2' 0x3418BF03: 00 DC.B 0x00 ; '\0' 0x3418BF04: E2 DC.B 0xE2 ; '\xE2' 0x3418BF05: 00 DC.B 0x00 ; '\0' 0x3418BF06: E2 DC.B 0xE2 ; '\xE2' 0x3418BF07: 00 DC.B 0x00 ; '\0' 0x3418BF08: E2 DC.B 0xE2 ; '\xE2' 0x3418BF09: 00 DC.B 0x00 ; '\0' 0x3418BF0A: E2 DC.B 0xE2 ; '\xE2' 0x3418BF0B: 00 DC.B 0x00 ; '\0' 0x3418BF0C: E2 DC.B 0xE2 ; '\xE2' 0x3418BF0D: 00 DC.B 0x00 ; '\0' 0x3418BF0E: E2 DC.B 0xE2 ; '\xE2' 0x3418BF0F: 00 DC.B 0x00 ; '\0' 0x3418BF10: E2 DC.B 0xE2 ; '\xE2' 0x3418BF11: 00 DC.B 0x00 ; '\0' 0x3418BF12: E2 DC.B 0xE2 ; '\xE2' 0x3418BF13: 00 DC.B 0x00 ; '\0' 0x3418BF14: E2 DC.B 0xE2 ; '\xE2' 0x3418BF15: 00 DC.B 0x00 ; '\0' 0x3418BF16: E2 DC.B 0xE2 ; '\xE2' 0x3418BF17: 00 DC.B 0x00 ; '\0' 0x3418BF18: E2 DC.B 0xE2 ; '\xE2' 0x3418BF19: 00 DC.B 0x00 ; '\0' 0x3418BF1A: E2 DC.B 0xE2 ; '\xE2' 0x3418BF1B: 00 DC.B 0x00 ; '\0' 0x3418BF1C: E2 DC.B 0xE2 ; '\xE2' 0x3418BF1D: 00 DC.B 0x00 ; '\0' 0x3418BF1E: E2 DC.B 0xE2 ; '\xE2' 0x3418BF1F: 00 DC.B 0x00 ; '\0' 0x3418BF20: E2 DC.B 0xE2 ; '\xE2' 0x3418BF21: 00 DC.B 0x00 ; '\0' 0x3418BF22: E2 DC.B 0xE2 ; '\xE2' 0x3418BF23: 00 DC.B 0x00 ; '\0' 0x3418BF24: E2 DC.B 0xE2 ; '\xE2' 0x3418BF25: 00 DC.B 0x00 ; '\0' 0x3418BF26: E2 DC.B 0xE2 ; '\xE2' 0x3418BF27: 00 DC.B 0x00 ; '\0' 0x3418BF28: E2 DC.B 0xE2 ; '\xE2' 0x3418BF29: 00 DC.B 0x00 ; '\0' 0x3418BF2A: E2 DC.B 0xE2 ; '\xE2' 0x3418BF2B: 00 DC.B 0x00 ; '\0' 0x3418BF2C: E2 DC.B 0xE2 ; '\xE2' 0x3418BF2D: 00 DC.B 0x00 ; '\0' 0x3418BF2E: E2 DC.B 0xE2 ; '\xE2' 0x3418BF2F: 00 DC.B 0x00 ; '\0' 0x3418BF30: E2 DC.B 0xE2 ; '\xE2' 0x3418BF31: 00 DC.B 0x00 ; '\0' 0x3418BF32: E2 DC.B 0xE2 ; '\xE2' 0x3418BF33: 00 DC.B 0x00 ; '\0' 0x3418BF34: E2 DC.B 0xE2 ; '\xE2' 0x3418BF35: 00 DC.B 0x00 ; '\0' 0x3418BF36: E2 DC.B 0xE2 ; '\xE2' 0x3418BF37: 00 DC.B 0x00 ; '\0' 0x3418BF38: E2 DC.B 0xE2 ; '\xE2' 0x3418BF39: 00 DC.B 0x00 ; '\0' 0x3418BF3A: E2 DC.B 0xE2 ; '\xE2' 0x3418BF3B: 00 DC.B 0x00 ; '\0' 0x3418BF3C: E2 DC.B 0xE2 ; '\xE2' 0x3418BF3D: 00 DC.B 0x00 ; '\0' 0x3418BF3E: E2 DC.B 0xE2 ; '\xE2' 0x3418BF3F: 00 DC.B 0x00 ; '\0' 0x3418BF40: E2 DC.B 0xE2 ; '\xE2' 0x3418BF41: 00 DC.B 0x00 ; '\0' 0x3418BF42: A0 DC.B 0xA0 ; '\xA0' 0x3418BF43: 00 DC.B 0x00 ; '\0' 0x3418BF44: E2 DC.B 0xE2 ; '\xE2' 0x3418BF45: 00 DC.B 0x00 ; '\0' 0x3418BF46: E2 DC.B 0xE2 ; '\xE2' 0x3418BF47: 00 DC.B 0x00 ; '\0' 0x3418BF48: A8 DC.B 0xA8 ; '\xA8' 0x3418BF49: 00 DC.B 0x00 ; '\0' 0x3418BF4A: E2 DC.B 0xE2 ; '\xE2' 0x3418BF4B: 00 DC.B 0x00 ; '\0' 0x3418BF4C: E2 DC.B 0xE2 ; '\xE2' 0x3418BF4D: 00 DC.B 0x00 ; '\0' 0x3418BF4E: B5 DC.B 0xB5 ; '\xB5' 0x3418BF4F: 00 DC.B 0x00 ; '\0' 0x3418BF50: BA DC.B 0xBA ; '\xBA' 0x3418BF51: 00 DC.B 0x00 ; '\0' 0x3418BF52: E2 DC.B 0xE2 ; '\xE2' 0x3418BF53: 00 DC.B 0x00 ; '\0' 0x3418BF54: E2 DC.B 0xE2 ; '\xE2' 0x3418BF55: 00 DC.B 0x00 ; '\0' 0x3418BF56: C9 DC.B 0xC9 ; '\xC9' 0x3418BF57: 00 DC.B 0x00 ; '\0' 0x3418BF58: E2 DC.B 0xE2 ; '\xE2' 0x3418BF59: 00 DC.B 0x00 ; '\0' 0x3418BF5A: D3 DC.B 0xD3 ; '\xD3' 0x3418BF5B: 00 DC.B 0x00 ; '\0' 0x3418BF5C: D8 DC.B 0xD8 ; '\xD8' 0x3418BF5D: 00 DC.B 0x00 ; '\0' 0x3418BF5E: 9905 LDR R1, [SP, #20] 0x3418BF60: 2008 MOVS R0, #8 0x3418BF62: 6008 STR R0, [R1] 0x3418BF64: F89D 000B LDRB.W R0, [SP, #11] 0x3418BF68: 2816 CMP R0, #22 0x3418BF6A: D803 BHI 46L6 ; 0x3418BF74 0x3418BF6C: F89D 000B LDRB.W R0, [SP, #11] 0x3418BF70: 9000 STR R0, [SP, #0] 0x3418BF72: E001 B 46L7 ; 0x3418BF78
.L6: 0x3418BF74: 2017 MOVS R0, #23 0x3418BF76: 9000 STR R0, [SP, #0]
.L7: 0x3418BF78: 9800 LDR R0, [SP, #0] 0x3418BF7A: 9905 LDR R1, [SP, #20] 0x3418BF7C: 7208 STRB R0, [R1, #8] 0x3418BF7E: E041 B 46L8 ; 0x3418C004 0x3418BF80: 9905 LDR R1, [SP, #20] 0x3418BF82: 2010 MOVS R0, #16 0x3418BF84: 6008 STR R0, [R1] 0x3418BF86: E03D B 46L8 ; 0x3418C004 0x3418BF88: 9905 LDR R1, [SP, #20] 0x3418BF8A: 2020 MOVS R0, #32 0x3418BF8C: 6008 STR R0, [R1] 0x3418BF8E: E039 B 46L8 ; 0x3418C004 0x3418BF90: 9905 LDR R1, [SP, #20] 0x3418BF92: 2040 MOVS R0, #64 0x3418BF94: 6008 STR R0, [R1] 0x3418BF96: E035 B 46L8 ; 0x3418C004 0x3418BF98: 9905 LDR R1, [SP, #20] 0x3418BF9A: 2080 MOVS R0, #128 0x3418BF9C: 6008 STR R0, [R1] 0x3418BF9E: E031 B 46L8 ; 0x3418C004 0x3418BFA0: 9905 LDR R1, [SP, #20] 0x3418BFA2: F44F 7080 MOV.W R0, #0x0100 0x3418BFA6: 6008 STR R0, [R1] 0x3418BFA8: E02C B 46L8 ; 0x3418C004 0x3418BFAA: 9905 LDR R1, [SP, #20] 0x3418BFAC: F44F 7000 MOV.W R0, #0x0200 0x3418BFB0: 6008 STR R0, [R1] 0x3418BFB2: E027 B 46L8 ; 0x3418C004 0x3418BFB4: 9905 LDR R1, [SP, #20] 0x3418BFB6: F44F 6080 MOV.W R0, #0x0400 0x3418BFBA: 6008 STR R0, [R1] 0x3418BFBC: E022 B 46L8 ; 0x3418C004 0x3418BFBE: 9905 LDR R1, [SP, #20] 0x3418BFC0: F44F 6000 MOV.W R0, #0x0800 0x3418BFC4: 6008 STR R0, [R1] 0x3418BFC6: E01D B 46L8 ; 0x3418C004 0x3418BFC8: 9905 LDR R1, [SP, #20] 0x3418BFCA: F44F 5080 MOV.W R0, #0x1000 0x3418BFCE: 6008 STR R0, [R1] 0x3418BFD0: E018 B 46L8 ; 0x3418C004 0x3418BFD2: 9905 LDR R1, [SP, #20] 0x3418BFD4: F44F 5000 MOV.W R0, #0x2000 0x3418BFD8: 6008 STR R0, [R1] 0x3418BFDA: E013 B 46L8 ; 0x3418C004 0x3418BFDC: 9905 LDR R1, [SP, #20] 0x3418BFDE: F44F 4080 MOV.W R0, #0x4000 0x3418BFE2: 6008 STR R0, [R1] 0x3418BFE4: E00E B 46L8 ; 0x3418C004 0x3418BFE6: 9905 LDR R1, [SP, #20] 0x3418BFE8: F44F 4000 MOV.W R0, #0x8000 0x3418BFEC: 6008 STR R0, [R1] 0x3418BFEE: E009 B 46L8 ; 0x3418C004 0x3418BFF0: 9905 LDR R1, [SP, #20] 0x3418BFF2: F44F 3080 MOV.W R0, #0x010000 0x3418BFF6: 6008 STR R0, [R1] 0x3418BFF8: E004 B 46L8 ; 0x3418C004 0x3418BFFA: 9905 LDR R1, [SP, #20] 0x3418BFFC: F44F 3000 MOV.W R0, #0x020000 0x3418C000: 6008 STR R0, [R1] 0x3418C002: E7FF B 46L8 ; 0x3418C004
.L8: 0x3418C004: 9805 LDR R0, [SP, #20] 0x3418C006: 6800 LDR R0, [R0] 0x3418C008: BF00 NOP 0x3418C00A: E003 B 46L10 ; 0x3418C014
.L9: 0x3418C00C: 2003 MOVS R0, #3 0x3418C00E: F88D 0013 STRB.W R0, [SP, #19] 0x3418C012: E7FF B 46L10 ; 0x3418C014
.L10: 0x3418C014: F89D 0013 LDRB.W R0, [SP, #19] 0x3418C018: B008 ADD SP, SP, #32 0x3418C01A: BD80 POP 123R7, PC}

Section .text.SFDP_BuildGenericDriver from blto2_FSBL_lto.o, size=3092, align=4


SFDP_BuildGenericDriver: 0x3418C01C: B5B0 PUSH 123R4-R5, R7, LR} 0x3418C01E: B08E SUB SP, SP, #56 0x3418C020: 900C STR R0, [SP, #48] 0x3418C022: 910B STR R1, [SP, #44] 0x3418C024: 2000 MOVS R0, #0 0x3418C026: F88D 002B STRB.W R0, [SP, #43] 0x3418C02A: F88D 002A STRB.W R0, [SP, #42] 0x3418C02E: 980C LDR R0, [SP, #48] 0x3418C030: F8D0 0094 LDR.W R0, [R0, #148] 0x3418C034: F000 0008 AND R0, R0, #8 0x3418C038: 2808 CMP R0, #8 0x3418C03A: D004 BEQ 46L1 ; 0x3418C046 0x3418C03C: 2007 MOVS R0, #7 0x3418C03E: F88D 002B STRB.W R0, [SP, #43] 0x3418C042: F000 BDF1 B.W 46L83 ; 0x3418CC28
.L1: 0x3418C046: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C04A: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C04E: 7AC0 LDRB R0, [R0, #11] 0x3418C050: 0600 LSLS R0, R0, #24 0x3418C052: 2800 CMP R0, #0 0x3418C054: D40F BMI 46L2 ; 0x3418C076 0x3418C056: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C05A: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C05E: 6880 LDR R0, [R0, #8] 0x3418C060: 3001 ADDS R0, #1 0x3418C062: 900D STR R0, [SP, #52] 0x3418C064: 980D LDR R0, [SP, #52] 0x3418C066: FAB0 F080 CLZ R0, R0 0x3418C06A: F1C0 001F RSB R0, R0, #31 0x3418C06E: 990C LDR R1, [SP, #48] 0x3418C070: F881 005E STRB.W R0, [R1, #94] 0x3418C074: E007 B 46L3 ; 0x3418C086
.L2: 0x3418C076: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C07A: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C07E: 6880 LDR R0, [R0, #8] 0x3418C080: 990C LDR R1, [SP, #48] 0x3418C082: F881 005E STRB.W R0, [R1, #94]
.L3: 0x3418C086: 990C LDR R1, [SP, #48] 0x3418C088: F891 005E LDRB.W R0, [R1, #94] 0x3418C08C: 3803 SUBS R0, #3 0x3418C08E: F881 005E STRB.W R0, [R1, #94] 0x3418C092: 980C LDR R0, [SP, #48] 0x3418C094: F890 005E LDRB.W R0, [R0, #94] 0x3418C098: 3801 SUBS R0, #1 0x3418C09A: F88D 001F STRB.W R0, [SP, #31] 0x3418C09E: 980C LDR R0, [SP, #48] 0x3418C0A0: 3008 ADDS R0, #8 0x3418C0A2: 2104 MOVS R1, #4 0x3418C0A4: F10D 021F ADD.W R2, SP, #31 0x3418C0A8: F007 F998 BL SAL_XSPI_MemoryConfig ; 0x341933DC 0x3418C0AC: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C0B0: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C0B4: 9004 STR R0, [SP, #16] 0x3418C0B6: 6AC1 LDR R1, [R0, #44] 0x3418C0B8: F3C1 1203 UBFX R2, R1, #4, #4 0x3418C0BC: 2101 MOVS R1, #1 0x3418C0BE: 4091 LSLS R1, R2 0x3418C0C0: 9A0C LDR R2, [SP, #48] 0x3418C0C2: 6611 STR R1, [R2, #96] 0x3418C0C4: 9A0C LDR R2, [SP, #48] 0x3418C0C6: 2102 MOVS R1, #2 0x3418C0C8: F882 1075 STRB.W R1, [R2, #117] 0x3418C0CC: 6A01 LDR R1, [R0, #32] 0x3418C0CE: 9A0C LDR R2, [SP, #48] 0x3418C0D0: F882 1077 STRB.W R1, [R2, #119] 0x3418C0D4: 6A01 LDR R1, [R0, #32] 0x3418C0D6: 0A09 LSRS R1, R1, #8 0x3418C0D8: 9A0C LDR R2, [SP, #48] 0x3418C0DA: F882 1078 STRB.W R1, [R2, #120] 0x3418C0DE: 8C41 LDRH R1, [R0, #34] 0x3418C0E0: 9A0C LDR R2, [SP, #48] 0x3418C0E2: F882 1079 STRB.W R1, [R2, #121] 0x3418C0E6: F890 1023 LDRB.W R1, [R0, #35] 0x3418C0EA: 9A0C LDR R2, [SP, #48] 0x3418C0EC: F882 107A STRB.W R1, [R2, #122] 0x3418C0F0: 6A41 LDR R1, [R0, #36] 0x3418C0F2: 9A0C LDR R2, [SP, #48] 0x3418C0F4: F882 107B STRB.W R1, [R2, #123] 0x3418C0F8: 6A41 LDR R1, [R0, #36] 0x3418C0FA: 0A09 LSRS R1, R1, #8 0x3418C0FC: 9A0C LDR R2, [SP, #48] 0x3418C0FE: F882 107C STRB.W R1, [R2, #124] 0x3418C102: 8CC1 LDRH R1, [R0, #38] 0x3418C104: 9A0C LDR R2, [SP, #48] 0x3418C106: F882 107D STRB.W R1, [R2, #125] 0x3418C10A: F890 0027 LDRB.W R0, [R0, #39] 0x3418C10E: 990C LDR R1, [SP, #48] 0x3418C110: F881 007E STRB.W R0, [R1, #126] 0x3418C114: 980C LDR R0, [SP, #48] 0x3418C116: F890 0077 LDRB.W R0, [R0, #119] 0x3418C11A: B1B0 CBZ R0, .L4 ; 0x3418C14A 0x3418C11C: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C120: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C124: 6A81 LDR R1, [R0, #40] 0x3418C126: F001 000F AND R0, R1, #15 0x3418C12A: F3C1 1204 UBFX R2, R1, #4, #5 0x3418C12E: 3201 ADDS R2, #1 0x3418C130: 4350 MULS R0, R2, R0 0x3418C132: F3C1 2241 UBFX R2, R1, #9, #2 0x3418C136: F643 5140 MOVW R1, #0x3D40 ; 0x34193D40 = SFDP_BuildGenericDriver.block_erase_unit 0x3418C13A: F2C3 4119 MOVT R1, #0x3419 ; 0x34193D40 = SFDP_BuildGenericDriver.block_erase_unit 0x3418C13E: F831 1012 LDRH.W R1, [R1, R2, LSL #1] 0x3418C142: 4348 MULS R0, R1, R0 0x3418C144: 990C LDR R1, [SP, #48] 0x3418C146: F8C1 0080 STR.W R0, [R1, #128]
.L4: 0x3418C14A: 980C LDR R0, [SP, #48] 0x3418C14C: F890 0079 LDRB.W R0, [R0, #121] 0x3418C150: B1B0 CBZ R0, .L5 ; 0x3418C180 0x3418C152: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C156: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C15A: 6A81 LDR R1, [R0, #40] 0x3418C15C: F001 000F AND R0, R1, #15 0x3418C160: F3C1 22C4 UBFX R2, R1, #11, #5 0x3418C164: 3201 ADDS R2, #1 0x3418C166: 4350 MULS R0, R2, R0 0x3418C168: F3C1 4201 UBFX R2, R1, #16, #2 0x3418C16C: F643 5140 MOVW R1, #0x3D40 ; 0x34193D40 = SFDP_BuildGenericDriver.block_erase_unit 0x3418C170: F2C3 4119 MOVT R1, #0x3419 ; 0x34193D40 = SFDP_BuildGenericDriver.block_erase_unit 0x3418C174: F831 1012 LDRH.W R1, [R1, R2, LSL #1] 0x3418C178: 4348 MULS R0, R1, R0 0x3418C17A: 990C LDR R1, [SP, #48] 0x3418C17C: F8C1 0084 STR.W R0, [R1, #132]
.L5: 0x3418C180: 980C LDR R0, [SP, #48] 0x3418C182: F890 007B LDRB.W R0, [R0, #123] 0x3418C186: B1B0 CBZ R0, .L6 ; 0x3418C1B6 0x3418C188: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C18C: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C190: 6A81 LDR R1, [R0, #40] 0x3418C192: F001 000F AND R0, R1, #15 0x3418C196: F3C1 4284 UBFX R2, R1, #18, #5 0x3418C19A: 3201 ADDS R2, #1 0x3418C19C: 4350 MULS R0, R2, R0 0x3418C19E: F3C1 52C1 UBFX R2, R1, #23, #2 0x3418C1A2: F643 5140 MOVW R1, #0x3D40 ; 0x34193D40 = SFDP_BuildGenericDriver.block_erase_unit 0x3418C1A6: F2C3 4119 MOVT R1, #0x3419 ; 0x34193D40 = SFDP_BuildGenericDriver.block_erase_unit 0x3418C1AA: F831 1012 LDRH.W R1, [R1, R2, LSL #1] 0x3418C1AE: 4348 MULS R0, R1, R0 0x3418C1B0: 990C LDR R1, [SP, #48] 0x3418C1B2: F8C1 0088 STR.W R0, [R1, #136]
.L6: 0x3418C1B6: 980C LDR R0, [SP, #48] 0x3418C1B8: F890 007D LDRB.W R0, [R0, #125] 0x3418C1BC: B1A8 CBZ R0, .L7 ; 0x3418C1EA 0x3418C1BE: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C1C2: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C1C6: 6A81 LDR R1, [R0, #40] 0x3418C1C8: F001 000F AND R0, R1, #15 0x3418C1CC: F3C1 6244 UBFX R2, R1, #25, #5 0x3418C1D0: 3201 ADDS R2, #1 0x3418C1D2: 4350 MULS R0, R2, R0 0x3418C1D4: 0F8A LSRS R2, R1, #30 0x3418C1D6: F643 5140 MOVW R1, #0x3D40 ; 0x34193D40 = SFDP_BuildGenericDriver.block_erase_unit 0x3418C1DA: F2C3 4119 MOVT R1, #0x3419 ; 0x34193D40 = SFDP_BuildGenericDriver.block_erase_unit 0x3418C1DE: F831 1012 LDRH.W R1, [R1, R2, LSL #1] 0x3418C1E2: 4348 MULS R0, R1, R0 0x3418C1E4: 990C LDR R1, [SP, #48] 0x3418C1E6: F8C1 008C STR.W R0, [R1, #140]
.L7: 0x3418C1EA: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C1EE: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C1F2: 6A81 LDR R1, [R0, #40] 0x3418C1F4: 6AC2 LDR R2, [R0, #44] 0x3418C1F6: F001 010F AND R1, R1, #15 0x3418C1FA: F3C2 6304 UBFX R3, R2, #24, #5 0x3418C1FE: 3301 ADDS R3, #1 0x3418C200: 4359 MULS R1, R3, R1 0x3418C202: F3C2 7341 UBFX R3, R2, #29, #2 0x3418C206: F24D 42D4 MOVW R2, #0xD4D4 ; 0x3418D4D4 = SFDP_BuildGenericDriver.chip_erase_unit 0x3418C20A: F2C3 4218 MOVT R2, #0x3418 ; 0x3418D4D4 = SFDP_BuildGenericDriver.chip_erase_unit 0x3418C20E: F852 2023 LDR.W R2, [R2, R3, LSL #2] 0x3418C212: 4351 MULS R1, R2, R1 0x3418C214: 9A0C LDR R2, [SP, #48] 0x3418C216: F8C2 1090 STR.W R1, [R2, #144] 0x3418C21A: 9A0C LDR R2, [SP, #48] 0x3418C21C: 2105 MOVS R1, #5 0x3418C21E: F882 1071 STRB.W R1, [R2, #113] 0x3418C222: 9A0C LDR R2, [SP, #48] 0x3418C224: F882 106C STRB.W R1, [R2, #108] 0x3418C228: 6840 LDR R0, [R0, #4] 0x3418C22A: 0900 LSRS R0, R0, #4 0x3418C22C: 07C0 LSLS R0, R0, #31 0x3418C22E: B920 CBNZ R0, .L8 ; 0x3418C23A 0x3418C230: 990C LDR R1, [SP, #48] 0x3418C232: 2050 MOVS R0, #80 0x3418C234: F881 0070 STRB.W R0, [R1, #112] 0x3418C238: E003 B 46L9 ; 0x3418C242
.L8: 0x3418C23A: 990C LDR R1, [SP, #48] 0x3418C23C: 2006 MOVS R0, #6 0x3418C23E: F881 0070 STRB.W R0, [R1, #112]
.L9: 0x3418C242: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C246: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C24A: F890 0040 LDRB.W R0, [R0, #64] 0x3418C24E: 07C0 LSLS R0, R0, #31 0x3418C250: B120 CBZ R0, .L10 ; 0x3418C25C 0x3418C252: 990C LDR R1, [SP, #48] 0x3418C254: 2006 MOVS R0, #6 0x3418C256: F881 0070 STRB.W R0, [R1, #112] 0x3418C25A: E03C B 46L15 ; 0x3418C2D6
.L10: 0x3418C25C: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C260: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C264: F890 0040 LDRB.W R0, [R0, #64] 0x3418C268: 0780 LSLS R0, R0, #30 0x3418C26A: 2800 CMP R0, #0 0x3418C26C: D504 BPL 46L11 ; 0x3418C278 0x3418C26E: 990C LDR R1, [SP, #48] 0x3418C270: 2006 MOVS R0, #6 0x3418C272: F881 0070 STRB.W R0, [R1, #112] 0x3418C276: E02E B 46L15 ; 0x3418C2D6
.L11: 0x3418C278: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C27C: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C280: F890 0040 LDRB.W R0, [R0, #64] 0x3418C284: 0740 LSLS R0, R0, #29 0x3418C286: 2800 CMP R0, #0 0x3418C288: D504 BPL 46L12 ; 0x3418C294 0x3418C28A: 990C LDR R1, [SP, #48] 0x3418C28C: 2050 MOVS R0, #80 0x3418C28E: F881 0070 STRB.W R0, [R1, #112] 0x3418C292: E020 B 46L15 ; 0x3418C2D6
.L12: 0x3418C294: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C298: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C29C: F890 0040 LDRB.W R0, [R0, #64] 0x3418C2A0: 0700 LSLS R0, R0, #28 0x3418C2A2: 2800 CMP R0, #0 0x3418C2A4: D504 BPL 46L13 ; 0x3418C2B0 0x3418C2A6: 990C LDR R1, [SP, #48] 0x3418C2A8: 2006 MOVS R0, #6 0x3418C2AA: F881 0070 STRB.W R0, [R1, #112] 0x3418C2AE: E012 B 46L15 ; 0x3418C2D6
.L13: 0x3418C2B0: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C2B4: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C2B8: F890 0040 LDRB.W R0, [R0, #64] 0x3418C2BC: 06C0 LSLS R0, R0, #27 0x3418C2BE: 2800 CMP R0, #0 0x3418C2C0: D504 BPL 46L14 ; 0x3418C2CC 0x3418C2C2: 990C LDR R1, [SP, #48] 0x3418C2C4: 2006 MOVS R0, #6 0x3418C2C6: F881 0070 STRB.W R0, [R1, #112] 0x3418C2CA: E004 B 46L15 ; 0x3418C2D6
.L14: 0x3418C2CC: 200A MOVS R0, #10 0x3418C2CE: F88D 002B STRB.W R0, [SP, #43] 0x3418C2D2: F000 BCA9 B.W 46L83 ; 0x3418CC28
.L15: 0x3418C2D6: 980C LDR R0, [SP, #48] 0x3418C2D8: F890 0095 LDRB.W R0, [R0, #149] 0x3418C2DC: 0780 LSLS R0, R0, #30 0x3418C2DE: 2800 CMP R0, #0 0x3418C2E0: D56A BPL 46L20 ; 0x3418C3B8 0x3418C2E2: F240 10CC MOVW R0, #0x01CC ; 0x340001CC = JEDEC_SCCR_Map 0x3418C2E6: F2C3 4000 MOVT R0, #0x3400 ; 0x340001CC = JEDEC_SCCR_Map 0x3418C2EA: 6900 LDR R0, [R0, #16] 0x3418C2EC: 0FC0 LSRS R0, R0, #31 0x3418C2EE: B368 CBZ R0, .L17 ; 0x3418C34C 0x3418C2F0: F240 10CC MOVW R0, #0x01CC ; 0x340001CC = JEDEC_SCCR_Map 0x3418C2F4: F2C3 4000 MOVT R0, #0x3400 ; 0x340001CC = JEDEC_SCCR_Map 0x3418C2F8: 6901 LDR R1, [R0, #16] 0x3418C2FA: 0A09 LSRS R1, R1, #8 0x3418C2FC: 9A0C LDR R2, [SP, #48] 0x3418C2FE: F882 106C STRB.W R1, [R2, #108] 0x3418C302: 7CC1 LDRB R1, [R0, #19] 0x3418C304: F001 0107 AND R1, R1, #7 0x3418C308: 9A0C LDR R2, [SP, #48] 0x3418C30A: F882 106D STRB.W R1, [R2, #109] 0x3418C30E: 6901 LDR R1, [R0, #16] 0x3418C310: F3C1 7180 UBFX R1, R1, #30, #1 0x3418C314: 9A0C LDR R2, [SP, #48] 0x3418C316: F882 106E STRB.W R1, [R2, #110] 0x3418C31A: 7CC1 LDRB R1, [R0, #19] 0x3418C31C: F001 0107 AND R1, R1, #7 0x3418C320: 9A0C LDR R2, [SP, #48] 0x3418C322: F882 106D STRB.W R1, [R2, #109] 0x3418C326: 6900 LDR R0, [R0, #16] 0x3418C328: 0F00 LSRS R0, R0, #28 0x3418C32A: 07C0 LSLS R0, R0, #31 0x3418C32C: B150 CBZ R0, .L16 ; 0x3418C344 0x3418C32E: F240 10CC MOVW R0, #0x01CC ; 0x340001CC = JEDEC_SCCR_Map 0x3418C332: F2C3 4000 MOVT R0, #0x3400 ; 0x340001CC = JEDEC_SCCR_Map 0x3418C336: 6900 LDR R0, [R0, #16] 0x3418C338: F3C0 60C0 UBFX R0, R0, #27, #1 0x3418C33C: 990C LDR R1, [SP, #48] 0x3418C33E: F881 006F STRB.W R0, [R1, #111] 0x3418C342: E003 B 46L17 ; 0x3418C34C
.L16: 0x3418C344: 990C LDR R1, [SP, #48] 0x3418C346: 20FF MOVS R0, #255 0x3418C348: F881 006F STRB.W R0, [R1, #111]
.L17: 0x3418C34C: F240 10CC MOVW R0, #0x01CC ; 0x340001CC = JEDEC_SCCR_Map 0x3418C350: F2C3 4000 MOVT R0, #0x3400 ; 0x340001CC = JEDEC_SCCR_Map 0x3418C354: 6940 LDR R0, [R0, #20] 0x3418C356: 0FC0 LSRS R0, R0, #31 0x3418C358: B368 CBZ R0, .L19 ; 0x3418C3B6 0x3418C35A: F240 10CC MOVW R0, #0x01CC ; 0x340001CC = JEDEC_SCCR_Map 0x3418C35E: F2C3 4000 MOVT R0, #0x3400 ; 0x340001CC = JEDEC_SCCR_Map 0x3418C362: 6941 LDR R1, [R0, #20] 0x3418C364: 0A09 LSRS R1, R1, #8 0x3418C366: 9A0C LDR R2, [SP, #48] 0x3418C368: F882 1071 STRB.W R1, [R2, #113] 0x3418C36C: 7DC1 LDRB R1, [R0, #23] 0x3418C36E: F001 0107 AND R1, R1, #7 0x3418C372: 9A0C LDR R2, [SP, #48] 0x3418C374: F882 1072 STRB.W R1, [R2, #114] 0x3418C378: 6941 LDR R1, [R0, #20] 0x3418C37A: F3C1 7180 UBFX R1, R1, #30, #1 0x3418C37E: 9A0C LDR R2, [SP, #48] 0x3418C380: F882 1073 STRB.W R1, [R2, #115] 0x3418C384: 7DC1 LDRB R1, [R0, #23] 0x3418C386: F001 0107 AND R1, R1, #7 0x3418C38A: 9A0C LDR R2, [SP, #48] 0x3418C38C: F882 1072 STRB.W R1, [R2, #114] 0x3418C390: 6900 LDR R0, [R0, #16] 0x3418C392: 0F00 LSRS R0, R0, #28 0x3418C394: 07C0 LSLS R0, R0, #31 0x3418C396: B150 CBZ R0, .L18 ; 0x3418C3AE 0x3418C398: F240 10CC MOVW R0, #0x01CC ; 0x340001CC = JEDEC_SCCR_Map 0x3418C39C: F2C3 4000 MOVT R0, #0x3400 ; 0x340001CC = JEDEC_SCCR_Map 0x3418C3A0: 6940 LDR R0, [R0, #20] 0x3418C3A2: F3C0 60C0 UBFX R0, R0, #27, #1 0x3418C3A6: 990C LDR R1, [SP, #48] 0x3418C3A8: F881 0074 STRB.W R0, [R1, #116] 0x3418C3AC: E003 B 46L19 ; 0x3418C3B6
.L18: 0x3418C3AE: 990C LDR R1, [SP, #48] 0x3418C3B0: 20FF MOVS R0, #255 0x3418C3B2: F881 0074 STRB.W R0, [R1, #116]
.L19: 0x3418C3B6: E036 B 46L23 ; 0x3418C426
.L20: 0x3418C3B8: 990C LDR R1, [SP, #48] 0x3418C3BA: 2001 MOVS R0, #1 0x3418C3BC: F881 0072 STRB.W R0, [R1, #114] 0x3418C3C0: 990C LDR R1, [SP, #48] 0x3418C3C2: 2000 MOVS R0, #0 0x3418C3C4: F881 0073 STRB.W R0, [R1, #115] 0x3418C3C8: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C3CC: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C3D0: 6B80 LDR R0, [R0, #56] 0x3418C3D2: 0880 LSRS R0, R0, #2 0x3418C3D4: 07C0 LSLS R0, R0, #31 0x3418C3D6: B158 CBZ R0, .L21 ; 0x3418C3F0 0x3418C3D8: 990C LDR R1, [SP, #48] 0x3418C3DA: 2005 MOVS R0, #5 0x3418C3DC: F881 006C STRB.W R0, [R1, #108] 0x3418C3E0: 990C LDR R1, [SP, #48] 0x3418C3E2: 2000 MOVS R0, #0 0x3418C3E4: F881 006D STRB.W R0, [R1, #109] 0x3418C3E8: 990C LDR R1, [SP, #48] 0x3418C3EA: F881 006E STRB.W R0, [R1, #110] 0x3418C3EE: E01A B 46L23 ; 0x3418C426
.L21: 0x3418C3F0: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C3F4: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C3F8: 6B80 LDR R0, [R0, #56] 0x3418C3FA: 0880 LSRS R0, R0, #2 0x3418C3FC: 0780 LSLS R0, R0, #30 0x3418C3FE: 2800 CMP R0, #0 0x3418C400: D50C BPL 46L22 ; 0x3418C41C 0x3418C402: 990C LDR R1, [SP, #48] 0x3418C404: 2070 MOVS R0, #112 0x3418C406: F881 006C STRB.W R0, [R1, #108] 0x3418C40A: 990C LDR R1, [SP, #48] 0x3418C40C: 2007 MOVS R0, #7 0x3418C40E: F881 006D STRB.W R0, [R1, #109] 0x3418C412: 990C LDR R1, [SP, #48] 0x3418C414: 2001 MOVS R0, #1 0x3418C416: F881 006E STRB.W R0, [R1, #110] 0x3418C41A: E004 B 46L23 ; 0x3418C426
.L22: 0x3418C41C: 2009 MOVS R0, #9 0x3418C41E: F88D 002B STRB.W R0, [SP, #43] 0x3418C422: F000 BC01 B.W 46L83 ; 0x3418CC28
.L23: 0x3418C426: 990C LDR R1, [SP, #48] 0x3418C428: 2003 MOVS R0, #3 0x3418C42A: F881 0076 STRB.W R0, [R1, #118] 0x3418C42E: 2000 MOVS R0, #0 0x3418C430: 9009 STR R0, [SP, #36] 0x3418C432: 980C LDR R0, [SP, #48] 0x3418C434: 3008 ADDS R0, #8 0x3418C436: 2101 MOVS R1, #1 0x3418C438: AA09 ADD R2, SP, #36 0x3418C43A: F006 FFCF BL SAL_XSPI_MemoryConfig ; 0x341933DC 0x3418C43E: 980C LDR R0, [SP, #48] 0x3418C440: F890 0094 LDRB.W R0, [R0, #148] 0x3418C444: 0700 LSLS R0, R0, #28 0x3418C446: 2800 CMP R0, #0 0x3418C448: F140 80EB BPL.W 46L35 ; 0x3418C622 0x3418C44C: 980C LDR R0, [SP, #48] 0x3418C44E: F890 005C LDRB.W R0, [R0, #92] 0x3418C452: 2802 CMP R0, #2 0x3418C454: F300 80E5 BGT.W 46L35 ; 0x3418C622 0x3418C458: 990C LDR R1, [SP, #48] 0x3418C45A: 2000 MOVS R0, #0 0x3418C45C: F881 0064 STRB.W R0, [R1, #100] 0x3418C460: 980C LDR R0, [SP, #48] 0x3418C462: F890 005C LDRB.W R0, [R0, #92] 0x3418C466: 2801 CMP R0, #1 0x3418C468: DB48 BLT 46L26 ; 0x3418C4FC 0x3418C46A: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C46E: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C472: 7C40 LDRB R0, [R0, #17] 0x3418C474: B198 CBZ R0, .L24 ; 0x3418C49E 0x3418C476: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C47A: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C47E: 6902 LDR R2, [R0, #16] 0x3418C480: F002 011F AND R1, R2, #31 0x3418C484: F3C2 1242 UBFX R2, R2, #5, #3 0x3418C488: 4411 ADD R1, R2 0x3418C48A: 9109 STR R1, [SP, #36] 0x3418C48C: 6900 LDR R0, [R0, #16] 0x3418C48E: 0A00 LSRS R0, R0, #8 0x3418C490: 990C LDR R1, [SP, #48] 0x3418C492: F881 0076 STRB.W R0, [R1, #118] 0x3418C496: 990C LDR R1, [SP, #48] 0x3418C498: 2001 MOVS R0, #1 0x3418C49A: F881 0064 STRB.W R0, [R1, #100]
.L24: 0x3418C49E: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C4A2: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C4A6: 7CC0 LDRB R0, [R0, #19] 0x3418C4A8: B190 CBZ R0, .L25 ; 0x3418C4D0 0x3418C4AA: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C4AE: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C4B2: 6902 LDR R2, [R0, #16] 0x3418C4B4: F3C2 4104 UBFX R1, R2, #16, #5 0x3418C4B8: F3C2 5242 UBFX R2, R2, #21, #3 0x3418C4BC: 4411 ADD R1, R2 0x3418C4BE: 9109 STR R1, [SP, #36] 0x3418C4C0: 7CC0 LDRB R0, [R0, #19] 0x3418C4C2: 990C LDR R1, [SP, #48] 0x3418C4C4: F881 0076 STRB.W R0, [R1, #118] 0x3418C4C8: 990C LDR R1, [SP, #48] 0x3418C4CA: 2002 MOVS R0, #2 0x3418C4CC: F881 0064 STRB.W R0, [R1, #100]
.L25: 0x3418C4D0: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C4D4: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C4D8: 7D00 LDRB R0, [R0, #20] 0x3418C4DA: 07C0 LSLS R0, R0, #31 0x3418C4DC: B170 CBZ R0, .L26 ; 0x3418C4FC 0x3418C4DE: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C4E2: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C4E6: 6982 LDR R2, [R0, #24] 0x3418C4E8: F3C2 4104 UBFX R1, R2, #16, #5 0x3418C4EC: F3C2 5242 UBFX R2, R2, #21, #3 0x3418C4F0: 4411 ADD R1, R2 0x3418C4F2: 9109 STR R1, [SP, #36] 0x3418C4F4: 7EC0 LDRB R0, [R0, #27] 0x3418C4F6: 990C LDR R1, [SP, #48] 0x3418C4F8: F881 0076 STRB.W R0, [R1, #118]
.L26: 0x3418C4FC: 980C LDR R0, [SP, #48] 0x3418C4FE: F890 005C LDRB.W R0, [R0, #92] 0x3418C502: 2802 CMP R0, #2 0x3418C504: DB75 BLT 46L33 ; 0x3418C5F2 0x3418C506: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C50A: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C50E: 6940 LDR R0, [R0, #20] 0x3418C510: 0900 LSRS R0, R0, #4 0x3418C512: 07C0 LSLS R0, R0, #31 0x3418C514: B1E0 CBZ R0, .L28 ; 0x3418C550 0x3418C516: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C51A: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C51E: 69C2 LDR R2, [R0, #28] 0x3418C520: F3C2 4104 UBFX R1, R2, #16, #5 0x3418C524: F3C2 5242 UBFX R2, R2, #21, #3 0x3418C528: 4411 ADD R1, R2 0x3418C52A: 9109 STR R1, [SP, #36] 0x3418C52C: 7FC0 LDRB R0, [R0, #31] 0x3418C52E: 990C LDR R1, [SP, #48] 0x3418C530: F881 0076 STRB.W R0, [R1, #118] 0x3418C534: 990C LDR R1, [SP, #48] 0x3418C536: 2006 MOVS R0, #6 0x3418C538: F881 0064 STRB.W R0, [R1, #100] 0x3418C53C: 980C LDR R0, [SP, #48] 0x3418C53E: F000 FB77 BL JEDEC_Basic_Manage4S4S4SEnableSequence ; 0x3418CC30 0x3418C542: F88D 002B STRB.W R0, [SP, #43] 0x3418C546: F89D 002B LDRB.W R0, [SP, #43] 0x3418C54A: B100 CBZ R0, .L27 ; 0x3418C54E 0x3418C54C: E36C B 46L83 ; 0x3418CC28
.L27: 0x3418C54E: E04A B 46L32 ; 0x3418C5E6
.L28: 0x3418C550: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C554: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C558: 6840 LDR R0, [R0, #4] 0x3418C55A: 0D40 LSRS R0, R0, #21 0x3418C55C: 07C0 LSLS R0, R0, #31 0x3418C55E: B1E8 CBZ R0, .L30 ; 0x3418C59C 0x3418C560: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C564: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C568: 68C2 LDR R2, [R0, #12] 0x3418C56A: F002 011F AND R1, R2, #31 0x3418C56E: F3C2 1242 UBFX R2, R2, #5, #3 0x3418C572: 4411 ADD R1, R2 0x3418C574: 9109 STR R1, [SP, #36] 0x3418C576: 68C0 LDR R0, [R0, #12] 0x3418C578: 0A00 LSRS R0, R0, #8 0x3418C57A: 990C LDR R1, [SP, #48] 0x3418C57C: F881 0076 STRB.W R0, [R1, #118] 0x3418C580: 990C LDR R1, [SP, #48] 0x3418C582: 2005 MOVS R0, #5 0x3418C584: F881 0064 STRB.W R0, [R1, #100] 0x3418C588: 980C LDR R0, [SP, #48] 0x3418C58A: F006 FC73 BL JEDEC_Basic_ManageQuadEnableRequirement ; 0x34192E74 0x3418C58E: F88D 002B STRB.W R0, [SP, #43] 0x3418C592: F89D 002B LDRB.W R0, [SP, #43] 0x3418C596: B100 CBZ R0, .L29 ; 0x3418C59A 0x3418C598: E346 B 46L83 ; 0x3418CC28
.L29: 0x3418C59A: E024 B 46L32 ; 0x3418C5E6
.L30: 0x3418C59C: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C5A0: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C5A4: 6840 LDR R0, [R0, #4] 0x3418C5A6: 0D80 LSRS R0, R0, #22 0x3418C5A8: 07C0 LSLS R0, R0, #31 0x3418C5AA: B1E0 CBZ R0, .L32 ; 0x3418C5E6 0x3418C5AC: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C5B0: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C5B4: 68C2 LDR R2, [R0, #12] 0x3418C5B6: F3C2 4104 UBFX R1, R2, #16, #5 0x3418C5BA: F3C2 5242 UBFX R2, R2, #21, #3 0x3418C5BE: 4411 ADD R1, R2 0x3418C5C0: 9109 STR R1, [SP, #36] 0x3418C5C2: 7BC0 LDRB R0, [R0, #15] 0x3418C5C4: 990C LDR R1, [SP, #48] 0x3418C5C6: F881 0076 STRB.W R0, [R1, #118] 0x3418C5CA: 990C LDR R1, [SP, #48] 0x3418C5CC: 2004 MOVS R0, #4 0x3418C5CE: F881 0064 STRB.W R0, [R1, #100] 0x3418C5D2: 980C LDR R0, [SP, #48] 0x3418C5D4: F006 FC4E BL JEDEC_Basic_ManageQuadEnableRequirement ; 0x34192E74 0x3418C5D8: F88D 002B STRB.W R0, [SP, #43] 0x3418C5DC: F89D 002B LDRB.W R0, [SP, #43] 0x3418C5E0: B100 CBZ R0, .L31 ; 0x3418C5E4 0x3418C5E2: E321 B 46L83 ; 0x3418CC28
.L31: 0x3418C5E4: E7FF B 46L32 ; 0x3418C5E6
.L32: 0x3418C5E6: 980C LDR R0, [SP, #48] 0x3418C5E8: 3008 ADDS R0, #8 0x3418C5EA: 2101 MOVS R1, #1 0x3418C5EC: AA09 ADD R2, SP, #36 0x3418C5EE: F006 FEF5 BL SAL_XSPI_MemoryConfig ; 0x341933DC
.L33: 0x3418C5F2: 990C LDR R1, [SP, #48] 0x3418C5F4: F101 0008 ADD.W R0, R1, #8 0x3418C5F8: F101 0264 ADD.W R2, R1, #100 0x3418C5FC: 2100 MOVS R1, #0 0x3418C5FE: F006 FEED BL SAL_XSPI_MemoryConfig ; 0x341933DC 0x3418C602: B118 CBZ R0, .L34 ; 0x3418C60C 0x3418C604: 200C MOVS R0, #12 0x3418C606: F88D 002B STRB.W R0, [SP, #43] 0x3418C60A: E30D B 46L83 ; 0x3418CC28
.L34: 0x3418C60C: 980C LDR R0, [SP, #48] 0x3418C60E: 3008 ADDS R0, #8 0x3418C610: 2101 MOVS R1, #1 0x3418C612: AA09 ADD R2, SP, #36 0x3418C614: F006 FEE2 BL SAL_XSPI_MemoryConfig ; 0x341933DC 0x3418C618: B118 CBZ R0, .L35 ; 0x3418C622 0x3418C61A: 200C MOVS R0, #12 0x3418C61C: F88D 002B STRB.W R0, [SP, #43] 0x3418C620: E302 B 46L83 ; 0x3418CC28
.L35: 0x3418C622: 980C LDR R0, [SP, #48] 0x3418C624: F890 0095 LDRB.W R0, [R0, #149] 0x3418C628: 06C0 LSLS R0, R0, #27 0x3418C62A: 2800 CMP R0, #0 0x3418C62C: F140 8081 BPL.W 46L45 ; 0x3418C732 0x3418C630: 980C LDR R0, [SP, #48] 0x3418C632: F890 005C LDRB.W R0, [R0, #92] 0x3418C636: 2803 CMP R0, #3 0x3418C638: D17B BNE 46L45 ; 0x3418C732 0x3418C63A: 980C LDR R0, [SP, #48] 0x3418C63C: F890 0064 LDRB.W R0, [R0, #100] 0x3418C640: 280B CMP R0, #11 0x3418C642: D103 BNE 46L36 ; 0x3418C64C 0x3418C644: 2001 MOVS R0, #1 0x3418C646: F88D 002A STRB.W R0, [SP, #42] 0x3418C64A: E03C B 46L42 ; 0x3418C6C6
.L36: 0x3418C64C: 980C LDR R0, [SP, #48] 0x3418C64E: F006 FCBB BL sfdp_enter_octal_mode ; 0x34192FC8 0x3418C652: BBC0 CBNZ R0, .L42 ; 0x3418C6C6 0x3418C654: 2001 MOVS R0, #1 0x3418C656: F88D 002A STRB.W R0, [SP, #42] 0x3418C65A: 980C LDR R0, [SP, #48] 0x3418C65C: F890 005D LDRB.W R0, [R0, #93] 0x3418C660: 28C8 CMP R0, #200 0x3418C662: D104 BNE 46L37 ; 0x3418C66E 0x3418C664: 990C LDR R1, [SP, #48] 0x3418C666: 200A MOVS R0, #10 0x3418C668: F881 0064 STRB.W R0, [R1, #100] 0x3418C66C: E003 B 46L38 ; 0x3418C676
.L37: 0x3418C66E: 990C LDR R1, [SP, #48] 0x3418C670: 200B MOVS R0, #11 0x3418C672: F881 0064 STRB.W R0, [R1, #100]
.L38: 0x3418C676: 990C LDR R1, [SP, #48] 0x3418C678: F101 0008 ADD.W R0, R1, #8 0x3418C67C: F101 0264 ADD.W R2, R1, #100 0x3418C680: 2100 MOVS R1, #0 0x3418C682: F006 FEAB BL SAL_XSPI_MemoryConfig ; 0x341933DC 0x3418C686: B118 CBZ R0, .L39 ; 0x3418C690 0x3418C688: 200C MOVS R0, #12 0x3418C68A: F88D 002B STRB.W R0, [SP, #43] 0x3418C68E: E2CB B 46L83 ; 0x3418CC28
.L39: 0x3418C690: 980C LDR R0, [SP, #48] 0x3418C692: F890 009D LDRB.W R0, [R0, #157] 0x3418C696: 28FD CMP R0, #253 0x3418C698: D107 BNE 46L40 ; 0x3418C6AA 0x3418C69A: 2014 MOVS R0, #20 0x3418C69C: 9009 STR R0, [SP, #36] 0x3418C69E: 980C LDR R0, [SP, #48] 0x3418C6A0: 3008 ADDS R0, #8 0x3418C6A2: 2101 MOVS R1, #1 0x3418C6A4: AA09 ADD R2, SP, #36 0x3418C6A6: F006 FE99 BL SAL_XSPI_MemoryConfig ; 0x341933DC
.L40: 0x3418C6AA: 980C LDR R0, [SP, #48] 0x3418C6AC: F890 009D LDRB.W R0, [R0, #157] 0x3418C6B0: 28FE CMP R0, #254 0x3418C6B2: D107 BNE 46L41 ; 0x3418C6C4 0x3418C6B4: 2008 MOVS R0, #8 0x3418C6B6: 9009 STR R0, [SP, #36] 0x3418C6B8: 980C LDR R0, [SP, #48] 0x3418C6BA: 3008 ADDS R0, #8 0x3418C6BC: 2101 MOVS R1, #1 0x3418C6BE: AA09 ADD R2, SP, #36 0x3418C6C0: F006 FE8C BL SAL_XSPI_MemoryConfig ; 0x341933DC
.L41: 0x3418C6C4: E7FF B 46L42 ; 0x3418C6C6
.L42: 0x3418C6C6: 980C LDR R0, [SP, #48] 0x3418C6C8: F890 0094 LDRB.W R0, [R0, #148] 0x3418C6CC: 0700 LSLS R0, R0, #28 0x3418C6CE: 2800 CMP R0, #0 0x3418C6D0: D51D BPL 46L44 ; 0x3418C70E 0x3418C6D2: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C6D6: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C6DA: 6800 LDR R0, [R0] 0x3418C6DC: 2811 CMP R0, #17 0x3418C6DE: D316 BCC 46L44 ; 0x3418C70E 0x3418C6E0: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C6E4: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C6E8: 6C80 LDR R0, [R0, #72] 0x3418C6EA: F3C0 7041 UBFX R0, R0, #29, #2 0x3418C6EE: 2802 CMP R0, #2 0x3418C6F0: D303 BCC 46L43 ; 0x3418C6FA 0x3418C6F2: 200F MOVS R0, #15 0x3418C6F4: F88D 002B STRB.W R0, [SP, #43] 0x3418C6F8: E296 B 46L83 ; 0x3418CC28
.L43: 0x3418C6FA: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C6FE: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C702: 6C80 LDR R0, [R0, #72] 0x3418C704: F3C0 7041 UBFX R0, R0, #29, #2 0x3418C708: 990C LDR R1, [SP, #48] 0x3418C70A: F881 0058 STRB.W R0, [R1, #88]
.L44: 0x3418C70E: 980C LDR R0, [SP, #48] 0x3418C710: F890 0094 LDRB.W R0, [R0, #148] 0x3418C714: 0600 LSLS R0, R0, #24 0x3418C716: 2800 CMP R0, #0 0x3418C718: D50B BPL 46L45 ; 0x3418C732 0x3418C71A: F240 3020 MOVW R0, #0x0320 ; 0x34000320 = JEDEC_XSPI10 0x3418C71E: F2C3 4000 MOVT R0, #0x3400 ; 0x34000320 = JEDEC_XSPI10 0x3418C722: 6800 LDR R0, [R0] 0x3418C724: 0F80 LSRS R0, R0, #30 0x3418C726: 07C0 LSLS R0, R0, #31 0x3418C728: B118 CBZ R0, .L45 ; 0x3418C732 0x3418C72A: 990C LDR R1, [SP, #48] 0x3418C72C: 2014 MOVS R0, #20 0x3418C72E: F881 0059 STRB.W R0, [R1, #89]
.L45: 0x3418C732: 980C LDR R0, [SP, #48] 0x3418C734: 2164 MOVS R1, #100 0x3418C736: F006 FD39 BL driver_check_FlagBUSY ; 0x341931AC 0x3418C73A: B118 CBZ R0, .L46 ; 0x3418C744 0x3418C73C: 200C MOVS R0, #12 0x3418C73E: F88D 002B STRB.W R0, [SP, #43] 0x3418C742: E271 B 46L83 ; 0x3418CC28
.L46: 0x3418C744: 980C LDR R0, [SP, #48] 0x3418C746: F890 0094 LDRB.W R0, [R0, #148] 0x3418C74A: 0640 LSLS R0, R0, #25 0x3418C74C: 2800 CMP R0, #0 0x3418C74E: F140 817E BPL.W 46L69 ; 0x3418CA4E 0x3418C752: 980C LDR R0, [SP, #48] 0x3418C754: F890 005E LDRB.W R0, [R0, #94] 0x3418C758: 2819 CMP R0, #25 0x3418C75A: F0C0 8178 BCC.W 46L69 ; 0x3418CA4E 0x3418C75E: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C762: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C766: F890 0043 LDRB.W R0, [R0, #67] 0x3418C76A: 28FF CMP R0, #255 0x3418C76C: F000 816F BEQ.W 46L69 ; 0x3418CA4E 0x3418C770: F89D 002A LDRB.W R0, [SP, #42] 0x3418C774: 2800 CMP R0, #0 0x3418C776: F040 80F2 BNE.W 46L63 ; 0x3418C95E 0x3418C77A: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C77E: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C782: 6C00 LDR R0, [R0, #64] 0x3418C784: 0E00 LSRS R0, R0, #24 0x3418C786: 07C0 LSLS R0, R0, #31 0x3418C788: B1B8 CBZ R0, .L49 ; 0x3418C7BA 0x3418C78A: 980C LDR R0, [SP, #48] 0x3418C78C: 3008 ADDS R0, #8 0x3418C78E: 21B7 MOVS R1, #183 0x3418C790: 2300 MOVS R3, #0 0x3418C792: 461A MOV R2, R3 0x3418C794: F000 FC5C BL SAL_XSPI_CommandSendData ; 0x3418D050 0x3418C798: B118 CBZ R0, .L47 ; 0x3418C7A2 0x3418C79A: 200C MOVS R0, #12 0x3418C79C: F88D 002B STRB.W R0, [SP, #43] 0x3418C7A0: E242 B 46L83 ; 0x3418CC28
.L47: 0x3418C7A2: 980C LDR R0, [SP, #48] 0x3418C7A4: 3008 ADDS R0, #8 0x3418C7A6: 2102 MOVS R1, #2 0x3418C7A8: 2200 MOVS R2, #0 0x3418C7AA: F006 FE17 BL SAL_XSPI_MemoryConfig ; 0x341933DC 0x3418C7AE: B118 CBZ R0, .L48 ; 0x3418C7B8 0x3418C7B0: 200C MOVS R0, #12 0x3418C7B2: F88D 002B STRB.W R0, [SP, #43] 0x3418C7B6: E237 B 46L83 ; 0x3418CC28
.L48: 0x3418C7B8: E064 B 46L56 ; 0x3418C884
.L49: 0x3418C7BA: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C7BE: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C7C2: 6C00 LDR R0, [R0, #64] 0x3418C7C4: 0E00 LSRS R0, R0, #24 0x3418C7C6: 0780 LSLS R0, R0, #30 0x3418C7C8: 2800 CMP R0, #0 0x3418C7CA: D543 BPL 46L53 ; 0x3418C854 0x3418C7CC: 990C LDR R1, [SP, #48] 0x3418C7CE: F101 0008 ADD.W R0, R1, #8 0x3418C7D2: F891 1070 LDRB.W R1, [R1, #112] 0x3418C7D6: 2300 MOVS R3, #0 0x3418C7D8: 461A MOV R2, R3 0x3418C7DA: F000 FC39 BL SAL_XSPI_CommandSendData ; 0x3418D050 0x3418C7DE: B118 CBZ R0, .L50 ; 0x3418C7E8 0x3418C7E0: 200C MOVS R0, #12 0x3418C7E2: F88D 002B STRB.W R0, [SP, #43] 0x3418C7E6: E21F B 46L83 ; 0x3418CC28
.L50: 0x3418C7E8: 9B0C LDR R3, [SP, #48] 0x3418C7EA: F103 0008 ADD.W R0, R3, #8 0x3418C7EE: F893 2074 LDRB.W R2, [R3, #116] 0x3418C7F2: F893 405D LDRB.W R4, [R3, #93] 0x3418C7F6: F893 1071 LDRB.W R1, [R3, #113] 0x3418C7FA: F893 E072 LDRB.W LR, [R3, #114] 0x3418C7FE: F893 3073 LDRB.W R3, [R3, #115] 0x3418C802: 2B00 CMP R3, #0 0x3418C804: EA5F 931F CSET R3, EQ 0x3418C808: FA03 F30E LSL.W R3, R3, LR 0x3418C80C: F04F 0C01 MOV.W R12, #1 0x3418C810: FA0C FC0E LSL.W R12, R12, LR 0x3418C814: 46EE MOV LR, SP 0x3418C816: F44F 757A MOV.W R5, #0x03E8 0x3418C81A: F8CE 5008 STR.W R5, [LR, #8] 0x3418C81E: F8CE 4004 STR.W R4, [LR, #4] 0x3418C822: FA5F FC8C UXTB R12, R12 0x3418C826: F8CE C000 STR.W R12, [LR] 0x3418C82A: B2DB UXTB R3, R3 0x3418C82C: F000 FC98 BL SAL_XSPI_CheckStatusRegister ; 0x3418D160 0x3418C830: B118 CBZ R0, .L51 ; 0x3418C83A 0x3418C832: 200C MOVS R0, #12 0x3418C834: F88D 002B STRB.W R0, [SP, #43] 0x3418C838: E1F6 B 46L83 ; 0x3418CC28
.L51: 0x3418C83A: 980C LDR R0, [SP, #48] 0x3418C83C: 3008 ADDS R0, #8 0x3418C83E: 21B7 MOVS R1, #183 0x3418C840: 2300 MOVS R3, #0 0x3418C842: 461A MOV R2, R3 0x3418C844: F000 FC04 BL SAL_XSPI_CommandSendData ; 0x3418D050 0x3418C848: B118 CBZ R0, .L52 ; 0x3418C852 0x3418C84A: 200C MOVS R0, #12 0x3418C84C: F88D 002B STRB.W R0, [SP, #43] 0x3418C850: E1EA B 46L83 ; 0x3418CC28
.L52: 0x3418C852: E017 B 46L56 ; 0x3418C884
.L53: 0x3418C854: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C858: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C85C: 6C00 LDR R0, [R0, #64] 0x3418C85E: 0E00 LSRS R0, R0, #24 0x3418C860: 0640 LSLS R0, R0, #25 0x3418C862: 2800 CMP R0, #0 0x3418C864: D500 BPL 46L54 ; 0x3418C868 0x3418C866: E00D B 46L56 ; 0x3418C884
.L54: 0x3418C868: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C86C: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C870: 6C00 LDR R0, [R0, #64] 0x3418C872: 0E00 LSRS R0, R0, #24 0x3418C874: 0680 LSLS R0, R0, #26 0x3418C876: 2800 CMP R0, #0 0x3418C878: D500 BPL 46L55 ; 0x3418C87C 0x3418C87A: E003 B 46L56 ; 0x3418C884
.L55: 0x3418C87C: 200F MOVS R0, #15 0x3418C87E: F88D 002B STRB.W R0, [SP, #43] 0x3418C882: E1D1 B 46L83 ; 0x3418CC28
.L56: 0x3418C884: 980C LDR R0, [SP, #48] 0x3418C886: 3008 ADDS R0, #8 0x3418C888: 2102 MOVS R1, #2 0x3418C88A: 2200 MOVS R2, #0 0x3418C88C: F006 FDA6 BL SAL_XSPI_MemoryConfig ; 0x341933DC 0x3418C890: B118 CBZ R0, .L57 ; 0x3418C89A 0x3418C892: 200C MOVS R0, #12 0x3418C894: F88D 002B STRB.W R0, [SP, #43] 0x3418C898: E1C6 B 46L83 ; 0x3418CC28
.L57: 0x3418C89A: 980C LDR R0, [SP, #48] 0x3418C89C: F890 0064 LDRB.W R0, [R0, #100] 0x3418C8A0: BB50 CBNZ R0, .L60 ; 0x3418C8F8 0x3418C8A2: F240 3038 MOVW R0, #0x0338 ; 0x34000338 = JEDEC_Address4Bytes 0x3418C8A6: F2C3 4000 MOVT R0, #0x3400 ; 0x34000338 = JEDEC_Address4Bytes 0x3418C8AA: 7800 LDRB R0, [R0] 0x3418C8AC: 07C0 LSLS R0, R0, #31 0x3418C8AE: B118 CBZ R0, .L58 ; 0x3418C8B8 0x3418C8B0: 990C LDR R1, [SP, #48] 0x3418C8B2: 2013 MOVS R0, #19 0x3418C8B4: F881 0076 STRB.W R0, [R1, #118]
.L58: 0x3418C8B8: F240 3038 MOVW R0, #0x0338 ; 0x34000338 = JEDEC_Address4Bytes 0x3418C8BC: F2C3 4000 MOVT R0, #0x3400 ; 0x34000338 = JEDEC_Address4Bytes 0x3418C8C0: 6800 LDR R0, [R0] 0x3418C8C2: 0980 LSRS R0, R0, #6 0x3418C8C4: 07C0 LSLS R0, R0, #31 0x3418C8C6: B118 CBZ R0, .L59 ; 0x3418C8D0 0x3418C8C8: 990C LDR R1, [SP, #48] 0x3418C8CA: 2012 MOVS R0, #18 0x3418C8CC: F881 0075 STRB.W R0, [R1, #117]
.L59: 0x3418C8D0: F240 3038 MOVW R0, #0x0338 ; 0x34000338 = JEDEC_Address4Bytes 0x3418C8D4: F2C3 4000 MOVT R0, #0x3400 ; 0x34000338 = JEDEC_Address4Bytes 0x3418C8D8: 6800 LDR R0, [R0] 0x3418C8DA: 0840 LSRS R0, R0, #1 0x3418C8DC: 07C0 LSLS R0, R0, #31 0x3418C8DE: B158 CBZ R0, .L60 ; 0x3418C8F8 0x3418C8E0: 990C LDR R1, [SP, #48] 0x3418C8E2: 200C MOVS R0, #12 0x3418C8E4: F881 0076 STRB.W R0, [R1, #118] 0x3418C8E8: 2008 MOVS R0, #8 0x3418C8EA: 9009 STR R0, [SP, #36] 0x3418C8EC: 980C LDR R0, [SP, #48] 0x3418C8EE: 3008 ADDS R0, #8 0x3418C8F0: 2101 MOVS R1, #1 0x3418C8F2: AA09 ADD R2, SP, #36 0x3418C8F4: F006 FD72 BL SAL_XSPI_MemoryConfig ; 0x341933DC
.L60: 0x3418C8F8: 980C LDR R0, [SP, #48] 0x3418C8FA: F890 0064 LDRB.W R0, [R0, #100] 0x3418C8FE: 2801 CMP R0, #1 0x3418C900: D10B BNE 46L61 ; 0x3418C91A 0x3418C902: F240 3038 MOVW R0, #0x0338 ; 0x34000338 = JEDEC_Address4Bytes 0x3418C906: F2C3 4000 MOVT R0, #0x3400 ; 0x34000338 = JEDEC_Address4Bytes 0x3418C90A: 6800 LDR R0, [R0] 0x3418C90C: 0880 LSRS R0, R0, #2 0x3418C90E: 07C0 LSLS R0, R0, #31 0x3418C910: B118 CBZ R0, .L61 ; 0x3418C91A 0x3418C912: 990C LDR R1, [SP, #48] 0x3418C914: 203C MOVS R0, #60 0x3418C916: F881 0076 STRB.W R0, [R1, #118]
.L61: 0x3418C91A: 980C LDR R0, [SP, #48] 0x3418C91C: F890 0064 LDRB.W R0, [R0, #100] 0x3418C920: 2802 CMP R0, #2 0x3418C922: D10B BNE 46L62 ; 0x3418C93C 0x3418C924: F240 3038 MOVW R0, #0x0338 ; 0x34000338 = JEDEC_Address4Bytes 0x3418C928: F2C3 4000 MOVT R0, #0x3400 ; 0x34000338 = JEDEC_Address4Bytes 0x3418C92C: 6800 LDR R0, [R0] 0x3418C92E: 08C0 LSRS R0, R0, #3 0x3418C930: 07C0 LSLS R0, R0, #31 0x3418C932: B118 CBZ R0, .L62 ; 0x3418C93C 0x3418C934: 990C LDR R1, [SP, #48] 0x3418C936: 20BC MOVS R0, #188 0x3418C938: F881 0076 STRB.W R0, [R1, #118]
.L62: 0x3418C93C: 980C LDR R0, [SP, #48] 0x3418C93E: F890 0064 LDRB.W R0, [R0, #100] 0x3418C942: 2803 CMP R0, #3 0x3418C944: D10B BNE 46L63 ; 0x3418C95E 0x3418C946: F240 3038 MOVW R0, #0x0338 ; 0x34000338 = JEDEC_Address4Bytes 0x3418C94A: F2C3 4000 MOVT R0, #0x3400 ; 0x34000338 = JEDEC_Address4Bytes 0x3418C94E: 6800 LDR R0, [R0] 0x3418C950: 0B40 LSRS R0, R0, #13 0x3418C952: 07C0 LSLS R0, R0, #31 0x3418C954: B118 CBZ R0, .L63 ; 0x3418C95E 0x3418C956: 990C LDR R1, [SP, #48] 0x3418C958: 200E MOVS R0, #14 0x3418C95A: F881 0076 STRB.W R0, [R1, #118]
.L63: 0x3418C95E: 980C LDR R0, [SP, #48] 0x3418C960: F890 005C LDRB.W R0, [R0, #92] 0x3418C964: 2803 CMP R0, #3 0x3418C966: D12C BNE 46L65 ; 0x3418C9C2 0x3418C968: 980C LDR R0, [SP, #48] 0x3418C96A: F890 0064 LDRB.W R0, [R0, #100] 0x3418C96E: BB40 CBNZ R0, .L65 ; 0x3418C9C2 0x3418C970: F240 3038 MOVW R0, #0x0338 ; 0x34000338 = JEDEC_Address4Bytes 0x3418C974: F2C3 4000 MOVT R0, #0x3400 ; 0x34000338 = JEDEC_Address4Bytes 0x3418C978: 6800 LDR R0, [R0] 0x3418C97A: 0D40 LSRS R0, R0, #21 0x3418C97C: 07C0 LSLS R0, R0, #31 0x3418C97E: B300 CBZ R0, .L65 ; 0x3418C9C2 0x3418C980: F240 3038 MOVW R0, #0x0338 ; 0x34000338 = JEDEC_Address4Bytes 0x3418C984: F2C3 4000 MOVT R0, #0x3400 ; 0x34000338 = JEDEC_Address4Bytes 0x3418C988: 6800 LDR R0, [R0] 0x3418C98A: 0E00 LSRS R0, R0, #24 0x3418C98C: 07C0 LSLS R0, R0, #31 0x3418C98E: B1C0 CBZ R0, .L65 ; 0x3418C9C2 0x3418C990: 990C LDR R1, [SP, #48] 0x3418C992: 2009 MOVS R0, #9 0x3418C994: F881 0064 STRB.W R0, [R1, #100] 0x3418C998: 990C LDR R1, [SP, #48] 0x3418C99A: F101 0008 ADD.W R0, R1, #8 0x3418C99E: F101 0264 ADD.W R2, R1, #100 0x3418C9A2: 2100 MOVS R1, #0 0x3418C9A4: F006 FD1A BL SAL_XSPI_MemoryConfig ; 0x341933DC 0x3418C9A8: B118 CBZ R0, .L64 ; 0x3418C9B2 0x3418C9AA: 200C MOVS R0, #12 0x3418C9AC: F88D 002B STRB.W R0, [SP, #43] 0x3418C9B0: E13A B 46L83 ; 0x3418CC28
.L64: 0x3418C9B2: 990C LDR R1, [SP, #48] 0x3418C9B4: 20CC MOVS R0, #204 0x3418C9B6: F881 0076 STRB.W R0, [R1, #118] 0x3418C9BA: 990C LDR R1, [SP, #48] 0x3418C9BC: 208E MOVS R0, #142 0x3418C9BE: F881 0075 STRB.W R0, [R1, #117]
.L65: 0x3418C9C2: 980C LDR R0, [SP, #48] 0x3418C9C4: F890 0064 LDRB.W R0, [R0, #100] 0x3418C9C8: 280A CMP R0, #10 0x3418C9CA: D12B BNE 46L68 ; 0x3418CA24 0x3418C9CC: F240 3038 MOVW R0, #0x0338 ; 0x34000338 = JEDEC_Address4Bytes 0x3418C9D0: F2C3 4000 MOVT R0, #0x3400 ; 0x34000338 = JEDEC_Address4Bytes 0x3418C9D4: 6800 LDR R0, [R0] 0x3418C9D6: 0E00 LSRS R0, R0, #24 0x3418C9D8: 07C0 LSLS R0, R0, #31 0x3418C9DA: B118 CBZ R0, .L66 ; 0x3418C9E4 0x3418C9DC: 990C LDR R1, [SP, #48] 0x3418C9DE: 2002 MOVS R0, #2 0x3418C9E0: F881 0075 STRB.W R0, [R1, #117]
.L66: 0x3418C9E4: F240 3038 MOVW R0, #0x0338 ; 0x34000338 = JEDEC_Address4Bytes 0x3418C9E8: F2C3 4000 MOVT R0, #0x3400 ; 0x34000338 = JEDEC_Address4Bytes 0x3418C9EC: 6800 LDR R0, [R0] 0x3418C9EE: 0D40 LSRS R0, R0, #21 0x3418C9F0: 07C0 LSLS R0, R0, #31 0x3418C9F2: B158 CBZ R0, .L67 ; 0x3418CA0C 0x3418C9F4: 990C LDR R1, [SP, #48] 0x3418C9F6: 20CC MOVS R0, #204 0x3418C9F8: F881 0076 STRB.W R0, [R1, #118] 0x3418C9FC: 2008 MOVS R0, #8 0x3418C9FE: 9009 STR R0, [SP, #36] 0x3418CA00: 980C LDR R0, [SP, #48] 0x3418CA02: 3008 ADDS R0, #8 0x3418CA04: 2101 MOVS R1, #1 0x3418CA06: AA09 ADD R2, SP, #36 0x3418CA08: F006 FCE8 BL SAL_XSPI_MemoryConfig ; 0x341933DC
.L67: 0x3418CA0C: F240 3038 MOVW R0, #0x0338 ; 0x34000338 = JEDEC_Address4Bytes 0x3418CA10: F2C3 4000 MOVT R0, #0x3400 ; 0x34000338 = JEDEC_Address4Bytes 0x3418CA14: 6800 LDR R0, [R0] 0x3418CA16: 0D80 LSRS R0, R0, #22 0x3418CA18: 07C0 LSLS R0, R0, #31 0x3418CA1A: B118 CBZ R0, .L68 ; 0x3418CA24 0x3418CA1C: 990C LDR R1, [SP, #48] 0x3418CA1E: 20FD MOVS R0, #253 0x3418CA20: F881 0076 STRB.W R0, [R1, #118]
.L68: 0x3418CA24: F240 3038 MOVW R0, #0x0338 ; 0x34000338 = JEDEC_Address4Bytes 0x3418CA28: F2C3 4000 MOVT R0, #0x3400 ; 0x34000338 = JEDEC_Address4Bytes 0x3418CA2C: 6841 LDR R1, [R0, #4] 0x3418CA2E: 9A0C LDR R2, [SP, #48] 0x3418CA30: F882 1078 STRB.W R1, [R2, #120] 0x3418CA34: 6841 LDR R1, [R0, #4] 0x3418CA36: 0A09 LSRS R1, R1, #8 0x3418CA38: 9A0C LDR R2, [SP, #48] 0x3418CA3A: F882 107A STRB.W R1, [R2, #122] 0x3418CA3E: 88C1 LDRH R1, [R0, #6] 0x3418CA40: 9A0C LDR R2, [SP, #48] 0x3418CA42: F882 107C STRB.W R1, [R2, #124] 0x3418CA46: 79C0 LDRB R0, [R0, #7] 0x3418CA48: 990C LDR R1, [SP, #48] 0x3418CA4A: F881 007E STRB.W R0, [R1, #126]
.L69: 0x3418CA4E: 980C LDR R0, [SP, #48] 0x3418CA50: F890 0094 LDRB.W R0, [R0, #148] 0x3418CA54: 0600 LSLS R0, R0, #24 0x3418CA56: 2800 CMP R0, #0 0x3418CA58: F140 80E6 BPL.W 46L83 ; 0x3418CC28 0x3418CA5C: 980C LDR R0, [SP, #48] 0x3418CA5E: F890 0064 LDRB.W R0, [R0, #100] 0x3418CA62: 280B CMP R0, #11 0x3418CA64: D005 BEQ 46L70 ; 0x3418CA72 0x3418CA66: 980C LDR R0, [SP, #48] 0x3418CA68: F890 0064 LDRB.W R0, [R0, #100] 0x3418CA6C: 280A CMP R0, #10 0x3418CA6E: F040 80DB BNE.W 46L83 ; 0x3418CC28
.L70: 0x3418CA72: 2000 MOVS R0, #0 0x3418CA74: 9006 STR R0, [SP, #24] 0x3418CA76: F240 3020 MOVW R0, #0x0320 ; 0x34000320 = JEDEC_XSPI10 0x3418CA7A: F2C3 4000 MOVT R0, #0x3400 ; 0x34000320 = JEDEC_XSPI10 0x3418CA7E: 7840 LDRB R0, [R0, #1] 0x3418CA80: B140 CBZ R0, .L71 ; 0x3418CA94 0x3418CA82: F240 3020 MOVW R0, #0x0320 ; 0x34000320 = JEDEC_XSPI10 0x3418CA86: F2C3 4000 MOVT R0, #0x3400 ; 0x34000320 = JEDEC_XSPI10 0x3418CA8A: 6800 LDR R0, [R0] 0x3418CA8C: 0A00 LSRS R0, R0, #8 0x3418CA8E: 990C LDR R1, [SP, #48] 0x3418CA90: F881 0076 STRB.W R0, [R1, #118]
.L71: 0x3418CA94: F240 3020 MOVW R0, #0x0320 ; 0x34000320 = JEDEC_XSPI10 0x3418CA98: F2C3 4000 MOVT R0, #0x3400 ; 0x34000320 = JEDEC_XSPI10 0x3418CA9C: 7D00 LDRB R0, [R0, #20] 0x3418CA9E: 06C0 LSLS R0, R0, #27 0x3418CAA0: B168 CBZ R0, .L72 ; 0x3418CABE 0x3418CAA2: F240 3020 MOVW R0, #0x0320 ; 0x34000320 = JEDEC_XSPI10 0x3418CAA6: F2C3 4000 MOVT R0, #0x3400 ; 0x34000320 = JEDEC_XSPI10 0x3418CAAA: 6940 LDR R0, [R0, #20] 0x3418CAAC: F000 001F AND R0, R0, #31 0x3418CAB0: 9009 STR R0, [SP, #36] 0x3418CAB2: 980C LDR R0, [SP, #48] 0x3418CAB4: 3008 ADDS R0, #8 0x3418CAB6: 2101 MOVS R1, #1 0x3418CAB8: AA09 ADD R2, SP, #36 0x3418CABA: F006 FC8F BL SAL_XSPI_MemoryConfig ; 0x341933DC
.L72: 0x3418CABE: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418CAC2: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418CAC6: 6D00 LDR R0, [R0, #80] 0x3418CAC8: 0F00 LSRS R0, R0, #28 0x3418CACA: F000 F8F3 BL sfdp_getfrequencevalue ; 0x3418CCB4 0x3418CACE: 9005 STR R0, [SP, #20] 0x3418CAD0: 9805 LDR R0, [SP, #20] 0x3418CAD2: 990C LDR R1, [SP, #48] 0x3418CAD4: 6E89 LDR R1, [R1, #104] 0x3418CAD6: 4288 CMP R0, R1 0x3418CAD8: D902 BLS 46L73 ; 0x3418CAE0 0x3418CADA: 980C LDR R0, [SP, #48] 0x3418CADC: 6E80 LDR R0, [R0, #104] 0x3418CADE: 9005 STR R0, [SP, #20]
.L73: 0x3418CAE0: 980C LDR R0, [SP, #48] 0x3418CAE2: 6800 LDR R0, [R0] 0x3418CAE4: B138 CBZ R0, .L74 ; 0x3418CAF6 0x3418CAE6: 9805 LDR R0, [SP, #20] 0x3418CAE8: 990C LDR R1, [SP, #48] 0x3418CAEA: 6809 LDR R1, [R1] 0x3418CAEC: 4288 CMP R0, R1 0x3418CAEE: D902 BLS 46L74 ; 0x3418CAF6 0x3418CAF0: 980C LDR R0, [SP, #48] 0x3418CAF2: 6800 LDR R0, [R0] 0x3418CAF4: 9005 STR R0, [SP, #20]
.L74: 0x3418CAF6: 990C LDR R1, [SP, #48] 0x3418CAF8: F101 0008 ADD.W R0, R1, #8 0x3418CAFC: 6E89 LDR R1, [R1, #104] 0x3418CAFE: 9A05 LDR R2, [SP, #20] 0x3418CB00: AB06 ADD R3, SP, #24 0x3418CB02: F000 F9E3 BL SAL_XSPI_SetClock ; 0x3418CECC 0x3418CB06: B118 CBZ R0, .L75 ; 0x3418CB10 0x3418CB08: 200D MOVS R0, #13 0x3418CB0A: F88D 002B STRB.W R0, [SP, #43] 0x3418CB0E: E08B B 46L83 ; 0x3418CC28
.L75: 0x3418CB10: 990B LDR R1, [SP, #44] 0x3418CB12: 2001 MOVS R0, #1 0x3418CB14: 7008 STRB R0, [R1] 0x3418CB16: 9806 LDR R0, [SP, #24] 0x3418CB18: F24C 2100 MOVW R1, #0xC200 0x3418CB1C: F6C0 31EB MOVT R1, #0x0BEB 0x3418CB20: 4288 CMP R0, R1 0x3418CB22: D314 BCC 46L76 ; 0x3418CB4E 0x3418CB24: F240 3020 MOVW R0, #0x0320 ; 0x34000320 = JEDEC_XSPI10 0x3418CB28: F2C3 4000 MOVT R0, #0x3400 ; 0x34000320 = JEDEC_XSPI10 0x3418CB2C: 68C0 LDR R0, [R0, #12] 0x3418CB2E: 09C0 LSRS R0, R0, #7 0x3418CB30: 06C0 LSLS R0, R0, #27 0x3418CB32: B160 CBZ R0, .L76 ; 0x3418CB4E 0x3418CB34: F240 3020 MOVW R0, #0x0320 ; 0x34000320 = JEDEC_XSPI10 0x3418CB38: F2C3 4000 MOVT R0, #0x3400 ; 0x34000320 = JEDEC_XSPI10 0x3418CB3C: 68C1 LDR R1, [R0, #12] 0x3418CB3E: F3C1 11C4 UBFX R1, R1, #7, #5 0x3418CB42: 9109 STR R1, [SP, #36] 0x3418CB44: 68C0 LDR R0, [R0, #12] 0x3418CB46: F3C0 0084 UBFX R0, R0, #2, #5 0x3418CB4A: 9008 STR R0, [SP, #32] 0x3418CB4C: E041 B 46L79 ; 0x3418CBD2
.L76: 0x3418CB4E: 9806 LDR R0, [SP, #24] 0x3418CB50: F24F 5180 MOVW R1, #0xF580 0x3418CB54: F6C0 11E4 MOVT R1, #0x09E4 0x3418CB58: 4288 CMP R0, R1 0x3418CB5A: D312 BCC 46L77 ; 0x3418CB82 0x3418CB5C: F240 3020 MOVW R0, #0x0320 ; 0x34000320 = JEDEC_XSPI10 0x3418CB60: F2C3 4000 MOVT R0, #0x3400 ; 0x34000320 = JEDEC_XSPI10 0x3418CB64: 6900 LDR R0, [R0, #16] 0x3418CB66: 0EC0 LSRS R0, R0, #27 0x3418CB68: B158 CBZ R0, .L77 ; 0x3418CB82 0x3418CB6A: F240 3020 MOVW R0, #0x0320 ; 0x34000320 = JEDEC_XSPI10 0x3418CB6E: F2C3 4000 MOVT R0, #0x3400 ; 0x34000320 = JEDEC_XSPI10 0x3418CB72: 6901 LDR R1, [R0, #16] 0x3418CB74: 0EC9 LSRS R1, R1, #27 0x3418CB76: 9109 STR R1, [SP, #36] 0x3418CB78: 6900 LDR R0, [R0, #16] 0x3418CB7A: F3C0 5084 UBFX R0, R0, #22, #5 0x3418CB7E: 9008 STR R0, [SP, #32] 0x3418CB80: E027 B 46L79 ; 0x3418CBD2
.L77: 0x3418CB82: 9806 LDR R0, [SP, #24] 0x3418CB84: F646 3140 MOVW R1, #0x6B40 0x3418CB88: F2C0 71ED MOVT R1, #0x07ED 0x3418CB8C: 4288 CMP R0, R1 0x3418CB8E: D314 BCC 46L78 ; 0x3418CBBA 0x3418CB90: F240 3020 MOVW R0, #0x0320 ; 0x34000320 = JEDEC_XSPI10 0x3418CB94: F2C3 4000 MOVT R0, #0x3400 ; 0x34000320 = JEDEC_XSPI10 0x3418CB98: 6900 LDR R0, [R0, #16] 0x3418CB9A: 0C40 LSRS R0, R0, #17 0x3418CB9C: 06C0 LSLS R0, R0, #27 0x3418CB9E: B160 CBZ R0, .L78 ; 0x3418CBBA 0x3418CBA0: F240 3020 MOVW R0, #0x0320 ; 0x34000320 = JEDEC_XSPI10 0x3418CBA4: F2C3 4000 MOVT R0, #0x3400 ; 0x34000320 = JEDEC_XSPI10 0x3418CBA8: 6901 LDR R1, [R0, #16] 0x3418CBAA: F3C1 4144 UBFX R1, R1, #17, #5 0x3418CBAE: 9109 STR R1, [SP, #36] 0x3418CBB0: 6900 LDR R0, [R0, #16] 0x3418CBB2: F3C0 3004 UBFX R0, R0, #12, #5 0x3418CBB6: 9008 STR R0, [SP, #32] 0x3418CBB8: E00B B 46L79 ; 0x3418CBD2
.L78: 0x3418CBBA: F240 3020 MOVW R0, #0x0320 ; 0x34000320 = JEDEC_XSPI10 0x3418CBBE: F2C3 4000 MOVT R0, #0x3400 ; 0x34000320 = JEDEC_XSPI10 0x3418CBC2: 6901 LDR R1, [R0, #16] 0x3418CBC4: F3C1 11C4 UBFX R1, R1, #7, #5 0x3418CBC8: 9109 STR R1, [SP, #36] 0x3418CBCA: 6900 LDR R0, [R0, #16] 0x3418CBCC: F3C0 0084 UBFX R0, R0, #2, #5 0x3418CBD0: 9008 STR R0, [SP, #32]
.L79: 0x3418CBD2: 980C LDR R0, [SP, #48] 0x3418CBD4: F890 005D LDRB.W R0, [R0, #93] 0x3418CBD8: 28C8 CMP R0, #200 0x3418CBDA: D108 BNE 46L80 ; 0x3418CBEE 0x3418CBDC: 2010 MOVS R0, #16 0x3418CBDE: 9009 STR R0, [SP, #36] 0x3418CBE0: 980C LDR R0, [SP, #48] 0x3418CBE2: 3008 ADDS R0, #8 0x3418CBE4: 2101 MOVS R1, #1 0x3418CBE6: AA09 ADD R2, SP, #36 0x3418CBE8: F006 FBF8 BL SAL_XSPI_MemoryConfig ; 0x341933DC 0x3418CBEC: E01C B 46L83 ; 0x3418CC28
.L80: 0x3418CBEE: 980C LDR R0, [SP, #48] 0x3418CBF0: F890 0095 LDRB.W R0, [R0, #149] 0x3418CBF4: 0780 LSLS R0, R0, #30 0x3418CBF6: 2800 CMP R0, #0 0x3418CBF8: D512 BPL 46L82 ; 0x3418CC20 0x3418CBFA: F240 10CC MOVW R0, #0x01CC ; 0x340001CC = JEDEC_SCCR_Map 0x3418CBFE: F2C3 4000 MOVT R0, #0x3400 ; 0x340001CC = JEDEC_SCCR_Map 0x3418CC02: 6A00 LDR R0, [R0, #32] 0x3418CC04: 0FC0 LSRS R0, R0, #31 0x3418CC06: B158 CBZ R0, .L82 ; 0x3418CC20 0x3418CC08: 980C LDR R0, [SP, #48] 0x3418CC0A: 9908 LDR R1, [SP, #32] 0x3418CC0C: F000 F872 BL sfdp_set_dummycycle ; 0x3418CCF4 0x3418CC10: B928 CBNZ R0, .L81 ; 0x3418CC1E 0x3418CC12: 980C LDR R0, [SP, #48] 0x3418CC14: 3008 ADDS R0, #8 0x3418CC16: 2101 MOVS R1, #1 0x3418CC18: AA09 ADD R2, SP, #36 0x3418CC1A: F006 FBDF BL SAL_XSPI_MemoryConfig ; 0x341933DC
.L81: 0x3418CC1E: E003 B 46L83 ; 0x3418CC28
.L82: 0x3418CC20: 200E MOVS R0, #14 0x3418CC22: F88D 002B STRB.W R0, [SP, #43] 0x3418CC26: E7FF B 46L83 ; 0x3418CC28
.L83: 0x3418CC28: F89D 002B LDRB.W R0, [SP, #43] 0x3418CC2C: B00E ADD SP, SP, #56 0x3418CC2E: BDB0 POP 123R4-R5, R7, PC}

Section .text.JEDEC_Basic_Manage4S4S4SEnableSequence from blto2_FSBL_lto.o, size=132, align=4


JEDEC_Basic_Manage4S4S4SEnableSequence: 0x3418CC30: B580 PUSH 123R7, LR} 0x3418CC32: B084 SUB SP, SP, #16 0x3418CC34: 9003 STR R0, [SP, #12] 0x3418CC36: 200F MOVS R0, #15 0x3418CC38: F88D 000B STRB.W R0, [SP, #11] 0x3418CC3C: 2000 MOVS R0, #0 0x3418CC3E: F88D 000A STRB.W R0, [SP, #10] 0x3418CC42: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418CC46: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418CC4A: 6BC0 LDR R0, [R0, #60] 0x3418CC4C: 0900 LSRS R0, R0, #4 0x3418CC4E: 07C0 LSLS R0, R0, #31 0x3418CC50: B140 CBZ R0, .L1 ; 0x3418CC64 0x3418CC52: 9803 LDR R0, [SP, #12] 0x3418CC54: F006 F90E BL JEDEC_Basic_ManageQuadEnableRequirement ; 0x34192E74 0x3418CC58: F88D 000B STRB.W R0, [SP, #11] 0x3418CC5C: 2038 MOVS R0, #56 0x3418CC5E: F88D 000A STRB.W R0, [SP, #10] 0x3418CC62: E011 B 46L2 ; 0x3418CC88
.L1: 0x3418CC64: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418CC68: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418CC6C: 6BC0 LDR R0, [R0, #60] 0x3418CC6E: 0900 LSRS R0, R0, #4 0x3418CC70: 0740 LSLS R0, R0, #29 0x3418CC72: 2800 CMP R0, #0 0x3418CC74: D508 BPL 46L2 ; 0x3418CC88 0x3418CC76: 9803 LDR R0, [SP, #12] 0x3418CC78: F006 F8FC BL JEDEC_Basic_ManageQuadEnableRequirement ; 0x34192E74 0x3418CC7C: F88D 000B STRB.W R0, [SP, #11] 0x3418CC80: 2035 MOVS R0, #53 0x3418CC82: F88D 000A STRB.W R0, [SP, #10] 0x3418CC86: E7FF B 46L2 ; 0x3418CC88
.L2: 0x3418CC88: F89D 000B LDRB.W R0, [SP, #11] 0x3418CC8C: B970 CBNZ R0, .L3 ; 0x3418CCAC 0x3418CC8E: F89D 000A LDRB.W R0, [SP, #10] 0x3418CC92: B158 CBZ R0, .L3 ; 0x3418CCAC 0x3418CC94: 9803 LDR R0, [SP, #12] 0x3418CC96: 3008 ADDS R0, #8 0x3418CC98: F89D 100A LDRB.W R1, [SP, #10] 0x3418CC9C: 2300 MOVS R3, #0 0x3418CC9E: 9301 STR R3, [SP, #4] 0x3418CCA0: 461A MOV R2, R3 0x3418CCA2: F000 FA19 BL SAL_XSPI_SendReadCommand ; 0x3418D0D8 0x3418CCA6: 9801 LDR R0, [SP, #4] 0x3418CCA8: F88D 000B STRB.W R0, [SP, #11]
.L3: 0x3418CCAC: F89D 000B LDRB.W R0, [SP, #11] 0x3418CCB0: B004 ADD SP, SP, #16 0x3418CCB2: BD80 POP 123R7, PC}

Section .text.sfdp_getfrequencevalue from blto2_FSBL_lto.o, size=64, align=4


sfdp_getfrequencevalue: 0x3418CCB4: B580 PUSH 123R7, LR} 0x3418CCB6: B08A SUB SP, SP, #40 0x3418CCB8: 9008 STR R0, [SP, #32] 0x3418CCBA: F64D 0176 MOVW R1, #0xD876 ; 0x3418D876 = .rodata..L__const.sfdp_getfrequencevalue.freqMhz_table 0x3418CCBE: F2C3 4118 MOVT R1, #0x3418 ; 0x3418D876 = .rodata..L__const.sfdp_getfrequencevalue.freqMhz_table 0x3418CCC2: F10D 0006 ADD.W R0, SP, #6 0x3418CCC6: 221A MOVS R2, #26 0x3418CCC8: F000 FD30 BL memcpy ; 0x3418D72C 0x3418CCCC: 9808 LDR R0, [SP, #32] 0x3418CCCE: 2809 CMP R0, #9 0x3418CCD0: D80B BHI 46L1 ; 0x3418CCEA 0x3418CCD2: 9908 LDR R1, [SP, #32] 0x3418CCD4: F10D 0006 ADD.W R0, SP, #6 0x3418CCD8: F830 0011 LDRH.W R0, [R0, R1, LSL #1] 0x3418CCDC: F244 2140 MOVW R1, #0x4240 0x3418CCE0: F2C0 010F MOVT R1, #15 0x3418CCE4: 4348 MULS R0, R1, R0 0x3418CCE6: 9009 STR R0, [SP, #36] 0x3418CCE8: E001 B 46L2 ; 0x3418CCEE
.L1: 0x3418CCEA: 2000 MOVS R0, #0 0x3418CCEC: 9009 STR R0, [SP, #36]
.L2: 0x3418CCEE: 9809 LDR R0, [SP, #36] 0x3418CCF0: B00A ADD SP, SP, #40 0x3418CCF2: BD80 POP 123R7, PC}

Section .text.sfdp_set_dummycycle from blto2_FSBL_lto.o, size=420, align=4


sfdp_set_dummycycle: 0x3418CCF4: B5B0 PUSH 123R4-R5, R7, LR} 0x3418CCF6: B088 SUB SP, SP, #32 0x3418CCF8: 9007 STR R0, [SP, #28] 0x3418CCFA: 9106 STR R1, [SP, #24] 0x3418CCFC: F240 7003 MOVW R0, #0x0703 0x3418CD00: F6C1 700F MOVT R0, #0x1F0F 0x3418CD04: 9005 STR R0, [SP, #20] 0x3418CD06: 2000 MOVS R0, #0 0x3418CD08: F88D 0013 STRB.W R0, [SP, #19] 0x3418CD0C: F8AD 0010 STRH.W R0, [SP, #16] 0x3418CD10: F240 10CC MOVW R0, #0x01CC ; 0x340001CC = JEDEC_SCCR_Map 0x3418CD14: F2C3 4000 MOVT R0, #0x3400 ; 0x340001CC = JEDEC_SCCR_Map 0x3418CD18: 6A00 LDR R0, [R0, #32] 0x3418CD1A: 0F00 LSRS R0, R0, #28 0x3418CD1C: 07C0 LSLS R0, R0, #31 0x3418CD1E: B958 CBNZ R0, .L1 ; 0x3418CD38 0x3418CD20: F240 10CC MOVW R0, #0x01CC ; 0x340001CC = JEDEC_SCCR_Map 0x3418CD24: F2C3 4000 MOVT R0, #0x3400 ; 0x340001CC = JEDEC_SCCR_Map 0x3418CD28: 6A00 LDR R0, [R0, #32] 0x3418CD2A: 0FC0 LSRS R0, R0, #31 0x3418CD2C: 2801 CMP R0, #1 0x3418CD2E: D103 BNE 46L1 ; 0x3418CD38 0x3418CD30: 200C MOVS R0, #12 0x3418CD32: F88D 0013 STRB.W R0, [SP, #19] 0x3418CD36: E0AB B 46L9 ; 0x3418CE90
.L1: 0x3418CD38: F240 10CC MOVW R0, #0x01CC ; 0x340001CC = JEDEC_SCCR_Map 0x3418CD3C: F2C3 4000 MOVT R0, #0x3400 ; 0x340001CC = JEDEC_SCCR_Map 0x3418CD40: 6A00 LDR R0, [R0, #32] 0x3418CD42: 0EC0 LSRS R0, R0, #27 0x3418CD44: 07C0 LSLS R0, R0, #31 0x3418CD46: B140 CBZ R0, .L2 ; 0x3418CD5A 0x3418CD48: F240 10CC MOVW R0, #0x01CC ; 0x340001CC = JEDEC_SCCR_Map 0x3418CD4C: F2C3 4000 MOVT R0, #0x3400 ; 0x340001CC = JEDEC_SCCR_Map 0x3418CD50: F890 0022 LDRB.W R0, [R0, #34] 0x3418CD54: 0200 LSLS R0, R0, #8 0x3418CD56: 9003 STR R0, [SP, #12] 0x3418CD58: E00E B 46L4 ; 0x3418CD78
.L2: 0x3418CD5A: 9807 LDR R0, [SP, #28] 0x3418CD5C: F890 005D LDRB.W R0, [R0, #93] 0x3418CD60: 28C8 CMP R0, #200 0x3418CD62: D102 BNE 46L3 ; 0x3418CD6A 0x3418CD64: 2001 MOVS R0, #1 0x3418CD66: 9003 STR R0, [SP, #12] 0x3418CD68: E006 B 46L4 ; 0x3418CD78
.L3: 0x3418CD6A: F240 10CC MOVW R0, #0x01CC ; 0x340001CC = JEDEC_SCCR_Map 0x3418CD6E: F2C3 4000 MOVT R0, #0x3400 ; 0x340001CC = JEDEC_SCCR_Map 0x3418CD72: F890 0022 LDRB.W R0, [R0, #34] 0x3418CD76: 9003 STR R0, [SP, #12]
.L4: 0x3418CD78: 9B07 LDR R3, [SP, #28] 0x3418CD7A: F103 0008 ADD.W R0, R3, #8 0x3418CD7E: F240 11CC MOVW R1, #0x01CC ; 0x340001CC = JEDEC_SCCR_Map 0x3418CD82: F2C3 4100 MOVT R1, #0x3400 ; 0x340001CC = JEDEC_SCCR_Map 0x3418CD86: F891 1021 LDRB.W R1, [R1, #33] 0x3418CD8A: 9A03 LDR R2, [SP, #12] 0x3418CD8C: F893 305D LDRB.W R3, [R3, #93] 0x3418CD90: 46EC MOV R12, SP 0x3418CD92: F8CC 3004 STR.W R3, [R12, #4] 0x3418CD96: 2302 MOVS R3, #2 0x3418CD98: F8CC 3000 STR.W R3, [R12] 0x3418CD9C: AB04 ADD R3, SP, #16 0x3418CD9E: F006 FD21 BL SAL_XSPI_CommandSendReadAddress ; 0x341937E4 0x3418CDA2: B118 CBZ R0, .L5 ; 0x3418CDAC 0x3418CDA4: 200C MOVS R0, #12 0x3418CDA6: F88D 0013 STRB.W R0, [SP, #19] 0x3418CDAA: E071 B 46L9 ; 0x3418CE90
.L5: 0x3418CDAC: 9907 LDR R1, [SP, #28] 0x3418CDAE: F101 0008 ADD.W R0, R1, #8 0x3418CDB2: F891 1070 LDRB.W R1, [R1, #112] 0x3418CDB6: 2300 MOVS R3, #0 0x3418CDB8: 461A MOV R2, R3 0x3418CDBA: F000 F949 BL SAL_XSPI_CommandSendData ; 0x3418D050 0x3418CDBE: B118 CBZ R0, .L6 ; 0x3418CDC8 0x3418CDC0: 200C MOVS R0, #12 0x3418CDC2: F88D 0013 STRB.W R0, [SP, #19] 0x3418CDC6: E063 B 46L9 ; 0x3418CE90
.L6: 0x3418CDC8: 9B07 LDR R3, [SP, #28] 0x3418CDCA: F103 0008 ADD.W R0, R3, #8 0x3418CDCE: F893 2074 LDRB.W R2, [R3, #116] 0x3418CDD2: F893 405D LDRB.W R4, [R3, #93] 0x3418CDD6: F893 1071 LDRB.W R1, [R3, #113] 0x3418CDDA: F893 E072 LDRB.W LR, [R3, #114] 0x3418CDDE: F893 3073 LDRB.W R3, [R3, #115] 0x3418CDE2: 2B00 CMP R3, #0 0x3418CDE4: EA5F 931F CSET R3, EQ 0x3418CDE8: FA03 F30E LSL.W R3, R3, LR 0x3418CDEC: F04F 0C01 MOV.W R12, #1 0x3418CDF0: FA0C FC0E LSL.W R12, R12, LR 0x3418CDF4: 46EE MOV LR, SP 0x3418CDF6: F44F 757A MOV.W R5, #0x03E8 0x3418CDFA: F8CE 5008 STR.W R5, [LR, #8] 0x3418CDFE: F8CE 4004 STR.W R4, [LR, #4] 0x3418CE02: FA5F FC8C UXTB R12, R12 0x3418CE06: F8CE C000 STR.W R12, [LR] 0x3418CE0A: B2DB UXTB R3, R3 0x3418CE0C: F000 F9A8 BL SAL_XSPI_CheckStatusRegister ; 0x3418D160 0x3418CE10: B118 CBZ R0, .L7 ; 0x3418CE1A 0x3418CE12: 200C MOVS R0, #12 0x3418CE14: F88D 0013 STRB.W R0, [SP, #19] 0x3418CE18: E03A B 46L9 ; 0x3418CE90
.L7: 0x3418CE1A: F89D 0010 LDRB.W R0, [SP, #16] 0x3418CE1E: F240 11CC MOVW R1, #0x01CC ; 0x340001CC = JEDEC_SCCR_Map 0x3418CE22: F2C3 4100 MOVT R1, #0x3400 ; 0x340001CC = JEDEC_SCCR_Map 0x3418CE26: 6A0B LDR R3, [R1, #32] 0x3418CE28: F3C3 7C41 UBFX R12, R3, #29, #2 0x3418CE2C: AA05 ADD R2, SP, #20 0x3418CE2E: 4462 ADD R2, R12 0x3418CE30: 7812 LDRB R2, [R2] 0x3418CE32: F3C3 6302 UBFX R3, R3, #24, #3 0x3418CE36: 409A LSLS R2, R3 0x3418CE38: 4390 BICS R0, R2 0x3418CE3A: F88D 0010 STRB.W R0, [SP, #16] 0x3418CE3E: F89D 0010 LDRB.W R0, [SP, #16] 0x3418CE42: 9A06 LDR R2, [SP, #24] 0x3418CE44: F891 3023 LDRB.W R3, [R1, #35] 0x3418CE48: F003 0307 AND R3, R3, #7 0x3418CE4C: 409A LSLS R2, R3 0x3418CE4E: 4310 ORRS R0, R2 0x3418CE50: F88D 0010 STRB.W R0, [SP, #16] 0x3418CE54: F89D 0010 LDRB.W R0, [SP, #16] 0x3418CE58: F88D 0011 STRB.W R0, [SP, #17] 0x3418CE5C: 9807 LDR R0, [SP, #28] 0x3418CE5E: 3008 ADDS R0, #8 0x3418CE60: F891 1020 LDRB.W R1, [R1, #32] 0x3418CE64: 9A03 LDR R2, [SP, #12] 0x3418CE66: 46EC MOV R12, SP 0x3418CE68: 2302 MOVS R3, #2 0x3418CE6A: F8CC 3000 STR.W R3, [R12] 0x3418CE6E: AB04 ADD R3, SP, #16 0x3418CE70: F006 FC72 BL SAL_XSPI_Write ; 0x34193758 0x3418CE74: B118 CBZ R0, .L8 ; 0x3418CE7E 0x3418CE76: 200C MOVS R0, #12 0x3418CE78: F88D 0013 STRB.W R0, [SP, #19] 0x3418CE7C: E008 B 46L9 ; 0x3418CE90
.L8: 0x3418CE7E: 9807 LDR R0, [SP, #28] 0x3418CE80: 2164 MOVS R1, #100 0x3418CE82: F006 F993 BL driver_check_FlagBUSY ; 0x341931AC 0x3418CE86: B118 CBZ R0, .L9 ; 0x3418CE90 0x3418CE88: 200C MOVS R0, #12 0x3418CE8A: F88D 0013 STRB.W R0, [SP, #19] 0x3418CE8E: E7FF B 46L9 ; 0x3418CE90
.L9: 0x3418CE90: F89D 0013 LDRB.W R0, [SP, #19] 0x3418CE94: B008 ADD SP, SP, #32 0x3418CE96: BDB0 POP 123R4-R5, R7, PC}

Section .text.EXTMEM_DRIVER_NOR_SFDP_DeInit from blto2_FSBL_lto.o, size=16, align=4


EXTMEM_DRIVER_NOR_SFDP_DeInit: 0x3418CE98: B081 SUB SP, SP, #4 0x3418CE9A: 9000 STR R0, [SP, #0] 0x3418CE9C: 9900 LDR R1, [SP, #0] 0x3418CE9E: 2000 MOVS R0, #0 0x3418CEA0: F881 005E STRB.W R0, [R1, #94] 0x3418CEA4: B001 ADD SP, SP, #4 0x3418CEA6: 4770 BX LR

Section .text.EXTMEM_DRIVER_NOR_SFDP_Disable_MemoryMappedMode from blto2_FSBL_lto.o, size=36, align=4


EXTMEM_DRIVER_NOR_SFDP_Disable_MemoryMappedMode: 0x3418CEA8: B580 PUSH 123R7, LR} 0x3418CEAA: B082 SUB SP, SP, #8 0x3418CEAC: 9001 STR R0, [SP, #4] 0x3418CEAE: 2000 MOVS R0, #0 0x3418CEB0: F88D 0003 STRB.W R0, [SP, #3] 0x3418CEB4: 9801 LDR R0, [SP, #4] 0x3418CEB6: 3008 ADDS R0, #8 0x3418CEB8: F006 FCF4 BL SAL_XSPI_DisableMapMode ; 0x341938A4 0x3418CEBC: B110 CBZ R0, .L1 ; 0x3418CEC4 0x3418CEBE: 20F3 MOVS R0, #243 0x3418CEC0: F88D 0003 STRB.W R0, [SP, #3]
.L1: 0x3418CEC4: F99D 0003 LDRSB.W R0, [SP, #3] 0x3418CEC8: B002 ADD SP, SP, #8 0x3418CECA: BD80 POP 123R7, PC}

Section .text.SAL_XSPI_SetClock from blto2_FSBL_lto.o, size=116, align=4


SAL_XSPI_SetClock: 0x3418CECC: B086 SUB SP, SP, #24 0x3418CECE: 9005 STR R0, [SP, #20] 0x3418CED0: 9104 STR R1, [SP, #16] 0x3418CED2: 9203 STR R2, [SP, #12] 0x3418CED4: 9302 STR R3, [SP, #8] 0x3418CED6: 2000 MOVS R0, #0 0x3418CED8: F88D 0007 STRB.W R0, [SP, #7] 0x3418CEDC: 9803 LDR R0, [SP, #12] 0x3418CEDE: B918 CBNZ R0, .L1 ; 0x3418CEE8 0x3418CEE0: 2001 MOVS R0, #1 0x3418CEE2: F88D 0007 STRB.W R0, [SP, #7] 0x3418CEE6: E027 B 46L3 ; 0x3418CF38
.L1: 0x3418CEE8: 9804 LDR R0, [SP, #16] 0x3418CEEA: 9903 LDR R1, [SP, #12] 0x3418CEEC: FBB0 F0F1 UDIV R0, R0, R1 0x3418CEF0: 9000 STR R0, [SP, #0] 0x3418CEF2: 9800 LDR R0, [SP, #0] 0x3418CEF4: B168 CBZ R0, .L2 ; 0x3418CF12 0x3418CEF6: 9804 LDR R0, [SP, #16] 0x3418CEF8: 9900 LDR R1, [SP, #0] 0x3418CEFA: FBB0 F0F1 UDIV R0, R0, R1 0x3418CEFE: 9902 LDR R1, [SP, #8] 0x3418CF00: 6008 STR R0, [R1] 0x3418CF02: 9802 LDR R0, [SP, #8] 0x3418CF04: 6800 LDR R0, [R0] 0x3418CF06: 9903 LDR R1, [SP, #12] 0x3418CF08: 4288 CMP R0, R1 0x3418CF0A: D802 BHI 46L2 ; 0x3418CF12 0x3418CF0C: 9800 LDR R0, [SP, #0] 0x3418CF0E: 3801 SUBS R0, #1 0x3418CF10: 9000 STR R0, [SP, #0]
.L2: 0x3418CF12: 9804 LDR R0, [SP, #16] 0x3418CF14: 9900 LDR R1, [SP, #0] 0x3418CF16: 3101 ADDS R1, #1 0x3418CF18: FBB0 F0F1 UDIV R0, R0, R1 0x3418CF1C: 9902 LDR R1, [SP, #8] 0x3418CF1E: 6008 STR R0, [R1] 0x3418CF20: 9805 LDR R0, [SP, #20] 0x3418CF22: 6800 LDR R0, [R0] 0x3418CF24: 6800 LDR R0, [R0] 0x3418CF26: 68C0 LDR R0, [R0, #12] 0x3418CF28: F020 00FF BIC R0, R0, #255 0x3418CF2C: 9900 LDR R1, [SP, #0] 0x3418CF2E: 4308 ORRS R0, R1 0x3418CF30: 9905 LDR R1, [SP, #20] 0x3418CF32: 6809 LDR R1, [R1] 0x3418CF34: 6809 LDR R1, [R1] 0x3418CF36: 60C8 STR R0, [R1, #12]
.L3: 0x3418CF38: F89D 0007 LDRB.W R0, [SP, #7] 0x3418CF3C: B006 ADD SP, SP, #24 0x3418CF3E: 4770 BX LR

Section .text.XSPI_FormatCommand from blto2_FSBL_lto.o, size=88, align=4


XSPI_FormatCommand: 0x3418CF40: B083 SUB SP, SP, #12 0x3418CF42: F88D 000B STRB.W R0, [SP, #11] 0x3418CF46: 9101 STR R1, [SP, #4] 0x3418CF48: F88D 2003 STRB.W R2, [SP, #3] 0x3418CF4C: 9801 LDR R0, [SP, #4] 0x3418CF4E: 2810 CMP R0, #16 0x3418CF50: D11A BNE 46L3 ; 0x3418CF88 0x3418CF52: F89D 0003 LDRB.W R0, [SP, #3] 0x3418CF56: 0200 LSLS R0, R0, #8 0x3418CF58: F8AD 0000 STRH.W R0, [SP] 0x3418CF5C: F89D 000B LDRB.W R0, [SP, #11] 0x3418CF60: 2801 CMP R0, #1 0x3418CF62: D109 BNE 46L1 ; 0x3418CF78 0x3418CF64: F89D 0003 LDRB.W R0, [SP, #3] 0x3418CF68: F080 01FF EOR R1, R0, #255 0x3418CF6C: F8BD 0000 LDRH.W R0, [SP] 0x3418CF70: 4308 ORRS R0, R1 0x3418CF72: F8AD 0000 STRH.W R0, [SP] 0x3418CF76: E006 B 46L2 ; 0x3418CF86
.L1: 0x3418CF78: F89D 1003 LDRB.W R1, [SP, #3] 0x3418CF7C: F8BD 0000 LDRH.W R0, [SP] 0x3418CF80: 4308 ORRS R0, R1 0x3418CF82: F8AD 0000 STRH.W R0, [SP]
.L2: 0x3418CF86: E003 B 46L4 ; 0x3418CF90
.L3: 0x3418CF88: F89D 0003 LDRB.W R0, [SP, #3] 0x3418CF8C: F8AD 0000 STRH.W R0, [SP]
.L4: 0x3418CF90: F8BD 0000 LDRH.W R0, [SP] 0x3418CF94: B003 ADD SP, SP, #12 0x3418CF96: 4770 BX LR

Section .text.SAL_XSPI_GetId from blto2_FSBL_lto.o, size=152, align=4


SAL_XSPI_GetId: 0x3418CF98: B580 PUSH 123R7, LR} 0x3418CF9A: B098 SUB SP, SP, #96 0x3418CF9C: 9017 STR R0, [SP, #92] 0x3418CF9E: 9116 STR R1, [SP, #88] 0x3418CFA0: 9215 STR R2, [SP, #84] 0x3418CFA2: 9817 LDR R0, [SP, #92] 0x3418CFA4: 1D01 ADDS R1, R0, #4 0x3418CFA6: A801 ADD R0, SP, #4 0x3418CFA8: 224C MOVS R2, #76 0x3418CFAA: F000 FBCE BL __aeabi_memcpy4 ; 0x3418D74A 0x3418CFAE: 9817 LDR R0, [SP, #92] 0x3418CFB0: F890 0050 LDRB.W R0, [R0, #80] 0x3418CFB4: 9905 LDR R1, [SP, #20] 0x3418CFB6: 229F MOVS R2, #159 0x3418CFB8: F7FF FFC2 BL XSPI_FormatCommand ; 0x3418CF40 0x3418CFBC: 9003 STR R0, [SP, #12] 0x3418CFBE: 9815 LDR R0, [SP, #84] 0x3418CFC0: 9010 STR R0, [SP, #64] 0x3418CFC2: 9804 LDR R0, [SP, #16] 0x3418CFC4: 2801 CMP R0, #1 0x3418CFC6: D106 BNE 46L1 ; 0x3418CFD6 0x3418CFC8: 2000 MOVS R0, #0 0x3418CFCA: 9008 STR R0, [SP, #32] 0x3418CFCC: 9012 STR R0, [SP, #72] 0x3418CFCE: F04F 7080 MOV.W R0, #0x01000000 0x3418CFD2: 900F STR R0, [SP, #60] 0x3418CFD4: E00D B 46L3 ; 0x3418CFF2
.L1: 0x3418CFD6: 9804 LDR R0, [SP, #16] 0x3418CFD8: 2803 CMP R0, #3 0x3418CFDA: D106 BNE 46L2 ; 0x3418CFEA 0x3418CFDC: 2000 MOVS R0, #0 0x3418CFDE: 9008 STR R0, [SP, #32] 0x3418CFE0: 9012 STR R0, [SP, #72] 0x3418CFE2: F04F 7040 MOV.W R0, #0x03000000 0x3418CFE6: 900F STR R0, [SP, #60] 0x3418CFE8: E003 B 46L3 ; 0x3418CFF2
.L2: 0x3418CFEA: 2000 MOVS R0, #0 0x3418CFEC: 9007 STR R0, [SP, #28] 0x3418CFEE: 2008 MOVS R0, #8 0x3418CFF0: 9012 STR R0, [SP, #72]
.L3: 0x3418CFF2: 9817 LDR R0, [SP, #92] 0x3418CFF4: 6800 LDR R0, [R0] 0x3418CFF6: A901 ADD R1, SP, #4 0x3418CFF8: 2264 MOVS R2, #100 0x3418CFFA: F004 FE41 BL HAL_XSPI_Command ; 0x34191C80 0x3418CFFE: F88D 0053 STRB.W R0, [SP, #83] 0x3418D002: F89D 0053 LDRB.W R0, [SP, #83] 0x3418D006: B100 CBZ R0, .L4 ; 0x3418D00A 0x3418D008: E007 B 46L5 ; 0x3418D01A
.L4: 0x3418D00A: 9817 LDR R0, [SP, #92] 0x3418D00C: 6800 LDR R0, [R0] 0x3418D00E: 9916 LDR R1, [SP, #88] 0x3418D010: 2264 MOVS R2, #100 0x3418D012: F7FE FCBF BL HAL_XSPI_Receive ; 0x3418B994 0x3418D016: F88D 0053 STRB.W R0, [SP, #83]
.L5: 0x3418D01A: F89D 0053 LDRB.W R0, [SP, #83] 0x3418D01E: B118 CBZ R0, .L6 ; 0x3418D028 0x3418D020: 9817 LDR R0, [SP, #92] 0x3418D022: 6800 LDR R0, [R0] 0x3418D024: F005 FA3A BL HAL_XSPI_Abort ; 0x3419249C
.L6: 0x3418D028: F89D 0053 LDRB.W R0, [SP, #83] 0x3418D02C: B018 ADD SP, SP, #96 0x3418D02E: BD80 POP 123R7, PC}

Section .text.XSPI_Transmit from blto2_FSBL_lto.o, size=32, align=4


XSPI_Transmit: 0x3418D030: B580 PUSH 123R7, LR} 0x3418D032: B084 SUB SP, SP, #16 0x3418D034: 9003 STR R0, [SP, #12] 0x3418D036: 9102 STR R1, [SP, #8] 0x3418D038: 9803 LDR R0, [SP, #12] 0x3418D03A: 6800 LDR R0, [R0] 0x3418D03C: 9902 LDR R1, [SP, #8] 0x3418D03E: 2264 MOVS R2, #100 0x3418D040: F005 F848 BL HAL_XSPI_Transmit ; 0x341920D4 0x3418D044: F88D 0007 STRB.W R0, [SP, #7] 0x3418D048: F89D 0007 LDRB.W R0, [SP, #7] 0x3418D04C: B004 ADD SP, SP, #16 0x3418D04E: BD80 POP 123R7, PC}

Section .text.SAL_XSPI_CommandSendData from blto2_FSBL_lto.o, size=136, align=4


SAL_XSPI_CommandSendData: 0x3418D050: B580 PUSH 123R7, LR} 0x3418D052: B098 SUB SP, SP, #96 0x3418D054: 9017 STR R0, [SP, #92] 0x3418D056: F88D 105B STRB.W R1, [SP, #91] 0x3418D05A: 9215 STR R2, [SP, #84] 0x3418D05C: F8AD 3052 STRH.W R3, [SP, #82] 0x3418D060: 9817 LDR R0, [SP, #92] 0x3418D062: 1D01 ADDS R1, R0, #4 0x3418D064: A801 ADD R0, SP, #4 0x3418D066: 224C MOVS R2, #76 0x3418D068: F000 FB6F BL __aeabi_memcpy4 ; 0x3418D74A 0x3418D06C: 9817 LDR R0, [SP, #92] 0x3418D06E: F890 0050 LDRB.W R0, [R0, #80] 0x3418D072: 9905 LDR R1, [SP, #20] 0x3418D074: F89D 205B LDRB.W R2, [SP, #91] 0x3418D078: F7FF FF62 BL XSPI_FormatCommand ; 0x3418CF40 0x3418D07C: 9003 STR R0, [SP, #12] 0x3418D07E: 2000 MOVS R0, #0 0x3418D080: 9008 STR R0, [SP, #32] 0x3418D082: 9012 STR R0, [SP, #72] 0x3418D084: F8BD 1052 LDRH.W R1, [SP, #82] 0x3418D088: 9110 STR R1, [SP, #64] 0x3418D08A: 9013 STR R0, [SP, #76] 0x3418D08C: F8BD 0052 LDRH.W R0, [SP, #82] 0x3418D090: B908 CBNZ R0, .L1 ; 0x3418D096 0x3418D092: 2000 MOVS R0, #0 0x3418D094: 900F STR R0, [SP, #60]
.L1: 0x3418D096: 9817 LDR R0, [SP, #92] 0x3418D098: 6800 LDR R0, [R0] 0x3418D09A: A901 ADD R1, SP, #4 0x3418D09C: 2264 MOVS R2, #100 0x3418D09E: F004 FDEF BL HAL_XSPI_Command ; 0x34191C80 0x3418D0A2: F88D 0003 STRB.W R0, [SP, #3] 0x3418D0A6: F89D 0003 LDRB.W R0, [SP, #3] 0x3418D0AA: B950 CBNZ R0, .L2 ; 0x3418D0C2 0x3418D0AC: F8BD 0052 LDRH.W R0, [SP, #82] 0x3418D0B0: B138 CBZ R0, .L2 ; 0x3418D0C2 0x3418D0B2: 9817 LDR R0, [SP, #92] 0x3418D0B4: 6800 LDR R0, [R0] 0x3418D0B6: 9915 LDR R1, [SP, #84] 0x3418D0B8: 2264 MOVS R2, #100 0x3418D0BA: F005 F80B BL HAL_XSPI_Transmit ; 0x341920D4 0x3418D0BE: F88D 0003 STRB.W R0, [SP, #3]
.L2: 0x3418D0C2: F89D 0003 LDRB.W R0, [SP, #3] 0x3418D0C6: B118 CBZ R0, .L3 ; 0x3418D0D0 0x3418D0C8: 9817 LDR R0, [SP, #92] 0x3418D0CA: 6800 LDR R0, [R0] 0x3418D0CC: F005 F9E6 BL HAL_XSPI_Abort ; 0x3419249C
.L3: 0x3418D0D0: F89D 0003 LDRB.W R0, [SP, #3] 0x3418D0D4: B018 ADD SP, SP, #96 0x3418D0D6: BD80 POP 123R7, PC}

Section .text.SAL_XSPI_SendReadCommand from blto2_FSBL_lto.o, size=136, align=4


SAL_XSPI_SendReadCommand: 0x3418D0D8: B580 PUSH 123R7, LR} 0x3418D0DA: B098 SUB SP, SP, #96 0x3418D0DC: 9017 STR R0, [SP, #92] 0x3418D0DE: F88D 105B STRB.W R1, [SP, #91] 0x3418D0E2: 9215 STR R2, [SP, #84] 0x3418D0E4: F8AD 3052 STRH.W R3, [SP, #82] 0x3418D0E8: 9817 LDR R0, [SP, #92] 0x3418D0EA: 1D01 ADDS R1, R0, #4 0x3418D0EC: A801 ADD R0, SP, #4 0x3418D0EE: 224C MOVS R2, #76 0x3418D0F0: F000 FB2B BL __aeabi_memcpy4 ; 0x3418D74A 0x3418D0F4: 9817 LDR R0, [SP, #92] 0x3418D0F6: F890 0050 LDRB.W R0, [R0, #80] 0x3418D0FA: 9905 LDR R1, [SP, #20] 0x3418D0FC: F89D 205B LDRB.W R2, [SP, #91] 0x3418D100: F7FF FF1E BL XSPI_FormatCommand ; 0x3418CF40 0x3418D104: 9003 STR R0, [SP, #12] 0x3418D106: 2000 MOVS R0, #0 0x3418D108: 9008 STR R0, [SP, #32] 0x3418D10A: 9012 STR R0, [SP, #72] 0x3418D10C: F8BD 1052 LDRH.W R1, [SP, #82] 0x3418D110: 9110 STR R1, [SP, #64] 0x3418D112: 9013 STR R0, [SP, #76] 0x3418D114: F8BD 0052 LDRH.W R0, [SP, #82] 0x3418D118: B908 CBNZ R0, .L1 ; 0x3418D11E 0x3418D11A: 2000 MOVS R0, #0 0x3418D11C: 900F STR R0, [SP, #60]
.L1: 0x3418D11E: 9817 LDR R0, [SP, #92] 0x3418D120: 6800 LDR R0, [R0] 0x3418D122: A901 ADD R1, SP, #4 0x3418D124: 2264 MOVS R2, #100 0x3418D126: F004 FDAB BL HAL_XSPI_Command ; 0x34191C80 0x3418D12A: F88D 0003 STRB.W R0, [SP, #3] 0x3418D12E: F89D 0003 LDRB.W R0, [SP, #3] 0x3418D132: B950 CBNZ R0, .L2 ; 0x3418D14A 0x3418D134: F8BD 0052 LDRH.W R0, [SP, #82] 0x3418D138: B138 CBZ R0, .L2 ; 0x3418D14A 0x3418D13A: 9817 LDR R0, [SP, #92] 0x3418D13C: 6800 LDR R0, [R0] 0x3418D13E: 9915 LDR R1, [SP, #84] 0x3418D140: 2264 MOVS R2, #100 0x3418D142: F7FE FC27 BL HAL_XSPI_Receive ; 0x3418B994 0x3418D146: F88D 0003 STRB.W R0, [SP, #3]
.L2: 0x3418D14A: F89D 0003 LDRB.W R0, [SP, #3] 0x3418D14E: B118 CBZ R0, .L3 ; 0x3418D158 0x3418D150: 9817 LDR R0, [SP, #92] 0x3418D152: 6800 LDR R0, [R0] 0x3418D154: F005 F9A2 BL HAL_XSPI_Abort ; 0x3419249C
.L3: 0x3418D158: F89D 0003 LDRB.W R0, [SP, #3] 0x3418D15C: B018 ADD SP, SP, #96 0x3418D15E: BD80 POP 123R7, PC}

Section .text.SAL_XSPI_CheckStatusRegister from blto2_FSBL_lto.o, size=232, align=4


SAL_XSPI_CheckStatusRegister: 0x3418D160: B510 PUSH 123R4, LR} 0x3418D162: B09E SUB SP, SP, #120 0x3418D164: 468C MOV R12, R1 0x3418D166: 4686 MOV LR, R0 0x3418D168: 9822 LDR R0, [SP, #136] 0x3418D16A: 9821 LDR R0, [SP, #132] 0x3418D16C: 9920 LDR R1, [SP, #128] 0x3418D16E: F8CD E074 STR.W LR, [SP, #116] 0x3418D172: F88D C073 STRB.W R12, [SP, #115] 0x3418D176: 921B STR R2, [SP, #108] 0x3418D178: F88D 306B STRB.W R3, [SP, #107] 0x3418D17C: F88D 106A STRB.W R1, [SP, #106] 0x3418D180: F88D 0069 STRB.W R0, [SP, #105] 0x3418D184: 981D LDR R0, [SP, #116] 0x3418D186: 1D01 ADDS R1, R0, #4 0x3418D188: A807 ADD R0, SP, #28 0x3418D18A: 224C MOVS R2, #76 0x3418D18C: F000 FADD BL __aeabi_memcpy4 ; 0x3418D74A 0x3418D190: F89D 006B LDRB.W R0, [SP, #107] 0x3418D194: 9002 STR R0, [SP, #8] 0x3418D196: F89D 006A LDRB.W R0, [SP, #106] 0x3418D19A: 9003 STR R0, [SP, #12] 0x3418D19C: 2000 MOVS R0, #0 0x3418D19E: 9000 STR R0, [SP, #0] 0x3418D1A0: 9004 STR R0, [SP, #16] 0x3418D1A2: F44F 0080 MOV.W R0, #0x400000 0x3418D1A6: 9005 STR R0, [SP, #20] 0x3418D1A8: 2010 MOVS R0, #16 0x3418D1AA: 9006 STR R0, [SP, #24] 0x3418D1AC: 981D LDR R0, [SP, #116] 0x3418D1AE: F890 0050 LDRB.W R0, [R0, #80] 0x3418D1B2: 990B LDR R1, [SP, #44] 0x3418D1B4: F89D 2073 LDRB.W R2, [SP, #115] 0x3418D1B8: F7FF FEC2 BL XSPI_FormatCommand ; 0x3418CF40 0x3418D1BC: 4601 MOV R1, R0 0x3418D1BE: 9800 LDR R0, [SP, #0] 0x3418D1C0: 9109 STR R1, [SP, #36] 0x3418D1C2: 2101 MOVS R1, #1 0x3418D1C4: 9116 STR R1, [SP, #88] 0x3418D1C6: 9019 STR R0, [SP, #100] 0x3418D1C8: 980A LDR R0, [SP, #40] 0x3418D1CA: 2801 CMP R0, #1 0x3418D1CC: D105 BNE 46L1 ; 0x3418D1DA 0x3418D1CE: F04F 7080 MOV.W R0, #0x01000000 0x3418D1D2: 9015 STR R0, [SP, #84] 0x3418D1D4: 2000 MOVS R0, #0 0x3418D1D6: 900E STR R0, [SP, #56] 0x3418D1D8: 9018 STR R0, [SP, #96]
.L1: 0x3418D1DA: 9815 LDR R0, [SP, #84] 0x3418D1DC: F1B0 6F80 CMP.W R0, #0x04000000 0x3418D1E0: D114 BNE 46L3 ; 0x3418D20C 0x3418D1E2: F89D 0069 LDRB.W R0, [SP, #105] 0x3418D1E6: 28C2 CMP R0, #194 0x3418D1E8: D108 BNE 46L2 ; 0x3418D1FC 0x3418D1EA: 9817 LDR R0, [SP, #92] 0x3418D1EC: F1B0 6F00 CMP.W R0, #0x08000000 0x3418D1F0: D104 BNE 46L2 ; 0x3418D1FC 0x3418D1F2: F04F 5000 MOV.W R0, #0x20000000 0x3418D1F6: 9019 STR R0, [SP, #100] 0x3418D1F8: 2000 MOVS R0, #0 0x3418D1FA: 9017 STR R0, [SP, #92]
.L2: 0x3418D1FC: F44F 6080 MOV.W R0, #0x0400 0x3418D200: 900E STR R0, [SP, #56] 0x3418D202: F44F 5040 MOV.W R0, #0x3000 0x3418D206: 900F STR R0, [SP, #60] 0x3418D208: 981B LDR R0, [SP, #108] 0x3418D20A: 900D STR R0, [SP, #52]
.L3: 0x3418D20C: 981D LDR R0, [SP, #116] 0x3418D20E: 6800 LDR R0, [R0] 0x3418D210: A907 ADD R1, SP, #28 0x3418D212: 2264 MOVS R2, #100 0x3418D214: F004 FD34 BL HAL_XSPI_Command ; 0x34191C80 0x3418D218: F88D 0007 STRB.W R0, [SP, #7] 0x3418D21C: F89D 0007 LDRB.W R0, [SP, #7] 0x3418D220: B938 CBNZ R0, .L4 ; 0x3418D232 0x3418D222: 981D LDR R0, [SP, #116] 0x3418D224: 6800 LDR R0, [R0] 0x3418D226: 9A22 LDR R2, [SP, #136] 0x3418D228: A902 ADD R1, SP, #8 0x3418D22A: F004 FFC5 BL HAL_XSPI_AutoPolling ; 0x341921B8 0x3418D22E: F88D 0007 STRB.W R0, [SP, #7]
.L4: 0x3418D232: F89D 0007 LDRB.W R0, [SP, #7] 0x3418D236: B118 CBZ R0, .L5 ; 0x3418D240 0x3418D238: 981D LDR R0, [SP, #116] 0x3418D23A: 6800 LDR R0, [R0] 0x3418D23C: F005 F92E BL HAL_XSPI_Abort ; 0x3419249C
.L5: 0x3418D240: F89D 0007 LDRB.W R0, [SP, #7] 0x3418D244: B01E ADD SP, SP, #120 0x3418D246: BD10 POP 123R4, PC}

Section .text.SAL_XSPI_EnableMapMode from blto2_FSBL_lto.o, size=200, align=4


SAL_XSPI_EnableMapMode: 0x3418D248: B580 PUSH 123R7, LR} 0x3418D24A: B09C SUB SP, SP, #112 0x3418D24C: 4684 MOV R12, R0 0x3418D24E: 981E LDR R0, [SP, #120] 0x3418D250: F8CD C06C STR.W R12, [SP, #108] 0x3418D254: F88D 106B STRB.W R1, [SP, #107] 0x3418D258: F88D 206A STRB.W R2, [SP, #106] 0x3418D25C: F88D 3069 STRB.W R3, [SP, #105] 0x3418D260: F88D 0068 STRB.W R0, [SP, #104] 0x3418D264: 981B LDR R0, [SP, #108] 0x3418D266: 1D01 ADDS R1, R0, #4 0x3418D268: A806 ADD R0, SP, #24 0x3418D26A: 9001 STR R0, [SP, #4] 0x3418D26C: 224C MOVS R2, #76 0x3418D26E: F000 FA6C BL __aeabi_memcpy4 ; 0x3418D74A 0x3418D272: 2000 MOVS R0, #0 0x3418D274: 9005 STR R0, [SP, #20] 0x3418D276: 9004 STR R0, [SP, #16] 0x3418D278: 9003 STR R0, [SP, #12] 0x3418D27A: 9002 STR R0, [SP, #8] 0x3418D27C: 2001 MOVS R0, #1 0x3418D27E: 9006 STR R0, [SP, #24] 0x3418D280: 981B LDR R0, [SP, #108] 0x3418D282: F890 0050 LDRB.W R0, [R0, #80] 0x3418D286: 990A LDR R1, [SP, #40] 0x3418D288: F89D 206B LDRB.W R2, [SP, #107] 0x3418D28C: F7FF FE58 BL XSPI_FormatCommand ; 0x3418CF40 0x3418D290: 9901 LDR R1, [SP, #4] 0x3418D292: 9008 STR R0, [SP, #32] 0x3418D294: F89D 006A LDRB.W R0, [SP, #106] 0x3418D298: 9017 STR R0, [SP, #92] 0x3418D29A: 981B LDR R0, [SP, #108] 0x3418D29C: 6800 LDR R0, [R0] 0x3418D29E: 2264 MOVS R2, #100 0x3418D2A0: F004 FCEE BL HAL_XSPI_Command ; 0x34191C80 0x3418D2A4: F88D 0067 STRB.W R0, [SP, #103] 0x3418D2A8: F89D 0067 LDRB.W R0, [SP, #103] 0x3418D2AC: B100 CBZ R0, .L1 ; 0x3418D2B0 0x3418D2AE: E024 B 46L3 ; 0x3418D2FA
.L1: 0x3418D2B0: 2002 MOVS R0, #2 0x3418D2B2: 9006 STR R0, [SP, #24] 0x3418D2B4: 981B LDR R0, [SP, #108] 0x3418D2B6: F890 0050 LDRB.W R0, [R0, #80] 0x3418D2BA: 990A LDR R1, [SP, #40] 0x3418D2BC: F89D 2069 LDRB.W R2, [SP, #105] 0x3418D2C0: F7FF FE3E BL XSPI_FormatCommand ; 0x3418CF40 0x3418D2C4: 9008 STR R0, [SP, #32] 0x3418D2C6: F89D 0068 LDRB.W R0, [SP, #104] 0x3418D2CA: 9017 STR R0, [SP, #92] 0x3418D2CC: 981B LDR R0, [SP, #108] 0x3418D2CE: 6800 LDR R0, [R0] 0x3418D2D0: A906 ADD R1, SP, #24 0x3418D2D2: 2264 MOVS R2, #100 0x3418D2D4: F004 FCD4 BL HAL_XSPI_Command ; 0x34191C80 0x3418D2D8: F88D 0067 STRB.W R0, [SP, #103] 0x3418D2DC: F89D 0067 LDRB.W R0, [SP, #103] 0x3418D2E0: B100 CBZ R0, .L2 ; 0x3418D2E4 0x3418D2E2: E00A B 46L3 ; 0x3418D2FA
.L2: 0x3418D2E4: 2000 MOVS R0, #0 0x3418D2E6: 9002 STR R0, [SP, #8] 0x3418D2E8: 2050 MOVS R0, #80 0x3418D2EA: 9003 STR R0, [SP, #12] 0x3418D2EC: 981B LDR R0, [SP, #108] 0x3418D2EE: 6800 LDR R0, [R0] 0x3418D2F0: A902 ADD R1, SP, #8 0x3418D2F2: F005 F82D BL HAL_XSPI_MemoryMapped ; 0x34192350 0x3418D2F6: F88D 0067 STRB.W R0, [SP, #103]
.L3: 0x3418D2FA: F89D 0067 LDRB.W R0, [SP, #103] 0x3418D2FE: B118 CBZ R0, .L4 ; 0x3418D308 0x3418D300: 981B LDR R0, [SP, #108] 0x3418D302: 6800 LDR R0, [R0] 0x3418D304: F005 F8CA BL HAL_XSPI_Abort ; 0x3419249C
.L4: 0x3418D308: F89D 0067 LDRB.W R0, [SP, #103] 0x3418D30C: B01C ADD SP, SP, #112 0x3418D30E: BD80 POP 123R7, PC}

Section .text.SAL_XSPI_UpdateMemoryType from blto2_FSBL_lto.o, size=116, align=4


SAL_XSPI_UpdateMemoryType: 0x3418D310: B084 SUB SP, SP, #16 0x3418D312: 9002 STR R0, [SP, #8] 0x3418D314: F88D 1007 STRB.W R1, [SP, #7] 0x3418D318: 2000 MOVS R0, #0 0x3418D31A: F88D 0006 STRB.W R0, [SP, #6] 0x3418D31E: 9802 LDR R0, [SP, #8] 0x3418D320: 6800 LDR R0, [R0] 0x3418D322: 6800 LDR R0, [R0] 0x3418D324: 6880 LDR R0, [R0, #8] 0x3418D326: F000 60E0 AND R0, R0, #0x07000000 0x3418D32A: 9000 STR R0, [SP, #0] 0x3418D32C: F89D 0007 LDRB.W R0, [SP, #7] 0x3418D330: B9E0 CBNZ R0, .L4 ; 0x3418D36C 0x3418D332: 9800 LDR R0, [SP, #0] 0x3418D334: B918 CBNZ R0, .L1 ; 0x3418D33E 0x3418D336: F04F 7080 MOV.W R0, #0x01000000 0x3418D33A: 9000 STR R0, [SP, #0] 0x3418D33C: E009 B 46L3 ; 0x3418D352
.L1: 0x3418D33E: 9800 LDR R0, [SP, #0] 0x3418D340: F1B0 7F80 CMP.W R0, #0x01000000 0x3418D344: D102 BNE 46L2 ; 0x3418D34C 0x3418D346: 2000 MOVS R0, #0 0x3418D348: 9000 STR R0, [SP, #0] 0x3418D34A: E002 B 46L3 ; 0x3418D352
.L2: 0x3418D34C: 2001 MOVS R0, #1 0x3418D34E: F88D 0006 STRB.W R0, [SP, #6]
.L3: 0x3418D352: 9802 LDR R0, [SP, #8] 0x3418D354: 6800 LDR R0, [R0] 0x3418D356: 6800 LDR R0, [R0] 0x3418D358: 6880 LDR R0, [R0, #8] 0x3418D35A: F020 60E0 BIC R0, R0, #0x07000000 0x3418D35E: 9900 LDR R1, [SP, #0] 0x3418D360: 4308 ORRS R0, R1 0x3418D362: 9902 LDR R1, [SP, #8] 0x3418D364: 6809 LDR R1, [R1] 0x3418D366: 6809 LDR R1, [R1] 0x3418D368: 6088 STR R0, [R1, #8] 0x3418D36A: E003 B 46L5 ; 0x3418D374
.L4: 0x3418D36C: 2001 MOVS R0, #1 0x3418D36E: F88D 000F STRB.W R0, [SP, #15] 0x3418D372: E003 B 46L6 ; 0x3418D37C
.L5: 0x3418D374: F89D 0006 LDRB.W R0, [SP, #6] 0x3418D378: F88D 000F STRB.W R0, [SP, #15]
.L6: 0x3418D37C: F89D 000F LDRB.W R0, [SP, #15] 0x3418D380: B004 ADD SP, SP, #16 0x3418D382: 4770 BX LR

Section .text.EXTMEM_MemoryMappedMode from blto2_FSBL_lto.o, size=140, align=4


EXTMEM_MemoryMappedMode: 0x3418D384: B580 PUSH 123R7, LR} 0x3418D386: B084 SUB SP, SP, #16 0x3418D388: 9002 STR R0, [SP, #8] 0x3418D38A: F88D 1007 STRB.W R1, [SP, #7] 0x3418D38E: 20FB MOVS R0, #251 0x3418D390: F88D 0006 STRB.W R0, [SP, #6] 0x3418D394: 9802 LDR R0, [SP, #8] 0x3418D396: BB98 CBNZ R0, .L5 ; 0x3418D400 0x3418D398: 2000 MOVS R0, #0 0x3418D39A: F88D 0006 STRB.W R0, [SP, #6] 0x3418D39E: 9802 LDR R0, [SP, #8] 0x3418D3A0: 21AC MOVS R1, #172 0x3418D3A2: 4341 MULS R1, R0, R1 0x3418D3A4: F240 0000 MOVW R0, #0 ; 0x34000000 = extmem_list_config 0x3418D3A8: F2C3 4000 MOVT R0, #0x3400 ; 0x34000000 = extmem_list_config 0x3418D3AC: 5C40 LDRB R0, [R0, R1] 0x3418D3AE: BB20 CBNZ R0, .L4 ; 0x3418D3FA 0x3418D3B0: F89D 0007 LDRB.W R0, [SP, #7] 0x3418D3B4: B980 CBNZ R0, .L2 ; 0x3418D3D8 0x3418D3B6: 9802 LDR R0, [SP, #8] 0x3418D3B8: F240 0200 MOVW R2, #0 ; 0x34000000 = extmem_list_config 0x3418D3BC: F2C3 4200 MOVT R2, #0x3400 ; 0x34000000 = extmem_list_config 0x3418D3C0: 21AC MOVS R1, #172 0x3418D3C2: FB00 2001 MLA R0, R0, R1, R2 0x3418D3C6: 300C ADDS R0, #12 0x3418D3C8: F005 FFBE BL EXTMEM_DRIVER_NOR_SFDP_Enable_MemoryMappedMode ; 0x34193348 0x3418D3CC: B118 CBZ R0, .L1 ; 0x3418D3D6 0x3418D3CE: 20FD MOVS R0, #253 0x3418D3D0: F88D 000F STRB.W R0, [SP, #15] 0x3418D3D4: E018 B 46L6 ; 0x3418D408
.L1: 0x3418D3D6: E00F B 46L3 ; 0x3418D3F8
.L2: 0x3418D3D8: 9802 LDR R0, [SP, #8] 0x3418D3DA: F240 0200 MOVW R2, #0 ; 0x34000000 = extmem_list_config 0x3418D3DE: F2C3 4200 MOVT R2, #0x3400 ; 0x34000000 = extmem_list_config 0x3418D3E2: 21AC MOVS R1, #172 0x3418D3E4: FB00 2001 MLA R0, R0, R1, R2 0x3418D3E8: 300C ADDS R0, #12 0x3418D3EA: F7FF FD5D BL EXTMEM_DRIVER_NOR_SFDP_Disable_MemoryMappedMode ; 0x3418CEA8 0x3418D3EE: B118 CBZ R0, .L3 ; 0x3418D3F8 0x3418D3F0: 20FD MOVS R0, #253 0x3418D3F2: F88D 000F STRB.W R0, [SP, #15] 0x3418D3F6: E007 B 46L6 ; 0x3418D408
.L3: 0x3418D3F8: E002 B 46L5 ; 0x3418D400
.L4: 0x3418D3FA: 20FE MOVS R0, #254 0x3418D3FC: F88D 0006 STRB.W R0, [SP, #6]
.L5: 0x3418D400: F89D 0006 LDRB.W R0, [SP, #6] 0x3418D404: F88D 000F STRB.W R0, [SP, #15]
.L6: 0x3418D408: F99D 000F LDRSB.W R0, [SP, #15] 0x3418D40C: B004 ADD SP, SP, #16 0x3418D40E: BD80 POP 123R7, PC}

Section .text.EXTMEM_GetMapAddress from blto2_FSBL_lto.o, size=196, align=4


EXTMEM_GetMapAddress: 0x3418D410: B083 SUB SP, SP, #12 0x3418D412: 9002 STR R0, [SP, #8] 0x3418D414: 9101 STR R1, [SP, #4] 0x3418D416: 20FB MOVS R0, #251 0x3418D418: F88D 0003 STRB.W R0, [SP, #3] 0x3418D41C: 9802 LDR R0, [SP, #8] 0x3418D41E: 2800 CMP R0, #0 0x3418D420: D154 BNE 46L7 ; 0x3418D4CC 0x3418D422: 2000 MOVS R0, #0 0x3418D424: F88D 0003 STRB.W R0, [SP, #3] 0x3418D428: 9802 LDR R0, [SP, #8] 0x3418D42A: 21AC MOVS R1, #172 0x3418D42C: 4341 MULS R1, R0, R1 0x3418D42E: F240 0000 MOVW R0, #0 ; 0x34000000 = extmem_list_config 0x3418D432: F2C3 4000 MOVT R0, #0x3400 ; 0x34000000 = extmem_list_config 0x3418D436: 5C40 LDRB R0, [R0, R1] 0x3418D438: F010 0FFD TST R0, #253 0x3418D43C: D000 BEQ 46L1 ; 0x3418D440 0x3418D43E: E042 B 46L6 ; 0x3418D4C6
.L1: 0x3418D440: 9802 LDR R0, [SP, #8] 0x3418D442: F240 0200 MOVW R2, #0 ; 0x34000000 = extmem_list_config 0x3418D446: F2C3 4200 MOVT R2, #0x3400 ; 0x34000000 = extmem_list_config 0x3418D44A: 21AC MOVS R1, #172 0x3418D44C: FB00 2001 MLA R0, R0, R1, R2 0x3418D450: 6840 LDR R0, [R0, #4] 0x3418D452: 6800 LDR R0, [R0] 0x3418D454: F245 0100 MOVW R1, #0x5000 0x3418D458: F6C5 0102 MOVT R1, #0x5802 0x3418D45C: 4288 CMP R0, R1 0x3418D45E: D104 BNE 46L2 ; 0x3418D46A 0x3418D460: 9901 LDR R1, [SP, #4] 0x3418D462: F04F 4010 MOV.W R0, #0x90000000 0x3418D466: 6008 STR R0, [R1] 0x3418D468: E02C B 46L5 ; 0x3418D4C4
.L2: 0x3418D46A: 9802 LDR R0, [SP, #8] 0x3418D46C: F240 0200 MOVW R2, #0 ; 0x34000000 = extmem_list_config 0x3418D470: F2C3 4200 MOVT R2, #0x3400 ; 0x34000000 = extmem_list_config 0x3418D474: 21AC MOVS R1, #172 0x3418D476: FB00 2001 MLA R0, R0, R1, R2 0x3418D47A: 6840 LDR R0, [R0, #4] 0x3418D47C: 6800 LDR R0, [R0] 0x3418D47E: F24A 0100 MOVW R1, #0xA000 0x3418D482: F6C5 0102 MOVT R1, #0x5802 0x3418D486: 4288 CMP R0, R1 0x3418D488: D104 BNE 46L3 ; 0x3418D494 0x3418D48A: 9901 LDR R1, [SP, #4] 0x3418D48C: F04F 40E0 MOV.W R0, #0x70000000 0x3418D490: 6008 STR R0, [R1] 0x3418D492: E017 B 46L5 ; 0x3418D4C4
.L3: 0x3418D494: 9802 LDR R0, [SP, #8] 0x3418D496: F240 0200 MOVW R2, #0 ; 0x34000000 = extmem_list_config 0x3418D49A: F2C3 4200 MOVT R2, #0x3400 ; 0x34000000 = extmem_list_config 0x3418D49E: 21AC MOVS R1, #172 0x3418D4A0: FB00 2001 MLA R0, R0, R1, R2 0x3418D4A4: 6840 LDR R0, [R0, #4] 0x3418D4A6: 6800 LDR R0, [R0] 0x3418D4A8: F24D 0100 MOVW R1, #0xD000 0x3418D4AC: F6C5 0102 MOVT R1, #0x5802 0x3418D4B0: 4288 CMP R0, R1 0x3418D4B2: D104 BNE 46L4 ; 0x3418D4BE 0x3418D4B4: 9901 LDR R1, [SP, #4] 0x3418D4B6: F04F 4000 MOV.W R0, #0x80000000 0x3418D4BA: 6008 STR R0, [R1] 0x3418D4BC: E002 B 46L5 ; 0x3418D4C4
.L4: 0x3418D4BE: 20FD MOVS R0, #253 0x3418D4C0: F88D 0003 STRB.W R0, [SP, #3]
.L5: 0x3418D4C4: E002 B 46L7 ; 0x3418D4CC
.L6: 0x3418D4C6: 20FE MOVS R0, #254 0x3418D4C8: F88D 0003 STRB.W R0, [SP, #3]
.L7: 0x3418D4CC: F99D 0003 LDRSB.W R0, [SP, #3] 0x3418D4D0: B003 ADD SP, SP, #12 0x3418D4D2: 4770 BX LR

Section .rodata.SFDP_BuildGenericDriver.chip_erase_unit from blto2_FSBL_lto.o, size=16, align=4


SFDP_BuildGenericDriver.chip_erase_unit: 0x3418D4D4: 10 DC.B 0x10 ; '\x10' 0x3418D4D5: 00 DC.B 0x00 ; '\0' 0x3418D4D6: 00 DC.B 0x00 ; '\0' 0x3418D4D7: 00 DC.B 0x00 ; '\0' 0x3418D4D8: 00 DC.B 0x00 ; '\0' 0x3418D4D9: 01 DC.B 0x01 ; '\x01' 0x3418D4DA: 00 DC.B 0x00 ; '\0' 0x3418D4DB: 00 DC.B 0x00 ; '\0' 0x3418D4DC: A0 DC.B 0xA0 ; '\xA0' 0x3418D4DD: 0F DC.B 0x0F ; '\x0F' 0x3418D4DE: 00 DC.B 0x00 ; '\0' 0x3418D4DF: 00 DC.B 0x00 ; '\0' 0x3418D4E0: 00 DC.B 0x00 ; '\0' 0x3418D4E1: FA DC.B 0xFA ; '\xFA' 0x3418D4E2: 00 DC.B 0x00 ; '\0' 0x3418D4E3: 00 DC.B 0x00 ; '\0'

Section .init._start from SEGGER_THUMB_Startup.o, size=20, align=4


_start: 0x3418D4E4: 4C03 LDR R4, =0x3419464C ; [PC, #12] [0x3418D4F4]
.L1: 0x3418D4E6: 6820 LDR R0, [R4] 0x3418D4E8: 3404 ADDS R4, #4 0x3418D4EA: 4780 BLX R0 0x3418D4EC: E7FB B 46L1 ; 0x3418D4E6
__SEGGER_init_done: __startup_complete: 0x3418D4EE: F000 FA45 BL main ; 0x3418D97C
exit: 0x3418D4F2: E7FE B exit ; 0x3418D4F2 0x3418D4F4: 3419464C DC.W 3419464C ; R_ARM_ABS32

Section .init.Reset_Handler from STM32N6xx_Startup.o, size=68, align=4


reset_handler: Reset_Handler: 0x3418D4F8: 490C LDR R1, =0x34062000 ; [PC, #48] [0x3418D52C] 0x3418D4FA: F381 880A MSR MSPLIM, R1 0x3418D4FE: F04F 0100 MOV.W R1, #0 0x3418D502: F381 880B MSR PSPLIM, R1 0x3418D506: F000 FBDF BL SystemInit ; 0x3418DCC8 0x3418D50A: F64E 5088 MOVW R0, #0xED88 0x3418D50E: F2CE 0000 MOVT R0, #0xE000 0x3418D512: 6801 LDR R1, [R0] 0x3418D514: F451 0170 ORRS R1, R1, #0xF00000 0x3418D518: 6001 STR R1, [R0] 0x3418D51A: 4805 LDR R0, =0x56009E90 ; [PC, #20] [0x3418D530] 0x3418D51C: F04F 01B4 MOV.W R1, #180 0x3418D520: 6001 STR R1, [R0] 0x3418D522: 4804 LDR R0, =0x56009E8C ; [PC, #16] [0x3418D534] 0x3418D524: 4904 LDR R1, =0xB451B400 ; [PC, #16] [0x3418D538] 0x3418D526: 6001 STR R1, [R0] 0x3418D528: F7FF FFDC BL _start ; 0x3418D4E4 0x3418D52C: 34062000 DC.W 34062000 ; R_ARM_ABS32 0x3418D530: 56009E90 DC.W 0x56009E90 0x3418D534: 56009E8C DC.W 0x56009E8C 0x3418D538: B451B400 DC.W 0xB451B400

Section .text.libc.fmodf from floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=284, align=4


fmodf: 0x3418D53C: EE10 2A10 VMOV R2, S0 0x3418D540: F04F 30FF MOV.W R0, #0xFFFFFFFF 0x3418D544: EE10 3A90 VMOV R3, S1 0x3418D548: EB00 50D2 ADD.W R0, R0, R2, LSR #23 0x3418D54C: 28FD CMP R0, #253 0x3418D54E: D857 BHI 46L14 ; 0x3418D600 0x3418D550: F06F 00FE MVN R0, #254 0x3418D554: EB00 50D3 ADD.W R0, R0, R3, LSR #23 0x3418D558: F110 0FFE CMN R0, #254 0x3418D55C: D350 BCC 46L14 ; 0x3418D600 0x3418D55E: F022 4000 BIC R0, R2, #0x80000000
.L1: 0x3418D562: F002 4C00 AND R12, R2, #0x80000000 0x3418D566: 4283 CMP R3, R0 0x3418D568: D265 BCS 46L17 ; 0x3418D636 0x3418D56A: B510 PUSH 123R4, LR} 0x3418D56C: F64F 7EFF MOVW LR, #0xFFFF 0x3418D570: 0DD1 LSRS R1, R2, #23 0x3418D572: F2C0 0E7F MOVT LR, #127 0x3418D576: B2C9 UXTB R1, R1 0x3418D578: B121 CBZ R1, .L2 ; 0x3418D584 0x3418D57A: EA02 000E AND.W R0, R2, LR 0x3418D57E: F500 0200 ADD.W R2, R0, #0x800000 0x3418D582: E007 B 46L3 ; 0x3418D594
.L2: 0x3418D584: FAB0 F180 CLZ R1, R0 0x3418D588: F1A1 0208 SUB.W R2, R1, #8 0x3418D58C: F1C1 0108 RSB R1, R1, #8 0x3418D590: FA00 F202 LSL.W R2, R0, R2
.L3: 0x3418D594: F3C3 54C7 UBFX R4, R3, #23, #8 0x3418D598: B124 CBZ R4, .L4 ; 0x3418D5A4 0x3418D59A: EA03 000E AND.W R0, R3, LR 0x3418D59E: F500 0300 ADD.W R3, R0, #0x800000 0x3418D5A2: E006 B 46L5 ; 0x3418D5B2
.L4: 0x3418D5A4: FAB3 F083 CLZ R0, R3 0x3418D5A8: F1A0 0408 SUB.W R4, R0, #8 0x3418D5AC: 40A3 LSLS R3, R4 0x3418D5AE: F1C0 0408 RSB R4, R0, #8
.L5: 0x3418D5B2: 42A1 CMP R1, R4 0x3418D5B4: DD09 BLE 46L8 ; 0x3418D5CA
.L6: 0x3418D5B6: 1AD0 SUBS R0, R2, R3 0x3418D5B8: D402 BMI 46L7 ; 0x3418D5C0 0x3418D5BA: 429A CMP R2, R3 0x3418D5BC: 4602 MOV R2, R0 0x3418D5BE: D009 BEQ 46L9 ; 0x3418D5D4
.L7: 0x3418D5C0: 3901 SUBS R1, #1 0x3418D5C2: 0052 LSLS R2, R2, #1 0x3418D5C4: 42A1 CMP R1, R4 0x3418D5C6: DCF6 BGT 46L6 ; 0x3418D5B6 0x3418D5C8: 4621 MOV R1, R4
.L8: 0x3418D5CA: 1AD0 SUBS R0, R2, R3 0x3418D5CC: D405 BMI 46L10 ; 0x3418D5DA 0x3418D5CE: 429A CMP R2, R3 0x3418D5D0: 4602 MOV R2, R0 0x3418D5D2: D102 BNE 46L10 ; 0x3418D5DA
.L9: 0x3418D5D4: EE00 CA90 VMOV S1, R12 0x3418D5D8: E00D B 46L12 ; 0x3418D5F6
.L10: 0x3418D5DA: FAB2 F082 CLZ R0, R2 0x3418D5DE: 3808 SUBS R0, #8 0x3418D5E0: 1A09 SUBS R1, R1, R0 0x3418D5E2: FA02 F000 LSL.W R0, R2, R0 0x3418D5E6: 2900 CMP R1, #0 0x3418D5E8: DD2A BLE 46L18 ; 0x3418D640 0x3418D5EA: 3901 SUBS R1, #1
.L11: 0x3418D5EC: 4460 ADD R0, R12 0x3418D5EE: EB00 50C1 ADD.W R0, R0, R1, LSL #23 0x3418D5F2: EE00 0A90 VMOV S1, R0
.L12: 0x3418D5F6: E8BD 4010 POP.W 123R4, LR}
.L13: 0x3418D5FA: EEB0 0A60 VMOV.F32 S0, S1 0x3418D5FE: 4770 BX LR
.L14: 0x3418D600: EEB4 0A40 VCMP.F32 S0, S0 0x3418D604: EEF1 FA10 VMRS APSR_nzcv, FPSCR 0x3418D608: D60A BVS 46L15 ; 0x3418D620 0x3418D60A: EEF4 0A60 VCMP.F32 S1, S1 0x3418D60E: EEF1 FA10 VMRS APSR_nzcv, FPSCR 0x3418D612: D6F2 BVS 46L13 ; 0x3418D5FA 0x3418D614: F032 4000 BICS R0, R2, #0x80000000 0x3418D618: F023 4300 BIC R3, R3, #0x80000000 0x3418D61C: D103 BNE 46L16 ; 0x3418D626 0x3418D61E: B113 CBZ R3, .L16 ; 0x3418D626
.L15: 0x3418D620: EEF0 0A40 VMOV.F32 S1, S0 0x3418D624: E7E9 B 46L13 ; 0x3418D5FA
.L16: 0x3418D626: F1B0 4FFF CMP.W R0, #0x7F800000 0x3418D62A: BF18 IT NE 0x3418D62C: 2B00 CMPNE R3, #0 0x3418D62E: D10C BNE 46L19 ; 0x3418D64A 0x3418D630: EDDF 0A08 VLDR S1, =0x7FC00000 ; [PC, #32] [0x3418D654] 0x3418D634: E7E1 B 46L13 ; 0x3418D5FA
.L17: 0x3418D636: EE01 CA10 VMOV S2, R12 0x3418D63A: FE41 0A00 VSELEQ.F32 S1, S2, S0 0x3418D63E: E7DC B 46L13 ; 0x3418D5FA
.L18: 0x3418D640: F1C1 0101 RSB R1, R1, #1 0x3418D644: 40C8 LSRS R0, R1 0x3418D646: 2100 MOVS R1, #0 0x3418D648: E7D0 B 46L11 ; 0x3418D5EC
.L19: 0x3418D64A: F1B3 4FFF CMP.W R3, #0x7F800000 0x3418D64E: F47F AF88 BNE.W 46L1 ; 0x3418D562 0x3418D652: E7E5 B 46L15 ; 0x3418D620 0x3418D654: 7FC00000 DC.W 0x7FC00000

Section .text.libc.floorf from floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=104, align=4


floorf: 0x3418D658: EE10 0A10 VMOV R0, S0 0x3418D65C: F3C0 51C7 UBFX R1, R0, #23, #8 0x3418D660: 1E4A SUBS R2, R1, #1 0x3418D662: 2AFE CMP R2, #254 0x3418D664: D224 BCS 46L4 ; 0x3418D6B0 0x3418D666: 297E CMP R1, #126 0x3418D668: D808 BHI 46L2 ; 0x3418D67C 0x3418D66A: ED9F 0A14 VLDR S0, =0x00000000 ; [PC, #80] [0x3418D6BC] 0x3418D66E: EEBF 1A00 VMOV.F32 S2, #-1 0x3418D672: F1B0 3FFF CMP.W R0, #0xFFFFFFFF 0x3418D676: FE30 0A01 VSELGT.F32 S0, S0, S2
.L1: 0x3418D67A: 4770 BX LR
.L2: 0x3418D67C: 2995 CMP R1, #149 0x3418D67E: D8FC BHI 46L1 ; 0x3418D67A 0x3418D680: F1A1 037F SUB.W R3, R1, #127 0x3418D684: 2200 MOVS R2, #0 0x3418D686: F6CF 7280 MOVT R2, #0xFF80 0x3418D68A: F44F 0C00 MOV.W R12, #0x800000 0x3418D68E: 411A ASRS R2, R3 0x3418D690: EA02 0100 AND.W R1, R2, R0 0x3418D694: 4098 LSLS R0, R3 0x3418D696: F1B1 3FFF CMP.W R1, #0xFFFFFFFF 0x3418D69A: 460A MOV R2, R1 0x3418D69C: FA2C FC03 LSR.W R12, R12, R3 0x3418D6A0: BFB8 IT LT 0x3418D6A2: 4462 ADDLT R2, R12 0x3418D6A4: 0240 LSLS R0, R0, #9 0x3418D6A6: EA52 8011 CSEL R0, R2, R1, NE
.L3: 0x3418D6AA: EE00 0A10 VMOV S0, R0 0x3418D6AE: 4770 BX LR
.L4: 0x3418D6B0: 2900 CMP R1, #0 0x3418D6B2: D1FA BNE 46L3 ; 0x3418D6AA 0x3418D6B4: F000 4000 AND R0, R0, #0x80000000 0x3418D6B8: E7F7 B 46L3 ; 0x3418D6AA 0x3418D6BA: BF00 NOP 0x3418D6BC: 00000000 DC.W 0x00000000

Section .rodata.libc.__SEGGER_RTL_aPower2f from utilops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=24, align=4


__SEGGER_RTL_aPower2f: 0x3418D6C0: 00 DC.B 0x00 ; '\0' 0x3418D6C1: 00 DC.B 0x00 ; '\0' 0x3418D6C2: 20 DC.B 0x20 ; ' ' 0x3418D6C3: 41 DC.B 0x41 ; 'A' 0x3418D6C4: 00 DC.B 0x00 ; '\0' 0x3418D6C5: 00 DC.B 0x00 ; '\0' 0x3418D6C6: C8 DC.B 0xC8 ; '\xC8' 0x3418D6C7: 42 DC.B 0x42 ; 'B' 0x3418D6C8: 00 DC.B 0x00 ; '\0' 0x3418D6C9: 40 DC.B 0x40 ; '@' 0x3418D6CA: 1C DC.B 0x1C ; '\x1C' 0x3418D6CB: 46 DC.B 0x46 ; 'F' 0x3418D6CC: 20 DC.B 0x20 ; ' ' 0x3418D6CD: BC DC.B 0xBC ; '\xBC' 0x3418D6CE: BE DC.B 0xBE ; '\xBE' 0x3418D6CF: 4C DC.B 0x4C ; 'L' 0x3418D6D0: CA DC.B 0xCA ; '\xCA' 0x3418D6D1: 1B DC.B 0x1B ; '\x1B' 0x3418D6D2: 0E DC.B 0x0E ; '\x0E' 0x3418D6D3: 5A DC.B 0x5A ; 'Z' 0x3418D6D4: AE DC.B 0xAE ; '\xAE' 0x3418D6D5: C5 DC.B 0xC5 ; '\xC5' 0x3418D6D6: 9D DC.B 0x9D ; '\x9D' 0x3418D6D7: 74 DC.B 0x74 ; 't'

Section .text.libc.__aeabi_ul2f from floatasmops_arm.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=84, align=4


__aeabi_ul2f: 0x3418D6D8: B1C1 CBZ R1, .L1 ; 0x3418D70C 0x3418D6DA: FAB1 F381 CLZ R3, R1 0x3418D6DE: F1D3 02BD RSBS R2, R3, #189 0x3418D6E2: 4099 LSLS R1, R3 0x3418D6E4: FA10 FC03 LSLS.W R12, R0, R3 0x3418D6E8: BF18 IT NE 0x3418D6EA: F041 0101 ORRNE R1, R1, #1 0x3418D6EE: F1D3 0320 RSBS R3, R3, #32 0x3418D6F2: FA30 F303 LSRS.W R3, R0, R3 0x3418D6F6: 4319 ORRS R1, R3 0x3418D6F8: 05D2 LSLS R2, R2, #23 0x3418D6FA: 064B LSLS R3, R1, #25 0x3418D6FC: EB42 2011 ADC.W R0, R2, R1, LSR #8 0x3418D700: BF38 IT CC 0x3418D702: 4770 BXCC LR 0x3418D704: BF08 IT EQ 0x3418D706: F020 0001 BICEQ R0, R0, #1 0x3418D70A: 4770 BX LR
.L1: 0x3418D70C: B168 CBZ R0, .L2 ; 0x3418D72A 0x3418D70E: FAB0 F380 CLZ R3, R0 0x3418D712: 4098 LSLS R0, R3 0x3418D714: F1D3 029D RSBS R2, R3, #157 0x3418D718: 05D2 LSLS R2, R2, #23 0x3418D71A: 0643 LSLS R3, R0, #25 0x3418D71C: EB42 2010 ADC.W R0, R2, R0, LSR #8 0x3418D720: BF38 IT CC 0x3418D722: 4770 BXCC LR 0x3418D724: BF08 IT EQ 0x3418D726: F020 0001 BICEQ R0, R0, #1
.L2: 0x3418D72A: 4770 BX LR

Section .text.libc.memcpy from strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=92, align=4


memcpy: __aeabi_memcpy: 0x3418D72C: B35A CBZ R2, .L9 ; 0x3418D786 0x3418D72E: 4684 MOV R12, R0 0x3418D730: EA90 0301 EORS.W R3, R0, R1 0x3418D734: 079B LSLS R3, R3, #30 0x3418D736: D11F BNE 46L7 ; 0x3418D778
.L1: 0x3418D738: 0783 LSLS R3, R0, #30 0x3418D73A: D007 BEQ 46L2 ; 0x3418D74C 0x3418D73C: F811 3B01 LDRB R3, [R1], #1 0x3418D740: F800 3B01 STRB R3, [R0], #1 0x3418D744: 1E52 SUBS R2, R2, #1 0x3418D746: D1F7 BNE 46L1 ; 0x3418D738 0x3418D748: E01C B 46L8 ; 0x3418D784
__aeabi_memcpy4: __aeabi_memcpy8: 0x3418D74A: 4684 MOV R12, R0
.L2: 0x3418D74C: 3A20 SUBS R2, #32 0x3418D74E: D309 BCC 46L4 ; 0x3418D764 0x3418D750: E92D 07F0 PUSH.W 123R4-R10}
.L3: 0x3418D754: E8B1 07F8 LDM.W R1!, {R3-R10} 0x3418D758: E8A0 07F8 STM.W R0!, {R3-R10} 0x3418D75C: 3A20 SUBS R2, #32 0x3418D75E: D2F9 BCS 46L3 ; 0x3418D754 0x3418D760: E8BD 07F0 POP.W 123R4-R10}
.L4: 0x3418D764: 321C ADDS R2, #28 0x3418D766: D405 BMI 46L6 ; 0x3418D774
.L5: 0x3418D768: F851 3B04 LDR R3, [R1], #4 0x3418D76C: F840 3B04 STR R3, [R0], #4 0x3418D770: 1F12 SUBS R2, R2, #4 0x3418D772: D2F9 BCS 46L5 ; 0x3418D768
.L6: 0x3418D774: 3204 ADDS R2, #4 0x3418D776: D005 BEQ 46L8 ; 0x3418D784
.L7: 0x3418D778: F811 3B01 LDRB R3, [R1], #1 0x3418D77C: F800 3B01 STRB R3, [R0], #1 0x3418D780: 1E52 SUBS R2, R2, #1 0x3418D782: D1F9 BNE 46L7 ; 0x3418D778
.L8: 0x3418D784: 4660 MOV R0, R12
.L9: 0x3418D786: 4770 BX LR

Section .text.libc.__aeabi_memclr from strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=104, align=4


__aeabi_memclr: __aeabi_memclr8: __aeabi_memclr4: 0x3418D788: 2200 MOVS R2, #0
__aeabi_memset8: __aeabi_memset4: __aeabi_memset: 0x3418D78A: 000B MOVS R3, R1 0x3418D78C: 0011 MOVS R1, R2 0x3418D78E: 001A MOVS R2, R3
memset: 0x3418D790: 4684 MOV R12, R0 0x3418D792: B35A CBZ R2, .L7 ; 0x3418D7EC
.L1: 0x3418D794: 0783 LSLS R3, R0, #30 0x3418D796: D004 BEQ 46L2 ; 0x3418D7A2 0x3418D798: F800 1B01 STRB R1, [R0], #1 0x3418D79C: 1E52 SUBS R2, R2, #1 0x3418D79E: D1F9 BNE 46L1 ; 0x3418D794 0x3418D7A0: E024 B 46L7 ; 0x3418D7EC
.L2: 0x3418D7A2: B2C9 UXTB R1, R1 0x3418D7A4: EA41 2101 ORR.W R1, R1, R1, LSL #8 0x3418D7A8: EA41 4101 ORR.W R1, R1, R1, LSL #16 0x3418D7AC: 2A20 CMP R2, #32 0x3418D7AE: D311 BCC 46L4 ; 0x3418D7D4 0x3418D7B0: 3A20 SUBS R2, #32 0x3418D7B2: E92D 03F0 PUSH.W 123R4-R9} 0x3418D7B6: 460B MOV R3, R1 0x3418D7B8: 460C MOV R4, R1 0x3418D7BA: 460D MOV R5, R1 0x3418D7BC: 460E MOV R6, R1 0x3418D7BE: 460F MOV R7, R1 0x3418D7C0: 4688 MOV R8, R1 0x3418D7C2: 4689 MOV R9, R1
.L3: 0x3418D7C4: E8A0 03FA STM.W R0!, {R1, R3-R9} 0x3418D7C8: 3A20 SUBS R2, #32 0x3418D7CA: D2FB BCS 46L3 ; 0x3418D7C4 0x3418D7CC: E8BD 03F0 POP.W 123R4-R9} 0x3418D7D0: 3220 ADDS R2, #32 0x3418D7D2: D00B BEQ 46L7 ; 0x3418D7EC
.L4: 0x3418D7D4: 2A04 CMP R2, #4 0x3418D7D6: D305 BCC 46L6 ; 0x3418D7E4
.L5: 0x3418D7D8: F840 1B04 STR R1, [R0], #4 0x3418D7DC: 1F12 SUBS R2, R2, #4 0x3418D7DE: D005 BEQ 46L7 ; 0x3418D7EC 0x3418D7E0: 2A04 CMP R2, #4 0x3418D7E2: D2F9 BCS 46L5 ; 0x3418D7D8
.L6: 0x3418D7E4: F800 1B01 STRB R1, [R0], #1 0x3418D7E8: 1E52 SUBS R2, R2, #1 0x3418D7EA: D1FB BNE 46L6 ; 0x3418D7E4
.L7: 0x3418D7EC: 4660 MOV R0, R12 0x3418D7EE: 4770 BX LR

Section .rodata.libc.__SEGGER_RTL_c_locale from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=12, align=4


__SEGGER_RTL_c_locale: 0x3418D7F0: 341942F4 DC.W 341942F4 ; R_ARM_ABS32 0x3418D7F4: 3418D81C DC.W __SEGGER_RTL_c_locale_data 0x3418D7F8: 3418D7FC DC.W __SEGGER_RTL_codeset_ascii

Section .rodata.libc.__SEGGER_RTL_codeset_ascii from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=32, align=4


__SEGGER_RTL_codeset_ascii: 0x3418D7FC: 34194099 DC.W __SEGGER_RTL_ascii_isctype 0x3418D800: 341940B9 DC.W __SEGGER_RTL_ascii_toupper 0x3418D804: 341940C5 DC.W __SEGGER_RTL_ascii_tolower 0x3418D808: 341940D1 DC.W __SEGGER_RTL_ascii_iswctype 0x3418D80C: 341940F1 DC.W __SEGGER_RTL_ascii_towupper 0x3418D810: 341940FD DC.W __SEGGER_RTL_ascii_towlower 0x3418D814: 34193D33 DC.W __SEGGER_RTL_ascii_wctomb 0x3418D818: 34194069 DC.W __SEGGER_RTL_ascii_mbtowc

Section .rodata.libc.__SEGGER_RTL_c_locale_data from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=88, align=4


__SEGGER_RTL_c_locale_data: 0x3418D81C: 341942F6 DC.W __SEGGER_RTL_data_utf8_period 0x3418D820: 34194429 DC.W __SEGGER_RTL_data_empty_string 0x3418D824: 34194429 DC.W __SEGGER_RTL_data_empty_string 0x3418D828: 34194429 DC.W __SEGGER_RTL_data_empty_string 0x3418D82C: 34194429 DC.W __SEGGER_RTL_data_empty_string 0x3418D830: 34194429 DC.W __SEGGER_RTL_data_empty_string 0x3418D834: 34194429 DC.W __SEGGER_RTL_data_empty_string 0x3418D838: 34194429 DC.W __SEGGER_RTL_data_empty_string 0x3418D83C: 34194429 DC.W __SEGGER_RTL_data_empty_string 0x3418D840: 34194429 DC.W __SEGGER_RTL_data_empty_string 0x3418D844: FF DC.B 0xFF ; '\xFF' 0x3418D845: FF DC.B 0xFF ; '\xFF' 0x3418D846: FF DC.B 0xFF ; '\xFF' 0x3418D847: FF DC.B 0xFF ; '\xFF' 0x3418D848: FF DC.B 0xFF ; '\xFF' 0x3418D849: FF DC.B 0xFF ; '\xFF' 0x3418D84A: FF DC.B 0xFF ; '\xFF' 0x3418D84B: FF DC.B 0xFF ; '\xFF' 0x3418D84C: FF DC.B 0xFF ; '\xFF' 0x3418D84D: FF DC.B 0xFF ; '\xFF' 0x3418D84E: FF DC.B 0xFF ; '\xFF' 0x3418D84F: FF DC.B 0xFF ; '\xFF' 0x3418D850: FF DC.B 0xFF ; '\xFF' 0x3418D851: FF DC.B 0xFF ; '\xFF' 0x3418D852: 00 DC.B 0x00 ; '\0' 0x3418D853: 00 DC.B 0x00 ; '\0' 0x3418D854: 341942BA DC.W __SEGGER_RTL_c_locale_day_names 0x3418D858: 341943DB DC.W __SEGGER_RTL_c_locale_abbrev_day_names 0x3418D85C: 3419410F DC.W __SEGGER_RTL_c_locale_month_names 0x3418D860: 341943F8 DC.W __SEGGER_RTL_c_locale_abbrev_month_names 0x3418D864: 34194166 DC.W __SEGGER_RTL_c_locale_am_pm_indicator 0x3418D868: 341943C9 DC.W __SEGGER_RTL_c_locale_date_format 0x3418D86C: 341943D2 DC.W __SEGGER_RTL_c_locale_time_format 0x3418D870: 3419416D DC.W __SEGGER_RTL_c_locale_date_time_format

Section .text.MX_BSEC_Init from blto2_FSBL_lto.o, size=2, align=4


MX_BSEC_Init: 0x3418D874: 4770 BX LR

Section .rodata..L__const.sfdp_getfrequencevalue.freqMhz_table from blto2_FSBL_lto.o, size=26, align=2

  0x3418D876:  00           DC.B       0x00                     ; '\0'
  0x3418D877:  00           DC.B       0x00                     ; '\0'
  0x3418D878:  21           DC.B       0x21                     ; '!'
  0x3418D879:  00           DC.B       0x00                     ; '\0'
  0x3418D87A:  32           DC.B       0x32                     ; '2'
  0x3418D87B:  00           DC.B       0x00                     ; '\0'
  0x3418D87C:  42           DC.B       0x42                     ; 'B'
  0x3418D87D:  00           DC.B       0x00                     ; '\0'
  0x3418D87E:  50           DC.B       0x50                     ; 'P'
  0x3418D87F:  00           DC.B       0x00                     ; '\0'
  0x3418D880:  64           DC.B       0x64                     ; 'd'
  0x3418D881:  00           DC.B       0x00                     ; '\0'
  0x3418D882:  85           DC.B       0x85                     ; '\x85'
  0x3418D883:  00           DC.B       0x00                     ; '\0'
  0x3418D884:  A6           DC.B       0xA6                     ; '\xA6'
  0x3418D885:  00           DC.B       0x00                     ; '\0'
  0x3418D886:  C8           DC.B       0xC8                     ; '\xC8'
  0x3418D887:  00           DC.B       0x00                     ; '\0'
  0x3418D888:  FA           DC.B       0xFA                     ; '\xFA'
  0x3418D889:  00           DC.B       0x00                     ; '\0'
  0x3418D88A:  0A           DC.B       0x0A                     ; '\n'
  0x3418D88B:  01           DC.B       0x01                     ; '\x01'
  0x3418D88C:  4D           DC.B       0x4D                     ; 'M'
  0x3418D88D:  01           DC.B       0x01                     ; '\x01'
  0x3418D88E:  90           DC.B       0x90                     ; '\x90'
  0x3418D88F:  01           DC.B       0x01                     ; '\x01'

Section .text.MX_EXTMEM_MANAGER_Init from blto2_FSBL_lto.o, size=62, align=4


MX_EXTMEM_MANAGER_Init: 0x3418D890: B580 PUSH 123R7, LR} 0x3418D892: B082 SUB SP, SP, #8 0x3418D894: F240 0000 MOVW R0, #0 ; 0x34000000 = extmem_list_config 0x3418D898: F2C3 4000 MOVT R0, #0x3400 ; 0x34000000 = extmem_list_config 0x3418D89C: 9000 STR R0, [SP, #0] 0x3418D89E: 21AC MOVS R1, #172 0x3418D8A0: F7FF FF72 BL __aeabi_memclr ; 0x3418D788 0x3418D8A4: 9A00 LDR R2, [SP, #0] 0x3418D8A6: 2000 MOVS R0, #0 0x3418D8A8: 9001 STR R0, [SP, #4] 0x3418D8AA: 7010 STRB R0, [R2] 0x3418D8AC: F240 213C MOVW R1, #0x023C ; 0x3400023C = hxspi2 0x3418D8B0: F2C3 4100 MOVT R1, #0x3400 ; 0x3400023C = hxspi2 0x3418D8B4: 6051 STR R1, [R2, #4] 0x3418D8B6: 2103 MOVS R1, #3 0x3418D8B8: 7211 STRB R1, [R2, #8] 0x3418D8BA: F44F 0100 MOV.W R1, #0x800000 0x3418D8BE: F002 FDA7 BL HAL_RCCEx_GetPeriphCLKFreq ; 0x34190410 0x3418D8C2: 4601 MOV R1, R0 0x3418D8C4: 9801 LDR R0, [SP, #4] 0x3418D8C6: F006 F803 BL EXTMEM_Init ; 0x341938D0 0x3418D8CA: B002 ADD SP, SP, #8 0x3418D8CC: BD80 POP 123R7, PC}

Section .init.PVD_PVM_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


PVD_PVM_IRQHandler: 0x3418D8CE: E7FE B PVD_PVM_IRQHandler ; 0x3418D8CE

Section .text.MX_GPIO_Init from blto2_FSBL_lto.o, size=134, align=4


MX_GPIO_Init: 0x3418D8D0: B580 PUSH 123R7, LR} 0x3418D8D2: B08C SUB SP, SP, #48 0x3418D8D4: 2000 MOVS R0, #0 0x3418D8D6: 9004 STR R0, [SP, #16] 0x3418D8D8: 900B STR R0, [SP, #44] 0x3418D8DA: 900A STR R0, [SP, #40] 0x3418D8DC: 9009 STR R0, [SP, #36] 0x3418D8DE: 9008 STR R0, [SP, #32] 0x3418D8E0: 9007 STR R0, [SP, #28] 0x3418D8E2: F44F 5000 MOV.W R0, #0x2000 0x3418D8E6: F000 F837 BL LL_AHB4_GRP1_EnableClock ; 0x3418D958 0x3418D8EA: 2002 MOVS R0, #2 0x3418D8EC: F000 F834 BL LL_AHB4_GRP1_EnableClock ; 0x3418D958 0x3418D8F0: 2040 MOVS R0, #64 0x3418D8F2: F000 F831 BL LL_AHB4_GRP1_EnableClock ; 0x3418D958 0x3418D8F6: 2001 MOVS R0, #1 0x3418D8F8: 9003 STR R0, [SP, #12] 0x3418D8FA: F000 F82D BL LL_AHB4_GRP1_EnableClock ; 0x3418D958 0x3418D8FE: 9A03 LDR R2, [SP, #12] 0x3418D900: F240 4000 MOVW R0, #0x0400 0x3418D904: F2C5 6002 MOVT R0, #0x5602 0x3418D908: 9002 STR R0, [SP, #8] 0x3418D90A: F44F 5180 MOV.W R1, #0x1000 0x3418D90E: 9101 STR R1, [SP, #4] 0x3418D910: F000 FD58 BL HAL_GPIO_WritePin ; 0x3418E3C4 0x3418D914: 9903 LDR R1, [SP, #12] 0x3418D916: 9A04 LDR R2, [SP, #16] 0x3418D918: F641 0000 MOVW R0, #0x1800 0x3418D91C: F2C5 6002 MOVT R0, #0x5602 0x3418D920: 9005 STR R0, [SP, #20] 0x3418D922: F000 FD4F BL HAL_GPIO_WritePin ; 0x3418E3C4 0x3418D926: 9B01 LDR R3, [SP, #4] 0x3418D928: 9802 LDR R0, [SP, #8] 0x3418D92A: 9A03 LDR R2, [SP, #12] 0x3418D92C: 9904 LDR R1, [SP, #16] 0x3418D92E: 9307 STR R3, [SP, #28] 0x3418D930: 9208 STR R2, [SP, #32] 0x3418D932: 9109 STR R1, [SP, #36] 0x3418D934: 910A STR R1, [SP, #40] 0x3418D936: A907 ADD R1, SP, #28 0x3418D938: 9106 STR R1, [SP, #24] 0x3418D93A: F7F4 F919 BL HAL_GPIO_Init ; 0x34181B70 0x3418D93E: 9B03 LDR R3, [SP, #12] 0x3418D940: 9A04 LDR R2, [SP, #16] 0x3418D942: 9805 LDR R0, [SP, #20] 0x3418D944: 9906 LDR R1, [SP, #24] 0x3418D946: 9307 STR R3, [SP, #28] 0x3418D948: 9308 STR R3, [SP, #32] 0x3418D94A: 9209 STR R2, [SP, #36] 0x3418D94C: 920A STR R2, [SP, #40] 0x3418D94E: F7F4 F90F BL HAL_GPIO_Init ; 0x34181B70 0x3418D952: B00C ADD SP, SP, #48 0x3418D954: BD80 POP 123R7, PC}

Section .init.DTS_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


DTS_IRQHandler: 0x3418D956: E7FE B DTS_IRQHandler ; 0x3418D956

Section .text.LL_AHB4_GRP1_EnableClock from blto2_FSBL_lto.o, size=34, align=4


LL_AHB4_GRP1_EnableClock: 0x3418D958: B082 SUB SP, SP, #8 0x3418D95A: 9001 STR R0, [SP, #4] 0x3418D95C: 9801 LDR R0, [SP, #4] 0x3418D95E: F648 215C MOVW R1, #0x8A5C 0x3418D962: F2C5 6102 MOVT R1, #0x5602 0x3418D966: 6008 STR R0, [R1] 0x3418D968: F248 205C MOVW R0, #0x825C 0x3418D96C: F2C5 6002 MOVT R0, #0x5602 0x3418D970: 6800 LDR R0, [R0] 0x3418D972: 9000 STR R0, [SP, #0] 0x3418D974: 9800 LDR R0, [SP, #0] 0x3418D976: B002 ADD SP, SP, #8 0x3418D978: 4770 BX LR

Section .init.RCC_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


RCC_IRQHandler: 0x3418D97A: E7FE B RCC_IRQHandler ; 0x3418D97A

Section .text.main from blto2_FSBL_lto.o, size=362, align=4


main: 0x3418D97C: B580 PUSH 123R7, LR} 0x3418D97E: B088 SUB SP, SP, #32 0x3418D980: 2000 MOVS R0, #0 0x3418D982: 9004 STR R0, [SP, #16] 0x3418D984: F64E 5014 MOVW R0, #0xED14 0x3418D988: F2CE 0000 MOVT R0, #0xE000 0x3418D98C: 6800 LDR R0, [R0] 0x3418D98E: 0380 LSLS R0, R0, #14 0x3418D990: 2800 CMP R0, #0 0x3418D992: D500 BPL 46L1 ; 0x3418D996 0x3418D994: E019 B 46L2 ; 0x3418D9CA
.L1: 0x3418D996: F3BF 8F4F DSB SY 0x3418D99A: F3BF 8F6F ISB SY 0x3418D99E: F64E 7150 MOVW R1, #0xEF50 0x3418D9A2: F2CE 0100 MOVT R1, #0xE000 0x3418D9A6: 2000 MOVS R0, #0 0x3418D9A8: 6008 STR R0, [R1] 0x3418D9AA: F3BF 8F4F DSB SY 0x3418D9AE: F3BF 8F6F ISB SY 0x3418D9B2: F64E 5114 MOVW R1, #0xED14 0x3418D9B6: F2CE 0100 MOVT R1, #0xE000 0x3418D9BA: 6808 LDR R0, [R1] 0x3418D9BC: F440 3000 ORR R0, R0, #0x020000 0x3418D9C0: 6008 STR R0, [R1] 0x3418D9C2: F3BF 8F4F DSB SY 0x3418D9C6: F3BF 8F6F ISB SY
.L2: 0x3418D9CA: F64E 5014 MOVW R0, #0xED14 0x3418D9CE: F2CE 0000 MOVT R0, #0xE000 0x3418D9D2: 6800 LDR R0, [R0] 0x3418D9D4: 03C0 LSLS R0, R0, #15 0x3418D9D6: 2800 CMP R0, #0 0x3418D9D8: D500 BPL 46L3 ; 0x3418D9DC 0x3418D9DA: E039 B 46L8 ; 0x3418DA50
.L3: 0x3418D9DC: F64E 5184 MOVW R1, #0xED84 0x3418D9E0: F2CE 0100 MOVT R1, #0xE000 0x3418D9E4: 2000 MOVS R0, #0 0x3418D9E6: 6008 STR R0, [R1] 0x3418D9E8: F3BF 8F4F DSB SY 0x3418D9EC: F64E 5080 MOVW R0, #0xED80 0x3418D9F0: F2CE 0000 MOVT R0, #0xE000 0x3418D9F4: 6800 LDR R0, [R0] 0x3418D9F6: 9007 STR R0, [SP, #28] 0x3418D9F8: 9807 LDR R0, [SP, #28] 0x3418D9FA: F3C0 304E UBFX R0, R0, #13, #15 0x3418D9FE: 9006 STR R0, [SP, #24]
.L4: 0x3418DA00: 9807 LDR R0, [SP, #28] 0x3418DA02: F3C0 00C9 UBFX R0, R0, #3, #10 0x3418DA06: 9005 STR R0, [SP, #20]
.L5: 0x3418DA08: 9906 LDR R1, [SP, #24] 0x3418DA0A: 9805 LDR R0, [SP, #20] 0x3418DA0C: 0780 LSLS R0, R0, #30 0x3418DA0E: F361 104D BFI R0, R1, #5, #9 0x3418DA12: F64E 7160 MOVW R1, #0xEF60 0x3418DA16: F2CE 0100 MOVT R1, #0xE000 0x3418DA1A: 6008 STR R0, [R1] 0x3418DA1C: 9805 LDR R0, [SP, #20] 0x3418DA1E: 1E41 SUBS R1, R0, #1 0x3418DA20: 9105 STR R1, [SP, #20] 0x3418DA22: B108 CBZ R0, .L6 ; 0x3418DA28 0x3418DA24: F02F C011 LE 46L5 ; 0x3418DA08
.L6: 0x3418DA28: 9806 LDR R0, [SP, #24] 0x3418DA2A: 1E41 SUBS R1, R0, #1 0x3418DA2C: 9106 STR R1, [SP, #24] 0x3418DA2E: B108 CBZ R0, .L7 ; 0x3418DA34 0x3418DA30: F02F C01B LE 46L4 ; 0x3418DA00
.L7: 0x3418DA34: F3BF 8F4F DSB SY 0x3418DA38: F64E 5114 MOVW R1, #0xED14 0x3418DA3C: F2CE 0100 MOVT R1, #0xE000 0x3418DA40: 6808 LDR R0, [R1] 0x3418DA42: F440 3080 ORR R0, R0, #0x010000 0x3418DA46: 6008 STR R0, [R1] 0x3418DA48: F3BF 8F4F DSB SY 0x3418DA4C: F3BF 8F6F ISB SY
.L8: 0x3418DA50: F7F3 FF04 BL HAL_Init ; 0x3418185C 0x3418DA54: F000 F848 BL SystemClock_Config ; 0x3418DAE8 0x3418DA58: F000 F8C6 BL OTP_Config ; 0x3418DBE8 0x3418DA5C: B108 CBZ R0, .L9 ; 0x3418DA62 0x3418DA5E: F7F2 FE75 BL Error_Handler ; 0x3418074C
.L9: 0x3418DA62: F7FF FF35 BL MX_GPIO_Init ; 0x3418D8D0 0x3418DA66: F000 FA2F BL MX_XSPI2_Init ; 0x3418DEC8 0x3418DA6A: F7FF FF03 BL MX_BSEC_Init ; 0x3418D874 0x3418DA6E: F7FF FF0F BL MX_EXTMEM_MANAGER_Init ; 0x3418D890 0x3418DA72: 2000 MOVS R0, #0 0x3418DA74: 9003 STR R0, [SP, #12]
.L10: 0x3418DA76: 9803 LDR R0, [SP, #12] 0x3418DA78: F5B0 7F7A CMP.W R0, #0x03E8 0x3418DA7C: DA2C BGE 46L11 ; 0x3418DAD8 0x3418DA7E: F641 0000 MOVW R0, #0x1800 0x3418DA82: F2C5 6002 MOVT R0, #0x5602 0x3418DA86: 9000 STR R0, [SP, #0] 0x3418DA88: 2201 MOVS R2, #1 0x3418DA8A: 9201 STR R2, [SP, #4] 0x3418DA8C: 4611 MOV R1, R2 0x3418DA8E: F000 FC99 BL HAL_GPIO_WritePin ; 0x3418E3C4 0x3418DA92: 2032 MOVS R0, #50 0x3418DA94: 9002 STR R0, [SP, #8] 0x3418DA96: F000 FADB BL HAL_Delay ; 0x3418E050 0x3418DA9A: 9800 LDR R0, [SP, #0] 0x3418DA9C: 9901 LDR R1, [SP, #4] 0x3418DA9E: 2200 MOVS R2, #0 0x3418DAA0: F000 FC90 BL HAL_GPIO_WritePin ; 0x3418E3C4 0x3418DAA4: 9802 LDR R0, [SP, #8] 0x3418DAA6: F000 FAD3 BL HAL_Delay ; 0x3418E050 0x3418DAAA: 9903 LDR R1, [SP, #12] 0x3418DAAC: F240 708C MOVW R0, #0x078C ; 0x3400078C = SystemCoreClock 0x3418DAB0: F2C3 4000 MOVT R0, #0x3400 ; 0x3400078C = SystemCoreClock 0x3418DAB4: 6800 LDR R0, [R0] 0x3418DAB6: F64D 6283 MOVW R2, #0xDE83 0x3418DABA: F2C4 321B MOVT R2, #0x431B 0x3418DABE: FBA0 2002 UMULL R2, R0, R0, R2 0x3418DAC2: 0C82 LSRS R2, R0, #18 0x3418DAC4: F244 3019 MOVW R0, #0x4319 ; 0x34194319 = .rodata..L.str 0x3418DAC8: F2C3 4019 MOVT R0, #0x3419 ; 0x34194319 = .rodata..L.str 0x3418DACC: F006 FA00 BL printf ; 0x34193ED0 0x3418DAD0: 9803 LDR R0, [SP, #12] 0x3418DAD2: 3001 ADDS R0, #1 0x3418DAD4: 9003 STR R0, [SP, #12] 0x3418DAD6: E7CE B 46L10 ; 0x3418DA76
.L11: 0x3418DAD8: F004 FF7E BL BOOT_Application ; 0x341929D8 0x3418DADC: B108 CBZ R0, .L12 ; 0x3418DAE2 0x3418DADE: F7F2 FE35 BL Error_Handler ; 0x3418074C
.L12: 0x3418DAE2: BF00 NOP 0x3418DAE4: E7FD B 46L12 ; 0x3418DAE2

Section .init.LOCKUP_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


LOCKUP_IRQHandler: 0x3418DAE6: E7FE B LOCKUP_IRQHandler ; 0x3418DAE6

Section .text.SystemClock_Config from blto2_FSBL_lto.o, size=254, align=4


SystemClock_Config: 0x3418DAE8: B580 PUSH 123R7, LR} 0x3418DAEA: B0B6 SUB SP, SP, #216 0x3418DAEC: A810 ADD R0, SP, #64 0x3418DAEE: 2198 MOVS R1, #152 0x3418DAF0: F7FF FE4A BL __aeabi_memclr ; 0x3418D788 0x3418DAF4: 4668 MOV R0, SP 0x3418DAF6: 2140 MOVS R1, #64 0x3418DAF8: F7FF FE46 BL __aeabi_memclr ; 0x3418D788 0x3418DAFC: 2000 MOVS R0, #0 0x3418DAFE: F000 FC95 BL HAL_PWREx_ConfigSupply ; 0x3418E42C 0x3418DB02: B108 CBZ R0, .L1 ; 0x3418DB08 0x3418DB04: F7F2 FE22 BL Error_Handler ; 0x3418074C
.L1: 0x3418DB08: 2001 MOVS R0, #1 0x3418DB0A: F000 FCC9 BL HAL_PWREx_ControlVoltageScaling ; 0x3418E4A0 0x3418DB0E: B108 CBZ R0, .L2 ; 0x3418DB14 0x3418DB10: F7F2 FE1C BL Error_Handler ; 0x3418074C
.L2: 0x3418DB14: 2002 MOVS R0, #2 0x3418DB16: 9010 STR R0, [SP, #64] 0x3418DB18: 2008 MOVS R0, #8 0x3418DB1A: 9013 STR R0, [SP, #76] 0x3418DB1C: 2000 MOVS R0, #0 0x3418DB1E: 9014 STR R0, [SP, #80] 0x3418DB20: 9015 STR R0, [SP, #84] 0x3418DB22: 901A STR R0, [SP, #104] 0x3418DB24: 9021 STR R0, [SP, #132] 0x3418DB26: 9028 STR R0, [SP, #160] 0x3418DB28: 902F STR R0, [SP, #188] 0x3418DB2A: A810 ADD R0, SP, #64 0x3418DB2C: F000 FD76 BL HAL_RCC_OscConfig ; 0x3418E61C 0x3418DB30: B108 CBZ R0, .L3 ; 0x3418DB36 0x3418DB32: F7F2 FE0B BL Error_Handler ; 0x3418074C
.L3: 0x3418DB36: 4668 MOV R0, SP 0x3418DB38: F7F4 FD58 BL HAL_RCC_GetClockConfig ; 0x341825EC 0x3418DB3C: 9801 LDR R0, [SP, #4] 0x3418DB3E: F5B0 3F40 CMP.W R0, #0x030000 0x3418DB42: D003 BEQ 46L4 ; 0x3418DB4C 0x3418DB44: 9802 LDR R0, [SP, #8] 0x3418DB46: F1B0 7F40 CMP.W R0, #0x03000000 0x3418DB4A: D10A BNE 46L5 ; 0x3418DB62
.L4: 0x3418DB4C: 2003 MOVS R0, #3 0x3418DB4E: 9000 STR R0, [SP, #0] 0x3418DB50: 2000 MOVS R0, #0 0x3418DB52: 9001 STR R0, [SP, #4] 0x3418DB54: 9002 STR R0, [SP, #8] 0x3418DB56: 4668 MOV R0, SP 0x3418DB58: F001 FD6C BL HAL_RCC_ClockConfig ; 0x3418F634 0x3418DB5C: B108 CBZ R0, .L5 ; 0x3418DB62 0x3418DB5E: F7F2 FDF5 BL Error_Handler ; 0x3418074C
.L5: 0x3418DB62: 2100 MOVS R1, #0 0x3418DB64: 9110 STR R1, [SP, #64] 0x3418DB66: 2202 MOVS R2, #2 0x3418DB68: 921A STR R2, [SP, #104] 0x3418DB6A: 911B STR R1, [SP, #108] 0x3418DB6C: 2001 MOVS R0, #1 0x3418DB6E: 901C STR R0, [SP, #112] 0x3418DB70: 2319 MOVS R3, #25 0x3418DB72: 931E STR R3, [SP, #120] 0x3418DB74: 911D STR R1, [SP, #116] 0x3418DB76: 901F STR R0, [SP, #124] 0x3418DB78: 9020 STR R0, [SP, #128] 0x3418DB7A: 9121 STR R1, [SP, #132] 0x3418DB7C: 9128 STR R1, [SP, #160] 0x3418DB7E: 922F STR R2, [SP, #188] 0x3418DB80: 9130 STR R1, [SP, #192] 0x3418DB82: 2208 MOVS R2, #8 0x3418DB84: 9231 STR R2, [SP, #196] 0x3418DB86: 227D MOVS R2, #125 0x3418DB88: 9233 STR R2, [SP, #204] 0x3418DB8A: 9132 STR R1, [SP, #200] 0x3418DB8C: 9034 STR R0, [SP, #208] 0x3418DB8E: 9035 STR R0, [SP, #212] 0x3418DB90: A810 ADD R0, SP, #64 0x3418DB92: F000 FD43 BL HAL_RCC_OscConfig ; 0x3418E61C 0x3418DB96: B108 CBZ R0, .L6 ; 0x3418DB9C 0x3418DB98: F7F2 FDD8 BL Error_Handler ; 0x3418074C
.L6: 0x3418DB9C: 207F MOVS R0, #127 0x3418DB9E: 9000 STR R0, [SP, #0] 0x3418DBA0: F44F 3040 MOV.W R0, #0x030000 0x3418DBA4: 9001 STR R0, [SP, #4] 0x3418DBA6: F04F 7040 MOV.W R0, #0x03000000 0x3418DBAA: 9002 STR R0, [SP, #8] 0x3418DBAC: F44F 1080 MOV.W R0, #0x100000 0x3418DBB0: 9003 STR R0, [SP, #12] 0x3418DBB2: 2100 MOVS R1, #0 0x3418DBB4: 9104 STR R1, [SP, #16] 0x3418DBB6: 9105 STR R1, [SP, #20] 0x3418DBB8: 9106 STR R1, [SP, #24] 0x3418DBBA: 9107 STR R1, [SP, #28] 0x3418DBBC: 9108 STR R1, [SP, #32] 0x3418DBBE: 2002 MOVS R0, #2 0x3418DBC0: 9009 STR R0, [SP, #36] 0x3418DBC2: 910A STR R1, [SP, #40] 0x3418DBC4: 2004 MOVS R0, #4 0x3418DBC6: 900B STR R0, [SP, #44] 0x3418DBC8: F04F 5240 MOV.W R2, #0x30000000 0x3418DBCC: 920C STR R2, [SP, #48] 0x3418DBCE: 2201 MOVS R2, #1 0x3418DBD0: 920D STR R2, [SP, #52] 0x3418DBD2: 910E STR R1, [SP, #56] 0x3418DBD4: 900F STR R0, [SP, #60] 0x3418DBD6: 4668 MOV R0, SP 0x3418DBD8: F001 FD2C BL HAL_RCC_ClockConfig ; 0x3418F634 0x3418DBDC: B108 CBZ R0, .L7 ; 0x3418DBE2 0x3418DBDE: F7F2 FDB5 BL Error_Handler ; 0x3418074C
.L7: 0x3418DBE2: B036 ADD SP, SP, #216 0x3418DBE4: BD80 POP 123R7, PC}

Section .init.CACHE_ECC_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


CACHE_ECC_IRQHandler: 0x3418DBE6: E7FE B CACHE_ECC_IRQHandler ; 0x3418DBE6

Section .text.OTP_Config from blto2_FSBL_lto.o, size=142, align=4


OTP_Config: 0x3418DBE8: B580 PUSH 123R7, LR} 0x3418DBEA: B086 SUB SP, SP, #24 0x3418DBEC: 2000 MOVS R0, #0 0x3418DBEE: 9000 STR R0, [SP, #0] 0x3418DBF0: 2001 MOVS R0, #1 0x3418DBF2: F000 F841 BL LL_APB4_GRP2_EnableClock ; 0x3418DC78 0x3418DBF6: 2002 MOVS R0, #2 0x3418DBF8: F000 F83E BL LL_APB4_GRP2_EnableClock ; 0x3418DC78 0x3418DBFC: F249 0000 MOVW R0, #0x9000 0x3418DC00: F2C5 6000 MOVT R0, #0x5600 0x3418DC04: 9001 STR R0, [SP, #4] 0x3418DC06: 207C MOVS R0, #124 0x3418DC08: 9005 STR R0, [SP, #20] 0x3418DC0A: 9905 LDR R1, [SP, #20] 0x3418DC0C: A801 ADD R0, SP, #4 0x3418DC0E: AA03 ADD R2, SP, #12 0x3418DC10: F7F3 FE42 BL HAL_BSEC_OTP_Read ; 0x34181898 0x3418DC14: BB48 CBNZ R0, .L6 ; 0x3418DC6A 0x3418DC16: F44F 4000 MOV.W R0, #0x8000 0x3418DC1A: 9004 STR R0, [SP, #16] 0x3418DC1C: 9803 LDR R0, [SP, #12] 0x3418DC1E: 43C0 MVNS R0, R0 0x3418DC20: 9904 LDR R1, [SP, #16] 0x3418DC22: 4208 TST R0, R1 0x3418DC24: D020 BEQ 46L5 ; 0x3418DC68 0x3418DC26: 9904 LDR R1, [SP, #16] 0x3418DC28: 9803 LDR R0, [SP, #12] 0x3418DC2A: 4308 ORRS R0, R1 0x3418DC2C: 9003 STR R0, [SP, #12] 0x3418DC2E: 9905 LDR R1, [SP, #20] 0x3418DC30: 9A03 LDR R2, [SP, #12] 0x3418DC32: A801 ADD R0, SP, #4 0x3418DC34: 2300 MOVS R3, #0 0x3418DC36: F000 FAB1 BL HAL_BSEC_OTP_Program ; 0x3418E19C 0x3418DC3A: B990 CBNZ R0, .L4 ; 0x3418DC62 0x3418DC3C: 9905 LDR R1, [SP, #20] 0x3418DC3E: A801 ADD R0, SP, #4 0x3418DC40: AA03 ADD R2, SP, #12 0x3418DC42: F7F3 FE29 BL HAL_BSEC_OTP_Read ; 0x34181898 0x3418DC46: B940 CBNZ R0, .L2 ; 0x3418DC5A 0x3418DC48: 9803 LDR R0, [SP, #12] 0x3418DC4A: 43C0 MVNS R0, R0 0x3418DC4C: 9904 LDR R1, [SP, #16] 0x3418DC4E: 4208 TST R0, R1 0x3418DC50: D002 BEQ 46L1 ; 0x3418DC58 0x3418DC52: F04F 30FF MOV.W R0, #0xFFFFFFFF 0x3418DC56: 9000 STR R0, [SP, #0]
.L1: 0x3418DC58: E002 B 46L3 ; 0x3418DC60
.L2: 0x3418DC5A: F06F 0001 MVN R0, #1 0x3418DC5E: 9000 STR R0, [SP, #0]
.L3: 0x3418DC60: E002 B 46L5 ; 0x3418DC68
.L4: 0x3418DC62: F06F 0002 MVN R0, #2 0x3418DC66: 9000 STR R0, [SP, #0]
.L5: 0x3418DC68: E002 B 46L7 ; 0x3418DC70
.L6: 0x3418DC6A: F06F 0003 MVN R0, #3 0x3418DC6E: 9000 STR R0, [SP, #0]
.L7: 0x3418DC70: 9800 LDR R0, [SP, #0] 0x3418DC72: B006 ADD SP, SP, #24 0x3418DC74: BD80 POP 123R7, PC}

Section .init.TCM_ECC_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TCM_ECC_IRQHandler: 0x3418DC76: E7FE B TCM_ECC_IRQHandler ; 0x3418DC76

Section .text.LL_APB4_GRP2_EnableClock from blto2_FSBL_lto.o, size=34, align=4


LL_APB4_GRP2_EnableClock: 0x3418DC78: B082 SUB SP, SP, #8 0x3418DC7A: 9001 STR R0, [SP, #4] 0x3418DC7C: 9801 LDR R0, [SP, #4] 0x3418DC7E: F648 2178 MOVW R1, #0x8A78 0x3418DC82: F2C5 6102 MOVT R1, #0x5602 0x3418DC86: 6008 STR R0, [R1] 0x3418DC88: F248 2078 MOVW R0, #0x8278 0x3418DC8C: F2C5 6002 MOVT R0, #0x5602 0x3418DC90: 6800 LDR R0, [R0] 0x3418DC92: 9000 STR R0, [SP, #0] 0x3418DC94: 9800 LDR R0, [SP, #0] 0x3418DC96: B002 ADD SP, SP, #8 0x3418DC98: 4770 BX LR

Section .init.BCK_ECC_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


BCK_ECC_IRQHandler: 0x3418DC9A: E7FE B BCK_ECC_IRQHandler ; 0x3418DC9A

Section .text.assert_failed from blto2_FSBL_lto.o, size=10, align=4


assert_failed: 0x3418DC9C: B082 SUB SP, SP, #8 0x3418DC9E: 9001 STR R0, [SP, #4] 0x3418DCA0: 9100 STR R1, [SP, #0] 0x3418DCA2: B002 ADD SP, SP, #8 0x3418DCA4: 4770 BX LR

Section .init.FPU_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


FPU_IRQHandler: 0x3418DCA6: E7FE B FPU_IRQHandler ; 0x3418DCA6

Section .text.NMI_Handler from blto2_FSBL_lto.o, size=2, align=4


NMI_Handler: 0x3418DCA8: E7FE B NMI_Handler ; 0x3418DCA8

Section .init.RTC_S_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


RTC_S_IRQHandler: 0x3418DCAA: E7FE B RTC_S_IRQHandler ; 0x3418DCAA

Section .text.HardFault_Handler from blto2_FSBL_lto.o, size=2, align=4


HardFault_Handler: 0x3418DCAC: E7FE B HardFault_Handler ; 0x3418DCAC

Section .init.TAMP_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TAMP_IRQHandler: 0x3418DCAE: E7FE B TAMP_IRQHandler ; 0x3418DCAE

Section .text.MemManage_Handler from blto2_FSBL_lto.o, size=2, align=4


MemManage_Handler: 0x3418DCB0: E7FE B MemManage_Handler ; 0x3418DCB0

Section .init.RIFSC_TAMPER_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


RIFSC_TAMPER_IRQHandler: 0x3418DCB2: E7FE B RIFSC_TAMPER_IRQHandler ; 0x3418DCB2

Section .text.BusFault_Handler from blto2_FSBL_lto.o, size=2, align=4


BusFault_Handler: 0x3418DCB4: E7FE B BusFault_Handler ; 0x3418DCB4

Section .init.IAC_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


IAC_IRQHandler: 0x3418DCB6: E7FE B IAC_IRQHandler ; 0x3418DCB6

Section .text.UsageFault_Handler from blto2_FSBL_lto.o, size=2, align=4


UsageFault_Handler: 0x3418DCB8: E7FE B UsageFault_Handler ; 0x3418DCB8

Section .init.RCC_S_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


RCC_S_IRQHandler: 0x3418DCBA: E7FE B RCC_S_IRQHandler ; 0x3418DCBA

Section .text.SVC_Handler from blto2_FSBL_lto.o, size=2, align=4


SVC_Handler: 0x3418DCBC: 4770 BX LR

Section .init.RTC_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


RTC_IRQHandler: 0x3418DCBE: E7FE B RTC_IRQHandler ; 0x3418DCBE

Section .text.DebugMon_Handler from blto2_FSBL_lto.o, size=2, align=4


DebugMon_Handler: 0x3418DCC0: 4770 BX LR

Section .init.IWDG_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


IWDG_IRQHandler: 0x3418DCC2: E7FE B IWDG_IRQHandler ; 0x3418DCC2

Section .text.PendSV_Handler from blto2_FSBL_lto.o, size=2, align=4


PendSV_Handler: 0x3418DCC4: 4770 BX LR

Section .init.WWDG_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


WWDG_IRQHandler: 0x3418DCC6: E7FE B WWDG_IRQHandler ; 0x3418DCC6

Section .text.SystemInit from blto2_FSBL_lto.o, size=510, align=4


SystemInit: 0x3418DCC8: B510 PUSH 123R4, LR} 0x3418DCCA: F240 4000 MOVW R0, #0x0400 ; 0x34180400 = g_pfnVectors 0x3418DCCE: F2C3 4018 MOVT R0, #0x3418 ; 0x34180400 = g_pfnVectors 0x3418DCD2: F64E 5108 MOVW R1, #0xED08 0x3418DCD6: F2CE 0100 MOVT R1, #0xE000 0x3418DCDA: 6008 STR R0, [R1] 0x3418DCDC: F648 2218 MOVW R2, #0x8A18 0x3418DCE0: F2C5 6202 MOVT R2, #0x5602 0x3418DCE4: 2001 MOVS R0, #1 0x3418DCE6: 6010 STR R0, [R2] 0x3418DCE8: F249 2218 MOVW R2, #0x9218 0x3418DCEC: F2C5 6202 MOVT R2, #0x5602 0x3418DCF0: 6010 STR R0, [R2] 0x3418DCF2: F249 2258 MOVW R2, #0x9258 0x3418DCF6: F2C5 6202 MOVT R2, #0x5602 0x3418DCFA: 6010 STR R0, [R2] 0x3418DCFC: F64E 54D8 MOVW R4, #0xEDD8 0x3418DD00: F2CE 0400 MOVT R4, #0xE000 0x3418DD04: 2200 MOVS R2, #0 0x3418DD06: 6022 STR R2, [R4] 0x3418DD08: F64E 5CDC MOVW R12, #0xEDDC 0x3418DD0C: F2CE 0C00 MOVT R12, #0xE000 0x3418DD10: F8CC 2000 STR.W R2, [R12] 0x3418DD14: F64E 53E0 MOVW R3, #0xEDE0 0x3418DD18: F2CE 0300 MOVT R3, #0xE000 0x3418DD1C: 601A STR R2, [R3] 0x3418DD1E: 6020 STR R0, [R4] 0x3418DD20: F8CC 2000 STR.W R2, [R12] 0x3418DD24: 601A STR R2, [R3] 0x3418DD26: F04F 0E02 MOV.W LR, #2 0x3418DD2A: F8C4 E000 STR.W LR, [R4] 0x3418DD2E: F8CC 2000 STR.W R2, [R12] 0x3418DD32: 601A STR R2, [R3] 0x3418DD34: F04F 0E03 MOV.W LR, #3 0x3418DD38: F8C4 E000 STR.W LR, [R4] 0x3418DD3C: F8CC 2000 STR.W R2, [R12] 0x3418DD40: 601A STR R2, [R3] 0x3418DD42: F04F 0E04 MOV.W LR, #4 0x3418DD46: F8C4 E000 STR.W LR, [R4] 0x3418DD4A: F8CC 2000 STR.W R2, [R12] 0x3418DD4E: 601A STR R2, [R3] 0x3418DD50: F04F 0E05 MOV.W LR, #5 0x3418DD54: F8C4 E000 STR.W LR, [R4] 0x3418DD58: F8CC 2000 STR.W R2, [R12] 0x3418DD5C: 601A STR R2, [R3] 0x3418DD5E: F04F 0E06 MOV.W LR, #6 0x3418DD62: F8C4 E000 STR.W LR, [R4] 0x3418DD66: F8CC 2000 STR.W R2, [R12] 0x3418DD6A: 601A STR R2, [R3] 0x3418DD6C: F04F 0E07 MOV.W LR, #7 0x3418DD70: F8C4 E000 STR.W LR, [R4] 0x3418DD74: F8CC 2000 STR.W R2, [R12] 0x3418DD78: 601A STR R2, [R3] 0x3418DD7A: F648 2278 MOVW R2, #0x8A78 0x3418DD7E: F2C5 6202 MOVT R2, #0x5602 0x3418DD82: 6010 STR R0, [R2] 0x3418DD84: F248 2378 MOVW R3, #0x8278 0x3418DD88: F2C5 6302 MOVT R3, #0x5602 0x3418DD8C: 681A LDR R2, [R3] 0x3418DD8E: 680A LDR R2, [R1] 0x3418DD90: F248 0110 MOVW R1, #0x8010 0x3418DD94: F2C5 6100 MOVT R1, #0x5600 0x3418DD98: 600A STR R2, [R1] 0x3418DD9A: F644 0C34 MOVW R12, #0x4834 0x3418DD9E: F2C5 6C02 MOVT R12, #0x5602 0x3418DDA2: F8DC 2000 LDR.W R2, [R12] 0x3418DDA6: F442 7280 ORR R2, R2, #0x0100 0x3418DDAA: F8CC 2000 STR.W R2, [R12] 0x3418DDAE: F644 0C38 MOVW R12, #0x4838 0x3418DDB2: F2C5 6C02 MOVT R12, #0x5602 0x3418DDB6: F8DC 2000 LDR.W R2, [R12] 0x3418DDBA: F442 7280 ORR R2, R2, #0x0100 0x3418DDBE: F8CC 2000 STR.W R2, [R12] 0x3418DDC2: F644 023C MOVW R2, #0x483C 0x3418DDC6: F2C5 6202 MOVT R2, #0x5602 0x3418DDCA: F8D2 C000 LDR.W R12, [R2] 0x3418DDCE: F44C 7C40 ORR R12, R12, #0x0300 0x3418DDD2: F8C2 C000 STR.W R12, [R2] 0x3418DDD6: F248 0E54 MOVW LR, #0x8054 0x3418DDDA: F2C5 6E00 MOVT LR, #0x5600 0x3418DDDE: F240 2C87 MOVW R12, #0x0287 0x3418DDE2: F8CE C000 STR.W R12, [LR] 0x3418DDE6: F248 0E5C MOVW LR, #0x805C 0x3418DDEA: F2C5 6E00 MOVT LR, #0x5600 0x3418DDEE: F8CE C000 STR.W R12, [LR] 0x3418DDF2: F248 0E44 MOVW LR, #0x8044 0x3418DDF6: F2C5 6E00 MOVT LR, #0x5600 0x3418DDFA: F8CE C000 STR.W R12, [LR] 0x3418DDFE: F248 0E4C MOVW LR, #0x804C 0x3418DE02: F2C5 6E00 MOVT LR, #0x5600 0x3418DE06: F8CE C000 STR.W R12, [LR] 0x3418DE0A: F248 0E64 MOVW LR, #0x8064 0x3418DE0E: F2C5 6E00 MOVT LR, #0x5600 0x3418DE12: F8CE C000 STR.W R12, [LR] 0x3418DE16: F8D2 C000 LDR.W R12, [R2] 0x3418DE1A: F44C 5C80 ORR R12, R12, #0x1000 0x3418DE1E: F8C2 C000 STR.W R12, [R2] 0x3418DE22: F8D2 C000 LDR.W R12, [R2] 0x3418DE26: F04C 0C10 ORR R12, R12, #16 0x3418DE2A: F8C2 C000 STR.W R12, [R2] 0x3418DE2E: 6812 LDR R2, [R2] 0x3418DE30: F248 2C74 MOVW R12, #0x8274 0x3418DE34: F2C5 6C02 MOVT R12, #0x5602 0x3418DE38: F8DC 2000 LDR.W R2, [R12] 0x3418DE3C: F442 4200 ORR R2, R2, #0x8000 0x3418DE40: F8CC 2000 STR.W R2, [R12] 0x3418DE44: 681A LDR R2, [R3] 0x3418DE46: F042 0210 ORR R2, R2, #16 0x3418DE4A: 601A STR R2, [R3] 0x3418DE4C: 681A LDR R2, [R3] 0x3418DE4E: 681A LDR R2, [R3] 0x3418DE50: F022 0210 BIC R2, R2, #16 0x3418DE54: 601A STR R2, [R3] 0x3418DE56: F648 2320 MOVW R3, #0x8A20 0x3418DE5A: F2C5 6302 MOVT R3, #0x5602 0x3418DE5E: F44F 5240 MOV.W R2, #0x3000 0x3418DE62: 601A STR R2, [R3] 0x3418DE64: F249 2320 MOVW R3, #0x9220 0x3418DE68: F2C5 6302 MOVT R3, #0x5602 0x3418DE6C: 601A STR R2, [R3] 0x3418DE6E: F648 2224 MOVW R2, #0x8A24 0x3418DE72: F2C5 6202 MOVT R2, #0x5602 0x3418DE76: 6010 STR R0, [R2] 0x3418DE78: F249 2224 MOVW R2, #0x9224 0x3418DE7C: F2C5 6202 MOVT R2, #0x5602 0x3418DE80: 6010 STR R0, [R2] 0x3418DE82: F249 2264 MOVW R2, #0x9264 0x3418DE86: F2C5 6202 MOVT R2, #0x5602 0x3418DE8A: 6010 STR R0, [R2] 0x3418DE8C: F249 235C MOVW R3, #0x925C 0x3418DE90: F2C5 6302 MOVT R3, #0x5602 0x3418DE94: 2240 MOVS R2, #64 0x3418DE96: 601A STR R2, [R3] 0x3418DE98: 6809 LDR R1, [R1] 0x3418DE9A: F249 2178 MOVW R1, #0x9278 0x3418DE9E: F2C5 6102 MOVT R1, #0x5602 0x3418DEA2: 6008 STR R0, [R1] 0x3418DEA4: F64E 5188 MOVW R1, #0xED88 0x3418DEA8: F2CE 0100 MOVT R1, #0xE000 0x3418DEAC: 6808 LDR R0, [R1] 0x3418DEAE: F440 0070 ORR R0, R0, #0xF00000 0x3418DEB2: 6008 STR R0, [R1] 0x3418DEB4: F64E 5188 MOVW R1, #0xED88 0x3418DEB8: F2CE 0102 MOVT R1, #0xE002 0x3418DEBC: 6808 LDR R0, [R1] 0x3418DEBE: F440 0070 ORR R0, R0, #0xF00000 0x3418DEC2: 6008 STR R0, [R1] 0x3418DEC4: BD10 POP 123R4, PC}

Section .init.EXTI0_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI0_IRQHandler: 0x3418DEC6: E7FE B EXTI0_IRQHandler ; 0x3418DEC6

Section .text.MX_XSPI2_Init from blto2_FSBL_lto.o, size=126, align=4


MX_XSPI2_Init: 0x3418DEC8: B580 PUSH 123R7, LR} 0x3418DECA: B086 SUB SP, SP, #24 0x3418DECC: 2100 MOVS R1, #0 0x3418DECE: 9101 STR R1, [SP, #4] 0x3418DED0: 9105 STR R1, [SP, #20] 0x3418DED2: 9104 STR R1, [SP, #16] 0x3418DED4: 9103 STR R1, [SP, #12] 0x3418DED6: F240 203C MOVW R0, #0x023C ; 0x3400023C = hxspi2 0x3418DEDA: F2C3 4000 MOVT R0, #0x3400 ; 0x3400023C = hxspi2 0x3418DEDE: 9002 STR R0, [SP, #8] 0x3418DEE0: F24A 0200 MOVW R2, #0xA000 0x3418DEE4: F6C5 0202 MOVT R2, #0x5802 0x3418DEE8: 6002 STR R2, [R0] 0x3418DEEA: 2204 MOVS R2, #4 0x3418DEEC: 6042 STR R2, [R0, #4] 0x3418DEEE: 6081 STR R1, [R0, #8] 0x3418DEF0: F04F 7280 MOV.W R2, #0x01000000 0x3418DEF4: 60C2 STR R2, [R0, #12] 0x3418DEF6: 2219 MOVS R2, #25 0x3418DEF8: 6102 STR R2, [R0, #16] 0x3418DEFA: 2202 MOVS R2, #2 0x3418DEFC: 6142 STR R2, [R0, #20] 0x3418DEFE: 6181 STR R1, [R0, #24] 0x3418DF00: 61C1 STR R1, [R0, #28] 0x3418DF02: 6201 STR R1, [R0, #32] 0x3418DF04: 6241 STR R1, [R0, #36] 0x3418DF06: 6281 STR R1, [R0, #40] 0x3418DF08: F04F 5280 MOV.W R2, #0x10000000 0x3418DF0C: 62C2 STR R2, [R0, #44] 0x3418DF0E: 6301 STR R1, [R0, #48] 0x3418DF10: 6341 STR R1, [R0, #52] 0x3418DF12: 6381 STR R1, [R0, #56] 0x3418DF14: 63C1 STR R1, [R0, #60] 0x3418DF16: F7FD F835 BL HAL_XSPI_Init ; 0x3418AF84 0x3418DF1A: B108 CBZ R0, .L1 ; 0x3418DF20 0x3418DF1C: F7F2 FC16 BL Error_Handler ; 0x3418074C
.L1: 0x3418DF20: 2010 MOVS R0, #16 0x3418DF22: 9003 STR R0, [SP, #12] 0x3418DF24: 2001 MOVS R0, #1 0x3418DF26: 9004 STR R0, [SP, #16] 0x3418DF28: 9005 STR R0, [SP, #20] 0x3418DF2A: F240 203C MOVW R0, #0x023C ; 0x3400023C = hxspi2 0x3418DF2E: F2C3 4000 MOVT R0, #0x3400 ; 0x3400023C = hxspi2 0x3418DF32: A903 ADD R1, SP, #12 0x3418DF34: F241 3288 MOVW R2, #0x1388 0x3418DF38: F004 FB2C BL HAL_XSPIM_Config ; 0x34192594 0x3418DF3C: B108 CBZ R0, .L2 ; 0x3418DF42 0x3418DF3E: F7F2 FC05 BL Error_Handler ; 0x3418074C
.L2: 0x3418DF42: B006 ADD SP, SP, #24 0x3418DF44: BD80 POP 123R7, PC}

Section .init.EXTI1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI1_IRQHandler: 0x3418DF46: E7FE B EXTI1_IRQHandler ; 0x3418DF46

Section .text.LL_APB4_GRP2_EnableClock.7 from blto2_FSBL_lto.o, size=34, align=4


LL_APB4_GRP2_EnableClock.7: 0x3418DF48: B082 SUB SP, SP, #8 0x3418DF4A: 9001 STR R0, [SP, #4] 0x3418DF4C: 9801 LDR R0, [SP, #4] 0x3418DF4E: F648 2178 MOVW R1, #0x8A78 0x3418DF52: F2C5 6102 MOVT R1, #0x5602 0x3418DF56: 6008 STR R0, [R1] 0x3418DF58: F248 2078 MOVW R0, #0x8278 0x3418DF5C: F2C5 6002 MOVT R0, #0x5602 0x3418DF60: 6800 LDR R0, [R0] 0x3418DF62: 9000 STR R0, [SP, #0] 0x3418DF64: 9800 LDR R0, [SP, #0] 0x3418DF66: B002 ADD SP, SP, #8 0x3418DF68: 4770 BX LR

Section .init.EXTI2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI2_IRQHandler: 0x3418DF6A: E7FE B EXTI2_IRQHandler ; 0x3418DF6A

Section .text.LL_AHB4_GRP1_EnableClock.8 from blto2_FSBL_lto.o, size=34, align=4


LL_AHB4_GRP1_EnableClock.8: 0x3418DF6C: B082 SUB SP, SP, #8 0x3418DF6E: 9001 STR R0, [SP, #4] 0x3418DF70: 9801 LDR R0, [SP, #4] 0x3418DF72: F648 215C MOVW R1, #0x8A5C 0x3418DF76: F2C5 6102 MOVT R1, #0x5602 0x3418DF7A: 6008 STR R0, [R1] 0x3418DF7C: F248 205C MOVW R0, #0x825C 0x3418DF80: F2C5 6002 MOVT R0, #0x5602 0x3418DF84: 6800 LDR R0, [R0] 0x3418DF86: 9000 STR R0, [SP, #0] 0x3418DF88: 9800 LDR R0, [SP, #0] 0x3418DF8A: B002 ADD SP, SP, #8 0x3418DF8C: 4770 BX LR

Section .init.EXTI3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI3_IRQHandler: 0x3418DF8E: E7FE B EXTI3_IRQHandler ; 0x3418DF8E

Section .text.LL_AHB5_GRP1_EnableClock from blto2_FSBL_lto.o, size=34, align=4


LL_AHB5_GRP1_EnableClock: 0x3418DF90: B082 SUB SP, SP, #8 0x3418DF92: 9001 STR R0, [SP, #4] 0x3418DF94: 9801 LDR R0, [SP, #4] 0x3418DF96: F648 2160 MOVW R1, #0x8A60 0x3418DF9A: F2C5 6102 MOVT R1, #0x5602 0x3418DF9E: 6008 STR R0, [R1] 0x3418DFA0: F248 2060 MOVW R0, #0x8260 0x3418DFA4: F2C5 6002 MOVT R0, #0x5602 0x3418DFA8: 6800 LDR R0, [R0] 0x3418DFAA: 9000 STR R0, [SP, #0] 0x3418DFAC: 9800 LDR R0, [SP, #0] 0x3418DFAE: B002 ADD SP, SP, #8 0x3418DFB0: 4770 BX LR

Section .init.EXTI4_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI4_IRQHandler: 0x3418DFB2: E7FE B EXTI4_IRQHandler ; 0x3418DFB2

Section .text.HAL_InitTick from blto2_FSBL_lto.o, size=126, align=4


HAL_InitTick: 0x3418DFB4: B580 PUSH 123R7, LR} 0x3418DFB6: B082 SUB SP, SP, #8 0x3418DFB8: 9000 STR R0, [SP, #0] 0x3418DFBA: F240 7090 MOVW R0, #0x0790 ; 0x34000790 = uwTickFreq 0x3418DFBE: F2C3 4000 MOVT R0, #0x3400 ; 0x34000790 = uwTickFreq 0x3418DFC2: 7800 LDRB R0, [R0] 0x3418DFC4: B918 CBNZ R0, .L1 ; 0x3418DFCE 0x3418DFC6: 2001 MOVS R0, #1 0x3418DFC8: F88D 0007 STRB.W R0, [SP, #7] 0x3418DFCC: E02D B 46L5 ; 0x3418E02A
.L1: 0x3418DFCE: F240 708C MOVW R0, #0x078C ; 0x3400078C = SystemCoreClock 0x3418DFD2: F2C3 4000 MOVT R0, #0x3400 ; 0x3400078C = SystemCoreClock 0x3418DFD6: 6800 LDR R0, [R0] 0x3418DFD8: F240 7190 MOVW R1, #0x0790 ; 0x34000790 = uwTickFreq 0x3418DFDC: F2C3 4100 MOVT R1, #0x3400 ; 0x34000790 = uwTickFreq 0x3418DFE0: 780A LDRB R2, [R1] 0x3418DFE2: F44F 717A MOV.W R1, #0x03E8 0x3418DFE6: FBB1 F1F2 UDIV R1, R1, R2 0x3418DFEA: FBB0 F0F1 UDIV R0, R0, R1 0x3418DFEE: F7F3 FD3D BL HAL_SYSTICK_Config ; 0x34181A6C 0x3418DFF2: B118 CBZ R0, .L2 ; 0x3418DFFC 0x3418DFF4: 2001 MOVS R0, #1 0x3418DFF6: F88D 0007 STRB.W R0, [SP, #7] 0x3418DFFA: E016 B 46L5 ; 0x3418E02A
.L2: 0x3418DFFC: 9800 LDR R0, [SP, #0] 0x3418DFFE: 280F CMP R0, #15 0x3418E000: D80C BHI 46L3 ; 0x3418E01C 0x3418E002: 9900 LDR R1, [SP, #0] 0x3418E004: F04F 30FF MOV.W R0, #0xFFFFFFFF 0x3418E008: 2200 MOVS R2, #0 0x3418E00A: F7F3 FCA1 BL HAL_NVIC_SetPriority ; 0x34181950 0x3418E00E: 9800 LDR R0, [SP, #0] 0x3418E010: F240 717C MOVW R1, #0x077C ; 0x3400077C = uwTickPrio 0x3418E014: F2C3 4100 MOVT R1, #0x3400 ; 0x3400077C = uwTickPrio 0x3418E018: 6008 STR R0, [R1] 0x3418E01A: E003 B 46L4 ; 0x3418E024
.L3: 0x3418E01C: 2001 MOVS R0, #1 0x3418E01E: F88D 0007 STRB.W R0, [SP, #7] 0x3418E022: E002 B 46L5 ; 0x3418E02A
.L4: 0x3418E024: 2000 MOVS R0, #0 0x3418E026: F88D 0007 STRB.W R0, [SP, #7]
.L5: 0x3418E02A: F89D 0007 LDRB.W R0, [SP, #7] 0x3418E02E: B002 ADD SP, SP, #8 0x3418E030: BD80 POP 123R7, PC}

Section .init.EXTI5_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI5_IRQHandler: 0x3418E032: E7FE B EXTI5_IRQHandler ; 0x3418E032

Section .text.HAL_IncTick from blto2_FSBL_lto.o, size=26, align=4


HAL_IncTick: 0x3418E034: F240 7090 MOVW R0, #0x0790 ; 0x34000790 = uwTickFreq 0x3418E038: F2C3 4000 MOVT R0, #0x3400 ; 0x34000790 = uwTickFreq 0x3418E03C: 7802 LDRB R2, [R0] 0x3418E03E: F240 3140 MOVW R1, #0x0340 ; 0x34000340 = uwTick 0x3418E042: F2C3 4100 MOVT R1, #0x3400 ; 0x34000340 = uwTick 0x3418E046: 6808 LDR R0, [R1] 0x3418E048: 4410 ADD R0, R2 0x3418E04A: 6008 STR R0, [R1] 0x3418E04C: 4770 BX LR

Section .init.EXTI6_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI6_IRQHandler: 0x3418E04E: E7FE B EXTI6_IRQHandler ; 0x3418E04E

Section .text.HAL_Delay from blto2_FSBL_lto.o, size=58, align=4


HAL_Delay: 0x3418E050: B580 PUSH 123R7, LR} 0x3418E052: B084 SUB SP, SP, #16 0x3418E054: 9003 STR R0, [SP, #12] 0x3418E056: F7F3 FC19 BL HAL_GetTick ; 0x3418188C 0x3418E05A: 9002 STR R0, [SP, #8] 0x3418E05C: 9803 LDR R0, [SP, #12] 0x3418E05E: 9001 STR R0, [SP, #4] 0x3418E060: 9801 LDR R0, [SP, #4] 0x3418E062: 3001 ADDS R0, #1 0x3418E064: B138 CBZ R0, .L1 ; 0x3418E076 0x3418E066: F240 7090 MOVW R0, #0x0790 ; 0x34000790 = uwTickFreq 0x3418E06A: F2C3 4000 MOVT R0, #0x3400 ; 0x34000790 = uwTickFreq 0x3418E06E: 7801 LDRB R1, [R0] 0x3418E070: 9801 LDR R0, [SP, #4] 0x3418E072: 4408 ADD R0, R1 0x3418E074: 9001 STR R0, [SP, #4]
.L1: 0x3418E076: F7F3 FC09 BL HAL_GetTick ; 0x3418188C 0x3418E07A: 9902 LDR R1, [SP, #8] 0x3418E07C: 1A40 SUBS R0, R0, R1 0x3418E07E: 9901 LDR R1, [SP, #4] 0x3418E080: 4288 CMP R0, R1 0x3418E082: D200 BCS 46L2 ; 0x3418E086 0x3418E084: E7F7 B 46L1 ; 0x3418E076
.L2: 0x3418E086: B004 ADD SP, SP, #16 0x3418E088: BD80 POP 123R7, PC}

Section .init.EXTI7_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI7_IRQHandler: 0x3418E08A: E7FE B EXTI7_IRQHandler ; 0x3418E08A

Section .text.HAL_SuspendTick from blto2_FSBL_lto.o, size=18, align=4


HAL_SuspendTick: 0x3418E08C: F24E 0110 MOVW R1, #0xE010 0x3418E090: F2CE 0100 MOVT R1, #0xE000 0x3418E094: 6808 LDR R0, [R1] 0x3418E096: F020 0002 BIC R0, R0, #2 0x3418E09A: 6008 STR R0, [R1] 0x3418E09C: 4770 BX LR

Section .init.EXTI8_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI8_IRQHandler: 0x3418E09E: E7FE B EXTI8_IRQHandler ; 0x3418E09E

Section .text.HAL_BSEC_OTP_Reload from blto2_FSBL_lto.o, size=250, align=4


HAL_BSEC_OTP_Reload: 0x3418E0A0: B580 PUSH 123R7, LR} 0x3418E0A2: B086 SUB SP, SP, #24 0x3418E0A4: 9004 STR R0, [SP, #16] 0x3418E0A6: 9103 STR R1, [SP, #12] 0x3418E0A8: F7F3 FBF0 BL HAL_GetTick ; 0x3418188C 0x3418E0AC: 9000 STR R0, [SP, #0] 0x3418E0AE: 9804 LDR R0, [SP, #16] 0x3418E0B0: B918 CBNZ R0, .L1 ; 0x3418E0BA 0x3418E0B2: 2001 MOVS R0, #1 0x3418E0B4: F88D 0017 STRB.W R0, [SP, #23] 0x3418E0B8: E06B B 46L11 ; 0x3418E192
.L1: 0x3418E0BA: 9804 LDR R0, [SP, #16] 0x3418E0BC: 6800 LDR R0, [R0] 0x3418E0BE: F249 0100 MOVW R1, #0x9000 0x3418E0C2: F2C5 6100 MOVT R1, #0x5600 0x3418E0C6: 4288 CMP R0, R1 0x3418E0C8: D005 BEQ 46L2 ; 0x3418E0D6 0x3418E0CA: 9904 LDR R1, [SP, #16] 0x3418E0CC: 2001 MOVS R0, #1 0x3418E0CE: 6048 STR R0, [R1, #4] 0x3418E0D0: F88D 0017 STRB.W R0, [SP, #23] 0x3418E0D4: E05D B 46L11 ; 0x3418E192
.L2: 0x3418E0D6: 9803 LDR R0, [SP, #12] 0x3418E0D8: 08C0 LSRS R0, R0, #3 0x3418E0DA: 282E CMP R0, #46 0x3418E0DC: D850 BHI 46L9 ; 0x3418E180 0x3418E0DE: 9803 LDR R0, [SP, #12] 0x3418E0E0: 0940 LSRS R0, R0, #5 0x3418E0E2: 9002 STR R0, [SP, #8] 0x3418E0E4: 9803 LDR R0, [SP, #12] 0x3418E0E6: F000 011F AND R1, R0, #31 0x3418E0EA: 2001 MOVS R0, #1 0x3418E0EC: 4088 LSLS R0, R1 0x3418E0EE: 9001 STR R0, [SP, #4] 0x3418E0F0: 9804 LDR R0, [SP, #16] 0x3418E0F2: 6800 LDR R0, [R0] 0x3418E0F4: 9902 LDR R1, [SP, #8] 0x3418E0F6: EB00 0081 ADD.W R0, R0, R1, LSL #2 0x3418E0FA: F8D0 0880 LDR.W R0, [R0, #0x0880] 0x3418E0FE: 9901 LDR R1, [SP, #4] 0x3418E100: 4208 TST R0, R1 0x3418E102: D135 BNE 46L7 ; 0x3418E170 0x3418E104: 9804 LDR R0, [SP, #16] 0x3418E106: 6800 LDR R0, [R0] 0x3418E108: F8D0 0C04 LDR.W R0, [R0, #0x0C04] 0x3418E10C: F246 11FF MOVW R1, #0x61FF 0x3418E110: 4388 BICS R0, R1 0x3418E112: 9903 LDR R1, [SP, #12] 0x3418E114: 4308 ORRS R0, R1 0x3418E116: 9904 LDR R1, [SP, #16] 0x3418E118: 6809 LDR R1, [R1] 0x3418E11A: F8C1 0C04 STR.W R0, [R1, #0x0C04]
.L3: 0x3418E11E: 9804 LDR R0, [SP, #16] 0x3418E120: 6800 LDR R0, [R0] 0x3418E122: F8D0 0E44 LDR.W R0, [R0, #0x0E44] 0x3418E126: 07C0 LSLS R0, R0, #31 0x3418E128: B170 CBZ R0, .L5 ; 0x3418E148 0x3418E12A: F7F3 FBAF BL HAL_GetTick ; 0x3418188C 0x3418E12E: 9900 LDR R1, [SP, #0] 0x3418E130: 1A40 SUBS R0, R0, R1 0x3418E132: F5B0 7F7A CMP.W R0, #0x03E8 0x3418E136: D906 BLS 46L4 ; 0x3418E146 0x3418E138: 9904 LDR R1, [SP, #16] 0x3418E13A: 200A MOVS R0, #10 0x3418E13C: 6048 STR R0, [R1, #4] 0x3418E13E: 2001 MOVS R0, #1 0x3418E140: F88D 0017 STRB.W R0, [SP, #23] 0x3418E144: E025 B 46L11 ; 0x3418E192
.L4: 0x3418E146: E7EA B 46L3 ; 0x3418E11E
.L5: 0x3418E148: 9804 LDR R0, [SP, #16] 0x3418E14A: 6800 LDR R0, [R0] 0x3418E14C: F8D0 0E44 LDR.W R0, [R0, #0x0E44] 0x3418E150: F410 0F8C TST R0, #0x460000 0x3418E154: D00B BEQ 46L6 ; 0x3418E16E 0x3418E156: 9804 LDR R0, [SP, #16] 0x3418E158: 6800 LDR R0, [R0] 0x3418E15A: F8D0 0E44 LDR.W R0, [R0, #0x0E44] 0x3418E15E: F400 008C AND R0, R0, #0x460000 0x3418E162: 9904 LDR R1, [SP, #16] 0x3418E164: 6048 STR R0, [R1, #4] 0x3418E166: 2001 MOVS R0, #1 0x3418E168: F88D 0017 STRB.W R0, [SP, #23] 0x3418E16C: E011 B 46L11 ; 0x3418E192
.L6: 0x3418E16E: E006 B 46L8 ; 0x3418E17E
.L7: 0x3418E170: 9904 LDR R1, [SP, #16] 0x3418E172: 2004 MOVS R0, #4 0x3418E174: 6048 STR R0, [R1, #4] 0x3418E176: 2001 MOVS R0, #1 0x3418E178: F88D 0017 STRB.W R0, [SP, #23] 0x3418E17C: E009 B 46L11 ; 0x3418E192
.L8: 0x3418E17E: E005 B 46L10 ; 0x3418E18C
.L9: 0x3418E180: 9904 LDR R1, [SP, #16] 0x3418E182: 2001 MOVS R0, #1 0x3418E184: 6048 STR R0, [R1, #4] 0x3418E186: F88D 0017 STRB.W R0, [SP, #23] 0x3418E18A: E002 B 46L11 ; 0x3418E192
.L10: 0x3418E18C: 2000 MOVS R0, #0 0x3418E18E: F88D 0017 STRB.W R0, [SP, #23]
.L11: 0x3418E192: F89D 0017 LDRB.W R0, [SP, #23] 0x3418E196: B006 ADD SP, SP, #24 0x3418E198: BD80 POP 123R7, PC}

Section .init.EXTI9_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI9_IRQHandler: 0x3418E19A: E7FE B EXTI9_IRQHandler ; 0x3418E19A

Section .text.HAL_BSEC_OTP_Program from blto2_FSBL_lto.o, size=342, align=4


HAL_BSEC_OTP_Program: 0x3418E19C: B580 PUSH 123R7, LR} 0x3418E19E: B08A SUB SP, SP, #40 0x3418E1A0: 9008 STR R0, [SP, #32] 0x3418E1A2: 9107 STR R1, [SP, #28] 0x3418E1A4: 9206 STR R2, [SP, #24] 0x3418E1A6: 9305 STR R3, [SP, #20] 0x3418E1A8: F7F3 FB70 BL HAL_GetTick ; 0x3418188C 0x3418E1AC: 9001 STR R0, [SP, #4] 0x3418E1AE: 9808 LDR R0, [SP, #32] 0x3418E1B0: B918 CBNZ R0, .L1 ; 0x3418E1BA 0x3418E1B2: 2001 MOVS R0, #1 0x3418E1B4: F88D 0027 STRB.W R0, [SP, #39] 0x3418E1B8: E097 B 46L17 ; 0x3418E2EA
.L1: 0x3418E1BA: 9808 LDR R0, [SP, #32] 0x3418E1BC: 6800 LDR R0, [R0] 0x3418E1BE: F249 0100 MOVW R1, #0x9000 0x3418E1C2: F2C5 6100 MOVT R1, #0x5600 0x3418E1C6: 4288 CMP R0, R1 0x3418E1C8: D005 BEQ 46L2 ; 0x3418E1D6 0x3418E1CA: 9908 LDR R1, [SP, #32] 0x3418E1CC: 2001 MOVS R0, #1 0x3418E1CE: 6048 STR R0, [R1, #4] 0x3418E1D0: F88D 0027 STRB.W R0, [SP, #39] 0x3418E1D4: E089 B 46L17 ; 0x3418E2EA
.L2: 0x3418E1D6: 9805 LDR R0, [SP, #20] 0x3418E1D8: B118 CBZ R0, .L3 ; 0x3418E1E2 0x3418E1DA: 9805 LDR R0, [SP, #20] 0x3418E1DC: F5B0 4F80 CMP.W R0, #0x4000 0x3418E1E0: D100 BNE 46L4 ; 0x3418E1E4
.L3: 0x3418E1E2: E007 B 46L5 ; 0x3418E1F4
.L4: 0x3418E1E4: F244 107C MOVW R0, #0x417C ; 0x3419417C = .rodata..L.str.20 0x3418E1E8: F2C3 4019 MOVT R0, #0x3419 ; 0x3419417C = .rodata..L.str.20 0x3418E1EC: F44F 71DD MOV.W R1, #0x01BA 0x3418E1F0: F7FF FD54 BL assert_failed ; 0x3418DC9C
.L5: 0x3418E1F4: 9807 LDR R0, [SP, #28] 0x3418E1F6: 08C0 LSRS R0, R0, #3 0x3418E1F8: 282E CMP R0, #46 0x3418E1FA: D86D BHI 46L15 ; 0x3418E2D8 0x3418E1FC: 9807 LDR R0, [SP, #28] 0x3418E1FE: 0940 LSRS R0, R0, #5 0x3418E200: 9004 STR R0, [SP, #16] 0x3418E202: 9807 LDR R0, [SP, #28] 0x3418E204: F000 011F AND R1, R0, #31 0x3418E208: 2001 MOVS R0, #1 0x3418E20A: 4088 LSLS R0, R1 0x3418E20C: 9003 STR R0, [SP, #12] 0x3418E20E: 9808 LDR R0, [SP, #32] 0x3418E210: 6800 LDR R0, [R0] 0x3418E212: 9904 LDR R1, [SP, #16] 0x3418E214: EB00 0081 ADD.W R0, R0, R1, LSL #2 0x3418E218: F8D0 0800 LDR.W R0, [R0, #0x0800] 0x3418E21C: 9903 LDR R1, [SP, #12] 0x3418E21E: 4208 TST R0, R1 0x3418E220: D152 BNE 46L13 ; 0x3418E2C8 0x3418E222: 9806 LDR R0, [SP, #24] 0x3418E224: 9908 LDR R1, [SP, #32] 0x3418E226: 6809 LDR R1, [R1] 0x3418E228: F8C1 0C08 STR.W R0, [R1, #0x0C08] 0x3418E22C: 9808 LDR R0, [SP, #32] 0x3418E22E: 6800 LDR R0, [R0] 0x3418E230: F8D0 0C04 LDR.W R0, [R0, #0x0C04] 0x3418E234: F246 11FF MOVW R1, #0x61FF 0x3418E238: EA20 0101 BIC.W R1, R0, R1 0x3418E23C: 9807 LDR R0, [SP, #28] 0x3418E23E: 9A05 LDR R2, [SP, #20] 0x3418E240: 4310 ORRS R0, R2 0x3418E242: 4308 ORRS R0, R1 0x3418E244: F440 5000 ORR R0, R0, #0x2000 0x3418E248: 9908 LDR R1, [SP, #32] 0x3418E24A: 6809 LDR R1, [R1] 0x3418E24C: F8C1 0C04 STR.W R0, [R1, #0x0C04]
.L6: 0x3418E250: 9808 LDR R0, [SP, #32] 0x3418E252: 6800 LDR R0, [R0] 0x3418E254: F8D0 0E44 LDR.W R0, [R0, #0x0E44] 0x3418E258: 07C0 LSLS R0, R0, #31 0x3418E25A: B170 CBZ R0, .L8 ; 0x3418E27A 0x3418E25C: F7F3 FB16 BL HAL_GetTick ; 0x3418188C 0x3418E260: 9901 LDR R1, [SP, #4] 0x3418E262: 1A40 SUBS R0, R0, R1 0x3418E264: F5B0 7F7A CMP.W R0, #0x03E8 0x3418E268: D906 BLS 46L7 ; 0x3418E278 0x3418E26A: 9908 LDR R1, [SP, #32] 0x3418E26C: 200A MOVS R0, #10 0x3418E26E: 6048 STR R0, [R1, #4] 0x3418E270: 2001 MOVS R0, #1 0x3418E272: F88D 0027 STRB.W R0, [SP, #39] 0x3418E276: E038 B 46L17 ; 0x3418E2EA
.L7: 0x3418E278: E7EA B 46L6 ; 0x3418E250
.L8: 0x3418E27A: 9808 LDR R0, [SP, #32] 0x3418E27C: 6800 LDR R0, [R0] 0x3418E27E: F8D0 0E44 LDR.W R0, [R0, #0x0E44] 0x3418E282: 03C0 LSLS R0, R0, #15 0x3418E284: 2800 CMP R0, #0 0x3418E286: D507 BPL 46L9 ; 0x3418E298 0x3418E288: 9908 LDR R1, [SP, #32] 0x3418E28A: F44F 3080 MOV.W R0, #0x010000 0x3418E28E: 6048 STR R0, [R1, #4] 0x3418E290: 2001 MOVS R0, #1 0x3418E292: F88D 0027 STRB.W R0, [SP, #39] 0x3418E296: E028 B 46L17 ; 0x3418E2EA
.L9: 0x3418E298: 9808 LDR R0, [SP, #32] 0x3418E29A: 9907 LDR R1, [SP, #28] 0x3418E29C: AA02 ADD R2, SP, #8 0x3418E29E: F7F3 FAFB BL HAL_BSEC_OTP_Read ; 0x34181898 0x3418E2A2: B960 CBNZ R0, .L11 ; 0x3418E2BE 0x3418E2A4: 9802 LDR R0, [SP, #8] 0x3418E2A6: 9906 LDR R1, [SP, #24] 0x3418E2A8: 4288 CMP R0, R1 0x3418E2AA: D007 BEQ 46L10 ; 0x3418E2BC 0x3418E2AC: 9908 LDR R1, [SP, #32] 0x3418E2AE: F44F 3080 MOV.W R0, #0x010000 0x3418E2B2: 6048 STR R0, [R1, #4] 0x3418E2B4: 2001 MOVS R0, #1 0x3418E2B6: F88D 0027 STRB.W R0, [SP, #39] 0x3418E2BA: E016 B 46L17 ; 0x3418E2EA
.L10: 0x3418E2BC: E003 B 46L12 ; 0x3418E2C6
.L11: 0x3418E2BE: 2001 MOVS R0, #1 0x3418E2C0: F88D 0027 STRB.W R0, [SP, #39] 0x3418E2C4: E011 B 46L17 ; 0x3418E2EA
.L12: 0x3418E2C6: E006 B 46L14 ; 0x3418E2D6
.L13: 0x3418E2C8: 9908 LDR R1, [SP, #32] 0x3418E2CA: 2004 MOVS R0, #4 0x3418E2CC: 6048 STR R0, [R1, #4] 0x3418E2CE: 2001 MOVS R0, #1 0x3418E2D0: F88D 0027 STRB.W R0, [SP, #39] 0x3418E2D4: E009 B 46L17 ; 0x3418E2EA
.L14: 0x3418E2D6: E005 B 46L16 ; 0x3418E2E4
.L15: 0x3418E2D8: 9908 LDR R1, [SP, #32] 0x3418E2DA: 2001 MOVS R0, #1 0x3418E2DC: 6048 STR R0, [R1, #4] 0x3418E2DE: F88D 0027 STRB.W R0, [SP, #39] 0x3418E2E2: E002 B 46L17 ; 0x3418E2EA
.L16: 0x3418E2E4: 2000 MOVS R0, #0 0x3418E2E6: F88D 0027 STRB.W R0, [SP, #39]
.L17: 0x3418E2EA: F89D 0027 LDRB.W R0, [SP, #39] 0x3418E2EE: B00A ADD SP, SP, #40 0x3418E2F0: BD80 POP 123R7, PC}

Section .init.EXTI10_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI10_IRQHandler: 0x3418E2F2: E7FE B EXTI10_IRQHandler ; 0x3418E2F2

Section .text.HAL_NVIC_SetPriorityGrouping from blto2_FSBL_lto.o, size=62, align=4


HAL_NVIC_SetPriorityGrouping: 0x3418E2F4: B580 PUSH 123R7, LR} 0x3418E2F6: B082 SUB SP, SP, #8 0x3418E2F8: 9001 STR R0, [SP, #4] 0x3418E2FA: 9801 LDR R0, [SP, #4] 0x3418E2FC: 2807 CMP R0, #7 0x3418E2FE: D00B BEQ 46L1 ; 0x3418E318 0x3418E300: 9801 LDR R0, [SP, #4] 0x3418E302: 2806 CMP R0, #6 0x3418E304: D008 BEQ 46L1 ; 0x3418E318 0x3418E306: 9801 LDR R0, [SP, #4] 0x3418E308: 2805 CMP R0, #5 0x3418E30A: D005 BEQ 46L1 ; 0x3418E318 0x3418E30C: 9801 LDR R0, [SP, #4] 0x3418E30E: 2804 CMP R0, #4 0x3418E310: D002 BEQ 46L1 ; 0x3418E318 0x3418E312: 9801 LDR R0, [SP, #4] 0x3418E314: 2803 CMP R0, #3 0x3418E316: D100 BNE 46L2 ; 0x3418E31A
.L1: 0x3418E318: E006 B 46L3 ; 0x3418E328
.L2: 0x3418E31A: F244 403C MOVW R0, #0x443C ; 0x3419443C = .rodata..L.str.23 0x3418E31E: F2C3 4019 MOVT R0, #0x3419 ; 0x3419443C = .rodata..L.str.23 0x3418E322: 21E6 MOVS R1, #230 0x3418E324: F7FF FCBA BL assert_failed ; 0x3418DC9C
.L3: 0x3418E328: 9801 LDR R0, [SP, #4] 0x3418E32A: F7F3 FAF3 BL __NVIC_SetPriorityGrouping ; 0x34181914 0x3418E32E: B002 ADD SP, SP, #8 0x3418E330: BD80 POP 123R7, PC}

Section .init.EXTI11_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI11_IRQHandler: 0x3418E332: E7FE B EXTI11_IRQHandler ; 0x3418E332

Section .text.__NVIC_SetPriority from blto2_FSBL_lto.o, size=62, align=4


__NVIC_SetPriority: 0x3418E334: B082 SUB SP, SP, #8 0x3418E336: F8AD 0006 STRH.W R0, [SP, #6] 0x3418E33A: 9100 STR R1, [SP, #0] 0x3418E33C: F9BD 0006 LDRSH.W R0, [SP, #6] 0x3418E340: 2800 CMP R0, #0 0x3418E342: D409 BMI 46L1 ; 0x3418E358 0x3418E344: 9800 LDR R0, [SP, #0] 0x3418E346: 0100 LSLS R0, R0, #4 0x3418E348: F9BD 1006 LDRSH.W R1, [SP, #6] 0x3418E34C: F24E 4200 MOVW R2, #0xE400 0x3418E350: F2CE 0200 MOVT R2, #0xE000 0x3418E354: 5488 STRB R0, [R1, R2] 0x3418E356: E00A B 46L2 ; 0x3418E36E
.L1: 0x3418E358: 9800 LDR R0, [SP, #0] 0x3418E35A: 0100 LSLS R0, R0, #4 0x3418E35C: F8BD 1006 LDRH.W R1, [SP, #6] 0x3418E360: F001 010F AND R1, R1, #15 0x3418E364: F64E 5214 MOVW R2, #0xED14 0x3418E368: F2CE 0200 MOVT R2, #0xE000 0x3418E36C: 5488 STRB R0, [R1, R2]
.L2: 0x3418E36E: B002 ADD SP, SP, #8 0x3418E370: 4770 BX LR

Section .init.EXTI12_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI12_IRQHandler: 0x3418E372: E7FE B EXTI12_IRQHandler ; 0x3418E372

Section .text.SysTick_Config from blto2_FSBL_lto.o, size=78, align=4


SysTick_Config: 0x3418E374: B580 PUSH 123R7, LR} 0x3418E376: B082 SUB SP, SP, #8 0x3418E378: 9000 STR R0, [SP, #0] 0x3418E37A: 9800 LDR R0, [SP, #0] 0x3418E37C: 3801 SUBS R0, #1 0x3418E37E: F1B0 7F80 CMP.W R0, #0x01000000 0x3418E382: D302 BCC 46L1 ; 0x3418E38A 0x3418E384: 2001 MOVS R0, #1 0x3418E386: 9001 STR R0, [SP, #4] 0x3418E388: E018 B 46L2 ; 0x3418E3BC
.L1: 0x3418E38A: 9800 LDR R0, [SP, #0] 0x3418E38C: 3801 SUBS R0, #1 0x3418E38E: F24E 0114 MOVW R1, #0xE014 0x3418E392: F2CE 0100 MOVT R1, #0xE000 0x3418E396: 6008 STR R0, [R1] 0x3418E398: F04F 30FF MOV.W R0, #0xFFFFFFFF 0x3418E39C: 210F MOVS R1, #15 0x3418E39E: F7FF FFC9 BL __NVIC_SetPriority ; 0x3418E334 0x3418E3A2: F24E 0118 MOVW R1, #0xE018 0x3418E3A6: F2CE 0100 MOVT R1, #0xE000 0x3418E3AA: 2000 MOVS R0, #0 0x3418E3AC: 6008 STR R0, [R1] 0x3418E3AE: F24E 0210 MOVW R2, #0xE010 0x3418E3B2: F2CE 0200 MOVT R2, #0xE000 0x3418E3B6: 2107 MOVS R1, #7 0x3418E3B8: 6011 STR R1, [R2] 0x3418E3BA: 9001 STR R0, [SP, #4]
.L2: 0x3418E3BC: 9801 LDR R0, [SP, #4] 0x3418E3BE: B002 ADD SP, SP, #8 0x3418E3C0: BD80 POP 123R7, PC}

Section .init.EXTI13_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI13_IRQHandler: 0x3418E3C2: E7FE B EXTI13_IRQHandler ; 0x3418E3C2

Section .text.HAL_GPIO_WritePin from blto2_FSBL_lto.o, size=102, align=4


HAL_GPIO_WritePin: 0x3418E3C4: B580 PUSH 123R7, LR} 0x3418E3C6: B082 SUB SP, SP, #8 0x3418E3C8: 9001 STR R0, [SP, #4] 0x3418E3CA: F8AD 1002 STRH.W R1, [SP, #2] 0x3418E3CE: F88D 2001 STRB.W R2, [SP, #1] 0x3418E3D2: F8BD 0002 LDRH.W R0, [SP, #2] 0x3418E3D6: B110 CBZ R0, .L1 ; 0x3418E3DE 0x3418E3D8: 2000 MOVS R0, #0 0x3418E3DA: B900 CBNZ R0, .L1 ; 0x3418E3DE 0x3418E3DC: E007 B 46L2 ; 0x3418E3EE
.L1: 0x3418E3DE: F244 10E6 MOVW R0, #0x41E6 ; 0x341941E6 = .rodata..L.str.33 0x3418E3E2: F2C3 4019 MOVT R0, #0x3419 ; 0x341941E6 = .rodata..L.str.33 0x3418E3E6: F44F 71D0 MOV.W R1, #0x01A0 0x3418E3EA: F7FF FC57 BL assert_failed ; 0x3418DC9C
.L2: 0x3418E3EE: F89D 0001 LDRB.W R0, [SP, #1] 0x3418E3F2: B118 CBZ R0, .L3 ; 0x3418E3FC 0x3418E3F4: F89D 0001 LDRB.W R0, [SP, #1] 0x3418E3F8: 2801 CMP R0, #1 0x3418E3FA: D100 BNE 46L4 ; 0x3418E3FE
.L3: 0x3418E3FC: E007 B 46L5 ; 0x3418E40E
.L4: 0x3418E3FE: F244 10E6 MOVW R0, #0x41E6 ; 0x341941E6 = .rodata..L.str.33 0x3418E402: F2C3 4019 MOVT R0, #0x3419 ; 0x341941E6 = .rodata..L.str.33 0x3418E406: F240 11A1 MOVW R1, #0x01A1 0x3418E40A: F7FF FC47 BL assert_failed ; 0x3418DC9C
.L5: 0x3418E40E: F89D 0001 LDRB.W R0, [SP, #1] 0x3418E412: B120 CBZ R0, .L6 ; 0x3418E41E 0x3418E414: F8BD 0002 LDRH.W R0, [SP, #2] 0x3418E418: 9901 LDR R1, [SP, #4] 0x3418E41A: 6188 STR R0, [R1, #24] 0x3418E41C: E003 B 46L7 ; 0x3418E426
.L6: 0x3418E41E: F8BD 0002 LDRH.W R0, [SP, #2] 0x3418E422: 9901 LDR R1, [SP, #4] 0x3418E424: 6288 STR R0, [R1, #40]
.L7: 0x3418E426: B002 ADD SP, SP, #8 0x3418E428: BD80 POP 123R7, PC}

Section .init.EXTI14_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI14_IRQHandler: 0x3418E42A: E7FE B EXTI14_IRQHandler ; 0x3418E42A

Section .text.HAL_PWREx_ConfigSupply from blto2_FSBL_lto.o, size=114, align=4


HAL_PWREx_ConfigSupply: 0x3418E42C: B580 PUSH 123R7, LR} 0x3418E42E: B084 SUB SP, SP, #16 0x3418E430: 9002 STR R0, [SP, #8] 0x3418E432: 9802 LDR R0, [SP, #8] 0x3418E434: 2804 CMP R0, #4 0x3418E436: D001 BEQ 46L1 ; 0x3418E43C 0x3418E438: 9802 LDR R0, [SP, #8] 0x3418E43A: B900 CBNZ R0, .L2 ; 0x3418E43E
.L1: 0x3418E43C: E007 B 46L3 ; 0x3418E44E
.L2: 0x3418E43E: F244 40A8 MOVW R0, #0x44A8 ; 0x341944A8 = .rodata..L.str.41 0x3418E442: F2C3 4019 MOVT R0, #0x3419 ; 0x341944A8 = .rodata..L.str.41 0x3418E446: F44F 7187 MOV.W R1, #0x010E 0x3418E44A: F7FF FC27 BL assert_failed ; 0x3418DC9C
.L3: 0x3418E44E: F644 0100 MOVW R1, #0x4800 0x3418E452: F2C5 6102 MOVT R1, #0x5602 0x3418E456: 6808 LDR R0, [R1] 0x3418E458: F020 0004 BIC R0, R0, #4 0x3418E45C: 9A02 LDR R2, [SP, #8] 0x3418E45E: 4310 ORRS R0, R2 0x3418E460: 6008 STR R0, [R1] 0x3418E462: F7F3 FA13 BL HAL_GetTick ; 0x3418188C 0x3418E466: 9001 STR R0, [SP, #4]
.L4: 0x3418E468: F644 0020 MOVW R0, #0x4820 0x3418E46C: F2C5 6002 MOVT R0, #0x5602 0x3418E470: 6800 LDR R0, [R0] 0x3418E472: 0380 LSLS R0, R0, #14 0x3418E474: 2800 CMP R0, #0 0x3418E476: D40B BMI 46L6 ; 0x3418E490 0x3418E478: F7F3 FA08 BL HAL_GetTick ; 0x3418188C 0x3418E47C: 9901 LDR R1, [SP, #4] 0x3418E47E: 1A40 SUBS R0, R0, R1 0x3418E480: F5B0 7F7A CMP.W R0, #0x03E8 0x3418E484: D903 BLS 46L5 ; 0x3418E48E 0x3418E486: 2001 MOVS R0, #1 0x3418E488: F88D 000F STRB.W R0, [SP, #15] 0x3418E48C: E003 B 46L7 ; 0x3418E496
.L5: 0x3418E48E: E7EB B 46L4 ; 0x3418E468
.L6: 0x3418E490: 2000 MOVS R0, #0 0x3418E492: F88D 000F STRB.W R0, [SP, #15]
.L7: 0x3418E496: F89D 000F LDRB.W R0, [SP, #15] 0x3418E49A: B004 ADD SP, SP, #16 0x3418E49C: BD80 POP 123R7, PC}

Section .init.EXTI15_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI15_IRQHandler: 0x3418E49E: E7FE B EXTI15_IRQHandler ; 0x3418E49E

Section .text.HAL_PWREx_ControlVoltageScaling from blto2_FSBL_lto.o, size=114, align=4


HAL_PWREx_ControlVoltageScaling: 0x3418E4A0: B580 PUSH 123R7, LR} 0x3418E4A2: B084 SUB SP, SP, #16 0x3418E4A4: 9002 STR R0, [SP, #8] 0x3418E4A6: 9802 LDR R0, [SP, #8] 0x3418E4A8: 2801 CMP R0, #1 0x3418E4AA: D001 BEQ 46L1 ; 0x3418E4B0 0x3418E4AC: 9802 LDR R0, [SP, #8] 0x3418E4AE: B900 CBNZ R0, .L2 ; 0x3418E4B2
.L1: 0x3418E4B0: E007 B 46L3 ; 0x3418E4C2
.L2: 0x3418E4B2: F244 40A8 MOVW R0, #0x44A8 ; 0x341944A8 = .rodata..L.str.41 0x3418E4B6: F2C3 4019 MOVT R0, #0x3419 ; 0x341944A8 = .rodata..L.str.41 0x3418E4BA: F240 1141 MOVW R1, #0x0141 0x3418E4BE: F7FF FBED BL assert_failed ; 0x3418DC9C
.L3: 0x3418E4C2: F644 0120 MOVW R1, #0x4820 0x3418E4C6: F2C5 6102 MOVT R1, #0x5602 0x3418E4CA: 6808 LDR R0, [R1] 0x3418E4CC: F020 0001 BIC R0, R0, #1 0x3418E4D0: 9A02 LDR R2, [SP, #8] 0x3418E4D2: 4310 ORRS R0, R2 0x3418E4D4: 6008 STR R0, [R1] 0x3418E4D6: F7F3 F9D9 BL HAL_GetTick ; 0x3418188C 0x3418E4DA: 9001 STR R0, [SP, #4]
.L4: 0x3418E4DC: F644 0020 MOVW R0, #0x4820 0x3418E4E0: F2C5 6002 MOVT R0, #0x5602 0x3418E4E4: 6800 LDR R0, [R0] 0x3418E4E6: 0780 LSLS R0, R0, #30 0x3418E4E8: 2800 CMP R0, #0 0x3418E4EA: D40B BMI 46L6 ; 0x3418E504 0x3418E4EC: F7F3 F9CE BL HAL_GetTick ; 0x3418188C 0x3418E4F0: 9901 LDR R1, [SP, #4] 0x3418E4F2: 1A40 SUBS R0, R0, R1 0x3418E4F4: F5B0 7F7A CMP.W R0, #0x03E8 0x3418E4F8: D903 BLS 46L5 ; 0x3418E502 0x3418E4FA: 2001 MOVS R0, #1 0x3418E4FC: F88D 000F STRB.W R0, [SP, #15] 0x3418E500: E003 B 46L7 ; 0x3418E50A
.L5: 0x3418E502: E7EB B 46L4 ; 0x3418E4DC
.L6: 0x3418E504: 2000 MOVS R0, #0 0x3418E506: F88D 000F STRB.W R0, [SP, #15]
.L7: 0x3418E50A: F89D 000F LDRB.W R0, [SP, #15] 0x3418E50E: B004 ADD SP, SP, #16 0x3418E510: BD80 POP 123R7, PC}

Section .init.SAES_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SAES_IRQHandler: 0x3418E512: E7FE B SAES_IRQHandler ; 0x3418E512

Section .text.HAL_PWREx_ConfigVddIORange from blto2_FSBL_lto.o, size=226, align=4


HAL_PWREx_ConfigVddIORange: 0x3418E514: B580 PUSH 123R7, LR} 0x3418E516: B084 SUB SP, SP, #16 0x3418E518: 9003 STR R0, [SP, #12] 0x3418E51A: 9102 STR R1, [SP, #8] 0x3418E51C: 9803 LDR R0, [SP, #12] 0x3418E51E: B158 CBZ R0, .L1 ; 0x3418E538 0x3418E520: 9803 LDR R0, [SP, #12] 0x3418E522: 2801 CMP R0, #1 0x3418E524: D008 BEQ 46L1 ; 0x3418E538 0x3418E526: 9803 LDR R0, [SP, #12] 0x3418E528: 2802 CMP R0, #2 0x3418E52A: D005 BEQ 46L1 ; 0x3418E538 0x3418E52C: 9803 LDR R0, [SP, #12] 0x3418E52E: 2803 CMP R0, #3 0x3418E530: D002 BEQ 46L1 ; 0x3418E538 0x3418E532: 9803 LDR R0, [SP, #12] 0x3418E534: 2804 CMP R0, #4 0x3418E536: D100 BNE 46L2 ; 0x3418E53A
.L1: 0x3418E538: E007 B 46L3 ; 0x3418E54A
.L2: 0x3418E53A: F244 40A8 MOVW R0, #0x44A8 ; 0x341944A8 = .rodata..L.str.41 0x3418E53E: F2C3 4019 MOVT R0, #0x3419 ; 0x341944A8 = .rodata..L.str.41 0x3418E542: F240 316A MOVW R1, #0x036A 0x3418E546: F7FF FBA9 BL assert_failed ; 0x3418DC9C
.L3: 0x3418E54A: 9802 LDR R0, [SP, #8] 0x3418E54C: B110 CBZ R0, .L4 ; 0x3418E554 0x3418E54E: 9802 LDR R0, [SP, #8] 0x3418E550: 2801 CMP R0, #1 0x3418E552: D100 BNE 46L5 ; 0x3418E556
.L4: 0x3418E554: E007 B 46L6 ; 0x3418E566
.L5: 0x3418E556: F244 40A8 MOVW R0, #0x44A8 ; 0x341944A8 = .rodata..L.str.41 0x3418E55A: F2C3 4019 MOVT R0, #0x3419 ; 0x341944A8 = .rodata..L.str.41 0x3418E55E: F240 316B MOVW R1, #0x036B 0x3418E562: F7FF FB9B BL assert_failed ; 0x3418DC9C
.L6: 0x3418E566: 9803 LDR R0, [SP, #12] 0x3418E568: 9001 STR R0, [SP, #4] 0x3418E56A: 2804 CMP R0, #4 0x3418E56C: D841 BHI 46L7 ; 0x3418E5F2 0x3418E56E: 9901 LDR R1, [SP, #4] 0x3418E570: E8DF F001 TBB 91PC, R1] 0x3418E574: 03 DC.B 0x03 ; '\x03' 0x3418E575: 0F DC.B 0x0F ; '\x0F' 0x3418E576: 1B DC.B 0x1B ; '\x1B' 0x3418E577: 27 DC.B 0x27 ; ''' 0x3418E578: 33 DC.B 0x33 ; '3' 0x3418E579: 00 DC.B 0x00 ; '\0' 0x3418E57A: F644 013C MOVW R1, #0x483C 0x3418E57E: F2C5 6102 MOVT R1, #0x5602 0x3418E582: 6808 LDR R0, [R1] 0x3418E584: F020 7080 BIC R0, R0, #0x01000000 0x3418E588: 9A02 LDR R2, [SP, #8] 0x3418E58A: EA40 6002 ORR.W R0, R0, R2, LSL #24 0x3418E58E: 6008 STR R0, [R1] 0x3418E590: E02F B 46L7 ; 0x3418E5F2 0x3418E592: F644 013C MOVW R1, #0x483C 0x3418E596: F2C5 6102 MOVT R1, #0x5602 0x3418E59A: 6808 LDR R0, [R1] 0x3418E59C: F020 7000 BIC R0, R0, #0x02000000 0x3418E5A0: 9A02 LDR R2, [SP, #8] 0x3418E5A2: EA40 6042 ORR.W R0, R0, R2, LSL #25 0x3418E5A6: 6008 STR R0, [R1] 0x3418E5A8: E023 B 46L7 ; 0x3418E5F2 0x3418E5AA: F644 013C MOVW R1, #0x483C 0x3418E5AE: F2C5 6102 MOVT R1, #0x5602 0x3418E5B2: 6808 LDR R0, [R1] 0x3418E5B4: F020 6080 BIC R0, R0, #0x04000000 0x3418E5B8: 9A02 LDR R2, [SP, #8] 0x3418E5BA: EA40 6082 ORR.W R0, R0, R2, LSL #26 0x3418E5BE: 6008 STR R0, [R1] 0x3418E5C0: E017 B 46L7 ; 0x3418E5F2 0x3418E5C2: F644 0134 MOVW R1, #0x4834 0x3418E5C6: F2C5 6102 MOVT R1, #0x5602 0x3418E5CA: 6808 LDR R0, [R1] 0x3418E5CC: F020 7080 BIC R0, R0, #0x01000000 0x3418E5D0: 9A02 LDR R2, [SP, #8] 0x3418E5D2: EA40 6002 ORR.W R0, R0, R2, LSL #24 0x3418E5D6: 6008 STR R0, [R1] 0x3418E5D8: E00B B 46L7 ; 0x3418E5F2 0x3418E5DA: F644 0138 MOVW R1, #0x4838 0x3418E5DE: F2C5 6102 MOVT R1, #0x5602 0x3418E5E2: 6808 LDR R0, [R1] 0x3418E5E4: F020 7080 BIC R0, R0, #0x01000000 0x3418E5E8: 9A02 LDR R2, [SP, #8] 0x3418E5EA: EA40 6002 ORR.W R0, R0, R2, LSL #24 0x3418E5EE: 6008 STR R0, [R1] 0x3418E5F0: E7FF B 46L7 ; 0x3418E5F2
.L7: 0x3418E5F2: B004 ADD SP, SP, #16 0x3418E5F4: BD80 POP 123R7, PC}

Section .init.CRYP_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


CRYP_IRQHandler: 0x3418E5F6: E7FE B CRYP_IRQHandler ; 0x3418E5F6

Section .text.HAL_PWREx_EnableVddIO3 from blto2_FSBL_lto.o, size=18, align=4


HAL_PWREx_EnableVddIO3: 0x3418E5F8: F644 013C MOVW R1, #0x483C 0x3418E5FC: F2C5 6102 MOVT R1, #0x5602 0x3418E600: 6808 LDR R0, [R1] 0x3418E602: F440 7000 ORR R0, R0, #0x0200 0x3418E606: 6008 STR R0, [R1] 0x3418E608: 4770 BX LR

Section .init.PKA_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


PKA_IRQHandler: 0x3418E60A: E7FE B PKA_IRQHandler ; 0x3418E60A

Section .text.LL_RCC_HSI_Enable from blto2_FSBL_lto.o, size=14, align=4


LL_RCC_HSI_Enable: 0x3418E60C: F648 0100 MOVW R1, #0x8800 0x3418E610: F2C5 6102 MOVT R1, #0x5602 0x3418E614: 2008 MOVS R0, #8 0x3418E616: 6008 STR R0, [R1] 0x3418E618: 4770 BX LR

Section .init.HASH_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HASH_IRQHandler: 0x3418E61A: E7FE B HASH_IRQHandler ; 0x3418E61A

Section .text.HAL_RCC_OscConfig from blto2_FSBL_lto.o, size=2810, align=4


HAL_RCC_OscConfig: 0x3418E61C: B580 PUSH 123R7, LR} 0x3418E61E: B0A2 SUB SP, SP, #136 0x3418E620: 9020 STR R0, [SP, #128] 0x3418E622: 9820 LDR R0, [SP, #128] 0x3418E624: B920 CBNZ R0, .L1 ; 0x3418E630 0x3418E626: 2001 MOVS R0, #1 0x3418E628: F88D 0087 STRB.W R0, [SP, #135] 0x3418E62C: F000 BD6F B.W 46L144 ; 0x3418F10E
.L1: 0x3418E630: 9820 LDR R0, [SP, #128] 0x3418E632: 6800 LDR R0, [R0] 0x3418E634: B1E0 CBZ R0, .L2 ; 0x3418E670 0x3418E636: 9820 LDR R0, [SP, #128] 0x3418E638: 6800 LDR R0, [R0] 0x3418E63A: F000 0001 AND R0, R0, #1 0x3418E63E: 2801 CMP R0, #1 0x3418E640: D016 BEQ 46L2 ; 0x3418E670 0x3418E642: 9820 LDR R0, [SP, #128] 0x3418E644: 6800 LDR R0, [R0] 0x3418E646: F000 0002 AND R0, R0, #2 0x3418E64A: 2802 CMP R0, #2 0x3418E64C: D010 BEQ 46L2 ; 0x3418E670 0x3418E64E: 9820 LDR R0, [SP, #128] 0x3418E650: 6800 LDR R0, [R0] 0x3418E652: F000 0010 AND R0, R0, #16 0x3418E656: 2810 CMP R0, #16 0x3418E658: D00A BEQ 46L2 ; 0x3418E670 0x3418E65A: 9820 LDR R0, [SP, #128] 0x3418E65C: 6800 LDR R0, [R0] 0x3418E65E: F000 0008 AND R0, R0, #8 0x3418E662: 2808 CMP R0, #8 0x3418E664: D004 BEQ 46L2 ; 0x3418E670 0x3418E666: 9820 LDR R0, [SP, #128] 0x3418E668: 7800 LDRB R0, [R0] 0x3418E66A: 0740 LSLS R0, R0, #29 0x3418E66C: 2800 CMP R0, #0 0x3418E66E: D500 BPL 46L3 ; 0x3418E672
.L2: 0x3418E670: E007 B 46L4 ; 0x3418E682
.L3: 0x3418E672: F244 3032 MOVW R0, #0x4332 ; 0x34194332 = .rodata..L.str.50 0x3418E676: F2C3 4019 MOVT R0, #0x3419 ; 0x34194332 = .rodata..L.str.50 0x3418E67A: F44F 71BB MOV.W R1, #0x0176 0x3418E67E: F7FF FB0D BL assert_failed ; 0x3418DC9C
.L4: 0x3418E682: F7F3 FE4F BL LL_RCC_GetCpuClkSource ; 0x34182324 0x3418E686: 901D STR R0, [SP, #116] 0x3418E688: F7F3 FE54 BL LL_RCC_GetSysClkSource ; 0x34182334 0x3418E68C: 901E STR R0, [SP, #120] 0x3418E68E: F7F3 FE59 BL LL_RCC_PLL1_GetSource ; 0x34182344 0x3418E692: 901C STR R0, [SP, #112] 0x3418E694: F7F3 FE5E BL LL_RCC_PLL2_GetSource ; 0x34182354 0x3418E698: 901B STR R0, [SP, #108] 0x3418E69A: F7F3 FE63 BL LL_RCC_PLL3_GetSource ; 0x34182364 0x3418E69E: 901A STR R0, [SP, #104] 0x3418E6A0: F7F3 FE68 BL LL_RCC_PLL4_GetSource ; 0x34182374 0x3418E6A4: 9019 STR R0, [SP, #100] 0x3418E6A6: F248 0004 MOVW R0, #0x8004 0x3418E6AA: F2C5 6002 MOVT R0, #0x5602 0x3418E6AE: 6800 LDR R0, [R0] 0x3418E6B0: 9018 STR R0, [SP, #96] 0x3418E6B2: 9820 LDR R0, [SP, #128] 0x3418E6B4: 7800 LDRB R0, [R0] 0x3418E6B6: 07C0 LSLS R0, R0, #31 0x3418E6B8: 2800 CMP R0, #0 0x3418E6BA: F000 8101 BEQ.W 46L29 ; 0x3418E8C0 0x3418E6BE: 9820 LDR R0, [SP, #128] 0x3418E6C0: 6840 LDR R0, [R0, #4] 0x3418E6C2: B188 CBZ R0, .L5 ; 0x3418E6E8 0x3418E6C4: 9820 LDR R0, [SP, #128] 0x3418E6C6: 6840 LDR R0, [R0, #4] 0x3418E6C8: 2810 CMP R0, #16 0x3418E6CA: D00D BEQ 46L5 ; 0x3418E6E8 0x3418E6CC: 9820 LDR R0, [SP, #128] 0x3418E6CE: 6840 LDR R0, [R0, #4] 0x3418E6D0: F248 0110 MOVW R1, #0x8010 0x3418E6D4: 4288 CMP R0, R1 0x3418E6D6: D007 BEQ 46L5 ; 0x3418E6E8 0x3418E6D8: 9820 LDR R0, [SP, #128] 0x3418E6DA: 6840 LDR R0, [R0, #4] 0x3418E6DC: F248 0110 MOVW R1, #0x8010 0x3418E6E0: F2C0 0101 MOVT R1, #1 0x3418E6E4: 4288 CMP R0, R1 0x3418E6E6: D100 BNE 46L6 ; 0x3418E6EA
.L5: 0x3418E6E8: E007 B 46L7 ; 0x3418E6FA
.L6: 0x3418E6EA: F244 3032 MOVW R0, #0x4332 ; 0x34194332 = .rodata..L.str.50 0x3418E6EE: F2C3 4019 MOVT R0, #0x3419 ; 0x34194332 = .rodata..L.str.50 0x3418E6F2: F44F 71C2 MOV.W R1, #0x0184 0x3418E6F6: F7FF FAD1 BL assert_failed ; 0x3418DC9C
.L7: 0x3418E6FA: 981D LDR R0, [SP, #116] 0x3418E6FC: F5B0 1F00 CMP.W R0, #0x200000 0x3418E700: D02A BEQ 46L11 ; 0x3418E758 0x3418E702: 981E LDR R0, [SP, #120] 0x3418E704: F1B0 5F00 CMP.W R0, #0x20000000 0x3418E708: D026 BEQ 46L11 ; 0x3418E758 0x3418E70A: 981C LDR R0, [SP, #112] 0x3418E70C: F1B0 5F00 CMP.W R0, #0x20000000 0x3418E710: D105 BNE 46L8 ; 0x3418E71E 0x3418E712: 9818 LDR R0, [SP, #96] 0x3418E714: F400 7080 AND R0, R0, #0x0100 0x3418E718: F5B0 7F80 CMP.W R0, #0x0100 0x3418E71C: D01C BEQ 46L11 ; 0x3418E758
.L8: 0x3418E71E: 981B LDR R0, [SP, #108] 0x3418E720: F1B0 5F00 CMP.W R0, #0x20000000 0x3418E724: D105 BNE 46L9 ; 0x3418E732 0x3418E726: 9818 LDR R0, [SP, #96] 0x3418E728: F400 7000 AND R0, R0, #0x0200 0x3418E72C: F5B0 7F00 CMP.W R0, #0x0200 0x3418E730: D012 BEQ 46L11 ; 0x3418E758
.L9: 0x3418E732: 981A LDR R0, [SP, #104] 0x3418E734: F1B0 5F00 CMP.W R0, #0x20000000 0x3418E738: D105 BNE 46L10 ; 0x3418E746 0x3418E73A: 9818 LDR R0, [SP, #96] 0x3418E73C: F400 6080 AND R0, R0, #0x0400 0x3418E740: F5B0 6F80 CMP.W R0, #0x0400 0x3418E744: D008 BEQ 46L11 ; 0x3418E758
.L10: 0x3418E746: 9819 LDR R0, [SP, #100] 0x3418E748: F1B0 5F00 CMP.W R0, #0x20000000 0x3418E74C: D12E BNE 46L18 ; 0x3418E7AC 0x3418E74E: F89D 0061 LDRB.W R0, [SP, #97] 0x3418E752: 0700 LSLS R0, R0, #28 0x3418E754: 2800 CMP R0, #0 0x3418E756: D529 BPL 46L18 ; 0x3418E7AC
.L11: 0x3418E758: 9820 LDR R0, [SP, #128] 0x3418E75A: 6840 LDR R0, [R0, #4] 0x3418E75C: B920 CBNZ R0, .L12 ; 0x3418E768 0x3418E75E: 2001 MOVS R0, #1 0x3418E760: F88D 0087 STRB.W R0, [SP, #135] 0x3418E764: F000 BCD3 B.W 46L144 ; 0x3418F10E
.L12: 0x3418E768: F7F3 F890 BL HAL_GetTick ; 0x3418188C 0x3418E76C: 901F STR R0, [SP, #124]
.L13: 0x3418E76E: F248 0004 MOVW R0, #0x8004 0x3418E772: F2C5 6002 MOVT R0, #0x5602 0x3418E776: 6800 LDR R0, [R0] 0x3418E778: 06C0 LSLS R0, R0, #27 0x3418E77A: 2800 CMP R0, #0 0x3418E77C: D40B BMI 46L15 ; 0x3418E796 0x3418E77E: F7F3 F885 BL HAL_GetTick ; 0x3418188C 0x3418E782: 991F LDR R1, [SP, #124] 0x3418E784: 1A40 SUBS R0, R0, R1 0x3418E786: 2865 CMP R0, #101 0x3418E788: D304 BCC 46L14 ; 0x3418E794 0x3418E78A: 2003 MOVS R0, #3 0x3418E78C: F88D 0087 STRB.W R0, [SP, #135] 0x3418E790: F000 BCBD B.W 46L144 ; 0x3418F10E
.L14: 0x3418E794: E7EB B 46L13 ; 0x3418E76E
.L15: 0x3418E796: F7F3 F879 BL HAL_GetTick ; 0x3418188C 0x3418E79A: 901F STR R0, [SP, #124]
.L16: 0x3418E79C: F7F3 F876 BL HAL_GetTick ; 0x3418188C 0x3418E7A0: 991F LDR R1, [SP, #124] 0x3418E7A2: 1A40 SUBS R0, R0, R1 0x3418E7A4: 2801 CMP R0, #1 0x3418E7A6: D800 BHI 46L17 ; 0x3418E7AA 0x3418E7A8: E7F8 B 46L16 ; 0x3418E79C
.L17: 0x3418E7AA: E089 B 46L29 ; 0x3418E8C0
.L18: 0x3418E7AC: 9820 LDR R0, [SP, #128] 0x3418E7AE: 6840 LDR R0, [R0, #4] 0x3418E7B0: 2810 CMP R0, #16 0x3418E7B2: D106 BNE 46L19 ; 0x3418E7C2 0x3418E7B4: F648 0100 MOVW R1, #0x8800 0x3418E7B8: F2C5 6102 MOVT R1, #0x5602 0x3418E7BC: 2010 MOVS R0, #16 0x3418E7BE: 6008 STR R0, [R1] 0x3418E7C0: E04F B 46L23 ; 0x3418E862
.L19: 0x3418E7C2: 9820 LDR R0, [SP, #128] 0x3418E7C4: 6840 LDR R0, [R0, #4] 0x3418E7C6: B970 CBNZ R0, .L20 ; 0x3418E7E6 0x3418E7C8: F249 0100 MOVW R1, #0x9000 0x3418E7CC: F2C5 6102 MOVT R1, #0x5602 0x3418E7D0: 2010 MOVS R0, #16 0x3418E7D2: 6008 STR R0, [R1] 0x3418E7D4: F248 0154 MOVW R1, #0x8054 0x3418E7D8: F2C5 6102 MOVT R1, #0x5602 0x3418E7DC: 6808 LDR R0, [R1] 0x3418E7DE: F420 30C0 BIC R0, R0, #0x018000 0x3418E7E2: 6008 STR R0, [R1] 0x3418E7E4: E03D B 46L23 ; 0x3418E862
.L20: 0x3418E7E6: 9820 LDR R0, [SP, #128] 0x3418E7E8: 6840 LDR R0, [R0, #4] 0x3418E7EA: F248 0110 MOVW R1, #0x8010 0x3418E7EE: 4288 CMP R0, R1 0x3418E7F0: D112 BNE 46L21 ; 0x3418E818 0x3418E7F2: F248 0154 MOVW R1, #0x8054 0x3418E7F6: F2C5 6102 MOVT R1, #0x5602 0x3418E7FA: 6808 LDR R0, [R1] 0x3418E7FC: F440 4000 ORR R0, R0, #0x8000 0x3418E800: 6008 STR R0, [R1] 0x3418E802: 6808 LDR R0, [R1] 0x3418E804: F420 3080 BIC R0, R0, #0x010000 0x3418E808: 6008 STR R0, [R1] 0x3418E80A: F648 0100 MOVW R1, #0x8800 0x3418E80E: F2C5 6102 MOVT R1, #0x5602 0x3418E812: 2010 MOVS R0, #16 0x3418E814: 6008 STR R0, [R1] 0x3418E816: E024 B 46L23 ; 0x3418E862
.L21: 0x3418E818: 9820 LDR R0, [SP, #128] 0x3418E81A: 6840 LDR R0, [R0, #4] 0x3418E81C: F248 0110 MOVW R1, #0x8010 0x3418E820: F2C0 0101 MOVT R1, #1 0x3418E824: 4288 CMP R0, R1 0x3418E826: D10E BNE 46L22 ; 0x3418E846 0x3418E828: F248 0154 MOVW R1, #0x8054 0x3418E82C: F2C5 6102 MOVT R1, #0x5602 0x3418E830: 6808 LDR R0, [R1] 0x3418E832: F440 30C0 ORR R0, R0, #0x018000 0x3418E836: 6008 STR R0, [R1] 0x3418E838: F648 0100 MOVW R1, #0x8800 0x3418E83C: F2C5 6102 MOVT R1, #0x5602 0x3418E840: 2010 MOVS R0, #16 0x3418E842: 6008 STR R0, [R1] 0x3418E844: E00D B 46L23 ; 0x3418E862
.L22: 0x3418E846: F249 0100 MOVW R1, #0x9000 0x3418E84A: F2C5 6102 MOVT R1, #0x5602 0x3418E84E: 2010 MOVS R0, #16 0x3418E850: 6008 STR R0, [R1] 0x3418E852: F248 0154 MOVW R1, #0x8054 0x3418E856: F2C5 6102 MOVT R1, #0x5602 0x3418E85A: 6808 LDR R0, [R1] 0x3418E85C: F420 30C0 BIC R0, R0, #0x018000 0x3418E860: 6008 STR R0, [R1]
.L23: 0x3418E862: F7F3 F813 BL HAL_GetTick ; 0x3418188C 0x3418E866: 901F STR R0, [SP, #124] 0x3418E868: 9820 LDR R0, [SP, #128] 0x3418E86A: 6840 LDR R0, [R0, #4] 0x3418E86C: B1A0 CBZ R0, .L27 ; 0x3418E898
.L24: 0x3418E86E: F248 0004 MOVW R0, #0x8004 0x3418E872: F2C5 6002 MOVT R0, #0x5602 0x3418E876: 6800 LDR R0, [R0] 0x3418E878: 06C0 LSLS R0, R0, #27 0x3418E87A: 2800 CMP R0, #0 0x3418E87C: D40B BMI 46L26 ; 0x3418E896 0x3418E87E: F7F3 F805 BL HAL_GetTick ; 0x3418188C 0x3418E882: 991F LDR R1, [SP, #124] 0x3418E884: 1A40 SUBS R0, R0, R1 0x3418E886: 2865 CMP R0, #101 0x3418E888: D304 BCC 46L25 ; 0x3418E894 0x3418E88A: 2003 MOVS R0, #3 0x3418E88C: F88D 0087 STRB.W R0, [SP, #135] 0x3418E890: F000 BC3D B.W 46L144 ; 0x3418F10E
.L25: 0x3418E894: E7EB B 46L24 ; 0x3418E86E
.L26: 0x3418E896: E013 B 46L29 ; 0x3418E8C0
.L27: 0x3418E898: F248 0004 MOVW R0, #0x8004 0x3418E89C: F2C5 6002 MOVT R0, #0x5602 0x3418E8A0: 6800 LDR R0, [R0] 0x3418E8A2: 06C0 LSLS R0, R0, #27 0x3418E8A4: 2800 CMP R0, #0 0x3418E8A6: D50B BPL 46L29 ; 0x3418E8C0 0x3418E8A8: F7F2 FFF0 BL HAL_GetTick ; 0x3418188C 0x3418E8AC: 991F LDR R1, [SP, #124] 0x3418E8AE: 1A40 SUBS R0, R0, R1 0x3418E8B0: 2865 CMP R0, #101 0x3418E8B2: D304 BCC 46L28 ; 0x3418E8BE 0x3418E8B4: 2003 MOVS R0, #3 0x3418E8B6: F88D 0087 STRB.W R0, [SP, #135] 0x3418E8BA: F000 BC28 B.W 46L144 ; 0x3418F10E
.L28: 0x3418E8BE: E7EB B 46L27 ; 0x3418E898
.L29: 0x3418E8C0: 9820 LDR R0, [SP, #128] 0x3418E8C2: 7800 LDRB R0, [R0] 0x3418E8C4: 0780 LSLS R0, R0, #30 0x3418E8C6: 2800 CMP R0, #0 0x3418E8C8: F140 80C4 BPL.W 46L55 ; 0x3418EA54 0x3418E8CC: 9820 LDR R0, [SP, #128] 0x3418E8CE: 68C0 LDR R0, [R0, #12] 0x3418E8D0: B118 CBZ R0, .L30 ; 0x3418E8DA 0x3418E8D2: 9820 LDR R0, [SP, #128] 0x3418E8D4: 68C0 LDR R0, [R0, #12] 0x3418E8D6: 2808 CMP R0, #8 0x3418E8D8: D100 BNE 46L31 ; 0x3418E8DC
.L30: 0x3418E8DA: E007 B 46L32 ; 0x3418E8EC
.L31: 0x3418E8DC: F244 3032 MOVW R0, #0x4332 ; 0x34194332 = .rodata..L.str.50 0x3418E8E0: F2C3 4019 MOVT R0, #0x3419 ; 0x34194332 = .rodata..L.str.50 0x3418E8E4: F240 11CD MOVW R1, #0x01CD 0x3418E8E8: F7FF F9D8 BL assert_failed ; 0x3418DC9C
.L32: 0x3418E8EC: 981D LDR R0, [SP, #116] 0x3418E8EE: B300 CBZ R0, .L36 ; 0x3418E932 0x3418E8F0: 981E LDR R0, [SP, #120] 0x3418E8F2: B1F0 CBZ R0, .L36 ; 0x3418E932 0x3418E8F4: 981C LDR R0, [SP, #112] 0x3418E8F6: B928 CBNZ R0, .L33 ; 0x3418E904 0x3418E8F8: 9818 LDR R0, [SP, #96] 0x3418E8FA: F400 7080 AND R0, R0, #0x0100 0x3418E8FE: F5B0 7F80 CMP.W R0, #0x0100 0x3418E902: D016 BEQ 46L36 ; 0x3418E932
.L33: 0x3418E904: 981B LDR R0, [SP, #108] 0x3418E906: B928 CBNZ R0, .L34 ; 0x3418E914 0x3418E908: 9818 LDR R0, [SP, #96] 0x3418E90A: F400 7000 AND R0, R0, #0x0200 0x3418E90E: F5B0 7F00 CMP.W R0, #0x0200 0x3418E912: D00E BEQ 46L36 ; 0x3418E932
.L34: 0x3418E914: 981A LDR R0, [SP, #104] 0x3418E916: B928 CBNZ R0, .L35 ; 0x3418E924 0x3418E918: 9818 LDR R0, [SP, #96] 0x3418E91A: F400 6080 AND R0, R0, #0x0400 0x3418E91E: F5B0 6F80 CMP.W R0, #0x0400 0x3418E922: D006 BEQ 46L36 ; 0x3418E932
.L35: 0x3418E924: 9819 LDR R0, [SP, #100] 0x3418E926: BBD8 CBNZ R0, .L43 ; 0x3418E9A0 0x3418E928: F89D 0061 LDRB.W R0, [SP, #97] 0x3418E92C: 0700 LSLS R0, R0, #28 0x3418E92E: 2800 CMP R0, #0 0x3418E930: D536 BPL 46L43 ; 0x3418E9A0
.L36: 0x3418E932: 9820 LDR R0, [SP, #128] 0x3418E934: 68C0 LDR R0, [R0, #12] 0x3418E936: B918 CBNZ R0, .L37 ; 0x3418E940 0x3418E938: 2001 MOVS R0, #1 0x3418E93A: F88D 0087 STRB.W R0, [SP, #135] 0x3418E93E: E3E6 B 46L144 ; 0x3418F10E
.L37: 0x3418E940: 9820 LDR R0, [SP, #128] 0x3418E942: 6900 LDR R0, [R0, #16] 0x3418E944: B168 CBZ R0, .L38 ; 0x3418E962 0x3418E946: 9820 LDR R0, [SP, #128] 0x3418E948: 6900 LDR R0, [R0, #16] 0x3418E94A: 2880 CMP R0, #128 0x3418E94C: D009 BEQ 46L38 ; 0x3418E962 0x3418E94E: 9820 LDR R0, [SP, #128] 0x3418E950: 6900 LDR R0, [R0, #16] 0x3418E952: F5B0 7F80 CMP.W R0, #0x0100 0x3418E956: D004 BEQ 46L38 ; 0x3418E962 0x3418E958: 9820 LDR R0, [SP, #128] 0x3418E95A: 6900 LDR R0, [R0, #16] 0x3418E95C: F5B0 7FC0 CMP.W R0, #0x0180 0x3418E960: D100 BNE 46L39 ; 0x3418E964
.L38: 0x3418E962: E007 B 46L40 ; 0x3418E974
.L39: 0x3418E964: F244 3032 MOVW R0, #0x4332 ; 0x34194332 = .rodata..L.str.50 0x3418E968: F2C3 4019 MOVT R0, #0x3419 ; 0x34194332 = .rodata..L.str.50 0x3418E96C: F240 11DF MOVW R1, #0x01DF 0x3418E970: F7FF F994 BL assert_failed ; 0x3418DC9C
.L40: 0x3418E974: 9820 LDR R0, [SP, #128] 0x3418E976: 6940 LDR R0, [R0, #20] 0x3418E978: 287F CMP R0, #127 0x3418E97A: D800 BHI 46L41 ; 0x3418E97E 0x3418E97C: E007 B 46L42 ; 0x3418E98E
.L41: 0x3418E97E: F244 3032 MOVW R0, #0x4332 ; 0x34194332 = .rodata..L.str.50 0x3418E982: F2C3 4019 MOVT R0, #0x3419 ; 0x34194332 = .rodata..L.str.50 0x3418E986: F44F 71F0 MOV.W R1, #0x01E0 0x3418E98A: F7FF F987 BL assert_failed ; 0x3418DC9C
.L42: 0x3418E98E: 9820 LDR R0, [SP, #128] 0x3418E990: 6900 LDR R0, [R0, #16] 0x3418E992: F7F3 FCB1 BL LL_RCC_HSI_SetDivider ; 0x341822F8 0x3418E996: 9820 LDR R0, [SP, #128] 0x3418E998: 6940 LDR R0, [R0, #20] 0x3418E99A: F000 FBBD BL LL_RCC_HSI_SetCalibTrimming ; 0x3418F118 0x3418E99E: E059 B 46L55 ; 0x3418EA54
.L43: 0x3418E9A0: 9820 LDR R0, [SP, #128] 0x3418E9A2: 68C0 LDR R0, [R0, #12] 0x3418E9A4: 2800 CMP R0, #0 0x3418E9A6: D042 BEQ 46L52 ; 0x3418EA2E 0x3418E9A8: 9820 LDR R0, [SP, #128] 0x3418E9AA: 6900 LDR R0, [R0, #16] 0x3418E9AC: B168 CBZ R0, .L44 ; 0x3418E9CA 0x3418E9AE: 9820 LDR R0, [SP, #128] 0x3418E9B0: 6900 LDR R0, [R0, #16] 0x3418E9B2: 2880 CMP R0, #128 0x3418E9B4: D009 BEQ 46L44 ; 0x3418E9CA 0x3418E9B6: 9820 LDR R0, [SP, #128] 0x3418E9B8: 6900 LDR R0, [R0, #16] 0x3418E9BA: F5B0 7F80 CMP.W R0, #0x0100 0x3418E9BE: D004 BEQ 46L44 ; 0x3418E9CA 0x3418E9C0: 9820 LDR R0, [SP, #128] 0x3418E9C2: 6900 LDR R0, [R0, #16] 0x3418E9C4: F5B0 7FC0 CMP.W R0, #0x0180 0x3418E9C8: D100 BNE 46L45 ; 0x3418E9CC
.L44: 0x3418E9CA: E007 B 46L46 ; 0x3418E9DC
.L45: 0x3418E9CC: F244 3032 MOVW R0, #0x4332 ; 0x34194332 = .rodata..L.str.50 0x3418E9D0: F2C3 4019 MOVT R0, #0x3419 ; 0x34194332 = .rodata..L.str.50 0x3418E9D4: F44F 71F7 MOV.W R1, #0x01EE 0x3418E9D8: F7FF F960 BL assert_failed ; 0x3418DC9C
.L46: 0x3418E9DC: 9820 LDR R0, [SP, #128] 0x3418E9DE: 6940 LDR R0, [R0, #20] 0x3418E9E0: 287F CMP R0, #127 0x3418E9E2: D800 BHI 46L47 ; 0x3418E9E6 0x3418E9E4: E007 B 46L48 ; 0x3418E9F6
.L47: 0x3418E9E6: F244 3032 MOVW R0, #0x4332 ; 0x34194332 = .rodata..L.str.50 0x3418E9EA: F2C3 4019 MOVT R0, #0x3419 ; 0x34194332 = .rodata..L.str.50 0x3418E9EE: F240 11EF MOVW R1, #0x01EF 0x3418E9F2: F7FF F953 BL assert_failed ; 0x3418DC9C
.L48: 0x3418E9F6: F7FF FE09 BL LL_RCC_HSI_Enable ; 0x3418E60C 0x3418E9FA: F7F2 FF47 BL HAL_GetTick ; 0x3418188C 0x3418E9FE: 901F STR R0, [SP, #124]
.L49: 0x3418EA00: F7F3 FC88 BL LL_RCC_HSI_IsReady ; 0x34182314 0x3418EA04: B950 CBNZ R0, .L51 ; 0x3418EA1C 0x3418EA06: F7F2 FF41 BL HAL_GetTick ; 0x3418188C 0x3418EA0A: 991F LDR R1, [SP, #124] 0x3418EA0C: 1A40 SUBS R0, R0, R1 0x3418EA0E: 2802 CMP R0, #2 0x3418EA10: D303 BCC 46L50 ; 0x3418EA1A 0x3418EA12: 2003 MOVS R0, #3 0x3418EA14: F88D 0087 STRB.W R0, [SP, #135] 0x3418EA18: E379 B 46L144 ; 0x3418F10E
.L50: 0x3418EA1A: E7F1 B 46L49 ; 0x3418EA00
.L51: 0x3418EA1C: 9820 LDR R0, [SP, #128] 0x3418EA1E: 6900 LDR R0, [R0, #16] 0x3418EA20: F7F3 FC6A BL LL_RCC_HSI_SetDivider ; 0x341822F8 0x3418EA24: 9820 LDR R0, [SP, #128] 0x3418EA26: 6940 LDR R0, [R0, #20] 0x3418EA28: F000 FB76 BL LL_RCC_HSI_SetCalibTrimming ; 0x3418F118 0x3418EA2C: E012 B 46L55 ; 0x3418EA54
.L52: 0x3418EA2E: F000 FB83 BL LL_RCC_HSI_Disable ; 0x3418F138 0x3418EA32: F7F2 FF2B BL HAL_GetTick ; 0x3418188C 0x3418EA36: 901F STR R0, [SP, #124]
.L53: 0x3418EA38: F7F3 FC6C BL LL_RCC_HSI_IsReady ; 0x34182314 0x3418EA3C: B150 CBZ R0, .L55 ; 0x3418EA54 0x3418EA3E: F7F2 FF25 BL HAL_GetTick ; 0x3418188C 0x3418EA42: 991F LDR R1, [SP, #124] 0x3418EA44: 1A40 SUBS R0, R0, R1 0x3418EA46: 2802 CMP R0, #2 0x3418EA48: D303 BCC 46L54 ; 0x3418EA52 0x3418EA4A: 2003 MOVS R0, #3 0x3418EA4C: F88D 0087 STRB.W R0, [SP, #135] 0x3418EA50: E35D B 46L144 ; 0x3418F10E
.L54: 0x3418EA52: E7F1 B 46L53 ; 0x3418EA38
.L55: 0x3418EA54: 9820 LDR R0, [SP, #128] 0x3418EA56: 7800 LDRB R0, [R0] 0x3418EA58: 06C0 LSLS R0, R0, #27 0x3418EA5A: 2800 CMP R0, #0 0x3418EA5C: F140 80A8 BPL.W 46L78 ; 0x3418EBB0 0x3418EA60: 9820 LDR R0, [SP, #128] 0x3418EA62: 69C0 LDR R0, [R0, #28] 0x3418EA64: B118 CBZ R0, .L56 ; 0x3418EA6E 0x3418EA66: 9820 LDR R0, [SP, #128] 0x3418EA68: 69C0 LDR R0, [R0, #28] 0x3418EA6A: 2804 CMP R0, #4 0x3418EA6C: D100 BNE 46L57 ; 0x3418EA70
.L56: 0x3418EA6E: E007 B 46L58 ; 0x3418EA80
.L57: 0x3418EA70: F244 3032 MOVW R0, #0x4332 ; 0x34194332 = .rodata..L.str.50 0x3418EA74: F2C3 4019 MOVT R0, #0x3419 ; 0x34194332 = .rodata..L.str.50 0x3418EA78: F240 211D MOVW R1, #0x021D 0x3418EA7C: F7FF F90E BL assert_failed ; 0x3418DC9C
.L58: 0x3418EA80: 981D LDR R0, [SP, #116] 0x3418EA82: F5B0 1F80 CMP.W R0, #0x100000 0x3418EA86: D02A BEQ 46L62 ; 0x3418EADE 0x3418EA88: 981E LDR R0, [SP, #120] 0x3418EA8A: F1B0 5F80 CMP.W R0, #0x10000000 0x3418EA8E: D026 BEQ 46L62 ; 0x3418EADE 0x3418EA90: 981C LDR R0, [SP, #112] 0x3418EA92: F1B0 5F80 CMP.W R0, #0x10000000 0x3418EA96: D105 BNE 46L59 ; 0x3418EAA4 0x3418EA98: 9818 LDR R0, [SP, #96] 0x3418EA9A: F400 7080 AND R0, R0, #0x0100 0x3418EA9E: F5B0 7F80 CMP.W R0, #0x0100 0x3418EAA2: D01C BEQ 46L62 ; 0x3418EADE
.L59: 0x3418EAA4: 981B LDR R0, [SP, #108] 0x3418EAA6: F1B0 5F80 CMP.W R0, #0x10000000 0x3418EAAA: D105 BNE 46L60 ; 0x3418EAB8 0x3418EAAC: 9818 LDR R0, [SP, #96] 0x3418EAAE: F400 7000 AND R0, R0, #0x0200 0x3418EAB2: F5B0 7F00 CMP.W R0, #0x0200 0x3418EAB6: D012 BEQ 46L62 ; 0x3418EADE
.L60: 0x3418EAB8: 981A LDR R0, [SP, #104] 0x3418EABA: F1B0 5F80 CMP.W R0, #0x10000000 0x3418EABE: D105 BNE 46L61 ; 0x3418EACC 0x3418EAC0: 9818 LDR R0, [SP, #96] 0x3418EAC2: F400 6080 AND R0, R0, #0x0400 0x3418EAC6: F5B0 6F80 CMP.W R0, #0x0400 0x3418EACA: D008 BEQ 46L62 ; 0x3418EADE
.L61: 0x3418EACC: 9819 LDR R0, [SP, #100] 0x3418EACE: F1B0 5F80 CMP.W R0, #0x10000000 0x3418EAD2: D11D BNE 46L66 ; 0x3418EB10 0x3418EAD4: F89D 0061 LDRB.W R0, [SP, #97] 0x3418EAD8: 0700 LSLS R0, R0, #28 0x3418EADA: 2800 CMP R0, #0 0x3418EADC: D518 BPL 46L66 ; 0x3418EB10
.L62: 0x3418EADE: 9820 LDR R0, [SP, #128] 0x3418EAE0: 69C0 LDR R0, [R0, #28] 0x3418EAE2: B918 CBNZ R0, .L63 ; 0x3418EAEC 0x3418EAE4: 2001 MOVS R0, #1 0x3418EAE6: F88D 0087 STRB.W R0, [SP, #135] 0x3418EAEA: E310 B 46L144 ; 0x3418F10E
.L63: 0x3418EAEC: 9820 LDR R0, [SP, #128] 0x3418EAEE: 6A40 LDR R0, [R0, #36] 0x3418EAF0: 281F CMP R0, #31 0x3418EAF2: D800 BHI 46L64 ; 0x3418EAF6 0x3418EAF4: E007 B 46L65 ; 0x3418EB06
.L64: 0x3418EAF6: F244 3032 MOVW R0, #0x4332 ; 0x34194332 = .rodata..L.str.50 0x3418EAFA: F2C3 4019 MOVT R0, #0x3419 ; 0x34194332 = .rodata..L.str.50 0x3418EAFE: F44F 710C MOV.W R1, #0x0230 0x3418EB02: F7FF F8CB BL assert_failed ; 0x3418DC9C
.L65: 0x3418EB06: 9820 LDR R0, [SP, #128] 0x3418EB08: 6A40 LDR R0, [R0, #36] 0x3418EB0A: F000 FB1D BL LL_RCC_MSI_SetCalibTrimming ; 0x3418F148 0x3418EB0E: E04F B 46L78 ; 0x3418EBB0
.L66: 0x3418EB10: 9820 LDR R0, [SP, #128] 0x3418EB12: 69C0 LDR R0, [R0, #28] 0x3418EB14: B3C8 CBZ R0, .L75 ; 0x3418EB8A 0x3418EB16: 9820 LDR R0, [SP, #128] 0x3418EB18: 6A00 LDR R0, [R0, #32] 0x3418EB1A: B120 CBZ R0, .L67 ; 0x3418EB26 0x3418EB1C: 9820 LDR R0, [SP, #128] 0x3418EB1E: 6A00 LDR R0, [R0, #32] 0x3418EB20: F5B0 7F00 CMP.W R0, #0x0200 0x3418EB24: D100 BNE 46L68 ; 0x3418EB28
.L67: 0x3418EB26: E007 B 46L69 ; 0x3418EB38
.L68: 0x3418EB28: F244 3032 MOVW R0, #0x4332 ; 0x34194332 = .rodata..L.str.50 0x3418EB2C: F2C3 4019 MOVT R0, #0x3419 ; 0x34194332 = .rodata..L.str.50 0x3418EB30: F44F 710F MOV.W R1, #0x023C 0x3418EB34: F7FF F8B2 BL assert_failed ; 0x3418DC9C
.L69: 0x3418EB38: 9820 LDR R0, [SP, #128] 0x3418EB3A: 6A40 LDR R0, [R0, #36] 0x3418EB3C: 281F CMP R0, #31 0x3418EB3E: D800 BHI 46L70 ; 0x3418EB42 0x3418EB40: E007 B 46L71 ; 0x3418EB52
.L70: 0x3418EB42: F244 3032 MOVW R0, #0x4332 ; 0x34194332 = .rodata..L.str.50 0x3418EB46: F2C3 4019 MOVT R0, #0x3419 ; 0x34194332 = .rodata..L.str.50 0x3418EB4A: F240 213D MOVW R1, #0x023D 0x3418EB4E: F7FF F8A5 BL assert_failed ; 0x3418DC9C
.L71: 0x3418EB52: 9820 LDR R0, [SP, #128] 0x3418EB54: 6A00 LDR R0, [R0, #32] 0x3418EB56: F7F3 FC15 BL LL_RCC_MSI_SetFrequency ; 0x34182384 0x3418EB5A: F000 FB05 BL LL_RCC_MSI_Enable ; 0x3418F168 0x3418EB5E: F7F2 FE95 BL HAL_GetTick ; 0x3418188C 0x3418EB62: 901F STR R0, [SP, #124]
.L72: 0x3418EB64: F7F3 FC1C BL LL_RCC_MSI_IsReady ; 0x341823A0 0x3418EB68: B950 CBNZ R0, .L74 ; 0x3418EB80 0x3418EB6A: F7F2 FE8F BL HAL_GetTick ; 0x3418188C 0x3418EB6E: 991F LDR R1, [SP, #124] 0x3418EB70: 1A40 SUBS R0, R0, R1 0x3418EB72: 2802 CMP R0, #2 0x3418EB74: D303 BCC 46L73 ; 0x3418EB7E 0x3418EB76: 2003 MOVS R0, #3 0x3418EB78: F88D 0087 STRB.W R0, [SP, #135] 0x3418EB7C: E2C7 B 46L144 ; 0x3418F10E
.L73: 0x3418EB7E: E7F1 B 46L72 ; 0x3418EB64
.L74: 0x3418EB80: 9820 LDR R0, [SP, #128] 0x3418EB82: 6A40 LDR R0, [R0, #36] 0x3418EB84: F000 FAE0 BL LL_RCC_MSI_SetCalibTrimming ; 0x3418F148 0x3418EB88: E012 B 46L78 ; 0x3418EBB0
.L75: 0x3418EB8A: F000 FAF5 BL LL_RCC_MSI_Disable ; 0x3418F178 0x3418EB8E: F7F2 FE7D BL HAL_GetTick ; 0x3418188C 0x3418EB92: 901F STR R0, [SP, #124]
.L76: 0x3418EB94: F7F3 FC04 BL LL_RCC_MSI_IsReady ; 0x341823A0 0x3418EB98: B150 CBZ R0, .L78 ; 0x3418EBB0 0x3418EB9A: F7F2 FE77 BL HAL_GetTick ; 0x3418188C 0x3418EB9E: 991F LDR R1, [SP, #124] 0x3418EBA0: 1A40 SUBS R0, R0, R1 0x3418EBA2: 2802 CMP R0, #2 0x3418EBA4: D303 BCC 46L77 ; 0x3418EBAE 0x3418EBA6: 2003 MOVS R0, #3 0x3418EBA8: F88D 0087 STRB.W R0, [SP, #135] 0x3418EBAC: E2AF B 46L144 ; 0x3418F10E
.L77: 0x3418EBAE: E7F1 B 46L76 ; 0x3418EB94
.L78: 0x3418EBB0: 9820 LDR R0, [SP, #128] 0x3418EBB2: 7800 LDRB R0, [R0] 0x3418EBB4: 0700 LSLS R0, R0, #28 0x3418EBB6: 2800 CMP R0, #0 0x3418EBB8: D539 BPL 46L88 ; 0x3418EC2E 0x3418EBBA: 9820 LDR R0, [SP, #128] 0x3418EBBC: 6980 LDR R0, [R0, #24] 0x3418EBBE: B118 CBZ R0, .L79 ; 0x3418EBC8 0x3418EBC0: 9820 LDR R0, [SP, #128] 0x3418EBC2: 6980 LDR R0, [R0, #24] 0x3418EBC4: 2801 CMP R0, #1 0x3418EBC6: D100 BNE 46L80 ; 0x3418EBCA
.L79: 0x3418EBC8: E007 B 46L81 ; 0x3418EBDA
.L80: 0x3418EBCA: F244 3032 MOVW R0, #0x4332 ; 0x34194332 = .rodata..L.str.50 0x3418EBCE: F2C3 4019 MOVT R0, #0x3419 ; 0x34194332 = .rodata..L.str.50 0x3418EBD2: F240 216D MOVW R1, #0x026D 0x3418EBD6: F7FF F861 BL assert_failed ; 0x3418DC9C
.L81: 0x3418EBDA: 9820 LDR R0, [SP, #128] 0x3418EBDC: 6980 LDR R0, [R0, #24] 0x3418EBDE: B198 CBZ R0, .L85 ; 0x3418EC08 0x3418EBE0: F000 FAD2 BL LL_RCC_LSI_Enable ; 0x3418F188 0x3418EBE4: F7F2 FE52 BL HAL_GetTick ; 0x3418188C 0x3418EBE8: 901F STR R0, [SP, #124]
.L82: 0x3418EBEA: F7F3 FBE1 BL LL_RCC_LSI_IsReady ; 0x341823B0 0x3418EBEE: B950 CBNZ R0, .L84 ; 0x3418EC06 0x3418EBF0: F7F2 FE4C BL HAL_GetTick ; 0x3418188C 0x3418EBF4: 991F LDR R1, [SP, #124] 0x3418EBF6: 1A40 SUBS R0, R0, R1 0x3418EBF8: 2802 CMP R0, #2 0x3418EBFA: D303 BCC 46L83 ; 0x3418EC04 0x3418EBFC: 2003 MOVS R0, #3 0x3418EBFE: F88D 0087 STRB.W R0, [SP, #135] 0x3418EC02: E284 B 46L144 ; 0x3418F10E
.L83: 0x3418EC04: E7F1 B 46L82 ; 0x3418EBEA
.L84: 0x3418EC06: E012 B 46L88 ; 0x3418EC2E
.L85: 0x3418EC08: F000 FAC6 BL LL_RCC_LSI_Disable ; 0x3418F198 0x3418EC0C: F7F2 FE3E BL HAL_GetTick ; 0x3418188C 0x3418EC10: 901F STR R0, [SP, #124]
.L86: 0x3418EC12: F7F3 FBCD BL LL_RCC_LSI_IsReady ; 0x341823B0 0x3418EC16: B150 CBZ R0, .L88 ; 0x3418EC2E 0x3418EC18: F7F2 FE38 BL HAL_GetTick ; 0x3418188C 0x3418EC1C: 991F LDR R1, [SP, #124] 0x3418EC1E: 1A40 SUBS R0, R0, R1 0x3418EC20: 2802 CMP R0, #2 0x3418EC22: D303 BCC 46L87 ; 0x3418EC2C 0x3418EC24: 2003 MOVS R0, #3 0x3418EC26: F88D 0087 STRB.W R0, [SP, #135] 0x3418EC2A: E270 B 46L144 ; 0x3418F10E
.L87: 0x3418EC2C: E7F1 B 46L86 ; 0x3418EC12
.L88: 0x3418EC2E: 9820 LDR R0, [SP, #128] 0x3418EC30: 7800 LDRB R0, [R0] 0x3418EC32: 0740 LSLS R0, R0, #29 0x3418EC34: 2800 CMP R0, #0 0x3418EC36: F140 80AF BPL.W 46L103 ; 0x3418ED98 0x3418EC3A: 9820 LDR R0, [SP, #128] 0x3418EC3C: 6880 LDR R0, [R0, #8] 0x3418EC3E: B188 CBZ R0, .L89 ; 0x3418EC64 0x3418EC40: 9820 LDR R0, [SP, #128] 0x3418EC42: 6880 LDR R0, [R0, #8] 0x3418EC44: 2802 CMP R0, #2 0x3418EC46: D00D BEQ 46L89 ; 0x3418EC64 0x3418EC48: 9820 LDR R0, [SP, #128] 0x3418EC4A: 6880 LDR R0, [R0, #8] 0x3418EC4C: F248 0102 MOVW R1, #0x8002 0x3418EC50: 4288 CMP R0, R1 0x3418EC52: D007 BEQ 46L89 ; 0x3418EC64 0x3418EC54: 9820 LDR R0, [SP, #128] 0x3418EC56: 6880 LDR R0, [R0, #8] 0x3418EC58: F248 0102 MOVW R1, #0x8002 0x3418EC5C: F2C0 0101 MOVT R1, #1 0x3418EC60: 4288 CMP R0, R1 0x3418EC62: D100 BNE 46L90 ; 0x3418EC66
.L89: 0x3418EC64: E007 B 46L91 ; 0x3418EC76
.L90: 0x3418EC66: F244 3032 MOVW R0, #0x4332 ; 0x34194332 = .rodata..L.str.50 0x3418EC6A: F2C3 4019 MOVT R0, #0x3419 ; 0x34194332 = .rodata..L.str.50 0x3418EC6E: F44F 7126 MOV.W R1, #0x0298 0x3418EC72: F7FF F813 BL assert_failed ; 0x3418DC9C
.L91: 0x3418EC76: 9820 LDR R0, [SP, #128] 0x3418EC78: 6880 LDR R0, [R0, #8] 0x3418EC7A: 2802 CMP R0, #2 0x3418EC7C: D106 BNE 46L92 ; 0x3418EC8C 0x3418EC7E: F648 0100 MOVW R1, #0x8800 0x3418EC82: F2C5 6102 MOVT R1, #0x5602 0x3418EC86: 2002 MOVS R0, #2 0x3418EC88: 6008 STR R0, [R1] 0x3418EC8A: E05B B 46L96 ; 0x3418ED44
.L92: 0x3418EC8C: 9820 LDR R0, [SP, #128] 0x3418EC8E: 6880 LDR R0, [R0, #8] 0x3418EC90: B990 CBNZ R0, .L93 ; 0x3418ECB8 0x3418EC92: F249 0100 MOVW R1, #0x9000 0x3418EC96: F2C5 6102 MOVT R1, #0x5602 0x3418EC9A: 2002 MOVS R0, #2 0x3418EC9C: 6008 STR R0, [R1] 0x3418EC9E: F248 0140 MOVW R1, #0x8040 0x3418ECA2: F2C5 6102 MOVT R1, #0x5602 0x3418ECA6: 6808 LDR R0, [R1] 0x3418ECA8: F420 3080 BIC R0, R0, #0x010000 0x3418ECAC: 6008 STR R0, [R1] 0x3418ECAE: 6808 LDR R0, [R1] 0x3418ECB0: F420 4000 BIC R0, R0, #0x8000 0x3418ECB4: 6008 STR R0, [R1] 0x3418ECB6: E045 B 46L96 ; 0x3418ED44
.L93: 0x3418ECB8: 9820 LDR R0, [SP, #128] 0x3418ECBA: 6880 LDR R0, [R0, #8] 0x3418ECBC: F248 0102 MOVW R1, #0x8002 0x3418ECC0: 4288 CMP R0, R1 0x3418ECC2: D112 BNE 46L94 ; 0x3418ECEA 0x3418ECC4: F248 0140 MOVW R1, #0x8040 0x3418ECC8: F2C5 6102 MOVT R1, #0x5602 0x3418ECCC: 6808 LDR R0, [R1] 0x3418ECCE: F440 4000 ORR R0, R0, #0x8000 0x3418ECD2: 6008 STR R0, [R1] 0x3418ECD4: 6808 LDR R0, [R1] 0x3418ECD6: F420 3080 BIC R0, R0, #0x010000 0x3418ECDA: 6008 STR R0, [R1] 0x3418ECDC: F648 0100 MOVW R1, #0x8800 0x3418ECE0: F2C5 6102 MOVT R1, #0x5602 0x3418ECE4: 2002 MOVS R0, #2 0x3418ECE6: 6008 STR R0, [R1] 0x3418ECE8: E02C B 46L96 ; 0x3418ED44
.L94: 0x3418ECEA: 9820 LDR R0, [SP, #128] 0x3418ECEC: 6880 LDR R0, [R0, #8] 0x3418ECEE: F248 0102 MOVW R1, #0x8002 0x3418ECF2: F2C0 0101 MOVT R1, #1 0x3418ECF6: 4288 CMP R0, R1 0x3418ECF8: D112 BNE 46L95 ; 0x3418ED20 0x3418ECFA: F248 0140 MOVW R1, #0x8040 0x3418ECFE: F2C5 6102 MOVT R1, #0x5602 0x3418ED02: 6808 LDR R0, [R1] 0x3418ED04: F440 4000 ORR R0, R0, #0x8000 0x3418ED08: 6008 STR R0, [R1] 0x3418ED0A: 6808 LDR R0, [R1] 0x3418ED0C: F440 3080 ORR R0, R0, #0x010000 0x3418ED10: 6008 STR R0, [R1] 0x3418ED12: F648 0100 MOVW R1, #0x8800 0x3418ED16: F2C5 6102 MOVT R1, #0x5602 0x3418ED1A: 2002 MOVS R0, #2 0x3418ED1C: 6008 STR R0, [R1] 0x3418ED1E: E011 B 46L96 ; 0x3418ED44
.L95: 0x3418ED20: F249 0100 MOVW R1, #0x9000 0x3418ED24: F2C5 6102 MOVT R1, #0x5602 0x3418ED28: 2002 MOVS R0, #2 0x3418ED2A: 6008 STR R0, [R1] 0x3418ED2C: F248 0140 MOVW R1, #0x8040 0x3418ED30: F2C5 6102 MOVT R1, #0x5602 0x3418ED34: 6808 LDR R0, [R1] 0x3418ED36: F420 4000 BIC R0, R0, #0x8000 0x3418ED3A: 6008 STR R0, [R1] 0x3418ED3C: 6808 LDR R0, [R1] 0x3418ED3E: F420 3080 BIC R0, R0, #0x010000 0x3418ED42: 6008 STR R0, [R1]
.L96: 0x3418ED44: 9820 LDR R0, [SP, #128] 0x3418ED46: 6880 LDR R0, [R0, #8] 0x3418ED48: B198 CBZ R0, .L100 ; 0x3418ED72 0x3418ED4A: F7F2 FD9F BL HAL_GetTick ; 0x3418188C 0x3418ED4E: 901F STR R0, [SP, #124]
.L97: 0x3418ED50: F7F3 FB36 BL LL_RCC_LSE_IsReady ; 0x341823C0 0x3418ED54: B960 CBNZ R0, .L99 ; 0x3418ED70 0x3418ED56: F7F2 FD99 BL HAL_GetTick ; 0x3418188C 0x3418ED5A: 991F LDR R1, [SP, #124] 0x3418ED5C: 1A40 SUBS R0, R0, R1 0x3418ED5E: F241 3189 MOVW R1, #0x1389 0x3418ED62: 4288 CMP R0, R1 0x3418ED64: D303 BCC 46L98 ; 0x3418ED6E 0x3418ED66: 2003 MOVS R0, #3 0x3418ED68: F88D 0087 STRB.W R0, [SP, #135] 0x3418ED6C: E1CF B 46L144 ; 0x3418F10E
.L98: 0x3418ED6E: E7EF B 46L97 ; 0x3418ED50
.L99: 0x3418ED70: E012 B 46L103 ; 0x3418ED98
.L100: 0x3418ED72: F7F2 FD8B BL HAL_GetTick ; 0x3418188C 0x3418ED76: 901F STR R0, [SP, #124]
.L101: 0x3418ED78: F7F3 FB22 BL LL_RCC_LSE_IsReady ; 0x341823C0 0x3418ED7C: B160 CBZ R0, .L103 ; 0x3418ED98 0x3418ED7E: F7F2 FD85 BL HAL_GetTick ; 0x3418188C 0x3418ED82: 991F LDR R1, [SP, #124] 0x3418ED84: 1A40 SUBS R0, R0, R1 0x3418ED86: F241 3189 MOVW R1, #0x1389 0x3418ED8A: 4288 CMP R0, R1 0x3418ED8C: D303 BCC 46L102 ; 0x3418ED96 0x3418ED8E: 2003 MOVS R0, #3 0x3418ED90: F88D 0087 STRB.W R0, [SP, #135] 0x3418ED94: E1BB B 46L144 ; 0x3418F10E
.L102: 0x3418ED96: E7EF B 46L101 ; 0x3418ED78
.L103: 0x3418ED98: 9820 LDR R0, [SP, #128] 0x3418ED9A: 6A80 LDR R0, [R0, #40] 0x3418ED9C: B158 CBZ R0, .L104 ; 0x3418EDB6 0x3418ED9E: 9820 LDR R0, [SP, #128] 0x3418EDA0: 6A80 LDR R0, [R0, #40] 0x3418EDA2: 2801 CMP R0, #1 0x3418EDA4: D007 BEQ 46L104 ; 0x3418EDB6 0x3418EDA6: 9820 LDR R0, [SP, #128] 0x3418EDA8: 6A80 LDR R0, [R0, #40] 0x3418EDAA: 2802 CMP R0, #2 0x3418EDAC: D003 BEQ 46L104 ; 0x3418EDB6 0x3418EDAE: 9820 LDR R0, [SP, #128] 0x3418EDB0: 6A80 LDR R0, [R0, #40] 0x3418EDB2: 2803 CMP R0, #3 0x3418EDB4: D100 BNE 46L105 ; 0x3418EDB8
.L104: 0x3418EDB6: E007 B 46L106 ; 0x3418EDC8
.L105: 0x3418EDB8: F244 3032 MOVW R0, #0x4332 ; 0x34194332 = .rodata..L.str.50 0x3418EDBC: F2C3 4019 MOVT R0, #0x3419 ; 0x34194332 = .rodata..L.str.50 0x3418EDC0: F240 21BD MOVW R1, #0x02BD 0x3418EDC4: F7FE FF6A BL assert_failed ; 0x3418DC9C
.L106: 0x3418EDC8: 9820 LDR R0, [SP, #128] 0x3418EDCA: 6A80 LDR R0, [R0, #40] 0x3418EDCC: 2800 CMP R0, #0 0x3418EDCE: D04B BEQ 46L113 ; 0x3418EE68 0x3418EDD0: 9820 LDR R0, [SP, #128] 0x3418EDD2: F100 0128 ADD.W R1, R0, #40 0x3418EDD6: 2000 MOVS R0, #0 0x3418EDD8: F000 F9E6 BL RCC_PLL_IsNewConfig ; 0x3418F1A8 0x3418EDDC: 9017 STR R0, [SP, #92] 0x3418EDDE: F7F3 FAF7 BL LL_RCC_PLL1_IsReady ; 0x341823D0 0x3418EDE2: 9016 STR R0, [SP, #88] 0x3418EDE4: 9817 LDR R0, [SP, #92] 0x3418EDE6: 2801 CMP R0, #1 0x3418EDE8: D12F BNE 46L111 ; 0x3418EE4A 0x3418EDEA: F7F3 FAF9 BL LL_RCC_IC1_GetSource ; 0x341823E0 0x3418EDEE: 9015 STR R0, [SP, #84] 0x3418EDF0: F7F3 FAFE BL LL_RCC_IC2_GetSource ; 0x341823F0 0x3418EDF4: 9014 STR R0, [SP, #80] 0x3418EDF6: F7F3 FB03 BL LL_RCC_IC6_GetSource ; 0x34182400 0x3418EDFA: 9013 STR R0, [SP, #76] 0x3418EDFC: F7F3 FB08 BL LL_RCC_IC11_GetSource ; 0x34182410 0x3418EE00: 9012 STR R0, [SP, #72] 0x3418EE02: 981D LDR R0, [SP, #116] 0x3418EE04: F5B0 1F40 CMP.W R0, #0x300000 0x3418EE08: D105 BNE 46L107 ; 0x3418EE16 0x3418EE0A: 9815 LDR R0, [SP, #84] 0x3418EE0C: B918 CBNZ R0, .L107 ; 0x3418EE16 0x3418EE0E: 2001 MOVS R0, #1 0x3418EE10: F88D 0087 STRB.W R0, [SP, #135] 0x3418EE14: E17B B 46L144 ; 0x3418F10E
.L107: 0x3418EE16: 981E LDR R0, [SP, #120] 0x3418EE18: F1B0 5F40 CMP.W R0, #0x30000000 0x3418EE1C: D109 BNE 46L109 ; 0x3418EE32 0x3418EE1E: 9814 LDR R0, [SP, #80] 0x3418EE20: B118 CBZ R0, .L108 ; 0x3418EE2A 0x3418EE22: 9813 LDR R0, [SP, #76] 0x3418EE24: B108 CBZ R0, .L108 ; 0x3418EE2A 0x3418EE26: 9812 LDR R0, [SP, #72] 0x3418EE28: B918 CBNZ R0, .L109 ; 0x3418EE32
.L108: 0x3418EE2A: 2001 MOVS R0, #1 0x3418EE2C: F88D 0087 STRB.W R0, [SP, #135] 0x3418EE30: E16D B 46L144 ; 0x3418F10E
.L109: 0x3418EE32: 9820 LDR R0, [SP, #128] 0x3418EE34: F100 0128 ADD.W R1, R0, #40 0x3418EE38: 2000 MOVS R0, #0 0x3418EE3A: F000 FA23 BL RCC_PLL_Config ; 0x3418F284 0x3418EE3E: B118 CBZ R0, .L110 ; 0x3418EE48 0x3418EE40: 2001 MOVS R0, #1 0x3418EE42: F88D 0087 STRB.W R0, [SP, #135] 0x3418EE46: E162 B 46L144 ; 0x3418F10E
.L110: 0x3418EE48: E00E B 46L113 ; 0x3418EE68
.L111: 0x3418EE4A: 9820 LDR R0, [SP, #128] 0x3418EE4C: 6A80 LDR R0, [R0, #40] 0x3418EE4E: 2802 CMP R0, #2 0x3418EE50: D10A BNE 46L113 ; 0x3418EE68 0x3418EE52: 9816 LDR R0, [SP, #88] 0x3418EE54: B940 CBNZ R0, .L113 ; 0x3418EE68 0x3418EE56: 2000 MOVS R0, #0 0x3418EE58: F000 FBBC BL RCC_PLL_Enable ; 0x3418F5D4 0x3418EE5C: B118 CBZ R0, .L112 ; 0x3418EE66 0x3418EE5E: 2001 MOVS R0, #1 0x3418EE60: F88D 0087 STRB.W R0, [SP, #135] 0x3418EE64: E153 B 46L144 ; 0x3418F10E
.L112: 0x3418EE66: E7FF B 46L113 ; 0x3418EE68
.L113: 0x3418EE68: 9820 LDR R0, [SP, #128] 0x3418EE6A: 6C40 LDR R0, [R0, #68] 0x3418EE6C: B158 CBZ R0, .L114 ; 0x3418EE86 0x3418EE6E: 9820 LDR R0, [SP, #128] 0x3418EE70: 6C40 LDR R0, [R0, #68] 0x3418EE72: 2801 CMP R0, #1 0x3418EE74: D007 BEQ 46L114 ; 0x3418EE86 0x3418EE76: 9820 LDR R0, [SP, #128] 0x3418EE78: 6C40 LDR R0, [R0, #68] 0x3418EE7A: 2802 CMP R0, #2 0x3418EE7C: D003 BEQ 46L114 ; 0x3418EE86 0x3418EE7E: 9820 LDR R0, [SP, #128] 0x3418EE80: 6C40 LDR R0, [R0, #68] 0x3418EE82: 2803 CMP R0, #3 0x3418EE84: D100 BNE 46L115 ; 0x3418EE88
.L114: 0x3418EE86: E007 B 46L116 ; 0x3418EE98
.L115: 0x3418EE88: F244 3032 MOVW R0, #0x4332 ; 0x34194332 = .rodata..L.str.50 0x3418EE8C: F2C3 4019 MOVT R0, #0x3419 ; 0x34194332 = .rodata..L.str.50 0x3418EE90: F240 21EB MOVW R1, #0x02EB 0x3418EE94: F7FE FF02 BL assert_failed ; 0x3418DC9C
.L116: 0x3418EE98: 9820 LDR R0, [SP, #128] 0x3418EE9A: 6C40 LDR R0, [R0, #68] 0x3418EE9C: 2800 CMP R0, #0 0x3418EE9E: D053 BEQ 46L123 ; 0x3418EF48 0x3418EEA0: 9820 LDR R0, [SP, #128] 0x3418EEA2: F100 0144 ADD.W R1, R0, #68 0x3418EEA6: 2001 MOVS R0, #1 0x3418EEA8: F000 F97E BL RCC_PLL_IsNewConfig ; 0x3418F1A8 0x3418EEAC: 9011 STR R0, [SP, #68] 0x3418EEAE: F7F3 FAB7 BL LL_RCC_PLL2_IsReady ; 0x34182420 0x3418EEB2: 9010 STR R0, [SP, #64] 0x3418EEB4: 9811 LDR R0, [SP, #68] 0x3418EEB6: 2801 CMP R0, #1 0x3418EEB8: D137 BNE 46L121 ; 0x3418EF2A 0x3418EEBA: F7F3 FA91 BL LL_RCC_IC1_GetSource ; 0x341823E0 0x3418EEBE: 900F STR R0, [SP, #60] 0x3418EEC0: F7F3 FA96 BL LL_RCC_IC2_GetSource ; 0x341823F0 0x3418EEC4: 900E STR R0, [SP, #56] 0x3418EEC6: F7F3 FA9B BL LL_RCC_IC6_GetSource ; 0x34182400 0x3418EECA: 900D STR R0, [SP, #52] 0x3418EECC: F7F3 FAA0 BL LL_RCC_IC11_GetSource ; 0x34182410 0x3418EED0: 900C STR R0, [SP, #48] 0x3418EED2: 981D LDR R0, [SP, #116] 0x3418EED4: F5B0 1F40 CMP.W R0, #0x300000 0x3418EED8: D107 BNE 46L117 ; 0x3418EEEA 0x3418EEDA: 980F LDR R0, [SP, #60] 0x3418EEDC: F1B0 5F80 CMP.W R0, #0x10000000 0x3418EEE0: D103 BNE 46L117 ; 0x3418EEEA 0x3418EEE2: 2001 MOVS R0, #1 0x3418EEE4: F88D 0087 STRB.W R0, [SP, #135] 0x3418EEE8: E111 B 46L144 ; 0x3418F10E
.L117: 0x3418EEEA: 981E LDR R0, [SP, #120] 0x3418EEEC: F1B0 5F40 CMP.W R0, #0x30000000 0x3418EEF0: D10F BNE 46L119 ; 0x3418EF12 0x3418EEF2: 980E LDR R0, [SP, #56] 0x3418EEF4: F1B0 5F80 CMP.W R0, #0x10000000 0x3418EEF8: D007 BEQ 46L118 ; 0x3418EF0A 0x3418EEFA: 980D LDR R0, [SP, #52] 0x3418EEFC: F1B0 5F80 CMP.W R0, #0x10000000 0x3418EF00: D003 BEQ 46L118 ; 0x3418EF0A 0x3418EF02: 980C LDR R0, [SP, #48] 0x3418EF04: F1B0 5F80 CMP.W R0, #0x10000000 0x3418EF08: D103 BNE 46L119 ; 0x3418EF12
.L118: 0x3418EF0A: 2001 MOVS R0, #1 0x3418EF0C: F88D 0087 STRB.W R0, [SP, #135] 0x3418EF10: E0FD B 46L144 ; 0x3418F10E
.L119: 0x3418EF12: 9820 LDR R0, [SP, #128] 0x3418EF14: F100 0144 ADD.W R1, R0, #68 0x3418EF18: 2001 MOVS R0, #1 0x3418EF1A: F000 F9B3 BL RCC_PLL_Config ; 0x3418F284 0x3418EF1E: B118 CBZ R0, .L120 ; 0x3418EF28 0x3418EF20: 2001 MOVS R0, #1 0x3418EF22: F88D 0087 STRB.W R0, [SP, #135] 0x3418EF26: E0F2 B 46L144 ; 0x3418F10E
.L120: 0x3418EF28: E00E B 46L123 ; 0x3418EF48
.L121: 0x3418EF2A: 9820 LDR R0, [SP, #128] 0x3418EF2C: 6C40 LDR R0, [R0, #68] 0x3418EF2E: 2802 CMP R0, #2 0x3418EF30: D10A BNE 46L123 ; 0x3418EF48 0x3418EF32: 9810 LDR R0, [SP, #64] 0x3418EF34: B940 CBNZ R0, .L123 ; 0x3418EF48 0x3418EF36: 2001 MOVS R0, #1 0x3418EF38: F000 FB4C BL RCC_PLL_Enable ; 0x3418F5D4 0x3418EF3C: B118 CBZ R0, .L122 ; 0x3418EF46 0x3418EF3E: 2001 MOVS R0, #1 0x3418EF40: F88D 0087 STRB.W R0, [SP, #135] 0x3418EF44: E0E3 B 46L144 ; 0x3418F10E
.L122: 0x3418EF46: E7FF B 46L123 ; 0x3418EF48
.L123: 0x3418EF48: 9820 LDR R0, [SP, #128] 0x3418EF4A: 6E00 LDR R0, [R0, #96] 0x3418EF4C: B158 CBZ R0, .L124 ; 0x3418EF66 0x3418EF4E: 9820 LDR R0, [SP, #128] 0x3418EF50: 6E00 LDR R0, [R0, #96] 0x3418EF52: 2801 CMP R0, #1 0x3418EF54: D007 BEQ 46L124 ; 0x3418EF66 0x3418EF56: 9820 LDR R0, [SP, #128] 0x3418EF58: 6E00 LDR R0, [R0, #96] 0x3418EF5A: 2802 CMP R0, #2 0x3418EF5C: D003 BEQ 46L124 ; 0x3418EF66 0x3418EF5E: 9820 LDR R0, [SP, #128] 0x3418EF60: 6E00 LDR R0, [R0, #96] 0x3418EF62: 2803 CMP R0, #3 0x3418EF64: D100 BNE 46L125 ; 0x3418EF68
.L124: 0x3418EF66: E007 B 46L126 ; 0x3418EF78
.L125: 0x3418EF68: F244 3032 MOVW R0, #0x4332 ; 0x34194332 = .rodata..L.str.50 0x3418EF6C: F2C3 4019 MOVT R0, #0x3419 ; 0x34194332 = .rodata..L.str.50 0x3418EF70: F240 3119 MOVW R1, #0x0319 0x3418EF74: F7FE FE92 BL assert_failed ; 0x3418DC9C
.L126: 0x3418EF78: 9820 LDR R0, [SP, #128] 0x3418EF7A: 6E00 LDR R0, [R0, #96] 0x3418EF7C: 2800 CMP R0, #0 0x3418EF7E: D053 BEQ 46L133 ; 0x3418F028 0x3418EF80: 9820 LDR R0, [SP, #128] 0x3418EF82: F100 0160 ADD.W R1, R0, #96 0x3418EF86: 2002 MOVS R0, #2 0x3418EF88: F000 F90E BL RCC_PLL_IsNewConfig ; 0x3418F1A8 0x3418EF8C: 900B STR R0, [SP, #44] 0x3418EF8E: F7F3 FA4F BL LL_RCC_PLL3_IsReady ; 0x34182430 0x3418EF92: 900A STR R0, [SP, #40] 0x3418EF94: 980B LDR R0, [SP, #44] 0x3418EF96: 2801 CMP R0, #1 0x3418EF98: D137 BNE 46L131 ; 0x3418F00A 0x3418EF9A: F7F3 FA21 BL LL_RCC_IC1_GetSource ; 0x341823E0 0x3418EF9E: 9009 STR R0, [SP, #36] 0x3418EFA0: F7F3 FA26 BL LL_RCC_IC2_GetSource ; 0x341823F0 0x3418EFA4: 9008 STR R0, [SP, #32] 0x3418EFA6: F7F3 FA2B BL LL_RCC_IC6_GetSource ; 0x34182400 0x3418EFAA: 9007 STR R0, [SP, #28] 0x3418EFAC: F7F3 FA30 BL LL_RCC_IC11_GetSource ; 0x34182410 0x3418EFB0: 9006 STR R0, [SP, #24] 0x3418EFB2: 981D LDR R0, [SP, #116] 0x3418EFB4: F5B0 1F40 CMP.W R0, #0x300000 0x3418EFB8: D107 BNE 46L127 ; 0x3418EFCA 0x3418EFBA: 9809 LDR R0, [SP, #36] 0x3418EFBC: F1B0 5F00 CMP.W R0, #0x20000000 0x3418EFC0: D103 BNE 46L127 ; 0x3418EFCA 0x3418EFC2: 2001 MOVS R0, #1 0x3418EFC4: F88D 0087 STRB.W R0, [SP, #135] 0x3418EFC8: E0A1 B 46L144 ; 0x3418F10E
.L127: 0x3418EFCA: 981E LDR R0, [SP, #120] 0x3418EFCC: F1B0 5F40 CMP.W R0, #0x30000000 0x3418EFD0: D10F BNE 46L129 ; 0x3418EFF2 0x3418EFD2: 9808 LDR R0, [SP, #32] 0x3418EFD4: F1B0 5F00 CMP.W R0, #0x20000000 0x3418EFD8: D007 BEQ 46L128 ; 0x3418EFEA 0x3418EFDA: 9807 LDR R0, [SP, #28] 0x3418EFDC: F1B0 5F00 CMP.W R0, #0x20000000 0x3418EFE0: D003 BEQ 46L128 ; 0x3418EFEA 0x3418EFE2: 9806 LDR R0, [SP, #24] 0x3418EFE4: F1B0 5F00 CMP.W R0, #0x20000000 0x3418EFE8: D103 BNE 46L129 ; 0x3418EFF2
.L128: 0x3418EFEA: 2001 MOVS R0, #1 0x3418EFEC: F88D 0087 STRB.W R0, [SP, #135] 0x3418EFF0: E08D B 46L144 ; 0x3418F10E
.L129: 0x3418EFF2: 9820 LDR R0, [SP, #128] 0x3418EFF4: F100 0160 ADD.W R1, R0, #96 0x3418EFF8: 2002 MOVS R0, #2 0x3418EFFA: F000 F943 BL RCC_PLL_Config ; 0x3418F284 0x3418EFFE: B118 CBZ R0, .L130 ; 0x3418F008 0x3418F000: 2001 MOVS R0, #1 0x3418F002: F88D 0087 STRB.W R0, [SP, #135] 0x3418F006: E082 B 46L144 ; 0x3418F10E
.L130: 0x3418F008: E00E B 46L133 ; 0x3418F028
.L131: 0x3418F00A: 9820 LDR R0, [SP, #128] 0x3418F00C: 6E00 LDR R0, [R0, #96] 0x3418F00E: 2802 CMP R0, #2 0x3418F010: D10A BNE 46L133 ; 0x3418F028 0x3418F012: 980A LDR R0, [SP, #40] 0x3418F014: B940 CBNZ R0, .L133 ; 0x3418F028 0x3418F016: 2002 MOVS R0, #2 0x3418F018: F000 FADC BL RCC_PLL_Enable ; 0x3418F5D4 0x3418F01C: B118 CBZ R0, .L132 ; 0x3418F026 0x3418F01E: 2001 MOVS R0, #1 0x3418F020: F88D 0087 STRB.W R0, [SP, #135] 0x3418F024: E073 B 46L144 ; 0x3418F10E
.L132: 0x3418F026: E7FF B 46L133 ; 0x3418F028
.L133: 0x3418F028: 9820 LDR R0, [SP, #128] 0x3418F02A: 6FC0 LDR R0, [R0, #124] 0x3418F02C: B158 CBZ R0, .L134 ; 0x3418F046 0x3418F02E: 9820 LDR R0, [SP, #128] 0x3418F030: 6FC0 LDR R0, [R0, #124] 0x3418F032: 2801 CMP R0, #1 0x3418F034: D007 BEQ 46L134 ; 0x3418F046 0x3418F036: 9820 LDR R0, [SP, #128] 0x3418F038: 6FC0 LDR R0, [R0, #124] 0x3418F03A: 2802 CMP R0, #2 0x3418F03C: D003 BEQ 46L134 ; 0x3418F046 0x3418F03E: 9820 LDR R0, [SP, #128] 0x3418F040: 6FC0 LDR R0, [R0, #124] 0x3418F042: 2803 CMP R0, #3 0x3418F044: D100 BNE 46L135 ; 0x3418F048
.L134: 0x3418F046: E007 B 46L136 ; 0x3418F058
.L135: 0x3418F048: F244 3032 MOVW R0, #0x4332 ; 0x34194332 = .rodata..L.str.50 0x3418F04C: F2C3 4019 MOVT R0, #0x3419 ; 0x34194332 = .rodata..L.str.50 0x3418F050: F240 3146 MOVW R1, #0x0346 0x3418F054: F7FE FE22 BL assert_failed ; 0x3418DC9C
.L136: 0x3418F058: 9820 LDR R0, [SP, #128] 0x3418F05A: 6FC0 LDR R0, [R0, #124] 0x3418F05C: 2800 CMP R0, #0 0x3418F05E: D053 BEQ 46L143 ; 0x3418F108 0x3418F060: 9820 LDR R0, [SP, #128] 0x3418F062: F100 017C ADD.W R1, R0, #124 0x3418F066: 2003 MOVS R0, #3 0x3418F068: F000 F89E BL RCC_PLL_IsNewConfig ; 0x3418F1A8 0x3418F06C: 9005 STR R0, [SP, #20] 0x3418F06E: F7F3 F9E7 BL LL_RCC_PLL4_IsReady ; 0x34182440 0x3418F072: 9004 STR R0, [SP, #16] 0x3418F074: 9805 LDR R0, [SP, #20] 0x3418F076: 2801 CMP R0, #1 0x3418F078: D137 BNE 46L141 ; 0x3418F0EA 0x3418F07A: F7F3 F9B1 BL LL_RCC_IC1_GetSource ; 0x341823E0 0x3418F07E: 9003 STR R0, [SP, #12] 0x3418F080: F7F3 F9B6 BL LL_RCC_IC2_GetSource ; 0x341823F0 0x3418F084: 9002 STR R0, [SP, #8] 0x3418F086: F7F3 F9BB BL LL_RCC_IC6_GetSource ; 0x34182400 0x3418F08A: 9001 STR R0, [SP, #4] 0x3418F08C: F7F3 F9C0 BL LL_RCC_IC11_GetSource ; 0x34182410 0x3418F090: 9000 STR R0, [SP, #0] 0x3418F092: 981D LDR R0, [SP, #116] 0x3418F094: F5B0 1F40 CMP.W R0, #0x300000 0x3418F098: D107 BNE 46L137 ; 0x3418F0AA 0x3418F09A: 9803 LDR R0, [SP, #12] 0x3418F09C: F1B0 5F40 CMP.W R0, #0x30000000 0x3418F0A0: D103 BNE 46L137 ; 0x3418F0AA 0x3418F0A2: 2001 MOVS R0, #1 0x3418F0A4: F88D 0087 STRB.W R0, [SP, #135] 0x3418F0A8: E031 B 46L144 ; 0x3418F10E
.L137: 0x3418F0AA: 981E LDR R0, [SP, #120] 0x3418F0AC: F1B0 5F40 CMP.W R0, #0x30000000 0x3418F0B0: D10F BNE 46L139 ; 0x3418F0D2 0x3418F0B2: 9802 LDR R0, [SP, #8] 0x3418F0B4: F1B0 5F40 CMP.W R0, #0x30000000 0x3418F0B8: D007 BEQ 46L138 ; 0x3418F0CA 0x3418F0BA: 9801 LDR R0, [SP, #4] 0x3418F0BC: F1B0 5F40 CMP.W R0, #0x30000000 0x3418F0C0: D003 BEQ 46L138 ; 0x3418F0CA 0x3418F0C2: 9800 LDR R0, [SP, #0] 0x3418F0C4: F1B0 5F40 CMP.W R0, #0x30000000 0x3418F0C8: D103 BNE 46L139 ; 0x3418F0D2
.L138: 0x3418F0CA: 2001 MOVS R0, #1 0x3418F0CC: F88D 0087 STRB.W R0, [SP, #135] 0x3418F0D0: E01D B 46L144 ; 0x3418F10E
.L139: 0x3418F0D2: 9820 LDR R0, [SP, #128] 0x3418F0D4: F100 017C ADD.W R1, R0, #124 0x3418F0D8: 2003 MOVS R0, #3 0x3418F0DA: F000 F8D3 BL RCC_PLL_Config ; 0x3418F284 0x3418F0DE: B118 CBZ R0, .L140 ; 0x3418F0E8 0x3418F0E0: 2001 MOVS R0, #1 0x3418F0E2: F88D 0087 STRB.W R0, [SP, #135] 0x3418F0E6: E012 B 46L144 ; 0x3418F10E
.L140: 0x3418F0E8: E00E B 46L143 ; 0x3418F108
.L141: 0x3418F0EA: 9820 LDR R0, [SP, #128] 0x3418F0EC: 6FC0 LDR R0, [R0, #124] 0x3418F0EE: 2802 CMP R0, #2 0x3418F0F0: D10A BNE 46L143 ; 0x3418F108 0x3418F0F2: 9804 LDR R0, [SP, #16] 0x3418F0F4: B940 CBNZ R0, .L143 ; 0x3418F108 0x3418F0F6: 2003 MOVS R0, #3 0x3418F0F8: F000 FA6C BL RCC_PLL_Enable ; 0x3418F5D4 0x3418F0FC: B118 CBZ R0, .L142 ; 0x3418F106 0x3418F0FE: 2001 MOVS R0, #1 0x3418F100: F88D 0087 STRB.W R0, [SP, #135] 0x3418F104: E003 B 46L144 ; 0x3418F10E
.L142: 0x3418F106: E7FF B 46L143 ; 0x3418F108
.L143: 0x3418F108: 2000 MOVS R0, #0 0x3418F10A: F88D 0087 STRB.W R0, [SP, #135]
.L144: 0x3418F10E: F89D 0087 LDRB.W R0, [SP, #135] 0x3418F112: B022 ADD SP, SP, #136 0x3418F114: BD80 POP 123R7, PC}

Section .init.RNG_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


RNG_IRQHandler: 0x3418F116: E7FE B RNG_IRQHandler ; 0x3418F116

Section .text.LL_RCC_HSI_SetCalibTrimming from blto2_FSBL_lto.o, size=30, align=4


LL_RCC_HSI_SetCalibTrimming: 0x3418F118: B081 SUB SP, SP, #4 0x3418F11A: 9000 STR R0, [SP, #0] 0x3418F11C: F248 0148 MOVW R1, #0x8048 0x3418F120: F2C5 6102 MOVT R1, #0x5602 0x3418F124: 6808 LDR R0, [R1] 0x3418F126: F420 00FE BIC R0, R0, #0x7F0000 0x3418F12A: 9A00 LDR R2, [SP, #0] 0x3418F12C: EA40 4002 ORR.W R0, R0, R2, LSL #16 0x3418F130: 6008 STR R0, [R1] 0x3418F132: B001 ADD SP, SP, #4 0x3418F134: 4770 BX LR

Section .init.MCE1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


MCE1_IRQHandler: 0x3418F136: E7FE B MCE1_IRQHandler ; 0x3418F136

Section .text.LL_RCC_HSI_Disable from blto2_FSBL_lto.o, size=14, align=4


LL_RCC_HSI_Disable: 0x3418F138: F249 0100 MOVW R1, #0x9000 0x3418F13C: F2C5 6102 MOVT R1, #0x5602 0x3418F140: 2008 MOVS R0, #8 0x3418F142: 6008 STR R0, [R1] 0x3418F144: 4770 BX LR

Section .init.MCE2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


MCE2_IRQHandler: 0x3418F146: E7FE B MCE2_IRQHandler ; 0x3418F146

Section .text.LL_RCC_MSI_SetCalibTrimming from blto2_FSBL_lto.o, size=30, align=4


LL_RCC_MSI_SetCalibTrimming: 0x3418F148: B081 SUB SP, SP, #4 0x3418F14A: 9000 STR R0, [SP, #0] 0x3418F14C: F248 0144 MOVW R1, #0x8044 0x3418F150: F2C5 6102 MOVT R1, #0x5602 0x3418F154: 6808 LDR R0, [R1] 0x3418F156: F420 10F8 BIC R0, R0, #0x1F0000 0x3418F15A: 9A00 LDR R2, [SP, #0] 0x3418F15C: EA40 4002 ORR.W R0, R0, R2, LSL #16 0x3418F160: 6008 STR R0, [R1] 0x3418F162: B001 ADD SP, SP, #4 0x3418F164: 4770 BX LR

Section .init.MCE3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


MCE3_IRQHandler: 0x3418F166: E7FE B MCE3_IRQHandler ; 0x3418F166

Section .text.LL_RCC_MSI_Enable from blto2_FSBL_lto.o, size=14, align=4


LL_RCC_MSI_Enable: 0x3418F168: F648 0100 MOVW R1, #0x8800 0x3418F16C: F2C5 6102 MOVT R1, #0x5602 0x3418F170: 2004 MOVS R0, #4 0x3418F172: 6008 STR R0, [R1] 0x3418F174: 4770 BX LR

Section .init.MCE4_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


MCE4_IRQHandler: 0x3418F176: E7FE B MCE4_IRQHandler ; 0x3418F176

Section .text.LL_RCC_MSI_Disable from blto2_FSBL_lto.o, size=14, align=4


LL_RCC_MSI_Disable: 0x3418F178: F249 0100 MOVW R1, #0x9000 0x3418F17C: F2C5 6102 MOVT R1, #0x5602 0x3418F180: 2004 MOVS R0, #4 0x3418F182: 6008 STR R0, [R1] 0x3418F184: 4770 BX LR

Section .init.ADC1_2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


ADC1_2_IRQHandler: 0x3418F186: E7FE B ADC1_2_IRQHandler ; 0x3418F186

Section .text.LL_RCC_LSI_Enable from blto2_FSBL_lto.o, size=14, align=4


LL_RCC_LSI_Enable: 0x3418F188: F648 0100 MOVW R1, #0x8800 0x3418F18C: F2C5 6102 MOVT R1, #0x5602 0x3418F190: 2001 MOVS R0, #1 0x3418F192: 6008 STR R0, [R1] 0x3418F194: 4770 BX LR

Section .init.CSI_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


CSI_IRQHandler: 0x3418F196: E7FE B CSI_IRQHandler ; 0x3418F196

Section .text.LL_RCC_LSI_Disable from blto2_FSBL_lto.o, size=14, align=4


LL_RCC_LSI_Disable: 0x3418F198: F249 0100 MOVW R1, #0x9000 0x3418F19C: F2C5 6102 MOVT R1, #0x5602 0x3418F1A0: 2001 MOVS R0, #1 0x3418F1A2: 6008 STR R0, [R1] 0x3418F1A4: 4770 BX LR

Section .init.DCMIPP_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


DCMIPP_IRQHandler: 0x3418F1A6: E7FE B DCMIPP_IRQHandler ; 0x3418F1A6

Section .text.RCC_PLL_IsNewConfig from blto2_FSBL_lto.o, size=218, align=4


RCC_PLL_IsNewConfig: 0x3418F1A8: B087 SUB SP, SP, #28 0x3418F1AA: 9006 STR R0, [SP, #24] 0x3418F1AC: 9105 STR R1, [SP, #20] 0x3418F1AE: 2000 MOVS R0, #0 0x3418F1B0: 9001 STR R0, [SP, #4] 0x3418F1B2: 9906 LDR R1, [SP, #24] 0x3418F1B4: F248 0080 MOVW R0, #0x8080 0x3418F1B8: F2C5 6002 MOVT R0, #0x5602 0x3418F1BC: EB00 1001 ADD.W R0, R0, R1, LSL #4 0x3418F1C0: 9004 STR R0, [SP, #16] 0x3418F1C2: 9906 LDR R1, [SP, #24] 0x3418F1C4: F248 0084 MOVW R0, #0x8084 0x3418F1C8: F2C5 6002 MOVT R0, #0x5602 0x3418F1CC: EB00 1001 ADD.W R0, R0, R1, LSL #4 0x3418F1D0: 9003 STR R0, [SP, #12] 0x3418F1D2: 9906 LDR R1, [SP, #24] 0x3418F1D4: F248 0088 MOVW R0, #0x8088 0x3418F1D8: F2C5 6002 MOVT R0, #0x5602 0x3418F1DC: EB00 1001 ADD.W R0, R0, R1, LSL #4 0x3418F1E0: 9002 STR R0, [SP, #8] 0x3418F1E2: 9804 LDR R0, [SP, #16] 0x3418F1E4: 6800 LDR R0, [R0] 0x3418F1E6: F64F 7100 MOVW R1, #0xFF00 0x3418F1EA: F2C7 31FF MOVT R1, #0x73FF 0x3418F1EE: 4008 ANDS R0, R1 0x3418F1F0: 9A05 LDR R2, [SP, #20] 0x3418F1F2: 6851 LDR R1, [R2, #4] 0x3418F1F4: 6893 LDR R3, [R2, #8] 0x3418F1F6: 6912 LDR R2, [R2, #16] 0x3418F1F8: EA41 5103 ORR.W R1, R1, R3, LSL #20 0x3418F1FC: EA41 2102 ORR.W R1, R1, R2, LSL #8 0x3418F200: 4288 CMP R0, R1 0x3418F202: D002 BEQ 46L1 ; 0x3418F20A 0x3418F204: 2001 MOVS R0, #1 0x3418F206: 9001 STR R0, [SP, #4] 0x3418F208: E038 B 46L7 ; 0x3418F27C
.L1: 0x3418F20A: 9803 LDR R0, [SP, #12] 0x3418F20C: 6800 LDR R0, [R0] 0x3418F20E: F020 407F BIC R0, R0, #0xFF000000 0x3418F212: 9905 LDR R1, [SP, #20] 0x3418F214: 68C9 LDR R1, [R1, #12] 0x3418F216: 4288 CMP R0, R1 0x3418F218: D002 BEQ 46L2 ; 0x3418F220 0x3418F21A: 2001 MOVS R0, #1 0x3418F21C: 9001 STR R0, [SP, #4] 0x3418F21E: E02D B 46L7 ; 0x3418F27C
.L2: 0x3418F220: 9802 LDR R0, [SP, #8] 0x3418F222: 6800 LDR R0, [R0] 0x3418F224: F000 507C AND R0, R0, #0x3F000000 0x3418F228: 9A05 LDR R2, [SP, #20] 0x3418F22A: 6951 LDR R1, [R2, #20] 0x3418F22C: 6992 LDR R2, [R2, #24] 0x3418F22E: 06C9 LSLS R1, R1, #27 0x3418F230: EA41 6102 ORR.W R1, R1, R2, LSL #24 0x3418F234: 4288 CMP R0, R1 0x3418F236: D002 BEQ 46L3 ; 0x3418F23E 0x3418F238: 2001 MOVS R0, #1 0x3418F23A: 9001 STR R0, [SP, #4] 0x3418F23C: E01E B 46L7 ; 0x3418F27C
.L3: 0x3418F23E: F248 0004 MOVW R0, #0x8004 0x3418F242: F2C5 6002 MOVT R0, #0x5602 0x3418F246: 6800 LDR R0, [R0] 0x3418F248: 43C0 MVNS R0, R0 0x3418F24A: 9906 LDR R1, [SP, #24] 0x3418F24C: 40C8 LSRS R0, R1 0x3418F24E: 05C0 LSLS R0, R0, #23 0x3418F250: 2800 CMP R0, #0 0x3418F252: D402 BMI 46L4 ; 0x3418F25A 0x3418F254: 2002 MOVS R0, #2 0x3418F256: 9000 STR R0, [SP, #0] 0x3418F258: E009 B 46L6 ; 0x3418F26E
.L4: 0x3418F25A: 9804 LDR R0, [SP, #16] 0x3418F25C: 6800 LDR R0, [R0] 0x3418F25E: 0100 LSLS R0, R0, #4 0x3418F260: 2800 CMP R0, #0 0x3418F262: D502 BPL 46L5 ; 0x3418F26A 0x3418F264: 2003 MOVS R0, #3 0x3418F266: 9000 STR R0, [SP, #0] 0x3418F268: E001 B 46L6 ; 0x3418F26E
.L5: 0x3418F26A: 2001 MOVS R0, #1 0x3418F26C: 9000 STR R0, [SP, #0]
.L6: 0x3418F26E: 9800 LDR R0, [SP, #0] 0x3418F270: 9905 LDR R1, [SP, #20] 0x3418F272: 6809 LDR R1, [R1] 0x3418F274: 4288 CMP R0, R1 0x3418F276: D001 BEQ 46L7 ; 0x3418F27C 0x3418F278: 2001 MOVS R0, #1 0x3418F27A: 9001 STR R0, [SP, #4]
.L7: 0x3418F27C: 9801 LDR R0, [SP, #4] 0x3418F27E: B007 ADD SP, SP, #28 0x3418F280: 4770 BX LR

Section .init.PAHB_ERR_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


PAHB_ERR_IRQHandler: 0x3418F282: E7FE B PAHB_ERR_IRQHandler ; 0x3418F282

Section .text.RCC_PLL_Config from blto2_FSBL_lto.o, size=846, align=4


RCC_PLL_Config: 0x3418F284: B580 PUSH 123R7, LR} 0x3418F286: B088 SUB SP, SP, #32 0x3418F288: 9006 STR R0, [SP, #24] 0x3418F28A: 9105 STR R1, [SP, #20] 0x3418F28C: 2000 MOVS R0, #0 0x3418F28E: F88D 0007 STRB.W R0, [SP, #7] 0x3418F292: 9906 LDR R1, [SP, #24] 0x3418F294: F248 0080 MOVW R0, #0x8080 0x3418F298: F2C5 6002 MOVT R0, #0x5602 0x3418F29C: EB00 1001 ADD.W R0, R0, R1, LSL #4 0x3418F2A0: 9004 STR R0, [SP, #16] 0x3418F2A2: 9906 LDR R1, [SP, #24] 0x3418F2A4: F248 0084 MOVW R0, #0x8084 0x3418F2A8: F2C5 6002 MOVT R0, #0x5602 0x3418F2AC: EB00 1001 ADD.W R0, R0, R1, LSL #4 0x3418F2B0: 9003 STR R0, [SP, #12] 0x3418F2B2: 9906 LDR R1, [SP, #24] 0x3418F2B4: F248 0088 MOVW R0, #0x8088 0x3418F2B8: F2C5 6002 MOVT R0, #0x5602 0x3418F2BC: EB00 1001 ADD.W R0, R0, R1, LSL #4 0x3418F2C0: 9002 STR R0, [SP, #8] 0x3418F2C2: 9805 LDR R0, [SP, #20] 0x3418F2C4: 6800 LDR R0, [R0] 0x3418F2C6: 2802 CMP R0, #2 0x3418F2C8: F040 80F3 BNE.W 46L21 ; 0x3418F4B2 0x3418F2CC: 9805 LDR R0, [SP, #20] 0x3418F2CE: 6840 LDR R0, [R0, #4] 0x3418F2D0: B170 CBZ R0, .L1 ; 0x3418F2F0 0x3418F2D2: 9805 LDR R0, [SP, #20] 0x3418F2D4: 6840 LDR R0, [R0, #4] 0x3418F2D6: F1B0 5F80 CMP.W R0, #0x10000000 0x3418F2DA: D009 BEQ 46L1 ; 0x3418F2F0 0x3418F2DC: 9805 LDR R0, [SP, #20] 0x3418F2DE: 6840 LDR R0, [R0, #4] 0x3418F2E0: F1B0 5F00 CMP.W R0, #0x20000000 0x3418F2E4: D004 BEQ 46L1 ; 0x3418F2F0 0x3418F2E6: 9805 LDR R0, [SP, #20] 0x3418F2E8: 6840 LDR R0, [R0, #4] 0x3418F2EA: F1B0 5F40 CMP.W R0, #0x30000000 0x3418F2EE: D100 BNE 46L2 ; 0x3418F2F2
.L1: 0x3418F2F0: E007 B 46L3 ; 0x3418F302
.L2: 0x3418F2F2: F244 3032 MOVW R0, #0x4332 ; 0x34194332 = .rodata..L.str.50 0x3418F2F6: F2C3 4019 MOVT R0, #0x3419 ; 0x34194332 = .rodata..L.str.50 0x3418F2FA: F640 0159 MOVW R1, #0x0859 0x3418F2FE: F7FE FCCD BL assert_failed ; 0x3418DC9C
.L3: 0x3418F302: 9805 LDR R0, [SP, #20] 0x3418F304: 7BC0 LDRB R0, [R0, #15] 0x3418F306: B900 CBNZ R0, .L4 ; 0x3418F30A 0x3418F308: E007 B 46L5 ; 0x3418F31A
.L4: 0x3418F30A: F244 3032 MOVW R0, #0x4332 ; 0x34194332 = .rodata..L.str.50 0x3418F30E: F2C3 4019 MOVT R0, #0x3419 ; 0x34194332 = .rodata..L.str.50 0x3418F312: F640 015A MOVW R1, #0x085A 0x3418F316: F7FE FCC1 BL assert_failed ; 0x3418DC9C
.L5: 0x3418F31A: 9805 LDR R0, [SP, #20] 0x3418F31C: 6880 LDR R0, [R0, #8] 0x3418F31E: B120 CBZ R0, .L6 ; 0x3418F32A 0x3418F320: 9805 LDR R0, [SP, #20] 0x3418F322: 6880 LDR R0, [R0, #8] 0x3418F324: 283F CMP R0, #63 0x3418F326: D800 BHI 46L6 ; 0x3418F32A 0x3418F328: E007 B 46L7 ; 0x3418F33A
.L6: 0x3418F32A: F244 3032 MOVW R0, #0x4332 ; 0x34194332 = .rodata..L.str.50 0x3418F32E: F2C3 4019 MOVT R0, #0x3419 ; 0x34194332 = .rodata..L.str.50 0x3418F332: F640 015B MOVW R1, #0x085B 0x3418F336: F7FE FCB1 BL assert_failed ; 0x3418DC9C
.L7: 0x3418F33A: 9805 LDR R0, [SP, #20] 0x3418F33C: 6900 LDR R0, [R0, #16] 0x3418F33E: 280A CMP R0, #10 0x3418F340: D306 BCC 46L8 ; 0x3418F350 0x3418F342: 9805 LDR R0, [SP, #20] 0x3418F344: 6900 LDR R0, [R0, #16] 0x3418F346: F640 11C4 MOVW R1, #0x09C4 0x3418F34A: 4288 CMP R0, R1 0x3418F34C: D800 BHI 46L8 ; 0x3418F350 0x3418F34E: E007 B 46L9 ; 0x3418F360
.L8: 0x3418F350: F244 3032 MOVW R0, #0x4332 ; 0x34194332 = .rodata..L.str.50 0x3418F354: F2C3 4019 MOVT R0, #0x3419 ; 0x34194332 = .rodata..L.str.50 0x3418F358: F640 015C MOVW R1, #0x085C 0x3418F35C: F7FE FC9E BL assert_failed ; 0x3418DC9C
.L9: 0x3418F360: 9805 LDR R0, [SP, #20] 0x3418F362: 6940 LDR R0, [R0, #20] 0x3418F364: B120 CBZ R0, .L10 ; 0x3418F370 0x3418F366: 9805 LDR R0, [SP, #20] 0x3418F368: 6940 LDR R0, [R0, #20] 0x3418F36A: 2807 CMP R0, #7 0x3418F36C: D800 BHI 46L10 ; 0x3418F370 0x3418F36E: E007 B 46L11 ; 0x3418F380
.L10: 0x3418F370: F244 3032 MOVW R0, #0x4332 ; 0x34194332 = .rodata..L.str.50 0x3418F374: F2C3 4019 MOVT R0, #0x3419 ; 0x34194332 = .rodata..L.str.50 0x3418F378: F640 015D MOVW R1, #0x085D 0x3418F37C: F7FE FC8E BL assert_failed ; 0x3418DC9C
.L11: 0x3418F380: 9805 LDR R0, [SP, #20] 0x3418F382: 6980 LDR R0, [R0, #24] 0x3418F384: B120 CBZ R0, .L12 ; 0x3418F390 0x3418F386: 9805 LDR R0, [SP, #20] 0x3418F388: 6980 LDR R0, [R0, #24] 0x3418F38A: 2807 CMP R0, #7 0x3418F38C: D800 BHI 46L12 ; 0x3418F390 0x3418F38E: E007 B 46L13 ; 0x3418F3A0
.L12: 0x3418F390: F244 3032 MOVW R0, #0x4332 ; 0x34194332 = .rodata..L.str.50 0x3418F394: F2C3 4019 MOVT R0, #0x3419 ; 0x34194332 = .rodata..L.str.50 0x3418F398: F640 015E MOVW R1, #0x085E 0x3418F39C: F7FE FC7E BL assert_failed ; 0x3418DC9C
.L13: 0x3418F3A0: 9906 LDR R1, [SP, #24] 0x3418F3A2: F44F 7080 MOV.W R0, #0x0100 0x3418F3A6: 4088 LSLS R0, R1 0x3418F3A8: F249 0100 MOVW R1, #0x9000 0x3418F3AC: F2C5 6102 MOVT R1, #0x5602 0x3418F3B0: 6008 STR R0, [R1] 0x3418F3B2: F7F2 FA6B BL HAL_GetTick ; 0x3418188C 0x3418F3B6: 9000 STR R0, [SP, #0]
.L14: 0x3418F3B8: F248 0004 MOVW R0, #0x8004 0x3418F3BC: F2C5 6002 MOVT R0, #0x5602 0x3418F3C0: 6800 LDR R0, [R0] 0x3418F3C2: 43C0 MVNS R0, R0 0x3418F3C4: 9906 LDR R1, [SP, #24] 0x3418F3C6: 40C8 LSRS R0, R1 0x3418F3C8: 05C0 LSLS R0, R0, #23 0x3418F3CA: 2800 CMP R0, #0 0x3418F3CC: D40A BMI 46L16 ; 0x3418F3E4 0x3418F3CE: F7F2 FA5D BL HAL_GetTick ; 0x3418188C 0x3418F3D2: 9900 LDR R1, [SP, #0] 0x3418F3D4: 1A40 SUBS R0, R0, R1 0x3418F3D6: 2802 CMP R0, #2 0x3418F3D8: D303 BCC 46L15 ; 0x3418F3E2 0x3418F3DA: 2003 MOVS R0, #3 0x3418F3DC: F88D 001F STRB.W R0, [SP, #31] 0x3418F3E0: E0F3 B 46L35 ; 0x3418F5CA
.L15: 0x3418F3E2: E7E9 B 46L14 ; 0x3418F3B8
.L16: 0x3418F3E4: 9902 LDR R1, [SP, #8] 0x3418F3E6: 6808 LDR R0, [R1] 0x3418F3E8: F040 0004 ORR R0, R0, #4 0x3418F3EC: 6008 STR R0, [R1] 0x3418F3EE: 9904 LDR R1, [SP, #16] 0x3418F3F0: 6808 LDR R0, [R1] 0x3418F3F2: F020 6000 BIC R0, R0, #0x08000000 0x3418F3F6: 6008 STR R0, [R1] 0x3418F3F8: 9804 LDR R0, [SP, #16] 0x3418F3FA: 6800 LDR R0, [R0] 0x3418F3FC: 21FF MOVS R1, #255 0x3418F3FE: F6C8 4100 MOVT R1, #0x8C00 0x3418F402: 4008 ANDS R0, R1 0x3418F404: 9A05 LDR R2, [SP, #20] 0x3418F406: 6851 LDR R1, [R2, #4] 0x3418F408: 6893 LDR R3, [R2, #8] 0x3418F40A: 6912 LDR R2, [R2, #16] 0x3418F40C: EA41 5103 ORR.W R1, R1, R3, LSL #20 0x3418F410: EA41 2102 ORR.W R1, R1, R2, LSL #8 0x3418F414: 4308 ORRS R0, R1 0x3418F416: 9904 LDR R1, [SP, #16] 0x3418F418: 6008 STR R0, [R1] 0x3418F41A: 9802 LDR R0, [SP, #8] 0x3418F41C: 6800 LDR R0, [R0] 0x3418F41E: F020 507C BIC R0, R0, #0x3F000000 0x3418F422: 9A05 LDR R2, [SP, #20] 0x3418F424: 6951 LDR R1, [R2, #20] 0x3418F426: 6992 LDR R2, [R2, #24] 0x3418F428: 06C9 LSLS R1, R1, #27 0x3418F42A: EA41 6102 ORR.W R1, R1, R2, LSL #24 0x3418F42E: 4308 ORRS R0, R1 0x3418F430: 9902 LDR R1, [SP, #8] 0x3418F432: 6008 STR R0, [R1] 0x3418F434: 9803 LDR R0, [SP, #12] 0x3418F436: 6800 LDR R0, [R0] 0x3418F438: F000 407F AND R0, R0, #0xFF000000 0x3418F43C: 9905 LDR R1, [SP, #20] 0x3418F43E: 68C9 LDR R1, [R1, #12] 0x3418F440: 4308 ORRS R0, R1 0x3418F442: 9903 LDR R1, [SP, #12] 0x3418F444: 6008 STR R0, [R1] 0x3418F446: 9902 LDR R1, [SP, #8] 0x3418F448: 6808 LDR R0, [R1] 0x3418F44A: F020 0008 BIC R0, R0, #8 0x3418F44E: 6008 STR R0, [R1] 0x3418F450: 9805 LDR R0, [SP, #20] 0x3418F452: 68C0 LDR R0, [R0, #12] 0x3418F454: B120 CBZ R0, .L17 ; 0x3418F460 0x3418F456: 9902 LDR R1, [SP, #8] 0x3418F458: 6808 LDR R0, [R1] 0x3418F45A: F040 000A ORR R0, R0, #10 0x3418F45E: 6008 STR R0, [R1]
.L17: 0x3418F460: 9902 LDR R1, [SP, #8] 0x3418F462: 6808 LDR R0, [R1] 0x3418F464: 2201 MOVS R2, #1 0x3418F466: F2C4 0200 MOVT R2, #0x4000 0x3418F46A: 4310 ORRS R0, R2 0x3418F46C: 6008 STR R0, [R1] 0x3418F46E: 9906 LDR R1, [SP, #24] 0x3418F470: F44F 7080 MOV.W R0, #0x0100 0x3418F474: 4088 LSLS R0, R1 0x3418F476: F648 0100 MOVW R1, #0x8800 0x3418F47A: F2C5 6102 MOVT R1, #0x5602 0x3418F47E: 6008 STR R0, [R1] 0x3418F480: F7F2 FA04 BL HAL_GetTick ; 0x3418188C 0x3418F484: 9000 STR R0, [SP, #0]
.L18: 0x3418F486: F248 0004 MOVW R0, #0x8004 0x3418F48A: F2C5 6002 MOVT R0, #0x5602 0x3418F48E: 6800 LDR R0, [R0] 0x3418F490: 9906 LDR R1, [SP, #24] 0x3418F492: 40C8 LSRS R0, R1 0x3418F494: 05C0 LSLS R0, R0, #23 0x3418F496: 2800 CMP R0, #0 0x3418F498: D40A BMI 46L20 ; 0x3418F4B0 0x3418F49A: F7F2 F9F7 BL HAL_GetTick ; 0x3418188C 0x3418F49E: 9900 LDR R1, [SP, #0] 0x3418F4A0: 1A40 SUBS R0, R0, R1 0x3418F4A2: 2802 CMP R0, #2 0x3418F4A4: D303 BCC 46L19 ; 0x3418F4AE 0x3418F4A6: 2003 MOVS R0, #3 0x3418F4A8: F88D 001F STRB.W R0, [SP, #31] 0x3418F4AC: E08D B 46L35 ; 0x3418F5CA
.L19: 0x3418F4AE: E7EA B 46L18 ; 0x3418F486
.L20: 0x3418F4B0: E087 B 46L34 ; 0x3418F5C2
.L21: 0x3418F4B2: 9805 LDR R0, [SP, #20] 0x3418F4B4: 6800 LDR R0, [R0] 0x3418F4B6: 2803 CMP R0, #3 0x3418F4B8: D152 BNE 46L30 ; 0x3418F560 0x3418F4BA: 9805 LDR R0, [SP, #20] 0x3418F4BC: 6840 LDR R0, [R0, #4] 0x3418F4BE: B170 CBZ R0, .L22 ; 0x3418F4DE 0x3418F4C0: 9805 LDR R0, [SP, #20] 0x3418F4C2: 6840 LDR R0, [R0, #4] 0x3418F4C4: F1B0 5F80 CMP.W R0, #0x10000000 0x3418F4C8: D009 BEQ 46L22 ; 0x3418F4DE 0x3418F4CA: 9805 LDR R0, [SP, #20] 0x3418F4CC: 6840 LDR R0, [R0, #4] 0x3418F4CE: F1B0 5F00 CMP.W R0, #0x20000000 0x3418F4D2: D004 BEQ 46L22 ; 0x3418F4DE 0x3418F4D4: 9805 LDR R0, [SP, #20] 0x3418F4D6: 6840 LDR R0, [R0, #4] 0x3418F4D8: F1B0 5F40 CMP.W R0, #0x30000000 0x3418F4DC: D100 BNE 46L23 ; 0x3418F4E0
.L22: 0x3418F4DE: E007 B 46L24 ; 0x3418F4F0
.L23: 0x3418F4E0: F244 3032 MOVW R0, #0x4332 ; 0x34194332 = .rodata..L.str.50 0x3418F4E4: F2C3 4019 MOVT R0, #0x3419 ; 0x34194332 = .rodata..L.str.50 0x3418F4E8: F640 019E MOVW R1, #0x089E 0x3418F4EC: F7FE FBD6 BL assert_failed ; 0x3418DC9C
.L24: 0x3418F4F0: 9805 LDR R0, [SP, #20] 0x3418F4F2: 6840 LDR R0, [R0, #4] 0x3418F4F4: F7F2 FFAC BL RCC_PLL_Source_IsReady ; 0x34182450 0x3418F4F8: 2801 CMP R0, #1 0x3418F4FA: D12D BNE 46L28 ; 0x3418F558 0x3418F4FC: 9906 LDR R1, [SP, #24] 0x3418F4FE: F44F 7080 MOV.W R0, #0x0100 0x3418F502: 4088 LSLS R0, R1 0x3418F504: F249 0100 MOVW R1, #0x9000 0x3418F508: F2C5 6102 MOVT R1, #0x5602 0x3418F50C: 6008 STR R0, [R1] 0x3418F50E: F7F2 F9BD BL HAL_GetTick ; 0x3418188C 0x3418F512: 9000 STR R0, [SP, #0]
.L25: 0x3418F514: F248 0004 MOVW R0, #0x8004 0x3418F518: F2C5 6002 MOVT R0, #0x5602 0x3418F51C: 6800 LDR R0, [R0] 0x3418F51E: 43C0 MVNS R0, R0 0x3418F520: 9906 LDR R1, [SP, #24] 0x3418F522: 40C8 LSRS R0, R1 0x3418F524: 05C0 LSLS R0, R0, #23 0x3418F526: 2800 CMP R0, #0 0x3418F528: D40A BMI 46L27 ; 0x3418F540 0x3418F52A: F7F2 F9AF BL HAL_GetTick ; 0x3418188C 0x3418F52E: 9900 LDR R1, [SP, #0] 0x3418F530: 1A40 SUBS R0, R0, R1 0x3418F532: 2802 CMP R0, #2 0x3418F534: D303 BCC 46L26 ; 0x3418F53E 0x3418F536: 2003 MOVS R0, #3 0x3418F538: F88D 001F STRB.W R0, [SP, #31] 0x3418F53C: E045 B 46L35 ; 0x3418F5CA
.L26: 0x3418F53E: E7E9 B 46L25 ; 0x3418F514
.L27: 0x3418F540: 9804 LDR R0, [SP, #16] 0x3418F542: 6800 LDR R0, [R0] 0x3418F544: F020 41F0 BIC R1, R0, #0x78000000 0x3418F548: 9805 LDR R0, [SP, #20] 0x3418F54A: 6840 LDR R0, [R0, #4] 0x3418F54C: 4308 ORRS R0, R1 0x3418F54E: F040 6000 ORR R0, R0, #0x08000000 0x3418F552: 9904 LDR R1, [SP, #16] 0x3418F554: 6008 STR R0, [R1] 0x3418F556: E002 B 46L29 ; 0x3418F55E
.L28: 0x3418F558: 2001 MOVS R0, #1 0x3418F55A: F88D 0007 STRB.W R0, [SP, #7]
.L29: 0x3418F55E: E030 B 46L34 ; 0x3418F5C2
.L30: 0x3418F560: 9805 LDR R0, [SP, #20] 0x3418F562: 6800 LDR R0, [R0] 0x3418F564: 2801 CMP R0, #1 0x3418F566: D12C BNE 46L34 ; 0x3418F5C2 0x3418F568: 9902 LDR R1, [SP, #8] 0x3418F56A: 6808 LDR R0, [R1] 0x3418F56C: F020 4080 BIC R0, R0, #0x40000000 0x3418F570: 6008 STR R0, [R1] 0x3418F572: 9906 LDR R1, [SP, #24] 0x3418F574: F44F 7080 MOV.W R0, #0x0100 0x3418F578: 4088 LSLS R0, R1 0x3418F57A: F249 0100 MOVW R1, #0x9000 0x3418F57E: F2C5 6102 MOVT R1, #0x5602 0x3418F582: 6008 STR R0, [R1] 0x3418F584: F7F2 F982 BL HAL_GetTick ; 0x3418188C 0x3418F588: 9000 STR R0, [SP, #0]
.L31: 0x3418F58A: F248 0004 MOVW R0, #0x8004 0x3418F58E: F2C5 6002 MOVT R0, #0x5602 0x3418F592: 6800 LDR R0, [R0] 0x3418F594: 43C0 MVNS R0, R0 0x3418F596: 9906 LDR R1, [SP, #24] 0x3418F598: 40C8 LSRS R0, R1 0x3418F59A: 05C0 LSLS R0, R0, #23 0x3418F59C: 2800 CMP R0, #0 0x3418F59E: D40A BMI 46L33 ; 0x3418F5B6 0x3418F5A0: F7F2 F974 BL HAL_GetTick ; 0x3418188C 0x3418F5A4: 9900 LDR R1, [SP, #0] 0x3418F5A6: 1A40 SUBS R0, R0, R1 0x3418F5A8: 2802 CMP R0, #2 0x3418F5AA: D303 BCC 46L32 ; 0x3418F5B4 0x3418F5AC: 2003 MOVS R0, #3 0x3418F5AE: F88D 001F STRB.W R0, [SP, #31] 0x3418F5B2: E00A B 46L35 ; 0x3418F5CA
.L32: 0x3418F5B4: E7E9 B 46L31 ; 0x3418F58A
.L33: 0x3418F5B6: 9904 LDR R1, [SP, #16] 0x3418F5B8: 6808 LDR R0, [R1] 0x3418F5BA: F020 6000 BIC R0, R0, #0x08000000 0x3418F5BE: 6008 STR R0, [R1] 0x3418F5C0: E7FF B 46L34 ; 0x3418F5C2
.L34: 0x3418F5C2: F89D 0007 LDRB.W R0, [SP, #7] 0x3418F5C6: F88D 001F STRB.W R0, [SP, #31]
.L35: 0x3418F5CA: F89D 001F LDRB.W R0, [SP, #31] 0x3418F5CE: B008 ADD SP, SP, #32 0x3418F5D0: BD80 POP 123R7, PC}

Section .init.NPU0_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


NPU0_IRQHandler: 0x3418F5D2: E7FE B NPU0_IRQHandler ; 0x3418F5D2

Section .text.RCC_PLL_Enable from blto2_FSBL_lto.o, size=94, align=4


RCC_PLL_Enable: 0x3418F5D4: B580 PUSH 123R7, LR} 0x3418F5D6: B084 SUB SP, SP, #16 0x3418F5D8: 9002 STR R0, [SP, #8] 0x3418F5DA: 2000 MOVS R0, #0 0x3418F5DC: F88D 0007 STRB.W R0, [SP, #7] 0x3418F5E0: 9902 LDR R1, [SP, #8] 0x3418F5E2: F44F 7080 MOV.W R0, #0x0100 0x3418F5E6: 4088 LSLS R0, R1 0x3418F5E8: F648 0100 MOVW R1, #0x8800 0x3418F5EC: F2C5 6102 MOVT R1, #0x5602 0x3418F5F0: 6008 STR R0, [R1] 0x3418F5F2: F7F2 F94B BL HAL_GetTick ; 0x3418188C 0x3418F5F6: 9000 STR R0, [SP, #0]
.L1: 0x3418F5F8: F248 0004 MOVW R0, #0x8004 0x3418F5FC: F2C5 6002 MOVT R0, #0x5602 0x3418F600: 6800 LDR R0, [R0] 0x3418F602: 9902 LDR R1, [SP, #8] 0x3418F604: 40C8 LSRS R0, R1 0x3418F606: 05C0 LSLS R0, R0, #23 0x3418F608: 2800 CMP R0, #0 0x3418F60A: D40A BMI 46L3 ; 0x3418F622 0x3418F60C: F7F2 F93E BL HAL_GetTick ; 0x3418188C 0x3418F610: 9900 LDR R1, [SP, #0] 0x3418F612: 1A40 SUBS R0, R0, R1 0x3418F614: 2802 CMP R0, #2 0x3418F616: D303 BCC 46L2 ; 0x3418F620 0x3418F618: 2003 MOVS R0, #3 0x3418F61A: F88D 000F STRB.W R0, [SP, #15] 0x3418F61E: E004 B 46L4 ; 0x3418F62A
.L2: 0x3418F620: E7EA B 46L1 ; 0x3418F5F8
.L3: 0x3418F622: F89D 0007 LDRB.W R0, [SP, #7] 0x3418F626: F88D 000F STRB.W R0, [SP, #15]
.L4: 0x3418F62A: F89D 000F LDRB.W R0, [SP, #15] 0x3418F62E: B004 ADD SP, SP, #16 0x3418F630: BD80 POP 123R7, PC}

Section .init.NPU1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


NPU1_IRQHandler: 0x3418F632: E7FE B NPU1_IRQHandler ; 0x3418F632

Section .text.HAL_RCC_ClockConfig from blto2_FSBL_lto.o, size=2498, align=4


HAL_RCC_ClockConfig: 0x3418F634: B580 PUSH 123R7, LR} 0x3418F636: B084 SUB SP, SP, #16 0x3418F638: 9002 STR R0, [SP, #8] 0x3418F63A: 9802 LDR R0, [SP, #8] 0x3418F63C: B920 CBNZ R0, .L1 ; 0x3418F648 0x3418F63E: 2001 MOVS R0, #1 0x3418F640: F88D 000F STRB.W R0, [SP, #15] 0x3418F644: F000 BCD3 B.W 46L93 ; 0x3418FFEE
.L1: 0x3418F648: 9802 LDR R0, [SP, #8] 0x3418F64A: 6800 LDR R0, [R0] 0x3418F64C: 287F CMP R0, #127 0x3418F64E: D800 BHI 46L2 ; 0x3418F652 0x3418F650: E007 B 46L3 ; 0x3418F662
.L2: 0x3418F652: F244 3032 MOVW R0, #0x4332 ; 0x34194332 = .rodata..L.str.50 0x3418F656: F2C3 4019 MOVT R0, #0x3419 ; 0x34194332 = .rodata..L.str.50 0x3418F65A: F240 3196 MOVW R1, #0x0396 0x3418F65E: F7FE FB1D BL assert_failed ; 0x3418DC9C
.L3: 0x3418F662: 9802 LDR R0, [SP, #8] 0x3418F664: 7800 LDRB R0, [R0] 0x3418F666: 0700 LSLS R0, R0, #28 0x3418F668: 2800 CMP R0, #0 0x3418F66A: D53D BPL 46L7 ; 0x3418F6E8 0x3418F66C: 9802 LDR R0, [SP, #8] 0x3418F66E: 6900 LDR R0, [R0, #16] 0x3418F670: B1D8 CBZ R0, .L4 ; 0x3418F6AA 0x3418F672: 9802 LDR R0, [SP, #8] 0x3418F674: 6900 LDR R0, [R0, #16] 0x3418F676: 2801 CMP R0, #1 0x3418F678: D017 BEQ 46L4 ; 0x3418F6AA 0x3418F67A: 9802 LDR R0, [SP, #8] 0x3418F67C: 6900 LDR R0, [R0, #16] 0x3418F67E: 2802 CMP R0, #2 0x3418F680: D013 BEQ 46L4 ; 0x3418F6AA 0x3418F682: 9802 LDR R0, [SP, #8] 0x3418F684: 6900 LDR R0, [R0, #16] 0x3418F686: 2803 CMP R0, #3 0x3418F688: D00F BEQ 46L4 ; 0x3418F6AA 0x3418F68A: 9802 LDR R0, [SP, #8] 0x3418F68C: 6900 LDR R0, [R0, #16] 0x3418F68E: 2804 CMP R0, #4 0x3418F690: D00B BEQ 46L4 ; 0x3418F6AA 0x3418F692: 9802 LDR R0, [SP, #8] 0x3418F694: 6900 LDR R0, [R0, #16] 0x3418F696: 2805 CMP R0, #5 0x3418F698: D007 BEQ 46L4 ; 0x3418F6AA 0x3418F69A: 9802 LDR R0, [SP, #8] 0x3418F69C: 6900 LDR R0, [R0, #16] 0x3418F69E: 2806 CMP R0, #6 0x3418F6A0: D003 BEQ 46L4 ; 0x3418F6AA 0x3418F6A2: 9802 LDR R0, [SP, #8] 0x3418F6A4: 6900 LDR R0, [R0, #16] 0x3418F6A6: 2807 CMP R0, #7 0x3418F6A8: D100 BNE 46L5 ; 0x3418F6AC
.L4: 0x3418F6AA: E007 B 46L6 ; 0x3418F6BC
.L5: 0x3418F6AC: F244 3032 MOVW R0, #0x4332 ; 0x34194332 = .rodata..L.str.50 0x3418F6B0: F2C3 4019 MOVT R0, #0x3419 ; 0x34194332 = .rodata..L.str.50 0x3418F6B4: F240 319D MOVW R1, #0x039D 0x3418F6B8: F7FE FAF0 BL assert_failed ; 0x3418DC9C
.L6: 0x3418F6BC: 9802 LDR R0, [SP, #8] 0x3418F6BE: 6900 LDR R0, [R0, #16] 0x3418F6C0: F248 0124 MOVW R1, #0x8024 0x3418F6C4: F2C5 6102 MOVT R1, #0x5602 0x3418F6C8: 6809 LDR R1, [R1] 0x3418F6CA: F001 0107 AND R1, R1, #7 0x3418F6CE: 4288 CMP R0, R1 0x3418F6D0: D90A BLS 46L7 ; 0x3418F6E8 0x3418F6D2: F248 0124 MOVW R1, #0x8024 0x3418F6D6: F2C5 6102 MOVT R1, #0x5602 0x3418F6DA: 6808 LDR R0, [R1] 0x3418F6DC: F020 0007 BIC R0, R0, #7 0x3418F6E0: 9A02 LDR R2, [SP, #8] 0x3418F6E2: 6912 LDR R2, [R2, #16] 0x3418F6E4: 4310 ORRS R0, R2 0x3418F6E6: 6008 STR R0, [R1]
.L7: 0x3418F6E8: 9802 LDR R0, [SP, #8] 0x3418F6EA: 7800 LDRB R0, [R0] 0x3418F6EC: 06C0 LSLS R0, R0, #27 0x3418F6EE: 2800 CMP R0, #0 0x3418F6F0: D53D BPL 46L11 ; 0x3418F76E 0x3418F6F2: 9802 LDR R0, [SP, #8] 0x3418F6F4: 6940 LDR R0, [R0, #20] 0x3418F6F6: B1D8 CBZ R0, .L8 ; 0x3418F730 0x3418F6F8: 9802 LDR R0, [SP, #8] 0x3418F6FA: 6940 LDR R0, [R0, #20] 0x3418F6FC: 2810 CMP R0, #16 0x3418F6FE: D017 BEQ 46L8 ; 0x3418F730 0x3418F700: 9802 LDR R0, [SP, #8] 0x3418F702: 6940 LDR R0, [R0, #20] 0x3418F704: 2820 CMP R0, #32 0x3418F706: D013 BEQ 46L8 ; 0x3418F730 0x3418F708: 9802 LDR R0, [SP, #8] 0x3418F70A: 6940 LDR R0, [R0, #20] 0x3418F70C: 2830 CMP R0, #48 0x3418F70E: D00F BEQ 46L8 ; 0x3418F730 0x3418F710: 9802 LDR R0, [SP, #8] 0x3418F712: 6940 LDR R0, [R0, #20] 0x3418F714: 2840 CMP R0, #64 0x3418F716: D00B BEQ 46L8 ; 0x3418F730 0x3418F718: 9802 LDR R0, [SP, #8] 0x3418F71A: 6940 LDR R0, [R0, #20] 0x3418F71C: 2850 CMP R0, #80 0x3418F71E: D007 BEQ 46L8 ; 0x3418F730 0x3418F720: 9802 LDR R0, [SP, #8] 0x3418F722: 6940 LDR R0, [R0, #20] 0x3418F724: 2860 CMP R0, #96 0x3418F726: D003 BEQ 46L8 ; 0x3418F730 0x3418F728: 9802 LDR R0, [SP, #8] 0x3418F72A: 6940 LDR R0, [R0, #20] 0x3418F72C: 2870 CMP R0, #112 0x3418F72E: D100 BNE 46L9 ; 0x3418F732
.L8: 0x3418F730: E007 B 46L10 ; 0x3418F742
.L9: 0x3418F732: F244 3032 MOVW R0, #0x4332 ; 0x34194332 = .rodata..L.str.50 0x3418F736: F2C3 4019 MOVT R0, #0x3419 ; 0x34194332 = .rodata..L.str.50 0x3418F73A: F240 31A7 MOVW R1, #0x03A7 0x3418F73E: F7FE FAAD BL assert_failed ; 0x3418DC9C
.L10: 0x3418F742: 9802 LDR R0, [SP, #8] 0x3418F744: 6940 LDR R0, [R0, #20] 0x3418F746: F248 0124 MOVW R1, #0x8024 0x3418F74A: F2C5 6102 MOVT R1, #0x5602 0x3418F74E: 6809 LDR R1, [R1] 0x3418F750: F001 0170 AND R1, R1, #112 0x3418F754: 4288 CMP R0, R1 0x3418F756: D90A BLS 46L11 ; 0x3418F76E 0x3418F758: F248 0124 MOVW R1, #0x8024 0x3418F75C: F2C5 6102 MOVT R1, #0x5602 0x3418F760: 6808 LDR R0, [R1] 0x3418F762: F020 0070 BIC R0, R0, #112 0x3418F766: 9A02 LDR R2, [SP, #8] 0x3418F768: 6952 LDR R2, [R2, #20] 0x3418F76A: 4310 ORRS R0, R2 0x3418F76C: 6008 STR R0, [R1]
.L11: 0x3418F76E: 9802 LDR R0, [SP, #8] 0x3418F770: 7800 LDRB R0, [R0] 0x3418F772: 0680 LSLS R0, R0, #26 0x3418F774: 2800 CMP R0, #0 0x3418F776: D544 BPL 46L15 ; 0x3418F802 0x3418F778: 9802 LDR R0, [SP, #8] 0x3418F77A: 6980 LDR R0, [R0, #24] 0x3418F77C: B310 CBZ R0, .L12 ; 0x3418F7C4 0x3418F77E: 9802 LDR R0, [SP, #8] 0x3418F780: 6980 LDR R0, [R0, #24] 0x3418F782: F5B0 5F80 CMP.W R0, #0x1000 0x3418F786: D01D BEQ 46L12 ; 0x3418F7C4 0x3418F788: 9802 LDR R0, [SP, #8] 0x3418F78A: 6980 LDR R0, [R0, #24] 0x3418F78C: F5B0 5F00 CMP.W R0, #0x2000 0x3418F790: D018 BEQ 46L12 ; 0x3418F7C4 0x3418F792: 9802 LDR R0, [SP, #8] 0x3418F794: 6980 LDR R0, [R0, #24] 0x3418F796: F5B0 5F40 CMP.W R0, #0x3000 0x3418F79A: D013 BEQ 46L12 ; 0x3418F7C4 0x3418F79C: 9802 LDR R0, [SP, #8] 0x3418F79E: 6980 LDR R0, [R0, #24] 0x3418F7A0: F5B0 4F80 CMP.W R0, #0x4000 0x3418F7A4: D00E BEQ 46L12 ; 0x3418F7C4 0x3418F7A6: 9802 LDR R0, [SP, #8] 0x3418F7A8: 6980 LDR R0, [R0, #24] 0x3418F7AA: F5B0 4FA0 CMP.W R0, #0x5000 0x3418F7AE: D009 BEQ 46L12 ; 0x3418F7C4 0x3418F7B0: 9802 LDR R0, [SP, #8] 0x3418F7B2: 6980 LDR R0, [R0, #24] 0x3418F7B4: F5B0 4FC0 CMP.W R0, #0x6000 0x3418F7B8: D004 BEQ 46L12 ; 0x3418F7C4 0x3418F7BA: 9802 LDR R0, [SP, #8] 0x3418F7BC: 6980 LDR R0, [R0, #24] 0x3418F7BE: F5B0 4FE0 CMP.W R0, #0x7000 0x3418F7C2: D100 BNE 46L13 ; 0x3418F7C6
.L12: 0x3418F7C4: E007 B 46L14 ; 0x3418F7D6
.L13: 0x3418F7C6: F244 3032 MOVW R0, #0x4332 ; 0x34194332 = .rodata..L.str.50 0x3418F7CA: F2C3 4019 MOVT R0, #0x3419 ; 0x34194332 = .rodata..L.str.50 0x3418F7CE: F240 31B1 MOVW R1, #0x03B1 0x3418F7D2: F7FE FA63 BL assert_failed ; 0x3418DC9C
.L14: 0x3418F7D6: 9802 LDR R0, [SP, #8] 0x3418F7D8: 6980 LDR R0, [R0, #24] 0x3418F7DA: F248 0124 MOVW R1, #0x8024 0x3418F7DE: F2C5 6102 MOVT R1, #0x5602 0x3418F7E2: 6809 LDR R1, [R1] 0x3418F7E4: F401 41E0 AND R1, R1, #0x7000 0x3418F7E8: 4288 CMP R0, R1 0x3418F7EA: D90A BLS 46L15 ; 0x3418F802 0x3418F7EC: F248 0124 MOVW R1, #0x8024 0x3418F7F0: F2C5 6102 MOVT R1, #0x5602 0x3418F7F4: 6808 LDR R0, [R1] 0x3418F7F6: F420 40E0 BIC R0, R0, #0x7000 0x3418F7FA: 9A02 LDR R2, [SP, #8] 0x3418F7FC: 6992 LDR R2, [R2, #24] 0x3418F7FE: 4310 ORRS R0, R2 0x3418F800: 6008 STR R0, [R1]
.L15: 0x3418F802: 9802 LDR R0, [SP, #8] 0x3418F804: 7800 LDRB R0, [R0] 0x3418F806: 0640 LSLS R0, R0, #25 0x3418F808: 2800 CMP R0, #0 0x3418F80A: D544 BPL 46L19 ; 0x3418F896 0x3418F80C: 9802 LDR R0, [SP, #8] 0x3418F80E: 69C0 LDR R0, [R0, #28] 0x3418F810: B310 CBZ R0, .L16 ; 0x3418F858 0x3418F812: 9802 LDR R0, [SP, #8] 0x3418F814: 69C0 LDR R0, [R0, #28] 0x3418F816: F5B0 3F80 CMP.W R0, #0x010000 0x3418F81A: D01D BEQ 46L16 ; 0x3418F858 0x3418F81C: 9802 LDR R0, [SP, #8] 0x3418F81E: 69C0 LDR R0, [R0, #28] 0x3418F820: F5B0 3F00 CMP.W R0, #0x020000 0x3418F824: D018 BEQ 46L16 ; 0x3418F858 0x3418F826: 9802 LDR R0, [SP, #8] 0x3418F828: 69C0 LDR R0, [R0, #28] 0x3418F82A: F5B0 3F40 CMP.W R0, #0x030000 0x3418F82E: D013 BEQ 46L16 ; 0x3418F858 0x3418F830: 9802 LDR R0, [SP, #8] 0x3418F832: 69C0 LDR R0, [R0, #28] 0x3418F834: F5B0 2F80 CMP.W R0, #0x040000 0x3418F838: D00E BEQ 46L16 ; 0x3418F858 0x3418F83A: 9802 LDR R0, [SP, #8] 0x3418F83C: 69C0 LDR R0, [R0, #28] 0x3418F83E: F5B0 2FA0 CMP.W R0, #0x050000 0x3418F842: D009 BEQ 46L16 ; 0x3418F858 0x3418F844: 9802 LDR R0, [SP, #8] 0x3418F846: 69C0 LDR R0, [R0, #28] 0x3418F848: F5B0 2FC0 CMP.W R0, #0x060000 0x3418F84C: D004 BEQ 46L16 ; 0x3418F858 0x3418F84E: 9802 LDR R0, [SP, #8] 0x3418F850: 69C0 LDR R0, [R0, #28] 0x3418F852: F5B0 2FE0 CMP.W R0, #0x070000 0x3418F856: D100 BNE 46L17 ; 0x3418F85A
.L16: 0x3418F858: E007 B 46L18 ; 0x3418F86A
.L17: 0x3418F85A: F244 3032 MOVW R0, #0x4332 ; 0x34194332 = .rodata..L.str.50 0x3418F85E: F2C3 4019 MOVT R0, #0x3419 ; 0x34194332 = .rodata..L.str.50 0x3418F862: F240 31BB MOVW R1, #0x03BB 0x3418F866: F7FE FA19 BL assert_failed ; 0x3418DC9C
.L18: 0x3418F86A: 9802 LDR R0, [SP, #8] 0x3418F86C: 69C0 LDR R0, [R0, #28] 0x3418F86E: F248 0124 MOVW R1, #0x8024 0x3418F872: F2C5 6102 MOVT R1, #0x5602 0x3418F876: 6809 LDR R1, [R1] 0x3418F878: F401 21E0 AND R1, R1, #0x070000 0x3418F87C: 4288 CMP R0, R1 0x3418F87E: D90A BLS 46L19 ; 0x3418F896 0x3418F880: F248 0124 MOVW R1, #0x8024 0x3418F884: F2C5 6102 MOVT R1, #0x5602 0x3418F888: 6808 LDR R0, [R1] 0x3418F88A: F420 20E0 BIC R0, R0, #0x070000 0x3418F88E: 9A02 LDR R2, [SP, #8] 0x3418F890: 69D2 LDR R2, [R2, #28] 0x3418F892: 4310 ORRS R0, R2 0x3418F894: 6008 STR R0, [R1]
.L19: 0x3418F896: 9802 LDR R0, [SP, #8] 0x3418F898: 7800 LDRB R0, [R0] 0x3418F89A: 0740 LSLS R0, R0, #29 0x3418F89C: 2800 CMP R0, #0 0x3418F89E: D544 BPL 46L23 ; 0x3418F92A 0x3418F8A0: 9802 LDR R0, [SP, #8] 0x3418F8A2: 68C0 LDR R0, [R0, #12] 0x3418F8A4: B310 CBZ R0, .L20 ; 0x3418F8EC 0x3418F8A6: 9802 LDR R0, [SP, #8] 0x3418F8A8: 68C0 LDR R0, [R0, #12] 0x3418F8AA: F5B0 1F80 CMP.W R0, #0x100000 0x3418F8AE: D01D BEQ 46L20 ; 0x3418F8EC 0x3418F8B0: 9802 LDR R0, [SP, #8] 0x3418F8B2: 68C0 LDR R0, [R0, #12] 0x3418F8B4: F5B0 1F00 CMP.W R0, #0x200000 0x3418F8B8: D018 BEQ 46L20 ; 0x3418F8EC 0x3418F8BA: 9802 LDR R0, [SP, #8] 0x3418F8BC: 68C0 LDR R0, [R0, #12] 0x3418F8BE: F5B0 1F40 CMP.W R0, #0x300000 0x3418F8C2: D013 BEQ 46L20 ; 0x3418F8EC 0x3418F8C4: 9802 LDR R0, [SP, #8] 0x3418F8C6: 68C0 LDR R0, [R0, #12] 0x3418F8C8: F5B0 0F80 CMP.W R0, #0x400000 0x3418F8CC: D00E BEQ 46L20 ; 0x3418F8EC 0x3418F8CE: 9802 LDR R0, [SP, #8] 0x3418F8D0: 68C0 LDR R0, [R0, #12] 0x3418F8D2: F5B0 0FA0 CMP.W R0, #0x500000 0x3418F8D6: D009 BEQ 46L20 ; 0x3418F8EC 0x3418F8D8: 9802 LDR R0, [SP, #8] 0x3418F8DA: 68C0 LDR R0, [R0, #12] 0x3418F8DC: F5B0 0FC0 CMP.W R0, #0x600000 0x3418F8E0: D004 BEQ 46L20 ; 0x3418F8EC 0x3418F8E2: 9802 LDR R0, [SP, #8] 0x3418F8E4: 68C0 LDR R0, [R0, #12] 0x3418F8E6: F5B0 0FE0 CMP.W R0, #0x700000 0x3418F8EA: D100 BNE 46L21 ; 0x3418F8EE
.L20: 0x3418F8EC: E007 B 46L22 ; 0x3418F8FE
.L21: 0x3418F8EE: F244 3032 MOVW R0, #0x4332 ; 0x34194332 = .rodata..L.str.50 0x3418F8F2: F2C3 4019 MOVT R0, #0x3419 ; 0x34194332 = .rodata..L.str.50 0x3418F8F6: F240 31C5 MOVW R1, #0x03C5 0x3418F8FA: F7FE F9CF BL assert_failed ; 0x3418DC9C
.L22: 0x3418F8FE: 9802 LDR R0, [SP, #8] 0x3418F900: 68C0 LDR R0, [R0, #12] 0x3418F902: F248 0124 MOVW R1, #0x8024 0x3418F906: F2C5 6102 MOVT R1, #0x5602 0x3418F90A: 6809 LDR R1, [R1] 0x3418F90C: F401 01E0 AND R1, R1, #0x700000 0x3418F910: 4288 CMP R0, R1 0x3418F912: D90A BLS 46L23 ; 0x3418F92A 0x3418F914: F248 0124 MOVW R1, #0x8024 0x3418F918: F2C5 6102 MOVT R1, #0x5602 0x3418F91C: 6808 LDR R0, [R1] 0x3418F91E: F420 00E0 BIC R0, R0, #0x700000 0x3418F922: 9A02 LDR R2, [SP, #8] 0x3418F924: 68D2 LDR R2, [R2, #12] 0x3418F926: 4310 ORRS R0, R2 0x3418F928: 6008 STR R0, [R1]
.L23: 0x3418F92A: 9802 LDR R0, [SP, #8] 0x3418F92C: 7800 LDRB R0, [R0] 0x3418F92E: 07C0 LSLS R0, R0, #31 0x3418F930: 2800 CMP R0, #0 0x3418F932: F000 80B3 BEQ.W 46L42 ; 0x3418FA9C 0x3418F936: 9802 LDR R0, [SP, #8] 0x3418F938: 6840 LDR R0, [R0, #4] 0x3418F93A: B170 CBZ R0, .L24 ; 0x3418F95A 0x3418F93C: 9802 LDR R0, [SP, #8] 0x3418F93E: 6840 LDR R0, [R0, #4] 0x3418F940: F5B0 3F80 CMP.W R0, #0x010000 0x3418F944: D009 BEQ 46L24 ; 0x3418F95A 0x3418F946: 9802 LDR R0, [SP, #8] 0x3418F948: 6840 LDR R0, [R0, #4] 0x3418F94A: F5B0 3F00 CMP.W R0, #0x020000 0x3418F94E: D004 BEQ 46L24 ; 0x3418F95A 0x3418F950: 9802 LDR R0, [SP, #8] 0x3418F952: 6840 LDR R0, [R0, #4] 0x3418F954: F5B0 3F40 CMP.W R0, #0x030000 0x3418F958: D100 BNE 46L25 ; 0x3418F95C
.L24: 0x3418F95A: E007 B 46L26 ; 0x3418F96C
.L25: 0x3418F95C: F244 3032 MOVW R0, #0x4332 ; 0x34194332 = .rodata..L.str.50 0x3418F960: F2C3 4019 MOVT R0, #0x3419 ; 0x34194332 = .rodata..L.str.50 0x3418F964: F44F 7174 MOV.W R1, #0x03D0 0x3418F968: F7FE F998 BL assert_failed ; 0x3418DC9C
.L26: 0x3418F96C: 9802 LDR R0, [SP, #8] 0x3418F96E: 6840 LDR R0, [R0, #4] 0x3418F970: F5B0 3F00 CMP.W R0, #0x020000 0x3418F974: D107 BNE 46L28 ; 0x3418F986 0x3418F976: F7F2 FD95 BL LL_RCC_HSE_IsReady ; 0x341824A4 0x3418F97A: B918 CBNZ R0, .L27 ; 0x3418F984 0x3418F97C: 2001 MOVS R0, #1 0x3418F97E: F88D 000F STRB.W R0, [SP, #15] 0x3418F982: E334 B 46L93 ; 0x3418FFEE
.L27: 0x3418F984: E061 B 46L38 ; 0x3418FA4A
.L28: 0x3418F986: 9802 LDR R0, [SP, #8] 0x3418F988: 6840 LDR R0, [R0, #4] 0x3418F98A: F5B0 3F40 CMP.W R0, #0x030000 0x3418F98E: D148 BNE 46L35 ; 0x3418FA22 0x3418F990: 9802 LDR R0, [SP, #8] 0x3418F992: 6A00 LDR R0, [R0, #32] 0x3418F994: B170 CBZ R0, .L29 ; 0x3418F9B4 0x3418F996: 9802 LDR R0, [SP, #8] 0x3418F998: 6A00 LDR R0, [R0, #32] 0x3418F99A: F1B0 5F80 CMP.W R0, #0x10000000 0x3418F99E: D009 BEQ 46L29 ; 0x3418F9B4 0x3418F9A0: 9802 LDR R0, [SP, #8] 0x3418F9A2: 6A00 LDR R0, [R0, #32] 0x3418F9A4: F1B0 5F00 CMP.W R0, #0x20000000 0x3418F9A8: D004 BEQ 46L29 ; 0x3418F9B4 0x3418F9AA: 9802 LDR R0, [SP, #8] 0x3418F9AC: 6A00 LDR R0, [R0, #32] 0x3418F9AE: F1B0 5F40 CMP.W R0, #0x30000000 0x3418F9B2: D100 BNE 46L30 ; 0x3418F9B6
.L29: 0x3418F9B4: E007 B 46L31 ; 0x3418F9C6
.L30: 0x3418F9B6: F244 3032 MOVW R0, #0x4332 ; 0x34194332 = .rodata..L.str.50 0x3418F9BA: F2C3 4019 MOVT R0, #0x3419 ; 0x34194332 = .rodata..L.str.50 0x3418F9BE: F240 31DF MOVW R1, #0x03DF 0x3418F9C2: F7FE F96B BL assert_failed ; 0x3418DC9C
.L31: 0x3418F9C6: 9802 LDR R0, [SP, #8] 0x3418F9C8: 6A40 LDR R0, [R0, #36] 0x3418F9CA: B128 CBZ R0, .L32 ; 0x3418F9D8 0x3418F9CC: 9802 LDR R0, [SP, #8] 0x3418F9CE: 6A40 LDR R0, [R0, #36] 0x3418F9D0: F5B0 7F80 CMP.W R0, #0x0100 0x3418F9D4: D800 BHI 46L32 ; 0x3418F9D8 0x3418F9D6: E007 B 46L33 ; 0x3418F9E8
.L32: 0x3418F9D8: F244 3032 MOVW R0, #0x4332 ; 0x34194332 = .rodata..L.str.50 0x3418F9DC: F2C3 4019 MOVT R0, #0x3419 ; 0x34194332 = .rodata..L.str.50 0x3418F9E0: F44F 7178 MOV.W R1, #0x03E0 0x3418F9E4: F7FE F95A BL assert_failed ; 0x3418DC9C
.L33: 0x3418F9E8: F7F2 FCFA BL LL_RCC_IC1_GetSource ; 0x341823E0 0x3418F9EC: 9902 LDR R1, [SP, #8] 0x3418F9EE: 6A09 LDR R1, [R1, #32] 0x3418F9F0: F000 FB02 BL RCC_IC_CheckPLLSources ; 0x3418FFF8 0x3418F9F4: 2801 CMP R0, #1 0x3418F9F6: D003 BEQ 46L34 ; 0x3418FA00 0x3418F9F8: 2001 MOVS R0, #1 0x3418F9FA: F88D 000F STRB.W R0, [SP, #15] 0x3418F9FE: E2F6 B 46L93 ; 0x3418FFEE
.L34: 0x3418FA00: 9902 LDR R1, [SP, #8] 0x3418FA02: 6A08 LDR R0, [R1, #32] 0x3418FA04: 6A4A LDR R2, [R1, #36] 0x3418FA06: 2100 MOVS R1, #0 0x3418FA08: F6CF 71FF MOVT R1, #0xFFFF 0x3418FA0C: EB01 4102 ADD.W R1, R1, R2, LSL #16 0x3418FA10: 4308 ORRS R0, R1 0x3418FA12: F248 01C4 MOVW R1, #0x80C4 0x3418FA16: F2C5 6102 MOVT R1, #0x5602 0x3418FA1A: 6008 STR R0, [R1] 0x3418FA1C: F000 FB62 BL LL_RCC_IC1_Enable ; 0x341900E4 0x3418FA20: E013 B 46L38 ; 0x3418FA4A
.L35: 0x3418FA22: 9802 LDR R0, [SP, #8] 0x3418FA24: 6840 LDR R0, [R0, #4] 0x3418FA26: F5B0 3F80 CMP.W R0, #0x010000 0x3418FA2A: D107 BNE 46L37 ; 0x3418FA3C 0x3418FA2C: F7F2 FCB8 BL LL_RCC_MSI_IsReady ; 0x341823A0 0x3418FA30: B918 CBNZ R0, .L36 ; 0x3418FA3A 0x3418FA32: 2001 MOVS R0, #1 0x3418FA34: F88D 000F STRB.W R0, [SP, #15] 0x3418FA38: E2D9 B 46L93 ; 0x3418FFEE
.L36: 0x3418FA3A: E006 B 46L38 ; 0x3418FA4A
.L37: 0x3418FA3C: F7F2 FC6A BL LL_RCC_HSI_IsReady ; 0x34182314 0x3418FA40: B918 CBNZ R0, .L38 ; 0x3418FA4A 0x3418FA42: 2001 MOVS R0, #1 0x3418FA44: F88D 000F STRB.W R0, [SP, #15] 0x3418FA48: E2D1 B 46L93 ; 0x3418FFEE
.L38: 0x3418FA4A: F248 0120 MOVW R1, #0x8020 0x3418FA4E: F2C5 6102 MOVT R1, #0x5602 0x3418FA52: 6808 LDR R0, [R1] 0x3418FA54: F420 3040 BIC R0, R0, #0x030000 0x3418FA58: 9A02 LDR R2, [SP, #8] 0x3418FA5A: 6852 LDR R2, [R2, #4] 0x3418FA5C: 4310 ORRS R0, R2 0x3418FA5E: 6008 STR R0, [R1] 0x3418FA60: F7F1 FF14 BL HAL_GetTick ; 0x3418188C 0x3418FA64: 9001 STR R0, [SP, #4]
.L39: 0x3418FA66: F7F2 FC5D BL LL_RCC_GetCpuClkSource ; 0x34182324 0x3418FA6A: 9902 LDR R1, [SP, #8] 0x3418FA6C: 6849 LDR R1, [R1, #4] 0x3418FA6E: 0109 LSLS R1, R1, #4 0x3418FA70: 4288 CMP R0, R1 0x3418FA72: D00C BEQ 46L41 ; 0x3418FA8E 0x3418FA74: F7F1 FF0A BL HAL_GetTick ; 0x3418188C 0x3418FA78: 9901 LDR R1, [SP, #4] 0x3418FA7A: 1A40 SUBS R0, R0, R1 0x3418FA7C: F241 3189 MOVW R1, #0x1389 0x3418FA80: 4288 CMP R0, R1 0x3418FA82: D303 BCC 46L40 ; 0x3418FA8C 0x3418FA84: 2003 MOVS R0, #3 0x3418FA86: F88D 000F STRB.W R0, [SP, #15] 0x3418FA8A: E2B0 B 46L93 ; 0x3418FFEE
.L40: 0x3418FA8C: E7EB B 46L39 ; 0x3418FA66
.L41: 0x3418FA8E: F000 FB31 BL HAL_RCC_GetCpuClockFreq ; 0x341900F4 0x3418FA92: F240 718C MOVW R1, #0x078C ; 0x3400078C = SystemCoreClock 0x3418FA96: F2C3 4100 MOVT R1, #0x3400 ; 0x3400078C = SystemCoreClock 0x3418FA9A: 6008 STR R0, [R1]
.L42: 0x3418FA9C: 9802 LDR R0, [SP, #8] 0x3418FA9E: 7800 LDRB R0, [R0] 0x3418FAA0: 0780 LSLS R0, R0, #30 0x3418FAA2: 2800 CMP R0, #0 0x3418FAA4: F140 8136 BPL.W 46L72 ; 0x3418FD14 0x3418FAA8: 9802 LDR R0, [SP, #8] 0x3418FAAA: 6880 LDR R0, [R0, #8] 0x3418FAAC: B170 CBZ R0, .L43 ; 0x3418FACC 0x3418FAAE: 9802 LDR R0, [SP, #8] 0x3418FAB0: 6880 LDR R0, [R0, #8] 0x3418FAB2: F1B0 7F80 CMP.W R0, #0x01000000 0x3418FAB6: D009 BEQ 46L43 ; 0x3418FACC 0x3418FAB8: 9802 LDR R0, [SP, #8] 0x3418FABA: 6880 LDR R0, [R0, #8] 0x3418FABC: F1B0 7F00 CMP.W R0, #0x02000000 0x3418FAC0: D004 BEQ 46L43 ; 0x3418FACC 0x3418FAC2: 9802 LDR R0, [SP, #8] 0x3418FAC4: 6880 LDR R0, [R0, #8] 0x3418FAC6: F1B0 7F40 CMP.W R0, #0x03000000 0x3418FACA: D100 BNE 46L44 ; 0x3418FACE
.L43: 0x3418FACC: E007 B 46L45 ; 0x3418FADE
.L44: 0x3418FACE: F244 3032 MOVW R0, #0x4332 ; 0x34194332 = .rodata..L.str.50 0x3418FAD2: F2C3 4019 MOVT R0, #0x3419 ; 0x34194332 = .rodata..L.str.50 0x3418FAD6: F240 4119 MOVW R1, #0x0419 0x3418FADA: F7FE F8DF BL assert_failed ; 0x3418DC9C
.L45: 0x3418FADE: 9802 LDR R0, [SP, #8] 0x3418FAE0: 6880 LDR R0, [R0, #8] 0x3418FAE2: F1B0 7F00 CMP.W R0, #0x02000000 0x3418FAE6: D107 BNE 46L47 ; 0x3418FAF8 0x3418FAE8: F7F2 FCDC BL LL_RCC_HSE_IsReady ; 0x341824A4 0x3418FAEC: B918 CBNZ R0, .L46 ; 0x3418FAF6 0x3418FAEE: 2001 MOVS R0, #1 0x3418FAF0: F88D 000F STRB.W R0, [SP, #15] 0x3418FAF4: E27B B 46L93 ; 0x3418FFEE
.L46: 0x3418FAF6: E0EB B 46L69 ; 0x3418FCD0
.L47: 0x3418FAF8: 9802 LDR R0, [SP, #8] 0x3418FAFA: 6880 LDR R0, [R0, #8] 0x3418FAFC: F1B0 7F40 CMP.W R0, #0x03000000 0x3418FB00: F040 80D4 BNE.W 46L66 ; 0x3418FCAC 0x3418FB04: 9802 LDR R0, [SP, #8] 0x3418FB06: 6A80 LDR R0, [R0, #40] 0x3418FB08: B170 CBZ R0, .L48 ; 0x3418FB28 0x3418FB0A: 9802 LDR R0, [SP, #8] 0x3418FB0C: 6A80 LDR R0, [R0, #40] 0x3418FB0E: F1B0 5F80 CMP.W R0, #0x10000000 0x3418FB12: D009 BEQ 46L48 ; 0x3418FB28 0x3418FB14: 9802 LDR R0, [SP, #8] 0x3418FB16: 6A80 LDR R0, [R0, #40] 0x3418FB18: F1B0 5F00 CMP.W R0, #0x20000000 0x3418FB1C: D004 BEQ 46L48 ; 0x3418FB28 0x3418FB1E: 9802 LDR R0, [SP, #8] 0x3418FB20: 6A80 LDR R0, [R0, #40] 0x3418FB22: F1B0 5F40 CMP.W R0, #0x30000000 0x3418FB26: D100 BNE 46L49 ; 0x3418FB2A
.L48: 0x3418FB28: E007 B 46L50 ; 0x3418FB3A
.L49: 0x3418FB2A: F244 3032 MOVW R0, #0x4332 ; 0x34194332 = .rodata..L.str.50 0x3418FB2E: F2C3 4019 MOVT R0, #0x3419 ; 0x34194332 = .rodata..L.str.50 0x3418FB32: F44F 6185 MOV.W R1, #0x0428 0x3418FB36: F7FE F8B1 BL assert_failed ; 0x3418DC9C
.L50: 0x3418FB3A: 9802 LDR R0, [SP, #8] 0x3418FB3C: 6AC0 LDR R0, [R0, #44] 0x3418FB3E: B128 CBZ R0, .L51 ; 0x3418FB4C 0x3418FB40: 9802 LDR R0, [SP, #8] 0x3418FB42: 6AC0 LDR R0, [R0, #44] 0x3418FB44: F5B0 7F80 CMP.W R0, #0x0100 0x3418FB48: D800 BHI 46L51 ; 0x3418FB4C 0x3418FB4A: E007 B 46L52 ; 0x3418FB5C
.L51: 0x3418FB4C: F244 3032 MOVW R0, #0x4332 ; 0x34194332 = .rodata..L.str.50 0x3418FB50: F2C3 4019 MOVT R0, #0x3419 ; 0x34194332 = .rodata..L.str.50 0x3418FB54: F240 4129 MOVW R1, #0x0429 0x3418FB58: F7FE F8A0 BL assert_failed ; 0x3418DC9C
.L52: 0x3418FB5C: 9802 LDR R0, [SP, #8] 0x3418FB5E: 6B00 LDR R0, [R0, #48] 0x3418FB60: B170 CBZ R0, .L53 ; 0x3418FB80 0x3418FB62: 9802 LDR R0, [SP, #8] 0x3418FB64: 6B00 LDR R0, [R0, #48] 0x3418FB66: F1B0 5F80 CMP.W R0, #0x10000000 0x3418FB6A: D009 BEQ 46L53 ; 0x3418FB80 0x3418FB6C: 9802 LDR R0, [SP, #8] 0x3418FB6E: 6B00 LDR R0, [R0, #48] 0x3418FB70: F1B0 5F00 CMP.W R0, #0x20000000 0x3418FB74: D004 BEQ 46L53 ; 0x3418FB80 0x3418FB76: 9802 LDR R0, [SP, #8] 0x3418FB78: 6B00 LDR R0, [R0, #48] 0x3418FB7A: F1B0 5F40 CMP.W R0, #0x30000000 0x3418FB7E: D100 BNE 46L54 ; 0x3418FB82
.L53: 0x3418FB80: E007 B 46L55 ; 0x3418FB92
.L54: 0x3418FB82: F244 3032 MOVW R0, #0x4332 ; 0x34194332 = .rodata..L.str.50 0x3418FB86: F2C3 4019 MOVT R0, #0x3419 ; 0x34194332 = .rodata..L.str.50 0x3418FB8A: F240 412A MOVW R1, #0x042A 0x3418FB8E: F7FE F885 BL assert_failed ; 0x3418DC9C
.L55: 0x3418FB92: 9802 LDR R0, [SP, #8] 0x3418FB94: 6B40 LDR R0, [R0, #52] 0x3418FB96: B128 CBZ R0, .L56 ; 0x3418FBA4 0x3418FB98: 9802 LDR R0, [SP, #8] 0x3418FB9A: 6B40 LDR R0, [R0, #52] 0x3418FB9C: F5B0 7F80 CMP.W R0, #0x0100 0x3418FBA0: D800 BHI 46L56 ; 0x3418FBA4 0x3418FBA2: E007 B 46L57 ; 0x3418FBB4
.L56: 0x3418FBA4: F244 3032 MOVW R0, #0x4332 ; 0x34194332 = .rodata..L.str.50 0x3418FBA8: F2C3 4019 MOVT R0, #0x3419 ; 0x34194332 = .rodata..L.str.50 0x3418FBAC: F240 412B MOVW R1, #0x042B 0x3418FBB0: F7FE F874 BL assert_failed ; 0x3418DC9C
.L57: 0x3418FBB4: 9802 LDR R0, [SP, #8] 0x3418FBB6: 6B80 LDR R0, [R0, #56] 0x3418FBB8: B170 CBZ R0, .L58 ; 0x3418FBD8 0x3418FBBA: 9802 LDR R0, [SP, #8] 0x3418FBBC: 6B80 LDR R0, [R0, #56] 0x3418FBBE: F1B0 5F80 CMP.W R0, #0x10000000 0x3418FBC2: D009 BEQ 46L58 ; 0x3418FBD8 0x3418FBC4: 9802 LDR R0, [SP, #8] 0x3418FBC6: 6B80 LDR R0, [R0, #56] 0x3418FBC8: F1B0 5F00 CMP.W R0, #0x20000000 0x3418FBCC: D004 BEQ 46L58 ; 0x3418FBD8 0x3418FBCE: 9802 LDR R0, [SP, #8] 0x3418FBD0: 6B80 LDR R0, [R0, #56] 0x3418FBD2: F1B0 5F40 CMP.W R0, #0x30000000 0x3418FBD6: D100 BNE 46L59 ; 0x3418FBDA
.L58: 0x3418FBD8: E007 B 46L60 ; 0x3418FBEA
.L59: 0x3418FBDA: F244 3032 MOVW R0, #0x4332 ; 0x34194332 = .rodata..L.str.50 0x3418FBDE: F2C3 4019 MOVT R0, #0x3419 ; 0x34194332 = .rodata..L.str.50 0x3418FBE2: F240 412C MOVW R1, #0x042C 0x3418FBE6: F7FE F859 BL assert_failed ; 0x3418DC9C
.L60: 0x3418FBEA: 9802 LDR R0, [SP, #8] 0x3418FBEC: 6BC0 LDR R0, [R0, #60] 0x3418FBEE: B128 CBZ R0, .L61 ; 0x3418FBFC 0x3418FBF0: 9802 LDR R0, [SP, #8] 0x3418FBF2: 6BC0 LDR R0, [R0, #60] 0x3418FBF4: F5B0 7F80 CMP.W R0, #0x0100 0x3418FBF8: D800 BHI 46L61 ; 0x3418FBFC 0x3418FBFA: E007 B 46L62 ; 0x3418FC0C
.L61: 0x3418FBFC: F244 3032 MOVW R0, #0x4332 ; 0x34194332 = .rodata..L.str.50 0x3418FC00: F2C3 4019 MOVT R0, #0x3419 ; 0x34194332 = .rodata..L.str.50 0x3418FC04: F240 412D MOVW R1, #0x042D 0x3418FC08: F7FE F848 BL assert_failed ; 0x3418DC9C
.L62: 0x3418FC0C: F7F2 FBF0 BL LL_RCC_IC2_GetSource ; 0x341823F0 0x3418FC10: 9902 LDR R1, [SP, #8] 0x3418FC12: 6A89 LDR R1, [R1, #40] 0x3418FC14: F000 F9F0 BL RCC_IC_CheckPLLSources ; 0x3418FFF8 0x3418FC18: 2801 CMP R0, #1 0x3418FC1A: D003 BEQ 46L63 ; 0x3418FC24 0x3418FC1C: 2001 MOVS R0, #1 0x3418FC1E: F88D 000F STRB.W R0, [SP, #15] 0x3418FC22: E1E4 B 46L93 ; 0x3418FFEE
.L63: 0x3418FC24: F7F2 FBEC BL LL_RCC_IC6_GetSource ; 0x34182400 0x3418FC28: 9902 LDR R1, [SP, #8] 0x3418FC2A: 6B09 LDR R1, [R1, #48] 0x3418FC2C: F000 F9E4 BL RCC_IC_CheckPLLSources ; 0x3418FFF8 0x3418FC30: 2801 CMP R0, #1 0x3418FC32: D003 BEQ 46L64 ; 0x3418FC3C 0x3418FC34: 2001 MOVS R0, #1 0x3418FC36: F88D 000F STRB.W R0, [SP, #15] 0x3418FC3A: E1D8 B 46L93 ; 0x3418FFEE
.L64: 0x3418FC3C: F7F2 FBE8 BL LL_RCC_IC11_GetSource ; 0x34182410 0x3418FC40: 9902 LDR R1, [SP, #8] 0x3418FC42: 6B89 LDR R1, [R1, #56] 0x3418FC44: F000 F9D8 BL RCC_IC_CheckPLLSources ; 0x3418FFF8 0x3418FC48: 2801 CMP R0, #1 0x3418FC4A: D003 BEQ 46L65 ; 0x3418FC54 0x3418FC4C: 2001 MOVS R0, #1 0x3418FC4E: F88D 000F STRB.W R0, [SP, #15] 0x3418FC52: E1CC B 46L93 ; 0x3418FFEE
.L65: 0x3418FC54: 9902 LDR R1, [SP, #8] 0x3418FC56: 6A88 LDR R0, [R1, #40] 0x3418FC58: 6ACA LDR R2, [R1, #44] 0x3418FC5A: 2100 MOVS R1, #0 0x3418FC5C: F6CF 71FF MOVT R1, #0xFFFF 0x3418FC60: EB01 4202 ADD.W R2, R1, R2, LSL #16 0x3418FC64: 4310 ORRS R0, R2 0x3418FC66: F248 02C8 MOVW R2, #0x80C8 0x3418FC6A: F2C5 6202 MOVT R2, #0x5602 0x3418FC6E: 6010 STR R0, [R2] 0x3418FC70: 9A02 LDR R2, [SP, #8] 0x3418FC72: 6B10 LDR R0, [R2, #48] 0x3418FC74: 6B52 LDR R2, [R2, #52] 0x3418FC76: EB01 4202 ADD.W R2, R1, R2, LSL #16 0x3418FC7A: 4310 ORRS R0, R2 0x3418FC7C: F248 02D8 MOVW R2, #0x80D8 0x3418FC80: F2C5 6202 MOVT R2, #0x5602 0x3418FC84: 6010 STR R0, [R2] 0x3418FC86: 9A02 LDR R2, [SP, #8] 0x3418FC88: 6B90 LDR R0, [R2, #56] 0x3418FC8A: 6BD2 LDR R2, [R2, #60] 0x3418FC8C: EB01 4102 ADD.W R1, R1, R2, LSL #16 0x3418FC90: 4308 ORRS R0, R1 0x3418FC92: F248 01EC MOVW R1, #0x80EC 0x3418FC96: F2C5 6102 MOVT R1, #0x5602 0x3418FC9A: 6008 STR R0, [R1] 0x3418FC9C: F648 2140 MOVW R1, #0x8A40 0x3418FCA0: F2C5 6102 MOVT R1, #0x5602 0x3418FCA4: F240 4022 MOVW R0, #0x0422 0x3418FCA8: 6008 STR R0, [R1] 0x3418FCAA: E011 B 46L69 ; 0x3418FCD0
.L66: 0x3418FCAC: 9802 LDR R0, [SP, #8] 0x3418FCAE: 6880 LDR R0, [R0, #8] 0x3418FCB0: B938 CBNZ R0, .L68 ; 0x3418FCC2 0x3418FCB2: F7F2 FB2F BL LL_RCC_HSI_IsReady ; 0x34182314 0x3418FCB6: B918 CBNZ R0, .L67 ; 0x3418FCC0 0x3418FCB8: 2001 MOVS R0, #1 0x3418FCBA: F88D 000F STRB.W R0, [SP, #15] 0x3418FCBE: E196 B 46L93 ; 0x3418FFEE
.L67: 0x3418FCC0: E006 B 46L69 ; 0x3418FCD0
.L68: 0x3418FCC2: F7F2 FB6D BL LL_RCC_MSI_IsReady ; 0x341823A0 0x3418FCC6: B918 CBNZ R0, .L69 ; 0x3418FCD0 0x3418FCC8: 2001 MOVS R0, #1 0x3418FCCA: F88D 000F STRB.W R0, [SP, #15] 0x3418FCCE: E18E B 46L93 ; 0x3418FFEE
.L69: 0x3418FCD0: F248 0120 MOVW R1, #0x8020 0x3418FCD4: F2C5 6102 MOVT R1, #0x5602 0x3418FCD8: 6808 LDR R0, [R1] 0x3418FCDA: F020 7040 BIC R0, R0, #0x03000000 0x3418FCDE: 9A02 LDR R2, [SP, #8] 0x3418FCE0: 6892 LDR R2, [R2, #8] 0x3418FCE2: 4310 ORRS R0, R2 0x3418FCE4: 6008 STR R0, [R1] 0x3418FCE6: F7F1 FDD1 BL HAL_GetTick ; 0x3418188C 0x3418FCEA: 9001 STR R0, [SP, #4]
.L70: 0x3418FCEC: F7F2 FB22 BL LL_RCC_GetSysClkSource ; 0x34182334 0x3418FCF0: 9902 LDR R1, [SP, #8] 0x3418FCF2: 6889 LDR R1, [R1, #8] 0x3418FCF4: 0109 LSLS R1, R1, #4 0x3418FCF6: 4288 CMP R0, R1 0x3418FCF8: D00C BEQ 46L72 ; 0x3418FD14 0x3418FCFA: F7F1 FDC7 BL HAL_GetTick ; 0x3418188C 0x3418FCFE: 9901 LDR R1, [SP, #4] 0x3418FD00: 1A40 SUBS R0, R0, R1 0x3418FD02: F241 3189 MOVW R1, #0x1389 0x3418FD06: 4288 CMP R0, R1 0x3418FD08: D303 BCC 46L71 ; 0x3418FD12 0x3418FD0A: 2003 MOVS R0, #3 0x3418FD0C: F88D 000F STRB.W R0, [SP, #15] 0x3418FD10: E16D B 46L93 ; 0x3418FFEE
.L71: 0x3418FD12: E7EB B 46L70 ; 0x3418FCEC
.L72: 0x3418FD14: 9802 LDR R0, [SP, #8] 0x3418FD16: 7800 LDRB R0, [R0] 0x3418FD18: 0740 LSLS R0, R0, #29 0x3418FD1A: 2800 CMP R0, #0 0x3418FD1C: D544 BPL 46L76 ; 0x3418FDA8 0x3418FD1E: 9802 LDR R0, [SP, #8] 0x3418FD20: 68C0 LDR R0, [R0, #12] 0x3418FD22: B310 CBZ R0, .L73 ; 0x3418FD6A 0x3418FD24: 9802 LDR R0, [SP, #8] 0x3418FD26: 68C0 LDR R0, [R0, #12] 0x3418FD28: F5B0 1F80 CMP.W R0, #0x100000 0x3418FD2C: D01D BEQ 46L73 ; 0x3418FD6A 0x3418FD2E: 9802 LDR R0, [SP, #8] 0x3418FD30: 68C0 LDR R0, [R0, #12] 0x3418FD32: F5B0 1F00 CMP.W R0, #0x200000 0x3418FD36: D018 BEQ 46L73 ; 0x3418FD6A 0x3418FD38: 9802 LDR R0, [SP, #8] 0x3418FD3A: 68C0 LDR R0, [R0, #12] 0x3418FD3C: F5B0 1F40 CMP.W R0, #0x300000 0x3418FD40: D013 BEQ 46L73 ; 0x3418FD6A 0x3418FD42: 9802 LDR R0, [SP, #8] 0x3418FD44: 68C0 LDR R0, [R0, #12] 0x3418FD46: F5B0 0F80 CMP.W R0, #0x400000 0x3418FD4A: D00E BEQ 46L73 ; 0x3418FD6A 0x3418FD4C: 9802 LDR R0, [SP, #8] 0x3418FD4E: 68C0 LDR R0, [R0, #12] 0x3418FD50: F5B0 0FA0 CMP.W R0, #0x500000 0x3418FD54: D009 BEQ 46L73 ; 0x3418FD6A 0x3418FD56: 9802 LDR R0, [SP, #8] 0x3418FD58: 68C0 LDR R0, [R0, #12] 0x3418FD5A: F5B0 0FC0 CMP.W R0, #0x600000 0x3418FD5E: D004 BEQ 46L73 ; 0x3418FD6A 0x3418FD60: 9802 LDR R0, [SP, #8] 0x3418FD62: 68C0 LDR R0, [R0, #12] 0x3418FD64: F5B0 0FE0 CMP.W R0, #0x700000 0x3418FD68: D100 BNE 46L74 ; 0x3418FD6C
.L73: 0x3418FD6A: E007 B 46L75 ; 0x3418FD7C
.L74: 0x3418FD6C: F244 3032 MOVW R0, #0x4332 ; 0x34194332 = .rodata..L.str.50 0x3418FD70: F2C3 4019 MOVT R0, #0x3419 ; 0x34194332 = .rodata..L.str.50 0x3418FD74: F44F 618E MOV.W R1, #0x0470 0x3418FD78: F7FD FF90 BL assert_failed ; 0x3418DC9C
.L75: 0x3418FD7C: 9802 LDR R0, [SP, #8] 0x3418FD7E: 68C0 LDR R0, [R0, #12] 0x3418FD80: F248 0124 MOVW R1, #0x8024 0x3418FD84: F2C5 6102 MOVT R1, #0x5602 0x3418FD88: 6809 LDR R1, [R1] 0x3418FD8A: F401 01E0 AND R1, R1, #0x700000 0x3418FD8E: 4288 CMP R0, R1 0x3418FD90: D20A BCS 46L76 ; 0x3418FDA8 0x3418FD92: F248 0124 MOVW R1, #0x8024 0x3418FD96: F2C5 6102 MOVT R1, #0x5602 0x3418FD9A: 6808 LDR R0, [R1] 0x3418FD9C: F420 00E0 BIC R0, R0, #0x700000 0x3418FDA0: 9A02 LDR R2, [SP, #8] 0x3418FDA2: 68D2 LDR R2, [R2, #12] 0x3418FDA4: 4310 ORRS R0, R2 0x3418FDA6: 6008 STR R0, [R1]
.L76: 0x3418FDA8: 9802 LDR R0, [SP, #8] 0x3418FDAA: 7800 LDRB R0, [R0] 0x3418FDAC: 0700 LSLS R0, R0, #28 0x3418FDAE: 2800 CMP R0, #0 0x3418FDB0: D53D BPL 46L80 ; 0x3418FE2E 0x3418FDB2: 9802 LDR R0, [SP, #8] 0x3418FDB4: 6900 LDR R0, [R0, #16] 0x3418FDB6: B1D8 CBZ R0, .L77 ; 0x3418FDF0 0x3418FDB8: 9802 LDR R0, [SP, #8] 0x3418FDBA: 6900 LDR R0, [R0, #16] 0x3418FDBC: 2801 CMP R0, #1 0x3418FDBE: D017 BEQ 46L77 ; 0x3418FDF0 0x3418FDC0: 9802 LDR R0, [SP, #8] 0x3418FDC2: 6900 LDR R0, [R0, #16] 0x3418FDC4: 2802 CMP R0, #2 0x3418FDC6: D013 BEQ 46L77 ; 0x3418FDF0 0x3418FDC8: 9802 LDR R0, [SP, #8] 0x3418FDCA: 6900 LDR R0, [R0, #16] 0x3418FDCC: 2803 CMP R0, #3 0x3418FDCE: D00F BEQ 46L77 ; 0x3418FDF0 0x3418FDD0: 9802 LDR R0, [SP, #8] 0x3418FDD2: 6900 LDR R0, [R0, #16] 0x3418FDD4: 2804 CMP R0, #4 0x3418FDD6: D00B BEQ 46L77 ; 0x3418FDF0 0x3418FDD8: 9802 LDR R0, [SP, #8] 0x3418FDDA: 6900 LDR R0, [R0, #16] 0x3418FDDC: 2805 CMP R0, #5 0x3418FDDE: D007 BEQ 46L77 ; 0x3418FDF0 0x3418FDE0: 9802 LDR R0, [SP, #8] 0x3418FDE2: 6900 LDR R0, [R0, #16] 0x3418FDE4: 2806 CMP R0, #6 0x3418FDE6: D003 BEQ 46L77 ; 0x3418FDF0 0x3418FDE8: 9802 LDR R0, [SP, #8] 0x3418FDEA: 6900 LDR R0, [R0, #16] 0x3418FDEC: 2807 CMP R0, #7 0x3418FDEE: D100 BNE 46L78 ; 0x3418FDF2
.L77: 0x3418FDF0: E007 B 46L79 ; 0x3418FE02
.L78: 0x3418FDF2: F244 3032 MOVW R0, #0x4332 ; 0x34194332 = .rodata..L.str.50 0x3418FDF6: F2C3 4019 MOVT R0, #0x3419 ; 0x34194332 = .rodata..L.str.50 0x3418FDFA: F240 417B MOVW R1, #0x047B 0x3418FDFE: F7FD FF4D BL assert_failed ; 0x3418DC9C
.L79: 0x3418FE02: 9802 LDR R0, [SP, #8] 0x3418FE04: 6900 LDR R0, [R0, #16] 0x3418FE06: F248 0124 MOVW R1, #0x8024 0x3418FE0A: F2C5 6102 MOVT R1, #0x5602 0x3418FE0E: 6809 LDR R1, [R1] 0x3418FE10: F001 0107 AND R1, R1, #7 0x3418FE14: 4288 CMP R0, R1 0x3418FE16: D20A BCS 46L80 ; 0x3418FE2E 0x3418FE18: F248 0124 MOVW R1, #0x8024 0x3418FE1C: F2C5 6102 MOVT R1, #0x5602 0x3418FE20: 6808 LDR R0, [R1] 0x3418FE22: F020 0007 BIC R0, R0, #7 0x3418FE26: 9A02 LDR R2, [SP, #8] 0x3418FE28: 6912 LDR R2, [R2, #16] 0x3418FE2A: 4310 ORRS R0, R2 0x3418FE2C: 6008 STR R0, [R1]
.L80: 0x3418FE2E: 9802 LDR R0, [SP, #8] 0x3418FE30: 7800 LDRB R0, [R0] 0x3418FE32: 06C0 LSLS R0, R0, #27 0x3418FE34: 2800 CMP R0, #0 0x3418FE36: D53D BPL 46L84 ; 0x3418FEB4 0x3418FE38: 9802 LDR R0, [SP, #8] 0x3418FE3A: 6940 LDR R0, [R0, #20] 0x3418FE3C: B1D8 CBZ R0, .L81 ; 0x3418FE76 0x3418FE3E: 9802 LDR R0, [SP, #8] 0x3418FE40: 6940 LDR R0, [R0, #20] 0x3418FE42: 2810 CMP R0, #16 0x3418FE44: D017 BEQ 46L81 ; 0x3418FE76 0x3418FE46: 9802 LDR R0, [SP, #8] 0x3418FE48: 6940 LDR R0, [R0, #20] 0x3418FE4A: 2820 CMP R0, #32 0x3418FE4C: D013 BEQ 46L81 ; 0x3418FE76 0x3418FE4E: 9802 LDR R0, [SP, #8] 0x3418FE50: 6940 LDR R0, [R0, #20] 0x3418FE52: 2830 CMP R0, #48 0x3418FE54: D00F BEQ 46L81 ; 0x3418FE76 0x3418FE56: 9802 LDR R0, [SP, #8] 0x3418FE58: 6940 LDR R0, [R0, #20] 0x3418FE5A: 2840 CMP R0, #64 0x3418FE5C: D00B BEQ 46L81 ; 0x3418FE76 0x3418FE5E: 9802 LDR R0, [SP, #8] 0x3418FE60: 6940 LDR R0, [R0, #20] 0x3418FE62: 2850 CMP R0, #80 0x3418FE64: D007 BEQ 46L81 ; 0x3418FE76 0x3418FE66: 9802 LDR R0, [SP, #8] 0x3418FE68: 6940 LDR R0, [R0, #20] 0x3418FE6A: 2860 CMP R0, #96 0x3418FE6C: D003 BEQ 46L81 ; 0x3418FE76 0x3418FE6E: 9802 LDR R0, [SP, #8] 0x3418FE70: 6940 LDR R0, [R0, #20] 0x3418FE72: 2870 CMP R0, #112 0x3418FE74: D100 BNE 46L82 ; 0x3418FE78
.L81: 0x3418FE76: E007 B 46L83 ; 0x3418FE88
.L82: 0x3418FE78: F244 3032 MOVW R0, #0x4332 ; 0x34194332 = .rodata..L.str.50 0x3418FE7C: F2C3 4019 MOVT R0, #0x3419 ; 0x34194332 = .rodata..L.str.50 0x3418FE80: F240 4185 MOVW R1, #0x0485 0x3418FE84: F7FD FF0A BL assert_failed ; 0x3418DC9C
.L83: 0x3418FE88: 9802 LDR R0, [SP, #8] 0x3418FE8A: 6940 LDR R0, [R0, #20] 0x3418FE8C: F248 0124 MOVW R1, #0x8024 0x3418FE90: F2C5 6102 MOVT R1, #0x5602 0x3418FE94: 6809 LDR R1, [R1] 0x3418FE96: F001 0170 AND R1, R1, #112 0x3418FE9A: 4288 CMP R0, R1 0x3418FE9C: D20A BCS 46L84 ; 0x3418FEB4 0x3418FE9E: F248 0124 MOVW R1, #0x8024 0x3418FEA2: F2C5 6102 MOVT R1, #0x5602 0x3418FEA6: 6808 LDR R0, [R1] 0x3418FEA8: F020 0070 BIC R0, R0, #112 0x3418FEAC: 9A02 LDR R2, [SP, #8] 0x3418FEAE: 6952 LDR R2, [R2, #20] 0x3418FEB0: 4310 ORRS R0, R2 0x3418FEB2: 6008 STR R0, [R1]
.L84: 0x3418FEB4: 9802 LDR R0, [SP, #8] 0x3418FEB6: 7800 LDRB R0, [R0] 0x3418FEB8: 0680 LSLS R0, R0, #26 0x3418FEBA: 2800 CMP R0, #0 0x3418FEBC: D544 BPL 46L88 ; 0x3418FF48 0x3418FEBE: 9802 LDR R0, [SP, #8] 0x3418FEC0: 6980 LDR R0, [R0, #24] 0x3418FEC2: B310 CBZ R0, .L85 ; 0x3418FF0A 0x3418FEC4: 9802 LDR R0, [SP, #8] 0x3418FEC6: 6980 LDR R0, [R0, #24] 0x3418FEC8: F5B0 5F80 CMP.W R0, #0x1000 0x3418FECC: D01D BEQ 46L85 ; 0x3418FF0A 0x3418FECE: 9802 LDR R0, [SP, #8] 0x3418FED0: 6980 LDR R0, [R0, #24] 0x3418FED2: F5B0 5F00 CMP.W R0, #0x2000 0x3418FED6: D018 BEQ 46L85 ; 0x3418FF0A 0x3418FED8: 9802 LDR R0, [SP, #8] 0x3418FEDA: 6980 LDR R0, [R0, #24] 0x3418FEDC: F5B0 5F40 CMP.W R0, #0x3000 0x3418FEE0: D013 BEQ 46L85 ; 0x3418FF0A 0x3418FEE2: 9802 LDR R0, [SP, #8] 0x3418FEE4: 6980 LDR R0, [R0, #24] 0x3418FEE6: F5B0 4F80 CMP.W R0, #0x4000 0x3418FEEA: D00E BEQ 46L85 ; 0x3418FF0A 0x3418FEEC: 9802 LDR R0, [SP, #8] 0x3418FEEE: 6980 LDR R0, [R0, #24] 0x3418FEF0: F5B0 4FA0 CMP.W R0, #0x5000 0x3418FEF4: D009 BEQ 46L85 ; 0x3418FF0A 0x3418FEF6: 9802 LDR R0, [SP, #8] 0x3418FEF8: 6980 LDR R0, [R0, #24] 0x3418FEFA: F5B0 4FC0 CMP.W R0, #0x6000 0x3418FEFE: D004 BEQ 46L85 ; 0x3418FF0A 0x3418FF00: 9802 LDR R0, [SP, #8] 0x3418FF02: 6980 LDR R0, [R0, #24] 0x3418FF04: F5B0 4FE0 CMP.W R0, #0x7000 0x3418FF08: D100 BNE 46L86 ; 0x3418FF0C
.L85: 0x3418FF0A: E007 B 46L87 ; 0x3418FF1C
.L86: 0x3418FF0C: F244 3032 MOVW R0, #0x4332 ; 0x34194332 = .rodata..L.str.50 0x3418FF10: F2C3 4019 MOVT R0, #0x3419 ; 0x34194332 = .rodata..L.str.50 0x3418FF14: F240 418F MOVW R1, #0x048F 0x3418FF18: F7FD FEC0 BL assert_failed ; 0x3418DC9C
.L87: 0x3418FF1C: 9802 LDR R0, [SP, #8] 0x3418FF1E: 6980 LDR R0, [R0, #24] 0x3418FF20: F248 0124 MOVW R1, #0x8024 0x3418FF24: F2C5 6102 MOVT R1, #0x5602 0x3418FF28: 6809 LDR R1, [R1] 0x3418FF2A: F401 41E0 AND R1, R1, #0x7000 0x3418FF2E: 4288 CMP R0, R1 0x3418FF30: D20A BCS 46L88 ; 0x3418FF48 0x3418FF32: F248 0124 MOVW R1, #0x8024 0x3418FF36: F2C5 6102 MOVT R1, #0x5602 0x3418FF3A: 6808 LDR R0, [R1] 0x3418FF3C: F420 40E0 BIC R0, R0, #0x7000 0x3418FF40: 9A02 LDR R2, [SP, #8] 0x3418FF42: 6992 LDR R2, [R2, #24] 0x3418FF44: 4310 ORRS R0, R2 0x3418FF46: 6008 STR R0, [R1]
.L88: 0x3418FF48: 9802 LDR R0, [SP, #8] 0x3418FF4A: 7800 LDRB R0, [R0] 0x3418FF4C: 0640 LSLS R0, R0, #25 0x3418FF4E: 2800 CMP R0, #0 0x3418FF50: D544 BPL 46L92 ; 0x3418FFDC 0x3418FF52: 9802 LDR R0, [SP, #8] 0x3418FF54: 69C0 LDR R0, [R0, #28] 0x3418FF56: B310 CBZ R0, .L89 ; 0x3418FF9E 0x3418FF58: 9802 LDR R0, [SP, #8] 0x3418FF5A: 69C0 LDR R0, [R0, #28] 0x3418FF5C: F5B0 3F80 CMP.W R0, #0x010000 0x3418FF60: D01D BEQ 46L89 ; 0x3418FF9E 0x3418FF62: 9802 LDR R0, [SP, #8] 0x3418FF64: 69C0 LDR R0, [R0, #28] 0x3418FF66: F5B0 3F00 CMP.W R0, #0x020000 0x3418FF6A: D018 BEQ 46L89 ; 0x3418FF9E 0x3418FF6C: 9802 LDR R0, [SP, #8] 0x3418FF6E: 69C0 LDR R0, [R0, #28] 0x3418FF70: F5B0 3F40 CMP.W R0, #0x030000 0x3418FF74: D013 BEQ 46L89 ; 0x3418FF9E 0x3418FF76: 9802 LDR R0, [SP, #8] 0x3418FF78: 69C0 LDR R0, [R0, #28] 0x3418FF7A: F5B0 2F80 CMP.W R0, #0x040000 0x3418FF7E: D00E BEQ 46L89 ; 0x3418FF9E 0x3418FF80: 9802 LDR R0, [SP, #8] 0x3418FF82: 69C0 LDR R0, [R0, #28] 0x3418FF84: F5B0 2FA0 CMP.W R0, #0x050000 0x3418FF88: D009 BEQ 46L89 ; 0x3418FF9E 0x3418FF8A: 9802 LDR R0, [SP, #8] 0x3418FF8C: 69C0 LDR R0, [R0, #28] 0x3418FF8E: F5B0 2FC0 CMP.W R0, #0x060000 0x3418FF92: D004 BEQ 46L89 ; 0x3418FF9E 0x3418FF94: 9802 LDR R0, [SP, #8] 0x3418FF96: 69C0 LDR R0, [R0, #28] 0x3418FF98: F5B0 2FE0 CMP.W R0, #0x070000 0x3418FF9C: D100 BNE 46L90 ; 0x3418FFA0
.L89: 0x3418FF9E: E007 B 46L91 ; 0x3418FFB0
.L90: 0x3418FFA0: F244 3032 MOVW R0, #0x4332 ; 0x34194332 = .rodata..L.str.50 0x3418FFA4: F2C3 4019 MOVT R0, #0x3419 ; 0x34194332 = .rodata..L.str.50 0x3418FFA8: F240 4199 MOVW R1, #0x0499 0x3418FFAC: F7FD FE76 BL assert_failed ; 0x3418DC9C
.L91: 0x3418FFB0: 9802 LDR R0, [SP, #8] 0x3418FFB2: 69C0 LDR R0, [R0, #28] 0x3418FFB4: F248 0124 MOVW R1, #0x8024 0x3418FFB8: F2C5 6102 MOVT R1, #0x5602 0x3418FFBC: 6809 LDR R1, [R1] 0x3418FFBE: F401 21E0 AND R1, R1, #0x070000 0x3418FFC2: 4288 CMP R0, R1 0x3418FFC4: D20A BCS 46L92 ; 0x3418FFDC 0x3418FFC6: F248 0124 MOVW R1, #0x8024 0x3418FFCA: F2C5 6102 MOVT R1, #0x5602 0x3418FFCE: 6808 LDR R0, [R1] 0x3418FFD0: F420 20E0 BIC R0, R0, #0x070000 0x3418FFD4: 9A02 LDR R2, [SP, #8] 0x3418FFD6: 69D2 LDR R2, [R2, #28] 0x3418FFD8: 4310 ORRS R0, R2 0x3418FFDA: 6008 STR R0, [R1]
.L92: 0x3418FFDC: F240 707C MOVW R0, #0x077C ; 0x3400077C = uwTickPrio 0x3418FFE0: F2C3 4000 MOVT R0, #0x3400 ; 0x3400077C = uwTickPrio 0x3418FFE4: 6800 LDR R0, [R0] 0x3418FFE6: F7FD FFE5 BL HAL_InitTick ; 0x3418DFB4 0x3418FFEA: F88D 000F STRB.W R0, [SP, #15]
.L93: 0x3418FFEE: F89D 000F LDRB.W R0, [SP, #15] 0x3418FFF2: B004 ADD SP, SP, #16 0x3418FFF4: BD80 POP 123R7, PC}

Section .init.NPU2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


NPU2_IRQHandler: 0x3418FFF6: E7FE B NPU2_IRQHandler ; 0x3418FFF6

Section .text.RCC_IC_CheckPLLSources from blto2_FSBL_lto.o, size=234, align=4


RCC_IC_CheckPLLSources: 0x3418FFF8: B580 PUSH 123R7, LR} 0x3418FFFA: B086 SUB SP, SP, #24 0x3418FFFC: 9005 STR R0, [SP, #20] 0x3418FFFE: 9104 STR R1, [SP, #16] 0x34190000: 2001 MOVS R0, #1 0x34190002: 9003 STR R0, [SP, #12] 0x34190004: 9805 LDR R0, [SP, #20] 0x34190006: 9002 STR R0, [SP, #8] 0x34190008: B160 CBZ R0, .L1 ; 0x34190024 0x3419000A: 9802 LDR R0, [SP, #8] 0x3419000C: F1B0 5F80 CMP.W R0, #0x10000000 0x34190010: D011 BEQ 46L3 ; 0x34190036 0x34190012: 9802 LDR R0, [SP, #8] 0x34190014: F1B0 5F00 CMP.W R0, #0x20000000 0x34190018: D016 BEQ 46L5 ; 0x34190048 0x3419001A: 9802 LDR R0, [SP, #8] 0x3419001C: F1B0 5F40 CMP.W R0, #0x30000000 0x34190020: D01B BEQ 46L7 ; 0x3419005A 0x34190022: E023 B 46L9 ; 0x3419006C
.L1: 0x34190024: F7F2 F9D4 BL LL_RCC_PLL1_IsReady ; 0x341823D0 0x34190028: B920 CBNZ R0, .L2 ; 0x34190034 0x3419002A: F7F2 FA4B BL LL_RCC_PLL1_IsEnabledBypass ; 0x341824C4 0x3419002E: B908 CBNZ R0, .L2 ; 0x34190034 0x34190030: 2000 MOVS R0, #0 0x34190032: 9003 STR R0, [SP, #12]
.L2: 0x34190034: E01C B 46L10 ; 0x34190070
.L3: 0x34190036: F7F2 F9F3 BL LL_RCC_PLL2_IsReady ; 0x34182420 0x3419003A: B920 CBNZ R0, .L4 ; 0x34190046 0x3419003C: F7F2 FA4A BL LL_RCC_PLL2_IsEnabledBypass ; 0x341824D4 0x34190040: B908 CBNZ R0, .L4 ; 0x34190046 0x34190042: 2000 MOVS R0, #0 0x34190044: 9003 STR R0, [SP, #12]
.L4: 0x34190046: E013 B 46L10 ; 0x34190070
.L5: 0x34190048: F7F2 F9F2 BL LL_RCC_PLL3_IsReady ; 0x34182430 0x3419004C: B920 CBNZ R0, .L6 ; 0x34190058 0x3419004E: F7F2 FA49 BL LL_RCC_PLL3_IsEnabledBypass ; 0x341824E4 0x34190052: B908 CBNZ R0, .L6 ; 0x34190058 0x34190054: 2000 MOVS R0, #0 0x34190056: 9003 STR R0, [SP, #12]
.L6: 0x34190058: E00A B 46L10 ; 0x34190070
.L7: 0x3419005A: F7F2 F9F1 BL LL_RCC_PLL4_IsReady ; 0x34182440 0x3419005E: B920 CBNZ R0, .L8 ; 0x3419006A 0x34190060: F7F2 FA48 BL LL_RCC_PLL4_IsEnabledBypass ; 0x341824F4 0x34190064: B908 CBNZ R0, .L8 ; 0x3419006A 0x34190066: 2000 MOVS R0, #0 0x34190068: 9003 STR R0, [SP, #12]
.L8: 0x3419006A: E001 B 46L10 ; 0x34190070
.L9: 0x3419006C: 2000 MOVS R0, #0 0x3419006E: 9003 STR R0, [SP, #12]
.L10: 0x34190070: 9804 LDR R0, [SP, #16] 0x34190072: 9001 STR R0, [SP, #4] 0x34190074: B160 CBZ R0, .L11 ; 0x34190090 0x34190076: 9801 LDR R0, [SP, #4] 0x34190078: F1B0 5F80 CMP.W R0, #0x10000000 0x3419007C: D011 BEQ 46L13 ; 0x341900A2 0x3419007E: 9801 LDR R0, [SP, #4] 0x34190080: F1B0 5F00 CMP.W R0, #0x20000000 0x34190084: D016 BEQ 46L15 ; 0x341900B4 0x34190086: 9801 LDR R0, [SP, #4] 0x34190088: F1B0 5F40 CMP.W R0, #0x30000000 0x3419008C: D01B BEQ 46L17 ; 0x341900C6 0x3419008E: E023 B 46L19 ; 0x341900D8
.L11: 0x34190090: F7F2 F99E BL LL_RCC_PLL1_IsReady ; 0x341823D0 0x34190094: B920 CBNZ R0, .L12 ; 0x341900A0 0x34190096: F7F2 FA15 BL LL_RCC_PLL1_IsEnabledBypass ; 0x341824C4 0x3419009A: B908 CBNZ R0, .L12 ; 0x341900A0 0x3419009C: 2000 MOVS R0, #0 0x3419009E: 9003 STR R0, [SP, #12]
.L12: 0x341900A0: E01C B 46L20 ; 0x341900DC
.L13: 0x341900A2: F7F2 F9BD BL LL_RCC_PLL2_IsReady ; 0x34182420 0x341900A6: B920 CBNZ R0, .L14 ; 0x341900B2 0x341900A8: F7F2 FA14 BL LL_RCC_PLL2_IsEnabledBypass ; 0x341824D4 0x341900AC: B908 CBNZ R0, .L14 ; 0x341900B2 0x341900AE: 2000 MOVS R0, #0 0x341900B0: 9003 STR R0, [SP, #12]
.L14: 0x341900B2: E013 B 46L20 ; 0x341900DC
.L15: 0x341900B4: F7F2 F9BC BL LL_RCC_PLL3_IsReady ; 0x34182430 0x341900B8: B920 CBNZ R0, .L16 ; 0x341900C4 0x341900BA: F7F2 FA13 BL LL_RCC_PLL3_IsEnabledBypass ; 0x341824E4 0x341900BE: B908 CBNZ R0, .L16 ; 0x341900C4 0x341900C0: 2000 MOVS R0, #0 0x341900C2: 9003 STR R0, [SP, #12]
.L16: 0x341900C4: E00A B 46L20 ; 0x341900DC
.L17: 0x341900C6: F7F2 F9BB BL LL_RCC_PLL4_IsReady ; 0x34182440 0x341900CA: B920 CBNZ R0, .L18 ; 0x341900D6 0x341900CC: F7F2 FA12 BL LL_RCC_PLL4_IsEnabledBypass ; 0x341824F4 0x341900D0: B908 CBNZ R0, .L18 ; 0x341900D6 0x341900D2: 2000 MOVS R0, #0 0x341900D4: 9003 STR R0, [SP, #12]
.L18: 0x341900D6: E001 B 46L20 ; 0x341900DC
.L19: 0x341900D8: 2000 MOVS R0, #0 0x341900DA: 9003 STR R0, [SP, #12]
.L20: 0x341900DC: 9803 LDR R0, [SP, #12] 0x341900DE: B006 ADD SP, SP, #24 0x341900E0: BD80 POP 123R7, PC}

Section .init.NPU3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


NPU3_IRQHandler: 0x341900E2: E7FE B NPU3_IRQHandler ; 0x341900E2

Section .text.LL_RCC_IC1_Enable from blto2_FSBL_lto.o, size=14, align=4


LL_RCC_IC1_Enable: 0x341900E4: F648 2140 MOVW R1, #0x8A40 0x341900E8: F2C5 6102 MOVT R1, #0x5602 0x341900EC: 2001 MOVS R0, #1 0x341900EE: 6008 STR R0, [R1] 0x341900F0: 4770 BX LR

Section .init.CACHEAXI_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


CACHEAXI_IRQHandler: 0x341900F2: E7FE B CACHEAXI_IRQHandler ; 0x341900F2

Section .text.HAL_RCC_GetCpuClockFreq from blto2_FSBL_lto.o, size=238, align=4


HAL_RCC_GetCpuClockFreq: 0x341900F4: B580 PUSH 123R7, LR} 0x341900F6: B084 SUB SP, SP, #16 0x341900F8: 2000 MOVS R0, #0 0x341900FA: 9003 STR R0, [SP, #12] 0x341900FC: F7F2 F912 BL LL_RCC_GetCpuClkSource ; 0x34182324 0x34190100: 4601 MOV R1, R0 0x34190102: 9101 STR R1, [SP, #4] 0x34190104: B160 CBZ R0, .L1 ; 0x34190120 0x34190106: 9801 LDR R0, [SP, #4] 0x34190108: F5B0 1F80 CMP.W R0, #0x100000 0x3419010C: D012 BEQ 46L2 ; 0x34190134 0x3419010E: 9801 LDR R0, [SP, #4] 0x34190110: F5B0 1F00 CMP.W R0, #0x200000 0x34190114: D022 BEQ 46L3 ; 0x3419015C 0x34190116: 9801 LDR R0, [SP, #4] 0x34190118: F5B0 1F40 CMP.W R0, #0x300000 0x3419011C: D024 BEQ 46L4 ; 0x34190168 0x3419011E: E05D B 46L10 ; 0x341901DC
.L1: 0x34190120: F7F2 F9C8 BL LL_RCC_HSI_GetDivider ; 0x341824B4 0x34190124: 09C1 LSRS R1, R0, #7 0x34190126: F249 0000 MOVW R0, #0x9000 0x3419012A: F2C0 30D0 MOVT R0, #0x03D0 0x3419012E: 40C8 LSRS R0, R1 0x34190130: 9003 STR R0, [SP, #12] 0x34190132: E053 B 46L10 ; 0x341901DC
.L2: 0x34190134: F248 0044 MOVW R0, #0x8044 0x34190138: F2C5 6002 MOVT R0, #0x5602 0x3419013C: 6800 LDR R0, [R0] 0x3419013E: F400 7000 AND R0, R0, #0x0200 0x34190142: F5B0 7F00 CMP.W R0, #0x0200 0x34190146: F640 1000 MOVW R0, #0x0900 0x3419014A: F2C0 003D MOVT R0, #61 0x3419014E: BF04 ITT EQ 0x34190150: F242 4000 MOVWEQ R0, #0x2400 0x34190154: F2C0 00F4 MOVTEQ R0, #244 0x34190158: 9003 STR R0, [SP, #12] 0x3419015A: E03F B 46L10 ; 0x341901DC
.L3: 0x3419015C: F646 4000 MOVW R0, #0x6C00 0x34190160: F2C0 20DC MOVT R0, #0x02DC 0x34190164: 9003 STR R0, [SP, #12] 0x34190166: E039 B 46L10 ; 0x341901DC
.L4: 0x34190168: F000 F83C BL LL_RCC_IC1_GetDivider ; 0x341901E4 0x3419016C: 9002 STR R0, [SP, #8] 0x3419016E: F7F2 F937 BL LL_RCC_IC1_GetSource ; 0x341823E0 0x34190172: 4601 MOV R1, R0 0x34190174: 9100 STR R1, [SP, #0] 0x34190176: B160 CBZ R0, .L5 ; 0x34190192 0x34190178: 9800 LDR R0, [SP, #0] 0x3419017A: F1B0 5F80 CMP.W R0, #0x10000000 0x3419017E: D011 BEQ 46L6 ; 0x341901A4 0x34190180: 9800 LDR R0, [SP, #0] 0x34190182: F1B0 5F00 CMP.W R0, #0x20000000 0x34190186: D016 BEQ 46L7 ; 0x341901B6 0x34190188: 9800 LDR R0, [SP, #0] 0x3419018A: F1B0 5F40 CMP.W R0, #0x30000000 0x3419018E: D01B BEQ 46L8 ; 0x341901C8 0x34190190: E023 B 46L9 ; 0x341901DA
.L5: 0x34190192: F001 FBAF BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F4 0x34190196: 9003 STR R0, [SP, #12] 0x34190198: 9803 LDR R0, [SP, #12] 0x3419019A: 9902 LDR R1, [SP, #8] 0x3419019C: FBB0 F0F1 UDIV R0, R0, R1 0x341901A0: 9003 STR R0, [SP, #12] 0x341901A2: E01A B 46L9 ; 0x341901DA
.L6: 0x341901A4: F001 FBE8 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191978 0x341901A8: 9003 STR R0, [SP, #12] 0x341901AA: 9803 LDR R0, [SP, #12] 0x341901AC: 9902 LDR R1, [SP, #8] 0x341901AE: FBB0 F0F1 UDIV R0, R0, R1 0x341901B2: 9003 STR R0, [SP, #12] 0x341901B4: E011 B 46L9 ; 0x341901DA
.L7: 0x341901B6: F001 FC21 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919FC 0x341901BA: 9003 STR R0, [SP, #12] 0x341901BC: 9803 LDR R0, [SP, #12] 0x341901BE: 9902 LDR R1, [SP, #8] 0x341901C0: FBB0 F0F1 UDIV R0, R0, R1 0x341901C4: 9003 STR R0, [SP, #12] 0x341901C6: E008 B 46L9 ; 0x341901DA
.L8: 0x341901C8: F001 FC5A BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A80 0x341901CC: 9003 STR R0, [SP, #12] 0x341901CE: 9803 LDR R0, [SP, #12] 0x341901D0: 9902 LDR R1, [SP, #8] 0x341901D2: FBB0 F0F1 UDIV R0, R0, R1 0x341901D6: 9003 STR R0, [SP, #12] 0x341901D8: E7FF B 46L9 ; 0x341901DA
.L9: 0x341901DA: E7FF B 46L10 ; 0x341901DC
.L10: 0x341901DC: 9803 LDR R0, [SP, #12] 0x341901DE: B004 ADD SP, SP, #16 0x341901E0: BD80 POP 123R7, PC}

Section .init.LTDC_LO_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


LTDC_LO_IRQHandler: 0x341901E2: E7FE B LTDC_LO_IRQHandler ; 0x341901E2

Section .text.LL_RCC_IC1_GetDivider from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_IC1_GetDivider: 0x341901E4: F248 00C4 MOVW R0, #0x80C4 0x341901E8: F2C5 6002 MOVT R0, #0x5602 0x341901EC: 6800 LDR R0, [R0] 0x341901EE: F400 017F AND R1, R0, #0xFF0000 0x341901F2: 2001 MOVS R0, #1 0x341901F4: EB00 4011 ADD.W R0, R0, R1, LSR #16 0x341901F8: 4770 BX LR

Section .init.LTDC_LO_ERR_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


LTDC_LO_ERR_IRQHandler: 0x341901FA: E7FE B LTDC_LO_ERR_IRQHandler ; 0x341901FA

Section .text.HAL_RCC_GetSysClockFreq from blto2_FSBL_lto.o, size=26, align=4


HAL_RCC_GetSysClockFreq: 0x341901FC: B580 PUSH 123R7, LR} 0x341901FE: B082 SUB SP, SP, #8 0x34190200: F7F2 F8F6 BL LL_RCC_IC2_GetSource ; 0x341823F0 0x34190204: 9001 STR R0, [SP, #4] 0x34190206: F000 F807 BL LL_RCC_IC2_GetDivider ; 0x34190218 0x3419020A: 4601 MOV R1, R0 0x3419020C: 9801 LDR R0, [SP, #4] 0x3419020E: F7F2 F979 BL RCC_GetSysClockFreq ; 0x34182504 0x34190212: B002 ADD SP, SP, #8 0x34190214: BD80 POP 123R7, PC}

Section .init.DMA2D_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


DMA2D_IRQHandler: 0x34190216: E7FE B DMA2D_IRQHandler ; 0x34190216

Section .text.LL_RCC_IC2_GetDivider from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_IC2_GetDivider: 0x34190218: F248 00C8 MOVW R0, #0x80C8 0x3419021C: F2C5 6002 MOVT R0, #0x5602 0x34190220: 6800 LDR R0, [R0] 0x34190222: F400 017F AND R1, R0, #0xFF0000 0x34190226: 2001 MOVS R0, #1 0x34190228: EB00 4011 ADD.W R0, R0, R1, LSR #16 0x3419022C: 4770 BX LR

Section .init.JPEG_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


JPEG_IRQHandler: 0x3419022E: E7FE B JPEG_IRQHandler ; 0x3419022E

Section .text.LL_RCC_IC5_Enable.60 from blto2_FSBL_lto.o, size=14, align=4


LL_RCC_IC5_Enable.60: 0x34190230: F648 2140 MOVW R1, #0x8A40 0x34190234: F2C5 6102 MOVT R1, #0x5602 0x34190238: 2010 MOVS R0, #16 0x3419023A: 6008 STR R0, [R1] 0x3419023C: 4770 BX LR

Section .init.VENC_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


VENC_IRQHandler: 0x3419023E: E7FE B VENC_IRQHandler ; 0x3419023E

Section .text.LL_RCC_IC3_Enable from blto2_FSBL_lto.o, size=14, align=4


LL_RCC_IC3_Enable: 0x34190240: F648 2140 MOVW R1, #0x8A40 0x34190244: F2C5 6102 MOVT R1, #0x5602 0x34190248: 2004 MOVS R0, #4 0x3419024A: 6008 STR R0, [R1] 0x3419024C: 4770 BX LR

Section .init.GFXMMU_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GFXMMU_IRQHandler: 0x3419024E: E7FE B GFXMMU_IRQHandler ; 0x3419024E

Section .text.LL_RCC_IC4_Enable from blto2_FSBL_lto.o, size=14, align=4


LL_RCC_IC4_Enable: 0x34190250: F648 2140 MOVW R1, #0x8A40 0x34190254: F2C5 6102 MOVT R1, #0x5602 0x34190258: 2008 MOVS R0, #8 0x3419025A: 6008 STR R0, [R1] 0x3419025C: 4770 BX LR

Section .init.GFXTIM_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GFXTIM_IRQHandler: 0x3419025E: E7FE B GFXTIM_IRQHandler ; 0x3419025E

Section .text.LL_RCC_CLKP_Enable from blto2_FSBL_lto.o, size=14, align=4


LL_RCC_CLKP_Enable: 0x34190260: F648 2148 MOVW R1, #0x8A48 0x34190264: F2C5 6102 MOVT R1, #0x5602 0x34190268: 2040 MOVS R0, #64 0x3419026A: 6008 STR R0, [R1] 0x3419026C: 4770 BX LR

Section .init.GPU2D_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPU2D_IRQHandler: 0x3419026E: E7FE B GPU2D_IRQHandler ; 0x3419026E

Section .text.LL_RCC_IC7_Enable from blto2_FSBL_lto.o, size=14, align=4


LL_RCC_IC7_Enable: 0x34190270: F648 2140 MOVW R1, #0x8A40 0x34190274: F2C5 6102 MOVT R1, #0x5602 0x34190278: 2040 MOVS R0, #64 0x3419027A: 6008 STR R0, [R1] 0x3419027C: 4770 BX LR

Section .init.GPU2D_ER_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPU2D_ER_IRQHandler: 0x3419027E: E7FE B GPU2D_ER_IRQHandler ; 0x3419027E

Section .text.LL_RCC_IC8_Enable from blto2_FSBL_lto.o, size=14, align=4


LL_RCC_IC8_Enable: 0x34190280: F648 2140 MOVW R1, #0x8A40 0x34190284: F2C5 6102 MOVT R1, #0x5602 0x34190288: 2080 MOVS R0, #128 0x3419028A: 6008 STR R0, [R1] 0x3419028C: 4770 BX LR

Section .init.ICACHE_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


ICACHE_IRQHandler: 0x3419028E: E7FE B ICACHE_IRQHandler ; 0x3419028E

Section .text.LL_RCC_HSE_SelectHSEDiv2AsDiv2Clock from blto2_FSBL_lto.o, size=18, align=4


LL_RCC_HSE_SelectHSEDiv2AsDiv2Clock: 0x34190290: F248 0154 MOVW R1, #0x8054 0x34190294: F2C5 6102 MOVT R1, #0x5602 0x34190298: 6808 LDR R0, [R1] 0x3419029A: F040 0040 ORR R0, R0, #64 0x3419029E: 6008 STR R0, [R1] 0x341902A0: 4770 BX LR

Section .init.HPDMA1_Channel0_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel0_IRQHandler: 0x341902A2: E7FE B HPDMA1_Channel0_IRQHandler ; 0x341902A2

Section .text.LL_RCC_HSE_SelectHSEAsDiv2Clock from blto2_FSBL_lto.o, size=18, align=4


LL_RCC_HSE_SelectHSEAsDiv2Clock: 0x341902A4: F248 0154 MOVW R1, #0x8054 0x341902A8: F2C5 6102 MOVT R1, #0x5602 0x341902AC: 6808 LDR R0, [R1] 0x341902AE: F020 0040 BIC R0, R0, #64 0x341902B2: 6008 STR R0, [R1] 0x341902B4: 4770 BX LR

Section .init.HPDMA1_Channel1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel1_IRQHandler: 0x341902B6: E7FE B HPDMA1_Channel1_IRQHandler ; 0x341902B6

Section .text.LL_RCC_SetTIMPrescaler from blto2_FSBL_lto.o, size=30, align=4


LL_RCC_SetTIMPrescaler: 0x341902B8: B081 SUB SP, SP, #4 0x341902BA: 9000 STR R0, [SP, #0] 0x341902BC: F248 0124 MOVW R1, #0x8024 0x341902C0: F2C5 6102 MOVT R1, #0x5602 0x341902C4: 6808 LDR R0, [R1] 0x341902C6: F020 7040 BIC R0, R0, #0x03000000 0x341902CA: 9A00 LDR R2, [SP, #0] 0x341902CC: EA40 6002 ORR.W R0, R0, R2, LSL #24 0x341902D0: 6008 STR R0, [R1] 0x341902D2: B001 ADD SP, SP, #4 0x341902D4: 4770 BX LR

Section .init.HPDMA1_Channel2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel2_IRQHandler: 0x341902D6: E7FE B HPDMA1_Channel2_IRQHandler ; 0x341902D6

Section .text.LL_RCC_GetADCClockSource from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_GetADCClockSource: 0x341902D8: B081 SUB SP, SP, #4 0x341902DA: 9000 STR R0, [SP, #0] 0x341902DC: F248 1044 MOVW R0, #0x8144 0x341902E0: F2C5 6002 MOVT R0, #0x5602 0x341902E4: 6800 LDR R0, [R0] 0x341902E6: F000 0070 AND R0, R0, #112 0x341902EA: B001 ADD SP, SP, #4 0x341902EC: 4770 BX LR

Section .init.HPDMA1_Channel3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel3_IRQHandler: 0x341902EE: E7FE B HPDMA1_Channel3_IRQHandler ; 0x341902EE

Section .text.LL_RCC_GetADFClockSource from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_GetADFClockSource: 0x341902F0: B081 SUB SP, SP, #4 0x341902F2: 9000 STR R0, [SP, #0] 0x341902F4: F248 1044 MOVW R0, #0x8144 0x341902F8: F2C5 6002 MOVT R0, #0x5602 0x341902FC: 6800 LDR R0, [R0] 0x341902FE: F000 0007 AND R0, R0, #7 0x34190302: B001 ADD SP, SP, #4 0x34190304: 4770 BX LR

Section .init.HPDMA1_Channel4_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel4_IRQHandler: 0x34190306: E7FE B HPDMA1_Channel4_IRQHandler ; 0x34190306

Section .text.LL_RCC_GetCLKPClockSource from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_GetCLKPClockSource: 0x34190308: B081 SUB SP, SP, #4 0x3419030A: 9000 STR R0, [SP, #0] 0x3419030C: F248 105C MOVW R0, #0x815C 0x34190310: F2C5 6002 MOVT R0, #0x5602 0x34190314: 6800 LDR R0, [R0] 0x34190316: F000 0007 AND R0, R0, #7 0x3419031A: B001 ADD SP, SP, #4 0x3419031C: 4770 BX LR

Section .init.HPDMA1_Channel5_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel5_IRQHandler: 0x3419031E: E7FE B HPDMA1_Channel5_IRQHandler ; 0x3419031E

Section .text.LL_RCC_GetDCMIPPClockSource from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_GetDCMIPPClockSource: 0x34190320: B081 SUB SP, SP, #4 0x34190322: 9000 STR R0, [SP, #0] 0x34190324: F248 1044 MOVW R0, #0x8144 0x34190328: F2C5 6002 MOVT R0, #0x5602 0x3419032C: 6800 LDR R0, [R0] 0x3419032E: F400 1040 AND R0, R0, #0x300000 0x34190332: B001 ADD SP, SP, #4 0x34190334: 4770 BX LR

Section .init.HPDMA1_Channel6_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel6_IRQHandler: 0x34190336: E7FE B HPDMA1_Channel6_IRQHandler ; 0x34190336

Section .text.LL_RCC_GetETHClockSource from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_GetETHClockSource: 0x34190338: B081 SUB SP, SP, #4 0x3419033A: 9000 STR R0, [SP, #0] 0x3419033C: F248 1048 MOVW R0, #0x8148 0x34190340: F2C5 6002 MOVT R0, #0x5602 0x34190344: 6800 LDR R0, [R0] 0x34190346: F400 5040 AND R0, R0, #0x3000 0x3419034A: B001 ADD SP, SP, #4 0x3419034C: 4770 BX LR

Section .init.HPDMA1_Channel7_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel7_IRQHandler: 0x3419034E: E7FE B HPDMA1_Channel7_IRQHandler ; 0x3419034E

Section .text.LL_RCC_GetETHPTPClockSource from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_GetETHPTPClockSource: 0x34190350: B081 SUB SP, SP, #4 0x34190352: 9000 STR R0, [SP, #0] 0x34190354: F248 1048 MOVW R0, #0x8148 0x34190358: F2C5 6002 MOVT R0, #0x5602 0x3419035C: 6800 LDR R0, [R0] 0x3419035E: F000 0003 AND R0, R0, #3 0x34190362: B001 ADD SP, SP, #4 0x34190364: 4770 BX LR

Section .init.HPDMA1_Channel8_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel8_IRQHandler: 0x34190366: E7FE B HPDMA1_Channel8_IRQHandler ; 0x34190366

Section .text.LL_RCC_GetFDCANClockSource from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_GetFDCANClockSource: 0x34190368: B081 SUB SP, SP, #4 0x3419036A: 9000 STR R0, [SP, #0] 0x3419036C: F248 104C MOVW R0, #0x814C 0x34190370: F2C5 6002 MOVT R0, #0x5602 0x34190374: 6800 LDR R0, [R0] 0x34190376: F000 0003 AND R0, R0, #3 0x3419037A: B001 ADD SP, SP, #4 0x3419037C: 4770 BX LR

Section .init.HPDMA1_Channel9_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel9_IRQHandler: 0x3419037E: E7FE B HPDMA1_Channel9_IRQHandler ; 0x3419037E

Section .text.LL_RCC_GetFMCClockSource from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_GetFMCClockSource: 0x34190380: B081 SUB SP, SP, #4 0x34190382: 9000 STR R0, [SP, #0] 0x34190384: F248 104C MOVW R0, #0x814C 0x34190388: F2C5 6002 MOVT R0, #0x5602 0x3419038C: 6800 LDR R0, [R0] 0x3419038E: F000 0030 AND R0, R0, #48 0x34190392: B001 ADD SP, SP, #4 0x34190394: 4770 BX LR

Section .init.HPDMA1_Channel10_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel10_IRQHandler: 0x34190396: E7FE B HPDMA1_Channel10_IRQHandler ; 0x34190396

Section .text.LL_RCC_GetLPUARTClockSource from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_GetLPUARTClockSource: 0x34190398: B081 SUB SP, SP, #4 0x3419039A: 9000 STR R0, [SP, #0] 0x3419039C: F248 1078 MOVW R0, #0x8178 0x341903A0: F2C5 6002 MOVT R0, #0x5602 0x341903A4: 6800 LDR R0, [R0] 0x341903A6: F400 60E0 AND R0, R0, #0x0700 0x341903AA: B001 ADD SP, SP, #4 0x341903AC: 4770 BX LR

Section .init.HPDMA1_Channel11_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel11_IRQHandler: 0x341903AE: E7FE B HPDMA1_Channel11_IRQHandler ; 0x341903AE

Section .text.LL_RCC_GetLTDCClockSource from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_GetLTDCClockSource: 0x341903B0: B081 SUB SP, SP, #4 0x341903B2: 9000 STR R0, [SP, #0] 0x341903B4: F248 1050 MOVW R0, #0x8150 0x341903B8: F2C5 6002 MOVT R0, #0x5602 0x341903BC: 6800 LDR R0, [R0] 0x341903BE: F000 7040 AND R0, R0, #0x03000000 0x341903C2: B001 ADD SP, SP, #4 0x341903C4: 4770 BX LR

Section .init.HPDMA1_Channel12_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel12_IRQHandler: 0x341903C6: E7FE B HPDMA1_Channel12_IRQHandler ; 0x341903C6

Section .text.LL_RCC_GetMDFClockSource from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_GetMDFClockSource: 0x341903C8: B081 SUB SP, SP, #4 0x341903CA: 9000 STR R0, [SP, #0] 0x341903CC: F248 1054 MOVW R0, #0x8154 0x341903D0: F2C5 6002 MOVT R0, #0x5602 0x341903D4: 6800 LDR R0, [R0] 0x341903D6: F400 20E0 AND R0, R0, #0x070000 0x341903DA: B001 ADD SP, SP, #4 0x341903DC: 4770 BX LR

Section .init.HPDMA1_Channel13_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel13_IRQHandler: 0x341903DE: E7FE B HPDMA1_Channel13_IRQHandler ; 0x341903DE

Section .text.LL_RCC_GetPSSIClockSource from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_GetPSSIClockSource: 0x341903E0: B081 SUB SP, SP, #4 0x341903E2: 9000 STR R0, [SP, #0] 0x341903E4: F248 105C MOVW R0, #0x815C 0x341903E8: F2C5 6002 MOVT R0, #0x5602 0x341903EC: 6800 LDR R0, [R0] 0x341903EE: F000 0030 AND R0, R0, #48 0x341903F2: B001 ADD SP, SP, #4 0x341903F4: 4770 BX LR

Section .init.HPDMA1_Channel14_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel14_IRQHandler: 0x341903F6: E7FE B HPDMA1_Channel14_IRQHandler ; 0x341903F6

Section .text.LL_RCC_GetSPDIFRXClockSource from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_GetSPDIFRXClockSource: 0x341903F8: B081 SUB SP, SP, #4 0x341903FA: 9000 STR R0, [SP, #0] 0x341903FC: F248 1064 MOVW R0, #0x8164 0x34190400: F2C5 6002 MOVT R0, #0x5602 0x34190404: 6800 LDR R0, [R0] 0x34190406: F000 0007 AND R0, R0, #7 0x3419040A: B001 ADD SP, SP, #4 0x3419040C: 4770 BX LR

Section .init.HPDMA1_Channel15_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel15_IRQHandler: 0x3419040E: E7FE B HPDMA1_Channel15_IRQHandler ; 0x3419040E

Section .text.HAL_RCCEx_GetPeriphCLKFreq from blto2_FSBL_lto.o, size=1626, align=4


HAL_RCCEx_GetPeriphCLKFreq: 0x34190410: B580 PUSH 123R7, LR} 0x34190412: B086 SUB SP, SP, #24 0x34190414: 9105 STR R1, [SP, #20] 0x34190416: 9004 STR R0, [SP, #16] 0x34190418: 2000 MOVS R0, #0 0x3419041A: 9003 STR R0, [SP, #12] 0x3419041C: 9804 LDR R0, [SP, #16] 0x3419041E: 9001 STR R0, [SP, #4] 0x34190420: 9905 LDR R1, [SP, #20] 0x34190422: 9102 STR R1, [SP, #8] 0x34190424: F080 0001 EOR R0, R0, #1 0x34190428: 4308 ORRS R0, R1 0x3419042A: 2800 CMP R0, #0 0x3419042C: F000 81A1 BEQ.W 46L1 ; 0x34190772 0x34190430: 9902 LDR R1, [SP, #8] 0x34190432: 9801 LDR R0, [SP, #4] 0x34190434: F080 0002 EOR R0, R0, #2 0x34190438: 4308 ORRS R0, R1 0x3419043A: 2800 CMP R0, #0 0x3419043C: F000 819E BEQ.W 46L2 ; 0x3419077C 0x34190440: 9902 LDR R1, [SP, #8] 0x34190442: 9801 LDR R0, [SP, #4] 0x34190444: F080 0004 EOR R0, R0, #4 0x34190448: 4308 ORRS R0, R1 0x3419044A: 2800 CMP R0, #0 0x3419044C: F000 819F BEQ.W 46L4 ; 0x3419078E 0x34190450: 9902 LDR R1, [SP, #8] 0x34190452: 9801 LDR R0, [SP, #4] 0x34190454: F080 0008 EOR R0, R0, #8 0x34190458: 4308 ORRS R0, R1 0x3419045A: 2800 CMP R0, #0 0x3419045C: F000 8193 BEQ.W 46L3 ; 0x34190786 0x34190460: 9902 LDR R1, [SP, #8] 0x34190462: 9801 LDR R0, [SP, #4] 0x34190464: F080 0010 EOR R0, R0, #16 0x34190468: 4308 ORRS R0, R1 0x3419046A: 2800 CMP R0, #0 0x3419046C: F000 8194 BEQ.W 46L5 ; 0x34190798 0x34190470: 9902 LDR R1, [SP, #8] 0x34190472: 9801 LDR R0, [SP, #4] 0x34190474: F080 0020 EOR R0, R0, #32 0x34190478: 4308 ORRS R0, R1 0x3419047A: 2800 CMP R0, #0 0x3419047C: F000 8192 BEQ.W 46L6 ; 0x341907A4 0x34190480: 9902 LDR R1, [SP, #8] 0x34190482: 9801 LDR R0, [SP, #4] 0x34190484: F480 7000 EOR R0, R0, #0x0200 0x34190488: 4308 ORRS R0, R1 0x3419048A: 2800 CMP R0, #0 0x3419048C: F000 8190 BEQ.W 46L7 ; 0x341907B0 0x34190490: 9902 LDR R1, [SP, #8] 0x34190492: 9801 LDR R0, [SP, #4] 0x34190494: F480 6080 EOR R0, R0, #0x0400 0x34190498: 4308 ORRS R0, R1 0x3419049A: 2800 CMP R0, #0 0x3419049C: F000 818D BEQ.W 46L8 ; 0x341907BA 0x341904A0: 9902 LDR R1, [SP, #8] 0x341904A2: 9801 LDR R0, [SP, #4] 0x341904A4: F480 6000 EOR R0, R0, #0x0800 0x341904A8: 4308 ORRS R0, R1 0x341904AA: 2800 CMP R0, #0 0x341904AC: F000 818A BEQ.W 46L9 ; 0x341907C4 0x341904B0: 9902 LDR R1, [SP, #8] 0x341904B2: 9801 LDR R0, [SP, #4] 0x341904B4: F480 5080 EOR R0, R0, #0x1000 0x341904B8: 4308 ORRS R0, R1 0x341904BA: 2800 CMP R0, #0 0x341904BC: F000 8187 BEQ.W 46L10 ; 0x341907CE 0x341904C0: 9902 LDR R1, [SP, #8] 0x341904C2: 9801 LDR R0, [SP, #4] 0x341904C4: F480 5000 EOR R0, R0, #0x2000 0x341904C8: 4308 ORRS R0, R1 0x341904CA: 2800 CMP R0, #0 0x341904CC: F000 8186 BEQ.W 46L11 ; 0x341907DC 0x341904D0: 9902 LDR R1, [SP, #8] 0x341904D2: 9801 LDR R0, [SP, #4] 0x341904D4: F480 4080 EOR R0, R0, #0x4000 0x341904D8: 4308 ORRS R0, R1 0x341904DA: 2800 CMP R0, #0 0x341904DC: F000 8186 BEQ.W 46L12 ; 0x341907EC 0x341904E0: 9902 LDR R1, [SP, #8] 0x341904E2: 9801 LDR R0, [SP, #4] 0x341904E4: F480 4000 EOR R0, R0, #0x8000 0x341904E8: 4308 ORRS R0, R1 0x341904EA: 2800 CMP R0, #0 0x341904EC: F000 8186 BEQ.W 46L13 ; 0x341907FC 0x341904F0: 9902 LDR R1, [SP, #8] 0x341904F2: 9801 LDR R0, [SP, #4] 0x341904F4: F480 3080 EOR R0, R0, #0x010000 0x341904F8: 4308 ORRS R0, R1 0x341904FA: 2800 CMP R0, #0 0x341904FC: F000 8186 BEQ.W 46L14 ; 0x3419080C 0x34190500: 9902 LDR R1, [SP, #8] 0x34190502: 9801 LDR R0, [SP, #4] 0x34190504: F480 3000 EOR R0, R0, #0x020000 0x34190508: 4308 ORRS R0, R1 0x3419050A: 2800 CMP R0, #0 0x3419050C: F000 8186 BEQ.W 46L15 ; 0x3419081C 0x34190510: 9902 LDR R1, [SP, #8] 0x34190512: 9801 LDR R0, [SP, #4] 0x34190514: F480 2080 EOR R0, R0, #0x040000 0x34190518: 4308 ORRS R0, R1 0x3419051A: 2800 CMP R0, #0 0x3419051C: F000 8186 BEQ.W 46L16 ; 0x3419082C 0x34190520: 9902 LDR R1, [SP, #8] 0x34190522: 9801 LDR R0, [SP, #4] 0x34190524: F480 2000 EOR R0, R0, #0x080000 0x34190528: 4308 ORRS R0, R1 0x3419052A: 2800 CMP R0, #0 0x3419052C: F000 8186 BEQ.W 46L17 ; 0x3419083C 0x34190530: 9902 LDR R1, [SP, #8] 0x34190532: 9801 LDR R0, [SP, #4] 0x34190534: F480 1080 EOR R0, R0, #0x100000 0x34190538: 4308 ORRS R0, R1 0x3419053A: 2800 CMP R0, #0 0x3419053C: F000 8186 BEQ.W 46L18 ; 0x3419084C 0x34190540: 9902 LDR R1, [SP, #8] 0x34190542: 9801 LDR R0, [SP, #4] 0x34190544: F480 1000 EOR R0, R0, #0x200000 0x34190548: 4308 ORRS R0, R1 0x3419054A: 2800 CMP R0, #0 0x3419054C: F000 8186 BEQ.W 46L19 ; 0x3419085C 0x34190550: 9902 LDR R1, [SP, #8] 0x34190552: 9801 LDR R0, [SP, #4] 0x34190554: F480 0080 EOR R0, R0, #0x400000 0x34190558: 4308 ORRS R0, R1 0x3419055A: 2800 CMP R0, #0 0x3419055C: F000 8186 BEQ.W 46L20 ; 0x3419086C 0x34190560: 9902 LDR R1, [SP, #8] 0x34190562: 9801 LDR R0, [SP, #4] 0x34190564: F480 0000 EOR R0, R0, #0x800000 0x34190568: 4308 ORRS R0, R1 0x3419056A: 2800 CMP R0, #0 0x3419056C: F000 8186 BEQ.W 46L21 ; 0x3419087C 0x34190570: 9902 LDR R1, [SP, #8] 0x34190572: 9801 LDR R0, [SP, #4] 0x34190574: F080 7080 EOR R0, R0, #0x01000000 0x34190578: 4308 ORRS R0, R1 0x3419057A: 2800 CMP R0, #0 0x3419057C: F000 8184 BEQ.W 46L22 ; 0x34190888 0x34190580: 9902 LDR R1, [SP, #8] 0x34190582: 9801 LDR R0, [SP, #4] 0x34190584: F080 7000 EOR R0, R0, #0x02000000 0x34190588: 4308 ORRS R0, R1 0x3419058A: 2800 CMP R0, #0 0x3419058C: F000 8182 BEQ.W 46L23 ; 0x34190894 0x34190590: 9902 LDR R1, [SP, #8] 0x34190592: 9801 LDR R0, [SP, #4] 0x34190594: F080 6080 EOR R0, R0, #0x04000000 0x34190598: 4308 ORRS R0, R1 0x3419059A: 2800 CMP R0, #0 0x3419059C: F000 8180 BEQ.W 46L24 ; 0x341908A0 0x341905A0: 9902 LDR R1, [SP, #8] 0x341905A2: 9801 LDR R0, [SP, #4] 0x341905A4: F080 6000 EOR R0, R0, #0x08000000 0x341905A8: 4308 ORRS R0, R1 0x341905AA: 2800 CMP R0, #0 0x341905AC: F000 817D BEQ.W 46L25 ; 0x341908AA 0x341905B0: 9902 LDR R1, [SP, #8] 0x341905B2: 9801 LDR R0, [SP, #4] 0x341905B4: F080 5080 EOR R0, R0, #0x10000000 0x341905B8: 4308 ORRS R0, R1 0x341905BA: 2800 CMP R0, #0 0x341905BC: F000 8179 BEQ.W 46L26 ; 0x341908B2 0x341905C0: 9902 LDR R1, [SP, #8] 0x341905C2: 9801 LDR R0, [SP, #4] 0x341905C4: F080 5000 EOR R0, R0, #0x20000000 0x341905C8: 4308 ORRS R0, R1 0x341905CA: 2800 CMP R0, #0 0x341905CC: F000 8179 BEQ.W 46L27 ; 0x341908C2 0x341905D0: 9902 LDR R1, [SP, #8] 0x341905D2: 9801 LDR R0, [SP, #4] 0x341905D4: F080 4080 EOR R0, R0, #0x40000000 0x341905D8: 4308 ORRS R0, R1 0x341905DA: 2800 CMP R0, #0 0x341905DC: F000 8179 BEQ.W 46L28 ; 0x341908D2 0x341905E0: 9902 LDR R1, [SP, #8] 0x341905E2: 9801 LDR R0, [SP, #4] 0x341905E4: F080 4000 EOR R0, R0, #0x80000000 0x341905E8: 4308 ORRS R0, R1 0x341905EA: 2800 CMP R0, #0 0x341905EC: F000 8178 BEQ.W 46L29 ; 0x341908E0 0x341905F0: 9801 LDR R0, [SP, #4] 0x341905F2: 9902 LDR R1, [SP, #8] 0x341905F4: F081 0101 EOR R1, R1, #1 0x341905F8: 4308 ORRS R0, R1 0x341905FA: 2800 CMP R0, #0 0x341905FC: F000 8178 BEQ.W 46L30 ; 0x341908F0 0x34190600: 9801 LDR R0, [SP, #4] 0x34190602: 9902 LDR R1, [SP, #8] 0x34190604: F081 0102 EOR R1, R1, #2 0x34190608: 4308 ORRS R0, R1 0x3419060A: 2800 CMP R0, #0 0x3419060C: F000 8175 BEQ.W 46L31 ; 0x341908FA 0x34190610: 9801 LDR R0, [SP, #4] 0x34190612: 9902 LDR R1, [SP, #8] 0x34190614: F081 0104 EOR R1, R1, #4 0x34190618: 4308 ORRS R0, R1 0x3419061A: 2800 CMP R0, #0 0x3419061C: F000 8175 BEQ.W 46L32 ; 0x3419090A 0x34190620: 9801 LDR R0, [SP, #4] 0x34190622: 9902 LDR R1, [SP, #8] 0x34190624: F081 0108 EOR R1, R1, #8 0x34190628: 4308 ORRS R0, R1 0x3419062A: 2800 CMP R0, #0 0x3419062C: F000 8175 BEQ.W 46L33 ; 0x3419091A 0x34190630: 9801 LDR R0, [SP, #4] 0x34190632: 9902 LDR R1, [SP, #8] 0x34190634: F081 0110 EOR R1, R1, #16 0x34190638: 4308 ORRS R0, R1 0x3419063A: 2800 CMP R0, #0 0x3419063C: F000 8175 BEQ.W 46L34 ; 0x3419092A 0x34190640: 9801 LDR R0, [SP, #4] 0x34190642: 9902 LDR R1, [SP, #8] 0x34190644: F081 0120 EOR R1, R1, #32 0x34190648: 4308 ORRS R0, R1 0x3419064A: 2800 CMP R0, #0 0x3419064C: F000 8175 BEQ.W 46L35 ; 0x3419093A 0x34190650: 9801 LDR R0, [SP, #4] 0x34190652: 9902 LDR R1, [SP, #8] 0x34190654: F081 0140 EOR R1, R1, #64 0x34190658: 4308 ORRS R0, R1 0x3419065A: 2800 CMP R0, #0 0x3419065C: F000 8175 BEQ.W 46L36 ; 0x3419094A 0x34190660: 9801 LDR R0, [SP, #4] 0x34190662: 9902 LDR R1, [SP, #8] 0x34190664: F481 7180 EOR R1, R1, #0x0100 0x34190668: 4308 ORRS R0, R1 0x3419066A: 2800 CMP R0, #0 0x3419066C: F000 8175 BEQ.W 46L37 ; 0x3419095A 0x34190670: 9801 LDR R0, [SP, #4] 0x34190672: 9902 LDR R1, [SP, #8] 0x34190674: F481 7100 EOR R1, R1, #0x0200 0x34190678: 4308 ORRS R0, R1 0x3419067A: 2800 CMP R0, #0 0x3419067C: F000 8174 BEQ.W 46L38 ; 0x34190968 0x34190680: 9801 LDR R0, [SP, #4] 0x34190682: 9902 LDR R1, [SP, #8] 0x34190684: F481 6180 EOR R1, R1, #0x0400 0x34190688: 4308 ORRS R0, R1 0x3419068A: 2800 CMP R0, #0 0x3419068C: F000 8174 BEQ.W 46L39 ; 0x34190978 0x34190690: 9801 LDR R0, [SP, #4] 0x34190692: 9902 LDR R1, [SP, #8] 0x34190694: F481 6100 EOR R1, R1, #0x0800 0x34190698: 4308 ORRS R0, R1 0x3419069A: 2800 CMP R0, #0 0x3419069C: F000 8174 BEQ.W 46L40 ; 0x34190988 0x341906A0: 9801 LDR R0, [SP, #4] 0x341906A2: 9902 LDR R1, [SP, #8] 0x341906A4: F481 5180 EOR R1, R1, #0x1000 0x341906A8: 4308 ORRS R0, R1 0x341906AA: 2800 CMP R0, #0 0x341906AC: F000 8174 BEQ.W 46L41 ; 0x34190998 0x341906B0: 9801 LDR R0, [SP, #4] 0x341906B2: 9902 LDR R1, [SP, #8] 0x341906B4: F481 5100 EOR R1, R1, #0x2000 0x341906B8: 4308 ORRS R0, R1 0x341906BA: 2800 CMP R0, #0 0x341906BC: F000 8174 BEQ.W 46L42 ; 0x341909A8 0x341906C0: 9801 LDR R0, [SP, #4] 0x341906C2: 9902 LDR R1, [SP, #8] 0x341906C4: F481 4180 EOR R1, R1, #0x4000 0x341906C8: 4308 ORRS R0, R1 0x341906CA: 2800 CMP R0, #0 0x341906CC: F000 8174 BEQ.W 46L43 ; 0x341909B8 0x341906D0: 9801 LDR R0, [SP, #4] 0x341906D2: 9902 LDR R1, [SP, #8] 0x341906D4: F481 4100 EOR R1, R1, #0x8000 0x341906D8: 4308 ORRS R0, R1 0x341906DA: 2800 CMP R0, #0 0x341906DC: F000 8174 BEQ.W 46L44 ; 0x341909C8 0x341906E0: 9801 LDR R0, [SP, #4] 0x341906E2: 9902 LDR R1, [SP, #8] 0x341906E4: F481 3180 EOR R1, R1, #0x010000 0x341906E8: 4308 ORRS R0, R1 0x341906EA: 2800 CMP R0, #0 0x341906EC: F000 8174 BEQ.W 46L45 ; 0x341909D8 0x341906F0: 9801 LDR R0, [SP, #4] 0x341906F2: 9902 LDR R1, [SP, #8] 0x341906F4: F481 3100 EOR R1, R1, #0x020000 0x341906F8: 4308 ORRS R0, R1 0x341906FA: 2800 CMP R0, #0 0x341906FC: F000 8173 BEQ.W 46L46 ; 0x341909E6 0x34190700: 9801 LDR R0, [SP, #4] 0x34190702: 9902 LDR R1, [SP, #8] 0x34190704: F481 2180 EOR R1, R1, #0x040000 0x34190708: 4308 ORRS R0, R1 0x3419070A: 2800 CMP R0, #0 0x3419070C: F000 8173 BEQ.W 46L47 ; 0x341909F6 0x34190710: 9801 LDR R0, [SP, #4] 0x34190712: 9902 LDR R1, [SP, #8] 0x34190714: F481 2100 EOR R1, R1, #0x080000 0x34190718: 4308 ORRS R0, R1 0x3419071A: 2800 CMP R0, #0 0x3419071C: F000 8173 BEQ.W 46L48 ; 0x34190A06 0x34190720: 9801 LDR R0, [SP, #4] 0x34190722: 9902 LDR R1, [SP, #8] 0x34190724: F481 1180 EOR R1, R1, #0x100000 0x34190728: 4308 ORRS R0, R1 0x3419072A: 2800 CMP R0, #0 0x3419072C: F000 8173 BEQ.W 46L49 ; 0x34190A16 0x34190730: 9801 LDR R0, [SP, #4] 0x34190732: 9902 LDR R1, [SP, #8] 0x34190734: F481 1100 EOR R1, R1, #0x200000 0x34190738: 4308 ORRS R0, R1 0x3419073A: 2800 CMP R0, #0 0x3419073C: F000 8173 BEQ.W 46L50 ; 0x34190A26 0x34190740: 9801 LDR R0, [SP, #4] 0x34190742: 9902 LDR R1, [SP, #8] 0x34190744: F481 0180 EOR R1, R1, #0x400000 0x34190748: 4308 ORRS R0, R1 0x3419074A: 2800 CMP R0, #0 0x3419074C: F000 8173 BEQ.W 46L51 ; 0x34190A36 0x34190750: 9801 LDR R0, [SP, #4] 0x34190752: 9902 LDR R1, [SP, #8] 0x34190754: F481 0100 EOR R1, R1, #0x800000 0x34190758: 4308 ORRS R0, R1 0x3419075A: 2800 CMP R0, #0 0x3419075C: F000 8172 BEQ.W 46L52 ; 0x34190A44 0x34190760: 9801 LDR R0, [SP, #4] 0x34190762: 9902 LDR R1, [SP, #8] 0x34190764: F081 7180 EOR R1, R1, #0x01000000 0x34190768: 4308 ORRS R0, R1 0x3419076A: 2800 CMP R0, #0 0x3419076C: F000 8172 BEQ.W 46L53 ; 0x34190A54 0x34190770: E178 B 46L54 ; 0x34190A64
.L1: 0x34190772: 2070 MOVS R0, #112 0x34190774: F000 F97A BL RCCEx_GetADCCLKFreq ; 0x34190A6C 0x34190778: 9003 STR R0, [SP, #12] 0x3419077A: E173 B 46L54 ; 0x34190A64
.L2: 0x3419077C: 2007 MOVS R0, #7 0x3419077E: F7F8 F93D BL RCCEx_GetADFCLKFreq ; 0x341889FC 0x34190782: 9003 STR R0, [SP, #12] 0x34190784: E16E B 46L54 ; 0x34190A64
.L3: 0x34190786: F000 FA4D BL RCCEx_GetCSICLKFreq ; 0x34190C24 0x3419078A: 9003 STR R0, [SP, #12] 0x3419078C: E16A B 46L54 ; 0x34190A64
.L4: 0x3419078E: 2007 MOVS R0, #7 0x34190790: F7F8 F9F6 BL RCCEx_GetCLKPCLKFreq ; 0x34188B80 0x34190794: 9003 STR R0, [SP, #12] 0x34190796: E165 B 46L54 ; 0x34190A64
.L5: 0x34190798: F44F 1040 MOV.W R0, #0x300000 0x3419079C: F7F8 FB60 BL RCCEx_GetDCMIPPCLKFreq ; 0x34188E60 0x341907A0: 9003 STR R0, [SP, #12] 0x341907A2: E15F B 46L54 ; 0x34190A64
.L6: 0x341907A4: F44F 5040 MOV.W R0, #0x3000 0x341907A8: F7F8 FBCC BL RCCEx_GetETH1CLKFreq ; 0x34188F44 0x341907AC: 9003 STR R0, [SP, #12] 0x341907AE: E159 B 46L54 ; 0x34190A64
.L7: 0x341907B0: 2003 MOVS R0, #3 0x341907B2: F000 FA7B BL RCCEx_GetETH1PTPCLKFreq ; 0x34190CAC 0x341907B6: 9003 STR R0, [SP, #12] 0x341907B8: E154 B 46L54 ; 0x34190A64
.L8: 0x341907BA: 2003 MOVS R0, #3 0x341907BC: F000 FAE6 BL RCCEx_GetFDCANCLKFreq ; 0x34190D8C 0x341907C0: 9003 STR R0, [SP, #12] 0x341907C2: E14F B 46L54 ; 0x34190A64
.L9: 0x341907C4: 2030 MOVS R0, #48 0x341907C6: F000 FB49 BL RCCEx_GetFMCCLKFreq ; 0x34190E5C 0x341907CA: 9003 STR R0, [SP, #12] 0x341907CC: E14A B 46L54 ; 0x34190A64
.L10: 0x341907CE: 200C MOVS R0, #12 0x341907D0: F2C0 7000 MOVT R0, #0x0700 0x341907D4: F000 FBE0 BL RCCEx_GetI2CCLKFreq ; 0x34190F98 0x341907D8: 9003 STR R0, [SP, #12] 0x341907DA: E143 B 46L54 ; 0x34190A64
.L11: 0x341907DC: F240 400C MOVW R0, #0x040C 0x341907E0: F2C0 7000 MOVT R0, #0x0700 0x341907E4: F000 FBD8 BL RCCEx_GetI2CCLKFreq ; 0x34190F98 0x341907E8: 9003 STR R0, [SP, #12] 0x341907EA: E13B B 46L54 ; 0x34190A64
.L12: 0x341907EC: F640 000C MOVW R0, #0x080C 0x341907F0: F2C0 7000 MOVT R0, #0x0700 0x341907F4: F000 FBD0 BL RCCEx_GetI2CCLKFreq ; 0x34190F98 0x341907F8: 9003 STR R0, [SP, #12] 0x341907FA: E133 B 46L54 ; 0x34190A64
.L13: 0x341907FC: F640 400C MOVW R0, #0x0C0C 0x34190800: F2C0 7000 MOVT R0, #0x0700 0x34190804: F000 FBC8 BL RCCEx_GetI2CCLKFreq ; 0x34190F98 0x34190808: 9003 STR R0, [SP, #12] 0x3419080A: E12B B 46L54 ; 0x34190A64
.L14: 0x3419080C: F241 000C MOVW R0, #0x100C 0x34190810: F2C0 7000 MOVT R0, #0x0700 0x34190814: F7F8 FC02 BL RCCEx_GetI3CCLKFreq ; 0x3418901C 0x34190818: 9003 STR R0, [SP, #12] 0x3419081A: E123 B 46L54 ; 0x34190A64
.L15: 0x3419081C: F241 400C MOVW R0, #0x140C 0x34190820: F2C0 7000 MOVT R0, #0x0700 0x34190824: F7F8 FBFA BL RCCEx_GetI3CCLKFreq ; 0x3418901C 0x34190828: 9003 STR R0, [SP, #12] 0x3419082A: E11B B 46L54 ; 0x34190A64
.L16: 0x3419082C: F640 002C MOVW R0, #0x082C 0x34190830: F2C0 7000 MOVT R0, #0x0700 0x34190834: F000 FD12 BL RCCEx_GetLPTIMCLKFreq ; 0x3419125C 0x34190838: 9003 STR R0, [SP, #12] 0x3419083A: E113 B 46L54 ; 0x34190A64
.L17: 0x3419083C: F640 402C MOVW R0, #0x0C2C 0x34190840: F2C0 7000 MOVT R0, #0x0700 0x34190844: F000 FD0A BL RCCEx_GetLPTIMCLKFreq ; 0x3419125C 0x34190848: 9003 STR R0, [SP, #12] 0x3419084A: E10B B 46L54 ; 0x34190A64
.L18: 0x3419084C: F241 002C MOVW R0, #0x102C 0x34190850: F2C0 7000 MOVT R0, #0x0700 0x34190854: F000 FD02 BL RCCEx_GetLPTIMCLKFreq ; 0x3419125C 0x34190858: 9003 STR R0, [SP, #12] 0x3419085A: E103 B 46L54 ; 0x34190A64
.L19: 0x3419085C: F241 402C MOVW R0, #0x142C 0x34190860: F2C0 7000 MOVT R0, #0x0700 0x34190864: F000 FCFA BL RCCEx_GetLPTIMCLKFreq ; 0x3419125C 0x34190868: 9003 STR R0, [SP, #12] 0x3419086A: E0FB B 46L54 ; 0x34190A64
.L20: 0x3419086C: F641 002C MOVW R0, #0x182C 0x34190870: F2C0 7000 MOVT R0, #0x0700 0x34190874: F000 FCF2 BL RCCEx_GetLPTIMCLKFreq ; 0x3419125C 0x34190878: 9003 STR R0, [SP, #12] 0x3419087A: E0F3 B 46L54 ; 0x34190A64
.L21: 0x3419087C: F44F 60E0 MOV.W R0, #0x0700 0x34190880: F7F8 FCCE BL RCCEx_GetLPUARTCLKFreq ; 0x34189220 0x34190884: 9003 STR R0, [SP, #12] 0x34190886: E0ED B 46L54 ; 0x34190A64
.L22: 0x34190888: F04F 7040 MOV.W R0, #0x03000000 0x3419088C: F7F8 FD96 BL RCCEx_GetLTDCCLKFreq ; 0x341893BC 0x34190890: 9003 STR R0, [SP, #12] 0x34190892: E0E7 B 46L54 ; 0x34190A64
.L23: 0x34190894: F44F 20E0 MOV.W R0, #0x070000 0x34190898: F7F8 FE02 BL RCCEx_GetMDFCLKFreq ; 0x341894A0 0x3419089C: 9003 STR R0, [SP, #12] 0x3419089E: E0E1 B 46L54 ; 0x34190A64
.L24: 0x341908A0: 2030 MOVS R0, #48 0x341908A2: F000 FE3D BL RCCEx_GetPSSICLKFreq ; 0x34191520 0x341908A6: 9003 STR R0, [SP, #12] 0x341908A8: E0DC B 46L54 ; 0x34190A64
.L25: 0x341908AA: F000 FEA7 BL RCCEx_GetRTCCLKFreq ; 0x341915FC 0x341908AE: 9003 STR R0, [SP, #12] 0x341908B0: E0D8 B 46L54 ; 0x34190A64
.L26: 0x341908B2: F241 4018 MOVW R0, #0x1418 0x341908B6: F2C0 7000 MOVT R0, #0x0700 0x341908BA: F000 FEDF BL RCCEx_GetSAICLKFreq ; 0x3419167C 0x341908BE: 9003 STR R0, [SP, #12] 0x341908C0: E0D0 B 46L54 ; 0x34190A64
.L27: 0x341908C2: F641 0018 MOVW R0, #0x1818 0x341908C6: F2C0 7000 MOVT R0, #0x0700 0x341908CA: F000 FED7 BL RCCEx_GetSAICLKFreq ; 0x3419167C 0x341908CE: 9003 STR R0, [SP, #12] 0x341908D0: E0C8 B 46L54 ; 0x34190A64
.L28: 0x341908D2: 201C MOVS R0, #28 0x341908D4: F2C0 3000 MOVT R0, #0x0300 0x341908D8: F7F8 FEBC BL RCCEx_GetSDMMCCLKFreq ; 0x34189654 0x341908DC: 9003 STR R0, [SP, #12] 0x341908DE: E0C1 B 46L54 ; 0x34190A64
.L29: 0x341908E0: F240 401C MOVW R0, #0x041C 0x341908E4: F2C0 3000 MOVT R0, #0x0300 0x341908E8: F7F8 FEB4 BL RCCEx_GetSDMMCCLKFreq ; 0x34189654 0x341908EC: 9003 STR R0, [SP, #12] 0x341908EE: E0B9 B 46L54 ; 0x34190A64
.L30: 0x341908F0: 2007 MOVS R0, #7 0x341908F2: F7F8 FF75 BL RCCEx_GetSPDIFRXCLKFreq ; 0x341897E0 0x341908F6: 9003 STR R0, [SP, #12] 0x341908F8: E0B4 B 46L54 ; 0x34190A64
.L31: 0x341908FA: F240 4020 MOVW R0, #0x0420 0x341908FE: F2C0 7000 MOVT R0, #0x0700 0x34190902: F7F9 F827 BL RCCEx_GetSPICLKFreq ; 0x34189954 0x34190906: 9003 STR R0, [SP, #12] 0x34190908: E0AC B 46L54 ; 0x34190A64
.L32: 0x3419090A: F640 0020 MOVW R0, #0x0820 0x3419090E: F2C0 7000 MOVT R0, #0x0700 0x34190912: F7F9 F81F BL RCCEx_GetSPICLKFreq ; 0x34189954 0x34190916: 9003 STR R0, [SP, #12] 0x34190918: E0A4 B 46L54 ; 0x34190A64
.L33: 0x3419091A: F640 4020 MOVW R0, #0x0C20 0x3419091E: F2C0 7000 MOVT R0, #0x0700 0x34190922: F7F9 F817 BL RCCEx_GetSPICLKFreq ; 0x34189954 0x34190926: 9003 STR R0, [SP, #12] 0x34190928: E09C B 46L54 ; 0x34190A64
.L34: 0x3419092A: F241 0020 MOVW R0, #0x1020 0x3419092E: F2C0 7000 MOVT R0, #0x0700 0x34190932: F7F9 F80F BL RCCEx_GetSPICLKFreq ; 0x34189954 0x34190936: 9003 STR R0, [SP, #12] 0x34190938: E094 B 46L54 ; 0x34190A64
.L35: 0x3419093A: F241 4020 MOVW R0, #0x1420 0x3419093E: F2C0 7000 MOVT R0, #0x0700 0x34190942: F7F9 F807 BL RCCEx_GetSPICLKFreq ; 0x34189954 0x34190946: 9003 STR R0, [SP, #12] 0x34190948: E08C B 46L54 ; 0x34190A64
.L36: 0x3419094A: F641 0020 MOVW R0, #0x1820 0x3419094E: F2C0 7000 MOVT R0, #0x0700 0x34190952: F7F8 FFFF BL RCCEx_GetSPICLKFreq ; 0x34189954 0x34190956: 9003 STR R0, [SP, #12] 0x34190958: E084 B 46L54 ; 0x34190A64
.L37: 0x3419095A: 2030 MOVS R0, #48 0x3419095C: F2C0 7000 MOVT R0, #0x0700 0x34190960: F7F9 FA4E BL RCCEx_GetUSARTCLKFreq ; 0x34189E00 0x34190964: 9003 STR R0, [SP, #12] 0x34190966: E07D B 46L54 ; 0x34190A64
.L38: 0x34190968: F240 4030 MOVW R0, #0x0430 0x3419096C: F2C0 7000 MOVT R0, #0x0700 0x34190970: F7F9 FA46 BL RCCEx_GetUSARTCLKFreq ; 0x34189E00 0x34190974: 9003 STR R0, [SP, #12] 0x34190976: E075 B 46L54 ; 0x34190A64
.L39: 0x34190978: F640 0030 MOVW R0, #0x0830 0x3419097C: F2C0 7000 MOVT R0, #0x0700 0x34190980: F7F9 FA3E BL RCCEx_GetUSARTCLKFreq ; 0x34189E00 0x34190984: 9003 STR R0, [SP, #12] 0x34190986: E06D B 46L54 ; 0x34190A64
.L40: 0x34190988: F640 4030 MOVW R0, #0x0C30 0x3419098C: F2C0 7000 MOVT R0, #0x0700 0x34190990: F7F9 FC00 BL RCCEx_GetUARTCLKFreq ; 0x3418A194 0x34190994: 9003 STR R0, [SP, #12] 0x34190996: E065 B 46L54 ; 0x34190A64
.L41: 0x34190998: F241 0030 MOVW R0, #0x1030 0x3419099C: F2C0 7000 MOVT R0, #0x0700 0x341909A0: F7F9 FBF8 BL RCCEx_GetUARTCLKFreq ; 0x3418A194 0x341909A4: 9003 STR R0, [SP, #12] 0x341909A6: E05D B 46L54 ; 0x34190A64
.L42: 0x341909A8: F241 4030 MOVW R0, #0x1430 0x341909AC: F2C0 7000 MOVT R0, #0x0700 0x341909B0: F7F9 FA26 BL RCCEx_GetUSARTCLKFreq ; 0x34189E00 0x341909B4: 9003 STR R0, [SP, #12] 0x341909B6: E055 B 46L54 ; 0x34190A64
.L43: 0x341909B8: F641 0030 MOVW R0, #0x1830 0x341909BC: F2C0 7000 MOVT R0, #0x0700 0x341909C0: F7F9 FBE8 BL RCCEx_GetUARTCLKFreq ; 0x3418A194 0x341909C4: 9003 STR R0, [SP, #12] 0x341909C6: E04D B 46L54 ; 0x34190A64
.L44: 0x341909C8: F641 4030 MOVW R0, #0x1C30 0x341909CC: F2C0 7000 MOVT R0, #0x0700 0x341909D0: F7F9 FBE0 BL RCCEx_GetUARTCLKFreq ; 0x3418A194 0x341909D4: 9003 STR R0, [SP, #12] 0x341909D6: E045 B 46L54 ; 0x34190A64
.L45: 0x341909D8: 2034 MOVS R0, #52 0x341909DA: F2C0 7000 MOVT R0, #0x0700 0x341909DE: F7F9 FBD9 BL RCCEx_GetUARTCLKFreq ; 0x3418A194 0x341909E2: 9003 STR R0, [SP, #12] 0x341909E4: E03E B 46L54 ; 0x34190A64
.L46: 0x341909E6: F240 4034 MOVW R0, #0x0434 0x341909EA: F2C0 7000 MOVT R0, #0x0700 0x341909EE: F7F9 FA07 BL RCCEx_GetUSARTCLKFreq ; 0x34189E00 0x341909F2: 9003 STR R0, [SP, #12] 0x341909F4: E036 B 46L54 ; 0x34190A64
.L47: 0x341909F6: F640 4014 MOVW R0, #0x0C14 0x341909FA: F2C0 3000 MOVT R0, #0x0300 0x341909FE: F7F9 FD93 BL RCCEx_GetOTGPHYCLKFreq ; 0x3418A528 0x34190A02: 9003 STR R0, [SP, #12] 0x34190A04: E02E B 46L54 ; 0x34190A64
.L48: 0x34190A06: F241 0014 MOVW R0, #0x1014 0x34190A0A: F2C0 1000 MOVT R0, #0x0100 0x34190A0E: F7F9 FE2D BL RCCEx_GetOTGPHYCKREFCLKFreq ; 0x3418A66C 0x34190A12: 9003 STR R0, [SP, #12] 0x34190A14: E026 B 46L54 ; 0x34190A64
.L49: 0x34190A16: F241 4014 MOVW R0, #0x1414 0x34190A1A: F2C0 3000 MOVT R0, #0x0300 0x34190A1E: F7F9 FD83 BL RCCEx_GetOTGPHYCLKFreq ; 0x3418A528 0x34190A22: 9003 STR R0, [SP, #12] 0x34190A24: E01E B 46L54 ; 0x34190A64
.L50: 0x34190A26: F641 0014 MOVW R0, #0x1814 0x34190A2A: F2C0 1000 MOVT R0, #0x0100 0x34190A2E: F7F9 FE1D BL RCCEx_GetOTGPHYCKREFCLKFreq ; 0x3418A66C 0x34190A32: 9003 STR R0, [SP, #12] 0x34190A34: E016 B 46L54 ; 0x34190A64
.L51: 0x34190A36: 2014 MOVS R0, #20 0x34190A38: F2C0 3000 MOVT R0, #0x0300 0x34190A3C: F7F9 FE60 BL RCCEx_GetXSPICLKFreq ; 0x3418A700 0x34190A40: 9003 STR R0, [SP, #12] 0x34190A42: E00F B 46L54 ; 0x34190A64
.L52: 0x34190A44: F240 4014 MOVW R0, #0x0414 0x34190A48: F2C0 3000 MOVT R0, #0x0300 0x34190A4C: F7F9 FE58 BL RCCEx_GetXSPICLKFreq ; 0x3418A700 0x34190A50: 9003 STR R0, [SP, #12] 0x34190A52: E007 B 46L54 ; 0x34190A64
.L53: 0x34190A54: F640 0014 MOVW R0, #0x0814 0x34190A58: F2C0 3000 MOVT R0, #0x0300 0x34190A5C: F7F9 FE50 BL RCCEx_GetXSPICLKFreq ; 0x3418A700 0x34190A60: 9003 STR R0, [SP, #12] 0x34190A62: E7FF B 46L54 ; 0x34190A64
.L54: 0x34190A64: 9803 LDR R0, [SP, #12] 0x34190A66: B006 ADD SP, SP, #24 0x34190A68: BD80 POP 123R7, PC}

Section .init.GPDMA1_Channel0_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel0_IRQHandler: 0x34190A6A: E7FE B GPDMA1_Channel0_IRQHandler ; 0x34190A6A

Section .text.RCCEx_GetADCCLKFreq from blto2_FSBL_lto.o, size=438, align=4


RCCEx_GetADCCLKFreq: 0x34190A6C: B580 PUSH 123R7, LR} 0x34190A6E: B088 SUB SP, SP, #32 0x34190A70: 9007 STR R0, [SP, #28] 0x34190A72: 2000 MOVS R0, #0 0x34190A74: 9006 STR R0, [SP, #24] 0x34190A76: 9807 LDR R0, [SP, #28] 0x34190A78: F7FF FC2E BL LL_RCC_GetADCClockSource ; 0x341902D8 0x34190A7C: 4601 MOV R1, R0 0x34190A7E: 9104 STR R1, [SP, #16] 0x34190A80: B1C8 CBZ R0, .L1 ; 0x34190AB6 0x34190A82: 9804 LDR R0, [SP, #16] 0x34190A84: 2810 CMP R0, #16 0x34190A86: D01C BEQ 46L2 ; 0x34190AC2 0x34190A88: 9804 LDR R0, [SP, #16] 0x34190A8A: 2820 CMP R0, #32 0x34190A8C: D01E BEQ 46L3 ; 0x34190ACC 0x34190A8E: 9804 LDR R0, [SP, #16] 0x34190A90: 2830 CMP R0, #48 0x34190A92: D058 BEQ 46L9 ; 0x34190B46 0x34190A94: 9804 LDR R0, [SP, #16] 0x34190A96: 2840 CMP R0, #64 0x34190A98: F000 809F BEQ.W 46L17 ; 0x34190BDA 0x34190A9C: 9804 LDR R0, [SP, #16] 0x34190A9E: 2850 CMP R0, #80 0x34190AA0: F000 808E BEQ.W 46L15 ; 0x34190BC0 0x34190AA4: 9804 LDR R0, [SP, #16] 0x34190AA6: 2860 CMP R0, #96 0x34190AA8: F000 80A0 BEQ.W 46L19 ; 0x34190BEC 0x34190AAC: 9804 LDR R0, [SP, #16] 0x34190AAE: 2870 CMP R0, #112 0x34190AB0: F000 80A2 BEQ.W 46L20 ; 0x34190BF8 0x34190AB4: E0AA B 46L21 ; 0x34190C0C
.L1: 0x34190AB6: F7FF FBA1 BL HAL_RCC_GetSysClockFreq ; 0x341901FC 0x34190ABA: F7F9 FF03 BL RCCEx_GetHCLKFreq ; 0x3418A8C4 0x34190ABE: 9006 STR R0, [SP, #24] 0x34190AC0: E0A4 B 46L21 ; 0x34190C0C
.L2: 0x34190AC2: 2007 MOVS R0, #7 0x34190AC4: F7F8 F85C BL RCCEx_GetCLKPCLKFreq ; 0x34188B80 0x34190AC8: 9006 STR R0, [SP, #24] 0x34190ACA: E09F B 46L21 ; 0x34190C0C
.L3: 0x34190ACC: F7FA F994 BL LL_RCC_IC7_IsEnabled ; 0x3418ADF8 0x34190AD0: B3C0 CBZ R0, .L8 ; 0x34190B44 0x34190AD2: F001 F853 BL LL_RCC_IC7_GetDivider ; 0x34191B7C 0x34190AD6: 9005 STR R0, [SP, #20] 0x34190AD8: F7FA F996 BL LL_RCC_IC7_GetSource ; 0x3418AE08 0x34190ADC: 4601 MOV R1, R0 0x34190ADE: 9103 STR R1, [SP, #12] 0x34190AE0: B160 CBZ R0, .L4 ; 0x34190AFC 0x34190AE2: 9803 LDR R0, [SP, #12] 0x34190AE4: F1B0 5F80 CMP.W R0, #0x10000000 0x34190AE8: D011 BEQ 46L5 ; 0x34190B0E 0x34190AEA: 9803 LDR R0, [SP, #12] 0x34190AEC: F1B0 5F00 CMP.W R0, #0x20000000 0x34190AF0: D016 BEQ 46L6 ; 0x34190B20 0x34190AF2: 9803 LDR R0, [SP, #12] 0x34190AF4: F1B0 5F40 CMP.W R0, #0x30000000 0x34190AF8: D01B BEQ 46L7 ; 0x34190B32 0x34190AFA: E023 B 46L8 ; 0x34190B44
.L4: 0x34190AFC: F000 FEFA BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F4 0x34190B00: 9006 STR R0, [SP, #24] 0x34190B02: 9806 LDR R0, [SP, #24] 0x34190B04: 9905 LDR R1, [SP, #20] 0x34190B06: FBB0 F0F1 UDIV R0, R0, R1 0x34190B0A: 9006 STR R0, [SP, #24] 0x34190B0C: E01A B 46L8 ; 0x34190B44
.L5: 0x34190B0E: F000 FF33 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191978 0x34190B12: 9006 STR R0, [SP, #24] 0x34190B14: 9806 LDR R0, [SP, #24] 0x34190B16: 9905 LDR R1, [SP, #20] 0x34190B18: FBB0 F0F1 UDIV R0, R0, R1 0x34190B1C: 9006 STR R0, [SP, #24] 0x34190B1E: E011 B 46L8 ; 0x34190B44
.L6: 0x34190B20: F000 FF6C BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919FC 0x34190B24: 9006 STR R0, [SP, #24] 0x34190B26: 9806 LDR R0, [SP, #24] 0x34190B28: 9905 LDR R1, [SP, #20] 0x34190B2A: FBB0 F0F1 UDIV R0, R0, R1 0x34190B2E: 9006 STR R0, [SP, #24] 0x34190B30: E008 B 46L8 ; 0x34190B44
.L7: 0x34190B32: F000 FFA5 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A80 0x34190B36: 9006 STR R0, [SP, #24] 0x34190B38: 9806 LDR R0, [SP, #24] 0x34190B3A: 9905 LDR R1, [SP, #20] 0x34190B3C: FBB0 F0F1 UDIV R0, R0, R1 0x34190B40: 9006 STR R0, [SP, #24] 0x34190B42: E7FF B 46L8 ; 0x34190B44
.L8: 0x34190B44: E062 B 46L21 ; 0x34190C0C
.L9: 0x34190B46: F7FA F93F BL LL_RCC_IC8_IsEnabled ; 0x3418ADC8 0x34190B4A: B3C0 CBZ R0, .L14 ; 0x34190BBE 0x34190B4C: F001 F80A BL LL_RCC_IC8_GetDivider ; 0x34191B64 0x34190B50: 9005 STR R0, [SP, #20] 0x34190B52: F7FA F941 BL LL_RCC_IC8_GetSource ; 0x3418ADD8 0x34190B56: 4601 MOV R1, R0 0x34190B58: 9102 STR R1, [SP, #8] 0x34190B5A: B160 CBZ R0, .L10 ; 0x34190B76 0x34190B5C: 9802 LDR R0, [SP, #8] 0x34190B5E: F1B0 5F80 CMP.W R0, #0x10000000 0x34190B62: D011 BEQ 46L11 ; 0x34190B88 0x34190B64: 9802 LDR R0, [SP, #8] 0x34190B66: F1B0 5F00 CMP.W R0, #0x20000000 0x34190B6A: D016 BEQ 46L12 ; 0x34190B9A 0x34190B6C: 9802 LDR R0, [SP, #8] 0x34190B6E: F1B0 5F40 CMP.W R0, #0x30000000 0x34190B72: D01B BEQ 46L13 ; 0x34190BAC 0x34190B74: E023 B 46L14 ; 0x34190BBE
.L10: 0x34190B76: F000 FEBD BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F4 0x34190B7A: 9006 STR R0, [SP, #24] 0x34190B7C: 9806 LDR R0, [SP, #24] 0x34190B7E: 9905 LDR R1, [SP, #20] 0x34190B80: FBB0 F0F1 UDIV R0, R0, R1 0x34190B84: 9006 STR R0, [SP, #24] 0x34190B86: E01A B 46L14 ; 0x34190BBE
.L11: 0x34190B88: F000 FEF6 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191978 0x34190B8C: 9006 STR R0, [SP, #24] 0x34190B8E: 9806 LDR R0, [SP, #24] 0x34190B90: 9905 LDR R1, [SP, #20] 0x34190B92: FBB0 F0F1 UDIV R0, R0, R1 0x34190B96: 9006 STR R0, [SP, #24] 0x34190B98: E011 B 46L14 ; 0x34190BBE
.L12: 0x34190B9A: F000 FF2F BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919FC 0x34190B9E: 9006 STR R0, [SP, #24] 0x34190BA0: 9806 LDR R0, [SP, #24] 0x34190BA2: 9905 LDR R1, [SP, #20] 0x34190BA4: FBB0 F0F1 UDIV R0, R0, R1 0x34190BA8: 9006 STR R0, [SP, #24] 0x34190BAA: E008 B 46L14 ; 0x34190BBE
.L13: 0x34190BAC: F000 FF68 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A80 0x34190BB0: 9006 STR R0, [SP, #24] 0x34190BB2: 9806 LDR R0, [SP, #24] 0x34190BB4: 9905 LDR R1, [SP, #20] 0x34190BB6: FBB0 F0F1 UDIV R0, R0, R1 0x34190BBA: 9006 STR R0, [SP, #24] 0x34190BBC: E7FF B 46L14 ; 0x34190BBE
.L14: 0x34190BBE: E025 B 46L21 ; 0x34190C0C
.L15: 0x34190BC0: F7F9 FF80 BL LL_RCC_HSI_IsReady.77 ; 0x3418AAC4 0x34190BC4: B140 CBZ R0, .L16 ; 0x34190BD8 0x34190BC6: F7F9 FF85 BL LL_RCC_HSI_GetDivider.78 ; 0x3418AAD4 0x34190BCA: 09C1 LSRS R1, R0, #7 0x34190BCC: F249 0000 MOVW R0, #0x9000 0x34190BD0: F2C0 30D0 MOVT R0, #0x03D0 0x34190BD4: 40C8 LSRS R0, R1 0x34190BD6: 9006 STR R0, [SP, #24]
.L16: 0x34190BD8: E018 B 46L21 ; 0x34190C0C
.L17: 0x34190BDA: F7F9 FF83 BL LL_RCC_MSI_IsReady.79 ; 0x3418AAE4 0x34190BDE: B120 CBZ R0, .L18 ; 0x34190BEA 0x34190BE0: F640 1000 MOVW R0, #0x0900 0x34190BE4: F2C0 003D MOVT R0, #61 0x34190BE8: 9006 STR R0, [SP, #24]
.L18: 0x34190BEA: E00F B 46L21 ; 0x34190C0C
.L19: 0x34190BEC: F248 0000 MOVW R0, #0x8000 0x34190BF0: F2C0 00BB MOVT R0, #187 0x34190BF4: 9006 STR R0, [SP, #24] 0x34190BF6: E009 B 46L21 ; 0x34190C0C
.L20: 0x34190BF8: F7FF FB00 BL HAL_RCC_GetSysClockFreq ; 0x341901FC 0x34190BFC: 9001 STR R0, [SP, #4] 0x34190BFE: F7F7 FEC5 BL LL_RCC_GetTIMPrescaler ; 0x3418898C 0x34190C02: 4601 MOV R1, R0 0x34190C04: 9801 LDR R0, [SP, #4] 0x34190C06: 40C8 LSRS R0, R1 0x34190C08: 9006 STR R0, [SP, #24] 0x34190C0A: E7FF B 46L21 ; 0x34190C0C
.L21: 0x34190C0C: 9806 LDR R0, [SP, #24] 0x34190C0E: 9000 STR R0, [SP, #0] 0x34190C10: F7F7 FE7C BL LL_RCC_GetADCPrescaler ; 0x3418890C 0x34190C14: 4601 MOV R1, R0 0x34190C16: 9800 LDR R0, [SP, #0] 0x34190C18: 3101 ADDS R1, #1 0x34190C1A: FBB0 F0F1 UDIV R0, R0, R1 0x34190C1E: B008 ADD SP, SP, #32 0x34190C20: BD80 POP 123R7, PC}

Section .init.GPDMA1_Channel1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel1_IRQHandler: 0x34190C22: E7FE B GPDMA1_Channel1_IRQHandler ; 0x34190C22

Section .text.RCCEx_GetCSICLKFreq from blto2_FSBL_lto.o, size=134, align=4


RCCEx_GetCSICLKFreq: 0x34190C24: B580 PUSH 123R7, LR} 0x34190C26: B084 SUB SP, SP, #16 0x34190C28: 2000 MOVS R0, #0 0x34190C2A: 9003 STR R0, [SP, #12] 0x34190C2C: F7FA F99A BL LL_RCC_IC18_IsEnabled ; 0x3418AF64 0x34190C30: B3C0 CBZ R0, .L5 ; 0x34190CA4 0x34190C32: F001 F80F BL LL_RCC_IC18_GetDivider ; 0x34191C54 0x34190C36: 9002 STR R0, [SP, #8] 0x34190C38: F7FA F99C BL LL_RCC_IC18_GetSource ; 0x3418AF74 0x34190C3C: 4601 MOV R1, R0 0x34190C3E: 9101 STR R1, [SP, #4] 0x34190C40: B160 CBZ R0, .L1 ; 0x34190C5C 0x34190C42: 9801 LDR R0, [SP, #4] 0x34190C44: F1B0 5F80 CMP.W R0, #0x10000000 0x34190C48: D011 BEQ 46L2 ; 0x34190C6E 0x34190C4A: 9801 LDR R0, [SP, #4] 0x34190C4C: F1B0 5F00 CMP.W R0, #0x20000000 0x34190C50: D016 BEQ 46L3 ; 0x34190C80 0x34190C52: 9801 LDR R0, [SP, #4] 0x34190C54: F1B0 5F40 CMP.W R0, #0x30000000 0x34190C58: D01B BEQ 46L4 ; 0x34190C92 0x34190C5A: E023 B 46L5 ; 0x34190CA4
.L1: 0x34190C5C: F000 FE4A BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F4 0x34190C60: 9003 STR R0, [SP, #12] 0x34190C62: 9803 LDR R0, [SP, #12] 0x34190C64: 9902 LDR R1, [SP, #8] 0x34190C66: FBB0 F0F1 UDIV R0, R0, R1 0x34190C6A: 9003 STR R0, [SP, #12] 0x34190C6C: E01A B 46L5 ; 0x34190CA4
.L2: 0x34190C6E: F000 FE83 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191978 0x34190C72: 9003 STR R0, [SP, #12] 0x34190C74: 9803 LDR R0, [SP, #12] 0x34190C76: 9902 LDR R1, [SP, #8] 0x34190C78: FBB0 F0F1 UDIV R0, R0, R1 0x34190C7C: 9003 STR R0, [SP, #12] 0x34190C7E: E011 B 46L5 ; 0x34190CA4
.L3: 0x34190C80: F000 FEBC BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919FC 0x34190C84: 9003 STR R0, [SP, #12] 0x34190C86: 9803 LDR R0, [SP, #12] 0x34190C88: 9902 LDR R1, [SP, #8] 0x34190C8A: FBB0 F0F1 UDIV R0, R0, R1 0x34190C8E: 9003 STR R0, [SP, #12] 0x34190C90: E008 B 46L5 ; 0x34190CA4
.L4: 0x34190C92: F000 FEF5 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A80 0x34190C96: 9003 STR R0, [SP, #12] 0x34190C98: 9803 LDR R0, [SP, #12] 0x34190C9A: 9902 LDR R1, [SP, #8] 0x34190C9C: FBB0 F0F1 UDIV R0, R0, R1 0x34190CA0: 9003 STR R0, [SP, #12] 0x34190CA2: E7FF B 46L5 ; 0x34190CA4
.L5: 0x34190CA4: 9803 LDR R0, [SP, #12] 0x34190CA6: B004 ADD SP, SP, #16 0x34190CA8: BD80 POP 123R7, PC}

Section .init.GPDMA1_Channel2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel2_IRQHandler: 0x34190CAA: E7FE B GPDMA1_Channel2_IRQHandler ; 0x34190CAA

Section .text.RCCEx_GetETH1PTPCLKFreq from blto2_FSBL_lto.o, size=222, align=4


RCCEx_GetETH1PTPCLKFreq: 0x34190CAC: B580 PUSH 123R7, LR} 0x34190CAE: B086 SUB SP, SP, #24 0x34190CB0: 9005 STR R0, [SP, #20] 0x34190CB2: 2000 MOVS R0, #0 0x34190CB4: 9004 STR R0, [SP, #16] 0x34190CB6: 9805 LDR R0, [SP, #20] 0x34190CB8: F7FF FB4A BL LL_RCC_GetETHPTPClockSource ; 0x34190350 0x34190CBC: 4601 MOV R1, R0 0x34190CBE: 9102 STR R1, [SP, #8] 0x34190CC0: 2803 CMP R0, #3 0x34190CC2: D855 BHI 46L7 ; 0x34190D70 0x34190CC4: 9902 LDR R1, [SP, #8] 0x34190CC6: E8DF F001 TBB 91PC, R1] 0x34190CCA: 02 DC.B 0x02 ; '\x02' 0x34190CCB: 08 DC.B 0x08 ; '\b' 0x34190CCC: 0D DC.B 0x0D ; '\r' 0x34190CCD: 4A DC.B 0x4A ; 'J' 0x34190CCE: F7FF FA95 BL HAL_RCC_GetSysClockFreq ; 0x341901FC 0x34190CD2: F7F9 FDF7 BL RCCEx_GetHCLKFreq ; 0x3418A8C4 0x34190CD6: 9004 STR R0, [SP, #16] 0x34190CD8: E04A B 46L7 ; 0x34190D70 0x34190CDA: 2007 MOVS R0, #7 0x34190CDC: F7F7 FF50 BL RCCEx_GetCLKPCLKFreq ; 0x34188B80 0x34190CE0: 9004 STR R0, [SP, #16] 0x34190CE2: E045 B 46L7 ; 0x34190D70 0x34190CE4: F7FA F906 BL LL_RCC_IC13_IsEnabled ; 0x3418AEF4 0x34190CE8: B3C0 CBZ R0, .L5 ; 0x34190D5C 0x34190CEA: F000 FF8F BL LL_RCC_IC13_GetDivider ; 0x34191C0C 0x34190CEE: 9003 STR R0, [SP, #12] 0x34190CF0: F7FA F908 BL LL_RCC_IC13_GetSource ; 0x3418AF04 0x34190CF4: 4601 MOV R1, R0 0x34190CF6: 9101 STR R1, [SP, #4] 0x34190CF8: B160 CBZ R0, .L1 ; 0x34190D14 0x34190CFA: 9801 LDR R0, [SP, #4] 0x34190CFC: F1B0 5F80 CMP.W R0, #0x10000000 0x34190D00: D011 BEQ 46L2 ; 0x34190D26 0x34190D02: 9801 LDR R0, [SP, #4] 0x34190D04: F1B0 5F00 CMP.W R0, #0x20000000 0x34190D08: D016 BEQ 46L3 ; 0x34190D38 0x34190D0A: 9801 LDR R0, [SP, #4] 0x34190D0C: F1B0 5F40 CMP.W R0, #0x30000000 0x34190D10: D01B BEQ 46L4 ; 0x34190D4A 0x34190D12: E023 B 46L5 ; 0x34190D5C
.L1: 0x34190D14: F000 FDEE BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F4 0x34190D18: 9004 STR R0, [SP, #16] 0x34190D1A: 9804 LDR R0, [SP, #16] 0x34190D1C: 9903 LDR R1, [SP, #12] 0x34190D1E: FBB0 F0F1 UDIV R0, R0, R1 0x34190D22: 9004 STR R0, [SP, #16] 0x34190D24: E01A B 46L5 ; 0x34190D5C
.L2: 0x34190D26: F000 FE27 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191978 0x34190D2A: 9004 STR R0, [SP, #16] 0x34190D2C: 9804 LDR R0, [SP, #16] 0x34190D2E: 9903 LDR R1, [SP, #12] 0x34190D30: FBB0 F0F1 UDIV R0, R0, R1 0x34190D34: 9004 STR R0, [SP, #16] 0x34190D36: E011 B 46L5 ; 0x34190D5C
.L3: 0x34190D38: F000 FE60 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919FC 0x34190D3C: 9004 STR R0, [SP, #16] 0x34190D3E: 9804 LDR R0, [SP, #16] 0x34190D40: 9903 LDR R1, [SP, #12] 0x34190D42: FBB0 F0F1 UDIV R0, R0, R1 0x34190D46: 9004 STR R0, [SP, #16] 0x34190D48: E008 B 46L5 ; 0x34190D5C
.L4: 0x34190D4A: F000 FE99 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A80 0x34190D4E: 9004 STR R0, [SP, #16] 0x34190D50: 9804 LDR R0, [SP, #16] 0x34190D52: 9903 LDR R1, [SP, #12] 0x34190D54: FBB0 F0F1 UDIV R0, R0, R1 0x34190D58: 9004 STR R0, [SP, #16] 0x34190D5A: E7FF B 46L5 ; 0x34190D5C
.L5: 0x34190D5C: E008 B 46L7 ; 0x34190D70 0x34190D5E: F7F9 FED1 BL LL_RCC_HSE_IsReady.80 ; 0x3418AB04 0x34190D62: B120 CBZ R0, .L6 ; 0x34190D6E 0x34190D64: F646 4000 MOVW R0, #0x6C00 0x34190D68: F2C0 20DC MOVT R0, #0x02DC 0x34190D6C: 9004 STR R0, [SP, #16]
.L6: 0x34190D6E: E7FF B 46L7 ; 0x34190D70
.L7: 0x34190D70: 9804 LDR R0, [SP, #16] 0x34190D72: 9000 STR R0, [SP, #0] 0x34190D74: F7F7 FDD2 BL LL_RCC_GetETH1PTPDivider ; 0x3418891C 0x34190D78: 4602 MOV R2, R0 0x34190D7A: 9800 LDR R0, [SP, #0] 0x34190D7C: 2101 MOVS R1, #1 0x34190D7E: EB01 1112 ADD.W R1, R1, R2, LSR #4 0x34190D82: FBB0 F0F1 UDIV R0, R0, R1 0x34190D86: B006 ADD SP, SP, #24 0x34190D88: BD80 POP 123R7, PC}

Section .init.GPDMA1_Channel3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel3_IRQHandler: 0x34190D8A: E7FE B GPDMA1_Channel3_IRQHandler ; 0x34190D8A

Section .text.RCCEx_GetFDCANCLKFreq from blto2_FSBL_lto.o, size=206, align=4


RCCEx_GetFDCANCLKFreq: 0x34190D8C: B580 PUSH 123R7, LR} 0x34190D8E: B086 SUB SP, SP, #24 0x34190D90: 9005 STR R0, [SP, #20] 0x34190D92: 2000 MOVS R0, #0 0x34190D94: 9004 STR R0, [SP, #16] 0x34190D96: 9805 LDR R0, [SP, #20] 0x34190D98: F7FF FAE6 BL LL_RCC_GetFDCANClockSource ; 0x34190368 0x34190D9C: 4601 MOV R1, R0 0x34190D9E: 9102 STR R1, [SP, #8] 0x34190DA0: 2803 CMP R0, #3 0x34190DA2: D857 BHI 46L7 ; 0x34190E54 0x34190DA4: 9902 LDR R1, [SP, #8] 0x34190DA6: E8DF F001 TBB 91PC, R1] 0x34190DAA: 02 DC.B 0x02 ; '\x02' 0x34190DAB: 0A DC.B 0x0A ; '\n' 0x34190DAC: 0F DC.B 0x0F ; '\x0F' 0x34190DAD: 4C DC.B 0x4C ; 'L' 0x34190DAE: F7FF FA25 BL HAL_RCC_GetSysClockFreq ; 0x341901FC 0x34190DB2: F7F9 FD87 BL RCCEx_GetHCLKFreq ; 0x3418A8C4 0x34190DB6: F7F9 FFAD BL RCCEx_GetPCLK1Freq ; 0x3418AD14 0x34190DBA: 9004 STR R0, [SP, #16] 0x34190DBC: E04A B 46L7 ; 0x34190E54 0x34190DBE: 2007 MOVS R0, #7 0x34190DC0: F7F7 FEDE BL RCCEx_GetCLKPCLKFreq ; 0x34188B80 0x34190DC4: 9004 STR R0, [SP, #16] 0x34190DC6: E045 B 46L7 ; 0x34190E54 0x34190DC8: F7FA F884 BL LL_RCC_IC19_IsEnabled ; 0x3418AED4 0x34190DCC: B3C0 CBZ R0, .L5 ; 0x34190E40 0x34190DCE: F000 FF11 BL LL_RCC_IC19_GetDivider ; 0x34191BF4 0x34190DD2: 9003 STR R0, [SP, #12] 0x34190DD4: F7FA F886 BL LL_RCC_IC19_GetSource ; 0x3418AEE4 0x34190DD8: 4601 MOV R1, R0 0x34190DDA: 9101 STR R1, [SP, #4] 0x34190DDC: B160 CBZ R0, .L1 ; 0x34190DF8 0x34190DDE: 9801 LDR R0, [SP, #4] 0x34190DE0: F1B0 5F80 CMP.W R0, #0x10000000 0x34190DE4: D011 BEQ 46L2 ; 0x34190E0A 0x34190DE6: 9801 LDR R0, [SP, #4] 0x34190DE8: F1B0 5F00 CMP.W R0, #0x20000000 0x34190DEC: D016 BEQ 46L3 ; 0x34190E1C 0x34190DEE: 9801 LDR R0, [SP, #4] 0x34190DF0: F1B0 5F40 CMP.W R0, #0x30000000 0x34190DF4: D01B BEQ 46L4 ; 0x34190E2E 0x34190DF6: E023 B 46L5 ; 0x34190E40
.L1: 0x34190DF8: F000 FD7C BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F4 0x34190DFC: 9004 STR R0, [SP, #16] 0x34190DFE: 9804 LDR R0, [SP, #16] 0x34190E00: 9903 LDR R1, [SP, #12] 0x34190E02: FBB0 F0F1 UDIV R0, R0, R1 0x34190E06: 9004 STR R0, [SP, #16] 0x34190E08: E01A B 46L5 ; 0x34190E40
.L2: 0x34190E0A: F000 FDB5 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191978 0x34190E0E: 9004 STR R0, [SP, #16] 0x34190E10: 9804 LDR R0, [SP, #16] 0x34190E12: 9903 LDR R1, [SP, #12] 0x34190E14: FBB0 F0F1 UDIV R0, R0, R1 0x34190E18: 9004 STR R0, [SP, #16] 0x34190E1A: E011 B 46L5 ; 0x34190E40
.L3: 0x34190E1C: F000 FDEE BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919FC 0x34190E20: 9004 STR R0, [SP, #16] 0x34190E22: 9804 LDR R0, [SP, #16] 0x34190E24: 9903 LDR R1, [SP, #12] 0x34190E26: FBB0 F0F1 UDIV R0, R0, R1 0x34190E2A: 9004 STR R0, [SP, #16] 0x34190E2C: E008 B 46L5 ; 0x34190E40
.L4: 0x34190E2E: F000 FE27 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A80 0x34190E32: 9004 STR R0, [SP, #16] 0x34190E34: 9804 LDR R0, [SP, #16] 0x34190E36: 9903 LDR R1, [SP, #12] 0x34190E38: FBB0 F0F1 UDIV R0, R0, R1 0x34190E3C: 9004 STR R0, [SP, #16] 0x34190E3E: E7FF B 46L5 ; 0x34190E40
.L5: 0x34190E40: E008 B 46L7 ; 0x34190E54 0x34190E42: F7F9 FE5F BL LL_RCC_HSE_IsReady.80 ; 0x3418AB04 0x34190E46: B120 CBZ R0, .L6 ; 0x34190E52 0x34190E48: F646 4000 MOVW R0, #0x6C00 0x34190E4C: F2C0 20DC MOVT R0, #0x02DC 0x34190E50: 9004 STR R0, [SP, #16]
.L6: 0x34190E52: E7FF B 46L7 ; 0x34190E54
.L7: 0x34190E54: 9804 LDR R0, [SP, #16] 0x34190E56: B006 ADD SP, SP, #24 0x34190E58: BD80 POP 123R7, PC}

Section .init.GPDMA1_Channel4_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel4_IRQHandler: 0x34190E5A: E7FE B GPDMA1_Channel4_IRQHandler ; 0x34190E5A

Section .text.RCCEx_GetFMCCLKFreq from blto2_FSBL_lto.o, size=314, align=4


RCCEx_GetFMCCLKFreq: 0x34190E5C: B580 PUSH 123R7, LR} 0x34190E5E: B086 SUB SP, SP, #24 0x34190E60: 9005 STR R0, [SP, #20] 0x34190E62: 2000 MOVS R0, #0 0x34190E64: 9004 STR R0, [SP, #16] 0x34190E66: 9805 LDR R0, [SP, #20] 0x34190E68: F7FF FA8A BL LL_RCC_GetFMCClockSource ; 0x34190380 0x34190E6C: 4601 MOV R1, R0 0x34190E6E: 9102 STR R1, [SP, #8] 0x34190E70: B148 CBZ R0, .L1 ; 0x34190E86 0x34190E72: 9802 LDR R0, [SP, #8] 0x34190E74: 2810 CMP R0, #16 0x34190E76: D00C BEQ 46L2 ; 0x34190E92 0x34190E78: 9802 LDR R0, [SP, #8] 0x34190E7A: 2820 CMP R0, #32 0x34190E7C: D00E BEQ 46L3 ; 0x34190E9C 0x34190E7E: 9802 LDR R0, [SP, #8] 0x34190E80: 2830 CMP R0, #48 0x34190E82: D048 BEQ 46L9 ; 0x34190F16 0x34190E84: E084 B 46L15 ; 0x34190F90
.L1: 0x34190E86: F7FF F9B9 BL HAL_RCC_GetSysClockFreq ; 0x341901FC 0x34190E8A: F7F9 FD1B BL RCCEx_GetHCLKFreq ; 0x3418A8C4 0x34190E8E: 9004 STR R0, [SP, #16] 0x34190E90: E07E B 46L15 ; 0x34190F90
.L2: 0x34190E92: 2007 MOVS R0, #7 0x34190E94: F7F7 FE74 BL RCCEx_GetCLKPCLKFreq ; 0x34188B80 0x34190E98: 9004 STR R0, [SP, #16] 0x34190E9A: E079 B 46L15 ; 0x34190F90
.L3: 0x34190E9C: F7F9 FD20 BL LL_RCC_IC3_IsEnabled ; 0x3418A8E0 0x34190EA0: B3C0 CBZ R0, .L8 ; 0x34190F14 0x34190EA2: F000 FD1B BL LL_RCC_IC3_GetDivider ; 0x341918DC 0x34190EA6: 9003 STR R0, [SP, #12] 0x34190EA8: F7F9 FD22 BL LL_RCC_IC3_GetSource ; 0x3418A8F0 0x34190EAC: 4601 MOV R1, R0 0x34190EAE: 9101 STR R1, [SP, #4] 0x34190EB0: B160 CBZ R0, .L4 ; 0x34190ECC 0x34190EB2: 9801 LDR R0, [SP, #4] 0x34190EB4: F1B0 5F80 CMP.W R0, #0x10000000 0x34190EB8: D011 BEQ 46L5 ; 0x34190EDE 0x34190EBA: 9801 LDR R0, [SP, #4] 0x34190EBC: F1B0 5F00 CMP.W R0, #0x20000000 0x34190EC0: D016 BEQ 46L6 ; 0x34190EF0 0x34190EC2: 9801 LDR R0, [SP, #4] 0x34190EC4: F1B0 5F40 CMP.W R0, #0x30000000 0x34190EC8: D01B BEQ 46L7 ; 0x34190F02 0x34190ECA: E023 B 46L8 ; 0x34190F14
.L4: 0x34190ECC: F000 FD12 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F4 0x34190ED0: 9004 STR R0, [SP, #16] 0x34190ED2: 9804 LDR R0, [SP, #16] 0x34190ED4: 9903 LDR R1, [SP, #12] 0x34190ED6: FBB0 F0F1 UDIV R0, R0, R1 0x34190EDA: 9004 STR R0, [SP, #16] 0x34190EDC: E01A B 46L8 ; 0x34190F14
.L5: 0x34190EDE: F000 FD4B BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191978 0x34190EE2: 9004 STR R0, [SP, #16] 0x34190EE4: 9804 LDR R0, [SP, #16] 0x34190EE6: 9903 LDR R1, [SP, #12] 0x34190EE8: FBB0 F0F1 UDIV R0, R0, R1 0x34190EEC: 9004 STR R0, [SP, #16] 0x34190EEE: E011 B 46L8 ; 0x34190F14
.L6: 0x34190EF0: F000 FD84 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919FC 0x34190EF4: 9004 STR R0, [SP, #16] 0x34190EF6: 9804 LDR R0, [SP, #16] 0x34190EF8: 9903 LDR R1, [SP, #12] 0x34190EFA: FBB0 F0F1 UDIV R0, R0, R1 0x34190EFE: 9004 STR R0, [SP, #16] 0x34190F00: E008 B 46L8 ; 0x34190F14
.L7: 0x34190F02: F000 FDBD BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A80 0x34190F06: 9004 STR R0, [SP, #16] 0x34190F08: 9804 LDR R0, [SP, #16] 0x34190F0A: 9903 LDR R1, [SP, #12] 0x34190F0C: FBB0 F0F1 UDIV R0, R0, R1 0x34190F10: 9004 STR R0, [SP, #16] 0x34190F12: E7FF B 46L8 ; 0x34190F14
.L8: 0x34190F14: E03C B 46L15 ; 0x34190F90
.L9: 0x34190F16: F7F9 FCF3 BL LL_RCC_IC4_IsEnabled ; 0x3418A900 0x34190F1A: B3C0 CBZ R0, .L14 ; 0x34190F8E 0x34190F1C: F000 FDF2 BL LL_RCC_IC4_GetDivider ; 0x34191B04 0x34190F20: 9003 STR R0, [SP, #12] 0x34190F22: F7F9 FCF5 BL LL_RCC_IC4_GetSource ; 0x3418A910 0x34190F26: 4601 MOV R1, R0 0x34190F28: 9100 STR R1, [SP, #0] 0x34190F2A: B160 CBZ R0, .L10 ; 0x34190F46 0x34190F2C: 9800 LDR R0, [SP, #0] 0x34190F2E: F1B0 5F80 CMP.W R0, #0x10000000 0x34190F32: D011 BEQ 46L11 ; 0x34190F58 0x34190F34: 9800 LDR R0, [SP, #0] 0x34190F36: F1B0 5F00 CMP.W R0, #0x20000000 0x34190F3A: D016 BEQ 46L12 ; 0x34190F6A 0x34190F3C: 9800 LDR R0, [SP, #0] 0x34190F3E: F1B0 5F40 CMP.W R0, #0x30000000 0x34190F42: D01B BEQ 46L13 ; 0x34190F7C 0x34190F44: E023 B 46L14 ; 0x34190F8E
.L10: 0x34190F46: F000 FCD5 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F4 0x34190F4A: 9004 STR R0, [SP, #16] 0x34190F4C: 9804 LDR R0, [SP, #16] 0x34190F4E: 9903 LDR R1, [SP, #12] 0x34190F50: FBB0 F0F1 UDIV R0, R0, R1 0x34190F54: 9004 STR R0, [SP, #16] 0x34190F56: E01A B 46L14 ; 0x34190F8E
.L11: 0x34190F58: F000 FD0E BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191978 0x34190F5C: 9004 STR R0, [SP, #16] 0x34190F5E: 9804 LDR R0, [SP, #16] 0x34190F60: 9903 LDR R1, [SP, #12] 0x34190F62: FBB0 F0F1 UDIV R0, R0, R1 0x34190F66: 9004 STR R0, [SP, #16] 0x34190F68: E011 B 46L14 ; 0x34190F8E
.L12: 0x34190F6A: F000 FD47 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919FC 0x34190F6E: 9004 STR R0, [SP, #16] 0x34190F70: 9804 LDR R0, [SP, #16] 0x34190F72: 9903 LDR R1, [SP, #12] 0x34190F74: FBB0 F0F1 UDIV R0, R0, R1 0x34190F78: 9004 STR R0, [SP, #16] 0x34190F7A: E008 B 46L14 ; 0x34190F8E
.L13: 0x34190F7C: F000 FD80 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A80 0x34190F80: 9004 STR R0, [SP, #16] 0x34190F82: 9804 LDR R0, [SP, #16] 0x34190F84: 9903 LDR R1, [SP, #12] 0x34190F86: FBB0 F0F1 UDIV R0, R0, R1 0x34190F8A: 9004 STR R0, [SP, #16] 0x34190F8C: E7FF B 46L14 ; 0x34190F8E
.L14: 0x34190F8E: E7FF B 46L15 ; 0x34190F90
.L15: 0x34190F90: 9804 LDR R0, [SP, #16] 0x34190F92: B006 ADD SP, SP, #24 0x34190F94: BD80 POP 123R7, PC}

Section .init.GPDMA1_Channel5_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel5_IRQHandler: 0x34190F96: E7FE B GPDMA1_Channel5_IRQHandler ; 0x34190F96

Section .text.RCCEx_GetI2CCLKFreq from blto2_FSBL_lto.o, size=706, align=4


RCCEx_GetI2CCLKFreq: 0x34190F98: B580 PUSH 123R7, LR} 0x34190F9A: B086 SUB SP, SP, #24 0x34190F9C: 9005 STR R0, [SP, #20] 0x34190F9E: 2000 MOVS R0, #0 0x34190FA0: 9004 STR R0, [SP, #16] 0x34190FA2: 9805 LDR R0, [SP, #20] 0x34190FA4: F7F7 FCC2 BL LL_RCC_GetI2CClockSource ; 0x3418892C 0x34190FA8: 4601 MOV R1, R0 0x34190FAA: 9102 STR R1, [SP, #8] 0x34190FAC: 210C MOVS R1, #12 0x34190FAE: F2C0 7100 MOVT R1, #0x0700 0x34190FB2: 4288 CMP R0, R1 0x34190FB4: F000 80B1 BEQ.W 46L1 ; 0x3419111A 0x34190FB8: 9802 LDR R0, [SP, #8] 0x34190FBA: F240 410C MOVW R1, #0x040C 0x34190FBE: F2C0 7100 MOVT R1, #0x0700 0x34190FC2: 4288 CMP R0, R1 0x34190FC4: F000 80A9 BEQ.W 46L1 ; 0x3419111A 0x34190FC8: 9802 LDR R0, [SP, #8] 0x34190FCA: F640 010C MOVW R1, #0x080C 0x34190FCE: F2C0 7100 MOVT R1, #0x0700 0x34190FD2: 4288 CMP R0, R1 0x34190FD4: F000 80A1 BEQ.W 46L1 ; 0x3419111A 0x34190FD8: 9802 LDR R0, [SP, #8] 0x34190FDA: F640 410C MOVW R1, #0x0C0C 0x34190FDE: F2C0 7100 MOVT R1, #0x0700 0x34190FE2: 4288 CMP R0, R1 0x34190FE4: F000 8099 BEQ.W 46L1 ; 0x3419111A 0x34190FE8: 9802 LDR R0, [SP, #8] 0x34190FEA: 210C MOVS R1, #12 0x34190FEC: F2C0 7101 MOVT R1, #0x0701 0x34190FF0: 4288 CMP R0, R1 0x34190FF2: F000 809A BEQ.W 46L2 ; 0x3419112A 0x34190FF6: 9802 LDR R0, [SP, #8] 0x34190FF8: F240 410C MOVW R1, #0x040C 0x34190FFC: F2C0 7101 MOVT R1, #0x0701 0x34191000: 4288 CMP R0, R1 0x34191002: F000 8092 BEQ.W 46L2 ; 0x3419112A 0x34191006: 9802 LDR R0, [SP, #8] 0x34191008: F640 010C MOVW R1, #0x080C 0x3419100C: F2C0 7101 MOVT R1, #0x0701 0x34191010: 4288 CMP R0, R1 0x34191012: F000 808A BEQ.W 46L2 ; 0x3419112A 0x34191016: 9802 LDR R0, [SP, #8] 0x34191018: F640 410C MOVW R1, #0x0C0C 0x3419101C: F2C0 7101 MOVT R1, #0x0701 0x34191020: 4288 CMP R0, R1 0x34191022: F000 8082 BEQ.W 46L2 ; 0x3419112A 0x34191026: 9802 LDR R0, [SP, #8] 0x34191028: 210C MOVS R1, #12 0x3419102A: F2C0 7102 MOVT R1, #0x0702 0x3419102E: 4288 CMP R0, R1 0x34191030: F000 8080 BEQ.W 46L3 ; 0x34191134 0x34191034: 9802 LDR R0, [SP, #8] 0x34191036: F240 410C MOVW R1, #0x040C 0x3419103A: F2C0 7102 MOVT R1, #0x0702 0x3419103E: 4288 CMP R0, R1 0x34191040: D078 BEQ 46L3 ; 0x34191134 0x34191042: 9802 LDR R0, [SP, #8] 0x34191044: F640 010C MOVW R1, #0x080C 0x34191048: F2C0 7102 MOVT R1, #0x0702 0x3419104C: 4288 CMP R0, R1 0x3419104E: D071 BEQ 46L3 ; 0x34191134 0x34191050: 9802 LDR R0, [SP, #8] 0x34191052: F640 410C MOVW R1, #0x0C0C 0x34191056: F2C0 7102 MOVT R1, #0x0702 0x3419105A: 4288 CMP R0, R1 0x3419105C: D06A BEQ 46L3 ; 0x34191134 0x3419105E: 9802 LDR R0, [SP, #8] 0x34191060: 210C MOVS R1, #12 0x34191062: F2C0 7103 MOVT R1, #0x0703 0x34191066: 4288 CMP R0, R1 0x34191068: F000 80A1 BEQ.W 46L9 ; 0x341911AE 0x3419106C: 9802 LDR R0, [SP, #8] 0x3419106E: F240 410C MOVW R1, #0x040C 0x34191072: F2C0 7103 MOVT R1, #0x0703 0x34191076: 4288 CMP R0, R1 0x34191078: F000 8099 BEQ.W 46L9 ; 0x341911AE 0x3419107C: 9802 LDR R0, [SP, #8] 0x3419107E: F640 010C MOVW R1, #0x080C 0x34191082: F2C0 7103 MOVT R1, #0x0703 0x34191086: 4288 CMP R0, R1 0x34191088: F000 8091 BEQ.W 46L9 ; 0x341911AE 0x3419108C: 9802 LDR R0, [SP, #8] 0x3419108E: F640 410C MOVW R1, #0x0C0C 0x34191092: F2C0 7103 MOVT R1, #0x0703 0x34191096: 4288 CMP R0, R1 0x34191098: F000 8089 BEQ.W 46L9 ; 0x341911AE 0x3419109C: 9802 LDR R0, [SP, #8] 0x3419109E: 210C MOVS R1, #12 0x341910A0: F2C0 7104 MOVT R1, #0x0704 0x341910A4: 4288 CMP R0, R1 0x341910A6: F000 80CC BEQ.W 46L17 ; 0x34191242 0x341910AA: 9802 LDR R0, [SP, #8] 0x341910AC: F240 410C MOVW R1, #0x040C 0x341910B0: F2C0 7104 MOVT R1, #0x0704 0x341910B4: 4288 CMP R0, R1 0x341910B6: F000 80C4 BEQ.W 46L17 ; 0x34191242 0x341910BA: 9802 LDR R0, [SP, #8] 0x341910BC: F640 010C MOVW R1, #0x080C 0x341910C0: F2C0 7104 MOVT R1, #0x0704 0x341910C4: 4288 CMP R0, R1 0x341910C6: F000 80BC BEQ.W 46L17 ; 0x34191242 0x341910CA: 9802 LDR R0, [SP, #8] 0x341910CC: F640 410C MOVW R1, #0x0C0C 0x341910D0: F2C0 7104 MOVT R1, #0x0704 0x341910D4: 4288 CMP R0, R1 0x341910D6: F000 80B4 BEQ.W 46L17 ; 0x34191242 0x341910DA: 9802 LDR R0, [SP, #8] 0x341910DC: 210C MOVS R1, #12 0x341910DE: F2C0 7105 MOVT R1, #0x0705 0x341910E2: 4288 CMP R0, R1 0x341910E4: F000 80A0 BEQ.W 46L15 ; 0x34191228 0x341910E8: 9802 LDR R0, [SP, #8] 0x341910EA: F240 410C MOVW R1, #0x040C 0x341910EE: F2C0 7105 MOVT R1, #0x0705 0x341910F2: 4288 CMP R0, R1 0x341910F4: F000 8098 BEQ.W 46L15 ; 0x34191228 0x341910F8: 9802 LDR R0, [SP, #8] 0x341910FA: F640 010C MOVW R1, #0x080C 0x341910FE: F2C0 7105 MOVT R1, #0x0705 0x34191102: 4288 CMP R0, R1 0x34191104: F000 8090 BEQ.W 46L15 ; 0x34191228 0x34191108: 9802 LDR R0, [SP, #8] 0x3419110A: F640 410C MOVW R1, #0x0C0C 0x3419110E: F2C0 7105 MOVT R1, #0x0705 0x34191112: 4288 CMP R0, R1 0x34191114: F000 8088 BEQ.W 46L15 ; 0x34191228 0x34191118: E09C B 46L19 ; 0x34191254
.L1: 0x3419111A: F7FF F86F BL HAL_RCC_GetSysClockFreq ; 0x341901FC 0x3419111E: F7F9 FBD1 BL RCCEx_GetHCLKFreq ; 0x3418A8C4 0x34191122: F7F9 FDF7 BL RCCEx_GetPCLK1Freq ; 0x3418AD14 0x34191126: 9004 STR R0, [SP, #16] 0x34191128: E094 B 46L19 ; 0x34191254
.L2: 0x3419112A: 2007 MOVS R0, #7 0x3419112C: F7F7 FD28 BL RCCEx_GetCLKPCLKFreq ; 0x34188B80 0x34191130: 9004 STR R0, [SP, #16] 0x34191132: E08F B 46L19 ; 0x34191254
.L3: 0x34191134: F7F9 FEBE BL LL_RCC_IC10_IsEnabled ; 0x3418AEB4 0x34191138: B3C0 CBZ R0, .L8 ; 0x341911AC 0x3419113A: F000 FD4F BL LL_RCC_IC10_GetDivider ; 0x34191BDC 0x3419113E: 9003 STR R0, [SP, #12] 0x34191140: F7F9 FEC0 BL LL_RCC_IC10_GetSource ; 0x3418AEC4 0x34191144: 4601 MOV R1, R0 0x34191146: 9101 STR R1, [SP, #4] 0x34191148: B160 CBZ R0, .L4 ; 0x34191164 0x3419114A: 9801 LDR R0, [SP, #4] 0x3419114C: F1B0 5F80 CMP.W R0, #0x10000000 0x34191150: D011 BEQ 46L5 ; 0x34191176 0x34191152: 9801 LDR R0, [SP, #4] 0x34191154: F1B0 5F00 CMP.W R0, #0x20000000 0x34191158: D016 BEQ 46L6 ; 0x34191188 0x3419115A: 9801 LDR R0, [SP, #4] 0x3419115C: F1B0 5F40 CMP.W R0, #0x30000000 0x34191160: D01B BEQ 46L7 ; 0x3419119A 0x34191162: E023 B 46L8 ; 0x341911AC
.L4: 0x34191164: F000 FBC6 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F4 0x34191168: 9004 STR R0, [SP, #16] 0x3419116A: 9804 LDR R0, [SP, #16] 0x3419116C: 9903 LDR R1, [SP, #12] 0x3419116E: FBB0 F0F1 UDIV R0, R0, R1 0x34191172: 9004 STR R0, [SP, #16] 0x34191174: E01A B 46L8 ; 0x341911AC
.L5: 0x34191176: F000 FBFF BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191978 0x3419117A: 9004 STR R0, [SP, #16] 0x3419117C: 9804 LDR R0, [SP, #16] 0x3419117E: 9903 LDR R1, [SP, #12] 0x34191180: FBB0 F0F1 UDIV R0, R0, R1 0x34191184: 9004 STR R0, [SP, #16] 0x34191186: E011 B 46L8 ; 0x341911AC
.L6: 0x34191188: F000 FC38 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919FC 0x3419118C: 9004 STR R0, [SP, #16] 0x3419118E: 9804 LDR R0, [SP, #16] 0x34191190: 9903 LDR R1, [SP, #12] 0x34191192: FBB0 F0F1 UDIV R0, R0, R1 0x34191196: 9004 STR R0, [SP, #16] 0x34191198: E008 B 46L8 ; 0x341911AC
.L7: 0x3419119A: F000 FC71 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A80 0x3419119E: 9004 STR R0, [SP, #16] 0x341911A0: 9804 LDR R0, [SP, #16] 0x341911A2: 9903 LDR R1, [SP, #12] 0x341911A4: FBB0 F0F1 UDIV R0, R0, R1 0x341911A8: 9004 STR R0, [SP, #16] 0x341911AA: E7FF B 46L8 ; 0x341911AC
.L8: 0x341911AC: E052 B 46L19 ; 0x34191254
.L9: 0x341911AE: F7F9 FD99 BL LL_RCC_IC15_IsEnabled ; 0x3418ACE4 0x341911B2: B3C0 CBZ R0, .L14 ; 0x34191226 0x341911B4: F000 FCB2 BL LL_RCC_IC15_GetDivider ; 0x34191B1C 0x341911B8: 9003 STR R0, [SP, #12] 0x341911BA: F7F9 FD9B BL LL_RCC_IC15_GetSource ; 0x3418ACF4 0x341911BE: 4601 MOV R1, R0 0x341911C0: 9100 STR R1, [SP, #0] 0x341911C2: B160 CBZ R0, .L10 ; 0x341911DE 0x341911C4: 9800 LDR R0, [SP, #0] 0x341911C6: F1B0 5F80 CMP.W R0, #0x10000000 0x341911CA: D011 BEQ 46L11 ; 0x341911F0 0x341911CC: 9800 LDR R0, [SP, #0] 0x341911CE: F1B0 5F00 CMP.W R0, #0x20000000 0x341911D2: D016 BEQ 46L12 ; 0x34191202 0x341911D4: 9800 LDR R0, [SP, #0] 0x341911D6: F1B0 5F40 CMP.W R0, #0x30000000 0x341911DA: D01B BEQ 46L13 ; 0x34191214 0x341911DC: E023 B 46L14 ; 0x34191226
.L10: 0x341911DE: F000 FB89 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F4 0x341911E2: 9004 STR R0, [SP, #16] 0x341911E4: 9804 LDR R0, [SP, #16] 0x341911E6: 9903 LDR R1, [SP, #12] 0x341911E8: FBB0 F0F1 UDIV R0, R0, R1 0x341911EC: 9004 STR R0, [SP, #16] 0x341911EE: E01A B 46L14 ; 0x34191226
.L11: 0x341911F0: F000 FBC2 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191978 0x341911F4: 9004 STR R0, [SP, #16] 0x341911F6: 9804 LDR R0, [SP, #16] 0x341911F8: 9903 LDR R1, [SP, #12] 0x341911FA: FBB0 F0F1 UDIV R0, R0, R1 0x341911FE: 9004 STR R0, [SP, #16] 0x34191200: E011 B 46L14 ; 0x34191226
.L12: 0x34191202: F000 FBFB BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919FC 0x34191206: 9004 STR R0, [SP, #16] 0x34191208: 9804 LDR R0, [SP, #16] 0x3419120A: 9903 LDR R1, [SP, #12] 0x3419120C: FBB0 F0F1 UDIV R0, R0, R1 0x34191210: 9004 STR R0, [SP, #16] 0x34191212: E008 B 46L14 ; 0x34191226
.L13: 0x34191214: F000 FC34 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A80 0x34191218: 9004 STR R0, [SP, #16] 0x3419121A: 9804 LDR R0, [SP, #16] 0x3419121C: 9903 LDR R1, [SP, #12] 0x3419121E: FBB0 F0F1 UDIV R0, R0, R1 0x34191222: 9004 STR R0, [SP, #16] 0x34191224: E7FF B 46L14 ; 0x34191226
.L14: 0x34191226: E015 B 46L19 ; 0x34191254
.L15: 0x34191228: F7F9 FC4C BL LL_RCC_HSI_IsReady.77 ; 0x3418AAC4 0x3419122C: B140 CBZ R0, .L16 ; 0x34191240 0x3419122E: F7F9 FC51 BL LL_RCC_HSI_GetDivider.78 ; 0x3418AAD4 0x34191232: 09C1 LSRS R1, R0, #7 0x34191234: F249 0000 MOVW R0, #0x9000 0x34191238: F2C0 30D0 MOVT R0, #0x03D0 0x3419123C: 40C8 LSRS R0, R1 0x3419123E: 9004 STR R0, [SP, #16]
.L16: 0x34191240: E008 B 46L19 ; 0x34191254
.L17: 0x34191242: F7F9 FC4F BL LL_RCC_MSI_IsReady.79 ; 0x3418AAE4 0x34191246: B120 CBZ R0, .L18 ; 0x34191252 0x34191248: F640 1000 MOVW R0, #0x0900 0x3419124C: F2C0 003D MOVT R0, #61 0x34191250: 9004 STR R0, [SP, #16]
.L18: 0x34191252: E7FF B 46L19 ; 0x34191254
.L19: 0x34191254: 9804 LDR R0, [SP, #16] 0x34191256: B006 ADD SP, SP, #24 0x34191258: BD80 POP 123R7, PC}

Section .init.GPDMA1_Channel6_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel6_IRQHandler: 0x3419125A: E7FE B GPDMA1_Channel6_IRQHandler ; 0x3419125A

Section .text.RCCEx_GetLPTIMCLKFreq from blto2_FSBL_lto.o, size=706, align=4


RCCEx_GetLPTIMCLKFreq: 0x3419125C: B580 PUSH 123R7, LR} 0x3419125E: B086 SUB SP, SP, #24 0x34191260: 9005 STR R0, [SP, #20] 0x34191262: 2000 MOVS R0, #0 0x34191264: 9004 STR R0, [SP, #16] 0x34191266: 9805 LDR R0, [SP, #20] 0x34191268: F7F7 FB70 BL LL_RCC_GetLPTIMClockSource ; 0x3418894C 0x3419126C: 4601 MOV R1, R0 0x3419126E: 9102 STR R1, [SP, #8] 0x34191270: F640 012C MOVW R1, #0x082C 0x34191274: F2C0 7100 MOVT R1, #0x0700 0x34191278: 4288 CMP R0, R1 0x3419127A: F000 80E3 BEQ.W 46L1 ; 0x34191444 0x3419127E: 9802 LDR R0, [SP, #8] 0x34191280: F640 412C MOVW R1, #0x0C2C 0x34191284: F2C0 7100 MOVT R1, #0x0700 0x34191288: 4288 CMP R0, R1 0x3419128A: F000 80E3 BEQ.W 46L2 ; 0x34191454 0x3419128E: 9802 LDR R0, [SP, #8] 0x34191290: F241 012C MOVW R1, #0x102C 0x34191294: F2C0 7100 MOVT R1, #0x0700 0x34191298: 4288 CMP R0, R1 0x3419129A: F000 80DB BEQ.W 46L2 ; 0x34191454 0x3419129E: 9802 LDR R0, [SP, #8] 0x341912A0: F241 412C MOVW R1, #0x142C 0x341912A4: F2C0 7100 MOVT R1, #0x0700 0x341912A8: 4288 CMP R0, R1 0x341912AA: F000 80D3 BEQ.W 46L2 ; 0x34191454 0x341912AE: 9802 LDR R0, [SP, #8] 0x341912B0: F641 012C MOVW R1, #0x182C 0x341912B4: F2C0 7100 MOVT R1, #0x0700 0x341912B8: 4288 CMP R0, R1 0x341912BA: F000 80CB BEQ.W 46L2 ; 0x34191454 0x341912BE: 9802 LDR R0, [SP, #8] 0x341912C0: F640 012C MOVW R1, #0x082C 0x341912C4: F2C0 7101 MOVT R1, #0x0701 0x341912C8: 4288 CMP R0, R1 0x341912CA: F000 80CB BEQ.W 46L3 ; 0x34191464 0x341912CE: 9802 LDR R0, [SP, #8] 0x341912D0: F640 412C MOVW R1, #0x0C2C 0x341912D4: F2C0 7101 MOVT R1, #0x0701 0x341912D8: 4288 CMP R0, R1 0x341912DA: F000 80C3 BEQ.W 46L3 ; 0x34191464 0x341912DE: 9802 LDR R0, [SP, #8] 0x341912E0: F241 012C MOVW R1, #0x102C 0x341912E4: F2C0 7101 MOVT R1, #0x0701 0x341912E8: 4288 CMP R0, R1 0x341912EA: F000 80BB BEQ.W 46L3 ; 0x34191464 0x341912EE: 9802 LDR R0, [SP, #8] 0x341912F0: F241 412C MOVW R1, #0x142C 0x341912F4: F2C0 7101 MOVT R1, #0x0701 0x341912F8: 4288 CMP R0, R1 0x341912FA: F000 80B3 BEQ.W 46L3 ; 0x34191464 0x341912FE: 9802 LDR R0, [SP, #8] 0x34191300: F641 012C MOVW R1, #0x182C 0x34191304: F2C0 7101 MOVT R1, #0x0701 0x34191308: 4288 CMP R0, R1 0x3419130A: F000 80AB BEQ.W 46L3 ; 0x34191464 0x3419130E: 9802 LDR R0, [SP, #8] 0x34191310: F640 012C MOVW R1, #0x082C 0x34191314: F2C0 7102 MOVT R1, #0x0702 0x34191318: 4288 CMP R0, R1 0x3419131A: F000 80A8 BEQ.W 46L4 ; 0x3419146E 0x3419131E: 9802 LDR R0, [SP, #8] 0x34191320: F640 412C MOVW R1, #0x0C2C 0x34191324: F2C0 7102 MOVT R1, #0x0702 0x34191328: 4288 CMP R0, R1 0x3419132A: F000 80A0 BEQ.W 46L4 ; 0x3419146E 0x3419132E: 9802 LDR R0, [SP, #8] 0x34191330: F241 012C MOVW R1, #0x102C 0x34191334: F2C0 7102 MOVT R1, #0x0702 0x34191338: 4288 CMP R0, R1 0x3419133A: F000 8098 BEQ.W 46L4 ; 0x3419146E 0x3419133E: 9802 LDR R0, [SP, #8] 0x34191340: F241 412C MOVW R1, #0x142C 0x34191344: F2C0 7102 MOVT R1, #0x0702 0x34191348: 4288 CMP R0, R1 0x3419134A: F000 8090 BEQ.W 46L4 ; 0x3419146E 0x3419134E: 9802 LDR R0, [SP, #8] 0x34191350: F641 012C MOVW R1, #0x182C 0x34191354: F2C0 7102 MOVT R1, #0x0702 0x34191358: 4288 CMP R0, R1 0x3419135A: F000 8088 BEQ.W 46L4 ; 0x3419146E 0x3419135E: 9802 LDR R0, [SP, #8] 0x34191360: F640 012C MOVW R1, #0x082C 0x34191364: F2C0 7103 MOVT R1, #0x0703 0x34191368: 4288 CMP R0, R1 0x3419136A: F000 80BD BEQ.W 46L10 ; 0x341914E8 0x3419136E: 9802 LDR R0, [SP, #8] 0x34191370: F640 412C MOVW R1, #0x0C2C 0x34191374: F2C0 7103 MOVT R1, #0x0703 0x34191378: 4288 CMP R0, R1 0x3419137A: F000 80B5 BEQ.W 46L10 ; 0x341914E8 0x3419137E: 9802 LDR R0, [SP, #8] 0x34191380: F241 012C MOVW R1, #0x102C 0x34191384: F2C0 7103 MOVT R1, #0x0703 0x34191388: 4288 CMP R0, R1 0x3419138A: F000 80AD BEQ.W 46L10 ; 0x341914E8 0x3419138E: 9802 LDR R0, [SP, #8] 0x34191390: F241 412C MOVW R1, #0x142C 0x34191394: F2C0 7103 MOVT R1, #0x0703 0x34191398: 4288 CMP R0, R1 0x3419139A: F000 80A5 BEQ.W 46L10 ; 0x341914E8 0x3419139E: 9802 LDR R0, [SP, #8] 0x341913A0: F641 012C MOVW R1, #0x182C 0x341913A4: F2C0 7103 MOVT R1, #0x0703 0x341913A8: 4288 CMP R0, R1 0x341913AA: F000 809D BEQ.W 46L10 ; 0x341914E8 0x341913AE: 9802 LDR R0, [SP, #8] 0x341913B0: F640 012C MOVW R1, #0x082C 0x341913B4: F2C0 7104 MOVT R1, #0x0704 0x341913B8: 4288 CMP R0, R1 0x341913BA: F000 809C BEQ.W 46L12 ; 0x341914F6 0x341913BE: 9802 LDR R0, [SP, #8] 0x341913C0: F640 412C MOVW R1, #0x0C2C 0x341913C4: F2C0 7104 MOVT R1, #0x0704 0x341913C8: 4288 CMP R0, R1 0x341913CA: F000 8094 BEQ.W 46L12 ; 0x341914F6 0x341913CE: 9802 LDR R0, [SP, #8] 0x341913D0: F241 012C MOVW R1, #0x102C 0x341913D4: F2C0 7104 MOVT R1, #0x0704 0x341913D8: 4288 CMP R0, R1 0x341913DA: F000 808C BEQ.W 46L12 ; 0x341914F6 0x341913DE: 9802 LDR R0, [SP, #8] 0x341913E0: F241 412C MOVW R1, #0x142C 0x341913E4: F2C0 7104 MOVT R1, #0x0704 0x341913E8: 4288 CMP R0, R1 0x341913EA: F000 8084 BEQ.W 46L12 ; 0x341914F6 0x341913EE: 9802 LDR R0, [SP, #8] 0x341913F0: F641 012C MOVW R1, #0x182C 0x341913F4: F2C0 7104 MOVT R1, #0x0704 0x341913F8: 4288 CMP R0, R1 0x341913FA: D07C BEQ 46L12 ; 0x341914F6 0x341913FC: 9802 LDR R0, [SP, #8] 0x341913FE: F640 012C MOVW R1, #0x082C 0x34191402: F2C0 7105 MOVT R1, #0x0705 0x34191406: 4288 CMP R0, R1 0x34191408: D07C BEQ 46L14 ; 0x34191504 0x3419140A: 9802 LDR R0, [SP, #8] 0x3419140C: F640 412C MOVW R1, #0x0C2C 0x34191410: F2C0 7105 MOVT R1, #0x0705 0x34191414: 4288 CMP R0, R1 0x34191416: D075 BEQ 46L14 ; 0x34191504 0x34191418: 9802 LDR R0, [SP, #8] 0x3419141A: F241 012C MOVW R1, #0x102C 0x3419141E: F2C0 7105 MOVT R1, #0x0705 0x34191422: 4288 CMP R0, R1 0x34191424: D06E BEQ 46L14 ; 0x34191504 0x34191426: 9802 LDR R0, [SP, #8] 0x34191428: F241 412C MOVW R1, #0x142C 0x3419142C: F2C0 7105 MOVT R1, #0x0705 0x34191430: 4288 CMP R0, R1 0x34191432: D067 BEQ 46L14 ; 0x34191504 0x34191434: 9802 LDR R0, [SP, #8] 0x34191436: F641 012C MOVW R1, #0x182C 0x3419143A: F2C0 7105 MOVT R1, #0x0705 0x3419143E: 4288 CMP R0, R1 0x34191440: D060 BEQ 46L14 ; 0x34191504 0x34191442: E069 B 46L15 ; 0x34191518
.L1: 0x34191444: F7FE FEDA BL HAL_RCC_GetSysClockFreq ; 0x341901FC 0x34191448: F7F9 FA3C BL RCCEx_GetHCLKFreq ; 0x3418A8C4 0x3419144C: F7F9 FC62 BL RCCEx_GetPCLK1Freq ; 0x3418AD14 0x34191450: 9004 STR R0, [SP, #16] 0x34191452: E061 B 46L15 ; 0x34191518
.L2: 0x34191454: F7FE FED2 BL HAL_RCC_GetSysClockFreq ; 0x341901FC 0x34191458: F7F9 FA34 BL RCCEx_GetHCLKFreq ; 0x3418A8C4 0x3419145C: F7F9 FCA6 BL RCCEx_GetPCLK4Freq ; 0x3418ADAC 0x34191460: 9004 STR R0, [SP, #16] 0x34191462: E059 B 46L15 ; 0x34191518
.L3: 0x34191464: 2007 MOVS R0, #7 0x34191466: F7F7 FB8B BL RCCEx_GetCLKPCLKFreq ; 0x34188B80 0x3419146A: 9004 STR R0, [SP, #16] 0x3419146C: E054 B 46L15 ; 0x34191518
.L4: 0x3419146E: F7F9 FC39 BL LL_RCC_IC15_IsEnabled ; 0x3418ACE4 0x34191472: B3C0 CBZ R0, .L9 ; 0x341914E6 0x34191474: F000 FB52 BL LL_RCC_IC15_GetDivider ; 0x34191B1C 0x34191478: 9003 STR R0, [SP, #12] 0x3419147A: F7F9 FC3B BL LL_RCC_IC15_GetSource ; 0x3418ACF4 0x3419147E: 4601 MOV R1, R0 0x34191480: 9101 STR R1, [SP, #4] 0x34191482: B160 CBZ R0, .L5 ; 0x3419149E 0x34191484: 9801 LDR R0, [SP, #4] 0x34191486: F1B0 5F80 CMP.W R0, #0x10000000 0x3419148A: D011 BEQ 46L6 ; 0x341914B0 0x3419148C: 9801 LDR R0, [SP, #4] 0x3419148E: F1B0 5F00 CMP.W R0, #0x20000000 0x34191492: D016 BEQ 46L7 ; 0x341914C2 0x34191494: 9801 LDR R0, [SP, #4] 0x34191496: F1B0 5F40 CMP.W R0, #0x30000000 0x3419149A: D01B BEQ 46L8 ; 0x341914D4 0x3419149C: E023 B 46L9 ; 0x341914E6
.L5: 0x3419149E: F000 FA29 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F4 0x341914A2: 9004 STR R0, [SP, #16] 0x341914A4: 9804 LDR R0, [SP, #16] 0x341914A6: 9903 LDR R1, [SP, #12] 0x341914A8: FBB0 F0F1 UDIV R0, R0, R1 0x341914AC: 9004 STR R0, [SP, #16] 0x341914AE: E01A B 46L9 ; 0x341914E6
.L6: 0x341914B0: F000 FA62 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191978 0x341914B4: 9004 STR R0, [SP, #16] 0x341914B6: 9804 LDR R0, [SP, #16] 0x341914B8: 9903 LDR R1, [SP, #12] 0x341914BA: FBB0 F0F1 UDIV R0, R0, R1 0x341914BE: 9004 STR R0, [SP, #16] 0x341914C0: E011 B 46L9 ; 0x341914E6
.L7: 0x341914C2: F000 FA9B BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919FC 0x341914C6: 9004 STR R0, [SP, #16] 0x341914C8: 9804 LDR R0, [SP, #16] 0x341914CA: 9903 LDR R1, [SP, #12] 0x341914CC: FBB0 F0F1 UDIV R0, R0, R1 0x341914D0: 9004 STR R0, [SP, #16] 0x341914D2: E008 B 46L9 ; 0x341914E6
.L8: 0x341914D4: F000 FAD4 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A80 0x341914D8: 9004 STR R0, [SP, #16] 0x341914DA: 9804 LDR R0, [SP, #16] 0x341914DC: 9903 LDR R1, [SP, #12] 0x341914DE: FBB0 F0F1 UDIV R0, R0, R1 0x341914E2: 9004 STR R0, [SP, #16] 0x341914E4: E7FF B 46L9 ; 0x341914E6
.L9: 0x341914E6: E017 B 46L15 ; 0x34191518
.L10: 0x341914E8: F7F7 F866 BL LL_RCC_LSE_IsReady.59 ; 0x341885B8 0x341914EC: B110 CBZ R0, .L11 ; 0x341914F4 0x341914EE: F44F 4000 MOV.W R0, #0x8000 0x341914F2: 9004 STR R0, [SP, #16]
.L11: 0x341914F4: E010 B 46L15 ; 0x34191518
.L12: 0x341914F6: F7F9 FC9F BL LL_RCC_LSI_IsReady.94 ; 0x3418AE38 0x341914FA: B110 CBZ R0, .L13 ; 0x34191502 0x341914FC: F44F 40FA MOV.W R0, #0x7D00 0x34191500: 9004 STR R0, [SP, #16]
.L13: 0x34191502: E009 B 46L15 ; 0x34191518
.L14: 0x34191504: F7FE FE7A BL HAL_RCC_GetSysClockFreq ; 0x341901FC 0x34191508: 9000 STR R0, [SP, #0] 0x3419150A: F7F7 FA3F BL LL_RCC_GetTIMPrescaler ; 0x3418898C 0x3419150E: 4601 MOV R1, R0 0x34191510: 9800 LDR R0, [SP, #0] 0x34191512: 40C8 LSRS R0, R1 0x34191514: 9004 STR R0, [SP, #16] 0x34191516: E7FF B 46L15 ; 0x34191518
.L15: 0x34191518: 9804 LDR R0, [SP, #16] 0x3419151A: B006 ADD SP, SP, #24 0x3419151C: BD80 POP 123R7, PC}

Section .init.GPDMA1_Channel7_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel7_IRQHandler: 0x3419151E: E7FE B GPDMA1_Channel7_IRQHandler ; 0x3419151E

Section .text.RCCEx_GetPSSICLKFreq from blto2_FSBL_lto.o, size=218, align=4


RCCEx_GetPSSICLKFreq: 0x34191520: B580 PUSH 123R7, LR} 0x34191522: B086 SUB SP, SP, #24 0x34191524: 9005 STR R0, [SP, #20] 0x34191526: 2000 MOVS R0, #0 0x34191528: 9004 STR R0, [SP, #16] 0x3419152A: 9805 LDR R0, [SP, #20] 0x3419152C: F7FE FF58 BL LL_RCC_GetPSSIClockSource ; 0x341903E0 0x34191530: 4601 MOV R1, R0 0x34191532: 9102 STR R1, [SP, #8] 0x34191534: B148 CBZ R0, .L1 ; 0x3419154A 0x34191536: 9802 LDR R0, [SP, #8] 0x34191538: 2810 CMP R0, #16 0x3419153A: D00C BEQ 46L2 ; 0x34191556 0x3419153C: 9802 LDR R0, [SP, #8] 0x3419153E: 2820 CMP R0, #32 0x34191540: D00E BEQ 46L3 ; 0x34191560 0x34191542: 9802 LDR R0, [SP, #8] 0x34191544: 2830 CMP R0, #48 0x34191546: D048 BEQ 46L9 ; 0x341915DA 0x34191548: E054 B 46L11 ; 0x341915F4
.L1: 0x3419154A: F7FE FE57 BL HAL_RCC_GetSysClockFreq ; 0x341901FC 0x3419154E: F7F9 F9B9 BL RCCEx_GetHCLKFreq ; 0x3418A8C4 0x34191552: 9004 STR R0, [SP, #16] 0x34191554: E04E B 46L11 ; 0x341915F4
.L2: 0x34191556: 2007 MOVS R0, #7 0x34191558: F7F7 FB12 BL RCCEx_GetCLKPCLKFreq ; 0x34188B80 0x3419155C: 9004 STR R0, [SP, #16] 0x3419155E: E049 B 46L11 ; 0x341915F4
.L3: 0x34191560: F7F9 FC72 BL LL_RCC_IC20_IsEnabled ; 0x3418AE48 0x34191564: B3C0 CBZ R0, .L8 ; 0x341915D8 0x34191566: F000 FB21 BL LL_RCC_IC20_GetDivider ; 0x34191BAC 0x3419156A: 9003 STR R0, [SP, #12] 0x3419156C: F7F9 FC74 BL LL_RCC_IC20_GetSource ; 0x3418AE58 0x34191570: 4601 MOV R1, R0 0x34191572: 9101 STR R1, [SP, #4] 0x34191574: B160 CBZ R0, .L4 ; 0x34191590 0x34191576: 9801 LDR R0, [SP, #4] 0x34191578: F1B0 5F80 CMP.W R0, #0x10000000 0x3419157C: D011 BEQ 46L5 ; 0x341915A2 0x3419157E: 9801 LDR R0, [SP, #4] 0x34191580: F1B0 5F00 CMP.W R0, #0x20000000 0x34191584: D016 BEQ 46L6 ; 0x341915B4 0x34191586: 9801 LDR R0, [SP, #4] 0x34191588: F1B0 5F40 CMP.W R0, #0x30000000 0x3419158C: D01B BEQ 46L7 ; 0x341915C6 0x3419158E: E023 B 46L8 ; 0x341915D8
.L4: 0x34191590: F000 F9B0 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F4 0x34191594: 9004 STR R0, [SP, #16] 0x34191596: 9804 LDR R0, [SP, #16] 0x34191598: 9903 LDR R1, [SP, #12] 0x3419159A: FBB0 F0F1 UDIV R0, R0, R1 0x3419159E: 9004 STR R0, [SP, #16] 0x341915A0: E01A B 46L8 ; 0x341915D8
.L5: 0x341915A2: F000 F9E9 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191978 0x341915A6: 9004 STR R0, [SP, #16] 0x341915A8: 9804 LDR R0, [SP, #16] 0x341915AA: 9903 LDR R1, [SP, #12] 0x341915AC: FBB0 F0F1 UDIV R0, R0, R1 0x341915B0: 9004 STR R0, [SP, #16] 0x341915B2: E011 B 46L8 ; 0x341915D8
.L6: 0x341915B4: F000 FA22 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919FC 0x341915B8: 9004 STR R0, [SP, #16] 0x341915BA: 9804 LDR R0, [SP, #16] 0x341915BC: 9903 LDR R1, [SP, #12] 0x341915BE: FBB0 F0F1 UDIV R0, R0, R1 0x341915C2: 9004 STR R0, [SP, #16] 0x341915C4: E008 B 46L8 ; 0x341915D8
.L7: 0x341915C6: F000 FA5B BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A80 0x341915CA: 9004 STR R0, [SP, #16] 0x341915CC: 9804 LDR R0, [SP, #16] 0x341915CE: 9903 LDR R1, [SP, #12] 0x341915D0: FBB0 F0F1 UDIV R0, R0, R1 0x341915D4: 9004 STR R0, [SP, #16] 0x341915D6: E7FF B 46L8 ; 0x341915D8
.L8: 0x341915D8: E00C B 46L11 ; 0x341915F4
.L9: 0x341915DA: F7F9 FA73 BL LL_RCC_HSI_IsReady.77 ; 0x3418AAC4 0x341915DE: B140 CBZ R0, .L10 ; 0x341915F2 0x341915E0: F7F9 FA78 BL LL_RCC_HSI_GetDivider.78 ; 0x3418AAD4 0x341915E4: 09C1 LSRS R1, R0, #7 0x341915E6: F249 0000 MOVW R0, #0x9000 0x341915EA: F2C0 30D0 MOVT R0, #0x03D0 0x341915EE: 40C8 LSRS R0, R1 0x341915F0: 9004 STR R0, [SP, #16]
.L10: 0x341915F2: E7FF B 46L11 ; 0x341915F4
.L11: 0x341915F4: 9804 LDR R0, [SP, #16] 0x341915F6: B006 ADD SP, SP, #24 0x341915F8: BD80 POP 123R7, PC}

Section .init.GPDMA1_Channel8_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel8_IRQHandler: 0x341915FA: E7FE B GPDMA1_Channel8_IRQHandler ; 0x341915FA

Section .text.RCCEx_GetRTCCLKFreq from blto2_FSBL_lto.o, size=126, align=4


RCCEx_GetRTCCLKFreq: 0x341915FC: B580 PUSH 123R7, LR} 0x341915FE: B084 SUB SP, SP, #16 0x34191600: 2000 MOVS R0, #0 0x34191602: 9003 STR R0, [SP, #12] 0x34191604: F7F6 FFD0 BL LL_RCC_GetRTCClockSource ; 0x341885A8 0x34191608: 4601 MOV R1, R0 0x3419160A: 9101 STR R1, [SP, #4] 0x3419160C: B160 CBZ R0, .L1 ; 0x34191628 0x3419160E: 9801 LDR R0, [SP, #4] 0x34191610: F5B0 7F80 CMP.W R0, #0x0100 0x34191614: D009 BEQ 46L2 ; 0x3419162A 0x34191616: 9801 LDR R0, [SP, #4] 0x34191618: F5B0 7F00 CMP.W R0, #0x0200 0x3419161C: D00C BEQ 46L4 ; 0x34191638 0x3419161E: 9801 LDR R0, [SP, #4] 0x34191620: F5B0 7F40 CMP.W R0, #0x0300 0x34191624: D00F BEQ 46L6 ; 0x34191646 0x34191626: E025 B 46L8 ; 0x34191674
.L1: 0x34191628: E024 B 46L8 ; 0x34191674
.L2: 0x3419162A: F7F6 FFC5 BL LL_RCC_LSE_IsReady.59 ; 0x341885B8 0x3419162E: B110 CBZ R0, .L3 ; 0x34191636 0x34191630: F44F 4000 MOV.W R0, #0x8000 0x34191634: 9003 STR R0, [SP, #12]
.L3: 0x34191636: E01D B 46L8 ; 0x34191674
.L4: 0x34191638: F7F9 FBFE BL LL_RCC_LSI_IsReady.94 ; 0x3418AE38 0x3419163C: B110 CBZ R0, .L5 ; 0x34191644 0x3419163E: F44F 40FA MOV.W R0, #0x7D00 0x34191642: 9003 STR R0, [SP, #12]
.L5: 0x34191644: E016 B 46L8 ; 0x34191674
.L6: 0x34191646: F7F9 FA5D BL LL_RCC_HSE_IsReady.80 ; 0x3418AB04 0x3419164A: B190 CBZ R0, .L7 ; 0x34191672 0x3419164C: F248 105C MOVW R0, #0x815C 0x34191650: F2C5 6002 MOVT R0, #0x5602 0x34191654: 6800 LDR R0, [R0] 0x34191656: F400 317C AND R1, R0, #0x03F000 0x3419165A: 2001 MOVS R0, #1 0x3419165C: EB00 3011 ADD.W R0, R0, R1, LSR #12 0x34191660: 9002 STR R0, [SP, #8] 0x34191662: 9902 LDR R1, [SP, #8] 0x34191664: F646 4000 MOVW R0, #0x6C00 0x34191668: F2C0 20DC MOVT R0, #0x02DC 0x3419166C: FBB0 F0F1 UDIV R0, R0, R1 0x34191670: 9003 STR R0, [SP, #12]
.L7: 0x34191672: E7FF B 46L8 ; 0x34191674
.L8: 0x34191674: 9803 LDR R0, [SP, #12] 0x34191676: B004 ADD SP, SP, #16 0x34191678: BD80 POP 123R7, PC}

Section .init.GPDMA1_Channel9_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel9_IRQHandler: 0x3419167A: E7FE B GPDMA1_Channel9_IRQHandler ; 0x3419167A

Section .text.RCCEx_GetSAICLKFreq from blto2_FSBL_lto.o, size=606, align=4


RCCEx_GetSAICLKFreq: 0x3419167C: B580 PUSH 123R7, LR} 0x3419167E: B086 SUB SP, SP, #24 0x34191680: 9005 STR R0, [SP, #20] 0x34191682: 2000 MOVS R0, #0 0x34191684: 9004 STR R0, [SP, #16] 0x34191686: 9805 LDR R0, [SP, #20] 0x34191688: F7F7 F968 BL LL_RCC_GetSAIClockSource ; 0x3418895C 0x3419168C: 4601 MOV R1, R0 0x3419168E: 9102 STR R1, [SP, #8] 0x34191690: F241 4118 MOVW R1, #0x1418 0x34191694: F2C0 7100 MOVT R1, #0x0700 0x34191698: 4288 CMP R0, R1 0x3419169A: D073 BEQ 46L1 ; 0x34191784 0x3419169C: 9802 LDR R0, [SP, #8] 0x3419169E: F641 0118 MOVW R1, #0x1818 0x341916A2: F2C0 7100 MOVT R1, #0x0700 0x341916A6: 4288 CMP R0, R1 0x341916A8: D06C BEQ 46L1 ; 0x34191784 0x341916AA: 9802 LDR R0, [SP, #8] 0x341916AC: F241 4118 MOVW R1, #0x1418 0x341916B0: F2C0 7101 MOVT R1, #0x0701 0x341916B4: 4288 CMP R0, R1 0x341916B6: D06D BEQ 46L2 ; 0x34191794 0x341916B8: 9802 LDR R0, [SP, #8] 0x341916BA: F641 0118 MOVW R1, #0x1818 0x341916BE: F2C0 7101 MOVT R1, #0x0701 0x341916C2: 4288 CMP R0, R1 0x341916C4: D066 BEQ 46L2 ; 0x34191794 0x341916C6: 9802 LDR R0, [SP, #8] 0x341916C8: F241 4118 MOVW R1, #0x1418 0x341916CC: F2C0 7102 MOVT R1, #0x0702 0x341916D0: 4288 CMP R0, R1 0x341916D2: D064 BEQ 46L3 ; 0x3419179E 0x341916D4: 9802 LDR R0, [SP, #8] 0x341916D6: F641 0118 MOVW R1, #0x1818 0x341916DA: F2C0 7102 MOVT R1, #0x0702 0x341916DE: 4288 CMP R0, R1 0x341916E0: D05D BEQ 46L3 ; 0x3419179E 0x341916E2: 9802 LDR R0, [SP, #8] 0x341916E4: F241 4118 MOVW R1, #0x1418 0x341916E8: F2C0 7103 MOVT R1, #0x0703 0x341916EC: 4288 CMP R0, R1 0x341916EE: F000 8093 BEQ.W 46L9 ; 0x34191818 0x341916F2: 9802 LDR R0, [SP, #8] 0x341916F4: F641 0118 MOVW R1, #0x1818 0x341916F8: F2C0 7103 MOVT R1, #0x0703 0x341916FC: 4288 CMP R0, R1 0x341916FE: F000 808B BEQ.W 46L9 ; 0x34191818 0x34191702: 9802 LDR R0, [SP, #8] 0x34191704: F241 4118 MOVW R1, #0x1418 0x34191708: F2C0 7104 MOVT R1, #0x0704 0x3419170C: 4288 CMP R0, R1 0x3419170E: F000 80CD BEQ.W 46L17 ; 0x341918AC 0x34191712: 9802 LDR R0, [SP, #8] 0x34191714: F641 0118 MOVW R1, #0x1818 0x34191718: F2C0 7104 MOVT R1, #0x0704 0x3419171C: 4288 CMP R0, R1 0x3419171E: F000 80C5 BEQ.W 46L17 ; 0x341918AC 0x34191722: 9802 LDR R0, [SP, #8] 0x34191724: F241 4118 MOVW R1, #0x1418 0x34191728: F2C0 7105 MOVT R1, #0x0705 0x3419172C: 4288 CMP R0, R1 0x3419172E: F000 80B0 BEQ.W 46L15 ; 0x34191892 0x34191732: 9802 LDR R0, [SP, #8] 0x34191734: F641 0118 MOVW R1, #0x1818 0x34191738: F2C0 7105 MOVT R1, #0x0705 0x3419173C: 4288 CMP R0, R1 0x3419173E: F000 80A8 BEQ.W 46L15 ; 0x34191892 0x34191742: 9802 LDR R0, [SP, #8] 0x34191744: F241 4118 MOVW R1, #0x1418 0x34191748: F2C0 7106 MOVT R1, #0x0706 0x3419174C: 4288 CMP R0, R1 0x3419174E: F000 80B6 BEQ.W 46L19 ; 0x341918BE 0x34191752: 9802 LDR R0, [SP, #8] 0x34191754: F641 0118 MOVW R1, #0x1818 0x34191758: F2C0 7106 MOVT R1, #0x0706 0x3419175C: 4288 CMP R0, R1 0x3419175E: F000 80AE BEQ.W 46L19 ; 0x341918BE 0x34191762: 9802 LDR R0, [SP, #8] 0x34191764: F241 4118 MOVW R1, #0x1418 0x34191768: F2C0 7107 MOVT R1, #0x0707 0x3419176C: 4288 CMP R0, R1 0x3419176E: F000 80AC BEQ.W 46L20 ; 0x341918CA 0x34191772: 9802 LDR R0, [SP, #8] 0x34191774: F641 0118 MOVW R1, #0x1818 0x34191778: F2C0 7107 MOVT R1, #0x0707 0x3419177C: 4288 CMP R0, R1 0x3419177E: F000 80A4 BEQ.W 46L20 ; 0x341918CA 0x34191782: E0A7 B 46L21 ; 0x341918D4
.L1: 0x34191784: F7FE FD3A BL HAL_RCC_GetSysClockFreq ; 0x341901FC 0x34191788: F7F9 F89C BL RCCEx_GetHCLKFreq ; 0x3418A8C4 0x3419178C: F7F9 FAD0 BL RCCEx_GetPCLK2Freq ; 0x3418AD30 0x34191790: 9004 STR R0, [SP, #16] 0x34191792: E09F B 46L21 ; 0x341918D4
.L2: 0x34191794: 2007 MOVS R0, #7 0x34191796: F7F7 F9F3 BL RCCEx_GetCLKPCLKFreq ; 0x34188B80 0x3419179A: 9004 STR R0, [SP, #16] 0x3419179C: E09A B 46L21 ; 0x341918D4
.L3: 0x3419179E: F7F9 FB2B BL LL_RCC_IC7_IsEnabled ; 0x3418ADF8 0x341917A2: B3C0 CBZ R0, .L8 ; 0x34191816 0x341917A4: F000 F9EA BL LL_RCC_IC7_GetDivider ; 0x34191B7C 0x341917A8: 9003 STR R0, [SP, #12] 0x341917AA: F7F9 FB2D BL LL_RCC_IC7_GetSource ; 0x3418AE08 0x341917AE: 4601 MOV R1, R0 0x341917B0: 9101 STR R1, [SP, #4] 0x341917B2: B160 CBZ R0, .L4 ; 0x341917CE 0x341917B4: 9801 LDR R0, [SP, #4] 0x341917B6: F1B0 5F80 CMP.W R0, #0x10000000 0x341917BA: D011 BEQ 46L5 ; 0x341917E0 0x341917BC: 9801 LDR R0, [SP, #4] 0x341917BE: F1B0 5F00 CMP.W R0, #0x20000000 0x341917C2: D016 BEQ 46L6 ; 0x341917F2 0x341917C4: 9801 LDR R0, [SP, #4] 0x341917C6: F1B0 5F40 CMP.W R0, #0x30000000 0x341917CA: D01B BEQ 46L7 ; 0x34191804 0x341917CC: E023 B 46L8 ; 0x34191816
.L4: 0x341917CE: F000 F891 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F4 0x341917D2: 9004 STR R0, [SP, #16] 0x341917D4: 9804 LDR R0, [SP, #16] 0x341917D6: 9903 LDR R1, [SP, #12] 0x341917D8: FBB0 F0F1 UDIV R0, R0, R1 0x341917DC: 9004 STR R0, [SP, #16] 0x341917DE: E01A B 46L8 ; 0x34191816
.L5: 0x341917E0: F000 F8CA BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191978 0x341917E4: 9004 STR R0, [SP, #16] 0x341917E6: 9804 LDR R0, [SP, #16] 0x341917E8: 9903 LDR R1, [SP, #12] 0x341917EA: FBB0 F0F1 UDIV R0, R0, R1 0x341917EE: 9004 STR R0, [SP, #16] 0x341917F0: E011 B 46L8 ; 0x34191816
.L6: 0x341917F2: F000 F903 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919FC 0x341917F6: 9004 STR R0, [SP, #16] 0x341917F8: 9804 LDR R0, [SP, #16] 0x341917FA: 9903 LDR R1, [SP, #12] 0x341917FC: FBB0 F0F1 UDIV R0, R0, R1 0x34191800: 9004 STR R0, [SP, #16] 0x34191802: E008 B 46L8 ; 0x34191816
.L7: 0x34191804: F000 F93C BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A80 0x34191808: 9004 STR R0, [SP, #16] 0x3419180A: 9804 LDR R0, [SP, #16] 0x3419180C: 9903 LDR R1, [SP, #12] 0x3419180E: FBB0 F0F1 UDIV R0, R0, R1 0x34191812: 9004 STR R0, [SP, #16] 0x34191814: E7FF B 46L8 ; 0x34191816
.L8: 0x34191816: E05D B 46L21 ; 0x341918D4
.L9: 0x34191818: F7F9 FAD6 BL LL_RCC_IC8_IsEnabled ; 0x3418ADC8 0x3419181C: B3C0 CBZ R0, .L14 ; 0x34191890 0x3419181E: F000 F9A1 BL LL_RCC_IC8_GetDivider ; 0x34191B64 0x34191822: 9003 STR R0, [SP, #12] 0x34191824: F7F9 FAD8 BL LL_RCC_IC8_GetSource ; 0x3418ADD8 0x34191828: 4601 MOV R1, R0 0x3419182A: 9100 STR R1, [SP, #0] 0x3419182C: B160 CBZ R0, .L10 ; 0x34191848 0x3419182E: 9800 LDR R0, [SP, #0] 0x34191830: F1B0 5F80 CMP.W R0, #0x10000000 0x34191834: D011 BEQ 46L11 ; 0x3419185A 0x34191836: 9800 LDR R0, [SP, #0] 0x34191838: F1B0 5F00 CMP.W R0, #0x20000000 0x3419183C: D016 BEQ 46L12 ; 0x3419186C 0x3419183E: 9800 LDR R0, [SP, #0] 0x34191840: F1B0 5F40 CMP.W R0, #0x30000000 0x34191844: D01B BEQ 46L13 ; 0x3419187E 0x34191846: E023 B 46L14 ; 0x34191890
.L10: 0x34191848: F000 F854 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F4 0x3419184C: 9004 STR R0, [SP, #16] 0x3419184E: 9804 LDR R0, [SP, #16] 0x34191850: 9903 LDR R1, [SP, #12] 0x34191852: FBB0 F0F1 UDIV R0, R0, R1 0x34191856: 9004 STR R0, [SP, #16] 0x34191858: E01A B 46L14 ; 0x34191890
.L11: 0x3419185A: F000 F88D BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191978 0x3419185E: 9004 STR R0, [SP, #16] 0x34191860: 9804 LDR R0, [SP, #16] 0x34191862: 9903 LDR R1, [SP, #12] 0x34191864: FBB0 F0F1 UDIV R0, R0, R1 0x34191868: 9004 STR R0, [SP, #16] 0x3419186A: E011 B 46L14 ; 0x34191890
.L12: 0x3419186C: F000 F8C6 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919FC 0x34191870: 9004 STR R0, [SP, #16] 0x34191872: 9804 LDR R0, [SP, #16] 0x34191874: 9903 LDR R1, [SP, #12] 0x34191876: FBB0 F0F1 UDIV R0, R0, R1 0x3419187A: 9004 STR R0, [SP, #16] 0x3419187C: E008 B 46L14 ; 0x34191890
.L13: 0x3419187E: F000 F8FF BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A80 0x34191882: 9004 STR R0, [SP, #16] 0x34191884: 9804 LDR R0, [SP, #16] 0x34191886: 9903 LDR R1, [SP, #12] 0x34191888: FBB0 F0F1 UDIV R0, R0, R1 0x3419188C: 9004 STR R0, [SP, #16] 0x3419188E: E7FF B 46L14 ; 0x34191890
.L14: 0x34191890: E020 B 46L21 ; 0x341918D4
.L15: 0x34191892: F7F9 F917 BL LL_RCC_HSI_IsReady.77 ; 0x3418AAC4 0x34191896: B140 CBZ R0, .L16 ; 0x341918AA 0x34191898: F7F9 F91C BL LL_RCC_HSI_GetDivider.78 ; 0x3418AAD4 0x3419189C: 09C1 LSRS R1, R0, #7 0x3419189E: F249 0000 MOVW R0, #0x9000 0x341918A2: F2C0 30D0 MOVT R0, #0x03D0 0x341918A6: 40C8 LSRS R0, R1 0x341918A8: 9004 STR R0, [SP, #16]
.L16: 0x341918AA: E013 B 46L21 ; 0x341918D4
.L17: 0x341918AC: F7F9 F91A BL LL_RCC_MSI_IsReady.79 ; 0x3418AAE4 0x341918B0: B120 CBZ R0, .L18 ; 0x341918BC 0x341918B2: F640 1000 MOVW R0, #0x0900 0x341918B6: F2C0 003D MOVT R0, #61 0x341918BA: 9004 STR R0, [SP, #16]
.L18: 0x341918BC: E00A B 46L21 ; 0x341918D4
.L19: 0x341918BE: F248 0000 MOVW R0, #0x8000 0x341918C2: F2C0 00BB MOVT R0, #187 0x341918C6: 9004 STR R0, [SP, #16] 0x341918C8: E004 B 46L21 ; 0x341918D4
.L20: 0x341918CA: 2007 MOVS R0, #7 0x341918CC: F7F7 FF88 BL RCCEx_GetSPDIFRXCLKFreq ; 0x341897E0 0x341918D0: 9004 STR R0, [SP, #16] 0x341918D2: E7FF B 46L21 ; 0x341918D4
.L21: 0x341918D4: 9804 LDR R0, [SP, #16] 0x341918D6: B006 ADD SP, SP, #24 0x341918D8: BD80 POP 123R7, PC}

Section .init.GPDMA1_Channel10_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel10_IRQHandler: 0x341918DA: E7FE B GPDMA1_Channel10_IRQHandler ; 0x341918DA

Section .text.LL_RCC_IC3_GetDivider from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_IC3_GetDivider: 0x341918DC: F248 00CC MOVW R0, #0x80CC 0x341918E0: F2C5 6002 MOVT R0, #0x5602 0x341918E4: 6800 LDR R0, [R0] 0x341918E6: F400 017F AND R1, R0, #0xFF0000 0x341918EA: 2001 MOVS R0, #1 0x341918EC: EB00 4011 ADD.W R0, R0, R1, LSR #16 0x341918F0: 4770 BX LR

Section .init.GPDMA1_Channel11_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel11_IRQHandler: 0x341918F2: E7FE B GPDMA1_Channel11_IRQHandler ; 0x341918F2

Section .text.HAL_RCCEx_GetPLL1CLKFreq from blto2_FSBL_lto.o, size=130, align=4


HAL_RCCEx_GetPLL1CLKFreq: 0x341918F4: B510 PUSH 123R4, LR} 0x341918F6: B08A SUB SP, SP, #40 0x341918F8: 2000 MOVS R0, #0 0x341918FA: 9009 STR R0, [SP, #36] 0x341918FC: F7F9 F99A BL LL_RCC_PLL1_IsReady.87 ; 0x3418AC34 0x34191900: B368 CBZ R0, .L2 ; 0x3419195E 0x34191902: F7F9 F99F BL LL_RCC_PLL1P_IsEnabled ; 0x3418AC44 0x34191906: B348 CBZ R0, .L1 ; 0x3419195C 0x34191908: F7F9 F9A4 BL LL_RCC_PLL1_GetSource.88 ; 0x3418AC54 0x3419190C: F7F9 F820 BL RCCEx_GetPLLSourceFreq ; 0x3418A950 0x34191910: 9007 STR R0, [SP, #28] 0x34191912: 9807 LDR R0, [SP, #28] 0x34191914: B310 CBZ R0, .L1 ; 0x3419195C 0x34191916: F7F9 F9A5 BL LL_RCC_PLL1_GetM ; 0x3418AC64 0x3419191A: 9008 STR R0, [SP, #32] 0x3419191C: 9808 LDR R0, [SP, #32] 0x3419191E: B1E8 CBZ R0, .L1 ; 0x3419195C 0x34191920: 9807 LDR R0, [SP, #28] 0x34191922: 9006 STR R0, [SP, #24] 0x34191924: 9808 LDR R0, [SP, #32] 0x34191926: 9003 STR R0, [SP, #12] 0x34191928: F7F9 F9A4 BL LL_RCC_PLL1_GetN ; 0x3418AC74 0x3419192C: 9004 STR R0, [SP, #16] 0x3419192E: F7F9 F9A9 BL LL_RCC_PLL1_GetFRACN ; 0x3418AC84 0x34191932: 9005 STR R0, [SP, #20] 0x34191934: F7F9 F9AE BL LL_RCC_PLL1_GetP1 ; 0x3418AC94 0x34191938: 9002 STR R0, [SP, #8] 0x3419193A: F7F9 F9B3 BL LL_RCC_PLL1_GetP2 ; 0x3418ACA4 0x3419193E: F8DD C008 LDR.W R12, [SP, #8] 0x34191942: 9903 LDR R1, [SP, #12] 0x34191944: 9A04 LDR R2, [SP, #16] 0x34191946: 9B05 LDR R3, [SP, #20] 0x34191948: 4604 MOV R4, R0 0x3419194A: 9806 LDR R0, [SP, #24] 0x3419194C: 46EE MOV LR, SP 0x3419194E: F8CE 4004 STR.W R4, [LR, #4] 0x34191952: F8CE C000 STR.W R12, [LR] 0x34191956: F7F9 F869 BL RCCEx_CalcPLLFreq ; 0x3418AA2C 0x3419195A: 9009 STR R0, [SP, #36]
.L1: 0x3419195C: E008 B 46L3 ; 0x34191970
.L2: 0x3419195E: F7F9 F9A9 BL LL_RCC_PLL1_IsEnabledBypass.89 ; 0x3418ACB4 0x34191962: B128 CBZ R0, .L3 ; 0x34191970 0x34191964: F7F9 F976 BL LL_RCC_PLL1_GetSource.88 ; 0x3418AC54 0x34191968: F7F8 FFF2 BL RCCEx_GetPLLSourceFreq ; 0x3418A950 0x3419196C: 9009 STR R0, [SP, #36] 0x3419196E: E7FF B 46L3 ; 0x34191970
.L3: 0x34191970: 9809 LDR R0, [SP, #36] 0x34191972: B00A ADD SP, SP, #40 0x34191974: BD10 POP 123R4, PC}

Section .init.GPDMA1_Channel12_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel12_IRQHandler: 0x34191976: E7FE B GPDMA1_Channel12_IRQHandler ; 0x34191976

Section .text.HAL_RCCEx_GetPLL2CLKFreq from blto2_FSBL_lto.o, size=130, align=4


HAL_RCCEx_GetPLL2CLKFreq: 0x34191978: B510 PUSH 123R4, LR} 0x3419197A: B08A SUB SP, SP, #40 0x3419197C: 2000 MOVS R0, #0 0x3419197E: 9009 STR R0, [SP, #36] 0x34191980: F7F9 F910 BL LL_RCC_PLL2_IsReady.84 ; 0x3418ABA4 0x34191984: B368 CBZ R0, .L2 ; 0x341919E2 0x34191986: F7F9 F915 BL LL_RCC_PLL2P_IsEnabled ; 0x3418ABB4 0x3419198A: B348 CBZ R0, .L1 ; 0x341919E0 0x3419198C: F7F9 F91A BL LL_RCC_PLL2_GetSource.85 ; 0x3418ABC4 0x34191990: F7F8 FFDE BL RCCEx_GetPLLSourceFreq ; 0x3418A950 0x34191994: 9007 STR R0, [SP, #28] 0x34191996: 9807 LDR R0, [SP, #28] 0x34191998: B310 CBZ R0, .L1 ; 0x341919E0 0x3419199A: F7F9 F91B BL LL_RCC_PLL2_GetM ; 0x3418ABD4 0x3419199E: 9008 STR R0, [SP, #32] 0x341919A0: 9808 LDR R0, [SP, #32] 0x341919A2: B1E8 CBZ R0, .L1 ; 0x341919E0 0x341919A4: 9807 LDR R0, [SP, #28] 0x341919A6: 9006 STR R0, [SP, #24] 0x341919A8: 9808 LDR R0, [SP, #32] 0x341919AA: 9003 STR R0, [SP, #12] 0x341919AC: F7F9 F91A BL LL_RCC_PLL2_GetN ; 0x3418ABE4 0x341919B0: 9004 STR R0, [SP, #16] 0x341919B2: F7F9 F91F BL LL_RCC_PLL2_GetFRACN ; 0x3418ABF4 0x341919B6: 9005 STR R0, [SP, #20] 0x341919B8: F7F9 F924 BL LL_RCC_PLL2_GetP1 ; 0x3418AC04 0x341919BC: 9002 STR R0, [SP, #8] 0x341919BE: F7F9 F929 BL LL_RCC_PLL2_GetP2 ; 0x3418AC14 0x341919C2: F8DD C008 LDR.W R12, [SP, #8] 0x341919C6: 9903 LDR R1, [SP, #12] 0x341919C8: 9A04 LDR R2, [SP, #16] 0x341919CA: 9B05 LDR R3, [SP, #20] 0x341919CC: 4604 MOV R4, R0 0x341919CE: 9806 LDR R0, [SP, #24] 0x341919D0: 46EE MOV LR, SP 0x341919D2: F8CE 4004 STR.W R4, [LR, #4] 0x341919D6: F8CE C000 STR.W R12, [LR] 0x341919DA: F7F9 F827 BL RCCEx_CalcPLLFreq ; 0x3418AA2C 0x341919DE: 9009 STR R0, [SP, #36]
.L1: 0x341919E0: E008 B 46L3 ; 0x341919F4
.L2: 0x341919E2: F7F9 F91F BL LL_RCC_PLL2_IsEnabledBypass.86 ; 0x3418AC24 0x341919E6: B128 CBZ R0, .L3 ; 0x341919F4 0x341919E8: F7F9 F8EC BL LL_RCC_PLL2_GetSource.85 ; 0x3418ABC4 0x341919EC: F7F8 FFB0 BL RCCEx_GetPLLSourceFreq ; 0x3418A950 0x341919F0: 9009 STR R0, [SP, #36] 0x341919F2: E7FF B 46L3 ; 0x341919F4
.L3: 0x341919F4: 9809 LDR R0, [SP, #36] 0x341919F6: B00A ADD SP, SP, #40 0x341919F8: BD10 POP 123R4, PC}

Section .init.GPDMA1_Channel13_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel13_IRQHandler: 0x341919FA: E7FE B GPDMA1_Channel13_IRQHandler ; 0x341919FA

Section .text.HAL_RCCEx_GetPLL3CLKFreq from blto2_FSBL_lto.o, size=130, align=4


HAL_RCCEx_GetPLL3CLKFreq: 0x341919FC: B510 PUSH 123R4, LR} 0x341919FE: B08A SUB SP, SP, #40 0x34191A00: 2000 MOVS R0, #0 0x34191A02: 9009 STR R0, [SP, #36] 0x34191A04: F7F9 F886 BL LL_RCC_PLL3_IsReady.81 ; 0x3418AB14 0x34191A08: B368 CBZ R0, .L2 ; 0x34191A66 0x34191A0A: F7F9 F88B BL LL_RCC_PLL3P_IsEnabled ; 0x3418AB24 0x34191A0E: B348 CBZ R0, .L1 ; 0x34191A64 0x34191A10: F7F9 F890 BL LL_RCC_PLL3_GetSource.82 ; 0x3418AB34 0x34191A14: F7F8 FF9C BL RCCEx_GetPLLSourceFreq ; 0x3418A950 0x34191A18: 9007 STR R0, [SP, #28] 0x34191A1A: 9807 LDR R0, [SP, #28] 0x34191A1C: B310 CBZ R0, .L1 ; 0x34191A64 0x34191A1E: F7F9 F891 BL LL_RCC_PLL3_GetM ; 0x3418AB44 0x34191A22: 9008 STR R0, [SP, #32] 0x34191A24: 9808 LDR R0, [SP, #32] 0x34191A26: B1E8 CBZ R0, .L1 ; 0x34191A64 0x34191A28: 9807 LDR R0, [SP, #28] 0x34191A2A: 9006 STR R0, [SP, #24] 0x34191A2C: 9808 LDR R0, [SP, #32] 0x34191A2E: 9003 STR R0, [SP, #12] 0x34191A30: F7F9 F890 BL LL_RCC_PLL3_GetN ; 0x3418AB54 0x34191A34: 9004 STR R0, [SP, #16] 0x34191A36: F7F9 F895 BL LL_RCC_PLL3_GetFRACN ; 0x3418AB64 0x34191A3A: 9005 STR R0, [SP, #20] 0x34191A3C: F7F9 F89A BL LL_RCC_PLL3_GetP1 ; 0x3418AB74 0x34191A40: 9002 STR R0, [SP, #8] 0x34191A42: F7F9 F89F BL LL_RCC_PLL3_GetP2 ; 0x3418AB84 0x34191A46: F8DD C008 LDR.W R12, [SP, #8] 0x34191A4A: 9903 LDR R1, [SP, #12] 0x34191A4C: 9A04 LDR R2, [SP, #16] 0x34191A4E: 9B05 LDR R3, [SP, #20] 0x34191A50: 4604 MOV R4, R0 0x34191A52: 9806 LDR R0, [SP, #24] 0x34191A54: 46EE MOV LR, SP 0x34191A56: F8CE 4004 STR.W R4, [LR, #4] 0x34191A5A: F8CE C000 STR.W R12, [LR] 0x34191A5E: F7F8 FFE5 BL RCCEx_CalcPLLFreq ; 0x3418AA2C 0x34191A62: 9009 STR R0, [SP, #36]
.L1: 0x34191A64: E008 B 46L3 ; 0x34191A78
.L2: 0x34191A66: F7F9 F895 BL LL_RCC_PLL3_IsEnabledBypass.83 ; 0x3418AB94 0x34191A6A: B128 CBZ R0, .L3 ; 0x34191A78 0x34191A6C: F7F9 F862 BL LL_RCC_PLL3_GetSource.82 ; 0x3418AB34 0x34191A70: F7F8 FF6E BL RCCEx_GetPLLSourceFreq ; 0x3418A950 0x34191A74: 9009 STR R0, [SP, #36] 0x34191A76: E7FF B 46L3 ; 0x34191A78
.L3: 0x34191A78: 9809 LDR R0, [SP, #36] 0x34191A7A: B00A ADD SP, SP, #40 0x34191A7C: BD10 POP 123R4, PC}

Section .init.GPDMA1_Channel14_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel14_IRQHandler: 0x34191A7E: E7FE B GPDMA1_Channel14_IRQHandler ; 0x34191A7E

Section .text.HAL_RCCEx_GetPLL4CLKFreq from blto2_FSBL_lto.o, size=130, align=4


HAL_RCCEx_GetPLL4CLKFreq: 0x34191A80: B510 PUSH 123R4, LR} 0x34191A82: B08A SUB SP, SP, #40 0x34191A84: 2000 MOVS R0, #0 0x34191A86: 9009 STR R0, [SP, #36] 0x34191A88: F7F8 FF4A BL LL_RCC_PLL4_IsReady.74 ; 0x3418A920 0x34191A8C: B368 CBZ R0, .L2 ; 0x34191AEA 0x34191A8E: F7F8 FF4F BL LL_RCC_PLL4P_IsEnabled ; 0x3418A930 0x34191A92: B348 CBZ R0, .L1 ; 0x34191AE8 0x34191A94: F7F8 FF54 BL LL_RCC_PLL4_GetSource.75 ; 0x3418A940 0x34191A98: F7F8 FF5A BL RCCEx_GetPLLSourceFreq ; 0x3418A950 0x34191A9C: 9007 STR R0, [SP, #28] 0x34191A9E: 9807 LDR R0, [SP, #28] 0x34191AA0: B310 CBZ R0, .L1 ; 0x34191AE8 0x34191AA2: F7F8 FF9B BL LL_RCC_PLL4_GetM ; 0x3418A9DC 0x34191AA6: 9008 STR R0, [SP, #32] 0x34191AA8: 9808 LDR R0, [SP, #32] 0x34191AAA: B1E8 CBZ R0, .L1 ; 0x34191AE8 0x34191AAC: 9807 LDR R0, [SP, #28] 0x34191AAE: 9006 STR R0, [SP, #24] 0x34191AB0: 9808 LDR R0, [SP, #32] 0x34191AB2: 9003 STR R0, [SP, #12] 0x34191AB4: F7F8 FF9A BL LL_RCC_PLL4_GetN ; 0x3418A9EC 0x34191AB8: 9004 STR R0, [SP, #16] 0x34191ABA: F7F8 FF9F BL LL_RCC_PLL4_GetFRACN ; 0x3418A9FC 0x34191ABE: 9005 STR R0, [SP, #20] 0x34191AC0: F7F8 FFA4 BL LL_RCC_PLL4_GetP1 ; 0x3418AA0C 0x34191AC4: 9002 STR R0, [SP, #8] 0x34191AC6: F7F8 FFA9 BL LL_RCC_PLL4_GetP2 ; 0x3418AA1C 0x34191ACA: F8DD C008 LDR.W R12, [SP, #8] 0x34191ACE: 9903 LDR R1, [SP, #12] 0x34191AD0: 9A04 LDR R2, [SP, #16] 0x34191AD2: 9B05 LDR R3, [SP, #20] 0x34191AD4: 4604 MOV R4, R0 0x34191AD6: 9806 LDR R0, [SP, #24] 0x34191AD8: 46EE MOV LR, SP 0x34191ADA: F8CE 4004 STR.W R4, [LR, #4] 0x34191ADE: F8CE C000 STR.W R12, [LR] 0x34191AE2: F7F8 FFA3 BL RCCEx_CalcPLLFreq ; 0x3418AA2C 0x34191AE6: 9009 STR R0, [SP, #36]
.L1: 0x34191AE8: E008 B 46L3 ; 0x34191AFC
.L2: 0x34191AEA: F7F8 FFE3 BL LL_RCC_PLL4_IsEnabledBypass.76 ; 0x3418AAB4 0x34191AEE: B128 CBZ R0, .L3 ; 0x34191AFC 0x34191AF0: F7F8 FF26 BL LL_RCC_PLL4_GetSource.75 ; 0x3418A940 0x34191AF4: F7F8 FF2C BL RCCEx_GetPLLSourceFreq ; 0x3418A950 0x34191AF8: 9009 STR R0, [SP, #36] 0x34191AFA: E7FF B 46L3 ; 0x34191AFC
.L3: 0x34191AFC: 9809 LDR R0, [SP, #36] 0x34191AFE: B00A ADD SP, SP, #40 0x34191B00: BD10 POP 123R4, PC}

Section .init.GPDMA1_Channel15_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel15_IRQHandler: 0x34191B02: E7FE B GPDMA1_Channel15_IRQHandler ; 0x34191B02

Section .text.LL_RCC_IC4_GetDivider from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_IC4_GetDivider: 0x34191B04: F248 00D0 MOVW R0, #0x80D0 0x34191B08: F2C5 6002 MOVT R0, #0x5602 0x34191B0C: 6800 LDR R0, [R0] 0x34191B0E: F400 017F AND R1, R0, #0xFF0000 0x34191B12: 2001 MOVS R0, #1 0x34191B14: EB00 4011 ADD.W R0, R0, R1, LSR #16 0x34191B18: 4770 BX LR

Section .init.I2C1_EV_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


I2C1_EV_IRQHandler: 0x34191B1A: E7FE B I2C1_EV_IRQHandler ; 0x34191B1A

Section .text.LL_RCC_IC15_GetDivider from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_IC15_GetDivider: 0x34191B1C: F248 00FC MOVW R0, #0x80FC 0x34191B20: F2C5 6002 MOVT R0, #0x5602 0x34191B24: 6800 LDR R0, [R0] 0x34191B26: F400 017F AND R1, R0, #0xFF0000 0x34191B2A: 2001 MOVS R0, #1 0x34191B2C: EB00 4011 ADD.W R0, R0, R1, LSR #16 0x34191B30: 4770 BX LR

Section .init.I2C1_ER_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


I2C1_ER_IRQHandler: 0x34191B32: E7FE B I2C1_ER_IRQHandler ; 0x34191B32

Section .text.LL_RCC_IC9_GetDivider from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_IC9_GetDivider: 0x34191B34: F248 00E4 MOVW R0, #0x80E4 0x34191B38: F2C5 6002 MOVT R0, #0x5602 0x34191B3C: 6800 LDR R0, [R0] 0x34191B3E: F400 017F AND R1, R0, #0xFF0000 0x34191B42: 2001 MOVS R0, #1 0x34191B44: EB00 4011 ADD.W R0, R0, R1, LSR #16 0x34191B48: 4770 BX LR

Section .init.I2C2_EV_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


I2C2_EV_IRQHandler: 0x34191B4A: E7FE B I2C2_EV_IRQHandler ; 0x34191B4A

Section .text.LL_RCC_IC14_GetDivider from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_IC14_GetDivider: 0x34191B4C: F248 00F8 MOVW R0, #0x80F8 0x34191B50: F2C5 6002 MOVT R0, #0x5602 0x34191B54: 6800 LDR R0, [R0] 0x34191B56: F400 017F AND R1, R0, #0xFF0000 0x34191B5A: 2001 MOVS R0, #1 0x34191B5C: EB00 4011 ADD.W R0, R0, R1, LSR #16 0x34191B60: 4770 BX LR

Section .init.I2C2_ER_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


I2C2_ER_IRQHandler: 0x34191B62: E7FE B I2C2_ER_IRQHandler ; 0x34191B62

Section .text.LL_RCC_IC8_GetDivider from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_IC8_GetDivider: 0x34191B64: F248 00E0 MOVW R0, #0x80E0 0x34191B68: F2C5 6002 MOVT R0, #0x5602 0x34191B6C: 6800 LDR R0, [R0] 0x34191B6E: F400 017F AND R1, R0, #0xFF0000 0x34191B72: 2001 MOVS R0, #1 0x34191B74: EB00 4011 ADD.W R0, R0, R1, LSR #16 0x34191B78: 4770 BX LR

Section .init.I2C3_EV_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


I2C3_EV_IRQHandler: 0x34191B7A: E7FE B I2C3_EV_IRQHandler ; 0x34191B7A

Section .text.LL_RCC_IC7_GetDivider from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_IC7_GetDivider: 0x34191B7C: F248 00DC MOVW R0, #0x80DC 0x34191B80: F2C5 6002 MOVT R0, #0x5602 0x34191B84: 6800 LDR R0, [R0] 0x34191B86: F400 017F AND R1, R0, #0xFF0000 0x34191B8A: 2001 MOVS R0, #1 0x34191B8C: EB00 4011 ADD.W R0, R0, R1, LSR #16 0x34191B90: 4770 BX LR

Section .init.I2C3_ER_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


I2C3_ER_IRQHandler: 0x34191B92: E7FE B I2C3_ER_IRQHandler ; 0x34191B92

Section .text.LL_RCC_IC5_GetDivider from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_IC5_GetDivider: 0x34191B94: F248 00D4 MOVW R0, #0x80D4 0x34191B98: F2C5 6002 MOVT R0, #0x5602 0x34191B9C: 6800 LDR R0, [R0] 0x34191B9E: F400 017F AND R1, R0, #0xFF0000 0x34191BA2: 2001 MOVS R0, #1 0x34191BA4: EB00 4011 ADD.W R0, R0, R1, LSR #16 0x34191BA8: 4770 BX LR

Section .init.I2C4_EV_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


I2C4_EV_IRQHandler: 0x34191BAA: E7FE B I2C4_EV_IRQHandler ; 0x34191BAA

Section .text.LL_RCC_IC20_GetDivider from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_IC20_GetDivider: 0x34191BAC: F248 1010 MOVW R0, #0x8110 0x34191BB0: F2C5 6002 MOVT R0, #0x5602 0x34191BB4: 6800 LDR R0, [R0] 0x34191BB6: F400 017F AND R1, R0, #0xFF0000 0x34191BBA: 2001 MOVS R0, #1 0x34191BBC: EB00 4011 ADD.W R0, R0, R1, LSR #16 0x34191BC0: 4770 BX LR

Section .init.I2C4_ER_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


I2C4_ER_IRQHandler: 0x34191BC2: E7FE B I2C4_ER_IRQHandler ; 0x34191BC2

Section .text.LL_RCC_IC16_GetDivider from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_IC16_GetDivider: 0x34191BC4: F248 1000 MOVW R0, #0x8100 0x34191BC8: F2C5 6002 MOVT R0, #0x5602 0x34191BCC: 6800 LDR R0, [R0] 0x34191BCE: F400 017F AND R1, R0, #0xFF0000 0x34191BD2: 2001 MOVS R0, #1 0x34191BD4: EB00 4011 ADD.W R0, R0, R1, LSR #16 0x34191BD8: 4770 BX LR

Section .init.I3C1_EV_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


I3C1_EV_IRQHandler: 0x34191BDA: E7FE B I3C1_EV_IRQHandler ; 0x34191BDA

Section .text.LL_RCC_IC10_GetDivider from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_IC10_GetDivider: 0x34191BDC: F248 00E8 MOVW R0, #0x80E8 0x34191BE0: F2C5 6002 MOVT R0, #0x5602 0x34191BE4: 6800 LDR R0, [R0] 0x34191BE6: F400 017F AND R1, R0, #0xFF0000 0x34191BEA: 2001 MOVS R0, #1 0x34191BEC: EB00 4011 ADD.W R0, R0, R1, LSR #16 0x34191BF0: 4770 BX LR

Section .init.I3C1_ER_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


I3C1_ER_IRQHandler: 0x34191BF2: E7FE B I3C1_ER_IRQHandler ; 0x34191BF2

Section .text.LL_RCC_IC19_GetDivider from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_IC19_GetDivider: 0x34191BF4: F248 100C MOVW R0, #0x810C 0x34191BF8: F2C5 6002 MOVT R0, #0x5602 0x34191BFC: 6800 LDR R0, [R0] 0x34191BFE: F400 017F AND R1, R0, #0xFF0000 0x34191C02: 2001 MOVS R0, #1 0x34191C04: EB00 4011 ADD.W R0, R0, R1, LSR #16 0x34191C08: 4770 BX LR

Section .init.I3C2_EV_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


I3C2_EV_IRQHandler: 0x34191C0A: E7FE B I3C2_EV_IRQHandler ; 0x34191C0A

Section .text.LL_RCC_IC13_GetDivider from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_IC13_GetDivider: 0x34191C0C: F248 00F4 MOVW R0, #0x80F4 0x34191C10: F2C5 6002 MOVT R0, #0x5602 0x34191C14: 6800 LDR R0, [R0] 0x34191C16: F400 017F AND R1, R0, #0xFF0000 0x34191C1A: 2001 MOVS R0, #1 0x34191C1C: EB00 4011 ADD.W R0, R0, R1, LSR #16 0x34191C20: 4770 BX LR

Section .init.I3C2_ER_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


I3C2_ER_IRQHandler: 0x34191C22: E7FE B I3C2_ER_IRQHandler ; 0x34191C22

Section .text.LL_RCC_IC12_GetDivider from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_IC12_GetDivider: 0x34191C24: F248 00F0 MOVW R0, #0x80F0 0x34191C28: F2C5 6002 MOVT R0, #0x5602 0x34191C2C: 6800 LDR R0, [R0] 0x34191C2E: F400 017F AND R1, R0, #0xFF0000 0x34191C32: 2001 MOVS R0, #1 0x34191C34: EB00 4011 ADD.W R0, R0, R1, LSR #16 0x34191C38: 4770 BX LR

Section .init.TIM1_BRK_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM1_BRK_IRQHandler: 0x34191C3A: E7FE B TIM1_BRK_IRQHandler ; 0x34191C3A

Section .text.LL_RCC_IC17_GetDivider from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_IC17_GetDivider: 0x34191C3C: F248 1004 MOVW R0, #0x8104 0x34191C40: F2C5 6002 MOVT R0, #0x5602 0x34191C44: 6800 LDR R0, [R0] 0x34191C46: F400 017F AND R1, R0, #0xFF0000 0x34191C4A: 2001 MOVS R0, #1 0x34191C4C: EB00 4011 ADD.W R0, R0, R1, LSR #16 0x34191C50: 4770 BX LR

Section .init.TIM1_UP_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM1_UP_IRQHandler: 0x34191C52: E7FE B TIM1_UP_IRQHandler ; 0x34191C52

Section .text.LL_RCC_IC18_GetDivider from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_IC18_GetDivider: 0x34191C54: F248 1008 MOVW R0, #0x8108 0x34191C58: F2C5 6002 MOVT R0, #0x5602 0x34191C5C: 6800 LDR R0, [R0] 0x34191C5E: F400 017F AND R1, R0, #0xFF0000 0x34191C62: 2001 MOVS R0, #1 0x34191C64: EB00 4011 ADD.W R0, R0, R1, LSR #16 0x34191C68: 4770 BX LR

Section .init.TIM1_TRG_CCU_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM1_TRG_CCU_IRQHandler: 0x34191C6A: E7FE B TIM1_TRG_CCU_IRQHandler ; 0x34191C6A

Section .text.HAL_XSPI_SetTimeout from blto2_FSBL_lto.o, size=18, align=4


HAL_XSPI_SetTimeout: 0x34191C6C: B082 SUB SP, SP, #8 0x34191C6E: 9001 STR R0, [SP, #4] 0x34191C70: 9100 STR R1, [SP, #0] 0x34191C72: 9800 LDR R0, [SP, #0] 0x34191C74: 9901 LDR R1, [SP, #4] 0x34191C76: 6608 STR R0, [R1, #96] 0x34191C78: 2000 MOVS R0, #0 0x34191C7A: B002 ADD SP, SP, #8 0x34191C7C: 4770 BX LR

Section .init.TIM1_CC_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM1_CC_IRQHandler: 0x34191C7E: E7FE B TIM1_CC_IRQHandler ; 0x34191C7E

Section .text.HAL_XSPI_Command from blto2_FSBL_lto.o, size=1106, align=4


HAL_XSPI_Command: 0x34191C80: B580 PUSH 123R7, LR} 0x34191C82: B088 SUB SP, SP, #32 0x34191C84: 9007 STR R0, [SP, #28] 0x34191C86: 9106 STR R1, [SP, #24] 0x34191C88: 9205 STR R2, [SP, #20] 0x34191C8A: F7EF FDFF BL HAL_GetTick ; 0x3418188C 0x34191C8E: 9002 STR R0, [SP, #8] 0x34191C90: 9806 LDR R0, [SP, #24] 0x34191C92: 6800 LDR R0, [R0] 0x34191C94: B158 CBZ R0, .L1 ; 0x34191CAE 0x34191C96: 9806 LDR R0, [SP, #24] 0x34191C98: 6800 LDR R0, [R0] 0x34191C9A: 2801 CMP R0, #1 0x34191C9C: D007 BEQ 46L1 ; 0x34191CAE 0x34191C9E: 9806 LDR R0, [SP, #24] 0x34191CA0: 6800 LDR R0, [R0] 0x34191CA2: 2802 CMP R0, #2 0x34191CA4: D003 BEQ 46L1 ; 0x34191CAE 0x34191CA6: 9806 LDR R0, [SP, #24] 0x34191CA8: 6800 LDR R0, [R0] 0x34191CAA: 2803 CMP R0, #3 0x34191CAC: D100 BNE 46L2 ; 0x34191CB0
.L1: 0x34191CAE: E007 B 46L3 ; 0x34191CC0
.L2: 0x34191CB0: F244 2050 MOVW R0, #0x4250 ; 0x34194250 = .rodata..L.str.98 0x34191CB4: F2C3 4019 MOVT R0, #0x3419 ; 0x34194250 = .rodata..L.str.98 0x34191CB8: F240 3141 MOVW R1, #0x0341 0x34191CBC: F7FB FFEE BL assert_failed ; 0x3418DC9C
.L3: 0x34191CC0: 9807 LDR R0, [SP, #28] 0x34191CC2: 6880 LDR R0, [R0, #8] 0x34191CC4: BB10 CBNZ R0, .L6 ; 0x34191D0C 0x34191CC6: 9806 LDR R0, [SP, #24] 0x34191CC8: 6840 LDR R0, [R0, #4] 0x34191CCA: B1B0 CBZ R0, .L4 ; 0x34191CFA 0x34191CCC: 9806 LDR R0, [SP, #24] 0x34191CCE: 6840 LDR R0, [R0, #4] 0x34191CD0: F1B0 4F80 CMP.W R0, #0x40000000 0x34191CD4: D011 BEQ 46L4 ; 0x34191CFA 0x34191CD6: 9806 LDR R0, [SP, #24] 0x34191CD8: 6840 LDR R0, [R0, #4] 0x34191CDA: F1B0 4F00 CMP.W R0, #0x80000000 0x34191CDE: D00C BEQ 46L4 ; 0x34191CFA 0x34191CE0: 9806 LDR R0, [SP, #24] 0x34191CE2: 6840 LDR R0, [R0, #4] 0x34191CE4: F1B0 4F40 CMP.W R0, #0xC0000000 0x34191CE8: D007 BEQ 46L4 ; 0x34191CFA 0x34191CEA: 9806 LDR R0, [SP, #24] 0x34191CEC: 6840 LDR R0, [R0, #4] 0x34191CEE: B120 CBZ R0, .L4 ; 0x34191CFA 0x34191CF0: 9806 LDR R0, [SP, #24] 0x34191CF2: 6840 LDR R0, [R0, #4] 0x34191CF4: F1B0 4F00 CMP.W R0, #0x80000000 0x34191CF8: D100 BNE 46L5 ; 0x34191CFC
.L4: 0x34191CFA: E007 B 46L6 ; 0x34191D0C
.L5: 0x34191CFC: F244 2050 MOVW R0, #0x4250 ; 0x34194250 = .rodata..L.str.98 0x34191D00: F2C3 4019 MOVT R0, #0x3419 ; 0x34194250 = .rodata..L.str.98 0x34191D04: F44F 7151 MOV.W R1, #0x0344 0x34191D08: F7FB FFC8 BL assert_failed ; 0x3418DC9C
.L6: 0x34191D0C: 9806 LDR R0, [SP, #24] 0x34191D0E: 68C0 LDR R0, [R0, #12] 0x34191D10: B178 CBZ R0, .L7 ; 0x34191D32 0x34191D12: 9806 LDR R0, [SP, #24] 0x34191D14: 68C0 LDR R0, [R0, #12] 0x34191D16: 2801 CMP R0, #1 0x34191D18: D00B BEQ 46L7 ; 0x34191D32 0x34191D1A: 9806 LDR R0, [SP, #24] 0x34191D1C: 68C0 LDR R0, [R0, #12] 0x34191D1E: 2802 CMP R0, #2 0x34191D20: D007 BEQ 46L7 ; 0x34191D32 0x34191D22: 9806 LDR R0, [SP, #24] 0x34191D24: 68C0 LDR R0, [R0, #12] 0x34191D26: 2803 CMP R0, #3 0x34191D28: D003 BEQ 46L7 ; 0x34191D32 0x34191D2A: 9806 LDR R0, [SP, #24] 0x34191D2C: 68C0 LDR R0, [R0, #12] 0x34191D2E: 2804 CMP R0, #4 0x34191D30: D100 BNE 46L8 ; 0x34191D34
.L7: 0x34191D32: E007 B 46L9 ; 0x34191D44
.L8: 0x34191D34: F244 2050 MOVW R0, #0x4250 ; 0x34194250 = .rodata..L.str.98 0x34191D38: F2C3 4019 MOVT R0, #0x3419 ; 0x34194250 = .rodata..L.str.98 0x34191D3C: F240 3147 MOVW R1, #0x0347 0x34191D40: F7FB FFAC BL assert_failed ; 0x3418DC9C
.L9: 0x34191D44: 9806 LDR R0, [SP, #24] 0x34191D46: 68C0 LDR R0, [R0, #12] 0x34191D48: B338 CBZ R0, .L15 ; 0x34191D9A 0x34191D4A: 9806 LDR R0, [SP, #24] 0x34191D4C: 6900 LDR R0, [R0, #16] 0x34191D4E: B158 CBZ R0, .L10 ; 0x34191D68 0x34191D50: 9806 LDR R0, [SP, #24] 0x34191D52: 6900 LDR R0, [R0, #16] 0x34191D54: 2810 CMP R0, #16 0x34191D56: D007 BEQ 46L10 ; 0x34191D68 0x34191D58: 9806 LDR R0, [SP, #24] 0x34191D5A: 6900 LDR R0, [R0, #16] 0x34191D5C: 2820 CMP R0, #32 0x34191D5E: D003 BEQ 46L10 ; 0x34191D68 0x34191D60: 9806 LDR R0, [SP, #24] 0x34191D62: 6900 LDR R0, [R0, #16] 0x34191D64: 2830 CMP R0, #48 0x34191D66: D100 BNE 46L11 ; 0x34191D6A
.L10: 0x34191D68: E007 B 46L12 ; 0x34191D7A
.L11: 0x34191D6A: F244 2050 MOVW R0, #0x4250 ; 0x34194250 = .rodata..L.str.98 0x34191D6E: F2C3 4019 MOVT R0, #0x3419 ; 0x34194250 = .rodata..L.str.98 0x34191D72: F240 314A MOVW R1, #0x034A 0x34191D76: F7FB FF91 BL assert_failed ; 0x3418DC9C
.L12: 0x34191D7A: 9806 LDR R0, [SP, #24] 0x34191D7C: 6940 LDR R0, [R0, #20] 0x34191D7E: B118 CBZ R0, .L13 ; 0x34191D88 0x34191D80: 9806 LDR R0, [SP, #24] 0x34191D82: 6940 LDR R0, [R0, #20] 0x34191D84: 2808 CMP R0, #8 0x34191D86: D100 BNE 46L14 ; 0x34191D8A
.L13: 0x34191D88: E007 B 46L15 ; 0x34191D9A
.L14: 0x34191D8A: F244 2050 MOVW R0, #0x4250 ; 0x34194250 = .rodata..L.str.98 0x34191D8E: F2C3 4019 MOVT R0, #0x3419 ; 0x34194250 = .rodata..L.str.98 0x34191D92: F240 314B MOVW R1, #0x034B 0x34191D96: F7FB FF81 BL assert_failed ; 0x3418DC9C
.L15: 0x34191D9A: 9806 LDR R0, [SP, #24] 0x34191D9C: 69C0 LDR R0, [R0, #28] 0x34191D9E: B198 CBZ R0, .L16 ; 0x34191DC8 0x34191DA0: 9806 LDR R0, [SP, #24] 0x34191DA2: 69C0 LDR R0, [R0, #28] 0x34191DA4: F5B0 7F80 CMP.W R0, #0x0100 0x34191DA8: D00E BEQ 46L16 ; 0x34191DC8 0x34191DAA: 9806 LDR R0, [SP, #24] 0x34191DAC: 69C0 LDR R0, [R0, #28] 0x34191DAE: F5B0 7F00 CMP.W R0, #0x0200 0x34191DB2: D009 BEQ 46L16 ; 0x34191DC8 0x34191DB4: 9806 LDR R0, [SP, #24] 0x34191DB6: 69C0 LDR R0, [R0, #28] 0x34191DB8: F5B0 7F40 CMP.W R0, #0x0300 0x34191DBC: D004 BEQ 46L16 ; 0x34191DC8 0x34191DBE: 9806 LDR R0, [SP, #24] 0x34191DC0: 69C0 LDR R0, [R0, #28] 0x34191DC2: F5B0 6F80 CMP.W R0, #0x0400 0x34191DC6: D100 BNE 46L17 ; 0x34191DCA
.L16: 0x34191DC8: E007 B 46L18 ; 0x34191DDA
.L17: 0x34191DCA: F244 2050 MOVW R0, #0x4250 ; 0x34194250 = .rodata..L.str.98 0x34191DCE: F2C3 4019 MOVT R0, #0x3419 ; 0x34194250 = .rodata..L.str.98 0x34191DD2: F240 314E MOVW R1, #0x034E 0x34191DD6: F7FB FF61 BL assert_failed ; 0x3418DC9C
.L18: 0x34191DDA: 9806 LDR R0, [SP, #24] 0x34191DDC: 69C0 LDR R0, [R0, #28] 0x34191DDE: B358 CBZ R0, .L24 ; 0x34191E38 0x34191DE0: 9806 LDR R0, [SP, #24] 0x34191DE2: 6A00 LDR R0, [R0, #32] 0x34191DE4: B170 CBZ R0, .L19 ; 0x34191E04 0x34191DE6: 9806 LDR R0, [SP, #24] 0x34191DE8: 6A00 LDR R0, [R0, #32] 0x34191DEA: F5B0 5F80 CMP.W R0, #0x1000 0x34191DEE: D009 BEQ 46L19 ; 0x34191E04 0x34191DF0: 9806 LDR R0, [SP, #24] 0x34191DF2: 6A00 LDR R0, [R0, #32] 0x34191DF4: F5B0 5F00 CMP.W R0, #0x2000 0x34191DF8: D004 BEQ 46L19 ; 0x34191E04 0x34191DFA: 9806 LDR R0, [SP, #24] 0x34191DFC: 6A00 LDR R0, [R0, #32] 0x34191DFE: F5B0 5F40 CMP.W R0, #0x3000 0x34191E02: D100 BNE 46L20 ; 0x34191E06
.L19: 0x34191E04: E007 B 46L21 ; 0x34191E16
.L20: 0x34191E06: F244 2050 MOVW R0, #0x4250 ; 0x34194250 = .rodata..L.str.98 0x34191E0A: F2C3 4019 MOVT R0, #0x3419 ; 0x34194250 = .rodata..L.str.98 0x34191E0E: F240 3151 MOVW R1, #0x0351 0x34191E12: F7FB FF43 BL assert_failed ; 0x3418DC9C
.L21: 0x34191E16: 9806 LDR R0, [SP, #24] 0x34191E18: 6A40 LDR R0, [R0, #36] 0x34191E1A: B120 CBZ R0, .L22 ; 0x34191E26 0x34191E1C: 9806 LDR R0, [SP, #24] 0x34191E1E: 6A40 LDR R0, [R0, #36] 0x34191E20: F5B0 6F00 CMP.W R0, #0x0800 0x34191E24: D100 BNE 46L23 ; 0x34191E28
.L22: 0x34191E26: E007 B 46L24 ; 0x34191E38
.L23: 0x34191E28: F244 2050 MOVW R0, #0x4250 ; 0x34194250 = .rodata..L.str.98 0x34191E2C: F2C3 4019 MOVT R0, #0x3419 ; 0x34194250 = .rodata..L.str.98 0x34191E30: F240 3152 MOVW R1, #0x0352 0x34191E34: F7FB FF32 BL assert_failed ; 0x3418DC9C
.L24: 0x34191E38: 9806 LDR R0, [SP, #24] 0x34191E3A: 6AC0 LDR R0, [R0, #44] 0x34191E3C: B198 CBZ R0, .L25 ; 0x34191E66 0x34191E3E: 9806 LDR R0, [SP, #24] 0x34191E40: 6AC0 LDR R0, [R0, #44] 0x34191E42: F5B0 3F80 CMP.W R0, #0x010000 0x34191E46: D00E BEQ 46L25 ; 0x34191E66 0x34191E48: 9806 LDR R0, [SP, #24] 0x34191E4A: 6AC0 LDR R0, [R0, #44] 0x34191E4C: F5B0 3F00 CMP.W R0, #0x020000 0x34191E50: D009 BEQ 46L25 ; 0x34191E66 0x34191E52: 9806 LDR R0, [SP, #24] 0x34191E54: 6AC0 LDR R0, [R0, #44] 0x34191E56: F5B0 3F40 CMP.W R0, #0x030000 0x34191E5A: D004 BEQ 46L25 ; 0x34191E66 0x34191E5C: 9806 LDR R0, [SP, #24] 0x34191E5E: 6AC0 LDR R0, [R0, #44] 0x34191E60: F5B0 2F80 CMP.W R0, #0x040000 0x34191E64: D100 BNE 46L26 ; 0x34191E68
.L25: 0x34191E66: E007 B 46L27 ; 0x34191E78
.L26: 0x34191E68: F244 2050 MOVW R0, #0x4250 ; 0x34194250 = .rodata..L.str.98 0x34191E6C: F2C3 4019 MOVT R0, #0x3419 ; 0x34194250 = .rodata..L.str.98 0x34191E70: F240 3155 MOVW R1, #0x0355 0x34191E74: F7FB FF12 BL assert_failed ; 0x3418DC9C
.L27: 0x34191E78: 9806 LDR R0, [SP, #24] 0x34191E7A: 6AC0 LDR R0, [R0, #44] 0x34191E7C: B358 CBZ R0, .L33 ; 0x34191ED6 0x34191E7E: 9806 LDR R0, [SP, #24] 0x34191E80: 6B00 LDR R0, [R0, #48] 0x34191E82: B170 CBZ R0, .L28 ; 0x34191EA2 0x34191E84: 9806 LDR R0, [SP, #24] 0x34191E86: 6B00 LDR R0, [R0, #48] 0x34191E88: F5B0 1F80 CMP.W R0, #0x100000 0x34191E8C: D009 BEQ 46L28 ; 0x34191EA2 0x34191E8E: 9806 LDR R0, [SP, #24] 0x34191E90: 6B00 LDR R0, [R0, #48] 0x34191E92: F5B0 1F00 CMP.W R0, #0x200000 0x34191E96: D004 BEQ 46L28 ; 0x34191EA2 0x34191E98: 9806 LDR R0, [SP, #24] 0x34191E9A: 6B00 LDR R0, [R0, #48] 0x34191E9C: F5B0 1F40 CMP.W R0, #0x300000 0x34191EA0: D100 BNE 46L29 ; 0x34191EA4
.L28: 0x34191EA2: E007 B 46L30 ; 0x34191EB4
.L29: 0x34191EA4: F244 2050 MOVW R0, #0x4250 ; 0x34194250 = .rodata..L.str.98 0x34191EA8: F2C3 4019 MOVT R0, #0x3419 ; 0x34194250 = .rodata..L.str.98 0x34191EAC: F44F 7156 MOV.W R1, #0x0358 0x34191EB0: F7FB FEF4 BL assert_failed ; 0x3418DC9C
.L30: 0x34191EB4: 9806 LDR R0, [SP, #24] 0x34191EB6: 6B40 LDR R0, [R0, #52] 0x34191EB8: B120 CBZ R0, .L31 ; 0x34191EC4 0x34191EBA: 9806 LDR R0, [SP, #24] 0x34191EBC: 6B40 LDR R0, [R0, #52] 0x34191EBE: F5B0 2F00 CMP.W R0, #0x080000 0x34191EC2: D100 BNE 46L32 ; 0x34191EC6
.L31: 0x34191EC4: E007 B 46L33 ; 0x34191ED6
.L32: 0x34191EC6: F244 2050 MOVW R0, #0x4250 ; 0x34194250 = .rodata..L.str.98 0x34191ECA: F2C3 4019 MOVT R0, #0x3419 ; 0x34194250 = .rodata..L.str.98 0x34191ECE: F240 3159 MOVW R1, #0x0359 0x34191ED2: F7FB FEE3 BL assert_failed ; 0x3418DC9C
.L33: 0x34191ED6: 9807 LDR R0, [SP, #28] 0x34191ED8: 68C0 LDR R0, [R0, #12] 0x34191EDA: F1B0 6F80 CMP.W R0, #0x04000000 0x34191EDE: D10D BNE 46L34 ; 0x34191EFC 0x34191EE0: 9806 LDR R0, [SP, #24] 0x34191EE2: 6B80 LDR R0, [R0, #56] 0x34191EE4: B330 CBZ R0, .L35 ; 0x34191F34 0x34191EE6: 9806 LDR R0, [SP, #24] 0x34191EE8: 6B80 LDR R0, [R0, #56] 0x34191EEA: F1B0 6F80 CMP.W R0, #0x04000000 0x34191EEE: D021 BEQ 46L35 ; 0x34191F34 0x34191EF0: 9806 LDR R0, [SP, #24] 0x34191EF2: 6B80 LDR R0, [R0, #56] 0x34191EF4: F1B0 6FA0 CMP.W R0, #0x05000000 0x34191EF8: D01C BEQ 46L35 ; 0x34191F34 0x34191EFA: E01C B 46L36 ; 0x34191F36
.L34: 0x34191EFC: 9806 LDR R0, [SP, #24] 0x34191EFE: 6B80 LDR R0, [R0, #56] 0x34191F00: B1C0 CBZ R0, .L35 ; 0x34191F34 0x34191F02: 9806 LDR R0, [SP, #24] 0x34191F04: 6B80 LDR R0, [R0, #56] 0x34191F06: F1B0 7F80 CMP.W R0, #0x01000000 0x34191F0A: D013 BEQ 46L35 ; 0x34191F34 0x34191F0C: 9806 LDR R0, [SP, #24] 0x34191F0E: 6B80 LDR R0, [R0, #56] 0x34191F10: F1B0 7F00 CMP.W R0, #0x02000000 0x34191F14: D00E BEQ 46L35 ; 0x34191F34 0x34191F16: 9806 LDR R0, [SP, #24] 0x34191F18: 6B80 LDR R0, [R0, #56] 0x34191F1A: F1B0 7F40 CMP.W R0, #0x03000000 0x34191F1E: D009 BEQ 46L35 ; 0x34191F34 0x34191F20: 9806 LDR R0, [SP, #24] 0x34191F22: 6B80 LDR R0, [R0, #56] 0x34191F24: F1B0 6F80 CMP.W R0, #0x04000000 0x34191F28: D004 BEQ 46L35 ; 0x34191F34 0x34191F2A: 9806 LDR R0, [SP, #24] 0x34191F2C: 6B80 LDR R0, [R0, #56] 0x34191F2E: F1B0 6FA0 CMP.W R0, #0x05000000 0x34191F32: D100 BNE 46L36 ; 0x34191F36
.L35: 0x34191F34: E007 B 46L37 ; 0x34191F46
.L36: 0x34191F36: F244 2050 MOVW R0, #0x4250 ; 0x34194250 = .rodata..L.str.98 0x34191F3A: F2C3 4019 MOVT R0, #0x3419 ; 0x34194250 = .rodata..L.str.98 0x34191F3E: F44F 7157 MOV.W R1, #0x035C 0x34191F42: F7FB FEAB BL assert_failed ; 0x3418DC9C
.L37: 0x34191F46: 9806 LDR R0, [SP, #24] 0x34191F48: 6B80 LDR R0, [R0, #56] 0x34191F4A: B360 CBZ R0, .L44 ; 0x34191FA6 0x34191F4C: 9806 LDR R0, [SP, #24] 0x34191F4E: 6800 LDR R0, [R0] 0x34191F50: B958 CBNZ R0, .L39 ; 0x34191F6A 0x34191F52: 9806 LDR R0, [SP, #24] 0x34191F54: 6BC0 LDR R0, [R0, #60] 0x34191F56: B100 CBZ R0, .L38 ; 0x34191F5A 0x34191F58: E007 B 46L39 ; 0x34191F6A
.L38: 0x34191F5A: F244 2050 MOVW R0, #0x4250 ; 0x34194250 = .rodata..L.str.98 0x34191F5E: F2C3 4019 MOVT R0, #0x3419 ; 0x34194250 = .rodata..L.str.98 0x34191F62: F240 3162 MOVW R1, #0x0362 0x34191F66: F7FB FE99 BL assert_failed ; 0x3418DC9C
.L39: 0x34191F6A: 9806 LDR R0, [SP, #24] 0x34191F6C: 6C00 LDR R0, [R0, #64] 0x34191F6E: B120 CBZ R0, .L40 ; 0x34191F7A 0x34191F70: 9806 LDR R0, [SP, #24] 0x34191F72: 6C00 LDR R0, [R0, #64] 0x34191F74: F1B0 6F00 CMP.W R0, #0x08000000 0x34191F78: D100 BNE 46L41 ; 0x34191F7C
.L40: 0x34191F7A: E007 B 46L42 ; 0x34191F8C
.L41: 0x34191F7C: F244 2050 MOVW R0, #0x4250 ; 0x34194250 = .rodata..L.str.98 0x34191F80: F2C3 4019 MOVT R0, #0x3419 ; 0x34194250 = .rodata..L.str.98 0x34191F84: F44F 7159 MOV.W R1, #0x0364 0x34191F88: F7FB FE88 BL assert_failed ; 0x3418DC9C
.L42: 0x34191F8C: 9806 LDR R0, [SP, #24] 0x34191F8E: 6C40 LDR R0, [R0, #68] 0x34191F90: 281F CMP R0, #31 0x34191F92: D800 BHI 46L43 ; 0x34191F96 0x34191F94: E007 B 46L44 ; 0x34191FA6
.L43: 0x34191F96: F244 2050 MOVW R0, #0x4250 ; 0x34194250 = .rodata..L.str.98 0x34191F9A: F2C3 4019 MOVT R0, #0x3419 ; 0x34194250 = .rodata..L.str.98 0x34191F9E: F240 3165 MOVW R1, #0x0365 0x34191FA2: F7FB FE7B BL assert_failed ; 0x3418DC9C
.L44: 0x34191FA6: 9806 LDR R0, [SP, #24] 0x34191FA8: 6C80 LDR R0, [R0, #72] 0x34191FAA: B120 CBZ R0, .L45 ; 0x34191FB6 0x34191FAC: 9806 LDR R0, [SP, #24] 0x34191FAE: 6C80 LDR R0, [R0, #72] 0x34191FB0: F1B0 5F00 CMP.W R0, #0x20000000 0x34191FB4: D100 BNE 46L46 ; 0x34191FB8
.L45: 0x34191FB6: E007 B 46L47 ; 0x34191FC8
.L46: 0x34191FB8: F244 2050 MOVW R0, #0x4250 ; 0x34194250 = .rodata..L.str.98 0x34191FBC: F2C3 4019 MOVT R0, #0x3419 ; 0x34194250 = .rodata..L.str.98 0x34191FC0: F44F 715A MOV.W R1, #0x0368 0x34191FC4: F7FB FE6A BL assert_failed ; 0x3418DC9C
.L47: 0x34191FC8: 9807 LDR R0, [SP, #28] 0x34191FCA: 6D80 LDR R0, [R0, #88] 0x34191FCC: 9003 STR R0, [SP, #12] 0x34191FCE: 9803 LDR R0, [SP, #12] 0x34191FD0: 2802 CMP R0, #2 0x34191FD2: D104 BNE 46L48 ; 0x34191FDE 0x34191FD4: 9807 LDR R0, [SP, #28] 0x34191FD6: 68C0 LDR R0, [R0, #12] 0x34191FD8: F1B0 6F80 CMP.W R0, #0x04000000 0x34191FDC: D115 BNE 46L50 ; 0x3419200A
.L48: 0x34191FDE: 9803 LDR R0, [SP, #12] 0x34191FE0: 2814 CMP R0, #20 0x34191FE2: D107 BNE 46L49 ; 0x34191FF4 0x34191FE4: 9806 LDR R0, [SP, #24] 0x34191FE6: 6800 LDR R0, [R0] 0x34191FE8: 2802 CMP R0, #2 0x34191FEA: D00E BEQ 46L50 ; 0x3419200A 0x34191FEC: 9806 LDR R0, [SP, #24] 0x34191FEE: 6800 LDR R0, [R0] 0x34191FF0: 2803 CMP R0, #3 0x34191FF2: D00A BEQ 46L50 ; 0x3419200A
.L49: 0x34191FF4: 9803 LDR R0, [SP, #12] 0x34191FF6: 2824 CMP R0, #36 0x34191FF8: D161 BNE 46L61 ; 0x341920BE 0x34191FFA: 9806 LDR R0, [SP, #24] 0x34191FFC: 6800 LDR R0, [R0] 0x34191FFE: 2801 CMP R0, #1 0x34192000: D003 BEQ 46L50 ; 0x3419200A 0x34192002: 9806 LDR R0, [SP, #24] 0x34192004: 6800 LDR R0, [R0] 0x34192006: 2803 CMP R0, #3 0x34192008: D159 BNE 46L61 ; 0x341920BE
.L50: 0x3419200A: 9807 LDR R0, [SP, #28] 0x3419200C: 9B02 LDR R3, [SP, #8] 0x3419200E: 9905 LDR R1, [SP, #20] 0x34192010: 466A MOV R2, SP 0x34192012: 6011 STR R1, [R2] 0x34192014: 2120 MOVS R1, #32 0x34192016: 2200 MOVS R2, #0 0x34192018: F7F9 FABA BL XSPI_WaitFlagStateUntilTimeout ; 0x3418B590 0x3419201C: F88D 0013 STRB.W R0, [SP, #19] 0x34192020: F89D 0013 LDRB.W R0, [SP, #19] 0x34192024: 2800 CMP R0, #0 0x34192026: D146 BNE 46L59 ; 0x341920B6 0x34192028: 9907 LDR R1, [SP, #28] 0x3419202A: 2000 MOVS R0, #0 0x3419202C: 65C8 STR R0, [R1, #92] 0x3419202E: 9807 LDR R0, [SP, #28] 0x34192030: 9906 LDR R1, [SP, #24] 0x34192032: F7F9 FAE1 BL XSPI_ConfigCmd ; 0x3418B5F8 0x34192036: F88D 0013 STRB.W R0, [SP, #19] 0x3419203A: F89D 0013 LDRB.W R0, [SP, #19] 0x3419203E: BBC8 CBNZ R0, .L58 ; 0x341920B4 0x34192040: 9806 LDR R0, [SP, #24] 0x34192042: 6B80 LDR R0, [R0, #56] 0x34192044: B978 CBNZ R0, .L51 ; 0x34192066 0x34192046: 9807 LDR R0, [SP, #28] 0x34192048: 9B02 LDR R3, [SP, #8] 0x3419204A: 9905 LDR R1, [SP, #20] 0x3419204C: 466A MOV R2, SP 0x3419204E: 6011 STR R1, [R2] 0x34192050: 2120 MOVS R1, #32 0x34192052: 2200 MOVS R2, #0 0x34192054: F7F9 FA9C BL XSPI_WaitFlagStateUntilTimeout ; 0x3418B590 0x34192058: F88D 0013 STRB.W R0, [SP, #19] 0x3419205C: 9807 LDR R0, [SP, #28] 0x3419205E: 6801 LDR R1, [R0] 0x34192060: 2002 MOVS R0, #2 0x34192062: 6248 STR R0, [R1, #36] 0x34192064: E026 B 46L58 ; 0x341920B4
.L51: 0x34192066: 9806 LDR R0, [SP, #24] 0x34192068: 6800 LDR R0, [R0] 0x3419206A: B918 CBNZ R0, .L52 ; 0x34192074 0x3419206C: 9907 LDR R1, [SP, #28] 0x3419206E: 2004 MOVS R0, #4 0x34192070: 6588 STR R0, [R1, #88] 0x34192072: E01F B 46L58 ; 0x341920B4
.L52: 0x34192074: 9806 LDR R0, [SP, #24] 0x34192076: 6800 LDR R0, [R0] 0x34192078: 2801 CMP R0, #1 0x3419207A: D10B BNE 46L55 ; 0x34192094 0x3419207C: 9807 LDR R0, [SP, #28] 0x3419207E: 6D80 LDR R0, [R0, #88] 0x34192080: 2824 CMP R0, #36 0x34192082: D103 BNE 46L53 ; 0x3419208C 0x34192084: 9907 LDR R1, [SP, #28] 0x34192086: 2004 MOVS R0, #4 0x34192088: 6588 STR R0, [R1, #88] 0x3419208A: E002 B 46L54 ; 0x34192092
.L53: 0x3419208C: 9907 LDR R1, [SP, #28] 0x3419208E: 2014 MOVS R0, #20 0x34192090: 6588 STR R0, [R1, #88]
.L54: 0x34192092: E00F B 46L58 ; 0x341920B4
.L55: 0x34192094: 9806 LDR R0, [SP, #24] 0x34192096: 6800 LDR R0, [R0] 0x34192098: 2802 CMP R0, #2 0x3419209A: D10B BNE 46L58 ; 0x341920B4 0x3419209C: 9807 LDR R0, [SP, #28] 0x3419209E: 6D80 LDR R0, [R0, #88] 0x341920A0: 2814 CMP R0, #20 0x341920A2: D103 BNE 46L56 ; 0x341920AC 0x341920A4: 9907 LDR R1, [SP, #28] 0x341920A6: 2004 MOVS R0, #4 0x341920A8: 6588 STR R0, [R1, #88] 0x341920AA: E002 B 46L57 ; 0x341920B2
.L56: 0x341920AC: 9907 LDR R1, [SP, #28] 0x341920AE: 2024 MOVS R0, #36 0x341920B0: 6588 STR R0, [R1, #88]
.L57: 0x341920B2: E7FF B 46L58 ; 0x341920B4
.L58: 0x341920B4: E002 B 46L60 ; 0x341920BC
.L59: 0x341920B6: 2002 MOVS R0, #2 0x341920B8: F88D 0013 STRB.W R0, [SP, #19]
.L60: 0x341920BC: E005 B 46L62 ; 0x341920CA
.L61: 0x341920BE: 2001 MOVS R0, #1 0x341920C0: F88D 0013 STRB.W R0, [SP, #19] 0x341920C4: 9907 LDR R1, [SP, #28] 0x341920C6: 2010 MOVS R0, #16 0x341920C8: 65C8 STR R0, [R1, #92]
.L62: 0x341920CA: F89D 0013 LDRB.W R0, [SP, #19] 0x341920CE: B008 ADD SP, SP, #32 0x341920D0: BD80 POP 123R7, PC}

Section .init.TIM2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM2_IRQHandler: 0x341920D2: E7FE B TIM2_IRQHandler ; 0x341920D2

Section .text.HAL_XSPI_Transmit from blto2_FSBL_lto.o, size=226, align=4


HAL_XSPI_Transmit: 0x341920D4: B580 PUSH 123R7, LR} 0x341920D6: B088 SUB SP, SP, #32 0x341920D8: 9007 STR R0, [SP, #28] 0x341920DA: 9106 STR R1, [SP, #24] 0x341920DC: 9205 STR R2, [SP, #20] 0x341920DE: F7EF FBD5 BL HAL_GetTick ; 0x3418188C 0x341920E2: 9003 STR R0, [SP, #12] 0x341920E4: 9807 LDR R0, [SP, #28] 0x341920E6: 6800 LDR R0, [R0] 0x341920E8: 3050 ADDS R0, #80 0x341920EA: 9002 STR R0, [SP, #8] 0x341920EC: 9806 LDR R0, [SP, #24] 0x341920EE: B930 CBNZ R0, .L1 ; 0x341920FE 0x341920F0: 2001 MOVS R0, #1 0x341920F2: F88D 0013 STRB.W R0, [SP, #19] 0x341920F6: 9907 LDR R1, [SP, #28] 0x341920F8: 2008 MOVS R0, #8 0x341920FA: 65C8 STR R0, [R1, #92] 0x341920FC: E057 B 46L7 ; 0x341921AE
.L1: 0x341920FE: 9807 LDR R0, [SP, #28] 0x34192100: 6D80 LDR R0, [R0, #88] 0x34192102: 2804 CMP R0, #4 0x34192104: D14D BNE 46L6 ; 0x341921A2 0x34192106: 9807 LDR R0, [SP, #28] 0x34192108: 6800 LDR R0, [R0] 0x3419210A: 6C00 LDR R0, [R0, #64] 0x3419210C: 3001 ADDS R0, #1 0x3419210E: 9907 LDR R1, [SP, #28] 0x34192110: 64C8 STR R0, [R1, #76] 0x34192112: 9807 LDR R0, [SP, #28] 0x34192114: 6CC0 LDR R0, [R0, #76] 0x34192116: 9907 LDR R1, [SP, #28] 0x34192118: 6488 STR R0, [R1, #72] 0x3419211A: 9806 LDR R0, [SP, #24] 0x3419211C: 9907 LDR R1, [SP, #28] 0x3419211E: 6448 STR R0, [R1, #68] 0x34192120: 9807 LDR R0, [SP, #28] 0x34192122: 6800 LDR R0, [R0] 0x34192124: 6800 LDR R0, [R0] 0x34192126: F020 5040 BIC R0, R0, #0x30000000 0x3419212A: 9907 LDR R1, [SP, #28] 0x3419212C: 6809 LDR R1, [R1] 0x3419212E: 6008 STR R0, [R1]
.L2: 0x34192130: 9807 LDR R0, [SP, #28] 0x34192132: 9B03 LDR R3, [SP, #12] 0x34192134: 9905 LDR R1, [SP, #20] 0x34192136: 466A MOV R2, SP 0x34192138: 6011 STR R1, [R2] 0x3419213A: 2104 MOVS R1, #4 0x3419213C: 2201 MOVS R2, #1 0x3419213E: F7F9 FA27 BL XSPI_WaitFlagStateUntilTimeout ; 0x3418B590 0x34192142: F88D 0013 STRB.W R0, [SP, #19] 0x34192146: F89D 0013 LDRB.W R0, [SP, #19] 0x3419214A: B100 CBZ R0, .L3 ; 0x3419214E 0x3419214C: E011 B 46L4 ; 0x34192172
.L3: 0x3419214E: 9807 LDR R0, [SP, #28] 0x34192150: 6C40 LDR R0, [R0, #68] 0x34192152: 7800 LDRB R0, [R0] 0x34192154: 9902 LDR R1, [SP, #8] 0x34192156: 7008 STRB R0, [R1] 0x34192158: 9907 LDR R1, [SP, #28] 0x3419215A: 6C48 LDR R0, [R1, #68] 0x3419215C: 3001 ADDS R0, #1 0x3419215E: 6448 STR R0, [R1, #68] 0x34192160: 9907 LDR R1, [SP, #28] 0x34192162: 6CC8 LDR R0, [R1, #76] 0x34192164: 3801 SUBS R0, #1 0x34192166: 64C8 STR R0, [R1, #76] 0x34192168: 9807 LDR R0, [SP, #28] 0x3419216A: 6CC0 LDR R0, [R0, #76] 0x3419216C: B108 CBZ R0, .L4 ; 0x34192172 0x3419216E: F02F C821 LE 46L2 ; 0x34192130
.L4: 0x34192172: F89D 0013 LDRB.W R0, [SP, #19] 0x34192176: B998 CBNZ R0, .L5 ; 0x341921A0 0x34192178: 9807 LDR R0, [SP, #28] 0x3419217A: 9B03 LDR R3, [SP, #12] 0x3419217C: 9905 LDR R1, [SP, #20] 0x3419217E: 466A MOV R2, SP 0x34192180: 6011 STR R1, [R2] 0x34192182: 2102 MOVS R1, #2 0x34192184: 2201 MOVS R2, #1 0x34192186: F7F9 FA03 BL XSPI_WaitFlagStateUntilTimeout ; 0x3418B590 0x3419218A: F88D 0013 STRB.W R0, [SP, #19] 0x3419218E: F89D 0013 LDRB.W R0, [SP, #19] 0x34192192: B928 CBNZ R0, .L5 ; 0x341921A0 0x34192194: 9807 LDR R0, [SP, #28] 0x34192196: 6801 LDR R1, [R0] 0x34192198: 2002 MOVS R0, #2 0x3419219A: 6248 STR R0, [R1, #36] 0x3419219C: 9907 LDR R1, [SP, #28] 0x3419219E: 6588 STR R0, [R1, #88]
.L5: 0x341921A0: E005 B 46L7 ; 0x341921AE
.L6: 0x341921A2: 2001 MOVS R0, #1 0x341921A4: F88D 0013 STRB.W R0, [SP, #19] 0x341921A8: 9907 LDR R1, [SP, #28] 0x341921AA: 2010 MOVS R0, #16 0x341921AC: 65C8 STR R0, [R1, #92]
.L7: 0x341921AE: F89D 0013 LDRB.W R0, [SP, #19] 0x341921B2: B008 ADD SP, SP, #32 0x341921B4: BD80 POP 123R7, PC}

Section .init.TIM3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM3_IRQHandler: 0x341921B6: E7FE B TIM3_IRQHandler ; 0x341921B6

Section .text.HAL_XSPI_AutoPolling from blto2_FSBL_lto.o, size=406, align=4


HAL_XSPI_AutoPolling: 0x341921B8: B580 PUSH 123R7, LR} 0x341921BA: B08A SUB SP, SP, #40 0x341921BC: 9009 STR R0, [SP, #36] 0x341921BE: 9108 STR R1, [SP, #32] 0x341921C0: 9207 STR R2, [SP, #28] 0x341921C2: F7EF FB63 BL HAL_GetTick ; 0x3418188C 0x341921C6: 9005 STR R0, [SP, #20] 0x341921C8: 9809 LDR R0, [SP, #36] 0x341921CA: 6800 LDR R0, [R0] 0x341921CC: 6C80 LDR R0, [R0, #72] 0x341921CE: 9004 STR R0, [SP, #16] 0x341921D0: 9809 LDR R0, [SP, #36] 0x341921D2: 6800 LDR R0, [R0] 0x341921D4: F8D0 0110 LDR.W R0, [R0, #0x0110] 0x341921D8: 9003 STR R0, [SP, #12] 0x341921DA: 9809 LDR R0, [SP, #36] 0x341921DC: 6800 LDR R0, [R0] 0x341921DE: 6C00 LDR R0, [R0, #64] 0x341921E0: 9002 STR R0, [SP, #8] 0x341921E2: 9808 LDR R0, [SP, #32] 0x341921E4: 6880 LDR R0, [R0, #8] 0x341921E6: B120 CBZ R0, .L1 ; 0x341921F2 0x341921E8: 9808 LDR R0, [SP, #32] 0x341921EA: 6880 LDR R0, [R0, #8] 0x341921EC: F5B0 0F00 CMP.W R0, #0x800000 0x341921F0: D100 BNE 46L2 ; 0x341921F4
.L1: 0x341921F2: E007 B 46L3 ; 0x34192204
.L2: 0x341921F4: F244 2050 MOVW R0, #0x4250 ; 0x34194250 = .rodata..L.str.98 0x341921F8: F2C3 4019 MOVT R0, #0x3419 ; 0x34194250 = .rodata..L.str.98 0x341921FC: F240 7139 MOVW R1, #0x0739 0x34192200: F7FB FD4C BL assert_failed ; 0x3418DC9C
.L3: 0x34192204: 9808 LDR R0, [SP, #32] 0x34192206: 68C0 LDR R0, [R0, #12] 0x34192208: F5B0 0F80 CMP.W R0, #0x400000 0x3419220C: D002 BEQ 46L4 ; 0x34192214 0x3419220E: 9808 LDR R0, [SP, #32] 0x34192210: 68C0 LDR R0, [R0, #12] 0x34192212: B900 CBNZ R0, .L5 ; 0x34192216
.L4: 0x34192214: E007 B 46L6 ; 0x34192226
.L5: 0x34192216: F244 2050 MOVW R0, #0x4250 ; 0x34194250 = .rodata..L.str.98 0x3419221A: F2C3 4019 MOVT R0, #0x3419 ; 0x34194250 = .rodata..L.str.98 0x3419221E: F240 713A MOVW R1, #0x073A 0x34192222: F7FB FD3B BL assert_failed ; 0x3418DC9C
.L6: 0x34192226: 9808 LDR R0, [SP, #32] 0x34192228: 8A40 LDRH R0, [R0, #18] 0x3419222A: B900 CBNZ R0, .L7 ; 0x3419222E 0x3419222C: E007 B 46L8 ; 0x3419223E
.L7: 0x3419222E: F244 2050 MOVW R0, #0x4250 ; 0x34194250 = .rodata..L.str.98 0x34192232: F2C3 4019 MOVT R0, #0x3419 ; 0x34194250 = .rodata..L.str.98 0x34192236: F240 713B MOVW R1, #0x073B 0x3419223A: F7FB FD2F BL assert_failed ; 0x3418DC9C
.L8: 0x3419223E: 9802 LDR R0, [SP, #8] 0x34192240: 3001 ADDS R0, #1 0x34192242: B120 CBZ R0, .L9 ; 0x3419224E 0x34192244: 9802 LDR R0, [SP, #8] 0x34192246: 3001 ADDS R0, #1 0x34192248: 2804 CMP R0, #4 0x3419224A: D800 BHI 46L9 ; 0x3419224E 0x3419224C: E007 B 46L10 ; 0x3419225E
.L9: 0x3419224E: F244 2050 MOVW R0, #0x4250 ; 0x34194250 = .rodata..L.str.98 0x34192252: F2C3 4019 MOVT R0, #0x3419 ; 0x34194250 = .rodata..L.str.98 0x34192256: F240 713C MOVW R1, #0x073C 0x3419225A: F7FB FD1F BL assert_failed ; 0x3418DC9C
.L10: 0x3419225E: 9809 LDR R0, [SP, #36] 0x34192260: 6D80 LDR R0, [R0, #88] 0x34192262: 2804 CMP R0, #4 0x34192264: D169 BNE 46L17 ; 0x3419233A 0x34192266: 9808 LDR R0, [SP, #32] 0x34192268: 68C0 LDR R0, [R0, #12] 0x3419226A: F5B0 0F80 CMP.W R0, #0x400000 0x3419226E: D164 BNE 46L17 ; 0x3419233A 0x34192270: 9809 LDR R0, [SP, #36] 0x34192272: 9B05 LDR R3, [SP, #20] 0x34192274: 9907 LDR R1, [SP, #28] 0x34192276: 466A MOV R2, SP 0x34192278: 6011 STR R1, [R2] 0x3419227A: 2120 MOVS R1, #32 0x3419227C: 2200 MOVS R2, #0 0x3419227E: F7F9 F987 BL XSPI_WaitFlagStateUntilTimeout ; 0x3418B590 0x34192282: F88D 001B STRB.W R0, [SP, #27] 0x34192286: F89D 001B LDRB.W R0, [SP, #27] 0x3419228A: 2800 CMP R0, #0 0x3419228C: D151 BNE 46L15 ; 0x34192332 0x3419228E: 9808 LDR R0, [SP, #32] 0x34192290: 6800 LDR R0, [R0] 0x34192292: 9909 LDR R1, [SP, #36] 0x34192294: 6809 LDR R1, [R1] 0x34192296: F8C1 0088 STR.W R0, [R1, #136] 0x3419229A: 9808 LDR R0, [SP, #32] 0x3419229C: 6840 LDR R0, [R0, #4] 0x3419229E: 9909 LDR R1, [SP, #36] 0x341922A0: 6809 LDR R1, [R1] 0x341922A2: F8C1 0080 STR.W R0, [R1, #128] 0x341922A6: 9808 LDR R0, [SP, #32] 0x341922A8: 6900 LDR R0, [R0, #16] 0x341922AA: 9909 LDR R1, [SP, #36] 0x341922AC: 6809 LDR R1, [R1] 0x341922AE: F8C1 0090 STR.W R0, [R1, #144] 0x341922B2: 9809 LDR R0, [SP, #36] 0x341922B4: 6800 LDR R0, [R0] 0x341922B6: 6800 LDR R0, [R0] 0x341922B8: F020 5143 BIC R1, R0, #0x30C00000 0x341922BC: 9A08 LDR R2, [SP, #32] 0x341922BE: 6890 LDR R0, [R2, #8] 0x341922C0: 68D2 LDR R2, [R2, #12] 0x341922C2: 4310 ORRS R0, R2 0x341922C4: 4308 ORRS R0, R1 0x341922C6: F040 5000 ORR R0, R0, #0x20000000 0x341922CA: 9909 LDR R1, [SP, #36] 0x341922CC: 6809 LDR R1, [R1] 0x341922CE: 6008 STR R0, [R1] 0x341922D0: 9809 LDR R0, [SP, #36] 0x341922D2: 68C0 LDR R0, [R0, #12] 0x341922D4: F1B0 6F80 CMP.W R0, #0x04000000 0x341922D8: D104 BNE 46L11 ; 0x341922E4 0x341922DA: 9804 LDR R0, [SP, #16] 0x341922DC: 9909 LDR R1, [SP, #36] 0x341922DE: 6809 LDR R1, [R1] 0x341922E0: 6488 STR R0, [R1, #72] 0x341922E2: E010 B 46L13 ; 0x34192306
.L11: 0x341922E4: 9809 LDR R0, [SP, #36] 0x341922E6: 6800 LDR R0, [R0] 0x341922E8: F8D0 0100 LDR.W R0, [R0, #0x0100] 0x341922EC: F410 6FE0 TST R0, #0x0700 0x341922F0: D004 BEQ 46L12 ; 0x341922FC 0x341922F2: 9804 LDR R0, [SP, #16] 0x341922F4: 9909 LDR R1, [SP, #36] 0x341922F6: 6809 LDR R1, [R1] 0x341922F8: 6488 STR R0, [R1, #72] 0x341922FA: E004 B 46L13 ; 0x34192306
.L12: 0x341922FC: 9803 LDR R0, [SP, #12] 0x341922FE: 9909 LDR R1, [SP, #36] 0x34192300: 6809 LDR R1, [R1] 0x34192302: F8C1 0110 STR.W R0, [R1, #0x0110]
.L13: 0x34192306: 9809 LDR R0, [SP, #36] 0x34192308: 9B05 LDR R3, [SP, #20] 0x3419230A: 9907 LDR R1, [SP, #28] 0x3419230C: 466A MOV R2, SP 0x3419230E: 6011 STR R1, [R2] 0x34192310: 2108 MOVS R1, #8 0x34192312: 2201 MOVS R2, #1 0x34192314: F7F9 F93C BL XSPI_WaitFlagStateUntilTimeout ; 0x3418B590 0x34192318: F88D 001B STRB.W R0, [SP, #27] 0x3419231C: F89D 001B LDRB.W R0, [SP, #27] 0x34192320: B930 CBNZ R0, .L14 ; 0x34192330 0x34192322: 9809 LDR R0, [SP, #36] 0x34192324: 6801 LDR R1, [R0] 0x34192326: 2008 MOVS R0, #8 0x34192328: 6248 STR R0, [R1, #36] 0x3419232A: 9909 LDR R1, [SP, #36] 0x3419232C: 2002 MOVS R0, #2 0x3419232E: 6588 STR R0, [R1, #88]
.L14: 0x34192330: E002 B 46L16 ; 0x34192338
.L15: 0x34192332: 2002 MOVS R0, #2 0x34192334: F88D 001B STRB.W R0, [SP, #27]
.L16: 0x34192338: E005 B 46L18 ; 0x34192346
.L17: 0x3419233A: 2001 MOVS R0, #1 0x3419233C: F88D 001B STRB.W R0, [SP, #27] 0x34192340: 9909 LDR R1, [SP, #36] 0x34192342: 2010 MOVS R0, #16 0x34192344: 65C8 STR R0, [R1, #92]
.L18: 0x34192346: F89D 001B LDRB.W R0, [SP, #27] 0x3419234A: B00A ADD SP, SP, #40 0x3419234C: BD80 POP 123R7, PC}

Section .init.TIM4_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM4_IRQHandler: 0x3419234E: E7FE B TIM4_IRQHandler ; 0x3419234E

Section .text.HAL_XSPI_MemoryMapped from blto2_FSBL_lto.o, size=330, align=4


HAL_XSPI_MemoryMapped: 0x34192350: B580 PUSH 123R7, LR} 0x34192352: B086 SUB SP, SP, #24 0x34192354: 9005 STR R0, [SP, #20] 0x34192356: 9104 STR R1, [SP, #16] 0x34192358: F7EF FA98 BL HAL_GetTick ; 0x3418188C 0x3419235C: 9002 STR R0, [SP, #8] 0x3419235E: 9804 LDR R0, [SP, #16] 0x34192360: 6800 LDR R0, [R0] 0x34192362: B118 CBZ R0, .L1 ; 0x3419236C 0x34192364: 9804 LDR R0, [SP, #16] 0x34192366: 6800 LDR R0, [R0] 0x34192368: 2808 CMP R0, #8 0x3419236A: D100 BNE 46L2 ; 0x3419236E
.L1: 0x3419236C: E007 B 46L3 ; 0x3419237E
.L2: 0x3419236E: F244 2050 MOVW R0, #0x4250 ; 0x34194250 = .rodata..L.str.98 0x34192372: F2C3 4019 MOVT R0, #0x3419 ; 0x34194250 = .rodata..L.str.98 0x34192376: F240 71CD MOVW R1, #0x07CD 0x3419237A: F7FB FC8F BL assert_failed ; 0x3418DC9C
.L3: 0x3419237E: 9804 LDR R0, [SP, #16] 0x34192380: 6880 LDR R0, [R0, #8] 0x34192382: B120 CBZ R0, .L4 ; 0x3419238E 0x34192384: 9804 LDR R0, [SP, #16] 0x34192386: 6880 LDR R0, [R0, #8] 0x34192388: F1B0 7F00 CMP.W R0, #0x02000000 0x3419238C: D100 BNE 46L5 ; 0x34192390
.L4: 0x3419238E: E007 B 46L6 ; 0x341923A0
.L5: 0x34192390: F244 2050 MOVW R0, #0x4250 ; 0x34194250 = .rodata..L.str.98 0x34192394: F2C3 4019 MOVT R0, #0x3419 ; 0x34194250 = .rodata..L.str.98 0x34192398: F240 71CE MOVW R1, #0x07CE 0x3419239C: F7FB FC7E BL assert_failed ; 0x3418DC9C
.L6: 0x341923A0: 9805 LDR R0, [SP, #20] 0x341923A2: 6D80 LDR R0, [R0, #88] 0x341923A4: 2804 CMP R0, #4 0x341923A6: D16E BNE 46L16 ; 0x34192486 0x341923A8: 9805 LDR R0, [SP, #20] 0x341923AA: 9B02 LDR R3, [SP, #8] 0x341923AC: 6E01 LDR R1, [R0, #96] 0x341923AE: 466A MOV R2, SP 0x341923B0: 6011 STR R1, [R2] 0x341923B2: 2120 MOVS R1, #32 0x341923B4: 2200 MOVS R2, #0 0x341923B6: F7F9 F8EB BL XSPI_WaitFlagStateUntilTimeout ; 0x3418B590 0x341923BA: F88D 000F STRB.W R0, [SP, #15] 0x341923BE: F89D 000F LDRB.W R0, [SP, #15] 0x341923C2: 2800 CMP R0, #0 0x341923C4: D15E BNE 46L15 ; 0x34192484 0x341923C6: 9905 LDR R1, [SP, #20] 0x341923C8: 2088 MOVS R0, #136 0x341923CA: 6588 STR R0, [R1, #88] 0x341923CC: 9804 LDR R0, [SP, #16] 0x341923CE: 6880 LDR R0, [R0, #8] 0x341923D0: F1B0 7F00 CMP.W R0, #0x02000000 0x341923D4: D10B BNE 46L7 ; 0x341923EE 0x341923D6: 9805 LDR R0, [SP, #20] 0x341923D8: 6800 LDR R0, [R0] 0x341923DA: 6800 LDR R0, [R0] 0x341923DC: F020 7000 BIC R0, R0, #0x02000000 0x341923E0: 9904 LDR R1, [SP, #16] 0x341923E2: 6889 LDR R1, [R1, #8] 0x341923E4: 4308 ORRS R0, R1 0x341923E6: 9905 LDR R1, [SP, #20] 0x341923E8: 6809 LDR R1, [R1] 0x341923EA: 6008 STR R0, [R1] 0x341923EC: E01D B 46L11 ; 0x3419242A
.L7: 0x341923EE: 9804 LDR R0, [SP, #16] 0x341923F0: 68C0 LDR R0, [R0, #12] 0x341923F2: B120 CBZ R0, .L8 ; 0x341923FE 0x341923F4: 9804 LDR R0, [SP, #16] 0x341923F6: 68C0 LDR R0, [R0, #12] 0x341923F8: F1B0 6F80 CMP.W R0, #0x04000000 0x341923FC: D100 BNE 46L9 ; 0x34192400
.L8: 0x341923FE: E007 B 46L10 ; 0x34192410
.L9: 0x34192400: F244 2050 MOVW R0, #0x4250 ; 0x34194250 = .rodata..L.str.98 0x34192404: F2C3 4019 MOVT R0, #0x3419 ; 0x34194250 = .rodata..L.str.98 0x34192408: F240 71E2 MOVW R1, #0x07E2 0x3419240C: F7FB FC46 BL assert_failed ; 0x3418DC9C
.L10: 0x34192410: 9805 LDR R0, [SP, #20] 0x34192412: 6800 LDR R0, [R0] 0x34192414: 6800 LDR R0, [R0] 0x34192416: F020 60C0 BIC R0, R0, #0x06000000 0x3419241A: 9A04 LDR R2, [SP, #16] 0x3419241C: 6891 LDR R1, [R2, #8] 0x3419241E: 68D2 LDR R2, [R2, #12] 0x34192420: 4311 ORRS R1, R2 0x34192422: 4308 ORRS R0, R1 0x34192424: 9905 LDR R1, [SP, #20] 0x34192426: 6809 LDR R1, [R1] 0x34192428: 6008 STR R0, [R1]
.L11: 0x3419242A: 9804 LDR R0, [SP, #16] 0x3419242C: 6800 LDR R0, [R0] 0x3419242E: 2808 CMP R0, #8 0x34192430: D11B BNE 46L14 ; 0x3419246A 0x34192432: 9804 LDR R0, [SP, #16] 0x34192434: 88C0 LDRH R0, [R0, #6] 0x34192436: B900 CBNZ R0, .L12 ; 0x3419243A 0x34192438: E007 B 46L13 ; 0x3419244A
.L12: 0x3419243A: F244 2050 MOVW R0, #0x4250 ; 0x34194250 = .rodata..L.str.98 0x3419243E: F2C3 4019 MOVT R0, #0x3419 ; 0x34194250 = .rodata..L.str.98 0x34192442: F240 71EA MOVW R1, #0x07EA 0x34192446: F7FB FC29 BL assert_failed ; 0x3418DC9C
.L13: 0x3419244A: 9804 LDR R0, [SP, #16] 0x3419244C: 6840 LDR R0, [R0, #4] 0x3419244E: 9905 LDR R1, [SP, #20] 0x34192450: 6809 LDR R1, [R1] 0x34192452: F8C1 0130 STR.W R0, [R1, #0x0130] 0x34192456: 9805 LDR R0, [SP, #20] 0x34192458: 6801 LDR R1, [R0] 0x3419245A: 2010 MOVS R0, #16 0x3419245C: 6248 STR R0, [R1, #36] 0x3419245E: 9805 LDR R0, [SP, #20] 0x34192460: 6801 LDR R1, [R0] 0x34192462: 6808 LDR R0, [R1] 0x34192464: F440 1080 ORR R0, R0, #0x100000 0x34192468: 6008 STR R0, [R1]
.L14: 0x3419246A: 9805 LDR R0, [SP, #20] 0x3419246C: 6800 LDR R0, [R0] 0x3419246E: 6800 LDR R0, [R0] 0x34192470: F020 0108 BIC R1, R0, #8 0x34192474: 9804 LDR R0, [SP, #16] 0x34192476: 6800 LDR R0, [R0] 0x34192478: 4308 ORRS R0, R1 0x3419247A: F040 5040 ORR R0, R0, #0x30000000 0x3419247E: 9905 LDR R1, [SP, #20] 0x34192480: 6809 LDR R1, [R1] 0x34192482: 6008 STR R0, [R1]
.L15: 0x34192484: E005 B 46L17 ; 0x34192492
.L16: 0x34192486: 2001 MOVS R0, #1 0x34192488: F88D 000F STRB.W R0, [SP, #15] 0x3419248C: 9905 LDR R1, [SP, #20] 0x3419248E: 2010 MOVS R0, #16 0x34192490: 65C8 STR R0, [R1, #92]
.L17: 0x34192492: F89D 000F LDRB.W R0, [SP, #15] 0x34192496: B006 ADD SP, SP, #24 0x34192498: BD80 POP 123R7, PC}

Section .init.TIM5_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM5_IRQHandler: 0x3419249A: E7FE B TIM5_IRQHandler ; 0x3419249A

Section .text.HAL_XSPI_Abort from blto2_FSBL_lto.o, size=246, align=4


HAL_XSPI_Abort: 0x3419249C: B580 PUSH 123R7, LR} 0x3419249E: B084 SUB SP, SP, #16 0x341924A0: 9003 STR R0, [SP, #12] 0x341924A2: 2000 MOVS R0, #0 0x341924A4: F88D 000B STRB.W R0, [SP, #11] 0x341924A8: F7EF F9F0 BL HAL_GetTick ; 0x3418188C 0x341924AC: 9001 STR R0, [SP, #4] 0x341924AE: 9803 LDR R0, [SP, #12] 0x341924B0: 6D80 LDR R0, [R0, #88] 0x341924B2: 2800 CMP R0, #0 0x341924B4: D063 BEQ 46L6 ; 0x3419257E 0x341924B6: 9803 LDR R0, [SP, #12] 0x341924B8: 6800 LDR R0, [R0] 0x341924BA: 6800 LDR R0, [R0] 0x341924BC: 0740 LSLS R0, R0, #29 0x341924BE: 2800 CMP R0, #0 0x341924C0: D51D BPL 46L2 ; 0x341924FE 0x341924C2: 9803 LDR R0, [SP, #12] 0x341924C4: 6801 LDR R1, [R0] 0x341924C6: 6808 LDR R0, [R1] 0x341924C8: F020 0004 BIC R0, R0, #4 0x341924CC: 6008 STR R0, [R1] 0x341924CE: 9803 LDR R0, [SP, #12] 0x341924D0: 6D00 LDR R0, [R0, #80] 0x341924D2: F7EF FAD3 BL HAL_DMA_Abort ; 0x34181A7C 0x341924D6: F88D 000B STRB.W R0, [SP, #11] 0x341924DA: F89D 000B LDRB.W R0, [SP, #11] 0x341924DE: B110 CBZ R0, .L1 ; 0x341924E6 0x341924E0: 9903 LDR R1, [SP, #12] 0x341924E2: 2004 MOVS R0, #4 0x341924E4: 65C8 STR R0, [R1, #92]
.L1: 0x341924E6: 9803 LDR R0, [SP, #12] 0x341924E8: 6D40 LDR R0, [R0, #84] 0x341924EA: F7EF FAC7 BL HAL_DMA_Abort ; 0x34181A7C 0x341924EE: F88D 000B STRB.W R0, [SP, #11] 0x341924F2: F89D 000B LDRB.W R0, [SP, #11] 0x341924F6: B110 CBZ R0, .L2 ; 0x341924FE 0x341924F8: 9903 LDR R1, [SP, #12] 0x341924FA: 2004 MOVS R0, #4 0x341924FC: 65C8 STR R0, [R1, #92]
.L2: 0x341924FE: 9803 LDR R0, [SP, #12] 0x34192500: 6800 LDR R0, [R0] 0x34192502: 6A00 LDR R0, [R0, #32] 0x34192504: 0680 LSLS R0, R0, #26 0x34192506: 2800 CMP R0, #0 0x34192508: D52F BPL 46L4 ; 0x3419256A 0x3419250A: 9803 LDR R0, [SP, #12] 0x3419250C: 6801 LDR R1, [R0] 0x3419250E: 6808 LDR R0, [R1] 0x34192510: F040 0002 ORR R0, R0, #2 0x34192514: 6008 STR R0, [R1] 0x34192516: 9803 LDR R0, [SP, #12] 0x34192518: 9B01 LDR R3, [SP, #4] 0x3419251A: 6E01 LDR R1, [R0, #96] 0x3419251C: 466A MOV R2, SP 0x3419251E: 6011 STR R1, [R2] 0x34192520: 2102 MOVS R1, #2 0x34192522: 2201 MOVS R2, #1 0x34192524: F7F9 F834 BL XSPI_WaitFlagStateUntilTimeout ; 0x3418B590 0x34192528: F88D 000B STRB.W R0, [SP, #11] 0x3419252C: F89D 000B LDRB.W R0, [SP, #11] 0x34192530: B9D0 CBNZ R0, .L3 ; 0x34192568 0x34192532: 9803 LDR R0, [SP, #12] 0x34192534: 6801 LDR R1, [R0] 0x34192536: 2002 MOVS R0, #2 0x34192538: 6248 STR R0, [R1, #36] 0x3419253A: 9803 LDR R0, [SP, #12] 0x3419253C: 9B01 LDR R3, [SP, #4] 0x3419253E: 6E01 LDR R1, [R0, #96] 0x34192540: 466A MOV R2, SP 0x34192542: 6011 STR R1, [R2] 0x34192544: 2120 MOVS R1, #32 0x34192546: 2200 MOVS R2, #0 0x34192548: F7F9 F822 BL XSPI_WaitFlagStateUntilTimeout ; 0x3418B590 0x3419254C: F88D 000B STRB.W R0, [SP, #11] 0x34192550: F89D 000B LDRB.W R0, [SP, #11] 0x34192554: B940 CBNZ R0, .L3 ; 0x34192568 0x34192556: 9803 LDR R0, [SP, #12] 0x34192558: 6801 LDR R1, [R0] 0x3419255A: 6808 LDR R0, [R1] 0x3419255C: F020 5040 BIC R0, R0, #0x30000000 0x34192560: 6008 STR R0, [R1] 0x34192562: 9903 LDR R1, [SP, #12] 0x34192564: 2002 MOVS R0, #2 0x34192566: 6588 STR R0, [R1, #88]
.L3: 0x34192568: E008 B 46L5 ; 0x3419257C
.L4: 0x3419256A: 9803 LDR R0, [SP, #12] 0x3419256C: 6801 LDR R1, [R0] 0x3419256E: 6808 LDR R0, [R1] 0x34192570: F020 5040 BIC R0, R0, #0x30000000 0x34192574: 6008 STR R0, [R1] 0x34192576: 9903 LDR R1, [SP, #12] 0x34192578: 2002 MOVS R0, #2 0x3419257A: 6588 STR R0, [R1, #88]
.L5: 0x3419257C: E005 B 46L7 ; 0x3419258A
.L6: 0x3419257E: 2001 MOVS R0, #1 0x34192580: F88D 000B STRB.W R0, [SP, #11] 0x34192584: 9903 LDR R1, [SP, #12] 0x34192586: 2010 MOVS R0, #16 0x34192588: 65C8 STR R0, [R1, #92]
.L7: 0x3419258A: F89D 000B LDRB.W R0, [SP, #11] 0x3419258E: B004 ADD SP, SP, #16 0x34192590: BD80 POP 123R7, PC}

Section .init.TIM6_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM6_IRQHandler: 0x34192592: E7FE B TIM6_IRQHandler ; 0x34192592

Section .text.HAL_XSPIM_Config from blto2_FSBL_lto.o, size=878, align=4


HAL_XSPIM_Config: 0x34192594: B580 PUSH 123R7, LR} 0x34192596: B092 SUB SP, SP, #72 0x34192598: 9010 STR R0, [SP, #64] 0x3419259A: 910F STR R1, [SP, #60] 0x3419259C: 920E STR R2, [SP, #56] 0x3419259E: 2000 MOVS R0, #0 0x341925A0: F88D 0037 STRB.W R0, [SP, #55] 0x341925A4: F88D 0035 STRB.W R0, [SP, #53] 0x341925A8: A804 ADD R0, SP, #16 0x341925AA: 2124 MOVS R1, #36 0x341925AC: F7FB F8EC BL __aeabi_memclr ; 0x3418D788 0x341925B0: 980F LDR R0, [SP, #60] 0x341925B2: 6800 LDR R0, [R0] 0x341925B4: B138 CBZ R0, .L1 ; 0x341925C6 0x341925B6: 980F LDR R0, [SP, #60] 0x341925B8: 6800 LDR R0, [R0] 0x341925BA: 2810 CMP R0, #16 0x341925BC: D003 BEQ 46L1 ; 0x341925C6 0x341925BE: 980F LDR R0, [SP, #60] 0x341925C0: 6800 LDR R0, [R0] 0x341925C2: 2870 CMP R0, #112 0x341925C4: D100 BNE 46L2 ; 0x341925C8
.L1: 0x341925C6: E007 B 46L3 ; 0x341925D8
.L2: 0x341925C8: F244 2050 MOVW R0, #0x4250 ; 0x34194250 = .rodata..L.str.98 0x341925CC: F2C3 4019 MOVT R0, #0x3419 ; 0x34194250 = .rodata..L.str.98 0x341925D0: F640 310D MOVW R1, #0x0B0D 0x341925D4: F7FB FB62 BL assert_failed ; 0x3418DC9C
.L3: 0x341925D8: 980F LDR R0, [SP, #60] 0x341925DA: 6840 LDR R0, [R0, #4] 0x341925DC: B118 CBZ R0, .L4 ; 0x341925E6 0x341925DE: 980F LDR R0, [SP, #60] 0x341925E0: 6840 LDR R0, [R0, #4] 0x341925E2: 2801 CMP R0, #1 0x341925E4: D100 BNE 46L5 ; 0x341925E8
.L4: 0x341925E6: E007 B 46L6 ; 0x341925F8
.L5: 0x341925E8: F244 2050 MOVW R0, #0x4250 ; 0x34194250 = .rodata..L.str.98 0x341925EC: F2C3 4019 MOVT R0, #0x3419 ; 0x34194250 = .rodata..L.str.98 0x341925F0: F640 310E MOVW R1, #0x0B0E 0x341925F4: F7FB FB52 BL assert_failed ; 0x3418DC9C
.L6: 0x341925F8: 980F LDR R0, [SP, #60] 0x341925FA: 6880 LDR R0, [R0, #8] 0x341925FC: B128 CBZ R0, .L7 ; 0x3419260A 0x341925FE: 980F LDR R0, [SP, #60] 0x34192600: 6880 LDR R0, [R0, #8] 0x34192602: F5B0 7F80 CMP.W R0, #0x0100 0x34192606: D800 BHI 46L7 ; 0x3419260A 0x34192608: E007 B 46L8 ; 0x3419261A
.L7: 0x3419260A: F244 2050 MOVW R0, #0x4250 ; 0x34194250 = .rodata..L.str.98 0x3419260E: F2C3 4019 MOVT R0, #0x3419 ; 0x34194250 = .rodata..L.str.98 0x34192612: F640 310F MOVW R1, #0x0B0F 0x34192616: F7FB FB41 BL assert_failed ; 0x3418DC9C
.L8: 0x3419261A: 2000 MOVS R0, #0 0x3419261C: F88D 0036 STRB.W R0, [SP, #54]
.L9: 0x34192620: F89D 0036 LDRB.W R0, [SP, #54] 0x34192624: 2802 CMP R0, #2 0x34192626: D810 BHI 46L10 ; 0x3419264A 0x34192628: F89D 1036 LDRB.W R1, [SP, #54] 0x3419262C: 1C48 ADDS R0, R1, #1 0x3419262E: EB01 0241 ADD.W R2, R1, R1, LSL #1 0x34192632: A904 ADD R1, SP, #16 0x34192634: EB01 0182 ADD.W R1, R1, R2, LSL #2 0x34192638: B2C0 UXTB R0, R0 0x3419263A: F000 F963 BL XSPIM_GetConfig ; 0x34192904 0x3419263E: F89D 0036 LDRB.W R0, [SP, #54] 0x34192642: 3001 ADDS R0, #1 0x34192644: F88D 0036 STRB.W R0, [SP, #54] 0x34192648: E7EA B 46L9 ; 0x34192620
.L10: 0x3419264A: 2020 MOVS R0, #32 0x3419264C: F7F9 FA38 BL LL_AHB5_GRP1_IsEnabledClock ; 0x3418BAC0 0x34192650: B1A0 CBZ R0, .L11 ; 0x3419267C 0x34192652: F245 0000 MOVW R0, #0x5000 0x34192656: F6C5 0002 MOVT R0, #0x5802 0x3419265A: 6800 LDR R0, [R0] 0x3419265C: 07C0 LSLS R0, R0, #31 0x3419265E: B168 CBZ R0, .L11 ; 0x3419267C 0x34192660: F245 0100 MOVW R1, #0x5000 0x34192664: F6C5 0102 MOVT R1, #0x5802 0x34192668: 6808 LDR R0, [R1] 0x3419266A: F020 0001 BIC R0, R0, #1 0x3419266E: 6008 STR R0, [R1] 0x34192670: F89D 0035 LDRB.W R0, [SP, #53] 0x34192674: F040 0001 ORR R0, R0, #1 0x34192678: F88D 0035 STRB.W R0, [SP, #53]
.L11: 0x3419267C: F44F 5080 MOV.W R0, #0x1000 0x34192680: F7F9 FA1E BL LL_AHB5_GRP1_IsEnabledClock ; 0x3418BAC0 0x34192684: B1A0 CBZ R0, .L12 ; 0x341926B0 0x34192686: F24A 0000 MOVW R0, #0xA000 0x3419268A: F6C5 0002 MOVT R0, #0x5802 0x3419268E: 6800 LDR R0, [R0] 0x34192690: 07C0 LSLS R0, R0, #31 0x34192692: B168 CBZ R0, .L12 ; 0x341926B0 0x34192694: F24A 0100 MOVW R1, #0xA000 0x34192698: F6C5 0102 MOVT R1, #0x5802 0x3419269C: 6808 LDR R0, [R1] 0x3419269E: F020 0001 BIC R0, R0, #1 0x341926A2: 6008 STR R0, [R1] 0x341926A4: F89D 0035 LDRB.W R0, [SP, #53] 0x341926A8: F040 0002 ORR R0, R0, #2 0x341926AC: F88D 0035 STRB.W R0, [SP, #53]
.L12: 0x341926B0: F44F 3000 MOV.W R0, #0x020000 0x341926B4: F7F9 FA04 BL LL_AHB5_GRP1_IsEnabledClock ; 0x3418BAC0 0x341926B8: B1A0 CBZ R0, .L13 ; 0x341926E4 0x341926BA: F24D 0000 MOVW R0, #0xD000 0x341926BE: F6C5 0002 MOVT R0, #0x5802 0x341926C2: 6800 LDR R0, [R0] 0x341926C4: 07C0 LSLS R0, R0, #31 0x341926C6: B168 CBZ R0, .L13 ; 0x341926E4 0x341926C8: F24D 0100 MOVW R1, #0xD000 0x341926CC: F6C5 0102 MOVT R1, #0x5802 0x341926D0: 6808 LDR R0, [R1] 0x341926D2: F020 0001 BIC R0, R0, #1 0x341926D6: 6008 STR R0, [R1] 0x341926D8: F89D 0035 LDRB.W R0, [SP, #53] 0x341926DC: F040 0004 ORR R0, R0, #4 0x341926E0: F88D 0035 STRB.W R0, [SP, #53]
.L13: 0x341926E4: 9810 LDR R0, [SP, #64] 0x341926E6: 6800 LDR R0, [R0] 0x341926E8: F245 0100 MOVW R1, #0x5000 0x341926EC: F6C5 0102 MOVT R1, #0x5802 0x341926F0: 4288 CMP R0, R1 0x341926F2: D103 BNE 46L14 ; 0x341926FC 0x341926F4: 980F LDR R0, [SP, #60] 0x341926F6: 6840 LDR R0, [R0, #4] 0x341926F8: 9005 STR R0, [SP, #20] 0x341926FA: E02C B 46L19 ; 0x34192756
.L14: 0x341926FC: 9810 LDR R0, [SP, #64] 0x341926FE: 6800 LDR R0, [R0] 0x34192700: F24A 0100 MOVW R1, #0xA000 0x34192704: F6C5 0102 MOVT R1, #0x5802 0x34192708: 4288 CMP R0, R1 0x3419270A: D103 BNE 46L15 ; 0x34192714 0x3419270C: 980F LDR R0, [SP, #60] 0x3419270E: 6840 LDR R0, [R0, #4] 0x34192710: 9008 STR R0, [SP, #32] 0x34192712: E020 B 46L19 ; 0x34192756
.L15: 0x34192714: 9810 LDR R0, [SP, #64] 0x34192716: 6800 LDR R0, [R0] 0x34192718: F24D 0100 MOVW R1, #0xD000 0x3419271C: F6C5 0102 MOVT R1, #0x5802 0x34192720: 4288 CMP R0, R1 0x34192722: D10F BNE 46L18 ; 0x34192744 0x34192724: 980F LDR R0, [SP, #60] 0x34192726: 6840 LDR R0, [R0, #4] 0x34192728: B918 CBNZ R0, .L16 ; 0x34192732 0x3419272A: 2001 MOVS R0, #1 0x3419272C: 9005 STR R0, [SP, #20] 0x3419272E: 9008 STR R0, [SP, #32] 0x34192730: E007 B 46L17 ; 0x34192742
.L16: 0x34192732: 980F LDR R0, [SP, #60] 0x34192734: 6840 LDR R0, [R0, #4] 0x34192736: 2801 CMP R0, #1 0x34192738: D103 BNE 46L17 ; 0x34192742 0x3419273A: 2000 MOVS R0, #0 0x3419273C: 9005 STR R0, [SP, #20] 0x3419273E: 9008 STR R0, [SP, #32] 0x34192740: E7FF B 46L17 ; 0x34192742
.L17: 0x34192742: E008 B 46L19 ; 0x34192756
.L18: 0x34192744: 9910 LDR R1, [SP, #64] 0x34192746: 6DC8 LDR R0, [R1, #92] 0x34192748: F040 0008 ORR R0, R0, #8 0x3419274C: 65C8 STR R0, [R1, #92] 0x3419274E: 2001 MOVS R0, #1 0x34192750: F88D 0047 STRB.W R0, [SP, #71] 0x34192754: E0D1 B 46L41 ; 0x341928FA
.L19: 0x34192756: F24B 4000 MOVW R0, #0xB400 0x3419275A: F6C5 0002 MOVT R0, #0x5802 0x3419275E: 6800 LDR R0, [R0] 0x34192760: 9003 STR R0, [SP, #12] 0x34192762: F89D 000C LDRB.W R0, [SP, #12] 0x34192766: 06C0 LSLS R0, R0, #27 0x34192768: 2800 CMP R0, #0 0x3419276A: D514 BPL 46L24 ; 0x34192796 0x3419276C: F89D 000C LDRB.W R0, [SP, #12] 0x34192770: 0680 LSLS R0, R0, #26 0x34192772: 2800 CMP R0, #0 0x34192774: D502 BPL 46L20 ; 0x3419277C 0x34192776: 2070 MOVS R0, #112 0x34192778: 9002 STR R0, [SP, #8] 0x3419277A: E001 B 46L21 ; 0x34192780
.L20: 0x3419277C: 2010 MOVS R0, #16 0x3419277E: 9002 STR R0, [SP, #8]
.L21: 0x34192780: F89D 000C LDRB.W R0, [SP, #12] 0x34192784: 0640 LSLS R0, R0, #25 0x34192786: 2800 CMP R0, #0 0x34192788: D502 BPL 46L22 ; 0x34192790 0x3419278A: 2070 MOVS R0, #112 0x3419278C: 9001 STR R0, [SP, #4] 0x3419278E: E001 B 46L23 ; 0x34192794
.L22: 0x34192790: 2010 MOVS R0, #16 0x34192792: 9001 STR R0, [SP, #4]
.L23: 0x34192794: E002 B 46L25 ; 0x3419279C
.L24: 0x34192796: 2000 MOVS R0, #0 0x34192798: 9002 STR R0, [SP, #8] 0x3419279A: 9001 STR R0, [SP, #4]
.L25: 0x3419279C: F24B 4100 MOVW R1, #0xB400 0x341927A0: F6C5 0102 MOVT R1, #0x5802 0x341927A4: 2000 MOVS R0, #0 0x341927A6: 6008 STR R0, [R1] 0x341927A8: 6808 LDR R0, [R1] 0x341927AA: F420 007F BIC R0, R0, #0xFF0000 0x341927AE: 9A0F LDR R2, [SP, #60] 0x341927B0: 6893 LDR R3, [R2, #8] 0x341927B2: 2200 MOVS R2, #0 0x341927B4: F6CF 72FF MOVT R2, #0xFFFF 0x341927B8: EB02 4203 ADD.W R2, R2, R3, LSL #16 0x341927BC: 4310 ORRS R0, R2 0x341927BE: 6008 STR R0, [R1] 0x341927C0: 9810 LDR R0, [SP, #64] 0x341927C2: 6800 LDR R0, [R0] 0x341927C4: F245 0100 MOVW R1, #0x5000 0x341927C8: F6C5 0102 MOVT R1, #0x5802 0x341927CC: 4288 CMP R0, R1 0x341927CE: D103 BNE 46L26 ; 0x341927D8 0x341927D0: 980F LDR R0, [SP, #60] 0x341927D2: 6800 LDR R0, [R0] 0x341927D4: 9002 STR R0, [SP, #8] 0x341927D6: E00B B 46L27 ; 0x341927F0
.L26: 0x341927D8: 9810 LDR R0, [SP, #64] 0x341927DA: 6800 LDR R0, [R0] 0x341927DC: F24A 0100 MOVW R1, #0xA000 0x341927E0: F6C5 0102 MOVT R1, #0x5802 0x341927E4: 4288 CMP R0, R1 0x341927E6: D103 BNE 46L27 ; 0x341927F0 0x341927E8: 980F LDR R0, [SP, #60] 0x341927EA: 6800 LDR R0, [R0] 0x341927EC: 9001 STR R0, [SP, #4] 0x341927EE: E7FF B 46L27 ; 0x341927F0
.L27: 0x341927F0: 2000 MOVS R0, #0 0x341927F2: 9000 STR R0, [SP, #0] 0x341927F4: 9802 LDR R0, [SP, #8] 0x341927F6: B908 CBNZ R0, .L28 ; 0x341927FC 0x341927F8: 9801 LDR R0, [SP, #4] 0x341927FA: B110 CBZ R0, .L29 ; 0x34192802
.L28: 0x341927FC: 2010 MOVS R0, #16 0x341927FE: 9000 STR R0, [SP, #0] 0x34192800: E002 B 46L30 ; 0x34192808
.L29: 0x34192802: 2010 MOVS R0, #16 0x34192804: 9002 STR R0, [SP, #8] 0x34192806: 9001 STR R0, [SP, #4]
.L30: 0x34192808: 9803 LDR R0, [SP, #12] 0x3419280A: F020 0070 BIC R0, R0, #112 0x3419280E: 9003 STR R0, [SP, #12] 0x34192810: 9800 LDR R0, [SP, #0] 0x34192812: 2810 CMP R0, #16 0x34192814: D103 BNE 46L31 ; 0x3419281E 0x34192816: 9803 LDR R0, [SP, #12] 0x34192818: F040 0010 ORR R0, R0, #16 0x3419281C: 9003 STR R0, [SP, #12]
.L31: 0x3419281E: 9802 LDR R0, [SP, #8] 0x34192820: 2870 CMP R0, #112 0x34192822: D103 BNE 46L32 ; 0x3419282C 0x34192824: 9803 LDR R0, [SP, #12] 0x34192826: F040 0020 ORR R0, R0, #32 0x3419282A: 9003 STR R0, [SP, #12]
.L32: 0x3419282C: 9801 LDR R0, [SP, #4] 0x3419282E: 2870 CMP R0, #112 0x34192830: D103 BNE 46L33 ; 0x3419283A 0x34192832: 9803 LDR R0, [SP, #12] 0x34192834: F040 0040 ORR R0, R0, #64 0x34192838: 9003 STR R0, [SP, #12]
.L33: 0x3419283A: F24B 4100 MOVW R1, #0xB400 0x3419283E: F6C5 0102 MOVT R1, #0x5802 0x34192842: 6808 LDR R0, [R1] 0x34192844: 9A03 LDR R2, [SP, #12] 0x34192846: 0912 LSRS R2, R2, #4 0x34192848: F362 1006 BFI R0, R2, #4, #3 0x3419284C: 6008 STR R0, [R1] 0x3419284E: 2000 MOVS R0, #0 0x34192850: F88D 0036 STRB.W R0, [SP, #54]
.L34: 0x34192854: F89D 0036 LDRB.W R0, [SP, #54] 0x34192858: BB28 CBNZ R0, .L37 ; 0x341928A6 0x3419285A: F89D 0036 LDRB.W R0, [SP, #54] 0x3419285E: EB00 0140 ADD.W R1, R0, R0, LSL #1 0x34192862: A804 ADD R0, SP, #16 0x34192864: EB00 0181 ADD.W R1, R0, R1, LSL #2 0x34192868: 6848 LDR R0, [R1, #4] 0x3419286A: 6909 LDR R1, [R1, #16] 0x3419286C: 4288 CMP R0, R1 0x3419286E: D108 BNE 46L35 ; 0x34192882 0x34192870: F24B 4100 MOVW R1, #0xB400 0x34192874: F6C5 0102 MOVT R1, #0x5802 0x34192878: 6808 LDR R0, [R1] 0x3419287A: F040 0001 ORR R0, R0, #1 0x3419287E: 6008 STR R0, [R1] 0x34192880: E7FF B 46L35 ; 0x34192882
.L35: 0x34192882: 9805 LDR R0, [SP, #20] 0x34192884: 2801 CMP R0, #1 0x34192886: D108 BNE 46L36 ; 0x3419289A 0x34192888: F24B 4100 MOVW R1, #0xB400 0x3419288C: F6C5 0102 MOVT R1, #0x5802 0x34192890: 6808 LDR R0, [R1] 0x34192892: F040 0002 ORR R0, R0, #2 0x34192896: 6008 STR R0, [R1] 0x34192898: E7FF B 46L36 ; 0x3419289A
.L36: 0x3419289A: F89D 0036 LDRB.W R0, [SP, #54] 0x3419289E: 3001 ADDS R0, #1 0x341928A0: F88D 0036 STRB.W R0, [SP, #54] 0x341928A4: E7D6 B 46L34 ; 0x34192854
.L37: 0x341928A6: F89D 0035 LDRB.W R0, [SP, #53] 0x341928AA: 07C0 LSLS R0, R0, #31 0x341928AC: B138 CBZ R0, .L38 ; 0x341928BE 0x341928AE: F245 0100 MOVW R1, #0x5000 0x341928B2: F6C5 0102 MOVT R1, #0x5802 0x341928B6: 6808 LDR R0, [R1] 0x341928B8: F040 0001 ORR R0, R0, #1 0x341928BC: 6008 STR R0, [R1]
.L38: 0x341928BE: F89D 0035 LDRB.W R0, [SP, #53] 0x341928C2: 0780 LSLS R0, R0, #30 0x341928C4: 2800 CMP R0, #0 0x341928C6: D507 BPL 46L39 ; 0x341928D8 0x341928C8: F24A 0100 MOVW R1, #0xA000 0x341928CC: F6C5 0102 MOVT R1, #0x5802 0x341928D0: 6808 LDR R0, [R1] 0x341928D2: F040 0001 ORR R0, R0, #1 0x341928D6: 6008 STR R0, [R1]
.L39: 0x341928D8: F89D 0035 LDRB.W R0, [SP, #53] 0x341928DC: 0740 LSLS R0, R0, #29 0x341928DE: 2800 CMP R0, #0 0x341928E0: D507 BPL 46L40 ; 0x341928F2 0x341928E2: F24D 0100 MOVW R1, #0xD000 0x341928E6: F6C5 0102 MOVT R1, #0x5802 0x341928EA: 6808 LDR R0, [R1] 0x341928EC: F040 0001 ORR R0, R0, #1 0x341928F0: 6008 STR R0, [R1]
.L40: 0x341928F2: F89D 0037 LDRB.W R0, [SP, #55] 0x341928F6: F88D 0047 STRB.W R0, [SP, #71]
.L41: 0x341928FA: F89D 0047 LDRB.W R0, [SP, #71] 0x341928FE: B012 ADD SP, SP, #72 0x34192900: BD80 POP 123R7, PC}

Section .init.TIM7_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM7_IRQHandler: 0x34192902: E7FE B TIM7_IRQHandler ; 0x34192902

Section .text.XSPIM_GetConfig from blto2_FSBL_lto.o, size=210, align=4


XSPIM_GetConfig: 0x34192904: B084 SUB SP, SP, #16 0x34192906: F88D 000F STRB.W R0, [SP, #15] 0x3419290A: 9102 STR R1, [SP, #8] 0x3419290C: F89D 000F LDRB.W R0, [SP, #15] 0x34192910: 2801 CMP R0, #1 0x34192912: D12B BNE 46L6 ; 0x3419296C 0x34192914: F24B 4000 MOVW R0, #0xB400 0x34192918: F6C5 0002 MOVT R0, #0x5802 0x3419291C: 6800 LDR R0, [R0] 0x3419291E: 0780 LSLS R0, R0, #30 0x34192920: 2800 CMP R0, #0 0x34192922: D403 BMI 46L1 ; 0x3419292C 0x34192924: 9902 LDR R1, [SP, #8] 0x34192926: 2000 MOVS R0, #0 0x34192928: 6048 STR R0, [R1, #4] 0x3419292A: E002 B 46L2 ; 0x34192932
.L1: 0x3419292C: 9902 LDR R1, [SP, #8] 0x3419292E: 2001 MOVS R0, #1 0x34192930: 6048 STR R0, [R1, #4]
.L2: 0x34192932: F24B 4000 MOVW R0, #0xB400 0x34192936: F6C5 0002 MOVT R0, #0x5802 0x3419293A: 6800 LDR R0, [R0] 0x3419293C: F000 0010 AND R0, R0, #16 0x34192940: 2810 CMP R0, #16 0x34192942: D003 BEQ 46L3 ; 0x3419294C 0x34192944: 9902 LDR R1, [SP, #8] 0x34192946: 2000 MOVS R0, #0 0x34192948: 6008 STR R0, [R1] 0x3419294A: E00E B 46L5 ; 0x3419296A
.L3: 0x3419294C: F24B 4000 MOVW R0, #0xB400 0x34192950: F6C5 0002 MOVT R0, #0x5802 0x34192954: 6800 LDR R0, [R0] 0x34192956: 0680 LSLS R0, R0, #26 0x34192958: 2800 CMP R0, #0 0x3419295A: D503 BPL 46L4 ; 0x34192964 0x3419295C: 9902 LDR R1, [SP, #8] 0x3419295E: 2070 MOVS R0, #112 0x34192960: 6008 STR R0, [R1] 0x34192962: E002 B 46L5 ; 0x3419296A
.L4: 0x34192964: 9902 LDR R1, [SP, #8] 0x34192966: 2010 MOVS R0, #16 0x34192968: 6008 STR R0, [R1]
.L5: 0x3419296A: E032 B 46L11 ; 0x341929D2
.L6: 0x3419296C: F24B 4000 MOVW R0, #0xB400 0x34192970: F6C5 0002 MOVT R0, #0x5802 0x34192974: 6801 LDR R1, [R0] 0x34192976: F001 0101 AND R1, R1, #1 0x3419297A: 9101 STR R1, [SP, #4] 0x3419297C: 6800 LDR R0, [R0] 0x3419297E: F3C0 0040 UBFX R0, R0, #1, #1 0x34192982: 9000 STR R0, [SP, #0] 0x34192984: 9801 LDR R0, [SP, #4] 0x34192986: 9900 LDR R1, [SP, #0] 0x34192988: 4288 CMP R0, R1 0x3419298A: D003 BEQ 46L7 ; 0x34192994 0x3419298C: 9902 LDR R1, [SP, #8] 0x3419298E: 2000 MOVS R0, #0 0x34192990: 6048 STR R0, [R1, #4] 0x34192992: E002 B 46L8 ; 0x3419299A
.L7: 0x34192994: 9902 LDR R1, [SP, #8] 0x34192996: 2001 MOVS R0, #1 0x34192998: 6048 STR R0, [R1, #4]
.L8: 0x3419299A: F24B 4000 MOVW R0, #0xB400 0x3419299E: F6C5 0002 MOVT R0, #0x5802 0x341929A2: 6800 LDR R0, [R0] 0x341929A4: F000 0010 AND R0, R0, #16 0x341929A8: 2810 CMP R0, #16 0x341929AA: D003 BEQ 46L9 ; 0x341929B4 0x341929AC: 9902 LDR R1, [SP, #8] 0x341929AE: 2000 MOVS R0, #0 0x341929B0: 6008 STR R0, [R1] 0x341929B2: E00E B 46L11 ; 0x341929D2
.L9: 0x341929B4: F24B 4000 MOVW R0, #0xB400 0x341929B8: F6C5 0002 MOVT R0, #0x5802 0x341929BC: 6800 LDR R0, [R0] 0x341929BE: 0640 LSLS R0, R0, #25 0x341929C0: 2800 CMP R0, #0 0x341929C2: D503 BPL 46L10 ; 0x341929CC 0x341929C4: 9902 LDR R1, [SP, #8] 0x341929C6: 2070 MOVS R0, #112 0x341929C8: 6008 STR R0, [R1] 0x341929CA: E002 B 46L11 ; 0x341929D2
.L10: 0x341929CC: 9902 LDR R1, [SP, #8] 0x341929CE: 2010 MOVS R0, #16 0x341929D0: 6008 STR R0, [R1]
.L11: 0x341929D2: B004 ADD SP, SP, #16 0x341929D4: 4770 BX LR

Section .init.TIM8_BRK_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM8_BRK_IRQHandler: 0x341929D6: E7FE B TIM8_BRK_IRQHandler ; 0x341929D6

Section .text.BOOT_Application from blto2_FSBL_lto.o, size=34, align=4


BOOT_Application: 0x341929D8: B580 PUSH 123R7, LR} 0x341929DA: B082 SUB SP, SP, #8 0x341929DC: F000 F80E BL MapMemory ; 0x341929FC 0x341929E0: F88D 0007 STRB.W R0, [SP, #7] 0x341929E4: F89D 0007 LDRB.W R0, [SP, #7] 0x341929E8: B918 CBNZ R0, .L1 ; 0x341929F2 0x341929EA: F7F9 F877 BL JumpToApplication ; 0x3418BADC 0x341929EE: F88D 0007 STRB.W R0, [SP, #7]
.L1: 0x341929F2: F89D 0007 LDRB.W R0, [SP, #7] 0x341929F6: B002 ADD SP, SP, #8 0x341929F8: BD80 POP 123R7, PC}

Section .init.TIM8_UP_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM8_UP_IRQHandler: 0x341929FA: E7FE B TIM8_UP_IRQHandler ; 0x341929FA

Section .text.MapMemory from blto2_FSBL_lto.o, size=94, align=4


MapMemory: 0x341929FC: B580 PUSH 123R7, LR} 0x341929FE: B082 SUB SP, SP, #8 0x34192A00: 2000 MOVS R0, #0 0x34192A02: F88D 0007 STRB.W R0, [SP, #7] 0x34192A06: F88D 0006 STRB.W R0, [SP, #6]
.L1: 0x34192A0A: F89D 0006 LDRB.W R0, [SP, #6] 0x34192A0E: BB00 CBNZ R0, .L7 ; 0x34192A52 0x34192A10: F89D 0006 LDRB.W R0, [SP, #6] 0x34192A14: 2100 MOVS R1, #0 0x34192A16: F7FA FCB5 BL EXTMEM_MemoryMappedMode ; 0x3418D384 0x34192A1A: 4601 MOV R1, R0 0x34192A1C: 1C48 ADDS R0, R1, #1 0x34192A1E: 9100 STR R1, [SP, #0] 0x34192A20: B110 CBZ R0, .L2 ; 0x34192A28 0x34192A22: 9800 LDR R0, [SP, #0] 0x34192A24: B158 CBZ R0, .L4 ; 0x34192A3E 0x34192A26: E00B B 46L5 ; 0x34192A40
.L2: 0x34192A28: F89D 0006 LDRB.W R0, [SP, #6] 0x34192A2C: B918 CBNZ R0, .L3 ; 0x34192A36 0x34192A2E: 2004 MOVS R0, #4 0x34192A30: F88D 0007 STRB.W R0, [SP, #7] 0x34192A34: E003 B 46L4 ; 0x34192A3E
.L3: 0x34192A36: F89D 0006 LDRB.W R0, [SP, #6] 0x34192A3A: F000 FF79 BL EXTMEM_DeInit ; 0x34193930
.L4: 0x34192A3E: E002 B 46L6 ; 0x34192A46
.L5: 0x34192A40: 2003 MOVS R0, #3 0x34192A42: F88D 0007 STRB.W R0, [SP, #7]
.L6: 0x34192A46: F89D 0006 LDRB.W R0, [SP, #6] 0x34192A4A: 3001 ADDS R0, #1 0x34192A4C: F88D 0006 STRB.W R0, [SP, #6] 0x34192A50: E7DB B 46L1 ; 0x34192A0A
.L7: 0x34192A52: F89D 0007 LDRB.W R0, [SP, #7] 0x34192A56: B002 ADD SP, SP, #8 0x34192A58: BD80 POP 123R7, PC}

Section .init.TIM8_TRG_CCU_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM8_TRG_CCU_IRQHandler: 0x34192A5A: E7FE B TIM8_TRG_CCU_IRQHandler ; 0x34192A5A

Section .text.SFDP_ReadHeader from blto2_FSBL_lto.o, size=126, align=4


SFDP_ReadHeader: 0x34192A5C: B580 PUSH 123R7, LR} 0x34192A5E: B084 SUB SP, SP, #16 0x34192A60: 9003 STR R0, [SP, #12] 0x34192A62: 9102 STR R1, [SP, #8] 0x34192A64: 2000 MOVS R0, #0 0x34192A66: F88D 0006 STRB.W R0, [SP, #6]
.L1: 0x34192A6A: 9802 LDR R0, [SP, #8] 0x34192A6C: 2100 MOVS R1, #0 0x34192A6E: 6001 STR R1, [R0] 0x34192A70: 9803 LDR R0, [SP, #12] 0x34192A72: 3008 ADDS R0, #8 0x34192A74: 9A02 LDR R2, [SP, #8] 0x34192A76: 2308 MOVS R3, #8 0x34192A78: F000 FDFE BL SAL_XSPI_GetSFDP ; 0x34193678 0x34192A7C: B118 CBZ R0, .L2 ; 0x34192A86 0x34192A7E: 2003 MOVS R0, #3 0x34192A80: F88D 0007 STRB.W R0, [SP, #7] 0x34192A84: E025 B 46L7 ; 0x34192AD2
.L2: 0x34192A86: 9803 LDR R0, [SP, #12] 0x34192A88: 9902 LDR R1, [SP, #8] 0x34192A8A: 6809 LDR R1, [R1] 0x34192A8C: F7F9 F8D8 BL CheckSFDP_Signature ; 0x3418BC40 0x34192A90: 4601 MOV R1, R0 0x34192A92: 9100 STR R1, [SP, #0] 0x34192A94: B118 CBZ R0, .L3 ; 0x34192A9E 0x34192A96: 9800 LDR R0, [SP, #0] 0x34192A98: 2805 CMP R0, #5 0x34192A9A: D007 BEQ 46L4 ; 0x34192AAC 0x34192A9C: E00F B 46L5 ; 0x34192ABE
.L3: 0x34192A9E: 2000 MOVS R0, #0 0x34192AA0: F88D 0007 STRB.W R0, [SP, #7] 0x34192AA4: 2002 MOVS R0, #2 0x34192AA6: F88D 0006 STRB.W R0, [SP, #6] 0x34192AAA: E00E B 46L6 ; 0x34192ACA
.L4: 0x34192AAC: 2004 MOVS R0, #4 0x34192AAE: F88D 0007 STRB.W R0, [SP, #7] 0x34192AB2: F89D 0006 LDRB.W R0, [SP, #6] 0x34192AB6: 3001 ADDS R0, #1 0x34192AB8: F88D 0006 STRB.W R0, [SP, #6] 0x34192ABC: E005 B 46L6 ; 0x34192ACA
.L5: 0x34192ABE: 2004 MOVS R0, #4 0x34192AC0: F88D 0007 STRB.W R0, [SP, #7] 0x34192AC4: 2002 MOVS R0, #2 0x34192AC6: F88D 0006 STRB.W R0, [SP, #6]
.L6: 0x34192ACA: F89D 0006 LDRB.W R0, [SP, #6] 0x34192ACE: 2802 CMP R0, #2 0x34192AD0: D3CB BCC 46L1 ; 0x34192A6A
.L7: 0x34192AD2: F89D 0007 LDRB.W R0, [SP, #7] 0x34192AD6: B004 ADD SP, SP, #16 0x34192AD8: BD80 POP 123R7, PC}

Section .init.TIM8_CC_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM8_CC_IRQHandler: 0x34192ADA: E7FE B TIM8_CC_IRQHandler ; 0x34192ADA

Section .text.SFDP_CollectData from blto2_FSBL_lto.o, size=458, align=4


SFDP_CollectData: 0x34192ADC: B580 PUSH 123R7, LR} 0x34192ADE: B088 SUB SP, SP, #32 0x34192AE0: 9007 STR R0, [SP, #28] 0x34192AE2: 2000 MOVS R0, #0 0x34192AE4: 9001 STR R0, [SP, #4] 0x34192AE6: F88D 001B STRB.W R0, [SP, #27] 0x34192AEA: 2108 MOVS R1, #8 0x34192AEC: 9105 STR R1, [SP, #20] 0x34192AEE: 9907 LDR R1, [SP, #28] 0x34192AF0: F8C1 0094 STR.W R0, [R1, #148] 0x34192AF4: F240 1054 MOVW R0, #0x0154 ; 0x34000154 = sfdp_param_info 0x34192AF8: F2C3 4000 MOVT R0, #0x3400 ; 0x34000154 = sfdp_param_info 0x34192AFC: 2178 MOVS R1, #120 0x34192AFE: F7FA FE43 BL __aeabi_memclr ; 0x3418D788 0x34192B02: 9801 LDR R0, [SP, #4] 0x34192B04: F88D 0013 STRB.W R0, [SP, #19]
.L1: 0x34192B08: F89D 0013 LDRB.W R0, [SP, #19] 0x34192B0C: 9907 LDR R1, [SP, #28] 0x34192B0E: F891 109C LDRB.W R1, [R1, #156] 0x34192B12: 3101 ADDS R1, #1 0x34192B14: 4288 CMP R0, R1 0x34192B16: D22C BCS 46L3 ; 0x34192B72 0x34192B18: 9807 LDR R0, [SP, #28] 0x34192B1A: 9905 LDR R1, [SP, #20] 0x34192B1C: F89D 2013 LDRB.W R2, [SP, #19] 0x34192B20: EB02 0342 ADD.W R3, R2, R2, LSL #1 0x34192B24: F240 1254 MOVW R2, #0x0154 ; 0x34000154 = sfdp_param_info 0x34192B28: F2C3 4200 MOVT R2, #0x3400 ; 0x34000154 = sfdp_param_info 0x34192B2C: EB02 0283 ADD.W R2, R2, R3, LSL #2 0x34192B30: F7F9 F92E BL sfdp_get_paraminfo ; 0x3418BD90 0x34192B34: F88D 001B STRB.W R0, [SP, #27] 0x34192B38: F89D 001B LDRB.W R0, [SP, #27] 0x34192B3C: B100 CBZ R0, .L2 ; 0x34192B40 0x34192B3E: E0AE B 46L13 ; 0x34192C9E
.L2: 0x34192B40: F89D 0013 LDRB.W R0, [SP, #19] 0x34192B44: EB00 0140 ADD.W R1, R0, R0, LSL #1 0x34192B48: F240 1054 MOVW R0, #0x0154 ; 0x34000154 = sfdp_param_info 0x34192B4C: F2C3 4000 MOVT R0, #0x3400 ; 0x34000154 = sfdp_param_info 0x34192B50: F850 2021 LDR.W R2, [R0, R1, LSL #2] 0x34192B54: 9907 LDR R1, [SP, #28] 0x34192B56: F8D1 0094 LDR.W R0, [R1, #148] 0x34192B5A: 4310 ORRS R0, R2 0x34192B5C: F8C1 0094 STR.W R0, [R1, #148] 0x34192B60: 9805 LDR R0, [SP, #20] 0x34192B62: 3008 ADDS R0, #8 0x34192B64: 9005 STR R0, [SP, #20] 0x34192B66: F89D 0013 LDRB.W R0, [SP, #19] 0x34192B6A: 3001 ADDS R0, #1 0x34192B6C: F88D 0013 STRB.W R0, [SP, #19] 0x34192B70: E7CA B 46L1 ; 0x34192B08
.L3: 0x34192B72: 2000 MOVS R0, #0 0x34192B74: F88D 0012 STRB.W R0, [SP, #18]
.L4: 0x34192B78: F89D 0012 LDRB.W R0, [SP, #18] 0x34192B7C: EB00 0140 ADD.W R1, R0, R0, LSL #1 0x34192B80: F240 1054 MOVW R0, #0x0154 ; 0x34000154 = sfdp_param_info 0x34192B84: F2C3 4000 MOVT R0, #0x3400 ; 0x34000154 = sfdp_param_info 0x34192B88: F850 0021 LDR.W R0, [R0, R1, LSL #2] 0x34192B8C: 2800 CMP R0, #0 0x34192B8E: F000 8086 BEQ.W 46L13 ; 0x34192C9E 0x34192B92: 2000 MOVS R0, #0 0x34192B94: 9003 STR R0, [SP, #12] 0x34192B96: F89D 0012 LDRB.W R0, [SP, #18] 0x34192B9A: EB00 0140 ADD.W R1, R0, R0, LSL #1 0x34192B9E: F240 1054 MOVW R0, #0x0154 ; 0x34000154 = sfdp_param_info 0x34192BA2: F2C3 4000 MOVT R0, #0x3400 ; 0x34000154 = sfdp_param_info 0x34192BA6: EB00 0181 ADD.W R1, R0, R1, LSL #2 0x34192BAA: 7A09 LDRB R1, [R1, #8] 0x34192BAC: 9102 STR R1, [SP, #8] 0x34192BAE: F89D 1012 LDRB.W R1, [SP, #18] 0x34192BB2: EB01 0141 ADD.W R1, R1, R1, LSL #1 0x34192BB6: F850 0021 LDR.W R0, [R0, R1, LSL #2] 0x34192BBA: 9000 STR R0, [SP, #0] 0x34192BBC: 2808 CMP R0, #8 0x34192BBE: D00E BEQ 46L5 ; 0x34192BDE 0x34192BC0: 9800 LDR R0, [SP, #0] 0x34192BC2: 2840 CMP R0, #64 0x34192BC4: D01E BEQ 46L6 ; 0x34192C04 0x34192BC6: 9800 LDR R0, [SP, #0] 0x34192BC8: 2880 CMP R0, #128 0x34192BCA: D027 BEQ 46L8 ; 0x34192C1C 0x34192BCC: 9800 LDR R0, [SP, #0] 0x34192BCE: F5B0 7F00 CMP.W R0, #0x0200 0x34192BD2: D01D BEQ 46L7 ; 0x34192C10 0x34192BD4: 9800 LDR R0, [SP, #0] 0x34192BD6: F5B0 5F80 CMP.W R0, #0x1000 0x34192BDA: D025 BEQ 46L9 ; 0x34192C28 0x34192BDC: E02A B 46L10 ; 0x34192C34
.L5: 0x34192BDE: F89D 0012 LDRB.W R0, [SP, #18] 0x34192BE2: EB00 0140 ADD.W R1, R0, R0, LSL #1 0x34192BE6: F240 1054 MOVW R0, #0x0154 ; 0x34000154 = sfdp_param_info 0x34192BEA: F2C3 4000 MOVT R0, #0x3400 ; 0x34000154 = sfdp_param_info 0x34192BEE: EB00 0081 ADD.W R0, R0, R1, LSL #2 0x34192BF2: 7A01 LDRB R1, [R0, #8] 0x34192BF4: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x34192BF8: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x34192BFC: F840 1B04 STR R1, [R0], #4 0x34192C00: 9003 STR R0, [SP, #12] 0x34192C02: E017 B 46L10 ; 0x34192C34
.L6: 0x34192C04: F240 3038 MOVW R0, #0x0338 ; 0x34000338 = JEDEC_Address4Bytes 0x34192C08: F2C3 4000 MOVT R0, #0x3400 ; 0x34000338 = JEDEC_Address4Bytes 0x34192C0C: 9003 STR R0, [SP, #12] 0x34192C0E: E011 B 46L10 ; 0x34192C34
.L7: 0x34192C10: F240 10CC MOVW R0, #0x01CC ; 0x340001CC = JEDEC_SCCR_Map 0x34192C14: F2C3 4000 MOVT R0, #0x3400 ; 0x340001CC = JEDEC_SCCR_Map 0x34192C18: 9003 STR R0, [SP, #12] 0x34192C1A: E00B B 46L10 ; 0x34192C34
.L8: 0x34192C1C: F240 3020 MOVW R0, #0x0320 ; 0x34000320 = JEDEC_XSPI10 0x34192C20: F2C3 4000 MOVT R0, #0x3400 ; 0x34000320 = JEDEC_XSPI10 0x34192C24: 9003 STR R0, [SP, #12] 0x34192C26: E005 B 46L10 ; 0x34192C34
.L9: 0x34192C28: F240 3000 MOVW R0, #0x0300 ; 0x34000300 = JEDEC_OctalDdr 0x34192C2C: F2C3 4000 MOVT R0, #0x3400 ; 0x34000300 = JEDEC_OctalDdr 0x34192C30: 9003 STR R0, [SP, #12] 0x34192C32: E7FF B 46L10 ; 0x34192C34
.L10: 0x34192C34: 9803 LDR R0, [SP, #12] 0x34192C36: B1B0 CBZ R0, .L11 ; 0x34192C66 0x34192C38: 9807 LDR R0, [SP, #28] 0x34192C3A: 3008 ADDS R0, #8 0x34192C3C: F89D 1012 LDRB.W R1, [SP, #18] 0x34192C40: EB01 0241 ADD.W R2, R1, R1, LSL #1 0x34192C44: F240 1154 MOVW R1, #0x0154 ; 0x34000154 = sfdp_param_info 0x34192C48: F2C3 4100 MOVT R1, #0x3400 ; 0x34000154 = sfdp_param_info 0x34192C4C: EB01 0182 ADD.W R1, R1, R2, LSL #2 0x34192C50: 6849 LDR R1, [R1, #4] 0x34192C52: 9A03 LDR R2, [SP, #12] 0x34192C54: 9B02 LDR R3, [SP, #8] 0x34192C56: 009B LSLS R3, R3, #2 0x34192C58: F000 FD0E BL SAL_XSPI_GetSFDP ; 0x34193678 0x34192C5C: B118 CBZ R0, .L11 ; 0x34192C66 0x34192C5E: 200C MOVS R0, #12 0x34192C60: F88D 001B STRB.W R0, [SP, #27] 0x34192C64: E01B B 46L13 ; 0x34192C9E
.L11: 0x34192C66: F89D 0012 LDRB.W R0, [SP, #18] 0x34192C6A: EB00 0140 ADD.W R1, R0, R0, LSL #1 0x34192C6E: F240 1054 MOVW R0, #0x0154 ; 0x34000154 = sfdp_param_info 0x34192C72: F2C3 4000 MOVT R0, #0x3400 ; 0x34000154 = sfdp_param_info 0x34192C76: F850 0021 LDR.W R0, [R0, R1, LSL #2] 0x34192C7A: 2808 CMP R0, #8 0x34192C7C: D109 BNE 46L12 ; 0x34192C92 0x34192C7E: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x34192C82: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x34192C86: 6C00 LDR R0, [R0, #64] 0x34192C88: F3C0 2005 UBFX R0, R0, #8, #6 0x34192C8C: 9907 LDR R1, [SP, #28] 0x34192C8E: F8C1 0098 STR.W R0, [R1, #152]
.L12: 0x34192C92: F89D 0012 LDRB.W R0, [SP, #18] 0x34192C96: 3001 ADDS R0, #1 0x34192C98: F88D 0012 STRB.W R0, [SP, #18] 0x34192C9C: E76C B 46L4 ; 0x34192B78
.L13: 0x34192C9E: F89D 001B LDRB.W R0, [SP, #27] 0x34192CA2: B008 ADD SP, SP, #32 0x34192CA4: BD80 POP 123R7, PC}

Section .init.TIM9_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM9_IRQHandler: 0x34192CA6: E7FE B TIM9_IRQHandler ; 0x34192CA6

Section .text.SFDP_MemoryReset from blto2_FSBL_lto.o, size=458, align=4


SFDP_MemoryReset: 0x34192CA8: B580 PUSH 123R7, LR} 0x34192CAA: B086 SUB SP, SP, #24 0x34192CAC: 9005 STR R0, [SP, #20] 0x34192CAE: 2007 MOVS R0, #7 0x34192CB0: F88D 0012 STRB.W R0, [SP, #18] 0x34192CB4: 2008 MOVS R0, #8 0x34192CB6: 9003 STR R0, [SP, #12] 0x34192CB8: 2000 MOVS R0, #0 0x34192CBA: F88D 000B STRB.W R0, [SP, #11] 0x34192CBE: F88D 000A STRB.W R0, [SP, #10]
.L1: 0x34192CC2: F89D 000A LDRB.W R0, [SP, #10] 0x34192CC6: 9905 LDR R1, [SP, #20] 0x34192CC8: F891 109C LDRB.W R1, [R1, #156] 0x34192CCC: 3101 ADDS R1, #1 0x34192CCE: 4288 CMP R0, R1 0x34192CD0: D23F BCS 46L6 ; 0x34192D52 0x34192CD2: 9805 LDR R0, [SP, #20] 0x34192CD4: 9903 LDR R1, [SP, #12] 0x34192CD6: F240 1254 MOVW R2, #0x0154 ; 0x34000154 = sfdp_param_info 0x34192CDA: F2C3 4200 MOVT R2, #0x3400 ; 0x34000154 = sfdp_param_info 0x34192CDE: F7F9 F857 BL sfdp_get_paraminfo ; 0x3418BD90 0x34192CE2: F88D 0012 STRB.W R0, [SP, #18] 0x34192CE6: F89D 0012 LDRB.W R0, [SP, #18] 0x34192CEA: BB08 CBNZ R0, .L3 ; 0x34192D30 0x34192CEC: F240 1054 MOVW R0, #0x0154 ; 0x34000154 = sfdp_param_info 0x34192CF0: F2C3 4000 MOVT R0, #0x3400 ; 0x34000154 = sfdp_param_info 0x34192CF4: 6800 LDR R0, [R0] 0x34192CF6: 2808 CMP R0, #8 0x34192CF8: D11A BNE 46L3 ; 0x34192D30 0x34192CFA: 9805 LDR R0, [SP, #20] 0x34192CFC: 3008 ADDS R0, #8 0x34192CFE: F240 1254 MOVW R2, #0x0154 ; 0x34000154 = sfdp_param_info 0x34192D02: F2C3 4200 MOVT R2, #0x3400 ; 0x34000154 = sfdp_param_info 0x34192D06: 6851 LDR R1, [R2, #4] 0x34192D08: 7A12 LDRB R2, [R2, #8] 0x34192D0A: 0093 LSLS R3, R2, #2 0x34192D0C: F240 22A0 MOVW R2, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x34192D10: F2C3 4200 MOVT R2, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x34192D14: 3204 ADDS R2, #4 0x34192D16: F000 FCAF BL SAL_XSPI_GetSFDP ; 0x34193678 0x34192D1A: B118 CBZ R0, .L2 ; 0x34192D24 0x34192D1C: 200C MOVS R0, #12 0x34192D1E: F88D 0012 STRB.W R0, [SP, #18] 0x34192D22: E005 B 46L3 ; 0x34192D30
.L2: 0x34192D24: 2000 MOVS R0, #0 0x34192D26: F88D 0012 STRB.W R0, [SP, #18] 0x34192D2A: 2001 MOVS R0, #1 0x34192D2C: F88D 000B STRB.W R0, [SP, #11]
.L3: 0x34192D30: F89D 0012 LDRB.W R0, [SP, #18] 0x34192D34: B918 CBNZ R0, .L4 ; 0x34192D3E 0x34192D36: F89D 000B LDRB.W R0, [SP, #11] 0x34192D3A: 2801 CMP R0, #1 0x34192D3C: D100 BNE 46L5 ; 0x34192D40
.L4: 0x34192D3E: E008 B 46L6 ; 0x34192D52
.L5: 0x34192D40: 9803 LDR R0, [SP, #12] 0x34192D42: 3008 ADDS R0, #8 0x34192D44: 9003 STR R0, [SP, #12] 0x34192D46: F89D 000A LDRB.W R0, [SP, #10] 0x34192D4A: 3001 ADDS R0, #1 0x34192D4C: F88D 000A STRB.W R0, [SP, #10] 0x34192D50: E7B7 B 46L1 ; 0x34192CC2
.L6: 0x34192D52: F89D 0012 LDRB.W R0, [SP, #18] 0x34192D56: B910 CBNZ R0, .L7 ; 0x34192D5E 0x34192D58: F89D 000B LDRB.W R0, [SP, #11] 0x34192D5C: B918 CBNZ R0, .L8 ; 0x34192D66
.L7: 0x34192D5E: 200C MOVS R0, #12 0x34192D60: F88D 0012 STRB.W R0, [SP, #18] 0x34192D64: E081 B 46L21 ; 0x34192E6A
.L8: 0x34192D66: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x34192D6A: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x34192D6E: 6C00 LDR R0, [R0, #64] 0x34192D70: 0A00 LSRS R0, R0, #8 0x34192D72: 0680 LSLS R0, R0, #26 0x34192D74: B918 CBNZ R0, .L9 ; 0x34192D7E 0x34192D76: 2000 MOVS R0, #0 0x34192D78: F88D 0013 STRB.W R0, [SP, #19] 0x34192D7C: E050 B 46L16 ; 0x34192E20
.L9: 0x34192D7E: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x34192D82: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x34192D86: 6C00 LDR R0, [R0, #64] 0x34192D88: 0A00 LSRS R0, R0, #8 0x34192D8A: 07C0 LSLS R0, R0, #31 0x34192D8C: B118 CBZ R0, .L10 ; 0x34192D96 0x34192D8E: 2001 MOVS R0, #1 0x34192D90: F88D 0013 STRB.W R0, [SP, #19] 0x34192D94: E044 B 46L16 ; 0x34192E20
.L10: 0x34192D96: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x34192D9A: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x34192D9E: 6C00 LDR R0, [R0, #64] 0x34192DA0: 0A00 LSRS R0, R0, #8 0x34192DA2: 0780 LSLS R0, R0, #30 0x34192DA4: 2800 CMP R0, #0 0x34192DA6: D503 BPL 46L11 ; 0x34192DB0 0x34192DA8: 2002 MOVS R0, #2 0x34192DAA: F88D 0013 STRB.W R0, [SP, #19] 0x34192DAE: E037 B 46L16 ; 0x34192E20
.L11: 0x34192DB0: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x34192DB4: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x34192DB8: 6C00 LDR R0, [R0, #64] 0x34192DBA: 0A00 LSRS R0, R0, #8 0x34192DBC: 0740 LSLS R0, R0, #29 0x34192DBE: 2800 CMP R0, #0 0x34192DC0: D503 BPL 46L12 ; 0x34192DCA 0x34192DC2: 2003 MOVS R0, #3 0x34192DC4: F88D 0013 STRB.W R0, [SP, #19] 0x34192DC8: E02A B 46L16 ; 0x34192E20
.L12: 0x34192DCA: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x34192DCE: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x34192DD2: 6C00 LDR R0, [R0, #64] 0x34192DD4: 0A00 LSRS R0, R0, #8 0x34192DD6: 0700 LSLS R0, R0, #28 0x34192DD8: 2800 CMP R0, #0 0x34192DDA: D503 BPL 46L13 ; 0x34192DE4 0x34192DDC: 2004 MOVS R0, #4 0x34192DDE: F88D 0013 STRB.W R0, [SP, #19] 0x34192DE2: E01D B 46L16 ; 0x34192E20
.L13: 0x34192DE4: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x34192DE8: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x34192DEC: 6C00 LDR R0, [R0, #64] 0x34192DEE: 0A00 LSRS R0, R0, #8 0x34192DF0: 06C0 LSLS R0, R0, #27 0x34192DF2: 2800 CMP R0, #0 0x34192DF4: D503 BPL 46L14 ; 0x34192DFE 0x34192DF6: 2005 MOVS R0, #5 0x34192DF8: F88D 0013 STRB.W R0, [SP, #19] 0x34192DFC: E010 B 46L16 ; 0x34192E20
.L14: 0x34192DFE: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x34192E02: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x34192E06: 6C00 LDR R0, [R0, #64] 0x34192E08: 0A00 LSRS R0, R0, #8 0x34192E0A: 0680 LSLS R0, R0, #26 0x34192E0C: 2800 CMP R0, #0 0x34192E0E: D503 BPL 46L15 ; 0x34192E18 0x34192E10: 200F MOVS R0, #15 0x34192E12: F88D 0012 STRB.W R0, [SP, #18] 0x34192E16: E028 B 46L21 ; 0x34192E6A
.L15: 0x34192E18: 200C MOVS R0, #12 0x34192E1A: F88D 0012 STRB.W R0, [SP, #18] 0x34192E1E: E024 B 46L21 ; 0x34192E6A
.L16: 0x34192E20: F89D 0013 LDRB.W R0, [SP, #19] 0x34192E24: 4601 MOV R1, R0 0x34192E26: 9101 STR R1, [SP, #4] 0x34192E28: B138 CBZ R0, .L17 ; 0x34192E3A 0x34192E2A: 9801 LDR R0, [SP, #4] 0x34192E2C: 3801 SUBS R0, #1 0x34192E2E: 2804 CMP R0, #4 0x34192E30: D314 BCC 46L19 ; 0x34192E5C 0x34192E32: 9801 LDR R0, [SP, #4] 0x34192E34: 2805 CMP R0, #5 0x34192E36: D001 BEQ 46L18 ; 0x34192E3C 0x34192E38: E014 B 46L20 ; 0x34192E64
.L17: 0x34192E3A: E016 B 46L21 ; 0x34192E6A
.L18: 0x34192E3C: 9805 LDR R0, [SP, #20] 0x34192E3E: 3008 ADDS R0, #8 0x34192E40: 2166 MOVS R1, #102 0x34192E42: 2300 MOVS R3, #0 0x34192E44: 9300 STR R3, [SP, #0] 0x34192E46: 461A MOV R2, R3 0x34192E48: F7FA F902 BL SAL_XSPI_CommandSendData ; 0x3418D050 0x34192E4C: 9B00 LDR R3, [SP, #0] 0x34192E4E: 9805 LDR R0, [SP, #20] 0x34192E50: 3008 ADDS R0, #8 0x34192E52: 2199 MOVS R1, #153 0x34192E54: 461A MOV R2, R3 0x34192E56: F7FA F8FB BL SAL_XSPI_CommandSendData ; 0x3418D050 0x34192E5A: E006 B 46L21 ; 0x34192E6A
.L19: 0x34192E5C: 200F MOVS R0, #15 0x34192E5E: F88D 0012 STRB.W R0, [SP, #18] 0x34192E62: E002 B 46L21 ; 0x34192E6A
.L20: 0x34192E64: 2001 MOVS R0, #1 0x34192E66: F88D 0012 STRB.W R0, [SP, #18]
.L21: 0x34192E6A: F89D 0012 LDRB.W R0, [SP, #18] 0x34192E6E: B006 ADD SP, SP, #24 0x34192E70: BD80 POP 123R7, PC}

Section .init.TIM10_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM10_IRQHandler: 0x34192E72: E7FE B TIM10_IRQHandler ; 0x34192E72

Section .text.JEDEC_Basic_ManageQuadEnableRequirement from blto2_FSBL_lto.o, size=338, align=4


JEDEC_Basic_ManageQuadEnableRequirement: 0x34192E74: B580 PUSH 123R7, LR} 0x34192E76: B084 SUB SP, SP, #16 0x34192E78: 9003 STR R0, [SP, #12] 0x34192E7A: 200F MOVS R0, #15 0x34192E7C: F88D 000B STRB.W R0, [SP, #11] 0x34192E80: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x34192E84: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x34192E88: 6BC0 LDR R0, [R0, #60] 0x34192E8A: F3C0 5002 UBFX R0, R0, #20, #3 0x34192E8E: 4601 MOV R1, R0 0x34192E90: 9101 STR R1, [SP, #4] 0x34192E92: 2807 CMP R0, #7 0x34192E94: F200 8093 BHI.W 46L10 ; 0x34192FBE 0x34192E98: 9901 LDR R1, [SP, #4] 0x34192E9A: E8DF F001 TBB 91PC, R1] 0x34192E9E: 04 DC.B 0x04 ; '\x04' 0x34192E9F: 05 DC.B 0x05 ; '\x05' 0x34192EA0: 06 DC.B 0x06 ; '\x06' 0x34192EA1: 41 DC.B 0x41 ; 'A' 0x34192EA2: 42 DC.B 0x42 ; 'B' 0x34192EA3: 8D DC.B 0x8D ; '\x8D' 0x34192EA4: 8E DC.B 0x8E ; '\x8E' 0x34192EA5: 8F DC.B 0x8F ; '\x8F' 0x34192EA6: E08A B 46L10 ; 0x34192FBE 0x34192EA8: E089 B 46L10 ; 0x34192FBE 0x34192EAA: 9903 LDR R1, [SP, #12] 0x34192EAC: F101 0008 ADD.W R0, R1, #8 0x34192EB0: F891 1070 LDRB.W R1, [R1, #112] 0x34192EB4: 2300 MOVS R3, #0 0x34192EB6: 461A MOV R2, R3 0x34192EB8: F7FA F90E BL SAL_XSPI_SendReadCommand ; 0x3418D0D8 0x34192EBC: B118 CBZ R0, .L1 ; 0x34192EC6 0x34192EBE: 200C MOVS R0, #12 0x34192EC0: F88D 000B STRB.W R0, [SP, #11] 0x34192EC4: E07B B 46L10 ; 0x34192FBE
.L1: 0x34192EC6: 9803 LDR R0, [SP, #12] 0x34192EC8: 3008 ADDS R0, #8 0x34192ECA: 2105 MOVS R1, #5 0x34192ECC: F10D 0209 ADD.W R2, SP, #9 0x34192ED0: 2301 MOVS R3, #1 0x34192ED2: F7FA F901 BL SAL_XSPI_SendReadCommand ; 0x3418D0D8 0x34192ED6: B118 CBZ R0, .L2 ; 0x34192EE0 0x34192ED8: 200C MOVS R0, #12 0x34192EDA: F88D 000B STRB.W R0, [SP, #11] 0x34192EDE: E06E B 46L10 ; 0x34192FBE
.L2: 0x34192EE0: F89D 0009 LDRB.W R0, [SP, #9] 0x34192EE4: F040 0040 ORR R0, R0, #64 0x34192EE8: F88D 0009 STRB.W R0, [SP, #9] 0x34192EEC: 9803 LDR R0, [SP, #12] 0x34192EEE: 3008 ADDS R0, #8 0x34192EF0: F10D 0209 ADD.W R2, SP, #9 0x34192EF4: 2301 MOVS R3, #1 0x34192EF6: 4619 MOV R1, R3 0x34192EF8: F7FA F8AA BL SAL_XSPI_CommandSendData ; 0x3418D050 0x34192EFC: B118 CBZ R0, .L3 ; 0x34192F06 0x34192EFE: 200C MOVS R0, #12 0x34192F00: F88D 000B STRB.W R0, [SP, #11] 0x34192F04: E05B B 46L10 ; 0x34192FBE
.L3: 0x34192F06: 9803 LDR R0, [SP, #12] 0x34192F08: 2164 MOVS R1, #100 0x34192F0A: F000 F94F BL driver_check_FlagBUSY ; 0x341931AC 0x34192F0E: B118 CBZ R0, .L4 ; 0x34192F18 0x34192F10: 200C MOVS R0, #12 0x34192F12: F88D 000B STRB.W R0, [SP, #11] 0x34192F16: E052 B 46L10 ; 0x34192FBE
.L4: 0x34192F18: 2000 MOVS R0, #0 0x34192F1A: F88D 000B STRB.W R0, [SP, #11] 0x34192F1E: E04E B 46L10 ; 0x34192FBE 0x34192F20: E04D B 46L10 ; 0x34192FBE 0x34192F22: 9803 LDR R0, [SP, #12] 0x34192F24: 3008 ADDS R0, #8 0x34192F26: 2105 MOVS R1, #5 0x34192F28: F10D 0209 ADD.W R2, SP, #9 0x34192F2C: 2302 MOVS R3, #2 0x34192F2E: F7FA F8D3 BL SAL_XSPI_SendReadCommand ; 0x3418D0D8 0x34192F32: B118 CBZ R0, .L5 ; 0x34192F3C 0x34192F34: 200C MOVS R0, #12 0x34192F36: F88D 000B STRB.W R0, [SP, #11] 0x34192F3A: E040 B 46L10 ; 0x34192FBE
.L5: 0x34192F3C: F89D 000A LDRB.W R0, [SP, #10] 0x34192F40: F040 0002 ORR R0, R0, #2 0x34192F44: F88D 000A STRB.W R0, [SP, #10] 0x34192F48: 9903 LDR R1, [SP, #12] 0x34192F4A: F101 0008 ADD.W R0, R1, #8 0x34192F4E: F891 1070 LDRB.W R1, [R1, #112] 0x34192F52: 2300 MOVS R3, #0 0x34192F54: 461A MOV R2, R3 0x34192F56: F7FA F8BF BL SAL_XSPI_SendReadCommand ; 0x3418D0D8 0x34192F5A: B118 CBZ R0, .L6 ; 0x34192F64 0x34192F5C: 200C MOVS R0, #12 0x34192F5E: F88D 000B STRB.W R0, [SP, #11] 0x34192F62: E02C B 46L10 ; 0x34192FBE
.L6: 0x34192F64: 9803 LDR R0, [SP, #12] 0x34192F66: 3008 ADDS R0, #8 0x34192F68: 2101 MOVS R1, #1 0x34192F6A: F10D 0209 ADD.W R2, SP, #9 0x34192F6E: 2302 MOVS R3, #2 0x34192F70: F7FA F86E BL SAL_XSPI_CommandSendData ; 0x3418D050 0x34192F74: B118 CBZ R0, .L7 ; 0x34192F7E 0x34192F76: 200C MOVS R0, #12 0x34192F78: F88D 000B STRB.W R0, [SP, #11] 0x34192F7C: E01F B 46L10 ; 0x34192FBE
.L7: 0x34192F7E: 9803 LDR R0, [SP, #12] 0x34192F80: 2164 MOVS R1, #100 0x34192F82: F000 F913 BL driver_check_FlagBUSY ; 0x341931AC 0x34192F86: B118 CBZ R0, .L8 ; 0x34192F90 0x34192F88: 200C MOVS R0, #12 0x34192F8A: F88D 000B STRB.W R0, [SP, #11] 0x34192F8E: E016 B 46L10 ; 0x34192FBE
.L8: 0x34192F90: 20FF MOVS R0, #255 0x34192F92: F88D 000A STRB.W R0, [SP, #10] 0x34192F96: 9803 LDR R0, [SP, #12] 0x34192F98: 3008 ADDS R0, #8 0x34192F9A: 2105 MOVS R1, #5 0x34192F9C: F10D 0209 ADD.W R2, SP, #9 0x34192FA0: 2302 MOVS R3, #2 0x34192FA2: F7FA F899 BL SAL_XSPI_SendReadCommand ; 0x3418D0D8 0x34192FA6: B118 CBZ R0, .L9 ; 0x34192FB0 0x34192FA8: 200C MOVS R0, #12 0x34192FAA: F88D 000B STRB.W R0, [SP, #11] 0x34192FAE: E006 B 46L10 ; 0x34192FBE
.L9: 0x34192FB0: 2000 MOVS R0, #0 0x34192FB2: F88D 000B STRB.W R0, [SP, #11] 0x34192FB6: E002 B 46L10 ; 0x34192FBE 0x34192FB8: E001 B 46L10 ; 0x34192FBE 0x34192FBA: E000 B 46L10 ; 0x34192FBE 0x34192FBC: E7FF B 46L10 ; 0x34192FBE
.L10: 0x34192FBE: F89D 000B LDRB.W R0, [SP, #11] 0x34192FC2: B004 ADD SP, SP, #16 0x34192FC4: BD80 POP 123R7, PC}

Section .init.TIM11_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM11_IRQHandler: 0x34192FC6: E7FE B TIM11_IRQHandler ; 0x34192FC6

Section .text.sfdp_enter_octal_mode from blto2_FSBL_lto.o, size=482, align=4


sfdp_enter_octal_mode: 0x34192FC8: B580 PUSH 123R7, LR} 0x34192FCA: B088 SUB SP, SP, #32 0x34192FCC: 9007 STR R0, [SP, #28] 0x34192FCE: 2000 MOVS R0, #0 0x34192FD0: F88D 001B STRB.W R0, [SP, #27] 0x34192FD4: F240 3000 MOVW R0, #0x0300 ; 0x34000300 = JEDEC_OctalDdr 0x34192FD8: F2C3 4000 MOVT R0, #0x3400 ; 0x34000300 = JEDEC_OctalDdr 0x34192FDC: 78C0 LDRB R0, [R0, #3] 0x34192FDE: B358 CBZ R0, .L1 ; 0x34193038 0x34192FE0: F240 3300 MOVW R3, #0x0300 ; 0x34000300 = JEDEC_OctalDdr 0x34192FE4: F2C3 4300 MOVT R3, #0x3400 ; 0x34000300 = JEDEC_OctalDdr 0x34192FE8: 9304 STR R3, [SP, #16] 0x34192FEA: 8858 LDRH R0, [R3, #2] 0x34192FEC: F88D 0014 STRB.W R0, [SP, #20] 0x34192FF0: 6818 LDR R0, [R3] 0x34192FF2: 0A00 LSRS R0, R0, #8 0x34192FF4: A905 ADD R1, SP, #20 0x34192FF6: 1C4A ADDS R2, R1, #1 0x34192FF8: F88D 0015 STRB.W R0, [SP, #21] 0x34192FFC: 6818 LDR R0, [R3] 0x34192FFE: F88D 0016 STRB.W R0, [SP, #22] 0x34193002: 79D8 LDRB R0, [R3, #7] 0x34193004: F88D 0017 STRB.W R0, [SP, #23] 0x34193008: 88D8 LDRH R0, [R3, #6] 0x3419300A: F88D 0018 STRB.W R0, [SP, #24] 0x3419300E: 6858 LDR R0, [R3, #4] 0x34193010: 0A00 LSRS R0, R0, #8 0x34193012: F88D 0019 STRB.W R0, [SP, #25] 0x34193016: 6858 LDR R0, [R3, #4] 0x34193018: F88D 001A STRB.W R0, [SP, #26] 0x3419301C: 9807 LDR R0, [SP, #28] 0x3419301E: 3008 ADDS R0, #8 0x34193020: F89D 1014 LDRB.W R1, [SP, #20] 0x34193024: 78DB LDRB R3, [R3, #3] 0x34193026: 3B01 SUBS R3, #1 0x34193028: B29B UXTH R3, R3 0x3419302A: F7FA F811 BL SAL_XSPI_CommandSendData ; 0x3418D050 0x3419302E: B118 CBZ R0, .L1 ; 0x34193038 0x34193030: 200B MOVS R0, #11 0x34193032: F88D 001B STRB.W R0, [SP, #27] 0x34193036: E0B4 B 46L8 ; 0x341931A2
.L1: 0x34193038: F240 3000 MOVW R0, #0x0300 ; 0x34000300 = JEDEC_OctalDdr 0x3419303C: F2C3 4000 MOVT R0, #0x3400 ; 0x34000300 = JEDEC_OctalDdr 0x34193040: 7AC0 LDRB R0, [R0, #11] 0x34193042: B3A0 CBZ R0, .L3 ; 0x341930AE 0x34193044: 9807 LDR R0, [SP, #28] 0x34193046: 2164 MOVS R1, #100 0x34193048: F000 F8B0 BL driver_check_FlagBUSY ; 0x341931AC 0x3419304C: B118 CBZ R0, .L2 ; 0x34193056 0x3419304E: 200C MOVS R0, #12 0x34193050: F88D 001B STRB.W R0, [SP, #27] 0x34193054: E0A5 B 46L8 ; 0x341931A2
.L2: 0x34193056: F240 3300 MOVW R3, #0x0300 ; 0x34000300 = JEDEC_OctalDdr 0x3419305A: F2C3 4300 MOVT R3, #0x3400 ; 0x34000300 = JEDEC_OctalDdr 0x3419305E: 9303 STR R3, [SP, #12] 0x34193060: 8958 LDRH R0, [R3, #10] 0x34193062: F88D 0014 STRB.W R0, [SP, #20] 0x34193066: 6898 LDR R0, [R3, #8] 0x34193068: 0A00 LSRS R0, R0, #8 0x3419306A: A905 ADD R1, SP, #20 0x3419306C: 1C4A ADDS R2, R1, #1 0x3419306E: F88D 0015 STRB.W R0, [SP, #21] 0x34193072: 6898 LDR R0, [R3, #8] 0x34193074: F88D 0016 STRB.W R0, [SP, #22] 0x34193078: 7BD8 LDRB R0, [R3, #15] 0x3419307A: F88D 0017 STRB.W R0, [SP, #23] 0x3419307E: 89D8 LDRH R0, [R3, #14] 0x34193080: F88D 0018 STRB.W R0, [SP, #24] 0x34193084: 68D8 LDR R0, [R3, #12] 0x34193086: 0A00 LSRS R0, R0, #8 0x34193088: F88D 0019 STRB.W R0, [SP, #25] 0x3419308C: 68D8 LDR R0, [R3, #12] 0x3419308E: F88D 001A STRB.W R0, [SP, #26] 0x34193092: 9807 LDR R0, [SP, #28] 0x34193094: 3008 ADDS R0, #8 0x34193096: F89D 1014 LDRB.W R1, [SP, #20] 0x3419309A: 7ADB LDRB R3, [R3, #11] 0x3419309C: 3B01 SUBS R3, #1 0x3419309E: B29B UXTH R3, R3 0x341930A0: F7F9 FFD6 BL SAL_XSPI_CommandSendData ; 0x3418D050 0x341930A4: B118 CBZ R0, .L3 ; 0x341930AE 0x341930A6: 200B MOVS R0, #11 0x341930A8: F88D 001B STRB.W R0, [SP, #27] 0x341930AC: E079 B 46L8 ; 0x341931A2
.L3: 0x341930AE: F240 3000 MOVW R0, #0x0300 ; 0x34000300 = JEDEC_OctalDdr 0x341930B2: F2C3 4000 MOVT R0, #0x3400 ; 0x34000300 = JEDEC_OctalDdr 0x341930B6: 7CC0 LDRB R0, [R0, #19] 0x341930B8: B3A0 CBZ R0, .L5 ; 0x34193124 0x341930BA: 9807 LDR R0, [SP, #28] 0x341930BC: 2164 MOVS R1, #100 0x341930BE: F000 F875 BL driver_check_FlagBUSY ; 0x341931AC 0x341930C2: B118 CBZ R0, .L4 ; 0x341930CC 0x341930C4: 200C MOVS R0, #12 0x341930C6: F88D 001B STRB.W R0, [SP, #27] 0x341930CA: E06A B 46L8 ; 0x341931A2
.L4: 0x341930CC: F240 3300 MOVW R3, #0x0300 ; 0x34000300 = JEDEC_OctalDdr 0x341930D0: F2C3 4300 MOVT R3, #0x3400 ; 0x34000300 = JEDEC_OctalDdr 0x341930D4: 9302 STR R3, [SP, #8] 0x341930D6: 8A58 LDRH R0, [R3, #18] 0x341930D8: F88D 0014 STRB.W R0, [SP, #20] 0x341930DC: 6918 LDR R0, [R3, #16] 0x341930DE: 0A00 LSRS R0, R0, #8 0x341930E0: A905 ADD R1, SP, #20 0x341930E2: 1C4A ADDS R2, R1, #1 0x341930E4: F88D 0015 STRB.W R0, [SP, #21] 0x341930E8: 6918 LDR R0, [R3, #16] 0x341930EA: F88D 0016 STRB.W R0, [SP, #22] 0x341930EE: 7DD8 LDRB R0, [R3, #23] 0x341930F0: F88D 0017 STRB.W R0, [SP, #23] 0x341930F4: 8AD8 LDRH R0, [R3, #22] 0x341930F6: F88D 0018 STRB.W R0, [SP, #24] 0x341930FA: 6958 LDR R0, [R3, #20] 0x341930FC: 0A00 LSRS R0, R0, #8 0x341930FE: F88D 0019 STRB.W R0, [SP, #25] 0x34193102: 6958 LDR R0, [R3, #20] 0x34193104: F88D 001A STRB.W R0, [SP, #26] 0x34193108: 9807 LDR R0, [SP, #28] 0x3419310A: 3008 ADDS R0, #8 0x3419310C: F89D 1014 LDRB.W R1, [SP, #20] 0x34193110: 7CDB LDRB R3, [R3, #19] 0x34193112: 3B01 SUBS R3, #1 0x34193114: B29B UXTH R3, R3 0x34193116: F7F9 FF9B BL SAL_XSPI_CommandSendData ; 0x3418D050 0x3419311A: B118 CBZ R0, .L5 ; 0x34193124 0x3419311C: 200B MOVS R0, #11 0x3419311E: F88D 001B STRB.W R0, [SP, #27] 0x34193122: E03E B 46L8 ; 0x341931A2
.L5: 0x34193124: F240 3000 MOVW R0, #0x0300 ; 0x34000300 = JEDEC_OctalDdr 0x34193128: F2C3 4000 MOVT R0, #0x3400 ; 0x34000300 = JEDEC_OctalDdr 0x3419312C: 7EC0 LDRB R0, [R0, #27] 0x3419312E: B3A0 CBZ R0, .L7 ; 0x3419319A 0x34193130: 9807 LDR R0, [SP, #28] 0x34193132: 2164 MOVS R1, #100 0x34193134: F000 F83A BL driver_check_FlagBUSY ; 0x341931AC 0x34193138: B118 CBZ R0, .L6 ; 0x34193142 0x3419313A: 200C MOVS R0, #12 0x3419313C: F88D 001B STRB.W R0, [SP, #27] 0x34193140: E02F B 46L8 ; 0x341931A2
.L6: 0x34193142: F240 3300 MOVW R3, #0x0300 ; 0x34000300 = JEDEC_OctalDdr 0x34193146: F2C3 4300 MOVT R3, #0x3400 ; 0x34000300 = JEDEC_OctalDdr 0x3419314A: 9301 STR R3, [SP, #4] 0x3419314C: 8B58 LDRH R0, [R3, #26] 0x3419314E: F88D 0014 STRB.W R0, [SP, #20] 0x34193152: 6998 LDR R0, [R3, #24] 0x34193154: 0A00 LSRS R0, R0, #8 0x34193156: A905 ADD R1, SP, #20 0x34193158: 1C4A ADDS R2, R1, #1 0x3419315A: F88D 0015 STRB.W R0, [SP, #21] 0x3419315E: 6998 LDR R0, [R3, #24] 0x34193160: F88D 0016 STRB.W R0, [SP, #22] 0x34193164: 7FD8 LDRB R0, [R3, #31] 0x34193166: F88D 0017 STRB.W R0, [SP, #23] 0x3419316A: 8BD8 LDRH R0, [R3, #30] 0x3419316C: F88D 0018 STRB.W R0, [SP, #24] 0x34193170: 69D8 LDR R0, [R3, #28] 0x34193172: 0A00 LSRS R0, R0, #8 0x34193174: F88D 0019 STRB.W R0, [SP, #25] 0x34193178: 69D8 LDR R0, [R3, #28] 0x3419317A: F88D 001A STRB.W R0, [SP, #26] 0x3419317E: 9807 LDR R0, [SP, #28] 0x34193180: 3008 ADDS R0, #8 0x34193182: F89D 1014 LDRB.W R1, [SP, #20] 0x34193186: 7EDB LDRB R3, [R3, #27] 0x34193188: 3B01 SUBS R3, #1 0x3419318A: B29B UXTH R3, R3 0x3419318C: F7F9 FF60 BL SAL_XSPI_CommandSendData ; 0x3418D050 0x34193190: B118 CBZ R0, .L7 ; 0x3419319A 0x34193192: 200B MOVS R0, #11 0x34193194: F88D 001B STRB.W R0, [SP, #27] 0x34193198: E003 B 46L8 ; 0x341931A2
.L7: 0x3419319A: 9807 LDR R0, [SP, #28] 0x3419319C: 3008 ADDS R0, #8 0x3419319E: F000 FB8D BL SAL_XSPI_Abort ; 0x341938BC
.L8: 0x341931A2: F89D 001B LDRB.W R0, [SP, #27] 0x341931A6: B008 ADD SP, SP, #32 0x341931A8: BD80 POP 123R7, PC}

Section .init.TIM12_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM12_IRQHandler: 0x341931AA: E7FE B TIM12_IRQHandler ; 0x341931AA

Section .text.driver_check_FlagBUSY from blto2_FSBL_lto.o, size=102, align=4


driver_check_FlagBUSY: 0x341931AC: B5B0 PUSH 123R4-R5, R7, LR} 0x341931AE: B086 SUB SP, SP, #24 0x341931B0: 9005 STR R0, [SP, #20] 0x341931B2: 9104 STR R1, [SP, #16] 0x341931B4: 20FB MOVS R0, #251 0x341931B6: F88D 000F STRB.W R0, [SP, #15] 0x341931BA: 9805 LDR R0, [SP, #20] 0x341931BC: F890 006C LDRB.W R0, [R0, #108] 0x341931C0: B318 CBZ R0, .L1 ; 0x3419320A 0x341931C2: 9B05 LDR R3, [SP, #20] 0x341931C4: F103 0008 ADD.W R0, R3, #8 0x341931C8: F893 206F LDRB.W R2, [R3, #111] 0x341931CC: F893 405D LDRB.W R4, [R3, #93] 0x341931D0: F893 106C LDRB.W R1, [R3, #108] 0x341931D4: F893 E06D LDRB.W LR, [R3, #109] 0x341931D8: F893 306E LDRB.W R3, [R3, #110] 0x341931DC: FA03 F30E LSL.W R3, R3, LR 0x341931E0: F04F 0C01 MOV.W R12, #1 0x341931E4: FA0C FC0E LSL.W R12, R12, LR 0x341931E8: 9D04 LDR R5, [SP, #16] 0x341931EA: 46EE MOV LR, SP 0x341931EC: F8CE 5008 STR.W R5, [LR, #8] 0x341931F0: F8CE 4004 STR.W R4, [LR, #4] 0x341931F4: FA5F FC8C UXTB R12, R12 0x341931F8: F8CE C000 STR.W R12, [LR] 0x341931FC: B2DB UXTB R3, R3 0x341931FE: F7F9 FFAF BL SAL_XSPI_CheckStatusRegister ; 0x3418D160 0x34193202: B910 CBNZ R0, .L1 ; 0x3419320A 0x34193204: 2000 MOVS R0, #0 0x34193206: F88D 000F STRB.W R0, [SP, #15]
.L1: 0x3419320A: F99D 000F LDRSB.W R0, [SP, #15] 0x3419320E: B006 ADD SP, SP, #24 0x34193210: BDB0 POP 123R4-R5, R7, PC}

Section .init.TIM13_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM13_IRQHandler: 0x34193212: E7FE B TIM13_IRQHandler ; 0x34193212

Section .text.EXTMEM_DRIVER_NOR_SFDP_Init from blto2_FSBL_lto.o, size=306, align=4


EXTMEM_DRIVER_NOR_SFDP_Init: 0x34193214: B580 PUSH 123R7, LR} 0x34193216: B08C SUB SP, SP, #48 0x34193218: 900B STR R0, [SP, #44] 0x3419321A: F88D 102B STRB.W R1, [SP, #43] 0x3419321E: 9209 STR R2, [SP, #36] 0x34193220: 9308 STR R3, [SP, #32] 0x34193222: 2000 MOVS R0, #0 0x34193224: 9001 STR R0, [SP, #4] 0x34193226: F88D 001F STRB.W R0, [SP, #31] 0x3419322A: F88D 0013 STRB.W R0, [SP, #19] 0x3419322E: 9808 LDR R0, [SP, #32] 0x34193230: 3008 ADDS R0, #8 0x34193232: 2198 MOVS R1, #152 0x34193234: F7FA FAA8 BL __aeabi_memclr ; 0x3418D788 0x34193238: 9801 LDR R0, [SP, #4] 0x3419323A: F89D 102B LDRB.W R1, [SP, #43] 0x3419323E: 9A08 LDR R2, [SP, #32] 0x34193240: F882 105C STRB.W R1, [R2, #92] 0x34193244: 9908 LDR R1, [SP, #32] 0x34193246: F881 0064 STRB.W R0, [R1, #100] 0x3419324A: 9809 LDR R0, [SP, #36] 0x3419324C: 9908 LDR R1, [SP, #32] 0x3419324E: 6688 STR R0, [R1, #104] 0x34193250: 9908 LDR R1, [SP, #32] 0x34193252: 2008 MOVS R0, #8 0x34193254: F881 0059 STRB.W R0, [R1, #89] 0x34193258: 9808 LDR R0, [SP, #32] 0x3419325A: 3008 ADDS R0, #8 0x3419325C: 990B LDR R1, [SP, #44] 0x3419325E: F000 F891 BL SAL_XSPI_Init ; 0x34193384 0x34193262: 9808 LDR R0, [SP, #32] 0x34193264: 3008 ADDS R0, #8 0x34193266: 9909 LDR R1, [SP, #36] 0x34193268: F24F 0280 MOVW R2, #0xF080 0x3419326C: F2C0 22FA MOVT R2, #0x02FA 0x34193270: AB02 ADD R3, SP, #8 0x34193272: F7F9 FE2B BL SAL_XSPI_SetClock ; 0x3418CECC 0x34193276: 9808 LDR R0, [SP, #32] 0x34193278: 3008 ADDS R0, #8 0x3419327A: F000 FB13 BL SAL_XSPI_DisableMapMode ; 0x341938A4 0x3419327E: 9808 LDR R0, [SP, #32] 0x34193280: A905 ADD R1, SP, #20 0x34193282: F7F8 FD05 BL SFDP_GetHeader ; 0x3418BC90 0x34193286: B118 CBZ R0, .L1 ; 0x34193290 0x34193288: 20FF MOVS R0, #255 0x3419328A: F88D 001F STRB.W R0, [SP, #31] 0x3419328E: E056 B 46L8 ; 0x3419333E
.L1: 0x34193290: 9808 LDR R0, [SP, #32] 0x34193292: F7FF FD09 BL SFDP_MemoryReset ; 0x34192CA8 0x34193296: BF00 NOP 0x34193298: 200A MOVS R0, #10 0x3419329A: F7FA FED9 BL HAL_Delay ; 0x3418E050 0x3419329E: 9808 LDR R0, [SP, #32] 0x341932A0: A905 ADD R1, SP, #20 0x341932A2: F7F8 FCF5 BL SFDP_GetHeader ; 0x3418BC90 0x341932A6: B118 CBZ R0, .L2 ; 0x341932B0 0x341932A8: 20FF MOVS R0, #255 0x341932AA: F88D 001F STRB.W R0, [SP, #31] 0x341932AE: E046 B 46L8 ; 0x3419333E
.L2: 0x341932B0: F89D 001A LDRB.W R0, [SP, #26] 0x341932B4: 280A CMP R0, #10 0x341932B6: D304 BCC 46L3 ; 0x341932C2 0x341932B8: 9908 LDR R1, [SP, #32] 0x341932BA: 2009 MOVS R0, #9 0x341932BC: F881 009C STRB.W R0, [R1, #156] 0x341932C0: E004 B 46L4 ; 0x341932CC
.L3: 0x341932C2: F89D 001A LDRB.W R0, [SP, #26] 0x341932C6: 9908 LDR R1, [SP, #32] 0x341932C8: F881 009C STRB.W R0, [R1, #156]
.L4: 0x341932CC: F89D 001B LDRB.W R0, [SP, #27] 0x341932D0: 9908 LDR R1, [SP, #32] 0x341932D2: F881 009D STRB.W R0, [R1, #157] 0x341932D6: 9808 LDR R0, [SP, #32] 0x341932D8: 3008 ADDS R0, #8 0x341932DA: F10D 010D ADD.W R1, SP, #13 0x341932DE: 2204 MOVS R2, #4 0x341932E0: F7F9 FE5A BL SAL_XSPI_GetId ; 0x3418CF98 0x341932E4: F89D 000D LDRB.W R0, [SP, #13] 0x341932E8: 9908 LDR R1, [SP, #32] 0x341932EA: F881 005D STRB.W R0, [R1, #93] 0x341932EE: 9808 LDR R0, [SP, #32] 0x341932F0: F7FF FBF4 BL SFDP_CollectData ; 0x34192ADC 0x341932F4: B118 CBZ R0, .L5 ; 0x341932FE 0x341932F6: 20FF MOVS R0, #255 0x341932F8: F88D 001F STRB.W R0, [SP, #31] 0x341932FC: E01F B 46L8 ; 0x3419333E
.L5: 0x341932FE: 9808 LDR R0, [SP, #32] 0x34193300: F10D 0113 ADD.W R1, SP, #19 0x34193304: F7F8 FE8A BL SFDP_BuildGenericDriver ; 0x3418C01C 0x34193308: B118 CBZ R0, .L6 ; 0x34193312 0x3419330A: 20FD MOVS R0, #253 0x3419330C: F88D 001F STRB.W R0, [SP, #31] 0x34193310: E015 B 46L8 ; 0x3419333E
.L6: 0x34193312: F89D 0013 LDRB.W R0, [SP, #19] 0x34193316: B948 CBNZ R0, .L7 ; 0x3419332C 0x34193318: 9808 LDR R0, [SP, #32] 0x3419331A: 6800 LDR R0, [R0] 0x3419331C: B130 CBZ R0, .L7 ; 0x3419332C 0x3419331E: 9808 LDR R0, [SP, #32] 0x34193320: 9909 LDR R1, [SP, #36] 0x34193322: F850 2B08 LDR R2, [R0], #8 0x34193326: AB02 ADD R3, SP, #8 0x34193328: F7F9 FDD0 BL SAL_XSPI_SetClock ; 0x3418CECC
.L7: 0x3419332C: 9808 LDR R0, [SP, #32] 0x3419332E: A905 ADD R1, SP, #20 0x34193330: F7FF FB94 BL SFDP_ReadHeader ; 0x34192A5C 0x34193334: B118 CBZ R0, .L8 ; 0x3419333E 0x34193336: 20F2 MOVS R0, #242 0x34193338: F88D 001F STRB.W R0, [SP, #31] 0x3419333C: E7FF B 46L8 ; 0x3419333E
.L8: 0x3419333E: F99D 001F LDRSB.W R0, [SP, #31] 0x34193342: B00C ADD SP, SP, #48 0x34193344: BD80 POP 123R7, PC}

Section .init.TIM14_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM14_IRQHandler: 0x34193346: E7FE B TIM14_IRQHandler ; 0x34193346

Section .text.EXTMEM_DRIVER_NOR_SFDP_Enable_MemoryMappedMode from blto2_FSBL_lto.o, size=58, align=4


EXTMEM_DRIVER_NOR_SFDP_Enable_MemoryMappedMode: 0x34193348: B580 PUSH 123R7, LR} 0x3419334A: B084 SUB SP, SP, #16 0x3419334C: 9003 STR R0, [SP, #12] 0x3419334E: F04F 0C00 MOV.W R12, #0 0x34193352: F88D C00B STRB.W R12, [SP, #11] 0x34193356: 9903 LDR R1, [SP, #12] 0x34193358: F101 0008 ADD.W R0, R1, #8 0x3419335C: F891 2050 LDRB.W R2, [R1, #80] 0x34193360: F891 3075 LDRB.W R3, [R1, #117] 0x34193364: F891 1076 LDRB.W R1, [R1, #118] 0x34193368: 46EE MOV LR, SP 0x3419336A: F8CE C000 STR.W R12, [LR] 0x3419336E: F7F9 FF6B BL SAL_XSPI_EnableMapMode ; 0x3418D248 0x34193372: B110 CBZ R0, .L1 ; 0x3419337A 0x34193374: 20F3 MOVS R0, #243 0x34193376: F88D 000B STRB.W R0, [SP, #11]
.L1: 0x3419337A: F99D 000B LDRSB.W R0, [SP, #11] 0x3419337E: B004 ADD SP, SP, #16 0x34193380: BD80 POP 123R7, PC}

Section .init.TIM15_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM15_IRQHandler: 0x34193382: E7FE B TIM15_IRQHandler ; 0x34193382

Section .text.SAL_XSPI_Init from blto2_FSBL_lto.o, size=86, align=4


SAL_XSPI_Init: 0x34193384: B580 PUSH 123R7, LR} 0x34193386: B098 SUB SP, SP, #96 0x34193388: 9017 STR R0, [SP, #92] 0x3419338A: 9116 STR R1, [SP, #88] 0x3419338C: A803 ADD R0, SP, #12 0x3419338E: 9001 STR R0, [SP, #4] 0x34193390: 214C MOVS R1, #76 0x34193392: 9102 STR R1, [SP, #8] 0x34193394: F7FA F9F8 BL __aeabi_memclr ; 0x3418D788 0x34193398: 9901 LDR R1, [SP, #4] 0x3419339A: 9A02 LDR R2, [SP, #8] 0x3419339C: 205A MOVS R0, #90 0x3419339E: 9005 STR R0, [SP, #20] 0x341933A0: 2001 MOVS R0, #1 0x341933A2: 9006 STR R0, [SP, #24] 0x341933A4: F44F 7080 MOV.W R0, #0x0100 0x341933A8: 900A STR R0, [SP, #40] 0x341933AA: F44F 5000 MOV.W R0, #0x2000 0x341933AE: 900B STR R0, [SP, #44] 0x341933B0: F04F 7080 MOV.W R0, #0x01000000 0x341933B4: 9011 STR R0, [SP, #68] 0x341933B6: 2008 MOVS R0, #8 0x341933B8: 9014 STR R0, [SP, #80] 0x341933BA: 9816 LDR R0, [SP, #88] 0x341933BC: 9B17 LDR R3, [SP, #92] 0x341933BE: 6018 STR R0, [R3] 0x341933C0: 9817 LDR R0, [SP, #92] 0x341933C2: 3004 ADDS R0, #4 0x341933C4: F7FA F9C1 BL __aeabi_memcpy4 ; 0x3418D74A 0x341933C8: 9917 LDR R1, [SP, #92] 0x341933CA: 2000 MOVS R0, #0 0x341933CC: F881 0050 STRB.W R0, [R1, #80] 0x341933D0: 9917 LDR R1, [SP, #92] 0x341933D2: F881 0052 STRB.W R0, [R1, #82] 0x341933D6: B018 ADD SP, SP, #96 0x341933D8: BD80 POP 123R7, PC}

Section .init.TIM16_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM16_IRQHandler: 0x341933DA: E7FE B TIM16_IRQHandler ; 0x341933DA

Section .text.SAL_XSPI_MemoryConfig from blto2_FSBL_lto.o, size=666, align=4


SAL_XSPI_MemoryConfig: 0x341933DC: B580 PUSH 123R7, LR} 0x341933DE: B09A SUB SP, SP, #104 0x341933E0: 9019 STR R0, [SP, #100] 0x341933E2: F88D 1063 STRB.W R1, [SP, #99] 0x341933E6: 9217 STR R2, [SP, #92] 0x341933E8: 2000 MOVS R0, #0 0x341933EA: F88D 005B STRB.W R0, [SP, #91] 0x341933EE: 9819 LDR R0, [SP, #100] 0x341933F0: 1D01 ADDS R1, R0, #4 0x341933F2: A803 ADD R0, SP, #12 0x341933F4: 224C MOVS R2, #76 0x341933F6: F7FA F9A8 BL __aeabi_memcpy4 ; 0x3418D74A 0x341933FA: F89D 0063 LDRB.W R0, [SP, #99] 0x341933FE: 4601 MOV R1, R0 0x34193400: 9101 STR R1, [SP, #4] 0x34193402: 2804 CMP R0, #4 0x34193404: F200 812A BHI.W 46L3 ; 0x3419365C 0x34193408: 9901 LDR R1, [SP, #4] 0x3419340A: E8DF F011 TBH 91PC, R1, LSL #1] 0x3419340E: 05 DC.B 0x05 ; '\x05' 0x3419340F: 00 DC.B 0x00 ; '\0' 0x34193410: 1F DC.B 0x1F ; '\x1F' 0x34193411: 01 DC.B 0x01 ; '\x01' 0x34193412: 08 DC.B 0x08 ; '\b' 0x34193413: 01 DC.B 0x01 ; '\x01' 0x34193414: 27 DC.B 0x27 ; ''' 0x34193415: 01 DC.B 0x01 ; '\x01' 0x34193416: 0C DC.B 0x0C ; '\x0C' 0x34193417: 01 DC.B 0x01 ; '\x01' 0x34193418: 9817 LDR R0, [SP, #92] 0x3419341A: 7800 LDRB R0, [R0] 0x3419341C: 9919 LDR R1, [SP, #100] 0x3419341E: F881 0052 STRB.W R0, [R1, #82] 0x34193422: 9819 LDR R0, [SP, #100] 0x34193424: F890 0052 LDRB.W R0, [R0, #82] 0x34193428: 4601 MOV R1, R0 0x3419342A: 9100 STR R1, [SP, #0] 0x3419342C: 280D CMP R0, #13 0x3419342E: F200 80F2 BHI.W 46L1 ; 0x34193616 0x34193432: 9900 LDR R1, [SP, #0] 0x34193434: E8DF F001 TBB 91PC, R1] 0x34193438: 07 DC.B 0x07 ; '\x07' 0x34193439: 07 DC.B 0x07 ; '\x07' 0x3419343A: 07 DC.B 0x07 ; '\x07' 0x3419343B: 07 DC.B 0x07 ; '\x07' 0x3419343C: 1B DC.B 0x1B ; '\x1B' 0x3419343D: 2F DC.B 0x2F ; '/' 0x3419343E: 43 DC.B 0x43 ; 'C' 0x3419343F: 43 DC.B 0x43 ; 'C' 0x34193440: 57 DC.B 0x57 ; 'W' 0x34193441: 70 DC.B 0x70 ; 'p' 0x34193442: 84 DC.B 0x84 ; '\x84' 0x34193443: 9E DC.B 0x9E ; '\x9E' 0x34193444: B9 DC.B 0xB9 ; '\xB9' 0x34193445: D4 DC.B 0xD4 ; '\xD4' 0x34193446: 2001 MOVS R0, #1 0x34193448: 9006 STR R0, [SP, #24] 0x3419344A: 2000 MOVS R0, #0 0x3419344C: 9007 STR R0, [SP, #28] 0x3419344E: 9008 STR R0, [SP, #32] 0x34193450: F44F 7180 MOV.W R1, #0x0100 0x34193454: 910A STR R1, [SP, #40] 0x34193456: F44F 5100 MOV.W R1, #0x2000 0x3419345A: 910B STR R1, [SP, #44] 0x3419345C: 900C STR R0, [SP, #48] 0x3419345E: F04F 7180 MOV.W R1, #0x01000000 0x34193462: 9111 STR R1, [SP, #68] 0x34193464: 9013 STR R0, [SP, #76] 0x34193466: 2108 MOVS R1, #8 0x34193468: 9114 STR R1, [SP, #80] 0x3419346A: 9015 STR R0, [SP, #84] 0x3419346C: E0D6 B 46L2 ; 0x3419361C 0x3419346E: 2001 MOVS R0, #1 0x34193470: 9006 STR R0, [SP, #24] 0x34193472: 2000 MOVS R0, #0 0x34193474: 9007 STR R0, [SP, #28] 0x34193476: 9008 STR R0, [SP, #32] 0x34193478: F44F 7180 MOV.W R1, #0x0100 0x3419347C: 910A STR R1, [SP, #40] 0x3419347E: 900C STR R0, [SP, #48] 0x34193480: F44F 5100 MOV.W R1, #0x2000 0x34193484: 910B STR R1, [SP, #44] 0x34193486: F04F 7140 MOV.W R1, #0x03000000 0x3419348A: 9111 STR R1, [SP, #68] 0x3419348C: 9013 STR R0, [SP, #76] 0x3419348E: 2106 MOVS R1, #6 0x34193490: 9114 STR R1, [SP, #80] 0x34193492: 9015 STR R0, [SP, #84] 0x34193494: E0C2 B 46L2 ; 0x3419361C 0x34193496: 2001 MOVS R0, #1 0x34193498: 9006 STR R0, [SP, #24] 0x3419349A: 2000 MOVS R0, #0 0x3419349C: 9007 STR R0, [SP, #28] 0x3419349E: 9008 STR R0, [SP, #32] 0x341934A0: F44F 7140 MOV.W R1, #0x0300 0x341934A4: 910A STR R1, [SP, #40] 0x341934A6: 900C STR R0, [SP, #48] 0x341934A8: F44F 5100 MOV.W R1, #0x2000 0x341934AC: 910B STR R1, [SP, #44] 0x341934AE: F04F 7140 MOV.W R1, #0x03000000 0x341934B2: 9111 STR R1, [SP, #68] 0x341934B4: 9013 STR R0, [SP, #76] 0x341934B6: 2106 MOVS R1, #6 0x341934B8: 9114 STR R1, [SP, #80] 0x341934BA: 9015 STR R0, [SP, #84] 0x341934BC: E0AE B 46L2 ; 0x3419361C 0x341934BE: 2003 MOVS R0, #3 0x341934C0: 9006 STR R0, [SP, #24] 0x341934C2: 2000 MOVS R0, #0 0x341934C4: 9007 STR R0, [SP, #28] 0x341934C6: 9008 STR R0, [SP, #32] 0x341934C8: F44F 7140 MOV.W R1, #0x0300 0x341934CC: 910A STR R1, [SP, #40] 0x341934CE: 900C STR R0, [SP, #48] 0x341934D0: F44F 5100 MOV.W R1, #0x2000 0x341934D4: 910B STR R1, [SP, #44] 0x341934D6: F04F 7140 MOV.W R1, #0x03000000 0x341934DA: 9111 STR R1, [SP, #68] 0x341934DC: 9013 STR R0, [SP, #76] 0x341934DE: 2106 MOVS R1, #6 0x341934E0: 9114 STR R1, [SP, #80] 0x341934E2: 9015 STR R0, [SP, #84] 0x341934E4: E09A B 46L2 ; 0x3419361C 0x341934E6: 2003 MOVS R0, #3 0x341934E8: 9006 STR R0, [SP, #24] 0x341934EA: 2000 MOVS R0, #0 0x341934EC: 9007 STR R0, [SP, #28] 0x341934EE: 2108 MOVS R1, #8 0x341934F0: 9108 STR R1, [SP, #32] 0x341934F2: F44F 7140 MOV.W R1, #0x0300 0x341934F6: 910A STR R1, [SP, #40] 0x341934F8: F44F 5100 MOV.W R1, #0x2000 0x341934FC: 910B STR R1, [SP, #44] 0x341934FE: F44F 6100 MOV.W R1, #0x0800 0x34193502: 910C STR R1, [SP, #48] 0x34193504: F04F 7140 MOV.W R1, #0x03000000 0x34193508: 9111 STR R1, [SP, #68] 0x3419350A: F04F 6100 MOV.W R1, #0x08000000 0x3419350E: 9113 STR R1, [SP, #76] 0x34193510: 2106 MOVS R1, #6 0x34193512: 9114 STR R1, [SP, #80] 0x34193514: 9015 STR R0, [SP, #84] 0x34193516: E081 B 46L2 ; 0x3419361C 0x34193518: 2001 MOVS R0, #1 0x3419351A: 9006 STR R0, [SP, #24] 0x3419351C: 2000 MOVS R0, #0 0x3419351E: 9007 STR R0, [SP, #28] 0x34193520: 9008 STR R0, [SP, #32] 0x34193522: F44F 6180 MOV.W R1, #0x0400 0x34193526: 910A STR R1, [SP, #40] 0x34193528: F44F 5140 MOV.W R1, #0x3000 0x3419352C: 910B STR R1, [SP, #44] 0x3419352E: 900C STR R0, [SP, #48] 0x34193530: F04F 6180 MOV.W R1, #0x04000000 0x34193534: 9111 STR R1, [SP, #68] 0x34193536: 9013 STR R0, [SP, #76] 0x34193538: 2108 MOVS R1, #8 0x3419353A: 9114 STR R1, [SP, #80] 0x3419353C: 9015 STR R0, [SP, #84] 0x3419353E: E06D B 46L2 ; 0x3419361C 0x34193540: 2004 MOVS R0, #4 0x34193542: 9006 STR R0, [SP, #24] 0x34193544: 2000 MOVS R0, #0 0x34193546: 9007 STR R0, [SP, #28] 0x34193548: 9008 STR R0, [SP, #32] 0x3419354A: F44F 6080 MOV.W R0, #0x0400 0x3419354E: 900A STR R0, [SP, #40] 0x34193550: F44F 5040 MOV.W R0, #0x3000 0x34193554: 900B STR R0, [SP, #44] 0x34193556: F44F 6000 MOV.W R0, #0x0800 0x3419355A: 900C STR R0, [SP, #48] 0x3419355C: F04F 6080 MOV.W R0, #0x04000000 0x34193560: 9011 STR R0, [SP, #68] 0x34193562: F04F 6000 MOV.W R0, #0x08000000 0x34193566: 9013 STR R0, [SP, #76] 0x34193568: 2008 MOVS R0, #8 0x3419356A: 9014 STR R0, [SP, #80] 0x3419356C: F04F 5000 MOV.W R0, #0x20000000 0x34193570: 9015 STR R0, [SP, #84] 0x34193572: E053 B 46L2 ; 0x3419361C 0x34193574: 2004 MOVS R0, #4 0x34193576: 9006 STR R0, [SP, #24] 0x34193578: 2010 MOVS R0, #16 0x3419357A: 9007 STR R0, [SP, #28] 0x3419357C: 2008 MOVS R0, #8 0x3419357E: 9008 STR R0, [SP, #32] 0x34193580: F44F 6080 MOV.W R0, #0x0400 0x34193584: 900A STR R0, [SP, #40] 0x34193586: F44F 5040 MOV.W R0, #0x3000 0x3419358A: 900B STR R0, [SP, #44] 0x3419358C: F44F 6000 MOV.W R0, #0x0800 0x34193590: 900C STR R0, [SP, #48] 0x34193592: F04F 6080 MOV.W R0, #0x04000000 0x34193596: 9011 STR R0, [SP, #68] 0x34193598: F04F 6000 MOV.W R0, #0x08000000 0x3419359C: 9013 STR R0, [SP, #76] 0x3419359E: 2014 MOVS R0, #20 0x341935A0: 9014 STR R0, [SP, #80] 0x341935A2: F04F 5000 MOV.W R0, #0x20000000 0x341935A6: 9015 STR R0, [SP, #84] 0x341935A8: E038 B 46L2 ; 0x3419361C 0x341935AA: 2004 MOVS R0, #4 0x341935AC: 9006 STR R0, [SP, #24] 0x341935AE: 2000 MOVS R0, #0 0x341935B0: 9007 STR R0, [SP, #28] 0x341935B2: 9008 STR R0, [SP, #32] 0x341935B4: F44F 6180 MOV.W R1, #0x0400 0x341935B8: 910A STR R1, [SP, #40] 0x341935BA: F44F 5140 MOV.W R1, #0x3000 0x341935BE: 910B STR R1, [SP, #44] 0x341935C0: F44F 6100 MOV.W R1, #0x0800 0x341935C4: 910C STR R1, [SP, #48] 0x341935C6: 900E STR R0, [SP, #56] 0x341935C8: F04F 6080 MOV.W R0, #0x04000000 0x341935CC: 9011 STR R0, [SP, #68] 0x341935CE: F04F 6000 MOV.W R0, #0x08000000 0x341935D2: 9013 STR R0, [SP, #76] 0x341935D4: 200A MOVS R0, #10 0x341935D6: 9014 STR R0, [SP, #80] 0x341935D8: F04F 5000 MOV.W R0, #0x20000000 0x341935DC: 9015 STR R0, [SP, #84] 0x341935DE: E01D B 46L2 ; 0x3419361C 0x341935E0: 2004 MOVS R0, #4 0x341935E2: 9006 STR R0, [SP, #24] 0x341935E4: 2000 MOVS R0, #0 0x341935E6: 9007 STR R0, [SP, #28] 0x341935E8: 9008 STR R0, [SP, #32] 0x341935EA: F44F 6180 MOV.W R1, #0x0400 0x341935EE: 910A STR R1, [SP, #40] 0x341935F0: F44F 5140 MOV.W R1, #0x3000 0x341935F4: 910B STR R1, [SP, #44] 0x341935F6: F44F 6100 MOV.W R1, #0x0800 0x341935FA: 910C STR R1, [SP, #48] 0x341935FC: 900E STR R0, [SP, #56] 0x341935FE: F04F 60A0 MOV.W R0, #0x05000000 0x34193602: 9011 STR R0, [SP, #68] 0x34193604: F04F 6000 MOV.W R0, #0x08000000 0x34193608: 9013 STR R0, [SP, #76] 0x3419360A: 200A MOVS R0, #10 0x3419360C: 9014 STR R0, [SP, #80] 0x3419360E: F04F 5000 MOV.W R0, #0x20000000 0x34193612: 9015 STR R0, [SP, #84] 0x34193614: E002 B 46L2 ; 0x3419361C
.L1: 0x34193616: 2001 MOVS R0, #1 0x34193618: F88D 005B STRB.W R0, [SP, #91]
.L2: 0x3419361C: E021 B 46L4 ; 0x34193662 0x3419361E: F44F 5040 MOV.W R0, #0x3000 0x34193622: 900B STR R0, [SP, #44] 0x34193624: E01D B 46L4 ; 0x34193662 0x34193626: 9817 LDR R0, [SP, #92] 0x34193628: 7800 LDRB R0, [R0] 0x3419362A: F88D 000B STRB.W R0, [SP, #11] 0x3419362E: 9819 LDR R0, [SP, #100] 0x34193630: 6800 LDR R0, [R0] 0x34193632: 6800 LDR R0, [R0] 0x34193634: 6880 LDR R0, [R0, #8] 0x34193636: F420 10F8 BIC R0, R0, #0x1F0000 0x3419363A: F89D 100B LDRB.W R1, [SP, #11] 0x3419363E: EA40 4001 ORR.W R0, R0, R1, LSL #16 0x34193642: 9919 LDR R1, [SP, #100] 0x34193644: 6809 LDR R1, [R1] 0x34193646: 6809 LDR R1, [R1] 0x34193648: 6088 STR R0, [R1, #8] 0x3419364A: E00A B 46L4 ; 0x34193662 0x3419364C: 9817 LDR R0, [SP, #92] 0x3419364E: 7800 LDRB R0, [R0] 0x34193650: F88D 000A STRB.W R0, [SP, #10] 0x34193654: F89D 000A LDRB.W R0, [SP, #10] 0x34193658: 9014 STR R0, [SP, #80] 0x3419365A: E002 B 46L4 ; 0x34193662
.L3: 0x3419365C: 2001 MOVS R0, #1 0x3419365E: F88D 005B STRB.W R0, [SP, #91]
.L4: 0x34193662: 9819 LDR R0, [SP, #100] 0x34193664: 3004 ADDS R0, #4 0x34193666: A903 ADD R1, SP, #12 0x34193668: 224C MOVS R2, #76 0x3419366A: F7FA F86E BL __aeabi_memcpy4 ; 0x3418D74A 0x3419366E: F89D 005B LDRB.W R0, [SP, #91] 0x34193672: B01A ADD SP, SP, #104 0x34193674: BD80 POP 123R7, PC}

Section .init.TIM17_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM17_IRQHandler: 0x34193676: E7FE B TIM17_IRQHandler ; 0x34193676

Section .text.SAL_XSPI_GetSFDP from blto2_FSBL_lto.o, size=222, align=4


SAL_XSPI_GetSFDP: 0x34193678: B580 PUSH 123R7, LR} 0x3419367A: B098 SUB SP, SP, #96 0x3419367C: 9017 STR R0, [SP, #92] 0x3419367E: 9116 STR R1, [SP, #88] 0x34193680: 9215 STR R2, [SP, #84] 0x34193682: 9314 STR R3, [SP, #80] 0x34193684: 9817 LDR R0, [SP, #92] 0x34193686: 1D01 ADDS R1, R0, #4 0x34193688: 4668 MOV R0, SP 0x3419368A: 224C MOVS R2, #76 0x3419368C: F7FA F85D BL __aeabi_memcpy4 ; 0x3418D74A 0x34193690: 9817 LDR R0, [SP, #92] 0x34193692: F890 0050 LDRB.W R0, [R0, #80] 0x34193696: 9904 LDR R1, [SP, #16] 0x34193698: 225A MOVS R2, #90 0x3419369A: F7F9 FC51 BL XSPI_FormatCommand ; 0x3418CF40 0x3419369E: 9002 STR R0, [SP, #8] 0x341936A0: 9816 LDR R0, [SP, #88] 0x341936A2: 9006 STR R0, [SP, #24] 0x341936A4: 9814 LDR R0, [SP, #80] 0x341936A6: 900F STR R0, [SP, #60] 0x341936A8: 9817 LDR R0, [SP, #92] 0x341936AA: F890 0051 LDRB.W R0, [R0, #81] 0x341936AE: 9011 STR R0, [SP, #68] 0x341936B0: 9807 LDR R0, [SP, #28] 0x341936B2: F5B0 7F80 CMP.W R0, #0x0100 0x341936B6: D003 BEQ 46L1 ; 0x341936C0 0x341936B8: 9807 LDR R0, [SP, #28] 0x341936BA: F5B0 7F40 CMP.W R0, #0x0300 0x341936BE: D102 BNE 46L2 ; 0x341936C6
.L1: 0x341936C0: F44F 5000 MOV.W R0, #0x2000 0x341936C4: 9008 STR R0, [SP, #32]
.L2: 0x341936C6: 9817 LDR R0, [SP, #92] 0x341936C8: F890 0052 LDRB.W R0, [R0, #82] 0x341936CC: 2801 CMP R0, #1 0x341936CE: D013 BEQ 46L3 ; 0x341936F8 0x341936D0: 9817 LDR R0, [SP, #92] 0x341936D2: F890 0052 LDRB.W R0, [R0, #82] 0x341936D6: 2802 CMP R0, #2 0x341936D8: D00E BEQ 46L3 ; 0x341936F8 0x341936DA: 9817 LDR R0, [SP, #92] 0x341936DC: F890 0052 LDRB.W R0, [R0, #82] 0x341936E0: 2803 CMP R0, #3 0x341936E2: D009 BEQ 46L3 ; 0x341936F8 0x341936E4: 9817 LDR R0, [SP, #92] 0x341936E6: F890 0052 LDRB.W R0, [R0, #82] 0x341936EA: 2804 CMP R0, #4 0x341936EC: D004 BEQ 46L3 ; 0x341936F8 0x341936EE: 9817 LDR R0, [SP, #92] 0x341936F0: F890 0052 LDRB.W R0, [R0, #82] 0x341936F4: 2805 CMP R0, #5 0x341936F6: D105 BNE 46L4 ; 0x34193704
.L3: 0x341936F8: F44F 7080 MOV.W R0, #0x0100 0x341936FC: 9007 STR R0, [SP, #28] 0x341936FE: F04F 7080 MOV.W R0, #0x01000000 0x34193702: 900E STR R0, [SP, #56]
.L4: 0x34193704: 9810 LDR R0, [SP, #64] 0x34193706: F1B0 6F00 CMP.W R0, #0x08000000 0x3419370A: D103 BNE 46L5 ; 0x34193714 0x3419370C: F04F 5000 MOV.W R0, #0x20000000 0x34193710: 9012 STR R0, [SP, #72] 0x34193712: E001 B 46L6 ; 0x34193718
.L5: 0x34193714: 2000 MOVS R0, #0 0x34193716: 9012 STR R0, [SP, #72]
.L6: 0x34193718: 9817 LDR R0, [SP, #92] 0x3419371A: 6800 LDR R0, [R0] 0x3419371C: 4669 MOV R1, SP 0x3419371E: 2264 MOVS R2, #100 0x34193720: F7FE FAAE BL HAL_XSPI_Command ; 0x34191C80 0x34193724: F88D 004F STRB.W R0, [SP, #79] 0x34193728: F89D 004F LDRB.W R0, [SP, #79] 0x3419372C: B100 CBZ R0, .L7 ; 0x34193730 0x3419372E: E007 B 46L8 ; 0x34193740
.L7: 0x34193730: 9817 LDR R0, [SP, #92] 0x34193732: 6800 LDR R0, [R0] 0x34193734: 9915 LDR R1, [SP, #84] 0x34193736: 2264 MOVS R2, #100 0x34193738: F7F8 F92C BL HAL_XSPI_Receive ; 0x3418B994 0x3419373C: F88D 004F STRB.W R0, [SP, #79]
.L8: 0x34193740: F89D 004F LDRB.W R0, [SP, #79] 0x34193744: B118 CBZ R0, .L9 ; 0x3419374E 0x34193746: 9817 LDR R0, [SP, #92] 0x34193748: 6800 LDR R0, [R0] 0x3419374A: F7FE FEA7 BL HAL_XSPI_Abort ; 0x3419249C
.L9: 0x3419374E: F89D 004F LDRB.W R0, [SP, #79] 0x34193752: B018 ADD SP, SP, #96 0x34193754: BD80 POP 123R7, PC}

Section .init.TIM18_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM18_IRQHandler: 0x34193756: E7FE B TIM18_IRQHandler ; 0x34193756

Section .text.SAL_XSPI_Write from blto2_FSBL_lto.o, size=138, align=4


SAL_XSPI_Write: 0x34193758: B580 PUSH 123R7, LR} 0x3419375A: B098 SUB SP, SP, #96 0x3419375C: F8DD C068 LDR.W R12, [SP, #104] 0x34193760: 9017 STR R0, [SP, #92] 0x34193762: F88D 105B STRB.W R1, [SP, #91] 0x34193766: 9215 STR R2, [SP, #84] 0x34193768: 9314 STR R3, [SP, #80] 0x3419376A: 9817 LDR R0, [SP, #92] 0x3419376C: 1D01 ADDS R1, R0, #4 0x3419376E: 4668 MOV R0, SP 0x34193770: 224C MOVS R2, #76 0x34193772: F7F9 FFEA BL __aeabi_memcpy4 ; 0x3418D74A 0x34193776: 9817 LDR R0, [SP, #92] 0x34193778: F890 0050 LDRB.W R0, [R0, #80] 0x3419377C: 9904 LDR R1, [SP, #16] 0x3419377E: F89D 205B LDRB.W R2, [SP, #91] 0x34193782: F7F9 FBDD BL XSPI_FormatCommand ; 0x3418CF40 0x34193786: 9002 STR R0, [SP, #8] 0x34193788: 9815 LDR R0, [SP, #84] 0x3419378A: 9006 STR R0, [SP, #24] 0x3419378C: 981A LDR R0, [SP, #104] 0x3419378E: 900F STR R0, [SP, #60] 0x34193790: 2000 MOVS R0, #0 0x34193792: 9011 STR R0, [SP, #68] 0x34193794: 9012 STR R0, [SP, #72] 0x34193796: 9810 LDR R0, [SP, #64] 0x34193798: F1B0 6F00 CMP.W R0, #0x08000000 0x3419379C: D104 BNE 46L1 ; 0x341937A8 0x3419379E: 980F LDR R0, [SP, #60] 0x341937A0: 2801 CMP R0, #1 0x341937A2: D101 BNE 46L1 ; 0x341937A8 0x341937A4: 2002 MOVS R0, #2 0x341937A6: 900F STR R0, [SP, #60]
.L1: 0x341937A8: 9817 LDR R0, [SP, #92] 0x341937AA: 6800 LDR R0, [R0] 0x341937AC: 4669 MOV R1, SP 0x341937AE: 2264 MOVS R2, #100 0x341937B0: F7FE FA66 BL HAL_XSPI_Command ; 0x34191C80 0x341937B4: F88D 004F STRB.W R0, [SP, #79] 0x341937B8: F89D 004F LDRB.W R0, [SP, #79] 0x341937BC: B100 CBZ R0, .L2 ; 0x341937C0 0x341937BE: E005 B 46L3 ; 0x341937CC
.L2: 0x341937C0: 9817 LDR R0, [SP, #92] 0x341937C2: 9914 LDR R1, [SP, #80] 0x341937C4: F7F9 FC34 BL XSPI_Transmit ; 0x3418D030 0x341937C8: F88D 004F STRB.W R0, [SP, #79]
.L3: 0x341937CC: F89D 004F LDRB.W R0, [SP, #79] 0x341937D0: B118 CBZ R0, .L4 ; 0x341937DA 0x341937D2: 9817 LDR R0, [SP, #92] 0x341937D4: 6800 LDR R0, [R0] 0x341937D6: F7FE FE61 BL HAL_XSPI_Abort ; 0x3419249C
.L4: 0x341937DA: F89D 004F LDRB.W R0, [SP, #79] 0x341937DE: B018 ADD SP, SP, #96 0x341937E0: BD80 POP 123R7, PC}

Section .init.LPTIM1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


LPTIM1_IRQHandler: 0x341937E2: E7FE B LPTIM1_IRQHandler ; 0x341937E2

Section .text.SAL_XSPI_CommandSendReadAddress from blto2_FSBL_lto.o, size=190, align=4


SAL_XSPI_CommandSendReadAddress: 0x341937E4: B510 PUSH 123R4, LR} 0x341937E6: B09A SUB SP, SP, #104 0x341937E8: 468C MOV R12, R1 0x341937EA: 4686 MOV LR, R0 0x341937EC: 981D LDR R0, [SP, #116] 0x341937EE: 991C LDR R1, [SP, #112] 0x341937F0: F8CD E064 STR.W LR, [SP, #100] 0x341937F4: F88D C063 STRB.W R12, [SP, #99] 0x341937F8: 9217 STR R2, [SP, #92] 0x341937FA: 9316 STR R3, [SP, #88] 0x341937FC: F8AD 1056 STRH.W R1, [SP, #86] 0x34193800: F88D 0055 STRB.W R0, [SP, #85] 0x34193804: 9819 LDR R0, [SP, #100] 0x34193806: 1D01 ADDS R1, R0, #4 0x34193808: A802 ADD R0, SP, #8 0x3419380A: 224C MOVS R2, #76 0x3419380C: F7F9 FF9D BL __aeabi_memcpy4 ; 0x3418D74A 0x34193810: 9819 LDR R0, [SP, #100] 0x34193812: F890 0050 LDRB.W R0, [R0, #80] 0x34193816: 9906 LDR R1, [SP, #24] 0x34193818: F89D 2063 LDRB.W R2, [SP, #99] 0x3419381C: F7F9 FB90 BL XSPI_FormatCommand ; 0x3418CF40 0x34193820: 9004 STR R0, [SP, #16] 0x34193822: 9817 LDR R0, [SP, #92] 0x34193824: 9008 STR R0, [SP, #32] 0x34193826: 9819 LDR R0, [SP, #100] 0x34193828: F890 0051 LDRB.W R0, [R0, #81] 0x3419382C: 9013 STR R0, [SP, #76] 0x3419382E: F8BD 0056 LDRH.W R0, [SP, #86] 0x34193832: 9011 STR R0, [SP, #68] 0x34193834: F89D 0055 LDRB.W R0, [SP, #85] 0x34193838: 28C2 CMP R0, #194 0x3419383A: D106 BNE 46L1 ; 0x3419384A 0x3419383C: 9812 LDR R0, [SP, #72] 0x3419383E: F1B0 6F00 CMP.W R0, #0x08000000 0x34193842: D102 BNE 46L1 ; 0x3419384A 0x34193844: 2000 MOVS R0, #0 0x34193846: 9012 STR R0, [SP, #72] 0x34193848: E00D B 46L3 ; 0x34193866
.L1: 0x3419384A: F89D 0055 LDRB.W R0, [SP, #85] 0x3419384E: 28C8 CMP R0, #200 0x34193850: D107 BNE 46L2 ; 0x34193862 0x34193852: 9812 LDR R0, [SP, #72] 0x34193854: F1B0 6F00 CMP.W R0, #0x08000000 0x34193858: D103 BNE 46L2 ; 0x34193862 0x3419385A: 2000 MOVS R0, #0 0x3419385C: 9012 STR R0, [SP, #72] 0x3419385E: 9014 STR R0, [SP, #80] 0x34193860: E001 B 46L3 ; 0x34193866
.L2: 0x34193862: 2000 MOVS R0, #0 0x34193864: 9014 STR R0, [SP, #80]
.L3: 0x34193866: 9819 LDR R0, [SP, #100] 0x34193868: 6800 LDR R0, [R0] 0x3419386A: A902 ADD R1, SP, #8 0x3419386C: 2264 MOVS R2, #100 0x3419386E: F7FE FA07 BL HAL_XSPI_Command ; 0x34191C80 0x34193872: F88D 0007 STRB.W R0, [SP, #7] 0x34193876: F89D 0007 LDRB.W R0, [SP, #7] 0x3419387A: B938 CBNZ R0, .L4 ; 0x3419388C 0x3419387C: 9819 LDR R0, [SP, #100] 0x3419387E: 6800 LDR R0, [R0] 0x34193880: 9916 LDR R1, [SP, #88] 0x34193882: 2264 MOVS R2, #100 0x34193884: F7F8 F886 BL HAL_XSPI_Receive ; 0x3418B994 0x34193888: F88D 0007 STRB.W R0, [SP, #7]
.L4: 0x3419388C: F89D 0007 LDRB.W R0, [SP, #7] 0x34193890: B118 CBZ R0, .L5 ; 0x3419389A 0x34193892: 9819 LDR R0, [SP, #100] 0x34193894: 6800 LDR R0, [R0] 0x34193896: F7FE FE01 BL HAL_XSPI_Abort ; 0x3419249C
.L5: 0x3419389A: F89D 0007 LDRB.W R0, [SP, #7] 0x3419389E: B01A ADD SP, SP, #104 0x341938A0: BD10 POP 123R4, PC}

Section .init.LPTIM2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


LPTIM2_IRQHandler: 0x341938A2: E7FE B LPTIM2_IRQHandler ; 0x341938A2

Section .text.SAL_XSPI_DisableMapMode from blto2_FSBL_lto.o, size=22, align=4


SAL_XSPI_DisableMapMode: 0x341938A4: B580 PUSH 123R7, LR} 0x341938A6: B082 SUB SP, SP, #8 0x341938A8: 9001 STR R0, [SP, #4] 0x341938AA: F3BF 8F4F DSB SY 0x341938AE: 9801 LDR R0, [SP, #4] 0x341938B0: 6800 LDR R0, [R0] 0x341938B2: F7FE FDF3 BL HAL_XSPI_Abort ; 0x3419249C 0x341938B6: B002 ADD SP, SP, #8 0x341938B8: BD80 POP 123R7, PC}

Section .init.LPTIM3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


LPTIM3_IRQHandler: 0x341938BA: E7FE B LPTIM3_IRQHandler ; 0x341938BA

Section .text.SAL_XSPI_Abort from blto2_FSBL_lto.o, size=18, align=4


SAL_XSPI_Abort: 0x341938BC: B580 PUSH 123R7, LR} 0x341938BE: B082 SUB SP, SP, #8 0x341938C0: 9001 STR R0, [SP, #4] 0x341938C2: 9801 LDR R0, [SP, #4] 0x341938C4: 6800 LDR R0, [R0] 0x341938C6: F7FE FDE9 BL HAL_XSPI_Abort ; 0x3419249C 0x341938CA: B002 ADD SP, SP, #8 0x341938CC: BD80 POP 123R7, PC}

Section .init.LPTIM4_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


LPTIM4_IRQHandler: 0x341938CE: E7FE B LPTIM4_IRQHandler ; 0x341938CE

Section .text.EXTMEM_Init from blto2_FSBL_lto.o, size=94, align=4


EXTMEM_Init: 0x341938D0: B580 PUSH 123R7, LR} 0x341938D2: B084 SUB SP, SP, #16 0x341938D4: 9003 STR R0, [SP, #12] 0x341938D6: 9102 STR R1, [SP, #8] 0x341938D8: 20FB MOVS R0, #251 0x341938DA: F88D 0007 STRB.W R0, [SP, #7] 0x341938DE: 9803 LDR R0, [SP, #12] 0x341938E0: BB08 CBNZ R0, .L3 ; 0x34193926 0x341938E2: 2000 MOVS R0, #0 0x341938E4: F88D 0007 STRB.W R0, [SP, #7] 0x341938E8: 9803 LDR R0, [SP, #12] 0x341938EA: 21AC MOVS R1, #172 0x341938EC: 4341 MULS R1, R0, R1 0x341938EE: F240 0000 MOVW R0, #0 ; 0x34000000 = extmem_list_config 0x341938F2: F2C3 4000 MOVT R0, #0x3400 ; 0x34000000 = extmem_list_config 0x341938F6: 5C40 LDRB R0, [R0, R1] 0x341938F8: B990 CBNZ R0, .L2 ; 0x34193920 0x341938FA: 9803 LDR R0, [SP, #12] 0x341938FC: F240 0200 MOVW R2, #0 ; 0x34000000 = extmem_list_config 0x34193900: F2C3 4200 MOVT R2, #0x3400 ; 0x34000000 = extmem_list_config 0x34193904: 21AC MOVS R1, #172 0x34193906: FB00 2301 MLA R3, R0, R1, R2 0x3419390A: 6858 LDR R0, [R3, #4] 0x3419390C: 7A19 LDRB R1, [R3, #8] 0x3419390E: 9A02 LDR R2, [SP, #8] 0x34193910: 330C ADDS R3, #12 0x34193912: F7FF FC7F BL EXTMEM_DRIVER_NOR_SFDP_Init ; 0x34193214 0x34193916: B110 CBZ R0, .L1 ; 0x3419391E 0x34193918: 20FD MOVS R0, #253 0x3419391A: F88D 0007 STRB.W R0, [SP, #7]
.L1: 0x3419391E: E002 B 46L3 ; 0x34193926
.L2: 0x34193920: 20FE MOVS R0, #254 0x34193922: F88D 0007 STRB.W R0, [SP, #7]
.L3: 0x34193926: F99D 0007 LDRSB.W R0, [SP, #7] 0x3419392A: B004 ADD SP, SP, #16 0x3419392C: BD80 POP 123R7, PC}

Section .init.LPTIM5_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


LPTIM5_IRQHandler: 0x3419392E: E7FE B LPTIM5_IRQHandler ; 0x3419392E

Section .text.EXTMEM_DeInit from blto2_FSBL_lto.o, size=78, align=4


EXTMEM_DeInit: 0x34193930: B580 PUSH 123R7, LR} 0x34193932: B082 SUB SP, SP, #8 0x34193934: 9001 STR R0, [SP, #4] 0x34193936: 20FB MOVS R0, #251 0x34193938: F88D 0003 STRB.W R0, [SP, #3] 0x3419393C: 9801 LDR R0, [SP, #4] 0x3419393E: B9D0 CBNZ R0, .L2 ; 0x34193976 0x34193940: 2000 MOVS R0, #0 0x34193942: F88D 0003 STRB.W R0, [SP, #3] 0x34193946: 9801 LDR R0, [SP, #4] 0x34193948: 21AC MOVS R1, #172 0x3419394A: 4341 MULS R1, R0, R1 0x3419394C: F240 0000 MOVW R0, #0 ; 0x34000000 = extmem_list_config 0x34193950: F2C3 4000 MOVT R0, #0x3400 ; 0x34000000 = extmem_list_config 0x34193954: 5C40 LDRB R0, [R0, R1] 0x34193956: B958 CBNZ R0, .L1 ; 0x34193970 0x34193958: 9801 LDR R0, [SP, #4] 0x3419395A: F240 0200 MOVW R2, #0 ; 0x34000000 = extmem_list_config 0x3419395E: F2C3 4200 MOVT R2, #0x3400 ; 0x34000000 = extmem_list_config 0x34193962: 21AC MOVS R1, #172 0x34193964: FB00 2001 MLA R0, R0, R1, R2 0x34193968: 300C ADDS R0, #12 0x3419396A: F7F9 FA95 BL EXTMEM_DRIVER_NOR_SFDP_DeInit ; 0x3418CE98 0x3419396E: E002 B 46L2 ; 0x34193976
.L1: 0x34193970: 20FE MOVS R0, #254 0x34193972: F88D 0003 STRB.W R0, [SP, #3]
.L2: 0x34193976: F99D 0003 LDRSB.W R0, [SP, #3] 0x3419397A: B002 ADD SP, SP, #8 0x3419397C: BD80 POP 123R7, PC}

Section .init.ADF1_FLT0_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


ADF1_FLT0_IRQHandler: 0x3419397E: E7FE B ADF1_FLT0_IRQHandler ; 0x3419397E

Section .text.libc.__aeabi_f2ulz from floatasmops_arm.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=62, align=4


__aeabi_f2ulz: 0x34193980: 0042 LSLS R2, R0, #1 0x34193982: D215 BCS 46L3 ; 0x341939B0 0x34193984: 0E12 LSRS R2, R2, #24 0x34193986: F1D2 029E RSBS R2, R2, #158 0x3419398A: 2A20 CMP R2, #32 0x3419398C: D205 BCS 46L1 ; 0x3419399A 0x3419398E: 0200 LSLS R0, R0, #8 0x34193990: F040 4000 ORR R0, R0, #0x80000000 0x34193994: 40D0 LSRS R0, R2 0x34193996: 2100 MOVS R1, #0 0x34193998: 4770 BX LR
.L1: 0x3419399A: 3220 ADDS R2, #32 0x3419399C: D307 BCC 46L2 ; 0x341939AE 0x3419399E: 0201 LSLS R1, R0, #8 0x341939A0: F041 4100 ORR R1, R1, #0x80000000 0x341939A4: FA61 F002 ROR.W R0, R1, R2 0x341939A8: 40D1 LSRS R1, R2 0x341939AA: 4048 EORS R0, R1 0x341939AC: 4770 BX LR
.L2: 0x341939AE: DD02 BLE 46L4 ; 0x341939B6
.L3: 0x341939B0: 2000 MOVS R0, #0 0x341939B2: 2100 MOVS R1, #0 0x341939B4: 4770 BX LR
.L4: 0x341939B6: F06F 0000 MVN R0, #0 0x341939BA: 4601 MOV R1, R0 0x341939BC: 4770 BX LR

Section .init.MDF1_FLT0_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


MDF1_FLT0_IRQHandler: 0x341939BE: E7FE B MDF1_FLT0_IRQHandler ; 0x341939BE

Section .text.libc.__aeabi_uldivmod from intasmops_arm.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=302, align=4


__aeabi_uldivmod: 0x341939C0: 2B00 CMP R3, #0 0x341939C2: D135 BNE 46L3 ; 0x34193A30 0x341939C4: B929 CBNZ R1, .L1 ; 0x341939D2 0x341939C6: FBB0 FCF2 UDIV R12, R0, R2 0x341939CA: FB0C 0212 MLS R2, R12, R2, R0 0x341939CE: 4660 MOV R0, R12 0x341939D0: 4770 BX LR
.L1: 0x341939D2: 4291 CMP R1, R2 0x341939D4: D215 BCS 46L2 ; 0x34193A02 0x341939D6: E92D 41F0 PUSH.W 123R4-R8, LR} 0x341939DA: FAB2 F382 CLZ R3, R2 0x341939DE: 409A LSLS R2, R3 0x341939E0: 4099 LSLS R1, R3 0x341939E2: F1D3 0C20 RSBS R12, R3, #32 0x341939E6: FA30 FC0C LSRS.W R12, R0, R12 0x341939EA: EA51 010C ORRS.W R1, R1, R12 0x341939EE: 4098 LSLS R0, R3 0x341939F0: F000 F84E BL 46L5 ; 0x34193A90 0x341939F4: 0028 MOVS R0, R5 0x341939F6: FA36 F203 LSRS.W R2, R6, R3 0x341939FA: 2100 MOVS R1, #0 0x341939FC: 2300 MOVS R3, #0 0x341939FE: E8BD 81F0 POP.W 123R4-R8, PC}
.L2: 0x34193A02: B5F0 PUSH 123R4-R7, LR} 0x34193A04: FBB1 FCF2 UDIV R12, R1, R2 0x34193A08: FB0C 1112 MLS R1, R12, R2, R1 0x34193A0C: FAB2 F382 CLZ R3, R2 0x34193A10: 409A LSLS R2, R3 0x34193A12: 4099 LSLS R1, R3 0x34193A14: F1D3 0620 RSBS R6, R3, #32 0x34193A18: FA30 F606 LSRS.W R6, R0, R6 0x34193A1C: 4331 ORRS R1, R6 0x34193A1E: 4098 LSLS R0, R3 0x34193A20: F000 F836 BL 46L5 ; 0x34193A90 0x34193A24: 4661 MOV R1, R12 0x34193A26: 0028 MOVS R0, R5 0x34193A28: 0032 MOVS R2, R6 0x34193A2A: 40DA LSRS R2, R3 0x34193A2C: 2300 MOVS R3, #0 0x34193A2E: BDF0 POP 123R4-R7, PC}
.L3: 0x34193A30: B5F3 PUSH 123R0-R1, R4-R7, LR} 0x34193A32: FAB3 FC83 CLZ R12, R3 0x34193A36: 0849 LSRS R1, R1, #1 0x34193A38: EA5F 0030 RRXS R0, R0 0x34193A3C: FA13 F30C LSLS.W R3, R3, R12 0x34193A40: F1DC 0420 RSBS R4, R12, #32 0x34193A44: FA32 F404 LSRS.W R4, R2, R4 0x34193A48: 4323 ORRS R3, R4 0x34193A4A: B40C PUSH 123R2-R3} 0x34193A4C: 001A MOVS R2, R3 0x34193A4E: F000 F81F BL 46L5 ; 0x34193A90 0x34193A52: BC0C POP 123R2-R3} 0x34193A54: FA33 F30C LSRS.W R3, R3, R12 0x34193A58: F1DC 0C1F RSBS R12, R12, #31 0x34193A5C: FA35 F50C LSRS.W R5, R5, R12 0x34193A60: BF18 IT NE 0x34193A62: 1E6D SUBNE R5, R5, #1 0x34193A64: BC03 POP 123R0-R1} 0x34193A66: FBA5 6702 UMULL R6, R7, R5, R2 0x34193A6A: FB05 7703 MLA R7, R5, R3, R7 0x34193A6E: 1B80 SUBS R0, R0, R6 0x34193A70: 41B9 SBCS R1, R7 0x34193A72: 4290 CMP R0, R2 0x34193A74: EB71 0C03 SBCS.W R12, R1, R3 0x34193A78: D305 BCC 46L4 ; 0x34193A86 0x34193A7A: 1A82 SUBS R2, R0, R2 0x34193A7C: EB71 0303 SBCS.W R3, R1, R3 0x34193A80: 1C68 ADDS R0, R5, #1 0x34193A82: 2100 MOVS R1, #0 0x34193A84: BDF0 POP 123R4-R7, PC}
.L4: 0x34193A86: 0002 MOVS R2, R0 0x34193A88: 000B MOVS R3, R1 0x34193A8A: 0028 MOVS R0, R5 0x34193A8C: 2100 MOVS R1, #0 0x34193A8E: BDF0 POP 123R4-R7, PC}
.L5: 0x34193A90: 0D94 LSRS R4, R2, #22 0x34193A92: F64F 75C2 MOVW R5, #0xFFC2 0x34193A96: 022D LSLS R5, R5, #8 0x34193A98: FBB5 F4F4 UDIV R4, R5, R4 0x34193A9C: 0AD6 LSRS R6, R2, #11 0x34193A9E: 1C76 ADDS R6, R6, #1 0x34193AA0: FB04 F504 MUL R5, R4, R4 0x34193AA4: FBA5 5606 UMULL R5, R6, R5, R6 0x34193AA8: 43F6 MVNS R6, R6 0x34193AAA: EB06 1604 ADD.W R6, R6, R4, LSL #4 0x34193AAE: 0855 LSRS R5, R2, #1 0x34193AB0: BF32 ITEE CC 0x34193AB2: 2700 MOVCC R7, #0 0x34193AB4: 0877 LSRCS R7, R6, #1 0x34193AB6: 1C6D ADDCS R5, R5, #1 0x34193AB8: FB05 7716 MLS R7, R5, R6, R7 0x34193ABC: FBA6 4707 UMULL R4, R7, R6, R7 0x34193AC0: 087F LSRS R7, R7, #1 0x34193AC2: EB07 37C6 ADD.W R7, R7, R6, LSL #15 0x34193AC6: 0014 MOVS R4, R2 0x34193AC8: 0015 MOVS R5, R2 0x34193ACA: FBE7 4502 UMLAL R4, R5, R7, R2 0x34193ACE: 1B7F SUBS R7, R7, R5 0x34193AD0: 1C4D ADDS R5, R1, #1 0x34193AD2: 0004 MOVS R4, R0 0x34193AD4: FBE7 4501 UMLAL R4, R5, R7, R1 0x34193AD8: FB05 0612 MLS R6, R5, R2, R0 0x34193ADC: 42A6 CMP R6, R4 0x34193ADE: BF84 ITT HI 0x34193AE0: 1E6D SUBHI R5, R5, #1 0x34193AE2: 18B6 ADDHI R6, R6, R2 0x34193AE4: 4296 CMP R6, R2 0x34193AE6: BF24 ITT CS 0x34193AE8: 1C6D ADDCS R5, R5, #1 0x34193AEA: 1AB6 SUBCS R6, R6, R2 0x34193AEC: 4770 BX LR

Section .init.MDF1_FLT1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


MDF1_FLT1_IRQHandler: 0x34193AEE: E7FE B MDF1_FLT1_IRQHandler ; 0x34193AEE

Section .init.MDF1_FLT2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


MDF1_FLT2_IRQHandler: 0x34193AF0: E7FE B MDF1_FLT2_IRQHandler ; 0x34193AF0

Section .init.MDF1_FLT3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


MDF1_FLT3_IRQHandler: 0x34193AF2: E7FE B MDF1_FLT3_IRQHandler ; 0x34193AF2

Section .init.MDF1_FLT4_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


MDF1_FLT4_IRQHandler: 0x34193AF4: E7FE B MDF1_FLT4_IRQHandler ; 0x34193AF4

Section .init.MDF1_FLT5_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


MDF1_FLT5_IRQHandler: 0x34193AF6: E7FE B MDF1_FLT5_IRQHandler ; 0x34193AF6

Section .init.SAI1_A_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SAI1_A_IRQHandler: 0x34193AF8: E7FE B SAI1_A_IRQHandler ; 0x34193AF8

Section .init.SAI1_B_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SAI1_B_IRQHandler: 0x34193AFA: E7FE B SAI1_B_IRQHandler ; 0x34193AFA

Section .init.SAI2_A_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SAI2_A_IRQHandler: 0x34193AFC: E7FE B SAI2_A_IRQHandler ; 0x34193AFC

Section .init.SAI2_B_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SAI2_B_IRQHandler: 0x34193AFE: E7FE B SAI2_B_IRQHandler ; 0x34193AFE

Section .init.SPDIFRX_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SPDIFRX_IRQHandler: 0x34193B00: E7FE B SPDIFRX_IRQHandler ; 0x34193B00

Section .init.SPI1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SPI1_IRQHandler: 0x34193B02: E7FE B SPI1_IRQHandler ; 0x34193B02

Section .init.SPI2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SPI2_IRQHandler: 0x34193B04: E7FE B SPI2_IRQHandler ; 0x34193B04

Section .init.SPI3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SPI3_IRQHandler: 0x34193B06: E7FE B SPI3_IRQHandler ; 0x34193B06

Section .init.SPI4_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SPI4_IRQHandler: 0x34193B08: E7FE B SPI4_IRQHandler ; 0x34193B08

Section .init.SPI5_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SPI5_IRQHandler: 0x34193B0A: E7FE B SPI5_IRQHandler ; 0x34193B0A

Section .init.SPI6_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SPI6_IRQHandler: 0x34193B0C: E7FE B SPI6_IRQHandler ; 0x34193B0C

Section .init.USART1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


USART1_IRQHandler: 0x34193B0E: E7FE B USART1_IRQHandler ; 0x34193B0E

Section .init.USART2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


USART2_IRQHandler: 0x34193B10: E7FE B USART2_IRQHandler ; 0x34193B10

Section .init.USART3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


USART3_IRQHandler: 0x34193B12: E7FE B USART3_IRQHandler ; 0x34193B12

Section .init.UART4_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


UART4_IRQHandler: 0x34193B14: E7FE B UART4_IRQHandler ; 0x34193B14

Section .init.UART5_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


UART5_IRQHandler: 0x34193B16: E7FE B UART5_IRQHandler ; 0x34193B16

Section .init.USART6_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


USART6_IRQHandler: 0x34193B18: E7FE B USART6_IRQHandler ; 0x34193B18

Section .init.UART7_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


UART7_IRQHandler: 0x34193B1A: E7FE B UART7_IRQHandler ; 0x34193B1A

Section .init.UART8_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


UART8_IRQHandler: 0x34193B1C: E7FE B UART8_IRQHandler ; 0x34193B1C

Section .init.UART9_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


UART9_IRQHandler: 0x34193B1E: E7FE B UART9_IRQHandler ; 0x34193B1E

Section .init.USART10_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


USART10_IRQHandler: 0x34193B20: E7FE B USART10_IRQHandler ; 0x34193B20

Section .init.LPUART1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


LPUART1_IRQHandler: 0x34193B22: E7FE B LPUART1_IRQHandler ; 0x34193B22

Section .init.XSPI1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


XSPI1_IRQHandler: 0x34193B24: E7FE B XSPI1_IRQHandler ; 0x34193B24

Section .init.XSPI2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


XSPI2_IRQHandler: 0x34193B26: E7FE B XSPI2_IRQHandler ; 0x34193B26

Section .init.XSPI3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


XSPI3_IRQHandler: 0x34193B28: E7FE B XSPI3_IRQHandler ; 0x34193B28

Section .init.FMC_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


FMC_IRQHandler: 0x34193B2A: E7FE B FMC_IRQHandler ; 0x34193B2A

Section .init.SDMMC1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SDMMC1_IRQHandler: 0x34193B2C: E7FE B SDMMC1_IRQHandler ; 0x34193B2C

Section .init.SDMMC2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SDMMC2_IRQHandler: 0x34193B2E: E7FE B SDMMC2_IRQHandler ; 0x34193B2E

Section .init.UCPD1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


UCPD1_IRQHandler: 0x34193B30: E7FE B UCPD1_IRQHandler ; 0x34193B30

Section .init.USB1_OTG_HS_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


USB1_OTG_HS_IRQHandler: 0x34193B32: E7FE B USB1_OTG_HS_IRQHandler ; 0x34193B32

Section .init.USB2_OTG_HS_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


USB2_OTG_HS_IRQHandler: 0x34193B34: E7FE B USB2_OTG_HS_IRQHandler ; 0x34193B34

Section .init.ETH1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


ETH1_IRQHandler: 0x34193B36: E7FE B ETH1_IRQHandler ; 0x34193B36

Section .init.FDCAN1_IT0_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


FDCAN1_IT0_IRQHandler: 0x34193B38: E7FE B FDCAN1_IT0_IRQHandler ; 0x34193B38

Section .init.FDCAN1_IT1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


FDCAN1_IT1_IRQHandler: 0x34193B3A: E7FE B FDCAN1_IT1_IRQHandler ; 0x34193B3A

Section .init.FDCAN2_IT0_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


FDCAN2_IT0_IRQHandler: 0x34193B3C: E7FE B FDCAN2_IT0_IRQHandler ; 0x34193B3C

Section .init.FDCAN2_IT1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


FDCAN2_IT1_IRQHandler: 0x34193B3E: E7FE B FDCAN2_IT1_IRQHandler ; 0x34193B3E

Section .init.FDCAN3_IT0_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


FDCAN3_IT0_IRQHandler: 0x34193B40: E7FE B FDCAN3_IT0_IRQHandler ; 0x34193B40

Section .init.FDCAN3_IT1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


FDCAN3_IT1_IRQHandler: 0x34193B42: E7FE B FDCAN3_IT1_IRQHandler ; 0x34193B42

Section .init.FDCAN_CU_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


FDCAN_CU_IRQHandler: 0x34193B44: E7FE B FDCAN_CU_IRQHandler ; 0x34193B44

Section .init.MDIOS_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


MDIOS_IRQHandler: 0x34193B46: E7FE B MDIOS_IRQHandler ; 0x34193B46

Section .init.DCMI_PSSI_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


DCMI_PSSI_IRQHandler: 0x34193B48: E7FE B DCMI_PSSI_IRQHandler ; 0x34193B48

Section .init.WAKEUP_PIN_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


WAKEUP_PIN_IRQHandler: 0x34193B4A: E7FE B WAKEUP_PIN_IRQHandler ; 0x34193B4A

Section .init.CTI_INT0_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


CTI_INT0_IRQHandler: 0x34193B4C: E7FE B CTI_INT0_IRQHandler ; 0x34193B4C

Section .init.CTI_INT1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


CTI_INT1_IRQHandler: 0x34193B4E: E7FE B CTI_INT1_IRQHandler ; 0x34193B4E

Section .init.LTDC_UP_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


LTDC_UP_IRQHandler: 0x34193B50: E7FE B LTDC_UP_IRQHandler ; 0x34193B50

Section .init.LTDC_UP_ERR_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


LTDC_UP_ERR_IRQHandler: 0x34193B52: E7FE B LTDC_UP_ERR_IRQHandler ; 0x34193B52

Section .text.libc.fwrite from fileops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=46, align=2


fwrite: 0x34193B54: B5F8 PUSH 123R3-R7, LR} 0x34193B56: 4606 MOV R6, R0 0x34193B58: 4618 MOV R0, R3 0x34193B5A: 461D MOV R5, R3 0x34193B5C: 4617 MOV R7, R2 0x34193B5E: 460C MOV R4, R1 0x34193B60: F000 F9CC BL __SEGGER_RTL_X_file_stat ; 0x34193EFC 0x34193B64: 2800 CMP R0, #0 0x34193B66: D403 BMI 46L1 ; 0x34193B70 0x34193B68: FB07 F204 MUL R2, R7, R4 0x34193B6C: 42A2 CMP R2, R4 0x34193B6E: D201 BCS 46L2 ; 0x34193B74
.L1: 0x34193B70: 2000 MOVS R0, #0 0x34193B72: BDF8 POP 123R3-R7, PC}
.L2: 0x34193B74: 4628 MOV R0, R5 0x34193B76: 4631 MOV R1, R6 0x34193B78: F000 F85D BL __SEGGER_RTL_X_file_write ; 0x34193C36 0x34193B7C: FBB0 F0F4 UDIV R0, R0, R4 0x34193B80: BDF8 POP 123R3-R7, PC}

Section .text.libc.__SEGGER_RTL_float32_isnan from floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=14, align=2


__SEGGER_RTL_float32_isnan: 0x34193B82: EEB4 0A40 VCMP.F32 S0, S0 0x34193B86: EEF1 FA10 VMRS APSR_nzcv, FPSCR 0x34193B8A: EA5F 907F CSET R0, VS 0x34193B8E: 4770 BX LR

Section .text.libc.__SEGGER_RTL_float32_isinf from floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=18, align=2


__SEGGER_RTL_float32_isinf: 0x34193B90: EE10 0A10 VMOV R0, S0 0x34193B94: F020 4000 BIC R0, R0, #0x80000000 0x34193B98: F1B0 4FFF CMP.W R0, #0x7F800000 0x34193B9C: EA5F 901F CSET R0, EQ 0x34193BA0: 4770 BX LR

Section .text.libc.ldexpf from floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=54, align=2


ldexpf: 0x34193BA2: EE10 1A10 VMOV R1, S0 0x34193BA6: F3C1 52C7 UBFX R2, R1, #23, #8 0x34193BAA: F1A2 03FF SUB.W R3, R2, #255 0x34193BAE: F113 0FFE CMN R3, #254 0x34193BB2: D310 BCC 46L3 ; 0x34193BD6 0x34193BB4: 4402 ADD R2, R0 0x34193BB6: 1E50 SUBS R0, R2, #1 0x34193BB8: 28FD CMP R0, #253 0x34193BBA: D804 BHI 46L1 ; 0x34193BC6 0x34193BBC: F021 40FF BIC R0, R1, #0x7F800000 0x34193BC0: EA40 50C2 ORR.W R0, R0, R2, LSL #23 0x34193BC4: E005 B 46L2 ; 0x34193BD2
.L1: 0x34193BC6: F001 4000 AND R0, R1, #0x80000000 0x34193BCA: 2A01 CMP R2, #1 0x34193BCC: BFA8 IT GE 0x34193BCE: F100 40FF ADDGE.W R0, R0, #0x7F800000
.L2: 0x34193BD2: EE00 0A10 VMOV S0, R0
.L3: 0x34193BD6: 4770 BX LR

Section .text.libc.__SEGGER_RTL_pow10f from utilops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=58, align=2


__SEGGER_RTL_pow10f: 0x34193BD8: EEB7 0A00 VMOV.F32 S0, #1 0x34193BDC: 2800 CMP R0, #0 0x34193BDE: EEB0 1A40 VMOV.F32 S2, S0 0x34193BE2: D010 BEQ 46L2 ; 0x34193C06 0x34193BE4: EEB7 1A00 VMOV.F32 S2, #1 0x34193BE8: F24D 61C0 MOVW R1, #0xD6C0 ; 0x3418D6C0 = __SEGGER_RTL_aPower2f 0x34193BEC: F2C3 4118 MOVT R1, #0x3418 ; 0x3418D6C0 = __SEGGER_RTL_aPower2f 0x34193BF0: EA50 B250 CNEG R2, R0, MI
.L1: 0x34193BF4: 07D3 LSLS R3, R2, #31 0x34193BF6: BF1C ITT NE 0x34193BF8: ED91 2A00 VLDRNE S4, [R1] 0x34193BFC: EE21 1A02 VMULNE.F32 S2, S2, S4 0x34193C00: 3104 ADDS R1, #4 0x34193C02: 0852 LSRS R2, R2, #1 0x34193C04: D1F6 BNE 46L1 ; 0x34193BF4
.L2: 0x34193C06: EE80 0A01 VDIV.F32 S0, S0, S2 0x34193C0A: 2800 CMP R0, #0 0x34193C0C: FE21 0A00 VSELGE.F32 S0, S2, S0 0x34193C10: 4770 BX LR

Section .text.libc.__SEGGER_RTL_prin_flush from prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=26, align=2


__SEGGER_RTL_prin_flush: 0x34193C12: 6942 LDR R2, [R0, #20] 0x34193C14: B14A CBZ R2, .L1 ; 0x34193C2A 0x34193C16: B510 PUSH 123R4, LR} 0x34193C18: 6A03 LDR R3, [R0, #32] 0x34193C1A: 4604 MOV R4, R0 0x34193C1C: 2B00 CMP R3, #0 0x34193C1E: BF1C ITT NE 0x34193C20: 6921 LDRNE R1, [R4, #16] 0x34193C22: 4798 BLXNE R3 0x34193C24: 2000 MOVS R0, #0 0x34193C26: 6160 STR R0, [R4, #20] 0x34193C28: BD10 POP 123R4, PC}
.L1: 0x34193C2A: 4770 BX LR

Section .text.libc.__SEGGER_RTL_stream_write from prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=10, align=2


__SEGGER_RTL_stream_write: 0x34193C2C: 6A43 LDR R3, [R0, #36] 0x34193C2E: 4608 MOV R0, R1 0x34193C30: 2101 MOVS R1, #1 0x34193C32: F7FF BF8F B.W fwrite ; 0x34193B54

Section .text.libc.__SEGGER_RTL_X_file_write from prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=6, align=2


__SEGGER_RTL_X_file_write: 0x34193C36: 6800 LDR R0, [R0] 0x34193C38: F000 B9D4 B.W SEGGER_RTT_Write ; 0x34193FE4

Section .text.libc._DoInit from SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=98, align=2


_DoInit: 0x34193C3C: B500 PUSH 123LR} 0x34193C3E: F240 00AC MOVW R0, #172 ; 0x340000AC = _SEGGER_RTT 0x34193C42: 2103 MOVS R1, #3 0x34193C44: F2C3 4000 MOVT R0, #0x3400 ; 0x340000AC = _SEGGER_RTT 0x34193C48: F244 32C0 MOVW R2, #0x43C0 ; 0x341943C0 = .rodata.libc..L.str 0x34193C4C: 6101 STR R1, [R0, #16] 0x34193C4E: F2C3 4219 MOVT R2, #0x3419 ; 0x341943C0 = .rodata.libc..L.str 0x34193C52: 6141 STR R1, [R0, #20] 0x34193C54: F240 3158 MOVW R1, #0x0358 ; 0x34000358 = _acUpBuffer 0x34193C58: F2C3 4100 MOVT R1, #0x3400 ; 0x34000358 = _acUpBuffer 0x34193C5C: 6182 STR R2, [R0, #24] 0x34193C5E: 61C1 STR R1, [R0, #28] 0x34193C60: F44F 6180 MOV.W R1, #0x0400 0x34193C64: F240 7358 MOVW R3, #0x0758 ; 0x34000758 = _acDownBuffer 0x34193C68: 6201 STR R1, [R0, #32] 0x34193C6A: 2100 MOVS R1, #0 0x34193C6C: F2C3 4300 MOVT R3, #0x3400 ; 0x34000758 = _acDownBuffer 0x34193C70: F04F 0E10 MOV.W LR, #16 0x34193C74: 6281 STR R1, [R0, #40] 0x34193C76: 6241 STR R1, [R0, #36] 0x34193C78: 62C1 STR R1, [R0, #44] 0x34193C7A: 6602 STR R2, [R0, #96] 0x34193C7C: F244 32AF MOVW R2, #0x43AF ; 0x341943AF = _DoInit._aInitStr 0x34193C80: 6643 STR R3, [R0, #100] 0x34193C82: F2C3 4219 MOVT R2, #0x3419 ; 0x341943AF = _DoInit._aInitStr 0x34193C86: F8C0 E068 STR.W LR, [R0, #104] 0x34193C8A: 6701 STR R1, [R0, #112] 0x34193C8C: 66C1 STR R1, [R0, #108] 0x34193C8E: 6741 STR R1, [R0, #116]
.L1: 0x34193C90: 1A53 SUBS R3, R2, R1 0x34193C92: 7BDB LDRB R3, [R3, #15] 0x34193C94: 5443 STRB R3, [R0, R1] 0x34193C96: 3101 ADDS R1, #1 0x34193C98: F00F C007 LE LR, .L1 ; 0x34193C90 0x34193C9C: BD00 POP 123PC}

Section .text.libc._GetAvailWriteSpace from SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=22, align=2


_GetAvailWriteSpace: 0x34193C9E: 4601 MOV R1, R0 0x34193CA0: 68C0 LDR R0, [R0, #12] 0x34193CA2: 690A LDR R2, [R1, #16] 0x34193CA4: 4282 CMP R2, R0 0x34193CA6: EA6F 0000 MVN.W R0, R0 0x34193CAA: 4410 ADD R0, R2 0x34193CAC: BF9C ITT LS 0x34193CAE: 6889 LDRLS R1, [R1, #8] 0x34193CB0: 4408 ADDLS R0, R1 0x34193CB2: 4770 BX LR

Section .text.libc._WriteNoCheck from SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=58, align=2


_WriteNoCheck: 0x34193CB4: E92D 41F0 PUSH.W 123R4-R8, LR} 0x34193CB8: 4604 MOV R4, R0 0x34193CBA: 6880 LDR R0, [R0, #8] 0x34193CBC: 68E6 LDR R6, [R4, #12] 0x34193CBE: 4615 MOV R5, R2 0x34193CC0: 6863 LDR R3, [R4, #4] 0x34193CC2: 1B87 SUBS R7, R0, R6 0x34193CC4: 1998 ADDS R0, R3, R6 0x34193CC6: 42BA CMP R2, R7 0x34193CC8: D203 BCS 46L1 ; 0x34193CD2 0x34193CCA: F7F9 FD2F BL memcpy ; 0x3418D72C 0x34193CCE: 4435 ADD R5, R6 0x34193CD0: E00A B 46L2 ; 0x34193CE8
.L1: 0x34193CD2: 463A MOV R2, R7 0x34193CD4: 4688 MOV R8, R1 0x34193CD6: F7F9 FD29 BL memcpy ; 0x3418D72C 0x34193CDA: 1BED SUBS R5, R5, R7 0x34193CDC: 6860 LDR R0, [R4, #4] 0x34193CDE: EB08 0107 ADD.W R1, R8, R7 0x34193CE2: 462A MOV R2, R5 0x34193CE4: F7F9 FD22 BL memcpy ; 0x3418D72C
.L2: 0x34193CE8: 60E5 STR R5, [R4, #12] 0x34193CEA: E8BD 81F0 POP.W 123R4-R8, PC}

Section .text.libc.strlen from strops.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=42, align=2


strlen: 0x34193CEE: 7801 LDRB R1, [R0] 0x34193CF0: B181 CBZ R1, .L2 ; 0x34193D14 0x34193CF2: 4602 MOV R2, R0
.L1: 0x34193CF4: 4694 MOV R12, R2 0x34193CF6: F852 3B04 LDR R3, [R2], #4 0x34193CFA: F1A3 3101 SUB.W R1, R3, #0x01010101 0x34193CFE: 4399 BICS R1, R3 0x34193D00: F031 337F BICS R3, R1, #0x7F7F7F7F 0x34193D04: D0F6 BEQ 46L1 ; 0x34193CF4 0x34193D06: BA19 REV R1, R3 0x34193D08: FAB1 F181 CLZ R1, R1 0x34193D0C: EB0C 01D1 ADD.W R1, R12, R1, LSR #3 0x34193D10: 1A08 SUBS R0, R1, R0 0x34193D12: 4770 BX LR
.L2: 0x34193D14: 2000 MOVS R0, #0 0x34193D16: 4770 BX LR

Section .text.libc.__SEGGER_RTL_current_locale from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=26, align=2


__SEGGER_RTL_current_locale: 0x34193D18: F240 3050 MOVW R0, #0x0350 ; 0x34000350 = __SEGGER_RTL_locale_ptr 0x34193D1C: F240 7168 MOVW R1, #0x0768 ; 0x34000768 = __SEGGER_RTL_global_locale 0x34193D20: F2C3 4000 MOVT R0, #0x3400 ; 0x34000350 = __SEGGER_RTL_locale_ptr 0x34193D24: F2C3 4100 MOVT R1, #0x3400 ; 0x34000768 = __SEGGER_RTL_global_locale 0x34193D28: 6800 LDR R0, [R0] 0x34193D2A: 2800 CMP R0, #0 0x34193D2C: EA51 8000 CSEL R0, R1, R0, EQ 0x34193D30: 4770 BX LR

Section .text.libc.__SEGGER_RTL_ascii_wctomb from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=14, align=2


__SEGGER_RTL_ascii_wctomb: 0x34193D32: 297F CMP R1, #127 0x34193D34: BF8E ITEE HI 0x34193D36: F06F 0001 MVNHI R0, #1 0x34193D3A: 7001 STRBLS R1, [R0] 0x34193D3C: 2001 MOVLS R0, #1 0x34193D3E: 4770 BX LR

Section .rodata.SFDP_BuildGenericDriver.block_erase_unit from blto2_FSBL_lto.o, size=8, align=2


SFDP_BuildGenericDriver.block_erase_unit: 0x34193D40: 10 DC.B 0x10 ; '\x10' 0x34193D41: 00 DC.B 0x00 ; '\0' 0x34193D42: 00 DC.B 0x00 ; '\0' 0x34193D43: 01 DC.B 0x01 ; '\x01' 0x34193D44: A0 DC.B 0xA0 ; '\xA0' 0x34193D45: 0F DC.B 0x0F ; '\x0F' 0x34193D46: 00 DC.B 0x00 ; '\0' 0x34193D47: FA DC.B 0xFA ; '\xFA'

Section .text.libc.__SEGGER_RTL_float32_isnormal from floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=24, align=2


__SEGGER_RTL_float32_isnormal: 0x34193D48: EE10 0A10 VMOV R0, S0 0x34193D4C: 0041 LSLS R1, R0, #1 0x34193D4E: F1B1 4F7F CMP.W R1, #0xFF000000 0x34193D52: EA5F 912F CSET R1, CC 0x34193D56: F010 4FFF TST R0, #0x7F800000 0x34193D5A: EA5F 8001 CSEL R0, ZR, R1, EQ 0x34193D5E: 4770 BX LR

Section .text.libc.__SEGGER_RTL_float32_signbit from floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=8, align=2


__SEGGER_RTL_float32_signbit: 0x34193D60: EE10 0A10 VMOV R0, S0 0x34193D64: 0FC0 LSRS R0, R0, #31 0x34193D66: 4770 BX LR

Section .text.libc.frexpf from floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=36, align=2


frexpf: 0x34193D68: EE10 1A10 VMOV R1, S0 0x34193D6C: 227E MOVS R2, #126 0x34193D6E: F3C1 53C7 UBFX R3, R1, #23, #8 0x34193D72: F362 51DE BFI R1, R2, #23, #8 0x34193D76: 1E5A SUBS R2, R3, #1 0x34193D78: 2AFE CMP R2, #254 0x34193D7A: BF38 IT CC 0x34193D7C: EE00 1A10 VMOVCC S0, R1 0x34193D80: BF2C ITE CS 0x34193D82: 2100 MOVCS R1, #0 0x34193D84: F1A3 017E SUBCC.W R1, R3, #126 0x34193D88: 6001 STR R1, [R0] 0x34193D8A: 4770 BX LR

Section .text.libc.abs from intops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=8, align=2


abs: 0x34193D8C: 2800 CMP R0, #0 0x34193D8E: EA50 B050 CNEG R0, R0, MI 0x34193D92: 4770 BX LR

Section .text.libc.__SEGGER_RTL_putc from prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=132, align=2


__SEGGER_RTL_putc: 0x34193D94: B510 PUSH 123R4, LR} 0x34193D96: B082 SUB SP, SP, #8 0x34193D98: 4604 MOV R4, R0 0x34193D9A: 6900 LDR R0, [R0, #16] 0x34193D9C: F88D 1007 STRB.W R1, [SP, #7] 0x34193DA0: B178 CBZ R0, .L1 ; 0x34193DC2 0x34193DA2: E9D4 2300 LDRD R2, R3, [R4] 0x34193DA6: 429A CMP R2, R3 0x34193DA8: D231 BCS 46L4 ; 0x34193E0E 0x34193DAA: 6962 LDR R2, [R4, #20] 0x34193DAC: 1C53 ADDS R3, R2, #1 0x34193DAE: 6163 STR R3, [R4, #20] 0x34193DB0: 5481 STRB R1, [R0, R2] 0x34193DB2: E9D4 0105 LDRD R0, R1, [R4, #20] 0x34193DB6: 4288 CMP R0, R1 0x34193DB8: D129 BNE 46L4 ; 0x34193E0E 0x34193DBA: 4620 MOV R0, R4 0x34193DBC: F7FF FF29 BL __SEGGER_RTL_prin_flush ; 0x34193C12 0x34193DC0: E025 B 46L4 ; 0x34193E0E
.L1: 0x34193DC2: 68E0 LDR R0, [R4, #12] 0x34193DC4: B150 CBZ R0, .L2 ; 0x34193DDC 0x34193DC6: E9D4 2C00 LDRD R2, R12, [R4] 0x34193DCA: 4562 CMP R2, R12 0x34193DCC: D21F BCS 46L4 ; 0x34193E0E 0x34193DCE: 1C53 ADDS R3, R2, #1 0x34193DD0: EBB3 030C SUBS.W R3, R3, R12 0x34193DD4: EA51 8113 CSEL R1, R1, R3, NE 0x34193DD8: 5481 STRB R1, [R0, R2] 0x34193DDA: E018 B 46L4 ; 0x34193E0E
.L2: 0x34193DDC: 68A0 LDR R0, [R4, #8] 0x34193DDE: B158 CBZ R0, .L3 ; 0x34193DF8 0x34193DE0: E9D4 2C00 LDRD R2, R12, [R4] 0x34193DE4: 4562 CMP R2, R12 0x34193DE6: D212 BCS 46L4 ; 0x34193E0E 0x34193DE8: 1C53 ADDS R3, R2, #1 0x34193DEA: EBB3 030C SUBS.W R3, R3, R12 0x34193DEE: BF18 IT NE 0x34193DF0: B2CB UXTBNE R3, R1 0x34193DF2: F840 3022 STR.W R3, [R0, R2, LSL #2] 0x34193DF6: E00A B 46L4 ; 0x34193E0E
.L3: 0x34193DF8: 6A23 LDR R3, [R4, #32] 0x34193DFA: B143 CBZ R3, .L4 ; 0x34193E0E 0x34193DFC: E9D4 0100 LDRD R0, R1, [R4] 0x34193E00: 4288 CMP R0, R1 0x34193E02: D204 BCS 46L4 ; 0x34193E0E 0x34193E04: F10D 0107 ADD.W R1, SP, #7 0x34193E08: 4620 MOV R0, R4 0x34193E0A: 2201 MOVS R2, #1 0x34193E0C: 4798 BLX R3
.L4: 0x34193E0E: 6820 LDR R0, [R4] 0x34193E10: 3001 ADDS R0, #1 0x34193E12: 6020 STR R0, [R4] 0x34193E14: B002 ADD SP, SP, #8 0x34193E16: BD10 POP 123R4, PC}

Section .text.libc.__SEGGER_RTL_print_padding from prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=32, align=2


__SEGGER_RTL_print_padding: 0x34193E18: 2A01 CMP R2, #1 0x34193E1A: DB0C BLT 46L2 ; 0x34193E36 0x34193E1C: B5F8 PUSH 123R3-R7, LR} 0x34193E1E: 4615 MOV R5, R2 0x34193E20: 460C MOV R4, R1 0x34193E22: 4606 MOV R6, R0
.L1: 0x34193E24: 4630 MOV R0, R6 0x34193E26: 4621 MOV R1, R4 0x34193E28: 462F MOV R7, R5 0x34193E2A: 3D01 SUBS R5, #1 0x34193E2C: F7FF FFB2 BL __SEGGER_RTL_putc ; 0x34193D94 0x34193E30: 2F01 CMP R7, #1 0x34193E32: D8F7 BHI 46L1 ; 0x34193E24 0x34193E34: BDF8 POP 123R3-R7, PC}
.L2: 0x34193E36: 4770 BX LR

Section .text.libc.__SEGGER_RTL_pre_padding from prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=20, align=2


__SEGGER_RTL_pre_padding: 0x34193E38: 06CB LSLS R3, R1, #27 0x34193E3A: D406 BMI 46L1 ; 0x34193E4A 0x34193E3C: 2330 MOVS R3, #48 0x34193E3E: 0589 LSLS R1, R1, #22 0x34193E40: BF58 IT PL 0x34193E42: 2320 MOVPL R3, #32 0x34193E44: 4619 MOV R1, R3 0x34193E46: F7FF BFE7 B.W __SEGGER_RTL_print_padding ; 0x34193E18
.L1: 0x34193E4A: 4770 BX LR

Section .text.libc.vfprintf from prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=28, align=2


vfprintf: 0x34193E4C: B570 PUSH 123R4-R6, LR} 0x34193E4E: 4614 MOV R4, R2 0x34193E50: 460D MOV R5, R1 0x34193E52: 4606 MOV R6, R0 0x34193E54: F7FF FF60 BL __SEGGER_RTL_current_locale ; 0x34193D18 0x34193E58: 4601 MOV R1, R0 0x34193E5A: 4630 MOV R0, R6 0x34193E5C: 462A MOV R2, R5 0x34193E5E: 4623 MOV R3, R4 0x34193E60: E8BD 4070 POP.W 123R4-R6, LR} 0x34193E64: F000 B800 B.W vfprintf_l ; 0x34193E68

Section .text.libc.vfprintf_l from prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=104, align=2


vfprintf_l: 0x34193E68: E92D 4FF0 PUSH.W 123R4-R11, LR} 0x34193E6C: AF03 ADD R7, SP, #12 0x34193E6E: B08D SUB SP, SP, #52 0x34193E70: F847 3C3C STR R3, [R7, #-60] 0x34193E74: 4691 MOV R9, R2 0x34193E76: 460C MOV R4, R1 0x34193E78: 4606 MOV R6, R0 0x34193E7A: F000 F859 BL __SEGGER_RTL_X_file_bufsize ; 0x34193F30 0x34193E7E: 4605 MOV R5, R0 0x34193E80: 3007 ADDS R0, #7 0x34193E82: F020 0007 BIC R0, R0, #7 0x34193E86: 46EB MOV R11, SP 0x34193E88: EBAD 0800 SUB.W R8, SP, R0 0x34193E8C: 46C5 MOV SP, R8 0x34193E8E: F1A7 0A38 SUB.W R10, R7, #56 0x34193E92: 2100 MOVS R1, #0 0x34193E94: 2224 MOVS R2, #36 0x34193E96: 4650 MOV R0, R10 0x34193E98: F7F9 FC7A BL memset ; 0x3418D790 0x34193E9C: F06F 4000 MVN R0, #0x80000000 0x34193EA0: F857 2C3C LDR R2, [R7, #-60] 0x34193EA4: F847 0C34 STR R0, [R7, #-52] 0x34193EA8: F643 402D MOVW R0, #0x3C2D ; 0x34193C2D = __SEGGER_RTL_stream_write 0x34193EAC: F2C3 4019 MOVT R0, #0x3419 ; 0x34193C2D = __SEGGER_RTL_stream_write 0x34193EB0: 4649 MOV R1, R9 0x34193EB2: E947 0606 STRD R0, R6, [R7, #-24] 0x34193EB6: 4650 MOV R0, R10 0x34193EB8: E947 5408 STRD R5, R4, [R7, #-32] 0x34193EBC: F847 8C28 STR R8, [R7, #-40] 0x34193EC0: F7EC FC96 BL __SEGGER_RTL_vfprintf_short_float_long_long ; 0x341807F0 0x34193EC4: 46DD MOV SP, R11 0x34193EC6: F1A7 040C SUB.W R4, R7, #12 0x34193ECA: 46A5 MOV SP, R4 0x34193ECC: E8BD 8FF0 POP.W 123R4-R11, PC}

Section .text.libc.printf from prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=44, align=2


printf: 0x34193ED0: B083 SUB SP, SP, #12 0x34193ED2: B500 PUSH 123LR} 0x34193ED4: B082 SUB SP, SP, #8 0x34193ED6: F240 7C80 MOVW R12, #0x0780 ; 0x34000780 = stdout 0x34193EDA: E9CD 1203 STRD R1, R2, [SP, #12] 0x34193EDE: F2C3 4C00 MOVT R12, #0x3400 ; 0x34000780 = stdout 0x34193EE2: 9305 STR R3, [SP, #20] 0x34193EE4: 4601 MOV R1, R0 0x34193EE6: F8DC 0000 LDR.W R0, [R12] 0x34193EEA: AA03 ADD R2, SP, #12 0x34193EEC: 9201 STR R2, [SP, #4] 0x34193EEE: F7FF FFAD BL vfprintf ; 0x34193E4C 0x34193EF2: B002 ADD SP, SP, #8 0x34193EF4: F85D EB04 POP.W 123LR} 0x34193EF8: B003 ADD SP, SP, #12 0x34193EFA: 4770 BX LR

Section .text.libc.__SEGGER_RTL_X_file_stat from prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=52, align=2


__SEGGER_RTL_X_file_stat: 0x34193EFC: F240 7184 MOVW R1, #0x0784 ; 0x34000784 = stdin 0x34193F00: F240 7280 MOVW R2, #0x0780 ; 0x34000780 = stdout 0x34193F04: F2C3 4100 MOVT R1, #0x3400 ; 0x34000784 = stdin 0x34193F08: F2C3 4200 MOVT R2, #0x3400 ; 0x34000780 = stdout 0x34193F0C: 6809 LDR R1, [R1] 0x34193F0E: F240 7388 MOVW R3, #0x0788 ; 0x34000788 = stderr 0x34193F12: F2C3 4300 MOVT R3, #0x3400 ; 0x34000788 = stderr 0x34193F16: 6812 LDR R2, [R2] 0x34193F18: 4288 CMP R0, R1 0x34193F1A: EA5F 910F CSET R1, NE 0x34193F1E: 681B LDR R3, [R3] 0x34193F20: 4290 CMP R0, R2 0x34193F22: EA5F 8101 CSEL R1, ZR, R1, EQ 0x34193F26: 4298 CMP R0, R3 0x34193F28: EA5F 8001 CSEL R0, ZR, R1, EQ 0x34193F2C: 4240 RSBS R0, R0, #0 0x34193F2E: 4770 BX LR

Section .text.libc.__SEGGER_RTL_X_file_bufsize from prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=4, align=2


__SEGGER_RTL_X_file_bufsize: 0x34193F30: 2040 MOVS R0, #64 0x34193F32: 4770 BX LR

Section .text.libc._WriteBlocking from SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=88, align=2


_WriteBlocking: 0x34193F34: E92D 43F8 PUSH.W 123R3-R9, LR} 0x34193F38: 68C7 LDR R7, [R0, #12] 0x34193F3A: 4614 MOV R4, R2 0x34193F3C: 4688 MOV R8, R1 0x34193F3E: 4605 MOV R5, R0 0x34193F40: F04F 0900 MOV.W R9, #0
.L1: 0x34193F44: 6928 LDR R0, [R5, #16] 0x34193F46: 43F9 MVNS R1, R7 0x34193F48: 42B8 CMP R0, R7 0x34193F4A: 4408 ADD R0, R1 0x34193F4C: 68A9 LDR R1, [R5, #8] 0x34193F4E: BF98 IT LS 0x34193F50: 4408 ADDLS R0, R1 0x34193F52: 686A LDR R2, [R5, #4] 0x34193F54: 1BC9 SUBS R1, R1, R7 0x34193F56: 4288 CMP R0, R1 0x34193F58: EA50 8031 CSEL R0, R0, R1, CC 0x34193F5C: 4641 MOV R1, R8 0x34193F5E: 42A0 CMP R0, R4 0x34193F60: EA50 8634 CSEL R6, R0, R4, CC 0x34193F64: 19D0 ADDS R0, R2, R7 0x34193F66: 4632 MOV R2, R6 0x34193F68: F7F9 FBE0 BL memcpy ; 0x3418D72C 0x34193F6C: 68A8 LDR R0, [R5, #8] 0x34193F6E: 19F1 ADDS R1, R6, R7 0x34193F70: 44B1 ADD R9, R6 0x34193F72: 44B0 ADD R8, R6 0x34193F74: 1A08 SUBS R0, R1, R0 0x34193F76: EBA4 0406 SUB.W R4, R4, R6 0x34193F7A: EA51 8710 CSEL R7, R1, R0, NE 0x34193F7E: 60EF STR R7, [R5, #12] 0x34193F80: B10C CBZ R4, .L2 ; 0x34193F86 0x34193F82: F02F C821 LE 46L1 ; 0x34193F44
.L2: 0x34193F86: 4648 MOV R0, R9 0x34193F88: E8BD 83F8 POP.W 123R3-R9, PC}

Section .text.libc.SEGGER_RTT_WriteNoLock from SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=88, align=2


SEGGER_RTT_WriteNoLock: 0x34193F8C: B570 PUSH 123R4-R6, LR} 0x34193F8E: EB00 0040 ADD.W R0, R0, R0, LSL #1 0x34193F92: F240 03AC MOVW R3, #172 ; 0x340000AC = _SEGGER_RTT 0x34193F96: F2C3 4300 MOVT R3, #0x3400 ; 0x340000AC = _SEGGER_RTT 0x34193F9A: EB03 03C0 ADD.W R3, R3, R0, LSL #3 0x34193F9E: F103 0618 ADD.W R6, R3, #24 0x34193FA2: 6AD8 LDR R0, [R3, #44] 0x34193FA4: 2802 CMP R0, #2 0x34193FA6: D018 BEQ 46L5 ; 0x34193FDA 0x34193FA8: 460D MOV R5, R1 0x34193FAA: 4614 MOV R4, R2 0x34193FAC: 2801 CMP R0, #1 0x34193FAE: D007 BEQ 46L2 ; 0x34193FC0 0x34193FB0: B920 CBNZ R0, .L1 ; 0x34193FBC 0x34193FB2: 4630 MOV R0, R6 0x34193FB4: F7FF FE73 BL _GetAvailWriteSpace ; 0x34193C9E 0x34193FB8: 42A0 CMP R0, R4 0x34193FBA: D207 BCS 46L3 ; 0x34193FCC
.L1: 0x34193FBC: 2400 MOVS R4, #0 0x34193FBE: E00A B 46L4 ; 0x34193FD6
.L2: 0x34193FC0: 4630 MOV R0, R6 0x34193FC2: F7FF FE6C BL _GetAvailWriteSpace ; 0x34193C9E 0x34193FC6: 42A0 CMP R0, R4 0x34193FC8: EA50 8434 CSEL R4, R0, R4, CC
.L3: 0x34193FCC: 4630 MOV R0, R6 0x34193FCE: 4629 MOV R1, R5 0x34193FD0: 4622 MOV R2, R4 0x34193FD2: F7FF FE6F BL _WriteNoCheck ; 0x34193CB4
.L4: 0x34193FD6: 4620 MOV R0, R4 0x34193FD8: BD70 POP 123R4-R6, PC}
.L5: 0x34193FDA: 4630 MOV R0, R6 0x34193FDC: E8BD 4070 POP.W 123R4-R6, LR} 0x34193FE0: F7FF BFA8 B.W _WriteBlocking ; 0x34193F34

Section .text.libc.SEGGER_RTT_Write from SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=40, align=2


SEGGER_RTT_Write: 0x34193FE4: B570 PUSH 123R4-R6, LR} 0x34193FE6: F240 03AC MOVW R3, #172 ; 0x340000AC = _SEGGER_RTT 0x34193FEA: 4614 MOV R4, R2 0x34193FEC: F2C3 4300 MOVT R3, #0x3400 ; 0x340000AC = _SEGGER_RTT 0x34193FF0: 460D MOV R5, R1 0x34193FF2: 781B LDRB R3, [R3] 0x34193FF4: 4606 MOV R6, R0 0x34193FF6: 2B00 CMP R3, #0 0x34193FF8: BF08 IT EQ 0x34193FFA: F7FF FE1F BLEQ _DoInit ; 0x34193C3C 0x34193FFE: 4630 MOV R0, R6 0x34194000: 4629 MOV R1, R5 0x34194002: 4622 MOV R2, R4 0x34194004: E8BD 4070 POP.W 123R4-R6, LR} 0x34194008: F7FF BFC0 B.W SEGGER_RTT_WriteNoLock ; 0x34193F8C

Section .text.libc.strnlen from strops.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=92, align=2


strnlen: 0x3419400C: 2900 CMP R1, #0 0x3419400E: BF1C ITT NE 0x34194010: 7802 LDRBNE R2, [R0] 0x34194012: 2A00 CMPNE R2, #0 0x34194014: D101 BNE 46L1 ; 0x3419401A 0x34194016: 2000 MOVS R0, #0 0x34194018: 4770 BX LR
.L1: 0x3419401A: B500 PUSH 123LR} 0x3419401C: F8D0 E000 LDR.W LR, [R0] 0x34194020: 4602 MOV R2, R0 0x34194022: 2904 CMP R1, #4 0x34194024: D310 BCC 46L3 ; 0x34194048 0x34194026: F240 1C00 MOVW R12, #0x0100 0x3419402A: F2C0 1C01 MOVT R12, #0x0101
.L2: 0x3419402E: EBAC 030E SUB.W R3, R12, LR 0x34194032: EA43 030E ORR.W R3, R3, LR 0x34194036: 43DB MVNS R3, R3 0x34194038: F013 3F80 TST R3, #0x80808080 0x3419403C: D104 BNE 46L3 ; 0x34194048 0x3419403E: F852 EF04 LDR LR, [R2, #4]! 0x34194042: 3904 SUBS R1, #4 0x34194044: 2903 CMP R1, #3 0x34194046: D8F2 BHI 46L2 ; 0x3419402E
.L3: 0x34194048: F1AE 3301 SUB.W R3, LR, #0x01010101 0x3419404C: 1A10 SUBS R0, R2, R0 0x3419404E: EA23 030E BIC.W R3, R3, LR 0x34194052: F023 337F BIC R3, R3, #0x7F7F7F7F 0x34194056: BA1B REV R3, R3 0x34194058: FAB3 F383 CLZ R3, R3 0x3419405C: EBB1 0FD3 CMP.W R1, R3, LSR #3 0x34194060: BF88 IT HI 0x34194062: 08D9 LSRHI R1, R3, #3 0x34194064: 4408 ADD R0, R1 0x34194066: BD00 POP 123PC}

Section .text.libc.__SEGGER_RTL_ascii_mbtowc from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=48, align=2


__SEGGER_RTL_ascii_mbtowc: 0x34194068: 4684 MOV R12, R0 0x3419406A: 2000 MOVS R0, #0 0x3419406C: 2900 CMP R1, #0 0x3419406E: BF18 IT NE 0x34194070: 2A00 CMPNE R2, #0 0x34194072: D00D BEQ 46L1 ; 0x34194090 0x34194074: 7808 LDRB R0, [R1] 0x34194076: 0601 LSLS R1, R0, #24 0x34194078: D40B BMI 46L2 ; 0x34194092 0x3419407A: F1BC 0F00 CMP.W R12, #0 0x3419407E: BF18 IT NE 0x34194080: F8CC 0000 STRNE.W R0, [R12] 0x34194084: 2100 MOVS R1, #0 0x34194086: 0600 LSLS R0, R0, #24 0x34194088: E9C3 1100 STRD R1, R1, [R3] 0x3419408C: EA5F 900F CSET R0, NE
.L1: 0x34194090: 4770 BX LR
.L2: 0x34194092: F06F 0001 MVN R0, #1 0x34194096: 4770 BX LR

Section .text.libc.__SEGGER_RTL_ascii_isctype from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=32, align=2


__SEGGER_RTL_ascii_isctype: 0x34194098: 287F CMP R0, #127 0x3419409A: D80B BHI 46L1 ; 0x341940B4 0x3419409C: F244 52A8 MOVW R2, #0x45A8 ; 0x341945A8 = __SEGGER_RTL_ascii_ctype_map 0x341940A0: F244 432A MOVW R3, #0x442A ; 0x3419442A = __SEGGER_RTL_ascii_ctype_mask 0x341940A4: F2C3 4219 MOVT R2, #0x3419 ; 0x341945A8 = __SEGGER_RTL_ascii_ctype_map 0x341940A8: F2C3 4319 MOVT R3, #0x3419 ; 0x3419442A = __SEGGER_RTL_ascii_ctype_mask 0x341940AC: 5C10 LDRB R0, [R2, R0] 0x341940AE: 5C59 LDRB R1, [R3, R1] 0x341940B0: 4008 ANDS R0, R1 0x341940B2: 4770 BX LR
.L1: 0x341940B4: 2000 MOVS R0, #0 0x341940B6: 4770 BX LR

Section .text.libc.__SEGGER_RTL_ascii_toupper from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=12, align=2


__SEGGER_RTL_ascii_toupper: 0x341940B8: F1A0 0161 SUB.W R1, R0, #97 0x341940BC: 291A CMP R1, #26 0x341940BE: BF38 IT CC 0x341940C0: 3820 SUBCC R0, #32 0x341940C2: 4770 BX LR

Section .text.libc.__SEGGER_RTL_ascii_tolower from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=12, align=2


__SEGGER_RTL_ascii_tolower: 0x341940C4: F1A0 0141 SUB.W R1, R0, #65 0x341940C8: 291A CMP R1, #26 0x341940CA: BF38 IT CC 0x341940CC: 3020 ADDCC R0, #32 0x341940CE: 4770 BX LR

Section .text.libc.__SEGGER_RTL_ascii_iswctype from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=32, align=2


__SEGGER_RTL_ascii_iswctype: 0x341940D0: 287F CMP R0, #127 0x341940D2: D80B BHI 46L1 ; 0x341940EC 0x341940D4: F244 52A8 MOVW R2, #0x45A8 ; 0x341945A8 = __SEGGER_RTL_ascii_ctype_map 0x341940D8: F244 432A MOVW R3, #0x442A ; 0x3419442A = __SEGGER_RTL_ascii_ctype_mask 0x341940DC: F2C3 4219 MOVT R2, #0x3419 ; 0x341945A8 = __SEGGER_RTL_ascii_ctype_map 0x341940E0: F2C3 4319 MOVT R3, #0x3419 ; 0x3419442A = __SEGGER_RTL_ascii_ctype_mask 0x341940E4: 5C10 LDRB R0, [R2, R0] 0x341940E6: 5C59 LDRB R1, [R3, R1] 0x341940E8: 4008 ANDS R0, R1 0x341940EA: 4770 BX LR
.L1: 0x341940EC: 2000 MOVS R0, #0 0x341940EE: 4770 BX LR

Section .text.libc.__SEGGER_RTL_ascii_towupper from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=12, align=2


__SEGGER_RTL_ascii_towupper: 0x341940F0: F1A0 0161 SUB.W R1, R0, #97 0x341940F4: 291A CMP R1, #26 0x341940F6: BF38 IT CC 0x341940F8: 3820 SUBCC R0, #32 0x341940FA: 4770 BX LR

Section .text.libc.__SEGGER_RTL_ascii_towlower from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=12, align=2


__SEGGER_RTL_ascii_towlower: 0x341940FC: F1A0 0141 SUB.W R1, R0, #65 0x34194100: 291A CMP R1, #26 0x34194102: BF38 IT CC 0x34194104: 3020 ADDCC R0, #32 0x34194106: 4770 BX LR

Section .rodata.libc..L.str from __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=7, align=1

  0x34194108:  28           DC.B       0x28                     ; '('
  0x34194109:  6E           DC.B       0x6E                     ; 'n'
  0x3419410A:  75           DC.B       0x75                     ; 'u'
  0x3419410B:  6C           DC.B       0x6C                     ; 'l'
  0x3419410C:  6C           DC.B       0x6C                     ; 'l'
  0x3419410D:  29           DC.B       0x29                     ; ')'
  0x3419410E:  00           DC.B       0x00                     ; '\0'

Section .rodata.libc.__SEGGER_RTL_c_locale_month_names from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=87, align=1


__SEGGER_RTL_c_locale_month_names: 0x3419410F: 4A DC.B 0x4A ; 'J' 0x34194110: 61 DC.B 0x61 ; 'a' 0x34194111: 6E DC.B 0x6E ; 'n' 0x34194112: 75 DC.B 0x75 ; 'u' 0x34194113: 61 DC.B 0x61 ; 'a' 0x34194114: 72 DC.B 0x72 ; 'r' 0x34194115: 79 DC.B 0x79 ; 'y' 0x34194116: 00 DC.B 0x00 ; '\0' 0x34194117: 46 DC.B 0x46 ; 'F' 0x34194118: 65 DC.B 0x65 ; 'e' 0x34194119: 62 DC.B 0x62 ; 'b' 0x3419411A: 72 DC.B 0x72 ; 'r' 0x3419411B: 75 DC.B 0x75 ; 'u' 0x3419411C: 61 DC.B 0x61 ; 'a' 0x3419411D: 72 DC.B 0x72 ; 'r' 0x3419411E: 79 DC.B 0x79 ; 'y' 0x3419411F: 00 DC.B 0x00 ; '\0' 0x34194120: 4D DC.B 0x4D ; 'M' 0x34194121: 61 DC.B 0x61 ; 'a' 0x34194122: 72 DC.B 0x72 ; 'r' 0x34194123: 63 DC.B 0x63 ; 'c' 0x34194124: 68 DC.B 0x68 ; 'h' 0x34194125: 00 DC.B 0x00 ; '\0' 0x34194126: 41 DC.B 0x41 ; 'A' 0x34194127: 70 DC.B 0x70 ; 'p' 0x34194128: 72 DC.B 0x72 ; 'r' 0x34194129: 69 DC.B 0x69 ; 'i' 0x3419412A: 6C DC.B 0x6C ; 'l' 0x3419412B: 00 DC.B 0x00 ; '\0' 0x3419412C: 4D DC.B 0x4D ; 'M' 0x3419412D: 61 DC.B 0x61 ; 'a' 0x3419412E: 79 DC.B 0x79 ; 'y' 0x3419412F: 00 DC.B 0x00 ; '\0' 0x34194130: 4A DC.B 0x4A ; 'J' 0x34194131: 75 DC.B 0x75 ; 'u' 0x34194132: 6E DC.B 0x6E ; 'n' 0x34194133: 65 DC.B 0x65 ; 'e' 0x34194134: 00 DC.B 0x00 ; '\0' 0x34194135: 4A DC.B 0x4A ; 'J' 0x34194136: 75 DC.B 0x75 ; 'u' 0x34194137: 6C DC.B 0x6C ; 'l' 0x34194138: 79 DC.B 0x79 ; 'y' 0x34194139: 00 DC.B 0x00 ; '\0' 0x3419413A: 41 DC.B 0x41 ; 'A' 0x3419413B: 75 DC.B 0x75 ; 'u' 0x3419413C: 67 DC.B 0x67 ; 'g' 0x3419413D: 75 DC.B 0x75 ; 'u' 0x3419413E: 73 DC.B 0x73 ; 's' 0x3419413F: 74 DC.B 0x74 ; 't' 0x34194140: 00 DC.B 0x00 ; '\0' 0x34194141: 53 DC.B 0x53 ; 'S' 0x34194142: 65 DC.B 0x65 ; 'e' 0x34194143: 70 DC.B 0x70 ; 'p' 0x34194144: 74 DC.B 0x74 ; 't' 0x34194145: 65 DC.B 0x65 ; 'e' 0x34194146: 6D DC.B 0x6D ; 'm' 0x34194147: 62 DC.B 0x62 ; 'b' 0x34194148: 65 DC.B 0x65 ; 'e' 0x34194149: 72 DC.B 0x72 ; 'r' 0x3419414A: 00 DC.B 0x00 ; '\0' 0x3419414B: 4F DC.B 0x4F ; 'O' 0x3419414C: 63 DC.B 0x63 ; 'c' 0x3419414D: 74 DC.B 0x74 ; 't' 0x3419414E: 6F DC.B 0x6F ; 'o' 0x3419414F: 62 DC.B 0x62 ; 'b' 0x34194150: 65 DC.B 0x65 ; 'e' 0x34194151: 72 DC.B 0x72 ; 'r' 0x34194152: 00 DC.B 0x00 ; '\0' 0x34194153: 4E DC.B 0x4E ; 'N' 0x34194154: 6F DC.B 0x6F ; 'o' 0x34194155: 76 DC.B 0x76 ; 'v' 0x34194156: 65 DC.B 0x65 ; 'e' 0x34194157: 6D DC.B 0x6D ; 'm' 0x34194158: 62 DC.B 0x62 ; 'b' 0x34194159: 65 DC.B 0x65 ; 'e' 0x3419415A: 72 DC.B 0x72 ; 'r' 0x3419415B: 00 DC.B 0x00 ; '\0' 0x3419415C: 44 DC.B 0x44 ; 'D' 0x3419415D: 65 DC.B 0x65 ; 'e' 0x3419415E: 63 DC.B 0x63 ; 'c' 0x3419415F: 65 DC.B 0x65 ; 'e' 0x34194160: 6D DC.B 0x6D ; 'm' 0x34194161: 62 DC.B 0x62 ; 'b' 0x34194162: 65 DC.B 0x65 ; 'e' 0x34194163: 72 DC.B 0x72 ; 'r' 0x34194164: 00 DC.B 0x00 ; '\0' 0x34194165: 00 DC.B 0x00 ; '\0'

Section .rodata.libc.__SEGGER_RTL_c_locale_am_pm_indicator from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=7, align=1


__SEGGER_RTL_c_locale_am_pm_indicator: 0x34194166: 41 DC.B 0x41 ; 'A' 0x34194167: 4D DC.B 0x4D ; 'M' 0x34194168: 00 DC.B 0x00 ; '\0' 0x34194169: 50 DC.B 0x50 ; 'P' 0x3419416A: 4D DC.B 0x4D ; 'M' 0x3419416B: 00 DC.B 0x00 ; '\0' 0x3419416C: 00 DC.B 0x00 ; '\0'

Section .rodata.libc.__SEGGER_RTL_c_locale_date_time_format from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=15, align=1


__SEGGER_RTL_c_locale_date_time_format: 0x3419416D: 25 DC.B 0x25 ; '%' 0x3419416E: 61 DC.B 0x61 ; 'a' 0x3419416F: 20 DC.B 0x20 ; ' ' 0x34194170: 25 DC.B 0x25 ; '%' 0x34194171: 62 DC.B 0x62 ; 'b' 0x34194172: 20 DC.B 0x20 ; ' ' 0x34194173: 25 DC.B 0x25 ; '%' 0x34194174: 65 DC.B 0x65 ; 'e' 0x34194175: 20 DC.B 0x20 ; ' ' 0x34194176: 25 DC.B 0x25 ; '%' 0x34194177: 54 DC.B 0x54 ; 'T' 0x34194178: 20 DC.B 0x20 ; ' ' 0x34194179: 25 DC.B 0x25 ; '%' 0x3419417A: 59 DC.B 0x59 ; 'Y' 0x3419417B: 00 DC.B 0x00 ; '\0'

Section .rodata..L.str.20 from blto2_FSBL_lto.o, size=106, align=1

  0x3419417C:  44           DC.B       0x44                     ; 'D'
  0x3419417D:  3A           DC.B       0x3A                     ; ':'
  0x3419417E:  5C           DC.B       0x5C                     ; '\\'
  0x3419417F:  50           DC.B       0x50                     ; 'P'
  0x34194180:  72           DC.B       0x72                     ; 'r'
  0x34194181:  6F           DC.B       0x6F                     ; 'o'
  0x34194182:  6A           DC.B       0x6A                     ; 'j'
  0x34194183:  65           DC.B       0x65                     ; 'e'
  0x34194184:  6B           DC.B       0x6B                     ; 'k'
  0x34194185:  74           DC.B       0x74                     ; 't'
  0x34194186:  65           DC.B       0x65                     ; 'e'
  0x34194187:  5C           DC.B       0x5C                     ; '\\'
  0x34194188:  68           DC.B       0x68                     ; 'h'
  0x34194189:  61           DC.B       0x61                     ; 'a'
  0x3419418A:  64           DC.B       0x64                     ; 'd'
  0x3419418B:  65           DC.B       0x65                     ; 'e'
  0x3419418C:  77           DC.B       0x77                     ; 'w'
  0x3419418D:  65           DC.B       0x65                     ; 'e'
  0x3419418E:  5F           DC.B       0x5F                     ; '_'
  0x3419418F:  62           DC.B       0x62                     ; 'b'
  0x34194190:  6C           DC.B       0x6C                     ; 'l'
  0x34194191:  74           DC.B       0x74                     ; 't'
  0x34194192:  6F           DC.B       0x6F                     ; 'o'
  0x34194193:  32           DC.B       0x32                     ; '2'
  0x34194194:  5C           DC.B       0x5C                     ; '\\'
  0x34194195:  74           DC.B       0x74                     ; 't'
  0x34194196:  72           DC.B       0x72                     ; 'r'
  0x34194197:  75           DC.B       0x75                     ; 'u'
  0x34194198:  6E           DC.B       0x6E                     ; 'n'
  0x34194199:  6B           DC.B       0x6B                     ; 'k'
  0x3419419A:  5C           DC.B       0x5C                     ; '\\'
  0x3419419B:  66           DC.B       0x66                     ; 'f'
  0x3419419C:  69           DC.B       0x69                     ; 'i'
  0x3419419D:  72           DC.B       0x72                     ; 'r'
  0x3419419E:  6D           DC.B       0x6D                     ; 'm'
  0x3419419F:  77           DC.B       0x77                     ; 'w'
  0x341941A0:  61           DC.B       0x61                     ; 'a'
  0x341941A1:  72           DC.B       0x72                     ; 'r'
  0x341941A2:  65           DC.B       0x65                     ; 'e'
  0x341941A3:  5C           DC.B       0x5C                     ; '\\'
  0x341941A4:  46           DC.B       0x46                     ; 'F'
  0x341941A5:  53           DC.B       0x53                     ; 'S'
  0x341941A6:  42           DC.B       0x42                     ; 'B'
  0x341941A7:  4C           DC.B       0x4C                     ; 'L'
  0x341941A8:  5C           DC.B       0x5C                     ; '\\'
  0x341941A9:  43           DC.B       0x43                     ; 'C'
  0x341941AA:  75           DC.B       0x75                     ; 'u'
  0x341941AB:  62           DC.B       0x62                     ; 'b'
  0x341941AC:  65           DC.B       0x65                     ; 'e'
  0x341941AD:  4D           DC.B       0x4D                     ; 'M'
  0x341941AE:  58           DC.B       0x58                     ; 'X'
  0x341941AF:  5C           DC.B       0x5C                     ; '\\'
  0x341941B0:  44           DC.B       0x44                     ; 'D'
  0x341941B1:  72           DC.B       0x72                     ; 'r'
  0x341941B2:  69           DC.B       0x69                     ; 'i'
  0x341941B3:  76           DC.B       0x76                     ; 'v'
  0x341941B4:  65           DC.B       0x65                     ; 'e'
  0x341941B5:  72           DC.B       0x72                     ; 'r'
  0x341941B6:  73           DC.B       0x73                     ; 's'
  0x341941B7:  5C           DC.B       0x5C                     ; '\\'
  0x341941B8:  53           DC.B       0x53                     ; 'S'
  0x341941B9:  54           DC.B       0x54                     ; 'T'
  0x341941BA:  4D           DC.B       0x4D                     ; 'M'
  0x341941BB:  33           DC.B       0x33                     ; '3'
  0x341941BC:  32           DC.B       0x32                     ; '2'
  0x341941BD:  4E           DC.B       0x4E                     ; 'N'
  0x341941BE:  36           DC.B       0x36                     ; '6'
  0x341941BF:  78           DC.B       0x78                     ; 'x'
  0x341941C0:  78           DC.B       0x78                     ; 'x'
  0x341941C1:  5F           DC.B       0x5F                     ; '_'
  0x341941C2:  48           DC.B       0x48                     ; 'H'
  0x341941C3:  41           DC.B       0x41                     ; 'A'
  0x341941C4:  4C           DC.B       0x4C                     ; 'L'
  0x341941C5:  5F           DC.B       0x5F                     ; '_'
  0x341941C6:  44           DC.B       0x44                     ; 'D'
  0x341941C7:  72           DC.B       0x72                     ; 'r'
  0x341941C8:  69           DC.B       0x69                     ; 'i'
  0x341941C9:  76           DC.B       0x76                     ; 'v'
  0x341941CA:  65           DC.B       0x65                     ; 'e'
  0x341941CB:  72           DC.B       0x72                     ; 'r'
  0x341941CC:  5C           DC.B       0x5C                     ; '\\'
  0x341941CD:  53           DC.B       0x53                     ; 'S'
  0x341941CE:  72           DC.B       0x72                     ; 'r'
  0x341941CF:  63           DC.B       0x63                     ; 'c'
  0x341941D0:  5C           DC.B       0x5C                     ; '\\'
  0x341941D1:  73           DC.B       0x73                     ; 's'
  0x341941D2:  74           DC.B       0x74                     ; 't'
  0x341941D3:  6D           DC.B       0x6D                     ; 'm'
  0x341941D4:  33           DC.B       0x33                     ; '3'
  0x341941D5:  32           DC.B       0x32                     ; '2'
  0x341941D6:  6E           DC.B       0x6E                     ; 'n'
  0x341941D7:  36           DC.B       0x36                     ; '6'
  0x341941D8:  78           DC.B       0x78                     ; 'x'
  0x341941D9:  78           DC.B       0x78                     ; 'x'
  0x341941DA:  5F           DC.B       0x5F                     ; '_'
  0x341941DB:  68           DC.B       0x68                     ; 'h'
  0x341941DC:  61           DC.B       0x61                     ; 'a'
  0x341941DD:  6C           DC.B       0x6C                     ; 'l'
  0x341941DE:  5F           DC.B       0x5F                     ; '_'
  0x341941DF:  62           DC.B       0x62                     ; 'b'
  0x341941E0:  73           DC.B       0x73                     ; 's'
  0x341941E1:  65           DC.B       0x65                     ; 'e'
  0x341941E2:  63           DC.B       0x63                     ; 'c'
  0x341941E3:  2E           DC.B       0x2E                     ; '.'
  0x341941E4:  63           DC.B       0x63                     ; 'c'
  0x341941E5:  00           DC.B       0x00                     ; '\0'

Section .rodata..L.str.33 from blto2_FSBL_lto.o, size=106, align=1

  0x341941E6:  44           DC.B       0x44                     ; 'D'
  0x341941E7:  3A           DC.B       0x3A                     ; ':'
  0x341941E8:  5C           DC.B       0x5C                     ; '\\'
  0x341941E9:  50           DC.B       0x50                     ; 'P'
  0x341941EA:  72           DC.B       0x72                     ; 'r'
  0x341941EB:  6F           DC.B       0x6F                     ; 'o'
  0x341941EC:  6A           DC.B       0x6A                     ; 'j'
  0x341941ED:  65           DC.B       0x65                     ; 'e'
  0x341941EE:  6B           DC.B       0x6B                     ; 'k'
  0x341941EF:  74           DC.B       0x74                     ; 't'
  0x341941F0:  65           DC.B       0x65                     ; 'e'
  0x341941F1:  5C           DC.B       0x5C                     ; '\\'
  0x341941F2:  68           DC.B       0x68                     ; 'h'
  0x341941F3:  61           DC.B       0x61                     ; 'a'
  0x341941F4:  64           DC.B       0x64                     ; 'd'
  0x341941F5:  65           DC.B       0x65                     ; 'e'
  0x341941F6:  77           DC.B       0x77                     ; 'w'
  0x341941F7:  65           DC.B       0x65                     ; 'e'
  0x341941F8:  5F           DC.B       0x5F                     ; '_'
  0x341941F9:  62           DC.B       0x62                     ; 'b'
  0x341941FA:  6C           DC.B       0x6C                     ; 'l'
  0x341941FB:  74           DC.B       0x74                     ; 't'
  0x341941FC:  6F           DC.B       0x6F                     ; 'o'
  0x341941FD:  32           DC.B       0x32                     ; '2'
  0x341941FE:  5C           DC.B       0x5C                     ; '\\'
  0x341941FF:  74           DC.B       0x74                     ; 't'
  0x34194200:  72           DC.B       0x72                     ; 'r'
  0x34194201:  75           DC.B       0x75                     ; 'u'
  0x34194202:  6E           DC.B       0x6E                     ; 'n'
  0x34194203:  6B           DC.B       0x6B                     ; 'k'
  0x34194204:  5C           DC.B       0x5C                     ; '\\'
  0x34194205:  66           DC.B       0x66                     ; 'f'
  0x34194206:  69           DC.B       0x69                     ; 'i'
  0x34194207:  72           DC.B       0x72                     ; 'r'
  0x34194208:  6D           DC.B       0x6D                     ; 'm'
  0x34194209:  77           DC.B       0x77                     ; 'w'
  0x3419420A:  61           DC.B       0x61                     ; 'a'
  0x3419420B:  72           DC.B       0x72                     ; 'r'
  0x3419420C:  65           DC.B       0x65                     ; 'e'
  0x3419420D:  5C           DC.B       0x5C                     ; '\\'
  0x3419420E:  46           DC.B       0x46                     ; 'F'
  0x3419420F:  53           DC.B       0x53                     ; 'S'
  0x34194210:  42           DC.B       0x42                     ; 'B'
  0x34194211:  4C           DC.B       0x4C                     ; 'L'
  0x34194212:  5C           DC.B       0x5C                     ; '\\'
  0x34194213:  43           DC.B       0x43                     ; 'C'
  0x34194214:  75           DC.B       0x75                     ; 'u'
  0x34194215:  62           DC.B       0x62                     ; 'b'
  0x34194216:  65           DC.B       0x65                     ; 'e'
  0x34194217:  4D           DC.B       0x4D                     ; 'M'
  0x34194218:  58           DC.B       0x58                     ; 'X'
  0x34194219:  5C           DC.B       0x5C                     ; '\\'
  0x3419421A:  44           DC.B       0x44                     ; 'D'
  0x3419421B:  72           DC.B       0x72                     ; 'r'
  0x3419421C:  69           DC.B       0x69                     ; 'i'
  0x3419421D:  76           DC.B       0x76                     ; 'v'
  0x3419421E:  65           DC.B       0x65                     ; 'e'
  0x3419421F:  72           DC.B       0x72                     ; 'r'
  0x34194220:  73           DC.B       0x73                     ; 's'
  0x34194221:  5C           DC.B       0x5C                     ; '\\'
  0x34194222:  53           DC.B       0x53                     ; 'S'
  0x34194223:  54           DC.B       0x54                     ; 'T'
  0x34194224:  4D           DC.B       0x4D                     ; 'M'
  0x34194225:  33           DC.B       0x33                     ; '3'
  0x34194226:  32           DC.B       0x32                     ; '2'
  0x34194227:  4E           DC.B       0x4E                     ; 'N'
  0x34194228:  36           DC.B       0x36                     ; '6'
  0x34194229:  78           DC.B       0x78                     ; 'x'
  0x3419422A:  78           DC.B       0x78                     ; 'x'
  0x3419422B:  5F           DC.B       0x5F                     ; '_'
  0x3419422C:  48           DC.B       0x48                     ; 'H'
  0x3419422D:  41           DC.B       0x41                     ; 'A'
  0x3419422E:  4C           DC.B       0x4C                     ; 'L'
  0x3419422F:  5F           DC.B       0x5F                     ; '_'
  0x34194230:  44           DC.B       0x44                     ; 'D'
  0x34194231:  72           DC.B       0x72                     ; 'r'
  0x34194232:  69           DC.B       0x69                     ; 'i'
  0x34194233:  76           DC.B       0x76                     ; 'v'
  0x34194234:  65           DC.B       0x65                     ; 'e'
  0x34194235:  72           DC.B       0x72                     ; 'r'
  0x34194236:  5C           DC.B       0x5C                     ; '\\'
  0x34194237:  53           DC.B       0x53                     ; 'S'
  0x34194238:  72           DC.B       0x72                     ; 'r'
  0x34194239:  63           DC.B       0x63                     ; 'c'
  0x3419423A:  5C           DC.B       0x5C                     ; '\\'
  0x3419423B:  73           DC.B       0x73                     ; 's'
  0x3419423C:  74           DC.B       0x74                     ; 't'
  0x3419423D:  6D           DC.B       0x6D                     ; 'm'
  0x3419423E:  33           DC.B       0x33                     ; '3'
  0x3419423F:  32           DC.B       0x32                     ; '2'
  0x34194240:  6E           DC.B       0x6E                     ; 'n'
  0x34194241:  36           DC.B       0x36                     ; '6'
  0x34194242:  78           DC.B       0x78                     ; 'x'
  0x34194243:  78           DC.B       0x78                     ; 'x'
  0x34194244:  5F           DC.B       0x5F                     ; '_'
  0x34194245:  68           DC.B       0x68                     ; 'h'
  0x34194246:  61           DC.B       0x61                     ; 'a'
  0x34194247:  6C           DC.B       0x6C                     ; 'l'
  0x34194248:  5F           DC.B       0x5F                     ; '_'
  0x34194249:  67           DC.B       0x67                     ; 'g'
  0x3419424A:  70           DC.B       0x70                     ; 'p'
  0x3419424B:  69           DC.B       0x69                     ; 'i'
  0x3419424C:  6F           DC.B       0x6F                     ; 'o'
  0x3419424D:  2E           DC.B       0x2E                     ; '.'
  0x3419424E:  63           DC.B       0x63                     ; 'c'
  0x3419424F:  00           DC.B       0x00                     ; '\0'

Section .rodata..L.str.98 from blto2_FSBL_lto.o, size=106, align=1

  0x34194250:  44           DC.B       0x44                     ; 'D'
  0x34194251:  3A           DC.B       0x3A                     ; ':'
  0x34194252:  5C           DC.B       0x5C                     ; '\\'
  0x34194253:  50           DC.B       0x50                     ; 'P'
  0x34194254:  72           DC.B       0x72                     ; 'r'
  0x34194255:  6F           DC.B       0x6F                     ; 'o'
  0x34194256:  6A           DC.B       0x6A                     ; 'j'
  0x34194257:  65           DC.B       0x65                     ; 'e'
  0x34194258:  6B           DC.B       0x6B                     ; 'k'
  0x34194259:  74           DC.B       0x74                     ; 't'
  0x3419425A:  65           DC.B       0x65                     ; 'e'
  0x3419425B:  5C           DC.B       0x5C                     ; '\\'
  0x3419425C:  68           DC.B       0x68                     ; 'h'
  0x3419425D:  61           DC.B       0x61                     ; 'a'
  0x3419425E:  64           DC.B       0x64                     ; 'd'
  0x3419425F:  65           DC.B       0x65                     ; 'e'
  0x34194260:  77           DC.B       0x77                     ; 'w'
  0x34194261:  65           DC.B       0x65                     ; 'e'
  0x34194262:  5F           DC.B       0x5F                     ; '_'
  0x34194263:  62           DC.B       0x62                     ; 'b'
  0x34194264:  6C           DC.B       0x6C                     ; 'l'
  0x34194265:  74           DC.B       0x74                     ; 't'
  0x34194266:  6F           DC.B       0x6F                     ; 'o'
  0x34194267:  32           DC.B       0x32                     ; '2'
  0x34194268:  5C           DC.B       0x5C                     ; '\\'
  0x34194269:  74           DC.B       0x74                     ; 't'
  0x3419426A:  72           DC.B       0x72                     ; 'r'
  0x3419426B:  75           DC.B       0x75                     ; 'u'
  0x3419426C:  6E           DC.B       0x6E                     ; 'n'
  0x3419426D:  6B           DC.B       0x6B                     ; 'k'
  0x3419426E:  5C           DC.B       0x5C                     ; '\\'
  0x3419426F:  66           DC.B       0x66                     ; 'f'
  0x34194270:  69           DC.B       0x69                     ; 'i'
  0x34194271:  72           DC.B       0x72                     ; 'r'
  0x34194272:  6D           DC.B       0x6D                     ; 'm'
  0x34194273:  77           DC.B       0x77                     ; 'w'
  0x34194274:  61           DC.B       0x61                     ; 'a'
  0x34194275:  72           DC.B       0x72                     ; 'r'
  0x34194276:  65           DC.B       0x65                     ; 'e'
  0x34194277:  5C           DC.B       0x5C                     ; '\\'
  0x34194278:  46           DC.B       0x46                     ; 'F'
  0x34194279:  53           DC.B       0x53                     ; 'S'
  0x3419427A:  42           DC.B       0x42                     ; 'B'
  0x3419427B:  4C           DC.B       0x4C                     ; 'L'
  0x3419427C:  5C           DC.B       0x5C                     ; '\\'
  0x3419427D:  43           DC.B       0x43                     ; 'C'
  0x3419427E:  75           DC.B       0x75                     ; 'u'
  0x3419427F:  62           DC.B       0x62                     ; 'b'
  0x34194280:  65           DC.B       0x65                     ; 'e'
  0x34194281:  4D           DC.B       0x4D                     ; 'M'
  0x34194282:  58           DC.B       0x58                     ; 'X'
  0x34194283:  5C           DC.B       0x5C                     ; '\\'
  0x34194284:  44           DC.B       0x44                     ; 'D'
  0x34194285:  72           DC.B       0x72                     ; 'r'
  0x34194286:  69           DC.B       0x69                     ; 'i'
  0x34194287:  76           DC.B       0x76                     ; 'v'
  0x34194288:  65           DC.B       0x65                     ; 'e'
  0x34194289:  72           DC.B       0x72                     ; 'r'
  0x3419428A:  73           DC.B       0x73                     ; 's'
  0x3419428B:  5C           DC.B       0x5C                     ; '\\'
  0x3419428C:  53           DC.B       0x53                     ; 'S'
  0x3419428D:  54           DC.B       0x54                     ; 'T'
  0x3419428E:  4D           DC.B       0x4D                     ; 'M'
  0x3419428F:  33           DC.B       0x33                     ; '3'
  0x34194290:  32           DC.B       0x32                     ; '2'
  0x34194291:  4E           DC.B       0x4E                     ; 'N'
  0x34194292:  36           DC.B       0x36                     ; '6'
  0x34194293:  78           DC.B       0x78                     ; 'x'
  0x34194294:  78           DC.B       0x78                     ; 'x'
  0x34194295:  5F           DC.B       0x5F                     ; '_'
  0x34194296:  48           DC.B       0x48                     ; 'H'
  0x34194297:  41           DC.B       0x41                     ; 'A'
  0x34194298:  4C           DC.B       0x4C                     ; 'L'
  0x34194299:  5F           DC.B       0x5F                     ; '_'
  0x3419429A:  44           DC.B       0x44                     ; 'D'
  0x3419429B:  72           DC.B       0x72                     ; 'r'
  0x3419429C:  69           DC.B       0x69                     ; 'i'
  0x3419429D:  76           DC.B       0x76                     ; 'v'
  0x3419429E:  65           DC.B       0x65                     ; 'e'
  0x3419429F:  72           DC.B       0x72                     ; 'r'
  0x341942A0:  5C           DC.B       0x5C                     ; '\\'
  0x341942A1:  53           DC.B       0x53                     ; 'S'
  0x341942A2:  72           DC.B       0x72                     ; 'r'
  0x341942A3:  63           DC.B       0x63                     ; 'c'
  0x341942A4:  5C           DC.B       0x5C                     ; '\\'
  0x341942A5:  73           DC.B       0x73                     ; 's'
  0x341942A6:  74           DC.B       0x74                     ; 't'
  0x341942A7:  6D           DC.B       0x6D                     ; 'm'
  0x341942A8:  33           DC.B       0x33                     ; '3'
  0x341942A9:  32           DC.B       0x32                     ; '2'
  0x341942AA:  6E           DC.B       0x6E                     ; 'n'
  0x341942AB:  36           DC.B       0x36                     ; '6'
  0x341942AC:  78           DC.B       0x78                     ; 'x'
  0x341942AD:  78           DC.B       0x78                     ; 'x'
  0x341942AE:  5F           DC.B       0x5F                     ; '_'
  0x341942AF:  68           DC.B       0x68                     ; 'h'
  0x341942B0:  61           DC.B       0x61                     ; 'a'
  0x341942B1:  6C           DC.B       0x6C                     ; 'l'
  0x341942B2:  5F           DC.B       0x5F                     ; '_'
  0x341942B3:  78           DC.B       0x78                     ; 'x'
  0x341942B4:  73           DC.B       0x73                     ; 's'
  0x341942B5:  70           DC.B       0x70                     ; 'p'
  0x341942B6:  69           DC.B       0x69                     ; 'i'
  0x341942B7:  2E           DC.B       0x2E                     ; '.'
  0x341942B8:  63           DC.B       0x63                     ; 'c'
  0x341942B9:  00           DC.B       0x00                     ; '\0'

Section .rodata.libc.__SEGGER_RTL_c_locale_day_names from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=58, align=1


__SEGGER_RTL_c_locale_day_names: 0x341942BA: 53 DC.B 0x53 ; 'S' 0x341942BB: 75 DC.B 0x75 ; 'u' 0x341942BC: 6E DC.B 0x6E ; 'n' 0x341942BD: 64 DC.B 0x64 ; 'd' 0x341942BE: 61 DC.B 0x61 ; 'a' 0x341942BF: 79 DC.B 0x79 ; 'y' 0x341942C0: 00 DC.B 0x00 ; '\0' 0x341942C1: 4D DC.B 0x4D ; 'M' 0x341942C2: 6F DC.B 0x6F ; 'o' 0x341942C3: 6E DC.B 0x6E ; 'n' 0x341942C4: 64 DC.B 0x64 ; 'd' 0x341942C5: 61 DC.B 0x61 ; 'a' 0x341942C6: 79 DC.B 0x79 ; 'y' 0x341942C7: 00 DC.B 0x00 ; '\0' 0x341942C8: 54 DC.B 0x54 ; 'T' 0x341942C9: 75 DC.B 0x75 ; 'u' 0x341942CA: 65 DC.B 0x65 ; 'e' 0x341942CB: 73 DC.B 0x73 ; 's' 0x341942CC: 64 DC.B 0x64 ; 'd' 0x341942CD: 61 DC.B 0x61 ; 'a' 0x341942CE: 79 DC.B 0x79 ; 'y' 0x341942CF: 00 DC.B 0x00 ; '\0' 0x341942D0: 57 DC.B 0x57 ; 'W' 0x341942D1: 65 DC.B 0x65 ; 'e' 0x341942D2: 64 DC.B 0x64 ; 'd' 0x341942D3: 6E DC.B 0x6E ; 'n' 0x341942D4: 65 DC.B 0x65 ; 'e' 0x341942D5: 73 DC.B 0x73 ; 's' 0x341942D6: 64 DC.B 0x64 ; 'd' 0x341942D7: 61 DC.B 0x61 ; 'a' 0x341942D8: 79 DC.B 0x79 ; 'y' 0x341942D9: 00 DC.B 0x00 ; '\0' 0x341942DA: 54 DC.B 0x54 ; 'T' 0x341942DB: 68 DC.B 0x68 ; 'h' 0x341942DC: 75 DC.B 0x75 ; 'u' 0x341942DD: 72 DC.B 0x72 ; 'r' 0x341942DE: 73 DC.B 0x73 ; 's' 0x341942DF: 64 DC.B 0x64 ; 'd' 0x341942E0: 61 DC.B 0x61 ; 'a' 0x341942E1: 79 DC.B 0x79 ; 'y' 0x341942E2: 00 DC.B 0x00 ; '\0' 0x341942E3: 46 DC.B 0x46 ; 'F' 0x341942E4: 72 DC.B 0x72 ; 'r' 0x341942E5: 69 DC.B 0x69 ; 'i' 0x341942E6: 64 DC.B 0x64 ; 'd' 0x341942E7: 61 DC.B 0x61 ; 'a' 0x341942E8: 79 DC.B 0x79 ; 'y' 0x341942E9: 00 DC.B 0x00 ; '\0' 0x341942EA: 53 DC.B 0x53 ; 'S' 0x341942EB: 61 DC.B 0x61 ; 'a' 0x341942EC: 74 DC.B 0x74 ; 't' 0x341942ED: 75 DC.B 0x75 ; 'u' 0x341942EE: 72 DC.B 0x72 ; 'r' 0x341942EF: 64 DC.B 0x64 ; 'd' 0x341942F0: 61 DC.B 0x61 ; 'a' 0x341942F1: 79 DC.B 0x79 ; 'y' 0x341942F2: 00 DC.B 0x00 ; '\0' 0x341942F3: 00 DC.B 0x00 ; '\0'

Section .rodata.libc..L.str from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=2, align=1

  0x341942F4:  43           DC.B       0x43                     ; 'C'
  0x341942F5:  00           DC.B       0x00                     ; '\0'

Section .rodata.libc.__SEGGER_RTL_data_utf8_period from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=2, align=1


__SEGGER_RTL_data_utf8_period: 0x341942F6: 2E DC.B 0x2E ; '.' 0x341942F7: 00 DC.B 0x00 ; '\0'

Section .rodata.FW_VERSION from blto2_FSBL_lto.o, size=33, align=1


FW_VERSION: 0x341942F8: 45 DC.B 0x45 ; 'E' 0x341942F9: 43 DC.B 0x43 ; 'C' 0x341942FA: 53 DC.B 0x53 ; 'S' 0x341942FB: 20 DC.B 0x20 ; ' ' 0x341942FC: 42 DC.B 0x42 ; 'B' 0x341942FD: 4C DC.B 0x4C ; 'L' 0x341942FE: 54 DC.B 0x54 ; 'T' 0x341942FF: 4F DC.B 0x4F ; 'O' 0x34194300: 32 DC.B 0x32 ; '2' 0x34194301: 20 DC.B 0x20 ; ' ' 0x34194302: 46 DC.B 0x46 ; 'F' 0x34194303: 53 DC.B 0x53 ; 'S' 0x34194304: 42 DC.B 0x42 ; 'B' 0x34194305: 4C DC.B 0x4C ; 'L' 0x34194306: 20 DC.B 0x20 ; ' ' 0x34194307: 44 DC.B 0x44 ; 'D' 0x34194308: 65 DC.B 0x65 ; 'e' 0x34194309: 62 DC.B 0x62 ; 'b' 0x3419430A: 75 DC.B 0x75 ; 'u' 0x3419430B: 67 DC.B 0x67 ; 'g' 0x3419430C: 20 DC.B 0x20 ; ' ' 0x3419430D: 46 DC.B 0x46 ; 'F' 0x3419430E: 57 DC.B 0x57 ; 'W' 0x3419430F: 3A DC.B 0x3A ; ':' 0x34194310: 30 DC.B 0x30 ; '0' 0x34194311: 31 DC.B 0x31 ; '1' 0x34194312: 2E DC.B 0x2E ; '.' 0x34194313: 30 DC.B 0x30 ; '0' 0x34194314: 30 DC.B 0x30 ; '0' 0x34194315: 2E DC.B 0x2E ; '.' 0x34194316: 30 DC.B 0x30 ; '0' 0x34194317: 30 DC.B 0x30 ; '0' 0x34194318: 00 DC.B 0x00 ; '\0'

Section .rodata..L.str from blto2_FSBL_lto.o, size=25, align=1

  0x34194319:  5B           DC.B       0x5B                     ; '['
  0x3419431A:  25           DC.B       0x25                     ; '%'
  0x3419431B:  33           DC.B       0x33                     ; '3'
  0x3419431C:  64           DC.B       0x64                     ; 'd'
  0x3419431D:  5D           DC.B       0x5D                     ; ']'
  0x3419431E:  20           DC.B       0x20                     ; ' '
  0x3419431F:  52           DC.B       0x52                     ; 'R'
  0x34194320:  75           DC.B       0x75                     ; 'u'
  0x34194321:  6E           DC.B       0x6E                     ; 'n'
  0x34194322:  6E           DC.B       0x6E                     ; 'n'
  0x34194323:  69           DC.B       0x69                     ; 'i'
  0x34194324:  6E           DC.B       0x6E                     ; 'n'
  0x34194325:  67           DC.B       0x67                     ; 'g'
  0x34194326:  20           DC.B       0x20                     ; ' '
  0x34194327:  61           DC.B       0x61                     ; 'a'
  0x34194328:  74           DC.B       0x74                     ; 't'
  0x34194329:  20           DC.B       0x20                     ; ' '
  0x3419432A:  25           DC.B       0x25                     ; '%'
  0x3419432B:  75           DC.B       0x75                     ; 'u'
  0x3419432C:  20           DC.B       0x20                     ; ' '
  0x3419432D:  4D           DC.B       0x4D                     ; 'M'
  0x3419432E:  48           DC.B       0x48                     ; 'H'
  0x3419432F:  7A           DC.B       0x7A                     ; 'z'
  0x34194330:  0A           DC.B       0x0A                     ; '\n'
  0x34194331:  00           DC.B       0x00                     ; '\0'

Section .rodata..L.str.50 from blto2_FSBL_lto.o, size=105, align=1

  0x34194332:  44           DC.B       0x44                     ; 'D'
  0x34194333:  3A           DC.B       0x3A                     ; ':'
  0x34194334:  5C           DC.B       0x5C                     ; '\\'
  0x34194335:  50           DC.B       0x50                     ; 'P'
  0x34194336:  72           DC.B       0x72                     ; 'r'
  0x34194337:  6F           DC.B       0x6F                     ; 'o'
  0x34194338:  6A           DC.B       0x6A                     ; 'j'
  0x34194339:  65           DC.B       0x65                     ; 'e'
  0x3419433A:  6B           DC.B       0x6B                     ; 'k'
  0x3419433B:  74           DC.B       0x74                     ; 't'
  0x3419433C:  65           DC.B       0x65                     ; 'e'
  0x3419433D:  5C           DC.B       0x5C                     ; '\\'
  0x3419433E:  68           DC.B       0x68                     ; 'h'
  0x3419433F:  61           DC.B       0x61                     ; 'a'
  0x34194340:  64           DC.B       0x64                     ; 'd'
  0x34194341:  65           DC.B       0x65                     ; 'e'
  0x34194342:  77           DC.B       0x77                     ; 'w'
  0x34194343:  65           DC.B       0x65                     ; 'e'
  0x34194344:  5F           DC.B       0x5F                     ; '_'
  0x34194345:  62           DC.B       0x62                     ; 'b'
  0x34194346:  6C           DC.B       0x6C                     ; 'l'
  0x34194347:  74           DC.B       0x74                     ; 't'
  0x34194348:  6F           DC.B       0x6F                     ; 'o'
  0x34194349:  32           DC.B       0x32                     ; '2'
  0x3419434A:  5C           DC.B       0x5C                     ; '\\'
  0x3419434B:  74           DC.B       0x74                     ; 't'
  0x3419434C:  72           DC.B       0x72                     ; 'r'
  0x3419434D:  75           DC.B       0x75                     ; 'u'
  0x3419434E:  6E           DC.B       0x6E                     ; 'n'
  0x3419434F:  6B           DC.B       0x6B                     ; 'k'
  0x34194350:  5C           DC.B       0x5C                     ; '\\'
  0x34194351:  66           DC.B       0x66                     ; 'f'
  0x34194352:  69           DC.B       0x69                     ; 'i'
  0x34194353:  72           DC.B       0x72                     ; 'r'
  0x34194354:  6D           DC.B       0x6D                     ; 'm'
  0x34194355:  77           DC.B       0x77                     ; 'w'
  0x34194356:  61           DC.B       0x61                     ; 'a'
  0x34194357:  72           DC.B       0x72                     ; 'r'
  0x34194358:  65           DC.B       0x65                     ; 'e'
  0x34194359:  5C           DC.B       0x5C                     ; '\\'
  0x3419435A:  46           DC.B       0x46                     ; 'F'
  0x3419435B:  53           DC.B       0x53                     ; 'S'
  0x3419435C:  42           DC.B       0x42                     ; 'B'
  0x3419435D:  4C           DC.B       0x4C                     ; 'L'
  0x3419435E:  5C           DC.B       0x5C                     ; '\\'
  0x3419435F:  43           DC.B       0x43                     ; 'C'
  0x34194360:  75           DC.B       0x75                     ; 'u'
  0x34194361:  62           DC.B       0x62                     ; 'b'
  0x34194362:  65           DC.B       0x65                     ; 'e'
  0x34194363:  4D           DC.B       0x4D                     ; 'M'
  0x34194364:  58           DC.B       0x58                     ; 'X'
  0x34194365:  5C           DC.B       0x5C                     ; '\\'
  0x34194366:  44           DC.B       0x44                     ; 'D'
  0x34194367:  72           DC.B       0x72                     ; 'r'
  0x34194368:  69           DC.B       0x69                     ; 'i'
  0x34194369:  76           DC.B       0x76                     ; 'v'
  0x3419436A:  65           DC.B       0x65                     ; 'e'
  0x3419436B:  72           DC.B       0x72                     ; 'r'
  0x3419436C:  73           DC.B       0x73                     ; 's'
  0x3419436D:  5C           DC.B       0x5C                     ; '\\'
  0x3419436E:  53           DC.B       0x53                     ; 'S'
  0x3419436F:  54           DC.B       0x54                     ; 'T'
  0x34194370:  4D           DC.B       0x4D                     ; 'M'
  0x34194371:  33           DC.B       0x33                     ; '3'
  0x34194372:  32           DC.B       0x32                     ; '2'
  0x34194373:  4E           DC.B       0x4E                     ; 'N'
  0x34194374:  36           DC.B       0x36                     ; '6'
  0x34194375:  78           DC.B       0x78                     ; 'x'
  0x34194376:  78           DC.B       0x78                     ; 'x'
  0x34194377:  5F           DC.B       0x5F                     ; '_'
  0x34194378:  48           DC.B       0x48                     ; 'H'
  0x34194379:  41           DC.B       0x41                     ; 'A'
  0x3419437A:  4C           DC.B       0x4C                     ; 'L'
  0x3419437B:  5F           DC.B       0x5F                     ; '_'
  0x3419437C:  44           DC.B       0x44                     ; 'D'
  0x3419437D:  72           DC.B       0x72                     ; 'r'
  0x3419437E:  69           DC.B       0x69                     ; 'i'
  0x3419437F:  76           DC.B       0x76                     ; 'v'
  0x34194380:  65           DC.B       0x65                     ; 'e'
  0x34194381:  72           DC.B       0x72                     ; 'r'
  0x34194382:  5C           DC.B       0x5C                     ; '\\'
  0x34194383:  53           DC.B       0x53                     ; 'S'
  0x34194384:  72           DC.B       0x72                     ; 'r'
  0x34194385:  63           DC.B       0x63                     ; 'c'
  0x34194386:  5C           DC.B       0x5C                     ; '\\'
  0x34194387:  73           DC.B       0x73                     ; 's'
  0x34194388:  74           DC.B       0x74                     ; 't'
  0x34194389:  6D           DC.B       0x6D                     ; 'm'
  0x3419438A:  33           DC.B       0x33                     ; '3'
  0x3419438B:  32           DC.B       0x32                     ; '2'
  0x3419438C:  6E           DC.B       0x6E                     ; 'n'
  0x3419438D:  36           DC.B       0x36                     ; '6'
  0x3419438E:  78           DC.B       0x78                     ; 'x'
  0x3419438F:  78           DC.B       0x78                     ; 'x'
  0x34194390:  5F           DC.B       0x5F                     ; '_'
  0x34194391:  68           DC.B       0x68                     ; 'h'
  0x34194392:  61           DC.B       0x61                     ; 'a'
  0x34194393:  6C           DC.B       0x6C                     ; 'l'
  0x34194394:  5F           DC.B       0x5F                     ; '_'
  0x34194395:  72           DC.B       0x72                     ; 'r'
  0x34194396:  63           DC.B       0x63                     ; 'c'
  0x34194397:  63           DC.B       0x63                     ; 'c'
  0x34194398:  2E           DC.B       0x2E                     ; '.'
  0x34194399:  63           DC.B       0x63                     ; 'c'
  0x3419439A:  00           DC.B       0x00                     ; '\0'

Section .rodata.libc..L.str.1 from __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=5, align=1

  0x3419439B:  2D           DC.B       0x2D                     ; '-'
  0x3419439C:  49           DC.B       0x49                     ; 'I'
  0x3419439D:  4E           DC.B       0x4E                     ; 'N'
  0x3419439E:  46           DC.B       0x46                     ; 'F'
  0x3419439F:  00           DC.B       0x00                     ; '\0'

Section .rodata.libc..L.str.2 from __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=5, align=1

  0x341943A0:  2D           DC.B       0x2D                     ; '-'
  0x341943A1:  69           DC.B       0x69                     ; 'i'
  0x341943A2:  6E           DC.B       0x6E                     ; 'n'
  0x341943A3:  66           DC.B       0x66                     ; 'f'
  0x341943A4:  00           DC.B       0x00                     ; '\0'

Section .rodata.libc..L.str.3 from __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=5, align=1

  0x341943A5:  2B           DC.B       0x2B                     ; '+'
  0x341943A6:  49           DC.B       0x49                     ; 'I'
  0x341943A7:  4E           DC.B       0x4E                     ; 'N'
  0x341943A8:  46           DC.B       0x46                     ; 'F'
  0x341943A9:  00           DC.B       0x00                     ; '\0'

Section .rodata.libc..L.str.4 from __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=5, align=1

  0x341943AA:  2B           DC.B       0x2B                     ; '+'
  0x341943AB:  69           DC.B       0x69                     ; 'i'
  0x341943AC:  6E           DC.B       0x6E                     ; 'n'
  0x341943AD:  66           DC.B       0x66                     ; 'f'
  0x341943AE:  00           DC.B       0x00                     ; '\0'

Section .rodata.libc._DoInit._aInitStr from SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=17, align=1


_DoInit._aInitStr: 0x341943AF: 00 DC.B 0x00 ; '\0' 0x341943B0: 00 DC.B 0x00 ; '\0' 0x341943B1: 00 DC.B 0x00 ; '\0' 0x341943B2: 00 DC.B 0x00 ; '\0' 0x341943B3: 00 DC.B 0x00 ; '\0' 0x341943B4: 00 DC.B 0x00 ; '\0' 0x341943B5: 54 DC.B 0x54 ; 'T' 0x341943B6: 54 DC.B 0x54 ; 'T' 0x341943B7: 52 DC.B 0x52 ; 'R' 0x341943B8: 20 DC.B 0x20 ; ' ' 0x341943B9: 52 DC.B 0x52 ; 'R' 0x341943BA: 45 DC.B 0x45 ; 'E' 0x341943BB: 47 DC.B 0x47 ; 'G' 0x341943BC: 47 DC.B 0x47 ; 'G' 0x341943BD: 45 DC.B 0x45 ; 'E' 0x341943BE: 53 DC.B 0x53 ; 'S' 0x341943BF: 00 DC.B 0x00 ; '\0'

Section .rodata.libc..L.str from SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=9, align=1

  0x341943C0:  54           DC.B       0x54                     ; 'T'
  0x341943C1:  65           DC.B       0x65                     ; 'e'
  0x341943C2:  72           DC.B       0x72                     ; 'r'
  0x341943C3:  6D           DC.B       0x6D                     ; 'm'
  0x341943C4:  69           DC.B       0x69                     ; 'i'
  0x341943C5:  6E           DC.B       0x6E                     ; 'n'
  0x341943C6:  61           DC.B       0x61                     ; 'a'
  0x341943C7:  6C           DC.B       0x6C                     ; 'l'
  0x341943C8:  00           DC.B       0x00                     ; '\0'

Section .rodata.libc.__SEGGER_RTL_c_locale_date_format from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=9, align=1


__SEGGER_RTL_c_locale_date_format: 0x341943C9: 25 DC.B 0x25 ; '%' 0x341943CA: 6D DC.B 0x6D ; 'm' 0x341943CB: 2F DC.B 0x2F ; '/' 0x341943CC: 25 DC.B 0x25 ; '%' 0x341943CD: 64 DC.B 0x64 ; 'd' 0x341943CE: 2F DC.B 0x2F ; '/' 0x341943CF: 25 DC.B 0x25 ; '%' 0x341943D0: 79 DC.B 0x79 ; 'y' 0x341943D1: 00 DC.B 0x00 ; '\0'

Section .rodata.libc.__SEGGER_RTL_c_locale_time_format from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=9, align=1


__SEGGER_RTL_c_locale_time_format: 0x341943D2: 25 DC.B 0x25 ; '%' 0x341943D3: 48 DC.B 0x48 ; 'H' 0x341943D4: 3A DC.B 0x3A ; ':' 0x341943D5: 25 DC.B 0x25 ; '%' 0x341943D6: 4D DC.B 0x4D ; 'M' 0x341943D7: 3A DC.B 0x3A ; ':' 0x341943D8: 25 DC.B 0x25 ; '%' 0x341943D9: 53 DC.B 0x53 ; 'S' 0x341943DA: 00 DC.B 0x00 ; '\0'

Section .rodata.libc.__SEGGER_RTL_c_locale_abbrev_day_names from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=29, align=1


__SEGGER_RTL_c_locale_abbrev_day_names: 0x341943DB: 53 DC.B 0x53 ; 'S' 0x341943DC: 75 DC.B 0x75 ; 'u' 0x341943DD: 6E DC.B 0x6E ; 'n' 0x341943DE: 00 DC.B 0x00 ; '\0' 0x341943DF: 4D DC.B 0x4D ; 'M' 0x341943E0: 6F DC.B 0x6F ; 'o' 0x341943E1: 6E DC.B 0x6E ; 'n' 0x341943E2: 00 DC.B 0x00 ; '\0' 0x341943E3: 54 DC.B 0x54 ; 'T' 0x341943E4: 75 DC.B 0x75 ; 'u' 0x341943E5: 65 DC.B 0x65 ; 'e' 0x341943E6: 00 DC.B 0x00 ; '\0' 0x341943E7: 57 DC.B 0x57 ; 'W' 0x341943E8: 65 DC.B 0x65 ; 'e' 0x341943E9: 64 DC.B 0x64 ; 'd' 0x341943EA: 00 DC.B 0x00 ; '\0' 0x341943EB: 54 DC.B 0x54 ; 'T' 0x341943EC: 68 DC.B 0x68 ; 'h' 0x341943ED: 75 DC.B 0x75 ; 'u' 0x341943EE: 00 DC.B 0x00 ; '\0' 0x341943EF: 46 DC.B 0x46 ; 'F' 0x341943F0: 72 DC.B 0x72 ; 'r' 0x341943F1: 69 DC.B 0x69 ; 'i' 0x341943F2: 00 DC.B 0x00 ; '\0' 0x341943F3: 53 DC.B 0x53 ; 'S' 0x341943F4: 61 DC.B 0x61 ; 'a' 0x341943F5: 74 DC.B 0x74 ; 't' 0x341943F6: 00 DC.B 0x00 ; '\0' 0x341943F7: 00 DC.B 0x00 ; '\0'

Section .rodata.libc.__SEGGER_RTL_c_locale_abbrev_month_names from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=49, align=1


__SEGGER_RTL_c_locale_abbrev_month_names: 0x341943F8: 4A DC.B 0x4A ; 'J' 0x341943F9: 61 DC.B 0x61 ; 'a' 0x341943FA: 6E DC.B 0x6E ; 'n' 0x341943FB: 00 DC.B 0x00 ; '\0' 0x341943FC: 46 DC.B 0x46 ; 'F' 0x341943FD: 65 DC.B 0x65 ; 'e' 0x341943FE: 62 DC.B 0x62 ; 'b' 0x341943FF: 00 DC.B 0x00 ; '\0' 0x34194400: 4D DC.B 0x4D ; 'M' 0x34194401: 61 DC.B 0x61 ; 'a' 0x34194402: 72 DC.B 0x72 ; 'r' 0x34194403: 00 DC.B 0x00 ; '\0' 0x34194404: 41 DC.B 0x41 ; 'A' 0x34194405: 70 DC.B 0x70 ; 'p' 0x34194406: 72 DC.B 0x72 ; 'r' 0x34194407: 00 DC.B 0x00 ; '\0' 0x34194408: 4D DC.B 0x4D ; 'M' 0x34194409: 61 DC.B 0x61 ; 'a' 0x3419440A: 79 DC.B 0x79 ; 'y' 0x3419440B: 00 DC.B 0x00 ; '\0' 0x3419440C: 4A DC.B 0x4A ; 'J' 0x3419440D: 75 DC.B 0x75 ; 'u' 0x3419440E: 6E DC.B 0x6E ; 'n' 0x3419440F: 00 DC.B 0x00 ; '\0' 0x34194410: 4A DC.B 0x4A ; 'J' 0x34194411: 75 DC.B 0x75 ; 'u' 0x34194412: 6C DC.B 0x6C ; 'l' 0x34194413: 00 DC.B 0x00 ; '\0' 0x34194414: 41 DC.B 0x41 ; 'A' 0x34194415: 75 DC.B 0x75 ; 'u' 0x34194416: 67 DC.B 0x67 ; 'g' 0x34194417: 00 DC.B 0x00 ; '\0' 0x34194418: 53 DC.B 0x53 ; 'S' 0x34194419: 65 DC.B 0x65 ; 'e' 0x3419441A: 70 DC.B 0x70 ; 'p' 0x3419441B: 00 DC.B 0x00 ; '\0' 0x3419441C: 4F DC.B 0x4F ; 'O' 0x3419441D: 63 DC.B 0x63 ; 'c' 0x3419441E: 74 DC.B 0x74 ; 't' 0x3419441F: 00 DC.B 0x00 ; '\0' 0x34194420: 4E DC.B 0x4E ; 'N' 0x34194421: 6F DC.B 0x6F ; 'o' 0x34194422: 76 DC.B 0x76 ; 'v' 0x34194423: 00 DC.B 0x00 ; '\0' 0x34194424: 44 DC.B 0x44 ; 'D' 0x34194425: 65 DC.B 0x65 ; 'e' 0x34194426: 63 DC.B 0x63 ; 'c' 0x34194427: 00 DC.B 0x00 ; '\0' 0x34194428: 00 DC.B 0x00 ; '\0'

Section .rodata.libc.__SEGGER_RTL_data_empty_string from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=1, align=1


__SEGGER_RTL_data_empty_string: 0x34194429: 00 DC.B 0x00 ; '\0'

Section .rodata.libc.__SEGGER_RTL_ascii_ctype_mask from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=13, align=1


__SEGGER_RTL_ascii_ctype_mask: 0x3419442A: 00 DC.B 0x00 ; '\0' 0x3419442B: 07 DC.B 0x07 ; '\x07' 0x3419442C: 03 DC.B 0x03 ; '\x03' 0x3419442D: 20 DC.B 0x20 ; ' ' 0x3419442E: 04 DC.B 0x04 ; '\x04' 0x3419442F: 17 DC.B 0x17 ; '\x17' 0x34194430: 02 DC.B 0x02 ; '\x02' 0x34194431: 01 DC.B 0x01 ; '\x01' 0x34194432: 08 DC.B 0x08 ; '\b' 0x34194433: 57 DC.B 0x57 ; 'W' 0x34194434: 10 DC.B 0x10 ; '\x10' 0x34194435: 40 DC.B 0x40 ; '@' 0x34194436: 80 DC.B 0x80 ; '\x80'

Section .init_array from STM32N6xx_Startup.o, size=4, align=4

  0x34194438:  341813DD     DC.W       SystemCoreClockUpdate

Section .rodata..L.str.23 from blto2_FSBL_lto.o, size=108, align=1

  0x3419443C:  44           DC.B       0x44                     ; 'D'
  0x3419443D:  3A           DC.B       0x3A                     ; ':'
  0x3419443E:  5C           DC.B       0x5C                     ; '\\'
  0x3419443F:  50           DC.B       0x50                     ; 'P'
  0x34194440:  72           DC.B       0x72                     ; 'r'
  0x34194441:  6F           DC.B       0x6F                     ; 'o'
  0x34194442:  6A           DC.B       0x6A                     ; 'j'
  0x34194443:  65           DC.B       0x65                     ; 'e'
  0x34194444:  6B           DC.B       0x6B                     ; 'k'
  0x34194445:  74           DC.B       0x74                     ; 't'
  0x34194446:  65           DC.B       0x65                     ; 'e'
  0x34194447:  5C           DC.B       0x5C                     ; '\\'
  0x34194448:  68           DC.B       0x68                     ; 'h'
  0x34194449:  61           DC.B       0x61                     ; 'a'
  0x3419444A:  64           DC.B       0x64                     ; 'd'
  0x3419444B:  65           DC.B       0x65                     ; 'e'
  0x3419444C:  77           DC.B       0x77                     ; 'w'
  0x3419444D:  65           DC.B       0x65                     ; 'e'
  0x3419444E:  5F           DC.B       0x5F                     ; '_'
  0x3419444F:  62           DC.B       0x62                     ; 'b'
  0x34194450:  6C           DC.B       0x6C                     ; 'l'
  0x34194451:  74           DC.B       0x74                     ; 't'
  0x34194452:  6F           DC.B       0x6F                     ; 'o'
  0x34194453:  32           DC.B       0x32                     ; '2'
  0x34194454:  5C           DC.B       0x5C                     ; '\\'
  0x34194455:  74           DC.B       0x74                     ; 't'
  0x34194456:  72           DC.B       0x72                     ; 'r'
  0x34194457:  75           DC.B       0x75                     ; 'u'
  0x34194458:  6E           DC.B       0x6E                     ; 'n'
  0x34194459:  6B           DC.B       0x6B                     ; 'k'
  0x3419445A:  5C           DC.B       0x5C                     ; '\\'
  0x3419445B:  66           DC.B       0x66                     ; 'f'
  0x3419445C:  69           DC.B       0x69                     ; 'i'
  0x3419445D:  72           DC.B       0x72                     ; 'r'
  0x3419445E:  6D           DC.B       0x6D                     ; 'm'
  0x3419445F:  77           DC.B       0x77                     ; 'w'
  0x34194460:  61           DC.B       0x61                     ; 'a'
  0x34194461:  72           DC.B       0x72                     ; 'r'
  0x34194462:  65           DC.B       0x65                     ; 'e'
  0x34194463:  5C           DC.B       0x5C                     ; '\\'
  0x34194464:  46           DC.B       0x46                     ; 'F'
  0x34194465:  53           DC.B       0x53                     ; 'S'
  0x34194466:  42           DC.B       0x42                     ; 'B'
  0x34194467:  4C           DC.B       0x4C                     ; 'L'
  0x34194468:  5C           DC.B       0x5C                     ; '\\'
  0x34194469:  43           DC.B       0x43                     ; 'C'
  0x3419446A:  75           DC.B       0x75                     ; 'u'
  0x3419446B:  62           DC.B       0x62                     ; 'b'
  0x3419446C:  65           DC.B       0x65                     ; 'e'
  0x3419446D:  4D           DC.B       0x4D                     ; 'M'
  0x3419446E:  58           DC.B       0x58                     ; 'X'
  0x3419446F:  5C           DC.B       0x5C                     ; '\\'
  0x34194470:  44           DC.B       0x44                     ; 'D'
  0x34194471:  72           DC.B       0x72                     ; 'r'
  0x34194472:  69           DC.B       0x69                     ; 'i'
  0x34194473:  76           DC.B       0x76                     ; 'v'
  0x34194474:  65           DC.B       0x65                     ; 'e'
  0x34194475:  72           DC.B       0x72                     ; 'r'
  0x34194476:  73           DC.B       0x73                     ; 's'
  0x34194477:  5C           DC.B       0x5C                     ; '\\'
  0x34194478:  53           DC.B       0x53                     ; 'S'
  0x34194479:  54           DC.B       0x54                     ; 'T'
  0x3419447A:  4D           DC.B       0x4D                     ; 'M'
  0x3419447B:  33           DC.B       0x33                     ; '3'
  0x3419447C:  32           DC.B       0x32                     ; '2'
  0x3419447D:  4E           DC.B       0x4E                     ; 'N'
  0x3419447E:  36           DC.B       0x36                     ; '6'
  0x3419447F:  78           DC.B       0x78                     ; 'x'
  0x34194480:  78           DC.B       0x78                     ; 'x'
  0x34194481:  5F           DC.B       0x5F                     ; '_'
  0x34194482:  48           DC.B       0x48                     ; 'H'
  0x34194483:  41           DC.B       0x41                     ; 'A'
  0x34194484:  4C           DC.B       0x4C                     ; 'L'
  0x34194485:  5F           DC.B       0x5F                     ; '_'
  0x34194486:  44           DC.B       0x44                     ; 'D'
  0x34194487:  72           DC.B       0x72                     ; 'r'
  0x34194488:  69           DC.B       0x69                     ; 'i'
  0x34194489:  76           DC.B       0x76                     ; 'v'
  0x3419448A:  65           DC.B       0x65                     ; 'e'
  0x3419448B:  72           DC.B       0x72                     ; 'r'
  0x3419448C:  5C           DC.B       0x5C                     ; '\\'
  0x3419448D:  53           DC.B       0x53                     ; 'S'
  0x3419448E:  72           DC.B       0x72                     ; 'r'
  0x3419448F:  63           DC.B       0x63                     ; 'c'
  0x34194490:  5C           DC.B       0x5C                     ; '\\'
  0x34194491:  73           DC.B       0x73                     ; 's'
  0x34194492:  74           DC.B       0x74                     ; 't'
  0x34194493:  6D           DC.B       0x6D                     ; 'm'
  0x34194494:  33           DC.B       0x33                     ; '3'
  0x34194495:  32           DC.B       0x32                     ; '2'
  0x34194496:  6E           DC.B       0x6E                     ; 'n'
  0x34194497:  36           DC.B       0x36                     ; '6'
  0x34194498:  78           DC.B       0x78                     ; 'x'
  0x34194499:  78           DC.B       0x78                     ; 'x'
  0x3419449A:  5F           DC.B       0x5F                     ; '_'
  0x3419449B:  68           DC.B       0x68                     ; 'h'
  0x3419449C:  61           DC.B       0x61                     ; 'a'
  0x3419449D:  6C           DC.B       0x6C                     ; 'l'
  0x3419449E:  5F           DC.B       0x5F                     ; '_'
  0x3419449F:  63           DC.B       0x63                     ; 'c'
  0x341944A0:  6F           DC.B       0x6F                     ; 'o'
  0x341944A1:  72           DC.B       0x72                     ; 'r'
  0x341944A2:  74           DC.B       0x74                     ; 't'
  0x341944A3:  65           DC.B       0x65                     ; 'e'
  0x341944A4:  78           DC.B       0x78                     ; 'x'
  0x341944A5:  2E           DC.B       0x2E                     ; '.'
  0x341944A6:  63           DC.B       0x63                     ; 'c'
  0x341944A7:  00           DC.B       0x00                     ; '\0'

Section .rodata..L.str.41 from blto2_FSBL_lto.o, size=108, align=1

  0x341944A8:  44           DC.B       0x44                     ; 'D'
  0x341944A9:  3A           DC.B       0x3A                     ; ':'
  0x341944AA:  5C           DC.B       0x5C                     ; '\\'
  0x341944AB:  50           DC.B       0x50                     ; 'P'
  0x341944AC:  72           DC.B       0x72                     ; 'r'
  0x341944AD:  6F           DC.B       0x6F                     ; 'o'
  0x341944AE:  6A           DC.B       0x6A                     ; 'j'
  0x341944AF:  65           DC.B       0x65                     ; 'e'
  0x341944B0:  6B           DC.B       0x6B                     ; 'k'
  0x341944B1:  74           DC.B       0x74                     ; 't'
  0x341944B2:  65           DC.B       0x65                     ; 'e'
  0x341944B3:  5C           DC.B       0x5C                     ; '\\'
  0x341944B4:  68           DC.B       0x68                     ; 'h'
  0x341944B5:  61           DC.B       0x61                     ; 'a'
  0x341944B6:  64           DC.B       0x64                     ; 'd'
  0x341944B7:  65           DC.B       0x65                     ; 'e'
  0x341944B8:  77           DC.B       0x77                     ; 'w'
  0x341944B9:  65           DC.B       0x65                     ; 'e'
  0x341944BA:  5F           DC.B       0x5F                     ; '_'
  0x341944BB:  62           DC.B       0x62                     ; 'b'
  0x341944BC:  6C           DC.B       0x6C                     ; 'l'
  0x341944BD:  74           DC.B       0x74                     ; 't'
  0x341944BE:  6F           DC.B       0x6F                     ; 'o'
  0x341944BF:  32           DC.B       0x32                     ; '2'
  0x341944C0:  5C           DC.B       0x5C                     ; '\\'
  0x341944C1:  74           DC.B       0x74                     ; 't'
  0x341944C2:  72           DC.B       0x72                     ; 'r'
  0x341944C3:  75           DC.B       0x75                     ; 'u'
  0x341944C4:  6E           DC.B       0x6E                     ; 'n'
  0x341944C5:  6B           DC.B       0x6B                     ; 'k'
  0x341944C6:  5C           DC.B       0x5C                     ; '\\'
  0x341944C7:  66           DC.B       0x66                     ; 'f'
  0x341944C8:  69           DC.B       0x69                     ; 'i'
  0x341944C9:  72           DC.B       0x72                     ; 'r'
  0x341944CA:  6D           DC.B       0x6D                     ; 'm'
  0x341944CB:  77           DC.B       0x77                     ; 'w'
  0x341944CC:  61           DC.B       0x61                     ; 'a'
  0x341944CD:  72           DC.B       0x72                     ; 'r'
  0x341944CE:  65           DC.B       0x65                     ; 'e'
  0x341944CF:  5C           DC.B       0x5C                     ; '\\'
  0x341944D0:  46           DC.B       0x46                     ; 'F'
  0x341944D1:  53           DC.B       0x53                     ; 'S'
  0x341944D2:  42           DC.B       0x42                     ; 'B'
  0x341944D3:  4C           DC.B       0x4C                     ; 'L'
  0x341944D4:  5C           DC.B       0x5C                     ; '\\'
  0x341944D5:  43           DC.B       0x43                     ; 'C'
  0x341944D6:  75           DC.B       0x75                     ; 'u'
  0x341944D7:  62           DC.B       0x62                     ; 'b'
  0x341944D8:  65           DC.B       0x65                     ; 'e'
  0x341944D9:  4D           DC.B       0x4D                     ; 'M'
  0x341944DA:  58           DC.B       0x58                     ; 'X'
  0x341944DB:  5C           DC.B       0x5C                     ; '\\'
  0x341944DC:  44           DC.B       0x44                     ; 'D'
  0x341944DD:  72           DC.B       0x72                     ; 'r'
  0x341944DE:  69           DC.B       0x69                     ; 'i'
  0x341944DF:  76           DC.B       0x76                     ; 'v'
  0x341944E0:  65           DC.B       0x65                     ; 'e'
  0x341944E1:  72           DC.B       0x72                     ; 'r'
  0x341944E2:  73           DC.B       0x73                     ; 's'
  0x341944E3:  5C           DC.B       0x5C                     ; '\\'
  0x341944E4:  53           DC.B       0x53                     ; 'S'
  0x341944E5:  54           DC.B       0x54                     ; 'T'
  0x341944E6:  4D           DC.B       0x4D                     ; 'M'
  0x341944E7:  33           DC.B       0x33                     ; '3'
  0x341944E8:  32           DC.B       0x32                     ; '2'
  0x341944E9:  4E           DC.B       0x4E                     ; 'N'
  0x341944EA:  36           DC.B       0x36                     ; '6'
  0x341944EB:  78           DC.B       0x78                     ; 'x'
  0x341944EC:  78           DC.B       0x78                     ; 'x'
  0x341944ED:  5F           DC.B       0x5F                     ; '_'
  0x341944EE:  48           DC.B       0x48                     ; 'H'
  0x341944EF:  41           DC.B       0x41                     ; 'A'
  0x341944F0:  4C           DC.B       0x4C                     ; 'L'
  0x341944F1:  5F           DC.B       0x5F                     ; '_'
  0x341944F2:  44           DC.B       0x44                     ; 'D'
  0x341944F3:  72           DC.B       0x72                     ; 'r'
  0x341944F4:  69           DC.B       0x69                     ; 'i'
  0x341944F5:  76           DC.B       0x76                     ; 'v'
  0x341944F6:  65           DC.B       0x65                     ; 'e'
  0x341944F7:  72           DC.B       0x72                     ; 'r'
  0x341944F8:  5C           DC.B       0x5C                     ; '\\'
  0x341944F9:  53           DC.B       0x53                     ; 'S'
  0x341944FA:  72           DC.B       0x72                     ; 'r'
  0x341944FB:  63           DC.B       0x63                     ; 'c'
  0x341944FC:  5C           DC.B       0x5C                     ; '\\'
  0x341944FD:  73           DC.B       0x73                     ; 's'
  0x341944FE:  74           DC.B       0x74                     ; 't'
  0x341944FF:  6D           DC.B       0x6D                     ; 'm'
  0x34194500:  33           DC.B       0x33                     ; '3'
  0x34194501:  32           DC.B       0x32                     ; '2'
  0x34194502:  6E           DC.B       0x6E                     ; 'n'
  0x34194503:  36           DC.B       0x36                     ; '6'
  0x34194504:  78           DC.B       0x78                     ; 'x'
  0x34194505:  78           DC.B       0x78                     ; 'x'
  0x34194506:  5F           DC.B       0x5F                     ; '_'
  0x34194507:  68           DC.B       0x68                     ; 'h'
  0x34194508:  61           DC.B       0x61                     ; 'a'
  0x34194509:  6C           DC.B       0x6C                     ; 'l'
  0x3419450A:  5F           DC.B       0x5F                     ; '_'
  0x3419450B:  70           DC.B       0x70                     ; 'p'
  0x3419450C:  77           DC.B       0x77                     ; 'w'
  0x3419450D:  72           DC.B       0x72                     ; 'r'
  0x3419450E:  5F           DC.B       0x5F                     ; '_'
  0x3419450F:  65           DC.B       0x65                     ; 'e'
  0x34194510:  78           DC.B       0x78                     ; 'x'
  0x34194511:  2E           DC.B       0x2E                     ; '.'
  0x34194512:  63           DC.B       0x63                     ; 'c'
  0x34194513:  00           DC.B       0x00                     ; '\0'

Section .rodata..L.str.58 from blto2_FSBL_lto.o, size=108, align=1

  0x34194514:  44           DC.B       0x44                     ; 'D'
  0x34194515:  3A           DC.B       0x3A                     ; ':'
  0x34194516:  5C           DC.B       0x5C                     ; '\\'
  0x34194517:  50           DC.B       0x50                     ; 'P'
  0x34194518:  72           DC.B       0x72                     ; 'r'
  0x34194519:  6F           DC.B       0x6F                     ; 'o'
  0x3419451A:  6A           DC.B       0x6A                     ; 'j'
  0x3419451B:  65           DC.B       0x65                     ; 'e'
  0x3419451C:  6B           DC.B       0x6B                     ; 'k'
  0x3419451D:  74           DC.B       0x74                     ; 't'
  0x3419451E:  65           DC.B       0x65                     ; 'e'
  0x3419451F:  5C           DC.B       0x5C                     ; '\\'
  0x34194520:  68           DC.B       0x68                     ; 'h'
  0x34194521:  61           DC.B       0x61                     ; 'a'
  0x34194522:  64           DC.B       0x64                     ; 'd'
  0x34194523:  65           DC.B       0x65                     ; 'e'
  0x34194524:  77           DC.B       0x77                     ; 'w'
  0x34194525:  65           DC.B       0x65                     ; 'e'
  0x34194526:  5F           DC.B       0x5F                     ; '_'
  0x34194527:  62           DC.B       0x62                     ; 'b'
  0x34194528:  6C           DC.B       0x6C                     ; 'l'
  0x34194529:  74           DC.B       0x74                     ; 't'
  0x3419452A:  6F           DC.B       0x6F                     ; 'o'
  0x3419452B:  32           DC.B       0x32                     ; '2'
  0x3419452C:  5C           DC.B       0x5C                     ; '\\'
  0x3419452D:  74           DC.B       0x74                     ; 't'
  0x3419452E:  72           DC.B       0x72                     ; 'r'
  0x3419452F:  75           DC.B       0x75                     ; 'u'
  0x34194530:  6E           DC.B       0x6E                     ; 'n'
  0x34194531:  6B           DC.B       0x6B                     ; 'k'
  0x34194532:  5C           DC.B       0x5C                     ; '\\'
  0x34194533:  66           DC.B       0x66                     ; 'f'
  0x34194534:  69           DC.B       0x69                     ; 'i'
  0x34194535:  72           DC.B       0x72                     ; 'r'
  0x34194536:  6D           DC.B       0x6D                     ; 'm'
  0x34194537:  77           DC.B       0x77                     ; 'w'
  0x34194538:  61           DC.B       0x61                     ; 'a'
  0x34194539:  72           DC.B       0x72                     ; 'r'
  0x3419453A:  65           DC.B       0x65                     ; 'e'
  0x3419453B:  5C           DC.B       0x5C                     ; '\\'
  0x3419453C:  46           DC.B       0x46                     ; 'F'
  0x3419453D:  53           DC.B       0x53                     ; 'S'
  0x3419453E:  42           DC.B       0x42                     ; 'B'
  0x3419453F:  4C           DC.B       0x4C                     ; 'L'
  0x34194540:  5C           DC.B       0x5C                     ; '\\'
  0x34194541:  43           DC.B       0x43                     ; 'C'
  0x34194542:  75           DC.B       0x75                     ; 'u'
  0x34194543:  62           DC.B       0x62                     ; 'b'
  0x34194544:  65           DC.B       0x65                     ; 'e'
  0x34194545:  4D           DC.B       0x4D                     ; 'M'
  0x34194546:  58           DC.B       0x58                     ; 'X'
  0x34194547:  5C           DC.B       0x5C                     ; '\\'
  0x34194548:  44           DC.B       0x44                     ; 'D'
  0x34194549:  72           DC.B       0x72                     ; 'r'
  0x3419454A:  69           DC.B       0x69                     ; 'i'
  0x3419454B:  76           DC.B       0x76                     ; 'v'
  0x3419454C:  65           DC.B       0x65                     ; 'e'
  0x3419454D:  72           DC.B       0x72                     ; 'r'
  0x3419454E:  73           DC.B       0x73                     ; 's'
  0x3419454F:  5C           DC.B       0x5C                     ; '\\'
  0x34194550:  53           DC.B       0x53                     ; 'S'
  0x34194551:  54           DC.B       0x54                     ; 'T'
  0x34194552:  4D           DC.B       0x4D                     ; 'M'
  0x34194553:  33           DC.B       0x33                     ; '3'
  0x34194554:  32           DC.B       0x32                     ; '2'
  0x34194555:  4E           DC.B       0x4E                     ; 'N'
  0x34194556:  36           DC.B       0x36                     ; '6'
  0x34194557:  78           DC.B       0x78                     ; 'x'
  0x34194558:  78           DC.B       0x78                     ; 'x'
  0x34194559:  5F           DC.B       0x5F                     ; '_'
  0x3419455A:  48           DC.B       0x48                     ; 'H'
  0x3419455B:  41           DC.B       0x41                     ; 'A'
  0x3419455C:  4C           DC.B       0x4C                     ; 'L'
  0x3419455D:  5F           DC.B       0x5F                     ; '_'
  0x3419455E:  44           DC.B       0x44                     ; 'D'
  0x3419455F:  72           DC.B       0x72                     ; 'r'
  0x34194560:  69           DC.B       0x69                     ; 'i'
  0x34194561:  76           DC.B       0x76                     ; 'v'
  0x34194562:  65           DC.B       0x65                     ; 'e'
  0x34194563:  72           DC.B       0x72                     ; 'r'
  0x34194564:  5C           DC.B       0x5C                     ; '\\'
  0x34194565:  53           DC.B       0x53                     ; 'S'
  0x34194566:  72           DC.B       0x72                     ; 'r'
  0x34194567:  63           DC.B       0x63                     ; 'c'
  0x34194568:  5C           DC.B       0x5C                     ; '\\'
  0x34194569:  73           DC.B       0x73                     ; 's'
  0x3419456A:  74           DC.B       0x74                     ; 't'
  0x3419456B:  6D           DC.B       0x6D                     ; 'm'
  0x3419456C:  33           DC.B       0x33                     ; '3'
  0x3419456D:  32           DC.B       0x32                     ; '2'
  0x3419456E:  6E           DC.B       0x6E                     ; 'n'
  0x3419456F:  36           DC.B       0x36                     ; '6'
  0x34194570:  78           DC.B       0x78                     ; 'x'
  0x34194571:  78           DC.B       0x78                     ; 'x'
  0x34194572:  5F           DC.B       0x5F                     ; '_'
  0x34194573:  68           DC.B       0x68                     ; 'h'
  0x34194574:  61           DC.B       0x61                     ; 'a'
  0x34194575:  6C           DC.B       0x6C                     ; 'l'
  0x34194576:  5F           DC.B       0x5F                     ; '_'
  0x34194577:  72           DC.B       0x72                     ; 'r'
  0x34194578:  63           DC.B       0x63                     ; 'c'
  0x34194579:  63           DC.B       0x63                     ; 'c'
  0x3419457A:  5F           DC.B       0x5F                     ; '_'
  0x3419457B:  65           DC.B       0x65                     ; 'e'
  0x3419457C:  78           DC.B       0x78                     ; 'x'
  0x3419457D:  2E           DC.B       0x2E                     ; '.'
  0x3419457E:  63           DC.B       0x63                     ; 'c'
  0x3419457F:  00           DC.B       0x00                     ; '\0'

Section .rodata.libc.__SEGGER_RTL_hex_uc from prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=16, align=1


__SEGGER_RTL_hex_uc: 0x34194580: 30 DC.B 0x30 ; '0' 0x34194581: 31 DC.B 0x31 ; '1' 0x34194582: 32 DC.B 0x32 ; '2' 0x34194583: 33 DC.B 0x33 ; '3' 0x34194584: 34 DC.B 0x34 ; '4' 0x34194585: 35 DC.B 0x35 ; '5' 0x34194586: 36 DC.B 0x36 ; '6' 0x34194587: 37 DC.B 0x37 ; '7' 0x34194588: 38 DC.B 0x38 ; '8' 0x34194589: 39 DC.B 0x39 ; '9' 0x3419458A: 41 DC.B 0x41 ; 'A' 0x3419458B: 42 DC.B 0x42 ; 'B' 0x3419458C: 43 DC.B 0x43 ; 'C' 0x3419458D: 44 DC.B 0x44 ; 'D' 0x3419458E: 45 DC.B 0x45 ; 'E' 0x3419458F: 46 DC.B 0x46 ; 'F'

Section .rodata.libc.__SEGGER_RTL_hex_lc from prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=16, align=1


__SEGGER_RTL_hex_lc: 0x34194590: 30 DC.B 0x30 ; '0' 0x34194591: 31 DC.B 0x31 ; '1' 0x34194592: 32 DC.B 0x32 ; '2' 0x34194593: 33 DC.B 0x33 ; '3' 0x34194594: 34 DC.B 0x34 ; '4' 0x34194595: 35 DC.B 0x35 ; '5' 0x34194596: 36 DC.B 0x36 ; '6' 0x34194597: 37 DC.B 0x37 ; '7' 0x34194598: 38 DC.B 0x38 ; '8' 0x34194599: 39 DC.B 0x39 ; '9' 0x3419459A: 61 DC.B 0x61 ; 'a' 0x3419459B: 62 DC.B 0x62 ; 'b' 0x3419459C: 63 DC.B 0x63 ; 'c' 0x3419459D: 64 DC.B 0x64 ; 'd' 0x3419459E: 65 DC.B 0x65 ; 'e' 0x3419459F: 66 DC.B 0x66 ; 'f'

Section .rodata.libc..L.str.5 from __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=4, align=1

  0x341945A0:  4E           DC.B       0x4E                     ; 'N'
  0x341945A1:  41           DC.B       0x41                     ; 'A'
  0x341945A2:  4E           DC.B       0x4E                     ; 'N'
  0x341945A3:  00           DC.B       0x00                     ; '\0'

Section .rodata.libc..L.str.6 from __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=4, align=1

  0x341945A4:  6E           DC.B       0x6E                     ; 'n'
  0x341945A5:  61           DC.B       0x61                     ; 'a'
  0x341945A6:  6E           DC.B       0x6E                     ; 'n'
  0x341945A7:  00           DC.B       0x00                     ; '\0'

Section .rodata.libc.__SEGGER_RTL_ascii_ctype_map from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=128, align=1


__SEGGER_RTL_ascii_ctype_map: 0x341945A8: 20 DC.B 0x20 ; ' ' 0x341945A9: 20 DC.B 0x20 ; ' ' 0x341945AA: 20 DC.B 0x20 ; ' ' 0x341945AB: 20 DC.B 0x20 ; ' ' 0x341945AC: 20 DC.B 0x20 ; ' ' 0x341945AD: 20 DC.B 0x20 ; ' ' 0x341945AE: 20 DC.B 0x20 ; ' ' 0x341945AF: 20 DC.B 0x20 ; ' ' 0x341945B0: 20 DC.B 0x20 ; ' ' 0x341945B1: 68 DC.B 0x68 ; 'h' 0x341945B2: 28 DC.B 0x28 ; '(' 0x341945B3: 28 DC.B 0x28 ; '(' 0x341945B4: 28 DC.B 0x28 ; '(' 0x341945B5: 28 DC.B 0x28 ; '(' 0x341945B6: 20 DC.B 0x20 ; ' ' 0x341945B7: 20 DC.B 0x20 ; ' ' 0x341945B8: 20 DC.B 0x20 ; ' ' 0x341945B9: 20 DC.B 0x20 ; ' ' 0x341945BA: 20 DC.B 0x20 ; ' ' 0x341945BB: 20 DC.B 0x20 ; ' ' 0x341945BC: 20 DC.B 0x20 ; ' ' 0x341945BD: 20 DC.B 0x20 ; ' ' 0x341945BE: 20 DC.B 0x20 ; ' ' 0x341945BF: 20 DC.B 0x20 ; ' ' 0x341945C0: 20 DC.B 0x20 ; ' ' 0x341945C1: 20 DC.B 0x20 ; ' ' 0x341945C2: 20 DC.B 0x20 ; ' ' 0x341945C3: 20 DC.B 0x20 ; ' ' 0x341945C4: 20 DC.B 0x20 ; ' ' 0x341945C5: 20 DC.B 0x20 ; ' ' 0x341945C6: 20 DC.B 0x20 ; ' ' 0x341945C7: 20 DC.B 0x20 ; ' ' 0x341945C8: 48 DC.B 0x48 ; 'H' 0x341945C9: 10 DC.B 0x10 ; '\x10' 0x341945CA: 10 DC.B 0x10 ; '\x10' 0x341945CB: 10 DC.B 0x10 ; '\x10' 0x341945CC: 10 DC.B 0x10 ; '\x10' 0x341945CD: 10 DC.B 0x10 ; '\x10' 0x341945CE: 10 DC.B 0x10 ; '\x10' 0x341945CF: 10 DC.B 0x10 ; '\x10' 0x341945D0: 10 DC.B 0x10 ; '\x10' 0x341945D1: 10 DC.B 0x10 ; '\x10' 0x341945D2: 10 DC.B 0x10 ; '\x10' 0x341945D3: 10 DC.B 0x10 ; '\x10' 0x341945D4: 10 DC.B 0x10 ; '\x10' 0x341945D5: 10 DC.B 0x10 ; '\x10' 0x341945D6: 10 DC.B 0x10 ; '\x10' 0x341945D7: 10 DC.B 0x10 ; '\x10' 0x341945D8: 84 DC.B 0x84 ; '\x84' 0x341945D9: 84 DC.B 0x84 ; '\x84' 0x341945DA: 84 DC.B 0x84 ; '\x84' 0x341945DB: 84 DC.B 0x84 ; '\x84' 0x341945DC: 84 DC.B 0x84 ; '\x84' 0x341945DD: 84 DC.B 0x84 ; '\x84' 0x341945DE: 84 DC.B 0x84 ; '\x84' 0x341945DF: 84 DC.B 0x84 ; '\x84' 0x341945E0: 84 DC.B 0x84 ; '\x84' 0x341945E1: 84 DC.B 0x84 ; '\x84' 0x341945E2: 10 DC.B 0x10 ; '\x10' 0x341945E3: 10 DC.B 0x10 ; '\x10' 0x341945E4: 10 DC.B 0x10 ; '\x10' 0x341945E5: 10 DC.B 0x10 ; '\x10' 0x341945E6: 10 DC.B 0x10 ; '\x10' 0x341945E7: 10 DC.B 0x10 ; '\x10' 0x341945E8: 10 DC.B 0x10 ; '\x10' 0x341945E9: 81 DC.B 0x81 ; '\x81' 0x341945EA: 81 DC.B 0x81 ; '\x81' 0x341945EB: 81 DC.B 0x81 ; '\x81' 0x341945EC: 81 DC.B 0x81 ; '\x81' 0x341945ED: 81 DC.B 0x81 ; '\x81' 0x341945EE: 81 DC.B 0x81 ; '\x81' 0x341945EF: 01 DC.B 0x01 ; '\x01' 0x341945F0: 01 DC.B 0x01 ; '\x01' 0x341945F1: 01 DC.B 0x01 ; '\x01' 0x341945F2: 01 DC.B 0x01 ; '\x01' 0x341945F3: 01 DC.B 0x01 ; '\x01' 0x341945F4: 01 DC.B 0x01 ; '\x01' 0x341945F5: 01 DC.B 0x01 ; '\x01' 0x341945F6: 01 DC.B 0x01 ; '\x01' 0x341945F7: 01 DC.B 0x01 ; '\x01' 0x341945F8: 01 DC.B 0x01 ; '\x01' 0x341945F9: 01 DC.B 0x01 ; '\x01' 0x341945FA: 01 DC.B 0x01 ; '\x01' 0x341945FB: 01 DC.B 0x01 ; '\x01' 0x341945FC: 01 DC.B 0x01 ; '\x01' 0x341945FD: 01 DC.B 0x01 ; '\x01' 0x341945FE: 01 DC.B 0x01 ; '\x01' 0x341945FF: 01 DC.B 0x01 ; '\x01' 0x34194600: 01 DC.B 0x01 ; '\x01' 0x34194601: 01 DC.B 0x01 ; '\x01' 0x34194602: 01 DC.B 0x01 ; '\x01' 0x34194603: 10 DC.B 0x10 ; '\x10' 0x34194604: 10 DC.B 0x10 ; '\x10' 0x34194605: 10 DC.B 0x10 ; '\x10' 0x34194606: 10 DC.B 0x10 ; '\x10' 0x34194607: 10 DC.B 0x10 ; '\x10' 0x34194608: 10 DC.B 0x10 ; '\x10' 0x34194609: 82 DC.B 0x82 ; '\x82' 0x3419460A: 82 DC.B 0x82 ; '\x82' 0x3419460B: 82 DC.B 0x82 ; '\x82' 0x3419460C: 82 DC.B 0x82 ; '\x82' 0x3419460D: 82 DC.B 0x82 ; '\x82' 0x3419460E: 82 DC.B 0x82 ; '\x82' 0x3419460F: 02 DC.B 0x02 ; '\x02' 0x34194610: 02 DC.B 0x02 ; '\x02' 0x34194611: 02 DC.B 0x02 ; '\x02' 0x34194612: 02 DC.B 0x02 ; '\x02' 0x34194613: 02 DC.B 0x02 ; '\x02' 0x34194614: 02 DC.B 0x02 ; '\x02' 0x34194615: 02 DC.B 0x02 ; '\x02' 0x34194616: 02 DC.B 0x02 ; '\x02' 0x34194617: 02 DC.B 0x02 ; '\x02' 0x34194618: 02 DC.B 0x02 ; '\x02' 0x34194619: 02 DC.B 0x02 ; '\x02' 0x3419461A: 02 DC.B 0x02 ; '\x02' 0x3419461B: 02 DC.B 0x02 ; '\x02' 0x3419461C: 02 DC.B 0x02 ; '\x02' 0x3419461D: 02 DC.B 0x02 ; '\x02' 0x3419461E: 02 DC.B 0x02 ; '\x02' 0x3419461F: 02 DC.B 0x02 ; '\x02' 0x34194620: 02 DC.B 0x02 ; '\x02' 0x34194621: 02 DC.B 0x02 ; '\x02' 0x34194622: 02 DC.B 0x02 ; '\x02' 0x34194623: 10 DC.B 0x10 ; '\x10' 0x34194624: 10 DC.B 0x10 ; '\x10' 0x34194625: 10 DC.B 0x10 ; '\x10' 0x34194626: 10 DC.B 0x10 ; '\x10' 0x34194627: 20 DC.B 0x20 ; ' '

Section .segger.init.__SEGGER_init_ctors from SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=36, align=4


__SEGGER_init_ctors: 0x34194628: B500 PUSH 123LR} 0x3419462A: 4806 LDR R0, =0x34194438 ; [PC, #24] [0x34194644] 0x3419462C: 4906 LDR R1, =0x3419443C ; [PC, #24] [0x34194648]
.L1: 0x3419462E: 4288 CMP R0, R1 0x34194630: D005 BEQ 46L2 ; 0x3419463E 0x34194632: 6802 LDR R2, [R0] 0x34194634: 3004 ADDS R0, #4 0x34194636: B403 PUSH 123R0-R1} 0x34194638: 4790 BLX R2 0x3419463A: BC03 POP 123R0-R1} 0x3419463C: E7F7 B 46L1 ; 0x3419462E
.L2: 0x3419463E: BC08 POP 123R3} 0x34194640: 4718 BX R3 0x34194642: 0000 NOP 0x34194644: 34194438 DC.W 34194438 ; R_ARM_ABS32 0x34194648: 3419443C DC.W 3419443C ; R_ARM_ABS32

Section .segger.init.table from [ Linker created ], size=36, align=4

  0x3419464C:  3419469D     DC.W       __SEGGER_init_zero
  0x34194650:  00           DC.B       0x00                     ; '\0'
  0x34194651:  00           DC.B       0x00                     ; '\0'
  0x34194652:  00           DC.B       0x00                     ; '\0'
  0x34194653:  34           DC.B       0x34                     ; '4'
  0x34194654:  68           DC.B       0x68                     ; 'h'
  0x34194655:  07           DC.B       0x07                     ; '\x07'
  0x34194656:  00           DC.B       0x00                     ; '\0'
  0x34194657:  00           DC.B       0x00                     ; '\0'
  0x34194658:  341946AF     DC.W       __SEGGER_init_copy
  0x3419465C:  68           DC.B       0x68                     ; 'h'
  0x3419465D:  07           DC.B       0x07                     ; '\x07'
  0x3419465E:  00           DC.B       0x00                     ; '\0'
  0x3419465F:  34           DC.B       0x34                     ; '4'
  0x34194660:  34194670     DC.W       34194670               ; R_ARM_ABS32
  0x34194664:  29           DC.B       0x29                     ; ')'
  0x34194665:  00           DC.B       0x00                     ; '\0'
  0x34194666:  00           DC.B       0x00                     ; '\0'
  0x34194667:  00           DC.B       0x00                     ; '\0'
  0x34194668:  34194629     DC.W       __SEGGER_init_ctors
  0x3419466C:  3418D4EF     DC.W       __SEGGER_init_done

Section .segger.init.data from [ Linker created ], size=44, align=4

  0x34194670:  F0           DC.B       0xF0                     ; '\xF0'
  0x34194671:  D7           DC.B       0xD7                     ; '\xD7'
  0x34194672:  18           DC.B       0x18                     ; '\x18'
  0x34194673:  34           DC.B       0x34                     ; '4'
  0x34194674:  F0           DC.B       0xF0                     ; '\xF0'
  0x34194675:  D7           DC.B       0xD7                     ; '\xD7'
  0x34194676:  18           DC.B       0x18                     ; '\x18'
  0x34194677:  34           DC.B       0x34                     ; '4'
  0x34194678:  F0           DC.B       0xF0                     ; '\xF0'
  0x34194679:  D7           DC.B       0xD7                     ; '\xD7'
  0x3419467A:  18           DC.B       0x18                     ; '\x18'
  0x3419467B:  34           DC.B       0x34                     ; '4'
  0x3419467C:  F0           DC.B       0xF0                     ; '\xF0'
  0x3419467D:  D7           DC.B       0xD7                     ; '\xD7'
  0x3419467E:  18           DC.B       0x18                     ; '\x18'
  0x3419467F:  34           DC.B       0x34                     ; '4'
  0x34194680:  F0           DC.B       0xF0                     ; '\xF0'
  0x34194681:  D7           DC.B       0xD7                     ; '\xD7'
  0x34194682:  18           DC.B       0x18                     ; '\x18'
  0x34194683:  34           DC.B       0x34                     ; '4'
  0x34194684:  10           DC.B       0x10                     ; '\x10'
  0x34194685:  00           DC.B       0x00                     ; '\0'
  0x34194686:  00           DC.B       0x00                     ; '\0'
  0x34194687:  00           DC.B       0x00                     ; '\0'
  0x34194688:  44           DC.B       0x44                     ; 'D'
  0x34194689:  03           DC.B       0x03                     ; '\x03'
  0x3419468A:  00           DC.B       0x00                     ; '\0'
  0x3419468B:  34           DC.B       0x34                     ; '4'
  0x3419468C:  48           DC.B       0x48                     ; 'H'
  0x3419468D:  03           DC.B       0x03                     ; '\x03'
  0x3419468E:  00           DC.B       0x00                     ; '\0'
  0x3419468F:  34           DC.B       0x34                     ; '4'
  0x34194690:  4C           DC.B       0x4C                     ; 'L'
  0x34194691:  03           DC.B       0x03                     ; '\x03'
  0x34194692:  00           DC.B       0x00                     ; '\0'
  0x34194693:  34           DC.B       0x34                     ; '4'
  0x34194694:  00           DC.B       0x00                     ; '\0'
  0x34194695:  90           DC.B       0x90                     ; '\x90'
  0x34194696:  D0           DC.B       0xD0                     ; '\xD0'
  0x34194697:  03           DC.B       0x03                     ; '\x03'
  0x34194698:  01           DC.B       0x01                     ; '\x01'
  0x34194699:  00           DC.B       0x00                     ; '\0'
  0x3419469A:  00           DC.B       0x00                     ; '\0'
  0x3419469B:  00           DC.B       0x00                     ; '\0'

Section .segger.init.__SEGGER_init_zero from SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=18, align=2


__SEGGER_init_zero: 0x3419469C: 6820 LDR R0, [R4] 0x3419469E: 6861 LDR R1, [R4, #4] 0x341946A0: 3408 ADDS R4, #8 0x341946A2: 2200 MOVS R2, #0 0x341946A4: E000 B 46L2 ; 0x341946A8
.L1: 0x341946A6: 5442 STRB R2, [R0, R1]
.L2: 0x341946A8: 1E49 SUBS R1, R1, #1 0x341946AA: D5FC BPL 46L1 ; 0x341946A6 0x341946AC: 4770 BX LR

Section .segger.init.__SEGGER_init_copy from SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=20, align=2


__SEGGER_init_copy: 0x341946AE: 6820 LDR R0, [R4] 0x341946B0: 6861 LDR R1, [R4, #4] 0x341946B2: 68A2 LDR R2, [R4, #8] 0x341946B4: 340C ADDS R4, #12 0x341946B6: E001 B 46L2 ; 0x341946BC
.L1: 0x341946B8: 5C8B LDRB R3, [R1, R2] 0x341946BA: 5483 STRB R3, [R0, R2]
.L2: 0x341946BC: 1E52 SUBS R2, R2, #1 0x341946BE: D5FB BPL 46L1 ; 0x341946B8 0x341946C0: 4770 BX LR

LINK SUMMARY

 80 868 bytes read-only  code    + 
  1 753 bytes read-only  data    =  82 621 bytes read-only (total)
 10 129 bytes read-write data
Name Range Size Used Unused Alignment Loss
FLEX_RAM 34000000-34063FFF 409 600 10 129 2.47 399 471 97.53 0 0.00
AXI_RAM2 34180400-341FFFFF 523 264 82 625 15.79 440 639 84.21 0 0.00
Link complete: 0 errors.