CONTENTS

LINK INFORMATION

SEGGER ARM Linker 4.44.5 compiled Aug  7 2026 18:47:09
Copyright (c) 2017-2026 SEGGER Microcontroller GmbH    www.segger.com
--add-region:ITCM_RAM=0x00010000@0x10000000
--add-region:DTCM_RAM=0x00020000@0x30000000
--add-region:FLEX_RAM=0x00064000@0x34000000
--add-region:AXI_RAM1=0x0009c000@0x34064000
--add-region:AXI_RAM2=0x0007fc00@0x34180400
--add-region:AXI_RAM3=0x00070000@0x34200000
--add-region:AXI_RAM4=0x00070000@0x34270000
--add-region:AXI_RAM5=0x00070000@0x342e0000
--add-region:AXI_RAM6=0x00070000@0x34350000
--add-region:AXI_RAM7=0x00040000@0x343c0000
--add-region:AXI_RAM8=0x00020000@0x34400000
--add-region:AHB_RAM1=0x00004000@0x38000000
--add-region:AHB_RAM2=0x00004000@0x38004000
--add-region:BKP_RAM=0x00002000@0x3c000000
--full-section-headers
--merge-sections
--merge-strings
--map-html
--map-file=Output/Debug/Exe/blto2_FSBL.htm
--map-full
--list-all-undefineds
-eReset_Handler
-EL
-mcpu=8.1-M.main
--silent
-TD:/Projekte/hadewe_blto2/trunk/firmware/FSBL/SES/STM32N6xx_RAM.icf
--defsym=__STACKSIZE__=8192
--defsym=__STACKSIZE_PROCESS__=0
--defsym=__HEAPSIZE__=256
--defsym=__SEGGER_RTL_vfprintf=__SEGGER_RTL_vfprintf_short_float_long_long
--defsym=__SEGGER_RTL_vfscanf=__SEGGER_RTL_vfscanf_int
-u_vectors
-o
D:/Projekte/hadewe_blto2/trunk/firmware/FSBL/SES/Output/Debug/Exe/blto2_FSBL.elf
D:/Projekte/hadewe_blto2/trunk/firmware/FSBL/SES/Output/Debug/Obj/blto2_FSBL_lto.o
Output/Debug/Obj/SEGGER_THUMB_Startup.o
Output/Debug/Obj/stm32n657xx_Vectors.o
Output/Debug/Obj/STM32N6xx_Startup.o
C:/Program Files/SEGGER/SEGGER Embedded Studio 8.30a/lib/libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a
C:/Program Files/SEGGER/SEGGER Embedded Studio 8.30a/lib/SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a
C:/Program Files/SEGGER/SEGGER Embedded Studio 8.30a/lib/prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a
C:/Program Files/SEGGER/SEGGER Embedded Studio 8.30a/lib/heapops_disable_interrupts_locking_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a
C:/Program Files/SEGGER/SEGGER Embedded Studio 8.30a/lib/strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a
C:/Program Files/SEGGER/SEGGER Embedded Studio 8.30a/lib/mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a

LINKER SCRIPT

Linker script 'D:/Projekte/hadewe_blto2/trunk/firmware/FSBL/SES/STM32N6xx_RAM.icf'

/*********************************************************************
*                    SEGGER Microcontroller GmbH                     *
*                        The Embedded Experts                        *
**********************************************************************
*                                                                    *
*            (c) 2014 - 2026 SEGGER Microcontroller GmbH             *
*                                                                    *
*       www.segger.com     Support: support@segger.com               *
*                                                                    *
**********************************************************************
*                                                                    *
* All rights reserved.                                               *
*                                                                    *
* Redistribution and use in source and binary forms, with or         *
* without modification, are permitted provided that the following    *
* condition is met:                                                  *
*                                                                    *
* - Redistributions of source code must retain the above copyright   *
*   notice, this condition and the following disclaimer.             *
*                                                                    *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND             *
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,        *
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF           *
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE           *
* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR           *
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT  *
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;    *
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF      *
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT          *
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE  *
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH   *
* DAMAGE.                                                            *
*                                                                    *
**********************************************************************
-------------------------- END-OF-HEADER -----------------------------

File    : STM32N6xx_RAM.icf
Purpose : STM32N6xx linker script for application placement in RAM
          (to be copied to RAM by bootloader or debugger)
          for use with the SEGGER Linker.
Maps    : STM32N645A0HxQ, STM32N645B0HxQ, STM32N645I0HxQ, STM32N645L0HxQ,
          STM32N645X0HxQ, STM32N645Z0HxQ, STM32N647A0HxQ, STM32N647B0HxQ,
          STM32N647I0HxQ, STM32N647L0HxQ, STM32N647X0HxQ, STM32N647Z0HxQ,
          STM32N655A0HxQ, STM32N655B0HxQ, STM32N655I0HxQ, STM32N655L0HxQ,
          STM32N655X0HxQ, STM32N655Z0HxQ, STM32N657A0HxQ, STM32N657B0HxQ,
          STM32N657I0HxQ, STM32N657L0HxQ, STM32N657X0HxQ, STM32N657Z0HxQ
Literature:
  [1]  SEGGER Linker User Guide (https://www.segger.com/doc/UM20005_Linker.html)
  [2]  SEGGER Linker Section Placement (https://wiki.segger.com/SEGGER_Linker_Script_Files)
*/

define memory with size = 4G;

//
// Combined regions per memory type
//
define region FLASH = AXI_RAM2;
define region RAM   = FLEX_RAM;

//
// Block definitions
//
define block ctors                          { section .ctors,     section .ctors.*, block with         alphabetical order { init_array } };
define block dtors                          { section .dtors,     section .dtors.*, block with reverse alphabetical order { fini_array } };
define block exidx                          { section .ARM.exidx, section .ARM.exidx.* };
define block tbss                           { section .tbss,      section .tbss.*  };
define block tdata                          { section .tdata,     section .tdata.* };
define block tls with fixed order           { block tbss, block tdata };
define block tdata_load                     { copy of block tdata };
define block heap           with auto size = __HEAPSIZE__,  alignment = 8, readwrite access { };
define block stack          with      size = __STACKSIZE__, alignment = 8, readwrite access { };
define block stack_process  with      size = __STACKSIZE_PROCESS__, alignment = 8, /* fill =0xCD, */ readwrite access { };

//
// Explicit initialization settings for sections
// Packing options for initialize by copy: packing=auto/lzss/zpak/packbits
//
do not initialize                           { section .non_init, section .non_init.*, section .*.non_init, section .*.non_init.* };
do not initialize                           { section .no_init, section .no_init.*, section .*.no_init, section .*.no_init.* };   // Legacy sections, kept for backwards compatibility
do not initialize                           { section .noinit, section .noinit.*, section .*.noinit, section .*.noinit.* };       // Legacy sections, used by some SDKs/HALs
do not initialize                           { section .vectors_ram };
initialize by copy with packing=auto        { section .data, section .data.*, section .*.data, section .*.data.* };               // Static data sections
initialize by copy with packing=auto        { section .fast, section .fast.*, section .*.fast, section .*.fast.* };               // "RAM Code" sections

initialize by calling __SEGGER_STOP_X_InitLimits    { section .data.stop.* };

#define USES_ALLOC_FUNC                                   \
  linked symbol malloc || linked symbol aligned_alloc ||  \
  linked symbol calloc || linked symbol realloc

initialize by calling __SEGGER_init_heap if USES_ALLOC_FUNC { block heap };                        // Init the heap if one is required
initialize by calling __SEGGER_init_ctors    { block ctors };                                      // Call constructors for global objects which need to be constructed before reaching main (if any). Make sure this is done after setting up heap.

//assert with warning "free() linked into application but there are no calls to an allocation function!" {
//  linked symbol free => USES_ALLOC_FUNC
//};

assert with error "heap is too small!"              { USES_ALLOC_FUNC => size  of block heap >= 48 };
assert with error "heap size not a multiple of 8!"  { USES_ALLOC_FUNC => size  of block heap % 8 == 0 };
assert with error "heap not correctly aligned!"     { USES_ALLOC_FUNC => start of block heap % 8 == 0 };

//
// FLASH Placement
//
place at start of FLASH                     { section vectors };                                    // Vector table section
place in FLASH with minimum size order      { block tdata_load,                                     // Thread-local-storage load image
                                              block exidx,                                          // ARM exception unwinding block
                                              block ctors,                                          // Constructors block
                                              block dtors,                                          // Destructors block
                                              readonly,                                             // Catch-all for readonly data (e.g. .rodata, .srodata)
                                              readexec                                              // Catch-all for (readonly) executable code (e.g. .text)
                                            };


//
// Explicit placement in RAMn
//
place in AHB_RAM1                           { section .AHB_RAM1, section .AHB_RAM1.* };
place in AHB_RAM2                           { section .AHB_RAM2, section .AHB_RAM2.* };
place in AXI_RAM1                           { section .AXI_RAM1, section .AXI_RAM1.* };  // This region may be deactivated and not accessible
place in AXI_RAM2                           { section .AXI_RAM2, section .AXI_RAM2.* };  // This region may be deactivated and not accessible
place in AXI_RAM3                           { section .AXI_RAM3, section .AXI_RAM3.* };  // This region may be deactivated and not accessible
place in AXI_RAM4                           { section .AXI_RAM4, section .AXI_RAM4.* };  // This region may be deactivated and not accessible
place in BKP_RAM                            { section .BKP_RAM,  section .BKP_RAM.*  };  // This region may be deactivated and not accessible
place in DTCM_RAM                           { section .DTCM_RAM, section .DTCM_RAM.* };  // This region may be deactivated and not accessible
place in FLEX_RAM                           { section .FLEX_RAM, section .FLEX_RAM.* };
place in ITCM_RAM                           { section .ITCM_RAM, section .ITCM_RAM.* };  // This region may be deactivated and not accessible

//
// RAM Placement
//
place in RAM                                { section .fast, section .fast.* };                     // "ramfunc" section
place in RAM with auto order                { block tls,                                            // Thread-local-storage block
                                              readwrite,                                            // Catch-all for initialized/uninitialized data sections (e.g. .data, .noinit)
                                              zeroinit                                              // Catch-all for zero-initialized data sections (e.g. .bss)
                                            };
place in RAM                                { block heap };                                         // Heap reserved block
place at end of RAM                         { block stack };                                        // Stack reserved block at the end

PLACEMENT SUMMARY

place at 0x34064000

Symbol or [section] name Type Address Size Align Object File
[.bss.block.stack] None 0x34062000 8 192 8 [ Linker created ]

"<#4> at line 107, col 45": place in [0x34180400 to 0x341FFFFF] with maximum packing

Symbol or [section] name Type Address Size Align Object File
_vectors Code 0x34180400 844 1024 stm32n657xx_Vectors.o
Error_Handler Code 0x3418074C 4 4 blto2_FSBL_lto.o
__SEGGER_RTL_ipow10 Cnst 0x34180750 160 8 prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_vfprintf_short_float_long_long Code 0x341807F0 3 036 8 __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
main Code 0x341813CC 360 4 blto2_FSBL_lto.o
HAL_MspInit Code 0x34181534 8 4 blto2_FSBL_lto.o
SysTick_Handler Code 0x3418153C 8 4 blto2_FSBL_lto.o
SystemCoreClockUpdate Code 0x34181544 828 4 blto2_FSBL_lto.o
HAL_XSPI_MspInit Code 0x34181880 324 4 blto2_FSBL_lto.o
HAL_Init Code 0x341819C4 48 4 blto2_FSBL_lto.o
HAL_GetTick Code 0x341819F4 12 4 blto2_FSBL_lto.o
HAL_BSEC_OTP_Read Code 0x34181A00 124 4 blto2_FSBL_lto.o
__NVIC_SetPriorityGrouping Code 0x34181A7C 60 4 blto2_FSBL_lto.o
HAL_NVIC_SetPriority Code 0x34181AB8 168 4 blto2_FSBL_lto.o
__NVIC_GetPriorityGrouping Code 0x34181B60 16 4 blto2_FSBL_lto.o
NVIC_EncodePriority Code 0x34181B70 100 4 blto2_FSBL_lto.o
HAL_SYSTICK_Config Code 0x34181BD4 16 4 blto2_FSBL_lto.o
HAL_DMA_Abort Code 0x34181BE4 244 4 blto2_FSBL_lto.o
HAL_GPIO_Init Code 0x34181CD8 1 928 4 blto2_FSBL_lto.o
LL_RCC_HSI_SetDivider Code 0x34182460 28 4 blto2_FSBL_lto.o
LL_RCC_HSI_IsReady Code 0x3418247C 16 4 blto2_FSBL_lto.o
LL_RCC_GetCpuClkSource Code 0x3418248C 16 4 blto2_FSBL_lto.o
LL_RCC_GetSysClkSource Code 0x3418249C 16 4 blto2_FSBL_lto.o
LL_RCC_PLL1_GetSource Code 0x341824AC 16 4 blto2_FSBL_lto.o
LL_RCC_PLL2_GetSource Code 0x341824BC 16 4 blto2_FSBL_lto.o
LL_RCC_PLL3_GetSource Code 0x341824CC 16 4 blto2_FSBL_lto.o
LL_RCC_PLL4_GetSource Code 0x341824DC 16 4 blto2_FSBL_lto.o
LL_RCC_MSI_SetFrequency Code 0x341824EC 28 4 blto2_FSBL_lto.o
LL_RCC_MSI_IsReady Code 0x34182508 16 4 blto2_FSBL_lto.o
LL_RCC_LSI_IsReady Code 0x34182518 16 4 blto2_FSBL_lto.o
LL_RCC_LSE_IsReady Code 0x34182528 16 4 blto2_FSBL_lto.o
LL_RCC_PLL1_IsReady Code 0x34182538 16 4 blto2_FSBL_lto.o
LL_RCC_IC1_GetSource Code 0x34182548 16 4 blto2_FSBL_lto.o
LL_RCC_IC2_GetSource Code 0x34182558 16 4 blto2_FSBL_lto.o
LL_RCC_IC6_GetSource Code 0x34182568 16 4 blto2_FSBL_lto.o
LL_RCC_IC11_GetSource Code 0x34182578 16 4 blto2_FSBL_lto.o
LL_RCC_PLL2_IsReady Code 0x34182588 16 4 blto2_FSBL_lto.o
LL_RCC_PLL3_IsReady Code 0x34182598 16 4 blto2_FSBL_lto.o
LL_RCC_PLL4_IsReady Code 0x341825A8 16 4 blto2_FSBL_lto.o
RCC_PLL_Source_IsReady Code 0x341825B8 84 4 blto2_FSBL_lto.o
LL_RCC_HSE_IsReady Code 0x3418260C 16 4 blto2_FSBL_lto.o
LL_RCC_HSI_GetDivider Code 0x3418261C 16 4 blto2_FSBL_lto.o
LL_RCC_PLL1_IsEnabledBypass Code 0x3418262C 16 4 blto2_FSBL_lto.o
LL_RCC_PLL2_IsEnabledBypass Code 0x3418263C 16 4 blto2_FSBL_lto.o
LL_RCC_PLL3_IsEnabledBypass Code 0x3418264C 16 4 blto2_FSBL_lto.o
LL_RCC_PLL4_IsEnabledBypass Code 0x3418265C 16 4 blto2_FSBL_lto.o
RCC_GetSysClockFreq Code 0x3418266C 232 4 blto2_FSBL_lto.o
HAL_RCC_GetClockConfig Code 0x34182754 240 4 blto2_FSBL_lto.o
HAL_RCCEx_PeriphCLKConfig Code 0x34182844 24 268 4 blto2_FSBL_lto.o
LL_RCC_GetRTCClockSource Code 0x34188710 16 4 blto2_FSBL_lto.o
LL_RCC_LSE_IsReady.59 Code 0x34188720 16 4 blto2_FSBL_lto.o
LL_RCC_SetRTC_HSEPrescaler Code 0x34188730 28 4 blto2_FSBL_lto.o
LL_RCC_SetRTCClockSource Code 0x3418874C 28 4 blto2_FSBL_lto.o
LL_RCC_IC10_Enable.61 Code 0x34188768 16 4 blto2_FSBL_lto.o
LL_RCC_IC15_Enable.62 Code 0x34188778 16 4 blto2_FSBL_lto.o
LL_RCC_IC19_Enable Code 0x34188788 16 4 blto2_FSBL_lto.o
LL_RCC_IC20_Enable.63 Code 0x34188798 16 4 blto2_FSBL_lto.o
LL_RCC_SetCLKPClockSource Code 0x341887A8 28 4 blto2_FSBL_lto.o
LL_RCC_SetXSPIClockSource Code 0x341887C4 16 4 blto2_FSBL_lto.o
LL_RCC_SetFMCClockSource Code 0x341887D4 28 4 blto2_FSBL_lto.o
LL_RCC_SetSDMMCClockSource Code 0x341887F0 16 4 blto2_FSBL_lto.o
LL_RCC_SetADFClockSource Code 0x34188800 28 4 blto2_FSBL_lto.o
LL_RCC_IC18_Enable Code 0x3418881C 16 4 blto2_FSBL_lto.o
LL_RCC_IC17_Enable Code 0x3418882C 16 4 blto2_FSBL_lto.o
LL_RCC_SetDCMIPPClockSource Code 0x3418883C 28 4 blto2_FSBL_lto.o
LL_RCC_IC12_Enable Code 0x34188858 16 4 blto2_FSBL_lto.o
LL_RCC_SetETHClockSource Code 0x34188868 28 4 blto2_FSBL_lto.o
LL_RCC_SetETHPHYInterface Code 0x34188884 28 4 blto2_FSBL_lto.o
LL_RCC_SetETHREFRXClockSource Code 0x341888A0 28 4 blto2_FSBL_lto.o
LL_RCC_SetETHREFTXClockSource Code 0x341888BC 28 4 blto2_FSBL_lto.o
LL_RCC_IC13_Enable Code 0x341888D8 16 4 blto2_FSBL_lto.o
LL_RCC_SetFDCANClockSource Code 0x341888E8 28 4 blto2_FSBL_lto.o
LL_RCC_SetI2CClockSource Code 0x34188904 16 4 blto2_FSBL_lto.o
LL_RCC_SetI3CClockSource Code 0x34188914 16 4 blto2_FSBL_lto.o
LL_RCC_SetLPTIMClockSource Code 0x34188924 16 4 blto2_FSBL_lto.o
LL_RCC_IC9_Enable Code 0x34188934 16 4 blto2_FSBL_lto.o
LL_RCC_IC14_Enable Code 0x34188944 16 4 blto2_FSBL_lto.o
LL_RCC_SetLPUARTClockSource Code 0x34188954 28 4 blto2_FSBL_lto.o
LL_RCC_IC16_Enable Code 0x34188970 16 4 blto2_FSBL_lto.o
LL_RCC_SetLTDCClockSource Code 0x34188980 28 4 blto2_FSBL_lto.o
LL_RCC_SetMDFClockSource Code 0x3418899C 28 4 blto2_FSBL_lto.o
LL_RCC_SetPSSIClockSource Code 0x341889B8 28 4 blto2_FSBL_lto.o
LL_RCC_SetSAIClockSource Code 0x341889D4 16 4 blto2_FSBL_lto.o
LL_RCC_SetSPDIFRXClockSource Code 0x341889E4 28 4 blto2_FSBL_lto.o
LL_RCC_SetSPIClockSource Code 0x34188A00 16 4 blto2_FSBL_lto.o
LL_RCC_SetUSARTClockSource Code 0x34188A10 16 4 blto2_FSBL_lto.o
LL_RCC_SetOTGPHYClockSource Code 0x34188A20 16 4 blto2_FSBL_lto.o
LL_RCC_SetOTGPHYCKREFClockSource Code 0x34188A30 16 4 blto2_FSBL_lto.o
LL_RCC_SetClockSource Code 0x34188A40 52 4 blto2_FSBL_lto.o
LL_RCC_GetADCPrescaler Code 0x34188A74 16 4 blto2_FSBL_lto.o
LL_RCC_GetETH1PTPDivider Code 0x34188A84 16 4 blto2_FSBL_lto.o
LL_RCC_GetI2CClockSource Code 0x34188A94 16 4 blto2_FSBL_lto.o
LL_RCC_GetI3CClockSource Code 0x34188AA4 16 4 blto2_FSBL_lto.o
LL_RCC_GetLPTIMClockSource Code 0x34188AB4 16 4 blto2_FSBL_lto.o
LL_RCC_GetSAIClockSource Code 0x34188AC4 16 4 blto2_FSBL_lto.o
LL_RCC_GetSDMMCClockSource Code 0x34188AD4 16 4 blto2_FSBL_lto.o
LL_RCC_GetSPIClockSource Code 0x34188AE4 16 4 blto2_FSBL_lto.o
LL_RCC_GetTIMPrescaler Code 0x34188AF4 16 4 blto2_FSBL_lto.o
LL_RCC_GetUSARTClockSource Code 0x34188B04 16 4 blto2_FSBL_lto.o
LL_RCC_HSE_IsSelectedHSEDiv2AsDiv2Clock Code 0x34188B14 16 4 blto2_FSBL_lto.o
LL_RCC_GetXSPIClockSource Code 0x34188B24 16 4 blto2_FSBL_lto.o
LL_RCC_GetClockSource Code 0x34188B34 48 4 blto2_FSBL_lto.o
RCCEx_GetADFCLKFreq Code 0x34188B64 388 4 blto2_FSBL_lto.o
RCCEx_GetCLKPCLKFreq Code 0x34188CE8 736 4 blto2_FSBL_lto.o
RCCEx_GetDCMIPPCLKFreq Code 0x34188FC8 228 4 blto2_FSBL_lto.o
RCCEx_GetETH1CLKFreq Code 0x341890AC 216 4 blto2_FSBL_lto.o
RCCEx_GetI3CCLKFreq Code 0x34189184 516 4 blto2_FSBL_lto.o
RCCEx_GetLPUARTCLKFreq Code 0x34189388 412 4 blto2_FSBL_lto.o
RCCEx_GetLTDCCLKFreq Code 0x34189524 228 4 blto2_FSBL_lto.o
RCCEx_GetMDFCLKFreq Code 0x34189608 436 4 blto2_FSBL_lto.o
RCCEx_GetSDMMCCLKFreq Code 0x341897BC 396 4 blto2_FSBL_lto.o
RCCEx_GetSPDIFRXCLKFreq Code 0x34189948 372 4 blto2_FSBL_lto.o
RCCEx_GetSPICLKFreq Code 0x34189ABC 1 196 4 blto2_FSBL_lto.o
RCCEx_GetUSARTCLKFreq Code 0x34189F68 916 4 blto2_FSBL_lto.o
RCCEx_GetUARTCLKFreq Code 0x3418A2FC 916 4 blto2_FSBL_lto.o
RCCEx_GetOTGPHYCLKFreq Code 0x3418A690 324 4 blto2_FSBL_lto.o
RCCEx_GetOTGPHYCKREFCLKFreq Code 0x3418A7D4 148 4 blto2_FSBL_lto.o
RCCEx_GetXSPICLKFreq Code 0x3418A868 452 4 blto2_FSBL_lto.o
RCCEx_GetHCLKFreq Code 0x3418AA2C 28 4 blto2_FSBL_lto.o
LL_RCC_IC3_IsEnabled Code 0x3418AA48 16 4 blto2_FSBL_lto.o
LL_RCC_IC3_GetSource Code 0x3418AA58 16 4 blto2_FSBL_lto.o
LL_RCC_IC4_IsEnabled Code 0x3418AA68 16 4 blto2_FSBL_lto.o
LL_RCC_IC4_GetSource Code 0x3418AA78 16 4 blto2_FSBL_lto.o
LL_RCC_PLL4_IsReady.74 Code 0x3418AA88 16 4 blto2_FSBL_lto.o
LL_RCC_PLL4P_IsEnabled Code 0x3418AA98 16 4 blto2_FSBL_lto.o
LL_RCC_PLL4_GetSource.75 Code 0x3418AAA8 16 4 blto2_FSBL_lto.o
RCCEx_GetPLLSourceFreq Code 0x3418AAB8 140 4 blto2_FSBL_lto.o
LL_RCC_PLL4_GetM Code 0x3418AB44 16 4 blto2_FSBL_lto.o
LL_RCC_PLL4_GetN Code 0x3418AB54 16 4 blto2_FSBL_lto.o
LL_RCC_PLL4_GetFRACN Code 0x3418AB64 16 4 blto2_FSBL_lto.o
LL_RCC_PLL4_GetP1 Code 0x3418AB74 16 4 blto2_FSBL_lto.o
LL_RCC_PLL4_GetP2 Code 0x3418AB84 16 4 blto2_FSBL_lto.o
RCCEx_CalcPLLFreq Code 0x3418AB94 136 4 blto2_FSBL_lto.o
LL_RCC_PLL4_IsEnabledBypass.76 Code 0x3418AC1C 16 4 blto2_FSBL_lto.o
LL_RCC_HSI_IsReady.77 Code 0x3418AC2C 16 4 blto2_FSBL_lto.o
LL_RCC_HSI_GetDivider.78 Code 0x3418AC3C 16 4 blto2_FSBL_lto.o
LL_RCC_MSI_IsReady.79 Code 0x3418AC4C 16 4 blto2_FSBL_lto.o
LL_RCC_MSI_GetFrequency Code 0x3418AC5C 16 4 blto2_FSBL_lto.o
LL_RCC_HSE_IsReady.80 Code 0x3418AC6C 16 4 blto2_FSBL_lto.o
LL_RCC_PLL3_IsReady.81 Code 0x3418AC7C 16 4 blto2_FSBL_lto.o
LL_RCC_PLL3P_IsEnabled Code 0x3418AC8C 16 4 blto2_FSBL_lto.o
LL_RCC_PLL3_GetSource.82 Code 0x3418AC9C 16 4 blto2_FSBL_lto.o
LL_RCC_PLL3_GetM Code 0x3418ACAC 16 4 blto2_FSBL_lto.o
LL_RCC_PLL3_GetN Code 0x3418ACBC 16 4 blto2_FSBL_lto.o
LL_RCC_PLL3_GetFRACN Code 0x3418ACCC 16 4 blto2_FSBL_lto.o
LL_RCC_PLL3_GetP1 Code 0x3418ACDC 16 4 blto2_FSBL_lto.o
LL_RCC_PLL3_GetP2 Code 0x3418ACEC 16 4 blto2_FSBL_lto.o
LL_RCC_PLL3_IsEnabledBypass.83 Code 0x3418ACFC 16 4 blto2_FSBL_lto.o
LL_RCC_PLL2_IsReady.84 Code 0x3418AD0C 16 4 blto2_FSBL_lto.o
LL_RCC_PLL2P_IsEnabled Code 0x3418AD1C 16 4 blto2_FSBL_lto.o
LL_RCC_PLL2_GetSource.85 Code 0x3418AD2C 16 4 blto2_FSBL_lto.o
LL_RCC_PLL2_GetM Code 0x3418AD3C 16 4 blto2_FSBL_lto.o
LL_RCC_PLL2_GetN Code 0x3418AD4C 16 4 blto2_FSBL_lto.o
LL_RCC_PLL2_GetFRACN Code 0x3418AD5C 16 4 blto2_FSBL_lto.o
LL_RCC_PLL2_GetP1 Code 0x3418AD6C 16 4 blto2_FSBL_lto.o
LL_RCC_PLL2_GetP2 Code 0x3418AD7C 16 4 blto2_FSBL_lto.o
LL_RCC_PLL2_IsEnabledBypass.86 Code 0x3418AD8C 16 4 blto2_FSBL_lto.o
LL_RCC_PLL1_IsReady.87 Code 0x3418AD9C 16 4 blto2_FSBL_lto.o
LL_RCC_PLL1P_IsEnabled Code 0x3418ADAC 16 4 blto2_FSBL_lto.o
LL_RCC_PLL1_GetSource.88 Code 0x3418ADBC 16 4 blto2_FSBL_lto.o
LL_RCC_PLL1_GetM Code 0x3418ADCC 16 4 blto2_FSBL_lto.o
LL_RCC_PLL1_GetN Code 0x3418ADDC 16 4 blto2_FSBL_lto.o
LL_RCC_PLL1_GetFRACN Code 0x3418ADEC 16 4 blto2_FSBL_lto.o
LL_RCC_PLL1_GetP1 Code 0x3418ADFC 16 4 blto2_FSBL_lto.o
LL_RCC_PLL1_GetP2 Code 0x3418AE0C 16 4 blto2_FSBL_lto.o
LL_RCC_PLL1_IsEnabledBypass.89 Code 0x3418AE1C 16 4 blto2_FSBL_lto.o
LL_RCC_GetAHBPrescaler.90 Code 0x3418AE2C 16 4 blto2_FSBL_lto.o
LL_RCC_GetUSBClockSource Code 0x3418AE3C 16 4 blto2_FSBL_lto.o
LL_RCC_IC15_IsEnabled Code 0x3418AE4C 16 4 blto2_FSBL_lto.o
LL_RCC_IC15_GetSource Code 0x3418AE5C 16 4 blto2_FSBL_lto.o
LL_RCC_GetUARTClockSource Code 0x3418AE6C 16 4 blto2_FSBL_lto.o
RCCEx_GetPCLK1Freq Code 0x3418AE7C 28 4 blto2_FSBL_lto.o
RCCEx_GetPCLK2Freq Code 0x3418AE98 28 4 blto2_FSBL_lto.o
LL_RCC_IC9_IsEnabled Code 0x3418AEB4 16 4 blto2_FSBL_lto.o
LL_RCC_IC9_GetSource Code 0x3418AEC4 16 4 blto2_FSBL_lto.o
LL_RCC_IC14_IsEnabled Code 0x3418AED4 16 4 blto2_FSBL_lto.o
LL_RCC_IC14_GetSource Code 0x3418AEE4 16 4 blto2_FSBL_lto.o
LL_RCC_GetAPB2Prescaler.91 Code 0x3418AEF4 16 4 blto2_FSBL_lto.o
LL_RCC_GetAPB1Prescaler.92 Code 0x3418AF04 16 4 blto2_FSBL_lto.o
RCCEx_GetPCLK4Freq Code 0x3418AF14 28 4 blto2_FSBL_lto.o
LL_RCC_IC8_IsEnabled Code 0x3418AF30 16 4 blto2_FSBL_lto.o
LL_RCC_IC8_GetSource Code 0x3418AF40 16 4 blto2_FSBL_lto.o
LL_RCC_GetAPB4Prescaler.93 Code 0x3418AF50 16 4 blto2_FSBL_lto.o
LL_RCC_IC7_IsEnabled Code 0x3418AF60 16 4 blto2_FSBL_lto.o
LL_RCC_IC7_GetSource Code 0x3418AF70 16 4 blto2_FSBL_lto.o
LL_RCC_IC5_IsEnabled Code 0x3418AF80 16 4 blto2_FSBL_lto.o
LL_RCC_IC5_GetSource Code 0x3418AF90 16 4 blto2_FSBL_lto.o
LL_RCC_LSI_IsReady.94 Code 0x3418AFA0 16 4 blto2_FSBL_lto.o
LL_RCC_IC20_IsEnabled Code 0x3418AFB0 16 4 blto2_FSBL_lto.o
LL_RCC_IC20_GetSource Code 0x3418AFC0 16 4 blto2_FSBL_lto.o
RCCEx_GetPCLK5Freq Code 0x3418AFD0 28 4 blto2_FSBL_lto.o
LL_RCC_IC16_IsEnabled Code 0x3418AFEC 16 4 blto2_FSBL_lto.o
LL_RCC_IC16_GetSource Code 0x3418AFFC 16 4 blto2_FSBL_lto.o
LL_RCC_GetAPB5Prescaler.95 Code 0x3418B00C 16 4 blto2_FSBL_lto.o
LL_RCC_IC10_IsEnabled Code 0x3418B01C 16 4 blto2_FSBL_lto.o
LL_RCC_IC10_GetSource Code 0x3418B02C 16 4 blto2_FSBL_lto.o
LL_RCC_IC19_IsEnabled Code 0x3418B03C 16 4 blto2_FSBL_lto.o
LL_RCC_IC19_GetSource Code 0x3418B04C 16 4 blto2_FSBL_lto.o
LL_RCC_IC13_IsEnabled Code 0x3418B05C 16 4 blto2_FSBL_lto.o
LL_RCC_IC13_GetSource Code 0x3418B06C 16 4 blto2_FSBL_lto.o
LL_RCC_IC12_IsEnabled Code 0x3418B07C 16 4 blto2_FSBL_lto.o
LL_RCC_IC12_GetSource Code 0x3418B08C 16 4 blto2_FSBL_lto.o
LL_RCC_IC17_IsEnabled Code 0x3418B09C 16 4 blto2_FSBL_lto.o
LL_RCC_IC17_GetSource Code 0x3418B0AC 16 4 blto2_FSBL_lto.o
LL_RCC_CLKP_IsEnabled Code 0x3418B0BC 16 4 blto2_FSBL_lto.o
LL_RCC_IC18_IsEnabled Code 0x3418B0CC 16 4 blto2_FSBL_lto.o
LL_RCC_IC18_GetSource Code 0x3418B0DC 16 4 blto2_FSBL_lto.o
HAL_XSPI_Init Code 0x3418B0EC 1 548 4 blto2_FSBL_lto.o
XSPI_WaitFlagStateUntilTimeout Code 0x3418B6F8 104 4 blto2_FSBL_lto.o
XSPI_ConfigCmd Code 0x3418B760 924 4 blto2_FSBL_lto.o
HAL_XSPI_Receive Code 0x3418BAFC 300 4 blto2_FSBL_lto.o
LL_AHB5_GRP1_IsEnabledClock Code 0x3418BC28 28 4 blto2_FSBL_lto.o
JumpToApplication Code 0x3418BC44 356 4 blto2_FSBL_lto.o
CheckSFDP_Signature Code 0x3418BDA8 80 4 blto2_FSBL_lto.o
SFDP_GetHeader Code 0x3418BDF8 256 4 blto2_FSBL_lto.o
sfdp_get_paraminfo Code 0x3418BEF8 652 4 blto2_FSBL_lto.o
SFDP_BuildGenericDriver Code 0x3418C184 3 092 4 blto2_FSBL_lto.o
JEDEC_Basic_Manage4S4S4SEnableSequence Code 0x3418CD98 132 4 blto2_FSBL_lto.o
sfdp_getfrequencevalue Code 0x3418CE1C 64 4 blto2_FSBL_lto.o
sfdp_set_dummycycle Code 0x3418CE5C 420 4 blto2_FSBL_lto.o
EXTMEM_DRIVER_NOR_SFDP_DeInit Code 0x3418D000 16 4 blto2_FSBL_lto.o
EXTMEM_DRIVER_NOR_SFDP_Disable_MemoryMappedMode Code 0x3418D010 36 4 blto2_FSBL_lto.o
SAL_XSPI_SetClock Code 0x3418D034 116 4 blto2_FSBL_lto.o
XSPI_FormatCommand Code 0x3418D0A8 88 4 blto2_FSBL_lto.o
SAL_XSPI_GetId Code 0x3418D100 152 4 blto2_FSBL_lto.o
XSPI_Transmit Code 0x3418D198 32 4 blto2_FSBL_lto.o
SAL_XSPI_CommandSendData Code 0x3418D1B8 136 4 blto2_FSBL_lto.o
SAL_XSPI_SendReadCommand Code 0x3418D240 136 4 blto2_FSBL_lto.o
SAL_XSPI_CheckStatusRegister Code 0x3418D2C8 232 4 blto2_FSBL_lto.o
SAL_XSPI_EnableMapMode Code 0x3418D3B0 200 4 blto2_FSBL_lto.o
SAL_XSPI_UpdateMemoryType Code 0x3418D478 116 4 blto2_FSBL_lto.o
EXTMEM_MemoryMappedMode Code 0x3418D4EC 140 4 blto2_FSBL_lto.o
EXTMEM_GetMapAddress Code 0x3418D578 196 4 blto2_FSBL_lto.o
SFDP_BuildGenericDriver.chip_erase_unit Cnst 0x3418D63C 16 4 blto2_FSBL_lto.o
_start Code 0x3418D64C 20 4 SEGGER_THUMB_Startup.o
reset_handler Code 0x3418D660 68 4 STM32N6xx_Startup.o
fmodf Code 0x3418D6A4 284 4 floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
floorf Code 0x3418D7C0 104 4 floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_aPower2f Cnst 0x3418D828 24 4 utilops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__aeabi_ul2f Code 0x3418D840 84 4 floatasmops_arm.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
memcpy Code 0x3418D894 92 4 strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__aeabi_memclr Code 0x3418D8F0 104 4 strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_c_locale Cnst 0x3418D958 12 4 mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_codeset_ascii Cnst 0x3418D964 32 4 mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_c_locale_data Cnst 0x3418D984 88 4 mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
MX_BSEC_Init Code 0x3418D9DC 2 4 blto2_FSBL_lto.o
[.rodata..L__const.sfdp_getfrequencevalue.freqMhz_table] Cnst 0x3418D9DE 26 2 blto2_FSBL_lto.o
MX_EXTMEM_MANAGER_Init Code 0x3418D9F8 62 4 blto2_FSBL_lto.o
PVD_PVM_IRQHandler Code 0x3418DA36 2 2 stm32n657xx_Vectors.o
MX_GPIO_Init Code 0x3418DA38 134 4 blto2_FSBL_lto.o
DTS_IRQHandler Code 0x3418DABE 2 2 stm32n657xx_Vectors.o
LL_AHB4_GRP1_EnableClock Code 0x3418DAC0 34 4 blto2_FSBL_lto.o
RCC_IRQHandler Code 0x3418DAE2 2 2 stm32n657xx_Vectors.o
SystemClock_Config Code 0x3418DAE4 254 4 blto2_FSBL_lto.o
LOCKUP_IRQHandler Code 0x3418DBE2 2 2 stm32n657xx_Vectors.o
OTP_Config Code 0x3418DBE4 142 4 blto2_FSBL_lto.o
CACHE_ECC_IRQHandler Code 0x3418DC72 2 2 stm32n657xx_Vectors.o
LL_APB4_GRP2_EnableClock Code 0x3418DC74 34 4 blto2_FSBL_lto.o
TCM_ECC_IRQHandler Code 0x3418DC96 2 2 stm32n657xx_Vectors.o
assert_failed Code 0x3418DC98 10 4 blto2_FSBL_lto.o
BCK_ECC_IRQHandler Code 0x3418DCA2 2 2 stm32n657xx_Vectors.o
NMI_Handler Code 0x3418DCA4 2 4 blto2_FSBL_lto.o
FPU_IRQHandler Code 0x3418DCA6 2 2 stm32n657xx_Vectors.o
HardFault_Handler Code 0x3418DCA8 2 4 blto2_FSBL_lto.o
RTC_S_IRQHandler Code 0x3418DCAA 2 2 stm32n657xx_Vectors.o
MemManage_Handler Code 0x3418DCAC 2 4 blto2_FSBL_lto.o
TAMP_IRQHandler Code 0x3418DCAE 2 2 stm32n657xx_Vectors.o
BusFault_Handler Code 0x3418DCB0 2 4 blto2_FSBL_lto.o
RIFSC_TAMPER_IRQHandler Code 0x3418DCB2 2 2 stm32n657xx_Vectors.o
UsageFault_Handler Code 0x3418DCB4 2 4 blto2_FSBL_lto.o
IAC_IRQHandler Code 0x3418DCB6 2 2 stm32n657xx_Vectors.o
SVC_Handler Code 0x3418DCB8 2 4 blto2_FSBL_lto.o
RCC_S_IRQHandler Code 0x3418DCBA 2 2 stm32n657xx_Vectors.o
DebugMon_Handler Code 0x3418DCBC 2 4 blto2_FSBL_lto.o
RTC_IRQHandler Code 0x3418DCBE 2 2 stm32n657xx_Vectors.o
PendSV_Handler Code 0x3418DCC0 2 4 blto2_FSBL_lto.o
IWDG_IRQHandler Code 0x3418DCC2 2 2 stm32n657xx_Vectors.o
SystemInit Code 0x3418DCC4 510 4 blto2_FSBL_lto.o
WWDG_IRQHandler Code 0x3418DEC2 2 2 stm32n657xx_Vectors.o
MX_XSPI2_Init Code 0x3418DEC4 126 4 blto2_FSBL_lto.o
EXTI0_IRQHandler Code 0x3418DF42 2 2 stm32n657xx_Vectors.o
LL_APB4_GRP2_EnableClock.7 Code 0x3418DF44 34 4 blto2_FSBL_lto.o
EXTI1_IRQHandler Code 0x3418DF66 2 2 stm32n657xx_Vectors.o
LL_AHB4_GRP1_EnableClock.8 Code 0x3418DF68 34 4 blto2_FSBL_lto.o
EXTI2_IRQHandler Code 0x3418DF8A 2 2 stm32n657xx_Vectors.o
LL_AHB5_GRP1_EnableClock Code 0x3418DF8C 34 4 blto2_FSBL_lto.o
EXTI3_IRQHandler Code 0x3418DFAE 2 2 stm32n657xx_Vectors.o
HAL_InitTick Code 0x3418DFB0 126 4 blto2_FSBL_lto.o
EXTI4_IRQHandler Code 0x3418E02E 2 2 stm32n657xx_Vectors.o
HAL_IncTick Code 0x3418E030 26 4 blto2_FSBL_lto.o
EXTI5_IRQHandler Code 0x3418E04A 2 2 stm32n657xx_Vectors.o
HAL_Delay Code 0x3418E04C 58 4 blto2_FSBL_lto.o
EXTI6_IRQHandler Code 0x3418E086 2 2 stm32n657xx_Vectors.o
HAL_SuspendTick Code 0x3418E088 18 4 blto2_FSBL_lto.o
EXTI7_IRQHandler Code 0x3418E09A 2 2 stm32n657xx_Vectors.o
HAL_BSEC_OTP_Reload Code 0x3418E09C 250 4 blto2_FSBL_lto.o
EXTI8_IRQHandler Code 0x3418E196 2 2 stm32n657xx_Vectors.o
HAL_BSEC_OTP_Program Code 0x3418E198 342 4 blto2_FSBL_lto.o
EXTI9_IRQHandler Code 0x3418E2EE 2 2 stm32n657xx_Vectors.o
HAL_NVIC_SetPriorityGrouping Code 0x3418E2F0 62 4 blto2_FSBL_lto.o
EXTI10_IRQHandler Code 0x3418E32E 2 2 stm32n657xx_Vectors.o
__NVIC_SetPriority Code 0x3418E330 62 4 blto2_FSBL_lto.o
EXTI11_IRQHandler Code 0x3418E36E 2 2 stm32n657xx_Vectors.o
SysTick_Config Code 0x3418E370 78 4 blto2_FSBL_lto.o
EXTI12_IRQHandler Code 0x3418E3BE 2 2 stm32n657xx_Vectors.o
HAL_GPIO_WritePin Code 0x3418E3C0 102 4 blto2_FSBL_lto.o
EXTI13_IRQHandler Code 0x3418E426 2 2 stm32n657xx_Vectors.o
HAL_PWREx_ConfigSupply Code 0x3418E428 114 4 blto2_FSBL_lto.o
EXTI14_IRQHandler Code 0x3418E49A 2 2 stm32n657xx_Vectors.o
HAL_PWREx_ControlVoltageScaling Code 0x3418E49C 114 4 blto2_FSBL_lto.o
EXTI15_IRQHandler Code 0x3418E50E 2 2 stm32n657xx_Vectors.o
HAL_PWREx_ConfigVddIORange Code 0x3418E510 226 4 blto2_FSBL_lto.o
SAES_IRQHandler Code 0x3418E5F2 2 2 stm32n657xx_Vectors.o
HAL_PWREx_EnableVddIO3 Code 0x3418E5F4 18 4 blto2_FSBL_lto.o
CRYP_IRQHandler Code 0x3418E606 2 2 stm32n657xx_Vectors.o
LL_RCC_HSI_Enable Code 0x3418E608 14 4 blto2_FSBL_lto.o
PKA_IRQHandler Code 0x3418E616 2 2 stm32n657xx_Vectors.o
HAL_RCC_OscConfig Code 0x3418E618 2 810 4 blto2_FSBL_lto.o
HASH_IRQHandler Code 0x3418F112 2 2 stm32n657xx_Vectors.o
LL_RCC_HSI_SetCalibTrimming Code 0x3418F114 30 4 blto2_FSBL_lto.o
RNG_IRQHandler Code 0x3418F132 2 2 stm32n657xx_Vectors.o
LL_RCC_HSI_Disable Code 0x3418F134 14 4 blto2_FSBL_lto.o
MCE1_IRQHandler Code 0x3418F142 2 2 stm32n657xx_Vectors.o
LL_RCC_MSI_SetCalibTrimming Code 0x3418F144 30 4 blto2_FSBL_lto.o
MCE2_IRQHandler Code 0x3418F162 2 2 stm32n657xx_Vectors.o
LL_RCC_MSI_Enable Code 0x3418F164 14 4 blto2_FSBL_lto.o
MCE3_IRQHandler Code 0x3418F172 2 2 stm32n657xx_Vectors.o
LL_RCC_MSI_Disable Code 0x3418F174 14 4 blto2_FSBL_lto.o
MCE4_IRQHandler Code 0x3418F182 2 2 stm32n657xx_Vectors.o
LL_RCC_LSI_Enable Code 0x3418F184 14 4 blto2_FSBL_lto.o
ADC1_2_IRQHandler Code 0x3418F192 2 2 stm32n657xx_Vectors.o
LL_RCC_LSI_Disable Code 0x3418F194 14 4 blto2_FSBL_lto.o
CSI_IRQHandler Code 0x3418F1A2 2 2 stm32n657xx_Vectors.o
RCC_PLL_IsNewConfig Code 0x3418F1A4 218 4 blto2_FSBL_lto.o
DCMIPP_IRQHandler Code 0x3418F27E 2 2 stm32n657xx_Vectors.o
RCC_PLL_Config Code 0x3418F280 846 4 blto2_FSBL_lto.o
PAHB_ERR_IRQHandler Code 0x3418F5CE 2 2 stm32n657xx_Vectors.o
RCC_PLL_Enable Code 0x3418F5D0 94 4 blto2_FSBL_lto.o
NPU0_IRQHandler Code 0x3418F62E 2 2 stm32n657xx_Vectors.o
HAL_RCC_ClockConfig Code 0x3418F630 2 498 4 blto2_FSBL_lto.o
NPU1_IRQHandler Code 0x3418FFF2 2 2 stm32n657xx_Vectors.o
RCC_IC_CheckPLLSources Code 0x3418FFF4 234 4 blto2_FSBL_lto.o
NPU2_IRQHandler Code 0x341900DE 2 2 stm32n657xx_Vectors.o
LL_RCC_IC1_Enable Code 0x341900E0 14 4 blto2_FSBL_lto.o
NPU3_IRQHandler Code 0x341900EE 2 2 stm32n657xx_Vectors.o
HAL_RCC_GetCpuClockFreq Code 0x341900F0 238 4 blto2_FSBL_lto.o
CACHEAXI_IRQHandler Code 0x341901DE 2 2 stm32n657xx_Vectors.o
LL_RCC_IC1_GetDivider Code 0x341901E0 22 4 blto2_FSBL_lto.o
LTDC_LO_IRQHandler Code 0x341901F6 2 2 stm32n657xx_Vectors.o
HAL_RCC_GetSysClockFreq Code 0x341901F8 26 4 blto2_FSBL_lto.o
LTDC_LO_ERR_IRQHandler Code 0x34190212 2 2 stm32n657xx_Vectors.o
LL_RCC_IC2_GetDivider Code 0x34190214 22 4 blto2_FSBL_lto.o
DMA2D_IRQHandler Code 0x3419022A 2 2 stm32n657xx_Vectors.o
LL_RCC_IC5_Enable.60 Code 0x3419022C 14 4 blto2_FSBL_lto.o
JPEG_IRQHandler Code 0x3419023A 2 2 stm32n657xx_Vectors.o
LL_RCC_IC3_Enable Code 0x3419023C 14 4 blto2_FSBL_lto.o
VENC_IRQHandler Code 0x3419024A 2 2 stm32n657xx_Vectors.o
LL_RCC_IC4_Enable Code 0x3419024C 14 4 blto2_FSBL_lto.o
GFXMMU_IRQHandler Code 0x3419025A 2 2 stm32n657xx_Vectors.o
LL_RCC_CLKP_Enable Code 0x3419025C 14 4 blto2_FSBL_lto.o
GFXTIM_IRQHandler Code 0x3419026A 2 2 stm32n657xx_Vectors.o
LL_RCC_IC7_Enable Code 0x3419026C 14 4 blto2_FSBL_lto.o
GPU2D_IRQHandler Code 0x3419027A 2 2 stm32n657xx_Vectors.o
LL_RCC_IC8_Enable Code 0x3419027C 14 4 blto2_FSBL_lto.o
GPU2D_ER_IRQHandler Code 0x3419028A 2 2 stm32n657xx_Vectors.o
LL_RCC_HSE_SelectHSEDiv2AsDiv2Clock Code 0x3419028C 18 4 blto2_FSBL_lto.o
ICACHE_IRQHandler Code 0x3419029E 2 2 stm32n657xx_Vectors.o
LL_RCC_HSE_SelectHSEAsDiv2Clock Code 0x341902A0 18 4 blto2_FSBL_lto.o
HPDMA1_Channel0_IRQHandler Code 0x341902B2 2 2 stm32n657xx_Vectors.o
LL_RCC_SetTIMPrescaler Code 0x341902B4 30 4 blto2_FSBL_lto.o
HPDMA1_Channel1_IRQHandler Code 0x341902D2 2 2 stm32n657xx_Vectors.o
LL_RCC_GetADCClockSource Code 0x341902D4 22 4 blto2_FSBL_lto.o
HPDMA1_Channel2_IRQHandler Code 0x341902EA 2 2 stm32n657xx_Vectors.o
LL_RCC_GetADFClockSource Code 0x341902EC 22 4 blto2_FSBL_lto.o
HPDMA1_Channel3_IRQHandler Code 0x34190302 2 2 stm32n657xx_Vectors.o
LL_RCC_GetCLKPClockSource Code 0x34190304 22 4 blto2_FSBL_lto.o
HPDMA1_Channel4_IRQHandler Code 0x3419031A 2 2 stm32n657xx_Vectors.o
LL_RCC_GetDCMIPPClockSource Code 0x3419031C 22 4 blto2_FSBL_lto.o
HPDMA1_Channel5_IRQHandler Code 0x34190332 2 2 stm32n657xx_Vectors.o
LL_RCC_GetETHClockSource Code 0x34190334 22 4 blto2_FSBL_lto.o
HPDMA1_Channel6_IRQHandler Code 0x3419034A 2 2 stm32n657xx_Vectors.o
LL_RCC_GetETHPTPClockSource Code 0x3419034C 22 4 blto2_FSBL_lto.o
HPDMA1_Channel7_IRQHandler Code 0x34190362 2 2 stm32n657xx_Vectors.o
LL_RCC_GetFDCANClockSource Code 0x34190364 22 4 blto2_FSBL_lto.o
HPDMA1_Channel8_IRQHandler Code 0x3419037A 2 2 stm32n657xx_Vectors.o
LL_RCC_GetFMCClockSource Code 0x3419037C 22 4 blto2_FSBL_lto.o
HPDMA1_Channel9_IRQHandler Code 0x34190392 2 2 stm32n657xx_Vectors.o
LL_RCC_GetLPUARTClockSource Code 0x34190394 22 4 blto2_FSBL_lto.o
HPDMA1_Channel10_IRQHandler Code 0x341903AA 2 2 stm32n657xx_Vectors.o
LL_RCC_GetLTDCClockSource Code 0x341903AC 22 4 blto2_FSBL_lto.o
HPDMA1_Channel11_IRQHandler Code 0x341903C2 2 2 stm32n657xx_Vectors.o
LL_RCC_GetMDFClockSource Code 0x341903C4 22 4 blto2_FSBL_lto.o
HPDMA1_Channel12_IRQHandler Code 0x341903DA 2 2 stm32n657xx_Vectors.o
LL_RCC_GetPSSIClockSource Code 0x341903DC 22 4 blto2_FSBL_lto.o
HPDMA1_Channel13_IRQHandler Code 0x341903F2 2 2 stm32n657xx_Vectors.o
LL_RCC_GetSPDIFRXClockSource Code 0x341903F4 22 4 blto2_FSBL_lto.o
HPDMA1_Channel14_IRQHandler Code 0x3419040A 2 2 stm32n657xx_Vectors.o
HAL_RCCEx_GetPeriphCLKFreq Code 0x3419040C 1 626 4 blto2_FSBL_lto.o
HPDMA1_Channel15_IRQHandler Code 0x34190A66 2 2 stm32n657xx_Vectors.o
RCCEx_GetADCCLKFreq Code 0x34190A68 438 4 blto2_FSBL_lto.o
GPDMA1_Channel0_IRQHandler Code 0x34190C1E 2 2 stm32n657xx_Vectors.o
RCCEx_GetCSICLKFreq Code 0x34190C20 134 4 blto2_FSBL_lto.o
GPDMA1_Channel1_IRQHandler Code 0x34190CA6 2 2 stm32n657xx_Vectors.o
RCCEx_GetETH1PTPCLKFreq Code 0x34190CA8 222 4 blto2_FSBL_lto.o
GPDMA1_Channel2_IRQHandler Code 0x34190D86 2 2 stm32n657xx_Vectors.o
RCCEx_GetFDCANCLKFreq Code 0x34190D88 206 4 blto2_FSBL_lto.o
GPDMA1_Channel3_IRQHandler Code 0x34190E56 2 2 stm32n657xx_Vectors.o
RCCEx_GetFMCCLKFreq Code 0x34190E58 314 4 blto2_FSBL_lto.o
GPDMA1_Channel4_IRQHandler Code 0x34190F92 2 2 stm32n657xx_Vectors.o
RCCEx_GetI2CCLKFreq Code 0x34190F94 706 4 blto2_FSBL_lto.o
GPDMA1_Channel5_IRQHandler Code 0x34191256 2 2 stm32n657xx_Vectors.o
RCCEx_GetLPTIMCLKFreq Code 0x34191258 706 4 blto2_FSBL_lto.o
GPDMA1_Channel6_IRQHandler Code 0x3419151A 2 2 stm32n657xx_Vectors.o
RCCEx_GetPSSICLKFreq Code 0x3419151C 218 4 blto2_FSBL_lto.o
GPDMA1_Channel7_IRQHandler Code 0x341915F6 2 2 stm32n657xx_Vectors.o
RCCEx_GetRTCCLKFreq Code 0x341915F8 126 4 blto2_FSBL_lto.o
GPDMA1_Channel8_IRQHandler Code 0x34191676 2 2 stm32n657xx_Vectors.o
RCCEx_GetSAICLKFreq Code 0x34191678 606 4 blto2_FSBL_lto.o
GPDMA1_Channel9_IRQHandler Code 0x341918D6 2 2 stm32n657xx_Vectors.o
LL_RCC_IC3_GetDivider Code 0x341918D8 22 4 blto2_FSBL_lto.o
GPDMA1_Channel10_IRQHandler Code 0x341918EE 2 2 stm32n657xx_Vectors.o
HAL_RCCEx_GetPLL1CLKFreq Code 0x341918F0 130 4 blto2_FSBL_lto.o
GPDMA1_Channel11_IRQHandler Code 0x34191972 2 2 stm32n657xx_Vectors.o
HAL_RCCEx_GetPLL2CLKFreq Code 0x34191974 130 4 blto2_FSBL_lto.o
GPDMA1_Channel12_IRQHandler Code 0x341919F6 2 2 stm32n657xx_Vectors.o
HAL_RCCEx_GetPLL3CLKFreq Code 0x341919F8 130 4 blto2_FSBL_lto.o
GPDMA1_Channel13_IRQHandler Code 0x34191A7A 2 2 stm32n657xx_Vectors.o
HAL_RCCEx_GetPLL4CLKFreq Code 0x34191A7C 130 4 blto2_FSBL_lto.o
GPDMA1_Channel14_IRQHandler Code 0x34191AFE 2 2 stm32n657xx_Vectors.o
LL_RCC_IC4_GetDivider Code 0x34191B00 22 4 blto2_FSBL_lto.o
GPDMA1_Channel15_IRQHandler Code 0x34191B16 2 2 stm32n657xx_Vectors.o
LL_RCC_IC15_GetDivider Code 0x34191B18 22 4 blto2_FSBL_lto.o
I2C1_EV_IRQHandler Code 0x34191B2E 2 2 stm32n657xx_Vectors.o
LL_RCC_IC9_GetDivider Code 0x34191B30 22 4 blto2_FSBL_lto.o
I2C1_ER_IRQHandler Code 0x34191B46 2 2 stm32n657xx_Vectors.o
LL_RCC_IC14_GetDivider Code 0x34191B48 22 4 blto2_FSBL_lto.o
I2C2_EV_IRQHandler Code 0x34191B5E 2 2 stm32n657xx_Vectors.o
LL_RCC_IC8_GetDivider Code 0x34191B60 22 4 blto2_FSBL_lto.o
I2C2_ER_IRQHandler Code 0x34191B76 2 2 stm32n657xx_Vectors.o
LL_RCC_IC7_GetDivider Code 0x34191B78 22 4 blto2_FSBL_lto.o
I2C3_EV_IRQHandler Code 0x34191B8E 2 2 stm32n657xx_Vectors.o
LL_RCC_IC5_GetDivider Code 0x34191B90 22 4 blto2_FSBL_lto.o
I2C3_ER_IRQHandler Code 0x34191BA6 2 2 stm32n657xx_Vectors.o
LL_RCC_IC20_GetDivider Code 0x34191BA8 22 4 blto2_FSBL_lto.o
I2C4_EV_IRQHandler Code 0x34191BBE 2 2 stm32n657xx_Vectors.o
LL_RCC_IC16_GetDivider Code 0x34191BC0 22 4 blto2_FSBL_lto.o
I2C4_ER_IRQHandler Code 0x34191BD6 2 2 stm32n657xx_Vectors.o
LL_RCC_IC10_GetDivider Code 0x34191BD8 22 4 blto2_FSBL_lto.o
I3C1_EV_IRQHandler Code 0x34191BEE 2 2 stm32n657xx_Vectors.o
LL_RCC_IC19_GetDivider Code 0x34191BF0 22 4 blto2_FSBL_lto.o
I3C1_ER_IRQHandler Code 0x34191C06 2 2 stm32n657xx_Vectors.o
LL_RCC_IC13_GetDivider Code 0x34191C08 22 4 blto2_FSBL_lto.o
I3C2_EV_IRQHandler Code 0x34191C1E 2 2 stm32n657xx_Vectors.o
LL_RCC_IC12_GetDivider Code 0x34191C20 22 4 blto2_FSBL_lto.o
I3C2_ER_IRQHandler Code 0x34191C36 2 2 stm32n657xx_Vectors.o
LL_RCC_IC17_GetDivider Code 0x34191C38 22 4 blto2_FSBL_lto.o
TIM1_BRK_IRQHandler Code 0x34191C4E 2 2 stm32n657xx_Vectors.o
LL_RCC_IC18_GetDivider Code 0x34191C50 22 4 blto2_FSBL_lto.o
TIM1_UP_IRQHandler Code 0x34191C66 2 2 stm32n657xx_Vectors.o
HAL_XSPI_SetTimeout Code 0x34191C68 18 4 blto2_FSBL_lto.o
TIM1_TRG_CCU_IRQHandler Code 0x34191C7A 2 2 stm32n657xx_Vectors.o
HAL_XSPI_Command Code 0x34191C7C 1 106 4 blto2_FSBL_lto.o
TIM1_CC_IRQHandler Code 0x341920CE 2 2 stm32n657xx_Vectors.o
HAL_XSPI_Transmit Code 0x341920D0 226 4 blto2_FSBL_lto.o
TIM2_IRQHandler Code 0x341921B2 2 2 stm32n657xx_Vectors.o
HAL_XSPI_AutoPolling Code 0x341921B4 406 4 blto2_FSBL_lto.o
TIM3_IRQHandler Code 0x3419234A 2 2 stm32n657xx_Vectors.o
HAL_XSPI_MemoryMapped Code 0x3419234C 330 4 blto2_FSBL_lto.o
TIM4_IRQHandler Code 0x34192496 2 2 stm32n657xx_Vectors.o
HAL_XSPI_Abort Code 0x34192498 246 4 blto2_FSBL_lto.o
TIM5_IRQHandler Code 0x3419258E 2 2 stm32n657xx_Vectors.o
HAL_XSPIM_Config Code 0x34192590 878 4 blto2_FSBL_lto.o
TIM6_IRQHandler Code 0x341928FE 2 2 stm32n657xx_Vectors.o
XSPIM_GetConfig Code 0x34192900 210 4 blto2_FSBL_lto.o
TIM7_IRQHandler Code 0x341929D2 2 2 stm32n657xx_Vectors.o
BOOT_Application Code 0x341929D4 34 4 blto2_FSBL_lto.o
TIM8_BRK_IRQHandler Code 0x341929F6 2 2 stm32n657xx_Vectors.o
MapMemory Code 0x341929F8 94 4 blto2_FSBL_lto.o
TIM8_UP_IRQHandler Code 0x34192A56 2 2 stm32n657xx_Vectors.o
SFDP_ReadHeader Code 0x34192A58 126 4 blto2_FSBL_lto.o
TIM8_TRG_CCU_IRQHandler Code 0x34192AD6 2 2 stm32n657xx_Vectors.o
SFDP_CollectData Code 0x34192AD8 458 4 blto2_FSBL_lto.o
TIM8_CC_IRQHandler Code 0x34192CA2 2 2 stm32n657xx_Vectors.o
SFDP_MemoryReset Code 0x34192CA4 458 4 blto2_FSBL_lto.o
TIM9_IRQHandler Code 0x34192E6E 2 2 stm32n657xx_Vectors.o
JEDEC_Basic_ManageQuadEnableRequirement Code 0x34192E70 338 4 blto2_FSBL_lto.o
TIM10_IRQHandler Code 0x34192FC2 2 2 stm32n657xx_Vectors.o
sfdp_enter_octal_mode Code 0x34192FC4 482 4 blto2_FSBL_lto.o
TIM11_IRQHandler Code 0x341931A6 2 2 stm32n657xx_Vectors.o
driver_check_FlagBUSY Code 0x341931A8 102 4 blto2_FSBL_lto.o
TIM12_IRQHandler Code 0x3419320E 2 2 stm32n657xx_Vectors.o
EXTMEM_DRIVER_NOR_SFDP_Init Code 0x34193210 306 4 blto2_FSBL_lto.o
TIM13_IRQHandler Code 0x34193342 2 2 stm32n657xx_Vectors.o
EXTMEM_DRIVER_NOR_SFDP_Enable_MemoryMappedMode Code 0x34193344 58 4 blto2_FSBL_lto.o
TIM14_IRQHandler Code 0x3419337E 2 2 stm32n657xx_Vectors.o
SAL_XSPI_Init Code 0x34193380 86 4 blto2_FSBL_lto.o
TIM15_IRQHandler Code 0x341933D6 2 2 stm32n657xx_Vectors.o
SAL_XSPI_MemoryConfig Code 0x341933D8 666 4 blto2_FSBL_lto.o
TIM16_IRQHandler Code 0x34193672 2 2 stm32n657xx_Vectors.o
SAL_XSPI_GetSFDP Code 0x34193674 222 4 blto2_FSBL_lto.o
TIM17_IRQHandler Code 0x34193752 2 2 stm32n657xx_Vectors.o
SAL_XSPI_Write Code 0x34193754 138 4 blto2_FSBL_lto.o
TIM18_IRQHandler Code 0x341937DE 2 2 stm32n657xx_Vectors.o
SAL_XSPI_CommandSendReadAddress Code 0x341937E0 190 4 blto2_FSBL_lto.o
LPTIM1_IRQHandler Code 0x3419389E 2 2 stm32n657xx_Vectors.o
SAL_XSPI_DisableMapMode Code 0x341938A0 22 4 blto2_FSBL_lto.o
LPTIM2_IRQHandler Code 0x341938B6 2 2 stm32n657xx_Vectors.o
SAL_XSPI_Abort Code 0x341938B8 18 4 blto2_FSBL_lto.o
LPTIM3_IRQHandler Code 0x341938CA 2 2 stm32n657xx_Vectors.o
EXTMEM_Init Code 0x341938CC 94 4 blto2_FSBL_lto.o
LPTIM4_IRQHandler Code 0x3419392A 2 2 stm32n657xx_Vectors.o
EXTMEM_DeInit Code 0x3419392C 78 4 blto2_FSBL_lto.o
LPTIM5_IRQHandler Code 0x3419397A 2 2 stm32n657xx_Vectors.o
__aeabi_f2ulz Code 0x3419397C 62 4 floatasmops_arm.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
ADF1_FLT0_IRQHandler Code 0x341939BA 2 2 stm32n657xx_Vectors.o
__aeabi_uldivmod Code 0x341939BC 302 4 intasmops_arm.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
MDF1_FLT0_IRQHandler Code 0x34193AEA 2 2 stm32n657xx_Vectors.o
MDF1_FLT1_IRQHandler Code 0x34193AEC 2 2 stm32n657xx_Vectors.o
MDF1_FLT2_IRQHandler Code 0x34193AEE 2 2 stm32n657xx_Vectors.o
MDF1_FLT3_IRQHandler Code 0x34193AF0 2 2 stm32n657xx_Vectors.o
MDF1_FLT4_IRQHandler Code 0x34193AF2 2 2 stm32n657xx_Vectors.o
MDF1_FLT5_IRQHandler Code 0x34193AF4 2 2 stm32n657xx_Vectors.o
SAI1_A_IRQHandler Code 0x34193AF6 2 2 stm32n657xx_Vectors.o
SAI1_B_IRQHandler Code 0x34193AF8 2 2 stm32n657xx_Vectors.o
SAI2_A_IRQHandler Code 0x34193AFA 2 2 stm32n657xx_Vectors.o
SAI2_B_IRQHandler Code 0x34193AFC 2 2 stm32n657xx_Vectors.o
SPDIFRX_IRQHandler Code 0x34193AFE 2 2 stm32n657xx_Vectors.o
SPI1_IRQHandler Code 0x34193B00 2 2 stm32n657xx_Vectors.o
SPI2_IRQHandler Code 0x34193B02 2 2 stm32n657xx_Vectors.o
SPI3_IRQHandler Code 0x34193B04 2 2 stm32n657xx_Vectors.o
SPI4_IRQHandler Code 0x34193B06 2 2 stm32n657xx_Vectors.o
SPI5_IRQHandler Code 0x34193B08 2 2 stm32n657xx_Vectors.o
SPI6_IRQHandler Code 0x34193B0A 2 2 stm32n657xx_Vectors.o
USART1_IRQHandler Code 0x34193B0C 2 2 stm32n657xx_Vectors.o
USART2_IRQHandler Code 0x34193B0E 2 2 stm32n657xx_Vectors.o
USART3_IRQHandler Code 0x34193B10 2 2 stm32n657xx_Vectors.o
UART4_IRQHandler Code 0x34193B12 2 2 stm32n657xx_Vectors.o
UART5_IRQHandler Code 0x34193B14 2 2 stm32n657xx_Vectors.o
USART6_IRQHandler Code 0x34193B16 2 2 stm32n657xx_Vectors.o
UART7_IRQHandler Code 0x34193B18 2 2 stm32n657xx_Vectors.o
UART8_IRQHandler Code 0x34193B1A 2 2 stm32n657xx_Vectors.o
UART9_IRQHandler Code 0x34193B1C 2 2 stm32n657xx_Vectors.o
USART10_IRQHandler Code 0x34193B1E 2 2 stm32n657xx_Vectors.o
LPUART1_IRQHandler Code 0x34193B20 2 2 stm32n657xx_Vectors.o
XSPI1_IRQHandler Code 0x34193B22 2 2 stm32n657xx_Vectors.o
XSPI2_IRQHandler Code 0x34193B24 2 2 stm32n657xx_Vectors.o
XSPI3_IRQHandler Code 0x34193B26 2 2 stm32n657xx_Vectors.o
FMC_IRQHandler Code 0x34193B28 2 2 stm32n657xx_Vectors.o
SDMMC1_IRQHandler Code 0x34193B2A 2 2 stm32n657xx_Vectors.o
SDMMC2_IRQHandler Code 0x34193B2C 2 2 stm32n657xx_Vectors.o
UCPD1_IRQHandler Code 0x34193B2E 2 2 stm32n657xx_Vectors.o
USB1_OTG_HS_IRQHandler Code 0x34193B30 2 2 stm32n657xx_Vectors.o
USB2_OTG_HS_IRQHandler Code 0x34193B32 2 2 stm32n657xx_Vectors.o
ETH1_IRQHandler Code 0x34193B34 2 2 stm32n657xx_Vectors.o
FDCAN1_IT0_IRQHandler Code 0x34193B36 2 2 stm32n657xx_Vectors.o
FDCAN1_IT1_IRQHandler Code 0x34193B38 2 2 stm32n657xx_Vectors.o
FDCAN2_IT0_IRQHandler Code 0x34193B3A 2 2 stm32n657xx_Vectors.o
FDCAN2_IT1_IRQHandler Code 0x34193B3C 2 2 stm32n657xx_Vectors.o
FDCAN3_IT0_IRQHandler Code 0x34193B3E 2 2 stm32n657xx_Vectors.o
FDCAN3_IT1_IRQHandler Code 0x34193B40 2 2 stm32n657xx_Vectors.o
FDCAN_CU_IRQHandler Code 0x34193B42 2 2 stm32n657xx_Vectors.o
MDIOS_IRQHandler Code 0x34193B44 2 2 stm32n657xx_Vectors.o
DCMI_PSSI_IRQHandler Code 0x34193B46 2 2 stm32n657xx_Vectors.o
WAKEUP_PIN_IRQHandler Code 0x34193B48 2 2 stm32n657xx_Vectors.o
CTI_INT0_IRQHandler Code 0x34193B4A 2 2 stm32n657xx_Vectors.o
CTI_INT1_IRQHandler Code 0x34193B4C 2 2 stm32n657xx_Vectors.o
LTDC_UP_IRQHandler Code 0x34193B4E 2 2 stm32n657xx_Vectors.o
LTDC_UP_ERR_IRQHandler Code 0x34193B50 2 2 stm32n657xx_Vectors.o
fwrite Code 0x34193B52 46 2 fileops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_float32_isnan Code 0x34193B80 14 2 floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_float32_isinf Code 0x34193B8E 18 2 floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
ldexpf Code 0x34193BA0 54 2 floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_pow10f Code 0x34193BD6 58 2 utilops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_prin_flush Code 0x34193C10 26 2 prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_stream_write Code 0x34193C2A 10 2 prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_X_file_write Code 0x34193C34 6 2 prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
_DoInit Code 0x34193C3A 98 2 SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
_GetAvailWriteSpace Code 0x34193C9C 22 2 SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
_WriteNoCheck Code 0x34193CB2 58 2 SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
strlen Code 0x34193CEC 42 2 strops.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_current_locale Code 0x34193D16 26 2 mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_ascii_wctomb Code 0x34193D30 14 2 mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
SFDP_BuildGenericDriver.block_erase_unit Cnst 0x34193D3E 8 2 blto2_FSBL_lto.o
__SEGGER_RTL_float32_isnormal Code 0x34193D46 24 2 floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_float32_signbit Code 0x34193D5E 8 2 floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
frexpf Code 0x34193D66 36 2 floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
abs Code 0x34193D8A 8 2 intops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_putc Code 0x34193D92 132 2 prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_print_padding Code 0x34193E16 32 2 prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_pre_padding Code 0x34193E36 20 2 prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
vfprintf Code 0x34193E4A 28 2 prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
vfprintf_l Code 0x34193E66 104 2 prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
printf Code 0x34193ECE 44 2 prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_X_file_stat Code 0x34193EFA 52 2 prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_X_file_bufsize Code 0x34193F2E 4 2 prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
_WriteBlocking Code 0x34193F32 88 2 SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
SEGGER_RTT_WriteNoLock Code 0x34193F8A 88 2 SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
SEGGER_RTT_Write Code 0x34193FE2 40 2 SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
strnlen Code 0x3419400A 92 2 strops.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_ascii_mbtowc Code 0x34194066 48 2 mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_ascii_isctype Code 0x34194096 32 2 mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
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__SEGGER_RTL_ascii_iswctype Code 0x341940CE 32 2 mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
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[.rodata.libc..L.str] Cnst 0x34194106 7 1 __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_c_locale_month_names Cnst 0x3419410D 87 1 mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_c_locale_am_pm_indicator Cnst 0x34194164 7 1 mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_c_locale_date_time_format Cnst 0x3419416B 15 1 mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
[.rodata..L.str.20] Cnst 0x3419417A 106 1 blto2_FSBL_lto.o
[.rodata..L.str.33] Cnst 0x341941E4 106 1 blto2_FSBL_lto.o
[.rodata..L.str.98] Cnst 0x3419424E 106 1 blto2_FSBL_lto.o
__SEGGER_RTL_c_locale_day_names Cnst 0x341942B8 58 1 mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
[.rodata.libc..L.str] Cnst 0x341942F2 2 1 mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_data_utf8_period Cnst 0x341942F4 2 1 mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
[.rodata..L.str] Cnst 0x341942F6 25 1 blto2_FSBL_lto.o
[.rodata..L.str.50] Cnst 0x3419430F 105 1 blto2_FSBL_lto.o
[.rodata.libc..L.str.1] Cnst 0x34194378 5 1 __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
[.rodata.libc..L.str.2] Cnst 0x3419437D 5 1 __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
[.rodata.libc..L.str.3] Cnst 0x34194382 5 1 __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
[.rodata.libc..L.str.4] Cnst 0x34194387 5 1 __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
_DoInit._aInitStr Cnst 0x3419438C 17 1 SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
[.rodata.libc..L.str] Cnst 0x3419439D 9 1 SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_c_locale_date_format Cnst 0x341943A6 9 1 mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_c_locale_time_format Cnst 0x341943AF 9 1 mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_c_locale_abbrev_day_names Cnst 0x341943B8 29 1 mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_c_locale_abbrev_month_names Cnst 0x341943D5 49 1 mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_data_empty_string Cnst 0x34194406 1 1 mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_ascii_ctype_mask Cnst 0x34194407 13 1 mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
[.init_array] ---- 0x34194414 4 4 STM32N6xx_Startup.o
[.rodata.block.tdata.copy] Cnst 0x34194414 1 [ Linker created ]
[.rodata..L.str.23] Cnst 0x34194418 108 1 blto2_FSBL_lto.o
[.rodata..L.str.41] Cnst 0x34194484 108 1 blto2_FSBL_lto.o
[.rodata..L.str.58] Cnst 0x341944F0 108 1 blto2_FSBL_lto.o
__SEGGER_RTL_hex_uc Cnst 0x3419455C 16 1 prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_hex_lc Cnst 0x3419456C 16 1 prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
[.rodata.libc..L.str.5] Cnst 0x3419457C 4 1 __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
[.rodata.libc..L.str.6] Cnst 0x34194580 4 1 __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_ascii_ctype_map Cnst 0x34194584 128 1 mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_init_ctors Code 0x34194604 36 4 SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_init_table__ Cnst 0x34194628 36 4 [ Linker created ]
__SEGGER_init_data__ Cnst 0x3419464C 44 4 [ Linker created ]
__SEGGER_init_zero Code 0x34194678 18 2 SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_init_copy Code 0x3419468A 20 2 SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)

"<#16> at line 134, col 45": place in [0x34000000 to 0x34063FFF] with auto order

Symbol or [section] name Type Address Size Align Object File
extmem_list_config Zero 0x34000000 172 4 blto2_FSBL_lto.o
_SEGGER_RTT Zero 0x340000AC 168 4 SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
sfdp_param_info Zero 0x34000154 120 4 blto2_FSBL_lto.o
JEDEC_SCCR_Map Zero 0x340001CC 112 4 blto2_FSBL_lto.o
hxspi2 Zero 0x3400023C 100 4 blto2_FSBL_lto.o
JEDEC_Basic Zero 0x340002A0 96 4 blto2_FSBL_lto.o
JEDEC_OctalDdr Zero 0x34000300 32 4 blto2_FSBL_lto.o
JEDEC_XSPI10 Zero 0x34000320 24 4 blto2_FSBL_lto.o
JEDEC_Address4Bytes Zero 0x34000338 8 4 blto2_FSBL_lto.o
uwTick Zero 0x34000340 4 4 blto2_FSBL_lto.o
__SEGGER_RTL_stdout_file Zero 0x34000344 4 4 prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_stdin_file Zero 0x34000348 4 4 prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_stderr_file Zero 0x3400034C 4 4 prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_locale_ptr Zero 0x34000350 4 4 mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
JumpToApplication.JumpToApp Zero 0x34000354 4 4 blto2_FSBL_lto.o
_acUpBuffer Zero 0x34000358 1 024 1 SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
_acDownBuffer Zero 0x34000758 16 1 SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_global_locale Init 0x34000768 20 4 mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
uwTickPrio Init 0x3400077C 4 4 blto2_FSBL_lto.o
stdout Init 0x34000780 4 4 prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
stdin Init 0x34000784 4 4 prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
stderr Init 0x34000788 4 4 prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
SystemCoreClock Init 0x3400078C 4 4 blto2_FSBL_lto.o
uwTickFreq Init 0x34000790 1 1 blto2_FSBL_lto.o
[.bss.block.heap] None 0x34000798 8 [ Linker created ]
[.bss.block.stack] None 0x34062000 8 192 8 [ Linker created ]

"<#17> at line 138, col 45": place in [0x34000000 to 0x34063FFF] with auto order

Symbol or [section] name Type Address Size Align Object File
[.bss.block.heap] None 0x34000798 8 [ Linker created ]

MODULE SUMMARY

Memory use by input file

Object File RX Code RO Data RW Data ZI Data
blto2_FSBL_lto.o 73 968 822 9 672
SEGGER_THUMB_Startup.o 20
stm32n657xx_Vectors.o 1 216
STM32N6xx_Startup.o 68
Subtotal (4 objects) 75 272 822 9 672
libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a 4 534 251
mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a 200 541 20 4
prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a 456 26 12 1 220
SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a 74
strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a 330
Subtotal (5archives) 5 594 818 32 1 224
Linker created (shared data, fills, blocks): 80 8 192
Total: 80 866 1 720 41 10 088

Memory use by archive member

Archive member RX Code RO Data RW Data ZI Data
__SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) 3 036 35
fileops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) 46
floatasmops_arm.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) 146
floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) 542
intasmops_arm.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) 302
intops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) 8
mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) 200 541 20 4
prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) 396 192
prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) 62 12 12
SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) 74
SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) 394 26 1 208
strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) 196
strops.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) 134
utilops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) 58 24
Subtotal (14 members from 5 archives) 5 594 818 32 1 224
Objects (4 files) 75 272 822 9 672
Linker created (shared data, fills, blocks): 80 8 192
Total: 80 866 1 720 41 10 088

Memory use by linker

Description RX Code RO Data RW Data ZI Data
Initialization table 80
Memory for block 'stack' 8 192
Subtotal (linker created): 80 8 192
Objects (4 files) 75 272 822 9 672
Archives (5 files) 5 594 818 32 1 224
Total: 80 866 1 720 41 10 088

MODULE DETAIL

Module blto2_FSBL_lto.o

Symbol or [section] name Code RO Data RW Data ZI Data
HAL_RCCEx_PeriphCLKConfig 24 268
SFDP_BuildGenericDriver 3 092
HAL_RCC_OscConfig 2 810
HAL_RCC_ClockConfig 2 498
HAL_GPIO_Init 1 928
HAL_RCCEx_GetPeriphCLKFreq 1 626
HAL_XSPI_Init 1 548
RCCEx_GetSPICLKFreq 1 196
HAL_XSPI_Command 1 106
XSPI_ConfigCmd 924
RCCEx_GetUSARTCLKFreq 916
RCCEx_GetUARTCLKFreq 916
HAL_XSPIM_Config 878
RCC_PLL_Config 846
SystemCoreClockUpdate 828
RCCEx_GetCLKPCLKFreq 736
RCCEx_GetI2CCLKFreq 706
RCCEx_GetLPTIMCLKFreq 706
SAL_XSPI_MemoryConfig 666
sfdp_get_paraminfo 652
RCCEx_GetSAICLKFreq 606
RCCEx_GetI3CCLKFreq 516
SystemInit 510
sfdp_enter_octal_mode 482
SFDP_CollectData 458
SFDP_MemoryReset 458
RCCEx_GetXSPICLKFreq 452
RCCEx_GetADCCLKFreq 438
RCCEx_GetMDFCLKFreq 436
sfdp_set_dummycycle 420
RCCEx_GetLPUARTCLKFreq 412
HAL_XSPI_AutoPolling 406
RCCEx_GetSDMMCCLKFreq 396
RCCEx_GetADFCLKFreq 388
RCCEx_GetSPDIFRXCLKFreq 372
main 360
JumpToApplication 356
HAL_BSEC_OTP_Program 342
JEDEC_Basic_ManageQuadEnableRequirement 338
HAL_XSPI_MemoryMapped 330
HAL_XSPI_MspInit 324
RCCEx_GetOTGPHYCLKFreq 324
RCCEx_GetFMCCLKFreq 314
EXTMEM_DRIVER_NOR_SFDP_Init 306
HAL_XSPI_Receive 300
SFDP_GetHeader 256
SystemClock_Config 254
HAL_BSEC_OTP_Reload 250
HAL_XSPI_Abort 246
HAL_DMA_Abort 244
HAL_RCC_GetClockConfig 240
HAL_RCC_GetCpuClockFreq 238
RCC_IC_CheckPLLSources 234
RCC_GetSysClockFreq 232
SAL_XSPI_CheckStatusRegister 232
RCCEx_GetDCMIPPCLKFreq 228
RCCEx_GetLTDCCLKFreq 228
HAL_PWREx_ConfigVddIORange 226
HAL_XSPI_Transmit 226
RCCEx_GetETH1PTPCLKFreq 222
SAL_XSPI_GetSFDP 222
RCC_PLL_IsNewConfig 218
RCCEx_GetPSSICLKFreq 218
RCCEx_GetETH1CLKFreq 216
XSPIM_GetConfig 210
RCCEx_GetFDCANCLKFreq 206
SAL_XSPI_EnableMapMode 200
EXTMEM_GetMapAddress 196
SAL_XSPI_CommandSendReadAddress 190
HAL_NVIC_SetPriority 168
SAL_XSPI_GetId 152
RCCEx_GetOTGPHYCKREFCLKFreq 148
OTP_Config 142
RCCEx_GetPLLSourceFreq 140
EXTMEM_MemoryMappedMode 140
SAL_XSPI_Write 138
RCCEx_CalcPLLFreq 136
SAL_XSPI_CommandSendData 136
SAL_XSPI_SendReadCommand 136
MX_GPIO_Init 134
RCCEx_GetCSICLKFreq 134
JEDEC_Basic_Manage4S4S4SEnableSequence 132
HAL_RCCEx_GetPLL1CLKFreq 130
HAL_RCCEx_GetPLL2CLKFreq 130
HAL_RCCEx_GetPLL3CLKFreq 130
HAL_RCCEx_GetPLL4CLKFreq 130
MX_XSPI2_Init 126
HAL_InitTick 126
RCCEx_GetRTCCLKFreq 126
SFDP_ReadHeader 126
HAL_BSEC_OTP_Read 124
SAL_XSPI_SetClock 116
SAL_XSPI_UpdateMemoryType 116
HAL_PWREx_ConfigSupply 114
HAL_PWREx_ControlVoltageScaling 114
XSPI_WaitFlagStateUntilTimeout 104
HAL_GPIO_WritePin 102
driver_check_FlagBUSY 102
NVIC_EncodePriority 100
RCC_PLL_Enable 94
MapMemory 94
EXTMEM_Init 94
XSPI_FormatCommand 88
SAL_XSPI_Init 86
RCC_PLL_Source_IsReady 84
CheckSFDP_Signature 80
SysTick_Config 78
EXTMEM_DeInit 78
sfdp_getfrequencevalue 64
MX_EXTMEM_MANAGER_Init 62
HAL_NVIC_SetPriorityGrouping 62
__NVIC_SetPriority 62
__NVIC_SetPriorityGrouping 60
HAL_Delay 58
EXTMEM_DRIVER_NOR_SFDP_Enable_MemoryMappedMode 58
LL_RCC_SetClockSource 52
HAL_Init 48
LL_RCC_GetClockSource 48
EXTMEM_DRIVER_NOR_SFDP_Disable_MemoryMappedMode 36
LL_AHB4_GRP1_EnableClock 34
LL_APB4_GRP2_EnableClock 34
LL_APB4_GRP2_EnableClock.7 34
LL_AHB4_GRP1_EnableClock.8 34
LL_AHB5_GRP1_EnableClock 34
BOOT_Application 34
XSPI_Transmit 32
LL_RCC_HSI_SetCalibTrimming 30
LL_RCC_MSI_SetCalibTrimming 30
LL_RCC_SetTIMPrescaler 30
LL_RCC_HSI_SetDivider 28
LL_RCC_MSI_SetFrequency 28
LL_RCC_SetRTC_HSEPrescaler 28
LL_RCC_SetRTCClockSource 28
LL_RCC_SetCLKPClockSource 28
LL_RCC_SetFMCClockSource 28
LL_RCC_SetADFClockSource 28
LL_RCC_SetDCMIPPClockSource 28
LL_RCC_SetETHClockSource 28
LL_RCC_SetETHPHYInterface 28
LL_RCC_SetETHREFRXClockSource 28
LL_RCC_SetETHREFTXClockSource 28
LL_RCC_SetFDCANClockSource 28
LL_RCC_SetLPUARTClockSource 28
LL_RCC_SetLTDCClockSource 28
LL_RCC_SetMDFClockSource 28
LL_RCC_SetPSSIClockSource 28
LL_RCC_SetSPDIFRXClockSource 28
RCCEx_GetHCLKFreq 28
RCCEx_GetPCLK1Freq 28
RCCEx_GetPCLK2Freq 28
RCCEx_GetPCLK4Freq 28
RCCEx_GetPCLK5Freq 28
LL_AHB5_GRP1_IsEnabledClock 28
HAL_IncTick 26
HAL_RCC_GetSysClockFreq 26
LL_RCC_IC1_GetDivider 22
LL_RCC_IC2_GetDivider 22
LL_RCC_GetADCClockSource 22
LL_RCC_GetADFClockSource 22
LL_RCC_GetCLKPClockSource 22
LL_RCC_GetDCMIPPClockSource 22
LL_RCC_GetETHClockSource 22
LL_RCC_GetETHPTPClockSource 22
LL_RCC_GetFDCANClockSource 22
LL_RCC_GetFMCClockSource 22
LL_RCC_GetLPUARTClockSource 22
LL_RCC_GetLTDCClockSource 22
LL_RCC_GetMDFClockSource 22
LL_RCC_GetPSSIClockSource 22
LL_RCC_GetSPDIFRXClockSource 22
LL_RCC_IC3_GetDivider 22
LL_RCC_IC4_GetDivider 22
LL_RCC_IC15_GetDivider 22
LL_RCC_IC9_GetDivider 22
LL_RCC_IC14_GetDivider 22
LL_RCC_IC8_GetDivider 22
LL_RCC_IC7_GetDivider 22
LL_RCC_IC5_GetDivider 22
LL_RCC_IC20_GetDivider 22
LL_RCC_IC16_GetDivider 22
LL_RCC_IC10_GetDivider 22
LL_RCC_IC19_GetDivider 22
LL_RCC_IC13_GetDivider 22
LL_RCC_IC12_GetDivider 22
LL_RCC_IC17_GetDivider 22
LL_RCC_IC18_GetDivider 22
SAL_XSPI_DisableMapMode 22
HAL_SuspendTick 18
HAL_PWREx_EnableVddIO3 18
LL_RCC_HSE_SelectHSEDiv2AsDiv2Clock 18
LL_RCC_HSE_SelectHSEAsDiv2Clock 18
HAL_XSPI_SetTimeout 18
SAL_XSPI_Abort 18
__NVIC_GetPriorityGrouping 16
HAL_SYSTICK_Config 16
LL_RCC_HSI_IsReady 16
LL_RCC_GetCpuClkSource 16
LL_RCC_GetSysClkSource 16
LL_RCC_PLL1_GetSource 16
LL_RCC_PLL2_GetSource 16
LL_RCC_PLL3_GetSource 16
LL_RCC_PLL4_GetSource 16
LL_RCC_MSI_IsReady 16
LL_RCC_LSI_IsReady 16
LL_RCC_LSE_IsReady 16
LL_RCC_PLL1_IsReady 16
LL_RCC_IC1_GetSource 16
LL_RCC_IC2_GetSource 16
LL_RCC_IC6_GetSource 16
LL_RCC_IC11_GetSource 16
LL_RCC_PLL2_IsReady 16
LL_RCC_PLL3_IsReady 16
LL_RCC_PLL4_IsReady 16
LL_RCC_HSE_IsReady 16
LL_RCC_HSI_GetDivider 16
LL_RCC_PLL1_IsEnabledBypass 16
LL_RCC_PLL2_IsEnabledBypass 16
LL_RCC_PLL3_IsEnabledBypass 16
LL_RCC_PLL4_IsEnabledBypass 16
LL_RCC_GetRTCClockSource 16
LL_RCC_LSE_IsReady.59 16
LL_RCC_IC10_Enable.61 16
LL_RCC_IC15_Enable.62 16
LL_RCC_IC19_Enable 16
LL_RCC_IC20_Enable.63 16
LL_RCC_SetXSPIClockSource 16
LL_RCC_SetSDMMCClockSource 16
LL_RCC_IC18_Enable 16
LL_RCC_IC17_Enable 16
LL_RCC_IC12_Enable 16
LL_RCC_IC13_Enable 16
LL_RCC_SetI2CClockSource 16
LL_RCC_SetI3CClockSource 16
LL_RCC_SetLPTIMClockSource 16
LL_RCC_IC9_Enable 16
LL_RCC_IC14_Enable 16
LL_RCC_IC16_Enable 16
LL_RCC_SetSAIClockSource 16
LL_RCC_SetSPIClockSource 16
LL_RCC_SetUSARTClockSource 16
LL_RCC_SetOTGPHYClockSource 16
LL_RCC_SetOTGPHYCKREFClockSource 16
LL_RCC_GetADCPrescaler 16
LL_RCC_GetETH1PTPDivider 16
LL_RCC_GetI2CClockSource 16
LL_RCC_GetI3CClockSource 16
LL_RCC_GetLPTIMClockSource 16
LL_RCC_GetSAIClockSource 16
LL_RCC_GetSDMMCClockSource 16
LL_RCC_GetSPIClockSource 16
LL_RCC_GetTIMPrescaler 16
LL_RCC_GetUSARTClockSource 16
LL_RCC_HSE_IsSelectedHSEDiv2AsDiv2Clock 16
LL_RCC_GetXSPIClockSource 16
LL_RCC_IC3_IsEnabled 16
LL_RCC_IC3_GetSource 16
LL_RCC_IC4_IsEnabled 16
LL_RCC_IC4_GetSource 16
LL_RCC_PLL4_IsReady.74 16
LL_RCC_PLL4P_IsEnabled 16
LL_RCC_PLL4_GetSource.75 16
LL_RCC_PLL4_GetM 16
LL_RCC_PLL4_GetN 16
LL_RCC_PLL4_GetFRACN 16
LL_RCC_PLL4_GetP1 16
LL_RCC_PLL4_GetP2 16
LL_RCC_PLL4_IsEnabledBypass.76 16
LL_RCC_HSI_IsReady.77 16
LL_RCC_HSI_GetDivider.78 16
LL_RCC_MSI_IsReady.79 16
LL_RCC_MSI_GetFrequency 16
LL_RCC_HSE_IsReady.80 16
LL_RCC_PLL3_IsReady.81 16
LL_RCC_PLL3P_IsEnabled 16
LL_RCC_PLL3_GetSource.82 16
LL_RCC_PLL3_GetM 16
LL_RCC_PLL3_GetN 16
LL_RCC_PLL3_GetFRACN 16
LL_RCC_PLL3_GetP1 16
LL_RCC_PLL3_GetP2 16
LL_RCC_PLL3_IsEnabledBypass.83 16
LL_RCC_PLL2_IsReady.84 16
LL_RCC_PLL2P_IsEnabled 16
LL_RCC_PLL2_GetSource.85 16
LL_RCC_PLL2_GetM 16
LL_RCC_PLL2_GetN 16
LL_RCC_PLL2_GetFRACN 16
LL_RCC_PLL2_GetP1 16
LL_RCC_PLL2_GetP2 16
LL_RCC_PLL2_IsEnabledBypass.86 16
LL_RCC_PLL1_IsReady.87 16
LL_RCC_PLL1P_IsEnabled 16
LL_RCC_PLL1_GetSource.88 16
LL_RCC_PLL1_GetM 16
LL_RCC_PLL1_GetN 16
LL_RCC_PLL1_GetFRACN 16
LL_RCC_PLL1_GetP1 16
LL_RCC_PLL1_GetP2 16
LL_RCC_PLL1_IsEnabledBypass.89 16
LL_RCC_GetAHBPrescaler.90 16
LL_RCC_GetUSBClockSource 16
LL_RCC_IC15_IsEnabled 16
LL_RCC_IC15_GetSource 16
LL_RCC_GetUARTClockSource 16
LL_RCC_IC9_IsEnabled 16
LL_RCC_IC9_GetSource 16
LL_RCC_IC14_IsEnabled 16
LL_RCC_IC14_GetSource 16
LL_RCC_GetAPB2Prescaler.91 16
LL_RCC_GetAPB1Prescaler.92 16
LL_RCC_IC8_IsEnabled 16
LL_RCC_IC8_GetSource 16
LL_RCC_GetAPB4Prescaler.93 16
LL_RCC_IC7_IsEnabled 16
LL_RCC_IC7_GetSource 16
LL_RCC_IC5_IsEnabled 16
LL_RCC_IC5_GetSource 16
LL_RCC_LSI_IsReady.94 16
LL_RCC_IC20_IsEnabled 16
LL_RCC_IC20_GetSource 16
LL_RCC_IC16_IsEnabled 16
LL_RCC_IC16_GetSource 16
LL_RCC_GetAPB5Prescaler.95 16
LL_RCC_IC10_IsEnabled 16
LL_RCC_IC10_GetSource 16
LL_RCC_IC19_IsEnabled 16
LL_RCC_IC19_GetSource 16
LL_RCC_IC13_IsEnabled 16
LL_RCC_IC13_GetSource 16
LL_RCC_IC12_IsEnabled 16
LL_RCC_IC12_GetSource 16
LL_RCC_IC17_IsEnabled 16
LL_RCC_IC17_GetSource 16
LL_RCC_CLKP_IsEnabled 16
LL_RCC_IC18_IsEnabled 16
LL_RCC_IC18_GetSource 16
EXTMEM_DRIVER_NOR_SFDP_DeInit 16
LL_RCC_HSI_Enable 14
LL_RCC_HSI_Disable 14
LL_RCC_MSI_Enable 14
LL_RCC_MSI_Disable 14
LL_RCC_LSI_Enable 14
LL_RCC_LSI_Disable 14
LL_RCC_IC1_Enable 14
LL_RCC_IC5_Enable.60 14
LL_RCC_IC3_Enable 14
LL_RCC_IC4_Enable 14
LL_RCC_CLKP_Enable 14
LL_RCC_IC7_Enable 14
LL_RCC_IC8_Enable 14
HAL_GetTick 12
assert_failed 10
HAL_MspInit 8
SysTick_Handler 8
Error_Handler 4
MX_BSEC_Init 2
NMI_Handler 2
HardFault_Handler 2
MemManage_Handler 2
BusFault_Handler 2
UsageFault_Handler 2
SVC_Handler 2
DebugMon_Handler 2
PendSV_Handler 2
[.rodata..L.str.23] 108
[.rodata..L.str.41] 108
[.rodata..L.str.58] 108
[.rodata..L.str.20] 106
[.rodata..L.str.33] 106
[.rodata..L.str.98] 106
[.rodata..L.str.50] 105
[.rodata..L__const.sfdp_getfrequencevalue.freqMhz_table] 26
[.rodata..L.str] 25
SFDP_BuildGenericDriver.chip_erase_unit 16
SFDP_BuildGenericDriver.block_erase_unit 8
SystemCoreClock 4
uwTickPrio 4
uwTickFreq 1
extmem_list_config 172
sfdp_param_info 120
JEDEC_SCCR_Map 112
hxspi2 100
JEDEC_Basic 96
JEDEC_OctalDdr 32
JEDEC_XSPI10 24
JEDEC_Address4Bytes 8
uwTick 4
JumpToApplication.JumpToApp 4
Total: 73 968 822 9 672

Module SEGGER_THUMB_Startup.o

Symbol or [section] name Code RO Data RW Data ZI Data
_start 20
Total: 20

Module stm32n657xx_Vectors.o

Symbol or [section] name Code RO Data RW Data ZI Data
_vectors 844
PVD_PVM_IRQHandler 2
DTS_IRQHandler 2
RCC_IRQHandler 2
LOCKUP_IRQHandler 2
CACHE_ECC_IRQHandler 2
TCM_ECC_IRQHandler 2
BCK_ECC_IRQHandler 2
FPU_IRQHandler 2
RTC_S_IRQHandler 2
TAMP_IRQHandler 2
RIFSC_TAMPER_IRQHandler 2
IAC_IRQHandler 2
RCC_S_IRQHandler 2
RTC_IRQHandler 2
IWDG_IRQHandler 2
WWDG_IRQHandler 2
EXTI0_IRQHandler 2
EXTI1_IRQHandler 2
EXTI2_IRQHandler 2
EXTI3_IRQHandler 2
EXTI4_IRQHandler 2
EXTI5_IRQHandler 2
EXTI6_IRQHandler 2
EXTI7_IRQHandler 2
EXTI8_IRQHandler 2
EXTI9_IRQHandler 2
EXTI10_IRQHandler 2
EXTI11_IRQHandler 2
EXTI12_IRQHandler 2
EXTI13_IRQHandler 2
EXTI14_IRQHandler 2
EXTI15_IRQHandler 2
SAES_IRQHandler 2
CRYP_IRQHandler 2
PKA_IRQHandler 2
HASH_IRQHandler 2
RNG_IRQHandler 2
MCE1_IRQHandler 2
MCE2_IRQHandler 2
MCE3_IRQHandler 2
MCE4_IRQHandler 2
ADC1_2_IRQHandler 2
CSI_IRQHandler 2
DCMIPP_IRQHandler 2
PAHB_ERR_IRQHandler 2
NPU0_IRQHandler 2
NPU1_IRQHandler 2
NPU2_IRQHandler 2
NPU3_IRQHandler 2
CACHEAXI_IRQHandler 2
LTDC_LO_IRQHandler 2
LTDC_LO_ERR_IRQHandler 2
DMA2D_IRQHandler 2
JPEG_IRQHandler 2
VENC_IRQHandler 2
GFXMMU_IRQHandler 2
GFXTIM_IRQHandler 2
GPU2D_IRQHandler 2
GPU2D_ER_IRQHandler 2
ICACHE_IRQHandler 2
HPDMA1_Channel0_IRQHandler 2
HPDMA1_Channel1_IRQHandler 2
HPDMA1_Channel2_IRQHandler 2
HPDMA1_Channel3_IRQHandler 2
HPDMA1_Channel4_IRQHandler 2
HPDMA1_Channel5_IRQHandler 2
HPDMA1_Channel6_IRQHandler 2
HPDMA1_Channel7_IRQHandler 2
HPDMA1_Channel8_IRQHandler 2
HPDMA1_Channel9_IRQHandler 2
HPDMA1_Channel10_IRQHandler 2
HPDMA1_Channel11_IRQHandler 2
HPDMA1_Channel12_IRQHandler 2
HPDMA1_Channel13_IRQHandler 2
HPDMA1_Channel14_IRQHandler 2
HPDMA1_Channel15_IRQHandler 2
GPDMA1_Channel0_IRQHandler 2
GPDMA1_Channel1_IRQHandler 2
GPDMA1_Channel2_IRQHandler 2
GPDMA1_Channel3_IRQHandler 2
GPDMA1_Channel4_IRQHandler 2
GPDMA1_Channel5_IRQHandler 2
GPDMA1_Channel6_IRQHandler 2
GPDMA1_Channel7_IRQHandler 2
GPDMA1_Channel8_IRQHandler 2
GPDMA1_Channel9_IRQHandler 2
GPDMA1_Channel10_IRQHandler 2
GPDMA1_Channel11_IRQHandler 2
GPDMA1_Channel12_IRQHandler 2
GPDMA1_Channel13_IRQHandler 2
GPDMA1_Channel14_IRQHandler 2
GPDMA1_Channel15_IRQHandler 2
I2C1_EV_IRQHandler 2
I2C1_ER_IRQHandler 2
I2C2_EV_IRQHandler 2
I2C2_ER_IRQHandler 2
I2C3_EV_IRQHandler 2
I2C3_ER_IRQHandler 2
I2C4_EV_IRQHandler 2
I2C4_ER_IRQHandler 2
I3C1_EV_IRQHandler 2
I3C1_ER_IRQHandler 2
I3C2_EV_IRQHandler 2
I3C2_ER_IRQHandler 2
TIM1_BRK_IRQHandler 2
TIM1_UP_IRQHandler 2
TIM1_TRG_CCU_IRQHandler 2
TIM1_CC_IRQHandler 2
TIM2_IRQHandler 2
TIM3_IRQHandler 2
TIM4_IRQHandler 2
TIM5_IRQHandler 2
TIM6_IRQHandler 2
TIM7_IRQHandler 2
TIM8_BRK_IRQHandler 2
TIM8_UP_IRQHandler 2
TIM8_TRG_CCU_IRQHandler 2
TIM8_CC_IRQHandler 2
TIM9_IRQHandler 2
TIM10_IRQHandler 2
TIM11_IRQHandler 2
TIM12_IRQHandler 2
TIM13_IRQHandler 2
TIM14_IRQHandler 2
TIM15_IRQHandler 2
TIM16_IRQHandler 2
TIM17_IRQHandler 2
TIM18_IRQHandler 2
LPTIM1_IRQHandler 2
LPTIM2_IRQHandler 2
LPTIM3_IRQHandler 2
LPTIM4_IRQHandler 2
LPTIM5_IRQHandler 2
ADF1_FLT0_IRQHandler 2
MDF1_FLT0_IRQHandler 2
MDF1_FLT1_IRQHandler 2
MDF1_FLT2_IRQHandler 2
MDF1_FLT3_IRQHandler 2
MDF1_FLT4_IRQHandler 2
MDF1_FLT5_IRQHandler 2
SAI1_A_IRQHandler 2
SAI1_B_IRQHandler 2
SAI2_A_IRQHandler 2
SAI2_B_IRQHandler 2
SPDIFRX_IRQHandler 2
SPI1_IRQHandler 2
SPI2_IRQHandler 2
SPI3_IRQHandler 2
SPI4_IRQHandler 2
SPI5_IRQHandler 2
SPI6_IRQHandler 2
USART1_IRQHandler 2
USART2_IRQHandler 2
USART3_IRQHandler 2
UART4_IRQHandler 2
UART5_IRQHandler 2
USART6_IRQHandler 2
UART7_IRQHandler 2
UART8_IRQHandler 2
UART9_IRQHandler 2
USART10_IRQHandler 2
LPUART1_IRQHandler 2
XSPI1_IRQHandler 2
XSPI2_IRQHandler 2
XSPI3_IRQHandler 2
FMC_IRQHandler 2
SDMMC1_IRQHandler 2
SDMMC2_IRQHandler 2
UCPD1_IRQHandler 2
USB1_OTG_HS_IRQHandler 2
USB2_OTG_HS_IRQHandler 2
ETH1_IRQHandler 2
FDCAN1_IT0_IRQHandler 2
FDCAN1_IT1_IRQHandler 2
FDCAN2_IT0_IRQHandler 2
FDCAN2_IT1_IRQHandler 2
FDCAN3_IT0_IRQHandler 2
FDCAN3_IT1_IRQHandler 2
FDCAN_CU_IRQHandler 2
MDIOS_IRQHandler 2
DCMI_PSSI_IRQHandler 2
WAKEUP_PIN_IRQHandler 2
CTI_INT0_IRQHandler 2
CTI_INT1_IRQHandler 2
LTDC_UP_IRQHandler 2
LTDC_UP_ERR_IRQHandler 2
Total: 1 216

Module STM32N6xx_Startup.o

Symbol or [section] name Code RO Data RW Data ZI Data
reset_handler 68
Total: 68

Module fileops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)

Symbol or [section] name Code RO Data RW Data ZI Data
fwrite 46
Total: 46

Module floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)

Symbol or [section] name Code RO Data RW Data ZI Data
fmodf 284
floorf 104
ldexpf 54
frexpf 36
__SEGGER_RTL_float32_isnormal 24
__SEGGER_RTL_float32_isinf 18
__SEGGER_RTL_float32_isnan 14
__SEGGER_RTL_float32_signbit 8
Total: 542

Module intops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)

Symbol or [section] name Code RO Data RW Data ZI Data
abs 8
Total: 8

Module utilops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)

Symbol or [section] name Code RO Data RW Data ZI Data
__SEGGER_RTL_pow10f 58
__SEGGER_RTL_aPower2f 24
Total: 58 24

Module floatasmops_arm.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)

Symbol or [section] name Code RO Data RW Data ZI Data
__aeabi_ul2f 84
__aeabi_f2ulz 62
Total: 146

Module intasmops_arm.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)

Symbol or [section] name Code RO Data RW Data ZI Data
__aeabi_uldivmod 302
Total: 302

Module prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)

Symbol or [section] name Code RO Data RW Data ZI Data
__SEGGER_RTL_putc 132
vfprintf_l 104
printf 44
__SEGGER_RTL_print_padding 32
vfprintf 28
__SEGGER_RTL_prin_flush 26
__SEGGER_RTL_pre_padding 20
__SEGGER_RTL_stream_write 10
__SEGGER_RTL_ipow10 160
__SEGGER_RTL_hex_uc 16
__SEGGER_RTL_hex_lc 16
Total: 396 192

Module __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)

Symbol or [section] name Code RO Data RW Data ZI Data
__SEGGER_RTL_vfprintf_short_float_long_long 3 036
[.rodata.libc..L.str] 7
[.rodata.libc..L.str.1] 5
[.rodata.libc..L.str.2] 5
[.rodata.libc..L.str.3] 5
[.rodata.libc..L.str.4] 5
[.rodata.libc..L.str.5] 4
[.rodata.libc..L.str.6] 4
Total: 3 036 35

Module SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)

Symbol or [section] name Code RO Data RW Data ZI Data
__SEGGER_init_ctors 36
__SEGGER_init_copy 20
__SEGGER_init_zero 18
Total: 74

Module prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)

Symbol or [section] name Code RO Data RW Data ZI Data
__SEGGER_RTL_X_file_stat 52
__SEGGER_RTL_X_file_write 6
__SEGGER_RTL_X_file_bufsize 4
stdin 4
stdout 4
stderr 4
__SEGGER_RTL_stdin_file 4
__SEGGER_RTL_stdout_file 4
__SEGGER_RTL_stderr_file 4
Total: 62 12 12

Module SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)

Symbol or [section] name Code RO Data RW Data ZI Data
_DoInit 98
_WriteBlocking 88
SEGGER_RTT_WriteNoLock 88
_WriteNoCheck 58
SEGGER_RTT_Write 40
_GetAvailWriteSpace 22
_DoInit._aInitStr 17
[.rodata.libc..L.str] 9
_acUpBuffer 1 024
_SEGGER_RTT 168
_acDownBuffer 16
Total: 394 26 1 208

Module strops.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)

Symbol or [section] name Code RO Data RW Data ZI Data
strnlen 92
strlen 42
Total: 134

Module strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)

Symbol or [section] name Code RO Data RW Data ZI Data
__aeabi_memclr 104
memcpy 92
Total: 196

Module mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)

Symbol or [section] name Code RO Data RW Data ZI Data
__SEGGER_RTL_ascii_mbtowc 48
__SEGGER_RTL_ascii_isctype 32
__SEGGER_RTL_ascii_iswctype 32
__SEGGER_RTL_current_locale 26
__SEGGER_RTL_ascii_wctomb 14
__SEGGER_RTL_ascii_toupper 12
__SEGGER_RTL_ascii_tolower 12
__SEGGER_RTL_ascii_towupper 12
__SEGGER_RTL_ascii_towlower 12
__SEGGER_RTL_ascii_ctype_map 128
__SEGGER_RTL_c_locale_data 88
__SEGGER_RTL_c_locale_month_names 87
__SEGGER_RTL_c_locale_day_names 58
__SEGGER_RTL_c_locale_abbrev_month_names 49
__SEGGER_RTL_codeset_ascii 32
__SEGGER_RTL_c_locale_abbrev_day_names 29
__SEGGER_RTL_c_locale_date_time_format 15
__SEGGER_RTL_ascii_ctype_mask 13
__SEGGER_RTL_c_locale 12
__SEGGER_RTL_c_locale_date_format 9
__SEGGER_RTL_c_locale_time_format 9
__SEGGER_RTL_c_locale_am_pm_indicator 7
[.rodata.libc..L.str] 2
__SEGGER_RTL_data_utf8_period 2
__SEGGER_RTL_data_empty_string 1
__SEGGER_RTL_global_locale 20
__SEGGER_RTL_locale_ptr 4
Total: 200 541 20 4

All modules

Code RO Data RW Data ZI Data
Grand total: 80 866 1 640 41 1 896

SECTION DETAIL

Sections by address

Range Symbol or [section] Name Size Al Init Ac Object File
34000000-340000AB extmem_list_config 172 4 Zero ZI blto2_FSBL_lto.o
340000AC-34000153 _SEGGER_RTT 168 4 Zero ZI SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34000154-340001CB sfdp_param_info 120 4 Zero ZI blto2_FSBL_lto.o
340001CC-3400023B JEDEC_SCCR_Map 112 4 Zero ZI blto2_FSBL_lto.o
3400023C-3400029F hxspi2 100 4 Zero ZI blto2_FSBL_lto.o
340002A0-340002FF JEDEC_Basic 96 4 Zero ZI blto2_FSBL_lto.o
34000300-3400031F JEDEC_OctalDdr 32 4 Zero ZI blto2_FSBL_lto.o
34000320-34000337 JEDEC_XSPI10 24 4 Zero ZI blto2_FSBL_lto.o
34000338-3400033F JEDEC_Address4Bytes 8 4 Zero ZI blto2_FSBL_lto.o
34000340-34000343 uwTick 4 4 Zero ZI blto2_FSBL_lto.o
34000344-34000347 __SEGGER_RTL_stdout_file 4 4 Zero ZI prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34000348-3400034B __SEGGER_RTL_stdin_file 4 4 Zero ZI prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
3400034C-3400034F __SEGGER_RTL_stderr_file 4 4 Zero ZI prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34000350-34000353 __SEGGER_RTL_locale_ptr 4 4 Zero ZI mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34000354-34000357 JumpToApplication.JumpToApp 4 4 Zero ZI blto2_FSBL_lto.o
34000358-34000757 _acUpBuffer 1 024 1 Zero ZI SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34000758-34000767 _acDownBuffer 16 1 Zero ZI SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34000768-3400077B __SEGGER_RTL_global_locale 20 4 Init RW mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
3400077C-3400077F uwTickPrio 4 4 Init RW blto2_FSBL_lto.o
34000780-34000783 stdout 4 4 Init RW prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34000784-34000787 stdin 4 4 Init RW prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34000788-3400078B stderr 4 4 Init RW prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
3400078C-3400078F SystemCoreClock 4 4 Init RW blto2_FSBL_lto.o
34000790-34000790 uwTickFreq 1 1 Init RW blto2_FSBL_lto.o
34000791-34061FFF ( UNUSED .=.+399471 ) 399 471 - ---- - -
34062000-34063FFF [.bss.block.stack] 8 192 8 None ZI [ Linker created ]
34180400-3418074B _vectors 844 1024 Code RX stm32n657xx_Vectors.o
3418074C-3418074F Error_Handler 4 4 Code RX blto2_FSBL_lto.o
34180750-341807EF __SEGGER_RTL_ipow10 160 8 Cnst RO prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
341807F0-341813CB __SEGGER_RTL_vfprintf_short_float_long_long 3 036 8 Code RX __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
341813CC-34181533 main 360 4 Code RX blto2_FSBL_lto.o
34181534-3418153B HAL_MspInit 8 4 Code RX blto2_FSBL_lto.o
3418153C-34181543 SysTick_Handler 8 4 Code RX blto2_FSBL_lto.o
34181544-3418187F SystemCoreClockUpdate 828 4 Code RX blto2_FSBL_lto.o
34181880-341819C3 HAL_XSPI_MspInit 324 4 Code RX blto2_FSBL_lto.o
341819C4-341819F3 HAL_Init 48 4 Code RX blto2_FSBL_lto.o
341819F4-341819FF HAL_GetTick 12 4 Code RX blto2_FSBL_lto.o
34181A00-34181A7B HAL_BSEC_OTP_Read 124 4 Code RX blto2_FSBL_lto.o
34181A7C-34181AB7 __NVIC_SetPriorityGrouping 60 4 Code RX blto2_FSBL_lto.o
34181AB8-34181B5F HAL_NVIC_SetPriority 168 4 Code RX blto2_FSBL_lto.o
34181B60-34181B6F __NVIC_GetPriorityGrouping 16 4 Code RX blto2_FSBL_lto.o
34181B70-34181BD3 NVIC_EncodePriority 100 4 Code RX blto2_FSBL_lto.o
34181BD4-34181BE3 HAL_SYSTICK_Config 16 4 Code RX blto2_FSBL_lto.o
34181BE4-34181CD7 HAL_DMA_Abort 244 4 Code RX blto2_FSBL_lto.o
34181CD8-3418245F HAL_GPIO_Init 1 928 4 Code RX blto2_FSBL_lto.o
34182460-3418247B LL_RCC_HSI_SetDivider 28 4 Code RX blto2_FSBL_lto.o
3418247C-3418248B LL_RCC_HSI_IsReady 16 4 Code RX blto2_FSBL_lto.o
3418248C-3418249B LL_RCC_GetCpuClkSource 16 4 Code RX blto2_FSBL_lto.o
3418249C-341824AB LL_RCC_GetSysClkSource 16 4 Code RX blto2_FSBL_lto.o
341824AC-341824BB LL_RCC_PLL1_GetSource 16 4 Code RX blto2_FSBL_lto.o
341824BC-341824CB LL_RCC_PLL2_GetSource 16 4 Code RX blto2_FSBL_lto.o
341824CC-341824DB LL_RCC_PLL3_GetSource 16 4 Code RX blto2_FSBL_lto.o
341824DC-341824EB LL_RCC_PLL4_GetSource 16 4 Code RX blto2_FSBL_lto.o
341824EC-34182507 LL_RCC_MSI_SetFrequency 28 4 Code RX blto2_FSBL_lto.o
34182508-34182517 LL_RCC_MSI_IsReady 16 4 Code RX blto2_FSBL_lto.o
34182518-34182527 LL_RCC_LSI_IsReady 16 4 Code RX blto2_FSBL_lto.o
34182528-34182537 LL_RCC_LSE_IsReady 16 4 Code RX blto2_FSBL_lto.o
34182538-34182547 LL_RCC_PLL1_IsReady 16 4 Code RX blto2_FSBL_lto.o
34182548-34182557 LL_RCC_IC1_GetSource 16 4 Code RX blto2_FSBL_lto.o
34182558-34182567 LL_RCC_IC2_GetSource 16 4 Code RX blto2_FSBL_lto.o
34182568-34182577 LL_RCC_IC6_GetSource 16 4 Code RX blto2_FSBL_lto.o
34182578-34182587 LL_RCC_IC11_GetSource 16 4 Code RX blto2_FSBL_lto.o
34182588-34182597 LL_RCC_PLL2_IsReady 16 4 Code RX blto2_FSBL_lto.o
34182598-341825A7 LL_RCC_PLL3_IsReady 16 4 Code RX blto2_FSBL_lto.o
341825A8-341825B7 LL_RCC_PLL4_IsReady 16 4 Code RX blto2_FSBL_lto.o
341825B8-3418260B RCC_PLL_Source_IsReady 84 4 Code RX blto2_FSBL_lto.o
3418260C-3418261B LL_RCC_HSE_IsReady 16 4 Code RX blto2_FSBL_lto.o
3418261C-3418262B LL_RCC_HSI_GetDivider 16 4 Code RX blto2_FSBL_lto.o
3418262C-3418263B LL_RCC_PLL1_IsEnabledBypass 16 4 Code RX blto2_FSBL_lto.o
3418263C-3418264B LL_RCC_PLL2_IsEnabledBypass 16 4 Code RX blto2_FSBL_lto.o
3418264C-3418265B LL_RCC_PLL3_IsEnabledBypass 16 4 Code RX blto2_FSBL_lto.o
3418265C-3418266B LL_RCC_PLL4_IsEnabledBypass 16 4 Code RX blto2_FSBL_lto.o
3418266C-34182753 RCC_GetSysClockFreq 232 4 Code RX blto2_FSBL_lto.o
34182754-34182843 HAL_RCC_GetClockConfig 240 4 Code RX blto2_FSBL_lto.o
34182844-3418870F HAL_RCCEx_PeriphCLKConfig 24 268 4 Code RX blto2_FSBL_lto.o
34188710-3418871F LL_RCC_GetRTCClockSource 16 4 Code RX blto2_FSBL_lto.o
34188720-3418872F LL_RCC_LSE_IsReady.59 16 4 Code RX blto2_FSBL_lto.o
34188730-3418874B LL_RCC_SetRTC_HSEPrescaler 28 4 Code RX blto2_FSBL_lto.o
3418874C-34188767 LL_RCC_SetRTCClockSource 28 4 Code RX blto2_FSBL_lto.o
34188768-34188777 LL_RCC_IC10_Enable.61 16 4 Code RX blto2_FSBL_lto.o
34188778-34188787 LL_RCC_IC15_Enable.62 16 4 Code RX blto2_FSBL_lto.o
34188788-34188797 LL_RCC_IC19_Enable 16 4 Code RX blto2_FSBL_lto.o
34188798-341887A7 LL_RCC_IC20_Enable.63 16 4 Code RX blto2_FSBL_lto.o
341887A8-341887C3 LL_RCC_SetCLKPClockSource 28 4 Code RX blto2_FSBL_lto.o
341887C4-341887D3 LL_RCC_SetXSPIClockSource 16 4 Code RX blto2_FSBL_lto.o
341887D4-341887EF LL_RCC_SetFMCClockSource 28 4 Code RX blto2_FSBL_lto.o
341887F0-341887FF LL_RCC_SetSDMMCClockSource 16 4 Code RX blto2_FSBL_lto.o
34188800-3418881B LL_RCC_SetADFClockSource 28 4 Code RX blto2_FSBL_lto.o
3418881C-3418882B LL_RCC_IC18_Enable 16 4 Code RX blto2_FSBL_lto.o
3418882C-3418883B LL_RCC_IC17_Enable 16 4 Code RX blto2_FSBL_lto.o
3418883C-34188857 LL_RCC_SetDCMIPPClockSource 28 4 Code RX blto2_FSBL_lto.o
34188858-34188867 LL_RCC_IC12_Enable 16 4 Code RX blto2_FSBL_lto.o
34188868-34188883 LL_RCC_SetETHClockSource 28 4 Code RX blto2_FSBL_lto.o
34188884-3418889F LL_RCC_SetETHPHYInterface 28 4 Code RX blto2_FSBL_lto.o
341888A0-341888BB LL_RCC_SetETHREFRXClockSource 28 4 Code RX blto2_FSBL_lto.o
341888BC-341888D7 LL_RCC_SetETHREFTXClockSource 28 4 Code RX blto2_FSBL_lto.o
341888D8-341888E7 LL_RCC_IC13_Enable 16 4 Code RX blto2_FSBL_lto.o
341888E8-34188903 LL_RCC_SetFDCANClockSource 28 4 Code RX blto2_FSBL_lto.o
34188904-34188913 LL_RCC_SetI2CClockSource 16 4 Code RX blto2_FSBL_lto.o
34188914-34188923 LL_RCC_SetI3CClockSource 16 4 Code RX blto2_FSBL_lto.o
34188924-34188933 LL_RCC_SetLPTIMClockSource 16 4 Code RX blto2_FSBL_lto.o
34188934-34188943 LL_RCC_IC9_Enable 16 4 Code RX blto2_FSBL_lto.o
34188944-34188953 LL_RCC_IC14_Enable 16 4 Code RX blto2_FSBL_lto.o
34188954-3418896F LL_RCC_SetLPUARTClockSource 28 4 Code RX blto2_FSBL_lto.o
34188970-3418897F LL_RCC_IC16_Enable 16 4 Code RX blto2_FSBL_lto.o
34188980-3418899B LL_RCC_SetLTDCClockSource 28 4 Code RX blto2_FSBL_lto.o
3418899C-341889B7 LL_RCC_SetMDFClockSource 28 4 Code RX blto2_FSBL_lto.o
341889B8-341889D3 LL_RCC_SetPSSIClockSource 28 4 Code RX blto2_FSBL_lto.o
341889D4-341889E3 LL_RCC_SetSAIClockSource 16 4 Code RX blto2_FSBL_lto.o
341889E4-341889FF LL_RCC_SetSPDIFRXClockSource 28 4 Code RX blto2_FSBL_lto.o
34188A00-34188A0F LL_RCC_SetSPIClockSource 16 4 Code RX blto2_FSBL_lto.o
34188A10-34188A1F LL_RCC_SetUSARTClockSource 16 4 Code RX blto2_FSBL_lto.o
34188A20-34188A2F LL_RCC_SetOTGPHYClockSource 16 4 Code RX blto2_FSBL_lto.o
34188A30-34188A3F LL_RCC_SetOTGPHYCKREFClockSource 16 4 Code RX blto2_FSBL_lto.o
34188A40-34188A73 LL_RCC_SetClockSource 52 4 Code RX blto2_FSBL_lto.o
34188A74-34188A83 LL_RCC_GetADCPrescaler 16 4 Code RX blto2_FSBL_lto.o
34188A84-34188A93 LL_RCC_GetETH1PTPDivider 16 4 Code RX blto2_FSBL_lto.o
34188A94-34188AA3 LL_RCC_GetI2CClockSource 16 4 Code RX blto2_FSBL_lto.o
34188AA4-34188AB3 LL_RCC_GetI3CClockSource 16 4 Code RX blto2_FSBL_lto.o
34188AB4-34188AC3 LL_RCC_GetLPTIMClockSource 16 4 Code RX blto2_FSBL_lto.o
34188AC4-34188AD3 LL_RCC_GetSAIClockSource 16 4 Code RX blto2_FSBL_lto.o
34188AD4-34188AE3 LL_RCC_GetSDMMCClockSource 16 4 Code RX blto2_FSBL_lto.o
34188AE4-34188AF3 LL_RCC_GetSPIClockSource 16 4 Code RX blto2_FSBL_lto.o
34188AF4-34188B03 LL_RCC_GetTIMPrescaler 16 4 Code RX blto2_FSBL_lto.o
34188B04-34188B13 LL_RCC_GetUSARTClockSource 16 4 Code RX blto2_FSBL_lto.o
34188B14-34188B23 LL_RCC_HSE_IsSelectedHSEDiv2AsDiv2Clock 16 4 Code RX blto2_FSBL_lto.o
34188B24-34188B33 LL_RCC_GetXSPIClockSource 16 4 Code RX blto2_FSBL_lto.o
34188B34-34188B63 LL_RCC_GetClockSource 48 4 Code RX blto2_FSBL_lto.o
34188B64-34188CE7 RCCEx_GetADFCLKFreq 388 4 Code RX blto2_FSBL_lto.o
34188CE8-34188FC7 RCCEx_GetCLKPCLKFreq 736 4 Code RX blto2_FSBL_lto.o
34188FC8-341890AB RCCEx_GetDCMIPPCLKFreq 228 4 Code RX blto2_FSBL_lto.o
341890AC-34189183 RCCEx_GetETH1CLKFreq 216 4 Code RX blto2_FSBL_lto.o
34189184-34189387 RCCEx_GetI3CCLKFreq 516 4 Code RX blto2_FSBL_lto.o
34189388-34189523 RCCEx_GetLPUARTCLKFreq 412 4 Code RX blto2_FSBL_lto.o
34189524-34189607 RCCEx_GetLTDCCLKFreq 228 4 Code RX blto2_FSBL_lto.o
34189608-341897BB RCCEx_GetMDFCLKFreq 436 4 Code RX blto2_FSBL_lto.o
341897BC-34189947 RCCEx_GetSDMMCCLKFreq 396 4 Code RX blto2_FSBL_lto.o
34189948-34189ABB RCCEx_GetSPDIFRXCLKFreq 372 4 Code RX blto2_FSBL_lto.o
34189ABC-34189F67 RCCEx_GetSPICLKFreq 1 196 4 Code RX blto2_FSBL_lto.o
34189F68-3418A2FB RCCEx_GetUSARTCLKFreq 916 4 Code RX blto2_FSBL_lto.o
3418A2FC-3418A68F RCCEx_GetUARTCLKFreq 916 4 Code RX blto2_FSBL_lto.o
3418A690-3418A7D3 RCCEx_GetOTGPHYCLKFreq 324 4 Code RX blto2_FSBL_lto.o
3418A7D4-3418A867 RCCEx_GetOTGPHYCKREFCLKFreq 148 4 Code RX blto2_FSBL_lto.o
3418A868-3418AA2B RCCEx_GetXSPICLKFreq 452 4 Code RX blto2_FSBL_lto.o
3418AA2C-3418AA47 RCCEx_GetHCLKFreq 28 4 Code RX blto2_FSBL_lto.o
3418AA48-3418AA57 LL_RCC_IC3_IsEnabled 16 4 Code RX blto2_FSBL_lto.o
3418AA58-3418AA67 LL_RCC_IC3_GetSource 16 4 Code RX blto2_FSBL_lto.o
3418AA68-3418AA77 LL_RCC_IC4_IsEnabled 16 4 Code RX blto2_FSBL_lto.o
3418AA78-3418AA87 LL_RCC_IC4_GetSource 16 4 Code RX blto2_FSBL_lto.o
3418AA88-3418AA97 LL_RCC_PLL4_IsReady.74 16 4 Code RX blto2_FSBL_lto.o
3418AA98-3418AAA7 LL_RCC_PLL4P_IsEnabled 16 4 Code RX blto2_FSBL_lto.o
3418AAA8-3418AAB7 LL_RCC_PLL4_GetSource.75 16 4 Code RX blto2_FSBL_lto.o
3418AAB8-3418AB43 RCCEx_GetPLLSourceFreq 140 4 Code RX blto2_FSBL_lto.o
3418AB44-3418AB53 LL_RCC_PLL4_GetM 16 4 Code RX blto2_FSBL_lto.o
3418AB54-3418AB63 LL_RCC_PLL4_GetN 16 4 Code RX blto2_FSBL_lto.o
3418AB64-3418AB73 LL_RCC_PLL4_GetFRACN 16 4 Code RX blto2_FSBL_lto.o
3418AB74-3418AB83 LL_RCC_PLL4_GetP1 16 4 Code RX blto2_FSBL_lto.o
3418AB84-3418AB93 LL_RCC_PLL4_GetP2 16 4 Code RX blto2_FSBL_lto.o
3418AB94-3418AC1B RCCEx_CalcPLLFreq 136 4 Code RX blto2_FSBL_lto.o
3418AC1C-3418AC2B LL_RCC_PLL4_IsEnabledBypass.76 16 4 Code RX blto2_FSBL_lto.o
3418AC2C-3418AC3B LL_RCC_HSI_IsReady.77 16 4 Code RX blto2_FSBL_lto.o
3418AC3C-3418AC4B LL_RCC_HSI_GetDivider.78 16 4 Code RX blto2_FSBL_lto.o
3418AC4C-3418AC5B LL_RCC_MSI_IsReady.79 16 4 Code RX blto2_FSBL_lto.o
3418AC5C-3418AC6B LL_RCC_MSI_GetFrequency 16 4 Code RX blto2_FSBL_lto.o
3418AC6C-3418AC7B LL_RCC_HSE_IsReady.80 16 4 Code RX blto2_FSBL_lto.o
3418AC7C-3418AC8B LL_RCC_PLL3_IsReady.81 16 4 Code RX blto2_FSBL_lto.o
3418AC8C-3418AC9B LL_RCC_PLL3P_IsEnabled 16 4 Code RX blto2_FSBL_lto.o
3418AC9C-3418ACAB LL_RCC_PLL3_GetSource.82 16 4 Code RX blto2_FSBL_lto.o
3418ACAC-3418ACBB LL_RCC_PLL3_GetM 16 4 Code RX blto2_FSBL_lto.o
3418ACBC-3418ACCB LL_RCC_PLL3_GetN 16 4 Code RX blto2_FSBL_lto.o
3418ACCC-3418ACDB LL_RCC_PLL3_GetFRACN 16 4 Code RX blto2_FSBL_lto.o
3418ACDC-3418ACEB LL_RCC_PLL3_GetP1 16 4 Code RX blto2_FSBL_lto.o
3418ACEC-3418ACFB LL_RCC_PLL3_GetP2 16 4 Code RX blto2_FSBL_lto.o
3418ACFC-3418AD0B LL_RCC_PLL3_IsEnabledBypass.83 16 4 Code RX blto2_FSBL_lto.o
3418AD0C-3418AD1B LL_RCC_PLL2_IsReady.84 16 4 Code RX blto2_FSBL_lto.o
3418AD1C-3418AD2B LL_RCC_PLL2P_IsEnabled 16 4 Code RX blto2_FSBL_lto.o
3418AD2C-3418AD3B LL_RCC_PLL2_GetSource.85 16 4 Code RX blto2_FSBL_lto.o
3418AD3C-3418AD4B LL_RCC_PLL2_GetM 16 4 Code RX blto2_FSBL_lto.o
3418AD4C-3418AD5B LL_RCC_PLL2_GetN 16 4 Code RX blto2_FSBL_lto.o
3418AD5C-3418AD6B LL_RCC_PLL2_GetFRACN 16 4 Code RX blto2_FSBL_lto.o
3418AD6C-3418AD7B LL_RCC_PLL2_GetP1 16 4 Code RX blto2_FSBL_lto.o
3418AD7C-3418AD8B LL_RCC_PLL2_GetP2 16 4 Code RX blto2_FSBL_lto.o
3418AD8C-3418AD9B LL_RCC_PLL2_IsEnabledBypass.86 16 4 Code RX blto2_FSBL_lto.o
3418AD9C-3418ADAB LL_RCC_PLL1_IsReady.87 16 4 Code RX blto2_FSBL_lto.o
3418ADAC-3418ADBB LL_RCC_PLL1P_IsEnabled 16 4 Code RX blto2_FSBL_lto.o
3418ADBC-3418ADCB LL_RCC_PLL1_GetSource.88 16 4 Code RX blto2_FSBL_lto.o
3418ADCC-3418ADDB LL_RCC_PLL1_GetM 16 4 Code RX blto2_FSBL_lto.o
3418ADDC-3418ADEB LL_RCC_PLL1_GetN 16 4 Code RX blto2_FSBL_lto.o
3418ADEC-3418ADFB LL_RCC_PLL1_GetFRACN 16 4 Code RX blto2_FSBL_lto.o
3418ADFC-3418AE0B LL_RCC_PLL1_GetP1 16 4 Code RX blto2_FSBL_lto.o
3418AE0C-3418AE1B LL_RCC_PLL1_GetP2 16 4 Code RX blto2_FSBL_lto.o
3418AE1C-3418AE2B LL_RCC_PLL1_IsEnabledBypass.89 16 4 Code RX blto2_FSBL_lto.o
3418AE2C-3418AE3B LL_RCC_GetAHBPrescaler.90 16 4 Code RX blto2_FSBL_lto.o
3418AE3C-3418AE4B LL_RCC_GetUSBClockSource 16 4 Code RX blto2_FSBL_lto.o
3418AE4C-3418AE5B LL_RCC_IC15_IsEnabled 16 4 Code RX blto2_FSBL_lto.o
3418AE5C-3418AE6B LL_RCC_IC15_GetSource 16 4 Code RX blto2_FSBL_lto.o
3418AE6C-3418AE7B LL_RCC_GetUARTClockSource 16 4 Code RX blto2_FSBL_lto.o
3418AE7C-3418AE97 RCCEx_GetPCLK1Freq 28 4 Code RX blto2_FSBL_lto.o
3418AE98-3418AEB3 RCCEx_GetPCLK2Freq 28 4 Code RX blto2_FSBL_lto.o
3418AEB4-3418AEC3 LL_RCC_IC9_IsEnabled 16 4 Code RX blto2_FSBL_lto.o
3418AEC4-3418AED3 LL_RCC_IC9_GetSource 16 4 Code RX blto2_FSBL_lto.o
3418AED4-3418AEE3 LL_RCC_IC14_IsEnabled 16 4 Code RX blto2_FSBL_lto.o
3418AEE4-3418AEF3 LL_RCC_IC14_GetSource 16 4 Code RX blto2_FSBL_lto.o
3418AEF4-3418AF03 LL_RCC_GetAPB2Prescaler.91 16 4 Code RX blto2_FSBL_lto.o
3418AF04-3418AF13 LL_RCC_GetAPB1Prescaler.92 16 4 Code RX blto2_FSBL_lto.o
3418AF14-3418AF2F RCCEx_GetPCLK4Freq 28 4 Code RX blto2_FSBL_lto.o
3418AF30-3418AF3F LL_RCC_IC8_IsEnabled 16 4 Code RX blto2_FSBL_lto.o
3418AF40-3418AF4F LL_RCC_IC8_GetSource 16 4 Code RX blto2_FSBL_lto.o
3418AF50-3418AF5F LL_RCC_GetAPB4Prescaler.93 16 4 Code RX blto2_FSBL_lto.o
3418AF60-3418AF6F LL_RCC_IC7_IsEnabled 16 4 Code RX blto2_FSBL_lto.o
3418AF70-3418AF7F LL_RCC_IC7_GetSource 16 4 Code RX blto2_FSBL_lto.o
3418AF80-3418AF8F LL_RCC_IC5_IsEnabled 16 4 Code RX blto2_FSBL_lto.o
3418AF90-3418AF9F LL_RCC_IC5_GetSource 16 4 Code RX blto2_FSBL_lto.o
3418AFA0-3418AFAF LL_RCC_LSI_IsReady.94 16 4 Code RX blto2_FSBL_lto.o
3418AFB0-3418AFBF LL_RCC_IC20_IsEnabled 16 4 Code RX blto2_FSBL_lto.o
3418AFC0-3418AFCF LL_RCC_IC20_GetSource 16 4 Code RX blto2_FSBL_lto.o
3418AFD0-3418AFEB RCCEx_GetPCLK5Freq 28 4 Code RX blto2_FSBL_lto.o
3418AFEC-3418AFFB LL_RCC_IC16_IsEnabled 16 4 Code RX blto2_FSBL_lto.o
3418AFFC-3418B00B LL_RCC_IC16_GetSource 16 4 Code RX blto2_FSBL_lto.o
3418B00C-3418B01B LL_RCC_GetAPB5Prescaler.95 16 4 Code RX blto2_FSBL_lto.o
3418B01C-3418B02B LL_RCC_IC10_IsEnabled 16 4 Code RX blto2_FSBL_lto.o
3418B02C-3418B03B LL_RCC_IC10_GetSource 16 4 Code RX blto2_FSBL_lto.o
3418B03C-3418B04B LL_RCC_IC19_IsEnabled 16 4 Code RX blto2_FSBL_lto.o
3418B04C-3418B05B LL_RCC_IC19_GetSource 16 4 Code RX blto2_FSBL_lto.o
3418B05C-3418B06B LL_RCC_IC13_IsEnabled 16 4 Code RX blto2_FSBL_lto.o
3418B06C-3418B07B LL_RCC_IC13_GetSource 16 4 Code RX blto2_FSBL_lto.o
3418B07C-3418B08B LL_RCC_IC12_IsEnabled 16 4 Code RX blto2_FSBL_lto.o
3418B08C-3418B09B LL_RCC_IC12_GetSource 16 4 Code RX blto2_FSBL_lto.o
3418B09C-3418B0AB LL_RCC_IC17_IsEnabled 16 4 Code RX blto2_FSBL_lto.o
3418B0AC-3418B0BB LL_RCC_IC17_GetSource 16 4 Code RX blto2_FSBL_lto.o
3418B0BC-3418B0CB LL_RCC_CLKP_IsEnabled 16 4 Code RX blto2_FSBL_lto.o
3418B0CC-3418B0DB LL_RCC_IC18_IsEnabled 16 4 Code RX blto2_FSBL_lto.o
3418B0DC-3418B0EB LL_RCC_IC18_GetSource 16 4 Code RX blto2_FSBL_lto.o
3418B0EC-3418B6F7 HAL_XSPI_Init 1 548 4 Code RX blto2_FSBL_lto.o
3418B6F8-3418B75F XSPI_WaitFlagStateUntilTimeout 104 4 Code RX blto2_FSBL_lto.o
3418B760-3418BAFB XSPI_ConfigCmd 924 4 Code RX blto2_FSBL_lto.o
3418BAFC-3418BC27 HAL_XSPI_Receive 300 4 Code RX blto2_FSBL_lto.o
3418BC28-3418BC43 LL_AHB5_GRP1_IsEnabledClock 28 4 Code RX blto2_FSBL_lto.o
3418BC44-3418BDA7 JumpToApplication 356 4 Code RX blto2_FSBL_lto.o
3418BDA8-3418BDF7 CheckSFDP_Signature 80 4 Code RX blto2_FSBL_lto.o
3418BDF8-3418BEF7 SFDP_GetHeader 256 4 Code RX blto2_FSBL_lto.o
3418BEF8-3418C183 sfdp_get_paraminfo 652 4 Code RX blto2_FSBL_lto.o
3418C184-3418CD97 SFDP_BuildGenericDriver 3 092 4 Code RX blto2_FSBL_lto.o
3418CD98-3418CE1B JEDEC_Basic_Manage4S4S4SEnableSequence 132 4 Code RX blto2_FSBL_lto.o
3418CE1C-3418CE5B sfdp_getfrequencevalue 64 4 Code RX blto2_FSBL_lto.o
3418CE5C-3418CFFF sfdp_set_dummycycle 420 4 Code RX blto2_FSBL_lto.o
3418D000-3418D00F EXTMEM_DRIVER_NOR_SFDP_DeInit 16 4 Code RX blto2_FSBL_lto.o
3418D010-3418D033 EXTMEM_DRIVER_NOR_SFDP_Disable_MemoryMappedMode 36 4 Code RX blto2_FSBL_lto.o
3418D034-3418D0A7 SAL_XSPI_SetClock 116 4 Code RX blto2_FSBL_lto.o
3418D0A8-3418D0FF XSPI_FormatCommand 88 4 Code RX blto2_FSBL_lto.o
3418D100-3418D197 SAL_XSPI_GetId 152 4 Code RX blto2_FSBL_lto.o
3418D198-3418D1B7 XSPI_Transmit 32 4 Code RX blto2_FSBL_lto.o
3418D1B8-3418D23F SAL_XSPI_CommandSendData 136 4 Code RX blto2_FSBL_lto.o
3418D240-3418D2C7 SAL_XSPI_SendReadCommand 136 4 Code RX blto2_FSBL_lto.o
3418D2C8-3418D3AF SAL_XSPI_CheckStatusRegister 232 4 Code RX blto2_FSBL_lto.o
3418D3B0-3418D477 SAL_XSPI_EnableMapMode 200 4 Code RX blto2_FSBL_lto.o
3418D478-3418D4EB SAL_XSPI_UpdateMemoryType 116 4 Code RX blto2_FSBL_lto.o
3418D4EC-3418D577 EXTMEM_MemoryMappedMode 140 4 Code RX blto2_FSBL_lto.o
3418D578-3418D63B EXTMEM_GetMapAddress 196 4 Code RX blto2_FSBL_lto.o
3418D63C-3418D64B SFDP_BuildGenericDriver.chip_erase_unit 16 4 Cnst RO blto2_FSBL_lto.o
3418D64C-3418D65F _start 20 4 Code RX SEGGER_THUMB_Startup.o
3418D660-3418D6A3 reset_handler 68 4 Code RX STM32N6xx_Startup.o
3418D6A4-3418D7BF fmodf 284 4 Code RX floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
3418D7C0-3418D827 floorf 104 4 Code RX floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
3418D828-3418D83F __SEGGER_RTL_aPower2f 24 4 Cnst RO utilops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
3418D840-3418D893 __aeabi_ul2f 84 4 Code RX floatasmops_arm.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
3418D894-3418D8EF memcpy 92 4 Code RX strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
3418D8F0-3418D957 __aeabi_memclr 104 4 Code RX strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
3418D958-3418D963 __SEGGER_RTL_c_locale 12 4 Cnst RO mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
3418D964-3418D983 __SEGGER_RTL_codeset_ascii 32 4 Cnst RO mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
3418D984-3418D9DB __SEGGER_RTL_c_locale_data 88 4 Cnst RO mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
3418D9DC-3418D9DD MX_BSEC_Init 2 4 Code RX blto2_FSBL_lto.o
3418D9DE-3418D9F7 [.rodata..L__const.sfdp_getfrequencevalue.freqMhz_table] 26 2 Cnst RO blto2_FSBL_lto.o
3418D9F8-3418DA35 MX_EXTMEM_MANAGER_Init 62 4 Code RX blto2_FSBL_lto.o
3418DA36-3418DA37 PVD_PVM_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418DA38-3418DABD MX_GPIO_Init 134 4 Code RX blto2_FSBL_lto.o
3418DABE-3418DABF DTS_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418DAC0-3418DAE1 LL_AHB4_GRP1_EnableClock 34 4 Code RX blto2_FSBL_lto.o
3418DAE2-3418DAE3 RCC_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418DAE4-3418DBE1 SystemClock_Config 254 4 Code RX blto2_FSBL_lto.o
3418DBE2-3418DBE3 LOCKUP_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418DBE4-3418DC71 OTP_Config 142 4 Code RX blto2_FSBL_lto.o
3418DC72-3418DC73 CACHE_ECC_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418DC74-3418DC95 LL_APB4_GRP2_EnableClock 34 4 Code RX blto2_FSBL_lto.o
3418DC96-3418DC97 TCM_ECC_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418DC98-3418DCA1 assert_failed 10 4 Code RX blto2_FSBL_lto.o
3418DCA2-3418DCA3 BCK_ECC_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418DCA4-3418DCA5 NMI_Handler 2 4 Code RX blto2_FSBL_lto.o
3418DCA6-3418DCA7 FPU_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418DCA8-3418DCA9 HardFault_Handler 2 4 Code RX blto2_FSBL_lto.o
3418DCAA-3418DCAB RTC_S_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418DCAC-3418DCAD MemManage_Handler 2 4 Code RX blto2_FSBL_lto.o
3418DCAE-3418DCAF TAMP_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418DCB0-3418DCB1 BusFault_Handler 2 4 Code RX blto2_FSBL_lto.o
3418DCB2-3418DCB3 RIFSC_TAMPER_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418DCB4-3418DCB5 UsageFault_Handler 2 4 Code RX blto2_FSBL_lto.o
3418DCB6-3418DCB7 IAC_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418DCB8-3418DCB9 SVC_Handler 2 4 Code RX blto2_FSBL_lto.o
3418DCBA-3418DCBB RCC_S_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418DCBC-3418DCBD DebugMon_Handler 2 4 Code RX blto2_FSBL_lto.o
3418DCBE-3418DCBF RTC_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418DCC0-3418DCC1 PendSV_Handler 2 4 Code RX blto2_FSBL_lto.o
3418DCC2-3418DCC3 IWDG_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418DCC4-3418DEC1 SystemInit 510 4 Code RX blto2_FSBL_lto.o
3418DEC2-3418DEC3 WWDG_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418DEC4-3418DF41 MX_XSPI2_Init 126 4 Code RX blto2_FSBL_lto.o
3418DF42-3418DF43 EXTI0_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418DF44-3418DF65 LL_APB4_GRP2_EnableClock.7 34 4 Code RX blto2_FSBL_lto.o
3418DF66-3418DF67 EXTI1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418DF68-3418DF89 LL_AHB4_GRP1_EnableClock.8 34 4 Code RX blto2_FSBL_lto.o
3418DF8A-3418DF8B EXTI2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418DF8C-3418DFAD LL_AHB5_GRP1_EnableClock 34 4 Code RX blto2_FSBL_lto.o
3418DFAE-3418DFAF EXTI3_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418DFB0-3418E02D HAL_InitTick 126 4 Code RX blto2_FSBL_lto.o
3418E02E-3418E02F EXTI4_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418E030-3418E049 HAL_IncTick 26 4 Code RX blto2_FSBL_lto.o
3418E04A-3418E04B EXTI5_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418E04C-3418E085 HAL_Delay 58 4 Code RX blto2_FSBL_lto.o
3418E086-3418E087 EXTI6_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418E088-3418E099 HAL_SuspendTick 18 4 Code RX blto2_FSBL_lto.o
3418E09A-3418E09B EXTI7_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418E09C-3418E195 HAL_BSEC_OTP_Reload 250 4 Code RX blto2_FSBL_lto.o
3418E196-3418E197 EXTI8_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418E198-3418E2ED HAL_BSEC_OTP_Program 342 4 Code RX blto2_FSBL_lto.o
3418E2EE-3418E2EF EXTI9_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418E2F0-3418E32D HAL_NVIC_SetPriorityGrouping 62 4 Code RX blto2_FSBL_lto.o
3418E32E-3418E32F EXTI10_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418E330-3418E36D __NVIC_SetPriority 62 4 Code RX blto2_FSBL_lto.o
3418E36E-3418E36F EXTI11_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418E370-3418E3BD SysTick_Config 78 4 Code RX blto2_FSBL_lto.o
3418E3BE-3418E3BF EXTI12_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418E3C0-3418E425 HAL_GPIO_WritePin 102 4 Code RX blto2_FSBL_lto.o
3418E426-3418E427 EXTI13_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418E428-3418E499 HAL_PWREx_ConfigSupply 114 4 Code RX blto2_FSBL_lto.o
3418E49A-3418E49B EXTI14_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418E49C-3418E50D HAL_PWREx_ControlVoltageScaling 114 4 Code RX blto2_FSBL_lto.o
3418E50E-3418E50F EXTI15_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418E510-3418E5F1 HAL_PWREx_ConfigVddIORange 226 4 Code RX blto2_FSBL_lto.o
3418E5F2-3418E5F3 SAES_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418E5F4-3418E605 HAL_PWREx_EnableVddIO3 18 4 Code RX blto2_FSBL_lto.o
3418E606-3418E607 CRYP_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418E608-3418E615 LL_RCC_HSI_Enable 14 4 Code RX blto2_FSBL_lto.o
3418E616-3418E617 PKA_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418E618-3418F111 HAL_RCC_OscConfig 2 810 4 Code RX blto2_FSBL_lto.o
3418F112-3418F113 HASH_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418F114-3418F131 LL_RCC_HSI_SetCalibTrimming 30 4 Code RX blto2_FSBL_lto.o
3418F132-3418F133 RNG_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418F134-3418F141 LL_RCC_HSI_Disable 14 4 Code RX blto2_FSBL_lto.o
3418F142-3418F143 MCE1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418F144-3418F161 LL_RCC_MSI_SetCalibTrimming 30 4 Code RX blto2_FSBL_lto.o
3418F162-3418F163 MCE2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418F164-3418F171 LL_RCC_MSI_Enable 14 4 Code RX blto2_FSBL_lto.o
3418F172-3418F173 MCE3_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418F174-3418F181 LL_RCC_MSI_Disable 14 4 Code RX blto2_FSBL_lto.o
3418F182-3418F183 MCE4_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418F184-3418F191 LL_RCC_LSI_Enable 14 4 Code RX blto2_FSBL_lto.o
3418F192-3418F193 ADC1_2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418F194-3418F1A1 LL_RCC_LSI_Disable 14 4 Code RX blto2_FSBL_lto.o
3418F1A2-3418F1A3 CSI_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418F1A4-3418F27D RCC_PLL_IsNewConfig 218 4 Code RX blto2_FSBL_lto.o
3418F27E-3418F27F DCMIPP_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418F280-3418F5CD RCC_PLL_Config 846 4 Code RX blto2_FSBL_lto.o
3418F5CE-3418F5CF PAHB_ERR_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418F5D0-3418F62D RCC_PLL_Enable 94 4 Code RX blto2_FSBL_lto.o
3418F62E-3418F62F NPU0_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418F630-3418FFF1 HAL_RCC_ClockConfig 2 498 4 Code RX blto2_FSBL_lto.o
3418FFF2-3418FFF3 NPU1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418FFF4-341900DD RCC_IC_CheckPLLSources 234 4 Code RX blto2_FSBL_lto.o
341900DE-341900DF NPU2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341900E0-341900ED LL_RCC_IC1_Enable 14 4 Code RX blto2_FSBL_lto.o
341900EE-341900EF NPU3_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341900F0-341901DD HAL_RCC_GetCpuClockFreq 238 4 Code RX blto2_FSBL_lto.o
341901DE-341901DF CACHEAXI_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341901E0-341901F5 LL_RCC_IC1_GetDivider 22 4 Code RX blto2_FSBL_lto.o
341901F6-341901F7 LTDC_LO_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341901F8-34190211 HAL_RCC_GetSysClockFreq 26 4 Code RX blto2_FSBL_lto.o
34190212-34190213 LTDC_LO_ERR_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34190214-34190229 LL_RCC_IC2_GetDivider 22 4 Code RX blto2_FSBL_lto.o
3419022A-3419022B DMA2D_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3419022C-34190239 LL_RCC_IC5_Enable.60 14 4 Code RX blto2_FSBL_lto.o
3419023A-3419023B JPEG_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3419023C-34190249 LL_RCC_IC3_Enable 14 4 Code RX blto2_FSBL_lto.o
3419024A-3419024B VENC_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3419024C-34190259 LL_RCC_IC4_Enable 14 4 Code RX blto2_FSBL_lto.o
3419025A-3419025B GFXMMU_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3419025C-34190269 LL_RCC_CLKP_Enable 14 4 Code RX blto2_FSBL_lto.o
3419026A-3419026B GFXTIM_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3419026C-34190279 LL_RCC_IC7_Enable 14 4 Code RX blto2_FSBL_lto.o
3419027A-3419027B GPU2D_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3419027C-34190289 LL_RCC_IC8_Enable 14 4 Code RX blto2_FSBL_lto.o
3419028A-3419028B GPU2D_ER_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3419028C-3419029D LL_RCC_HSE_SelectHSEDiv2AsDiv2Clock 18 4 Code RX blto2_FSBL_lto.o
3419029E-3419029F ICACHE_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341902A0-341902B1 LL_RCC_HSE_SelectHSEAsDiv2Clock 18 4 Code RX blto2_FSBL_lto.o
341902B2-341902B3 HPDMA1_Channel0_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341902B4-341902D1 LL_RCC_SetTIMPrescaler 30 4 Code RX blto2_FSBL_lto.o
341902D2-341902D3 HPDMA1_Channel1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341902D4-341902E9 LL_RCC_GetADCClockSource 22 4 Code RX blto2_FSBL_lto.o
341902EA-341902EB HPDMA1_Channel2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341902EC-34190301 LL_RCC_GetADFClockSource 22 4 Code RX blto2_FSBL_lto.o
34190302-34190303 HPDMA1_Channel3_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34190304-34190319 LL_RCC_GetCLKPClockSource 22 4 Code RX blto2_FSBL_lto.o
3419031A-3419031B HPDMA1_Channel4_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3419031C-34190331 LL_RCC_GetDCMIPPClockSource 22 4 Code RX blto2_FSBL_lto.o
34190332-34190333 HPDMA1_Channel5_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34190334-34190349 LL_RCC_GetETHClockSource 22 4 Code RX blto2_FSBL_lto.o
3419034A-3419034B HPDMA1_Channel6_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3419034C-34190361 LL_RCC_GetETHPTPClockSource 22 4 Code RX blto2_FSBL_lto.o
34190362-34190363 HPDMA1_Channel7_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34190364-34190379 LL_RCC_GetFDCANClockSource 22 4 Code RX blto2_FSBL_lto.o
3419037A-3419037B HPDMA1_Channel8_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3419037C-34190391 LL_RCC_GetFMCClockSource 22 4 Code RX blto2_FSBL_lto.o
34190392-34190393 HPDMA1_Channel9_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34190394-341903A9 LL_RCC_GetLPUARTClockSource 22 4 Code RX blto2_FSBL_lto.o
341903AA-341903AB HPDMA1_Channel10_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341903AC-341903C1 LL_RCC_GetLTDCClockSource 22 4 Code RX blto2_FSBL_lto.o
341903C2-341903C3 HPDMA1_Channel11_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341903C4-341903D9 LL_RCC_GetMDFClockSource 22 4 Code RX blto2_FSBL_lto.o
341903DA-341903DB HPDMA1_Channel12_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341903DC-341903F1 LL_RCC_GetPSSIClockSource 22 4 Code RX blto2_FSBL_lto.o
341903F2-341903F3 HPDMA1_Channel13_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341903F4-34190409 LL_RCC_GetSPDIFRXClockSource 22 4 Code RX blto2_FSBL_lto.o
3419040A-3419040B HPDMA1_Channel14_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3419040C-34190A65 HAL_RCCEx_GetPeriphCLKFreq 1 626 4 Code RX blto2_FSBL_lto.o
34190A66-34190A67 HPDMA1_Channel15_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34190A68-34190C1D RCCEx_GetADCCLKFreq 438 4 Code RX blto2_FSBL_lto.o
34190C1E-34190C1F GPDMA1_Channel0_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34190C20-34190CA5 RCCEx_GetCSICLKFreq 134 4 Code RX blto2_FSBL_lto.o
34190CA6-34190CA7 GPDMA1_Channel1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34190CA8-34190D85 RCCEx_GetETH1PTPCLKFreq 222 4 Code RX blto2_FSBL_lto.o
34190D86-34190D87 GPDMA1_Channel2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34190D88-34190E55 RCCEx_GetFDCANCLKFreq 206 4 Code RX blto2_FSBL_lto.o
34190E56-34190E57 GPDMA1_Channel3_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34190E58-34190F91 RCCEx_GetFMCCLKFreq 314 4 Code RX blto2_FSBL_lto.o
34190F92-34190F93 GPDMA1_Channel4_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34190F94-34191255 RCCEx_GetI2CCLKFreq 706 4 Code RX blto2_FSBL_lto.o
34191256-34191257 GPDMA1_Channel5_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34191258-34191519 RCCEx_GetLPTIMCLKFreq 706 4 Code RX blto2_FSBL_lto.o
3419151A-3419151B GPDMA1_Channel6_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3419151C-341915F5 RCCEx_GetPSSICLKFreq 218 4 Code RX blto2_FSBL_lto.o
341915F6-341915F7 GPDMA1_Channel7_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341915F8-34191675 RCCEx_GetRTCCLKFreq 126 4 Code RX blto2_FSBL_lto.o
34191676-34191677 GPDMA1_Channel8_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34191678-341918D5 RCCEx_GetSAICLKFreq 606 4 Code RX blto2_FSBL_lto.o
341918D6-341918D7 GPDMA1_Channel9_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341918D8-341918ED LL_RCC_IC3_GetDivider 22 4 Code RX blto2_FSBL_lto.o
341918EE-341918EF GPDMA1_Channel10_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341918F0-34191971 HAL_RCCEx_GetPLL1CLKFreq 130 4 Code RX blto2_FSBL_lto.o
34191972-34191973 GPDMA1_Channel11_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34191974-341919F5 HAL_RCCEx_GetPLL2CLKFreq 130 4 Code RX blto2_FSBL_lto.o
341919F6-341919F7 GPDMA1_Channel12_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341919F8-34191A79 HAL_RCCEx_GetPLL3CLKFreq 130 4 Code RX blto2_FSBL_lto.o
34191A7A-34191A7B GPDMA1_Channel13_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34191A7C-34191AFD HAL_RCCEx_GetPLL4CLKFreq 130 4 Code RX blto2_FSBL_lto.o
34191AFE-34191AFF GPDMA1_Channel14_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34191B00-34191B15 LL_RCC_IC4_GetDivider 22 4 Code RX blto2_FSBL_lto.o
34191B16-34191B17 GPDMA1_Channel15_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34191B18-34191B2D LL_RCC_IC15_GetDivider 22 4 Code RX blto2_FSBL_lto.o
34191B2E-34191B2F I2C1_EV_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34191B30-34191B45 LL_RCC_IC9_GetDivider 22 4 Code RX blto2_FSBL_lto.o
34191B46-34191B47 I2C1_ER_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34191B48-34191B5D LL_RCC_IC14_GetDivider 22 4 Code RX blto2_FSBL_lto.o
34191B5E-34191B5F I2C2_EV_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34191B60-34191B75 LL_RCC_IC8_GetDivider 22 4 Code RX blto2_FSBL_lto.o
34191B76-34191B77 I2C2_ER_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34191B78-34191B8D LL_RCC_IC7_GetDivider 22 4 Code RX blto2_FSBL_lto.o
34191B8E-34191B8F I2C3_EV_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34191B90-34191BA5 LL_RCC_IC5_GetDivider 22 4 Code RX blto2_FSBL_lto.o
34191BA6-34191BA7 I2C3_ER_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34191BA8-34191BBD LL_RCC_IC20_GetDivider 22 4 Code RX blto2_FSBL_lto.o
34191BBE-34191BBF I2C4_EV_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34191BC0-34191BD5 LL_RCC_IC16_GetDivider 22 4 Code RX blto2_FSBL_lto.o
34191BD6-34191BD7 I2C4_ER_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34191BD8-34191BED LL_RCC_IC10_GetDivider 22 4 Code RX blto2_FSBL_lto.o
34191BEE-34191BEF I3C1_EV_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34191BF0-34191C05 LL_RCC_IC19_GetDivider 22 4 Code RX blto2_FSBL_lto.o
34191C06-34191C07 I3C1_ER_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34191C08-34191C1D LL_RCC_IC13_GetDivider 22 4 Code RX blto2_FSBL_lto.o
34191C1E-34191C1F I3C2_EV_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34191C20-34191C35 LL_RCC_IC12_GetDivider 22 4 Code RX blto2_FSBL_lto.o
34191C36-34191C37 I3C2_ER_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34191C38-34191C4D LL_RCC_IC17_GetDivider 22 4 Code RX blto2_FSBL_lto.o
34191C4E-34191C4F TIM1_BRK_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34191C50-34191C65 LL_RCC_IC18_GetDivider 22 4 Code RX blto2_FSBL_lto.o
34191C66-34191C67 TIM1_UP_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34191C68-34191C79 HAL_XSPI_SetTimeout 18 4 Code RX blto2_FSBL_lto.o
34191C7A-34191C7B TIM1_TRG_CCU_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34191C7C-341920CD HAL_XSPI_Command 1 106 4 Code RX blto2_FSBL_lto.o
341920CE-341920CF TIM1_CC_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341920D0-341921B1 HAL_XSPI_Transmit 226 4 Code RX blto2_FSBL_lto.o
341921B2-341921B3 TIM2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341921B4-34192349 HAL_XSPI_AutoPolling 406 4 Code RX blto2_FSBL_lto.o
3419234A-3419234B TIM3_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3419234C-34192495 HAL_XSPI_MemoryMapped 330 4 Code RX blto2_FSBL_lto.o
34192496-34192497 TIM4_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34192498-3419258D HAL_XSPI_Abort 246 4 Code RX blto2_FSBL_lto.o
3419258E-3419258F TIM5_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34192590-341928FD HAL_XSPIM_Config 878 4 Code RX blto2_FSBL_lto.o
341928FE-341928FF TIM6_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34192900-341929D1 XSPIM_GetConfig 210 4 Code RX blto2_FSBL_lto.o
341929D2-341929D3 TIM7_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341929D4-341929F5 BOOT_Application 34 4 Code RX blto2_FSBL_lto.o
341929F6-341929F7 TIM8_BRK_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341929F8-34192A55 MapMemory 94 4 Code RX blto2_FSBL_lto.o
34192A56-34192A57 TIM8_UP_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34192A58-34192AD5 SFDP_ReadHeader 126 4 Code RX blto2_FSBL_lto.o
34192AD6-34192AD7 TIM8_TRG_CCU_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34192AD8-34192CA1 SFDP_CollectData 458 4 Code RX blto2_FSBL_lto.o
34192CA2-34192CA3 TIM8_CC_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34192CA4-34192E6D SFDP_MemoryReset 458 4 Code RX blto2_FSBL_lto.o
34192E6E-34192E6F TIM9_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34192E70-34192FC1 JEDEC_Basic_ManageQuadEnableRequirement 338 4 Code RX blto2_FSBL_lto.o
34192FC2-34192FC3 TIM10_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34192FC4-341931A5 sfdp_enter_octal_mode 482 4 Code RX blto2_FSBL_lto.o
341931A6-341931A7 TIM11_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341931A8-3419320D driver_check_FlagBUSY 102 4 Code RX blto2_FSBL_lto.o
3419320E-3419320F TIM12_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193210-34193341 EXTMEM_DRIVER_NOR_SFDP_Init 306 4 Code RX blto2_FSBL_lto.o
34193342-34193343 TIM13_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193344-3419337D EXTMEM_DRIVER_NOR_SFDP_Enable_MemoryMappedMode 58 4 Code RX blto2_FSBL_lto.o
3419337E-3419337F TIM14_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193380-341933D5 SAL_XSPI_Init 86 4 Code RX blto2_FSBL_lto.o
341933D6-341933D7 TIM15_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341933D8-34193671 SAL_XSPI_MemoryConfig 666 4 Code RX blto2_FSBL_lto.o
34193672-34193673 TIM16_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193674-34193751 SAL_XSPI_GetSFDP 222 4 Code RX blto2_FSBL_lto.o
34193752-34193753 TIM17_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193754-341937DD SAL_XSPI_Write 138 4 Code RX blto2_FSBL_lto.o
341937DE-341937DF TIM18_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341937E0-3419389D SAL_XSPI_CommandSendReadAddress 190 4 Code RX blto2_FSBL_lto.o
3419389E-3419389F LPTIM1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341938A0-341938B5 SAL_XSPI_DisableMapMode 22 4 Code RX blto2_FSBL_lto.o
341938B6-341938B7 LPTIM2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341938B8-341938C9 SAL_XSPI_Abort 18 4 Code RX blto2_FSBL_lto.o
341938CA-341938CB LPTIM3_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341938CC-34193929 EXTMEM_Init 94 4 Code RX blto2_FSBL_lto.o
3419392A-3419392B LPTIM4_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3419392C-34193979 EXTMEM_DeInit 78 4 Code RX blto2_FSBL_lto.o
3419397A-3419397B LPTIM5_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3419397C-341939B9 __aeabi_f2ulz 62 4 Code RX floatasmops_arm.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
341939BA-341939BB ADF1_FLT0_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341939BC-34193AE9 __aeabi_uldivmod 302 4 Code RX intasmops_arm.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193AEA-34193AEB MDF1_FLT0_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193AEC-34193AED MDF1_FLT1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193AEE-34193AEF MDF1_FLT2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193AF0-34193AF1 MDF1_FLT3_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193AF2-34193AF3 MDF1_FLT4_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193AF4-34193AF5 MDF1_FLT5_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193AF6-34193AF7 SAI1_A_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193AF8-34193AF9 SAI1_B_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193AFA-34193AFB SAI2_A_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193AFC-34193AFD SAI2_B_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193AFE-34193AFF SPDIFRX_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B00-34193B01 SPI1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B02-34193B03 SPI2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B04-34193B05 SPI3_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B06-34193B07 SPI4_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B08-34193B09 SPI5_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B0A-34193B0B SPI6_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B0C-34193B0D USART1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B0E-34193B0F USART2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B10-34193B11 USART3_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B12-34193B13 UART4_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B14-34193B15 UART5_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B16-34193B17 USART6_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B18-34193B19 UART7_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B1A-34193B1B UART8_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B1C-34193B1D UART9_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B1E-34193B1F USART10_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B20-34193B21 LPUART1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B22-34193B23 XSPI1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B24-34193B25 XSPI2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B26-34193B27 XSPI3_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B28-34193B29 FMC_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B2A-34193B2B SDMMC1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B2C-34193B2D SDMMC2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B2E-34193B2F UCPD1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B30-34193B31 USB1_OTG_HS_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B32-34193B33 USB2_OTG_HS_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B34-34193B35 ETH1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B36-34193B37 FDCAN1_IT0_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B38-34193B39 FDCAN1_IT1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B3A-34193B3B FDCAN2_IT0_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B3C-34193B3D FDCAN2_IT1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B3E-34193B3F FDCAN3_IT0_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B40-34193B41 FDCAN3_IT1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B42-34193B43 FDCAN_CU_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B44-34193B45 MDIOS_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B46-34193B47 DCMI_PSSI_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B48-34193B49 WAKEUP_PIN_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B4A-34193B4B CTI_INT0_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B4C-34193B4D CTI_INT1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B4E-34193B4F LTDC_UP_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B50-34193B51 LTDC_UP_ERR_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34193B52-34193B7F fwrite 46 2 Code RX fileops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193B80-34193B8D __SEGGER_RTL_float32_isnan 14 2 Code RX floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193B8E-34193B9F __SEGGER_RTL_float32_isinf 18 2 Code RX floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193BA0-34193BD5 ldexpf 54 2 Code RX floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193BD6-34193C0F __SEGGER_RTL_pow10f 58 2 Code RX utilops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193C10-34193C29 __SEGGER_RTL_prin_flush 26 2 Code RX prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193C2A-34193C33 __SEGGER_RTL_stream_write 10 2 Code RX prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193C34-34193C39 __SEGGER_RTL_X_file_write 6 2 Code RX prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193C3A-34193C9B _DoInit 98 2 Code RX SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193C9C-34193CB1 _GetAvailWriteSpace 22 2 Code RX SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193CB2-34193CEB _WriteNoCheck 58 2 Code RX SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193CEC-34193D15 strlen 42 2 Code RX strops.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193D16-34193D2F __SEGGER_RTL_current_locale 26 2 Code RX mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193D30-34193D3D __SEGGER_RTL_ascii_wctomb 14 2 Code RX mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193D3E-34193D45 SFDP_BuildGenericDriver.block_erase_unit 8 2 Cnst RO blto2_FSBL_lto.o
34193D46-34193D5D __SEGGER_RTL_float32_isnormal 24 2 Code RX floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193D5E-34193D65 __SEGGER_RTL_float32_signbit 8 2 Code RX floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193D66-34193D89 frexpf 36 2 Code RX floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193D8A-34193D91 abs 8 2 Code RX intops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193D92-34193E15 __SEGGER_RTL_putc 132 2 Code RX prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193E16-34193E35 __SEGGER_RTL_print_padding 32 2 Code RX prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193E36-34193E49 __SEGGER_RTL_pre_padding 20 2 Code RX prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193E4A-34193E65 vfprintf 28 2 Code RX prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193E66-34193ECD vfprintf_l 104 2 Code RX prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193ECE-34193EF9 printf 44 2 Code RX prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193EFA-34193F2D __SEGGER_RTL_X_file_stat 52 2 Code RX prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193F2E-34193F31 __SEGGER_RTL_X_file_bufsize 4 2 Code RX prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193F32-34193F89 _WriteBlocking 88 2 Code RX SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193F8A-34193FE1 SEGGER_RTT_WriteNoLock 88 2 Code RX SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34193FE2-34194009 SEGGER_RTT_Write 40 2 Code RX SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
3419400A-34194065 strnlen 92 2 Code RX strops.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34194066-34194095 __SEGGER_RTL_ascii_mbtowc 48 2 Code RX mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34194096-341940B5 __SEGGER_RTL_ascii_isctype 32 2 Code RX mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
341940B6-341940C1 __SEGGER_RTL_ascii_toupper 12 2 Code RX mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
341940C2-341940CD __SEGGER_RTL_ascii_tolower 12 2 Code RX mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
341940CE-341940ED __SEGGER_RTL_ascii_iswctype 32 2 Code RX mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
341940EE-341940F9 __SEGGER_RTL_ascii_towupper 12 2 Code RX mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
341940FA-34194105 __SEGGER_RTL_ascii_towlower 12 2 Code RX mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34194106-3419410C [.rodata.libc..L.str] 7 1 Cnst RO __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
3419410D-34194163 __SEGGER_RTL_c_locale_month_names 87 1 Cnst RO mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34194164-3419416A __SEGGER_RTL_c_locale_am_pm_indicator 7 1 Cnst RO mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
3419416B-34194179 __SEGGER_RTL_c_locale_date_time_format 15 1 Cnst RO mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
3419417A-341941E3 [.rodata..L.str.20] 106 1 Cnst RO blto2_FSBL_lto.o
341941E4-3419424D [.rodata..L.str.33] 106 1 Cnst RO blto2_FSBL_lto.o
3419424E-341942B7 [.rodata..L.str.98] 106 1 Cnst RO blto2_FSBL_lto.o
341942B8-341942F1 __SEGGER_RTL_c_locale_day_names 58 1 Cnst RO mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
341942F2-341942F3 [.rodata.libc..L.str] 2 1 Cnst RO mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
341942F4-341942F5 __SEGGER_RTL_data_utf8_period 2 1 Cnst RO mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
341942F6-3419430E [.rodata..L.str] 25 1 Cnst RO blto2_FSBL_lto.o
3419430F-34194377 [.rodata..L.str.50] 105 1 Cnst RO blto2_FSBL_lto.o
34194378-3419437C [.rodata.libc..L.str.1] 5 1 Cnst RO __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
3419437D-34194381 [.rodata.libc..L.str.2] 5 1 Cnst RO __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34194382-34194386 [.rodata.libc..L.str.3] 5 1 Cnst RO __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34194387-3419438B [.rodata.libc..L.str.4] 5 1 Cnst RO __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
3419438C-3419439C _DoInit._aInitStr 17 1 Cnst RO SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
3419439D-341943A5 [.rodata.libc..L.str] 9 1 Cnst RO SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
341943A6-341943AE __SEGGER_RTL_c_locale_date_format 9 1 Cnst RO mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
341943AF-341943B7 __SEGGER_RTL_c_locale_time_format 9 1 Cnst RO mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
341943B8-341943D4 __SEGGER_RTL_c_locale_abbrev_day_names 29 1 Cnst RO mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
341943D5-34194405 __SEGGER_RTL_c_locale_abbrev_month_names 49 1 Cnst RO mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34194406-34194406 __SEGGER_RTL_data_empty_string 1 1 Cnst RO mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34194407-34194413 __SEGGER_RTL_ascii_ctype_mask 13 1 Cnst RO mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34194414-34194417 [.init_array] 4 4 ---- -- STM32N6xx_Startup.o
34194418-34194483 [.rodata..L.str.23] 108 1 Cnst RO blto2_FSBL_lto.o
34194484-341944EF [.rodata..L.str.41] 108 1 Cnst RO blto2_FSBL_lto.o
341944F0-3419455B [.rodata..L.str.58] 108 1 Cnst RO blto2_FSBL_lto.o
3419455C-3419456B __SEGGER_RTL_hex_uc 16 1 Cnst RO prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
3419456C-3419457B __SEGGER_RTL_hex_lc 16 1 Cnst RO prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
3419457C-3419457F [.rodata.libc..L.str.5] 4 1 Cnst RO __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34194580-34194583 [.rodata.libc..L.str.6] 4 1 Cnst RO __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34194584-34194603 __SEGGER_RTL_ascii_ctype_map 128 1 Cnst RO mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34194604-34194627 __SEGGER_init_ctors 36 4 Code RX SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34194628-3419464B __SEGGER_init_table__ 36 4 Cnst RO [ Linker created ]
3419464C-34194677 __SEGGER_init_data__ 44 4 Cnst RO [ Linker created ]
34194678-34194689 __SEGGER_init_zero 18 2 Code RX SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
3419468A-3419469D __SEGGER_init_copy 20 2 Code RX SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)

UNUSED MEMORY SUMMARY

Detail

Range Size Reason
34000791-34061FFF 399 471 Unused memory between sections '.data.uwTickFreq' and '.bss.block.stack'

INITIALIZATION TABLE

Constructor list

Table
Address
Called
Address
Called
Symbol or [section] name
0x34194414 0x34181545 SystemCoreClockUpdate

Initialize by zero

Initialize by copy with packing=none

Range Size Symbol or [section] name
34000000-340000AB 172 extmem_list_config
340000AC-34000153 168 _SEGGER_RTT
34000154-340001CB 120 sfdp_param_info
340001CC-3400023B 112 JEDEC_SCCR_Map
3400023C-3400029F 100 hxspi2
340002A0-340002FF 96 JEDEC_Basic
34000300-3400031F 32 JEDEC_OctalDdr
34000320-34000337 24 JEDEC_XSPI10
34000338-3400033F 8 JEDEC_Address4Bytes
34000340-34000343 4 uwTick
34000344-34000347 4 __SEGGER_RTL_stdout_file
34000348-3400034B 4 __SEGGER_RTL_stdin_file
3400034C-3400034F 4 __SEGGER_RTL_stderr_file
34000350-34000353 4 __SEGGER_RTL_locale_ptr
34000354-34000357 4 JumpToApplication.JumpToApp
34000358-34000757 1 024 _acUpBuffer
34000758-34000767 16 _acDownBuffer
34000000-34000767 1 896 Total (17 sections)

Summary

Range Size Symbol or [section] name
34000768-3400077B 20 __SEGGER_RTL_global_locale
3400077C-3400077F 4 uwTickPrio
34000780-34000783 4 stdout
34000784-34000787 4 stdin
34000788-3400078B 4 stderr
3400078C-3400078F 4 SystemCoreClock
34000790-34000790 1 uwTickFreq
34000768-34000790 41 Total (7 sections)
Description Size
Initialization table 36 bytes
Source image 41 bytes
Destination image 1 937 bytes
Saving 1 860 bytes

LINKER-CREATED VENEERS

Arm-Arm range extension veneers

Veneer Size Target Source
0 Total

Thumb-Thumb range extension veneers

Veneer Size Target Source
0 Total

Arm-Thumb mode switch veneers

Veneer Size Target Source
0 Total

Thumb-Arm mode switch veneers

Veneer Size Target Source
0 Total

Summary

Veneer Type Size
Thumb-Arm mode switch 0
Arm-Thumb mode switch 0
Thumb-Thumb range extension 0
Arm-Arm range extension 0
Total: 0

SYMBOL LIST

Function symbols by name

Symbol name Address Size Align Type Bd Object File
ADC1_2_IRQHandler 0x3418F193 2 Code Wk stm32n657xx_Vectors.o
ADF1_FLT0_IRQHandler 0x341939BB 2 Code Wk stm32n657xx_Vectors.o
BCK_ECC_IRQHandler 0x3418DCA3 2 Code Wk stm32n657xx_Vectors.o
BOOT_Application 0x341929D5 34 4 Code Lc blto2_FSBL_lto.o
BusFault_Handler 0x3418DCB1 2 4 Code Gb blto2_FSBL_lto.o
CACHEAXI_IRQHandler 0x341901DF 2 Code Wk stm32n657xx_Vectors.o
CACHE_ECC_IRQHandler 0x3418DC73 2 Code Wk stm32n657xx_Vectors.o
CRYP_IRQHandler 0x3418E607 2 Code Wk stm32n657xx_Vectors.o
CSI_IRQHandler 0x3418F1A3 2 Code Wk stm32n657xx_Vectors.o
CTI_INT0_IRQHandler 0x34193B4B 2 Code Wk stm32n657xx_Vectors.o
CTI_INT1_IRQHandler 0x34193B4D 2 Code Wk stm32n657xx_Vectors.o
CheckSFDP_Signature 0x3418BDA9 80 4 Code Lc blto2_FSBL_lto.o
DCMIPP_IRQHandler 0x3418F27F 2 Code Wk stm32n657xx_Vectors.o
DCMI_PSSI_IRQHandler 0x34193B47 2 Code Wk stm32n657xx_Vectors.o
DMA2D_IRQHandler 0x3419022B 2 Code Wk stm32n657xx_Vectors.o
DTS_IRQHandler 0x3418DABF 2 Code Wk stm32n657xx_Vectors.o
DebugMon_Handler 0x3418DCBD 2 4 Code Gb blto2_FSBL_lto.o
ETH1_IRQHandler 0x34193B35 2 Code Wk stm32n657xx_Vectors.o
EXTI0_IRQHandler 0x3418DF43 2 Code Wk stm32n657xx_Vectors.o
EXTI10_IRQHandler 0x3418E32F 2 Code Wk stm32n657xx_Vectors.o
EXTI11_IRQHandler 0x3418E36F 2 Code Wk stm32n657xx_Vectors.o
EXTI12_IRQHandler 0x3418E3BF 2 Code Wk stm32n657xx_Vectors.o
EXTI13_IRQHandler 0x3418E427 2 Code Wk stm32n657xx_Vectors.o
EXTI14_IRQHandler 0x3418E49B 2 Code Wk stm32n657xx_Vectors.o
EXTI15_IRQHandler 0x3418E50F 2 Code Wk stm32n657xx_Vectors.o
EXTI1_IRQHandler 0x3418DF67 2 Code Wk stm32n657xx_Vectors.o
EXTI2_IRQHandler 0x3418DF8B 2 Code Wk stm32n657xx_Vectors.o
EXTI3_IRQHandler 0x3418DFAF 2 Code Wk stm32n657xx_Vectors.o
EXTI4_IRQHandler 0x3418E02F 2 Code Wk stm32n657xx_Vectors.o
EXTI5_IRQHandler 0x3418E04B 2 Code Wk stm32n657xx_Vectors.o
EXTI6_IRQHandler 0x3418E087 2 Code Wk stm32n657xx_Vectors.o
EXTI7_IRQHandler 0x3418E09B 2 Code Wk stm32n657xx_Vectors.o
EXTI8_IRQHandler 0x3418E197 2 Code Wk stm32n657xx_Vectors.o
EXTI9_IRQHandler 0x3418E2EF 2 Code Wk stm32n657xx_Vectors.o
EXTMEM_DRIVER_NOR_SFDP_DeInit 0x3418D001 16 4 Code Lc blto2_FSBL_lto.o
EXTMEM_DRIVER_NOR_SFDP_Disable_MemoryMappedMode 0x3418D011 36 4 Code Lc blto2_FSBL_lto.o
EXTMEM_DRIVER_NOR_SFDP_Enable_MemoryMappedMode 0x34193345 58 4 Code Lc blto2_FSBL_lto.o
EXTMEM_DRIVER_NOR_SFDP_Init 0x34193211 306 4 Code Lc blto2_FSBL_lto.o
EXTMEM_DeInit 0x3419392D 78 4 Code Lc blto2_FSBL_lto.o
EXTMEM_GetMapAddress 0x3418D579 196 4 Code Lc blto2_FSBL_lto.o
EXTMEM_Init 0x341938CD 94 4 Code Lc blto2_FSBL_lto.o
EXTMEM_MemoryMappedMode 0x3418D4ED 140 4 Code Lc blto2_FSBL_lto.o
Error_Handler 0x3418074D 4 4 Code Lc blto2_FSBL_lto.o
FDCAN1_IT0_IRQHandler 0x34193B37 2 Code Wk stm32n657xx_Vectors.o
FDCAN1_IT1_IRQHandler 0x34193B39 2 Code Wk stm32n657xx_Vectors.o
FDCAN2_IT0_IRQHandler 0x34193B3B 2 Code Wk stm32n657xx_Vectors.o
FDCAN2_IT1_IRQHandler 0x34193B3D 2 Code Wk stm32n657xx_Vectors.o
FDCAN3_IT0_IRQHandler 0x34193B3F 2 Code Wk stm32n657xx_Vectors.o
FDCAN3_IT1_IRQHandler 0x34193B41 2 Code Wk stm32n657xx_Vectors.o
FDCAN_CU_IRQHandler 0x34193B43 2 Code Wk stm32n657xx_Vectors.o
FMC_IRQHandler 0x34193B29 2 Code Wk stm32n657xx_Vectors.o
FPU_IRQHandler 0x3418DCA7 2 Code Wk stm32n657xx_Vectors.o
GFXMMU_IRQHandler 0x3419025B 2 Code Wk stm32n657xx_Vectors.o
GFXTIM_IRQHandler 0x3419026B 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel0_IRQHandler 0x34190C1F 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel10_IRQHandler 0x341918EF 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel11_IRQHandler 0x34191973 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel12_IRQHandler 0x341919F7 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel13_IRQHandler 0x34191A7B 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel14_IRQHandler 0x34191AFF 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel15_IRQHandler 0x34191B17 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel1_IRQHandler 0x34190CA7 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel2_IRQHandler 0x34190D87 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel3_IRQHandler 0x34190E57 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel4_IRQHandler 0x34190F93 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel5_IRQHandler 0x34191257 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel6_IRQHandler 0x3419151B 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel7_IRQHandler 0x341915F7 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel8_IRQHandler 0x34191677 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel9_IRQHandler 0x341918D7 2 Code Wk stm32n657xx_Vectors.o
GPU2D_ER_IRQHandler 0x3419028B 2 Code Wk stm32n657xx_Vectors.o
GPU2D_IRQHandler 0x3419027B 2 Code Wk stm32n657xx_Vectors.o
HAL_BSEC_OTP_Program 0x3418E199 342 4 Code Lc blto2_FSBL_lto.o
HAL_BSEC_OTP_Read 0x34181A01 124 4 Code Lc blto2_FSBL_lto.o
HAL_BSEC_OTP_Reload 0x3418E09D 250 4 Code Lc blto2_FSBL_lto.o
HAL_DMA_Abort 0x34181BE5 244 4 Code Lc blto2_FSBL_lto.o
HAL_Delay 0x3418E04D 58 4 Code Lc blto2_FSBL_lto.o
HAL_GPIO_Init 0x34181CD9 1 928 4 Code Lc blto2_FSBL_lto.o
HAL_GPIO_WritePin 0x3418E3C1 102 4 Code Lc blto2_FSBL_lto.o
HAL_GetTick 0x341819F5 12 4 Code Lc blto2_FSBL_lto.o
HAL_IncTick 0x3418E031 26 4 Code Lc blto2_FSBL_lto.o
HAL_Init 0x341819C5 48 4 Code Lc blto2_FSBL_lto.o
HAL_InitTick 0x3418DFB1 126 4 Code Lc blto2_FSBL_lto.o
HAL_MspInit 0x34181535 8 4 Code Lc blto2_FSBL_lto.o
HAL_NVIC_SetPriority 0x34181AB9 168 4 Code Lc blto2_FSBL_lto.o
HAL_NVIC_SetPriorityGrouping 0x3418E2F1 62 4 Code Lc blto2_FSBL_lto.o
HAL_PWREx_ConfigSupply 0x3418E429 114 4 Code Lc blto2_FSBL_lto.o
HAL_PWREx_ConfigVddIORange 0x3418E511 226 4 Code Lc blto2_FSBL_lto.o
HAL_PWREx_ControlVoltageScaling 0x3418E49D 114 4 Code Lc blto2_FSBL_lto.o
HAL_PWREx_EnableVddIO3 0x3418E5F5 18 4 Code Lc blto2_FSBL_lto.o
HAL_RCCEx_GetPLL1CLKFreq 0x341918F1 130 4 Code Lc blto2_FSBL_lto.o
HAL_RCCEx_GetPLL2CLKFreq 0x34191975 130 4 Code Lc blto2_FSBL_lto.o
HAL_RCCEx_GetPLL3CLKFreq 0x341919F9 130 4 Code Lc blto2_FSBL_lto.o
HAL_RCCEx_GetPLL4CLKFreq 0x34191A7D 130 4 Code Lc blto2_FSBL_lto.o
HAL_RCCEx_GetPeriphCLKFreq 0x3419040D 1 626 4 Code Lc blto2_FSBL_lto.o
HAL_RCCEx_PeriphCLKConfig 0x34182845 24 268 4 Code Lc blto2_FSBL_lto.o
HAL_RCC_ClockConfig 0x3418F631 2 498 4 Code Lc blto2_FSBL_lto.o
HAL_RCC_GetClockConfig 0x34182755 240 4 Code Lc blto2_FSBL_lto.o
HAL_RCC_GetCpuClockFreq 0x341900F1 238 4 Code Lc blto2_FSBL_lto.o
HAL_RCC_GetSysClockFreq 0x341901F9 26 4 Code Lc blto2_FSBL_lto.o
HAL_RCC_OscConfig 0x3418E619 2 810 4 Code Lc blto2_FSBL_lto.o
HAL_SYSTICK_Config 0x34181BD5 16 4 Code Lc blto2_FSBL_lto.o
HAL_SuspendTick 0x3418E089 18 4 Code Lc blto2_FSBL_lto.o
HAL_XSPIM_Config 0x34192591 878 4 Code Lc blto2_FSBL_lto.o
HAL_XSPI_Abort 0x34192499 246 4 Code Lc blto2_FSBL_lto.o
HAL_XSPI_AutoPolling 0x341921B5 406 4 Code Lc blto2_FSBL_lto.o
HAL_XSPI_Command 0x34191C7D 1 106 4 Code Lc blto2_FSBL_lto.o
HAL_XSPI_Init 0x3418B0ED 1 548 4 Code Lc blto2_FSBL_lto.o
HAL_XSPI_MemoryMapped 0x3419234D 330 4 Code Lc blto2_FSBL_lto.o
HAL_XSPI_MspInit 0x34181881 324 4 Code Lc blto2_FSBL_lto.o
HAL_XSPI_Receive 0x3418BAFD 300 4 Code Lc blto2_FSBL_lto.o
HAL_XSPI_SetTimeout 0x34191C69 18 4 Code Lc blto2_FSBL_lto.o
HAL_XSPI_Transmit 0x341920D1 226 4 Code Lc blto2_FSBL_lto.o
HASH_IRQHandler 0x3418F113 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel0_IRQHandler 0x341902B3 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel10_IRQHandler 0x341903AB 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel11_IRQHandler 0x341903C3 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel12_IRQHandler 0x341903DB 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel13_IRQHandler 0x341903F3 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel14_IRQHandler 0x3419040B 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel15_IRQHandler 0x34190A67 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel1_IRQHandler 0x341902D3 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel2_IRQHandler 0x341902EB 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel3_IRQHandler 0x34190303 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel4_IRQHandler 0x3419031B 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel5_IRQHandler 0x34190333 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel6_IRQHandler 0x3419034B 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel7_IRQHandler 0x34190363 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel8_IRQHandler 0x3419037B 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel9_IRQHandler 0x34190393 2 Code Wk stm32n657xx_Vectors.o
HardFault_Handler 0x3418DCA9 2 4 Code Gb blto2_FSBL_lto.o
I2C1_ER_IRQHandler 0x34191B47 2 Code Wk stm32n657xx_Vectors.o
I2C1_EV_IRQHandler 0x34191B2F 2 Code Wk stm32n657xx_Vectors.o
I2C2_ER_IRQHandler 0x34191B77 2 Code Wk stm32n657xx_Vectors.o
I2C2_EV_IRQHandler 0x34191B5F 2 Code Wk stm32n657xx_Vectors.o
I2C3_ER_IRQHandler 0x34191BA7 2 Code Wk stm32n657xx_Vectors.o
I2C3_EV_IRQHandler 0x34191B8F 2 Code Wk stm32n657xx_Vectors.o
I2C4_ER_IRQHandler 0x34191BD7 2 Code Wk stm32n657xx_Vectors.o
I2C4_EV_IRQHandler 0x34191BBF 2 Code Wk stm32n657xx_Vectors.o
I3C1_ER_IRQHandler 0x34191C07 2 Code Wk stm32n657xx_Vectors.o
I3C1_EV_IRQHandler 0x34191BEF 2 Code Wk stm32n657xx_Vectors.o
I3C2_ER_IRQHandler 0x34191C37 2 Code Wk stm32n657xx_Vectors.o
I3C2_EV_IRQHandler 0x34191C1F 2 Code Wk stm32n657xx_Vectors.o
IAC_IRQHandler 0x3418DCB7 2 Code Wk stm32n657xx_Vectors.o
ICACHE_IRQHandler 0x3419029F 2 Code Wk stm32n657xx_Vectors.o
IWDG_IRQHandler 0x3418DCC3 2 Code Wk stm32n657xx_Vectors.o
JEDEC_Basic_Manage4S4S4SEnableSequence 0x3418CD99 132 4 Code Lc blto2_FSBL_lto.o
JEDEC_Basic_ManageQuadEnableRequirement 0x34192E71 338 4 Code Lc blto2_FSBL_lto.o
JPEG_IRQHandler 0x3419023B 2 Code Wk stm32n657xx_Vectors.o
JumpToApplication 0x3418BC45 356 4 Code Lc blto2_FSBL_lto.o
LL_AHB4_GRP1_EnableClock 0x3418DAC1 34 4 Code Lc blto2_FSBL_lto.o
LL_AHB4_GRP1_EnableClock.8 0x3418DF69 34 4 Code Lc blto2_FSBL_lto.o
LL_AHB5_GRP1_EnableClock 0x3418DF8D 34 4 Code Lc blto2_FSBL_lto.o
LL_AHB5_GRP1_IsEnabledClock 0x3418BC29 28 4 Code Lc blto2_FSBL_lto.o
LL_APB4_GRP2_EnableClock 0x3418DC75 34 4 Code Lc blto2_FSBL_lto.o
LL_APB4_GRP2_EnableClock.7 0x3418DF45 34 4 Code Lc blto2_FSBL_lto.o
LL_RCC_CLKP_Enable 0x3419025D 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_CLKP_IsEnabled 0x3418B0BD 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetADCClockSource 0x341902D5 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetADCPrescaler 0x34188A75 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetADFClockSource 0x341902ED 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetAHBPrescaler.90 0x3418AE2D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetAPB1Prescaler.92 0x3418AF05 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetAPB2Prescaler.91 0x3418AEF5 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetAPB4Prescaler.93 0x3418AF51 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetAPB5Prescaler.95 0x3418B00D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetCLKPClockSource 0x34190305 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetClockSource 0x34188B35 48 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetCpuClkSource 0x3418248D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetDCMIPPClockSource 0x3419031D 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetETH1PTPDivider 0x34188A85 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetETHClockSource 0x34190335 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetETHPTPClockSource 0x3419034D 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetFDCANClockSource 0x34190365 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetFMCClockSource 0x3419037D 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetI2CClockSource 0x34188A95 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetI3CClockSource 0x34188AA5 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetLPTIMClockSource 0x34188AB5 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetLPUARTClockSource 0x34190395 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetLTDCClockSource 0x341903AD 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetMDFClockSource 0x341903C5 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetPSSIClockSource 0x341903DD 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetRTCClockSource 0x34188711 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetSAIClockSource 0x34188AC5 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetSDMMCClockSource 0x34188AD5 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetSPDIFRXClockSource 0x341903F5 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetSPIClockSource 0x34188AE5 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetSysClkSource 0x3418249D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetTIMPrescaler 0x34188AF5 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetUARTClockSource 0x3418AE6D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetUSARTClockSource 0x34188B05 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetUSBClockSource 0x3418AE3D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetXSPIClockSource 0x34188B25 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSE_IsReady 0x3418260D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSE_IsReady.80 0x3418AC6D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSE_IsSelectedHSEDiv2AsDiv2Clock 0x34188B15 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSE_SelectHSEAsDiv2Clock 0x341902A1 18 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSE_SelectHSEDiv2AsDiv2Clock 0x3419028D 18 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSI_Disable 0x3418F135 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSI_Enable 0x3418E609 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSI_GetDivider 0x3418261D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSI_GetDivider.78 0x3418AC3D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSI_IsReady 0x3418247D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSI_IsReady.77 0x3418AC2D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSI_SetCalibTrimming 0x3418F115 30 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSI_SetDivider 0x34182461 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC10_Enable.61 0x34188769 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC10_GetDivider 0x34191BD9 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC10_GetSource 0x3418B02D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC10_IsEnabled 0x3418B01D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC11_GetSource 0x34182579 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC12_Enable 0x34188859 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC12_GetDivider 0x34191C21 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC12_GetSource 0x3418B08D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC12_IsEnabled 0x3418B07D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC13_Enable 0x341888D9 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC13_GetDivider 0x34191C09 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC13_GetSource 0x3418B06D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC13_IsEnabled 0x3418B05D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC14_Enable 0x34188945 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC14_GetDivider 0x34191B49 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC14_GetSource 0x3418AEE5 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC14_IsEnabled 0x3418AED5 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC15_Enable.62 0x34188779 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC15_GetDivider 0x34191B19 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC15_GetSource 0x3418AE5D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC15_IsEnabled 0x3418AE4D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC16_Enable 0x34188971 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC16_GetDivider 0x34191BC1 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC16_GetSource 0x3418AFFD 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC16_IsEnabled 0x3418AFED 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC17_Enable 0x3418882D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC17_GetDivider 0x34191C39 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC17_GetSource 0x3418B0AD 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC17_IsEnabled 0x3418B09D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC18_Enable 0x3418881D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC18_GetDivider 0x34191C51 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC18_GetSource 0x3418B0DD 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC18_IsEnabled 0x3418B0CD 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC19_Enable 0x34188789 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC19_GetDivider 0x34191BF1 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC19_GetSource 0x3418B04D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC19_IsEnabled 0x3418B03D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC1_Enable 0x341900E1 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC1_GetDivider 0x341901E1 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC1_GetSource 0x34182549 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC20_Enable.63 0x34188799 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC20_GetDivider 0x34191BA9 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC20_GetSource 0x3418AFC1 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC20_IsEnabled 0x3418AFB1 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC2_GetDivider 0x34190215 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC2_GetSource 0x34182559 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC3_Enable 0x3419023D 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC3_GetDivider 0x341918D9 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC3_GetSource 0x3418AA59 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC3_IsEnabled 0x3418AA49 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC4_Enable 0x3419024D 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC4_GetDivider 0x34191B01 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC4_GetSource 0x3418AA79 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC4_IsEnabled 0x3418AA69 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC5_Enable.60 0x3419022D 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC5_GetDivider 0x34191B91 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC5_GetSource 0x3418AF91 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC5_IsEnabled 0x3418AF81 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC6_GetSource 0x34182569 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC7_Enable 0x3419026D 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC7_GetDivider 0x34191B79 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC7_GetSource 0x3418AF71 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC7_IsEnabled 0x3418AF61 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC8_Enable 0x3419027D 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC8_GetDivider 0x34191B61 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC8_GetSource 0x3418AF41 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC8_IsEnabled 0x3418AF31 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC9_Enable 0x34188935 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC9_GetDivider 0x34191B31 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC9_GetSource 0x3418AEC5 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC9_IsEnabled 0x3418AEB5 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_LSE_IsReady 0x34182529 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_LSE_IsReady.59 0x34188721 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_LSI_Disable 0x3418F195 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_LSI_Enable 0x3418F185 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_LSI_IsReady 0x34182519 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_LSI_IsReady.94 0x3418AFA1 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_MSI_Disable 0x3418F175 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_MSI_Enable 0x3418F165 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_MSI_GetFrequency 0x3418AC5D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_MSI_IsReady 0x34182509 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_MSI_IsReady.79 0x3418AC4D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_MSI_SetCalibTrimming 0x3418F145 30 4 Code Lc blto2_FSBL_lto.o
LL_RCC_MSI_SetFrequency 0x341824ED 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1P_IsEnabled 0x3418ADAD 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_GetFRACN 0x3418ADED 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_GetM 0x3418ADCD 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_GetN 0x3418ADDD 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_GetP1 0x3418ADFD 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_GetP2 0x3418AE0D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_GetSource 0x341824AD 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_GetSource.88 0x3418ADBD 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_IsEnabledBypass 0x3418262D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_IsEnabledBypass.89 0x3418AE1D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_IsReady 0x34182539 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_IsReady.87 0x3418AD9D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2P_IsEnabled 0x3418AD1D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_GetFRACN 0x3418AD5D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_GetM 0x3418AD3D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_GetN 0x3418AD4D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_GetP1 0x3418AD6D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_GetP2 0x3418AD7D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_GetSource 0x341824BD 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_GetSource.85 0x3418AD2D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_IsEnabledBypass 0x3418263D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_IsEnabledBypass.86 0x3418AD8D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_IsReady 0x34182589 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_IsReady.84 0x3418AD0D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3P_IsEnabled 0x3418AC8D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_GetFRACN 0x3418ACCD 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_GetM 0x3418ACAD 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_GetN 0x3418ACBD 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_GetP1 0x3418ACDD 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_GetP2 0x3418ACED 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_GetSource 0x341824CD 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_GetSource.82 0x3418AC9D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_IsEnabledBypass 0x3418264D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_IsEnabledBypass.83 0x3418ACFD 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_IsReady 0x34182599 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_IsReady.81 0x3418AC7D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4P_IsEnabled 0x3418AA99 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_GetFRACN 0x3418AB65 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_GetM 0x3418AB45 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_GetN 0x3418AB55 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_GetP1 0x3418AB75 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_GetP2 0x3418AB85 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_GetSource 0x341824DD 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_GetSource.75 0x3418AAA9 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_IsEnabledBypass 0x3418265D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_IsEnabledBypass.76 0x3418AC1D 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_IsReady 0x341825A9 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_IsReady.74 0x3418AA89 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetADFClockSource 0x34188801 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetCLKPClockSource 0x341887A9 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetClockSource 0x34188A41 52 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetDCMIPPClockSource 0x3418883D 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetETHClockSource 0x34188869 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetETHPHYInterface 0x34188885 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetETHREFRXClockSource 0x341888A1 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetETHREFTXClockSource 0x341888BD 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetFDCANClockSource 0x341888E9 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetFMCClockSource 0x341887D5 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetI2CClockSource 0x34188905 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetI3CClockSource 0x34188915 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetLPTIMClockSource 0x34188925 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetLPUARTClockSource 0x34188955 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetLTDCClockSource 0x34188981 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetMDFClockSource 0x3418899D 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetOTGPHYCKREFClockSource 0x34188A31 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetOTGPHYClockSource 0x34188A21 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetPSSIClockSource 0x341889B9 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetRTCClockSource 0x3418874D 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetRTC_HSEPrescaler 0x34188731 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetSAIClockSource 0x341889D5 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetSDMMCClockSource 0x341887F1 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetSPDIFRXClockSource 0x341889E5 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetSPIClockSource 0x34188A01 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetTIMPrescaler 0x341902B5 30 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetUSARTClockSource 0x34188A11 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetXSPIClockSource 0x341887C5 16 4 Code Lc blto2_FSBL_lto.o
LOCKUP_IRQHandler 0x3418DBE3 2 Code Wk stm32n657xx_Vectors.o
LPTIM1_IRQHandler 0x3419389F 2 Code Wk stm32n657xx_Vectors.o
LPTIM2_IRQHandler 0x341938B7 2 Code Wk stm32n657xx_Vectors.o
LPTIM3_IRQHandler 0x341938CB 2 Code Wk stm32n657xx_Vectors.o
LPTIM4_IRQHandler 0x3419392B 2 Code Wk stm32n657xx_Vectors.o
LPTIM5_IRQHandler 0x3419397B 2 Code Wk stm32n657xx_Vectors.o
LPUART1_IRQHandler 0x34193B21 2 Code Wk stm32n657xx_Vectors.o
LTDC_LO_ERR_IRQHandler 0x34190213 2 Code Wk stm32n657xx_Vectors.o
LTDC_LO_IRQHandler 0x341901F7 2 Code Wk stm32n657xx_Vectors.o
LTDC_UP_ERR_IRQHandler 0x34193B51 2 Code Wk stm32n657xx_Vectors.o
LTDC_UP_IRQHandler 0x34193B4F 2 Code Wk stm32n657xx_Vectors.o
MCE1_IRQHandler 0x3418F143 2 Code Wk stm32n657xx_Vectors.o
MCE2_IRQHandler 0x3418F163 2 Code Wk stm32n657xx_Vectors.o
MCE3_IRQHandler 0x3418F173 2 Code Wk stm32n657xx_Vectors.o
MCE4_IRQHandler 0x3418F183 2 Code Wk stm32n657xx_Vectors.o
MDF1_FLT0_IRQHandler 0x34193AEB 2 Code Wk stm32n657xx_Vectors.o
MDF1_FLT1_IRQHandler 0x34193AED 2 Code Wk stm32n657xx_Vectors.o
MDF1_FLT2_IRQHandler 0x34193AEF 2 Code Wk stm32n657xx_Vectors.o
MDF1_FLT3_IRQHandler 0x34193AF1 2 Code Wk stm32n657xx_Vectors.o
MDF1_FLT4_IRQHandler 0x34193AF3 2 Code Wk stm32n657xx_Vectors.o
MDF1_FLT5_IRQHandler 0x34193AF5 2 Code Wk stm32n657xx_Vectors.o
MDIOS_IRQHandler 0x34193B45 2 Code Wk stm32n657xx_Vectors.o
MX_BSEC_Init 0x3418D9DD 2 4 Code Lc blto2_FSBL_lto.o
MX_EXTMEM_MANAGER_Init 0x3418D9F9 62 4 Code Lc blto2_FSBL_lto.o
MX_GPIO_Init 0x3418DA39 134 4 Code Lc blto2_FSBL_lto.o
MX_XSPI2_Init 0x3418DEC5 126 4 Code Lc blto2_FSBL_lto.o
MapMemory 0x341929F9 94 4 Code Lc blto2_FSBL_lto.o
MemManage_Handler 0x3418DCAD 2 4 Code Gb blto2_FSBL_lto.o
NMI_Handler 0x3418DCA5 2 4 Code Gb blto2_FSBL_lto.o
NPU0_IRQHandler 0x3418F62F 2 Code Wk stm32n657xx_Vectors.o
NPU1_IRQHandler 0x3418FFF3 2 Code Wk stm32n657xx_Vectors.o
NPU2_IRQHandler 0x341900DF 2 Code Wk stm32n657xx_Vectors.o
NPU3_IRQHandler 0x341900EF 2 Code Wk stm32n657xx_Vectors.o
NVIC_EncodePriority 0x34181B71 100 4 Code Lc blto2_FSBL_lto.o
OTP_Config 0x3418DBE5 142 4 Code Lc blto2_FSBL_lto.o
PAHB_ERR_IRQHandler 0x3418F5CF 2 Code Wk stm32n657xx_Vectors.o
PKA_IRQHandler 0x3418E617 2 Code Wk stm32n657xx_Vectors.o
PVD_PVM_IRQHandler 0x3418DA37 2 Code Wk stm32n657xx_Vectors.o
PendSV_Handler 0x3418DCC1 2 4 Code Gb blto2_FSBL_lto.o
RCCEx_CalcPLLFreq 0x3418AB95 136 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetADCCLKFreq 0x34190A69 438 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetADFCLKFreq 0x34188B65 388 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetCLKPCLKFreq 0x34188CE9 736 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetCSICLKFreq 0x34190C21 134 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetDCMIPPCLKFreq 0x34188FC9 228 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetETH1CLKFreq 0x341890AD 216 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetETH1PTPCLKFreq 0x34190CA9 222 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetFDCANCLKFreq 0x34190D89 206 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetFMCCLKFreq 0x34190E59 314 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetHCLKFreq 0x3418AA2D 28 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetI2CCLKFreq 0x34190F95 706 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetI3CCLKFreq 0x34189185 516 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetLPTIMCLKFreq 0x34191259 706 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetLPUARTCLKFreq 0x34189389 412 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetLTDCCLKFreq 0x34189525 228 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetMDFCLKFreq 0x34189609 436 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetOTGPHYCKREFCLKFreq 0x3418A7D5 148 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetOTGPHYCLKFreq 0x3418A691 324 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetPCLK1Freq 0x3418AE7D 28 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetPCLK2Freq 0x3418AE99 28 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetPCLK4Freq 0x3418AF15 28 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetPCLK5Freq 0x3418AFD1 28 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetPLLSourceFreq 0x3418AAB9 140 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetPSSICLKFreq 0x3419151D 218 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetRTCCLKFreq 0x341915F9 126 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetSAICLKFreq 0x34191679 606 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetSDMMCCLKFreq 0x341897BD 396 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetSPDIFRXCLKFreq 0x34189949 372 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetSPICLKFreq 0x34189ABD 1 196 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetUARTCLKFreq 0x3418A2FD 916 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetUSARTCLKFreq 0x34189F69 916 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetXSPICLKFreq 0x3418A869 452 4 Code Lc blto2_FSBL_lto.o
RCC_GetSysClockFreq 0x3418266D 232 4 Code Lc blto2_FSBL_lto.o
RCC_IC_CheckPLLSources 0x3418FFF5 234 4 Code Lc blto2_FSBL_lto.o
RCC_IRQHandler 0x3418DAE3 2 Code Wk stm32n657xx_Vectors.o
RCC_PLL_Config 0x3418F281 846 4 Code Lc blto2_FSBL_lto.o
RCC_PLL_Enable 0x3418F5D1 94 4 Code Lc blto2_FSBL_lto.o
RCC_PLL_IsNewConfig 0x3418F1A5 218 4 Code Lc blto2_FSBL_lto.o
RCC_PLL_Source_IsReady 0x341825B9 84 4 Code Lc blto2_FSBL_lto.o
RCC_S_IRQHandler 0x3418DCBB 2 Code Wk stm32n657xx_Vectors.o
RIFSC_TAMPER_IRQHandler 0x3418DCB3 2 Code Wk stm32n657xx_Vectors.o
RNG_IRQHandler 0x3418F133 2 Code Wk stm32n657xx_Vectors.o
RTC_IRQHandler 0x3418DCBF 2 Code Wk stm32n657xx_Vectors.o
RTC_S_IRQHandler 0x3418DCAB 2 Code Wk stm32n657xx_Vectors.o
Reset_Handler 0x3418D661 4 Code Gb STM32N6xx_Startup.o
SAES_IRQHandler 0x3418E5F3 2 Code Wk stm32n657xx_Vectors.o
SAI1_A_IRQHandler 0x34193AF7 2 Code Wk stm32n657xx_Vectors.o
SAI1_B_IRQHandler 0x34193AF9 2 Code Wk stm32n657xx_Vectors.o
SAI2_A_IRQHandler 0x34193AFB 2 Code Wk stm32n657xx_Vectors.o
SAI2_B_IRQHandler 0x34193AFD 2 Code Wk stm32n657xx_Vectors.o
SAL_XSPI_Abort 0x341938B9 18 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_CheckStatusRegister 0x3418D2C9 232 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_CommandSendData 0x3418D1B9 136 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_CommandSendReadAddress 0x341937E1 190 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_DisableMapMode 0x341938A1 22 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_EnableMapMode 0x3418D3B1 200 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_GetId 0x3418D101 152 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_GetSFDP 0x34193675 222 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_Init 0x34193381 86 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_MemoryConfig 0x341933D9 666 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_SendReadCommand 0x3418D241 136 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_SetClock 0x3418D035 116 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_UpdateMemoryType 0x3418D479 116 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_Write 0x34193755 138 4 Code Lc blto2_FSBL_lto.o
SDMMC1_IRQHandler 0x34193B2B 2 Code Wk stm32n657xx_Vectors.o
SDMMC2_IRQHandler 0x34193B2D 2 Code Wk stm32n657xx_Vectors.o
SEGGER_RTT_Write 0x34193FE3 40 2 Code Gb SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
SEGGER_RTT_WriteNoLock 0x34193F8B 88 2 Code Gb SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
SFDP_BuildGenericDriver 0x3418C185 3 092 4 Code Lc blto2_FSBL_lto.o
SFDP_CollectData 0x34192AD9 458 4 Code Lc blto2_FSBL_lto.o
SFDP_GetHeader 0x3418BDF9 256 4 Code Lc blto2_FSBL_lto.o
SFDP_MemoryReset 0x34192CA5 458 4 Code Lc blto2_FSBL_lto.o
SFDP_ReadHeader 0x34192A59 126 4 Code Lc blto2_FSBL_lto.o
SPDIFRX_IRQHandler 0x34193AFF 2 Code Wk stm32n657xx_Vectors.o
SPI1_IRQHandler 0x34193B01 2 Code Wk stm32n657xx_Vectors.o
SPI2_IRQHandler 0x34193B03 2 Code Wk stm32n657xx_Vectors.o
SPI3_IRQHandler 0x34193B05 2 Code Wk stm32n657xx_Vectors.o
SPI4_IRQHandler 0x34193B07 2 Code Wk stm32n657xx_Vectors.o
SPI5_IRQHandler 0x34193B09 2 Code Wk stm32n657xx_Vectors.o
SPI6_IRQHandler 0x34193B0B 2 Code Wk stm32n657xx_Vectors.o
SVC_Handler 0x3418DCB9 2 4 Code Gb blto2_FSBL_lto.o
SysTick_Config 0x3418E371 78 4 Code Lc blto2_FSBL_lto.o
SysTick_Handler 0x3418153D 8 4 Code Gb blto2_FSBL_lto.o
SystemClock_Config 0x3418DAE5 254 4 Code Lc blto2_FSBL_lto.o
SystemCoreClockUpdate 0x34181545 828 4 Code Gb blto2_FSBL_lto.o
SystemInit 0x3418DCC5 510 4 Code Gb blto2_FSBL_lto.o
TAMP_IRQHandler 0x3418DCAF 2 Code Wk stm32n657xx_Vectors.o
TCM_ECC_IRQHandler 0x3418DC97 2 Code Wk stm32n657xx_Vectors.o
TIM10_IRQHandler 0x34192FC3 2 Code Wk stm32n657xx_Vectors.o
TIM11_IRQHandler 0x341931A7 2 Code Wk stm32n657xx_Vectors.o
TIM12_IRQHandler 0x3419320F 2 Code Wk stm32n657xx_Vectors.o
TIM13_IRQHandler 0x34193343 2 Code Wk stm32n657xx_Vectors.o
TIM14_IRQHandler 0x3419337F 2 Code Wk stm32n657xx_Vectors.o
TIM15_IRQHandler 0x341933D7 2 Code Wk stm32n657xx_Vectors.o
TIM16_IRQHandler 0x34193673 2 Code Wk stm32n657xx_Vectors.o
TIM17_IRQHandler 0x34193753 2 Code Wk stm32n657xx_Vectors.o
TIM18_IRQHandler 0x341937DF 2 Code Wk stm32n657xx_Vectors.o
TIM1_BRK_IRQHandler 0x34191C4F 2 Code Wk stm32n657xx_Vectors.o
TIM1_CC_IRQHandler 0x341920CF 2 Code Wk stm32n657xx_Vectors.o
TIM1_TRG_CCU_IRQHandler 0x34191C7B 2 Code Wk stm32n657xx_Vectors.o
TIM1_UP_IRQHandler 0x34191C67 2 Code Wk stm32n657xx_Vectors.o
TIM2_IRQHandler 0x341921B3 2 Code Wk stm32n657xx_Vectors.o
TIM3_IRQHandler 0x3419234B 2 Code Wk stm32n657xx_Vectors.o
TIM4_IRQHandler 0x34192497 2 Code Wk stm32n657xx_Vectors.o
TIM5_IRQHandler 0x3419258F 2 Code Wk stm32n657xx_Vectors.o
TIM6_IRQHandler 0x341928FF 2 Code Wk stm32n657xx_Vectors.o
TIM7_IRQHandler 0x341929D3 2 Code Wk stm32n657xx_Vectors.o
TIM8_BRK_IRQHandler 0x341929F7 2 Code Wk stm32n657xx_Vectors.o
TIM8_CC_IRQHandler 0x34192CA3 2 Code Wk stm32n657xx_Vectors.o
TIM8_TRG_CCU_IRQHandler 0x34192AD7 2 Code Wk stm32n657xx_Vectors.o
TIM8_UP_IRQHandler 0x34192A57 2 Code Wk stm32n657xx_Vectors.o
TIM9_IRQHandler 0x34192E6F 2 Code Wk stm32n657xx_Vectors.o
UART4_IRQHandler 0x34193B13 2 Code Wk stm32n657xx_Vectors.o
UART5_IRQHandler 0x34193B15 2 Code Wk stm32n657xx_Vectors.o
UART7_IRQHandler 0x34193B19 2 Code Wk stm32n657xx_Vectors.o
UART8_IRQHandler 0x34193B1B 2 Code Wk stm32n657xx_Vectors.o
UART9_IRQHandler 0x34193B1D 2 Code Wk stm32n657xx_Vectors.o
UCPD1_IRQHandler 0x34193B2F 2 Code Wk stm32n657xx_Vectors.o
USART10_IRQHandler 0x34193B1F 2 Code Wk stm32n657xx_Vectors.o
USART1_IRQHandler 0x34193B0D 2 Code Wk stm32n657xx_Vectors.o
USART2_IRQHandler 0x34193B0F 2 Code Wk stm32n657xx_Vectors.o
USART3_IRQHandler 0x34193B11 2 Code Wk stm32n657xx_Vectors.o
USART6_IRQHandler 0x34193B17 2 Code Wk stm32n657xx_Vectors.o
USB1_OTG_HS_IRQHandler 0x34193B31 2 Code Wk stm32n657xx_Vectors.o
USB2_OTG_HS_IRQHandler 0x34193B33 2 Code Wk stm32n657xx_Vectors.o
UsageFault_Handler 0x3418DCB5 2 4 Code Gb blto2_FSBL_lto.o
VENC_IRQHandler 0x3419024B 2 Code Wk stm32n657xx_Vectors.o
WAKEUP_PIN_IRQHandler 0x34193B49 2 Code Wk stm32n657xx_Vectors.o
WWDG_IRQHandler 0x3418DEC3 2 Code Wk stm32n657xx_Vectors.o
XSPI1_IRQHandler 0x34193B23 2 Code Wk stm32n657xx_Vectors.o
XSPI2_IRQHandler 0x34193B25 2 Code Wk stm32n657xx_Vectors.o
XSPI3_IRQHandler 0x34193B27 2 Code Wk stm32n657xx_Vectors.o
XSPIM_GetConfig 0x34192901 210 4 Code Lc blto2_FSBL_lto.o
XSPI_ConfigCmd 0x3418B761 924 4 Code Lc blto2_FSBL_lto.o
XSPI_FormatCommand 0x3418D0A9 88 4 Code Lc blto2_FSBL_lto.o
XSPI_Transmit 0x3418D199 32 4 Code Lc blto2_FSBL_lto.o
XSPI_WaitFlagStateUntilTimeout 0x3418B6F9 104 4 Code Lc blto2_FSBL_lto.o
_DoInit 0x34193C3B 98 2 Code Lc SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
_GetAvailWriteSpace 0x34193C9D 22 2 Code Lc SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
_WriteBlocking 0x34193F33 88 2 Code Lc SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
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__SEGGER_RTL_vfprintf 0x341807F1 3 036 8 Code Gb __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_vfprintf_short_float_long_long 0x341807F1 3 036 8 Code Gb __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
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__SEGGER_init_ctors 0x34194605 26 4 Code Wk SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
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__SEGGER_init_zero 0x34194679 18 2 Code Wk SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__aeabi_f2ulz 0x3419397D 62 4 Code Wk floatasmops_arm.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__aeabi_memclr 0x3418D8F1 104 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__aeabi_memclr4 0x3418D8F1 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__aeabi_memclr8 0x3418D8F1 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__aeabi_memcpy 0x3418D895 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__aeabi_memcpy4 0x3418D8B3 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__aeabi_memcpy8 0x3418D8B3 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__aeabi_memset 0x3418D8F3 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__aeabi_memset4 0x3418D8F3 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__aeabi_memset8 0x3418D8F3 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__aeabi_ul2f 0x3418D841 84 4 Code Wk floatasmops_arm.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__aeabi_uldivmod 0x341939BD 302 4 Code Wk intasmops_arm.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__startup_complete 0x3418D657 4 Code Gb SEGGER_THUMB_Startup.o
_start 0x3418D64D 14 4 Code Gb SEGGER_THUMB_Startup.o
abs 0x34193D8B 8 2 Code Wk intops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
assert_failed 0x3418DC99 10 4 Code Lc blto2_FSBL_lto.o
driver_check_FlagBUSY 0x341931A9 102 4 Code Lc blto2_FSBL_lto.o
exit 0x3418D65B 2 4 Code Gb SEGGER_THUMB_Startup.o
floorf 0x3418D7C1 104 4 Code Wk floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
fmodf 0x3418D6A5 284 4 Code Wk floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
frexpf 0x34193D67 36 2 Code Wk floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
fwrite 0x34193B53 46 2 Code Wk fileops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
ldexpf 0x34193BA1 54 2 Code Wk floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
main 0x341813CD 360 4 Code Gb blto2_FSBL_lto.o
memcpy 0x3418D895 92 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
memset 0x3418D8F9 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
printf 0x34193ECF 44 2 Code Wk prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
reset_handler 0x3418D661 4 Code Gb STM32N6xx_Startup.o
sfdp_enter_octal_mode 0x34192FC5 482 4 Code Lc blto2_FSBL_lto.o
sfdp_get_paraminfo 0x3418BEF9 652 4 Code Lc blto2_FSBL_lto.o
sfdp_getfrequencevalue 0x3418CE1D 64 4 Code Lc blto2_FSBL_lto.o
sfdp_set_dummycycle 0x3418CE5D 420 4 Code Lc blto2_FSBL_lto.o
strlen 0x34193CED 42 2 Code Wk strops.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
strnlen 0x3419400B 92 2 Code Wk strops.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
vfprintf 0x34193E4B 28 2 Code Wk prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
vfprintf_l 0x34193E67 104 2 Code Wk prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)

Function symbols by address

Address Symbol name Size Align Type Bd Object File
0x3418074D Error_Handler 4 4 Code Lc blto2_FSBL_lto.o
0x341807F1 __SEGGER_RTL_vfprintf_short_float_long_long 3 036 8 Code Gb __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x341807F1 __SEGGER_RTL_vfprintf 3 036 8 Code Gb __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x341813CD main 360 4 Code Gb blto2_FSBL_lto.o
0x34181535 HAL_MspInit 8 4 Code Lc blto2_FSBL_lto.o
0x3418153D SysTick_Handler 8 4 Code Gb blto2_FSBL_lto.o
0x34181545 SystemCoreClockUpdate 828 4 Code Gb blto2_FSBL_lto.o
0x34181881 HAL_XSPI_MspInit 324 4 Code Lc blto2_FSBL_lto.o
0x341819C5 HAL_Init 48 4 Code Lc blto2_FSBL_lto.o
0x341819F5 HAL_GetTick 12 4 Code Lc blto2_FSBL_lto.o
0x34181A01 HAL_BSEC_OTP_Read 124 4 Code Lc blto2_FSBL_lto.o
0x34181A7D __NVIC_SetPriorityGrouping 60 4 Code Lc blto2_FSBL_lto.o
0x34181AB9 HAL_NVIC_SetPriority 168 4 Code Lc blto2_FSBL_lto.o
0x34181B61 __NVIC_GetPriorityGrouping 16 4 Code Lc blto2_FSBL_lto.o
0x34181B71 NVIC_EncodePriority 100 4 Code Lc blto2_FSBL_lto.o
0x34181BD5 HAL_SYSTICK_Config 16 4 Code Lc blto2_FSBL_lto.o
0x34181BE5 HAL_DMA_Abort 244 4 Code Lc blto2_FSBL_lto.o
0x34181CD9 HAL_GPIO_Init 1 928 4 Code Lc blto2_FSBL_lto.o
0x34182461 LL_RCC_HSI_SetDivider 28 4 Code Lc blto2_FSBL_lto.o
0x3418247D LL_RCC_HSI_IsReady 16 4 Code Lc blto2_FSBL_lto.o
0x3418248D LL_RCC_GetCpuClkSource 16 4 Code Lc blto2_FSBL_lto.o
0x3418249D LL_RCC_GetSysClkSource 16 4 Code Lc blto2_FSBL_lto.o
0x341824AD LL_RCC_PLL1_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x341824BD LL_RCC_PLL2_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x341824CD LL_RCC_PLL3_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x341824DD LL_RCC_PLL4_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x341824ED LL_RCC_MSI_SetFrequency 28 4 Code Lc blto2_FSBL_lto.o
0x34182509 LL_RCC_MSI_IsReady 16 4 Code Lc blto2_FSBL_lto.o
0x34182519 LL_RCC_LSI_IsReady 16 4 Code Lc blto2_FSBL_lto.o
0x34182529 LL_RCC_LSE_IsReady 16 4 Code Lc blto2_FSBL_lto.o
0x34182539 LL_RCC_PLL1_IsReady 16 4 Code Lc blto2_FSBL_lto.o
0x34182549 LL_RCC_IC1_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x34182559 LL_RCC_IC2_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x34182569 LL_RCC_IC6_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x34182579 LL_RCC_IC11_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x34182589 LL_RCC_PLL2_IsReady 16 4 Code Lc blto2_FSBL_lto.o
0x34182599 LL_RCC_PLL3_IsReady 16 4 Code Lc blto2_FSBL_lto.o
0x341825A9 LL_RCC_PLL4_IsReady 16 4 Code Lc blto2_FSBL_lto.o
0x341825B9 RCC_PLL_Source_IsReady 84 4 Code Lc blto2_FSBL_lto.o
0x3418260D LL_RCC_HSE_IsReady 16 4 Code Lc blto2_FSBL_lto.o
0x3418261D LL_RCC_HSI_GetDivider 16 4 Code Lc blto2_FSBL_lto.o
0x3418262D LL_RCC_PLL1_IsEnabledBypass 16 4 Code Lc blto2_FSBL_lto.o
0x3418263D LL_RCC_PLL2_IsEnabledBypass 16 4 Code Lc blto2_FSBL_lto.o
0x3418264D LL_RCC_PLL3_IsEnabledBypass 16 4 Code Lc blto2_FSBL_lto.o
0x3418265D LL_RCC_PLL4_IsEnabledBypass 16 4 Code Lc blto2_FSBL_lto.o
0x3418266D RCC_GetSysClockFreq 232 4 Code Lc blto2_FSBL_lto.o
0x34182755 HAL_RCC_GetClockConfig 240 4 Code Lc blto2_FSBL_lto.o
0x34182845 HAL_RCCEx_PeriphCLKConfig 24 268 4 Code Lc blto2_FSBL_lto.o
0x34188711 LL_RCC_GetRTCClockSource 16 4 Code Lc blto2_FSBL_lto.o
0x34188721 LL_RCC_LSE_IsReady.59 16 4 Code Lc blto2_FSBL_lto.o
0x34188731 LL_RCC_SetRTC_HSEPrescaler 28 4 Code Lc blto2_FSBL_lto.o
0x3418874D LL_RCC_SetRTCClockSource 28 4 Code Lc blto2_FSBL_lto.o
0x34188769 LL_RCC_IC10_Enable.61 16 4 Code Lc blto2_FSBL_lto.o
0x34188779 LL_RCC_IC15_Enable.62 16 4 Code Lc blto2_FSBL_lto.o
0x34188789 LL_RCC_IC19_Enable 16 4 Code Lc blto2_FSBL_lto.o
0x34188799 LL_RCC_IC20_Enable.63 16 4 Code Lc blto2_FSBL_lto.o
0x341887A9 LL_RCC_SetCLKPClockSource 28 4 Code Lc blto2_FSBL_lto.o
0x341887C5 LL_RCC_SetXSPIClockSource 16 4 Code Lc blto2_FSBL_lto.o
0x341887D5 LL_RCC_SetFMCClockSource 28 4 Code Lc blto2_FSBL_lto.o
0x341887F1 LL_RCC_SetSDMMCClockSource 16 4 Code Lc blto2_FSBL_lto.o
0x34188801 LL_RCC_SetADFClockSource 28 4 Code Lc blto2_FSBL_lto.o
0x3418881D LL_RCC_IC18_Enable 16 4 Code Lc blto2_FSBL_lto.o
0x3418882D LL_RCC_IC17_Enable 16 4 Code Lc blto2_FSBL_lto.o
0x3418883D LL_RCC_SetDCMIPPClockSource 28 4 Code Lc blto2_FSBL_lto.o
0x34188859 LL_RCC_IC12_Enable 16 4 Code Lc blto2_FSBL_lto.o
0x34188869 LL_RCC_SetETHClockSource 28 4 Code Lc blto2_FSBL_lto.o
0x34188885 LL_RCC_SetETHPHYInterface 28 4 Code Lc blto2_FSBL_lto.o
0x341888A1 LL_RCC_SetETHREFRXClockSource 28 4 Code Lc blto2_FSBL_lto.o
0x341888BD LL_RCC_SetETHREFTXClockSource 28 4 Code Lc blto2_FSBL_lto.o
0x341888D9 LL_RCC_IC13_Enable 16 4 Code Lc blto2_FSBL_lto.o
0x341888E9 LL_RCC_SetFDCANClockSource 28 4 Code Lc blto2_FSBL_lto.o
0x34188905 LL_RCC_SetI2CClockSource 16 4 Code Lc blto2_FSBL_lto.o
0x34188915 LL_RCC_SetI3CClockSource 16 4 Code Lc blto2_FSBL_lto.o
0x34188925 LL_RCC_SetLPTIMClockSource 16 4 Code Lc blto2_FSBL_lto.o
0x34188935 LL_RCC_IC9_Enable 16 4 Code Lc blto2_FSBL_lto.o
0x34188945 LL_RCC_IC14_Enable 16 4 Code Lc blto2_FSBL_lto.o
0x34188955 LL_RCC_SetLPUARTClockSource 28 4 Code Lc blto2_FSBL_lto.o
0x34188971 LL_RCC_IC16_Enable 16 4 Code Lc blto2_FSBL_lto.o
0x34188981 LL_RCC_SetLTDCClockSource 28 4 Code Lc blto2_FSBL_lto.o
0x3418899D LL_RCC_SetMDFClockSource 28 4 Code Lc blto2_FSBL_lto.o
0x341889B9 LL_RCC_SetPSSIClockSource 28 4 Code Lc blto2_FSBL_lto.o
0x341889D5 LL_RCC_SetSAIClockSource 16 4 Code Lc blto2_FSBL_lto.o
0x341889E5 LL_RCC_SetSPDIFRXClockSource 28 4 Code Lc blto2_FSBL_lto.o
0x34188A01 LL_RCC_SetSPIClockSource 16 4 Code Lc blto2_FSBL_lto.o
0x34188A11 LL_RCC_SetUSARTClockSource 16 4 Code Lc blto2_FSBL_lto.o
0x34188A21 LL_RCC_SetOTGPHYClockSource 16 4 Code Lc blto2_FSBL_lto.o
0x34188A31 LL_RCC_SetOTGPHYCKREFClockSource 16 4 Code Lc blto2_FSBL_lto.o
0x34188A41 LL_RCC_SetClockSource 52 4 Code Lc blto2_FSBL_lto.o
0x34188A75 LL_RCC_GetADCPrescaler 16 4 Code Lc blto2_FSBL_lto.o
0x34188A85 LL_RCC_GetETH1PTPDivider 16 4 Code Lc blto2_FSBL_lto.o
0x34188A95 LL_RCC_GetI2CClockSource 16 4 Code Lc blto2_FSBL_lto.o
0x34188AA5 LL_RCC_GetI3CClockSource 16 4 Code Lc blto2_FSBL_lto.o
0x34188AB5 LL_RCC_GetLPTIMClockSource 16 4 Code Lc blto2_FSBL_lto.o
0x34188AC5 LL_RCC_GetSAIClockSource 16 4 Code Lc blto2_FSBL_lto.o
0x34188AD5 LL_RCC_GetSDMMCClockSource 16 4 Code Lc blto2_FSBL_lto.o
0x34188AE5 LL_RCC_GetSPIClockSource 16 4 Code Lc blto2_FSBL_lto.o
0x34188AF5 LL_RCC_GetTIMPrescaler 16 4 Code Lc blto2_FSBL_lto.o
0x34188B05 LL_RCC_GetUSARTClockSource 16 4 Code Lc blto2_FSBL_lto.o
0x34188B15 LL_RCC_HSE_IsSelectedHSEDiv2AsDiv2Clock 16 4 Code Lc blto2_FSBL_lto.o
0x34188B25 LL_RCC_GetXSPIClockSource 16 4 Code Lc blto2_FSBL_lto.o
0x34188B35 LL_RCC_GetClockSource 48 4 Code Lc blto2_FSBL_lto.o
0x34188B65 RCCEx_GetADFCLKFreq 388 4 Code Lc blto2_FSBL_lto.o
0x34188CE9 RCCEx_GetCLKPCLKFreq 736 4 Code Lc blto2_FSBL_lto.o
0x34188FC9 RCCEx_GetDCMIPPCLKFreq 228 4 Code Lc blto2_FSBL_lto.o
0x341890AD RCCEx_GetETH1CLKFreq 216 4 Code Lc blto2_FSBL_lto.o
0x34189185 RCCEx_GetI3CCLKFreq 516 4 Code Lc blto2_FSBL_lto.o
0x34189389 RCCEx_GetLPUARTCLKFreq 412 4 Code Lc blto2_FSBL_lto.o
0x34189525 RCCEx_GetLTDCCLKFreq 228 4 Code Lc blto2_FSBL_lto.o
0x34189609 RCCEx_GetMDFCLKFreq 436 4 Code Lc blto2_FSBL_lto.o
0x341897BD RCCEx_GetSDMMCCLKFreq 396 4 Code Lc blto2_FSBL_lto.o
0x34189949 RCCEx_GetSPDIFRXCLKFreq 372 4 Code Lc blto2_FSBL_lto.o
0x34189ABD RCCEx_GetSPICLKFreq 1 196 4 Code Lc blto2_FSBL_lto.o
0x34189F69 RCCEx_GetUSARTCLKFreq 916 4 Code Lc blto2_FSBL_lto.o
0x3418A2FD RCCEx_GetUARTCLKFreq 916 4 Code Lc blto2_FSBL_lto.o
0x3418A691 RCCEx_GetOTGPHYCLKFreq 324 4 Code Lc blto2_FSBL_lto.o
0x3418A7D5 RCCEx_GetOTGPHYCKREFCLKFreq 148 4 Code Lc blto2_FSBL_lto.o
0x3418A869 RCCEx_GetXSPICLKFreq 452 4 Code Lc blto2_FSBL_lto.o
0x3418AA2D RCCEx_GetHCLKFreq 28 4 Code Lc blto2_FSBL_lto.o
0x3418AA49 LL_RCC_IC3_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
0x3418AA59 LL_RCC_IC3_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x3418AA69 LL_RCC_IC4_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
0x3418AA79 LL_RCC_IC4_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x3418AA89 LL_RCC_PLL4_IsReady.74 16 4 Code Lc blto2_FSBL_lto.o
0x3418AA99 LL_RCC_PLL4P_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
0x3418AAA9 LL_RCC_PLL4_GetSource.75 16 4 Code Lc blto2_FSBL_lto.o
0x3418AAB9 RCCEx_GetPLLSourceFreq 140 4 Code Lc blto2_FSBL_lto.o
0x3418AB45 LL_RCC_PLL4_GetM 16 4 Code Lc blto2_FSBL_lto.o
0x3418AB55 LL_RCC_PLL4_GetN 16 4 Code Lc blto2_FSBL_lto.o
0x3418AB65 LL_RCC_PLL4_GetFRACN 16 4 Code Lc blto2_FSBL_lto.o
0x3418AB75 LL_RCC_PLL4_GetP1 16 4 Code Lc blto2_FSBL_lto.o
0x3418AB85 LL_RCC_PLL4_GetP2 16 4 Code Lc blto2_FSBL_lto.o
0x3418AB95 RCCEx_CalcPLLFreq 136 4 Code Lc blto2_FSBL_lto.o
0x3418AC1D LL_RCC_PLL4_IsEnabledBypass.76 16 4 Code Lc blto2_FSBL_lto.o
0x3418AC2D LL_RCC_HSI_IsReady.77 16 4 Code Lc blto2_FSBL_lto.o
0x3418AC3D LL_RCC_HSI_GetDivider.78 16 4 Code Lc blto2_FSBL_lto.o
0x3418AC4D LL_RCC_MSI_IsReady.79 16 4 Code Lc blto2_FSBL_lto.o
0x3418AC5D LL_RCC_MSI_GetFrequency 16 4 Code Lc blto2_FSBL_lto.o
0x3418AC6D LL_RCC_HSE_IsReady.80 16 4 Code Lc blto2_FSBL_lto.o
0x3418AC7D LL_RCC_PLL3_IsReady.81 16 4 Code Lc blto2_FSBL_lto.o
0x3418AC8D LL_RCC_PLL3P_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
0x3418AC9D LL_RCC_PLL3_GetSource.82 16 4 Code Lc blto2_FSBL_lto.o
0x3418ACAD LL_RCC_PLL3_GetM 16 4 Code Lc blto2_FSBL_lto.o
0x3418ACBD LL_RCC_PLL3_GetN 16 4 Code Lc blto2_FSBL_lto.o
0x3418ACCD LL_RCC_PLL3_GetFRACN 16 4 Code Lc blto2_FSBL_lto.o
0x3418ACDD LL_RCC_PLL3_GetP1 16 4 Code Lc blto2_FSBL_lto.o
0x3418ACED LL_RCC_PLL3_GetP2 16 4 Code Lc blto2_FSBL_lto.o
0x3418ACFD LL_RCC_PLL3_IsEnabledBypass.83 16 4 Code Lc blto2_FSBL_lto.o
0x3418AD0D LL_RCC_PLL2_IsReady.84 16 4 Code Lc blto2_FSBL_lto.o
0x3418AD1D LL_RCC_PLL2P_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
0x3418AD2D LL_RCC_PLL2_GetSource.85 16 4 Code Lc blto2_FSBL_lto.o
0x3418AD3D LL_RCC_PLL2_GetM 16 4 Code Lc blto2_FSBL_lto.o
0x3418AD4D LL_RCC_PLL2_GetN 16 4 Code Lc blto2_FSBL_lto.o
0x3418AD5D LL_RCC_PLL2_GetFRACN 16 4 Code Lc blto2_FSBL_lto.o
0x3418AD6D LL_RCC_PLL2_GetP1 16 4 Code Lc blto2_FSBL_lto.o
0x3418AD7D LL_RCC_PLL2_GetP2 16 4 Code Lc blto2_FSBL_lto.o
0x3418AD8D LL_RCC_PLL2_IsEnabledBypass.86 16 4 Code Lc blto2_FSBL_lto.o
0x3418AD9D LL_RCC_PLL1_IsReady.87 16 4 Code Lc blto2_FSBL_lto.o
0x3418ADAD LL_RCC_PLL1P_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
0x3418ADBD LL_RCC_PLL1_GetSource.88 16 4 Code Lc blto2_FSBL_lto.o
0x3418ADCD LL_RCC_PLL1_GetM 16 4 Code Lc blto2_FSBL_lto.o
0x3418ADDD LL_RCC_PLL1_GetN 16 4 Code Lc blto2_FSBL_lto.o
0x3418ADED LL_RCC_PLL1_GetFRACN 16 4 Code Lc blto2_FSBL_lto.o
0x3418ADFD LL_RCC_PLL1_GetP1 16 4 Code Lc blto2_FSBL_lto.o
0x3418AE0D LL_RCC_PLL1_GetP2 16 4 Code Lc blto2_FSBL_lto.o
0x3418AE1D LL_RCC_PLL1_IsEnabledBypass.89 16 4 Code Lc blto2_FSBL_lto.o
0x3418AE2D LL_RCC_GetAHBPrescaler.90 16 4 Code Lc blto2_FSBL_lto.o
0x3418AE3D LL_RCC_GetUSBClockSource 16 4 Code Lc blto2_FSBL_lto.o
0x3418AE4D LL_RCC_IC15_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
0x3418AE5D LL_RCC_IC15_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x3418AE6D LL_RCC_GetUARTClockSource 16 4 Code Lc blto2_FSBL_lto.o
0x3418AE7D RCCEx_GetPCLK1Freq 28 4 Code Lc blto2_FSBL_lto.o
0x3418AE99 RCCEx_GetPCLK2Freq 28 4 Code Lc blto2_FSBL_lto.o
0x3418AEB5 LL_RCC_IC9_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
0x3418AEC5 LL_RCC_IC9_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x3418AED5 LL_RCC_IC14_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
0x3418AEE5 LL_RCC_IC14_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x3418AEF5 LL_RCC_GetAPB2Prescaler.91 16 4 Code Lc blto2_FSBL_lto.o
0x3418AF05 LL_RCC_GetAPB1Prescaler.92 16 4 Code Lc blto2_FSBL_lto.o
0x3418AF15 RCCEx_GetPCLK4Freq 28 4 Code Lc blto2_FSBL_lto.o
0x3418AF31 LL_RCC_IC8_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
0x3418AF41 LL_RCC_IC8_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x3418AF51 LL_RCC_GetAPB4Prescaler.93 16 4 Code Lc blto2_FSBL_lto.o
0x3418AF61 LL_RCC_IC7_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
0x3418AF71 LL_RCC_IC7_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x3418AF81 LL_RCC_IC5_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
0x3418AF91 LL_RCC_IC5_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x3418AFA1 LL_RCC_LSI_IsReady.94 16 4 Code Lc blto2_FSBL_lto.o
0x3418AFB1 LL_RCC_IC20_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
0x3418AFC1 LL_RCC_IC20_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x3418AFD1 RCCEx_GetPCLK5Freq 28 4 Code Lc blto2_FSBL_lto.o
0x3418AFED LL_RCC_IC16_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
0x3418AFFD LL_RCC_IC16_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x3418B00D LL_RCC_GetAPB5Prescaler.95 16 4 Code Lc blto2_FSBL_lto.o
0x3418B01D LL_RCC_IC10_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
0x3418B02D LL_RCC_IC10_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x3418B03D LL_RCC_IC19_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
0x3418B04D LL_RCC_IC19_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x3418B05D LL_RCC_IC13_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
0x3418B06D LL_RCC_IC13_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x3418B07D LL_RCC_IC12_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
0x3418B08D LL_RCC_IC12_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x3418B09D LL_RCC_IC17_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
0x3418B0AD LL_RCC_IC17_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x3418B0BD LL_RCC_CLKP_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
0x3418B0CD LL_RCC_IC18_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
0x3418B0DD LL_RCC_IC18_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x3418B0ED HAL_XSPI_Init 1 548 4 Code Lc blto2_FSBL_lto.o
0x3418B6F9 XSPI_WaitFlagStateUntilTimeout 104 4 Code Lc blto2_FSBL_lto.o
0x3418B761 XSPI_ConfigCmd 924 4 Code Lc blto2_FSBL_lto.o
0x3418BAFD HAL_XSPI_Receive 300 4 Code Lc blto2_FSBL_lto.o
0x3418BC29 LL_AHB5_GRP1_IsEnabledClock 28 4 Code Lc blto2_FSBL_lto.o
0x3418BC45 JumpToApplication 356 4 Code Lc blto2_FSBL_lto.o
0x3418BDA9 CheckSFDP_Signature 80 4 Code Lc blto2_FSBL_lto.o
0x3418BDF9 SFDP_GetHeader 256 4 Code Lc blto2_FSBL_lto.o
0x3418BEF9 sfdp_get_paraminfo 652 4 Code Lc blto2_FSBL_lto.o
0x3418C185 SFDP_BuildGenericDriver 3 092 4 Code Lc blto2_FSBL_lto.o
0x3418CD99 JEDEC_Basic_Manage4S4S4SEnableSequence 132 4 Code Lc blto2_FSBL_lto.o
0x3418CE1D sfdp_getfrequencevalue 64 4 Code Lc blto2_FSBL_lto.o
0x3418CE5D sfdp_set_dummycycle 420 4 Code Lc blto2_FSBL_lto.o
0x3418D001 EXTMEM_DRIVER_NOR_SFDP_DeInit 16 4 Code Lc blto2_FSBL_lto.o
0x3418D011 EXTMEM_DRIVER_NOR_SFDP_Disable_MemoryMappedMode 36 4 Code Lc blto2_FSBL_lto.o
0x3418D035 SAL_XSPI_SetClock 116 4 Code Lc blto2_FSBL_lto.o
0x3418D0A9 XSPI_FormatCommand 88 4 Code Lc blto2_FSBL_lto.o
0x3418D101 SAL_XSPI_GetId 152 4 Code Lc blto2_FSBL_lto.o
0x3418D199 XSPI_Transmit 32 4 Code Lc blto2_FSBL_lto.o
0x3418D1B9 SAL_XSPI_CommandSendData 136 4 Code Lc blto2_FSBL_lto.o
0x3418D241 SAL_XSPI_SendReadCommand 136 4 Code Lc blto2_FSBL_lto.o
0x3418D2C9 SAL_XSPI_CheckStatusRegister 232 4 Code Lc blto2_FSBL_lto.o
0x3418D3B1 SAL_XSPI_EnableMapMode 200 4 Code Lc blto2_FSBL_lto.o
0x3418D479 SAL_XSPI_UpdateMemoryType 116 4 Code Lc blto2_FSBL_lto.o
0x3418D4ED EXTMEM_MemoryMappedMode 140 4 Code Lc blto2_FSBL_lto.o
0x3418D579 EXTMEM_GetMapAddress 196 4 Code Lc blto2_FSBL_lto.o
0x3418D64D _start 14 4 Code Gb SEGGER_THUMB_Startup.o
0x3418D657 __startup_complete 4 Code Gb SEGGER_THUMB_Startup.o
0x3418D657 __SEGGER_init_done 4 Code Gb SEGGER_THUMB_Startup.o
0x3418D65B exit 2 4 Code Gb SEGGER_THUMB_Startup.o
0x3418D661 reset_handler 4 Code Gb STM32N6xx_Startup.o
0x3418D661 Reset_Handler 4 Code Gb STM32N6xx_Startup.o
0x3418D6A5 fmodf 284 4 Code Wk floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x3418D7C1 floorf 104 4 Code Wk floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x3418D841 __aeabi_ul2f 84 4 Code Wk floatasmops_arm.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x3418D895 memcpy 92 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x3418D895 __aeabi_memcpy 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x3418D8B3 __aeabi_memcpy8 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x3418D8B3 __aeabi_memcpy4 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x3418D8F1 __aeabi_memclr8 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x3418D8F1 __aeabi_memclr4 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x3418D8F1 __aeabi_memclr 104 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x3418D8F3 __aeabi_memset8 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x3418D8F3 __aeabi_memset4 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x3418D8F3 __aeabi_memset 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x3418D8F9 memset 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x3418D9DD MX_BSEC_Init 2 4 Code Lc blto2_FSBL_lto.o
0x3418D9F9 MX_EXTMEM_MANAGER_Init 62 4 Code Lc blto2_FSBL_lto.o
0x3418DA37 PVD_PVM_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418DA39 MX_GPIO_Init 134 4 Code Lc blto2_FSBL_lto.o
0x3418DABF DTS_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418DAC1 LL_AHB4_GRP1_EnableClock 34 4 Code Lc blto2_FSBL_lto.o
0x3418DAE3 RCC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418DAE5 SystemClock_Config 254 4 Code Lc blto2_FSBL_lto.o
0x3418DBE3 LOCKUP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418DBE5 OTP_Config 142 4 Code Lc blto2_FSBL_lto.o
0x3418DC73 CACHE_ECC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418DC75 LL_APB4_GRP2_EnableClock 34 4 Code Lc blto2_FSBL_lto.o
0x3418DC97 TCM_ECC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418DC99 assert_failed 10 4 Code Lc blto2_FSBL_lto.o
0x3418DCA3 BCK_ECC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418DCA5 NMI_Handler 2 4 Code Gb blto2_FSBL_lto.o
0x3418DCA7 FPU_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418DCA9 HardFault_Handler 2 4 Code Gb blto2_FSBL_lto.o
0x3418DCAB RTC_S_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418DCAD MemManage_Handler 2 4 Code Gb blto2_FSBL_lto.o
0x3418DCAF TAMP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418DCB1 BusFault_Handler 2 4 Code Gb blto2_FSBL_lto.o
0x3418DCB3 RIFSC_TAMPER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418DCB5 UsageFault_Handler 2 4 Code Gb blto2_FSBL_lto.o
0x3418DCB7 IAC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418DCB9 SVC_Handler 2 4 Code Gb blto2_FSBL_lto.o
0x3418DCBB RCC_S_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418DCBD DebugMon_Handler 2 4 Code Gb blto2_FSBL_lto.o
0x3418DCBF RTC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418DCC1 PendSV_Handler 2 4 Code Gb blto2_FSBL_lto.o
0x3418DCC3 IWDG_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418DCC5 SystemInit 510 4 Code Gb blto2_FSBL_lto.o
0x3418DEC3 WWDG_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418DEC5 MX_XSPI2_Init 126 4 Code Lc blto2_FSBL_lto.o
0x3418DF43 EXTI0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418DF45 LL_APB4_GRP2_EnableClock.7 34 4 Code Lc blto2_FSBL_lto.o
0x3418DF67 EXTI1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418DF69 LL_AHB4_GRP1_EnableClock.8 34 4 Code Lc blto2_FSBL_lto.o
0x3418DF8B EXTI2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418DF8D LL_AHB5_GRP1_EnableClock 34 4 Code Lc blto2_FSBL_lto.o
0x3418DFAF EXTI3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418DFB1 HAL_InitTick 126 4 Code Lc blto2_FSBL_lto.o
0x3418E02F EXTI4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418E031 HAL_IncTick 26 4 Code Lc blto2_FSBL_lto.o
0x3418E04B EXTI5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418E04D HAL_Delay 58 4 Code Lc blto2_FSBL_lto.o
0x3418E087 EXTI6_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418E089 HAL_SuspendTick 18 4 Code Lc blto2_FSBL_lto.o
0x3418E09B EXTI7_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418E09D HAL_BSEC_OTP_Reload 250 4 Code Lc blto2_FSBL_lto.o
0x3418E197 EXTI8_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418E199 HAL_BSEC_OTP_Program 342 4 Code Lc blto2_FSBL_lto.o
0x3418E2EF EXTI9_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418E2F1 HAL_NVIC_SetPriorityGrouping 62 4 Code Lc blto2_FSBL_lto.o
0x3418E32F EXTI10_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418E331 __NVIC_SetPriority 62 4 Code Lc blto2_FSBL_lto.o
0x3418E36F EXTI11_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418E371 SysTick_Config 78 4 Code Lc blto2_FSBL_lto.o
0x3418E3BF EXTI12_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418E3C1 HAL_GPIO_WritePin 102 4 Code Lc blto2_FSBL_lto.o
0x3418E427 EXTI13_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418E429 HAL_PWREx_ConfigSupply 114 4 Code Lc blto2_FSBL_lto.o
0x3418E49B EXTI14_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418E49D HAL_PWREx_ControlVoltageScaling 114 4 Code Lc blto2_FSBL_lto.o
0x3418E50F EXTI15_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418E511 HAL_PWREx_ConfigVddIORange 226 4 Code Lc blto2_FSBL_lto.o
0x3418E5F3 SAES_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418E5F5 HAL_PWREx_EnableVddIO3 18 4 Code Lc blto2_FSBL_lto.o
0x3418E607 CRYP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418E609 LL_RCC_HSI_Enable 14 4 Code Lc blto2_FSBL_lto.o
0x3418E617 PKA_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418E619 HAL_RCC_OscConfig 2 810 4 Code Lc blto2_FSBL_lto.o
0x3418F113 HASH_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418F115 LL_RCC_HSI_SetCalibTrimming 30 4 Code Lc blto2_FSBL_lto.o
0x3418F133 RNG_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418F135 LL_RCC_HSI_Disable 14 4 Code Lc blto2_FSBL_lto.o
0x3418F143 MCE1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418F145 LL_RCC_MSI_SetCalibTrimming 30 4 Code Lc blto2_FSBL_lto.o
0x3418F163 MCE2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418F165 LL_RCC_MSI_Enable 14 4 Code Lc blto2_FSBL_lto.o
0x3418F173 MCE3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418F175 LL_RCC_MSI_Disable 14 4 Code Lc blto2_FSBL_lto.o
0x3418F183 MCE4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418F185 LL_RCC_LSI_Enable 14 4 Code Lc blto2_FSBL_lto.o
0x3418F193 ADC1_2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418F195 LL_RCC_LSI_Disable 14 4 Code Lc blto2_FSBL_lto.o
0x3418F1A3 CSI_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418F1A5 RCC_PLL_IsNewConfig 218 4 Code Lc blto2_FSBL_lto.o
0x3418F27F DCMIPP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418F281 RCC_PLL_Config 846 4 Code Lc blto2_FSBL_lto.o
0x3418F5CF PAHB_ERR_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418F5D1 RCC_PLL_Enable 94 4 Code Lc blto2_FSBL_lto.o
0x3418F62F NPU0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418F631 HAL_RCC_ClockConfig 2 498 4 Code Lc blto2_FSBL_lto.o
0x3418FFF3 NPU1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418FFF5 RCC_IC_CheckPLLSources 234 4 Code Lc blto2_FSBL_lto.o
0x341900DF NPU2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341900E1 LL_RCC_IC1_Enable 14 4 Code Lc blto2_FSBL_lto.o
0x341900EF NPU3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341900F1 HAL_RCC_GetCpuClockFreq 238 4 Code Lc blto2_FSBL_lto.o
0x341901DF CACHEAXI_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341901E1 LL_RCC_IC1_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
0x341901F7 LTDC_LO_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341901F9 HAL_RCC_GetSysClockFreq 26 4 Code Lc blto2_FSBL_lto.o
0x34190213 LTDC_LO_ERR_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34190215 LL_RCC_IC2_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
0x3419022B DMA2D_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3419022D LL_RCC_IC5_Enable.60 14 4 Code Lc blto2_FSBL_lto.o
0x3419023B JPEG_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3419023D LL_RCC_IC3_Enable 14 4 Code Lc blto2_FSBL_lto.o
0x3419024B VENC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3419024D LL_RCC_IC4_Enable 14 4 Code Lc blto2_FSBL_lto.o
0x3419025B GFXMMU_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3419025D LL_RCC_CLKP_Enable 14 4 Code Lc blto2_FSBL_lto.o
0x3419026B GFXTIM_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3419026D LL_RCC_IC7_Enable 14 4 Code Lc blto2_FSBL_lto.o
0x3419027B GPU2D_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3419027D LL_RCC_IC8_Enable 14 4 Code Lc blto2_FSBL_lto.o
0x3419028B GPU2D_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3419028D LL_RCC_HSE_SelectHSEDiv2AsDiv2Clock 18 4 Code Lc blto2_FSBL_lto.o
0x3419029F ICACHE_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341902A1 LL_RCC_HSE_SelectHSEAsDiv2Clock 18 4 Code Lc blto2_FSBL_lto.o
0x341902B3 HPDMA1_Channel0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341902B5 LL_RCC_SetTIMPrescaler 30 4 Code Lc blto2_FSBL_lto.o
0x341902D3 HPDMA1_Channel1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341902D5 LL_RCC_GetADCClockSource 22 4 Code Lc blto2_FSBL_lto.o
0x341902EB HPDMA1_Channel2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341902ED LL_RCC_GetADFClockSource 22 4 Code Lc blto2_FSBL_lto.o
0x34190303 HPDMA1_Channel3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34190305 LL_RCC_GetCLKPClockSource 22 4 Code Lc blto2_FSBL_lto.o
0x3419031B HPDMA1_Channel4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3419031D LL_RCC_GetDCMIPPClockSource 22 4 Code Lc blto2_FSBL_lto.o
0x34190333 HPDMA1_Channel5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34190335 LL_RCC_GetETHClockSource 22 4 Code Lc blto2_FSBL_lto.o
0x3419034B HPDMA1_Channel6_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3419034D LL_RCC_GetETHPTPClockSource 22 4 Code Lc blto2_FSBL_lto.o
0x34190363 HPDMA1_Channel7_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34190365 LL_RCC_GetFDCANClockSource 22 4 Code Lc blto2_FSBL_lto.o
0x3419037B HPDMA1_Channel8_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3419037D LL_RCC_GetFMCClockSource 22 4 Code Lc blto2_FSBL_lto.o
0x34190393 HPDMA1_Channel9_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34190395 LL_RCC_GetLPUARTClockSource 22 4 Code Lc blto2_FSBL_lto.o
0x341903AB HPDMA1_Channel10_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341903AD LL_RCC_GetLTDCClockSource 22 4 Code Lc blto2_FSBL_lto.o
0x341903C3 HPDMA1_Channel11_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341903C5 LL_RCC_GetMDFClockSource 22 4 Code Lc blto2_FSBL_lto.o
0x341903DB HPDMA1_Channel12_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341903DD LL_RCC_GetPSSIClockSource 22 4 Code Lc blto2_FSBL_lto.o
0x341903F3 HPDMA1_Channel13_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341903F5 LL_RCC_GetSPDIFRXClockSource 22 4 Code Lc blto2_FSBL_lto.o
0x3419040B HPDMA1_Channel14_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3419040D HAL_RCCEx_GetPeriphCLKFreq 1 626 4 Code Lc blto2_FSBL_lto.o
0x34190A67 HPDMA1_Channel15_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34190A69 RCCEx_GetADCCLKFreq 438 4 Code Lc blto2_FSBL_lto.o
0x34190C1F GPDMA1_Channel0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34190C21 RCCEx_GetCSICLKFreq 134 4 Code Lc blto2_FSBL_lto.o
0x34190CA7 GPDMA1_Channel1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34190CA9 RCCEx_GetETH1PTPCLKFreq 222 4 Code Lc blto2_FSBL_lto.o
0x34190D87 GPDMA1_Channel2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34190D89 RCCEx_GetFDCANCLKFreq 206 4 Code Lc blto2_FSBL_lto.o
0x34190E57 GPDMA1_Channel3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34190E59 RCCEx_GetFMCCLKFreq 314 4 Code Lc blto2_FSBL_lto.o
0x34190F93 GPDMA1_Channel4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34190F95 RCCEx_GetI2CCLKFreq 706 4 Code Lc blto2_FSBL_lto.o
0x34191257 GPDMA1_Channel5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34191259 RCCEx_GetLPTIMCLKFreq 706 4 Code Lc blto2_FSBL_lto.o
0x3419151B GPDMA1_Channel6_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3419151D RCCEx_GetPSSICLKFreq 218 4 Code Lc blto2_FSBL_lto.o
0x341915F7 GPDMA1_Channel7_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341915F9 RCCEx_GetRTCCLKFreq 126 4 Code Lc blto2_FSBL_lto.o
0x34191677 GPDMA1_Channel8_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34191679 RCCEx_GetSAICLKFreq 606 4 Code Lc blto2_FSBL_lto.o
0x341918D7 GPDMA1_Channel9_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341918D9 LL_RCC_IC3_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
0x341918EF GPDMA1_Channel10_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341918F1 HAL_RCCEx_GetPLL1CLKFreq 130 4 Code Lc blto2_FSBL_lto.o
0x34191973 GPDMA1_Channel11_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34191975 HAL_RCCEx_GetPLL2CLKFreq 130 4 Code Lc blto2_FSBL_lto.o
0x341919F7 GPDMA1_Channel12_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341919F9 HAL_RCCEx_GetPLL3CLKFreq 130 4 Code Lc blto2_FSBL_lto.o
0x34191A7B GPDMA1_Channel13_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34191A7D HAL_RCCEx_GetPLL4CLKFreq 130 4 Code Lc blto2_FSBL_lto.o
0x34191AFF GPDMA1_Channel14_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34191B01 LL_RCC_IC4_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
0x34191B17 GPDMA1_Channel15_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34191B19 LL_RCC_IC15_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
0x34191B2F I2C1_EV_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34191B31 LL_RCC_IC9_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
0x34191B47 I2C1_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34191B49 LL_RCC_IC14_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
0x34191B5F I2C2_EV_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34191B61 LL_RCC_IC8_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
0x34191B77 I2C2_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34191B79 LL_RCC_IC7_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
0x34191B8F I2C3_EV_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34191B91 LL_RCC_IC5_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
0x34191BA7 I2C3_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34191BA9 LL_RCC_IC20_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
0x34191BBF I2C4_EV_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34191BC1 LL_RCC_IC16_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
0x34191BD7 I2C4_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34191BD9 LL_RCC_IC10_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
0x34191BEF I3C1_EV_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34191BF1 LL_RCC_IC19_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
0x34191C07 I3C1_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34191C09 LL_RCC_IC13_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
0x34191C1F I3C2_EV_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34191C21 LL_RCC_IC12_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
0x34191C37 I3C2_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34191C39 LL_RCC_IC17_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
0x34191C4F TIM1_BRK_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34191C51 LL_RCC_IC18_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
0x34191C67 TIM1_UP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34191C69 HAL_XSPI_SetTimeout 18 4 Code Lc blto2_FSBL_lto.o
0x34191C7B TIM1_TRG_CCU_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34191C7D HAL_XSPI_Command 1 106 4 Code Lc blto2_FSBL_lto.o
0x341920CF TIM1_CC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341920D1 HAL_XSPI_Transmit 226 4 Code Lc blto2_FSBL_lto.o
0x341921B3 TIM2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341921B5 HAL_XSPI_AutoPolling 406 4 Code Lc blto2_FSBL_lto.o
0x3419234B TIM3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3419234D HAL_XSPI_MemoryMapped 330 4 Code Lc blto2_FSBL_lto.o
0x34192497 TIM4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34192499 HAL_XSPI_Abort 246 4 Code Lc blto2_FSBL_lto.o
0x3419258F TIM5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34192591 HAL_XSPIM_Config 878 4 Code Lc blto2_FSBL_lto.o
0x341928FF TIM6_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34192901 XSPIM_GetConfig 210 4 Code Lc blto2_FSBL_lto.o
0x341929D3 TIM7_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341929D5 BOOT_Application 34 4 Code Lc blto2_FSBL_lto.o
0x341929F7 TIM8_BRK_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341929F9 MapMemory 94 4 Code Lc blto2_FSBL_lto.o
0x34192A57 TIM8_UP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34192A59 SFDP_ReadHeader 126 4 Code Lc blto2_FSBL_lto.o
0x34192AD7 TIM8_TRG_CCU_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34192AD9 SFDP_CollectData 458 4 Code Lc blto2_FSBL_lto.o
0x34192CA3 TIM8_CC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34192CA5 SFDP_MemoryReset 458 4 Code Lc blto2_FSBL_lto.o
0x34192E6F TIM9_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34192E71 JEDEC_Basic_ManageQuadEnableRequirement 338 4 Code Lc blto2_FSBL_lto.o
0x34192FC3 TIM10_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34192FC5 sfdp_enter_octal_mode 482 4 Code Lc blto2_FSBL_lto.o
0x341931A7 TIM11_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341931A9 driver_check_FlagBUSY 102 4 Code Lc blto2_FSBL_lto.o
0x3419320F TIM12_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193211 EXTMEM_DRIVER_NOR_SFDP_Init 306 4 Code Lc blto2_FSBL_lto.o
0x34193343 TIM13_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193345 EXTMEM_DRIVER_NOR_SFDP_Enable_MemoryMappedMode 58 4 Code Lc blto2_FSBL_lto.o
0x3419337F TIM14_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193381 SAL_XSPI_Init 86 4 Code Lc blto2_FSBL_lto.o
0x341933D7 TIM15_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341933D9 SAL_XSPI_MemoryConfig 666 4 Code Lc blto2_FSBL_lto.o
0x34193673 TIM16_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193675 SAL_XSPI_GetSFDP 222 4 Code Lc blto2_FSBL_lto.o
0x34193753 TIM17_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193755 SAL_XSPI_Write 138 4 Code Lc blto2_FSBL_lto.o
0x341937DF TIM18_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341937E1 SAL_XSPI_CommandSendReadAddress 190 4 Code Lc blto2_FSBL_lto.o
0x3419389F LPTIM1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341938A1 SAL_XSPI_DisableMapMode 22 4 Code Lc blto2_FSBL_lto.o
0x341938B7 LPTIM2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341938B9 SAL_XSPI_Abort 18 4 Code Lc blto2_FSBL_lto.o
0x341938CB LPTIM3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341938CD EXTMEM_Init 94 4 Code Lc blto2_FSBL_lto.o
0x3419392B LPTIM4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3419392D EXTMEM_DeInit 78 4 Code Lc blto2_FSBL_lto.o
0x3419397B LPTIM5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3419397D __aeabi_f2ulz 62 4 Code Wk floatasmops_arm.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x341939BB ADF1_FLT0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341939BD __aeabi_uldivmod 302 4 Code Wk intasmops_arm.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193AEB MDF1_FLT0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193AED MDF1_FLT1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193AEF MDF1_FLT2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193AF1 MDF1_FLT3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193AF3 MDF1_FLT4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193AF5 MDF1_FLT5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193AF7 SAI1_A_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193AF9 SAI1_B_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193AFB SAI2_A_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193AFD SAI2_B_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193AFF SPDIFRX_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B01 SPI1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B03 SPI2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B05 SPI3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B07 SPI4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B09 SPI5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B0B SPI6_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B0D USART1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B0F USART2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B11 USART3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B13 UART4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B15 UART5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B17 USART6_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B19 UART7_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B1B UART8_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B1D UART9_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B1F USART10_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B21 LPUART1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B23 XSPI1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B25 XSPI2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B27 XSPI3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B29 FMC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B2B SDMMC1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B2D SDMMC2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B2F UCPD1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B31 USB1_OTG_HS_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B33 USB2_OTG_HS_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B35 ETH1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B37 FDCAN1_IT0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B39 FDCAN1_IT1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B3B FDCAN2_IT0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B3D FDCAN2_IT1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B3F FDCAN3_IT0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B41 FDCAN3_IT1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B43 FDCAN_CU_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B45 MDIOS_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B47 DCMI_PSSI_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B49 WAKEUP_PIN_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B4B CTI_INT0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B4D CTI_INT1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B4F LTDC_UP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B51 LTDC_UP_ERR_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34193B53 fwrite 46 2 Code Wk fileops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193B81 __SEGGER_RTL_float32_isnan 14 2 Code Wk floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193B8F __SEGGER_RTL_float32_isinf 18 2 Code Wk floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193BA1 ldexpf 54 2 Code Wk floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193BD7 __SEGGER_RTL_pow10f 58 2 Code Gb utilops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193C11 __SEGGER_RTL_prin_flush 26 2 Code Gb prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193C2B __SEGGER_RTL_stream_write 10 2 Code Lc prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193C35 __SEGGER_RTL_X_file_write 6 2 Code Gb prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193C3B _DoInit 98 2 Code Lc SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193C9D _GetAvailWriteSpace 22 2 Code Lc SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193CB3 _WriteNoCheck 58 2 Code Lc SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193CED strlen 42 2 Code Wk strops.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193D17 __SEGGER_RTL_current_locale 26 2 Code Gb mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193D31 __SEGGER_RTL_ascii_wctomb 14 2 Code Gb mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193D47 __SEGGER_RTL_float32_isnormal 24 2 Code Wk floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193D5F __SEGGER_RTL_float32_signbit 8 2 Code Wk floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193D67 frexpf 36 2 Code Wk floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193D8B abs 8 2 Code Wk intops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193D93 __SEGGER_RTL_putc 132 2 Code Gb prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193E17 __SEGGER_RTL_print_padding 32 2 Code Gb prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193E37 __SEGGER_RTL_pre_padding 20 2 Code Gb prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193E4B vfprintf 28 2 Code Wk prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193E67 vfprintf_l 104 2 Code Wk prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193ECF printf 44 2 Code Wk prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193EFB __SEGGER_RTL_X_file_stat 52 2 Code Gb prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193F2F __SEGGER_RTL_X_file_bufsize 4 2 Code Gb prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193F33 _WriteBlocking 88 2 Code Lc SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193F8B SEGGER_RTT_WriteNoLock 88 2 Code Gb SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193FE3 SEGGER_RTT_Write 40 2 Code Gb SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x3419400B strnlen 92 2 Code Wk strops.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34194067 __SEGGER_RTL_ascii_mbtowc 48 2 Code Gb mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34194097 __SEGGER_RTL_ascii_isctype 32 2 Code Lc mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x341940B7 __SEGGER_RTL_ascii_toupper 12 2 Code Lc mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x341940C3 __SEGGER_RTL_ascii_tolower 12 2 Code Lc mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x341940CF __SEGGER_RTL_ascii_iswctype 32 2 Code Lc mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x341940EF __SEGGER_RTL_ascii_towupper 12 2 Code Lc mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x341940FB __SEGGER_RTL_ascii_towlower 12 2 Code Lc mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34194605 __SEGGER_init_ctors 26 4 Code Wk SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34194679 __SEGGER_init_zero 18 2 Code Wk SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x3419468B __SEGGER_init_copy 20 2 Code Wk SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)

Function symbols by descending size

Symbol name Size Align Type Bd Object File
HAL_RCCEx_PeriphCLKConfig 24 268 4 Code Lc blto2_FSBL_lto.o
SFDP_BuildGenericDriver 3 092 4 Code Lc blto2_FSBL_lto.o
__SEGGER_RTL_vfprintf 3 036 8 Code Gb __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_vfprintf_short_float_long_long 3 036 8 Code Gb __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
HAL_RCC_OscConfig 2 810 4 Code Lc blto2_FSBL_lto.o
HAL_RCC_ClockConfig 2 498 4 Code Lc blto2_FSBL_lto.o
HAL_GPIO_Init 1 928 4 Code Lc blto2_FSBL_lto.o
HAL_RCCEx_GetPeriphCLKFreq 1 626 4 Code Lc blto2_FSBL_lto.o
HAL_XSPI_Init 1 548 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetSPICLKFreq 1 196 4 Code Lc blto2_FSBL_lto.o
HAL_XSPI_Command 1 106 4 Code Lc blto2_FSBL_lto.o
XSPI_ConfigCmd 924 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetUARTCLKFreq 916 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetUSARTCLKFreq 916 4 Code Lc blto2_FSBL_lto.o
HAL_XSPIM_Config 878 4 Code Lc blto2_FSBL_lto.o
RCC_PLL_Config 846 4 Code Lc blto2_FSBL_lto.o
SystemCoreClockUpdate 828 4 Code Gb blto2_FSBL_lto.o
RCCEx_GetCLKPCLKFreq 736 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetI2CCLKFreq 706 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetLPTIMCLKFreq 706 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_MemoryConfig 666 4 Code Lc blto2_FSBL_lto.o
sfdp_get_paraminfo 652 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetSAICLKFreq 606 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetI3CCLKFreq 516 4 Code Lc blto2_FSBL_lto.o
SystemInit 510 4 Code Gb blto2_FSBL_lto.o
sfdp_enter_octal_mode 482 4 Code Lc blto2_FSBL_lto.o
SFDP_CollectData 458 4 Code Lc blto2_FSBL_lto.o
SFDP_MemoryReset 458 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetXSPICLKFreq 452 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetADCCLKFreq 438 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetMDFCLKFreq 436 4 Code Lc blto2_FSBL_lto.o
sfdp_set_dummycycle 420 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetLPUARTCLKFreq 412 4 Code Lc blto2_FSBL_lto.o
HAL_XSPI_AutoPolling 406 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetSDMMCCLKFreq 396 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetADFCLKFreq 388 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetSPDIFRXCLKFreq 372 4 Code Lc blto2_FSBL_lto.o
main 360 4 Code Gb blto2_FSBL_lto.o
JumpToApplication 356 4 Code Lc blto2_FSBL_lto.o
HAL_BSEC_OTP_Program 342 4 Code Lc blto2_FSBL_lto.o
JEDEC_Basic_ManageQuadEnableRequirement 338 4 Code Lc blto2_FSBL_lto.o
HAL_XSPI_MemoryMapped 330 4 Code Lc blto2_FSBL_lto.o
HAL_XSPI_MspInit 324 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetOTGPHYCLKFreq 324 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetFMCCLKFreq 314 4 Code Lc blto2_FSBL_lto.o
EXTMEM_DRIVER_NOR_SFDP_Init 306 4 Code Lc blto2_FSBL_lto.o
__aeabi_uldivmod 302 4 Code Wk intasmops_arm.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
HAL_XSPI_Receive 300 4 Code Lc blto2_FSBL_lto.o
fmodf 284 4 Code Wk floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
SFDP_GetHeader 256 4 Code Lc blto2_FSBL_lto.o
SystemClock_Config 254 4 Code Lc blto2_FSBL_lto.o
HAL_BSEC_OTP_Reload 250 4 Code Lc blto2_FSBL_lto.o
HAL_XSPI_Abort 246 4 Code Lc blto2_FSBL_lto.o
HAL_DMA_Abort 244 4 Code Lc blto2_FSBL_lto.o
HAL_RCC_GetClockConfig 240 4 Code Lc blto2_FSBL_lto.o
HAL_RCC_GetCpuClockFreq 238 4 Code Lc blto2_FSBL_lto.o
RCC_IC_CheckPLLSources 234 4 Code Lc blto2_FSBL_lto.o
RCC_GetSysClockFreq 232 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_CheckStatusRegister 232 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetDCMIPPCLKFreq 228 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetLTDCCLKFreq 228 4 Code Lc blto2_FSBL_lto.o
HAL_PWREx_ConfigVddIORange 226 4 Code Lc blto2_FSBL_lto.o
HAL_XSPI_Transmit 226 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetETH1PTPCLKFreq 222 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_GetSFDP 222 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetPSSICLKFreq 218 4 Code Lc blto2_FSBL_lto.o
RCC_PLL_IsNewConfig 218 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetETH1CLKFreq 216 4 Code Lc blto2_FSBL_lto.o
XSPIM_GetConfig 210 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetFDCANCLKFreq 206 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_EnableMapMode 200 4 Code Lc blto2_FSBL_lto.o
EXTMEM_GetMapAddress 196 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_CommandSendReadAddress 190 4 Code Lc blto2_FSBL_lto.o
HAL_NVIC_SetPriority 168 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_GetId 152 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetOTGPHYCKREFCLKFreq 148 4 Code Lc blto2_FSBL_lto.o
OTP_Config 142 4 Code Lc blto2_FSBL_lto.o
EXTMEM_MemoryMappedMode 140 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetPLLSourceFreq 140 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_Write 138 4 Code Lc blto2_FSBL_lto.o
RCCEx_CalcPLLFreq 136 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_CommandSendData 136 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_SendReadCommand 136 4 Code Lc blto2_FSBL_lto.o
MX_GPIO_Init 134 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetCSICLKFreq 134 4 Code Lc blto2_FSBL_lto.o
JEDEC_Basic_Manage4S4S4SEnableSequence 132 4 Code Lc blto2_FSBL_lto.o
__SEGGER_RTL_putc 132 2 Code Gb prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
HAL_RCCEx_GetPLL1CLKFreq 130 4 Code Lc blto2_FSBL_lto.o
HAL_RCCEx_GetPLL2CLKFreq 130 4 Code Lc blto2_FSBL_lto.o
HAL_RCCEx_GetPLL3CLKFreq 130 4 Code Lc blto2_FSBL_lto.o
HAL_RCCEx_GetPLL4CLKFreq 130 4 Code Lc blto2_FSBL_lto.o
HAL_InitTick 126 4 Code Lc blto2_FSBL_lto.o
MX_XSPI2_Init 126 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetRTCCLKFreq 126 4 Code Lc blto2_FSBL_lto.o
SFDP_ReadHeader 126 4 Code Lc blto2_FSBL_lto.o
HAL_BSEC_OTP_Read 124 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_SetClock 116 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_UpdateMemoryType 116 4 Code Lc blto2_FSBL_lto.o
HAL_PWREx_ConfigSupply 114 4 Code Lc blto2_FSBL_lto.o
HAL_PWREx_ControlVoltageScaling 114 4 Code Lc blto2_FSBL_lto.o
XSPI_WaitFlagStateUntilTimeout 104 4 Code Lc blto2_FSBL_lto.o
__aeabi_memclr 104 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
floorf 104 4 Code Wk floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
vfprintf_l 104 2 Code Wk prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
HAL_GPIO_WritePin 102 4 Code Lc blto2_FSBL_lto.o
driver_check_FlagBUSY 102 4 Code Lc blto2_FSBL_lto.o
NVIC_EncodePriority 100 4 Code Lc blto2_FSBL_lto.o
_DoInit 98 2 Code Lc SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
EXTMEM_Init 94 4 Code Lc blto2_FSBL_lto.o
MapMemory 94 4 Code Lc blto2_FSBL_lto.o
RCC_PLL_Enable 94 4 Code Lc blto2_FSBL_lto.o
memcpy 92 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
strnlen 92 2 Code Wk strops.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
SEGGER_RTT_WriteNoLock 88 2 Code Gb SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
XSPI_FormatCommand 88 4 Code Lc blto2_FSBL_lto.o
_WriteBlocking 88 2 Code Lc SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
SAL_XSPI_Init 86 4 Code Lc blto2_FSBL_lto.o
RCC_PLL_Source_IsReady 84 4 Code Lc blto2_FSBL_lto.o
__aeabi_ul2f 84 4 Code Wk floatasmops_arm.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
CheckSFDP_Signature 80 4 Code Lc blto2_FSBL_lto.o
EXTMEM_DeInit 78 4 Code Lc blto2_FSBL_lto.o
SysTick_Config 78 4 Code Lc blto2_FSBL_lto.o
sfdp_getfrequencevalue 64 4 Code Lc blto2_FSBL_lto.o
HAL_NVIC_SetPriorityGrouping 62 4 Code Lc blto2_FSBL_lto.o
MX_EXTMEM_MANAGER_Init 62 4 Code Lc blto2_FSBL_lto.o
__NVIC_SetPriority 62 4 Code Lc blto2_FSBL_lto.o
__aeabi_f2ulz 62 4 Code Wk floatasmops_arm.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__NVIC_SetPriorityGrouping 60 4 Code Lc blto2_FSBL_lto.o
EXTMEM_DRIVER_NOR_SFDP_Enable_MemoryMappedMode 58 4 Code Lc blto2_FSBL_lto.o
HAL_Delay 58 4 Code Lc blto2_FSBL_lto.o
_WriteNoCheck 58 2 Code Lc SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_pow10f 58 2 Code Gb utilops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
ldexpf 54 2 Code Wk floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
LL_RCC_SetClockSource 52 4 Code Lc blto2_FSBL_lto.o
__SEGGER_RTL_X_file_stat 52 2 Code Gb prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
HAL_Init 48 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetClockSource 48 4 Code Lc blto2_FSBL_lto.o
__SEGGER_RTL_ascii_mbtowc 48 2 Code Gb mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
fwrite 46 2 Code Wk fileops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
printf 44 2 Code Wk prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
strlen 42 2 Code Wk strops.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
SEGGER_RTT_Write 40 2 Code Gb SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
EXTMEM_DRIVER_NOR_SFDP_Disable_MemoryMappedMode 36 4 Code Lc blto2_FSBL_lto.o
frexpf 36 2 Code Wk floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
BOOT_Application 34 4 Code Lc blto2_FSBL_lto.o
LL_AHB4_GRP1_EnableClock 34 4 Code Lc blto2_FSBL_lto.o
LL_AHB4_GRP1_EnableClock.8 34 4 Code Lc blto2_FSBL_lto.o
LL_AHB5_GRP1_EnableClock 34 4 Code Lc blto2_FSBL_lto.o
LL_APB4_GRP2_EnableClock 34 4 Code Lc blto2_FSBL_lto.o
LL_APB4_GRP2_EnableClock.7 34 4 Code Lc blto2_FSBL_lto.o
XSPI_Transmit 32 4 Code Lc blto2_FSBL_lto.o
__SEGGER_RTL_ascii_isctype 32 2 Code Lc mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_ascii_iswctype 32 2 Code Lc mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_print_padding 32 2 Code Gb prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
LL_RCC_HSI_SetCalibTrimming 30 4 Code Lc blto2_FSBL_lto.o
LL_RCC_MSI_SetCalibTrimming 30 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetTIMPrescaler 30 4 Code Lc blto2_FSBL_lto.o
LL_AHB5_GRP1_IsEnabledClock 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSI_SetDivider 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_MSI_SetFrequency 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetADFClockSource 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetCLKPClockSource 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetDCMIPPClockSource 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetETHClockSource 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetETHPHYInterface 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetETHREFRXClockSource 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetETHREFTXClockSource 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetFDCANClockSource 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetFMCClockSource 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetLPUARTClockSource 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetLTDCClockSource 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetMDFClockSource 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetPSSIClockSource 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetRTCClockSource 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetRTC_HSEPrescaler 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetSPDIFRXClockSource 28 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetHCLKFreq 28 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetPCLK1Freq 28 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetPCLK2Freq 28 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetPCLK4Freq 28 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetPCLK5Freq 28 4 Code Lc blto2_FSBL_lto.o
vfprintf 28 2 Code Wk prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
HAL_IncTick 26 4 Code Lc blto2_FSBL_lto.o
HAL_RCC_GetSysClockFreq 26 4 Code Lc blto2_FSBL_lto.o
__SEGGER_RTL_current_locale 26 2 Code Gb mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_prin_flush 26 2 Code Gb prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_init_ctors 26 4 Code Wk SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_float32_isnormal 24 2 Code Wk floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
LL_RCC_GetADCClockSource 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetADFClockSource 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetCLKPClockSource 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetDCMIPPClockSource 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetETHClockSource 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetETHPTPClockSource 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetFDCANClockSource 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetFMCClockSource 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetLPUARTClockSource 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetLTDCClockSource 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetMDFClockSource 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetPSSIClockSource 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetSPDIFRXClockSource 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC10_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC12_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC13_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC14_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC15_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC16_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC17_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC18_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC19_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC1_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC20_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC2_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC3_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC4_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC5_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC7_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC8_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC9_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_DisableMapMode 22 4 Code Lc blto2_FSBL_lto.o
_GetAvailWriteSpace 22 2 Code Lc SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_pre_padding 20 2 Code Gb prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_init_copy 20 2 Code Wk SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
HAL_PWREx_EnableVddIO3 18 4 Code Lc blto2_FSBL_lto.o
HAL_SuspendTick 18 4 Code Lc blto2_FSBL_lto.o
HAL_XSPI_SetTimeout 18 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSE_SelectHSEAsDiv2Clock 18 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSE_SelectHSEDiv2AsDiv2Clock 18 4 Code Lc blto2_FSBL_lto.o
SAL_XSPI_Abort 18 4 Code Lc blto2_FSBL_lto.o
__SEGGER_RTL_float32_isinf 18 2 Code Wk floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_init_zero 18 2 Code Wk SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
EXTMEM_DRIVER_NOR_SFDP_DeInit 16 4 Code Lc blto2_FSBL_lto.o
HAL_SYSTICK_Config 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_CLKP_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetADCPrescaler 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetAHBPrescaler.90 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetAPB1Prescaler.92 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetAPB2Prescaler.91 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetAPB4Prescaler.93 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetAPB5Prescaler.95 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetCpuClkSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetETH1PTPDivider 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetI2CClockSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetI3CClockSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetLPTIMClockSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetRTCClockSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetSAIClockSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetSDMMCClockSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetSPIClockSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetSysClkSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetTIMPrescaler 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetUARTClockSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetUSARTClockSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetUSBClockSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetXSPIClockSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSE_IsReady 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSE_IsReady.80 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSE_IsSelectedHSEDiv2AsDiv2Clock 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSI_GetDivider 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSI_GetDivider.78 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSI_IsReady 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSI_IsReady.77 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC10_Enable.61 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC10_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC10_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC11_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC12_Enable 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC12_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC12_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC13_Enable 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC13_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC13_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC14_Enable 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC14_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC14_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC15_Enable.62 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC15_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC15_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC16_Enable 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC16_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC16_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC17_Enable 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC17_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC17_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC18_Enable 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC18_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC18_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC19_Enable 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC19_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC19_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC1_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC20_Enable.63 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC20_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC20_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC2_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC3_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC3_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC4_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC4_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC5_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC5_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC6_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC7_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC7_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC8_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC8_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC9_Enable 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC9_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC9_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_LSE_IsReady 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_LSE_IsReady.59 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_LSI_IsReady 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_LSI_IsReady.94 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_MSI_GetFrequency 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_MSI_IsReady 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_MSI_IsReady.79 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1P_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_GetFRACN 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_GetM 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_GetN 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_GetP1 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_GetP2 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_GetSource.88 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_IsEnabledBypass 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_IsEnabledBypass.89 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_IsReady 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_IsReady.87 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2P_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_GetFRACN 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_GetM 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_GetN 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_GetP1 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_GetP2 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_GetSource.85 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_IsEnabledBypass 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_IsEnabledBypass.86 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_IsReady 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_IsReady.84 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3P_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_GetFRACN 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_GetM 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_GetN 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_GetP1 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_GetP2 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_GetSource.82 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_IsEnabledBypass 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_IsEnabledBypass.83 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_IsReady 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_IsReady.81 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4P_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_GetFRACN 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_GetM 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_GetN 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_GetP1 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_GetP2 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_GetSource.75 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_IsEnabledBypass 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_IsEnabledBypass.76 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_IsReady 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_IsReady.74 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetI2CClockSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetI3CClockSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetLPTIMClockSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetOTGPHYCKREFClockSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetOTGPHYClockSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetSAIClockSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetSDMMCClockSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetSPIClockSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetUSARTClockSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_SetXSPIClockSource 16 4 Code Lc blto2_FSBL_lto.o
__NVIC_GetPriorityGrouping 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_CLKP_Enable 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSI_Disable 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSI_Enable 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC1_Enable 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC3_Enable 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC4_Enable 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC5_Enable.60 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC7_Enable 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC8_Enable 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_LSI_Disable 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_LSI_Enable 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_MSI_Disable 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_MSI_Enable 14 4 Code Lc blto2_FSBL_lto.o
__SEGGER_RTL_ascii_wctomb 14 2 Code Gb mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_float32_isnan 14 2 Code Wk floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
_start 14 4 Code Gb SEGGER_THUMB_Startup.o
HAL_GetTick 12 4 Code Lc blto2_FSBL_lto.o
__SEGGER_RTL_ascii_tolower 12 2 Code Lc mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_ascii_toupper 12 2 Code Lc mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_ascii_towlower 12 2 Code Lc mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_ascii_towupper 12 2 Code Lc mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_stream_write 10 2 Code Lc prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
assert_failed 10 4 Code Lc blto2_FSBL_lto.o
HAL_MspInit 8 4 Code Lc blto2_FSBL_lto.o
SysTick_Handler 8 4 Code Gb blto2_FSBL_lto.o
__SEGGER_RTL_float32_signbit 8 2 Code Wk floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
abs 8 2 Code Wk intops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_X_file_write 6 2 Code Gb prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
Error_Handler 4 4 Code Lc blto2_FSBL_lto.o
__SEGGER_RTL_X_file_bufsize 4 2 Code Gb prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
BusFault_Handler 2 4 Code Gb blto2_FSBL_lto.o
DebugMon_Handler 2 4 Code Gb blto2_FSBL_lto.o
HardFault_Handler 2 4 Code Gb blto2_FSBL_lto.o
MX_BSEC_Init 2 4 Code Lc blto2_FSBL_lto.o
MemManage_Handler 2 4 Code Gb blto2_FSBL_lto.o
NMI_Handler 2 4 Code Gb blto2_FSBL_lto.o
PendSV_Handler 2 4 Code Gb blto2_FSBL_lto.o
SVC_Handler 2 4 Code Gb blto2_FSBL_lto.o
UsageFault_Handler 2 4 Code Gb blto2_FSBL_lto.o
exit 2 4 Code Gb SEGGER_THUMB_Startup.o
ADC1_2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
ADF1_FLT0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
BCK_ECC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
CACHEAXI_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
CACHE_ECC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
CRYP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
CSI_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
CTI_INT0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
CTI_INT1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
DCMIPP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
DCMI_PSSI_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
DMA2D_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
DTS_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
ETH1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI10_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI11_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI12_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI13_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI14_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI15_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI6_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI7_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI8_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI9_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
FDCAN1_IT0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
FDCAN1_IT1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
FDCAN2_IT0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
FDCAN2_IT1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
FDCAN3_IT0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
FDCAN3_IT1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
FDCAN_CU_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
FMC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
FPU_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GFXMMU_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GFXTIM_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel10_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel11_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel12_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel13_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel14_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel15_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel6_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel7_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel8_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel9_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPU2D_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPU2D_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HASH_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel10_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel11_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel12_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel13_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel14_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel15_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel6_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel7_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel8_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel9_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
I2C1_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
I2C1_EV_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
I2C2_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
I2C2_EV_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
I2C3_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
I2C3_EV_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
I2C4_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
I2C4_EV_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
I3C1_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
I3C1_EV_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
I3C2_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
I3C2_EV_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
IAC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
ICACHE_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
IWDG_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
JPEG_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
LOCKUP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
LPTIM1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
LPTIM2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
LPTIM3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
LPTIM4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
LPTIM5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
LPUART1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
LTDC_LO_ERR_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
LTDC_LO_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
LTDC_UP_ERR_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
LTDC_UP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
MCE1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
MCE2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
MCE3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
MCE4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
MDF1_FLT0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
MDF1_FLT1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
MDF1_FLT2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
MDF1_FLT3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
MDF1_FLT4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
MDF1_FLT5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
MDIOS_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
NPU0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
NPU1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
NPU2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
NPU3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
PAHB_ERR_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
PKA_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
PVD_PVM_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
RCC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
RCC_S_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
RIFSC_TAMPER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
RNG_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
RTC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
RTC_S_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
Reset_Handler 4 Code Gb STM32N6xx_Startup.o
SAES_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SAI1_A_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SAI1_B_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SAI2_A_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SAI2_B_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SDMMC1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SDMMC2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SPDIFRX_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SPI1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SPI2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SPI3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SPI4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SPI5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SPI6_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TAMP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TCM_ECC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM10_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM11_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM12_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM13_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM14_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM15_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM16_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM17_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM18_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM1_BRK_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM1_CC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM1_TRG_CCU_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM1_UP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM6_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM7_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM8_BRK_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM8_CC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM8_TRG_CCU_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM8_UP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM9_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
UART4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
UART5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
UART7_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
UART8_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
UART9_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
UCPD1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
USART10_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
USART1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
USART2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
USART3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
USART6_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
USB1_OTG_HS_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
USB2_OTG_HS_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
VENC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
WAKEUP_PIN_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
WWDG_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
XSPI1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
XSPI2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
XSPI3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
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__aeabi_memclr4 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__aeabi_memclr8 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
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__aeabi_memcpy4 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__aeabi_memcpy8 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__aeabi_memset 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__aeabi_memset4 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
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stderr 0x34000788 4 4 Init Gb prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
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stdout 0x34000780 4 4 Init Gb prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
uwTick 0x34000340 4 4 Zero Lc blto2_FSBL_lto.o
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0x3400077C uwTickPrio 4 4 Init Lc blto2_FSBL_lto.o
0x34000780 stdout 4 4 Init Gb prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34000784 stdin 4 4 Init Gb prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34000788 stderr 4 4 Init Gb prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x3400078C SystemCoreClock 4 4 Init Lc blto2_FSBL_lto.o
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Symbol name Size Align Type Bd Object File
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sfdp_param_info 120 4 Zero Lc blto2_FSBL_lto.o
JEDEC_SCCR_Map 112 4 Zero Lc blto2_FSBL_lto.o
hxspi2 100 4 Zero Lc blto2_FSBL_lto.o
JEDEC_Basic 96 4 Zero Lc blto2_FSBL_lto.o
JEDEC_OctalDdr 32 4 Zero Lc blto2_FSBL_lto.o
JEDEC_XSPI10 24 4 Zero Lc blto2_FSBL_lto.o
__RAL_global_locale 20 4 Init Gb mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_global_locale 20 4 Init Gb mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
_acDownBuffer 16 Zero Lc SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
JEDEC_Address4Bytes 8 4 Zero Lc blto2_FSBL_lto.o
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__SEGGER_RTL_locale_ptr 4 4 Zero Gb mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_stderr_file 4 4 Zero Lc prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_stdin_file 4 4 Zero Lc prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_stdout_file 4 4 Zero Lc prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
stderr 4 4 Init Gb prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
stdin 4 4 Init Gb prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
stdout 4 4 Init Gb prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
uwTick 4 4 Zero Lc blto2_FSBL_lto.o
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uwTickFreq 1 Init Lc blto2_FSBL_lto.o

Read-only data symbols by name

Symbol name Address Size Align Type Bd Object File
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__SEGGER_RTL_ascii_ctype_map 0x34194584 128 Cnst Lc mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_ascii_ctype_mask 0x34194407 13 Cnst Lc mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
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__SEGGER_RTL_c_locale_abbrev_day_names 0x341943B8 29 Cnst Gb mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_c_locale_abbrev_month_names 0x341943D5 49 Cnst Gb mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
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__SEGGER_RTL_c_locale_day_names 0x341942B8 58 Cnst Gb mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_c_locale_month_names 0x3419410D 87 Cnst Gb mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_c_locale_time_format 0x341943AF 9 Cnst Gb mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_codeset_ascii 0x3418D964 32 4 Cnst Gb mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
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__SEGGER_RTL_data_utf8_period 0x341942F4 2 Cnst Gb mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_hex_lc 0x3419456C 16 Cnst Gb prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_RTL_hex_uc 0x3419455C 16 Cnst Gb prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
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__SEGGER_init_data__ 0x3419464C [44] 4 Cnst Lc [ Linker created ]
__SEGGER_init_table__ 0x34194628 [36] 4 Cnst Lc [ Linker created ]

Read-only data symbols by address

Address Symbol name Size Align Type Bd Object File
0x34180750 __SEGGER_RTL_ipow10 160 8 Cnst Gb prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
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0x3418D828 __SEGGER_RTL_aPower2f 24 4 Cnst Lc utilops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x3418D958 __SEGGER_RTL_c_locale 12 4 Cnst Gb mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x3418D964 __SEGGER_RTL_codeset_ascii 32 4 Cnst Gb mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x3418D984 __SEGGER_RTL_c_locale_data 88 4 Cnst Gb mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34193D3E SFDP_BuildGenericDriver.block_erase_unit 8 2 Cnst Lc blto2_FSBL_lto.o
0x3419410D __SEGGER_RTL_c_locale_month_names 87 Cnst Gb mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34194164 __SEGGER_RTL_c_locale_am_pm_indicator 7 Cnst Gb mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x3419416B __SEGGER_RTL_c_locale_date_time_format 15 Cnst Gb mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x341942B8 __SEGGER_RTL_c_locale_day_names 58 Cnst Gb mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x341942F4 __SEGGER_RTL_data_utf8_period 2 Cnst Gb mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
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0x341943A6 __SEGGER_RTL_c_locale_date_format 9 Cnst Gb mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x341943AF __SEGGER_RTL_c_locale_time_format 9 Cnst Gb mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x341943B8 __SEGGER_RTL_c_locale_abbrev_day_names 29 Cnst Gb mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x341943D5 __SEGGER_RTL_c_locale_abbrev_month_names 49 Cnst Gb mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34194406 __SEGGER_RTL_data_empty_string 1 Cnst Gb mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34194407 __SEGGER_RTL_ascii_ctype_mask 13 Cnst Lc mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x3419455C __SEGGER_RTL_hex_uc 16 Cnst Gb prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x3419456C __SEGGER_RTL_hex_lc 16 Cnst Gb prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34194584 __SEGGER_RTL_ascii_ctype_map 128 Cnst Lc mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34194628 __SEGGER_init_table__ [36] 4 Cnst Lc [ Linker created ]
0x3419464C __SEGGER_init_data__ [44] 4 Cnst Lc [ Linker created ]

Untyped symbols by name

Symbol name Value Size Align Type Bd Object File
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_vectors 0x34180400 [844] 1024 Code Gb stm32n657xx_Vectors.o
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g_pfnVectors 0x34180400 [844] 1024 Code Gb stm32n657xx_Vectors.o

Untyped symbols by address

Value Symbol name Size Align Type Bd Object File
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REGION LIST

Regions by name

Name Range Size
AHB_RAM1 38000000-38003FFF 16 384
AHB_RAM2 38004000-38007FFF 16 384
AXI_RAM1 34064000-340FFFFF 638 976
AXI_RAM2 34180400-341FFFFF 523 264
AXI_RAM3 34200000-3426FFFF 458 752
AXI_RAM4 34270000-342DFFFF 458 752
AXI_RAM5 342E0000-3434FFFF 458 752
AXI_RAM6 34350000-343BFFFF 458 752
AXI_RAM7 343C0000-343FFFFF 262 144
AXI_RAM8 34400000-3441FFFF 131 072
BKP_RAM 3C000000-3C001FFF 8 192
DTCM_RAM 30000000-3001FFFF 131 072
FLASH 34180400-341FFFFF 523 264
FLEX_RAM 34000000-34063FFF 409 600
ITCM_RAM 10000000-1000FFFF 65 536
RAM 34000000-34063FFF 409 600

Analysis

AXI_RAM2: Identical to region FLASH FLASH: Identical to region AXI_RAM2 FLEX_RAM: Identical to region RAM RAM: Identical to region FLEX_RAM

BLOCK LIST

Blocks by name

Name Range Size Ordering
ctors 34194414-34194417 4 Auto
stack 34062000-34063FFF 8 192 Auto

Blocks by address

Range Size Name Ordering
34062000-34063FFF 8 192 stack Auto
34194414-34194417 4 ctors Auto

STACK SIZES

Functions by stack size

Function name Stack Object File

Functions without stack size information

MX_BSEC_Init HAL_RCCEx_GetPeriphCLKFreq EXTMEM_Init MX_EXTMEM_MANAGER_Init MX_GPIO_Init LL_AHB4_GRP1_EnableClock HAL_GPIO_WritePin HAL_GPIO_Init HAL_Init SystemClock_Config OTP_Config Error_Handler MX_XSPI2_Init HAL_Delay BOOT_Application HAL_PWREx_ConfigSupply HAL_PWREx_ControlVoltageScaling HAL_RCC_OscConfig HAL_RCC_GetClockConfig HAL_RCC_ClockConfig LL_APB4_GRP2_EnableClock HAL_BSEC_OTP_Read HAL_BSEC_OTP_Program assert_failed HAL_MspInit HAL_PWREx_EnableVddIO3 HAL_IncTick HAL_XSPI_Init HAL_XSPIM_Config HAL_XSPI_MspInit LL_APB4_GRP2_EnableClock.7 LL_AHB4_GRP1_EnableClock.8 HAL_PWREx_ConfigVddIORange HAL_RCCEx_PeriphCLKConfig LL_AHB5_GRP1_EnableClock HAL_NVIC_SetPriorityGrouping HAL_InitTick HAL_SYSTICK_Config HAL_NVIC_SetPriority HAL_GetTick HAL_SuspendTick HAL_BSEC_OTP_Reload __NVIC_SetPriorityGrouping __NVIC_GetPriorityGrouping NVIC_EncodePriority __NVIC_SetPriority SysTick_Config HAL_DMA_Abort LL_RCC_HSI_SetDivider LL_RCC_HSI_Enable LL_RCC_HSI_IsReady LL_RCC_GetCpuClkSource LL_RCC_GetSysClkSource LL_RCC_PLL1_GetSource LL_RCC_PLL2_GetSource LL_RCC_PLL3_GetSource LL_RCC_PLL4_GetSource LL_RCC_HSI_SetCalibTrimming LL_RCC_HSI_Disable LL_RCC_MSI_SetCalibTrimming LL_RCC_MSI_SetFrequency LL_RCC_MSI_Enable LL_RCC_MSI_IsReady LL_RCC_MSI_Disable LL_RCC_LSI_Enable LL_RCC_LSI_IsReady LL_RCC_LSI_Disable LL_RCC_LSE_IsReady RCC_PLL_IsNewConfig LL_RCC_PLL1_IsReady LL_RCC_IC1_GetSource LL_RCC_IC2_GetSource LL_RCC_IC6_GetSource LL_RCC_IC11_GetSource RCC_PLL_Config RCC_PLL_Enable LL_RCC_PLL2_IsReady LL_RCC_PLL3_IsReady LL_RCC_PLL4_IsReady RCC_PLL_Source_IsReady LL_RCC_HSE_IsReady RCC_IC_CheckPLLSources LL_RCC_IC1_Enable HAL_RCC_GetCpuClockFreq LL_RCC_PLL1_IsEnabledBypass LL_RCC_PLL2_IsEnabledBypass LL_RCC_PLL3_IsEnabledBypass LL_RCC_PLL4_IsEnabledBypass LL_RCC_HSI_GetDivider LL_RCC_IC1_GetDivider HAL_RCCEx_GetPLL1CLKFreq HAL_RCCEx_GetPLL2CLKFreq HAL_RCCEx_GetPLL3CLKFreq HAL_RCCEx_GetPLL4CLKFreq HAL_RCC_GetSysClockFreq LL_RCC_IC2_GetDivider RCC_GetSysClockFreq LL_RCC_GetRTCClockSource LL_RCC_LSE_IsReady.59 LL_RCC_SetRTC_HSEPrescaler LL_RCC_SetRTCClockSource LL_RCC_IC5_Enable.60 LL_RCC_IC10_Enable.61 LL_RCC_IC15_Enable.62 LL_RCC_IC19_Enable LL_RCC_IC20_Enable.63 LL_RCC_SetCLKPClockSource LL_RCC_IC3_Enable LL_RCC_IC4_Enable LL_RCC_CLKP_Enable LL_RCC_SetXSPIClockSource LL_RCC_SetFMCClockSource LL_RCC_SetSDMMCClockSource LL_RCC_IC7_Enable LL_RCC_IC8_Enable LL_RCC_SetADFClockSource LL_RCC_IC18_Enable LL_RCC_IC17_Enable LL_RCC_SetDCMIPPClockSource LL_RCC_IC12_Enable LL_RCC_SetETHClockSource LL_RCC_SetETHPHYInterface LL_RCC_SetETHREFRXClockSource LL_RCC_SetETHREFTXClockSource LL_RCC_IC13_Enable LL_RCC_SetFDCANClockSource LL_RCC_SetI2CClockSource LL_RCC_SetI3CClockSource LL_RCC_SetLPTIMClockSource LL_RCC_IC9_Enable LL_RCC_IC14_Enable LL_RCC_SetLPUARTClockSource LL_RCC_IC16_Enable LL_RCC_SetLTDCClockSource LL_RCC_SetMDFClockSource LL_RCC_SetPSSIClockSource LL_RCC_SetSAIClockSource LL_RCC_SetSPDIFRXClockSource LL_RCC_SetSPIClockSource LL_RCC_SetUSARTClockSource LL_RCC_SetOTGPHYClockSource LL_RCC_HSE_SelectHSEDiv2AsDiv2Clock LL_RCC_HSE_SelectHSEAsDiv2Clock LL_RCC_SetOTGPHYCKREFClockSource LL_RCC_SetTIMPrescaler LL_RCC_SetClockSource LL_RCC_GetADCClockSource LL_RCC_GetADCPrescaler LL_RCC_GetADFClockSource LL_RCC_GetCLKPClockSource LL_RCC_GetDCMIPPClockSource LL_RCC_GetETHClockSource LL_RCC_GetETHPTPClockSource LL_RCC_GetETH1PTPDivider LL_RCC_GetFDCANClockSource LL_RCC_GetFMCClockSource LL_RCC_GetI2CClockSource LL_RCC_GetI3CClockSource LL_RCC_GetLPTIMClockSource LL_RCC_GetLPUARTClockSource LL_RCC_GetLTDCClockSource LL_RCC_GetMDFClockSource LL_RCC_GetPSSIClockSource LL_RCC_GetSAIClockSource LL_RCC_GetSDMMCClockSource LL_RCC_GetSPDIFRXClockSource LL_RCC_GetSPIClockSource LL_RCC_GetTIMPrescaler LL_RCC_GetUSARTClockSource LL_RCC_HSE_IsSelectedHSEDiv2AsDiv2Clock LL_RCC_GetXSPIClockSource LL_RCC_GetClockSource RCCEx_GetADCCLKFreq RCCEx_GetADFCLKFreq RCCEx_GetCSICLKFreq RCCEx_GetCLKPCLKFreq RCCEx_GetDCMIPPCLKFreq RCCEx_GetETH1CLKFreq RCCEx_GetETH1PTPCLKFreq RCCEx_GetFDCANCLKFreq RCCEx_GetFMCCLKFreq RCCEx_GetI2CCLKFreq RCCEx_GetI3CCLKFreq RCCEx_GetLPTIMCLKFreq RCCEx_GetLPUARTCLKFreq RCCEx_GetLTDCCLKFreq RCCEx_GetMDFCLKFreq RCCEx_GetPSSICLKFreq RCCEx_GetRTCCLKFreq RCCEx_GetSAICLKFreq RCCEx_GetSDMMCCLKFreq RCCEx_GetSPDIFRXCLKFreq RCCEx_GetSPICLKFreq RCCEx_GetUSARTCLKFreq RCCEx_GetUARTCLKFreq RCCEx_GetOTGPHYCLKFreq RCCEx_GetOTGPHYCKREFCLKFreq RCCEx_GetXSPICLKFreq RCCEx_GetHCLKFreq LL_RCC_IC7_IsEnabled LL_RCC_IC7_GetDivider LL_RCC_IC7_GetSource LL_RCC_IC8_IsEnabled LL_RCC_IC8_GetDivider LL_RCC_IC8_GetSource LL_RCC_HSI_IsReady.77 LL_RCC_HSI_GetDivider.78 LL_RCC_MSI_IsReady.79 LL_RCC_IC18_IsEnabled LL_RCC_IC18_GetDivider LL_RCC_IC18_GetSource LL_RCC_CLKP_IsEnabled LL_RCC_HSE_IsReady.80 LL_RCC_IC5_IsEnabled LL_RCC_IC5_GetDivider LL_RCC_IC5_GetSource LL_RCC_IC10_IsEnabled LL_RCC_IC10_GetDivider LL_RCC_IC10_GetSource LL_RCC_IC15_IsEnabled LL_RCC_IC15_GetDivider LL_RCC_IC15_GetSource LL_RCC_IC19_IsEnabled LL_RCC_IC19_GetDivider LL_RCC_IC19_GetSource LL_RCC_IC20_IsEnabled LL_RCC_IC20_GetDivider LL_RCC_IC20_GetSource RCCEx_GetPCLK5Freq LL_RCC_IC17_IsEnabled LL_RCC_IC17_GetDivider LL_RCC_IC17_GetSource LL_RCC_IC12_IsEnabled LL_RCC_IC12_GetDivider LL_RCC_IC12_GetSource LL_RCC_IC13_IsEnabled LL_RCC_IC13_GetDivider LL_RCC_IC13_GetSource RCCEx_GetPCLK1Freq LL_RCC_IC3_IsEnabled LL_RCC_IC3_GetDivider LL_RCC_IC3_GetSource LL_RCC_IC4_IsEnabled LL_RCC_IC4_GetDivider LL_RCC_IC4_GetSource RCCEx_GetPCLK4Freq LL_RCC_LSI_IsReady.94 LL_RCC_IC9_IsEnabled LL_RCC_IC9_GetDivider LL_RCC_IC9_GetSource LL_RCC_IC14_IsEnabled LL_RCC_IC14_GetDivider LL_RCC_IC14_GetSource LL_RCC_IC16_IsEnabled LL_RCC_IC16_GetDivider LL_RCC_IC16_GetSource RCCEx_GetPCLK2Freq LL_RCC_GetUARTClockSource LL_RCC_GetUSBClockSource LL_RCC_GetAHBPrescaler.90 LL_RCC_PLL1_IsReady.87 LL_RCC_PLL1P_IsEnabled LL_RCC_PLL1_GetSource.88 RCCEx_GetPLLSourceFreq LL_RCC_PLL1_GetM LL_RCC_PLL1_GetN LL_RCC_PLL1_GetFRACN LL_RCC_PLL1_GetP1 LL_RCC_PLL1_GetP2 RCCEx_CalcPLLFreq LL_RCC_PLL1_IsEnabledBypass.89 LL_RCC_PLL2_IsReady.84 LL_RCC_PLL2P_IsEnabled LL_RCC_PLL2_GetSource.85 LL_RCC_PLL2_GetM LL_RCC_PLL2_GetN LL_RCC_PLL2_GetFRACN LL_RCC_PLL2_GetP1 LL_RCC_PLL2_GetP2 LL_RCC_PLL2_IsEnabledBypass.86 LL_RCC_PLL3_IsReady.81 LL_RCC_PLL3P_IsEnabled LL_RCC_PLL3_GetSource.82 LL_RCC_PLL3_GetM LL_RCC_PLL3_GetN LL_RCC_PLL3_GetFRACN LL_RCC_PLL3_GetP1 LL_RCC_PLL3_GetP2 LL_RCC_PLL3_IsEnabledBypass.83 LL_RCC_PLL4_IsReady.74 LL_RCC_PLL4P_IsEnabled LL_RCC_PLL4_GetSource.75 LL_RCC_PLL4_GetM LL_RCC_PLL4_GetN LL_RCC_PLL4_GetFRACN LL_RCC_PLL4_GetP1 LL_RCC_PLL4_GetP2 LL_RCC_PLL4_IsEnabledBypass.76 LL_RCC_MSI_GetFrequency LL_RCC_GetAPB1Prescaler.92 LL_RCC_GetAPB2Prescaler.91 LL_RCC_GetAPB4Prescaler.93 LL_RCC_GetAPB5Prescaler.95 HAL_XSPI_SetTimeout XSPI_WaitFlagStateUntilTimeout HAL_XSPI_Command XSPI_ConfigCmd HAL_XSPI_Transmit HAL_XSPI_Receive HAL_XSPI_AutoPolling HAL_XSPI_MemoryMapped HAL_XSPI_Abort XSPIM_GetConfig LL_AHB5_GRP1_IsEnabledClock MapMemory JumpToApplication EXTMEM_MemoryMappedMode EXTMEM_DeInit EXTMEM_GetMapAddress SFDP_ReadHeader SAL_XSPI_GetSFDP CheckSFDP_Signature SAL_XSPI_UpdateMemoryType SFDP_GetHeader SAL_XSPI_MemoryConfig SFDP_CollectData sfdp_get_paraminfo SFDP_MemoryReset SAL_XSPI_CommandSendData SFDP_BuildGenericDriver JEDEC_Basic_Manage4S4S4SEnableSequence JEDEC_Basic_ManageQuadEnableRequirement sfdp_enter_octal_mode driver_check_FlagBUSY SAL_XSPI_CheckStatusRegister sfdp_getfrequencevalue SAL_XSPI_SetClock sfdp_set_dummycycle SAL_XSPI_SendReadCommand SAL_XSPI_Abort SAL_XSPI_CommandSendReadAddress SAL_XSPI_Write EXTMEM_DRIVER_NOR_SFDP_Init SAL_XSPI_Init SAL_XSPI_DisableMapMode SAL_XSPI_GetId EXTMEM_DRIVER_NOR_SFDP_DeInit EXTMEM_DRIVER_NOR_SFDP_Enable_MemoryMappedMode EXTMEM_DRIVER_NOR_SFDP_Disable_MemoryMappedMode SAL_XSPI_EnableMapMode XSPI_FormatCommand XSPI_Transmit main NMI_Handler HardFault_Handler MemManage_Handler BusFault_Handler UsageFault_Handler SVC_Handler DebugMon_Handler PendSV_Handler SysTick_Handler SystemInit SystemCoreClockUpdate _start __SEGGER_init_done __startup_complete exit PVD_PVM_IRQHandler DTS_IRQHandler RCC_IRQHandler LOCKUP_IRQHandler CACHE_ECC_IRQHandler TCM_ECC_IRQHandler BCK_ECC_IRQHandler FPU_IRQHandler RTC_S_IRQHandler TAMP_IRQHandler RIFSC_TAMPER_IRQHandler IAC_IRQHandler RCC_S_IRQHandler RTC_IRQHandler IWDG_IRQHandler WWDG_IRQHandler EXTI0_IRQHandler EXTI1_IRQHandler EXTI2_IRQHandler EXTI3_IRQHandler EXTI4_IRQHandler EXTI5_IRQHandler EXTI6_IRQHandler EXTI7_IRQHandler EXTI8_IRQHandler EXTI9_IRQHandler EXTI10_IRQHandler EXTI11_IRQHandler EXTI12_IRQHandler EXTI13_IRQHandler EXTI14_IRQHandler EXTI15_IRQHandler SAES_IRQHandler CRYP_IRQHandler PKA_IRQHandler HASH_IRQHandler RNG_IRQHandler MCE1_IRQHandler MCE2_IRQHandler MCE3_IRQHandler MCE4_IRQHandler ADC1_2_IRQHandler CSI_IRQHandler DCMIPP_IRQHandler PAHB_ERR_IRQHandler NPU0_IRQHandler NPU1_IRQHandler NPU2_IRQHandler NPU3_IRQHandler CACHEAXI_IRQHandler LTDC_LO_IRQHandler LTDC_LO_ERR_IRQHandler DMA2D_IRQHandler JPEG_IRQHandler VENC_IRQHandler GFXMMU_IRQHandler GFXTIM_IRQHandler GPU2D_IRQHandler GPU2D_ER_IRQHandler ICACHE_IRQHandler HPDMA1_Channel0_IRQHandler HPDMA1_Channel1_IRQHandler HPDMA1_Channel2_IRQHandler HPDMA1_Channel3_IRQHandler HPDMA1_Channel4_IRQHandler HPDMA1_Channel5_IRQHandler HPDMA1_Channel6_IRQHandler HPDMA1_Channel7_IRQHandler HPDMA1_Channel8_IRQHandler HPDMA1_Channel9_IRQHandler HPDMA1_Channel10_IRQHandler HPDMA1_Channel11_IRQHandler HPDMA1_Channel12_IRQHandler HPDMA1_Channel13_IRQHandler HPDMA1_Channel14_IRQHandler HPDMA1_Channel15_IRQHandler GPDMA1_Channel0_IRQHandler GPDMA1_Channel1_IRQHandler GPDMA1_Channel2_IRQHandler GPDMA1_Channel3_IRQHandler GPDMA1_Channel4_IRQHandler GPDMA1_Channel5_IRQHandler GPDMA1_Channel6_IRQHandler GPDMA1_Channel7_IRQHandler GPDMA1_Channel8_IRQHandler GPDMA1_Channel9_IRQHandler GPDMA1_Channel10_IRQHandler GPDMA1_Channel11_IRQHandler GPDMA1_Channel12_IRQHandler GPDMA1_Channel13_IRQHandler GPDMA1_Channel14_IRQHandler GPDMA1_Channel15_IRQHandler I2C1_EV_IRQHandler I2C1_ER_IRQHandler I2C2_EV_IRQHandler I2C2_ER_IRQHandler I2C3_EV_IRQHandler I2C3_ER_IRQHandler I2C4_EV_IRQHandler I2C4_ER_IRQHandler I3C1_EV_IRQHandler I3C1_ER_IRQHandler I3C2_EV_IRQHandler I3C2_ER_IRQHandler TIM1_BRK_IRQHandler TIM1_UP_IRQHandler TIM1_TRG_CCU_IRQHandler TIM1_CC_IRQHandler TIM2_IRQHandler TIM3_IRQHandler TIM4_IRQHandler TIM5_IRQHandler TIM6_IRQHandler TIM7_IRQHandler TIM8_BRK_IRQHandler TIM8_UP_IRQHandler TIM8_TRG_CCU_IRQHandler TIM8_CC_IRQHandler TIM9_IRQHandler TIM10_IRQHandler TIM11_IRQHandler TIM12_IRQHandler TIM13_IRQHandler TIM14_IRQHandler TIM15_IRQHandler TIM16_IRQHandler TIM17_IRQHandler TIM18_IRQHandler LPTIM1_IRQHandler LPTIM2_IRQHandler LPTIM3_IRQHandler LPTIM4_IRQHandler LPTIM5_IRQHandler ADF1_FLT0_IRQHandler MDF1_FLT0_IRQHandler MDF1_FLT1_IRQHandler MDF1_FLT2_IRQHandler MDF1_FLT3_IRQHandler MDF1_FLT4_IRQHandler MDF1_FLT5_IRQHandler SAI1_A_IRQHandler SAI1_B_IRQHandler SAI2_A_IRQHandler SAI2_B_IRQHandler SPDIFRX_IRQHandler SPI1_IRQHandler SPI2_IRQHandler SPI3_IRQHandler SPI4_IRQHandler SPI5_IRQHandler SPI6_IRQHandler USART1_IRQHandler USART2_IRQHandler USART3_IRQHandler UART4_IRQHandler UART5_IRQHandler USART6_IRQHandler UART7_IRQHandler UART8_IRQHandler UART9_IRQHandler USART10_IRQHandler LPUART1_IRQHandler XSPI1_IRQHandler XSPI2_IRQHandler XSPI3_IRQHandler FMC_IRQHandler SDMMC1_IRQHandler SDMMC2_IRQHandler UCPD1_IRQHandler USB1_OTG_HS_IRQHandler USB2_OTG_HS_IRQHandler ETH1_IRQHandler FDCAN1_IT0_IRQHandler FDCAN1_IT1_IRQHandler FDCAN2_IT0_IRQHandler FDCAN2_IT1_IRQHandler FDCAN3_IT0_IRQHandler FDCAN3_IT1_IRQHandler FDCAN_CU_IRQHandler MDIOS_IRQHandler DCMI_PSSI_IRQHandler WAKEUP_PIN_IRQHandler CTI_INT0_IRQHandler CTI_INT1_IRQHandler LTDC_UP_IRQHandler LTDC_UP_ERR_IRQHandler reset_handler Reset_Handler fwrite ldexpf __SEGGER_RTL_float32_isnan __SEGGER_RTL_float32_isinf __SEGGER_RTL_float32_isnormal __SEGGER_RTL_float32_signbit frexpf fmodf floorf abs __SEGGER_RTL_pow10f __aeabi_f2ulz __aeabi_ul2f __aeabi_uldivmod __SEGGER_RTL_stream_write __SEGGER_RTL_putc __SEGGER_RTL_prin_flush __SEGGER_RTL_print_padding __SEGGER_RTL_pre_padding vfprintf vfprintf_l printf __SEGGER_RTL_vfprintf_short_float_long_long __SEGGER_init_zero __SEGGER_init_copy __SEGGER_init_ctors __SEGGER_RTL_X_file_stat __SEGGER_RTL_X_file_bufsize __SEGGER_RTL_X_file_write _DoInit _GetAvailWriteSpace _WriteNoCheck _WriteBlocking SEGGER_RTT_WriteNoLock SEGGER_RTT_Write strlen strnlen memcpy __aeabi_memcpy __aeabi_memcpy4 __aeabi_memcpy8 __aeabi_memclr __aeabi_memclr8 __aeabi_memclr4 __aeabi_memset8 __aeabi_memset4 __aeabi_memset memset __SEGGER_RTL_ascii_isctype __SEGGER_RTL_ascii_toupper __SEGGER_RTL_ascii_tolower __SEGGER_RTL_ascii_iswctype __SEGGER_RTL_ascii_towupper __SEGGER_RTL_ascii_towlower __SEGGER_RTL_current_locale __SEGGER_RTL_ascii_mbtowc __SEGGER_RTL_ascii_wctomb __SEGGER_RTL_vfprintf

UNUSED INPUTS

Unused object files

No unused object files

ABSOLUTE LISTING

Section .bss.extmem_list_config from blto2_FSBL_lto.o, size=172, align=4


extmem_list_config: 0x34000000: 01 DC.B 0x01 ; '\x01' 0x34000001: 11 DC.B 0x11 ; '\x11' 0x34000002: 01 DC.B 0x01 ; '\x01' 0x34000003: 25 DC.B 0x25 ; '%' 0x34000004: 0E DC.B 0x0E ; '\x0E' 0x34000005: 13 DC.B 0x13 ; '\x13' 0x34000006: 05 DC.B 0x05 ; '\x05' 0x34000007: 03 DC.B 0x03 ; '\x03' 0x34000008: 0E DC.B 0x0E ; '\x0E' 0x34000009: 10 DC.B 0x10 ; '\x10' 0x3400000A: 17 DC.B 0x17 ; '\x17' 0x3400000B: B4 DC.B 0xB4 ; '\xB4' 0x3400000C: 42 DC.B 0x42 ; 'B' 0x3400000D: 19 DC.B 0x19 ; '\x19' 0x3400000E: 11 DC.B 0x11 ; '\x11' 0x3400000F: 01 DC.B 0x01 ; '\x01' 0x34000010: 12 DC.B 0x12 ; '\x12' 0x34000011: 06 DC.B 0x06 ; '\x06' 0x34000012: 43 DC.B 0x43 ; 'C' 0x34000013: 17 DC.B 0x17 ; '\x17' 0x34000014: 00 DC.B 0x00 ; '\0' 0x34000015: 00 DC.B 0x00 ; '\0' 0x34000016: 02 DC.B 0x02 ; '\x02' 0x34000017: 2E DC.B 0x2E ; '.' 0x34000018: 00 DC.B 0x00 ; '\0' 0x34000019: 11 DC.B 0x11 ; '\x11' 0x3400001A: 01 DC.B 0x01 ; '\x01' 0x3400001B: 12 DC.B 0x12 ; '\x12' 0x3400001C: 06 DC.B 0x06 ; '\x06' 0x3400001D: 40 DC.B 0x40 ; '@' 0x3400001E: 18 DC.B 0x18 ; '\x18' 0x3400001F: 03 DC.B 0x03 ; '\x03' 0x34000020: 0E DC.B 0x0E ; '\x0E' 0x34000021: 3A DC.B 0x3A ; ':' 0x34000022: 0B DC.B 0x0B ; '\v' 0x34000023: 3B DC.B 0x3B ; ';' 0x34000024: 0B DC.B 0x0B ; '\v' 0x34000025: 27 DC.B 0x27 ; ''' 0x34000026: 19 DC.B 0x19 ; '\x19' 0x34000027: 3F DC.B 0x3F ; '?' 0x34000028: 19 DC.B 0x19 ; '\x19' 0x34000029: 00 DC.B 0x00 ; '\0' 0x3400002A: 00 DC.B 0x00 ; '\0' 0x3400002B: 03 DC.B 0x03 ; '\x03' 0x3400002C: 04 DC.B 0x04 ; '\x04' 0x3400002D: 01 DC.B 0x01 ; '\x01' 0x3400002E: 49 DC.B 0x49 ; 'I' 0x3400002F: 13 DC.B 0x13 ; '\x13' 0x34000030: 0B DC.B 0x0B ; '\v' 0x34000031: 0B DC.B 0x0B ; '\v' 0x34000032: 3A DC.B 0x3A ; ':' 0x34000033: 0B DC.B 0x0B ; '\v' 0x34000034: 3B DC.B 0x3B ; ';' 0x34000035: 0B DC.B 0x0B ; '\v' 0x34000036: 00 DC.B 0x00 ; '\0' 0x34000037: 00 DC.B 0x00 ; '\0' 0x34000038: 04 DC.B 0x04 ; '\x04' 0x34000039: 28 DC.B 0x28 ; '(' 0x3400003A: 00 DC.B 0x00 ; '\0' 0x3400003B: 03 DC.B 0x03 ; '\x03' 0x3400003C: 0E DC.B 0x0E ; '\x0E' 0x3400003D: 1C DC.B 0x1C ; '\x1C' 0x3400003E: 0F DC.B 0x0F ; '\x0F' 0x3400003F: 00 DC.B 0x00 ; '\0' 0x34000040: 00 DC.B 0x00 ; '\0' 0x34000041: 05 DC.B 0x05 ; '\x05' 0x34000042: 24 DC.B 0x24 ; '$' 0x34000043: 00 DC.B 0x00 ; '\0' 0x34000044: 03 DC.B 0x03 ; '\x03' 0x34000045: 0E DC.B 0x0E ; '\x0E' 0x34000046: 3E DC.B 0x3E ; '>' 0x34000047: 0B DC.B 0x0B ; '\v' 0x34000048: 0B DC.B 0x0B ; '\v' 0x34000049: 0B DC.B 0x0B ; '\v' 0x3400004A: 00 DC.B 0x00 ; '\0' 0x3400004B: 00 DC.B 0x00 ; '\0' 0x3400004C: 06 DC.B 0x06 ; '\x06' 0x3400004D: 04 DC.B 0x04 ; '\x04' 0x3400004E: 01 DC.B 0x01 ; '\x01' 0x3400004F: 49 DC.B 0x49 ; 'I' 0x34000050: 10 DC.B 0x10 ; '\x10' 0x34000051: 0B DC.B 0x0B ; '\v' 0x34000052: 0B DC.B 0x0B ; '\v' 0x34000053: 3A DC.B 0x3A ; ':' 0x34000054: 0B DC.B 0x0B ; '\v' 0x34000055: 3B DC.B 0x3B ; ';' 0x34000056: 0B DC.B 0x0B ; '\v' 0x34000057: 00 DC.B 0x00 ; '\0' 0x34000058: 00 DC.B 0x00 ; '\0' 0x34000059: 07 DC.B 0x07 ; '\x07' 0x3400005A: 0F DC.B 0x0F ; '\x0F' 0x3400005B: 00 DC.B 0x00 ; '\0' 0x3400005C: 00 DC.B 0x00 ; '\0' 0x3400005D: 00 DC.B 0x00 ; '\0' 0x3400005E: 08 DC.B 0x08 ; '\b' 0x3400005F: 11 DC.B 0x11 ; '\x11' 0x34000060: 01 DC.B 0x01 ; '\x01' 0x34000061: 25 DC.B 0x25 ; '%' 0x34000062: 0E DC.B 0x0E ; '\x0E' 0x34000063: 13 DC.B 0x13 ; '\x13' 0x34000064: 05 DC.B 0x05 ; '\x05' 0x34000065: 03 DC.B 0x03 ; '\x03' 0x34000066: 0E DC.B 0x0E ; '\x0E' 0x34000067: 10 DC.B 0x10 ; '\x10' 0x34000068: 17 DC.B 0x17 ; '\x17' 0x34000069: B4 DC.B 0xB4 ; '\xB4' 0x3400006A: 42 DC.B 0x42 ; 'B' 0x3400006B: 19 DC.B 0x19 ; '\x19' 0x3400006C: 11 DC.B 0x11 ; '\x11' 0x3400006D: 01 DC.B 0x01 ; '\x01' 0x3400006E: 55 DC.B 0x55 ; 'U' 0x3400006F: 17 DC.B 0x17 ; '\x17' 0x34000070: 43 DC.B 0x43 ; 'C' 0x34000071: 17 DC.B 0x17 ; '\x17' 0x34000072: 00 DC.B 0x00 ; '\0' 0x34000073: 00 DC.B 0x00 ; '\0' 0x34000074: 09 DC.B 0x09 ; '\t' 0x34000075: 0F DC.B 0x0F ; '\x0F' 0x34000076: 00 DC.B 0x00 ; '\0' 0x34000077: 49 DC.B 0x49 ; 'I' 0x34000078: 13 DC.B 0x13 ; '\x13' 0x34000079: 00 DC.B 0x00 ; '\0' 0x3400007A: 00 DC.B 0x00 ; '\0' 0x3400007B: 0A DC.B 0x0A ; '\n' 0x3400007C: 16 DC.B 0x16 ; '\x16' 0x3400007D: 00 DC.B 0x00 ; '\0' 0x3400007E: 49 DC.B 0x49 ; 'I' 0x3400007F: 13 DC.B 0x13 ; '\x13' 0x34000080: 03 DC.B 0x03 ; '\x03' 0x34000081: 0E DC.B 0x0E ; '\x0E' 0x34000082: 3A DC.B 0x3A ; ':' 0x34000083: 0B DC.B 0x0B ; '\v' 0x34000084: 3B DC.B 0x3B ; ';' 0x34000085: 05 DC.B 0x05 ; '\x05' 0x34000086: 00 DC.B 0x00 ; '\0' 0x34000087: 00 DC.B 0x00 ; '\0' 0x34000088: 0B DC.B 0x0B ; '\v' 0x34000089: 13 DC.B 0x13 ; '\x13' 0x3400008A: 01 DC.B 0x01 ; '\x01' 0x3400008B: 0B DC.B 0x0B ; '\v' 0x3400008C: 0B DC.B 0x0B ; '\v' 0x3400008D: 3A DC.B 0x3A ; ':' 0x3400008E: 0B DC.B 0x0B ; '\v' 0x3400008F: 3B DC.B 0x3B ; ';' 0x34000090: 05 DC.B 0x05 ; '\x05' 0x34000091: 00 DC.B 0x00 ; '\0' 0x34000092: 00 DC.B 0x00 ; '\0' 0x34000093: 0C DC.B 0x0C ; '\x0C' 0x34000094: 0D DC.B 0x0D ; '\r' 0x34000095: 00 DC.B 0x00 ; '\0' 0x34000096: 03 DC.B 0x03 ; '\x03' 0x34000097: 0E DC.B 0x0E ; '\x0E' 0x34000098: 49 DC.B 0x49 ; 'I' 0x34000099: 13 DC.B 0x13 ; '\x13' 0x3400009A: 3A DC.B 0x3A ; ':' 0x3400009B: 0B DC.B 0x0B ; '\v' 0x3400009C: 3B DC.B 0x3B ; ';' 0x3400009D: 05 DC.B 0x05 ; '\x05' 0x3400009E: 38 DC.B 0x38 ; '8' 0x3400009F: 0B DC.B 0x0B ; '\v' 0x340000A0: 00 DC.B 0x00 ; '\0' 0x340000A1: 00 DC.B 0x00 ; '\0' 0x340000A2: 0D DC.B 0x0D ; '\r' 0x340000A3: 35 DC.B 0x35 ; '5' 0x340000A4: 00 DC.B 0x00 ; '\0' 0x340000A5: 49 DC.B 0x49 ; 'I' 0x340000A6: 13 DC.B 0x13 ; '\x13' 0x340000A7: 00 DC.B 0x00 ; '\0' 0x340000A8: 00 DC.B 0x00 ; '\0' 0x340000A9: 0E DC.B 0x0E ; '\x0E' 0x340000AA: 01 DC.B 0x01 ; '\x01' 0x340000AB: 01 DC.B 0x01 ; '\x01'

Section .bss.libc._SEGGER_RTT from SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=168, align=4


_SEGGER_RTT: 0x340000AC: 30 DC.B 0x30 ; '0' 0x340000AD: 31 DC.B 0x31 ; '1' 0x340000AE: 32 DC.B 0x32 ; '2' 0x340000AF: 33 DC.B 0x33 ; '3' 0x340000B0: 34 DC.B 0x34 ; '4' 0x340000B1: 35 DC.B 0x35 ; '5' 0x340000B2: 36 DC.B 0x36 ; '6' 0x340000B3: 37 DC.B 0x37 ; '7' 0x340000B4: 38 DC.B 0x38 ; '8' 0x340000B5: 39 DC.B 0x39 ; '9' 0x340000B6: 41 DC.B 0x41 ; 'A' 0x340000B7: 42 DC.B 0x42 ; 'B' 0x340000B8: 43 DC.B 0x43 ; 'C' 0x340000B9: 44 DC.B 0x44 ; 'D' 0x340000BA: 45 DC.B 0x45 ; 'E' 0x340000BB: 46 DC.B 0x46 ; 'F' 0x340000BC: 00 DC.B 0x00 ; '\0' 0x340000BD: 00 DC.B 0x00 ; '\0' 0x340000BE: 00 DC.B 0x00 ; '\0' 0x340000BF: 00 DC.B 0x00 ; '\0' 0x340000C0: 00 DC.B 0x00 ; '\0' 0x340000C1: 00 DC.B 0x00 ; '\0' 0x340000C2: 54 DC.B 0x54 ; 'T' 0x340000C3: 54 DC.B 0x54 ; 'T' 0x340000C4: 52 DC.B 0x52 ; 'R' 0x340000C5: 20 DC.B 0x20 ; ' ' 0x340000C6: 52 DC.B 0x52 ; 'R' 0x340000C7: 45 DC.B 0x45 ; 'E' 0x340000C8: 47 DC.B 0x47 ; 'G' 0x340000C9: 47 DC.B 0x47 ; 'G' 0x340000CA: 45 DC.B 0x45 ; 'E' 0x340000CB: 53 DC.B 0x53 ; 'S' 0x340000CC: 00 DC.B 0x00 ; '\0' 0x340000CD: 54 DC.B 0x54 ; 'T' 0x340000CE: 65 DC.B 0x65 ; 'e' 0x340000CF: 72 DC.B 0x72 ; 'r' 0x340000D0: 6D DC.B 0x6D ; 'm' 0x340000D1: 69 DC.B 0x69 ; 'i' 0x340000D2: 6E DC.B 0x6E ; 'n' 0x340000D3: 61 DC.B 0x61 ; 'a' 0x340000D4: 6C DC.B 0x6C ; 'l' 0x340000D5: 00 DC.B 0x00 ; '\0' 0x340000D6: 00 DC.B 0x00 ; '\0' 0x340000D7: 53 DC.B 0x53 ; 'S' 0x340000D8: 45 DC.B 0x45 ; 'E' 0x340000D9: 47 DC.B 0x47 ; 'G' 0x340000DA: 47 DC.B 0x47 ; 'G' 0x340000DB: 45 DC.B 0x45 ; 'E' 0x340000DC: 52 DC.B 0x52 ; 'R' 0x340000DD: 20 DC.B 0x20 ; ' ' 0x340000DE: 43 DC.B 0x43 ; 'C' 0x340000DF: 2F DC.B 0x2F ; '/' 0x340000E0: 43 DC.B 0x43 ; 'C' 0x340000E1: 2B DC.B 0x2B ; '+' 0x340000E2: 2B DC.B 0x2B ; '+' 0x340000E3: 20 DC.B 0x20 ; ' ' 0x340000E4: 63 DC.B 0x63 ; 'c' 0x340000E5: 6F DC.B 0x6F ; 'o' 0x340000E6: 6D DC.B 0x6D ; 'm' 0x340000E7: 70 DC.B 0x70 ; 'p' 0x340000E8: 69 DC.B 0x69 ; 'i' 0x340000E9: 6C DC.B 0x6C ; 'l' 0x340000EA: 65 DC.B 0x65 ; 'e' 0x340000EB: 72 DC.B 0x72 ; 'r' 0x340000EC: 20 DC.B 0x20 ; ' ' 0x340000ED: 76 DC.B 0x76 ; 'v' 0x340000EE: 65 DC.B 0x65 ; 'e' 0x340000EF: 72 DC.B 0x72 ; 'r' 0x340000F0: 73 DC.B 0x73 ; 's' 0x340000F1: 69 DC.B 0x69 ; 'i' 0x340000F2: 6F DC.B 0x6F ; 'o' 0x340000F3: 6E DC.B 0x6E ; 'n' 0x340000F4: 20 DC.B 0x20 ; ' ' 0x340000F5: 32 DC.B 0x32 ; '2' 0x340000F6: 32 DC.B 0x32 ; '2' 0x340000F7: 2E DC.B 0x2E ; '.' 0x340000F8: 31 DC.B 0x31 ; '1' 0x340000F9: 2E DC.B 0x2E ; '.' 0x340000FA: 32 DC.B 0x32 ; '2' 0x340000FB: 20 DC.B 0x20 ; ' ' 0x340000FC: 28 DC.B 0x28 ; '(' 0x340000FD: 62 DC.B 0x62 ; 'b' 0x340000FE: 61 DC.B 0x61 ; 'a' 0x340000FF: 73 DC.B 0x73 ; 's' 0x34000100: 65 DC.B 0x65 ; 'e' 0x34000101: 64 DC.B 0x64 ; 'd' 0x34000102: 20 DC.B 0x20 ; ' ' 0x34000103: 6F DC.B 0x6F ; 'o' 0x34000104: 6E DC.B 0x6E ; 'n' 0x34000105: 20 DC.B 0x20 ; ' ' 0x34000106: 63 DC.B 0x63 ; 'c' 0x34000107: 6C DC.B 0x6C ; 'l' 0x34000108: 61 DC.B 0x61 ; 'a' 0x34000109: 6E DC.B 0x6E ; 'n' 0x3400010A: 67 DC.B 0x67 ; 'g' 0x3400010B: 20 DC.B 0x20 ; ' ' 0x3400010C: 32 DC.B 0x32 ; '2' 0x3400010D: 32 DC.B 0x32 ; '2' 0x3400010E: 2E DC.B 0x2E ; '.' 0x3400010F: 31 DC.B 0x31 ; '1' 0x34000110: 2E DC.B 0x2E ; '.' 0x34000111: 38 DC.B 0x38 ; '8' 0x34000112: 29 DC.B 0x29 ; ')' 0x34000113: 00 DC.B 0x00 ; '\0' 0x34000114: 41 DC.B 0x41 ; 'A' 0x34000115: 3B DC.B 0x3B ; ';' 0x34000116: 00 DC.B 0x00 ; '\0' 0x34000117: 00 DC.B 0x00 ; '\0' 0x34000118: 00 DC.B 0x00 ; '\0' 0x34000119: 61 DC.B 0x61 ; 'a' 0x3400011A: 65 DC.B 0x65 ; 'e' 0x3400011B: 61 DC.B 0x61 ; 'a' 0x3400011C: 62 DC.B 0x62 ; 'b' 0x3400011D: 69 DC.B 0x69 ; 'i' 0x3400011E: 00 DC.B 0x00 ; '\0' 0x3400011F: 01 DC.B 0x01 ; '\x01' 0x34000120: 31 DC.B 0x31 ; '1' 0x34000121: 00 DC.B 0x00 ; '\0' 0x34000122: 00 DC.B 0x00 ; '\0' 0x34000123: 00 DC.B 0x00 ; '\0' 0x34000124: 43 DC.B 0x43 ; 'C' 0x34000125: 32 DC.B 0x32 ; '2' 0x34000126: 2E DC.B 0x2E ; '.' 0x34000127: 30 DC.B 0x30 ; '0' 0x34000128: 39 DC.B 0x39 ; '9' 0x34000129: 00 DC.B 0x00 ; '\0' 0x3400012A: 06 DC.B 0x06 ; '\x06' 0x3400012B: 15 DC.B 0x15 ; '\x15' 0x3400012C: 07 DC.B 0x07 ; '\x07' 0x3400012D: 4D DC.B 0x4D ; 'M' 0x3400012E: 08 DC.B 0x08 ; '\b' 0x3400012F: 00 DC.B 0x00 ; '\0' 0x34000130: 09 DC.B 0x09 ; '\t' 0x34000131: 03 DC.B 0x03 ; '\x03' 0x34000132: 0A DC.B 0x0A ; '\n' 0x34000133: 08 DC.B 0x08 ; '\b' 0x34000134: 0E DC.B 0x0E ; '\x0E' 0x34000135: 00 DC.B 0x00 ; '\0' 0x34000136: 11 DC.B 0x11 ; '\x11' 0x34000137: 01 DC.B 0x01 ; '\x01' 0x34000138: 12 DC.B 0x12 ; '\x12' 0x34000139: 04 DC.B 0x04 ; '\x04' 0x3400013A: 14 DC.B 0x14 ; '\x14' 0x3400013B: 01 DC.B 0x01 ; '\x01' 0x3400013C: 15 DC.B 0x15 ; '\x15' 0x3400013D: 00 DC.B 0x00 ; '\0' 0x3400013E: 17 DC.B 0x17 ; '\x17' 0x3400013F: 03 DC.B 0x03 ; '\x03' 0x34000140: 18 DC.B 0x18 ; '\x18' 0x34000141: 01 DC.B 0x01 ; '\x01' 0x34000142: 19 DC.B 0x19 ; '\x19' 0x34000143: 01 DC.B 0x01 ; '\x01' 0x34000144: 1A DC.B 0x1A ; '\x1A' 0x34000145: 01 DC.B 0x01 ; '\x01' 0x34000146: 1C DC.B 0x1C ; '\x1C' 0x34000147: 01 DC.B 0x01 ; '\x01' 0x34000148: 1E DC.B 0x1E ; '\x1E' 0x34000149: 03 DC.B 0x03 ; '\x03' 0x3400014A: 22 DC.B 0x22 ; '\"' 0x3400014B: 00 DC.B 0x00 ; '\0' 0x3400014C: 24 DC.B 0x24 ; '$' 0x3400014D: 01 DC.B 0x01 ; '\x01' 0x3400014E: 26 DC.B 0x26 ; '&' 0x3400014F: 01 DC.B 0x01 ; '\x01' 0x34000150: 10 DC.B 0x10 ; '\x10' 0x34000151: 00 DC.B 0x00 ; '\0' 0x34000152: 00 DC.B 0x00 ; '\0' 0x34000153: 00 DC.B 0x00 ; '\0'

Section .bss.sfdp_param_info from blto2_FSBL_lto.o, size=120, align=4


sfdp_param_info: 0x34000154: 10 DC.B 0x10 ; '\x10' 0x34000155: 00 DC.B 0x00 ; '\0' 0x34000156: 00 DC.B 0x00 ; '\0' 0x34000157: 01 DC.B 0x01 ; '\x01' 0x34000158: A0 DC.B 0xA0 ; '\xA0' 0x34000159: 0F DC.B 0x0F ; '\x0F' 0x3400015A: 00 DC.B 0x00 ; '\0' 0x3400015B: FA DC.B 0xFA ; '\xFA' 0x3400015C: 10 DC.B 0x10 ; '\x10' 0x3400015D: 00 DC.B 0x00 ; '\0' 0x3400015E: 00 DC.B 0x00 ; '\0' 0x3400015F: 00 DC.B 0x00 ; '\0' 0x34000160: 00 DC.B 0x00 ; '\0' 0x34000161: 01 DC.B 0x01 ; '\x01' 0x34000162: 00 DC.B 0x00 ; '\0' 0x34000163: 00 DC.B 0x00 ; '\0' 0x34000164: A0 DC.B 0xA0 ; '\xA0' 0x34000165: 0F DC.B 0x0F ; '\x0F' 0x34000166: 00 DC.B 0x00 ; '\0' 0x34000167: 00 DC.B 0x00 ; '\0' 0x34000168: 00 DC.B 0x00 ; '\0' 0x34000169: FA DC.B 0xFA ; '\xFA' 0x3400016A: 00 DC.B 0x00 ; '\0' 0x3400016B: 00 DC.B 0x00 ; '\0' 0x3400016C: 00 DC.B 0x00 ; '\0' 0x3400016D: 00 DC.B 0x00 ; '\0' 0x3400016E: 21 DC.B 0x21 ; '!' 0x3400016F: 00 DC.B 0x00 ; '\0' 0x34000170: 32 DC.B 0x32 ; '2' 0x34000171: 00 DC.B 0x00 ; '\0' 0x34000172: 42 DC.B 0x42 ; 'B' 0x34000173: 00 DC.B 0x00 ; '\0' 0x34000174: 50 DC.B 0x50 ; 'P' 0x34000175: 00 DC.B 0x00 ; '\0' 0x34000176: 64 DC.B 0x64 ; 'd' 0x34000177: 00 DC.B 0x00 ; '\0' 0x34000178: 85 DC.B 0x85 ; '\x85' 0x34000179: 00 DC.B 0x00 ; '\0' 0x3400017A: A6 DC.B 0xA6 ; '\xA6' 0x3400017B: 00 DC.B 0x00 ; '\0' 0x3400017C: C8 DC.B 0xC8 ; '\xC8' 0x3400017D: 00 DC.B 0x00 ; '\0' 0x3400017E: FA DC.B 0xFA ; '\xFA' 0x3400017F: 00 DC.B 0x00 ; '\0' 0x34000180: 0A DC.B 0x0A ; '\n' 0x34000181: 01 DC.B 0x01 ; '\x01' 0x34000182: 4D DC.B 0x4D ; 'M' 0x34000183: 01 DC.B 0x01 ; '\x01' 0x34000184: 90 DC.B 0x90 ; '\x90' 0x34000185: 01 DC.B 0x01 ; '\x01' 0x34000186: 03 DC.B 0x03 ; '\x03' 0x34000187: 07 DC.B 0x07 ; '\x07' 0x34000188: 0F DC.B 0x0F ; '\x0F' 0x34000189: 1F DC.B 0x1F ; '\x1F' 0x3400018A: 00 DC.B 0x00 ; '\0' 0x3400018B: 00 DC.B 0x00 ; '\0' 0x3400018C: 01 DC.B 0x01 ; '\x01' 0x3400018D: 11 DC.B 0x11 ; '\x11' 0x3400018E: 01 DC.B 0x01 ; '\x01' 0x3400018F: 25 DC.B 0x25 ; '%' 0x34000190: 0E DC.B 0x0E ; '\x0E' 0x34000191: 13 DC.B 0x13 ; '\x13' 0x34000192: 05 DC.B 0x05 ; '\x05' 0x34000193: 03 DC.B 0x03 ; '\x03' 0x34000194: 0E DC.B 0x0E ; '\x0E' 0x34000195: 10 DC.B 0x10 ; '\x10' 0x34000196: 17 DC.B 0x17 ; '\x17' 0x34000197: B4 DC.B 0xB4 ; '\xB4' 0x34000198: 42 DC.B 0x42 ; 'B' 0x34000199: 19 DC.B 0x19 ; '\x19' 0x3400019A: 11 DC.B 0x11 ; '\x11' 0x3400019B: 01 DC.B 0x01 ; '\x01' 0x3400019C: 12 DC.B 0x12 ; '\x12' 0x3400019D: 06 DC.B 0x06 ; '\x06' 0x3400019E: 43 DC.B 0x43 ; 'C' 0x3400019F: 17 DC.B 0x17 ; '\x17' 0x340001A0: 00 DC.B 0x00 ; '\0' 0x340001A1: 00 DC.B 0x00 ; '\0' 0x340001A2: 02 DC.B 0x02 ; '\x02' 0x340001A3: 2E DC.B 0x2E ; '.' 0x340001A4: 00 DC.B 0x00 ; '\0' 0x340001A5: 11 DC.B 0x11 ; '\x11' 0x340001A6: 01 DC.B 0x01 ; '\x01' 0x340001A7: 12 DC.B 0x12 ; '\x12' 0x340001A8: 06 DC.B 0x06 ; '\x06' 0x340001A9: 40 DC.B 0x40 ; '@' 0x340001AA: 18 DC.B 0x18 ; '\x18' 0x340001AB: 03 DC.B 0x03 ; '\x03' 0x340001AC: 0E DC.B 0x0E ; '\x0E' 0x340001AD: 3A DC.B 0x3A ; ':' 0x340001AE: 0B DC.B 0x0B ; '\v' 0x340001AF: 3B DC.B 0x3B ; ';' 0x340001B0: 0B DC.B 0x0B ; '\v' 0x340001B1: 27 DC.B 0x27 ; ''' 0x340001B2: 19 DC.B 0x19 ; '\x19' 0x340001B3: 3F DC.B 0x3F ; '?' 0x340001B4: 19 DC.B 0x19 ; '\x19' 0x340001B5: 00 DC.B 0x00 ; '\0' 0x340001B6: 00 DC.B 0x00 ; '\0' 0x340001B7: 03 DC.B 0x03 ; '\x03' 0x340001B8: 04 DC.B 0x04 ; '\x04' 0x340001B9: 01 DC.B 0x01 ; '\x01' 0x340001BA: 49 DC.B 0x49 ; 'I' 0x340001BB: 13 DC.B 0x13 ; '\x13' 0x340001BC: 0B DC.B 0x0B ; '\v' 0x340001BD: 0B DC.B 0x0B ; '\v' 0x340001BE: 3A DC.B 0x3A ; ':' 0x340001BF: 0B DC.B 0x0B ; '\v' 0x340001C0: 3B DC.B 0x3B ; ';' 0x340001C1: 0B DC.B 0x0B ; '\v' 0x340001C2: 00 DC.B 0x00 ; '\0' 0x340001C3: 00 DC.B 0x00 ; '\0' 0x340001C4: 04 DC.B 0x04 ; '\x04' 0x340001C5: 28 DC.B 0x28 ; '(' 0x340001C6: 00 DC.B 0x00 ; '\0' 0x340001C7: 03 DC.B 0x03 ; '\x03' 0x340001C8: 0E DC.B 0x0E ; '\x0E' 0x340001C9: 1C DC.B 0x1C ; '\x1C' 0x340001CA: 0F DC.B 0x0F ; '\x0F' 0x340001CB: 00 DC.B 0x00 ; '\0'

Section .bss.JEDEC_SCCR_Map from blto2_FSBL_lto.o, size=112, align=4


JEDEC_SCCR_Map: 0x340001CC: 10 DC.B 0x10 ; '\x10' 0x340001CD: 00 DC.B 0x00 ; '\0' 0x340001CE: 00 DC.B 0x00 ; '\0' 0x340001CF: 01 DC.B 0x01 ; '\x01' 0x340001D0: A0 DC.B 0xA0 ; '\xA0' 0x340001D1: 0F DC.B 0x0F ; '\x0F' 0x340001D2: 00 DC.B 0x00 ; '\0' 0x340001D3: FA DC.B 0xFA ; '\xFA' 0x340001D4: 10 DC.B 0x10 ; '\x10' 0x340001D5: 00 DC.B 0x00 ; '\0' 0x340001D6: 00 DC.B 0x00 ; '\0' 0x340001D7: 00 DC.B 0x00 ; '\0' 0x340001D8: 00 DC.B 0x00 ; '\0' 0x340001D9: 01 DC.B 0x01 ; '\x01' 0x340001DA: 00 DC.B 0x00 ; '\0' 0x340001DB: 00 DC.B 0x00 ; '\0' 0x340001DC: A0 DC.B 0xA0 ; '\xA0' 0x340001DD: 0F DC.B 0x0F ; '\x0F' 0x340001DE: 00 DC.B 0x00 ; '\0' 0x340001DF: 00 DC.B 0x00 ; '\0' 0x340001E0: 00 DC.B 0x00 ; '\0' 0x340001E1: FA DC.B 0xFA ; '\xFA' 0x340001E2: 00 DC.B 0x00 ; '\0' 0x340001E3: 00 DC.B 0x00 ; '\0' 0x340001E4: 00 DC.B 0x00 ; '\0' 0x340001E5: 00 DC.B 0x00 ; '\0' 0x340001E6: 21 DC.B 0x21 ; '!' 0x340001E7: 00 DC.B 0x00 ; '\0' 0x340001E8: 32 DC.B 0x32 ; '2' 0x340001E9: 00 DC.B 0x00 ; '\0' 0x340001EA: 42 DC.B 0x42 ; 'B' 0x340001EB: 00 DC.B 0x00 ; '\0' 0x340001EC: 50 DC.B 0x50 ; 'P' 0x340001ED: 00 DC.B 0x00 ; '\0' 0x340001EE: 64 DC.B 0x64 ; 'd' 0x340001EF: 00 DC.B 0x00 ; '\0' 0x340001F0: 85 DC.B 0x85 ; '\x85' 0x340001F1: 00 DC.B 0x00 ; '\0' 0x340001F2: A6 DC.B 0xA6 ; '\xA6' 0x340001F3: 00 DC.B 0x00 ; '\0' 0x340001F4: C8 DC.B 0xC8 ; '\xC8' 0x340001F5: 00 DC.B 0x00 ; '\0' 0x340001F6: FA DC.B 0xFA ; '\xFA' 0x340001F7: 00 DC.B 0x00 ; '\0' 0x340001F8: 0A DC.B 0x0A ; '\n' 0x340001F9: 01 DC.B 0x01 ; '\x01' 0x340001FA: 4D DC.B 0x4D ; 'M' 0x340001FB: 01 DC.B 0x01 ; '\x01' 0x340001FC: 90 DC.B 0x90 ; '\x90' 0x340001FD: 01 DC.B 0x01 ; '\x01' 0x340001FE: 03 DC.B 0x03 ; '\x03' 0x340001FF: 07 DC.B 0x07 ; '\x07' 0x34000200: 0F DC.B 0x0F ; '\x0F' 0x34000201: 1F DC.B 0x1F ; '\x1F' 0x34000202: 00 DC.B 0x00 ; '\0' 0x34000203: 00 DC.B 0x00 ; '\0' 0x34000204: 01 DC.B 0x01 ; '\x01' 0x34000205: 11 DC.B 0x11 ; '\x11' 0x34000206: 01 DC.B 0x01 ; '\x01' 0x34000207: 25 DC.B 0x25 ; '%' 0x34000208: 0E DC.B 0x0E ; '\x0E' 0x34000209: 13 DC.B 0x13 ; '\x13' 0x3400020A: 05 DC.B 0x05 ; '\x05' 0x3400020B: 03 DC.B 0x03 ; '\x03' 0x3400020C: 0E DC.B 0x0E ; '\x0E' 0x3400020D: 10 DC.B 0x10 ; '\x10' 0x3400020E: 17 DC.B 0x17 ; '\x17' 0x3400020F: B4 DC.B 0xB4 ; '\xB4' 0x34000210: 42 DC.B 0x42 ; 'B' 0x34000211: 19 DC.B 0x19 ; '\x19' 0x34000212: 11 DC.B 0x11 ; '\x11' 0x34000213: 01 DC.B 0x01 ; '\x01' 0x34000214: 12 DC.B 0x12 ; '\x12' 0x34000215: 06 DC.B 0x06 ; '\x06' 0x34000216: 43 DC.B 0x43 ; 'C' 0x34000217: 17 DC.B 0x17 ; '\x17' 0x34000218: 00 DC.B 0x00 ; '\0' 0x34000219: 00 DC.B 0x00 ; '\0' 0x3400021A: 02 DC.B 0x02 ; '\x02' 0x3400021B: 2E DC.B 0x2E ; '.' 0x3400021C: 00 DC.B 0x00 ; '\0' 0x3400021D: 11 DC.B 0x11 ; '\x11' 0x3400021E: 01 DC.B 0x01 ; '\x01' 0x3400021F: 12 DC.B 0x12 ; '\x12' 0x34000220: 06 DC.B 0x06 ; '\x06' 0x34000221: 40 DC.B 0x40 ; '@' 0x34000222: 18 DC.B 0x18 ; '\x18' 0x34000223: 03 DC.B 0x03 ; '\x03' 0x34000224: 0E DC.B 0x0E ; '\x0E' 0x34000225: 3A DC.B 0x3A ; ':' 0x34000226: 0B DC.B 0x0B ; '\v' 0x34000227: 3B DC.B 0x3B ; ';' 0x34000228: 0B DC.B 0x0B ; '\v' 0x34000229: 27 DC.B 0x27 ; ''' 0x3400022A: 19 DC.B 0x19 ; '\x19' 0x3400022B: 3F DC.B 0x3F ; '?' 0x3400022C: 19 DC.B 0x19 ; '\x19' 0x3400022D: 00 DC.B 0x00 ; '\0' 0x3400022E: 00 DC.B 0x00 ; '\0' 0x3400022F: 03 DC.B 0x03 ; '\x03' 0x34000230: 04 DC.B 0x04 ; '\x04' 0x34000231: 01 DC.B 0x01 ; '\x01' 0x34000232: 49 DC.B 0x49 ; 'I' 0x34000233: 13 DC.B 0x13 ; '\x13' 0x34000234: 0B DC.B 0x0B ; '\v' 0x34000235: 0B DC.B 0x0B ; '\v' 0x34000236: 3A DC.B 0x3A ; ':' 0x34000237: 0B DC.B 0x0B ; '\v' 0x34000238: 3B DC.B 0x3B ; ';' 0x34000239: 0B DC.B 0x0B ; '\v' 0x3400023A: 00 DC.B 0x00 ; '\0' 0x3400023B: 00 DC.B 0x00 ; '\0'

Section .bss.hxspi2 from blto2_FSBL_lto.o, size=100, align=4


hxspi2: 0x3400023C: 01 DC.B 0x01 ; '\x01' 0x3400023D: 00 DC.B 0x00 ; '\0' 0x3400023E: 00 DC.B 0x00 ; '\0' 0x3400023F: 00 DC.B 0x00 ; '\0' 0x34000240: 44 DC.B 0x44 ; 'D' 0x34000241: 3A DC.B 0x3A ; ':' 0x34000242: 5C DC.B 0x5C ; '\\' 0x34000243: 50 DC.B 0x50 ; 'P' 0x34000244: 72 DC.B 0x72 ; 'r' 0x34000245: 6F DC.B 0x6F ; 'o' 0x34000246: 6A DC.B 0x6A ; 'j' 0x34000247: 65 DC.B 0x65 ; 'e' 0x34000248: 6B DC.B 0x6B ; 'k' 0x34000249: 74 DC.B 0x74 ; 't' 0x3400024A: 65 DC.B 0x65 ; 'e' 0x3400024B: 5C DC.B 0x5C ; '\\' 0x3400024C: 68 DC.B 0x68 ; 'h' 0x3400024D: 61 DC.B 0x61 ; 'a' 0x3400024E: 64 DC.B 0x64 ; 'd' 0x3400024F: 65 DC.B 0x65 ; 'e' 0x34000250: 77 DC.B 0x77 ; 'w' 0x34000251: 65 DC.B 0x65 ; 'e' 0x34000252: 5F DC.B 0x5F ; '_' 0x34000253: 62 DC.B 0x62 ; 'b' 0x34000254: 6C DC.B 0x6C ; 'l' 0x34000255: 74 DC.B 0x74 ; 't' 0x34000256: 6F DC.B 0x6F ; 'o' 0x34000257: 32 DC.B 0x32 ; '2' 0x34000258: 5C DC.B 0x5C ; '\\' 0x34000259: 74 DC.B 0x74 ; 't' 0x3400025A: 72 DC.B 0x72 ; 'r' 0x3400025B: 75 DC.B 0x75 ; 'u' 0x3400025C: 6E DC.B 0x6E ; 'n' 0x3400025D: 6B DC.B 0x6B ; 'k' 0x3400025E: 5C DC.B 0x5C ; '\\' 0x3400025F: 66 DC.B 0x66 ; 'f' 0x34000260: 69 DC.B 0x69 ; 'i' 0x34000261: 72 DC.B 0x72 ; 'r' 0x34000262: 6D DC.B 0x6D ; 'm' 0x34000263: 77 DC.B 0x77 ; 'w' 0x34000264: 61 DC.B 0x61 ; 'a' 0x34000265: 72 DC.B 0x72 ; 'r' 0x34000266: 65 DC.B 0x65 ; 'e' 0x34000267: 5C DC.B 0x5C ; '\\' 0x34000268: 46 DC.B 0x46 ; 'F' 0x34000269: 53 DC.B 0x53 ; 'S' 0x3400026A: 42 DC.B 0x42 ; 'B' 0x3400026B: 4C DC.B 0x4C ; 'L' 0x3400026C: 5C DC.B 0x5C ; '\\' 0x3400026D: 43 DC.B 0x43 ; 'C' 0x3400026E: 75 DC.B 0x75 ; 'u' 0x3400026F: 62 DC.B 0x62 ; 'b' 0x34000270: 65 DC.B 0x65 ; 'e' 0x34000271: 4D DC.B 0x4D ; 'M' 0x34000272: 58 DC.B 0x58 ; 'X' 0x34000273: 5C DC.B 0x5C ; '\\' 0x34000274: 44 DC.B 0x44 ; 'D' 0x34000275: 72 DC.B 0x72 ; 'r' 0x34000276: 69 DC.B 0x69 ; 'i' 0x34000277: 76 DC.B 0x76 ; 'v' 0x34000278: 65 DC.B 0x65 ; 'e' 0x34000279: 72 DC.B 0x72 ; 'r' 0x3400027A: 73 DC.B 0x73 ; 's' 0x3400027B: 5C DC.B 0x5C ; '\\' 0x3400027C: 53 DC.B 0x53 ; 'S' 0x3400027D: 54 DC.B 0x54 ; 'T' 0x3400027E: 4D DC.B 0x4D ; 'M' 0x3400027F: 33 DC.B 0x33 ; '3' 0x34000280: 32 DC.B 0x32 ; '2' 0x34000281: 4E DC.B 0x4E ; 'N' 0x34000282: 36 DC.B 0x36 ; '6' 0x34000283: 78 DC.B 0x78 ; 'x' 0x34000284: 78 DC.B 0x78 ; 'x' 0x34000285: 5F DC.B 0x5F ; '_' 0x34000286: 48 DC.B 0x48 ; 'H' 0x34000287: 41 DC.B 0x41 ; 'A' 0x34000288: 4C DC.B 0x4C ; 'L' 0x34000289: 5F DC.B 0x5F ; '_' 0x3400028A: 44 DC.B 0x44 ; 'D' 0x3400028B: 72 DC.B 0x72 ; 'r' 0x3400028C: 69 DC.B 0x69 ; 'i' 0x3400028D: 76 DC.B 0x76 ; 'v' 0x3400028E: 65 DC.B 0x65 ; 'e' 0x3400028F: 72 DC.B 0x72 ; 'r' 0x34000290: 5C DC.B 0x5C ; '\\' 0x34000291: 53 DC.B 0x53 ; 'S' 0x34000292: 72 DC.B 0x72 ; 'r' 0x34000293: 63 DC.B 0x63 ; 'c' 0x34000294: 5C DC.B 0x5C ; '\\' 0x34000295: 73 DC.B 0x73 ; 's' 0x34000296: 74 DC.B 0x74 ; 't' 0x34000297: 6D DC.B 0x6D ; 'm' 0x34000298: 33 DC.B 0x33 ; '3' 0x34000299: 32 DC.B 0x32 ; '2' 0x3400029A: 6E DC.B 0x6E ; 'n' 0x3400029B: 36 DC.B 0x36 ; '6' 0x3400029C: 78 DC.B 0x78 ; 'x' 0x3400029D: 78 DC.B 0x78 ; 'x' 0x3400029E: 5F DC.B 0x5F ; '_' 0x3400029F: 68 DC.B 0x68 ; 'h'

Section .bss.JEDEC_Basic from blto2_FSBL_lto.o, size=96, align=4


JEDEC_Basic: 0x340002A0: 10 DC.B 0x10 ; '\x10' 0x340002A1: 00 DC.B 0x00 ; '\0' 0x340002A2: 00 DC.B 0x00 ; '\0' 0x340002A3: 01 DC.B 0x01 ; '\x01' 0x340002A4: A0 DC.B 0xA0 ; '\xA0' 0x340002A5: 0F DC.B 0x0F ; '\x0F' 0x340002A6: 00 DC.B 0x00 ; '\0' 0x340002A7: FA DC.B 0xFA ; '\xFA' 0x340002A8: 10 DC.B 0x10 ; '\x10' 0x340002A9: 00 DC.B 0x00 ; '\0' 0x340002AA: 00 DC.B 0x00 ; '\0' 0x340002AB: 00 DC.B 0x00 ; '\0' 0x340002AC: 00 DC.B 0x00 ; '\0' 0x340002AD: 01 DC.B 0x01 ; '\x01' 0x340002AE: 00 DC.B 0x00 ; '\0' 0x340002AF: 00 DC.B 0x00 ; '\0' 0x340002B0: A0 DC.B 0xA0 ; '\xA0' 0x340002B1: 0F DC.B 0x0F ; '\x0F' 0x340002B2: 00 DC.B 0x00 ; '\0' 0x340002B3: 00 DC.B 0x00 ; '\0' 0x340002B4: 00 DC.B 0x00 ; '\0' 0x340002B5: FA DC.B 0xFA ; '\xFA' 0x340002B6: 00 DC.B 0x00 ; '\0' 0x340002B7: 00 DC.B 0x00 ; '\0' 0x340002B8: 00 DC.B 0x00 ; '\0' 0x340002B9: 00 DC.B 0x00 ; '\0' 0x340002BA: 21 DC.B 0x21 ; '!' 0x340002BB: 00 DC.B 0x00 ; '\0' 0x340002BC: 32 DC.B 0x32 ; '2' 0x340002BD: 00 DC.B 0x00 ; '\0' 0x340002BE: 42 DC.B 0x42 ; 'B' 0x340002BF: 00 DC.B 0x00 ; '\0' 0x340002C0: 50 DC.B 0x50 ; 'P' 0x340002C1: 00 DC.B 0x00 ; '\0' 0x340002C2: 64 DC.B 0x64 ; 'd' 0x340002C3: 00 DC.B 0x00 ; '\0' 0x340002C4: 85 DC.B 0x85 ; '\x85' 0x340002C5: 00 DC.B 0x00 ; '\0' 0x340002C6: A6 DC.B 0xA6 ; '\xA6' 0x340002C7: 00 DC.B 0x00 ; '\0' 0x340002C8: C8 DC.B 0xC8 ; '\xC8' 0x340002C9: 00 DC.B 0x00 ; '\0' 0x340002CA: FA DC.B 0xFA ; '\xFA' 0x340002CB: 00 DC.B 0x00 ; '\0' 0x340002CC: 0A DC.B 0x0A ; '\n' 0x340002CD: 01 DC.B 0x01 ; '\x01' 0x340002CE: 4D DC.B 0x4D ; 'M' 0x340002CF: 01 DC.B 0x01 ; '\x01' 0x340002D0: 90 DC.B 0x90 ; '\x90' 0x340002D1: 01 DC.B 0x01 ; '\x01' 0x340002D2: 03 DC.B 0x03 ; '\x03' 0x340002D3: 07 DC.B 0x07 ; '\x07' 0x340002D4: 0F DC.B 0x0F ; '\x0F' 0x340002D5: 1F DC.B 0x1F ; '\x1F' 0x340002D6: 00 DC.B 0x00 ; '\0' 0x340002D7: 00 DC.B 0x00 ; '\0' 0x340002D8: 01 DC.B 0x01 ; '\x01' 0x340002D9: 11 DC.B 0x11 ; '\x11' 0x340002DA: 01 DC.B 0x01 ; '\x01' 0x340002DB: 25 DC.B 0x25 ; '%' 0x340002DC: 0E DC.B 0x0E ; '\x0E' 0x340002DD: 13 DC.B 0x13 ; '\x13' 0x340002DE: 05 DC.B 0x05 ; '\x05' 0x340002DF: 03 DC.B 0x03 ; '\x03' 0x340002E0: 0E DC.B 0x0E ; '\x0E' 0x340002E1: 10 DC.B 0x10 ; '\x10' 0x340002E2: 17 DC.B 0x17 ; '\x17' 0x340002E3: B4 DC.B 0xB4 ; '\xB4' 0x340002E4: 42 DC.B 0x42 ; 'B' 0x340002E5: 19 DC.B 0x19 ; '\x19' 0x340002E6: 11 DC.B 0x11 ; '\x11' 0x340002E7: 01 DC.B 0x01 ; '\x01' 0x340002E8: 12 DC.B 0x12 ; '\x12' 0x340002E9: 06 DC.B 0x06 ; '\x06' 0x340002EA: 43 DC.B 0x43 ; 'C' 0x340002EB: 17 DC.B 0x17 ; '\x17' 0x340002EC: 00 DC.B 0x00 ; '\0' 0x340002ED: 00 DC.B 0x00 ; '\0' 0x340002EE: 02 DC.B 0x02 ; '\x02' 0x340002EF: 2E DC.B 0x2E ; '.' 0x340002F0: 00 DC.B 0x00 ; '\0' 0x340002F1: 11 DC.B 0x11 ; '\x11' 0x340002F2: 01 DC.B 0x01 ; '\x01' 0x340002F3: 12 DC.B 0x12 ; '\x12' 0x340002F4: 06 DC.B 0x06 ; '\x06' 0x340002F5: 40 DC.B 0x40 ; '@' 0x340002F6: 18 DC.B 0x18 ; '\x18' 0x340002F7: 03 DC.B 0x03 ; '\x03' 0x340002F8: 0E DC.B 0x0E ; '\x0E' 0x340002F9: 3A DC.B 0x3A ; ':' 0x340002FA: 0B DC.B 0x0B ; '\v' 0x340002FB: 3B DC.B 0x3B ; ';' 0x340002FC: 0B DC.B 0x0B ; '\v' 0x340002FD: 27 DC.B 0x27 ; ''' 0x340002FE: 19 DC.B 0x19 ; '\x19' 0x340002FF: 3F DC.B 0x3F ; '?'

Section .bss.JEDEC_OctalDdr from blto2_FSBL_lto.o, size=32, align=4


JEDEC_OctalDdr: 0x34000300: 10 DC.B 0x10 ; '\x10' 0x34000301: 00 DC.B 0x00 ; '\0' 0x34000302: 00 DC.B 0x00 ; '\0' 0x34000303: 01 DC.B 0x01 ; '\x01' 0x34000304: A0 DC.B 0xA0 ; '\xA0' 0x34000305: 0F DC.B 0x0F ; '\x0F' 0x34000306: 00 DC.B 0x00 ; '\0' 0x34000307: FA DC.B 0xFA ; '\xFA' 0x34000308: 10 DC.B 0x10 ; '\x10' 0x34000309: 00 DC.B 0x00 ; '\0' 0x3400030A: 00 DC.B 0x00 ; '\0' 0x3400030B: 00 DC.B 0x00 ; '\0' 0x3400030C: 00 DC.B 0x00 ; '\0' 0x3400030D: 01 DC.B 0x01 ; '\x01' 0x3400030E: 00 DC.B 0x00 ; '\0' 0x3400030F: 00 DC.B 0x00 ; '\0' 0x34000310: A0 DC.B 0xA0 ; '\xA0' 0x34000311: 0F DC.B 0x0F ; '\x0F' 0x34000312: 00 DC.B 0x00 ; '\0' 0x34000313: 00 DC.B 0x00 ; '\0' 0x34000314: 00 DC.B 0x00 ; '\0' 0x34000315: FA DC.B 0xFA ; '\xFA' 0x34000316: 00 DC.B 0x00 ; '\0' 0x34000317: 00 DC.B 0x00 ; '\0' 0x34000318: 00 DC.B 0x00 ; '\0' 0x34000319: 00 DC.B 0x00 ; '\0' 0x3400031A: 21 DC.B 0x21 ; '!' 0x3400031B: 00 DC.B 0x00 ; '\0' 0x3400031C: 32 DC.B 0x32 ; '2' 0x3400031D: 00 DC.B 0x00 ; '\0' 0x3400031E: 42 DC.B 0x42 ; 'B' 0x3400031F: 00 DC.B 0x00 ; '\0'

Section .bss.JEDEC_XSPI10 from blto2_FSBL_lto.o, size=24, align=4


JEDEC_XSPI10: 0x34000320: 10 DC.B 0x10 ; '\x10' 0x34000321: 00 DC.B 0x00 ; '\0' 0x34000322: 00 DC.B 0x00 ; '\0' 0x34000323: 01 DC.B 0x01 ; '\x01' 0x34000324: A0 DC.B 0xA0 ; '\xA0' 0x34000325: 0F DC.B 0x0F ; '\x0F' 0x34000326: 00 DC.B 0x00 ; '\0' 0x34000327: FA DC.B 0xFA ; '\xFA' 0x34000328: 10 DC.B 0x10 ; '\x10' 0x34000329: 00 DC.B 0x00 ; '\0' 0x3400032A: 00 DC.B 0x00 ; '\0' 0x3400032B: 00 DC.B 0x00 ; '\0' 0x3400032C: 00 DC.B 0x00 ; '\0' 0x3400032D: 01 DC.B 0x01 ; '\x01' 0x3400032E: 00 DC.B 0x00 ; '\0' 0x3400032F: 00 DC.B 0x00 ; '\0' 0x34000330: A0 DC.B 0xA0 ; '\xA0' 0x34000331: 0F DC.B 0x0F ; '\x0F' 0x34000332: 00 DC.B 0x00 ; '\0' 0x34000333: 00 DC.B 0x00 ; '\0' 0x34000334: 00 DC.B 0x00 ; '\0' 0x34000335: FA DC.B 0xFA ; '\xFA' 0x34000336: 00 DC.B 0x00 ; '\0' 0x34000337: 00 DC.B 0x00 ; '\0'

Section .bss.JEDEC_Address4Bytes from blto2_FSBL_lto.o, size=8, align=4


JEDEC_Address4Bytes: 0x34000338: 01 DC.B 0x01 ; '\x01' 0x34000339: 11 DC.B 0x11 ; '\x11' 0x3400033A: 01 DC.B 0x01 ; '\x01' 0x3400033B: 25 DC.B 0x25 ; '%' 0x3400033C: 0E DC.B 0x0E ; '\x0E' 0x3400033D: 13 DC.B 0x13 ; '\x13' 0x3400033E: 05 DC.B 0x05 ; '\x05' 0x3400033F: 03 DC.B 0x03 ; '\x03'

Section .bss.uwTick from blto2_FSBL_lto.o, size=4, align=4


uwTick: 0x34000340: 44 DC.B 0x44 ; 'D' 0x34000341: 3A DC.B 0x3A ; ':' 0x34000342: 5C DC.B 0x5C ; '\\' 0x34000343: 50 DC.B 0x50 ; 'P'

Section .bss.libc.__SEGGER_RTL_stdout_file from prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=4, align=4


__SEGGER_RTL_stdout_file: 0x34000344: 00 DC.B 0x00 ; '\0' 0x34000345: 00 DC.B 0x00 ; '\0' 0x34000346: 00 DC.B 0x00 ; '\0' 0x34000347: 00 DC.B 0x00 ; '\0'

Section .bss.libc.__SEGGER_RTL_stdin_file from prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=4, align=4


__SEGGER_RTL_stdin_file: 0x34000348: 00 DC.B 0x00 ; '\0' 0x34000349: 00 DC.B 0x00 ; '\0' 0x3400034A: 00 DC.B 0x00 ; '\0' 0x3400034B: 00 DC.B 0x00 ; '\0'

Section .bss.libc.__SEGGER_RTL_stderr_file from prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=4, align=4


__SEGGER_RTL_stderr_file: 0x3400034C: 00 DC.B 0x00 ; '\0' 0x3400034D: 00 DC.B 0x00 ; '\0' 0x3400034E: 00 DC.B 0x00 ; '\0' 0x3400034F: 00 DC.B 0x00 ; '\0'

Section .bss.libc.__SEGGER_RTL_locale_ptr from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=4, align=4


__SEGGER_RTL_locale_ptr: 0x34000350: 43 DC.B 0x43 ; 'C' 0x34000351: 00 DC.B 0x00 ; '\0' 0x34000352: 50 DC.B 0x50 ; 'P' 0x34000353: 4F DC.B 0x4F ; 'O'

Section .bss.JumpToApplication.JumpToApp from blto2_FSBL_lto.o, size=4, align=4


JumpToApplication.JumpToApp: 0x34000354: 00 DC.B 0x00 ; '\0' 0x34000355: 08 DC.B 0x08 ; '\b' 0x34000356: 06 DC.B 0x06 ; '\x06' 0x34000357: 02 DC.B 0x02 ; '\x02'

Section .bss.libc._acUpBuffer from SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=1024, align=1


_acUpBuffer: 0x34000358: 00 DC.B 0x00 ; '\0' 0x34000359: 53 DC.B 0x53 ; 'S' 0x3400035A: 45 DC.B 0x45 ; 'E' 0x3400035B: 47 DC.B 0x47 ; 'G' 0x3400035C: 47 DC.B 0x47 ; 'G' 0x3400035D: 45 DC.B 0x45 ; 'E' 0x3400035E: 52 DC.B 0x52 ; 'R' 0x3400035F: 20 DC.B 0x20 ; ' ' 0x34000360: 43 DC.B 0x43 ; 'C' 0x34000361: 2F DC.B 0x2F ; '/' 0x34000362: 43 DC.B 0x43 ; 'C' 0x34000363: 2B DC.B 0x2B ; '+' 0x34000364: 2B DC.B 0x2B ; '+' 0x34000365: 20 DC.B 0x20 ; ' ' 0x34000366: 63 DC.B 0x63 ; 'c' 0x34000367: 6F DC.B 0x6F ; 'o' 0x34000368: 6D DC.B 0x6D ; 'm' 0x34000369: 70 DC.B 0x70 ; 'p' 0x3400036A: 69 DC.B 0x69 ; 'i' 0x3400036B: 6C DC.B 0x6C ; 'l' 0x3400036C: 65 DC.B 0x65 ; 'e' 0x3400036D: 72 DC.B 0x72 ; 'r' 0x3400036E: 20 DC.B 0x20 ; ' ' 0x3400036F: 76 DC.B 0x76 ; 'v' 0x34000370: 65 DC.B 0x65 ; 'e' 0x34000371: 72 DC.B 0x72 ; 'r' 0x34000372: 73 DC.B 0x73 ; 's' 0x34000373: 69 DC.B 0x69 ; 'i' 0x34000374: 6F DC.B 0x6F ; 'o' 0x34000375: 6E DC.B 0x6E ; 'n' 0x34000376: 20 DC.B 0x20 ; ' ' 0x34000377: 32 DC.B 0x32 ; '2' 0x34000378: 32 DC.B 0x32 ; '2' 0x34000379: 2E DC.B 0x2E ; '.' 0x3400037A: 31 DC.B 0x31 ; '1' 0x3400037B: 2E DC.B 0x2E ; '.' 0x3400037C: 32 DC.B 0x32 ; '2' 0x3400037D: 20 DC.B 0x20 ; ' ' 0x3400037E: 28 DC.B 0x28 ; '(' 0x3400037F: 62 DC.B 0x62 ; 'b' 0x34000380: 61 DC.B 0x61 ; 'a' 0x34000381: 73 DC.B 0x73 ; 's' 0x34000382: 65 DC.B 0x65 ; 'e' 0x34000383: 64 DC.B 0x64 ; 'd' 0x34000384: 20 DC.B 0x20 ; ' ' 0x34000385: 6F DC.B 0x6F ; 'o' 0x34000386: 6E DC.B 0x6E ; 'n' 0x34000387: 20 DC.B 0x20 ; ' ' 0x34000388: 63 DC.B 0x63 ; 'c' 0x34000389: 6C DC.B 0x6C ; 'l' 0x3400038A: 61 DC.B 0x61 ; 'a' 0x3400038B: 6E DC.B 0x6E ; 'n' 0x3400038C: 67 DC.B 0x67 ; 'g' 0x3400038D: 20 DC.B 0x20 ; ' ' 0x3400038E: 32 DC.B 0x32 ; '2' 0x3400038F: 32 DC.B 0x32 ; '2' 0x34000390: 2E DC.B 0x2E ; '.' 0x34000391: 31 DC.B 0x31 ; '1' 0x34000392: 2E DC.B 0x2E ; '.' 0x34000393: 38 DC.B 0x38 ; '8' 0x34000394: 29 DC.B 0x29 ; ')' 0x34000395: 00 DC.B 0x00 ; '\0' 0x34000396: 41 DC.B 0x41 ; 'A' 0x34000397: 3B DC.B 0x3B ; ';' 0x34000398: 00 DC.B 0x00 ; '\0' 0x34000399: 00 DC.B 0x00 ; '\0' 0x3400039A: 00 DC.B 0x00 ; '\0' 0x3400039B: 61 DC.B 0x61 ; 'a' 0x3400039C: 65 DC.B 0x65 ; 'e' 0x3400039D: 61 DC.B 0x61 ; 'a' 0x3400039E: 62 DC.B 0x62 ; 'b' 0x3400039F: 69 DC.B 0x69 ; 'i' 0x340003A0: 00 DC.B 0x00 ; '\0' 0x340003A1: 01 DC.B 0x01 ; '\x01' 0x340003A2: 31 DC.B 0x31 ; '1' 0x340003A3: 00 DC.B 0x00 ; '\0' 0x340003A4: 00 DC.B 0x00 ; '\0' 0x340003A5: 00 DC.B 0x00 ; '\0' 0x340003A6: 43 DC.B 0x43 ; 'C' 0x340003A7: 32 DC.B 0x32 ; '2' 0x340003A8: 2E DC.B 0x2E ; '.' 0x340003A9: 30 DC.B 0x30 ; '0' 0x340003AA: 39 DC.B 0x39 ; '9' 0x340003AB: 00 DC.B 0x00 ; '\0' 0x340003AC: 06 DC.B 0x06 ; '\x06' 0x340003AD: 15 DC.B 0x15 ; '\x15' 0x340003AE: 07 DC.B 0x07 ; '\x07' 0x340003AF: 4D DC.B 0x4D ; 'M' 0x340003B0: 08 DC.B 0x08 ; '\b' 0x340003B1: 00 DC.B 0x00 ; '\0' 0x340003B2: 09 DC.B 0x09 ; '\t' 0x340003B3: 03 DC.B 0x03 ; '\x03' 0x340003B4: 0A DC.B 0x0A ; '\n' 0x340003B5: 08 DC.B 0x08 ; '\b' 0x340003B6: 0E DC.B 0x0E ; '\x0E' 0x340003B7: 00 DC.B 0x00 ; '\0' 0x340003B8: 11 DC.B 0x11 ; '\x11' 0x340003B9: 01 DC.B 0x01 ; '\x01' 0x340003BA: 12 DC.B 0x12 ; '\x12' 0x340003BB: 04 DC.B 0x04 ; '\x04' 0x340003BC: 14 DC.B 0x14 ; '\x14' 0x340003BD: 01 DC.B 0x01 ; '\x01' 0x340003BE: 15 DC.B 0x15 ; '\x15' 0x340003BF: 00 DC.B 0x00 ; '\0' 0x340003C0: 17 DC.B 0x17 ; '\x17' 0x340003C1: 03 DC.B 0x03 ; '\x03' 0x340003C2: 18 DC.B 0x18 ; '\x18' 0x340003C3: 01 DC.B 0x01 ; '\x01' 0x340003C4: 19 DC.B 0x19 ; '\x19' 0x340003C5: 01 DC.B 0x01 ; '\x01' 0x340003C6: 1A DC.B 0x1A ; '\x1A' 0x340003C7: 01 DC.B 0x01 ; '\x01' 0x340003C8: 1C DC.B 0x1C ; '\x1C' 0x340003C9: 01 DC.B 0x01 ; '\x01' 0x340003CA: 1E DC.B 0x1E ; '\x1E' 0x340003CB: 03 DC.B 0x03 ; '\x03' 0x340003CC: 22 DC.B 0x22 ; '\"' 0x340003CD: 00 DC.B 0x00 ; '\0' 0x340003CE: 24 DC.B 0x24 ; '$' 0x340003CF: 01 DC.B 0x01 ; '\x01' 0x340003D0: 26 DC.B 0x26 ; '&' 0x340003D1: 01 DC.B 0x01 ; '\x01' 0x340003D2: 10 DC.B 0x10 ; '\x10' 0x340003D3: 00 DC.B 0x00 ; '\0' 0x340003D4: 00 DC.B 0x00 ; '\0' 0x340003D5: 00 DC.B 0x00 ; '\0' 0x340003D6: FF DC.B 0xFF ; '\xFF' 0x340003D7: FF DC.B 0xFF ; '\xFF' 0x340003D8: FF DC.B 0xFF ; '\xFF' 0x340003D9: FF DC.B 0xFF ; '\xFF' 0x340003DA: 04 DC.B 0x04 ; '\x04' 0x340003DB: 00 DC.B 0x00 ; '\0' 0x340003DC: 04 DC.B 0x04 ; '\x04' 0x340003DD: 00 DC.B 0x00 ; '\0' 0x340003DE: 01 DC.B 0x01 ; '\x01' 0x340003DF: 7C DC.B 0x7C ; '|' 0x340003E0: 0E DC.B 0x0E ; '\x0E' 0x340003E1: 0C DC.B 0x0C ; '\x0C' 0x340003E2: 0D DC.B 0x0D ; '\r' 0x340003E3: 00 DC.B 0x00 ; '\0' 0x340003E4: 00 DC.B 0x00 ; '\0' 0x340003E5: 00 DC.B 0x00 ; '\0' 0x340003E6: 20 DC.B 0x20 ; ' ' 0x340003E7: 00 DC.B 0x00 ; '\0' 0x340003E8: 00 DC.B 0x00 ; '\0' 0x340003E9: 00 DC.B 0x00 ; '\0' 0x340003EA: 5C DC.B 0x5C ; '\\' 0x340003EB: 79 DC.B 0x79 ; 'y' 0x340003EC: 00 DC.B 0x00 ; '\0' 0x340003ED: 00 DC.B 0x00 ; '\0' 0x340003EE: 00 DC.B 0x00 ; '\0' 0x340003EF: 00 DC.B 0x00 ; '\0' 0x340003F0: 00 DC.B 0x00 ; '\0' 0x340003F1: 00 DC.B 0x00 ; '\0' 0x340003F2: 7C DC.B 0x7C ; '|' 0x340003F3: 00 DC.B 0x00 ; '\0' 0x340003F4: 00 DC.B 0x00 ; '\0' 0x340003F5: 00 DC.B 0x00 ; '\0' 0x340003F6: 44 DC.B 0x44 ; 'D' 0x340003F7: 0E DC.B 0x0E ; '\x0E' 0x340003F8: 20 DC.B 0x20 ; ' ' 0x340003F9: 8E DC.B 0x8E ; '\x8E' 0x340003FA: 01 DC.B 0x01 ; '\x01' 0x340003FB: 89 DC.B 0x89 ; '\x89' 0x340003FC: 02 DC.B 0x02 ; '\x02' 0x340003FD: 88 DC.B 0x88 ; '\x88' 0x340003FE: 03 DC.B 0x03 ; '\x03' 0x340003FF: 87 DC.B 0x87 ; '\x87' 0x34000400: 04 DC.B 0x04 ; '\x04' 0x34000401: 86 DC.B 0x86 ; '\x86' 0x34000402: 05 DC.B 0x05 ; '\x05' 0x34000403: 85 DC.B 0x85 ; '\x85' 0x34000404: 06 DC.B 0x06 ; '\x06' 0x34000405: 84 DC.B 0x84 ; '\x84' 0x34000406: 07 DC.B 0x07 ; '\x07' 0x34000407: 00 DC.B 0x00 ; '\0' 0x34000408: 00 DC.B 0x00 ; '\0' 0x34000409: 00 DC.B 0x00 ; '\0' 0x3400040A: 14 DC.B 0x14 ; '\x14' 0x3400040B: 00 DC.B 0x00 ; '\0' 0x3400040C: 00 DC.B 0x00 ; '\0' 0x3400040D: 00 DC.B 0x00 ; '\0' 0x3400040E: 5C DC.B 0x5C ; '\\' 0x3400040F: 79 DC.B 0x79 ; 'y' 0x34000410: 00 DC.B 0x00 ; '\0' 0x34000411: 00 DC.B 0x00 ; '\0' 0x34000412: 3A DC.B 0x3A ; ':' 0x34000413: 3C DC.B 0x3C ; '<' 0x34000414: 19 DC.B 0x19 ; '\x19' 0x34000415: 34 DC.B 0x34 ; '4' 0x34000416: 62 DC.B 0x62 ; 'b' 0x34000417: 00 DC.B 0x00 ; '\0' 0x34000418: 00 DC.B 0x00 ; '\0' 0x34000419: 00 DC.B 0x00 ; '\0' 0x3400041A: 42 DC.B 0x42 ; 'B' 0x3400041B: 0E DC.B 0x0E ; '\x0E' 0x3400041C: 04 DC.B 0x04 ; '\x04' 0x3400041D: 8E DC.B 0x8E ; '\x8E' 0x3400041E: 01 DC.B 0x01 ; '\x01' 0x3400041F: 00 DC.B 0x00 ; '\0' 0x34000420: 00 DC.B 0x00 ; '\0' 0x34000421: 00 DC.B 0x00 ; '\0' 0x34000422: 20 DC.B 0x20 ; ' ' 0x34000423: 00 DC.B 0x00 ; '\0' 0x34000424: 00 DC.B 0x00 ; '\0' 0x34000425: 00 DC.B 0x00 ; '\0' 0x34000426: 5C DC.B 0x5C ; '\\' 0x34000427: 79 DC.B 0x79 ; 'y' 0x34000428: 00 DC.B 0x00 ; '\0' 0x34000429: 00 DC.B 0x00 ; '\0' 0x3400042A: 00 DC.B 0x00 ; '\0' 0x3400042B: 00 DC.B 0x00 ; '\0' 0x3400042C: 00 DC.B 0x00 ; '\0' 0x3400042D: 00 DC.B 0x00 ; '\0' 0x3400042E: 7C DC.B 0x7C ; '|' 0x3400042F: 00 DC.B 0x00 ; '\0' 0x34000430: 00 DC.B 0x00 ; '\0' 0x34000431: 00 DC.B 0x00 ; '\0' 0x34000432: 44 DC.B 0x44 ; 'D' 0x34000433: 0E DC.B 0x0E ; '\x0E' 0x34000434: 20 DC.B 0x20 ; ' ' 0x34000435: 8E DC.B 0x8E ; '\x8E' 0x34000436: 01 DC.B 0x01 ; '\x01' 0x34000437: 89 DC.B 0x89 ; '\x89' 0x34000438: 02 DC.B 0x02 ; '\x02' 0x34000439: 88 DC.B 0x88 ; '\x88' 0x3400043A: 03 DC.B 0x03 ; '\x03' 0x3400043B: 87 DC.B 0x87 ; '\x87' 0x3400043C: 04 DC.B 0x04 ; '\x04' 0x3400043D: 86 DC.B 0x86 ; '\x86' 0x3400043E: 05 DC.B 0x05 ; '\x05' 0x3400043F: 85 DC.B 0x85 ; '\x85' 0x34000440: 06 DC.B 0x06 ; '\x06' 0x34000441: 84 DC.B 0x84 ; '\x84' 0x34000442: 07 DC.B 0x07 ; '\x07' 0x34000443: 00 DC.B 0x00 ; '\0' 0x34000444: 00 DC.B 0x00 ; '\0' 0x34000445: 00 DC.B 0x00 ; '\0' 0x34000446: 0C DC.B 0x0C ; '\x0C' 0x34000447: 00 DC.B 0x00 ; '\0' 0x34000448: 00 DC.B 0x00 ; '\0' 0x34000449: 00 DC.B 0x00 ; '\0' 0x3400044A: 5C DC.B 0x5C ; '\\' 0x3400044B: 79 DC.B 0x79 ; 'y' 0x3400044C: 00 DC.B 0x00 ; '\0' 0x3400044D: 00 DC.B 0x00 ; '\0' 0x3400044E: 00 DC.B 0x00 ; '\0' 0x3400044F: 00 DC.B 0x00 ; '\0' 0x34000450: 00 DC.B 0x00 ; '\0' 0x34000451: 00 DC.B 0x00 ; '\0' 0x34000452: 04 DC.B 0x04 ; '\x04' 0x34000453: 00 DC.B 0x00 ; '\0' 0x34000454: 00 DC.B 0x00 ; '\0' 0x34000455: 00 DC.B 0x00 ; '\0' 0x34000456: 0C DC.B 0x0C ; '\x0C' 0x34000457: 00 DC.B 0x00 ; '\0' 0x34000458: 00 DC.B 0x00 ; '\0' 0x34000459: 00 DC.B 0x00 ; '\0' 0x3400045A: 5C DC.B 0x5C ; '\\' 0x3400045B: 79 DC.B 0x79 ; 'y' 0x3400045C: 00 DC.B 0x00 ; '\0' 0x3400045D: 00 DC.B 0x00 ; '\0' 0x3400045E: 00 DC.B 0x00 ; '\0' 0x3400045F: 00 DC.B 0x00 ; '\0' 0x34000460: 00 DC.B 0x00 ; '\0' 0x34000461: 00 DC.B 0x00 ; '\0' 0x34000462: 04 DC.B 0x04 ; '\x04' 0x34000463: 00 DC.B 0x00 ; '\0' 0x34000464: 00 DC.B 0x00 ; '\0' 0x34000465: 00 DC.B 0x00 ; '\0' 0x34000466: 1C DC.B 0x1C ; '\x1C' 0x34000467: 00 DC.B 0x00 ; '\0' 0x34000468: 00 DC.B 0x00 ; '\0' 0x34000469: 00 DC.B 0x00 ; '\0' 0x3400046A: 5C DC.B 0x5C ; '\\' 0x3400046B: 79 DC.B 0x79 ; 'y' 0x3400046C: 00 DC.B 0x00 ; '\0' 0x3400046D: 00 DC.B 0x00 ; '\0' 0x3400046E: 00 DC.B 0x00 ; '\0' 0x3400046F: 00 DC.B 0x00 ; '\0' 0x34000470: 00 DC.B 0x00 ; '\0' 0x34000471: 00 DC.B 0x00 ; '\0' 0x34000472: 80 DC.B 0x80 ; '\x80' 0x34000473: 00 DC.B 0x00 ; '\0' 0x34000474: 00 DC.B 0x00 ; '\0' 0x34000475: 00 DC.B 0x00 ; '\0' 0x34000476: 42 DC.B 0x42 ; 'B' 0x34000477: 0E DC.B 0x0E ; '\x0E' 0x34000478: 18 DC.B 0x18 ; '\x18' 0x34000479: 8E DC.B 0x8E ; '\x8E' 0x3400047A: 01 DC.B 0x01 ; '\x01' 0x3400047B: 87 DC.B 0x87 ; '\x87' 0x3400047C: 02 DC.B 0x02 ; '\x02' 0x3400047D: 86 DC.B 0x86 ; '\x86' 0x3400047E: 03 DC.B 0x03 ; '\x03' 0x3400047F: 85 DC.B 0x85 ; '\x85' 0x34000480: 04 DC.B 0x04 ; '\x04' 0x34000481: 84 DC.B 0x84 ; '\x84' 0x34000482: 05 DC.B 0x05 ; '\x05' 0x34000483: 00 DC.B 0x00 ; '\0' 0x34000484: 00 DC.B 0x00 ; '\0' 0x34000485: 00 DC.B 0x00 ; '\0' 0x34000486: 1C DC.B 0x1C ; '\x1C' 0x34000487: 00 DC.B 0x00 ; '\0' 0x34000488: 00 DC.B 0x00 ; '\0' 0x34000489: 00 DC.B 0x00 ; '\0' 0x3400048A: 5C DC.B 0x5C ; '\\' 0x3400048B: 79 DC.B 0x79 ; 'y' 0x3400048C: 00 DC.B 0x00 ; '\0' 0x3400048D: 00 DC.B 0x00 ; '\0' 0x3400048E: 00 DC.B 0x00 ; '\0' 0x3400048F: 00 DC.B 0x00 ; '\0' 0x34000490: 00 DC.B 0x00 ; '\0' 0x34000491: 00 DC.B 0x00 ; '\0' 0x34000492: 72 DC.B 0x72 ; 'r' 0x34000493: 00 DC.B 0x00 ; '\0' 0x34000494: 00 DC.B 0x00 ; '\0' 0x34000495: 00 DC.B 0x00 ; '\0' 0x34000496: 44 DC.B 0x44 ; 'D' 0x34000497: 0E DC.B 0x0E ; '\x0E' 0x34000498: 18 DC.B 0x18 ; '\x18' 0x34000499: 8E DC.B 0x8E ; '\x8E' 0x3400049A: 01 DC.B 0x01 ; '\x01' 0x3400049B: 88 DC.B 0x88 ; '\x88' 0x3400049C: 02 DC.B 0x02 ; '\x02' 0x3400049D: 87 DC.B 0x87 ; '\x87' 0x3400049E: 03 DC.B 0x03 ; '\x03' 0x3400049F: 86 DC.B 0x86 ; '\x86' 0x340004A0: 04 DC.B 0x04 ; '\x04' 0x340004A1: 85 DC.B 0x85 ; '\x85' 0x340004A2: 05 DC.B 0x05 ; '\x05' 0x340004A3: 84 DC.B 0x84 ; '\x84' 0x340004A4: 06 DC.B 0x06 ; '\x06' 0x340004A5: 00 DC.B 0x00 ; '\0' 0x340004A6: 18 DC.B 0x18 ; '\x18' 0x340004A7: 00 DC.B 0x00 ; '\0' 0x340004A8: 00 DC.B 0x00 ; '\0' 0x340004A9: 00 DC.B 0x00 ; '\0' 0x340004AA: 5C DC.B 0x5C ; '\\' 0x340004AB: 79 DC.B 0x79 ; 'y' 0x340004AC: 00 DC.B 0x00 ; '\0' 0x340004AD: 00 DC.B 0x00 ; '\0' 0x340004AE: 00 DC.B 0x00 ; '\0' 0x340004AF: 00 DC.B 0x00 ; '\0' 0x340004B0: 00 DC.B 0x00 ; '\0' 0x340004B1: 00 DC.B 0x00 ; '\0' 0x340004B2: 58 DC.B 0x58 ; 'X' 0x340004B3: 00 DC.B 0x00 ; '\0' 0x340004B4: 00 DC.B 0x00 ; '\0' 0x340004B5: 00 DC.B 0x00 ; '\0' 0x340004B6: 42 DC.B 0x42 ; 'B' 0x340004B7: 0E DC.B 0x0E ; '\x0E' 0x340004B8: 10 DC.B 0x10 ; '\x10' 0x340004B9: 8E DC.B 0x8E ; '\x8E' 0x340004BA: 01 DC.B 0x01 ; '\x01' 0x340004BB: 86 DC.B 0x86 ; '\x86' 0x340004BC: 02 DC.B 0x02 ; '\x02' 0x340004BD: 85 DC.B 0x85 ; '\x85' 0x340004BE: 03 DC.B 0x03 ; '\x03' 0x340004BF: 84 DC.B 0x84 ; '\x84' 0x340004C0: 04 DC.B 0x04 ; '\x04' 0x340004C1: 00 DC.B 0x00 ; '\0' 0x340004C2: 0C DC.B 0x0C ; '\x0C' 0x340004C3: 00 DC.B 0x00 ; '\0' 0x340004C4: 00 DC.B 0x00 ; '\0' 0x340004C5: 00 DC.B 0x00 ; '\0' 0x340004C6: 5C DC.B 0x5C ; '\\' 0x340004C7: 79 DC.B 0x79 ; 'y' 0x340004C8: 00 DC.B 0x00 ; '\0' 0x340004C9: 00 DC.B 0x00 ; '\0' 0x340004CA: 9C DC.B 0x9C ; '\x9C' 0x340004CB: 3C DC.B 0x3C ; '<' 0x340004CC: 19 DC.B 0x19 ; '\x19' 0x340004CD: 34 DC.B 0x34 ; '4' 0x340004CE: 16 DC.B 0x16 ; '\x16' 0x340004CF: 00 DC.B 0x00 ; '\0' 0x340004D0: 00 DC.B 0x00 ; '\0' 0x340004D1: 00 DC.B 0x00 ; '\0' 0x340004D2: 1C DC.B 0x1C ; '\x1C' 0x340004D3: 00 DC.B 0x00 ; '\0' 0x340004D4: 00 DC.B 0x00 ; '\0' 0x340004D5: 00 DC.B 0x00 ; '\0' 0x340004D6: 5C DC.B 0x5C ; '\\' 0x340004D7: 79 DC.B 0x79 ; 'y' 0x340004D8: 00 DC.B 0x00 ; '\0' 0x340004D9: 00 DC.B 0x00 ; '\0' 0x340004DA: B2 DC.B 0xB2 ; '\xB2' 0x340004DB: 3C DC.B 0x3C ; '<' 0x340004DC: 19 DC.B 0x19 ; '\x19' 0x340004DD: 34 DC.B 0x34 ; '4' 0x340004DE: 3A DC.B 0x3A ; ':' 0x340004DF: 00 DC.B 0x00 ; '\0' 0x340004E0: 00 DC.B 0x00 ; '\0' 0x340004E1: 00 DC.B 0x00 ; '\0' 0x340004E2: 44 DC.B 0x44 ; 'D' 0x340004E3: 0E DC.B 0x0E ; '\x0E' 0x340004E4: 18 DC.B 0x18 ; '\x18' 0x340004E5: 8E DC.B 0x8E ; '\x8E' 0x340004E6: 01 DC.B 0x01 ; '\x01' 0x340004E7: 88 DC.B 0x88 ; '\x88' 0x340004E8: 02 DC.B 0x02 ; '\x02' 0x340004E9: 87 DC.B 0x87 ; '\x87' 0x340004EA: 03 DC.B 0x03 ; '\x03' 0x340004EB: 86 DC.B 0x86 ; '\x86' 0x340004EC: 04 DC.B 0x04 ; '\x04' 0x340004ED: 85 DC.B 0x85 ; '\x85' 0x340004EE: 05 DC.B 0x05 ; '\x05' 0x340004EF: 84 DC.B 0x84 ; '\x84' 0x340004F0: 06 DC.B 0x06 ; '\x06' 0x340004F1: 00 DC.B 0x00 ; '\0' 0x340004F2: 20 DC.B 0x20 ; ' ' 0x340004F3: 00 DC.B 0x00 ; '\0' 0x340004F4: 00 DC.B 0x00 ; '\0' 0x340004F5: 00 DC.B 0x00 ; '\0' 0x340004F6: 5C DC.B 0x5C ; '\\' 0x340004F7: 79 DC.B 0x79 ; 'y' 0x340004F8: 00 DC.B 0x00 ; '\0' 0x340004F9: 00 DC.B 0x00 ; '\0' 0x340004FA: 32 DC.B 0x32 ; '2' 0x340004FB: 3F DC.B 0x3F ; '?' 0x340004FC: 19 DC.B 0x19 ; '\x19' 0x340004FD: 34 DC.B 0x34 ; '4' 0x340004FE: 58 DC.B 0x58 ; 'X' 0x340004FF: 00 DC.B 0x00 ; '\0' 0x34000500: 00 DC.B 0x00 ; '\0' 0x34000501: 00 DC.B 0x00 ; '\0' 0x34000502: 44 DC.B 0x44 ; 'D' 0x34000503: 0E DC.B 0x0E ; '\x0E' 0x34000504: 20 DC.B 0x20 ; ' ' 0x34000505: 8E DC.B 0x8E ; '\x8E' 0x34000506: 01 DC.B 0x01 ; '\x01' 0x34000507: 89 DC.B 0x89 ; '\x89' 0x34000508: 02 DC.B 0x02 ; '\x02' 0x34000509: 88 DC.B 0x88 ; '\x88' 0x3400050A: 03 DC.B 0x03 ; '\x03' 0x3400050B: 87 DC.B 0x87 ; '\x87' 0x3400050C: 04 DC.B 0x04 ; '\x04' 0x3400050D: 86 DC.B 0x86 ; '\x86' 0x3400050E: 05 DC.B 0x05 ; '\x05' 0x3400050F: 85 DC.B 0x85 ; '\x85' 0x34000510: 06 DC.B 0x06 ; '\x06' 0x34000511: 84 DC.B 0x84 ; '\x84' 0x34000512: 07 DC.B 0x07 ; '\x07' 0x34000513: 00 DC.B 0x00 ; '\0' 0x34000514: 00 DC.B 0x00 ; '\0' 0x34000515: 00 DC.B 0x00 ; '\0' 0x34000516: 18 DC.B 0x18 ; '\x18' 0x34000517: 00 DC.B 0x00 ; '\0' 0x34000518: 00 DC.B 0x00 ; '\0' 0x34000519: 00 DC.B 0x00 ; '\0' 0x3400051A: 5C DC.B 0x5C ; '\\' 0x3400051B: 79 DC.B 0x79 ; 'y' 0x3400051C: 00 DC.B 0x00 ; '\0' 0x3400051D: 00 DC.B 0x00 ; '\0' 0x3400051E: 8A DC.B 0x8A ; '\x8A' 0x3400051F: 3F DC.B 0x3F ; '?' 0x34000520: 19 DC.B 0x19 ; '\x19' 0x34000521: 34 DC.B 0x34 ; '4' 0x34000522: 58 DC.B 0x58 ; 'X' 0x34000523: 00 DC.B 0x00 ; '\0' 0x34000524: 00 DC.B 0x00 ; '\0' 0x34000525: 00 DC.B 0x00 ; '\0' 0x34000526: 42 DC.B 0x42 ; 'B' 0x34000527: 0E DC.B 0x0E ; '\x0E' 0x34000528: 10 DC.B 0x10 ; '\x10' 0x34000529: 8E DC.B 0x8E ; '\x8E' 0x3400052A: 01 DC.B 0x01 ; '\x01' 0x3400052B: 86 DC.B 0x86 ; '\x86' 0x3400052C: 02 DC.B 0x02 ; '\x02' 0x3400052D: 85 DC.B 0x85 ; '\x85' 0x3400052E: 03 DC.B 0x03 ; '\x03' 0x3400052F: 84 DC.B 0x84 ; '\x84' 0x34000530: 04 DC.B 0x04 ; '\x04' 0x34000531: 00 DC.B 0x00 ; '\0' 0x34000532: 18 DC.B 0x18 ; '\x18' 0x34000533: 00 DC.B 0x00 ; '\0' 0x34000534: 00 DC.B 0x00 ; '\0' 0x34000535: 00 DC.B 0x00 ; '\0' 0x34000536: 5C DC.B 0x5C ; '\\' 0x34000537: 79 DC.B 0x79 ; 'y' 0x34000538: 00 DC.B 0x00 ; '\0' 0x34000539: 00 DC.B 0x00 ; '\0' 0x3400053A: 00 DC.B 0x00 ; '\0' 0x3400053B: 00 DC.B 0x00 ; '\0' 0x3400053C: 00 DC.B 0x00 ; '\0' 0x3400053D: 00 DC.B 0x00 ; '\0' 0x3400053E: 28 DC.B 0x28 ; '(' 0x3400053F: 00 DC.B 0x00 ; '\0' 0x34000540: 00 DC.B 0x00 ; '\0' 0x34000541: 00 DC.B 0x00 ; '\0' 0x34000542: 42 DC.B 0x42 ; 'B' 0x34000543: 0E DC.B 0x0E ; '\x0E' 0x34000544: 10 DC.B 0x10 ; '\x10' 0x34000545: 8E DC.B 0x8E ; '\x8E' 0x34000546: 01 DC.B 0x01 ; '\x01' 0x34000547: 86 DC.B 0x86 ; '\x86' 0x34000548: 02 DC.B 0x02 ; '\x02' 0x34000549: 85 DC.B 0x85 ; '\x85' 0x3400054A: 03 DC.B 0x03 ; '\x03' 0x3400054B: 84 DC.B 0x84 ; '\x84' 0x3400054C: 04 DC.B 0x04 ; '\x04' 0x3400054D: 00 DC.B 0x00 ; '\0' 0x3400054E: 18 DC.B 0x18 ; '\x18' 0x3400054F: 00 DC.B 0x00 ; '\0' 0x34000550: 00 DC.B 0x00 ; '\0' 0x34000551: 00 DC.B 0x00 ; '\0' 0x34000552: 5C DC.B 0x5C ; '\\' 0x34000553: 79 DC.B 0x79 ; 'y' 0x34000554: 00 DC.B 0x00 ; '\0' 0x34000555: 00 DC.B 0x00 ; '\0' 0x34000556: E2 DC.B 0xE2 ; '\xE2' 0x34000557: 3F DC.B 0x3F ; '?' 0x34000558: 19 DC.B 0x19 ; '\x19' 0x34000559: 34 DC.B 0x34 ; '4' 0x3400055A: 28 DC.B 0x28 ; '(' 0x3400055B: 00 DC.B 0x00 ; '\0' 0x3400055C: 00 DC.B 0x00 ; '\0' 0x3400055D: 00 DC.B 0x00 ; '\0' 0x3400055E: 42 DC.B 0x42 ; 'B' 0x3400055F: 0E DC.B 0x0E ; '\x0E' 0x34000560: 10 DC.B 0x10 ; '\x10' 0x34000561: 8E DC.B 0x8E ; '\x8E' 0x34000562: 01 DC.B 0x01 ; '\x01' 0x34000563: 86 DC.B 0x86 ; '\x86' 0x34000564: 02 DC.B 0x02 ; '\x02' 0x34000565: 85 DC.B 0x85 ; '\x85' 0x34000566: 03 DC.B 0x03 ; '\x03' 0x34000567: 84 DC.B 0x84 ; '\x84' 0x34000568: 04 DC.B 0x04 ; '\x04' 0x34000569: 00 DC.B 0x00 ; '\0' 0x3400056A: 18 DC.B 0x18 ; '\x18' 0x3400056B: 00 DC.B 0x00 ; '\0' 0x3400056C: 00 DC.B 0x00 ; '\0' 0x3400056D: 00 DC.B 0x00 ; '\0' 0x3400056E: 5C DC.B 0x5C ; '\\' 0x3400056F: 79 DC.B 0x79 ; 'y' 0x34000570: 00 DC.B 0x00 ; '\0' 0x34000571: 00 DC.B 0x00 ; '\0' 0x34000572: 00 DC.B 0x00 ; '\0' 0x34000573: 00 DC.B 0x00 ; '\0' 0x34000574: 00 DC.B 0x00 ; '\0' 0x34000575: 00 DC.B 0x00 ; '\0' 0x34000576: 1A DC.B 0x1A ; '\x1A' 0x34000577: 00 DC.B 0x00 ; '\0' 0x34000578: 00 DC.B 0x00 ; '\0' 0x34000579: 00 DC.B 0x00 ; '\0' 0x3400057A: 42 DC.B 0x42 ; 'B' 0x3400057B: 0E DC.B 0x0E ; '\x0E' 0x3400057C: 10 DC.B 0x10 ; '\x10' 0x3400057D: 8E DC.B 0x8E ; '\x8E' 0x3400057E: 01 DC.B 0x01 ; '\x01' 0x3400057F: 85 DC.B 0x85 ; '\x85' 0x34000580: 02 DC.B 0x02 ; '\x02' 0x34000581: 84 DC.B 0x84 ; '\x84' 0x34000582: 03 DC.B 0x03 ; '\x03' 0x34000583: 00 DC.B 0x00 ; '\0' 0x34000584: 00 DC.B 0x00 ; '\0' 0x34000585: 00 DC.B 0x00 ; '\0' 0x34000586: 14 DC.B 0x14 ; '\x14' 0x34000587: 00 DC.B 0x00 ; '\0' 0x34000588: 00 DC.B 0x00 ; '\0' 0x34000589: 00 DC.B 0x00 ; '\0' 0x3400058A: 5C DC.B 0x5C ; '\\' 0x3400058B: 79 DC.B 0x79 ; 'y' 0x3400058C: 00 DC.B 0x00 ; '\0' 0x3400058D: 00 DC.B 0x00 ; '\0' 0x3400058E: 00 DC.B 0x00 ; '\0' 0x3400058F: 00 DC.B 0x00 ; '\0' 0x34000590: 00 DC.B 0x00 ; '\0' 0x34000591: 00 DC.B 0x00 ; '\0' 0x34000592: 38 DC.B 0x38 ; '8' 0x34000593: 00 DC.B 0x00 ; '\0' 0x34000594: 00 DC.B 0x00 ; '\0' 0x34000595: 00 DC.B 0x00 ; '\0' 0x34000596: 42 DC.B 0x42 ; 'B' 0x34000597: 0E DC.B 0x0E ; '\x0E' 0x34000598: 04 DC.B 0x04 ; '\x04' 0x34000599: 8E DC.B 0x8E ; '\x8E' 0x3400059A: 01 DC.B 0x01 ; '\x01' 0x3400059B: 00 DC.B 0x00 ; '\0' 0x3400059C: 00 DC.B 0x00 ; '\0' 0x3400059D: 00 DC.B 0x00 ; '\0' 0x3400059E: 18 DC.B 0x18 ; '\x18' 0x3400059F: 00 DC.B 0x00 ; '\0' 0x340005A0: 00 DC.B 0x00 ; '\0' 0x340005A1: 00 DC.B 0x00 ; '\0' 0x340005A2: 5C DC.B 0x5C ; '\\' 0x340005A3: 79 DC.B 0x79 ; 'y' 0x340005A4: 00 DC.B 0x00 ; '\0' 0x340005A5: 00 DC.B 0x00 ; '\0' 0x340005A6: 00 DC.B 0x00 ; '\0' 0x340005A7: 00 DC.B 0x00 ; '\0' 0x340005A8: 00 DC.B 0x00 ; '\0' 0x340005A9: 00 DC.B 0x00 ; '\0' 0x340005AA: 40 DC.B 0x40 ; '@' 0x340005AB: 00 DC.B 0x00 ; '\0' 0x340005AC: 00 DC.B 0x00 ; '\0' 0x340005AD: 00 DC.B 0x00 ; '\0' 0x340005AE: 42 DC.B 0x42 ; 'B' 0x340005AF: 0E DC.B 0x0E ; '\x0E' 0x340005B0: 10 DC.B 0x10 ; '\x10' 0x340005B1: 8E DC.B 0x8E ; '\x8E' 0x340005B2: 01 DC.B 0x01 ; '\x01' 0x340005B3: 86 DC.B 0x86 ; '\x86' 0x340005B4: 02 DC.B 0x02 ; '\x02' 0x340005B5: 85 DC.B 0x85 ; '\x85' 0x340005B6: 03 DC.B 0x03 ; '\x03' 0x340005B7: 84 DC.B 0x84 ; '\x84' 0x340005B8: 04 DC.B 0x04 ; '\x04' 0x340005B9: 00 DC.B 0x00 ; '\0' 0x340005BA: 18 DC.B 0x18 ; '\x18' 0x340005BB: 00 DC.B 0x00 ; '\0' 0x340005BC: 00 DC.B 0x00 ; '\0' 0x340005BD: 00 DC.B 0x00 ; '\0' 0x340005BE: 5C DC.B 0x5C ; '\\' 0x340005BF: 79 DC.B 0x79 ; 'y' 0x340005C0: 00 DC.B 0x00 ; '\0' 0x340005C1: 00 DC.B 0x00 ; '\0' 0x340005C2: 00 DC.B 0x00 ; '\0' 0x340005C3: 00 DC.B 0x00 ; '\0' 0x340005C4: 00 DC.B 0x00 ; '\0' 0x340005C5: 00 DC.B 0x00 ; '\0' 0x340005C6: 4C DC.B 0x4C ; 'L' 0x340005C7: 00 DC.B 0x00 ; '\0' 0x340005C8: 00 DC.B 0x00 ; '\0' 0x340005C9: 00 DC.B 0x00 ; '\0' 0x340005CA: 42 DC.B 0x42 ; 'B' 0x340005CB: 0E DC.B 0x0E ; '\x0E' 0x340005CC: 10 DC.B 0x10 ; '\x10' 0x340005CD: 8E DC.B 0x8E ; '\x8E' 0x340005CE: 01 DC.B 0x01 ; '\x01' 0x340005CF: 86 DC.B 0x86 ; '\x86' 0x340005D0: 02 DC.B 0x02 ; '\x02' 0x340005D1: 85 DC.B 0x85 ; '\x85' 0x340005D2: 03 DC.B 0x03 ; '\x03' 0x340005D3: 84 DC.B 0x84 ; '\x84' 0x340005D4: 04 DC.B 0x04 ; '\x04' 0x340005D5: 00 DC.B 0x00 ; '\0' 0x340005D6: 14 DC.B 0x14 ; '\x14' 0x340005D7: 00 DC.B 0x00 ; '\0' 0x340005D8: 00 DC.B 0x00 ; '\0' 0x340005D9: 00 DC.B 0x00 ; '\0' 0x340005DA: 5C DC.B 0x5C ; '\\' 0x340005DB: 79 DC.B 0x79 ; 'y' 0x340005DC: 00 DC.B 0x00 ; '\0' 0x340005DD: 00 DC.B 0x00 ; '\0' 0x340005DE: 00 DC.B 0x00 ; '\0' 0x340005DF: 00 DC.B 0x00 ; '\0' 0x340005E0: 00 DC.B 0x00 ; '\0' 0x340005E1: 00 DC.B 0x00 ; '\0' 0x340005E2: 1E DC.B 0x1E ; '\x1E' 0x340005E3: 00 DC.B 0x00 ; '\0' 0x340005E4: 00 DC.B 0x00 ; '\0' 0x340005E5: 00 DC.B 0x00 ; '\0' 0x340005E6: 42 DC.B 0x42 ; 'B' 0x340005E7: 0E DC.B 0x0E ; '\x0E' 0x340005E8: 08 DC.B 0x08 ; '\b' 0x340005E9: 8E DC.B 0x8E ; '\x8E' 0x340005EA: 01 DC.B 0x01 ; '\x01' 0x340005EB: 00 DC.B 0x00 ; '\0' 0x340005EC: 00 DC.B 0x00 ; '\0' 0x340005ED: 00 DC.B 0x00 ; '\0' 0x340005EE: 14 DC.B 0x14 ; '\x14' 0x340005EF: 00 DC.B 0x00 ; '\0' 0x340005F0: 00 DC.B 0x00 ; '\0' 0x340005F1: 00 DC.B 0x00 ; '\0' 0x340005F2: 5C DC.B 0x5C ; '\\' 0x340005F3: 79 DC.B 0x79 ; 'y' 0x340005F4: 00 DC.B 0x00 ; '\0' 0x340005F5: 00 DC.B 0x00 ; '\0' 0x340005F6: 00 DC.B 0x00 ; '\0' 0x340005F7: 00 DC.B 0x00 ; '\0' 0x340005F8: 00 DC.B 0x00 ; '\0' 0x340005F9: 00 DC.B 0x00 ; '\0' 0x340005FA: 0C DC.B 0x0C ; '\x0C' 0x340005FB: 00 DC.B 0x00 ; '\0' 0x340005FC: 00 DC.B 0x00 ; '\0' 0x340005FD: 00 DC.B 0x00 ; '\0' 0x340005FE: 42 DC.B 0x42 ; 'B' 0x340005FF: 0E DC.B 0x0E ; '\x0E' 0x34000600: 08 DC.B 0x08 ; '\b' 0x34000601: 8E DC.B 0x8E ; '\x8E' 0x34000602: 01 DC.B 0x01 ; '\x01' 0x34000603: 00 DC.B 0x00 ; '\0' 0x34000604: 00 DC.B 0x00 ; '\0' 0x34000605: 00 DC.B 0x00 ; '\0' 0x34000606: 14 DC.B 0x14 ; '\x14' 0x34000607: 00 DC.B 0x00 ; '\0' 0x34000608: 00 DC.B 0x00 ; '\0' 0x34000609: 00 DC.B 0x00 ; '\0' 0x3400060A: 5C DC.B 0x5C ; '\\' 0x3400060B: 79 DC.B 0x79 ; 'y' 0x3400060C: 00 DC.B 0x00 ; '\0' 0x3400060D: 00 DC.B 0x00 ; '\0' 0x3400060E: 00 DC.B 0x00 ; '\0' 0x3400060F: 00 DC.B 0x00 ; '\0' 0x34000610: 00 DC.B 0x00 ; '\0' 0x34000611: 00 DC.B 0x00 ; '\0' 0x34000612: 20 DC.B 0x20 ; ' ' 0x34000613: 00 DC.B 0x00 ; '\0' 0x34000614: 00 DC.B 0x00 ; '\0' 0x34000615: 00 DC.B 0x00 ; '\0' 0x34000616: 42 DC.B 0x42 ; 'B' 0x34000617: 0E DC.B 0x0E ; '\x0E' 0x34000618: 08 DC.B 0x08 ; '\b' 0x34000619: 8E DC.B 0x8E ; '\x8E' 0x3400061A: 01 DC.B 0x01 ; '\x01' 0x3400061B: 84 DC.B 0x84 ; '\x84' 0x3400061C: 02 DC.B 0x02 ; '\x02' 0x3400061D: 00 DC.B 0x00 ; '\0' 0x3400061E: 0C DC.B 0x0C ; '\x0C' 0x3400061F: 00 DC.B 0x00 ; '\0' 0x34000620: 00 DC.B 0x00 ; '\0' 0x34000621: 00 DC.B 0x00 ; '\0' 0x34000622: 5C DC.B 0x5C ; '\\' 0x34000623: 79 DC.B 0x79 ; 'y' 0x34000624: 00 DC.B 0x00 ; '\0' 0x34000625: 00 DC.B 0x00 ; '\0' 0x34000626: 00 DC.B 0x00 ; '\0' 0x34000627: 00 DC.B 0x00 ; '\0' 0x34000628: 00 DC.B 0x00 ; '\0' 0x34000629: 00 DC.B 0x00 ; '\0' 0x3400062A: 18 DC.B 0x18 ; '\x18' 0x3400062B: 00 DC.B 0x00 ; '\0' 0x3400062C: 00 DC.B 0x00 ; '\0' 0x3400062D: 00 DC.B 0x00 ; '\0' 0x3400062E: 0C DC.B 0x0C ; '\x0C' 0x3400062F: 00 DC.B 0x00 ; '\0' 0x34000630: 00 DC.B 0x00 ; '\0' 0x34000631: 00 DC.B 0x00 ; '\0' 0x34000632: 5C DC.B 0x5C ; '\\' 0x34000633: 79 DC.B 0x79 ; 'y' 0x34000634: 00 DC.B 0x00 ; '\0' 0x34000635: 00 DC.B 0x00 ; '\0' 0x34000636: 00 DC.B 0x00 ; '\0' 0x34000637: 00 DC.B 0x00 ; '\0' 0x34000638: 00 DC.B 0x00 ; '\0' 0x34000639: 00 DC.B 0x00 ; '\0' 0x3400063A: 18 DC.B 0x18 ; '\x18' 0x3400063B: 00 DC.B 0x00 ; '\0' 0x3400063C: 00 DC.B 0x00 ; '\0' 0x3400063D: 00 DC.B 0x00 ; '\0' 0x3400063E: 20 DC.B 0x20 ; ' ' 0x3400063F: 00 DC.B 0x00 ; '\0' 0x34000640: 00 DC.B 0x00 ; '\0' 0x34000641: 00 DC.B 0x00 ; '\0' 0x34000642: 5C DC.B 0x5C ; '\\' 0x34000643: 79 DC.B 0x79 ; 'y' 0x34000644: 00 DC.B 0x00 ; '\0' 0x34000645: 00 DC.B 0x00 ; '\0' 0x34000646: 00 DC.B 0x00 ; '\0' 0x34000647: 00 DC.B 0x00 ; '\0' 0x34000648: 00 DC.B 0x00 ; '\0' 0x34000649: 00 DC.B 0x00 ; '\0' 0x3400064A: 60 DC.B 0x60 ; '`' 0x3400064B: 00 DC.B 0x00 ; '\0' 0x3400064C: 00 DC.B 0x00 ; '\0' 0x3400064D: 00 DC.B 0x00 ; '\0' 0x3400064E: 44 DC.B 0x44 ; 'D' 0x3400064F: 0E DC.B 0x0E ; '\x0E' 0x34000650: 20 DC.B 0x20 ; ' ' 0x34000651: 8E DC.B 0x8E ; '\x8E' 0x34000652: 01 DC.B 0x01 ; '\x01' 0x34000653: 89 DC.B 0x89 ; '\x89' 0x34000654: 02 DC.B 0x02 ; '\x02' 0x34000655: 88 DC.B 0x88 ; '\x88' 0x34000656: 03 DC.B 0x03 ; '\x03' 0x34000657: 87 DC.B 0x87 ; '\x87' 0x34000658: 04 DC.B 0x04 ; '\x04' 0x34000659: 86 DC.B 0x86 ; '\x86' 0x3400065A: 05 DC.B 0x05 ; '\x05' 0x3400065B: 85 DC.B 0x85 ; '\x85' 0x3400065C: 06 DC.B 0x06 ; '\x06' 0x3400065D: 84 DC.B 0x84 ; '\x84' 0x3400065E: 07 DC.B 0x07 ; '\x07' 0x3400065F: 00 DC.B 0x00 ; '\0' 0x34000660: 00 DC.B 0x00 ; '\0' 0x34000661: 00 DC.B 0x00 ; '\0' 0x34000662: 20 DC.B 0x20 ; ' ' 0x34000663: 00 DC.B 0x00 ; '\0' 0x34000664: 00 DC.B 0x00 ; '\0' 0x34000665: 00 DC.B 0x00 ; '\0' 0x34000666: 5C DC.B 0x5C ; '\\' 0x34000667: 79 DC.B 0x79 ; 'y' 0x34000668: 00 DC.B 0x00 ; '\0' 0x34000669: 00 DC.B 0x00 ; '\0' 0x3400066A: 00 DC.B 0x00 ; '\0' 0x3400066B: 00 DC.B 0x00 ; '\0' 0x3400066C: 00 DC.B 0x00 ; '\0' 0x3400066D: 00 DC.B 0x00 ; '\0' 0x3400066E: 60 DC.B 0x60 ; '`' 0x3400066F: 00 DC.B 0x00 ; '\0' 0x34000670: 00 DC.B 0x00 ; '\0' 0x34000671: 00 DC.B 0x00 ; '\0' 0x34000672: 44 DC.B 0x44 ; 'D' 0x34000673: 0E DC.B 0x0E ; '\x0E' 0x34000674: 20 DC.B 0x20 ; ' ' 0x34000675: 8E DC.B 0x8E ; '\x8E' 0x34000676: 01 DC.B 0x01 ; '\x01' 0x34000677: 89 DC.B 0x89 ; '\x89' 0x34000678: 02 DC.B 0x02 ; '\x02' 0x34000679: 88 DC.B 0x88 ; '\x88' 0x3400067A: 03 DC.B 0x03 ; '\x03' 0x3400067B: 87 DC.B 0x87 ; '\x87' 0x3400067C: 04 DC.B 0x04 ; '\x04' 0x3400067D: 86 DC.B 0x86 ; '\x86' 0x3400067E: 05 DC.B 0x05 ; '\x05' 0x3400067F: 85 DC.B 0x85 ; '\x85' 0x34000680: 06 DC.B 0x06 ; '\x06' 0x34000681: 84 DC.B 0x84 ; '\x84' 0x34000682: 07 DC.B 0x07 ; '\x07' 0x34000683: 00 DC.B 0x00 ; '\0' 0x34000684: 00 DC.B 0x00 ; '\0' 0x34000685: 00 DC.B 0x00 ; '\0' 0x34000686: 20 DC.B 0x20 ; ' ' 0x34000687: 00 DC.B 0x00 ; '\0' 0x34000688: 00 DC.B 0x00 ; '\0' 0x34000689: 00 DC.B 0x00 ; '\0' 0x3400068A: 5C DC.B 0x5C ; '\\' 0x3400068B: 79 DC.B 0x79 ; 'y' 0x3400068C: 00 DC.B 0x00 ; '\0' 0x3400068D: 00 DC.B 0x00 ; '\0' 0x3400068E: 00 DC.B 0x00 ; '\0' 0x3400068F: 00 DC.B 0x00 ; '\0' 0x34000690: 00 DC.B 0x00 ; '\0' 0x34000691: 00 DC.B 0x00 ; '\0' 0x34000692: 52 DC.B 0x52 ; 'R' 0x34000693: 00 DC.B 0x00 ; '\0' 0x34000694: 00 DC.B 0x00 ; '\0' 0x34000695: 00 DC.B 0x00 ; '\0' 0x34000696: 44 DC.B 0x44 ; 'D' 0x34000697: 0E DC.B 0x0E ; '\x0E' 0x34000698: 20 DC.B 0x20 ; ' ' 0x34000699: 8E DC.B 0x8E ; '\x8E' 0x3400069A: 01 DC.B 0x01 ; '\x01' 0x3400069B: 89 DC.B 0x89 ; '\x89' 0x3400069C: 02 DC.B 0x02 ; '\x02' 0x3400069D: 88 DC.B 0x88 ; '\x88' 0x3400069E: 03 DC.B 0x03 ; '\x03' 0x3400069F: 87 DC.B 0x87 ; '\x87' 0x340006A0: 04 DC.B 0x04 ; '\x04' 0x340006A1: 86 DC.B 0x86 ; '\x86' 0x340006A2: 05 DC.B 0x05 ; '\x05' 0x340006A3: 85 DC.B 0x85 ; '\x85' 0x340006A4: 06 DC.B 0x06 ; '\x06' 0x340006A5: 84 DC.B 0x84 ; '\x84' 0x340006A6: 07 DC.B 0x07 ; '\x07' 0x340006A7: 00 DC.B 0x00 ; '\0' 0x340006A8: 00 DC.B 0x00 ; '\0' 0x340006A9: 00 DC.B 0x00 ; '\0' 0x340006AA: 20 DC.B 0x20 ; ' ' 0x340006AB: 00 DC.B 0x00 ; '\0' 0x340006AC: 00 DC.B 0x00 ; '\0' 0x340006AD: 00 DC.B 0x00 ; '\0' 0x340006AE: 5C DC.B 0x5C ; '\\' 0x340006AF: 79 DC.B 0x79 ; 'y' 0x340006B0: 00 DC.B 0x00 ; '\0' 0x340006B1: 00 DC.B 0x00 ; '\0' 0x340006B2: 00 DC.B 0x00 ; '\0' 0x340006B3: 00 DC.B 0x00 ; '\0' 0x340006B4: 00 DC.B 0x00 ; '\0' 0x340006B5: 00 DC.B 0x00 ; '\0' 0x340006B6: 52 DC.B 0x52 ; 'R' 0x340006B7: 00 DC.B 0x00 ; '\0' 0x340006B8: 00 DC.B 0x00 ; '\0' 0x340006B9: 00 DC.B 0x00 ; '\0' 0x340006BA: 44 DC.B 0x44 ; 'D' 0x340006BB: 0E DC.B 0x0E ; '\x0E' 0x340006BC: 20 DC.B 0x20 ; ' ' 0x340006BD: 8E DC.B 0x8E ; '\x8E' 0x340006BE: 01 DC.B 0x01 ; '\x01' 0x340006BF: 89 DC.B 0x89 ; '\x89' 0x340006C0: 02 DC.B 0x02 ; '\x02' 0x340006C1: 88 DC.B 0x88 ; '\x88' 0x340006C2: 03 DC.B 0x03 ; '\x03' 0x340006C3: 87 DC.B 0x87 ; '\x87' 0x340006C4: 04 DC.B 0x04 ; '\x04' 0x340006C5: 86 DC.B 0x86 ; '\x86' 0x340006C6: 05 DC.B 0x05 ; '\x05' 0x340006C7: 85 DC.B 0x85 ; '\x85' 0x340006C8: 06 DC.B 0x06 ; '\x06' 0x340006C9: 84 DC.B 0x84 ; '\x84' 0x340006CA: 07 DC.B 0x07 ; '\x07' 0x340006CB: 00 DC.B 0x00 ; '\0' 0x340006CC: 00 DC.B 0x00 ; '\0' 0x340006CD: 00 DC.B 0x00 ; '\0' 0x340006CE: 18 DC.B 0x18 ; '\x18' 0x340006CF: 00 DC.B 0x00 ; '\0' 0x340006D0: 00 DC.B 0x00 ; '\0' 0x340006D1: 00 DC.B 0x00 ; '\0' 0x340006D2: 5C DC.B 0x5C ; '\\' 0x340006D3: 79 DC.B 0x79 ; 'y' 0x340006D4: 00 DC.B 0x00 ; '\0' 0x340006D5: 00 DC.B 0x00 ; '\0' 0x340006D6: 00 DC.B 0x00 ; '\0' 0x340006D7: 00 DC.B 0x00 ; '\0' 0x340006D8: 00 DC.B 0x00 ; '\0' 0x340006D9: 00 DC.B 0x00 ; '\0' 0x340006DA: 30 DC.B 0x30 ; '0' 0x340006DB: 00 DC.B 0x00 ; '\0' 0x340006DC: 00 DC.B 0x00 ; '\0' 0x340006DD: 00 DC.B 0x00 ; '\0' 0x340006DE: 42 DC.B 0x42 ; 'B' 0x340006DF: 0E DC.B 0x0E ; '\x0E' 0x340006E0: 10 DC.B 0x10 ; '\x10' 0x340006E1: 8E DC.B 0x8E ; '\x8E' 0x340006E2: 01 DC.B 0x01 ; '\x01' 0x340006E3: 86 DC.B 0x86 ; '\x86' 0x340006E4: 02 DC.B 0x02 ; '\x02' 0x340006E5: 85 DC.B 0x85 ; '\x85' 0x340006E6: 03 DC.B 0x03 ; '\x03' 0x340006E7: 84 DC.B 0x84 ; '\x84' 0x340006E8: 04 DC.B 0x04 ; '\x04' 0x340006E9: 00 DC.B 0x00 ; '\0' 0x340006EA: 18 DC.B 0x18 ; '\x18' 0x340006EB: 00 DC.B 0x00 ; '\0' 0x340006EC: 00 DC.B 0x00 ; '\0' 0x340006ED: 00 DC.B 0x00 ; '\0' 0x340006EE: 5C DC.B 0x5C ; '\\' 0x340006EF: 79 DC.B 0x79 ; 'y' 0x340006F0: 00 DC.B 0x00 ; '\0' 0x340006F1: 00 DC.B 0x00 ; '\0' 0x340006F2: 00 DC.B 0x00 ; '\0' 0x340006F3: 00 DC.B 0x00 ; '\0' 0x340006F4: 00 DC.B 0x00 ; '\0' 0x340006F5: 00 DC.B 0x00 ; '\0' 0x340006F6: 30 DC.B 0x30 ; '0' 0x340006F7: 00 DC.B 0x00 ; '\0' 0x340006F8: 00 DC.B 0x00 ; '\0' 0x340006F9: 00 DC.B 0x00 ; '\0' 0x340006FA: 42 DC.B 0x42 ; 'B' 0x340006FB: 0E DC.B 0x0E ; '\x0E' 0x340006FC: 10 DC.B 0x10 ; '\x10' 0x340006FD: 8E DC.B 0x8E ; '\x8E' 0x340006FE: 01 DC.B 0x01 ; '\x01' 0x340006FF: 86 DC.B 0x86 ; '\x86' 0x34000700: 02 DC.B 0x02 ; '\x02' 0x34000701: 85 DC.B 0x85 ; '\x85' 0x34000702: 03 DC.B 0x03 ; '\x03' 0x34000703: 84 DC.B 0x84 ; '\x84' 0x34000704: 04 DC.B 0x04 ; '\x04' 0x34000705: 00 DC.B 0x00 ; '\0' 0x34000706: 18 DC.B 0x18 ; '\x18' 0x34000707: 00 DC.B 0x00 ; '\0' 0x34000708: 00 DC.B 0x00 ; '\0' 0x34000709: 00 DC.B 0x00 ; '\0' 0x3400070A: 5C DC.B 0x5C ; '\\' 0x3400070B: 79 DC.B 0x79 ; 'y' 0x3400070C: 00 DC.B 0x00 ; '\0' 0x3400070D: 00 DC.B 0x00 ; '\0' 0x3400070E: 00 DC.B 0x00 ; '\0' 0x3400070F: 00 DC.B 0x00 ; '\0' 0x34000710: 00 DC.B 0x00 ; '\0' 0x34000711: 00 DC.B 0x00 ; '\0' 0x34000712: 30 DC.B 0x30 ; '0' 0x34000713: 00 DC.B 0x00 ; '\0' 0x34000714: 00 DC.B 0x00 ; '\0' 0x34000715: 00 DC.B 0x00 ; '\0' 0x34000716: 42 DC.B 0x42 ; 'B' 0x34000717: 0E DC.B 0x0E ; '\x0E' 0x34000718: 10 DC.B 0x10 ; '\x10' 0x34000719: 8E DC.B 0x8E ; '\x8E' 0x3400071A: 01 DC.B 0x01 ; '\x01' 0x3400071B: 86 DC.B 0x86 ; '\x86' 0x3400071C: 02 DC.B 0x02 ; '\x02' 0x3400071D: 85 DC.B 0x85 ; '\x85' 0x3400071E: 03 DC.B 0x03 ; '\x03' 0x3400071F: 84 DC.B 0x84 ; '\x84' 0x34000720: 04 DC.B 0x04 ; '\x04' 0x34000721: 00 DC.B 0x00 ; '\0' 0x34000722: 18 DC.B 0x18 ; '\x18' 0x34000723: 00 DC.B 0x00 ; '\0' 0x34000724: 00 DC.B 0x00 ; '\0' 0x34000725: 00 DC.B 0x00 ; '\0' 0x34000726: 5C DC.B 0x5C ; '\\' 0x34000727: 79 DC.B 0x79 ; 'y' 0x34000728: 00 DC.B 0x00 ; '\0' 0x34000729: 00 DC.B 0x00 ; '\0' 0x3400072A: 00 DC.B 0x00 ; '\0' 0x3400072B: 00 DC.B 0x00 ; '\0' 0x3400072C: 00 DC.B 0x00 ; '\0' 0x3400072D: 00 DC.B 0x00 ; '\0' 0x3400072E: 30 DC.B 0x30 ; '0' 0x3400072F: 00 DC.B 0x00 ; '\0' 0x34000730: 00 DC.B 0x00 ; '\0' 0x34000731: 00 DC.B 0x00 ; '\0' 0x34000732: 42 DC.B 0x42 ; 'B' 0x34000733: 0E DC.B 0x0E ; '\x0E' 0x34000734: 10 DC.B 0x10 ; '\x10' 0x34000735: 8E DC.B 0x8E ; '\x8E' 0x34000736: 01 DC.B 0x01 ; '\x01' 0x34000737: 86 DC.B 0x86 ; '\x86' 0x34000738: 02 DC.B 0x02 ; '\x02' 0x34000739: 85 DC.B 0x85 ; '\x85' 0x3400073A: 03 DC.B 0x03 ; '\x03' 0x3400073B: 84 DC.B 0x84 ; '\x84' 0x3400073C: 04 DC.B 0x04 ; '\x04' 0x3400073D: 00 DC.B 0x00 ; '\0' 0x3400073E: 0C DC.B 0x0C ; '\x0C' 0x3400073F: 00 DC.B 0x00 ; '\0' 0x34000740: 00 DC.B 0x00 ; '\0' 0x34000741: 00 DC.B 0x00 ; '\0' 0x34000742: 5C DC.B 0x5C ; '\\' 0x34000743: 79 DC.B 0x79 ; 'y' 0x34000744: 00 DC.B 0x00 ; '\0' 0x34000745: 00 DC.B 0x00 ; '\0' 0x34000746: 00 DC.B 0x00 ; '\0' 0x34000747: 00 DC.B 0x00 ; '\0' 0x34000748: 00 DC.B 0x00 ; '\0' 0x34000749: 00 DC.B 0x00 ; '\0' 0x3400074A: 04 DC.B 0x04 ; '\x04' 0x3400074B: 00 DC.B 0x00 ; '\0' 0x3400074C: 00 DC.B 0x00 ; '\0' 0x3400074D: 00 DC.B 0x00 ; '\0' 0x3400074E: 18 DC.B 0x18 ; '\x18' 0x3400074F: 00 DC.B 0x00 ; '\0' 0x34000750: 00 DC.B 0x00 ; '\0' 0x34000751: 00 DC.B 0x00 ; '\0' 0x34000752: 5C DC.B 0x5C ; '\\' 0x34000753: 79 DC.B 0x79 ; 'y' 0x34000754: 00 DC.B 0x00 ; '\0' 0x34000755: 00 DC.B 0x00 ; '\0' 0x34000756: 00 DC.B 0x00 ; '\0' 0x34000757: 00 DC.B 0x00 ; '\0'

Section .bss.libc._acDownBuffer from SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=16, align=1


_acDownBuffer: 0x34000758: 00 DC.B 0x00 ; '\0' 0x34000759: 53 DC.B 0x53 ; 'S' 0x3400075A: 45 DC.B 0x45 ; 'E' 0x3400075B: 47 DC.B 0x47 ; 'G' 0x3400075C: 47 DC.B 0x47 ; 'G' 0x3400075D: 45 DC.B 0x45 ; 'E' 0x3400075E: 52 DC.B 0x52 ; 'R' 0x3400075F: 20 DC.B 0x20 ; ' ' 0x34000760: 43 DC.B 0x43 ; 'C' 0x34000761: 2F DC.B 0x2F ; '/' 0x34000762: 43 DC.B 0x43 ; 'C' 0x34000763: 2B DC.B 0x2B ; '+' 0x34000764: 2B DC.B 0x2B ; '+' 0x34000765: 20 DC.B 0x20 ; ' ' 0x34000766: 63 DC.B 0x63 ; 'c' 0x34000767: 6F DC.B 0x6F ; 'o'

Section .data.libc.__SEGGER_RTL_global_locale from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=20, align=4


__SEGGER_RTL_global_locale: __RAL_global_locale: 0x34000768: 3418D958 DC.W __SEGGER_RTL_c_locale 0x3400076C: 3418D958 DC.W __SEGGER_RTL_c_locale 0x34000770: 3418D958 DC.W __SEGGER_RTL_c_locale 0x34000774: 3418D958 DC.W __SEGGER_RTL_c_locale 0x34000778: 3418D958 DC.W __SEGGER_RTL_c_locale

Section .data.uwTickPrio from blto2_FSBL_lto.o, size=4, align=4


uwTickPrio: 0x3400077C: 10 DC.B 0x10 ; '\x10' 0x3400077D: 00 DC.B 0x00 ; '\0' 0x3400077E: 00 DC.B 0x00 ; '\0' 0x3400077F: 00 DC.B 0x00 ; '\0'

Section .data.libc.stdout from prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=4, align=4


stdout: 0x34000780: 34000344 DC.W __SEGGER_RTL_stdout_file

Section .data.libc.stdin from prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=4, align=4


stdin: 0x34000784: 34000348 DC.W __SEGGER_RTL_stdin_file

Section .data.libc.stderr from prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=4, align=4


stderr: 0x34000788: 3400034C DC.W __SEGGER_RTL_stderr_file

Section .data.SystemCoreClock from blto2_FSBL_lto.o, size=4, align=4


SystemCoreClock: 0x3400078C: 00 DC.B 0x00 ; '\0' 0x3400078D: 90 DC.B 0x90 ; '\x90' 0x3400078E: D0 DC.B 0xD0 ; '\xD0' 0x3400078F: 03 DC.B 0x03 ; '\x03'

Section .data.uwTickFreq from blto2_FSBL_lto.o, size=1, align=1


uwTickFreq: 0x34000790: 01 DC.B 0x01 ; '\x01'

Section .bss.block.stack from [ Linker created ], size=8192, align=8

(34062000-34063FFF excluded)

Section .vectors from stm32n657xx_Vectors.o, size=844, align=1024


_vectors: g_pfnVectors: 0x34180400: 34064000 DC.W 34064000 ; R_ARM_ABS32 0x34180404: 3418D661 DC.W reset_handler 0x34180408: 3418DCA5 DC.W NMI_Handler 0x3418040C: 3418DCA9 DC.W HardFault_Handler 0x34180410: 3418DCAD DC.W MemManage_Handler 0x34180414: 3418DCB1 DC.W BusFault_Handler 0x34180418: 3418DCB5 DC.W UsageFault_Handler 0x3418041C: 00 DC.B 0x00 ; '\0' 0x3418041D: 00 DC.B 0x00 ; '\0' 0x3418041E: 00 DC.B 0x00 ; '\0' 0x3418041F: 00 DC.B 0x00 ; '\0' 0x34180420: 00 DC.B 0x00 ; '\0' 0x34180421: 00 DC.B 0x00 ; '\0' 0x34180422: 00 DC.B 0x00 ; '\0' 0x34180423: 00 DC.B 0x00 ; '\0' 0x34180424: 00 DC.B 0x00 ; '\0' 0x34180425: 00 DC.B 0x00 ; '\0' 0x34180426: 00 DC.B 0x00 ; '\0' 0x34180427: 00 DC.B 0x00 ; '\0' 0x34180428: 00 DC.B 0x00 ; '\0' 0x34180429: 00 DC.B 0x00 ; '\0' 0x3418042A: 00 DC.B 0x00 ; '\0' 0x3418042B: 00 DC.B 0x00 ; '\0' 0x3418042C: 3418DCB9 DC.W SVC_Handler 0x34180430: 3418DCBD DC.W DebugMon_Handler 0x34180434: 00 DC.B 0x00 ; '\0' 0x34180435: 00 DC.B 0x00 ; '\0' 0x34180436: 00 DC.B 0x00 ; '\0' 0x34180437: 00 DC.B 0x00 ; '\0' 0x34180438: 3418DCC1 DC.W PendSV_Handler 0x3418043C: 3418153D DC.W SysTick_Handler 0x34180440: 3418DA37 DC.W PVD_PVM_IRQHandler 0x34180444: 00 DC.B 0x00 ; '\0' 0x34180445: 00 DC.B 0x00 ; '\0' 0x34180446: 00 DC.B 0x00 ; '\0' 0x34180447: 00 DC.B 0x00 ; '\0' 0x34180448: 3418DABF DC.W DTS_IRQHandler 0x3418044C: 3418DAE3 DC.W RCC_IRQHandler 0x34180450: 3418DBE3 DC.W LOCKUP_IRQHandler 0x34180454: 3418DC73 DC.W CACHE_ECC_IRQHandler 0x34180458: 3418DC97 DC.W TCM_ECC_IRQHandler 0x3418045C: 3418DCA3 DC.W BCK_ECC_IRQHandler 0x34180460: 3418DCA7 DC.W FPU_IRQHandler 0x34180464: 00 DC.B 0x00 ; '\0' 0x34180465: 00 DC.B 0x00 ; '\0' 0x34180466: 00 DC.B 0x00 ; '\0' 0x34180467: 00 DC.B 0x00 ; '\0' 0x34180468: 3418DCAB DC.W RTC_S_IRQHandler 0x3418046C: 3418DCAF DC.W TAMP_IRQHandler 0x34180470: 3418DCB3 DC.W RIFSC_TAMPER_IRQHandler 0x34180474: 3418DCB7 DC.W IAC_IRQHandler 0x34180478: 3418DCBB DC.W RCC_S_IRQHandler 0x3418047C: 00 DC.B 0x00 ; '\0' 0x3418047D: 00 DC.B 0x00 ; '\0' 0x3418047E: 00 DC.B 0x00 ; '\0' 0x3418047F: 00 DC.B 0x00 ; '\0' 0x34180480: 3418DCBF DC.W RTC_IRQHandler 0x34180484: 00 DC.B 0x00 ; '\0' 0x34180485: 00 DC.B 0x00 ; '\0' 0x34180486: 00 DC.B 0x00 ; '\0' 0x34180487: 00 DC.B 0x00 ; '\0' 0x34180488: 3418DCC3 DC.W IWDG_IRQHandler 0x3418048C: 3418DEC3 DC.W WWDG_IRQHandler 0x34180490: 3418DF43 DC.W EXTI0_IRQHandler 0x34180494: 3418DF67 DC.W EXTI1_IRQHandler 0x34180498: 3418DF8B DC.W EXTI2_IRQHandler 0x3418049C: 3418DFAF DC.W EXTI3_IRQHandler 0x341804A0: 3418E02F DC.W EXTI4_IRQHandler 0x341804A4: 3418E04B DC.W EXTI5_IRQHandler 0x341804A8: 3418E087 DC.W EXTI6_IRQHandler 0x341804AC: 3418E09B DC.W EXTI7_IRQHandler 0x341804B0: 3418E197 DC.W EXTI8_IRQHandler 0x341804B4: 3418E2EF DC.W EXTI9_IRQHandler 0x341804B8: 3418E32F DC.W EXTI10_IRQHandler 0x341804BC: 3418E36F DC.W EXTI11_IRQHandler 0x341804C0: 3418E3BF DC.W EXTI12_IRQHandler 0x341804C4: 3418E427 DC.W EXTI13_IRQHandler 0x341804C8: 3418E49B DC.W EXTI14_IRQHandler 0x341804CC: 3418E50F DC.W EXTI15_IRQHandler 0x341804D0: 3418E5F3 DC.W SAES_IRQHandler 0x341804D4: 3418E607 DC.W CRYP_IRQHandler 0x341804D8: 3418E617 DC.W PKA_IRQHandler 0x341804DC: 3418F113 DC.W HASH_IRQHandler 0x341804E0: 3418F133 DC.W RNG_IRQHandler 0x341804E4: 00 DC.B 0x00 ; '\0' 0x341804E5: 00 DC.B 0x00 ; '\0' 0x341804E6: 00 DC.B 0x00 ; '\0' 0x341804E7: 00 DC.B 0x00 ; '\0' 0x341804E8: 3418F143 DC.W MCE1_IRQHandler 0x341804EC: 3418F163 DC.W MCE2_IRQHandler 0x341804F0: 3418F173 DC.W MCE3_IRQHandler 0x341804F4: 3418F183 DC.W MCE4_IRQHandler 0x341804F8: 3418F193 DC.W ADC1_2_IRQHandler 0x341804FC: 3418F1A3 DC.W CSI_IRQHandler 0x34180500: 3418F27F DC.W DCMIPP_IRQHandler 0x34180504: 00 DC.B 0x00 ; '\0' 0x34180505: 00 DC.B 0x00 ; '\0' 0x34180506: 00 DC.B 0x00 ; '\0' 0x34180507: 00 DC.B 0x00 ; '\0' 0x34180508: 00 DC.B 0x00 ; '\0' 0x34180509: 00 DC.B 0x00 ; '\0' 0x3418050A: 00 DC.B 0x00 ; '\0' 0x3418050B: 00 DC.B 0x00 ; '\0' 0x3418050C: 00 DC.B 0x00 ; '\0' 0x3418050D: 00 DC.B 0x00 ; '\0' 0x3418050E: 00 DC.B 0x00 ; '\0' 0x3418050F: 00 DC.B 0x00 ; '\0' 0x34180510: 3418F5CF DC.W PAHB_ERR_IRQHandler 0x34180514: 3418F62F DC.W NPU0_IRQHandler 0x34180518: 3418FFF3 DC.W NPU1_IRQHandler 0x3418051C: 341900DF DC.W NPU2_IRQHandler 0x34180520: 341900EF DC.W NPU3_IRQHandler 0x34180524: 341901DF DC.W CACHEAXI_IRQHandler 0x34180528: 341901F7 DC.W LTDC_LO_IRQHandler 0x3418052C: 34190213 DC.W LTDC_LO_ERR_IRQHandler 0x34180530: 3419022B DC.W DMA2D_IRQHandler 0x34180534: 3419023B DC.W JPEG_IRQHandler 0x34180538: 3419024B DC.W VENC_IRQHandler 0x3418053C: 3419025B DC.W GFXMMU_IRQHandler 0x34180540: 3419026B DC.W GFXTIM_IRQHandler 0x34180544: 3419027B DC.W GPU2D_IRQHandler 0x34180548: 3419028B DC.W GPU2D_ER_IRQHandler 0x3418054C: 3419029F DC.W ICACHE_IRQHandler 0x34180550: 341902B3 DC.W HPDMA1_Channel0_IRQHandler 0x34180554: 341902D3 DC.W HPDMA1_Channel1_IRQHandler 0x34180558: 341902EB DC.W HPDMA1_Channel2_IRQHandler 0x3418055C: 34190303 DC.W HPDMA1_Channel3_IRQHandler 0x34180560: 3419031B DC.W HPDMA1_Channel4_IRQHandler 0x34180564: 34190333 DC.W HPDMA1_Channel5_IRQHandler 0x34180568: 3419034B DC.W HPDMA1_Channel6_IRQHandler 0x3418056C: 34190363 DC.W HPDMA1_Channel7_IRQHandler 0x34180570: 3419037B DC.W HPDMA1_Channel8_IRQHandler 0x34180574: 34190393 DC.W HPDMA1_Channel9_IRQHandler 0x34180578: 341903AB DC.W HPDMA1_Channel10_IRQHandler 0x3418057C: 341903C3 DC.W HPDMA1_Channel11_IRQHandler 0x34180580: 341903DB DC.W HPDMA1_Channel12_IRQHandler 0x34180584: 341903F3 DC.W HPDMA1_Channel13_IRQHandler 0x34180588: 3419040B DC.W HPDMA1_Channel14_IRQHandler 0x3418058C: 34190A67 DC.W HPDMA1_Channel15_IRQHandler 0x34180590: 34190C1F DC.W GPDMA1_Channel0_IRQHandler 0x34180594: 34190CA7 DC.W GPDMA1_Channel1_IRQHandler 0x34180598: 34190D87 DC.W GPDMA1_Channel2_IRQHandler 0x3418059C: 34190E57 DC.W GPDMA1_Channel3_IRQHandler 0x341805A0: 34190F93 DC.W GPDMA1_Channel4_IRQHandler 0x341805A4: 34191257 DC.W GPDMA1_Channel5_IRQHandler 0x341805A8: 3419151B DC.W GPDMA1_Channel6_IRQHandler 0x341805AC: 341915F7 DC.W GPDMA1_Channel7_IRQHandler 0x341805B0: 34191677 DC.W GPDMA1_Channel8_IRQHandler 0x341805B4: 341918D7 DC.W GPDMA1_Channel9_IRQHandler 0x341805B8: 341918EF DC.W GPDMA1_Channel10_IRQHandler 0x341805BC: 34191973 DC.W GPDMA1_Channel11_IRQHandler 0x341805C0: 341919F7 DC.W GPDMA1_Channel12_IRQHandler 0x341805C4: 34191A7B DC.W GPDMA1_Channel13_IRQHandler 0x341805C8: 34191AFF DC.W GPDMA1_Channel14_IRQHandler 0x341805CC: 34191B17 DC.W GPDMA1_Channel15_IRQHandler 0x341805D0: 34191B2F DC.W I2C1_EV_IRQHandler 0x341805D4: 34191B47 DC.W I2C1_ER_IRQHandler 0x341805D8: 34191B5F DC.W I2C2_EV_IRQHandler 0x341805DC: 34191B77 DC.W I2C2_ER_IRQHandler 0x341805E0: 34191B8F DC.W I2C3_EV_IRQHandler 0x341805E4: 34191BA7 DC.W I2C3_ER_IRQHandler 0x341805E8: 34191BBF DC.W I2C4_EV_IRQHandler 0x341805EC: 34191BD7 DC.W I2C4_ER_IRQHandler 0x341805F0: 34191BEF DC.W I3C1_EV_IRQHandler 0x341805F4: 34191C07 DC.W I3C1_ER_IRQHandler 0x341805F8: 34191C1F DC.W I3C2_EV_IRQHandler 0x341805FC: 34191C37 DC.W I3C2_ER_IRQHandler 0x34180600: 34191C4F DC.W TIM1_BRK_IRQHandler 0x34180604: 34191C67 DC.W TIM1_UP_IRQHandler 0x34180608: 34191C7B DC.W TIM1_TRG_CCU_IRQHandler 0x3418060C: 341920CF DC.W TIM1_CC_IRQHandler 0x34180610: 341921B3 DC.W TIM2_IRQHandler 0x34180614: 3419234B DC.W TIM3_IRQHandler 0x34180618: 34192497 DC.W TIM4_IRQHandler 0x3418061C: 3419258F DC.W TIM5_IRQHandler 0x34180620: 341928FF DC.W TIM6_IRQHandler 0x34180624: 341929D3 DC.W TIM7_IRQHandler 0x34180628: 341929F7 DC.W TIM8_BRK_IRQHandler 0x3418062C: 34192A57 DC.W TIM8_UP_IRQHandler 0x34180630: 34192AD7 DC.W TIM8_TRG_CCU_IRQHandler 0x34180634: 34192CA3 DC.W TIM8_CC_IRQHandler 0x34180638: 34192E6F DC.W TIM9_IRQHandler 0x3418063C: 34192FC3 DC.W TIM10_IRQHandler 0x34180640: 341931A7 DC.W TIM11_IRQHandler 0x34180644: 3419320F DC.W TIM12_IRQHandler 0x34180648: 34193343 DC.W TIM13_IRQHandler 0x3418064C: 3419337F DC.W TIM14_IRQHandler 0x34180650: 341933D7 DC.W TIM15_IRQHandler 0x34180654: 34193673 DC.W TIM16_IRQHandler 0x34180658: 34193753 DC.W TIM17_IRQHandler 0x3418065C: 341937DF DC.W TIM18_IRQHandler 0x34180660: 3419389F DC.W LPTIM1_IRQHandler 0x34180664: 341938B7 DC.W LPTIM2_IRQHandler 0x34180668: 341938CB DC.W LPTIM3_IRQHandler 0x3418066C: 3419392B DC.W LPTIM4_IRQHandler 0x34180670: 3419397B DC.W LPTIM5_IRQHandler 0x34180674: 341939BB DC.W ADF1_FLT0_IRQHandler 0x34180678: 34193AEB DC.W MDF1_FLT0_IRQHandler 0x3418067C: 34193AED DC.W MDF1_FLT1_IRQHandler 0x34180680: 34193AEF DC.W MDF1_FLT2_IRQHandler 0x34180684: 34193AF1 DC.W MDF1_FLT3_IRQHandler 0x34180688: 34193AF3 DC.W MDF1_FLT4_IRQHandler 0x3418068C: 34193AF5 DC.W MDF1_FLT5_IRQHandler 0x34180690: 34193AF7 DC.W SAI1_A_IRQHandler 0x34180694: 34193AF9 DC.W SAI1_B_IRQHandler 0x34180698: 34193AFB DC.W SAI2_A_IRQHandler 0x3418069C: 34193AFD DC.W SAI2_B_IRQHandler 0x341806A0: 34193AFF DC.W SPDIFRX_IRQHandler 0x341806A4: 34193B01 DC.W SPI1_IRQHandler 0x341806A8: 34193B03 DC.W SPI2_IRQHandler 0x341806AC: 34193B05 DC.W SPI3_IRQHandler 0x341806B0: 34193B07 DC.W SPI4_IRQHandler 0x341806B4: 34193B09 DC.W SPI5_IRQHandler 0x341806B8: 34193B0B DC.W SPI6_IRQHandler 0x341806BC: 34193B0D DC.W USART1_IRQHandler 0x341806C0: 34193B0F DC.W USART2_IRQHandler 0x341806C4: 34193B11 DC.W USART3_IRQHandler 0x341806C8: 34193B13 DC.W UART4_IRQHandler 0x341806CC: 34193B15 DC.W UART5_IRQHandler 0x341806D0: 34193B17 DC.W USART6_IRQHandler 0x341806D4: 34193B19 DC.W UART7_IRQHandler 0x341806D8: 34193B1B DC.W UART8_IRQHandler 0x341806DC: 34193B1D DC.W UART9_IRQHandler 0x341806E0: 34193B1F DC.W USART10_IRQHandler 0x341806E4: 34193B21 DC.W LPUART1_IRQHandler 0x341806E8: 34193B23 DC.W XSPI1_IRQHandler 0x341806EC: 34193B25 DC.W XSPI2_IRQHandler 0x341806F0: 34193B27 DC.W XSPI3_IRQHandler 0x341806F4: 34193B29 DC.W FMC_IRQHandler 0x341806F8: 34193B2B DC.W SDMMC1_IRQHandler 0x341806FC: 34193B2D DC.W SDMMC2_IRQHandler 0x34180700: 34193B2F DC.W UCPD1_IRQHandler 0x34180704: 34193B31 DC.W USB1_OTG_HS_IRQHandler 0x34180708: 34193B33 DC.W USB2_OTG_HS_IRQHandler 0x3418070C: 34193B35 DC.W ETH1_IRQHandler 0x34180710: 34193B37 DC.W FDCAN1_IT0_IRQHandler 0x34180714: 34193B39 DC.W FDCAN1_IT1_IRQHandler 0x34180718: 34193B3B DC.W FDCAN2_IT0_IRQHandler 0x3418071C: 34193B3D DC.W FDCAN2_IT1_IRQHandler 0x34180720: 34193B3F DC.W FDCAN3_IT0_IRQHandler 0x34180724: 34193B41 DC.W FDCAN3_IT1_IRQHandler 0x34180728: 34193B43 DC.W FDCAN_CU_IRQHandler 0x3418072C: 34193B45 DC.W MDIOS_IRQHandler 0x34180730: 34193B47 DC.W DCMI_PSSI_IRQHandler 0x34180734: 34193B49 DC.W WAKEUP_PIN_IRQHandler 0x34180738: 34193B4B DC.W CTI_INT0_IRQHandler 0x3418073C: 34193B4D DC.W CTI_INT1_IRQHandler 0x34180740: 00 DC.B 0x00 ; '\0' 0x34180741: 00 DC.B 0x00 ; '\0' 0x34180742: 00 DC.B 0x00 ; '\0' 0x34180743: 00 DC.B 0x00 ; '\0' 0x34180744: 34193B4F DC.W LTDC_UP_IRQHandler 0x34180748: 34193B51 DC.W LTDC_UP_ERR_IRQHandler

Section .text.Error_Handler from blto2_FSBL_lto.o, size=4, align=4


Error_Handler: _vectors_end: 0x3418074C: B672 CPSID i
.L1: 0x3418074E: E7FE B 46L1 ; 0x3418074E

Section .rodata.libc.__SEGGER_RTL_ipow10 from prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=160, align=8


__SEGGER_RTL_ipow10: 0x34180750: 01 DC.B 0x01 ; '\x01' 0x34180751: 00 DC.B 0x00 ; '\0' 0x34180752: 00 DC.B 0x00 ; '\0' 0x34180753: 00 DC.B 0x00 ; '\0' 0x34180754: 00 DC.B 0x00 ; '\0' 0x34180755: 00 DC.B 0x00 ; '\0' 0x34180756: 00 DC.B 0x00 ; '\0' 0x34180757: 00 DC.B 0x00 ; '\0' 0x34180758: 0A DC.B 0x0A ; '\n' 0x34180759: 00 DC.B 0x00 ; '\0' 0x3418075A: 00 DC.B 0x00 ; '\0' 0x3418075B: 00 DC.B 0x00 ; '\0' 0x3418075C: 00 DC.B 0x00 ; '\0' 0x3418075D: 00 DC.B 0x00 ; '\0' 0x3418075E: 00 DC.B 0x00 ; '\0' 0x3418075F: 00 DC.B 0x00 ; '\0' 0x34180760: 64 DC.B 0x64 ; 'd' 0x34180761: 00 DC.B 0x00 ; '\0' 0x34180762: 00 DC.B 0x00 ; '\0' 0x34180763: 00 DC.B 0x00 ; '\0' 0x34180764: 00 DC.B 0x00 ; '\0' 0x34180765: 00 DC.B 0x00 ; '\0' 0x34180766: 00 DC.B 0x00 ; '\0' 0x34180767: 00 DC.B 0x00 ; '\0' 0x34180768: E8 DC.B 0xE8 ; '\xE8' 0x34180769: 03 DC.B 0x03 ; '\x03' 0x3418076A: 00 DC.B 0x00 ; '\0' 0x3418076B: 00 DC.B 0x00 ; '\0' 0x3418076C: 00 DC.B 0x00 ; '\0' 0x3418076D: 00 DC.B 0x00 ; '\0' 0x3418076E: 00 DC.B 0x00 ; '\0' 0x3418076F: 00 DC.B 0x00 ; '\0' 0x34180770: 10 DC.B 0x10 ; '\x10' 0x34180771: 27 DC.B 0x27 ; ''' 0x34180772: 00 DC.B 0x00 ; '\0' 0x34180773: 00 DC.B 0x00 ; '\0' 0x34180774: 00 DC.B 0x00 ; '\0' 0x34180775: 00 DC.B 0x00 ; '\0' 0x34180776: 00 DC.B 0x00 ; '\0' 0x34180777: 00 DC.B 0x00 ; '\0' 0x34180778: A0 DC.B 0xA0 ; '\xA0' 0x34180779: 86 DC.B 0x86 ; '\x86' 0x3418077A: 01 DC.B 0x01 ; '\x01' 0x3418077B: 00 DC.B 0x00 ; '\0' 0x3418077C: 00 DC.B 0x00 ; '\0' 0x3418077D: 00 DC.B 0x00 ; '\0' 0x3418077E: 00 DC.B 0x00 ; '\0' 0x3418077F: 00 DC.B 0x00 ; '\0' 0x34180780: 40 DC.B 0x40 ; '@' 0x34180781: 42 DC.B 0x42 ; 'B' 0x34180782: 0F DC.B 0x0F ; '\x0F' 0x34180783: 00 DC.B 0x00 ; '\0' 0x34180784: 00 DC.B 0x00 ; '\0' 0x34180785: 00 DC.B 0x00 ; '\0' 0x34180786: 00 DC.B 0x00 ; '\0' 0x34180787: 00 DC.B 0x00 ; '\0' 0x34180788: 80 DC.B 0x80 ; '\x80' 0x34180789: 96 DC.B 0x96 ; '\x96' 0x3418078A: 98 DC.B 0x98 ; '\x98' 0x3418078B: 00 DC.B 0x00 ; '\0' 0x3418078C: 00 DC.B 0x00 ; '\0' 0x3418078D: 00 DC.B 0x00 ; '\0' 0x3418078E: 00 DC.B 0x00 ; '\0' 0x3418078F: 00 DC.B 0x00 ; '\0' 0x34180790: 00 DC.B 0x00 ; '\0' 0x34180791: E1 DC.B 0xE1 ; '\xE1' 0x34180792: F5 DC.B 0xF5 ; '\xF5' 0x34180793: 05 DC.B 0x05 ; '\x05' 0x34180794: 00 DC.B 0x00 ; '\0' 0x34180795: 00 DC.B 0x00 ; '\0' 0x34180796: 00 DC.B 0x00 ; '\0' 0x34180797: 00 DC.B 0x00 ; '\0' 0x34180798: 00 DC.B 0x00 ; '\0' 0x34180799: CA DC.B 0xCA ; '\xCA' 0x3418079A: 9A DC.B 0x9A ; '\x9A' 0x3418079B: 3B DC.B 0x3B ; ';' 0x3418079C: 00 DC.B 0x00 ; '\0' 0x3418079D: 00 DC.B 0x00 ; '\0' 0x3418079E: 00 DC.B 0x00 ; '\0' 0x3418079F: 00 DC.B 0x00 ; '\0' 0x341807A0: 00 DC.B 0x00 ; '\0' 0x341807A1: E4 DC.B 0xE4 ; '\xE4' 0x341807A2: 0B DC.B 0x0B ; '\v' 0x341807A3: 54 DC.B 0x54 ; 'T' 0x341807A4: 02 DC.B 0x02 ; '\x02' 0x341807A5: 00 DC.B 0x00 ; '\0' 0x341807A6: 00 DC.B 0x00 ; '\0' 0x341807A7: 00 DC.B 0x00 ; '\0' 0x341807A8: 00 DC.B 0x00 ; '\0' 0x341807A9: E8 DC.B 0xE8 ; '\xE8' 0x341807AA: 76 DC.B 0x76 ; 'v' 0x341807AB: 48 DC.B 0x48 ; 'H' 0x341807AC: 17 DC.B 0x17 ; '\x17' 0x341807AD: 00 DC.B 0x00 ; '\0' 0x341807AE: 00 DC.B 0x00 ; '\0' 0x341807AF: 00 DC.B 0x00 ; '\0' 0x341807B0: 00 DC.B 0x00 ; '\0' 0x341807B1: 10 DC.B 0x10 ; '\x10' 0x341807B2: A5 DC.B 0xA5 ; '\xA5' 0x341807B3: D4 DC.B 0xD4 ; '\xD4' 0x341807B4: E8 DC.B 0xE8 ; '\xE8' 0x341807B5: 00 DC.B 0x00 ; '\0' 0x341807B6: 00 DC.B 0x00 ; '\0' 0x341807B7: 00 DC.B 0x00 ; '\0' 0x341807B8: 00 DC.B 0x00 ; '\0' 0x341807B9: A0 DC.B 0xA0 ; '\xA0' 0x341807BA: 72 DC.B 0x72 ; 'r' 0x341807BB: 4E DC.B 0x4E ; 'N' 0x341807BC: 18 DC.B 0x18 ; '\x18' 0x341807BD: 09 DC.B 0x09 ; '\t' 0x341807BE: 00 DC.B 0x00 ; '\0' 0x341807BF: 00 DC.B 0x00 ; '\0' 0x341807C0: 00 DC.B 0x00 ; '\0' 0x341807C1: 40 DC.B 0x40 ; '@' 0x341807C2: 7A DC.B 0x7A ; 'z' 0x341807C3: 10 DC.B 0x10 ; '\x10' 0x341807C4: F3 DC.B 0xF3 ; '\xF3' 0x341807C5: 5A DC.B 0x5A ; 'Z' 0x341807C6: 00 DC.B 0x00 ; '\0' 0x341807C7: 00 DC.B 0x00 ; '\0' 0x341807C8: 00 DC.B 0x00 ; '\0' 0x341807C9: 80 DC.B 0x80 ; '\x80' 0x341807CA: C6 DC.B 0xC6 ; '\xC6' 0x341807CB: A4 DC.B 0xA4 ; '\xA4' 0x341807CC: 7E DC.B 0x7E ; '~' 0x341807CD: 8D DC.B 0x8D ; '\x8D' 0x341807CE: 03 DC.B 0x03 ; '\x03' 0x341807CF: 00 DC.B 0x00 ; '\0' 0x341807D0: 00 DC.B 0x00 ; '\0' 0x341807D1: 00 DC.B 0x00 ; '\0' 0x341807D2: C1 DC.B 0xC1 ; '\xC1' 0x341807D3: 6F DC.B 0x6F ; 'o' 0x341807D4: F2 DC.B 0xF2 ; '\xF2' 0x341807D5: 86 DC.B 0x86 ; '\x86' 0x341807D6: 23 DC.B 0x23 ; '#' 0x341807D7: 00 DC.B 0x00 ; '\0' 0x341807D8: 00 DC.B 0x00 ; '\0' 0x341807D9: 00 DC.B 0x00 ; '\0' 0x341807DA: 8A DC.B 0x8A ; '\x8A' 0x341807DB: 5D DC.B 0x5D ; ']' 0x341807DC: 78 DC.B 0x78 ; 'x' 0x341807DD: 45 DC.B 0x45 ; 'E' 0x341807DE: 63 DC.B 0x63 ; 'c' 0x341807DF: 01 DC.B 0x01 ; '\x01' 0x341807E0: 00 DC.B 0x00 ; '\0' 0x341807E1: 00 DC.B 0x00 ; '\0' 0x341807E2: 64 DC.B 0x64 ; 'd' 0x341807E3: A7 DC.B 0xA7 ; '\xA7' 0x341807E4: B3 DC.B 0xB3 ; '\xB3' 0x341807E5: B6 DC.B 0xB6 ; '\xB6' 0x341807E6: E0 DC.B 0xE0 ; '\xE0' 0x341807E7: 0D DC.B 0x0D ; '\r' 0x341807E8: 00 DC.B 0x00 ; '\0' 0x341807E9: 00 DC.B 0x00 ; '\0' 0x341807EA: E8 DC.B 0xE8 ; '\xE8' 0x341807EB: 89 DC.B 0x89 ; '\x89' 0x341807EC: 04 DC.B 0x04 ; '\x04' 0x341807ED: 23 DC.B 0x23 ; '#' 0x341807EE: C7 DC.B 0xC7 ; '\xC7' 0x341807EF: 8A DC.B 0x8A ; '\x8A'

Section .text.libc.__SEGGER_RTL_vfprintf_short_float_long_long from __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=3036, align=8


__SEGGER_RTL_vfprintf_short_float_long_long: __SEGGER_RTL_vfprintf: 0x341807F0: E92D 4FF8 PUSH.W 123R3-R11, LR} 0x341807F4: ED2D 8B0E VSTMDB SP!, {D8-D14} 0x341807F8: B08C SUB SP, SP, #48 0x341807FA: EEB2 8A04 VMOV.F32 S16, #10 0x341807FE: ED9F BAB9 VLDR S22, =0x00000000 ; [PC, #0x02E4] [0x34180AE4] 0x34180802: EEB7 DA00 VMOV.F32 S26, #1 0x34180806: ED9F CAB8 VLDR S24, =0x7E967699 ; [PC, #0x02E0] [0x34180AE8] 0x3418080A: ED9F EBB9 VLDR D14, =0xB690000000000000 ; [PC, #0x02E4] [0x34180AF0] 0x3418080E: 4683 MOV R11, R0 0x34180810: 2000 MOVS R0, #0 0x34180812: 4614 MOV R4, R2 0x34180814: 468A MOV R10, R1 0x34180816: F8CB 0000 STR.W R0, [R11]
.L1: 0x3418081A: F81A 1B01 LDRB R1, [R10], #1 0x3418081E: 2925 CMP R1, #37 0x34180820: D006 BEQ 46L2 ; 0x34180830 0x34180822: 2900 CMP R1, #0 0x34180824: F000 85B3 BEQ.W 46L123 ; 0x3418138E 0x34180828: 4658 MOV R0, R11 0x3418082A: F013 FAB2 BL __SEGGER_RTL_putc ; 0x34193D92 0x3418082E: E7F4 B 46L1 ; 0x3418081A
.L2: 0x34180830: 2600 MOVS R6, #0
.L3: 0x34180832: 4652 MOV R2, R10 0x34180834: F81A 0B01 LDRB R0, [R10], #1 0x34180838: F1A0 0320 SUB.W R3, R0, #32 0x3418083C: 2B10 CMP R3, #16 0x3418083E: D80D BHI 46L4 ; 0x3418085C 0x34180840: 2180 MOVS R1, #128 0x34180842: E8DF F003 TBB 91PC, R3] 0x34180846: 09 DC.B 0x09 ; '\t' 0x34180847: 1B DC.B 0x1B ; '\x1B' 0x34180848: 1B DC.B 0x1B ; '\x1B' 0x34180849: 19 DC.B 0x19 ; '\x19' 0x3418084A: 1B DC.B 0x1B ; '\x1B' 0x3418084B: 1B DC.B 0x1B ; '\x1B' 0x3418084C: 1B DC.B 0x1B ; '\x1B' 0x3418084D: 15 DC.B 0x15 ; '\x15' 0x3418084E: 1B DC.B 0x1B ; '\x1B' 0x3418084F: 1B DC.B 0x1B ; '\x1B' 0x34180850: 30 DC.B 0x30 ; '0' 0x34180851: 18 DC.B 0x18 ; '\x18' 0x34180852: 1B DC.B 0x1B ; '\x1B' 0x34180853: 10 DC.B 0x10 ; '\x10' 0x34180854: 1B DC.B 0x1B ; '\x1B' 0x34180855: 1B DC.B 0x1B ; '\x1B' 0x34180856: 12 DC.B 0x12 ; '\x12' 0x34180857: 00 DC.B 0x00 ; '\0' 0x34180858: 2140 MOVS R1, #64 0x3418085A: E00D B 46L5 ; 0x34180878
.L4: 0x3418085C: 285E CMP R0, #94 0x3418085E: D10D BNE 46L6 ; 0x3418087C 0x34180860: F44F 5180 MOV.W R1, #0x1000 0x34180864: E008 B 46L5 ; 0x34180878 0x34180866: 2110 MOVS R1, #16 0x34180868: E006 B 46L5 ; 0x34180878 0x3418086A: F44F 7100 MOV.W R1, #0x0200 0x3418086E: E003 B 46L5 ; 0x34180878 0x34180870: F44F 4100 MOV.W R1, #0x8000 0x34180874: E000 B 46L5 ; 0x34180878 0x34180876: 2120 MOVS R1, #32
.L5: 0x34180878: 430E ORRS R6, R1 0x3418087A: E7DA B 46L3 ; 0x34180832
.L6: 0x3418087C: F1A0 0130 SUB.W R1, R0, #48 0x34180880: B2C9 UXTB R1, R1 0x34180882: 2909 CMP R1, #9 0x34180884: D81C BHI 46L8 ; 0x341808C0 0x34180886: 2100 MOVS R1, #0
.L7: 0x34180888: EB01 0181 ADD.W R1, R1, R1, LSL #2 0x3418088C: EB00 0141 ADD.W R1, R0, R1, LSL #1 0x34180890: F81A 0B01 LDRB R0, [R10], #1 0x34180894: 3930 SUBS R1, #48 0x34180896: F1A0 0230 SUB.W R2, R0, #48 0x3418089A: B2D2 UXTB R2, R2 0x3418089C: 2A0A CMP R2, #10 0x3418089E: D3F3 BCC 46L7 ; 0x34180888 0x341808A0: EA21 78E1 BIC.W R8, R1, R1, ASR #31 0x341808A4: E00E B 46L9 ; 0x341808C4 0x341808A6: F854 0B04 LDR R0, [R4], #4 0x341808AA: 2110 MOVS R1, #16 0x341808AC: F102 0A02 ADD.W R10, R2, #2 0x341808B0: 2800 CMP R0, #0 0x341808B2: EA50 B850 CNEG R8, R0, MI 0x341808B6: EA01 61D0 AND.W R1, R1, R0, LSR #27 0x341808BA: 7850 LDRB R0, [R2, #1] 0x341808BC: 430E ORRS R6, R1 0x341808BE: E001 B 46L9 ; 0x341808C4
.L8: 0x341808C0: F04F 0800 MOV.W R8, #0
.L9: 0x341808C4: 282E CMP R0, #46 0x341808C6: D10B BNE 46L10 ; 0x341808E0 0x341808C8: 4651 MOV R1, R10 0x341808CA: F811 0B01 LDRB R0, [R1], #1 0x341808CE: 282A CMP R0, #42 0x341808D0: D109 BNE 46L11 ; 0x341808E6 0x341808D2: F854 9B04 LDR R9, [R4], #4 0x341808D6: F10A 0102 ADD.W R1, R10, #2 0x341808DA: F89A 0001 LDRB.W R0, [R10, #1] 0x341808DE: E016 B 46L13 ; 0x3418090E
.L10: 0x341808E0: F04F 0900 MOV.W R9, #0 0x341808E4: E01C B 46L16 ; 0x34180920
.L11: 0x341808E6: F1A0 0230 SUB.W R2, R0, #48 0x341808EA: F04F 0900 MOV.W R9, #0 0x341808EE: B2D2 UXTB R2, R2 0x341808F0: 2A09 CMP R2, #9 0x341808F2: D812 BHI 46L14 ; 0x3418091A
.L12: 0x341808F4: EB09 0289 ADD.W R2, R9, R9, LSL #2 0x341808F8: EB00 0242 ADD.W R2, R0, R2, LSL #1 0x341808FC: F811 0B01 LDRB R0, [R1], #1 0x34180900: F1A2 0930 SUB.W R9, R2, #48 0x34180904: F1A0 0330 SUB.W R3, R0, #48 0x34180908: B2DA UXTB R2, R3 0x3418090A: 2A0A CMP R2, #10 0x3418090C: D3F2 BCC 46L12 ; 0x341808F4
.L13: 0x3418090E: F1B9 0F00 CMP.W R9, #0 0x34180912: D404 BMI 46L15 ; 0x3418091E 0x34180914: F446 7680 ORR R6, R6, #0x0100 0x34180918: E001 B 46L15 ; 0x3418091E
.L14: 0x3418091A: F446 7680 ORR R6, R6, #0x0100
.L15: 0x3418091E: 468A MOV R10, R1
.L16: 0x34180920: F1A0 0168 SUB.W R1, R0, #104 0x34180924: B2CA UXTB R2, R1 0x34180926: 01C9 LSLS R1, R1, #7 0x34180928: EA41 0152 ORR.W R1, R1, R2, LSR #1 0x3418092C: B2C9 UXTB R1, R1 0x3418092E: 2909 CMP R1, #9 0x34180930: D822 BHI 46L21 ; 0x34180978 0x34180932: E8DF F001 TBB 91PC, R1] 0x34180936: 05 DC.B 0x05 ; '\x05' 0x34180937: 0E DC.B 0x0E ; '\x0E' 0x34180938: 12 DC.B 0x12 ; '\x12' 0x34180939: 21 DC.B 0x21 ; '!' 0x3418093A: 21 DC.B 0x21 ; '!' 0x3418093B: 21 DC.B 0x21 ; '!' 0x3418093C: 0F DC.B 0x0F ; '\x0F' 0x3418093D: 21 DC.B 0x21 ; '!' 0x3418093E: 21 DC.B 0x21 ; '!' 0x3418093F: 0F DC.B 0x0F ; '\x0F' 0x34180940: 4651 MOV R1, R10 0x34180942: F811 0B01 LDRB R0, [R1], #1 0x34180946: 2868 CMP R0, #104 0x34180948: D112 BNE 46L18 ; 0x34180970 0x3418094A: F89A 0001 LDRB.W R0, [R10, #1] 0x3418094E: 3608 ADDS R6, #8 0x34180950: E00B B 46L17 ; 0x3418096A 0x34180952: 3602 ADDS R6, #2 0x34180954: F81A 0B01 LDRB R0, [R10], #1 0x34180958: E00E B 46L21 ; 0x34180978 0x3418095A: 4651 MOV R1, R10 0x3418095C: F811 0B01 LDRB R0, [R1], #1 0x34180960: 286C CMP R0, #108 0x34180962: D107 BNE 46L19 ; 0x34180974 0x34180964: F89A 0001 LDRB.W R0, [R10, #1] 0x34180968: 3602 ADDS R6, #2
.L17: 0x3418096A: F10A 0A02 ADD.W R10, R10, #2 0x3418096E: E003 B 46L21 ; 0x34180978
.L18: 0x34180970: 3604 ADDS R6, #4 0x34180972: E000 B 46L20 ; 0x34180976
.L19: 0x34180974: 3601 ADDS R6, #1
.L20: 0x34180976: 468A MOV R10, R1
.L21: 0x34180978: 2846 CMP R0, #70 0x3418097A: DD1F BLE 46L22 ; 0x341809BC 0x3418097C: F1A0 0163 SUB.W R1, R0, #99 0x34180980: 2915 CMP R1, #21 0x34180982: D82F BHI 46L24 ; 0x341809E4 0x34180984: E8DF F011 TBH 91PC, R1, LSL #1] 0x34180988: 5F DC.B 0x5F ; '_' 0x34180989: 00 DC.B 0x00 ; '\0' 0x3418098A: 17 DC.B 0x17 ; '\x17' 0x3418098B: 00 DC.B 0x00 ; '\0' 0x3418098C: 3F DC.B 0x3F ; '?' 0x3418098D: 00 DC.B 0x00 ; '\0' 0x3418098E: 23 DC.B 0x23 ; '#' 0x3418098F: 00 DC.B 0x00 ; '\0' 0x34180990: 5D DC.B 0x5D ; ']' 0x34180991: 01 DC.B 0x01 ; '\x01' 0x34180992: 16 DC.B 0x16 ; '\x16' 0x34180993: 00 DC.B 0x00 ; '\0' 0x34180994: 17 DC.B 0x17 ; '\x17' 0x34180995: 00 DC.B 0x00 ; '\0' 0x34180996: 16 DC.B 0x16 ; '\x16' 0x34180997: 00 DC.B 0x00 ; '\0' 0x34180998: 16 DC.B 0x16 ; '\x16' 0x34180999: 00 DC.B 0x00 ; '\0' 0x3418099A: 16 DC.B 0x16 ; '\x16' 0x3418099B: 00 DC.B 0x00 ; '\0' 0x3418099C: 16 DC.B 0x16 ; '\x16' 0x3418099D: 00 DC.B 0x00 ; '\0' 0x3418099E: 6F DC.B 0x6F ; 'o' 0x3418099F: 00 DC.B 0x00 ; '\0' 0x341809A0: 80 DC.B 0x80 ; '\x80' 0x341809A1: 00 DC.B 0x00 ; '\0' 0x341809A2: 49 DC.B 0x49 ; 'I' 0x341809A3: 00 DC.B 0x00 ; '\0' 0x341809A4: 16 DC.B 0x16 ; '\x16' 0x341809A5: 00 DC.B 0x00 ; '\0' 0x341809A6: 16 DC.B 0x16 ; '\x16' 0x341809A7: 00 DC.B 0x00 ; '\0' 0x341809A8: 7C DC.B 0x7C ; '|' 0x341809A9: 00 DC.B 0x00 ; '\0' 0x341809AA: 16 DC.B 0x16 ; '\x16' 0x341809AB: 00 DC.B 0x00 ; '\0' 0x341809AC: 42 DC.B 0x42 ; 'B' 0x341809AD: 00 DC.B 0x00 ; '\0' 0x341809AE: 16 DC.B 0x16 ; '\x16' 0x341809AF: 00 DC.B 0x00 ; '\0' 0x341809B0: 16 DC.B 0x16 ; '\x16' 0x341809B1: 00 DC.B 0x00 ; '\0' 0x341809B2: 36 DC.B 0x36 ; '6' 0x341809B3: 00 DC.B 0x00 ; '\0' 0x341809B4: E731 B 46L1 ; 0x3418081A 0x341809B6: F446 4680 ORR R6, R6, #0x4000 0x341809BA: E02B B 46L26 ; 0x34180A14
.L22: 0x341809BC: 2844 CMP R0, #68 0x341809BE: DD09 BLE 46L23 ; 0x341809D4 0x341809C0: 2845 CMP R0, #69 0x341809C2: D01E BEQ 46L25 ; 0x34180A02 0x341809C4: 2846 CMP R0, #70 0x341809C6: F47F AF28 BNE.W 46L1 ; 0x3418081A 0x341809CA: F446 5600 ORR R6, R6, #0x2000 0x341809CE: F446 6700 ORR R7, R6, #0x0800 0x341809D2: E138 B 46L48 ; 0x34180C46
.L23: 0x341809D4: 2825 CMP R0, #37 0x341809D6: F040 84ED BNE.W 46L126 ; 0x341813B4 0x341809DA: 4658 MOV R0, R11 0x341809DC: 2125 MOVS R1, #37 0x341809DE: F013 F9D8 BL __SEGGER_RTL_putc ; 0x34193D92 0x341809E2: E71A B 46L1 ; 0x3418081A
.L24: 0x341809E4: 2847 CMP R0, #71 0x341809E6: F000 812A BEQ.W 46L47 ; 0x34180C3E 0x341809EA: 2858 CMP R0, #88 0x341809EC: F47F AF15 BNE.W 46L1 ; 0x3418081A 0x341809F0: F446 5600 ORR R6, R6, #0x2000 0x341809F4: F243 0258 MOVW R2, #0x3058 0x341809F8: 2878 CMP R0, #120 0x341809FA: D146 BNE 46L27 ; 0x34180A8A 0x341809FC: F243 0278 MOVW R2, #0x3078 0x34180A00: E043 B 46L27 ; 0x34180A8A
.L25: 0x34180A02: F446 5600 ORR R6, R6, #0x2000 0x34180A06: F446 6780 ORR R7, R6, #0x0400 0x34180A0A: E11C B 46L48 ; 0x34180C46 0x34180A0C: 05F1 LSLS R1, R6, #23 0x34180A0E: BF48 IT MI 0x34180A10: F426 7600 BICMI R6, R6, #0x0200
.L26: 0x34180A14: 2100 MOVS R1, #0 0x34180A16: 9103 STR R1, [SP, #12] 0x34180A18: E03F B 46L28 ; 0x34180A9A 0x34180A1A: 4620 MOV R0, R4 0x34180A1C: F8CD 8008 STR.W R8, [SP, #8] 0x34180A20: F850 4B04 LDR R4, [R0], #4 0x34180A24: F04F 0908 MOV.W R9, #8 0x34180A28: F04F 0800 MOV.W R8, #0 0x34180A2C: 9004 STR R0, [SP, #16] 0x34180A2E: 2C00 CMP R4, #0 0x34180A30: F000 81DD BEQ.W 46L65 ; 0x34180DEE 0x34180A34: 0630 LSLS R0, R6, #24 0x34180A36: 2123 MOVS R1, #35 0x34180A38: EA01 70E0 AND.W R0, R1, R0, ASR #31 0x34180A3C: 9003 STR R0, [SP, #12] 0x34180A3E: F446 7680 ORR R6, R6, #0x0100 0x34180A42: 2700 MOVS R7, #0 0x34180A44: E1DB B 46L68 ; 0x34180DFE 0x34180A46: 4620 MOV R0, R4 0x34180A48: F1A8 0801 SUB.W R8, R8, #1 0x34180A4C: F810 4B04 LDRB R4, [R0], #4 0x34180A50: 4631 MOV R1, R6 0x34180A52: 9004 STR R0, [SP, #16] 0x34180A54: 4658 MOV R0, R11 0x34180A56: 4642 MOV R2, R8 0x34180A58: F013 F9ED BL __SEGGER_RTL_pre_padding ; 0x34193E36 0x34180A5C: 4658 MOV R0, R11 0x34180A5E: 4621 MOV R1, R4 0x34180A60: F013 F997 BL __SEGGER_RTL_putc ; 0x34193D92 0x34180A64: E22E B 46L77 ; 0x34180EC4 0x34180A66: 0731 LSLS R1, R6, #28 0x34180A68: F854 0B04 LDR R0, [R4], #4 0x34180A6C: F8DB 1000 LDR.W R1, [R11] 0x34180A70: F100 81BB BMI.W 46L64 ; 0x34180DEA 0x34180A74: 07B2 LSLS R2, R6, #30 0x34180A76: BF52 ITEE PL 0x34180A78: 6001 STRPL R1, [R0] 0x34180A7A: 2200 MOVMI R2, #0 0x34180A7C: C006 STMMI R0!, {R1-R2} 0x34180A7E: E6CC B 46L1 ; 0x3418081A 0x34180A80: F854 0B04 LDR R0, [R4], #4 0x34180A84: 9404 STR R4, [SP, #16] 0x34180A86: E12D B 46L53 ; 0x34180CE4 0x34180A88: 2230 MOVS R2, #48
.L27: 0x34180A8A: 0631 LSLS R1, R6, #24 0x34180A8C: EA02 71E1 AND.W R1, R2, R1, ASR #31 0x34180A90: 9103 STR R1, [SP, #12] 0x34180A92: 05F1 LSLS R1, R6, #23 0x34180A94: BF48 IT MI 0x34180A96: F426 7600 BICMI R6, R6, #0x0200
.L28: 0x34180A9A: 0471 LSLS R1, R6, #17 0x34180A9C: F8CD 8008 STR.W R8, [SP, #8] 0x34180AA0: EA4F 7186 LSL.W R1, R6, #30 0x34180AA4: D404 BMI 46L29 ; 0x34180AB0 0x34180AA6: 2900 CMP R1, #0 0x34180AA8: D40A BMI 46L30 ; 0x34180AC0 0x34180AAA: 1D21 ADDS R1, R4, #4 0x34180AAC: 2200 MOVS R2, #0 0x34180AAE: E00D B 46L31 ; 0x34180ACC
.L29: 0x34180AB0: 2900 CMP R1, #0 0x34180AB2: D421 BMI 46L32 ; 0x34180AF8 0x34180AB4: 4621 MOV R1, R4 0x34180AB6: F851 4B04 LDR R4, [R1], #4 0x34180ABA: EA4F 78E4 ASR.W R8, R4, #31 0x34180ABE: E022 B 46L33 ; 0x34180B06
.L30: 0x34180AC0: 1DE1 ADDS R1, R4, #7 0x34180AC2: F021 0407 BIC R4, R1, #7 0x34180AC6: F104 0108 ADD.W R1, R4, #8 0x34180ACA: 6862 LDR R2, [R4, #4]
.L31: 0x34180ACC: 6824 LDR R4, [R4] 0x34180ACE: 0773 LSLS R3, R6, #29 0x34180AD0: 9104 STR R1, [SP, #16] 0x34180AD2: D421 BMI 46L34 ; 0x34180B18 0x34180AD4: 2300 MOVS R3, #0 0x34180AD6: F016 0F08 TST R6, #8 0x34180ADA: EA52 8803 CSEL R8, R2, R3, EQ 0x34180ADE: D037 BEQ 46L40 ; 0x34180B50 0x34180AE0: B2E4 UXTB R4, R4 0x34180AE2: E035 B 46L40 ; 0x34180B50 0x34180AE4: 00000000 DC.W 0x00000000 0x34180AE8: 7E967699 DC.W 0x7E967699 0x34180AEC: 00 DC.B 0x00 ; '\0' 0x34180AED: BF DC.B 0xBF ; '\xBF' 0x34180AEE: 00 DC.B 0x00 ; '\0' 0x34180AEF: BF DC.B 0xBF ; '\xBF' 0x34180AF0: 00000000 DC64 0xB690000000000000 0x34180AF4: B6900000
.L32: 0x34180AF8: 1DE1 ADDS R1, R4, #7 0x34180AFA: F021 0107 BIC R1, R1, #7 0x34180AFE: F8D1 8004 LDR.W R8, [R1, #4] 0x34180B02: F851 4B08 LDR R4, [R1], #8
.L33: 0x34180B06: 9104 STR R1, [SP, #16] 0x34180B08: 0771 LSLS R1, R6, #29 0x34180B0A: D409 BMI 46L35 ; 0x34180B20 0x34180B0C: 0731 LSLS R1, R6, #28 0x34180B0E: D50A BPL 46L36 ; 0x34180B26 0x34180B10: F344 18C0 SBFX R8, R4, #7, #1 0x34180B14: B264 SXTB R4, R4 0x34180B16: E006 B 46L36 ; 0x34180B26
.L34: 0x34180B18: B2A4 UXTH R4, R4 0x34180B1A: F04F 0800 MOV.W R8, #0 0x34180B1E: E017 B 46L40 ; 0x34180B50
.L35: 0x34180B20: F344 38C0 SBFX R8, R4, #15, #1 0x34180B24: B224 SXTH R4, R4
.L36: 0x34180B26: F1B8 0F00 CMP.W R8, #0 0x34180B2A: DB09 BLT 46L37 ; 0x34180B40 0x34180B2C: 06B1 LSLS R1, R6, #26 0x34180B2E: D40D BMI 46L38 ; 0x34180B4C 0x34180B30: 0671 LSLS R1, R6, #25 0x34180B32: 9A03 LDR R2, [SP, #12] 0x34180B34: F04F 0120 MOV.W R1, #32 0x34180B38: EA52 8251 CSEL R2, R2, R1, PL 0x34180B3C: 9203 STR R2, [SP, #12] 0x34180B3E: E007 B 46L40 ; 0x34180B50
.L37: 0x34180B40: 2100 MOVS R1, #0 0x34180B42: 4264 RSBS R4, R4, #0 0x34180B44: EB61 0808 SBC.W R8, R1, R8 0x34180B48: 212D MOVS R1, #45 0x34180B4A: E000 B 46L39 ; 0x34180B4E
.L38: 0x34180B4C: 212B MOVS R1, #43
.L39: 0x34180B4E: 9103 STR R1, [SP, #12]
.L40: 0x34180B50: 05F1 LSLS R1, R6, #23 0x34180B52: BF48 IT MI 0x34180B54: F426 7600 BICMI R6, R6, #0x0200 0x34180B58: 464B MOV R3, R9 0x34180B5A: 2700 MOVS R7, #0 0x34180B5C: 05F1 LSLS R1, R6, #23 0x34180B5E: BF58 IT PL 0x34180B60: 2301 MOVPL R3, #1 0x34180B62: 286E CMP R0, #110 0x34180B64: DD28 BLE 46L42 ; 0x34180BB8 0x34180B66: 386F SUBS R0, #111 0x34180B68: 2809 CMP R0, #9 0x34180B6A: F200 816C BHI.W 46L71 ; 0x34180E46 0x34180B6E: E8DF F010 TBH 91PC, R0, LSL #1] 0x34180B72: 0A DC.B 0x0A ; '\n' 0x34180B73: 00 DC.B 0x00 ; '\0' 0x34180B74: 53 DC.B 0x53 ; 'S' 0x34180B75: 00 DC.B 0x00 ; '\0' 0x34180B76: 6A DC.B 0x6A ; 'j' 0x34180B77: 01 DC.B 0x01 ; '\x01' 0x34180B78: 6A DC.B 0x6A ; 'j' 0x34180B79: 01 DC.B 0x01 ; '\x01' 0x34180B7A: 6A DC.B 0x6A ; 'j' 0x34180B7B: 01 DC.B 0x01 ; '\x01' 0x34180B7C: 6A DC.B 0x6A ; 'j' 0x34180B7D: 01 DC.B 0x01 ; '\x01' 0x34180B7E: 2A DC.B 0x2A ; '*' 0x34180B7F: 00 DC.B 0x00 ; '\0' 0x34180B80: 6A DC.B 0x6A ; 'j' 0x34180B81: 01 DC.B 0x01 ; '\x01' 0x34180B82: 6A DC.B 0x6A ; 'j' 0x34180B83: 01 DC.B 0x01 ; '\x01' 0x34180B84: 53 DC.B 0x53 ; 'S' 0x34180B85: 00 DC.B 0x00 ; '\0' 0x34180B86: EA54 0008 ORRS.W R0, R4, R8 0x34180B8A: F000 815C BEQ.W 46L71 ; 0x34180E46 0x34180B8E: 08E0 LSRS R0, R4, #3 0x34180B90: F10D 011A ADD.W R1, SP, #26 0x34180B94: EA40 7048 ORR.W R0, R0, R8, LSL #29 0x34180B98: 2206 MOVS R2, #6
.L41: 0x34180B9A: F362 04DF BFI R4, R2, #3, #29 0x34180B9E: 55CC STRB R4, [R1, R7] 0x34180BA0: 4604 MOV R4, R0 0x34180BA2: 3701 ADDS R7, #1 0x34180BA4: EA50 00D8 ORRS.W R0, R0, R8, LSR #3 0x34180BA8: EA4F 08D8 LSR.W R8, R8, #3 0x34180BAC: EA4F 00D4 LSR.W R0, R4, #3 0x34180BB0: EA40 7048 ORR.W R0, R0, R8, LSL #29 0x34180BB4: D1F1 BNE 46L41 ; 0x34180B9A 0x34180BB6: E146 B 46L71 ; 0x34180E46
.L42: 0x34180BB8: 2858 CMP R0, #88 0x34180BBA: D02D BEQ 46L45 ; 0x34180C18 0x34180BBC: 2864 CMP R0, #100 0x34180BBE: BF18 IT NE 0x34180BC0: 2869 CMPNE R0, #105 0x34180BC2: F040 8140 BNE.W 46L71 ; 0x34180E46 0x34180BC6: EA54 0008 ORRS.W R0, R4, R8 0x34180BCA: F000 813C BEQ.W 46L71 ; 0x34180E46 0x34180BCE: F10D 051A ADD.W R5, SP, #26 0x34180BD2: 46B9 MOV R9, R7 0x34180BD4: 9301 STR R3, [SP, #4]
.L43: 0x34180BD6: 0430 LSLS R0, R6, #16 0x34180BD8: D506 BPL 46L44 ; 0x34180BE8 0x34180BDA: F007 0003 AND R0, R7, #3 0x34180BDE: 2803 CMP R0, #3 0x34180BE0: BF02 ITTT EQ 0x34180BE2: 202C MOVEQ R0, #44 0x34180BE4: 55E8 STRBEQ R0, [R5, R7] 0x34180BE6: 3701 ADDEQ R7, #1
.L44: 0x34180BE8: 4620 MOV R0, R4 0x34180BEA: 4641 MOV R1, R8 0x34180BEC: 220A MOVS R2, #10 0x34180BEE: 2300 MOVS R3, #0 0x34180BF0: F012 FEE4 BL __aeabi_uldivmod ; 0x341939BC 0x34180BF4: EB00 0280 ADD.W R2, R0, R0, LSL #2 0x34180BF8: F1D4 0309 RSBS R3, R4, #9 0x34180BFC: EB79 0308 SBCS.W R3, R9, R8 0x34180C00: 4688 MOV R8, R1 0x34180C02: EBA4 0242 SUB.W R2, R4, R2, LSL #1 0x34180C06: 4604 MOV R4, R0 0x34180C08: F042 0230 ORR R2, R2, #48 0x34180C0C: 55EA STRB R2, [R5, R7] 0x34180C0E: F107 0701 ADD.W R7, R7, #1 0x34180C12: D3E0 BCC 46L43 ; 0x34180BD6 0x34180C14: 9B01 LDR R3, [SP, #4] 0x34180C16: E116 B 46L71 ; 0x34180E46
.L45: 0x34180C18: EA44 0008 ORR.W R0, R4, R8 0x34180C1C: 2900 CMP R1, #0 0x34180C1E: D405 BMI 46L46 ; 0x34180C2C 0x34180C20: F04F 0901 MOV.W R9, #1 0x34180C24: 2800 CMP R0, #0 0x34180C26: F000 80E4 BEQ.W 46L66 ; 0x34180DF2 0x34180C2A: E0E8 B 46L68 ; 0x34180DFE
.L46: 0x34180C2C: 2800 CMP R0, #0 0x34180C2E: F040 80E6 BNE.W 46L68 ; 0x34180DFE 0x34180C32: F426 7680 BIC R6, R6, #0x0100 0x34180C36: 4581 CMP R9, R0 0x34180C38: F040 80DB BNE.W 46L66 ; 0x34180DF2 0x34180C3C: E0DE B 46L67 ; 0x34180DFC
.L47: 0x34180C3E: F446 5600 ORR R6, R6, #0x2000 0x34180C42: F446 6740 ORR R7, R6, #0x0C00
.L48: 0x34180C46: 1DE0 ADDS R0, R4, #7 0x34180C48: 43F9 MVNS R1, R7 0x34180C4A: F020 0007 BIC R0, R0, #7 0x34180C4E: 05FA LSLS R2, R7, #23 0x34180C50: F100 0408 ADD.W R4, R0, #8 0x34180C54: ED90 AB00 VLDR D10, [R0] 0x34180C58: BF58 IT PL 0x34180C5A: F04F 0906 MOVPL.W R9, #6 0x34180C5E: F411 6F40 TST R1, #0x0C00 0x34180C62: EA5F 911F CSET R1, EQ 0x34180C66: F1B9 0F00 CMP.W R9, #0 0x34180C6A: EEB7 9BCA VCVT.F32.F64 S18, D10 0x34180C6E: EA51 8909 CSEL R9, R1, R9, EQ 0x34180C72: EEB0 0A49 VMOV.F32 S0, S18 0x34180C76: F012 FF8A BL __SEGGER_RTL_float32_isinf ; 0x34193B8E 0x34180C7A: 9404 STR R4, [SP, #16] 0x34180C7C: B170 CBZ R0, .L50 ; 0x34180C9C 0x34180C7E: EEB4 AB4E VCMP.F64 D10, D14
.L49: 0x34180C82: EEF1 FA10 VMRS APSR_nzcv, FPSCR 0x34180C86: D519 BPL 46L51 ; 0x34180CBC 0x34180C88: 04B8 LSLS R0, R7, #18 0x34180C8A: F244 3178 MOVW R1, #0x4378 ; 0x34194378 = .rodata.libc..L.str.1 0x34180C8E: F244 307D MOVW R0, #0x437D ; 0x3419437D = .rodata.libc..L.str.2 0x34180C92: F2C3 4119 MOVT R1, #0x3419 ; 0x34194378 = .rodata.libc..L.str.1 0x34180C96: F2C3 4019 MOVT R0, #0x3419 ; 0x3419437D = .rodata.libc..L.str.2 0x34180C9A: E01F B 46L52 ; 0x34180CDC
.L50: 0x34180C9C: EEB0 0A49 VMOV.F32 S0, S18 0x34180CA0: F012 FF6E BL __SEGGER_RTL_float32_isnan ; 0x34193B80 0x34180CA4: 2800 CMP R0, #0 0x34180CA6: D042 BEQ 46L57 ; 0x34180D2E 0x34180CA8: 04B8 LSLS R0, R7, #18 0x34180CAA: F244 517C MOVW R1, #0x457C ; 0x3419457C = .rodata.libc..L.str.5 0x34180CAE: F244 5080 MOVW R0, #0x4580 ; 0x34194580 = .rodata.libc..L.str.6 0x34180CB2: F2C3 4119 MOVT R1, #0x3419 ; 0x3419457C = .rodata.libc..L.str.5 0x34180CB6: F2C3 4019 MOVT R0, #0x3419 ; 0x34194580 = .rodata.libc..L.str.6 0x34180CBA: E00F B 46L52 ; 0x34180CDC
.L51: 0x34180CBC: F244 3187 MOVW R1, #0x4387 ; 0x34194387 = .rodata.libc..L.str.4 0x34180CC0: F244 3282 MOVW R2, #0x4382 ; 0x34194382 = .rodata.libc..L.str.3 0x34180CC4: F2C3 4119 MOVT R1, #0x3419 ; 0x34194387 = .rodata.libc..L.str.4 0x34180CC8: 1C48 ADDS R0, R1, #1 0x34180CCA: F417 5F00 TST R7, #0x2000 0x34180CCE: F2C3 4219 MOVT R2, #0x3419 ; 0x34194382 = .rodata.libc..L.str.3 0x34180CD2: EA51 8102 CSEL R1, R1, R2, EQ 0x34180CD6: EA50 9002 CSINC R0, R0, R2, EQ 0x34180CDA: 06BA LSLS R2, R7, #26
.L52: 0x34180CDC: EA50 8051 CSEL R0, R0, R1, PL 0x34180CE0: F427 7680 BIC R6, R7, #0x0100
.L53: 0x34180CE4: F244 1106 MOVW R1, #0x4106 ; 0x34194106 = .rodata.libc..L.str 0x34180CE8: 2800 CMP R0, #0 0x34180CEA: F2C3 4119 MOVT R1, #0x3419 ; 0x34194106 = .rodata.libc..L.str 0x34180CEE: EA51 8400 CSEL R4, R1, R0, EQ 0x34180CF2: 05F0 LSLS R0, R6, #23 0x34180CF4: 4620 MOV R0, R4 0x34180CF6: D402 BMI 46L54 ; 0x34180CFE 0x34180CF8: F012 FFF8 BL strlen ; 0x34193CEC 0x34180CFC: E002 B 46L55 ; 0x34180D04
.L54: 0x34180CFE: 4649 MOV R1, R9 0x34180D00: F013 F983 BL strnlen ; 0x3419400A
.L55: 0x34180D04: F426 7600 BIC R6, R6, #0x0200 0x34180D08: EBA8 0800 SUB.W R8, R8, R0 0x34180D0C: 4605 MOV R5, R0 0x34180D0E: 4658 MOV R0, R11 0x34180D10: 4631 MOV R1, R6 0x34180D12: 4642 MOV R2, R8 0x34180D14: F013 F88F BL __SEGGER_RTL_pre_padding ; 0x34193E36 0x34180D18: 2D00 CMP R5, #0 0x34180D1A: F000 80D3 BEQ.W 46L77 ; 0x34180EC4
.L56: 0x34180D1E: F814 1B01 LDRB R1, [R4], #1 0x34180D22: 4658 MOV R0, R11 0x34180D24: F013 F835 BL __SEGGER_RTL_putc ; 0x34193D92 0x34180D28: 3D01 SUBS R5, #1 0x34180D2A: D1F8 BNE 46L56 ; 0x34180D1E 0x34180D2C: E0CA B 46L77 ; 0x34180EC4
.L57: 0x34180D2E: EEB0 0A49 VMOV.F32 S0, S18 0x34180D32: F013 F808 BL __SEGGER_RTL_float32_isnormal ; 0x34193D46 0x34180D36: 2800 CMP R0, #0 0x34180D38: FE0B AA09 VSELEQ.F32 S20, S22, S18 0x34180D3C: EEB0 0A4A VMOV.F32 S0, S20 0x34180D40: F013 F80D BL __SEGGER_RTL_float32_signbit ; 0x34193D5E 0x34180D44: EEB1 0A4A VNEG.F32 S0, S20 0x34180D48: 2800 CMP R0, #0 0x34180D4A: FE0A 9A00 VSELEQ.F32 S18, S20, S0 0x34180D4E: A805 ADD R0, SP, #20 0x34180D50: BF18 IT NE 0x34180D52: F047 0760 ORRNE R7, R7, #96 0x34180D56: EEB0 0A49 VMOV.F32 S0, S18 0x34180D5A: F013 F804 BL frexpf ; 0x34193D66 0x34180D5E: EEB5 AA40 VCMP.F32 S20, #0.0 0x34180D62: 9805 LDR R0, [SP, #20] 0x34180D64: F246 6167 MOVW R1, #0x6667 0x34180D68: F2C6 6166 MOVT R1, #0x6666 0x34180D6C: EB00 0040 ADD.W R0, R0, R0, LSL #1 0x34180D70: FB80 0101 SMULL R0, R1, R0, R1 0x34180D74: 1088 ASRS R0, R1, #2 0x34180D76: EEF1 FA10 VMRS APSR_nzcv, FPSCR 0x34180D7A: EB00 70D1 ADD.W R0, R0, R1, LSR #31 0x34180D7E: 9005 STR R0, [SP, #20] 0x34180D80: D016 BEQ 46L61 ; 0x34180DB0 0x34180D82: 3001 ADDS R0, #1
.L58: 0x34180D84: F012 FF27 BL __SEGGER_RTL_pow10f ; 0x34193BD6 0x34180D88: EEB4 9A40 VCMP.F32 S18, S0 0x34180D8C: 9805 LDR R0, [SP, #20] 0x34180D8E: EEF1 FA10 VMRS APSR_nzcv, FPSCR 0x34180D92: DD06 BLE 46L60 ; 0x34180DA2 0x34180D94: 1C41 ADDS R1, R0, #1 0x34180D96: 9105 STR R1, [SP, #20] 0x34180D98: 3002 ADDS R0, #2 0x34180D9A: E7F3 B 46L58 ; 0x34180D84
.L59: 0x34180D9C: 9805 LDR R0, [SP, #20] 0x34180D9E: 3801 SUBS R0, #1 0x34180DA0: 9005 STR R0, [SP, #20]
.L60: 0x34180DA2: F012 FF18 BL __SEGGER_RTL_pow10f ; 0x34193BD6 0x34180DA6: EEB4 9A40 VCMP.F32 S18, S0 0x34180DAA: EEF1 FA10 VMRS APSR_nzcv, FPSCR 0x34180DAE: D4F5 BMI 46L59 ; 0x34180D9C
.L61: 0x34180DB0: 9805 LDR R0, [SP, #20] 0x34180DB2: F407 6440 AND R4, R7, #0x0C00 0x34180DB6: F5B4 6F80 CMP.W R4, #0x0400 0x34180DBA: D007 BEQ 46L62 ; 0x34180DCC 0x34180DBC: F5B4 6F40 CMP.W R4, #0x0C00 0x34180DC0: D10A BNE 46L63 ; 0x34180DD8 0x34180DC2: 4581 CMP R9, R0 0x34180DC4: BFC8 IT GT 0x34180DC6: F110 0F05 CMNGT R0, #5 0x34180DCA: DC05 BGT 46L63 ; 0x34180DD8
.L62: 0x34180DCC: 2826 CMP R0, #38 0x34180DCE: F040 8084 BNE.W 46L78 ; 0x34180EDA 0x34180DD2: EE89 9A0C VDIV.F32 S18, S18, S24 0x34180DD6: E085 B 46L79 ; 0x34180EE4
.L63: 0x34180DD8: 0579 LSLS R1, R7, #21 0x34180DDA: F140 80B4 BPL.W 46L83 ; 0x34180F46 0x34180DDE: 280E CMP R0, #14 0x34180DE0: F340 8090 BLE.W 46L80 ; 0x34180F04 0x34180DE4: F04F 0900 MOV.W R9, #0 0x34180DE8: E0AD B 46L83 ; 0x34180F46
.L64: 0x34180DEA: 7001 STRB R1, [R0] 0x34180DEC: E515 B 46L1 ; 0x3418081A
.L65: 0x34180DEE: F426 7680 BIC R6, R6, #0x0100
.L66: 0x34180DF2: 2030 MOVS R0, #48 0x34180DF4: 2701 MOVS R7, #1 0x34180DF6: F88D 001A STRB.W R0, [SP, #26] 0x34180DFA: 2000 MOVS R0, #0
.L67: 0x34180DFC: 9003 STR R0, [SP, #12]
.L68: 0x34180DFE: EA54 0008 ORRS.W R0, R4, R8 0x34180E02: D01F BEQ 46L70 ; 0x34180E44 0x34180E04: 0920 LSRS R0, R4, #4 0x34180E06: EA40 7108 ORR.W R1, R0, R8, LSL #28 0x34180E0A: 04B0 LSLS R0, R6, #18 0x34180E0C: F244 525C MOVW R2, #0x455C ; 0x3419455C = __SEGGER_RTL_hex_uc 0x34180E10: F244 506C MOVW R0, #0x456C ; 0x3419456C = __SEGGER_RTL_hex_lc 0x34180E14: F2C3 4219 MOVT R2, #0x3419 ; 0x3419455C = __SEGGER_RTL_hex_uc 0x34180E18: F2C3 4019 MOVT R0, #0x3419 ; 0x3419456C = __SEGGER_RTL_hex_lc 0x34180E1C: F10D 031A ADD.W R3, SP, #26 0x34180E20: EA50 8052 CSEL R0, R0, R2, PL
.L69: 0x34180E24: F004 020F AND R2, R4, #15 0x34180E28: 460C MOV R4, R1 0x34180E2A: EA51 1118 ORRS.W R1, R1, R8, LSR #4 0x34180E2E: EA4F 1818 LSR.W R8, R8, #4 0x34180E32: 5C82 LDRB R2, [R0, R2] 0x34180E34: EA4F 1114 LSR.W R1, R4, #4 0x34180E38: EA41 7108 ORR.W R1, R1, R8, LSL #28 0x34180E3C: 55DA STRB R2, [R3, R7] 0x34180E3E: F107 0701 ADD.W R7, R7, #1 0x34180E42: D1EF BNE 46L69 ; 0x34180E24
.L70: 0x34180E44: 464B MOV R3, R9
.L71: 0x34180E46: 1BD8 SUBS R0, R3, R7 0x34180E48: E9DD 1502 LDRD R1, R5, [SP, #8] 0x34180E4C: 2DFF CMP R5, #255 0x34180E4E: EA20 79E0 BIC.W R9, R0, R0, ASR #31 0x34180E52: EB07 0009 ADD.W R0, R7, R9 0x34180E56: EBA1 0800 SUB.W R8, R1, R0 0x34180E5A: 4640 MOV R0, R8 0x34180E5C: BF88 IT HI 0x34180E5E: 3801 SUBHI R0, #1 0x34180E60: 2D00 CMP R5, #0 0x34180E62: BF18 IT NE 0x34180E64: F1A0 0801 SUBNE.W R8, R0, #1 0x34180E68: F416 7F04 TST R6, #0x0210 0x34180E6C: D106 BNE 46L72 ; 0x34180E7C 0x34180E6E: 4658 MOV R0, R11 0x34180E70: 4631 MOV R1, R6 0x34180E72: 4642 MOV R2, R8 0x34180E74: F012 FFDF BL __SEGGER_RTL_pre_padding ; 0x34193E36 0x34180E78: F04F 0800 MOV.W R8, #0
.L72: 0x34180E7C: 2DFF CMP R5, #255 0x34180E7E: D906 BLS 46L73 ; 0x34180E8E 0x34180E80: 0A29 LSRS R1, R5, #8 0x34180E82: 4658 MOV R0, R11 0x34180E84: F012 FF85 BL __SEGGER_RTL_putc ; 0x34193D92 0x34180E88: F10D 041A ADD.W R4, SP, #26 0x34180E8C: E002 B 46L74 ; 0x34180E94
.L73: 0x34180E8E: F10D 041A ADD.W R4, SP, #26 0x34180E92: B11D CBZ R5, .L75 ; 0x34180E9C
.L74: 0x34180E94: 4658 MOV R0, R11 0x34180E96: 4629 MOV R1, R5 0x34180E98: F012 FF7B BL __SEGGER_RTL_putc ; 0x34193D92
.L75: 0x34180E9C: 4658 MOV R0, R11 0x34180E9E: 4631 MOV R1, R6 0x34180EA0: 4642 MOV R2, R8 0x34180EA2: F012 FFC8 BL __SEGGER_RTL_pre_padding ; 0x34193E36 0x34180EA6: 4658 MOV R0, R11 0x34180EA8: 2130 MOVS R1, #48 0x34180EAA: 464A MOV R2, R9 0x34180EAC: F012 FFB3 BL __SEGGER_RTL_print_padding ; 0x34193E16 0x34180EB0: 2F01 CMP R7, #1 0x34180EB2: DB07 BLT 46L77 ; 0x34180EC4
.L76: 0x34180EB4: 463D MOV R5, R7 0x34180EB6: 3F01 SUBS R7, #1 0x34180EB8: 4658 MOV R0, R11 0x34180EBA: 5DE1 LDRB R1, [R4, R7] 0x34180EBC: F012 FF69 BL __SEGGER_RTL_putc ; 0x34193D92 0x34180EC0: 2D01 CMP R5, #1 0x34180EC2: D8F7 BHI 46L76 ; 0x34180EB4
.L77: 0x34180EC4: 9C04 LDR R4, [SP, #16] 0x34180EC6: 06F0 LSLS R0, R6, #27 0x34180EC8: F57F ACA7 BPL.W 46L1 ; 0x3418081A 0x34180ECC: 4658 MOV R0, R11 0x34180ECE: 2120 MOVS R1, #32 0x34180ED0: 4642 MOV R2, R8 0x34180ED2: F012 FFA0 BL __SEGGER_RTL_print_padding ; 0x34193E16 0x34180ED6: F7FF BCA0 B.W 46L1 ; 0x3418081A
.L78: 0x34180EDA: 4240 RSBS R0, R0, #0 0x34180EDC: F012 FE7B BL __SEGGER_RTL_pow10f ; 0x34193BD6 0x34180EE0: EE29 9A00 VMUL.F32 S18, S18, S0
.L79: 0x34180EE4: EEB5 9A40 VCMP.F32 S18, #0.0 0x34180EE8: EEF1 FA10 VMRS APSR_nzcv, FPSCR 0x34180EEC: F000 80AC BEQ.W 46L92 ; 0x34181048 0x34180EF0: EEB0 0A49 VMOV.F32 S0, S18 0x34180EF4: F012 FE4B BL __SEGGER_RTL_float32_isinf ; 0x34193B8E 0x34180EF8: 2800 CMP R0, #0 0x34180EFA: F000 8088 BEQ.W 46L88 ; 0x3418100E 0x34180EFE: EEB5 9A40 VCMP.F32 S18, #0.0 0x34180F02: E6BE B 46L49 ; 0x34180C82
.L80: 0x34180F04: 43C1 MVNS R1, R0 0x34180F06: 2210 MOVS R2, #16 0x34180F08: 4449 ADD R1, R9 0x34180F0A: 2910 CMP R1, #16 0x34180F0C: EA51 89B2 CSEL R9, R1, R2, LT 0x34180F10: 063A LSLS R2, R7, #24 0x34180F12: D418 BMI 46L83 ; 0x34180F46 0x34180F14: B1B9 CBZ R1, .L83 ; 0x34180F46
.L81: 0x34180F16: 4648 MOV R0, R9 0x34180F18: F012 FE5D BL __SEGGER_RTL_pow10f ; 0x34193BD6 0x34180F1C: EEB6 1A00 VMOV.F32 S2, #0.5 0x34180F20: EE09 1A00 VMLA.F32 S2, S18, S0 0x34180F24: EEB0 0A41 VMOV.F32 S0, S2 0x34180F28: F00C FC4A BL floorf ; 0x3418D7C0 0x34180F2C: EEF0 0A48 VMOV.F32 S1, S16 0x34180F30: F00C FBB8 BL fmodf ; 0x3418D6A4 0x34180F34: EEB5 0A40 VCMP.F32 S0, #0.0 0x34180F38: EEF1 FA10 VMRS APSR_nzcv, FPSCR 0x34180F3C: D102 BNE 46L82 ; 0x34180F44 0x34180F3E: F1B9 0901 SUBS.W R9, R9, #1 0x34180F42: D1E8 BNE 46L81 ; 0x34180F16
.L82: 0x34180F44: 9805 LDR R0, [SP, #20]
.L83: 0x34180F46: F1C9 0100 RSB R1, R9, #0 0x34180F4A: 3810 SUBS R0, #16 0x34180F4C: 4288 CMP R0, R1 0x34180F4E: EA50 B0C9 CSNEG R0, R0, R9, GT 0x34180F52: F012 FE40 BL __SEGGER_RTL_pow10f ; 0x34193BD6 0x34180F56: F04F 30FF MOV.W R0, #0xFFFFFFFF 0x34180F5A: F012 FE21 BL ldexpf ; 0x34193BA0 0x34180F5E: 9805 LDR R0, [SP, #20] 0x34180F60: EE39 9A00 VADD.F32 S18, S18, S0 0x34180F64: 3001 ADDS R0, #1 0x34180F66: F012 FE36 BL __SEGGER_RTL_pow10f ; 0x34193BD6 0x34180F6A: EEB4 9A40 VCMP.F32 S18, S0 0x34180F6E: 9805 LDR R0, [SP, #20] 0x34180F70: EEF1 FA10 VMRS APSR_nzcv, FPSCR 0x34180F74: 4645 MOV R5, R8 0x34180F76: EA50 90B0 CINC R0, R0, GE 0x34180F7A: 2800 CMP R0, #0 0x34180F7C: D413 BMI 46L84 ; 0x34180FA6 0x34180F7E: 2811 CMP R0, #17 0x34180F80: D315 BCC 46L85 ; 0x34180FAE 0x34180F82: F1A0 0110 SUB.W R1, R0, #16 0x34180F86: F1C0 0010 RSB R0, R0, #16 0x34180F8A: 9105 STR R1, [SP, #20] 0x34180F8C: F012 FE23 BL __SEGGER_RTL_pow10f ; 0x34193BD6 0x34180F90: EE29 0A00 VMUL.F32 S0, S18, S0 0x34180F94: EE10 0A10 VMOV R0, S0 0x34180F98: F012 FCF0 BL __aeabi_f2ulz ; 0x3419397C 0x34180F9C: 4604 MOV R4, R0 0x34180F9E: 460E MOV R6, R1 0x34180FA0: EEB0 9A4B VMOV.F32 S18, S22 0x34180FA4: E011 B 46L86 ; 0x34180FCA
.L84: 0x34180FA6: E89F 0050 CLRM 123R4, R6} 0x34180FAA: 9405 STR R4, [SP, #20] 0x34180FAC: E00D B 46L86 ; 0x34180FCA
.L85: 0x34180FAE: 2000 MOVS R0, #0 0x34180FB0: 9005 STR R0, [SP, #20] 0x34180FB2: EE19 0A10 VMOV R0, S18 0x34180FB6: F012 FCE1 BL __aeabi_f2ulz ; 0x3419397C 0x34180FBA: 4604 MOV R4, R0 0x34180FBC: 460E MOV R6, R1 0x34180FBE: F00C FC3F BL __aeabi_ul2f ; 0x3418D840 0x34180FC2: EE00 0A10 VMOV S0, R0 0x34180FC6: EE39 9A40 VSUB.F32 S18, S18, S0
.L86: 0x34180FCA: F240 7050 MOVW R0, #0x0750 ; 0x34180750 = __SEGGER_RTL_ipow10 0x34180FCE: F427 6C80 BIC R12, R7, #0x0400 0x34180FD2: F2C3 4018 MOVT R0, #0x3418 ; 0x34180750 = __SEGGER_RTL_ipow10 0x34180FD6: 2101 MOVS R1, #1 0x34180FD8: 3008 ADDS R0, #8
.L87: 0x34180FDA: C80C LDM R0!, {R2-R3} 0x34180FDC: 4688 MOV R8, R1 0x34180FDE: 1AA1 SUBS R1, R4, R2 0x34180FE0: EB76 0103 SBCS.W R1, R6, R3 0x34180FE4: F108 0101 ADD.W R1, R8, #1 0x34180FE8: D2F7 BCS 46L87 ; 0x34180FDA 0x34180FEA: F007 0080 AND R0, R7, #128 0x34180FEE: 9905 LDR R1, [SP, #20] 0x34180FF0: EA40 0009 ORR.W R0, R0, R9 0x34180FF4: F017 0F60 TST R7, #96 0x34180FF8: BF18 IT NE 0x34180FFA: 3D01 SUBNE R5, #1 0x34180FFC: 2800 CMP R0, #0 0x34180FFE: EB09 0008 ADD.W R0, R9, R8 0x34181002: 4408 ADD R0, R1 0x34181004: BF18 IT NE 0x34181006: 3D01 SUBNE R5, #1 0x34181008: 4667 MOV R7, R12 0x3418100A: 1A29 SUBS R1, R5, R0 0x3418100C: E0C9 B 46L97 ; 0x341811A2
.L88: 0x3418100E: EEB4 9A48 VCMP.F32 S18, S16 0x34181012: 9805 LDR R0, [SP, #20] 0x34181014: EEF1 FA10 VMRS APSR_nzcv, FPSCR 0x34181018: DB08 BLT 46L90 ; 0x3418102C
.L89: 0x3418101A: EE89 9A08 VDIV.F32 S18, S18, S16 0x3418101E: 3001 ADDS R0, #1 0x34181020: EEB4 9A48 VCMP.F32 S18, S16 0x34181024: EEF1 FA10 VMRS APSR_nzcv, FPSCR 0x34181028: DAF7 BGE 46L89 ; 0x3418101A 0x3418102A: 9005 STR R0, [SP, #20]
.L90: 0x3418102C: EEB4 9A4D VCMP.F32 S18, S26 0x34181030: EEF1 FA10 VMRS APSR_nzcv, FPSCR 0x34181034: D508 BPL 46L92 ; 0x34181048
.L91: 0x34181036: EE29 9A08 VMUL.F32 S18, S18, S16 0x3418103A: 3801 SUBS R0, #1 0x3418103C: EEB4 9A4D VCMP.F32 S18, S26 0x34181040: EEF1 FA10 VMRS APSR_nzcv, FPSCR 0x34181044: D4F7 BMI 46L91 ; 0x34181036 0x34181046: 9005 STR R0, [SP, #20]
.L92: 0x34181048: 4648 MOV R0, R9 0x3418104A: F5B4 6F40 CMP.W R4, #0x0C00 0x3418104E: BF08 IT EQ 0x34181050: 3801 SUBEQ R0, #1 0x34181052: F1B9 0F00 CMP.W R9, #0 0x34181056: EA50 8419 CSEL R4, R0, R9, NE 0x3418105A: 4681 MOV R9, R0 0x3418105C: 4260 RSBS R0, R4, #0 0x3418105E: F012 FDBA BL __SEGGER_RTL_pow10f ; 0x34193BD6 0x34181062: F04F 30FF MOV.W R0, #0xFFFFFFFF 0x34181066: F012 FD9B BL ldexpf ; 0x34193BA0 0x3418106A: EE39 9A00 VADD.F32 S18, S18, S0 0x3418106E: EEB4 9A48 VCMP.F32 S18, S16 0x34181072: EEF1 FA10 VMRS APSR_nzcv, FPSCR 0x34181076: BFA1 ITTTT GE 0x34181078: EE89 9A08 VDIVGE.F32 S18, S18, S16 0x3418107C: 9805 LDRGE R0, [SP, #20] 0x3418107E: 3001 ADDGE R0, #1 0x34181080: 9005 STRGE R0, [SP, #20] 0x34181082: 2C00 CMP R4, #0 0x34181084: D044 BEQ 46L94 ; 0x34181110 0x34181086: F407 6008 AND R0, R7, #0x0880 0x3418108A: F5B0 6F00 CMP.W R0, #0x0800 0x3418108E: D141 BNE 46L95 ; 0x34181114 0x34181090: 2010 MOVS R0, #16 0x34181092: 2C10 CMP R4, #16 0x34181094: EA54 89B0 CSEL R9, R4, R0, LT 0x34181098: 4648 MOV R0, R9 0x3418109A: F012 FD9C BL __SEGGER_RTL_pow10f ; 0x34193BD6 0x3418109E: EE29 0A00 VMUL.F32 S0, S18, S0 0x341810A2: EE10 0A10 VMOV R0, S0 0x341810A6: F012 FC69 BL __aeabi_f2ulz ; 0x3419397C 0x341810AA: 4604 MOV R4, R0 0x341810AC: 4308 ORRS R0, R1 0x341810AE: D02F BEQ 46L94 ; 0x34181110 0x341810B0: F64C 42CD MOVW R2, #0xCCCD 0x341810B4: 460D MOV R5, R1 0x341810B6: F6CC 42CC MOVT R2, #0xCCCC 0x341810BA: 1E53 SUBS R3, R2, #1 0x341810BC: FBA4 0102 UMULL R0, R1, R4, R2 0x341810C0: FB04 1103 MLA R1, R4, R3, R1 0x341810C4: FB05 1102 MLA R1, R5, R2, R1 0x341810C8: 07CA LSLS R2, R1, #31 0x341810CA: EA42 0250 ORR.W R2, R2, R0, LSR #1 0x341810CE: 07C0 LSLS R0, R0, #31 0x341810D0: EA40 0051 ORR.W R0, R0, R1, LSR #1 0x341810D4: F1D2 3199 RSBS R1, R2, #0x99999999 0x341810D8: F649 1199 MOVW R1, #0x9999 0x341810DC: F6C1 1199 MOVT R1, #0x1999 0x341810E0: EB71 0000 SBCS.W R0, R1, R0 0x341810E4: D316 BCC 46L95 ; 0x34181114
.L93: 0x341810E6: 4620 MOV R0, R4 0x341810E8: 4629 MOV R1, R5 0x341810EA: 220A MOVS R2, #10 0x341810EC: 2300 MOVS R3, #0 0x341810EE: F1A9 0901 SUB.W R9, R9, #1 0x341810F2: F012 FC63 BL __aeabi_uldivmod ; 0x341939BC 0x341810F6: 220A MOVS R2, #10 0x341810F8: 2300 MOVS R3, #0 0x341810FA: 4604 MOV R4, R0 0x341810FC: 460D MOV R5, R1 0x341810FE: F012 FC5D BL __aeabi_uldivmod ; 0x341939BC 0x34181102: F1B9 0F00 CMP.W R9, #0 0x34181106: D005 BEQ 46L95 ; 0x34181114 0x34181108: EA52 0003 ORRS.W R0, R2, R3 0x3418110C: D0EB BEQ 46L93 ; 0x341810E6 0x3418110E: E001 B 46L95 ; 0x34181114
.L94: 0x34181110: F04F 0900 MOV.W R9, #0
.L95: 0x34181114: EBA8 0009 SUB.W R0, R8, R9 0x34181118: F007 0180 AND R1, R7, #128 0x3418111C: 1F45 SUBS R5, R0, #5 0x3418111E: EA51 0109 ORRS.W R1, R1, R9 0x34181122: BF18 IT NE 0x34181124: 1F85 SUBNE R5, R0, #6 0x34181126: 9805 LDR R0, [SP, #20] 0x34181128: F04F 0801 MOV.W R8, #1 0x3418112C: 04F9 LSLS R1, R7, #19 0x3418112E: D520 BPL 46L96 ; 0x34181172 0x34181130: F245 5156 MOVW R1, #0x5556 0x34181134: F2C5 5155 MOVT R1, #0x5555 0x34181138: EEB0 0A48 VMOV.F32 S0, S16 0x3418113C: FB80 1201 SMULL R1, R2, R0, R1 0x34181140: EB02 71D2 ADD.W R1, R2, R2, LSR #31 0x34181144: EB01 0141 ADD.W R1, R1, R1, LSL #1 0x34181148: 1A43 SUBS R3, R0, R1 0x3418114A: 2102 MOVS R1, #2 0x3418114C: 1ECA SUBS R2, R1, #3 0x3418114E: 3302 ADDS R3, #2 0x34181150: E8DF F003 TBB 91PC, R3] 0x34181154: 07 DC.B 0x07 ; '\x07' 0x34181155: 03 DC.B 0x03 ; '\x03' 0x34181156: 0D DC.B 0x0D ; '\r' 0x34181157: 07 DC.B 0x07 ; '\x07' 0x34181158: 03 DC.B 0x03 ; '\x03' 0x34181159: 00 DC.B 0x00 ; '\0' 0x3418115A: ED9F 0A9B VLDR S0, =0x42C80000 ; [PC, #0x026C] [0x341813C8] 0x3418115E: 2103 MOVS R1, #3 0x34181160: 1F4A SUBS R2, R1, #5 0x34181162: EE29 9A00 VMUL.F32 S18, S18, S0 0x34181166: 4410 ADD R0, R2 0x34181168: 4415 ADD R5, R2 0x3418116A: 4688 MOV R8, R1 0x3418116C: 9005 STR R0, [SP, #20] 0x3418116E: EA29 79E9 BIC.W R9, R9, R9, ASR #31
.L96: 0x34181172: F017 0F60 TST R7, #96 0x34181176: F427 6700 BIC R7, R7, #0x0800 0x3418117A: BF18 IT NE 0x3418117C: 3D01 SUBNE R5, #1 0x3418117E: F012 FE04 BL abs ; 0x34193D8A 0x34181182: 2863 CMP R0, #99 0x34181184: EE19 0A10 VMOV R0, S18 0x34181188: BFC8 IT GT 0x3418118A: 3D01 SUBGT R5, #1 0x3418118C: F012 FBF6 BL __aeabi_f2ulz ; 0x3419397C 0x34181190: 4604 MOV R4, R0 0x34181192: 460E MOV R6, R1 0x34181194: F00C FB54 BL __aeabi_ul2f ; 0x3418D840 0x34181198: EE00 0A10 VMOV S0, R0 0x3418119C: 4629 MOV R1, R5 0x3418119E: EE39 9A40 VSUB.F32 S18, S18, S0
.L97: 0x341811A2: EA21 75E1 BIC.W R5, R1, R1, ASR #31 0x341811A6: F417 7F04 TST R7, #0x0210 0x341811AA: D107 BNE 46L99 ; 0x341811BC 0x341811AC: 2901 CMP R1, #1 0x341811AE: DB05 BLT 46L99 ; 0x341811BC
.L98: 0x341811B0: 4658 MOV R0, R11 0x341811B2: 2120 MOVS R1, #32 0x341811B4: F012 FDED BL __SEGGER_RTL_putc ; 0x34193D92 0x341811B8: 3D01 SUBS R5, #1 0x341811BA: D1F9 BNE 46L98 ; 0x341811B0
.L99: 0x341811BC: 06B8 LSLS R0, R7, #26 0x341811BE: EA4F 6047 LSL.W R0, R7, #25 0x341811C2: D403 BMI 46L100 ; 0x341811CC 0x341811C4: 2800 CMP R0, #0 0x341811C6: D508 BPL 46L102 ; 0x341811DA 0x341811C8: 2120 MOVS R1, #32 0x341811CA: E003 B 46L101 ; 0x341811D4
.L100: 0x341811CC: 212D MOVS R1, #45 0x341811CE: 2800 CMP R0, #0 0x341811D0: BF58 IT PL 0x341811D2: 212B MOVPL R1, #43
.L101: 0x341811D4: 4658 MOV R0, R11 0x341811D6: F012 FDDC BL __SEGGER_RTL_putc ; 0x34193D92
.L102: 0x341811DA: 06F8 LSLS R0, R7, #27 0x341811DC: 9703 STR R7, [SP, #12] 0x341811DE: D406 BMI 46L104 ; 0x341811EE 0x341811E0: B12D CBZ R5, .L104 ; 0x341811EE
.L103: 0x341811E2: 4658 MOV R0, R11 0x341811E4: 2130 MOVS R1, #48 0x341811E6: F012 FDD4 BL __SEGGER_RTL_putc ; 0x34193D92 0x341811EA: 3D01 SUBS R5, #1 0x341811EC: D1F9 BNE 46L103 ; 0x341811E2
.L104: 0x341811EE: F240 7050 MOVW R0, #0x0750 ; 0x34180750 = __SEGGER_RTL_ipow10 0x341811F2: F2C3 4018 MOVT R0, #0x3418 ; 0x34180750 = __SEGGER_RTL_ipow10 0x341811F6: EB00 07C8 ADD.W R7, R0, R8, LSL #3
.L105: 0x341811FA: E977 0102 LDRD R0, R1, [R7, #-8]! 0x341811FE: 1A22 SUBS R2, R4, R0 0x34181200: EB76 0201 SBCS.W R2, R6, R1 0x34181204: D201 BCS 46L106 ; 0x3418120A 0x34181206: 2130 MOVS R1, #48 0x34181208: E008 B 46L108 ; 0x3418121C
.L106: 0x3418120A: 2230 MOVS R2, #48
.L107: 0x3418120C: 1A24 SUBS R4, R4, R0 0x3418120E: 418E SBCS R6, R1 0x34181210: 3201 ADDS R2, #1 0x34181212: 1A23 SUBS R3, R4, R0 0x34181214: EB76 0301 SBCS.W R3, R6, R1 0x34181218: D2F8 BCS 46L107 ; 0x3418120C 0x3418121A: B2D1 UXTB R1, R2
.L108: 0x3418121C: 4658 MOV R0, R11 0x3418121E: F012 FDB8 BL __SEGGER_RTL_putc ; 0x34193D92 0x34181222: F1B8 0801 SUBS.W R8, R8, #1 0x34181226: D1E8 BNE 46L105 ; 0x341811FA 0x34181228: 9E03 LDR R6, [SP, #12] 0x3418122A: 0534 LSLS R4, R6, #20 0x3418122C: D50B BPL 46L110 ; 0x34181246 0x3418122E: 9805 LDR R0, [SP, #20] 0x34181230: 2801 CMP R0, #1 0x34181232: DB08 BLT 46L110 ; 0x34181246
.L109: 0x34181234: 3801 SUBS R0, #1 0x34181236: 9005 STR R0, [SP, #20] 0x34181238: 4658 MOV R0, R11 0x3418123A: 2130 MOVS R1, #48 0x3418123C: F012 FDA9 BL __SEGGER_RTL_putc ; 0x34193D92 0x34181240: 9805 LDR R0, [SP, #20] 0x34181242: 2800 CMP R0, #0 0x34181244: DCF6 BGT 46L109 ; 0x34181234
.L110: 0x34181246: F006 0080 AND R0, R6, #128 0x3418124A: EA50 0009 ORRS.W R0, R0, R9 0x3418124E: D045 BEQ 46L117 ; 0x341812DC 0x34181250: 4658 MOV R0, R11 0x34181252: 212E MOVS R1, #46 0x34181254: F012 FD9D BL __SEGGER_RTL_putc ; 0x34193D92 0x34181258: EA29 70E9 BIC.W R0, R9, R9, ASR #31 0x3418125C: 2110 MOVS R1, #16 0x3418125E: 2810 CMP R0, #16 0x34181260: EA50 80B1 CSEL R0, R0, R1, LT 0x34181264: 9905 LDR R1, [SP, #20] 0x34181266: 9002 STR R0, [SP, #8] 0x34181268: 2C00 CMP R4, #0 0x3418126A: BF48 IT MI 0x3418126C: 1A40 SUBMI R0, R0, R1 0x3418126E: F012 FCB2 BL __SEGGER_RTL_pow10f ; 0x34193BD6 0x34181272: F1B9 0F01 CMP.W R9, #1 0x34181276: DB26 BLT 46L115 ; 0x341812C6 0x34181278: EE29 0A00 VMUL.F32 S0, S18, S0 0x3418127C: EE10 0A10 VMOV R0, S0 0x34181280: F012 FB7C BL __aeabi_f2ulz ; 0x3419397C 0x34181284: F8DD 8008 LDR.W R8, [SP, #8] 0x34181288: 4604 MOV R4, R0 0x3418128A: F240 7050 MOVW R0, #0x0750 ; 0x34180750 = __SEGGER_RTL_ipow10 0x3418128E: 460E MOV R6, R1 0x34181290: F2C3 4018 MOVT R0, #0x3418 ; 0x34180750 = __SEGGER_RTL_ipow10 0x34181294: EB00 07C8 ADD.W R7, R0, R8, LSL #3
.L111: 0x34181298: E977 0102 LDRD R0, R1, [R7, #-8]! 0x3418129C: 1A22 SUBS R2, R4, R0 0x3418129E: EB76 0201 SBCS.W R2, R6, R1 0x341812A2: D201 BCS 46L112 ; 0x341812A8 0x341812A4: 2130 MOVS R1, #48 0x341812A6: E008 B 46L114 ; 0x341812BA
.L112: 0x341812A8: 2230 MOVS R2, #48
.L113: 0x341812AA: 1A24 SUBS R4, R4, R0 0x341812AC: 418E SBCS R6, R1 0x341812AE: 3201 ADDS R2, #1 0x341812B0: 1A23 SUBS R3, R4, R0 0x341812B2: EB76 0301 SBCS.W R3, R6, R1 0x341812B6: D2F8 BCS 46L113 ; 0x341812AA 0x341812B8: B2D1 UXTB R1, R2
.L114: 0x341812BA: 4658 MOV R0, R11 0x341812BC: F012 FD69 BL __SEGGER_RTL_putc ; 0x34193D92 0x341812C0: F1B8 0801 SUBS.W R8, R8, #1 0x341812C4: D1E8 BNE 46L111 ; 0x34181298
.L115: 0x341812C6: E9DD 0602 LDRD R0, R6, [SP, #8] 0x341812CA: EBB9 0400 SUBS.W R4, R9, R0 0x341812CE: D005 BEQ 46L117 ; 0x341812DC
.L116: 0x341812D0: 4658 MOV R0, R11 0x341812D2: 2130 MOVS R1, #48 0x341812D4: F012 FD5D BL __SEGGER_RTL_putc ; 0x34193D92 0x341812D8: 3C01 SUBS R4, #1 0x341812DA: D1F9 BNE 46L116 ; 0x341812D0
.L117: 0x341812DC: 0570 LSLS R0, R6, #21 0x341812DE: D54A BPL 46L121 ; 0x34181376 0x341812E0: 2145 MOVS R1, #69 0x341812E2: 04B0 LSLS R0, R6, #18 0x341812E4: 4658 MOV R0, R11 0x341812E6: BF58 IT PL 0x341812E8: 2165 MOVPL R1, #101 0x341812EA: F012 FD52 BL __SEGGER_RTL_putc ; 0x34193D92 0x341812EE: 9805 LDR R0, [SP, #20] 0x341812F0: 2800 CMP R0, #0 0x341812F2: 4658 MOV R0, R11 0x341812F4: DB04 BLT 46L118 ; 0x34181300 0x341812F6: 212B MOVS R1, #43 0x341812F8: F012 FD4B BL __SEGGER_RTL_putc ; 0x34193D92 0x341812FC: 9805 LDR R0, [SP, #20] 0x341812FE: E005 B 46L119 ; 0x3418130C
.L118: 0x34181300: 212D MOVS R1, #45 0x34181302: F012 FD46 BL __SEGGER_RTL_putc ; 0x34193D92 0x34181306: 9805 LDR R0, [SP, #20] 0x34181308: 4240 RSBS R0, R0, #0 0x3418130A: 9005 STR R0, [SP, #20]
.L119: 0x3418130C: 2864 CMP R0, #100 0x3418130E: DB15 BLT 46L120 ; 0x3418133C 0x34181310: F248 541F MOVW R4, #0x851F 0x34181314: F2C5 14EB MOVT R4, #0x51EB 0x34181318: FBA0 0104 UMULL R0, R1, R0, R4 0x3418131C: 2030 MOVS R0, #48 0x3418131E: EB00 1151 ADD.W R1, R0, R1, LSR #5 0x34181322: 4658 MOV R0, R11 0x34181324: F012 FD35 BL __SEGGER_RTL_putc ; 0x34193D92 0x34181328: 9805 LDR R0, [SP, #20] 0x3418132A: FB80 1204 SMULL R1, R2, R0, R4 0x3418132E: 1151 ASRS R1, R2, #5 0x34181330: EB01 71D2 ADD.W R1, R1, R2, LSR #31 0x34181334: 2264 MOVS R2, #100 0x34181336: FB01 0012 MLS R0, R1, R2, R0 0x3418133A: 9005 STR R0, [SP, #20]
.L120: 0x3418133C: F246 6467 MOVW R4, #0x6667 0x34181340: F2C6 6466 MOVT R4, #0x6666 0x34181344: FB80 0104 SMULL R0, R1, R0, R4 0x34181348: 1088 ASRS R0, R1, #2 0x3418134A: EB00 70D1 ADD.W R0, R0, R1, LSR #31 0x3418134E: F100 0130 ADD.W R1, R0, #48 0x34181352: 4658 MOV R0, R11 0x34181354: F012 FD1D BL __SEGGER_RTL_putc ; 0x34193D92 0x34181358: 9805 LDR R0, [SP, #20] 0x3418135A: FB80 1204 SMULL R1, R2, R0, R4 0x3418135E: 1091 ASRS R1, R2, #2 0x34181360: EB01 71D2 ADD.W R1, R1, R2, LSR #31 0x34181364: EB01 0181 ADD.W R1, R1, R1, LSL #2 0x34181368: EBA0 0041 SUB.W R0, R0, R1, LSL #1 0x3418136C: F100 0130 ADD.W R1, R0, #48 0x34181370: 4658 MOV R0, R11 0x34181372: F012 FD0E BL __SEGGER_RTL_putc ; 0x34193D92
.L121: 0x34181376: 9C04 LDR R4, [SP, #16] 0x34181378: B90D CBNZ R5, .L122 ; 0x3418137E 0x3418137A: F02F C5B3 LE 46L1 ; 0x3418081A
.L122: 0x3418137E: 4658 MOV R0, R11 0x34181380: 2120 MOVS R1, #32 0x34181382: F012 FD06 BL __SEGGER_RTL_putc ; 0x34193D92 0x34181386: 3D01 SUBS R5, #1 0x34181388: D1F9 BNE 46L122 ; 0x3418137E 0x3418138A: F7FF BA46 B.W 46L1 ; 0x3418081A
.L123: 0x3418138E: F8DB 000C LDR.W R0, [R11, #12] 0x34181392: B128 CBZ R0, .L124 ; 0x341813A0 0x34181394: E9DB 1200 LDRD R1, R2, [R11] 0x34181398: 4291 CMP R1, R2 0x3418139A: BF3C ITT CC 0x3418139C: 2200 MOVCC R2, #0 0x3418139E: 5442 STRBCC R2, [R0, R1]
.L124: 0x341813A0: 4658 MOV R0, R11 0x341813A2: F012 FC35 BL __SEGGER_RTL_prin_flush ; 0x34193C10 0x341813A6: F8DB 0000 LDR.W R0, [R11]
.L125: 0x341813AA: B00C ADD SP, SP, #48 0x341813AC: ECBD 8B0E VLDM SP!, {D8-D14} 0x341813B0: E8BD 8FF8 POP.W 123R3-R11, PC}
.L126: 0x341813B4: B108 CBZ R0, .L127 ; 0x341813BA 0x341813B6: F02F C5D1 LE 46L1 ; 0x3418081A
.L127: 0x341813BA: 4658 MOV R0, R11 0x341813BC: F012 FC28 BL __SEGGER_RTL_prin_flush ; 0x34193C10 0x341813C0: F04F 30FF MOV.W R0, #0xFFFFFFFF 0x341813C4: E7F1 B 46L125 ; 0x341813AA 0x341813C6: BF00 NOP 0x341813C8: 42C80000 DC.W 0x42C80000

Section .text.main from blto2_FSBL_lto.o, size=360, align=4


main: 0x341813CC: B580 PUSH 123R7, LR} 0x341813CE: B088 SUB SP, SP, #32 0x341813D0: 2000 MOVS R0, #0 0x341813D2: 9004 STR R0, [SP, #16] 0x341813D4: F64E 5014 MOVW R0, #0xED14 0x341813D8: F2CE 0000 MOVT R0, #0xE000 0x341813DC: 6800 LDR R0, [R0] 0x341813DE: 0380 LSLS R0, R0, #14 0x341813E0: 2800 CMP R0, #0 0x341813E2: D500 BPL 46L1 ; 0x341813E6 0x341813E4: E019 B 46L2 ; 0x3418141A
.L1: 0x341813E6: F3BF 8F4F DSB SY 0x341813EA: F3BF 8F6F ISB SY 0x341813EE: F64E 7150 MOVW R1, #0xEF50 0x341813F2: F2CE 0100 MOVT R1, #0xE000 0x341813F6: 2000 MOVS R0, #0 0x341813F8: 6008 STR R0, [R1] 0x341813FA: F3BF 8F4F DSB SY 0x341813FE: F3BF 8F6F ISB SY 0x34181402: F64E 5114 MOVW R1, #0xED14 0x34181406: F2CE 0100 MOVT R1, #0xE000 0x3418140A: 6808 LDR R0, [R1] 0x3418140C: F440 3000 ORR R0, R0, #0x020000 0x34181410: 6008 STR R0, [R1] 0x34181412: F3BF 8F4F DSB SY 0x34181416: F3BF 8F6F ISB SY
.L2: 0x3418141A: F64E 5014 MOVW R0, #0xED14 0x3418141E: F2CE 0000 MOVT R0, #0xE000 0x34181422: 6800 LDR R0, [R0] 0x34181424: 03C0 LSLS R0, R0, #15 0x34181426: 2800 CMP R0, #0 0x34181428: D500 BPL 46L3 ; 0x3418142C 0x3418142A: E039 B 46L8 ; 0x341814A0
.L3: 0x3418142C: F64E 5184 MOVW R1, #0xED84 0x34181430: F2CE 0100 MOVT R1, #0xE000 0x34181434: 2000 MOVS R0, #0 0x34181436: 6008 STR R0, [R1] 0x34181438: F3BF 8F4F DSB SY 0x3418143C: F64E 5080 MOVW R0, #0xED80 0x34181440: F2CE 0000 MOVT R0, #0xE000 0x34181444: 6800 LDR R0, [R0] 0x34181446: 9007 STR R0, [SP, #28] 0x34181448: 9807 LDR R0, [SP, #28] 0x3418144A: F3C0 304E UBFX R0, R0, #13, #15 0x3418144E: 9006 STR R0, [SP, #24]
.L4: 0x34181450: 9807 LDR R0, [SP, #28] 0x34181452: F3C0 00C9 UBFX R0, R0, #3, #10 0x34181456: 9005 STR R0, [SP, #20]
.L5: 0x34181458: 9906 LDR R1, [SP, #24] 0x3418145A: 9805 LDR R0, [SP, #20] 0x3418145C: 0780 LSLS R0, R0, #30 0x3418145E: F361 104D BFI R0, R1, #5, #9 0x34181462: F64E 7160 MOVW R1, #0xEF60 0x34181466: F2CE 0100 MOVT R1, #0xE000 0x3418146A: 6008 STR R0, [R1] 0x3418146C: 9805 LDR R0, [SP, #20] 0x3418146E: 1E41 SUBS R1, R0, #1 0x34181470: 9105 STR R1, [SP, #20] 0x34181472: B108 CBZ R0, .L6 ; 0x34181478 0x34181474: F02F C011 LE 46L5 ; 0x34181458
.L6: 0x34181478: 9806 LDR R0, [SP, #24] 0x3418147A: 1E41 SUBS R1, R0, #1 0x3418147C: 9106 STR R1, [SP, #24] 0x3418147E: B108 CBZ R0, .L7 ; 0x34181484 0x34181480: F02F C01B LE 46L4 ; 0x34181450
.L7: 0x34181484: F3BF 8F4F DSB SY 0x34181488: F64E 5114 MOVW R1, #0xED14 0x3418148C: F2CE 0100 MOVT R1, #0xE000 0x34181490: 6808 LDR R0, [R1] 0x34181492: F440 3080 ORR R0, R0, #0x010000 0x34181496: 6008 STR R0, [R1] 0x34181498: F3BF 8F4F DSB SY 0x3418149C: F3BF 8F6F ISB SY
.L8: 0x341814A0: F000 FA90 BL HAL_Init ; 0x341819C4 0x341814A4: F00C FB1E BL SystemClock_Config ; 0x3418DAE4 0x341814A8: F00C FB9C BL OTP_Config ; 0x3418DBE4 0x341814AC: B108 CBZ R0, .L9 ; 0x341814B2 0x341814AE: F7FF F94D BL Error_Handler ; 0x3418074C
.L9: 0x341814B2: F00C FAC1 BL MX_GPIO_Init ; 0x3418DA38 0x341814B6: F00C FD05 BL MX_XSPI2_Init ; 0x3418DEC4 0x341814BA: F00C FA8F BL MX_BSEC_Init ; 0x3418D9DC 0x341814BE: F00C FA9B BL MX_EXTMEM_MANAGER_Init ; 0x3418D9F8 0x341814C2: 2000 MOVS R0, #0 0x341814C4: 9003 STR R0, [SP, #12]
.L10: 0x341814C6: 9803 LDR R0, [SP, #12] 0x341814C8: 2863 CMP R0, #99 0x341814CA: DC2C BGT 46L11 ; 0x34181526 0x341814CC: F641 0000 MOVW R0, #0x1800 0x341814D0: F2C5 6002 MOVT R0, #0x5602 0x341814D4: 9000 STR R0, [SP, #0] 0x341814D6: 2201 MOVS R2, #1 0x341814D8: 9201 STR R2, [SP, #4] 0x341814DA: 4611 MOV R1, R2 0x341814DC: F00C FF70 BL HAL_GPIO_WritePin ; 0x3418E3C0 0x341814E0: 2019 MOVS R0, #25 0x341814E2: 9002 STR R0, [SP, #8] 0x341814E4: F00C FDB2 BL HAL_Delay ; 0x3418E04C 0x341814E8: 9800 LDR R0, [SP, #0] 0x341814EA: 9901 LDR R1, [SP, #4] 0x341814EC: 2200 MOVS R2, #0 0x341814EE: F00C FF67 BL HAL_GPIO_WritePin ; 0x3418E3C0 0x341814F2: 9802 LDR R0, [SP, #8] 0x341814F4: F00C FDAA BL HAL_Delay ; 0x3418E04C 0x341814F8: 9903 LDR R1, [SP, #12] 0x341814FA: F240 708C MOVW R0, #0x078C ; 0x3400078C = SystemCoreClock 0x341814FE: F2C3 4000 MOVT R0, #0x3400 ; 0x3400078C = SystemCoreClock 0x34181502: 6800 LDR R0, [R0] 0x34181504: F64D 6283 MOVW R2, #0xDE83 0x34181508: F2C4 321B MOVT R2, #0x431B 0x3418150C: FBA0 2002 UMULL R2, R0, R0, R2 0x34181510: 0C82 LSRS R2, R0, #18 0x34181512: F244 20F6 MOVW R0, #0x42F6 ; 0x341942F6 = .rodata..L.str 0x34181516: F2C3 4019 MOVT R0, #0x3419 ; 0x341942F6 = .rodata..L.str 0x3418151A: F012 FCD8 BL printf ; 0x34193ECE 0x3418151E: 9803 LDR R0, [SP, #12] 0x34181520: 3001 ADDS R0, #1 0x34181522: 9003 STR R0, [SP, #12] 0x34181524: E7CF B 46L10 ; 0x341814C6
.L11: 0x34181526: F011 FA55 BL BOOT_Application ; 0x341929D4 0x3418152A: B108 CBZ R0, .L12 ; 0x34181530 0x3418152C: F7FF F90E BL Error_Handler ; 0x3418074C
.L12: 0x34181530: BF00 NOP 0x34181532: E7FD B 46L12 ; 0x34181530

Section .text.HAL_MspInit from blto2_FSBL_lto.o, size=8, align=4


HAL_MspInit: 0x34181534: B580 PUSH 123R7, LR} 0x34181536: F00D F85D BL HAL_PWREx_EnableVddIO3 ; 0x3418E5F4 0x3418153A: BD80 POP 123R7, PC}

Section .text.SysTick_Handler from blto2_FSBL_lto.o, size=8, align=4


SysTick_Handler: 0x3418153C: B580 PUSH 123R7, LR} 0x3418153E: F00C FD77 BL HAL_IncTick ; 0x3418E030 0x34181542: BD80 POP 123R7, PC}

Section .text.SystemCoreClockUpdate from blto2_FSBL_lto.o, size=828, align=4


SystemCoreClockUpdate: 0x34181544: B08E SUB SP, SP, #56 0x34181546: 2000 MOVS R0, #0 0x34181548: 900D STR R0, [SP, #52] 0x3418154A: 900C STR R0, [SP, #48] 0x3418154C: 900B STR R0, [SP, #44] 0x3418154E: 900A STR R0, [SP, #40] 0x34181550: 9009 STR R0, [SP, #36] 0x34181552: 9008 STR R0, [SP, #32] 0x34181554: F248 0020 MOVW R0, #0x8020 0x34181558: F2C5 6002 MOVT R0, #0x5602 0x3418155C: 6800 LDR R0, [R0] 0x3418155E: F400 1040 AND R0, R0, #0x300000 0x34181562: 4601 MOV R1, R0 0x34181564: 9102 STR R1, [SP, #8] 0x34181566: B160 CBZ R0, .L1 ; 0x34181582 0x34181568: 9802 LDR R0, [SP, #8] 0x3418156A: F5B0 1F80 CMP.W R0, #0x100000 0x3418156E: D016 BEQ 46L2 ; 0x3418159E 0x34181570: 9802 LDR R0, [SP, #8] 0x34181572: F5B0 1F00 CMP.W R0, #0x200000 0x34181576: D026 BEQ 46L5 ; 0x341815C6 0x34181578: 9802 LDR R0, [SP, #8] 0x3418157A: F5B0 1F40 CMP.W R0, #0x300000 0x3418157E: D028 BEQ 46L6 ; 0x341815D2 0x34181580: E174 B 46L23 ; 0x3418186C
.L1: 0x34181582: F248 0048 MOVW R0, #0x8048 0x34181586: F2C5 6002 MOVT R0, #0x5602 0x3418158A: 6800 LDR R0, [R0] 0x3418158C: F3C0 11C1 UBFX R1, R0, #7, #2 0x34181590: F249 0000 MOVW R0, #0x9000 0x34181594: F2C0 30D0 MOVT R0, #0x03D0 0x34181598: 40C8 LSRS R0, R1 0x3418159A: 900D STR R0, [SP, #52] 0x3418159C: E166 B 46L23 ; 0x3418186C
.L2: 0x3418159E: F248 0044 MOVW R0, #0x8044 0x341815A2: F2C5 6002 MOVT R0, #0x5602 0x341815A6: 6800 LDR R0, [R0] 0x341815A8: 0580 LSLS R0, R0, #22 0x341815AA: 2800 CMP R0, #0 0x341815AC: D405 BMI 46L3 ; 0x341815BA 0x341815AE: F640 1000 MOVW R0, #0x0900 0x341815B2: F2C0 003D MOVT R0, #61 0x341815B6: 900D STR R0, [SP, #52] 0x341815B8: E004 B 46L4 ; 0x341815C4
.L3: 0x341815BA: F242 4000 MOVW R0, #0x2400 0x341815BE: F2C0 00F4 MOVT R0, #244 0x341815C2: 900D STR R0, [SP, #52]
.L4: 0x341815C4: E152 B 46L23 ; 0x3418186C
.L5: 0x341815C6: F646 4000 MOVW R0, #0x6C00 0x341815CA: F2C0 20DC MOVT R0, #0x02DC 0x341815CE: 900D STR R0, [SP, #52] 0x341815D0: E14C B 46L23 ; 0x3418186C
.L6: 0x341815D2: F248 00C4 MOVW R0, #0x80C4 0x341815D6: F2C5 6002 MOVT R0, #0x5602 0x341815DA: 6800 LDR R0, [R0] 0x341815DC: F000 5040 AND R0, R0, #0x30000000 0x341815E0: 4601 MOV R1, R0 0x341815E2: 9101 STR R1, [SP, #4] 0x341815E4: B140 CBZ R0, .L7 ; 0x341815F8 0x341815E6: 9801 LDR R0, [SP, #4] 0x341815E8: F1B0 5F80 CMP.W R0, #0x10000000 0x341815EC: D033 BEQ 46L9 ; 0x34181656 0x341815EE: 9801 LDR R0, [SP, #4] 0x341815F0: F1B0 5F00 CMP.W R0, #0x20000000 0x341815F4: D05E BEQ 46L11 ; 0x341816B4 0x341815F6: E08C B 46L13 ; 0x34181712
.L7: 0x341815F8: F248 0080 MOVW R0, #0x8080 0x341815FC: F2C5 6002 MOVT R0, #0x5602 0x34181600: 6800 LDR R0, [R0] 0x34181602: 9007 STR R0, [SP, #28] 0x34181604: 9807 LDR R0, [SP, #28] 0x34181606: F000 40E0 AND R0, R0, #0x70000000 0x3418160A: 9006 STR R0, [SP, #24] 0x3418160C: 9807 LDR R0, [SP, #28] 0x3418160E: F000 6000 AND R0, R0, #0x08000000 0x34181612: 9005 STR R0, [SP, #20] 0x34181614: 9805 LDR R0, [SP, #20] 0x34181616: B9E8 CBNZ R0, .L8 ; 0x34181654 0x34181618: 9807 LDR R0, [SP, #28] 0x3418161A: F3C0 5005 UBFX R0, R0, #20, #6 0x3418161E: 900C STR R0, [SP, #48] 0x34181620: 9807 LDR R0, [SP, #28] 0x34181622: F3C0 200B UBFX R0, R0, #8, #12 0x34181626: 900B STR R0, [SP, #44] 0x34181628: F248 0084 MOVW R0, #0x8084 0x3418162C: F2C5 6002 MOVT R0, #0x5602 0x34181630: 6800 LDR R0, [R0] 0x34181632: F020 407F BIC R0, R0, #0xFF000000 0x34181636: 900A STR R0, [SP, #40] 0x34181638: F248 0088 MOVW R0, #0x8088 0x3418163C: F2C5 6002 MOVT R0, #0x5602 0x34181640: 6800 LDR R0, [R0] 0x34181642: 9007 STR R0, [SP, #28] 0x34181644: 9807 LDR R0, [SP, #28] 0x34181646: F3C0 60C2 UBFX R0, R0, #27, #3 0x3418164A: 9009 STR R0, [SP, #36] 0x3418164C: 9807 LDR R0, [SP, #28] 0x3418164E: F3C0 6002 UBFX R0, R0, #24, #3 0x34181652: 9008 STR R0, [SP, #32]
.L8: 0x34181654: E08B B 46L14 ; 0x3418176E
.L9: 0x34181656: F248 0090 MOVW R0, #0x8090 0x3418165A: F2C5 6002 MOVT R0, #0x5602 0x3418165E: 6800 LDR R0, [R0] 0x34181660: 9007 STR R0, [SP, #28] 0x34181662: 9807 LDR R0, [SP, #28] 0x34181664: F000 40E0 AND R0, R0, #0x70000000 0x34181668: 9006 STR R0, [SP, #24] 0x3418166A: 9807 LDR R0, [SP, #28] 0x3418166C: F000 6000 AND R0, R0, #0x08000000 0x34181670: 9005 STR R0, [SP, #20] 0x34181672: 9805 LDR R0, [SP, #20] 0x34181674: B9E8 CBNZ R0, .L10 ; 0x341816B2 0x34181676: 9807 LDR R0, [SP, #28] 0x34181678: F3C0 5005 UBFX R0, R0, #20, #6 0x3418167C: 900C STR R0, [SP, #48] 0x3418167E: 9807 LDR R0, [SP, #28] 0x34181680: F3C0 200B UBFX R0, R0, #8, #12 0x34181684: 900B STR R0, [SP, #44] 0x34181686: F248 0094 MOVW R0, #0x8094 0x3418168A: F2C5 6002 MOVT R0, #0x5602 0x3418168E: 6800 LDR R0, [R0] 0x34181690: F020 407F BIC R0, R0, #0xFF000000 0x34181694: 900A STR R0, [SP, #40] 0x34181696: F248 0098 MOVW R0, #0x8098 0x3418169A: F2C5 6002 MOVT R0, #0x5602 0x3418169E: 6800 LDR R0, [R0] 0x341816A0: 9007 STR R0, [SP, #28] 0x341816A2: 9807 LDR R0, [SP, #28] 0x341816A4: F3C0 60C2 UBFX R0, R0, #27, #3 0x341816A8: 9009 STR R0, [SP, #36] 0x341816AA: 9807 LDR R0, [SP, #28] 0x341816AC: F3C0 6002 UBFX R0, R0, #24, #3 0x341816B0: 9008 STR R0, [SP, #32]
.L10: 0x341816B2: E05C B 46L14 ; 0x3418176E
.L11: 0x341816B4: F248 00A0 MOVW R0, #0x80A0 0x341816B8: F2C5 6002 MOVT R0, #0x5602 0x341816BC: 6800 LDR R0, [R0] 0x341816BE: 9007 STR R0, [SP, #28] 0x341816C0: 9807 LDR R0, [SP, #28] 0x341816C2: F000 40E0 AND R0, R0, #0x70000000 0x341816C6: 9006 STR R0, [SP, #24] 0x341816C8: 9807 LDR R0, [SP, #28] 0x341816CA: F000 6000 AND R0, R0, #0x08000000 0x341816CE: 9005 STR R0, [SP, #20] 0x341816D0: 9805 LDR R0, [SP, #20] 0x341816D2: B9E8 CBNZ R0, .L12 ; 0x34181710 0x341816D4: 9807 LDR R0, [SP, #28] 0x341816D6: F3C0 5005 UBFX R0, R0, #20, #6 0x341816DA: 900C STR R0, [SP, #48] 0x341816DC: 9807 LDR R0, [SP, #28] 0x341816DE: F3C0 200B UBFX R0, R0, #8, #12 0x341816E2: 900B STR R0, [SP, #44] 0x341816E4: F248 00A4 MOVW R0, #0x80A4 0x341816E8: F2C5 6002 MOVT R0, #0x5602 0x341816EC: 6800 LDR R0, [R0] 0x341816EE: F020 407F BIC R0, R0, #0xFF000000 0x341816F2: 900A STR R0, [SP, #40] 0x341816F4: F248 00A8 MOVW R0, #0x80A8 0x341816F8: F2C5 6002 MOVT R0, #0x5602 0x341816FC: 6800 LDR R0, [R0] 0x341816FE: 9007 STR R0, [SP, #28] 0x34181700: 9807 LDR R0, [SP, #28] 0x34181702: F3C0 60C2 UBFX R0, R0, #27, #3 0x34181706: 9009 STR R0, [SP, #36] 0x34181708: 9807 LDR R0, [SP, #28] 0x3418170A: F3C0 6002 UBFX R0, R0, #24, #3 0x3418170E: 9008 STR R0, [SP, #32]
.L12: 0x34181710: E02D B 46L14 ; 0x3418176E
.L13: 0x34181712: F248 00B0 MOVW R0, #0x80B0 0x34181716: F2C5 6002 MOVT R0, #0x5602 0x3418171A: 6800 LDR R0, [R0] 0x3418171C: 9007 STR R0, [SP, #28] 0x3418171E: 9807 LDR R0, [SP, #28] 0x34181720: F000 40E0 AND R0, R0, #0x70000000 0x34181724: 9006 STR R0, [SP, #24] 0x34181726: 9807 LDR R0, [SP, #28] 0x34181728: F000 6000 AND R0, R0, #0x08000000 0x3418172C: 9005 STR R0, [SP, #20] 0x3418172E: 9805 LDR R0, [SP, #20] 0x34181730: B9E8 CBNZ R0, .L14 ; 0x3418176E 0x34181732: 9807 LDR R0, [SP, #28] 0x34181734: F3C0 5005 UBFX R0, R0, #20, #6 0x34181738: 900C STR R0, [SP, #48] 0x3418173A: 9807 LDR R0, [SP, #28] 0x3418173C: F3C0 200B UBFX R0, R0, #8, #12 0x34181740: 900B STR R0, [SP, #44] 0x34181742: F248 00B4 MOVW R0, #0x80B4 0x34181746: F2C5 6002 MOVT R0, #0x5602 0x3418174A: 6800 LDR R0, [R0] 0x3418174C: F020 407F BIC R0, R0, #0xFF000000 0x34181750: 900A STR R0, [SP, #40] 0x34181752: F248 00B8 MOVW R0, #0x80B8 0x34181756: F2C5 6002 MOVT R0, #0x5602 0x3418175A: 6800 LDR R0, [R0] 0x3418175C: 9007 STR R0, [SP, #28] 0x3418175E: 9807 LDR R0, [SP, #28] 0x34181760: F3C0 60C2 UBFX R0, R0, #27, #3 0x34181764: 9009 STR R0, [SP, #36] 0x34181766: 9807 LDR R0, [SP, #28] 0x34181768: F3C0 6002 UBFX R0, R0, #24, #3 0x3418176C: 9008 STR R0, [SP, #32]
.L14: 0x3418176E: 9806 LDR R0, [SP, #24] 0x34181770: 9000 STR R0, [SP, #0] 0x34181772: B160 CBZ R0, .L15 ; 0x3418178E 0x34181774: 9800 LDR R0, [SP, #0] 0x34181776: F1B0 5F80 CMP.W R0, #0x10000000 0x3418177A: D016 BEQ 46L16 ; 0x341817AA 0x3418177C: 9800 LDR R0, [SP, #0] 0x3418177E: F1B0 5F00 CMP.W R0, #0x20000000 0x34181782: D026 BEQ 46L19 ; 0x341817D2 0x34181784: 9800 LDR R0, [SP, #0] 0x34181786: F1B0 5F40 CMP.W R0, #0x30000000 0x3418178A: D028 BEQ 46L20 ; 0x341817DE 0x3418178C: E02D B 46L21 ; 0x341817EA
.L15: 0x3418178E: F248 0048 MOVW R0, #0x8048 0x34181792: F2C5 6002 MOVT R0, #0x5602 0x34181796: 6800 LDR R0, [R0] 0x34181798: F3C0 11C1 UBFX R1, R0, #7, #2 0x3418179C: F249 0000 MOVW R0, #0x9000 0x341817A0: F2C0 30D0 MOVT R0, #0x03D0 0x341817A4: 40C8 LSRS R0, R1 0x341817A6: 900D STR R0, [SP, #52] 0x341817A8: E01F B 46L21 ; 0x341817EA
.L16: 0x341817AA: F248 0044 MOVW R0, #0x8044 0x341817AE: F2C5 6002 MOVT R0, #0x5602 0x341817B2: 6800 LDR R0, [R0] 0x341817B4: 0580 LSLS R0, R0, #22 0x341817B6: 2800 CMP R0, #0 0x341817B8: D405 BMI 46L17 ; 0x341817C6 0x341817BA: F640 1000 MOVW R0, #0x0900 0x341817BE: F2C0 003D MOVT R0, #61 0x341817C2: 900D STR R0, [SP, #52] 0x341817C4: E004 B 46L18 ; 0x341817D0
.L17: 0x341817C6: F242 4000 MOVW R0, #0x2400 0x341817CA: F2C0 00F4 MOVT R0, #244 0x341817CE: 900D STR R0, [SP, #52]
.L18: 0x341817D0: E00B B 46L21 ; 0x341817EA
.L19: 0x341817D2: F646 4000 MOVW R0, #0x6C00 0x341817D6: F2C0 20DC MOVT R0, #0x02DC 0x341817DA: 900D STR R0, [SP, #52] 0x341817DC: E005 B 46L21 ; 0x341817EA
.L20: 0x341817DE: F248 0000 MOVW R0, #0x8000 0x341817E2: F2C0 00BB MOVT R0, #187 0x341817E6: 900D STR R0, [SP, #52] 0x341817E8: E7FF B 46L21 ; 0x341817EA
.L21: 0x341817EA: 9805 LDR R0, [SP, #20] 0x341817EC: BB68 CBNZ R0, .L22 ; 0x3418184A 0x341817EE: ED9D 0A0D VLDR S0, [SP, #52] 0x341817F2: EEB8 0A40 VCVT.F32.U32 S0, S0 0x341817F6: ED9D 1A0B VLDR S2, [SP, #44] 0x341817FA: EEB8 1A41 VCVT.F32.U32 S2, S2 0x341817FE: ED9D 2A0A VLDR S4, [SP, #40] 0x34181802: EEB8 2A42 VCVT.F32.U32 S4, S4 0x34181806: ED9F 3A1D VLDR S6, =0x33800000 ; [PC, #116] [0x3418187C] 0x3418180A: EE22 2A03 VMUL.F32 S4, S4, S6 0x3418180E: EE31 1A02 VADD.F32 S2, S2, S4 0x34181812: EE20 0A01 VMUL.F32 S0, S0, S2 0x34181816: ED9D 1A0C VLDR S2, [SP, #48] 0x3418181A: EEB8 1A41 VCVT.F32.U32 S2, S2 0x3418181E: EE80 0A01 VDIV.F32 S0, S0, S2 0x34181822: ED8D 0A03 VSTR S0, [SP, #12] 0x34181826: ED9D 0A03 VLDR S0, [SP, #12] 0x3418182A: ED9D 1A09 VLDR S2, [SP, #36] 0x3418182E: EEB8 1A41 VCVT.F32.U32 S2, S2 0x34181832: ED9D 2A08 VLDR S4, [SP, #32] 0x34181836: EEB8 2A42 VCVT.F32.U32 S4, S4 0x3418183A: EE21 1A02 VMUL.F32 S2, S2, S4 0x3418183E: EE80 0A01 VDIV.F32 S0, S0, S2 0x34181842: EEBC 0AC0 VCVT.U32.F32 S0, S0 0x34181846: ED8D 0A0D VSTR S0, [SP, #52]
.L22: 0x3418184A: F248 00C4 MOVW R0, #0x80C4 0x3418184E: F2C5 6002 MOVT R0, #0x5602 0x34181852: 6800 LDR R0, [R0] 0x34181854: F400 017F AND R1, R0, #0xFF0000 0x34181858: 2001 MOVS R0, #1 0x3418185A: EB00 4011 ADD.W R0, R0, R1, LSR #16 0x3418185E: 9004 STR R0, [SP, #16] 0x34181860: 980D LDR R0, [SP, #52] 0x34181862: 9904 LDR R1, [SP, #16] 0x34181864: FBB0 F0F1 UDIV R0, R0, R1 0x34181868: 900D STR R0, [SP, #52] 0x3418186A: E7FF B 46L23 ; 0x3418186C
.L23: 0x3418186C: 980D LDR R0, [SP, #52] 0x3418186E: F240 718C MOVW R1, #0x078C ; 0x3400078C = SystemCoreClock 0x34181872: F2C3 4100 MOVT R1, #0x3400 ; 0x3400078C = SystemCoreClock 0x34181876: 6008 STR R0, [R1] 0x34181878: B00E ADD SP, SP, #56 0x3418187A: 4770 BX LR 0x3418187C: 33800000 DC.W 0x33800000

Section .text.HAL_XSPI_MspInit from blto2_FSBL_lto.o, size=324, align=4


HAL_XSPI_MspInit: 0x34181880: B580 PUSH 123R7, LR} 0x34181882: B0F2 SUB SP, SP, #0x01C8 0x34181884: 9071 STR R0, [SP, #0x01C4] 0x34181886: 2000 MOVS R0, #0 0x34181888: 9070 STR R0, [SP, #0x01C0] 0x3418188A: 906F STR R0, [SP, #0x01BC] 0x3418188C: 906E STR R0, [SP, #0x01B8] 0x3418188E: 906D STR R0, [SP, #0x01B4] 0x34181890: 906C STR R0, [SP, #0x01B0] 0x34181892: A808 ADD R0, SP, #32 0x34181894: F44F 71C8 MOV.W R1, #0x0190 0x34181898: F00C F82A BL __aeabi_memclr ; 0x3418D8F0 0x3418189C: 9871 LDR R0, [SP, #0x01C4] 0x3418189E: 6800 LDR R0, [R0] 0x341818A0: F24A 0100 MOVW R1, #0xA000 0x341818A4: F6C5 0102 MOVT R1, #0x5802 0x341818A8: 4288 CMP R0, R1 0x341818AA: F040 8089 BNE.W 46L5 ; 0x341819C0 0x341818AE: 2000 MOVS R0, #0 0x341818B0: 9005 STR R0, [SP, #20] 0x341818B2: 2002 MOVS R0, #2 0x341818B4: 9003 STR R0, [SP, #12] 0x341818B6: F00C FB45 BL LL_APB4_GRP2_EnableClock.7 ; 0x3418DF44 0x341818BA: 2001 MOVS R0, #1 0x341818BC: 9004 STR R0, [SP, #16] 0x341818BE: F00C FB41 BL LL_APB4_GRP2_EnableClock.7 ; 0x3418DF44 0x341818C2: F44F 2080 MOV.W R0, #0x040000 0x341818C6: F00C FB4F BL LL_AHB4_GRP1_EnableClock.8 ; 0x3418DF68 0x341818CA: F00C FE93 BL HAL_PWREx_EnableVddIO3 ; 0x3418E5F4 0x341818CE: 9803 LDR R0, [SP, #12] 0x341818D0: 9904 LDR R1, [SP, #16] 0x341818D2: F00C FE1D BL HAL_PWREx_ConfigVddIORange ; 0x3418E510 0x341818D6: F249 0000 MOVW R0, #0x9000 0x341818DA: F2C5 6000 MOVT R0, #0x5600 0x341818DE: 9006 STR R0, [SP, #24] 0x341818E0: A806 ADD R0, SP, #24 0x341818E2: 217C MOVS R1, #124 0x341818E4: AA05 ADD R2, SP, #20 0x341818E6: F000 F88B BL HAL_BSEC_OTP_Read ; 0x34181A00 0x341818EA: B108 CBZ R0, .L1 ; 0x341818F0 0x341818EC: F7FE FF2E BL Error_Handler ; 0x3418074C
.L1: 0x341818F0: F89D 0015 LDRB.W R0, [SP, #21] 0x341818F4: 0600 LSLS R0, R0, #24 0x341818F6: 2800 CMP R0, #0 0x341818F8: D531 BPL 46L3 ; 0x3418195E 0x341818FA: 2000 MOVS R0, #0 0x341818FC: 900E STR R0, [SP, #56] 0x341818FE: 2108 MOVS R1, #8 0x34181900: 910F STR R1, [SP, #60] 0x34181902: F44F 0100 MOV.W R1, #0x800000 0x34181906: 9109 STR R1, [SP, #36] 0x34181908: 9008 STR R0, [SP, #32] 0x3418190A: F240 4014 MOVW R0, #0x0414 0x3418190E: F2C0 3002 MOVT R0, #0x0302 0x34181912: 9034 STR R0, [SP, #208] 0x34181914: A808 ADD R0, SP, #32 0x34181916: F000 FF95 BL HAL_RCCEx_PeriphCLKConfig ; 0x34182844 0x3418191A: B108 CBZ R0, .L2 ; 0x34181920 0x3418191C: F7FE FF16 BL Error_Handler ; 0x3418074C
.L2: 0x34181920: F44F 5000 MOV.W R0, #0x2000 0x34181924: 9002 STR R0, [SP, #8] 0x34181926: F00C FB31 BL LL_AHB5_GRP1_EnableClock ; 0x3418DF8C 0x3418192A: F44F 5080 MOV.W R0, #0x1000 0x3418192E: F00C FB2D BL LL_AHB5_GRP1_EnableClock ; 0x3418DF8C 0x34181932: 9802 LDR R0, [SP, #8] 0x34181934: F00C FB18 BL LL_AHB4_GRP1_EnableClock.8 ; 0x3418DF68 0x34181938: F640 707F MOVW R0, #0x0F7F 0x3418193C: 906C STR R0, [SP, #0x01B0] 0x3418193E: 2002 MOVS R0, #2 0x34181940: 906D STR R0, [SP, #0x01B4] 0x34181942: 2000 MOVS R0, #0 0x34181944: 906E STR R0, [SP, #0x01B8] 0x34181946: 2003 MOVS R0, #3 0x34181948: 906F STR R0, [SP, #0x01BC] 0x3418194A: 2009 MOVS R0, #9 0x3418194C: 9070 STR R0, [SP, #0x01C0] 0x3418194E: F243 4000 MOVW R0, #0x3400 0x34181952: F2C5 6002 MOVT R0, #0x5602 0x34181956: A96C ADD R1, SP, #0x01B0 0x34181958: F000 F9BE BL HAL_GPIO_Init ; 0x34181CD8 0x3418195C: E030 B 46L5 ; 0x341819C0
.L3: 0x3418195E: F44F 0000 MOV.W R0, #0x800000 0x34181962: 9009 STR R0, [SP, #36] 0x34181964: 2000 MOVS R0, #0 0x34181966: 9008 STR R0, [SP, #32] 0x34181968: F240 4114 MOVW R1, #0x0414 0x3418196C: F2C0 3102 MOVT R1, #0x0302 0x34181970: 9134 STR R1, [SP, #208] 0x34181972: 900E STR R0, [SP, #56] 0x34181974: 2020 MOVS R0, #32 0x34181976: 900F STR R0, [SP, #60] 0x34181978: A808 ADD R0, SP, #32 0x3418197A: F000 FF63 BL HAL_RCCEx_PeriphCLKConfig ; 0x34182844 0x3418197E: B108 CBZ R0, .L4 ; 0x34181984 0x34181980: F7FE FEE4 BL Error_Handler ; 0x3418074C
.L4: 0x34181984: F44F 5000 MOV.W R0, #0x2000 0x34181988: 9001 STR R0, [SP, #4] 0x3418198A: F00C FAFF BL LL_AHB5_GRP1_EnableClock ; 0x3418DF8C 0x3418198E: F44F 5080 MOV.W R0, #0x1000 0x34181992: F00C FAFB BL LL_AHB5_GRP1_EnableClock ; 0x3418DF8C 0x34181996: 9801 LDR R0, [SP, #4] 0x34181998: F00C FAE6 BL LL_AHB4_GRP1_EnableClock.8 ; 0x3418DF68 0x3418199C: F640 707F MOVW R0, #0x0F7F 0x341819A0: 906C STR R0, [SP, #0x01B0] 0x341819A2: 2002 MOVS R0, #2 0x341819A4: 906D STR R0, [SP, #0x01B4] 0x341819A6: 2000 MOVS R0, #0 0x341819A8: 906E STR R0, [SP, #0x01B8] 0x341819AA: 2003 MOVS R0, #3 0x341819AC: 906F STR R0, [SP, #0x01BC] 0x341819AE: 2009 MOVS R0, #9 0x341819B0: 9070 STR R0, [SP, #0x01C0] 0x341819B2: F243 4000 MOVW R0, #0x3400 0x341819B6: F2C5 6002 MOVT R0, #0x5602 0x341819BA: A96C ADD R1, SP, #0x01B0 0x341819BC: F000 F98C BL HAL_GPIO_Init ; 0x34181CD8
.L5: 0x341819C0: B072 ADD SP, SP, #0x01C8 0x341819C2: BD80 POP 123R7, PC}

Section .text.HAL_Init from blto2_FSBL_lto.o, size=48, align=4


HAL_Init: 0x341819C4: B580 PUSH 123R7, LR} 0x341819C6: B082 SUB SP, SP, #8 0x341819C8: 2003 MOVS R0, #3 0x341819CA: F00C FC91 BL HAL_NVIC_SetPriorityGrouping ; 0x3418E2F0 0x341819CE: F7FF FDB9 BL SystemCoreClockUpdate ; 0x34181544 0x341819D2: 200F MOVS R0, #15 0x341819D4: F00C FAEC BL HAL_InitTick ; 0x3418DFB0 0x341819D8: B118 CBZ R0, .L1 ; 0x341819E2 0x341819DA: 2001 MOVS R0, #1 0x341819DC: F88D 0007 STRB.W R0, [SP, #7] 0x341819E0: E004 B 46L2 ; 0x341819EC
.L1: 0x341819E2: F7FF FDA7 BL HAL_MspInit ; 0x34181534 0x341819E6: 2000 MOVS R0, #0 0x341819E8: F88D 0007 STRB.W R0, [SP, #7]
.L2: 0x341819EC: F89D 0007 LDRB.W R0, [SP, #7] 0x341819F0: B002 ADD SP, SP, #8 0x341819F2: BD80 POP 123R7, PC}

Section .text.HAL_GetTick from blto2_FSBL_lto.o, size=12, align=4


HAL_GetTick: 0x341819F4: F240 3040 MOVW R0, #0x0340 ; 0x34000340 = uwTick 0x341819F8: F2C3 4000 MOVT R0, #0x3400 ; 0x34000340 = uwTick 0x341819FC: 6800 LDR R0, [R0] 0x341819FE: 4770 BX LR

Section .text.HAL_BSEC_OTP_Read from blto2_FSBL_lto.o, size=124, align=4


HAL_BSEC_OTP_Read: 0x34181A00: B580 PUSH 123R7, LR} 0x34181A02: B084 SUB SP, SP, #16 0x34181A04: 9002 STR R0, [SP, #8] 0x34181A06: 9101 STR R1, [SP, #4] 0x34181A08: 9200 STR R2, [SP, #0] 0x34181A0A: 9802 LDR R0, [SP, #8] 0x34181A0C: B918 CBNZ R0, .L1 ; 0x34181A16 0x34181A0E: 2001 MOVS R0, #1 0x34181A10: F88D 000F STRB.W R0, [SP, #15] 0x34181A14: E02E B 46L8 ; 0x34181A74
.L1: 0x34181A16: 9800 LDR R0, [SP, #0] 0x34181A18: B138 CBZ R0, .L2 ; 0x34181A2A 0x34181A1A: 9802 LDR R0, [SP, #8] 0x34181A1C: 6800 LDR R0, [R0] 0x34181A1E: F249 0100 MOVW R1, #0x9000 0x34181A22: F2C5 6100 MOVT R1, #0x5600 0x34181A26: 4288 CMP R0, R1 0x34181A28: D005 BEQ 46L3 ; 0x34181A36
.L2: 0x34181A2A: 9902 LDR R1, [SP, #8] 0x34181A2C: 2001 MOVS R0, #1 0x34181A2E: 6048 STR R0, [R1, #4] 0x34181A30: F88D 000F STRB.W R0, [SP, #15] 0x34181A34: E01E B 46L8 ; 0x34181A74
.L3: 0x34181A36: 9801 LDR R0, [SP, #4] 0x34181A38: 08C0 LSRS R0, R0, #3 0x34181A3A: 282E CMP R0, #46 0x34181A3C: D811 BHI 46L6 ; 0x34181A62 0x34181A3E: 9802 LDR R0, [SP, #8] 0x34181A40: 9901 LDR R1, [SP, #4] 0x34181A42: F00C FB2B BL HAL_BSEC_OTP_Reload ; 0x3418E09C 0x34181A46: B938 CBNZ R0, .L4 ; 0x34181A58 0x34181A48: 9802 LDR R0, [SP, #8] 0x34181A4A: 6800 LDR R0, [R0] 0x34181A4C: 9901 LDR R1, [SP, #4] 0x34181A4E: F850 0021 LDR.W R0, [R0, R1, LSL #2] 0x34181A52: 9900 LDR R1, [SP, #0] 0x34181A54: 6008 STR R0, [R1] 0x34181A56: E003 B 46L5 ; 0x34181A60
.L4: 0x34181A58: 2001 MOVS R0, #1 0x34181A5A: F88D 000F STRB.W R0, [SP, #15] 0x34181A5E: E009 B 46L8 ; 0x34181A74
.L5: 0x34181A60: E005 B 46L7 ; 0x34181A6E
.L6: 0x34181A62: 9902 LDR R1, [SP, #8] 0x34181A64: 2001 MOVS R0, #1 0x34181A66: 6048 STR R0, [R1, #4] 0x34181A68: F88D 000F STRB.W R0, [SP, #15] 0x34181A6C: E002 B 46L8 ; 0x34181A74
.L7: 0x34181A6E: 2000 MOVS R0, #0 0x34181A70: F88D 000F STRB.W R0, [SP, #15]
.L8: 0x34181A74: F89D 000F LDRB.W R0, [SP, #15] 0x34181A78: B004 ADD SP, SP, #16 0x34181A7A: BD80 POP 123R7, PC}

Section .text.__NVIC_SetPriorityGrouping from blto2_FSBL_lto.o, size=60, align=4


__NVIC_SetPriorityGrouping: 0x34181A7C: B083 SUB SP, SP, #12 0x34181A7E: 9002 STR R0, [SP, #8] 0x34181A80: 9802 LDR R0, [SP, #8] 0x34181A82: F000 0007 AND R0, R0, #7 0x34181A86: 9000 STR R0, [SP, #0] 0x34181A88: F64E 510C MOVW R1, #0xED0C 0x34181A8C: F2CE 0100 MOVT R1, #0xE000 0x34181A90: 6808 LDR R0, [R1] 0x34181A92: 9001 STR R0, [SP, #4] 0x34181A94: 9801 LDR R0, [SP, #4] 0x34181A96: F64F 02FF MOVW R2, #0xF8FF 0x34181A9A: 4010 ANDS R0, R2 0x34181A9C: 9001 STR R0, [SP, #4] 0x34181A9E: 9801 LDR R0, [SP, #4] 0x34181AA0: 9A00 LDR R2, [SP, #0] 0x34181AA2: EA40 2002 ORR.W R0, R0, R2, LSL #8 0x34181AA6: 2200 MOVS R2, #0 0x34181AA8: F2C0 52FA MOVT R2, #0x05FA 0x34181AAC: 4310 ORRS R0, R2 0x34181AAE: 9001 STR R0, [SP, #4] 0x34181AB0: 9801 LDR R0, [SP, #4] 0x34181AB2: 6008 STR R0, [R1] 0x34181AB4: B003 ADD SP, SP, #12 0x34181AB6: 4770 BX LR

Section .text.HAL_NVIC_SetPriority from blto2_FSBL_lto.o, size=168, align=4


HAL_NVIC_SetPriority: 0x34181AB8: B580 PUSH 123R7, LR} 0x34181ABA: B086 SUB SP, SP, #24 0x34181ABC: F8AD 0016 STRH.W R0, [SP, #22] 0x34181AC0: 9104 STR R1, [SP, #16] 0x34181AC2: 9203 STR R2, [SP, #12] 0x34181AC4: F9BD 0016 LDRSH.W R0, [SP, #22] 0x34181AC8: F110 0F0C CMN R0, #12 0x34181ACC: DB04 BLT 46L1 ; 0x34181AD8 0x34181ACE: F9BD 0016 LDRSH.W R0, [SP, #22] 0x34181AD2: 3004 ADDS R0, #4 0x34181AD4: B100 CBZ R0, .L1 ; 0x34181AD8 0x34181AD6: E006 B 46L2 ; 0x34181AE6
.L1: 0x34181AD8: F244 4018 MOVW R0, #0x4418 ; 0x34194418 = .rodata..L.str.23 0x34181ADC: F2C3 4019 MOVT R0, #0x3419 ; 0x34194418 = .rodata..L.str.23 0x34181AE0: 21FF MOVS R1, #255 0x34181AE2: F00C F8D9 BL assert_failed ; 0x3418DC98
.L2: 0x34181AE6: F000 F83B BL __NVIC_GetPriorityGrouping ; 0x34181B60 0x34181AEA: F000 0007 AND R0, R0, #7 0x34181AEE: 9002 STR R0, [SP, #8] 0x34181AF0: 9802 LDR R0, [SP, #8] 0x34181AF2: 2802 CMP R0, #2 0x34181AF4: D802 BHI 46L3 ; 0x34181AFC 0x34181AF6: 9803 LDR R0, [SP, #12] 0x34181AF8: B138 CBZ R0, .L4 ; 0x34181B0A 0x34181AFA: E007 B 46L5 ; 0x34181B0C
.L3: 0x34181AFC: 9803 LDR R0, [SP, #12] 0x34181AFE: 9902 LDR R1, [SP, #8] 0x34181B00: 1ECA SUBS R2, R1, #3 0x34181B02: 2101 MOVS R1, #1 0x34181B04: 4091 LSLS R1, R2 0x34181B06: 4288 CMP R0, R1 0x34181B08: D200 BCS 46L5 ; 0x34181B0C
.L4: 0x34181B0A: E007 B 46L6 ; 0x34181B1C
.L5: 0x34181B0C: F244 4018 MOVW R0, #0x4418 ; 0x34194418 = .rodata..L.str.23 0x34181B10: F2C3 4019 MOVT R0, #0x3419 ; 0x34194418 = .rodata..L.str.23 0x34181B14: F44F 7181 MOV.W R1, #0x0102 0x34181B18: F00C F8BE BL assert_failed ; 0x3418DC98
.L6: 0x34181B1C: 9804 LDR R0, [SP, #16] 0x34181B1E: 280F CMP R0, #15 0x34181B20: D808 BHI 46L7 ; 0x34181B34 0x34181B22: 9804 LDR R0, [SP, #16] 0x34181B24: 9902 LDR R1, [SP, #8] 0x34181B26: F1C1 0207 RSB R2, R1, #7 0x34181B2A: 2101 MOVS R1, #1 0x34181B2C: 4091 LSLS R1, R2 0x34181B2E: 4288 CMP R0, R1 0x34181B30: D200 BCS 46L7 ; 0x34181B34 0x34181B32: E007 B 46L8 ; 0x34181B44
.L7: 0x34181B34: F244 4018 MOVW R0, #0x4418 ; 0x34194418 = .rodata..L.str.23 0x34181B38: F2C3 4019 MOVT R0, #0x3419 ; 0x34194418 = .rodata..L.str.23 0x34181B3C: F240 1103 MOVW R1, #0x0103 0x34181B40: F00C F8AA BL assert_failed ; 0x3418DC98
.L8: 0x34181B44: F9BD 0016 LDRSH.W R0, [SP, #22] 0x34181B48: 9001 STR R0, [SP, #4] 0x34181B4A: 9802 LDR R0, [SP, #8] 0x34181B4C: 9904 LDR R1, [SP, #16] 0x34181B4E: 9A03 LDR R2, [SP, #12] 0x34181B50: F000 F80E BL NVIC_EncodePriority ; 0x34181B70 0x34181B54: 4601 MOV R1, R0 0x34181B56: 9801 LDR R0, [SP, #4] 0x34181B58: F00C FBEA BL __NVIC_SetPriority ; 0x3418E330 0x34181B5C: B006 ADD SP, SP, #24 0x34181B5E: BD80 POP 123R7, PC}

Section .text.__NVIC_GetPriorityGrouping from blto2_FSBL_lto.o, size=16, align=4


__NVIC_GetPriorityGrouping: 0x34181B60: F64E 500C MOVW R0, #0xED0C 0x34181B64: F2CE 0000 MOVT R0, #0xE000 0x34181B68: 6800 LDR R0, [R0] 0x34181B6A: F3C0 2002 UBFX R0, R0, #8, #3 0x34181B6E: 4770 BX LR

Section .text.NVIC_EncodePriority from blto2_FSBL_lto.o, size=100, align=4


NVIC_EncodePriority: 0x34181B70: B088 SUB SP, SP, #32 0x34181B72: 9007 STR R0, [SP, #28] 0x34181B74: 9106 STR R1, [SP, #24] 0x34181B76: 9205 STR R2, [SP, #20] 0x34181B78: 9807 LDR R0, [SP, #28] 0x34181B7A: F000 0007 AND R0, R0, #7 0x34181B7E: 9004 STR R0, [SP, #16] 0x34181B80: 9804 LDR R0, [SP, #16] 0x34181B82: F1C0 0007 RSB R0, R0, #7 0x34181B86: 2805 CMP R0, #5 0x34181B88: D302 BCC 46L1 ; 0x34181B90 0x34181B8A: 2004 MOVS R0, #4 0x34181B8C: 9001 STR R0, [SP, #4] 0x34181B8E: E003 B 46L2 ; 0x34181B98
.L1: 0x34181B90: 9804 LDR R0, [SP, #16] 0x34181B92: F1C0 0007 RSB R0, R0, #7 0x34181B96: 9001 STR R0, [SP, #4]
.L2: 0x34181B98: 9801 LDR R0, [SP, #4] 0x34181B9A: 9003 STR R0, [SP, #12] 0x34181B9C: 9804 LDR R0, [SP, #16] 0x34181B9E: 3004 ADDS R0, #4 0x34181BA0: 2806 CMP R0, #6 0x34181BA2: D802 BHI 46L3 ; 0x34181BAA 0x34181BA4: 2000 MOVS R0, #0 0x34181BA6: 9000 STR R0, [SP, #0] 0x34181BA8: E002 B 46L4 ; 0x34181BB0
.L3: 0x34181BAA: 9804 LDR R0, [SP, #16] 0x34181BAC: 3803 SUBS R0, #3 0x34181BAE: 9000 STR R0, [SP, #0]
.L4: 0x34181BB0: 9800 LDR R0, [SP, #0] 0x34181BB2: 9002 STR R0, [SP, #8] 0x34181BB4: 9806 LDR R0, [SP, #24] 0x34181BB6: 9903 LDR R1, [SP, #12] 0x34181BB8: 2201 MOVS R2, #1 0x34181BBA: FA02 F101 LSL.W R1, R2, R1 0x34181BBE: 3901 SUBS R1, #1 0x34181BC0: 4008 ANDS R0, R1 0x34181BC2: 9B02 LDR R3, [SP, #8] 0x34181BC4: 4098 LSLS R0, R3 0x34181BC6: 9905 LDR R1, [SP, #20] 0x34181BC8: 409A LSLS R2, R3 0x34181BCA: 3A01 SUBS R2, #1 0x34181BCC: 4011 ANDS R1, R2 0x34181BCE: 4308 ORRS R0, R1 0x34181BD0: B008 ADD SP, SP, #32 0x34181BD2: 4770 BX LR

Section .text.HAL_SYSTICK_Config from blto2_FSBL_lto.o, size=16, align=4


HAL_SYSTICK_Config: 0x34181BD4: B580 PUSH 123R7, LR} 0x34181BD6: B082 SUB SP, SP, #8 0x34181BD8: 9001 STR R0, [SP, #4] 0x34181BDA: 9801 LDR R0, [SP, #4] 0x34181BDC: F00C FBC8 BL SysTick_Config ; 0x3418E370 0x34181BE0: B002 ADD SP, SP, #8 0x34181BE2: BD80 POP 123R7, PC}

Section .text.HAL_DMA_Abort from blto2_FSBL_lto.o, size=244, align=4


HAL_DMA_Abort: 0x34181BE4: B580 PUSH 123R7, LR} 0x34181BE6: B084 SUB SP, SP, #16 0x34181BE8: 9002 STR R0, [SP, #8] 0x34181BEA: F7FF FF03 BL HAL_GetTick ; 0x341819F4 0x34181BEE: 9001 STR R0, [SP, #4] 0x34181BF0: 9802 LDR R0, [SP, #8] 0x34181BF2: B918 CBNZ R0, .L1 ; 0x34181BFC 0x34181BF4: 2001 MOVS R0, #1 0x34181BF6: F88D 000F STRB.W R0, [SP, #15] 0x34181BFA: E069 B 46L8 ; 0x34181CD0
.L1: 0x34181BFC: 9802 LDR R0, [SP, #8] 0x34181BFE: F890 0054 LDRB.W R0, [R0, #84] 0x34181C02: 2802 CMP R0, #2 0x34181C04: D00A BEQ 46L2 ; 0x34181C1C 0x34181C06: 9902 LDR R1, [SP, #8] 0x34181C08: 2020 MOVS R0, #32 0x34181C0A: 6588 STR R0, [R1, #88] 0x34181C0C: 9902 LDR R1, [SP, #8] 0x34181C0E: 2000 MOVS R0, #0 0x34181C10: F881 004C STRB.W R0, [R1, #76] 0x34181C14: 2001 MOVS R0, #1 0x34181C16: F88D 000F STRB.W R0, [SP, #15] 0x34181C1A: E059 B 46L8 ; 0x34181CD0
.L2: 0x34181C1C: 9802 LDR R0, [SP, #8] 0x34181C1E: 6801 LDR R1, [R0] 0x34181C20: 6948 LDR R0, [R1, #20] 0x34181C22: F040 0004 ORR R0, R0, #4 0x34181C26: 6148 STR R0, [R1, #20] 0x34181C28: 9902 LDR R1, [SP, #8] 0x34181C2A: 2005 MOVS R0, #5 0x34181C2C: F881 0054 STRB.W R0, [R1, #84]
.L3: 0x34181C30: 9802 LDR R0, [SP, #8] 0x34181C32: 6800 LDR R0, [R0] 0x34181C34: 6900 LDR R0, [R0, #16] 0x34181C36: 0480 LSLS R0, R0, #18 0x34181C38: 2800 CMP R0, #0 0x34181C3A: D421 BMI 46L6 ; 0x34181C80 0x34181C3C: F7FF FEDA BL HAL_GetTick ; 0x341819F4 0x34181C40: 9901 LDR R1, [SP, #4] 0x34181C42: 1A40 SUBS R0, R0, R1 0x34181C44: 2806 CMP R0, #6 0x34181C46: D31A BCC 46L5 ; 0x34181C7E 0x34181C48: 9902 LDR R1, [SP, #8] 0x34181C4A: 6D88 LDR R0, [R1, #88] 0x34181C4C: F040 0010 ORR R0, R0, #16 0x34181C50: 6588 STR R0, [R1, #88] 0x34181C52: 9902 LDR R1, [SP, #8] 0x34181C54: 2003 MOVS R0, #3 0x34181C56: F881 0054 STRB.W R0, [R1, #84] 0x34181C5A: 9802 LDR R0, [SP, #8] 0x34181C5C: F890 0050 LDRB.W R0, [R0, #80] 0x34181C60: 0600 LSLS R0, R0, #24 0x34181C62: 2800 CMP R0, #0 0x34181C64: D503 BPL 46L4 ; 0x34181C6E 0x34181C66: 9802 LDR R0, [SP, #8] 0x34181C68: 6F41 LDR R1, [R0, #116] 0x34181C6A: 2001 MOVS R0, #1 0x34181C6C: 7308 STRB R0, [R1, #12]
.L4: 0x34181C6E: 9902 LDR R1, [SP, #8] 0x34181C70: 2000 MOVS R0, #0 0x34181C72: F881 004C STRB.W R0, [R1, #76] 0x34181C76: 2001 MOVS R0, #1 0x34181C78: F88D 000F STRB.W R0, [SP, #15] 0x34181C7C: E028 B 46L8 ; 0x34181CD0
.L5: 0x34181C7E: E7D7 B 46L3 ; 0x34181C30
.L6: 0x34181C80: 9802 LDR R0, [SP, #8] 0x34181C82: 6801 LDR R1, [R0] 0x34181C84: 6948 LDR R0, [R1, #20] 0x34181C86: F040 0002 ORR R0, R0, #2 0x34181C8A: 6148 STR R0, [R1, #20] 0x34181C8C: 9902 LDR R1, [SP, #8] 0x34181C8E: 2004 MOVS R0, #4 0x34181C90: F881 0054 STRB.W R0, [R1, #84] 0x34181C94: 9802 LDR R0, [SP, #8] 0x34181C96: 6801 LDR R1, [R0] 0x34181C98: F44F 40FE MOV.W R0, #0x7F00 0x34181C9C: 60C8 STR R0, [R1, #12] 0x34181C9E: 9902 LDR R1, [SP, #8] 0x34181CA0: 2001 MOVS R0, #1 0x34181CA2: F881 0054 STRB.W R0, [R1, #84] 0x34181CA6: 9802 LDR R0, [SP, #8] 0x34181CA8: F890 0050 LDRB.W R0, [R0, #80] 0x34181CAC: 0600 LSLS R0, R0, #24 0x34181CAE: 2800 CMP R0, #0 0x34181CB0: D507 BPL 46L7 ; 0x34181CC2 0x34181CB2: 9802 LDR R0, [SP, #8] 0x34181CB4: 6F41 LDR R1, [R0, #116] 0x34181CB6: 2001 MOVS R0, #1 0x34181CB8: 7308 STRB R0, [R1, #12] 0x34181CBA: 9802 LDR R0, [SP, #8] 0x34181CBC: 6801 LDR R1, [R0] 0x34181CBE: 2000 MOVS R0, #0 0x34181CC0: 6488 STR R0, [R1, #72]
.L7: 0x34181CC2: 9902 LDR R1, [SP, #8] 0x34181CC4: 2000 MOVS R0, #0 0x34181CC6: F881 004C STRB.W R0, [R1, #76] 0x34181CCA: 2000 MOVS R0, #0 0x34181CCC: F88D 000F STRB.W R0, [SP, #15]
.L8: 0x34181CD0: F89D 000F LDRB.W R0, [SP, #15] 0x34181CD4: B004 ADD SP, SP, #16 0x34181CD6: BD80 POP 123R7, PC}

Section .text.HAL_GPIO_Init from blto2_FSBL_lto.o, size=1928, align=4


HAL_GPIO_Init: 0x34181CD8: B580 PUSH 123R7, LR} 0x34181CDA: B090 SUB SP, SP, #64 0x34181CDC: 900F STR R0, [SP, #60] 0x34181CDE: 910E STR R1, [SP, #56] 0x34181CE0: 2000 MOVS R0, #0 0x34181CE2: 900D STR R0, [SP, #52] 0x34181CE4: 980F LDR R0, [SP, #60] 0x34181CE6: 2100 MOVS R1, #0 0x34181CE8: F2C5 6102 MOVT R1, #0x5602 0x34181CEC: 4288 CMP R0, R1 0x34181CEE: F000 80A4 BEQ.W 46L1 ; 0x34181E3A 0x34181CF2: 980F LDR R0, [SP, #60] 0x34181CF4: 2100 MOVS R1, #0 0x34181CF6: F2C4 6102 MOVT R1, #0x4602 0x34181CFA: 4288 CMP R0, R1 0x34181CFC: F000 809D BEQ.W 46L1 ; 0x34181E3A 0x34181D00: 980F LDR R0, [SP, #60] 0x34181D02: F240 4100 MOVW R1, #0x0400 0x34181D06: F2C5 6102 MOVT R1, #0x5602 0x34181D0A: 4288 CMP R0, R1 0x34181D0C: F000 8095 BEQ.W 46L1 ; 0x34181E3A 0x34181D10: 980F LDR R0, [SP, #60] 0x34181D12: F240 4100 MOVW R1, #0x0400 0x34181D16: F2C4 6102 MOVT R1, #0x4602 0x34181D1A: 4288 CMP R0, R1 0x34181D1C: F000 808D BEQ.W 46L1 ; 0x34181E3A 0x34181D20: 980F LDR R0, [SP, #60] 0x34181D22: F640 0100 MOVW R1, #0x0800 0x34181D26: F2C5 6102 MOVT R1, #0x5602 0x34181D2A: 4288 CMP R0, R1 0x34181D2C: F000 8085 BEQ.W 46L1 ; 0x34181E3A 0x34181D30: 980F LDR R0, [SP, #60] 0x34181D32: F640 0100 MOVW R1, #0x0800 0x34181D36: F2C4 6102 MOVT R1, #0x4602 0x34181D3A: 4288 CMP R0, R1 0x34181D3C: D07D BEQ 46L1 ; 0x34181E3A 0x34181D3E: 980F LDR R0, [SP, #60] 0x34181D40: F640 4100 MOVW R1, #0x0C00 0x34181D44: F2C5 6102 MOVT R1, #0x5602 0x34181D48: 4288 CMP R0, R1 0x34181D4A: D076 BEQ 46L1 ; 0x34181E3A 0x34181D4C: 980F LDR R0, [SP, #60] 0x34181D4E: F640 4100 MOVW R1, #0x0C00 0x34181D52: F2C4 6102 MOVT R1, #0x4602 0x34181D56: 4288 CMP R0, R1 0x34181D58: D06F BEQ 46L1 ; 0x34181E3A 0x34181D5A: 980F LDR R0, [SP, #60] 0x34181D5C: F241 0100 MOVW R1, #0x1000 0x34181D60: F2C5 6102 MOVT R1, #0x5602 0x34181D64: 4288 CMP R0, R1 0x34181D66: D068 BEQ 46L1 ; 0x34181E3A 0x34181D68: 980F LDR R0, [SP, #60] 0x34181D6A: F241 0100 MOVW R1, #0x1000 0x34181D6E: F2C4 6102 MOVT R1, #0x4602 0x34181D72: 4288 CMP R0, R1 0x34181D74: D061 BEQ 46L1 ; 0x34181E3A 0x34181D76: 980F LDR R0, [SP, #60] 0x34181D78: F241 4100 MOVW R1, #0x1400 0x34181D7C: F2C5 6102 MOVT R1, #0x5602 0x34181D80: 4288 CMP R0, R1 0x34181D82: D05A BEQ 46L1 ; 0x34181E3A 0x34181D84: 980F LDR R0, [SP, #60] 0x34181D86: F241 4100 MOVW R1, #0x1400 0x34181D8A: F2C4 6102 MOVT R1, #0x4602 0x34181D8E: 4288 CMP R0, R1 0x34181D90: D053 BEQ 46L1 ; 0x34181E3A 0x34181D92: 980F LDR R0, [SP, #60] 0x34181D94: F641 0100 MOVW R1, #0x1800 0x34181D98: F2C5 6102 MOVT R1, #0x5602 0x34181D9C: 4288 CMP R0, R1 0x34181D9E: D04C BEQ 46L1 ; 0x34181E3A 0x34181DA0: 980F LDR R0, [SP, #60] 0x34181DA2: F641 0100 MOVW R1, #0x1800 0x34181DA6: F2C4 6102 MOVT R1, #0x4602 0x34181DAA: 4288 CMP R0, R1 0x34181DAC: D045 BEQ 46L1 ; 0x34181E3A 0x34181DAE: 980F LDR R0, [SP, #60] 0x34181DB0: F641 4100 MOVW R1, #0x1C00 0x34181DB4: F2C5 6102 MOVT R1, #0x5602 0x34181DB8: 4288 CMP R0, R1 0x34181DBA: D03E BEQ 46L1 ; 0x34181E3A 0x34181DBC: 980F LDR R0, [SP, #60] 0x34181DBE: F641 4100 MOVW R1, #0x1C00 0x34181DC2: F2C4 6102 MOVT R1, #0x4602 0x34181DC6: 4288 CMP R0, R1 0x34181DC8: D037 BEQ 46L1 ; 0x34181E3A 0x34181DCA: 980F LDR R0, [SP, #60] 0x34181DCC: F243 4100 MOVW R1, #0x3400 0x34181DD0: F2C5 6102 MOVT R1, #0x5602 0x34181DD4: 4288 CMP R0, R1 0x34181DD6: D030 BEQ 46L1 ; 0x34181E3A 0x34181DD8: 980F LDR R0, [SP, #60] 0x34181DDA: F243 4100 MOVW R1, #0x3400 0x34181DDE: F2C4 6102 MOVT R1, #0x4602 0x34181DE2: 4288 CMP R0, R1 0x34181DE4: D029 BEQ 46L1 ; 0x34181E3A 0x34181DE6: 980F LDR R0, [SP, #60] 0x34181DE8: F643 0100 MOVW R1, #0x3800 0x34181DEC: F2C5 6102 MOVT R1, #0x5602 0x34181DF0: 4288 CMP R0, R1 0x34181DF2: D022 BEQ 46L1 ; 0x34181E3A 0x34181DF4: 980F LDR R0, [SP, #60] 0x34181DF6: F643 0100 MOVW R1, #0x3800 0x34181DFA: F2C4 6102 MOVT R1, #0x4602 0x34181DFE: 4288 CMP R0, R1 0x34181E00: D01B BEQ 46L1 ; 0x34181E3A 0x34181E02: 980F LDR R0, [SP, #60] 0x34181E04: F643 4100 MOVW R1, #0x3C00 0x34181E08: F2C5 6102 MOVT R1, #0x5602 0x34181E0C: 4288 CMP R0, R1 0x34181E0E: D014 BEQ 46L1 ; 0x34181E3A 0x34181E10: 980F LDR R0, [SP, #60] 0x34181E12: F643 4100 MOVW R1, #0x3C00 0x34181E16: F2C4 6102 MOVT R1, #0x4602 0x34181E1A: 4288 CMP R0, R1 0x34181E1C: D00D BEQ 46L1 ; 0x34181E3A 0x34181E1E: 980F LDR R0, [SP, #60] 0x34181E20: F244 0100 MOVW R1, #0x4000 0x34181E24: F2C5 6102 MOVT R1, #0x5602 0x34181E28: 4288 CMP R0, R1 0x34181E2A: D006 BEQ 46L1 ; 0x34181E3A 0x34181E2C: 980F LDR R0, [SP, #60] 0x34181E2E: F244 0100 MOVW R1, #0x4000 0x34181E32: F2C4 6102 MOVT R1, #0x4602 0x34181E36: 4288 CMP R0, R1 0x34181E38: D100 BNE 46L2 ; 0x34181E3C
.L1: 0x34181E3A: E006 B 46L3 ; 0x34181E4A
.L2: 0x34181E3C: F244 10E4 MOVW R0, #0x41E4 ; 0x341941E4 = .rodata..L.str.33 0x34181E40: F2C3 4019 MOVT R0, #0x3419 ; 0x341941E4 = .rodata..L.str.33 0x34181E44: 21AD MOVS R1, #173 0x34181E46: F00B FF27 BL assert_failed ; 0x3418DC98
.L3: 0x34181E4A: 980E LDR R0, [SP, #56] 0x34181E4C: 8800 LDRH R0, [R0] 0x34181E4E: B118 CBZ R0, .L4 ; 0x34181E58 0x34181E50: 980E LDR R0, [SP, #56] 0x34181E52: 8840 LDRH R0, [R0, #2] 0x34181E54: B900 CBNZ R0, .L4 ; 0x34181E58 0x34181E56: E006 B 46L5 ; 0x34181E66
.L4: 0x34181E58: F244 10E4 MOVW R0, #0x41E4 ; 0x341941E4 = .rodata..L.str.33 0x34181E5C: F2C3 4019 MOVT R0, #0x3419 ; 0x341941E4 = .rodata..L.str.33 0x34181E60: 21AE MOVS R1, #174 0x34181E62: F00B FF19 BL assert_failed ; 0x3418DC98
.L5: 0x34181E66: 980E LDR R0, [SP, #56] 0x34181E68: 6840 LDR R0, [R0, #4] 0x34181E6A: B388 CBZ R0, .L6 ; 0x34181ED0 0x34181E6C: 980E LDR R0, [SP, #56] 0x34181E6E: 6840 LDR R0, [R0, #4] 0x34181E70: 2801 CMP R0, #1 0x34181E72: D02D BEQ 46L6 ; 0x34181ED0 0x34181E74: 980E LDR R0, [SP, #56] 0x34181E76: 6840 LDR R0, [R0, #4] 0x34181E78: 2811 CMP R0, #17 0x34181E7A: D029 BEQ 46L6 ; 0x34181ED0 0x34181E7C: 980E LDR R0, [SP, #56] 0x34181E7E: 6840 LDR R0, [R0, #4] 0x34181E80: 2802 CMP R0, #2 0x34181E82: D025 BEQ 46L6 ; 0x34181ED0 0x34181E84: 980E LDR R0, [SP, #56] 0x34181E86: 6840 LDR R0, [R0, #4] 0x34181E88: 2812 CMP R0, #18 0x34181E8A: D021 BEQ 46L6 ; 0x34181ED0 0x34181E8C: 980E LDR R0, [SP, #56] 0x34181E8E: 6840 LDR R0, [R0, #4] 0x34181E90: F5B0 1F88 CMP.W R0, #0x110000 0x34181E94: D01C BEQ 46L6 ; 0x34181ED0 0x34181E96: 980E LDR R0, [SP, #56] 0x34181E98: 6840 LDR R0, [R0, #4] 0x34181E9A: F5B0 1F04 CMP.W R0, #0x210000 0x34181E9E: D017 BEQ 46L6 ; 0x34181ED0 0x34181EA0: 980E LDR R0, [SP, #56] 0x34181EA2: 6840 LDR R0, [R0, #4] 0x34181EA4: F5B0 1F44 CMP.W R0, #0x310000 0x34181EA8: D012 BEQ 46L6 ; 0x34181ED0 0x34181EAA: 980E LDR R0, [SP, #56] 0x34181EAC: 6840 LDR R0, [R0, #4] 0x34181EAE: F5B0 1F90 CMP.W R0, #0x120000 0x34181EB2: D00D BEQ 46L6 ; 0x34181ED0 0x34181EB4: 980E LDR R0, [SP, #56] 0x34181EB6: 6840 LDR R0, [R0, #4] 0x34181EB8: F5B0 1F08 CMP.W R0, #0x220000 0x34181EBC: D008 BEQ 46L6 ; 0x34181ED0 0x34181EBE: 980E LDR R0, [SP, #56] 0x34181EC0: 6840 LDR R0, [R0, #4] 0x34181EC2: F5B0 1F48 CMP.W R0, #0x320000 0x34181EC6: D003 BEQ 46L6 ; 0x34181ED0 0x34181EC8: 980E LDR R0, [SP, #56] 0x34181ECA: 6840 LDR R0, [R0, #4] 0x34181ECC: 2803 CMP R0, #3 0x34181ECE: D100 BNE 46L7 ; 0x34181ED2
.L6: 0x34181ED0: E006 B 46L8 ; 0x34181EE0
.L7: 0x34181ED2: F244 10E4 MOVW R0, #0x41E4 ; 0x341941E4 = .rodata..L.str.33 0x34181ED6: F2C3 4019 MOVT R0, #0x3419 ; 0x341941E4 = .rodata..L.str.33 0x34181EDA: 21AF MOVS R1, #175 0x34181EDC: F00B FEDC BL assert_failed ; 0x3418DC98
.L8: 0x34181EE0: 980E LDR R0, [SP, #56] 0x34181EE2: 6800 LDR R0, [R0] 0x34181EE4: 990D LDR R1, [SP, #52] 0x34181EE6: 40C8 LSRS R0, R1 0x34181EE8: 2800 CMP R0, #0 0x34181EEA: F000 82B7 BEQ.W 46L52 ; 0x3418245C 0x34181EEE: 980E LDR R0, [SP, #56] 0x34181EF0: 6800 LDR R0, [R0] 0x34181EF2: 9A0D LDR R2, [SP, #52] 0x34181EF4: 2101 MOVS R1, #1 0x34181EF6: 4091 LSLS R1, R2 0x34181EF8: 4008 ANDS R0, R1 0x34181EFA: 900C STR R0, [SP, #48] 0x34181EFC: 980C LDR R0, [SP, #48] 0x34181EFE: 2800 CMP R0, #0 0x34181F00: F000 82A8 BEQ.W 46L51 ; 0x34182454 0x34181F04: 980E LDR R0, [SP, #56] 0x34181F06: 6840 LDR R0, [R0, #4] 0x34181F08: F000 0003 AND R0, R0, #3 0x34181F0C: 2801 CMP R0, #1 0x34181F0E: D005 BEQ 46L9 ; 0x34181F1C 0x34181F10: 980E LDR R0, [SP, #56] 0x34181F12: 6840 LDR R0, [R0, #4] 0x34181F14: F000 0003 AND R0, R0, #3 0x34181F18: 2802 CMP R0, #2 0x34181F1A: D144 BNE 46L13 ; 0x34181FA6
.L9: 0x34181F1C: 980E LDR R0, [SP, #56] 0x34181F1E: 68C0 LDR R0, [R0, #12] 0x34181F20: B158 CBZ R0, .L10 ; 0x34181F3A 0x34181F22: 980E LDR R0, [SP, #56] 0x34181F24: 68C0 LDR R0, [R0, #12] 0x34181F26: 2801 CMP R0, #1 0x34181F28: D007 BEQ 46L10 ; 0x34181F3A 0x34181F2A: 980E LDR R0, [SP, #56] 0x34181F2C: 68C0 LDR R0, [R0, #12] 0x34181F2E: 2802 CMP R0, #2 0x34181F30: D003 BEQ 46L10 ; 0x34181F3A 0x34181F32: 980E LDR R0, [SP, #56] 0x34181F34: 68C0 LDR R0, [R0, #12] 0x34181F36: 2803 CMP R0, #3 0x34181F38: D100 BNE 46L11 ; 0x34181F3C
.L10: 0x34181F3A: E006 B 46L12 ; 0x34181F4A
.L11: 0x34181F3C: F244 10E4 MOVW R0, #0x41E4 ; 0x341941E4 = .rodata..L.str.33 0x34181F40: F2C3 4019 MOVT R0, #0x3419 ; 0x341941E4 = .rodata..L.str.33 0x34181F44: 21BE MOVS R1, #190 0x34181F46: F00B FEA7 BL assert_failed ; 0x3418DC98
.L12: 0x34181F4A: 980F LDR R0, [SP, #60] 0x34181F4C: 6880 LDR R0, [R0, #8] 0x34181F4E: 900B STR R0, [SP, #44] 0x34181F50: 980D LDR R0, [SP, #52] 0x34181F52: 0041 LSLS R1, R0, #1 0x34181F54: 2003 MOVS R0, #3 0x34181F56: FA00 F101 LSL.W R1, R0, R1 0x34181F5A: 980B LDR R0, [SP, #44] 0x34181F5C: 4388 BICS R0, R1 0x34181F5E: 900B STR R0, [SP, #44] 0x34181F60: 980E LDR R0, [SP, #56] 0x34181F62: 68C0 LDR R0, [R0, #12] 0x34181F64: 990D LDR R1, [SP, #52] 0x34181F66: 0049 LSLS R1, R1, #1 0x34181F68: FA00 F101 LSL.W R1, R0, R1 0x34181F6C: 980B LDR R0, [SP, #44] 0x34181F6E: 4308 ORRS R0, R1 0x34181F70: 900B STR R0, [SP, #44] 0x34181F72: 980B LDR R0, [SP, #44] 0x34181F74: 990F LDR R1, [SP, #60] 0x34181F76: 6088 STR R0, [R1, #8] 0x34181F78: 980F LDR R0, [SP, #60] 0x34181F7A: 6840 LDR R0, [R0, #4] 0x34181F7C: 900B STR R0, [SP, #44] 0x34181F7E: 990D LDR R1, [SP, #52] 0x34181F80: 2001 MOVS R0, #1 0x34181F82: FA00 F101 LSL.W R1, R0, R1 0x34181F86: 980B LDR R0, [SP, #44] 0x34181F88: 4388 BICS R0, R1 0x34181F8A: 900B STR R0, [SP, #44] 0x34181F8C: 980E LDR R0, [SP, #56] 0x34181F8E: 6840 LDR R0, [R0, #4] 0x34181F90: F3C0 1000 UBFX R0, R0, #4, #1 0x34181F94: 990D LDR R1, [SP, #52] 0x34181F96: FA00 F101 LSL.W R1, R0, R1 0x34181F9A: 980B LDR R0, [SP, #44] 0x34181F9C: 4308 ORRS R0, R1 0x34181F9E: 900B STR R0, [SP, #44] 0x34181FA0: 980B LDR R0, [SP, #44] 0x34181FA2: 990F LDR R1, [SP, #60] 0x34181FA4: 6048 STR R0, [R1, #4]
.L13: 0x34181FA6: 980E LDR R0, [SP, #56] 0x34181FA8: 6840 LDR R0, [R0, #4] 0x34181FAA: 43C0 MVNS R0, R0 0x34181FAC: 0780 LSLS R0, R0, #30 0x34181FAE: B940 CBNZ R0, .L14 ; 0x34181FC2 0x34181FB0: 980E LDR R0, [SP, #56] 0x34181FB2: 6840 LDR R0, [R0, #4] 0x34181FB4: 43C0 MVNS R0, R0 0x34181FB6: 0780 LSLS R0, R0, #30 0x34181FB8: BB68 CBNZ R0, .L18 ; 0x34182016 0x34181FBA: 980E LDR R0, [SP, #56] 0x34181FBC: 6880 LDR R0, [R0, #8] 0x34181FBE: 2801 CMP R0, #1 0x34181FC0: D029 BEQ 46L18 ; 0x34182016
.L14: 0x34181FC2: 980E LDR R0, [SP, #56] 0x34181FC4: 6880 LDR R0, [R0, #8] 0x34181FC6: B138 CBZ R0, .L15 ; 0x34181FD8 0x34181FC8: 980E LDR R0, [SP, #56] 0x34181FCA: 6880 LDR R0, [R0, #8] 0x34181FCC: 2801 CMP R0, #1 0x34181FCE: D003 BEQ 46L15 ; 0x34181FD8 0x34181FD0: 980E LDR R0, [SP, #56] 0x34181FD2: 6880 LDR R0, [R0, #8] 0x34181FD4: 2802 CMP R0, #2 0x34181FD6: D100 BNE 46L16 ; 0x34181FDA
.L15: 0x34181FD8: E006 B 46L17 ; 0x34181FE8
.L16: 0x34181FDA: F244 10E4 MOVW R0, #0x41E4 ; 0x341941E4 = .rodata..L.str.33 0x34181FDE: F2C3 4019 MOVT R0, #0x3419 ; 0x341941E4 = .rodata..L.str.33 0x34181FE2: 21D1 MOVS R1, #209 0x34181FE4: F00B FE58 BL assert_failed ; 0x3418DC98
.L17: 0x34181FE8: 980F LDR R0, [SP, #60] 0x34181FEA: 68C0 LDR R0, [R0, #12] 0x34181FEC: 900B STR R0, [SP, #44] 0x34181FEE: 980D LDR R0, [SP, #52] 0x34181FF0: 0041 LSLS R1, R0, #1 0x34181FF2: 2003 MOVS R0, #3 0x34181FF4: FA00 F101 LSL.W R1, R0, R1 0x34181FF8: 980B LDR R0, [SP, #44] 0x34181FFA: 4388 BICS R0, R1 0x34181FFC: 900B STR R0, [SP, #44] 0x34181FFE: 980E LDR R0, [SP, #56] 0x34182000: 6880 LDR R0, [R0, #8] 0x34182002: 990D LDR R1, [SP, #52] 0x34182004: 0049 LSLS R1, R1, #1 0x34182006: FA00 F101 LSL.W R1, R0, R1 0x3418200A: 980B LDR R0, [SP, #44] 0x3418200C: 4308 ORRS R0, R1 0x3418200E: 900B STR R0, [SP, #44] 0x34182010: 980B LDR R0, [SP, #44] 0x34182012: 990F LDR R1, [SP, #60] 0x34182014: 60C8 STR R0, [R1, #12]
.L18: 0x34182016: 980E LDR R0, [SP, #56] 0x34182018: 6840 LDR R0, [R0, #4] 0x3418201A: F000 0003 AND R0, R0, #3 0x3418201E: 2802 CMP R0, #2 0x34182020: F040 80E4 BNE.W 46L24 ; 0x341821EC 0x34182024: 980F LDR R0, [SP, #60] 0x34182026: 2100 MOVS R1, #0 0x34182028: F2C5 6102 MOVT R1, #0x5602 0x3418202C: 4288 CMP R0, R1 0x3418202E: F000 80A4 BEQ.W 46L19 ; 0x3418217A 0x34182032: 980F LDR R0, [SP, #60] 0x34182034: 2100 MOVS R1, #0 0x34182036: F2C4 6102 MOVT R1, #0x4602 0x3418203A: 4288 CMP R0, R1 0x3418203C: F000 809D BEQ.W 46L19 ; 0x3418217A 0x34182040: 980F LDR R0, [SP, #60] 0x34182042: F240 4100 MOVW R1, #0x0400 0x34182046: F2C5 6102 MOVT R1, #0x5602 0x3418204A: 4288 CMP R0, R1 0x3418204C: F000 8095 BEQ.W 46L19 ; 0x3418217A 0x34182050: 980F LDR R0, [SP, #60] 0x34182052: F240 4100 MOVW R1, #0x0400 0x34182056: F2C4 6102 MOVT R1, #0x4602 0x3418205A: 4288 CMP R0, R1 0x3418205C: F000 808D BEQ.W 46L19 ; 0x3418217A 0x34182060: 980F LDR R0, [SP, #60] 0x34182062: F640 0100 MOVW R1, #0x0800 0x34182066: F2C5 6102 MOVT R1, #0x5602 0x3418206A: 4288 CMP R0, R1 0x3418206C: F000 8085 BEQ.W 46L19 ; 0x3418217A 0x34182070: 980F LDR R0, [SP, #60] 0x34182072: F640 0100 MOVW R1, #0x0800 0x34182076: F2C4 6102 MOVT R1, #0x4602 0x3418207A: 4288 CMP R0, R1 0x3418207C: D07D BEQ 46L19 ; 0x3418217A 0x3418207E: 980F LDR R0, [SP, #60] 0x34182080: F640 4100 MOVW R1, #0x0C00 0x34182084: F2C5 6102 MOVT R1, #0x5602 0x34182088: 4288 CMP R0, R1 0x3418208A: D076 BEQ 46L19 ; 0x3418217A 0x3418208C: 980F LDR R0, [SP, #60] 0x3418208E: F640 4100 MOVW R1, #0x0C00 0x34182092: F2C4 6102 MOVT R1, #0x4602 0x34182096: 4288 CMP R0, R1 0x34182098: D06F BEQ 46L19 ; 0x3418217A 0x3418209A: 980F LDR R0, [SP, #60] 0x3418209C: F241 0100 MOVW R1, #0x1000 0x341820A0: F2C5 6102 MOVT R1, #0x5602 0x341820A4: 4288 CMP R0, R1 0x341820A6: D068 BEQ 46L19 ; 0x3418217A 0x341820A8: 980F LDR R0, [SP, #60] 0x341820AA: F241 0100 MOVW R1, #0x1000 0x341820AE: F2C4 6102 MOVT R1, #0x4602 0x341820B2: 4288 CMP R0, R1 0x341820B4: D061 BEQ 46L19 ; 0x3418217A 0x341820B6: 980F LDR R0, [SP, #60] 0x341820B8: F241 4100 MOVW R1, #0x1400 0x341820BC: F2C5 6102 MOVT R1, #0x5602 0x341820C0: 4288 CMP R0, R1 0x341820C2: D05A BEQ 46L19 ; 0x3418217A 0x341820C4: 980F LDR R0, [SP, #60] 0x341820C6: F241 4100 MOVW R1, #0x1400 0x341820CA: F2C4 6102 MOVT R1, #0x4602 0x341820CE: 4288 CMP R0, R1 0x341820D0: D053 BEQ 46L19 ; 0x3418217A 0x341820D2: 980F LDR R0, [SP, #60] 0x341820D4: F641 0100 MOVW R1, #0x1800 0x341820D8: F2C5 6102 MOVT R1, #0x5602 0x341820DC: 4288 CMP R0, R1 0x341820DE: D04C BEQ 46L19 ; 0x3418217A 0x341820E0: 980F LDR R0, [SP, #60] 0x341820E2: F641 0100 MOVW R1, #0x1800 0x341820E6: F2C4 6102 MOVT R1, #0x4602 0x341820EA: 4288 CMP R0, R1 0x341820EC: D045 BEQ 46L19 ; 0x3418217A 0x341820EE: 980F LDR R0, [SP, #60] 0x341820F0: F641 4100 MOVW R1, #0x1C00 0x341820F4: F2C5 6102 MOVT R1, #0x5602 0x341820F8: 4288 CMP R0, R1 0x341820FA: D03E BEQ 46L19 ; 0x3418217A 0x341820FC: 980F LDR R0, [SP, #60] 0x341820FE: F641 4100 MOVW R1, #0x1C00 0x34182102: F2C4 6102 MOVT R1, #0x4602 0x34182106: 4288 CMP R0, R1 0x34182108: D037 BEQ 46L19 ; 0x3418217A 0x3418210A: 980F LDR R0, [SP, #60] 0x3418210C: F243 4100 MOVW R1, #0x3400 0x34182110: F2C5 6102 MOVT R1, #0x5602 0x34182114: 4288 CMP R0, R1 0x34182116: D030 BEQ 46L19 ; 0x3418217A 0x34182118: 980F LDR R0, [SP, #60] 0x3418211A: F243 4100 MOVW R1, #0x3400 0x3418211E: F2C4 6102 MOVT R1, #0x4602 0x34182122: 4288 CMP R0, R1 0x34182124: D029 BEQ 46L19 ; 0x3418217A 0x34182126: 980F LDR R0, [SP, #60] 0x34182128: F643 0100 MOVW R1, #0x3800 0x3418212C: F2C5 6102 MOVT R1, #0x5602 0x34182130: 4288 CMP R0, R1 0x34182132: D022 BEQ 46L19 ; 0x3418217A 0x34182134: 980F LDR R0, [SP, #60] 0x34182136: F643 0100 MOVW R1, #0x3800 0x3418213A: F2C4 6102 MOVT R1, #0x4602 0x3418213E: 4288 CMP R0, R1 0x34182140: D01B BEQ 46L19 ; 0x3418217A 0x34182142: 980F LDR R0, [SP, #60] 0x34182144: F643 4100 MOVW R1, #0x3C00 0x34182148: F2C5 6102 MOVT R1, #0x5602 0x3418214C: 4288 CMP R0, R1 0x3418214E: D014 BEQ 46L19 ; 0x3418217A 0x34182150: 980F LDR R0, [SP, #60] 0x34182152: F643 4100 MOVW R1, #0x3C00 0x34182156: F2C4 6102 MOVT R1, #0x4602 0x3418215A: 4288 CMP R0, R1 0x3418215C: D00D BEQ 46L19 ; 0x3418217A 0x3418215E: 980F LDR R0, [SP, #60] 0x34182160: F244 0100 MOVW R1, #0x4000 0x34182164: F2C5 6102 MOVT R1, #0x5602 0x34182168: 4288 CMP R0, R1 0x3418216A: D006 BEQ 46L19 ; 0x3418217A 0x3418216C: 980F LDR R0, [SP, #60] 0x3418216E: F244 0100 MOVW R1, #0x4000 0x34182172: F2C4 6102 MOVT R1, #0x4602 0x34182176: 4288 CMP R0, R1 0x34182178: D100 BNE 46L20 ; 0x3418217C
.L19: 0x3418217A: E006 B 46L21 ; 0x3418218A
.L20: 0x3418217C: F244 10E4 MOVW R0, #0x41E4 ; 0x341941E4 = .rodata..L.str.33 0x34182180: F2C3 4019 MOVT R0, #0x3419 ; 0x341941E4 = .rodata..L.str.33 0x34182184: 21DE MOVS R1, #222 0x34182186: F00B FD87 BL assert_failed ; 0x3418DC98
.L21: 0x3418218A: 980E LDR R0, [SP, #56] 0x3418218C: 6900 LDR R0, [R0, #16] 0x3418218E: 280F CMP R0, #15 0x34182190: D800 BHI 46L22 ; 0x34182194 0x34182192: E006 B 46L23 ; 0x341821A2
.L22: 0x34182194: F244 10E4 MOVW R0, #0x41E4 ; 0x341941E4 = .rodata..L.str.33 0x34182198: F2C3 4019 MOVT R0, #0x3419 ; 0x341941E4 = .rodata..L.str.33 0x3418219C: 21DF MOVS R1, #223 0x3418219E: F00B FD7B BL assert_failed ; 0x3418DC98
.L23: 0x341821A2: 980F LDR R0, [SP, #60] 0x341821A4: 990D LDR R1, [SP, #52] 0x341821A6: F06F 0203 MVN R2, #3 0x341821AA: EA02 0151 AND.W R1, R2, R1, LSR #1 0x341821AE: 4408 ADD R0, R1 0x341821B0: 6A00 LDR R0, [R0, #32] 0x341821B2: 900B STR R0, [SP, #44] 0x341821B4: 980D LDR R0, [SP, #52] 0x341821B6: F000 0007 AND R0, R0, #7 0x341821BA: 0081 LSLS R1, R0, #2 0x341821BC: 200F MOVS R0, #15 0x341821BE: FA00 F101 LSL.W R1, R0, R1 0x341821C2: 980B LDR R0, [SP, #44] 0x341821C4: 4388 BICS R0, R1 0x341821C6: 900B STR R0, [SP, #44] 0x341821C8: 980E LDR R0, [SP, #56] 0x341821CA: 6900 LDR R0, [R0, #16] 0x341821CC: 990D LDR R1, [SP, #52] 0x341821CE: F001 0107 AND R1, R1, #7 0x341821D2: 0089 LSLS R1, R1, #2 0x341821D4: FA00 F101 LSL.W R1, R0, R1 0x341821D8: 980B LDR R0, [SP, #44] 0x341821DA: 4308 ORRS R0, R1 0x341821DC: 900B STR R0, [SP, #44] 0x341821DE: 980B LDR R0, [SP, #44] 0x341821E0: 990F LDR R1, [SP, #60] 0x341821E2: 9B0D LDR R3, [SP, #52] 0x341821E4: EA02 0253 AND.W R2, R2, R3, LSR #1 0x341821E8: 4411 ADD R1, R2 0x341821EA: 6208 STR R0, [R1, #32]
.L24: 0x341821EC: 980F LDR R0, [SP, #60] 0x341821EE: 6800 LDR R0, [R0] 0x341821F0: 900B STR R0, [SP, #44] 0x341821F2: 980D LDR R0, [SP, #52] 0x341821F4: 0041 LSLS R1, R0, #1 0x341821F6: 2003 MOVS R0, #3 0x341821F8: FA00 F101 LSL.W R1, R0, R1 0x341821FC: 980B LDR R0, [SP, #44] 0x341821FE: 4388 BICS R0, R1 0x34182200: 900B STR R0, [SP, #44] 0x34182202: 980E LDR R0, [SP, #56] 0x34182204: 6840 LDR R0, [R0, #4] 0x34182206: F000 0003 AND R0, R0, #3 0x3418220A: 990D LDR R1, [SP, #52] 0x3418220C: 0049 LSLS R1, R1, #1 0x3418220E: FA00 F101 LSL.W R1, R0, R1 0x34182212: 980B LDR R0, [SP, #44] 0x34182214: 4308 ORRS R0, R1 0x34182216: 900B STR R0, [SP, #44] 0x34182218: 980B LDR R0, [SP, #44] 0x3418221A: 990F LDR R1, [SP, #60] 0x3418221C: 6008 STR R0, [R1] 0x3418221E: 980E LDR R0, [SP, #56] 0x34182220: 7980 LDRB R0, [R0, #6] 0x34182222: 0780 LSLS R0, R0, #30 0x34182224: 2800 CMP R0, #0 0x34182226: F000 8115 BEQ.W 46L51 ; 0x34182454 0x3418222A: 980D LDR R0, [SP, #52] 0x3418222C: F020 0003 BIC R0, R0, #3 0x34182230: F245 0160 MOVW R1, #0x5060 0x34182234: F2C5 6102 MOVT R1, #0x5602 0x34182238: 5840 LDR R0, [R0, R1] 0x3418223A: 900B STR R0, [SP, #44] 0x3418223C: 980D LDR R0, [SP, #52] 0x3418223E: F000 0003 AND R0, R0, #3 0x34182242: 00C1 LSLS R1, R0, #3 0x34182244: 200F MOVS R0, #15 0x34182246: FA00 F101 LSL.W R1, R0, R1 0x3418224A: 980B LDR R0, [SP, #44] 0x3418224C: 4388 BICS R0, R1 0x3418224E: 900B STR R0, [SP, #44] 0x34182250: 980F LDR R0, [SP, #60] 0x34182252: 2100 MOVS R1, #0 0x34182254: F2C5 6102 MOVT R1, #0x5602 0x34182258: 4288 CMP R0, R1 0x3418225A: D102 BNE 46L25 ; 0x34182262 0x3418225C: 2000 MOVS R0, #0 0x3418225E: 900A STR R0, [SP, #40] 0x34182260: E082 B 46L46 ; 0x34182368
.L25: 0x34182262: 980F LDR R0, [SP, #60] 0x34182264: F240 4100 MOVW R1, #0x0400 0x34182268: F2C5 6102 MOVT R1, #0x5602 0x3418226C: 4288 CMP R0, R1 0x3418226E: D102 BNE 46L26 ; 0x34182276 0x34182270: 2001 MOVS R0, #1 0x34182272: 9009 STR R0, [SP, #36] 0x34182274: E076 B 46L45 ; 0x34182364
.L26: 0x34182276: 980F LDR R0, [SP, #60] 0x34182278: F640 0100 MOVW R1, #0x0800 0x3418227C: F2C5 6102 MOVT R1, #0x5602 0x34182280: 4288 CMP R0, R1 0x34182282: D102 BNE 46L27 ; 0x3418228A 0x34182284: 2002 MOVS R0, #2 0x34182286: 9008 STR R0, [SP, #32] 0x34182288: E06A B 46L44 ; 0x34182360
.L27: 0x3418228A: 980F LDR R0, [SP, #60] 0x3418228C: F640 4100 MOVW R1, #0x0C00 0x34182290: F2C5 6102 MOVT R1, #0x5602 0x34182294: 4288 CMP R0, R1 0x34182296: D102 BNE 46L28 ; 0x3418229E 0x34182298: 2003 MOVS R0, #3 0x3418229A: 9007 STR R0, [SP, #28] 0x3418229C: E05E B 46L43 ; 0x3418235C
.L28: 0x3418229E: 980F LDR R0, [SP, #60] 0x341822A0: F241 0100 MOVW R1, #0x1000 0x341822A4: F2C5 6102 MOVT R1, #0x5602 0x341822A8: 4288 CMP R0, R1 0x341822AA: D102 BNE 46L29 ; 0x341822B2 0x341822AC: 2004 MOVS R0, #4 0x341822AE: 9006 STR R0, [SP, #24] 0x341822B0: E052 B 46L42 ; 0x34182358
.L29: 0x341822B2: 980F LDR R0, [SP, #60] 0x341822B4: F241 4100 MOVW R1, #0x1400 0x341822B8: F2C5 6102 MOVT R1, #0x5602 0x341822BC: 4288 CMP R0, R1 0x341822BE: D102 BNE 46L30 ; 0x341822C6 0x341822C0: 2005 MOVS R0, #5 0x341822C2: 9005 STR R0, [SP, #20] 0x341822C4: E046 B 46L41 ; 0x34182354
.L30: 0x341822C6: 980F LDR R0, [SP, #60] 0x341822C8: F641 0100 MOVW R1, #0x1800 0x341822CC: F2C5 6102 MOVT R1, #0x5602 0x341822D0: 4288 CMP R0, R1 0x341822D2: D102 BNE 46L31 ; 0x341822DA 0x341822D4: 2006 MOVS R0, #6 0x341822D6: 9004 STR R0, [SP, #16] 0x341822D8: E03A B 46L40 ; 0x34182350
.L31: 0x341822DA: 980F LDR R0, [SP, #60] 0x341822DC: F641 4100 MOVW R1, #0x1C00 0x341822E0: F2C5 6102 MOVT R1, #0x5602 0x341822E4: 4288 CMP R0, R1 0x341822E6: D102 BNE 46L32 ; 0x341822EE 0x341822E8: 2007 MOVS R0, #7 0x341822EA: 9003 STR R0, [SP, #12] 0x341822EC: E02E B 46L39 ; 0x3418234C
.L32: 0x341822EE: 980F LDR R0, [SP, #60] 0x341822F0: F243 4100 MOVW R1, #0x3400 0x341822F4: F2C5 6102 MOVT R1, #0x5602 0x341822F8: 4288 CMP R0, R1 0x341822FA: D102 BNE 46L33 ; 0x34182302 0x341822FC: 2008 MOVS R0, #8 0x341822FE: 9002 STR R0, [SP, #8] 0x34182300: E022 B 46L38 ; 0x34182348
.L33: 0x34182302: 980F LDR R0, [SP, #60] 0x34182304: F643 0100 MOVW R1, #0x3800 0x34182308: F2C5 6102 MOVT R1, #0x5602 0x3418230C: 4288 CMP R0, R1 0x3418230E: D102 BNE 46L34 ; 0x34182316 0x34182310: 2009 MOVS R0, #9 0x34182312: 9001 STR R0, [SP, #4] 0x34182314: E016 B 46L37 ; 0x34182344
.L34: 0x34182316: 980F LDR R0, [SP, #60] 0x34182318: F643 4100 MOVW R1, #0x3C00 0x3418231C: F2C5 6102 MOVT R1, #0x5602 0x34182320: 4288 CMP R0, R1 0x34182322: D102 BNE 46L35 ; 0x3418232A 0x34182324: 200A MOVS R0, #10 0x34182326: 9000 STR R0, [SP, #0] 0x34182328: E00A B 46L36 ; 0x34182340
.L35: 0x3418232A: 980F LDR R0, [SP, #60] 0x3418232C: F244 0100 MOVW R1, #0x4000 0x34182330: F2C5 6102 MOVT R1, #0x5602 0x34182334: 4288 CMP R0, R1 0x34182336: F04F 0010 MOV.W R0, #16 0x3418233A: BF08 IT EQ 0x3418233C: 200B MOVEQ R0, #11 0x3418233E: 9000 STR R0, [SP, #0]
.L36: 0x34182340: 9800 LDR R0, [SP, #0] 0x34182342: 9001 STR R0, [SP, #4]
.L37: 0x34182344: 9801 LDR R0, [SP, #4] 0x34182346: 9002 STR R0, [SP, #8]
.L38: 0x34182348: 9802 LDR R0, [SP, #8] 0x3418234A: 9003 STR R0, [SP, #12]
.L39: 0x3418234C: 9803 LDR R0, [SP, #12] 0x3418234E: 9004 STR R0, [SP, #16]
.L40: 0x34182350: 9804 LDR R0, [SP, #16] 0x34182352: 9005 STR R0, [SP, #20]
.L41: 0x34182354: 9805 LDR R0, [SP, #20] 0x34182356: 9006 STR R0, [SP, #24]
.L42: 0x34182358: 9806 LDR R0, [SP, #24] 0x3418235A: 9007 STR R0, [SP, #28]
.L43: 0x3418235C: 9807 LDR R0, [SP, #28] 0x3418235E: 9008 STR R0, [SP, #32]
.L44: 0x34182360: 9808 LDR R0, [SP, #32] 0x34182362: 9009 STR R0, [SP, #36]
.L45: 0x34182364: 9809 LDR R0, [SP, #36] 0x34182366: 900A STR R0, [SP, #40]
.L46: 0x34182368: 980A LDR R0, [SP, #40] 0x3418236A: 990D LDR R1, [SP, #52] 0x3418236C: F001 0103 AND R1, R1, #3 0x34182370: 00C9 LSLS R1, R1, #3 0x34182372: FA00 F101 LSL.W R1, R0, R1 0x34182376: 980B LDR R0, [SP, #44] 0x34182378: 4308 ORRS R0, R1 0x3418237A: 900B STR R0, [SP, #44] 0x3418237C: 980B LDR R0, [SP, #44] 0x3418237E: 990D LDR R1, [SP, #52] 0x34182380: F021 0103 BIC R1, R1, #3 0x34182384: F245 0260 MOVW R2, #0x5060 0x34182388: F2C5 6202 MOVT R2, #0x5602 0x3418238C: 5088 STR R0, [R1, R2] 0x3418238E: F245 0080 MOVW R0, #0x5080 0x34182392: F2C5 6002 MOVT R0, #0x5602 0x34182396: 6800 LDR R0, [R0] 0x34182398: 900B STR R0, [SP, #44] 0x3418239A: 990C LDR R1, [SP, #48] 0x3418239C: 980B LDR R0, [SP, #44] 0x3418239E: 4388 BICS R0, R1 0x341823A0: 900B STR R0, [SP, #44] 0x341823A2: 980E LDR R0, [SP, #56] 0x341823A4: 7980 LDRB R0, [R0, #6] 0x341823A6: 07C0 LSLS R0, R0, #31 0x341823A8: B118 CBZ R0, .L47 ; 0x341823B2 0x341823AA: 990C LDR R1, [SP, #48] 0x341823AC: 980B LDR R0, [SP, #44] 0x341823AE: 4308 ORRS R0, R1 0x341823B0: 900B STR R0, [SP, #44]
.L47: 0x341823B2: 980B LDR R0, [SP, #44] 0x341823B4: F245 0180 MOVW R1, #0x5080 0x341823B8: F2C5 6102 MOVT R1, #0x5602 0x341823BC: 6008 STR R0, [R1] 0x341823BE: F245 0084 MOVW R0, #0x5084 0x341823C2: F2C5 6002 MOVT R0, #0x5602 0x341823C6: 6800 LDR R0, [R0] 0x341823C8: 900B STR R0, [SP, #44] 0x341823CA: 990C LDR R1, [SP, #48] 0x341823CC: 980B LDR R0, [SP, #44] 0x341823CE: 4388 BICS R0, R1 0x341823D0: 900B STR R0, [SP, #44] 0x341823D2: 980E LDR R0, [SP, #56] 0x341823D4: 7980 LDRB R0, [R0, #6] 0x341823D6: 0780 LSLS R0, R0, #30 0x341823D8: 2800 CMP R0, #0 0x341823DA: D503 BPL 46L48 ; 0x341823E4 0x341823DC: 990C LDR R1, [SP, #48] 0x341823DE: 980B LDR R0, [SP, #44] 0x341823E0: 4308 ORRS R0, R1 0x341823E2: 900B STR R0, [SP, #44]
.L48: 0x341823E4: 980B LDR R0, [SP, #44] 0x341823E6: F245 0184 MOVW R1, #0x5084 0x341823EA: F2C5 6102 MOVT R1, #0x5602 0x341823EE: 6008 STR R0, [R1] 0x341823F0: F245 0000 MOVW R0, #0x5000 0x341823F4: F2C5 6002 MOVT R0, #0x5602 0x341823F8: 6800 LDR R0, [R0] 0x341823FA: 900B STR R0, [SP, #44] 0x341823FC: 990C LDR R1, [SP, #48] 0x341823FE: 980B LDR R0, [SP, #44] 0x34182400: 4388 BICS R0, R1 0x34182402: 900B STR R0, [SP, #44] 0x34182404: 980E LDR R0, [SP, #56] 0x34182406: 7980 LDRB R0, [R0, #6] 0x34182408: 06C0 LSLS R0, R0, #27 0x3418240A: 2800 CMP R0, #0 0x3418240C: D503 BPL 46L49 ; 0x34182416 0x3418240E: 990C LDR R1, [SP, #48] 0x34182410: 980B LDR R0, [SP, #44] 0x34182412: 4308 ORRS R0, R1 0x34182414: 900B STR R0, [SP, #44]
.L49: 0x34182416: 980B LDR R0, [SP, #44] 0x34182418: F245 0100 MOVW R1, #0x5000 0x3418241C: F2C5 6102 MOVT R1, #0x5602 0x34182420: 6008 STR R0, [R1] 0x34182422: F245 0004 MOVW R0, #0x5004 0x34182426: F2C5 6002 MOVT R0, #0x5602 0x3418242A: 6800 LDR R0, [R0] 0x3418242C: 900B STR R0, [SP, #44] 0x3418242E: 990C LDR R1, [SP, #48] 0x34182430: 980B LDR R0, [SP, #44] 0x34182432: 4388 BICS R0, R1 0x34182434: 900B STR R0, [SP, #44] 0x34182436: 980E LDR R0, [SP, #56] 0x34182438: 7980 LDRB R0, [R0, #6] 0x3418243A: 0680 LSLS R0, R0, #26 0x3418243C: 2800 CMP R0, #0 0x3418243E: D503 BPL 46L50 ; 0x34182448 0x34182440: 990C LDR R1, [SP, #48] 0x34182442: 980B LDR R0, [SP, #44] 0x34182444: 4308 ORRS R0, R1 0x34182446: 900B STR R0, [SP, #44]
.L50: 0x34182448: 980B LDR R0, [SP, #44] 0x3418244A: F245 0104 MOVW R1, #0x5004 0x3418244E: F2C5 6102 MOVT R1, #0x5602 0x34182452: 6008 STR R0, [R1]
.L51: 0x34182454: 980D LDR R0, [SP, #52] 0x34182456: 3001 ADDS R0, #1 0x34182458: 900D STR R0, [SP, #52] 0x3418245A: E541 B 46L8 ; 0x34181EE0
.L52: 0x3418245C: B010 ADD SP, SP, #64 0x3418245E: BD80 POP 123R7, PC}

Section .text.LL_RCC_HSI_SetDivider from blto2_FSBL_lto.o, size=28, align=4


LL_RCC_HSI_SetDivider: 0x34182460: B081 SUB SP, SP, #4 0x34182462: 9000 STR R0, [SP, #0] 0x34182464: F248 0148 MOVW R1, #0x8048 0x34182468: F2C5 6102 MOVT R1, #0x5602 0x3418246C: 6808 LDR R0, [R1] 0x3418246E: F420 70C0 BIC R0, R0, #0x0180 0x34182472: 9A00 LDR R2, [SP, #0] 0x34182474: 4310 ORRS R0, R2 0x34182476: 6008 STR R0, [R1] 0x34182478: B001 ADD SP, SP, #4 0x3418247A: 4770 BX LR

Section .text.LL_RCC_HSI_IsReady from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_HSI_IsReady: 0x3418247C: F248 0004 MOVW R0, #0x8004 0x34182480: F2C5 6002 MOVT R0, #0x5602 0x34182484: 6800 LDR R0, [R0] 0x34182486: F3C0 00C0 UBFX R0, R0, #3, #1 0x3418248A: 4770 BX LR

Section .text.LL_RCC_GetCpuClkSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_GetCpuClkSource: 0x3418248C: F248 0020 MOVW R0, #0x8020 0x34182490: F2C5 6002 MOVT R0, #0x5602 0x34182494: 6800 LDR R0, [R0] 0x34182496: F400 1040 AND R0, R0, #0x300000 0x3418249A: 4770 BX LR

Section .text.LL_RCC_GetSysClkSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_GetSysClkSource: 0x3418249C: F248 0020 MOVW R0, #0x8020 0x341824A0: F2C5 6002 MOVT R0, #0x5602 0x341824A4: 6800 LDR R0, [R0] 0x341824A6: F000 5040 AND R0, R0, #0x30000000 0x341824AA: 4770 BX LR

Section .text.LL_RCC_PLL1_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL1_GetSource: 0x341824AC: F248 0080 MOVW R0, #0x8080 0x341824B0: F2C5 6002 MOVT R0, #0x5602 0x341824B4: 6800 LDR R0, [R0] 0x341824B6: F000 40E0 AND R0, R0, #0x70000000 0x341824BA: 4770 BX LR

Section .text.LL_RCC_PLL2_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL2_GetSource: 0x341824BC: F248 0090 MOVW R0, #0x8090 0x341824C0: F2C5 6002 MOVT R0, #0x5602 0x341824C4: 6800 LDR R0, [R0] 0x341824C6: F000 40E0 AND R0, R0, #0x70000000 0x341824CA: 4770 BX LR

Section .text.LL_RCC_PLL3_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL3_GetSource: 0x341824CC: F248 00A0 MOVW R0, #0x80A0 0x341824D0: F2C5 6002 MOVT R0, #0x5602 0x341824D4: 6800 LDR R0, [R0] 0x341824D6: F000 40E0 AND R0, R0, #0x70000000 0x341824DA: 4770 BX LR

Section .text.LL_RCC_PLL4_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL4_GetSource: 0x341824DC: F248 00B0 MOVW R0, #0x80B0 0x341824E0: F2C5 6002 MOVT R0, #0x5602 0x341824E4: 6800 LDR R0, [R0] 0x341824E6: F000 40E0 AND R0, R0, #0x70000000 0x341824EA: 4770 BX LR

Section .text.LL_RCC_MSI_SetFrequency from blto2_FSBL_lto.o, size=28, align=4


LL_RCC_MSI_SetFrequency: 0x341824EC: B081 SUB SP, SP, #4 0x341824EE: 9000 STR R0, [SP, #0] 0x341824F0: F248 0144 MOVW R1, #0x8044 0x341824F4: F2C5 6102 MOVT R1, #0x5602 0x341824F8: 6808 LDR R0, [R1] 0x341824FA: F420 7000 BIC R0, R0, #0x0200 0x341824FE: 9A00 LDR R2, [SP, #0] 0x34182500: 4310 ORRS R0, R2 0x34182502: 6008 STR R0, [R1] 0x34182504: B001 ADD SP, SP, #4 0x34182506: 4770 BX LR

Section .text.LL_RCC_MSI_IsReady from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_MSI_IsReady: 0x34182508: F248 0004 MOVW R0, #0x8004 0x3418250C: F2C5 6002 MOVT R0, #0x5602 0x34182510: 6800 LDR R0, [R0] 0x34182512: F3C0 0080 UBFX R0, R0, #2, #1 0x34182516: 4770 BX LR

Section .text.LL_RCC_LSI_IsReady from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_LSI_IsReady: 0x34182518: F248 0004 MOVW R0, #0x8004 0x3418251C: F2C5 6002 MOVT R0, #0x5602 0x34182520: 6800 LDR R0, [R0] 0x34182522: F000 0001 AND R0, R0, #1 0x34182526: 4770 BX LR

Section .text.LL_RCC_LSE_IsReady from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_LSE_IsReady: 0x34182528: F248 0004 MOVW R0, #0x8004 0x3418252C: F2C5 6002 MOVT R0, #0x5602 0x34182530: 6800 LDR R0, [R0] 0x34182532: F3C0 0040 UBFX R0, R0, #1, #1 0x34182536: 4770 BX LR

Section .text.LL_RCC_PLL1_IsReady from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL1_IsReady: 0x34182538: F248 0004 MOVW R0, #0x8004 0x3418253C: F2C5 6002 MOVT R0, #0x5602 0x34182540: 6800 LDR R0, [R0] 0x34182542: F3C0 2000 UBFX R0, R0, #8, #1 0x34182546: 4770 BX LR

Section .text.LL_RCC_IC1_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC1_GetSource: 0x34182548: F248 00C4 MOVW R0, #0x80C4 0x3418254C: F2C5 6002 MOVT R0, #0x5602 0x34182550: 6800 LDR R0, [R0] 0x34182552: F000 5040 AND R0, R0, #0x30000000 0x34182556: 4770 BX LR

Section .text.LL_RCC_IC2_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC2_GetSource: 0x34182558: F248 00C8 MOVW R0, #0x80C8 0x3418255C: F2C5 6002 MOVT R0, #0x5602 0x34182560: 6800 LDR R0, [R0] 0x34182562: F000 5040 AND R0, R0, #0x30000000 0x34182566: 4770 BX LR

Section .text.LL_RCC_IC6_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC6_GetSource: 0x34182568: F248 00D8 MOVW R0, #0x80D8 0x3418256C: F2C5 6002 MOVT R0, #0x5602 0x34182570: 6800 LDR R0, [R0] 0x34182572: F000 5040 AND R0, R0, #0x30000000 0x34182576: 4770 BX LR

Section .text.LL_RCC_IC11_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC11_GetSource: 0x34182578: F248 00EC MOVW R0, #0x80EC 0x3418257C: F2C5 6002 MOVT R0, #0x5602 0x34182580: 6800 LDR R0, [R0] 0x34182582: F000 5040 AND R0, R0, #0x30000000 0x34182586: 4770 BX LR

Section .text.LL_RCC_PLL2_IsReady from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL2_IsReady: 0x34182588: F248 0004 MOVW R0, #0x8004 0x3418258C: F2C5 6002 MOVT R0, #0x5602 0x34182590: 6800 LDR R0, [R0] 0x34182592: F3C0 2040 UBFX R0, R0, #9, #1 0x34182596: 4770 BX LR

Section .text.LL_RCC_PLL3_IsReady from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL3_IsReady: 0x34182598: F248 0004 MOVW R0, #0x8004 0x3418259C: F2C5 6002 MOVT R0, #0x5602 0x341825A0: 6800 LDR R0, [R0] 0x341825A2: F3C0 2080 UBFX R0, R0, #10, #1 0x341825A6: 4770 BX LR

Section .text.LL_RCC_PLL4_IsReady from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL4_IsReady: 0x341825A8: F248 0004 MOVW R0, #0x8004 0x341825AC: F2C5 6002 MOVT R0, #0x5602 0x341825B0: 6800 LDR R0, [R0] 0x341825B2: F3C0 20C0 UBFX R0, R0, #11, #1 0x341825B6: 4770 BX LR

Section .text.RCC_PLL_Source_IsReady from blto2_FSBL_lto.o, size=84, align=4


RCC_PLL_Source_IsReady: 0x341825B8: B580 PUSH 123R7, LR} 0x341825BA: B084 SUB SP, SP, #16 0x341825BC: 9003 STR R0, [SP, #12] 0x341825BE: 2001 MOVS R0, #1 0x341825C0: 9002 STR R0, [SP, #8] 0x341825C2: 9803 LDR R0, [SP, #12] 0x341825C4: 9001 STR R0, [SP, #4] 0x341825C6: B160 CBZ R0, .L1 ; 0x341825E2 0x341825C8: 9801 LDR R0, [SP, #4] 0x341825CA: F1B0 5F80 CMP.W R0, #0x10000000 0x341825CE: D00E BEQ 46L3 ; 0x341825EE 0x341825D0: 9801 LDR R0, [SP, #4] 0x341825D2: F1B0 5F00 CMP.W R0, #0x20000000 0x341825D6: D010 BEQ 46L5 ; 0x341825FA 0x341825D8: 9801 LDR R0, [SP, #4] 0x341825DA: F1B0 5F40 CMP.W R0, #0x30000000 0x341825DE: D012 BEQ 46L7 ; 0x34182606 0x341825E0: E011 B 46L7 ; 0x34182606
.L1: 0x341825E2: F7FF FF4B BL LL_RCC_HSI_IsReady ; 0x3418247C 0x341825E6: B908 CBNZ R0, .L2 ; 0x341825EC 0x341825E8: 2000 MOVS R0, #0 0x341825EA: 9002 STR R0, [SP, #8]
.L2: 0x341825EC: E00B B 46L7 ; 0x34182606
.L3: 0x341825EE: F7FF FF8B BL LL_RCC_MSI_IsReady ; 0x34182508 0x341825F2: B908 CBNZ R0, .L4 ; 0x341825F8 0x341825F4: 2000 MOVS R0, #0 0x341825F6: 9002 STR R0, [SP, #8]
.L4: 0x341825F8: E005 B 46L7 ; 0x34182606
.L5: 0x341825FA: F000 F807 BL LL_RCC_HSE_IsReady ; 0x3418260C 0x341825FE: B908 CBNZ R0, .L6 ; 0x34182604 0x34182600: 2000 MOVS R0, #0 0x34182602: 9002 STR R0, [SP, #8]
.L6: 0x34182604: E7FF B 46L7 ; 0x34182606
.L7: 0x34182606: 9802 LDR R0, [SP, #8] 0x34182608: B004 ADD SP, SP, #16 0x3418260A: BD80 POP 123R7, PC}

Section .text.LL_RCC_HSE_IsReady from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_HSE_IsReady: 0x3418260C: F248 0004 MOVW R0, #0x8004 0x34182610: F2C5 6002 MOVT R0, #0x5602 0x34182614: 6800 LDR R0, [R0] 0x34182616: F3C0 1000 UBFX R0, R0, #4, #1 0x3418261A: 4770 BX LR

Section .text.LL_RCC_HSI_GetDivider from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_HSI_GetDivider: 0x3418261C: F248 0048 MOVW R0, #0x8048 0x34182620: F2C5 6002 MOVT R0, #0x5602 0x34182624: 6800 LDR R0, [R0] 0x34182626: F400 70C0 AND R0, R0, #0x0180 0x3418262A: 4770 BX LR

Section .text.LL_RCC_PLL1_IsEnabledBypass from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL1_IsEnabledBypass: 0x3418262C: F248 0080 MOVW R0, #0x8080 0x34182630: F2C5 6002 MOVT R0, #0x5602 0x34182634: 6800 LDR R0, [R0] 0x34182636: F3C0 60C0 UBFX R0, R0, #27, #1 0x3418263A: 4770 BX LR

Section .text.LL_RCC_PLL2_IsEnabledBypass from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL2_IsEnabledBypass: 0x3418263C: F248 0090 MOVW R0, #0x8090 0x34182640: F2C5 6002 MOVT R0, #0x5602 0x34182644: 6800 LDR R0, [R0] 0x34182646: F3C0 60C0 UBFX R0, R0, #27, #1 0x3418264A: 4770 BX LR

Section .text.LL_RCC_PLL3_IsEnabledBypass from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL3_IsEnabledBypass: 0x3418264C: F248 00A0 MOVW R0, #0x80A0 0x34182650: F2C5 6002 MOVT R0, #0x5602 0x34182654: 6800 LDR R0, [R0] 0x34182656: F3C0 60C0 UBFX R0, R0, #27, #1 0x3418265A: 4770 BX LR

Section .text.LL_RCC_PLL4_IsEnabledBypass from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL4_IsEnabledBypass: 0x3418265C: F248 00B0 MOVW R0, #0x80B0 0x34182660: F2C5 6002 MOVT R0, #0x5602 0x34182664: 6800 LDR R0, [R0] 0x34182666: F3C0 60C0 UBFX R0, R0, #27, #1 0x3418266A: 4770 BX LR

Section .text.RCC_GetSysClockFreq from blto2_FSBL_lto.o, size=232, align=4


RCC_GetSysClockFreq: 0x3418266C: B580 PUSH 123R7, LR} 0x3418266E: B086 SUB SP, SP, #24 0x34182670: 9005 STR R0, [SP, #20] 0x34182672: 9104 STR R1, [SP, #16] 0x34182674: 2000 MOVS R0, #0 0x34182676: 9003 STR R0, [SP, #12] 0x34182678: F7FF FF10 BL LL_RCC_GetSysClkSource ; 0x3418249C 0x3418267C: 4601 MOV R1, R0 0x3418267E: 9102 STR R1, [SP, #8] 0x34182680: B160 CBZ R0, .L1 ; 0x3418269C 0x34182682: 9802 LDR R0, [SP, #8] 0x34182684: F1B0 5F80 CMP.W R0, #0x10000000 0x34182688: D012 BEQ 46L2 ; 0x341826B0 0x3418268A: 9802 LDR R0, [SP, #8] 0x3418268C: F1B0 5F00 CMP.W R0, #0x20000000 0x34182690: D022 BEQ 46L3 ; 0x341826D8 0x34182692: 9802 LDR R0, [SP, #8] 0x34182694: F1B0 5F40 CMP.W R0, #0x30000000 0x34182698: D024 BEQ 46L4 ; 0x341826E4 0x3418269A: E058 B 46L10 ; 0x3418274E
.L1: 0x3418269C: F7FF FFBE BL LL_RCC_HSI_GetDivider ; 0x3418261C 0x341826A0: 09C1 LSRS R1, R0, #7 0x341826A2: F249 0000 MOVW R0, #0x9000 0x341826A6: F2C0 30D0 MOVT R0, #0x03D0 0x341826AA: 40C8 LSRS R0, R1 0x341826AC: 9003 STR R0, [SP, #12] 0x341826AE: E04E B 46L10 ; 0x3418274E
.L2: 0x341826B0: F248 0044 MOVW R0, #0x8044 0x341826B4: F2C5 6002 MOVT R0, #0x5602 0x341826B8: 6800 LDR R0, [R0] 0x341826BA: F400 7000 AND R0, R0, #0x0200 0x341826BE: F5B0 7F00 CMP.W R0, #0x0200 0x341826C2: F640 1000 MOVW R0, #0x0900 0x341826C6: F2C0 003D MOVT R0, #61 0x341826CA: BF04 ITT EQ 0x341826CC: F242 4000 MOVWEQ R0, #0x2400 0x341826D0: F2C0 00F4 MOVTEQ R0, #244 0x341826D4: 9003 STR R0, [SP, #12] 0x341826D6: E03A B 46L10 ; 0x3418274E
.L3: 0x341826D8: F646 4000 MOVW R0, #0x6C00 0x341826DC: F2C0 20DC MOVT R0, #0x02DC 0x341826E0: 9003 STR R0, [SP, #12] 0x341826E2: E034 B 46L10 ; 0x3418274E
.L4: 0x341826E4: 9805 LDR R0, [SP, #20] 0x341826E6: 9001 STR R0, [SP, #4] 0x341826E8: B160 CBZ R0, .L5 ; 0x34182704 0x341826EA: 9801 LDR R0, [SP, #4] 0x341826EC: F1B0 5F80 CMP.W R0, #0x10000000 0x341826F0: D011 BEQ 46L6 ; 0x34182716 0x341826F2: 9801 LDR R0, [SP, #4] 0x341826F4: F1B0 5F00 CMP.W R0, #0x20000000 0x341826F8: D016 BEQ 46L7 ; 0x34182728 0x341826FA: 9801 LDR R0, [SP, #4] 0x341826FC: F1B0 5F40 CMP.W R0, #0x30000000 0x34182700: D01B BEQ 46L8 ; 0x3418273A 0x34182702: E023 B 46L9 ; 0x3418274C
.L5: 0x34182704: F00F F8F4 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F0 0x34182708: 9003 STR R0, [SP, #12] 0x3418270A: 9803 LDR R0, [SP, #12] 0x3418270C: 9904 LDR R1, [SP, #16] 0x3418270E: FBB0 F0F1 UDIV R0, R0, R1 0x34182712: 9003 STR R0, [SP, #12] 0x34182714: E01A B 46L9 ; 0x3418274C
.L6: 0x34182716: F00F F92D BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191974 0x3418271A: 9003 STR R0, [SP, #12] 0x3418271C: 9803 LDR R0, [SP, #12] 0x3418271E: 9904 LDR R1, [SP, #16] 0x34182720: FBB0 F0F1 UDIV R0, R0, R1 0x34182724: 9003 STR R0, [SP, #12] 0x34182726: E011 B 46L9 ; 0x3418274C
.L7: 0x34182728: F00F F966 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919F8 0x3418272C: 9003 STR R0, [SP, #12] 0x3418272E: 9803 LDR R0, [SP, #12] 0x34182730: 9904 LDR R1, [SP, #16] 0x34182732: FBB0 F0F1 UDIV R0, R0, R1 0x34182736: 9003 STR R0, [SP, #12] 0x34182738: E008 B 46L9 ; 0x3418274C
.L8: 0x3418273A: F00F F99F BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A7C 0x3418273E: 9003 STR R0, [SP, #12] 0x34182740: 9803 LDR R0, [SP, #12] 0x34182742: 9904 LDR R1, [SP, #16] 0x34182744: FBB0 F0F1 UDIV R0, R0, R1 0x34182748: 9003 STR R0, [SP, #12] 0x3418274A: E7FF B 46L9 ; 0x3418274C
.L9: 0x3418274C: E7FF B 46L10 ; 0x3418274E
.L10: 0x3418274E: 9803 LDR R0, [SP, #12] 0x34182750: B006 ADD SP, SP, #24 0x34182752: BD80 POP 123R7, PC}

Section .text.HAL_RCC_GetClockConfig from blto2_FSBL_lto.o, size=240, align=4


HAL_RCC_GetClockConfig: 0x34182754: B082 SUB SP, SP, #8 0x34182756: 9001 STR R0, [SP, #4] 0x34182758: 9901 LDR R1, [SP, #4] 0x3418275A: 207F MOVS R0, #127 0x3418275C: 6008 STR R0, [R1] 0x3418275E: F248 0020 MOVW R0, #0x8020 0x34182762: F2C5 6002 MOVT R0, #0x5602 0x34182766: 6800 LDR R0, [R0] 0x34182768: 9000 STR R0, [SP, #0] 0x3418276A: 9800 LDR R0, [SP, #0] 0x3418276C: F400 1040 AND R0, R0, #0x300000 0x34182770: 0900 LSRS R0, R0, #4 0x34182772: 9901 LDR R1, [SP, #4] 0x34182774: 6048 STR R0, [R1, #4] 0x34182776: 9800 LDR R0, [SP, #0] 0x34182778: F000 5040 AND R0, R0, #0x30000000 0x3418277C: 0900 LSRS R0, R0, #4 0x3418277E: 9901 LDR R1, [SP, #4] 0x34182780: 6088 STR R0, [R1, #8] 0x34182782: F248 0024 MOVW R0, #0x8024 0x34182786: F2C5 6002 MOVT R0, #0x5602 0x3418278A: 6800 LDR R0, [R0] 0x3418278C: 9000 STR R0, [SP, #0] 0x3418278E: 9800 LDR R0, [SP, #0] 0x34182790: F400 00E0 AND R0, R0, #0x700000 0x34182794: 9901 LDR R1, [SP, #4] 0x34182796: 60C8 STR R0, [R1, #12] 0x34182798: 9800 LDR R0, [SP, #0] 0x3418279A: F000 0007 AND R0, R0, #7 0x3418279E: 9901 LDR R1, [SP, #4] 0x341827A0: 6108 STR R0, [R1, #16] 0x341827A2: 9800 LDR R0, [SP, #0] 0x341827A4: F000 0070 AND R0, R0, #112 0x341827A8: 9901 LDR R1, [SP, #4] 0x341827AA: 6148 STR R0, [R1, #20] 0x341827AC: 9800 LDR R0, [SP, #0] 0x341827AE: F400 40E0 AND R0, R0, #0x7000 0x341827B2: 9901 LDR R1, [SP, #4] 0x341827B4: 6188 STR R0, [R1, #24] 0x341827B6: 9800 LDR R0, [SP, #0] 0x341827B8: F400 20E0 AND R0, R0, #0x070000 0x341827BC: 9901 LDR R1, [SP, #4] 0x341827BE: 61C8 STR R0, [R1, #28] 0x341827C0: F248 00C4 MOVW R0, #0x80C4 0x341827C4: F2C5 6002 MOVT R0, #0x5602 0x341827C8: 6800 LDR R0, [R0] 0x341827CA: 9000 STR R0, [SP, #0] 0x341827CC: 9800 LDR R0, [SP, #0] 0x341827CE: F000 5040 AND R0, R0, #0x30000000 0x341827D2: 9901 LDR R1, [SP, #4] 0x341827D4: 6208 STR R0, [R1, #32] 0x341827D6: F89D 0002 LDRB.W R0, [SP, #2] 0x341827DA: 3001 ADDS R0, #1 0x341827DC: 9901 LDR R1, [SP, #4] 0x341827DE: 6248 STR R0, [R1, #36] 0x341827E0: F248 00C8 MOVW R0, #0x80C8 0x341827E4: F2C5 6002 MOVT R0, #0x5602 0x341827E8: 6800 LDR R0, [R0] 0x341827EA: 9000 STR R0, [SP, #0] 0x341827EC: 9800 LDR R0, [SP, #0] 0x341827EE: F000 5040 AND R0, R0, #0x30000000 0x341827F2: 9901 LDR R1, [SP, #4] 0x341827F4: 6288 STR R0, [R1, #40] 0x341827F6: F89D 0002 LDRB.W R0, [SP, #2] 0x341827FA: 3001 ADDS R0, #1 0x341827FC: 9901 LDR R1, [SP, #4] 0x341827FE: 62C8 STR R0, [R1, #44] 0x34182800: F248 00D8 MOVW R0, #0x80D8 0x34182804: F2C5 6002 MOVT R0, #0x5602 0x34182808: 6800 LDR R0, [R0] 0x3418280A: 9000 STR R0, [SP, #0] 0x3418280C: 9800 LDR R0, [SP, #0] 0x3418280E: F000 5040 AND R0, R0, #0x30000000 0x34182812: 9901 LDR R1, [SP, #4] 0x34182814: 6308 STR R0, [R1, #48] 0x34182816: F89D 0002 LDRB.W R0, [SP, #2] 0x3418281A: 3001 ADDS R0, #1 0x3418281C: 9901 LDR R1, [SP, #4] 0x3418281E: 6348 STR R0, [R1, #52] 0x34182820: F248 00EC MOVW R0, #0x80EC 0x34182824: F2C5 6002 MOVT R0, #0x5602 0x34182828: 6800 LDR R0, [R0] 0x3418282A: 9000 STR R0, [SP, #0] 0x3418282C: 9800 LDR R0, [SP, #0] 0x3418282E: F000 5040 AND R0, R0, #0x30000000 0x34182832: 9901 LDR R1, [SP, #4] 0x34182834: 6388 STR R0, [R1, #56] 0x34182836: F89D 0002 LDRB.W R0, [SP, #2] 0x3418283A: 3001 ADDS R0, #1 0x3418283C: 9901 LDR R1, [SP, #4] 0x3418283E: 63C8 STR R0, [R1, #60] 0x34182840: B002 ADD SP, SP, #8 0x34182842: 4770 BX LR

Section .text.HAL_RCCEx_PeriphCLKConfig from blto2_FSBL_lto.o, size=24268, align=4


HAL_RCCEx_PeriphCLKConfig: 0x34182844: B580 PUSH 123R7, LR} 0x34182846: B086 SUB SP, SP, #24 0x34182848: 9004 STR R0, [SP, #16] 0x3418284A: 2000 MOVS R0, #0 0x3418284C: F88D 0007 STRB.W R0, [SP, #7] 0x34182850: F88D 0006 STRB.W R0, [SP, #6] 0x34182854: 9804 LDR R0, [SP, #16] 0x34182856: 7840 LDRB R0, [R0, #1] 0x34182858: 0700 LSLS R0, R0, #28 0x3418285A: 2800 CMP R0, #0 0x3418285C: F100 8135 BMI.W 46L1 ; 0x34182ACA 0x34182860: 9804 LDR R0, [SP, #16] 0x34182862: 7980 LDRB R0, [R0, #6] 0x34182864: 0640 LSLS R0, R0, #25 0x34182866: 2800 CMP R0, #0 0x34182868: F100 812F BMI.W 46L1 ; 0x34182ACA 0x3418286C: 9804 LDR R0, [SP, #16] 0x3418286E: 7980 LDRB R0, [R0, #6] 0x34182870: 0600 LSLS R0, R0, #24 0x34182872: 2800 CMP R0, #0 0x34182874: F100 8129 BMI.W 46L1 ; 0x34182ACA 0x34182878: 9804 LDR R0, [SP, #16] 0x3418287A: 79C0 LDRB R0, [R0, #7] 0x3418287C: 07C0 LSLS R0, R0, #31 0x3418287E: 2800 CMP R0, #0 0x34182880: F040 8123 BNE.W 46L1 ; 0x34182ACA 0x34182884: 9804 LDR R0, [SP, #16] 0x34182886: 7800 LDRB R0, [R0] 0x34182888: 0740 LSLS R0, R0, #29 0x3418288A: 2800 CMP R0, #0 0x3418288C: F100 811D BMI.W 46L1 ; 0x34182ACA 0x34182890: 9804 LDR R0, [SP, #16] 0x34182892: 6800 LDR R0, [R0] 0x34182894: 07C0 LSLS R0, R0, #31 0x34182896: 2800 CMP R0, #0 0x34182898: F040 8117 BNE.W 46L1 ; 0x34182ACA 0x3418289C: 9804 LDR R0, [SP, #16] 0x3418289E: 7800 LDRB R0, [R0] 0x341828A0: 0780 LSLS R0, R0, #30 0x341828A2: 2800 CMP R0, #0 0x341828A4: F100 8111 BMI.W 46L1 ; 0x34182ACA 0x341828A8: 9804 LDR R0, [SP, #16] 0x341828AA: 7800 LDRB R0, [R0] 0x341828AC: 0700 LSLS R0, R0, #28 0x341828AE: 2800 CMP R0, #0 0x341828B0: F100 810B BMI.W 46L1 ; 0x34182ACA 0x341828B4: 9804 LDR R0, [SP, #16] 0x341828B6: 7800 LDRB R0, [R0] 0x341828B8: 06C0 LSLS R0, R0, #27 0x341828BA: 2800 CMP R0, #0 0x341828BC: F100 8105 BMI.W 46L1 ; 0x34182ACA 0x341828C0: 9804 LDR R0, [SP, #16] 0x341828C2: 7800 LDRB R0, [R0] 0x341828C4: 0680 LSLS R0, R0, #26 0x341828C6: 2800 CMP R0, #0 0x341828C8: F100 80FF BMI.W 46L1 ; 0x34182ACA 0x341828CC: 9804 LDR R0, [SP, #16] 0x341828CE: 7800 LDRB R0, [R0] 0x341828D0: 0640 LSLS R0, R0, #25 0x341828D2: 2800 CMP R0, #0 0x341828D4: F100 80F9 BMI.W 46L1 ; 0x34182ACA 0x341828D8: 9804 LDR R0, [SP, #16] 0x341828DA: 7800 LDRB R0, [R0] 0x341828DC: 0600 LSLS R0, R0, #24 0x341828DE: 2800 CMP R0, #0 0x341828E0: F100 80F3 BMI.W 46L1 ; 0x34182ACA 0x341828E4: 9804 LDR R0, [SP, #16] 0x341828E6: 7840 LDRB R0, [R0, #1] 0x341828E8: 07C0 LSLS R0, R0, #31 0x341828EA: 2800 CMP R0, #0 0x341828EC: F040 80ED BNE.W 46L1 ; 0x34182ACA 0x341828F0: 9804 LDR R0, [SP, #16] 0x341828F2: 7840 LDRB R0, [R0, #1] 0x341828F4: 0780 LSLS R0, R0, #30 0x341828F6: 2800 CMP R0, #0 0x341828F8: F100 80E7 BMI.W 46L1 ; 0x34182ACA 0x341828FC: 9804 LDR R0, [SP, #16] 0x341828FE: 7840 LDRB R0, [R0, #1] 0x34182900: 0740 LSLS R0, R0, #29 0x34182902: 2800 CMP R0, #0 0x34182904: F100 80E1 BMI.W 46L1 ; 0x34182ACA 0x34182908: 9804 LDR R0, [SP, #16] 0x3418290A: 7840 LDRB R0, [R0, #1] 0x3418290C: 06C0 LSLS R0, R0, #27 0x3418290E: 2800 CMP R0, #0 0x34182910: F100 80DB BMI.W 46L1 ; 0x34182ACA 0x34182914: 9804 LDR R0, [SP, #16] 0x34182916: 7840 LDRB R0, [R0, #1] 0x34182918: 0680 LSLS R0, R0, #26 0x3418291A: 2800 CMP R0, #0 0x3418291C: F100 80D5 BMI.W 46L1 ; 0x34182ACA 0x34182920: 9804 LDR R0, [SP, #16] 0x34182922: 7840 LDRB R0, [R0, #1] 0x34182924: 0640 LSLS R0, R0, #25 0x34182926: 2800 CMP R0, #0 0x34182928: F100 80CF BMI.W 46L1 ; 0x34182ACA 0x3418292C: 9804 LDR R0, [SP, #16] 0x3418292E: 7840 LDRB R0, [R0, #1] 0x34182930: 0600 LSLS R0, R0, #24 0x34182932: 2800 CMP R0, #0 0x34182934: F100 80C9 BMI.W 46L1 ; 0x34182ACA 0x34182938: 9804 LDR R0, [SP, #16] 0x3418293A: 7880 LDRB R0, [R0, #2] 0x3418293C: 07C0 LSLS R0, R0, #31 0x3418293E: 2800 CMP R0, #0 0x34182940: F040 80C3 BNE.W 46L1 ; 0x34182ACA 0x34182944: 9804 LDR R0, [SP, #16] 0x34182946: 7880 LDRB R0, [R0, #2] 0x34182948: 0780 LSLS R0, R0, #30 0x3418294A: 2800 CMP R0, #0 0x3418294C: F100 80BD BMI.W 46L1 ; 0x34182ACA 0x34182950: 9804 LDR R0, [SP, #16] 0x34182952: 7880 LDRB R0, [R0, #2] 0x34182954: 0740 LSLS R0, R0, #29 0x34182956: 2800 CMP R0, #0 0x34182958: F100 80B7 BMI.W 46L1 ; 0x34182ACA 0x3418295C: 9804 LDR R0, [SP, #16] 0x3418295E: 7880 LDRB R0, [R0, #2] 0x34182960: 0700 LSLS R0, R0, #28 0x34182962: 2800 CMP R0, #0 0x34182964: F100 80B1 BMI.W 46L1 ; 0x34182ACA 0x34182968: 9804 LDR R0, [SP, #16] 0x3418296A: 7880 LDRB R0, [R0, #2] 0x3418296C: 06C0 LSLS R0, R0, #27 0x3418296E: 2800 CMP R0, #0 0x34182970: F100 80AB BMI.W 46L1 ; 0x34182ACA 0x34182974: 9804 LDR R0, [SP, #16] 0x34182976: 7880 LDRB R0, [R0, #2] 0x34182978: 0680 LSLS R0, R0, #26 0x3418297A: 2800 CMP R0, #0 0x3418297C: F100 80A5 BMI.W 46L1 ; 0x34182ACA 0x34182980: 9804 LDR R0, [SP, #16] 0x34182982: 7880 LDRB R0, [R0, #2] 0x34182984: 0640 LSLS R0, R0, #25 0x34182986: 2800 CMP R0, #0 0x34182988: F100 809F BMI.W 46L1 ; 0x34182ACA 0x3418298C: 9804 LDR R0, [SP, #16] 0x3418298E: 7880 LDRB R0, [R0, #2] 0x34182990: 0600 LSLS R0, R0, #24 0x34182992: 2800 CMP R0, #0 0x34182994: F100 8099 BMI.W 46L1 ; 0x34182ACA 0x34182998: 9804 LDR R0, [SP, #16] 0x3418299A: 78C0 LDRB R0, [R0, #3] 0x3418299C: 07C0 LSLS R0, R0, #31 0x3418299E: 2800 CMP R0, #0 0x341829A0: F040 8093 BNE.W 46L1 ; 0x34182ACA 0x341829A4: 9804 LDR R0, [SP, #16] 0x341829A6: 78C0 LDRB R0, [R0, #3] 0x341829A8: 0780 LSLS R0, R0, #30 0x341829AA: 2800 CMP R0, #0 0x341829AC: F100 808D BMI.W 46L1 ; 0x34182ACA 0x341829B0: 9804 LDR R0, [SP, #16] 0x341829B2: 78C0 LDRB R0, [R0, #3] 0x341829B4: 0740 LSLS R0, R0, #29 0x341829B6: 2800 CMP R0, #0 0x341829B8: F100 8087 BMI.W 46L1 ; 0x34182ACA 0x341829BC: 9804 LDR R0, [SP, #16] 0x341829BE: 78C0 LDRB R0, [R0, #3] 0x341829C0: 0700 LSLS R0, R0, #28 0x341829C2: 2800 CMP R0, #0 0x341829C4: F100 8081 BMI.W 46L1 ; 0x34182ACA 0x341829C8: 9804 LDR R0, [SP, #16] 0x341829CA: 78C0 LDRB R0, [R0, #3] 0x341829CC: 06C0 LSLS R0, R0, #27 0x341829CE: 2800 CMP R0, #0 0x341829D0: D47B BMI 46L1 ; 0x34182ACA 0x341829D2: 9804 LDR R0, [SP, #16] 0x341829D4: 78C0 LDRB R0, [R0, #3] 0x341829D6: 0680 LSLS R0, R0, #26 0x341829D8: 2800 CMP R0, #0 0x341829DA: D476 BMI 46L1 ; 0x34182ACA 0x341829DC: 9804 LDR R0, [SP, #16] 0x341829DE: 78C0 LDRB R0, [R0, #3] 0x341829E0: 0640 LSLS R0, R0, #25 0x341829E2: 2800 CMP R0, #0 0x341829E4: D471 BMI 46L1 ; 0x34182ACA 0x341829E6: 9804 LDR R0, [SP, #16] 0x341829E8: 78C0 LDRB R0, [R0, #3] 0x341829EA: 0600 LSLS R0, R0, #24 0x341829EC: 2800 CMP R0, #0 0x341829EE: D46C BMI 46L1 ; 0x34182ACA 0x341829F0: 9804 LDR R0, [SP, #16] 0x341829F2: 7900 LDRB R0, [R0, #4] 0x341829F4: 07C0 LSLS R0, R0, #31 0x341829F6: 2800 CMP R0, #0 0x341829F8: D167 BNE 46L1 ; 0x34182ACA 0x341829FA: 9804 LDR R0, [SP, #16] 0x341829FC: 7900 LDRB R0, [R0, #4] 0x341829FE: 0780 LSLS R0, R0, #30 0x34182A00: 2800 CMP R0, #0 0x34182A02: D462 BMI 46L1 ; 0x34182ACA 0x34182A04: 9804 LDR R0, [SP, #16] 0x34182A06: 7900 LDRB R0, [R0, #4] 0x34182A08: 0740 LSLS R0, R0, #29 0x34182A0A: 2800 CMP R0, #0 0x34182A0C: D45D BMI 46L1 ; 0x34182ACA 0x34182A0E: 9804 LDR R0, [SP, #16] 0x34182A10: 7900 LDRB R0, [R0, #4] 0x34182A12: 0700 LSLS R0, R0, #28 0x34182A14: 2800 CMP R0, #0 0x34182A16: D458 BMI 46L1 ; 0x34182ACA 0x34182A18: 9804 LDR R0, [SP, #16] 0x34182A1A: 7900 LDRB R0, [R0, #4] 0x34182A1C: 06C0 LSLS R0, R0, #27 0x34182A1E: 2800 CMP R0, #0 0x34182A20: D453 BMI 46L1 ; 0x34182ACA 0x34182A22: 9804 LDR R0, [SP, #16] 0x34182A24: 7900 LDRB R0, [R0, #4] 0x34182A26: 0680 LSLS R0, R0, #26 0x34182A28: 2800 CMP R0, #0 0x34182A2A: D44E BMI 46L1 ; 0x34182ACA 0x34182A2C: 9804 LDR R0, [SP, #16] 0x34182A2E: 7900 LDRB R0, [R0, #4] 0x34182A30: 0640 LSLS R0, R0, #25 0x34182A32: 2800 CMP R0, #0 0x34182A34: D449 BMI 46L1 ; 0x34182ACA 0x34182A36: 9804 LDR R0, [SP, #16] 0x34182A38: 7900 LDRB R0, [R0, #4] 0x34182A3A: 0600 LSLS R0, R0, #24 0x34182A3C: 2800 CMP R0, #0 0x34182A3E: D444 BMI 46L1 ; 0x34182ACA 0x34182A40: 9804 LDR R0, [SP, #16] 0x34182A42: 7940 LDRB R0, [R0, #5] 0x34182A44: 07C0 LSLS R0, R0, #31 0x34182A46: 2800 CMP R0, #0 0x34182A48: D13F BNE 46L1 ; 0x34182ACA 0x34182A4A: 9804 LDR R0, [SP, #16] 0x34182A4C: 7940 LDRB R0, [R0, #5] 0x34182A4E: 0780 LSLS R0, R0, #30 0x34182A50: 2800 CMP R0, #0 0x34182A52: D43A BMI 46L1 ; 0x34182ACA 0x34182A54: 9804 LDR R0, [SP, #16] 0x34182A56: 7940 LDRB R0, [R0, #5] 0x34182A58: 0740 LSLS R0, R0, #29 0x34182A5A: 2800 CMP R0, #0 0x34182A5C: D435 BMI 46L1 ; 0x34182ACA 0x34182A5E: 9804 LDR R0, [SP, #16] 0x34182A60: 7940 LDRB R0, [R0, #5] 0x34182A62: 0700 LSLS R0, R0, #28 0x34182A64: 2800 CMP R0, #0 0x34182A66: D430 BMI 46L1 ; 0x34182ACA 0x34182A68: 9804 LDR R0, [SP, #16] 0x34182A6A: 7940 LDRB R0, [R0, #5] 0x34182A6C: 06C0 LSLS R0, R0, #27 0x34182A6E: 2800 CMP R0, #0 0x34182A70: D42B BMI 46L1 ; 0x34182ACA 0x34182A72: 9804 LDR R0, [SP, #16] 0x34182A74: 7940 LDRB R0, [R0, #5] 0x34182A76: 0680 LSLS R0, R0, #26 0x34182A78: 2800 CMP R0, #0 0x34182A7A: D426 BMI 46L1 ; 0x34182ACA 0x34182A7C: 9804 LDR R0, [SP, #16] 0x34182A7E: 7940 LDRB R0, [R0, #5] 0x34182A80: 0640 LSLS R0, R0, #25 0x34182A82: 2800 CMP R0, #0 0x34182A84: D421 BMI 46L1 ; 0x34182ACA 0x34182A86: 9804 LDR R0, [SP, #16] 0x34182A88: 7940 LDRB R0, [R0, #5] 0x34182A8A: 0600 LSLS R0, R0, #24 0x34182A8C: 2800 CMP R0, #0 0x34182A8E: D41C BMI 46L1 ; 0x34182ACA 0x34182A90: 9804 LDR R0, [SP, #16] 0x34182A92: 7980 LDRB R0, [R0, #6] 0x34182A94: 07C0 LSLS R0, R0, #31 0x34182A96: B9C0 CBNZ R0, .L1 ; 0x34182ACA 0x34182A98: 9804 LDR R0, [SP, #16] 0x34182A9A: 7980 LDRB R0, [R0, #6] 0x34182A9C: 0780 LSLS R0, R0, #30 0x34182A9E: 2800 CMP R0, #0 0x34182AA0: D413 BMI 46L1 ; 0x34182ACA 0x34182AA2: 9804 LDR R0, [SP, #16] 0x34182AA4: 7980 LDRB R0, [R0, #6] 0x34182AA6: 0740 LSLS R0, R0, #29 0x34182AA8: 2800 CMP R0, #0 0x34182AAA: D40E BMI 46L1 ; 0x34182ACA 0x34182AAC: 9804 LDR R0, [SP, #16] 0x34182AAE: 7980 LDRB R0, [R0, #6] 0x34182AB0: 06C0 LSLS R0, R0, #27 0x34182AB2: 2800 CMP R0, #0 0x34182AB4: D409 BMI 46L1 ; 0x34182ACA 0x34182AB6: 9804 LDR R0, [SP, #16] 0x34182AB8: 7980 LDRB R0, [R0, #6] 0x34182ABA: 0700 LSLS R0, R0, #28 0x34182ABC: 2800 CMP R0, #0 0x34182ABE: D404 BMI 46L1 ; 0x34182ACA 0x34182AC0: 9804 LDR R0, [SP, #16] 0x34182AC2: 7980 LDRB R0, [R0, #6] 0x34182AC4: 0680 LSLS R0, R0, #26 0x34182AC6: 2800 CMP R0, #0 0x34182AC8: D500 BPL 46L2 ; 0x34182ACC
.L1: 0x34182ACA: E006 B 46L3 ; 0x34182ADA
.L2: 0x34182ACC: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34182AD0: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34182AD4: 2188 MOVS R1, #136 0x34182AD6: F00B F8DF BL assert_failed ; 0x3418DC98
.L3: 0x34182ADA: 9804 LDR R0, [SP, #16] 0x34182ADC: 78C0 LDRB R0, [R0, #3] 0x34182ADE: 0700 LSLS R0, R0, #28 0x34182AE0: 2800 CMP R0, #0 0x34182AE2: F140 82B1 BPL.W 46L15 ; 0x34183048 0x34182AE6: 9804 LDR R0, [SP, #16] 0x34182AE8: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182AEC: F5B0 7F80 CMP.W R0, #0x0100 0x34182AF0: F000 8248 BEQ.W 46L4 ; 0x34182F84 0x34182AF4: 9804 LDR R0, [SP, #16] 0x34182AF6: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182AFA: F5B0 7F00 CMP.W R0, #0x0200 0x34182AFE: F000 8241 BEQ.W 46L4 ; 0x34182F84 0x34182B02: 9804 LDR R0, [SP, #16] 0x34182B04: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182B08: F5B0 7F40 CMP.W R0, #0x0300 0x34182B0C: F000 823A BEQ.W 46L4 ; 0x34182F84 0x34182B10: 9804 LDR R0, [SP, #16] 0x34182B12: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182B16: F5B0 5F98 CMP.W R0, #0x1300 0x34182B1A: F000 8233 BEQ.W 46L4 ; 0x34182F84 0x34182B1E: 9804 LDR R0, [SP, #16] 0x34182B20: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182B24: F5B0 5F0C CMP.W R0, #0x2300 0x34182B28: F000 822C BEQ.W 46L4 ; 0x34182F84 0x34182B2C: 9804 LDR R0, [SP, #16] 0x34182B2E: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182B32: F5B0 5F4C CMP.W R0, #0x3300 0x34182B36: F000 8225 BEQ.W 46L4 ; 0x34182F84 0x34182B3A: 9804 LDR R0, [SP, #16] 0x34182B3C: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182B40: F5B0 4F86 CMP.W R0, #0x4300 0x34182B44: F000 821E BEQ.W 46L4 ; 0x34182F84 0x34182B48: 9804 LDR R0, [SP, #16] 0x34182B4A: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182B4E: F5B0 4FA6 CMP.W R0, #0x5300 0x34182B52: F000 8217 BEQ.W 46L4 ; 0x34182F84 0x34182B56: 9804 LDR R0, [SP, #16] 0x34182B58: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182B5C: F5B0 4FC6 CMP.W R0, #0x6300 0x34182B60: F000 8210 BEQ.W 46L4 ; 0x34182F84 0x34182B64: 9804 LDR R0, [SP, #16] 0x34182B66: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182B6A: F5B0 4FE6 CMP.W R0, #0x7300 0x34182B6E: F000 8209 BEQ.W 46L4 ; 0x34182F84 0x34182B72: 9804 LDR R0, [SP, #16] 0x34182B74: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182B78: F5B0 4F03 CMP.W R0, #0x8300 0x34182B7C: F000 8202 BEQ.W 46L4 ; 0x34182F84 0x34182B80: 9804 LDR R0, [SP, #16] 0x34182B82: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182B86: F5B0 4F13 CMP.W R0, #0x9300 0x34182B8A: F000 81FB BEQ.W 46L4 ; 0x34182F84 0x34182B8E: 9804 LDR R0, [SP, #16] 0x34182B90: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182B94: F5B0 4F23 CMP.W R0, #0xA300 0x34182B98: F000 81F4 BEQ.W 46L4 ; 0x34182F84 0x34182B9C: 9804 LDR R0, [SP, #16] 0x34182B9E: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182BA2: F5B0 4F33 CMP.W R0, #0xB300 0x34182BA6: F000 81ED BEQ.W 46L4 ; 0x34182F84 0x34182BAA: 9804 LDR R0, [SP, #16] 0x34182BAC: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182BB0: F5B0 4F43 CMP.W R0, #0xC300 0x34182BB4: F000 81E6 BEQ.W 46L4 ; 0x34182F84 0x34182BB8: 9804 LDR R0, [SP, #16] 0x34182BBA: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182BBE: F5B0 4F53 CMP.W R0, #0xD300 0x34182BC2: F000 81DF BEQ.W 46L4 ; 0x34182F84 0x34182BC6: 9804 LDR R0, [SP, #16] 0x34182BC8: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182BCC: F5B0 4F63 CMP.W R0, #0xE300 0x34182BD0: F000 81D8 BEQ.W 46L4 ; 0x34182F84 0x34182BD4: 9804 LDR R0, [SP, #16] 0x34182BD6: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182BDA: F5B0 4F73 CMP.W R0, #0xF300 0x34182BDE: F000 81D1 BEQ.W 46L4 ; 0x34182F84 0x34182BE2: 9804 LDR R0, [SP, #16] 0x34182BE4: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182BE8: F240 3100 MOVW R1, #0x0300 0x34182BEC: F2C0 0101 MOVT R1, #1 0x34182BF0: 4288 CMP R0, R1 0x34182BF2: F000 81C7 BEQ.W 46L4 ; 0x34182F84 0x34182BF6: 9804 LDR R0, [SP, #16] 0x34182BF8: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182BFC: F241 3100 MOVW R1, #0x1300 0x34182C00: F2C0 0101 MOVT R1, #1 0x34182C04: 4288 CMP R0, R1 0x34182C06: F000 81BD BEQ.W 46L4 ; 0x34182F84 0x34182C0A: 9804 LDR R0, [SP, #16] 0x34182C0C: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182C10: F242 3100 MOVW R1, #0x2300 0x34182C14: F2C0 0101 MOVT R1, #1 0x34182C18: 4288 CMP R0, R1 0x34182C1A: F000 81B3 BEQ.W 46L4 ; 0x34182F84 0x34182C1E: 9804 LDR R0, [SP, #16] 0x34182C20: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182C24: F243 3100 MOVW R1, #0x3300 0x34182C28: F2C0 0101 MOVT R1, #1 0x34182C2C: 4288 CMP R0, R1 0x34182C2E: F000 81A9 BEQ.W 46L4 ; 0x34182F84 0x34182C32: 9804 LDR R0, [SP, #16] 0x34182C34: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182C38: F244 3100 MOVW R1, #0x4300 0x34182C3C: F2C0 0101 MOVT R1, #1 0x34182C40: 4288 CMP R0, R1 0x34182C42: F000 819F BEQ.W 46L4 ; 0x34182F84 0x34182C46: 9804 LDR R0, [SP, #16] 0x34182C48: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182C4C: F245 3100 MOVW R1, #0x5300 0x34182C50: F2C0 0101 MOVT R1, #1 0x34182C54: 4288 CMP R0, R1 0x34182C56: F000 8195 BEQ.W 46L4 ; 0x34182F84 0x34182C5A: 9804 LDR R0, [SP, #16] 0x34182C5C: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182C60: F246 3100 MOVW R1, #0x6300 0x34182C64: F2C0 0101 MOVT R1, #1 0x34182C68: 4288 CMP R0, R1 0x34182C6A: F000 818B BEQ.W 46L4 ; 0x34182F84 0x34182C6E: 9804 LDR R0, [SP, #16] 0x34182C70: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182C74: F247 3100 MOVW R1, #0x7300 0x34182C78: F2C0 0101 MOVT R1, #1 0x34182C7C: 4288 CMP R0, R1 0x34182C7E: F000 8181 BEQ.W 46L4 ; 0x34182F84 0x34182C82: 9804 LDR R0, [SP, #16] 0x34182C84: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182C88: F248 3100 MOVW R1, #0x8300 0x34182C8C: F2C0 0101 MOVT R1, #1 0x34182C90: 4288 CMP R0, R1 0x34182C92: F000 8177 BEQ.W 46L4 ; 0x34182F84 0x34182C96: 9804 LDR R0, [SP, #16] 0x34182C98: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182C9C: F249 3100 MOVW R1, #0x9300 0x34182CA0: F2C0 0101 MOVT R1, #1 0x34182CA4: 4288 CMP R0, R1 0x34182CA6: F000 816D BEQ.W 46L4 ; 0x34182F84 0x34182CAA: 9804 LDR R0, [SP, #16] 0x34182CAC: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182CB0: F24A 3100 MOVW R1, #0xA300 0x34182CB4: F2C0 0101 MOVT R1, #1 0x34182CB8: 4288 CMP R0, R1 0x34182CBA: F000 8163 BEQ.W 46L4 ; 0x34182F84 0x34182CBE: 9804 LDR R0, [SP, #16] 0x34182CC0: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182CC4: F24B 3100 MOVW R1, #0xB300 0x34182CC8: F2C0 0101 MOVT R1, #1 0x34182CCC: 4288 CMP R0, R1 0x34182CCE: F000 8159 BEQ.W 46L4 ; 0x34182F84 0x34182CD2: 9804 LDR R0, [SP, #16] 0x34182CD4: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182CD8: F24C 3100 MOVW R1, #0xC300 0x34182CDC: F2C0 0101 MOVT R1, #1 0x34182CE0: 4288 CMP R0, R1 0x34182CE2: F000 814F BEQ.W 46L4 ; 0x34182F84 0x34182CE6: 9804 LDR R0, [SP, #16] 0x34182CE8: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182CEC: F24D 3100 MOVW R1, #0xD300 0x34182CF0: F2C0 0101 MOVT R1, #1 0x34182CF4: 4288 CMP R0, R1 0x34182CF6: F000 8145 BEQ.W 46L4 ; 0x34182F84 0x34182CFA: 9804 LDR R0, [SP, #16] 0x34182CFC: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182D00: F24E 3100 MOVW R1, #0xE300 0x34182D04: F2C0 0101 MOVT R1, #1 0x34182D08: 4288 CMP R0, R1 0x34182D0A: F000 813B BEQ.W 46L4 ; 0x34182F84 0x34182D0E: 9804 LDR R0, [SP, #16] 0x34182D10: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182D14: F24F 3100 MOVW R1, #0xF300 0x34182D18: F2C0 0101 MOVT R1, #1 0x34182D1C: 4288 CMP R0, R1 0x34182D1E: F000 8131 BEQ.W 46L4 ; 0x34182F84 0x34182D22: 9804 LDR R0, [SP, #16] 0x34182D24: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182D28: F240 3100 MOVW R1, #0x0300 0x34182D2C: F2C0 0102 MOVT R1, #2 0x34182D30: 4288 CMP R0, R1 0x34182D32: F000 8127 BEQ.W 46L4 ; 0x34182F84 0x34182D36: 9804 LDR R0, [SP, #16] 0x34182D38: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182D3C: F241 3100 MOVW R1, #0x1300 0x34182D40: F2C0 0102 MOVT R1, #2 0x34182D44: 4288 CMP R0, R1 0x34182D46: F000 811D BEQ.W 46L4 ; 0x34182F84 0x34182D4A: 9804 LDR R0, [SP, #16] 0x34182D4C: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182D50: F242 3100 MOVW R1, #0x2300 0x34182D54: F2C0 0102 MOVT R1, #2 0x34182D58: 4288 CMP R0, R1 0x34182D5A: F000 8113 BEQ.W 46L4 ; 0x34182F84 0x34182D5E: 9804 LDR R0, [SP, #16] 0x34182D60: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182D64: F243 3100 MOVW R1, #0x3300 0x34182D68: F2C0 0102 MOVT R1, #2 0x34182D6C: 4288 CMP R0, R1 0x34182D6E: F000 8109 BEQ.W 46L4 ; 0x34182F84 0x34182D72: 9804 LDR R0, [SP, #16] 0x34182D74: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182D78: F244 3100 MOVW R1, #0x4300 0x34182D7C: F2C0 0102 MOVT R1, #2 0x34182D80: 4288 CMP R0, R1 0x34182D82: F000 80FF BEQ.W 46L4 ; 0x34182F84 0x34182D86: 9804 LDR R0, [SP, #16] 0x34182D88: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182D8C: F245 3100 MOVW R1, #0x5300 0x34182D90: F2C0 0102 MOVT R1, #2 0x34182D94: 4288 CMP R0, R1 0x34182D96: F000 80F5 BEQ.W 46L4 ; 0x34182F84 0x34182D9A: 9804 LDR R0, [SP, #16] 0x34182D9C: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182DA0: F246 3100 MOVW R1, #0x6300 0x34182DA4: F2C0 0102 MOVT R1, #2 0x34182DA8: 4288 CMP R0, R1 0x34182DAA: F000 80EB BEQ.W 46L4 ; 0x34182F84 0x34182DAE: 9804 LDR R0, [SP, #16] 0x34182DB0: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182DB4: F247 3100 MOVW R1, #0x7300 0x34182DB8: F2C0 0102 MOVT R1, #2 0x34182DBC: 4288 CMP R0, R1 0x34182DBE: F000 80E1 BEQ.W 46L4 ; 0x34182F84 0x34182DC2: 9804 LDR R0, [SP, #16] 0x34182DC4: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182DC8: F248 3100 MOVW R1, #0x8300 0x34182DCC: F2C0 0102 MOVT R1, #2 0x34182DD0: 4288 CMP R0, R1 0x34182DD2: F000 80D7 BEQ.W 46L4 ; 0x34182F84 0x34182DD6: 9804 LDR R0, [SP, #16] 0x34182DD8: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182DDC: F249 3100 MOVW R1, #0x9300 0x34182DE0: F2C0 0102 MOVT R1, #2 0x34182DE4: 4288 CMP R0, R1 0x34182DE6: F000 80CD BEQ.W 46L4 ; 0x34182F84 0x34182DEA: 9804 LDR R0, [SP, #16] 0x34182DEC: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182DF0: F24A 3100 MOVW R1, #0xA300 0x34182DF4: F2C0 0102 MOVT R1, #2 0x34182DF8: 4288 CMP R0, R1 0x34182DFA: F000 80C3 BEQ.W 46L4 ; 0x34182F84 0x34182DFE: 9804 LDR R0, [SP, #16] 0x34182E00: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182E04: F24B 3100 MOVW R1, #0xB300 0x34182E08: F2C0 0102 MOVT R1, #2 0x34182E0C: 4288 CMP R0, R1 0x34182E0E: F000 80B9 BEQ.W 46L4 ; 0x34182F84 0x34182E12: 9804 LDR R0, [SP, #16] 0x34182E14: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182E18: F24C 3100 MOVW R1, #0xC300 0x34182E1C: F2C0 0102 MOVT R1, #2 0x34182E20: 4288 CMP R0, R1 0x34182E22: F000 80AF BEQ.W 46L4 ; 0x34182F84 0x34182E26: 9804 LDR R0, [SP, #16] 0x34182E28: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182E2C: F24D 3100 MOVW R1, #0xD300 0x34182E30: F2C0 0102 MOVT R1, #2 0x34182E34: 4288 CMP R0, R1 0x34182E36: F000 80A5 BEQ.W 46L4 ; 0x34182F84 0x34182E3A: 9804 LDR R0, [SP, #16] 0x34182E3C: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182E40: F24E 3100 MOVW R1, #0xE300 0x34182E44: F2C0 0102 MOVT R1, #2 0x34182E48: 4288 CMP R0, R1 0x34182E4A: F000 809B BEQ.W 46L4 ; 0x34182F84 0x34182E4E: 9804 LDR R0, [SP, #16] 0x34182E50: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182E54: F24F 3100 MOVW R1, #0xF300 0x34182E58: F2C0 0102 MOVT R1, #2 0x34182E5C: 4288 CMP R0, R1 0x34182E5E: F000 8091 BEQ.W 46L4 ; 0x34182F84 0x34182E62: 9804 LDR R0, [SP, #16] 0x34182E64: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182E68: F240 3100 MOVW R1, #0x0300 0x34182E6C: F2C0 0103 MOVT R1, #3 0x34182E70: 4288 CMP R0, R1 0x34182E72: F000 8087 BEQ.W 46L4 ; 0x34182F84 0x34182E76: 9804 LDR R0, [SP, #16] 0x34182E78: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182E7C: F241 3100 MOVW R1, #0x1300 0x34182E80: F2C0 0103 MOVT R1, #3 0x34182E84: 4288 CMP R0, R1 0x34182E86: D07D BEQ 46L4 ; 0x34182F84 0x34182E88: 9804 LDR R0, [SP, #16] 0x34182E8A: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182E8E: F242 3100 MOVW R1, #0x2300 0x34182E92: F2C0 0103 MOVT R1, #3 0x34182E96: 4288 CMP R0, R1 0x34182E98: D074 BEQ 46L4 ; 0x34182F84 0x34182E9A: 9804 LDR R0, [SP, #16] 0x34182E9C: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182EA0: F243 3100 MOVW R1, #0x3300 0x34182EA4: F2C0 0103 MOVT R1, #3 0x34182EA8: 4288 CMP R0, R1 0x34182EAA: D06B BEQ 46L4 ; 0x34182F84 0x34182EAC: 9804 LDR R0, [SP, #16] 0x34182EAE: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182EB2: F244 3100 MOVW R1, #0x4300 0x34182EB6: F2C0 0103 MOVT R1, #3 0x34182EBA: 4288 CMP R0, R1 0x34182EBC: D062 BEQ 46L4 ; 0x34182F84 0x34182EBE: 9804 LDR R0, [SP, #16] 0x34182EC0: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182EC4: F245 3100 MOVW R1, #0x5300 0x34182EC8: F2C0 0103 MOVT R1, #3 0x34182ECC: 4288 CMP R0, R1 0x34182ECE: D059 BEQ 46L4 ; 0x34182F84 0x34182ED0: 9804 LDR R0, [SP, #16] 0x34182ED2: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182ED6: F246 3100 MOVW R1, #0x6300 0x34182EDA: F2C0 0103 MOVT R1, #3 0x34182EDE: 4288 CMP R0, R1 0x34182EE0: D050 BEQ 46L4 ; 0x34182F84 0x34182EE2: 9804 LDR R0, [SP, #16] 0x34182EE4: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182EE8: F247 3100 MOVW R1, #0x7300 0x34182EEC: F2C0 0103 MOVT R1, #3 0x34182EF0: 4288 CMP R0, R1 0x34182EF2: D047 BEQ 46L4 ; 0x34182F84 0x34182EF4: 9804 LDR R0, [SP, #16] 0x34182EF6: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182EFA: F248 3100 MOVW R1, #0x8300 0x34182EFE: F2C0 0103 MOVT R1, #3 0x34182F02: 4288 CMP R0, R1 0x34182F04: D03E BEQ 46L4 ; 0x34182F84 0x34182F06: 9804 LDR R0, [SP, #16] 0x34182F08: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182F0C: F249 3100 MOVW R1, #0x9300 0x34182F10: F2C0 0103 MOVT R1, #3 0x34182F14: 4288 CMP R0, R1 0x34182F16: D035 BEQ 46L4 ; 0x34182F84 0x34182F18: 9804 LDR R0, [SP, #16] 0x34182F1A: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182F1E: F24A 3100 MOVW R1, #0xA300 0x34182F22: F2C0 0103 MOVT R1, #3 0x34182F26: 4288 CMP R0, R1 0x34182F28: D02C BEQ 46L4 ; 0x34182F84 0x34182F2A: 9804 LDR R0, [SP, #16] 0x34182F2C: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182F30: F24B 3100 MOVW R1, #0xB300 0x34182F34: F2C0 0103 MOVT R1, #3 0x34182F38: 4288 CMP R0, R1 0x34182F3A: D023 BEQ 46L4 ; 0x34182F84 0x34182F3C: 9804 LDR R0, [SP, #16] 0x34182F3E: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182F42: F24C 3100 MOVW R1, #0xC300 0x34182F46: F2C0 0103 MOVT R1, #3 0x34182F4A: 4288 CMP R0, R1 0x34182F4C: D01A BEQ 46L4 ; 0x34182F84 0x34182F4E: 9804 LDR R0, [SP, #16] 0x34182F50: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182F54: F24D 3100 MOVW R1, #0xD300 0x34182F58: F2C0 0103 MOVT R1, #3 0x34182F5C: 4288 CMP R0, R1 0x34182F5E: D011 BEQ 46L4 ; 0x34182F84 0x34182F60: 9804 LDR R0, [SP, #16] 0x34182F62: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182F66: F24E 3100 MOVW R1, #0xE300 0x34182F6A: F2C0 0103 MOVT R1, #3 0x34182F6E: 4288 CMP R0, R1 0x34182F70: D008 BEQ 46L4 ; 0x34182F84 0x34182F72: 9804 LDR R0, [SP, #16] 0x34182F74: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182F78: F24F 3100 MOVW R1, #0xF300 0x34182F7C: F2C0 0103 MOVT R1, #3 0x34182F80: 4288 CMP R0, R1 0x34182F82: D100 BNE 46L5 ; 0x34182F86
.L4: 0x34182F84: E006 B 46L6 ; 0x34182F94
.L5: 0x34182F86: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34182F8A: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34182F8E: 218E MOVS R1, #142 0x34182F90: F00A FE82 BL assert_failed ; 0x3418DC98
.L6: 0x34182F94: F005 FBBC BL LL_RCC_GetRTCClockSource ; 0x34188710 0x34182F98: 9003 STR R0, [SP, #12] 0x34182F9A: 9803 LDR R0, [SP, #12] 0x34182F9C: B1B0 CBZ R0, .L7 ; 0x34182FCC 0x34182F9E: 9803 LDR R0, [SP, #12] 0x34182FA0: 9904 LDR R1, [SP, #16] 0x34182FA2: F8D1 1188 LDR.W R1, [R1, #0x0188] 0x34182FA6: F401 7140 AND R1, R1, #0x0300 0x34182FAA: 4288 CMP R0, R1 0x34182FAC: D00E BEQ 46L7 ; 0x34182FCC 0x34182FAE: F644 002C MOVW R0, #0x482C 0x34182FB2: F2C5 6002 MOVT R0, #0x5602 0x34182FB6: 6801 LDR R1, [R0] 0x34182FB8: F041 0101 ORR R1, R1, #1 0x34182FBC: 6001 STR R1, [R0] 0x34182FBE: 6800 LDR R0, [R0] 0x34182FC0: 07C0 LSLS R0, R0, #31 0x34182FC2: B918 CBNZ R0, .L7 ; 0x34182FCC 0x34182FC4: 2001 MOVS R0, #1 0x34182FC6: F88D 0007 STRB.W R0, [SP, #7] 0x34182FCA: E7FF B 46L7 ; 0x34182FCC
.L7: 0x34182FCC: F89D 0007 LDRB.W R0, [SP, #7] 0x34182FD0: BBB0 CBNZ R0, .L14 ; 0x34183040 0x34182FD2: 9804 LDR R0, [SP, #16] 0x34182FD4: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34182FD8: F5B0 7F80 CMP.W R0, #0x0100 0x34182FDC: D112 BNE 46L10 ; 0x34183004 0x34182FDE: F7FE FD09 BL HAL_GetTick ; 0x341819F4 0x34182FE2: 9002 STR R0, [SP, #8]
.L8: 0x34182FE4: F005 FB9C BL LL_RCC_LSE_IsReady.59 ; 0x34188720 0x34182FE8: B960 CBNZ R0, .L10 ; 0x34183004 0x34182FEA: F7FE FD03 BL HAL_GetTick ; 0x341819F4 0x34182FEE: 9902 LDR R1, [SP, #8] 0x34182FF0: 1A40 SUBS R0, R0, R1 0x34182FF2: F241 3189 MOVW R1, #0x1389 0x34182FF6: 4288 CMP R0, R1 0x34182FF8: D303 BCC 46L9 ; 0x34183002 0x34182FFA: 2003 MOVS R0, #3 0x34182FFC: F88D 0007 STRB.W R0, [SP, #7] 0x34183000: E000 B 46L10 ; 0x34183004
.L9: 0x34183002: E7EF B 46L8 ; 0x34182FE4
.L10: 0x34183004: F89D 0007 LDRB.W R0, [SP, #7] 0x34183008: B9A8 CBNZ R0, .L12 ; 0x34183036 0x3418300A: 9804 LDR R0, [SP, #16] 0x3418300C: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x34183010: 43C0 MVNS R0, R0 0x34183012: F410 7F40 TST R0, #0x0300 0x34183016: D106 BNE 46L11 ; 0x34183026 0x34183018: 9804 LDR R0, [SP, #16] 0x3418301A: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x3418301E: F420 7040 BIC R0, R0, #0x0300 0x34183022: F005 FB85 BL LL_RCC_SetRTC_HSEPrescaler ; 0x34188730
.L11: 0x34183026: 9804 LDR R0, [SP, #16] 0x34183028: F8D0 0188 LDR.W R0, [R0, #0x0188] 0x3418302C: F400 7040 AND R0, R0, #0x0300 0x34183030: F005 FB8C BL LL_RCC_SetRTCClockSource ; 0x3418874C 0x34183034: E003 B 46L13 ; 0x3418303E
.L12: 0x34183036: F89D 0007 LDRB.W R0, [SP, #7] 0x3418303A: F88D 0006 STRB.W R0, [SP, #6]
.L13: 0x3418303E: E003 B 46L15 ; 0x34183048
.L14: 0x34183040: F89D 0007 LDRB.W R0, [SP, #7] 0x34183044: F88D 0006 STRB.W R0, [SP, #6]
.L15: 0x34183048: 9804 LDR R0, [SP, #16] 0x3418304A: 7800 LDRB R0, [R0] 0x3418304C: 0740 LSLS R0, R0, #29 0x3418304E: 2800 CMP R0, #0 0x34183050: F140 81AE BPL.W 46L49 ; 0x341833B0 0x34183054: 9804 LDR R0, [SP, #16] 0x34183056: F8D0 00B8 LDR.W R0, [R0, #184] 0x3418305A: B310 CBZ R0, .L16 ; 0x341830A2 0x3418305C: 9804 LDR R0, [SP, #16] 0x3418305E: F8D0 00B8 LDR.W R0, [R0, #184] 0x34183062: 2801 CMP R0, #1 0x34183064: D01D BEQ 46L16 ; 0x341830A2 0x34183066: 9804 LDR R0, [SP, #16] 0x34183068: F8D0 00B8 LDR.W R0, [R0, #184] 0x3418306C: 2802 CMP R0, #2 0x3418306E: D018 BEQ 46L16 ; 0x341830A2 0x34183070: 9804 LDR R0, [SP, #16] 0x34183072: F8D0 00B8 LDR.W R0, [R0, #184] 0x34183076: 2803 CMP R0, #3 0x34183078: D013 BEQ 46L16 ; 0x341830A2 0x3418307A: 9804 LDR R0, [SP, #16] 0x3418307C: F8D0 00B8 LDR.W R0, [R0, #184] 0x34183080: 2804 CMP R0, #4 0x34183082: D00E BEQ 46L16 ; 0x341830A2 0x34183084: 9804 LDR R0, [SP, #16] 0x34183086: F8D0 00B8 LDR.W R0, [R0, #184] 0x3418308A: 2805 CMP R0, #5 0x3418308C: D009 BEQ 46L16 ; 0x341830A2 0x3418308E: 9804 LDR R0, [SP, #16] 0x34183090: F8D0 00B8 LDR.W R0, [R0, #184] 0x34183094: 2806 CMP R0, #6 0x34183096: D004 BEQ 46L16 ; 0x341830A2 0x34183098: 9804 LDR R0, [SP, #16] 0x3418309A: F8D0 00B8 LDR.W R0, [R0, #184] 0x3418309E: 2807 CMP R0, #7 0x341830A0: D100 BNE 46L17 ; 0x341830A4
.L16: 0x341830A2: E006 B 46L18 ; 0x341830B2
.L17: 0x341830A4: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341830A8: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341830AC: 21D4 MOVS R1, #212 0x341830AE: F00A FDF3 BL assert_failed ; 0x3418DC98
.L18: 0x341830B2: 9804 LDR R0, [SP, #16] 0x341830B4: F8D0 00B8 LDR.W R0, [R0, #184] 0x341830B8: 2804 CMP R0, #4 0x341830BA: D142 BNE 46L24 ; 0x34183142 0x341830BC: 9804 LDR R0, [SP, #16] 0x341830BE: 6A80 LDR R0, [R0, #40] 0x341830C0: B170 CBZ R0, .L19 ; 0x341830E0 0x341830C2: 9804 LDR R0, [SP, #16] 0x341830C4: 6A80 LDR R0, [R0, #40] 0x341830C6: F1B0 5F80 CMP.W R0, #0x10000000 0x341830CA: D009 BEQ 46L19 ; 0x341830E0 0x341830CC: 9804 LDR R0, [SP, #16] 0x341830CE: 6A80 LDR R0, [R0, #40] 0x341830D0: F1B0 5F00 CMP.W R0, #0x20000000 0x341830D4: D004 BEQ 46L19 ; 0x341830E0 0x341830D6: 9804 LDR R0, [SP, #16] 0x341830D8: 6A80 LDR R0, [R0, #40] 0x341830DA: F1B0 5F40 CMP.W R0, #0x30000000 0x341830DE: D100 BNE 46L20 ; 0x341830E2
.L19: 0x341830E0: E006 B 46L21 ; 0x341830F0
.L20: 0x341830E2: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341830E6: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341830EA: 21D9 MOVS R1, #217 0x341830EC: F00A FDD4 BL assert_failed ; 0x3418DC98
.L21: 0x341830F0: 9804 LDR R0, [SP, #16] 0x341830F2: 6AC0 LDR R0, [R0, #44] 0x341830F4: B128 CBZ R0, .L22 ; 0x34183102 0x341830F6: 9804 LDR R0, [SP, #16] 0x341830F8: 6AC0 LDR R0, [R0, #44] 0x341830FA: F5B0 7F80 CMP.W R0, #0x0100 0x341830FE: D800 BHI 46L22 ; 0x34183102 0x34183100: E006 B 46L23 ; 0x34183110
.L22: 0x34183102: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34183106: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x3418310A: 21DA MOVS R1, #218 0x3418310C: F00A FDC4 BL assert_failed ; 0x3418DC98
.L23: 0x34183110: F248 01D4 MOVW R1, #0x80D4 0x34183114: F2C5 6102 MOVT R1, #0x5602 0x34183118: 6808 LDR R0, [R1] 0x3418311A: F64F 72FF MOVW R2, #0xFFFF 0x3418311E: F6CC 7200 MOVT R2, #0xCF00 0x34183122: 4010 ANDS R0, R2 0x34183124: 9B04 LDR R3, [SP, #16] 0x34183126: 6A9A LDR R2, [R3, #40] 0x34183128: F8D3 C02C LDR.W R12, [R3, #44] 0x3418312C: 2300 MOVS R3, #0 0x3418312E: F6CF 73FF MOVT R3, #0xFFFF 0x34183132: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34183136: 431A ORRS R2, R3 0x34183138: 4310 ORRS R0, R2 0x3418313A: 6008 STR R0, [R1] 0x3418313C: F00D F876 BL LL_RCC_IC5_Enable.60 ; 0x3419022C 0x34183140: E131 B 46L48 ; 0x341833A6
.L24: 0x34183142: 9804 LDR R0, [SP, #16] 0x34183144: F8D0 00B8 LDR.W R0, [R0, #184] 0x34183148: 2805 CMP R0, #5 0x3418314A: D142 BNE 46L30 ; 0x341831D2 0x3418314C: 9804 LDR R0, [SP, #16] 0x3418314E: 6D00 LDR R0, [R0, #80] 0x34183150: B170 CBZ R0, .L25 ; 0x34183170 0x34183152: 9804 LDR R0, [SP, #16] 0x34183154: 6D00 LDR R0, [R0, #80] 0x34183156: F1B0 5F80 CMP.W R0, #0x10000000 0x3418315A: D009 BEQ 46L25 ; 0x34183170 0x3418315C: 9804 LDR R0, [SP, #16] 0x3418315E: 6D00 LDR R0, [R0, #80] 0x34183160: F1B0 5F00 CMP.W R0, #0x20000000 0x34183164: D004 BEQ 46L25 ; 0x34183170 0x34183166: 9804 LDR R0, [SP, #16] 0x34183168: 6D00 LDR R0, [R0, #80] 0x3418316A: F1B0 5F40 CMP.W R0, #0x30000000 0x3418316E: D100 BNE 46L26 ; 0x34183172
.L25: 0x34183170: E006 B 46L27 ; 0x34183180
.L26: 0x34183172: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34183176: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x3418317A: 21E6 MOVS R1, #230 0x3418317C: F00A FD8C BL assert_failed ; 0x3418DC98
.L27: 0x34183180: 9804 LDR R0, [SP, #16] 0x34183182: 6D40 LDR R0, [R0, #84] 0x34183184: B128 CBZ R0, .L28 ; 0x34183192 0x34183186: 9804 LDR R0, [SP, #16] 0x34183188: 6D40 LDR R0, [R0, #84] 0x3418318A: F5B0 7F80 CMP.W R0, #0x0100 0x3418318E: D800 BHI 46L28 ; 0x34183192 0x34183190: E006 B 46L29 ; 0x341831A0
.L28: 0x34183192: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34183196: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x3418319A: 21E7 MOVS R1, #231 0x3418319C: F00A FD7C BL assert_failed ; 0x3418DC98
.L29: 0x341831A0: F248 01E8 MOVW R1, #0x80E8 0x341831A4: F2C5 6102 MOVT R1, #0x5602 0x341831A8: 6808 LDR R0, [R1] 0x341831AA: F64F 72FF MOVW R2, #0xFFFF 0x341831AE: F6CC 7200 MOVT R2, #0xCF00 0x341831B2: 4010 ANDS R0, R2 0x341831B4: 9B04 LDR R3, [SP, #16] 0x341831B6: 6D1A LDR R2, [R3, #80] 0x341831B8: F8D3 C054 LDR.W R12, [R3, #84] 0x341831BC: 2300 MOVS R3, #0 0x341831BE: F6CF 73FF MOVT R3, #0xFFFF 0x341831C2: EB03 430C ADD.W R3, R3, R12, LSL #16 0x341831C6: 431A ORRS R2, R3 0x341831C8: 4310 ORRS R0, R2 0x341831CA: 6008 STR R0, [R1] 0x341831CC: F005 FACC BL LL_RCC_IC10_Enable.61 ; 0x34188768 0x341831D0: E0E9 B 46L48 ; 0x341833A6
.L30: 0x341831D2: 9804 LDR R0, [SP, #16] 0x341831D4: F8D0 00B8 LDR.W R0, [R0, #184] 0x341831D8: 2806 CMP R0, #6 0x341831DA: D142 BNE 46L36 ; 0x34183262 0x341831DC: 9804 LDR R0, [SP, #16] 0x341831DE: 6F80 LDR R0, [R0, #120] 0x341831E0: B170 CBZ R0, .L31 ; 0x34183200 0x341831E2: 9804 LDR R0, [SP, #16] 0x341831E4: 6F80 LDR R0, [R0, #120] 0x341831E6: F1B0 5F80 CMP.W R0, #0x10000000 0x341831EA: D009 BEQ 46L31 ; 0x34183200 0x341831EC: 9804 LDR R0, [SP, #16] 0x341831EE: 6F80 LDR R0, [R0, #120] 0x341831F0: F1B0 5F00 CMP.W R0, #0x20000000 0x341831F4: D004 BEQ 46L31 ; 0x34183200 0x341831F6: 9804 LDR R0, [SP, #16] 0x341831F8: 6F80 LDR R0, [R0, #120] 0x341831FA: F1B0 5F40 CMP.W R0, #0x30000000 0x341831FE: D100 BNE 46L32 ; 0x34183202
.L31: 0x34183200: E006 B 46L33 ; 0x34183210
.L32: 0x34183202: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34183206: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x3418320A: 21F3 MOVS R1, #243 0x3418320C: F00A FD44 BL assert_failed ; 0x3418DC98
.L33: 0x34183210: 9804 LDR R0, [SP, #16] 0x34183212: 6FC0 LDR R0, [R0, #124] 0x34183214: B128 CBZ R0, .L34 ; 0x34183222 0x34183216: 9804 LDR R0, [SP, #16] 0x34183218: 6FC0 LDR R0, [R0, #124] 0x3418321A: F5B0 7F80 CMP.W R0, #0x0100 0x3418321E: D800 BHI 46L34 ; 0x34183222 0x34183220: E006 B 46L35 ; 0x34183230
.L34: 0x34183222: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34183226: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x3418322A: 21F4 MOVS R1, #244 0x3418322C: F00A FD34 BL assert_failed ; 0x3418DC98
.L35: 0x34183230: F248 01FC MOVW R1, #0x80FC 0x34183234: F2C5 6102 MOVT R1, #0x5602 0x34183238: 6808 LDR R0, [R1] 0x3418323A: F64F 72FF MOVW R2, #0xFFFF 0x3418323E: F6CC 7200 MOVT R2, #0xCF00 0x34183242: 4010 ANDS R0, R2 0x34183244: 9B04 LDR R3, [SP, #16] 0x34183246: 6F9A LDR R2, [R3, #120] 0x34183248: F8D3 C07C LDR.W R12, [R3, #124] 0x3418324C: 2300 MOVS R3, #0 0x3418324E: F6CF 73FF MOVT R3, #0xFFFF 0x34183252: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34183256: 431A ORRS R2, R3 0x34183258: 4310 ORRS R0, R2 0x3418325A: 6008 STR R0, [R1] 0x3418325C: F005 FA8C BL LL_RCC_IC15_Enable.62 ; 0x34188778 0x34183260: E0A1 B 46L48 ; 0x341833A6
.L36: 0x34183262: 9804 LDR R0, [SP, #16] 0x34183264: F8D0 00B8 LDR.W R0, [R0, #184] 0x34183268: 2803 CMP R0, #3 0x3418326A: D14B BNE 46L42 ; 0x34183304 0x3418326C: 9804 LDR R0, [SP, #16] 0x3418326E: F8D0 0098 LDR.W R0, [R0, #152] 0x34183272: B188 CBZ R0, .L37 ; 0x34183298 0x34183274: 9804 LDR R0, [SP, #16] 0x34183276: F8D0 0098 LDR.W R0, [R0, #152] 0x3418327A: F1B0 5F80 CMP.W R0, #0x10000000 0x3418327E: D00B BEQ 46L37 ; 0x34183298 0x34183280: 9804 LDR R0, [SP, #16] 0x34183282: F8D0 0098 LDR.W R0, [R0, #152] 0x34183286: F1B0 5F00 CMP.W R0, #0x20000000 0x3418328A: D005 BEQ 46L37 ; 0x34183298 0x3418328C: 9804 LDR R0, [SP, #16] 0x3418328E: F8D0 0098 LDR.W R0, [R0, #152] 0x34183292: F1B0 5F40 CMP.W R0, #0x30000000 0x34183296: D100 BNE 46L38 ; 0x3418329A
.L37: 0x34183298: E007 B 46L39 ; 0x341832AA
.L38: 0x3418329A: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x3418329E: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341832A2: F44F 7180 MOV.W R1, #0x0100 0x341832A6: F00A FCF7 BL assert_failed ; 0x3418DC98
.L39: 0x341832AA: 9804 LDR R0, [SP, #16] 0x341832AC: F8D0 009C LDR.W R0, [R0, #156] 0x341832B0: B130 CBZ R0, .L40 ; 0x341832C0 0x341832B2: 9804 LDR R0, [SP, #16] 0x341832B4: F8D0 009C LDR.W R0, [R0, #156] 0x341832B8: F5B0 7F80 CMP.W R0, #0x0100 0x341832BC: D800 BHI 46L40 ; 0x341832C0 0x341832BE: E007 B 46L41 ; 0x341832D0
.L40: 0x341832C0: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341832C4: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341832C8: F240 1101 MOVW R1, #0x0101 0x341832CC: F00A FCE4 BL assert_failed ; 0x3418DC98
.L41: 0x341832D0: F248 110C MOVW R1, #0x810C 0x341832D4: F2C5 6102 MOVT R1, #0x5602 0x341832D8: 6808 LDR R0, [R1] 0x341832DA: F64F 72FF MOVW R2, #0xFFFF 0x341832DE: F6CC 7200 MOVT R2, #0xCF00 0x341832E2: 4010 ANDS R0, R2 0x341832E4: 9B04 LDR R3, [SP, #16] 0x341832E6: F8D3 2098 LDR.W R2, [R3, #152] 0x341832EA: F8D3 C09C LDR.W R12, [R3, #156] 0x341832EE: 2300 MOVS R3, #0 0x341832F0: F6CF 73FF MOVT R3, #0xFFFF 0x341832F4: EB03 430C ADD.W R3, R3, R12, LSL #16 0x341832F8: 431A ORRS R2, R3 0x341832FA: 4310 ORRS R0, R2 0x341832FC: 6008 STR R0, [R1] 0x341832FE: F005 FA43 BL LL_RCC_IC19_Enable ; 0x34188788 0x34183302: E050 B 46L48 ; 0x341833A6
.L42: 0x34183304: 9804 LDR R0, [SP, #16] 0x34183306: F8D0 00B8 LDR.W R0, [R0, #184] 0x3418330A: 2807 CMP R0, #7 0x3418330C: D14B BNE 46L48 ; 0x341833A6 0x3418330E: 9804 LDR R0, [SP, #16] 0x34183310: F8D0 00A0 LDR.W R0, [R0, #160] 0x34183314: B188 CBZ R0, .L43 ; 0x3418333A 0x34183316: 9804 LDR R0, [SP, #16] 0x34183318: F8D0 00A0 LDR.W R0, [R0, #160] 0x3418331C: F1B0 5F80 CMP.W R0, #0x10000000 0x34183320: D00B BEQ 46L43 ; 0x3418333A 0x34183322: 9804 LDR R0, [SP, #16] 0x34183324: F8D0 00A0 LDR.W R0, [R0, #160] 0x34183328: F1B0 5F00 CMP.W R0, #0x20000000 0x3418332C: D005 BEQ 46L43 ; 0x3418333A 0x3418332E: 9804 LDR R0, [SP, #16] 0x34183330: F8D0 00A0 LDR.W R0, [R0, #160] 0x34183334: F1B0 5F40 CMP.W R0, #0x30000000 0x34183338: D100 BNE 46L44 ; 0x3418333C
.L43: 0x3418333A: E007 B 46L45 ; 0x3418334C
.L44: 0x3418333C: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34183340: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34183344: F240 110D MOVW R1, #0x010D 0x34183348: F00A FCA6 BL assert_failed ; 0x3418DC98
.L45: 0x3418334C: 9804 LDR R0, [SP, #16] 0x3418334E: F8D0 00A4 LDR.W R0, [R0, #164] 0x34183352: B130 CBZ R0, .L46 ; 0x34183362 0x34183354: 9804 LDR R0, [SP, #16] 0x34183356: F8D0 00A4 LDR.W R0, [R0, #164] 0x3418335A: F5B0 7F80 CMP.W R0, #0x0100 0x3418335E: D800 BHI 46L46 ; 0x34183362 0x34183360: E007 B 46L47 ; 0x34183372
.L46: 0x34183362: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34183366: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x3418336A: F44F 7187 MOV.W R1, #0x010E 0x3418336E: F00A FC93 BL assert_failed ; 0x3418DC98
.L47: 0x34183372: F248 1110 MOVW R1, #0x8110 0x34183376: F2C5 6102 MOVT R1, #0x5602 0x3418337A: 6808 LDR R0, [R1] 0x3418337C: F64F 72FF MOVW R2, #0xFFFF 0x34183380: F6CC 7200 MOVT R2, #0xCF00 0x34183384: 4010 ANDS R0, R2 0x34183386: 9B04 LDR R3, [SP, #16] 0x34183388: F8D3 20A0 LDR.W R2, [R3, #160] 0x3418338C: F8D3 C0A4 LDR.W R12, [R3, #164] 0x34183390: 2300 MOVS R3, #0 0x34183392: F6CF 73FF MOVT R3, #0xFFFF 0x34183396: EB03 430C ADD.W R3, R3, R12, LSL #16 0x3418339A: 431A ORRS R2, R3 0x3418339C: 4310 ORRS R0, R2 0x3418339E: 6008 STR R0, [R1] 0x341833A0: F005 F9FA BL LL_RCC_IC20_Enable.63 ; 0x34188798 0x341833A4: E7FF B 46L48 ; 0x341833A6
.L48: 0x341833A6: 9804 LDR R0, [SP, #16] 0x341833A8: F8D0 00B8 LDR.W R0, [R0, #184] 0x341833AC: F005 F9FC BL LL_RCC_SetCLKPClockSource ; 0x341887A8
.L49: 0x341833B0: 9804 LDR R0, [SP, #16] 0x341833B2: 7980 LDRB R0, [R0, #6] 0x341833B4: 0640 LSLS R0, R0, #25 0x341833B6: 2800 CMP R0, #0 0x341833B8: F140 80D3 BPL.W 46L66 ; 0x34183562 0x341833BC: 9804 LDR R0, [SP, #16] 0x341833BE: F8D0 00AC LDR.W R0, [R0, #172] 0x341833C2: 2114 MOVS R1, #20 0x341833C4: F2C0 3100 MOVT R1, #0x0300 0x341833C8: 4288 CMP R0, R1 0x341833CA: D017 BEQ 46L50 ; 0x341833FC 0x341833CC: 9804 LDR R0, [SP, #16] 0x341833CE: F8D0 00AC LDR.W R0, [R0, #172] 0x341833D2: 2114 MOVS R1, #20 0x341833D4: F2C0 3101 MOVT R1, #0x0301 0x341833D8: 4288 CMP R0, R1 0x341833DA: D00F BEQ 46L50 ; 0x341833FC 0x341833DC: 9804 LDR R0, [SP, #16] 0x341833DE: F8D0 00AC LDR.W R0, [R0, #172] 0x341833E2: 2114 MOVS R1, #20 0x341833E4: F2C0 3102 MOVT R1, #0x0302 0x341833E8: 4288 CMP R0, R1 0x341833EA: D007 BEQ 46L50 ; 0x341833FC 0x341833EC: 9804 LDR R0, [SP, #16] 0x341833EE: F8D0 00AC LDR.W R0, [R0, #172] 0x341833F2: 2114 MOVS R1, #20 0x341833F4: F2C0 3103 MOVT R1, #0x0303 0x341833F8: 4288 CMP R0, R1 0x341833FA: D100 BNE 46L51 ; 0x341833FE
.L50: 0x341833FC: E007 B 46L52 ; 0x3418340E
.L51: 0x341833FE: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34183402: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34183406: F44F 7192 MOV.W R1, #0x0124 0x3418340A: F00A FC45 BL assert_failed ; 0x3418DC98
.L52: 0x3418340E: 9804 LDR R0, [SP, #16] 0x34183410: F8D0 00AC LDR.W R0, [R0, #172] 0x34183414: 2114 MOVS R1, #20 0x34183416: F2C0 3102 MOVT R1, #0x0302 0x3418341A: 4288 CMP R0, R1 0x3418341C: D144 BNE 46L58 ; 0x341834A8 0x3418341E: 9804 LDR R0, [SP, #16] 0x34183420: 6980 LDR R0, [R0, #24] 0x34183422: B170 CBZ R0, .L53 ; 0x34183442 0x34183424: 9804 LDR R0, [SP, #16] 0x34183426: 6980 LDR R0, [R0, #24] 0x34183428: F1B0 5F80 CMP.W R0, #0x10000000 0x3418342C: D009 BEQ 46L53 ; 0x34183442 0x3418342E: 9804 LDR R0, [SP, #16] 0x34183430: 6980 LDR R0, [R0, #24] 0x34183432: F1B0 5F00 CMP.W R0, #0x20000000 0x34183436: D004 BEQ 46L53 ; 0x34183442 0x34183438: 9804 LDR R0, [SP, #16] 0x3418343A: 6980 LDR R0, [R0, #24] 0x3418343C: F1B0 5F40 CMP.W R0, #0x30000000 0x34183440: D100 BNE 46L54 ; 0x34183444
.L53: 0x34183442: E007 B 46L55 ; 0x34183454
.L54: 0x34183444: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34183448: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x3418344C: F240 1129 MOVW R1, #0x0129 0x34183450: F00A FC22 BL assert_failed ; 0x3418DC98
.L55: 0x34183454: 9804 LDR R0, [SP, #16] 0x34183456: 69C0 LDR R0, [R0, #28] 0x34183458: B128 CBZ R0, .L56 ; 0x34183466 0x3418345A: 9804 LDR R0, [SP, #16] 0x3418345C: 69C0 LDR R0, [R0, #28] 0x3418345E: F5B0 7F80 CMP.W R0, #0x0100 0x34183462: D800 BHI 46L56 ; 0x34183466 0x34183464: E007 B 46L57 ; 0x34183476
.L56: 0x34183466: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x3418346A: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x3418346E: F44F 7195 MOV.W R1, #0x012A 0x34183472: F00A FC11 BL assert_failed ; 0x3418DC98
.L57: 0x34183476: F248 01CC MOVW R1, #0x80CC 0x3418347A: F2C5 6102 MOVT R1, #0x5602 0x3418347E: 6808 LDR R0, [R1] 0x34183480: F64F 72FF MOVW R2, #0xFFFF 0x34183484: F6CC 7200 MOVT R2, #0xCF00 0x34183488: 4010 ANDS R0, R2 0x3418348A: 9B04 LDR R3, [SP, #16] 0x3418348C: 699A LDR R2, [R3, #24] 0x3418348E: F8D3 C01C LDR.W R12, [R3, #28] 0x34183492: 2300 MOVS R3, #0 0x34183494: F6CF 73FF MOVT R3, #0xFFFF 0x34183498: EB03 430C ADD.W R3, R3, R12, LSL #16 0x3418349C: 431A ORRS R2, R3 0x3418349E: 4310 ORRS R0, R2 0x341834A0: 6008 STR R0, [R1] 0x341834A2: F00C FECB BL LL_RCC_IC3_Enable ; 0x3419023C 0x341834A6: E057 B 46L65 ; 0x34183558
.L58: 0x341834A8: 9804 LDR R0, [SP, #16] 0x341834AA: F8D0 00AC LDR.W R0, [R0, #172] 0x341834AE: 2114 MOVS R1, #20 0x341834B0: F2C0 3103 MOVT R1, #0x0303 0x341834B4: 4288 CMP R0, R1 0x341834B6: D144 BNE 46L64 ; 0x34183542 0x341834B8: 9804 LDR R0, [SP, #16] 0x341834BA: 6A00 LDR R0, [R0, #32] 0x341834BC: B170 CBZ R0, .L59 ; 0x341834DC 0x341834BE: 9804 LDR R0, [SP, #16] 0x341834C0: 6A00 LDR R0, [R0, #32] 0x341834C2: F1B0 5F80 CMP.W R0, #0x10000000 0x341834C6: D009 BEQ 46L59 ; 0x341834DC 0x341834C8: 9804 LDR R0, [SP, #16] 0x341834CA: 6A00 LDR R0, [R0, #32] 0x341834CC: F1B0 5F00 CMP.W R0, #0x20000000 0x341834D0: D004 BEQ 46L59 ; 0x341834DC 0x341834D2: 9804 LDR R0, [SP, #16] 0x341834D4: 6A00 LDR R0, [R0, #32] 0x341834D6: F1B0 5F40 CMP.W R0, #0x30000000 0x341834DA: D100 BNE 46L60 ; 0x341834DE
.L59: 0x341834DC: E007 B 46L61 ; 0x341834EE
.L60: 0x341834DE: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341834E2: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341834E6: F44F 719B MOV.W R1, #0x0136 0x341834EA: F00A FBD5 BL assert_failed ; 0x3418DC98
.L61: 0x341834EE: 9804 LDR R0, [SP, #16] 0x341834F0: 6A40 LDR R0, [R0, #36] 0x341834F2: B128 CBZ R0, .L62 ; 0x34183500 0x341834F4: 9804 LDR R0, [SP, #16] 0x341834F6: 6A40 LDR R0, [R0, #36] 0x341834F8: F5B0 7F80 CMP.W R0, #0x0100 0x341834FC: D800 BHI 46L62 ; 0x34183500 0x341834FE: E007 B 46L63 ; 0x34183510
.L62: 0x34183500: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34183504: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34183508: F240 1137 MOVW R1, #0x0137 0x3418350C: F00A FBC4 BL assert_failed ; 0x3418DC98
.L63: 0x34183510: F248 01D0 MOVW R1, #0x80D0 0x34183514: F2C5 6102 MOVT R1, #0x5602 0x34183518: 6808 LDR R0, [R1] 0x3418351A: F64F 72FF MOVW R2, #0xFFFF 0x3418351E: F6CC 7200 MOVT R2, #0xCF00 0x34183522: 4010 ANDS R0, R2 0x34183524: 9B04 LDR R3, [SP, #16] 0x34183526: 6A1A LDR R2, [R3, #32] 0x34183528: F8D3 C024 LDR.W R12, [R3, #36] 0x3418352C: 2300 MOVS R3, #0 0x3418352E: F6CF 73FF MOVT R3, #0xFFFF 0x34183532: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34183536: 431A ORRS R2, R3 0x34183538: 4310 ORRS R0, R2 0x3418353A: 6008 STR R0, [R1] 0x3418353C: F00C FE86 BL LL_RCC_IC4_Enable ; 0x3419024C 0x34183540: E00A B 46L65 ; 0x34183558
.L64: 0x34183542: 9804 LDR R0, [SP, #16] 0x34183544: F8D0 00AC LDR.W R0, [R0, #172] 0x34183548: 2114 MOVS R1, #20 0x3418354A: F2C0 3101 MOVT R1, #0x0301 0x3418354E: 4288 CMP R0, R1 0x34183550: D102 BNE 46L65 ; 0x34183558 0x34183552: F00C FE83 BL LL_RCC_CLKP_Enable ; 0x3419025C 0x34183556: E7FF B 46L65 ; 0x34183558
.L65: 0x34183558: 9804 LDR R0, [SP, #16] 0x3418355A: F8D0 00AC LDR.W R0, [R0, #172] 0x3418355E: F005 F931 BL LL_RCC_SetXSPIClockSource ; 0x341887C4
.L66: 0x34183562: 9804 LDR R0, [SP, #16] 0x34183564: 7980 LDRB R0, [R0, #6] 0x34183566: 0600 LSLS R0, R0, #24 0x34183568: 2800 CMP R0, #0 0x3418356A: F140 80DA BPL.W 46L83 ; 0x34183722 0x3418356E: 9804 LDR R0, [SP, #16] 0x34183570: F8D0 00B0 LDR.W R0, [R0, #176] 0x34183574: F240 4114 MOVW R1, #0x0414 0x34183578: F2C0 3100 MOVT R1, #0x0300 0x3418357C: 4288 CMP R0, R1 0x3418357E: D01A BEQ 46L67 ; 0x341835B6 0x34183580: 9804 LDR R0, [SP, #16] 0x34183582: F8D0 00B0 LDR.W R0, [R0, #176] 0x34183586: F240 4114 MOVW R1, #0x0414 0x3418358A: F2C0 3101 MOVT R1, #0x0301 0x3418358E: 4288 CMP R0, R1 0x34183590: D011 BEQ 46L67 ; 0x341835B6 0x34183592: 9804 LDR R0, [SP, #16] 0x34183594: F8D0 00B0 LDR.W R0, [R0, #176] 0x34183598: F240 4114 MOVW R1, #0x0414 0x3418359C: F2C0 3102 MOVT R1, #0x0302 0x341835A0: 4288 CMP R0, R1 0x341835A2: D008 BEQ 46L67 ; 0x341835B6 0x341835A4: 9804 LDR R0, [SP, #16] 0x341835A6: F8D0 00B0 LDR.W R0, [R0, #176] 0x341835AA: F240 4114 MOVW R1, #0x0414 0x341835AE: F2C0 3103 MOVT R1, #0x0303 0x341835B2: 4288 CMP R0, R1 0x341835B4: D100 BNE 46L68 ; 0x341835B8
.L67: 0x341835B6: E007 B 46L69 ; 0x341835C8
.L68: 0x341835B8: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341835BC: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341835C0: F240 1151 MOVW R1, #0x0151 0x341835C4: F00A FB68 BL assert_failed ; 0x3418DC98
.L69: 0x341835C8: 9804 LDR R0, [SP, #16] 0x341835CA: F8D0 00B0 LDR.W R0, [R0, #176] 0x341835CE: F240 4114 MOVW R1, #0x0414 0x341835D2: F2C0 3102 MOVT R1, #0x0302 0x341835D6: 4288 CMP R0, R1 0x341835D8: D144 BNE 46L75 ; 0x34183664 0x341835DA: 9804 LDR R0, [SP, #16] 0x341835DC: 6980 LDR R0, [R0, #24] 0x341835DE: B170 CBZ R0, .L70 ; 0x341835FE 0x341835E0: 9804 LDR R0, [SP, #16] 0x341835E2: 6980 LDR R0, [R0, #24] 0x341835E4: F1B0 5F80 CMP.W R0, #0x10000000 0x341835E8: D009 BEQ 46L70 ; 0x341835FE 0x341835EA: 9804 LDR R0, [SP, #16] 0x341835EC: 6980 LDR R0, [R0, #24] 0x341835EE: F1B0 5F00 CMP.W R0, #0x20000000 0x341835F2: D004 BEQ 46L70 ; 0x341835FE 0x341835F4: 9804 LDR R0, [SP, #16] 0x341835F6: 6980 LDR R0, [R0, #24] 0x341835F8: F1B0 5F40 CMP.W R0, #0x30000000 0x341835FC: D100 BNE 46L71 ; 0x34183600
.L70: 0x341835FE: E007 B 46L72 ; 0x34183610
.L71: 0x34183600: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34183604: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34183608: F44F 71AB MOV.W R1, #0x0156 0x3418360C: F00A FB44 BL assert_failed ; 0x3418DC98
.L72: 0x34183610: 9804 LDR R0, [SP, #16] 0x34183612: 69C0 LDR R0, [R0, #28] 0x34183614: B128 CBZ R0, .L73 ; 0x34183622 0x34183616: 9804 LDR R0, [SP, #16] 0x34183618: 69C0 LDR R0, [R0, #28] 0x3418361A: F5B0 7F80 CMP.W R0, #0x0100 0x3418361E: D800 BHI 46L73 ; 0x34183622 0x34183620: E007 B 46L74 ; 0x34183632
.L73: 0x34183622: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34183626: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x3418362A: F240 1157 MOVW R1, #0x0157 0x3418362E: F00A FB33 BL assert_failed ; 0x3418DC98
.L74: 0x34183632: F248 01CC MOVW R1, #0x80CC 0x34183636: F2C5 6102 MOVT R1, #0x5602 0x3418363A: 6808 LDR R0, [R1] 0x3418363C: F64F 72FF MOVW R2, #0xFFFF 0x34183640: F6CC 7200 MOVT R2, #0xCF00 0x34183644: 4010 ANDS R0, R2 0x34183646: 9B04 LDR R3, [SP, #16] 0x34183648: 699A LDR R2, [R3, #24] 0x3418364A: F8D3 C01C LDR.W R12, [R3, #28] 0x3418364E: 2300 MOVS R3, #0 0x34183650: F6CF 73FF MOVT R3, #0xFFFF 0x34183654: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34183658: 431A ORRS R2, R3 0x3418365A: 4310 ORRS R0, R2 0x3418365C: 6008 STR R0, [R1] 0x3418365E: F00C FDED BL LL_RCC_IC3_Enable ; 0x3419023C 0x34183662: E059 B 46L82 ; 0x34183718
.L75: 0x34183664: 9804 LDR R0, [SP, #16] 0x34183666: F8D0 00B0 LDR.W R0, [R0, #176] 0x3418366A: F240 4114 MOVW R1, #0x0414 0x3418366E: F2C0 3103 MOVT R1, #0x0303 0x34183672: 4288 CMP R0, R1 0x34183674: D144 BNE 46L81 ; 0x34183700 0x34183676: 9804 LDR R0, [SP, #16] 0x34183678: 6A00 LDR R0, [R0, #32] 0x3418367A: B170 CBZ R0, .L76 ; 0x3418369A 0x3418367C: 9804 LDR R0, [SP, #16] 0x3418367E: 6A00 LDR R0, [R0, #32] 0x34183680: F1B0 5F80 CMP.W R0, #0x10000000 0x34183684: D009 BEQ 46L76 ; 0x3418369A 0x34183686: 9804 LDR R0, [SP, #16] 0x34183688: 6A00 LDR R0, [R0, #32] 0x3418368A: F1B0 5F00 CMP.W R0, #0x20000000 0x3418368E: D004 BEQ 46L76 ; 0x3418369A 0x34183690: 9804 LDR R0, [SP, #16] 0x34183692: 6A00 LDR R0, [R0, #32] 0x34183694: F1B0 5F40 CMP.W R0, #0x30000000 0x34183698: D100 BNE 46L77 ; 0x3418369C
.L76: 0x3418369A: E007 B 46L78 ; 0x341836AC
.L77: 0x3418369C: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341836A0: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341836A4: F240 1163 MOVW R1, #0x0163 0x341836A8: F00A FAF6 BL assert_failed ; 0x3418DC98
.L78: 0x341836AC: 9804 LDR R0, [SP, #16] 0x341836AE: 6A40 LDR R0, [R0, #36] 0x341836B0: B128 CBZ R0, .L79 ; 0x341836BE 0x341836B2: 9804 LDR R0, [SP, #16] 0x341836B4: 6A40 LDR R0, [R0, #36] 0x341836B6: F5B0 7F80 CMP.W R0, #0x0100 0x341836BA: D800 BHI 46L79 ; 0x341836BE 0x341836BC: E007 B 46L80 ; 0x341836CE
.L79: 0x341836BE: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341836C2: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341836C6: F44F 71B2 MOV.W R1, #0x0164 0x341836CA: F00A FAE5 BL assert_failed ; 0x3418DC98
.L80: 0x341836CE: F248 01D0 MOVW R1, #0x80D0 0x341836D2: F2C5 6102 MOVT R1, #0x5602 0x341836D6: 6808 LDR R0, [R1] 0x341836D8: F64F 72FF MOVW R2, #0xFFFF 0x341836DC: F6CC 7200 MOVT R2, #0xCF00 0x341836E0: 4010 ANDS R0, R2 0x341836E2: 9B04 LDR R3, [SP, #16] 0x341836E4: 6A1A LDR R2, [R3, #32] 0x341836E6: F8D3 C024 LDR.W R12, [R3, #36] 0x341836EA: 2300 MOVS R3, #0 0x341836EC: F6CF 73FF MOVT R3, #0xFFFF 0x341836F0: EB03 430C ADD.W R3, R3, R12, LSL #16 0x341836F4: 431A ORRS R2, R3 0x341836F6: 4310 ORRS R0, R2 0x341836F8: 6008 STR R0, [R1] 0x341836FA: F00C FDA7 BL LL_RCC_IC4_Enable ; 0x3419024C 0x341836FE: E00B B 46L82 ; 0x34183718
.L81: 0x34183700: 9804 LDR R0, [SP, #16] 0x34183702: F8D0 00B0 LDR.W R0, [R0, #176] 0x34183706: F240 4114 MOVW R1, #0x0414 0x3418370A: F2C0 3101 MOVT R1, #0x0301 0x3418370E: 4288 CMP R0, R1 0x34183710: D102 BNE 46L82 ; 0x34183718 0x34183712: F00C FDA3 BL LL_RCC_CLKP_Enable ; 0x3419025C 0x34183716: E7FF B 46L82 ; 0x34183718
.L82: 0x34183718: 9804 LDR R0, [SP, #16] 0x3418371A: F8D0 00B0 LDR.W R0, [R0, #176] 0x3418371E: F005 F851 BL LL_RCC_SetXSPIClockSource ; 0x341887C4
.L83: 0x34183722: 9804 LDR R0, [SP, #16] 0x34183724: 79C0 LDRB R0, [R0, #7] 0x34183726: 07C0 LSLS R0, R0, #31 0x34183728: 2800 CMP R0, #0 0x3418372A: F000 80DA BEQ.W 46L100 ; 0x341838E2 0x3418372E: 9804 LDR R0, [SP, #16] 0x34183730: F8D0 00B4 LDR.W R0, [R0, #180] 0x34183734: F640 0114 MOVW R1, #0x0814 0x34183738: F2C0 3100 MOVT R1, #0x0300 0x3418373C: 4288 CMP R0, R1 0x3418373E: D01A BEQ 46L84 ; 0x34183776 0x34183740: 9804 LDR R0, [SP, #16] 0x34183742: F8D0 00B4 LDR.W R0, [R0, #180] 0x34183746: F640 0114 MOVW R1, #0x0814 0x3418374A: F2C0 3101 MOVT R1, #0x0301 0x3418374E: 4288 CMP R0, R1 0x34183750: D011 BEQ 46L84 ; 0x34183776 0x34183752: 9804 LDR R0, [SP, #16] 0x34183754: F8D0 00B4 LDR.W R0, [R0, #180] 0x34183758: F640 0114 MOVW R1, #0x0814 0x3418375C: F2C0 3102 MOVT R1, #0x0302 0x34183760: 4288 CMP R0, R1 0x34183762: D008 BEQ 46L84 ; 0x34183776 0x34183764: 9804 LDR R0, [SP, #16] 0x34183766: F8D0 00B4 LDR.W R0, [R0, #180] 0x3418376A: F640 0114 MOVW R1, #0x0814 0x3418376E: F2C0 3103 MOVT R1, #0x0303 0x34183772: 4288 CMP R0, R1 0x34183774: D100 BNE 46L85 ; 0x34183778
.L84: 0x34183776: E007 B 46L86 ; 0x34183788
.L85: 0x34183778: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x3418377C: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34183780: F44F 71BF MOV.W R1, #0x017E 0x34183784: F00A FA88 BL assert_failed ; 0x3418DC98
.L86: 0x34183788: 9804 LDR R0, [SP, #16] 0x3418378A: F8D0 00B4 LDR.W R0, [R0, #180] 0x3418378E: F640 0114 MOVW R1, #0x0814 0x34183792: F2C0 3102 MOVT R1, #0x0302 0x34183796: 4288 CMP R0, R1 0x34183798: D144 BNE 46L92 ; 0x34183824 0x3418379A: 9804 LDR R0, [SP, #16] 0x3418379C: 6980 LDR R0, [R0, #24] 0x3418379E: B170 CBZ R0, .L87 ; 0x341837BE 0x341837A0: 9804 LDR R0, [SP, #16] 0x341837A2: 6980 LDR R0, [R0, #24] 0x341837A4: F1B0 5F80 CMP.W R0, #0x10000000 0x341837A8: D009 BEQ 46L87 ; 0x341837BE 0x341837AA: 9804 LDR R0, [SP, #16] 0x341837AC: 6980 LDR R0, [R0, #24] 0x341837AE: F1B0 5F00 CMP.W R0, #0x20000000 0x341837B2: D004 BEQ 46L87 ; 0x341837BE 0x341837B4: 9804 LDR R0, [SP, #16] 0x341837B6: 6980 LDR R0, [R0, #24] 0x341837B8: F1B0 5F40 CMP.W R0, #0x30000000 0x341837BC: D100 BNE 46L88 ; 0x341837C0
.L87: 0x341837BE: E007 B 46L89 ; 0x341837D0
.L88: 0x341837C0: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341837C4: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341837C8: F240 1183 MOVW R1, #0x0183 0x341837CC: F00A FA64 BL assert_failed ; 0x3418DC98
.L89: 0x341837D0: 9804 LDR R0, [SP, #16] 0x341837D2: 69C0 LDR R0, [R0, #28] 0x341837D4: B128 CBZ R0, .L90 ; 0x341837E2 0x341837D6: 9804 LDR R0, [SP, #16] 0x341837D8: 69C0 LDR R0, [R0, #28] 0x341837DA: F5B0 7F80 CMP.W R0, #0x0100 0x341837DE: D800 BHI 46L90 ; 0x341837E2 0x341837E0: E007 B 46L91 ; 0x341837F2
.L90: 0x341837E2: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341837E6: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341837EA: F44F 71C2 MOV.W R1, #0x0184 0x341837EE: F00A FA53 BL assert_failed ; 0x3418DC98
.L91: 0x341837F2: F248 01CC MOVW R1, #0x80CC 0x341837F6: F2C5 6102 MOVT R1, #0x5602 0x341837FA: 6808 LDR R0, [R1] 0x341837FC: F64F 72FF MOVW R2, #0xFFFF 0x34183800: F6CC 7200 MOVT R2, #0xCF00 0x34183804: 4010 ANDS R0, R2 0x34183806: 9B04 LDR R3, [SP, #16] 0x34183808: 699A LDR R2, [R3, #24] 0x3418380A: F8D3 C01C LDR.W R12, [R3, #28] 0x3418380E: 2300 MOVS R3, #0 0x34183810: F6CF 73FF MOVT R3, #0xFFFF 0x34183814: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34183818: 431A ORRS R2, R3 0x3418381A: 4310 ORRS R0, R2 0x3418381C: 6008 STR R0, [R1] 0x3418381E: F00C FD0D BL LL_RCC_IC3_Enable ; 0x3419023C 0x34183822: E059 B 46L99 ; 0x341838D8
.L92: 0x34183824: 9804 LDR R0, [SP, #16] 0x34183826: F8D0 00B4 LDR.W R0, [R0, #180] 0x3418382A: F640 0114 MOVW R1, #0x0814 0x3418382E: F2C0 3103 MOVT R1, #0x0303 0x34183832: 4288 CMP R0, R1 0x34183834: D144 BNE 46L98 ; 0x341838C0 0x34183836: 9804 LDR R0, [SP, #16] 0x34183838: 6A00 LDR R0, [R0, #32] 0x3418383A: B170 CBZ R0, .L93 ; 0x3418385A 0x3418383C: 9804 LDR R0, [SP, #16] 0x3418383E: 6A00 LDR R0, [R0, #32] 0x34183840: F1B0 5F80 CMP.W R0, #0x10000000 0x34183844: D009 BEQ 46L93 ; 0x3418385A 0x34183846: 9804 LDR R0, [SP, #16] 0x34183848: 6A00 LDR R0, [R0, #32] 0x3418384A: F1B0 5F00 CMP.W R0, #0x20000000 0x3418384E: D004 BEQ 46L93 ; 0x3418385A 0x34183850: 9804 LDR R0, [SP, #16] 0x34183852: 6A00 LDR R0, [R0, #32] 0x34183854: F1B0 5F40 CMP.W R0, #0x30000000 0x34183858: D100 BNE 46L94 ; 0x3418385C
.L93: 0x3418385A: E007 B 46L95 ; 0x3418386C
.L94: 0x3418385C: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34183860: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34183864: F44F 71C8 MOV.W R1, #0x0190 0x34183868: F00A FA16 BL assert_failed ; 0x3418DC98
.L95: 0x3418386C: 9804 LDR R0, [SP, #16] 0x3418386E: 6A40 LDR R0, [R0, #36] 0x34183870: B128 CBZ R0, .L96 ; 0x3418387E 0x34183872: 9804 LDR R0, [SP, #16] 0x34183874: 6A40 LDR R0, [R0, #36] 0x34183876: F5B0 7F80 CMP.W R0, #0x0100 0x3418387A: D800 BHI 46L96 ; 0x3418387E 0x3418387C: E007 B 46L97 ; 0x3418388E
.L96: 0x3418387E: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34183882: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34183886: F240 1191 MOVW R1, #0x0191 0x3418388A: F00A FA05 BL assert_failed ; 0x3418DC98
.L97: 0x3418388E: F248 01D0 MOVW R1, #0x80D0 0x34183892: F2C5 6102 MOVT R1, #0x5602 0x34183896: 6808 LDR R0, [R1] 0x34183898: F64F 72FF MOVW R2, #0xFFFF 0x3418389C: F6CC 7200 MOVT R2, #0xCF00 0x341838A0: 4010 ANDS R0, R2 0x341838A2: 9B04 LDR R3, [SP, #16] 0x341838A4: 6A1A LDR R2, [R3, #32] 0x341838A6: F8D3 C024 LDR.W R12, [R3, #36] 0x341838AA: 2300 MOVS R3, #0 0x341838AC: F6CF 73FF MOVT R3, #0xFFFF 0x341838B0: EB03 430C ADD.W R3, R3, R12, LSL #16 0x341838B4: 431A ORRS R2, R3 0x341838B6: 4310 ORRS R0, R2 0x341838B8: 6008 STR R0, [R1] 0x341838BA: F00C FCC7 BL LL_RCC_IC4_Enable ; 0x3419024C 0x341838BE: E00B B 46L99 ; 0x341838D8
.L98: 0x341838C0: 9804 LDR R0, [SP, #16] 0x341838C2: F8D0 00B4 LDR.W R0, [R0, #180] 0x341838C6: F640 0114 MOVW R1, #0x0814 0x341838CA: F2C0 3101 MOVT R1, #0x0301 0x341838CE: 4288 CMP R0, R1 0x341838D0: D102 BNE 46L99 ; 0x341838D8 0x341838D2: F00C FCC3 BL LL_RCC_CLKP_Enable ; 0x3419025C 0x341838D6: E7FF B 46L99 ; 0x341838D8
.L99: 0x341838D8: 9804 LDR R0, [SP, #16] 0x341838DA: F8D0 00B4 LDR.W R0, [R0, #180] 0x341838DE: F004 FF71 BL LL_RCC_SetXSPIClockSource ; 0x341887C4
.L100: 0x341838E2: 9804 LDR R0, [SP, #16] 0x341838E4: 7840 LDRB R0, [R0, #1] 0x341838E6: 0700 LSLS R0, R0, #28 0x341838E8: 2800 CMP R0, #0 0x341838EA: F140 80BD BPL.W 46L117 ; 0x34183A68 0x341838EE: 9804 LDR R0, [SP, #16] 0x341838F0: F8D0 00A8 LDR.W R0, [R0, #168] 0x341838F4: B170 CBZ R0, .L101 ; 0x34183914 0x341838F6: 9804 LDR R0, [SP, #16] 0x341838F8: F8D0 00A8 LDR.W R0, [R0, #168] 0x341838FC: 2810 CMP R0, #16 0x341838FE: D009 BEQ 46L101 ; 0x34183914 0x34183900: 9804 LDR R0, [SP, #16] 0x34183902: F8D0 00A8 LDR.W R0, [R0, #168] 0x34183906: 2820 CMP R0, #32 0x34183908: D004 BEQ 46L101 ; 0x34183914 0x3418390A: 9804 LDR R0, [SP, #16] 0x3418390C: F8D0 00A8 LDR.W R0, [R0, #168] 0x34183910: 2830 CMP R0, #48 0x34183912: D100 BNE 46L102 ; 0x34183916
.L101: 0x34183914: E007 B 46L103 ; 0x34183926
.L102: 0x34183916: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x3418391A: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x3418391E: F240 11AB MOVW R1, #0x01AB 0x34183922: F00A F9B9 BL assert_failed ; 0x3418DC98
.L103: 0x34183926: 9804 LDR R0, [SP, #16] 0x34183928: F8D0 00A8 LDR.W R0, [R0, #168] 0x3418392C: 2820 CMP R0, #32 0x3418392E: D144 BNE 46L109 ; 0x341839BA 0x34183930: 9804 LDR R0, [SP, #16] 0x34183932: 6980 LDR R0, [R0, #24] 0x34183934: B170 CBZ R0, .L104 ; 0x34183954 0x34183936: 9804 LDR R0, [SP, #16] 0x34183938: 6980 LDR R0, [R0, #24] 0x3418393A: F1B0 5F80 CMP.W R0, #0x10000000 0x3418393E: D009 BEQ 46L104 ; 0x34183954 0x34183940: 9804 LDR R0, [SP, #16] 0x34183942: 6980 LDR R0, [R0, #24] 0x34183944: F1B0 5F00 CMP.W R0, #0x20000000 0x34183948: D004 BEQ 46L104 ; 0x34183954 0x3418394A: 9804 LDR R0, [SP, #16] 0x3418394C: 6980 LDR R0, [R0, #24] 0x3418394E: F1B0 5F40 CMP.W R0, #0x30000000 0x34183952: D100 BNE 46L105 ; 0x34183956
.L104: 0x34183954: E007 B 46L106 ; 0x34183966
.L105: 0x34183956: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x3418395A: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x3418395E: F44F 71D8 MOV.W R1, #0x01B0 0x34183962: F00A F999 BL assert_failed ; 0x3418DC98
.L106: 0x34183966: 9804 LDR R0, [SP, #16] 0x34183968: 69C0 LDR R0, [R0, #28] 0x3418396A: B128 CBZ R0, .L107 ; 0x34183978 0x3418396C: 9804 LDR R0, [SP, #16] 0x3418396E: 69C0 LDR R0, [R0, #28] 0x34183970: F5B0 7F80 CMP.W R0, #0x0100 0x34183974: D800 BHI 46L107 ; 0x34183978 0x34183976: E007 B 46L108 ; 0x34183988
.L107: 0x34183978: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x3418397C: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34183980: F240 11B1 MOVW R1, #0x01B1 0x34183984: F00A F988 BL assert_failed ; 0x3418DC98
.L108: 0x34183988: F248 01CC MOVW R1, #0x80CC 0x3418398C: F2C5 6102 MOVT R1, #0x5602 0x34183990: 6808 LDR R0, [R1] 0x34183992: F64F 72FF MOVW R2, #0xFFFF 0x34183996: F6CC 7200 MOVT R2, #0xCF00 0x3418399A: 4010 ANDS R0, R2 0x3418399C: 9B04 LDR R3, [SP, #16] 0x3418399E: 699A LDR R2, [R3, #24] 0x341839A0: F8D3 C01C LDR.W R12, [R3, #28] 0x341839A4: 2300 MOVS R3, #0 0x341839A6: F6CF 73FF MOVT R3, #0xFFFF 0x341839AA: EB03 430C ADD.W R3, R3, R12, LSL #16 0x341839AE: 431A ORRS R2, R3 0x341839B0: 4310 ORRS R0, R2 0x341839B2: 6008 STR R0, [R1] 0x341839B4: F00C FC42 BL LL_RCC_IC3_Enable ; 0x3419023C 0x341839B8: E051 B 46L116 ; 0x34183A5E
.L109: 0x341839BA: 9804 LDR R0, [SP, #16] 0x341839BC: F8D0 00A8 LDR.W R0, [R0, #168] 0x341839C0: 2830 CMP R0, #48 0x341839C2: D144 BNE 46L115 ; 0x34183A4E 0x341839C4: 9804 LDR R0, [SP, #16] 0x341839C6: 6A00 LDR R0, [R0, #32] 0x341839C8: B170 CBZ R0, .L110 ; 0x341839E8 0x341839CA: 9804 LDR R0, [SP, #16] 0x341839CC: 6A00 LDR R0, [R0, #32] 0x341839CE: F1B0 5F80 CMP.W R0, #0x10000000 0x341839D2: D009 BEQ 46L110 ; 0x341839E8 0x341839D4: 9804 LDR R0, [SP, #16] 0x341839D6: 6A00 LDR R0, [R0, #32] 0x341839D8: F1B0 5F00 CMP.W R0, #0x20000000 0x341839DC: D004 BEQ 46L110 ; 0x341839E8 0x341839DE: 9804 LDR R0, [SP, #16] 0x341839E0: 6A00 LDR R0, [R0, #32] 0x341839E2: F1B0 5F40 CMP.W R0, #0x30000000 0x341839E6: D100 BNE 46L111 ; 0x341839EA
.L110: 0x341839E8: E007 B 46L112 ; 0x341839FA
.L111: 0x341839EA: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341839EE: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341839F2: F240 11BD MOVW R1, #0x01BD 0x341839F6: F00A F94F BL assert_failed ; 0x3418DC98
.L112: 0x341839FA: 9804 LDR R0, [SP, #16] 0x341839FC: 6A40 LDR R0, [R0, #36] 0x341839FE: B128 CBZ R0, .L113 ; 0x34183A0C 0x34183A00: 9804 LDR R0, [SP, #16] 0x34183A02: 6A40 LDR R0, [R0, #36] 0x34183A04: F5B0 7F80 CMP.W R0, #0x0100 0x34183A08: D800 BHI 46L113 ; 0x34183A0C 0x34183A0A: E007 B 46L114 ; 0x34183A1C
.L113: 0x34183A0C: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34183A10: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34183A14: F44F 71DF MOV.W R1, #0x01BE 0x34183A18: F00A F93E BL assert_failed ; 0x3418DC98
.L114: 0x34183A1C: F248 01D0 MOVW R1, #0x80D0 0x34183A20: F2C5 6102 MOVT R1, #0x5602 0x34183A24: 6808 LDR R0, [R1] 0x34183A26: F64F 72FF MOVW R2, #0xFFFF 0x34183A2A: F6CC 7200 MOVT R2, #0xCF00 0x34183A2E: 4010 ANDS R0, R2 0x34183A30: 9B04 LDR R3, [SP, #16] 0x34183A32: 6A1A LDR R2, [R3, #32] 0x34183A34: F8D3 C024 LDR.W R12, [R3, #36] 0x34183A38: 2300 MOVS R3, #0 0x34183A3A: F6CF 73FF MOVT R3, #0xFFFF 0x34183A3E: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34183A42: 431A ORRS R2, R3 0x34183A44: 4310 ORRS R0, R2 0x34183A46: 6008 STR R0, [R1] 0x34183A48: F00C FC00 BL LL_RCC_IC4_Enable ; 0x3419024C 0x34183A4C: E007 B 46L116 ; 0x34183A5E
.L115: 0x34183A4E: 9804 LDR R0, [SP, #16] 0x34183A50: F8D0 00A8 LDR.W R0, [R0, #168] 0x34183A54: 2810 CMP R0, #16 0x34183A56: D102 BNE 46L116 ; 0x34183A5E 0x34183A58: F00C FC00 BL LL_RCC_CLKP_Enable ; 0x3419025C 0x34183A5C: E7FF B 46L116 ; 0x34183A5E
.L116: 0x34183A5E: 9804 LDR R0, [SP, #16] 0x34183A60: F8D0 00A8 LDR.W R0, [R0, #168] 0x34183A64: F004 FEB6 BL LL_RCC_SetFMCClockSource ; 0x341887D4
.L117: 0x34183A68: 9804 LDR R0, [SP, #16] 0x34183A6A: 78C0 LDRB R0, [R0, #3] 0x34183A6C: 0640 LSLS R0, R0, #25 0x34183A6E: 2800 CMP R0, #0 0x34183A70: F140 80D3 BPL.W 46L134 ; 0x34183C1A 0x34183A74: 9804 LDR R0, [SP, #16] 0x34183A76: F8D0 012C LDR.W R0, [R0, #0x012C] 0x34183A7A: 211C MOVS R1, #28 0x34183A7C: F2C0 3100 MOVT R1, #0x0300 0x34183A80: 4288 CMP R0, R1 0x34183A82: D017 BEQ 46L118 ; 0x34183AB4 0x34183A84: 9804 LDR R0, [SP, #16] 0x34183A86: F8D0 012C LDR.W R0, [R0, #0x012C] 0x34183A8A: 211C MOVS R1, #28 0x34183A8C: F2C0 3101 MOVT R1, #0x0301 0x34183A90: 4288 CMP R0, R1 0x34183A92: D00F BEQ 46L118 ; 0x34183AB4 0x34183A94: 9804 LDR R0, [SP, #16] 0x34183A96: F8D0 012C LDR.W R0, [R0, #0x012C] 0x34183A9A: 211C MOVS R1, #28 0x34183A9C: F2C0 3102 MOVT R1, #0x0302 0x34183AA0: 4288 CMP R0, R1 0x34183AA2: D007 BEQ 46L118 ; 0x34183AB4 0x34183AA4: 9804 LDR R0, [SP, #16] 0x34183AA6: F8D0 012C LDR.W R0, [R0, #0x012C] 0x34183AAA: 211C MOVS R1, #28 0x34183AAC: F2C0 3103 MOVT R1, #0x0303 0x34183AB0: 4288 CMP R0, R1 0x34183AB2: D100 BNE 46L119 ; 0x34183AB6
.L118: 0x34183AB4: E007 B 46L120 ; 0x34183AC6
.L119: 0x34183AB6: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34183ABA: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34183ABE: F44F 71EC MOV.W R1, #0x01D8 0x34183AC2: F00A F8E9 BL assert_failed ; 0x3418DC98
.L120: 0x34183AC6: 9804 LDR R0, [SP, #16] 0x34183AC8: F8D0 012C LDR.W R0, [R0, #0x012C] 0x34183ACC: 211C MOVS R1, #28 0x34183ACE: F2C0 3102 MOVT R1, #0x0302 0x34183AD2: 4288 CMP R0, R1 0x34183AD4: D144 BNE 46L126 ; 0x34183B60 0x34183AD6: 9804 LDR R0, [SP, #16] 0x34183AD8: 6A00 LDR R0, [R0, #32] 0x34183ADA: B170 CBZ R0, .L121 ; 0x34183AFA 0x34183ADC: 9804 LDR R0, [SP, #16] 0x34183ADE: 6A00 LDR R0, [R0, #32] 0x34183AE0: F1B0 5F80 CMP.W R0, #0x10000000 0x34183AE4: D009 BEQ 46L121 ; 0x34183AFA 0x34183AE6: 9804 LDR R0, [SP, #16] 0x34183AE8: 6A00 LDR R0, [R0, #32] 0x34183AEA: F1B0 5F00 CMP.W R0, #0x20000000 0x34183AEE: D004 BEQ 46L121 ; 0x34183AFA 0x34183AF0: 9804 LDR R0, [SP, #16] 0x34183AF2: 6A00 LDR R0, [R0, #32] 0x34183AF4: F1B0 5F40 CMP.W R0, #0x30000000 0x34183AF8: D100 BNE 46L122 ; 0x34183AFC
.L121: 0x34183AFA: E007 B 46L123 ; 0x34183B0C
.L122: 0x34183AFC: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34183B00: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34183B04: F240 11DD MOVW R1, #0x01DD 0x34183B08: F00A F8C6 BL assert_failed ; 0x3418DC98
.L123: 0x34183B0C: 9804 LDR R0, [SP, #16] 0x34183B0E: 6A40 LDR R0, [R0, #36] 0x34183B10: B128 CBZ R0, .L124 ; 0x34183B1E 0x34183B12: 9804 LDR R0, [SP, #16] 0x34183B14: 6A40 LDR R0, [R0, #36] 0x34183B16: F5B0 7F80 CMP.W R0, #0x0100 0x34183B1A: D800 BHI 46L124 ; 0x34183B1E 0x34183B1C: E007 B 46L125 ; 0x34183B2E
.L124: 0x34183B1E: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34183B22: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34183B26: F44F 71EF MOV.W R1, #0x01DE 0x34183B2A: F00A F8B5 BL assert_failed ; 0x3418DC98
.L125: 0x34183B2E: F248 01D0 MOVW R1, #0x80D0 0x34183B32: F2C5 6102 MOVT R1, #0x5602 0x34183B36: 6808 LDR R0, [R1] 0x34183B38: F64F 72FF MOVW R2, #0xFFFF 0x34183B3C: F6CC 7200 MOVT R2, #0xCF00 0x34183B40: 4010 ANDS R0, R2 0x34183B42: 9B04 LDR R3, [SP, #16] 0x34183B44: 6A1A LDR R2, [R3, #32] 0x34183B46: F8D3 C024 LDR.W R12, [R3, #36] 0x34183B4A: 2300 MOVS R3, #0 0x34183B4C: F6CF 73FF MOVT R3, #0xFFFF 0x34183B50: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34183B54: 431A ORRS R2, R3 0x34183B56: 4310 ORRS R0, R2 0x34183B58: 6008 STR R0, [R1] 0x34183B5A: F00C FB77 BL LL_RCC_IC4_Enable ; 0x3419024C 0x34183B5E: E057 B 46L133 ; 0x34183C10
.L126: 0x34183B60: 9804 LDR R0, [SP, #16] 0x34183B62: F8D0 012C LDR.W R0, [R0, #0x012C] 0x34183B66: 211C MOVS R1, #28 0x34183B68: F2C0 3103 MOVT R1, #0x0303 0x34183B6C: 4288 CMP R0, R1 0x34183B6E: D144 BNE 46L132 ; 0x34183BFA 0x34183B70: 9804 LDR R0, [SP, #16] 0x34183B72: 6A80 LDR R0, [R0, #40] 0x34183B74: B170 CBZ R0, .L127 ; 0x34183B94 0x34183B76: 9804 LDR R0, [SP, #16] 0x34183B78: 6A80 LDR R0, [R0, #40] 0x34183B7A: F1B0 5F80 CMP.W R0, #0x10000000 0x34183B7E: D009 BEQ 46L127 ; 0x34183B94 0x34183B80: 9804 LDR R0, [SP, #16] 0x34183B82: 6A80 LDR R0, [R0, #40] 0x34183B84: F1B0 5F00 CMP.W R0, #0x20000000 0x34183B88: D004 BEQ 46L127 ; 0x34183B94 0x34183B8A: 9804 LDR R0, [SP, #16] 0x34183B8C: 6A80 LDR R0, [R0, #40] 0x34183B8E: F1B0 5F40 CMP.W R0, #0x30000000 0x34183B92: D100 BNE 46L128 ; 0x34183B96
.L127: 0x34183B94: E007 B 46L129 ; 0x34183BA6
.L128: 0x34183B96: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34183B9A: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34183B9E: F44F 71F5 MOV.W R1, #0x01EA 0x34183BA2: F00A F879 BL assert_failed ; 0x3418DC98
.L129: 0x34183BA6: 9804 LDR R0, [SP, #16] 0x34183BA8: 6AC0 LDR R0, [R0, #44] 0x34183BAA: B128 CBZ R0, .L130 ; 0x34183BB8 0x34183BAC: 9804 LDR R0, [SP, #16] 0x34183BAE: 6AC0 LDR R0, [R0, #44] 0x34183BB0: F5B0 7F80 CMP.W R0, #0x0100 0x34183BB4: D800 BHI 46L130 ; 0x34183BB8 0x34183BB6: E007 B 46L131 ; 0x34183BC8
.L130: 0x34183BB8: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34183BBC: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34183BC0: F240 11EB MOVW R1, #0x01EB 0x34183BC4: F00A F868 BL assert_failed ; 0x3418DC98
.L131: 0x34183BC8: F248 01D4 MOVW R1, #0x80D4 0x34183BCC: F2C5 6102 MOVT R1, #0x5602 0x34183BD0: 6808 LDR R0, [R1] 0x34183BD2: F64F 72FF MOVW R2, #0xFFFF 0x34183BD6: F6CC 7200 MOVT R2, #0xCF00 0x34183BDA: 4010 ANDS R0, R2 0x34183BDC: 9B04 LDR R3, [SP, #16] 0x34183BDE: 6A9A LDR R2, [R3, #40] 0x34183BE0: F8D3 C02C LDR.W R12, [R3, #44] 0x34183BE4: 2300 MOVS R3, #0 0x34183BE6: F6CF 73FF MOVT R3, #0xFFFF 0x34183BEA: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34183BEE: 431A ORRS R2, R3 0x34183BF0: 4310 ORRS R0, R2 0x34183BF2: 6008 STR R0, [R1] 0x34183BF4: F00C FB1A BL LL_RCC_IC5_Enable.60 ; 0x3419022C 0x34183BF8: E00A B 46L133 ; 0x34183C10
.L132: 0x34183BFA: 9804 LDR R0, [SP, #16] 0x34183BFC: F8D0 012C LDR.W R0, [R0, #0x012C] 0x34183C00: 211C MOVS R1, #28 0x34183C02: F2C0 3101 MOVT R1, #0x0301 0x34183C06: 4288 CMP R0, R1 0x34183C08: D102 BNE 46L133 ; 0x34183C10 0x34183C0A: F00C FB27 BL LL_RCC_CLKP_Enable ; 0x3419025C 0x34183C0E: E7FF B 46L133 ; 0x34183C10
.L133: 0x34183C10: 9804 LDR R0, [SP, #16] 0x34183C12: F8D0 012C LDR.W R0, [R0, #0x012C] 0x34183C16: F004 FDEB BL LL_RCC_SetSDMMCClockSource ; 0x341887F0
.L134: 0x34183C1A: 9804 LDR R0, [SP, #16] 0x34183C1C: 78C0 LDRB R0, [R0, #3] 0x34183C1E: 0600 LSLS R0, R0, #24 0x34183C20: 2800 CMP R0, #0 0x34183C22: F140 80DA BPL.W 46L151 ; 0x34183DDA 0x34183C26: 9804 LDR R0, [SP, #16] 0x34183C28: F8D0 0130 LDR.W R0, [R0, #0x0130] 0x34183C2C: F240 411C MOVW R1, #0x041C 0x34183C30: F2C0 3100 MOVT R1, #0x0300 0x34183C34: 4288 CMP R0, R1 0x34183C36: D01A BEQ 46L135 ; 0x34183C6E 0x34183C38: 9804 LDR R0, [SP, #16] 0x34183C3A: F8D0 0130 LDR.W R0, [R0, #0x0130] 0x34183C3E: F240 411C MOVW R1, #0x041C 0x34183C42: F2C0 3101 MOVT R1, #0x0301 0x34183C46: 4288 CMP R0, R1 0x34183C48: D011 BEQ 46L135 ; 0x34183C6E 0x34183C4A: 9804 LDR R0, [SP, #16] 0x34183C4C: F8D0 0130 LDR.W R0, [R0, #0x0130] 0x34183C50: F240 411C MOVW R1, #0x041C 0x34183C54: F2C0 3102 MOVT R1, #0x0302 0x34183C58: 4288 CMP R0, R1 0x34183C5A: D008 BEQ 46L135 ; 0x34183C6E 0x34183C5C: 9804 LDR R0, [SP, #16] 0x34183C5E: F8D0 0130 LDR.W R0, [R0, #0x0130] 0x34183C62: F240 411C MOVW R1, #0x041C 0x34183C66: F2C0 3103 MOVT R1, #0x0303 0x34183C6A: 4288 CMP R0, R1 0x34183C6C: D100 BNE 46L136 ; 0x34183C70
.L135: 0x34183C6E: E007 B 46L137 ; 0x34183C80
.L136: 0x34183C70: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34183C74: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34183C78: F240 2105 MOVW R1, #0x0205 0x34183C7C: F00A F80C BL assert_failed ; 0x3418DC98
.L137: 0x34183C80: 9804 LDR R0, [SP, #16] 0x34183C82: F8D0 0130 LDR.W R0, [R0, #0x0130] 0x34183C86: F240 411C MOVW R1, #0x041C 0x34183C8A: F2C0 3102 MOVT R1, #0x0302 0x34183C8E: 4288 CMP R0, R1 0x34183C90: D144 BNE 46L143 ; 0x34183D1C 0x34183C92: 9804 LDR R0, [SP, #16] 0x34183C94: 6A00 LDR R0, [R0, #32] 0x34183C96: B170 CBZ R0, .L138 ; 0x34183CB6 0x34183C98: 9804 LDR R0, [SP, #16] 0x34183C9A: 6A00 LDR R0, [R0, #32] 0x34183C9C: F1B0 5F80 CMP.W R0, #0x10000000 0x34183CA0: D009 BEQ 46L138 ; 0x34183CB6 0x34183CA2: 9804 LDR R0, [SP, #16] 0x34183CA4: 6A00 LDR R0, [R0, #32] 0x34183CA6: F1B0 5F00 CMP.W R0, #0x20000000 0x34183CAA: D004 BEQ 46L138 ; 0x34183CB6 0x34183CAC: 9804 LDR R0, [SP, #16] 0x34183CAE: 6A00 LDR R0, [R0, #32] 0x34183CB0: F1B0 5F40 CMP.W R0, #0x30000000 0x34183CB4: D100 BNE 46L139 ; 0x34183CB8
.L138: 0x34183CB6: E007 B 46L140 ; 0x34183CC8
.L139: 0x34183CB8: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34183CBC: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34183CC0: F240 210A MOVW R1, #0x020A 0x34183CC4: F009 FFE8 BL assert_failed ; 0x3418DC98
.L140: 0x34183CC8: 9804 LDR R0, [SP, #16] 0x34183CCA: 6A40 LDR R0, [R0, #36] 0x34183CCC: B128 CBZ R0, .L141 ; 0x34183CDA 0x34183CCE: 9804 LDR R0, [SP, #16] 0x34183CD0: 6A40 LDR R0, [R0, #36] 0x34183CD2: F5B0 7F80 CMP.W R0, #0x0100 0x34183CD6: D800 BHI 46L141 ; 0x34183CDA 0x34183CD8: E007 B 46L142 ; 0x34183CEA
.L141: 0x34183CDA: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34183CDE: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34183CE2: F240 210B MOVW R1, #0x020B 0x34183CE6: F009 FFD7 BL assert_failed ; 0x3418DC98
.L142: 0x34183CEA: F248 01D0 MOVW R1, #0x80D0 0x34183CEE: F2C5 6102 MOVT R1, #0x5602 0x34183CF2: 6808 LDR R0, [R1] 0x34183CF4: F64F 72FF MOVW R2, #0xFFFF 0x34183CF8: F6CC 7200 MOVT R2, #0xCF00 0x34183CFC: 4010 ANDS R0, R2 0x34183CFE: 9B04 LDR R3, [SP, #16] 0x34183D00: 6A1A LDR R2, [R3, #32] 0x34183D02: F8D3 C024 LDR.W R12, [R3, #36] 0x34183D06: 2300 MOVS R3, #0 0x34183D08: F6CF 73FF MOVT R3, #0xFFFF 0x34183D0C: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34183D10: 431A ORRS R2, R3 0x34183D12: 4310 ORRS R0, R2 0x34183D14: 6008 STR R0, [R1] 0x34183D16: F00C FA99 BL LL_RCC_IC4_Enable ; 0x3419024C 0x34183D1A: E059 B 46L150 ; 0x34183DD0
.L143: 0x34183D1C: 9804 LDR R0, [SP, #16] 0x34183D1E: F8D0 0130 LDR.W R0, [R0, #0x0130] 0x34183D22: F240 411C MOVW R1, #0x041C 0x34183D26: F2C0 3103 MOVT R1, #0x0303 0x34183D2A: 4288 CMP R0, R1 0x34183D2C: D144 BNE 46L149 ; 0x34183DB8 0x34183D2E: 9804 LDR R0, [SP, #16] 0x34183D30: 6A80 LDR R0, [R0, #40] 0x34183D32: B170 CBZ R0, .L144 ; 0x34183D52 0x34183D34: 9804 LDR R0, [SP, #16] 0x34183D36: 6A80 LDR R0, [R0, #40] 0x34183D38: F1B0 5F80 CMP.W R0, #0x10000000 0x34183D3C: D009 BEQ 46L144 ; 0x34183D52 0x34183D3E: 9804 LDR R0, [SP, #16] 0x34183D40: 6A80 LDR R0, [R0, #40] 0x34183D42: F1B0 5F00 CMP.W R0, #0x20000000 0x34183D46: D004 BEQ 46L144 ; 0x34183D52 0x34183D48: 9804 LDR R0, [SP, #16] 0x34183D4A: 6A80 LDR R0, [R0, #40] 0x34183D4C: F1B0 5F40 CMP.W R0, #0x30000000 0x34183D50: D100 BNE 46L145 ; 0x34183D54
.L144: 0x34183D52: E007 B 46L146 ; 0x34183D64
.L145: 0x34183D54: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34183D58: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34183D5C: F240 2117 MOVW R1, #0x0217 0x34183D60: F009 FF9A BL assert_failed ; 0x3418DC98
.L146: 0x34183D64: 9804 LDR R0, [SP, #16] 0x34183D66: 6AC0 LDR R0, [R0, #44] 0x34183D68: B128 CBZ R0, .L147 ; 0x34183D76 0x34183D6A: 9804 LDR R0, [SP, #16] 0x34183D6C: 6AC0 LDR R0, [R0, #44] 0x34183D6E: F5B0 7F80 CMP.W R0, #0x0100 0x34183D72: D800 BHI 46L147 ; 0x34183D76 0x34183D74: E007 B 46L148 ; 0x34183D86
.L147: 0x34183D76: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34183D7A: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34183D7E: F44F 7106 MOV.W R1, #0x0218 0x34183D82: F009 FF89 BL assert_failed ; 0x3418DC98
.L148: 0x34183D86: F248 01D4 MOVW R1, #0x80D4 0x34183D8A: F2C5 6102 MOVT R1, #0x5602 0x34183D8E: 6808 LDR R0, [R1] 0x34183D90: F64F 72FF MOVW R2, #0xFFFF 0x34183D94: F6CC 7200 MOVT R2, #0xCF00 0x34183D98: 4010 ANDS R0, R2 0x34183D9A: 9B04 LDR R3, [SP, #16] 0x34183D9C: 6A9A LDR R2, [R3, #40] 0x34183D9E: F8D3 C02C LDR.W R12, [R3, #44] 0x34183DA2: 2300 MOVS R3, #0 0x34183DA4: F6CF 73FF MOVT R3, #0xFFFF 0x34183DA8: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34183DAC: 431A ORRS R2, R3 0x34183DAE: 4310 ORRS R0, R2 0x34183DB0: 6008 STR R0, [R1] 0x34183DB2: F00C FA3B BL LL_RCC_IC5_Enable.60 ; 0x3419022C 0x34183DB6: E00B B 46L150 ; 0x34183DD0
.L149: 0x34183DB8: 9804 LDR R0, [SP, #16] 0x34183DBA: F8D0 0130 LDR.W R0, [R0, #0x0130] 0x34183DBE: F240 411C MOVW R1, #0x041C 0x34183DC2: F2C0 3101 MOVT R1, #0x0301 0x34183DC6: 4288 CMP R0, R1 0x34183DC8: D102 BNE 46L150 ; 0x34183DD0 0x34183DCA: F00C FA47 BL LL_RCC_CLKP_Enable ; 0x3419025C 0x34183DCE: E7FF B 46L150 ; 0x34183DD0
.L150: 0x34183DD0: 9804 LDR R0, [SP, #16] 0x34183DD2: F8D0 0130 LDR.W R0, [R0, #0x0130] 0x34183DD6: F004 FD0B BL LL_RCC_SetSDMMCClockSource ; 0x341887F0
.L151: 0x34183DDA: 9804 LDR R0, [SP, #16] 0x34183DDC: 6800 LDR R0, [R0] 0x34183DDE: 07C0 LSLS R0, R0, #31 0x34183DE0: 2800 CMP R0, #0 0x34183DE2: F000 80F3 BEQ.W 46L170 ; 0x34183FCC 0x34183DE6: 9804 LDR R0, [SP, #16] 0x34183DE8: F8D0 00BC LDR.W R0, [R0, #188] 0x34183DEC: B310 CBZ R0, .L152 ; 0x34183E34 0x34183DEE: 9804 LDR R0, [SP, #16] 0x34183DF0: F8D0 00BC LDR.W R0, [R0, #188] 0x34183DF4: 2810 CMP R0, #16 0x34183DF6: D01D BEQ 46L152 ; 0x34183E34 0x34183DF8: 9804 LDR R0, [SP, #16] 0x34183DFA: F8D0 00BC LDR.W R0, [R0, #188] 0x34183DFE: 2820 CMP R0, #32 0x34183E00: D018 BEQ 46L152 ; 0x34183E34 0x34183E02: 9804 LDR R0, [SP, #16] 0x34183E04: F8D0 00BC LDR.W R0, [R0, #188] 0x34183E08: 2830 CMP R0, #48 0x34183E0A: D013 BEQ 46L152 ; 0x34183E34 0x34183E0C: 9804 LDR R0, [SP, #16] 0x34183E0E: F8D0 00BC LDR.W R0, [R0, #188] 0x34183E12: 2840 CMP R0, #64 0x34183E14: D00E BEQ 46L152 ; 0x34183E34 0x34183E16: 9804 LDR R0, [SP, #16] 0x34183E18: F8D0 00BC LDR.W R0, [R0, #188] 0x34183E1C: 2850 CMP R0, #80 0x34183E1E: D009 BEQ 46L152 ; 0x34183E34 0x34183E20: 9804 LDR R0, [SP, #16] 0x34183E22: F8D0 00BC LDR.W R0, [R0, #188] 0x34183E26: 2860 CMP R0, #96 0x34183E28: D004 BEQ 46L152 ; 0x34183E34 0x34183E2A: 9804 LDR R0, [SP, #16] 0x34183E2C: F8D0 00BC LDR.W R0, [R0, #188] 0x34183E30: 2870 CMP R0, #112 0x34183E32: D100 BNE 46L153 ; 0x34183E36
.L152: 0x34183E34: E007 B 46L154 ; 0x34183E46
.L153: 0x34183E36: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34183E3A: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34183E3E: F240 2132 MOVW R1, #0x0232 0x34183E42: F009 FF29 BL assert_failed ; 0x3418DC98
.L154: 0x34183E46: 9804 LDR R0, [SP, #16] 0x34183E48: F8D0 00C0 LDR.W R0, [R0, #192] 0x34183E4C: B130 CBZ R0, .L155 ; 0x34183E5C 0x34183E4E: 9804 LDR R0, [SP, #16] 0x34183E50: F8D0 00C0 LDR.W R0, [R0, #192] 0x34183E54: F5B0 7F80 CMP.W R0, #0x0100 0x34183E58: D800 BHI 46L155 ; 0x34183E5C 0x34183E5A: E007 B 46L156 ; 0x34183E6C
.L155: 0x34183E5C: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34183E60: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34183E64: F240 2133 MOVW R1, #0x0233 0x34183E68: F009 FF16 BL assert_failed ; 0x3418DC98
.L156: 0x34183E6C: 9804 LDR R0, [SP, #16] 0x34183E6E: F8D0 00BC LDR.W R0, [R0, #188] 0x34183E72: 2820 CMP R0, #32 0x34183E74: D144 BNE 46L162 ; 0x34183F00 0x34183E76: 9804 LDR R0, [SP, #16] 0x34183E78: 6B80 LDR R0, [R0, #56] 0x34183E7A: B170 CBZ R0, .L157 ; 0x34183E9A 0x34183E7C: 9804 LDR R0, [SP, #16] 0x34183E7E: 6B80 LDR R0, [R0, #56] 0x34183E80: F1B0 5F80 CMP.W R0, #0x10000000 0x34183E84: D009 BEQ 46L157 ; 0x34183E9A 0x34183E86: 9804 LDR R0, [SP, #16] 0x34183E88: 6B80 LDR R0, [R0, #56] 0x34183E8A: F1B0 5F00 CMP.W R0, #0x20000000 0x34183E8E: D004 BEQ 46L157 ; 0x34183E9A 0x34183E90: 9804 LDR R0, [SP, #16] 0x34183E92: 6B80 LDR R0, [R0, #56] 0x34183E94: F1B0 5F40 CMP.W R0, #0x30000000 0x34183E98: D100 BNE 46L158 ; 0x34183E9C
.L157: 0x34183E9A: E007 B 46L159 ; 0x34183EAC
.L158: 0x34183E9C: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34183EA0: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34183EA4: F44F 710E MOV.W R1, #0x0238 0x34183EA8: F009 FEF6 BL assert_failed ; 0x3418DC98
.L159: 0x34183EAC: 9804 LDR R0, [SP, #16] 0x34183EAE: 6BC0 LDR R0, [R0, #60] 0x34183EB0: B128 CBZ R0, .L160 ; 0x34183EBE 0x34183EB2: 9804 LDR R0, [SP, #16] 0x34183EB4: 6BC0 LDR R0, [R0, #60] 0x34183EB6: F5B0 7F80 CMP.W R0, #0x0100 0x34183EBA: D800 BHI 46L160 ; 0x34183EBE 0x34183EBC: E007 B 46L161 ; 0x34183ECE
.L160: 0x34183EBE: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34183EC2: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34183EC6: F240 2139 MOVW R1, #0x0239 0x34183ECA: F009 FEE5 BL assert_failed ; 0x3418DC98
.L161: 0x34183ECE: F248 01DC MOVW R1, #0x80DC 0x34183ED2: F2C5 6102 MOVT R1, #0x5602 0x34183ED6: 6808 LDR R0, [R1] 0x34183ED8: F64F 72FF MOVW R2, #0xFFFF 0x34183EDC: F6CC 7200 MOVT R2, #0xCF00 0x34183EE0: 4010 ANDS R0, R2 0x34183EE2: 9B04 LDR R3, [SP, #16] 0x34183EE4: 6B9A LDR R2, [R3, #56] 0x34183EE6: F8D3 C03C LDR.W R12, [R3, #60] 0x34183EEA: 2300 MOVS R3, #0 0x34183EEC: F6CF 73FF MOVT R3, #0xFFFF 0x34183EF0: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34183EF4: 431A ORRS R2, R3 0x34183EF6: 4310 ORRS R0, R2 0x34183EF8: 6008 STR R0, [R1] 0x34183EFA: F00C F9B7 BL LL_RCC_IC7_Enable ; 0x3419026C 0x34183EFE: E051 B 46L169 ; 0x34183FA4
.L162: 0x34183F00: 9804 LDR R0, [SP, #16] 0x34183F02: F8D0 00BC LDR.W R0, [R0, #188] 0x34183F06: 2830 CMP R0, #48 0x34183F08: D144 BNE 46L168 ; 0x34183F94 0x34183F0A: 9804 LDR R0, [SP, #16] 0x34183F0C: 6C00 LDR R0, [R0, #64] 0x34183F0E: B170 CBZ R0, .L163 ; 0x34183F2E 0x34183F10: 9804 LDR R0, [SP, #16] 0x34183F12: 6C00 LDR R0, [R0, #64] 0x34183F14: F1B0 5F80 CMP.W R0, #0x10000000 0x34183F18: D009 BEQ 46L163 ; 0x34183F2E 0x34183F1A: 9804 LDR R0, [SP, #16] 0x34183F1C: 6C00 LDR R0, [R0, #64] 0x34183F1E: F1B0 5F00 CMP.W R0, #0x20000000 0x34183F22: D004 BEQ 46L163 ; 0x34183F2E 0x34183F24: 9804 LDR R0, [SP, #16] 0x34183F26: 6C00 LDR R0, [R0, #64] 0x34183F28: F1B0 5F40 CMP.W R0, #0x30000000 0x34183F2C: D100 BNE 46L164 ; 0x34183F30
.L163: 0x34183F2E: E007 B 46L165 ; 0x34183F40
.L164: 0x34183F30: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34183F34: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34183F38: F240 2145 MOVW R1, #0x0245 0x34183F3C: F009 FEAC BL assert_failed ; 0x3418DC98
.L165: 0x34183F40: 9804 LDR R0, [SP, #16] 0x34183F42: 6C40 LDR R0, [R0, #68] 0x34183F44: B128 CBZ R0, .L166 ; 0x34183F52 0x34183F46: 9804 LDR R0, [SP, #16] 0x34183F48: 6C40 LDR R0, [R0, #68] 0x34183F4A: F5B0 7F80 CMP.W R0, #0x0100 0x34183F4E: D800 BHI 46L166 ; 0x34183F52 0x34183F50: E007 B 46L167 ; 0x34183F62
.L166: 0x34183F52: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34183F56: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34183F5A: F240 2146 MOVW R1, #0x0246 0x34183F5E: F009 FE9B BL assert_failed ; 0x3418DC98
.L167: 0x34183F62: F248 01E0 MOVW R1, #0x80E0 0x34183F66: F2C5 6102 MOVT R1, #0x5602 0x34183F6A: 6808 LDR R0, [R1] 0x34183F6C: F64F 72FF MOVW R2, #0xFFFF 0x34183F70: F6CC 7200 MOVT R2, #0xCF00 0x34183F74: 4010 ANDS R0, R2 0x34183F76: 9B04 LDR R3, [SP, #16] 0x34183F78: 6C1A LDR R2, [R3, #64] 0x34183F7A: F8D3 C044 LDR.W R12, [R3, #68] 0x34183F7E: 2300 MOVS R3, #0 0x34183F80: F6CF 73FF MOVT R3, #0xFFFF 0x34183F84: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34183F88: 431A ORRS R2, R3 0x34183F8A: 4310 ORRS R0, R2 0x34183F8C: 6008 STR R0, [R1] 0x34183F8E: F00C F975 BL LL_RCC_IC8_Enable ; 0x3419027C 0x34183F92: E007 B 46L169 ; 0x34183FA4
.L168: 0x34183F94: 9804 LDR R0, [SP, #16] 0x34183F96: F8D0 00BC LDR.W R0, [R0, #188] 0x34183F9A: 2810 CMP R0, #16 0x34183F9C: D102 BNE 46L169 ; 0x34183FA4 0x34183F9E: F00C F95D BL LL_RCC_CLKP_Enable ; 0x3419025C 0x34183FA2: E7FF B 46L169 ; 0x34183FA4
.L169: 0x34183FA4: F248 1144 MOVW R1, #0x8144 0x34183FA8: F2C5 6102 MOVT R1, #0x5602 0x34183FAC: 6808 LDR R0, [R1] 0x34183FAE: F64F 7270 MOVW R2, #0xFF70 0x34183FB2: 4390 BICS R0, R2 0x34183FB4: 9A04 LDR R2, [SP, #16] 0x34183FB6: F8D2 30BC LDR.W R3, [R2, #188] 0x34183FBA: F8D2 C0C0 LDR.W R12, [R2, #192] 0x34183FBE: F06F 02FF MVN R2, #255 0x34183FC2: EB02 220C ADD.W R2, R2, R12, LSL #8 0x34183FC6: 431A ORRS R2, R3 0x34183FC8: 4310 ORRS R0, R2 0x34183FCA: 6008 STR R0, [R1]
.L170: 0x34183FCC: 9804 LDR R0, [SP, #16] 0x34183FCE: 7800 LDRB R0, [R0] 0x34183FD0: 0780 LSLS R0, R0, #30 0x34183FD2: 2800 CMP R0, #0 0x34183FD4: F140 80D1 BPL.W 46L187 ; 0x3418417A 0x34183FD8: 9804 LDR R0, [SP, #16] 0x34183FDA: F8D0 00C4 LDR.W R0, [R0, #196] 0x34183FDE: B310 CBZ R0, .L171 ; 0x34184026 0x34183FE0: 9804 LDR R0, [SP, #16] 0x34183FE2: F8D0 00C4 LDR.W R0, [R0, #196] 0x34183FE6: 2801 CMP R0, #1 0x34183FE8: D01D BEQ 46L171 ; 0x34184026 0x34183FEA: 9804 LDR R0, [SP, #16] 0x34183FEC: F8D0 00C4 LDR.W R0, [R0, #196] 0x34183FF0: 2802 CMP R0, #2 0x34183FF2: D018 BEQ 46L171 ; 0x34184026 0x34183FF4: 9804 LDR R0, [SP, #16] 0x34183FF6: F8D0 00C4 LDR.W R0, [R0, #196] 0x34183FFA: 2803 CMP R0, #3 0x34183FFC: D013 BEQ 46L171 ; 0x34184026 0x34183FFE: 9804 LDR R0, [SP, #16] 0x34184000: F8D0 00C4 LDR.W R0, [R0, #196] 0x34184004: 2804 CMP R0, #4 0x34184006: D00E BEQ 46L171 ; 0x34184026 0x34184008: 9804 LDR R0, [SP, #16] 0x3418400A: F8D0 00C4 LDR.W R0, [R0, #196] 0x3418400E: 2805 CMP R0, #5 0x34184010: D009 BEQ 46L171 ; 0x34184026 0x34184012: 9804 LDR R0, [SP, #16] 0x34184014: F8D0 00C4 LDR.W R0, [R0, #196] 0x34184018: 2806 CMP R0, #6 0x3418401A: D004 BEQ 46L171 ; 0x34184026 0x3418401C: 9804 LDR R0, [SP, #16] 0x3418401E: F8D0 00C4 LDR.W R0, [R0, #196] 0x34184022: 2807 CMP R0, #7 0x34184024: D100 BNE 46L172 ; 0x34184028
.L171: 0x34184026: E007 B 46L173 ; 0x34184038
.L172: 0x34184028: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x3418402C: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34184030: F240 2161 MOVW R1, #0x0261 0x34184034: F009 FE30 BL assert_failed ; 0x3418DC98
.L173: 0x34184038: 9804 LDR R0, [SP, #16] 0x3418403A: F8D0 00C4 LDR.W R0, [R0, #196] 0x3418403E: 2802 CMP R0, #2 0x34184040: D144 BNE 46L179 ; 0x341840CC 0x34184042: 9804 LDR R0, [SP, #16] 0x34184044: 6B80 LDR R0, [R0, #56] 0x34184046: B170 CBZ R0, .L174 ; 0x34184066 0x34184048: 9804 LDR R0, [SP, #16] 0x3418404A: 6B80 LDR R0, [R0, #56] 0x3418404C: F1B0 5F80 CMP.W R0, #0x10000000 0x34184050: D009 BEQ 46L174 ; 0x34184066 0x34184052: 9804 LDR R0, [SP, #16] 0x34184054: 6B80 LDR R0, [R0, #56] 0x34184056: F1B0 5F00 CMP.W R0, #0x20000000 0x3418405A: D004 BEQ 46L174 ; 0x34184066 0x3418405C: 9804 LDR R0, [SP, #16] 0x3418405E: 6B80 LDR R0, [R0, #56] 0x34184060: F1B0 5F40 CMP.W R0, #0x30000000 0x34184064: D100 BNE 46L175 ; 0x34184068
.L174: 0x34184066: E007 B 46L176 ; 0x34184078
.L175: 0x34184068: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x3418406C: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34184070: F240 2166 MOVW R1, #0x0266 0x34184074: F009 FE10 BL assert_failed ; 0x3418DC98
.L176: 0x34184078: 9804 LDR R0, [SP, #16] 0x3418407A: 6BC0 LDR R0, [R0, #60] 0x3418407C: B128 CBZ R0, .L177 ; 0x3418408A 0x3418407E: 9804 LDR R0, [SP, #16] 0x34184080: 6BC0 LDR R0, [R0, #60] 0x34184082: F5B0 7F80 CMP.W R0, #0x0100 0x34184086: D800 BHI 46L177 ; 0x3418408A 0x34184088: E007 B 46L178 ; 0x3418409A
.L177: 0x3418408A: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x3418408E: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34184092: F240 2167 MOVW R1, #0x0267 0x34184096: F009 FDFF BL assert_failed ; 0x3418DC98
.L178: 0x3418409A: F248 01DC MOVW R1, #0x80DC 0x3418409E: F2C5 6102 MOVT R1, #0x5602 0x341840A2: 6808 LDR R0, [R1] 0x341840A4: F64F 72FF MOVW R2, #0xFFFF 0x341840A8: F6CC 7200 MOVT R2, #0xCF00 0x341840AC: 4010 ANDS R0, R2 0x341840AE: 9B04 LDR R3, [SP, #16] 0x341840B0: 6B9A LDR R2, [R3, #56] 0x341840B2: F8D3 C03C LDR.W R12, [R3, #60] 0x341840B6: 2300 MOVS R3, #0 0x341840B8: F6CF 73FF MOVT R3, #0xFFFF 0x341840BC: EB03 430C ADD.W R3, R3, R12, LSL #16 0x341840C0: 431A ORRS R2, R3 0x341840C2: 4310 ORRS R0, R2 0x341840C4: 6008 STR R0, [R1] 0x341840C6: F00C F8D1 BL LL_RCC_IC7_Enable ; 0x3419026C 0x341840CA: E051 B 46L186 ; 0x34184170
.L179: 0x341840CC: 9804 LDR R0, [SP, #16] 0x341840CE: F8D0 00C4 LDR.W R0, [R0, #196] 0x341840D2: 2803 CMP R0, #3 0x341840D4: D144 BNE 46L185 ; 0x34184160 0x341840D6: 9804 LDR R0, [SP, #16] 0x341840D8: 6C00 LDR R0, [R0, #64] 0x341840DA: B170 CBZ R0, .L180 ; 0x341840FA 0x341840DC: 9804 LDR R0, [SP, #16] 0x341840DE: 6C00 LDR R0, [R0, #64] 0x341840E0: F1B0 5F80 CMP.W R0, #0x10000000 0x341840E4: D009 BEQ 46L180 ; 0x341840FA 0x341840E6: 9804 LDR R0, [SP, #16] 0x341840E8: 6C00 LDR R0, [R0, #64] 0x341840EA: F1B0 5F00 CMP.W R0, #0x20000000 0x341840EE: D004 BEQ 46L180 ; 0x341840FA 0x341840F0: 9804 LDR R0, [SP, #16] 0x341840F2: 6C00 LDR R0, [R0, #64] 0x341840F4: F1B0 5F40 CMP.W R0, #0x30000000 0x341840F8: D100 BNE 46L181 ; 0x341840FC
.L180: 0x341840FA: E007 B 46L182 ; 0x3418410C
.L181: 0x341840FC: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34184100: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34184104: F240 2173 MOVW R1, #0x0273 0x34184108: F009 FDC6 BL assert_failed ; 0x3418DC98
.L182: 0x3418410C: 9804 LDR R0, [SP, #16] 0x3418410E: 6C40 LDR R0, [R0, #68] 0x34184110: B128 CBZ R0, .L183 ; 0x3418411E 0x34184112: 9804 LDR R0, [SP, #16] 0x34184114: 6C40 LDR R0, [R0, #68] 0x34184116: F5B0 7F80 CMP.W R0, #0x0100 0x3418411A: D800 BHI 46L183 ; 0x3418411E 0x3418411C: E007 B 46L184 ; 0x3418412E
.L183: 0x3418411E: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34184122: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34184126: F44F 711D MOV.W R1, #0x0274 0x3418412A: F009 FDB5 BL assert_failed ; 0x3418DC98
.L184: 0x3418412E: F248 01E0 MOVW R1, #0x80E0 0x34184132: F2C5 6102 MOVT R1, #0x5602 0x34184136: 6808 LDR R0, [R1] 0x34184138: F64F 72FF MOVW R2, #0xFFFF 0x3418413C: F6CC 7200 MOVT R2, #0xCF00 0x34184140: 4010 ANDS R0, R2 0x34184142: 9B04 LDR R3, [SP, #16] 0x34184144: 6C1A LDR R2, [R3, #64] 0x34184146: F8D3 C044 LDR.W R12, [R3, #68] 0x3418414A: 2300 MOVS R3, #0 0x3418414C: F6CF 73FF MOVT R3, #0xFFFF 0x34184150: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34184154: 431A ORRS R2, R3 0x34184156: 4310 ORRS R0, R2 0x34184158: 6008 STR R0, [R1] 0x3418415A: F00C F88F BL LL_RCC_IC8_Enable ; 0x3419027C 0x3418415E: E007 B 46L186 ; 0x34184170
.L185: 0x34184160: 9804 LDR R0, [SP, #16] 0x34184162: F8D0 00C4 LDR.W R0, [R0, #196] 0x34184166: 2801 CMP R0, #1 0x34184168: D102 BNE 46L186 ; 0x34184170 0x3418416A: F00C F877 BL LL_RCC_CLKP_Enable ; 0x3419025C 0x3418416E: E7FF B 46L186 ; 0x34184170
.L186: 0x34184170: 9804 LDR R0, [SP, #16] 0x34184172: F8D0 00C4 LDR.W R0, [R0, #196] 0x34184176: F004 FB43 BL LL_RCC_SetADFClockSource ; 0x34188800
.L187: 0x3418417A: 9804 LDR R0, [SP, #16] 0x3418417C: 7800 LDRB R0, [R0] 0x3418417E: 0700 LSLS R0, R0, #28 0x34184180: 2800 CMP R0, #0 0x34184182: D54A BPL 46L193 ; 0x3418421A 0x34184184: 9804 LDR R0, [SP, #16] 0x34184186: F8D0 0090 LDR.W R0, [R0, #144] 0x3418418A: B188 CBZ R0, .L188 ; 0x341841B0 0x3418418C: 9804 LDR R0, [SP, #16] 0x3418418E: F8D0 0090 LDR.W R0, [R0, #144] 0x34184192: F1B0 5F80 CMP.W R0, #0x10000000 0x34184196: D00B BEQ 46L188 ; 0x341841B0 0x34184198: 9804 LDR R0, [SP, #16] 0x3418419A: F8D0 0090 LDR.W R0, [R0, #144] 0x3418419E: F1B0 5F00 CMP.W R0, #0x20000000 0x341841A2: D005 BEQ 46L188 ; 0x341841B0 0x341841A4: 9804 LDR R0, [SP, #16] 0x341841A6: F8D0 0090 LDR.W R0, [R0, #144] 0x341841AA: F1B0 5F40 CMP.W R0, #0x30000000 0x341841AE: D100 BNE 46L189 ; 0x341841B2
.L188: 0x341841B0: E007 B 46L190 ; 0x341841C2
.L189: 0x341841B2: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341841B6: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341841BA: F240 218E MOVW R1, #0x028E 0x341841BE: F009 FD6B BL assert_failed ; 0x3418DC98
.L190: 0x341841C2: 9804 LDR R0, [SP, #16] 0x341841C4: F8D0 0094 LDR.W R0, [R0, #148] 0x341841C8: B130 CBZ R0, .L191 ; 0x341841D8 0x341841CA: 9804 LDR R0, [SP, #16] 0x341841CC: F8D0 0094 LDR.W R0, [R0, #148] 0x341841D0: F5B0 7F80 CMP.W R0, #0x0100 0x341841D4: D800 BHI 46L191 ; 0x341841D8 0x341841D6: E007 B 46L192 ; 0x341841E8
.L191: 0x341841D8: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341841DC: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341841E0: F240 218F MOVW R1, #0x028F 0x341841E4: F009 FD58 BL assert_failed ; 0x3418DC98
.L192: 0x341841E8: F248 1108 MOVW R1, #0x8108 0x341841EC: F2C5 6102 MOVT R1, #0x5602 0x341841F0: 6808 LDR R0, [R1] 0x341841F2: F64F 72FF MOVW R2, #0xFFFF 0x341841F6: F6CC 7200 MOVT R2, #0xCF00 0x341841FA: 4010 ANDS R0, R2 0x341841FC: 9B04 LDR R3, [SP, #16] 0x341841FE: F8D3 2090 LDR.W R2, [R3, #144] 0x34184202: F8D3 C094 LDR.W R12, [R3, #148] 0x34184206: 2300 MOVS R3, #0 0x34184208: F6CF 73FF MOVT R3, #0xFFFF 0x3418420C: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34184210: 431A ORRS R2, R3 0x34184212: 4310 ORRS R0, R2 0x34184214: 6008 STR R0, [R1] 0x34184216: F004 FB01 BL LL_RCC_IC18_Enable ; 0x3418881C
.L193: 0x3418421A: 9804 LDR R0, [SP, #16] 0x3418421C: 7800 LDRB R0, [R0] 0x3418421E: 06C0 LSLS R0, R0, #27 0x34184220: 2800 CMP R0, #0 0x34184222: D57E BPL 46L204 ; 0x34184322 0x34184224: 9804 LDR R0, [SP, #16] 0x34184226: F8D0 00C8 LDR.W R0, [R0, #200] 0x3418422A: B188 CBZ R0, .L194 ; 0x34184250 0x3418422C: 9804 LDR R0, [SP, #16] 0x3418422E: F8D0 00C8 LDR.W R0, [R0, #200] 0x34184232: F5B0 1F80 CMP.W R0, #0x100000 0x34184236: D00B BEQ 46L194 ; 0x34184250 0x34184238: 9804 LDR R0, [SP, #16] 0x3418423A: F8D0 00C8 LDR.W R0, [R0, #200] 0x3418423E: F5B0 1F00 CMP.W R0, #0x200000 0x34184242: D005 BEQ 46L194 ; 0x34184250 0x34184244: 9804 LDR R0, [SP, #16] 0x34184246: F8D0 00C8 LDR.W R0, [R0, #200] 0x3418424A: F5B0 1F40 CMP.W R0, #0x300000 0x3418424E: D100 BNE 46L195 ; 0x34184252
.L194: 0x34184250: E007 B 46L196 ; 0x34184262
.L195: 0x34184252: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34184256: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x3418425A: F240 219D MOVW R1, #0x029D 0x3418425E: F009 FD1B BL assert_failed ; 0x3418DC98
.L196: 0x34184262: 9804 LDR R0, [SP, #16] 0x34184264: F8D0 00C8 LDR.W R0, [R0, #200] 0x34184268: F5B0 1F00 CMP.W R0, #0x200000 0x3418426C: D14B BNE 46L202 ; 0x34184306 0x3418426E: 9804 LDR R0, [SP, #16] 0x34184270: F8D0 0088 LDR.W R0, [R0, #136] 0x34184274: B188 CBZ R0, .L197 ; 0x3418429A 0x34184276: 9804 LDR R0, [SP, #16] 0x34184278: F8D0 0088 LDR.W R0, [R0, #136] 0x3418427C: F1B0 5F80 CMP.W R0, #0x10000000 0x34184280: D00B BEQ 46L197 ; 0x3418429A 0x34184282: 9804 LDR R0, [SP, #16] 0x34184284: F8D0 0088 LDR.W R0, [R0, #136] 0x34184288: F1B0 5F00 CMP.W R0, #0x20000000 0x3418428C: D005 BEQ 46L197 ; 0x3418429A 0x3418428E: 9804 LDR R0, [SP, #16] 0x34184290: F8D0 0088 LDR.W R0, [R0, #136] 0x34184294: F1B0 5F40 CMP.W R0, #0x30000000 0x34184298: D100 BNE 46L198 ; 0x3418429C
.L197: 0x3418429A: E007 B 46L199 ; 0x341842AC
.L198: 0x3418429C: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341842A0: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341842A4: F240 21A2 MOVW R1, #0x02A2 0x341842A8: F009 FCF6 BL assert_failed ; 0x3418DC98
.L199: 0x341842AC: 9804 LDR R0, [SP, #16] 0x341842AE: F8D0 008C LDR.W R0, [R0, #140] 0x341842B2: B130 CBZ R0, .L200 ; 0x341842C2 0x341842B4: 9804 LDR R0, [SP, #16] 0x341842B6: F8D0 008C LDR.W R0, [R0, #140] 0x341842BA: F5B0 7F80 CMP.W R0, #0x0100 0x341842BE: D800 BHI 46L200 ; 0x341842C2 0x341842C0: E007 B 46L201 ; 0x341842D2
.L200: 0x341842C2: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341842C6: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341842CA: F240 21A3 MOVW R1, #0x02A3 0x341842CE: F009 FCE3 BL assert_failed ; 0x3418DC98
.L201: 0x341842D2: F248 1104 MOVW R1, #0x8104 0x341842D6: F2C5 6102 MOVT R1, #0x5602 0x341842DA: 6808 LDR R0, [R1] 0x341842DC: F64F 72FF MOVW R2, #0xFFFF 0x341842E0: F6CC 7200 MOVT R2, #0xCF00 0x341842E4: 4010 ANDS R0, R2 0x341842E6: 9B04 LDR R3, [SP, #16] 0x341842E8: F8D3 2088 LDR.W R2, [R3, #136] 0x341842EC: F8D3 C08C LDR.W R12, [R3, #140] 0x341842F0: 2300 MOVS R3, #0 0x341842F2: F6CF 73FF MOVT R3, #0xFFFF 0x341842F6: EB03 430C ADD.W R3, R3, R12, LSL #16 0x341842FA: 431A ORRS R2, R3 0x341842FC: 4310 ORRS R0, R2 0x341842FE: 6008 STR R0, [R1] 0x34184300: F004 FA94 BL LL_RCC_IC17_Enable ; 0x3418882C 0x34184304: E008 B 46L203 ; 0x34184318
.L202: 0x34184306: 9804 LDR R0, [SP, #16] 0x34184308: F8D0 00C8 LDR.W R0, [R0, #200] 0x3418430C: F5B0 1F80 CMP.W R0, #0x100000 0x34184310: D102 BNE 46L203 ; 0x34184318 0x34184312: F00B FFA3 BL LL_RCC_CLKP_Enable ; 0x3419025C 0x34184316: E7FF B 46L203 ; 0x34184318
.L203: 0x34184318: 9804 LDR R0, [SP, #16] 0x3418431A: F8D0 00C8 LDR.W R0, [R0, #200] 0x3418431E: F004 FA8D BL LL_RCC_SetDCMIPPClockSource ; 0x3418883C
.L204: 0x34184322: 9804 LDR R0, [SP, #16] 0x34184324: 7800 LDRB R0, [R0] 0x34184326: 0680 LSLS R0, R0, #26 0x34184328: 2800 CMP R0, #0 0x3418432A: D577 BPL 46L215 ; 0x3418441C 0x3418432C: 9804 LDR R0, [SP, #16] 0x3418432E: F8D0 00CC LDR.W R0, [R0, #204] 0x34184332: B188 CBZ R0, .L205 ; 0x34184358 0x34184334: 9804 LDR R0, [SP, #16] 0x34184336: F8D0 00CC LDR.W R0, [R0, #204] 0x3418433A: F5B0 5F80 CMP.W R0, #0x1000 0x3418433E: D00B BEQ 46L205 ; 0x34184358 0x34184340: 9804 LDR R0, [SP, #16] 0x34184342: F8D0 00CC LDR.W R0, [R0, #204] 0x34184346: F5B0 5F00 CMP.W R0, #0x2000 0x3418434A: D005 BEQ 46L205 ; 0x34184358 0x3418434C: 9804 LDR R0, [SP, #16] 0x3418434E: F8D0 00CC LDR.W R0, [R0, #204] 0x34184352: F5B0 5F40 CMP.W R0, #0x3000 0x34184356: D100 BNE 46L206 ; 0x3418435A
.L205: 0x34184358: E007 B 46L207 ; 0x3418436A
.L206: 0x3418435A: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x3418435E: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34184362: F240 21BD MOVW R1, #0x02BD 0x34184366: F009 FC97 BL assert_failed ; 0x3418DC98
.L207: 0x3418436A: 9804 LDR R0, [SP, #16] 0x3418436C: F8D0 00CC LDR.W R0, [R0, #204] 0x34184370: F5B0 5F00 CMP.W R0, #0x2000 0x34184374: D144 BNE 46L213 ; 0x34184400 0x34184376: 9804 LDR R0, [SP, #16] 0x34184378: 6E00 LDR R0, [R0, #96] 0x3418437A: B170 CBZ R0, .L208 ; 0x3418439A 0x3418437C: 9804 LDR R0, [SP, #16] 0x3418437E: 6E00 LDR R0, [R0, #96] 0x34184380: F1B0 5F80 CMP.W R0, #0x10000000 0x34184384: D009 BEQ 46L208 ; 0x3418439A 0x34184386: 9804 LDR R0, [SP, #16] 0x34184388: 6E00 LDR R0, [R0, #96] 0x3418438A: F1B0 5F00 CMP.W R0, #0x20000000 0x3418438E: D004 BEQ 46L208 ; 0x3418439A 0x34184390: 9804 LDR R0, [SP, #16] 0x34184392: 6E00 LDR R0, [R0, #96] 0x34184394: F1B0 5F40 CMP.W R0, #0x30000000 0x34184398: D100 BNE 46L209 ; 0x3418439C
.L208: 0x3418439A: E007 B 46L210 ; 0x341843AC
.L209: 0x3418439C: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341843A0: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341843A4: F240 21C2 MOVW R1, #0x02C2 0x341843A8: F009 FC76 BL assert_failed ; 0x3418DC98
.L210: 0x341843AC: 9804 LDR R0, [SP, #16] 0x341843AE: 6E40 LDR R0, [R0, #100] 0x341843B0: B128 CBZ R0, .L211 ; 0x341843BE 0x341843B2: 9804 LDR R0, [SP, #16] 0x341843B4: 6E40 LDR R0, [R0, #100] 0x341843B6: F5B0 7F80 CMP.W R0, #0x0100 0x341843BA: D800 BHI 46L211 ; 0x341843BE 0x341843BC: E007 B 46L212 ; 0x341843CE
.L211: 0x341843BE: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341843C2: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341843C6: F240 21C3 MOVW R1, #0x02C3 0x341843CA: F009 FC65 BL assert_failed ; 0x3418DC98
.L212: 0x341843CE: F248 01F0 MOVW R1, #0x80F0 0x341843D2: F2C5 6102 MOVT R1, #0x5602 0x341843D6: 6808 LDR R0, [R1] 0x341843D8: F64F 72FF MOVW R2, #0xFFFF 0x341843DC: F6CC 7200 MOVT R2, #0xCF00 0x341843E0: 4010 ANDS R0, R2 0x341843E2: 9B04 LDR R3, [SP, #16] 0x341843E4: 6E1A LDR R2, [R3, #96] 0x341843E6: F8D3 C064 LDR.W R12, [R3, #100] 0x341843EA: 2300 MOVS R3, #0 0x341843EC: F6CF 73FF MOVT R3, #0xFFFF 0x341843F0: EB03 430C ADD.W R3, R3, R12, LSL #16 0x341843F4: 431A ORRS R2, R3 0x341843F6: 4310 ORRS R0, R2 0x341843F8: 6008 STR R0, [R1] 0x341843FA: F004 FA2D BL LL_RCC_IC12_Enable ; 0x34188858 0x341843FE: E008 B 46L214 ; 0x34184412
.L213: 0x34184400: 9804 LDR R0, [SP, #16] 0x34184402: F8D0 00CC LDR.W R0, [R0, #204] 0x34184406: F5B0 5F80 CMP.W R0, #0x1000 0x3418440A: D102 BNE 46L214 ; 0x34184412 0x3418440C: F00B FF26 BL LL_RCC_CLKP_Enable ; 0x3419025C 0x34184410: E7FF B 46L214 ; 0x34184412
.L214: 0x34184412: 9804 LDR R0, [SP, #16] 0x34184414: F8D0 00CC LDR.W R0, [R0, #204] 0x34184418: F004 FA26 BL LL_RCC_SetETHClockSource ; 0x34188868
.L215: 0x3418441C: 9804 LDR R0, [SP, #16] 0x3418441E: 7800 LDRB R0, [R0] 0x34184420: 0640 LSLS R0, R0, #25 0x34184422: 2800 CMP R0, #0 0x34184424: D51D BPL 46L219 ; 0x34184462 0x34184426: 9804 LDR R0, [SP, #16] 0x34184428: F8D0 00D0 LDR.W R0, [R0, #208] 0x3418442C: B158 CBZ R0, .L216 ; 0x34184446 0x3418442E: 9804 LDR R0, [SP, #16] 0x34184430: F8D0 00D0 LDR.W R0, [R0, #208] 0x34184434: F5B0 3F80 CMP.W R0, #0x010000 0x34184438: D005 BEQ 46L216 ; 0x34184446 0x3418443A: 9804 LDR R0, [SP, #16] 0x3418443C: F8D0 00D0 LDR.W R0, [R0, #208] 0x34184440: F5B0 2F80 CMP.W R0, #0x040000 0x34184444: D100 BNE 46L217 ; 0x34184448
.L216: 0x34184446: E007 B 46L218 ; 0x34184458
.L217: 0x34184448: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x3418444C: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34184450: F240 21DD MOVW R1, #0x02DD 0x34184454: F009 FC20 BL assert_failed ; 0x3418DC98
.L218: 0x34184458: 9804 LDR R0, [SP, #16] 0x3418445A: F8D0 00D0 LDR.W R0, [R0, #208] 0x3418445E: F004 FA11 BL LL_RCC_SetETHPHYInterface ; 0x34188884
.L219: 0x34184462: 9804 LDR R0, [SP, #16] 0x34184464: 7800 LDRB R0, [R0] 0x34184466: 0600 LSLS R0, R0, #24 0x34184468: 2800 CMP R0, #0 0x3418446A: D517 BPL 46L223 ; 0x3418449C 0x3418446C: 9804 LDR R0, [SP, #16] 0x3418446E: F8D0 00D4 LDR.W R0, [R0, #212] 0x34184472: B128 CBZ R0, .L220 ; 0x34184480 0x34184474: 9804 LDR R0, [SP, #16] 0x34184476: F8D0 00D4 LDR.W R0, [R0, #212] 0x3418447A: F5B0 1F80 CMP.W R0, #0x100000 0x3418447E: D100 BNE 46L221 ; 0x34184482
.L220: 0x34184480: E007 B 46L222 ; 0x34184492
.L221: 0x34184482: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34184486: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x3418448A: F240 21E7 MOVW R1, #0x02E7 0x3418448E: F009 FC03 BL assert_failed ; 0x3418DC98
.L222: 0x34184492: 9804 LDR R0, [SP, #16] 0x34184494: F8D0 00D4 LDR.W R0, [R0, #212] 0x34184498: F004 FA02 BL LL_RCC_SetETHREFRXClockSource ; 0x341888A0
.L223: 0x3418449C: 9804 LDR R0, [SP, #16] 0x3418449E: 7840 LDRB R0, [R0, #1] 0x341844A0: 07C0 LSLS R0, R0, #31 0x341844A2: B1B8 CBZ R0, .L227 ; 0x341844D4 0x341844A4: 9804 LDR R0, [SP, #16] 0x341844A6: F8D0 00D8 LDR.W R0, [R0, #216] 0x341844AA: B128 CBZ R0, .L224 ; 0x341844B8 0x341844AC: 9804 LDR R0, [SP, #16] 0x341844AE: F8D0 00D8 LDR.W R0, [R0, #216] 0x341844B2: F1B0 7F80 CMP.W R0, #0x01000000 0x341844B6: D100 BNE 46L225 ; 0x341844BA
.L224: 0x341844B8: E007 B 46L226 ; 0x341844CA
.L225: 0x341844BA: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341844BE: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341844C2: F240 21F1 MOVW R1, #0x02F1 0x341844C6: F009 FBE7 BL assert_failed ; 0x3418DC98
.L226: 0x341844CA: 9804 LDR R0, [SP, #16] 0x341844CC: F8D0 00D8 LDR.W R0, [R0, #216] 0x341844D0: F004 F9F4 BL LL_RCC_SetETHREFTXClockSource ; 0x341888BC
.L227: 0x341844D4: 9804 LDR R0, [SP, #16] 0x341844D6: 7840 LDRB R0, [R0, #1] 0x341844D8: 0780 LSLS R0, R0, #30 0x341844DA: 2800 CMP R0, #0 0x341844DC: F140 8093 BPL.W 46L240 ; 0x34184606 0x341844E0: 9804 LDR R0, [SP, #16] 0x341844E2: F8D0 00DC LDR.W R0, [R0, #220] 0x341844E6: B170 CBZ R0, .L228 ; 0x34184506 0x341844E8: 9804 LDR R0, [SP, #16] 0x341844EA: F8D0 00DC LDR.W R0, [R0, #220] 0x341844EE: 2801 CMP R0, #1 0x341844F0: D009 BEQ 46L228 ; 0x34184506 0x341844F2: 9804 LDR R0, [SP, #16] 0x341844F4: F8D0 00DC LDR.W R0, [R0, #220] 0x341844F8: 2802 CMP R0, #2 0x341844FA: D004 BEQ 46L228 ; 0x34184506 0x341844FC: 9804 LDR R0, [SP, #16] 0x341844FE: F8D0 00DC LDR.W R0, [R0, #220] 0x34184502: 2803 CMP R0, #3 0x34184504: D100 BNE 46L229 ; 0x34184508
.L228: 0x34184506: E007 B 46L230 ; 0x34184518
.L229: 0x34184508: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x3418450C: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34184510: F240 21FB MOVW R1, #0x02FB 0x34184514: F009 FBC0 BL assert_failed ; 0x3418DC98
.L230: 0x34184518: 9804 LDR R0, [SP, #16] 0x3418451A: F8D0 00E0 LDR.W R0, [R0, #224] 0x3418451E: B128 CBZ R0, .L231 ; 0x3418452C 0x34184520: 9804 LDR R0, [SP, #16] 0x34184522: F8D0 00E0 LDR.W R0, [R0, #224] 0x34184526: 2810 CMP R0, #16 0x34184528: D800 BHI 46L231 ; 0x3418452C 0x3418452A: E007 B 46L232 ; 0x3418453C
.L231: 0x3418452C: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34184530: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34184534: F44F 713F MOV.W R1, #0x02FC 0x34184538: F009 FBAE BL assert_failed ; 0x3418DC98
.L232: 0x3418453C: 9804 LDR R0, [SP, #16] 0x3418453E: F8D0 00DC LDR.W R0, [R0, #220] 0x34184542: 2802 CMP R0, #2 0x34184544: D144 BNE 46L238 ; 0x341845D0 0x34184546: 9804 LDR R0, [SP, #16] 0x34184548: 6E80 LDR R0, [R0, #104] 0x3418454A: B170 CBZ R0, .L233 ; 0x3418456A 0x3418454C: 9804 LDR R0, [SP, #16] 0x3418454E: 6E80 LDR R0, [R0, #104] 0x34184550: F1B0 5F80 CMP.W R0, #0x10000000 0x34184554: D009 BEQ 46L233 ; 0x3418456A 0x34184556: 9804 LDR R0, [SP, #16] 0x34184558: 6E80 LDR R0, [R0, #104] 0x3418455A: F1B0 5F00 CMP.W R0, #0x20000000 0x3418455E: D004 BEQ 46L233 ; 0x3418456A 0x34184560: 9804 LDR R0, [SP, #16] 0x34184562: 6E80 LDR R0, [R0, #104] 0x34184564: F1B0 5F40 CMP.W R0, #0x30000000 0x34184568: D100 BNE 46L234 ; 0x3418456C
.L233: 0x3418456A: E007 B 46L235 ; 0x3418457C
.L234: 0x3418456C: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34184570: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34184574: F240 3101 MOVW R1, #0x0301 0x34184578: F009 FB8E BL assert_failed ; 0x3418DC98
.L235: 0x3418457C: 9804 LDR R0, [SP, #16] 0x3418457E: 6EC0 LDR R0, [R0, #108] 0x34184580: B128 CBZ R0, .L236 ; 0x3418458E 0x34184582: 9804 LDR R0, [SP, #16] 0x34184584: 6EC0 LDR R0, [R0, #108] 0x34184586: F5B0 7F80 CMP.W R0, #0x0100 0x3418458A: D800 BHI 46L236 ; 0x3418458E 0x3418458C: E007 B 46L237 ; 0x3418459E
.L236: 0x3418458E: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34184592: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34184596: F240 3102 MOVW R1, #0x0302 0x3418459A: F009 FB7D BL assert_failed ; 0x3418DC98
.L237: 0x3418459E: F248 01F4 MOVW R1, #0x80F4 0x341845A2: F2C5 6102 MOVT R1, #0x5602 0x341845A6: 6808 LDR R0, [R1] 0x341845A8: F64F 72FF MOVW R2, #0xFFFF 0x341845AC: F6CC 7200 MOVT R2, #0xCF00 0x341845B0: 4010 ANDS R0, R2 0x341845B2: 9B04 LDR R3, [SP, #16] 0x341845B4: 6E9A LDR R2, [R3, #104] 0x341845B6: F8D3 C06C LDR.W R12, [R3, #108] 0x341845BA: 2300 MOVS R3, #0 0x341845BC: F6CF 73FF MOVT R3, #0xFFFF 0x341845C0: EB03 430C ADD.W R3, R3, R12, LSL #16 0x341845C4: 431A ORRS R2, R3 0x341845C6: 4310 ORRS R0, R2 0x341845C8: 6008 STR R0, [R1] 0x341845CA: F004 F985 BL LL_RCC_IC13_Enable ; 0x341888D8 0x341845CE: E007 B 46L239 ; 0x341845E0
.L238: 0x341845D0: 9804 LDR R0, [SP, #16] 0x341845D2: F8D0 00DC LDR.W R0, [R0, #220] 0x341845D6: 2801 CMP R0, #1 0x341845D8: D102 BNE 46L239 ; 0x341845E0 0x341845DA: F00B FE3F BL LL_RCC_CLKP_Enable ; 0x3419025C 0x341845DE: E7FF B 46L239 ; 0x341845E0
.L239: 0x341845E0: F248 1148 MOVW R1, #0x8148 0x341845E4: F2C5 6102 MOVT R1, #0x5602 0x341845E8: 6808 LDR R0, [R1] 0x341845EA: F020 00F3 BIC R0, R0, #243 0x341845EE: 9A04 LDR R2, [SP, #16] 0x341845F0: F8D2 30DC LDR.W R3, [R2, #220] 0x341845F4: F8D2 C0E0 LDR.W R12, [R2, #224] 0x341845F8: F06F 020F MVN R2, #15 0x341845FC: EB02 120C ADD.W R2, R2, R12, LSL #4 0x34184600: 431A ORRS R2, R3 0x34184602: 4310 ORRS R0, R2 0x34184604: 6008 STR R0, [R1]
.L240: 0x34184606: 9804 LDR R0, [SP, #16] 0x34184608: 7840 LDRB R0, [R0, #1] 0x3418460A: 0740 LSLS R0, R0, #29 0x3418460C: 2800 CMP R0, #0 0x3418460E: D579 BPL 46L251 ; 0x34184704 0x34184610: 9804 LDR R0, [SP, #16] 0x34184612: F8D0 00E4 LDR.W R0, [R0, #228] 0x34184616: B170 CBZ R0, .L241 ; 0x34184636 0x34184618: 9804 LDR R0, [SP, #16] 0x3418461A: F8D0 00E4 LDR.W R0, [R0, #228] 0x3418461E: 2801 CMP R0, #1 0x34184620: D009 BEQ 46L241 ; 0x34184636 0x34184622: 9804 LDR R0, [SP, #16] 0x34184624: F8D0 00E4 LDR.W R0, [R0, #228] 0x34184628: 2802 CMP R0, #2 0x3418462A: D004 BEQ 46L241 ; 0x34184636 0x3418462C: 9804 LDR R0, [SP, #16] 0x3418462E: F8D0 00E4 LDR.W R0, [R0, #228] 0x34184632: 2803 CMP R0, #3 0x34184634: D100 BNE 46L242 ; 0x34184638
.L241: 0x34184636: E007 B 46L243 ; 0x34184648
.L242: 0x34184638: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x3418463C: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34184640: F240 311E MOVW R1, #0x031E 0x34184644: F009 FB28 BL assert_failed ; 0x3418DC98
.L243: 0x34184648: 9804 LDR R0, [SP, #16] 0x3418464A: F8D0 00E4 LDR.W R0, [R0, #228] 0x3418464E: 2802 CMP R0, #2 0x34184650: D14B BNE 46L249 ; 0x341846EA 0x34184652: 9804 LDR R0, [SP, #16] 0x34184654: F8D0 0098 LDR.W R0, [R0, #152] 0x34184658: B188 CBZ R0, .L244 ; 0x3418467E 0x3418465A: 9804 LDR R0, [SP, #16] 0x3418465C: F8D0 0098 LDR.W R0, [R0, #152] 0x34184660: F1B0 5F80 CMP.W R0, #0x10000000 0x34184664: D00B BEQ 46L244 ; 0x3418467E 0x34184666: 9804 LDR R0, [SP, #16] 0x34184668: F8D0 0098 LDR.W R0, [R0, #152] 0x3418466C: F1B0 5F00 CMP.W R0, #0x20000000 0x34184670: D005 BEQ 46L244 ; 0x3418467E 0x34184672: 9804 LDR R0, [SP, #16] 0x34184674: F8D0 0098 LDR.W R0, [R0, #152] 0x34184678: F1B0 5F40 CMP.W R0, #0x30000000 0x3418467C: D100 BNE 46L245 ; 0x34184680
.L244: 0x3418467E: E007 B 46L246 ; 0x34184690
.L245: 0x34184680: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34184684: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34184688: F240 3123 MOVW R1, #0x0323 0x3418468C: F009 FB04 BL assert_failed ; 0x3418DC98
.L246: 0x34184690: 9804 LDR R0, [SP, #16] 0x34184692: F8D0 009C LDR.W R0, [R0, #156] 0x34184696: B130 CBZ R0, .L247 ; 0x341846A6 0x34184698: 9804 LDR R0, [SP, #16] 0x3418469A: F8D0 009C LDR.W R0, [R0, #156] 0x3418469E: F5B0 7F80 CMP.W R0, #0x0100 0x341846A2: D800 BHI 46L247 ; 0x341846A6 0x341846A4: E007 B 46L248 ; 0x341846B6
.L247: 0x341846A6: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341846AA: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341846AE: F44F 7149 MOV.W R1, #0x0324 0x341846B2: F009 FAF1 BL assert_failed ; 0x3418DC98
.L248: 0x341846B6: F248 110C MOVW R1, #0x810C 0x341846BA: F2C5 6102 MOVT R1, #0x5602 0x341846BE: 6808 LDR R0, [R1] 0x341846C0: F64F 72FF MOVW R2, #0xFFFF 0x341846C4: F6CC 7200 MOVT R2, #0xCF00 0x341846C8: 4010 ANDS R0, R2 0x341846CA: 9B04 LDR R3, [SP, #16] 0x341846CC: F8D3 2098 LDR.W R2, [R3, #152] 0x341846D0: F8D3 C09C LDR.W R12, [R3, #156] 0x341846D4: 2300 MOVS R3, #0 0x341846D6: F6CF 73FF MOVT R3, #0xFFFF 0x341846DA: EB03 430C ADD.W R3, R3, R12, LSL #16 0x341846DE: 431A ORRS R2, R3 0x341846E0: 4310 ORRS R0, R2 0x341846E2: 6008 STR R0, [R1] 0x341846E4: F004 F850 BL LL_RCC_IC19_Enable ; 0x34188788 0x341846E8: E007 B 46L250 ; 0x341846FA
.L249: 0x341846EA: 9804 LDR R0, [SP, #16] 0x341846EC: F8D0 00E4 LDR.W R0, [R0, #228] 0x341846F0: 2801 CMP R0, #1 0x341846F2: D102 BNE 46L250 ; 0x341846FA 0x341846F4: F00B FDB2 BL LL_RCC_CLKP_Enable ; 0x3419025C 0x341846F8: E7FF B 46L250 ; 0x341846FA
.L250: 0x341846FA: 9804 LDR R0, [SP, #16] 0x341846FC: F8D0 00E4 LDR.W R0, [R0, #228] 0x34184700: F004 F8F2 BL LL_RCC_SetFDCANClockSource ; 0x341888E8
.L251: 0x34184704: 9804 LDR R0, [SP, #16] 0x34184706: 7840 LDRB R0, [R0, #1] 0x34184708: 06C0 LSLS R0, R0, #27 0x3418470A: 2800 CMP R0, #0 0x3418470C: F140 80E3 BPL.W 46L268 ; 0x341848D6 0x34184710: 9804 LDR R0, [SP, #16] 0x34184712: F8D0 00E8 LDR.W R0, [R0, #232] 0x34184716: 210C MOVS R1, #12 0x34184718: F2C0 7100 MOVT R1, #0x0700 0x3418471C: 4288 CMP R0, R1 0x3418471E: D027 BEQ 46L252 ; 0x34184770 0x34184720: 9804 LDR R0, [SP, #16] 0x34184722: F8D0 00E8 LDR.W R0, [R0, #232] 0x34184726: 210C MOVS R1, #12 0x34184728: F2C0 7101 MOVT R1, #0x0701 0x3418472C: 4288 CMP R0, R1 0x3418472E: D01F BEQ 46L252 ; 0x34184770 0x34184730: 9804 LDR R0, [SP, #16] 0x34184732: F8D0 00E8 LDR.W R0, [R0, #232] 0x34184736: 210C MOVS R1, #12 0x34184738: F2C0 7102 MOVT R1, #0x0702 0x3418473C: 4288 CMP R0, R1 0x3418473E: D017 BEQ 46L252 ; 0x34184770 0x34184740: 9804 LDR R0, [SP, #16] 0x34184742: F8D0 00E8 LDR.W R0, [R0, #232] 0x34184746: 210C MOVS R1, #12 0x34184748: F2C0 7103 MOVT R1, #0x0703 0x3418474C: 4288 CMP R0, R1 0x3418474E: D00F BEQ 46L252 ; 0x34184770 0x34184750: 9804 LDR R0, [SP, #16] 0x34184752: F8D0 00E8 LDR.W R0, [R0, #232] 0x34184756: 210C MOVS R1, #12 0x34184758: F2C0 7104 MOVT R1, #0x0704 0x3418475C: 4288 CMP R0, R1 0x3418475E: D007 BEQ 46L252 ; 0x34184770 0x34184760: 9804 LDR R0, [SP, #16] 0x34184762: F8D0 00E8 LDR.W R0, [R0, #232] 0x34184766: 210C MOVS R1, #12 0x34184768: F2C0 7105 MOVT R1, #0x0705 0x3418476C: 4288 CMP R0, R1 0x3418476E: D100 BNE 46L253 ; 0x34184772
.L252: 0x34184770: E007 B 46L254 ; 0x34184782
.L253: 0x34184772: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34184776: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x3418477A: F240 313E MOVW R1, #0x033E 0x3418477E: F009 FA8B BL assert_failed ; 0x3418DC98
.L254: 0x34184782: 9804 LDR R0, [SP, #16] 0x34184784: F8D0 00E8 LDR.W R0, [R0, #232] 0x34184788: 210C MOVS R1, #12 0x3418478A: F2C0 7102 MOVT R1, #0x0702 0x3418478E: 4288 CMP R0, R1 0x34184790: D144 BNE 46L260 ; 0x3418481C 0x34184792: 9804 LDR R0, [SP, #16] 0x34184794: 6D00 LDR R0, [R0, #80] 0x34184796: B170 CBZ R0, .L255 ; 0x341847B6 0x34184798: 9804 LDR R0, [SP, #16] 0x3418479A: 6D00 LDR R0, [R0, #80] 0x3418479C: F1B0 5F80 CMP.W R0, #0x10000000 0x341847A0: D009 BEQ 46L255 ; 0x341847B6 0x341847A2: 9804 LDR R0, [SP, #16] 0x341847A4: 6D00 LDR R0, [R0, #80] 0x341847A6: F1B0 5F00 CMP.W R0, #0x20000000 0x341847AA: D004 BEQ 46L255 ; 0x341847B6 0x341847AC: 9804 LDR R0, [SP, #16] 0x341847AE: 6D00 LDR R0, [R0, #80] 0x341847B0: F1B0 5F40 CMP.W R0, #0x30000000 0x341847B4: D100 BNE 46L256 ; 0x341847B8
.L255: 0x341847B6: E007 B 46L257 ; 0x341847C8
.L256: 0x341847B8: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341847BC: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341847C0: F240 3143 MOVW R1, #0x0343 0x341847C4: F009 FA68 BL assert_failed ; 0x3418DC98
.L257: 0x341847C8: 9804 LDR R0, [SP, #16] 0x341847CA: 6D40 LDR R0, [R0, #84] 0x341847CC: B128 CBZ R0, .L258 ; 0x341847DA 0x341847CE: 9804 LDR R0, [SP, #16] 0x341847D0: 6D40 LDR R0, [R0, #84] 0x341847D2: F5B0 7F80 CMP.W R0, #0x0100 0x341847D6: D800 BHI 46L258 ; 0x341847DA 0x341847D8: E007 B 46L259 ; 0x341847EA
.L258: 0x341847DA: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341847DE: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341847E2: F44F 7151 MOV.W R1, #0x0344 0x341847E6: F009 FA57 BL assert_failed ; 0x3418DC98
.L259: 0x341847EA: F248 01E8 MOVW R1, #0x80E8 0x341847EE: F2C5 6102 MOVT R1, #0x5602 0x341847F2: 6808 LDR R0, [R1] 0x341847F4: F64F 72FF MOVW R2, #0xFFFF 0x341847F8: F6CC 7200 MOVT R2, #0xCF00 0x341847FC: 4010 ANDS R0, R2 0x341847FE: 9B04 LDR R3, [SP, #16] 0x34184800: 6D1A LDR R2, [R3, #80] 0x34184802: F8D3 C054 LDR.W R12, [R3, #84] 0x34184806: 2300 MOVS R3, #0 0x34184808: F6CF 73FF MOVT R3, #0xFFFF 0x3418480C: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34184810: 431A ORRS R2, R3 0x34184812: 4310 ORRS R0, R2 0x34184814: 6008 STR R0, [R1] 0x34184816: F003 FFA7 BL LL_RCC_IC10_Enable.61 ; 0x34188768 0x3418481A: E057 B 46L267 ; 0x341848CC
.L260: 0x3418481C: 9804 LDR R0, [SP, #16] 0x3418481E: F8D0 00E8 LDR.W R0, [R0, #232] 0x34184822: 210C MOVS R1, #12 0x34184824: F2C0 7103 MOVT R1, #0x0703 0x34184828: 4288 CMP R0, R1 0x3418482A: D144 BNE 46L266 ; 0x341848B6 0x3418482C: 9804 LDR R0, [SP, #16] 0x3418482E: 6F80 LDR R0, [R0, #120] 0x34184830: B170 CBZ R0, .L261 ; 0x34184850 0x34184832: 9804 LDR R0, [SP, #16] 0x34184834: 6F80 LDR R0, [R0, #120] 0x34184836: F1B0 5F80 CMP.W R0, #0x10000000 0x3418483A: D009 BEQ 46L261 ; 0x34184850 0x3418483C: 9804 LDR R0, [SP, #16] 0x3418483E: 6F80 LDR R0, [R0, #120] 0x34184840: F1B0 5F00 CMP.W R0, #0x20000000 0x34184844: D004 BEQ 46L261 ; 0x34184850 0x34184846: 9804 LDR R0, [SP, #16] 0x34184848: 6F80 LDR R0, [R0, #120] 0x3418484A: F1B0 5F40 CMP.W R0, #0x30000000 0x3418484E: D100 BNE 46L262 ; 0x34184852
.L261: 0x34184850: E007 B 46L263 ; 0x34184862
.L262: 0x34184852: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34184856: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x3418485A: F44F 7154 MOV.W R1, #0x0350 0x3418485E: F009 FA1B BL assert_failed ; 0x3418DC98
.L263: 0x34184862: 9804 LDR R0, [SP, #16] 0x34184864: 6FC0 LDR R0, [R0, #124] 0x34184866: B128 CBZ R0, .L264 ; 0x34184874 0x34184868: 9804 LDR R0, [SP, #16] 0x3418486A: 6FC0 LDR R0, [R0, #124] 0x3418486C: F5B0 7F80 CMP.W R0, #0x0100 0x34184870: D800 BHI 46L264 ; 0x34184874 0x34184872: E007 B 46L265 ; 0x34184884
.L264: 0x34184874: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34184878: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x3418487C: F240 3151 MOVW R1, #0x0351 0x34184880: F009 FA0A BL assert_failed ; 0x3418DC98
.L265: 0x34184884: F248 01FC MOVW R1, #0x80FC 0x34184888: F2C5 6102 MOVT R1, #0x5602 0x3418488C: 6808 LDR R0, [R1] 0x3418488E: F64F 72FF MOVW R2, #0xFFFF 0x34184892: F6CC 7200 MOVT R2, #0xCF00 0x34184896: 4010 ANDS R0, R2 0x34184898: 9B04 LDR R3, [SP, #16] 0x3418489A: 6F9A LDR R2, [R3, #120] 0x3418489C: F8D3 C07C LDR.W R12, [R3, #124] 0x341848A0: 2300 MOVS R3, #0 0x341848A2: F6CF 73FF MOVT R3, #0xFFFF 0x341848A6: EB03 430C ADD.W R3, R3, R12, LSL #16 0x341848AA: 431A ORRS R2, R3 0x341848AC: 4310 ORRS R0, R2 0x341848AE: 6008 STR R0, [R1] 0x341848B0: F003 FF62 BL LL_RCC_IC15_Enable.62 ; 0x34188778 0x341848B4: E00A B 46L267 ; 0x341848CC
.L266: 0x341848B6: 9804 LDR R0, [SP, #16] 0x341848B8: F8D0 00E8 LDR.W R0, [R0, #232] 0x341848BC: 210C MOVS R1, #12 0x341848BE: F2C0 7101 MOVT R1, #0x0701 0x341848C2: 4288 CMP R0, R1 0x341848C4: D102 BNE 46L267 ; 0x341848CC 0x341848C6: F00B FCC9 BL LL_RCC_CLKP_Enable ; 0x3419025C 0x341848CA: E7FF B 46L267 ; 0x341848CC
.L267: 0x341848CC: 9804 LDR R0, [SP, #16] 0x341848CE: F8D0 00E8 LDR.W R0, [R0, #232] 0x341848D2: F004 F817 BL LL_RCC_SetI2CClockSource ; 0x34188904
.L268: 0x341848D6: 9804 LDR R0, [SP, #16] 0x341848D8: 7840 LDRB R0, [R0, #1] 0x341848DA: 0680 LSLS R0, R0, #26 0x341848DC: 2800 CMP R0, #0 0x341848DE: F140 80EC BPL.W 46L285 ; 0x34184ABA 0x341848E2: 9804 LDR R0, [SP, #16] 0x341848E4: F8D0 00EC LDR.W R0, [R0, #236] 0x341848E8: F240 410C MOVW R1, #0x040C 0x341848EC: F2C0 7100 MOVT R1, #0x0700 0x341848F0: 4288 CMP R0, R1 0x341848F2: D02C BEQ 46L269 ; 0x3418494E 0x341848F4: 9804 LDR R0, [SP, #16] 0x341848F6: F8D0 00EC LDR.W R0, [R0, #236] 0x341848FA: F240 410C MOVW R1, #0x040C 0x341848FE: F2C0 7101 MOVT R1, #0x0701 0x34184902: 4288 CMP R0, R1 0x34184904: D023 BEQ 46L269 ; 0x3418494E 0x34184906: 9804 LDR R0, [SP, #16] 0x34184908: F8D0 00EC LDR.W R0, [R0, #236] 0x3418490C: F240 410C MOVW R1, #0x040C 0x34184910: F2C0 7102 MOVT R1, #0x0702 0x34184914: 4288 CMP R0, R1 0x34184916: D01A BEQ 46L269 ; 0x3418494E 0x34184918: 9804 LDR R0, [SP, #16] 0x3418491A: F8D0 00EC LDR.W R0, [R0, #236] 0x3418491E: F240 410C MOVW R1, #0x040C 0x34184922: F2C0 7103 MOVT R1, #0x0703 0x34184926: 4288 CMP R0, R1 0x34184928: D011 BEQ 46L269 ; 0x3418494E 0x3418492A: 9804 LDR R0, [SP, #16] 0x3418492C: F8D0 00EC LDR.W R0, [R0, #236] 0x34184930: F240 410C MOVW R1, #0x040C 0x34184934: F2C0 7104 MOVT R1, #0x0704 0x34184938: 4288 CMP R0, R1 0x3418493A: D008 BEQ 46L269 ; 0x3418494E 0x3418493C: 9804 LDR R0, [SP, #16] 0x3418493E: F8D0 00EC LDR.W R0, [R0, #236] 0x34184942: F240 410C MOVW R1, #0x040C 0x34184946: F2C0 7105 MOVT R1, #0x0705 0x3418494A: 4288 CMP R0, R1 0x3418494C: D100 BNE 46L270 ; 0x34184950
.L269: 0x3418494E: E007 B 46L271 ; 0x34184960
.L270: 0x34184950: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34184954: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34184958: F240 316B MOVW R1, #0x036B 0x3418495C: F009 F99C BL assert_failed ; 0x3418DC98
.L271: 0x34184960: 9804 LDR R0, [SP, #16] 0x34184962: F8D0 00EC LDR.W R0, [R0, #236] 0x34184966: F240 410C MOVW R1, #0x040C 0x3418496A: F2C0 7102 MOVT R1, #0x0702 0x3418496E: 4288 CMP R0, R1 0x34184970: D144 BNE 46L277 ; 0x341849FC 0x34184972: 9804 LDR R0, [SP, #16] 0x34184974: 6D00 LDR R0, [R0, #80] 0x34184976: B170 CBZ R0, .L272 ; 0x34184996 0x34184978: 9804 LDR R0, [SP, #16] 0x3418497A: 6D00 LDR R0, [R0, #80] 0x3418497C: F1B0 5F80 CMP.W R0, #0x10000000 0x34184980: D009 BEQ 46L272 ; 0x34184996 0x34184982: 9804 LDR R0, [SP, #16] 0x34184984: 6D00 LDR R0, [R0, #80] 0x34184986: F1B0 5F00 CMP.W R0, #0x20000000 0x3418498A: D004 BEQ 46L272 ; 0x34184996 0x3418498C: 9804 LDR R0, [SP, #16] 0x3418498E: 6D00 LDR R0, [R0, #80] 0x34184990: F1B0 5F40 CMP.W R0, #0x30000000 0x34184994: D100 BNE 46L273 ; 0x34184998
.L272: 0x34184996: E007 B 46L274 ; 0x341849A8
.L273: 0x34184998: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x3418499C: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341849A0: F44F 715C MOV.W R1, #0x0370 0x341849A4: F009 F978 BL assert_failed ; 0x3418DC98
.L274: 0x341849A8: 9804 LDR R0, [SP, #16] 0x341849AA: 6D40 LDR R0, [R0, #84] 0x341849AC: B128 CBZ R0, .L275 ; 0x341849BA 0x341849AE: 9804 LDR R0, [SP, #16] 0x341849B0: 6D40 LDR R0, [R0, #84] 0x341849B2: F5B0 7F80 CMP.W R0, #0x0100 0x341849B6: D800 BHI 46L275 ; 0x341849BA 0x341849B8: E007 B 46L276 ; 0x341849CA
.L275: 0x341849BA: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341849BE: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341849C2: F240 3171 MOVW R1, #0x0371 0x341849C6: F009 F967 BL assert_failed ; 0x3418DC98
.L276: 0x341849CA: F248 01E8 MOVW R1, #0x80E8 0x341849CE: F2C5 6102 MOVT R1, #0x5602 0x341849D2: 6808 LDR R0, [R1] 0x341849D4: F64F 72FF MOVW R2, #0xFFFF 0x341849D8: F6CC 7200 MOVT R2, #0xCF00 0x341849DC: 4010 ANDS R0, R2 0x341849DE: 9B04 LDR R3, [SP, #16] 0x341849E0: 6D1A LDR R2, [R3, #80] 0x341849E2: F8D3 C054 LDR.W R12, [R3, #84] 0x341849E6: 2300 MOVS R3, #0 0x341849E8: F6CF 73FF MOVT R3, #0xFFFF 0x341849EC: EB03 430C ADD.W R3, R3, R12, LSL #16 0x341849F0: 431A ORRS R2, R3 0x341849F2: 4310 ORRS R0, R2 0x341849F4: 6008 STR R0, [R1] 0x341849F6: F003 FEB7 BL LL_RCC_IC10_Enable.61 ; 0x34188768 0x341849FA: E059 B 46L284 ; 0x34184AB0
.L277: 0x341849FC: 9804 LDR R0, [SP, #16] 0x341849FE: F8D0 00EC LDR.W R0, [R0, #236] 0x34184A02: F240 410C MOVW R1, #0x040C 0x34184A06: F2C0 7103 MOVT R1, #0x0703 0x34184A0A: 4288 CMP R0, R1 0x34184A0C: D144 BNE 46L283 ; 0x34184A98 0x34184A0E: 9804 LDR R0, [SP, #16] 0x34184A10: 6F80 LDR R0, [R0, #120] 0x34184A12: B170 CBZ R0, .L278 ; 0x34184A32 0x34184A14: 9804 LDR R0, [SP, #16] 0x34184A16: 6F80 LDR R0, [R0, #120] 0x34184A18: F1B0 5F80 CMP.W R0, #0x10000000 0x34184A1C: D009 BEQ 46L278 ; 0x34184A32 0x34184A1E: 9804 LDR R0, [SP, #16] 0x34184A20: 6F80 LDR R0, [R0, #120] 0x34184A22: F1B0 5F00 CMP.W R0, #0x20000000 0x34184A26: D004 BEQ 46L278 ; 0x34184A32 0x34184A28: 9804 LDR R0, [SP, #16] 0x34184A2A: 6F80 LDR R0, [R0, #120] 0x34184A2C: F1B0 5F40 CMP.W R0, #0x30000000 0x34184A30: D100 BNE 46L279 ; 0x34184A34
.L278: 0x34184A32: E007 B 46L280 ; 0x34184A44
.L279: 0x34184A34: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34184A38: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34184A3C: F240 317D MOVW R1, #0x037D 0x34184A40: F009 F92A BL assert_failed ; 0x3418DC98
.L280: 0x34184A44: 9804 LDR R0, [SP, #16] 0x34184A46: 6FC0 LDR R0, [R0, #124] 0x34184A48: B128 CBZ R0, .L281 ; 0x34184A56 0x34184A4A: 9804 LDR R0, [SP, #16] 0x34184A4C: 6FC0 LDR R0, [R0, #124] 0x34184A4E: F5B0 7F80 CMP.W R0, #0x0100 0x34184A52: D800 BHI 46L281 ; 0x34184A56 0x34184A54: E007 B 46L282 ; 0x34184A66
.L281: 0x34184A56: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34184A5A: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34184A5E: F240 317E MOVW R1, #0x037E 0x34184A62: F009 F919 BL assert_failed ; 0x3418DC98
.L282: 0x34184A66: F248 01FC MOVW R1, #0x80FC 0x34184A6A: F2C5 6102 MOVT R1, #0x5602 0x34184A6E: 6808 LDR R0, [R1] 0x34184A70: F64F 72FF MOVW R2, #0xFFFF 0x34184A74: F6CC 7200 MOVT R2, #0xCF00 0x34184A78: 4010 ANDS R0, R2 0x34184A7A: 9B04 LDR R3, [SP, #16] 0x34184A7C: 6F9A LDR R2, [R3, #120] 0x34184A7E: F8D3 C07C LDR.W R12, [R3, #124] 0x34184A82: 2300 MOVS R3, #0 0x34184A84: F6CF 73FF MOVT R3, #0xFFFF 0x34184A88: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34184A8C: 431A ORRS R2, R3 0x34184A8E: 4310 ORRS R0, R2 0x34184A90: 6008 STR R0, [R1] 0x34184A92: F003 FE71 BL LL_RCC_IC15_Enable.62 ; 0x34188778 0x34184A96: E00B B 46L284 ; 0x34184AB0
.L283: 0x34184A98: 9804 LDR R0, [SP, #16] 0x34184A9A: F8D0 00EC LDR.W R0, [R0, #236] 0x34184A9E: F240 410C MOVW R1, #0x040C 0x34184AA2: F2C0 7101 MOVT R1, #0x0701 0x34184AA6: 4288 CMP R0, R1 0x34184AA8: D102 BNE 46L284 ; 0x34184AB0 0x34184AAA: F00B FBD7 BL LL_RCC_CLKP_Enable ; 0x3419025C 0x34184AAE: E7FF B 46L284 ; 0x34184AB0
.L284: 0x34184AB0: 9804 LDR R0, [SP, #16] 0x34184AB2: F8D0 00EC LDR.W R0, [R0, #236] 0x34184AB6: F003 FF25 BL LL_RCC_SetI2CClockSource ; 0x34188904
.L285: 0x34184ABA: 9804 LDR R0, [SP, #16] 0x34184ABC: 7840 LDRB R0, [R0, #1] 0x34184ABE: 0640 LSLS R0, R0, #25 0x34184AC0: 2800 CMP R0, #0 0x34184AC2: F140 80EC BPL.W 46L302 ; 0x34184C9E 0x34184AC6: 9804 LDR R0, [SP, #16] 0x34184AC8: F8D0 00F0 LDR.W R0, [R0, #240] 0x34184ACC: F640 010C MOVW R1, #0x080C 0x34184AD0: F2C0 7100 MOVT R1, #0x0700 0x34184AD4: 4288 CMP R0, R1 0x34184AD6: D02C BEQ 46L286 ; 0x34184B32 0x34184AD8: 9804 LDR R0, [SP, #16] 0x34184ADA: F8D0 00F0 LDR.W R0, [R0, #240] 0x34184ADE: F640 010C MOVW R1, #0x080C 0x34184AE2: F2C0 7101 MOVT R1, #0x0701 0x34184AE6: 4288 CMP R0, R1 0x34184AE8: D023 BEQ 46L286 ; 0x34184B32 0x34184AEA: 9804 LDR R0, [SP, #16] 0x34184AEC: F8D0 00F0 LDR.W R0, [R0, #240] 0x34184AF0: F640 010C MOVW R1, #0x080C 0x34184AF4: F2C0 7102 MOVT R1, #0x0702 0x34184AF8: 4288 CMP R0, R1 0x34184AFA: D01A BEQ 46L286 ; 0x34184B32 0x34184AFC: 9804 LDR R0, [SP, #16] 0x34184AFE: F8D0 00F0 LDR.W R0, [R0, #240] 0x34184B02: F640 010C MOVW R1, #0x080C 0x34184B06: F2C0 7103 MOVT R1, #0x0703 0x34184B0A: 4288 CMP R0, R1 0x34184B0C: D011 BEQ 46L286 ; 0x34184B32 0x34184B0E: 9804 LDR R0, [SP, #16] 0x34184B10: F8D0 00F0 LDR.W R0, [R0, #240] 0x34184B14: F640 010C MOVW R1, #0x080C 0x34184B18: F2C0 7104 MOVT R1, #0x0704 0x34184B1C: 4288 CMP R0, R1 0x34184B1E: D008 BEQ 46L286 ; 0x34184B32 0x34184B20: 9804 LDR R0, [SP, #16] 0x34184B22: F8D0 00F0 LDR.W R0, [R0, #240] 0x34184B26: F640 010C MOVW R1, #0x080C 0x34184B2A: F2C0 7105 MOVT R1, #0x0705 0x34184B2E: 4288 CMP R0, R1 0x34184B30: D100 BNE 46L287 ; 0x34184B34
.L286: 0x34184B32: E007 B 46L288 ; 0x34184B44
.L287: 0x34184B34: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34184B38: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34184B3C: F44F 7166 MOV.W R1, #0x0398 0x34184B40: F009 F8AA BL assert_failed ; 0x3418DC98
.L288: 0x34184B44: 9804 LDR R0, [SP, #16] 0x34184B46: F8D0 00F0 LDR.W R0, [R0, #240] 0x34184B4A: F640 010C MOVW R1, #0x080C 0x34184B4E: F2C0 7102 MOVT R1, #0x0702 0x34184B52: 4288 CMP R0, R1 0x34184B54: D144 BNE 46L294 ; 0x34184BE0 0x34184B56: 9804 LDR R0, [SP, #16] 0x34184B58: 6D00 LDR R0, [R0, #80] 0x34184B5A: B170 CBZ R0, .L289 ; 0x34184B7A 0x34184B5C: 9804 LDR R0, [SP, #16] 0x34184B5E: 6D00 LDR R0, [R0, #80] 0x34184B60: F1B0 5F80 CMP.W R0, #0x10000000 0x34184B64: D009 BEQ 46L289 ; 0x34184B7A 0x34184B66: 9804 LDR R0, [SP, #16] 0x34184B68: 6D00 LDR R0, [R0, #80] 0x34184B6A: F1B0 5F00 CMP.W R0, #0x20000000 0x34184B6E: D004 BEQ 46L289 ; 0x34184B7A 0x34184B70: 9804 LDR R0, [SP, #16] 0x34184B72: 6D00 LDR R0, [R0, #80] 0x34184B74: F1B0 5F40 CMP.W R0, #0x30000000 0x34184B78: D100 BNE 46L290 ; 0x34184B7C
.L289: 0x34184B7A: E007 B 46L291 ; 0x34184B8C
.L290: 0x34184B7C: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34184B80: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34184B84: F240 319D MOVW R1, #0x039D 0x34184B88: F009 F886 BL assert_failed ; 0x3418DC98
.L291: 0x34184B8C: 9804 LDR R0, [SP, #16] 0x34184B8E: 6D40 LDR R0, [R0, #84] 0x34184B90: B128 CBZ R0, .L292 ; 0x34184B9E 0x34184B92: 9804 LDR R0, [SP, #16] 0x34184B94: 6D40 LDR R0, [R0, #84] 0x34184B96: F5B0 7F80 CMP.W R0, #0x0100 0x34184B9A: D800 BHI 46L292 ; 0x34184B9E 0x34184B9C: E007 B 46L293 ; 0x34184BAE
.L292: 0x34184B9E: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34184BA2: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34184BA6: F240 319E MOVW R1, #0x039E 0x34184BAA: F009 F875 BL assert_failed ; 0x3418DC98
.L293: 0x34184BAE: F248 01E8 MOVW R1, #0x80E8 0x34184BB2: F2C5 6102 MOVT R1, #0x5602 0x34184BB6: 6808 LDR R0, [R1] 0x34184BB8: F64F 72FF MOVW R2, #0xFFFF 0x34184BBC: F6CC 7200 MOVT R2, #0xCF00 0x34184BC0: 4010 ANDS R0, R2 0x34184BC2: 9B04 LDR R3, [SP, #16] 0x34184BC4: 6D1A LDR R2, [R3, #80] 0x34184BC6: F8D3 C054 LDR.W R12, [R3, #84] 0x34184BCA: 2300 MOVS R3, #0 0x34184BCC: F6CF 73FF MOVT R3, #0xFFFF 0x34184BD0: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34184BD4: 431A ORRS R2, R3 0x34184BD6: 4310 ORRS R0, R2 0x34184BD8: 6008 STR R0, [R1] 0x34184BDA: F003 FDC5 BL LL_RCC_IC10_Enable.61 ; 0x34188768 0x34184BDE: E059 B 46L301 ; 0x34184C94
.L294: 0x34184BE0: 9804 LDR R0, [SP, #16] 0x34184BE2: F8D0 00F0 LDR.W R0, [R0, #240] 0x34184BE6: F640 010C MOVW R1, #0x080C 0x34184BEA: F2C0 7103 MOVT R1, #0x0703 0x34184BEE: 4288 CMP R0, R1 0x34184BF0: D144 BNE 46L300 ; 0x34184C7C 0x34184BF2: 9804 LDR R0, [SP, #16] 0x34184BF4: 6F80 LDR R0, [R0, #120] 0x34184BF6: B170 CBZ R0, .L295 ; 0x34184C16 0x34184BF8: 9804 LDR R0, [SP, #16] 0x34184BFA: 6F80 LDR R0, [R0, #120] 0x34184BFC: F1B0 5F80 CMP.W R0, #0x10000000 0x34184C00: D009 BEQ 46L295 ; 0x34184C16 0x34184C02: 9804 LDR R0, [SP, #16] 0x34184C04: 6F80 LDR R0, [R0, #120] 0x34184C06: F1B0 5F00 CMP.W R0, #0x20000000 0x34184C0A: D004 BEQ 46L295 ; 0x34184C16 0x34184C0C: 9804 LDR R0, [SP, #16] 0x34184C0E: 6F80 LDR R0, [R0, #120] 0x34184C10: F1B0 5F40 CMP.W R0, #0x30000000 0x34184C14: D100 BNE 46L296 ; 0x34184C18
.L295: 0x34184C16: E007 B 46L297 ; 0x34184C28
.L296: 0x34184C18: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34184C1C: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34184C20: F240 31AA MOVW R1, #0x03AA 0x34184C24: F009 F838 BL assert_failed ; 0x3418DC98
.L297: 0x34184C28: 9804 LDR R0, [SP, #16] 0x34184C2A: 6FC0 LDR R0, [R0, #124] 0x34184C2C: B128 CBZ R0, .L298 ; 0x34184C3A 0x34184C2E: 9804 LDR R0, [SP, #16] 0x34184C30: 6FC0 LDR R0, [R0, #124] 0x34184C32: F5B0 7F80 CMP.W R0, #0x0100 0x34184C36: D800 BHI 46L298 ; 0x34184C3A 0x34184C38: E007 B 46L299 ; 0x34184C4A
.L298: 0x34184C3A: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34184C3E: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34184C42: F240 31AB MOVW R1, #0x03AB 0x34184C46: F009 F827 BL assert_failed ; 0x3418DC98
.L299: 0x34184C4A: F248 01FC MOVW R1, #0x80FC 0x34184C4E: F2C5 6102 MOVT R1, #0x5602 0x34184C52: 6808 LDR R0, [R1] 0x34184C54: F64F 72FF MOVW R2, #0xFFFF 0x34184C58: F6CC 7200 MOVT R2, #0xCF00 0x34184C5C: 4010 ANDS R0, R2 0x34184C5E: 9B04 LDR R3, [SP, #16] 0x34184C60: 6F9A LDR R2, [R3, #120] 0x34184C62: F8D3 C07C LDR.W R12, [R3, #124] 0x34184C66: 2300 MOVS R3, #0 0x34184C68: F6CF 73FF MOVT R3, #0xFFFF 0x34184C6C: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34184C70: 431A ORRS R2, R3 0x34184C72: 4310 ORRS R0, R2 0x34184C74: 6008 STR R0, [R1] 0x34184C76: F003 FD7F BL LL_RCC_IC15_Enable.62 ; 0x34188778 0x34184C7A: E00B B 46L301 ; 0x34184C94
.L300: 0x34184C7C: 9804 LDR R0, [SP, #16] 0x34184C7E: F8D0 00F0 LDR.W R0, [R0, #240] 0x34184C82: F640 010C MOVW R1, #0x080C 0x34184C86: F2C0 7101 MOVT R1, #0x0701 0x34184C8A: 4288 CMP R0, R1 0x34184C8C: D102 BNE 46L301 ; 0x34184C94 0x34184C8E: F00B FAE5 BL LL_RCC_CLKP_Enable ; 0x3419025C 0x34184C92: E7FF B 46L301 ; 0x34184C94
.L301: 0x34184C94: 9804 LDR R0, [SP, #16] 0x34184C96: F8D0 00F0 LDR.W R0, [R0, #240] 0x34184C9A: F003 FE33 BL LL_RCC_SetI2CClockSource ; 0x34188904
.L302: 0x34184C9E: 9804 LDR R0, [SP, #16] 0x34184CA0: 7840 LDRB R0, [R0, #1] 0x34184CA2: 0600 LSLS R0, R0, #24 0x34184CA4: 2800 CMP R0, #0 0x34184CA6: F140 80EC BPL.W 46L319 ; 0x34184E82 0x34184CAA: 9804 LDR R0, [SP, #16] 0x34184CAC: F8D0 00F4 LDR.W R0, [R0, #244] 0x34184CB0: F640 410C MOVW R1, #0x0C0C 0x34184CB4: F2C0 7100 MOVT R1, #0x0700 0x34184CB8: 4288 CMP R0, R1 0x34184CBA: D02C BEQ 46L303 ; 0x34184D16 0x34184CBC: 9804 LDR R0, [SP, #16] 0x34184CBE: F8D0 00F4 LDR.W R0, [R0, #244] 0x34184CC2: F640 410C MOVW R1, #0x0C0C 0x34184CC6: F2C0 7101 MOVT R1, #0x0701 0x34184CCA: 4288 CMP R0, R1 0x34184CCC: D023 BEQ 46L303 ; 0x34184D16 0x34184CCE: 9804 LDR R0, [SP, #16] 0x34184CD0: F8D0 00F4 LDR.W R0, [R0, #244] 0x34184CD4: F640 410C MOVW R1, #0x0C0C 0x34184CD8: F2C0 7102 MOVT R1, #0x0702 0x34184CDC: 4288 CMP R0, R1 0x34184CDE: D01A BEQ 46L303 ; 0x34184D16 0x34184CE0: 9804 LDR R0, [SP, #16] 0x34184CE2: F8D0 00F4 LDR.W R0, [R0, #244] 0x34184CE6: F640 410C MOVW R1, #0x0C0C 0x34184CEA: F2C0 7103 MOVT R1, #0x0703 0x34184CEE: 4288 CMP R0, R1 0x34184CF0: D011 BEQ 46L303 ; 0x34184D16 0x34184CF2: 9804 LDR R0, [SP, #16] 0x34184CF4: F8D0 00F4 LDR.W R0, [R0, #244] 0x34184CF8: F640 410C MOVW R1, #0x0C0C 0x34184CFC: F2C0 7104 MOVT R1, #0x0704 0x34184D00: 4288 CMP R0, R1 0x34184D02: D008 BEQ 46L303 ; 0x34184D16 0x34184D04: 9804 LDR R0, [SP, #16] 0x34184D06: F8D0 00F4 LDR.W R0, [R0, #244] 0x34184D0A: F640 410C MOVW R1, #0x0C0C 0x34184D0E: F2C0 7105 MOVT R1, #0x0705 0x34184D12: 4288 CMP R0, R1 0x34184D14: D100 BNE 46L304 ; 0x34184D18
.L303: 0x34184D16: E007 B 46L305 ; 0x34184D28
.L304: 0x34184D18: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34184D1C: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34184D20: F240 31C5 MOVW R1, #0x03C5 0x34184D24: F008 FFB8 BL assert_failed ; 0x3418DC98
.L305: 0x34184D28: 9804 LDR R0, [SP, #16] 0x34184D2A: F8D0 00F4 LDR.W R0, [R0, #244] 0x34184D2E: F640 410C MOVW R1, #0x0C0C 0x34184D32: F2C0 7102 MOVT R1, #0x0702 0x34184D36: 4288 CMP R0, R1 0x34184D38: D144 BNE 46L311 ; 0x34184DC4 0x34184D3A: 9804 LDR R0, [SP, #16] 0x34184D3C: 6D00 LDR R0, [R0, #80] 0x34184D3E: B170 CBZ R0, .L306 ; 0x34184D5E 0x34184D40: 9804 LDR R0, [SP, #16] 0x34184D42: 6D00 LDR R0, [R0, #80] 0x34184D44: F1B0 5F80 CMP.W R0, #0x10000000 0x34184D48: D009 BEQ 46L306 ; 0x34184D5E 0x34184D4A: 9804 LDR R0, [SP, #16] 0x34184D4C: 6D00 LDR R0, [R0, #80] 0x34184D4E: F1B0 5F00 CMP.W R0, #0x20000000 0x34184D52: D004 BEQ 46L306 ; 0x34184D5E 0x34184D54: 9804 LDR R0, [SP, #16] 0x34184D56: 6D00 LDR R0, [R0, #80] 0x34184D58: F1B0 5F40 CMP.W R0, #0x30000000 0x34184D5C: D100 BNE 46L307 ; 0x34184D60
.L306: 0x34184D5E: E007 B 46L308 ; 0x34184D70
.L307: 0x34184D60: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34184D64: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34184D68: F240 31CA MOVW R1, #0x03CA 0x34184D6C: F008 FF94 BL assert_failed ; 0x3418DC98
.L308: 0x34184D70: 9804 LDR R0, [SP, #16] 0x34184D72: 6D40 LDR R0, [R0, #84] 0x34184D74: B128 CBZ R0, .L309 ; 0x34184D82 0x34184D76: 9804 LDR R0, [SP, #16] 0x34184D78: 6D40 LDR R0, [R0, #84] 0x34184D7A: F5B0 7F80 CMP.W R0, #0x0100 0x34184D7E: D800 BHI 46L309 ; 0x34184D82 0x34184D80: E007 B 46L310 ; 0x34184D92
.L309: 0x34184D82: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34184D86: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34184D8A: F240 31CB MOVW R1, #0x03CB 0x34184D8E: F008 FF83 BL assert_failed ; 0x3418DC98
.L310: 0x34184D92: F248 01E8 MOVW R1, #0x80E8 0x34184D96: F2C5 6102 MOVT R1, #0x5602 0x34184D9A: 6808 LDR R0, [R1] 0x34184D9C: F64F 72FF MOVW R2, #0xFFFF 0x34184DA0: F6CC 7200 MOVT R2, #0xCF00 0x34184DA4: 4010 ANDS R0, R2 0x34184DA6: 9B04 LDR R3, [SP, #16] 0x34184DA8: 6D1A LDR R2, [R3, #80] 0x34184DAA: F8D3 C054 LDR.W R12, [R3, #84] 0x34184DAE: 2300 MOVS R3, #0 0x34184DB0: F6CF 73FF MOVT R3, #0xFFFF 0x34184DB4: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34184DB8: 431A ORRS R2, R3 0x34184DBA: 4310 ORRS R0, R2 0x34184DBC: 6008 STR R0, [R1] 0x34184DBE: F003 FCD3 BL LL_RCC_IC10_Enable.61 ; 0x34188768 0x34184DC2: E059 B 46L318 ; 0x34184E78
.L311: 0x34184DC4: 9804 LDR R0, [SP, #16] 0x34184DC6: F8D0 00F4 LDR.W R0, [R0, #244] 0x34184DCA: F640 410C MOVW R1, #0x0C0C 0x34184DCE: F2C0 7103 MOVT R1, #0x0703 0x34184DD2: 4288 CMP R0, R1 0x34184DD4: D144 BNE 46L317 ; 0x34184E60 0x34184DD6: 9804 LDR R0, [SP, #16] 0x34184DD8: 6F80 LDR R0, [R0, #120] 0x34184DDA: B170 CBZ R0, .L312 ; 0x34184DFA 0x34184DDC: 9804 LDR R0, [SP, #16] 0x34184DDE: 6F80 LDR R0, [R0, #120] 0x34184DE0: F1B0 5F80 CMP.W R0, #0x10000000 0x34184DE4: D009 BEQ 46L312 ; 0x34184DFA 0x34184DE6: 9804 LDR R0, [SP, #16] 0x34184DE8: 6F80 LDR R0, [R0, #120] 0x34184DEA: F1B0 5F00 CMP.W R0, #0x20000000 0x34184DEE: D004 BEQ 46L312 ; 0x34184DFA 0x34184DF0: 9804 LDR R0, [SP, #16] 0x34184DF2: 6F80 LDR R0, [R0, #120] 0x34184DF4: F1B0 5F40 CMP.W R0, #0x30000000 0x34184DF8: D100 BNE 46L313 ; 0x34184DFC
.L312: 0x34184DFA: E007 B 46L314 ; 0x34184E0C
.L313: 0x34184DFC: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34184E00: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34184E04: F240 31D7 MOVW R1, #0x03D7 0x34184E08: F008 FF46 BL assert_failed ; 0x3418DC98
.L314: 0x34184E0C: 9804 LDR R0, [SP, #16] 0x34184E0E: 6FC0 LDR R0, [R0, #124] 0x34184E10: B128 CBZ R0, .L315 ; 0x34184E1E 0x34184E12: 9804 LDR R0, [SP, #16] 0x34184E14: 6FC0 LDR R0, [R0, #124] 0x34184E16: F5B0 7F80 CMP.W R0, #0x0100 0x34184E1A: D800 BHI 46L315 ; 0x34184E1E 0x34184E1C: E007 B 46L316 ; 0x34184E2E
.L315: 0x34184E1E: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34184E22: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34184E26: F44F 7176 MOV.W R1, #0x03D8 0x34184E2A: F008 FF35 BL assert_failed ; 0x3418DC98
.L316: 0x34184E2E: F248 01FC MOVW R1, #0x80FC 0x34184E32: F2C5 6102 MOVT R1, #0x5602 0x34184E36: 6808 LDR R0, [R1] 0x34184E38: F64F 72FF MOVW R2, #0xFFFF 0x34184E3C: F6CC 7200 MOVT R2, #0xCF00 0x34184E40: 4010 ANDS R0, R2 0x34184E42: 9B04 LDR R3, [SP, #16] 0x34184E44: 6F9A LDR R2, [R3, #120] 0x34184E46: F8D3 C07C LDR.W R12, [R3, #124] 0x34184E4A: 2300 MOVS R3, #0 0x34184E4C: F6CF 73FF MOVT R3, #0xFFFF 0x34184E50: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34184E54: 431A ORRS R2, R3 0x34184E56: 4310 ORRS R0, R2 0x34184E58: 6008 STR R0, [R1] 0x34184E5A: F003 FC8D BL LL_RCC_IC15_Enable.62 ; 0x34188778 0x34184E5E: E00B B 46L318 ; 0x34184E78
.L317: 0x34184E60: 9804 LDR R0, [SP, #16] 0x34184E62: F8D0 00F4 LDR.W R0, [R0, #244] 0x34184E66: F640 410C MOVW R1, #0x0C0C 0x34184E6A: F2C0 7101 MOVT R1, #0x0701 0x34184E6E: 4288 CMP R0, R1 0x34184E70: D102 BNE 46L318 ; 0x34184E78 0x34184E72: F00B F9F3 BL LL_RCC_CLKP_Enable ; 0x3419025C 0x34184E76: E7FF B 46L318 ; 0x34184E78
.L318: 0x34184E78: 9804 LDR R0, [SP, #16] 0x34184E7A: F8D0 00F4 LDR.W R0, [R0, #244] 0x34184E7E: F003 FD41 BL LL_RCC_SetI2CClockSource ; 0x34188904
.L319: 0x34184E82: 9804 LDR R0, [SP, #16] 0x34184E84: 7880 LDRB R0, [R0, #2] 0x34184E86: 07C0 LSLS R0, R0, #31 0x34184E88: 2800 CMP R0, #0 0x34184E8A: F000 80EC BEQ.W 46L336 ; 0x34185066 0x34184E8E: 9804 LDR R0, [SP, #16] 0x34184E90: F8D0 00F8 LDR.W R0, [R0, #248] 0x34184E94: F241 010C MOVW R1, #0x100C 0x34184E98: F2C0 7100 MOVT R1, #0x0700 0x34184E9C: 4288 CMP R0, R1 0x34184E9E: D02C BEQ 46L320 ; 0x34184EFA 0x34184EA0: 9804 LDR R0, [SP, #16] 0x34184EA2: F8D0 00F8 LDR.W R0, [R0, #248] 0x34184EA6: F241 010C MOVW R1, #0x100C 0x34184EAA: F2C0 7101 MOVT R1, #0x0701 0x34184EAE: 4288 CMP R0, R1 0x34184EB0: D023 BEQ 46L320 ; 0x34184EFA 0x34184EB2: 9804 LDR R0, [SP, #16] 0x34184EB4: F8D0 00F8 LDR.W R0, [R0, #248] 0x34184EB8: F241 010C MOVW R1, #0x100C 0x34184EBC: F2C0 7102 MOVT R1, #0x0702 0x34184EC0: 4288 CMP R0, R1 0x34184EC2: D01A BEQ 46L320 ; 0x34184EFA 0x34184EC4: 9804 LDR R0, [SP, #16] 0x34184EC6: F8D0 00F8 LDR.W R0, [R0, #248] 0x34184ECA: F241 010C MOVW R1, #0x100C 0x34184ECE: F2C0 7103 MOVT R1, #0x0703 0x34184ED2: 4288 CMP R0, R1 0x34184ED4: D011 BEQ 46L320 ; 0x34184EFA 0x34184ED6: 9804 LDR R0, [SP, #16] 0x34184ED8: F8D0 00F8 LDR.W R0, [R0, #248] 0x34184EDC: F241 010C MOVW R1, #0x100C 0x34184EE0: F2C0 7104 MOVT R1, #0x0704 0x34184EE4: 4288 CMP R0, R1 0x34184EE6: D008 BEQ 46L320 ; 0x34184EFA 0x34184EE8: 9804 LDR R0, [SP, #16] 0x34184EEA: F8D0 00F8 LDR.W R0, [R0, #248] 0x34184EEE: F241 010C MOVW R1, #0x100C 0x34184EF2: F2C0 7105 MOVT R1, #0x0705 0x34184EF6: 4288 CMP R0, R1 0x34184EF8: D100 BNE 46L321 ; 0x34184EFC
.L320: 0x34184EFA: E007 B 46L322 ; 0x34184F0C
.L321: 0x34184EFC: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34184F00: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34184F04: F240 31F2 MOVW R1, #0x03F2 0x34184F08: F008 FEC6 BL assert_failed ; 0x3418DC98
.L322: 0x34184F0C: 9804 LDR R0, [SP, #16] 0x34184F0E: F8D0 00F8 LDR.W R0, [R0, #248] 0x34184F12: F241 010C MOVW R1, #0x100C 0x34184F16: F2C0 7102 MOVT R1, #0x0702 0x34184F1A: 4288 CMP R0, R1 0x34184F1C: D144 BNE 46L328 ; 0x34184FA8 0x34184F1E: 9804 LDR R0, [SP, #16] 0x34184F20: 6D00 LDR R0, [R0, #80] 0x34184F22: B170 CBZ R0, .L323 ; 0x34184F42 0x34184F24: 9804 LDR R0, [SP, #16] 0x34184F26: 6D00 LDR R0, [R0, #80] 0x34184F28: F1B0 5F80 CMP.W R0, #0x10000000 0x34184F2C: D009 BEQ 46L323 ; 0x34184F42 0x34184F2E: 9804 LDR R0, [SP, #16] 0x34184F30: 6D00 LDR R0, [R0, #80] 0x34184F32: F1B0 5F00 CMP.W R0, #0x20000000 0x34184F36: D004 BEQ 46L323 ; 0x34184F42 0x34184F38: 9804 LDR R0, [SP, #16] 0x34184F3A: 6D00 LDR R0, [R0, #80] 0x34184F3C: F1B0 5F40 CMP.W R0, #0x30000000 0x34184F40: D100 BNE 46L324 ; 0x34184F44
.L323: 0x34184F42: E007 B 46L325 ; 0x34184F54
.L324: 0x34184F44: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34184F48: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34184F4C: F240 31F7 MOVW R1, #0x03F7 0x34184F50: F008 FEA2 BL assert_failed ; 0x3418DC98
.L325: 0x34184F54: 9804 LDR R0, [SP, #16] 0x34184F56: 6D40 LDR R0, [R0, #84] 0x34184F58: B128 CBZ R0, .L326 ; 0x34184F66 0x34184F5A: 9804 LDR R0, [SP, #16] 0x34184F5C: 6D40 LDR R0, [R0, #84] 0x34184F5E: F5B0 7F80 CMP.W R0, #0x0100 0x34184F62: D800 BHI 46L326 ; 0x34184F66 0x34184F64: E007 B 46L327 ; 0x34184F76
.L326: 0x34184F66: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34184F6A: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34184F6E: F44F 717E MOV.W R1, #0x03F8 0x34184F72: F008 FE91 BL assert_failed ; 0x3418DC98
.L327: 0x34184F76: F248 01E8 MOVW R1, #0x80E8 0x34184F7A: F2C5 6102 MOVT R1, #0x5602 0x34184F7E: 6808 LDR R0, [R1] 0x34184F80: F64F 72FF MOVW R2, #0xFFFF 0x34184F84: F6CC 7200 MOVT R2, #0xCF00 0x34184F88: 4010 ANDS R0, R2 0x34184F8A: 9B04 LDR R3, [SP, #16] 0x34184F8C: 6D1A LDR R2, [R3, #80] 0x34184F8E: F8D3 C054 LDR.W R12, [R3, #84] 0x34184F92: 2300 MOVS R3, #0 0x34184F94: F6CF 73FF MOVT R3, #0xFFFF 0x34184F98: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34184F9C: 431A ORRS R2, R3 0x34184F9E: 4310 ORRS R0, R2 0x34184FA0: 6008 STR R0, [R1] 0x34184FA2: F003 FBE1 BL LL_RCC_IC10_Enable.61 ; 0x34188768 0x34184FA6: E059 B 46L335 ; 0x3418505C
.L328: 0x34184FA8: 9804 LDR R0, [SP, #16] 0x34184FAA: F8D0 00F8 LDR.W R0, [R0, #248] 0x34184FAE: F241 010C MOVW R1, #0x100C 0x34184FB2: F2C0 7103 MOVT R1, #0x0703 0x34184FB6: 4288 CMP R0, R1 0x34184FB8: D144 BNE 46L334 ; 0x34185044 0x34184FBA: 9804 LDR R0, [SP, #16] 0x34184FBC: 6F80 LDR R0, [R0, #120] 0x34184FBE: B170 CBZ R0, .L329 ; 0x34184FDE 0x34184FC0: 9804 LDR R0, [SP, #16] 0x34184FC2: 6F80 LDR R0, [R0, #120] 0x34184FC4: F1B0 5F80 CMP.W R0, #0x10000000 0x34184FC8: D009 BEQ 46L329 ; 0x34184FDE 0x34184FCA: 9804 LDR R0, [SP, #16] 0x34184FCC: 6F80 LDR R0, [R0, #120] 0x34184FCE: F1B0 5F00 CMP.W R0, #0x20000000 0x34184FD2: D004 BEQ 46L329 ; 0x34184FDE 0x34184FD4: 9804 LDR R0, [SP, #16] 0x34184FD6: 6F80 LDR R0, [R0, #120] 0x34184FD8: F1B0 5F40 CMP.W R0, #0x30000000 0x34184FDC: D100 BNE 46L330 ; 0x34184FE0
.L329: 0x34184FDE: E007 B 46L331 ; 0x34184FF0
.L330: 0x34184FE0: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34184FE4: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34184FE8: F240 4104 MOVW R1, #0x0404 0x34184FEC: F008 FE54 BL assert_failed ; 0x3418DC98
.L331: 0x34184FF0: 9804 LDR R0, [SP, #16] 0x34184FF2: 6FC0 LDR R0, [R0, #124] 0x34184FF4: B128 CBZ R0, .L332 ; 0x34185002 0x34184FF6: 9804 LDR R0, [SP, #16] 0x34184FF8: 6FC0 LDR R0, [R0, #124] 0x34184FFA: F5B0 7F80 CMP.W R0, #0x0100 0x34184FFE: D800 BHI 46L332 ; 0x34185002 0x34185000: E007 B 46L333 ; 0x34185012
.L332: 0x34185002: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34185006: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x3418500A: F240 4105 MOVW R1, #0x0405 0x3418500E: F008 FE43 BL assert_failed ; 0x3418DC98
.L333: 0x34185012: F248 01FC MOVW R1, #0x80FC 0x34185016: F2C5 6102 MOVT R1, #0x5602 0x3418501A: 6808 LDR R0, [R1] 0x3418501C: F64F 72FF MOVW R2, #0xFFFF 0x34185020: F6CC 7200 MOVT R2, #0xCF00 0x34185024: 4010 ANDS R0, R2 0x34185026: 9B04 LDR R3, [SP, #16] 0x34185028: 6F9A LDR R2, [R3, #120] 0x3418502A: F8D3 C07C LDR.W R12, [R3, #124] 0x3418502E: 2300 MOVS R3, #0 0x34185030: F6CF 73FF MOVT R3, #0xFFFF 0x34185034: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34185038: 431A ORRS R2, R3 0x3418503A: 4310 ORRS R0, R2 0x3418503C: 6008 STR R0, [R1] 0x3418503E: F003 FB9B BL LL_RCC_IC15_Enable.62 ; 0x34188778 0x34185042: E00B B 46L335 ; 0x3418505C
.L334: 0x34185044: 9804 LDR R0, [SP, #16] 0x34185046: F8D0 00F8 LDR.W R0, [R0, #248] 0x3418504A: F241 010C MOVW R1, #0x100C 0x3418504E: F2C0 7101 MOVT R1, #0x0701 0x34185052: 4288 CMP R0, R1 0x34185054: D102 BNE 46L335 ; 0x3418505C 0x34185056: F00B F901 BL LL_RCC_CLKP_Enable ; 0x3419025C 0x3418505A: E7FF B 46L335 ; 0x3418505C
.L335: 0x3418505C: 9804 LDR R0, [SP, #16] 0x3418505E: F8D0 00F8 LDR.W R0, [R0, #248] 0x34185062: F003 FC57 BL LL_RCC_SetI3CClockSource ; 0x34188914
.L336: 0x34185066: 9804 LDR R0, [SP, #16] 0x34185068: 7880 LDRB R0, [R0, #2] 0x3418506A: 0780 LSLS R0, R0, #30 0x3418506C: 2800 CMP R0, #0 0x3418506E: F140 80EC BPL.W 46L353 ; 0x3418524A 0x34185072: 9804 LDR R0, [SP, #16] 0x34185074: F8D0 00FC LDR.W R0, [R0, #252] 0x34185078: F241 410C MOVW R1, #0x140C 0x3418507C: F2C0 7100 MOVT R1, #0x0700 0x34185080: 4288 CMP R0, R1 0x34185082: D02C BEQ 46L337 ; 0x341850DE 0x34185084: 9804 LDR R0, [SP, #16] 0x34185086: F8D0 00FC LDR.W R0, [R0, #252] 0x3418508A: F241 410C MOVW R1, #0x140C 0x3418508E: F2C0 7101 MOVT R1, #0x0701 0x34185092: 4288 CMP R0, R1 0x34185094: D023 BEQ 46L337 ; 0x341850DE 0x34185096: 9804 LDR R0, [SP, #16] 0x34185098: F8D0 00FC LDR.W R0, [R0, #252] 0x3418509C: F241 410C MOVW R1, #0x140C 0x341850A0: F2C0 7102 MOVT R1, #0x0702 0x341850A4: 4288 CMP R0, R1 0x341850A6: D01A BEQ 46L337 ; 0x341850DE 0x341850A8: 9804 LDR R0, [SP, #16] 0x341850AA: F8D0 00FC LDR.W R0, [R0, #252] 0x341850AE: F241 410C MOVW R1, #0x140C 0x341850B2: F2C0 7103 MOVT R1, #0x0703 0x341850B6: 4288 CMP R0, R1 0x341850B8: D011 BEQ 46L337 ; 0x341850DE 0x341850BA: 9804 LDR R0, [SP, #16] 0x341850BC: F8D0 00FC LDR.W R0, [R0, #252] 0x341850C0: F241 410C MOVW R1, #0x140C 0x341850C4: F2C0 7104 MOVT R1, #0x0704 0x341850C8: 4288 CMP R0, R1 0x341850CA: D008 BEQ 46L337 ; 0x341850DE 0x341850CC: 9804 LDR R0, [SP, #16] 0x341850CE: F8D0 00FC LDR.W R0, [R0, #252] 0x341850D2: F241 410C MOVW R1, #0x140C 0x341850D6: F2C0 7105 MOVT R1, #0x0705 0x341850DA: 4288 CMP R0, R1 0x341850DC: D100 BNE 46L338 ; 0x341850E0
.L337: 0x341850DE: E007 B 46L339 ; 0x341850F0
.L338: 0x341850E0: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341850E4: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341850E8: F240 411F MOVW R1, #0x041F 0x341850EC: F008 FDD4 BL assert_failed ; 0x3418DC98
.L339: 0x341850F0: 9804 LDR R0, [SP, #16] 0x341850F2: F8D0 00FC LDR.W R0, [R0, #252] 0x341850F6: F241 410C MOVW R1, #0x140C 0x341850FA: F2C0 7102 MOVT R1, #0x0702 0x341850FE: 4288 CMP R0, R1 0x34185100: D144 BNE 46L345 ; 0x3418518C 0x34185102: 9804 LDR R0, [SP, #16] 0x34185104: 6D00 LDR R0, [R0, #80] 0x34185106: B170 CBZ R0, .L340 ; 0x34185126 0x34185108: 9804 LDR R0, [SP, #16] 0x3418510A: 6D00 LDR R0, [R0, #80] 0x3418510C: F1B0 5F80 CMP.W R0, #0x10000000 0x34185110: D009 BEQ 46L340 ; 0x34185126 0x34185112: 9804 LDR R0, [SP, #16] 0x34185114: 6D00 LDR R0, [R0, #80] 0x34185116: F1B0 5F00 CMP.W R0, #0x20000000 0x3418511A: D004 BEQ 46L340 ; 0x34185126 0x3418511C: 9804 LDR R0, [SP, #16] 0x3418511E: 6D00 LDR R0, [R0, #80] 0x34185120: F1B0 5F40 CMP.W R0, #0x30000000 0x34185124: D100 BNE 46L341 ; 0x34185128
.L340: 0x34185126: E007 B 46L342 ; 0x34185138
.L341: 0x34185128: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x3418512C: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34185130: F240 4124 MOVW R1, #0x0424 0x34185134: F008 FDB0 BL assert_failed ; 0x3418DC98
.L342: 0x34185138: 9804 LDR R0, [SP, #16] 0x3418513A: 6D40 LDR R0, [R0, #84] 0x3418513C: B128 CBZ R0, .L343 ; 0x3418514A 0x3418513E: 9804 LDR R0, [SP, #16] 0x34185140: 6D40 LDR R0, [R0, #84] 0x34185142: F5B0 7F80 CMP.W R0, #0x0100 0x34185146: D800 BHI 46L343 ; 0x3418514A 0x34185148: E007 B 46L344 ; 0x3418515A
.L343: 0x3418514A: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x3418514E: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34185152: F240 4125 MOVW R1, #0x0425 0x34185156: F008 FD9F BL assert_failed ; 0x3418DC98
.L344: 0x3418515A: F248 01E8 MOVW R1, #0x80E8 0x3418515E: F2C5 6102 MOVT R1, #0x5602 0x34185162: 6808 LDR R0, [R1] 0x34185164: F64F 72FF MOVW R2, #0xFFFF 0x34185168: F6CC 7200 MOVT R2, #0xCF00 0x3418516C: 4010 ANDS R0, R2 0x3418516E: 9B04 LDR R3, [SP, #16] 0x34185170: 6D1A LDR R2, [R3, #80] 0x34185172: F8D3 C054 LDR.W R12, [R3, #84] 0x34185176: 2300 MOVS R3, #0 0x34185178: F6CF 73FF MOVT R3, #0xFFFF 0x3418517C: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34185180: 431A ORRS R2, R3 0x34185182: 4310 ORRS R0, R2 0x34185184: 6008 STR R0, [R1] 0x34185186: F003 FAEF BL LL_RCC_IC10_Enable.61 ; 0x34188768 0x3418518A: E059 B 46L352 ; 0x34185240
.L345: 0x3418518C: 9804 LDR R0, [SP, #16] 0x3418518E: F8D0 00FC LDR.W R0, [R0, #252] 0x34185192: F241 410C MOVW R1, #0x140C 0x34185196: F2C0 7103 MOVT R1, #0x0703 0x3418519A: 4288 CMP R0, R1 0x3418519C: D144 BNE 46L351 ; 0x34185228 0x3418519E: 9804 LDR R0, [SP, #16] 0x341851A0: 6F80 LDR R0, [R0, #120] 0x341851A2: B170 CBZ R0, .L346 ; 0x341851C2 0x341851A4: 9804 LDR R0, [SP, #16] 0x341851A6: 6F80 LDR R0, [R0, #120] 0x341851A8: F1B0 5F80 CMP.W R0, #0x10000000 0x341851AC: D009 BEQ 46L346 ; 0x341851C2 0x341851AE: 9804 LDR R0, [SP, #16] 0x341851B0: 6F80 LDR R0, [R0, #120] 0x341851B2: F1B0 5F00 CMP.W R0, #0x20000000 0x341851B6: D004 BEQ 46L346 ; 0x341851C2 0x341851B8: 9804 LDR R0, [SP, #16] 0x341851BA: 6F80 LDR R0, [R0, #120] 0x341851BC: F1B0 5F40 CMP.W R0, #0x30000000 0x341851C0: D100 BNE 46L347 ; 0x341851C4
.L346: 0x341851C2: E007 B 46L348 ; 0x341851D4
.L347: 0x341851C4: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341851C8: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341851CC: F240 4131 MOVW R1, #0x0431 0x341851D0: F008 FD62 BL assert_failed ; 0x3418DC98
.L348: 0x341851D4: 9804 LDR R0, [SP, #16] 0x341851D6: 6FC0 LDR R0, [R0, #124] 0x341851D8: B128 CBZ R0, .L349 ; 0x341851E6 0x341851DA: 9804 LDR R0, [SP, #16] 0x341851DC: 6FC0 LDR R0, [R0, #124] 0x341851DE: F5B0 7F80 CMP.W R0, #0x0100 0x341851E2: D800 BHI 46L349 ; 0x341851E6 0x341851E4: E007 B 46L350 ; 0x341851F6
.L349: 0x341851E6: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341851EA: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341851EE: F240 4132 MOVW R1, #0x0432 0x341851F2: F008 FD51 BL assert_failed ; 0x3418DC98
.L350: 0x341851F6: F248 01FC MOVW R1, #0x80FC 0x341851FA: F2C5 6102 MOVT R1, #0x5602 0x341851FE: 6808 LDR R0, [R1] 0x34185200: F64F 72FF MOVW R2, #0xFFFF 0x34185204: F6CC 7200 MOVT R2, #0xCF00 0x34185208: 4010 ANDS R0, R2 0x3418520A: 9B04 LDR R3, [SP, #16] 0x3418520C: 6F9A LDR R2, [R3, #120] 0x3418520E: F8D3 C07C LDR.W R12, [R3, #124] 0x34185212: 2300 MOVS R3, #0 0x34185214: F6CF 73FF MOVT R3, #0xFFFF 0x34185218: EB03 430C ADD.W R3, R3, R12, LSL #16 0x3418521C: 431A ORRS R2, R3 0x3418521E: 4310 ORRS R0, R2 0x34185220: 6008 STR R0, [R1] 0x34185222: F003 FAA9 BL LL_RCC_IC15_Enable.62 ; 0x34188778 0x34185226: E00B B 46L352 ; 0x34185240
.L351: 0x34185228: 9804 LDR R0, [SP, #16] 0x3418522A: F8D0 00FC LDR.W R0, [R0, #252] 0x3418522E: F241 410C MOVW R1, #0x140C 0x34185232: F2C0 7101 MOVT R1, #0x0701 0x34185236: 4288 CMP R0, R1 0x34185238: D102 BNE 46L352 ; 0x34185240 0x3418523A: F00B F80F BL LL_RCC_CLKP_Enable ; 0x3419025C 0x3418523E: E7FF B 46L352 ; 0x34185240
.L352: 0x34185240: 9804 LDR R0, [SP, #16] 0x34185242: F8D0 00FC LDR.W R0, [R0, #252] 0x34185246: F003 FB65 BL LL_RCC_SetI3CClockSource ; 0x34188914
.L353: 0x3418524A: 9804 LDR R0, [SP, #16] 0x3418524C: 7880 LDRB R0, [R0, #2] 0x3418524E: 0740 LSLS R0, R0, #29 0x34185250: 2800 CMP R0, #0 0x34185252: F140 809E BPL.W 46L364 ; 0x34185392 0x34185256: 9804 LDR R0, [SP, #16] 0x34185258: F8D0 0100 LDR.W R0, [R0, #0x0100] 0x3418525C: F640 012C MOVW R1, #0x082C 0x34185260: F2C0 7100 MOVT R1, #0x0700 0x34185264: 4288 CMP R0, R1 0x34185266: D02C BEQ 46L354 ; 0x341852C2 0x34185268: 9804 LDR R0, [SP, #16] 0x3418526A: F8D0 0100 LDR.W R0, [R0, #0x0100] 0x3418526E: F640 012C MOVW R1, #0x082C 0x34185272: F2C0 7101 MOVT R1, #0x0701 0x34185276: 4288 CMP R0, R1 0x34185278: D023 BEQ 46L354 ; 0x341852C2 0x3418527A: 9804 LDR R0, [SP, #16] 0x3418527C: F8D0 0100 LDR.W R0, [R0, #0x0100] 0x34185280: F640 012C MOVW R1, #0x082C 0x34185284: F2C0 7102 MOVT R1, #0x0702 0x34185288: 4288 CMP R0, R1 0x3418528A: D01A BEQ 46L354 ; 0x341852C2 0x3418528C: 9804 LDR R0, [SP, #16] 0x3418528E: F8D0 0100 LDR.W R0, [R0, #0x0100] 0x34185292: F640 012C MOVW R1, #0x082C 0x34185296: F2C0 7103 MOVT R1, #0x0703 0x3418529A: 4288 CMP R0, R1 0x3418529C: D011 BEQ 46L354 ; 0x341852C2 0x3418529E: 9804 LDR R0, [SP, #16] 0x341852A0: F8D0 0100 LDR.W R0, [R0, #0x0100] 0x341852A4: F640 012C MOVW R1, #0x082C 0x341852A8: F2C0 7104 MOVT R1, #0x0704 0x341852AC: 4288 CMP R0, R1 0x341852AE: D008 BEQ 46L354 ; 0x341852C2 0x341852B0: 9804 LDR R0, [SP, #16] 0x341852B2: F8D0 0100 LDR.W R0, [R0, #0x0100] 0x341852B6: F640 012C MOVW R1, #0x082C 0x341852BA: F2C0 7105 MOVT R1, #0x0705 0x341852BE: 4288 CMP R0, R1 0x341852C0: D100 BNE 46L355 ; 0x341852C4
.L354: 0x341852C2: E007 B 46L356 ; 0x341852D4
.L355: 0x341852C4: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341852C8: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341852CC: F240 414C MOVW R1, #0x044C 0x341852D0: F008 FCE2 BL assert_failed ; 0x3418DC98
.L356: 0x341852D4: 9804 LDR R0, [SP, #16] 0x341852D6: F8D0 0100 LDR.W R0, [R0, #0x0100] 0x341852DA: F640 012C MOVW R1, #0x082C 0x341852DE: F2C0 7102 MOVT R1, #0x0702 0x341852E2: 4288 CMP R0, R1 0x341852E4: D144 BNE 46L362 ; 0x34185370 0x341852E6: 9804 LDR R0, [SP, #16] 0x341852E8: 6F80 LDR R0, [R0, #120] 0x341852EA: B170 CBZ R0, .L357 ; 0x3418530A 0x341852EC: 9804 LDR R0, [SP, #16] 0x341852EE: 6F80 LDR R0, [R0, #120] 0x341852F0: F1B0 5F80 CMP.W R0, #0x10000000 0x341852F4: D009 BEQ 46L357 ; 0x3418530A 0x341852F6: 9804 LDR R0, [SP, #16] 0x341852F8: 6F80 LDR R0, [R0, #120] 0x341852FA: F1B0 5F00 CMP.W R0, #0x20000000 0x341852FE: D004 BEQ 46L357 ; 0x3418530A 0x34185300: 9804 LDR R0, [SP, #16] 0x34185302: 6F80 LDR R0, [R0, #120] 0x34185304: F1B0 5F40 CMP.W R0, #0x30000000 0x34185308: D100 BNE 46L358 ; 0x3418530C
.L357: 0x3418530A: E007 B 46L359 ; 0x3418531C
.L358: 0x3418530C: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34185310: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34185314: F240 4151 MOVW R1, #0x0451 0x34185318: F008 FCBE BL assert_failed ; 0x3418DC98
.L359: 0x3418531C: 9804 LDR R0, [SP, #16] 0x3418531E: 6FC0 LDR R0, [R0, #124] 0x34185320: B128 CBZ R0, .L360 ; 0x3418532E 0x34185322: 9804 LDR R0, [SP, #16] 0x34185324: 6FC0 LDR R0, [R0, #124] 0x34185326: F5B0 7F80 CMP.W R0, #0x0100 0x3418532A: D800 BHI 46L360 ; 0x3418532E 0x3418532C: E007 B 46L361 ; 0x3418533E
.L360: 0x3418532E: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34185332: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34185336: F240 4152 MOVW R1, #0x0452 0x3418533A: F008 FCAD BL assert_failed ; 0x3418DC98
.L361: 0x3418533E: F248 01FC MOVW R1, #0x80FC 0x34185342: F2C5 6102 MOVT R1, #0x5602 0x34185346: 6808 LDR R0, [R1] 0x34185348: F64F 72FF MOVW R2, #0xFFFF 0x3418534C: F6CC 7200 MOVT R2, #0xCF00 0x34185350: 4010 ANDS R0, R2 0x34185352: 9B04 LDR R3, [SP, #16] 0x34185354: 6F9A LDR R2, [R3, #120] 0x34185356: F8D3 C07C LDR.W R12, [R3, #124] 0x3418535A: 2300 MOVS R3, #0 0x3418535C: F6CF 73FF MOVT R3, #0xFFFF 0x34185360: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34185364: 431A ORRS R2, R3 0x34185366: 4310 ORRS R0, R2 0x34185368: 6008 STR R0, [R1] 0x3418536A: F003 FA05 BL LL_RCC_IC15_Enable.62 ; 0x34188778 0x3418536E: E00B B 46L363 ; 0x34185388
.L362: 0x34185370: 9804 LDR R0, [SP, #16] 0x34185372: F8D0 0100 LDR.W R0, [R0, #0x0100] 0x34185376: F640 012C MOVW R1, #0x082C 0x3418537A: F2C0 7101 MOVT R1, #0x0701 0x3418537E: 4288 CMP R0, R1 0x34185380: D102 BNE 46L363 ; 0x34185388 0x34185382: F00A FF6B BL LL_RCC_CLKP_Enable ; 0x3419025C 0x34185386: E7FF B 46L363 ; 0x34185388
.L363: 0x34185388: 9804 LDR R0, [SP, #16] 0x3418538A: F8D0 0100 LDR.W R0, [R0, #0x0100] 0x3418538E: F003 FAC9 BL LL_RCC_SetLPTIMClockSource ; 0x34188924
.L364: 0x34185392: 9804 LDR R0, [SP, #16] 0x34185394: 7880 LDRB R0, [R0, #2] 0x34185396: 0700 LSLS R0, R0, #28 0x34185398: 2800 CMP R0, #0 0x3418539A: F140 809E BPL.W 46L375 ; 0x341854DA 0x3418539E: 9804 LDR R0, [SP, #16] 0x341853A0: F8D0 0104 LDR.W R0, [R0, #0x0104] 0x341853A4: F640 412C MOVW R1, #0x0C2C 0x341853A8: F2C0 7100 MOVT R1, #0x0700 0x341853AC: 4288 CMP R0, R1 0x341853AE: D02C BEQ 46L365 ; 0x3418540A 0x341853B0: 9804 LDR R0, [SP, #16] 0x341853B2: F8D0 0104 LDR.W R0, [R0, #0x0104] 0x341853B6: F640 412C MOVW R1, #0x0C2C 0x341853BA: F2C0 7101 MOVT R1, #0x0701 0x341853BE: 4288 CMP R0, R1 0x341853C0: D023 BEQ 46L365 ; 0x3418540A 0x341853C2: 9804 LDR R0, [SP, #16] 0x341853C4: F8D0 0104 LDR.W R0, [R0, #0x0104] 0x341853C8: F640 412C MOVW R1, #0x0C2C 0x341853CC: F2C0 7102 MOVT R1, #0x0702 0x341853D0: 4288 CMP R0, R1 0x341853D2: D01A BEQ 46L365 ; 0x3418540A 0x341853D4: 9804 LDR R0, [SP, #16] 0x341853D6: F8D0 0104 LDR.W R0, [R0, #0x0104] 0x341853DA: F640 412C MOVW R1, #0x0C2C 0x341853DE: F2C0 7103 MOVT R1, #0x0703 0x341853E2: 4288 CMP R0, R1 0x341853E4: D011 BEQ 46L365 ; 0x3418540A 0x341853E6: 9804 LDR R0, [SP, #16] 0x341853E8: F8D0 0104 LDR.W R0, [R0, #0x0104] 0x341853EC: F640 412C MOVW R1, #0x0C2C 0x341853F0: F2C0 7104 MOVT R1, #0x0704 0x341853F4: 4288 CMP R0, R1 0x341853F6: D008 BEQ 46L365 ; 0x3418540A 0x341853F8: 9804 LDR R0, [SP, #16] 0x341853FA: F8D0 0104 LDR.W R0, [R0, #0x0104] 0x341853FE: F640 412C MOVW R1, #0x0C2C 0x34185402: F2C0 7105 MOVT R1, #0x0705 0x34185406: 4288 CMP R0, R1 0x34185408: D100 BNE 46L366 ; 0x3418540C
.L365: 0x3418540A: E007 B 46L367 ; 0x3418541C
.L366: 0x3418540C: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34185410: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34185414: F240 416C MOVW R1, #0x046C 0x34185418: F008 FC3E BL assert_failed ; 0x3418DC98
.L367: 0x3418541C: 9804 LDR R0, [SP, #16] 0x3418541E: F8D0 0104 LDR.W R0, [R0, #0x0104] 0x34185422: F640 412C MOVW R1, #0x0C2C 0x34185426: F2C0 7102 MOVT R1, #0x0702 0x3418542A: 4288 CMP R0, R1 0x3418542C: D144 BNE 46L373 ; 0x341854B8 0x3418542E: 9804 LDR R0, [SP, #16] 0x34185430: 6F80 LDR R0, [R0, #120] 0x34185432: B170 CBZ R0, .L368 ; 0x34185452 0x34185434: 9804 LDR R0, [SP, #16] 0x34185436: 6F80 LDR R0, [R0, #120] 0x34185438: F1B0 5F80 CMP.W R0, #0x10000000 0x3418543C: D009 BEQ 46L368 ; 0x34185452 0x3418543E: 9804 LDR R0, [SP, #16] 0x34185440: 6F80 LDR R0, [R0, #120] 0x34185442: F1B0 5F00 CMP.W R0, #0x20000000 0x34185446: D004 BEQ 46L368 ; 0x34185452 0x34185448: 9804 LDR R0, [SP, #16] 0x3418544A: 6F80 LDR R0, [R0, #120] 0x3418544C: F1B0 5F40 CMP.W R0, #0x30000000 0x34185450: D100 BNE 46L369 ; 0x34185454
.L368: 0x34185452: E007 B 46L370 ; 0x34185464
.L369: 0x34185454: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34185458: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x3418545C: F240 4171 MOVW R1, #0x0471 0x34185460: F008 FC1A BL assert_failed ; 0x3418DC98
.L370: 0x34185464: 9804 LDR R0, [SP, #16] 0x34185466: 6FC0 LDR R0, [R0, #124] 0x34185468: B128 CBZ R0, .L371 ; 0x34185476 0x3418546A: 9804 LDR R0, [SP, #16] 0x3418546C: 6FC0 LDR R0, [R0, #124] 0x3418546E: F5B0 7F80 CMP.W R0, #0x0100 0x34185472: D800 BHI 46L371 ; 0x34185476 0x34185474: E007 B 46L372 ; 0x34185486
.L371: 0x34185476: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x3418547A: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x3418547E: F240 4172 MOVW R1, #0x0472 0x34185482: F008 FC09 BL assert_failed ; 0x3418DC98
.L372: 0x34185486: F248 01FC MOVW R1, #0x80FC 0x3418548A: F2C5 6102 MOVT R1, #0x5602 0x3418548E: 6808 LDR R0, [R1] 0x34185490: F64F 72FF MOVW R2, #0xFFFF 0x34185494: F6CC 7200 MOVT R2, #0xCF00 0x34185498: 4010 ANDS R0, R2 0x3418549A: 9B04 LDR R3, [SP, #16] 0x3418549C: 6F9A LDR R2, [R3, #120] 0x3418549E: F8D3 C07C LDR.W R12, [R3, #124] 0x341854A2: 2300 MOVS R3, #0 0x341854A4: F6CF 73FF MOVT R3, #0xFFFF 0x341854A8: EB03 430C ADD.W R3, R3, R12, LSL #16 0x341854AC: 431A ORRS R2, R3 0x341854AE: 4310 ORRS R0, R2 0x341854B0: 6008 STR R0, [R1] 0x341854B2: F003 F961 BL LL_RCC_IC15_Enable.62 ; 0x34188778 0x341854B6: E00B B 46L374 ; 0x341854D0
.L373: 0x341854B8: 9804 LDR R0, [SP, #16] 0x341854BA: F8D0 0104 LDR.W R0, [R0, #0x0104] 0x341854BE: F640 412C MOVW R1, #0x0C2C 0x341854C2: F2C0 7101 MOVT R1, #0x0701 0x341854C6: 4288 CMP R0, R1 0x341854C8: D102 BNE 46L374 ; 0x341854D0 0x341854CA: F00A FEC7 BL LL_RCC_CLKP_Enable ; 0x3419025C 0x341854CE: E7FF B 46L374 ; 0x341854D0
.L374: 0x341854D0: 9804 LDR R0, [SP, #16] 0x341854D2: F8D0 0104 LDR.W R0, [R0, #0x0104] 0x341854D6: F003 FA25 BL LL_RCC_SetLPTIMClockSource ; 0x34188924
.L375: 0x341854DA: 9804 LDR R0, [SP, #16] 0x341854DC: 7880 LDRB R0, [R0, #2] 0x341854DE: 06C0 LSLS R0, R0, #27 0x341854E0: 2800 CMP R0, #0 0x341854E2: F140 809E BPL.W 46L386 ; 0x34185622 0x341854E6: 9804 LDR R0, [SP, #16] 0x341854E8: F8D0 0108 LDR.W R0, [R0, #0x0108] 0x341854EC: F241 012C MOVW R1, #0x102C 0x341854F0: F2C0 7100 MOVT R1, #0x0700 0x341854F4: 4288 CMP R0, R1 0x341854F6: D02C BEQ 46L376 ; 0x34185552 0x341854F8: 9804 LDR R0, [SP, #16] 0x341854FA: F8D0 0108 LDR.W R0, [R0, #0x0108] 0x341854FE: F241 012C MOVW R1, #0x102C 0x34185502: F2C0 7101 MOVT R1, #0x0701 0x34185506: 4288 CMP R0, R1 0x34185508: D023 BEQ 46L376 ; 0x34185552 0x3418550A: 9804 LDR R0, [SP, #16] 0x3418550C: F8D0 0108 LDR.W R0, [R0, #0x0108] 0x34185510: F241 012C MOVW R1, #0x102C 0x34185514: F2C0 7102 MOVT R1, #0x0702 0x34185518: 4288 CMP R0, R1 0x3418551A: D01A BEQ 46L376 ; 0x34185552 0x3418551C: 9804 LDR R0, [SP, #16] 0x3418551E: F8D0 0108 LDR.W R0, [R0, #0x0108] 0x34185522: F241 012C MOVW R1, #0x102C 0x34185526: F2C0 7103 MOVT R1, #0x0703 0x3418552A: 4288 CMP R0, R1 0x3418552C: D011 BEQ 46L376 ; 0x34185552 0x3418552E: 9804 LDR R0, [SP, #16] 0x34185530: F8D0 0108 LDR.W R0, [R0, #0x0108] 0x34185534: F241 012C MOVW R1, #0x102C 0x34185538: F2C0 7104 MOVT R1, #0x0704 0x3418553C: 4288 CMP R0, R1 0x3418553E: D008 BEQ 46L376 ; 0x34185552 0x34185540: 9804 LDR R0, [SP, #16] 0x34185542: F8D0 0108 LDR.W R0, [R0, #0x0108] 0x34185546: F241 012C MOVW R1, #0x102C 0x3418554A: F2C0 7105 MOVT R1, #0x0705 0x3418554E: 4288 CMP R0, R1 0x34185550: D100 BNE 46L377 ; 0x34185554
.L376: 0x34185552: E007 B 46L378 ; 0x34185564
.L377: 0x34185554: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34185558: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x3418555C: F240 418C MOVW R1, #0x048C 0x34185560: F008 FB9A BL assert_failed ; 0x3418DC98
.L378: 0x34185564: 9804 LDR R0, [SP, #16] 0x34185566: F8D0 0108 LDR.W R0, [R0, #0x0108] 0x3418556A: F241 012C MOVW R1, #0x102C 0x3418556E: F2C0 7102 MOVT R1, #0x0702 0x34185572: 4288 CMP R0, R1 0x34185574: D144 BNE 46L384 ; 0x34185600 0x34185576: 9804 LDR R0, [SP, #16] 0x34185578: 6F80 LDR R0, [R0, #120] 0x3418557A: B170 CBZ R0, .L379 ; 0x3418559A 0x3418557C: 9804 LDR R0, [SP, #16] 0x3418557E: 6F80 LDR R0, [R0, #120] 0x34185580: F1B0 5F80 CMP.W R0, #0x10000000 0x34185584: D009 BEQ 46L379 ; 0x3418559A 0x34185586: 9804 LDR R0, [SP, #16] 0x34185588: 6F80 LDR R0, [R0, #120] 0x3418558A: F1B0 5F00 CMP.W R0, #0x20000000 0x3418558E: D004 BEQ 46L379 ; 0x3418559A 0x34185590: 9804 LDR R0, [SP, #16] 0x34185592: 6F80 LDR R0, [R0, #120] 0x34185594: F1B0 5F40 CMP.W R0, #0x30000000 0x34185598: D100 BNE 46L380 ; 0x3418559C
.L379: 0x3418559A: E007 B 46L381 ; 0x341855AC
.L380: 0x3418559C: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341855A0: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341855A4: F240 4191 MOVW R1, #0x0491 0x341855A8: F008 FB76 BL assert_failed ; 0x3418DC98
.L381: 0x341855AC: 9804 LDR R0, [SP, #16] 0x341855AE: 6FC0 LDR R0, [R0, #124] 0x341855B0: B128 CBZ R0, .L382 ; 0x341855BE 0x341855B2: 9804 LDR R0, [SP, #16] 0x341855B4: 6FC0 LDR R0, [R0, #124] 0x341855B6: F5B0 7F80 CMP.W R0, #0x0100 0x341855BA: D800 BHI 46L382 ; 0x341855BE 0x341855BC: E007 B 46L383 ; 0x341855CE
.L382: 0x341855BE: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341855C2: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341855C6: F240 4192 MOVW R1, #0x0492 0x341855CA: F008 FB65 BL assert_failed ; 0x3418DC98
.L383: 0x341855CE: F248 01FC MOVW R1, #0x80FC 0x341855D2: F2C5 6102 MOVT R1, #0x5602 0x341855D6: 6808 LDR R0, [R1] 0x341855D8: F64F 72FF MOVW R2, #0xFFFF 0x341855DC: F6CC 7200 MOVT R2, #0xCF00 0x341855E0: 4010 ANDS R0, R2 0x341855E2: 9B04 LDR R3, [SP, #16] 0x341855E4: 6F9A LDR R2, [R3, #120] 0x341855E6: F8D3 C07C LDR.W R12, [R3, #124] 0x341855EA: 2300 MOVS R3, #0 0x341855EC: F6CF 73FF MOVT R3, #0xFFFF 0x341855F0: EB03 430C ADD.W R3, R3, R12, LSL #16 0x341855F4: 431A ORRS R2, R3 0x341855F6: 4310 ORRS R0, R2 0x341855F8: 6008 STR R0, [R1] 0x341855FA: F003 F8BD BL LL_RCC_IC15_Enable.62 ; 0x34188778 0x341855FE: E00B B 46L385 ; 0x34185618
.L384: 0x34185600: 9804 LDR R0, [SP, #16] 0x34185602: F8D0 0108 LDR.W R0, [R0, #0x0108] 0x34185606: F241 012C MOVW R1, #0x102C 0x3418560A: F2C0 7101 MOVT R1, #0x0701 0x3418560E: 4288 CMP R0, R1 0x34185610: D102 BNE 46L385 ; 0x34185618 0x34185612: F00A FE23 BL LL_RCC_CLKP_Enable ; 0x3419025C 0x34185616: E7FF B 46L385 ; 0x34185618
.L385: 0x34185618: 9804 LDR R0, [SP, #16] 0x3418561A: F8D0 0108 LDR.W R0, [R0, #0x0108] 0x3418561E: F003 F981 BL LL_RCC_SetLPTIMClockSource ; 0x34188924
.L386: 0x34185622: 9804 LDR R0, [SP, #16] 0x34185624: 7880 LDRB R0, [R0, #2] 0x34185626: 0680 LSLS R0, R0, #26 0x34185628: 2800 CMP R0, #0 0x3418562A: F140 809E BPL.W 46L397 ; 0x3418576A 0x3418562E: 9804 LDR R0, [SP, #16] 0x34185630: F8D0 010C LDR.W R0, [R0, #0x010C] 0x34185634: F241 412C MOVW R1, #0x142C 0x34185638: F2C0 7100 MOVT R1, #0x0700 0x3418563C: 4288 CMP R0, R1 0x3418563E: D02C BEQ 46L387 ; 0x3418569A 0x34185640: 9804 LDR R0, [SP, #16] 0x34185642: F8D0 010C LDR.W R0, [R0, #0x010C] 0x34185646: F241 412C MOVW R1, #0x142C 0x3418564A: F2C0 7101 MOVT R1, #0x0701 0x3418564E: 4288 CMP R0, R1 0x34185650: D023 BEQ 46L387 ; 0x3418569A 0x34185652: 9804 LDR R0, [SP, #16] 0x34185654: F8D0 010C LDR.W R0, [R0, #0x010C] 0x34185658: F241 412C MOVW R1, #0x142C 0x3418565C: F2C0 7102 MOVT R1, #0x0702 0x34185660: 4288 CMP R0, R1 0x34185662: D01A BEQ 46L387 ; 0x3418569A 0x34185664: 9804 LDR R0, [SP, #16] 0x34185666: F8D0 010C LDR.W R0, [R0, #0x010C] 0x3418566A: F241 412C MOVW R1, #0x142C 0x3418566E: F2C0 7103 MOVT R1, #0x0703 0x34185672: 4288 CMP R0, R1 0x34185674: D011 BEQ 46L387 ; 0x3418569A 0x34185676: 9804 LDR R0, [SP, #16] 0x34185678: F8D0 010C LDR.W R0, [R0, #0x010C] 0x3418567C: F241 412C MOVW R1, #0x142C 0x34185680: F2C0 7104 MOVT R1, #0x0704 0x34185684: 4288 CMP R0, R1 0x34185686: D008 BEQ 46L387 ; 0x3418569A 0x34185688: 9804 LDR R0, [SP, #16] 0x3418568A: F8D0 010C LDR.W R0, [R0, #0x010C] 0x3418568E: F241 412C MOVW R1, #0x142C 0x34185692: F2C0 7105 MOVT R1, #0x0705 0x34185696: 4288 CMP R0, R1 0x34185698: D100 BNE 46L388 ; 0x3418569C
.L387: 0x3418569A: E007 B 46L389 ; 0x341856AC
.L388: 0x3418569C: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341856A0: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341856A4: F240 41AC MOVW R1, #0x04AC 0x341856A8: F008 FAF6 BL assert_failed ; 0x3418DC98
.L389: 0x341856AC: 9804 LDR R0, [SP, #16] 0x341856AE: F8D0 010C LDR.W R0, [R0, #0x010C] 0x341856B2: F241 412C MOVW R1, #0x142C 0x341856B6: F2C0 7102 MOVT R1, #0x0702 0x341856BA: 4288 CMP R0, R1 0x341856BC: D144 BNE 46L395 ; 0x34185748 0x341856BE: 9804 LDR R0, [SP, #16] 0x341856C0: 6F80 LDR R0, [R0, #120] 0x341856C2: B170 CBZ R0, .L390 ; 0x341856E2 0x341856C4: 9804 LDR R0, [SP, #16] 0x341856C6: 6F80 LDR R0, [R0, #120] 0x341856C8: F1B0 5F80 CMP.W R0, #0x10000000 0x341856CC: D009 BEQ 46L390 ; 0x341856E2 0x341856CE: 9804 LDR R0, [SP, #16] 0x341856D0: 6F80 LDR R0, [R0, #120] 0x341856D2: F1B0 5F00 CMP.W R0, #0x20000000 0x341856D6: D004 BEQ 46L390 ; 0x341856E2 0x341856D8: 9804 LDR R0, [SP, #16] 0x341856DA: 6F80 LDR R0, [R0, #120] 0x341856DC: F1B0 5F40 CMP.W R0, #0x30000000 0x341856E0: D100 BNE 46L391 ; 0x341856E4
.L390: 0x341856E2: E007 B 46L392 ; 0x341856F4
.L391: 0x341856E4: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341856E8: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341856EC: F240 41B1 MOVW R1, #0x04B1 0x341856F0: F008 FAD2 BL assert_failed ; 0x3418DC98
.L392: 0x341856F4: 9804 LDR R0, [SP, #16] 0x341856F6: 6FC0 LDR R0, [R0, #124] 0x341856F8: B128 CBZ R0, .L393 ; 0x34185706 0x341856FA: 9804 LDR R0, [SP, #16] 0x341856FC: 6FC0 LDR R0, [R0, #124] 0x341856FE: F5B0 7F80 CMP.W R0, #0x0100 0x34185702: D800 BHI 46L393 ; 0x34185706 0x34185704: E007 B 46L394 ; 0x34185716
.L393: 0x34185706: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x3418570A: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x3418570E: F240 41B2 MOVW R1, #0x04B2 0x34185712: F008 FAC1 BL assert_failed ; 0x3418DC98
.L394: 0x34185716: F248 01FC MOVW R1, #0x80FC 0x3418571A: F2C5 6102 MOVT R1, #0x5602 0x3418571E: 6808 LDR R0, [R1] 0x34185720: F64F 72FF MOVW R2, #0xFFFF 0x34185724: F6CC 7200 MOVT R2, #0xCF00 0x34185728: 4010 ANDS R0, R2 0x3418572A: 9B04 LDR R3, [SP, #16] 0x3418572C: 6F9A LDR R2, [R3, #120] 0x3418572E: F8D3 C07C LDR.W R12, [R3, #124] 0x34185732: 2300 MOVS R3, #0 0x34185734: F6CF 73FF MOVT R3, #0xFFFF 0x34185738: EB03 430C ADD.W R3, R3, R12, LSL #16 0x3418573C: 431A ORRS R2, R3 0x3418573E: 4310 ORRS R0, R2 0x34185740: 6008 STR R0, [R1] 0x34185742: F003 F819 BL LL_RCC_IC15_Enable.62 ; 0x34188778 0x34185746: E00B B 46L396 ; 0x34185760
.L395: 0x34185748: 9804 LDR R0, [SP, #16] 0x3418574A: F8D0 010C LDR.W R0, [R0, #0x010C] 0x3418574E: F241 412C MOVW R1, #0x142C 0x34185752: F2C0 7101 MOVT R1, #0x0701 0x34185756: 4288 CMP R0, R1 0x34185758: D102 BNE 46L396 ; 0x34185760 0x3418575A: F00A FD7F BL LL_RCC_CLKP_Enable ; 0x3419025C 0x3418575E: E7FF B 46L396 ; 0x34185760
.L396: 0x34185760: 9804 LDR R0, [SP, #16] 0x34185762: F8D0 010C LDR.W R0, [R0, #0x010C] 0x34185766: F003 F8DD BL LL_RCC_SetLPTIMClockSource ; 0x34188924
.L397: 0x3418576A: 9804 LDR R0, [SP, #16] 0x3418576C: 7880 LDRB R0, [R0, #2] 0x3418576E: 0640 LSLS R0, R0, #25 0x34185770: 2800 CMP R0, #0 0x34185772: F140 809E BPL.W 46L408 ; 0x341858B2 0x34185776: 9804 LDR R0, [SP, #16] 0x34185778: F8D0 0110 LDR.W R0, [R0, #0x0110] 0x3418577C: F641 012C MOVW R1, #0x182C 0x34185780: F2C0 7100 MOVT R1, #0x0700 0x34185784: 4288 CMP R0, R1 0x34185786: D02C BEQ 46L398 ; 0x341857E2 0x34185788: 9804 LDR R0, [SP, #16] 0x3418578A: F8D0 0110 LDR.W R0, [R0, #0x0110] 0x3418578E: F641 012C MOVW R1, #0x182C 0x34185792: F2C0 7101 MOVT R1, #0x0701 0x34185796: 4288 CMP R0, R1 0x34185798: D023 BEQ 46L398 ; 0x341857E2 0x3418579A: 9804 LDR R0, [SP, #16] 0x3418579C: F8D0 0110 LDR.W R0, [R0, #0x0110] 0x341857A0: F641 012C MOVW R1, #0x182C 0x341857A4: F2C0 7102 MOVT R1, #0x0702 0x341857A8: 4288 CMP R0, R1 0x341857AA: D01A BEQ 46L398 ; 0x341857E2 0x341857AC: 9804 LDR R0, [SP, #16] 0x341857AE: F8D0 0110 LDR.W R0, [R0, #0x0110] 0x341857B2: F641 012C MOVW R1, #0x182C 0x341857B6: F2C0 7103 MOVT R1, #0x0703 0x341857BA: 4288 CMP R0, R1 0x341857BC: D011 BEQ 46L398 ; 0x341857E2 0x341857BE: 9804 LDR R0, [SP, #16] 0x341857C0: F8D0 0110 LDR.W R0, [R0, #0x0110] 0x341857C4: F641 012C MOVW R1, #0x182C 0x341857C8: F2C0 7104 MOVT R1, #0x0704 0x341857CC: 4288 CMP R0, R1 0x341857CE: D008 BEQ 46L398 ; 0x341857E2 0x341857D0: 9804 LDR R0, [SP, #16] 0x341857D2: F8D0 0110 LDR.W R0, [R0, #0x0110] 0x341857D6: F641 012C MOVW R1, #0x182C 0x341857DA: F2C0 7105 MOVT R1, #0x0705 0x341857DE: 4288 CMP R0, R1 0x341857E0: D100 BNE 46L399 ; 0x341857E4
.L398: 0x341857E2: E007 B 46L400 ; 0x341857F4
.L399: 0x341857E4: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341857E8: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341857EC: F240 41CC MOVW R1, #0x04CC 0x341857F0: F008 FA52 BL assert_failed ; 0x3418DC98
.L400: 0x341857F4: 9804 LDR R0, [SP, #16] 0x341857F6: F8D0 0110 LDR.W R0, [R0, #0x0110] 0x341857FA: F641 012C MOVW R1, #0x182C 0x341857FE: F2C0 7102 MOVT R1, #0x0702 0x34185802: 4288 CMP R0, R1 0x34185804: D144 BNE 46L406 ; 0x34185890 0x34185806: 9804 LDR R0, [SP, #16] 0x34185808: 6F80 LDR R0, [R0, #120] 0x3418580A: B170 CBZ R0, .L401 ; 0x3418582A 0x3418580C: 9804 LDR R0, [SP, #16] 0x3418580E: 6F80 LDR R0, [R0, #120] 0x34185810: F1B0 5F80 CMP.W R0, #0x10000000 0x34185814: D009 BEQ 46L401 ; 0x3418582A 0x34185816: 9804 LDR R0, [SP, #16] 0x34185818: 6F80 LDR R0, [R0, #120] 0x3418581A: F1B0 5F00 CMP.W R0, #0x20000000 0x3418581E: D004 BEQ 46L401 ; 0x3418582A 0x34185820: 9804 LDR R0, [SP, #16] 0x34185822: 6F80 LDR R0, [R0, #120] 0x34185824: F1B0 5F40 CMP.W R0, #0x30000000 0x34185828: D100 BNE 46L402 ; 0x3418582C
.L401: 0x3418582A: E007 B 46L403 ; 0x3418583C
.L402: 0x3418582C: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34185830: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34185834: F240 41D1 MOVW R1, #0x04D1 0x34185838: F008 FA2E BL assert_failed ; 0x3418DC98
.L403: 0x3418583C: 9804 LDR R0, [SP, #16] 0x3418583E: 6FC0 LDR R0, [R0, #124] 0x34185840: B128 CBZ R0, .L404 ; 0x3418584E 0x34185842: 9804 LDR R0, [SP, #16] 0x34185844: 6FC0 LDR R0, [R0, #124] 0x34185846: F5B0 7F80 CMP.W R0, #0x0100 0x3418584A: D800 BHI 46L404 ; 0x3418584E 0x3418584C: E007 B 46L405 ; 0x3418585E
.L404: 0x3418584E: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34185852: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34185856: F240 41D2 MOVW R1, #0x04D2 0x3418585A: F008 FA1D BL assert_failed ; 0x3418DC98
.L405: 0x3418585E: F248 01FC MOVW R1, #0x80FC 0x34185862: F2C5 6102 MOVT R1, #0x5602 0x34185866: 6808 LDR R0, [R1] 0x34185868: F64F 72FF MOVW R2, #0xFFFF 0x3418586C: F6CC 7200 MOVT R2, #0xCF00 0x34185870: 4010 ANDS R0, R2 0x34185872: 9B04 LDR R3, [SP, #16] 0x34185874: 6F9A LDR R2, [R3, #120] 0x34185876: F8D3 C07C LDR.W R12, [R3, #124] 0x3418587A: 2300 MOVS R3, #0 0x3418587C: F6CF 73FF MOVT R3, #0xFFFF 0x34185880: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34185884: 431A ORRS R2, R3 0x34185886: 4310 ORRS R0, R2 0x34185888: 6008 STR R0, [R1] 0x3418588A: F002 FF75 BL LL_RCC_IC15_Enable.62 ; 0x34188778 0x3418588E: E00B B 46L407 ; 0x341858A8
.L406: 0x34185890: 9804 LDR R0, [SP, #16] 0x34185892: F8D0 0110 LDR.W R0, [R0, #0x0110] 0x34185896: F641 012C MOVW R1, #0x182C 0x3418589A: F2C0 7101 MOVT R1, #0x0701 0x3418589E: 4288 CMP R0, R1 0x341858A0: D102 BNE 46L407 ; 0x341858A8 0x341858A2: F00A FCDB BL LL_RCC_CLKP_Enable ; 0x3419025C 0x341858A6: E7FF B 46L407 ; 0x341858A8
.L407: 0x341858A8: 9804 LDR R0, [SP, #16] 0x341858AA: F8D0 0110 LDR.W R0, [R0, #0x0110] 0x341858AE: F003 F839 BL LL_RCC_SetLPTIMClockSource ; 0x34188924
.L408: 0x341858B2: 9804 LDR R0, [SP, #16] 0x341858B4: 7880 LDRB R0, [R0, #2] 0x341858B6: 0600 LSLS R0, R0, #24 0x341858B8: 2800 CMP R0, #0 0x341858BA: F140 80D5 BPL.W 46L425 ; 0x34185A68 0x341858BE: 9804 LDR R0, [SP, #16] 0x341858C0: F8D0 0114 LDR.W R0, [R0, #0x0114] 0x341858C4: B318 CBZ R0, .L409 ; 0x3418590E 0x341858C6: 9804 LDR R0, [SP, #16] 0x341858C8: F8D0 0114 LDR.W R0, [R0, #0x0114] 0x341858CC: F5B0 7F80 CMP.W R0, #0x0100 0x341858D0: D01D BEQ 46L409 ; 0x3418590E 0x341858D2: 9804 LDR R0, [SP, #16] 0x341858D4: F8D0 0114 LDR.W R0, [R0, #0x0114] 0x341858D8: F5B0 7F00 CMP.W R0, #0x0200 0x341858DC: D017 BEQ 46L409 ; 0x3418590E 0x341858DE: 9804 LDR R0, [SP, #16] 0x341858E0: F8D0 0114 LDR.W R0, [R0, #0x0114] 0x341858E4: F5B0 7F40 CMP.W R0, #0x0300 0x341858E8: D011 BEQ 46L409 ; 0x3418590E 0x341858EA: 9804 LDR R0, [SP, #16] 0x341858EC: F8D0 0114 LDR.W R0, [R0, #0x0114] 0x341858F0: F5B0 6F80 CMP.W R0, #0x0400 0x341858F4: D00B BEQ 46L409 ; 0x3418590E 0x341858F6: 9804 LDR R0, [SP, #16] 0x341858F8: F8D0 0114 LDR.W R0, [R0, #0x0114] 0x341858FC: F5B0 6FA0 CMP.W R0, #0x0500 0x34185900: D005 BEQ 46L409 ; 0x3418590E 0x34185902: 9804 LDR R0, [SP, #16] 0x34185904: F8D0 0114 LDR.W R0, [R0, #0x0114] 0x34185908: F5B0 6FC0 CMP.W R0, #0x0600 0x3418590C: D100 BNE 46L410 ; 0x34185910
.L409: 0x3418590E: E007 B 46L411 ; 0x34185920
.L410: 0x34185910: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34185914: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34185918: F240 41EC MOVW R1, #0x04EC 0x3418591C: F008 F9BC BL assert_failed ; 0x3418DC98
.L411: 0x34185920: 9804 LDR R0, [SP, #16] 0x34185922: F8D0 0114 LDR.W R0, [R0, #0x0114] 0x34185926: F5B0 7F00 CMP.W R0, #0x0200 0x3418592A: D144 BNE 46L417 ; 0x341859B6 0x3418592C: 9804 LDR R0, [SP, #16] 0x3418592E: 6C80 LDR R0, [R0, #72] 0x34185930: B170 CBZ R0, .L412 ; 0x34185950 0x34185932: 9804 LDR R0, [SP, #16] 0x34185934: 6C80 LDR R0, [R0, #72] 0x34185936: F1B0 5F80 CMP.W R0, #0x10000000 0x3418593A: D009 BEQ 46L412 ; 0x34185950 0x3418593C: 9804 LDR R0, [SP, #16] 0x3418593E: 6C80 LDR R0, [R0, #72] 0x34185940: F1B0 5F00 CMP.W R0, #0x20000000 0x34185944: D004 BEQ 46L412 ; 0x34185950 0x34185946: 9804 LDR R0, [SP, #16] 0x34185948: 6C80 LDR R0, [R0, #72] 0x3418594A: F1B0 5F40 CMP.W R0, #0x30000000 0x3418594E: D100 BNE 46L413 ; 0x34185952
.L412: 0x34185950: E007 B 46L414 ; 0x34185962
.L413: 0x34185952: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34185956: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x3418595A: F240 41F1 MOVW R1, #0x04F1 0x3418595E: F008 F99B BL assert_failed ; 0x3418DC98
.L414: 0x34185962: 9804 LDR R0, [SP, #16] 0x34185964: 6CC0 LDR R0, [R0, #76] 0x34185966: B128 CBZ R0, .L415 ; 0x34185974 0x34185968: 9804 LDR R0, [SP, #16] 0x3418596A: 6CC0 LDR R0, [R0, #76] 0x3418596C: F5B0 7F80 CMP.W R0, #0x0100 0x34185970: D800 BHI 46L415 ; 0x34185974 0x34185972: E007 B 46L416 ; 0x34185984
.L415: 0x34185974: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34185978: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x3418597C: F240 41F2 MOVW R1, #0x04F2 0x34185980: F008 F98A BL assert_failed ; 0x3418DC98
.L416: 0x34185984: F248 01E4 MOVW R1, #0x80E4 0x34185988: F2C5 6102 MOVT R1, #0x5602 0x3418598C: 6808 LDR R0, [R1] 0x3418598E: F64F 72FF MOVW R2, #0xFFFF 0x34185992: F6CC 7200 MOVT R2, #0xCF00 0x34185996: 4010 ANDS R0, R2 0x34185998: 9B04 LDR R3, [SP, #16] 0x3418599A: 6C9A LDR R2, [R3, #72] 0x3418599C: F8D3 C04C LDR.W R12, [R3, #76] 0x341859A0: 2300 MOVS R3, #0 0x341859A2: F6CF 73FF MOVT R3, #0xFFFF 0x341859A6: EB03 430C ADD.W R3, R3, R12, LSL #16 0x341859AA: 431A ORRS R2, R3 0x341859AC: 4310 ORRS R0, R2 0x341859AE: 6008 STR R0, [R1] 0x341859B0: F002 FFC0 BL LL_RCC_IC9_Enable ; 0x34188934 0x341859B4: E053 B 46L424 ; 0x34185A5E
.L417: 0x341859B6: 9804 LDR R0, [SP, #16] 0x341859B8: F8D0 0114 LDR.W R0, [R0, #0x0114] 0x341859BC: F5B0 7F40 CMP.W R0, #0x0300 0x341859C0: D144 BNE 46L423 ; 0x34185A4C 0x341859C2: 9804 LDR R0, [SP, #16] 0x341859C4: 6F00 LDR R0, [R0, #112] 0x341859C6: B170 CBZ R0, .L418 ; 0x341859E6 0x341859C8: 9804 LDR R0, [SP, #16] 0x341859CA: 6F00 LDR R0, [R0, #112] 0x341859CC: F1B0 5F80 CMP.W R0, #0x10000000 0x341859D0: D009 BEQ 46L418 ; 0x341859E6 0x341859D2: 9804 LDR R0, [SP, #16] 0x341859D4: 6F00 LDR R0, [R0, #112] 0x341859D6: F1B0 5F00 CMP.W R0, #0x20000000 0x341859DA: D004 BEQ 46L418 ; 0x341859E6 0x341859DC: 9804 LDR R0, [SP, #16] 0x341859DE: 6F00 LDR R0, [R0, #112] 0x341859E0: F1B0 5F40 CMP.W R0, #0x30000000 0x341859E4: D100 BNE 46L419 ; 0x341859E8
.L418: 0x341859E6: E007 B 46L420 ; 0x341859F8
.L419: 0x341859E8: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341859EC: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341859F0: F240 41FE MOVW R1, #0x04FE 0x341859F4: F008 F950 BL assert_failed ; 0x3418DC98
.L420: 0x341859F8: 9804 LDR R0, [SP, #16] 0x341859FA: 6F40 LDR R0, [R0, #116] 0x341859FC: B128 CBZ R0, .L421 ; 0x34185A0A 0x341859FE: 9804 LDR R0, [SP, #16] 0x34185A00: 6F40 LDR R0, [R0, #116] 0x34185A02: F5B0 7F80 CMP.W R0, #0x0100 0x34185A06: D800 BHI 46L421 ; 0x34185A0A 0x34185A08: E007 B 46L422 ; 0x34185A1A
.L421: 0x34185A0A: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34185A0E: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34185A12: F240 41FF MOVW R1, #0x04FF 0x34185A16: F008 F93F BL assert_failed ; 0x3418DC98
.L422: 0x34185A1A: F248 01F8 MOVW R1, #0x80F8 0x34185A1E: F2C5 6102 MOVT R1, #0x5602 0x34185A22: 6808 LDR R0, [R1] 0x34185A24: F64F 72FF MOVW R2, #0xFFFF 0x34185A28: F6CC 7200 MOVT R2, #0xCF00 0x34185A2C: 4010 ANDS R0, R2 0x34185A2E: 9B04 LDR R3, [SP, #16] 0x34185A30: 6F1A LDR R2, [R3, #112] 0x34185A32: F8D3 C074 LDR.W R12, [R3, #116] 0x34185A36: 2300 MOVS R3, #0 0x34185A38: F6CF 73FF MOVT R3, #0xFFFF 0x34185A3C: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34185A40: 431A ORRS R2, R3 0x34185A42: 4310 ORRS R0, R2 0x34185A44: 6008 STR R0, [R1] 0x34185A46: F002 FF7D BL LL_RCC_IC14_Enable ; 0x34188944 0x34185A4A: E008 B 46L424 ; 0x34185A5E
.L423: 0x34185A4C: 9804 LDR R0, [SP, #16] 0x34185A4E: F8D0 0114 LDR.W R0, [R0, #0x0114] 0x34185A52: F5B0 7F80 CMP.W R0, #0x0100 0x34185A56: D102 BNE 46L424 ; 0x34185A5E 0x34185A58: F00A FC00 BL LL_RCC_CLKP_Enable ; 0x3419025C 0x34185A5C: E7FF B 46L424 ; 0x34185A5E
.L424: 0x34185A5E: 9804 LDR R0, [SP, #16] 0x34185A60: F8D0 0114 LDR.W R0, [R0, #0x0114] 0x34185A64: F002 FF76 BL LL_RCC_SetLPUARTClockSource ; 0x34188954
.L425: 0x34185A68: 9804 LDR R0, [SP, #16] 0x34185A6A: 78C0 LDRB R0, [R0, #3] 0x34185A6C: 07C0 LSLS R0, R0, #31 0x34185A6E: 2800 CMP R0, #0 0x34185A70: D07E BEQ 46L436 ; 0x34185B70 0x34185A72: 9804 LDR R0, [SP, #16] 0x34185A74: F8D0 0118 LDR.W R0, [R0, #0x0118] 0x34185A78: B188 CBZ R0, .L426 ; 0x34185A9E 0x34185A7A: 9804 LDR R0, [SP, #16] 0x34185A7C: F8D0 0118 LDR.W R0, [R0, #0x0118] 0x34185A80: F1B0 7F80 CMP.W R0, #0x01000000 0x34185A84: D00B BEQ 46L426 ; 0x34185A9E 0x34185A86: 9804 LDR R0, [SP, #16] 0x34185A88: F8D0 0118 LDR.W R0, [R0, #0x0118] 0x34185A8C: F1B0 7F00 CMP.W R0, #0x02000000 0x34185A90: D005 BEQ 46L426 ; 0x34185A9E 0x34185A92: 9804 LDR R0, [SP, #16] 0x34185A94: F8D0 0118 LDR.W R0, [R0, #0x0118] 0x34185A98: F1B0 7F40 CMP.W R0, #0x03000000 0x34185A9C: D100 BNE 46L427 ; 0x34185AA0
.L426: 0x34185A9E: E007 B 46L428 ; 0x34185AB0
.L427: 0x34185AA0: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34185AA4: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34185AA8: F240 5119 MOVW R1, #0x0519 0x34185AAC: F008 F8F4 BL assert_failed ; 0x3418DC98
.L428: 0x34185AB0: 9804 LDR R0, [SP, #16] 0x34185AB2: F8D0 0118 LDR.W R0, [R0, #0x0118] 0x34185AB6: F1B0 7F00 CMP.W R0, #0x02000000 0x34185ABA: D14B BNE 46L434 ; 0x34185B54 0x34185ABC: 9804 LDR R0, [SP, #16] 0x34185ABE: F8D0 0080 LDR.W R0, [R0, #128] 0x34185AC2: B188 CBZ R0, .L429 ; 0x34185AE8 0x34185AC4: 9804 LDR R0, [SP, #16] 0x34185AC6: F8D0 0080 LDR.W R0, [R0, #128] 0x34185ACA: F1B0 5F80 CMP.W R0, #0x10000000 0x34185ACE: D00B BEQ 46L429 ; 0x34185AE8 0x34185AD0: 9804 LDR R0, [SP, #16] 0x34185AD2: F8D0 0080 LDR.W R0, [R0, #128] 0x34185AD6: F1B0 5F00 CMP.W R0, #0x20000000 0x34185ADA: D005 BEQ 46L429 ; 0x34185AE8 0x34185ADC: 9804 LDR R0, [SP, #16] 0x34185ADE: F8D0 0080 LDR.W R0, [R0, #128] 0x34185AE2: F1B0 5F40 CMP.W R0, #0x30000000 0x34185AE6: D100 BNE 46L430 ; 0x34185AEA
.L429: 0x34185AE8: E007 B 46L431 ; 0x34185AFA
.L430: 0x34185AEA: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34185AEE: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34185AF2: F240 511E MOVW R1, #0x051E 0x34185AF6: F008 F8CF BL assert_failed ; 0x3418DC98
.L431: 0x34185AFA: 9804 LDR R0, [SP, #16] 0x34185AFC: F8D0 0084 LDR.W R0, [R0, #132] 0x34185B00: B130 CBZ R0, .L432 ; 0x34185B10 0x34185B02: 9804 LDR R0, [SP, #16] 0x34185B04: F8D0 0084 LDR.W R0, [R0, #132] 0x34185B08: F5B0 7F80 CMP.W R0, #0x0100 0x34185B0C: D800 BHI 46L432 ; 0x34185B10 0x34185B0E: E007 B 46L433 ; 0x34185B20
.L432: 0x34185B10: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34185B14: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34185B18: F240 511F MOVW R1, #0x051F 0x34185B1C: F008 F8BC BL assert_failed ; 0x3418DC98
.L433: 0x34185B20: F248 1100 MOVW R1, #0x8100 0x34185B24: F2C5 6102 MOVT R1, #0x5602 0x34185B28: 6808 LDR R0, [R1] 0x34185B2A: F64F 72FF MOVW R2, #0xFFFF 0x34185B2E: F6CC 7200 MOVT R2, #0xCF00 0x34185B32: 4010 ANDS R0, R2 0x34185B34: 9B04 LDR R3, [SP, #16] 0x34185B36: F8D3 2080 LDR.W R2, [R3, #128] 0x34185B3A: F8D3 C084 LDR.W R12, [R3, #132] 0x34185B3E: 2300 MOVS R3, #0 0x34185B40: F6CF 73FF MOVT R3, #0xFFFF 0x34185B44: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34185B48: 431A ORRS R2, R3 0x34185B4A: 4310 ORRS R0, R2 0x34185B4C: 6008 STR R0, [R1] 0x34185B4E: F002 FF0F BL LL_RCC_IC16_Enable ; 0x34188970 0x34185B52: E008 B 46L435 ; 0x34185B66
.L434: 0x34185B54: 9804 LDR R0, [SP, #16] 0x34185B56: F8D0 0118 LDR.W R0, [R0, #0x0118] 0x34185B5A: F1B0 7F80 CMP.W R0, #0x01000000 0x34185B5E: D102 BNE 46L435 ; 0x34185B66 0x34185B60: F00A FB7C BL LL_RCC_CLKP_Enable ; 0x3419025C 0x34185B64: E7FF B 46L435 ; 0x34185B66
.L435: 0x34185B66: 9804 LDR R0, [SP, #16] 0x34185B68: F8D0 0118 LDR.W R0, [R0, #0x0118] 0x34185B6C: F002 FF08 BL LL_RCC_SetLTDCClockSource ; 0x34188980
.L436: 0x34185B70: 9804 LDR R0, [SP, #16] 0x34185B72: 78C0 LDRB R0, [R0, #3] 0x34185B74: 0780 LSLS R0, R0, #30 0x34185B76: 2800 CMP R0, #0 0x34185B78: F140 80DB BPL.W 46L453 ; 0x34185D32 0x34185B7C: 9804 LDR R0, [SP, #16] 0x34185B7E: F8D0 011C LDR.W R0, [R0, #0x011C] 0x34185B82: B348 CBZ R0, .L437 ; 0x34185BD8 0x34185B84: 9804 LDR R0, [SP, #16] 0x34185B86: F8D0 011C LDR.W R0, [R0, #0x011C] 0x34185B8A: F5B0 3F80 CMP.W R0, #0x010000 0x34185B8E: D023 BEQ 46L437 ; 0x34185BD8 0x34185B90: 9804 LDR R0, [SP, #16] 0x34185B92: F8D0 011C LDR.W R0, [R0, #0x011C] 0x34185B96: F5B0 3F00 CMP.W R0, #0x020000 0x34185B9A: D01D BEQ 46L437 ; 0x34185BD8 0x34185B9C: 9804 LDR R0, [SP, #16] 0x34185B9E: F8D0 011C LDR.W R0, [R0, #0x011C] 0x34185BA2: F5B0 3F40 CMP.W R0, #0x030000 0x34185BA6: D017 BEQ 46L437 ; 0x34185BD8 0x34185BA8: 9804 LDR R0, [SP, #16] 0x34185BAA: F8D0 011C LDR.W R0, [R0, #0x011C] 0x34185BAE: F5B0 2F80 CMP.W R0, #0x040000 0x34185BB2: D011 BEQ 46L437 ; 0x34185BD8 0x34185BB4: 9804 LDR R0, [SP, #16] 0x34185BB6: F8D0 011C LDR.W R0, [R0, #0x011C] 0x34185BBA: F5B0 2FA0 CMP.W R0, #0x050000 0x34185BBE: D00B BEQ 46L437 ; 0x34185BD8 0x34185BC0: 9804 LDR R0, [SP, #16] 0x34185BC2: F8D0 011C LDR.W R0, [R0, #0x011C] 0x34185BC6: F5B0 2FC0 CMP.W R0, #0x060000 0x34185BCA: D005 BEQ 46L437 ; 0x34185BD8 0x34185BCC: 9804 LDR R0, [SP, #16] 0x34185BCE: F8D0 011C LDR.W R0, [R0, #0x011C] 0x34185BD2: F5B0 2FE0 CMP.W R0, #0x070000 0x34185BD6: D100 BNE 46L438 ; 0x34185BDA
.L437: 0x34185BD8: E007 B 46L439 ; 0x34185BEA
.L438: 0x34185BDA: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34185BDE: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34185BE2: F240 5139 MOVW R1, #0x0539 0x34185BE6: F008 F857 BL assert_failed ; 0x3418DC98
.L439: 0x34185BEA: 9804 LDR R0, [SP, #16] 0x34185BEC: F8D0 011C LDR.W R0, [R0, #0x011C] 0x34185BF0: F5B0 3F00 CMP.W R0, #0x020000 0x34185BF4: D144 BNE 46L445 ; 0x34185C80 0x34185BF6: 9804 LDR R0, [SP, #16] 0x34185BF8: 6B80 LDR R0, [R0, #56] 0x34185BFA: B170 CBZ R0, .L440 ; 0x34185C1A 0x34185BFC: 9804 LDR R0, [SP, #16] 0x34185BFE: 6B80 LDR R0, [R0, #56] 0x34185C00: F1B0 5F80 CMP.W R0, #0x10000000 0x34185C04: D009 BEQ 46L440 ; 0x34185C1A 0x34185C06: 9804 LDR R0, [SP, #16] 0x34185C08: 6B80 LDR R0, [R0, #56] 0x34185C0A: F1B0 5F00 CMP.W R0, #0x20000000 0x34185C0E: D004 BEQ 46L440 ; 0x34185C1A 0x34185C10: 9804 LDR R0, [SP, #16] 0x34185C12: 6B80 LDR R0, [R0, #56] 0x34185C14: F1B0 5F40 CMP.W R0, #0x30000000 0x34185C18: D100 BNE 46L441 ; 0x34185C1C
.L440: 0x34185C1A: E007 B 46L442 ; 0x34185C2C
.L441: 0x34185C1C: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34185C20: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34185C24: F240 513E MOVW R1, #0x053E 0x34185C28: F008 F836 BL assert_failed ; 0x3418DC98
.L442: 0x34185C2C: 9804 LDR R0, [SP, #16] 0x34185C2E: 6BC0 LDR R0, [R0, #60] 0x34185C30: B128 CBZ R0, .L443 ; 0x34185C3E 0x34185C32: 9804 LDR R0, [SP, #16] 0x34185C34: 6BC0 LDR R0, [R0, #60] 0x34185C36: F5B0 7F80 CMP.W R0, #0x0100 0x34185C3A: D800 BHI 46L443 ; 0x34185C3E 0x34185C3C: E007 B 46L444 ; 0x34185C4E
.L443: 0x34185C3E: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34185C42: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34185C46: F240 513F MOVW R1, #0x053F 0x34185C4A: F008 F825 BL assert_failed ; 0x3418DC98
.L444: 0x34185C4E: F248 01DC MOVW R1, #0x80DC 0x34185C52: F2C5 6102 MOVT R1, #0x5602 0x34185C56: 6808 LDR R0, [R1] 0x34185C58: F64F 72FF MOVW R2, #0xFFFF 0x34185C5C: F6CC 7200 MOVT R2, #0xCF00 0x34185C60: 4010 ANDS R0, R2 0x34185C62: 9B04 LDR R3, [SP, #16] 0x34185C64: 6B9A LDR R2, [R3, #56] 0x34185C66: F8D3 C03C LDR.W R12, [R3, #60] 0x34185C6A: 2300 MOVS R3, #0 0x34185C6C: F6CF 73FF MOVT R3, #0xFFFF 0x34185C70: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34185C74: 431A ORRS R2, R3 0x34185C76: 4310 ORRS R0, R2 0x34185C78: 6008 STR R0, [R1] 0x34185C7A: F00A FAF7 BL LL_RCC_IC7_Enable ; 0x3419026C 0x34185C7E: E053 B 46L452 ; 0x34185D28
.L445: 0x34185C80: 9804 LDR R0, [SP, #16] 0x34185C82: F8D0 011C LDR.W R0, [R0, #0x011C] 0x34185C86: F5B0 3F40 CMP.W R0, #0x030000 0x34185C8A: D144 BNE 46L451 ; 0x34185D16 0x34185C8C: 9804 LDR R0, [SP, #16] 0x34185C8E: 6C00 LDR R0, [R0, #64] 0x34185C90: B170 CBZ R0, .L446 ; 0x34185CB0 0x34185C92: 9804 LDR R0, [SP, #16] 0x34185C94: 6C00 LDR R0, [R0, #64] 0x34185C96: F1B0 5F80 CMP.W R0, #0x10000000 0x34185C9A: D009 BEQ 46L446 ; 0x34185CB0 0x34185C9C: 9804 LDR R0, [SP, #16] 0x34185C9E: 6C00 LDR R0, [R0, #64] 0x34185CA0: F1B0 5F00 CMP.W R0, #0x20000000 0x34185CA4: D004 BEQ 46L446 ; 0x34185CB0 0x34185CA6: 9804 LDR R0, [SP, #16] 0x34185CA8: 6C00 LDR R0, [R0, #64] 0x34185CAA: F1B0 5F40 CMP.W R0, #0x30000000 0x34185CAE: D100 BNE 46L447 ; 0x34185CB2
.L446: 0x34185CB0: E007 B 46L448 ; 0x34185CC2
.L447: 0x34185CB2: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34185CB6: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34185CBA: F240 514B MOVW R1, #0x054B 0x34185CBE: F007 FFEB BL assert_failed ; 0x3418DC98
.L448: 0x34185CC2: 9804 LDR R0, [SP, #16] 0x34185CC4: 6C40 LDR R0, [R0, #68] 0x34185CC6: B128 CBZ R0, .L449 ; 0x34185CD4 0x34185CC8: 9804 LDR R0, [SP, #16] 0x34185CCA: 6C40 LDR R0, [R0, #68] 0x34185CCC: F5B0 7F80 CMP.W R0, #0x0100 0x34185CD0: D800 BHI 46L449 ; 0x34185CD4 0x34185CD2: E007 B 46L450 ; 0x34185CE4
.L449: 0x34185CD4: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34185CD8: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34185CDC: F240 514C MOVW R1, #0x054C 0x34185CE0: F007 FFDA BL assert_failed ; 0x3418DC98
.L450: 0x34185CE4: F248 01E0 MOVW R1, #0x80E0 0x34185CE8: F2C5 6102 MOVT R1, #0x5602 0x34185CEC: 6808 LDR R0, [R1] 0x34185CEE: F64F 72FF MOVW R2, #0xFFFF 0x34185CF2: F6CC 7200 MOVT R2, #0xCF00 0x34185CF6: 4010 ANDS R0, R2 0x34185CF8: 9B04 LDR R3, [SP, #16] 0x34185CFA: 6C1A LDR R2, [R3, #64] 0x34185CFC: F8D3 C044 LDR.W R12, [R3, #68] 0x34185D00: 2300 MOVS R3, #0 0x34185D02: F6CF 73FF MOVT R3, #0xFFFF 0x34185D06: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34185D0A: 431A ORRS R2, R3 0x34185D0C: 4310 ORRS R0, R2 0x34185D0E: 6008 STR R0, [R1] 0x34185D10: F00A FAB4 BL LL_RCC_IC8_Enable ; 0x3419027C 0x34185D14: E008 B 46L452 ; 0x34185D28
.L451: 0x34185D16: 9804 LDR R0, [SP, #16] 0x34185D18: F8D0 011C LDR.W R0, [R0, #0x011C] 0x34185D1C: F5B0 3F80 CMP.W R0, #0x010000 0x34185D20: D102 BNE 46L452 ; 0x34185D28 0x34185D22: F00A FA9B BL LL_RCC_CLKP_Enable ; 0x3419025C 0x34185D26: E7FF B 46L452 ; 0x34185D28
.L452: 0x34185D28: 9804 LDR R0, [SP, #16] 0x34185D2A: F8D0 011C LDR.W R0, [R0, #0x011C] 0x34185D2E: F002 FE35 BL LL_RCC_SetMDFClockSource ; 0x3418899C
.L453: 0x34185D32: 9804 LDR R0, [SP, #16] 0x34185D34: 78C0 LDRB R0, [R0, #3] 0x34185D36: 0740 LSLS R0, R0, #29 0x34185D38: 2800 CMP R0, #0 0x34185D3A: D579 BPL 46L464 ; 0x34185E30 0x34185D3C: 9804 LDR R0, [SP, #16] 0x34185D3E: F8D0 0120 LDR.W R0, [R0, #0x0120] 0x34185D42: B170 CBZ R0, .L454 ; 0x34185D62 0x34185D44: 9804 LDR R0, [SP, #16] 0x34185D46: F8D0 0120 LDR.W R0, [R0, #0x0120] 0x34185D4A: 2810 CMP R0, #16 0x34185D4C: D009 BEQ 46L454 ; 0x34185D62 0x34185D4E: 9804 LDR R0, [SP, #16] 0x34185D50: F8D0 0120 LDR.W R0, [R0, #0x0120] 0x34185D54: 2820 CMP R0, #32 0x34185D56: D004 BEQ 46L454 ; 0x34185D62 0x34185D58: 9804 LDR R0, [SP, #16] 0x34185D5A: F8D0 0120 LDR.W R0, [R0, #0x0120] 0x34185D5E: 2830 CMP R0, #48 0x34185D60: D100 BNE 46L455 ; 0x34185D64
.L454: 0x34185D62: E007 B 46L456 ; 0x34185D74
.L455: 0x34185D64: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34185D68: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34185D6C: F240 5166 MOVW R1, #0x0566 0x34185D70: F007 FF92 BL assert_failed ; 0x3418DC98
.L456: 0x34185D74: 9804 LDR R0, [SP, #16] 0x34185D76: F8D0 0120 LDR.W R0, [R0, #0x0120] 0x34185D7A: 2820 CMP R0, #32 0x34185D7C: D14B BNE 46L462 ; 0x34185E16 0x34185D7E: 9804 LDR R0, [SP, #16] 0x34185D80: F8D0 00A0 LDR.W R0, [R0, #160] 0x34185D84: B188 CBZ R0, .L457 ; 0x34185DAA 0x34185D86: 9804 LDR R0, [SP, #16] 0x34185D88: F8D0 00A0 LDR.W R0, [R0, #160] 0x34185D8C: F1B0 5F80 CMP.W R0, #0x10000000 0x34185D90: D00B BEQ 46L457 ; 0x34185DAA 0x34185D92: 9804 LDR R0, [SP, #16] 0x34185D94: F8D0 00A0 LDR.W R0, [R0, #160] 0x34185D98: F1B0 5F00 CMP.W R0, #0x20000000 0x34185D9C: D005 BEQ 46L457 ; 0x34185DAA 0x34185D9E: 9804 LDR R0, [SP, #16] 0x34185DA0: F8D0 00A0 LDR.W R0, [R0, #160] 0x34185DA4: F1B0 5F40 CMP.W R0, #0x30000000 0x34185DA8: D100 BNE 46L458 ; 0x34185DAC
.L457: 0x34185DAA: E007 B 46L459 ; 0x34185DBC
.L458: 0x34185DAC: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34185DB0: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34185DB4: F240 516B MOVW R1, #0x056B 0x34185DB8: F007 FF6E BL assert_failed ; 0x3418DC98
.L459: 0x34185DBC: 9804 LDR R0, [SP, #16] 0x34185DBE: F8D0 00A4 LDR.W R0, [R0, #164] 0x34185DC2: B130 CBZ R0, .L460 ; 0x34185DD2 0x34185DC4: 9804 LDR R0, [SP, #16] 0x34185DC6: F8D0 00A4 LDR.W R0, [R0, #164] 0x34185DCA: F5B0 7F80 CMP.W R0, #0x0100 0x34185DCE: D800 BHI 46L460 ; 0x34185DD2 0x34185DD0: E007 B 46L461 ; 0x34185DE2
.L460: 0x34185DD2: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34185DD6: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34185DDA: F240 516C MOVW R1, #0x056C 0x34185DDE: F007 FF5B BL assert_failed ; 0x3418DC98
.L461: 0x34185DE2: F248 1110 MOVW R1, #0x8110 0x34185DE6: F2C5 6102 MOVT R1, #0x5602 0x34185DEA: 6808 LDR R0, [R1] 0x34185DEC: F64F 72FF MOVW R2, #0xFFFF 0x34185DF0: F6CC 7200 MOVT R2, #0xCF00 0x34185DF4: 4010 ANDS R0, R2 0x34185DF6: 9B04 LDR R3, [SP, #16] 0x34185DF8: F8D3 20A0 LDR.W R2, [R3, #160] 0x34185DFC: F8D3 C0A4 LDR.W R12, [R3, #164] 0x34185E00: 2300 MOVS R3, #0 0x34185E02: F6CF 73FF MOVT R3, #0xFFFF 0x34185E06: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34185E0A: 431A ORRS R2, R3 0x34185E0C: 4310 ORRS R0, R2 0x34185E0E: 6008 STR R0, [R1] 0x34185E10: F002 FCC2 BL LL_RCC_IC20_Enable.63 ; 0x34188798 0x34185E14: E007 B 46L463 ; 0x34185E26
.L462: 0x34185E16: 9804 LDR R0, [SP, #16] 0x34185E18: F8D0 0120 LDR.W R0, [R0, #0x0120] 0x34185E1C: 2810 CMP R0, #16 0x34185E1E: D102 BNE 46L463 ; 0x34185E26 0x34185E20: F00A FA1C BL LL_RCC_CLKP_Enable ; 0x3419025C 0x34185E24: E7FF B 46L463 ; 0x34185E26
.L463: 0x34185E26: 9804 LDR R0, [SP, #16] 0x34185E28: F8D0 0120 LDR.W R0, [R0, #0x0120] 0x34185E2C: F002 FDC4 BL LL_RCC_SetPSSIClockSource ; 0x341889B8
.L464: 0x34185E30: 9804 LDR R0, [SP, #16] 0x34185E32: 78C0 LDRB R0, [R0, #3] 0x34185E34: 06C0 LSLS R0, R0, #27 0x34185E36: 2800 CMP R0, #0 0x34185E38: F140 80FE BPL.W 46L481 ; 0x34186038 0x34185E3C: 9804 LDR R0, [SP, #16] 0x34185E3E: F8D0 0124 LDR.W R0, [R0, #0x0124] 0x34185E42: F241 4118 MOVW R1, #0x1418 0x34185E46: F2C0 7100 MOVT R1, #0x0700 0x34185E4A: 4288 CMP R0, R1 0x34185E4C: D03E BEQ 46L465 ; 0x34185ECC 0x34185E4E: 9804 LDR R0, [SP, #16] 0x34185E50: F8D0 0124 LDR.W R0, [R0, #0x0124] 0x34185E54: F241 4118 MOVW R1, #0x1418 0x34185E58: F2C0 7101 MOVT R1, #0x0701 0x34185E5C: 4288 CMP R0, R1 0x34185E5E: D035 BEQ 46L465 ; 0x34185ECC 0x34185E60: 9804 LDR R0, [SP, #16] 0x34185E62: F8D0 0124 LDR.W R0, [R0, #0x0124] 0x34185E66: F241 4118 MOVW R1, #0x1418 0x34185E6A: F2C0 7102 MOVT R1, #0x0702 0x34185E6E: 4288 CMP R0, R1 0x34185E70: D02C BEQ 46L465 ; 0x34185ECC 0x34185E72: 9804 LDR R0, [SP, #16] 0x34185E74: F8D0 0124 LDR.W R0, [R0, #0x0124] 0x34185E78: F241 4118 MOVW R1, #0x1418 0x34185E7C: F2C0 7103 MOVT R1, #0x0703 0x34185E80: 4288 CMP R0, R1 0x34185E82: D023 BEQ 46L465 ; 0x34185ECC 0x34185E84: 9804 LDR R0, [SP, #16] 0x34185E86: F8D0 0124 LDR.W R0, [R0, #0x0124] 0x34185E8A: F241 4118 MOVW R1, #0x1418 0x34185E8E: F2C0 7104 MOVT R1, #0x0704 0x34185E92: 4288 CMP R0, R1 0x34185E94: D01A BEQ 46L465 ; 0x34185ECC 0x34185E96: 9804 LDR R0, [SP, #16] 0x34185E98: F8D0 0124 LDR.W R0, [R0, #0x0124] 0x34185E9C: F241 4118 MOVW R1, #0x1418 0x34185EA0: F2C0 7105 MOVT R1, #0x0705 0x34185EA4: 4288 CMP R0, R1 0x34185EA6: D011 BEQ 46L465 ; 0x34185ECC 0x34185EA8: 9804 LDR R0, [SP, #16] 0x34185EAA: F8D0 0124 LDR.W R0, [R0, #0x0124] 0x34185EAE: F241 4118 MOVW R1, #0x1418 0x34185EB2: F2C0 7106 MOVT R1, #0x0706 0x34185EB6: 4288 CMP R0, R1 0x34185EB8: D008 BEQ 46L465 ; 0x34185ECC 0x34185EBA: 9804 LDR R0, [SP, #16] 0x34185EBC: F8D0 0124 LDR.W R0, [R0, #0x0124] 0x34185EC0: F241 4118 MOVW R1, #0x1418 0x34185EC4: F2C0 7107 MOVT R1, #0x0707 0x34185EC8: 4288 CMP R0, R1 0x34185ECA: D100 BNE 46L466 ; 0x34185ECE
.L465: 0x34185ECC: E007 B 46L467 ; 0x34185EDE
.L466: 0x34185ECE: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34185ED2: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34185ED6: F240 5186 MOVW R1, #0x0586 0x34185EDA: F007 FEDD BL assert_failed ; 0x3418DC98
.L467: 0x34185EDE: 9804 LDR R0, [SP, #16] 0x34185EE0: F8D0 0124 LDR.W R0, [R0, #0x0124] 0x34185EE4: F241 4118 MOVW R1, #0x1418 0x34185EE8: F2C0 7102 MOVT R1, #0x0702 0x34185EEC: 4288 CMP R0, R1 0x34185EEE: D144 BNE 46L473 ; 0x34185F7A 0x34185EF0: 9804 LDR R0, [SP, #16] 0x34185EF2: 6B80 LDR R0, [R0, #56] 0x34185EF4: B170 CBZ R0, .L468 ; 0x34185F14 0x34185EF6: 9804 LDR R0, [SP, #16] 0x34185EF8: 6B80 LDR R0, [R0, #56] 0x34185EFA: F1B0 5F80 CMP.W R0, #0x10000000 0x34185EFE: D009 BEQ 46L468 ; 0x34185F14 0x34185F00: 9804 LDR R0, [SP, #16] 0x34185F02: 6B80 LDR R0, [R0, #56] 0x34185F04: F1B0 5F00 CMP.W R0, #0x20000000 0x34185F08: D004 BEQ 46L468 ; 0x34185F14 0x34185F0A: 9804 LDR R0, [SP, #16] 0x34185F0C: 6B80 LDR R0, [R0, #56] 0x34185F0E: F1B0 5F40 CMP.W R0, #0x30000000 0x34185F12: D100 BNE 46L469 ; 0x34185F16
.L468: 0x34185F14: E007 B 46L470 ; 0x34185F26
.L469: 0x34185F16: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34185F1A: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34185F1E: F240 518B MOVW R1, #0x058B 0x34185F22: F007 FEB9 BL assert_failed ; 0x3418DC98
.L470: 0x34185F26: 9804 LDR R0, [SP, #16] 0x34185F28: 6BC0 LDR R0, [R0, #60] 0x34185F2A: B128 CBZ R0, .L471 ; 0x34185F38 0x34185F2C: 9804 LDR R0, [SP, #16] 0x34185F2E: 6BC0 LDR R0, [R0, #60] 0x34185F30: F5B0 7F80 CMP.W R0, #0x0100 0x34185F34: D800 BHI 46L471 ; 0x34185F38 0x34185F36: E007 B 46L472 ; 0x34185F48
.L471: 0x34185F38: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34185F3C: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34185F40: F240 518C MOVW R1, #0x058C 0x34185F44: F007 FEA8 BL assert_failed ; 0x3418DC98
.L472: 0x34185F48: F248 01DC MOVW R1, #0x80DC 0x34185F4C: F2C5 6102 MOVT R1, #0x5602 0x34185F50: 6808 LDR R0, [R1] 0x34185F52: F64F 72FF MOVW R2, #0xFFFF 0x34185F56: F6CC 7200 MOVT R2, #0xCF00 0x34185F5A: 4010 ANDS R0, R2 0x34185F5C: 9B04 LDR R3, [SP, #16] 0x34185F5E: 6B9A LDR R2, [R3, #56] 0x34185F60: F8D3 C03C LDR.W R12, [R3, #60] 0x34185F64: 2300 MOVS R3, #0 0x34185F66: F6CF 73FF MOVT R3, #0xFFFF 0x34185F6A: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34185F6E: 431A ORRS R2, R3 0x34185F70: 4310 ORRS R0, R2 0x34185F72: 6008 STR R0, [R1] 0x34185F74: F00A F97A BL LL_RCC_IC7_Enable ; 0x3419026C 0x34185F78: E059 B 46L480 ; 0x3418602E
.L473: 0x34185F7A: 9804 LDR R0, [SP, #16] 0x34185F7C: F8D0 0124 LDR.W R0, [R0, #0x0124] 0x34185F80: F241 4118 MOVW R1, #0x1418 0x34185F84: F2C0 7103 MOVT R1, #0x0703 0x34185F88: 4288 CMP R0, R1 0x34185F8A: D144 BNE 46L479 ; 0x34186016 0x34185F8C: 9804 LDR R0, [SP, #16] 0x34185F8E: 6C00 LDR R0, [R0, #64] 0x34185F90: B170 CBZ R0, .L474 ; 0x34185FB0 0x34185F92: 9804 LDR R0, [SP, #16] 0x34185F94: 6C00 LDR R0, [R0, #64] 0x34185F96: F1B0 5F80 CMP.W R0, #0x10000000 0x34185F9A: D009 BEQ 46L474 ; 0x34185FB0 0x34185F9C: 9804 LDR R0, [SP, #16] 0x34185F9E: 6C00 LDR R0, [R0, #64] 0x34185FA0: F1B0 5F00 CMP.W R0, #0x20000000 0x34185FA4: D004 BEQ 46L474 ; 0x34185FB0 0x34185FA6: 9804 LDR R0, [SP, #16] 0x34185FA8: 6C00 LDR R0, [R0, #64] 0x34185FAA: F1B0 5F40 CMP.W R0, #0x30000000 0x34185FAE: D100 BNE 46L475 ; 0x34185FB2
.L474: 0x34185FB0: E007 B 46L476 ; 0x34185FC2
.L475: 0x34185FB2: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34185FB6: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34185FBA: F44F 61B3 MOV.W R1, #0x0598 0x34185FBE: F007 FE6B BL assert_failed ; 0x3418DC98
.L476: 0x34185FC2: 9804 LDR R0, [SP, #16] 0x34185FC4: 6C40 LDR R0, [R0, #68] 0x34185FC6: B128 CBZ R0, .L477 ; 0x34185FD4 0x34185FC8: 9804 LDR R0, [SP, #16] 0x34185FCA: 6C40 LDR R0, [R0, #68] 0x34185FCC: F5B0 7F80 CMP.W R0, #0x0100 0x34185FD0: D800 BHI 46L477 ; 0x34185FD4 0x34185FD2: E007 B 46L478 ; 0x34185FE4
.L477: 0x34185FD4: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34185FD8: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34185FDC: F240 5199 MOVW R1, #0x0599 0x34185FE0: F007 FE5A BL assert_failed ; 0x3418DC98
.L478: 0x34185FE4: F248 01E0 MOVW R1, #0x80E0 0x34185FE8: F2C5 6102 MOVT R1, #0x5602 0x34185FEC: 6808 LDR R0, [R1] 0x34185FEE: F64F 72FF MOVW R2, #0xFFFF 0x34185FF2: F6CC 7200 MOVT R2, #0xCF00 0x34185FF6: 4010 ANDS R0, R2 0x34185FF8: 9B04 LDR R3, [SP, #16] 0x34185FFA: 6C1A LDR R2, [R3, #64] 0x34185FFC: F8D3 C044 LDR.W R12, [R3, #68] 0x34186000: 2300 MOVS R3, #0 0x34186002: F6CF 73FF MOVT R3, #0xFFFF 0x34186006: EB03 430C ADD.W R3, R3, R12, LSL #16 0x3418600A: 431A ORRS R2, R3 0x3418600C: 4310 ORRS R0, R2 0x3418600E: 6008 STR R0, [R1] 0x34186010: F00A F934 BL LL_RCC_IC8_Enable ; 0x3419027C 0x34186014: E00B B 46L480 ; 0x3418602E
.L479: 0x34186016: 9804 LDR R0, [SP, #16] 0x34186018: F8D0 0124 LDR.W R0, [R0, #0x0124] 0x3418601C: F241 4118 MOVW R1, #0x1418 0x34186020: F2C0 7101 MOVT R1, #0x0701 0x34186024: 4288 CMP R0, R1 0x34186026: D102 BNE 46L480 ; 0x3418602E 0x34186028: F00A F918 BL LL_RCC_CLKP_Enable ; 0x3419025C 0x3418602C: E7FF B 46L480 ; 0x3418602E
.L480: 0x3418602E: 9804 LDR R0, [SP, #16] 0x34186030: F8D0 0124 LDR.W R0, [R0, #0x0124] 0x34186034: F002 FCCE BL LL_RCC_SetSAIClockSource ; 0x341889D4
.L481: 0x34186038: 9804 LDR R0, [SP, #16] 0x3418603A: 78C0 LDRB R0, [R0, #3] 0x3418603C: 0680 LSLS R0, R0, #26 0x3418603E: 2800 CMP R0, #0 0x34186040: F140 80FE BPL.W 46L498 ; 0x34186240 0x34186044: 9804 LDR R0, [SP, #16] 0x34186046: F8D0 0128 LDR.W R0, [R0, #0x0128] 0x3418604A: F641 0118 MOVW R1, #0x1818 0x3418604E: F2C0 7100 MOVT R1, #0x0700 0x34186052: 4288 CMP R0, R1 0x34186054: D03E BEQ 46L482 ; 0x341860D4 0x34186056: 9804 LDR R0, [SP, #16] 0x34186058: F8D0 0128 LDR.W R0, [R0, #0x0128] 0x3418605C: F641 0118 MOVW R1, #0x1818 0x34186060: F2C0 7101 MOVT R1, #0x0701 0x34186064: 4288 CMP R0, R1 0x34186066: D035 BEQ 46L482 ; 0x341860D4 0x34186068: 9804 LDR R0, [SP, #16] 0x3418606A: F8D0 0128 LDR.W R0, [R0, #0x0128] 0x3418606E: F641 0118 MOVW R1, #0x1818 0x34186072: F2C0 7102 MOVT R1, #0x0702 0x34186076: 4288 CMP R0, R1 0x34186078: D02C BEQ 46L482 ; 0x341860D4 0x3418607A: 9804 LDR R0, [SP, #16] 0x3418607C: F8D0 0128 LDR.W R0, [R0, #0x0128] 0x34186080: F641 0118 MOVW R1, #0x1818 0x34186084: F2C0 7103 MOVT R1, #0x0703 0x34186088: 4288 CMP R0, R1 0x3418608A: D023 BEQ 46L482 ; 0x341860D4 0x3418608C: 9804 LDR R0, [SP, #16] 0x3418608E: F8D0 0128 LDR.W R0, [R0, #0x0128] 0x34186092: F641 0118 MOVW R1, #0x1818 0x34186096: F2C0 7104 MOVT R1, #0x0704 0x3418609A: 4288 CMP R0, R1 0x3418609C: D01A BEQ 46L482 ; 0x341860D4 0x3418609E: 9804 LDR R0, [SP, #16] 0x341860A0: F8D0 0128 LDR.W R0, [R0, #0x0128] 0x341860A4: F641 0118 MOVW R1, #0x1818 0x341860A8: F2C0 7105 MOVT R1, #0x0705 0x341860AC: 4288 CMP R0, R1 0x341860AE: D011 BEQ 46L482 ; 0x341860D4 0x341860B0: 9804 LDR R0, [SP, #16] 0x341860B2: F8D0 0128 LDR.W R0, [R0, #0x0128] 0x341860B6: F641 0118 MOVW R1, #0x1818 0x341860BA: F2C0 7106 MOVT R1, #0x0706 0x341860BE: 4288 CMP R0, R1 0x341860C0: D008 BEQ 46L482 ; 0x341860D4 0x341860C2: 9804 LDR R0, [SP, #16] 0x341860C4: F8D0 0128 LDR.W R0, [R0, #0x0128] 0x341860C8: F641 0118 MOVW R1, #0x1818 0x341860CC: F2C0 7107 MOVT R1, #0x0707 0x341860D0: 4288 CMP R0, R1 0x341860D2: D100 BNE 46L483 ; 0x341860D6
.L482: 0x341860D4: E007 B 46L484 ; 0x341860E6
.L483: 0x341860D6: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341860DA: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341860DE: F240 51B3 MOVW R1, #0x05B3 0x341860E2: F007 FDD9 BL assert_failed ; 0x3418DC98
.L484: 0x341860E6: 9804 LDR R0, [SP, #16] 0x341860E8: F8D0 0128 LDR.W R0, [R0, #0x0128] 0x341860EC: F641 0118 MOVW R1, #0x1818 0x341860F0: F2C0 7102 MOVT R1, #0x0702 0x341860F4: 4288 CMP R0, R1 0x341860F6: D144 BNE 46L490 ; 0x34186182 0x341860F8: 9804 LDR R0, [SP, #16] 0x341860FA: 6B80 LDR R0, [R0, #56] 0x341860FC: B170 CBZ R0, .L485 ; 0x3418611C 0x341860FE: 9804 LDR R0, [SP, #16] 0x34186100: 6B80 LDR R0, [R0, #56] 0x34186102: F1B0 5F80 CMP.W R0, #0x10000000 0x34186106: D009 BEQ 46L485 ; 0x3418611C 0x34186108: 9804 LDR R0, [SP, #16] 0x3418610A: 6B80 LDR R0, [R0, #56] 0x3418610C: F1B0 5F00 CMP.W R0, #0x20000000 0x34186110: D004 BEQ 46L485 ; 0x3418611C 0x34186112: 9804 LDR R0, [SP, #16] 0x34186114: 6B80 LDR R0, [R0, #56] 0x34186116: F1B0 5F40 CMP.W R0, #0x30000000 0x3418611A: D100 BNE 46L486 ; 0x3418611E
.L485: 0x3418611C: E007 B 46L487 ; 0x3418612E
.L486: 0x3418611E: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34186122: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34186126: F44F 61B7 MOV.W R1, #0x05B8 0x3418612A: F007 FDB5 BL assert_failed ; 0x3418DC98
.L487: 0x3418612E: 9804 LDR R0, [SP, #16] 0x34186130: 6BC0 LDR R0, [R0, #60] 0x34186132: B128 CBZ R0, .L488 ; 0x34186140 0x34186134: 9804 LDR R0, [SP, #16] 0x34186136: 6BC0 LDR R0, [R0, #60] 0x34186138: F5B0 7F80 CMP.W R0, #0x0100 0x3418613C: D800 BHI 46L488 ; 0x34186140 0x3418613E: E007 B 46L489 ; 0x34186150
.L488: 0x34186140: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34186144: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34186148: F240 51B9 MOVW R1, #0x05B9 0x3418614C: F007 FDA4 BL assert_failed ; 0x3418DC98
.L489: 0x34186150: F248 01DC MOVW R1, #0x80DC 0x34186154: F2C5 6102 MOVT R1, #0x5602 0x34186158: 6808 LDR R0, [R1] 0x3418615A: F64F 72FF MOVW R2, #0xFFFF 0x3418615E: F6CC 7200 MOVT R2, #0xCF00 0x34186162: 4010 ANDS R0, R2 0x34186164: 9B04 LDR R3, [SP, #16] 0x34186166: 6B9A LDR R2, [R3, #56] 0x34186168: F8D3 C03C LDR.W R12, [R3, #60] 0x3418616C: 2300 MOVS R3, #0 0x3418616E: F6CF 73FF MOVT R3, #0xFFFF 0x34186172: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34186176: 431A ORRS R2, R3 0x34186178: 4310 ORRS R0, R2 0x3418617A: 6008 STR R0, [R1] 0x3418617C: F00A F876 BL LL_RCC_IC7_Enable ; 0x3419026C 0x34186180: E059 B 46L497 ; 0x34186236
.L490: 0x34186182: 9804 LDR R0, [SP, #16] 0x34186184: F8D0 0128 LDR.W R0, [R0, #0x0128] 0x34186188: F641 0118 MOVW R1, #0x1818 0x3418618C: F2C0 7103 MOVT R1, #0x0703 0x34186190: 4288 CMP R0, R1 0x34186192: D144 BNE 46L496 ; 0x3418621E 0x34186194: 9804 LDR R0, [SP, #16] 0x34186196: 6C00 LDR R0, [R0, #64] 0x34186198: B170 CBZ R0, .L491 ; 0x341861B8 0x3418619A: 9804 LDR R0, [SP, #16] 0x3418619C: 6C00 LDR R0, [R0, #64] 0x3418619E: F1B0 5F80 CMP.W R0, #0x10000000 0x341861A2: D009 BEQ 46L491 ; 0x341861B8 0x341861A4: 9804 LDR R0, [SP, #16] 0x341861A6: 6C00 LDR R0, [R0, #64] 0x341861A8: F1B0 5F00 CMP.W R0, #0x20000000 0x341861AC: D004 BEQ 46L491 ; 0x341861B8 0x341861AE: 9804 LDR R0, [SP, #16] 0x341861B0: 6C00 LDR R0, [R0, #64] 0x341861B2: F1B0 5F40 CMP.W R0, #0x30000000 0x341861B6: D100 BNE 46L492 ; 0x341861BA
.L491: 0x341861B8: E007 B 46L493 ; 0x341861CA
.L492: 0x341861BA: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341861BE: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341861C2: F240 51C5 MOVW R1, #0x05C5 0x341861C6: F007 FD67 BL assert_failed ; 0x3418DC98
.L493: 0x341861CA: 9804 LDR R0, [SP, #16] 0x341861CC: 6C40 LDR R0, [R0, #68] 0x341861CE: B128 CBZ R0, .L494 ; 0x341861DC 0x341861D0: 9804 LDR R0, [SP, #16] 0x341861D2: 6C40 LDR R0, [R0, #68] 0x341861D4: F5B0 7F80 CMP.W R0, #0x0100 0x341861D8: D800 BHI 46L494 ; 0x341861DC 0x341861DA: E007 B 46L495 ; 0x341861EC
.L494: 0x341861DC: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341861E0: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341861E4: F240 51C6 MOVW R1, #0x05C6 0x341861E8: F007 FD56 BL assert_failed ; 0x3418DC98
.L495: 0x341861EC: F248 01E0 MOVW R1, #0x80E0 0x341861F0: F2C5 6102 MOVT R1, #0x5602 0x341861F4: 6808 LDR R0, [R1] 0x341861F6: F64F 72FF MOVW R2, #0xFFFF 0x341861FA: F6CC 7200 MOVT R2, #0xCF00 0x341861FE: 4010 ANDS R0, R2 0x34186200: 9B04 LDR R3, [SP, #16] 0x34186202: 6C1A LDR R2, [R3, #64] 0x34186204: F8D3 C044 LDR.W R12, [R3, #68] 0x34186208: 2300 MOVS R3, #0 0x3418620A: F6CF 73FF MOVT R3, #0xFFFF 0x3418620E: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34186212: 431A ORRS R2, R3 0x34186214: 4310 ORRS R0, R2 0x34186216: 6008 STR R0, [R1] 0x34186218: F00A F830 BL LL_RCC_IC8_Enable ; 0x3419027C 0x3418621C: E00B B 46L497 ; 0x34186236
.L496: 0x3418621E: 9804 LDR R0, [SP, #16] 0x34186220: F8D0 0128 LDR.W R0, [R0, #0x0128] 0x34186224: F641 0118 MOVW R1, #0x1818 0x34186228: F2C0 7101 MOVT R1, #0x0701 0x3418622C: 4288 CMP R0, R1 0x3418622E: D102 BNE 46L497 ; 0x34186236 0x34186230: F00A F814 BL LL_RCC_CLKP_Enable ; 0x3419025C 0x34186234: E7FF B 46L497 ; 0x34186236
.L497: 0x34186236: 9804 LDR R0, [SP, #16] 0x34186238: F8D0 0128 LDR.W R0, [R0, #0x0128] 0x3418623C: F002 FBCA BL LL_RCC_SetSAIClockSource ; 0x341889D4
.L498: 0x34186240: 9804 LDR R0, [SP, #16] 0x34186242: 7900 LDRB R0, [R0, #4] 0x34186244: 07C0 LSLS R0, R0, #31 0x34186246: 2800 CMP R0, #0 0x34186248: F000 80CC BEQ.W 46L515 ; 0x341863E4 0x3418624C: 9804 LDR R0, [SP, #16] 0x3418624E: F8D0 014C LDR.W R0, [R0, #0x014C] 0x34186252: B1E8 CBZ R0, .L499 ; 0x34186290 0x34186254: 9804 LDR R0, [SP, #16] 0x34186256: F8D0 014C LDR.W R0, [R0, #0x014C] 0x3418625A: 2801 CMP R0, #1 0x3418625C: D018 BEQ 46L499 ; 0x34186290 0x3418625E: 9804 LDR R0, [SP, #16] 0x34186260: F8D0 014C LDR.W R0, [R0, #0x014C] 0x34186264: 2802 CMP R0, #2 0x34186266: D013 BEQ 46L499 ; 0x34186290 0x34186268: 9804 LDR R0, [SP, #16] 0x3418626A: F8D0 014C LDR.W R0, [R0, #0x014C] 0x3418626E: 2803 CMP R0, #3 0x34186270: D00E BEQ 46L499 ; 0x34186290 0x34186272: 9804 LDR R0, [SP, #16] 0x34186274: F8D0 014C LDR.W R0, [R0, #0x014C] 0x34186278: 2804 CMP R0, #4 0x3418627A: D009 BEQ 46L499 ; 0x34186290 0x3418627C: 9804 LDR R0, [SP, #16] 0x3418627E: F8D0 014C LDR.W R0, [R0, #0x014C] 0x34186282: 2805 CMP R0, #5 0x34186284: D004 BEQ 46L499 ; 0x34186290 0x34186286: 9804 LDR R0, [SP, #16] 0x34186288: F8D0 014C LDR.W R0, [R0, #0x014C] 0x3418628C: 2806 CMP R0, #6 0x3418628E: D100 BNE 46L500 ; 0x34186292
.L499: 0x34186290: E007 B 46L501 ; 0x341862A2
.L500: 0x34186292: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34186296: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x3418629A: F44F 61BC MOV.W R1, #0x05E0 0x3418629E: F007 FCFB BL assert_failed ; 0x3418DC98
.L501: 0x341862A2: 9804 LDR R0, [SP, #16] 0x341862A4: F8D0 014C LDR.W R0, [R0, #0x014C] 0x341862A8: 2802 CMP R0, #2 0x341862AA: D144 BNE 46L507 ; 0x34186336 0x341862AC: 9804 LDR R0, [SP, #16] 0x341862AE: 6B80 LDR R0, [R0, #56] 0x341862B0: B170 CBZ R0, .L502 ; 0x341862D0 0x341862B2: 9804 LDR R0, [SP, #16] 0x341862B4: 6B80 LDR R0, [R0, #56] 0x341862B6: F1B0 5F80 CMP.W R0, #0x10000000 0x341862BA: D009 BEQ 46L502 ; 0x341862D0 0x341862BC: 9804 LDR R0, [SP, #16] 0x341862BE: 6B80 LDR R0, [R0, #56] 0x341862C0: F1B0 5F00 CMP.W R0, #0x20000000 0x341862C4: D004 BEQ 46L502 ; 0x341862D0 0x341862C6: 9804 LDR R0, [SP, #16] 0x341862C8: 6B80 LDR R0, [R0, #56] 0x341862CA: F1B0 5F40 CMP.W R0, #0x30000000 0x341862CE: D100 BNE 46L503 ; 0x341862D2
.L502: 0x341862D0: E007 B 46L504 ; 0x341862E2
.L503: 0x341862D2: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341862D6: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341862DA: F240 51E5 MOVW R1, #0x05E5 0x341862DE: F007 FCDB BL assert_failed ; 0x3418DC98
.L504: 0x341862E2: 9804 LDR R0, [SP, #16] 0x341862E4: 6BC0 LDR R0, [R0, #60] 0x341862E6: B128 CBZ R0, .L505 ; 0x341862F4 0x341862E8: 9804 LDR R0, [SP, #16] 0x341862EA: 6BC0 LDR R0, [R0, #60] 0x341862EC: F5B0 7F80 CMP.W R0, #0x0100 0x341862F0: D800 BHI 46L505 ; 0x341862F4 0x341862F2: E007 B 46L506 ; 0x34186304
.L505: 0x341862F4: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341862F8: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341862FC: F240 51E6 MOVW R1, #0x05E6 0x34186300: F007 FCCA BL assert_failed ; 0x3418DC98
.L506: 0x34186304: F248 01DC MOVW R1, #0x80DC 0x34186308: F2C5 6102 MOVT R1, #0x5602 0x3418630C: 6808 LDR R0, [R1] 0x3418630E: F64F 72FF MOVW R2, #0xFFFF 0x34186312: F6CC 7200 MOVT R2, #0xCF00 0x34186316: 4010 ANDS R0, R2 0x34186318: 9B04 LDR R3, [SP, #16] 0x3418631A: 6B9A LDR R2, [R3, #56] 0x3418631C: F8D3 C03C LDR.W R12, [R3, #60] 0x34186320: 2300 MOVS R3, #0 0x34186322: F6CF 73FF MOVT R3, #0xFFFF 0x34186326: EB03 430C ADD.W R3, R3, R12, LSL #16 0x3418632A: 431A ORRS R2, R3 0x3418632C: 4310 ORRS R0, R2 0x3418632E: 6008 STR R0, [R1] 0x34186330: F009 FF9C BL LL_RCC_IC7_Enable ; 0x3419026C 0x34186334: E051 B 46L514 ; 0x341863DA
.L507: 0x34186336: 9804 LDR R0, [SP, #16] 0x34186338: F8D0 014C LDR.W R0, [R0, #0x014C] 0x3418633C: 2803 CMP R0, #3 0x3418633E: D144 BNE 46L513 ; 0x341863CA 0x34186340: 9804 LDR R0, [SP, #16] 0x34186342: 6C00 LDR R0, [R0, #64] 0x34186344: B170 CBZ R0, .L508 ; 0x34186364 0x34186346: 9804 LDR R0, [SP, #16] 0x34186348: 6C00 LDR R0, [R0, #64] 0x3418634A: F1B0 5F80 CMP.W R0, #0x10000000 0x3418634E: D009 BEQ 46L508 ; 0x34186364 0x34186350: 9804 LDR R0, [SP, #16] 0x34186352: 6C00 LDR R0, [R0, #64] 0x34186354: F1B0 5F00 CMP.W R0, #0x20000000 0x34186358: D004 BEQ 46L508 ; 0x34186364 0x3418635A: 9804 LDR R0, [SP, #16] 0x3418635C: 6C00 LDR R0, [R0, #64] 0x3418635E: F1B0 5F40 CMP.W R0, #0x30000000 0x34186362: D100 BNE 46L509 ; 0x34186366
.L508: 0x34186364: E007 B 46L510 ; 0x34186376
.L509: 0x34186366: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x3418636A: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x3418636E: F240 51F2 MOVW R1, #0x05F2 0x34186372: F007 FC91 BL assert_failed ; 0x3418DC98
.L510: 0x34186376: 9804 LDR R0, [SP, #16] 0x34186378: 6C40 LDR R0, [R0, #68] 0x3418637A: B128 CBZ R0, .L511 ; 0x34186388 0x3418637C: 9804 LDR R0, [SP, #16] 0x3418637E: 6C40 LDR R0, [R0, #68] 0x34186380: F5B0 7F80 CMP.W R0, #0x0100 0x34186384: D800 BHI 46L511 ; 0x34186388 0x34186386: E007 B 46L512 ; 0x34186398
.L511: 0x34186388: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x3418638C: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34186390: F240 51F3 MOVW R1, #0x05F3 0x34186394: F007 FC80 BL assert_failed ; 0x3418DC98
.L512: 0x34186398: F248 01E0 MOVW R1, #0x80E0 0x3418639C: F2C5 6102 MOVT R1, #0x5602 0x341863A0: 6808 LDR R0, [R1] 0x341863A2: F64F 72FF MOVW R2, #0xFFFF 0x341863A6: F6CC 7200 MOVT R2, #0xCF00 0x341863AA: 4010 ANDS R0, R2 0x341863AC: 9B04 LDR R3, [SP, #16] 0x341863AE: 6C1A LDR R2, [R3, #64] 0x341863B0: F8D3 C044 LDR.W R12, [R3, #68] 0x341863B4: 2300 MOVS R3, #0 0x341863B6: F6CF 73FF MOVT R3, #0xFFFF 0x341863BA: EB03 430C ADD.W R3, R3, R12, LSL #16 0x341863BE: 431A ORRS R2, R3 0x341863C0: 4310 ORRS R0, R2 0x341863C2: 6008 STR R0, [R1] 0x341863C4: F009 FF5A BL LL_RCC_IC8_Enable ; 0x3419027C 0x341863C8: E007 B 46L514 ; 0x341863DA
.L513: 0x341863CA: 9804 LDR R0, [SP, #16] 0x341863CC: F8D0 014C LDR.W R0, [R0, #0x014C] 0x341863D0: 2801 CMP R0, #1 0x341863D2: D102 BNE 46L514 ; 0x341863DA 0x341863D4: F009 FF42 BL LL_RCC_CLKP_Enable ; 0x3419025C 0x341863D8: E7FF B 46L514 ; 0x341863DA
.L514: 0x341863DA: 9804 LDR R0, [SP, #16] 0x341863DC: F8D0 014C LDR.W R0, [R0, #0x014C] 0x341863E0: F002 FB00 BL LL_RCC_SetSPDIFRXClockSource ; 0x341889E4
.L515: 0x341863E4: 9804 LDR R0, [SP, #16] 0x341863E6: 7900 LDRB R0, [R0, #4] 0x341863E8: 0780 LSLS R0, R0, #30 0x341863EA: 2800 CMP R0, #0 0x341863EC: F140 80F5 BPL.W 46L532 ; 0x341865DA 0x341863F0: 9804 LDR R0, [SP, #16] 0x341863F2: F8D0 0134 LDR.W R0, [R0, #0x0134] 0x341863F6: F240 4120 MOVW R1, #0x0420 0x341863FA: F2C0 7100 MOVT R1, #0x0700 0x341863FE: 4288 CMP R0, R1 0x34186400: D035 BEQ 46L516 ; 0x3418646E 0x34186402: 9804 LDR R0, [SP, #16] 0x34186404: F8D0 0134 LDR.W R0, [R0, #0x0134] 0x34186408: F240 4120 MOVW R1, #0x0420 0x3418640C: F2C0 7101 MOVT R1, #0x0701 0x34186410: 4288 CMP R0, R1 0x34186412: D02C BEQ 46L516 ; 0x3418646E 0x34186414: 9804 LDR R0, [SP, #16] 0x34186416: F8D0 0134 LDR.W R0, [R0, #0x0134] 0x3418641A: F240 4120 MOVW R1, #0x0420 0x3418641E: F2C0 7102 MOVT R1, #0x0702 0x34186422: 4288 CMP R0, R1 0x34186424: D023 BEQ 46L516 ; 0x3418646E 0x34186426: 9804 LDR R0, [SP, #16] 0x34186428: F8D0 0134 LDR.W R0, [R0, #0x0134] 0x3418642C: F240 4120 MOVW R1, #0x0420 0x34186430: F2C0 7103 MOVT R1, #0x0703 0x34186434: 4288 CMP R0, R1 0x34186436: D01A BEQ 46L516 ; 0x3418646E 0x34186438: 9804 LDR R0, [SP, #16] 0x3418643A: F8D0 0134 LDR.W R0, [R0, #0x0134] 0x3418643E: F240 4120 MOVW R1, #0x0420 0x34186442: F2C0 7104 MOVT R1, #0x0704 0x34186446: 4288 CMP R0, R1 0x34186448: D011 BEQ 46L516 ; 0x3418646E 0x3418644A: 9804 LDR R0, [SP, #16] 0x3418644C: F8D0 0134 LDR.W R0, [R0, #0x0134] 0x34186450: F240 4120 MOVW R1, #0x0420 0x34186454: F2C0 7105 MOVT R1, #0x0705 0x34186458: 4288 CMP R0, R1 0x3418645A: D008 BEQ 46L516 ; 0x3418646E 0x3418645C: 9804 LDR R0, [SP, #16] 0x3418645E: F8D0 0134 LDR.W R0, [R0, #0x0134] 0x34186462: F240 4120 MOVW R1, #0x0420 0x34186466: F2C0 7106 MOVT R1, #0x0706 0x3418646A: 4288 CMP R0, R1 0x3418646C: D100 BNE 46L517 ; 0x34186470
.L516: 0x3418646E: E007 B 46L518 ; 0x34186480
.L517: 0x34186470: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34186474: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34186478: F240 610D MOVW R1, #0x060D 0x3418647C: F007 FC0C BL assert_failed ; 0x3418DC98
.L518: 0x34186480: 9804 LDR R0, [SP, #16] 0x34186482: F8D0 0134 LDR.W R0, [R0, #0x0134] 0x34186486: F240 4120 MOVW R1, #0x0420 0x3418648A: F2C0 7102 MOVT R1, #0x0702 0x3418648E: 4288 CMP R0, R1 0x34186490: D144 BNE 46L524 ; 0x3418651C 0x34186492: 9804 LDR R0, [SP, #16] 0x34186494: 6C00 LDR R0, [R0, #64] 0x34186496: B170 CBZ R0, .L519 ; 0x341864B6 0x34186498: 9804 LDR R0, [SP, #16] 0x3418649A: 6C00 LDR R0, [R0, #64] 0x3418649C: F1B0 5F80 CMP.W R0, #0x10000000 0x341864A0: D009 BEQ 46L519 ; 0x341864B6 0x341864A2: 9804 LDR R0, [SP, #16] 0x341864A4: 6C00 LDR R0, [R0, #64] 0x341864A6: F1B0 5F00 CMP.W R0, #0x20000000 0x341864AA: D004 BEQ 46L519 ; 0x341864B6 0x341864AC: 9804 LDR R0, [SP, #16] 0x341864AE: 6C00 LDR R0, [R0, #64] 0x341864B0: F1B0 5F40 CMP.W R0, #0x30000000 0x341864B4: D100 BNE 46L520 ; 0x341864B8
.L519: 0x341864B6: E007 B 46L521 ; 0x341864C8
.L520: 0x341864B8: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341864BC: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341864C0: F240 6112 MOVW R1, #0x0612 0x341864C4: F007 FBE8 BL assert_failed ; 0x3418DC98
.L521: 0x341864C8: 9804 LDR R0, [SP, #16] 0x341864CA: 6C40 LDR R0, [R0, #68] 0x341864CC: B128 CBZ R0, .L522 ; 0x341864DA 0x341864CE: 9804 LDR R0, [SP, #16] 0x341864D0: 6C40 LDR R0, [R0, #68] 0x341864D2: F5B0 7F80 CMP.W R0, #0x0100 0x341864D6: D800 BHI 46L522 ; 0x341864DA 0x341864D8: E007 B 46L523 ; 0x341864EA
.L522: 0x341864DA: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341864DE: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341864E2: F240 6113 MOVW R1, #0x0613 0x341864E6: F007 FBD7 BL assert_failed ; 0x3418DC98
.L523: 0x341864EA: F248 01E0 MOVW R1, #0x80E0 0x341864EE: F2C5 6102 MOVT R1, #0x5602 0x341864F2: 6808 LDR R0, [R1] 0x341864F4: F64F 72FF MOVW R2, #0xFFFF 0x341864F8: F6CC 7200 MOVT R2, #0xCF00 0x341864FC: 4010 ANDS R0, R2 0x341864FE: 9B04 LDR R3, [SP, #16] 0x34186500: 6C1A LDR R2, [R3, #64] 0x34186502: F8D3 C044 LDR.W R12, [R3, #68] 0x34186506: 2300 MOVS R3, #0 0x34186508: F6CF 73FF MOVT R3, #0xFFFF 0x3418650C: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34186510: 431A ORRS R2, R3 0x34186512: 4310 ORRS R0, R2 0x34186514: 6008 STR R0, [R1] 0x34186516: F009 FEB1 BL LL_RCC_IC8_Enable ; 0x3419027C 0x3418651A: E059 B 46L531 ; 0x341865D0
.L524: 0x3418651C: 9804 LDR R0, [SP, #16] 0x3418651E: F8D0 0134 LDR.W R0, [R0, #0x0134] 0x34186522: F240 4120 MOVW R1, #0x0420 0x34186526: F2C0 7103 MOVT R1, #0x0703 0x3418652A: 4288 CMP R0, R1 0x3418652C: D144 BNE 46L530 ; 0x341865B8 0x3418652E: 9804 LDR R0, [SP, #16] 0x34186530: 6C80 LDR R0, [R0, #72] 0x34186532: B170 CBZ R0, .L525 ; 0x34186552 0x34186534: 9804 LDR R0, [SP, #16] 0x34186536: 6C80 LDR R0, [R0, #72] 0x34186538: F1B0 5F80 CMP.W R0, #0x10000000 0x3418653C: D009 BEQ 46L525 ; 0x34186552 0x3418653E: 9804 LDR R0, [SP, #16] 0x34186540: 6C80 LDR R0, [R0, #72] 0x34186542: F1B0 5F00 CMP.W R0, #0x20000000 0x34186546: D004 BEQ 46L525 ; 0x34186552 0x34186548: 9804 LDR R0, [SP, #16] 0x3418654A: 6C80 LDR R0, [R0, #72] 0x3418654C: F1B0 5F40 CMP.W R0, #0x30000000 0x34186550: D100 BNE 46L526 ; 0x34186554
.L525: 0x34186552: E007 B 46L527 ; 0x34186564
.L526: 0x34186554: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34186558: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x3418655C: F240 611F MOVW R1, #0x061F 0x34186560: F007 FB9A BL assert_failed ; 0x3418DC98
.L527: 0x34186564: 9804 LDR R0, [SP, #16] 0x34186566: 6CC0 LDR R0, [R0, #76] 0x34186568: B128 CBZ R0, .L528 ; 0x34186576 0x3418656A: 9804 LDR R0, [SP, #16] 0x3418656C: 6CC0 LDR R0, [R0, #76] 0x3418656E: F5B0 7F80 CMP.W R0, #0x0100 0x34186572: D800 BHI 46L528 ; 0x34186576 0x34186574: E007 B 46L529 ; 0x34186586
.L528: 0x34186576: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x3418657A: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x3418657E: F44F 61C4 MOV.W R1, #0x0620 0x34186582: F007 FB89 BL assert_failed ; 0x3418DC98
.L529: 0x34186586: F248 01E4 MOVW R1, #0x80E4 0x3418658A: F2C5 6102 MOVT R1, #0x5602 0x3418658E: 6808 LDR R0, [R1] 0x34186590: F64F 72FF MOVW R2, #0xFFFF 0x34186594: F6CC 7200 MOVT R2, #0xCF00 0x34186598: 4010 ANDS R0, R2 0x3418659A: 9B04 LDR R3, [SP, #16] 0x3418659C: 6C9A LDR R2, [R3, #72] 0x3418659E: F8D3 C04C LDR.W R12, [R3, #76] 0x341865A2: 2300 MOVS R3, #0 0x341865A4: F6CF 73FF MOVT R3, #0xFFFF 0x341865A8: EB03 430C ADD.W R3, R3, R12, LSL #16 0x341865AC: 431A ORRS R2, R3 0x341865AE: 4310 ORRS R0, R2 0x341865B0: 6008 STR R0, [R1] 0x341865B2: F002 F9BF BL LL_RCC_IC9_Enable ; 0x34188934 0x341865B6: E00B B 46L531 ; 0x341865D0
.L530: 0x341865B8: 9804 LDR R0, [SP, #16] 0x341865BA: F8D0 0134 LDR.W R0, [R0, #0x0134] 0x341865BE: F240 4120 MOVW R1, #0x0420 0x341865C2: F2C0 7101 MOVT R1, #0x0701 0x341865C6: 4288 CMP R0, R1 0x341865C8: D102 BNE 46L531 ; 0x341865D0 0x341865CA: F009 FE47 BL LL_RCC_CLKP_Enable ; 0x3419025C 0x341865CE: E7FF B 46L531 ; 0x341865D0
.L531: 0x341865D0: 9804 LDR R0, [SP, #16] 0x341865D2: F8D0 0134 LDR.W R0, [R0, #0x0134] 0x341865D6: F002 FA13 BL LL_RCC_SetSPIClockSource ; 0x34188A00
.L532: 0x341865DA: 9804 LDR R0, [SP, #16] 0x341865DC: 7900 LDRB R0, [R0, #4] 0x341865DE: 0740 LSLS R0, R0, #29 0x341865E0: 2800 CMP R0, #0 0x341865E2: F140 80F5 BPL.W 46L549 ; 0x341867D0 0x341865E6: 9804 LDR R0, [SP, #16] 0x341865E8: F8D0 0138 LDR.W R0, [R0, #0x0138] 0x341865EC: F640 0120 MOVW R1, #0x0820 0x341865F0: F2C0 7100 MOVT R1, #0x0700 0x341865F4: 4288 CMP R0, R1 0x341865F6: D035 BEQ 46L533 ; 0x34186664 0x341865F8: 9804 LDR R0, [SP, #16] 0x341865FA: F8D0 0138 LDR.W R0, [R0, #0x0138] 0x341865FE: F640 0120 MOVW R1, #0x0820 0x34186602: F2C0 7101 MOVT R1, #0x0701 0x34186606: 4288 CMP R0, R1 0x34186608: D02C BEQ 46L533 ; 0x34186664 0x3418660A: 9804 LDR R0, [SP, #16] 0x3418660C: F8D0 0138 LDR.W R0, [R0, #0x0138] 0x34186610: F640 0120 MOVW R1, #0x0820 0x34186614: F2C0 7102 MOVT R1, #0x0702 0x34186618: 4288 CMP R0, R1 0x3418661A: D023 BEQ 46L533 ; 0x34186664 0x3418661C: 9804 LDR R0, [SP, #16] 0x3418661E: F8D0 0138 LDR.W R0, [R0, #0x0138] 0x34186622: F640 0120 MOVW R1, #0x0820 0x34186626: F2C0 7103 MOVT R1, #0x0703 0x3418662A: 4288 CMP R0, R1 0x3418662C: D01A BEQ 46L533 ; 0x34186664 0x3418662E: 9804 LDR R0, [SP, #16] 0x34186630: F8D0 0138 LDR.W R0, [R0, #0x0138] 0x34186634: F640 0120 MOVW R1, #0x0820 0x34186638: F2C0 7104 MOVT R1, #0x0704 0x3418663C: 4288 CMP R0, R1 0x3418663E: D011 BEQ 46L533 ; 0x34186664 0x34186640: 9804 LDR R0, [SP, #16] 0x34186642: F8D0 0138 LDR.W R0, [R0, #0x0138] 0x34186646: F640 0120 MOVW R1, #0x0820 0x3418664A: F2C0 7105 MOVT R1, #0x0705 0x3418664E: 4288 CMP R0, R1 0x34186650: D008 BEQ 46L533 ; 0x34186664 0x34186652: 9804 LDR R0, [SP, #16] 0x34186654: F8D0 0138 LDR.W R0, [R0, #0x0138] 0x34186658: F640 0120 MOVW R1, #0x0820 0x3418665C: F2C0 7106 MOVT R1, #0x0706 0x34186660: 4288 CMP R0, R1 0x34186662: D100 BNE 46L534 ; 0x34186666
.L533: 0x34186664: E007 B 46L535 ; 0x34186676
.L534: 0x34186666: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x3418666A: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x3418666E: F240 613A MOVW R1, #0x063A 0x34186672: F007 FB11 BL assert_failed ; 0x3418DC98
.L535: 0x34186676: 9804 LDR R0, [SP, #16] 0x34186678: F8D0 0138 LDR.W R0, [R0, #0x0138] 0x3418667C: F640 0120 MOVW R1, #0x0820 0x34186680: F2C0 7102 MOVT R1, #0x0702 0x34186684: 4288 CMP R0, R1 0x34186686: D144 BNE 46L541 ; 0x34186712 0x34186688: 9804 LDR R0, [SP, #16] 0x3418668A: 6C00 LDR R0, [R0, #64] 0x3418668C: B170 CBZ R0, .L536 ; 0x341866AC 0x3418668E: 9804 LDR R0, [SP, #16] 0x34186690: 6C00 LDR R0, [R0, #64] 0x34186692: F1B0 5F80 CMP.W R0, #0x10000000 0x34186696: D009 BEQ 46L536 ; 0x341866AC 0x34186698: 9804 LDR R0, [SP, #16] 0x3418669A: 6C00 LDR R0, [R0, #64] 0x3418669C: F1B0 5F00 CMP.W R0, #0x20000000 0x341866A0: D004 BEQ 46L536 ; 0x341866AC 0x341866A2: 9804 LDR R0, [SP, #16] 0x341866A4: 6C00 LDR R0, [R0, #64] 0x341866A6: F1B0 5F40 CMP.W R0, #0x30000000 0x341866AA: D100 BNE 46L537 ; 0x341866AE
.L536: 0x341866AC: E007 B 46L538 ; 0x341866BE
.L537: 0x341866AE: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341866B2: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341866B6: F240 613F MOVW R1, #0x063F 0x341866BA: F007 FAED BL assert_failed ; 0x3418DC98
.L538: 0x341866BE: 9804 LDR R0, [SP, #16] 0x341866C0: 6C40 LDR R0, [R0, #68] 0x341866C2: B128 CBZ R0, .L539 ; 0x341866D0 0x341866C4: 9804 LDR R0, [SP, #16] 0x341866C6: 6C40 LDR R0, [R0, #68] 0x341866C8: F5B0 7F80 CMP.W R0, #0x0100 0x341866CC: D800 BHI 46L539 ; 0x341866D0 0x341866CE: E007 B 46L540 ; 0x341866E0
.L539: 0x341866D0: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341866D4: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341866D8: F44F 61C8 MOV.W R1, #0x0640 0x341866DC: F007 FADC BL assert_failed ; 0x3418DC98
.L540: 0x341866E0: F248 01E0 MOVW R1, #0x80E0 0x341866E4: F2C5 6102 MOVT R1, #0x5602 0x341866E8: 6808 LDR R0, [R1] 0x341866EA: F64F 72FF MOVW R2, #0xFFFF 0x341866EE: F6CC 7200 MOVT R2, #0xCF00 0x341866F2: 4010 ANDS R0, R2 0x341866F4: 9B04 LDR R3, [SP, #16] 0x341866F6: 6C1A LDR R2, [R3, #64] 0x341866F8: F8D3 C044 LDR.W R12, [R3, #68] 0x341866FC: 2300 MOVS R3, #0 0x341866FE: F6CF 73FF MOVT R3, #0xFFFF 0x34186702: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34186706: 431A ORRS R2, R3 0x34186708: 4310 ORRS R0, R2 0x3418670A: 6008 STR R0, [R1] 0x3418670C: F009 FDB6 BL LL_RCC_IC8_Enable ; 0x3419027C 0x34186710: E059 B 46L548 ; 0x341867C6
.L541: 0x34186712: 9804 LDR R0, [SP, #16] 0x34186714: F8D0 0138 LDR.W R0, [R0, #0x0138] 0x34186718: F640 0120 MOVW R1, #0x0820 0x3418671C: F2C0 7103 MOVT R1, #0x0703 0x34186720: 4288 CMP R0, R1 0x34186722: D144 BNE 46L547 ; 0x341867AE 0x34186724: 9804 LDR R0, [SP, #16] 0x34186726: 6C80 LDR R0, [R0, #72] 0x34186728: B170 CBZ R0, .L542 ; 0x34186748 0x3418672A: 9804 LDR R0, [SP, #16] 0x3418672C: 6C80 LDR R0, [R0, #72] 0x3418672E: F1B0 5F80 CMP.W R0, #0x10000000 0x34186732: D009 BEQ 46L542 ; 0x34186748 0x34186734: 9804 LDR R0, [SP, #16] 0x34186736: 6C80 LDR R0, [R0, #72] 0x34186738: F1B0 5F00 CMP.W R0, #0x20000000 0x3418673C: D004 BEQ 46L542 ; 0x34186748 0x3418673E: 9804 LDR R0, [SP, #16] 0x34186740: 6C80 LDR R0, [R0, #72] 0x34186742: F1B0 5F40 CMP.W R0, #0x30000000 0x34186746: D100 BNE 46L543 ; 0x3418674A
.L542: 0x34186748: E007 B 46L544 ; 0x3418675A
.L543: 0x3418674A: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x3418674E: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34186752: F240 614C MOVW R1, #0x064C 0x34186756: F007 FA9F BL assert_failed ; 0x3418DC98
.L544: 0x3418675A: 9804 LDR R0, [SP, #16] 0x3418675C: 6CC0 LDR R0, [R0, #76] 0x3418675E: B128 CBZ R0, .L545 ; 0x3418676C 0x34186760: 9804 LDR R0, [SP, #16] 0x34186762: 6CC0 LDR R0, [R0, #76] 0x34186764: F5B0 7F80 CMP.W R0, #0x0100 0x34186768: D800 BHI 46L545 ; 0x3418676C 0x3418676A: E007 B 46L546 ; 0x3418677C
.L545: 0x3418676C: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34186770: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34186774: F240 614D MOVW R1, #0x064D 0x34186778: F007 FA8E BL assert_failed ; 0x3418DC98
.L546: 0x3418677C: F248 01E4 MOVW R1, #0x80E4 0x34186780: F2C5 6102 MOVT R1, #0x5602 0x34186784: 6808 LDR R0, [R1] 0x34186786: F64F 72FF MOVW R2, #0xFFFF 0x3418678A: F6CC 7200 MOVT R2, #0xCF00 0x3418678E: 4010 ANDS R0, R2 0x34186790: 9B04 LDR R3, [SP, #16] 0x34186792: 6C9A LDR R2, [R3, #72] 0x34186794: F8D3 C04C LDR.W R12, [R3, #76] 0x34186798: 2300 MOVS R3, #0 0x3418679A: F6CF 73FF MOVT R3, #0xFFFF 0x3418679E: EB03 430C ADD.W R3, R3, R12, LSL #16 0x341867A2: 431A ORRS R2, R3 0x341867A4: 4310 ORRS R0, R2 0x341867A6: 6008 STR R0, [R1] 0x341867A8: F002 F8C4 BL LL_RCC_IC9_Enable ; 0x34188934 0x341867AC: E00B B 46L548 ; 0x341867C6
.L547: 0x341867AE: 9804 LDR R0, [SP, #16] 0x341867B0: F8D0 0138 LDR.W R0, [R0, #0x0138] 0x341867B4: F640 0120 MOVW R1, #0x0820 0x341867B8: F2C0 7101 MOVT R1, #0x0701 0x341867BC: 4288 CMP R0, R1 0x341867BE: D102 BNE 46L548 ; 0x341867C6 0x341867C0: F009 FD4C BL LL_RCC_CLKP_Enable ; 0x3419025C 0x341867C4: E7FF B 46L548 ; 0x341867C6
.L548: 0x341867C6: 9804 LDR R0, [SP, #16] 0x341867C8: F8D0 0138 LDR.W R0, [R0, #0x0138] 0x341867CC: F002 F918 BL LL_RCC_SetSPIClockSource ; 0x34188A00
.L549: 0x341867D0: 9804 LDR R0, [SP, #16] 0x341867D2: 7900 LDRB R0, [R0, #4] 0x341867D4: 0700 LSLS R0, R0, #28 0x341867D6: 2800 CMP R0, #0 0x341867D8: F140 80F5 BPL.W 46L566 ; 0x341869C6 0x341867DC: 9804 LDR R0, [SP, #16] 0x341867DE: F8D0 013C LDR.W R0, [R0, #0x013C] 0x341867E2: F640 4120 MOVW R1, #0x0C20 0x341867E6: F2C0 7100 MOVT R1, #0x0700 0x341867EA: 4288 CMP R0, R1 0x341867EC: D035 BEQ 46L550 ; 0x3418685A 0x341867EE: 9804 LDR R0, [SP, #16] 0x341867F0: F8D0 013C LDR.W R0, [R0, #0x013C] 0x341867F4: F640 4120 MOVW R1, #0x0C20 0x341867F8: F2C0 7101 MOVT R1, #0x0701 0x341867FC: 4288 CMP R0, R1 0x341867FE: D02C BEQ 46L550 ; 0x3418685A 0x34186800: 9804 LDR R0, [SP, #16] 0x34186802: F8D0 013C LDR.W R0, [R0, #0x013C] 0x34186806: F640 4120 MOVW R1, #0x0C20 0x3418680A: F2C0 7102 MOVT R1, #0x0702 0x3418680E: 4288 CMP R0, R1 0x34186810: D023 BEQ 46L550 ; 0x3418685A 0x34186812: 9804 LDR R0, [SP, #16] 0x34186814: F8D0 013C LDR.W R0, [R0, #0x013C] 0x34186818: F640 4120 MOVW R1, #0x0C20 0x3418681C: F2C0 7103 MOVT R1, #0x0703 0x34186820: 4288 CMP R0, R1 0x34186822: D01A BEQ 46L550 ; 0x3418685A 0x34186824: 9804 LDR R0, [SP, #16] 0x34186826: F8D0 013C LDR.W R0, [R0, #0x013C] 0x3418682A: F640 4120 MOVW R1, #0x0C20 0x3418682E: F2C0 7104 MOVT R1, #0x0704 0x34186832: 4288 CMP R0, R1 0x34186834: D011 BEQ 46L550 ; 0x3418685A 0x34186836: 9804 LDR R0, [SP, #16] 0x34186838: F8D0 013C LDR.W R0, [R0, #0x013C] 0x3418683C: F640 4120 MOVW R1, #0x0C20 0x34186840: F2C0 7105 MOVT R1, #0x0705 0x34186844: 4288 CMP R0, R1 0x34186846: D008 BEQ 46L550 ; 0x3418685A 0x34186848: 9804 LDR R0, [SP, #16] 0x3418684A: F8D0 013C LDR.W R0, [R0, #0x013C] 0x3418684E: F640 4120 MOVW R1, #0x0C20 0x34186852: F2C0 7106 MOVT R1, #0x0706 0x34186856: 4288 CMP R0, R1 0x34186858: D100 BNE 46L551 ; 0x3418685C
.L550: 0x3418685A: E007 B 46L552 ; 0x3418686C
.L551: 0x3418685C: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34186860: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34186864: F240 6167 MOVW R1, #0x0667 0x34186868: F007 FA16 BL assert_failed ; 0x3418DC98
.L552: 0x3418686C: 9804 LDR R0, [SP, #16] 0x3418686E: F8D0 013C LDR.W R0, [R0, #0x013C] 0x34186872: F640 4120 MOVW R1, #0x0C20 0x34186876: F2C0 7102 MOVT R1, #0x0702 0x3418687A: 4288 CMP R0, R1 0x3418687C: D144 BNE 46L558 ; 0x34186908 0x3418687E: 9804 LDR R0, [SP, #16] 0x34186880: 6C00 LDR R0, [R0, #64] 0x34186882: B170 CBZ R0, .L553 ; 0x341868A2 0x34186884: 9804 LDR R0, [SP, #16] 0x34186886: 6C00 LDR R0, [R0, #64] 0x34186888: F1B0 5F80 CMP.W R0, #0x10000000 0x3418688C: D009 BEQ 46L553 ; 0x341868A2 0x3418688E: 9804 LDR R0, [SP, #16] 0x34186890: 6C00 LDR R0, [R0, #64] 0x34186892: F1B0 5F00 CMP.W R0, #0x20000000 0x34186896: D004 BEQ 46L553 ; 0x341868A2 0x34186898: 9804 LDR R0, [SP, #16] 0x3418689A: 6C00 LDR R0, [R0, #64] 0x3418689C: F1B0 5F40 CMP.W R0, #0x30000000 0x341868A0: D100 BNE 46L554 ; 0x341868A4
.L553: 0x341868A2: E007 B 46L555 ; 0x341868B4
.L554: 0x341868A4: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341868A8: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341868AC: F240 616C MOVW R1, #0x066C 0x341868B0: F007 F9F2 BL assert_failed ; 0x3418DC98
.L555: 0x341868B4: 9804 LDR R0, [SP, #16] 0x341868B6: 6C40 LDR R0, [R0, #68] 0x341868B8: B128 CBZ R0, .L556 ; 0x341868C6 0x341868BA: 9804 LDR R0, [SP, #16] 0x341868BC: 6C40 LDR R0, [R0, #68] 0x341868BE: F5B0 7F80 CMP.W R0, #0x0100 0x341868C2: D800 BHI 46L556 ; 0x341868C6 0x341868C4: E007 B 46L557 ; 0x341868D6
.L556: 0x341868C6: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341868CA: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341868CE: F240 616D MOVW R1, #0x066D 0x341868D2: F007 F9E1 BL assert_failed ; 0x3418DC98
.L557: 0x341868D6: F248 01E0 MOVW R1, #0x80E0 0x341868DA: F2C5 6102 MOVT R1, #0x5602 0x341868DE: 6808 LDR R0, [R1] 0x341868E0: F64F 72FF MOVW R2, #0xFFFF 0x341868E4: F6CC 7200 MOVT R2, #0xCF00 0x341868E8: 4010 ANDS R0, R2 0x341868EA: 9B04 LDR R3, [SP, #16] 0x341868EC: 6C1A LDR R2, [R3, #64] 0x341868EE: F8D3 C044 LDR.W R12, [R3, #68] 0x341868F2: 2300 MOVS R3, #0 0x341868F4: F6CF 73FF MOVT R3, #0xFFFF 0x341868F8: EB03 430C ADD.W R3, R3, R12, LSL #16 0x341868FC: 431A ORRS R2, R3 0x341868FE: 4310 ORRS R0, R2 0x34186900: 6008 STR R0, [R1] 0x34186902: F009 FCBB BL LL_RCC_IC8_Enable ; 0x3419027C 0x34186906: E059 B 46L565 ; 0x341869BC
.L558: 0x34186908: 9804 LDR R0, [SP, #16] 0x3418690A: F8D0 013C LDR.W R0, [R0, #0x013C] 0x3418690E: F640 4120 MOVW R1, #0x0C20 0x34186912: F2C0 7103 MOVT R1, #0x0703 0x34186916: 4288 CMP R0, R1 0x34186918: D144 BNE 46L564 ; 0x341869A4 0x3418691A: 9804 LDR R0, [SP, #16] 0x3418691C: 6C80 LDR R0, [R0, #72] 0x3418691E: B170 CBZ R0, .L559 ; 0x3418693E 0x34186920: 9804 LDR R0, [SP, #16] 0x34186922: 6C80 LDR R0, [R0, #72] 0x34186924: F1B0 5F80 CMP.W R0, #0x10000000 0x34186928: D009 BEQ 46L559 ; 0x3418693E 0x3418692A: 9804 LDR R0, [SP, #16] 0x3418692C: 6C80 LDR R0, [R0, #72] 0x3418692E: F1B0 5F00 CMP.W R0, #0x20000000 0x34186932: D004 BEQ 46L559 ; 0x3418693E 0x34186934: 9804 LDR R0, [SP, #16] 0x34186936: 6C80 LDR R0, [R0, #72] 0x34186938: F1B0 5F40 CMP.W R0, #0x30000000 0x3418693C: D100 BNE 46L560 ; 0x34186940
.L559: 0x3418693E: E007 B 46L561 ; 0x34186950
.L560: 0x34186940: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34186944: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34186948: F240 6179 MOVW R1, #0x0679 0x3418694C: F007 F9A4 BL assert_failed ; 0x3418DC98
.L561: 0x34186950: 9804 LDR R0, [SP, #16] 0x34186952: 6CC0 LDR R0, [R0, #76] 0x34186954: B128 CBZ R0, .L562 ; 0x34186962 0x34186956: 9804 LDR R0, [SP, #16] 0x34186958: 6CC0 LDR R0, [R0, #76] 0x3418695A: F5B0 7F80 CMP.W R0, #0x0100 0x3418695E: D800 BHI 46L562 ; 0x34186962 0x34186960: E007 B 46L563 ; 0x34186972
.L562: 0x34186962: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34186966: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x3418696A: F240 617A MOVW R1, #0x067A 0x3418696E: F007 F993 BL assert_failed ; 0x3418DC98
.L563: 0x34186972: F248 01E4 MOVW R1, #0x80E4 0x34186976: F2C5 6102 MOVT R1, #0x5602 0x3418697A: 6808 LDR R0, [R1] 0x3418697C: F64F 72FF MOVW R2, #0xFFFF 0x34186980: F6CC 7200 MOVT R2, #0xCF00 0x34186984: 4010 ANDS R0, R2 0x34186986: 9B04 LDR R3, [SP, #16] 0x34186988: 6C9A LDR R2, [R3, #72] 0x3418698A: F8D3 C04C LDR.W R12, [R3, #76] 0x3418698E: 2300 MOVS R3, #0 0x34186990: F6CF 73FF MOVT R3, #0xFFFF 0x34186994: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34186998: 431A ORRS R2, R3 0x3418699A: 4310 ORRS R0, R2 0x3418699C: 6008 STR R0, [R1] 0x3418699E: F001 FFC9 BL LL_RCC_IC9_Enable ; 0x34188934 0x341869A2: E00B B 46L565 ; 0x341869BC
.L564: 0x341869A4: 9804 LDR R0, [SP, #16] 0x341869A6: F8D0 013C LDR.W R0, [R0, #0x013C] 0x341869AA: F640 4120 MOVW R1, #0x0C20 0x341869AE: F2C0 7101 MOVT R1, #0x0701 0x341869B2: 4288 CMP R0, R1 0x341869B4: D102 BNE 46L565 ; 0x341869BC 0x341869B6: F009 FC51 BL LL_RCC_CLKP_Enable ; 0x3419025C 0x341869BA: E7FF B 46L565 ; 0x341869BC
.L565: 0x341869BC: 9804 LDR R0, [SP, #16] 0x341869BE: F8D0 013C LDR.W R0, [R0, #0x013C] 0x341869C2: F002 F81D BL LL_RCC_SetSPIClockSource ; 0x34188A00
.L566: 0x341869C6: 9804 LDR R0, [SP, #16] 0x341869C8: 7900 LDRB R0, [R0, #4] 0x341869CA: 06C0 LSLS R0, R0, #27 0x341869CC: 2800 CMP R0, #0 0x341869CE: F140 80F5 BPL.W 46L583 ; 0x34186BBC 0x341869D2: 9804 LDR R0, [SP, #16] 0x341869D4: F8D0 0140 LDR.W R0, [R0, #0x0140] 0x341869D8: F241 0120 MOVW R1, #0x1020 0x341869DC: F2C0 7100 MOVT R1, #0x0700 0x341869E0: 4288 CMP R0, R1 0x341869E2: D035 BEQ 46L567 ; 0x34186A50 0x341869E4: 9804 LDR R0, [SP, #16] 0x341869E6: F8D0 0140 LDR.W R0, [R0, #0x0140] 0x341869EA: F241 0120 MOVW R1, #0x1020 0x341869EE: F2C0 7101 MOVT R1, #0x0701 0x341869F2: 4288 CMP R0, R1 0x341869F4: D02C BEQ 46L567 ; 0x34186A50 0x341869F6: 9804 LDR R0, [SP, #16] 0x341869F8: F8D0 0140 LDR.W R0, [R0, #0x0140] 0x341869FC: F241 0120 MOVW R1, #0x1020 0x34186A00: F2C0 7102 MOVT R1, #0x0702 0x34186A04: 4288 CMP R0, R1 0x34186A06: D023 BEQ 46L567 ; 0x34186A50 0x34186A08: 9804 LDR R0, [SP, #16] 0x34186A0A: F8D0 0140 LDR.W R0, [R0, #0x0140] 0x34186A0E: F241 0120 MOVW R1, #0x1020 0x34186A12: F2C0 7103 MOVT R1, #0x0703 0x34186A16: 4288 CMP R0, R1 0x34186A18: D01A BEQ 46L567 ; 0x34186A50 0x34186A1A: 9804 LDR R0, [SP, #16] 0x34186A1C: F8D0 0140 LDR.W R0, [R0, #0x0140] 0x34186A20: F241 0120 MOVW R1, #0x1020 0x34186A24: F2C0 7104 MOVT R1, #0x0704 0x34186A28: 4288 CMP R0, R1 0x34186A2A: D011 BEQ 46L567 ; 0x34186A50 0x34186A2C: 9804 LDR R0, [SP, #16] 0x34186A2E: F8D0 0140 LDR.W R0, [R0, #0x0140] 0x34186A32: F241 0120 MOVW R1, #0x1020 0x34186A36: F2C0 7105 MOVT R1, #0x0705 0x34186A3A: 4288 CMP R0, R1 0x34186A3C: D008 BEQ 46L567 ; 0x34186A50 0x34186A3E: 9804 LDR R0, [SP, #16] 0x34186A40: F8D0 0140 LDR.W R0, [R0, #0x0140] 0x34186A44: F241 0120 MOVW R1, #0x1020 0x34186A48: F2C0 7106 MOVT R1, #0x0706 0x34186A4C: 4288 CMP R0, R1 0x34186A4E: D100 BNE 46L568 ; 0x34186A52
.L567: 0x34186A50: E007 B 46L569 ; 0x34186A62
.L568: 0x34186A52: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34186A56: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34186A5A: F240 6194 MOVW R1, #0x0694 0x34186A5E: F007 F91B BL assert_failed ; 0x3418DC98
.L569: 0x34186A62: 9804 LDR R0, [SP, #16] 0x34186A64: F8D0 0140 LDR.W R0, [R0, #0x0140] 0x34186A68: F241 0120 MOVW R1, #0x1020 0x34186A6C: F2C0 7102 MOVT R1, #0x0702 0x34186A70: 4288 CMP R0, R1 0x34186A72: D144 BNE 46L575 ; 0x34186AFE 0x34186A74: 9804 LDR R0, [SP, #16] 0x34186A76: 6C80 LDR R0, [R0, #72] 0x34186A78: B170 CBZ R0, .L570 ; 0x34186A98 0x34186A7A: 9804 LDR R0, [SP, #16] 0x34186A7C: 6C80 LDR R0, [R0, #72] 0x34186A7E: F1B0 5F80 CMP.W R0, #0x10000000 0x34186A82: D009 BEQ 46L570 ; 0x34186A98 0x34186A84: 9804 LDR R0, [SP, #16] 0x34186A86: 6C80 LDR R0, [R0, #72] 0x34186A88: F1B0 5F00 CMP.W R0, #0x20000000 0x34186A8C: D004 BEQ 46L570 ; 0x34186A98 0x34186A8E: 9804 LDR R0, [SP, #16] 0x34186A90: 6C80 LDR R0, [R0, #72] 0x34186A92: F1B0 5F40 CMP.W R0, #0x30000000 0x34186A96: D100 BNE 46L571 ; 0x34186A9A
.L570: 0x34186A98: E007 B 46L572 ; 0x34186AAA
.L571: 0x34186A9A: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34186A9E: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34186AA2: F240 6199 MOVW R1, #0x0699 0x34186AA6: F007 F8F7 BL assert_failed ; 0x3418DC98
.L572: 0x34186AAA: 9804 LDR R0, [SP, #16] 0x34186AAC: 6CC0 LDR R0, [R0, #76] 0x34186AAE: B128 CBZ R0, .L573 ; 0x34186ABC 0x34186AB0: 9804 LDR R0, [SP, #16] 0x34186AB2: 6CC0 LDR R0, [R0, #76] 0x34186AB4: F5B0 7F80 CMP.W R0, #0x0100 0x34186AB8: D800 BHI 46L573 ; 0x34186ABC 0x34186ABA: E007 B 46L574 ; 0x34186ACC
.L573: 0x34186ABC: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34186AC0: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34186AC4: F240 619A MOVW R1, #0x069A 0x34186AC8: F007 F8E6 BL assert_failed ; 0x3418DC98
.L574: 0x34186ACC: F248 01E4 MOVW R1, #0x80E4 0x34186AD0: F2C5 6102 MOVT R1, #0x5602 0x34186AD4: 6808 LDR R0, [R1] 0x34186AD6: F64F 72FF MOVW R2, #0xFFFF 0x34186ADA: F6CC 7200 MOVT R2, #0xCF00 0x34186ADE: 4010 ANDS R0, R2 0x34186AE0: 9B04 LDR R3, [SP, #16] 0x34186AE2: 6C9A LDR R2, [R3, #72] 0x34186AE4: F8D3 C04C LDR.W R12, [R3, #76] 0x34186AE8: 2300 MOVS R3, #0 0x34186AEA: F6CF 73FF MOVT R3, #0xFFFF 0x34186AEE: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34186AF2: 431A ORRS R2, R3 0x34186AF4: 4310 ORRS R0, R2 0x34186AF6: 6008 STR R0, [R1] 0x34186AF8: F001 FF1C BL LL_RCC_IC9_Enable ; 0x34188934 0x34186AFC: E059 B 46L582 ; 0x34186BB2
.L575: 0x34186AFE: 9804 LDR R0, [SP, #16] 0x34186B00: F8D0 0140 LDR.W R0, [R0, #0x0140] 0x34186B04: F241 0120 MOVW R1, #0x1020 0x34186B08: F2C0 7103 MOVT R1, #0x0703 0x34186B0C: 4288 CMP R0, R1 0x34186B0E: D144 BNE 46L581 ; 0x34186B9A 0x34186B10: 9804 LDR R0, [SP, #16] 0x34186B12: 6F00 LDR R0, [R0, #112] 0x34186B14: B170 CBZ R0, .L576 ; 0x34186B34 0x34186B16: 9804 LDR R0, [SP, #16] 0x34186B18: 6F00 LDR R0, [R0, #112] 0x34186B1A: F1B0 5F80 CMP.W R0, #0x10000000 0x34186B1E: D009 BEQ 46L576 ; 0x34186B34 0x34186B20: 9804 LDR R0, [SP, #16] 0x34186B22: 6F00 LDR R0, [R0, #112] 0x34186B24: F1B0 5F00 CMP.W R0, #0x20000000 0x34186B28: D004 BEQ 46L576 ; 0x34186B34 0x34186B2A: 9804 LDR R0, [SP, #16] 0x34186B2C: 6F00 LDR R0, [R0, #112] 0x34186B2E: F1B0 5F40 CMP.W R0, #0x30000000 0x34186B32: D100 BNE 46L577 ; 0x34186B36
.L576: 0x34186B34: E007 B 46L578 ; 0x34186B46
.L577: 0x34186B36: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34186B3A: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34186B3E: F240 61A6 MOVW R1, #0x06A6 0x34186B42: F007 F8A9 BL assert_failed ; 0x3418DC98
.L578: 0x34186B46: 9804 LDR R0, [SP, #16] 0x34186B48: 6F40 LDR R0, [R0, #116] 0x34186B4A: B128 CBZ R0, .L579 ; 0x34186B58 0x34186B4C: 9804 LDR R0, [SP, #16] 0x34186B4E: 6F40 LDR R0, [R0, #116] 0x34186B50: F5B0 7F80 CMP.W R0, #0x0100 0x34186B54: D800 BHI 46L579 ; 0x34186B58 0x34186B56: E007 B 46L580 ; 0x34186B68
.L579: 0x34186B58: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34186B5C: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34186B60: F240 61A7 MOVW R1, #0x06A7 0x34186B64: F007 F898 BL assert_failed ; 0x3418DC98
.L580: 0x34186B68: F248 01F8 MOVW R1, #0x80F8 0x34186B6C: F2C5 6102 MOVT R1, #0x5602 0x34186B70: 6808 LDR R0, [R1] 0x34186B72: F64F 72FF MOVW R2, #0xFFFF 0x34186B76: F6CC 7200 MOVT R2, #0xCF00 0x34186B7A: 4010 ANDS R0, R2 0x34186B7C: 9B04 LDR R3, [SP, #16] 0x34186B7E: 6F1A LDR R2, [R3, #112] 0x34186B80: F8D3 C074 LDR.W R12, [R3, #116] 0x34186B84: 2300 MOVS R3, #0 0x34186B86: F6CF 73FF MOVT R3, #0xFFFF 0x34186B8A: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34186B8E: 431A ORRS R2, R3 0x34186B90: 4310 ORRS R0, R2 0x34186B92: 6008 STR R0, [R1] 0x34186B94: F001 FED6 BL LL_RCC_IC14_Enable ; 0x34188944 0x34186B98: E00B B 46L582 ; 0x34186BB2
.L581: 0x34186B9A: 9804 LDR R0, [SP, #16] 0x34186B9C: F8D0 0140 LDR.W R0, [R0, #0x0140] 0x34186BA0: F241 0120 MOVW R1, #0x1020 0x34186BA4: F2C0 7101 MOVT R1, #0x0701 0x34186BA8: 4288 CMP R0, R1 0x34186BAA: D102 BNE 46L582 ; 0x34186BB2 0x34186BAC: F009 FB56 BL LL_RCC_CLKP_Enable ; 0x3419025C 0x34186BB0: E7FF B 46L582 ; 0x34186BB2
.L582: 0x34186BB2: 9804 LDR R0, [SP, #16] 0x34186BB4: F8D0 0140 LDR.W R0, [R0, #0x0140] 0x34186BB8: F001 FF22 BL LL_RCC_SetSPIClockSource ; 0x34188A00
.L583: 0x34186BBC: 9804 LDR R0, [SP, #16] 0x34186BBE: 7900 LDRB R0, [R0, #4] 0x34186BC0: 0680 LSLS R0, R0, #26 0x34186BC2: 2800 CMP R0, #0 0x34186BC4: F140 80F5 BPL.W 46L600 ; 0x34186DB2 0x34186BC8: 9804 LDR R0, [SP, #16] 0x34186BCA: F8D0 0144 LDR.W R0, [R0, #0x0144] 0x34186BCE: F241 4120 MOVW R1, #0x1420 0x34186BD2: F2C0 7100 MOVT R1, #0x0700 0x34186BD6: 4288 CMP R0, R1 0x34186BD8: D035 BEQ 46L584 ; 0x34186C46 0x34186BDA: 9804 LDR R0, [SP, #16] 0x34186BDC: F8D0 0144 LDR.W R0, [R0, #0x0144] 0x34186BE0: F241 4120 MOVW R1, #0x1420 0x34186BE4: F2C0 7101 MOVT R1, #0x0701 0x34186BE8: 4288 CMP R0, R1 0x34186BEA: D02C BEQ 46L584 ; 0x34186C46 0x34186BEC: 9804 LDR R0, [SP, #16] 0x34186BEE: F8D0 0144 LDR.W R0, [R0, #0x0144] 0x34186BF2: F241 4120 MOVW R1, #0x1420 0x34186BF6: F2C0 7102 MOVT R1, #0x0702 0x34186BFA: 4288 CMP R0, R1 0x34186BFC: D023 BEQ 46L584 ; 0x34186C46 0x34186BFE: 9804 LDR R0, [SP, #16] 0x34186C00: F8D0 0144 LDR.W R0, [R0, #0x0144] 0x34186C04: F241 4120 MOVW R1, #0x1420 0x34186C08: F2C0 7103 MOVT R1, #0x0703 0x34186C0C: 4288 CMP R0, R1 0x34186C0E: D01A BEQ 46L584 ; 0x34186C46 0x34186C10: 9804 LDR R0, [SP, #16] 0x34186C12: F8D0 0144 LDR.W R0, [R0, #0x0144] 0x34186C16: F241 4120 MOVW R1, #0x1420 0x34186C1A: F2C0 7104 MOVT R1, #0x0704 0x34186C1E: 4288 CMP R0, R1 0x34186C20: D011 BEQ 46L584 ; 0x34186C46 0x34186C22: 9804 LDR R0, [SP, #16] 0x34186C24: F8D0 0144 LDR.W R0, [R0, #0x0144] 0x34186C28: F241 4120 MOVW R1, #0x1420 0x34186C2C: F2C0 7105 MOVT R1, #0x0705 0x34186C30: 4288 CMP R0, R1 0x34186C32: D008 BEQ 46L584 ; 0x34186C46 0x34186C34: 9804 LDR R0, [SP, #16] 0x34186C36: F8D0 0144 LDR.W R0, [R0, #0x0144] 0x34186C3A: F241 4120 MOVW R1, #0x1420 0x34186C3E: F2C0 7106 MOVT R1, #0x0706 0x34186C42: 4288 CMP R0, R1 0x34186C44: D100 BNE 46L585 ; 0x34186C48
.L584: 0x34186C46: E007 B 46L586 ; 0x34186C58
.L585: 0x34186C48: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34186C4C: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34186C50: F240 61C1 MOVW R1, #0x06C1 0x34186C54: F007 F820 BL assert_failed ; 0x3418DC98
.L586: 0x34186C58: 9804 LDR R0, [SP, #16] 0x34186C5A: F8D0 0144 LDR.W R0, [R0, #0x0144] 0x34186C5E: F241 4120 MOVW R1, #0x1420 0x34186C62: F2C0 7102 MOVT R1, #0x0702 0x34186C66: 4288 CMP R0, R1 0x34186C68: D144 BNE 46L592 ; 0x34186CF4 0x34186C6A: 9804 LDR R0, [SP, #16] 0x34186C6C: 6C80 LDR R0, [R0, #72] 0x34186C6E: B170 CBZ R0, .L587 ; 0x34186C8E 0x34186C70: 9804 LDR R0, [SP, #16] 0x34186C72: 6C80 LDR R0, [R0, #72] 0x34186C74: F1B0 5F80 CMP.W R0, #0x10000000 0x34186C78: D009 BEQ 46L587 ; 0x34186C8E 0x34186C7A: 9804 LDR R0, [SP, #16] 0x34186C7C: 6C80 LDR R0, [R0, #72] 0x34186C7E: F1B0 5F00 CMP.W R0, #0x20000000 0x34186C82: D004 BEQ 46L587 ; 0x34186C8E 0x34186C84: 9804 LDR R0, [SP, #16] 0x34186C86: 6C80 LDR R0, [R0, #72] 0x34186C88: F1B0 5F40 CMP.W R0, #0x30000000 0x34186C8C: D100 BNE 46L588 ; 0x34186C90
.L587: 0x34186C8E: E007 B 46L589 ; 0x34186CA0
.L588: 0x34186C90: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34186C94: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34186C98: F240 61C6 MOVW R1, #0x06C6 0x34186C9C: F006 FFFC BL assert_failed ; 0x3418DC98
.L589: 0x34186CA0: 9804 LDR R0, [SP, #16] 0x34186CA2: 6CC0 LDR R0, [R0, #76] 0x34186CA4: B128 CBZ R0, .L590 ; 0x34186CB2 0x34186CA6: 9804 LDR R0, [SP, #16] 0x34186CA8: 6CC0 LDR R0, [R0, #76] 0x34186CAA: F5B0 7F80 CMP.W R0, #0x0100 0x34186CAE: D800 BHI 46L590 ; 0x34186CB2 0x34186CB0: E007 B 46L591 ; 0x34186CC2
.L590: 0x34186CB2: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34186CB6: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34186CBA: F240 61C7 MOVW R1, #0x06C7 0x34186CBE: F006 FFEB BL assert_failed ; 0x3418DC98
.L591: 0x34186CC2: F248 01E4 MOVW R1, #0x80E4 0x34186CC6: F2C5 6102 MOVT R1, #0x5602 0x34186CCA: 6808 LDR R0, [R1] 0x34186CCC: F64F 72FF MOVW R2, #0xFFFF 0x34186CD0: F6CC 7200 MOVT R2, #0xCF00 0x34186CD4: 4010 ANDS R0, R2 0x34186CD6: 9B04 LDR R3, [SP, #16] 0x34186CD8: 6C9A LDR R2, [R3, #72] 0x34186CDA: F8D3 C04C LDR.W R12, [R3, #76] 0x34186CDE: 2300 MOVS R3, #0 0x34186CE0: F6CF 73FF MOVT R3, #0xFFFF 0x34186CE4: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34186CE8: 431A ORRS R2, R3 0x34186CEA: 4310 ORRS R0, R2 0x34186CEC: 6008 STR R0, [R1] 0x34186CEE: F001 FE21 BL LL_RCC_IC9_Enable ; 0x34188934 0x34186CF2: E059 B 46L599 ; 0x34186DA8
.L592: 0x34186CF4: 9804 LDR R0, [SP, #16] 0x34186CF6: F8D0 0144 LDR.W R0, [R0, #0x0144] 0x34186CFA: F241 4120 MOVW R1, #0x1420 0x34186CFE: F2C0 7103 MOVT R1, #0x0703 0x34186D02: 4288 CMP R0, R1 0x34186D04: D144 BNE 46L598 ; 0x34186D90 0x34186D06: 9804 LDR R0, [SP, #16] 0x34186D08: 6F00 LDR R0, [R0, #112] 0x34186D0A: B170 CBZ R0, .L593 ; 0x34186D2A 0x34186D0C: 9804 LDR R0, [SP, #16] 0x34186D0E: 6F00 LDR R0, [R0, #112] 0x34186D10: F1B0 5F80 CMP.W R0, #0x10000000 0x34186D14: D009 BEQ 46L593 ; 0x34186D2A 0x34186D16: 9804 LDR R0, [SP, #16] 0x34186D18: 6F00 LDR R0, [R0, #112] 0x34186D1A: F1B0 5F00 CMP.W R0, #0x20000000 0x34186D1E: D004 BEQ 46L593 ; 0x34186D2A 0x34186D20: 9804 LDR R0, [SP, #16] 0x34186D22: 6F00 LDR R0, [R0, #112] 0x34186D24: F1B0 5F40 CMP.W R0, #0x30000000 0x34186D28: D100 BNE 46L594 ; 0x34186D2C
.L593: 0x34186D2A: E007 B 46L595 ; 0x34186D3C
.L594: 0x34186D2C: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34186D30: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34186D34: F240 61D3 MOVW R1, #0x06D3 0x34186D38: F006 FFAE BL assert_failed ; 0x3418DC98
.L595: 0x34186D3C: 9804 LDR R0, [SP, #16] 0x34186D3E: 6F40 LDR R0, [R0, #116] 0x34186D40: B128 CBZ R0, .L596 ; 0x34186D4E 0x34186D42: 9804 LDR R0, [SP, #16] 0x34186D44: 6F40 LDR R0, [R0, #116] 0x34186D46: F5B0 7F80 CMP.W R0, #0x0100 0x34186D4A: D800 BHI 46L596 ; 0x34186D4E 0x34186D4C: E007 B 46L597 ; 0x34186D5E
.L596: 0x34186D4E: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34186D52: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34186D56: F240 61D4 MOVW R1, #0x06D4 0x34186D5A: F006 FF9D BL assert_failed ; 0x3418DC98
.L597: 0x34186D5E: F248 01F8 MOVW R1, #0x80F8 0x34186D62: F2C5 6102 MOVT R1, #0x5602 0x34186D66: 6808 LDR R0, [R1] 0x34186D68: F64F 72FF MOVW R2, #0xFFFF 0x34186D6C: F6CC 7200 MOVT R2, #0xCF00 0x34186D70: 4010 ANDS R0, R2 0x34186D72: 9B04 LDR R3, [SP, #16] 0x34186D74: 6F1A LDR R2, [R3, #112] 0x34186D76: F8D3 C074 LDR.W R12, [R3, #116] 0x34186D7A: 2300 MOVS R3, #0 0x34186D7C: F6CF 73FF MOVT R3, #0xFFFF 0x34186D80: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34186D84: 431A ORRS R2, R3 0x34186D86: 4310 ORRS R0, R2 0x34186D88: 6008 STR R0, [R1] 0x34186D8A: F001 FDDB BL LL_RCC_IC14_Enable ; 0x34188944 0x34186D8E: E00B B 46L599 ; 0x34186DA8
.L598: 0x34186D90: 9804 LDR R0, [SP, #16] 0x34186D92: F8D0 0144 LDR.W R0, [R0, #0x0144] 0x34186D96: F241 4120 MOVW R1, #0x1420 0x34186D9A: F2C0 7101 MOVT R1, #0x0701 0x34186D9E: 4288 CMP R0, R1 0x34186DA0: D102 BNE 46L599 ; 0x34186DA8 0x34186DA2: F009 FA5B BL LL_RCC_CLKP_Enable ; 0x3419025C 0x34186DA6: E7FF B 46L599 ; 0x34186DA8
.L599: 0x34186DA8: 9804 LDR R0, [SP, #16] 0x34186DAA: F8D0 0144 LDR.W R0, [R0, #0x0144] 0x34186DAE: F001 FE27 BL LL_RCC_SetSPIClockSource ; 0x34188A00
.L600: 0x34186DB2: 9804 LDR R0, [SP, #16] 0x34186DB4: 7900 LDRB R0, [R0, #4] 0x34186DB6: 0640 LSLS R0, R0, #25 0x34186DB8: 2800 CMP R0, #0 0x34186DBA: F140 80F5 BPL.W 46L617 ; 0x34186FA8 0x34186DBE: 9804 LDR R0, [SP, #16] 0x34186DC0: F8D0 0148 LDR.W R0, [R0, #0x0148] 0x34186DC4: F641 0120 MOVW R1, #0x1820 0x34186DC8: F2C0 7100 MOVT R1, #0x0700 0x34186DCC: 4288 CMP R0, R1 0x34186DCE: D035 BEQ 46L601 ; 0x34186E3C 0x34186DD0: 9804 LDR R0, [SP, #16] 0x34186DD2: F8D0 0148 LDR.W R0, [R0, #0x0148] 0x34186DD6: F641 0120 MOVW R1, #0x1820 0x34186DDA: F2C0 7101 MOVT R1, #0x0701 0x34186DDE: 4288 CMP R0, R1 0x34186DE0: D02C BEQ 46L601 ; 0x34186E3C 0x34186DE2: 9804 LDR R0, [SP, #16] 0x34186DE4: F8D0 0148 LDR.W R0, [R0, #0x0148] 0x34186DE8: F641 0120 MOVW R1, #0x1820 0x34186DEC: F2C0 7102 MOVT R1, #0x0702 0x34186DF0: 4288 CMP R0, R1 0x34186DF2: D023 BEQ 46L601 ; 0x34186E3C 0x34186DF4: 9804 LDR R0, [SP, #16] 0x34186DF6: F8D0 0148 LDR.W R0, [R0, #0x0148] 0x34186DFA: F641 0120 MOVW R1, #0x1820 0x34186DFE: F2C0 7103 MOVT R1, #0x0703 0x34186E02: 4288 CMP R0, R1 0x34186E04: D01A BEQ 46L601 ; 0x34186E3C 0x34186E06: 9804 LDR R0, [SP, #16] 0x34186E08: F8D0 0148 LDR.W R0, [R0, #0x0148] 0x34186E0C: F641 0120 MOVW R1, #0x1820 0x34186E10: F2C0 7104 MOVT R1, #0x0704 0x34186E14: 4288 CMP R0, R1 0x34186E16: D011 BEQ 46L601 ; 0x34186E3C 0x34186E18: 9804 LDR R0, [SP, #16] 0x34186E1A: F8D0 0148 LDR.W R0, [R0, #0x0148] 0x34186E1E: F641 0120 MOVW R1, #0x1820 0x34186E22: F2C0 7105 MOVT R1, #0x0705 0x34186E26: 4288 CMP R0, R1 0x34186E28: D008 BEQ 46L601 ; 0x34186E3C 0x34186E2A: 9804 LDR R0, [SP, #16] 0x34186E2C: F8D0 0148 LDR.W R0, [R0, #0x0148] 0x34186E30: F641 0120 MOVW R1, #0x1820 0x34186E34: F2C0 7106 MOVT R1, #0x0706 0x34186E38: 4288 CMP R0, R1 0x34186E3A: D100 BNE 46L602 ; 0x34186E3E
.L601: 0x34186E3C: E007 B 46L603 ; 0x34186E4E
.L602: 0x34186E3E: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34186E42: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34186E46: F240 61EE MOVW R1, #0x06EE 0x34186E4A: F006 FF25 BL assert_failed ; 0x3418DC98
.L603: 0x34186E4E: 9804 LDR R0, [SP, #16] 0x34186E50: F8D0 0148 LDR.W R0, [R0, #0x0148] 0x34186E54: F641 0120 MOVW R1, #0x1820 0x34186E58: F2C0 7102 MOVT R1, #0x0702 0x34186E5C: 4288 CMP R0, R1 0x34186E5E: D144 BNE 46L609 ; 0x34186EEA 0x34186E60: 9804 LDR R0, [SP, #16] 0x34186E62: 6C00 LDR R0, [R0, #64] 0x34186E64: B170 CBZ R0, .L604 ; 0x34186E84 0x34186E66: 9804 LDR R0, [SP, #16] 0x34186E68: 6C00 LDR R0, [R0, #64] 0x34186E6A: F1B0 5F80 CMP.W R0, #0x10000000 0x34186E6E: D009 BEQ 46L604 ; 0x34186E84 0x34186E70: 9804 LDR R0, [SP, #16] 0x34186E72: 6C00 LDR R0, [R0, #64] 0x34186E74: F1B0 5F00 CMP.W R0, #0x20000000 0x34186E78: D004 BEQ 46L604 ; 0x34186E84 0x34186E7A: 9804 LDR R0, [SP, #16] 0x34186E7C: 6C00 LDR R0, [R0, #64] 0x34186E7E: F1B0 5F40 CMP.W R0, #0x30000000 0x34186E82: D100 BNE 46L605 ; 0x34186E86
.L604: 0x34186E84: E007 B 46L606 ; 0x34186E96
.L605: 0x34186E86: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34186E8A: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34186E8E: F240 61F3 MOVW R1, #0x06F3 0x34186E92: F006 FF01 BL assert_failed ; 0x3418DC98
.L606: 0x34186E96: 9804 LDR R0, [SP, #16] 0x34186E98: 6C40 LDR R0, [R0, #68] 0x34186E9A: B128 CBZ R0, .L607 ; 0x34186EA8 0x34186E9C: 9804 LDR R0, [SP, #16] 0x34186E9E: 6C40 LDR R0, [R0, #68] 0x34186EA0: F5B0 7F80 CMP.W R0, #0x0100 0x34186EA4: D800 BHI 46L607 ; 0x34186EA8 0x34186EA6: E007 B 46L608 ; 0x34186EB8
.L607: 0x34186EA8: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34186EAC: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34186EB0: F240 61F4 MOVW R1, #0x06F4 0x34186EB4: F006 FEF0 BL assert_failed ; 0x3418DC98
.L608: 0x34186EB8: F248 01E0 MOVW R1, #0x80E0 0x34186EBC: F2C5 6102 MOVT R1, #0x5602 0x34186EC0: 6808 LDR R0, [R1] 0x34186EC2: F64F 72FF MOVW R2, #0xFFFF 0x34186EC6: F6CC 7200 MOVT R2, #0xCF00 0x34186ECA: 4010 ANDS R0, R2 0x34186ECC: 9B04 LDR R3, [SP, #16] 0x34186ECE: 6C1A LDR R2, [R3, #64] 0x34186ED0: F8D3 C044 LDR.W R12, [R3, #68] 0x34186ED4: 2300 MOVS R3, #0 0x34186ED6: F6CF 73FF MOVT R3, #0xFFFF 0x34186EDA: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34186EDE: 431A ORRS R2, R3 0x34186EE0: 4310 ORRS R0, R2 0x34186EE2: 6008 STR R0, [R1] 0x34186EE4: F009 F9CA BL LL_RCC_IC8_Enable ; 0x3419027C 0x34186EE8: E059 B 46L616 ; 0x34186F9E
.L609: 0x34186EEA: 9804 LDR R0, [SP, #16] 0x34186EEC: F8D0 0148 LDR.W R0, [R0, #0x0148] 0x34186EF0: F641 0120 MOVW R1, #0x1820 0x34186EF4: F2C0 7103 MOVT R1, #0x0703 0x34186EF8: 4288 CMP R0, R1 0x34186EFA: D144 BNE 46L615 ; 0x34186F86 0x34186EFC: 9804 LDR R0, [SP, #16] 0x34186EFE: 6C80 LDR R0, [R0, #72] 0x34186F00: B170 CBZ R0, .L610 ; 0x34186F20 0x34186F02: 9804 LDR R0, [SP, #16] 0x34186F04: 6C80 LDR R0, [R0, #72] 0x34186F06: F1B0 5F80 CMP.W R0, #0x10000000 0x34186F0A: D009 BEQ 46L610 ; 0x34186F20 0x34186F0C: 9804 LDR R0, [SP, #16] 0x34186F0E: 6C80 LDR R0, [R0, #72] 0x34186F10: F1B0 5F00 CMP.W R0, #0x20000000 0x34186F14: D004 BEQ 46L610 ; 0x34186F20 0x34186F16: 9804 LDR R0, [SP, #16] 0x34186F18: 6C80 LDR R0, [R0, #72] 0x34186F1A: F1B0 5F40 CMP.W R0, #0x30000000 0x34186F1E: D100 BNE 46L611 ; 0x34186F22
.L610: 0x34186F20: E007 B 46L612 ; 0x34186F32
.L611: 0x34186F22: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34186F26: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34186F2A: F44F 61E0 MOV.W R1, #0x0700 0x34186F2E: F006 FEB3 BL assert_failed ; 0x3418DC98
.L612: 0x34186F32: 9804 LDR R0, [SP, #16] 0x34186F34: 6CC0 LDR R0, [R0, #76] 0x34186F36: B128 CBZ R0, .L613 ; 0x34186F44 0x34186F38: 9804 LDR R0, [SP, #16] 0x34186F3A: 6CC0 LDR R0, [R0, #76] 0x34186F3C: F5B0 7F80 CMP.W R0, #0x0100 0x34186F40: D800 BHI 46L613 ; 0x34186F44 0x34186F42: E007 B 46L614 ; 0x34186F54
.L613: 0x34186F44: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34186F48: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34186F4C: F240 7101 MOVW R1, #0x0701 0x34186F50: F006 FEA2 BL assert_failed ; 0x3418DC98
.L614: 0x34186F54: F248 01E4 MOVW R1, #0x80E4 0x34186F58: F2C5 6102 MOVT R1, #0x5602 0x34186F5C: 6808 LDR R0, [R1] 0x34186F5E: F64F 72FF MOVW R2, #0xFFFF 0x34186F62: F6CC 7200 MOVT R2, #0xCF00 0x34186F66: 4010 ANDS R0, R2 0x34186F68: 9B04 LDR R3, [SP, #16] 0x34186F6A: 6C9A LDR R2, [R3, #72] 0x34186F6C: F8D3 C04C LDR.W R12, [R3, #76] 0x34186F70: 2300 MOVS R3, #0 0x34186F72: F6CF 73FF MOVT R3, #0xFFFF 0x34186F76: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34186F7A: 431A ORRS R2, R3 0x34186F7C: 4310 ORRS R0, R2 0x34186F7E: 6008 STR R0, [R1] 0x34186F80: F001 FCD8 BL LL_RCC_IC9_Enable ; 0x34188934 0x34186F84: E00B B 46L616 ; 0x34186F9E
.L615: 0x34186F86: 9804 LDR R0, [SP, #16] 0x34186F88: F8D0 0148 LDR.W R0, [R0, #0x0148] 0x34186F8C: F641 0120 MOVW R1, #0x1820 0x34186F90: F2C0 7101 MOVT R1, #0x0701 0x34186F94: 4288 CMP R0, R1 0x34186F96: D102 BNE 46L616 ; 0x34186F9E 0x34186F98: F009 F960 BL LL_RCC_CLKP_Enable ; 0x3419025C 0x34186F9C: E7FF B 46L616 ; 0x34186F9E
.L616: 0x34186F9E: 9804 LDR R0, [SP, #16] 0x34186FA0: F8D0 0148 LDR.W R0, [R0, #0x0148] 0x34186FA4: F001 FD2C BL LL_RCC_SetSPIClockSource ; 0x34188A00
.L617: 0x34186FA8: 9804 LDR R0, [SP, #16] 0x34186FAA: 7940 LDRB R0, [R0, #5] 0x34186FAC: 07C0 LSLS R0, R0, #31 0x34186FAE: 2800 CMP R0, #0 0x34186FB0: F000 80EB BEQ.W 46L634 ; 0x3418718A 0x34186FB4: 9804 LDR R0, [SP, #16] 0x34186FB6: F8D0 0150 LDR.W R0, [R0, #0x0150] 0x34186FBA: 2130 MOVS R1, #48 0x34186FBC: F2C0 7100 MOVT R1, #0x0700 0x34186FC0: 4288 CMP R0, R1 0x34186FC2: D02F BEQ 46L618 ; 0x34187024 0x34186FC4: 9804 LDR R0, [SP, #16] 0x34186FC6: F8D0 0150 LDR.W R0, [R0, #0x0150] 0x34186FCA: 2130 MOVS R1, #48 0x34186FCC: F2C0 7101 MOVT R1, #0x0701 0x34186FD0: 4288 CMP R0, R1 0x34186FD2: D027 BEQ 46L618 ; 0x34187024 0x34186FD4: 9804 LDR R0, [SP, #16] 0x34186FD6: F8D0 0150 LDR.W R0, [R0, #0x0150] 0x34186FDA: 2130 MOVS R1, #48 0x34186FDC: F2C0 7102 MOVT R1, #0x0702 0x34186FE0: 4288 CMP R0, R1 0x34186FE2: D01F BEQ 46L618 ; 0x34187024 0x34186FE4: 9804 LDR R0, [SP, #16] 0x34186FE6: F8D0 0150 LDR.W R0, [R0, #0x0150] 0x34186FEA: 2130 MOVS R1, #48 0x34186FEC: F2C0 7103 MOVT R1, #0x0703 0x34186FF0: 4288 CMP R0, R1 0x34186FF2: D017 BEQ 46L618 ; 0x34187024 0x34186FF4: 9804 LDR R0, [SP, #16] 0x34186FF6: F8D0 0150 LDR.W R0, [R0, #0x0150] 0x34186FFA: 2130 MOVS R1, #48 0x34186FFC: F2C0 7104 MOVT R1, #0x0704 0x34187000: 4288 CMP R0, R1 0x34187002: D00F BEQ 46L618 ; 0x34187024 0x34187004: 9804 LDR R0, [SP, #16] 0x34187006: F8D0 0150 LDR.W R0, [R0, #0x0150] 0x3418700A: 2130 MOVS R1, #48 0x3418700C: F2C0 7105 MOVT R1, #0x0705 0x34187010: 4288 CMP R0, R1 0x34187012: D007 BEQ 46L618 ; 0x34187024 0x34187014: 9804 LDR R0, [SP, #16] 0x34187016: F8D0 0150 LDR.W R0, [R0, #0x0150] 0x3418701A: 2130 MOVS R1, #48 0x3418701C: F2C0 7106 MOVT R1, #0x0706 0x34187020: 4288 CMP R0, R1 0x34187022: D100 BNE 46L619 ; 0x34187026
.L618: 0x34187024: E007 B 46L620 ; 0x34187036
.L619: 0x34187026: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x3418702A: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x3418702E: F240 711B MOVW R1, #0x071B 0x34187032: F006 FE31 BL assert_failed ; 0x3418DC98
.L620: 0x34187036: 9804 LDR R0, [SP, #16] 0x34187038: F8D0 0150 LDR.W R0, [R0, #0x0150] 0x3418703C: 2130 MOVS R1, #48 0x3418703E: F2C0 7102 MOVT R1, #0x0702 0x34187042: 4288 CMP R0, R1 0x34187044: D144 BNE 46L626 ; 0x341870D0 0x34187046: 9804 LDR R0, [SP, #16] 0x34187048: 6C80 LDR R0, [R0, #72] 0x3418704A: B170 CBZ R0, .L621 ; 0x3418706A 0x3418704C: 9804 LDR R0, [SP, #16] 0x3418704E: 6C80 LDR R0, [R0, #72] 0x34187050: F1B0 5F80 CMP.W R0, #0x10000000 0x34187054: D009 BEQ 46L621 ; 0x3418706A 0x34187056: 9804 LDR R0, [SP, #16] 0x34187058: 6C80 LDR R0, [R0, #72] 0x3418705A: F1B0 5F00 CMP.W R0, #0x20000000 0x3418705E: D004 BEQ 46L621 ; 0x3418706A 0x34187060: 9804 LDR R0, [SP, #16] 0x34187062: 6C80 LDR R0, [R0, #72] 0x34187064: F1B0 5F40 CMP.W R0, #0x30000000 0x34187068: D100 BNE 46L622 ; 0x3418706C
.L621: 0x3418706A: E007 B 46L623 ; 0x3418707C
.L622: 0x3418706C: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34187070: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34187074: F44F 61E4 MOV.W R1, #0x0720 0x34187078: F006 FE0E BL assert_failed ; 0x3418DC98
.L623: 0x3418707C: 9804 LDR R0, [SP, #16] 0x3418707E: 6CC0 LDR R0, [R0, #76] 0x34187080: B128 CBZ R0, .L624 ; 0x3418708E 0x34187082: 9804 LDR R0, [SP, #16] 0x34187084: 6CC0 LDR R0, [R0, #76] 0x34187086: F5B0 7F80 CMP.W R0, #0x0100 0x3418708A: D800 BHI 46L624 ; 0x3418708E 0x3418708C: E007 B 46L625 ; 0x3418709E
.L624: 0x3418708E: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34187092: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34187096: F240 7121 MOVW R1, #0x0721 0x3418709A: F006 FDFD BL assert_failed ; 0x3418DC98
.L625: 0x3418709E: F248 01E4 MOVW R1, #0x80E4 0x341870A2: F2C5 6102 MOVT R1, #0x5602 0x341870A6: 6808 LDR R0, [R1] 0x341870A8: F64F 72FF MOVW R2, #0xFFFF 0x341870AC: F6CC 7200 MOVT R2, #0xCF00 0x341870B0: 4010 ANDS R0, R2 0x341870B2: 9B04 LDR R3, [SP, #16] 0x341870B4: 6C9A LDR R2, [R3, #72] 0x341870B6: F8D3 C04C LDR.W R12, [R3, #76] 0x341870BA: 2300 MOVS R3, #0 0x341870BC: F6CF 73FF MOVT R3, #0xFFFF 0x341870C0: EB03 430C ADD.W R3, R3, R12, LSL #16 0x341870C4: 431A ORRS R2, R3 0x341870C6: 4310 ORRS R0, R2 0x341870C8: 6008 STR R0, [R1] 0x341870CA: F001 FC33 BL LL_RCC_IC9_Enable ; 0x34188934 0x341870CE: E057 B 46L633 ; 0x34187180
.L626: 0x341870D0: 9804 LDR R0, [SP, #16] 0x341870D2: F8D0 0150 LDR.W R0, [R0, #0x0150] 0x341870D6: 2130 MOVS R1, #48 0x341870D8: F2C0 7103 MOVT R1, #0x0703 0x341870DC: 4288 CMP R0, R1 0x341870DE: D144 BNE 46L632 ; 0x3418716A 0x341870E0: 9804 LDR R0, [SP, #16] 0x341870E2: 6F00 LDR R0, [R0, #112] 0x341870E4: B170 CBZ R0, .L627 ; 0x34187104 0x341870E6: 9804 LDR R0, [SP, #16] 0x341870E8: 6F00 LDR R0, [R0, #112] 0x341870EA: F1B0 5F80 CMP.W R0, #0x10000000 0x341870EE: D009 BEQ 46L627 ; 0x34187104 0x341870F0: 9804 LDR R0, [SP, #16] 0x341870F2: 6F00 LDR R0, [R0, #112] 0x341870F4: F1B0 5F00 CMP.W R0, #0x20000000 0x341870F8: D004 BEQ 46L627 ; 0x34187104 0x341870FA: 9804 LDR R0, [SP, #16] 0x341870FC: 6F00 LDR R0, [R0, #112] 0x341870FE: F1B0 5F40 CMP.W R0, #0x30000000 0x34187102: D100 BNE 46L628 ; 0x34187106
.L627: 0x34187104: E007 B 46L629 ; 0x34187116
.L628: 0x34187106: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x3418710A: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x3418710E: F240 712D MOVW R1, #0x072D 0x34187112: F006 FDC1 BL assert_failed ; 0x3418DC98
.L629: 0x34187116: 9804 LDR R0, [SP, #16] 0x34187118: 6F40 LDR R0, [R0, #116] 0x3418711A: B128 CBZ R0, .L630 ; 0x34187128 0x3418711C: 9804 LDR R0, [SP, #16] 0x3418711E: 6F40 LDR R0, [R0, #116] 0x34187120: F5B0 7F80 CMP.W R0, #0x0100 0x34187124: D800 BHI 46L630 ; 0x34187128 0x34187126: E007 B 46L631 ; 0x34187138
.L630: 0x34187128: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x3418712C: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34187130: F240 712E MOVW R1, #0x072E 0x34187134: F006 FDB0 BL assert_failed ; 0x3418DC98
.L631: 0x34187138: F248 01F8 MOVW R1, #0x80F8 0x3418713C: F2C5 6102 MOVT R1, #0x5602 0x34187140: 6808 LDR R0, [R1] 0x34187142: F64F 72FF MOVW R2, #0xFFFF 0x34187146: F6CC 7200 MOVT R2, #0xCF00 0x3418714A: 4010 ANDS R0, R2 0x3418714C: 9B04 LDR R3, [SP, #16] 0x3418714E: 6F1A LDR R2, [R3, #112] 0x34187150: F8D3 C074 LDR.W R12, [R3, #116] 0x34187154: 2300 MOVS R3, #0 0x34187156: F6CF 73FF MOVT R3, #0xFFFF 0x3418715A: EB03 430C ADD.W R3, R3, R12, LSL #16 0x3418715E: 431A ORRS R2, R3 0x34187160: 4310 ORRS R0, R2 0x34187162: 6008 STR R0, [R1] 0x34187164: F001 FBEE BL LL_RCC_IC14_Enable ; 0x34188944 0x34187168: E00A B 46L633 ; 0x34187180
.L632: 0x3418716A: 9804 LDR R0, [SP, #16] 0x3418716C: F8D0 0150 LDR.W R0, [R0, #0x0150] 0x34187170: 2130 MOVS R1, #48 0x34187172: F2C0 7101 MOVT R1, #0x0701 0x34187176: 4288 CMP R0, R1 0x34187178: D102 BNE 46L633 ; 0x34187180 0x3418717A: F009 F86F BL LL_RCC_CLKP_Enable ; 0x3419025C 0x3418717E: E7FF B 46L633 ; 0x34187180
.L633: 0x34187180: 9804 LDR R0, [SP, #16] 0x34187182: F8D0 0150 LDR.W R0, [R0, #0x0150] 0x34187186: F001 FC43 BL LL_RCC_SetUSARTClockSource ; 0x34188A10
.L634: 0x3418718A: 9804 LDR R0, [SP, #16] 0x3418718C: 7940 LDRB R0, [R0, #5] 0x3418718E: 0780 LSLS R0, R0, #30 0x34187190: 2800 CMP R0, #0 0x34187192: F140 80F5 BPL.W 46L651 ; 0x34187380 0x34187196: 9804 LDR R0, [SP, #16] 0x34187198: F8D0 0154 LDR.W R0, [R0, #0x0154] 0x3418719C: F240 4130 MOVW R1, #0x0430 0x341871A0: F2C0 7100 MOVT R1, #0x0700 0x341871A4: 4288 CMP R0, R1 0x341871A6: D035 BEQ 46L635 ; 0x34187214 0x341871A8: 9804 LDR R0, [SP, #16] 0x341871AA: F8D0 0154 LDR.W R0, [R0, #0x0154] 0x341871AE: F240 4130 MOVW R1, #0x0430 0x341871B2: F2C0 7101 MOVT R1, #0x0701 0x341871B6: 4288 CMP R0, R1 0x341871B8: D02C BEQ 46L635 ; 0x34187214 0x341871BA: 9804 LDR R0, [SP, #16] 0x341871BC: F8D0 0154 LDR.W R0, [R0, #0x0154] 0x341871C0: F240 4130 MOVW R1, #0x0430 0x341871C4: F2C0 7102 MOVT R1, #0x0702 0x341871C8: 4288 CMP R0, R1 0x341871CA: D023 BEQ 46L635 ; 0x34187214 0x341871CC: 9804 LDR R0, [SP, #16] 0x341871CE: F8D0 0154 LDR.W R0, [R0, #0x0154] 0x341871D2: F240 4130 MOVW R1, #0x0430 0x341871D6: F2C0 7103 MOVT R1, #0x0703 0x341871DA: 4288 CMP R0, R1 0x341871DC: D01A BEQ 46L635 ; 0x34187214 0x341871DE: 9804 LDR R0, [SP, #16] 0x341871E0: F8D0 0154 LDR.W R0, [R0, #0x0154] 0x341871E4: F240 4130 MOVW R1, #0x0430 0x341871E8: F2C0 7104 MOVT R1, #0x0704 0x341871EC: 4288 CMP R0, R1 0x341871EE: D011 BEQ 46L635 ; 0x34187214 0x341871F0: 9804 LDR R0, [SP, #16] 0x341871F2: F8D0 0154 LDR.W R0, [R0, #0x0154] 0x341871F6: F240 4130 MOVW R1, #0x0430 0x341871FA: F2C0 7105 MOVT R1, #0x0705 0x341871FE: 4288 CMP R0, R1 0x34187200: D008 BEQ 46L635 ; 0x34187214 0x34187202: 9804 LDR R0, [SP, #16] 0x34187204: F8D0 0154 LDR.W R0, [R0, #0x0154] 0x34187208: F240 4130 MOVW R1, #0x0430 0x3418720C: F2C0 7106 MOVT R1, #0x0706 0x34187210: 4288 CMP R0, R1 0x34187212: D100 BNE 46L636 ; 0x34187216
.L635: 0x34187214: E007 B 46L637 ; 0x34187226
.L636: 0x34187216: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x3418721A: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x3418721E: F44F 61E9 MOV.W R1, #0x0748 0x34187222: F006 FD39 BL assert_failed ; 0x3418DC98
.L637: 0x34187226: 9804 LDR R0, [SP, #16] 0x34187228: F8D0 0154 LDR.W R0, [R0, #0x0154] 0x3418722C: F240 4130 MOVW R1, #0x0430 0x34187230: F2C0 7102 MOVT R1, #0x0702 0x34187234: 4288 CMP R0, R1 0x34187236: D144 BNE 46L643 ; 0x341872C2 0x34187238: 9804 LDR R0, [SP, #16] 0x3418723A: 6C80 LDR R0, [R0, #72] 0x3418723C: B170 CBZ R0, .L638 ; 0x3418725C 0x3418723E: 9804 LDR R0, [SP, #16] 0x34187240: 6C80 LDR R0, [R0, #72] 0x34187242: F1B0 5F80 CMP.W R0, #0x10000000 0x34187246: D009 BEQ 46L638 ; 0x3418725C 0x34187248: 9804 LDR R0, [SP, #16] 0x3418724A: 6C80 LDR R0, [R0, #72] 0x3418724C: F1B0 5F00 CMP.W R0, #0x20000000 0x34187250: D004 BEQ 46L638 ; 0x3418725C 0x34187252: 9804 LDR R0, [SP, #16] 0x34187254: 6C80 LDR R0, [R0, #72] 0x34187256: F1B0 5F40 CMP.W R0, #0x30000000 0x3418725A: D100 BNE 46L639 ; 0x3418725E
.L638: 0x3418725C: E007 B 46L640 ; 0x3418726E
.L639: 0x3418725E: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34187262: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34187266: F240 714D MOVW R1, #0x074D 0x3418726A: F006 FD15 BL assert_failed ; 0x3418DC98
.L640: 0x3418726E: 9804 LDR R0, [SP, #16] 0x34187270: 6CC0 LDR R0, [R0, #76] 0x34187272: B128 CBZ R0, .L641 ; 0x34187280 0x34187274: 9804 LDR R0, [SP, #16] 0x34187276: 6CC0 LDR R0, [R0, #76] 0x34187278: F5B0 7F80 CMP.W R0, #0x0100 0x3418727C: D800 BHI 46L641 ; 0x34187280 0x3418727E: E007 B 46L642 ; 0x34187290
.L641: 0x34187280: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34187284: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34187288: F240 714E MOVW R1, #0x074E 0x3418728C: F006 FD04 BL assert_failed ; 0x3418DC98
.L642: 0x34187290: F248 01E4 MOVW R1, #0x80E4 0x34187294: F2C5 6102 MOVT R1, #0x5602 0x34187298: 6808 LDR R0, [R1] 0x3418729A: F64F 72FF MOVW R2, #0xFFFF 0x3418729E: F6CC 7200 MOVT R2, #0xCF00 0x341872A2: 4010 ANDS R0, R2 0x341872A4: 9B04 LDR R3, [SP, #16] 0x341872A6: 6C9A LDR R2, [R3, #72] 0x341872A8: F8D3 C04C LDR.W R12, [R3, #76] 0x341872AC: 2300 MOVS R3, #0 0x341872AE: F6CF 73FF MOVT R3, #0xFFFF 0x341872B2: EB03 430C ADD.W R3, R3, R12, LSL #16 0x341872B6: 431A ORRS R2, R3 0x341872B8: 4310 ORRS R0, R2 0x341872BA: 6008 STR R0, [R1] 0x341872BC: F001 FB3A BL LL_RCC_IC9_Enable ; 0x34188934 0x341872C0: E059 B 46L650 ; 0x34187376
.L643: 0x341872C2: 9804 LDR R0, [SP, #16] 0x341872C4: F8D0 0154 LDR.W R0, [R0, #0x0154] 0x341872C8: F240 4130 MOVW R1, #0x0430 0x341872CC: F2C0 7103 MOVT R1, #0x0703 0x341872D0: 4288 CMP R0, R1 0x341872D2: D144 BNE 46L649 ; 0x3418735E 0x341872D4: 9804 LDR R0, [SP, #16] 0x341872D6: 6F00 LDR R0, [R0, #112] 0x341872D8: B170 CBZ R0, .L644 ; 0x341872F8 0x341872DA: 9804 LDR R0, [SP, #16] 0x341872DC: 6F00 LDR R0, [R0, #112] 0x341872DE: F1B0 5F80 CMP.W R0, #0x10000000 0x341872E2: D009 BEQ 46L644 ; 0x341872F8 0x341872E4: 9804 LDR R0, [SP, #16] 0x341872E6: 6F00 LDR R0, [R0, #112] 0x341872E8: F1B0 5F00 CMP.W R0, #0x20000000 0x341872EC: D004 BEQ 46L644 ; 0x341872F8 0x341872EE: 9804 LDR R0, [SP, #16] 0x341872F0: 6F00 LDR R0, [R0, #112] 0x341872F2: F1B0 5F40 CMP.W R0, #0x30000000 0x341872F6: D100 BNE 46L645 ; 0x341872FA
.L644: 0x341872F8: E007 B 46L646 ; 0x3418730A
.L645: 0x341872FA: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341872FE: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34187302: F240 715A MOVW R1, #0x075A 0x34187306: F006 FCC7 BL assert_failed ; 0x3418DC98
.L646: 0x3418730A: 9804 LDR R0, [SP, #16] 0x3418730C: 6F40 LDR R0, [R0, #116] 0x3418730E: B128 CBZ R0, .L647 ; 0x3418731C 0x34187310: 9804 LDR R0, [SP, #16] 0x34187312: 6F40 LDR R0, [R0, #116] 0x34187314: F5B0 7F80 CMP.W R0, #0x0100 0x34187318: D800 BHI 46L647 ; 0x3418731C 0x3418731A: E007 B 46L648 ; 0x3418732C
.L647: 0x3418731C: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34187320: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34187324: F240 715B MOVW R1, #0x075B 0x34187328: F006 FCB6 BL assert_failed ; 0x3418DC98
.L648: 0x3418732C: F248 01F8 MOVW R1, #0x80F8 0x34187330: F2C5 6102 MOVT R1, #0x5602 0x34187334: 6808 LDR R0, [R1] 0x34187336: F64F 72FF MOVW R2, #0xFFFF 0x3418733A: F6CC 7200 MOVT R2, #0xCF00 0x3418733E: 4010 ANDS R0, R2 0x34187340: 9B04 LDR R3, [SP, #16] 0x34187342: 6F1A LDR R2, [R3, #112] 0x34187344: F8D3 C074 LDR.W R12, [R3, #116] 0x34187348: 2300 MOVS R3, #0 0x3418734A: F6CF 73FF MOVT R3, #0xFFFF 0x3418734E: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34187352: 431A ORRS R2, R3 0x34187354: 4310 ORRS R0, R2 0x34187356: 6008 STR R0, [R1] 0x34187358: F001 FAF4 BL LL_RCC_IC14_Enable ; 0x34188944 0x3418735C: E00B B 46L650 ; 0x34187376
.L649: 0x3418735E: 9804 LDR R0, [SP, #16] 0x34187360: F8D0 0154 LDR.W R0, [R0, #0x0154] 0x34187364: F240 4130 MOVW R1, #0x0430 0x34187368: F2C0 7101 MOVT R1, #0x0701 0x3418736C: 4288 CMP R0, R1 0x3418736E: D102 BNE 46L650 ; 0x34187376 0x34187370: F008 FF74 BL LL_RCC_CLKP_Enable ; 0x3419025C 0x34187374: E7FF B 46L650 ; 0x34187376
.L650: 0x34187376: 9804 LDR R0, [SP, #16] 0x34187378: F8D0 0154 LDR.W R0, [R0, #0x0154] 0x3418737C: F001 FB48 BL LL_RCC_SetUSARTClockSource ; 0x34188A10
.L651: 0x34187380: 9804 LDR R0, [SP, #16] 0x34187382: 7940 LDRB R0, [R0, #5] 0x34187384: 0740 LSLS R0, R0, #29 0x34187386: 2800 CMP R0, #0 0x34187388: F140 80F5 BPL.W 46L668 ; 0x34187576 0x3418738C: 9804 LDR R0, [SP, #16] 0x3418738E: F8D0 0158 LDR.W R0, [R0, #0x0158] 0x34187392: F640 0130 MOVW R1, #0x0830 0x34187396: F2C0 7100 MOVT R1, #0x0700 0x3418739A: 4288 CMP R0, R1 0x3418739C: D035 BEQ 46L652 ; 0x3418740A 0x3418739E: 9804 LDR R0, [SP, #16] 0x341873A0: F8D0 0158 LDR.W R0, [R0, #0x0158] 0x341873A4: F640 0130 MOVW R1, #0x0830 0x341873A8: F2C0 7101 MOVT R1, #0x0701 0x341873AC: 4288 CMP R0, R1 0x341873AE: D02C BEQ 46L652 ; 0x3418740A 0x341873B0: 9804 LDR R0, [SP, #16] 0x341873B2: F8D0 0158 LDR.W R0, [R0, #0x0158] 0x341873B6: F640 0130 MOVW R1, #0x0830 0x341873BA: F2C0 7102 MOVT R1, #0x0702 0x341873BE: 4288 CMP R0, R1 0x341873C0: D023 BEQ 46L652 ; 0x3418740A 0x341873C2: 9804 LDR R0, [SP, #16] 0x341873C4: F8D0 0158 LDR.W R0, [R0, #0x0158] 0x341873C8: F640 0130 MOVW R1, #0x0830 0x341873CC: F2C0 7103 MOVT R1, #0x0703 0x341873D0: 4288 CMP R0, R1 0x341873D2: D01A BEQ 46L652 ; 0x3418740A 0x341873D4: 9804 LDR R0, [SP, #16] 0x341873D6: F8D0 0158 LDR.W R0, [R0, #0x0158] 0x341873DA: F640 0130 MOVW R1, #0x0830 0x341873DE: F2C0 7104 MOVT R1, #0x0704 0x341873E2: 4288 CMP R0, R1 0x341873E4: D011 BEQ 46L652 ; 0x3418740A 0x341873E6: 9804 LDR R0, [SP, #16] 0x341873E8: F8D0 0158 LDR.W R0, [R0, #0x0158] 0x341873EC: F640 0130 MOVW R1, #0x0830 0x341873F0: F2C0 7105 MOVT R1, #0x0705 0x341873F4: 4288 CMP R0, R1 0x341873F6: D008 BEQ 46L652 ; 0x3418740A 0x341873F8: 9804 LDR R0, [SP, #16] 0x341873FA: F8D0 0158 LDR.W R0, [R0, #0x0158] 0x341873FE: F640 0130 MOVW R1, #0x0830 0x34187402: F2C0 7106 MOVT R1, #0x0706 0x34187406: 4288 CMP R0, R1 0x34187408: D100 BNE 46L653 ; 0x3418740C
.L652: 0x3418740A: E007 B 46L654 ; 0x3418741C
.L653: 0x3418740C: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34187410: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34187414: F240 7175 MOVW R1, #0x0775 0x34187418: F006 FC3E BL assert_failed ; 0x3418DC98
.L654: 0x3418741C: 9804 LDR R0, [SP, #16] 0x3418741E: F8D0 0158 LDR.W R0, [R0, #0x0158] 0x34187422: F640 0130 MOVW R1, #0x0830 0x34187426: F2C0 7102 MOVT R1, #0x0702 0x3418742A: 4288 CMP R0, R1 0x3418742C: D144 BNE 46L660 ; 0x341874B8 0x3418742E: 9804 LDR R0, [SP, #16] 0x34187430: 6C80 LDR R0, [R0, #72] 0x34187432: B170 CBZ R0, .L655 ; 0x34187452 0x34187434: 9804 LDR R0, [SP, #16] 0x34187436: 6C80 LDR R0, [R0, #72] 0x34187438: F1B0 5F80 CMP.W R0, #0x10000000 0x3418743C: D009 BEQ 46L655 ; 0x34187452 0x3418743E: 9804 LDR R0, [SP, #16] 0x34187440: 6C80 LDR R0, [R0, #72] 0x34187442: F1B0 5F00 CMP.W R0, #0x20000000 0x34187446: D004 BEQ 46L655 ; 0x34187452 0x34187448: 9804 LDR R0, [SP, #16] 0x3418744A: 6C80 LDR R0, [R0, #72] 0x3418744C: F1B0 5F40 CMP.W R0, #0x30000000 0x34187450: D100 BNE 46L656 ; 0x34187454
.L655: 0x34187452: E007 B 46L657 ; 0x34187464
.L656: 0x34187454: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34187458: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x3418745C: F240 717A MOVW R1, #0x077A 0x34187460: F006 FC1A BL assert_failed ; 0x3418DC98
.L657: 0x34187464: 9804 LDR R0, [SP, #16] 0x34187466: 6CC0 LDR R0, [R0, #76] 0x34187468: B128 CBZ R0, .L658 ; 0x34187476 0x3418746A: 9804 LDR R0, [SP, #16] 0x3418746C: 6CC0 LDR R0, [R0, #76] 0x3418746E: F5B0 7F80 CMP.W R0, #0x0100 0x34187472: D800 BHI 46L658 ; 0x34187476 0x34187474: E007 B 46L659 ; 0x34187486
.L658: 0x34187476: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x3418747A: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x3418747E: F240 717B MOVW R1, #0x077B 0x34187482: F006 FC09 BL assert_failed ; 0x3418DC98
.L659: 0x34187486: F248 01E4 MOVW R1, #0x80E4 0x3418748A: F2C5 6102 MOVT R1, #0x5602 0x3418748E: 6808 LDR R0, [R1] 0x34187490: F64F 72FF MOVW R2, #0xFFFF 0x34187494: F6CC 7200 MOVT R2, #0xCF00 0x34187498: 4010 ANDS R0, R2 0x3418749A: 9B04 LDR R3, [SP, #16] 0x3418749C: 6C9A LDR R2, [R3, #72] 0x3418749E: F8D3 C04C LDR.W R12, [R3, #76] 0x341874A2: 2300 MOVS R3, #0 0x341874A4: F6CF 73FF MOVT R3, #0xFFFF 0x341874A8: EB03 430C ADD.W R3, R3, R12, LSL #16 0x341874AC: 431A ORRS R2, R3 0x341874AE: 4310 ORRS R0, R2 0x341874B0: 6008 STR R0, [R1] 0x341874B2: F001 FA3F BL LL_RCC_IC9_Enable ; 0x34188934 0x341874B6: E059 B 46L667 ; 0x3418756C
.L660: 0x341874B8: 9804 LDR R0, [SP, #16] 0x341874BA: F8D0 0158 LDR.W R0, [R0, #0x0158] 0x341874BE: F640 0130 MOVW R1, #0x0830 0x341874C2: F2C0 7103 MOVT R1, #0x0703 0x341874C6: 4288 CMP R0, R1 0x341874C8: D144 BNE 46L666 ; 0x34187554 0x341874CA: 9804 LDR R0, [SP, #16] 0x341874CC: 6F00 LDR R0, [R0, #112] 0x341874CE: B170 CBZ R0, .L661 ; 0x341874EE 0x341874D0: 9804 LDR R0, [SP, #16] 0x341874D2: 6F00 LDR R0, [R0, #112] 0x341874D4: F1B0 5F80 CMP.W R0, #0x10000000 0x341874D8: D009 BEQ 46L661 ; 0x341874EE 0x341874DA: 9804 LDR R0, [SP, #16] 0x341874DC: 6F00 LDR R0, [R0, #112] 0x341874DE: F1B0 5F00 CMP.W R0, #0x20000000 0x341874E2: D004 BEQ 46L661 ; 0x341874EE 0x341874E4: 9804 LDR R0, [SP, #16] 0x341874E6: 6F00 LDR R0, [R0, #112] 0x341874E8: F1B0 5F40 CMP.W R0, #0x30000000 0x341874EC: D100 BNE 46L662 ; 0x341874F0
.L661: 0x341874EE: E007 B 46L663 ; 0x34187500
.L662: 0x341874F0: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341874F4: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341874F8: F240 7187 MOVW R1, #0x0787 0x341874FC: F006 FBCC BL assert_failed ; 0x3418DC98
.L663: 0x34187500: 9804 LDR R0, [SP, #16] 0x34187502: 6F40 LDR R0, [R0, #116] 0x34187504: B128 CBZ R0, .L664 ; 0x34187512 0x34187506: 9804 LDR R0, [SP, #16] 0x34187508: 6F40 LDR R0, [R0, #116] 0x3418750A: F5B0 7F80 CMP.W R0, #0x0100 0x3418750E: D800 BHI 46L664 ; 0x34187512 0x34187510: E007 B 46L665 ; 0x34187522
.L664: 0x34187512: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34187516: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x3418751A: F44F 61F1 MOV.W R1, #0x0788 0x3418751E: F006 FBBB BL assert_failed ; 0x3418DC98
.L665: 0x34187522: F248 01F8 MOVW R1, #0x80F8 0x34187526: F2C5 6102 MOVT R1, #0x5602 0x3418752A: 6808 LDR R0, [R1] 0x3418752C: F64F 72FF MOVW R2, #0xFFFF 0x34187530: F6CC 7200 MOVT R2, #0xCF00 0x34187534: 4010 ANDS R0, R2 0x34187536: 9B04 LDR R3, [SP, #16] 0x34187538: 6F1A LDR R2, [R3, #112] 0x3418753A: F8D3 C074 LDR.W R12, [R3, #116] 0x3418753E: 2300 MOVS R3, #0 0x34187540: F6CF 73FF MOVT R3, #0xFFFF 0x34187544: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34187548: 431A ORRS R2, R3 0x3418754A: 4310 ORRS R0, R2 0x3418754C: 6008 STR R0, [R1] 0x3418754E: F001 F9F9 BL LL_RCC_IC14_Enable ; 0x34188944 0x34187552: E00B B 46L667 ; 0x3418756C
.L666: 0x34187554: 9804 LDR R0, [SP, #16] 0x34187556: F8D0 0158 LDR.W R0, [R0, #0x0158] 0x3418755A: F640 0130 MOVW R1, #0x0830 0x3418755E: F2C0 7101 MOVT R1, #0x0701 0x34187562: 4288 CMP R0, R1 0x34187564: D102 BNE 46L667 ; 0x3418756C 0x34187566: F008 FE79 BL LL_RCC_CLKP_Enable ; 0x3419025C 0x3418756A: E7FF B 46L667 ; 0x3418756C
.L667: 0x3418756C: 9804 LDR R0, [SP, #16] 0x3418756E: F8D0 0158 LDR.W R0, [R0, #0x0158] 0x34187572: F001 FA4D BL LL_RCC_SetUSARTClockSource ; 0x34188A10
.L668: 0x34187576: 9804 LDR R0, [SP, #16] 0x34187578: 7940 LDRB R0, [R0, #5] 0x3418757A: 0700 LSLS R0, R0, #28 0x3418757C: 2800 CMP R0, #0 0x3418757E: F140 80F5 BPL.W 46L685 ; 0x3418776C 0x34187582: 9804 LDR R0, [SP, #16] 0x34187584: F8D0 015C LDR.W R0, [R0, #0x015C] 0x34187588: F640 4130 MOVW R1, #0x0C30 0x3418758C: F2C0 7100 MOVT R1, #0x0700 0x34187590: 4288 CMP R0, R1 0x34187592: D035 BEQ 46L669 ; 0x34187600 0x34187594: 9804 LDR R0, [SP, #16] 0x34187596: F8D0 015C LDR.W R0, [R0, #0x015C] 0x3418759A: F640 4130 MOVW R1, #0x0C30 0x3418759E: F2C0 7101 MOVT R1, #0x0701 0x341875A2: 4288 CMP R0, R1 0x341875A4: D02C BEQ 46L669 ; 0x34187600 0x341875A6: 9804 LDR R0, [SP, #16] 0x341875A8: F8D0 015C LDR.W R0, [R0, #0x015C] 0x341875AC: F640 4130 MOVW R1, #0x0C30 0x341875B0: F2C0 7102 MOVT R1, #0x0702 0x341875B4: 4288 CMP R0, R1 0x341875B6: D023 BEQ 46L669 ; 0x34187600 0x341875B8: 9804 LDR R0, [SP, #16] 0x341875BA: F8D0 015C LDR.W R0, [R0, #0x015C] 0x341875BE: F640 4130 MOVW R1, #0x0C30 0x341875C2: F2C0 7103 MOVT R1, #0x0703 0x341875C6: 4288 CMP R0, R1 0x341875C8: D01A BEQ 46L669 ; 0x34187600 0x341875CA: 9804 LDR R0, [SP, #16] 0x341875CC: F8D0 015C LDR.W R0, [R0, #0x015C] 0x341875D0: F640 4130 MOVW R1, #0x0C30 0x341875D4: F2C0 7104 MOVT R1, #0x0704 0x341875D8: 4288 CMP R0, R1 0x341875DA: D011 BEQ 46L669 ; 0x34187600 0x341875DC: 9804 LDR R0, [SP, #16] 0x341875DE: F8D0 015C LDR.W R0, [R0, #0x015C] 0x341875E2: F640 4130 MOVW R1, #0x0C30 0x341875E6: F2C0 7105 MOVT R1, #0x0705 0x341875EA: 4288 CMP R0, R1 0x341875EC: D008 BEQ 46L669 ; 0x34187600 0x341875EE: 9804 LDR R0, [SP, #16] 0x341875F0: F8D0 015C LDR.W R0, [R0, #0x015C] 0x341875F4: F640 4130 MOVW R1, #0x0C30 0x341875F8: F2C0 7106 MOVT R1, #0x0706 0x341875FC: 4288 CMP R0, R1 0x341875FE: D100 BNE 46L670 ; 0x34187602
.L669: 0x34187600: E007 B 46L671 ; 0x34187612
.L670: 0x34187602: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34187606: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x3418760A: F240 71A2 MOVW R1, #0x07A2 0x3418760E: F006 FB43 BL assert_failed ; 0x3418DC98
.L671: 0x34187612: 9804 LDR R0, [SP, #16] 0x34187614: F8D0 015C LDR.W R0, [R0, #0x015C] 0x34187618: F640 4130 MOVW R1, #0x0C30 0x3418761C: F2C0 7102 MOVT R1, #0x0702 0x34187620: 4288 CMP R0, R1 0x34187622: D144 BNE 46L677 ; 0x341876AE 0x34187624: 9804 LDR R0, [SP, #16] 0x34187626: 6C80 LDR R0, [R0, #72] 0x34187628: B170 CBZ R0, .L672 ; 0x34187648 0x3418762A: 9804 LDR R0, [SP, #16] 0x3418762C: 6C80 LDR R0, [R0, #72] 0x3418762E: F1B0 5F80 CMP.W R0, #0x10000000 0x34187632: D009 BEQ 46L672 ; 0x34187648 0x34187634: 9804 LDR R0, [SP, #16] 0x34187636: 6C80 LDR R0, [R0, #72] 0x34187638: F1B0 5F00 CMP.W R0, #0x20000000 0x3418763C: D004 BEQ 46L672 ; 0x34187648 0x3418763E: 9804 LDR R0, [SP, #16] 0x34187640: 6C80 LDR R0, [R0, #72] 0x34187642: F1B0 5F40 CMP.W R0, #0x30000000 0x34187646: D100 BNE 46L673 ; 0x3418764A
.L672: 0x34187648: E007 B 46L674 ; 0x3418765A
.L673: 0x3418764A: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x3418764E: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34187652: F240 71A7 MOVW R1, #0x07A7 0x34187656: F006 FB1F BL assert_failed ; 0x3418DC98
.L674: 0x3418765A: 9804 LDR R0, [SP, #16] 0x3418765C: 6CC0 LDR R0, [R0, #76] 0x3418765E: B128 CBZ R0, .L675 ; 0x3418766C 0x34187660: 9804 LDR R0, [SP, #16] 0x34187662: 6CC0 LDR R0, [R0, #76] 0x34187664: F5B0 7F80 CMP.W R0, #0x0100 0x34187668: D800 BHI 46L675 ; 0x3418766C 0x3418766A: E007 B 46L676 ; 0x3418767C
.L675: 0x3418766C: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34187670: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34187674: F44F 61F5 MOV.W R1, #0x07A8 0x34187678: F006 FB0E BL assert_failed ; 0x3418DC98
.L676: 0x3418767C: F248 01E4 MOVW R1, #0x80E4 0x34187680: F2C5 6102 MOVT R1, #0x5602 0x34187684: 6808 LDR R0, [R1] 0x34187686: F64F 72FF MOVW R2, #0xFFFF 0x3418768A: F6CC 7200 MOVT R2, #0xCF00 0x3418768E: 4010 ANDS R0, R2 0x34187690: 9B04 LDR R3, [SP, #16] 0x34187692: 6C9A LDR R2, [R3, #72] 0x34187694: F8D3 C04C LDR.W R12, [R3, #76] 0x34187698: 2300 MOVS R3, #0 0x3418769A: F6CF 73FF MOVT R3, #0xFFFF 0x3418769E: EB03 430C ADD.W R3, R3, R12, LSL #16 0x341876A2: 431A ORRS R2, R3 0x341876A4: 4310 ORRS R0, R2 0x341876A6: 6008 STR R0, [R1] 0x341876A8: F001 F944 BL LL_RCC_IC9_Enable ; 0x34188934 0x341876AC: E059 B 46L684 ; 0x34187762
.L677: 0x341876AE: 9804 LDR R0, [SP, #16] 0x341876B0: F8D0 015C LDR.W R0, [R0, #0x015C] 0x341876B4: F640 4130 MOVW R1, #0x0C30 0x341876B8: F2C0 7103 MOVT R1, #0x0703 0x341876BC: 4288 CMP R0, R1 0x341876BE: D144 BNE 46L683 ; 0x3418774A 0x341876C0: 9804 LDR R0, [SP, #16] 0x341876C2: 6F00 LDR R0, [R0, #112] 0x341876C4: B170 CBZ R0, .L678 ; 0x341876E4 0x341876C6: 9804 LDR R0, [SP, #16] 0x341876C8: 6F00 LDR R0, [R0, #112] 0x341876CA: F1B0 5F80 CMP.W R0, #0x10000000 0x341876CE: D009 BEQ 46L678 ; 0x341876E4 0x341876D0: 9804 LDR R0, [SP, #16] 0x341876D2: 6F00 LDR R0, [R0, #112] 0x341876D4: F1B0 5F00 CMP.W R0, #0x20000000 0x341876D8: D004 BEQ 46L678 ; 0x341876E4 0x341876DA: 9804 LDR R0, [SP, #16] 0x341876DC: 6F00 LDR R0, [R0, #112] 0x341876DE: F1B0 5F40 CMP.W R0, #0x30000000 0x341876E2: D100 BNE 46L679 ; 0x341876E6
.L678: 0x341876E4: E007 B 46L680 ; 0x341876F6
.L679: 0x341876E6: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341876EA: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341876EE: F240 71B4 MOVW R1, #0x07B4 0x341876F2: F006 FAD1 BL assert_failed ; 0x3418DC98
.L680: 0x341876F6: 9804 LDR R0, [SP, #16] 0x341876F8: 6F40 LDR R0, [R0, #116] 0x341876FA: B128 CBZ R0, .L681 ; 0x34187708 0x341876FC: 9804 LDR R0, [SP, #16] 0x341876FE: 6F40 LDR R0, [R0, #116] 0x34187700: F5B0 7F80 CMP.W R0, #0x0100 0x34187704: D800 BHI 46L681 ; 0x34187708 0x34187706: E007 B 46L682 ; 0x34187718
.L681: 0x34187708: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x3418770C: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34187710: F240 71B5 MOVW R1, #0x07B5 0x34187714: F006 FAC0 BL assert_failed ; 0x3418DC98
.L682: 0x34187718: F248 01F8 MOVW R1, #0x80F8 0x3418771C: F2C5 6102 MOVT R1, #0x5602 0x34187720: 6808 LDR R0, [R1] 0x34187722: F64F 72FF MOVW R2, #0xFFFF 0x34187726: F6CC 7200 MOVT R2, #0xCF00 0x3418772A: 4010 ANDS R0, R2 0x3418772C: 9B04 LDR R3, [SP, #16] 0x3418772E: 6F1A LDR R2, [R3, #112] 0x34187730: F8D3 C074 LDR.W R12, [R3, #116] 0x34187734: 2300 MOVS R3, #0 0x34187736: F6CF 73FF MOVT R3, #0xFFFF 0x3418773A: EB03 430C ADD.W R3, R3, R12, LSL #16 0x3418773E: 431A ORRS R2, R3 0x34187740: 4310 ORRS R0, R2 0x34187742: 6008 STR R0, [R1] 0x34187744: F001 F8FE BL LL_RCC_IC14_Enable ; 0x34188944 0x34187748: E00B B 46L684 ; 0x34187762
.L683: 0x3418774A: 9804 LDR R0, [SP, #16] 0x3418774C: F8D0 015C LDR.W R0, [R0, #0x015C] 0x34187750: F640 4130 MOVW R1, #0x0C30 0x34187754: F2C0 7101 MOVT R1, #0x0701 0x34187758: 4288 CMP R0, R1 0x3418775A: D102 BNE 46L684 ; 0x34187762 0x3418775C: F008 FD7E BL LL_RCC_CLKP_Enable ; 0x3419025C 0x34187760: E7FF B 46L684 ; 0x34187762
.L684: 0x34187762: 9804 LDR R0, [SP, #16] 0x34187764: F8D0 015C LDR.W R0, [R0, #0x015C] 0x34187768: F001 F952 BL LL_RCC_SetUSARTClockSource ; 0x34188A10
.L685: 0x3418776C: 9804 LDR R0, [SP, #16] 0x3418776E: 7940 LDRB R0, [R0, #5] 0x34187770: 06C0 LSLS R0, R0, #27 0x34187772: 2800 CMP R0, #0 0x34187774: F140 80F5 BPL.W 46L702 ; 0x34187962 0x34187778: 9804 LDR R0, [SP, #16] 0x3418777A: F8D0 0160 LDR.W R0, [R0, #0x0160] 0x3418777E: F241 0130 MOVW R1, #0x1030 0x34187782: F2C0 7100 MOVT R1, #0x0700 0x34187786: 4288 CMP R0, R1 0x34187788: D035 BEQ 46L686 ; 0x341877F6 0x3418778A: 9804 LDR R0, [SP, #16] 0x3418778C: F8D0 0160 LDR.W R0, [R0, #0x0160] 0x34187790: F241 0130 MOVW R1, #0x1030 0x34187794: F2C0 7101 MOVT R1, #0x0701 0x34187798: 4288 CMP R0, R1 0x3418779A: D02C BEQ 46L686 ; 0x341877F6 0x3418779C: 9804 LDR R0, [SP, #16] 0x3418779E: F8D0 0160 LDR.W R0, [R0, #0x0160] 0x341877A2: F241 0130 MOVW R1, #0x1030 0x341877A6: F2C0 7102 MOVT R1, #0x0702 0x341877AA: 4288 CMP R0, R1 0x341877AC: D023 BEQ 46L686 ; 0x341877F6 0x341877AE: 9804 LDR R0, [SP, #16] 0x341877B0: F8D0 0160 LDR.W R0, [R0, #0x0160] 0x341877B4: F241 0130 MOVW R1, #0x1030 0x341877B8: F2C0 7103 MOVT R1, #0x0703 0x341877BC: 4288 CMP R0, R1 0x341877BE: D01A BEQ 46L686 ; 0x341877F6 0x341877C0: 9804 LDR R0, [SP, #16] 0x341877C2: F8D0 0160 LDR.W R0, [R0, #0x0160] 0x341877C6: F241 0130 MOVW R1, #0x1030 0x341877CA: F2C0 7104 MOVT R1, #0x0704 0x341877CE: 4288 CMP R0, R1 0x341877D0: D011 BEQ 46L686 ; 0x341877F6 0x341877D2: 9804 LDR R0, [SP, #16] 0x341877D4: F8D0 0160 LDR.W R0, [R0, #0x0160] 0x341877D8: F241 0130 MOVW R1, #0x1030 0x341877DC: F2C0 7105 MOVT R1, #0x0705 0x341877E0: 4288 CMP R0, R1 0x341877E2: D008 BEQ 46L686 ; 0x341877F6 0x341877E4: 9804 LDR R0, [SP, #16] 0x341877E6: F8D0 0160 LDR.W R0, [R0, #0x0160] 0x341877EA: F241 0130 MOVW R1, #0x1030 0x341877EE: F2C0 7106 MOVT R1, #0x0706 0x341877F2: 4288 CMP R0, R1 0x341877F4: D100 BNE 46L687 ; 0x341877F8
.L686: 0x341877F6: E007 B 46L688 ; 0x34187808
.L687: 0x341877F8: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341877FC: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34187800: F240 71CF MOVW R1, #0x07CF 0x34187804: F006 FA48 BL assert_failed ; 0x3418DC98
.L688: 0x34187808: 9804 LDR R0, [SP, #16] 0x3418780A: F8D0 0160 LDR.W R0, [R0, #0x0160] 0x3418780E: F241 0130 MOVW R1, #0x1030 0x34187812: F2C0 7102 MOVT R1, #0x0702 0x34187816: 4288 CMP R0, R1 0x34187818: D144 BNE 46L694 ; 0x341878A4 0x3418781A: 9804 LDR R0, [SP, #16] 0x3418781C: 6C80 LDR R0, [R0, #72] 0x3418781E: B170 CBZ R0, .L689 ; 0x3418783E 0x34187820: 9804 LDR R0, [SP, #16] 0x34187822: 6C80 LDR R0, [R0, #72] 0x34187824: F1B0 5F80 CMP.W R0, #0x10000000 0x34187828: D009 BEQ 46L689 ; 0x3418783E 0x3418782A: 9804 LDR R0, [SP, #16] 0x3418782C: 6C80 LDR R0, [R0, #72] 0x3418782E: F1B0 5F00 CMP.W R0, #0x20000000 0x34187832: D004 BEQ 46L689 ; 0x3418783E 0x34187834: 9804 LDR R0, [SP, #16] 0x34187836: 6C80 LDR R0, [R0, #72] 0x34187838: F1B0 5F40 CMP.W R0, #0x30000000 0x3418783C: D100 BNE 46L690 ; 0x34187840
.L689: 0x3418783E: E007 B 46L691 ; 0x34187850
.L690: 0x34187840: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34187844: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34187848: F240 71D4 MOVW R1, #0x07D4 0x3418784C: F006 FA24 BL assert_failed ; 0x3418DC98
.L691: 0x34187850: 9804 LDR R0, [SP, #16] 0x34187852: 6CC0 LDR R0, [R0, #76] 0x34187854: B128 CBZ R0, .L692 ; 0x34187862 0x34187856: 9804 LDR R0, [SP, #16] 0x34187858: 6CC0 LDR R0, [R0, #76] 0x3418785A: F5B0 7F80 CMP.W R0, #0x0100 0x3418785E: D800 BHI 46L692 ; 0x34187862 0x34187860: E007 B 46L693 ; 0x34187872
.L692: 0x34187862: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34187866: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x3418786A: F240 71D5 MOVW R1, #0x07D5 0x3418786E: F006 FA13 BL assert_failed ; 0x3418DC98
.L693: 0x34187872: F248 01E4 MOVW R1, #0x80E4 0x34187876: F2C5 6102 MOVT R1, #0x5602 0x3418787A: 6808 LDR R0, [R1] 0x3418787C: F64F 72FF MOVW R2, #0xFFFF 0x34187880: F6CC 7200 MOVT R2, #0xCF00 0x34187884: 4010 ANDS R0, R2 0x34187886: 9B04 LDR R3, [SP, #16] 0x34187888: 6C9A LDR R2, [R3, #72] 0x3418788A: F8D3 C04C LDR.W R12, [R3, #76] 0x3418788E: 2300 MOVS R3, #0 0x34187890: F6CF 73FF MOVT R3, #0xFFFF 0x34187894: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34187898: 431A ORRS R2, R3 0x3418789A: 4310 ORRS R0, R2 0x3418789C: 6008 STR R0, [R1] 0x3418789E: F001 F849 BL LL_RCC_IC9_Enable ; 0x34188934 0x341878A2: E059 B 46L701 ; 0x34187958
.L694: 0x341878A4: 9804 LDR R0, [SP, #16] 0x341878A6: F8D0 0160 LDR.W R0, [R0, #0x0160] 0x341878AA: F241 0130 MOVW R1, #0x1030 0x341878AE: F2C0 7103 MOVT R1, #0x0703 0x341878B2: 4288 CMP R0, R1 0x341878B4: D144 BNE 46L700 ; 0x34187940 0x341878B6: 9804 LDR R0, [SP, #16] 0x341878B8: 6F00 LDR R0, [R0, #112] 0x341878BA: B170 CBZ R0, .L695 ; 0x341878DA 0x341878BC: 9804 LDR R0, [SP, #16] 0x341878BE: 6F00 LDR R0, [R0, #112] 0x341878C0: F1B0 5F80 CMP.W R0, #0x10000000 0x341878C4: D009 BEQ 46L695 ; 0x341878DA 0x341878C6: 9804 LDR R0, [SP, #16] 0x341878C8: 6F00 LDR R0, [R0, #112] 0x341878CA: F1B0 5F00 CMP.W R0, #0x20000000 0x341878CE: D004 BEQ 46L695 ; 0x341878DA 0x341878D0: 9804 LDR R0, [SP, #16] 0x341878D2: 6F00 LDR R0, [R0, #112] 0x341878D4: F1B0 5F40 CMP.W R0, #0x30000000 0x341878D8: D100 BNE 46L696 ; 0x341878DC
.L695: 0x341878DA: E007 B 46L697 ; 0x341878EC
.L696: 0x341878DC: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341878E0: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341878E4: F240 71E1 MOVW R1, #0x07E1 0x341878E8: F006 F9D6 BL assert_failed ; 0x3418DC98
.L697: 0x341878EC: 9804 LDR R0, [SP, #16] 0x341878EE: 6F40 LDR R0, [R0, #116] 0x341878F0: B128 CBZ R0, .L698 ; 0x341878FE 0x341878F2: 9804 LDR R0, [SP, #16] 0x341878F4: 6F40 LDR R0, [R0, #116] 0x341878F6: F5B0 7F80 CMP.W R0, #0x0100 0x341878FA: D800 BHI 46L698 ; 0x341878FE 0x341878FC: E007 B 46L699 ; 0x3418790E
.L698: 0x341878FE: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34187902: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34187906: F240 71E2 MOVW R1, #0x07E2 0x3418790A: F006 F9C5 BL assert_failed ; 0x3418DC98
.L699: 0x3418790E: F248 01F8 MOVW R1, #0x80F8 0x34187912: F2C5 6102 MOVT R1, #0x5602 0x34187916: 6808 LDR R0, [R1] 0x34187918: F64F 72FF MOVW R2, #0xFFFF 0x3418791C: F6CC 7200 MOVT R2, #0xCF00 0x34187920: 4010 ANDS R0, R2 0x34187922: 9B04 LDR R3, [SP, #16] 0x34187924: 6F1A LDR R2, [R3, #112] 0x34187926: F8D3 C074 LDR.W R12, [R3, #116] 0x3418792A: 2300 MOVS R3, #0 0x3418792C: F6CF 73FF MOVT R3, #0xFFFF 0x34187930: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34187934: 431A ORRS R2, R3 0x34187936: 4310 ORRS R0, R2 0x34187938: 6008 STR R0, [R1] 0x3418793A: F001 F803 BL LL_RCC_IC14_Enable ; 0x34188944 0x3418793E: E00B B 46L701 ; 0x34187958
.L700: 0x34187940: 9804 LDR R0, [SP, #16] 0x34187942: F8D0 0160 LDR.W R0, [R0, #0x0160] 0x34187946: F241 0130 MOVW R1, #0x1030 0x3418794A: F2C0 7101 MOVT R1, #0x0701 0x3418794E: 4288 CMP R0, R1 0x34187950: D102 BNE 46L701 ; 0x34187958 0x34187952: F008 FC83 BL LL_RCC_CLKP_Enable ; 0x3419025C 0x34187956: E7FF B 46L701 ; 0x34187958
.L701: 0x34187958: 9804 LDR R0, [SP, #16] 0x3418795A: F8D0 0160 LDR.W R0, [R0, #0x0160] 0x3418795E: F001 F857 BL LL_RCC_SetUSARTClockSource ; 0x34188A10
.L702: 0x34187962: 9804 LDR R0, [SP, #16] 0x34187964: 7940 LDRB R0, [R0, #5] 0x34187966: 0680 LSLS R0, R0, #26 0x34187968: 2800 CMP R0, #0 0x3418796A: F140 80F5 BPL.W 46L719 ; 0x34187B58 0x3418796E: 9804 LDR R0, [SP, #16] 0x34187970: F8D0 0164 LDR.W R0, [R0, #0x0164] 0x34187974: F241 4130 MOVW R1, #0x1430 0x34187978: F2C0 7100 MOVT R1, #0x0700 0x3418797C: 4288 CMP R0, R1 0x3418797E: D035 BEQ 46L703 ; 0x341879EC 0x34187980: 9804 LDR R0, [SP, #16] 0x34187982: F8D0 0164 LDR.W R0, [R0, #0x0164] 0x34187986: F241 4130 MOVW R1, #0x1430 0x3418798A: F2C0 7101 MOVT R1, #0x0701 0x3418798E: 4288 CMP R0, R1 0x34187990: D02C BEQ 46L703 ; 0x341879EC 0x34187992: 9804 LDR R0, [SP, #16] 0x34187994: F8D0 0164 LDR.W R0, [R0, #0x0164] 0x34187998: F241 4130 MOVW R1, #0x1430 0x3418799C: F2C0 7102 MOVT R1, #0x0702 0x341879A0: 4288 CMP R0, R1 0x341879A2: D023 BEQ 46L703 ; 0x341879EC 0x341879A4: 9804 LDR R0, [SP, #16] 0x341879A6: F8D0 0164 LDR.W R0, [R0, #0x0164] 0x341879AA: F241 4130 MOVW R1, #0x1430 0x341879AE: F2C0 7103 MOVT R1, #0x0703 0x341879B2: 4288 CMP R0, R1 0x341879B4: D01A BEQ 46L703 ; 0x341879EC 0x341879B6: 9804 LDR R0, [SP, #16] 0x341879B8: F8D0 0164 LDR.W R0, [R0, #0x0164] 0x341879BC: F241 4130 MOVW R1, #0x1430 0x341879C0: F2C0 7104 MOVT R1, #0x0704 0x341879C4: 4288 CMP R0, R1 0x341879C6: D011 BEQ 46L703 ; 0x341879EC 0x341879C8: 9804 LDR R0, [SP, #16] 0x341879CA: F8D0 0164 LDR.W R0, [R0, #0x0164] 0x341879CE: F241 4130 MOVW R1, #0x1430 0x341879D2: F2C0 7105 MOVT R1, #0x0705 0x341879D6: 4288 CMP R0, R1 0x341879D8: D008 BEQ 46L703 ; 0x341879EC 0x341879DA: 9804 LDR R0, [SP, #16] 0x341879DC: F8D0 0164 LDR.W R0, [R0, #0x0164] 0x341879E0: F241 4130 MOVW R1, #0x1430 0x341879E4: F2C0 7106 MOVT R1, #0x0706 0x341879E8: 4288 CMP R0, R1 0x341879EA: D100 BNE 46L704 ; 0x341879EE
.L703: 0x341879EC: E007 B 46L705 ; 0x341879FE
.L704: 0x341879EE: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341879F2: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341879F6: F240 71FC MOVW R1, #0x07FC 0x341879FA: F006 F94D BL assert_failed ; 0x3418DC98
.L705: 0x341879FE: 9804 LDR R0, [SP, #16] 0x34187A00: F8D0 0164 LDR.W R0, [R0, #0x0164] 0x34187A04: F241 4130 MOVW R1, #0x1430 0x34187A08: F2C0 7102 MOVT R1, #0x0702 0x34187A0C: 4288 CMP R0, R1 0x34187A0E: D144 BNE 46L711 ; 0x34187A9A 0x34187A10: 9804 LDR R0, [SP, #16] 0x34187A12: 6C80 LDR R0, [R0, #72] 0x34187A14: B170 CBZ R0, .L706 ; 0x34187A34 0x34187A16: 9804 LDR R0, [SP, #16] 0x34187A18: 6C80 LDR R0, [R0, #72] 0x34187A1A: F1B0 5F80 CMP.W R0, #0x10000000 0x34187A1E: D009 BEQ 46L706 ; 0x34187A34 0x34187A20: 9804 LDR R0, [SP, #16] 0x34187A22: 6C80 LDR R0, [R0, #72] 0x34187A24: F1B0 5F00 CMP.W R0, #0x20000000 0x34187A28: D004 BEQ 46L706 ; 0x34187A34 0x34187A2A: 9804 LDR R0, [SP, #16] 0x34187A2C: 6C80 LDR R0, [R0, #72] 0x34187A2E: F1B0 5F40 CMP.W R0, #0x30000000 0x34187A32: D100 BNE 46L707 ; 0x34187A36
.L706: 0x34187A34: E007 B 46L708 ; 0x34187A46
.L707: 0x34187A36: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34187A3A: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34187A3E: F640 0101 MOVW R1, #0x0801 0x34187A42: F006 F929 BL assert_failed ; 0x3418DC98
.L708: 0x34187A46: 9804 LDR R0, [SP, #16] 0x34187A48: 6CC0 LDR R0, [R0, #76] 0x34187A4A: B128 CBZ R0, .L709 ; 0x34187A58 0x34187A4C: 9804 LDR R0, [SP, #16] 0x34187A4E: 6CC0 LDR R0, [R0, #76] 0x34187A50: F5B0 7F80 CMP.W R0, #0x0100 0x34187A54: D800 BHI 46L709 ; 0x34187A58 0x34187A56: E007 B 46L710 ; 0x34187A68
.L709: 0x34187A58: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34187A5C: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34187A60: F640 0102 MOVW R1, #0x0802 0x34187A64: F006 F918 BL assert_failed ; 0x3418DC98
.L710: 0x34187A68: F248 01E4 MOVW R1, #0x80E4 0x34187A6C: F2C5 6102 MOVT R1, #0x5602 0x34187A70: 6808 LDR R0, [R1] 0x34187A72: F64F 72FF MOVW R2, #0xFFFF 0x34187A76: F6CC 7200 MOVT R2, #0xCF00 0x34187A7A: 4010 ANDS R0, R2 0x34187A7C: 9B04 LDR R3, [SP, #16] 0x34187A7E: 6C9A LDR R2, [R3, #72] 0x34187A80: F8D3 C04C LDR.W R12, [R3, #76] 0x34187A84: 2300 MOVS R3, #0 0x34187A86: F6CF 73FF MOVT R3, #0xFFFF 0x34187A8A: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34187A8E: 431A ORRS R2, R3 0x34187A90: 4310 ORRS R0, R2 0x34187A92: 6008 STR R0, [R1] 0x34187A94: F000 FF4E BL LL_RCC_IC9_Enable ; 0x34188934 0x34187A98: E059 B 46L718 ; 0x34187B4E
.L711: 0x34187A9A: 9804 LDR R0, [SP, #16] 0x34187A9C: F8D0 0164 LDR.W R0, [R0, #0x0164] 0x34187AA0: F241 4130 MOVW R1, #0x1430 0x34187AA4: F2C0 7103 MOVT R1, #0x0703 0x34187AA8: 4288 CMP R0, R1 0x34187AAA: D144 BNE 46L717 ; 0x34187B36 0x34187AAC: 9804 LDR R0, [SP, #16] 0x34187AAE: 6F00 LDR R0, [R0, #112] 0x34187AB0: B170 CBZ R0, .L712 ; 0x34187AD0 0x34187AB2: 9804 LDR R0, [SP, #16] 0x34187AB4: 6F00 LDR R0, [R0, #112] 0x34187AB6: F1B0 5F80 CMP.W R0, #0x10000000 0x34187ABA: D009 BEQ 46L712 ; 0x34187AD0 0x34187ABC: 9804 LDR R0, [SP, #16] 0x34187ABE: 6F00 LDR R0, [R0, #112] 0x34187AC0: F1B0 5F00 CMP.W R0, #0x20000000 0x34187AC4: D004 BEQ 46L712 ; 0x34187AD0 0x34187AC6: 9804 LDR R0, [SP, #16] 0x34187AC8: 6F00 LDR R0, [R0, #112] 0x34187ACA: F1B0 5F40 CMP.W R0, #0x30000000 0x34187ACE: D100 BNE 46L713 ; 0x34187AD2
.L712: 0x34187AD0: E007 B 46L714 ; 0x34187AE2
.L713: 0x34187AD2: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34187AD6: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34187ADA: F640 010E MOVW R1, #0x080E 0x34187ADE: F006 F8DB BL assert_failed ; 0x3418DC98
.L714: 0x34187AE2: 9804 LDR R0, [SP, #16] 0x34187AE4: 6F40 LDR R0, [R0, #116] 0x34187AE6: B128 CBZ R0, .L715 ; 0x34187AF4 0x34187AE8: 9804 LDR R0, [SP, #16] 0x34187AEA: 6F40 LDR R0, [R0, #116] 0x34187AEC: F5B0 7F80 CMP.W R0, #0x0100 0x34187AF0: D800 BHI 46L715 ; 0x34187AF4 0x34187AF2: E007 B 46L716 ; 0x34187B04
.L715: 0x34187AF4: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34187AF8: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34187AFC: F640 010F MOVW R1, #0x080F 0x34187B00: F006 F8CA BL assert_failed ; 0x3418DC98
.L716: 0x34187B04: F248 01F8 MOVW R1, #0x80F8 0x34187B08: F2C5 6102 MOVT R1, #0x5602 0x34187B0C: 6808 LDR R0, [R1] 0x34187B0E: F64F 72FF MOVW R2, #0xFFFF 0x34187B12: F6CC 7200 MOVT R2, #0xCF00 0x34187B16: 4010 ANDS R0, R2 0x34187B18: 9B04 LDR R3, [SP, #16] 0x34187B1A: 6F1A LDR R2, [R3, #112] 0x34187B1C: F8D3 C074 LDR.W R12, [R3, #116] 0x34187B20: 2300 MOVS R3, #0 0x34187B22: F6CF 73FF MOVT R3, #0xFFFF 0x34187B26: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34187B2A: 431A ORRS R2, R3 0x34187B2C: 4310 ORRS R0, R2 0x34187B2E: 6008 STR R0, [R1] 0x34187B30: F000 FF08 BL LL_RCC_IC14_Enable ; 0x34188944 0x34187B34: E00B B 46L718 ; 0x34187B4E
.L717: 0x34187B36: 9804 LDR R0, [SP, #16] 0x34187B38: F8D0 0164 LDR.W R0, [R0, #0x0164] 0x34187B3C: F241 4130 MOVW R1, #0x1430 0x34187B40: F2C0 7101 MOVT R1, #0x0701 0x34187B44: 4288 CMP R0, R1 0x34187B46: D102 BNE 46L718 ; 0x34187B4E 0x34187B48: F008 FB88 BL LL_RCC_CLKP_Enable ; 0x3419025C 0x34187B4C: E7FF B 46L718 ; 0x34187B4E
.L718: 0x34187B4E: 9804 LDR R0, [SP, #16] 0x34187B50: F8D0 0164 LDR.W R0, [R0, #0x0164] 0x34187B54: F000 FF5C BL LL_RCC_SetUSARTClockSource ; 0x34188A10
.L719: 0x34187B58: 9804 LDR R0, [SP, #16] 0x34187B5A: 7940 LDRB R0, [R0, #5] 0x34187B5C: 0640 LSLS R0, R0, #25 0x34187B5E: 2800 CMP R0, #0 0x34187B60: F140 80F5 BPL.W 46L736 ; 0x34187D4E 0x34187B64: 9804 LDR R0, [SP, #16] 0x34187B66: F8D0 0168 LDR.W R0, [R0, #0x0168] 0x34187B6A: F641 0130 MOVW R1, #0x1830 0x34187B6E: F2C0 7100 MOVT R1, #0x0700 0x34187B72: 4288 CMP R0, R1 0x34187B74: D035 BEQ 46L720 ; 0x34187BE2 0x34187B76: 9804 LDR R0, [SP, #16] 0x34187B78: F8D0 0168 LDR.W R0, [R0, #0x0168] 0x34187B7C: F641 0130 MOVW R1, #0x1830 0x34187B80: F2C0 7101 MOVT R1, #0x0701 0x34187B84: 4288 CMP R0, R1 0x34187B86: D02C BEQ 46L720 ; 0x34187BE2 0x34187B88: 9804 LDR R0, [SP, #16] 0x34187B8A: F8D0 0168 LDR.W R0, [R0, #0x0168] 0x34187B8E: F641 0130 MOVW R1, #0x1830 0x34187B92: F2C0 7102 MOVT R1, #0x0702 0x34187B96: 4288 CMP R0, R1 0x34187B98: D023 BEQ 46L720 ; 0x34187BE2 0x34187B9A: 9804 LDR R0, [SP, #16] 0x34187B9C: F8D0 0168 LDR.W R0, [R0, #0x0168] 0x34187BA0: F641 0130 MOVW R1, #0x1830 0x34187BA4: F2C0 7103 MOVT R1, #0x0703 0x34187BA8: 4288 CMP R0, R1 0x34187BAA: D01A BEQ 46L720 ; 0x34187BE2 0x34187BAC: 9804 LDR R0, [SP, #16] 0x34187BAE: F8D0 0168 LDR.W R0, [R0, #0x0168] 0x34187BB2: F641 0130 MOVW R1, #0x1830 0x34187BB6: F2C0 7104 MOVT R1, #0x0704 0x34187BBA: 4288 CMP R0, R1 0x34187BBC: D011 BEQ 46L720 ; 0x34187BE2 0x34187BBE: 9804 LDR R0, [SP, #16] 0x34187BC0: F8D0 0168 LDR.W R0, [R0, #0x0168] 0x34187BC4: F641 0130 MOVW R1, #0x1830 0x34187BC8: F2C0 7105 MOVT R1, #0x0705 0x34187BCC: 4288 CMP R0, R1 0x34187BCE: D008 BEQ 46L720 ; 0x34187BE2 0x34187BD0: 9804 LDR R0, [SP, #16] 0x34187BD2: F8D0 0168 LDR.W R0, [R0, #0x0168] 0x34187BD6: F641 0130 MOVW R1, #0x1830 0x34187BDA: F2C0 7106 MOVT R1, #0x0706 0x34187BDE: 4288 CMP R0, R1 0x34187BE0: D100 BNE 46L721 ; 0x34187BE4
.L720: 0x34187BE2: E007 B 46L722 ; 0x34187BF4
.L721: 0x34187BE4: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34187BE8: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34187BEC: F640 0129 MOVW R1, #0x0829 0x34187BF0: F006 F852 BL assert_failed ; 0x3418DC98
.L722: 0x34187BF4: 9804 LDR R0, [SP, #16] 0x34187BF6: F8D0 0168 LDR.W R0, [R0, #0x0168] 0x34187BFA: F641 0130 MOVW R1, #0x1830 0x34187BFE: F2C0 7102 MOVT R1, #0x0702 0x34187C02: 4288 CMP R0, R1 0x34187C04: D144 BNE 46L728 ; 0x34187C90 0x34187C06: 9804 LDR R0, [SP, #16] 0x34187C08: 6C80 LDR R0, [R0, #72] 0x34187C0A: B170 CBZ R0, .L723 ; 0x34187C2A 0x34187C0C: 9804 LDR R0, [SP, #16] 0x34187C0E: 6C80 LDR R0, [R0, #72] 0x34187C10: F1B0 5F80 CMP.W R0, #0x10000000 0x34187C14: D009 BEQ 46L723 ; 0x34187C2A 0x34187C16: 9804 LDR R0, [SP, #16] 0x34187C18: 6C80 LDR R0, [R0, #72] 0x34187C1A: F1B0 5F00 CMP.W R0, #0x20000000 0x34187C1E: D004 BEQ 46L723 ; 0x34187C2A 0x34187C20: 9804 LDR R0, [SP, #16] 0x34187C22: 6C80 LDR R0, [R0, #72] 0x34187C24: F1B0 5F40 CMP.W R0, #0x30000000 0x34187C28: D100 BNE 46L724 ; 0x34187C2C
.L723: 0x34187C2A: E007 B 46L725 ; 0x34187C3C
.L724: 0x34187C2C: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34187C30: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34187C34: F640 012E MOVW R1, #0x082E 0x34187C38: F006 F82E BL assert_failed ; 0x3418DC98
.L725: 0x34187C3C: 9804 LDR R0, [SP, #16] 0x34187C3E: 6CC0 LDR R0, [R0, #76] 0x34187C40: B128 CBZ R0, .L726 ; 0x34187C4E 0x34187C42: 9804 LDR R0, [SP, #16] 0x34187C44: 6CC0 LDR R0, [R0, #76] 0x34187C46: F5B0 7F80 CMP.W R0, #0x0100 0x34187C4A: D800 BHI 46L726 ; 0x34187C4E 0x34187C4C: E007 B 46L727 ; 0x34187C5E
.L726: 0x34187C4E: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34187C52: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34187C56: F640 012F MOVW R1, #0x082F 0x34187C5A: F006 F81D BL assert_failed ; 0x3418DC98
.L727: 0x34187C5E: F248 01E4 MOVW R1, #0x80E4 0x34187C62: F2C5 6102 MOVT R1, #0x5602 0x34187C66: 6808 LDR R0, [R1] 0x34187C68: F64F 72FF MOVW R2, #0xFFFF 0x34187C6C: F6CC 7200 MOVT R2, #0xCF00 0x34187C70: 4010 ANDS R0, R2 0x34187C72: 9B04 LDR R3, [SP, #16] 0x34187C74: 6C9A LDR R2, [R3, #72] 0x34187C76: F8D3 C04C LDR.W R12, [R3, #76] 0x34187C7A: 2300 MOVS R3, #0 0x34187C7C: F6CF 73FF MOVT R3, #0xFFFF 0x34187C80: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34187C84: 431A ORRS R2, R3 0x34187C86: 4310 ORRS R0, R2 0x34187C88: 6008 STR R0, [R1] 0x34187C8A: F000 FE53 BL LL_RCC_IC9_Enable ; 0x34188934 0x34187C8E: E059 B 46L735 ; 0x34187D44
.L728: 0x34187C90: 9804 LDR R0, [SP, #16] 0x34187C92: F8D0 0168 LDR.W R0, [R0, #0x0168] 0x34187C96: F641 0130 MOVW R1, #0x1830 0x34187C9A: F2C0 7103 MOVT R1, #0x0703 0x34187C9E: 4288 CMP R0, R1 0x34187CA0: D144 BNE 46L734 ; 0x34187D2C 0x34187CA2: 9804 LDR R0, [SP, #16] 0x34187CA4: 6F00 LDR R0, [R0, #112] 0x34187CA6: B170 CBZ R0, .L729 ; 0x34187CC6 0x34187CA8: 9804 LDR R0, [SP, #16] 0x34187CAA: 6F00 LDR R0, [R0, #112] 0x34187CAC: F1B0 5F80 CMP.W R0, #0x10000000 0x34187CB0: D009 BEQ 46L729 ; 0x34187CC6 0x34187CB2: 9804 LDR R0, [SP, #16] 0x34187CB4: 6F00 LDR R0, [R0, #112] 0x34187CB6: F1B0 5F00 CMP.W R0, #0x20000000 0x34187CBA: D004 BEQ 46L729 ; 0x34187CC6 0x34187CBC: 9804 LDR R0, [SP, #16] 0x34187CBE: 6F00 LDR R0, [R0, #112] 0x34187CC0: F1B0 5F40 CMP.W R0, #0x30000000 0x34187CC4: D100 BNE 46L730 ; 0x34187CC8
.L729: 0x34187CC6: E007 B 46L731 ; 0x34187CD8
.L730: 0x34187CC8: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34187CCC: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34187CD0: F640 013B MOVW R1, #0x083B 0x34187CD4: F005 FFE0 BL assert_failed ; 0x3418DC98
.L731: 0x34187CD8: 9804 LDR R0, [SP, #16] 0x34187CDA: 6F40 LDR R0, [R0, #116] 0x34187CDC: B128 CBZ R0, .L732 ; 0x34187CEA 0x34187CDE: 9804 LDR R0, [SP, #16] 0x34187CE0: 6F40 LDR R0, [R0, #116] 0x34187CE2: F5B0 7F80 CMP.W R0, #0x0100 0x34187CE6: D800 BHI 46L732 ; 0x34187CEA 0x34187CE8: E007 B 46L733 ; 0x34187CFA
.L732: 0x34187CEA: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34187CEE: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34187CF2: F640 013C MOVW R1, #0x083C 0x34187CF6: F005 FFCF BL assert_failed ; 0x3418DC98
.L733: 0x34187CFA: F248 01F8 MOVW R1, #0x80F8 0x34187CFE: F2C5 6102 MOVT R1, #0x5602 0x34187D02: 6808 LDR R0, [R1] 0x34187D04: F64F 72FF MOVW R2, #0xFFFF 0x34187D08: F6CC 7200 MOVT R2, #0xCF00 0x34187D0C: 4010 ANDS R0, R2 0x34187D0E: 9B04 LDR R3, [SP, #16] 0x34187D10: 6F1A LDR R2, [R3, #112] 0x34187D12: F8D3 C074 LDR.W R12, [R3, #116] 0x34187D16: 2300 MOVS R3, #0 0x34187D18: F6CF 73FF MOVT R3, #0xFFFF 0x34187D1C: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34187D20: 431A ORRS R2, R3 0x34187D22: 4310 ORRS R0, R2 0x34187D24: 6008 STR R0, [R1] 0x34187D26: F000 FE0D BL LL_RCC_IC14_Enable ; 0x34188944 0x34187D2A: E00B B 46L735 ; 0x34187D44
.L734: 0x34187D2C: 9804 LDR R0, [SP, #16] 0x34187D2E: F8D0 0168 LDR.W R0, [R0, #0x0168] 0x34187D32: F641 0130 MOVW R1, #0x1830 0x34187D36: F2C0 7101 MOVT R1, #0x0701 0x34187D3A: 4288 CMP R0, R1 0x34187D3C: D102 BNE 46L735 ; 0x34187D44 0x34187D3E: F008 FA8D BL LL_RCC_CLKP_Enable ; 0x3419025C 0x34187D42: E7FF B 46L735 ; 0x34187D44
.L735: 0x34187D44: 9804 LDR R0, [SP, #16] 0x34187D46: F8D0 0168 LDR.W R0, [R0, #0x0168] 0x34187D4A: F000 FE61 BL LL_RCC_SetUSARTClockSource ; 0x34188A10
.L736: 0x34187D4E: 9804 LDR R0, [SP, #16] 0x34187D50: 7940 LDRB R0, [R0, #5] 0x34187D52: 0600 LSLS R0, R0, #24 0x34187D54: 2800 CMP R0, #0 0x34187D56: F140 80F5 BPL.W 46L753 ; 0x34187F44 0x34187D5A: 9804 LDR R0, [SP, #16] 0x34187D5C: F8D0 016C LDR.W R0, [R0, #0x016C] 0x34187D60: F641 4130 MOVW R1, #0x1C30 0x34187D64: F2C0 7100 MOVT R1, #0x0700 0x34187D68: 4288 CMP R0, R1 0x34187D6A: D035 BEQ 46L737 ; 0x34187DD8 0x34187D6C: 9804 LDR R0, [SP, #16] 0x34187D6E: F8D0 016C LDR.W R0, [R0, #0x016C] 0x34187D72: F641 4130 MOVW R1, #0x1C30 0x34187D76: F2C0 7101 MOVT R1, #0x0701 0x34187D7A: 4288 CMP R0, R1 0x34187D7C: D02C BEQ 46L737 ; 0x34187DD8 0x34187D7E: 9804 LDR R0, [SP, #16] 0x34187D80: F8D0 016C LDR.W R0, [R0, #0x016C] 0x34187D84: F641 4130 MOVW R1, #0x1C30 0x34187D88: F2C0 7102 MOVT R1, #0x0702 0x34187D8C: 4288 CMP R0, R1 0x34187D8E: D023 BEQ 46L737 ; 0x34187DD8 0x34187D90: 9804 LDR R0, [SP, #16] 0x34187D92: F8D0 016C LDR.W R0, [R0, #0x016C] 0x34187D96: F641 4130 MOVW R1, #0x1C30 0x34187D9A: F2C0 7103 MOVT R1, #0x0703 0x34187D9E: 4288 CMP R0, R1 0x34187DA0: D01A BEQ 46L737 ; 0x34187DD8 0x34187DA2: 9804 LDR R0, [SP, #16] 0x34187DA4: F8D0 016C LDR.W R0, [R0, #0x016C] 0x34187DA8: F641 4130 MOVW R1, #0x1C30 0x34187DAC: F2C0 7104 MOVT R1, #0x0704 0x34187DB0: 4288 CMP R0, R1 0x34187DB2: D011 BEQ 46L737 ; 0x34187DD8 0x34187DB4: 9804 LDR R0, [SP, #16] 0x34187DB6: F8D0 016C LDR.W R0, [R0, #0x016C] 0x34187DBA: F641 4130 MOVW R1, #0x1C30 0x34187DBE: F2C0 7105 MOVT R1, #0x0705 0x34187DC2: 4288 CMP R0, R1 0x34187DC4: D008 BEQ 46L737 ; 0x34187DD8 0x34187DC6: 9804 LDR R0, [SP, #16] 0x34187DC8: F8D0 016C LDR.W R0, [R0, #0x016C] 0x34187DCC: F641 4130 MOVW R1, #0x1C30 0x34187DD0: F2C0 7106 MOVT R1, #0x0706 0x34187DD4: 4288 CMP R0, R1 0x34187DD6: D100 BNE 46L738 ; 0x34187DDA
.L737: 0x34187DD8: E007 B 46L739 ; 0x34187DEA
.L738: 0x34187DDA: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34187DDE: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34187DE2: F640 0156 MOVW R1, #0x0856 0x34187DE6: F005 FF57 BL assert_failed ; 0x3418DC98
.L739: 0x34187DEA: 9804 LDR R0, [SP, #16] 0x34187DEC: F8D0 016C LDR.W R0, [R0, #0x016C] 0x34187DF0: F641 4130 MOVW R1, #0x1C30 0x34187DF4: F2C0 7102 MOVT R1, #0x0702 0x34187DF8: 4288 CMP R0, R1 0x34187DFA: D144 BNE 46L745 ; 0x34187E86 0x34187DFC: 9804 LDR R0, [SP, #16] 0x34187DFE: 6C80 LDR R0, [R0, #72] 0x34187E00: B170 CBZ R0, .L740 ; 0x34187E20 0x34187E02: 9804 LDR R0, [SP, #16] 0x34187E04: 6C80 LDR R0, [R0, #72] 0x34187E06: F1B0 5F80 CMP.W R0, #0x10000000 0x34187E0A: D009 BEQ 46L740 ; 0x34187E20 0x34187E0C: 9804 LDR R0, [SP, #16] 0x34187E0E: 6C80 LDR R0, [R0, #72] 0x34187E10: F1B0 5F00 CMP.W R0, #0x20000000 0x34187E14: D004 BEQ 46L740 ; 0x34187E20 0x34187E16: 9804 LDR R0, [SP, #16] 0x34187E18: 6C80 LDR R0, [R0, #72] 0x34187E1A: F1B0 5F40 CMP.W R0, #0x30000000 0x34187E1E: D100 BNE 46L741 ; 0x34187E22
.L740: 0x34187E20: E007 B 46L742 ; 0x34187E32
.L741: 0x34187E22: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34187E26: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34187E2A: F640 015B MOVW R1, #0x085B 0x34187E2E: F005 FF33 BL assert_failed ; 0x3418DC98
.L742: 0x34187E32: 9804 LDR R0, [SP, #16] 0x34187E34: 6CC0 LDR R0, [R0, #76] 0x34187E36: B128 CBZ R0, .L743 ; 0x34187E44 0x34187E38: 9804 LDR R0, [SP, #16] 0x34187E3A: 6CC0 LDR R0, [R0, #76] 0x34187E3C: F5B0 7F80 CMP.W R0, #0x0100 0x34187E40: D800 BHI 46L743 ; 0x34187E44 0x34187E42: E007 B 46L744 ; 0x34187E54
.L743: 0x34187E44: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34187E48: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34187E4C: F640 015C MOVW R1, #0x085C 0x34187E50: F005 FF22 BL assert_failed ; 0x3418DC98
.L744: 0x34187E54: F248 01E4 MOVW R1, #0x80E4 0x34187E58: F2C5 6102 MOVT R1, #0x5602 0x34187E5C: 6808 LDR R0, [R1] 0x34187E5E: F64F 72FF MOVW R2, #0xFFFF 0x34187E62: F6CC 7200 MOVT R2, #0xCF00 0x34187E66: 4010 ANDS R0, R2 0x34187E68: 9B04 LDR R3, [SP, #16] 0x34187E6A: 6C9A LDR R2, [R3, #72] 0x34187E6C: F8D3 C04C LDR.W R12, [R3, #76] 0x34187E70: 2300 MOVS R3, #0 0x34187E72: F6CF 73FF MOVT R3, #0xFFFF 0x34187E76: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34187E7A: 431A ORRS R2, R3 0x34187E7C: 4310 ORRS R0, R2 0x34187E7E: 6008 STR R0, [R1] 0x34187E80: F000 FD58 BL LL_RCC_IC9_Enable ; 0x34188934 0x34187E84: E059 B 46L752 ; 0x34187F3A
.L745: 0x34187E86: 9804 LDR R0, [SP, #16] 0x34187E88: F8D0 016C LDR.W R0, [R0, #0x016C] 0x34187E8C: F641 4130 MOVW R1, #0x1C30 0x34187E90: F2C0 7103 MOVT R1, #0x0703 0x34187E94: 4288 CMP R0, R1 0x34187E96: D144 BNE 46L751 ; 0x34187F22 0x34187E98: 9804 LDR R0, [SP, #16] 0x34187E9A: 6F00 LDR R0, [R0, #112] 0x34187E9C: B170 CBZ R0, .L746 ; 0x34187EBC 0x34187E9E: 9804 LDR R0, [SP, #16] 0x34187EA0: 6F00 LDR R0, [R0, #112] 0x34187EA2: F1B0 5F80 CMP.W R0, #0x10000000 0x34187EA6: D009 BEQ 46L746 ; 0x34187EBC 0x34187EA8: 9804 LDR R0, [SP, #16] 0x34187EAA: 6F00 LDR R0, [R0, #112] 0x34187EAC: F1B0 5F00 CMP.W R0, #0x20000000 0x34187EB0: D004 BEQ 46L746 ; 0x34187EBC 0x34187EB2: 9804 LDR R0, [SP, #16] 0x34187EB4: 6F00 LDR R0, [R0, #112] 0x34187EB6: F1B0 5F40 CMP.W R0, #0x30000000 0x34187EBA: D100 BNE 46L747 ; 0x34187EBE
.L746: 0x34187EBC: E007 B 46L748 ; 0x34187ECE
.L747: 0x34187EBE: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34187EC2: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34187EC6: F640 0168 MOVW R1, #0x0868 0x34187ECA: F005 FEE5 BL assert_failed ; 0x3418DC98
.L748: 0x34187ECE: 9804 LDR R0, [SP, #16] 0x34187ED0: 6F40 LDR R0, [R0, #116] 0x34187ED2: B128 CBZ R0, .L749 ; 0x34187EE0 0x34187ED4: 9804 LDR R0, [SP, #16] 0x34187ED6: 6F40 LDR R0, [R0, #116] 0x34187ED8: F5B0 7F80 CMP.W R0, #0x0100 0x34187EDC: D800 BHI 46L749 ; 0x34187EE0 0x34187EDE: E007 B 46L750 ; 0x34187EF0
.L749: 0x34187EE0: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34187EE4: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34187EE8: F640 0169 MOVW R1, #0x0869 0x34187EEC: F005 FED4 BL assert_failed ; 0x3418DC98
.L750: 0x34187EF0: F248 01F8 MOVW R1, #0x80F8 0x34187EF4: F2C5 6102 MOVT R1, #0x5602 0x34187EF8: 6808 LDR R0, [R1] 0x34187EFA: F64F 72FF MOVW R2, #0xFFFF 0x34187EFE: F6CC 7200 MOVT R2, #0xCF00 0x34187F02: 4010 ANDS R0, R2 0x34187F04: 9B04 LDR R3, [SP, #16] 0x34187F06: 6F1A LDR R2, [R3, #112] 0x34187F08: F8D3 C074 LDR.W R12, [R3, #116] 0x34187F0C: 2300 MOVS R3, #0 0x34187F0E: F6CF 73FF MOVT R3, #0xFFFF 0x34187F12: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34187F16: 431A ORRS R2, R3 0x34187F18: 4310 ORRS R0, R2 0x34187F1A: 6008 STR R0, [R1] 0x34187F1C: F000 FD12 BL LL_RCC_IC14_Enable ; 0x34188944 0x34187F20: E00B B 46L752 ; 0x34187F3A
.L751: 0x34187F22: 9804 LDR R0, [SP, #16] 0x34187F24: F8D0 016C LDR.W R0, [R0, #0x016C] 0x34187F28: F641 4130 MOVW R1, #0x1C30 0x34187F2C: F2C0 7101 MOVT R1, #0x0701 0x34187F30: 4288 CMP R0, R1 0x34187F32: D102 BNE 46L752 ; 0x34187F3A 0x34187F34: F008 F992 BL LL_RCC_CLKP_Enable ; 0x3419025C 0x34187F38: E7FF B 46L752 ; 0x34187F3A
.L752: 0x34187F3A: 9804 LDR R0, [SP, #16] 0x34187F3C: F8D0 016C LDR.W R0, [R0, #0x016C] 0x34187F40: F000 FD66 BL LL_RCC_SetUSARTClockSource ; 0x34188A10
.L753: 0x34187F44: 9804 LDR R0, [SP, #16] 0x34187F46: 7980 LDRB R0, [R0, #6] 0x34187F48: 07C0 LSLS R0, R0, #31 0x34187F4A: 2800 CMP R0, #0 0x34187F4C: F000 80EB BEQ.W 46L770 ; 0x34188126 0x34187F50: 9804 LDR R0, [SP, #16] 0x34187F52: F8D0 0170 LDR.W R0, [R0, #0x0170] 0x34187F56: 2134 MOVS R1, #52 0x34187F58: F2C0 7100 MOVT R1, #0x0700 0x34187F5C: 4288 CMP R0, R1 0x34187F5E: D02F BEQ 46L754 ; 0x34187FC0 0x34187F60: 9804 LDR R0, [SP, #16] 0x34187F62: F8D0 0170 LDR.W R0, [R0, #0x0170] 0x34187F66: 2134 MOVS R1, #52 0x34187F68: F2C0 7101 MOVT R1, #0x0701 0x34187F6C: 4288 CMP R0, R1 0x34187F6E: D027 BEQ 46L754 ; 0x34187FC0 0x34187F70: 9804 LDR R0, [SP, #16] 0x34187F72: F8D0 0170 LDR.W R0, [R0, #0x0170] 0x34187F76: 2134 MOVS R1, #52 0x34187F78: F2C0 7102 MOVT R1, #0x0702 0x34187F7C: 4288 CMP R0, R1 0x34187F7E: D01F BEQ 46L754 ; 0x34187FC0 0x34187F80: 9804 LDR R0, [SP, #16] 0x34187F82: F8D0 0170 LDR.W R0, [R0, #0x0170] 0x34187F86: 2134 MOVS R1, #52 0x34187F88: F2C0 7103 MOVT R1, #0x0703 0x34187F8C: 4288 CMP R0, R1 0x34187F8E: D017 BEQ 46L754 ; 0x34187FC0 0x34187F90: 9804 LDR R0, [SP, #16] 0x34187F92: F8D0 0170 LDR.W R0, [R0, #0x0170] 0x34187F96: 2134 MOVS R1, #52 0x34187F98: F2C0 7104 MOVT R1, #0x0704 0x34187F9C: 4288 CMP R0, R1 0x34187F9E: D00F BEQ 46L754 ; 0x34187FC0 0x34187FA0: 9804 LDR R0, [SP, #16] 0x34187FA2: F8D0 0170 LDR.W R0, [R0, #0x0170] 0x34187FA6: 2134 MOVS R1, #52 0x34187FA8: F2C0 7105 MOVT R1, #0x0705 0x34187FAC: 4288 CMP R0, R1 0x34187FAE: D007 BEQ 46L754 ; 0x34187FC0 0x34187FB0: 9804 LDR R0, [SP, #16] 0x34187FB2: F8D0 0170 LDR.W R0, [R0, #0x0170] 0x34187FB6: 2134 MOVS R1, #52 0x34187FB8: F2C0 7106 MOVT R1, #0x0706 0x34187FBC: 4288 CMP R0, R1 0x34187FBE: D100 BNE 46L755 ; 0x34187FC2
.L754: 0x34187FC0: E007 B 46L756 ; 0x34187FD2
.L755: 0x34187FC2: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34187FC6: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34187FCA: F640 0183 MOVW R1, #0x0883 0x34187FCE: F005 FE63 BL assert_failed ; 0x3418DC98
.L756: 0x34187FD2: 9804 LDR R0, [SP, #16] 0x34187FD4: F8D0 0170 LDR.W R0, [R0, #0x0170] 0x34187FD8: 2134 MOVS R1, #52 0x34187FDA: F2C0 7102 MOVT R1, #0x0702 0x34187FDE: 4288 CMP R0, R1 0x34187FE0: D144 BNE 46L762 ; 0x3418806C 0x34187FE2: 9804 LDR R0, [SP, #16] 0x34187FE4: 6C80 LDR R0, [R0, #72] 0x34187FE6: B170 CBZ R0, .L757 ; 0x34188006 0x34187FE8: 9804 LDR R0, [SP, #16] 0x34187FEA: 6C80 LDR R0, [R0, #72] 0x34187FEC: F1B0 5F80 CMP.W R0, #0x10000000 0x34187FF0: D009 BEQ 46L757 ; 0x34188006 0x34187FF2: 9804 LDR R0, [SP, #16] 0x34187FF4: 6C80 LDR R0, [R0, #72] 0x34187FF6: F1B0 5F00 CMP.W R0, #0x20000000 0x34187FFA: D004 BEQ 46L757 ; 0x34188006 0x34187FFC: 9804 LDR R0, [SP, #16] 0x34187FFE: 6C80 LDR R0, [R0, #72] 0x34188000: F1B0 5F40 CMP.W R0, #0x30000000 0x34188004: D100 BNE 46L758 ; 0x34188008
.L757: 0x34188006: E007 B 46L759 ; 0x34188018
.L758: 0x34188008: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x3418800C: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34188010: F640 0188 MOVW R1, #0x0888 0x34188014: F005 FE40 BL assert_failed ; 0x3418DC98
.L759: 0x34188018: 9804 LDR R0, [SP, #16] 0x3418801A: 6CC0 LDR R0, [R0, #76] 0x3418801C: B128 CBZ R0, .L760 ; 0x3418802A 0x3418801E: 9804 LDR R0, [SP, #16] 0x34188020: 6CC0 LDR R0, [R0, #76] 0x34188022: F5B0 7F80 CMP.W R0, #0x0100 0x34188026: D800 BHI 46L760 ; 0x3418802A 0x34188028: E007 B 46L761 ; 0x3418803A
.L760: 0x3418802A: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x3418802E: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34188032: F640 0189 MOVW R1, #0x0889 0x34188036: F005 FE2F BL assert_failed ; 0x3418DC98
.L761: 0x3418803A: F248 01E4 MOVW R1, #0x80E4 0x3418803E: F2C5 6102 MOVT R1, #0x5602 0x34188042: 6808 LDR R0, [R1] 0x34188044: F64F 72FF MOVW R2, #0xFFFF 0x34188048: F6CC 7200 MOVT R2, #0xCF00 0x3418804C: 4010 ANDS R0, R2 0x3418804E: 9B04 LDR R3, [SP, #16] 0x34188050: 6C9A LDR R2, [R3, #72] 0x34188052: F8D3 C04C LDR.W R12, [R3, #76] 0x34188056: 2300 MOVS R3, #0 0x34188058: F6CF 73FF MOVT R3, #0xFFFF 0x3418805C: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34188060: 431A ORRS R2, R3 0x34188062: 4310 ORRS R0, R2 0x34188064: 6008 STR R0, [R1] 0x34188066: F000 FC65 BL LL_RCC_IC9_Enable ; 0x34188934 0x3418806A: E057 B 46L769 ; 0x3418811C
.L762: 0x3418806C: 9804 LDR R0, [SP, #16] 0x3418806E: F8D0 0170 LDR.W R0, [R0, #0x0170] 0x34188072: 2134 MOVS R1, #52 0x34188074: F2C0 7103 MOVT R1, #0x0703 0x34188078: 4288 CMP R0, R1 0x3418807A: D144 BNE 46L768 ; 0x34188106 0x3418807C: 9804 LDR R0, [SP, #16] 0x3418807E: 6F00 LDR R0, [R0, #112] 0x34188080: B170 CBZ R0, .L763 ; 0x341880A0 0x34188082: 9804 LDR R0, [SP, #16] 0x34188084: 6F00 LDR R0, [R0, #112] 0x34188086: F1B0 5F80 CMP.W R0, #0x10000000 0x3418808A: D009 BEQ 46L763 ; 0x341880A0 0x3418808C: 9804 LDR R0, [SP, #16] 0x3418808E: 6F00 LDR R0, [R0, #112] 0x34188090: F1B0 5F00 CMP.W R0, #0x20000000 0x34188094: D004 BEQ 46L763 ; 0x341880A0 0x34188096: 9804 LDR R0, [SP, #16] 0x34188098: 6F00 LDR R0, [R0, #112] 0x3418809A: F1B0 5F40 CMP.W R0, #0x30000000 0x3418809E: D100 BNE 46L764 ; 0x341880A2
.L763: 0x341880A0: E007 B 46L765 ; 0x341880B2
.L764: 0x341880A2: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341880A6: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341880AA: F640 0195 MOVW R1, #0x0895 0x341880AE: F005 FDF3 BL assert_failed ; 0x3418DC98
.L765: 0x341880B2: 9804 LDR R0, [SP, #16] 0x341880B4: 6F40 LDR R0, [R0, #116] 0x341880B6: B128 CBZ R0, .L766 ; 0x341880C4 0x341880B8: 9804 LDR R0, [SP, #16] 0x341880BA: 6F40 LDR R0, [R0, #116] 0x341880BC: F5B0 7F80 CMP.W R0, #0x0100 0x341880C0: D800 BHI 46L766 ; 0x341880C4 0x341880C2: E007 B 46L767 ; 0x341880D4
.L766: 0x341880C4: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341880C8: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341880CC: F640 0196 MOVW R1, #0x0896 0x341880D0: F005 FDE2 BL assert_failed ; 0x3418DC98
.L767: 0x341880D4: F248 01F8 MOVW R1, #0x80F8 0x341880D8: F2C5 6102 MOVT R1, #0x5602 0x341880DC: 6808 LDR R0, [R1] 0x341880DE: F64F 72FF MOVW R2, #0xFFFF 0x341880E2: F6CC 7200 MOVT R2, #0xCF00 0x341880E6: 4010 ANDS R0, R2 0x341880E8: 9B04 LDR R3, [SP, #16] 0x341880EA: 6F1A LDR R2, [R3, #112] 0x341880EC: F8D3 C074 LDR.W R12, [R3, #116] 0x341880F0: 2300 MOVS R3, #0 0x341880F2: F6CF 73FF MOVT R3, #0xFFFF 0x341880F6: EB03 430C ADD.W R3, R3, R12, LSL #16 0x341880FA: 431A ORRS R2, R3 0x341880FC: 4310 ORRS R0, R2 0x341880FE: 6008 STR R0, [R1] 0x34188100: F000 FC20 BL LL_RCC_IC14_Enable ; 0x34188944 0x34188104: E00A B 46L769 ; 0x3418811C
.L768: 0x34188106: 9804 LDR R0, [SP, #16] 0x34188108: F8D0 0170 LDR.W R0, [R0, #0x0170] 0x3418810C: 2134 MOVS R1, #52 0x3418810E: F2C0 7101 MOVT R1, #0x0701 0x34188112: 4288 CMP R0, R1 0x34188114: D102 BNE 46L769 ; 0x3418811C 0x34188116: F008 F8A1 BL LL_RCC_CLKP_Enable ; 0x3419025C 0x3418811A: E7FF B 46L769 ; 0x3418811C
.L769: 0x3418811C: 9804 LDR R0, [SP, #16] 0x3418811E: F8D0 0170 LDR.W R0, [R0, #0x0170] 0x34188122: F000 FC75 BL LL_RCC_SetUSARTClockSource ; 0x34188A10
.L770: 0x34188126: 9804 LDR R0, [SP, #16] 0x34188128: 7980 LDRB R0, [R0, #6] 0x3418812A: 0780 LSLS R0, R0, #30 0x3418812C: 2800 CMP R0, #0 0x3418812E: F140 80F5 BPL.W 46L787 ; 0x3418831C 0x34188132: 9804 LDR R0, [SP, #16] 0x34188134: F8D0 0174 LDR.W R0, [R0, #0x0174] 0x34188138: F240 4134 MOVW R1, #0x0434 0x3418813C: F2C0 7100 MOVT R1, #0x0700 0x34188140: 4288 CMP R0, R1 0x34188142: D035 BEQ 46L771 ; 0x341881B0 0x34188144: 9804 LDR R0, [SP, #16] 0x34188146: F8D0 0174 LDR.W R0, [R0, #0x0174] 0x3418814A: F240 4134 MOVW R1, #0x0434 0x3418814E: F2C0 7101 MOVT R1, #0x0701 0x34188152: 4288 CMP R0, R1 0x34188154: D02C BEQ 46L771 ; 0x341881B0 0x34188156: 9804 LDR R0, [SP, #16] 0x34188158: F8D0 0174 LDR.W R0, [R0, #0x0174] 0x3418815C: F240 4134 MOVW R1, #0x0434 0x34188160: F2C0 7102 MOVT R1, #0x0702 0x34188164: 4288 CMP R0, R1 0x34188166: D023 BEQ 46L771 ; 0x341881B0 0x34188168: 9804 LDR R0, [SP, #16] 0x3418816A: F8D0 0174 LDR.W R0, [R0, #0x0174] 0x3418816E: F240 4134 MOVW R1, #0x0434 0x34188172: F2C0 7103 MOVT R1, #0x0703 0x34188176: 4288 CMP R0, R1 0x34188178: D01A BEQ 46L771 ; 0x341881B0 0x3418817A: 9804 LDR R0, [SP, #16] 0x3418817C: F8D0 0174 LDR.W R0, [R0, #0x0174] 0x34188180: F240 4134 MOVW R1, #0x0434 0x34188184: F2C0 7104 MOVT R1, #0x0704 0x34188188: 4288 CMP R0, R1 0x3418818A: D011 BEQ 46L771 ; 0x341881B0 0x3418818C: 9804 LDR R0, [SP, #16] 0x3418818E: F8D0 0174 LDR.W R0, [R0, #0x0174] 0x34188192: F240 4134 MOVW R1, #0x0434 0x34188196: F2C0 7105 MOVT R1, #0x0705 0x3418819A: 4288 CMP R0, R1 0x3418819C: D008 BEQ 46L771 ; 0x341881B0 0x3418819E: 9804 LDR R0, [SP, #16] 0x341881A0: F8D0 0174 LDR.W R0, [R0, #0x0174] 0x341881A4: F240 4134 MOVW R1, #0x0434 0x341881A8: F2C0 7106 MOVT R1, #0x0706 0x341881AC: 4288 CMP R0, R1 0x341881AE: D100 BNE 46L772 ; 0x341881B2
.L771: 0x341881B0: E007 B 46L773 ; 0x341881C2
.L772: 0x341881B2: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341881B6: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341881BA: F44F 610B MOV.W R1, #0x08B0 0x341881BE: F005 FD6B BL assert_failed ; 0x3418DC98
.L773: 0x341881C2: 9804 LDR R0, [SP, #16] 0x341881C4: F8D0 0174 LDR.W R0, [R0, #0x0174] 0x341881C8: F240 4134 MOVW R1, #0x0434 0x341881CC: F2C0 7102 MOVT R1, #0x0702 0x341881D0: 4288 CMP R0, R1 0x341881D2: D144 BNE 46L779 ; 0x3418825E 0x341881D4: 9804 LDR R0, [SP, #16] 0x341881D6: 6C80 LDR R0, [R0, #72] 0x341881D8: B170 CBZ R0, .L774 ; 0x341881F8 0x341881DA: 9804 LDR R0, [SP, #16] 0x341881DC: 6C80 LDR R0, [R0, #72] 0x341881DE: F1B0 5F80 CMP.W R0, #0x10000000 0x341881E2: D009 BEQ 46L774 ; 0x341881F8 0x341881E4: 9804 LDR R0, [SP, #16] 0x341881E6: 6C80 LDR R0, [R0, #72] 0x341881E8: F1B0 5F00 CMP.W R0, #0x20000000 0x341881EC: D004 BEQ 46L774 ; 0x341881F8 0x341881EE: 9804 LDR R0, [SP, #16] 0x341881F0: 6C80 LDR R0, [R0, #72] 0x341881F2: F1B0 5F40 CMP.W R0, #0x30000000 0x341881F6: D100 BNE 46L775 ; 0x341881FA
.L774: 0x341881F8: E007 B 46L776 ; 0x3418820A
.L775: 0x341881FA: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341881FE: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34188202: F640 01B5 MOVW R1, #0x08B5 0x34188206: F005 FD47 BL assert_failed ; 0x3418DC98
.L776: 0x3418820A: 9804 LDR R0, [SP, #16] 0x3418820C: 6CC0 LDR R0, [R0, #76] 0x3418820E: B128 CBZ R0, .L777 ; 0x3418821C 0x34188210: 9804 LDR R0, [SP, #16] 0x34188212: 6CC0 LDR R0, [R0, #76] 0x34188214: F5B0 7F80 CMP.W R0, #0x0100 0x34188218: D800 BHI 46L777 ; 0x3418821C 0x3418821A: E007 B 46L778 ; 0x3418822C
.L777: 0x3418821C: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34188220: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34188224: F640 01B6 MOVW R1, #0x08B6 0x34188228: F005 FD36 BL assert_failed ; 0x3418DC98
.L778: 0x3418822C: F248 01E4 MOVW R1, #0x80E4 0x34188230: F2C5 6102 MOVT R1, #0x5602 0x34188234: 6808 LDR R0, [R1] 0x34188236: F64F 72FF MOVW R2, #0xFFFF 0x3418823A: F6CC 7200 MOVT R2, #0xCF00 0x3418823E: 4010 ANDS R0, R2 0x34188240: 9B04 LDR R3, [SP, #16] 0x34188242: 6C9A LDR R2, [R3, #72] 0x34188244: F8D3 C04C LDR.W R12, [R3, #76] 0x34188248: 2300 MOVS R3, #0 0x3418824A: F6CF 73FF MOVT R3, #0xFFFF 0x3418824E: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34188252: 431A ORRS R2, R3 0x34188254: 4310 ORRS R0, R2 0x34188256: 6008 STR R0, [R1] 0x34188258: F000 FB6C BL LL_RCC_IC9_Enable ; 0x34188934 0x3418825C: E059 B 46L786 ; 0x34188312
.L779: 0x3418825E: 9804 LDR R0, [SP, #16] 0x34188260: F8D0 0174 LDR.W R0, [R0, #0x0174] 0x34188264: F240 4134 MOVW R1, #0x0434 0x34188268: F2C0 7103 MOVT R1, #0x0703 0x3418826C: 4288 CMP R0, R1 0x3418826E: D144 BNE 46L785 ; 0x341882FA 0x34188270: 9804 LDR R0, [SP, #16] 0x34188272: 6F00 LDR R0, [R0, #112] 0x34188274: B170 CBZ R0, .L780 ; 0x34188294 0x34188276: 9804 LDR R0, [SP, #16] 0x34188278: 6F00 LDR R0, [R0, #112] 0x3418827A: F1B0 5F80 CMP.W R0, #0x10000000 0x3418827E: D009 BEQ 46L780 ; 0x34188294 0x34188280: 9804 LDR R0, [SP, #16] 0x34188282: 6F00 LDR R0, [R0, #112] 0x34188284: F1B0 5F00 CMP.W R0, #0x20000000 0x34188288: D004 BEQ 46L780 ; 0x34188294 0x3418828A: 9804 LDR R0, [SP, #16] 0x3418828C: 6F00 LDR R0, [R0, #112] 0x3418828E: F1B0 5F40 CMP.W R0, #0x30000000 0x34188292: D100 BNE 46L781 ; 0x34188296
.L780: 0x34188294: E007 B 46L782 ; 0x341882A6
.L781: 0x34188296: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x3418829A: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x3418829E: F640 01C2 MOVW R1, #0x08C2 0x341882A2: F005 FCF9 BL assert_failed ; 0x3418DC98
.L782: 0x341882A6: 9804 LDR R0, [SP, #16] 0x341882A8: 6F40 LDR R0, [R0, #116] 0x341882AA: B128 CBZ R0, .L783 ; 0x341882B8 0x341882AC: 9804 LDR R0, [SP, #16] 0x341882AE: 6F40 LDR R0, [R0, #116] 0x341882B0: F5B0 7F80 CMP.W R0, #0x0100 0x341882B4: D800 BHI 46L783 ; 0x341882B8 0x341882B6: E007 B 46L784 ; 0x341882C8
.L783: 0x341882B8: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341882BC: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341882C0: F640 01C3 MOVW R1, #0x08C3 0x341882C4: F005 FCE8 BL assert_failed ; 0x3418DC98
.L784: 0x341882C8: F248 01F8 MOVW R1, #0x80F8 0x341882CC: F2C5 6102 MOVT R1, #0x5602 0x341882D0: 6808 LDR R0, [R1] 0x341882D2: F64F 72FF MOVW R2, #0xFFFF 0x341882D6: F6CC 7200 MOVT R2, #0xCF00 0x341882DA: 4010 ANDS R0, R2 0x341882DC: 9B04 LDR R3, [SP, #16] 0x341882DE: 6F1A LDR R2, [R3, #112] 0x341882E0: F8D3 C074 LDR.W R12, [R3, #116] 0x341882E4: 2300 MOVS R3, #0 0x341882E6: F6CF 73FF MOVT R3, #0xFFFF 0x341882EA: EB03 430C ADD.W R3, R3, R12, LSL #16 0x341882EE: 431A ORRS R2, R3 0x341882F0: 4310 ORRS R0, R2 0x341882F2: 6008 STR R0, [R1] 0x341882F4: F000 FB26 BL LL_RCC_IC14_Enable ; 0x34188944 0x341882F8: E00B B 46L786 ; 0x34188312
.L785: 0x341882FA: 9804 LDR R0, [SP, #16] 0x341882FC: F8D0 0174 LDR.W R0, [R0, #0x0174] 0x34188300: F240 4134 MOVW R1, #0x0434 0x34188304: F2C0 7101 MOVT R1, #0x0701 0x34188308: 4288 CMP R0, R1 0x3418830A: D102 BNE 46L786 ; 0x34188312 0x3418830C: F007 FFA6 BL LL_RCC_CLKP_Enable ; 0x3419025C 0x34188310: E7FF B 46L786 ; 0x34188312
.L786: 0x34188312: 9804 LDR R0, [SP, #16] 0x34188314: F8D0 0174 LDR.W R0, [R0, #0x0174] 0x34188318: F000 FB7A BL LL_RCC_SetUSARTClockSource ; 0x34188A10
.L787: 0x3418831C: 9804 LDR R0, [SP, #16] 0x3418831E: 7980 LDRB R0, [R0, #6] 0x34188320: 0740 LSLS R0, R0, #29 0x34188322: 2800 CMP R0, #0 0x34188324: F140 80A2 BPL.W 46L799 ; 0x3418846C 0x34188328: 9804 LDR R0, [SP, #16] 0x3418832A: F8D0 0178 LDR.W R0, [R0, #0x0178] 0x3418832E: F640 4114 MOVW R1, #0x0C14 0x34188332: F2C0 3100 MOVT R1, #0x0300 0x34188336: 4288 CMP R0, R1 0x34188338: D023 BEQ 46L788 ; 0x34188382 0x3418833A: 9804 LDR R0, [SP, #16] 0x3418833C: F8D0 0178 LDR.W R0, [R0, #0x0178] 0x34188340: F640 4114 MOVW R1, #0x0C14 0x34188344: F2C0 3101 MOVT R1, #0x0301 0x34188348: 4288 CMP R0, R1 0x3418834A: D01A BEQ 46L788 ; 0x34188382 0x3418834C: 9804 LDR R0, [SP, #16] 0x3418834E: F8D0 0178 LDR.W R0, [R0, #0x0178] 0x34188352: F640 4114 MOVW R1, #0x0C14 0x34188356: F2C0 3102 MOVT R1, #0x0302 0x3418835A: 4288 CMP R0, R1 0x3418835C: D011 BEQ 46L788 ; 0x34188382 0x3418835E: 9804 LDR R0, [SP, #16] 0x34188360: F8D0 0178 LDR.W R0, [R0, #0x0178] 0x34188364: F640 4114 MOVW R1, #0x0C14 0x34188368: F2C0 3103 MOVT R1, #0x0303 0x3418836C: 4288 CMP R0, R1 0x3418836E: D008 BEQ 46L788 ; 0x34188382 0x34188370: 9804 LDR R0, [SP, #16] 0x34188372: F8D0 0178 LDR.W R0, [R0, #0x0178] 0x34188376: F640 4114 MOVW R1, #0x0C14 0x3418837A: F2C8 3103 MOVT R1, #0x8303 0x3418837E: 4288 CMP R0, R1 0x34188380: D100 BNE 46L789 ; 0x34188384
.L788: 0x34188382: E007 B 46L790 ; 0x34188394
.L789: 0x34188384: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34188388: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x3418838C: F640 01DD MOVW R1, #0x08DD 0x34188390: F005 FC82 BL assert_failed ; 0x3418DC98
.L790: 0x34188394: 9804 LDR R0, [SP, #16] 0x34188396: F8D0 0178 LDR.W R0, [R0, #0x0178] 0x3418839A: F640 4114 MOVW R1, #0x0C14 0x3418839E: F2C0 3102 MOVT R1, #0x0302 0x341883A2: 4288 CMP R0, R1 0x341883A4: D144 BNE 46L796 ; 0x34188430 0x341883A6: 9804 LDR R0, [SP, #16] 0x341883A8: 6F80 LDR R0, [R0, #120] 0x341883AA: B170 CBZ R0, .L791 ; 0x341883CA 0x341883AC: 9804 LDR R0, [SP, #16] 0x341883AE: 6F80 LDR R0, [R0, #120] 0x341883B0: F1B0 5F80 CMP.W R0, #0x10000000 0x341883B4: D009 BEQ 46L791 ; 0x341883CA 0x341883B6: 9804 LDR R0, [SP, #16] 0x341883B8: 6F80 LDR R0, [R0, #120] 0x341883BA: F1B0 5F00 CMP.W R0, #0x20000000 0x341883BE: D004 BEQ 46L791 ; 0x341883CA 0x341883C0: 9804 LDR R0, [SP, #16] 0x341883C2: 6F80 LDR R0, [R0, #120] 0x341883C4: F1B0 5F40 CMP.W R0, #0x30000000 0x341883C8: D100 BNE 46L792 ; 0x341883CC
.L791: 0x341883CA: E007 B 46L793 ; 0x341883DC
.L792: 0x341883CC: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341883D0: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341883D4: F640 01E2 MOVW R1, #0x08E2 0x341883D8: F005 FC5E BL assert_failed ; 0x3418DC98
.L793: 0x341883DC: 9804 LDR R0, [SP, #16] 0x341883DE: 6FC0 LDR R0, [R0, #124] 0x341883E0: B128 CBZ R0, .L794 ; 0x341883EE 0x341883E2: 9804 LDR R0, [SP, #16] 0x341883E4: 6FC0 LDR R0, [R0, #124] 0x341883E6: F5B0 7F80 CMP.W R0, #0x0100 0x341883EA: D800 BHI 46L794 ; 0x341883EE 0x341883EC: E007 B 46L795 ; 0x341883FE
.L794: 0x341883EE: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341883F2: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341883F6: F640 01E3 MOVW R1, #0x08E3 0x341883FA: F005 FC4D BL assert_failed ; 0x3418DC98
.L795: 0x341883FE: F248 01FC MOVW R1, #0x80FC 0x34188402: F2C5 6102 MOVT R1, #0x5602 0x34188406: 6808 LDR R0, [R1] 0x34188408: F64F 72FF MOVW R2, #0xFFFF 0x3418840C: F6CC 7200 MOVT R2, #0xCF00 0x34188410: 4010 ANDS R0, R2 0x34188412: 9B04 LDR R3, [SP, #16] 0x34188414: 6F9A LDR R2, [R3, #120] 0x34188416: F8D3 C07C LDR.W R12, [R3, #124] 0x3418841A: 2300 MOVS R3, #0 0x3418841C: F6CF 73FF MOVT R3, #0xFFFF 0x34188420: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34188424: 431A ORRS R2, R3 0x34188426: 4310 ORRS R0, R2 0x34188428: 6008 STR R0, [R1] 0x3418842A: F000 F9A5 BL LL_RCC_IC15_Enable.62 ; 0x34188778 0x3418842E: E00B B 46L797 ; 0x34188448
.L796: 0x34188430: 9804 LDR R0, [SP, #16] 0x34188432: F8D0 0178 LDR.W R0, [R0, #0x0178] 0x34188436: F640 4114 MOVW R1, #0x0C14 0x3418843A: F2C0 3101 MOVT R1, #0x0301 0x3418843E: 4288 CMP R0, R1 0x34188440: D102 BNE 46L797 ; 0x34188448 0x34188442: F007 FF0B BL LL_RCC_CLKP_Enable ; 0x3419025C 0x34188446: E7FF B 46L797 ; 0x34188448
.L797: 0x34188448: 9804 LDR R0, [SP, #16] 0x3418844A: F8D0 0178 LDR.W R0, [R0, #0x0178] 0x3418844E: F020 4000 BIC R0, R0, #0x80000000 0x34188452: F000 FAE5 BL LL_RCC_SetOTGPHYClockSource ; 0x34188A20 0x34188456: 9804 LDR R0, [SP, #16] 0x34188458: F8D0 0178 LDR.W R0, [R0, #0x0178] 0x3418845C: 0FC0 LSRS R0, R0, #31 0x3418845E: 2801 CMP R0, #1 0x34188460: D102 BNE 46L798 ; 0x34188468 0x34188462: F007 FF13 BL LL_RCC_HSE_SelectHSEDiv2AsDiv2Clock ; 0x3419028C 0x34188466: E001 B 46L799 ; 0x3418846C
.L798: 0x34188468: F007 FF1A BL LL_RCC_HSE_SelectHSEAsDiv2Clock ; 0x341902A0
.L799: 0x3418846C: 9804 LDR R0, [SP, #16] 0x3418846E: 7980 LDRB R0, [R0, #6] 0x34188470: 06C0 LSLS R0, R0, #27 0x34188472: 2800 CMP R0, #0 0x34188474: F140 80A2 BPL.W 46L811 ; 0x341885BC 0x34188478: 9804 LDR R0, [SP, #16] 0x3418847A: F8D0 0180 LDR.W R0, [R0, #0x0180] 0x3418847E: F241 4114 MOVW R1, #0x1414 0x34188482: F2C0 3100 MOVT R1, #0x0300 0x34188486: 4288 CMP R0, R1 0x34188488: D023 BEQ 46L800 ; 0x341884D2 0x3418848A: 9804 LDR R0, [SP, #16] 0x3418848C: F8D0 0180 LDR.W R0, [R0, #0x0180] 0x34188490: F241 4114 MOVW R1, #0x1414 0x34188494: F2C0 3101 MOVT R1, #0x0301 0x34188498: 4288 CMP R0, R1 0x3418849A: D01A BEQ 46L800 ; 0x341884D2 0x3418849C: 9804 LDR R0, [SP, #16] 0x3418849E: F8D0 0180 LDR.W R0, [R0, #0x0180] 0x341884A2: F241 4114 MOVW R1, #0x1414 0x341884A6: F2C0 3102 MOVT R1, #0x0302 0x341884AA: 4288 CMP R0, R1 0x341884AC: D011 BEQ 46L800 ; 0x341884D2 0x341884AE: 9804 LDR R0, [SP, #16] 0x341884B0: F8D0 0180 LDR.W R0, [R0, #0x0180] 0x341884B4: F241 4114 MOVW R1, #0x1414 0x341884B8: F2C0 3103 MOVT R1, #0x0303 0x341884BC: 4288 CMP R0, R1 0x341884BE: D008 BEQ 46L800 ; 0x341884D2 0x341884C0: 9804 LDR R0, [SP, #16] 0x341884C2: F8D0 0180 LDR.W R0, [R0, #0x0180] 0x341884C6: F241 4114 MOVW R1, #0x1414 0x341884CA: F2C8 3103 MOVT R1, #0x8303 0x341884CE: 4288 CMP R0, R1 0x341884D0: D100 BNE 46L801 ; 0x341884D4
.L800: 0x341884D2: E007 B 46L802 ; 0x341884E4
.L801: 0x341884D4: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341884D8: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341884DC: F640 01FD MOVW R1, #0x08FD 0x341884E0: F005 FBDA BL assert_failed ; 0x3418DC98
.L802: 0x341884E4: 9804 LDR R0, [SP, #16] 0x341884E6: F8D0 0180 LDR.W R0, [R0, #0x0180] 0x341884EA: F241 4114 MOVW R1, #0x1414 0x341884EE: F2C0 3102 MOVT R1, #0x0302 0x341884F2: 4288 CMP R0, R1 0x341884F4: D144 BNE 46L808 ; 0x34188580 0x341884F6: 9804 LDR R0, [SP, #16] 0x341884F8: 6F80 LDR R0, [R0, #120] 0x341884FA: B170 CBZ R0, .L803 ; 0x3418851A 0x341884FC: 9804 LDR R0, [SP, #16] 0x341884FE: 6F80 LDR R0, [R0, #120] 0x34188500: F1B0 5F80 CMP.W R0, #0x10000000 0x34188504: D009 BEQ 46L803 ; 0x3418851A 0x34188506: 9804 LDR R0, [SP, #16] 0x34188508: 6F80 LDR R0, [R0, #120] 0x3418850A: F1B0 5F00 CMP.W R0, #0x20000000 0x3418850E: D004 BEQ 46L803 ; 0x3418851A 0x34188510: 9804 LDR R0, [SP, #16] 0x34188512: 6F80 LDR R0, [R0, #120] 0x34188514: F1B0 5F40 CMP.W R0, #0x30000000 0x34188518: D100 BNE 46L804 ; 0x3418851C
.L803: 0x3418851A: E007 B 46L805 ; 0x3418852C
.L804: 0x3418851C: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34188520: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34188524: F640 1102 MOVW R1, #0x0902 0x34188528: F005 FBB6 BL assert_failed ; 0x3418DC98
.L805: 0x3418852C: 9804 LDR R0, [SP, #16] 0x3418852E: 6FC0 LDR R0, [R0, #124] 0x34188530: B128 CBZ R0, .L806 ; 0x3418853E 0x34188532: 9804 LDR R0, [SP, #16] 0x34188534: 6FC0 LDR R0, [R0, #124] 0x34188536: F5B0 7F80 CMP.W R0, #0x0100 0x3418853A: D800 BHI 46L806 ; 0x3418853E 0x3418853C: E007 B 46L807 ; 0x3418854E
.L806: 0x3418853E: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34188542: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34188546: F640 1103 MOVW R1, #0x0903 0x3418854A: F005 FBA5 BL assert_failed ; 0x3418DC98
.L807: 0x3418854E: F248 01FC MOVW R1, #0x80FC 0x34188552: F2C5 6102 MOVT R1, #0x5602 0x34188556: 6808 LDR R0, [R1] 0x34188558: F64F 72FF MOVW R2, #0xFFFF 0x3418855C: F6CC 7200 MOVT R2, #0xCF00 0x34188560: 4010 ANDS R0, R2 0x34188562: 9B04 LDR R3, [SP, #16] 0x34188564: 6F9A LDR R2, [R3, #120] 0x34188566: F8D3 C07C LDR.W R12, [R3, #124] 0x3418856A: 2300 MOVS R3, #0 0x3418856C: F6CF 73FF MOVT R3, #0xFFFF 0x34188570: EB03 430C ADD.W R3, R3, R12, LSL #16 0x34188574: 431A ORRS R2, R3 0x34188576: 4310 ORRS R0, R2 0x34188578: 6008 STR R0, [R1] 0x3418857A: F000 F8FD BL LL_RCC_IC15_Enable.62 ; 0x34188778 0x3418857E: E00B B 46L809 ; 0x34188598
.L808: 0x34188580: 9804 LDR R0, [SP, #16] 0x34188582: F8D0 0180 LDR.W R0, [R0, #0x0180] 0x34188586: F241 4114 MOVW R1, #0x1414 0x3418858A: F2C0 3101 MOVT R1, #0x0301 0x3418858E: 4288 CMP R0, R1 0x34188590: D102 BNE 46L809 ; 0x34188598 0x34188592: F007 FE63 BL LL_RCC_CLKP_Enable ; 0x3419025C 0x34188596: E7FF B 46L809 ; 0x34188598
.L809: 0x34188598: 9804 LDR R0, [SP, #16] 0x3418859A: F8D0 0180 LDR.W R0, [R0, #0x0180] 0x3418859E: F020 4000 BIC R0, R0, #0x80000000 0x341885A2: F000 FA3D BL LL_RCC_SetOTGPHYClockSource ; 0x34188A20 0x341885A6: 9804 LDR R0, [SP, #16] 0x341885A8: F8D0 0180 LDR.W R0, [R0, #0x0180] 0x341885AC: 0FC0 LSRS R0, R0, #31 0x341885AE: 2801 CMP R0, #1 0x341885B0: D102 BNE 46L810 ; 0x341885B8 0x341885B2: F007 FE6B BL LL_RCC_HSE_SelectHSEDiv2AsDiv2Clock ; 0x3419028C 0x341885B6: E001 B 46L811 ; 0x341885BC
.L810: 0x341885B8: F007 FE72 BL LL_RCC_HSE_SelectHSEAsDiv2Clock ; 0x341902A0
.L811: 0x341885BC: 9804 LDR R0, [SP, #16] 0x341885BE: 7980 LDRB R0, [R0, #6] 0x341885C0: 0700 LSLS R0, R0, #28 0x341885C2: 2800 CMP R0, #0 0x341885C4: D535 BPL 46L816 ; 0x34188632 0x341885C6: 9804 LDR R0, [SP, #16] 0x341885C8: F8D0 017C LDR.W R0, [R0, #0x017C] 0x341885CC: F241 0114 MOVW R1, #0x1014 0x341885D0: F2C0 1100 MOVT R1, #0x0100 0x341885D4: 4288 CMP R0, R1 0x341885D6: D011 BEQ 46L812 ; 0x341885FC 0x341885D8: 9804 LDR R0, [SP, #16] 0x341885DA: F8D0 017C LDR.W R0, [R0, #0x017C] 0x341885DE: F241 0114 MOVW R1, #0x1014 0x341885E2: F2C0 1101 MOVT R1, #0x0101 0x341885E6: 4288 CMP R0, R1 0x341885E8: D008 BEQ 46L812 ; 0x341885FC 0x341885EA: 9804 LDR R0, [SP, #16] 0x341885EC: F8D0 017C LDR.W R0, [R0, #0x017C] 0x341885F0: F241 0114 MOVW R1, #0x1014 0x341885F4: F2C8 1101 MOVT R1, #0x8101 0x341885F8: 4288 CMP R0, R1 0x341885FA: D100 BNE 46L813 ; 0x341885FE
.L812: 0x341885FC: E007 B 46L814 ; 0x3418860E
.L813: 0x341885FE: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34188602: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x34188606: F640 111D MOVW R1, #0x091D 0x3418860A: F005 FB45 BL assert_failed ; 0x3418DC98
.L814: 0x3418860E: 9804 LDR R0, [SP, #16] 0x34188610: F8D0 017C LDR.W R0, [R0, #0x017C] 0x34188614: F020 4000 BIC R0, R0, #0x80000000 0x34188618: F000 FA0A BL LL_RCC_SetOTGPHYCKREFClockSource ; 0x34188A30 0x3418861C: 9804 LDR R0, [SP, #16] 0x3418861E: F8D0 017C LDR.W R0, [R0, #0x017C] 0x34188622: 0FC0 LSRS R0, R0, #31 0x34188624: 2801 CMP R0, #1 0x34188626: D102 BNE 46L815 ; 0x3418862E 0x34188628: F007 FE30 BL LL_RCC_HSE_SelectHSEDiv2AsDiv2Clock ; 0x3419028C 0x3418862C: E001 B 46L816 ; 0x34188632
.L815: 0x3418862E: F007 FE37 BL LL_RCC_HSE_SelectHSEAsDiv2Clock ; 0x341902A0
.L816: 0x34188632: 9804 LDR R0, [SP, #16] 0x34188634: 7980 LDRB R0, [R0, #6] 0x34188636: 0680 LSLS R0, R0, #26 0x34188638: 2800 CMP R0, #0 0x3418863A: D535 BPL 46L821 ; 0x341886A8 0x3418863C: 9804 LDR R0, [SP, #16] 0x3418863E: F8D0 0184 LDR.W R0, [R0, #0x0184] 0x34188642: F641 0114 MOVW R1, #0x1814 0x34188646: F2C0 1100 MOVT R1, #0x0100 0x3418864A: 4288 CMP R0, R1 0x3418864C: D011 BEQ 46L817 ; 0x34188672 0x3418864E: 9804 LDR R0, [SP, #16] 0x34188650: F8D0 0184 LDR.W R0, [R0, #0x0184] 0x34188654: F641 0114 MOVW R1, #0x1814 0x34188658: F2C0 1101 MOVT R1, #0x0101 0x3418865C: 4288 CMP R0, R1 0x3418865E: D008 BEQ 46L817 ; 0x34188672 0x34188660: 9804 LDR R0, [SP, #16] 0x34188662: F8D0 0184 LDR.W R0, [R0, #0x0184] 0x34188666: F641 0114 MOVW R1, #0x1814 0x3418866A: F2C8 1101 MOVT R1, #0x8101 0x3418866E: 4288 CMP R0, R1 0x34188670: D100 BNE 46L818 ; 0x34188674
.L817: 0x34188672: E007 B 46L819 ; 0x34188684
.L818: 0x34188674: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x34188678: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x3418867C: F640 1127 MOVW R1, #0x0927 0x34188680: F005 FB0A BL assert_failed ; 0x3418DC98
.L819: 0x34188684: 9804 LDR R0, [SP, #16] 0x34188686: F8D0 0184 LDR.W R0, [R0, #0x0184] 0x3418868A: F020 4000 BIC R0, R0, #0x80000000 0x3418868E: F000 F9CF BL LL_RCC_SetOTGPHYCKREFClockSource ; 0x34188A30 0x34188692: 9804 LDR R0, [SP, #16] 0x34188694: F8D0 0184 LDR.W R0, [R0, #0x0184] 0x34188698: 0FC0 LSRS R0, R0, #31 0x3418869A: 2801 CMP R0, #1 0x3418869C: D102 BNE 46L820 ; 0x341886A4 0x3418869E: F007 FDF5 BL LL_RCC_HSE_SelectHSEDiv2AsDiv2Clock ; 0x3419028C 0x341886A2: E001 B 46L821 ; 0x341886A8
.L820: 0x341886A4: F007 FDFC BL LL_RCC_HSE_SelectHSEAsDiv2Clock ; 0x341902A0
.L821: 0x341886A8: 9804 LDR R0, [SP, #16] 0x341886AA: 7900 LDRB R0, [R0, #4] 0x341886AC: 0600 LSLS R0, R0, #24 0x341886AE: 2800 CMP R0, #0 0x341886B0: D520 BPL 46L825 ; 0x341886F4 0x341886B2: 9804 LDR R0, [SP, #16] 0x341886B4: F8D0 018C LDR.W R0, [R0, #0x018C] 0x341886B8: B170 CBZ R0, .L822 ; 0x341886D8 0x341886BA: 9804 LDR R0, [SP, #16] 0x341886BC: F8D0 018C LDR.W R0, [R0, #0x018C] 0x341886C0: 2801 CMP R0, #1 0x341886C2: D009 BEQ 46L822 ; 0x341886D8 0x341886C4: 9804 LDR R0, [SP, #16] 0x341886C6: F8D0 018C LDR.W R0, [R0, #0x018C] 0x341886CA: 2802 CMP R0, #2 0x341886CC: D004 BEQ 46L822 ; 0x341886D8 0x341886CE: 9804 LDR R0, [SP, #16] 0x341886D0: F8D0 018C LDR.W R0, [R0, #0x018C] 0x341886D4: 2803 CMP R0, #3 0x341886D6: D100 BNE 46L823 ; 0x341886DA
.L822: 0x341886D8: E007 B 46L824 ; 0x341886EA
.L823: 0x341886DA: F244 40F0 MOVW R0, #0x44F0 ; 0x341944F0 = .rodata..L.str.58 0x341886DE: F2C3 4019 MOVT R0, #0x3419 ; 0x341944F0 = .rodata..L.str.58 0x341886E2: F640 1131 MOVW R1, #0x0931 0x341886E6: F005 FAD7 BL assert_failed ; 0x3418DC98
.L824: 0x341886EA: 9804 LDR R0, [SP, #16] 0x341886EC: F8D0 018C LDR.W R0, [R0, #0x018C] 0x341886F0: F007 FDE0 BL LL_RCC_SetTIMPrescaler ; 0x341902B4
.L825: 0x341886F4: F89D 0006 LDRB.W R0, [SP, #6] 0x341886F8: B918 CBNZ R0, .L826 ; 0x34188702 0x341886FA: 2000 MOVS R0, #0 0x341886FC: F88D 0017 STRB.W R0, [SP, #23] 0x34188700: E002 B 46L827 ; 0x34188708
.L826: 0x34188702: 2001 MOVS R0, #1 0x34188704: F88D 0017 STRB.W R0, [SP, #23]
.L827: 0x34188708: F89D 0017 LDRB.W R0, [SP, #23] 0x3418870C: B006 ADD SP, SP, #24 0x3418870E: BD80 POP 123R7, PC}

Section .text.LL_RCC_GetRTCClockSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_GetRTCClockSource: 0x34188710: F248 105C MOVW R0, #0x815C 0x34188714: F2C5 6002 MOVT R0, #0x5602 0x34188718: 6800 LDR R0, [R0] 0x3418871A: F400 7040 AND R0, R0, #0x0300 0x3418871E: 4770 BX LR

Section .text.LL_RCC_LSE_IsReady.59 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_LSE_IsReady.59: 0x34188720: F248 0004 MOVW R0, #0x8004 0x34188724: F2C5 6002 MOVT R0, #0x5602 0x34188728: 6800 LDR R0, [R0] 0x3418872A: F3C0 0040 UBFX R0, R0, #1, #1 0x3418872E: 4770 BX LR

Section .text.LL_RCC_SetRTC_HSEPrescaler from blto2_FSBL_lto.o, size=28, align=4


LL_RCC_SetRTC_HSEPrescaler: 0x34188730: B081 SUB SP, SP, #4 0x34188732: 9000 STR R0, [SP, #0] 0x34188734: F248 115C MOVW R1, #0x815C 0x34188738: F2C5 6102 MOVT R1, #0x5602 0x3418873C: 6808 LDR R0, [R1] 0x3418873E: F420 307C BIC R0, R0, #0x03F000 0x34188742: 9A00 LDR R2, [SP, #0] 0x34188744: 4310 ORRS R0, R2 0x34188746: 6008 STR R0, [R1] 0x34188748: B001 ADD SP, SP, #4 0x3418874A: 4770 BX LR

Section .text.LL_RCC_SetRTCClockSource from blto2_FSBL_lto.o, size=28, align=4


LL_RCC_SetRTCClockSource: 0x3418874C: B081 SUB SP, SP, #4 0x3418874E: 9000 STR R0, [SP, #0] 0x34188750: F248 115C MOVW R1, #0x815C 0x34188754: F2C5 6102 MOVT R1, #0x5602 0x34188758: 6808 LDR R0, [R1] 0x3418875A: F420 7040 BIC R0, R0, #0x0300 0x3418875E: 9A00 LDR R2, [SP, #0] 0x34188760: 4310 ORRS R0, R2 0x34188762: 6008 STR R0, [R1] 0x34188764: B001 ADD SP, SP, #4 0x34188766: 4770 BX LR

Section .text.LL_RCC_IC10_Enable.61 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC10_Enable.61: 0x34188768: F648 2140 MOVW R1, #0x8A40 0x3418876C: F2C5 6102 MOVT R1, #0x5602 0x34188770: F44F 7000 MOV.W R0, #0x0200 0x34188774: 6008 STR R0, [R1] 0x34188776: 4770 BX LR

Section .text.LL_RCC_IC15_Enable.62 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC15_Enable.62: 0x34188778: F648 2140 MOVW R1, #0x8A40 0x3418877C: F2C5 6102 MOVT R1, #0x5602 0x34188780: F44F 4080 MOV.W R0, #0x4000 0x34188784: 6008 STR R0, [R1] 0x34188786: 4770 BX LR

Section .text.LL_RCC_IC19_Enable from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC19_Enable: 0x34188788: F648 2140 MOVW R1, #0x8A40 0x3418878C: F2C5 6102 MOVT R1, #0x5602 0x34188790: F44F 2080 MOV.W R0, #0x040000 0x34188794: 6008 STR R0, [R1] 0x34188796: 4770 BX LR

Section .text.LL_RCC_IC20_Enable.63 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC20_Enable.63: 0x34188798: F648 2140 MOVW R1, #0x8A40 0x3418879C: F2C5 6102 MOVT R1, #0x5602 0x341887A0: F44F 2000 MOV.W R0, #0x080000 0x341887A4: 6008 STR R0, [R1] 0x341887A6: 4770 BX LR

Section .text.LL_RCC_SetCLKPClockSource from blto2_FSBL_lto.o, size=28, align=4


LL_RCC_SetCLKPClockSource: 0x341887A8: B081 SUB SP, SP, #4 0x341887AA: 9000 STR R0, [SP, #0] 0x341887AC: F248 115C MOVW R1, #0x815C 0x341887B0: F2C5 6102 MOVT R1, #0x5602 0x341887B4: 6808 LDR R0, [R1] 0x341887B6: F020 0007 BIC R0, R0, #7 0x341887BA: 9A00 LDR R2, [SP, #0] 0x341887BC: 4310 ORRS R0, R2 0x341887BE: 6008 STR R0, [R1] 0x341887C0: B001 ADD SP, SP, #4 0x341887C2: 4770 BX LR

Section .text.LL_RCC_SetXSPIClockSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_SetXSPIClockSource: 0x341887C4: B580 PUSH 123R7, LR} 0x341887C6: B082 SUB SP, SP, #8 0x341887C8: 9001 STR R0, [SP, #4] 0x341887CA: 9801 LDR R0, [SP, #4] 0x341887CC: F000 F938 BL LL_RCC_SetClockSource ; 0x34188A40 0x341887D0: B002 ADD SP, SP, #8 0x341887D2: BD80 POP 123R7, PC}

Section .text.LL_RCC_SetFMCClockSource from blto2_FSBL_lto.o, size=28, align=4


LL_RCC_SetFMCClockSource: 0x341887D4: B081 SUB SP, SP, #4 0x341887D6: 9000 STR R0, [SP, #0] 0x341887D8: F248 114C MOVW R1, #0x814C 0x341887DC: F2C5 6102 MOVT R1, #0x5602 0x341887E0: 6808 LDR R0, [R1] 0x341887E2: F020 0030 BIC R0, R0, #48 0x341887E6: 9A00 LDR R2, [SP, #0] 0x341887E8: 4310 ORRS R0, R2 0x341887EA: 6008 STR R0, [R1] 0x341887EC: B001 ADD SP, SP, #4 0x341887EE: 4770 BX LR

Section .text.LL_RCC_SetSDMMCClockSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_SetSDMMCClockSource: 0x341887F0: B580 PUSH 123R7, LR} 0x341887F2: B082 SUB SP, SP, #8 0x341887F4: 9001 STR R0, [SP, #4] 0x341887F6: 9801 LDR R0, [SP, #4] 0x341887F8: F000 F922 BL LL_RCC_SetClockSource ; 0x34188A40 0x341887FC: B002 ADD SP, SP, #8 0x341887FE: BD80 POP 123R7, PC}

Section .text.LL_RCC_SetADFClockSource from blto2_FSBL_lto.o, size=28, align=4


LL_RCC_SetADFClockSource: 0x34188800: B081 SUB SP, SP, #4 0x34188802: 9000 STR R0, [SP, #0] 0x34188804: F248 1144 MOVW R1, #0x8144 0x34188808: F2C5 6102 MOVT R1, #0x5602 0x3418880C: 6808 LDR R0, [R1] 0x3418880E: F020 0007 BIC R0, R0, #7 0x34188812: 9A00 LDR R2, [SP, #0] 0x34188814: 4310 ORRS R0, R2 0x34188816: 6008 STR R0, [R1] 0x34188818: B001 ADD SP, SP, #4 0x3418881A: 4770 BX LR

Section .text.LL_RCC_IC18_Enable from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC18_Enable: 0x3418881C: F648 2140 MOVW R1, #0x8A40 0x34188820: F2C5 6102 MOVT R1, #0x5602 0x34188824: F44F 3000 MOV.W R0, #0x020000 0x34188828: 6008 STR R0, [R1] 0x3418882A: 4770 BX LR

Section .text.LL_RCC_IC17_Enable from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC17_Enable: 0x3418882C: F648 2140 MOVW R1, #0x8A40 0x34188830: F2C5 6102 MOVT R1, #0x5602 0x34188834: F44F 3080 MOV.W R0, #0x010000 0x34188838: 6008 STR R0, [R1] 0x3418883A: 4770 BX LR

Section .text.LL_RCC_SetDCMIPPClockSource from blto2_FSBL_lto.o, size=28, align=4


LL_RCC_SetDCMIPPClockSource: 0x3418883C: B081 SUB SP, SP, #4 0x3418883E: 9000 STR R0, [SP, #0] 0x34188840: F248 1144 MOVW R1, #0x8144 0x34188844: F2C5 6102 MOVT R1, #0x5602 0x34188848: 6808 LDR R0, [R1] 0x3418884A: F420 1040 BIC R0, R0, #0x300000 0x3418884E: 9A00 LDR R2, [SP, #0] 0x34188850: 4310 ORRS R0, R2 0x34188852: 6008 STR R0, [R1] 0x34188854: B001 ADD SP, SP, #4 0x34188856: 4770 BX LR

Section .text.LL_RCC_IC12_Enable from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC12_Enable: 0x34188858: F648 2140 MOVW R1, #0x8A40 0x3418885C: F2C5 6102 MOVT R1, #0x5602 0x34188860: F44F 6000 MOV.W R0, #0x0800 0x34188864: 6008 STR R0, [R1] 0x34188866: 4770 BX LR

Section .text.LL_RCC_SetETHClockSource from blto2_FSBL_lto.o, size=28, align=4


LL_RCC_SetETHClockSource: 0x34188868: B081 SUB SP, SP, #4 0x3418886A: 9000 STR R0, [SP, #0] 0x3418886C: F248 1148 MOVW R1, #0x8148 0x34188870: F2C5 6102 MOVT R1, #0x5602 0x34188874: 6808 LDR R0, [R1] 0x34188876: F420 5040 BIC R0, R0, #0x3000 0x3418887A: 9A00 LDR R2, [SP, #0] 0x3418887C: 4310 ORRS R0, R2 0x3418887E: 6008 STR R0, [R1] 0x34188880: B001 ADD SP, SP, #4 0x34188882: 4770 BX LR

Section .text.LL_RCC_SetETHPHYInterface from blto2_FSBL_lto.o, size=28, align=4


LL_RCC_SetETHPHYInterface: 0x34188884: B081 SUB SP, SP, #4 0x34188886: 9000 STR R0, [SP, #0] 0x34188888: F248 1148 MOVW R1, #0x8148 0x3418888C: F2C5 6102 MOVT R1, #0x5602 0x34188890: 6808 LDR R0, [R1] 0x34188892: F420 20E0 BIC R0, R0, #0x070000 0x34188896: 9A00 LDR R2, [SP, #0] 0x34188898: 4310 ORRS R0, R2 0x3418889A: 6008 STR R0, [R1] 0x3418889C: B001 ADD SP, SP, #4 0x3418889E: 4770 BX LR

Section .text.LL_RCC_SetETHREFRXClockSource from blto2_FSBL_lto.o, size=28, align=4


LL_RCC_SetETHREFRXClockSource: 0x341888A0: B081 SUB SP, SP, #4 0x341888A2: 9000 STR R0, [SP, #0] 0x341888A4: F248 1148 MOVW R1, #0x8148 0x341888A8: F2C5 6102 MOVT R1, #0x5602 0x341888AC: 6808 LDR R0, [R1] 0x341888AE: F420 1080 BIC R0, R0, #0x100000 0x341888B2: 9A00 LDR R2, [SP, #0] 0x341888B4: 4310 ORRS R0, R2 0x341888B6: 6008 STR R0, [R1] 0x341888B8: B001 ADD SP, SP, #4 0x341888BA: 4770 BX LR

Section .text.LL_RCC_SetETHREFTXClockSource from blto2_FSBL_lto.o, size=28, align=4


LL_RCC_SetETHREFTXClockSource: 0x341888BC: B081 SUB SP, SP, #4 0x341888BE: 9000 STR R0, [SP, #0] 0x341888C0: F248 1148 MOVW R1, #0x8148 0x341888C4: F2C5 6102 MOVT R1, #0x5602 0x341888C8: 6808 LDR R0, [R1] 0x341888CA: F020 7080 BIC R0, R0, #0x01000000 0x341888CE: 9A00 LDR R2, [SP, #0] 0x341888D0: 4310 ORRS R0, R2 0x341888D2: 6008 STR R0, [R1] 0x341888D4: B001 ADD SP, SP, #4 0x341888D6: 4770 BX LR

Section .text.LL_RCC_IC13_Enable from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC13_Enable: 0x341888D8: F648 2140 MOVW R1, #0x8A40 0x341888DC: F2C5 6102 MOVT R1, #0x5602 0x341888E0: F44F 5080 MOV.W R0, #0x1000 0x341888E4: 6008 STR R0, [R1] 0x341888E6: 4770 BX LR

Section .text.LL_RCC_SetFDCANClockSource from blto2_FSBL_lto.o, size=28, align=4


LL_RCC_SetFDCANClockSource: 0x341888E8: B081 SUB SP, SP, #4 0x341888EA: 9000 STR R0, [SP, #0] 0x341888EC: F248 114C MOVW R1, #0x814C 0x341888F0: F2C5 6102 MOVT R1, #0x5602 0x341888F4: 6808 LDR R0, [R1] 0x341888F6: F020 0003 BIC R0, R0, #3 0x341888FA: 9A00 LDR R2, [SP, #0] 0x341888FC: 4310 ORRS R0, R2 0x341888FE: 6008 STR R0, [R1] 0x34188900: B001 ADD SP, SP, #4 0x34188902: 4770 BX LR

Section .text.LL_RCC_SetI2CClockSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_SetI2CClockSource: 0x34188904: B580 PUSH 123R7, LR} 0x34188906: B082 SUB SP, SP, #8 0x34188908: 9001 STR R0, [SP, #4] 0x3418890A: 9801 LDR R0, [SP, #4] 0x3418890C: F000 F898 BL LL_RCC_SetClockSource ; 0x34188A40 0x34188910: B002 ADD SP, SP, #8 0x34188912: BD80 POP 123R7, PC}

Section .text.LL_RCC_SetI3CClockSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_SetI3CClockSource: 0x34188914: B580 PUSH 123R7, LR} 0x34188916: B082 SUB SP, SP, #8 0x34188918: 9001 STR R0, [SP, #4] 0x3418891A: 9801 LDR R0, [SP, #4] 0x3418891C: F000 F890 BL LL_RCC_SetClockSource ; 0x34188A40 0x34188920: B002 ADD SP, SP, #8 0x34188922: BD80 POP 123R7, PC}

Section .text.LL_RCC_SetLPTIMClockSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_SetLPTIMClockSource: 0x34188924: B580 PUSH 123R7, LR} 0x34188926: B082 SUB SP, SP, #8 0x34188928: 9001 STR R0, [SP, #4] 0x3418892A: 9801 LDR R0, [SP, #4] 0x3418892C: F000 F888 BL LL_RCC_SetClockSource ; 0x34188A40 0x34188930: B002 ADD SP, SP, #8 0x34188932: BD80 POP 123R7, PC}

Section .text.LL_RCC_IC9_Enable from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC9_Enable: 0x34188934: F648 2140 MOVW R1, #0x8A40 0x34188938: F2C5 6102 MOVT R1, #0x5602 0x3418893C: F44F 7080 MOV.W R0, #0x0100 0x34188940: 6008 STR R0, [R1] 0x34188942: 4770 BX LR

Section .text.LL_RCC_IC14_Enable from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC14_Enable: 0x34188944: F648 2140 MOVW R1, #0x8A40 0x34188948: F2C5 6102 MOVT R1, #0x5602 0x3418894C: F44F 5000 MOV.W R0, #0x2000 0x34188950: 6008 STR R0, [R1] 0x34188952: 4770 BX LR

Section .text.LL_RCC_SetLPUARTClockSource from blto2_FSBL_lto.o, size=28, align=4


LL_RCC_SetLPUARTClockSource: 0x34188954: B081 SUB SP, SP, #4 0x34188956: 9000 STR R0, [SP, #0] 0x34188958: F248 1178 MOVW R1, #0x8178 0x3418895C: F2C5 6102 MOVT R1, #0x5602 0x34188960: 6808 LDR R0, [R1] 0x34188962: F420 60E0 BIC R0, R0, #0x0700 0x34188966: 9A00 LDR R2, [SP, #0] 0x34188968: 4310 ORRS R0, R2 0x3418896A: 6008 STR R0, [R1] 0x3418896C: B001 ADD SP, SP, #4 0x3418896E: 4770 BX LR

Section .text.LL_RCC_IC16_Enable from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC16_Enable: 0x34188970: F648 2140 MOVW R1, #0x8A40 0x34188974: F2C5 6102 MOVT R1, #0x5602 0x34188978: F44F 4000 MOV.W R0, #0x8000 0x3418897C: 6008 STR R0, [R1] 0x3418897E: 4770 BX LR

Section .text.LL_RCC_SetLTDCClockSource from blto2_FSBL_lto.o, size=28, align=4


LL_RCC_SetLTDCClockSource: 0x34188980: B081 SUB SP, SP, #4 0x34188982: 9000 STR R0, [SP, #0] 0x34188984: F248 1150 MOVW R1, #0x8150 0x34188988: F2C5 6102 MOVT R1, #0x5602 0x3418898C: 6808 LDR R0, [R1] 0x3418898E: F020 7040 BIC R0, R0, #0x03000000 0x34188992: 9A00 LDR R2, [SP, #0] 0x34188994: 4310 ORRS R0, R2 0x34188996: 6008 STR R0, [R1] 0x34188998: B001 ADD SP, SP, #4 0x3418899A: 4770 BX LR

Section .text.LL_RCC_SetMDFClockSource from blto2_FSBL_lto.o, size=28, align=4


LL_RCC_SetMDFClockSource: 0x3418899C: B081 SUB SP, SP, #4 0x3418899E: 9000 STR R0, [SP, #0] 0x341889A0: F248 1154 MOVW R1, #0x8154 0x341889A4: F2C5 6102 MOVT R1, #0x5602 0x341889A8: 6808 LDR R0, [R1] 0x341889AA: F420 20E0 BIC R0, R0, #0x070000 0x341889AE: 9A00 LDR R2, [SP, #0] 0x341889B0: 4310 ORRS R0, R2 0x341889B2: 6008 STR R0, [R1] 0x341889B4: B001 ADD SP, SP, #4 0x341889B6: 4770 BX LR

Section .text.LL_RCC_SetPSSIClockSource from blto2_FSBL_lto.o, size=28, align=4


LL_RCC_SetPSSIClockSource: 0x341889B8: B081 SUB SP, SP, #4 0x341889BA: 9000 STR R0, [SP, #0] 0x341889BC: F248 115C MOVW R1, #0x815C 0x341889C0: F2C5 6102 MOVT R1, #0x5602 0x341889C4: 6808 LDR R0, [R1] 0x341889C6: F020 0030 BIC R0, R0, #48 0x341889CA: 9A00 LDR R2, [SP, #0] 0x341889CC: 4310 ORRS R0, R2 0x341889CE: 6008 STR R0, [R1] 0x341889D0: B001 ADD SP, SP, #4 0x341889D2: 4770 BX LR

Section .text.LL_RCC_SetSAIClockSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_SetSAIClockSource: 0x341889D4: B580 PUSH 123R7, LR} 0x341889D6: B082 SUB SP, SP, #8 0x341889D8: 9001 STR R0, [SP, #4] 0x341889DA: 9801 LDR R0, [SP, #4] 0x341889DC: F000 F830 BL LL_RCC_SetClockSource ; 0x34188A40 0x341889E0: B002 ADD SP, SP, #8 0x341889E2: BD80 POP 123R7, PC}

Section .text.LL_RCC_SetSPDIFRXClockSource from blto2_FSBL_lto.o, size=28, align=4


LL_RCC_SetSPDIFRXClockSource: 0x341889E4: B081 SUB SP, SP, #4 0x341889E6: 9000 STR R0, [SP, #0] 0x341889E8: F248 1164 MOVW R1, #0x8164 0x341889EC: F2C5 6102 MOVT R1, #0x5602 0x341889F0: 6808 LDR R0, [R1] 0x341889F2: F020 0007 BIC R0, R0, #7 0x341889F6: 9A00 LDR R2, [SP, #0] 0x341889F8: 4310 ORRS R0, R2 0x341889FA: 6008 STR R0, [R1] 0x341889FC: B001 ADD SP, SP, #4 0x341889FE: 4770 BX LR

Section .text.LL_RCC_SetSPIClockSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_SetSPIClockSource: 0x34188A00: B580 PUSH 123R7, LR} 0x34188A02: B082 SUB SP, SP, #8 0x34188A04: 9001 STR R0, [SP, #4] 0x34188A06: 9801 LDR R0, [SP, #4] 0x34188A08: F000 F81A BL LL_RCC_SetClockSource ; 0x34188A40 0x34188A0C: B002 ADD SP, SP, #8 0x34188A0E: BD80 POP 123R7, PC}

Section .text.LL_RCC_SetUSARTClockSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_SetUSARTClockSource: 0x34188A10: B580 PUSH 123R7, LR} 0x34188A12: B082 SUB SP, SP, #8 0x34188A14: 9001 STR R0, [SP, #4] 0x34188A16: 9801 LDR R0, [SP, #4] 0x34188A18: F000 F812 BL LL_RCC_SetClockSource ; 0x34188A40 0x34188A1C: B002 ADD SP, SP, #8 0x34188A1E: BD80 POP 123R7, PC}

Section .text.LL_RCC_SetOTGPHYClockSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_SetOTGPHYClockSource: 0x34188A20: B580 PUSH 123R7, LR} 0x34188A22: B082 SUB SP, SP, #8 0x34188A24: 9001 STR R0, [SP, #4] 0x34188A26: 9801 LDR R0, [SP, #4] 0x34188A28: F000 F80A BL LL_RCC_SetClockSource ; 0x34188A40 0x34188A2C: B002 ADD SP, SP, #8 0x34188A2E: BD80 POP 123R7, PC}

Section .text.LL_RCC_SetOTGPHYCKREFClockSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_SetOTGPHYCKREFClockSource: 0x34188A30: B580 PUSH 123R7, LR} 0x34188A32: B082 SUB SP, SP, #8 0x34188A34: 9001 STR R0, [SP, #4] 0x34188A36: 9801 LDR R0, [SP, #4] 0x34188A38: F000 F802 BL LL_RCC_SetClockSource ; 0x34188A40 0x34188A3C: B002 ADD SP, SP, #8 0x34188A3E: BD80 POP 123R7, PC}

Section .text.LL_RCC_SetClockSource from blto2_FSBL_lto.o, size=52, align=4


LL_RCC_SetClockSource: 0x34188A40: B082 SUB SP, SP, #8 0x34188A42: 9001 STR R0, [SP, #4] 0x34188A44: F89D 0004 LDRB.W R0, [SP, #4] 0x34188A48: F248 1144 MOVW R1, #0x8144 0x34188A4C: F2C5 6102 MOVT R1, #0x5602 0x34188A50: 4408 ADD R0, R1 0x34188A52: 9000 STR R0, [SP, #0] 0x34188A54: 9800 LDR R0, [SP, #0] 0x34188A56: 6800 LDR R0, [R0] 0x34188A58: 9901 LDR R1, [SP, #4] 0x34188A5A: 0E0B LSRS R3, R1, #24 0x34188A5C: F3C1 2204 UBFX R2, R1, #8, #5 0x34188A60: 4093 LSLS R3, R2 0x34188A62: 4398 BICS R0, R3 0x34188A64: F3C1 4107 UBFX R1, R1, #16, #8 0x34188A68: 4091 LSLS R1, R2 0x34188A6A: 4308 ORRS R0, R1 0x34188A6C: 9900 LDR R1, [SP, #0] 0x34188A6E: 6008 STR R0, [R1] 0x34188A70: B002 ADD SP, SP, #8 0x34188A72: 4770 BX LR

Section .text.LL_RCC_GetADCPrescaler from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_GetADCPrescaler: 0x34188A74: F248 1044 MOVW R0, #0x8144 0x34188A78: F2C5 6002 MOVT R0, #0x5602 0x34188A7C: 6800 LDR R0, [R0] 0x34188A7E: B280 UXTH R0, R0 0x34188A80: 0A00 LSRS R0, R0, #8 0x34188A82: 4770 BX LR

Section .text.LL_RCC_GetETH1PTPDivider from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_GetETH1PTPDivider: 0x34188A84: F248 1048 MOVW R0, #0x8148 0x34188A88: F2C5 6002 MOVT R0, #0x5602 0x34188A8C: 6800 LDR R0, [R0] 0x34188A8E: F000 00F0 AND R0, R0, #240 0x34188A92: 4770 BX LR

Section .text.LL_RCC_GetI2CClockSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_GetI2CClockSource: 0x34188A94: B580 PUSH 123R7, LR} 0x34188A96: B082 SUB SP, SP, #8 0x34188A98: 9001 STR R0, [SP, #4] 0x34188A9A: 9801 LDR R0, [SP, #4] 0x34188A9C: F000 F84A BL LL_RCC_GetClockSource ; 0x34188B34 0x34188AA0: B002 ADD SP, SP, #8 0x34188AA2: BD80 POP 123R7, PC}

Section .text.LL_RCC_GetI3CClockSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_GetI3CClockSource: 0x34188AA4: B580 PUSH 123R7, LR} 0x34188AA6: B082 SUB SP, SP, #8 0x34188AA8: 9001 STR R0, [SP, #4] 0x34188AAA: 9801 LDR R0, [SP, #4] 0x34188AAC: F000 F842 BL LL_RCC_GetClockSource ; 0x34188B34 0x34188AB0: B002 ADD SP, SP, #8 0x34188AB2: BD80 POP 123R7, PC}

Section .text.LL_RCC_GetLPTIMClockSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_GetLPTIMClockSource: 0x34188AB4: B580 PUSH 123R7, LR} 0x34188AB6: B082 SUB SP, SP, #8 0x34188AB8: 9001 STR R0, [SP, #4] 0x34188ABA: 9801 LDR R0, [SP, #4] 0x34188ABC: F000 F83A BL LL_RCC_GetClockSource ; 0x34188B34 0x34188AC0: B002 ADD SP, SP, #8 0x34188AC2: BD80 POP 123R7, PC}

Section .text.LL_RCC_GetSAIClockSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_GetSAIClockSource: 0x34188AC4: B580 PUSH 123R7, LR} 0x34188AC6: B082 SUB SP, SP, #8 0x34188AC8: 9001 STR R0, [SP, #4] 0x34188ACA: 9801 LDR R0, [SP, #4] 0x34188ACC: F000 F832 BL LL_RCC_GetClockSource ; 0x34188B34 0x34188AD0: B002 ADD SP, SP, #8 0x34188AD2: BD80 POP 123R7, PC}

Section .text.LL_RCC_GetSDMMCClockSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_GetSDMMCClockSource: 0x34188AD4: B580 PUSH 123R7, LR} 0x34188AD6: B082 SUB SP, SP, #8 0x34188AD8: 9001 STR R0, [SP, #4] 0x34188ADA: 9801 LDR R0, [SP, #4] 0x34188ADC: F000 F82A BL LL_RCC_GetClockSource ; 0x34188B34 0x34188AE0: B002 ADD SP, SP, #8 0x34188AE2: BD80 POP 123R7, PC}

Section .text.LL_RCC_GetSPIClockSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_GetSPIClockSource: 0x34188AE4: B580 PUSH 123R7, LR} 0x34188AE6: B082 SUB SP, SP, #8 0x34188AE8: 9001 STR R0, [SP, #4] 0x34188AEA: 9801 LDR R0, [SP, #4] 0x34188AEC: F000 F822 BL LL_RCC_GetClockSource ; 0x34188B34 0x34188AF0: B002 ADD SP, SP, #8 0x34188AF2: BD80 POP 123R7, PC}

Section .text.LL_RCC_GetTIMPrescaler from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_GetTIMPrescaler: 0x34188AF4: F248 0024 MOVW R0, #0x8024 0x34188AF8: F2C5 6002 MOVT R0, #0x5602 0x34188AFC: 6800 LDR R0, [R0] 0x34188AFE: F3C0 6001 UBFX R0, R0, #24, #2 0x34188B02: 4770 BX LR

Section .text.LL_RCC_GetUSARTClockSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_GetUSARTClockSource: 0x34188B04: B580 PUSH 123R7, LR} 0x34188B06: B082 SUB SP, SP, #8 0x34188B08: 9001 STR R0, [SP, #4] 0x34188B0A: 9801 LDR R0, [SP, #4] 0x34188B0C: F000 F812 BL LL_RCC_GetClockSource ; 0x34188B34 0x34188B10: B002 ADD SP, SP, #8 0x34188B12: BD80 POP 123R7, PC}

Section .text.LL_RCC_HSE_IsSelectedHSEDiv2AsDiv2Clock from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_HSE_IsSelectedHSEDiv2AsDiv2Clock: 0x34188B14: F248 0054 MOVW R0, #0x8054 0x34188B18: F2C5 6002 MOVT R0, #0x5602 0x34188B1C: 6800 LDR R0, [R0] 0x34188B1E: F3C0 1080 UBFX R0, R0, #6, #1 0x34188B22: 4770 BX LR

Section .text.LL_RCC_GetXSPIClockSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_GetXSPIClockSource: 0x34188B24: B580 PUSH 123R7, LR} 0x34188B26: B082 SUB SP, SP, #8 0x34188B28: 9001 STR R0, [SP, #4] 0x34188B2A: 9801 LDR R0, [SP, #4] 0x34188B2C: F000 F802 BL LL_RCC_GetClockSource ; 0x34188B34 0x34188B30: B002 ADD SP, SP, #8 0x34188B32: BD80 POP 123R7, PC}

Section .text.LL_RCC_GetClockSource from blto2_FSBL_lto.o, size=48, align=4


LL_RCC_GetClockSource: 0x34188B34: B082 SUB SP, SP, #8 0x34188B36: 9001 STR R0, [SP, #4] 0x34188B38: F89D 0004 LDRB.W R0, [SP, #4] 0x34188B3C: F248 1144 MOVW R1, #0x8144 0x34188B40: F2C5 6102 MOVT R1, #0x5602 0x34188B44: 4408 ADD R0, R1 0x34188B46: 9000 STR R0, [SP, #0] 0x34188B48: 9801 LDR R0, [SP, #4] 0x34188B4A: 9900 LDR R1, [SP, #0] 0x34188B4C: 6809 LDR R1, [R1] 0x34188B4E: 9A01 LDR R2, [SP, #4] 0x34188B50: 0E13 LSRS R3, R2, #24 0x34188B52: F3C2 2204 UBFX R2, R2, #8, #5 0x34188B56: 4093 LSLS R3, R2 0x34188B58: 4019 ANDS R1, R3 0x34188B5A: 40D1 LSRS R1, R2 0x34188B5C: EA40 4001 ORR.W R0, R0, R1, LSL #16 0x34188B60: B002 ADD SP, SP, #8 0x34188B62: 4770 BX LR

Section .text.RCCEx_GetADFCLKFreq from blto2_FSBL_lto.o, size=388, align=4


RCCEx_GetADFCLKFreq: 0x34188B64: B580 PUSH 123R7, LR} 0x34188B66: B088 SUB SP, SP, #32 0x34188B68: 9007 STR R0, [SP, #28] 0x34188B6A: 2000 MOVS R0, #0 0x34188B6C: 9006 STR R0, [SP, #24] 0x34188B6E: 9807 LDR R0, [SP, #28] 0x34188B70: F007 FBBC BL LL_RCC_GetADFClockSource ; 0x341902EC 0x34188B74: 4601 MOV R1, R0 0x34188B76: 9104 STR R1, [SP, #16] 0x34188B78: 2807 CMP R0, #7 0x34188B7A: F200 80B2 BHI.W 46L13 ; 0x34188CE2 0x34188B7E: 9904 LDR R1, [SP, #16] 0x34188B80: E8DF F001 TBB 91PC, R1] 0x34188B84: 04 DC.B 0x04 ; '\x04' 0x34188B85: 0A DC.B 0x0A ; '\n' 0x34188B86: 0F DC.B 0x0F ; '\x0F' 0x34188B87: 4C DC.B 0x4C ; 'L' 0x34188B88: 96 DC.B 0x96 ; '\x96' 0x34188B89: 89 DC.B 0x89 ; '\x89' 0x34188B8A: 9F DC.B 0x9F ; '\x9F' 0x34188B8B: A5 DC.B 0xA5 ; '\xA5' 0x34188B8C: F007 FB34 BL HAL_RCC_GetSysClockFreq ; 0x341901F8 0x34188B90: F001 FF4C BL RCCEx_GetHCLKFreq ; 0x3418AA2C 0x34188B94: 9006 STR R0, [SP, #24] 0x34188B96: E0A4 B 46L13 ; 0x34188CE2 0x34188B98: 2007 MOVS R0, #7 0x34188B9A: F000 F8A5 BL RCCEx_GetCLKPCLKFreq ; 0x34188CE8 0x34188B9E: 9006 STR R0, [SP, #24] 0x34188BA0: E09F B 46L13 ; 0x34188CE2 0x34188BA2: F002 F9DD BL LL_RCC_IC7_IsEnabled ; 0x3418AF60 0x34188BA6: B3C0 CBZ R0, .L5 ; 0x34188C1A 0x34188BA8: F008 FFE6 BL LL_RCC_IC7_GetDivider ; 0x34191B78 0x34188BAC: 9005 STR R0, [SP, #20] 0x34188BAE: F002 F9DF BL LL_RCC_IC7_GetSource ; 0x3418AF70 0x34188BB2: 4601 MOV R1, R0 0x34188BB4: 9103 STR R1, [SP, #12] 0x34188BB6: B160 CBZ R0, .L1 ; 0x34188BD2 0x34188BB8: 9803 LDR R0, [SP, #12] 0x34188BBA: F1B0 5F80 CMP.W R0, #0x10000000 0x34188BBE: D011 BEQ 46L2 ; 0x34188BE4 0x34188BC0: 9803 LDR R0, [SP, #12] 0x34188BC2: F1B0 5F00 CMP.W R0, #0x20000000 0x34188BC6: D016 BEQ 46L3 ; 0x34188BF6 0x34188BC8: 9803 LDR R0, [SP, #12] 0x34188BCA: F1B0 5F40 CMP.W R0, #0x30000000 0x34188BCE: D01B BEQ 46L4 ; 0x34188C08 0x34188BD0: E023 B 46L5 ; 0x34188C1A
.L1: 0x34188BD2: F008 FE8D BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F0 0x34188BD6: 9006 STR R0, [SP, #24] 0x34188BD8: 9806 LDR R0, [SP, #24] 0x34188BDA: 9905 LDR R1, [SP, #20] 0x34188BDC: FBB0 F0F1 UDIV R0, R0, R1 0x34188BE0: 9006 STR R0, [SP, #24] 0x34188BE2: E01A B 46L5 ; 0x34188C1A
.L2: 0x34188BE4: F008 FEC6 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191974 0x34188BE8: 9006 STR R0, [SP, #24] 0x34188BEA: 9806 LDR R0, [SP, #24] 0x34188BEC: 9905 LDR R1, [SP, #20] 0x34188BEE: FBB0 F0F1 UDIV R0, R0, R1 0x34188BF2: 9006 STR R0, [SP, #24] 0x34188BF4: E011 B 46L5 ; 0x34188C1A
.L3: 0x34188BF6: F008 FEFF BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919F8 0x34188BFA: 9006 STR R0, [SP, #24] 0x34188BFC: 9806 LDR R0, [SP, #24] 0x34188BFE: 9905 LDR R1, [SP, #20] 0x34188C00: FBB0 F0F1 UDIV R0, R0, R1 0x34188C04: 9006 STR R0, [SP, #24] 0x34188C06: E008 B 46L5 ; 0x34188C1A
.L4: 0x34188C08: F008 FF38 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A7C 0x34188C0C: 9006 STR R0, [SP, #24] 0x34188C0E: 9806 LDR R0, [SP, #24] 0x34188C10: 9905 LDR R1, [SP, #20] 0x34188C12: FBB0 F0F1 UDIV R0, R0, R1 0x34188C16: 9006 STR R0, [SP, #24] 0x34188C18: E7FF B 46L5 ; 0x34188C1A
.L5: 0x34188C1A: E062 B 46L13 ; 0x34188CE2 0x34188C1C: F002 F988 BL LL_RCC_IC8_IsEnabled ; 0x3418AF30 0x34188C20: B3C0 CBZ R0, .L10 ; 0x34188C94 0x34188C22: F008 FF9D BL LL_RCC_IC8_GetDivider ; 0x34191B60 0x34188C26: 9005 STR R0, [SP, #20] 0x34188C28: F002 F98A BL LL_RCC_IC8_GetSource ; 0x3418AF40 0x34188C2C: 4601 MOV R1, R0 0x34188C2E: 9102 STR R1, [SP, #8] 0x34188C30: B160 CBZ R0, .L6 ; 0x34188C4C 0x34188C32: 9802 LDR R0, [SP, #8] 0x34188C34: F1B0 5F80 CMP.W R0, #0x10000000 0x34188C38: D011 BEQ 46L7 ; 0x34188C5E 0x34188C3A: 9802 LDR R0, [SP, #8] 0x34188C3C: F1B0 5F00 CMP.W R0, #0x20000000 0x34188C40: D016 BEQ 46L8 ; 0x34188C70 0x34188C42: 9802 LDR R0, [SP, #8] 0x34188C44: F1B0 5F40 CMP.W R0, #0x30000000 0x34188C48: D01B BEQ 46L9 ; 0x34188C82 0x34188C4A: E023 B 46L10 ; 0x34188C94
.L6: 0x34188C4C: F008 FE50 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F0 0x34188C50: 9006 STR R0, [SP, #24] 0x34188C52: 9806 LDR R0, [SP, #24] 0x34188C54: 9905 LDR R1, [SP, #20] 0x34188C56: FBB0 F0F1 UDIV R0, R0, R1 0x34188C5A: 9006 STR R0, [SP, #24] 0x34188C5C: E01A B 46L10 ; 0x34188C94
.L7: 0x34188C5E: F008 FE89 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191974 0x34188C62: 9006 STR R0, [SP, #24] 0x34188C64: 9806 LDR R0, [SP, #24] 0x34188C66: 9905 LDR R1, [SP, #20] 0x34188C68: FBB0 F0F1 UDIV R0, R0, R1 0x34188C6C: 9006 STR R0, [SP, #24] 0x34188C6E: E011 B 46L10 ; 0x34188C94
.L8: 0x34188C70: F008 FEC2 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919F8 0x34188C74: 9006 STR R0, [SP, #24] 0x34188C76: 9806 LDR R0, [SP, #24] 0x34188C78: 9905 LDR R1, [SP, #20] 0x34188C7A: FBB0 F0F1 UDIV R0, R0, R1 0x34188C7E: 9006 STR R0, [SP, #24] 0x34188C80: E008 B 46L10 ; 0x34188C94
.L9: 0x34188C82: F008 FEFB BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A7C 0x34188C86: 9006 STR R0, [SP, #24] 0x34188C88: 9806 LDR R0, [SP, #24] 0x34188C8A: 9905 LDR R1, [SP, #20] 0x34188C8C: FBB0 F0F1 UDIV R0, R0, R1 0x34188C90: 9006 STR R0, [SP, #24] 0x34188C92: E7FF B 46L10 ; 0x34188C94
.L10: 0x34188C94: E025 B 46L13 ; 0x34188CE2 0x34188C96: F001 FFC9 BL LL_RCC_HSI_IsReady.77 ; 0x3418AC2C 0x34188C9A: B140 CBZ R0, .L11 ; 0x34188CAE 0x34188C9C: F001 FFCE BL LL_RCC_HSI_GetDivider.78 ; 0x3418AC3C 0x34188CA0: 09C1 LSRS R1, R0, #7 0x34188CA2: F249 0000 MOVW R0, #0x9000 0x34188CA6: F2C0 30D0 MOVT R0, #0x03D0 0x34188CAA: 40C8 LSRS R0, R1 0x34188CAC: 9006 STR R0, [SP, #24]
.L11: 0x34188CAE: E018 B 46L13 ; 0x34188CE2 0x34188CB0: F001 FFCC BL LL_RCC_MSI_IsReady.79 ; 0x3418AC4C 0x34188CB4: B120 CBZ R0, .L12 ; 0x34188CC0 0x34188CB6: F640 1000 MOVW R0, #0x0900 0x34188CBA: F2C0 003D MOVT R0, #61 0x34188CBE: 9006 STR R0, [SP, #24]
.L12: 0x34188CC0: E00F B 46L13 ; 0x34188CE2 0x34188CC2: F248 0000 MOVW R0, #0x8000 0x34188CC6: F2C0 00BB MOVT R0, #187 0x34188CCA: 9006 STR R0, [SP, #24] 0x34188CCC: E009 B 46L13 ; 0x34188CE2 0x34188CCE: F007 FA93 BL HAL_RCC_GetSysClockFreq ; 0x341901F8 0x34188CD2: 9001 STR R0, [SP, #4] 0x34188CD4: F7FF FF0E BL LL_RCC_GetTIMPrescaler ; 0x34188AF4 0x34188CD8: 4601 MOV R1, R0 0x34188CDA: 9801 LDR R0, [SP, #4] 0x34188CDC: 40C8 LSRS R0, R1 0x34188CDE: 9006 STR R0, [SP, #24] 0x34188CE0: E7FF B 46L13 ; 0x34188CE2
.L13: 0x34188CE2: 9806 LDR R0, [SP, #24] 0x34188CE4: B008 ADD SP, SP, #32 0x34188CE6: BD80 POP 123R7, PC}

Section .text.RCCEx_GetCLKPCLKFreq from blto2_FSBL_lto.o, size=736, align=4


RCCEx_GetCLKPCLKFreq: 0x34188CE8: B580 PUSH 123R7, LR} 0x34188CEA: B08A SUB SP, SP, #40 0x34188CEC: 9009 STR R0, [SP, #36] 0x34188CEE: 2000 MOVS R0, #0 0x34188CF0: 9008 STR R0, [SP, #32] 0x34188CF2: F002 F9E3 BL LL_RCC_CLKP_IsEnabled ; 0x3418B0BC 0x34188CF6: 2801 CMP R0, #1 0x34188CF8: F040 8163 BNE.W 46L29 ; 0x34188FC2 0x34188CFC: 9809 LDR R0, [SP, #36] 0x34188CFE: F007 FB01 BL LL_RCC_GetCLKPClockSource ; 0x34190304 0x34188D02: 4601 MOV R1, R0 0x34188D04: 9106 STR R1, [SP, #24] 0x34188D06: 2807 CMP R0, #7 0x34188D08: F200 815B BHI.W 46L29 ; 0x34188FC2 0x34188D0C: 9906 LDR R1, [SP, #24] 0x34188D0E: E8DF F011 TBH 91PC, R1, LSL #1] 0x34188D12: 08 DC.B 0x08 ; '\b' 0x34188D13: 00 DC.B 0x00 ; '\0' 0x34188D14: 15 DC.B 0x15 ; '\x15' 0x34188D15: 00 DC.B 0x00 ; '\0' 0x34188D16: 1E DC.B 0x1E ; '\x1E' 0x34188D17: 00 DC.B 0x00 ; '\0' 0x34188D18: DE DC.B 0xDE ; '\xDE' 0x34188D19: 00 DC.B 0x00 ; '\0' 0x34188D1A: 27 DC.B 0x27 ; ''' 0x34188D1B: 00 DC.B 0x00 ; '\0' 0x34188D1C: 64 DC.B 0x64 ; 'd' 0x34188D1D: 00 DC.B 0x00 ; '\0' 0x34188D1E: A1 DC.B 0xA1 ; '\xA1' 0x34188D1F: 00 DC.B 0x00 ; '\0' 0x34188D20: 1B DC.B 0x1B ; '\x1B' 0x34188D21: 01 DC.B 0x01 ; '\x01' 0x34188D22: F001 FF83 BL LL_RCC_HSI_IsReady.77 ; 0x3418AC2C 0x34188D26: B140 CBZ R0, .L1 ; 0x34188D3A 0x34188D28: F001 FF88 BL LL_RCC_HSI_GetDivider.78 ; 0x3418AC3C 0x34188D2C: 09C1 LSRS R1, R0, #7 0x34188D2E: F249 0000 MOVW R0, #0x9000 0x34188D32: F2C0 30D0 MOVT R0, #0x03D0 0x34188D36: 40C8 LSRS R0, R1 0x34188D38: 9008 STR R0, [SP, #32]
.L1: 0x34188D3A: E142 B 46L29 ; 0x34188FC2 0x34188D3C: F001 FF86 BL LL_RCC_MSI_IsReady.79 ; 0x3418AC4C 0x34188D40: B120 CBZ R0, .L2 ; 0x34188D4C 0x34188D42: F640 1000 MOVW R0, #0x0900 0x34188D46: F2C0 003D MOVT R0, #61 0x34188D4A: 9008 STR R0, [SP, #32]
.L2: 0x34188D4C: E139 B 46L29 ; 0x34188FC2 0x34188D4E: F001 FF8D BL LL_RCC_HSE_IsReady.80 ; 0x3418AC6C 0x34188D52: B120 CBZ R0, .L3 ; 0x34188D5E 0x34188D54: F646 4000 MOVW R0, #0x6C00 0x34188D58: F2C0 20DC MOVT R0, #0x02DC 0x34188D5C: 9008 STR R0, [SP, #32]
.L3: 0x34188D5E: E130 B 46L29 ; 0x34188FC2 0x34188D60: F002 F90E BL LL_RCC_IC5_IsEnabled ; 0x3418AF80 0x34188D64: B3C0 CBZ R0, .L8 ; 0x34188DD8 0x34188D66: F008 FF13 BL LL_RCC_IC5_GetDivider ; 0x34191B90 0x34188D6A: 9007 STR R0, [SP, #28] 0x34188D6C: F002 F910 BL LL_RCC_IC5_GetSource ; 0x3418AF90 0x34188D70: 4601 MOV R1, R0 0x34188D72: 9105 STR R1, [SP, #20] 0x34188D74: B160 CBZ R0, .L4 ; 0x34188D90 0x34188D76: 9805 LDR R0, [SP, #20] 0x34188D78: F1B0 5F80 CMP.W R0, #0x10000000 0x34188D7C: D011 BEQ 46L5 ; 0x34188DA2 0x34188D7E: 9805 LDR R0, [SP, #20] 0x34188D80: F1B0 5F00 CMP.W R0, #0x20000000 0x34188D84: D016 BEQ 46L6 ; 0x34188DB4 0x34188D86: 9805 LDR R0, [SP, #20] 0x34188D88: F1B0 5F40 CMP.W R0, #0x30000000 0x34188D8C: D01B BEQ 46L7 ; 0x34188DC6 0x34188D8E: E023 B 46L8 ; 0x34188DD8
.L4: 0x34188D90: F008 FDAE BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F0 0x34188D94: 9008 STR R0, [SP, #32] 0x34188D96: 9808 LDR R0, [SP, #32] 0x34188D98: 9907 LDR R1, [SP, #28] 0x34188D9A: FBB0 F0F1 UDIV R0, R0, R1 0x34188D9E: 9008 STR R0, [SP, #32] 0x34188DA0: E01A B 46L8 ; 0x34188DD8
.L5: 0x34188DA2: F008 FDE7 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191974 0x34188DA6: 9008 STR R0, [SP, #32] 0x34188DA8: 9808 LDR R0, [SP, #32] 0x34188DAA: 9907 LDR R1, [SP, #28] 0x34188DAC: FBB0 F0F1 UDIV R0, R0, R1 0x34188DB0: 9008 STR R0, [SP, #32] 0x34188DB2: E011 B 46L8 ; 0x34188DD8
.L6: 0x34188DB4: F008 FE20 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919F8 0x34188DB8: 9008 STR R0, [SP, #32] 0x34188DBA: 9808 LDR R0, [SP, #32] 0x34188DBC: 9907 LDR R1, [SP, #28] 0x34188DBE: FBB0 F0F1 UDIV R0, R0, R1 0x34188DC2: 9008 STR R0, [SP, #32] 0x34188DC4: E008 B 46L8 ; 0x34188DD8
.L7: 0x34188DC6: F008 FE59 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A7C 0x34188DCA: 9008 STR R0, [SP, #32] 0x34188DCC: 9808 LDR R0, [SP, #32] 0x34188DCE: 9907 LDR R1, [SP, #28] 0x34188DD0: FBB0 F0F1 UDIV R0, R0, R1 0x34188DD4: 9008 STR R0, [SP, #32] 0x34188DD6: E7FF B 46L8 ; 0x34188DD8
.L8: 0x34188DD8: E0F3 B 46L29 ; 0x34188FC2 0x34188DDA: F002 F91F BL LL_RCC_IC10_IsEnabled ; 0x3418B01C 0x34188DDE: B3C0 CBZ R0, .L13 ; 0x34188E52 0x34188DE0: F008 FEFA BL LL_RCC_IC10_GetDivider ; 0x34191BD8 0x34188DE4: 9007 STR R0, [SP, #28] 0x34188DE6: F002 F921 BL LL_RCC_IC10_GetSource ; 0x3418B02C 0x34188DEA: 4601 MOV R1, R0 0x34188DEC: 9104 STR R1, [SP, #16] 0x34188DEE: B160 CBZ R0, .L9 ; 0x34188E0A 0x34188DF0: 9804 LDR R0, [SP, #16] 0x34188DF2: F1B0 5F80 CMP.W R0, #0x10000000 0x34188DF6: D011 BEQ 46L10 ; 0x34188E1C 0x34188DF8: 9804 LDR R0, [SP, #16] 0x34188DFA: F1B0 5F00 CMP.W R0, #0x20000000 0x34188DFE: D016 BEQ 46L11 ; 0x34188E2E 0x34188E00: 9804 LDR R0, [SP, #16] 0x34188E02: F1B0 5F40 CMP.W R0, #0x30000000 0x34188E06: D01B BEQ 46L12 ; 0x34188E40 0x34188E08: E023 B 46L13 ; 0x34188E52
.L9: 0x34188E0A: F008 FD71 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F0 0x34188E0E: 9008 STR R0, [SP, #32] 0x34188E10: 9808 LDR R0, [SP, #32] 0x34188E12: 9907 LDR R1, [SP, #28] 0x34188E14: FBB0 F0F1 UDIV R0, R0, R1 0x34188E18: 9008 STR R0, [SP, #32] 0x34188E1A: E01A B 46L13 ; 0x34188E52
.L10: 0x34188E1C: F008 FDAA BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191974 0x34188E20: 9008 STR R0, [SP, #32] 0x34188E22: 9808 LDR R0, [SP, #32] 0x34188E24: 9907 LDR R1, [SP, #28] 0x34188E26: FBB0 F0F1 UDIV R0, R0, R1 0x34188E2A: 9008 STR R0, [SP, #32] 0x34188E2C: E011 B 46L13 ; 0x34188E52
.L11: 0x34188E2E: F008 FDE3 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919F8 0x34188E32: 9008 STR R0, [SP, #32] 0x34188E34: 9808 LDR R0, [SP, #32] 0x34188E36: 9907 LDR R1, [SP, #28] 0x34188E38: FBB0 F0F1 UDIV R0, R0, R1 0x34188E3C: 9008 STR R0, [SP, #32] 0x34188E3E: E008 B 46L13 ; 0x34188E52
.L12: 0x34188E40: F008 FE1C BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A7C 0x34188E44: 9008 STR R0, [SP, #32] 0x34188E46: 9808 LDR R0, [SP, #32] 0x34188E48: 9907 LDR R1, [SP, #28] 0x34188E4A: FBB0 F0F1 UDIV R0, R0, R1 0x34188E4E: 9008 STR R0, [SP, #32] 0x34188E50: E7FF B 46L13 ; 0x34188E52
.L13: 0x34188E52: E0B6 B 46L29 ; 0x34188FC2 0x34188E54: F001 FFFA BL LL_RCC_IC15_IsEnabled ; 0x3418AE4C 0x34188E58: B3C0 CBZ R0, .L18 ; 0x34188ECC 0x34188E5A: F008 FE5D BL LL_RCC_IC15_GetDivider ; 0x34191B18 0x34188E5E: 9007 STR R0, [SP, #28] 0x34188E60: F001 FFFC BL LL_RCC_IC15_GetSource ; 0x3418AE5C 0x34188E64: 4601 MOV R1, R0 0x34188E66: 9103 STR R1, [SP, #12] 0x34188E68: B160 CBZ R0, .L14 ; 0x34188E84 0x34188E6A: 9803 LDR R0, [SP, #12] 0x34188E6C: F1B0 5F80 CMP.W R0, #0x10000000 0x34188E70: D011 BEQ 46L15 ; 0x34188E96 0x34188E72: 9803 LDR R0, [SP, #12] 0x34188E74: F1B0 5F00 CMP.W R0, #0x20000000 0x34188E78: D016 BEQ 46L16 ; 0x34188EA8 0x34188E7A: 9803 LDR R0, [SP, #12] 0x34188E7C: F1B0 5F40 CMP.W R0, #0x30000000 0x34188E80: D01B BEQ 46L17 ; 0x34188EBA 0x34188E82: E023 B 46L18 ; 0x34188ECC
.L14: 0x34188E84: F008 FD34 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F0 0x34188E88: 9008 STR R0, [SP, #32] 0x34188E8A: 9808 LDR R0, [SP, #32] 0x34188E8C: 9907 LDR R1, [SP, #28] 0x34188E8E: FBB0 F0F1 UDIV R0, R0, R1 0x34188E92: 9008 STR R0, [SP, #32] 0x34188E94: E01A B 46L18 ; 0x34188ECC
.L15: 0x34188E96: F008 FD6D BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191974 0x34188E9A: 9008 STR R0, [SP, #32] 0x34188E9C: 9808 LDR R0, [SP, #32] 0x34188E9E: 9907 LDR R1, [SP, #28] 0x34188EA0: FBB0 F0F1 UDIV R0, R0, R1 0x34188EA4: 9008 STR R0, [SP, #32] 0x34188EA6: E011 B 46L18 ; 0x34188ECC
.L16: 0x34188EA8: F008 FDA6 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919F8 0x34188EAC: 9008 STR R0, [SP, #32] 0x34188EAE: 9808 LDR R0, [SP, #32] 0x34188EB0: 9907 LDR R1, [SP, #28] 0x34188EB2: FBB0 F0F1 UDIV R0, R0, R1 0x34188EB6: 9008 STR R0, [SP, #32] 0x34188EB8: E008 B 46L18 ; 0x34188ECC
.L17: 0x34188EBA: F008 FDDF BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A7C 0x34188EBE: 9008 STR R0, [SP, #32] 0x34188EC0: 9808 LDR R0, [SP, #32] 0x34188EC2: 9907 LDR R1, [SP, #28] 0x34188EC4: FBB0 F0F1 UDIV R0, R0, R1 0x34188EC8: 9008 STR R0, [SP, #32] 0x34188ECA: E7FF B 46L18 ; 0x34188ECC
.L18: 0x34188ECC: E079 B 46L29 ; 0x34188FC2 0x34188ECE: F002 F8B5 BL LL_RCC_IC19_IsEnabled ; 0x3418B03C 0x34188ED2: B3C0 CBZ R0, .L23 ; 0x34188F46 0x34188ED4: F008 FE8C BL LL_RCC_IC19_GetDivider ; 0x34191BF0 0x34188ED8: 9007 STR R0, [SP, #28] 0x34188EDA: F002 F8B7 BL LL_RCC_IC19_GetSource ; 0x3418B04C 0x34188EDE: 4601 MOV R1, R0 0x34188EE0: 9102 STR R1, [SP, #8] 0x34188EE2: B160 CBZ R0, .L19 ; 0x34188EFE 0x34188EE4: 9802 LDR R0, [SP, #8] 0x34188EE6: F1B0 5F80 CMP.W R0, #0x10000000 0x34188EEA: D011 BEQ 46L20 ; 0x34188F10 0x34188EEC: 9802 LDR R0, [SP, #8] 0x34188EEE: F1B0 5F00 CMP.W R0, #0x20000000 0x34188EF2: D016 BEQ 46L21 ; 0x34188F22 0x34188EF4: 9802 LDR R0, [SP, #8] 0x34188EF6: F1B0 5F40 CMP.W R0, #0x30000000 0x34188EFA: D01B BEQ 46L22 ; 0x34188F34 0x34188EFC: E023 B 46L23 ; 0x34188F46
.L19: 0x34188EFE: F008 FCF7 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F0 0x34188F02: 9008 STR R0, [SP, #32] 0x34188F04: 9808 LDR R0, [SP, #32] 0x34188F06: 9907 LDR R1, [SP, #28] 0x34188F08: FBB0 F0F1 UDIV R0, R0, R1 0x34188F0C: 9008 STR R0, [SP, #32] 0x34188F0E: E01A B 46L23 ; 0x34188F46
.L20: 0x34188F10: F008 FD30 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191974 0x34188F14: 9008 STR R0, [SP, #32] 0x34188F16: 9808 LDR R0, [SP, #32] 0x34188F18: 9907 LDR R1, [SP, #28] 0x34188F1A: FBB0 F0F1 UDIV R0, R0, R1 0x34188F1E: 9008 STR R0, [SP, #32] 0x34188F20: E011 B 46L23 ; 0x34188F46
.L21: 0x34188F22: F008 FD69 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919F8 0x34188F26: 9008 STR R0, [SP, #32] 0x34188F28: 9808 LDR R0, [SP, #32] 0x34188F2A: 9907 LDR R1, [SP, #28] 0x34188F2C: FBB0 F0F1 UDIV R0, R0, R1 0x34188F30: 9008 STR R0, [SP, #32] 0x34188F32: E008 B 46L23 ; 0x34188F46
.L22: 0x34188F34: F008 FDA2 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A7C 0x34188F38: 9008 STR R0, [SP, #32] 0x34188F3A: 9808 LDR R0, [SP, #32] 0x34188F3C: 9907 LDR R1, [SP, #28] 0x34188F3E: FBB0 F0F1 UDIV R0, R0, R1 0x34188F42: 9008 STR R0, [SP, #32] 0x34188F44: E7FF B 46L23 ; 0x34188F46
.L23: 0x34188F46: E03C B 46L29 ; 0x34188FC2 0x34188F48: F002 F832 BL LL_RCC_IC20_IsEnabled ; 0x3418AFB0 0x34188F4C: B3C0 CBZ R0, .L28 ; 0x34188FC0 0x34188F4E: F008 FE2B BL LL_RCC_IC20_GetDivider ; 0x34191BA8 0x34188F52: 9007 STR R0, [SP, #28] 0x34188F54: F002 F834 BL LL_RCC_IC20_GetSource ; 0x3418AFC0 0x34188F58: 4601 MOV R1, R0 0x34188F5A: 9101 STR R1, [SP, #4] 0x34188F5C: B160 CBZ R0, .L24 ; 0x34188F78 0x34188F5E: 9801 LDR R0, [SP, #4] 0x34188F60: F1B0 5F80 CMP.W R0, #0x10000000 0x34188F64: D011 BEQ 46L25 ; 0x34188F8A 0x34188F66: 9801 LDR R0, [SP, #4] 0x34188F68: F1B0 5F00 CMP.W R0, #0x20000000 0x34188F6C: D016 BEQ 46L26 ; 0x34188F9C 0x34188F6E: 9801 LDR R0, [SP, #4] 0x34188F70: F1B0 5F40 CMP.W R0, #0x30000000 0x34188F74: D01B BEQ 46L27 ; 0x34188FAE 0x34188F76: E023 B 46L28 ; 0x34188FC0
.L24: 0x34188F78: F008 FCBA BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F0 0x34188F7C: 9008 STR R0, [SP, #32] 0x34188F7E: 9808 LDR R0, [SP, #32] 0x34188F80: 9907 LDR R1, [SP, #28] 0x34188F82: FBB0 F0F1 UDIV R0, R0, R1 0x34188F86: 9008 STR R0, [SP, #32] 0x34188F88: E01A B 46L28 ; 0x34188FC0
.L25: 0x34188F8A: F008 FCF3 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191974 0x34188F8E: 9008 STR R0, [SP, #32] 0x34188F90: 9808 LDR R0, [SP, #32] 0x34188F92: 9907 LDR R1, [SP, #28] 0x34188F94: FBB0 F0F1 UDIV R0, R0, R1 0x34188F98: 9008 STR R0, [SP, #32] 0x34188F9A: E011 B 46L28 ; 0x34188FC0
.L26: 0x34188F9C: F008 FD2C BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919F8 0x34188FA0: 9008 STR R0, [SP, #32] 0x34188FA2: 9808 LDR R0, [SP, #32] 0x34188FA4: 9907 LDR R1, [SP, #28] 0x34188FA6: FBB0 F0F1 UDIV R0, R0, R1 0x34188FAA: 9008 STR R0, [SP, #32] 0x34188FAC: E008 B 46L28 ; 0x34188FC0
.L27: 0x34188FAE: F008 FD65 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A7C 0x34188FB2: 9008 STR R0, [SP, #32] 0x34188FB4: 9808 LDR R0, [SP, #32] 0x34188FB6: 9907 LDR R1, [SP, #28] 0x34188FB8: FBB0 F0F1 UDIV R0, R0, R1 0x34188FBC: 9008 STR R0, [SP, #32] 0x34188FBE: E7FF B 46L28 ; 0x34188FC0
.L28: 0x34188FC0: E7FF B 46L29 ; 0x34188FC2
.L29: 0x34188FC2: 9808 LDR R0, [SP, #32] 0x34188FC4: B00A ADD SP, SP, #40 0x34188FC6: BD80 POP 123R7, PC}

Section .text.RCCEx_GetDCMIPPCLKFreq from blto2_FSBL_lto.o, size=228, align=4


RCCEx_GetDCMIPPCLKFreq: 0x34188FC8: B580 PUSH 123R7, LR} 0x34188FCA: B086 SUB SP, SP, #24 0x34188FCC: 9005 STR R0, [SP, #20] 0x34188FCE: 2000 MOVS R0, #0 0x34188FD0: 9004 STR R0, [SP, #16] 0x34188FD2: 9805 LDR R0, [SP, #20] 0x34188FD4: F007 F9A2 BL LL_RCC_GetDCMIPPClockSource ; 0x3419031C 0x34188FD8: 4601 MOV R1, R0 0x34188FDA: 9102 STR R1, [SP, #8] 0x34188FDC: B160 CBZ R0, .L1 ; 0x34188FF8 0x34188FDE: 9802 LDR R0, [SP, #8] 0x34188FE0: F5B0 1F80 CMP.W R0, #0x100000 0x34188FE4: D010 BEQ 46L2 ; 0x34189008 0x34188FE6: 9802 LDR R0, [SP, #8] 0x34188FE8: F5B0 1F00 CMP.W R0, #0x200000 0x34188FEC: D011 BEQ 46L3 ; 0x34189012 0x34188FEE: 9802 LDR R0, [SP, #8] 0x34188FF0: F5B0 1F40 CMP.W R0, #0x300000 0x34188FF4: D04A BEQ 46L9 ; 0x3418908C 0x34188FF6: E056 B 46L11 ; 0x341890A6
.L1: 0x34188FF8: F007 F8FE BL HAL_RCC_GetSysClockFreq ; 0x341901F8 0x34188FFC: F001 FD16 BL RCCEx_GetHCLKFreq ; 0x3418AA2C 0x34189000: F001 FFE6 BL RCCEx_GetPCLK5Freq ; 0x3418AFD0 0x34189004: 9004 STR R0, [SP, #16] 0x34189006: E04E B 46L11 ; 0x341890A6
.L2: 0x34189008: 2007 MOVS R0, #7 0x3418900A: F7FF FE6D BL RCCEx_GetCLKPCLKFreq ; 0x34188CE8 0x3418900E: 9004 STR R0, [SP, #16] 0x34189010: E049 B 46L11 ; 0x341890A6
.L3: 0x34189012: F002 F843 BL LL_RCC_IC17_IsEnabled ; 0x3418B09C 0x34189016: B3C0 CBZ R0, .L8 ; 0x3418908A 0x34189018: F008 FE0E BL LL_RCC_IC17_GetDivider ; 0x34191C38 0x3418901C: 9003 STR R0, [SP, #12] 0x3418901E: F002 F845 BL LL_RCC_IC17_GetSource ; 0x3418B0AC 0x34189022: 4601 MOV R1, R0 0x34189024: 9101 STR R1, [SP, #4] 0x34189026: B160 CBZ R0, .L4 ; 0x34189042 0x34189028: 9801 LDR R0, [SP, #4] 0x3418902A: F1B0 5F80 CMP.W R0, #0x10000000 0x3418902E: D011 BEQ 46L5 ; 0x34189054 0x34189030: 9801 LDR R0, [SP, #4] 0x34189032: F1B0 5F00 CMP.W R0, #0x20000000 0x34189036: D016 BEQ 46L6 ; 0x34189066 0x34189038: 9801 LDR R0, [SP, #4] 0x3418903A: F1B0 5F40 CMP.W R0, #0x30000000 0x3418903E: D01B BEQ 46L7 ; 0x34189078 0x34189040: E023 B 46L8 ; 0x3418908A
.L4: 0x34189042: F008 FC55 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F0 0x34189046: 9004 STR R0, [SP, #16] 0x34189048: 9804 LDR R0, [SP, #16] 0x3418904A: 9903 LDR R1, [SP, #12] 0x3418904C: FBB0 F0F1 UDIV R0, R0, R1 0x34189050: 9004 STR R0, [SP, #16] 0x34189052: E01A B 46L8 ; 0x3418908A
.L5: 0x34189054: F008 FC8E BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191974 0x34189058: 9004 STR R0, [SP, #16] 0x3418905A: 9804 LDR R0, [SP, #16] 0x3418905C: 9903 LDR R1, [SP, #12] 0x3418905E: FBB0 F0F1 UDIV R0, R0, R1 0x34189062: 9004 STR R0, [SP, #16] 0x34189064: E011 B 46L8 ; 0x3418908A
.L6: 0x34189066: F008 FCC7 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919F8 0x3418906A: 9004 STR R0, [SP, #16] 0x3418906C: 9804 LDR R0, [SP, #16] 0x3418906E: 9903 LDR R1, [SP, #12] 0x34189070: FBB0 F0F1 UDIV R0, R0, R1 0x34189074: 9004 STR R0, [SP, #16] 0x34189076: E008 B 46L8 ; 0x3418908A
.L7: 0x34189078: F008 FD00 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A7C 0x3418907C: 9004 STR R0, [SP, #16] 0x3418907E: 9804 LDR R0, [SP, #16] 0x34189080: 9903 LDR R1, [SP, #12] 0x34189082: FBB0 F0F1 UDIV R0, R0, R1 0x34189086: 9004 STR R0, [SP, #16] 0x34189088: E7FF B 46L8 ; 0x3418908A
.L8: 0x3418908A: E00C B 46L11 ; 0x341890A6
.L9: 0x3418908C: F001 FDCE BL LL_RCC_HSI_IsReady.77 ; 0x3418AC2C 0x34189090: B140 CBZ R0, .L10 ; 0x341890A4 0x34189092: F001 FDD3 BL LL_RCC_HSI_GetDivider.78 ; 0x3418AC3C 0x34189096: 09C1 LSRS R1, R0, #7 0x34189098: F249 0000 MOVW R0, #0x9000 0x3418909C: F2C0 30D0 MOVT R0, #0x03D0 0x341890A0: 40C8 LSRS R0, R1 0x341890A2: 9004 STR R0, [SP, #16]
.L10: 0x341890A4: E7FF B 46L11 ; 0x341890A6
.L11: 0x341890A6: 9804 LDR R0, [SP, #16] 0x341890A8: B006 ADD SP, SP, #24 0x341890AA: BD80 POP 123R7, PC}

Section .text.RCCEx_GetETH1CLKFreq from blto2_FSBL_lto.o, size=216, align=4


RCCEx_GetETH1CLKFreq: 0x341890AC: B580 PUSH 123R7, LR} 0x341890AE: B086 SUB SP, SP, #24 0x341890B0: 9005 STR R0, [SP, #20] 0x341890B2: 2000 MOVS R0, #0 0x341890B4: 9004 STR R0, [SP, #16] 0x341890B6: 9805 LDR R0, [SP, #20] 0x341890B8: F007 F93C BL LL_RCC_GetETHClockSource ; 0x34190334 0x341890BC: 4601 MOV R1, R0 0x341890BE: 9102 STR R1, [SP, #8] 0x341890C0: B160 CBZ R0, .L1 ; 0x341890DC 0x341890C2: 9802 LDR R0, [SP, #8] 0x341890C4: F5B0 5F80 CMP.W R0, #0x1000 0x341890C8: D00E BEQ 46L2 ; 0x341890E8 0x341890CA: 9802 LDR R0, [SP, #8] 0x341890CC: F5B0 5F00 CMP.W R0, #0x2000 0x341890D0: D00F BEQ 46L3 ; 0x341890F2 0x341890D2: 9802 LDR R0, [SP, #8] 0x341890D4: F5B0 5F40 CMP.W R0, #0x3000 0x341890D8: D048 BEQ 46L9 ; 0x3418916C 0x341890DA: E050 B 46L11 ; 0x3418917E
.L1: 0x341890DC: F007 F88C BL HAL_RCC_GetSysClockFreq ; 0x341901F8 0x341890E0: F001 FCA4 BL RCCEx_GetHCLKFreq ; 0x3418AA2C 0x341890E4: 9004 STR R0, [SP, #16] 0x341890E6: E04A B 46L11 ; 0x3418917E
.L2: 0x341890E8: 2007 MOVS R0, #7 0x341890EA: F7FF FDFD BL RCCEx_GetCLKPCLKFreq ; 0x34188CE8 0x341890EE: 9004 STR R0, [SP, #16] 0x341890F0: E045 B 46L11 ; 0x3418917E
.L3: 0x341890F2: F001 FFC3 BL LL_RCC_IC12_IsEnabled ; 0x3418B07C 0x341890F6: B3C0 CBZ R0, .L8 ; 0x3418916A 0x341890F8: F008 FD92 BL LL_RCC_IC12_GetDivider ; 0x34191C20 0x341890FC: 9003 STR R0, [SP, #12] 0x341890FE: F001 FFC5 BL LL_RCC_IC12_GetSource ; 0x3418B08C 0x34189102: 4601 MOV R1, R0 0x34189104: 9101 STR R1, [SP, #4] 0x34189106: B160 CBZ R0, .L4 ; 0x34189122 0x34189108: 9801 LDR R0, [SP, #4] 0x3418910A: F1B0 5F80 CMP.W R0, #0x10000000 0x3418910E: D011 BEQ 46L5 ; 0x34189134 0x34189110: 9801 LDR R0, [SP, #4] 0x34189112: F1B0 5F00 CMP.W R0, #0x20000000 0x34189116: D016 BEQ 46L6 ; 0x34189146 0x34189118: 9801 LDR R0, [SP, #4] 0x3418911A: F1B0 5F40 CMP.W R0, #0x30000000 0x3418911E: D01B BEQ 46L7 ; 0x34189158 0x34189120: E023 B 46L8 ; 0x3418916A
.L4: 0x34189122: F008 FBE5 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F0 0x34189126: 9004 STR R0, [SP, #16] 0x34189128: 9804 LDR R0, [SP, #16] 0x3418912A: 9903 LDR R1, [SP, #12] 0x3418912C: FBB0 F0F1 UDIV R0, R0, R1 0x34189130: 9004 STR R0, [SP, #16] 0x34189132: E01A B 46L8 ; 0x3418916A
.L5: 0x34189134: F008 FC1E BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191974 0x34189138: 9004 STR R0, [SP, #16] 0x3418913A: 9804 LDR R0, [SP, #16] 0x3418913C: 9903 LDR R1, [SP, #12] 0x3418913E: FBB0 F0F1 UDIV R0, R0, R1 0x34189142: 9004 STR R0, [SP, #16] 0x34189144: E011 B 46L8 ; 0x3418916A
.L6: 0x34189146: F008 FC57 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919F8 0x3418914A: 9004 STR R0, [SP, #16] 0x3418914C: 9804 LDR R0, [SP, #16] 0x3418914E: 9903 LDR R1, [SP, #12] 0x34189150: FBB0 F0F1 UDIV R0, R0, R1 0x34189154: 9004 STR R0, [SP, #16] 0x34189156: E008 B 46L8 ; 0x3418916A
.L7: 0x34189158: F008 FC90 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A7C 0x3418915C: 9004 STR R0, [SP, #16] 0x3418915E: 9804 LDR R0, [SP, #16] 0x34189160: 9903 LDR R1, [SP, #12] 0x34189162: FBB0 F0F1 UDIV R0, R0, R1 0x34189166: 9004 STR R0, [SP, #16] 0x34189168: E7FF B 46L8 ; 0x3418916A
.L8: 0x3418916A: E008 B 46L11 ; 0x3418917E
.L9: 0x3418916C: F001 FD7E BL LL_RCC_HSE_IsReady.80 ; 0x3418AC6C 0x34189170: B120 CBZ R0, .L10 ; 0x3418917C 0x34189172: F646 4000 MOVW R0, #0x6C00 0x34189176: F2C0 20DC MOVT R0, #0x02DC 0x3418917A: 9004 STR R0, [SP, #16]
.L10: 0x3418917C: E7FF B 46L11 ; 0x3418917E
.L11: 0x3418917E: 9804 LDR R0, [SP, #16] 0x34189180: B006 ADD SP, SP, #24 0x34189182: BD80 POP 123R7, PC}

Section .text.RCCEx_GetI3CCLKFreq from blto2_FSBL_lto.o, size=516, align=4


RCCEx_GetI3CCLKFreq: 0x34189184: B580 PUSH 123R7, LR} 0x34189186: B086 SUB SP, SP, #24 0x34189188: 9005 STR R0, [SP, #20] 0x3418918A: 2000 MOVS R0, #0 0x3418918C: 9004 STR R0, [SP, #16] 0x3418918E: 9805 LDR R0, [SP, #20] 0x34189190: F7FF FC88 BL LL_RCC_GetI3CClockSource ; 0x34188AA4 0x34189194: 4601 MOV R1, R0 0x34189196: 9102 STR R1, [SP, #8] 0x34189198: F241 010C MOVW R1, #0x100C 0x3418919C: F2C0 7100 MOVT R1, #0x0700 0x341891A0: 4288 CMP R0, R1 0x341891A2: D051 BEQ 46L1 ; 0x34189248 0x341891A4: 9802 LDR R0, [SP, #8] 0x341891A6: F241 410C MOVW R1, #0x140C 0x341891AA: F2C0 7100 MOVT R1, #0x0700 0x341891AE: 4288 CMP R0, R1 0x341891B0: D04A BEQ 46L1 ; 0x34189248 0x341891B2: 9802 LDR R0, [SP, #8] 0x341891B4: F241 010C MOVW R1, #0x100C 0x341891B8: F2C0 7101 MOVT R1, #0x0701 0x341891BC: 4288 CMP R0, R1 0x341891BE: D04B BEQ 46L2 ; 0x34189258 0x341891C0: 9802 LDR R0, [SP, #8] 0x341891C2: F241 410C MOVW R1, #0x140C 0x341891C6: F2C0 7101 MOVT R1, #0x0701 0x341891CA: 4288 CMP R0, R1 0x341891CC: D044 BEQ 46L2 ; 0x34189258 0x341891CE: 9802 LDR R0, [SP, #8] 0x341891D0: F241 010C MOVW R1, #0x100C 0x341891D4: F2C0 7102 MOVT R1, #0x0702 0x341891D8: 4288 CMP R0, R1 0x341891DA: D042 BEQ 46L3 ; 0x34189262 0x341891DC: 9802 LDR R0, [SP, #8] 0x341891DE: F241 410C MOVW R1, #0x140C 0x341891E2: F2C0 7102 MOVT R1, #0x0702 0x341891E6: 4288 CMP R0, R1 0x341891E8: D03B BEQ 46L3 ; 0x34189262 0x341891EA: 9802 LDR R0, [SP, #8] 0x341891EC: F241 010C MOVW R1, #0x100C 0x341891F0: F2C0 7103 MOVT R1, #0x0703 0x341891F4: 4288 CMP R0, R1 0x341891F6: D071 BEQ 46L9 ; 0x341892DC 0x341891F8: 9802 LDR R0, [SP, #8] 0x341891FA: F241 410C MOVW R1, #0x140C 0x341891FE: F2C0 7103 MOVT R1, #0x0703 0x34189202: 4288 CMP R0, R1 0x34189204: D06A BEQ 46L9 ; 0x341892DC 0x34189206: 9802 LDR R0, [SP, #8] 0x34189208: F241 010C MOVW R1, #0x100C 0x3418920C: F2C0 7104 MOVT R1, #0x0704 0x34189210: 4288 CMP R0, R1 0x34189212: F000 80AD BEQ.W 46L17 ; 0x34189370 0x34189216: 9802 LDR R0, [SP, #8] 0x34189218: F241 410C MOVW R1, #0x140C 0x3418921C: F2C0 7104 MOVT R1, #0x0704 0x34189220: 4288 CMP R0, R1 0x34189222: F000 80A5 BEQ.W 46L17 ; 0x34189370 0x34189226: 9802 LDR R0, [SP, #8] 0x34189228: F241 010C MOVW R1, #0x100C 0x3418922C: F2C0 7105 MOVT R1, #0x0705 0x34189230: 4288 CMP R0, R1 0x34189232: F000 8090 BEQ.W 46L15 ; 0x34189356 0x34189236: 9802 LDR R0, [SP, #8] 0x34189238: F241 410C MOVW R1, #0x140C 0x3418923C: F2C0 7105 MOVT R1, #0x0705 0x34189240: 4288 CMP R0, R1 0x34189242: F000 8088 BEQ.W 46L15 ; 0x34189356 0x34189246: E09C B 46L19 ; 0x34189382
.L1: 0x34189248: F006 FFD6 BL HAL_RCC_GetSysClockFreq ; 0x341901F8 0x3418924C: F001 FBEE BL RCCEx_GetHCLKFreq ; 0x3418AA2C 0x34189250: F001 FE14 BL RCCEx_GetPCLK1Freq ; 0x3418AE7C 0x34189254: 9004 STR R0, [SP, #16] 0x34189256: E094 B 46L19 ; 0x34189382
.L2: 0x34189258: 2007 MOVS R0, #7 0x3418925A: F7FF FD45 BL RCCEx_GetCLKPCLKFreq ; 0x34188CE8 0x3418925E: 9004 STR R0, [SP, #16] 0x34189260: E08F B 46L19 ; 0x34189382
.L3: 0x34189262: F001 FEDB BL LL_RCC_IC10_IsEnabled ; 0x3418B01C 0x34189266: B3C0 CBZ R0, .L8 ; 0x341892DA 0x34189268: F008 FCB6 BL LL_RCC_IC10_GetDivider ; 0x34191BD8 0x3418926C: 9003 STR R0, [SP, #12] 0x3418926E: F001 FEDD BL LL_RCC_IC10_GetSource ; 0x3418B02C 0x34189272: 4601 MOV R1, R0 0x34189274: 9101 STR R1, [SP, #4] 0x34189276: B160 CBZ R0, .L4 ; 0x34189292 0x34189278: 9801 LDR R0, [SP, #4] 0x3418927A: F1B0 5F80 CMP.W R0, #0x10000000 0x3418927E: D011 BEQ 46L5 ; 0x341892A4 0x34189280: 9801 LDR R0, [SP, #4] 0x34189282: F1B0 5F00 CMP.W R0, #0x20000000 0x34189286: D016 BEQ 46L6 ; 0x341892B6 0x34189288: 9801 LDR R0, [SP, #4] 0x3418928A: F1B0 5F40 CMP.W R0, #0x30000000 0x3418928E: D01B BEQ 46L7 ; 0x341892C8 0x34189290: E023 B 46L8 ; 0x341892DA
.L4: 0x34189292: F008 FB2D BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F0 0x34189296: 9004 STR R0, [SP, #16] 0x34189298: 9804 LDR R0, [SP, #16] 0x3418929A: 9903 LDR R1, [SP, #12] 0x3418929C: FBB0 F0F1 UDIV R0, R0, R1 0x341892A0: 9004 STR R0, [SP, #16] 0x341892A2: E01A B 46L8 ; 0x341892DA
.L5: 0x341892A4: F008 FB66 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191974 0x341892A8: 9004 STR R0, [SP, #16] 0x341892AA: 9804 LDR R0, [SP, #16] 0x341892AC: 9903 LDR R1, [SP, #12] 0x341892AE: FBB0 F0F1 UDIV R0, R0, R1 0x341892B2: 9004 STR R0, [SP, #16] 0x341892B4: E011 B 46L8 ; 0x341892DA
.L6: 0x341892B6: F008 FB9F BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919F8 0x341892BA: 9004 STR R0, [SP, #16] 0x341892BC: 9804 LDR R0, [SP, #16] 0x341892BE: 9903 LDR R1, [SP, #12] 0x341892C0: FBB0 F0F1 UDIV R0, R0, R1 0x341892C4: 9004 STR R0, [SP, #16] 0x341892C6: E008 B 46L8 ; 0x341892DA
.L7: 0x341892C8: F008 FBD8 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A7C 0x341892CC: 9004 STR R0, [SP, #16] 0x341892CE: 9804 LDR R0, [SP, #16] 0x341892D0: 9903 LDR R1, [SP, #12] 0x341892D2: FBB0 F0F1 UDIV R0, R0, R1 0x341892D6: 9004 STR R0, [SP, #16] 0x341892D8: E7FF B 46L8 ; 0x341892DA
.L8: 0x341892DA: E052 B 46L19 ; 0x34189382
.L9: 0x341892DC: F001 FDB6 BL LL_RCC_IC15_IsEnabled ; 0x3418AE4C 0x341892E0: B3C0 CBZ R0, .L14 ; 0x34189354 0x341892E2: F008 FC19 BL LL_RCC_IC15_GetDivider ; 0x34191B18 0x341892E6: 9003 STR R0, [SP, #12] 0x341892E8: F001 FDB8 BL LL_RCC_IC15_GetSource ; 0x3418AE5C 0x341892EC: 4601 MOV R1, R0 0x341892EE: 9100 STR R1, [SP, #0] 0x341892F0: B160 CBZ R0, .L10 ; 0x3418930C 0x341892F2: 9800 LDR R0, [SP, #0] 0x341892F4: F1B0 5F80 CMP.W R0, #0x10000000 0x341892F8: D011 BEQ 46L11 ; 0x3418931E 0x341892FA: 9800 LDR R0, [SP, #0] 0x341892FC: F1B0 5F00 CMP.W R0, #0x20000000 0x34189300: D016 BEQ 46L12 ; 0x34189330 0x34189302: 9800 LDR R0, [SP, #0] 0x34189304: F1B0 5F40 CMP.W R0, #0x30000000 0x34189308: D01B BEQ 46L13 ; 0x34189342 0x3418930A: E023 B 46L14 ; 0x34189354
.L10: 0x3418930C: F008 FAF0 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F0 0x34189310: 9004 STR R0, [SP, #16] 0x34189312: 9804 LDR R0, [SP, #16] 0x34189314: 9903 LDR R1, [SP, #12] 0x34189316: FBB0 F0F1 UDIV R0, R0, R1 0x3418931A: 9004 STR R0, [SP, #16] 0x3418931C: E01A B 46L14 ; 0x34189354
.L11: 0x3418931E: F008 FB29 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191974 0x34189322: 9004 STR R0, [SP, #16] 0x34189324: 9804 LDR R0, [SP, #16] 0x34189326: 9903 LDR R1, [SP, #12] 0x34189328: FBB0 F0F1 UDIV R0, R0, R1 0x3418932C: 9004 STR R0, [SP, #16] 0x3418932E: E011 B 46L14 ; 0x34189354
.L12: 0x34189330: F008 FB62 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919F8 0x34189334: 9004 STR R0, [SP, #16] 0x34189336: 9804 LDR R0, [SP, #16] 0x34189338: 9903 LDR R1, [SP, #12] 0x3418933A: FBB0 F0F1 UDIV R0, R0, R1 0x3418933E: 9004 STR R0, [SP, #16] 0x34189340: E008 B 46L14 ; 0x34189354
.L13: 0x34189342: F008 FB9B BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A7C 0x34189346: 9004 STR R0, [SP, #16] 0x34189348: 9804 LDR R0, [SP, #16] 0x3418934A: 9903 LDR R1, [SP, #12] 0x3418934C: FBB0 F0F1 UDIV R0, R0, R1 0x34189350: 9004 STR R0, [SP, #16] 0x34189352: E7FF B 46L14 ; 0x34189354
.L14: 0x34189354: E015 B 46L19 ; 0x34189382
.L15: 0x34189356: F001 FC69 BL LL_RCC_HSI_IsReady.77 ; 0x3418AC2C 0x3418935A: B140 CBZ R0, .L16 ; 0x3418936E 0x3418935C: F001 FC6E BL LL_RCC_HSI_GetDivider.78 ; 0x3418AC3C 0x34189360: 09C1 LSRS R1, R0, #7 0x34189362: F249 0000 MOVW R0, #0x9000 0x34189366: F2C0 30D0 MOVT R0, #0x03D0 0x3418936A: 40C8 LSRS R0, R1 0x3418936C: 9004 STR R0, [SP, #16]
.L16: 0x3418936E: E008 B 46L19 ; 0x34189382
.L17: 0x34189370: F001 FC6C BL LL_RCC_MSI_IsReady.79 ; 0x3418AC4C 0x34189374: B120 CBZ R0, .L18 ; 0x34189380 0x34189376: F640 1000 MOVW R0, #0x0900 0x3418937A: F2C0 003D MOVT R0, #61 0x3418937E: 9004 STR R0, [SP, #16]
.L18: 0x34189380: E7FF B 46L19 ; 0x34189382
.L19: 0x34189382: 9804 LDR R0, [SP, #16] 0x34189384: B006 ADD SP, SP, #24 0x34189386: BD80 POP 123R7, PC}

Section .text.RCCEx_GetLPUARTCLKFreq from blto2_FSBL_lto.o, size=412, align=4


RCCEx_GetLPUARTCLKFreq: 0x34189388: B580 PUSH 123R7, LR} 0x3418938A: B086 SUB SP, SP, #24 0x3418938C: 9005 STR R0, [SP, #20] 0x3418938E: 2000 MOVS R0, #0 0x34189390: 9004 STR R0, [SP, #16] 0x34189392: 9805 LDR R0, [SP, #20] 0x34189394: F006 FFFE BL LL_RCC_GetLPUARTClockSource ; 0x34190394 0x34189398: 4601 MOV R1, R0 0x3418939A: 9102 STR R1, [SP, #8] 0x3418939C: B1D8 CBZ R0, .L1 ; 0x341893D6 0x3418939E: 9802 LDR R0, [SP, #8] 0x341893A0: F5B0 7F80 CMP.W R0, #0x0100 0x341893A4: D01F BEQ 46L2 ; 0x341893E6 0x341893A6: 9802 LDR R0, [SP, #8] 0x341893A8: F5B0 7F00 CMP.W R0, #0x0200 0x341893AC: D020 BEQ 46L3 ; 0x341893F0 0x341893AE: 9802 LDR R0, [SP, #8] 0x341893B0: F5B0 7F40 CMP.W R0, #0x0300 0x341893B4: D059 BEQ 46L9 ; 0x3418946A 0x341893B6: 9802 LDR R0, [SP, #8] 0x341893B8: F5B0 6F80 CMP.W R0, #0x0400 0x341893BC: F000 80A8 BEQ.W 46L19 ; 0x34189510 0x341893C0: 9802 LDR R0, [SP, #8] 0x341893C2: F5B0 6FA0 CMP.W R0, #0x0500 0x341893C6: F000 809A BEQ.W 46L17 ; 0x341894FE 0x341893CA: 9802 LDR R0, [SP, #8] 0x341893CC: F5B0 6FC0 CMP.W R0, #0x0600 0x341893D0: F000 8088 BEQ.W 46L15 ; 0x341894E4 0x341893D4: E0A3 B 46L21 ; 0x3418951E
.L1: 0x341893D6: F006 FF0F BL HAL_RCC_GetSysClockFreq ; 0x341901F8 0x341893DA: F001 FB27 BL RCCEx_GetHCLKFreq ; 0x3418AA2C 0x341893DE: F001 FD99 BL RCCEx_GetPCLK4Freq ; 0x3418AF14 0x341893E2: 9004 STR R0, [SP, #16] 0x341893E4: E09B B 46L21 ; 0x3418951E
.L2: 0x341893E6: 2007 MOVS R0, #7 0x341893E8: F7FF FC7E BL RCCEx_GetCLKPCLKFreq ; 0x34188CE8 0x341893EC: 9004 STR R0, [SP, #16] 0x341893EE: E096 B 46L21 ; 0x3418951E
.L3: 0x341893F0: F001 FD60 BL LL_RCC_IC9_IsEnabled ; 0x3418AEB4 0x341893F4: B3C0 CBZ R0, .L8 ; 0x34189468 0x341893F6: F008 FB9B BL LL_RCC_IC9_GetDivider ; 0x34191B30 0x341893FA: 9003 STR R0, [SP, #12] 0x341893FC: F001 FD62 BL LL_RCC_IC9_GetSource ; 0x3418AEC4 0x34189400: 4601 MOV R1, R0 0x34189402: 9101 STR R1, [SP, #4] 0x34189404: B160 CBZ R0, .L4 ; 0x34189420 0x34189406: 9801 LDR R0, [SP, #4] 0x34189408: F1B0 5F80 CMP.W R0, #0x10000000 0x3418940C: D011 BEQ 46L5 ; 0x34189432 0x3418940E: 9801 LDR R0, [SP, #4] 0x34189410: F1B0 5F00 CMP.W R0, #0x20000000 0x34189414: D016 BEQ 46L6 ; 0x34189444 0x34189416: 9801 LDR R0, [SP, #4] 0x34189418: F1B0 5F40 CMP.W R0, #0x30000000 0x3418941C: D01B BEQ 46L7 ; 0x34189456 0x3418941E: E023 B 46L8 ; 0x34189468
.L4: 0x34189420: F008 FA66 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F0 0x34189424: 9004 STR R0, [SP, #16] 0x34189426: 9804 LDR R0, [SP, #16] 0x34189428: 9903 LDR R1, [SP, #12] 0x3418942A: FBB0 F0F1 UDIV R0, R0, R1 0x3418942E: 9004 STR R0, [SP, #16] 0x34189430: E01A B 46L8 ; 0x34189468
.L5: 0x34189432: F008 FA9F BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191974 0x34189436: 9004 STR R0, [SP, #16] 0x34189438: 9804 LDR R0, [SP, #16] 0x3418943A: 9903 LDR R1, [SP, #12] 0x3418943C: FBB0 F0F1 UDIV R0, R0, R1 0x34189440: 9004 STR R0, [SP, #16] 0x34189442: E011 B 46L8 ; 0x34189468
.L6: 0x34189444: F008 FAD8 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919F8 0x34189448: 9004 STR R0, [SP, #16] 0x3418944A: 9804 LDR R0, [SP, #16] 0x3418944C: 9903 LDR R1, [SP, #12] 0x3418944E: FBB0 F0F1 UDIV R0, R0, R1 0x34189452: 9004 STR R0, [SP, #16] 0x34189454: E008 B 46L8 ; 0x34189468
.L7: 0x34189456: F008 FB11 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A7C 0x3418945A: 9004 STR R0, [SP, #16] 0x3418945C: 9804 LDR R0, [SP, #16] 0x3418945E: 9903 LDR R1, [SP, #12] 0x34189460: FBB0 F0F1 UDIV R0, R0, R1 0x34189464: 9004 STR R0, [SP, #16] 0x34189466: E7FF B 46L8 ; 0x34189468
.L8: 0x34189468: E059 B 46L21 ; 0x3418951E
.L9: 0x3418946A: F001 FD33 BL LL_RCC_IC14_IsEnabled ; 0x3418AED4 0x3418946E: B3C0 CBZ R0, .L14 ; 0x341894E2 0x34189470: F008 FB6A BL LL_RCC_IC14_GetDivider ; 0x34191B48 0x34189474: 9003 STR R0, [SP, #12] 0x34189476: F001 FD35 BL LL_RCC_IC14_GetSource ; 0x3418AEE4 0x3418947A: 4601 MOV R1, R0 0x3418947C: 9100 STR R1, [SP, #0] 0x3418947E: B160 CBZ R0, .L10 ; 0x3418949A 0x34189480: 9800 LDR R0, [SP, #0] 0x34189482: F1B0 5F80 CMP.W R0, #0x10000000 0x34189486: D011 BEQ 46L11 ; 0x341894AC 0x34189488: 9800 LDR R0, [SP, #0] 0x3418948A: F1B0 5F00 CMP.W R0, #0x20000000 0x3418948E: D016 BEQ 46L12 ; 0x341894BE 0x34189490: 9800 LDR R0, [SP, #0] 0x34189492: F1B0 5F40 CMP.W R0, #0x30000000 0x34189496: D01B BEQ 46L13 ; 0x341894D0 0x34189498: E023 B 46L14 ; 0x341894E2
.L10: 0x3418949A: F008 FA29 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F0 0x3418949E: 9004 STR R0, [SP, #16] 0x341894A0: 9804 LDR R0, [SP, #16] 0x341894A2: 9903 LDR R1, [SP, #12] 0x341894A4: FBB0 F0F1 UDIV R0, R0, R1 0x341894A8: 9004 STR R0, [SP, #16] 0x341894AA: E01A B 46L14 ; 0x341894E2
.L11: 0x341894AC: F008 FA62 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191974 0x341894B0: 9004 STR R0, [SP, #16] 0x341894B2: 9804 LDR R0, [SP, #16] 0x341894B4: 9903 LDR R1, [SP, #12] 0x341894B6: FBB0 F0F1 UDIV R0, R0, R1 0x341894BA: 9004 STR R0, [SP, #16] 0x341894BC: E011 B 46L14 ; 0x341894E2
.L12: 0x341894BE: F008 FA9B BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919F8 0x341894C2: 9004 STR R0, [SP, #16] 0x341894C4: 9804 LDR R0, [SP, #16] 0x341894C6: 9903 LDR R1, [SP, #12] 0x341894C8: FBB0 F0F1 UDIV R0, R0, R1 0x341894CC: 9004 STR R0, [SP, #16] 0x341894CE: E008 B 46L14 ; 0x341894E2
.L13: 0x341894D0: F008 FAD4 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A7C 0x341894D4: 9004 STR R0, [SP, #16] 0x341894D6: 9804 LDR R0, [SP, #16] 0x341894D8: 9903 LDR R1, [SP, #12] 0x341894DA: FBB0 F0F1 UDIV R0, R0, R1 0x341894DE: 9004 STR R0, [SP, #16] 0x341894E0: E7FF B 46L14 ; 0x341894E2
.L14: 0x341894E2: E01C B 46L21 ; 0x3418951E
.L15: 0x341894E4: F001 FBA2 BL LL_RCC_HSI_IsReady.77 ; 0x3418AC2C 0x341894E8: B140 CBZ R0, .L16 ; 0x341894FC 0x341894EA: F001 FBA7 BL LL_RCC_HSI_GetDivider.78 ; 0x3418AC3C 0x341894EE: 09C1 LSRS R1, R0, #7 0x341894F0: F249 0000 MOVW R0, #0x9000 0x341894F4: F2C0 30D0 MOVT R0, #0x03D0 0x341894F8: 40C8 LSRS R0, R1 0x341894FA: 9004 STR R0, [SP, #16]
.L16: 0x341894FC: E00F B 46L21 ; 0x3418951E
.L17: 0x341894FE: F001 FBA5 BL LL_RCC_MSI_IsReady.79 ; 0x3418AC4C 0x34189502: B120 CBZ R0, .L18 ; 0x3418950E 0x34189504: F640 1000 MOVW R0, #0x0900 0x34189508: F2C0 003D MOVT R0, #61 0x3418950C: 9004 STR R0, [SP, #16]
.L18: 0x3418950E: E006 B 46L21 ; 0x3418951E
.L19: 0x34189510: F7FF F906 BL LL_RCC_LSE_IsReady.59 ; 0x34188720 0x34189514: B110 CBZ R0, .L20 ; 0x3418951C 0x34189516: F44F 4000 MOV.W R0, #0x8000 0x3418951A: 9004 STR R0, [SP, #16]
.L20: 0x3418951C: E7FF B 46L21 ; 0x3418951E
.L21: 0x3418951E: 9804 LDR R0, [SP, #16] 0x34189520: B006 ADD SP, SP, #24 0x34189522: BD80 POP 123R7, PC}

Section .text.RCCEx_GetLTDCCLKFreq from blto2_FSBL_lto.o, size=228, align=4


RCCEx_GetLTDCCLKFreq: 0x34189524: B580 PUSH 123R7, LR} 0x34189526: B086 SUB SP, SP, #24 0x34189528: 9005 STR R0, [SP, #20] 0x3418952A: 2000 MOVS R0, #0 0x3418952C: 9004 STR R0, [SP, #16] 0x3418952E: 9805 LDR R0, [SP, #20] 0x34189530: F006 FF3C BL LL_RCC_GetLTDCClockSource ; 0x341903AC 0x34189534: 4601 MOV R1, R0 0x34189536: 9102 STR R1, [SP, #8] 0x34189538: B160 CBZ R0, .L1 ; 0x34189554 0x3418953A: 9802 LDR R0, [SP, #8] 0x3418953C: F1B0 7F80 CMP.W R0, #0x01000000 0x34189540: D010 BEQ 46L2 ; 0x34189564 0x34189542: 9802 LDR R0, [SP, #8] 0x34189544: F1B0 7F00 CMP.W R0, #0x02000000 0x34189548: D011 BEQ 46L3 ; 0x3418956E 0x3418954A: 9802 LDR R0, [SP, #8] 0x3418954C: F1B0 7F40 CMP.W R0, #0x03000000 0x34189550: D04A BEQ 46L9 ; 0x341895E8 0x34189552: E056 B 46L11 ; 0x34189602
.L1: 0x34189554: F006 FE50 BL HAL_RCC_GetSysClockFreq ; 0x341901F8 0x34189558: F001 FA68 BL RCCEx_GetHCLKFreq ; 0x3418AA2C 0x3418955C: F001 FD38 BL RCCEx_GetPCLK5Freq ; 0x3418AFD0 0x34189560: 9004 STR R0, [SP, #16] 0x34189562: E04E B 46L11 ; 0x34189602
.L2: 0x34189564: 2007 MOVS R0, #7 0x34189566: F7FF FBBF BL RCCEx_GetCLKPCLKFreq ; 0x34188CE8 0x3418956A: 9004 STR R0, [SP, #16] 0x3418956C: E049 B 46L11 ; 0x34189602
.L3: 0x3418956E: F001 FD3D BL LL_RCC_IC16_IsEnabled ; 0x3418AFEC 0x34189572: B3C0 CBZ R0, .L8 ; 0x341895E6 0x34189574: F008 FB24 BL LL_RCC_IC16_GetDivider ; 0x34191BC0 0x34189578: 9003 STR R0, [SP, #12] 0x3418957A: F001 FD3F BL LL_RCC_IC16_GetSource ; 0x3418AFFC 0x3418957E: 4601 MOV R1, R0 0x34189580: 9101 STR R1, [SP, #4] 0x34189582: B160 CBZ R0, .L4 ; 0x3418959E 0x34189584: 9801 LDR R0, [SP, #4] 0x34189586: F1B0 5F80 CMP.W R0, #0x10000000 0x3418958A: D011 BEQ 46L5 ; 0x341895B0 0x3418958C: 9801 LDR R0, [SP, #4] 0x3418958E: F1B0 5F00 CMP.W R0, #0x20000000 0x34189592: D016 BEQ 46L6 ; 0x341895C2 0x34189594: 9801 LDR R0, [SP, #4] 0x34189596: F1B0 5F40 CMP.W R0, #0x30000000 0x3418959A: D01B BEQ 46L7 ; 0x341895D4 0x3418959C: E023 B 46L8 ; 0x341895E6
.L4: 0x3418959E: F008 F9A7 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F0 0x341895A2: 9004 STR R0, [SP, #16] 0x341895A4: 9804 LDR R0, [SP, #16] 0x341895A6: 9903 LDR R1, [SP, #12] 0x341895A8: FBB0 F0F1 UDIV R0, R0, R1 0x341895AC: 9004 STR R0, [SP, #16] 0x341895AE: E01A B 46L8 ; 0x341895E6
.L5: 0x341895B0: F008 F9E0 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191974 0x341895B4: 9004 STR R0, [SP, #16] 0x341895B6: 9804 LDR R0, [SP, #16] 0x341895B8: 9903 LDR R1, [SP, #12] 0x341895BA: FBB0 F0F1 UDIV R0, R0, R1 0x341895BE: 9004 STR R0, [SP, #16] 0x341895C0: E011 B 46L8 ; 0x341895E6
.L6: 0x341895C2: F008 FA19 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919F8 0x341895C6: 9004 STR R0, [SP, #16] 0x341895C8: 9804 LDR R0, [SP, #16] 0x341895CA: 9903 LDR R1, [SP, #12] 0x341895CC: FBB0 F0F1 UDIV R0, R0, R1 0x341895D0: 9004 STR R0, [SP, #16] 0x341895D2: E008 B 46L8 ; 0x341895E6
.L7: 0x341895D4: F008 FA52 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A7C 0x341895D8: 9004 STR R0, [SP, #16] 0x341895DA: 9804 LDR R0, [SP, #16] 0x341895DC: 9903 LDR R1, [SP, #12] 0x341895DE: FBB0 F0F1 UDIV R0, R0, R1 0x341895E2: 9004 STR R0, [SP, #16] 0x341895E4: E7FF B 46L8 ; 0x341895E6
.L8: 0x341895E6: E00C B 46L11 ; 0x34189602
.L9: 0x341895E8: F001 FB20 BL LL_RCC_HSI_IsReady.77 ; 0x3418AC2C 0x341895EC: B140 CBZ R0, .L10 ; 0x34189600 0x341895EE: F001 FB25 BL LL_RCC_HSI_GetDivider.78 ; 0x3418AC3C 0x341895F2: 09C1 LSRS R1, R0, #7 0x341895F4: F249 0000 MOVW R0, #0x9000 0x341895F8: F2C0 30D0 MOVT R0, #0x03D0 0x341895FC: 40C8 LSRS R0, R1 0x341895FE: 9004 STR R0, [SP, #16]
.L10: 0x34189600: E7FF B 46L11 ; 0x34189602
.L11: 0x34189602: 9804 LDR R0, [SP, #16] 0x34189604: B006 ADD SP, SP, #24 0x34189606: BD80 POP 123R7, PC}

Section .text.RCCEx_GetMDFCLKFreq from blto2_FSBL_lto.o, size=436, align=4


RCCEx_GetMDFCLKFreq: 0x34189608: B580 PUSH 123R7, LR} 0x3418960A: B088 SUB SP, SP, #32 0x3418960C: 9007 STR R0, [SP, #28] 0x3418960E: 2000 MOVS R0, #0 0x34189610: 9006 STR R0, [SP, #24] 0x34189612: 9807 LDR R0, [SP, #28] 0x34189614: F006 FED6 BL LL_RCC_GetMDFClockSource ; 0x341903C4 0x34189618: 4601 MOV R1, R0 0x3418961A: 9104 STR R1, [SP, #16] 0x3418961C: B300 CBZ R0, .L1 ; 0x34189660 0x3418961E: 9804 LDR R0, [SP, #16] 0x34189620: F5B0 3F80 CMP.W R0, #0x010000 0x34189624: D022 BEQ 46L2 ; 0x3418966C 0x34189626: 9804 LDR R0, [SP, #16] 0x34189628: F5B0 3F00 CMP.W R0, #0x020000 0x3418962C: D023 BEQ 46L3 ; 0x34189676 0x3418962E: 9804 LDR R0, [SP, #16] 0x34189630: F5B0 3F40 CMP.W R0, #0x030000 0x34189634: D05C BEQ 46L9 ; 0x341896F0 0x34189636: 9804 LDR R0, [SP, #16] 0x34189638: F5B0 2F80 CMP.W R0, #0x040000 0x3418963C: F000 80A2 BEQ.W 46L17 ; 0x34189784 0x34189640: 9804 LDR R0, [SP, #16] 0x34189642: F5B0 2FA0 CMP.W R0, #0x050000 0x34189646: F000 8090 BEQ.W 46L15 ; 0x3418976A 0x3418964A: 9804 LDR R0, [SP, #16] 0x3418964C: F5B0 2FC0 CMP.W R0, #0x060000 0x34189650: F000 80A1 BEQ.W 46L19 ; 0x34189796 0x34189654: 9804 LDR R0, [SP, #16] 0x34189656: F5B0 2FE0 CMP.W R0, #0x070000 0x3418965A: F000 80A2 BEQ.W 46L20 ; 0x341897A2 0x3418965E: E0AA B 46L21 ; 0x341897B6
.L1: 0x34189660: F006 FDCA BL HAL_RCC_GetSysClockFreq ; 0x341901F8 0x34189664: F001 F9E2 BL RCCEx_GetHCLKFreq ; 0x3418AA2C 0x34189668: 9006 STR R0, [SP, #24] 0x3418966A: E0A4 B 46L21 ; 0x341897B6
.L2: 0x3418966C: 2007 MOVS R0, #7 0x3418966E: F7FF FB3B BL RCCEx_GetCLKPCLKFreq ; 0x34188CE8 0x34189672: 9006 STR R0, [SP, #24] 0x34189674: E09F B 46L21 ; 0x341897B6
.L3: 0x34189676: F001 FC73 BL LL_RCC_IC7_IsEnabled ; 0x3418AF60 0x3418967A: B3C0 CBZ R0, .L8 ; 0x341896EE 0x3418967C: F008 FA7C BL LL_RCC_IC7_GetDivider ; 0x34191B78 0x34189680: 9005 STR R0, [SP, #20] 0x34189682: F001 FC75 BL LL_RCC_IC7_GetSource ; 0x3418AF70 0x34189686: 4601 MOV R1, R0 0x34189688: 9103 STR R1, [SP, #12] 0x3418968A: B160 CBZ R0, .L4 ; 0x341896A6 0x3418968C: 9803 LDR R0, [SP, #12] 0x3418968E: F1B0 5F80 CMP.W R0, #0x10000000 0x34189692: D011 BEQ 46L5 ; 0x341896B8 0x34189694: 9803 LDR R0, [SP, #12] 0x34189696: F1B0 5F00 CMP.W R0, #0x20000000 0x3418969A: D016 BEQ 46L6 ; 0x341896CA 0x3418969C: 9803 LDR R0, [SP, #12] 0x3418969E: F1B0 5F40 CMP.W R0, #0x30000000 0x341896A2: D01B BEQ 46L7 ; 0x341896DC 0x341896A4: E023 B 46L8 ; 0x341896EE
.L4: 0x341896A6: F008 F923 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F0 0x341896AA: 9006 STR R0, [SP, #24] 0x341896AC: 9806 LDR R0, [SP, #24] 0x341896AE: 9905 LDR R1, [SP, #20] 0x341896B0: FBB0 F0F1 UDIV R0, R0, R1 0x341896B4: 9006 STR R0, [SP, #24] 0x341896B6: E01A B 46L8 ; 0x341896EE
.L5: 0x341896B8: F008 F95C BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191974 0x341896BC: 9006 STR R0, [SP, #24] 0x341896BE: 9806 LDR R0, [SP, #24] 0x341896C0: 9905 LDR R1, [SP, #20] 0x341896C2: FBB0 F0F1 UDIV R0, R0, R1 0x341896C6: 9006 STR R0, [SP, #24] 0x341896C8: E011 B 46L8 ; 0x341896EE
.L6: 0x341896CA: F008 F995 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919F8 0x341896CE: 9006 STR R0, [SP, #24] 0x341896D0: 9806 LDR R0, [SP, #24] 0x341896D2: 9905 LDR R1, [SP, #20] 0x341896D4: FBB0 F0F1 UDIV R0, R0, R1 0x341896D8: 9006 STR R0, [SP, #24] 0x341896DA: E008 B 46L8 ; 0x341896EE
.L7: 0x341896DC: F008 F9CE BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A7C 0x341896E0: 9006 STR R0, [SP, #24] 0x341896E2: 9806 LDR R0, [SP, #24] 0x341896E4: 9905 LDR R1, [SP, #20] 0x341896E6: FBB0 F0F1 UDIV R0, R0, R1 0x341896EA: 9006 STR R0, [SP, #24] 0x341896EC: E7FF B 46L8 ; 0x341896EE
.L8: 0x341896EE: E062 B 46L21 ; 0x341897B6
.L9: 0x341896F0: F001 FC1E BL LL_RCC_IC8_IsEnabled ; 0x3418AF30 0x341896F4: B3C0 CBZ R0, .L14 ; 0x34189768 0x341896F6: F008 FA33 BL LL_RCC_IC8_GetDivider ; 0x34191B60 0x341896FA: 9005 STR R0, [SP, #20] 0x341896FC: F001 FC20 BL LL_RCC_IC8_GetSource ; 0x3418AF40 0x34189700: 4601 MOV R1, R0 0x34189702: 9102 STR R1, [SP, #8] 0x34189704: B160 CBZ R0, .L10 ; 0x34189720 0x34189706: 9802 LDR R0, [SP, #8] 0x34189708: F1B0 5F80 CMP.W R0, #0x10000000 0x3418970C: D011 BEQ 46L11 ; 0x34189732 0x3418970E: 9802 LDR R0, [SP, #8] 0x34189710: F1B0 5F00 CMP.W R0, #0x20000000 0x34189714: D016 BEQ 46L12 ; 0x34189744 0x34189716: 9802 LDR R0, [SP, #8] 0x34189718: F1B0 5F40 CMP.W R0, #0x30000000 0x3418971C: D01B BEQ 46L13 ; 0x34189756 0x3418971E: E023 B 46L14 ; 0x34189768
.L10: 0x34189720: F008 F8E6 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F0 0x34189724: 9006 STR R0, [SP, #24] 0x34189726: 9806 LDR R0, [SP, #24] 0x34189728: 9905 LDR R1, [SP, #20] 0x3418972A: FBB0 F0F1 UDIV R0, R0, R1 0x3418972E: 9006 STR R0, [SP, #24] 0x34189730: E01A B 46L14 ; 0x34189768
.L11: 0x34189732: F008 F91F BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191974 0x34189736: 9006 STR R0, [SP, #24] 0x34189738: 9806 LDR R0, [SP, #24] 0x3418973A: 9905 LDR R1, [SP, #20] 0x3418973C: FBB0 F0F1 UDIV R0, R0, R1 0x34189740: 9006 STR R0, [SP, #24] 0x34189742: E011 B 46L14 ; 0x34189768
.L12: 0x34189744: F008 F958 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919F8 0x34189748: 9006 STR R0, [SP, #24] 0x3418974A: 9806 LDR R0, [SP, #24] 0x3418974C: 9905 LDR R1, [SP, #20] 0x3418974E: FBB0 F0F1 UDIV R0, R0, R1 0x34189752: 9006 STR R0, [SP, #24] 0x34189754: E008 B 46L14 ; 0x34189768
.L13: 0x34189756: F008 F991 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A7C 0x3418975A: 9006 STR R0, [SP, #24] 0x3418975C: 9806 LDR R0, [SP, #24] 0x3418975E: 9905 LDR R1, [SP, #20] 0x34189760: FBB0 F0F1 UDIV R0, R0, R1 0x34189764: 9006 STR R0, [SP, #24] 0x34189766: E7FF B 46L14 ; 0x34189768
.L14: 0x34189768: E025 B 46L21 ; 0x341897B6
.L15: 0x3418976A: F001 FA5F BL LL_RCC_HSI_IsReady.77 ; 0x3418AC2C 0x3418976E: B140 CBZ R0, .L16 ; 0x34189782 0x34189770: F001 FA64 BL LL_RCC_HSI_GetDivider.78 ; 0x3418AC3C 0x34189774: 09C1 LSRS R1, R0, #7 0x34189776: F249 0000 MOVW R0, #0x9000 0x3418977A: F2C0 30D0 MOVT R0, #0x03D0 0x3418977E: 40C8 LSRS R0, R1 0x34189780: 9006 STR R0, [SP, #24]
.L16: 0x34189782: E018 B 46L21 ; 0x341897B6
.L17: 0x34189784: F001 FA62 BL LL_RCC_MSI_IsReady.79 ; 0x3418AC4C 0x34189788: B120 CBZ R0, .L18 ; 0x34189794 0x3418978A: F640 1000 MOVW R0, #0x0900 0x3418978E: F2C0 003D MOVT R0, #61 0x34189792: 9006 STR R0, [SP, #24]
.L18: 0x34189794: E00F B 46L21 ; 0x341897B6
.L19: 0x34189796: F248 0000 MOVW R0, #0x8000 0x3418979A: F2C0 00BB MOVT R0, #187 0x3418979E: 9006 STR R0, [SP, #24] 0x341897A0: E009 B 46L21 ; 0x341897B6
.L20: 0x341897A2: F006 FD29 BL HAL_RCC_GetSysClockFreq ; 0x341901F8 0x341897A6: 9001 STR R0, [SP, #4] 0x341897A8: F7FF F9A4 BL LL_RCC_GetTIMPrescaler ; 0x34188AF4 0x341897AC: 4601 MOV R1, R0 0x341897AE: 9801 LDR R0, [SP, #4] 0x341897B0: 40C8 LSRS R0, R1 0x341897B2: 9006 STR R0, [SP, #24] 0x341897B4: E7FF B 46L21 ; 0x341897B6
.L21: 0x341897B6: 9806 LDR R0, [SP, #24] 0x341897B8: B008 ADD SP, SP, #32 0x341897BA: BD80 POP 123R7, PC}

Section .text.RCCEx_GetSDMMCCLKFreq from blto2_FSBL_lto.o, size=396, align=4


RCCEx_GetSDMMCCLKFreq: 0x341897BC: B580 PUSH 123R7, LR} 0x341897BE: B086 SUB SP, SP, #24 0x341897C0: 9005 STR R0, [SP, #20] 0x341897C2: 2000 MOVS R0, #0 0x341897C4: 9004 STR R0, [SP, #16] 0x341897C6: 9805 LDR R0, [SP, #20] 0x341897C8: F7FF F984 BL LL_RCC_GetSDMMCClockSource ; 0x34188AD4 0x341897CC: 4601 MOV R1, R0 0x341897CE: 9102 STR R1, [SP, #8] 0x341897D0: 211C MOVS R1, #28 0x341897D2: F2C0 3100 MOVT R1, #0x0300 0x341897D6: 4288 CMP R0, R1 0x341897D8: D02E BEQ 46L1 ; 0x34189838 0x341897DA: 9802 LDR R0, [SP, #8] 0x341897DC: F240 411C MOVW R1, #0x041C 0x341897E0: F2C0 3100 MOVT R1, #0x0300 0x341897E4: 4288 CMP R0, R1 0x341897E6: D027 BEQ 46L1 ; 0x34189838 0x341897E8: 9802 LDR R0, [SP, #8] 0x341897EA: 211C MOVS R1, #28 0x341897EC: F2C0 3101 MOVT R1, #0x0301 0x341897F0: 4288 CMP R0, R1 0x341897F2: D027 BEQ 46L2 ; 0x34189844 0x341897F4: 9802 LDR R0, [SP, #8] 0x341897F6: F240 411C MOVW R1, #0x041C 0x341897FA: F2C0 3101 MOVT R1, #0x0301 0x341897FE: 4288 CMP R0, R1 0x34189800: D020 BEQ 46L2 ; 0x34189844 0x34189802: 9802 LDR R0, [SP, #8] 0x34189804: 211C MOVS R1, #28 0x34189806: F2C0 3102 MOVT R1, #0x0302 0x3418980A: 4288 CMP R0, R1 0x3418980C: D01F BEQ 46L3 ; 0x3418984E 0x3418980E: 9802 LDR R0, [SP, #8] 0x34189810: F240 411C MOVW R1, #0x041C 0x34189814: F2C0 3102 MOVT R1, #0x0302 0x34189818: 4288 CMP R0, R1 0x3418981A: D018 BEQ 46L3 ; 0x3418984E 0x3418981C: 9802 LDR R0, [SP, #8] 0x3418981E: 211C MOVS R1, #28 0x34189820: F2C0 3103 MOVT R1, #0x0303 0x34189824: 4288 CMP R0, R1 0x34189826: D04F BEQ 46L9 ; 0x341898C8 0x34189828: 9802 LDR R0, [SP, #8] 0x3418982A: F240 411C MOVW R1, #0x041C 0x3418982E: F2C0 3103 MOVT R1, #0x0303 0x34189832: 4288 CMP R0, R1 0x34189834: D048 BEQ 46L9 ; 0x341898C8 0x34189836: E084 B 46L15 ; 0x34189942
.L1: 0x34189838: F006 FCDE BL HAL_RCC_GetSysClockFreq ; 0x341901F8 0x3418983C: F001 F8F6 BL RCCEx_GetHCLKFreq ; 0x3418AA2C 0x34189840: 9004 STR R0, [SP, #16] 0x34189842: E07E B 46L15 ; 0x34189942
.L2: 0x34189844: 2007 MOVS R0, #7 0x34189846: F7FF FA4F BL RCCEx_GetCLKPCLKFreq ; 0x34188CE8 0x3418984A: 9004 STR R0, [SP, #16] 0x3418984C: E079 B 46L15 ; 0x34189942
.L3: 0x3418984E: F001 F90B BL LL_RCC_IC4_IsEnabled ; 0x3418AA68 0x34189852: B3C0 CBZ R0, .L8 ; 0x341898C6 0x34189854: F008 F954 BL LL_RCC_IC4_GetDivider ; 0x34191B00 0x34189858: 9003 STR R0, [SP, #12] 0x3418985A: F001 F90D BL LL_RCC_IC4_GetSource ; 0x3418AA78 0x3418985E: 4601 MOV R1, R0 0x34189860: 9101 STR R1, [SP, #4] 0x34189862: B160 CBZ R0, .L4 ; 0x3418987E 0x34189864: 9801 LDR R0, [SP, #4] 0x34189866: F1B0 5F80 CMP.W R0, #0x10000000 0x3418986A: D011 BEQ 46L5 ; 0x34189890 0x3418986C: 9801 LDR R0, [SP, #4] 0x3418986E: F1B0 5F00 CMP.W R0, #0x20000000 0x34189872: D016 BEQ 46L6 ; 0x341898A2 0x34189874: 9801 LDR R0, [SP, #4] 0x34189876: F1B0 5F40 CMP.W R0, #0x30000000 0x3418987A: D01B BEQ 46L7 ; 0x341898B4 0x3418987C: E023 B 46L8 ; 0x341898C6
.L4: 0x3418987E: F008 F837 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F0 0x34189882: 9004 STR R0, [SP, #16] 0x34189884: 9804 LDR R0, [SP, #16] 0x34189886: 9903 LDR R1, [SP, #12] 0x34189888: FBB0 F0F1 UDIV R0, R0, R1 0x3418988C: 9004 STR R0, [SP, #16] 0x3418988E: E01A B 46L8 ; 0x341898C6
.L5: 0x34189890: F008 F870 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191974 0x34189894: 9004 STR R0, [SP, #16] 0x34189896: 9804 LDR R0, [SP, #16] 0x34189898: 9903 LDR R1, [SP, #12] 0x3418989A: FBB0 F0F1 UDIV R0, R0, R1 0x3418989E: 9004 STR R0, [SP, #16] 0x341898A0: E011 B 46L8 ; 0x341898C6
.L6: 0x341898A2: F008 F8A9 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919F8 0x341898A6: 9004 STR R0, [SP, #16] 0x341898A8: 9804 LDR R0, [SP, #16] 0x341898AA: 9903 LDR R1, [SP, #12] 0x341898AC: FBB0 F0F1 UDIV R0, R0, R1 0x341898B0: 9004 STR R0, [SP, #16] 0x341898B2: E008 B 46L8 ; 0x341898C6
.L7: 0x341898B4: F008 F8E2 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A7C 0x341898B8: 9004 STR R0, [SP, #16] 0x341898BA: 9804 LDR R0, [SP, #16] 0x341898BC: 9903 LDR R1, [SP, #12] 0x341898BE: FBB0 F0F1 UDIV R0, R0, R1 0x341898C2: 9004 STR R0, [SP, #16] 0x341898C4: E7FF B 46L8 ; 0x341898C6
.L8: 0x341898C6: E03C B 46L15 ; 0x34189942
.L9: 0x341898C8: F001 FB5A BL LL_RCC_IC5_IsEnabled ; 0x3418AF80 0x341898CC: B3C0 CBZ R0, .L14 ; 0x34189940 0x341898CE: F008 F95F BL LL_RCC_IC5_GetDivider ; 0x34191B90 0x341898D2: 9003 STR R0, [SP, #12] 0x341898D4: F001 FB5C BL LL_RCC_IC5_GetSource ; 0x3418AF90 0x341898D8: 4601 MOV R1, R0 0x341898DA: 9100 STR R1, [SP, #0] 0x341898DC: B160 CBZ R0, .L10 ; 0x341898F8 0x341898DE: 9800 LDR R0, [SP, #0] 0x341898E0: F1B0 5F80 CMP.W R0, #0x10000000 0x341898E4: D011 BEQ 46L11 ; 0x3418990A 0x341898E6: 9800 LDR R0, [SP, #0] 0x341898E8: F1B0 5F00 CMP.W R0, #0x20000000 0x341898EC: D016 BEQ 46L12 ; 0x3418991C 0x341898EE: 9800 LDR R0, [SP, #0] 0x341898F0: F1B0 5F40 CMP.W R0, #0x30000000 0x341898F4: D01B BEQ 46L13 ; 0x3418992E 0x341898F6: E023 B 46L14 ; 0x34189940
.L10: 0x341898F8: F007 FFFA BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F0 0x341898FC: 9004 STR R0, [SP, #16] 0x341898FE: 9804 LDR R0, [SP, #16] 0x34189900: 9903 LDR R1, [SP, #12] 0x34189902: FBB0 F0F1 UDIV R0, R0, R1 0x34189906: 9004 STR R0, [SP, #16] 0x34189908: E01A B 46L14 ; 0x34189940
.L11: 0x3418990A: F008 F833 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191974 0x3418990E: 9004 STR R0, [SP, #16] 0x34189910: 9804 LDR R0, [SP, #16] 0x34189912: 9903 LDR R1, [SP, #12] 0x34189914: FBB0 F0F1 UDIV R0, R0, R1 0x34189918: 9004 STR R0, [SP, #16] 0x3418991A: E011 B 46L14 ; 0x34189940
.L12: 0x3418991C: F008 F86C BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919F8 0x34189920: 9004 STR R0, [SP, #16] 0x34189922: 9804 LDR R0, [SP, #16] 0x34189924: 9903 LDR R1, [SP, #12] 0x34189926: FBB0 F0F1 UDIV R0, R0, R1 0x3418992A: 9004 STR R0, [SP, #16] 0x3418992C: E008 B 46L14 ; 0x34189940
.L13: 0x3418992E: F008 F8A5 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A7C 0x34189932: 9004 STR R0, [SP, #16] 0x34189934: 9804 LDR R0, [SP, #16] 0x34189936: 9903 LDR R1, [SP, #12] 0x34189938: FBB0 F0F1 UDIV R0, R0, R1 0x3418993C: 9004 STR R0, [SP, #16] 0x3418993E: E7FF B 46L14 ; 0x34189940
.L14: 0x34189940: E7FF B 46L15 ; 0x34189942
.L15: 0x34189942: 9804 LDR R0, [SP, #16] 0x34189944: B006 ADD SP, SP, #24 0x34189946: BD80 POP 123R7, PC}

Section .text.RCCEx_GetSPDIFRXCLKFreq from blto2_FSBL_lto.o, size=372, align=4


RCCEx_GetSPDIFRXCLKFreq: 0x34189948: B580 PUSH 123R7, LR} 0x3418994A: B086 SUB SP, SP, #24 0x3418994C: 9005 STR R0, [SP, #20] 0x3418994E: 2000 MOVS R0, #0 0x34189950: 9004 STR R0, [SP, #16] 0x34189952: 9805 LDR R0, [SP, #20] 0x34189954: F006 FD4E BL LL_RCC_GetSPDIFRXClockSource ; 0x341903F4 0x34189958: 4601 MOV R1, R0 0x3418995A: 9102 STR R1, [SP, #8] 0x3418995C: 2806 CMP R0, #6 0x3418995E: F200 80AA BHI.W 46L13 ; 0x34189AB6 0x34189962: 9902 LDR R1, [SP, #8] 0x34189964: E8DF F001 TBB 91PC, R1] 0x34189968: 04 DC.B 0x04 ; '\x04' 0x34189969: 0C DC.B 0x0C ; '\x0C' 0x3418996A: 11 DC.B 0x11 ; '\x11' 0x3418996B: 4E DC.B 0x4E ; 'N' 0x3418996C: 98 DC.B 0x98 ; '\x98' 0x3418996D: 8B DC.B 0x8B ; '\x8B' 0x3418996E: A1 DC.B 0xA1 ; '\xA1' 0x3418996F: 00 DC.B 0x00 ; '\0' 0x34189970: F006 FC42 BL HAL_RCC_GetSysClockFreq ; 0x341901F8 0x34189974: F001 F85A BL RCCEx_GetHCLKFreq ; 0x3418AA2C 0x34189978: F001 FA80 BL RCCEx_GetPCLK1Freq ; 0x3418AE7C 0x3418997C: 9004 STR R0, [SP, #16] 0x3418997E: E09A B 46L13 ; 0x34189AB6 0x34189980: 2007 MOVS R0, #7 0x34189982: F7FF F9B1 BL RCCEx_GetCLKPCLKFreq ; 0x34188CE8 0x34189986: 9004 STR R0, [SP, #16] 0x34189988: E095 B 46L13 ; 0x34189AB6 0x3418998A: F001 FAE9 BL LL_RCC_IC7_IsEnabled ; 0x3418AF60 0x3418998E: B3C0 CBZ R0, .L5 ; 0x34189A02 0x34189990: F008 F8F2 BL LL_RCC_IC7_GetDivider ; 0x34191B78 0x34189994: 9003 STR R0, [SP, #12] 0x34189996: F001 FAEB BL LL_RCC_IC7_GetSource ; 0x3418AF70 0x3418999A: 4601 MOV R1, R0 0x3418999C: 9101 STR R1, [SP, #4] 0x3418999E: B160 CBZ R0, .L1 ; 0x341899BA 0x341899A0: 9801 LDR R0, [SP, #4] 0x341899A2: F1B0 5F80 CMP.W R0, #0x10000000 0x341899A6: D011 BEQ 46L2 ; 0x341899CC 0x341899A8: 9801 LDR R0, [SP, #4] 0x341899AA: F1B0 5F00 CMP.W R0, #0x20000000 0x341899AE: D016 BEQ 46L3 ; 0x341899DE 0x341899B0: 9801 LDR R0, [SP, #4] 0x341899B2: F1B0 5F40 CMP.W R0, #0x30000000 0x341899B6: D01B BEQ 46L4 ; 0x341899F0 0x341899B8: E023 B 46L5 ; 0x34189A02
.L1: 0x341899BA: F007 FF99 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F0 0x341899BE: 9004 STR R0, [SP, #16] 0x341899C0: 9804 LDR R0, [SP, #16] 0x341899C2: 9903 LDR R1, [SP, #12] 0x341899C4: FBB0 F0F1 UDIV R0, R0, R1 0x341899C8: 9004 STR R0, [SP, #16] 0x341899CA: E01A B 46L5 ; 0x34189A02
.L2: 0x341899CC: F007 FFD2 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191974 0x341899D0: 9004 STR R0, [SP, #16] 0x341899D2: 9804 LDR R0, [SP, #16] 0x341899D4: 9903 LDR R1, [SP, #12] 0x341899D6: FBB0 F0F1 UDIV R0, R0, R1 0x341899DA: 9004 STR R0, [SP, #16] 0x341899DC: E011 B 46L5 ; 0x34189A02
.L3: 0x341899DE: F008 F80B BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919F8 0x341899E2: 9004 STR R0, [SP, #16] 0x341899E4: 9804 LDR R0, [SP, #16] 0x341899E6: 9903 LDR R1, [SP, #12] 0x341899E8: FBB0 F0F1 UDIV R0, R0, R1 0x341899EC: 9004 STR R0, [SP, #16] 0x341899EE: E008 B 46L5 ; 0x34189A02
.L4: 0x341899F0: F008 F844 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A7C 0x341899F4: 9004 STR R0, [SP, #16] 0x341899F6: 9804 LDR R0, [SP, #16] 0x341899F8: 9903 LDR R1, [SP, #12] 0x341899FA: FBB0 F0F1 UDIV R0, R0, R1 0x341899FE: 9004 STR R0, [SP, #16] 0x34189A00: E7FF B 46L5 ; 0x34189A02
.L5: 0x34189A02: E058 B 46L13 ; 0x34189AB6 0x34189A04: F001 FA94 BL LL_RCC_IC8_IsEnabled ; 0x3418AF30 0x34189A08: B3C0 CBZ R0, .L10 ; 0x34189A7C 0x34189A0A: F008 F8A9 BL LL_RCC_IC8_GetDivider ; 0x34191B60 0x34189A0E: 9003 STR R0, [SP, #12] 0x34189A10: F001 FA96 BL LL_RCC_IC8_GetSource ; 0x3418AF40 0x34189A14: 4601 MOV R1, R0 0x34189A16: 9100 STR R1, [SP, #0] 0x34189A18: B160 CBZ R0, .L6 ; 0x34189A34 0x34189A1A: 9800 LDR R0, [SP, #0] 0x34189A1C: F1B0 5F80 CMP.W R0, #0x10000000 0x34189A20: D011 BEQ 46L7 ; 0x34189A46 0x34189A22: 9800 LDR R0, [SP, #0] 0x34189A24: F1B0 5F00 CMP.W R0, #0x20000000 0x34189A28: D016 BEQ 46L8 ; 0x34189A58 0x34189A2A: 9800 LDR R0, [SP, #0] 0x34189A2C: F1B0 5F40 CMP.W R0, #0x30000000 0x34189A30: D01B BEQ 46L9 ; 0x34189A6A 0x34189A32: E023 B 46L10 ; 0x34189A7C
.L6: 0x34189A34: F007 FF5C BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F0 0x34189A38: 9004 STR R0, [SP, #16] 0x34189A3A: 9804 LDR R0, [SP, #16] 0x34189A3C: 9903 LDR R1, [SP, #12] 0x34189A3E: FBB0 F0F1 UDIV R0, R0, R1 0x34189A42: 9004 STR R0, [SP, #16] 0x34189A44: E01A B 46L10 ; 0x34189A7C
.L7: 0x34189A46: F007 FF95 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191974 0x34189A4A: 9004 STR R0, [SP, #16] 0x34189A4C: 9804 LDR R0, [SP, #16] 0x34189A4E: 9903 LDR R1, [SP, #12] 0x34189A50: FBB0 F0F1 UDIV R0, R0, R1 0x34189A54: 9004 STR R0, [SP, #16] 0x34189A56: E011 B 46L10 ; 0x34189A7C
.L8: 0x34189A58: F007 FFCE BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919F8 0x34189A5C: 9004 STR R0, [SP, #16] 0x34189A5E: 9804 LDR R0, [SP, #16] 0x34189A60: 9903 LDR R1, [SP, #12] 0x34189A62: FBB0 F0F1 UDIV R0, R0, R1 0x34189A66: 9004 STR R0, [SP, #16] 0x34189A68: E008 B 46L10 ; 0x34189A7C
.L9: 0x34189A6A: F008 F807 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A7C 0x34189A6E: 9004 STR R0, [SP, #16] 0x34189A70: 9804 LDR R0, [SP, #16] 0x34189A72: 9903 LDR R1, [SP, #12] 0x34189A74: FBB0 F0F1 UDIV R0, R0, R1 0x34189A78: 9004 STR R0, [SP, #16] 0x34189A7A: E7FF B 46L10 ; 0x34189A7C
.L10: 0x34189A7C: E01B B 46L13 ; 0x34189AB6 0x34189A7E: F001 F8D5 BL LL_RCC_HSI_IsReady.77 ; 0x3418AC2C 0x34189A82: B140 CBZ R0, .L11 ; 0x34189A96 0x34189A84: F001 F8DA BL LL_RCC_HSI_GetDivider.78 ; 0x3418AC3C 0x34189A88: 09C1 LSRS R1, R0, #7 0x34189A8A: F249 0000 MOVW R0, #0x9000 0x34189A8E: F2C0 30D0 MOVT R0, #0x03D0 0x34189A92: 40C8 LSRS R0, R1 0x34189A94: 9004 STR R0, [SP, #16]
.L11: 0x34189A96: E00E B 46L13 ; 0x34189AB6 0x34189A98: F001 F8D8 BL LL_RCC_MSI_IsReady.79 ; 0x3418AC4C 0x34189A9C: B120 CBZ R0, .L12 ; 0x34189AA8 0x34189A9E: F640 1000 MOVW R0, #0x0900 0x34189AA2: F2C0 003D MOVT R0, #61 0x34189AA6: 9004 STR R0, [SP, #16]
.L12: 0x34189AA8: E005 B 46L13 ; 0x34189AB6 0x34189AAA: F248 0000 MOVW R0, #0x8000 0x34189AAE: F2C0 00BB MOVT R0, #187 0x34189AB2: 9004 STR R0, [SP, #16] 0x34189AB4: E7FF B 46L13 ; 0x34189AB6
.L13: 0x34189AB6: 9804 LDR R0, [SP, #16] 0x34189AB8: B006 ADD SP, SP, #24 0x34189ABA: BD80 POP 123R7, PC}

Section .text.RCCEx_GetSPICLKFreq from blto2_FSBL_lto.o, size=1196, align=4


RCCEx_GetSPICLKFreq: 0x34189ABC: B580 PUSH 123R7, LR} 0x34189ABE: B088 SUB SP, SP, #32 0x34189AC0: 9007 STR R0, [SP, #28] 0x34189AC2: 2000 MOVS R0, #0 0x34189AC4: 9006 STR R0, [SP, #24] 0x34189AC6: 9807 LDR R0, [SP, #28] 0x34189AC8: F7FF F80C BL LL_RCC_GetSPIClockSource ; 0x34188AE4 0x34189ACC: 4601 MOV R1, R0 0x34189ACE: 9104 STR R1, [SP, #16] 0x34189AD0: F240 4120 MOVW R1, #0x0420 0x34189AD4: F2C0 7100 MOVT R1, #0x0700 0x34189AD8: 4288 CMP R0, R1 0x34189ADA: F000 8151 BEQ.W 46L2 ; 0x34189D80 0x34189ADE: 9804 LDR R0, [SP, #16] 0x34189AE0: F640 0120 MOVW R1, #0x0820 0x34189AE4: F2C0 7100 MOVT R1, #0x0700 0x34189AE8: 4288 CMP R0, R1 0x34189AEA: F000 8141 BEQ.W 46L1 ; 0x34189D70 0x34189AEE: 9804 LDR R0, [SP, #16] 0x34189AF0: F640 4120 MOVW R1, #0x0C20 0x34189AF4: F2C0 7100 MOVT R1, #0x0700 0x34189AF8: 4288 CMP R0, R1 0x34189AFA: F000 8139 BEQ.W 46L1 ; 0x34189D70 0x34189AFE: 9804 LDR R0, [SP, #16] 0x34189B00: F241 0120 MOVW R1, #0x1020 0x34189B04: F2C0 7100 MOVT R1, #0x0700 0x34189B08: 4288 CMP R0, R1 0x34189B0A: F000 8139 BEQ.W 46L2 ; 0x34189D80 0x34189B0E: 9804 LDR R0, [SP, #16] 0x34189B10: F241 4120 MOVW R1, #0x1420 0x34189B14: F2C0 7100 MOVT R1, #0x0700 0x34189B18: 4288 CMP R0, R1 0x34189B1A: F000 8131 BEQ.W 46L2 ; 0x34189D80 0x34189B1E: 9804 LDR R0, [SP, #16] 0x34189B20: F641 0120 MOVW R1, #0x1820 0x34189B24: F2C0 7100 MOVT R1, #0x0700 0x34189B28: 4288 CMP R0, R1 0x34189B2A: F000 8131 BEQ.W 46L3 ; 0x34189D90 0x34189B2E: 9804 LDR R0, [SP, #16] 0x34189B30: F240 4120 MOVW R1, #0x0420 0x34189B34: F2C0 7101 MOVT R1, #0x0701 0x34189B38: 4288 CMP R0, R1 0x34189B3A: F000 8131 BEQ.W 46L4 ; 0x34189DA0 0x34189B3E: 9804 LDR R0, [SP, #16] 0x34189B40: F640 0120 MOVW R1, #0x0820 0x34189B44: F2C0 7101 MOVT R1, #0x0701 0x34189B48: 4288 CMP R0, R1 0x34189B4A: F000 8129 BEQ.W 46L4 ; 0x34189DA0 0x34189B4E: 9804 LDR R0, [SP, #16] 0x34189B50: F640 4120 MOVW R1, #0x0C20 0x34189B54: F2C0 7101 MOVT R1, #0x0701 0x34189B58: 4288 CMP R0, R1 0x34189B5A: F000 8121 BEQ.W 46L4 ; 0x34189DA0 0x34189B5E: 9804 LDR R0, [SP, #16] 0x34189B60: F241 0120 MOVW R1, #0x1020 0x34189B64: F2C0 7101 MOVT R1, #0x0701 0x34189B68: 4288 CMP R0, R1 0x34189B6A: F000 8119 BEQ.W 46L4 ; 0x34189DA0 0x34189B6E: 9804 LDR R0, [SP, #16] 0x34189B70: F241 4120 MOVW R1, #0x1420 0x34189B74: F2C0 7101 MOVT R1, #0x0701 0x34189B78: 4288 CMP R0, R1 0x34189B7A: F000 8111 BEQ.W 46L4 ; 0x34189DA0 0x34189B7E: 9804 LDR R0, [SP, #16] 0x34189B80: F641 0120 MOVW R1, #0x1820 0x34189B84: F2C0 7101 MOVT R1, #0x0701 0x34189B88: 4288 CMP R0, R1 0x34189B8A: F000 8109 BEQ.W 46L4 ; 0x34189DA0 0x34189B8E: 9804 LDR R0, [SP, #16] 0x34189B90: F240 4120 MOVW R1, #0x0420 0x34189B94: F2C0 7102 MOVT R1, #0x0702 0x34189B98: 4288 CMP R0, R1 0x34189B9A: F000 8106 BEQ.W 46L5 ; 0x34189DAA 0x34189B9E: 9804 LDR R0, [SP, #16] 0x34189BA0: F640 0120 MOVW R1, #0x0820 0x34189BA4: F2C0 7102 MOVT R1, #0x0702 0x34189BA8: 4288 CMP R0, R1 0x34189BAA: F000 80FE BEQ.W 46L5 ; 0x34189DAA 0x34189BAE: 9804 LDR R0, [SP, #16] 0x34189BB0: F640 4120 MOVW R1, #0x0C20 0x34189BB4: F2C0 7102 MOVT R1, #0x0702 0x34189BB8: 4288 CMP R0, R1 0x34189BBA: F000 80F6 BEQ.W 46L5 ; 0x34189DAA 0x34189BBE: 9804 LDR R0, [SP, #16] 0x34189BC0: F241 0120 MOVW R1, #0x1020 0x34189BC4: F2C0 7102 MOVT R1, #0x0702 0x34189BC8: 4288 CMP R0, R1 0x34189BCA: F000 812B BEQ.W 46L11 ; 0x34189E24 0x34189BCE: 9804 LDR R0, [SP, #16] 0x34189BD0: F241 4120 MOVW R1, #0x1420 0x34189BD4: F2C0 7102 MOVT R1, #0x0702 0x34189BD8: 4288 CMP R0, R1 0x34189BDA: F000 8123 BEQ.W 46L11 ; 0x34189E24 0x34189BDE: 9804 LDR R0, [SP, #16] 0x34189BE0: F641 0120 MOVW R1, #0x1820 0x34189BE4: F2C0 7102 MOVT R1, #0x0702 0x34189BE8: 4288 CMP R0, R1 0x34189BEA: F000 80DE BEQ.W 46L5 ; 0x34189DAA 0x34189BEE: 9804 LDR R0, [SP, #16] 0x34189BF0: F240 4120 MOVW R1, #0x0420 0x34189BF4: F2C0 7103 MOVT R1, #0x0703 0x34189BF8: 4288 CMP R0, R1 0x34189BFA: F000 8113 BEQ.W 46L11 ; 0x34189E24 0x34189BFE: 9804 LDR R0, [SP, #16] 0x34189C00: F640 0120 MOVW R1, #0x0820 0x34189C04: F2C0 7103 MOVT R1, #0x0703 0x34189C08: 4288 CMP R0, R1 0x34189C0A: F000 810B BEQ.W 46L11 ; 0x34189E24 0x34189C0E: 9804 LDR R0, [SP, #16] 0x34189C10: F640 4120 MOVW R1, #0x0C20 0x34189C14: F2C0 7103 MOVT R1, #0x0703 0x34189C18: 4288 CMP R0, R1 0x34189C1A: F000 8103 BEQ.W 46L11 ; 0x34189E24 0x34189C1E: 9804 LDR R0, [SP, #16] 0x34189C20: F241 0120 MOVW R1, #0x1020 0x34189C24: F2C0 7103 MOVT R1, #0x0703 0x34189C28: 4288 CMP R0, R1 0x34189C2A: F000 8138 BEQ.W 46L17 ; 0x34189E9E 0x34189C2E: 9804 LDR R0, [SP, #16] 0x34189C30: F241 4120 MOVW R1, #0x1420 0x34189C34: F2C0 7103 MOVT R1, #0x0703 0x34189C38: 4288 CMP R0, R1 0x34189C3A: F000 8130 BEQ.W 46L17 ; 0x34189E9E 0x34189C3E: 9804 LDR R0, [SP, #16] 0x34189C40: F641 0120 MOVW R1, #0x1820 0x34189C44: F2C0 7103 MOVT R1, #0x0703 0x34189C48: 4288 CMP R0, R1 0x34189C4A: F000 80EB BEQ.W 46L11 ; 0x34189E24 0x34189C4E: 9804 LDR R0, [SP, #16] 0x34189C50: F240 4120 MOVW R1, #0x0420 0x34189C54: F2C0 7104 MOVT R1, #0x0704 0x34189C58: 4288 CMP R0, R1 0x34189C5A: F000 816A BEQ.W 46L25 ; 0x34189F32 0x34189C5E: 9804 LDR R0, [SP, #16] 0x34189C60: F640 0120 MOVW R1, #0x0820 0x34189C64: F2C0 7104 MOVT R1, #0x0704 0x34189C68: 4288 CMP R0, R1 0x34189C6A: F000 8162 BEQ.W 46L25 ; 0x34189F32 0x34189C6E: 9804 LDR R0, [SP, #16] 0x34189C70: F640 4120 MOVW R1, #0x0C20 0x34189C74: F2C0 7104 MOVT R1, #0x0704 0x34189C78: 4288 CMP R0, R1 0x34189C7A: F000 815A BEQ.W 46L25 ; 0x34189F32 0x34189C7E: 9804 LDR R0, [SP, #16] 0x34189C80: F241 0120 MOVW R1, #0x1020 0x34189C84: F2C0 7104 MOVT R1, #0x0704 0x34189C88: 4288 CMP R0, R1 0x34189C8A: F000 8152 BEQ.W 46L25 ; 0x34189F32 0x34189C8E: 9804 LDR R0, [SP, #16] 0x34189C90: F241 4120 MOVW R1, #0x1420 0x34189C94: F2C0 7104 MOVT R1, #0x0704 0x34189C98: 4288 CMP R0, R1 0x34189C9A: F000 814A BEQ.W 46L25 ; 0x34189F32 0x34189C9E: 9804 LDR R0, [SP, #16] 0x34189CA0: F641 0120 MOVW R1, #0x1820 0x34189CA4: F2C0 7104 MOVT R1, #0x0704 0x34189CA8: 4288 CMP R0, R1 0x34189CAA: F000 8142 BEQ.W 46L25 ; 0x34189F32 0x34189CAE: 9804 LDR R0, [SP, #16] 0x34189CB0: F240 4120 MOVW R1, #0x0420 0x34189CB4: F2C0 7105 MOVT R1, #0x0705 0x34189CB8: 4288 CMP R0, R1 0x34189CBA: F000 812D BEQ.W 46L23 ; 0x34189F18 0x34189CBE: 9804 LDR R0, [SP, #16] 0x34189CC0: F640 0120 MOVW R1, #0x0820 0x34189CC4: F2C0 7105 MOVT R1, #0x0705 0x34189CC8: 4288 CMP R0, R1 0x34189CCA: F000 8125 BEQ.W 46L23 ; 0x34189F18 0x34189CCE: 9804 LDR R0, [SP, #16] 0x34189CD0: F640 4120 MOVW R1, #0x0C20 0x34189CD4: F2C0 7105 MOVT R1, #0x0705 0x34189CD8: 4288 CMP R0, R1 0x34189CDA: F000 811D BEQ.W 46L23 ; 0x34189F18 0x34189CDE: 9804 LDR R0, [SP, #16] 0x34189CE0: F241 0120 MOVW R1, #0x1020 0x34189CE4: F2C0 7105 MOVT R1, #0x0705 0x34189CE8: 4288 CMP R0, R1 0x34189CEA: F000 8115 BEQ.W 46L23 ; 0x34189F18 0x34189CEE: 9804 LDR R0, [SP, #16] 0x34189CF0: F241 4120 MOVW R1, #0x1420 0x34189CF4: F2C0 7105 MOVT R1, #0x0705 0x34189CF8: 4288 CMP R0, R1 0x34189CFA: F000 810D BEQ.W 46L23 ; 0x34189F18 0x34189CFE: 9804 LDR R0, [SP, #16] 0x34189D00: F641 0120 MOVW R1, #0x1820 0x34189D04: F2C0 7105 MOVT R1, #0x0705 0x34189D08: 4288 CMP R0, R1 0x34189D0A: F000 8105 BEQ.W 46L23 ; 0x34189F18 0x34189D0E: 9804 LDR R0, [SP, #16] 0x34189D10: F240 4120 MOVW R1, #0x0420 0x34189D14: F2C0 7106 MOVT R1, #0x0706 0x34189D18: 4288 CMP R0, R1 0x34189D1A: F000 8113 BEQ.W 46L27 ; 0x34189F44 0x34189D1E: 9804 LDR R0, [SP, #16] 0x34189D20: F640 0120 MOVW R1, #0x0820 0x34189D24: F2C0 7106 MOVT R1, #0x0706 0x34189D28: 4288 CMP R0, R1 0x34189D2A: F000 810B BEQ.W 46L27 ; 0x34189F44 0x34189D2E: 9804 LDR R0, [SP, #16] 0x34189D30: F640 4120 MOVW R1, #0x0C20 0x34189D34: F2C0 7106 MOVT R1, #0x0706 0x34189D38: 4288 CMP R0, R1 0x34189D3A: F000 8103 BEQ.W 46L27 ; 0x34189F44 0x34189D3E: 9804 LDR R0, [SP, #16] 0x34189D40: F241 0120 MOVW R1, #0x1020 0x34189D44: F2C0 7106 MOVT R1, #0x0706 0x34189D48: 4288 CMP R0, R1 0x34189D4A: F000 8101 BEQ.W 46L28 ; 0x34189F50 0x34189D4E: 9804 LDR R0, [SP, #16] 0x34189D50: F241 4120 MOVW R1, #0x1420 0x34189D54: F2C0 7106 MOVT R1, #0x0706 0x34189D58: 4288 CMP R0, R1 0x34189D5A: F000 80F9 BEQ.W 46L28 ; 0x34189F50 0x34189D5E: 9804 LDR R0, [SP, #16] 0x34189D60: F641 0120 MOVW R1, #0x1820 0x34189D64: F2C0 7106 MOVT R1, #0x0706 0x34189D68: 4288 CMP R0, R1 0x34189D6A: F000 80EB BEQ.W 46L27 ; 0x34189F44 0x34189D6E: E0F8 B 46L30 ; 0x34189F62
.L1: 0x34189D70: F006 FA42 BL HAL_RCC_GetSysClockFreq ; 0x341901F8 0x34189D74: F000 FE5A BL RCCEx_GetHCLKFreq ; 0x3418AA2C 0x34189D78: F001 F880 BL RCCEx_GetPCLK1Freq ; 0x3418AE7C 0x34189D7C: 9006 STR R0, [SP, #24] 0x34189D7E: E0F0 B 46L30 ; 0x34189F62
.L2: 0x34189D80: F006 FA3A BL HAL_RCC_GetSysClockFreq ; 0x341901F8 0x34189D84: F000 FE52 BL RCCEx_GetHCLKFreq ; 0x3418AA2C 0x34189D88: F001 F886 BL RCCEx_GetPCLK2Freq ; 0x3418AE98 0x34189D8C: 9006 STR R0, [SP, #24] 0x34189D8E: E0E8 B 46L30 ; 0x34189F62
.L3: 0x34189D90: F006 FA32 BL HAL_RCC_GetSysClockFreq ; 0x341901F8 0x34189D94: F000 FE4A BL RCCEx_GetHCLKFreq ; 0x3418AA2C 0x34189D98: F001 F8BC BL RCCEx_GetPCLK4Freq ; 0x3418AF14 0x34189D9C: 9006 STR R0, [SP, #24] 0x34189D9E: E0E0 B 46L30 ; 0x34189F62
.L4: 0x34189DA0: 2007 MOVS R0, #7 0x34189DA2: F7FE FFA1 BL RCCEx_GetCLKPCLKFreq ; 0x34188CE8 0x34189DA6: 9006 STR R0, [SP, #24] 0x34189DA8: E0DB B 46L30 ; 0x34189F62
.L5: 0x34189DAA: F001 F8C1 BL LL_RCC_IC8_IsEnabled ; 0x3418AF30 0x34189DAE: B3C0 CBZ R0, .L10 ; 0x34189E22 0x34189DB0: F007 FED6 BL LL_RCC_IC8_GetDivider ; 0x34191B60 0x34189DB4: 9005 STR R0, [SP, #20] 0x34189DB6: F001 F8C3 BL LL_RCC_IC8_GetSource ; 0x3418AF40 0x34189DBA: 4601 MOV R1, R0 0x34189DBC: 9103 STR R1, [SP, #12] 0x34189DBE: B160 CBZ R0, .L6 ; 0x34189DDA 0x34189DC0: 9803 LDR R0, [SP, #12] 0x34189DC2: F1B0 5F80 CMP.W R0, #0x10000000 0x34189DC6: D011 BEQ 46L7 ; 0x34189DEC 0x34189DC8: 9803 LDR R0, [SP, #12] 0x34189DCA: F1B0 5F00 CMP.W R0, #0x20000000 0x34189DCE: D016 BEQ 46L8 ; 0x34189DFE 0x34189DD0: 9803 LDR R0, [SP, #12] 0x34189DD2: F1B0 5F40 CMP.W R0, #0x30000000 0x34189DD6: D01B BEQ 46L9 ; 0x34189E10 0x34189DD8: E023 B 46L10 ; 0x34189E22
.L6: 0x34189DDA: F007 FD89 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F0 0x34189DDE: 9006 STR R0, [SP, #24] 0x34189DE0: 9806 LDR R0, [SP, #24] 0x34189DE2: 9905 LDR R1, [SP, #20] 0x34189DE4: FBB0 F0F1 UDIV R0, R0, R1 0x34189DE8: 9006 STR R0, [SP, #24] 0x34189DEA: E01A B 46L10 ; 0x34189E22
.L7: 0x34189DEC: F007 FDC2 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191974 0x34189DF0: 9006 STR R0, [SP, #24] 0x34189DF2: 9806 LDR R0, [SP, #24] 0x34189DF4: 9905 LDR R1, [SP, #20] 0x34189DF6: FBB0 F0F1 UDIV R0, R0, R1 0x34189DFA: 9006 STR R0, [SP, #24] 0x34189DFC: E011 B 46L10 ; 0x34189E22
.L8: 0x34189DFE: F007 FDFB BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919F8 0x34189E02: 9006 STR R0, [SP, #24] 0x34189E04: 9806 LDR R0, [SP, #24] 0x34189E06: 9905 LDR R1, [SP, #20] 0x34189E08: FBB0 F0F1 UDIV R0, R0, R1 0x34189E0C: 9006 STR R0, [SP, #24] 0x34189E0E: E008 B 46L10 ; 0x34189E22
.L9: 0x34189E10: F007 FE34 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A7C 0x34189E14: 9006 STR R0, [SP, #24] 0x34189E16: 9806 LDR R0, [SP, #24] 0x34189E18: 9905 LDR R1, [SP, #20] 0x34189E1A: FBB0 F0F1 UDIV R0, R0, R1 0x34189E1E: 9006 STR R0, [SP, #24] 0x34189E20: E7FF B 46L10 ; 0x34189E22
.L10: 0x34189E22: E09E B 46L30 ; 0x34189F62
.L11: 0x34189E24: F001 F846 BL LL_RCC_IC9_IsEnabled ; 0x3418AEB4 0x34189E28: B3C0 CBZ R0, .L16 ; 0x34189E9C 0x34189E2A: F007 FE81 BL LL_RCC_IC9_GetDivider ; 0x34191B30 0x34189E2E: 9005 STR R0, [SP, #20] 0x34189E30: F001 F848 BL LL_RCC_IC9_GetSource ; 0x3418AEC4 0x34189E34: 4601 MOV R1, R0 0x34189E36: 9102 STR R1, [SP, #8] 0x34189E38: B160 CBZ R0, .L12 ; 0x34189E54 0x34189E3A: 9802 LDR R0, [SP, #8] 0x34189E3C: F1B0 5F80 CMP.W R0, #0x10000000 0x34189E40: D011 BEQ 46L13 ; 0x34189E66 0x34189E42: 9802 LDR R0, [SP, #8] 0x34189E44: F1B0 5F00 CMP.W R0, #0x20000000 0x34189E48: D016 BEQ 46L14 ; 0x34189E78 0x34189E4A: 9802 LDR R0, [SP, #8] 0x34189E4C: F1B0 5F40 CMP.W R0, #0x30000000 0x34189E50: D01B BEQ 46L15 ; 0x34189E8A 0x34189E52: E023 B 46L16 ; 0x34189E9C
.L12: 0x34189E54: F007 FD4C BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F0 0x34189E58: 9006 STR R0, [SP, #24] 0x34189E5A: 9806 LDR R0, [SP, #24] 0x34189E5C: 9905 LDR R1, [SP, #20] 0x34189E5E: FBB0 F0F1 UDIV R0, R0, R1 0x34189E62: 9006 STR R0, [SP, #24] 0x34189E64: E01A B 46L16 ; 0x34189E9C
.L13: 0x34189E66: F007 FD85 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191974 0x34189E6A: 9006 STR R0, [SP, #24] 0x34189E6C: 9806 LDR R0, [SP, #24] 0x34189E6E: 9905 LDR R1, [SP, #20] 0x34189E70: FBB0 F0F1 UDIV R0, R0, R1 0x34189E74: 9006 STR R0, [SP, #24] 0x34189E76: E011 B 46L16 ; 0x34189E9C
.L14: 0x34189E78: F007 FDBE BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919F8 0x34189E7C: 9006 STR R0, [SP, #24] 0x34189E7E: 9806 LDR R0, [SP, #24] 0x34189E80: 9905 LDR R1, [SP, #20] 0x34189E82: FBB0 F0F1 UDIV R0, R0, R1 0x34189E86: 9006 STR R0, [SP, #24] 0x34189E88: E008 B 46L16 ; 0x34189E9C
.L15: 0x34189E8A: F007 FDF7 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A7C 0x34189E8E: 9006 STR R0, [SP, #24] 0x34189E90: 9806 LDR R0, [SP, #24] 0x34189E92: 9905 LDR R1, [SP, #20] 0x34189E94: FBB0 F0F1 UDIV R0, R0, R1 0x34189E98: 9006 STR R0, [SP, #24] 0x34189E9A: E7FF B 46L16 ; 0x34189E9C
.L16: 0x34189E9C: E061 B 46L30 ; 0x34189F62
.L17: 0x34189E9E: F001 F819 BL LL_RCC_IC14_IsEnabled ; 0x3418AED4 0x34189EA2: B3C0 CBZ R0, .L22 ; 0x34189F16 0x34189EA4: F007 FE50 BL LL_RCC_IC14_GetDivider ; 0x34191B48 0x34189EA8: 9005 STR R0, [SP, #20] 0x34189EAA: F001 F81B BL LL_RCC_IC14_GetSource ; 0x3418AEE4 0x34189EAE: 4601 MOV R1, R0 0x34189EB0: 9101 STR R1, [SP, #4] 0x34189EB2: B160 CBZ R0, .L18 ; 0x34189ECE 0x34189EB4: 9801 LDR R0, [SP, #4] 0x34189EB6: F1B0 5F80 CMP.W R0, #0x10000000 0x34189EBA: D011 BEQ 46L19 ; 0x34189EE0 0x34189EBC: 9801 LDR R0, [SP, #4] 0x34189EBE: F1B0 5F00 CMP.W R0, #0x20000000 0x34189EC2: D016 BEQ 46L20 ; 0x34189EF2 0x34189EC4: 9801 LDR R0, [SP, #4] 0x34189EC6: F1B0 5F40 CMP.W R0, #0x30000000 0x34189ECA: D01B BEQ 46L21 ; 0x34189F04 0x34189ECC: E023 B 46L22 ; 0x34189F16
.L18: 0x34189ECE: F007 FD0F BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F0 0x34189ED2: 9006 STR R0, [SP, #24] 0x34189ED4: 9806 LDR R0, [SP, #24] 0x34189ED6: 9905 LDR R1, [SP, #20] 0x34189ED8: FBB0 F0F1 UDIV R0, R0, R1 0x34189EDC: 9006 STR R0, [SP, #24] 0x34189EDE: E01A B 46L22 ; 0x34189F16
.L19: 0x34189EE0: F007 FD48 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191974 0x34189EE4: 9006 STR R0, [SP, #24] 0x34189EE6: 9806 LDR R0, [SP, #24] 0x34189EE8: 9905 LDR R1, [SP, #20] 0x34189EEA: FBB0 F0F1 UDIV R0, R0, R1 0x34189EEE: 9006 STR R0, [SP, #24] 0x34189EF0: E011 B 46L22 ; 0x34189F16
.L20: 0x34189EF2: F007 FD81 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919F8 0x34189EF6: 9006 STR R0, [SP, #24] 0x34189EF8: 9806 LDR R0, [SP, #24] 0x34189EFA: 9905 LDR R1, [SP, #20] 0x34189EFC: FBB0 F0F1 UDIV R0, R0, R1 0x34189F00: 9006 STR R0, [SP, #24] 0x34189F02: E008 B 46L22 ; 0x34189F16
.L21: 0x34189F04: F007 FDBA BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A7C 0x34189F08: 9006 STR R0, [SP, #24] 0x34189F0A: 9806 LDR R0, [SP, #24] 0x34189F0C: 9905 LDR R1, [SP, #20] 0x34189F0E: FBB0 F0F1 UDIV R0, R0, R1 0x34189F12: 9006 STR R0, [SP, #24] 0x34189F14: E7FF B 46L22 ; 0x34189F16
.L22: 0x34189F16: E024 B 46L30 ; 0x34189F62
.L23: 0x34189F18: F000 FE88 BL LL_RCC_HSI_IsReady.77 ; 0x3418AC2C 0x34189F1C: B140 CBZ R0, .L24 ; 0x34189F30 0x34189F1E: F000 FE8D BL LL_RCC_HSI_GetDivider.78 ; 0x3418AC3C 0x34189F22: 09C1 LSRS R1, R0, #7 0x34189F24: F249 0000 MOVW R0, #0x9000 0x34189F28: F2C0 30D0 MOVT R0, #0x03D0 0x34189F2C: 40C8 LSRS R0, R1 0x34189F2E: 9006 STR R0, [SP, #24]
.L24: 0x34189F30: E017 B 46L30 ; 0x34189F62
.L25: 0x34189F32: F000 FE8B BL LL_RCC_MSI_IsReady.79 ; 0x3418AC4C 0x34189F36: B120 CBZ R0, .L26 ; 0x34189F42 0x34189F38: F640 1000 MOVW R0, #0x0900 0x34189F3C: F2C0 003D MOVT R0, #61 0x34189F40: 9006 STR R0, [SP, #24]
.L26: 0x34189F42: E00E B 46L30 ; 0x34189F62
.L27: 0x34189F44: F248 0000 MOVW R0, #0x8000 0x34189F48: F2C0 00BB MOVT R0, #187 0x34189F4C: 9006 STR R0, [SP, #24] 0x34189F4E: E008 B 46L30 ; 0x34189F62
.L28: 0x34189F50: F000 FE8C BL LL_RCC_HSE_IsReady.80 ; 0x3418AC6C 0x34189F54: B120 CBZ R0, .L29 ; 0x34189F60 0x34189F56: F646 4000 MOVW R0, #0x6C00 0x34189F5A: F2C0 20DC MOVT R0, #0x02DC 0x34189F5E: 9006 STR R0, [SP, #24]
.L29: 0x34189F60: E7FF B 46L30 ; 0x34189F62
.L30: 0x34189F62: 9806 LDR R0, [SP, #24] 0x34189F64: B008 ADD SP, SP, #32 0x34189F66: BD80 POP 123R7, PC}

Section .text.RCCEx_GetUSARTCLKFreq from blto2_FSBL_lto.o, size=916, align=4


RCCEx_GetUSARTCLKFreq: 0x34189F68: B580 PUSH 123R7, LR} 0x34189F6A: B086 SUB SP, SP, #24 0x34189F6C: 9005 STR R0, [SP, #20] 0x34189F6E: 2000 MOVS R0, #0 0x34189F70: 9004 STR R0, [SP, #16] 0x34189F72: 9805 LDR R0, [SP, #20] 0x34189F74: F7FE FDC6 BL LL_RCC_GetUSARTClockSource ; 0x34188B04 0x34189F78: 4601 MOV R1, R0 0x34189F7A: 9102 STR R1, [SP, #8] 0x34189F7C: 2130 MOVS R1, #48 0x34189F7E: F2C0 7100 MOVT R1, #0x0700 0x34189F82: 4288 CMP R0, R1 0x34189F84: F000 810B BEQ.W 46L1 ; 0x3418A19E 0x34189F88: 9802 LDR R0, [SP, #8] 0x34189F8A: F240 4130 MOVW R1, #0x0430 0x34189F8E: F2C0 7100 MOVT R1, #0x0700 0x34189F92: 4288 CMP R0, R1 0x34189F94: F000 810B BEQ.W 46L2 ; 0x3418A1AE 0x34189F98: 9802 LDR R0, [SP, #8] 0x34189F9A: F240 4134 MOVW R1, #0x0434 0x34189F9E: F2C0 7100 MOVT R1, #0x0700 0x34189FA2: 4288 CMP R0, R1 0x34189FA4: F000 80FB BEQ.W 46L1 ; 0x3418A19E 0x34189FA8: 9802 LDR R0, [SP, #8] 0x34189FAA: F640 0130 MOVW R1, #0x0830 0x34189FAE: F2C0 7100 MOVT R1, #0x0700 0x34189FB2: 4288 CMP R0, R1 0x34189FB4: F000 80FB BEQ.W 46L2 ; 0x3418A1AE 0x34189FB8: 9802 LDR R0, [SP, #8] 0x34189FBA: F241 4130 MOVW R1, #0x1430 0x34189FBE: F2C0 7100 MOVT R1, #0x0700 0x34189FC2: 4288 CMP R0, R1 0x34189FC4: F000 80EB BEQ.W 46L1 ; 0x3418A19E 0x34189FC8: 9802 LDR R0, [SP, #8] 0x34189FCA: 2130 MOVS R1, #48 0x34189FCC: F2C0 7101 MOVT R1, #0x0701 0x34189FD0: 4288 CMP R0, R1 0x34189FD2: F000 80F4 BEQ.W 46L3 ; 0x3418A1BE 0x34189FD6: 9802 LDR R0, [SP, #8] 0x34189FD8: F240 4130 MOVW R1, #0x0430 0x34189FDC: F2C0 7101 MOVT R1, #0x0701 0x34189FE0: 4288 CMP R0, R1 0x34189FE2: F000 80EC BEQ.W 46L3 ; 0x3418A1BE 0x34189FE6: 9802 LDR R0, [SP, #8] 0x34189FE8: F240 4134 MOVW R1, #0x0434 0x34189FEC: F2C0 7101 MOVT R1, #0x0701 0x34189FF0: 4288 CMP R0, R1 0x34189FF2: F000 80E4 BEQ.W 46L3 ; 0x3418A1BE 0x34189FF6: 9802 LDR R0, [SP, #8] 0x34189FF8: F640 0130 MOVW R1, #0x0830 0x34189FFC: F2C0 7101 MOVT R1, #0x0701 0x3418A000: 4288 CMP R0, R1 0x3418A002: F000 80DC BEQ.W 46L3 ; 0x3418A1BE 0x3418A006: 9802 LDR R0, [SP, #8] 0x3418A008: F241 4130 MOVW R1, #0x1430 0x3418A00C: F2C0 7101 MOVT R1, #0x0701 0x3418A010: 4288 CMP R0, R1 0x3418A012: F000 80D4 BEQ.W 46L3 ; 0x3418A1BE 0x3418A016: 9802 LDR R0, [SP, #8] 0x3418A018: 2130 MOVS R1, #48 0x3418A01A: F2C0 7102 MOVT R1, #0x0702 0x3418A01E: 4288 CMP R0, R1 0x3418A020: F000 80D2 BEQ.W 46L4 ; 0x3418A1C8 0x3418A024: 9802 LDR R0, [SP, #8] 0x3418A026: F240 4130 MOVW R1, #0x0430 0x3418A02A: F2C0 7102 MOVT R1, #0x0702 0x3418A02E: 4288 CMP R0, R1 0x3418A030: F000 80CA BEQ.W 46L4 ; 0x3418A1C8 0x3418A034: 9802 LDR R0, [SP, #8] 0x3418A036: F240 4134 MOVW R1, #0x0434 0x3418A03A: F2C0 7102 MOVT R1, #0x0702 0x3418A03E: 4288 CMP R0, R1 0x3418A040: F000 80C2 BEQ.W 46L4 ; 0x3418A1C8 0x3418A044: 9802 LDR R0, [SP, #8] 0x3418A046: F640 0130 MOVW R1, #0x0830 0x3418A04A: F2C0 7102 MOVT R1, #0x0702 0x3418A04E: 4288 CMP R0, R1 0x3418A050: F000 80BA BEQ.W 46L4 ; 0x3418A1C8 0x3418A054: 9802 LDR R0, [SP, #8] 0x3418A056: F241 4130 MOVW R1, #0x1430 0x3418A05A: F2C0 7102 MOVT R1, #0x0702 0x3418A05E: 4288 CMP R0, R1 0x3418A060: F000 80B2 BEQ.W 46L4 ; 0x3418A1C8 0x3418A064: 9802 LDR R0, [SP, #8] 0x3418A066: 2130 MOVS R1, #48 0x3418A068: F2C0 7103 MOVT R1, #0x0703 0x3418A06C: 4288 CMP R0, R1 0x3418A06E: F000 80E8 BEQ.W 46L10 ; 0x3418A242 0x3418A072: 9802 LDR R0, [SP, #8] 0x3418A074: F240 4130 MOVW R1, #0x0430 0x3418A078: F2C0 7103 MOVT R1, #0x0703 0x3418A07C: 4288 CMP R0, R1 0x3418A07E: F000 80E0 BEQ.W 46L10 ; 0x3418A242 0x3418A082: 9802 LDR R0, [SP, #8] 0x3418A084: F240 4134 MOVW R1, #0x0434 0x3418A088: F2C0 7103 MOVT R1, #0x0703 0x3418A08C: 4288 CMP R0, R1 0x3418A08E: F000 80D8 BEQ.W 46L10 ; 0x3418A242 0x3418A092: 9802 LDR R0, [SP, #8] 0x3418A094: F640 0130 MOVW R1, #0x0830 0x3418A098: F2C0 7103 MOVT R1, #0x0703 0x3418A09C: 4288 CMP R0, R1 0x3418A09E: F000 80D0 BEQ.W 46L10 ; 0x3418A242 0x3418A0A2: 9802 LDR R0, [SP, #8] 0x3418A0A4: F241 4130 MOVW R1, #0x1430 0x3418A0A8: F2C0 7103 MOVT R1, #0x0703 0x3418A0AC: 4288 CMP R0, R1 0x3418A0AE: F000 80C8 BEQ.W 46L10 ; 0x3418A242 0x3418A0B2: 9802 LDR R0, [SP, #8] 0x3418A0B4: 2130 MOVS R1, #48 0x3418A0B6: F2C0 7104 MOVT R1, #0x0704 0x3418A0BA: 4288 CMP R0, R1 0x3418A0BC: F000 8114 BEQ.W 46L20 ; 0x3418A2E8 0x3418A0C0: 9802 LDR R0, [SP, #8] 0x3418A0C2: F240 4130 MOVW R1, #0x0430 0x3418A0C6: F2C0 7104 MOVT R1, #0x0704 0x3418A0CA: 4288 CMP R0, R1 0x3418A0CC: F000 810C BEQ.W 46L20 ; 0x3418A2E8 0x3418A0D0: 9802 LDR R0, [SP, #8] 0x3418A0D2: F240 4134 MOVW R1, #0x0434 0x3418A0D6: F2C0 7104 MOVT R1, #0x0704 0x3418A0DA: 4288 CMP R0, R1 0x3418A0DC: F000 8104 BEQ.W 46L20 ; 0x3418A2E8 0x3418A0E0: 9802 LDR R0, [SP, #8] 0x3418A0E2: F640 0130 MOVW R1, #0x0830 0x3418A0E6: F2C0 7104 MOVT R1, #0x0704 0x3418A0EA: 4288 CMP R0, R1 0x3418A0EC: F000 80FC BEQ.W 46L20 ; 0x3418A2E8 0x3418A0F0: 9802 LDR R0, [SP, #8] 0x3418A0F2: F241 4130 MOVW R1, #0x1430 0x3418A0F6: F2C0 7104 MOVT R1, #0x0704 0x3418A0FA: 4288 CMP R0, R1 0x3418A0FC: F000 80F4 BEQ.W 46L20 ; 0x3418A2E8 0x3418A100: 9802 LDR R0, [SP, #8] 0x3418A102: 2130 MOVS R1, #48 0x3418A104: F2C0 7105 MOVT R1, #0x0705 0x3418A108: 4288 CMP R0, R1 0x3418A10A: F000 80E4 BEQ.W 46L18 ; 0x3418A2D6 0x3418A10E: 9802 LDR R0, [SP, #8] 0x3418A110: F240 4130 MOVW R1, #0x0430 0x3418A114: F2C0 7105 MOVT R1, #0x0705 0x3418A118: 4288 CMP R0, R1 0x3418A11A: F000 80DC BEQ.W 46L18 ; 0x3418A2D6 0x3418A11E: 9802 LDR R0, [SP, #8] 0x3418A120: F240 4134 MOVW R1, #0x0434 0x3418A124: F2C0 7105 MOVT R1, #0x0705 0x3418A128: 4288 CMP R0, R1 0x3418A12A: F000 80D4 BEQ.W 46L18 ; 0x3418A2D6 0x3418A12E: 9802 LDR R0, [SP, #8] 0x3418A130: F640 0130 MOVW R1, #0x0830 0x3418A134: F2C0 7105 MOVT R1, #0x0705 0x3418A138: 4288 CMP R0, R1 0x3418A13A: F000 80CC BEQ.W 46L18 ; 0x3418A2D6 0x3418A13E: 9802 LDR R0, [SP, #8] 0x3418A140: F241 4130 MOVW R1, #0x1430 0x3418A144: F2C0 7105 MOVT R1, #0x0705 0x3418A148: 4288 CMP R0, R1 0x3418A14A: F000 80C4 BEQ.W 46L18 ; 0x3418A2D6 0x3418A14E: 9802 LDR R0, [SP, #8] 0x3418A150: 2130 MOVS R1, #48 0x3418A152: F2C0 7106 MOVT R1, #0x0706 0x3418A156: 4288 CMP R0, R1 0x3418A158: F000 80B0 BEQ.W 46L16 ; 0x3418A2BC 0x3418A15C: 9802 LDR R0, [SP, #8] 0x3418A15E: F240 4130 MOVW R1, #0x0430 0x3418A162: F2C0 7106 MOVT R1, #0x0706 0x3418A166: 4288 CMP R0, R1 0x3418A168: F000 80A8 BEQ.W 46L16 ; 0x3418A2BC 0x3418A16C: 9802 LDR R0, [SP, #8] 0x3418A16E: F240 4134 MOVW R1, #0x0434 0x3418A172: F2C0 7106 MOVT R1, #0x0706 0x3418A176: 4288 CMP R0, R1 0x3418A178: F000 80A0 BEQ.W 46L16 ; 0x3418A2BC 0x3418A17C: 9802 LDR R0, [SP, #8] 0x3418A17E: F640 0130 MOVW R1, #0x0830 0x3418A182: F2C0 7106 MOVT R1, #0x0706 0x3418A186: 4288 CMP R0, R1 0x3418A188: F000 8098 BEQ.W 46L16 ; 0x3418A2BC 0x3418A18C: 9802 LDR R0, [SP, #8] 0x3418A18E: F241 4130 MOVW R1, #0x1430 0x3418A192: F2C0 7106 MOVT R1, #0x0706 0x3418A196: 4288 CMP R0, R1 0x3418A198: F000 8090 BEQ.W 46L16 ; 0x3418A2BC 0x3418A19C: E0AB B 46L22 ; 0x3418A2F6
.L1: 0x3418A19E: F006 F82B BL HAL_RCC_GetSysClockFreq ; 0x341901F8 0x3418A1A2: F000 FC43 BL RCCEx_GetHCLKFreq ; 0x3418AA2C 0x3418A1A6: F000 FE77 BL RCCEx_GetPCLK2Freq ; 0x3418AE98 0x3418A1AA: 9004 STR R0, [SP, #16] 0x3418A1AC: E0A3 B 46L22 ; 0x3418A2F6
.L2: 0x3418A1AE: F006 F823 BL HAL_RCC_GetSysClockFreq ; 0x341901F8 0x3418A1B2: F000 FC3B BL RCCEx_GetHCLKFreq ; 0x3418AA2C 0x3418A1B6: F000 FE61 BL RCCEx_GetPCLK1Freq ; 0x3418AE7C 0x3418A1BA: 9004 STR R0, [SP, #16] 0x3418A1BC: E09B B 46L22 ; 0x3418A2F6
.L3: 0x3418A1BE: 2007 MOVS R0, #7 0x3418A1C0: F7FE FD92 BL RCCEx_GetCLKPCLKFreq ; 0x34188CE8 0x3418A1C4: 9004 STR R0, [SP, #16] 0x3418A1C6: E096 B 46L22 ; 0x3418A2F6
.L4: 0x3418A1C8: F000 FE74 BL LL_RCC_IC9_IsEnabled ; 0x3418AEB4 0x3418A1CC: B3C0 CBZ R0, .L9 ; 0x3418A240 0x3418A1CE: F007 FCAF BL LL_RCC_IC9_GetDivider ; 0x34191B30 0x3418A1D2: 9003 STR R0, [SP, #12] 0x3418A1D4: F000 FE76 BL LL_RCC_IC9_GetSource ; 0x3418AEC4 0x3418A1D8: 4601 MOV R1, R0 0x3418A1DA: 9101 STR R1, [SP, #4] 0x3418A1DC: B160 CBZ R0, .L5 ; 0x3418A1F8 0x3418A1DE: 9801 LDR R0, [SP, #4] 0x3418A1E0: F1B0 5F80 CMP.W R0, #0x10000000 0x3418A1E4: D011 BEQ 46L6 ; 0x3418A20A 0x3418A1E6: 9801 LDR R0, [SP, #4] 0x3418A1E8: F1B0 5F00 CMP.W R0, #0x20000000 0x3418A1EC: D016 BEQ 46L7 ; 0x3418A21C 0x3418A1EE: 9801 LDR R0, [SP, #4] 0x3418A1F0: F1B0 5F40 CMP.W R0, #0x30000000 0x3418A1F4: D01B BEQ 46L8 ; 0x3418A22E 0x3418A1F6: E023 B 46L9 ; 0x3418A240
.L5: 0x3418A1F8: F007 FB7A BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F0 0x3418A1FC: 9004 STR R0, [SP, #16] 0x3418A1FE: 9804 LDR R0, [SP, #16] 0x3418A200: 9903 LDR R1, [SP, #12] 0x3418A202: FBB0 F0F1 UDIV R0, R0, R1 0x3418A206: 9004 STR R0, [SP, #16] 0x3418A208: E01A B 46L9 ; 0x3418A240
.L6: 0x3418A20A: F007 FBB3 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191974 0x3418A20E: 9004 STR R0, [SP, #16] 0x3418A210: 9804 LDR R0, [SP, #16] 0x3418A212: 9903 LDR R1, [SP, #12] 0x3418A214: FBB0 F0F1 UDIV R0, R0, R1 0x3418A218: 9004 STR R0, [SP, #16] 0x3418A21A: E011 B 46L9 ; 0x3418A240
.L7: 0x3418A21C: F007 FBEC BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919F8 0x3418A220: 9004 STR R0, [SP, #16] 0x3418A222: 9804 LDR R0, [SP, #16] 0x3418A224: 9903 LDR R1, [SP, #12] 0x3418A226: FBB0 F0F1 UDIV R0, R0, R1 0x3418A22A: 9004 STR R0, [SP, #16] 0x3418A22C: E008 B 46L9 ; 0x3418A240
.L8: 0x3418A22E: F007 FC25 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A7C 0x3418A232: 9004 STR R0, [SP, #16] 0x3418A234: 9804 LDR R0, [SP, #16] 0x3418A236: 9903 LDR R1, [SP, #12] 0x3418A238: FBB0 F0F1 UDIV R0, R0, R1 0x3418A23C: 9004 STR R0, [SP, #16] 0x3418A23E: E7FF B 46L9 ; 0x3418A240
.L9: 0x3418A240: E059 B 46L22 ; 0x3418A2F6
.L10: 0x3418A242: F000 FE47 BL LL_RCC_IC14_IsEnabled ; 0x3418AED4 0x3418A246: B3C0 CBZ R0, .L15 ; 0x3418A2BA 0x3418A248: F007 FC7E BL LL_RCC_IC14_GetDivider ; 0x34191B48 0x3418A24C: 9003 STR R0, [SP, #12] 0x3418A24E: F000 FE49 BL LL_RCC_IC14_GetSource ; 0x3418AEE4 0x3418A252: 4601 MOV R1, R0 0x3418A254: 9100 STR R1, [SP, #0] 0x3418A256: B160 CBZ R0, .L11 ; 0x3418A272 0x3418A258: 9800 LDR R0, [SP, #0] 0x3418A25A: F1B0 5F80 CMP.W R0, #0x10000000 0x3418A25E: D011 BEQ 46L12 ; 0x3418A284 0x3418A260: 9800 LDR R0, [SP, #0] 0x3418A262: F1B0 5F00 CMP.W R0, #0x20000000 0x3418A266: D016 BEQ 46L13 ; 0x3418A296 0x3418A268: 9800 LDR R0, [SP, #0] 0x3418A26A: F1B0 5F40 CMP.W R0, #0x30000000 0x3418A26E: D01B BEQ 46L14 ; 0x3418A2A8 0x3418A270: E023 B 46L15 ; 0x3418A2BA
.L11: 0x3418A272: F007 FB3D BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F0 0x3418A276: 9004 STR R0, [SP, #16] 0x3418A278: 9804 LDR R0, [SP, #16] 0x3418A27A: 9903 LDR R1, [SP, #12] 0x3418A27C: FBB0 F0F1 UDIV R0, R0, R1 0x3418A280: 9004 STR R0, [SP, #16] 0x3418A282: E01A B 46L15 ; 0x3418A2BA
.L12: 0x3418A284: F007 FB76 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191974 0x3418A288: 9004 STR R0, [SP, #16] 0x3418A28A: 9804 LDR R0, [SP, #16] 0x3418A28C: 9903 LDR R1, [SP, #12] 0x3418A28E: FBB0 F0F1 UDIV R0, R0, R1 0x3418A292: 9004 STR R0, [SP, #16] 0x3418A294: E011 B 46L15 ; 0x3418A2BA
.L13: 0x3418A296: F007 FBAF BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919F8 0x3418A29A: 9004 STR R0, [SP, #16] 0x3418A29C: 9804 LDR R0, [SP, #16] 0x3418A29E: 9903 LDR R1, [SP, #12] 0x3418A2A0: FBB0 F0F1 UDIV R0, R0, R1 0x3418A2A4: 9004 STR R0, [SP, #16] 0x3418A2A6: E008 B 46L15 ; 0x3418A2BA
.L14: 0x3418A2A8: F007 FBE8 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A7C 0x3418A2AC: 9004 STR R0, [SP, #16] 0x3418A2AE: 9804 LDR R0, [SP, #16] 0x3418A2B0: 9903 LDR R1, [SP, #12] 0x3418A2B2: FBB0 F0F1 UDIV R0, R0, R1 0x3418A2B6: 9004 STR R0, [SP, #16] 0x3418A2B8: E7FF B 46L15 ; 0x3418A2BA
.L15: 0x3418A2BA: E01C B 46L22 ; 0x3418A2F6
.L16: 0x3418A2BC: F000 FCB6 BL LL_RCC_HSI_IsReady.77 ; 0x3418AC2C 0x3418A2C0: B140 CBZ R0, .L17 ; 0x3418A2D4 0x3418A2C2: F000 FCBB BL LL_RCC_HSI_GetDivider.78 ; 0x3418AC3C 0x3418A2C6: 09C1 LSRS R1, R0, #7 0x3418A2C8: F249 0000 MOVW R0, #0x9000 0x3418A2CC: F2C0 30D0 MOVT R0, #0x03D0 0x3418A2D0: 40C8 LSRS R0, R1 0x3418A2D2: 9004 STR R0, [SP, #16]
.L17: 0x3418A2D4: E00F B 46L22 ; 0x3418A2F6
.L18: 0x3418A2D6: F000 FCB9 BL LL_RCC_MSI_IsReady.79 ; 0x3418AC4C 0x3418A2DA: B120 CBZ R0, .L19 ; 0x3418A2E6 0x3418A2DC: F640 1000 MOVW R0, #0x0900 0x3418A2E0: F2C0 003D MOVT R0, #61 0x3418A2E4: 9004 STR R0, [SP, #16]
.L19: 0x3418A2E6: E006 B 46L22 ; 0x3418A2F6
.L20: 0x3418A2E8: F7FE FA1A BL LL_RCC_LSE_IsReady.59 ; 0x34188720 0x3418A2EC: B110 CBZ R0, .L21 ; 0x3418A2F4 0x3418A2EE: F44F 4000 MOV.W R0, #0x8000 0x3418A2F2: 9004 STR R0, [SP, #16]
.L21: 0x3418A2F4: E7FF B 46L22 ; 0x3418A2F6
.L22: 0x3418A2F6: 9804 LDR R0, [SP, #16] 0x3418A2F8: B006 ADD SP, SP, #24 0x3418A2FA: BD80 POP 123R7, PC}

Section .text.RCCEx_GetUARTCLKFreq from blto2_FSBL_lto.o, size=916, align=4


RCCEx_GetUARTCLKFreq: 0x3418A2FC: B580 PUSH 123R7, LR} 0x3418A2FE: B086 SUB SP, SP, #24 0x3418A300: 9005 STR R0, [SP, #20] 0x3418A302: 2000 MOVS R0, #0 0x3418A304: 9004 STR R0, [SP, #16] 0x3418A306: 9805 LDR R0, [SP, #20] 0x3418A308: F000 FDB0 BL LL_RCC_GetUARTClockSource ; 0x3418AE6C 0x3418A30C: 4601 MOV R1, R0 0x3418A30E: 9102 STR R1, [SP, #8] 0x3418A310: 2134 MOVS R1, #52 0x3418A312: F2C0 7100 MOVT R1, #0x0700 0x3418A316: 4288 CMP R0, R1 0x3418A318: F000 8113 BEQ.W 46L2 ; 0x3418A542 0x3418A31C: 9802 LDR R0, [SP, #8] 0x3418A31E: F640 4130 MOVW R1, #0x0C30 0x3418A322: F2C0 7100 MOVT R1, #0x0700 0x3418A326: 4288 CMP R0, R1 0x3418A328: F000 8103 BEQ.W 46L1 ; 0x3418A532 0x3418A32C: 9802 LDR R0, [SP, #8] 0x3418A32E: F241 0130 MOVW R1, #0x1030 0x3418A332: F2C0 7100 MOVT R1, #0x0700 0x3418A336: 4288 CMP R0, R1 0x3418A338: F000 80FB BEQ.W 46L1 ; 0x3418A532 0x3418A33C: 9802 LDR R0, [SP, #8] 0x3418A33E: F641 0130 MOVW R1, #0x1830 0x3418A342: F2C0 7100 MOVT R1, #0x0700 0x3418A346: 4288 CMP R0, R1 0x3418A348: F000 80F3 BEQ.W 46L1 ; 0x3418A532 0x3418A34C: 9802 LDR R0, [SP, #8] 0x3418A34E: F641 4130 MOVW R1, #0x1C30 0x3418A352: F2C0 7100 MOVT R1, #0x0700 0x3418A356: 4288 CMP R0, R1 0x3418A358: F000 80EB BEQ.W 46L1 ; 0x3418A532 0x3418A35C: 9802 LDR R0, [SP, #8] 0x3418A35E: 2134 MOVS R1, #52 0x3418A360: F2C0 7101 MOVT R1, #0x0701 0x3418A364: 4288 CMP R0, R1 0x3418A366: F000 80F4 BEQ.W 46L3 ; 0x3418A552 0x3418A36A: 9802 LDR R0, [SP, #8] 0x3418A36C: F640 4130 MOVW R1, #0x0C30 0x3418A370: F2C0 7101 MOVT R1, #0x0701 0x3418A374: 4288 CMP R0, R1 0x3418A376: F000 80EC BEQ.W 46L3 ; 0x3418A552 0x3418A37A: 9802 LDR R0, [SP, #8] 0x3418A37C: F241 0130 MOVW R1, #0x1030 0x3418A380: F2C0 7101 MOVT R1, #0x0701 0x3418A384: 4288 CMP R0, R1 0x3418A386: F000 80E4 BEQ.W 46L3 ; 0x3418A552 0x3418A38A: 9802 LDR R0, [SP, #8] 0x3418A38C: F641 0130 MOVW R1, #0x1830 0x3418A390: F2C0 7101 MOVT R1, #0x0701 0x3418A394: 4288 CMP R0, R1 0x3418A396: F000 80DC BEQ.W 46L3 ; 0x3418A552 0x3418A39A: 9802 LDR R0, [SP, #8] 0x3418A39C: F641 4130 MOVW R1, #0x1C30 0x3418A3A0: F2C0 7101 MOVT R1, #0x0701 0x3418A3A4: 4288 CMP R0, R1 0x3418A3A6: F000 80D4 BEQ.W 46L3 ; 0x3418A552 0x3418A3AA: 9802 LDR R0, [SP, #8] 0x3418A3AC: 2134 MOVS R1, #52 0x3418A3AE: F2C0 7102 MOVT R1, #0x0702 0x3418A3B2: 4288 CMP R0, R1 0x3418A3B4: F000 80D2 BEQ.W 46L4 ; 0x3418A55C 0x3418A3B8: 9802 LDR R0, [SP, #8] 0x3418A3BA: F640 4130 MOVW R1, #0x0C30 0x3418A3BE: F2C0 7102 MOVT R1, #0x0702 0x3418A3C2: 4288 CMP R0, R1 0x3418A3C4: F000 80CA BEQ.W 46L4 ; 0x3418A55C 0x3418A3C8: 9802 LDR R0, [SP, #8] 0x3418A3CA: F241 0130 MOVW R1, #0x1030 0x3418A3CE: F2C0 7102 MOVT R1, #0x0702 0x3418A3D2: 4288 CMP R0, R1 0x3418A3D4: F000 80C2 BEQ.W 46L4 ; 0x3418A55C 0x3418A3D8: 9802 LDR R0, [SP, #8] 0x3418A3DA: F641 0130 MOVW R1, #0x1830 0x3418A3DE: F2C0 7102 MOVT R1, #0x0702 0x3418A3E2: 4288 CMP R0, R1 0x3418A3E4: F000 80BA BEQ.W 46L4 ; 0x3418A55C 0x3418A3E8: 9802 LDR R0, [SP, #8] 0x3418A3EA: F641 4130 MOVW R1, #0x1C30 0x3418A3EE: F2C0 7102 MOVT R1, #0x0702 0x3418A3F2: 4288 CMP R0, R1 0x3418A3F4: F000 80B2 BEQ.W 46L4 ; 0x3418A55C 0x3418A3F8: 9802 LDR R0, [SP, #8] 0x3418A3FA: 2134 MOVS R1, #52 0x3418A3FC: F2C0 7103 MOVT R1, #0x0703 0x3418A400: 4288 CMP R0, R1 0x3418A402: F000 80E8 BEQ.W 46L10 ; 0x3418A5D6 0x3418A406: 9802 LDR R0, [SP, #8] 0x3418A408: F640 4130 MOVW R1, #0x0C30 0x3418A40C: F2C0 7103 MOVT R1, #0x0703 0x3418A410: 4288 CMP R0, R1 0x3418A412: F000 80E0 BEQ.W 46L10 ; 0x3418A5D6 0x3418A416: 9802 LDR R0, [SP, #8] 0x3418A418: F241 0130 MOVW R1, #0x1030 0x3418A41C: F2C0 7103 MOVT R1, #0x0703 0x3418A420: 4288 CMP R0, R1 0x3418A422: F000 80D8 BEQ.W 46L10 ; 0x3418A5D6 0x3418A426: 9802 LDR R0, [SP, #8] 0x3418A428: F641 0130 MOVW R1, #0x1830 0x3418A42C: F2C0 7103 MOVT R1, #0x0703 0x3418A430: 4288 CMP R0, R1 0x3418A432: F000 80D0 BEQ.W 46L10 ; 0x3418A5D6 0x3418A436: 9802 LDR R0, [SP, #8] 0x3418A438: F641 4130 MOVW R1, #0x1C30 0x3418A43C: F2C0 7103 MOVT R1, #0x0703 0x3418A440: 4288 CMP R0, R1 0x3418A442: F000 80C8 BEQ.W 46L10 ; 0x3418A5D6 0x3418A446: 9802 LDR R0, [SP, #8] 0x3418A448: 2134 MOVS R1, #52 0x3418A44A: F2C0 7104 MOVT R1, #0x0704 0x3418A44E: 4288 CMP R0, R1 0x3418A450: F000 8114 BEQ.W 46L20 ; 0x3418A67C 0x3418A454: 9802 LDR R0, [SP, #8] 0x3418A456: F640 4130 MOVW R1, #0x0C30 0x3418A45A: F2C0 7104 MOVT R1, #0x0704 0x3418A45E: 4288 CMP R0, R1 0x3418A460: F000 810C BEQ.W 46L20 ; 0x3418A67C 0x3418A464: 9802 LDR R0, [SP, #8] 0x3418A466: F241 0130 MOVW R1, #0x1030 0x3418A46A: F2C0 7104 MOVT R1, #0x0704 0x3418A46E: 4288 CMP R0, R1 0x3418A470: F000 8104 BEQ.W 46L20 ; 0x3418A67C 0x3418A474: 9802 LDR R0, [SP, #8] 0x3418A476: F641 0130 MOVW R1, #0x1830 0x3418A47A: F2C0 7104 MOVT R1, #0x0704 0x3418A47E: 4288 CMP R0, R1 0x3418A480: F000 80FC BEQ.W 46L20 ; 0x3418A67C 0x3418A484: 9802 LDR R0, [SP, #8] 0x3418A486: F641 4130 MOVW R1, #0x1C30 0x3418A48A: F2C0 7104 MOVT R1, #0x0704 0x3418A48E: 4288 CMP R0, R1 0x3418A490: F000 80F4 BEQ.W 46L20 ; 0x3418A67C 0x3418A494: 9802 LDR R0, [SP, #8] 0x3418A496: 2134 MOVS R1, #52 0x3418A498: F2C0 7105 MOVT R1, #0x0705 0x3418A49C: 4288 CMP R0, R1 0x3418A49E: F000 80E4 BEQ.W 46L18 ; 0x3418A66A 0x3418A4A2: 9802 LDR R0, [SP, #8] 0x3418A4A4: F640 4130 MOVW R1, #0x0C30 0x3418A4A8: F2C0 7105 MOVT R1, #0x0705 0x3418A4AC: 4288 CMP R0, R1 0x3418A4AE: F000 80DC BEQ.W 46L18 ; 0x3418A66A 0x3418A4B2: 9802 LDR R0, [SP, #8] 0x3418A4B4: F241 0130 MOVW R1, #0x1030 0x3418A4B8: F2C0 7105 MOVT R1, #0x0705 0x3418A4BC: 4288 CMP R0, R1 0x3418A4BE: F000 80D4 BEQ.W 46L18 ; 0x3418A66A 0x3418A4C2: 9802 LDR R0, [SP, #8] 0x3418A4C4: F641 0130 MOVW R1, #0x1830 0x3418A4C8: F2C0 7105 MOVT R1, #0x0705 0x3418A4CC: 4288 CMP R0, R1 0x3418A4CE: F000 80CC BEQ.W 46L18 ; 0x3418A66A 0x3418A4D2: 9802 LDR R0, [SP, #8] 0x3418A4D4: F641 4130 MOVW R1, #0x1C30 0x3418A4D8: F2C0 7105 MOVT R1, #0x0705 0x3418A4DC: 4288 CMP R0, R1 0x3418A4DE: F000 80C4 BEQ.W 46L18 ; 0x3418A66A 0x3418A4E2: 9802 LDR R0, [SP, #8] 0x3418A4E4: 2134 MOVS R1, #52 0x3418A4E6: F2C0 7106 MOVT R1, #0x0706 0x3418A4EA: 4288 CMP R0, R1 0x3418A4EC: F000 80B0 BEQ.W 46L16 ; 0x3418A650 0x3418A4F0: 9802 LDR R0, [SP, #8] 0x3418A4F2: F640 4130 MOVW R1, #0x0C30 0x3418A4F6: F2C0 7106 MOVT R1, #0x0706 0x3418A4FA: 4288 CMP R0, R1 0x3418A4FC: F000 80A8 BEQ.W 46L16 ; 0x3418A650 0x3418A500: 9802 LDR R0, [SP, #8] 0x3418A502: F241 0130 MOVW R1, #0x1030 0x3418A506: F2C0 7106 MOVT R1, #0x0706 0x3418A50A: 4288 CMP R0, R1 0x3418A50C: F000 80A0 BEQ.W 46L16 ; 0x3418A650 0x3418A510: 9802 LDR R0, [SP, #8] 0x3418A512: F641 0130 MOVW R1, #0x1830 0x3418A516: F2C0 7106 MOVT R1, #0x0706 0x3418A51A: 4288 CMP R0, R1 0x3418A51C: F000 8098 BEQ.W 46L16 ; 0x3418A650 0x3418A520: 9802 LDR R0, [SP, #8] 0x3418A522: F641 4130 MOVW R1, #0x1C30 0x3418A526: F2C0 7106 MOVT R1, #0x0706 0x3418A52A: 4288 CMP R0, R1 0x3418A52C: F000 8090 BEQ.W 46L16 ; 0x3418A650 0x3418A530: E0AB B 46L22 ; 0x3418A68A
.L1: 0x3418A532: F005 FE61 BL HAL_RCC_GetSysClockFreq ; 0x341901F8 0x3418A536: F000 FA79 BL RCCEx_GetHCLKFreq ; 0x3418AA2C 0x3418A53A: F000 FC9F BL RCCEx_GetPCLK1Freq ; 0x3418AE7C 0x3418A53E: 9004 STR R0, [SP, #16] 0x3418A540: E0A3 B 46L22 ; 0x3418A68A
.L2: 0x3418A542: F005 FE59 BL HAL_RCC_GetSysClockFreq ; 0x341901F8 0x3418A546: F000 FA71 BL RCCEx_GetHCLKFreq ; 0x3418AA2C 0x3418A54A: F000 FCA5 BL RCCEx_GetPCLK2Freq ; 0x3418AE98 0x3418A54E: 9004 STR R0, [SP, #16] 0x3418A550: E09B B 46L22 ; 0x3418A68A
.L3: 0x3418A552: 2007 MOVS R0, #7 0x3418A554: F7FE FBC8 BL RCCEx_GetCLKPCLKFreq ; 0x34188CE8 0x3418A558: 9004 STR R0, [SP, #16] 0x3418A55A: E096 B 46L22 ; 0x3418A68A
.L4: 0x3418A55C: F000 FCAA BL LL_RCC_IC9_IsEnabled ; 0x3418AEB4 0x3418A560: B3C0 CBZ R0, .L9 ; 0x3418A5D4 0x3418A562: F007 FAE5 BL LL_RCC_IC9_GetDivider ; 0x34191B30 0x3418A566: 9003 STR R0, [SP, #12] 0x3418A568: F000 FCAC BL LL_RCC_IC9_GetSource ; 0x3418AEC4 0x3418A56C: 4601 MOV R1, R0 0x3418A56E: 9101 STR R1, [SP, #4] 0x3418A570: B160 CBZ R0, .L5 ; 0x3418A58C 0x3418A572: 9801 LDR R0, [SP, #4] 0x3418A574: F1B0 5F80 CMP.W R0, #0x10000000 0x3418A578: D011 BEQ 46L6 ; 0x3418A59E 0x3418A57A: 9801 LDR R0, [SP, #4] 0x3418A57C: F1B0 5F00 CMP.W R0, #0x20000000 0x3418A580: D016 BEQ 46L7 ; 0x3418A5B0 0x3418A582: 9801 LDR R0, [SP, #4] 0x3418A584: F1B0 5F40 CMP.W R0, #0x30000000 0x3418A588: D01B BEQ 46L8 ; 0x3418A5C2 0x3418A58A: E023 B 46L9 ; 0x3418A5D4
.L5: 0x3418A58C: F007 F9B0 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F0 0x3418A590: 9004 STR R0, [SP, #16] 0x3418A592: 9804 LDR R0, [SP, #16] 0x3418A594: 9903 LDR R1, [SP, #12] 0x3418A596: FBB0 F0F1 UDIV R0, R0, R1 0x3418A59A: 9004 STR R0, [SP, #16] 0x3418A59C: E01A B 46L9 ; 0x3418A5D4
.L6: 0x3418A59E: F007 F9E9 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191974 0x3418A5A2: 9004 STR R0, [SP, #16] 0x3418A5A4: 9804 LDR R0, [SP, #16] 0x3418A5A6: 9903 LDR R1, [SP, #12] 0x3418A5A8: FBB0 F0F1 UDIV R0, R0, R1 0x3418A5AC: 9004 STR R0, [SP, #16] 0x3418A5AE: E011 B 46L9 ; 0x3418A5D4
.L7: 0x3418A5B0: F007 FA22 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919F8 0x3418A5B4: 9004 STR R0, [SP, #16] 0x3418A5B6: 9804 LDR R0, [SP, #16] 0x3418A5B8: 9903 LDR R1, [SP, #12] 0x3418A5BA: FBB0 F0F1 UDIV R0, R0, R1 0x3418A5BE: 9004 STR R0, [SP, #16] 0x3418A5C0: E008 B 46L9 ; 0x3418A5D4
.L8: 0x3418A5C2: F007 FA5B BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A7C 0x3418A5C6: 9004 STR R0, [SP, #16] 0x3418A5C8: 9804 LDR R0, [SP, #16] 0x3418A5CA: 9903 LDR R1, [SP, #12] 0x3418A5CC: FBB0 F0F1 UDIV R0, R0, R1 0x3418A5D0: 9004 STR R0, [SP, #16] 0x3418A5D2: E7FF B 46L9 ; 0x3418A5D4
.L9: 0x3418A5D4: E059 B 46L22 ; 0x3418A68A
.L10: 0x3418A5D6: F000 FC7D BL LL_RCC_IC14_IsEnabled ; 0x3418AED4 0x3418A5DA: B3C0 CBZ R0, .L15 ; 0x3418A64E 0x3418A5DC: F007 FAB4 BL LL_RCC_IC14_GetDivider ; 0x34191B48 0x3418A5E0: 9003 STR R0, [SP, #12] 0x3418A5E2: F000 FC7F BL LL_RCC_IC14_GetSource ; 0x3418AEE4 0x3418A5E6: 4601 MOV R1, R0 0x3418A5E8: 9100 STR R1, [SP, #0] 0x3418A5EA: B160 CBZ R0, .L11 ; 0x3418A606 0x3418A5EC: 9800 LDR R0, [SP, #0] 0x3418A5EE: F1B0 5F80 CMP.W R0, #0x10000000 0x3418A5F2: D011 BEQ 46L12 ; 0x3418A618 0x3418A5F4: 9800 LDR R0, [SP, #0] 0x3418A5F6: F1B0 5F00 CMP.W R0, #0x20000000 0x3418A5FA: D016 BEQ 46L13 ; 0x3418A62A 0x3418A5FC: 9800 LDR R0, [SP, #0] 0x3418A5FE: F1B0 5F40 CMP.W R0, #0x30000000 0x3418A602: D01B BEQ 46L14 ; 0x3418A63C 0x3418A604: E023 B 46L15 ; 0x3418A64E
.L11: 0x3418A606: F007 F973 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F0 0x3418A60A: 9004 STR R0, [SP, #16] 0x3418A60C: 9804 LDR R0, [SP, #16] 0x3418A60E: 9903 LDR R1, [SP, #12] 0x3418A610: FBB0 F0F1 UDIV R0, R0, R1 0x3418A614: 9004 STR R0, [SP, #16] 0x3418A616: E01A B 46L15 ; 0x3418A64E
.L12: 0x3418A618: F007 F9AC BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191974 0x3418A61C: 9004 STR R0, [SP, #16] 0x3418A61E: 9804 LDR R0, [SP, #16] 0x3418A620: 9903 LDR R1, [SP, #12] 0x3418A622: FBB0 F0F1 UDIV R0, R0, R1 0x3418A626: 9004 STR R0, [SP, #16] 0x3418A628: E011 B 46L15 ; 0x3418A64E
.L13: 0x3418A62A: F007 F9E5 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919F8 0x3418A62E: 9004 STR R0, [SP, #16] 0x3418A630: 9804 LDR R0, [SP, #16] 0x3418A632: 9903 LDR R1, [SP, #12] 0x3418A634: FBB0 F0F1 UDIV R0, R0, R1 0x3418A638: 9004 STR R0, [SP, #16] 0x3418A63A: E008 B 46L15 ; 0x3418A64E
.L14: 0x3418A63C: F007 FA1E BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A7C 0x3418A640: 9004 STR R0, [SP, #16] 0x3418A642: 9804 LDR R0, [SP, #16] 0x3418A644: 9903 LDR R1, [SP, #12] 0x3418A646: FBB0 F0F1 UDIV R0, R0, R1 0x3418A64A: 9004 STR R0, [SP, #16] 0x3418A64C: E7FF B 46L15 ; 0x3418A64E
.L15: 0x3418A64E: E01C B 46L22 ; 0x3418A68A
.L16: 0x3418A650: F000 FAEC BL LL_RCC_HSI_IsReady.77 ; 0x3418AC2C 0x3418A654: B140 CBZ R0, .L17 ; 0x3418A668 0x3418A656: F000 FAF1 BL LL_RCC_HSI_GetDivider.78 ; 0x3418AC3C 0x3418A65A: 09C1 LSRS R1, R0, #7 0x3418A65C: F249 0000 MOVW R0, #0x9000 0x3418A660: F2C0 30D0 MOVT R0, #0x03D0 0x3418A664: 40C8 LSRS R0, R1 0x3418A666: 9004 STR R0, [SP, #16]
.L17: 0x3418A668: E00F B 46L22 ; 0x3418A68A
.L18: 0x3418A66A: F000 FAEF BL LL_RCC_MSI_IsReady.79 ; 0x3418AC4C 0x3418A66E: B120 CBZ R0, .L19 ; 0x3418A67A 0x3418A670: F640 1000 MOVW R0, #0x0900 0x3418A674: F2C0 003D MOVT R0, #61 0x3418A678: 9004 STR R0, [SP, #16]
.L19: 0x3418A67A: E006 B 46L22 ; 0x3418A68A
.L20: 0x3418A67C: F7FE F850 BL LL_RCC_LSE_IsReady.59 ; 0x34188720 0x3418A680: B110 CBZ R0, .L21 ; 0x3418A688 0x3418A682: F44F 4000 MOV.W R0, #0x8000 0x3418A686: 9004 STR R0, [SP, #16]
.L21: 0x3418A688: E7FF B 46L22 ; 0x3418A68A
.L22: 0x3418A68A: 9804 LDR R0, [SP, #16] 0x3418A68C: B006 ADD SP, SP, #24 0x3418A68E: BD80 POP 123R7, PC}

Section .text.RCCEx_GetOTGPHYCLKFreq from blto2_FSBL_lto.o, size=324, align=4


RCCEx_GetOTGPHYCLKFreq: 0x3418A690: B580 PUSH 123R7, LR} 0x3418A692: B086 SUB SP, SP, #24 0x3418A694: 9005 STR R0, [SP, #20] 0x3418A696: 2000 MOVS R0, #0 0x3418A698: 9004 STR R0, [SP, #16] 0x3418A69A: 9805 LDR R0, [SP, #20] 0x3418A69C: F000 FBCE BL LL_RCC_GetUSBClockSource ; 0x3418AE3C 0x3418A6A0: 4601 MOV R1, R0 0x3418A6A2: 9102 STR R1, [SP, #8] 0x3418A6A4: F640 4114 MOVW R1, #0x0C14 0x3418A6A8: F2C0 3100 MOVT R1, #0x0300 0x3418A6AC: 4288 CMP R0, R1 0x3418A6AE: D036 BEQ 46L2 ; 0x3418A71E 0x3418A6B0: 9802 LDR R0, [SP, #8] 0x3418A6B2: F241 4114 MOVW R1, #0x1414 0x3418A6B6: F2C0 3100 MOVT R1, #0x0300 0x3418A6BA: 4288 CMP R0, R1 0x3418A6BC: D02F BEQ 46L2 ; 0x3418A71E 0x3418A6BE: 9802 LDR R0, [SP, #8] 0x3418A6C0: F640 4114 MOVW R1, #0x0C14 0x3418A6C4: F2C0 3101 MOVT R1, #0x0301 0x3418A6C8: 4288 CMP R0, R1 0x3418A6CA: D023 BEQ 46L1 ; 0x3418A714 0x3418A6CC: 9802 LDR R0, [SP, #8] 0x3418A6CE: F241 4114 MOVW R1, #0x1414 0x3418A6D2: F2C0 3101 MOVT R1, #0x0301 0x3418A6D6: 4288 CMP R0, R1 0x3418A6D8: D01C BEQ 46L1 ; 0x3418A714 0x3418A6DA: 9802 LDR R0, [SP, #8] 0x3418A6DC: F640 4114 MOVW R1, #0x0C14 0x3418A6E0: F2C0 3102 MOVT R1, #0x0302 0x3418A6E4: 4288 CMP R0, R1 0x3418A6E6: D035 BEQ 46L7 ; 0x3418A754 0x3418A6E8: 9802 LDR R0, [SP, #8] 0x3418A6EA: F241 4114 MOVW R1, #0x1414 0x3418A6EE: F2C0 3102 MOVT R1, #0x0302 0x3418A6F2: 4288 CMP R0, R1 0x3418A6F4: D02E BEQ 46L7 ; 0x3418A754 0x3418A6F6: 9802 LDR R0, [SP, #8] 0x3418A6F8: F640 4114 MOVW R1, #0x0C14 0x3418A6FC: F2C0 3103 MOVT R1, #0x0303 0x3418A700: 4288 CMP R0, R1 0x3418A702: D015 BEQ 46L4 ; 0x3418A730 0x3418A704: 9802 LDR R0, [SP, #8] 0x3418A706: F241 4114 MOVW R1, #0x1414 0x3418A70A: F2C0 3103 MOVT R1, #0x0303 0x3418A70E: 4288 CMP R0, R1 0x3418A710: D00E BEQ 46L4 ; 0x3418A730 0x3418A712: E05C B 46L13 ; 0x3418A7CE
.L1: 0x3418A714: 2007 MOVS R0, #7 0x3418A716: F7FE FAE7 BL RCCEx_GetCLKPCLKFreq ; 0x34188CE8 0x3418A71A: 9004 STR R0, [SP, #16] 0x3418A71C: E057 B 46L13 ; 0x3418A7CE
.L2: 0x3418A71E: F000 FAA5 BL LL_RCC_HSE_IsReady.80 ; 0x3418AC6C 0x3418A722: B120 CBZ R0, .L3 ; 0x3418A72E 0x3418A724: F243 6000 MOVW R0, #0x3600 0x3418A728: F2C0 106E MOVT R0, #0x016E 0x3418A72C: 9004 STR R0, [SP, #16]
.L3: 0x3418A72E: E04E B 46L13 ; 0x3418A7CE
.L4: 0x3418A730: F000 FA9C BL LL_RCC_HSE_IsReady.80 ; 0x3418AC6C 0x3418A734: B168 CBZ R0, .L6 ; 0x3418A752 0x3418A736: F7FE F9ED BL LL_RCC_HSE_IsSelectedHSEDiv2AsDiv2Clock ; 0x34188B14 0x3418A73A: B928 CBNZ R0, .L5 ; 0x3418A748 0x3418A73C: F646 4000 MOVW R0, #0x6C00 0x3418A740: F2C0 20DC MOVT R0, #0x02DC 0x3418A744: 9004 STR R0, [SP, #16] 0x3418A746: E004 B 46L6 ; 0x3418A752
.L5: 0x3418A748: F243 6000 MOVW R0, #0x3600 0x3418A74C: F2C0 106E MOVT R0, #0x016E 0x3418A750: 9004 STR R0, [SP, #16]
.L6: 0x3418A752: E03C B 46L13 ; 0x3418A7CE
.L7: 0x3418A754: F000 FB7A BL LL_RCC_IC15_IsEnabled ; 0x3418AE4C 0x3418A758: B3C0 CBZ R0, .L12 ; 0x3418A7CC 0x3418A75A: F007 F9DD BL LL_RCC_IC15_GetDivider ; 0x34191B18 0x3418A75E: 9003 STR R0, [SP, #12] 0x3418A760: F000 FB7C BL LL_RCC_IC15_GetSource ; 0x3418AE5C 0x3418A764: 4601 MOV R1, R0 0x3418A766: 9101 STR R1, [SP, #4] 0x3418A768: B160 CBZ R0, .L8 ; 0x3418A784 0x3418A76A: 9801 LDR R0, [SP, #4] 0x3418A76C: F1B0 5F80 CMP.W R0, #0x10000000 0x3418A770: D011 BEQ 46L9 ; 0x3418A796 0x3418A772: 9801 LDR R0, [SP, #4] 0x3418A774: F1B0 5F00 CMP.W R0, #0x20000000 0x3418A778: D016 BEQ 46L10 ; 0x3418A7A8 0x3418A77A: 9801 LDR R0, [SP, #4] 0x3418A77C: F1B0 5F40 CMP.W R0, #0x30000000 0x3418A780: D01B BEQ 46L11 ; 0x3418A7BA 0x3418A782: E023 B 46L12 ; 0x3418A7CC
.L8: 0x3418A784: F007 F8B4 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F0 0x3418A788: 9004 STR R0, [SP, #16] 0x3418A78A: 9804 LDR R0, [SP, #16] 0x3418A78C: 9903 LDR R1, [SP, #12] 0x3418A78E: FBB0 F0F1 UDIV R0, R0, R1 0x3418A792: 9004 STR R0, [SP, #16] 0x3418A794: E01A B 46L12 ; 0x3418A7CC
.L9: 0x3418A796: F007 F8ED BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191974 0x3418A79A: 9004 STR R0, [SP, #16] 0x3418A79C: 9804 LDR R0, [SP, #16] 0x3418A79E: 9903 LDR R1, [SP, #12] 0x3418A7A0: FBB0 F0F1 UDIV R0, R0, R1 0x3418A7A4: 9004 STR R0, [SP, #16] 0x3418A7A6: E011 B 46L12 ; 0x3418A7CC
.L10: 0x3418A7A8: F007 F926 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919F8 0x3418A7AC: 9004 STR R0, [SP, #16] 0x3418A7AE: 9804 LDR R0, [SP, #16] 0x3418A7B0: 9903 LDR R1, [SP, #12] 0x3418A7B2: FBB0 F0F1 UDIV R0, R0, R1 0x3418A7B6: 9004 STR R0, [SP, #16] 0x3418A7B8: E008 B 46L12 ; 0x3418A7CC
.L11: 0x3418A7BA: F007 F95F BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A7C 0x3418A7BE: 9004 STR R0, [SP, #16] 0x3418A7C0: 9804 LDR R0, [SP, #16] 0x3418A7C2: 9903 LDR R1, [SP, #12] 0x3418A7C4: FBB0 F0F1 UDIV R0, R0, R1 0x3418A7C8: 9004 STR R0, [SP, #16] 0x3418A7CA: E7FF B 46L12 ; 0x3418A7CC
.L12: 0x3418A7CC: E7FF B 46L13 ; 0x3418A7CE
.L13: 0x3418A7CE: 9804 LDR R0, [SP, #16] 0x3418A7D0: B006 ADD SP, SP, #24 0x3418A7D2: BD80 POP 123R7, PC}

Section .text.RCCEx_GetOTGPHYCKREFCLKFreq from blto2_FSBL_lto.o, size=148, align=4


RCCEx_GetOTGPHYCKREFCLKFreq: 0x3418A7D4: B580 PUSH 123R7, LR} 0x3418A7D6: B084 SUB SP, SP, #16 0x3418A7D8: 9003 STR R0, [SP, #12] 0x3418A7DA: 2000 MOVS R0, #0 0x3418A7DC: 9002 STR R0, [SP, #8] 0x3418A7DE: 9803 LDR R0, [SP, #12] 0x3418A7E0: F000 FB2C BL LL_RCC_GetUSBClockSource ; 0x3418AE3C 0x3418A7E4: 4601 MOV R1, R0 0x3418A7E6: 9101 STR R1, [SP, #4] 0x3418A7E8: F241 0114 MOVW R1, #0x1014 0x3418A7EC: F2C0 1100 MOVT R1, #0x0100 0x3418A7F0: 4288 CMP R0, R1 0x3418A7F2: D026 BEQ 46L4 ; 0x3418A842 0x3418A7F4: 9801 LDR R0, [SP, #4] 0x3418A7F6: F641 0114 MOVW R1, #0x1814 0x3418A7FA: F2C0 1100 MOVT R1, #0x0100 0x3418A7FE: 4288 CMP R0, R1 0x3418A800: D027 BEQ 46L5 ; 0x3418A852 0x3418A802: 9801 LDR R0, [SP, #4] 0x3418A804: F241 0114 MOVW R1, #0x1014 0x3418A808: F2C0 1101 MOVT R1, #0x0101 0x3418A80C: 4288 CMP R0, R1 0x3418A80E: D006 BEQ 46L1 ; 0x3418A81E 0x3418A810: 9801 LDR R0, [SP, #4] 0x3418A812: F641 0114 MOVW R1, #0x1814 0x3418A816: F2C0 1101 MOVT R1, #0x0101 0x3418A81A: 4288 CMP R0, R1 0x3418A81C: D121 BNE 46L6 ; 0x3418A862
.L1: 0x3418A81E: F000 FA25 BL LL_RCC_HSE_IsReady.80 ; 0x3418AC6C 0x3418A822: B168 CBZ R0, .L3 ; 0x3418A840 0x3418A824: F7FE F976 BL LL_RCC_HSE_IsSelectedHSEDiv2AsDiv2Clock ; 0x34188B14 0x3418A828: B928 CBNZ R0, .L2 ; 0x3418A836 0x3418A82A: F646 4000 MOVW R0, #0x6C00 0x3418A82E: F2C0 20DC MOVT R0, #0x02DC 0x3418A832: 9002 STR R0, [SP, #8] 0x3418A834: E004 B 46L3 ; 0x3418A840
.L2: 0x3418A836: F243 6000 MOVW R0, #0x3600 0x3418A83A: F2C0 106E MOVT R0, #0x016E 0x3418A83E: 9002 STR R0, [SP, #8]
.L3: 0x3418A840: E00F B 46L6 ; 0x3418A862
.L4: 0x3418A842: F640 4014 MOVW R0, #0x0C14 0x3418A846: F2C0 3000 MOVT R0, #0x0300 0x3418A84A: F7FF FF21 BL RCCEx_GetOTGPHYCLKFreq ; 0x3418A690 0x3418A84E: 9002 STR R0, [SP, #8] 0x3418A850: E007 B 46L6 ; 0x3418A862
.L5: 0x3418A852: F241 4014 MOVW R0, #0x1414 0x3418A856: F2C0 3000 MOVT R0, #0x0300 0x3418A85A: F7FF FF19 BL RCCEx_GetOTGPHYCLKFreq ; 0x3418A690 0x3418A85E: 9002 STR R0, [SP, #8] 0x3418A860: E7FF B 46L6 ; 0x3418A862
.L6: 0x3418A862: 9802 LDR R0, [SP, #8] 0x3418A864: B004 ADD SP, SP, #16 0x3418A866: BD80 POP 123R7, PC}

Section .text.RCCEx_GetXSPICLKFreq from blto2_FSBL_lto.o, size=452, align=4


RCCEx_GetXSPICLKFreq: 0x3418A868: B580 PUSH 123R7, LR} 0x3418A86A: B086 SUB SP, SP, #24 0x3418A86C: 9005 STR R0, [SP, #20] 0x3418A86E: 2000 MOVS R0, #0 0x3418A870: 9004 STR R0, [SP, #16] 0x3418A872: 9805 LDR R0, [SP, #20] 0x3418A874: F7FE F956 BL LL_RCC_GetXSPIClockSource ; 0x34188B24 0x3418A878: 4601 MOV R1, R0 0x3418A87A: 9102 STR R1, [SP, #8] 0x3418A87C: 2114 MOVS R1, #20 0x3418A87E: F2C0 3100 MOVT R1, #0x0300 0x3418A882: 4288 CMP R0, R1 0x3418A884: D04A BEQ 46L1 ; 0x3418A91C 0x3418A886: 9802 LDR R0, [SP, #8] 0x3418A888: F240 4114 MOVW R1, #0x0414 0x3418A88C: F2C0 3100 MOVT R1, #0x0300 0x3418A890: 4288 CMP R0, R1 0x3418A892: D043 BEQ 46L1 ; 0x3418A91C 0x3418A894: 9802 LDR R0, [SP, #8] 0x3418A896: F640 0114 MOVW R1, #0x0814 0x3418A89A: F2C0 3100 MOVT R1, #0x0300 0x3418A89E: 4288 CMP R0, R1 0x3418A8A0: D03C BEQ 46L1 ; 0x3418A91C 0x3418A8A2: 9802 LDR R0, [SP, #8] 0x3418A8A4: 2114 MOVS R1, #20 0x3418A8A6: F2C0 3101 MOVT R1, #0x0301 0x3418A8AA: 4288 CMP R0, R1 0x3418A8AC: D03C BEQ 46L2 ; 0x3418A928 0x3418A8AE: 9802 LDR R0, [SP, #8] 0x3418A8B0: F240 4114 MOVW R1, #0x0414 0x3418A8B4: F2C0 3101 MOVT R1, #0x0301 0x3418A8B8: 4288 CMP R0, R1 0x3418A8BA: D035 BEQ 46L2 ; 0x3418A928 0x3418A8BC: 9802 LDR R0, [SP, #8] 0x3418A8BE: F640 0114 MOVW R1, #0x0814 0x3418A8C2: F2C0 3101 MOVT R1, #0x0301 0x3418A8C6: 4288 CMP R0, R1 0x3418A8C8: D02E BEQ 46L2 ; 0x3418A928 0x3418A8CA: 9802 LDR R0, [SP, #8] 0x3418A8CC: 2114 MOVS R1, #20 0x3418A8CE: F2C0 3102 MOVT R1, #0x0302 0x3418A8D2: 4288 CMP R0, R1 0x3418A8D4: D02D BEQ 46L3 ; 0x3418A932 0x3418A8D6: 9802 LDR R0, [SP, #8] 0x3418A8D8: F240 4114 MOVW R1, #0x0414 0x3418A8DC: F2C0 3102 MOVT R1, #0x0302 0x3418A8E0: 4288 CMP R0, R1 0x3418A8E2: D026 BEQ 46L3 ; 0x3418A932 0x3418A8E4: 9802 LDR R0, [SP, #8] 0x3418A8E6: F640 0114 MOVW R1, #0x0814 0x3418A8EA: F2C0 3102 MOVT R1, #0x0302 0x3418A8EE: 4288 CMP R0, R1 0x3418A8F0: D01F BEQ 46L3 ; 0x3418A932 0x3418A8F2: 9802 LDR R0, [SP, #8] 0x3418A8F4: 2114 MOVS R1, #20 0x3418A8F6: F2C0 3103 MOVT R1, #0x0303 0x3418A8FA: 4288 CMP R0, R1 0x3418A8FC: D056 BEQ 46L9 ; 0x3418A9AC 0x3418A8FE: 9802 LDR R0, [SP, #8] 0x3418A900: F240 4114 MOVW R1, #0x0414 0x3418A904: F2C0 3103 MOVT R1, #0x0303 0x3418A908: 4288 CMP R0, R1 0x3418A90A: D04F BEQ 46L9 ; 0x3418A9AC 0x3418A90C: 9802 LDR R0, [SP, #8] 0x3418A90E: F640 0114 MOVW R1, #0x0814 0x3418A912: F2C0 3103 MOVT R1, #0x0303 0x3418A916: 4288 CMP R0, R1 0x3418A918: D048 BEQ 46L9 ; 0x3418A9AC 0x3418A91A: E084 B 46L15 ; 0x3418AA26
.L1: 0x3418A91C: F005 FC6C BL HAL_RCC_GetSysClockFreq ; 0x341901F8 0x3418A920: F000 F884 BL RCCEx_GetHCLKFreq ; 0x3418AA2C 0x3418A924: 9004 STR R0, [SP, #16] 0x3418A926: E07E B 46L15 ; 0x3418AA26
.L2: 0x3418A928: 2007 MOVS R0, #7 0x3418A92A: F7FE F9DD BL RCCEx_GetCLKPCLKFreq ; 0x34188CE8 0x3418A92E: 9004 STR R0, [SP, #16] 0x3418A930: E079 B 46L15 ; 0x3418AA26
.L3: 0x3418A932: F000 F889 BL LL_RCC_IC3_IsEnabled ; 0x3418AA48 0x3418A936: B3C0 CBZ R0, .L8 ; 0x3418A9AA 0x3418A938: F006 FFCE BL LL_RCC_IC3_GetDivider ; 0x341918D8 0x3418A93C: 9003 STR R0, [SP, #12] 0x3418A93E: F000 F88B BL LL_RCC_IC3_GetSource ; 0x3418AA58 0x3418A942: 4601 MOV R1, R0 0x3418A944: 9101 STR R1, [SP, #4] 0x3418A946: B160 CBZ R0, .L4 ; 0x3418A962 0x3418A948: 9801 LDR R0, [SP, #4] 0x3418A94A: F1B0 5F80 CMP.W R0, #0x10000000 0x3418A94E: D011 BEQ 46L5 ; 0x3418A974 0x3418A950: 9801 LDR R0, [SP, #4] 0x3418A952: F1B0 5F00 CMP.W R0, #0x20000000 0x3418A956: D016 BEQ 46L6 ; 0x3418A986 0x3418A958: 9801 LDR R0, [SP, #4] 0x3418A95A: F1B0 5F40 CMP.W R0, #0x30000000 0x3418A95E: D01B BEQ 46L7 ; 0x3418A998 0x3418A960: E023 B 46L8 ; 0x3418A9AA
.L4: 0x3418A962: F006 FFC5 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F0 0x3418A966: 9004 STR R0, [SP, #16] 0x3418A968: 9804 LDR R0, [SP, #16] 0x3418A96A: 9903 LDR R1, [SP, #12] 0x3418A96C: FBB0 F0F1 UDIV R0, R0, R1 0x3418A970: 9004 STR R0, [SP, #16] 0x3418A972: E01A B 46L8 ; 0x3418A9AA
.L5: 0x3418A974: F006 FFFE BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191974 0x3418A978: 9004 STR R0, [SP, #16] 0x3418A97A: 9804 LDR R0, [SP, #16] 0x3418A97C: 9903 LDR R1, [SP, #12] 0x3418A97E: FBB0 F0F1 UDIV R0, R0, R1 0x3418A982: 9004 STR R0, [SP, #16] 0x3418A984: E011 B 46L8 ; 0x3418A9AA
.L6: 0x3418A986: F007 F837 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919F8 0x3418A98A: 9004 STR R0, [SP, #16] 0x3418A98C: 9804 LDR R0, [SP, #16] 0x3418A98E: 9903 LDR R1, [SP, #12] 0x3418A990: FBB0 F0F1 UDIV R0, R0, R1 0x3418A994: 9004 STR R0, [SP, #16] 0x3418A996: E008 B 46L8 ; 0x3418A9AA
.L7: 0x3418A998: F007 F870 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A7C 0x3418A99C: 9004 STR R0, [SP, #16] 0x3418A99E: 9804 LDR R0, [SP, #16] 0x3418A9A0: 9903 LDR R1, [SP, #12] 0x3418A9A2: FBB0 F0F1 UDIV R0, R0, R1 0x3418A9A6: 9004 STR R0, [SP, #16] 0x3418A9A8: E7FF B 46L8 ; 0x3418A9AA
.L8: 0x3418A9AA: E03C B 46L15 ; 0x3418AA26
.L9: 0x3418A9AC: F000 F85C BL LL_RCC_IC4_IsEnabled ; 0x3418AA68 0x3418A9B0: B3C0 CBZ R0, .L14 ; 0x3418AA24 0x3418A9B2: F007 F8A5 BL LL_RCC_IC4_GetDivider ; 0x34191B00 0x3418A9B6: 9003 STR R0, [SP, #12] 0x3418A9B8: F000 F85E BL LL_RCC_IC4_GetSource ; 0x3418AA78 0x3418A9BC: 4601 MOV R1, R0 0x3418A9BE: 9100 STR R1, [SP, #0] 0x3418A9C0: B160 CBZ R0, .L10 ; 0x3418A9DC 0x3418A9C2: 9800 LDR R0, [SP, #0] 0x3418A9C4: F1B0 5F80 CMP.W R0, #0x10000000 0x3418A9C8: D011 BEQ 46L11 ; 0x3418A9EE 0x3418A9CA: 9800 LDR R0, [SP, #0] 0x3418A9CC: F1B0 5F00 CMP.W R0, #0x20000000 0x3418A9D0: D016 BEQ 46L12 ; 0x3418AA00 0x3418A9D2: 9800 LDR R0, [SP, #0] 0x3418A9D4: F1B0 5F40 CMP.W R0, #0x30000000 0x3418A9D8: D01B BEQ 46L13 ; 0x3418AA12 0x3418A9DA: E023 B 46L14 ; 0x3418AA24
.L10: 0x3418A9DC: F006 FF88 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F0 0x3418A9E0: 9004 STR R0, [SP, #16] 0x3418A9E2: 9804 LDR R0, [SP, #16] 0x3418A9E4: 9903 LDR R1, [SP, #12] 0x3418A9E6: FBB0 F0F1 UDIV R0, R0, R1 0x3418A9EA: 9004 STR R0, [SP, #16] 0x3418A9EC: E01A B 46L14 ; 0x3418AA24
.L11: 0x3418A9EE: F006 FFC1 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191974 0x3418A9F2: 9004 STR R0, [SP, #16] 0x3418A9F4: 9804 LDR R0, [SP, #16] 0x3418A9F6: 9903 LDR R1, [SP, #12] 0x3418A9F8: FBB0 F0F1 UDIV R0, R0, R1 0x3418A9FC: 9004 STR R0, [SP, #16] 0x3418A9FE: E011 B 46L14 ; 0x3418AA24
.L12: 0x3418AA00: F006 FFFA BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919F8 0x3418AA04: 9004 STR R0, [SP, #16] 0x3418AA06: 9804 LDR R0, [SP, #16] 0x3418AA08: 9903 LDR R1, [SP, #12] 0x3418AA0A: FBB0 F0F1 UDIV R0, R0, R1 0x3418AA0E: 9004 STR R0, [SP, #16] 0x3418AA10: E008 B 46L14 ; 0x3418AA24
.L13: 0x3418AA12: F007 F833 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A7C 0x3418AA16: 9004 STR R0, [SP, #16] 0x3418AA18: 9804 LDR R0, [SP, #16] 0x3418AA1A: 9903 LDR R1, [SP, #12] 0x3418AA1C: FBB0 F0F1 UDIV R0, R0, R1 0x3418AA20: 9004 STR R0, [SP, #16] 0x3418AA22: E7FF B 46L14 ; 0x3418AA24
.L14: 0x3418AA24: E7FF B 46L15 ; 0x3418AA26
.L15: 0x3418AA26: 9804 LDR R0, [SP, #16] 0x3418AA28: B006 ADD SP, SP, #24 0x3418AA2A: BD80 POP 123R7, PC}

Section .text.RCCEx_GetHCLKFreq from blto2_FSBL_lto.o, size=28, align=4


RCCEx_GetHCLKFreq: 0x3418AA2C: B580 PUSH 123R7, LR} 0x3418AA2E: B082 SUB SP, SP, #8 0x3418AA30: 9001 STR R0, [SP, #4] 0x3418AA32: 9801 LDR R0, [SP, #4] 0x3418AA34: 9000 STR R0, [SP, #0] 0x3418AA36: F000 F9F9 BL LL_RCC_GetAHBPrescaler.90 ; 0x3418AE2C 0x3418AA3A: 4601 MOV R1, R0 0x3418AA3C: 9800 LDR R0, [SP, #0] 0x3418AA3E: F3C1 5102 UBFX R1, R1, #20, #3 0x3418AA42: 40C8 LSRS R0, R1 0x3418AA44: B002 ADD SP, SP, #8 0x3418AA46: BD80 POP 123R7, PC}

Section .text.LL_RCC_IC3_IsEnabled from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC3_IsEnabled: 0x3418AA48: F248 2040 MOVW R0, #0x8240 0x3418AA4C: F2C5 6002 MOVT R0, #0x5602 0x3418AA50: 6800 LDR R0, [R0] 0x3418AA52: F3C0 0080 UBFX R0, R0, #2, #1 0x3418AA56: 4770 BX LR

Section .text.LL_RCC_IC3_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC3_GetSource: 0x3418AA58: F248 00CC MOVW R0, #0x80CC 0x3418AA5C: F2C5 6002 MOVT R0, #0x5602 0x3418AA60: 6800 LDR R0, [R0] 0x3418AA62: F000 5040 AND R0, R0, #0x30000000 0x3418AA66: 4770 BX LR

Section .text.LL_RCC_IC4_IsEnabled from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC4_IsEnabled: 0x3418AA68: F248 2040 MOVW R0, #0x8240 0x3418AA6C: F2C5 6002 MOVT R0, #0x5602 0x3418AA70: 6800 LDR R0, [R0] 0x3418AA72: F3C0 00C0 UBFX R0, R0, #3, #1 0x3418AA76: 4770 BX LR

Section .text.LL_RCC_IC4_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC4_GetSource: 0x3418AA78: F248 00D0 MOVW R0, #0x80D0 0x3418AA7C: F2C5 6002 MOVT R0, #0x5602 0x3418AA80: 6800 LDR R0, [R0] 0x3418AA82: F000 5040 AND R0, R0, #0x30000000 0x3418AA86: 4770 BX LR

Section .text.LL_RCC_PLL4_IsReady.74 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL4_IsReady.74: 0x3418AA88: F248 0004 MOVW R0, #0x8004 0x3418AA8C: F2C5 6002 MOVT R0, #0x5602 0x3418AA90: 6800 LDR R0, [R0] 0x3418AA92: F3C0 20C0 UBFX R0, R0, #11, #1 0x3418AA96: 4770 BX LR

Section .text.LL_RCC_PLL4P_IsEnabled from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL4P_IsEnabled: 0x3418AA98: F248 00B8 MOVW R0, #0x80B8 0x3418AA9C: F2C5 6002 MOVT R0, #0x5602 0x3418AAA0: 6800 LDR R0, [R0] 0x3418AAA2: F3C0 7080 UBFX R0, R0, #30, #1 0x3418AAA6: 4770 BX LR

Section .text.LL_RCC_PLL4_GetSource.75 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL4_GetSource.75: 0x3418AAA8: F248 00B0 MOVW R0, #0x80B0 0x3418AAAC: F2C5 6002 MOVT R0, #0x5602 0x3418AAB0: 6800 LDR R0, [R0] 0x3418AAB2: F000 40E0 AND R0, R0, #0x70000000 0x3418AAB6: 4770 BX LR

Section .text.RCCEx_GetPLLSourceFreq from blto2_FSBL_lto.o, size=140, align=4


RCCEx_GetPLLSourceFreq: 0x3418AAB8: B580 PUSH 123R7, LR} 0x3418AABA: B084 SUB SP, SP, #16 0x3418AABC: 9003 STR R0, [SP, #12] 0x3418AABE: 2000 MOVS R0, #0 0x3418AAC0: 9002 STR R0, [SP, #8] 0x3418AAC2: 9803 LDR R0, [SP, #12] 0x3418AAC4: 9001 STR R0, [SP, #4] 0x3418AAC6: B160 CBZ R0, .L1 ; 0x3418AAE2 0x3418AAC8: 9801 LDR R0, [SP, #4] 0x3418AACA: F1B0 5F80 CMP.W R0, #0x10000000 0x3418AACE: D015 BEQ 46L3 ; 0x3418AAFC 0x3418AAD0: 9801 LDR R0, [SP, #4] 0x3418AAD2: F1B0 5F00 CMP.W R0, #0x20000000 0x3418AAD6: D023 BEQ 46L6 ; 0x3418AB20 0x3418AAD8: 9801 LDR R0, [SP, #4] 0x3418AADA: F1B0 5F40 CMP.W R0, #0x30000000 0x3418AADE: D028 BEQ 46L8 ; 0x3418AB32 0x3418AAE0: E02D B 46L9 ; 0x3418AB3E
.L1: 0x3418AAE2: F000 F8A3 BL LL_RCC_HSI_IsReady.77 ; 0x3418AC2C 0x3418AAE6: B140 CBZ R0, .L2 ; 0x3418AAFA 0x3418AAE8: F000 F8A8 BL LL_RCC_HSI_GetDivider.78 ; 0x3418AC3C 0x3418AAEC: 09C1 LSRS R1, R0, #7 0x3418AAEE: F249 0000 MOVW R0, #0x9000 0x3418AAF2: F2C0 30D0 MOVT R0, #0x03D0 0x3418AAF6: 40C8 LSRS R0, R1 0x3418AAF8: 9002 STR R0, [SP, #8]
.L2: 0x3418AAFA: E020 B 46L9 ; 0x3418AB3E
.L3: 0x3418AAFC: F000 F8A6 BL LL_RCC_MSI_IsReady.79 ; 0x3418AC4C 0x3418AB00: B168 CBZ R0, .L5 ; 0x3418AB1E 0x3418AB02: F000 F8AB BL LL_RCC_MSI_GetFrequency ; 0x3418AC5C 0x3418AB06: B928 CBNZ R0, .L4 ; 0x3418AB14 0x3418AB08: F640 1000 MOVW R0, #0x0900 0x3418AB0C: F2C0 003D MOVT R0, #61 0x3418AB10: 9002 STR R0, [SP, #8] 0x3418AB12: E004 B 46L5 ; 0x3418AB1E
.L4: 0x3418AB14: F242 4000 MOVW R0, #0x2400 0x3418AB18: F2C0 00F4 MOVT R0, #244 0x3418AB1C: 9002 STR R0, [SP, #8]
.L5: 0x3418AB1E: E00E B 46L9 ; 0x3418AB3E
.L6: 0x3418AB20: F000 F8A4 BL LL_RCC_HSE_IsReady.80 ; 0x3418AC6C 0x3418AB24: B120 CBZ R0, .L7 ; 0x3418AB30 0x3418AB26: F646 4000 MOVW R0, #0x6C00 0x3418AB2A: F2C0 20DC MOVT R0, #0x02DC 0x3418AB2E: 9002 STR R0, [SP, #8]
.L7: 0x3418AB30: E005 B 46L9 ; 0x3418AB3E
.L8: 0x3418AB32: F248 0000 MOVW R0, #0x8000 0x3418AB36: F2C0 00BB MOVT R0, #187 0x3418AB3A: 9002 STR R0, [SP, #8] 0x3418AB3C: E7FF B 46L9 ; 0x3418AB3E
.L9: 0x3418AB3E: 9802 LDR R0, [SP, #8] 0x3418AB40: B004 ADD SP, SP, #16 0x3418AB42: BD80 POP 123R7, PC}

Section .text.LL_RCC_PLL4_GetM from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL4_GetM: 0x3418AB44: F248 00B0 MOVW R0, #0x80B0 0x3418AB48: F2C5 6002 MOVT R0, #0x5602 0x3418AB4C: 6800 LDR R0, [R0] 0x3418AB4E: F3C0 5005 UBFX R0, R0, #20, #6 0x3418AB52: 4770 BX LR

Section .text.LL_RCC_PLL4_GetN from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL4_GetN: 0x3418AB54: F248 00B0 MOVW R0, #0x80B0 0x3418AB58: F2C5 6002 MOVT R0, #0x5602 0x3418AB5C: 6800 LDR R0, [R0] 0x3418AB5E: F3C0 200B UBFX R0, R0, #8, #12 0x3418AB62: 4770 BX LR

Section .text.LL_RCC_PLL4_GetFRACN from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL4_GetFRACN: 0x3418AB64: F248 00B4 MOVW R0, #0x80B4 0x3418AB68: F2C5 6002 MOVT R0, #0x5602 0x3418AB6C: 6800 LDR R0, [R0] 0x3418AB6E: F020 407F BIC R0, R0, #0xFF000000 0x3418AB72: 4770 BX LR

Section .text.LL_RCC_PLL4_GetP1 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL4_GetP1: 0x3418AB74: F248 00B8 MOVW R0, #0x80B8 0x3418AB78: F2C5 6002 MOVT R0, #0x5602 0x3418AB7C: 6800 LDR R0, [R0] 0x3418AB7E: F3C0 60C2 UBFX R0, R0, #27, #3 0x3418AB82: 4770 BX LR

Section .text.LL_RCC_PLL4_GetP2 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL4_GetP2: 0x3418AB84: F248 00B8 MOVW R0, #0x80B8 0x3418AB88: F2C5 6002 MOVT R0, #0x5602 0x3418AB8C: 6800 LDR R0, [R0] 0x3418AB8E: F3C0 6002 UBFX R0, R0, #24, #3 0x3418AB92: 4770 BX LR

Section .text.RCCEx_CalcPLLFreq from blto2_FSBL_lto.o, size=136, align=4


RCCEx_CalcPLLFreq: 0x3418AB94: B085 SUB SP, SP, #20 0x3418AB96: F8DD C018 LDR.W R12, [SP, #24] 0x3418AB9A: F8DD C014 LDR.W R12, [SP, #20] 0x3418AB9E: 9004 STR R0, [SP, #16] 0x3418ABA0: 9103 STR R1, [SP, #12] 0x3418ABA2: 9202 STR R2, [SP, #8] 0x3418ABA4: 9301 STR R3, [SP, #4] 0x3418ABA6: ED9D 0A04 VLDR S0, [SP, #16] 0x3418ABAA: EEB8 0A40 VCVT.F32.U32 S0, S0 0x3418ABAE: ED9D 1A02 VLDR S2, [SP, #8] 0x3418ABB2: EEB8 1A41 VCVT.F32.U32 S2, S2 0x3418ABB6: ED9D 2A01 VLDR S4, [SP, #4] 0x3418ABBA: EEB8 2A42 VCVT.F32.U32 S4, S4 0x3418ABBE: ED9F 3A16 VLDR S6, =0x33800000 ; [PC, #88] [0x3418AC18] 0x3418ABC2: EE22 2A03 VMUL.F32 S4, S4, S6 0x3418ABC6: EE31 1A02 VADD.F32 S2, S2, S4 0x3418ABCA: EE20 0A01 VMUL.F32 S0, S0, S2 0x3418ABCE: ED9D 1A03 VLDR S2, [SP, #12] 0x3418ABD2: EEB8 1A41 VCVT.F32.U32 S2, S2 0x3418ABD6: EE80 0A01 VDIV.F32 S0, S0, S2 0x3418ABDA: ED8D 0A00 VSTR S0, [SP] 0x3418ABDE: ED9D 0A00 VLDR S0, [SP] 0x3418ABE2: ED9D 1A05 VLDR S2, [SP, #20] 0x3418ABE6: EEB8 1A41 VCVT.F32.U32 S2, S2 0x3418ABEA: EE80 0A01 VDIV.F32 S0, S0, S2 0x3418ABEE: ED8D 0A00 VSTR S0, [SP] 0x3418ABF2: ED9D 0A00 VLDR S0, [SP] 0x3418ABF6: ED9D 1A06 VLDR S2, [SP, #24] 0x3418ABFA: EEB8 1A41 VCVT.F32.U32 S2, S2 0x3418ABFE: EE80 0A01 VDIV.F32 S0, S0, S2 0x3418AC02: ED8D 0A00 VSTR S0, [SP] 0x3418AC06: ED9D 0A00 VLDR S0, [SP] 0x3418AC0A: EEBC 0AC0 VCVT.U32.F32 S0, S0 0x3418AC0E: EE10 0A10 VMOV R0, S0 0x3418AC12: B005 ADD SP, SP, #20 0x3418AC14: 4770 BX LR 0x3418AC16: BF00 NOP 0x3418AC18: 33800000 DC.W 0x33800000

Section .text.LL_RCC_PLL4_IsEnabledBypass.76 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL4_IsEnabledBypass.76: 0x3418AC1C: F248 00B0 MOVW R0, #0x80B0 0x3418AC20: F2C5 6002 MOVT R0, #0x5602 0x3418AC24: 6800 LDR R0, [R0] 0x3418AC26: F3C0 60C0 UBFX R0, R0, #27, #1 0x3418AC2A: 4770 BX LR

Section .text.LL_RCC_HSI_IsReady.77 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_HSI_IsReady.77: 0x3418AC2C: F248 0004 MOVW R0, #0x8004 0x3418AC30: F2C5 6002 MOVT R0, #0x5602 0x3418AC34: 6800 LDR R0, [R0] 0x3418AC36: F3C0 00C0 UBFX R0, R0, #3, #1 0x3418AC3A: 4770 BX LR

Section .text.LL_RCC_HSI_GetDivider.78 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_HSI_GetDivider.78: 0x3418AC3C: F248 0048 MOVW R0, #0x8048 0x3418AC40: F2C5 6002 MOVT R0, #0x5602 0x3418AC44: 6800 LDR R0, [R0] 0x3418AC46: F400 70C0 AND R0, R0, #0x0180 0x3418AC4A: 4770 BX LR

Section .text.LL_RCC_MSI_IsReady.79 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_MSI_IsReady.79: 0x3418AC4C: F248 0004 MOVW R0, #0x8004 0x3418AC50: F2C5 6002 MOVT R0, #0x5602 0x3418AC54: 6800 LDR R0, [R0] 0x3418AC56: F3C0 0080 UBFX R0, R0, #2, #1 0x3418AC5A: 4770 BX LR

Section .text.LL_RCC_MSI_GetFrequency from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_MSI_GetFrequency: 0x3418AC5C: F248 0044 MOVW R0, #0x8044 0x3418AC60: F2C5 6002 MOVT R0, #0x5602 0x3418AC64: 6800 LDR R0, [R0] 0x3418AC66: F400 7000 AND R0, R0, #0x0200 0x3418AC6A: 4770 BX LR

Section .text.LL_RCC_HSE_IsReady.80 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_HSE_IsReady.80: 0x3418AC6C: F248 0004 MOVW R0, #0x8004 0x3418AC70: F2C5 6002 MOVT R0, #0x5602 0x3418AC74: 6800 LDR R0, [R0] 0x3418AC76: F3C0 1000 UBFX R0, R0, #4, #1 0x3418AC7A: 4770 BX LR

Section .text.LL_RCC_PLL3_IsReady.81 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL3_IsReady.81: 0x3418AC7C: F248 0004 MOVW R0, #0x8004 0x3418AC80: F2C5 6002 MOVT R0, #0x5602 0x3418AC84: 6800 LDR R0, [R0] 0x3418AC86: F3C0 2080 UBFX R0, R0, #10, #1 0x3418AC8A: 4770 BX LR

Section .text.LL_RCC_PLL3P_IsEnabled from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL3P_IsEnabled: 0x3418AC8C: F248 00A8 MOVW R0, #0x80A8 0x3418AC90: F2C5 6002 MOVT R0, #0x5602 0x3418AC94: 6800 LDR R0, [R0] 0x3418AC96: F3C0 7080 UBFX R0, R0, #30, #1 0x3418AC9A: 4770 BX LR

Section .text.LL_RCC_PLL3_GetSource.82 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL3_GetSource.82: 0x3418AC9C: F248 00A0 MOVW R0, #0x80A0 0x3418ACA0: F2C5 6002 MOVT R0, #0x5602 0x3418ACA4: 6800 LDR R0, [R0] 0x3418ACA6: F000 40E0 AND R0, R0, #0x70000000 0x3418ACAA: 4770 BX LR

Section .text.LL_RCC_PLL3_GetM from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL3_GetM: 0x3418ACAC: F248 00A0 MOVW R0, #0x80A0 0x3418ACB0: F2C5 6002 MOVT R0, #0x5602 0x3418ACB4: 6800 LDR R0, [R0] 0x3418ACB6: F3C0 5005 UBFX R0, R0, #20, #6 0x3418ACBA: 4770 BX LR

Section .text.LL_RCC_PLL3_GetN from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL3_GetN: 0x3418ACBC: F248 00A0 MOVW R0, #0x80A0 0x3418ACC0: F2C5 6002 MOVT R0, #0x5602 0x3418ACC4: 6800 LDR R0, [R0] 0x3418ACC6: F3C0 200B UBFX R0, R0, #8, #12 0x3418ACCA: 4770 BX LR

Section .text.LL_RCC_PLL3_GetFRACN from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL3_GetFRACN: 0x3418ACCC: F248 00A4 MOVW R0, #0x80A4 0x3418ACD0: F2C5 6002 MOVT R0, #0x5602 0x3418ACD4: 6800 LDR R0, [R0] 0x3418ACD6: F020 407F BIC R0, R0, #0xFF000000 0x3418ACDA: 4770 BX LR

Section .text.LL_RCC_PLL3_GetP1 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL3_GetP1: 0x3418ACDC: F248 00A8 MOVW R0, #0x80A8 0x3418ACE0: F2C5 6002 MOVT R0, #0x5602 0x3418ACE4: 6800 LDR R0, [R0] 0x3418ACE6: F3C0 60C2 UBFX R0, R0, #27, #3 0x3418ACEA: 4770 BX LR

Section .text.LL_RCC_PLL3_GetP2 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL3_GetP2: 0x3418ACEC: F248 00A8 MOVW R0, #0x80A8 0x3418ACF0: F2C5 6002 MOVT R0, #0x5602 0x3418ACF4: 6800 LDR R0, [R0] 0x3418ACF6: F3C0 6002 UBFX R0, R0, #24, #3 0x3418ACFA: 4770 BX LR

Section .text.LL_RCC_PLL3_IsEnabledBypass.83 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL3_IsEnabledBypass.83: 0x3418ACFC: F248 00A0 MOVW R0, #0x80A0 0x3418AD00: F2C5 6002 MOVT R0, #0x5602 0x3418AD04: 6800 LDR R0, [R0] 0x3418AD06: F3C0 60C0 UBFX R0, R0, #27, #1 0x3418AD0A: 4770 BX LR

Section .text.LL_RCC_PLL2_IsReady.84 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL2_IsReady.84: 0x3418AD0C: F248 0004 MOVW R0, #0x8004 0x3418AD10: F2C5 6002 MOVT R0, #0x5602 0x3418AD14: 6800 LDR R0, [R0] 0x3418AD16: F3C0 2040 UBFX R0, R0, #9, #1 0x3418AD1A: 4770 BX LR

Section .text.LL_RCC_PLL2P_IsEnabled from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL2P_IsEnabled: 0x3418AD1C: F248 0098 MOVW R0, #0x8098 0x3418AD20: F2C5 6002 MOVT R0, #0x5602 0x3418AD24: 6800 LDR R0, [R0] 0x3418AD26: F3C0 7080 UBFX R0, R0, #30, #1 0x3418AD2A: 4770 BX LR

Section .text.LL_RCC_PLL2_GetSource.85 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL2_GetSource.85: 0x3418AD2C: F248 0090 MOVW R0, #0x8090 0x3418AD30: F2C5 6002 MOVT R0, #0x5602 0x3418AD34: 6800 LDR R0, [R0] 0x3418AD36: F000 40E0 AND R0, R0, #0x70000000 0x3418AD3A: 4770 BX LR

Section .text.LL_RCC_PLL2_GetM from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL2_GetM: 0x3418AD3C: F248 0090 MOVW R0, #0x8090 0x3418AD40: F2C5 6002 MOVT R0, #0x5602 0x3418AD44: 6800 LDR R0, [R0] 0x3418AD46: F3C0 5005 UBFX R0, R0, #20, #6 0x3418AD4A: 4770 BX LR

Section .text.LL_RCC_PLL2_GetN from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL2_GetN: 0x3418AD4C: F248 0090 MOVW R0, #0x8090 0x3418AD50: F2C5 6002 MOVT R0, #0x5602 0x3418AD54: 6800 LDR R0, [R0] 0x3418AD56: F3C0 200B UBFX R0, R0, #8, #12 0x3418AD5A: 4770 BX LR

Section .text.LL_RCC_PLL2_GetFRACN from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL2_GetFRACN: 0x3418AD5C: F248 0094 MOVW R0, #0x8094 0x3418AD60: F2C5 6002 MOVT R0, #0x5602 0x3418AD64: 6800 LDR R0, [R0] 0x3418AD66: F020 407F BIC R0, R0, #0xFF000000 0x3418AD6A: 4770 BX LR

Section .text.LL_RCC_PLL2_GetP1 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL2_GetP1: 0x3418AD6C: F248 0098 MOVW R0, #0x8098 0x3418AD70: F2C5 6002 MOVT R0, #0x5602 0x3418AD74: 6800 LDR R0, [R0] 0x3418AD76: F3C0 60C2 UBFX R0, R0, #27, #3 0x3418AD7A: 4770 BX LR

Section .text.LL_RCC_PLL2_GetP2 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL2_GetP2: 0x3418AD7C: F248 0098 MOVW R0, #0x8098 0x3418AD80: F2C5 6002 MOVT R0, #0x5602 0x3418AD84: 6800 LDR R0, [R0] 0x3418AD86: F3C0 6002 UBFX R0, R0, #24, #3 0x3418AD8A: 4770 BX LR

Section .text.LL_RCC_PLL2_IsEnabledBypass.86 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL2_IsEnabledBypass.86: 0x3418AD8C: F248 0090 MOVW R0, #0x8090 0x3418AD90: F2C5 6002 MOVT R0, #0x5602 0x3418AD94: 6800 LDR R0, [R0] 0x3418AD96: F3C0 60C0 UBFX R0, R0, #27, #1 0x3418AD9A: 4770 BX LR

Section .text.LL_RCC_PLL1_IsReady.87 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL1_IsReady.87: 0x3418AD9C: F248 0004 MOVW R0, #0x8004 0x3418ADA0: F2C5 6002 MOVT R0, #0x5602 0x3418ADA4: 6800 LDR R0, [R0] 0x3418ADA6: F3C0 2000 UBFX R0, R0, #8, #1 0x3418ADAA: 4770 BX LR

Section .text.LL_RCC_PLL1P_IsEnabled from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL1P_IsEnabled: 0x3418ADAC: F248 0088 MOVW R0, #0x8088 0x3418ADB0: F2C5 6002 MOVT R0, #0x5602 0x3418ADB4: 6800 LDR R0, [R0] 0x3418ADB6: F3C0 7080 UBFX R0, R0, #30, #1 0x3418ADBA: 4770 BX LR

Section .text.LL_RCC_PLL1_GetSource.88 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL1_GetSource.88: 0x3418ADBC: F248 0080 MOVW R0, #0x8080 0x3418ADC0: F2C5 6002 MOVT R0, #0x5602 0x3418ADC4: 6800 LDR R0, [R0] 0x3418ADC6: F000 40E0 AND R0, R0, #0x70000000 0x3418ADCA: 4770 BX LR

Section .text.LL_RCC_PLL1_GetM from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL1_GetM: 0x3418ADCC: F248 0080 MOVW R0, #0x8080 0x3418ADD0: F2C5 6002 MOVT R0, #0x5602 0x3418ADD4: 6800 LDR R0, [R0] 0x3418ADD6: F3C0 5005 UBFX R0, R0, #20, #6 0x3418ADDA: 4770 BX LR

Section .text.LL_RCC_PLL1_GetN from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL1_GetN: 0x3418ADDC: F248 0080 MOVW R0, #0x8080 0x3418ADE0: F2C5 6002 MOVT R0, #0x5602 0x3418ADE4: 6800 LDR R0, [R0] 0x3418ADE6: F3C0 200B UBFX R0, R0, #8, #12 0x3418ADEA: 4770 BX LR

Section .text.LL_RCC_PLL1_GetFRACN from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL1_GetFRACN: 0x3418ADEC: F248 0084 MOVW R0, #0x8084 0x3418ADF0: F2C5 6002 MOVT R0, #0x5602 0x3418ADF4: 6800 LDR R0, [R0] 0x3418ADF6: F020 407F BIC R0, R0, #0xFF000000 0x3418ADFA: 4770 BX LR

Section .text.LL_RCC_PLL1_GetP1 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL1_GetP1: 0x3418ADFC: F248 0088 MOVW R0, #0x8088 0x3418AE00: F2C5 6002 MOVT R0, #0x5602 0x3418AE04: 6800 LDR R0, [R0] 0x3418AE06: F3C0 60C2 UBFX R0, R0, #27, #3 0x3418AE0A: 4770 BX LR

Section .text.LL_RCC_PLL1_GetP2 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL1_GetP2: 0x3418AE0C: F248 0088 MOVW R0, #0x8088 0x3418AE10: F2C5 6002 MOVT R0, #0x5602 0x3418AE14: 6800 LDR R0, [R0] 0x3418AE16: F3C0 6002 UBFX R0, R0, #24, #3 0x3418AE1A: 4770 BX LR

Section .text.LL_RCC_PLL1_IsEnabledBypass.89 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL1_IsEnabledBypass.89: 0x3418AE1C: F248 0080 MOVW R0, #0x8080 0x3418AE20: F2C5 6002 MOVT R0, #0x5602 0x3418AE24: 6800 LDR R0, [R0] 0x3418AE26: F3C0 60C0 UBFX R0, R0, #27, #1 0x3418AE2A: 4770 BX LR

Section .text.LL_RCC_GetAHBPrescaler.90 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_GetAHBPrescaler.90: 0x3418AE2C: F248 0024 MOVW R0, #0x8024 0x3418AE30: F2C5 6002 MOVT R0, #0x5602 0x3418AE34: 6800 LDR R0, [R0] 0x3418AE36: F400 00E0 AND R0, R0, #0x700000 0x3418AE3A: 4770 BX LR

Section .text.LL_RCC_GetUSBClockSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_GetUSBClockSource: 0x3418AE3C: B580 PUSH 123R7, LR} 0x3418AE3E: B082 SUB SP, SP, #8 0x3418AE40: 9001 STR R0, [SP, #4] 0x3418AE42: 9801 LDR R0, [SP, #4] 0x3418AE44: F7FD FE76 BL LL_RCC_GetClockSource ; 0x34188B34 0x3418AE48: B002 ADD SP, SP, #8 0x3418AE4A: BD80 POP 123R7, PC}

Section .text.LL_RCC_IC15_IsEnabled from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC15_IsEnabled: 0x3418AE4C: F248 2040 MOVW R0, #0x8240 0x3418AE50: F2C5 6002 MOVT R0, #0x5602 0x3418AE54: 6800 LDR R0, [R0] 0x3418AE56: F3C0 3080 UBFX R0, R0, #14, #1 0x3418AE5A: 4770 BX LR

Section .text.LL_RCC_IC15_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC15_GetSource: 0x3418AE5C: F248 00FC MOVW R0, #0x80FC 0x3418AE60: F2C5 6002 MOVT R0, #0x5602 0x3418AE64: 6800 LDR R0, [R0] 0x3418AE66: F000 5040 AND R0, R0, #0x30000000 0x3418AE6A: 4770 BX LR

Section .text.LL_RCC_GetUARTClockSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_GetUARTClockSource: 0x3418AE6C: B580 PUSH 123R7, LR} 0x3418AE6E: B082 SUB SP, SP, #8 0x3418AE70: 9001 STR R0, [SP, #4] 0x3418AE72: 9801 LDR R0, [SP, #4] 0x3418AE74: F7FD FE5E BL LL_RCC_GetClockSource ; 0x34188B34 0x3418AE78: B002 ADD SP, SP, #8 0x3418AE7A: BD80 POP 123R7, PC}

Section .text.RCCEx_GetPCLK1Freq from blto2_FSBL_lto.o, size=28, align=4


RCCEx_GetPCLK1Freq: 0x3418AE7C: B580 PUSH 123R7, LR} 0x3418AE7E: B082 SUB SP, SP, #8 0x3418AE80: 9001 STR R0, [SP, #4] 0x3418AE82: 9801 LDR R0, [SP, #4] 0x3418AE84: 9000 STR R0, [SP, #0] 0x3418AE86: F000 F83D BL LL_RCC_GetAPB1Prescaler.92 ; 0x3418AF04 0x3418AE8A: 4601 MOV R1, R0 0x3418AE8C: 9800 LDR R0, [SP, #0] 0x3418AE8E: F001 0107 AND R1, R1, #7 0x3418AE92: 40C8 LSRS R0, R1 0x3418AE94: B002 ADD SP, SP, #8 0x3418AE96: BD80 POP 123R7, PC}

Section .text.RCCEx_GetPCLK2Freq from blto2_FSBL_lto.o, size=28, align=4


RCCEx_GetPCLK2Freq: 0x3418AE98: B580 PUSH 123R7, LR} 0x3418AE9A: B082 SUB SP, SP, #8 0x3418AE9C: 9001 STR R0, [SP, #4] 0x3418AE9E: 9801 LDR R0, [SP, #4] 0x3418AEA0: 9000 STR R0, [SP, #0] 0x3418AEA2: F000 F827 BL LL_RCC_GetAPB2Prescaler.91 ; 0x3418AEF4 0x3418AEA6: 4601 MOV R1, R0 0x3418AEA8: 9800 LDR R0, [SP, #0] 0x3418AEAA: F3C1 1102 UBFX R1, R1, #4, #3 0x3418AEAE: 40C8 LSRS R0, R1 0x3418AEB0: B002 ADD SP, SP, #8 0x3418AEB2: BD80 POP 123R7, PC}

Section .text.LL_RCC_IC9_IsEnabled from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC9_IsEnabled: 0x3418AEB4: F248 2040 MOVW R0, #0x8240 0x3418AEB8: F2C5 6002 MOVT R0, #0x5602 0x3418AEBC: 6800 LDR R0, [R0] 0x3418AEBE: F3C0 2000 UBFX R0, R0, #8, #1 0x3418AEC2: 4770 BX LR

Section .text.LL_RCC_IC9_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC9_GetSource: 0x3418AEC4: F248 00E4 MOVW R0, #0x80E4 0x3418AEC8: F2C5 6002 MOVT R0, #0x5602 0x3418AECC: 6800 LDR R0, [R0] 0x3418AECE: F000 5040 AND R0, R0, #0x30000000 0x3418AED2: 4770 BX LR

Section .text.LL_RCC_IC14_IsEnabled from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC14_IsEnabled: 0x3418AED4: F248 2040 MOVW R0, #0x8240 0x3418AED8: F2C5 6002 MOVT R0, #0x5602 0x3418AEDC: 6800 LDR R0, [R0] 0x3418AEDE: F3C0 3040 UBFX R0, R0, #13, #1 0x3418AEE2: 4770 BX LR

Section .text.LL_RCC_IC14_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC14_GetSource: 0x3418AEE4: F248 00F8 MOVW R0, #0x80F8 0x3418AEE8: F2C5 6002 MOVT R0, #0x5602 0x3418AEEC: 6800 LDR R0, [R0] 0x3418AEEE: F000 5040 AND R0, R0, #0x30000000 0x3418AEF2: 4770 BX LR

Section .text.LL_RCC_GetAPB2Prescaler.91 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_GetAPB2Prescaler.91: 0x3418AEF4: F248 0024 MOVW R0, #0x8024 0x3418AEF8: F2C5 6002 MOVT R0, #0x5602 0x3418AEFC: 6800 LDR R0, [R0] 0x3418AEFE: F000 0070 AND R0, R0, #112 0x3418AF02: 4770 BX LR

Section .text.LL_RCC_GetAPB1Prescaler.92 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_GetAPB1Prescaler.92: 0x3418AF04: F248 0024 MOVW R0, #0x8024 0x3418AF08: F2C5 6002 MOVT R0, #0x5602 0x3418AF0C: 6800 LDR R0, [R0] 0x3418AF0E: F000 0007 AND R0, R0, #7 0x3418AF12: 4770 BX LR

Section .text.RCCEx_GetPCLK4Freq from blto2_FSBL_lto.o, size=28, align=4


RCCEx_GetPCLK4Freq: 0x3418AF14: B580 PUSH 123R7, LR} 0x3418AF16: B082 SUB SP, SP, #8 0x3418AF18: 9001 STR R0, [SP, #4] 0x3418AF1A: 9801 LDR R0, [SP, #4] 0x3418AF1C: 9000 STR R0, [SP, #0] 0x3418AF1E: F000 F817 BL LL_RCC_GetAPB4Prescaler.93 ; 0x3418AF50 0x3418AF22: 4601 MOV R1, R0 0x3418AF24: 9800 LDR R0, [SP, #0] 0x3418AF26: F3C1 3102 UBFX R1, R1, #12, #3 0x3418AF2A: 40C8 LSRS R0, R1 0x3418AF2C: B002 ADD SP, SP, #8 0x3418AF2E: BD80 POP 123R7, PC}

Section .text.LL_RCC_IC8_IsEnabled from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC8_IsEnabled: 0x3418AF30: F248 2040 MOVW R0, #0x8240 0x3418AF34: F2C5 6002 MOVT R0, #0x5602 0x3418AF38: 6800 LDR R0, [R0] 0x3418AF3A: B2C0 UXTB R0, R0 0x3418AF3C: 09C0 LSRS R0, R0, #7 0x3418AF3E: 4770 BX LR

Section .text.LL_RCC_IC8_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC8_GetSource: 0x3418AF40: F248 00E0 MOVW R0, #0x80E0 0x3418AF44: F2C5 6002 MOVT R0, #0x5602 0x3418AF48: 6800 LDR R0, [R0] 0x3418AF4A: F000 5040 AND R0, R0, #0x30000000 0x3418AF4E: 4770 BX LR

Section .text.LL_RCC_GetAPB4Prescaler.93 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_GetAPB4Prescaler.93: 0x3418AF50: F248 0024 MOVW R0, #0x8024 0x3418AF54: F2C5 6002 MOVT R0, #0x5602 0x3418AF58: 6800 LDR R0, [R0] 0x3418AF5A: F400 40E0 AND R0, R0, #0x7000 0x3418AF5E: 4770 BX LR

Section .text.LL_RCC_IC7_IsEnabled from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC7_IsEnabled: 0x3418AF60: F248 2040 MOVW R0, #0x8240 0x3418AF64: F2C5 6002 MOVT R0, #0x5602 0x3418AF68: 6800 LDR R0, [R0] 0x3418AF6A: F3C0 1080 UBFX R0, R0, #6, #1 0x3418AF6E: 4770 BX LR

Section .text.LL_RCC_IC7_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC7_GetSource: 0x3418AF70: F248 00DC MOVW R0, #0x80DC 0x3418AF74: F2C5 6002 MOVT R0, #0x5602 0x3418AF78: 6800 LDR R0, [R0] 0x3418AF7A: F000 5040 AND R0, R0, #0x30000000 0x3418AF7E: 4770 BX LR

Section .text.LL_RCC_IC5_IsEnabled from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC5_IsEnabled: 0x3418AF80: F248 2040 MOVW R0, #0x8240 0x3418AF84: F2C5 6002 MOVT R0, #0x5602 0x3418AF88: 6800 LDR R0, [R0] 0x3418AF8A: F3C0 1000 UBFX R0, R0, #4, #1 0x3418AF8E: 4770 BX LR

Section .text.LL_RCC_IC5_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC5_GetSource: 0x3418AF90: F248 00D4 MOVW R0, #0x80D4 0x3418AF94: F2C5 6002 MOVT R0, #0x5602 0x3418AF98: 6800 LDR R0, [R0] 0x3418AF9A: F000 5040 AND R0, R0, #0x30000000 0x3418AF9E: 4770 BX LR

Section .text.LL_RCC_LSI_IsReady.94 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_LSI_IsReady.94: 0x3418AFA0: F248 0004 MOVW R0, #0x8004 0x3418AFA4: F2C5 6002 MOVT R0, #0x5602 0x3418AFA8: 6800 LDR R0, [R0] 0x3418AFAA: F000 0001 AND R0, R0, #1 0x3418AFAE: 4770 BX LR

Section .text.LL_RCC_IC20_IsEnabled from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC20_IsEnabled: 0x3418AFB0: F248 2040 MOVW R0, #0x8240 0x3418AFB4: F2C5 6002 MOVT R0, #0x5602 0x3418AFB8: 6800 LDR R0, [R0] 0x3418AFBA: F3C0 40C0 UBFX R0, R0, #19, #1 0x3418AFBE: 4770 BX LR

Section .text.LL_RCC_IC20_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC20_GetSource: 0x3418AFC0: F248 1010 MOVW R0, #0x8110 0x3418AFC4: F2C5 6002 MOVT R0, #0x5602 0x3418AFC8: 6800 LDR R0, [R0] 0x3418AFCA: F000 5040 AND R0, R0, #0x30000000 0x3418AFCE: 4770 BX LR

Section .text.RCCEx_GetPCLK5Freq from blto2_FSBL_lto.o, size=28, align=4


RCCEx_GetPCLK5Freq: 0x3418AFD0: B580 PUSH 123R7, LR} 0x3418AFD2: B082 SUB SP, SP, #8 0x3418AFD4: 9001 STR R0, [SP, #4] 0x3418AFD6: 9801 LDR R0, [SP, #4] 0x3418AFD8: 9000 STR R0, [SP, #0] 0x3418AFDA: F000 F817 BL LL_RCC_GetAPB5Prescaler.95 ; 0x3418B00C 0x3418AFDE: 4601 MOV R1, R0 0x3418AFE0: 9800 LDR R0, [SP, #0] 0x3418AFE2: F3C1 4102 UBFX R1, R1, #16, #3 0x3418AFE6: 40C8 LSRS R0, R1 0x3418AFE8: B002 ADD SP, SP, #8 0x3418AFEA: BD80 POP 123R7, PC}

Section .text.LL_RCC_IC16_IsEnabled from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC16_IsEnabled: 0x3418AFEC: F248 2040 MOVW R0, #0x8240 0x3418AFF0: F2C5 6002 MOVT R0, #0x5602 0x3418AFF4: 6800 LDR R0, [R0] 0x3418AFF6: B280 UXTH R0, R0 0x3418AFF8: 0BC0 LSRS R0, R0, #15 0x3418AFFA: 4770 BX LR

Section .text.LL_RCC_IC16_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC16_GetSource: 0x3418AFFC: F248 1000 MOVW R0, #0x8100 0x3418B000: F2C5 6002 MOVT R0, #0x5602 0x3418B004: 6800 LDR R0, [R0] 0x3418B006: F000 5040 AND R0, R0, #0x30000000 0x3418B00A: 4770 BX LR

Section .text.LL_RCC_GetAPB5Prescaler.95 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_GetAPB5Prescaler.95: 0x3418B00C: F248 0024 MOVW R0, #0x8024 0x3418B010: F2C5 6002 MOVT R0, #0x5602 0x3418B014: 6800 LDR R0, [R0] 0x3418B016: F400 20E0 AND R0, R0, #0x070000 0x3418B01A: 4770 BX LR

Section .text.LL_RCC_IC10_IsEnabled from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC10_IsEnabled: 0x3418B01C: F248 2040 MOVW R0, #0x8240 0x3418B020: F2C5 6002 MOVT R0, #0x5602 0x3418B024: 6800 LDR R0, [R0] 0x3418B026: F3C0 2040 UBFX R0, R0, #9, #1 0x3418B02A: 4770 BX LR

Section .text.LL_RCC_IC10_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC10_GetSource: 0x3418B02C: F248 00E8 MOVW R0, #0x80E8 0x3418B030: F2C5 6002 MOVT R0, #0x5602 0x3418B034: 6800 LDR R0, [R0] 0x3418B036: F000 5040 AND R0, R0, #0x30000000 0x3418B03A: 4770 BX LR

Section .text.LL_RCC_IC19_IsEnabled from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC19_IsEnabled: 0x3418B03C: F248 2040 MOVW R0, #0x8240 0x3418B040: F2C5 6002 MOVT R0, #0x5602 0x3418B044: 6800 LDR R0, [R0] 0x3418B046: F3C0 4080 UBFX R0, R0, #18, #1 0x3418B04A: 4770 BX LR

Section .text.LL_RCC_IC19_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC19_GetSource: 0x3418B04C: F248 100C MOVW R0, #0x810C 0x3418B050: F2C5 6002 MOVT R0, #0x5602 0x3418B054: 6800 LDR R0, [R0] 0x3418B056: F000 5040 AND R0, R0, #0x30000000 0x3418B05A: 4770 BX LR

Section .text.LL_RCC_IC13_IsEnabled from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC13_IsEnabled: 0x3418B05C: F248 2040 MOVW R0, #0x8240 0x3418B060: F2C5 6002 MOVT R0, #0x5602 0x3418B064: 6800 LDR R0, [R0] 0x3418B066: F3C0 3000 UBFX R0, R0, #12, #1 0x3418B06A: 4770 BX LR

Section .text.LL_RCC_IC13_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC13_GetSource: 0x3418B06C: F248 00F4 MOVW R0, #0x80F4 0x3418B070: F2C5 6002 MOVT R0, #0x5602 0x3418B074: 6800 LDR R0, [R0] 0x3418B076: F000 5040 AND R0, R0, #0x30000000 0x3418B07A: 4770 BX LR

Section .text.LL_RCC_IC12_IsEnabled from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC12_IsEnabled: 0x3418B07C: F248 2040 MOVW R0, #0x8240 0x3418B080: F2C5 6002 MOVT R0, #0x5602 0x3418B084: 6800 LDR R0, [R0] 0x3418B086: F3C0 20C0 UBFX R0, R0, #11, #1 0x3418B08A: 4770 BX LR

Section .text.LL_RCC_IC12_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC12_GetSource: 0x3418B08C: F248 00F0 MOVW R0, #0x80F0 0x3418B090: F2C5 6002 MOVT R0, #0x5602 0x3418B094: 6800 LDR R0, [R0] 0x3418B096: F000 5040 AND R0, R0, #0x30000000 0x3418B09A: 4770 BX LR

Section .text.LL_RCC_IC17_IsEnabled from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC17_IsEnabled: 0x3418B09C: F248 2040 MOVW R0, #0x8240 0x3418B0A0: F2C5 6002 MOVT R0, #0x5602 0x3418B0A4: 6800 LDR R0, [R0] 0x3418B0A6: F3C0 4000 UBFX R0, R0, #16, #1 0x3418B0AA: 4770 BX LR

Section .text.LL_RCC_IC17_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC17_GetSource: 0x3418B0AC: F248 1004 MOVW R0, #0x8104 0x3418B0B0: F2C5 6002 MOVT R0, #0x5602 0x3418B0B4: 6800 LDR R0, [R0] 0x3418B0B6: F000 5040 AND R0, R0, #0x30000000 0x3418B0BA: 4770 BX LR

Section .text.LL_RCC_CLKP_IsEnabled from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_CLKP_IsEnabled: 0x3418B0BC: F248 2048 MOVW R0, #0x8248 0x3418B0C0: F2C5 6002 MOVT R0, #0x5602 0x3418B0C4: 6800 LDR R0, [R0] 0x3418B0C6: F3C0 1080 UBFX R0, R0, #6, #1 0x3418B0CA: 4770 BX LR

Section .text.LL_RCC_IC18_IsEnabled from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC18_IsEnabled: 0x3418B0CC: F248 2040 MOVW R0, #0x8240 0x3418B0D0: F2C5 6002 MOVT R0, #0x5602 0x3418B0D4: 6800 LDR R0, [R0] 0x3418B0D6: F3C0 4040 UBFX R0, R0, #17, #1 0x3418B0DA: 4770 BX LR

Section .text.LL_RCC_IC18_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC18_GetSource: 0x3418B0DC: F248 1008 MOVW R0, #0x8108 0x3418B0E0: F2C5 6002 MOVT R0, #0x5602 0x3418B0E4: 6800 LDR R0, [R0] 0x3418B0E6: F000 5040 AND R0, R0, #0x30000000 0x3418B0EA: 4770 BX LR

Section .text.HAL_XSPI_Init from blto2_FSBL_lto.o, size=1548, align=4


HAL_XSPI_Init: 0x3418B0EC: B580 PUSH 123R7, LR} 0x3418B0EE: B086 SUB SP, SP, #24 0x3418B0F0: 9004 STR R0, [SP, #16] 0x3418B0F2: 2000 MOVS R0, #0 0x3418B0F4: F88D 000F STRB.W R0, [SP, #15] 0x3418B0F8: F7F6 FC7C BL HAL_GetTick ; 0x341819F4 0x3418B0FC: 9002 STR R0, [SP, #8] 0x3418B0FE: 9804 LDR R0, [SP, #16] 0x3418B100: B918 CBNZ R0, .L1 ; 0x3418B10A 0x3418B102: 2001 MOVS R0, #1 0x3418B104: F88D 000F STRB.W R0, [SP, #15] 0x3418B108: E2EE B 46L45 ; 0x3418B6E8
.L1: 0x3418B10A: 9804 LDR R0, [SP, #16] 0x3418B10C: 6880 LDR R0, [R0, #8] 0x3418B10E: B118 CBZ R0, .L2 ; 0x3418B118 0x3418B110: 9804 LDR R0, [SP, #16] 0x3418B112: 6880 LDR R0, [R0, #8] 0x3418B114: 2840 CMP R0, #64 0x3418B116: D100 BNE 46L3 ; 0x3418B11A
.L2: 0x3418B118: E007 B 46L4 ; 0x3418B12A
.L3: 0x3418B11A: F244 204E MOVW R0, #0x424E ; 0x3419424E = .rodata..L.str.98 0x3418B11E: F2C3 4019 MOVT R0, #0x3419 ; 0x3419424E = .rodata..L.str.98 0x3418B122: F44F 71B2 MOV.W R1, #0x0164 0x3418B126: F002 FDB7 BL assert_failed ; 0x3418DC98
.L4: 0x3418B12A: 9804 LDR R0, [SP, #16] 0x3418B12C: 68C0 LDR R0, [R0, #12] 0x3418B12E: B1C0 CBZ R0, .L5 ; 0x3418B162 0x3418B130: 9804 LDR R0, [SP, #16] 0x3418B132: 68C0 LDR R0, [R0, #12] 0x3418B134: F1B0 7F80 CMP.W R0, #0x01000000 0x3418B138: D013 BEQ 46L5 ; 0x3418B162 0x3418B13A: 9804 LDR R0, [SP, #16] 0x3418B13C: 68C0 LDR R0, [R0, #12] 0x3418B13E: F1B0 7F00 CMP.W R0, #0x02000000 0x3418B142: D00E BEQ 46L5 ; 0x3418B162 0x3418B144: 9804 LDR R0, [SP, #16] 0x3418B146: 68C0 LDR R0, [R0, #12] 0x3418B148: F1B0 7F40 CMP.W R0, #0x03000000 0x3418B14C: D009 BEQ 46L5 ; 0x3418B162 0x3418B14E: 9804 LDR R0, [SP, #16] 0x3418B150: 68C0 LDR R0, [R0, #12] 0x3418B152: F1B0 6F80 CMP.W R0, #0x04000000 0x3418B156: D004 BEQ 46L5 ; 0x3418B162 0x3418B158: 9804 LDR R0, [SP, #16] 0x3418B15A: 68C0 LDR R0, [R0, #12] 0x3418B15C: F1B0 6FC0 CMP.W R0, #0x06000000 0x3418B160: D100 BNE 46L6 ; 0x3418B164
.L5: 0x3418B162: E007 B 46L7 ; 0x3418B174
.L6: 0x3418B164: F244 204E MOVW R0, #0x424E ; 0x3419424E = .rodata..L.str.98 0x3418B168: F2C3 4019 MOVT R0, #0x3419 ; 0x3419424E = .rodata..L.str.98 0x3418B16C: F240 1165 MOVW R1, #0x0165 0x3418B170: F002 FD92 BL assert_failed ; 0x3418DC98
.L7: 0x3418B174: 9804 LDR R0, [SP, #16] 0x3418B176: 6900 LDR R0, [R0, #16] 0x3418B178: 2800 CMP R0, #0 0x3418B17A: D07B BEQ 46L8 ; 0x3418B274 0x3418B17C: 9804 LDR R0, [SP, #16] 0x3418B17E: 6900 LDR R0, [R0, #16] 0x3418B180: 2801 CMP R0, #1 0x3418B182: D077 BEQ 46L8 ; 0x3418B274 0x3418B184: 9804 LDR R0, [SP, #16] 0x3418B186: 6900 LDR R0, [R0, #16] 0x3418B188: 2802 CMP R0, #2 0x3418B18A: D073 BEQ 46L8 ; 0x3418B274 0x3418B18C: 9804 LDR R0, [SP, #16] 0x3418B18E: 6900 LDR R0, [R0, #16] 0x3418B190: 2803 CMP R0, #3 0x3418B192: D06F BEQ 46L8 ; 0x3418B274 0x3418B194: 9804 LDR R0, [SP, #16] 0x3418B196: 6900 LDR R0, [R0, #16] 0x3418B198: 2804 CMP R0, #4 0x3418B19A: D06B BEQ 46L8 ; 0x3418B274 0x3418B19C: 9804 LDR R0, [SP, #16] 0x3418B19E: 6900 LDR R0, [R0, #16] 0x3418B1A0: 2805 CMP R0, #5 0x3418B1A2: D067 BEQ 46L8 ; 0x3418B274 0x3418B1A4: 9804 LDR R0, [SP, #16] 0x3418B1A6: 6900 LDR R0, [R0, #16] 0x3418B1A8: 2806 CMP R0, #6 0x3418B1AA: D063 BEQ 46L8 ; 0x3418B274 0x3418B1AC: 9804 LDR R0, [SP, #16] 0x3418B1AE: 6900 LDR R0, [R0, #16] 0x3418B1B0: 2807 CMP R0, #7 0x3418B1B2: D05F BEQ 46L8 ; 0x3418B274 0x3418B1B4: 9804 LDR R0, [SP, #16] 0x3418B1B6: 6900 LDR R0, [R0, #16] 0x3418B1B8: 2808 CMP R0, #8 0x3418B1BA: D05B BEQ 46L8 ; 0x3418B274 0x3418B1BC: 9804 LDR R0, [SP, #16] 0x3418B1BE: 6900 LDR R0, [R0, #16] 0x3418B1C0: 2809 CMP R0, #9 0x3418B1C2: D057 BEQ 46L8 ; 0x3418B274 0x3418B1C4: 9804 LDR R0, [SP, #16] 0x3418B1C6: 6900 LDR R0, [R0, #16] 0x3418B1C8: 280A CMP R0, #10 0x3418B1CA: D053 BEQ 46L8 ; 0x3418B274 0x3418B1CC: 9804 LDR R0, [SP, #16] 0x3418B1CE: 6900 LDR R0, [R0, #16] 0x3418B1D0: 280B CMP R0, #11 0x3418B1D2: D04F BEQ 46L8 ; 0x3418B274 0x3418B1D4: 9804 LDR R0, [SP, #16] 0x3418B1D6: 6900 LDR R0, [R0, #16] 0x3418B1D8: 280C CMP R0, #12 0x3418B1DA: D04B BEQ 46L8 ; 0x3418B274 0x3418B1DC: 9804 LDR R0, [SP, #16] 0x3418B1DE: 6900 LDR R0, [R0, #16] 0x3418B1E0: 280D CMP R0, #13 0x3418B1E2: D047 BEQ 46L8 ; 0x3418B274 0x3418B1E4: 9804 LDR R0, [SP, #16] 0x3418B1E6: 6900 LDR R0, [R0, #16] 0x3418B1E8: 280E CMP R0, #14 0x3418B1EA: D043 BEQ 46L8 ; 0x3418B274 0x3418B1EC: 9804 LDR R0, [SP, #16] 0x3418B1EE: 6900 LDR R0, [R0, #16] 0x3418B1F0: 280F CMP R0, #15 0x3418B1F2: D03F BEQ 46L8 ; 0x3418B274 0x3418B1F4: 9804 LDR R0, [SP, #16] 0x3418B1F6: 6900 LDR R0, [R0, #16] 0x3418B1F8: 2810 CMP R0, #16 0x3418B1FA: D03B BEQ 46L8 ; 0x3418B274 0x3418B1FC: 9804 LDR R0, [SP, #16] 0x3418B1FE: 6900 LDR R0, [R0, #16] 0x3418B200: 2811 CMP R0, #17 0x3418B202: D037 BEQ 46L8 ; 0x3418B274 0x3418B204: 9804 LDR R0, [SP, #16] 0x3418B206: 6900 LDR R0, [R0, #16] 0x3418B208: 2812 CMP R0, #18 0x3418B20A: D033 BEQ 46L8 ; 0x3418B274 0x3418B20C: 9804 LDR R0, [SP, #16] 0x3418B20E: 6900 LDR R0, [R0, #16] 0x3418B210: 2813 CMP R0, #19 0x3418B212: D02F BEQ 46L8 ; 0x3418B274 0x3418B214: 9804 LDR R0, [SP, #16] 0x3418B216: 6900 LDR R0, [R0, #16] 0x3418B218: 2814 CMP R0, #20 0x3418B21A: D02B BEQ 46L8 ; 0x3418B274 0x3418B21C: 9804 LDR R0, [SP, #16] 0x3418B21E: 6900 LDR R0, [R0, #16] 0x3418B220: 2815 CMP R0, #21 0x3418B222: D027 BEQ 46L8 ; 0x3418B274 0x3418B224: 9804 LDR R0, [SP, #16] 0x3418B226: 6900 LDR R0, [R0, #16] 0x3418B228: 2816 CMP R0, #22 0x3418B22A: D023 BEQ 46L8 ; 0x3418B274 0x3418B22C: 9804 LDR R0, [SP, #16] 0x3418B22E: 6900 LDR R0, [R0, #16] 0x3418B230: 2817 CMP R0, #23 0x3418B232: D01F BEQ 46L8 ; 0x3418B274 0x3418B234: 9804 LDR R0, [SP, #16] 0x3418B236: 6900 LDR R0, [R0, #16] 0x3418B238: 2818 CMP R0, #24 0x3418B23A: D01B BEQ 46L8 ; 0x3418B274 0x3418B23C: 9804 LDR R0, [SP, #16] 0x3418B23E: 6900 LDR R0, [R0, #16] 0x3418B240: 2819 CMP R0, #25 0x3418B242: D017 BEQ 46L8 ; 0x3418B274 0x3418B244: 9804 LDR R0, [SP, #16] 0x3418B246: 6900 LDR R0, [R0, #16] 0x3418B248: 281A CMP R0, #26 0x3418B24A: D013 BEQ 46L8 ; 0x3418B274 0x3418B24C: 9804 LDR R0, [SP, #16] 0x3418B24E: 6900 LDR R0, [R0, #16] 0x3418B250: 281B CMP R0, #27 0x3418B252: D00F BEQ 46L8 ; 0x3418B274 0x3418B254: 9804 LDR R0, [SP, #16] 0x3418B256: 6900 LDR R0, [R0, #16] 0x3418B258: 281C CMP R0, #28 0x3418B25A: D00B BEQ 46L8 ; 0x3418B274 0x3418B25C: 9804 LDR R0, [SP, #16] 0x3418B25E: 6900 LDR R0, [R0, #16] 0x3418B260: 281D CMP R0, #29 0x3418B262: D007 BEQ 46L8 ; 0x3418B274 0x3418B264: 9804 LDR R0, [SP, #16] 0x3418B266: 6900 LDR R0, [R0, #16] 0x3418B268: 281E CMP R0, #30 0x3418B26A: D003 BEQ 46L8 ; 0x3418B274 0x3418B26C: 9804 LDR R0, [SP, #16] 0x3418B26E: 6900 LDR R0, [R0, #16] 0x3418B270: 281F CMP R0, #31 0x3418B272: D100 BNE 46L9 ; 0x3418B276
.L8: 0x3418B274: E007 B 46L10 ; 0x3418B286
.L9: 0x3418B276: F244 204E MOVW R0, #0x424E ; 0x3419424E = .rodata..L.str.98 0x3418B27A: F2C3 4019 MOVT R0, #0x3419 ; 0x3419424E = .rodata..L.str.98 0x3418B27E: F44F 71B3 MOV.W R1, #0x0166 0x3418B282: F002 FD09 BL assert_failed ; 0x3418DC98
.L10: 0x3418B286: 9804 LDR R0, [SP, #16] 0x3418B288: 6940 LDR R0, [R0, #20] 0x3418B28A: B120 CBZ R0, .L11 ; 0x3418B296 0x3418B28C: 9804 LDR R0, [SP, #16] 0x3418B28E: 6940 LDR R0, [R0, #20] 0x3418B290: 2840 CMP R0, #64 0x3418B292: D800 BHI 46L11 ; 0x3418B296 0x3418B294: E007 B 46L12 ; 0x3418B2A6
.L11: 0x3418B296: F244 204E MOVW R0, #0x424E ; 0x3419424E = .rodata..L.str.98 0x3418B29A: F2C3 4019 MOVT R0, #0x3419 ; 0x3419424E = .rodata..L.str.98 0x3418B29E: F240 1167 MOVW R1, #0x0167 0x3418B2A2: F002 FCF9 BL assert_failed ; 0x3418DC98
.L12: 0x3418B2A6: 9804 LDR R0, [SP, #16] 0x3418B2A8: 6980 LDR R0, [R0, #24] 0x3418B2AA: B118 CBZ R0, .L13 ; 0x3418B2B4 0x3418B2AC: 9804 LDR R0, [SP, #16] 0x3418B2AE: 6980 LDR R0, [R0, #24] 0x3418B2B0: 2802 CMP R0, #2 0x3418B2B2: D100 BNE 46L14 ; 0x3418B2B6
.L13: 0x3418B2B4: E007 B 46L15 ; 0x3418B2C6
.L14: 0x3418B2B6: F244 204E MOVW R0, #0x424E ; 0x3419424E = .rodata..L.str.98 0x3418B2BA: F2C3 4019 MOVT R0, #0x3419 ; 0x3419424E = .rodata..L.str.98 0x3418B2BE: F44F 71B4 MOV.W R1, #0x0168 0x3418B2C2: F002 FCE9 BL assert_failed ; 0x3418DC98
.L15: 0x3418B2C6: 9804 LDR R0, [SP, #16] 0x3418B2C8: 69C0 LDR R0, [R0, #28] 0x3418B2CA: B118 CBZ R0, .L16 ; 0x3418B2D4 0x3418B2CC: 9804 LDR R0, [SP, #16] 0x3418B2CE: 69C0 LDR R0, [R0, #28] 0x3418B2D0: 2801 CMP R0, #1 0x3418B2D2: D100 BNE 46L17 ; 0x3418B2D6
.L16: 0x3418B2D4: E007 B 46L18 ; 0x3418B2E6
.L17: 0x3418B2D6: F244 204E MOVW R0, #0x424E ; 0x3419424E = .rodata..L.str.98 0x3418B2DA: F2C3 4019 MOVT R0, #0x3419 ; 0x3419424E = .rodata..L.str.98 0x3418B2DE: F240 1169 MOVW R1, #0x0169 0x3418B2E2: F002 FCD9 BL assert_failed ; 0x3418DC98
.L18: 0x3418B2E6: 9804 LDR R0, [SP, #16] 0x3418B2E8: 6A00 LDR R0, [R0, #32] 0x3418B2EA: B198 CBZ R0, .L19 ; 0x3418B314 0x3418B2EC: 9804 LDR R0, [SP, #16] 0x3418B2EE: 6A00 LDR R0, [R0, #32] 0x3418B2F0: F5B0 3F00 CMP.W R0, #0x020000 0x3418B2F4: D00E BEQ 46L19 ; 0x3418B314 0x3418B2F6: 9804 LDR R0, [SP, #16] 0x3418B2F8: 6A00 LDR R0, [R0, #32] 0x3418B2FA: F5B0 3F40 CMP.W R0, #0x030000 0x3418B2FE: D009 BEQ 46L19 ; 0x3418B314 0x3418B300: 9804 LDR R0, [SP, #16] 0x3418B302: 6A00 LDR R0, [R0, #32] 0x3418B304: F5B0 2F80 CMP.W R0, #0x040000 0x3418B308: D004 BEQ 46L19 ; 0x3418B314 0x3418B30A: 9804 LDR R0, [SP, #16] 0x3418B30C: 6A00 LDR R0, [R0, #32] 0x3418B30E: F5B0 2FA0 CMP.W R0, #0x050000 0x3418B312: D100 BNE 46L20 ; 0x3418B316
.L19: 0x3418B314: E007 B 46L21 ; 0x3418B326
.L20: 0x3418B316: F244 204E MOVW R0, #0x424E ; 0x3419424E = .rodata..L.str.98 0x3418B31A: F2C3 4019 MOVT R0, #0x3419 ; 0x3419424E = .rodata..L.str.98 0x3418B31E: F44F 71B5 MOV.W R1, #0x016A 0x3418B322: F002 FCB9 BL assert_failed ; 0x3418DC98
.L21: 0x3418B326: 9804 LDR R0, [SP, #16] 0x3418B328: 6A40 LDR R0, [R0, #36] 0x3418B32A: 28FF CMP R0, #255 0x3418B32C: D800 BHI 46L22 ; 0x3418B330 0x3418B32E: E007 B 46L23 ; 0x3418B340
.L22: 0x3418B330: F244 204E MOVW R0, #0x424E ; 0x3419424E = .rodata..L.str.98 0x3418B334: F2C3 4019 MOVT R0, #0x3419 ; 0x3419424E = .rodata..L.str.98 0x3418B338: F240 116B MOVW R1, #0x016B 0x3418B33C: F002 FCAC BL assert_failed ; 0x3418DC98
.L23: 0x3418B340: 9804 LDR R0, [SP, #16] 0x3418B342: 6A80 LDR R0, [R0, #40] 0x3418B344: B120 CBZ R0, .L24 ; 0x3418B350 0x3418B346: 9804 LDR R0, [SP, #16] 0x3418B348: 6A80 LDR R0, [R0, #40] 0x3418B34A: F1B0 4F80 CMP.W R0, #0x40000000 0x3418B34E: D100 BNE 46L25 ; 0x3418B352
.L24: 0x3418B350: E007 B 46L26 ; 0x3418B362
.L25: 0x3418B352: F244 204E MOVW R0, #0x424E ; 0x3419424E = .rodata..L.str.98 0x3418B356: F2C3 4019 MOVT R0, #0x3419 ; 0x3419424E = .rodata..L.str.98 0x3418B35A: F44F 71B6 MOV.W R1, #0x016C 0x3418B35E: F002 FC9B BL assert_failed ; 0x3418DC98
.L26: 0x3418B362: 9804 LDR R0, [SP, #16] 0x3418B364: 6B00 LDR R0, [R0, #48] 0x3418B366: 2800 CMP R0, #0 0x3418B368: D07B BEQ 46L27 ; 0x3418B462 0x3418B36A: 9804 LDR R0, [SP, #16] 0x3418B36C: 6B00 LDR R0, [R0, #48] 0x3418B36E: 2801 CMP R0, #1 0x3418B370: D077 BEQ 46L27 ; 0x3418B462 0x3418B372: 9804 LDR R0, [SP, #16] 0x3418B374: 6B00 LDR R0, [R0, #48] 0x3418B376: 2802 CMP R0, #2 0x3418B378: D073 BEQ 46L27 ; 0x3418B462 0x3418B37A: 9804 LDR R0, [SP, #16] 0x3418B37C: 6B00 LDR R0, [R0, #48] 0x3418B37E: 2803 CMP R0, #3 0x3418B380: D06F BEQ 46L27 ; 0x3418B462 0x3418B382: 9804 LDR R0, [SP, #16] 0x3418B384: 6B00 LDR R0, [R0, #48] 0x3418B386: 2804 CMP R0, #4 0x3418B388: D06B BEQ 46L27 ; 0x3418B462 0x3418B38A: 9804 LDR R0, [SP, #16] 0x3418B38C: 6B00 LDR R0, [R0, #48] 0x3418B38E: 2805 CMP R0, #5 0x3418B390: D067 BEQ 46L27 ; 0x3418B462 0x3418B392: 9804 LDR R0, [SP, #16] 0x3418B394: 6B00 LDR R0, [R0, #48] 0x3418B396: 2806 CMP R0, #6 0x3418B398: D063 BEQ 46L27 ; 0x3418B462 0x3418B39A: 9804 LDR R0, [SP, #16] 0x3418B39C: 6B00 LDR R0, [R0, #48] 0x3418B39E: 2807 CMP R0, #7 0x3418B3A0: D05F BEQ 46L27 ; 0x3418B462 0x3418B3A2: 9804 LDR R0, [SP, #16] 0x3418B3A4: 6B00 LDR R0, [R0, #48] 0x3418B3A6: 2808 CMP R0, #8 0x3418B3A8: D05B BEQ 46L27 ; 0x3418B462 0x3418B3AA: 9804 LDR R0, [SP, #16] 0x3418B3AC: 6B00 LDR R0, [R0, #48] 0x3418B3AE: 2809 CMP R0, #9 0x3418B3B0: D057 BEQ 46L27 ; 0x3418B462 0x3418B3B2: 9804 LDR R0, [SP, #16] 0x3418B3B4: 6B00 LDR R0, [R0, #48] 0x3418B3B6: 280A CMP R0, #10 0x3418B3B8: D053 BEQ 46L27 ; 0x3418B462 0x3418B3BA: 9804 LDR R0, [SP, #16] 0x3418B3BC: 6B00 LDR R0, [R0, #48] 0x3418B3BE: 280B CMP R0, #11 0x3418B3C0: D04F BEQ 46L27 ; 0x3418B462 0x3418B3C2: 9804 LDR R0, [SP, #16] 0x3418B3C4: 6B00 LDR R0, [R0, #48] 0x3418B3C6: 280C CMP R0, #12 0x3418B3C8: D04B BEQ 46L27 ; 0x3418B462 0x3418B3CA: 9804 LDR R0, [SP, #16] 0x3418B3CC: 6B00 LDR R0, [R0, #48] 0x3418B3CE: 280D CMP R0, #13 0x3418B3D0: D047 BEQ 46L27 ; 0x3418B462 0x3418B3D2: 9804 LDR R0, [SP, #16] 0x3418B3D4: 6B00 LDR R0, [R0, #48] 0x3418B3D6: 280E CMP R0, #14 0x3418B3D8: D043 BEQ 46L27 ; 0x3418B462 0x3418B3DA: 9804 LDR R0, [SP, #16] 0x3418B3DC: 6B00 LDR R0, [R0, #48] 0x3418B3DE: 280F CMP R0, #15 0x3418B3E0: D03F BEQ 46L27 ; 0x3418B462 0x3418B3E2: 9804 LDR R0, [SP, #16] 0x3418B3E4: 6B00 LDR R0, [R0, #48] 0x3418B3E6: 2810 CMP R0, #16 0x3418B3E8: D03B BEQ 46L27 ; 0x3418B462 0x3418B3EA: 9804 LDR R0, [SP, #16] 0x3418B3EC: 6B00 LDR R0, [R0, #48] 0x3418B3EE: 2811 CMP R0, #17 0x3418B3F0: D037 BEQ 46L27 ; 0x3418B462 0x3418B3F2: 9804 LDR R0, [SP, #16] 0x3418B3F4: 6B00 LDR R0, [R0, #48] 0x3418B3F6: 2812 CMP R0, #18 0x3418B3F8: D033 BEQ 46L27 ; 0x3418B462 0x3418B3FA: 9804 LDR R0, [SP, #16] 0x3418B3FC: 6B00 LDR R0, [R0, #48] 0x3418B3FE: 2813 CMP R0, #19 0x3418B400: D02F BEQ 46L27 ; 0x3418B462 0x3418B402: 9804 LDR R0, [SP, #16] 0x3418B404: 6B00 LDR R0, [R0, #48] 0x3418B406: 2814 CMP R0, #20 0x3418B408: D02B BEQ 46L27 ; 0x3418B462 0x3418B40A: 9804 LDR R0, [SP, #16] 0x3418B40C: 6B00 LDR R0, [R0, #48] 0x3418B40E: 2815 CMP R0, #21 0x3418B410: D027 BEQ 46L27 ; 0x3418B462 0x3418B412: 9804 LDR R0, [SP, #16] 0x3418B414: 6B00 LDR R0, [R0, #48] 0x3418B416: 2816 CMP R0, #22 0x3418B418: D023 BEQ 46L27 ; 0x3418B462 0x3418B41A: 9804 LDR R0, [SP, #16] 0x3418B41C: 6B00 LDR R0, [R0, #48] 0x3418B41E: 2817 CMP R0, #23 0x3418B420: D01F BEQ 46L27 ; 0x3418B462 0x3418B422: 9804 LDR R0, [SP, #16] 0x3418B424: 6B00 LDR R0, [R0, #48] 0x3418B426: 2818 CMP R0, #24 0x3418B428: D01B BEQ 46L27 ; 0x3418B462 0x3418B42A: 9804 LDR R0, [SP, #16] 0x3418B42C: 6B00 LDR R0, [R0, #48] 0x3418B42E: 2819 CMP R0, #25 0x3418B430: D017 BEQ 46L27 ; 0x3418B462 0x3418B432: 9804 LDR R0, [SP, #16] 0x3418B434: 6B00 LDR R0, [R0, #48] 0x3418B436: 281A CMP R0, #26 0x3418B438: D013 BEQ 46L27 ; 0x3418B462 0x3418B43A: 9804 LDR R0, [SP, #16] 0x3418B43C: 6B00 LDR R0, [R0, #48] 0x3418B43E: 281B CMP R0, #27 0x3418B440: D00F BEQ 46L27 ; 0x3418B462 0x3418B442: 9804 LDR R0, [SP, #16] 0x3418B444: 6B00 LDR R0, [R0, #48] 0x3418B446: 281C CMP R0, #28 0x3418B448: D00B BEQ 46L27 ; 0x3418B462 0x3418B44A: 9804 LDR R0, [SP, #16] 0x3418B44C: 6B00 LDR R0, [R0, #48] 0x3418B44E: 281D CMP R0, #29 0x3418B450: D007 BEQ 46L27 ; 0x3418B462 0x3418B452: 9804 LDR R0, [SP, #16] 0x3418B454: 6B00 LDR R0, [R0, #48] 0x3418B456: 281E CMP R0, #30 0x3418B458: D003 BEQ 46L27 ; 0x3418B462 0x3418B45A: 9804 LDR R0, [SP, #16] 0x3418B45C: 6B00 LDR R0, [R0, #48] 0x3418B45E: 281F CMP R0, #31 0x3418B460: D100 BNE 46L28 ; 0x3418B464
.L27: 0x3418B462: E007 B 46L29 ; 0x3418B474
.L28: 0x3418B464: F244 204E MOVW R0, #0x424E ; 0x3419424E = .rodata..L.str.98 0x3418B468: F2C3 4019 MOVT R0, #0x3419 ; 0x3419424E = .rodata..L.str.98 0x3418B46C: F240 116D MOVW R1, #0x016D 0x3418B470: F002 FC12 BL assert_failed ; 0x3418DC98
.L29: 0x3418B474: 9804 LDR R0, [SP, #16] 0x3418B476: 6840 LDR R0, [R0, #4] 0x3418B478: B120 CBZ R0, .L30 ; 0x3418B484 0x3418B47A: 9804 LDR R0, [SP, #16] 0x3418B47C: 6840 LDR R0, [R0, #4] 0x3418B47E: 2840 CMP R0, #64 0x3418B480: D800 BHI 46L30 ; 0x3418B484 0x3418B482: E007 B 46L31 ; 0x3418B494
.L30: 0x3418B484: F244 204E MOVW R0, #0x424E ; 0x3419424E = .rodata..L.str.98 0x3418B488: F2C3 4019 MOVT R0, #0x3419 ; 0x3419424E = .rodata..L.str.98 0x3418B48C: F44F 71B7 MOV.W R1, #0x016E 0x3418B490: F002 FC02 BL assert_failed ; 0x3418DC98
.L31: 0x3418B494: 9804 LDR R0, [SP, #16] 0x3418B496: 6B40 LDR R0, [R0, #52] 0x3418B498: 28FF CMP R0, #255 0x3418B49A: D800 BHI 46L32 ; 0x3418B49E 0x3418B49C: E007 B 46L33 ; 0x3418B4AE
.L32: 0x3418B49E: F244 204E MOVW R0, #0x424E ; 0x3419424E = .rodata..L.str.98 0x3418B4A2: F2C3 4019 MOVT R0, #0x3419 ; 0x3419424E = .rodata..L.str.98 0x3418B4A6: F240 116F MOVW R1, #0x016F 0x3418B4AA: F002 FBF5 BL assert_failed ; 0x3418DC98
.L33: 0x3418B4AE: 9804 LDR R0, [SP, #16] 0x3418B4B0: 6BC0 LDR R0, [R0, #60] 0x3418B4B2: B120 CBZ R0, .L34 ; 0x3418B4BE 0x3418B4B4: 9804 LDR R0, [SP, #16] 0x3418B4B6: 6BC0 LDR R0, [R0, #60] 0x3418B4B8: F1B0 7F80 CMP.W R0, #0x01000000 0x3418B4BC: D100 BNE 46L35 ; 0x3418B4C0
.L34: 0x3418B4BE: E007 B 46L36 ; 0x3418B4D0
.L35: 0x3418B4C0: F244 204E MOVW R0, #0x424E ; 0x3419424E = .rodata..L.str.98 0x3418B4C4: F2C3 4019 MOVT R0, #0x3419 ; 0x3419424E = .rodata..L.str.98 0x3418B4C8: F44F 71B8 MOV.W R1, #0x0170 0x3418B4CC: F002 FBE4 BL assert_failed ; 0x3418DC98
.L36: 0x3418B4D0: 9804 LDR R0, [SP, #16] 0x3418B4D2: 6C00 LDR R0, [R0, #64] 0x3418B4D4: B120 CBZ R0, .L37 ; 0x3418B4E0 0x3418B4D6: 9804 LDR R0, [SP, #16] 0x3418B4D8: 6C00 LDR R0, [R0, #64] 0x3418B4DA: F5B0 1F00 CMP.W R0, #0x200000 0x3418B4DE: D100 BNE 46L38 ; 0x3418B4E2
.L37: 0x3418B4E0: E007 B 46L39 ; 0x3418B4F2
.L38: 0x3418B4E2: F244 204E MOVW R0, #0x424E ; 0x3419424E = .rodata..L.str.98 0x3418B4E6: F2C3 4019 MOVT R0, #0x3419 ; 0x3419424E = .rodata..L.str.98 0x3418B4EA: F240 1171 MOVW R1, #0x0171 0x3418B4EE: F002 FBD3 BL assert_failed ; 0x3418DC98
.L39: 0x3418B4F2: 9904 LDR R1, [SP, #16] 0x3418B4F4: 2000 MOVS R0, #0 0x3418B4F6: 65C8 STR R0, [R1, #92] 0x3418B4F8: 9804 LDR R0, [SP, #16] 0x3418B4FA: 6D80 LDR R0, [R0, #88] 0x3418B4FC: 2800 CMP R0, #0 0x3418B4FE: F040 80F3 BNE.W 46L45 ; 0x3418B6E8 0x3418B502: 9804 LDR R0, [SP, #16] 0x3418B504: F7F6 F9BC BL HAL_XSPI_MspInit ; 0x34181880 0x3418B508: 9804 LDR R0, [SP, #16] 0x3418B50A: F241 3188 MOVW R1, #0x1388 0x3418B50E: F006 FBAB BL HAL_XSPI_SetTimeout ; 0x34191C68 0x3418B512: 9804 LDR R0, [SP, #16] 0x3418B514: 6800 LDR R0, [R0] 0x3418B516: 6880 LDR R0, [R0, #8] 0x3418B518: F24C 01FC MOVW R1, #0xC0FC 0x3418B51C: F6CF 01E0 MOVT R1, #0xF8E0 0x3418B520: 4008 ANDS R0, R1 0x3418B522: 9B04 LDR R3, [SP, #16] 0x3418B524: 6819 LDR R1, [R3] 0x3418B526: 68DA LDR R2, [R3, #12] 0x3418B528: F8D3 C010 LDR.W R12, [R3, #16] 0x3418B52C: F8D3 E014 LDR.W LR, [R3, #20] 0x3418B530: EA42 420C ORR.W R2, R2, R12, LSL #16 0x3418B534: F06F 0CFF MVN R12, #255 0x3418B538: EB0C 2C0E ADD.W R12, R12, LR, LSL #8 0x3418B53C: EA42 020C ORR.W R2, R2, R12 0x3418B540: 69DB LDR R3, [R3, #28] 0x3418B542: 431A ORRS R2, R3 0x3418B544: 4310 ORRS R0, R2 0x3418B546: 6088 STR R0, [R1, #8] 0x3418B548: 9804 LDR R0, [SP, #16] 0x3418B54A: 6C00 LDR R0, [R0, #64] 0x3418B54C: F5B0 1F00 CMP.W R0, #0x200000 0x3418B550: D105 BNE 46L40 ; 0x3418B55E 0x3418B552: 9804 LDR R0, [SP, #16] 0x3418B554: 6801 LDR R1, [R0] 0x3418B556: 6888 LDR R0, [R1, #8] 0x3418B558: F440 1000 ORR R0, R0, #0x200000 0x3418B55C: 6088 STR R0, [R1, #8]
.L40: 0x3418B55E: 9804 LDR R0, [SP, #16] 0x3418B560: 6800 LDR R0, [R0] 0x3418B562: 68C0 LDR R0, [R0, #12] 0x3418B564: F420 20E0 BIC R0, R0, #0x070000 0x3418B568: 9A04 LDR R2, [SP, #16] 0x3418B56A: 6811 LDR R1, [R2] 0x3418B56C: 6A12 LDR R2, [R2, #32] 0x3418B56E: 4310 ORRS R0, R2 0x3418B570: 60C8 STR R0, [R1, #12] 0x3418B572: 9804 LDR R0, [SP, #16] 0x3418B574: 6800 LDR R0, [R0] 0x3418B576: 6900 LDR R0, [R0, #16] 0x3418B578: F420 10F8 BIC R0, R0, #0x1F0000 0x3418B57C: 9A04 LDR R2, [SP, #16] 0x3418B57E: 6811 LDR R1, [R2] 0x3418B580: 6B12 LDR R2, [R2, #48] 0x3418B582: EA40 4002 ORR.W R0, R0, R2, LSL #16 0x3418B586: 6108 STR R0, [R1, #16] 0x3418B588: 9804 LDR R0, [SP, #16] 0x3418B58A: 6800 LDR R0, [R0] 0x3418B58C: 6900 LDR R0, [R0, #16] 0x3418B58E: F020 00FF BIC R0, R0, #255 0x3418B592: 9A04 LDR R2, [SP, #16] 0x3418B594: 6811 LDR R1, [R2] 0x3418B596: 6B52 LDR R2, [R2, #52] 0x3418B598: 4310 ORRS R0, R2 0x3418B59A: 6108 STR R0, [R1, #16] 0x3418B59C: 9804 LDR R0, [SP, #16] 0x3418B59E: 6801 LDR R1, [R0] 0x3418B5A0: 6B80 LDR R0, [R0, #56] 0x3418B5A2: 6148 STR R0, [R1, #20] 0x3418B5A4: 9804 LDR R0, [SP, #16] 0x3418B5A6: 6800 LDR R0, [R0] 0x3418B5A8: 6800 LDR R0, [R0] 0x3418B5AA: F420 507C BIC R0, R0, #0x3F00 0x3418B5AE: 9A04 LDR R2, [SP, #16] 0x3418B5B0: 6811 LDR R1, [R2] 0x3418B5B2: 6853 LDR R3, [R2, #4] 0x3418B5B4: F06F 02FF MVN R2, #255 0x3418B5B8: EB02 2203 ADD.W R2, R2, R3, LSL #8 0x3418B5BC: 4310 ORRS R0, R2 0x3418B5BE: 6008 STR R0, [R1] 0x3418B5C0: 9804 LDR R0, [SP, #16] 0x3418B5C2: 9B02 LDR R3, [SP, #8] 0x3418B5C4: 6E01 LDR R1, [R0, #96] 0x3418B5C6: 466A MOV R2, SP 0x3418B5C8: 6011 STR R1, [R2] 0x3418B5CA: 2120 MOVS R1, #32 0x3418B5CC: 2200 MOVS R2, #0 0x3418B5CE: F000 F893 BL XSPI_WaitFlagStateUntilTimeout ; 0x3418B6F8 0x3418B5D2: F88D 000F STRB.W R0, [SP, #15] 0x3418B5D6: F89D 000F LDRB.W R0, [SP, #15] 0x3418B5DA: 2800 CMP R0, #0 0x3418B5DC: F040 8084 BNE.W 46L45 ; 0x3418B6E8 0x3418B5E0: 9804 LDR R0, [SP, #16] 0x3418B5E2: 6800 LDR R0, [R0] 0x3418B5E4: 68C0 LDR R0, [R0, #12] 0x3418B5E6: F020 00FF BIC R0, R0, #255 0x3418B5EA: 9A04 LDR R2, [SP, #16] 0x3418B5EC: 6811 LDR R1, [R2] 0x3418B5EE: 6A52 LDR R2, [R2, #36] 0x3418B5F0: 4310 ORRS R0, R2 0x3418B5F2: 60C8 STR R0, [R1, #12] 0x3418B5F4: 9804 LDR R0, [SP, #16] 0x3418B5F6: 6800 LDR R0, [R0] 0x3418B5F8: F245 0100 MOVW R1, #0x5000 0x3418B5FC: F6C5 0102 MOVT R1, #0x5802 0x3418B600: 4288 CMP R0, R1 0x3418B602: D027 BEQ 46L41 ; 0x3418B654 0x3418B604: 9804 LDR R0, [SP, #16] 0x3418B606: 6800 LDR R0, [R0] 0x3418B608: F245 0100 MOVW R1, #0x5000 0x3418B60C: F6C4 0102 MOVT R1, #0x4802 0x3418B610: 4288 CMP R0, R1 0x3418B612: D01F BEQ 46L41 ; 0x3418B654 0x3418B614: 9804 LDR R0, [SP, #16] 0x3418B616: 6800 LDR R0, [R0] 0x3418B618: F24A 0100 MOVW R1, #0xA000 0x3418B61C: F6C5 0102 MOVT R1, #0x5802 0x3418B620: 4288 CMP R0, R1 0x3418B622: D017 BEQ 46L41 ; 0x3418B654 0x3418B624: 9804 LDR R0, [SP, #16] 0x3418B626: 6800 LDR R0, [R0] 0x3418B628: F24A 0100 MOVW R1, #0xA000 0x3418B62C: F6C4 0102 MOVT R1, #0x4802 0x3418B630: 4288 CMP R0, R1 0x3418B632: D00F BEQ 46L41 ; 0x3418B654 0x3418B634: 9804 LDR R0, [SP, #16] 0x3418B636: 6800 LDR R0, [R0] 0x3418B638: F24D 0100 MOVW R1, #0xD000 0x3418B63C: F6C5 0102 MOVT R1, #0x5802 0x3418B640: 4288 CMP R0, R1 0x3418B642: D007 BEQ 46L41 ; 0x3418B654 0x3418B644: 9804 LDR R0, [SP, #16] 0x3418B646: 6800 LDR R0, [R0] 0x3418B648: F24D 0100 MOVW R1, #0xD000 0x3418B64C: F6C4 0102 MOVT R1, #0x4802 0x3418B650: 4288 CMP R0, R1 0x3418B652: D112 BNE 46L42 ; 0x3418B67A
.L41: 0x3418B654: 9804 LDR R0, [SP, #16] 0x3418B656: 9B02 LDR R3, [SP, #8] 0x3418B658: 6E01 LDR R1, [R0, #96] 0x3418B65A: 466A MOV R2, SP 0x3418B65C: 6011 STR R1, [R2] 0x3418B65E: 2120 MOVS R1, #32 0x3418B660: 2200 MOVS R2, #0 0x3418B662: F000 F849 BL XSPI_WaitFlagStateUntilTimeout ; 0x3418B6F8 0x3418B666: F88D 000F STRB.W R0, [SP, #15] 0x3418B66A: F89D 000F LDRB.W R0, [SP, #15] 0x3418B66E: B120 CBZ R0, .L42 ; 0x3418B67A 0x3418B670: F89D 000F LDRB.W R0, [SP, #15] 0x3418B674: F88D 0017 STRB.W R0, [SP, #23] 0x3418B678: E03A B 46L46 ; 0x3418B6F0
.L42: 0x3418B67A: 9804 LDR R0, [SP, #16] 0x3418B67C: 6800 LDR R0, [R0] 0x3418B67E: 6800 LDR R0, [R0] 0x3418B680: F64F 71BF MOVW R1, #0xFFBF 0x3418B684: F6CF 61FF MOVT R1, #0xFEFF 0x3418B688: 4008 ANDS R0, R1 0x3418B68A: 9B04 LDR R3, [SP, #16] 0x3418B68C: 6819 LDR R1, [R3] 0x3418B68E: 689A LDR R2, [R3, #8] 0x3418B690: 6BDB LDR R3, [R3, #60] 0x3418B692: 431A ORRS R2, R3 0x3418B694: 4310 ORRS R0, R2 0x3418B696: 6008 STR R0, [R1] 0x3418B698: 9804 LDR R0, [SP, #16] 0x3418B69A: 6800 LDR R0, [R0] 0x3418B69C: F8D0 0108 LDR.W R0, [R0, #0x0108] 0x3418B6A0: F020 4080 BIC R0, R0, #0x40000000 0x3418B6A4: 9A04 LDR R2, [SP, #16] 0x3418B6A6: 6811 LDR R1, [R2] 0x3418B6A8: 6A92 LDR R2, [R2, #40] 0x3418B6AA: 4310 ORRS R0, R2 0x3418B6AC: F8C1 0108 STR.W R0, [R1, #0x0108] 0x3418B6B0: 9804 LDR R0, [SP, #16] 0x3418B6B2: 6801 LDR R1, [R0] 0x3418B6B4: 6808 LDR R0, [R1] 0x3418B6B6: F040 0001 ORR R0, R0, #1 0x3418B6BA: 6008 STR R0, [R1] 0x3418B6BC: 9804 LDR R0, [SP, #16] 0x3418B6BE: 6980 LDR R0, [R0, #24] 0x3418B6C0: 2802 CMP R0, #2 0x3418B6C2: D105 BNE 46L43 ; 0x3418B6D0 0x3418B6C4: 9804 LDR R0, [SP, #16] 0x3418B6C6: 6801 LDR R1, [R0] 0x3418B6C8: 6888 LDR R0, [R1, #8] 0x3418B6CA: F040 0002 ORR R0, R0, #2 0x3418B6CE: 6088 STR R0, [R1, #8]
.L43: 0x3418B6D0: 9804 LDR R0, [SP, #16] 0x3418B6D2: 68C0 LDR R0, [R0, #12] 0x3418B6D4: F1B0 6F80 CMP.W R0, #0x04000000 0x3418B6D8: D103 BNE 46L44 ; 0x3418B6E2 0x3418B6DA: 9904 LDR R1, [SP, #16] 0x3418B6DC: 2001 MOVS R0, #1 0x3418B6DE: 6588 STR R0, [R1, #88] 0x3418B6E0: E002 B 46L45 ; 0x3418B6E8
.L44: 0x3418B6E2: 9904 LDR R1, [SP, #16] 0x3418B6E4: 2002 MOVS R0, #2 0x3418B6E6: 6588 STR R0, [R1, #88]
.L45: 0x3418B6E8: F89D 000F LDRB.W R0, [SP, #15] 0x3418B6EC: F88D 0017 STRB.W R0, [SP, #23]
.L46: 0x3418B6F0: F89D 0017 LDRB.W R0, [SP, #23] 0x3418B6F4: B006 ADD SP, SP, #24 0x3418B6F6: BD80 POP 123R7, PC}

Section .text.XSPI_WaitFlagStateUntilTimeout from blto2_FSBL_lto.o, size=104, align=4


XSPI_WaitFlagStateUntilTimeout: 0x3418B6F8: B580 PUSH 123R7, LR} 0x3418B6FA: B086 SUB SP, SP, #24 0x3418B6FC: F8DD C020 LDR.W R12, [SP, #32] 0x3418B700: 9004 STR R0, [SP, #16] 0x3418B702: 9103 STR R1, [SP, #12] 0x3418B704: F88D 200B STRB.W R2, [SP, #11] 0x3418B708: 9301 STR R3, [SP, #4]
.L1: 0x3418B70A: 9804 LDR R0, [SP, #16] 0x3418B70C: 6800 LDR R0, [R0] 0x3418B70E: 6A00 LDR R0, [R0, #32] 0x3418B710: 9903 LDR R1, [SP, #12] 0x3418B712: 4208 TST R0, R1 0x3418B714: EA5F 900F CSET R0, NE 0x3418B718: F89D 100B LDRB.W R1, [SP, #11] 0x3418B71C: 4288 CMP R0, R1 0x3418B71E: D018 BEQ 46L4 ; 0x3418B752 0x3418B720: 9808 LDR R0, [SP, #32] 0x3418B722: 3001 ADDS R0, #1 0x3418B724: B1A0 CBZ R0, .L3 ; 0x3418B750 0x3418B726: F7F6 F965 BL HAL_GetTick ; 0x341819F4 0x3418B72A: 9901 LDR R1, [SP, #4] 0x3418B72C: 1A40 SUBS R0, R0, R1 0x3418B72E: 9908 LDR R1, [SP, #32] 0x3418B730: 4288 CMP R0, R1 0x3418B732: D801 BHI 46L2 ; 0x3418B738 0x3418B734: 9808 LDR R0, [SP, #32] 0x3418B736: B958 CBNZ R0, .L3 ; 0x3418B750
.L2: 0x3418B738: 9904 LDR R1, [SP, #16] 0x3418B73A: 2002 MOVS R0, #2 0x3418B73C: 6588 STR R0, [R1, #88] 0x3418B73E: 9904 LDR R1, [SP, #16] 0x3418B740: 6DC8 LDR R0, [R1, #92] 0x3418B742: F040 0001 ORR R0, R0, #1 0x3418B746: 65C8 STR R0, [R1, #92] 0x3418B748: 2003 MOVS R0, #3 0x3418B74A: F88D 0017 STRB.W R0, [SP, #23] 0x3418B74E: E003 B 46L5 ; 0x3418B758
.L3: 0x3418B750: E7DB B 46L1 ; 0x3418B70A
.L4: 0x3418B752: 2000 MOVS R0, #0 0x3418B754: F88D 0017 STRB.W R0, [SP, #23]
.L5: 0x3418B758: F89D 0017 LDRB.W R0, [SP, #23] 0x3418B75C: B006 ADD SP, SP, #24 0x3418B75E: BD80 POP 123R7, PC}

Section .text.XSPI_ConfigCmd from blto2_FSBL_lto.o, size=924, align=4


XSPI_ConfigCmd: 0x3418B760: B580 PUSH 123R7, LR} 0x3418B762: B088 SUB SP, SP, #32 0x3418B764: 9007 STR R0, [SP, #28] 0x3418B766: 9106 STR R1, [SP, #24] 0x3418B768: 2000 MOVS R0, #0 0x3418B76A: F88D 0017 STRB.W R0, [SP, #23] 0x3418B76E: 9807 LDR R0, [SP, #28] 0x3418B770: 6800 LDR R0, [R0] 0x3418B772: 6800 LDR R0, [R0] 0x3418B774: F020 5040 BIC R0, R0, #0x30000000 0x3418B778: 9907 LDR R1, [SP, #28] 0x3418B77A: 6809 LDR R1, [R1] 0x3418B77C: 6008 STR R0, [R1] 0x3418B77E: 9807 LDR R0, [SP, #28] 0x3418B780: 6880 LDR R0, [R0, #8] 0x3418B782: BB68 CBNZ R0, .L4 ; 0x3418B7E0 0x3418B784: 9806 LDR R0, [SP, #24] 0x3418B786: 6840 LDR R0, [R0, #4] 0x3418B788: B1B0 CBZ R0, .L1 ; 0x3418B7B8 0x3418B78A: 9806 LDR R0, [SP, #24] 0x3418B78C: 6840 LDR R0, [R0, #4] 0x3418B78E: F1B0 4F80 CMP.W R0, #0x40000000 0x3418B792: D011 BEQ 46L1 ; 0x3418B7B8 0x3418B794: 9806 LDR R0, [SP, #24] 0x3418B796: 6840 LDR R0, [R0, #4] 0x3418B798: F1B0 4F00 CMP.W R0, #0x80000000 0x3418B79C: D00C BEQ 46L1 ; 0x3418B7B8 0x3418B79E: 9806 LDR R0, [SP, #24] 0x3418B7A0: 6840 LDR R0, [R0, #4] 0x3418B7A2: F1B0 4F40 CMP.W R0, #0xC0000000 0x3418B7A6: D007 BEQ 46L1 ; 0x3418B7B8 0x3418B7A8: 9806 LDR R0, [SP, #24] 0x3418B7AA: 6840 LDR R0, [R0, #4] 0x3418B7AC: B120 CBZ R0, .L1 ; 0x3418B7B8 0x3418B7AE: 9806 LDR R0, [SP, #24] 0x3418B7B0: 6840 LDR R0, [R0, #4] 0x3418B7B2: F1B0 4F00 CMP.W R0, #0x80000000 0x3418B7B6: D100 BNE 46L2 ; 0x3418B7BA
.L1: 0x3418B7B8: E007 B 46L3 ; 0x3418B7CA
.L2: 0x3418B7BA: F244 204E MOVW R0, #0x424E ; 0x3419424E = .rodata..L.str.98 0x3418B7BE: F2C3 4019 MOVT R0, #0x3419 ; 0x3419424E = .rodata..L.str.98 0x3418B7C2: F640 5102 MOVW R1, #0x0D02 0x3418B7C6: F002 FA67 BL assert_failed ; 0x3418DC98
.L3: 0x3418B7CA: 9807 LDR R0, [SP, #28] 0x3418B7CC: 6800 LDR R0, [R0] 0x3418B7CE: 6800 LDR R0, [R0] 0x3418B7D0: F020 4040 BIC R0, R0, #0xC0000000 0x3418B7D4: 9906 LDR R1, [SP, #24] 0x3418B7D6: 6849 LDR R1, [R1, #4] 0x3418B7D8: 4308 ORRS R0, R1 0x3418B7DA: 9907 LDR R1, [SP, #28] 0x3418B7DC: 6809 LDR R1, [R1] 0x3418B7DE: 6008 STR R0, [R1]
.L4: 0x3418B7E0: 9806 LDR R0, [SP, #24] 0x3418B7E2: 6800 LDR R0, [R0] 0x3418B7E4: 2802 CMP R0, #2 0x3418B7E6: D114 BNE 46L5 ; 0x3418B812 0x3418B7E8: 9807 LDR R0, [SP, #28] 0x3418B7EA: 6800 LDR R0, [R0] 0x3418B7EC: F500 70C0 ADD.W R0, R0, #0x0180 0x3418B7F0: 9004 STR R0, [SP, #16] 0x3418B7F2: 9807 LDR R0, [SP, #28] 0x3418B7F4: 6800 LDR R0, [R0] 0x3418B7F6: F500 70C4 ADD.W R0, R0, #0x0188 0x3418B7FA: 9003 STR R0, [SP, #12] 0x3418B7FC: 9807 LDR R0, [SP, #28] 0x3418B7FE: 6800 LDR R0, [R0] 0x3418B800: F500 70C8 ADD.W R0, R0, #0x0190 0x3418B804: 9002 STR R0, [SP, #8] 0x3418B806: 9807 LDR R0, [SP, #28] 0x3418B808: 6800 LDR R0, [R0] 0x3418B80A: F500 70D0 ADD.W R0, R0, #0x01A0 0x3418B80E: 9001 STR R0, [SP, #4] 0x3418B810: E02C B 46L7 ; 0x3418B86C
.L5: 0x3418B812: 9806 LDR R0, [SP, #24] 0x3418B814: 6800 LDR R0, [R0] 0x3418B816: 2803 CMP R0, #3 0x3418B818: D114 BNE 46L6 ; 0x3418B844 0x3418B81A: 9807 LDR R0, [SP, #28] 0x3418B81C: 6800 LDR R0, [R0] 0x3418B81E: F500 70A0 ADD.W R0, R0, #0x0140 0x3418B822: 9004 STR R0, [SP, #16] 0x3418B824: 9807 LDR R0, [SP, #28] 0x3418B826: 6800 LDR R0, [R0] 0x3418B828: F500 70A4 ADD.W R0, R0, #0x0148 0x3418B82C: 9003 STR R0, [SP, #12] 0x3418B82E: 9807 LDR R0, [SP, #28] 0x3418B830: 6800 LDR R0, [R0] 0x3418B832: F500 70A8 ADD.W R0, R0, #0x0150 0x3418B836: 9002 STR R0, [SP, #8] 0x3418B838: 9807 LDR R0, [SP, #28] 0x3418B83A: 6800 LDR R0, [R0] 0x3418B83C: F500 70B0 ADD.W R0, R0, #0x0160 0x3418B840: 9001 STR R0, [SP, #4] 0x3418B842: E013 B 46L7 ; 0x3418B86C
.L6: 0x3418B844: 9807 LDR R0, [SP, #28] 0x3418B846: 6800 LDR R0, [R0] 0x3418B848: F500 7080 ADD.W R0, R0, #0x0100 0x3418B84C: 9004 STR R0, [SP, #16] 0x3418B84E: 9807 LDR R0, [SP, #28] 0x3418B850: 6800 LDR R0, [R0] 0x3418B852: F500 7084 ADD.W R0, R0, #0x0108 0x3418B856: 9003 STR R0, [SP, #12] 0x3418B858: 9807 LDR R0, [SP, #28] 0x3418B85A: 6800 LDR R0, [R0] 0x3418B85C: F500 7088 ADD.W R0, R0, #0x0110 0x3418B860: 9002 STR R0, [SP, #8] 0x3418B862: 9807 LDR R0, [SP, #28] 0x3418B864: 6800 LDR R0, [R0] 0x3418B866: F500 7090 ADD.W R0, R0, #0x0120 0x3418B86A: 9001 STR R0, [SP, #4]
.L7: 0x3418B86C: 9806 LDR R0, [SP, #24] 0x3418B86E: 6C80 LDR R0, [R0, #72] 0x3418B870: 9904 LDR R1, [SP, #16] 0x3418B872: 6008 STR R0, [R1] 0x3418B874: 9806 LDR R0, [SP, #24] 0x3418B876: 6AC0 LDR R0, [R0, #44] 0x3418B878: B180 CBZ R0, .L8 ; 0x3418B89C 0x3418B87A: 9806 LDR R0, [SP, #24] 0x3418B87C: 6A80 LDR R0, [R0, #40] 0x3418B87E: 9901 LDR R1, [SP, #4] 0x3418B880: 6008 STR R0, [R1] 0x3418B882: 9804 LDR R0, [SP, #16] 0x3418B884: 6800 LDR R0, [R0] 0x3418B886: F420 107C BIC R0, R0, #0x3F0000 0x3418B88A: 9B06 LDR R3, [SP, #24] 0x3418B88C: 6AD9 LDR R1, [R3, #44] 0x3418B88E: 6B1A LDR R2, [R3, #48] 0x3418B890: 6B5B LDR R3, [R3, #52] 0x3418B892: 4319 ORRS R1, R3 0x3418B894: 4311 ORRS R1, R2 0x3418B896: 4308 ORRS R0, R1 0x3418B898: 9904 LDR R1, [SP, #16] 0x3418B89A: 6008 STR R0, [R1]
.L8: 0x3418B89C: 9803 LDR R0, [SP, #12] 0x3418B89E: 6800 LDR R0, [R0] 0x3418B8A0: F020 001F BIC R0, R0, #31 0x3418B8A4: 9906 LDR R1, [SP, #24] 0x3418B8A6: 6C49 LDR R1, [R1, #68] 0x3418B8A8: 4308 ORRS R0, R1 0x3418B8AA: 9903 LDR R1, [SP, #12] 0x3418B8AC: 6008 STR R0, [R1] 0x3418B8AE: 9806 LDR R0, [SP, #24] 0x3418B8B0: 6B80 LDR R0, [R0, #56] 0x3418B8B2: B140 CBZ R0, .L9 ; 0x3418B8C6 0x3418B8B4: 9806 LDR R0, [SP, #24] 0x3418B8B6: 6800 LDR R0, [R0] 0x3418B8B8: B928 CBNZ R0, .L9 ; 0x3418B8C6 0x3418B8BA: 9806 LDR R0, [SP, #24] 0x3418B8BC: 6BC0 LDR R0, [R0, #60] 0x3418B8BE: 3801 SUBS R0, #1 0x3418B8C0: 9907 LDR R1, [SP, #28] 0x3418B8C2: 6809 LDR R1, [R1] 0x3418B8C4: 6408 STR R0, [R1, #64]
.L9: 0x3418B8C6: 9806 LDR R0, [SP, #24] 0x3418B8C8: 6B80 LDR R0, [R0, #56] 0x3418B8CA: B1D8 CBZ R0, .L11 ; 0x3418B904 0x3418B8CC: 9806 LDR R0, [SP, #24] 0x3418B8CE: 6C00 LDR R0, [R0, #64] 0x3418B8D0: F1B0 6F00 CMP.W R0, #0x08000000 0x3418B8D4: D108 BNE 46L10 ; 0x3418B8E8 0x3418B8D6: 9807 LDR R0, [SP, #28] 0x3418B8D8: 6801 LDR R1, [R0] 0x3418B8DA: F8D1 0108 LDR.W R0, [R1, #0x0108] 0x3418B8DE: F020 4080 BIC R0, R0, #0x40000000 0x3418B8E2: F8C1 0108 STR.W R0, [R1, #0x0108] 0x3418B8E6: E00D B 46L11 ; 0x3418B904
.L10: 0x3418B8E8: 9807 LDR R0, [SP, #28] 0x3418B8EA: 6A80 LDR R0, [R0, #40] 0x3418B8EC: F1B0 4F80 CMP.W R0, #0x40000000 0x3418B8F0: D108 BNE 46L11 ; 0x3418B904 0x3418B8F2: 9807 LDR R0, [SP, #28] 0x3418B8F4: 6801 LDR R1, [R0] 0x3418B8F6: F8D1 0108 LDR.W R0, [R1, #0x0108] 0x3418B8FA: F040 4080 ORR R0, R0, #0x40000000 0x3418B8FE: F8C1 0108 STR.W R0, [R1, #0x0108] 0x3418B902: E7FF B 46L11 ; 0x3418B904
.L11: 0x3418B904: 9806 LDR R0, [SP, #24] 0x3418B906: 68C0 LDR R0, [R0, #12] 0x3418B908: 2800 CMP R0, #0 0x3418B90A: F000 808A BEQ.W 46L20 ; 0x3418BA22 0x3418B90E: 9806 LDR R0, [SP, #24] 0x3418B910: 69C0 LDR R0, [R0, #28] 0x3418B912: 2800 CMP R0, #0 0x3418B914: D057 BEQ 46L16 ; 0x3418B9C6 0x3418B916: 9806 LDR R0, [SP, #24] 0x3418B918: 6B80 LDR R0, [R0, #56] 0x3418B91A: B1F8 CBZ R0, .L12 ; 0x3418B95C 0x3418B91C: 9804 LDR R0, [SP, #16] 0x3418B91E: 6800 LDR R0, [R0] 0x3418B920: F24C 01C0 MOVW R1, #0xC0C0 0x3418B924: F2CF 01FF MOVT R1, #0xF0FF 0x3418B928: 4008 ANDS R0, R1 0x3418B92A: 9A06 LDR R2, [SP, #24] 0x3418B92C: 9200 STR R2, [SP, #0] 0x3418B92E: 68D1 LDR R1, [R2, #12] 0x3418B930: F8D2 C010 LDR.W R12, [R2, #16] 0x3418B934: F8D2 E014 LDR.W LR, [R2, #20] 0x3418B938: 69D3 LDR R3, [R2, #28] 0x3418B93A: EA41 010E ORR.W R1, R1, LR 0x3418B93E: EA41 010C ORR.W R1, R1, R12 0x3418B942: 4319 ORRS R1, R3 0x3418B944: 6A53 LDR R3, [R2, #36] 0x3418B946: 4319 ORRS R1, R3 0x3418B948: 6A13 LDR R3, [R2, #32] 0x3418B94A: 4319 ORRS R1, R3 0x3418B94C: 6B93 LDR R3, [R2, #56] 0x3418B94E: 4319 ORRS R1, R3 0x3418B950: 6C12 LDR R2, [R2, #64] 0x3418B952: 4311 ORRS R1, R2 0x3418B954: 4308 ORRS R0, R1 0x3418B956: 9904 LDR R1, [SP, #16] 0x3418B958: 6008 STR R0, [R1] 0x3418B95A: E017 B 46L13 ; 0x3418B98C
.L12: 0x3418B95C: 9804 LDR R0, [SP, #16] 0x3418B95E: 6800 LDR R0, [R0] 0x3418B960: F643 713F MOVW R1, #0x3F3F 0x3418B964: 4388 BICS R0, R1 0x3418B966: 9A06 LDR R2, [SP, #24] 0x3418B968: 68D1 LDR R1, [R2, #12] 0x3418B96A: F8D2 C010 LDR.W R12, [R2, #16] 0x3418B96E: F8D2 E014 LDR.W LR, [R2, #20] 0x3418B972: 69D3 LDR R3, [R2, #28] 0x3418B974: EA41 010E ORR.W R1, R1, LR 0x3418B978: EA41 010C ORR.W R1, R1, R12 0x3418B97C: 4319 ORRS R1, R3 0x3418B97E: 6A53 LDR R3, [R2, #36] 0x3418B980: 4319 ORRS R1, R3 0x3418B982: 6A12 LDR R2, [R2, #32] 0x3418B984: 4311 ORRS R1, R2 0x3418B986: 4308 ORRS R0, R1 0x3418B988: 9904 LDR R1, [SP, #16] 0x3418B98A: 6008 STR R0, [R1]
.L13: 0x3418B98C: 9806 LDR R0, [SP, #24] 0x3418B98E: 6880 LDR R0, [R0, #8] 0x3418B990: 9902 LDR R1, [SP, #8] 0x3418B992: 6008 STR R0, [R1] 0x3418B994: 9806 LDR R0, [SP, #24] 0x3418B996: 6980 LDR R0, [R0, #24] 0x3418B998: 9907 LDR R1, [SP, #28] 0x3418B99A: 6809 LDR R1, [R1] 0x3418B99C: 6488 STR R0, [R1, #72] 0x3418B99E: 9806 LDR R0, [SP, #24] 0x3418B9A0: 6800 LDR R0, [R0] 0x3418B9A2: B978 CBNZ R0, .L15 ; 0x3418B9C4 0x3418B9A4: 9807 LDR R0, [SP, #28] 0x3418B9A6: 6800 LDR R0, [R0] 0x3418B9A8: 6C80 LDR R0, [R0, #72] 0x3418B9AA: 9906 LDR R1, [SP, #24] 0x3418B9AC: 6989 LDR R1, [R1, #24] 0x3418B9AE: 4288 CMP R0, R1 0x3418B9B0: D100 BNE 46L14 ; 0x3418B9B4 0x3418B9B2: E007 B 46L15 ; 0x3418B9C4
.L14: 0x3418B9B4: F244 204E MOVW R0, #0x424E ; 0x3419424E = .rodata..L.str.98 0x3418B9B8: F2C3 4019 MOVT R0, #0x3419 ; 0x3419424E = .rodata..L.str.98 0x3418B9BC: F640 516B MOVW R1, #0x0D6B 0x3418B9C0: F002 F96A BL assert_failed ; 0x3418DC98
.L15: 0x3418B9C4: E02C B 46L19 ; 0x3418BA20
.L16: 0x3418B9C6: 9806 LDR R0, [SP, #24] 0x3418B9C8: 6B80 LDR R0, [R0, #56] 0x3418B9CA: B1C0 CBZ R0, .L17 ; 0x3418B9FE 0x3418B9CC: 9804 LDR R0, [SP, #16] 0x3418B9CE: 6800 LDR R0, [R0] 0x3418B9D0: F64F 71C0 MOVW R1, #0xFFC0 0x3418B9D4: F2CF 01FF MOVT R1, #0xF0FF 0x3418B9D8: 4008 ANDS R0, R1 0x3418B9DA: 9A06 LDR R2, [SP, #24] 0x3418B9DC: 68D1 LDR R1, [R2, #12] 0x3418B9DE: F8D2 C010 LDR.W R12, [R2, #16] 0x3418B9E2: F8D2 E014 LDR.W LR, [R2, #20] 0x3418B9E6: 6B93 LDR R3, [R2, #56] 0x3418B9E8: EA41 010E ORR.W R1, R1, LR 0x3418B9EC: EA41 010C ORR.W R1, R1, R12 0x3418B9F0: 4319 ORRS R1, R3 0x3418B9F2: 6C12 LDR R2, [R2, #64] 0x3418B9F4: 4311 ORRS R1, R2 0x3418B9F6: 4308 ORRS R0, R1 0x3418B9F8: 9904 LDR R1, [SP, #16] 0x3418B9FA: 6008 STR R0, [R1] 0x3418B9FC: E00C B 46L18 ; 0x3418BA18
.L17: 0x3418B9FE: 9804 LDR R0, [SP, #16] 0x3418BA00: 6800 LDR R0, [R0] 0x3418BA02: F020 003F BIC R0, R0, #63 0x3418BA06: 9B06 LDR R3, [SP, #24] 0x3418BA08: 68D9 LDR R1, [R3, #12] 0x3418BA0A: 691A LDR R2, [R3, #16] 0x3418BA0C: 695B LDR R3, [R3, #20] 0x3418BA0E: 4319 ORRS R1, R3 0x3418BA10: 4311 ORRS R1, R2 0x3418BA12: 4308 ORRS R0, R1 0x3418BA14: 9904 LDR R1, [SP, #16] 0x3418BA16: 6008 STR R0, [R1]
.L18: 0x3418BA18: 9806 LDR R0, [SP, #24] 0x3418BA1A: 6880 LDR R0, [R0, #8] 0x3418BA1C: 9902 LDR R1, [SP, #8] 0x3418BA1E: 6008 STR R0, [R1]
.L19: 0x3418BA20: E04B B 46L26 ; 0x3418BABA
.L20: 0x3418BA22: 9806 LDR R0, [SP, #24] 0x3418BA24: 69C0 LDR R0, [R0, #28] 0x3418BA26: 2800 CMP R0, #0 0x3418BA28: D041 BEQ 46L25 ; 0x3418BAAE 0x3418BA2A: 9806 LDR R0, [SP, #24] 0x3418BA2C: 6B80 LDR R0, [R0, #56] 0x3418BA2E: B1C0 CBZ R0, .L21 ; 0x3418BA62 0x3418BA30: 9804 LDR R0, [SP, #16] 0x3418BA32: 6800 LDR R0, [R0] 0x3418BA34: F24C 01FF MOVW R1, #0xC0FF 0x3418BA38: F2CF 01FF MOVT R1, #0xF0FF 0x3418BA3C: 4008 ANDS R0, R1 0x3418BA3E: 9A06 LDR R2, [SP, #24] 0x3418BA40: 69D1 LDR R1, [R2, #28] 0x3418BA42: F8D2 C020 LDR.W R12, [R2, #32] 0x3418BA46: F8D2 E024 LDR.W LR, [R2, #36] 0x3418BA4A: 6B93 LDR R3, [R2, #56] 0x3418BA4C: EA41 010E ORR.W R1, R1, LR 0x3418BA50: EA41 010C ORR.W R1, R1, R12 0x3418BA54: 4319 ORRS R1, R3 0x3418BA56: 6C12 LDR R2, [R2, #64] 0x3418BA58: 4311 ORRS R1, R2 0x3418BA5A: 4308 ORRS R0, R1 0x3418BA5C: 9904 LDR R1, [SP, #16] 0x3418BA5E: 6008 STR R0, [R1] 0x3418BA60: E00C B 46L22 ; 0x3418BA7C
.L21: 0x3418BA62: 9804 LDR R0, [SP, #16] 0x3418BA64: 6800 LDR R0, [R0] 0x3418BA66: F420 507C BIC R0, R0, #0x3F00 0x3418BA6A: 9B06 LDR R3, [SP, #24] 0x3418BA6C: 69D9 LDR R1, [R3, #28] 0x3418BA6E: 6A1A LDR R2, [R3, #32] 0x3418BA70: 6A5B LDR R3, [R3, #36] 0x3418BA72: 4319 ORRS R1, R3 0x3418BA74: 4311 ORRS R1, R2 0x3418BA76: 4308 ORRS R0, R1 0x3418BA78: 9904 LDR R1, [SP, #16] 0x3418BA7A: 6008 STR R0, [R1]
.L22: 0x3418BA7C: 9806 LDR R0, [SP, #24] 0x3418BA7E: 6980 LDR R0, [R0, #24] 0x3418BA80: 9907 LDR R1, [SP, #28] 0x3418BA82: 6809 LDR R1, [R1] 0x3418BA84: 6488 STR R0, [R1, #72] 0x3418BA86: 9806 LDR R0, [SP, #24] 0x3418BA88: 6800 LDR R0, [R0] 0x3418BA8A: B978 CBNZ R0, .L24 ; 0x3418BAAC 0x3418BA8C: 9807 LDR R0, [SP, #28] 0x3418BA8E: 6800 LDR R0, [R0] 0x3418BA90: 6C80 LDR R0, [R0, #72] 0x3418BA92: 9906 LDR R1, [SP, #24] 0x3418BA94: 6989 LDR R1, [R1, #24] 0x3418BA96: 4288 CMP R0, R1 0x3418BA98: D100 BNE 46L23 ; 0x3418BA9C 0x3418BA9A: E007 B 46L24 ; 0x3418BAAC
.L23: 0x3418BA9C: F244 204E MOVW R0, #0x424E ; 0x3419424E = .rodata..L.str.98 0x3418BAA0: F2C3 4019 MOVT R0, #0x3419 ; 0x3419424E = .rodata..L.str.98 0x3418BAA4: F640 51A5 MOVW R1, #0x0DA5 0x3418BAA8: F002 F8F6 BL assert_failed ; 0x3418DC98
.L24: 0x3418BAAC: E005 B 46L26 ; 0x3418BABA
.L25: 0x3418BAAE: 2001 MOVS R0, #1 0x3418BAB0: F88D 0017 STRB.W R0, [SP, #23] 0x3418BAB4: 9907 LDR R1, [SP, #28] 0x3418BAB6: 2008 MOVS R0, #8 0x3418BAB8: 65C8 STR R0, [R1, #92]
.L26: 0x3418BABA: 9806 LDR R0, [SP, #24] 0x3418BABC: 6B80 LDR R0, [R0, #56] 0x3418BABE: B1C8 CBZ R0, .L28 ; 0x3418BAF4 0x3418BAC0: 9806 LDR R0, [SP, #24] 0x3418BAC2: 6800 LDR R0, [R0] 0x3418BAC4: B9B0 CBNZ R0, .L28 ; 0x3418BAF4 0x3418BAC6: 9806 LDR R0, [SP, #24] 0x3418BAC8: 6BC0 LDR R0, [R0, #60] 0x3418BACA: 3801 SUBS R0, #1 0x3418BACC: 9907 LDR R1, [SP, #28] 0x3418BACE: 6809 LDR R1, [R1] 0x3418BAD0: 6408 STR R0, [R1, #64] 0x3418BAD2: 9807 LDR R0, [SP, #28] 0x3418BAD4: 6800 LDR R0, [R0] 0x3418BAD6: 6C00 LDR R0, [R0, #64] 0x3418BAD8: 9906 LDR R1, [SP, #24] 0x3418BADA: 6BC9 LDR R1, [R1, #60] 0x3418BADC: 3901 SUBS R1, #1 0x3418BADE: 4288 CMP R0, R1 0x3418BAE0: D100 BNE 46L27 ; 0x3418BAE4 0x3418BAE2: E007 B 46L28 ; 0x3418BAF4
.L27: 0x3418BAE4: F244 204E MOVW R0, #0x424E ; 0x3419424E = .rodata..L.str.98 0x3418BAE8: F2C3 4019 MOVT R0, #0x3419 ; 0x3419424E = .rodata..L.str.98 0x3418BAEC: F640 51B8 MOVW R1, #0x0DB8 0x3418BAF0: F002 F8D2 BL assert_failed ; 0x3418DC98
.L28: 0x3418BAF4: F89D 0017 LDRB.W R0, [SP, #23] 0x3418BAF8: B008 ADD SP, SP, #32 0x3418BAFA: BD80 POP 123R7, PC}

Section .text.HAL_XSPI_Receive from blto2_FSBL_lto.o, size=300, align=4


HAL_XSPI_Receive: 0x3418BAFC: B580 PUSH 123R7, LR} 0x3418BAFE: B08A SUB SP, SP, #40 0x3418BB00: 9009 STR R0, [SP, #36] 0x3418BB02: 9108 STR R1, [SP, #32] 0x3418BB04: 9207 STR R2, [SP, #28] 0x3418BB06: F7F5 FF75 BL HAL_GetTick ; 0x341819F4 0x3418BB0A: 9005 STR R0, [SP, #20] 0x3418BB0C: 9809 LDR R0, [SP, #36] 0x3418BB0E: 6800 LDR R0, [R0] 0x3418BB10: 3050 ADDS R0, #80 0x3418BB12: 9004 STR R0, [SP, #16] 0x3418BB14: 9809 LDR R0, [SP, #36] 0x3418BB16: 6800 LDR R0, [R0] 0x3418BB18: 6C80 LDR R0, [R0, #72] 0x3418BB1A: 9003 STR R0, [SP, #12] 0x3418BB1C: 9809 LDR R0, [SP, #36] 0x3418BB1E: 6800 LDR R0, [R0] 0x3418BB20: F8D0 0110 LDR.W R0, [R0, #0x0110] 0x3418BB24: 9002 STR R0, [SP, #8] 0x3418BB26: 9808 LDR R0, [SP, #32] 0x3418BB28: B930 CBNZ R0, .L1 ; 0x3418BB38 0x3418BB2A: 2001 MOVS R0, #1 0x3418BB2C: F88D 001B STRB.W R0, [SP, #27] 0x3418BB30: 9909 LDR R1, [SP, #36] 0x3418BB32: 2008 MOVS R0, #8 0x3418BB34: 65C8 STR R0, [R1, #92] 0x3418BB36: E073 B 46L9 ; 0x3418BC20
.L1: 0x3418BB38: 9809 LDR R0, [SP, #36] 0x3418BB3A: 6D80 LDR R0, [R0, #88] 0x3418BB3C: 2804 CMP R0, #4 0x3418BB3E: D169 BNE 46L8 ; 0x3418BC14 0x3418BB40: 9809 LDR R0, [SP, #36] 0x3418BB42: 6800 LDR R0, [R0] 0x3418BB44: 6C00 LDR R0, [R0, #64] 0x3418BB46: 3001 ADDS R0, #1 0x3418BB48: 9909 LDR R1, [SP, #36] 0x3418BB4A: 64C8 STR R0, [R1, #76] 0x3418BB4C: 9809 LDR R0, [SP, #36] 0x3418BB4E: 6CC0 LDR R0, [R0, #76] 0x3418BB50: 9909 LDR R1, [SP, #36] 0x3418BB52: 6488 STR R0, [R1, #72] 0x3418BB54: 9808 LDR R0, [SP, #32] 0x3418BB56: 9909 LDR R1, [SP, #36] 0x3418BB58: 6448 STR R0, [R1, #68] 0x3418BB5A: 9809 LDR R0, [SP, #36] 0x3418BB5C: 6800 LDR R0, [R0] 0x3418BB5E: 6800 LDR R0, [R0] 0x3418BB60: 2101 MOVS R1, #1 0x3418BB62: F361 701D BFI R0, R1, #28, #2 0x3418BB66: 9909 LDR R1, [SP, #36] 0x3418BB68: 6809 LDR R1, [R1] 0x3418BB6A: 6008 STR R0, [R1] 0x3418BB6C: 9809 LDR R0, [SP, #36] 0x3418BB6E: 68C0 LDR R0, [R0, #12] 0x3418BB70: F1B0 6F80 CMP.W R0, #0x04000000 0x3418BB74: D104 BNE 46L2 ; 0x3418BB80 0x3418BB76: 9803 LDR R0, [SP, #12] 0x3418BB78: 9909 LDR R1, [SP, #36] 0x3418BB7A: 6809 LDR R1, [R1] 0x3418BB7C: 6488 STR R0, [R1, #72] 0x3418BB7E: E010 B 46L4 ; 0x3418BBA2
.L2: 0x3418BB80: 9809 LDR R0, [SP, #36] 0x3418BB82: 6800 LDR R0, [R0] 0x3418BB84: F8D0 0100 LDR.W R0, [R0, #0x0100] 0x3418BB88: F410 6FE0 TST R0, #0x0700 0x3418BB8C: D004 BEQ 46L3 ; 0x3418BB98 0x3418BB8E: 9803 LDR R0, [SP, #12] 0x3418BB90: 9909 LDR R1, [SP, #36] 0x3418BB92: 6809 LDR R1, [R1] 0x3418BB94: 6488 STR R0, [R1, #72] 0x3418BB96: E004 B 46L4 ; 0x3418BBA2
.L3: 0x3418BB98: 9802 LDR R0, [SP, #8] 0x3418BB9A: 9909 LDR R1, [SP, #36] 0x3418BB9C: 6809 LDR R1, [R1] 0x3418BB9E: F8C1 0110 STR.W R0, [R1, #0x0110]
.L4: 0x3418BBA2: 9809 LDR R0, [SP, #36] 0x3418BBA4: 9B05 LDR R3, [SP, #20] 0x3418BBA6: 9907 LDR R1, [SP, #28] 0x3418BBA8: 466A MOV R2, SP 0x3418BBAA: 6011 STR R1, [R2] 0x3418BBAC: 2106 MOVS R1, #6 0x3418BBAE: 2201 MOVS R2, #1 0x3418BBB0: F7FF FDA2 BL XSPI_WaitFlagStateUntilTimeout ; 0x3418B6F8 0x3418BBB4: F88D 001B STRB.W R0, [SP, #27] 0x3418BBB8: F89D 001B LDRB.W R0, [SP, #27] 0x3418BBBC: B100 CBZ R0, .L5 ; 0x3418BBC0 0x3418BBBE: E011 B 46L6 ; 0x3418BBE4
.L5: 0x3418BBC0: 9804 LDR R0, [SP, #16] 0x3418BBC2: 7800 LDRB R0, [R0] 0x3418BBC4: 9909 LDR R1, [SP, #36] 0x3418BBC6: 6C49 LDR R1, [R1, #68] 0x3418BBC8: 7008 STRB R0, [R1] 0x3418BBCA: 9909 LDR R1, [SP, #36] 0x3418BBCC: 6C48 LDR R0, [R1, #68] 0x3418BBCE: 3001 ADDS R0, #1 0x3418BBD0: 6448 STR R0, [R1, #68] 0x3418BBD2: 9909 LDR R1, [SP, #36] 0x3418BBD4: 6CC8 LDR R0, [R1, #76] 0x3418BBD6: 3801 SUBS R0, #1 0x3418BBD8: 64C8 STR R0, [R1, #76] 0x3418BBDA: 9809 LDR R0, [SP, #36] 0x3418BBDC: 6CC0 LDR R0, [R0, #76] 0x3418BBDE: B108 CBZ R0, .L6 ; 0x3418BBE4 0x3418BBE0: F02F C821 LE 46L4 ; 0x3418BBA2
.L6: 0x3418BBE4: F89D 001B LDRB.W R0, [SP, #27] 0x3418BBE8: B998 CBNZ R0, .L7 ; 0x3418BC12 0x3418BBEA: 9809 LDR R0, [SP, #36] 0x3418BBEC: 9B05 LDR R3, [SP, #20] 0x3418BBEE: 9907 LDR R1, [SP, #28] 0x3418BBF0: 466A MOV R2, SP 0x3418BBF2: 6011 STR R1, [R2] 0x3418BBF4: 2102 MOVS R1, #2 0x3418BBF6: 2201 MOVS R2, #1 0x3418BBF8: F7FF FD7E BL XSPI_WaitFlagStateUntilTimeout ; 0x3418B6F8 0x3418BBFC: F88D 001B STRB.W R0, [SP, #27] 0x3418BC00: F89D 001B LDRB.W R0, [SP, #27] 0x3418BC04: B928 CBNZ R0, .L7 ; 0x3418BC12 0x3418BC06: 9809 LDR R0, [SP, #36] 0x3418BC08: 6801 LDR R1, [R0] 0x3418BC0A: 2002 MOVS R0, #2 0x3418BC0C: 6248 STR R0, [R1, #36] 0x3418BC0E: 9909 LDR R1, [SP, #36] 0x3418BC10: 6588 STR R0, [R1, #88]
.L7: 0x3418BC12: E005 B 46L9 ; 0x3418BC20
.L8: 0x3418BC14: 2001 MOVS R0, #1 0x3418BC16: F88D 001B STRB.W R0, [SP, #27] 0x3418BC1A: 9909 LDR R1, [SP, #36] 0x3418BC1C: 2010 MOVS R0, #16 0x3418BC1E: 65C8 STR R0, [R1, #92]
.L9: 0x3418BC20: F89D 001B LDRB.W R0, [SP, #27] 0x3418BC24: B00A ADD SP, SP, #40 0x3418BC26: BD80 POP 123R7, PC}

Section .text.LL_AHB5_GRP1_IsEnabledClock from blto2_FSBL_lto.o, size=28, align=4


LL_AHB5_GRP1_IsEnabledClock: 0x3418BC28: B081 SUB SP, SP, #4 0x3418BC2A: 9000 STR R0, [SP, #0] 0x3418BC2C: F248 2060 MOVW R0, #0x8260 0x3418BC30: F2C5 6002 MOVT R0, #0x5602 0x3418BC34: 6800 LDR R0, [R0] 0x3418BC36: 43C0 MVNS R0, R0 0x3418BC38: 9900 LDR R1, [SP, #0] 0x3418BC3A: 4208 TST R0, R1 0x3418BC3C: EA5F 901F CSET R0, EQ 0x3418BC40: B001 ADD SP, SP, #4 0x3418BC42: 4770 BX LR

Section .text.JumpToApplication from blto2_FSBL_lto.o, size=356, align=4


JumpToApplication: 0x3418BC44: B5D0 PUSH 123R4, R6-R7, LR} 0x3418BC46: AF02 ADD R7, SP, #8 0x3418BC48: B094 SUB SP, SP, #80 0x3418BC4A: 466C MOV R4, SP 0x3418BC4C: F36F 0404 BFC R4, #0, #5 0x3418BC50: 46A5 MOV SP, R4 0x3418BC52: 2000 MOVS R0, #0 0x3418BC54: A905 ADD R1, SP, #20 0x3418BC56: F001 FC8F BL EXTMEM_GetMapAddress ; 0x3418D578 0x3418BC5A: B118 CBZ R0, .L1 ; 0x3418BC64 0x3418BC5C: 2004 MOVS R0, #4 0x3418BC5E: F88D 001F STRB.W R0, [SP, #31] 0x3418BC62: E09B B 46L8 ; 0x3418BD9C
.L1: 0x3418BC64: F002 FA10 BL HAL_SuspendTick ; 0x3418E088 0x3418BC68: F64E 5014 MOVW R0, #0xED14 0x3418BC6C: F2CE 0000 MOVT R0, #0xE000 0x3418BC70: 6800 LDR R0, [R0] 0x3418BC72: 0380 LSLS R0, R0, #14 0x3418BC74: 2800 CMP R0, #0 0x3418BC76: D515 BPL 46L2 ; 0x3418BCA4 0x3418BC78: F3BF 8F4F DSB SY 0x3418BC7C: F3BF 8F6F ISB SY 0x3418BC80: F64E 5114 MOVW R1, #0xED14 0x3418BC84: F2CE 0100 MOVT R1, #0xE000 0x3418BC88: 6808 LDR R0, [R1] 0x3418BC8A: F420 3000 BIC R0, R0, #0x020000 0x3418BC8E: 6008 STR R0, [R1] 0x3418BC90: F64E 7150 MOVW R1, #0xEF50 0x3418BC94: F2CE 0100 MOVT R1, #0xE000 0x3418BC98: 2000 MOVS R0, #0 0x3418BC9A: 6008 STR R0, [R1] 0x3418BC9C: F3BF 8F4F DSB SY 0x3418BCA0: F3BF 8F6F ISB SY
.L2: 0x3418BCA4: F64E 5014 MOVW R0, #0xED14 0x3418BCA8: F2CE 0000 MOVT R0, #0xE000 0x3418BCAC: 6800 LDR R0, [R0] 0x3418BCAE: 03C0 LSLS R0, R0, #15 0x3418BCB0: 2800 CMP R0, #0 0x3418BCB2: D543 BPL 46L7 ; 0x3418BD3C 0x3418BCB4: F64E 5184 MOVW R1, #0xED84 0x3418BCB8: F2CE 0100 MOVT R1, #0xE000 0x3418BCBC: 2000 MOVS R0, #0 0x3418BCBE: 6008 STR R0, [R1] 0x3418BCC0: F3BF 8F4F DSB SY 0x3418BCC4: F64E 5114 MOVW R1, #0xED14 0x3418BCC8: F2CE 0100 MOVT R1, #0xE000 0x3418BCCC: 6808 LDR R0, [R1] 0x3418BCCE: F420 3080 BIC R0, R0, #0x010000 0x3418BCD2: 6008 STR R0, [R1] 0x3418BCD4: F3BF 8F4F DSB SY 0x3418BCD8: F64E 7170 MOVW R1, #0xEF70 0x3418BCDC: F2CE 0100 MOVT R1, #0xE000 0x3418BCE0: A808 ADD R0, SP, #32 0x3418BCE2: 6008 STR R0, [R1] 0x3418BCE4: F3BF 8F4F DSB SY 0x3418BCE8: F3BF 8F6F ISB SY 0x3418BCEC: F64E 5080 MOVW R0, #0xED80 0x3418BCF0: F2CE 0000 MOVT R0, #0xE000 0x3418BCF4: 6800 LDR R0, [R0] 0x3418BCF6: 9008 STR R0, [SP, #32] 0x3418BCF8: 9808 LDR R0, [SP, #32] 0x3418BCFA: F3C0 304E UBFX R0, R0, #13, #15 0x3418BCFE: 9009 STR R0, [SP, #36]
.L3: 0x3418BD00: 9808 LDR R0, [SP, #32] 0x3418BD02: F3C0 00C9 UBFX R0, R0, #3, #10 0x3418BD06: 900A STR R0, [SP, #40]
.L4: 0x3418BD08: 9909 LDR R1, [SP, #36] 0x3418BD0A: 980A LDR R0, [SP, #40] 0x3418BD0C: 0780 LSLS R0, R0, #30 0x3418BD0E: F361 104D BFI R0, R1, #5, #9 0x3418BD12: F64E 7174 MOVW R1, #0xEF74 0x3418BD16: F2CE 0100 MOVT R1, #0xE000 0x3418BD1A: 6008 STR R0, [R1] 0x3418BD1C: 980A LDR R0, [SP, #40] 0x3418BD1E: 1E41 SUBS R1, R0, #1 0x3418BD20: 910A STR R1, [SP, #40] 0x3418BD22: B108 CBZ R0, .L5 ; 0x3418BD28 0x3418BD24: F02F C011 LE 46L4 ; 0x3418BD08
.L5: 0x3418BD28: 9809 LDR R0, [SP, #36] 0x3418BD2A: 1E41 SUBS R1, R0, #1 0x3418BD2C: 9109 STR R1, [SP, #36] 0x3418BD2E: B108 CBZ R0, .L6 ; 0x3418BD34 0x3418BD30: F02F C01B LE 46L3 ; 0x3418BD00
.L6: 0x3418BD34: F3BF 8F4F DSB SY 0x3418BD38: F3BF 8F6F ISB SY
.L7: 0x3418BD3C: F3EF 8010 MRS R0, PRIMASK 0x3418BD40: 9010 STR R0, [SP, #64] 0x3418BD42: 9810 LDR R0, [SP, #64] 0x3418BD44: 9006 STR R0, [SP, #24] 0x3418BD46: B672 CPSID i 0x3418BD48: 9805 LDR R0, [SP, #20] 0x3418BD4A: F240 4100 MOVW R1, #0x0400 0x3418BD4E: F2C0 0108 MOVT R1, #8 0x3418BD52: 4408 ADD R0, R1 0x3418BD54: 9005 STR R0, [SP, #20] 0x3418BD56: 9805 LDR R0, [SP, #20] 0x3418BD58: F64E 5108 MOVW R1, #0xED08 0x3418BD5C: F2CE 0100 MOVT R1, #0xE000 0x3418BD60: 6008 STR R0, [R1] 0x3418BD62: 9805 LDR R0, [SP, #20] 0x3418BD64: 6841 LDR R1, [R0, #4] 0x3418BD66: F240 3054 MOVW R0, #0x0354 ; 0x34000354 = JumpToApplication.JumpToApp 0x3418BD6A: F2C3 4000 MOVT R0, #0x3400 ; 0x34000354 = JumpToApplication.JumpToApp 0x3418BD6E: 6001 STR R1, [R0] 0x3418BD70: 2100 MOVS R1, #0 0x3418BD72: 9104 STR R1, [SP, #16] 0x3418BD74: 9111 STR R1, [SP, #68] 0x3418BD76: 9911 LDR R1, [SP, #68] 0x3418BD78: F381 880A MSR MSPLIM, R1 0x3418BD7C: 9905 LDR R1, [SP, #20] 0x3418BD7E: 6809 LDR R1, [R1] 0x3418BD80: 9112 STR R1, [SP, #72] 0x3418BD82: 9912 LDR R1, [SP, #72] 0x3418BD84: F381 8808 MSR MSP, R1 0x3418BD88: 9906 LDR R1, [SP, #24] 0x3418BD8A: 9113 STR R1, [SP, #76] 0x3418BD8C: 9913 LDR R1, [SP, #76] 0x3418BD8E: F381 8810 MSR PRIMASK, R1 0x3418BD92: 6800 LDR R0, [R0] 0x3418BD94: 4780 BLX R0 0x3418BD96: 9804 LDR R0, [SP, #16] 0x3418BD98: F88D 001F STRB.W R0, [SP, #31]
.L8: 0x3418BD9C: F89D 001F LDRB.W R0, [SP, #31] 0x3418BDA0: F1A7 0408 SUB.W R4, R7, #8 0x3418BDA4: 46A5 MOV SP, R4 0x3418BDA6: BDD0 POP 123R4, R6-R7, PC}

Section .text.CheckSFDP_Signature from blto2_FSBL_lto.o, size=80, align=4


CheckSFDP_Signature: 0x3418BDA8: B580 PUSH 123R7, LR} 0x3418BDAA: B084 SUB SP, SP, #16 0x3418BDAC: 9003 STR R0, [SP, #12] 0x3418BDAE: 9102 STR R1, [SP, #8] 0x3418BDB0: 2004 MOVS R0, #4 0x3418BDB2: F88D 0007 STRB.W R0, [SP, #7] 0x3418BDB6: 9802 LDR R0, [SP, #8] 0x3418BDB8: 9000 STR R0, [SP, #0] 0x3418BDBA: F245 3146 MOVW R1, #0x5346 0x3418BDBE: F2C4 4150 MOVT R1, #0x4450 0x3418BDC2: 4288 CMP R0, R1 0x3418BDC4: D00A BEQ 46L1 ; 0x3418BDDC 0x3418BDC6: 9800 LDR R0, [SP, #0] 0x3418BDC8: F244 6153 MOVW R1, #0x4653 0x3418BDCC: F2C5 0144 MOVT R1, #0x5044 0x3418BDD0: 4288 CMP R0, R1 0x3418BDD2: D10D BNE 46L3 ; 0x3418BDF0 0x3418BDD4: 2000 MOVS R0, #0 0x3418BDD6: F88D 0007 STRB.W R0, [SP, #7] 0x3418BDDA: E009 B 46L3 ; 0x3418BDF0
.L1: 0x3418BDDC: 9803 LDR R0, [SP, #12] 0x3418BDDE: 3008 ADDS R0, #8 0x3418BDE0: 2100 MOVS R1, #0 0x3418BDE2: F001 FB49 BL SAL_XSPI_UpdateMemoryType ; 0x3418D478 0x3418BDE6: B910 CBNZ R0, .L2 ; 0x3418BDEE 0x3418BDE8: 2005 MOVS R0, #5 0x3418BDEA: F88D 0007 STRB.W R0, [SP, #7]
.L2: 0x3418BDEE: E7FF B 46L3 ; 0x3418BDF0
.L3: 0x3418BDF0: F89D 0007 LDRB.W R0, [SP, #7] 0x3418BDF4: B004 ADD SP, SP, #16 0x3418BDF6: BD80 POP 123R7, PC}

Section .text.SFDP_GetHeader from blto2_FSBL_lto.o, size=256, align=4


SFDP_GetHeader: 0x3418BDF8: B580 PUSH 123R7, LR} 0x3418BDFA: B08C SUB SP, SP, #48 0x3418BDFC: 900B STR R0, [SP, #44] 0x3418BDFE: 910A STR R1, [SP, #40] 0x3418BE00: 2004 MOVS R0, #4 0x3418BE02: F88D 0027 STRB.W R0, [SP, #39] 0x3418BE06: F640 200B MOVW R0, #0x0A0B 0x3418BE0A: F2C1 000B MOVT R0, #0x100B 0x3418BE0E: 9008 STR R0, [SP, #32] 0x3418BE10: F640 000B MOVW R0, #0x080B 0x3418BE14: F2C1 400B MOVT R0, #0x140B 0x3418BE18: 9007 STR R0, [SP, #28] 0x3418BE1A: F640 0006 MOVW R0, #0x0806 0x3418BE1E: F2C0 6006 MOVT R0, #0x0606 0x3418BE22: 9006 STR R0, [SP, #24] 0x3418BE24: F640 0000 MOVW R0, #0x0800 0x3418BE28: F2C0 2006 MOVT R0, #0x0206 0x3418BE2C: 9005 STR R0, [SP, #20] 0x3418BE2E: 2000 MOVS R0, #0 0x3418BE30: F88D 0013 STRB.W R0, [SP, #19]
.L1: 0x3418BE34: F89D 1013 LDRB.W R1, [SP, #19] 0x3418BE38: 2000 MOVS R0, #0 0x3418BE3A: 2907 CMP R1, #7 0x3418BE3C: 9003 STR R0, [SP, #12] 0x3418BE3E: D805 BHI 46L2 ; 0x3418BE4C 0x3418BE40: F89D 0027 LDRB.W R0, [SP, #39] 0x3418BE44: 2804 CMP R0, #4 0x3418BE46: EA5F 901F CSET R0, EQ 0x3418BE4A: 9003 STR R0, [SP, #12]
.L2: 0x3418BE4C: 9803 LDR R0, [SP, #12] 0x3418BE4E: 07C0 LSLS R0, R0, #31 0x3418BE50: 2800 CMP R0, #0 0x3418BE52: D04D BEQ 46L8 ; 0x3418BEF0 0x3418BE54: F89D 1013 LDRB.W R1, [SP, #19] 0x3418BE58: A805 ADD R0, SP, #20 0x3418BE5A: 9001 STR R0, [SP, #4] 0x3418BE5C: F810 0011 LDRB.W R0, [R0, R1, LSL #1] 0x3418BE60: 990B LDR R1, [SP, #44] 0x3418BE62: F881 0064 STRB.W R0, [R1, #100] 0x3418BE66: 990B LDR R1, [SP, #44] 0x3418BE68: F101 0008 ADD.W R0, R1, #8 0x3418BE6C: F101 0264 ADD.W R2, R1, #100 0x3418BE70: 2100 MOVS R1, #0 0x3418BE72: 9102 STR R1, [SP, #8] 0x3418BE74: F007 FAB0 BL SAL_XSPI_MemoryConfig ; 0x341933D8 0x3418BE78: 9901 LDR R1, [SP, #4] 0x3418BE7A: 9802 LDR R0, [SP, #8] 0x3418BE7C: F89D 2013 LDRB.W R2, [SP, #19] 0x3418BE80: EB01 0142 ADD.W R1, R1, R2, LSL #1 0x3418BE84: 7849 LDRB R1, [R1, #1] 0x3418BE86: 9A0B LDR R2, [SP, #44] 0x3418BE88: F882 1059 STRB.W R1, [R2, #89] 0x3418BE8C: F88D 0012 STRB.W R0, [SP, #18]
.L3: 0x3418BE90: F89D 1012 LDRB.W R1, [SP, #18] 0x3418BE94: 2000 MOVS R0, #0 0x3418BE96: 2901 CMP R1, #1 0x3418BE98: 9000 STR R0, [SP, #0] 0x3418BE9A: D805 BHI 46L4 ; 0x3418BEA8 0x3418BE9C: F89D 0027 LDRB.W R0, [SP, #39] 0x3418BEA0: 2804 CMP R0, #4 0x3418BEA2: EA5F 901F CSET R0, EQ 0x3418BEA6: 9000 STR R0, [SP, #0]
.L4: 0x3418BEA8: 9800 LDR R0, [SP, #0] 0x3418BEAA: 07C0 LSLS R0, R0, #31 0x3418BEAC: B1D0 CBZ R0, .L7 ; 0x3418BEE4 0x3418BEAE: F89D 0012 LDRB.W R0, [SP, #18] 0x3418BEB2: 990B LDR R1, [SP, #44] 0x3418BEB4: F881 0058 STRB.W R0, [R1, #88] 0x3418BEB8: 980B LDR R0, [SP, #44] 0x3418BEBA: 990A LDR R1, [SP, #40] 0x3418BEBC: F006 FDCC BL SFDP_ReadHeader ; 0x34192A58 0x3418BEC0: B910 CBNZ R0, .L5 ; 0x3418BEC8 0x3418BEC2: 2000 MOVS R0, #0 0x3418BEC4: F88D 0027 STRB.W R0, [SP, #39]
.L5: 0x3418BEC8: F89D 1013 LDRB.W R1, [SP, #19] 0x3418BECC: A805 ADD R0, SP, #20 0x3418BECE: F810 0011 LDRB.W R0, [R0, R1, LSL #1] 0x3418BED2: 2805 CMP R0, #5 0x3418BED4: DC00 BGT 46L6 ; 0x3418BED8 0x3418BED6: E005 B 46L7 ; 0x3418BEE4
.L6: 0x3418BED8: F89D 0012 LDRB.W R0, [SP, #18] 0x3418BEDC: 3001 ADDS R0, #1 0x3418BEDE: F88D 0012 STRB.W R0, [SP, #18] 0x3418BEE2: E7D5 B 46L3 ; 0x3418BE90
.L7: 0x3418BEE4: F89D 0013 LDRB.W R0, [SP, #19] 0x3418BEE8: 3001 ADDS R0, #1 0x3418BEEA: F88D 0013 STRB.W R0, [SP, #19] 0x3418BEEE: E7A1 B 46L1 ; 0x3418BE34
.L8: 0x3418BEF0: F89D 0027 LDRB.W R0, [SP, #39] 0x3418BEF4: B00C ADD SP, SP, #48 0x3418BEF6: BD80 POP 123R7, PC}

Section .text.sfdp_get_paraminfo from blto2_FSBL_lto.o, size=652, align=4


sfdp_get_paraminfo: 0x3418BEF8: B580 PUSH 123R7, LR} 0x3418BEFA: B088 SUB SP, SP, #32 0x3418BEFC: 9007 STR R0, [SP, #28] 0x3418BEFE: 9106 STR R1, [SP, #24] 0x3418BF00: 9205 STR R2, [SP, #20] 0x3418BF02: 2000 MOVS R0, #0 0x3418BF04: F88D 0013 STRB.W R0, [SP, #19] 0x3418BF08: 9003 STR R0, [SP, #12] 0x3418BF0A: 9002 STR R0, [SP, #8] 0x3418BF0C: 9807 LDR R0, [SP, #28] 0x3418BF0E: 3008 ADDS R0, #8 0x3418BF10: 9906 LDR R1, [SP, #24] 0x3418BF12: AA02 ADD R2, SP, #8 0x3418BF14: 2308 MOVS R3, #8 0x3418BF16: F007 FBAD BL SAL_XSPI_GetSFDP ; 0x34193674 0x3418BF1A: B118 CBZ R0, .L1 ; 0x3418BF24 0x3418BF1C: 2003 MOVS R0, #3 0x3418BF1E: F88D 0013 STRB.W R0, [SP, #19] 0x3418BF22: E12B B 46L10 ; 0x3418C17C
.L1: 0x3418BF24: 9905 LDR R1, [SP, #20] 0x3418BF26: 2000 MOVS R0, #0 0x3418BF28: 6008 STR R0, [R1] 0x3418BF2A: F89D 000B LDRB.W R0, [SP, #11] 0x3418BF2E: 9905 LDR R1, [SP, #20] 0x3418BF30: 7208 STRB R0, [R1, #8] 0x3418BF32: F89D 100C LDRB.W R1, [SP, #12] 0x3418BF36: F89D 200D LDRB.W R2, [SP, #13] 0x3418BF3A: F89D 000E LDRB.W R0, [SP, #14] 0x3418BF3E: 0400 LSLS R0, R0, #16 0x3418BF40: EA40 2002 ORR.W R0, R0, R2, LSL #8 0x3418BF44: 4408 ADD R0, R1 0x3418BF46: 9905 LDR R1, [SP, #20] 0x3418BF48: 6048 STR R0, [R1, #4] 0x3418BF4A: F89D 000F LDRB.W R0, [SP, #15] 0x3418BF4E: B178 CBZ R0, .L4 ; 0x3418BF70 0x3418BF50: F99D 000F LDRSB.W R0, [SP, #15] 0x3418BF54: 2800 CMP R0, #0 0x3418BF56: D40B BMI 46L4 ; 0x3418BF70 0x3418BF58: F89D 0008 LDRB.W R0, [SP, #8] 0x3418BF5C: 07C0 LSLS R0, R0, #31 0x3418BF5E: B118 CBZ R0, .L2 ; 0x3418BF68 0x3418BF60: 9905 LDR R1, [SP, #20] 0x3418BF62: 2001 MOVS R0, #1 0x3418BF64: 6008 STR R0, [R1] 0x3418BF66: E002 B 46L3 ; 0x3418BF6E
.L2: 0x3418BF68: 9905 LDR R1, [SP, #20] 0x3418BF6A: 2002 MOVS R0, #2 0x3418BF6C: 6008 STR R0, [R1]
.L3: 0x3418BF6E: E105 B 46L10 ; 0x3418C17C
.L4: 0x3418BF70: F99D 000F LDRSB.W R0, [SP, #15] 0x3418BF74: F1B0 3FFF CMP.W R0, #0xFFFFFFFF 0x3418BF78: F300 80FC BGT.W 46L9 ; 0x3418C174 0x3418BF7C: F89D 0008 LDRB.W R0, [SP, #8] 0x3418BF80: 07C0 LSLS R0, R0, #31 0x3418BF82: B910 CBNZ R0, .L5 ; 0x3418BF8A 0x3418BF84: 9905 LDR R1, [SP, #20] 0x3418BF86: 2004 MOVS R0, #4 0x3418BF88: 6008 STR R0, [R1]
.L5: 0x3418BF8A: F89D 000F LDRB.W R0, [SP, #15] 0x3418BF8E: 28FF CMP R0, #255 0x3418BF90: F040 80EC BNE.W 46L8 ; 0x3418C16C 0x3418BF94: F89D 0008 LDRB.W R0, [SP, #8] 0x3418BF98: 4601 MOV R1, R0 0x3418BF9A: 9101 STR R1, [SP, #4] 0x3418BF9C: 288E CMP R0, #142 0x3418BF9E: F200 80E5 BHI.W 46L8 ; 0x3418C16C 0x3418BFA2: 9901 LDR R1, [SP, #4] 0x3418BFA4: E8DF F011 TBH 91PC, R1, LSL #1] 0x3418BFA8: 8F DC.B 0x8F ; '\x8F' 0x3418BFA9: 00 DC.B 0x00 ; '\0' 0x3418BFAA: E2 DC.B 0xE2 ; '\xE2' 0x3418BFAB: 00 DC.B 0x00 ; '\0' 0x3418BFAC: E2 DC.B 0xE2 ; '\xE2' 0x3418BFAD: 00 DC.B 0x00 ; '\0' 0x3418BFAE: A4 DC.B 0xA4 ; '\xA4' 0x3418BFAF: 00 DC.B 0x00 ; '\0' 0x3418BFB0: E2 DC.B 0xE2 ; '\xE2' 0x3418BFB1: 00 DC.B 0x00 ; '\0' 0x3418BFB2: AC DC.B 0xAC ; '\xAC' 0x3418BFB3: 00 DC.B 0x00 ; '\0' 0x3418BFB4: B0 DC.B 0xB0 ; '\xB0' 0x3418BFB5: 00 DC.B 0x00 ; '\0' 0x3418BFB6: E2 DC.B 0xE2 ; '\xE2' 0x3418BFB7: 00 DC.B 0x00 ; '\0' 0x3418BFB8: E2 DC.B 0xE2 ; '\xE2' 0x3418BFB9: 00 DC.B 0x00 ; '\0' 0x3418BFBA: BF DC.B 0xBF ; '\xBF' 0x3418BFBB: 00 DC.B 0x00 ; '\0' 0x3418BFBC: C4 DC.B 0xC4 ; '\xC4' 0x3418BFBD: 00 DC.B 0x00 ; '\0' 0x3418BFBE: E2 DC.B 0xE2 ; '\xE2' 0x3418BFBF: 00 DC.B 0x00 ; '\0' 0x3418BFC0: CE DC.B 0xCE ; '\xCE' 0x3418BFC1: 00 DC.B 0x00 ; '\0' 0x3418BFC2: E2 DC.B 0xE2 ; '\xE2' 0x3418BFC3: 00 DC.B 0x00 ; '\0' 0x3418BFC4: E2 DC.B 0xE2 ; '\xE2' 0x3418BFC5: 00 DC.B 0x00 ; '\0' 0x3418BFC6: DD DC.B 0xDD ; '\xDD' 0x3418BFC7: 00 DC.B 0x00 ; '\0' 0x3418BFC8: E2 DC.B 0xE2 ; '\xE2' 0x3418BFC9: 00 DC.B 0x00 ; '\0' 0x3418BFCA: E2 DC.B 0xE2 ; '\xE2' 0x3418BFCB: 00 DC.B 0x00 ; '\0' 0x3418BFCC: E2 DC.B 0xE2 ; '\xE2' 0x3418BFCD: 00 DC.B 0x00 ; '\0' 0x3418BFCE: E2 DC.B 0xE2 ; '\xE2' 0x3418BFCF: 00 DC.B 0x00 ; '\0' 0x3418BFD0: E2 DC.B 0xE2 ; '\xE2' 0x3418BFD1: 00 DC.B 0x00 ; '\0' 0x3418BFD2: E2 DC.B 0xE2 ; '\xE2' 0x3418BFD3: 00 DC.B 0x00 ; '\0' 0x3418BFD4: E2 DC.B 0xE2 ; '\xE2' 0x3418BFD5: 00 DC.B 0x00 ; '\0' 0x3418BFD6: E2 DC.B 0xE2 ; '\xE2' 0x3418BFD7: 00 DC.B 0x00 ; '\0' 0x3418BFD8: E2 DC.B 0xE2 ; '\xE2' 0x3418BFD9: 00 DC.B 0x00 ; '\0' 0x3418BFDA: E2 DC.B 0xE2 ; '\xE2' 0x3418BFDB: 00 DC.B 0x00 ; '\0' 0x3418BFDC: E2 DC.B 0xE2 ; '\xE2' 0x3418BFDD: 00 DC.B 0x00 ; '\0' 0x3418BFDE: E2 DC.B 0xE2 ; '\xE2' 0x3418BFDF: 00 DC.B 0x00 ; '\0' 0x3418BFE0: E2 DC.B 0xE2 ; '\xE2' 0x3418BFE1: 00 DC.B 0x00 ; '\0' 0x3418BFE2: E2 DC.B 0xE2 ; '\xE2' 0x3418BFE3: 00 DC.B 0x00 ; '\0' 0x3418BFE4: E2 DC.B 0xE2 ; '\xE2' 0x3418BFE5: 00 DC.B 0x00 ; '\0' 0x3418BFE6: E2 DC.B 0xE2 ; '\xE2' 0x3418BFE7: 00 DC.B 0x00 ; '\0' 0x3418BFE8: E2 DC.B 0xE2 ; '\xE2' 0x3418BFE9: 00 DC.B 0x00 ; '\0' 0x3418BFEA: E2 DC.B 0xE2 ; '\xE2' 0x3418BFEB: 00 DC.B 0x00 ; '\0' 0x3418BFEC: E2 DC.B 0xE2 ; '\xE2' 0x3418BFED: 00 DC.B 0x00 ; '\0' 0x3418BFEE: E2 DC.B 0xE2 ; '\xE2' 0x3418BFEF: 00 DC.B 0x00 ; '\0' 0x3418BFF0: E2 DC.B 0xE2 ; '\xE2' 0x3418BFF1: 00 DC.B 0x00 ; '\0' 0x3418BFF2: E2 DC.B 0xE2 ; '\xE2' 0x3418BFF3: 00 DC.B 0x00 ; '\0' 0x3418BFF4: E2 DC.B 0xE2 ; '\xE2' 0x3418BFF5: 00 DC.B 0x00 ; '\0' 0x3418BFF6: E2 DC.B 0xE2 ; '\xE2' 0x3418BFF7: 00 DC.B 0x00 ; '\0' 0x3418BFF8: E2 DC.B 0xE2 ; '\xE2' 0x3418BFF9: 00 DC.B 0x00 ; '\0' 0x3418BFFA: E2 DC.B 0xE2 ; '\xE2' 0x3418BFFB: 00 DC.B 0x00 ; '\0' 0x3418BFFC: E2 DC.B 0xE2 ; '\xE2' 0x3418BFFD: 00 DC.B 0x00 ; '\0' 0x3418BFFE: E2 DC.B 0xE2 ; '\xE2' 0x3418BFFF: 00 DC.B 0x00 ; '\0' 0x3418C000: E2 DC.B 0xE2 ; '\xE2' 0x3418C001: 00 DC.B 0x00 ; '\0' 0x3418C002: E2 DC.B 0xE2 ; '\xE2' 0x3418C003: 00 DC.B 0x00 ; '\0' 0x3418C004: E2 DC.B 0xE2 ; '\xE2' 0x3418C005: 00 DC.B 0x00 ; '\0' 0x3418C006: E2 DC.B 0xE2 ; '\xE2' 0x3418C007: 00 DC.B 0x00 ; '\0' 0x3418C008: E2 DC.B 0xE2 ; '\xE2' 0x3418C009: 00 DC.B 0x00 ; '\0' 0x3418C00A: E2 DC.B 0xE2 ; '\xE2' 0x3418C00B: 00 DC.B 0x00 ; '\0' 0x3418C00C: E2 DC.B 0xE2 ; '\xE2' 0x3418C00D: 00 DC.B 0x00 ; '\0' 0x3418C00E: E2 DC.B 0xE2 ; '\xE2' 0x3418C00F: 00 DC.B 0x00 ; '\0' 0x3418C010: E2 DC.B 0xE2 ; '\xE2' 0x3418C011: 00 DC.B 0x00 ; '\0' 0x3418C012: E2 DC.B 0xE2 ; '\xE2' 0x3418C013: 00 DC.B 0x00 ; '\0' 0x3418C014: E2 DC.B 0xE2 ; '\xE2' 0x3418C015: 00 DC.B 0x00 ; '\0' 0x3418C016: E2 DC.B 0xE2 ; '\xE2' 0x3418C017: 00 DC.B 0x00 ; '\0' 0x3418C018: E2 DC.B 0xE2 ; '\xE2' 0x3418C019: 00 DC.B 0x00 ; '\0' 0x3418C01A: E2 DC.B 0xE2 ; '\xE2' 0x3418C01B: 00 DC.B 0x00 ; '\0' 0x3418C01C: E2 DC.B 0xE2 ; '\xE2' 0x3418C01D: 00 DC.B 0x00 ; '\0' 0x3418C01E: E2 DC.B 0xE2 ; '\xE2' 0x3418C01F: 00 DC.B 0x00 ; '\0' 0x3418C020: E2 DC.B 0xE2 ; '\xE2' 0x3418C021: 00 DC.B 0x00 ; '\0' 0x3418C022: E2 DC.B 0xE2 ; '\xE2' 0x3418C023: 00 DC.B 0x00 ; '\0' 0x3418C024: E2 DC.B 0xE2 ; '\xE2' 0x3418C025: 00 DC.B 0x00 ; '\0' 0x3418C026: E2 DC.B 0xE2 ; '\xE2' 0x3418C027: 00 DC.B 0x00 ; '\0' 0x3418C028: E2 DC.B 0xE2 ; '\xE2' 0x3418C029: 00 DC.B 0x00 ; '\0' 0x3418C02A: E2 DC.B 0xE2 ; '\xE2' 0x3418C02B: 00 DC.B 0x00 ; '\0' 0x3418C02C: E2 DC.B 0xE2 ; '\xE2' 0x3418C02D: 00 DC.B 0x00 ; '\0' 0x3418C02E: E2 DC.B 0xE2 ; '\xE2' 0x3418C02F: 00 DC.B 0x00 ; '\0' 0x3418C030: E2 DC.B 0xE2 ; '\xE2' 0x3418C031: 00 DC.B 0x00 ; '\0' 0x3418C032: E2 DC.B 0xE2 ; '\xE2' 0x3418C033: 00 DC.B 0x00 ; '\0' 0x3418C034: E2 DC.B 0xE2 ; '\xE2' 0x3418C035: 00 DC.B 0x00 ; '\0' 0x3418C036: E2 DC.B 0xE2 ; '\xE2' 0x3418C037: 00 DC.B 0x00 ; '\0' 0x3418C038: E2 DC.B 0xE2 ; '\xE2' 0x3418C039: 00 DC.B 0x00 ; '\0' 0x3418C03A: E2 DC.B 0xE2 ; '\xE2' 0x3418C03B: 00 DC.B 0x00 ; '\0' 0x3418C03C: E2 DC.B 0xE2 ; '\xE2' 0x3418C03D: 00 DC.B 0x00 ; '\0' 0x3418C03E: E2 DC.B 0xE2 ; '\xE2' 0x3418C03F: 00 DC.B 0x00 ; '\0' 0x3418C040: E2 DC.B 0xE2 ; '\xE2' 0x3418C041: 00 DC.B 0x00 ; '\0' 0x3418C042: E2 DC.B 0xE2 ; '\xE2' 0x3418C043: 00 DC.B 0x00 ; '\0' 0x3418C044: E2 DC.B 0xE2 ; '\xE2' 0x3418C045: 00 DC.B 0x00 ; '\0' 0x3418C046: E2 DC.B 0xE2 ; '\xE2' 0x3418C047: 00 DC.B 0x00 ; '\0' 0x3418C048: E2 DC.B 0xE2 ; '\xE2' 0x3418C049: 00 DC.B 0x00 ; '\0' 0x3418C04A: E2 DC.B 0xE2 ; '\xE2' 0x3418C04B: 00 DC.B 0x00 ; '\0' 0x3418C04C: E2 DC.B 0xE2 ; '\xE2' 0x3418C04D: 00 DC.B 0x00 ; '\0' 0x3418C04E: E2 DC.B 0xE2 ; '\xE2' 0x3418C04F: 00 DC.B 0x00 ; '\0' 0x3418C050: E2 DC.B 0xE2 ; '\xE2' 0x3418C051: 00 DC.B 0x00 ; '\0' 0x3418C052: E2 DC.B 0xE2 ; '\xE2' 0x3418C053: 00 DC.B 0x00 ; '\0' 0x3418C054: E2 DC.B 0xE2 ; '\xE2' 0x3418C055: 00 DC.B 0x00 ; '\0' 0x3418C056: E2 DC.B 0xE2 ; '\xE2' 0x3418C057: 00 DC.B 0x00 ; '\0' 0x3418C058: E2 DC.B 0xE2 ; '\xE2' 0x3418C059: 00 DC.B 0x00 ; '\0' 0x3418C05A: E2 DC.B 0xE2 ; '\xE2' 0x3418C05B: 00 DC.B 0x00 ; '\0' 0x3418C05C: E2 DC.B 0xE2 ; '\xE2' 0x3418C05D: 00 DC.B 0x00 ; '\0' 0x3418C05E: E2 DC.B 0xE2 ; '\xE2' 0x3418C05F: 00 DC.B 0x00 ; '\0' 0x3418C060: E2 DC.B 0xE2 ; '\xE2' 0x3418C061: 00 DC.B 0x00 ; '\0' 0x3418C062: E2 DC.B 0xE2 ; '\xE2' 0x3418C063: 00 DC.B 0x00 ; '\0' 0x3418C064: E2 DC.B 0xE2 ; '\xE2' 0x3418C065: 00 DC.B 0x00 ; '\0' 0x3418C066: E2 DC.B 0xE2 ; '\xE2' 0x3418C067: 00 DC.B 0x00 ; '\0' 0x3418C068: E2 DC.B 0xE2 ; '\xE2' 0x3418C069: 00 DC.B 0x00 ; '\0' 0x3418C06A: E2 DC.B 0xE2 ; '\xE2' 0x3418C06B: 00 DC.B 0x00 ; '\0' 0x3418C06C: E2 DC.B 0xE2 ; '\xE2' 0x3418C06D: 00 DC.B 0x00 ; '\0' 0x3418C06E: E2 DC.B 0xE2 ; '\xE2' 0x3418C06F: 00 DC.B 0x00 ; '\0' 0x3418C070: E2 DC.B 0xE2 ; '\xE2' 0x3418C071: 00 DC.B 0x00 ; '\0' 0x3418C072: E2 DC.B 0xE2 ; '\xE2' 0x3418C073: 00 DC.B 0x00 ; '\0' 0x3418C074: E2 DC.B 0xE2 ; '\xE2' 0x3418C075: 00 DC.B 0x00 ; '\0' 0x3418C076: E2 DC.B 0xE2 ; '\xE2' 0x3418C077: 00 DC.B 0x00 ; '\0' 0x3418C078: E2 DC.B 0xE2 ; '\xE2' 0x3418C079: 00 DC.B 0x00 ; '\0' 0x3418C07A: E2 DC.B 0xE2 ; '\xE2' 0x3418C07B: 00 DC.B 0x00 ; '\0' 0x3418C07C: E2 DC.B 0xE2 ; '\xE2' 0x3418C07D: 00 DC.B 0x00 ; '\0' 0x3418C07E: E2 DC.B 0xE2 ; '\xE2' 0x3418C07F: 00 DC.B 0x00 ; '\0' 0x3418C080: E2 DC.B 0xE2 ; '\xE2' 0x3418C081: 00 DC.B 0x00 ; '\0' 0x3418C082: E2 DC.B 0xE2 ; '\xE2' 0x3418C083: 00 DC.B 0x00 ; '\0' 0x3418C084: E2 DC.B 0xE2 ; '\xE2' 0x3418C085: 00 DC.B 0x00 ; '\0' 0x3418C086: E2 DC.B 0xE2 ; '\xE2' 0x3418C087: 00 DC.B 0x00 ; '\0' 0x3418C088: E2 DC.B 0xE2 ; '\xE2' 0x3418C089: 00 DC.B 0x00 ; '\0' 0x3418C08A: E2 DC.B 0xE2 ; '\xE2' 0x3418C08B: 00 DC.B 0x00 ; '\0' 0x3418C08C: E2 DC.B 0xE2 ; '\xE2' 0x3418C08D: 00 DC.B 0x00 ; '\0' 0x3418C08E: E2 DC.B 0xE2 ; '\xE2' 0x3418C08F: 00 DC.B 0x00 ; '\0' 0x3418C090: E2 DC.B 0xE2 ; '\xE2' 0x3418C091: 00 DC.B 0x00 ; '\0' 0x3418C092: E2 DC.B 0xE2 ; '\xE2' 0x3418C093: 00 DC.B 0x00 ; '\0' 0x3418C094: E2 DC.B 0xE2 ; '\xE2' 0x3418C095: 00 DC.B 0x00 ; '\0' 0x3418C096: E2 DC.B 0xE2 ; '\xE2' 0x3418C097: 00 DC.B 0x00 ; '\0' 0x3418C098: E2 DC.B 0xE2 ; '\xE2' 0x3418C099: 00 DC.B 0x00 ; '\0' 0x3418C09A: E2 DC.B 0xE2 ; '\xE2' 0x3418C09B: 00 DC.B 0x00 ; '\0' 0x3418C09C: E2 DC.B 0xE2 ; '\xE2' 0x3418C09D: 00 DC.B 0x00 ; '\0' 0x3418C09E: E2 DC.B 0xE2 ; '\xE2' 0x3418C09F: 00 DC.B 0x00 ; '\0' 0x3418C0A0: E2 DC.B 0xE2 ; '\xE2' 0x3418C0A1: 00 DC.B 0x00 ; '\0' 0x3418C0A2: E2 DC.B 0xE2 ; '\xE2' 0x3418C0A3: 00 DC.B 0x00 ; '\0' 0x3418C0A4: E2 DC.B 0xE2 ; '\xE2' 0x3418C0A5: 00 DC.B 0x00 ; '\0' 0x3418C0A6: E2 DC.B 0xE2 ; '\xE2' 0x3418C0A7: 00 DC.B 0x00 ; '\0' 0x3418C0A8: E2 DC.B 0xE2 ; '\xE2' 0x3418C0A9: 00 DC.B 0x00 ; '\0' 0x3418C0AA: A0 DC.B 0xA0 ; '\xA0' 0x3418C0AB: 00 DC.B 0x00 ; '\0' 0x3418C0AC: E2 DC.B 0xE2 ; '\xE2' 0x3418C0AD: 00 DC.B 0x00 ; '\0' 0x3418C0AE: E2 DC.B 0xE2 ; '\xE2' 0x3418C0AF: 00 DC.B 0x00 ; '\0' 0x3418C0B0: A8 DC.B 0xA8 ; '\xA8' 0x3418C0B1: 00 DC.B 0x00 ; '\0' 0x3418C0B2: E2 DC.B 0xE2 ; '\xE2' 0x3418C0B3: 00 DC.B 0x00 ; '\0' 0x3418C0B4: E2 DC.B 0xE2 ; '\xE2' 0x3418C0B5: 00 DC.B 0x00 ; '\0' 0x3418C0B6: B5 DC.B 0xB5 ; '\xB5' 0x3418C0B7: 00 DC.B 0x00 ; '\0' 0x3418C0B8: BA DC.B 0xBA ; '\xBA' 0x3418C0B9: 00 DC.B 0x00 ; '\0' 0x3418C0BA: E2 DC.B 0xE2 ; '\xE2' 0x3418C0BB: 00 DC.B 0x00 ; '\0' 0x3418C0BC: E2 DC.B 0xE2 ; '\xE2' 0x3418C0BD: 00 DC.B 0x00 ; '\0' 0x3418C0BE: C9 DC.B 0xC9 ; '\xC9' 0x3418C0BF: 00 DC.B 0x00 ; '\0' 0x3418C0C0: E2 DC.B 0xE2 ; '\xE2' 0x3418C0C1: 00 DC.B 0x00 ; '\0' 0x3418C0C2: D3 DC.B 0xD3 ; '\xD3' 0x3418C0C3: 00 DC.B 0x00 ; '\0' 0x3418C0C4: D8 DC.B 0xD8 ; '\xD8' 0x3418C0C5: 00 DC.B 0x00 ; '\0' 0x3418C0C6: 9905 LDR R1, [SP, #20] 0x3418C0C8: 2008 MOVS R0, #8 0x3418C0CA: 6008 STR R0, [R1] 0x3418C0CC: F89D 000B LDRB.W R0, [SP, #11] 0x3418C0D0: 2816 CMP R0, #22 0x3418C0D2: D803 BHI 46L6 ; 0x3418C0DC 0x3418C0D4: F89D 000B LDRB.W R0, [SP, #11] 0x3418C0D8: 9000 STR R0, [SP, #0] 0x3418C0DA: E001 B 46L7 ; 0x3418C0E0
.L6: 0x3418C0DC: 2017 MOVS R0, #23 0x3418C0DE: 9000 STR R0, [SP, #0]
.L7: 0x3418C0E0: 9800 LDR R0, [SP, #0] 0x3418C0E2: 9905 LDR R1, [SP, #20] 0x3418C0E4: 7208 STRB R0, [R1, #8] 0x3418C0E6: E041 B 46L8 ; 0x3418C16C 0x3418C0E8: 9905 LDR R1, [SP, #20] 0x3418C0EA: 2010 MOVS R0, #16 0x3418C0EC: 6008 STR R0, [R1] 0x3418C0EE: E03D B 46L8 ; 0x3418C16C 0x3418C0F0: 9905 LDR R1, [SP, #20] 0x3418C0F2: 2020 MOVS R0, #32 0x3418C0F4: 6008 STR R0, [R1] 0x3418C0F6: E039 B 46L8 ; 0x3418C16C 0x3418C0F8: 9905 LDR R1, [SP, #20] 0x3418C0FA: 2040 MOVS R0, #64 0x3418C0FC: 6008 STR R0, [R1] 0x3418C0FE: E035 B 46L8 ; 0x3418C16C 0x3418C100: 9905 LDR R1, [SP, #20] 0x3418C102: 2080 MOVS R0, #128 0x3418C104: 6008 STR R0, [R1] 0x3418C106: E031 B 46L8 ; 0x3418C16C 0x3418C108: 9905 LDR R1, [SP, #20] 0x3418C10A: F44F 7080 MOV.W R0, #0x0100 0x3418C10E: 6008 STR R0, [R1] 0x3418C110: E02C B 46L8 ; 0x3418C16C 0x3418C112: 9905 LDR R1, [SP, #20] 0x3418C114: F44F 7000 MOV.W R0, #0x0200 0x3418C118: 6008 STR R0, [R1] 0x3418C11A: E027 B 46L8 ; 0x3418C16C 0x3418C11C: 9905 LDR R1, [SP, #20] 0x3418C11E: F44F 6080 MOV.W R0, #0x0400 0x3418C122: 6008 STR R0, [R1] 0x3418C124: E022 B 46L8 ; 0x3418C16C 0x3418C126: 9905 LDR R1, [SP, #20] 0x3418C128: F44F 6000 MOV.W R0, #0x0800 0x3418C12C: 6008 STR R0, [R1] 0x3418C12E: E01D B 46L8 ; 0x3418C16C 0x3418C130: 9905 LDR R1, [SP, #20] 0x3418C132: F44F 5080 MOV.W R0, #0x1000 0x3418C136: 6008 STR R0, [R1] 0x3418C138: E018 B 46L8 ; 0x3418C16C 0x3418C13A: 9905 LDR R1, [SP, #20] 0x3418C13C: F44F 5000 MOV.W R0, #0x2000 0x3418C140: 6008 STR R0, [R1] 0x3418C142: E013 B 46L8 ; 0x3418C16C 0x3418C144: 9905 LDR R1, [SP, #20] 0x3418C146: F44F 4080 MOV.W R0, #0x4000 0x3418C14A: 6008 STR R0, [R1] 0x3418C14C: E00E B 46L8 ; 0x3418C16C 0x3418C14E: 9905 LDR R1, [SP, #20] 0x3418C150: F44F 4000 MOV.W R0, #0x8000 0x3418C154: 6008 STR R0, [R1] 0x3418C156: E009 B 46L8 ; 0x3418C16C 0x3418C158: 9905 LDR R1, [SP, #20] 0x3418C15A: F44F 3080 MOV.W R0, #0x010000 0x3418C15E: 6008 STR R0, [R1] 0x3418C160: E004 B 46L8 ; 0x3418C16C 0x3418C162: 9905 LDR R1, [SP, #20] 0x3418C164: F44F 3000 MOV.W R0, #0x020000 0x3418C168: 6008 STR R0, [R1] 0x3418C16A: E7FF B 46L8 ; 0x3418C16C
.L8: 0x3418C16C: 9805 LDR R0, [SP, #20] 0x3418C16E: 6800 LDR R0, [R0] 0x3418C170: BF00 NOP 0x3418C172: E003 B 46L10 ; 0x3418C17C
.L9: 0x3418C174: 2003 MOVS R0, #3 0x3418C176: F88D 0013 STRB.W R0, [SP, #19] 0x3418C17A: E7FF B 46L10 ; 0x3418C17C
.L10: 0x3418C17C: F89D 0013 LDRB.W R0, [SP, #19] 0x3418C180: B008 ADD SP, SP, #32 0x3418C182: BD80 POP 123R7, PC}

Section .text.SFDP_BuildGenericDriver from blto2_FSBL_lto.o, size=3092, align=4


SFDP_BuildGenericDriver: 0x3418C184: B5B0 PUSH 123R4-R5, R7, LR} 0x3418C186: B08E SUB SP, SP, #56 0x3418C188: 900C STR R0, [SP, #48] 0x3418C18A: 910B STR R1, [SP, #44] 0x3418C18C: 2000 MOVS R0, #0 0x3418C18E: F88D 002B STRB.W R0, [SP, #43] 0x3418C192: F88D 002A STRB.W R0, [SP, #42] 0x3418C196: 980C LDR R0, [SP, #48] 0x3418C198: F8D0 0094 LDR.W R0, [R0, #148] 0x3418C19C: F000 0008 AND R0, R0, #8 0x3418C1A0: 2808 CMP R0, #8 0x3418C1A2: D004 BEQ 46L1 ; 0x3418C1AE 0x3418C1A4: 2007 MOVS R0, #7 0x3418C1A6: F88D 002B STRB.W R0, [SP, #43] 0x3418C1AA: F000 BDF1 B.W 46L83 ; 0x3418CD90
.L1: 0x3418C1AE: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C1B2: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C1B6: 7AC0 LDRB R0, [R0, #11] 0x3418C1B8: 0600 LSLS R0, R0, #24 0x3418C1BA: 2800 CMP R0, #0 0x3418C1BC: D40F BMI 46L2 ; 0x3418C1DE 0x3418C1BE: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C1C2: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C1C6: 6880 LDR R0, [R0, #8] 0x3418C1C8: 3001 ADDS R0, #1 0x3418C1CA: 900D STR R0, [SP, #52] 0x3418C1CC: 980D LDR R0, [SP, #52] 0x3418C1CE: FAB0 F080 CLZ R0, R0 0x3418C1D2: F1C0 001F RSB R0, R0, #31 0x3418C1D6: 990C LDR R1, [SP, #48] 0x3418C1D8: F881 005E STRB.W R0, [R1, #94] 0x3418C1DC: E007 B 46L3 ; 0x3418C1EE
.L2: 0x3418C1DE: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C1E2: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C1E6: 6880 LDR R0, [R0, #8] 0x3418C1E8: 990C LDR R1, [SP, #48] 0x3418C1EA: F881 005E STRB.W R0, [R1, #94]
.L3: 0x3418C1EE: 990C LDR R1, [SP, #48] 0x3418C1F0: F891 005E LDRB.W R0, [R1, #94] 0x3418C1F4: 3803 SUBS R0, #3 0x3418C1F6: F881 005E STRB.W R0, [R1, #94] 0x3418C1FA: 980C LDR R0, [SP, #48] 0x3418C1FC: F890 005E LDRB.W R0, [R0, #94] 0x3418C200: 3801 SUBS R0, #1 0x3418C202: F88D 001F STRB.W R0, [SP, #31] 0x3418C206: 980C LDR R0, [SP, #48] 0x3418C208: 3008 ADDS R0, #8 0x3418C20A: 2104 MOVS R1, #4 0x3418C20C: F10D 021F ADD.W R2, SP, #31 0x3418C210: F007 F8E2 BL SAL_XSPI_MemoryConfig ; 0x341933D8 0x3418C214: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C218: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C21C: 9004 STR R0, [SP, #16] 0x3418C21E: 6AC1 LDR R1, [R0, #44] 0x3418C220: F3C1 1203 UBFX R2, R1, #4, #4 0x3418C224: 2101 MOVS R1, #1 0x3418C226: 4091 LSLS R1, R2 0x3418C228: 9A0C LDR R2, [SP, #48] 0x3418C22A: 6611 STR R1, [R2, #96] 0x3418C22C: 9A0C LDR R2, [SP, #48] 0x3418C22E: 2102 MOVS R1, #2 0x3418C230: F882 1075 STRB.W R1, [R2, #117] 0x3418C234: 6A01 LDR R1, [R0, #32] 0x3418C236: 9A0C LDR R2, [SP, #48] 0x3418C238: F882 1077 STRB.W R1, [R2, #119] 0x3418C23C: 6A01 LDR R1, [R0, #32] 0x3418C23E: 0A09 LSRS R1, R1, #8 0x3418C240: 9A0C LDR R2, [SP, #48] 0x3418C242: F882 1078 STRB.W R1, [R2, #120] 0x3418C246: 8C41 LDRH R1, [R0, #34] 0x3418C248: 9A0C LDR R2, [SP, #48] 0x3418C24A: F882 1079 STRB.W R1, [R2, #121] 0x3418C24E: F890 1023 LDRB.W R1, [R0, #35] 0x3418C252: 9A0C LDR R2, [SP, #48] 0x3418C254: F882 107A STRB.W R1, [R2, #122] 0x3418C258: 6A41 LDR R1, [R0, #36] 0x3418C25A: 9A0C LDR R2, [SP, #48] 0x3418C25C: F882 107B STRB.W R1, [R2, #123] 0x3418C260: 6A41 LDR R1, [R0, #36] 0x3418C262: 0A09 LSRS R1, R1, #8 0x3418C264: 9A0C LDR R2, [SP, #48] 0x3418C266: F882 107C STRB.W R1, [R2, #124] 0x3418C26A: 8CC1 LDRH R1, [R0, #38] 0x3418C26C: 9A0C LDR R2, [SP, #48] 0x3418C26E: F882 107D STRB.W R1, [R2, #125] 0x3418C272: F890 0027 LDRB.W R0, [R0, #39] 0x3418C276: 990C LDR R1, [SP, #48] 0x3418C278: F881 007E STRB.W R0, [R1, #126] 0x3418C27C: 980C LDR R0, [SP, #48] 0x3418C27E: F890 0077 LDRB.W R0, [R0, #119] 0x3418C282: B1B0 CBZ R0, .L4 ; 0x3418C2B2 0x3418C284: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C288: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C28C: 6A81 LDR R1, [R0, #40] 0x3418C28E: F001 000F AND R0, R1, #15 0x3418C292: F3C1 1204 UBFX R2, R1, #4, #5 0x3418C296: 3201 ADDS R2, #1 0x3418C298: 4350 MULS R0, R2, R0 0x3418C29A: F3C1 2241 UBFX R2, R1, #9, #2 0x3418C29E: F643 513E MOVW R1, #0x3D3E ; 0x34193D3E = SFDP_BuildGenericDriver.block_erase_unit 0x3418C2A2: F2C3 4119 MOVT R1, #0x3419 ; 0x34193D3E = SFDP_BuildGenericDriver.block_erase_unit 0x3418C2A6: F831 1012 LDRH.W R1, [R1, R2, LSL #1] 0x3418C2AA: 4348 MULS R0, R1, R0 0x3418C2AC: 990C LDR R1, [SP, #48] 0x3418C2AE: F8C1 0080 STR.W R0, [R1, #128]
.L4: 0x3418C2B2: 980C LDR R0, [SP, #48] 0x3418C2B4: F890 0079 LDRB.W R0, [R0, #121] 0x3418C2B8: B1B0 CBZ R0, .L5 ; 0x3418C2E8 0x3418C2BA: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C2BE: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C2C2: 6A81 LDR R1, [R0, #40] 0x3418C2C4: F001 000F AND R0, R1, #15 0x3418C2C8: F3C1 22C4 UBFX R2, R1, #11, #5 0x3418C2CC: 3201 ADDS R2, #1 0x3418C2CE: 4350 MULS R0, R2, R0 0x3418C2D0: F3C1 4201 UBFX R2, R1, #16, #2 0x3418C2D4: F643 513E MOVW R1, #0x3D3E ; 0x34193D3E = SFDP_BuildGenericDriver.block_erase_unit 0x3418C2D8: F2C3 4119 MOVT R1, #0x3419 ; 0x34193D3E = SFDP_BuildGenericDriver.block_erase_unit 0x3418C2DC: F831 1012 LDRH.W R1, [R1, R2, LSL #1] 0x3418C2E0: 4348 MULS R0, R1, R0 0x3418C2E2: 990C LDR R1, [SP, #48] 0x3418C2E4: F8C1 0084 STR.W R0, [R1, #132]
.L5: 0x3418C2E8: 980C LDR R0, [SP, #48] 0x3418C2EA: F890 007B LDRB.W R0, [R0, #123] 0x3418C2EE: B1B0 CBZ R0, .L6 ; 0x3418C31E 0x3418C2F0: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C2F4: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C2F8: 6A81 LDR R1, [R0, #40] 0x3418C2FA: F001 000F AND R0, R1, #15 0x3418C2FE: F3C1 4284 UBFX R2, R1, #18, #5 0x3418C302: 3201 ADDS R2, #1 0x3418C304: 4350 MULS R0, R2, R0 0x3418C306: F3C1 52C1 UBFX R2, R1, #23, #2 0x3418C30A: F643 513E MOVW R1, #0x3D3E ; 0x34193D3E = SFDP_BuildGenericDriver.block_erase_unit 0x3418C30E: F2C3 4119 MOVT R1, #0x3419 ; 0x34193D3E = SFDP_BuildGenericDriver.block_erase_unit 0x3418C312: F831 1012 LDRH.W R1, [R1, R2, LSL #1] 0x3418C316: 4348 MULS R0, R1, R0 0x3418C318: 990C LDR R1, [SP, #48] 0x3418C31A: F8C1 0088 STR.W R0, [R1, #136]
.L6: 0x3418C31E: 980C LDR R0, [SP, #48] 0x3418C320: F890 007D LDRB.W R0, [R0, #125] 0x3418C324: B1A8 CBZ R0, .L7 ; 0x3418C352 0x3418C326: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C32A: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C32E: 6A81 LDR R1, [R0, #40] 0x3418C330: F001 000F AND R0, R1, #15 0x3418C334: F3C1 6244 UBFX R2, R1, #25, #5 0x3418C338: 3201 ADDS R2, #1 0x3418C33A: 4350 MULS R0, R2, R0 0x3418C33C: 0F8A LSRS R2, R1, #30 0x3418C33E: F643 513E MOVW R1, #0x3D3E ; 0x34193D3E = SFDP_BuildGenericDriver.block_erase_unit 0x3418C342: F2C3 4119 MOVT R1, #0x3419 ; 0x34193D3E = SFDP_BuildGenericDriver.block_erase_unit 0x3418C346: F831 1012 LDRH.W R1, [R1, R2, LSL #1] 0x3418C34A: 4348 MULS R0, R1, R0 0x3418C34C: 990C LDR R1, [SP, #48] 0x3418C34E: F8C1 008C STR.W R0, [R1, #140]
.L7: 0x3418C352: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C356: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C35A: 6A81 LDR R1, [R0, #40] 0x3418C35C: 6AC2 LDR R2, [R0, #44] 0x3418C35E: F001 010F AND R1, R1, #15 0x3418C362: F3C2 6304 UBFX R3, R2, #24, #5 0x3418C366: 3301 ADDS R3, #1 0x3418C368: 4359 MULS R1, R3, R1 0x3418C36A: F3C2 7341 UBFX R3, R2, #29, #2 0x3418C36E: F24D 623C MOVW R2, #0xD63C ; 0x3418D63C = SFDP_BuildGenericDriver.chip_erase_unit 0x3418C372: F2C3 4218 MOVT R2, #0x3418 ; 0x3418D63C = SFDP_BuildGenericDriver.chip_erase_unit 0x3418C376: F852 2023 LDR.W R2, [R2, R3, LSL #2] 0x3418C37A: 4351 MULS R1, R2, R1 0x3418C37C: 9A0C LDR R2, [SP, #48] 0x3418C37E: F8C2 1090 STR.W R1, [R2, #144] 0x3418C382: 9A0C LDR R2, [SP, #48] 0x3418C384: 2105 MOVS R1, #5 0x3418C386: F882 1071 STRB.W R1, [R2, #113] 0x3418C38A: 9A0C LDR R2, [SP, #48] 0x3418C38C: F882 106C STRB.W R1, [R2, #108] 0x3418C390: 6840 LDR R0, [R0, #4] 0x3418C392: 0900 LSRS R0, R0, #4 0x3418C394: 07C0 LSLS R0, R0, #31 0x3418C396: B920 CBNZ R0, .L8 ; 0x3418C3A2 0x3418C398: 990C LDR R1, [SP, #48] 0x3418C39A: 2050 MOVS R0, #80 0x3418C39C: F881 0070 STRB.W R0, [R1, #112] 0x3418C3A0: E003 B 46L9 ; 0x3418C3AA
.L8: 0x3418C3A2: 990C LDR R1, [SP, #48] 0x3418C3A4: 2006 MOVS R0, #6 0x3418C3A6: F881 0070 STRB.W R0, [R1, #112]
.L9: 0x3418C3AA: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C3AE: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C3B2: F890 0040 LDRB.W R0, [R0, #64] 0x3418C3B6: 07C0 LSLS R0, R0, #31 0x3418C3B8: B120 CBZ R0, .L10 ; 0x3418C3C4 0x3418C3BA: 990C LDR R1, [SP, #48] 0x3418C3BC: 2006 MOVS R0, #6 0x3418C3BE: F881 0070 STRB.W R0, [R1, #112] 0x3418C3C2: E03C B 46L15 ; 0x3418C43E
.L10: 0x3418C3C4: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C3C8: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C3CC: F890 0040 LDRB.W R0, [R0, #64] 0x3418C3D0: 0780 LSLS R0, R0, #30 0x3418C3D2: 2800 CMP R0, #0 0x3418C3D4: D504 BPL 46L11 ; 0x3418C3E0 0x3418C3D6: 990C LDR R1, [SP, #48] 0x3418C3D8: 2006 MOVS R0, #6 0x3418C3DA: F881 0070 STRB.W R0, [R1, #112] 0x3418C3DE: E02E B 46L15 ; 0x3418C43E
.L11: 0x3418C3E0: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C3E4: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C3E8: F890 0040 LDRB.W R0, [R0, #64] 0x3418C3EC: 0740 LSLS R0, R0, #29 0x3418C3EE: 2800 CMP R0, #0 0x3418C3F0: D504 BPL 46L12 ; 0x3418C3FC 0x3418C3F2: 990C LDR R1, [SP, #48] 0x3418C3F4: 2050 MOVS R0, #80 0x3418C3F6: F881 0070 STRB.W R0, [R1, #112] 0x3418C3FA: E020 B 46L15 ; 0x3418C43E
.L12: 0x3418C3FC: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C400: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C404: F890 0040 LDRB.W R0, [R0, #64] 0x3418C408: 0700 LSLS R0, R0, #28 0x3418C40A: 2800 CMP R0, #0 0x3418C40C: D504 BPL 46L13 ; 0x3418C418 0x3418C40E: 990C LDR R1, [SP, #48] 0x3418C410: 2006 MOVS R0, #6 0x3418C412: F881 0070 STRB.W R0, [R1, #112] 0x3418C416: E012 B 46L15 ; 0x3418C43E
.L13: 0x3418C418: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C41C: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C420: F890 0040 LDRB.W R0, [R0, #64] 0x3418C424: 06C0 LSLS R0, R0, #27 0x3418C426: 2800 CMP R0, #0 0x3418C428: D504 BPL 46L14 ; 0x3418C434 0x3418C42A: 990C LDR R1, [SP, #48] 0x3418C42C: 2006 MOVS R0, #6 0x3418C42E: F881 0070 STRB.W R0, [R1, #112] 0x3418C432: E004 B 46L15 ; 0x3418C43E
.L14: 0x3418C434: 200A MOVS R0, #10 0x3418C436: F88D 002B STRB.W R0, [SP, #43] 0x3418C43A: F000 BCA9 B.W 46L83 ; 0x3418CD90
.L15: 0x3418C43E: 980C LDR R0, [SP, #48] 0x3418C440: F890 0095 LDRB.W R0, [R0, #149] 0x3418C444: 0780 LSLS R0, R0, #30 0x3418C446: 2800 CMP R0, #0 0x3418C448: D56A BPL 46L20 ; 0x3418C520 0x3418C44A: F240 10CC MOVW R0, #0x01CC ; 0x340001CC = JEDEC_SCCR_Map 0x3418C44E: F2C3 4000 MOVT R0, #0x3400 ; 0x340001CC = JEDEC_SCCR_Map 0x3418C452: 6900 LDR R0, [R0, #16] 0x3418C454: 0FC0 LSRS R0, R0, #31 0x3418C456: B368 CBZ R0, .L17 ; 0x3418C4B4 0x3418C458: F240 10CC MOVW R0, #0x01CC ; 0x340001CC = JEDEC_SCCR_Map 0x3418C45C: F2C3 4000 MOVT R0, #0x3400 ; 0x340001CC = JEDEC_SCCR_Map 0x3418C460: 6901 LDR R1, [R0, #16] 0x3418C462: 0A09 LSRS R1, R1, #8 0x3418C464: 9A0C LDR R2, [SP, #48] 0x3418C466: F882 106C STRB.W R1, [R2, #108] 0x3418C46A: 7CC1 LDRB R1, [R0, #19] 0x3418C46C: F001 0107 AND R1, R1, #7 0x3418C470: 9A0C LDR R2, [SP, #48] 0x3418C472: F882 106D STRB.W R1, [R2, #109] 0x3418C476: 6901 LDR R1, [R0, #16] 0x3418C478: F3C1 7180 UBFX R1, R1, #30, #1 0x3418C47C: 9A0C LDR R2, [SP, #48] 0x3418C47E: F882 106E STRB.W R1, [R2, #110] 0x3418C482: 7CC1 LDRB R1, [R0, #19] 0x3418C484: F001 0107 AND R1, R1, #7 0x3418C488: 9A0C LDR R2, [SP, #48] 0x3418C48A: F882 106D STRB.W R1, [R2, #109] 0x3418C48E: 6900 LDR R0, [R0, #16] 0x3418C490: 0F00 LSRS R0, R0, #28 0x3418C492: 07C0 LSLS R0, R0, #31 0x3418C494: B150 CBZ R0, .L16 ; 0x3418C4AC 0x3418C496: F240 10CC MOVW R0, #0x01CC ; 0x340001CC = JEDEC_SCCR_Map 0x3418C49A: F2C3 4000 MOVT R0, #0x3400 ; 0x340001CC = JEDEC_SCCR_Map 0x3418C49E: 6900 LDR R0, [R0, #16] 0x3418C4A0: F3C0 60C0 UBFX R0, R0, #27, #1 0x3418C4A4: 990C LDR R1, [SP, #48] 0x3418C4A6: F881 006F STRB.W R0, [R1, #111] 0x3418C4AA: E003 B 46L17 ; 0x3418C4B4
.L16: 0x3418C4AC: 990C LDR R1, [SP, #48] 0x3418C4AE: 20FF MOVS R0, #255 0x3418C4B0: F881 006F STRB.W R0, [R1, #111]
.L17: 0x3418C4B4: F240 10CC MOVW R0, #0x01CC ; 0x340001CC = JEDEC_SCCR_Map 0x3418C4B8: F2C3 4000 MOVT R0, #0x3400 ; 0x340001CC = JEDEC_SCCR_Map 0x3418C4BC: 6940 LDR R0, [R0, #20] 0x3418C4BE: 0FC0 LSRS R0, R0, #31 0x3418C4C0: B368 CBZ R0, .L19 ; 0x3418C51E 0x3418C4C2: F240 10CC MOVW R0, #0x01CC ; 0x340001CC = JEDEC_SCCR_Map 0x3418C4C6: F2C3 4000 MOVT R0, #0x3400 ; 0x340001CC = JEDEC_SCCR_Map 0x3418C4CA: 6941 LDR R1, [R0, #20] 0x3418C4CC: 0A09 LSRS R1, R1, #8 0x3418C4CE: 9A0C LDR R2, [SP, #48] 0x3418C4D0: F882 1071 STRB.W R1, [R2, #113] 0x3418C4D4: 7DC1 LDRB R1, [R0, #23] 0x3418C4D6: F001 0107 AND R1, R1, #7 0x3418C4DA: 9A0C LDR R2, [SP, #48] 0x3418C4DC: F882 1072 STRB.W R1, [R2, #114] 0x3418C4E0: 6941 LDR R1, [R0, #20] 0x3418C4E2: F3C1 7180 UBFX R1, R1, #30, #1 0x3418C4E6: 9A0C LDR R2, [SP, #48] 0x3418C4E8: F882 1073 STRB.W R1, [R2, #115] 0x3418C4EC: 7DC1 LDRB R1, [R0, #23] 0x3418C4EE: F001 0107 AND R1, R1, #7 0x3418C4F2: 9A0C LDR R2, [SP, #48] 0x3418C4F4: F882 1072 STRB.W R1, [R2, #114] 0x3418C4F8: 6900 LDR R0, [R0, #16] 0x3418C4FA: 0F00 LSRS R0, R0, #28 0x3418C4FC: 07C0 LSLS R0, R0, #31 0x3418C4FE: B150 CBZ R0, .L18 ; 0x3418C516 0x3418C500: F240 10CC MOVW R0, #0x01CC ; 0x340001CC = JEDEC_SCCR_Map 0x3418C504: F2C3 4000 MOVT R0, #0x3400 ; 0x340001CC = JEDEC_SCCR_Map 0x3418C508: 6940 LDR R0, [R0, #20] 0x3418C50A: F3C0 60C0 UBFX R0, R0, #27, #1 0x3418C50E: 990C LDR R1, [SP, #48] 0x3418C510: F881 0074 STRB.W R0, [R1, #116] 0x3418C514: E003 B 46L19 ; 0x3418C51E
.L18: 0x3418C516: 990C LDR R1, [SP, #48] 0x3418C518: 20FF MOVS R0, #255 0x3418C51A: F881 0074 STRB.W R0, [R1, #116]
.L19: 0x3418C51E: E036 B 46L23 ; 0x3418C58E
.L20: 0x3418C520: 990C LDR R1, [SP, #48] 0x3418C522: 2001 MOVS R0, #1 0x3418C524: F881 0072 STRB.W R0, [R1, #114] 0x3418C528: 990C LDR R1, [SP, #48] 0x3418C52A: 2000 MOVS R0, #0 0x3418C52C: F881 0073 STRB.W R0, [R1, #115] 0x3418C530: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C534: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C538: 6B80 LDR R0, [R0, #56] 0x3418C53A: 0880 LSRS R0, R0, #2 0x3418C53C: 07C0 LSLS R0, R0, #31 0x3418C53E: B158 CBZ R0, .L21 ; 0x3418C558 0x3418C540: 990C LDR R1, [SP, #48] 0x3418C542: 2005 MOVS R0, #5 0x3418C544: F881 006C STRB.W R0, [R1, #108] 0x3418C548: 990C LDR R1, [SP, #48] 0x3418C54A: 2000 MOVS R0, #0 0x3418C54C: F881 006D STRB.W R0, [R1, #109] 0x3418C550: 990C LDR R1, [SP, #48] 0x3418C552: F881 006E STRB.W R0, [R1, #110] 0x3418C556: E01A B 46L23 ; 0x3418C58E
.L21: 0x3418C558: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C55C: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C560: 6B80 LDR R0, [R0, #56] 0x3418C562: 0880 LSRS R0, R0, #2 0x3418C564: 0780 LSLS R0, R0, #30 0x3418C566: 2800 CMP R0, #0 0x3418C568: D50C BPL 46L22 ; 0x3418C584 0x3418C56A: 990C LDR R1, [SP, #48] 0x3418C56C: 2070 MOVS R0, #112 0x3418C56E: F881 006C STRB.W R0, [R1, #108] 0x3418C572: 990C LDR R1, [SP, #48] 0x3418C574: 2007 MOVS R0, #7 0x3418C576: F881 006D STRB.W R0, [R1, #109] 0x3418C57A: 990C LDR R1, [SP, #48] 0x3418C57C: 2001 MOVS R0, #1 0x3418C57E: F881 006E STRB.W R0, [R1, #110] 0x3418C582: E004 B 46L23 ; 0x3418C58E
.L22: 0x3418C584: 2009 MOVS R0, #9 0x3418C586: F88D 002B STRB.W R0, [SP, #43] 0x3418C58A: F000 BC01 B.W 46L83 ; 0x3418CD90
.L23: 0x3418C58E: 990C LDR R1, [SP, #48] 0x3418C590: 2003 MOVS R0, #3 0x3418C592: F881 0076 STRB.W R0, [R1, #118] 0x3418C596: 2000 MOVS R0, #0 0x3418C598: 9009 STR R0, [SP, #36] 0x3418C59A: 980C LDR R0, [SP, #48] 0x3418C59C: 3008 ADDS R0, #8 0x3418C59E: 2101 MOVS R1, #1 0x3418C5A0: AA09 ADD R2, SP, #36 0x3418C5A2: F006 FF19 BL SAL_XSPI_MemoryConfig ; 0x341933D8 0x3418C5A6: 980C LDR R0, [SP, #48] 0x3418C5A8: F890 0094 LDRB.W R0, [R0, #148] 0x3418C5AC: 0700 LSLS R0, R0, #28 0x3418C5AE: 2800 CMP R0, #0 0x3418C5B0: F140 80EB BPL.W 46L35 ; 0x3418C78A 0x3418C5B4: 980C LDR R0, [SP, #48] 0x3418C5B6: F890 005C LDRB.W R0, [R0, #92] 0x3418C5BA: 2802 CMP R0, #2 0x3418C5BC: F300 80E5 BGT.W 46L35 ; 0x3418C78A 0x3418C5C0: 990C LDR R1, [SP, #48] 0x3418C5C2: 2000 MOVS R0, #0 0x3418C5C4: F881 0064 STRB.W R0, [R1, #100] 0x3418C5C8: 980C LDR R0, [SP, #48] 0x3418C5CA: F890 005C LDRB.W R0, [R0, #92] 0x3418C5CE: 2801 CMP R0, #1 0x3418C5D0: DB48 BLT 46L26 ; 0x3418C664 0x3418C5D2: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C5D6: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C5DA: 7C40 LDRB R0, [R0, #17] 0x3418C5DC: B198 CBZ R0, .L24 ; 0x3418C606 0x3418C5DE: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C5E2: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C5E6: 6902 LDR R2, [R0, #16] 0x3418C5E8: F002 011F AND R1, R2, #31 0x3418C5EC: F3C2 1242 UBFX R2, R2, #5, #3 0x3418C5F0: 4411 ADD R1, R2 0x3418C5F2: 9109 STR R1, [SP, #36] 0x3418C5F4: 6900 LDR R0, [R0, #16] 0x3418C5F6: 0A00 LSRS R0, R0, #8 0x3418C5F8: 990C LDR R1, [SP, #48] 0x3418C5FA: F881 0076 STRB.W R0, [R1, #118] 0x3418C5FE: 990C LDR R1, [SP, #48] 0x3418C600: 2001 MOVS R0, #1 0x3418C602: F881 0064 STRB.W R0, [R1, #100]
.L24: 0x3418C606: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C60A: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C60E: 7CC0 LDRB R0, [R0, #19] 0x3418C610: B190 CBZ R0, .L25 ; 0x3418C638 0x3418C612: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C616: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C61A: 6902 LDR R2, [R0, #16] 0x3418C61C: F3C2 4104 UBFX R1, R2, #16, #5 0x3418C620: F3C2 5242 UBFX R2, R2, #21, #3 0x3418C624: 4411 ADD R1, R2 0x3418C626: 9109 STR R1, [SP, #36] 0x3418C628: 7CC0 LDRB R0, [R0, #19] 0x3418C62A: 990C LDR R1, [SP, #48] 0x3418C62C: F881 0076 STRB.W R0, [R1, #118] 0x3418C630: 990C LDR R1, [SP, #48] 0x3418C632: 2002 MOVS R0, #2 0x3418C634: F881 0064 STRB.W R0, [R1, #100]
.L25: 0x3418C638: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C63C: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C640: 7D00 LDRB R0, [R0, #20] 0x3418C642: 07C0 LSLS R0, R0, #31 0x3418C644: B170 CBZ R0, .L26 ; 0x3418C664 0x3418C646: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C64A: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C64E: 6982 LDR R2, [R0, #24] 0x3418C650: F3C2 4104 UBFX R1, R2, #16, #5 0x3418C654: F3C2 5242 UBFX R2, R2, #21, #3 0x3418C658: 4411 ADD R1, R2 0x3418C65A: 9109 STR R1, [SP, #36] 0x3418C65C: 7EC0 LDRB R0, [R0, #27] 0x3418C65E: 990C LDR R1, [SP, #48] 0x3418C660: F881 0076 STRB.W R0, [R1, #118]
.L26: 0x3418C664: 980C LDR R0, [SP, #48] 0x3418C666: F890 005C LDRB.W R0, [R0, #92] 0x3418C66A: 2802 CMP R0, #2 0x3418C66C: DB75 BLT 46L33 ; 0x3418C75A 0x3418C66E: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C672: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C676: 6940 LDR R0, [R0, #20] 0x3418C678: 0900 LSRS R0, R0, #4 0x3418C67A: 07C0 LSLS R0, R0, #31 0x3418C67C: B1E0 CBZ R0, .L28 ; 0x3418C6B8 0x3418C67E: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C682: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C686: 69C2 LDR R2, [R0, #28] 0x3418C688: F3C2 4104 UBFX R1, R2, #16, #5 0x3418C68C: F3C2 5242 UBFX R2, R2, #21, #3 0x3418C690: 4411 ADD R1, R2 0x3418C692: 9109 STR R1, [SP, #36] 0x3418C694: 7FC0 LDRB R0, [R0, #31] 0x3418C696: 990C LDR R1, [SP, #48] 0x3418C698: F881 0076 STRB.W R0, [R1, #118] 0x3418C69C: 990C LDR R1, [SP, #48] 0x3418C69E: 2006 MOVS R0, #6 0x3418C6A0: F881 0064 STRB.W R0, [R1, #100] 0x3418C6A4: 980C LDR R0, [SP, #48] 0x3418C6A6: F000 FB77 BL JEDEC_Basic_Manage4S4S4SEnableSequence ; 0x3418CD98 0x3418C6AA: F88D 002B STRB.W R0, [SP, #43] 0x3418C6AE: F89D 002B LDRB.W R0, [SP, #43] 0x3418C6B2: B100 CBZ R0, .L27 ; 0x3418C6B6 0x3418C6B4: E36C B 46L83 ; 0x3418CD90
.L27: 0x3418C6B6: E04A B 46L32 ; 0x3418C74E
.L28: 0x3418C6B8: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C6BC: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C6C0: 6840 LDR R0, [R0, #4] 0x3418C6C2: 0D40 LSRS R0, R0, #21 0x3418C6C4: 07C0 LSLS R0, R0, #31 0x3418C6C6: B1E8 CBZ R0, .L30 ; 0x3418C704 0x3418C6C8: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C6CC: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C6D0: 68C2 LDR R2, [R0, #12] 0x3418C6D2: F002 011F AND R1, R2, #31 0x3418C6D6: F3C2 1242 UBFX R2, R2, #5, #3 0x3418C6DA: 4411 ADD R1, R2 0x3418C6DC: 9109 STR R1, [SP, #36] 0x3418C6DE: 68C0 LDR R0, [R0, #12] 0x3418C6E0: 0A00 LSRS R0, R0, #8 0x3418C6E2: 990C LDR R1, [SP, #48] 0x3418C6E4: F881 0076 STRB.W R0, [R1, #118] 0x3418C6E8: 990C LDR R1, [SP, #48] 0x3418C6EA: 2005 MOVS R0, #5 0x3418C6EC: F881 0064 STRB.W R0, [R1, #100] 0x3418C6F0: 980C LDR R0, [SP, #48] 0x3418C6F2: F006 FBBD BL JEDEC_Basic_ManageQuadEnableRequirement ; 0x34192E70 0x3418C6F6: F88D 002B STRB.W R0, [SP, #43] 0x3418C6FA: F89D 002B LDRB.W R0, [SP, #43] 0x3418C6FE: B100 CBZ R0, .L29 ; 0x3418C702 0x3418C700: E346 B 46L83 ; 0x3418CD90
.L29: 0x3418C702: E024 B 46L32 ; 0x3418C74E
.L30: 0x3418C704: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C708: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C70C: 6840 LDR R0, [R0, #4] 0x3418C70E: 0D80 LSRS R0, R0, #22 0x3418C710: 07C0 LSLS R0, R0, #31 0x3418C712: B1E0 CBZ R0, .L32 ; 0x3418C74E 0x3418C714: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C718: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C71C: 68C2 LDR R2, [R0, #12] 0x3418C71E: F3C2 4104 UBFX R1, R2, #16, #5 0x3418C722: F3C2 5242 UBFX R2, R2, #21, #3 0x3418C726: 4411 ADD R1, R2 0x3418C728: 9109 STR R1, [SP, #36] 0x3418C72A: 7BC0 LDRB R0, [R0, #15] 0x3418C72C: 990C LDR R1, [SP, #48] 0x3418C72E: F881 0076 STRB.W R0, [R1, #118] 0x3418C732: 990C LDR R1, [SP, #48] 0x3418C734: 2004 MOVS R0, #4 0x3418C736: F881 0064 STRB.W R0, [R1, #100] 0x3418C73A: 980C LDR R0, [SP, #48] 0x3418C73C: F006 FB98 BL JEDEC_Basic_ManageQuadEnableRequirement ; 0x34192E70 0x3418C740: F88D 002B STRB.W R0, [SP, #43] 0x3418C744: F89D 002B LDRB.W R0, [SP, #43] 0x3418C748: B100 CBZ R0, .L31 ; 0x3418C74C 0x3418C74A: E321 B 46L83 ; 0x3418CD90
.L31: 0x3418C74C: E7FF B 46L32 ; 0x3418C74E
.L32: 0x3418C74E: 980C LDR R0, [SP, #48] 0x3418C750: 3008 ADDS R0, #8 0x3418C752: 2101 MOVS R1, #1 0x3418C754: AA09 ADD R2, SP, #36 0x3418C756: F006 FE3F BL SAL_XSPI_MemoryConfig ; 0x341933D8
.L33: 0x3418C75A: 990C LDR R1, [SP, #48] 0x3418C75C: F101 0008 ADD.W R0, R1, #8 0x3418C760: F101 0264 ADD.W R2, R1, #100 0x3418C764: 2100 MOVS R1, #0 0x3418C766: F006 FE37 BL SAL_XSPI_MemoryConfig ; 0x341933D8 0x3418C76A: B118 CBZ R0, .L34 ; 0x3418C774 0x3418C76C: 200C MOVS R0, #12 0x3418C76E: F88D 002B STRB.W R0, [SP, #43] 0x3418C772: E30D B 46L83 ; 0x3418CD90
.L34: 0x3418C774: 980C LDR R0, [SP, #48] 0x3418C776: 3008 ADDS R0, #8 0x3418C778: 2101 MOVS R1, #1 0x3418C77A: AA09 ADD R2, SP, #36 0x3418C77C: F006 FE2C BL SAL_XSPI_MemoryConfig ; 0x341933D8 0x3418C780: B118 CBZ R0, .L35 ; 0x3418C78A 0x3418C782: 200C MOVS R0, #12 0x3418C784: F88D 002B STRB.W R0, [SP, #43] 0x3418C788: E302 B 46L83 ; 0x3418CD90
.L35: 0x3418C78A: 980C LDR R0, [SP, #48] 0x3418C78C: F890 0095 LDRB.W R0, [R0, #149] 0x3418C790: 06C0 LSLS R0, R0, #27 0x3418C792: 2800 CMP R0, #0 0x3418C794: F140 8081 BPL.W 46L45 ; 0x3418C89A 0x3418C798: 980C LDR R0, [SP, #48] 0x3418C79A: F890 005C LDRB.W R0, [R0, #92] 0x3418C79E: 2803 CMP R0, #3 0x3418C7A0: D17B BNE 46L45 ; 0x3418C89A 0x3418C7A2: 980C LDR R0, [SP, #48] 0x3418C7A4: F890 0064 LDRB.W R0, [R0, #100] 0x3418C7A8: 280B CMP R0, #11 0x3418C7AA: D103 BNE 46L36 ; 0x3418C7B4 0x3418C7AC: 2001 MOVS R0, #1 0x3418C7AE: F88D 002A STRB.W R0, [SP, #42] 0x3418C7B2: E03C B 46L42 ; 0x3418C82E
.L36: 0x3418C7B4: 980C LDR R0, [SP, #48] 0x3418C7B6: F006 FC05 BL sfdp_enter_octal_mode ; 0x34192FC4 0x3418C7BA: BBC0 CBNZ R0, .L42 ; 0x3418C82E 0x3418C7BC: 2001 MOVS R0, #1 0x3418C7BE: F88D 002A STRB.W R0, [SP, #42] 0x3418C7C2: 980C LDR R0, [SP, #48] 0x3418C7C4: F890 005D LDRB.W R0, [R0, #93] 0x3418C7C8: 28C8 CMP R0, #200 0x3418C7CA: D104 BNE 46L37 ; 0x3418C7D6 0x3418C7CC: 990C LDR R1, [SP, #48] 0x3418C7CE: 200A MOVS R0, #10 0x3418C7D0: F881 0064 STRB.W R0, [R1, #100] 0x3418C7D4: E003 B 46L38 ; 0x3418C7DE
.L37: 0x3418C7D6: 990C LDR R1, [SP, #48] 0x3418C7D8: 200B MOVS R0, #11 0x3418C7DA: F881 0064 STRB.W R0, [R1, #100]
.L38: 0x3418C7DE: 990C LDR R1, [SP, #48] 0x3418C7E0: F101 0008 ADD.W R0, R1, #8 0x3418C7E4: F101 0264 ADD.W R2, R1, #100 0x3418C7E8: 2100 MOVS R1, #0 0x3418C7EA: F006 FDF5 BL SAL_XSPI_MemoryConfig ; 0x341933D8 0x3418C7EE: B118 CBZ R0, .L39 ; 0x3418C7F8 0x3418C7F0: 200C MOVS R0, #12 0x3418C7F2: F88D 002B STRB.W R0, [SP, #43] 0x3418C7F6: E2CB B 46L83 ; 0x3418CD90
.L39: 0x3418C7F8: 980C LDR R0, [SP, #48] 0x3418C7FA: F890 009D LDRB.W R0, [R0, #157] 0x3418C7FE: 28FD CMP R0, #253 0x3418C800: D107 BNE 46L40 ; 0x3418C812 0x3418C802: 2014 MOVS R0, #20 0x3418C804: 9009 STR R0, [SP, #36] 0x3418C806: 980C LDR R0, [SP, #48] 0x3418C808: 3008 ADDS R0, #8 0x3418C80A: 2101 MOVS R1, #1 0x3418C80C: AA09 ADD R2, SP, #36 0x3418C80E: F006 FDE3 BL SAL_XSPI_MemoryConfig ; 0x341933D8
.L40: 0x3418C812: 980C LDR R0, [SP, #48] 0x3418C814: F890 009D LDRB.W R0, [R0, #157] 0x3418C818: 28FE CMP R0, #254 0x3418C81A: D107 BNE 46L41 ; 0x3418C82C 0x3418C81C: 2008 MOVS R0, #8 0x3418C81E: 9009 STR R0, [SP, #36] 0x3418C820: 980C LDR R0, [SP, #48] 0x3418C822: 3008 ADDS R0, #8 0x3418C824: 2101 MOVS R1, #1 0x3418C826: AA09 ADD R2, SP, #36 0x3418C828: F006 FDD6 BL SAL_XSPI_MemoryConfig ; 0x341933D8
.L41: 0x3418C82C: E7FF B 46L42 ; 0x3418C82E
.L42: 0x3418C82E: 980C LDR R0, [SP, #48] 0x3418C830: F890 0094 LDRB.W R0, [R0, #148] 0x3418C834: 0700 LSLS R0, R0, #28 0x3418C836: 2800 CMP R0, #0 0x3418C838: D51D BPL 46L44 ; 0x3418C876 0x3418C83A: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C83E: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C842: 6800 LDR R0, [R0] 0x3418C844: 2811 CMP R0, #17 0x3418C846: D316 BCC 46L44 ; 0x3418C876 0x3418C848: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C84C: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C850: 6C80 LDR R0, [R0, #72] 0x3418C852: F3C0 7041 UBFX R0, R0, #29, #2 0x3418C856: 2802 CMP R0, #2 0x3418C858: D303 BCC 46L43 ; 0x3418C862 0x3418C85A: 200F MOVS R0, #15 0x3418C85C: F88D 002B STRB.W R0, [SP, #43] 0x3418C860: E296 B 46L83 ; 0x3418CD90
.L43: 0x3418C862: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C866: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C86A: 6C80 LDR R0, [R0, #72] 0x3418C86C: F3C0 7041 UBFX R0, R0, #29, #2 0x3418C870: 990C LDR R1, [SP, #48] 0x3418C872: F881 0058 STRB.W R0, [R1, #88]
.L44: 0x3418C876: 980C LDR R0, [SP, #48] 0x3418C878: F890 0094 LDRB.W R0, [R0, #148] 0x3418C87C: 0600 LSLS R0, R0, #24 0x3418C87E: 2800 CMP R0, #0 0x3418C880: D50B BPL 46L45 ; 0x3418C89A 0x3418C882: F240 3020 MOVW R0, #0x0320 ; 0x34000320 = JEDEC_XSPI10 0x3418C886: F2C3 4000 MOVT R0, #0x3400 ; 0x34000320 = JEDEC_XSPI10 0x3418C88A: 6800 LDR R0, [R0] 0x3418C88C: 0F80 LSRS R0, R0, #30 0x3418C88E: 07C0 LSLS R0, R0, #31 0x3418C890: B118 CBZ R0, .L45 ; 0x3418C89A 0x3418C892: 990C LDR R1, [SP, #48] 0x3418C894: 2014 MOVS R0, #20 0x3418C896: F881 0059 STRB.W R0, [R1, #89]
.L45: 0x3418C89A: 980C LDR R0, [SP, #48] 0x3418C89C: 2164 MOVS R1, #100 0x3418C89E: F006 FC83 BL driver_check_FlagBUSY ; 0x341931A8 0x3418C8A2: B118 CBZ R0, .L46 ; 0x3418C8AC 0x3418C8A4: 200C MOVS R0, #12 0x3418C8A6: F88D 002B STRB.W R0, [SP, #43] 0x3418C8AA: E271 B 46L83 ; 0x3418CD90
.L46: 0x3418C8AC: 980C LDR R0, [SP, #48] 0x3418C8AE: F890 0094 LDRB.W R0, [R0, #148] 0x3418C8B2: 0640 LSLS R0, R0, #25 0x3418C8B4: 2800 CMP R0, #0 0x3418C8B6: F140 817E BPL.W 46L69 ; 0x3418CBB6 0x3418C8BA: 980C LDR R0, [SP, #48] 0x3418C8BC: F890 005E LDRB.W R0, [R0, #94] 0x3418C8C0: 2819 CMP R0, #25 0x3418C8C2: F0C0 8178 BCC.W 46L69 ; 0x3418CBB6 0x3418C8C6: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C8CA: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C8CE: F890 0043 LDRB.W R0, [R0, #67] 0x3418C8D2: 28FF CMP R0, #255 0x3418C8D4: F000 816F BEQ.W 46L69 ; 0x3418CBB6 0x3418C8D8: F89D 002A LDRB.W R0, [SP, #42] 0x3418C8DC: 2800 CMP R0, #0 0x3418C8DE: F040 80F2 BNE.W 46L63 ; 0x3418CAC6 0x3418C8E2: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C8E6: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C8EA: 6C00 LDR R0, [R0, #64] 0x3418C8EC: 0E00 LSRS R0, R0, #24 0x3418C8EE: 07C0 LSLS R0, R0, #31 0x3418C8F0: B1B8 CBZ R0, .L49 ; 0x3418C922 0x3418C8F2: 980C LDR R0, [SP, #48] 0x3418C8F4: 3008 ADDS R0, #8 0x3418C8F6: 21B7 MOVS R1, #183 0x3418C8F8: 2300 MOVS R3, #0 0x3418C8FA: 461A MOV R2, R3 0x3418C8FC: F000 FC5C BL SAL_XSPI_CommandSendData ; 0x3418D1B8 0x3418C900: B118 CBZ R0, .L47 ; 0x3418C90A 0x3418C902: 200C MOVS R0, #12 0x3418C904: F88D 002B STRB.W R0, [SP, #43] 0x3418C908: E242 B 46L83 ; 0x3418CD90
.L47: 0x3418C90A: 980C LDR R0, [SP, #48] 0x3418C90C: 3008 ADDS R0, #8 0x3418C90E: 2102 MOVS R1, #2 0x3418C910: 2200 MOVS R2, #0 0x3418C912: F006 FD61 BL SAL_XSPI_MemoryConfig ; 0x341933D8 0x3418C916: B118 CBZ R0, .L48 ; 0x3418C920 0x3418C918: 200C MOVS R0, #12 0x3418C91A: F88D 002B STRB.W R0, [SP, #43] 0x3418C91E: E237 B 46L83 ; 0x3418CD90
.L48: 0x3418C920: E064 B 46L56 ; 0x3418C9EC
.L49: 0x3418C922: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C926: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C92A: 6C00 LDR R0, [R0, #64] 0x3418C92C: 0E00 LSRS R0, R0, #24 0x3418C92E: 0780 LSLS R0, R0, #30 0x3418C930: 2800 CMP R0, #0 0x3418C932: D543 BPL 46L53 ; 0x3418C9BC 0x3418C934: 990C LDR R1, [SP, #48] 0x3418C936: F101 0008 ADD.W R0, R1, #8 0x3418C93A: F891 1070 LDRB.W R1, [R1, #112] 0x3418C93E: 2300 MOVS R3, #0 0x3418C940: 461A MOV R2, R3 0x3418C942: F000 FC39 BL SAL_XSPI_CommandSendData ; 0x3418D1B8 0x3418C946: B118 CBZ R0, .L50 ; 0x3418C950 0x3418C948: 200C MOVS R0, #12 0x3418C94A: F88D 002B STRB.W R0, [SP, #43] 0x3418C94E: E21F B 46L83 ; 0x3418CD90
.L50: 0x3418C950: 9B0C LDR R3, [SP, #48] 0x3418C952: F103 0008 ADD.W R0, R3, #8 0x3418C956: F893 2074 LDRB.W R2, [R3, #116] 0x3418C95A: F893 405D LDRB.W R4, [R3, #93] 0x3418C95E: F893 1071 LDRB.W R1, [R3, #113] 0x3418C962: F893 E072 LDRB.W LR, [R3, #114] 0x3418C966: F893 3073 LDRB.W R3, [R3, #115] 0x3418C96A: 2B00 CMP R3, #0 0x3418C96C: EA5F 931F CSET R3, EQ 0x3418C970: FA03 F30E LSL.W R3, R3, LR 0x3418C974: F04F 0C01 MOV.W R12, #1 0x3418C978: FA0C FC0E LSL.W R12, R12, LR 0x3418C97C: 46EE MOV LR, SP 0x3418C97E: F44F 757A MOV.W R5, #0x03E8 0x3418C982: F8CE 5008 STR.W R5, [LR, #8] 0x3418C986: F8CE 4004 STR.W R4, [LR, #4] 0x3418C98A: FA5F FC8C UXTB R12, R12 0x3418C98E: F8CE C000 STR.W R12, [LR] 0x3418C992: B2DB UXTB R3, R3 0x3418C994: F000 FC98 BL SAL_XSPI_CheckStatusRegister ; 0x3418D2C8 0x3418C998: B118 CBZ R0, .L51 ; 0x3418C9A2 0x3418C99A: 200C MOVS R0, #12 0x3418C99C: F88D 002B STRB.W R0, [SP, #43] 0x3418C9A0: E1F6 B 46L83 ; 0x3418CD90
.L51: 0x3418C9A2: 980C LDR R0, [SP, #48] 0x3418C9A4: 3008 ADDS R0, #8 0x3418C9A6: 21B7 MOVS R1, #183 0x3418C9A8: 2300 MOVS R3, #0 0x3418C9AA: 461A MOV R2, R3 0x3418C9AC: F000 FC04 BL SAL_XSPI_CommandSendData ; 0x3418D1B8 0x3418C9B0: B118 CBZ R0, .L52 ; 0x3418C9BA 0x3418C9B2: 200C MOVS R0, #12 0x3418C9B4: F88D 002B STRB.W R0, [SP, #43] 0x3418C9B8: E1EA B 46L83 ; 0x3418CD90
.L52: 0x3418C9BA: E017 B 46L56 ; 0x3418C9EC
.L53: 0x3418C9BC: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C9C0: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C9C4: 6C00 LDR R0, [R0, #64] 0x3418C9C6: 0E00 LSRS R0, R0, #24 0x3418C9C8: 0640 LSLS R0, R0, #25 0x3418C9CA: 2800 CMP R0, #0 0x3418C9CC: D500 BPL 46L54 ; 0x3418C9D0 0x3418C9CE: E00D B 46L56 ; 0x3418C9EC
.L54: 0x3418C9D0: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418C9D4: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418C9D8: 6C00 LDR R0, [R0, #64] 0x3418C9DA: 0E00 LSRS R0, R0, #24 0x3418C9DC: 0680 LSLS R0, R0, #26 0x3418C9DE: 2800 CMP R0, #0 0x3418C9E0: D500 BPL 46L55 ; 0x3418C9E4 0x3418C9E2: E003 B 46L56 ; 0x3418C9EC
.L55: 0x3418C9E4: 200F MOVS R0, #15 0x3418C9E6: F88D 002B STRB.W R0, [SP, #43] 0x3418C9EA: E1D1 B 46L83 ; 0x3418CD90
.L56: 0x3418C9EC: 980C LDR R0, [SP, #48] 0x3418C9EE: 3008 ADDS R0, #8 0x3418C9F0: 2102 MOVS R1, #2 0x3418C9F2: 2200 MOVS R2, #0 0x3418C9F4: F006 FCF0 BL SAL_XSPI_MemoryConfig ; 0x341933D8 0x3418C9F8: B118 CBZ R0, .L57 ; 0x3418CA02 0x3418C9FA: 200C MOVS R0, #12 0x3418C9FC: F88D 002B STRB.W R0, [SP, #43] 0x3418CA00: E1C6 B 46L83 ; 0x3418CD90
.L57: 0x3418CA02: 980C LDR R0, [SP, #48] 0x3418CA04: F890 0064 LDRB.W R0, [R0, #100] 0x3418CA08: BB50 CBNZ R0, .L60 ; 0x3418CA60 0x3418CA0A: F240 3038 MOVW R0, #0x0338 ; 0x34000338 = JEDEC_Address4Bytes 0x3418CA0E: F2C3 4000 MOVT R0, #0x3400 ; 0x34000338 = JEDEC_Address4Bytes 0x3418CA12: 7800 LDRB R0, [R0] 0x3418CA14: 07C0 LSLS R0, R0, #31 0x3418CA16: B118 CBZ R0, .L58 ; 0x3418CA20 0x3418CA18: 990C LDR R1, [SP, #48] 0x3418CA1A: 2013 MOVS R0, #19 0x3418CA1C: F881 0076 STRB.W R0, [R1, #118]
.L58: 0x3418CA20: F240 3038 MOVW R0, #0x0338 ; 0x34000338 = JEDEC_Address4Bytes 0x3418CA24: F2C3 4000 MOVT R0, #0x3400 ; 0x34000338 = JEDEC_Address4Bytes 0x3418CA28: 6800 LDR R0, [R0] 0x3418CA2A: 0980 LSRS R0, R0, #6 0x3418CA2C: 07C0 LSLS R0, R0, #31 0x3418CA2E: B118 CBZ R0, .L59 ; 0x3418CA38 0x3418CA30: 990C LDR R1, [SP, #48] 0x3418CA32: 2012 MOVS R0, #18 0x3418CA34: F881 0075 STRB.W R0, [R1, #117]
.L59: 0x3418CA38: F240 3038 MOVW R0, #0x0338 ; 0x34000338 = JEDEC_Address4Bytes 0x3418CA3C: F2C3 4000 MOVT R0, #0x3400 ; 0x34000338 = JEDEC_Address4Bytes 0x3418CA40: 6800 LDR R0, [R0] 0x3418CA42: 0840 LSRS R0, R0, #1 0x3418CA44: 07C0 LSLS R0, R0, #31 0x3418CA46: B158 CBZ R0, .L60 ; 0x3418CA60 0x3418CA48: 990C LDR R1, [SP, #48] 0x3418CA4A: 200C MOVS R0, #12 0x3418CA4C: F881 0076 STRB.W R0, [R1, #118] 0x3418CA50: 2008 MOVS R0, #8 0x3418CA52: 9009 STR R0, [SP, #36] 0x3418CA54: 980C LDR R0, [SP, #48] 0x3418CA56: 3008 ADDS R0, #8 0x3418CA58: 2101 MOVS R1, #1 0x3418CA5A: AA09 ADD R2, SP, #36 0x3418CA5C: F006 FCBC BL SAL_XSPI_MemoryConfig ; 0x341933D8
.L60: 0x3418CA60: 980C LDR R0, [SP, #48] 0x3418CA62: F890 0064 LDRB.W R0, [R0, #100] 0x3418CA66: 2801 CMP R0, #1 0x3418CA68: D10B BNE 46L61 ; 0x3418CA82 0x3418CA6A: F240 3038 MOVW R0, #0x0338 ; 0x34000338 = JEDEC_Address4Bytes 0x3418CA6E: F2C3 4000 MOVT R0, #0x3400 ; 0x34000338 = JEDEC_Address4Bytes 0x3418CA72: 6800 LDR R0, [R0] 0x3418CA74: 0880 LSRS R0, R0, #2 0x3418CA76: 07C0 LSLS R0, R0, #31 0x3418CA78: B118 CBZ R0, .L61 ; 0x3418CA82 0x3418CA7A: 990C LDR R1, [SP, #48] 0x3418CA7C: 203C MOVS R0, #60 0x3418CA7E: F881 0076 STRB.W R0, [R1, #118]
.L61: 0x3418CA82: 980C LDR R0, [SP, #48] 0x3418CA84: F890 0064 LDRB.W R0, [R0, #100] 0x3418CA88: 2802 CMP R0, #2 0x3418CA8A: D10B BNE 46L62 ; 0x3418CAA4 0x3418CA8C: F240 3038 MOVW R0, #0x0338 ; 0x34000338 = JEDEC_Address4Bytes 0x3418CA90: F2C3 4000 MOVT R0, #0x3400 ; 0x34000338 = JEDEC_Address4Bytes 0x3418CA94: 6800 LDR R0, [R0] 0x3418CA96: 08C0 LSRS R0, R0, #3 0x3418CA98: 07C0 LSLS R0, R0, #31 0x3418CA9A: B118 CBZ R0, .L62 ; 0x3418CAA4 0x3418CA9C: 990C LDR R1, [SP, #48] 0x3418CA9E: 20BC MOVS R0, #188 0x3418CAA0: F881 0076 STRB.W R0, [R1, #118]
.L62: 0x3418CAA4: 980C LDR R0, [SP, #48] 0x3418CAA6: F890 0064 LDRB.W R0, [R0, #100] 0x3418CAAA: 2803 CMP R0, #3 0x3418CAAC: D10B BNE 46L63 ; 0x3418CAC6 0x3418CAAE: F240 3038 MOVW R0, #0x0338 ; 0x34000338 = JEDEC_Address4Bytes 0x3418CAB2: F2C3 4000 MOVT R0, #0x3400 ; 0x34000338 = JEDEC_Address4Bytes 0x3418CAB6: 6800 LDR R0, [R0] 0x3418CAB8: 0B40 LSRS R0, R0, #13 0x3418CABA: 07C0 LSLS R0, R0, #31 0x3418CABC: B118 CBZ R0, .L63 ; 0x3418CAC6 0x3418CABE: 990C LDR R1, [SP, #48] 0x3418CAC0: 200E MOVS R0, #14 0x3418CAC2: F881 0076 STRB.W R0, [R1, #118]
.L63: 0x3418CAC6: 980C LDR R0, [SP, #48] 0x3418CAC8: F890 005C LDRB.W R0, [R0, #92] 0x3418CACC: 2803 CMP R0, #3 0x3418CACE: D12C BNE 46L65 ; 0x3418CB2A 0x3418CAD0: 980C LDR R0, [SP, #48] 0x3418CAD2: F890 0064 LDRB.W R0, [R0, #100] 0x3418CAD6: BB40 CBNZ R0, .L65 ; 0x3418CB2A 0x3418CAD8: F240 3038 MOVW R0, #0x0338 ; 0x34000338 = JEDEC_Address4Bytes 0x3418CADC: F2C3 4000 MOVT R0, #0x3400 ; 0x34000338 = JEDEC_Address4Bytes 0x3418CAE0: 6800 LDR R0, [R0] 0x3418CAE2: 0D40 LSRS R0, R0, #21 0x3418CAE4: 07C0 LSLS R0, R0, #31 0x3418CAE6: B300 CBZ R0, .L65 ; 0x3418CB2A 0x3418CAE8: F240 3038 MOVW R0, #0x0338 ; 0x34000338 = JEDEC_Address4Bytes 0x3418CAEC: F2C3 4000 MOVT R0, #0x3400 ; 0x34000338 = JEDEC_Address4Bytes 0x3418CAF0: 6800 LDR R0, [R0] 0x3418CAF2: 0E00 LSRS R0, R0, #24 0x3418CAF4: 07C0 LSLS R0, R0, #31 0x3418CAF6: B1C0 CBZ R0, .L65 ; 0x3418CB2A 0x3418CAF8: 990C LDR R1, [SP, #48] 0x3418CAFA: 2009 MOVS R0, #9 0x3418CAFC: F881 0064 STRB.W R0, [R1, #100] 0x3418CB00: 990C LDR R1, [SP, #48] 0x3418CB02: F101 0008 ADD.W R0, R1, #8 0x3418CB06: F101 0264 ADD.W R2, R1, #100 0x3418CB0A: 2100 MOVS R1, #0 0x3418CB0C: F006 FC64 BL SAL_XSPI_MemoryConfig ; 0x341933D8 0x3418CB10: B118 CBZ R0, .L64 ; 0x3418CB1A 0x3418CB12: 200C MOVS R0, #12 0x3418CB14: F88D 002B STRB.W R0, [SP, #43] 0x3418CB18: E13A B 46L83 ; 0x3418CD90
.L64: 0x3418CB1A: 990C LDR R1, [SP, #48] 0x3418CB1C: 20CC MOVS R0, #204 0x3418CB1E: F881 0076 STRB.W R0, [R1, #118] 0x3418CB22: 990C LDR R1, [SP, #48] 0x3418CB24: 208E MOVS R0, #142 0x3418CB26: F881 0075 STRB.W R0, [R1, #117]
.L65: 0x3418CB2A: 980C LDR R0, [SP, #48] 0x3418CB2C: F890 0064 LDRB.W R0, [R0, #100] 0x3418CB30: 280A CMP R0, #10 0x3418CB32: D12B BNE 46L68 ; 0x3418CB8C 0x3418CB34: F240 3038 MOVW R0, #0x0338 ; 0x34000338 = JEDEC_Address4Bytes 0x3418CB38: F2C3 4000 MOVT R0, #0x3400 ; 0x34000338 = JEDEC_Address4Bytes 0x3418CB3C: 6800 LDR R0, [R0] 0x3418CB3E: 0E00 LSRS R0, R0, #24 0x3418CB40: 07C0 LSLS R0, R0, #31 0x3418CB42: B118 CBZ R0, .L66 ; 0x3418CB4C 0x3418CB44: 990C LDR R1, [SP, #48] 0x3418CB46: 2002 MOVS R0, #2 0x3418CB48: F881 0075 STRB.W R0, [R1, #117]
.L66: 0x3418CB4C: F240 3038 MOVW R0, #0x0338 ; 0x34000338 = JEDEC_Address4Bytes 0x3418CB50: F2C3 4000 MOVT R0, #0x3400 ; 0x34000338 = JEDEC_Address4Bytes 0x3418CB54: 6800 LDR R0, [R0] 0x3418CB56: 0D40 LSRS R0, R0, #21 0x3418CB58: 07C0 LSLS R0, R0, #31 0x3418CB5A: B158 CBZ R0, .L67 ; 0x3418CB74 0x3418CB5C: 990C LDR R1, [SP, #48] 0x3418CB5E: 20CC MOVS R0, #204 0x3418CB60: F881 0076 STRB.W R0, [R1, #118] 0x3418CB64: 2008 MOVS R0, #8 0x3418CB66: 9009 STR R0, [SP, #36] 0x3418CB68: 980C LDR R0, [SP, #48] 0x3418CB6A: 3008 ADDS R0, #8 0x3418CB6C: 2101 MOVS R1, #1 0x3418CB6E: AA09 ADD R2, SP, #36 0x3418CB70: F006 FC32 BL SAL_XSPI_MemoryConfig ; 0x341933D8
.L67: 0x3418CB74: F240 3038 MOVW R0, #0x0338 ; 0x34000338 = JEDEC_Address4Bytes 0x3418CB78: F2C3 4000 MOVT R0, #0x3400 ; 0x34000338 = JEDEC_Address4Bytes 0x3418CB7C: 6800 LDR R0, [R0] 0x3418CB7E: 0D80 LSRS R0, R0, #22 0x3418CB80: 07C0 LSLS R0, R0, #31 0x3418CB82: B118 CBZ R0, .L68 ; 0x3418CB8C 0x3418CB84: 990C LDR R1, [SP, #48] 0x3418CB86: 20FD MOVS R0, #253 0x3418CB88: F881 0076 STRB.W R0, [R1, #118]
.L68: 0x3418CB8C: F240 3038 MOVW R0, #0x0338 ; 0x34000338 = JEDEC_Address4Bytes 0x3418CB90: F2C3 4000 MOVT R0, #0x3400 ; 0x34000338 = JEDEC_Address4Bytes 0x3418CB94: 6841 LDR R1, [R0, #4] 0x3418CB96: 9A0C LDR R2, [SP, #48] 0x3418CB98: F882 1078 STRB.W R1, [R2, #120] 0x3418CB9C: 6841 LDR R1, [R0, #4] 0x3418CB9E: 0A09 LSRS R1, R1, #8 0x3418CBA0: 9A0C LDR R2, [SP, #48] 0x3418CBA2: F882 107A STRB.W R1, [R2, #122] 0x3418CBA6: 88C1 LDRH R1, [R0, #6] 0x3418CBA8: 9A0C LDR R2, [SP, #48] 0x3418CBAA: F882 107C STRB.W R1, [R2, #124] 0x3418CBAE: 79C0 LDRB R0, [R0, #7] 0x3418CBB0: 990C LDR R1, [SP, #48] 0x3418CBB2: F881 007E STRB.W R0, [R1, #126]
.L69: 0x3418CBB6: 980C LDR R0, [SP, #48] 0x3418CBB8: F890 0094 LDRB.W R0, [R0, #148] 0x3418CBBC: 0600 LSLS R0, R0, #24 0x3418CBBE: 2800 CMP R0, #0 0x3418CBC0: F140 80E6 BPL.W 46L83 ; 0x3418CD90 0x3418CBC4: 980C LDR R0, [SP, #48] 0x3418CBC6: F890 0064 LDRB.W R0, [R0, #100] 0x3418CBCA: 280B CMP R0, #11 0x3418CBCC: D005 BEQ 46L70 ; 0x3418CBDA 0x3418CBCE: 980C LDR R0, [SP, #48] 0x3418CBD0: F890 0064 LDRB.W R0, [R0, #100] 0x3418CBD4: 280A CMP R0, #10 0x3418CBD6: F040 80DB BNE.W 46L83 ; 0x3418CD90
.L70: 0x3418CBDA: 2000 MOVS R0, #0 0x3418CBDC: 9006 STR R0, [SP, #24] 0x3418CBDE: F240 3020 MOVW R0, #0x0320 ; 0x34000320 = JEDEC_XSPI10 0x3418CBE2: F2C3 4000 MOVT R0, #0x3400 ; 0x34000320 = JEDEC_XSPI10 0x3418CBE6: 7840 LDRB R0, [R0, #1] 0x3418CBE8: B140 CBZ R0, .L71 ; 0x3418CBFC 0x3418CBEA: F240 3020 MOVW R0, #0x0320 ; 0x34000320 = JEDEC_XSPI10 0x3418CBEE: F2C3 4000 MOVT R0, #0x3400 ; 0x34000320 = JEDEC_XSPI10 0x3418CBF2: 6800 LDR R0, [R0] 0x3418CBF4: 0A00 LSRS R0, R0, #8 0x3418CBF6: 990C LDR R1, [SP, #48] 0x3418CBF8: F881 0076 STRB.W R0, [R1, #118]
.L71: 0x3418CBFC: F240 3020 MOVW R0, #0x0320 ; 0x34000320 = JEDEC_XSPI10 0x3418CC00: F2C3 4000 MOVT R0, #0x3400 ; 0x34000320 = JEDEC_XSPI10 0x3418CC04: 7D00 LDRB R0, [R0, #20] 0x3418CC06: 06C0 LSLS R0, R0, #27 0x3418CC08: B168 CBZ R0, .L72 ; 0x3418CC26 0x3418CC0A: F240 3020 MOVW R0, #0x0320 ; 0x34000320 = JEDEC_XSPI10 0x3418CC0E: F2C3 4000 MOVT R0, #0x3400 ; 0x34000320 = JEDEC_XSPI10 0x3418CC12: 6940 LDR R0, [R0, #20] 0x3418CC14: F000 001F AND R0, R0, #31 0x3418CC18: 9009 STR R0, [SP, #36] 0x3418CC1A: 980C LDR R0, [SP, #48] 0x3418CC1C: 3008 ADDS R0, #8 0x3418CC1E: 2101 MOVS R1, #1 0x3418CC20: AA09 ADD R2, SP, #36 0x3418CC22: F006 FBD9 BL SAL_XSPI_MemoryConfig ; 0x341933D8
.L72: 0x3418CC26: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418CC2A: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418CC2E: 6D00 LDR R0, [R0, #80] 0x3418CC30: 0F00 LSRS R0, R0, #28 0x3418CC32: F000 F8F3 BL sfdp_getfrequencevalue ; 0x3418CE1C 0x3418CC36: 9005 STR R0, [SP, #20] 0x3418CC38: 9805 LDR R0, [SP, #20] 0x3418CC3A: 990C LDR R1, [SP, #48] 0x3418CC3C: 6E89 LDR R1, [R1, #104] 0x3418CC3E: 4288 CMP R0, R1 0x3418CC40: D902 BLS 46L73 ; 0x3418CC48 0x3418CC42: 980C LDR R0, [SP, #48] 0x3418CC44: 6E80 LDR R0, [R0, #104] 0x3418CC46: 9005 STR R0, [SP, #20]
.L73: 0x3418CC48: 980C LDR R0, [SP, #48] 0x3418CC4A: 6800 LDR R0, [R0] 0x3418CC4C: B138 CBZ R0, .L74 ; 0x3418CC5E 0x3418CC4E: 9805 LDR R0, [SP, #20] 0x3418CC50: 990C LDR R1, [SP, #48] 0x3418CC52: 6809 LDR R1, [R1] 0x3418CC54: 4288 CMP R0, R1 0x3418CC56: D902 BLS 46L74 ; 0x3418CC5E 0x3418CC58: 980C LDR R0, [SP, #48] 0x3418CC5A: 6800 LDR R0, [R0] 0x3418CC5C: 9005 STR R0, [SP, #20]
.L74: 0x3418CC5E: 990C LDR R1, [SP, #48] 0x3418CC60: F101 0008 ADD.W R0, R1, #8 0x3418CC64: 6E89 LDR R1, [R1, #104] 0x3418CC66: 9A05 LDR R2, [SP, #20] 0x3418CC68: AB06 ADD R3, SP, #24 0x3418CC6A: F000 F9E3 BL SAL_XSPI_SetClock ; 0x3418D034 0x3418CC6E: B118 CBZ R0, .L75 ; 0x3418CC78 0x3418CC70: 200D MOVS R0, #13 0x3418CC72: F88D 002B STRB.W R0, [SP, #43] 0x3418CC76: E08B B 46L83 ; 0x3418CD90
.L75: 0x3418CC78: 990B LDR R1, [SP, #44] 0x3418CC7A: 2001 MOVS R0, #1 0x3418CC7C: 7008 STRB R0, [R1] 0x3418CC7E: 9806 LDR R0, [SP, #24] 0x3418CC80: F24C 2100 MOVW R1, #0xC200 0x3418CC84: F6C0 31EB MOVT R1, #0x0BEB 0x3418CC88: 4288 CMP R0, R1 0x3418CC8A: D314 BCC 46L76 ; 0x3418CCB6 0x3418CC8C: F240 3020 MOVW R0, #0x0320 ; 0x34000320 = JEDEC_XSPI10 0x3418CC90: F2C3 4000 MOVT R0, #0x3400 ; 0x34000320 = JEDEC_XSPI10 0x3418CC94: 68C0 LDR R0, [R0, #12] 0x3418CC96: 09C0 LSRS R0, R0, #7 0x3418CC98: 06C0 LSLS R0, R0, #27 0x3418CC9A: B160 CBZ R0, .L76 ; 0x3418CCB6 0x3418CC9C: F240 3020 MOVW R0, #0x0320 ; 0x34000320 = JEDEC_XSPI10 0x3418CCA0: F2C3 4000 MOVT R0, #0x3400 ; 0x34000320 = JEDEC_XSPI10 0x3418CCA4: 68C1 LDR R1, [R0, #12] 0x3418CCA6: F3C1 11C4 UBFX R1, R1, #7, #5 0x3418CCAA: 9109 STR R1, [SP, #36] 0x3418CCAC: 68C0 LDR R0, [R0, #12] 0x3418CCAE: F3C0 0084 UBFX R0, R0, #2, #5 0x3418CCB2: 9008 STR R0, [SP, #32] 0x3418CCB4: E041 B 46L79 ; 0x3418CD3A
.L76: 0x3418CCB6: 9806 LDR R0, [SP, #24] 0x3418CCB8: F24F 5180 MOVW R1, #0xF580 0x3418CCBC: F6C0 11E4 MOVT R1, #0x09E4 0x3418CCC0: 4288 CMP R0, R1 0x3418CCC2: D312 BCC 46L77 ; 0x3418CCEA 0x3418CCC4: F240 3020 MOVW R0, #0x0320 ; 0x34000320 = JEDEC_XSPI10 0x3418CCC8: F2C3 4000 MOVT R0, #0x3400 ; 0x34000320 = JEDEC_XSPI10 0x3418CCCC: 6900 LDR R0, [R0, #16] 0x3418CCCE: 0EC0 LSRS R0, R0, #27 0x3418CCD0: B158 CBZ R0, .L77 ; 0x3418CCEA 0x3418CCD2: F240 3020 MOVW R0, #0x0320 ; 0x34000320 = JEDEC_XSPI10 0x3418CCD6: F2C3 4000 MOVT R0, #0x3400 ; 0x34000320 = JEDEC_XSPI10 0x3418CCDA: 6901 LDR R1, [R0, #16] 0x3418CCDC: 0EC9 LSRS R1, R1, #27 0x3418CCDE: 9109 STR R1, [SP, #36] 0x3418CCE0: 6900 LDR R0, [R0, #16] 0x3418CCE2: F3C0 5084 UBFX R0, R0, #22, #5 0x3418CCE6: 9008 STR R0, [SP, #32] 0x3418CCE8: E027 B 46L79 ; 0x3418CD3A
.L77: 0x3418CCEA: 9806 LDR R0, [SP, #24] 0x3418CCEC: F646 3140 MOVW R1, #0x6B40 0x3418CCF0: F2C0 71ED MOVT R1, #0x07ED 0x3418CCF4: 4288 CMP R0, R1 0x3418CCF6: D314 BCC 46L78 ; 0x3418CD22 0x3418CCF8: F240 3020 MOVW R0, #0x0320 ; 0x34000320 = JEDEC_XSPI10 0x3418CCFC: F2C3 4000 MOVT R0, #0x3400 ; 0x34000320 = JEDEC_XSPI10 0x3418CD00: 6900 LDR R0, [R0, #16] 0x3418CD02: 0C40 LSRS R0, R0, #17 0x3418CD04: 06C0 LSLS R0, R0, #27 0x3418CD06: B160 CBZ R0, .L78 ; 0x3418CD22 0x3418CD08: F240 3020 MOVW R0, #0x0320 ; 0x34000320 = JEDEC_XSPI10 0x3418CD0C: F2C3 4000 MOVT R0, #0x3400 ; 0x34000320 = JEDEC_XSPI10 0x3418CD10: 6901 LDR R1, [R0, #16] 0x3418CD12: F3C1 4144 UBFX R1, R1, #17, #5 0x3418CD16: 9109 STR R1, [SP, #36] 0x3418CD18: 6900 LDR R0, [R0, #16] 0x3418CD1A: F3C0 3004 UBFX R0, R0, #12, #5 0x3418CD1E: 9008 STR R0, [SP, #32] 0x3418CD20: E00B B 46L79 ; 0x3418CD3A
.L78: 0x3418CD22: F240 3020 MOVW R0, #0x0320 ; 0x34000320 = JEDEC_XSPI10 0x3418CD26: F2C3 4000 MOVT R0, #0x3400 ; 0x34000320 = JEDEC_XSPI10 0x3418CD2A: 6901 LDR R1, [R0, #16] 0x3418CD2C: F3C1 11C4 UBFX R1, R1, #7, #5 0x3418CD30: 9109 STR R1, [SP, #36] 0x3418CD32: 6900 LDR R0, [R0, #16] 0x3418CD34: F3C0 0084 UBFX R0, R0, #2, #5 0x3418CD38: 9008 STR R0, [SP, #32]
.L79: 0x3418CD3A: 980C LDR R0, [SP, #48] 0x3418CD3C: F890 005D LDRB.W R0, [R0, #93] 0x3418CD40: 28C8 CMP R0, #200 0x3418CD42: D108 BNE 46L80 ; 0x3418CD56 0x3418CD44: 2010 MOVS R0, #16 0x3418CD46: 9009 STR R0, [SP, #36] 0x3418CD48: 980C LDR R0, [SP, #48] 0x3418CD4A: 3008 ADDS R0, #8 0x3418CD4C: 2101 MOVS R1, #1 0x3418CD4E: AA09 ADD R2, SP, #36 0x3418CD50: F006 FB42 BL SAL_XSPI_MemoryConfig ; 0x341933D8 0x3418CD54: E01C B 46L83 ; 0x3418CD90
.L80: 0x3418CD56: 980C LDR R0, [SP, #48] 0x3418CD58: F890 0095 LDRB.W R0, [R0, #149] 0x3418CD5C: 0780 LSLS R0, R0, #30 0x3418CD5E: 2800 CMP R0, #0 0x3418CD60: D512 BPL 46L82 ; 0x3418CD88 0x3418CD62: F240 10CC MOVW R0, #0x01CC ; 0x340001CC = JEDEC_SCCR_Map 0x3418CD66: F2C3 4000 MOVT R0, #0x3400 ; 0x340001CC = JEDEC_SCCR_Map 0x3418CD6A: 6A00 LDR R0, [R0, #32] 0x3418CD6C: 0FC0 LSRS R0, R0, #31 0x3418CD6E: B158 CBZ R0, .L82 ; 0x3418CD88 0x3418CD70: 980C LDR R0, [SP, #48] 0x3418CD72: 9908 LDR R1, [SP, #32] 0x3418CD74: F000 F872 BL sfdp_set_dummycycle ; 0x3418CE5C 0x3418CD78: B928 CBNZ R0, .L81 ; 0x3418CD86 0x3418CD7A: 980C LDR R0, [SP, #48] 0x3418CD7C: 3008 ADDS R0, #8 0x3418CD7E: 2101 MOVS R1, #1 0x3418CD80: AA09 ADD R2, SP, #36 0x3418CD82: F006 FB29 BL SAL_XSPI_MemoryConfig ; 0x341933D8
.L81: 0x3418CD86: E003 B 46L83 ; 0x3418CD90
.L82: 0x3418CD88: 200E MOVS R0, #14 0x3418CD8A: F88D 002B STRB.W R0, [SP, #43] 0x3418CD8E: E7FF B 46L83 ; 0x3418CD90
.L83: 0x3418CD90: F89D 002B LDRB.W R0, [SP, #43] 0x3418CD94: B00E ADD SP, SP, #56 0x3418CD96: BDB0 POP 123R4-R5, R7, PC}

Section .text.JEDEC_Basic_Manage4S4S4SEnableSequence from blto2_FSBL_lto.o, size=132, align=4


JEDEC_Basic_Manage4S4S4SEnableSequence: 0x3418CD98: B580 PUSH 123R7, LR} 0x3418CD9A: B084 SUB SP, SP, #16 0x3418CD9C: 9003 STR R0, [SP, #12] 0x3418CD9E: 200F MOVS R0, #15 0x3418CDA0: F88D 000B STRB.W R0, [SP, #11] 0x3418CDA4: 2000 MOVS R0, #0 0x3418CDA6: F88D 000A STRB.W R0, [SP, #10] 0x3418CDAA: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418CDAE: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418CDB2: 6BC0 LDR R0, [R0, #60] 0x3418CDB4: 0900 LSRS R0, R0, #4 0x3418CDB6: 07C0 LSLS R0, R0, #31 0x3418CDB8: B140 CBZ R0, .L1 ; 0x3418CDCC 0x3418CDBA: 9803 LDR R0, [SP, #12] 0x3418CDBC: F006 F858 BL JEDEC_Basic_ManageQuadEnableRequirement ; 0x34192E70 0x3418CDC0: F88D 000B STRB.W R0, [SP, #11] 0x3418CDC4: 2038 MOVS R0, #56 0x3418CDC6: F88D 000A STRB.W R0, [SP, #10] 0x3418CDCA: E011 B 46L2 ; 0x3418CDF0
.L1: 0x3418CDCC: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x3418CDD0: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x3418CDD4: 6BC0 LDR R0, [R0, #60] 0x3418CDD6: 0900 LSRS R0, R0, #4 0x3418CDD8: 0740 LSLS R0, R0, #29 0x3418CDDA: 2800 CMP R0, #0 0x3418CDDC: D508 BPL 46L2 ; 0x3418CDF0 0x3418CDDE: 9803 LDR R0, [SP, #12] 0x3418CDE0: F006 F846 BL JEDEC_Basic_ManageQuadEnableRequirement ; 0x34192E70 0x3418CDE4: F88D 000B STRB.W R0, [SP, #11] 0x3418CDE8: 2035 MOVS R0, #53 0x3418CDEA: F88D 000A STRB.W R0, [SP, #10] 0x3418CDEE: E7FF B 46L2 ; 0x3418CDF0
.L2: 0x3418CDF0: F89D 000B LDRB.W R0, [SP, #11] 0x3418CDF4: B970 CBNZ R0, .L3 ; 0x3418CE14 0x3418CDF6: F89D 000A LDRB.W R0, [SP, #10] 0x3418CDFA: B158 CBZ R0, .L3 ; 0x3418CE14 0x3418CDFC: 9803 LDR R0, [SP, #12] 0x3418CDFE: 3008 ADDS R0, #8 0x3418CE00: F89D 100A LDRB.W R1, [SP, #10] 0x3418CE04: 2300 MOVS R3, #0 0x3418CE06: 9301 STR R3, [SP, #4] 0x3418CE08: 461A MOV R2, R3 0x3418CE0A: F000 FA19 BL SAL_XSPI_SendReadCommand ; 0x3418D240 0x3418CE0E: 9801 LDR R0, [SP, #4] 0x3418CE10: F88D 000B STRB.W R0, [SP, #11]
.L3: 0x3418CE14: F89D 000B LDRB.W R0, [SP, #11] 0x3418CE18: B004 ADD SP, SP, #16 0x3418CE1A: BD80 POP 123R7, PC}

Section .text.sfdp_getfrequencevalue from blto2_FSBL_lto.o, size=64, align=4


sfdp_getfrequencevalue: 0x3418CE1C: B580 PUSH 123R7, LR} 0x3418CE1E: B08A SUB SP, SP, #40 0x3418CE20: 9008 STR R0, [SP, #32] 0x3418CE22: F64D 11DE MOVW R1, #0xD9DE ; 0x3418D9DE = .rodata..L__const.sfdp_getfrequencevalue.freqMhz_table 0x3418CE26: F2C3 4118 MOVT R1, #0x3418 ; 0x3418D9DE = .rodata..L__const.sfdp_getfrequencevalue.freqMhz_table 0x3418CE2A: F10D 0006 ADD.W R0, SP, #6 0x3418CE2E: 221A MOVS R2, #26 0x3418CE30: F000 FD30 BL memcpy ; 0x3418D894 0x3418CE34: 9808 LDR R0, [SP, #32] 0x3418CE36: 2809 CMP R0, #9 0x3418CE38: D80B BHI 46L1 ; 0x3418CE52 0x3418CE3A: 9908 LDR R1, [SP, #32] 0x3418CE3C: F10D 0006 ADD.W R0, SP, #6 0x3418CE40: F830 0011 LDRH.W R0, [R0, R1, LSL #1] 0x3418CE44: F244 2140 MOVW R1, #0x4240 0x3418CE48: F2C0 010F MOVT R1, #15 0x3418CE4C: 4348 MULS R0, R1, R0 0x3418CE4E: 9009 STR R0, [SP, #36] 0x3418CE50: E001 B 46L2 ; 0x3418CE56
.L1: 0x3418CE52: 2000 MOVS R0, #0 0x3418CE54: 9009 STR R0, [SP, #36]
.L2: 0x3418CE56: 9809 LDR R0, [SP, #36] 0x3418CE58: B00A ADD SP, SP, #40 0x3418CE5A: BD80 POP 123R7, PC}

Section .text.sfdp_set_dummycycle from blto2_FSBL_lto.o, size=420, align=4


sfdp_set_dummycycle: 0x3418CE5C: B5B0 PUSH 123R4-R5, R7, LR} 0x3418CE5E: B088 SUB SP, SP, #32 0x3418CE60: 9007 STR R0, [SP, #28] 0x3418CE62: 9106 STR R1, [SP, #24] 0x3418CE64: F240 7003 MOVW R0, #0x0703 0x3418CE68: F6C1 700F MOVT R0, #0x1F0F 0x3418CE6C: 9005 STR R0, [SP, #20] 0x3418CE6E: 2000 MOVS R0, #0 0x3418CE70: F88D 0013 STRB.W R0, [SP, #19] 0x3418CE74: F8AD 0010 STRH.W R0, [SP, #16] 0x3418CE78: F240 10CC MOVW R0, #0x01CC ; 0x340001CC = JEDEC_SCCR_Map 0x3418CE7C: F2C3 4000 MOVT R0, #0x3400 ; 0x340001CC = JEDEC_SCCR_Map 0x3418CE80: 6A00 LDR R0, [R0, #32] 0x3418CE82: 0F00 LSRS R0, R0, #28 0x3418CE84: 07C0 LSLS R0, R0, #31 0x3418CE86: B958 CBNZ R0, .L1 ; 0x3418CEA0 0x3418CE88: F240 10CC MOVW R0, #0x01CC ; 0x340001CC = JEDEC_SCCR_Map 0x3418CE8C: F2C3 4000 MOVT R0, #0x3400 ; 0x340001CC = JEDEC_SCCR_Map 0x3418CE90: 6A00 LDR R0, [R0, #32] 0x3418CE92: 0FC0 LSRS R0, R0, #31 0x3418CE94: 2801 CMP R0, #1 0x3418CE96: D103 BNE 46L1 ; 0x3418CEA0 0x3418CE98: 200C MOVS R0, #12 0x3418CE9A: F88D 0013 STRB.W R0, [SP, #19] 0x3418CE9E: E0AB B 46L9 ; 0x3418CFF8
.L1: 0x3418CEA0: F240 10CC MOVW R0, #0x01CC ; 0x340001CC = JEDEC_SCCR_Map 0x3418CEA4: F2C3 4000 MOVT R0, #0x3400 ; 0x340001CC = JEDEC_SCCR_Map 0x3418CEA8: 6A00 LDR R0, [R0, #32] 0x3418CEAA: 0EC0 LSRS R0, R0, #27 0x3418CEAC: 07C0 LSLS R0, R0, #31 0x3418CEAE: B140 CBZ R0, .L2 ; 0x3418CEC2 0x3418CEB0: F240 10CC MOVW R0, #0x01CC ; 0x340001CC = JEDEC_SCCR_Map 0x3418CEB4: F2C3 4000 MOVT R0, #0x3400 ; 0x340001CC = JEDEC_SCCR_Map 0x3418CEB8: F890 0022 LDRB.W R0, [R0, #34] 0x3418CEBC: 0200 LSLS R0, R0, #8 0x3418CEBE: 9003 STR R0, [SP, #12] 0x3418CEC0: E00E B 46L4 ; 0x3418CEE0
.L2: 0x3418CEC2: 9807 LDR R0, [SP, #28] 0x3418CEC4: F890 005D LDRB.W R0, [R0, #93] 0x3418CEC8: 28C8 CMP R0, #200 0x3418CECA: D102 BNE 46L3 ; 0x3418CED2 0x3418CECC: 2001 MOVS R0, #1 0x3418CECE: 9003 STR R0, [SP, #12] 0x3418CED0: E006 B 46L4 ; 0x3418CEE0
.L3: 0x3418CED2: F240 10CC MOVW R0, #0x01CC ; 0x340001CC = JEDEC_SCCR_Map 0x3418CED6: F2C3 4000 MOVT R0, #0x3400 ; 0x340001CC = JEDEC_SCCR_Map 0x3418CEDA: F890 0022 LDRB.W R0, [R0, #34] 0x3418CEDE: 9003 STR R0, [SP, #12]
.L4: 0x3418CEE0: 9B07 LDR R3, [SP, #28] 0x3418CEE2: F103 0008 ADD.W R0, R3, #8 0x3418CEE6: F240 11CC MOVW R1, #0x01CC ; 0x340001CC = JEDEC_SCCR_Map 0x3418CEEA: F2C3 4100 MOVT R1, #0x3400 ; 0x340001CC = JEDEC_SCCR_Map 0x3418CEEE: F891 1021 LDRB.W R1, [R1, #33] 0x3418CEF2: 9A03 LDR R2, [SP, #12] 0x3418CEF4: F893 305D LDRB.W R3, [R3, #93] 0x3418CEF8: 46EC MOV R12, SP 0x3418CEFA: F8CC 3004 STR.W R3, [R12, #4] 0x3418CEFE: 2302 MOVS R3, #2 0x3418CF00: F8CC 3000 STR.W R3, [R12] 0x3418CF04: AB04 ADD R3, SP, #16 0x3418CF06: F006 FC6B BL SAL_XSPI_CommandSendReadAddress ; 0x341937E0 0x3418CF0A: B118 CBZ R0, .L5 ; 0x3418CF14 0x3418CF0C: 200C MOVS R0, #12 0x3418CF0E: F88D 0013 STRB.W R0, [SP, #19] 0x3418CF12: E071 B 46L9 ; 0x3418CFF8
.L5: 0x3418CF14: 9907 LDR R1, [SP, #28] 0x3418CF16: F101 0008 ADD.W R0, R1, #8 0x3418CF1A: F891 1070 LDRB.W R1, [R1, #112] 0x3418CF1E: 2300 MOVS R3, #0 0x3418CF20: 461A MOV R2, R3 0x3418CF22: F000 F949 BL SAL_XSPI_CommandSendData ; 0x3418D1B8 0x3418CF26: B118 CBZ R0, .L6 ; 0x3418CF30 0x3418CF28: 200C MOVS R0, #12 0x3418CF2A: F88D 0013 STRB.W R0, [SP, #19] 0x3418CF2E: E063 B 46L9 ; 0x3418CFF8
.L6: 0x3418CF30: 9B07 LDR R3, [SP, #28] 0x3418CF32: F103 0008 ADD.W R0, R3, #8 0x3418CF36: F893 2074 LDRB.W R2, [R3, #116] 0x3418CF3A: F893 405D LDRB.W R4, [R3, #93] 0x3418CF3E: F893 1071 LDRB.W R1, [R3, #113] 0x3418CF42: F893 E072 LDRB.W LR, [R3, #114] 0x3418CF46: F893 3073 LDRB.W R3, [R3, #115] 0x3418CF4A: 2B00 CMP R3, #0 0x3418CF4C: EA5F 931F CSET R3, EQ 0x3418CF50: FA03 F30E LSL.W R3, R3, LR 0x3418CF54: F04F 0C01 MOV.W R12, #1 0x3418CF58: FA0C FC0E LSL.W R12, R12, LR 0x3418CF5C: 46EE MOV LR, SP 0x3418CF5E: F44F 757A MOV.W R5, #0x03E8 0x3418CF62: F8CE 5008 STR.W R5, [LR, #8] 0x3418CF66: F8CE 4004 STR.W R4, [LR, #4] 0x3418CF6A: FA5F FC8C UXTB R12, R12 0x3418CF6E: F8CE C000 STR.W R12, [LR] 0x3418CF72: B2DB UXTB R3, R3 0x3418CF74: F000 F9A8 BL SAL_XSPI_CheckStatusRegister ; 0x3418D2C8 0x3418CF78: B118 CBZ R0, .L7 ; 0x3418CF82 0x3418CF7A: 200C MOVS R0, #12 0x3418CF7C: F88D 0013 STRB.W R0, [SP, #19] 0x3418CF80: E03A B 46L9 ; 0x3418CFF8
.L7: 0x3418CF82: F89D 0010 LDRB.W R0, [SP, #16] 0x3418CF86: F240 11CC MOVW R1, #0x01CC ; 0x340001CC = JEDEC_SCCR_Map 0x3418CF8A: F2C3 4100 MOVT R1, #0x3400 ; 0x340001CC = JEDEC_SCCR_Map 0x3418CF8E: 6A0B LDR R3, [R1, #32] 0x3418CF90: F3C3 7C41 UBFX R12, R3, #29, #2 0x3418CF94: AA05 ADD R2, SP, #20 0x3418CF96: 4462 ADD R2, R12 0x3418CF98: 7812 LDRB R2, [R2] 0x3418CF9A: F3C3 6302 UBFX R3, R3, #24, #3 0x3418CF9E: 409A LSLS R2, R3 0x3418CFA0: 4390 BICS R0, R2 0x3418CFA2: F88D 0010 STRB.W R0, [SP, #16] 0x3418CFA6: F89D 0010 LDRB.W R0, [SP, #16] 0x3418CFAA: 9A06 LDR R2, [SP, #24] 0x3418CFAC: F891 3023 LDRB.W R3, [R1, #35] 0x3418CFB0: F003 0307 AND R3, R3, #7 0x3418CFB4: 409A LSLS R2, R3 0x3418CFB6: 4310 ORRS R0, R2 0x3418CFB8: F88D 0010 STRB.W R0, [SP, #16] 0x3418CFBC: F89D 0010 LDRB.W R0, [SP, #16] 0x3418CFC0: F88D 0011 STRB.W R0, [SP, #17] 0x3418CFC4: 9807 LDR R0, [SP, #28] 0x3418CFC6: 3008 ADDS R0, #8 0x3418CFC8: F891 1020 LDRB.W R1, [R1, #32] 0x3418CFCC: 9A03 LDR R2, [SP, #12] 0x3418CFCE: 46EC MOV R12, SP 0x3418CFD0: 2302 MOVS R3, #2 0x3418CFD2: F8CC 3000 STR.W R3, [R12] 0x3418CFD6: AB04 ADD R3, SP, #16 0x3418CFD8: F006 FBBC BL SAL_XSPI_Write ; 0x34193754 0x3418CFDC: B118 CBZ R0, .L8 ; 0x3418CFE6 0x3418CFDE: 200C MOVS R0, #12 0x3418CFE0: F88D 0013 STRB.W R0, [SP, #19] 0x3418CFE4: E008 B 46L9 ; 0x3418CFF8
.L8: 0x3418CFE6: 9807 LDR R0, [SP, #28] 0x3418CFE8: 2164 MOVS R1, #100 0x3418CFEA: F006 F8DD BL driver_check_FlagBUSY ; 0x341931A8 0x3418CFEE: B118 CBZ R0, .L9 ; 0x3418CFF8 0x3418CFF0: 200C MOVS R0, #12 0x3418CFF2: F88D 0013 STRB.W R0, [SP, #19] 0x3418CFF6: E7FF B 46L9 ; 0x3418CFF8
.L9: 0x3418CFF8: F89D 0013 LDRB.W R0, [SP, #19] 0x3418CFFC: B008 ADD SP, SP, #32 0x3418CFFE: BDB0 POP 123R4-R5, R7, PC}

Section .text.EXTMEM_DRIVER_NOR_SFDP_DeInit from blto2_FSBL_lto.o, size=16, align=4


EXTMEM_DRIVER_NOR_SFDP_DeInit: 0x3418D000: B081 SUB SP, SP, #4 0x3418D002: 9000 STR R0, [SP, #0] 0x3418D004: 9900 LDR R1, [SP, #0] 0x3418D006: 2000 MOVS R0, #0 0x3418D008: F881 005E STRB.W R0, [R1, #94] 0x3418D00C: B001 ADD SP, SP, #4 0x3418D00E: 4770 BX LR

Section .text.EXTMEM_DRIVER_NOR_SFDP_Disable_MemoryMappedMode from blto2_FSBL_lto.o, size=36, align=4


EXTMEM_DRIVER_NOR_SFDP_Disable_MemoryMappedMode: 0x3418D010: B580 PUSH 123R7, LR} 0x3418D012: B082 SUB SP, SP, #8 0x3418D014: 9001 STR R0, [SP, #4] 0x3418D016: 2000 MOVS R0, #0 0x3418D018: F88D 0003 STRB.W R0, [SP, #3] 0x3418D01C: 9801 LDR R0, [SP, #4] 0x3418D01E: 3008 ADDS R0, #8 0x3418D020: F006 FC3E BL SAL_XSPI_DisableMapMode ; 0x341938A0 0x3418D024: B110 CBZ R0, .L1 ; 0x3418D02C 0x3418D026: 20F3 MOVS R0, #243 0x3418D028: F88D 0003 STRB.W R0, [SP, #3]
.L1: 0x3418D02C: F99D 0003 LDRSB.W R0, [SP, #3] 0x3418D030: B002 ADD SP, SP, #8 0x3418D032: BD80 POP 123R7, PC}

Section .text.SAL_XSPI_SetClock from blto2_FSBL_lto.o, size=116, align=4


SAL_XSPI_SetClock: 0x3418D034: B086 SUB SP, SP, #24 0x3418D036: 9005 STR R0, [SP, #20] 0x3418D038: 9104 STR R1, [SP, #16] 0x3418D03A: 9203 STR R2, [SP, #12] 0x3418D03C: 9302 STR R3, [SP, #8] 0x3418D03E: 2000 MOVS R0, #0 0x3418D040: F88D 0007 STRB.W R0, [SP, #7] 0x3418D044: 9803 LDR R0, [SP, #12] 0x3418D046: B918 CBNZ R0, .L1 ; 0x3418D050 0x3418D048: 2001 MOVS R0, #1 0x3418D04A: F88D 0007 STRB.W R0, [SP, #7] 0x3418D04E: E027 B 46L3 ; 0x3418D0A0
.L1: 0x3418D050: 9804 LDR R0, [SP, #16] 0x3418D052: 9903 LDR R1, [SP, #12] 0x3418D054: FBB0 F0F1 UDIV R0, R0, R1 0x3418D058: 9000 STR R0, [SP, #0] 0x3418D05A: 9800 LDR R0, [SP, #0] 0x3418D05C: B168 CBZ R0, .L2 ; 0x3418D07A 0x3418D05E: 9804 LDR R0, [SP, #16] 0x3418D060: 9900 LDR R1, [SP, #0] 0x3418D062: FBB0 F0F1 UDIV R0, R0, R1 0x3418D066: 9902 LDR R1, [SP, #8] 0x3418D068: 6008 STR R0, [R1] 0x3418D06A: 9802 LDR R0, [SP, #8] 0x3418D06C: 6800 LDR R0, [R0] 0x3418D06E: 9903 LDR R1, [SP, #12] 0x3418D070: 4288 CMP R0, R1 0x3418D072: D802 BHI 46L2 ; 0x3418D07A 0x3418D074: 9800 LDR R0, [SP, #0] 0x3418D076: 3801 SUBS R0, #1 0x3418D078: 9000 STR R0, [SP, #0]
.L2: 0x3418D07A: 9804 LDR R0, [SP, #16] 0x3418D07C: 9900 LDR R1, [SP, #0] 0x3418D07E: 3101 ADDS R1, #1 0x3418D080: FBB0 F0F1 UDIV R0, R0, R1 0x3418D084: 9902 LDR R1, [SP, #8] 0x3418D086: 6008 STR R0, [R1] 0x3418D088: 9805 LDR R0, [SP, #20] 0x3418D08A: 6800 LDR R0, [R0] 0x3418D08C: 6800 LDR R0, [R0] 0x3418D08E: 68C0 LDR R0, [R0, #12] 0x3418D090: F020 00FF BIC R0, R0, #255 0x3418D094: 9900 LDR R1, [SP, #0] 0x3418D096: 4308 ORRS R0, R1 0x3418D098: 9905 LDR R1, [SP, #20] 0x3418D09A: 6809 LDR R1, [R1] 0x3418D09C: 6809 LDR R1, [R1] 0x3418D09E: 60C8 STR R0, [R1, #12]
.L3: 0x3418D0A0: F89D 0007 LDRB.W R0, [SP, #7] 0x3418D0A4: B006 ADD SP, SP, #24 0x3418D0A6: 4770 BX LR

Section .text.XSPI_FormatCommand from blto2_FSBL_lto.o, size=88, align=4


XSPI_FormatCommand: 0x3418D0A8: B083 SUB SP, SP, #12 0x3418D0AA: F88D 000B STRB.W R0, [SP, #11] 0x3418D0AE: 9101 STR R1, [SP, #4] 0x3418D0B0: F88D 2003 STRB.W R2, [SP, #3] 0x3418D0B4: 9801 LDR R0, [SP, #4] 0x3418D0B6: 2810 CMP R0, #16 0x3418D0B8: D11A BNE 46L3 ; 0x3418D0F0 0x3418D0BA: F89D 0003 LDRB.W R0, [SP, #3] 0x3418D0BE: 0200 LSLS R0, R0, #8 0x3418D0C0: F8AD 0000 STRH.W R0, [SP] 0x3418D0C4: F89D 000B LDRB.W R0, [SP, #11] 0x3418D0C8: 2801 CMP R0, #1 0x3418D0CA: D109 BNE 46L1 ; 0x3418D0E0 0x3418D0CC: F89D 0003 LDRB.W R0, [SP, #3] 0x3418D0D0: F080 01FF EOR R1, R0, #255 0x3418D0D4: F8BD 0000 LDRH.W R0, [SP] 0x3418D0D8: 4308 ORRS R0, R1 0x3418D0DA: F8AD 0000 STRH.W R0, [SP] 0x3418D0DE: E006 B 46L2 ; 0x3418D0EE
.L1: 0x3418D0E0: F89D 1003 LDRB.W R1, [SP, #3] 0x3418D0E4: F8BD 0000 LDRH.W R0, [SP] 0x3418D0E8: 4308 ORRS R0, R1 0x3418D0EA: F8AD 0000 STRH.W R0, [SP]
.L2: 0x3418D0EE: E003 B 46L4 ; 0x3418D0F8
.L3: 0x3418D0F0: F89D 0003 LDRB.W R0, [SP, #3] 0x3418D0F4: F8AD 0000 STRH.W R0, [SP]
.L4: 0x3418D0F8: F8BD 0000 LDRH.W R0, [SP] 0x3418D0FC: B003 ADD SP, SP, #12 0x3418D0FE: 4770 BX LR

Section .text.SAL_XSPI_GetId from blto2_FSBL_lto.o, size=152, align=4


SAL_XSPI_GetId: 0x3418D100: B580 PUSH 123R7, LR} 0x3418D102: B098 SUB SP, SP, #96 0x3418D104: 9017 STR R0, [SP, #92] 0x3418D106: 9116 STR R1, [SP, #88] 0x3418D108: 9215 STR R2, [SP, #84] 0x3418D10A: 9817 LDR R0, [SP, #92] 0x3418D10C: 1D01 ADDS R1, R0, #4 0x3418D10E: A801 ADD R0, SP, #4 0x3418D110: 224C MOVS R2, #76 0x3418D112: F000 FBCE BL __aeabi_memcpy4 ; 0x3418D8B2 0x3418D116: 9817 LDR R0, [SP, #92] 0x3418D118: F890 0050 LDRB.W R0, [R0, #80] 0x3418D11C: 9905 LDR R1, [SP, #20] 0x3418D11E: 229F MOVS R2, #159 0x3418D120: F7FF FFC2 BL XSPI_FormatCommand ; 0x3418D0A8 0x3418D124: 9003 STR R0, [SP, #12] 0x3418D126: 9815 LDR R0, [SP, #84] 0x3418D128: 9010 STR R0, [SP, #64] 0x3418D12A: 9804 LDR R0, [SP, #16] 0x3418D12C: 2801 CMP R0, #1 0x3418D12E: D106 BNE 46L1 ; 0x3418D13E 0x3418D130: 2000 MOVS R0, #0 0x3418D132: 9008 STR R0, [SP, #32] 0x3418D134: 9012 STR R0, [SP, #72] 0x3418D136: F04F 7080 MOV.W R0, #0x01000000 0x3418D13A: 900F STR R0, [SP, #60] 0x3418D13C: E00D B 46L3 ; 0x3418D15A
.L1: 0x3418D13E: 9804 LDR R0, [SP, #16] 0x3418D140: 2803 CMP R0, #3 0x3418D142: D106 BNE 46L2 ; 0x3418D152 0x3418D144: 2000 MOVS R0, #0 0x3418D146: 9008 STR R0, [SP, #32] 0x3418D148: 9012 STR R0, [SP, #72] 0x3418D14A: F04F 7040 MOV.W R0, #0x03000000 0x3418D14E: 900F STR R0, [SP, #60] 0x3418D150: E003 B 46L3 ; 0x3418D15A
.L2: 0x3418D152: 2000 MOVS R0, #0 0x3418D154: 9007 STR R0, [SP, #28] 0x3418D156: 2008 MOVS R0, #8 0x3418D158: 9012 STR R0, [SP, #72]
.L3: 0x3418D15A: 9817 LDR R0, [SP, #92] 0x3418D15C: 6800 LDR R0, [R0] 0x3418D15E: A901 ADD R1, SP, #4 0x3418D160: 2264 MOVS R2, #100 0x3418D162: F004 FD8B BL HAL_XSPI_Command ; 0x34191C7C 0x3418D166: F88D 0053 STRB.W R0, [SP, #83] 0x3418D16A: F89D 0053 LDRB.W R0, [SP, #83] 0x3418D16E: B100 CBZ R0, .L4 ; 0x3418D172 0x3418D170: E007 B 46L5 ; 0x3418D182
.L4: 0x3418D172: 9817 LDR R0, [SP, #92] 0x3418D174: 6800 LDR R0, [R0] 0x3418D176: 9916 LDR R1, [SP, #88] 0x3418D178: 2264 MOVS R2, #100 0x3418D17A: F7FE FCBF BL HAL_XSPI_Receive ; 0x3418BAFC 0x3418D17E: F88D 0053 STRB.W R0, [SP, #83]
.L5: 0x3418D182: F89D 0053 LDRB.W R0, [SP, #83] 0x3418D186: B118 CBZ R0, .L6 ; 0x3418D190 0x3418D188: 9817 LDR R0, [SP, #92] 0x3418D18A: 6800 LDR R0, [R0] 0x3418D18C: F005 F984 BL HAL_XSPI_Abort ; 0x34192498
.L6: 0x3418D190: F89D 0053 LDRB.W R0, [SP, #83] 0x3418D194: B018 ADD SP, SP, #96 0x3418D196: BD80 POP 123R7, PC}

Section .text.XSPI_Transmit from blto2_FSBL_lto.o, size=32, align=4


XSPI_Transmit: 0x3418D198: B580 PUSH 123R7, LR} 0x3418D19A: B084 SUB SP, SP, #16 0x3418D19C: 9003 STR R0, [SP, #12] 0x3418D19E: 9102 STR R1, [SP, #8] 0x3418D1A0: 9803 LDR R0, [SP, #12] 0x3418D1A2: 6800 LDR R0, [R0] 0x3418D1A4: 9902 LDR R1, [SP, #8] 0x3418D1A6: 2264 MOVS R2, #100 0x3418D1A8: F004 FF92 BL HAL_XSPI_Transmit ; 0x341920D0 0x3418D1AC: F88D 0007 STRB.W R0, [SP, #7] 0x3418D1B0: F89D 0007 LDRB.W R0, [SP, #7] 0x3418D1B4: B004 ADD SP, SP, #16 0x3418D1B6: BD80 POP 123R7, PC}

Section .text.SAL_XSPI_CommandSendData from blto2_FSBL_lto.o, size=136, align=4


SAL_XSPI_CommandSendData: 0x3418D1B8: B580 PUSH 123R7, LR} 0x3418D1BA: B098 SUB SP, SP, #96 0x3418D1BC: 9017 STR R0, [SP, #92] 0x3418D1BE: F88D 105B STRB.W R1, [SP, #91] 0x3418D1C2: 9215 STR R2, [SP, #84] 0x3418D1C4: F8AD 3052 STRH.W R3, [SP, #82] 0x3418D1C8: 9817 LDR R0, [SP, #92] 0x3418D1CA: 1D01 ADDS R1, R0, #4 0x3418D1CC: A801 ADD R0, SP, #4 0x3418D1CE: 224C MOVS R2, #76 0x3418D1D0: F000 FB6F BL __aeabi_memcpy4 ; 0x3418D8B2 0x3418D1D4: 9817 LDR R0, [SP, #92] 0x3418D1D6: F890 0050 LDRB.W R0, [R0, #80] 0x3418D1DA: 9905 LDR R1, [SP, #20] 0x3418D1DC: F89D 205B LDRB.W R2, [SP, #91] 0x3418D1E0: F7FF FF62 BL XSPI_FormatCommand ; 0x3418D0A8 0x3418D1E4: 9003 STR R0, [SP, #12] 0x3418D1E6: 2000 MOVS R0, #0 0x3418D1E8: 9008 STR R0, [SP, #32] 0x3418D1EA: 9012 STR R0, [SP, #72] 0x3418D1EC: F8BD 1052 LDRH.W R1, [SP, #82] 0x3418D1F0: 9110 STR R1, [SP, #64] 0x3418D1F2: 9013 STR R0, [SP, #76] 0x3418D1F4: F8BD 0052 LDRH.W R0, [SP, #82] 0x3418D1F8: B908 CBNZ R0, .L1 ; 0x3418D1FE 0x3418D1FA: 2000 MOVS R0, #0 0x3418D1FC: 900F STR R0, [SP, #60]
.L1: 0x3418D1FE: 9817 LDR R0, [SP, #92] 0x3418D200: 6800 LDR R0, [R0] 0x3418D202: A901 ADD R1, SP, #4 0x3418D204: 2264 MOVS R2, #100 0x3418D206: F004 FD39 BL HAL_XSPI_Command ; 0x34191C7C 0x3418D20A: F88D 0003 STRB.W R0, [SP, #3] 0x3418D20E: F89D 0003 LDRB.W R0, [SP, #3] 0x3418D212: B950 CBNZ R0, .L2 ; 0x3418D22A 0x3418D214: F8BD 0052 LDRH.W R0, [SP, #82] 0x3418D218: B138 CBZ R0, .L2 ; 0x3418D22A 0x3418D21A: 9817 LDR R0, [SP, #92] 0x3418D21C: 6800 LDR R0, [R0] 0x3418D21E: 9915 LDR R1, [SP, #84] 0x3418D220: 2264 MOVS R2, #100 0x3418D222: F004 FF55 BL HAL_XSPI_Transmit ; 0x341920D0 0x3418D226: F88D 0003 STRB.W R0, [SP, #3]
.L2: 0x3418D22A: F89D 0003 LDRB.W R0, [SP, #3] 0x3418D22E: B118 CBZ R0, .L3 ; 0x3418D238 0x3418D230: 9817 LDR R0, [SP, #92] 0x3418D232: 6800 LDR R0, [R0] 0x3418D234: F005 F930 BL HAL_XSPI_Abort ; 0x34192498
.L3: 0x3418D238: F89D 0003 LDRB.W R0, [SP, #3] 0x3418D23C: B018 ADD SP, SP, #96 0x3418D23E: BD80 POP 123R7, PC}

Section .text.SAL_XSPI_SendReadCommand from blto2_FSBL_lto.o, size=136, align=4


SAL_XSPI_SendReadCommand: 0x3418D240: B580 PUSH 123R7, LR} 0x3418D242: B098 SUB SP, SP, #96 0x3418D244: 9017 STR R0, [SP, #92] 0x3418D246: F88D 105B STRB.W R1, [SP, #91] 0x3418D24A: 9215 STR R2, [SP, #84] 0x3418D24C: F8AD 3052 STRH.W R3, [SP, #82] 0x3418D250: 9817 LDR R0, [SP, #92] 0x3418D252: 1D01 ADDS R1, R0, #4 0x3418D254: A801 ADD R0, SP, #4 0x3418D256: 224C MOVS R2, #76 0x3418D258: F000 FB2B BL __aeabi_memcpy4 ; 0x3418D8B2 0x3418D25C: 9817 LDR R0, [SP, #92] 0x3418D25E: F890 0050 LDRB.W R0, [R0, #80] 0x3418D262: 9905 LDR R1, [SP, #20] 0x3418D264: F89D 205B LDRB.W R2, [SP, #91] 0x3418D268: F7FF FF1E BL XSPI_FormatCommand ; 0x3418D0A8 0x3418D26C: 9003 STR R0, [SP, #12] 0x3418D26E: 2000 MOVS R0, #0 0x3418D270: 9008 STR R0, [SP, #32] 0x3418D272: 9012 STR R0, [SP, #72] 0x3418D274: F8BD 1052 LDRH.W R1, [SP, #82] 0x3418D278: 9110 STR R1, [SP, #64] 0x3418D27A: 9013 STR R0, [SP, #76] 0x3418D27C: F8BD 0052 LDRH.W R0, [SP, #82] 0x3418D280: B908 CBNZ R0, .L1 ; 0x3418D286 0x3418D282: 2000 MOVS R0, #0 0x3418D284: 900F STR R0, [SP, #60]
.L1: 0x3418D286: 9817 LDR R0, [SP, #92] 0x3418D288: 6800 LDR R0, [R0] 0x3418D28A: A901 ADD R1, SP, #4 0x3418D28C: 2264 MOVS R2, #100 0x3418D28E: F004 FCF5 BL HAL_XSPI_Command ; 0x34191C7C 0x3418D292: F88D 0003 STRB.W R0, [SP, #3] 0x3418D296: F89D 0003 LDRB.W R0, [SP, #3] 0x3418D29A: B950 CBNZ R0, .L2 ; 0x3418D2B2 0x3418D29C: F8BD 0052 LDRH.W R0, [SP, #82] 0x3418D2A0: B138 CBZ R0, .L2 ; 0x3418D2B2 0x3418D2A2: 9817 LDR R0, [SP, #92] 0x3418D2A4: 6800 LDR R0, [R0] 0x3418D2A6: 9915 LDR R1, [SP, #84] 0x3418D2A8: 2264 MOVS R2, #100 0x3418D2AA: F7FE FC27 BL HAL_XSPI_Receive ; 0x3418BAFC 0x3418D2AE: F88D 0003 STRB.W R0, [SP, #3]
.L2: 0x3418D2B2: F89D 0003 LDRB.W R0, [SP, #3] 0x3418D2B6: B118 CBZ R0, .L3 ; 0x3418D2C0 0x3418D2B8: 9817 LDR R0, [SP, #92] 0x3418D2BA: 6800 LDR R0, [R0] 0x3418D2BC: F005 F8EC BL HAL_XSPI_Abort ; 0x34192498
.L3: 0x3418D2C0: F89D 0003 LDRB.W R0, [SP, #3] 0x3418D2C4: B018 ADD SP, SP, #96 0x3418D2C6: BD80 POP 123R7, PC}

Section .text.SAL_XSPI_CheckStatusRegister from blto2_FSBL_lto.o, size=232, align=4


SAL_XSPI_CheckStatusRegister: 0x3418D2C8: B510 PUSH 123R4, LR} 0x3418D2CA: B09E SUB SP, SP, #120 0x3418D2CC: 468C MOV R12, R1 0x3418D2CE: 4686 MOV LR, R0 0x3418D2D0: 9822 LDR R0, [SP, #136] 0x3418D2D2: 9821 LDR R0, [SP, #132] 0x3418D2D4: 9920 LDR R1, [SP, #128] 0x3418D2D6: F8CD E074 STR.W LR, [SP, #116] 0x3418D2DA: F88D C073 STRB.W R12, [SP, #115] 0x3418D2DE: 921B STR R2, [SP, #108] 0x3418D2E0: F88D 306B STRB.W R3, [SP, #107] 0x3418D2E4: F88D 106A STRB.W R1, [SP, #106] 0x3418D2E8: F88D 0069 STRB.W R0, [SP, #105] 0x3418D2EC: 981D LDR R0, [SP, #116] 0x3418D2EE: 1D01 ADDS R1, R0, #4 0x3418D2F0: A807 ADD R0, SP, #28 0x3418D2F2: 224C MOVS R2, #76 0x3418D2F4: F000 FADD BL __aeabi_memcpy4 ; 0x3418D8B2 0x3418D2F8: F89D 006B LDRB.W R0, [SP, #107] 0x3418D2FC: 9002 STR R0, [SP, #8] 0x3418D2FE: F89D 006A LDRB.W R0, [SP, #106] 0x3418D302: 9003 STR R0, [SP, #12] 0x3418D304: 2000 MOVS R0, #0 0x3418D306: 9000 STR R0, [SP, #0] 0x3418D308: 9004 STR R0, [SP, #16] 0x3418D30A: F44F 0080 MOV.W R0, #0x400000 0x3418D30E: 9005 STR R0, [SP, #20] 0x3418D310: 2010 MOVS R0, #16 0x3418D312: 9006 STR R0, [SP, #24] 0x3418D314: 981D LDR R0, [SP, #116] 0x3418D316: F890 0050 LDRB.W R0, [R0, #80] 0x3418D31A: 990B LDR R1, [SP, #44] 0x3418D31C: F89D 2073 LDRB.W R2, [SP, #115] 0x3418D320: F7FF FEC2 BL XSPI_FormatCommand ; 0x3418D0A8 0x3418D324: 4601 MOV R1, R0 0x3418D326: 9800 LDR R0, [SP, #0] 0x3418D328: 9109 STR R1, [SP, #36] 0x3418D32A: 2101 MOVS R1, #1 0x3418D32C: 9116 STR R1, [SP, #88] 0x3418D32E: 9019 STR R0, [SP, #100] 0x3418D330: 980A LDR R0, [SP, #40] 0x3418D332: 2801 CMP R0, #1 0x3418D334: D105 BNE 46L1 ; 0x3418D342 0x3418D336: F04F 7080 MOV.W R0, #0x01000000 0x3418D33A: 9015 STR R0, [SP, #84] 0x3418D33C: 2000 MOVS R0, #0 0x3418D33E: 900E STR R0, [SP, #56] 0x3418D340: 9018 STR R0, [SP, #96]
.L1: 0x3418D342: 9815 LDR R0, [SP, #84] 0x3418D344: F1B0 6F80 CMP.W R0, #0x04000000 0x3418D348: D114 BNE 46L3 ; 0x3418D374 0x3418D34A: F89D 0069 LDRB.W R0, [SP, #105] 0x3418D34E: 28C2 CMP R0, #194 0x3418D350: D108 BNE 46L2 ; 0x3418D364 0x3418D352: 9817 LDR R0, [SP, #92] 0x3418D354: F1B0 6F00 CMP.W R0, #0x08000000 0x3418D358: D104 BNE 46L2 ; 0x3418D364 0x3418D35A: F04F 5000 MOV.W R0, #0x20000000 0x3418D35E: 9019 STR R0, [SP, #100] 0x3418D360: 2000 MOVS R0, #0 0x3418D362: 9017 STR R0, [SP, #92]
.L2: 0x3418D364: F44F 6080 MOV.W R0, #0x0400 0x3418D368: 900E STR R0, [SP, #56] 0x3418D36A: F44F 5040 MOV.W R0, #0x3000 0x3418D36E: 900F STR R0, [SP, #60] 0x3418D370: 981B LDR R0, [SP, #108] 0x3418D372: 900D STR R0, [SP, #52]
.L3: 0x3418D374: 981D LDR R0, [SP, #116] 0x3418D376: 6800 LDR R0, [R0] 0x3418D378: A907 ADD R1, SP, #28 0x3418D37A: 2264 MOVS R2, #100 0x3418D37C: F004 FC7E BL HAL_XSPI_Command ; 0x34191C7C 0x3418D380: F88D 0007 STRB.W R0, [SP, #7] 0x3418D384: F89D 0007 LDRB.W R0, [SP, #7] 0x3418D388: B938 CBNZ R0, .L4 ; 0x3418D39A 0x3418D38A: 981D LDR R0, [SP, #116] 0x3418D38C: 6800 LDR R0, [R0] 0x3418D38E: 9A22 LDR R2, [SP, #136] 0x3418D390: A902 ADD R1, SP, #8 0x3418D392: F004 FF0F BL HAL_XSPI_AutoPolling ; 0x341921B4 0x3418D396: F88D 0007 STRB.W R0, [SP, #7]
.L4: 0x3418D39A: F89D 0007 LDRB.W R0, [SP, #7] 0x3418D39E: B118 CBZ R0, .L5 ; 0x3418D3A8 0x3418D3A0: 981D LDR R0, [SP, #116] 0x3418D3A2: 6800 LDR R0, [R0] 0x3418D3A4: F005 F878 BL HAL_XSPI_Abort ; 0x34192498
.L5: 0x3418D3A8: F89D 0007 LDRB.W R0, [SP, #7] 0x3418D3AC: B01E ADD SP, SP, #120 0x3418D3AE: BD10 POP 123R4, PC}

Section .text.SAL_XSPI_EnableMapMode from blto2_FSBL_lto.o, size=200, align=4


SAL_XSPI_EnableMapMode: 0x3418D3B0: B580 PUSH 123R7, LR} 0x3418D3B2: B09C SUB SP, SP, #112 0x3418D3B4: 4684 MOV R12, R0 0x3418D3B6: 981E LDR R0, [SP, #120] 0x3418D3B8: F8CD C06C STR.W R12, [SP, #108] 0x3418D3BC: F88D 106B STRB.W R1, [SP, #107] 0x3418D3C0: F88D 206A STRB.W R2, [SP, #106] 0x3418D3C4: F88D 3069 STRB.W R3, [SP, #105] 0x3418D3C8: F88D 0068 STRB.W R0, [SP, #104] 0x3418D3CC: 981B LDR R0, [SP, #108] 0x3418D3CE: 1D01 ADDS R1, R0, #4 0x3418D3D0: A806 ADD R0, SP, #24 0x3418D3D2: 9001 STR R0, [SP, #4] 0x3418D3D4: 224C MOVS R2, #76 0x3418D3D6: F000 FA6C BL __aeabi_memcpy4 ; 0x3418D8B2 0x3418D3DA: 2000 MOVS R0, #0 0x3418D3DC: 9005 STR R0, [SP, #20] 0x3418D3DE: 9004 STR R0, [SP, #16] 0x3418D3E0: 9003 STR R0, [SP, #12] 0x3418D3E2: 9002 STR R0, [SP, #8] 0x3418D3E4: 2001 MOVS R0, #1 0x3418D3E6: 9006 STR R0, [SP, #24] 0x3418D3E8: 981B LDR R0, [SP, #108] 0x3418D3EA: F890 0050 LDRB.W R0, [R0, #80] 0x3418D3EE: 990A LDR R1, [SP, #40] 0x3418D3F0: F89D 206B LDRB.W R2, [SP, #107] 0x3418D3F4: F7FF FE58 BL XSPI_FormatCommand ; 0x3418D0A8 0x3418D3F8: 9901 LDR R1, [SP, #4] 0x3418D3FA: 9008 STR R0, [SP, #32] 0x3418D3FC: F89D 006A LDRB.W R0, [SP, #106] 0x3418D400: 9017 STR R0, [SP, #92] 0x3418D402: 981B LDR R0, [SP, #108] 0x3418D404: 6800 LDR R0, [R0] 0x3418D406: 2264 MOVS R2, #100 0x3418D408: F004 FC38 BL HAL_XSPI_Command ; 0x34191C7C 0x3418D40C: F88D 0067 STRB.W R0, [SP, #103] 0x3418D410: F89D 0067 LDRB.W R0, [SP, #103] 0x3418D414: B100 CBZ R0, .L1 ; 0x3418D418 0x3418D416: E024 B 46L3 ; 0x3418D462
.L1: 0x3418D418: 2002 MOVS R0, #2 0x3418D41A: 9006 STR R0, [SP, #24] 0x3418D41C: 981B LDR R0, [SP, #108] 0x3418D41E: F890 0050 LDRB.W R0, [R0, #80] 0x3418D422: 990A LDR R1, [SP, #40] 0x3418D424: F89D 2069 LDRB.W R2, [SP, #105] 0x3418D428: F7FF FE3E BL XSPI_FormatCommand ; 0x3418D0A8 0x3418D42C: 9008 STR R0, [SP, #32] 0x3418D42E: F89D 0068 LDRB.W R0, [SP, #104] 0x3418D432: 9017 STR R0, [SP, #92] 0x3418D434: 981B LDR R0, [SP, #108] 0x3418D436: 6800 LDR R0, [R0] 0x3418D438: A906 ADD R1, SP, #24 0x3418D43A: 2264 MOVS R2, #100 0x3418D43C: F004 FC1E BL HAL_XSPI_Command ; 0x34191C7C 0x3418D440: F88D 0067 STRB.W R0, [SP, #103] 0x3418D444: F89D 0067 LDRB.W R0, [SP, #103] 0x3418D448: B100 CBZ R0, .L2 ; 0x3418D44C 0x3418D44A: E00A B 46L3 ; 0x3418D462
.L2: 0x3418D44C: 2000 MOVS R0, #0 0x3418D44E: 9002 STR R0, [SP, #8] 0x3418D450: 2050 MOVS R0, #80 0x3418D452: 9003 STR R0, [SP, #12] 0x3418D454: 981B LDR R0, [SP, #108] 0x3418D456: 6800 LDR R0, [R0] 0x3418D458: A902 ADD R1, SP, #8 0x3418D45A: F004 FF77 BL HAL_XSPI_MemoryMapped ; 0x3419234C 0x3418D45E: F88D 0067 STRB.W R0, [SP, #103]
.L3: 0x3418D462: F89D 0067 LDRB.W R0, [SP, #103] 0x3418D466: B118 CBZ R0, .L4 ; 0x3418D470 0x3418D468: 981B LDR R0, [SP, #108] 0x3418D46A: 6800 LDR R0, [R0] 0x3418D46C: F005 F814 BL HAL_XSPI_Abort ; 0x34192498
.L4: 0x3418D470: F89D 0067 LDRB.W R0, [SP, #103] 0x3418D474: B01C ADD SP, SP, #112 0x3418D476: BD80 POP 123R7, PC}

Section .text.SAL_XSPI_UpdateMemoryType from blto2_FSBL_lto.o, size=116, align=4


SAL_XSPI_UpdateMemoryType: 0x3418D478: B084 SUB SP, SP, #16 0x3418D47A: 9002 STR R0, [SP, #8] 0x3418D47C: F88D 1007 STRB.W R1, [SP, #7] 0x3418D480: 2000 MOVS R0, #0 0x3418D482: F88D 0006 STRB.W R0, [SP, #6] 0x3418D486: 9802 LDR R0, [SP, #8] 0x3418D488: 6800 LDR R0, [R0] 0x3418D48A: 6800 LDR R0, [R0] 0x3418D48C: 6880 LDR R0, [R0, #8] 0x3418D48E: F000 60E0 AND R0, R0, #0x07000000 0x3418D492: 9000 STR R0, [SP, #0] 0x3418D494: F89D 0007 LDRB.W R0, [SP, #7] 0x3418D498: B9E0 CBNZ R0, .L4 ; 0x3418D4D4 0x3418D49A: 9800 LDR R0, [SP, #0] 0x3418D49C: B918 CBNZ R0, .L1 ; 0x3418D4A6 0x3418D49E: F04F 7080 MOV.W R0, #0x01000000 0x3418D4A2: 9000 STR R0, [SP, #0] 0x3418D4A4: E009 B 46L3 ; 0x3418D4BA
.L1: 0x3418D4A6: 9800 LDR R0, [SP, #0] 0x3418D4A8: F1B0 7F80 CMP.W R0, #0x01000000 0x3418D4AC: D102 BNE 46L2 ; 0x3418D4B4 0x3418D4AE: 2000 MOVS R0, #0 0x3418D4B0: 9000 STR R0, [SP, #0] 0x3418D4B2: E002 B 46L3 ; 0x3418D4BA
.L2: 0x3418D4B4: 2001 MOVS R0, #1 0x3418D4B6: F88D 0006 STRB.W R0, [SP, #6]
.L3: 0x3418D4BA: 9802 LDR R0, [SP, #8] 0x3418D4BC: 6800 LDR R0, [R0] 0x3418D4BE: 6800 LDR R0, [R0] 0x3418D4C0: 6880 LDR R0, [R0, #8] 0x3418D4C2: F020 60E0 BIC R0, R0, #0x07000000 0x3418D4C6: 9900 LDR R1, [SP, #0] 0x3418D4C8: 4308 ORRS R0, R1 0x3418D4CA: 9902 LDR R1, [SP, #8] 0x3418D4CC: 6809 LDR R1, [R1] 0x3418D4CE: 6809 LDR R1, [R1] 0x3418D4D0: 6088 STR R0, [R1, #8] 0x3418D4D2: E003 B 46L5 ; 0x3418D4DC
.L4: 0x3418D4D4: 2001 MOVS R0, #1 0x3418D4D6: F88D 000F STRB.W R0, [SP, #15] 0x3418D4DA: E003 B 46L6 ; 0x3418D4E4
.L5: 0x3418D4DC: F89D 0006 LDRB.W R0, [SP, #6] 0x3418D4E0: F88D 000F STRB.W R0, [SP, #15]
.L6: 0x3418D4E4: F89D 000F LDRB.W R0, [SP, #15] 0x3418D4E8: B004 ADD SP, SP, #16 0x3418D4EA: 4770 BX LR

Section .text.EXTMEM_MemoryMappedMode from blto2_FSBL_lto.o, size=140, align=4


EXTMEM_MemoryMappedMode: 0x3418D4EC: B580 PUSH 123R7, LR} 0x3418D4EE: B084 SUB SP, SP, #16 0x3418D4F0: 9002 STR R0, [SP, #8] 0x3418D4F2: F88D 1007 STRB.W R1, [SP, #7] 0x3418D4F6: 20FB MOVS R0, #251 0x3418D4F8: F88D 0006 STRB.W R0, [SP, #6] 0x3418D4FC: 9802 LDR R0, [SP, #8] 0x3418D4FE: BB98 CBNZ R0, .L5 ; 0x3418D568 0x3418D500: 2000 MOVS R0, #0 0x3418D502: F88D 0006 STRB.W R0, [SP, #6] 0x3418D506: 9802 LDR R0, [SP, #8] 0x3418D508: 21AC MOVS R1, #172 0x3418D50A: 4341 MULS R1, R0, R1 0x3418D50C: F240 0000 MOVW R0, #0 ; 0x34000000 = extmem_list_config 0x3418D510: F2C3 4000 MOVT R0, #0x3400 ; 0x34000000 = extmem_list_config 0x3418D514: 5C40 LDRB R0, [R0, R1] 0x3418D516: BB20 CBNZ R0, .L4 ; 0x3418D562 0x3418D518: F89D 0007 LDRB.W R0, [SP, #7] 0x3418D51C: B980 CBNZ R0, .L2 ; 0x3418D540 0x3418D51E: 9802 LDR R0, [SP, #8] 0x3418D520: F240 0200 MOVW R2, #0 ; 0x34000000 = extmem_list_config 0x3418D524: F2C3 4200 MOVT R2, #0x3400 ; 0x34000000 = extmem_list_config 0x3418D528: 21AC MOVS R1, #172 0x3418D52A: FB00 2001 MLA R0, R0, R1, R2 0x3418D52E: 300C ADDS R0, #12 0x3418D530: F005 FF08 BL EXTMEM_DRIVER_NOR_SFDP_Enable_MemoryMappedMode ; 0x34193344 0x3418D534: B118 CBZ R0, .L1 ; 0x3418D53E 0x3418D536: 20FD MOVS R0, #253 0x3418D538: F88D 000F STRB.W R0, [SP, #15] 0x3418D53C: E018 B 46L6 ; 0x3418D570
.L1: 0x3418D53E: E00F B 46L3 ; 0x3418D560
.L2: 0x3418D540: 9802 LDR R0, [SP, #8] 0x3418D542: F240 0200 MOVW R2, #0 ; 0x34000000 = extmem_list_config 0x3418D546: F2C3 4200 MOVT R2, #0x3400 ; 0x34000000 = extmem_list_config 0x3418D54A: 21AC MOVS R1, #172 0x3418D54C: FB00 2001 MLA R0, R0, R1, R2 0x3418D550: 300C ADDS R0, #12 0x3418D552: F7FF FD5D BL EXTMEM_DRIVER_NOR_SFDP_Disable_MemoryMappedMode ; 0x3418D010 0x3418D556: B118 CBZ R0, .L3 ; 0x3418D560 0x3418D558: 20FD MOVS R0, #253 0x3418D55A: F88D 000F STRB.W R0, [SP, #15] 0x3418D55E: E007 B 46L6 ; 0x3418D570
.L3: 0x3418D560: E002 B 46L5 ; 0x3418D568
.L4: 0x3418D562: 20FE MOVS R0, #254 0x3418D564: F88D 0006 STRB.W R0, [SP, #6]
.L5: 0x3418D568: F89D 0006 LDRB.W R0, [SP, #6] 0x3418D56C: F88D 000F STRB.W R0, [SP, #15]
.L6: 0x3418D570: F99D 000F LDRSB.W R0, [SP, #15] 0x3418D574: B004 ADD SP, SP, #16 0x3418D576: BD80 POP 123R7, PC}

Section .text.EXTMEM_GetMapAddress from blto2_FSBL_lto.o, size=196, align=4


EXTMEM_GetMapAddress: 0x3418D578: B083 SUB SP, SP, #12 0x3418D57A: 9002 STR R0, [SP, #8] 0x3418D57C: 9101 STR R1, [SP, #4] 0x3418D57E: 20FB MOVS R0, #251 0x3418D580: F88D 0003 STRB.W R0, [SP, #3] 0x3418D584: 9802 LDR R0, [SP, #8] 0x3418D586: 2800 CMP R0, #0 0x3418D588: D154 BNE 46L7 ; 0x3418D634 0x3418D58A: 2000 MOVS R0, #0 0x3418D58C: F88D 0003 STRB.W R0, [SP, #3] 0x3418D590: 9802 LDR R0, [SP, #8] 0x3418D592: 21AC MOVS R1, #172 0x3418D594: 4341 MULS R1, R0, R1 0x3418D596: F240 0000 MOVW R0, #0 ; 0x34000000 = extmem_list_config 0x3418D59A: F2C3 4000 MOVT R0, #0x3400 ; 0x34000000 = extmem_list_config 0x3418D59E: 5C40 LDRB R0, [R0, R1] 0x3418D5A0: F010 0FFD TST R0, #253 0x3418D5A4: D000 BEQ 46L1 ; 0x3418D5A8 0x3418D5A6: E042 B 46L6 ; 0x3418D62E
.L1: 0x3418D5A8: 9802 LDR R0, [SP, #8] 0x3418D5AA: F240 0200 MOVW R2, #0 ; 0x34000000 = extmem_list_config 0x3418D5AE: F2C3 4200 MOVT R2, #0x3400 ; 0x34000000 = extmem_list_config 0x3418D5B2: 21AC MOVS R1, #172 0x3418D5B4: FB00 2001 MLA R0, R0, R1, R2 0x3418D5B8: 6840 LDR R0, [R0, #4] 0x3418D5BA: 6800 LDR R0, [R0] 0x3418D5BC: F245 0100 MOVW R1, #0x5000 0x3418D5C0: F6C5 0102 MOVT R1, #0x5802 0x3418D5C4: 4288 CMP R0, R1 0x3418D5C6: D104 BNE 46L2 ; 0x3418D5D2 0x3418D5C8: 9901 LDR R1, [SP, #4] 0x3418D5CA: F04F 4010 MOV.W R0, #0x90000000 0x3418D5CE: 6008 STR R0, [R1] 0x3418D5D0: E02C B 46L5 ; 0x3418D62C
.L2: 0x3418D5D2: 9802 LDR R0, [SP, #8] 0x3418D5D4: F240 0200 MOVW R2, #0 ; 0x34000000 = extmem_list_config 0x3418D5D8: F2C3 4200 MOVT R2, #0x3400 ; 0x34000000 = extmem_list_config 0x3418D5DC: 21AC MOVS R1, #172 0x3418D5DE: FB00 2001 MLA R0, R0, R1, R2 0x3418D5E2: 6840 LDR R0, [R0, #4] 0x3418D5E4: 6800 LDR R0, [R0] 0x3418D5E6: F24A 0100 MOVW R1, #0xA000 0x3418D5EA: F6C5 0102 MOVT R1, #0x5802 0x3418D5EE: 4288 CMP R0, R1 0x3418D5F0: D104 BNE 46L3 ; 0x3418D5FC 0x3418D5F2: 9901 LDR R1, [SP, #4] 0x3418D5F4: F04F 40E0 MOV.W R0, #0x70000000 0x3418D5F8: 6008 STR R0, [R1] 0x3418D5FA: E017 B 46L5 ; 0x3418D62C
.L3: 0x3418D5FC: 9802 LDR R0, [SP, #8] 0x3418D5FE: F240 0200 MOVW R2, #0 ; 0x34000000 = extmem_list_config 0x3418D602: F2C3 4200 MOVT R2, #0x3400 ; 0x34000000 = extmem_list_config 0x3418D606: 21AC MOVS R1, #172 0x3418D608: FB00 2001 MLA R0, R0, R1, R2 0x3418D60C: 6840 LDR R0, [R0, #4] 0x3418D60E: 6800 LDR R0, [R0] 0x3418D610: F24D 0100 MOVW R1, #0xD000 0x3418D614: F6C5 0102 MOVT R1, #0x5802 0x3418D618: 4288 CMP R0, R1 0x3418D61A: D104 BNE 46L4 ; 0x3418D626 0x3418D61C: 9901 LDR R1, [SP, #4] 0x3418D61E: F04F 4000 MOV.W R0, #0x80000000 0x3418D622: 6008 STR R0, [R1] 0x3418D624: E002 B 46L5 ; 0x3418D62C
.L4: 0x3418D626: 20FD MOVS R0, #253 0x3418D628: F88D 0003 STRB.W R0, [SP, #3]
.L5: 0x3418D62C: E002 B 46L7 ; 0x3418D634
.L6: 0x3418D62E: 20FE MOVS R0, #254 0x3418D630: F88D 0003 STRB.W R0, [SP, #3]
.L7: 0x3418D634: F99D 0003 LDRSB.W R0, [SP, #3] 0x3418D638: B003 ADD SP, SP, #12 0x3418D63A: 4770 BX LR

Section .rodata.SFDP_BuildGenericDriver.chip_erase_unit from blto2_FSBL_lto.o, size=16, align=4


SFDP_BuildGenericDriver.chip_erase_unit: 0x3418D63C: 10 DC.B 0x10 ; '\x10' 0x3418D63D: 00 DC.B 0x00 ; '\0' 0x3418D63E: 00 DC.B 0x00 ; '\0' 0x3418D63F: 00 DC.B 0x00 ; '\0' 0x3418D640: 00 DC.B 0x00 ; '\0' 0x3418D641: 01 DC.B 0x01 ; '\x01' 0x3418D642: 00 DC.B 0x00 ; '\0' 0x3418D643: 00 DC.B 0x00 ; '\0' 0x3418D644: A0 DC.B 0xA0 ; '\xA0' 0x3418D645: 0F DC.B 0x0F ; '\x0F' 0x3418D646: 00 DC.B 0x00 ; '\0' 0x3418D647: 00 DC.B 0x00 ; '\0' 0x3418D648: 00 DC.B 0x00 ; '\0' 0x3418D649: FA DC.B 0xFA ; '\xFA' 0x3418D64A: 00 DC.B 0x00 ; '\0' 0x3418D64B: 00 DC.B 0x00 ; '\0'

Section .init._start from SEGGER_THUMB_Startup.o, size=20, align=4


_start: 0x3418D64C: 4C03 LDR R4, =0x34194628 ; [PC, #12] [0x3418D65C]
.L1: 0x3418D64E: 6820 LDR R0, [R4] 0x3418D650: 3404 ADDS R4, #4 0x3418D652: 4780 BLX R0 0x3418D654: E7FB B 46L1 ; 0x3418D64E
__SEGGER_init_done: __startup_complete: 0x3418D656: F7F3 FEB9 BL main ; 0x341813CC
exit: 0x3418D65A: E7FE B exit ; 0x3418D65A 0x3418D65C: 34194628 DC.W 34194628 ; R_ARM_ABS32

Section .init.Reset_Handler from STM32N6xx_Startup.o, size=68, align=4


reset_handler: Reset_Handler: 0x3418D660: 490C LDR R1, =0x34062000 ; [PC, #48] [0x3418D694] 0x3418D662: F381 880A MSR MSPLIM, R1 0x3418D666: F04F 0100 MOV.W R1, #0 0x3418D66A: F381 880B MSR PSPLIM, R1 0x3418D66E: F000 FB29 BL SystemInit ; 0x3418DCC4 0x3418D672: F64E 5088 MOVW R0, #0xED88 0x3418D676: F2CE 0000 MOVT R0, #0xE000 0x3418D67A: 6801 LDR R1, [R0] 0x3418D67C: F451 0170 ORRS R1, R1, #0xF00000 0x3418D680: 6001 STR R1, [R0] 0x3418D682: 4805 LDR R0, =0x56009E90 ; [PC, #20] [0x3418D698] 0x3418D684: F04F 01B4 MOV.W R1, #180 0x3418D688: 6001 STR R1, [R0] 0x3418D68A: 4804 LDR R0, =0x56009E8C ; [PC, #16] [0x3418D69C] 0x3418D68C: 4904 LDR R1, =0xB451B400 ; [PC, #16] [0x3418D6A0] 0x3418D68E: 6001 STR R1, [R0] 0x3418D690: F7FF FFDC BL _start ; 0x3418D64C 0x3418D694: 34062000 DC.W 34062000 ; R_ARM_ABS32 0x3418D698: 56009E90 DC.W 0x56009E90 0x3418D69C: 56009E8C DC.W 0x56009E8C 0x3418D6A0: B451B400 DC.W 0xB451B400

Section .text.libc.fmodf from floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=284, align=4


fmodf: 0x3418D6A4: EE10 2A10 VMOV R2, S0 0x3418D6A8: F04F 30FF MOV.W R0, #0xFFFFFFFF 0x3418D6AC: EE10 3A90 VMOV R3, S1 0x3418D6B0: EB00 50D2 ADD.W R0, R0, R2, LSR #23 0x3418D6B4: 28FD CMP R0, #253 0x3418D6B6: D857 BHI 46L14 ; 0x3418D768 0x3418D6B8: F06F 00FE MVN R0, #254 0x3418D6BC: EB00 50D3 ADD.W R0, R0, R3, LSR #23 0x3418D6C0: F110 0FFE CMN R0, #254 0x3418D6C4: D350 BCC 46L14 ; 0x3418D768 0x3418D6C6: F022 4000 BIC R0, R2, #0x80000000
.L1: 0x3418D6CA: F002 4C00 AND R12, R2, #0x80000000 0x3418D6CE: 4283 CMP R3, R0 0x3418D6D0: D265 BCS 46L17 ; 0x3418D79E 0x3418D6D2: B510 PUSH 123R4, LR} 0x3418D6D4: F64F 7EFF MOVW LR, #0xFFFF 0x3418D6D8: 0DD1 LSRS R1, R2, #23 0x3418D6DA: F2C0 0E7F MOVT LR, #127 0x3418D6DE: B2C9 UXTB R1, R1 0x3418D6E0: B121 CBZ R1, .L2 ; 0x3418D6EC 0x3418D6E2: EA02 000E AND.W R0, R2, LR 0x3418D6E6: F500 0200 ADD.W R2, R0, #0x800000 0x3418D6EA: E007 B 46L3 ; 0x3418D6FC
.L2: 0x3418D6EC: FAB0 F180 CLZ R1, R0 0x3418D6F0: F1A1 0208 SUB.W R2, R1, #8 0x3418D6F4: F1C1 0108 RSB R1, R1, #8 0x3418D6F8: FA00 F202 LSL.W R2, R0, R2
.L3: 0x3418D6FC: F3C3 54C7 UBFX R4, R3, #23, #8 0x3418D700: B124 CBZ R4, .L4 ; 0x3418D70C 0x3418D702: EA03 000E AND.W R0, R3, LR 0x3418D706: F500 0300 ADD.W R3, R0, #0x800000 0x3418D70A: E006 B 46L5 ; 0x3418D71A
.L4: 0x3418D70C: FAB3 F083 CLZ R0, R3 0x3418D710: F1A0 0408 SUB.W R4, R0, #8 0x3418D714: 40A3 LSLS R3, R4 0x3418D716: F1C0 0408 RSB R4, R0, #8
.L5: 0x3418D71A: 42A1 CMP R1, R4 0x3418D71C: DD09 BLE 46L8 ; 0x3418D732
.L6: 0x3418D71E: 1AD0 SUBS R0, R2, R3 0x3418D720: D402 BMI 46L7 ; 0x3418D728 0x3418D722: 429A CMP R2, R3 0x3418D724: 4602 MOV R2, R0 0x3418D726: D009 BEQ 46L9 ; 0x3418D73C
.L7: 0x3418D728: 3901 SUBS R1, #1 0x3418D72A: 0052 LSLS R2, R2, #1 0x3418D72C: 42A1 CMP R1, R4 0x3418D72E: DCF6 BGT 46L6 ; 0x3418D71E 0x3418D730: 4621 MOV R1, R4
.L8: 0x3418D732: 1AD0 SUBS R0, R2, R3 0x3418D734: D405 BMI 46L10 ; 0x3418D742 0x3418D736: 429A CMP R2, R3 0x3418D738: 4602 MOV R2, R0 0x3418D73A: D102 BNE 46L10 ; 0x3418D742
.L9: 0x3418D73C: EE00 CA90 VMOV S1, R12 0x3418D740: E00D B 46L12 ; 0x3418D75E
.L10: 0x3418D742: FAB2 F082 CLZ R0, R2 0x3418D746: 3808 SUBS R0, #8 0x3418D748: 1A09 SUBS R1, R1, R0 0x3418D74A: FA02 F000 LSL.W R0, R2, R0 0x3418D74E: 2900 CMP R1, #0 0x3418D750: DD2A BLE 46L18 ; 0x3418D7A8 0x3418D752: 3901 SUBS R1, #1
.L11: 0x3418D754: 4460 ADD R0, R12 0x3418D756: EB00 50C1 ADD.W R0, R0, R1, LSL #23 0x3418D75A: EE00 0A90 VMOV S1, R0
.L12: 0x3418D75E: E8BD 4010 POP.W 123R4, LR}
.L13: 0x3418D762: EEB0 0A60 VMOV.F32 S0, S1 0x3418D766: 4770 BX LR
.L14: 0x3418D768: EEB4 0A40 VCMP.F32 S0, S0 0x3418D76C: EEF1 FA10 VMRS APSR_nzcv, FPSCR 0x3418D770: D60A BVS 46L15 ; 0x3418D788 0x3418D772: EEF4 0A60 VCMP.F32 S1, S1 0x3418D776: EEF1 FA10 VMRS APSR_nzcv, FPSCR 0x3418D77A: D6F2 BVS 46L13 ; 0x3418D762 0x3418D77C: F032 4000 BICS R0, R2, #0x80000000 0x3418D780: F023 4300 BIC R3, R3, #0x80000000 0x3418D784: D103 BNE 46L16 ; 0x3418D78E 0x3418D786: B113 CBZ R3, .L16 ; 0x3418D78E
.L15: 0x3418D788: EEF0 0A40 VMOV.F32 S1, S0 0x3418D78C: E7E9 B 46L13 ; 0x3418D762
.L16: 0x3418D78E: F1B0 4FFF CMP.W R0, #0x7F800000 0x3418D792: BF18 IT NE 0x3418D794: 2B00 CMPNE R3, #0 0x3418D796: D10C BNE 46L19 ; 0x3418D7B2 0x3418D798: EDDF 0A08 VLDR S1, =0x7FC00000 ; [PC, #32] [0x3418D7BC] 0x3418D79C: E7E1 B 46L13 ; 0x3418D762
.L17: 0x3418D79E: EE01 CA10 VMOV S2, R12 0x3418D7A2: FE41 0A00 VSELEQ.F32 S1, S2, S0 0x3418D7A6: E7DC B 46L13 ; 0x3418D762
.L18: 0x3418D7A8: F1C1 0101 RSB R1, R1, #1 0x3418D7AC: 40C8 LSRS R0, R1 0x3418D7AE: 2100 MOVS R1, #0 0x3418D7B0: E7D0 B 46L11 ; 0x3418D754
.L19: 0x3418D7B2: F1B3 4FFF CMP.W R3, #0x7F800000 0x3418D7B6: F47F AF88 BNE.W 46L1 ; 0x3418D6CA 0x3418D7BA: E7E5 B 46L15 ; 0x3418D788 0x3418D7BC: 7FC00000 DC.W 0x7FC00000

Section .text.libc.floorf from floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=104, align=4


floorf: 0x3418D7C0: EE10 0A10 VMOV R0, S0 0x3418D7C4: F3C0 51C7 UBFX R1, R0, #23, #8 0x3418D7C8: 1E4A SUBS R2, R1, #1 0x3418D7CA: 2AFE CMP R2, #254 0x3418D7CC: D224 BCS 46L4 ; 0x3418D818 0x3418D7CE: 297E CMP R1, #126 0x3418D7D0: D808 BHI 46L2 ; 0x3418D7E4 0x3418D7D2: ED9F 0A14 VLDR S0, =0x00000000 ; [PC, #80] [0x3418D824] 0x3418D7D6: EEBF 1A00 VMOV.F32 S2, #-1 0x3418D7DA: F1B0 3FFF CMP.W R0, #0xFFFFFFFF 0x3418D7DE: FE30 0A01 VSELGT.F32 S0, S0, S2
.L1: 0x3418D7E2: 4770 BX LR
.L2: 0x3418D7E4: 2995 CMP R1, #149 0x3418D7E6: D8FC BHI 46L1 ; 0x3418D7E2 0x3418D7E8: F1A1 037F SUB.W R3, R1, #127 0x3418D7EC: 2200 MOVS R2, #0 0x3418D7EE: F6CF 7280 MOVT R2, #0xFF80 0x3418D7F2: F44F 0C00 MOV.W R12, #0x800000 0x3418D7F6: 411A ASRS R2, R3 0x3418D7F8: EA02 0100 AND.W R1, R2, R0 0x3418D7FC: 4098 LSLS R0, R3 0x3418D7FE: F1B1 3FFF CMP.W R1, #0xFFFFFFFF 0x3418D802: 460A MOV R2, R1 0x3418D804: FA2C FC03 LSR.W R12, R12, R3 0x3418D808: BFB8 IT LT 0x3418D80A: 4462 ADDLT R2, R12 0x3418D80C: 0240 LSLS R0, R0, #9 0x3418D80E: EA52 8011 CSEL R0, R2, R1, NE
.L3: 0x3418D812: EE00 0A10 VMOV S0, R0 0x3418D816: 4770 BX LR
.L4: 0x3418D818: 2900 CMP R1, #0 0x3418D81A: D1FA BNE 46L3 ; 0x3418D812 0x3418D81C: F000 4000 AND R0, R0, #0x80000000 0x3418D820: E7F7 B 46L3 ; 0x3418D812 0x3418D822: BF00 NOP 0x3418D824: 00000000 DC.W 0x00000000

Section .rodata.libc.__SEGGER_RTL_aPower2f from utilops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=24, align=4


__SEGGER_RTL_aPower2f: 0x3418D828: 00 DC.B 0x00 ; '\0' 0x3418D829: 00 DC.B 0x00 ; '\0' 0x3418D82A: 20 DC.B 0x20 ; ' ' 0x3418D82B: 41 DC.B 0x41 ; 'A' 0x3418D82C: 00 DC.B 0x00 ; '\0' 0x3418D82D: 00 DC.B 0x00 ; '\0' 0x3418D82E: C8 DC.B 0xC8 ; '\xC8' 0x3418D82F: 42 DC.B 0x42 ; 'B' 0x3418D830: 00 DC.B 0x00 ; '\0' 0x3418D831: 40 DC.B 0x40 ; '@' 0x3418D832: 1C DC.B 0x1C ; '\x1C' 0x3418D833: 46 DC.B 0x46 ; 'F' 0x3418D834: 20 DC.B 0x20 ; ' ' 0x3418D835: BC DC.B 0xBC ; '\xBC' 0x3418D836: BE DC.B 0xBE ; '\xBE' 0x3418D837: 4C DC.B 0x4C ; 'L' 0x3418D838: CA DC.B 0xCA ; '\xCA' 0x3418D839: 1B DC.B 0x1B ; '\x1B' 0x3418D83A: 0E DC.B 0x0E ; '\x0E' 0x3418D83B: 5A DC.B 0x5A ; 'Z' 0x3418D83C: AE DC.B 0xAE ; '\xAE' 0x3418D83D: C5 DC.B 0xC5 ; '\xC5' 0x3418D83E: 9D DC.B 0x9D ; '\x9D' 0x3418D83F: 74 DC.B 0x74 ; 't'

Section .text.libc.__aeabi_ul2f from floatasmops_arm.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=84, align=4


__aeabi_ul2f: 0x3418D840: B1C1 CBZ R1, .L1 ; 0x3418D874 0x3418D842: FAB1 F381 CLZ R3, R1 0x3418D846: F1D3 02BD RSBS R2, R3, #189 0x3418D84A: 4099 LSLS R1, R3 0x3418D84C: FA10 FC03 LSLS.W R12, R0, R3 0x3418D850: BF18 IT NE 0x3418D852: F041 0101 ORRNE R1, R1, #1 0x3418D856: F1D3 0320 RSBS R3, R3, #32 0x3418D85A: FA30 F303 LSRS.W R3, R0, R3 0x3418D85E: 4319 ORRS R1, R3 0x3418D860: 05D2 LSLS R2, R2, #23 0x3418D862: 064B LSLS R3, R1, #25 0x3418D864: EB42 2011 ADC.W R0, R2, R1, LSR #8 0x3418D868: BF38 IT CC 0x3418D86A: 4770 BXCC LR 0x3418D86C: BF08 IT EQ 0x3418D86E: F020 0001 BICEQ R0, R0, #1 0x3418D872: 4770 BX LR
.L1: 0x3418D874: B168 CBZ R0, .L2 ; 0x3418D892 0x3418D876: FAB0 F380 CLZ R3, R0 0x3418D87A: 4098 LSLS R0, R3 0x3418D87C: F1D3 029D RSBS R2, R3, #157 0x3418D880: 05D2 LSLS R2, R2, #23 0x3418D882: 0643 LSLS R3, R0, #25 0x3418D884: EB42 2010 ADC.W R0, R2, R0, LSR #8 0x3418D888: BF38 IT CC 0x3418D88A: 4770 BXCC LR 0x3418D88C: BF08 IT EQ 0x3418D88E: F020 0001 BICEQ R0, R0, #1
.L2: 0x3418D892: 4770 BX LR

Section .text.libc.memcpy from strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=92, align=4


memcpy: __aeabi_memcpy: 0x3418D894: B35A CBZ R2, .L9 ; 0x3418D8EE 0x3418D896: 4684 MOV R12, R0 0x3418D898: EA90 0301 EORS.W R3, R0, R1 0x3418D89C: 079B LSLS R3, R3, #30 0x3418D89E: D11F BNE 46L7 ; 0x3418D8E0
.L1: 0x3418D8A0: 0783 LSLS R3, R0, #30 0x3418D8A2: D007 BEQ 46L2 ; 0x3418D8B4 0x3418D8A4: F811 3B01 LDRB R3, [R1], #1 0x3418D8A8: F800 3B01 STRB R3, [R0], #1 0x3418D8AC: 1E52 SUBS R2, R2, #1 0x3418D8AE: D1F7 BNE 46L1 ; 0x3418D8A0 0x3418D8B0: E01C B 46L8 ; 0x3418D8EC
__aeabi_memcpy4: __aeabi_memcpy8: 0x3418D8B2: 4684 MOV R12, R0
.L2: 0x3418D8B4: 3A20 SUBS R2, #32 0x3418D8B6: D309 BCC 46L4 ; 0x3418D8CC 0x3418D8B8: E92D 07F0 PUSH.W 123R4-R10}
.L3: 0x3418D8BC: E8B1 07F8 LDM.W R1!, {R3-R10} 0x3418D8C0: E8A0 07F8 STM.W R0!, {R3-R10} 0x3418D8C4: 3A20 SUBS R2, #32 0x3418D8C6: D2F9 BCS 46L3 ; 0x3418D8BC 0x3418D8C8: E8BD 07F0 POP.W 123R4-R10}
.L4: 0x3418D8CC: 321C ADDS R2, #28 0x3418D8CE: D405 BMI 46L6 ; 0x3418D8DC
.L5: 0x3418D8D0: F851 3B04 LDR R3, [R1], #4 0x3418D8D4: F840 3B04 STR R3, [R0], #4 0x3418D8D8: 1F12 SUBS R2, R2, #4 0x3418D8DA: D2F9 BCS 46L5 ; 0x3418D8D0
.L6: 0x3418D8DC: 3204 ADDS R2, #4 0x3418D8DE: D005 BEQ 46L8 ; 0x3418D8EC
.L7: 0x3418D8E0: F811 3B01 LDRB R3, [R1], #1 0x3418D8E4: F800 3B01 STRB R3, [R0], #1 0x3418D8E8: 1E52 SUBS R2, R2, #1 0x3418D8EA: D1F9 BNE 46L7 ; 0x3418D8E0
.L8: 0x3418D8EC: 4660 MOV R0, R12
.L9: 0x3418D8EE: 4770 BX LR

Section .text.libc.__aeabi_memclr from strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=104, align=4


__aeabi_memclr: __aeabi_memclr8: __aeabi_memclr4: 0x3418D8F0: 2200 MOVS R2, #0
__aeabi_memset8: __aeabi_memset4: __aeabi_memset: 0x3418D8F2: 000B MOVS R3, R1 0x3418D8F4: 0011 MOVS R1, R2 0x3418D8F6: 001A MOVS R2, R3
memset: 0x3418D8F8: 4684 MOV R12, R0 0x3418D8FA: B35A CBZ R2, .L7 ; 0x3418D954
.L1: 0x3418D8FC: 0783 LSLS R3, R0, #30 0x3418D8FE: D004 BEQ 46L2 ; 0x3418D90A 0x3418D900: F800 1B01 STRB R1, [R0], #1 0x3418D904: 1E52 SUBS R2, R2, #1 0x3418D906: D1F9 BNE 46L1 ; 0x3418D8FC 0x3418D908: E024 B 46L7 ; 0x3418D954
.L2: 0x3418D90A: B2C9 UXTB R1, R1 0x3418D90C: EA41 2101 ORR.W R1, R1, R1, LSL #8 0x3418D910: EA41 4101 ORR.W R1, R1, R1, LSL #16 0x3418D914: 2A20 CMP R2, #32 0x3418D916: D311 BCC 46L4 ; 0x3418D93C 0x3418D918: 3A20 SUBS R2, #32 0x3418D91A: E92D 03F0 PUSH.W 123R4-R9} 0x3418D91E: 460B MOV R3, R1 0x3418D920: 460C MOV R4, R1 0x3418D922: 460D MOV R5, R1 0x3418D924: 460E MOV R6, R1 0x3418D926: 460F MOV R7, R1 0x3418D928: 4688 MOV R8, R1 0x3418D92A: 4689 MOV R9, R1
.L3: 0x3418D92C: E8A0 03FA STM.W R0!, {R1, R3-R9} 0x3418D930: 3A20 SUBS R2, #32 0x3418D932: D2FB BCS 46L3 ; 0x3418D92C 0x3418D934: E8BD 03F0 POP.W 123R4-R9} 0x3418D938: 3220 ADDS R2, #32 0x3418D93A: D00B BEQ 46L7 ; 0x3418D954
.L4: 0x3418D93C: 2A04 CMP R2, #4 0x3418D93E: D305 BCC 46L6 ; 0x3418D94C
.L5: 0x3418D940: F840 1B04 STR R1, [R0], #4 0x3418D944: 1F12 SUBS R2, R2, #4 0x3418D946: D005 BEQ 46L7 ; 0x3418D954 0x3418D948: 2A04 CMP R2, #4 0x3418D94A: D2F9 BCS 46L5 ; 0x3418D940
.L6: 0x3418D94C: F800 1B01 STRB R1, [R0], #1 0x3418D950: 1E52 SUBS R2, R2, #1 0x3418D952: D1FB BNE 46L6 ; 0x3418D94C
.L7: 0x3418D954: 4660 MOV R0, R12 0x3418D956: 4770 BX LR

Section .rodata.libc.__SEGGER_RTL_c_locale from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=12, align=4


__SEGGER_RTL_c_locale: 0x3418D958: 341942F2 DC.W 341942F2 ; R_ARM_ABS32 0x3418D95C: 3418D984 DC.W __SEGGER_RTL_c_locale_data 0x3418D960: 3418D964 DC.W __SEGGER_RTL_codeset_ascii

Section .rodata.libc.__SEGGER_RTL_codeset_ascii from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=32, align=4


__SEGGER_RTL_codeset_ascii: 0x3418D964: 34194097 DC.W __SEGGER_RTL_ascii_isctype 0x3418D968: 341940B7 DC.W __SEGGER_RTL_ascii_toupper 0x3418D96C: 341940C3 DC.W __SEGGER_RTL_ascii_tolower 0x3418D970: 341940CF DC.W __SEGGER_RTL_ascii_iswctype 0x3418D974: 341940EF DC.W __SEGGER_RTL_ascii_towupper 0x3418D978: 341940FB DC.W __SEGGER_RTL_ascii_towlower 0x3418D97C: 34193D31 DC.W __SEGGER_RTL_ascii_wctomb 0x3418D980: 34194067 DC.W __SEGGER_RTL_ascii_mbtowc

Section .rodata.libc.__SEGGER_RTL_c_locale_data from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=88, align=4


__SEGGER_RTL_c_locale_data: 0x3418D984: 341942F4 DC.W __SEGGER_RTL_data_utf8_period 0x3418D988: 34194406 DC.W __SEGGER_RTL_data_empty_string 0x3418D98C: 34194406 DC.W __SEGGER_RTL_data_empty_string 0x3418D990: 34194406 DC.W __SEGGER_RTL_data_empty_string 0x3418D994: 34194406 DC.W __SEGGER_RTL_data_empty_string 0x3418D998: 34194406 DC.W __SEGGER_RTL_data_empty_string 0x3418D99C: 34194406 DC.W __SEGGER_RTL_data_empty_string 0x3418D9A0: 34194406 DC.W __SEGGER_RTL_data_empty_string 0x3418D9A4: 34194406 DC.W __SEGGER_RTL_data_empty_string 0x3418D9A8: 34194406 DC.W __SEGGER_RTL_data_empty_string 0x3418D9AC: FF DC.B 0xFF ; '\xFF' 0x3418D9AD: FF DC.B 0xFF ; '\xFF' 0x3418D9AE: FF DC.B 0xFF ; '\xFF' 0x3418D9AF: FF DC.B 0xFF ; '\xFF' 0x3418D9B0: FF DC.B 0xFF ; '\xFF' 0x3418D9B1: FF DC.B 0xFF ; '\xFF' 0x3418D9B2: FF DC.B 0xFF ; '\xFF' 0x3418D9B3: FF DC.B 0xFF ; '\xFF' 0x3418D9B4: FF DC.B 0xFF ; '\xFF' 0x3418D9B5: FF DC.B 0xFF ; '\xFF' 0x3418D9B6: FF DC.B 0xFF ; '\xFF' 0x3418D9B7: FF DC.B 0xFF ; '\xFF' 0x3418D9B8: FF DC.B 0xFF ; '\xFF' 0x3418D9B9: FF DC.B 0xFF ; '\xFF' 0x3418D9BA: 00 DC.B 0x00 ; '\0' 0x3418D9BB: 00 DC.B 0x00 ; '\0' 0x3418D9BC: 341942B8 DC.W __SEGGER_RTL_c_locale_day_names 0x3418D9C0: 341943B8 DC.W __SEGGER_RTL_c_locale_abbrev_day_names 0x3418D9C4: 3419410D DC.W __SEGGER_RTL_c_locale_month_names 0x3418D9C8: 341943D5 DC.W __SEGGER_RTL_c_locale_abbrev_month_names 0x3418D9CC: 34194164 DC.W __SEGGER_RTL_c_locale_am_pm_indicator 0x3418D9D0: 341943A6 DC.W __SEGGER_RTL_c_locale_date_format 0x3418D9D4: 341943AF DC.W __SEGGER_RTL_c_locale_time_format 0x3418D9D8: 3419416B DC.W __SEGGER_RTL_c_locale_date_time_format

Section .text.MX_BSEC_Init from blto2_FSBL_lto.o, size=2, align=4


MX_BSEC_Init: 0x3418D9DC: 4770 BX LR

Section .rodata..L__const.sfdp_getfrequencevalue.freqMhz_table from blto2_FSBL_lto.o, size=26, align=2

  0x3418D9DE:  00           DC.B       0x00                     ; '\0'
  0x3418D9DF:  00           DC.B       0x00                     ; '\0'
  0x3418D9E0:  21           DC.B       0x21                     ; '!'
  0x3418D9E1:  00           DC.B       0x00                     ; '\0'
  0x3418D9E2:  32           DC.B       0x32                     ; '2'
  0x3418D9E3:  00           DC.B       0x00                     ; '\0'
  0x3418D9E4:  42           DC.B       0x42                     ; 'B'
  0x3418D9E5:  00           DC.B       0x00                     ; '\0'
  0x3418D9E6:  50           DC.B       0x50                     ; 'P'
  0x3418D9E7:  00           DC.B       0x00                     ; '\0'
  0x3418D9E8:  64           DC.B       0x64                     ; 'd'
  0x3418D9E9:  00           DC.B       0x00                     ; '\0'
  0x3418D9EA:  85           DC.B       0x85                     ; '\x85'
  0x3418D9EB:  00           DC.B       0x00                     ; '\0'
  0x3418D9EC:  A6           DC.B       0xA6                     ; '\xA6'
  0x3418D9ED:  00           DC.B       0x00                     ; '\0'
  0x3418D9EE:  C8           DC.B       0xC8                     ; '\xC8'
  0x3418D9EF:  00           DC.B       0x00                     ; '\0'
  0x3418D9F0:  FA           DC.B       0xFA                     ; '\xFA'
  0x3418D9F1:  00           DC.B       0x00                     ; '\0'
  0x3418D9F2:  0A           DC.B       0x0A                     ; '\n'
  0x3418D9F3:  01           DC.B       0x01                     ; '\x01'
  0x3418D9F4:  4D           DC.B       0x4D                     ; 'M'
  0x3418D9F5:  01           DC.B       0x01                     ; '\x01'
  0x3418D9F6:  90           DC.B       0x90                     ; '\x90'
  0x3418D9F7:  01           DC.B       0x01                     ; '\x01'

Section .text.MX_EXTMEM_MANAGER_Init from blto2_FSBL_lto.o, size=62, align=4


MX_EXTMEM_MANAGER_Init: 0x3418D9F8: B580 PUSH 123R7, LR} 0x3418D9FA: B082 SUB SP, SP, #8 0x3418D9FC: F240 0000 MOVW R0, #0 ; 0x34000000 = extmem_list_config 0x3418DA00: F2C3 4000 MOVT R0, #0x3400 ; 0x34000000 = extmem_list_config 0x3418DA04: 9000 STR R0, [SP, #0] 0x3418DA06: 21AC MOVS R1, #172 0x3418DA08: F7FF FF72 BL __aeabi_memclr ; 0x3418D8F0 0x3418DA0C: 9A00 LDR R2, [SP, #0] 0x3418DA0E: 2000 MOVS R0, #0 0x3418DA10: 9001 STR R0, [SP, #4] 0x3418DA12: 7010 STRB R0, [R2] 0x3418DA14: F240 213C MOVW R1, #0x023C ; 0x3400023C = hxspi2 0x3418DA18: F2C3 4100 MOVT R1, #0x3400 ; 0x3400023C = hxspi2 0x3418DA1C: 6051 STR R1, [R2, #4] 0x3418DA1E: 2103 MOVS R1, #3 0x3418DA20: 7211 STRB R1, [R2, #8] 0x3418DA22: F44F 0100 MOV.W R1, #0x800000 0x3418DA26: F002 FCF1 BL HAL_RCCEx_GetPeriphCLKFreq ; 0x3419040C 0x3418DA2A: 4601 MOV R1, R0 0x3418DA2C: 9801 LDR R0, [SP, #4] 0x3418DA2E: F005 FF4D BL EXTMEM_Init ; 0x341938CC 0x3418DA32: B002 ADD SP, SP, #8 0x3418DA34: BD80 POP 123R7, PC}

Section .init.PVD_PVM_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


PVD_PVM_IRQHandler: 0x3418DA36: E7FE B PVD_PVM_IRQHandler ; 0x3418DA36

Section .text.MX_GPIO_Init from blto2_FSBL_lto.o, size=134, align=4


MX_GPIO_Init: 0x3418DA38: B580 PUSH 123R7, LR} 0x3418DA3A: B08C SUB SP, SP, #48 0x3418DA3C: 2000 MOVS R0, #0 0x3418DA3E: 9004 STR R0, [SP, #16] 0x3418DA40: 900B STR R0, [SP, #44] 0x3418DA42: 900A STR R0, [SP, #40] 0x3418DA44: 9009 STR R0, [SP, #36] 0x3418DA46: 9008 STR R0, [SP, #32] 0x3418DA48: 9007 STR R0, [SP, #28] 0x3418DA4A: F44F 5000 MOV.W R0, #0x2000 0x3418DA4E: F000 F837 BL LL_AHB4_GRP1_EnableClock ; 0x3418DAC0 0x3418DA52: 2002 MOVS R0, #2 0x3418DA54: F000 F834 BL LL_AHB4_GRP1_EnableClock ; 0x3418DAC0 0x3418DA58: 2040 MOVS R0, #64 0x3418DA5A: F000 F831 BL LL_AHB4_GRP1_EnableClock ; 0x3418DAC0 0x3418DA5E: 2001 MOVS R0, #1 0x3418DA60: 9003 STR R0, [SP, #12] 0x3418DA62: F000 F82D BL LL_AHB4_GRP1_EnableClock ; 0x3418DAC0 0x3418DA66: 9A03 LDR R2, [SP, #12] 0x3418DA68: F240 4000 MOVW R0, #0x0400 0x3418DA6C: F2C5 6002 MOVT R0, #0x5602 0x3418DA70: 9002 STR R0, [SP, #8] 0x3418DA72: F44F 5180 MOV.W R1, #0x1000 0x3418DA76: 9101 STR R1, [SP, #4] 0x3418DA78: F000 FCA2 BL HAL_GPIO_WritePin ; 0x3418E3C0 0x3418DA7C: 9903 LDR R1, [SP, #12] 0x3418DA7E: 9A04 LDR R2, [SP, #16] 0x3418DA80: F641 0000 MOVW R0, #0x1800 0x3418DA84: F2C5 6002 MOVT R0, #0x5602 0x3418DA88: 9005 STR R0, [SP, #20] 0x3418DA8A: F000 FC99 BL HAL_GPIO_WritePin ; 0x3418E3C0 0x3418DA8E: 9B01 LDR R3, [SP, #4] 0x3418DA90: 9802 LDR R0, [SP, #8] 0x3418DA92: 9A03 LDR R2, [SP, #12] 0x3418DA94: 9904 LDR R1, [SP, #16] 0x3418DA96: 9307 STR R3, [SP, #28] 0x3418DA98: 9208 STR R2, [SP, #32] 0x3418DA9A: 9109 STR R1, [SP, #36] 0x3418DA9C: 910A STR R1, [SP, #40] 0x3418DA9E: A907 ADD R1, SP, #28 0x3418DAA0: 9106 STR R1, [SP, #24] 0x3418DAA2: F7F4 F919 BL HAL_GPIO_Init ; 0x34181CD8 0x3418DAA6: 9B03 LDR R3, [SP, #12] 0x3418DAA8: 9A04 LDR R2, [SP, #16] 0x3418DAAA: 9805 LDR R0, [SP, #20] 0x3418DAAC: 9906 LDR R1, [SP, #24] 0x3418DAAE: 9307 STR R3, [SP, #28] 0x3418DAB0: 9308 STR R3, [SP, #32] 0x3418DAB2: 9209 STR R2, [SP, #36] 0x3418DAB4: 920A STR R2, [SP, #40] 0x3418DAB6: F7F4 F90F BL HAL_GPIO_Init ; 0x34181CD8 0x3418DABA: B00C ADD SP, SP, #48 0x3418DABC: BD80 POP 123R7, PC}

Section .init.DTS_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


DTS_IRQHandler: 0x3418DABE: E7FE B DTS_IRQHandler ; 0x3418DABE

Section .text.LL_AHB4_GRP1_EnableClock from blto2_FSBL_lto.o, size=34, align=4


LL_AHB4_GRP1_EnableClock: 0x3418DAC0: B082 SUB SP, SP, #8 0x3418DAC2: 9001 STR R0, [SP, #4] 0x3418DAC4: 9801 LDR R0, [SP, #4] 0x3418DAC6: F648 215C MOVW R1, #0x8A5C 0x3418DACA: F2C5 6102 MOVT R1, #0x5602 0x3418DACE: 6008 STR R0, [R1] 0x3418DAD0: F248 205C MOVW R0, #0x825C 0x3418DAD4: F2C5 6002 MOVT R0, #0x5602 0x3418DAD8: 6800 LDR R0, [R0] 0x3418DADA: 9000 STR R0, [SP, #0] 0x3418DADC: 9800 LDR R0, [SP, #0] 0x3418DADE: B002 ADD SP, SP, #8 0x3418DAE0: 4770 BX LR

Section .init.RCC_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


RCC_IRQHandler: 0x3418DAE2: E7FE B RCC_IRQHandler ; 0x3418DAE2

Section .text.SystemClock_Config from blto2_FSBL_lto.o, size=254, align=4


SystemClock_Config: 0x3418DAE4: B580 PUSH 123R7, LR} 0x3418DAE6: B0B6 SUB SP, SP, #216 0x3418DAE8: A810 ADD R0, SP, #64 0x3418DAEA: 2198 MOVS R1, #152 0x3418DAEC: F7FF FF00 BL __aeabi_memclr ; 0x3418D8F0 0x3418DAF0: 4668 MOV R0, SP 0x3418DAF2: 2140 MOVS R1, #64 0x3418DAF4: F7FF FEFC BL __aeabi_memclr ; 0x3418D8F0 0x3418DAF8: 2000 MOVS R0, #0 0x3418DAFA: F000 FC95 BL HAL_PWREx_ConfigSupply ; 0x3418E428 0x3418DAFE: B108 CBZ R0, .L1 ; 0x3418DB04 0x3418DB00: F7F2 FE24 BL Error_Handler ; 0x3418074C
.L1: 0x3418DB04: 2001 MOVS R0, #1 0x3418DB06: F000 FCC9 BL HAL_PWREx_ControlVoltageScaling ; 0x3418E49C 0x3418DB0A: B108 CBZ R0, .L2 ; 0x3418DB10 0x3418DB0C: F7F2 FE1E BL Error_Handler ; 0x3418074C
.L2: 0x3418DB10: 2002 MOVS R0, #2 0x3418DB12: 9010 STR R0, [SP, #64] 0x3418DB14: 2008 MOVS R0, #8 0x3418DB16: 9013 STR R0, [SP, #76] 0x3418DB18: 2000 MOVS R0, #0 0x3418DB1A: 9014 STR R0, [SP, #80] 0x3418DB1C: 9015 STR R0, [SP, #84] 0x3418DB1E: 901A STR R0, [SP, #104] 0x3418DB20: 9021 STR R0, [SP, #132] 0x3418DB22: 9028 STR R0, [SP, #160] 0x3418DB24: 902F STR R0, [SP, #188] 0x3418DB26: A810 ADD R0, SP, #64 0x3418DB28: F000 FD76 BL HAL_RCC_OscConfig ; 0x3418E618 0x3418DB2C: B108 CBZ R0, .L3 ; 0x3418DB32 0x3418DB2E: F7F2 FE0D BL Error_Handler ; 0x3418074C
.L3: 0x3418DB32: 4668 MOV R0, SP 0x3418DB34: F7F4 FE0E BL HAL_RCC_GetClockConfig ; 0x34182754 0x3418DB38: 9801 LDR R0, [SP, #4] 0x3418DB3A: F5B0 3F40 CMP.W R0, #0x030000 0x3418DB3E: D003 BEQ 46L4 ; 0x3418DB48 0x3418DB40: 9802 LDR R0, [SP, #8] 0x3418DB42: F1B0 7F40 CMP.W R0, #0x03000000 0x3418DB46: D10A BNE 46L5 ; 0x3418DB5E
.L4: 0x3418DB48: 2003 MOVS R0, #3 0x3418DB4A: 9000 STR R0, [SP, #0] 0x3418DB4C: 2000 MOVS R0, #0 0x3418DB4E: 9001 STR R0, [SP, #4] 0x3418DB50: 9002 STR R0, [SP, #8] 0x3418DB52: 4668 MOV R0, SP 0x3418DB54: F001 FD6C BL HAL_RCC_ClockConfig ; 0x3418F630 0x3418DB58: B108 CBZ R0, .L5 ; 0x3418DB5E 0x3418DB5A: F7F2 FDF7 BL Error_Handler ; 0x3418074C
.L5: 0x3418DB5E: 2100 MOVS R1, #0 0x3418DB60: 9110 STR R1, [SP, #64] 0x3418DB62: 2202 MOVS R2, #2 0x3418DB64: 921A STR R2, [SP, #104] 0x3418DB66: 911B STR R1, [SP, #108] 0x3418DB68: 2001 MOVS R0, #1 0x3418DB6A: 901C STR R0, [SP, #112] 0x3418DB6C: 2319 MOVS R3, #25 0x3418DB6E: 931E STR R3, [SP, #120] 0x3418DB70: 911D STR R1, [SP, #116] 0x3418DB72: 901F STR R0, [SP, #124] 0x3418DB74: 9020 STR R0, [SP, #128] 0x3418DB76: 9121 STR R1, [SP, #132] 0x3418DB78: 9128 STR R1, [SP, #160] 0x3418DB7A: 922F STR R2, [SP, #188] 0x3418DB7C: 9130 STR R1, [SP, #192] 0x3418DB7E: 2208 MOVS R2, #8 0x3418DB80: 9231 STR R2, [SP, #196] 0x3418DB82: 227D MOVS R2, #125 0x3418DB84: 9233 STR R2, [SP, #204] 0x3418DB86: 9132 STR R1, [SP, #200] 0x3418DB88: 9034 STR R0, [SP, #208] 0x3418DB8A: 9035 STR R0, [SP, #212] 0x3418DB8C: A810 ADD R0, SP, #64 0x3418DB8E: F000 FD43 BL HAL_RCC_OscConfig ; 0x3418E618 0x3418DB92: B108 CBZ R0, .L6 ; 0x3418DB98 0x3418DB94: F7F2 FDDA BL Error_Handler ; 0x3418074C
.L6: 0x3418DB98: 207F MOVS R0, #127 0x3418DB9A: 9000 STR R0, [SP, #0] 0x3418DB9C: F44F 3040 MOV.W R0, #0x030000 0x3418DBA0: 9001 STR R0, [SP, #4] 0x3418DBA2: F04F 7040 MOV.W R0, #0x03000000 0x3418DBA6: 9002 STR R0, [SP, #8] 0x3418DBA8: F44F 1080 MOV.W R0, #0x100000 0x3418DBAC: 9003 STR R0, [SP, #12] 0x3418DBAE: 2100 MOVS R1, #0 0x3418DBB0: 9104 STR R1, [SP, #16] 0x3418DBB2: 9105 STR R1, [SP, #20] 0x3418DBB4: 9106 STR R1, [SP, #24] 0x3418DBB6: 9107 STR R1, [SP, #28] 0x3418DBB8: 9108 STR R1, [SP, #32] 0x3418DBBA: 2002 MOVS R0, #2 0x3418DBBC: 9009 STR R0, [SP, #36] 0x3418DBBE: 910A STR R1, [SP, #40] 0x3418DBC0: 2004 MOVS R0, #4 0x3418DBC2: 900B STR R0, [SP, #44] 0x3418DBC4: F04F 5240 MOV.W R2, #0x30000000 0x3418DBC8: 920C STR R2, [SP, #48] 0x3418DBCA: 2201 MOVS R2, #1 0x3418DBCC: 920D STR R2, [SP, #52] 0x3418DBCE: 910E STR R1, [SP, #56] 0x3418DBD0: 900F STR R0, [SP, #60] 0x3418DBD2: 4668 MOV R0, SP 0x3418DBD4: F001 FD2C BL HAL_RCC_ClockConfig ; 0x3418F630 0x3418DBD8: B108 CBZ R0, .L7 ; 0x3418DBDE 0x3418DBDA: F7F2 FDB7 BL Error_Handler ; 0x3418074C
.L7: 0x3418DBDE: B036 ADD SP, SP, #216 0x3418DBE0: BD80 POP 123R7, PC}

Section .init.LOCKUP_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


LOCKUP_IRQHandler: 0x3418DBE2: E7FE B LOCKUP_IRQHandler ; 0x3418DBE2

Section .text.OTP_Config from blto2_FSBL_lto.o, size=142, align=4


OTP_Config: 0x3418DBE4: B580 PUSH 123R7, LR} 0x3418DBE6: B086 SUB SP, SP, #24 0x3418DBE8: 2000 MOVS R0, #0 0x3418DBEA: 9000 STR R0, [SP, #0] 0x3418DBEC: 2001 MOVS R0, #1 0x3418DBEE: F000 F841 BL LL_APB4_GRP2_EnableClock ; 0x3418DC74 0x3418DBF2: 2002 MOVS R0, #2 0x3418DBF4: F000 F83E BL LL_APB4_GRP2_EnableClock ; 0x3418DC74 0x3418DBF8: F249 0000 MOVW R0, #0x9000 0x3418DBFC: F2C5 6000 MOVT R0, #0x5600 0x3418DC00: 9001 STR R0, [SP, #4] 0x3418DC02: 207C MOVS R0, #124 0x3418DC04: 9005 STR R0, [SP, #20] 0x3418DC06: 9905 LDR R1, [SP, #20] 0x3418DC08: A801 ADD R0, SP, #4 0x3418DC0A: AA03 ADD R2, SP, #12 0x3418DC0C: F7F3 FEF8 BL HAL_BSEC_OTP_Read ; 0x34181A00 0x3418DC10: BB48 CBNZ R0, .L6 ; 0x3418DC66 0x3418DC12: F44F 4000 MOV.W R0, #0x8000 0x3418DC16: 9004 STR R0, [SP, #16] 0x3418DC18: 9803 LDR R0, [SP, #12] 0x3418DC1A: 43C0 MVNS R0, R0 0x3418DC1C: 9904 LDR R1, [SP, #16] 0x3418DC1E: 4208 TST R0, R1 0x3418DC20: D020 BEQ 46L5 ; 0x3418DC64 0x3418DC22: 9904 LDR R1, [SP, #16] 0x3418DC24: 9803 LDR R0, [SP, #12] 0x3418DC26: 4308 ORRS R0, R1 0x3418DC28: 9003 STR R0, [SP, #12] 0x3418DC2A: 9905 LDR R1, [SP, #20] 0x3418DC2C: 9A03 LDR R2, [SP, #12] 0x3418DC2E: A801 ADD R0, SP, #4 0x3418DC30: 2300 MOVS R3, #0 0x3418DC32: F000 FAB1 BL HAL_BSEC_OTP_Program ; 0x3418E198 0x3418DC36: B990 CBNZ R0, .L4 ; 0x3418DC5E 0x3418DC38: 9905 LDR R1, [SP, #20] 0x3418DC3A: A801 ADD R0, SP, #4 0x3418DC3C: AA03 ADD R2, SP, #12 0x3418DC3E: F7F3 FEDF BL HAL_BSEC_OTP_Read ; 0x34181A00 0x3418DC42: B940 CBNZ R0, .L2 ; 0x3418DC56 0x3418DC44: 9803 LDR R0, [SP, #12] 0x3418DC46: 43C0 MVNS R0, R0 0x3418DC48: 9904 LDR R1, [SP, #16] 0x3418DC4A: 4208 TST R0, R1 0x3418DC4C: D002 BEQ 46L1 ; 0x3418DC54 0x3418DC4E: F04F 30FF MOV.W R0, #0xFFFFFFFF 0x3418DC52: 9000 STR R0, [SP, #0]
.L1: 0x3418DC54: E002 B 46L3 ; 0x3418DC5C
.L2: 0x3418DC56: F06F 0001 MVN R0, #1 0x3418DC5A: 9000 STR R0, [SP, #0]
.L3: 0x3418DC5C: E002 B 46L5 ; 0x3418DC64
.L4: 0x3418DC5E: F06F 0002 MVN R0, #2 0x3418DC62: 9000 STR R0, [SP, #0]
.L5: 0x3418DC64: E002 B 46L7 ; 0x3418DC6C
.L6: 0x3418DC66: F06F 0003 MVN R0, #3 0x3418DC6A: 9000 STR R0, [SP, #0]
.L7: 0x3418DC6C: 9800 LDR R0, [SP, #0] 0x3418DC6E: B006 ADD SP, SP, #24 0x3418DC70: BD80 POP 123R7, PC}

Section .init.CACHE_ECC_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


CACHE_ECC_IRQHandler: 0x3418DC72: E7FE B CACHE_ECC_IRQHandler ; 0x3418DC72

Section .text.LL_APB4_GRP2_EnableClock from blto2_FSBL_lto.o, size=34, align=4


LL_APB4_GRP2_EnableClock: 0x3418DC74: B082 SUB SP, SP, #8 0x3418DC76: 9001 STR R0, [SP, #4] 0x3418DC78: 9801 LDR R0, [SP, #4] 0x3418DC7A: F648 2178 MOVW R1, #0x8A78 0x3418DC7E: F2C5 6102 MOVT R1, #0x5602 0x3418DC82: 6008 STR R0, [R1] 0x3418DC84: F248 2078 MOVW R0, #0x8278 0x3418DC88: F2C5 6002 MOVT R0, #0x5602 0x3418DC8C: 6800 LDR R0, [R0] 0x3418DC8E: 9000 STR R0, [SP, #0] 0x3418DC90: 9800 LDR R0, [SP, #0] 0x3418DC92: B002 ADD SP, SP, #8 0x3418DC94: 4770 BX LR

Section .init.TCM_ECC_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TCM_ECC_IRQHandler: 0x3418DC96: E7FE B TCM_ECC_IRQHandler ; 0x3418DC96

Section .text.assert_failed from blto2_FSBL_lto.o, size=10, align=4


assert_failed: 0x3418DC98: B082 SUB SP, SP, #8 0x3418DC9A: 9001 STR R0, [SP, #4] 0x3418DC9C: 9100 STR R1, [SP, #0] 0x3418DC9E: B002 ADD SP, SP, #8 0x3418DCA0: 4770 BX LR

Section .init.BCK_ECC_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


BCK_ECC_IRQHandler: 0x3418DCA2: E7FE B BCK_ECC_IRQHandler ; 0x3418DCA2

Section .text.NMI_Handler from blto2_FSBL_lto.o, size=2, align=4


NMI_Handler: 0x3418DCA4: E7FE B NMI_Handler ; 0x3418DCA4

Section .init.FPU_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


FPU_IRQHandler: 0x3418DCA6: E7FE B FPU_IRQHandler ; 0x3418DCA6

Section .text.HardFault_Handler from blto2_FSBL_lto.o, size=2, align=4


HardFault_Handler: 0x3418DCA8: E7FE B HardFault_Handler ; 0x3418DCA8

Section .init.RTC_S_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


RTC_S_IRQHandler: 0x3418DCAA: E7FE B RTC_S_IRQHandler ; 0x3418DCAA

Section .text.MemManage_Handler from blto2_FSBL_lto.o, size=2, align=4


MemManage_Handler: 0x3418DCAC: E7FE B MemManage_Handler ; 0x3418DCAC

Section .init.TAMP_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TAMP_IRQHandler: 0x3418DCAE: E7FE B TAMP_IRQHandler ; 0x3418DCAE

Section .text.BusFault_Handler from blto2_FSBL_lto.o, size=2, align=4


BusFault_Handler: 0x3418DCB0: E7FE B BusFault_Handler ; 0x3418DCB0

Section .init.RIFSC_TAMPER_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


RIFSC_TAMPER_IRQHandler: 0x3418DCB2: E7FE B RIFSC_TAMPER_IRQHandler ; 0x3418DCB2

Section .text.UsageFault_Handler from blto2_FSBL_lto.o, size=2, align=4


UsageFault_Handler: 0x3418DCB4: E7FE B UsageFault_Handler ; 0x3418DCB4

Section .init.IAC_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


IAC_IRQHandler: 0x3418DCB6: E7FE B IAC_IRQHandler ; 0x3418DCB6

Section .text.SVC_Handler from blto2_FSBL_lto.o, size=2, align=4


SVC_Handler: 0x3418DCB8: 4770 BX LR

Section .init.RCC_S_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


RCC_S_IRQHandler: 0x3418DCBA: E7FE B RCC_S_IRQHandler ; 0x3418DCBA

Section .text.DebugMon_Handler from blto2_FSBL_lto.o, size=2, align=4


DebugMon_Handler: 0x3418DCBC: 4770 BX LR

Section .init.RTC_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


RTC_IRQHandler: 0x3418DCBE: E7FE B RTC_IRQHandler ; 0x3418DCBE

Section .text.PendSV_Handler from blto2_FSBL_lto.o, size=2, align=4


PendSV_Handler: 0x3418DCC0: 4770 BX LR

Section .init.IWDG_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


IWDG_IRQHandler: 0x3418DCC2: E7FE B IWDG_IRQHandler ; 0x3418DCC2

Section .text.SystemInit from blto2_FSBL_lto.o, size=510, align=4


SystemInit: 0x3418DCC4: B510 PUSH 123R4, LR} 0x3418DCC6: F240 4000 MOVW R0, #0x0400 ; 0x34180400 = g_pfnVectors 0x3418DCCA: F2C3 4018 MOVT R0, #0x3418 ; 0x34180400 = g_pfnVectors 0x3418DCCE: F64E 5108 MOVW R1, #0xED08 0x3418DCD2: F2CE 0100 MOVT R1, #0xE000 0x3418DCD6: 6008 STR R0, [R1] 0x3418DCD8: F648 2218 MOVW R2, #0x8A18 0x3418DCDC: F2C5 6202 MOVT R2, #0x5602 0x3418DCE0: 2001 MOVS R0, #1 0x3418DCE2: 6010 STR R0, [R2] 0x3418DCE4: F249 2218 MOVW R2, #0x9218 0x3418DCE8: F2C5 6202 MOVT R2, #0x5602 0x3418DCEC: 6010 STR R0, [R2] 0x3418DCEE: F249 2258 MOVW R2, #0x9258 0x3418DCF2: F2C5 6202 MOVT R2, #0x5602 0x3418DCF6: 6010 STR R0, [R2] 0x3418DCF8: F64E 54D8 MOVW R4, #0xEDD8 0x3418DCFC: F2CE 0400 MOVT R4, #0xE000 0x3418DD00: 2200 MOVS R2, #0 0x3418DD02: 6022 STR R2, [R4] 0x3418DD04: F64E 5CDC MOVW R12, #0xEDDC 0x3418DD08: F2CE 0C00 MOVT R12, #0xE000 0x3418DD0C: F8CC 2000 STR.W R2, [R12] 0x3418DD10: F64E 53E0 MOVW R3, #0xEDE0 0x3418DD14: F2CE 0300 MOVT R3, #0xE000 0x3418DD18: 601A STR R2, [R3] 0x3418DD1A: 6020 STR R0, [R4] 0x3418DD1C: F8CC 2000 STR.W R2, [R12] 0x3418DD20: 601A STR R2, [R3] 0x3418DD22: F04F 0E02 MOV.W LR, #2 0x3418DD26: F8C4 E000 STR.W LR, [R4] 0x3418DD2A: F8CC 2000 STR.W R2, [R12] 0x3418DD2E: 601A STR R2, [R3] 0x3418DD30: F04F 0E03 MOV.W LR, #3 0x3418DD34: F8C4 E000 STR.W LR, [R4] 0x3418DD38: F8CC 2000 STR.W R2, [R12] 0x3418DD3C: 601A STR R2, [R3] 0x3418DD3E: F04F 0E04 MOV.W LR, #4 0x3418DD42: F8C4 E000 STR.W LR, [R4] 0x3418DD46: F8CC 2000 STR.W R2, [R12] 0x3418DD4A: 601A STR R2, [R3] 0x3418DD4C: F04F 0E05 MOV.W LR, #5 0x3418DD50: F8C4 E000 STR.W LR, [R4] 0x3418DD54: F8CC 2000 STR.W R2, [R12] 0x3418DD58: 601A STR R2, [R3] 0x3418DD5A: F04F 0E06 MOV.W LR, #6 0x3418DD5E: F8C4 E000 STR.W LR, [R4] 0x3418DD62: F8CC 2000 STR.W R2, [R12] 0x3418DD66: 601A STR R2, [R3] 0x3418DD68: F04F 0E07 MOV.W LR, #7 0x3418DD6C: F8C4 E000 STR.W LR, [R4] 0x3418DD70: F8CC 2000 STR.W R2, [R12] 0x3418DD74: 601A STR R2, [R3] 0x3418DD76: F648 2278 MOVW R2, #0x8A78 0x3418DD7A: F2C5 6202 MOVT R2, #0x5602 0x3418DD7E: 6010 STR R0, [R2] 0x3418DD80: F248 2378 MOVW R3, #0x8278 0x3418DD84: F2C5 6302 MOVT R3, #0x5602 0x3418DD88: 681A LDR R2, [R3] 0x3418DD8A: 680A LDR R2, [R1] 0x3418DD8C: F248 0110 MOVW R1, #0x8010 0x3418DD90: F2C5 6100 MOVT R1, #0x5600 0x3418DD94: 600A STR R2, [R1] 0x3418DD96: F644 0C34 MOVW R12, #0x4834 0x3418DD9A: F2C5 6C02 MOVT R12, #0x5602 0x3418DD9E: F8DC 2000 LDR.W R2, [R12] 0x3418DDA2: F442 7280 ORR R2, R2, #0x0100 0x3418DDA6: F8CC 2000 STR.W R2, [R12] 0x3418DDAA: F644 0C38 MOVW R12, #0x4838 0x3418DDAE: F2C5 6C02 MOVT R12, #0x5602 0x3418DDB2: F8DC 2000 LDR.W R2, [R12] 0x3418DDB6: F442 7280 ORR R2, R2, #0x0100 0x3418DDBA: F8CC 2000 STR.W R2, [R12] 0x3418DDBE: F644 023C MOVW R2, #0x483C 0x3418DDC2: F2C5 6202 MOVT R2, #0x5602 0x3418DDC6: F8D2 C000 LDR.W R12, [R2] 0x3418DDCA: F44C 7C40 ORR R12, R12, #0x0300 0x3418DDCE: F8C2 C000 STR.W R12, [R2] 0x3418DDD2: F248 0E54 MOVW LR, #0x8054 0x3418DDD6: F2C5 6E00 MOVT LR, #0x5600 0x3418DDDA: F240 2C87 MOVW R12, #0x0287 0x3418DDDE: F8CE C000 STR.W R12, [LR] 0x3418DDE2: F248 0E5C MOVW LR, #0x805C 0x3418DDE6: F2C5 6E00 MOVT LR, #0x5600 0x3418DDEA: F8CE C000 STR.W R12, [LR] 0x3418DDEE: F248 0E44 MOVW LR, #0x8044 0x3418DDF2: F2C5 6E00 MOVT LR, #0x5600 0x3418DDF6: F8CE C000 STR.W R12, [LR] 0x3418DDFA: F248 0E4C MOVW LR, #0x804C 0x3418DDFE: F2C5 6E00 MOVT LR, #0x5600 0x3418DE02: F8CE C000 STR.W R12, [LR] 0x3418DE06: F248 0E64 MOVW LR, #0x8064 0x3418DE0A: F2C5 6E00 MOVT LR, #0x5600 0x3418DE0E: F8CE C000 STR.W R12, [LR] 0x3418DE12: F8D2 C000 LDR.W R12, [R2] 0x3418DE16: F44C 5C80 ORR R12, R12, #0x1000 0x3418DE1A: F8C2 C000 STR.W R12, [R2] 0x3418DE1E: F8D2 C000 LDR.W R12, [R2] 0x3418DE22: F04C 0C10 ORR R12, R12, #16 0x3418DE26: F8C2 C000 STR.W R12, [R2] 0x3418DE2A: 6812 LDR R2, [R2] 0x3418DE2C: F248 2C74 MOVW R12, #0x8274 0x3418DE30: F2C5 6C02 MOVT R12, #0x5602 0x3418DE34: F8DC 2000 LDR.W R2, [R12] 0x3418DE38: F442 4200 ORR R2, R2, #0x8000 0x3418DE3C: F8CC 2000 STR.W R2, [R12] 0x3418DE40: 681A LDR R2, [R3] 0x3418DE42: F042 0210 ORR R2, R2, #16 0x3418DE46: 601A STR R2, [R3] 0x3418DE48: 681A LDR R2, [R3] 0x3418DE4A: 681A LDR R2, [R3] 0x3418DE4C: F022 0210 BIC R2, R2, #16 0x3418DE50: 601A STR R2, [R3] 0x3418DE52: F648 2320 MOVW R3, #0x8A20 0x3418DE56: F2C5 6302 MOVT R3, #0x5602 0x3418DE5A: F44F 5240 MOV.W R2, #0x3000 0x3418DE5E: 601A STR R2, [R3] 0x3418DE60: F249 2320 MOVW R3, #0x9220 0x3418DE64: F2C5 6302 MOVT R3, #0x5602 0x3418DE68: 601A STR R2, [R3] 0x3418DE6A: F648 2224 MOVW R2, #0x8A24 0x3418DE6E: F2C5 6202 MOVT R2, #0x5602 0x3418DE72: 6010 STR R0, [R2] 0x3418DE74: F249 2224 MOVW R2, #0x9224 0x3418DE78: F2C5 6202 MOVT R2, #0x5602 0x3418DE7C: 6010 STR R0, [R2] 0x3418DE7E: F249 2264 MOVW R2, #0x9264 0x3418DE82: F2C5 6202 MOVT R2, #0x5602 0x3418DE86: 6010 STR R0, [R2] 0x3418DE88: F249 235C MOVW R3, #0x925C 0x3418DE8C: F2C5 6302 MOVT R3, #0x5602 0x3418DE90: 2240 MOVS R2, #64 0x3418DE92: 601A STR R2, [R3] 0x3418DE94: 6809 LDR R1, [R1] 0x3418DE96: F249 2178 MOVW R1, #0x9278 0x3418DE9A: F2C5 6102 MOVT R1, #0x5602 0x3418DE9E: 6008 STR R0, [R1] 0x3418DEA0: F64E 5188 MOVW R1, #0xED88 0x3418DEA4: F2CE 0100 MOVT R1, #0xE000 0x3418DEA8: 6808 LDR R0, [R1] 0x3418DEAA: F440 0070 ORR R0, R0, #0xF00000 0x3418DEAE: 6008 STR R0, [R1] 0x3418DEB0: F64E 5188 MOVW R1, #0xED88 0x3418DEB4: F2CE 0102 MOVT R1, #0xE002 0x3418DEB8: 6808 LDR R0, [R1] 0x3418DEBA: F440 0070 ORR R0, R0, #0xF00000 0x3418DEBE: 6008 STR R0, [R1] 0x3418DEC0: BD10 POP 123R4, PC}

Section .init.WWDG_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


WWDG_IRQHandler: 0x3418DEC2: E7FE B WWDG_IRQHandler ; 0x3418DEC2

Section .text.MX_XSPI2_Init from blto2_FSBL_lto.o, size=126, align=4


MX_XSPI2_Init: 0x3418DEC4: B580 PUSH 123R7, LR} 0x3418DEC6: B086 SUB SP, SP, #24 0x3418DEC8: 2100 MOVS R1, #0 0x3418DECA: 9101 STR R1, [SP, #4] 0x3418DECC: 9105 STR R1, [SP, #20] 0x3418DECE: 9104 STR R1, [SP, #16] 0x3418DED0: 9103 STR R1, [SP, #12] 0x3418DED2: F240 203C MOVW R0, #0x023C ; 0x3400023C = hxspi2 0x3418DED6: F2C3 4000 MOVT R0, #0x3400 ; 0x3400023C = hxspi2 0x3418DEDA: 9002 STR R0, [SP, #8] 0x3418DEDC: F24A 0200 MOVW R2, #0xA000 0x3418DEE0: F6C5 0202 MOVT R2, #0x5802 0x3418DEE4: 6002 STR R2, [R0] 0x3418DEE6: 2204 MOVS R2, #4 0x3418DEE8: 6042 STR R2, [R0, #4] 0x3418DEEA: 6081 STR R1, [R0, #8] 0x3418DEEC: F04F 7280 MOV.W R2, #0x01000000 0x3418DEF0: 60C2 STR R2, [R0, #12] 0x3418DEF2: 2219 MOVS R2, #25 0x3418DEF4: 6102 STR R2, [R0, #16] 0x3418DEF6: 2202 MOVS R2, #2 0x3418DEF8: 6142 STR R2, [R0, #20] 0x3418DEFA: 6181 STR R1, [R0, #24] 0x3418DEFC: 61C1 STR R1, [R0, #28] 0x3418DEFE: 6201 STR R1, [R0, #32] 0x3418DF00: 6241 STR R1, [R0, #36] 0x3418DF02: 6281 STR R1, [R0, #40] 0x3418DF04: F04F 5280 MOV.W R2, #0x10000000 0x3418DF08: 62C2 STR R2, [R0, #44] 0x3418DF0A: 6301 STR R1, [R0, #48] 0x3418DF0C: 6341 STR R1, [R0, #52] 0x3418DF0E: 6381 STR R1, [R0, #56] 0x3418DF10: 63C1 STR R1, [R0, #60] 0x3418DF12: F7FD F8EB BL HAL_XSPI_Init ; 0x3418B0EC 0x3418DF16: B108 CBZ R0, .L1 ; 0x3418DF1C 0x3418DF18: F7F2 FC18 BL Error_Handler ; 0x3418074C
.L1: 0x3418DF1C: 2010 MOVS R0, #16 0x3418DF1E: 9003 STR R0, [SP, #12] 0x3418DF20: 2001 MOVS R0, #1 0x3418DF22: 9004 STR R0, [SP, #16] 0x3418DF24: 9005 STR R0, [SP, #20] 0x3418DF26: F240 203C MOVW R0, #0x023C ; 0x3400023C = hxspi2 0x3418DF2A: F2C3 4000 MOVT R0, #0x3400 ; 0x3400023C = hxspi2 0x3418DF2E: A903 ADD R1, SP, #12 0x3418DF30: F241 3288 MOVW R2, #0x1388 0x3418DF34: F004 FB2C BL HAL_XSPIM_Config ; 0x34192590 0x3418DF38: B108 CBZ R0, .L2 ; 0x3418DF3E 0x3418DF3A: F7F2 FC07 BL Error_Handler ; 0x3418074C
.L2: 0x3418DF3E: B006 ADD SP, SP, #24 0x3418DF40: BD80 POP 123R7, PC}

Section .init.EXTI0_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI0_IRQHandler: 0x3418DF42: E7FE B EXTI0_IRQHandler ; 0x3418DF42

Section .text.LL_APB4_GRP2_EnableClock.7 from blto2_FSBL_lto.o, size=34, align=4


LL_APB4_GRP2_EnableClock.7: 0x3418DF44: B082 SUB SP, SP, #8 0x3418DF46: 9001 STR R0, [SP, #4] 0x3418DF48: 9801 LDR R0, [SP, #4] 0x3418DF4A: F648 2178 MOVW R1, #0x8A78 0x3418DF4E: F2C5 6102 MOVT R1, #0x5602 0x3418DF52: 6008 STR R0, [R1] 0x3418DF54: F248 2078 MOVW R0, #0x8278 0x3418DF58: F2C5 6002 MOVT R0, #0x5602 0x3418DF5C: 6800 LDR R0, [R0] 0x3418DF5E: 9000 STR R0, [SP, #0] 0x3418DF60: 9800 LDR R0, [SP, #0] 0x3418DF62: B002 ADD SP, SP, #8 0x3418DF64: 4770 BX LR

Section .init.EXTI1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI1_IRQHandler: 0x3418DF66: E7FE B EXTI1_IRQHandler ; 0x3418DF66

Section .text.LL_AHB4_GRP1_EnableClock.8 from blto2_FSBL_lto.o, size=34, align=4


LL_AHB4_GRP1_EnableClock.8: 0x3418DF68: B082 SUB SP, SP, #8 0x3418DF6A: 9001 STR R0, [SP, #4] 0x3418DF6C: 9801 LDR R0, [SP, #4] 0x3418DF6E: F648 215C MOVW R1, #0x8A5C 0x3418DF72: F2C5 6102 MOVT R1, #0x5602 0x3418DF76: 6008 STR R0, [R1] 0x3418DF78: F248 205C MOVW R0, #0x825C 0x3418DF7C: F2C5 6002 MOVT R0, #0x5602 0x3418DF80: 6800 LDR R0, [R0] 0x3418DF82: 9000 STR R0, [SP, #0] 0x3418DF84: 9800 LDR R0, [SP, #0] 0x3418DF86: B002 ADD SP, SP, #8 0x3418DF88: 4770 BX LR

Section .init.EXTI2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI2_IRQHandler: 0x3418DF8A: E7FE B EXTI2_IRQHandler ; 0x3418DF8A

Section .text.LL_AHB5_GRP1_EnableClock from blto2_FSBL_lto.o, size=34, align=4


LL_AHB5_GRP1_EnableClock: 0x3418DF8C: B082 SUB SP, SP, #8 0x3418DF8E: 9001 STR R0, [SP, #4] 0x3418DF90: 9801 LDR R0, [SP, #4] 0x3418DF92: F648 2160 MOVW R1, #0x8A60 0x3418DF96: F2C5 6102 MOVT R1, #0x5602 0x3418DF9A: 6008 STR R0, [R1] 0x3418DF9C: F248 2060 MOVW R0, #0x8260 0x3418DFA0: F2C5 6002 MOVT R0, #0x5602 0x3418DFA4: 6800 LDR R0, [R0] 0x3418DFA6: 9000 STR R0, [SP, #0] 0x3418DFA8: 9800 LDR R0, [SP, #0] 0x3418DFAA: B002 ADD SP, SP, #8 0x3418DFAC: 4770 BX LR

Section .init.EXTI3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI3_IRQHandler: 0x3418DFAE: E7FE B EXTI3_IRQHandler ; 0x3418DFAE

Section .text.HAL_InitTick from blto2_FSBL_lto.o, size=126, align=4


HAL_InitTick: 0x3418DFB0: B580 PUSH 123R7, LR} 0x3418DFB2: B082 SUB SP, SP, #8 0x3418DFB4: 9000 STR R0, [SP, #0] 0x3418DFB6: F240 7090 MOVW R0, #0x0790 ; 0x34000790 = uwTickFreq 0x3418DFBA: F2C3 4000 MOVT R0, #0x3400 ; 0x34000790 = uwTickFreq 0x3418DFBE: 7800 LDRB R0, [R0] 0x3418DFC0: B918 CBNZ R0, .L1 ; 0x3418DFCA 0x3418DFC2: 2001 MOVS R0, #1 0x3418DFC4: F88D 0007 STRB.W R0, [SP, #7] 0x3418DFC8: E02D B 46L5 ; 0x3418E026
.L1: 0x3418DFCA: F240 708C MOVW R0, #0x078C ; 0x3400078C = SystemCoreClock 0x3418DFCE: F2C3 4000 MOVT R0, #0x3400 ; 0x3400078C = SystemCoreClock 0x3418DFD2: 6800 LDR R0, [R0] 0x3418DFD4: F240 7190 MOVW R1, #0x0790 ; 0x34000790 = uwTickFreq 0x3418DFD8: F2C3 4100 MOVT R1, #0x3400 ; 0x34000790 = uwTickFreq 0x3418DFDC: 780A LDRB R2, [R1] 0x3418DFDE: F44F 717A MOV.W R1, #0x03E8 0x3418DFE2: FBB1 F1F2 UDIV R1, R1, R2 0x3418DFE6: FBB0 F0F1 UDIV R0, R0, R1 0x3418DFEA: F7F3 FDF3 BL HAL_SYSTICK_Config ; 0x34181BD4 0x3418DFEE: B118 CBZ R0, .L2 ; 0x3418DFF8 0x3418DFF0: 2001 MOVS R0, #1 0x3418DFF2: F88D 0007 STRB.W R0, [SP, #7] 0x3418DFF6: E016 B 46L5 ; 0x3418E026
.L2: 0x3418DFF8: 9800 LDR R0, [SP, #0] 0x3418DFFA: 280F CMP R0, #15 0x3418DFFC: D80C BHI 46L3 ; 0x3418E018 0x3418DFFE: 9900 LDR R1, [SP, #0] 0x3418E000: F04F 30FF MOV.W R0, #0xFFFFFFFF 0x3418E004: 2200 MOVS R2, #0 0x3418E006: F7F3 FD57 BL HAL_NVIC_SetPriority ; 0x34181AB8 0x3418E00A: 9800 LDR R0, [SP, #0] 0x3418E00C: F240 717C MOVW R1, #0x077C ; 0x3400077C = uwTickPrio 0x3418E010: F2C3 4100 MOVT R1, #0x3400 ; 0x3400077C = uwTickPrio 0x3418E014: 6008 STR R0, [R1] 0x3418E016: E003 B 46L4 ; 0x3418E020
.L3: 0x3418E018: 2001 MOVS R0, #1 0x3418E01A: F88D 0007 STRB.W R0, [SP, #7] 0x3418E01E: E002 B 46L5 ; 0x3418E026
.L4: 0x3418E020: 2000 MOVS R0, #0 0x3418E022: F88D 0007 STRB.W R0, [SP, #7]
.L5: 0x3418E026: F89D 0007 LDRB.W R0, [SP, #7] 0x3418E02A: B002 ADD SP, SP, #8 0x3418E02C: BD80 POP 123R7, PC}

Section .init.EXTI4_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI4_IRQHandler: 0x3418E02E: E7FE B EXTI4_IRQHandler ; 0x3418E02E

Section .text.HAL_IncTick from blto2_FSBL_lto.o, size=26, align=4


HAL_IncTick: 0x3418E030: F240 7090 MOVW R0, #0x0790 ; 0x34000790 = uwTickFreq 0x3418E034: F2C3 4000 MOVT R0, #0x3400 ; 0x34000790 = uwTickFreq 0x3418E038: 7802 LDRB R2, [R0] 0x3418E03A: F240 3140 MOVW R1, #0x0340 ; 0x34000340 = uwTick 0x3418E03E: F2C3 4100 MOVT R1, #0x3400 ; 0x34000340 = uwTick 0x3418E042: 6808 LDR R0, [R1] 0x3418E044: 4410 ADD R0, R2 0x3418E046: 6008 STR R0, [R1] 0x3418E048: 4770 BX LR

Section .init.EXTI5_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI5_IRQHandler: 0x3418E04A: E7FE B EXTI5_IRQHandler ; 0x3418E04A

Section .text.HAL_Delay from blto2_FSBL_lto.o, size=58, align=4


HAL_Delay: 0x3418E04C: B580 PUSH 123R7, LR} 0x3418E04E: B084 SUB SP, SP, #16 0x3418E050: 9003 STR R0, [SP, #12] 0x3418E052: F7F3 FCCF BL HAL_GetTick ; 0x341819F4 0x3418E056: 9002 STR R0, [SP, #8] 0x3418E058: 9803 LDR R0, [SP, #12] 0x3418E05A: 9001 STR R0, [SP, #4] 0x3418E05C: 9801 LDR R0, [SP, #4] 0x3418E05E: 3001 ADDS R0, #1 0x3418E060: B138 CBZ R0, .L1 ; 0x3418E072 0x3418E062: F240 7090 MOVW R0, #0x0790 ; 0x34000790 = uwTickFreq 0x3418E066: F2C3 4000 MOVT R0, #0x3400 ; 0x34000790 = uwTickFreq 0x3418E06A: 7801 LDRB R1, [R0] 0x3418E06C: 9801 LDR R0, [SP, #4] 0x3418E06E: 4408 ADD R0, R1 0x3418E070: 9001 STR R0, [SP, #4]
.L1: 0x3418E072: F7F3 FCBF BL HAL_GetTick ; 0x341819F4 0x3418E076: 9902 LDR R1, [SP, #8] 0x3418E078: 1A40 SUBS R0, R0, R1 0x3418E07A: 9901 LDR R1, [SP, #4] 0x3418E07C: 4288 CMP R0, R1 0x3418E07E: D200 BCS 46L2 ; 0x3418E082 0x3418E080: E7F7 B 46L1 ; 0x3418E072
.L2: 0x3418E082: B004 ADD SP, SP, #16 0x3418E084: BD80 POP 123R7, PC}

Section .init.EXTI6_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI6_IRQHandler: 0x3418E086: E7FE B EXTI6_IRQHandler ; 0x3418E086

Section .text.HAL_SuspendTick from blto2_FSBL_lto.o, size=18, align=4


HAL_SuspendTick: 0x3418E088: F24E 0110 MOVW R1, #0xE010 0x3418E08C: F2CE 0100 MOVT R1, #0xE000 0x3418E090: 6808 LDR R0, [R1] 0x3418E092: F020 0002 BIC R0, R0, #2 0x3418E096: 6008 STR R0, [R1] 0x3418E098: 4770 BX LR

Section .init.EXTI7_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI7_IRQHandler: 0x3418E09A: E7FE B EXTI7_IRQHandler ; 0x3418E09A

Section .text.HAL_BSEC_OTP_Reload from blto2_FSBL_lto.o, size=250, align=4


HAL_BSEC_OTP_Reload: 0x3418E09C: B580 PUSH 123R7, LR} 0x3418E09E: B086 SUB SP, SP, #24 0x3418E0A0: 9004 STR R0, [SP, #16] 0x3418E0A2: 9103 STR R1, [SP, #12] 0x3418E0A4: F7F3 FCA6 BL HAL_GetTick ; 0x341819F4 0x3418E0A8: 9000 STR R0, [SP, #0] 0x3418E0AA: 9804 LDR R0, [SP, #16] 0x3418E0AC: B918 CBNZ R0, .L1 ; 0x3418E0B6 0x3418E0AE: 2001 MOVS R0, #1 0x3418E0B0: F88D 0017 STRB.W R0, [SP, #23] 0x3418E0B4: E06B B 46L11 ; 0x3418E18E
.L1: 0x3418E0B6: 9804 LDR R0, [SP, #16] 0x3418E0B8: 6800 LDR R0, [R0] 0x3418E0BA: F249 0100 MOVW R1, #0x9000 0x3418E0BE: F2C5 6100 MOVT R1, #0x5600 0x3418E0C2: 4288 CMP R0, R1 0x3418E0C4: D005 BEQ 46L2 ; 0x3418E0D2 0x3418E0C6: 9904 LDR R1, [SP, #16] 0x3418E0C8: 2001 MOVS R0, #1 0x3418E0CA: 6048 STR R0, [R1, #4] 0x3418E0CC: F88D 0017 STRB.W R0, [SP, #23] 0x3418E0D0: E05D B 46L11 ; 0x3418E18E
.L2: 0x3418E0D2: 9803 LDR R0, [SP, #12] 0x3418E0D4: 08C0 LSRS R0, R0, #3 0x3418E0D6: 282E CMP R0, #46 0x3418E0D8: D850 BHI 46L9 ; 0x3418E17C 0x3418E0DA: 9803 LDR R0, [SP, #12] 0x3418E0DC: 0940 LSRS R0, R0, #5 0x3418E0DE: 9002 STR R0, [SP, #8] 0x3418E0E0: 9803 LDR R0, [SP, #12] 0x3418E0E2: F000 011F AND R1, R0, #31 0x3418E0E6: 2001 MOVS R0, #1 0x3418E0E8: 4088 LSLS R0, R1 0x3418E0EA: 9001 STR R0, [SP, #4] 0x3418E0EC: 9804 LDR R0, [SP, #16] 0x3418E0EE: 6800 LDR R0, [R0] 0x3418E0F0: 9902 LDR R1, [SP, #8] 0x3418E0F2: EB00 0081 ADD.W R0, R0, R1, LSL #2 0x3418E0F6: F8D0 0880 LDR.W R0, [R0, #0x0880] 0x3418E0FA: 9901 LDR R1, [SP, #4] 0x3418E0FC: 4208 TST R0, R1 0x3418E0FE: D135 BNE 46L7 ; 0x3418E16C 0x3418E100: 9804 LDR R0, [SP, #16] 0x3418E102: 6800 LDR R0, [R0] 0x3418E104: F8D0 0C04 LDR.W R0, [R0, #0x0C04] 0x3418E108: F246 11FF MOVW R1, #0x61FF 0x3418E10C: 4388 BICS R0, R1 0x3418E10E: 9903 LDR R1, [SP, #12] 0x3418E110: 4308 ORRS R0, R1 0x3418E112: 9904 LDR R1, [SP, #16] 0x3418E114: 6809 LDR R1, [R1] 0x3418E116: F8C1 0C04 STR.W R0, [R1, #0x0C04]
.L3: 0x3418E11A: 9804 LDR R0, [SP, #16] 0x3418E11C: 6800 LDR R0, [R0] 0x3418E11E: F8D0 0E44 LDR.W R0, [R0, #0x0E44] 0x3418E122: 07C0 LSLS R0, R0, #31 0x3418E124: B170 CBZ R0, .L5 ; 0x3418E144 0x3418E126: F7F3 FC65 BL HAL_GetTick ; 0x341819F4 0x3418E12A: 9900 LDR R1, [SP, #0] 0x3418E12C: 1A40 SUBS R0, R0, R1 0x3418E12E: F5B0 7F7A CMP.W R0, #0x03E8 0x3418E132: D906 BLS 46L4 ; 0x3418E142 0x3418E134: 9904 LDR R1, [SP, #16] 0x3418E136: 200A MOVS R0, #10 0x3418E138: 6048 STR R0, [R1, #4] 0x3418E13A: 2001 MOVS R0, #1 0x3418E13C: F88D 0017 STRB.W R0, [SP, #23] 0x3418E140: E025 B 46L11 ; 0x3418E18E
.L4: 0x3418E142: E7EA B 46L3 ; 0x3418E11A
.L5: 0x3418E144: 9804 LDR R0, [SP, #16] 0x3418E146: 6800 LDR R0, [R0] 0x3418E148: F8D0 0E44 LDR.W R0, [R0, #0x0E44] 0x3418E14C: F410 0F8C TST R0, #0x460000 0x3418E150: D00B BEQ 46L6 ; 0x3418E16A 0x3418E152: 9804 LDR R0, [SP, #16] 0x3418E154: 6800 LDR R0, [R0] 0x3418E156: F8D0 0E44 LDR.W R0, [R0, #0x0E44] 0x3418E15A: F400 008C AND R0, R0, #0x460000 0x3418E15E: 9904 LDR R1, [SP, #16] 0x3418E160: 6048 STR R0, [R1, #4] 0x3418E162: 2001 MOVS R0, #1 0x3418E164: F88D 0017 STRB.W R0, [SP, #23] 0x3418E168: E011 B 46L11 ; 0x3418E18E
.L6: 0x3418E16A: E006 B 46L8 ; 0x3418E17A
.L7: 0x3418E16C: 9904 LDR R1, [SP, #16] 0x3418E16E: 2004 MOVS R0, #4 0x3418E170: 6048 STR R0, [R1, #4] 0x3418E172: 2001 MOVS R0, #1 0x3418E174: F88D 0017 STRB.W R0, [SP, #23] 0x3418E178: E009 B 46L11 ; 0x3418E18E
.L8: 0x3418E17A: E005 B 46L10 ; 0x3418E188
.L9: 0x3418E17C: 9904 LDR R1, [SP, #16] 0x3418E17E: 2001 MOVS R0, #1 0x3418E180: 6048 STR R0, [R1, #4] 0x3418E182: F88D 0017 STRB.W R0, [SP, #23] 0x3418E186: E002 B 46L11 ; 0x3418E18E
.L10: 0x3418E188: 2000 MOVS R0, #0 0x3418E18A: F88D 0017 STRB.W R0, [SP, #23]
.L11: 0x3418E18E: F89D 0017 LDRB.W R0, [SP, #23] 0x3418E192: B006 ADD SP, SP, #24 0x3418E194: BD80 POP 123R7, PC}

Section .init.EXTI8_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI8_IRQHandler: 0x3418E196: E7FE B EXTI8_IRQHandler ; 0x3418E196

Section .text.HAL_BSEC_OTP_Program from blto2_FSBL_lto.o, size=342, align=4


HAL_BSEC_OTP_Program: 0x3418E198: B580 PUSH 123R7, LR} 0x3418E19A: B08A SUB SP, SP, #40 0x3418E19C: 9008 STR R0, [SP, #32] 0x3418E19E: 9107 STR R1, [SP, #28] 0x3418E1A0: 9206 STR R2, [SP, #24] 0x3418E1A2: 9305 STR R3, [SP, #20] 0x3418E1A4: F7F3 FC26 BL HAL_GetTick ; 0x341819F4 0x3418E1A8: 9001 STR R0, [SP, #4] 0x3418E1AA: 9808 LDR R0, [SP, #32] 0x3418E1AC: B918 CBNZ R0, .L1 ; 0x3418E1B6 0x3418E1AE: 2001 MOVS R0, #1 0x3418E1B0: F88D 0027 STRB.W R0, [SP, #39] 0x3418E1B4: E097 B 46L17 ; 0x3418E2E6
.L1: 0x3418E1B6: 9808 LDR R0, [SP, #32] 0x3418E1B8: 6800 LDR R0, [R0] 0x3418E1BA: F249 0100 MOVW R1, #0x9000 0x3418E1BE: F2C5 6100 MOVT R1, #0x5600 0x3418E1C2: 4288 CMP R0, R1 0x3418E1C4: D005 BEQ 46L2 ; 0x3418E1D2 0x3418E1C6: 9908 LDR R1, [SP, #32] 0x3418E1C8: 2001 MOVS R0, #1 0x3418E1CA: 6048 STR R0, [R1, #4] 0x3418E1CC: F88D 0027 STRB.W R0, [SP, #39] 0x3418E1D0: E089 B 46L17 ; 0x3418E2E6
.L2: 0x3418E1D2: 9805 LDR R0, [SP, #20] 0x3418E1D4: B118 CBZ R0, .L3 ; 0x3418E1DE 0x3418E1D6: 9805 LDR R0, [SP, #20] 0x3418E1D8: F5B0 4F80 CMP.W R0, #0x4000 0x3418E1DC: D100 BNE 46L4 ; 0x3418E1E0
.L3: 0x3418E1DE: E007 B 46L5 ; 0x3418E1F0
.L4: 0x3418E1E0: F244 107A MOVW R0, #0x417A ; 0x3419417A = .rodata..L.str.20 0x3418E1E4: F2C3 4019 MOVT R0, #0x3419 ; 0x3419417A = .rodata..L.str.20 0x3418E1E8: F44F 71DD MOV.W R1, #0x01BA 0x3418E1EC: F7FF FD54 BL assert_failed ; 0x3418DC98
.L5: 0x3418E1F0: 9807 LDR R0, [SP, #28] 0x3418E1F2: 08C0 LSRS R0, R0, #3 0x3418E1F4: 282E CMP R0, #46 0x3418E1F6: D86D BHI 46L15 ; 0x3418E2D4 0x3418E1F8: 9807 LDR R0, [SP, #28] 0x3418E1FA: 0940 LSRS R0, R0, #5 0x3418E1FC: 9004 STR R0, [SP, #16] 0x3418E1FE: 9807 LDR R0, [SP, #28] 0x3418E200: F000 011F AND R1, R0, #31 0x3418E204: 2001 MOVS R0, #1 0x3418E206: 4088 LSLS R0, R1 0x3418E208: 9003 STR R0, [SP, #12] 0x3418E20A: 9808 LDR R0, [SP, #32] 0x3418E20C: 6800 LDR R0, [R0] 0x3418E20E: 9904 LDR R1, [SP, #16] 0x3418E210: EB00 0081 ADD.W R0, R0, R1, LSL #2 0x3418E214: F8D0 0800 LDR.W R0, [R0, #0x0800] 0x3418E218: 9903 LDR R1, [SP, #12] 0x3418E21A: 4208 TST R0, R1 0x3418E21C: D152 BNE 46L13 ; 0x3418E2C4 0x3418E21E: 9806 LDR R0, [SP, #24] 0x3418E220: 9908 LDR R1, [SP, #32] 0x3418E222: 6809 LDR R1, [R1] 0x3418E224: F8C1 0C08 STR.W R0, [R1, #0x0C08] 0x3418E228: 9808 LDR R0, [SP, #32] 0x3418E22A: 6800 LDR R0, [R0] 0x3418E22C: F8D0 0C04 LDR.W R0, [R0, #0x0C04] 0x3418E230: F246 11FF MOVW R1, #0x61FF 0x3418E234: EA20 0101 BIC.W R1, R0, R1 0x3418E238: 9807 LDR R0, [SP, #28] 0x3418E23A: 9A05 LDR R2, [SP, #20] 0x3418E23C: 4310 ORRS R0, R2 0x3418E23E: 4308 ORRS R0, R1 0x3418E240: F440 5000 ORR R0, R0, #0x2000 0x3418E244: 9908 LDR R1, [SP, #32] 0x3418E246: 6809 LDR R1, [R1] 0x3418E248: F8C1 0C04 STR.W R0, [R1, #0x0C04]
.L6: 0x3418E24C: 9808 LDR R0, [SP, #32] 0x3418E24E: 6800 LDR R0, [R0] 0x3418E250: F8D0 0E44 LDR.W R0, [R0, #0x0E44] 0x3418E254: 07C0 LSLS R0, R0, #31 0x3418E256: B170 CBZ R0, .L8 ; 0x3418E276 0x3418E258: F7F3 FBCC BL HAL_GetTick ; 0x341819F4 0x3418E25C: 9901 LDR R1, [SP, #4] 0x3418E25E: 1A40 SUBS R0, R0, R1 0x3418E260: F5B0 7F7A CMP.W R0, #0x03E8 0x3418E264: D906 BLS 46L7 ; 0x3418E274 0x3418E266: 9908 LDR R1, [SP, #32] 0x3418E268: 200A MOVS R0, #10 0x3418E26A: 6048 STR R0, [R1, #4] 0x3418E26C: 2001 MOVS R0, #1 0x3418E26E: F88D 0027 STRB.W R0, [SP, #39] 0x3418E272: E038 B 46L17 ; 0x3418E2E6
.L7: 0x3418E274: E7EA B 46L6 ; 0x3418E24C
.L8: 0x3418E276: 9808 LDR R0, [SP, #32] 0x3418E278: 6800 LDR R0, [R0] 0x3418E27A: F8D0 0E44 LDR.W R0, [R0, #0x0E44] 0x3418E27E: 03C0 LSLS R0, R0, #15 0x3418E280: 2800 CMP R0, #0 0x3418E282: D507 BPL 46L9 ; 0x3418E294 0x3418E284: 9908 LDR R1, [SP, #32] 0x3418E286: F44F 3080 MOV.W R0, #0x010000 0x3418E28A: 6048 STR R0, [R1, #4] 0x3418E28C: 2001 MOVS R0, #1 0x3418E28E: F88D 0027 STRB.W R0, [SP, #39] 0x3418E292: E028 B 46L17 ; 0x3418E2E6
.L9: 0x3418E294: 9808 LDR R0, [SP, #32] 0x3418E296: 9907 LDR R1, [SP, #28] 0x3418E298: AA02 ADD R2, SP, #8 0x3418E29A: F7F3 FBB1 BL HAL_BSEC_OTP_Read ; 0x34181A00 0x3418E29E: B960 CBNZ R0, .L11 ; 0x3418E2BA 0x3418E2A0: 9802 LDR R0, [SP, #8] 0x3418E2A2: 9906 LDR R1, [SP, #24] 0x3418E2A4: 4288 CMP R0, R1 0x3418E2A6: D007 BEQ 46L10 ; 0x3418E2B8 0x3418E2A8: 9908 LDR R1, [SP, #32] 0x3418E2AA: F44F 3080 MOV.W R0, #0x010000 0x3418E2AE: 6048 STR R0, [R1, #4] 0x3418E2B0: 2001 MOVS R0, #1 0x3418E2B2: F88D 0027 STRB.W R0, [SP, #39] 0x3418E2B6: E016 B 46L17 ; 0x3418E2E6
.L10: 0x3418E2B8: E003 B 46L12 ; 0x3418E2C2
.L11: 0x3418E2BA: 2001 MOVS R0, #1 0x3418E2BC: F88D 0027 STRB.W R0, [SP, #39] 0x3418E2C0: E011 B 46L17 ; 0x3418E2E6
.L12: 0x3418E2C2: E006 B 46L14 ; 0x3418E2D2
.L13: 0x3418E2C4: 9908 LDR R1, [SP, #32] 0x3418E2C6: 2004 MOVS R0, #4 0x3418E2C8: 6048 STR R0, [R1, #4] 0x3418E2CA: 2001 MOVS R0, #1 0x3418E2CC: F88D 0027 STRB.W R0, [SP, #39] 0x3418E2D0: E009 B 46L17 ; 0x3418E2E6
.L14: 0x3418E2D2: E005 B 46L16 ; 0x3418E2E0
.L15: 0x3418E2D4: 9908 LDR R1, [SP, #32] 0x3418E2D6: 2001 MOVS R0, #1 0x3418E2D8: 6048 STR R0, [R1, #4] 0x3418E2DA: F88D 0027 STRB.W R0, [SP, #39] 0x3418E2DE: E002 B 46L17 ; 0x3418E2E6
.L16: 0x3418E2E0: 2000 MOVS R0, #0 0x3418E2E2: F88D 0027 STRB.W R0, [SP, #39]
.L17: 0x3418E2E6: F89D 0027 LDRB.W R0, [SP, #39] 0x3418E2EA: B00A ADD SP, SP, #40 0x3418E2EC: BD80 POP 123R7, PC}

Section .init.EXTI9_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI9_IRQHandler: 0x3418E2EE: E7FE B EXTI9_IRQHandler ; 0x3418E2EE

Section .text.HAL_NVIC_SetPriorityGrouping from blto2_FSBL_lto.o, size=62, align=4


HAL_NVIC_SetPriorityGrouping: 0x3418E2F0: B580 PUSH 123R7, LR} 0x3418E2F2: B082 SUB SP, SP, #8 0x3418E2F4: 9001 STR R0, [SP, #4] 0x3418E2F6: 9801 LDR R0, [SP, #4] 0x3418E2F8: 2807 CMP R0, #7 0x3418E2FA: D00B BEQ 46L1 ; 0x3418E314 0x3418E2FC: 9801 LDR R0, [SP, #4] 0x3418E2FE: 2806 CMP R0, #6 0x3418E300: D008 BEQ 46L1 ; 0x3418E314 0x3418E302: 9801 LDR R0, [SP, #4] 0x3418E304: 2805 CMP R0, #5 0x3418E306: D005 BEQ 46L1 ; 0x3418E314 0x3418E308: 9801 LDR R0, [SP, #4] 0x3418E30A: 2804 CMP R0, #4 0x3418E30C: D002 BEQ 46L1 ; 0x3418E314 0x3418E30E: 9801 LDR R0, [SP, #4] 0x3418E310: 2803 CMP R0, #3 0x3418E312: D100 BNE 46L2 ; 0x3418E316
.L1: 0x3418E314: E006 B 46L3 ; 0x3418E324
.L2: 0x3418E316: F244 4018 MOVW R0, #0x4418 ; 0x34194418 = .rodata..L.str.23 0x3418E31A: F2C3 4019 MOVT R0, #0x3419 ; 0x34194418 = .rodata..L.str.23 0x3418E31E: 21E6 MOVS R1, #230 0x3418E320: F7FF FCBA BL assert_failed ; 0x3418DC98
.L3: 0x3418E324: 9801 LDR R0, [SP, #4] 0x3418E326: F7F3 FBA9 BL __NVIC_SetPriorityGrouping ; 0x34181A7C 0x3418E32A: B002 ADD SP, SP, #8 0x3418E32C: BD80 POP 123R7, PC}

Section .init.EXTI10_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI10_IRQHandler: 0x3418E32E: E7FE B EXTI10_IRQHandler ; 0x3418E32E

Section .text.__NVIC_SetPriority from blto2_FSBL_lto.o, size=62, align=4


__NVIC_SetPriority: 0x3418E330: B082 SUB SP, SP, #8 0x3418E332: F8AD 0006 STRH.W R0, [SP, #6] 0x3418E336: 9100 STR R1, [SP, #0] 0x3418E338: F9BD 0006 LDRSH.W R0, [SP, #6] 0x3418E33C: 2800 CMP R0, #0 0x3418E33E: D409 BMI 46L1 ; 0x3418E354 0x3418E340: 9800 LDR R0, [SP, #0] 0x3418E342: 0100 LSLS R0, R0, #4 0x3418E344: F9BD 1006 LDRSH.W R1, [SP, #6] 0x3418E348: F24E 4200 MOVW R2, #0xE400 0x3418E34C: F2CE 0200 MOVT R2, #0xE000 0x3418E350: 5488 STRB R0, [R1, R2] 0x3418E352: E00A B 46L2 ; 0x3418E36A
.L1: 0x3418E354: 9800 LDR R0, [SP, #0] 0x3418E356: 0100 LSLS R0, R0, #4 0x3418E358: F8BD 1006 LDRH.W R1, [SP, #6] 0x3418E35C: F001 010F AND R1, R1, #15 0x3418E360: F64E 5214 MOVW R2, #0xED14 0x3418E364: F2CE 0200 MOVT R2, #0xE000 0x3418E368: 5488 STRB R0, [R1, R2]
.L2: 0x3418E36A: B002 ADD SP, SP, #8 0x3418E36C: 4770 BX LR

Section .init.EXTI11_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI11_IRQHandler: 0x3418E36E: E7FE B EXTI11_IRQHandler ; 0x3418E36E

Section .text.SysTick_Config from blto2_FSBL_lto.o, size=78, align=4


SysTick_Config: 0x3418E370: B580 PUSH 123R7, LR} 0x3418E372: B082 SUB SP, SP, #8 0x3418E374: 9000 STR R0, [SP, #0] 0x3418E376: 9800 LDR R0, [SP, #0] 0x3418E378: 3801 SUBS R0, #1 0x3418E37A: F1B0 7F80 CMP.W R0, #0x01000000 0x3418E37E: D302 BCC 46L1 ; 0x3418E386 0x3418E380: 2001 MOVS R0, #1 0x3418E382: 9001 STR R0, [SP, #4] 0x3418E384: E018 B 46L2 ; 0x3418E3B8
.L1: 0x3418E386: 9800 LDR R0, [SP, #0] 0x3418E388: 3801 SUBS R0, #1 0x3418E38A: F24E 0114 MOVW R1, #0xE014 0x3418E38E: F2CE 0100 MOVT R1, #0xE000 0x3418E392: 6008 STR R0, [R1] 0x3418E394: F04F 30FF MOV.W R0, #0xFFFFFFFF 0x3418E398: 210F MOVS R1, #15 0x3418E39A: F7FF FFC9 BL __NVIC_SetPriority ; 0x3418E330 0x3418E39E: F24E 0118 MOVW R1, #0xE018 0x3418E3A2: F2CE 0100 MOVT R1, #0xE000 0x3418E3A6: 2000 MOVS R0, #0 0x3418E3A8: 6008 STR R0, [R1] 0x3418E3AA: F24E 0210 MOVW R2, #0xE010 0x3418E3AE: F2CE 0200 MOVT R2, #0xE000 0x3418E3B2: 2107 MOVS R1, #7 0x3418E3B4: 6011 STR R1, [R2] 0x3418E3B6: 9001 STR R0, [SP, #4]
.L2: 0x3418E3B8: 9801 LDR R0, [SP, #4] 0x3418E3BA: B002 ADD SP, SP, #8 0x3418E3BC: BD80 POP 123R7, PC}

Section .init.EXTI12_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI12_IRQHandler: 0x3418E3BE: E7FE B EXTI12_IRQHandler ; 0x3418E3BE

Section .text.HAL_GPIO_WritePin from blto2_FSBL_lto.o, size=102, align=4


HAL_GPIO_WritePin: 0x3418E3C0: B580 PUSH 123R7, LR} 0x3418E3C2: B082 SUB SP, SP, #8 0x3418E3C4: 9001 STR R0, [SP, #4] 0x3418E3C6: F8AD 1002 STRH.W R1, [SP, #2] 0x3418E3CA: F88D 2001 STRB.W R2, [SP, #1] 0x3418E3CE: F8BD 0002 LDRH.W R0, [SP, #2] 0x3418E3D2: B110 CBZ R0, .L1 ; 0x3418E3DA 0x3418E3D4: 2000 MOVS R0, #0 0x3418E3D6: B900 CBNZ R0, .L1 ; 0x3418E3DA 0x3418E3D8: E007 B 46L2 ; 0x3418E3EA
.L1: 0x3418E3DA: F244 10E4 MOVW R0, #0x41E4 ; 0x341941E4 = .rodata..L.str.33 0x3418E3DE: F2C3 4019 MOVT R0, #0x3419 ; 0x341941E4 = .rodata..L.str.33 0x3418E3E2: F44F 71D0 MOV.W R1, #0x01A0 0x3418E3E6: F7FF FC57 BL assert_failed ; 0x3418DC98
.L2: 0x3418E3EA: F89D 0001 LDRB.W R0, [SP, #1] 0x3418E3EE: B118 CBZ R0, .L3 ; 0x3418E3F8 0x3418E3F0: F89D 0001 LDRB.W R0, [SP, #1] 0x3418E3F4: 2801 CMP R0, #1 0x3418E3F6: D100 BNE 46L4 ; 0x3418E3FA
.L3: 0x3418E3F8: E007 B 46L5 ; 0x3418E40A
.L4: 0x3418E3FA: F244 10E4 MOVW R0, #0x41E4 ; 0x341941E4 = .rodata..L.str.33 0x3418E3FE: F2C3 4019 MOVT R0, #0x3419 ; 0x341941E4 = .rodata..L.str.33 0x3418E402: F240 11A1 MOVW R1, #0x01A1 0x3418E406: F7FF FC47 BL assert_failed ; 0x3418DC98
.L5: 0x3418E40A: F89D 0001 LDRB.W R0, [SP, #1] 0x3418E40E: B120 CBZ R0, .L6 ; 0x3418E41A 0x3418E410: F8BD 0002 LDRH.W R0, [SP, #2] 0x3418E414: 9901 LDR R1, [SP, #4] 0x3418E416: 6188 STR R0, [R1, #24] 0x3418E418: E003 B 46L7 ; 0x3418E422
.L6: 0x3418E41A: F8BD 0002 LDRH.W R0, [SP, #2] 0x3418E41E: 9901 LDR R1, [SP, #4] 0x3418E420: 6288 STR R0, [R1, #40]
.L7: 0x3418E422: B002 ADD SP, SP, #8 0x3418E424: BD80 POP 123R7, PC}

Section .init.EXTI13_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI13_IRQHandler: 0x3418E426: E7FE B EXTI13_IRQHandler ; 0x3418E426

Section .text.HAL_PWREx_ConfigSupply from blto2_FSBL_lto.o, size=114, align=4


HAL_PWREx_ConfigSupply: 0x3418E428: B580 PUSH 123R7, LR} 0x3418E42A: B084 SUB SP, SP, #16 0x3418E42C: 9002 STR R0, [SP, #8] 0x3418E42E: 9802 LDR R0, [SP, #8] 0x3418E430: 2804 CMP R0, #4 0x3418E432: D001 BEQ 46L1 ; 0x3418E438 0x3418E434: 9802 LDR R0, [SP, #8] 0x3418E436: B900 CBNZ R0, .L2 ; 0x3418E43A
.L1: 0x3418E438: E007 B 46L3 ; 0x3418E44A
.L2: 0x3418E43A: F244 4084 MOVW R0, #0x4484 ; 0x34194484 = .rodata..L.str.41 0x3418E43E: F2C3 4019 MOVT R0, #0x3419 ; 0x34194484 = .rodata..L.str.41 0x3418E442: F44F 7187 MOV.W R1, #0x010E 0x3418E446: F7FF FC27 BL assert_failed ; 0x3418DC98
.L3: 0x3418E44A: F644 0100 MOVW R1, #0x4800 0x3418E44E: F2C5 6102 MOVT R1, #0x5602 0x3418E452: 6808 LDR R0, [R1] 0x3418E454: F020 0004 BIC R0, R0, #4 0x3418E458: 9A02 LDR R2, [SP, #8] 0x3418E45A: 4310 ORRS R0, R2 0x3418E45C: 6008 STR R0, [R1] 0x3418E45E: F7F3 FAC9 BL HAL_GetTick ; 0x341819F4 0x3418E462: 9001 STR R0, [SP, #4]
.L4: 0x3418E464: F644 0020 MOVW R0, #0x4820 0x3418E468: F2C5 6002 MOVT R0, #0x5602 0x3418E46C: 6800 LDR R0, [R0] 0x3418E46E: 0380 LSLS R0, R0, #14 0x3418E470: 2800 CMP R0, #0 0x3418E472: D40B BMI 46L6 ; 0x3418E48C 0x3418E474: F7F3 FABE BL HAL_GetTick ; 0x341819F4 0x3418E478: 9901 LDR R1, [SP, #4] 0x3418E47A: 1A40 SUBS R0, R0, R1 0x3418E47C: F5B0 7F7A CMP.W R0, #0x03E8 0x3418E480: D903 BLS 46L5 ; 0x3418E48A 0x3418E482: 2001 MOVS R0, #1 0x3418E484: F88D 000F STRB.W R0, [SP, #15] 0x3418E488: E003 B 46L7 ; 0x3418E492
.L5: 0x3418E48A: E7EB B 46L4 ; 0x3418E464
.L6: 0x3418E48C: 2000 MOVS R0, #0 0x3418E48E: F88D 000F STRB.W R0, [SP, #15]
.L7: 0x3418E492: F89D 000F LDRB.W R0, [SP, #15] 0x3418E496: B004 ADD SP, SP, #16 0x3418E498: BD80 POP 123R7, PC}

Section .init.EXTI14_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI14_IRQHandler: 0x3418E49A: E7FE B EXTI14_IRQHandler ; 0x3418E49A

Section .text.HAL_PWREx_ControlVoltageScaling from blto2_FSBL_lto.o, size=114, align=4


HAL_PWREx_ControlVoltageScaling: 0x3418E49C: B580 PUSH 123R7, LR} 0x3418E49E: B084 SUB SP, SP, #16 0x3418E4A0: 9002 STR R0, [SP, #8] 0x3418E4A2: 9802 LDR R0, [SP, #8] 0x3418E4A4: 2801 CMP R0, #1 0x3418E4A6: D001 BEQ 46L1 ; 0x3418E4AC 0x3418E4A8: 9802 LDR R0, [SP, #8] 0x3418E4AA: B900 CBNZ R0, .L2 ; 0x3418E4AE
.L1: 0x3418E4AC: E007 B 46L3 ; 0x3418E4BE
.L2: 0x3418E4AE: F244 4084 MOVW R0, #0x4484 ; 0x34194484 = .rodata..L.str.41 0x3418E4B2: F2C3 4019 MOVT R0, #0x3419 ; 0x34194484 = .rodata..L.str.41 0x3418E4B6: F240 1141 MOVW R1, #0x0141 0x3418E4BA: F7FF FBED BL assert_failed ; 0x3418DC98
.L3: 0x3418E4BE: F644 0120 MOVW R1, #0x4820 0x3418E4C2: F2C5 6102 MOVT R1, #0x5602 0x3418E4C6: 6808 LDR R0, [R1] 0x3418E4C8: F020 0001 BIC R0, R0, #1 0x3418E4CC: 9A02 LDR R2, [SP, #8] 0x3418E4CE: 4310 ORRS R0, R2 0x3418E4D0: 6008 STR R0, [R1] 0x3418E4D2: F7F3 FA8F BL HAL_GetTick ; 0x341819F4 0x3418E4D6: 9001 STR R0, [SP, #4]
.L4: 0x3418E4D8: F644 0020 MOVW R0, #0x4820 0x3418E4DC: F2C5 6002 MOVT R0, #0x5602 0x3418E4E0: 6800 LDR R0, [R0] 0x3418E4E2: 0780 LSLS R0, R0, #30 0x3418E4E4: 2800 CMP R0, #0 0x3418E4E6: D40B BMI 46L6 ; 0x3418E500 0x3418E4E8: F7F3 FA84 BL HAL_GetTick ; 0x341819F4 0x3418E4EC: 9901 LDR R1, [SP, #4] 0x3418E4EE: 1A40 SUBS R0, R0, R1 0x3418E4F0: F5B0 7F7A CMP.W R0, #0x03E8 0x3418E4F4: D903 BLS 46L5 ; 0x3418E4FE 0x3418E4F6: 2001 MOVS R0, #1 0x3418E4F8: F88D 000F STRB.W R0, [SP, #15] 0x3418E4FC: E003 B 46L7 ; 0x3418E506
.L5: 0x3418E4FE: E7EB B 46L4 ; 0x3418E4D8
.L6: 0x3418E500: 2000 MOVS R0, #0 0x3418E502: F88D 000F STRB.W R0, [SP, #15]
.L7: 0x3418E506: F89D 000F LDRB.W R0, [SP, #15] 0x3418E50A: B004 ADD SP, SP, #16 0x3418E50C: BD80 POP 123R7, PC}

Section .init.EXTI15_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI15_IRQHandler: 0x3418E50E: E7FE B EXTI15_IRQHandler ; 0x3418E50E

Section .text.HAL_PWREx_ConfigVddIORange from blto2_FSBL_lto.o, size=226, align=4


HAL_PWREx_ConfigVddIORange: 0x3418E510: B580 PUSH 123R7, LR} 0x3418E512: B084 SUB SP, SP, #16 0x3418E514: 9003 STR R0, [SP, #12] 0x3418E516: 9102 STR R1, [SP, #8] 0x3418E518: 9803 LDR R0, [SP, #12] 0x3418E51A: B158 CBZ R0, .L1 ; 0x3418E534 0x3418E51C: 9803 LDR R0, [SP, #12] 0x3418E51E: 2801 CMP R0, #1 0x3418E520: D008 BEQ 46L1 ; 0x3418E534 0x3418E522: 9803 LDR R0, [SP, #12] 0x3418E524: 2802 CMP R0, #2 0x3418E526: D005 BEQ 46L1 ; 0x3418E534 0x3418E528: 9803 LDR R0, [SP, #12] 0x3418E52A: 2803 CMP R0, #3 0x3418E52C: D002 BEQ 46L1 ; 0x3418E534 0x3418E52E: 9803 LDR R0, [SP, #12] 0x3418E530: 2804 CMP R0, #4 0x3418E532: D100 BNE 46L2 ; 0x3418E536
.L1: 0x3418E534: E007 B 46L3 ; 0x3418E546
.L2: 0x3418E536: F244 4084 MOVW R0, #0x4484 ; 0x34194484 = .rodata..L.str.41 0x3418E53A: F2C3 4019 MOVT R0, #0x3419 ; 0x34194484 = .rodata..L.str.41 0x3418E53E: F240 316A MOVW R1, #0x036A 0x3418E542: F7FF FBA9 BL assert_failed ; 0x3418DC98
.L3: 0x3418E546: 9802 LDR R0, [SP, #8] 0x3418E548: B110 CBZ R0, .L4 ; 0x3418E550 0x3418E54A: 9802 LDR R0, [SP, #8] 0x3418E54C: 2801 CMP R0, #1 0x3418E54E: D100 BNE 46L5 ; 0x3418E552
.L4: 0x3418E550: E007 B 46L6 ; 0x3418E562
.L5: 0x3418E552: F244 4084 MOVW R0, #0x4484 ; 0x34194484 = .rodata..L.str.41 0x3418E556: F2C3 4019 MOVT R0, #0x3419 ; 0x34194484 = .rodata..L.str.41 0x3418E55A: F240 316B MOVW R1, #0x036B 0x3418E55E: F7FF FB9B BL assert_failed ; 0x3418DC98
.L6: 0x3418E562: 9803 LDR R0, [SP, #12] 0x3418E564: 9001 STR R0, [SP, #4] 0x3418E566: 2804 CMP R0, #4 0x3418E568: D841 BHI 46L7 ; 0x3418E5EE 0x3418E56A: 9901 LDR R1, [SP, #4] 0x3418E56C: E8DF F001 TBB 91PC, R1] 0x3418E570: 03 DC.B 0x03 ; '\x03' 0x3418E571: 0F DC.B 0x0F ; '\x0F' 0x3418E572: 1B DC.B 0x1B ; '\x1B' 0x3418E573: 27 DC.B 0x27 ; ''' 0x3418E574: 33 DC.B 0x33 ; '3' 0x3418E575: 00 DC.B 0x00 ; '\0' 0x3418E576: F644 013C MOVW R1, #0x483C 0x3418E57A: F2C5 6102 MOVT R1, #0x5602 0x3418E57E: 6808 LDR R0, [R1] 0x3418E580: F020 7080 BIC R0, R0, #0x01000000 0x3418E584: 9A02 LDR R2, [SP, #8] 0x3418E586: EA40 6002 ORR.W R0, R0, R2, LSL #24 0x3418E58A: 6008 STR R0, [R1] 0x3418E58C: E02F B 46L7 ; 0x3418E5EE 0x3418E58E: F644 013C MOVW R1, #0x483C 0x3418E592: F2C5 6102 MOVT R1, #0x5602 0x3418E596: 6808 LDR R0, [R1] 0x3418E598: F020 7000 BIC R0, R0, #0x02000000 0x3418E59C: 9A02 LDR R2, [SP, #8] 0x3418E59E: EA40 6042 ORR.W R0, R0, R2, LSL #25 0x3418E5A2: 6008 STR R0, [R1] 0x3418E5A4: E023 B 46L7 ; 0x3418E5EE 0x3418E5A6: F644 013C MOVW R1, #0x483C 0x3418E5AA: F2C5 6102 MOVT R1, #0x5602 0x3418E5AE: 6808 LDR R0, [R1] 0x3418E5B0: F020 6080 BIC R0, R0, #0x04000000 0x3418E5B4: 9A02 LDR R2, [SP, #8] 0x3418E5B6: EA40 6082 ORR.W R0, R0, R2, LSL #26 0x3418E5BA: 6008 STR R0, [R1] 0x3418E5BC: E017 B 46L7 ; 0x3418E5EE 0x3418E5BE: F644 0134 MOVW R1, #0x4834 0x3418E5C2: F2C5 6102 MOVT R1, #0x5602 0x3418E5C6: 6808 LDR R0, [R1] 0x3418E5C8: F020 7080 BIC R0, R0, #0x01000000 0x3418E5CC: 9A02 LDR R2, [SP, #8] 0x3418E5CE: EA40 6002 ORR.W R0, R0, R2, LSL #24 0x3418E5D2: 6008 STR R0, [R1] 0x3418E5D4: E00B B 46L7 ; 0x3418E5EE 0x3418E5D6: F644 0138 MOVW R1, #0x4838 0x3418E5DA: F2C5 6102 MOVT R1, #0x5602 0x3418E5DE: 6808 LDR R0, [R1] 0x3418E5E0: F020 7080 BIC R0, R0, #0x01000000 0x3418E5E4: 9A02 LDR R2, [SP, #8] 0x3418E5E6: EA40 6002 ORR.W R0, R0, R2, LSL #24 0x3418E5EA: 6008 STR R0, [R1] 0x3418E5EC: E7FF B 46L7 ; 0x3418E5EE
.L7: 0x3418E5EE: B004 ADD SP, SP, #16 0x3418E5F0: BD80 POP 123R7, PC}

Section .init.SAES_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SAES_IRQHandler: 0x3418E5F2: E7FE B SAES_IRQHandler ; 0x3418E5F2

Section .text.HAL_PWREx_EnableVddIO3 from blto2_FSBL_lto.o, size=18, align=4


HAL_PWREx_EnableVddIO3: 0x3418E5F4: F644 013C MOVW R1, #0x483C 0x3418E5F8: F2C5 6102 MOVT R1, #0x5602 0x3418E5FC: 6808 LDR R0, [R1] 0x3418E5FE: F440 7000 ORR R0, R0, #0x0200 0x3418E602: 6008 STR R0, [R1] 0x3418E604: 4770 BX LR

Section .init.CRYP_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


CRYP_IRQHandler: 0x3418E606: E7FE B CRYP_IRQHandler ; 0x3418E606

Section .text.LL_RCC_HSI_Enable from blto2_FSBL_lto.o, size=14, align=4


LL_RCC_HSI_Enable: 0x3418E608: F648 0100 MOVW R1, #0x8800 0x3418E60C: F2C5 6102 MOVT R1, #0x5602 0x3418E610: 2008 MOVS R0, #8 0x3418E612: 6008 STR R0, [R1] 0x3418E614: 4770 BX LR

Section .init.PKA_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


PKA_IRQHandler: 0x3418E616: E7FE B PKA_IRQHandler ; 0x3418E616

Section .text.HAL_RCC_OscConfig from blto2_FSBL_lto.o, size=2810, align=4


HAL_RCC_OscConfig: 0x3418E618: B580 PUSH 123R7, LR} 0x3418E61A: B0A2 SUB SP, SP, #136 0x3418E61C: 9020 STR R0, [SP, #128] 0x3418E61E: 9820 LDR R0, [SP, #128] 0x3418E620: B920 CBNZ R0, .L1 ; 0x3418E62C 0x3418E622: 2001 MOVS R0, #1 0x3418E624: F88D 0087 STRB.W R0, [SP, #135] 0x3418E628: F000 BD6F B.W 46L144 ; 0x3418F10A
.L1: 0x3418E62C: 9820 LDR R0, [SP, #128] 0x3418E62E: 6800 LDR R0, [R0] 0x3418E630: B1E0 CBZ R0, .L2 ; 0x3418E66C 0x3418E632: 9820 LDR R0, [SP, #128] 0x3418E634: 6800 LDR R0, [R0] 0x3418E636: F000 0001 AND R0, R0, #1 0x3418E63A: 2801 CMP R0, #1 0x3418E63C: D016 BEQ 46L2 ; 0x3418E66C 0x3418E63E: 9820 LDR R0, [SP, #128] 0x3418E640: 6800 LDR R0, [R0] 0x3418E642: F000 0002 AND R0, R0, #2 0x3418E646: 2802 CMP R0, #2 0x3418E648: D010 BEQ 46L2 ; 0x3418E66C 0x3418E64A: 9820 LDR R0, [SP, #128] 0x3418E64C: 6800 LDR R0, [R0] 0x3418E64E: F000 0010 AND R0, R0, #16 0x3418E652: 2810 CMP R0, #16 0x3418E654: D00A BEQ 46L2 ; 0x3418E66C 0x3418E656: 9820 LDR R0, [SP, #128] 0x3418E658: 6800 LDR R0, [R0] 0x3418E65A: F000 0008 AND R0, R0, #8 0x3418E65E: 2808 CMP R0, #8 0x3418E660: D004 BEQ 46L2 ; 0x3418E66C 0x3418E662: 9820 LDR R0, [SP, #128] 0x3418E664: 7800 LDRB R0, [R0] 0x3418E666: 0740 LSLS R0, R0, #29 0x3418E668: 2800 CMP R0, #0 0x3418E66A: D500 BPL 46L3 ; 0x3418E66E
.L2: 0x3418E66C: E007 B 46L4 ; 0x3418E67E
.L3: 0x3418E66E: F244 300F MOVW R0, #0x430F ; 0x3419430F = .rodata..L.str.50 0x3418E672: F2C3 4019 MOVT R0, #0x3419 ; 0x3419430F = .rodata..L.str.50 0x3418E676: F44F 71BB MOV.W R1, #0x0176 0x3418E67A: F7FF FB0D BL assert_failed ; 0x3418DC98
.L4: 0x3418E67E: F7F3 FF05 BL LL_RCC_GetCpuClkSource ; 0x3418248C 0x3418E682: 901D STR R0, [SP, #116] 0x3418E684: F7F3 FF0A BL LL_RCC_GetSysClkSource ; 0x3418249C 0x3418E688: 901E STR R0, [SP, #120] 0x3418E68A: F7F3 FF0F BL LL_RCC_PLL1_GetSource ; 0x341824AC 0x3418E68E: 901C STR R0, [SP, #112] 0x3418E690: F7F3 FF14 BL LL_RCC_PLL2_GetSource ; 0x341824BC 0x3418E694: 901B STR R0, [SP, #108] 0x3418E696: F7F3 FF19 BL LL_RCC_PLL3_GetSource ; 0x341824CC 0x3418E69A: 901A STR R0, [SP, #104] 0x3418E69C: F7F3 FF1E BL LL_RCC_PLL4_GetSource ; 0x341824DC 0x3418E6A0: 9019 STR R0, [SP, #100] 0x3418E6A2: F248 0004 MOVW R0, #0x8004 0x3418E6A6: F2C5 6002 MOVT R0, #0x5602 0x3418E6AA: 6800 LDR R0, [R0] 0x3418E6AC: 9018 STR R0, [SP, #96] 0x3418E6AE: 9820 LDR R0, [SP, #128] 0x3418E6B0: 7800 LDRB R0, [R0] 0x3418E6B2: 07C0 LSLS R0, R0, #31 0x3418E6B4: 2800 CMP R0, #0 0x3418E6B6: F000 8101 BEQ.W 46L29 ; 0x3418E8BC 0x3418E6BA: 9820 LDR R0, [SP, #128] 0x3418E6BC: 6840 LDR R0, [R0, #4] 0x3418E6BE: B188 CBZ R0, .L5 ; 0x3418E6E4 0x3418E6C0: 9820 LDR R0, [SP, #128] 0x3418E6C2: 6840 LDR R0, [R0, #4] 0x3418E6C4: 2810 CMP R0, #16 0x3418E6C6: D00D BEQ 46L5 ; 0x3418E6E4 0x3418E6C8: 9820 LDR R0, [SP, #128] 0x3418E6CA: 6840 LDR R0, [R0, #4] 0x3418E6CC: F248 0110 MOVW R1, #0x8010 0x3418E6D0: 4288 CMP R0, R1 0x3418E6D2: D007 BEQ 46L5 ; 0x3418E6E4 0x3418E6D4: 9820 LDR R0, [SP, #128] 0x3418E6D6: 6840 LDR R0, [R0, #4] 0x3418E6D8: F248 0110 MOVW R1, #0x8010 0x3418E6DC: F2C0 0101 MOVT R1, #1 0x3418E6E0: 4288 CMP R0, R1 0x3418E6E2: D100 BNE 46L6 ; 0x3418E6E6
.L5: 0x3418E6E4: E007 B 46L7 ; 0x3418E6F6
.L6: 0x3418E6E6: F244 300F MOVW R0, #0x430F ; 0x3419430F = .rodata..L.str.50 0x3418E6EA: F2C3 4019 MOVT R0, #0x3419 ; 0x3419430F = .rodata..L.str.50 0x3418E6EE: F44F 71C2 MOV.W R1, #0x0184 0x3418E6F2: F7FF FAD1 BL assert_failed ; 0x3418DC98
.L7: 0x3418E6F6: 981D LDR R0, [SP, #116] 0x3418E6F8: F5B0 1F00 CMP.W R0, #0x200000 0x3418E6FC: D02A BEQ 46L11 ; 0x3418E754 0x3418E6FE: 981E LDR R0, [SP, #120] 0x3418E700: F1B0 5F00 CMP.W R0, #0x20000000 0x3418E704: D026 BEQ 46L11 ; 0x3418E754 0x3418E706: 981C LDR R0, [SP, #112] 0x3418E708: F1B0 5F00 CMP.W R0, #0x20000000 0x3418E70C: D105 BNE 46L8 ; 0x3418E71A 0x3418E70E: 9818 LDR R0, [SP, #96] 0x3418E710: F400 7080 AND R0, R0, #0x0100 0x3418E714: F5B0 7F80 CMP.W R0, #0x0100 0x3418E718: D01C BEQ 46L11 ; 0x3418E754
.L8: 0x3418E71A: 981B LDR R0, [SP, #108] 0x3418E71C: F1B0 5F00 CMP.W R0, #0x20000000 0x3418E720: D105 BNE 46L9 ; 0x3418E72E 0x3418E722: 9818 LDR R0, [SP, #96] 0x3418E724: F400 7000 AND R0, R0, #0x0200 0x3418E728: F5B0 7F00 CMP.W R0, #0x0200 0x3418E72C: D012 BEQ 46L11 ; 0x3418E754
.L9: 0x3418E72E: 981A LDR R0, [SP, #104] 0x3418E730: F1B0 5F00 CMP.W R0, #0x20000000 0x3418E734: D105 BNE 46L10 ; 0x3418E742 0x3418E736: 9818 LDR R0, [SP, #96] 0x3418E738: F400 6080 AND R0, R0, #0x0400 0x3418E73C: F5B0 6F80 CMP.W R0, #0x0400 0x3418E740: D008 BEQ 46L11 ; 0x3418E754
.L10: 0x3418E742: 9819 LDR R0, [SP, #100] 0x3418E744: F1B0 5F00 CMP.W R0, #0x20000000 0x3418E748: D12E BNE 46L18 ; 0x3418E7A8 0x3418E74A: F89D 0061 LDRB.W R0, [SP, #97] 0x3418E74E: 0700 LSLS R0, R0, #28 0x3418E750: 2800 CMP R0, #0 0x3418E752: D529 BPL 46L18 ; 0x3418E7A8
.L11: 0x3418E754: 9820 LDR R0, [SP, #128] 0x3418E756: 6840 LDR R0, [R0, #4] 0x3418E758: B920 CBNZ R0, .L12 ; 0x3418E764 0x3418E75A: 2001 MOVS R0, #1 0x3418E75C: F88D 0087 STRB.W R0, [SP, #135] 0x3418E760: F000 BCD3 B.W 46L144 ; 0x3418F10A
.L12: 0x3418E764: F7F3 F946 BL HAL_GetTick ; 0x341819F4 0x3418E768: 901F STR R0, [SP, #124]
.L13: 0x3418E76A: F248 0004 MOVW R0, #0x8004 0x3418E76E: F2C5 6002 MOVT R0, #0x5602 0x3418E772: 6800 LDR R0, [R0] 0x3418E774: 06C0 LSLS R0, R0, #27 0x3418E776: 2800 CMP R0, #0 0x3418E778: D40B BMI 46L15 ; 0x3418E792 0x3418E77A: F7F3 F93B BL HAL_GetTick ; 0x341819F4 0x3418E77E: 991F LDR R1, [SP, #124] 0x3418E780: 1A40 SUBS R0, R0, R1 0x3418E782: 2865 CMP R0, #101 0x3418E784: D304 BCC 46L14 ; 0x3418E790 0x3418E786: 2003 MOVS R0, #3 0x3418E788: F88D 0087 STRB.W R0, [SP, #135] 0x3418E78C: F000 BCBD B.W 46L144 ; 0x3418F10A
.L14: 0x3418E790: E7EB B 46L13 ; 0x3418E76A
.L15: 0x3418E792: F7F3 F92F BL HAL_GetTick ; 0x341819F4 0x3418E796: 901F STR R0, [SP, #124]
.L16: 0x3418E798: F7F3 F92C BL HAL_GetTick ; 0x341819F4 0x3418E79C: 991F LDR R1, [SP, #124] 0x3418E79E: 1A40 SUBS R0, R0, R1 0x3418E7A0: 2801 CMP R0, #1 0x3418E7A2: D800 BHI 46L17 ; 0x3418E7A6 0x3418E7A4: E7F8 B 46L16 ; 0x3418E798
.L17: 0x3418E7A6: E089 B 46L29 ; 0x3418E8BC
.L18: 0x3418E7A8: 9820 LDR R0, [SP, #128] 0x3418E7AA: 6840 LDR R0, [R0, #4] 0x3418E7AC: 2810 CMP R0, #16 0x3418E7AE: D106 BNE 46L19 ; 0x3418E7BE 0x3418E7B0: F648 0100 MOVW R1, #0x8800 0x3418E7B4: F2C5 6102 MOVT R1, #0x5602 0x3418E7B8: 2010 MOVS R0, #16 0x3418E7BA: 6008 STR R0, [R1] 0x3418E7BC: E04F B 46L23 ; 0x3418E85E
.L19: 0x3418E7BE: 9820 LDR R0, [SP, #128] 0x3418E7C0: 6840 LDR R0, [R0, #4] 0x3418E7C2: B970 CBNZ R0, .L20 ; 0x3418E7E2 0x3418E7C4: F249 0100 MOVW R1, #0x9000 0x3418E7C8: F2C5 6102 MOVT R1, #0x5602 0x3418E7CC: 2010 MOVS R0, #16 0x3418E7CE: 6008 STR R0, [R1] 0x3418E7D0: F248 0154 MOVW R1, #0x8054 0x3418E7D4: F2C5 6102 MOVT R1, #0x5602 0x3418E7D8: 6808 LDR R0, [R1] 0x3418E7DA: F420 30C0 BIC R0, R0, #0x018000 0x3418E7DE: 6008 STR R0, [R1] 0x3418E7E0: E03D B 46L23 ; 0x3418E85E
.L20: 0x3418E7E2: 9820 LDR R0, [SP, #128] 0x3418E7E4: 6840 LDR R0, [R0, #4] 0x3418E7E6: F248 0110 MOVW R1, #0x8010 0x3418E7EA: 4288 CMP R0, R1 0x3418E7EC: D112 BNE 46L21 ; 0x3418E814 0x3418E7EE: F248 0154 MOVW R1, #0x8054 0x3418E7F2: F2C5 6102 MOVT R1, #0x5602 0x3418E7F6: 6808 LDR R0, [R1] 0x3418E7F8: F440 4000 ORR R0, R0, #0x8000 0x3418E7FC: 6008 STR R0, [R1] 0x3418E7FE: 6808 LDR R0, [R1] 0x3418E800: F420 3080 BIC R0, R0, #0x010000 0x3418E804: 6008 STR R0, [R1] 0x3418E806: F648 0100 MOVW R1, #0x8800 0x3418E80A: F2C5 6102 MOVT R1, #0x5602 0x3418E80E: 2010 MOVS R0, #16 0x3418E810: 6008 STR R0, [R1] 0x3418E812: E024 B 46L23 ; 0x3418E85E
.L21: 0x3418E814: 9820 LDR R0, [SP, #128] 0x3418E816: 6840 LDR R0, [R0, #4] 0x3418E818: F248 0110 MOVW R1, #0x8010 0x3418E81C: F2C0 0101 MOVT R1, #1 0x3418E820: 4288 CMP R0, R1 0x3418E822: D10E BNE 46L22 ; 0x3418E842 0x3418E824: F248 0154 MOVW R1, #0x8054 0x3418E828: F2C5 6102 MOVT R1, #0x5602 0x3418E82C: 6808 LDR R0, [R1] 0x3418E82E: F440 30C0 ORR R0, R0, #0x018000 0x3418E832: 6008 STR R0, [R1] 0x3418E834: F648 0100 MOVW R1, #0x8800 0x3418E838: F2C5 6102 MOVT R1, #0x5602 0x3418E83C: 2010 MOVS R0, #16 0x3418E83E: 6008 STR R0, [R1] 0x3418E840: E00D B 46L23 ; 0x3418E85E
.L22: 0x3418E842: F249 0100 MOVW R1, #0x9000 0x3418E846: F2C5 6102 MOVT R1, #0x5602 0x3418E84A: 2010 MOVS R0, #16 0x3418E84C: 6008 STR R0, [R1] 0x3418E84E: F248 0154 MOVW R1, #0x8054 0x3418E852: F2C5 6102 MOVT R1, #0x5602 0x3418E856: 6808 LDR R0, [R1] 0x3418E858: F420 30C0 BIC R0, R0, #0x018000 0x3418E85C: 6008 STR R0, [R1]
.L23: 0x3418E85E: F7F3 F8C9 BL HAL_GetTick ; 0x341819F4 0x3418E862: 901F STR R0, [SP, #124] 0x3418E864: 9820 LDR R0, [SP, #128] 0x3418E866: 6840 LDR R0, [R0, #4] 0x3418E868: B1A0 CBZ R0, .L27 ; 0x3418E894
.L24: 0x3418E86A: F248 0004 MOVW R0, #0x8004 0x3418E86E: F2C5 6002 MOVT R0, #0x5602 0x3418E872: 6800 LDR R0, [R0] 0x3418E874: 06C0 LSLS R0, R0, #27 0x3418E876: 2800 CMP R0, #0 0x3418E878: D40B BMI 46L26 ; 0x3418E892 0x3418E87A: F7F3 F8BB BL HAL_GetTick ; 0x341819F4 0x3418E87E: 991F LDR R1, [SP, #124] 0x3418E880: 1A40 SUBS R0, R0, R1 0x3418E882: 2865 CMP R0, #101 0x3418E884: D304 BCC 46L25 ; 0x3418E890 0x3418E886: 2003 MOVS R0, #3 0x3418E888: F88D 0087 STRB.W R0, [SP, #135] 0x3418E88C: F000 BC3D B.W 46L144 ; 0x3418F10A
.L25: 0x3418E890: E7EB B 46L24 ; 0x3418E86A
.L26: 0x3418E892: E013 B 46L29 ; 0x3418E8BC
.L27: 0x3418E894: F248 0004 MOVW R0, #0x8004 0x3418E898: F2C5 6002 MOVT R0, #0x5602 0x3418E89C: 6800 LDR R0, [R0] 0x3418E89E: 06C0 LSLS R0, R0, #27 0x3418E8A0: 2800 CMP R0, #0 0x3418E8A2: D50B BPL 46L29 ; 0x3418E8BC 0x3418E8A4: F7F3 F8A6 BL HAL_GetTick ; 0x341819F4 0x3418E8A8: 991F LDR R1, [SP, #124] 0x3418E8AA: 1A40 SUBS R0, R0, R1 0x3418E8AC: 2865 CMP R0, #101 0x3418E8AE: D304 BCC 46L28 ; 0x3418E8BA 0x3418E8B0: 2003 MOVS R0, #3 0x3418E8B2: F88D 0087 STRB.W R0, [SP, #135] 0x3418E8B6: F000 BC28 B.W 46L144 ; 0x3418F10A
.L28: 0x3418E8BA: E7EB B 46L27 ; 0x3418E894
.L29: 0x3418E8BC: 9820 LDR R0, [SP, #128] 0x3418E8BE: 7800 LDRB R0, [R0] 0x3418E8C0: 0780 LSLS R0, R0, #30 0x3418E8C2: 2800 CMP R0, #0 0x3418E8C4: F140 80C4 BPL.W 46L55 ; 0x3418EA50 0x3418E8C8: 9820 LDR R0, [SP, #128] 0x3418E8CA: 68C0 LDR R0, [R0, #12] 0x3418E8CC: B118 CBZ R0, .L30 ; 0x3418E8D6 0x3418E8CE: 9820 LDR R0, [SP, #128] 0x3418E8D0: 68C0 LDR R0, [R0, #12] 0x3418E8D2: 2808 CMP R0, #8 0x3418E8D4: D100 BNE 46L31 ; 0x3418E8D8
.L30: 0x3418E8D6: E007 B 46L32 ; 0x3418E8E8
.L31: 0x3418E8D8: F244 300F MOVW R0, #0x430F ; 0x3419430F = .rodata..L.str.50 0x3418E8DC: F2C3 4019 MOVT R0, #0x3419 ; 0x3419430F = .rodata..L.str.50 0x3418E8E0: F240 11CD MOVW R1, #0x01CD 0x3418E8E4: F7FF F9D8 BL assert_failed ; 0x3418DC98
.L32: 0x3418E8E8: 981D LDR R0, [SP, #116] 0x3418E8EA: B300 CBZ R0, .L36 ; 0x3418E92E 0x3418E8EC: 981E LDR R0, [SP, #120] 0x3418E8EE: B1F0 CBZ R0, .L36 ; 0x3418E92E 0x3418E8F0: 981C LDR R0, [SP, #112] 0x3418E8F2: B928 CBNZ R0, .L33 ; 0x3418E900 0x3418E8F4: 9818 LDR R0, [SP, #96] 0x3418E8F6: F400 7080 AND R0, R0, #0x0100 0x3418E8FA: F5B0 7F80 CMP.W R0, #0x0100 0x3418E8FE: D016 BEQ 46L36 ; 0x3418E92E
.L33: 0x3418E900: 981B LDR R0, [SP, #108] 0x3418E902: B928 CBNZ R0, .L34 ; 0x3418E910 0x3418E904: 9818 LDR R0, [SP, #96] 0x3418E906: F400 7000 AND R0, R0, #0x0200 0x3418E90A: F5B0 7F00 CMP.W R0, #0x0200 0x3418E90E: D00E BEQ 46L36 ; 0x3418E92E
.L34: 0x3418E910: 981A LDR R0, [SP, #104] 0x3418E912: B928 CBNZ R0, .L35 ; 0x3418E920 0x3418E914: 9818 LDR R0, [SP, #96] 0x3418E916: F400 6080 AND R0, R0, #0x0400 0x3418E91A: F5B0 6F80 CMP.W R0, #0x0400 0x3418E91E: D006 BEQ 46L36 ; 0x3418E92E
.L35: 0x3418E920: 9819 LDR R0, [SP, #100] 0x3418E922: BBD8 CBNZ R0, .L43 ; 0x3418E99C 0x3418E924: F89D 0061 LDRB.W R0, [SP, #97] 0x3418E928: 0700 LSLS R0, R0, #28 0x3418E92A: 2800 CMP R0, #0 0x3418E92C: D536 BPL 46L43 ; 0x3418E99C
.L36: 0x3418E92E: 9820 LDR R0, [SP, #128] 0x3418E930: 68C0 LDR R0, [R0, #12] 0x3418E932: B918 CBNZ R0, .L37 ; 0x3418E93C 0x3418E934: 2001 MOVS R0, #1 0x3418E936: F88D 0087 STRB.W R0, [SP, #135] 0x3418E93A: E3E6 B 46L144 ; 0x3418F10A
.L37: 0x3418E93C: 9820 LDR R0, [SP, #128] 0x3418E93E: 6900 LDR R0, [R0, #16] 0x3418E940: B168 CBZ R0, .L38 ; 0x3418E95E 0x3418E942: 9820 LDR R0, [SP, #128] 0x3418E944: 6900 LDR R0, [R0, #16] 0x3418E946: 2880 CMP R0, #128 0x3418E948: D009 BEQ 46L38 ; 0x3418E95E 0x3418E94A: 9820 LDR R0, [SP, #128] 0x3418E94C: 6900 LDR R0, [R0, #16] 0x3418E94E: F5B0 7F80 CMP.W R0, #0x0100 0x3418E952: D004 BEQ 46L38 ; 0x3418E95E 0x3418E954: 9820 LDR R0, [SP, #128] 0x3418E956: 6900 LDR R0, [R0, #16] 0x3418E958: F5B0 7FC0 CMP.W R0, #0x0180 0x3418E95C: D100 BNE 46L39 ; 0x3418E960
.L38: 0x3418E95E: E007 B 46L40 ; 0x3418E970
.L39: 0x3418E960: F244 300F MOVW R0, #0x430F ; 0x3419430F = .rodata..L.str.50 0x3418E964: F2C3 4019 MOVT R0, #0x3419 ; 0x3419430F = .rodata..L.str.50 0x3418E968: F240 11DF MOVW R1, #0x01DF 0x3418E96C: F7FF F994 BL assert_failed ; 0x3418DC98
.L40: 0x3418E970: 9820 LDR R0, [SP, #128] 0x3418E972: 6940 LDR R0, [R0, #20] 0x3418E974: 287F CMP R0, #127 0x3418E976: D800 BHI 46L41 ; 0x3418E97A 0x3418E978: E007 B 46L42 ; 0x3418E98A
.L41: 0x3418E97A: F244 300F MOVW R0, #0x430F ; 0x3419430F = .rodata..L.str.50 0x3418E97E: F2C3 4019 MOVT R0, #0x3419 ; 0x3419430F = .rodata..L.str.50 0x3418E982: F44F 71F0 MOV.W R1, #0x01E0 0x3418E986: F7FF F987 BL assert_failed ; 0x3418DC98
.L42: 0x3418E98A: 9820 LDR R0, [SP, #128] 0x3418E98C: 6900 LDR R0, [R0, #16] 0x3418E98E: F7F3 FD67 BL LL_RCC_HSI_SetDivider ; 0x34182460 0x3418E992: 9820 LDR R0, [SP, #128] 0x3418E994: 6940 LDR R0, [R0, #20] 0x3418E996: F000 FBBD BL LL_RCC_HSI_SetCalibTrimming ; 0x3418F114 0x3418E99A: E059 B 46L55 ; 0x3418EA50
.L43: 0x3418E99C: 9820 LDR R0, [SP, #128] 0x3418E99E: 68C0 LDR R0, [R0, #12] 0x3418E9A0: 2800 CMP R0, #0 0x3418E9A2: D042 BEQ 46L52 ; 0x3418EA2A 0x3418E9A4: 9820 LDR R0, [SP, #128] 0x3418E9A6: 6900 LDR R0, [R0, #16] 0x3418E9A8: B168 CBZ R0, .L44 ; 0x3418E9C6 0x3418E9AA: 9820 LDR R0, [SP, #128] 0x3418E9AC: 6900 LDR R0, [R0, #16] 0x3418E9AE: 2880 CMP R0, #128 0x3418E9B0: D009 BEQ 46L44 ; 0x3418E9C6 0x3418E9B2: 9820 LDR R0, [SP, #128] 0x3418E9B4: 6900 LDR R0, [R0, #16] 0x3418E9B6: F5B0 7F80 CMP.W R0, #0x0100 0x3418E9BA: D004 BEQ 46L44 ; 0x3418E9C6 0x3418E9BC: 9820 LDR R0, [SP, #128] 0x3418E9BE: 6900 LDR R0, [R0, #16] 0x3418E9C0: F5B0 7FC0 CMP.W R0, #0x0180 0x3418E9C4: D100 BNE 46L45 ; 0x3418E9C8
.L44: 0x3418E9C6: E007 B 46L46 ; 0x3418E9D8
.L45: 0x3418E9C8: F244 300F MOVW R0, #0x430F ; 0x3419430F = .rodata..L.str.50 0x3418E9CC: F2C3 4019 MOVT R0, #0x3419 ; 0x3419430F = .rodata..L.str.50 0x3418E9D0: F44F 71F7 MOV.W R1, #0x01EE 0x3418E9D4: F7FF F960 BL assert_failed ; 0x3418DC98
.L46: 0x3418E9D8: 9820 LDR R0, [SP, #128] 0x3418E9DA: 6940 LDR R0, [R0, #20] 0x3418E9DC: 287F CMP R0, #127 0x3418E9DE: D800 BHI 46L47 ; 0x3418E9E2 0x3418E9E0: E007 B 46L48 ; 0x3418E9F2
.L47: 0x3418E9E2: F244 300F MOVW R0, #0x430F ; 0x3419430F = .rodata..L.str.50 0x3418E9E6: F2C3 4019 MOVT R0, #0x3419 ; 0x3419430F = .rodata..L.str.50 0x3418E9EA: F240 11EF MOVW R1, #0x01EF 0x3418E9EE: F7FF F953 BL assert_failed ; 0x3418DC98
.L48: 0x3418E9F2: F7FF FE09 BL LL_RCC_HSI_Enable ; 0x3418E608 0x3418E9F6: F7F2 FFFD BL HAL_GetTick ; 0x341819F4 0x3418E9FA: 901F STR R0, [SP, #124]
.L49: 0x3418E9FC: F7F3 FD3E BL LL_RCC_HSI_IsReady ; 0x3418247C 0x3418EA00: B950 CBNZ R0, .L51 ; 0x3418EA18 0x3418EA02: F7F2 FFF7 BL HAL_GetTick ; 0x341819F4 0x3418EA06: 991F LDR R1, [SP, #124] 0x3418EA08: 1A40 SUBS R0, R0, R1 0x3418EA0A: 2802 CMP R0, #2 0x3418EA0C: D303 BCC 46L50 ; 0x3418EA16 0x3418EA0E: 2003 MOVS R0, #3 0x3418EA10: F88D 0087 STRB.W R0, [SP, #135] 0x3418EA14: E379 B 46L144 ; 0x3418F10A
.L50: 0x3418EA16: E7F1 B 46L49 ; 0x3418E9FC
.L51: 0x3418EA18: 9820 LDR R0, [SP, #128] 0x3418EA1A: 6900 LDR R0, [R0, #16] 0x3418EA1C: F7F3 FD20 BL LL_RCC_HSI_SetDivider ; 0x34182460 0x3418EA20: 9820 LDR R0, [SP, #128] 0x3418EA22: 6940 LDR R0, [R0, #20] 0x3418EA24: F000 FB76 BL LL_RCC_HSI_SetCalibTrimming ; 0x3418F114 0x3418EA28: E012 B 46L55 ; 0x3418EA50
.L52: 0x3418EA2A: F000 FB83 BL LL_RCC_HSI_Disable ; 0x3418F134 0x3418EA2E: F7F2 FFE1 BL HAL_GetTick ; 0x341819F4 0x3418EA32: 901F STR R0, [SP, #124]
.L53: 0x3418EA34: F7F3 FD22 BL LL_RCC_HSI_IsReady ; 0x3418247C 0x3418EA38: B150 CBZ R0, .L55 ; 0x3418EA50 0x3418EA3A: F7F2 FFDB BL HAL_GetTick ; 0x341819F4 0x3418EA3E: 991F LDR R1, [SP, #124] 0x3418EA40: 1A40 SUBS R0, R0, R1 0x3418EA42: 2802 CMP R0, #2 0x3418EA44: D303 BCC 46L54 ; 0x3418EA4E 0x3418EA46: 2003 MOVS R0, #3 0x3418EA48: F88D 0087 STRB.W R0, [SP, #135] 0x3418EA4C: E35D B 46L144 ; 0x3418F10A
.L54: 0x3418EA4E: E7F1 B 46L53 ; 0x3418EA34
.L55: 0x3418EA50: 9820 LDR R0, [SP, #128] 0x3418EA52: 7800 LDRB R0, [R0] 0x3418EA54: 06C0 LSLS R0, R0, #27 0x3418EA56: 2800 CMP R0, #0 0x3418EA58: F140 80A8 BPL.W 46L78 ; 0x3418EBAC 0x3418EA5C: 9820 LDR R0, [SP, #128] 0x3418EA5E: 69C0 LDR R0, [R0, #28] 0x3418EA60: B118 CBZ R0, .L56 ; 0x3418EA6A 0x3418EA62: 9820 LDR R0, [SP, #128] 0x3418EA64: 69C0 LDR R0, [R0, #28] 0x3418EA66: 2804 CMP R0, #4 0x3418EA68: D100 BNE 46L57 ; 0x3418EA6C
.L56: 0x3418EA6A: E007 B 46L58 ; 0x3418EA7C
.L57: 0x3418EA6C: F244 300F MOVW R0, #0x430F ; 0x3419430F = .rodata..L.str.50 0x3418EA70: F2C3 4019 MOVT R0, #0x3419 ; 0x3419430F = .rodata..L.str.50 0x3418EA74: F240 211D MOVW R1, #0x021D 0x3418EA78: F7FF F90E BL assert_failed ; 0x3418DC98
.L58: 0x3418EA7C: 981D LDR R0, [SP, #116] 0x3418EA7E: F5B0 1F80 CMP.W R0, #0x100000 0x3418EA82: D02A BEQ 46L62 ; 0x3418EADA 0x3418EA84: 981E LDR R0, [SP, #120] 0x3418EA86: F1B0 5F80 CMP.W R0, #0x10000000 0x3418EA8A: D026 BEQ 46L62 ; 0x3418EADA 0x3418EA8C: 981C LDR R0, [SP, #112] 0x3418EA8E: F1B0 5F80 CMP.W R0, #0x10000000 0x3418EA92: D105 BNE 46L59 ; 0x3418EAA0 0x3418EA94: 9818 LDR R0, [SP, #96] 0x3418EA96: F400 7080 AND R0, R0, #0x0100 0x3418EA9A: F5B0 7F80 CMP.W R0, #0x0100 0x3418EA9E: D01C BEQ 46L62 ; 0x3418EADA
.L59: 0x3418EAA0: 981B LDR R0, [SP, #108] 0x3418EAA2: F1B0 5F80 CMP.W R0, #0x10000000 0x3418EAA6: D105 BNE 46L60 ; 0x3418EAB4 0x3418EAA8: 9818 LDR R0, [SP, #96] 0x3418EAAA: F400 7000 AND R0, R0, #0x0200 0x3418EAAE: F5B0 7F00 CMP.W R0, #0x0200 0x3418EAB2: D012 BEQ 46L62 ; 0x3418EADA
.L60: 0x3418EAB4: 981A LDR R0, [SP, #104] 0x3418EAB6: F1B0 5F80 CMP.W R0, #0x10000000 0x3418EABA: D105 BNE 46L61 ; 0x3418EAC8 0x3418EABC: 9818 LDR R0, [SP, #96] 0x3418EABE: F400 6080 AND R0, R0, #0x0400 0x3418EAC2: F5B0 6F80 CMP.W R0, #0x0400 0x3418EAC6: D008 BEQ 46L62 ; 0x3418EADA
.L61: 0x3418EAC8: 9819 LDR R0, [SP, #100] 0x3418EACA: F1B0 5F80 CMP.W R0, #0x10000000 0x3418EACE: D11D BNE 46L66 ; 0x3418EB0C 0x3418EAD0: F89D 0061 LDRB.W R0, [SP, #97] 0x3418EAD4: 0700 LSLS R0, R0, #28 0x3418EAD6: 2800 CMP R0, #0 0x3418EAD8: D518 BPL 46L66 ; 0x3418EB0C
.L62: 0x3418EADA: 9820 LDR R0, [SP, #128] 0x3418EADC: 69C0 LDR R0, [R0, #28] 0x3418EADE: B918 CBNZ R0, .L63 ; 0x3418EAE8 0x3418EAE0: 2001 MOVS R0, #1 0x3418EAE2: F88D 0087 STRB.W R0, [SP, #135] 0x3418EAE6: E310 B 46L144 ; 0x3418F10A
.L63: 0x3418EAE8: 9820 LDR R0, [SP, #128] 0x3418EAEA: 6A40 LDR R0, [R0, #36] 0x3418EAEC: 281F CMP R0, #31 0x3418EAEE: D800 BHI 46L64 ; 0x3418EAF2 0x3418EAF0: E007 B 46L65 ; 0x3418EB02
.L64: 0x3418EAF2: F244 300F MOVW R0, #0x430F ; 0x3419430F = .rodata..L.str.50 0x3418EAF6: F2C3 4019 MOVT R0, #0x3419 ; 0x3419430F = .rodata..L.str.50 0x3418EAFA: F44F 710C MOV.W R1, #0x0230 0x3418EAFE: F7FF F8CB BL assert_failed ; 0x3418DC98
.L65: 0x3418EB02: 9820 LDR R0, [SP, #128] 0x3418EB04: 6A40 LDR R0, [R0, #36] 0x3418EB06: F000 FB1D BL LL_RCC_MSI_SetCalibTrimming ; 0x3418F144 0x3418EB0A: E04F B 46L78 ; 0x3418EBAC
.L66: 0x3418EB0C: 9820 LDR R0, [SP, #128] 0x3418EB0E: 69C0 LDR R0, [R0, #28] 0x3418EB10: B3C8 CBZ R0, .L75 ; 0x3418EB86 0x3418EB12: 9820 LDR R0, [SP, #128] 0x3418EB14: 6A00 LDR R0, [R0, #32] 0x3418EB16: B120 CBZ R0, .L67 ; 0x3418EB22 0x3418EB18: 9820 LDR R0, [SP, #128] 0x3418EB1A: 6A00 LDR R0, [R0, #32] 0x3418EB1C: F5B0 7F00 CMP.W R0, #0x0200 0x3418EB20: D100 BNE 46L68 ; 0x3418EB24
.L67: 0x3418EB22: E007 B 46L69 ; 0x3418EB34
.L68: 0x3418EB24: F244 300F MOVW R0, #0x430F ; 0x3419430F = .rodata..L.str.50 0x3418EB28: F2C3 4019 MOVT R0, #0x3419 ; 0x3419430F = .rodata..L.str.50 0x3418EB2C: F44F 710F MOV.W R1, #0x023C 0x3418EB30: F7FF F8B2 BL assert_failed ; 0x3418DC98
.L69: 0x3418EB34: 9820 LDR R0, [SP, #128] 0x3418EB36: 6A40 LDR R0, [R0, #36] 0x3418EB38: 281F CMP R0, #31 0x3418EB3A: D800 BHI 46L70 ; 0x3418EB3E 0x3418EB3C: E007 B 46L71 ; 0x3418EB4E
.L70: 0x3418EB3E: F244 300F MOVW R0, #0x430F ; 0x3419430F = .rodata..L.str.50 0x3418EB42: F2C3 4019 MOVT R0, #0x3419 ; 0x3419430F = .rodata..L.str.50 0x3418EB46: F240 213D MOVW R1, #0x023D 0x3418EB4A: F7FF F8A5 BL assert_failed ; 0x3418DC98
.L71: 0x3418EB4E: 9820 LDR R0, [SP, #128] 0x3418EB50: 6A00 LDR R0, [R0, #32] 0x3418EB52: F7F3 FCCB BL LL_RCC_MSI_SetFrequency ; 0x341824EC 0x3418EB56: F000 FB05 BL LL_RCC_MSI_Enable ; 0x3418F164 0x3418EB5A: F7F2 FF4B BL HAL_GetTick ; 0x341819F4 0x3418EB5E: 901F STR R0, [SP, #124]
.L72: 0x3418EB60: F7F3 FCD2 BL LL_RCC_MSI_IsReady ; 0x34182508 0x3418EB64: B950 CBNZ R0, .L74 ; 0x3418EB7C 0x3418EB66: F7F2 FF45 BL HAL_GetTick ; 0x341819F4 0x3418EB6A: 991F LDR R1, [SP, #124] 0x3418EB6C: 1A40 SUBS R0, R0, R1 0x3418EB6E: 2802 CMP R0, #2 0x3418EB70: D303 BCC 46L73 ; 0x3418EB7A 0x3418EB72: 2003 MOVS R0, #3 0x3418EB74: F88D 0087 STRB.W R0, [SP, #135] 0x3418EB78: E2C7 B 46L144 ; 0x3418F10A
.L73: 0x3418EB7A: E7F1 B 46L72 ; 0x3418EB60
.L74: 0x3418EB7C: 9820 LDR R0, [SP, #128] 0x3418EB7E: 6A40 LDR R0, [R0, #36] 0x3418EB80: F000 FAE0 BL LL_RCC_MSI_SetCalibTrimming ; 0x3418F144 0x3418EB84: E012 B 46L78 ; 0x3418EBAC
.L75: 0x3418EB86: F000 FAF5 BL LL_RCC_MSI_Disable ; 0x3418F174 0x3418EB8A: F7F2 FF33 BL HAL_GetTick ; 0x341819F4 0x3418EB8E: 901F STR R0, [SP, #124]
.L76: 0x3418EB90: F7F3 FCBA BL LL_RCC_MSI_IsReady ; 0x34182508 0x3418EB94: B150 CBZ R0, .L78 ; 0x3418EBAC 0x3418EB96: F7F2 FF2D BL HAL_GetTick ; 0x341819F4 0x3418EB9A: 991F LDR R1, [SP, #124] 0x3418EB9C: 1A40 SUBS R0, R0, R1 0x3418EB9E: 2802 CMP R0, #2 0x3418EBA0: D303 BCC 46L77 ; 0x3418EBAA 0x3418EBA2: 2003 MOVS R0, #3 0x3418EBA4: F88D 0087 STRB.W R0, [SP, #135] 0x3418EBA8: E2AF B 46L144 ; 0x3418F10A
.L77: 0x3418EBAA: E7F1 B 46L76 ; 0x3418EB90
.L78: 0x3418EBAC: 9820 LDR R0, [SP, #128] 0x3418EBAE: 7800 LDRB R0, [R0] 0x3418EBB0: 0700 LSLS R0, R0, #28 0x3418EBB2: 2800 CMP R0, #0 0x3418EBB4: D539 BPL 46L88 ; 0x3418EC2A 0x3418EBB6: 9820 LDR R0, [SP, #128] 0x3418EBB8: 6980 LDR R0, [R0, #24] 0x3418EBBA: B118 CBZ R0, .L79 ; 0x3418EBC4 0x3418EBBC: 9820 LDR R0, [SP, #128] 0x3418EBBE: 6980 LDR R0, [R0, #24] 0x3418EBC0: 2801 CMP R0, #1 0x3418EBC2: D100 BNE 46L80 ; 0x3418EBC6
.L79: 0x3418EBC4: E007 B 46L81 ; 0x3418EBD6
.L80: 0x3418EBC6: F244 300F MOVW R0, #0x430F ; 0x3419430F = .rodata..L.str.50 0x3418EBCA: F2C3 4019 MOVT R0, #0x3419 ; 0x3419430F = .rodata..L.str.50 0x3418EBCE: F240 216D MOVW R1, #0x026D 0x3418EBD2: F7FF F861 BL assert_failed ; 0x3418DC98
.L81: 0x3418EBD6: 9820 LDR R0, [SP, #128] 0x3418EBD8: 6980 LDR R0, [R0, #24] 0x3418EBDA: B198 CBZ R0, .L85 ; 0x3418EC04 0x3418EBDC: F000 FAD2 BL LL_RCC_LSI_Enable ; 0x3418F184 0x3418EBE0: F7F2 FF08 BL HAL_GetTick ; 0x341819F4 0x3418EBE4: 901F STR R0, [SP, #124]
.L82: 0x3418EBE6: F7F3 FC97 BL LL_RCC_LSI_IsReady ; 0x34182518 0x3418EBEA: B950 CBNZ R0, .L84 ; 0x3418EC02 0x3418EBEC: F7F2 FF02 BL HAL_GetTick ; 0x341819F4 0x3418EBF0: 991F LDR R1, [SP, #124] 0x3418EBF2: 1A40 SUBS R0, R0, R1 0x3418EBF4: 2802 CMP R0, #2 0x3418EBF6: D303 BCC 46L83 ; 0x3418EC00 0x3418EBF8: 2003 MOVS R0, #3 0x3418EBFA: F88D 0087 STRB.W R0, [SP, #135] 0x3418EBFE: E284 B 46L144 ; 0x3418F10A
.L83: 0x3418EC00: E7F1 B 46L82 ; 0x3418EBE6
.L84: 0x3418EC02: E012 B 46L88 ; 0x3418EC2A
.L85: 0x3418EC04: F000 FAC6 BL LL_RCC_LSI_Disable ; 0x3418F194 0x3418EC08: F7F2 FEF4 BL HAL_GetTick ; 0x341819F4 0x3418EC0C: 901F STR R0, [SP, #124]
.L86: 0x3418EC0E: F7F3 FC83 BL LL_RCC_LSI_IsReady ; 0x34182518 0x3418EC12: B150 CBZ R0, .L88 ; 0x3418EC2A 0x3418EC14: F7F2 FEEE BL HAL_GetTick ; 0x341819F4 0x3418EC18: 991F LDR R1, [SP, #124] 0x3418EC1A: 1A40 SUBS R0, R0, R1 0x3418EC1C: 2802 CMP R0, #2 0x3418EC1E: D303 BCC 46L87 ; 0x3418EC28 0x3418EC20: 2003 MOVS R0, #3 0x3418EC22: F88D 0087 STRB.W R0, [SP, #135] 0x3418EC26: E270 B 46L144 ; 0x3418F10A
.L87: 0x3418EC28: E7F1 B 46L86 ; 0x3418EC0E
.L88: 0x3418EC2A: 9820 LDR R0, [SP, #128] 0x3418EC2C: 7800 LDRB R0, [R0] 0x3418EC2E: 0740 LSLS R0, R0, #29 0x3418EC30: 2800 CMP R0, #0 0x3418EC32: F140 80AF BPL.W 46L103 ; 0x3418ED94 0x3418EC36: 9820 LDR R0, [SP, #128] 0x3418EC38: 6880 LDR R0, [R0, #8] 0x3418EC3A: B188 CBZ R0, .L89 ; 0x3418EC60 0x3418EC3C: 9820 LDR R0, [SP, #128] 0x3418EC3E: 6880 LDR R0, [R0, #8] 0x3418EC40: 2802 CMP R0, #2 0x3418EC42: D00D BEQ 46L89 ; 0x3418EC60 0x3418EC44: 9820 LDR R0, [SP, #128] 0x3418EC46: 6880 LDR R0, [R0, #8] 0x3418EC48: F248 0102 MOVW R1, #0x8002 0x3418EC4C: 4288 CMP R0, R1 0x3418EC4E: D007 BEQ 46L89 ; 0x3418EC60 0x3418EC50: 9820 LDR R0, [SP, #128] 0x3418EC52: 6880 LDR R0, [R0, #8] 0x3418EC54: F248 0102 MOVW R1, #0x8002 0x3418EC58: F2C0 0101 MOVT R1, #1 0x3418EC5C: 4288 CMP R0, R1 0x3418EC5E: D100 BNE 46L90 ; 0x3418EC62
.L89: 0x3418EC60: E007 B 46L91 ; 0x3418EC72
.L90: 0x3418EC62: F244 300F MOVW R0, #0x430F ; 0x3419430F = .rodata..L.str.50 0x3418EC66: F2C3 4019 MOVT R0, #0x3419 ; 0x3419430F = .rodata..L.str.50 0x3418EC6A: F44F 7126 MOV.W R1, #0x0298 0x3418EC6E: F7FF F813 BL assert_failed ; 0x3418DC98
.L91: 0x3418EC72: 9820 LDR R0, [SP, #128] 0x3418EC74: 6880 LDR R0, [R0, #8] 0x3418EC76: 2802 CMP R0, #2 0x3418EC78: D106 BNE 46L92 ; 0x3418EC88 0x3418EC7A: F648 0100 MOVW R1, #0x8800 0x3418EC7E: F2C5 6102 MOVT R1, #0x5602 0x3418EC82: 2002 MOVS R0, #2 0x3418EC84: 6008 STR R0, [R1] 0x3418EC86: E05B B 46L96 ; 0x3418ED40
.L92: 0x3418EC88: 9820 LDR R0, [SP, #128] 0x3418EC8A: 6880 LDR R0, [R0, #8] 0x3418EC8C: B990 CBNZ R0, .L93 ; 0x3418ECB4 0x3418EC8E: F249 0100 MOVW R1, #0x9000 0x3418EC92: F2C5 6102 MOVT R1, #0x5602 0x3418EC96: 2002 MOVS R0, #2 0x3418EC98: 6008 STR R0, [R1] 0x3418EC9A: F248 0140 MOVW R1, #0x8040 0x3418EC9E: F2C5 6102 MOVT R1, #0x5602 0x3418ECA2: 6808 LDR R0, [R1] 0x3418ECA4: F420 3080 BIC R0, R0, #0x010000 0x3418ECA8: 6008 STR R0, [R1] 0x3418ECAA: 6808 LDR R0, [R1] 0x3418ECAC: F420 4000 BIC R0, R0, #0x8000 0x3418ECB0: 6008 STR R0, [R1] 0x3418ECB2: E045 B 46L96 ; 0x3418ED40
.L93: 0x3418ECB4: 9820 LDR R0, [SP, #128] 0x3418ECB6: 6880 LDR R0, [R0, #8] 0x3418ECB8: F248 0102 MOVW R1, #0x8002 0x3418ECBC: 4288 CMP R0, R1 0x3418ECBE: D112 BNE 46L94 ; 0x3418ECE6 0x3418ECC0: F248 0140 MOVW R1, #0x8040 0x3418ECC4: F2C5 6102 MOVT R1, #0x5602 0x3418ECC8: 6808 LDR R0, [R1] 0x3418ECCA: F440 4000 ORR R0, R0, #0x8000 0x3418ECCE: 6008 STR R0, [R1] 0x3418ECD0: 6808 LDR R0, [R1] 0x3418ECD2: F420 3080 BIC R0, R0, #0x010000 0x3418ECD6: 6008 STR R0, [R1] 0x3418ECD8: F648 0100 MOVW R1, #0x8800 0x3418ECDC: F2C5 6102 MOVT R1, #0x5602 0x3418ECE0: 2002 MOVS R0, #2 0x3418ECE2: 6008 STR R0, [R1] 0x3418ECE4: E02C B 46L96 ; 0x3418ED40
.L94: 0x3418ECE6: 9820 LDR R0, [SP, #128] 0x3418ECE8: 6880 LDR R0, [R0, #8] 0x3418ECEA: F248 0102 MOVW R1, #0x8002 0x3418ECEE: F2C0 0101 MOVT R1, #1 0x3418ECF2: 4288 CMP R0, R1 0x3418ECF4: D112 BNE 46L95 ; 0x3418ED1C 0x3418ECF6: F248 0140 MOVW R1, #0x8040 0x3418ECFA: F2C5 6102 MOVT R1, #0x5602 0x3418ECFE: 6808 LDR R0, [R1] 0x3418ED00: F440 4000 ORR R0, R0, #0x8000 0x3418ED04: 6008 STR R0, [R1] 0x3418ED06: 6808 LDR R0, [R1] 0x3418ED08: F440 3080 ORR R0, R0, #0x010000 0x3418ED0C: 6008 STR R0, [R1] 0x3418ED0E: F648 0100 MOVW R1, #0x8800 0x3418ED12: F2C5 6102 MOVT R1, #0x5602 0x3418ED16: 2002 MOVS R0, #2 0x3418ED18: 6008 STR R0, [R1] 0x3418ED1A: E011 B 46L96 ; 0x3418ED40
.L95: 0x3418ED1C: F249 0100 MOVW R1, #0x9000 0x3418ED20: F2C5 6102 MOVT R1, #0x5602 0x3418ED24: 2002 MOVS R0, #2 0x3418ED26: 6008 STR R0, [R1] 0x3418ED28: F248 0140 MOVW R1, #0x8040 0x3418ED2C: F2C5 6102 MOVT R1, #0x5602 0x3418ED30: 6808 LDR R0, [R1] 0x3418ED32: F420 4000 BIC R0, R0, #0x8000 0x3418ED36: 6008 STR R0, [R1] 0x3418ED38: 6808 LDR R0, [R1] 0x3418ED3A: F420 3080 BIC R0, R0, #0x010000 0x3418ED3E: 6008 STR R0, [R1]
.L96: 0x3418ED40: 9820 LDR R0, [SP, #128] 0x3418ED42: 6880 LDR R0, [R0, #8] 0x3418ED44: B198 CBZ R0, .L100 ; 0x3418ED6E 0x3418ED46: F7F2 FE55 BL HAL_GetTick ; 0x341819F4 0x3418ED4A: 901F STR R0, [SP, #124]
.L97: 0x3418ED4C: F7F3 FBEC BL LL_RCC_LSE_IsReady ; 0x34182528 0x3418ED50: B960 CBNZ R0, .L99 ; 0x3418ED6C 0x3418ED52: F7F2 FE4F BL HAL_GetTick ; 0x341819F4 0x3418ED56: 991F LDR R1, [SP, #124] 0x3418ED58: 1A40 SUBS R0, R0, R1 0x3418ED5A: F241 3189 MOVW R1, #0x1389 0x3418ED5E: 4288 CMP R0, R1 0x3418ED60: D303 BCC 46L98 ; 0x3418ED6A 0x3418ED62: 2003 MOVS R0, #3 0x3418ED64: F88D 0087 STRB.W R0, [SP, #135] 0x3418ED68: E1CF B 46L144 ; 0x3418F10A
.L98: 0x3418ED6A: E7EF B 46L97 ; 0x3418ED4C
.L99: 0x3418ED6C: E012 B 46L103 ; 0x3418ED94
.L100: 0x3418ED6E: F7F2 FE41 BL HAL_GetTick ; 0x341819F4 0x3418ED72: 901F STR R0, [SP, #124]
.L101: 0x3418ED74: F7F3 FBD8 BL LL_RCC_LSE_IsReady ; 0x34182528 0x3418ED78: B160 CBZ R0, .L103 ; 0x3418ED94 0x3418ED7A: F7F2 FE3B BL HAL_GetTick ; 0x341819F4 0x3418ED7E: 991F LDR R1, [SP, #124] 0x3418ED80: 1A40 SUBS R0, R0, R1 0x3418ED82: F241 3189 MOVW R1, #0x1389 0x3418ED86: 4288 CMP R0, R1 0x3418ED88: D303 BCC 46L102 ; 0x3418ED92 0x3418ED8A: 2003 MOVS R0, #3 0x3418ED8C: F88D 0087 STRB.W R0, [SP, #135] 0x3418ED90: E1BB B 46L144 ; 0x3418F10A
.L102: 0x3418ED92: E7EF B 46L101 ; 0x3418ED74
.L103: 0x3418ED94: 9820 LDR R0, [SP, #128] 0x3418ED96: 6A80 LDR R0, [R0, #40] 0x3418ED98: B158 CBZ R0, .L104 ; 0x3418EDB2 0x3418ED9A: 9820 LDR R0, [SP, #128] 0x3418ED9C: 6A80 LDR R0, [R0, #40] 0x3418ED9E: 2801 CMP R0, #1 0x3418EDA0: D007 BEQ 46L104 ; 0x3418EDB2 0x3418EDA2: 9820 LDR R0, [SP, #128] 0x3418EDA4: 6A80 LDR R0, [R0, #40] 0x3418EDA6: 2802 CMP R0, #2 0x3418EDA8: D003 BEQ 46L104 ; 0x3418EDB2 0x3418EDAA: 9820 LDR R0, [SP, #128] 0x3418EDAC: 6A80 LDR R0, [R0, #40] 0x3418EDAE: 2803 CMP R0, #3 0x3418EDB0: D100 BNE 46L105 ; 0x3418EDB4
.L104: 0x3418EDB2: E007 B 46L106 ; 0x3418EDC4
.L105: 0x3418EDB4: F244 300F MOVW R0, #0x430F ; 0x3419430F = .rodata..L.str.50 0x3418EDB8: F2C3 4019 MOVT R0, #0x3419 ; 0x3419430F = .rodata..L.str.50 0x3418EDBC: F240 21BD MOVW R1, #0x02BD 0x3418EDC0: F7FE FF6A BL assert_failed ; 0x3418DC98
.L106: 0x3418EDC4: 9820 LDR R0, [SP, #128] 0x3418EDC6: 6A80 LDR R0, [R0, #40] 0x3418EDC8: 2800 CMP R0, #0 0x3418EDCA: D04B BEQ 46L113 ; 0x3418EE64 0x3418EDCC: 9820 LDR R0, [SP, #128] 0x3418EDCE: F100 0128 ADD.W R1, R0, #40 0x3418EDD2: 2000 MOVS R0, #0 0x3418EDD4: F000 F9E6 BL RCC_PLL_IsNewConfig ; 0x3418F1A4 0x3418EDD8: 9017 STR R0, [SP, #92] 0x3418EDDA: F7F3 FBAD BL LL_RCC_PLL1_IsReady ; 0x34182538 0x3418EDDE: 9016 STR R0, [SP, #88] 0x3418EDE0: 9817 LDR R0, [SP, #92] 0x3418EDE2: 2801 CMP R0, #1 0x3418EDE4: D12F BNE 46L111 ; 0x3418EE46 0x3418EDE6: F7F3 FBAF BL LL_RCC_IC1_GetSource ; 0x34182548 0x3418EDEA: 9015 STR R0, [SP, #84] 0x3418EDEC: F7F3 FBB4 BL LL_RCC_IC2_GetSource ; 0x34182558 0x3418EDF0: 9014 STR R0, [SP, #80] 0x3418EDF2: F7F3 FBB9 BL LL_RCC_IC6_GetSource ; 0x34182568 0x3418EDF6: 9013 STR R0, [SP, #76] 0x3418EDF8: F7F3 FBBE BL LL_RCC_IC11_GetSource ; 0x34182578 0x3418EDFC: 9012 STR R0, [SP, #72] 0x3418EDFE: 981D LDR R0, [SP, #116] 0x3418EE00: F5B0 1F40 CMP.W R0, #0x300000 0x3418EE04: D105 BNE 46L107 ; 0x3418EE12 0x3418EE06: 9815 LDR R0, [SP, #84] 0x3418EE08: B918 CBNZ R0, .L107 ; 0x3418EE12 0x3418EE0A: 2001 MOVS R0, #1 0x3418EE0C: F88D 0087 STRB.W R0, [SP, #135] 0x3418EE10: E17B B 46L144 ; 0x3418F10A
.L107: 0x3418EE12: 981E LDR R0, [SP, #120] 0x3418EE14: F1B0 5F40 CMP.W R0, #0x30000000 0x3418EE18: D109 BNE 46L109 ; 0x3418EE2E 0x3418EE1A: 9814 LDR R0, [SP, #80] 0x3418EE1C: B118 CBZ R0, .L108 ; 0x3418EE26 0x3418EE1E: 9813 LDR R0, [SP, #76] 0x3418EE20: B108 CBZ R0, .L108 ; 0x3418EE26 0x3418EE22: 9812 LDR R0, [SP, #72] 0x3418EE24: B918 CBNZ R0, .L109 ; 0x3418EE2E
.L108: 0x3418EE26: 2001 MOVS R0, #1 0x3418EE28: F88D 0087 STRB.W R0, [SP, #135] 0x3418EE2C: E16D B 46L144 ; 0x3418F10A
.L109: 0x3418EE2E: 9820 LDR R0, [SP, #128] 0x3418EE30: F100 0128 ADD.W R1, R0, #40 0x3418EE34: 2000 MOVS R0, #0 0x3418EE36: F000 FA23 BL RCC_PLL_Config ; 0x3418F280 0x3418EE3A: B118 CBZ R0, .L110 ; 0x3418EE44 0x3418EE3C: 2001 MOVS R0, #1 0x3418EE3E: F88D 0087 STRB.W R0, [SP, #135] 0x3418EE42: E162 B 46L144 ; 0x3418F10A
.L110: 0x3418EE44: E00E B 46L113 ; 0x3418EE64
.L111: 0x3418EE46: 9820 LDR R0, [SP, #128] 0x3418EE48: 6A80 LDR R0, [R0, #40] 0x3418EE4A: 2802 CMP R0, #2 0x3418EE4C: D10A BNE 46L113 ; 0x3418EE64 0x3418EE4E: 9816 LDR R0, [SP, #88] 0x3418EE50: B940 CBNZ R0, .L113 ; 0x3418EE64 0x3418EE52: 2000 MOVS R0, #0 0x3418EE54: F000 FBBC BL RCC_PLL_Enable ; 0x3418F5D0 0x3418EE58: B118 CBZ R0, .L112 ; 0x3418EE62 0x3418EE5A: 2001 MOVS R0, #1 0x3418EE5C: F88D 0087 STRB.W R0, [SP, #135] 0x3418EE60: E153 B 46L144 ; 0x3418F10A
.L112: 0x3418EE62: E7FF B 46L113 ; 0x3418EE64
.L113: 0x3418EE64: 9820 LDR R0, [SP, #128] 0x3418EE66: 6C40 LDR R0, [R0, #68] 0x3418EE68: B158 CBZ R0, .L114 ; 0x3418EE82 0x3418EE6A: 9820 LDR R0, [SP, #128] 0x3418EE6C: 6C40 LDR R0, [R0, #68] 0x3418EE6E: 2801 CMP R0, #1 0x3418EE70: D007 BEQ 46L114 ; 0x3418EE82 0x3418EE72: 9820 LDR R0, [SP, #128] 0x3418EE74: 6C40 LDR R0, [R0, #68] 0x3418EE76: 2802 CMP R0, #2 0x3418EE78: D003 BEQ 46L114 ; 0x3418EE82 0x3418EE7A: 9820 LDR R0, [SP, #128] 0x3418EE7C: 6C40 LDR R0, [R0, #68] 0x3418EE7E: 2803 CMP R0, #3 0x3418EE80: D100 BNE 46L115 ; 0x3418EE84
.L114: 0x3418EE82: E007 B 46L116 ; 0x3418EE94
.L115: 0x3418EE84: F244 300F MOVW R0, #0x430F ; 0x3419430F = .rodata..L.str.50 0x3418EE88: F2C3 4019 MOVT R0, #0x3419 ; 0x3419430F = .rodata..L.str.50 0x3418EE8C: F240 21EB MOVW R1, #0x02EB 0x3418EE90: F7FE FF02 BL assert_failed ; 0x3418DC98
.L116: 0x3418EE94: 9820 LDR R0, [SP, #128] 0x3418EE96: 6C40 LDR R0, [R0, #68] 0x3418EE98: 2800 CMP R0, #0 0x3418EE9A: D053 BEQ 46L123 ; 0x3418EF44 0x3418EE9C: 9820 LDR R0, [SP, #128] 0x3418EE9E: F100 0144 ADD.W R1, R0, #68 0x3418EEA2: 2001 MOVS R0, #1 0x3418EEA4: F000 F97E BL RCC_PLL_IsNewConfig ; 0x3418F1A4 0x3418EEA8: 9011 STR R0, [SP, #68] 0x3418EEAA: F7F3 FB6D BL LL_RCC_PLL2_IsReady ; 0x34182588 0x3418EEAE: 9010 STR R0, [SP, #64] 0x3418EEB0: 9811 LDR R0, [SP, #68] 0x3418EEB2: 2801 CMP R0, #1 0x3418EEB4: D137 BNE 46L121 ; 0x3418EF26 0x3418EEB6: F7F3 FB47 BL LL_RCC_IC1_GetSource ; 0x34182548 0x3418EEBA: 900F STR R0, [SP, #60] 0x3418EEBC: F7F3 FB4C BL LL_RCC_IC2_GetSource ; 0x34182558 0x3418EEC0: 900E STR R0, [SP, #56] 0x3418EEC2: F7F3 FB51 BL LL_RCC_IC6_GetSource ; 0x34182568 0x3418EEC6: 900D STR R0, [SP, #52] 0x3418EEC8: F7F3 FB56 BL LL_RCC_IC11_GetSource ; 0x34182578 0x3418EECC: 900C STR R0, [SP, #48] 0x3418EECE: 981D LDR R0, [SP, #116] 0x3418EED0: F5B0 1F40 CMP.W R0, #0x300000 0x3418EED4: D107 BNE 46L117 ; 0x3418EEE6 0x3418EED6: 980F LDR R0, [SP, #60] 0x3418EED8: F1B0 5F80 CMP.W R0, #0x10000000 0x3418EEDC: D103 BNE 46L117 ; 0x3418EEE6 0x3418EEDE: 2001 MOVS R0, #1 0x3418EEE0: F88D 0087 STRB.W R0, [SP, #135] 0x3418EEE4: E111 B 46L144 ; 0x3418F10A
.L117: 0x3418EEE6: 981E LDR R0, [SP, #120] 0x3418EEE8: F1B0 5F40 CMP.W R0, #0x30000000 0x3418EEEC: D10F BNE 46L119 ; 0x3418EF0E 0x3418EEEE: 980E LDR R0, [SP, #56] 0x3418EEF0: F1B0 5F80 CMP.W R0, #0x10000000 0x3418EEF4: D007 BEQ 46L118 ; 0x3418EF06 0x3418EEF6: 980D LDR R0, [SP, #52] 0x3418EEF8: F1B0 5F80 CMP.W R0, #0x10000000 0x3418EEFC: D003 BEQ 46L118 ; 0x3418EF06 0x3418EEFE: 980C LDR R0, [SP, #48] 0x3418EF00: F1B0 5F80 CMP.W R0, #0x10000000 0x3418EF04: D103 BNE 46L119 ; 0x3418EF0E
.L118: 0x3418EF06: 2001 MOVS R0, #1 0x3418EF08: F88D 0087 STRB.W R0, [SP, #135] 0x3418EF0C: E0FD B 46L144 ; 0x3418F10A
.L119: 0x3418EF0E: 9820 LDR R0, [SP, #128] 0x3418EF10: F100 0144 ADD.W R1, R0, #68 0x3418EF14: 2001 MOVS R0, #1 0x3418EF16: F000 F9B3 BL RCC_PLL_Config ; 0x3418F280 0x3418EF1A: B118 CBZ R0, .L120 ; 0x3418EF24 0x3418EF1C: 2001 MOVS R0, #1 0x3418EF1E: F88D 0087 STRB.W R0, [SP, #135] 0x3418EF22: E0F2 B 46L144 ; 0x3418F10A
.L120: 0x3418EF24: E00E B 46L123 ; 0x3418EF44
.L121: 0x3418EF26: 9820 LDR R0, [SP, #128] 0x3418EF28: 6C40 LDR R0, [R0, #68] 0x3418EF2A: 2802 CMP R0, #2 0x3418EF2C: D10A BNE 46L123 ; 0x3418EF44 0x3418EF2E: 9810 LDR R0, [SP, #64] 0x3418EF30: B940 CBNZ R0, .L123 ; 0x3418EF44 0x3418EF32: 2001 MOVS R0, #1 0x3418EF34: F000 FB4C BL RCC_PLL_Enable ; 0x3418F5D0 0x3418EF38: B118 CBZ R0, .L122 ; 0x3418EF42 0x3418EF3A: 2001 MOVS R0, #1 0x3418EF3C: F88D 0087 STRB.W R0, [SP, #135] 0x3418EF40: E0E3 B 46L144 ; 0x3418F10A
.L122: 0x3418EF42: E7FF B 46L123 ; 0x3418EF44
.L123: 0x3418EF44: 9820 LDR R0, [SP, #128] 0x3418EF46: 6E00 LDR R0, [R0, #96] 0x3418EF48: B158 CBZ R0, .L124 ; 0x3418EF62 0x3418EF4A: 9820 LDR R0, [SP, #128] 0x3418EF4C: 6E00 LDR R0, [R0, #96] 0x3418EF4E: 2801 CMP R0, #1 0x3418EF50: D007 BEQ 46L124 ; 0x3418EF62 0x3418EF52: 9820 LDR R0, [SP, #128] 0x3418EF54: 6E00 LDR R0, [R0, #96] 0x3418EF56: 2802 CMP R0, #2 0x3418EF58: D003 BEQ 46L124 ; 0x3418EF62 0x3418EF5A: 9820 LDR R0, [SP, #128] 0x3418EF5C: 6E00 LDR R0, [R0, #96] 0x3418EF5E: 2803 CMP R0, #3 0x3418EF60: D100 BNE 46L125 ; 0x3418EF64
.L124: 0x3418EF62: E007 B 46L126 ; 0x3418EF74
.L125: 0x3418EF64: F244 300F MOVW R0, #0x430F ; 0x3419430F = .rodata..L.str.50 0x3418EF68: F2C3 4019 MOVT R0, #0x3419 ; 0x3419430F = .rodata..L.str.50 0x3418EF6C: F240 3119 MOVW R1, #0x0319 0x3418EF70: F7FE FE92 BL assert_failed ; 0x3418DC98
.L126: 0x3418EF74: 9820 LDR R0, [SP, #128] 0x3418EF76: 6E00 LDR R0, [R0, #96] 0x3418EF78: 2800 CMP R0, #0 0x3418EF7A: D053 BEQ 46L133 ; 0x3418F024 0x3418EF7C: 9820 LDR R0, [SP, #128] 0x3418EF7E: F100 0160 ADD.W R1, R0, #96 0x3418EF82: 2002 MOVS R0, #2 0x3418EF84: F000 F90E BL RCC_PLL_IsNewConfig ; 0x3418F1A4 0x3418EF88: 900B STR R0, [SP, #44] 0x3418EF8A: F7F3 FB05 BL LL_RCC_PLL3_IsReady ; 0x34182598 0x3418EF8E: 900A STR R0, [SP, #40] 0x3418EF90: 980B LDR R0, [SP, #44] 0x3418EF92: 2801 CMP R0, #1 0x3418EF94: D137 BNE 46L131 ; 0x3418F006 0x3418EF96: F7F3 FAD7 BL LL_RCC_IC1_GetSource ; 0x34182548 0x3418EF9A: 9009 STR R0, [SP, #36] 0x3418EF9C: F7F3 FADC BL LL_RCC_IC2_GetSource ; 0x34182558 0x3418EFA0: 9008 STR R0, [SP, #32] 0x3418EFA2: F7F3 FAE1 BL LL_RCC_IC6_GetSource ; 0x34182568 0x3418EFA6: 9007 STR R0, [SP, #28] 0x3418EFA8: F7F3 FAE6 BL LL_RCC_IC11_GetSource ; 0x34182578 0x3418EFAC: 9006 STR R0, [SP, #24] 0x3418EFAE: 981D LDR R0, [SP, #116] 0x3418EFB0: F5B0 1F40 CMP.W R0, #0x300000 0x3418EFB4: D107 BNE 46L127 ; 0x3418EFC6 0x3418EFB6: 9809 LDR R0, [SP, #36] 0x3418EFB8: F1B0 5F00 CMP.W R0, #0x20000000 0x3418EFBC: D103 BNE 46L127 ; 0x3418EFC6 0x3418EFBE: 2001 MOVS R0, #1 0x3418EFC0: F88D 0087 STRB.W R0, [SP, #135] 0x3418EFC4: E0A1 B 46L144 ; 0x3418F10A
.L127: 0x3418EFC6: 981E LDR R0, [SP, #120] 0x3418EFC8: F1B0 5F40 CMP.W R0, #0x30000000 0x3418EFCC: D10F BNE 46L129 ; 0x3418EFEE 0x3418EFCE: 9808 LDR R0, [SP, #32] 0x3418EFD0: F1B0 5F00 CMP.W R0, #0x20000000 0x3418EFD4: D007 BEQ 46L128 ; 0x3418EFE6 0x3418EFD6: 9807 LDR R0, [SP, #28] 0x3418EFD8: F1B0 5F00 CMP.W R0, #0x20000000 0x3418EFDC: D003 BEQ 46L128 ; 0x3418EFE6 0x3418EFDE: 9806 LDR R0, [SP, #24] 0x3418EFE0: F1B0 5F00 CMP.W R0, #0x20000000 0x3418EFE4: D103 BNE 46L129 ; 0x3418EFEE
.L128: 0x3418EFE6: 2001 MOVS R0, #1 0x3418EFE8: F88D 0087 STRB.W R0, [SP, #135] 0x3418EFEC: E08D B 46L144 ; 0x3418F10A
.L129: 0x3418EFEE: 9820 LDR R0, [SP, #128] 0x3418EFF0: F100 0160 ADD.W R1, R0, #96 0x3418EFF4: 2002 MOVS R0, #2 0x3418EFF6: F000 F943 BL RCC_PLL_Config ; 0x3418F280 0x3418EFFA: B118 CBZ R0, .L130 ; 0x3418F004 0x3418EFFC: 2001 MOVS R0, #1 0x3418EFFE: F88D 0087 STRB.W R0, [SP, #135] 0x3418F002: E082 B 46L144 ; 0x3418F10A
.L130: 0x3418F004: E00E B 46L133 ; 0x3418F024
.L131: 0x3418F006: 9820 LDR R0, [SP, #128] 0x3418F008: 6E00 LDR R0, [R0, #96] 0x3418F00A: 2802 CMP R0, #2 0x3418F00C: D10A BNE 46L133 ; 0x3418F024 0x3418F00E: 980A LDR R0, [SP, #40] 0x3418F010: B940 CBNZ R0, .L133 ; 0x3418F024 0x3418F012: 2002 MOVS R0, #2 0x3418F014: F000 FADC BL RCC_PLL_Enable ; 0x3418F5D0 0x3418F018: B118 CBZ R0, .L132 ; 0x3418F022 0x3418F01A: 2001 MOVS R0, #1 0x3418F01C: F88D 0087 STRB.W R0, [SP, #135] 0x3418F020: E073 B 46L144 ; 0x3418F10A
.L132: 0x3418F022: E7FF B 46L133 ; 0x3418F024
.L133: 0x3418F024: 9820 LDR R0, [SP, #128] 0x3418F026: 6FC0 LDR R0, [R0, #124] 0x3418F028: B158 CBZ R0, .L134 ; 0x3418F042 0x3418F02A: 9820 LDR R0, [SP, #128] 0x3418F02C: 6FC0 LDR R0, [R0, #124] 0x3418F02E: 2801 CMP R0, #1 0x3418F030: D007 BEQ 46L134 ; 0x3418F042 0x3418F032: 9820 LDR R0, [SP, #128] 0x3418F034: 6FC0 LDR R0, [R0, #124] 0x3418F036: 2802 CMP R0, #2 0x3418F038: D003 BEQ 46L134 ; 0x3418F042 0x3418F03A: 9820 LDR R0, [SP, #128] 0x3418F03C: 6FC0 LDR R0, [R0, #124] 0x3418F03E: 2803 CMP R0, #3 0x3418F040: D100 BNE 46L135 ; 0x3418F044
.L134: 0x3418F042: E007 B 46L136 ; 0x3418F054
.L135: 0x3418F044: F244 300F MOVW R0, #0x430F ; 0x3419430F = .rodata..L.str.50 0x3418F048: F2C3 4019 MOVT R0, #0x3419 ; 0x3419430F = .rodata..L.str.50 0x3418F04C: F240 3146 MOVW R1, #0x0346 0x3418F050: F7FE FE22 BL assert_failed ; 0x3418DC98
.L136: 0x3418F054: 9820 LDR R0, [SP, #128] 0x3418F056: 6FC0 LDR R0, [R0, #124] 0x3418F058: 2800 CMP R0, #0 0x3418F05A: D053 BEQ 46L143 ; 0x3418F104 0x3418F05C: 9820 LDR R0, [SP, #128] 0x3418F05E: F100 017C ADD.W R1, R0, #124 0x3418F062: 2003 MOVS R0, #3 0x3418F064: F000 F89E BL RCC_PLL_IsNewConfig ; 0x3418F1A4 0x3418F068: 9005 STR R0, [SP, #20] 0x3418F06A: F7F3 FA9D BL LL_RCC_PLL4_IsReady ; 0x341825A8 0x3418F06E: 9004 STR R0, [SP, #16] 0x3418F070: 9805 LDR R0, [SP, #20] 0x3418F072: 2801 CMP R0, #1 0x3418F074: D137 BNE 46L141 ; 0x3418F0E6 0x3418F076: F7F3 FA67 BL LL_RCC_IC1_GetSource ; 0x34182548 0x3418F07A: 9003 STR R0, [SP, #12] 0x3418F07C: F7F3 FA6C BL LL_RCC_IC2_GetSource ; 0x34182558 0x3418F080: 9002 STR R0, [SP, #8] 0x3418F082: F7F3 FA71 BL LL_RCC_IC6_GetSource ; 0x34182568 0x3418F086: 9001 STR R0, [SP, #4] 0x3418F088: F7F3 FA76 BL LL_RCC_IC11_GetSource ; 0x34182578 0x3418F08C: 9000 STR R0, [SP, #0] 0x3418F08E: 981D LDR R0, [SP, #116] 0x3418F090: F5B0 1F40 CMP.W R0, #0x300000 0x3418F094: D107 BNE 46L137 ; 0x3418F0A6 0x3418F096: 9803 LDR R0, [SP, #12] 0x3418F098: F1B0 5F40 CMP.W R0, #0x30000000 0x3418F09C: D103 BNE 46L137 ; 0x3418F0A6 0x3418F09E: 2001 MOVS R0, #1 0x3418F0A0: F88D 0087 STRB.W R0, [SP, #135] 0x3418F0A4: E031 B 46L144 ; 0x3418F10A
.L137: 0x3418F0A6: 981E LDR R0, [SP, #120] 0x3418F0A8: F1B0 5F40 CMP.W R0, #0x30000000 0x3418F0AC: D10F BNE 46L139 ; 0x3418F0CE 0x3418F0AE: 9802 LDR R0, [SP, #8] 0x3418F0B0: F1B0 5F40 CMP.W R0, #0x30000000 0x3418F0B4: D007 BEQ 46L138 ; 0x3418F0C6 0x3418F0B6: 9801 LDR R0, [SP, #4] 0x3418F0B8: F1B0 5F40 CMP.W R0, #0x30000000 0x3418F0BC: D003 BEQ 46L138 ; 0x3418F0C6 0x3418F0BE: 9800 LDR R0, [SP, #0] 0x3418F0C0: F1B0 5F40 CMP.W R0, #0x30000000 0x3418F0C4: D103 BNE 46L139 ; 0x3418F0CE
.L138: 0x3418F0C6: 2001 MOVS R0, #1 0x3418F0C8: F88D 0087 STRB.W R0, [SP, #135] 0x3418F0CC: E01D B 46L144 ; 0x3418F10A
.L139: 0x3418F0CE: 9820 LDR R0, [SP, #128] 0x3418F0D0: F100 017C ADD.W R1, R0, #124 0x3418F0D4: 2003 MOVS R0, #3 0x3418F0D6: F000 F8D3 BL RCC_PLL_Config ; 0x3418F280 0x3418F0DA: B118 CBZ R0, .L140 ; 0x3418F0E4 0x3418F0DC: 2001 MOVS R0, #1 0x3418F0DE: F88D 0087 STRB.W R0, [SP, #135] 0x3418F0E2: E012 B 46L144 ; 0x3418F10A
.L140: 0x3418F0E4: E00E B 46L143 ; 0x3418F104
.L141: 0x3418F0E6: 9820 LDR R0, [SP, #128] 0x3418F0E8: 6FC0 LDR R0, [R0, #124] 0x3418F0EA: 2802 CMP R0, #2 0x3418F0EC: D10A BNE 46L143 ; 0x3418F104 0x3418F0EE: 9804 LDR R0, [SP, #16] 0x3418F0F0: B940 CBNZ R0, .L143 ; 0x3418F104 0x3418F0F2: 2003 MOVS R0, #3 0x3418F0F4: F000 FA6C BL RCC_PLL_Enable ; 0x3418F5D0 0x3418F0F8: B118 CBZ R0, .L142 ; 0x3418F102 0x3418F0FA: 2001 MOVS R0, #1 0x3418F0FC: F88D 0087 STRB.W R0, [SP, #135] 0x3418F100: E003 B 46L144 ; 0x3418F10A
.L142: 0x3418F102: E7FF B 46L143 ; 0x3418F104
.L143: 0x3418F104: 2000 MOVS R0, #0 0x3418F106: F88D 0087 STRB.W R0, [SP, #135]
.L144: 0x3418F10A: F89D 0087 LDRB.W R0, [SP, #135] 0x3418F10E: B022 ADD SP, SP, #136 0x3418F110: BD80 POP 123R7, PC}

Section .init.HASH_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HASH_IRQHandler: 0x3418F112: E7FE B HASH_IRQHandler ; 0x3418F112

Section .text.LL_RCC_HSI_SetCalibTrimming from blto2_FSBL_lto.o, size=30, align=4


LL_RCC_HSI_SetCalibTrimming: 0x3418F114: B081 SUB SP, SP, #4 0x3418F116: 9000 STR R0, [SP, #0] 0x3418F118: F248 0148 MOVW R1, #0x8048 0x3418F11C: F2C5 6102 MOVT R1, #0x5602 0x3418F120: 6808 LDR R0, [R1] 0x3418F122: F420 00FE BIC R0, R0, #0x7F0000 0x3418F126: 9A00 LDR R2, [SP, #0] 0x3418F128: EA40 4002 ORR.W R0, R0, R2, LSL #16 0x3418F12C: 6008 STR R0, [R1] 0x3418F12E: B001 ADD SP, SP, #4 0x3418F130: 4770 BX LR

Section .init.RNG_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


RNG_IRQHandler: 0x3418F132: E7FE B RNG_IRQHandler ; 0x3418F132

Section .text.LL_RCC_HSI_Disable from blto2_FSBL_lto.o, size=14, align=4


LL_RCC_HSI_Disable: 0x3418F134: F249 0100 MOVW R1, #0x9000 0x3418F138: F2C5 6102 MOVT R1, #0x5602 0x3418F13C: 2008 MOVS R0, #8 0x3418F13E: 6008 STR R0, [R1] 0x3418F140: 4770 BX LR

Section .init.MCE1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


MCE1_IRQHandler: 0x3418F142: E7FE B MCE1_IRQHandler ; 0x3418F142

Section .text.LL_RCC_MSI_SetCalibTrimming from blto2_FSBL_lto.o, size=30, align=4


LL_RCC_MSI_SetCalibTrimming: 0x3418F144: B081 SUB SP, SP, #4 0x3418F146: 9000 STR R0, [SP, #0] 0x3418F148: F248 0144 MOVW R1, #0x8044 0x3418F14C: F2C5 6102 MOVT R1, #0x5602 0x3418F150: 6808 LDR R0, [R1] 0x3418F152: F420 10F8 BIC R0, R0, #0x1F0000 0x3418F156: 9A00 LDR R2, [SP, #0] 0x3418F158: EA40 4002 ORR.W R0, R0, R2, LSL #16 0x3418F15C: 6008 STR R0, [R1] 0x3418F15E: B001 ADD SP, SP, #4 0x3418F160: 4770 BX LR

Section .init.MCE2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


MCE2_IRQHandler: 0x3418F162: E7FE B MCE2_IRQHandler ; 0x3418F162

Section .text.LL_RCC_MSI_Enable from blto2_FSBL_lto.o, size=14, align=4


LL_RCC_MSI_Enable: 0x3418F164: F648 0100 MOVW R1, #0x8800 0x3418F168: F2C5 6102 MOVT R1, #0x5602 0x3418F16C: 2004 MOVS R0, #4 0x3418F16E: 6008 STR R0, [R1] 0x3418F170: 4770 BX LR

Section .init.MCE3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


MCE3_IRQHandler: 0x3418F172: E7FE B MCE3_IRQHandler ; 0x3418F172

Section .text.LL_RCC_MSI_Disable from blto2_FSBL_lto.o, size=14, align=4


LL_RCC_MSI_Disable: 0x3418F174: F249 0100 MOVW R1, #0x9000 0x3418F178: F2C5 6102 MOVT R1, #0x5602 0x3418F17C: 2004 MOVS R0, #4 0x3418F17E: 6008 STR R0, [R1] 0x3418F180: 4770 BX LR

Section .init.MCE4_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


MCE4_IRQHandler: 0x3418F182: E7FE B MCE4_IRQHandler ; 0x3418F182

Section .text.LL_RCC_LSI_Enable from blto2_FSBL_lto.o, size=14, align=4


LL_RCC_LSI_Enable: 0x3418F184: F648 0100 MOVW R1, #0x8800 0x3418F188: F2C5 6102 MOVT R1, #0x5602 0x3418F18C: 2001 MOVS R0, #1 0x3418F18E: 6008 STR R0, [R1] 0x3418F190: 4770 BX LR

Section .init.ADC1_2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


ADC1_2_IRQHandler: 0x3418F192: E7FE B ADC1_2_IRQHandler ; 0x3418F192

Section .text.LL_RCC_LSI_Disable from blto2_FSBL_lto.o, size=14, align=4


LL_RCC_LSI_Disable: 0x3418F194: F249 0100 MOVW R1, #0x9000 0x3418F198: F2C5 6102 MOVT R1, #0x5602 0x3418F19C: 2001 MOVS R0, #1 0x3418F19E: 6008 STR R0, [R1] 0x3418F1A0: 4770 BX LR

Section .init.CSI_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


CSI_IRQHandler: 0x3418F1A2: E7FE B CSI_IRQHandler ; 0x3418F1A2

Section .text.RCC_PLL_IsNewConfig from blto2_FSBL_lto.o, size=218, align=4


RCC_PLL_IsNewConfig: 0x3418F1A4: B087 SUB SP, SP, #28 0x3418F1A6: 9006 STR R0, [SP, #24] 0x3418F1A8: 9105 STR R1, [SP, #20] 0x3418F1AA: 2000 MOVS R0, #0 0x3418F1AC: 9001 STR R0, [SP, #4] 0x3418F1AE: 9906 LDR R1, [SP, #24] 0x3418F1B0: F248 0080 MOVW R0, #0x8080 0x3418F1B4: F2C5 6002 MOVT R0, #0x5602 0x3418F1B8: EB00 1001 ADD.W R0, R0, R1, LSL #4 0x3418F1BC: 9004 STR R0, [SP, #16] 0x3418F1BE: 9906 LDR R1, [SP, #24] 0x3418F1C0: F248 0084 MOVW R0, #0x8084 0x3418F1C4: F2C5 6002 MOVT R0, #0x5602 0x3418F1C8: EB00 1001 ADD.W R0, R0, R1, LSL #4 0x3418F1CC: 9003 STR R0, [SP, #12] 0x3418F1CE: 9906 LDR R1, [SP, #24] 0x3418F1D0: F248 0088 MOVW R0, #0x8088 0x3418F1D4: F2C5 6002 MOVT R0, #0x5602 0x3418F1D8: EB00 1001 ADD.W R0, R0, R1, LSL #4 0x3418F1DC: 9002 STR R0, [SP, #8] 0x3418F1DE: 9804 LDR R0, [SP, #16] 0x3418F1E0: 6800 LDR R0, [R0] 0x3418F1E2: F64F 7100 MOVW R1, #0xFF00 0x3418F1E6: F2C7 31FF MOVT R1, #0x73FF 0x3418F1EA: 4008 ANDS R0, R1 0x3418F1EC: 9A05 LDR R2, [SP, #20] 0x3418F1EE: 6851 LDR R1, [R2, #4] 0x3418F1F0: 6893 LDR R3, [R2, #8] 0x3418F1F2: 6912 LDR R2, [R2, #16] 0x3418F1F4: EA41 5103 ORR.W R1, R1, R3, LSL #20 0x3418F1F8: EA41 2102 ORR.W R1, R1, R2, LSL #8 0x3418F1FC: 4288 CMP R0, R1 0x3418F1FE: D002 BEQ 46L1 ; 0x3418F206 0x3418F200: 2001 MOVS R0, #1 0x3418F202: 9001 STR R0, [SP, #4] 0x3418F204: E038 B 46L7 ; 0x3418F278
.L1: 0x3418F206: 9803 LDR R0, [SP, #12] 0x3418F208: 6800 LDR R0, [R0] 0x3418F20A: F020 407F BIC R0, R0, #0xFF000000 0x3418F20E: 9905 LDR R1, [SP, #20] 0x3418F210: 68C9 LDR R1, [R1, #12] 0x3418F212: 4288 CMP R0, R1 0x3418F214: D002 BEQ 46L2 ; 0x3418F21C 0x3418F216: 2001 MOVS R0, #1 0x3418F218: 9001 STR R0, [SP, #4] 0x3418F21A: E02D B 46L7 ; 0x3418F278
.L2: 0x3418F21C: 9802 LDR R0, [SP, #8] 0x3418F21E: 6800 LDR R0, [R0] 0x3418F220: F000 507C AND R0, R0, #0x3F000000 0x3418F224: 9A05 LDR R2, [SP, #20] 0x3418F226: 6951 LDR R1, [R2, #20] 0x3418F228: 6992 LDR R2, [R2, #24] 0x3418F22A: 06C9 LSLS R1, R1, #27 0x3418F22C: EA41 6102 ORR.W R1, R1, R2, LSL #24 0x3418F230: 4288 CMP R0, R1 0x3418F232: D002 BEQ 46L3 ; 0x3418F23A 0x3418F234: 2001 MOVS R0, #1 0x3418F236: 9001 STR R0, [SP, #4] 0x3418F238: E01E B 46L7 ; 0x3418F278
.L3: 0x3418F23A: F248 0004 MOVW R0, #0x8004 0x3418F23E: F2C5 6002 MOVT R0, #0x5602 0x3418F242: 6800 LDR R0, [R0] 0x3418F244: 43C0 MVNS R0, R0 0x3418F246: 9906 LDR R1, [SP, #24] 0x3418F248: 40C8 LSRS R0, R1 0x3418F24A: 05C0 LSLS R0, R0, #23 0x3418F24C: 2800 CMP R0, #0 0x3418F24E: D402 BMI 46L4 ; 0x3418F256 0x3418F250: 2002 MOVS R0, #2 0x3418F252: 9000 STR R0, [SP, #0] 0x3418F254: E009 B 46L6 ; 0x3418F26A
.L4: 0x3418F256: 9804 LDR R0, [SP, #16] 0x3418F258: 6800 LDR R0, [R0] 0x3418F25A: 0100 LSLS R0, R0, #4 0x3418F25C: 2800 CMP R0, #0 0x3418F25E: D502 BPL 46L5 ; 0x3418F266 0x3418F260: 2003 MOVS R0, #3 0x3418F262: 9000 STR R0, [SP, #0] 0x3418F264: E001 B 46L6 ; 0x3418F26A
.L5: 0x3418F266: 2001 MOVS R0, #1 0x3418F268: 9000 STR R0, [SP, #0]
.L6: 0x3418F26A: 9800 LDR R0, [SP, #0] 0x3418F26C: 9905 LDR R1, [SP, #20] 0x3418F26E: 6809 LDR R1, [R1] 0x3418F270: 4288 CMP R0, R1 0x3418F272: D001 BEQ 46L7 ; 0x3418F278 0x3418F274: 2001 MOVS R0, #1 0x3418F276: 9001 STR R0, [SP, #4]
.L7: 0x3418F278: 9801 LDR R0, [SP, #4] 0x3418F27A: B007 ADD SP, SP, #28 0x3418F27C: 4770 BX LR

Section .init.DCMIPP_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


DCMIPP_IRQHandler: 0x3418F27E: E7FE B DCMIPP_IRQHandler ; 0x3418F27E

Section .text.RCC_PLL_Config from blto2_FSBL_lto.o, size=846, align=4


RCC_PLL_Config: 0x3418F280: B580 PUSH 123R7, LR} 0x3418F282: B088 SUB SP, SP, #32 0x3418F284: 9006 STR R0, [SP, #24] 0x3418F286: 9105 STR R1, [SP, #20] 0x3418F288: 2000 MOVS R0, #0 0x3418F28A: F88D 0007 STRB.W R0, [SP, #7] 0x3418F28E: 9906 LDR R1, [SP, #24] 0x3418F290: F248 0080 MOVW R0, #0x8080 0x3418F294: F2C5 6002 MOVT R0, #0x5602 0x3418F298: EB00 1001 ADD.W R0, R0, R1, LSL #4 0x3418F29C: 9004 STR R0, [SP, #16] 0x3418F29E: 9906 LDR R1, [SP, #24] 0x3418F2A0: F248 0084 MOVW R0, #0x8084 0x3418F2A4: F2C5 6002 MOVT R0, #0x5602 0x3418F2A8: EB00 1001 ADD.W R0, R0, R1, LSL #4 0x3418F2AC: 9003 STR R0, [SP, #12] 0x3418F2AE: 9906 LDR R1, [SP, #24] 0x3418F2B0: F248 0088 MOVW R0, #0x8088 0x3418F2B4: F2C5 6002 MOVT R0, #0x5602 0x3418F2B8: EB00 1001 ADD.W R0, R0, R1, LSL #4 0x3418F2BC: 9002 STR R0, [SP, #8] 0x3418F2BE: 9805 LDR R0, [SP, #20] 0x3418F2C0: 6800 LDR R0, [R0] 0x3418F2C2: 2802 CMP R0, #2 0x3418F2C4: F040 80F3 BNE.W 46L21 ; 0x3418F4AE 0x3418F2C8: 9805 LDR R0, [SP, #20] 0x3418F2CA: 6840 LDR R0, [R0, #4] 0x3418F2CC: B170 CBZ R0, .L1 ; 0x3418F2EC 0x3418F2CE: 9805 LDR R0, [SP, #20] 0x3418F2D0: 6840 LDR R0, [R0, #4] 0x3418F2D2: F1B0 5F80 CMP.W R0, #0x10000000 0x3418F2D6: D009 BEQ 46L1 ; 0x3418F2EC 0x3418F2D8: 9805 LDR R0, [SP, #20] 0x3418F2DA: 6840 LDR R0, [R0, #4] 0x3418F2DC: F1B0 5F00 CMP.W R0, #0x20000000 0x3418F2E0: D004 BEQ 46L1 ; 0x3418F2EC 0x3418F2E2: 9805 LDR R0, [SP, #20] 0x3418F2E4: 6840 LDR R0, [R0, #4] 0x3418F2E6: F1B0 5F40 CMP.W R0, #0x30000000 0x3418F2EA: D100 BNE 46L2 ; 0x3418F2EE
.L1: 0x3418F2EC: E007 B 46L3 ; 0x3418F2FE
.L2: 0x3418F2EE: F244 300F MOVW R0, #0x430F ; 0x3419430F = .rodata..L.str.50 0x3418F2F2: F2C3 4019 MOVT R0, #0x3419 ; 0x3419430F = .rodata..L.str.50 0x3418F2F6: F640 0159 MOVW R1, #0x0859 0x3418F2FA: F7FE FCCD BL assert_failed ; 0x3418DC98
.L3: 0x3418F2FE: 9805 LDR R0, [SP, #20] 0x3418F300: 7BC0 LDRB R0, [R0, #15] 0x3418F302: B900 CBNZ R0, .L4 ; 0x3418F306 0x3418F304: E007 B 46L5 ; 0x3418F316
.L4: 0x3418F306: F244 300F MOVW R0, #0x430F ; 0x3419430F = .rodata..L.str.50 0x3418F30A: F2C3 4019 MOVT R0, #0x3419 ; 0x3419430F = .rodata..L.str.50 0x3418F30E: F640 015A MOVW R1, #0x085A 0x3418F312: F7FE FCC1 BL assert_failed ; 0x3418DC98
.L5: 0x3418F316: 9805 LDR R0, [SP, #20] 0x3418F318: 6880 LDR R0, [R0, #8] 0x3418F31A: B120 CBZ R0, .L6 ; 0x3418F326 0x3418F31C: 9805 LDR R0, [SP, #20] 0x3418F31E: 6880 LDR R0, [R0, #8] 0x3418F320: 283F CMP R0, #63 0x3418F322: D800 BHI 46L6 ; 0x3418F326 0x3418F324: E007 B 46L7 ; 0x3418F336
.L6: 0x3418F326: F244 300F MOVW R0, #0x430F ; 0x3419430F = .rodata..L.str.50 0x3418F32A: F2C3 4019 MOVT R0, #0x3419 ; 0x3419430F = .rodata..L.str.50 0x3418F32E: F640 015B MOVW R1, #0x085B 0x3418F332: F7FE FCB1 BL assert_failed ; 0x3418DC98
.L7: 0x3418F336: 9805 LDR R0, [SP, #20] 0x3418F338: 6900 LDR R0, [R0, #16] 0x3418F33A: 280A CMP R0, #10 0x3418F33C: D306 BCC 46L8 ; 0x3418F34C 0x3418F33E: 9805 LDR R0, [SP, #20] 0x3418F340: 6900 LDR R0, [R0, #16] 0x3418F342: F640 11C4 MOVW R1, #0x09C4 0x3418F346: 4288 CMP R0, R1 0x3418F348: D800 BHI 46L8 ; 0x3418F34C 0x3418F34A: E007 B 46L9 ; 0x3418F35C
.L8: 0x3418F34C: F244 300F MOVW R0, #0x430F ; 0x3419430F = .rodata..L.str.50 0x3418F350: F2C3 4019 MOVT R0, #0x3419 ; 0x3419430F = .rodata..L.str.50 0x3418F354: F640 015C MOVW R1, #0x085C 0x3418F358: F7FE FC9E BL assert_failed ; 0x3418DC98
.L9: 0x3418F35C: 9805 LDR R0, [SP, #20] 0x3418F35E: 6940 LDR R0, [R0, #20] 0x3418F360: B120 CBZ R0, .L10 ; 0x3418F36C 0x3418F362: 9805 LDR R0, [SP, #20] 0x3418F364: 6940 LDR R0, [R0, #20] 0x3418F366: 2807 CMP R0, #7 0x3418F368: D800 BHI 46L10 ; 0x3418F36C 0x3418F36A: E007 B 46L11 ; 0x3418F37C
.L10: 0x3418F36C: F244 300F MOVW R0, #0x430F ; 0x3419430F = .rodata..L.str.50 0x3418F370: F2C3 4019 MOVT R0, #0x3419 ; 0x3419430F = .rodata..L.str.50 0x3418F374: F640 015D MOVW R1, #0x085D 0x3418F378: F7FE FC8E BL assert_failed ; 0x3418DC98
.L11: 0x3418F37C: 9805 LDR R0, [SP, #20] 0x3418F37E: 6980 LDR R0, [R0, #24] 0x3418F380: B120 CBZ R0, .L12 ; 0x3418F38C 0x3418F382: 9805 LDR R0, [SP, #20] 0x3418F384: 6980 LDR R0, [R0, #24] 0x3418F386: 2807 CMP R0, #7 0x3418F388: D800 BHI 46L12 ; 0x3418F38C 0x3418F38A: E007 B 46L13 ; 0x3418F39C
.L12: 0x3418F38C: F244 300F MOVW R0, #0x430F ; 0x3419430F = .rodata..L.str.50 0x3418F390: F2C3 4019 MOVT R0, #0x3419 ; 0x3419430F = .rodata..L.str.50 0x3418F394: F640 015E MOVW R1, #0x085E 0x3418F398: F7FE FC7E BL assert_failed ; 0x3418DC98
.L13: 0x3418F39C: 9906 LDR R1, [SP, #24] 0x3418F39E: F44F 7080 MOV.W R0, #0x0100 0x3418F3A2: 4088 LSLS R0, R1 0x3418F3A4: F249 0100 MOVW R1, #0x9000 0x3418F3A8: F2C5 6102 MOVT R1, #0x5602 0x3418F3AC: 6008 STR R0, [R1] 0x3418F3AE: F7F2 FB21 BL HAL_GetTick ; 0x341819F4 0x3418F3B2: 9000 STR R0, [SP, #0]
.L14: 0x3418F3B4: F248 0004 MOVW R0, #0x8004 0x3418F3B8: F2C5 6002 MOVT R0, #0x5602 0x3418F3BC: 6800 LDR R0, [R0] 0x3418F3BE: 43C0 MVNS R0, R0 0x3418F3C0: 9906 LDR R1, [SP, #24] 0x3418F3C2: 40C8 LSRS R0, R1 0x3418F3C4: 05C0 LSLS R0, R0, #23 0x3418F3C6: 2800 CMP R0, #0 0x3418F3C8: D40A BMI 46L16 ; 0x3418F3E0 0x3418F3CA: F7F2 FB13 BL HAL_GetTick ; 0x341819F4 0x3418F3CE: 9900 LDR R1, [SP, #0] 0x3418F3D0: 1A40 SUBS R0, R0, R1 0x3418F3D2: 2802 CMP R0, #2 0x3418F3D4: D303 BCC 46L15 ; 0x3418F3DE 0x3418F3D6: 2003 MOVS R0, #3 0x3418F3D8: F88D 001F STRB.W R0, [SP, #31] 0x3418F3DC: E0F3 B 46L35 ; 0x3418F5C6
.L15: 0x3418F3DE: E7E9 B 46L14 ; 0x3418F3B4
.L16: 0x3418F3E0: 9902 LDR R1, [SP, #8] 0x3418F3E2: 6808 LDR R0, [R1] 0x3418F3E4: F040 0004 ORR R0, R0, #4 0x3418F3E8: 6008 STR R0, [R1] 0x3418F3EA: 9904 LDR R1, [SP, #16] 0x3418F3EC: 6808 LDR R0, [R1] 0x3418F3EE: F020 6000 BIC R0, R0, #0x08000000 0x3418F3F2: 6008 STR R0, [R1] 0x3418F3F4: 9804 LDR R0, [SP, #16] 0x3418F3F6: 6800 LDR R0, [R0] 0x3418F3F8: 21FF MOVS R1, #255 0x3418F3FA: F6C8 4100 MOVT R1, #0x8C00 0x3418F3FE: 4008 ANDS R0, R1 0x3418F400: 9A05 LDR R2, [SP, #20] 0x3418F402: 6851 LDR R1, [R2, #4] 0x3418F404: 6893 LDR R3, [R2, #8] 0x3418F406: 6912 LDR R2, [R2, #16] 0x3418F408: EA41 5103 ORR.W R1, R1, R3, LSL #20 0x3418F40C: EA41 2102 ORR.W R1, R1, R2, LSL #8 0x3418F410: 4308 ORRS R0, R1 0x3418F412: 9904 LDR R1, [SP, #16] 0x3418F414: 6008 STR R0, [R1] 0x3418F416: 9802 LDR R0, [SP, #8] 0x3418F418: 6800 LDR R0, [R0] 0x3418F41A: F020 507C BIC R0, R0, #0x3F000000 0x3418F41E: 9A05 LDR R2, [SP, #20] 0x3418F420: 6951 LDR R1, [R2, #20] 0x3418F422: 6992 LDR R2, [R2, #24] 0x3418F424: 06C9 LSLS R1, R1, #27 0x3418F426: EA41 6102 ORR.W R1, R1, R2, LSL #24 0x3418F42A: 4308 ORRS R0, R1 0x3418F42C: 9902 LDR R1, [SP, #8] 0x3418F42E: 6008 STR R0, [R1] 0x3418F430: 9803 LDR R0, [SP, #12] 0x3418F432: 6800 LDR R0, [R0] 0x3418F434: F000 407F AND R0, R0, #0xFF000000 0x3418F438: 9905 LDR R1, [SP, #20] 0x3418F43A: 68C9 LDR R1, [R1, #12] 0x3418F43C: 4308 ORRS R0, R1 0x3418F43E: 9903 LDR R1, [SP, #12] 0x3418F440: 6008 STR R0, [R1] 0x3418F442: 9902 LDR R1, [SP, #8] 0x3418F444: 6808 LDR R0, [R1] 0x3418F446: F020 0008 BIC R0, R0, #8 0x3418F44A: 6008 STR R0, [R1] 0x3418F44C: 9805 LDR R0, [SP, #20] 0x3418F44E: 68C0 LDR R0, [R0, #12] 0x3418F450: B120 CBZ R0, .L17 ; 0x3418F45C 0x3418F452: 9902 LDR R1, [SP, #8] 0x3418F454: 6808 LDR R0, [R1] 0x3418F456: F040 000A ORR R0, R0, #10 0x3418F45A: 6008 STR R0, [R1]
.L17: 0x3418F45C: 9902 LDR R1, [SP, #8] 0x3418F45E: 6808 LDR R0, [R1] 0x3418F460: 2201 MOVS R2, #1 0x3418F462: F2C4 0200 MOVT R2, #0x4000 0x3418F466: 4310 ORRS R0, R2 0x3418F468: 6008 STR R0, [R1] 0x3418F46A: 9906 LDR R1, [SP, #24] 0x3418F46C: F44F 7080 MOV.W R0, #0x0100 0x3418F470: 4088 LSLS R0, R1 0x3418F472: F648 0100 MOVW R1, #0x8800 0x3418F476: F2C5 6102 MOVT R1, #0x5602 0x3418F47A: 6008 STR R0, [R1] 0x3418F47C: F7F2 FABA BL HAL_GetTick ; 0x341819F4 0x3418F480: 9000 STR R0, [SP, #0]
.L18: 0x3418F482: F248 0004 MOVW R0, #0x8004 0x3418F486: F2C5 6002 MOVT R0, #0x5602 0x3418F48A: 6800 LDR R0, [R0] 0x3418F48C: 9906 LDR R1, [SP, #24] 0x3418F48E: 40C8 LSRS R0, R1 0x3418F490: 05C0 LSLS R0, R0, #23 0x3418F492: 2800 CMP R0, #0 0x3418F494: D40A BMI 46L20 ; 0x3418F4AC 0x3418F496: F7F2 FAAD BL HAL_GetTick ; 0x341819F4 0x3418F49A: 9900 LDR R1, [SP, #0] 0x3418F49C: 1A40 SUBS R0, R0, R1 0x3418F49E: 2802 CMP R0, #2 0x3418F4A0: D303 BCC 46L19 ; 0x3418F4AA 0x3418F4A2: 2003 MOVS R0, #3 0x3418F4A4: F88D 001F STRB.W R0, [SP, #31] 0x3418F4A8: E08D B 46L35 ; 0x3418F5C6
.L19: 0x3418F4AA: E7EA B 46L18 ; 0x3418F482
.L20: 0x3418F4AC: E087 B 46L34 ; 0x3418F5BE
.L21: 0x3418F4AE: 9805 LDR R0, [SP, #20] 0x3418F4B0: 6800 LDR R0, [R0] 0x3418F4B2: 2803 CMP R0, #3 0x3418F4B4: D152 BNE 46L30 ; 0x3418F55C 0x3418F4B6: 9805 LDR R0, [SP, #20] 0x3418F4B8: 6840 LDR R0, [R0, #4] 0x3418F4BA: B170 CBZ R0, .L22 ; 0x3418F4DA 0x3418F4BC: 9805 LDR R0, [SP, #20] 0x3418F4BE: 6840 LDR R0, [R0, #4] 0x3418F4C0: F1B0 5F80 CMP.W R0, #0x10000000 0x3418F4C4: D009 BEQ 46L22 ; 0x3418F4DA 0x3418F4C6: 9805 LDR R0, [SP, #20] 0x3418F4C8: 6840 LDR R0, [R0, #4] 0x3418F4CA: F1B0 5F00 CMP.W R0, #0x20000000 0x3418F4CE: D004 BEQ 46L22 ; 0x3418F4DA 0x3418F4D0: 9805 LDR R0, [SP, #20] 0x3418F4D2: 6840 LDR R0, [R0, #4] 0x3418F4D4: F1B0 5F40 CMP.W R0, #0x30000000 0x3418F4D8: D100 BNE 46L23 ; 0x3418F4DC
.L22: 0x3418F4DA: E007 B 46L24 ; 0x3418F4EC
.L23: 0x3418F4DC: F244 300F MOVW R0, #0x430F ; 0x3419430F = .rodata..L.str.50 0x3418F4E0: F2C3 4019 MOVT R0, #0x3419 ; 0x3419430F = .rodata..L.str.50 0x3418F4E4: F640 019E MOVW R1, #0x089E 0x3418F4E8: F7FE FBD6 BL assert_failed ; 0x3418DC98
.L24: 0x3418F4EC: 9805 LDR R0, [SP, #20] 0x3418F4EE: 6840 LDR R0, [R0, #4] 0x3418F4F0: F7F3 F862 BL RCC_PLL_Source_IsReady ; 0x341825B8 0x3418F4F4: 2801 CMP R0, #1 0x3418F4F6: D12D BNE 46L28 ; 0x3418F554 0x3418F4F8: 9906 LDR R1, [SP, #24] 0x3418F4FA: F44F 7080 MOV.W R0, #0x0100 0x3418F4FE: 4088 LSLS R0, R1 0x3418F500: F249 0100 MOVW R1, #0x9000 0x3418F504: F2C5 6102 MOVT R1, #0x5602 0x3418F508: 6008 STR R0, [R1] 0x3418F50A: F7F2 FA73 BL HAL_GetTick ; 0x341819F4 0x3418F50E: 9000 STR R0, [SP, #0]
.L25: 0x3418F510: F248 0004 MOVW R0, #0x8004 0x3418F514: F2C5 6002 MOVT R0, #0x5602 0x3418F518: 6800 LDR R0, [R0] 0x3418F51A: 43C0 MVNS R0, R0 0x3418F51C: 9906 LDR R1, [SP, #24] 0x3418F51E: 40C8 LSRS R0, R1 0x3418F520: 05C0 LSLS R0, R0, #23 0x3418F522: 2800 CMP R0, #0 0x3418F524: D40A BMI 46L27 ; 0x3418F53C 0x3418F526: F7F2 FA65 BL HAL_GetTick ; 0x341819F4 0x3418F52A: 9900 LDR R1, [SP, #0] 0x3418F52C: 1A40 SUBS R0, R0, R1 0x3418F52E: 2802 CMP R0, #2 0x3418F530: D303 BCC 46L26 ; 0x3418F53A 0x3418F532: 2003 MOVS R0, #3 0x3418F534: F88D 001F STRB.W R0, [SP, #31] 0x3418F538: E045 B 46L35 ; 0x3418F5C6
.L26: 0x3418F53A: E7E9 B 46L25 ; 0x3418F510
.L27: 0x3418F53C: 9804 LDR R0, [SP, #16] 0x3418F53E: 6800 LDR R0, [R0] 0x3418F540: F020 41F0 BIC R1, R0, #0x78000000 0x3418F544: 9805 LDR R0, [SP, #20] 0x3418F546: 6840 LDR R0, [R0, #4] 0x3418F548: 4308 ORRS R0, R1 0x3418F54A: F040 6000 ORR R0, R0, #0x08000000 0x3418F54E: 9904 LDR R1, [SP, #16] 0x3418F550: 6008 STR R0, [R1] 0x3418F552: E002 B 46L29 ; 0x3418F55A
.L28: 0x3418F554: 2001 MOVS R0, #1 0x3418F556: F88D 0007 STRB.W R0, [SP, #7]
.L29: 0x3418F55A: E030 B 46L34 ; 0x3418F5BE
.L30: 0x3418F55C: 9805 LDR R0, [SP, #20] 0x3418F55E: 6800 LDR R0, [R0] 0x3418F560: 2801 CMP R0, #1 0x3418F562: D12C BNE 46L34 ; 0x3418F5BE 0x3418F564: 9902 LDR R1, [SP, #8] 0x3418F566: 6808 LDR R0, [R1] 0x3418F568: F020 4080 BIC R0, R0, #0x40000000 0x3418F56C: 6008 STR R0, [R1] 0x3418F56E: 9906 LDR R1, [SP, #24] 0x3418F570: F44F 7080 MOV.W R0, #0x0100 0x3418F574: 4088 LSLS R0, R1 0x3418F576: F249 0100 MOVW R1, #0x9000 0x3418F57A: F2C5 6102 MOVT R1, #0x5602 0x3418F57E: 6008 STR R0, [R1] 0x3418F580: F7F2 FA38 BL HAL_GetTick ; 0x341819F4 0x3418F584: 9000 STR R0, [SP, #0]
.L31: 0x3418F586: F248 0004 MOVW R0, #0x8004 0x3418F58A: F2C5 6002 MOVT R0, #0x5602 0x3418F58E: 6800 LDR R0, [R0] 0x3418F590: 43C0 MVNS R0, R0 0x3418F592: 9906 LDR R1, [SP, #24] 0x3418F594: 40C8 LSRS R0, R1 0x3418F596: 05C0 LSLS R0, R0, #23 0x3418F598: 2800 CMP R0, #0 0x3418F59A: D40A BMI 46L33 ; 0x3418F5B2 0x3418F59C: F7F2 FA2A BL HAL_GetTick ; 0x341819F4 0x3418F5A0: 9900 LDR R1, [SP, #0] 0x3418F5A2: 1A40 SUBS R0, R0, R1 0x3418F5A4: 2802 CMP R0, #2 0x3418F5A6: D303 BCC 46L32 ; 0x3418F5B0 0x3418F5A8: 2003 MOVS R0, #3 0x3418F5AA: F88D 001F STRB.W R0, [SP, #31] 0x3418F5AE: E00A B 46L35 ; 0x3418F5C6
.L32: 0x3418F5B0: E7E9 B 46L31 ; 0x3418F586
.L33: 0x3418F5B2: 9904 LDR R1, [SP, #16] 0x3418F5B4: 6808 LDR R0, [R1] 0x3418F5B6: F020 6000 BIC R0, R0, #0x08000000 0x3418F5BA: 6008 STR R0, [R1] 0x3418F5BC: E7FF B 46L34 ; 0x3418F5BE
.L34: 0x3418F5BE: F89D 0007 LDRB.W R0, [SP, #7] 0x3418F5C2: F88D 001F STRB.W R0, [SP, #31]
.L35: 0x3418F5C6: F89D 001F LDRB.W R0, [SP, #31] 0x3418F5CA: B008 ADD SP, SP, #32 0x3418F5CC: BD80 POP 123R7, PC}

Section .init.PAHB_ERR_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


PAHB_ERR_IRQHandler: 0x3418F5CE: E7FE B PAHB_ERR_IRQHandler ; 0x3418F5CE

Section .text.RCC_PLL_Enable from blto2_FSBL_lto.o, size=94, align=4


RCC_PLL_Enable: 0x3418F5D0: B580 PUSH 123R7, LR} 0x3418F5D2: B084 SUB SP, SP, #16 0x3418F5D4: 9002 STR R0, [SP, #8] 0x3418F5D6: 2000 MOVS R0, #0 0x3418F5D8: F88D 0007 STRB.W R0, [SP, #7] 0x3418F5DC: 9902 LDR R1, [SP, #8] 0x3418F5DE: F44F 7080 MOV.W R0, #0x0100 0x3418F5E2: 4088 LSLS R0, R1 0x3418F5E4: F648 0100 MOVW R1, #0x8800 0x3418F5E8: F2C5 6102 MOVT R1, #0x5602 0x3418F5EC: 6008 STR R0, [R1] 0x3418F5EE: F7F2 FA01 BL HAL_GetTick ; 0x341819F4 0x3418F5F2: 9000 STR R0, [SP, #0]
.L1: 0x3418F5F4: F248 0004 MOVW R0, #0x8004 0x3418F5F8: F2C5 6002 MOVT R0, #0x5602 0x3418F5FC: 6800 LDR R0, [R0] 0x3418F5FE: 9902 LDR R1, [SP, #8] 0x3418F600: 40C8 LSRS R0, R1 0x3418F602: 05C0 LSLS R0, R0, #23 0x3418F604: 2800 CMP R0, #0 0x3418F606: D40A BMI 46L3 ; 0x3418F61E 0x3418F608: F7F2 F9F4 BL HAL_GetTick ; 0x341819F4 0x3418F60C: 9900 LDR R1, [SP, #0] 0x3418F60E: 1A40 SUBS R0, R0, R1 0x3418F610: 2802 CMP R0, #2 0x3418F612: D303 BCC 46L2 ; 0x3418F61C 0x3418F614: 2003 MOVS R0, #3 0x3418F616: F88D 000F STRB.W R0, [SP, #15] 0x3418F61A: E004 B 46L4 ; 0x3418F626
.L2: 0x3418F61C: E7EA B 46L1 ; 0x3418F5F4
.L3: 0x3418F61E: F89D 0007 LDRB.W R0, [SP, #7] 0x3418F622: F88D 000F STRB.W R0, [SP, #15]
.L4: 0x3418F626: F89D 000F LDRB.W R0, [SP, #15] 0x3418F62A: B004 ADD SP, SP, #16 0x3418F62C: BD80 POP 123R7, PC}

Section .init.NPU0_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


NPU0_IRQHandler: 0x3418F62E: E7FE B NPU0_IRQHandler ; 0x3418F62E

Section .text.HAL_RCC_ClockConfig from blto2_FSBL_lto.o, size=2498, align=4


HAL_RCC_ClockConfig: 0x3418F630: B580 PUSH 123R7, LR} 0x3418F632: B084 SUB SP, SP, #16 0x3418F634: 9002 STR R0, [SP, #8] 0x3418F636: 9802 LDR R0, [SP, #8] 0x3418F638: B920 CBNZ R0, .L1 ; 0x3418F644 0x3418F63A: 2001 MOVS R0, #1 0x3418F63C: F88D 000F STRB.W R0, [SP, #15] 0x3418F640: F000 BCD3 B.W 46L93 ; 0x3418FFEA
.L1: 0x3418F644: 9802 LDR R0, [SP, #8] 0x3418F646: 6800 LDR R0, [R0] 0x3418F648: 287F CMP R0, #127 0x3418F64A: D800 BHI 46L2 ; 0x3418F64E 0x3418F64C: E007 B 46L3 ; 0x3418F65E
.L2: 0x3418F64E: F244 300F MOVW R0, #0x430F ; 0x3419430F = .rodata..L.str.50 0x3418F652: F2C3 4019 MOVT R0, #0x3419 ; 0x3419430F = .rodata..L.str.50 0x3418F656: F240 3196 MOVW R1, #0x0396 0x3418F65A: F7FE FB1D BL assert_failed ; 0x3418DC98
.L3: 0x3418F65E: 9802 LDR R0, [SP, #8] 0x3418F660: 7800 LDRB R0, [R0] 0x3418F662: 0700 LSLS R0, R0, #28 0x3418F664: 2800 CMP R0, #0 0x3418F666: D53D BPL 46L7 ; 0x3418F6E4 0x3418F668: 9802 LDR R0, [SP, #8] 0x3418F66A: 6900 LDR R0, [R0, #16] 0x3418F66C: B1D8 CBZ R0, .L4 ; 0x3418F6A6 0x3418F66E: 9802 LDR R0, [SP, #8] 0x3418F670: 6900 LDR R0, [R0, #16] 0x3418F672: 2801 CMP R0, #1 0x3418F674: D017 BEQ 46L4 ; 0x3418F6A6 0x3418F676: 9802 LDR R0, [SP, #8] 0x3418F678: 6900 LDR R0, [R0, #16] 0x3418F67A: 2802 CMP R0, #2 0x3418F67C: D013 BEQ 46L4 ; 0x3418F6A6 0x3418F67E: 9802 LDR R0, [SP, #8] 0x3418F680: 6900 LDR R0, [R0, #16] 0x3418F682: 2803 CMP R0, #3 0x3418F684: D00F BEQ 46L4 ; 0x3418F6A6 0x3418F686: 9802 LDR R0, [SP, #8] 0x3418F688: 6900 LDR R0, [R0, #16] 0x3418F68A: 2804 CMP R0, #4 0x3418F68C: D00B BEQ 46L4 ; 0x3418F6A6 0x3418F68E: 9802 LDR R0, [SP, #8] 0x3418F690: 6900 LDR R0, [R0, #16] 0x3418F692: 2805 CMP R0, #5 0x3418F694: D007 BEQ 46L4 ; 0x3418F6A6 0x3418F696: 9802 LDR R0, [SP, #8] 0x3418F698: 6900 LDR R0, [R0, #16] 0x3418F69A: 2806 CMP R0, #6 0x3418F69C: D003 BEQ 46L4 ; 0x3418F6A6 0x3418F69E: 9802 LDR R0, [SP, #8] 0x3418F6A0: 6900 LDR R0, [R0, #16] 0x3418F6A2: 2807 CMP R0, #7 0x3418F6A4: D100 BNE 46L5 ; 0x3418F6A8
.L4: 0x3418F6A6: E007 B 46L6 ; 0x3418F6B8
.L5: 0x3418F6A8: F244 300F MOVW R0, #0x430F ; 0x3419430F = .rodata..L.str.50 0x3418F6AC: F2C3 4019 MOVT R0, #0x3419 ; 0x3419430F = .rodata..L.str.50 0x3418F6B0: F240 319D MOVW R1, #0x039D 0x3418F6B4: F7FE FAF0 BL assert_failed ; 0x3418DC98
.L6: 0x3418F6B8: 9802 LDR R0, [SP, #8] 0x3418F6BA: 6900 LDR R0, [R0, #16] 0x3418F6BC: F248 0124 MOVW R1, #0x8024 0x3418F6C0: F2C5 6102 MOVT R1, #0x5602 0x3418F6C4: 6809 LDR R1, [R1] 0x3418F6C6: F001 0107 AND R1, R1, #7 0x3418F6CA: 4288 CMP R0, R1 0x3418F6CC: D90A BLS 46L7 ; 0x3418F6E4 0x3418F6CE: F248 0124 MOVW R1, #0x8024 0x3418F6D2: F2C5 6102 MOVT R1, #0x5602 0x3418F6D6: 6808 LDR R0, [R1] 0x3418F6D8: F020 0007 BIC R0, R0, #7 0x3418F6DC: 9A02 LDR R2, [SP, #8] 0x3418F6DE: 6912 LDR R2, [R2, #16] 0x3418F6E0: 4310 ORRS R0, R2 0x3418F6E2: 6008 STR R0, [R1]
.L7: 0x3418F6E4: 9802 LDR R0, [SP, #8] 0x3418F6E6: 7800 LDRB R0, [R0] 0x3418F6E8: 06C0 LSLS R0, R0, #27 0x3418F6EA: 2800 CMP R0, #0 0x3418F6EC: D53D BPL 46L11 ; 0x3418F76A 0x3418F6EE: 9802 LDR R0, [SP, #8] 0x3418F6F0: 6940 LDR R0, [R0, #20] 0x3418F6F2: B1D8 CBZ R0, .L8 ; 0x3418F72C 0x3418F6F4: 9802 LDR R0, [SP, #8] 0x3418F6F6: 6940 LDR R0, [R0, #20] 0x3418F6F8: 2810 CMP R0, #16 0x3418F6FA: D017 BEQ 46L8 ; 0x3418F72C 0x3418F6FC: 9802 LDR R0, [SP, #8] 0x3418F6FE: 6940 LDR R0, [R0, #20] 0x3418F700: 2820 CMP R0, #32 0x3418F702: D013 BEQ 46L8 ; 0x3418F72C 0x3418F704: 9802 LDR R0, [SP, #8] 0x3418F706: 6940 LDR R0, [R0, #20] 0x3418F708: 2830 CMP R0, #48 0x3418F70A: D00F BEQ 46L8 ; 0x3418F72C 0x3418F70C: 9802 LDR R0, [SP, #8] 0x3418F70E: 6940 LDR R0, [R0, #20] 0x3418F710: 2840 CMP R0, #64 0x3418F712: D00B BEQ 46L8 ; 0x3418F72C 0x3418F714: 9802 LDR R0, [SP, #8] 0x3418F716: 6940 LDR R0, [R0, #20] 0x3418F718: 2850 CMP R0, #80 0x3418F71A: D007 BEQ 46L8 ; 0x3418F72C 0x3418F71C: 9802 LDR R0, [SP, #8] 0x3418F71E: 6940 LDR R0, [R0, #20] 0x3418F720: 2860 CMP R0, #96 0x3418F722: D003 BEQ 46L8 ; 0x3418F72C 0x3418F724: 9802 LDR R0, [SP, #8] 0x3418F726: 6940 LDR R0, [R0, #20] 0x3418F728: 2870 CMP R0, #112 0x3418F72A: D100 BNE 46L9 ; 0x3418F72E
.L8: 0x3418F72C: E007 B 46L10 ; 0x3418F73E
.L9: 0x3418F72E: F244 300F MOVW R0, #0x430F ; 0x3419430F = .rodata..L.str.50 0x3418F732: F2C3 4019 MOVT R0, #0x3419 ; 0x3419430F = .rodata..L.str.50 0x3418F736: F240 31A7 MOVW R1, #0x03A7 0x3418F73A: F7FE FAAD BL assert_failed ; 0x3418DC98
.L10: 0x3418F73E: 9802 LDR R0, [SP, #8] 0x3418F740: 6940 LDR R0, [R0, #20] 0x3418F742: F248 0124 MOVW R1, #0x8024 0x3418F746: F2C5 6102 MOVT R1, #0x5602 0x3418F74A: 6809 LDR R1, [R1] 0x3418F74C: F001 0170 AND R1, R1, #112 0x3418F750: 4288 CMP R0, R1 0x3418F752: D90A BLS 46L11 ; 0x3418F76A 0x3418F754: F248 0124 MOVW R1, #0x8024 0x3418F758: F2C5 6102 MOVT R1, #0x5602 0x3418F75C: 6808 LDR R0, [R1] 0x3418F75E: F020 0070 BIC R0, R0, #112 0x3418F762: 9A02 LDR R2, [SP, #8] 0x3418F764: 6952 LDR R2, [R2, #20] 0x3418F766: 4310 ORRS R0, R2 0x3418F768: 6008 STR R0, [R1]
.L11: 0x3418F76A: 9802 LDR R0, [SP, #8] 0x3418F76C: 7800 LDRB R0, [R0] 0x3418F76E: 0680 LSLS R0, R0, #26 0x3418F770: 2800 CMP R0, #0 0x3418F772: D544 BPL 46L15 ; 0x3418F7FE 0x3418F774: 9802 LDR R0, [SP, #8] 0x3418F776: 6980 LDR R0, [R0, #24] 0x3418F778: B310 CBZ R0, .L12 ; 0x3418F7C0 0x3418F77A: 9802 LDR R0, [SP, #8] 0x3418F77C: 6980 LDR R0, [R0, #24] 0x3418F77E: F5B0 5F80 CMP.W R0, #0x1000 0x3418F782: D01D BEQ 46L12 ; 0x3418F7C0 0x3418F784: 9802 LDR R0, [SP, #8] 0x3418F786: 6980 LDR R0, [R0, #24] 0x3418F788: F5B0 5F00 CMP.W R0, #0x2000 0x3418F78C: D018 BEQ 46L12 ; 0x3418F7C0 0x3418F78E: 9802 LDR R0, [SP, #8] 0x3418F790: 6980 LDR R0, [R0, #24] 0x3418F792: F5B0 5F40 CMP.W R0, #0x3000 0x3418F796: D013 BEQ 46L12 ; 0x3418F7C0 0x3418F798: 9802 LDR R0, [SP, #8] 0x3418F79A: 6980 LDR R0, [R0, #24] 0x3418F79C: F5B0 4F80 CMP.W R0, #0x4000 0x3418F7A0: D00E BEQ 46L12 ; 0x3418F7C0 0x3418F7A2: 9802 LDR R0, [SP, #8] 0x3418F7A4: 6980 LDR R0, [R0, #24] 0x3418F7A6: F5B0 4FA0 CMP.W R0, #0x5000 0x3418F7AA: D009 BEQ 46L12 ; 0x3418F7C0 0x3418F7AC: 9802 LDR R0, [SP, #8] 0x3418F7AE: 6980 LDR R0, [R0, #24] 0x3418F7B0: F5B0 4FC0 CMP.W R0, #0x6000 0x3418F7B4: D004 BEQ 46L12 ; 0x3418F7C0 0x3418F7B6: 9802 LDR R0, [SP, #8] 0x3418F7B8: 6980 LDR R0, [R0, #24] 0x3418F7BA: F5B0 4FE0 CMP.W R0, #0x7000 0x3418F7BE: D100 BNE 46L13 ; 0x3418F7C2
.L12: 0x3418F7C0: E007 B 46L14 ; 0x3418F7D2
.L13: 0x3418F7C2: F244 300F MOVW R0, #0x430F ; 0x3419430F = .rodata..L.str.50 0x3418F7C6: F2C3 4019 MOVT R0, #0x3419 ; 0x3419430F = .rodata..L.str.50 0x3418F7CA: F240 31B1 MOVW R1, #0x03B1 0x3418F7CE: F7FE FA63 BL assert_failed ; 0x3418DC98
.L14: 0x3418F7D2: 9802 LDR R0, [SP, #8] 0x3418F7D4: 6980 LDR R0, [R0, #24] 0x3418F7D6: F248 0124 MOVW R1, #0x8024 0x3418F7DA: F2C5 6102 MOVT R1, #0x5602 0x3418F7DE: 6809 LDR R1, [R1] 0x3418F7E0: F401 41E0 AND R1, R1, #0x7000 0x3418F7E4: 4288 CMP R0, R1 0x3418F7E6: D90A BLS 46L15 ; 0x3418F7FE 0x3418F7E8: F248 0124 MOVW R1, #0x8024 0x3418F7EC: F2C5 6102 MOVT R1, #0x5602 0x3418F7F0: 6808 LDR R0, [R1] 0x3418F7F2: F420 40E0 BIC R0, R0, #0x7000 0x3418F7F6: 9A02 LDR R2, [SP, #8] 0x3418F7F8: 6992 LDR R2, [R2, #24] 0x3418F7FA: 4310 ORRS R0, R2 0x3418F7FC: 6008 STR R0, [R1]
.L15: 0x3418F7FE: 9802 LDR R0, [SP, #8] 0x3418F800: 7800 LDRB R0, [R0] 0x3418F802: 0640 LSLS R0, R0, #25 0x3418F804: 2800 CMP R0, #0 0x3418F806: D544 BPL 46L19 ; 0x3418F892 0x3418F808: 9802 LDR R0, [SP, #8] 0x3418F80A: 69C0 LDR R0, [R0, #28] 0x3418F80C: B310 CBZ R0, .L16 ; 0x3418F854 0x3418F80E: 9802 LDR R0, [SP, #8] 0x3418F810: 69C0 LDR R0, [R0, #28] 0x3418F812: F5B0 3F80 CMP.W R0, #0x010000 0x3418F816: D01D BEQ 46L16 ; 0x3418F854 0x3418F818: 9802 LDR R0, [SP, #8] 0x3418F81A: 69C0 LDR R0, [R0, #28] 0x3418F81C: F5B0 3F00 CMP.W R0, #0x020000 0x3418F820: D018 BEQ 46L16 ; 0x3418F854 0x3418F822: 9802 LDR R0, [SP, #8] 0x3418F824: 69C0 LDR R0, [R0, #28] 0x3418F826: F5B0 3F40 CMP.W R0, #0x030000 0x3418F82A: D013 BEQ 46L16 ; 0x3418F854 0x3418F82C: 9802 LDR R0, [SP, #8] 0x3418F82E: 69C0 LDR R0, [R0, #28] 0x3418F830: F5B0 2F80 CMP.W R0, #0x040000 0x3418F834: D00E BEQ 46L16 ; 0x3418F854 0x3418F836: 9802 LDR R0, [SP, #8] 0x3418F838: 69C0 LDR R0, [R0, #28] 0x3418F83A: F5B0 2FA0 CMP.W R0, #0x050000 0x3418F83E: D009 BEQ 46L16 ; 0x3418F854 0x3418F840: 9802 LDR R0, [SP, #8] 0x3418F842: 69C0 LDR R0, [R0, #28] 0x3418F844: F5B0 2FC0 CMP.W R0, #0x060000 0x3418F848: D004 BEQ 46L16 ; 0x3418F854 0x3418F84A: 9802 LDR R0, [SP, #8] 0x3418F84C: 69C0 LDR R0, [R0, #28] 0x3418F84E: F5B0 2FE0 CMP.W R0, #0x070000 0x3418F852: D100 BNE 46L17 ; 0x3418F856
.L16: 0x3418F854: E007 B 46L18 ; 0x3418F866
.L17: 0x3418F856: F244 300F MOVW R0, #0x430F ; 0x3419430F = .rodata..L.str.50 0x3418F85A: F2C3 4019 MOVT R0, #0x3419 ; 0x3419430F = .rodata..L.str.50 0x3418F85E: F240 31BB MOVW R1, #0x03BB 0x3418F862: F7FE FA19 BL assert_failed ; 0x3418DC98
.L18: 0x3418F866: 9802 LDR R0, [SP, #8] 0x3418F868: 69C0 LDR R0, [R0, #28] 0x3418F86A: F248 0124 MOVW R1, #0x8024 0x3418F86E: F2C5 6102 MOVT R1, #0x5602 0x3418F872: 6809 LDR R1, [R1] 0x3418F874: F401 21E0 AND R1, R1, #0x070000 0x3418F878: 4288 CMP R0, R1 0x3418F87A: D90A BLS 46L19 ; 0x3418F892 0x3418F87C: F248 0124 MOVW R1, #0x8024 0x3418F880: F2C5 6102 MOVT R1, #0x5602 0x3418F884: 6808 LDR R0, [R1] 0x3418F886: F420 20E0 BIC R0, R0, #0x070000 0x3418F88A: 9A02 LDR R2, [SP, #8] 0x3418F88C: 69D2 LDR R2, [R2, #28] 0x3418F88E: 4310 ORRS R0, R2 0x3418F890: 6008 STR R0, [R1]
.L19: 0x3418F892: 9802 LDR R0, [SP, #8] 0x3418F894: 7800 LDRB R0, [R0] 0x3418F896: 0740 LSLS R0, R0, #29 0x3418F898: 2800 CMP R0, #0 0x3418F89A: D544 BPL 46L23 ; 0x3418F926 0x3418F89C: 9802 LDR R0, [SP, #8] 0x3418F89E: 68C0 LDR R0, [R0, #12] 0x3418F8A0: B310 CBZ R0, .L20 ; 0x3418F8E8 0x3418F8A2: 9802 LDR R0, [SP, #8] 0x3418F8A4: 68C0 LDR R0, [R0, #12] 0x3418F8A6: F5B0 1F80 CMP.W R0, #0x100000 0x3418F8AA: D01D BEQ 46L20 ; 0x3418F8E8 0x3418F8AC: 9802 LDR R0, [SP, #8] 0x3418F8AE: 68C0 LDR R0, [R0, #12] 0x3418F8B0: F5B0 1F00 CMP.W R0, #0x200000 0x3418F8B4: D018 BEQ 46L20 ; 0x3418F8E8 0x3418F8B6: 9802 LDR R0, [SP, #8] 0x3418F8B8: 68C0 LDR R0, [R0, #12] 0x3418F8BA: F5B0 1F40 CMP.W R0, #0x300000 0x3418F8BE: D013 BEQ 46L20 ; 0x3418F8E8 0x3418F8C0: 9802 LDR R0, [SP, #8] 0x3418F8C2: 68C0 LDR R0, [R0, #12] 0x3418F8C4: F5B0 0F80 CMP.W R0, #0x400000 0x3418F8C8: D00E BEQ 46L20 ; 0x3418F8E8 0x3418F8CA: 9802 LDR R0, [SP, #8] 0x3418F8CC: 68C0 LDR R0, [R0, #12] 0x3418F8CE: F5B0 0FA0 CMP.W R0, #0x500000 0x3418F8D2: D009 BEQ 46L20 ; 0x3418F8E8 0x3418F8D4: 9802 LDR R0, [SP, #8] 0x3418F8D6: 68C0 LDR R0, [R0, #12] 0x3418F8D8: F5B0 0FC0 CMP.W R0, #0x600000 0x3418F8DC: D004 BEQ 46L20 ; 0x3418F8E8 0x3418F8DE: 9802 LDR R0, [SP, #8] 0x3418F8E0: 68C0 LDR R0, [R0, #12] 0x3418F8E2: F5B0 0FE0 CMP.W R0, #0x700000 0x3418F8E6: D100 BNE 46L21 ; 0x3418F8EA
.L20: 0x3418F8E8: E007 B 46L22 ; 0x3418F8FA
.L21: 0x3418F8EA: F244 300F MOVW R0, #0x430F ; 0x3419430F = .rodata..L.str.50 0x3418F8EE: F2C3 4019 MOVT R0, #0x3419 ; 0x3419430F = .rodata..L.str.50 0x3418F8F2: F240 31C5 MOVW R1, #0x03C5 0x3418F8F6: F7FE F9CF BL assert_failed ; 0x3418DC98
.L22: 0x3418F8FA: 9802 LDR R0, [SP, #8] 0x3418F8FC: 68C0 LDR R0, [R0, #12] 0x3418F8FE: F248 0124 MOVW R1, #0x8024 0x3418F902: F2C5 6102 MOVT R1, #0x5602 0x3418F906: 6809 LDR R1, [R1] 0x3418F908: F401 01E0 AND R1, R1, #0x700000 0x3418F90C: 4288 CMP R0, R1 0x3418F90E: D90A BLS 46L23 ; 0x3418F926 0x3418F910: F248 0124 MOVW R1, #0x8024 0x3418F914: F2C5 6102 MOVT R1, #0x5602 0x3418F918: 6808 LDR R0, [R1] 0x3418F91A: F420 00E0 BIC R0, R0, #0x700000 0x3418F91E: 9A02 LDR R2, [SP, #8] 0x3418F920: 68D2 LDR R2, [R2, #12] 0x3418F922: 4310 ORRS R0, R2 0x3418F924: 6008 STR R0, [R1]
.L23: 0x3418F926: 9802 LDR R0, [SP, #8] 0x3418F928: 7800 LDRB R0, [R0] 0x3418F92A: 07C0 LSLS R0, R0, #31 0x3418F92C: 2800 CMP R0, #0 0x3418F92E: F000 80B3 BEQ.W 46L42 ; 0x3418FA98 0x3418F932: 9802 LDR R0, [SP, #8] 0x3418F934: 6840 LDR R0, [R0, #4] 0x3418F936: B170 CBZ R0, .L24 ; 0x3418F956 0x3418F938: 9802 LDR R0, [SP, #8] 0x3418F93A: 6840 LDR R0, [R0, #4] 0x3418F93C: F5B0 3F80 CMP.W R0, #0x010000 0x3418F940: D009 BEQ 46L24 ; 0x3418F956 0x3418F942: 9802 LDR R0, [SP, #8] 0x3418F944: 6840 LDR R0, [R0, #4] 0x3418F946: F5B0 3F00 CMP.W R0, #0x020000 0x3418F94A: D004 BEQ 46L24 ; 0x3418F956 0x3418F94C: 9802 LDR R0, [SP, #8] 0x3418F94E: 6840 LDR R0, [R0, #4] 0x3418F950: F5B0 3F40 CMP.W R0, #0x030000 0x3418F954: D100 BNE 46L25 ; 0x3418F958
.L24: 0x3418F956: E007 B 46L26 ; 0x3418F968
.L25: 0x3418F958: F244 300F MOVW R0, #0x430F ; 0x3419430F = .rodata..L.str.50 0x3418F95C: F2C3 4019 MOVT R0, #0x3419 ; 0x3419430F = .rodata..L.str.50 0x3418F960: F44F 7174 MOV.W R1, #0x03D0 0x3418F964: F7FE F998 BL assert_failed ; 0x3418DC98
.L26: 0x3418F968: 9802 LDR R0, [SP, #8] 0x3418F96A: 6840 LDR R0, [R0, #4] 0x3418F96C: F5B0 3F00 CMP.W R0, #0x020000 0x3418F970: D107 BNE 46L28 ; 0x3418F982 0x3418F972: F7F2 FE4B BL LL_RCC_HSE_IsReady ; 0x3418260C 0x3418F976: B918 CBNZ R0, .L27 ; 0x3418F980 0x3418F978: 2001 MOVS R0, #1 0x3418F97A: F88D 000F STRB.W R0, [SP, #15] 0x3418F97E: E334 B 46L93 ; 0x3418FFEA
.L27: 0x3418F980: E061 B 46L38 ; 0x3418FA46
.L28: 0x3418F982: 9802 LDR R0, [SP, #8] 0x3418F984: 6840 LDR R0, [R0, #4] 0x3418F986: F5B0 3F40 CMP.W R0, #0x030000 0x3418F98A: D148 BNE 46L35 ; 0x3418FA1E 0x3418F98C: 9802 LDR R0, [SP, #8] 0x3418F98E: 6A00 LDR R0, [R0, #32] 0x3418F990: B170 CBZ R0, .L29 ; 0x3418F9B0 0x3418F992: 9802 LDR R0, [SP, #8] 0x3418F994: 6A00 LDR R0, [R0, #32] 0x3418F996: F1B0 5F80 CMP.W R0, #0x10000000 0x3418F99A: D009 BEQ 46L29 ; 0x3418F9B0 0x3418F99C: 9802 LDR R0, [SP, #8] 0x3418F99E: 6A00 LDR R0, [R0, #32] 0x3418F9A0: F1B0 5F00 CMP.W R0, #0x20000000 0x3418F9A4: D004 BEQ 46L29 ; 0x3418F9B0 0x3418F9A6: 9802 LDR R0, [SP, #8] 0x3418F9A8: 6A00 LDR R0, [R0, #32] 0x3418F9AA: F1B0 5F40 CMP.W R0, #0x30000000 0x3418F9AE: D100 BNE 46L30 ; 0x3418F9B2
.L29: 0x3418F9B0: E007 B 46L31 ; 0x3418F9C2
.L30: 0x3418F9B2: F244 300F MOVW R0, #0x430F ; 0x3419430F = .rodata..L.str.50 0x3418F9B6: F2C3 4019 MOVT R0, #0x3419 ; 0x3419430F = .rodata..L.str.50 0x3418F9BA: F240 31DF MOVW R1, #0x03DF 0x3418F9BE: F7FE F96B BL assert_failed ; 0x3418DC98
.L31: 0x3418F9C2: 9802 LDR R0, [SP, #8] 0x3418F9C4: 6A40 LDR R0, [R0, #36] 0x3418F9C6: B128 CBZ R0, .L32 ; 0x3418F9D4 0x3418F9C8: 9802 LDR R0, [SP, #8] 0x3418F9CA: 6A40 LDR R0, [R0, #36] 0x3418F9CC: F5B0 7F80 CMP.W R0, #0x0100 0x3418F9D0: D800 BHI 46L32 ; 0x3418F9D4 0x3418F9D2: E007 B 46L33 ; 0x3418F9E4
.L32: 0x3418F9D4: F244 300F MOVW R0, #0x430F ; 0x3419430F = .rodata..L.str.50 0x3418F9D8: F2C3 4019 MOVT R0, #0x3419 ; 0x3419430F = .rodata..L.str.50 0x3418F9DC: F44F 7178 MOV.W R1, #0x03E0 0x3418F9E0: F7FE F95A BL assert_failed ; 0x3418DC98
.L33: 0x3418F9E4: F7F2 FDB0 BL LL_RCC_IC1_GetSource ; 0x34182548 0x3418F9E8: 9902 LDR R1, [SP, #8] 0x3418F9EA: 6A09 LDR R1, [R1, #32] 0x3418F9EC: F000 FB02 BL RCC_IC_CheckPLLSources ; 0x3418FFF4 0x3418F9F0: 2801 CMP R0, #1 0x3418F9F2: D003 BEQ 46L34 ; 0x3418F9FC 0x3418F9F4: 2001 MOVS R0, #1 0x3418F9F6: F88D 000F STRB.W R0, [SP, #15] 0x3418F9FA: E2F6 B 46L93 ; 0x3418FFEA
.L34: 0x3418F9FC: 9902 LDR R1, [SP, #8] 0x3418F9FE: 6A08 LDR R0, [R1, #32] 0x3418FA00: 6A4A LDR R2, [R1, #36] 0x3418FA02: 2100 MOVS R1, #0 0x3418FA04: F6CF 71FF MOVT R1, #0xFFFF 0x3418FA08: EB01 4102 ADD.W R1, R1, R2, LSL #16 0x3418FA0C: 4308 ORRS R0, R1 0x3418FA0E: F248 01C4 MOVW R1, #0x80C4 0x3418FA12: F2C5 6102 MOVT R1, #0x5602 0x3418FA16: 6008 STR R0, [R1] 0x3418FA18: F000 FB62 BL LL_RCC_IC1_Enable ; 0x341900E0 0x3418FA1C: E013 B 46L38 ; 0x3418FA46
.L35: 0x3418FA1E: 9802 LDR R0, [SP, #8] 0x3418FA20: 6840 LDR R0, [R0, #4] 0x3418FA22: F5B0 3F80 CMP.W R0, #0x010000 0x3418FA26: D107 BNE 46L37 ; 0x3418FA38 0x3418FA28: F7F2 FD6E BL LL_RCC_MSI_IsReady ; 0x34182508 0x3418FA2C: B918 CBNZ R0, .L36 ; 0x3418FA36 0x3418FA2E: 2001 MOVS R0, #1 0x3418FA30: F88D 000F STRB.W R0, [SP, #15] 0x3418FA34: E2D9 B 46L93 ; 0x3418FFEA
.L36: 0x3418FA36: E006 B 46L38 ; 0x3418FA46
.L37: 0x3418FA38: F7F2 FD20 BL LL_RCC_HSI_IsReady ; 0x3418247C 0x3418FA3C: B918 CBNZ R0, .L38 ; 0x3418FA46 0x3418FA3E: 2001 MOVS R0, #1 0x3418FA40: F88D 000F STRB.W R0, [SP, #15] 0x3418FA44: E2D1 B 46L93 ; 0x3418FFEA
.L38: 0x3418FA46: F248 0120 MOVW R1, #0x8020 0x3418FA4A: F2C5 6102 MOVT R1, #0x5602 0x3418FA4E: 6808 LDR R0, [R1] 0x3418FA50: F420 3040 BIC R0, R0, #0x030000 0x3418FA54: 9A02 LDR R2, [SP, #8] 0x3418FA56: 6852 LDR R2, [R2, #4] 0x3418FA58: 4310 ORRS R0, R2 0x3418FA5A: 6008 STR R0, [R1] 0x3418FA5C: F7F1 FFCA BL HAL_GetTick ; 0x341819F4 0x3418FA60: 9001 STR R0, [SP, #4]
.L39: 0x3418FA62: F7F2 FD13 BL LL_RCC_GetCpuClkSource ; 0x3418248C 0x3418FA66: 9902 LDR R1, [SP, #8] 0x3418FA68: 6849 LDR R1, [R1, #4] 0x3418FA6A: 0109 LSLS R1, R1, #4 0x3418FA6C: 4288 CMP R0, R1 0x3418FA6E: D00C BEQ 46L41 ; 0x3418FA8A 0x3418FA70: F7F1 FFC0 BL HAL_GetTick ; 0x341819F4 0x3418FA74: 9901 LDR R1, [SP, #4] 0x3418FA76: 1A40 SUBS R0, R0, R1 0x3418FA78: F241 3189 MOVW R1, #0x1389 0x3418FA7C: 4288 CMP R0, R1 0x3418FA7E: D303 BCC 46L40 ; 0x3418FA88 0x3418FA80: 2003 MOVS R0, #3 0x3418FA82: F88D 000F STRB.W R0, [SP, #15] 0x3418FA86: E2B0 B 46L93 ; 0x3418FFEA
.L40: 0x3418FA88: E7EB B 46L39 ; 0x3418FA62
.L41: 0x3418FA8A: F000 FB31 BL HAL_RCC_GetCpuClockFreq ; 0x341900F0 0x3418FA8E: F240 718C MOVW R1, #0x078C ; 0x3400078C = SystemCoreClock 0x3418FA92: F2C3 4100 MOVT R1, #0x3400 ; 0x3400078C = SystemCoreClock 0x3418FA96: 6008 STR R0, [R1]
.L42: 0x3418FA98: 9802 LDR R0, [SP, #8] 0x3418FA9A: 7800 LDRB R0, [R0] 0x3418FA9C: 0780 LSLS R0, R0, #30 0x3418FA9E: 2800 CMP R0, #0 0x3418FAA0: F140 8136 BPL.W 46L72 ; 0x3418FD10 0x3418FAA4: 9802 LDR R0, [SP, #8] 0x3418FAA6: 6880 LDR R0, [R0, #8] 0x3418FAA8: B170 CBZ R0, .L43 ; 0x3418FAC8 0x3418FAAA: 9802 LDR R0, [SP, #8] 0x3418FAAC: 6880 LDR R0, [R0, #8] 0x3418FAAE: F1B0 7F80 CMP.W R0, #0x01000000 0x3418FAB2: D009 BEQ 46L43 ; 0x3418FAC8 0x3418FAB4: 9802 LDR R0, [SP, #8] 0x3418FAB6: 6880 LDR R0, [R0, #8] 0x3418FAB8: F1B0 7F00 CMP.W R0, #0x02000000 0x3418FABC: D004 BEQ 46L43 ; 0x3418FAC8 0x3418FABE: 9802 LDR R0, [SP, #8] 0x3418FAC0: 6880 LDR R0, [R0, #8] 0x3418FAC2: F1B0 7F40 CMP.W R0, #0x03000000 0x3418FAC6: D100 BNE 46L44 ; 0x3418FACA
.L43: 0x3418FAC8: E007 B 46L45 ; 0x3418FADA
.L44: 0x3418FACA: F244 300F MOVW R0, #0x430F ; 0x3419430F = .rodata..L.str.50 0x3418FACE: F2C3 4019 MOVT R0, #0x3419 ; 0x3419430F = .rodata..L.str.50 0x3418FAD2: F240 4119 MOVW R1, #0x0419 0x3418FAD6: F7FE F8DF BL assert_failed ; 0x3418DC98
.L45: 0x3418FADA: 9802 LDR R0, [SP, #8] 0x3418FADC: 6880 LDR R0, [R0, #8] 0x3418FADE: F1B0 7F00 CMP.W R0, #0x02000000 0x3418FAE2: D107 BNE 46L47 ; 0x3418FAF4 0x3418FAE4: F7F2 FD92 BL LL_RCC_HSE_IsReady ; 0x3418260C 0x3418FAE8: B918 CBNZ R0, .L46 ; 0x3418FAF2 0x3418FAEA: 2001 MOVS R0, #1 0x3418FAEC: F88D 000F STRB.W R0, [SP, #15] 0x3418FAF0: E27B B 46L93 ; 0x3418FFEA
.L46: 0x3418FAF2: E0EB B 46L69 ; 0x3418FCCC
.L47: 0x3418FAF4: 9802 LDR R0, [SP, #8] 0x3418FAF6: 6880 LDR R0, [R0, #8] 0x3418FAF8: F1B0 7F40 CMP.W R0, #0x03000000 0x3418FAFC: F040 80D4 BNE.W 46L66 ; 0x3418FCA8 0x3418FB00: 9802 LDR R0, [SP, #8] 0x3418FB02: 6A80 LDR R0, [R0, #40] 0x3418FB04: B170 CBZ R0, .L48 ; 0x3418FB24 0x3418FB06: 9802 LDR R0, [SP, #8] 0x3418FB08: 6A80 LDR R0, [R0, #40] 0x3418FB0A: F1B0 5F80 CMP.W R0, #0x10000000 0x3418FB0E: D009 BEQ 46L48 ; 0x3418FB24 0x3418FB10: 9802 LDR R0, [SP, #8] 0x3418FB12: 6A80 LDR R0, [R0, #40] 0x3418FB14: F1B0 5F00 CMP.W R0, #0x20000000 0x3418FB18: D004 BEQ 46L48 ; 0x3418FB24 0x3418FB1A: 9802 LDR R0, [SP, #8] 0x3418FB1C: 6A80 LDR R0, [R0, #40] 0x3418FB1E: F1B0 5F40 CMP.W R0, #0x30000000 0x3418FB22: D100 BNE 46L49 ; 0x3418FB26
.L48: 0x3418FB24: E007 B 46L50 ; 0x3418FB36
.L49: 0x3418FB26: F244 300F MOVW R0, #0x430F ; 0x3419430F = .rodata..L.str.50 0x3418FB2A: F2C3 4019 MOVT R0, #0x3419 ; 0x3419430F = .rodata..L.str.50 0x3418FB2E: F44F 6185 MOV.W R1, #0x0428 0x3418FB32: F7FE F8B1 BL assert_failed ; 0x3418DC98
.L50: 0x3418FB36: 9802 LDR R0, [SP, #8] 0x3418FB38: 6AC0 LDR R0, [R0, #44] 0x3418FB3A: B128 CBZ R0, .L51 ; 0x3418FB48 0x3418FB3C: 9802 LDR R0, [SP, #8] 0x3418FB3E: 6AC0 LDR R0, [R0, #44] 0x3418FB40: F5B0 7F80 CMP.W R0, #0x0100 0x3418FB44: D800 BHI 46L51 ; 0x3418FB48 0x3418FB46: E007 B 46L52 ; 0x3418FB58
.L51: 0x3418FB48: F244 300F MOVW R0, #0x430F ; 0x3419430F = .rodata..L.str.50 0x3418FB4C: F2C3 4019 MOVT R0, #0x3419 ; 0x3419430F = .rodata..L.str.50 0x3418FB50: F240 4129 MOVW R1, #0x0429 0x3418FB54: F7FE F8A0 BL assert_failed ; 0x3418DC98
.L52: 0x3418FB58: 9802 LDR R0, [SP, #8] 0x3418FB5A: 6B00 LDR R0, [R0, #48] 0x3418FB5C: B170 CBZ R0, .L53 ; 0x3418FB7C 0x3418FB5E: 9802 LDR R0, [SP, #8] 0x3418FB60: 6B00 LDR R0, [R0, #48] 0x3418FB62: F1B0 5F80 CMP.W R0, #0x10000000 0x3418FB66: D009 BEQ 46L53 ; 0x3418FB7C 0x3418FB68: 9802 LDR R0, [SP, #8] 0x3418FB6A: 6B00 LDR R0, [R0, #48] 0x3418FB6C: F1B0 5F00 CMP.W R0, #0x20000000 0x3418FB70: D004 BEQ 46L53 ; 0x3418FB7C 0x3418FB72: 9802 LDR R0, [SP, #8] 0x3418FB74: 6B00 LDR R0, [R0, #48] 0x3418FB76: F1B0 5F40 CMP.W R0, #0x30000000 0x3418FB7A: D100 BNE 46L54 ; 0x3418FB7E
.L53: 0x3418FB7C: E007 B 46L55 ; 0x3418FB8E
.L54: 0x3418FB7E: F244 300F MOVW R0, #0x430F ; 0x3419430F = .rodata..L.str.50 0x3418FB82: F2C3 4019 MOVT R0, #0x3419 ; 0x3419430F = .rodata..L.str.50 0x3418FB86: F240 412A MOVW R1, #0x042A 0x3418FB8A: F7FE F885 BL assert_failed ; 0x3418DC98
.L55: 0x3418FB8E: 9802 LDR R0, [SP, #8] 0x3418FB90: 6B40 LDR R0, [R0, #52] 0x3418FB92: B128 CBZ R0, .L56 ; 0x3418FBA0 0x3418FB94: 9802 LDR R0, [SP, #8] 0x3418FB96: 6B40 LDR R0, [R0, #52] 0x3418FB98: F5B0 7F80 CMP.W R0, #0x0100 0x3418FB9C: D800 BHI 46L56 ; 0x3418FBA0 0x3418FB9E: E007 B 46L57 ; 0x3418FBB0
.L56: 0x3418FBA0: F244 300F MOVW R0, #0x430F ; 0x3419430F = .rodata..L.str.50 0x3418FBA4: F2C3 4019 MOVT R0, #0x3419 ; 0x3419430F = .rodata..L.str.50 0x3418FBA8: F240 412B MOVW R1, #0x042B 0x3418FBAC: F7FE F874 BL assert_failed ; 0x3418DC98
.L57: 0x3418FBB0: 9802 LDR R0, [SP, #8] 0x3418FBB2: 6B80 LDR R0, [R0, #56] 0x3418FBB4: B170 CBZ R0, .L58 ; 0x3418FBD4 0x3418FBB6: 9802 LDR R0, [SP, #8] 0x3418FBB8: 6B80 LDR R0, [R0, #56] 0x3418FBBA: F1B0 5F80 CMP.W R0, #0x10000000 0x3418FBBE: D009 BEQ 46L58 ; 0x3418FBD4 0x3418FBC0: 9802 LDR R0, [SP, #8] 0x3418FBC2: 6B80 LDR R0, [R0, #56] 0x3418FBC4: F1B0 5F00 CMP.W R0, #0x20000000 0x3418FBC8: D004 BEQ 46L58 ; 0x3418FBD4 0x3418FBCA: 9802 LDR R0, [SP, #8] 0x3418FBCC: 6B80 LDR R0, [R0, #56] 0x3418FBCE: F1B0 5F40 CMP.W R0, #0x30000000 0x3418FBD2: D100 BNE 46L59 ; 0x3418FBD6
.L58: 0x3418FBD4: E007 B 46L60 ; 0x3418FBE6
.L59: 0x3418FBD6: F244 300F MOVW R0, #0x430F ; 0x3419430F = .rodata..L.str.50 0x3418FBDA: F2C3 4019 MOVT R0, #0x3419 ; 0x3419430F = .rodata..L.str.50 0x3418FBDE: F240 412C MOVW R1, #0x042C 0x3418FBE2: F7FE F859 BL assert_failed ; 0x3418DC98
.L60: 0x3418FBE6: 9802 LDR R0, [SP, #8] 0x3418FBE8: 6BC0 LDR R0, [R0, #60] 0x3418FBEA: B128 CBZ R0, .L61 ; 0x3418FBF8 0x3418FBEC: 9802 LDR R0, [SP, #8] 0x3418FBEE: 6BC0 LDR R0, [R0, #60] 0x3418FBF0: F5B0 7F80 CMP.W R0, #0x0100 0x3418FBF4: D800 BHI 46L61 ; 0x3418FBF8 0x3418FBF6: E007 B 46L62 ; 0x3418FC08
.L61: 0x3418FBF8: F244 300F MOVW R0, #0x430F ; 0x3419430F = .rodata..L.str.50 0x3418FBFC: F2C3 4019 MOVT R0, #0x3419 ; 0x3419430F = .rodata..L.str.50 0x3418FC00: F240 412D MOVW R1, #0x042D 0x3418FC04: F7FE F848 BL assert_failed ; 0x3418DC98
.L62: 0x3418FC08: F7F2 FCA6 BL LL_RCC_IC2_GetSource ; 0x34182558 0x3418FC0C: 9902 LDR R1, [SP, #8] 0x3418FC0E: 6A89 LDR R1, [R1, #40] 0x3418FC10: F000 F9F0 BL RCC_IC_CheckPLLSources ; 0x3418FFF4 0x3418FC14: 2801 CMP R0, #1 0x3418FC16: D003 BEQ 46L63 ; 0x3418FC20 0x3418FC18: 2001 MOVS R0, #1 0x3418FC1A: F88D 000F STRB.W R0, [SP, #15] 0x3418FC1E: E1E4 B 46L93 ; 0x3418FFEA
.L63: 0x3418FC20: F7F2 FCA2 BL LL_RCC_IC6_GetSource ; 0x34182568 0x3418FC24: 9902 LDR R1, [SP, #8] 0x3418FC26: 6B09 LDR R1, [R1, #48] 0x3418FC28: F000 F9E4 BL RCC_IC_CheckPLLSources ; 0x3418FFF4 0x3418FC2C: 2801 CMP R0, #1 0x3418FC2E: D003 BEQ 46L64 ; 0x3418FC38 0x3418FC30: 2001 MOVS R0, #1 0x3418FC32: F88D 000F STRB.W R0, [SP, #15] 0x3418FC36: E1D8 B 46L93 ; 0x3418FFEA
.L64: 0x3418FC38: F7F2 FC9E BL LL_RCC_IC11_GetSource ; 0x34182578 0x3418FC3C: 9902 LDR R1, [SP, #8] 0x3418FC3E: 6B89 LDR R1, [R1, #56] 0x3418FC40: F000 F9D8 BL RCC_IC_CheckPLLSources ; 0x3418FFF4 0x3418FC44: 2801 CMP R0, #1 0x3418FC46: D003 BEQ 46L65 ; 0x3418FC50 0x3418FC48: 2001 MOVS R0, #1 0x3418FC4A: F88D 000F STRB.W R0, [SP, #15] 0x3418FC4E: E1CC B 46L93 ; 0x3418FFEA
.L65: 0x3418FC50: 9902 LDR R1, [SP, #8] 0x3418FC52: 6A88 LDR R0, [R1, #40] 0x3418FC54: 6ACA LDR R2, [R1, #44] 0x3418FC56: 2100 MOVS R1, #0 0x3418FC58: F6CF 71FF MOVT R1, #0xFFFF 0x3418FC5C: EB01 4202 ADD.W R2, R1, R2, LSL #16 0x3418FC60: 4310 ORRS R0, R2 0x3418FC62: F248 02C8 MOVW R2, #0x80C8 0x3418FC66: F2C5 6202 MOVT R2, #0x5602 0x3418FC6A: 6010 STR R0, [R2] 0x3418FC6C: 9A02 LDR R2, [SP, #8] 0x3418FC6E: 6B10 LDR R0, [R2, #48] 0x3418FC70: 6B52 LDR R2, [R2, #52] 0x3418FC72: EB01 4202 ADD.W R2, R1, R2, LSL #16 0x3418FC76: 4310 ORRS R0, R2 0x3418FC78: F248 02D8 MOVW R2, #0x80D8 0x3418FC7C: F2C5 6202 MOVT R2, #0x5602 0x3418FC80: 6010 STR R0, [R2] 0x3418FC82: 9A02 LDR R2, [SP, #8] 0x3418FC84: 6B90 LDR R0, [R2, #56] 0x3418FC86: 6BD2 LDR R2, [R2, #60] 0x3418FC88: EB01 4102 ADD.W R1, R1, R2, LSL #16 0x3418FC8C: 4308 ORRS R0, R1 0x3418FC8E: F248 01EC MOVW R1, #0x80EC 0x3418FC92: F2C5 6102 MOVT R1, #0x5602 0x3418FC96: 6008 STR R0, [R1] 0x3418FC98: F648 2140 MOVW R1, #0x8A40 0x3418FC9C: F2C5 6102 MOVT R1, #0x5602 0x3418FCA0: F240 4022 MOVW R0, #0x0422 0x3418FCA4: 6008 STR R0, [R1] 0x3418FCA6: E011 B 46L69 ; 0x3418FCCC
.L66: 0x3418FCA8: 9802 LDR R0, [SP, #8] 0x3418FCAA: 6880 LDR R0, [R0, #8] 0x3418FCAC: B938 CBNZ R0, .L68 ; 0x3418FCBE 0x3418FCAE: F7F2 FBE5 BL LL_RCC_HSI_IsReady ; 0x3418247C 0x3418FCB2: B918 CBNZ R0, .L67 ; 0x3418FCBC 0x3418FCB4: 2001 MOVS R0, #1 0x3418FCB6: F88D 000F STRB.W R0, [SP, #15] 0x3418FCBA: E196 B 46L93 ; 0x3418FFEA
.L67: 0x3418FCBC: E006 B 46L69 ; 0x3418FCCC
.L68: 0x3418FCBE: F7F2 FC23 BL LL_RCC_MSI_IsReady ; 0x34182508 0x3418FCC2: B918 CBNZ R0, .L69 ; 0x3418FCCC 0x3418FCC4: 2001 MOVS R0, #1 0x3418FCC6: F88D 000F STRB.W R0, [SP, #15] 0x3418FCCA: E18E B 46L93 ; 0x3418FFEA
.L69: 0x3418FCCC: F248 0120 MOVW R1, #0x8020 0x3418FCD0: F2C5 6102 MOVT R1, #0x5602 0x3418FCD4: 6808 LDR R0, [R1] 0x3418FCD6: F020 7040 BIC R0, R0, #0x03000000 0x3418FCDA: 9A02 LDR R2, [SP, #8] 0x3418FCDC: 6892 LDR R2, [R2, #8] 0x3418FCDE: 4310 ORRS R0, R2 0x3418FCE0: 6008 STR R0, [R1] 0x3418FCE2: F7F1 FE87 BL HAL_GetTick ; 0x341819F4 0x3418FCE6: 9001 STR R0, [SP, #4]
.L70: 0x3418FCE8: F7F2 FBD8 BL LL_RCC_GetSysClkSource ; 0x3418249C 0x3418FCEC: 9902 LDR R1, [SP, #8] 0x3418FCEE: 6889 LDR R1, [R1, #8] 0x3418FCF0: 0109 LSLS R1, R1, #4 0x3418FCF2: 4288 CMP R0, R1 0x3418FCF4: D00C BEQ 46L72 ; 0x3418FD10 0x3418FCF6: F7F1 FE7D BL HAL_GetTick ; 0x341819F4 0x3418FCFA: 9901 LDR R1, [SP, #4] 0x3418FCFC: 1A40 SUBS R0, R0, R1 0x3418FCFE: F241 3189 MOVW R1, #0x1389 0x3418FD02: 4288 CMP R0, R1 0x3418FD04: D303 BCC 46L71 ; 0x3418FD0E 0x3418FD06: 2003 MOVS R0, #3 0x3418FD08: F88D 000F STRB.W R0, [SP, #15] 0x3418FD0C: E16D B 46L93 ; 0x3418FFEA
.L71: 0x3418FD0E: E7EB B 46L70 ; 0x3418FCE8
.L72: 0x3418FD10: 9802 LDR R0, [SP, #8] 0x3418FD12: 7800 LDRB R0, [R0] 0x3418FD14: 0740 LSLS R0, R0, #29 0x3418FD16: 2800 CMP R0, #0 0x3418FD18: D544 BPL 46L76 ; 0x3418FDA4 0x3418FD1A: 9802 LDR R0, [SP, #8] 0x3418FD1C: 68C0 LDR R0, [R0, #12] 0x3418FD1E: B310 CBZ R0, .L73 ; 0x3418FD66 0x3418FD20: 9802 LDR R0, [SP, #8] 0x3418FD22: 68C0 LDR R0, [R0, #12] 0x3418FD24: F5B0 1F80 CMP.W R0, #0x100000 0x3418FD28: D01D BEQ 46L73 ; 0x3418FD66 0x3418FD2A: 9802 LDR R0, [SP, #8] 0x3418FD2C: 68C0 LDR R0, [R0, #12] 0x3418FD2E: F5B0 1F00 CMP.W R0, #0x200000 0x3418FD32: D018 BEQ 46L73 ; 0x3418FD66 0x3418FD34: 9802 LDR R0, [SP, #8] 0x3418FD36: 68C0 LDR R0, [R0, #12] 0x3418FD38: F5B0 1F40 CMP.W R0, #0x300000 0x3418FD3C: D013 BEQ 46L73 ; 0x3418FD66 0x3418FD3E: 9802 LDR R0, [SP, #8] 0x3418FD40: 68C0 LDR R0, [R0, #12] 0x3418FD42: F5B0 0F80 CMP.W R0, #0x400000 0x3418FD46: D00E BEQ 46L73 ; 0x3418FD66 0x3418FD48: 9802 LDR R0, [SP, #8] 0x3418FD4A: 68C0 LDR R0, [R0, #12] 0x3418FD4C: F5B0 0FA0 CMP.W R0, #0x500000 0x3418FD50: D009 BEQ 46L73 ; 0x3418FD66 0x3418FD52: 9802 LDR R0, [SP, #8] 0x3418FD54: 68C0 LDR R0, [R0, #12] 0x3418FD56: F5B0 0FC0 CMP.W R0, #0x600000 0x3418FD5A: D004 BEQ 46L73 ; 0x3418FD66 0x3418FD5C: 9802 LDR R0, [SP, #8] 0x3418FD5E: 68C0 LDR R0, [R0, #12] 0x3418FD60: F5B0 0FE0 CMP.W R0, #0x700000 0x3418FD64: D100 BNE 46L74 ; 0x3418FD68
.L73: 0x3418FD66: E007 B 46L75 ; 0x3418FD78
.L74: 0x3418FD68: F244 300F MOVW R0, #0x430F ; 0x3419430F = .rodata..L.str.50 0x3418FD6C: F2C3 4019 MOVT R0, #0x3419 ; 0x3419430F = .rodata..L.str.50 0x3418FD70: F44F 618E MOV.W R1, #0x0470 0x3418FD74: F7FD FF90 BL assert_failed ; 0x3418DC98
.L75: 0x3418FD78: 9802 LDR R0, [SP, #8] 0x3418FD7A: 68C0 LDR R0, [R0, #12] 0x3418FD7C: F248 0124 MOVW R1, #0x8024 0x3418FD80: F2C5 6102 MOVT R1, #0x5602 0x3418FD84: 6809 LDR R1, [R1] 0x3418FD86: F401 01E0 AND R1, R1, #0x700000 0x3418FD8A: 4288 CMP R0, R1 0x3418FD8C: D20A BCS 46L76 ; 0x3418FDA4 0x3418FD8E: F248 0124 MOVW R1, #0x8024 0x3418FD92: F2C5 6102 MOVT R1, #0x5602 0x3418FD96: 6808 LDR R0, [R1] 0x3418FD98: F420 00E0 BIC R0, R0, #0x700000 0x3418FD9C: 9A02 LDR R2, [SP, #8] 0x3418FD9E: 68D2 LDR R2, [R2, #12] 0x3418FDA0: 4310 ORRS R0, R2 0x3418FDA2: 6008 STR R0, [R1]
.L76: 0x3418FDA4: 9802 LDR R0, [SP, #8] 0x3418FDA6: 7800 LDRB R0, [R0] 0x3418FDA8: 0700 LSLS R0, R0, #28 0x3418FDAA: 2800 CMP R0, #0 0x3418FDAC: D53D BPL 46L80 ; 0x3418FE2A 0x3418FDAE: 9802 LDR R0, [SP, #8] 0x3418FDB0: 6900 LDR R0, [R0, #16] 0x3418FDB2: B1D8 CBZ R0, .L77 ; 0x3418FDEC 0x3418FDB4: 9802 LDR R0, [SP, #8] 0x3418FDB6: 6900 LDR R0, [R0, #16] 0x3418FDB8: 2801 CMP R0, #1 0x3418FDBA: D017 BEQ 46L77 ; 0x3418FDEC 0x3418FDBC: 9802 LDR R0, [SP, #8] 0x3418FDBE: 6900 LDR R0, [R0, #16] 0x3418FDC0: 2802 CMP R0, #2 0x3418FDC2: D013 BEQ 46L77 ; 0x3418FDEC 0x3418FDC4: 9802 LDR R0, [SP, #8] 0x3418FDC6: 6900 LDR R0, [R0, #16] 0x3418FDC8: 2803 CMP R0, #3 0x3418FDCA: D00F BEQ 46L77 ; 0x3418FDEC 0x3418FDCC: 9802 LDR R0, [SP, #8] 0x3418FDCE: 6900 LDR R0, [R0, #16] 0x3418FDD0: 2804 CMP R0, #4 0x3418FDD2: D00B BEQ 46L77 ; 0x3418FDEC 0x3418FDD4: 9802 LDR R0, [SP, #8] 0x3418FDD6: 6900 LDR R0, [R0, #16] 0x3418FDD8: 2805 CMP R0, #5 0x3418FDDA: D007 BEQ 46L77 ; 0x3418FDEC 0x3418FDDC: 9802 LDR R0, [SP, #8] 0x3418FDDE: 6900 LDR R0, [R0, #16] 0x3418FDE0: 2806 CMP R0, #6 0x3418FDE2: D003 BEQ 46L77 ; 0x3418FDEC 0x3418FDE4: 9802 LDR R0, [SP, #8] 0x3418FDE6: 6900 LDR R0, [R0, #16] 0x3418FDE8: 2807 CMP R0, #7 0x3418FDEA: D100 BNE 46L78 ; 0x3418FDEE
.L77: 0x3418FDEC: E007 B 46L79 ; 0x3418FDFE
.L78: 0x3418FDEE: F244 300F MOVW R0, #0x430F ; 0x3419430F = .rodata..L.str.50 0x3418FDF2: F2C3 4019 MOVT R0, #0x3419 ; 0x3419430F = .rodata..L.str.50 0x3418FDF6: F240 417B MOVW R1, #0x047B 0x3418FDFA: F7FD FF4D BL assert_failed ; 0x3418DC98
.L79: 0x3418FDFE: 9802 LDR R0, [SP, #8] 0x3418FE00: 6900 LDR R0, [R0, #16] 0x3418FE02: F248 0124 MOVW R1, #0x8024 0x3418FE06: F2C5 6102 MOVT R1, #0x5602 0x3418FE0A: 6809 LDR R1, [R1] 0x3418FE0C: F001 0107 AND R1, R1, #7 0x3418FE10: 4288 CMP R0, R1 0x3418FE12: D20A BCS 46L80 ; 0x3418FE2A 0x3418FE14: F248 0124 MOVW R1, #0x8024 0x3418FE18: F2C5 6102 MOVT R1, #0x5602 0x3418FE1C: 6808 LDR R0, [R1] 0x3418FE1E: F020 0007 BIC R0, R0, #7 0x3418FE22: 9A02 LDR R2, [SP, #8] 0x3418FE24: 6912 LDR R2, [R2, #16] 0x3418FE26: 4310 ORRS R0, R2 0x3418FE28: 6008 STR R0, [R1]
.L80: 0x3418FE2A: 9802 LDR R0, [SP, #8] 0x3418FE2C: 7800 LDRB R0, [R0] 0x3418FE2E: 06C0 LSLS R0, R0, #27 0x3418FE30: 2800 CMP R0, #0 0x3418FE32: D53D BPL 46L84 ; 0x3418FEB0 0x3418FE34: 9802 LDR R0, [SP, #8] 0x3418FE36: 6940 LDR R0, [R0, #20] 0x3418FE38: B1D8 CBZ R0, .L81 ; 0x3418FE72 0x3418FE3A: 9802 LDR R0, [SP, #8] 0x3418FE3C: 6940 LDR R0, [R0, #20] 0x3418FE3E: 2810 CMP R0, #16 0x3418FE40: D017 BEQ 46L81 ; 0x3418FE72 0x3418FE42: 9802 LDR R0, [SP, #8] 0x3418FE44: 6940 LDR R0, [R0, #20] 0x3418FE46: 2820 CMP R0, #32 0x3418FE48: D013 BEQ 46L81 ; 0x3418FE72 0x3418FE4A: 9802 LDR R0, [SP, #8] 0x3418FE4C: 6940 LDR R0, [R0, #20] 0x3418FE4E: 2830 CMP R0, #48 0x3418FE50: D00F BEQ 46L81 ; 0x3418FE72 0x3418FE52: 9802 LDR R0, [SP, #8] 0x3418FE54: 6940 LDR R0, [R0, #20] 0x3418FE56: 2840 CMP R0, #64 0x3418FE58: D00B BEQ 46L81 ; 0x3418FE72 0x3418FE5A: 9802 LDR R0, [SP, #8] 0x3418FE5C: 6940 LDR R0, [R0, #20] 0x3418FE5E: 2850 CMP R0, #80 0x3418FE60: D007 BEQ 46L81 ; 0x3418FE72 0x3418FE62: 9802 LDR R0, [SP, #8] 0x3418FE64: 6940 LDR R0, [R0, #20] 0x3418FE66: 2860 CMP R0, #96 0x3418FE68: D003 BEQ 46L81 ; 0x3418FE72 0x3418FE6A: 9802 LDR R0, [SP, #8] 0x3418FE6C: 6940 LDR R0, [R0, #20] 0x3418FE6E: 2870 CMP R0, #112 0x3418FE70: D100 BNE 46L82 ; 0x3418FE74
.L81: 0x3418FE72: E007 B 46L83 ; 0x3418FE84
.L82: 0x3418FE74: F244 300F MOVW R0, #0x430F ; 0x3419430F = .rodata..L.str.50 0x3418FE78: F2C3 4019 MOVT R0, #0x3419 ; 0x3419430F = .rodata..L.str.50 0x3418FE7C: F240 4185 MOVW R1, #0x0485 0x3418FE80: F7FD FF0A BL assert_failed ; 0x3418DC98
.L83: 0x3418FE84: 9802 LDR R0, [SP, #8] 0x3418FE86: 6940 LDR R0, [R0, #20] 0x3418FE88: F248 0124 MOVW R1, #0x8024 0x3418FE8C: F2C5 6102 MOVT R1, #0x5602 0x3418FE90: 6809 LDR R1, [R1] 0x3418FE92: F001 0170 AND R1, R1, #112 0x3418FE96: 4288 CMP R0, R1 0x3418FE98: D20A BCS 46L84 ; 0x3418FEB0 0x3418FE9A: F248 0124 MOVW R1, #0x8024 0x3418FE9E: F2C5 6102 MOVT R1, #0x5602 0x3418FEA2: 6808 LDR R0, [R1] 0x3418FEA4: F020 0070 BIC R0, R0, #112 0x3418FEA8: 9A02 LDR R2, [SP, #8] 0x3418FEAA: 6952 LDR R2, [R2, #20] 0x3418FEAC: 4310 ORRS R0, R2 0x3418FEAE: 6008 STR R0, [R1]
.L84: 0x3418FEB0: 9802 LDR R0, [SP, #8] 0x3418FEB2: 7800 LDRB R0, [R0] 0x3418FEB4: 0680 LSLS R0, R0, #26 0x3418FEB6: 2800 CMP R0, #0 0x3418FEB8: D544 BPL 46L88 ; 0x3418FF44 0x3418FEBA: 9802 LDR R0, [SP, #8] 0x3418FEBC: 6980 LDR R0, [R0, #24] 0x3418FEBE: B310 CBZ R0, .L85 ; 0x3418FF06 0x3418FEC0: 9802 LDR R0, [SP, #8] 0x3418FEC2: 6980 LDR R0, [R0, #24] 0x3418FEC4: F5B0 5F80 CMP.W R0, #0x1000 0x3418FEC8: D01D BEQ 46L85 ; 0x3418FF06 0x3418FECA: 9802 LDR R0, [SP, #8] 0x3418FECC: 6980 LDR R0, [R0, #24] 0x3418FECE: F5B0 5F00 CMP.W R0, #0x2000 0x3418FED2: D018 BEQ 46L85 ; 0x3418FF06 0x3418FED4: 9802 LDR R0, [SP, #8] 0x3418FED6: 6980 LDR R0, [R0, #24] 0x3418FED8: F5B0 5F40 CMP.W R0, #0x3000 0x3418FEDC: D013 BEQ 46L85 ; 0x3418FF06 0x3418FEDE: 9802 LDR R0, [SP, #8] 0x3418FEE0: 6980 LDR R0, [R0, #24] 0x3418FEE2: F5B0 4F80 CMP.W R0, #0x4000 0x3418FEE6: D00E BEQ 46L85 ; 0x3418FF06 0x3418FEE8: 9802 LDR R0, [SP, #8] 0x3418FEEA: 6980 LDR R0, [R0, #24] 0x3418FEEC: F5B0 4FA0 CMP.W R0, #0x5000 0x3418FEF0: D009 BEQ 46L85 ; 0x3418FF06 0x3418FEF2: 9802 LDR R0, [SP, #8] 0x3418FEF4: 6980 LDR R0, [R0, #24] 0x3418FEF6: F5B0 4FC0 CMP.W R0, #0x6000 0x3418FEFA: D004 BEQ 46L85 ; 0x3418FF06 0x3418FEFC: 9802 LDR R0, [SP, #8] 0x3418FEFE: 6980 LDR R0, [R0, #24] 0x3418FF00: F5B0 4FE0 CMP.W R0, #0x7000 0x3418FF04: D100 BNE 46L86 ; 0x3418FF08
.L85: 0x3418FF06: E007 B 46L87 ; 0x3418FF18
.L86: 0x3418FF08: F244 300F MOVW R0, #0x430F ; 0x3419430F = .rodata..L.str.50 0x3418FF0C: F2C3 4019 MOVT R0, #0x3419 ; 0x3419430F = .rodata..L.str.50 0x3418FF10: F240 418F MOVW R1, #0x048F 0x3418FF14: F7FD FEC0 BL assert_failed ; 0x3418DC98
.L87: 0x3418FF18: 9802 LDR R0, [SP, #8] 0x3418FF1A: 6980 LDR R0, [R0, #24] 0x3418FF1C: F248 0124 MOVW R1, #0x8024 0x3418FF20: F2C5 6102 MOVT R1, #0x5602 0x3418FF24: 6809 LDR R1, [R1] 0x3418FF26: F401 41E0 AND R1, R1, #0x7000 0x3418FF2A: 4288 CMP R0, R1 0x3418FF2C: D20A BCS 46L88 ; 0x3418FF44 0x3418FF2E: F248 0124 MOVW R1, #0x8024 0x3418FF32: F2C5 6102 MOVT R1, #0x5602 0x3418FF36: 6808 LDR R0, [R1] 0x3418FF38: F420 40E0 BIC R0, R0, #0x7000 0x3418FF3C: 9A02 LDR R2, [SP, #8] 0x3418FF3E: 6992 LDR R2, [R2, #24] 0x3418FF40: 4310 ORRS R0, R2 0x3418FF42: 6008 STR R0, [R1]
.L88: 0x3418FF44: 9802 LDR R0, [SP, #8] 0x3418FF46: 7800 LDRB R0, [R0] 0x3418FF48: 0640 LSLS R0, R0, #25 0x3418FF4A: 2800 CMP R0, #0 0x3418FF4C: D544 BPL 46L92 ; 0x3418FFD8 0x3418FF4E: 9802 LDR R0, [SP, #8] 0x3418FF50: 69C0 LDR R0, [R0, #28] 0x3418FF52: B310 CBZ R0, .L89 ; 0x3418FF9A 0x3418FF54: 9802 LDR R0, [SP, #8] 0x3418FF56: 69C0 LDR R0, [R0, #28] 0x3418FF58: F5B0 3F80 CMP.W R0, #0x010000 0x3418FF5C: D01D BEQ 46L89 ; 0x3418FF9A 0x3418FF5E: 9802 LDR R0, [SP, #8] 0x3418FF60: 69C0 LDR R0, [R0, #28] 0x3418FF62: F5B0 3F00 CMP.W R0, #0x020000 0x3418FF66: D018 BEQ 46L89 ; 0x3418FF9A 0x3418FF68: 9802 LDR R0, [SP, #8] 0x3418FF6A: 69C0 LDR R0, [R0, #28] 0x3418FF6C: F5B0 3F40 CMP.W R0, #0x030000 0x3418FF70: D013 BEQ 46L89 ; 0x3418FF9A 0x3418FF72: 9802 LDR R0, [SP, #8] 0x3418FF74: 69C0 LDR R0, [R0, #28] 0x3418FF76: F5B0 2F80 CMP.W R0, #0x040000 0x3418FF7A: D00E BEQ 46L89 ; 0x3418FF9A 0x3418FF7C: 9802 LDR R0, [SP, #8] 0x3418FF7E: 69C0 LDR R0, [R0, #28] 0x3418FF80: F5B0 2FA0 CMP.W R0, #0x050000 0x3418FF84: D009 BEQ 46L89 ; 0x3418FF9A 0x3418FF86: 9802 LDR R0, [SP, #8] 0x3418FF88: 69C0 LDR R0, [R0, #28] 0x3418FF8A: F5B0 2FC0 CMP.W R0, #0x060000 0x3418FF8E: D004 BEQ 46L89 ; 0x3418FF9A 0x3418FF90: 9802 LDR R0, [SP, #8] 0x3418FF92: 69C0 LDR R0, [R0, #28] 0x3418FF94: F5B0 2FE0 CMP.W R0, #0x070000 0x3418FF98: D100 BNE 46L90 ; 0x3418FF9C
.L89: 0x3418FF9A: E007 B 46L91 ; 0x3418FFAC
.L90: 0x3418FF9C: F244 300F MOVW R0, #0x430F ; 0x3419430F = .rodata..L.str.50 0x3418FFA0: F2C3 4019 MOVT R0, #0x3419 ; 0x3419430F = .rodata..L.str.50 0x3418FFA4: F240 4199 MOVW R1, #0x0499 0x3418FFA8: F7FD FE76 BL assert_failed ; 0x3418DC98
.L91: 0x3418FFAC: 9802 LDR R0, [SP, #8] 0x3418FFAE: 69C0 LDR R0, [R0, #28] 0x3418FFB0: F248 0124 MOVW R1, #0x8024 0x3418FFB4: F2C5 6102 MOVT R1, #0x5602 0x3418FFB8: 6809 LDR R1, [R1] 0x3418FFBA: F401 21E0 AND R1, R1, #0x070000 0x3418FFBE: 4288 CMP R0, R1 0x3418FFC0: D20A BCS 46L92 ; 0x3418FFD8 0x3418FFC2: F248 0124 MOVW R1, #0x8024 0x3418FFC6: F2C5 6102 MOVT R1, #0x5602 0x3418FFCA: 6808 LDR R0, [R1] 0x3418FFCC: F420 20E0 BIC R0, R0, #0x070000 0x3418FFD0: 9A02 LDR R2, [SP, #8] 0x3418FFD2: 69D2 LDR R2, [R2, #28] 0x3418FFD4: 4310 ORRS R0, R2 0x3418FFD6: 6008 STR R0, [R1]
.L92: 0x3418FFD8: F240 707C MOVW R0, #0x077C ; 0x3400077C = uwTickPrio 0x3418FFDC: F2C3 4000 MOVT R0, #0x3400 ; 0x3400077C = uwTickPrio 0x3418FFE0: 6800 LDR R0, [R0] 0x3418FFE2: F7FD FFE5 BL HAL_InitTick ; 0x3418DFB0 0x3418FFE6: F88D 000F STRB.W R0, [SP, #15]
.L93: 0x3418FFEA: F89D 000F LDRB.W R0, [SP, #15] 0x3418FFEE: B004 ADD SP, SP, #16 0x3418FFF0: BD80 POP 123R7, PC}

Section .init.NPU1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


NPU1_IRQHandler: 0x3418FFF2: E7FE B NPU1_IRQHandler ; 0x3418FFF2

Section .text.RCC_IC_CheckPLLSources from blto2_FSBL_lto.o, size=234, align=4


RCC_IC_CheckPLLSources: 0x3418FFF4: B580 PUSH 123R7, LR} 0x3418FFF6: B086 SUB SP, SP, #24 0x3418FFF8: 9005 STR R0, [SP, #20] 0x3418FFFA: 9104 STR R1, [SP, #16] 0x3418FFFC: 2001 MOVS R0, #1 0x3418FFFE: 9003 STR R0, [SP, #12] 0x34190000: 9805 LDR R0, [SP, #20] 0x34190002: 9002 STR R0, [SP, #8] 0x34190004: B160 CBZ R0, .L1 ; 0x34190020 0x34190006: 9802 LDR R0, [SP, #8] 0x34190008: F1B0 5F80 CMP.W R0, #0x10000000 0x3419000C: D011 BEQ 46L3 ; 0x34190032 0x3419000E: 9802 LDR R0, [SP, #8] 0x34190010: F1B0 5F00 CMP.W R0, #0x20000000 0x34190014: D016 BEQ 46L5 ; 0x34190044 0x34190016: 9802 LDR R0, [SP, #8] 0x34190018: F1B0 5F40 CMP.W R0, #0x30000000 0x3419001C: D01B BEQ 46L7 ; 0x34190056 0x3419001E: E023 B 46L9 ; 0x34190068
.L1: 0x34190020: F7F2 FA8A BL LL_RCC_PLL1_IsReady ; 0x34182538 0x34190024: B920 CBNZ R0, .L2 ; 0x34190030 0x34190026: F7F2 FB01 BL LL_RCC_PLL1_IsEnabledBypass ; 0x3418262C 0x3419002A: B908 CBNZ R0, .L2 ; 0x34190030 0x3419002C: 2000 MOVS R0, #0 0x3419002E: 9003 STR R0, [SP, #12]
.L2: 0x34190030: E01C B 46L10 ; 0x3419006C
.L3: 0x34190032: F7F2 FAA9 BL LL_RCC_PLL2_IsReady ; 0x34182588 0x34190036: B920 CBNZ R0, .L4 ; 0x34190042 0x34190038: F7F2 FB00 BL LL_RCC_PLL2_IsEnabledBypass ; 0x3418263C 0x3419003C: B908 CBNZ R0, .L4 ; 0x34190042 0x3419003E: 2000 MOVS R0, #0 0x34190040: 9003 STR R0, [SP, #12]
.L4: 0x34190042: E013 B 46L10 ; 0x3419006C
.L5: 0x34190044: F7F2 FAA8 BL LL_RCC_PLL3_IsReady ; 0x34182598 0x34190048: B920 CBNZ R0, .L6 ; 0x34190054 0x3419004A: F7F2 FAFF BL LL_RCC_PLL3_IsEnabledBypass ; 0x3418264C 0x3419004E: B908 CBNZ R0, .L6 ; 0x34190054 0x34190050: 2000 MOVS R0, #0 0x34190052: 9003 STR R0, [SP, #12]
.L6: 0x34190054: E00A B 46L10 ; 0x3419006C
.L7: 0x34190056: F7F2 FAA7 BL LL_RCC_PLL4_IsReady ; 0x341825A8 0x3419005A: B920 CBNZ R0, .L8 ; 0x34190066 0x3419005C: F7F2 FAFE BL LL_RCC_PLL4_IsEnabledBypass ; 0x3418265C 0x34190060: B908 CBNZ R0, .L8 ; 0x34190066 0x34190062: 2000 MOVS R0, #0 0x34190064: 9003 STR R0, [SP, #12]
.L8: 0x34190066: E001 B 46L10 ; 0x3419006C
.L9: 0x34190068: 2000 MOVS R0, #0 0x3419006A: 9003 STR R0, [SP, #12]
.L10: 0x3419006C: 9804 LDR R0, [SP, #16] 0x3419006E: 9001 STR R0, [SP, #4] 0x34190070: B160 CBZ R0, .L11 ; 0x3419008C 0x34190072: 9801 LDR R0, [SP, #4] 0x34190074: F1B0 5F80 CMP.W R0, #0x10000000 0x34190078: D011 BEQ 46L13 ; 0x3419009E 0x3419007A: 9801 LDR R0, [SP, #4] 0x3419007C: F1B0 5F00 CMP.W R0, #0x20000000 0x34190080: D016 BEQ 46L15 ; 0x341900B0 0x34190082: 9801 LDR R0, [SP, #4] 0x34190084: F1B0 5F40 CMP.W R0, #0x30000000 0x34190088: D01B BEQ 46L17 ; 0x341900C2 0x3419008A: E023 B 46L19 ; 0x341900D4
.L11: 0x3419008C: F7F2 FA54 BL LL_RCC_PLL1_IsReady ; 0x34182538 0x34190090: B920 CBNZ R0, .L12 ; 0x3419009C 0x34190092: F7F2 FACB BL LL_RCC_PLL1_IsEnabledBypass ; 0x3418262C 0x34190096: B908 CBNZ R0, .L12 ; 0x3419009C 0x34190098: 2000 MOVS R0, #0 0x3419009A: 9003 STR R0, [SP, #12]
.L12: 0x3419009C: E01C B 46L20 ; 0x341900D8
.L13: 0x3419009E: F7F2 FA73 BL LL_RCC_PLL2_IsReady ; 0x34182588 0x341900A2: B920 CBNZ R0, .L14 ; 0x341900AE 0x341900A4: F7F2 FACA BL LL_RCC_PLL2_IsEnabledBypass ; 0x3418263C 0x341900A8: B908 CBNZ R0, .L14 ; 0x341900AE 0x341900AA: 2000 MOVS R0, #0 0x341900AC: 9003 STR R0, [SP, #12]
.L14: 0x341900AE: E013 B 46L20 ; 0x341900D8
.L15: 0x341900B0: F7F2 FA72 BL LL_RCC_PLL3_IsReady ; 0x34182598 0x341900B4: B920 CBNZ R0, .L16 ; 0x341900C0 0x341900B6: F7F2 FAC9 BL LL_RCC_PLL3_IsEnabledBypass ; 0x3418264C 0x341900BA: B908 CBNZ R0, .L16 ; 0x341900C0 0x341900BC: 2000 MOVS R0, #0 0x341900BE: 9003 STR R0, [SP, #12]
.L16: 0x341900C0: E00A B 46L20 ; 0x341900D8
.L17: 0x341900C2: F7F2 FA71 BL LL_RCC_PLL4_IsReady ; 0x341825A8 0x341900C6: B920 CBNZ R0, .L18 ; 0x341900D2 0x341900C8: F7F2 FAC8 BL LL_RCC_PLL4_IsEnabledBypass ; 0x3418265C 0x341900CC: B908 CBNZ R0, .L18 ; 0x341900D2 0x341900CE: 2000 MOVS R0, #0 0x341900D0: 9003 STR R0, [SP, #12]
.L18: 0x341900D2: E001 B 46L20 ; 0x341900D8
.L19: 0x341900D4: 2000 MOVS R0, #0 0x341900D6: 9003 STR R0, [SP, #12]
.L20: 0x341900D8: 9803 LDR R0, [SP, #12] 0x341900DA: B006 ADD SP, SP, #24 0x341900DC: BD80 POP 123R7, PC}

Section .init.NPU2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


NPU2_IRQHandler: 0x341900DE: E7FE B NPU2_IRQHandler ; 0x341900DE

Section .text.LL_RCC_IC1_Enable from blto2_FSBL_lto.o, size=14, align=4


LL_RCC_IC1_Enable: 0x341900E0: F648 2140 MOVW R1, #0x8A40 0x341900E4: F2C5 6102 MOVT R1, #0x5602 0x341900E8: 2001 MOVS R0, #1 0x341900EA: 6008 STR R0, [R1] 0x341900EC: 4770 BX LR

Section .init.NPU3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


NPU3_IRQHandler: 0x341900EE: E7FE B NPU3_IRQHandler ; 0x341900EE

Section .text.HAL_RCC_GetCpuClockFreq from blto2_FSBL_lto.o, size=238, align=4


HAL_RCC_GetCpuClockFreq: 0x341900F0: B580 PUSH 123R7, LR} 0x341900F2: B084 SUB SP, SP, #16 0x341900F4: 2000 MOVS R0, #0 0x341900F6: 9003 STR R0, [SP, #12] 0x341900F8: F7F2 F9C8 BL LL_RCC_GetCpuClkSource ; 0x3418248C 0x341900FC: 4601 MOV R1, R0 0x341900FE: 9101 STR R1, [SP, #4] 0x34190100: B160 CBZ R0, .L1 ; 0x3419011C 0x34190102: 9801 LDR R0, [SP, #4] 0x34190104: F5B0 1F80 CMP.W R0, #0x100000 0x34190108: D012 BEQ 46L2 ; 0x34190130 0x3419010A: 9801 LDR R0, [SP, #4] 0x3419010C: F5B0 1F00 CMP.W R0, #0x200000 0x34190110: D022 BEQ 46L3 ; 0x34190158 0x34190112: 9801 LDR R0, [SP, #4] 0x34190114: F5B0 1F40 CMP.W R0, #0x300000 0x34190118: D024 BEQ 46L4 ; 0x34190164 0x3419011A: E05D B 46L10 ; 0x341901D8
.L1: 0x3419011C: F7F2 FA7E BL LL_RCC_HSI_GetDivider ; 0x3418261C 0x34190120: 09C1 LSRS R1, R0, #7 0x34190122: F249 0000 MOVW R0, #0x9000 0x34190126: F2C0 30D0 MOVT R0, #0x03D0 0x3419012A: 40C8 LSRS R0, R1 0x3419012C: 9003 STR R0, [SP, #12] 0x3419012E: E053 B 46L10 ; 0x341901D8
.L2: 0x34190130: F248 0044 MOVW R0, #0x8044 0x34190134: F2C5 6002 MOVT R0, #0x5602 0x34190138: 6800 LDR R0, [R0] 0x3419013A: F400 7000 AND R0, R0, #0x0200 0x3419013E: F5B0 7F00 CMP.W R0, #0x0200 0x34190142: F640 1000 MOVW R0, #0x0900 0x34190146: F2C0 003D MOVT R0, #61 0x3419014A: BF04 ITT EQ 0x3419014C: F242 4000 MOVWEQ R0, #0x2400 0x34190150: F2C0 00F4 MOVTEQ R0, #244 0x34190154: 9003 STR R0, [SP, #12] 0x34190156: E03F B 46L10 ; 0x341901D8
.L3: 0x34190158: F646 4000 MOVW R0, #0x6C00 0x3419015C: F2C0 20DC MOVT R0, #0x02DC 0x34190160: 9003 STR R0, [SP, #12] 0x34190162: E039 B 46L10 ; 0x341901D8
.L4: 0x34190164: F000 F83C BL LL_RCC_IC1_GetDivider ; 0x341901E0 0x34190168: 9002 STR R0, [SP, #8] 0x3419016A: F7F2 F9ED BL LL_RCC_IC1_GetSource ; 0x34182548 0x3419016E: 4601 MOV R1, R0 0x34190170: 9100 STR R1, [SP, #0] 0x34190172: B160 CBZ R0, .L5 ; 0x3419018E 0x34190174: 9800 LDR R0, [SP, #0] 0x34190176: F1B0 5F80 CMP.W R0, #0x10000000 0x3419017A: D011 BEQ 46L6 ; 0x341901A0 0x3419017C: 9800 LDR R0, [SP, #0] 0x3419017E: F1B0 5F00 CMP.W R0, #0x20000000 0x34190182: D016 BEQ 46L7 ; 0x341901B2 0x34190184: 9800 LDR R0, [SP, #0] 0x34190186: F1B0 5F40 CMP.W R0, #0x30000000 0x3419018A: D01B BEQ 46L8 ; 0x341901C4 0x3419018C: E023 B 46L9 ; 0x341901D6
.L5: 0x3419018E: F001 FBAF BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F0 0x34190192: 9003 STR R0, [SP, #12] 0x34190194: 9803 LDR R0, [SP, #12] 0x34190196: 9902 LDR R1, [SP, #8] 0x34190198: FBB0 F0F1 UDIV R0, R0, R1 0x3419019C: 9003 STR R0, [SP, #12] 0x3419019E: E01A B 46L9 ; 0x341901D6
.L6: 0x341901A0: F001 FBE8 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191974 0x341901A4: 9003 STR R0, [SP, #12] 0x341901A6: 9803 LDR R0, [SP, #12] 0x341901A8: 9902 LDR R1, [SP, #8] 0x341901AA: FBB0 F0F1 UDIV R0, R0, R1 0x341901AE: 9003 STR R0, [SP, #12] 0x341901B0: E011 B 46L9 ; 0x341901D6
.L7: 0x341901B2: F001 FC21 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919F8 0x341901B6: 9003 STR R0, [SP, #12] 0x341901B8: 9803 LDR R0, [SP, #12] 0x341901BA: 9902 LDR R1, [SP, #8] 0x341901BC: FBB0 F0F1 UDIV R0, R0, R1 0x341901C0: 9003 STR R0, [SP, #12] 0x341901C2: E008 B 46L9 ; 0x341901D6
.L8: 0x341901C4: F001 FC5A BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A7C 0x341901C8: 9003 STR R0, [SP, #12] 0x341901CA: 9803 LDR R0, [SP, #12] 0x341901CC: 9902 LDR R1, [SP, #8] 0x341901CE: FBB0 F0F1 UDIV R0, R0, R1 0x341901D2: 9003 STR R0, [SP, #12] 0x341901D4: E7FF B 46L9 ; 0x341901D6
.L9: 0x341901D6: E7FF B 46L10 ; 0x341901D8
.L10: 0x341901D8: 9803 LDR R0, [SP, #12] 0x341901DA: B004 ADD SP, SP, #16 0x341901DC: BD80 POP 123R7, PC}

Section .init.CACHEAXI_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


CACHEAXI_IRQHandler: 0x341901DE: E7FE B CACHEAXI_IRQHandler ; 0x341901DE

Section .text.LL_RCC_IC1_GetDivider from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_IC1_GetDivider: 0x341901E0: F248 00C4 MOVW R0, #0x80C4 0x341901E4: F2C5 6002 MOVT R0, #0x5602 0x341901E8: 6800 LDR R0, [R0] 0x341901EA: F400 017F AND R1, R0, #0xFF0000 0x341901EE: 2001 MOVS R0, #1 0x341901F0: EB00 4011 ADD.W R0, R0, R1, LSR #16 0x341901F4: 4770 BX LR

Section .init.LTDC_LO_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


LTDC_LO_IRQHandler: 0x341901F6: E7FE B LTDC_LO_IRQHandler ; 0x341901F6

Section .text.HAL_RCC_GetSysClockFreq from blto2_FSBL_lto.o, size=26, align=4


HAL_RCC_GetSysClockFreq: 0x341901F8: B580 PUSH 123R7, LR} 0x341901FA: B082 SUB SP, SP, #8 0x341901FC: F7F2 F9AC BL LL_RCC_IC2_GetSource ; 0x34182558 0x34190200: 9001 STR R0, [SP, #4] 0x34190202: F000 F807 BL LL_RCC_IC2_GetDivider ; 0x34190214 0x34190206: 4601 MOV R1, R0 0x34190208: 9801 LDR R0, [SP, #4] 0x3419020A: F7F2 FA2F BL RCC_GetSysClockFreq ; 0x3418266C 0x3419020E: B002 ADD SP, SP, #8 0x34190210: BD80 POP 123R7, PC}

Section .init.LTDC_LO_ERR_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


LTDC_LO_ERR_IRQHandler: 0x34190212: E7FE B LTDC_LO_ERR_IRQHandler ; 0x34190212

Section .text.LL_RCC_IC2_GetDivider from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_IC2_GetDivider: 0x34190214: F248 00C8 MOVW R0, #0x80C8 0x34190218: F2C5 6002 MOVT R0, #0x5602 0x3419021C: 6800 LDR R0, [R0] 0x3419021E: F400 017F AND R1, R0, #0xFF0000 0x34190222: 2001 MOVS R0, #1 0x34190224: EB00 4011 ADD.W R0, R0, R1, LSR #16 0x34190228: 4770 BX LR

Section .init.DMA2D_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


DMA2D_IRQHandler: 0x3419022A: E7FE B DMA2D_IRQHandler ; 0x3419022A

Section .text.LL_RCC_IC5_Enable.60 from blto2_FSBL_lto.o, size=14, align=4


LL_RCC_IC5_Enable.60: 0x3419022C: F648 2140 MOVW R1, #0x8A40 0x34190230: F2C5 6102 MOVT R1, #0x5602 0x34190234: 2010 MOVS R0, #16 0x34190236: 6008 STR R0, [R1] 0x34190238: 4770 BX LR

Section .init.JPEG_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


JPEG_IRQHandler: 0x3419023A: E7FE B JPEG_IRQHandler ; 0x3419023A

Section .text.LL_RCC_IC3_Enable from blto2_FSBL_lto.o, size=14, align=4


LL_RCC_IC3_Enable: 0x3419023C: F648 2140 MOVW R1, #0x8A40 0x34190240: F2C5 6102 MOVT R1, #0x5602 0x34190244: 2004 MOVS R0, #4 0x34190246: 6008 STR R0, [R1] 0x34190248: 4770 BX LR

Section .init.VENC_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


VENC_IRQHandler: 0x3419024A: E7FE B VENC_IRQHandler ; 0x3419024A

Section .text.LL_RCC_IC4_Enable from blto2_FSBL_lto.o, size=14, align=4


LL_RCC_IC4_Enable: 0x3419024C: F648 2140 MOVW R1, #0x8A40 0x34190250: F2C5 6102 MOVT R1, #0x5602 0x34190254: 2008 MOVS R0, #8 0x34190256: 6008 STR R0, [R1] 0x34190258: 4770 BX LR

Section .init.GFXMMU_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GFXMMU_IRQHandler: 0x3419025A: E7FE B GFXMMU_IRQHandler ; 0x3419025A

Section .text.LL_RCC_CLKP_Enable from blto2_FSBL_lto.o, size=14, align=4


LL_RCC_CLKP_Enable: 0x3419025C: F648 2148 MOVW R1, #0x8A48 0x34190260: F2C5 6102 MOVT R1, #0x5602 0x34190264: 2040 MOVS R0, #64 0x34190266: 6008 STR R0, [R1] 0x34190268: 4770 BX LR

Section .init.GFXTIM_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GFXTIM_IRQHandler: 0x3419026A: E7FE B GFXTIM_IRQHandler ; 0x3419026A

Section .text.LL_RCC_IC7_Enable from blto2_FSBL_lto.o, size=14, align=4


LL_RCC_IC7_Enable: 0x3419026C: F648 2140 MOVW R1, #0x8A40 0x34190270: F2C5 6102 MOVT R1, #0x5602 0x34190274: 2040 MOVS R0, #64 0x34190276: 6008 STR R0, [R1] 0x34190278: 4770 BX LR

Section .init.GPU2D_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPU2D_IRQHandler: 0x3419027A: E7FE B GPU2D_IRQHandler ; 0x3419027A

Section .text.LL_RCC_IC8_Enable from blto2_FSBL_lto.o, size=14, align=4


LL_RCC_IC8_Enable: 0x3419027C: F648 2140 MOVW R1, #0x8A40 0x34190280: F2C5 6102 MOVT R1, #0x5602 0x34190284: 2080 MOVS R0, #128 0x34190286: 6008 STR R0, [R1] 0x34190288: 4770 BX LR

Section .init.GPU2D_ER_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPU2D_ER_IRQHandler: 0x3419028A: E7FE B GPU2D_ER_IRQHandler ; 0x3419028A

Section .text.LL_RCC_HSE_SelectHSEDiv2AsDiv2Clock from blto2_FSBL_lto.o, size=18, align=4


LL_RCC_HSE_SelectHSEDiv2AsDiv2Clock: 0x3419028C: F248 0154 MOVW R1, #0x8054 0x34190290: F2C5 6102 MOVT R1, #0x5602 0x34190294: 6808 LDR R0, [R1] 0x34190296: F040 0040 ORR R0, R0, #64 0x3419029A: 6008 STR R0, [R1] 0x3419029C: 4770 BX LR

Section .init.ICACHE_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


ICACHE_IRQHandler: 0x3419029E: E7FE B ICACHE_IRQHandler ; 0x3419029E

Section .text.LL_RCC_HSE_SelectHSEAsDiv2Clock from blto2_FSBL_lto.o, size=18, align=4


LL_RCC_HSE_SelectHSEAsDiv2Clock: 0x341902A0: F248 0154 MOVW R1, #0x8054 0x341902A4: F2C5 6102 MOVT R1, #0x5602 0x341902A8: 6808 LDR R0, [R1] 0x341902AA: F020 0040 BIC R0, R0, #64 0x341902AE: 6008 STR R0, [R1] 0x341902B0: 4770 BX LR

Section .init.HPDMA1_Channel0_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel0_IRQHandler: 0x341902B2: E7FE B HPDMA1_Channel0_IRQHandler ; 0x341902B2

Section .text.LL_RCC_SetTIMPrescaler from blto2_FSBL_lto.o, size=30, align=4


LL_RCC_SetTIMPrescaler: 0x341902B4: B081 SUB SP, SP, #4 0x341902B6: 9000 STR R0, [SP, #0] 0x341902B8: F248 0124 MOVW R1, #0x8024 0x341902BC: F2C5 6102 MOVT R1, #0x5602 0x341902C0: 6808 LDR R0, [R1] 0x341902C2: F020 7040 BIC R0, R0, #0x03000000 0x341902C6: 9A00 LDR R2, [SP, #0] 0x341902C8: EA40 6002 ORR.W R0, R0, R2, LSL #24 0x341902CC: 6008 STR R0, [R1] 0x341902CE: B001 ADD SP, SP, #4 0x341902D0: 4770 BX LR

Section .init.HPDMA1_Channel1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel1_IRQHandler: 0x341902D2: E7FE B HPDMA1_Channel1_IRQHandler ; 0x341902D2

Section .text.LL_RCC_GetADCClockSource from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_GetADCClockSource: 0x341902D4: B081 SUB SP, SP, #4 0x341902D6: 9000 STR R0, [SP, #0] 0x341902D8: F248 1044 MOVW R0, #0x8144 0x341902DC: F2C5 6002 MOVT R0, #0x5602 0x341902E0: 6800 LDR R0, [R0] 0x341902E2: F000 0070 AND R0, R0, #112 0x341902E6: B001 ADD SP, SP, #4 0x341902E8: 4770 BX LR

Section .init.HPDMA1_Channel2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel2_IRQHandler: 0x341902EA: E7FE B HPDMA1_Channel2_IRQHandler ; 0x341902EA

Section .text.LL_RCC_GetADFClockSource from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_GetADFClockSource: 0x341902EC: B081 SUB SP, SP, #4 0x341902EE: 9000 STR R0, [SP, #0] 0x341902F0: F248 1044 MOVW R0, #0x8144 0x341902F4: F2C5 6002 MOVT R0, #0x5602 0x341902F8: 6800 LDR R0, [R0] 0x341902FA: F000 0007 AND R0, R0, #7 0x341902FE: B001 ADD SP, SP, #4 0x34190300: 4770 BX LR

Section .init.HPDMA1_Channel3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel3_IRQHandler: 0x34190302: E7FE B HPDMA1_Channel3_IRQHandler ; 0x34190302

Section .text.LL_RCC_GetCLKPClockSource from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_GetCLKPClockSource: 0x34190304: B081 SUB SP, SP, #4 0x34190306: 9000 STR R0, [SP, #0] 0x34190308: F248 105C MOVW R0, #0x815C 0x3419030C: F2C5 6002 MOVT R0, #0x5602 0x34190310: 6800 LDR R0, [R0] 0x34190312: F000 0007 AND R0, R0, #7 0x34190316: B001 ADD SP, SP, #4 0x34190318: 4770 BX LR

Section .init.HPDMA1_Channel4_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel4_IRQHandler: 0x3419031A: E7FE B HPDMA1_Channel4_IRQHandler ; 0x3419031A

Section .text.LL_RCC_GetDCMIPPClockSource from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_GetDCMIPPClockSource: 0x3419031C: B081 SUB SP, SP, #4 0x3419031E: 9000 STR R0, [SP, #0] 0x34190320: F248 1044 MOVW R0, #0x8144 0x34190324: F2C5 6002 MOVT R0, #0x5602 0x34190328: 6800 LDR R0, [R0] 0x3419032A: F400 1040 AND R0, R0, #0x300000 0x3419032E: B001 ADD SP, SP, #4 0x34190330: 4770 BX LR

Section .init.HPDMA1_Channel5_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel5_IRQHandler: 0x34190332: E7FE B HPDMA1_Channel5_IRQHandler ; 0x34190332

Section .text.LL_RCC_GetETHClockSource from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_GetETHClockSource: 0x34190334: B081 SUB SP, SP, #4 0x34190336: 9000 STR R0, [SP, #0] 0x34190338: F248 1048 MOVW R0, #0x8148 0x3419033C: F2C5 6002 MOVT R0, #0x5602 0x34190340: 6800 LDR R0, [R0] 0x34190342: F400 5040 AND R0, R0, #0x3000 0x34190346: B001 ADD SP, SP, #4 0x34190348: 4770 BX LR

Section .init.HPDMA1_Channel6_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel6_IRQHandler: 0x3419034A: E7FE B HPDMA1_Channel6_IRQHandler ; 0x3419034A

Section .text.LL_RCC_GetETHPTPClockSource from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_GetETHPTPClockSource: 0x3419034C: B081 SUB SP, SP, #4 0x3419034E: 9000 STR R0, [SP, #0] 0x34190350: F248 1048 MOVW R0, #0x8148 0x34190354: F2C5 6002 MOVT R0, #0x5602 0x34190358: 6800 LDR R0, [R0] 0x3419035A: F000 0003 AND R0, R0, #3 0x3419035E: B001 ADD SP, SP, #4 0x34190360: 4770 BX LR

Section .init.HPDMA1_Channel7_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel7_IRQHandler: 0x34190362: E7FE B HPDMA1_Channel7_IRQHandler ; 0x34190362

Section .text.LL_RCC_GetFDCANClockSource from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_GetFDCANClockSource: 0x34190364: B081 SUB SP, SP, #4 0x34190366: 9000 STR R0, [SP, #0] 0x34190368: F248 104C MOVW R0, #0x814C 0x3419036C: F2C5 6002 MOVT R0, #0x5602 0x34190370: 6800 LDR R0, [R0] 0x34190372: F000 0003 AND R0, R0, #3 0x34190376: B001 ADD SP, SP, #4 0x34190378: 4770 BX LR

Section .init.HPDMA1_Channel8_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel8_IRQHandler: 0x3419037A: E7FE B HPDMA1_Channel8_IRQHandler ; 0x3419037A

Section .text.LL_RCC_GetFMCClockSource from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_GetFMCClockSource: 0x3419037C: B081 SUB SP, SP, #4 0x3419037E: 9000 STR R0, [SP, #0] 0x34190380: F248 104C MOVW R0, #0x814C 0x34190384: F2C5 6002 MOVT R0, #0x5602 0x34190388: 6800 LDR R0, [R0] 0x3419038A: F000 0030 AND R0, R0, #48 0x3419038E: B001 ADD SP, SP, #4 0x34190390: 4770 BX LR

Section .init.HPDMA1_Channel9_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel9_IRQHandler: 0x34190392: E7FE B HPDMA1_Channel9_IRQHandler ; 0x34190392

Section .text.LL_RCC_GetLPUARTClockSource from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_GetLPUARTClockSource: 0x34190394: B081 SUB SP, SP, #4 0x34190396: 9000 STR R0, [SP, #0] 0x34190398: F248 1078 MOVW R0, #0x8178 0x3419039C: F2C5 6002 MOVT R0, #0x5602 0x341903A0: 6800 LDR R0, [R0] 0x341903A2: F400 60E0 AND R0, R0, #0x0700 0x341903A6: B001 ADD SP, SP, #4 0x341903A8: 4770 BX LR

Section .init.HPDMA1_Channel10_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel10_IRQHandler: 0x341903AA: E7FE B HPDMA1_Channel10_IRQHandler ; 0x341903AA

Section .text.LL_RCC_GetLTDCClockSource from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_GetLTDCClockSource: 0x341903AC: B081 SUB SP, SP, #4 0x341903AE: 9000 STR R0, [SP, #0] 0x341903B0: F248 1050 MOVW R0, #0x8150 0x341903B4: F2C5 6002 MOVT R0, #0x5602 0x341903B8: 6800 LDR R0, [R0] 0x341903BA: F000 7040 AND R0, R0, #0x03000000 0x341903BE: B001 ADD SP, SP, #4 0x341903C0: 4770 BX LR

Section .init.HPDMA1_Channel11_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel11_IRQHandler: 0x341903C2: E7FE B HPDMA1_Channel11_IRQHandler ; 0x341903C2

Section .text.LL_RCC_GetMDFClockSource from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_GetMDFClockSource: 0x341903C4: B081 SUB SP, SP, #4 0x341903C6: 9000 STR R0, [SP, #0] 0x341903C8: F248 1054 MOVW R0, #0x8154 0x341903CC: F2C5 6002 MOVT R0, #0x5602 0x341903D0: 6800 LDR R0, [R0] 0x341903D2: F400 20E0 AND R0, R0, #0x070000 0x341903D6: B001 ADD SP, SP, #4 0x341903D8: 4770 BX LR

Section .init.HPDMA1_Channel12_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel12_IRQHandler: 0x341903DA: E7FE B HPDMA1_Channel12_IRQHandler ; 0x341903DA

Section .text.LL_RCC_GetPSSIClockSource from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_GetPSSIClockSource: 0x341903DC: B081 SUB SP, SP, #4 0x341903DE: 9000 STR R0, [SP, #0] 0x341903E0: F248 105C MOVW R0, #0x815C 0x341903E4: F2C5 6002 MOVT R0, #0x5602 0x341903E8: 6800 LDR R0, [R0] 0x341903EA: F000 0030 AND R0, R0, #48 0x341903EE: B001 ADD SP, SP, #4 0x341903F0: 4770 BX LR

Section .init.HPDMA1_Channel13_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel13_IRQHandler: 0x341903F2: E7FE B HPDMA1_Channel13_IRQHandler ; 0x341903F2

Section .text.LL_RCC_GetSPDIFRXClockSource from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_GetSPDIFRXClockSource: 0x341903F4: B081 SUB SP, SP, #4 0x341903F6: 9000 STR R0, [SP, #0] 0x341903F8: F248 1064 MOVW R0, #0x8164 0x341903FC: F2C5 6002 MOVT R0, #0x5602 0x34190400: 6800 LDR R0, [R0] 0x34190402: F000 0007 AND R0, R0, #7 0x34190406: B001 ADD SP, SP, #4 0x34190408: 4770 BX LR

Section .init.HPDMA1_Channel14_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel14_IRQHandler: 0x3419040A: E7FE B HPDMA1_Channel14_IRQHandler ; 0x3419040A

Section .text.HAL_RCCEx_GetPeriphCLKFreq from blto2_FSBL_lto.o, size=1626, align=4


HAL_RCCEx_GetPeriphCLKFreq: 0x3419040C: B580 PUSH 123R7, LR} 0x3419040E: B086 SUB SP, SP, #24 0x34190410: 9105 STR R1, [SP, #20] 0x34190412: 9004 STR R0, [SP, #16] 0x34190414: 2000 MOVS R0, #0 0x34190416: 9003 STR R0, [SP, #12] 0x34190418: 9804 LDR R0, [SP, #16] 0x3419041A: 9001 STR R0, [SP, #4] 0x3419041C: 9905 LDR R1, [SP, #20] 0x3419041E: 9102 STR R1, [SP, #8] 0x34190420: F080 0001 EOR R0, R0, #1 0x34190424: 4308 ORRS R0, R1 0x34190426: 2800 CMP R0, #0 0x34190428: F000 81A1 BEQ.W 46L1 ; 0x3419076E 0x3419042C: 9902 LDR R1, [SP, #8] 0x3419042E: 9801 LDR R0, [SP, #4] 0x34190430: F080 0002 EOR R0, R0, #2 0x34190434: 4308 ORRS R0, R1 0x34190436: 2800 CMP R0, #0 0x34190438: F000 819E BEQ.W 46L2 ; 0x34190778 0x3419043C: 9902 LDR R1, [SP, #8] 0x3419043E: 9801 LDR R0, [SP, #4] 0x34190440: F080 0004 EOR R0, R0, #4 0x34190444: 4308 ORRS R0, R1 0x34190446: 2800 CMP R0, #0 0x34190448: F000 819F BEQ.W 46L4 ; 0x3419078A 0x3419044C: 9902 LDR R1, [SP, #8] 0x3419044E: 9801 LDR R0, [SP, #4] 0x34190450: F080 0008 EOR R0, R0, #8 0x34190454: 4308 ORRS R0, R1 0x34190456: 2800 CMP R0, #0 0x34190458: F000 8193 BEQ.W 46L3 ; 0x34190782 0x3419045C: 9902 LDR R1, [SP, #8] 0x3419045E: 9801 LDR R0, [SP, #4] 0x34190460: F080 0010 EOR R0, R0, #16 0x34190464: 4308 ORRS R0, R1 0x34190466: 2800 CMP R0, #0 0x34190468: F000 8194 BEQ.W 46L5 ; 0x34190794 0x3419046C: 9902 LDR R1, [SP, #8] 0x3419046E: 9801 LDR R0, [SP, #4] 0x34190470: F080 0020 EOR R0, R0, #32 0x34190474: 4308 ORRS R0, R1 0x34190476: 2800 CMP R0, #0 0x34190478: F000 8192 BEQ.W 46L6 ; 0x341907A0 0x3419047C: 9902 LDR R1, [SP, #8] 0x3419047E: 9801 LDR R0, [SP, #4] 0x34190480: F480 7000 EOR R0, R0, #0x0200 0x34190484: 4308 ORRS R0, R1 0x34190486: 2800 CMP R0, #0 0x34190488: F000 8190 BEQ.W 46L7 ; 0x341907AC 0x3419048C: 9902 LDR R1, [SP, #8] 0x3419048E: 9801 LDR R0, [SP, #4] 0x34190490: F480 6080 EOR R0, R0, #0x0400 0x34190494: 4308 ORRS R0, R1 0x34190496: 2800 CMP R0, #0 0x34190498: F000 818D BEQ.W 46L8 ; 0x341907B6 0x3419049C: 9902 LDR R1, [SP, #8] 0x3419049E: 9801 LDR R0, [SP, #4] 0x341904A0: F480 6000 EOR R0, R0, #0x0800 0x341904A4: 4308 ORRS R0, R1 0x341904A6: 2800 CMP R0, #0 0x341904A8: F000 818A BEQ.W 46L9 ; 0x341907C0 0x341904AC: 9902 LDR R1, [SP, #8] 0x341904AE: 9801 LDR R0, [SP, #4] 0x341904B0: F480 5080 EOR R0, R0, #0x1000 0x341904B4: 4308 ORRS R0, R1 0x341904B6: 2800 CMP R0, #0 0x341904B8: F000 8187 BEQ.W 46L10 ; 0x341907CA 0x341904BC: 9902 LDR R1, [SP, #8] 0x341904BE: 9801 LDR R0, [SP, #4] 0x341904C0: F480 5000 EOR R0, R0, #0x2000 0x341904C4: 4308 ORRS R0, R1 0x341904C6: 2800 CMP R0, #0 0x341904C8: F000 8186 BEQ.W 46L11 ; 0x341907D8 0x341904CC: 9902 LDR R1, [SP, #8] 0x341904CE: 9801 LDR R0, [SP, #4] 0x341904D0: F480 4080 EOR R0, R0, #0x4000 0x341904D4: 4308 ORRS R0, R1 0x341904D6: 2800 CMP R0, #0 0x341904D8: F000 8186 BEQ.W 46L12 ; 0x341907E8 0x341904DC: 9902 LDR R1, [SP, #8] 0x341904DE: 9801 LDR R0, [SP, #4] 0x341904E0: F480 4000 EOR R0, R0, #0x8000 0x341904E4: 4308 ORRS R0, R1 0x341904E6: 2800 CMP R0, #0 0x341904E8: F000 8186 BEQ.W 46L13 ; 0x341907F8 0x341904EC: 9902 LDR R1, [SP, #8] 0x341904EE: 9801 LDR R0, [SP, #4] 0x341904F0: F480 3080 EOR R0, R0, #0x010000 0x341904F4: 4308 ORRS R0, R1 0x341904F6: 2800 CMP R0, #0 0x341904F8: F000 8186 BEQ.W 46L14 ; 0x34190808 0x341904FC: 9902 LDR R1, [SP, #8] 0x341904FE: 9801 LDR R0, [SP, #4] 0x34190500: F480 3000 EOR R0, R0, #0x020000 0x34190504: 4308 ORRS R0, R1 0x34190506: 2800 CMP R0, #0 0x34190508: F000 8186 BEQ.W 46L15 ; 0x34190818 0x3419050C: 9902 LDR R1, [SP, #8] 0x3419050E: 9801 LDR R0, [SP, #4] 0x34190510: F480 2080 EOR R0, R0, #0x040000 0x34190514: 4308 ORRS R0, R1 0x34190516: 2800 CMP R0, #0 0x34190518: F000 8186 BEQ.W 46L16 ; 0x34190828 0x3419051C: 9902 LDR R1, [SP, #8] 0x3419051E: 9801 LDR R0, [SP, #4] 0x34190520: F480 2000 EOR R0, R0, #0x080000 0x34190524: 4308 ORRS R0, R1 0x34190526: 2800 CMP R0, #0 0x34190528: F000 8186 BEQ.W 46L17 ; 0x34190838 0x3419052C: 9902 LDR R1, [SP, #8] 0x3419052E: 9801 LDR R0, [SP, #4] 0x34190530: F480 1080 EOR R0, R0, #0x100000 0x34190534: 4308 ORRS R0, R1 0x34190536: 2800 CMP R0, #0 0x34190538: F000 8186 BEQ.W 46L18 ; 0x34190848 0x3419053C: 9902 LDR R1, [SP, #8] 0x3419053E: 9801 LDR R0, [SP, #4] 0x34190540: F480 1000 EOR R0, R0, #0x200000 0x34190544: 4308 ORRS R0, R1 0x34190546: 2800 CMP R0, #0 0x34190548: F000 8186 BEQ.W 46L19 ; 0x34190858 0x3419054C: 9902 LDR R1, [SP, #8] 0x3419054E: 9801 LDR R0, [SP, #4] 0x34190550: F480 0080 EOR R0, R0, #0x400000 0x34190554: 4308 ORRS R0, R1 0x34190556: 2800 CMP R0, #0 0x34190558: F000 8186 BEQ.W 46L20 ; 0x34190868 0x3419055C: 9902 LDR R1, [SP, #8] 0x3419055E: 9801 LDR R0, [SP, #4] 0x34190560: F480 0000 EOR R0, R0, #0x800000 0x34190564: 4308 ORRS R0, R1 0x34190566: 2800 CMP R0, #0 0x34190568: F000 8186 BEQ.W 46L21 ; 0x34190878 0x3419056C: 9902 LDR R1, [SP, #8] 0x3419056E: 9801 LDR R0, [SP, #4] 0x34190570: F080 7080 EOR R0, R0, #0x01000000 0x34190574: 4308 ORRS R0, R1 0x34190576: 2800 CMP R0, #0 0x34190578: F000 8184 BEQ.W 46L22 ; 0x34190884 0x3419057C: 9902 LDR R1, [SP, #8] 0x3419057E: 9801 LDR R0, [SP, #4] 0x34190580: F080 7000 EOR R0, R0, #0x02000000 0x34190584: 4308 ORRS R0, R1 0x34190586: 2800 CMP R0, #0 0x34190588: F000 8182 BEQ.W 46L23 ; 0x34190890 0x3419058C: 9902 LDR R1, [SP, #8] 0x3419058E: 9801 LDR R0, [SP, #4] 0x34190590: F080 6080 EOR R0, R0, #0x04000000 0x34190594: 4308 ORRS R0, R1 0x34190596: 2800 CMP R0, #0 0x34190598: F000 8180 BEQ.W 46L24 ; 0x3419089C 0x3419059C: 9902 LDR R1, [SP, #8] 0x3419059E: 9801 LDR R0, [SP, #4] 0x341905A0: F080 6000 EOR R0, R0, #0x08000000 0x341905A4: 4308 ORRS R0, R1 0x341905A6: 2800 CMP R0, #0 0x341905A8: F000 817D BEQ.W 46L25 ; 0x341908A6 0x341905AC: 9902 LDR R1, [SP, #8] 0x341905AE: 9801 LDR R0, [SP, #4] 0x341905B0: F080 5080 EOR R0, R0, #0x10000000 0x341905B4: 4308 ORRS R0, R1 0x341905B6: 2800 CMP R0, #0 0x341905B8: F000 8179 BEQ.W 46L26 ; 0x341908AE 0x341905BC: 9902 LDR R1, [SP, #8] 0x341905BE: 9801 LDR R0, [SP, #4] 0x341905C0: F080 5000 EOR R0, R0, #0x20000000 0x341905C4: 4308 ORRS R0, R1 0x341905C6: 2800 CMP R0, #0 0x341905C8: F000 8179 BEQ.W 46L27 ; 0x341908BE 0x341905CC: 9902 LDR R1, [SP, #8] 0x341905CE: 9801 LDR R0, [SP, #4] 0x341905D0: F080 4080 EOR R0, R0, #0x40000000 0x341905D4: 4308 ORRS R0, R1 0x341905D6: 2800 CMP R0, #0 0x341905D8: F000 8179 BEQ.W 46L28 ; 0x341908CE 0x341905DC: 9902 LDR R1, [SP, #8] 0x341905DE: 9801 LDR R0, [SP, #4] 0x341905E0: F080 4000 EOR R0, R0, #0x80000000 0x341905E4: 4308 ORRS R0, R1 0x341905E6: 2800 CMP R0, #0 0x341905E8: F000 8178 BEQ.W 46L29 ; 0x341908DC 0x341905EC: 9801 LDR R0, [SP, #4] 0x341905EE: 9902 LDR R1, [SP, #8] 0x341905F0: F081 0101 EOR R1, R1, #1 0x341905F4: 4308 ORRS R0, R1 0x341905F6: 2800 CMP R0, #0 0x341905F8: F000 8178 BEQ.W 46L30 ; 0x341908EC 0x341905FC: 9801 LDR R0, [SP, #4] 0x341905FE: 9902 LDR R1, [SP, #8] 0x34190600: F081 0102 EOR R1, R1, #2 0x34190604: 4308 ORRS R0, R1 0x34190606: 2800 CMP R0, #0 0x34190608: F000 8175 BEQ.W 46L31 ; 0x341908F6 0x3419060C: 9801 LDR R0, [SP, #4] 0x3419060E: 9902 LDR R1, [SP, #8] 0x34190610: F081 0104 EOR R1, R1, #4 0x34190614: 4308 ORRS R0, R1 0x34190616: 2800 CMP R0, #0 0x34190618: F000 8175 BEQ.W 46L32 ; 0x34190906 0x3419061C: 9801 LDR R0, [SP, #4] 0x3419061E: 9902 LDR R1, [SP, #8] 0x34190620: F081 0108 EOR R1, R1, #8 0x34190624: 4308 ORRS R0, R1 0x34190626: 2800 CMP R0, #0 0x34190628: F000 8175 BEQ.W 46L33 ; 0x34190916 0x3419062C: 9801 LDR R0, [SP, #4] 0x3419062E: 9902 LDR R1, [SP, #8] 0x34190630: F081 0110 EOR R1, R1, #16 0x34190634: 4308 ORRS R0, R1 0x34190636: 2800 CMP R0, #0 0x34190638: F000 8175 BEQ.W 46L34 ; 0x34190926 0x3419063C: 9801 LDR R0, [SP, #4] 0x3419063E: 9902 LDR R1, [SP, #8] 0x34190640: F081 0120 EOR R1, R1, #32 0x34190644: 4308 ORRS R0, R1 0x34190646: 2800 CMP R0, #0 0x34190648: F000 8175 BEQ.W 46L35 ; 0x34190936 0x3419064C: 9801 LDR R0, [SP, #4] 0x3419064E: 9902 LDR R1, [SP, #8] 0x34190650: F081 0140 EOR R1, R1, #64 0x34190654: 4308 ORRS R0, R1 0x34190656: 2800 CMP R0, #0 0x34190658: F000 8175 BEQ.W 46L36 ; 0x34190946 0x3419065C: 9801 LDR R0, [SP, #4] 0x3419065E: 9902 LDR R1, [SP, #8] 0x34190660: F481 7180 EOR R1, R1, #0x0100 0x34190664: 4308 ORRS R0, R1 0x34190666: 2800 CMP R0, #0 0x34190668: F000 8175 BEQ.W 46L37 ; 0x34190956 0x3419066C: 9801 LDR R0, [SP, #4] 0x3419066E: 9902 LDR R1, [SP, #8] 0x34190670: F481 7100 EOR R1, R1, #0x0200 0x34190674: 4308 ORRS R0, R1 0x34190676: 2800 CMP R0, #0 0x34190678: F000 8174 BEQ.W 46L38 ; 0x34190964 0x3419067C: 9801 LDR R0, [SP, #4] 0x3419067E: 9902 LDR R1, [SP, #8] 0x34190680: F481 6180 EOR R1, R1, #0x0400 0x34190684: 4308 ORRS R0, R1 0x34190686: 2800 CMP R0, #0 0x34190688: F000 8174 BEQ.W 46L39 ; 0x34190974 0x3419068C: 9801 LDR R0, [SP, #4] 0x3419068E: 9902 LDR R1, [SP, #8] 0x34190690: F481 6100 EOR R1, R1, #0x0800 0x34190694: 4308 ORRS R0, R1 0x34190696: 2800 CMP R0, #0 0x34190698: F000 8174 BEQ.W 46L40 ; 0x34190984 0x3419069C: 9801 LDR R0, [SP, #4] 0x3419069E: 9902 LDR R1, [SP, #8] 0x341906A0: F481 5180 EOR R1, R1, #0x1000 0x341906A4: 4308 ORRS R0, R1 0x341906A6: 2800 CMP R0, #0 0x341906A8: F000 8174 BEQ.W 46L41 ; 0x34190994 0x341906AC: 9801 LDR R0, [SP, #4] 0x341906AE: 9902 LDR R1, [SP, #8] 0x341906B0: F481 5100 EOR R1, R1, #0x2000 0x341906B4: 4308 ORRS R0, R1 0x341906B6: 2800 CMP R0, #0 0x341906B8: F000 8174 BEQ.W 46L42 ; 0x341909A4 0x341906BC: 9801 LDR R0, [SP, #4] 0x341906BE: 9902 LDR R1, [SP, #8] 0x341906C0: F481 4180 EOR R1, R1, #0x4000 0x341906C4: 4308 ORRS R0, R1 0x341906C6: 2800 CMP R0, #0 0x341906C8: F000 8174 BEQ.W 46L43 ; 0x341909B4 0x341906CC: 9801 LDR R0, [SP, #4] 0x341906CE: 9902 LDR R1, [SP, #8] 0x341906D0: F481 4100 EOR R1, R1, #0x8000 0x341906D4: 4308 ORRS R0, R1 0x341906D6: 2800 CMP R0, #0 0x341906D8: F000 8174 BEQ.W 46L44 ; 0x341909C4 0x341906DC: 9801 LDR R0, [SP, #4] 0x341906DE: 9902 LDR R1, [SP, #8] 0x341906E0: F481 3180 EOR R1, R1, #0x010000 0x341906E4: 4308 ORRS R0, R1 0x341906E6: 2800 CMP R0, #0 0x341906E8: F000 8174 BEQ.W 46L45 ; 0x341909D4 0x341906EC: 9801 LDR R0, [SP, #4] 0x341906EE: 9902 LDR R1, [SP, #8] 0x341906F0: F481 3100 EOR R1, R1, #0x020000 0x341906F4: 4308 ORRS R0, R1 0x341906F6: 2800 CMP R0, #0 0x341906F8: F000 8173 BEQ.W 46L46 ; 0x341909E2 0x341906FC: 9801 LDR R0, [SP, #4] 0x341906FE: 9902 LDR R1, [SP, #8] 0x34190700: F481 2180 EOR R1, R1, #0x040000 0x34190704: 4308 ORRS R0, R1 0x34190706: 2800 CMP R0, #0 0x34190708: F000 8173 BEQ.W 46L47 ; 0x341909F2 0x3419070C: 9801 LDR R0, [SP, #4] 0x3419070E: 9902 LDR R1, [SP, #8] 0x34190710: F481 2100 EOR R1, R1, #0x080000 0x34190714: 4308 ORRS R0, R1 0x34190716: 2800 CMP R0, #0 0x34190718: F000 8173 BEQ.W 46L48 ; 0x34190A02 0x3419071C: 9801 LDR R0, [SP, #4] 0x3419071E: 9902 LDR R1, [SP, #8] 0x34190720: F481 1180 EOR R1, R1, #0x100000 0x34190724: 4308 ORRS R0, R1 0x34190726: 2800 CMP R0, #0 0x34190728: F000 8173 BEQ.W 46L49 ; 0x34190A12 0x3419072C: 9801 LDR R0, [SP, #4] 0x3419072E: 9902 LDR R1, [SP, #8] 0x34190730: F481 1100 EOR R1, R1, #0x200000 0x34190734: 4308 ORRS R0, R1 0x34190736: 2800 CMP R0, #0 0x34190738: F000 8173 BEQ.W 46L50 ; 0x34190A22 0x3419073C: 9801 LDR R0, [SP, #4] 0x3419073E: 9902 LDR R1, [SP, #8] 0x34190740: F481 0180 EOR R1, R1, #0x400000 0x34190744: 4308 ORRS R0, R1 0x34190746: 2800 CMP R0, #0 0x34190748: F000 8173 BEQ.W 46L51 ; 0x34190A32 0x3419074C: 9801 LDR R0, [SP, #4] 0x3419074E: 9902 LDR R1, [SP, #8] 0x34190750: F481 0100 EOR R1, R1, #0x800000 0x34190754: 4308 ORRS R0, R1 0x34190756: 2800 CMP R0, #0 0x34190758: F000 8172 BEQ.W 46L52 ; 0x34190A40 0x3419075C: 9801 LDR R0, [SP, #4] 0x3419075E: 9902 LDR R1, [SP, #8] 0x34190760: F081 7180 EOR R1, R1, #0x01000000 0x34190764: 4308 ORRS R0, R1 0x34190766: 2800 CMP R0, #0 0x34190768: F000 8172 BEQ.W 46L53 ; 0x34190A50 0x3419076C: E178 B 46L54 ; 0x34190A60
.L1: 0x3419076E: 2070 MOVS R0, #112 0x34190770: F000 F97A BL RCCEx_GetADCCLKFreq ; 0x34190A68 0x34190774: 9003 STR R0, [SP, #12] 0x34190776: E173 B 46L54 ; 0x34190A60
.L2: 0x34190778: 2007 MOVS R0, #7 0x3419077A: F7F8 F9F3 BL RCCEx_GetADFCLKFreq ; 0x34188B64 0x3419077E: 9003 STR R0, [SP, #12] 0x34190780: E16E B 46L54 ; 0x34190A60
.L3: 0x34190782: F000 FA4D BL RCCEx_GetCSICLKFreq ; 0x34190C20 0x34190786: 9003 STR R0, [SP, #12] 0x34190788: E16A B 46L54 ; 0x34190A60
.L4: 0x3419078A: 2007 MOVS R0, #7 0x3419078C: F7F8 FAAC BL RCCEx_GetCLKPCLKFreq ; 0x34188CE8 0x34190790: 9003 STR R0, [SP, #12] 0x34190792: E165 B 46L54 ; 0x34190A60
.L5: 0x34190794: F44F 1040 MOV.W R0, #0x300000 0x34190798: F7F8 FC16 BL RCCEx_GetDCMIPPCLKFreq ; 0x34188FC8 0x3419079C: 9003 STR R0, [SP, #12] 0x3419079E: E15F B 46L54 ; 0x34190A60
.L6: 0x341907A0: F44F 5040 MOV.W R0, #0x3000 0x341907A4: F7F8 FC82 BL RCCEx_GetETH1CLKFreq ; 0x341890AC 0x341907A8: 9003 STR R0, [SP, #12] 0x341907AA: E159 B 46L54 ; 0x34190A60
.L7: 0x341907AC: 2003 MOVS R0, #3 0x341907AE: F000 FA7B BL RCCEx_GetETH1PTPCLKFreq ; 0x34190CA8 0x341907B2: 9003 STR R0, [SP, #12] 0x341907B4: E154 B 46L54 ; 0x34190A60
.L8: 0x341907B6: 2003 MOVS R0, #3 0x341907B8: F000 FAE6 BL RCCEx_GetFDCANCLKFreq ; 0x34190D88 0x341907BC: 9003 STR R0, [SP, #12] 0x341907BE: E14F B 46L54 ; 0x34190A60
.L9: 0x341907C0: 2030 MOVS R0, #48 0x341907C2: F000 FB49 BL RCCEx_GetFMCCLKFreq ; 0x34190E58 0x341907C6: 9003 STR R0, [SP, #12] 0x341907C8: E14A B 46L54 ; 0x34190A60
.L10: 0x341907CA: 200C MOVS R0, #12 0x341907CC: F2C0 7000 MOVT R0, #0x0700 0x341907D0: F000 FBE0 BL RCCEx_GetI2CCLKFreq ; 0x34190F94 0x341907D4: 9003 STR R0, [SP, #12] 0x341907D6: E143 B 46L54 ; 0x34190A60
.L11: 0x341907D8: F240 400C MOVW R0, #0x040C 0x341907DC: F2C0 7000 MOVT R0, #0x0700 0x341907E0: F000 FBD8 BL RCCEx_GetI2CCLKFreq ; 0x34190F94 0x341907E4: 9003 STR R0, [SP, #12] 0x341907E6: E13B B 46L54 ; 0x34190A60
.L12: 0x341907E8: F640 000C MOVW R0, #0x080C 0x341907EC: F2C0 7000 MOVT R0, #0x0700 0x341907F0: F000 FBD0 BL RCCEx_GetI2CCLKFreq ; 0x34190F94 0x341907F4: 9003 STR R0, [SP, #12] 0x341907F6: E133 B 46L54 ; 0x34190A60
.L13: 0x341907F8: F640 400C MOVW R0, #0x0C0C 0x341907FC: F2C0 7000 MOVT R0, #0x0700 0x34190800: F000 FBC8 BL RCCEx_GetI2CCLKFreq ; 0x34190F94 0x34190804: 9003 STR R0, [SP, #12] 0x34190806: E12B B 46L54 ; 0x34190A60
.L14: 0x34190808: F241 000C MOVW R0, #0x100C 0x3419080C: F2C0 7000 MOVT R0, #0x0700 0x34190810: F7F8 FCB8 BL RCCEx_GetI3CCLKFreq ; 0x34189184 0x34190814: 9003 STR R0, [SP, #12] 0x34190816: E123 B 46L54 ; 0x34190A60
.L15: 0x34190818: F241 400C MOVW R0, #0x140C 0x3419081C: F2C0 7000 MOVT R0, #0x0700 0x34190820: F7F8 FCB0 BL RCCEx_GetI3CCLKFreq ; 0x34189184 0x34190824: 9003 STR R0, [SP, #12] 0x34190826: E11B B 46L54 ; 0x34190A60
.L16: 0x34190828: F640 002C MOVW R0, #0x082C 0x3419082C: F2C0 7000 MOVT R0, #0x0700 0x34190830: F000 FD12 BL RCCEx_GetLPTIMCLKFreq ; 0x34191258 0x34190834: 9003 STR R0, [SP, #12] 0x34190836: E113 B 46L54 ; 0x34190A60
.L17: 0x34190838: F640 402C MOVW R0, #0x0C2C 0x3419083C: F2C0 7000 MOVT R0, #0x0700 0x34190840: F000 FD0A BL RCCEx_GetLPTIMCLKFreq ; 0x34191258 0x34190844: 9003 STR R0, [SP, #12] 0x34190846: E10B B 46L54 ; 0x34190A60
.L18: 0x34190848: F241 002C MOVW R0, #0x102C 0x3419084C: F2C0 7000 MOVT R0, #0x0700 0x34190850: F000 FD02 BL RCCEx_GetLPTIMCLKFreq ; 0x34191258 0x34190854: 9003 STR R0, [SP, #12] 0x34190856: E103 B 46L54 ; 0x34190A60
.L19: 0x34190858: F241 402C MOVW R0, #0x142C 0x3419085C: F2C0 7000 MOVT R0, #0x0700 0x34190860: F000 FCFA BL RCCEx_GetLPTIMCLKFreq ; 0x34191258 0x34190864: 9003 STR R0, [SP, #12] 0x34190866: E0FB B 46L54 ; 0x34190A60
.L20: 0x34190868: F641 002C MOVW R0, #0x182C 0x3419086C: F2C0 7000 MOVT R0, #0x0700 0x34190870: F000 FCF2 BL RCCEx_GetLPTIMCLKFreq ; 0x34191258 0x34190874: 9003 STR R0, [SP, #12] 0x34190876: E0F3 B 46L54 ; 0x34190A60
.L21: 0x34190878: F44F 60E0 MOV.W R0, #0x0700 0x3419087C: F7F8 FD84 BL RCCEx_GetLPUARTCLKFreq ; 0x34189388 0x34190880: 9003 STR R0, [SP, #12] 0x34190882: E0ED B 46L54 ; 0x34190A60
.L22: 0x34190884: F04F 7040 MOV.W R0, #0x03000000 0x34190888: F7F8 FE4C BL RCCEx_GetLTDCCLKFreq ; 0x34189524 0x3419088C: 9003 STR R0, [SP, #12] 0x3419088E: E0E7 B 46L54 ; 0x34190A60
.L23: 0x34190890: F44F 20E0 MOV.W R0, #0x070000 0x34190894: F7F8 FEB8 BL RCCEx_GetMDFCLKFreq ; 0x34189608 0x34190898: 9003 STR R0, [SP, #12] 0x3419089A: E0E1 B 46L54 ; 0x34190A60
.L24: 0x3419089C: 2030 MOVS R0, #48 0x3419089E: F000 FE3D BL RCCEx_GetPSSICLKFreq ; 0x3419151C 0x341908A2: 9003 STR R0, [SP, #12] 0x341908A4: E0DC B 46L54 ; 0x34190A60
.L25: 0x341908A6: F000 FEA7 BL RCCEx_GetRTCCLKFreq ; 0x341915F8 0x341908AA: 9003 STR R0, [SP, #12] 0x341908AC: E0D8 B 46L54 ; 0x34190A60
.L26: 0x341908AE: F241 4018 MOVW R0, #0x1418 0x341908B2: F2C0 7000 MOVT R0, #0x0700 0x341908B6: F000 FEDF BL RCCEx_GetSAICLKFreq ; 0x34191678 0x341908BA: 9003 STR R0, [SP, #12] 0x341908BC: E0D0 B 46L54 ; 0x34190A60
.L27: 0x341908BE: F641 0018 MOVW R0, #0x1818 0x341908C2: F2C0 7000 MOVT R0, #0x0700 0x341908C6: F000 FED7 BL RCCEx_GetSAICLKFreq ; 0x34191678 0x341908CA: 9003 STR R0, [SP, #12] 0x341908CC: E0C8 B 46L54 ; 0x34190A60
.L28: 0x341908CE: 201C MOVS R0, #28 0x341908D0: F2C0 3000 MOVT R0, #0x0300 0x341908D4: F7F8 FF72 BL RCCEx_GetSDMMCCLKFreq ; 0x341897BC 0x341908D8: 9003 STR R0, [SP, #12] 0x341908DA: E0C1 B 46L54 ; 0x34190A60
.L29: 0x341908DC: F240 401C MOVW R0, #0x041C 0x341908E0: F2C0 3000 MOVT R0, #0x0300 0x341908E4: F7F8 FF6A BL RCCEx_GetSDMMCCLKFreq ; 0x341897BC 0x341908E8: 9003 STR R0, [SP, #12] 0x341908EA: E0B9 B 46L54 ; 0x34190A60
.L30: 0x341908EC: 2007 MOVS R0, #7 0x341908EE: F7F9 F82B BL RCCEx_GetSPDIFRXCLKFreq ; 0x34189948 0x341908F2: 9003 STR R0, [SP, #12] 0x341908F4: E0B4 B 46L54 ; 0x34190A60
.L31: 0x341908F6: F240 4020 MOVW R0, #0x0420 0x341908FA: F2C0 7000 MOVT R0, #0x0700 0x341908FE: F7F9 F8DD BL RCCEx_GetSPICLKFreq ; 0x34189ABC 0x34190902: 9003 STR R0, [SP, #12] 0x34190904: E0AC B 46L54 ; 0x34190A60
.L32: 0x34190906: F640 0020 MOVW R0, #0x0820 0x3419090A: F2C0 7000 MOVT R0, #0x0700 0x3419090E: F7F9 F8D5 BL RCCEx_GetSPICLKFreq ; 0x34189ABC 0x34190912: 9003 STR R0, [SP, #12] 0x34190914: E0A4 B 46L54 ; 0x34190A60
.L33: 0x34190916: F640 4020 MOVW R0, #0x0C20 0x3419091A: F2C0 7000 MOVT R0, #0x0700 0x3419091E: F7F9 F8CD BL RCCEx_GetSPICLKFreq ; 0x34189ABC 0x34190922: 9003 STR R0, [SP, #12] 0x34190924: E09C B 46L54 ; 0x34190A60
.L34: 0x34190926: F241 0020 MOVW R0, #0x1020 0x3419092A: F2C0 7000 MOVT R0, #0x0700 0x3419092E: F7F9 F8C5 BL RCCEx_GetSPICLKFreq ; 0x34189ABC 0x34190932: 9003 STR R0, [SP, #12] 0x34190934: E094 B 46L54 ; 0x34190A60
.L35: 0x34190936: F241 4020 MOVW R0, #0x1420 0x3419093A: F2C0 7000 MOVT R0, #0x0700 0x3419093E: F7F9 F8BD BL RCCEx_GetSPICLKFreq ; 0x34189ABC 0x34190942: 9003 STR R0, [SP, #12] 0x34190944: E08C B 46L54 ; 0x34190A60
.L36: 0x34190946: F641 0020 MOVW R0, #0x1820 0x3419094A: F2C0 7000 MOVT R0, #0x0700 0x3419094E: F7F9 F8B5 BL RCCEx_GetSPICLKFreq ; 0x34189ABC 0x34190952: 9003 STR R0, [SP, #12] 0x34190954: E084 B 46L54 ; 0x34190A60
.L37: 0x34190956: 2030 MOVS R0, #48 0x34190958: F2C0 7000 MOVT R0, #0x0700 0x3419095C: F7F9 FB04 BL RCCEx_GetUSARTCLKFreq ; 0x34189F68 0x34190960: 9003 STR R0, [SP, #12] 0x34190962: E07D B 46L54 ; 0x34190A60
.L38: 0x34190964: F240 4030 MOVW R0, #0x0430 0x34190968: F2C0 7000 MOVT R0, #0x0700 0x3419096C: F7F9 FAFC BL RCCEx_GetUSARTCLKFreq ; 0x34189F68 0x34190970: 9003 STR R0, [SP, #12] 0x34190972: E075 B 46L54 ; 0x34190A60
.L39: 0x34190974: F640 0030 MOVW R0, #0x0830 0x34190978: F2C0 7000 MOVT R0, #0x0700 0x3419097C: F7F9 FAF4 BL RCCEx_GetUSARTCLKFreq ; 0x34189F68 0x34190980: 9003 STR R0, [SP, #12] 0x34190982: E06D B 46L54 ; 0x34190A60
.L40: 0x34190984: F640 4030 MOVW R0, #0x0C30 0x34190988: F2C0 7000 MOVT R0, #0x0700 0x3419098C: F7F9 FCB6 BL RCCEx_GetUARTCLKFreq ; 0x3418A2FC 0x34190990: 9003 STR R0, [SP, #12] 0x34190992: E065 B 46L54 ; 0x34190A60
.L41: 0x34190994: F241 0030 MOVW R0, #0x1030 0x34190998: F2C0 7000 MOVT R0, #0x0700 0x3419099C: F7F9 FCAE BL RCCEx_GetUARTCLKFreq ; 0x3418A2FC 0x341909A0: 9003 STR R0, [SP, #12] 0x341909A2: E05D B 46L54 ; 0x34190A60
.L42: 0x341909A4: F241 4030 MOVW R0, #0x1430 0x341909A8: F2C0 7000 MOVT R0, #0x0700 0x341909AC: F7F9 FADC BL RCCEx_GetUSARTCLKFreq ; 0x34189F68 0x341909B0: 9003 STR R0, [SP, #12] 0x341909B2: E055 B 46L54 ; 0x34190A60
.L43: 0x341909B4: F641 0030 MOVW R0, #0x1830 0x341909B8: F2C0 7000 MOVT R0, #0x0700 0x341909BC: F7F9 FC9E BL RCCEx_GetUARTCLKFreq ; 0x3418A2FC 0x341909C0: 9003 STR R0, [SP, #12] 0x341909C2: E04D B 46L54 ; 0x34190A60
.L44: 0x341909C4: F641 4030 MOVW R0, #0x1C30 0x341909C8: F2C0 7000 MOVT R0, #0x0700 0x341909CC: F7F9 FC96 BL RCCEx_GetUARTCLKFreq ; 0x3418A2FC 0x341909D0: 9003 STR R0, [SP, #12] 0x341909D2: E045 B 46L54 ; 0x34190A60
.L45: 0x341909D4: 2034 MOVS R0, #52 0x341909D6: F2C0 7000 MOVT R0, #0x0700 0x341909DA: F7F9 FC8F BL RCCEx_GetUARTCLKFreq ; 0x3418A2FC 0x341909DE: 9003 STR R0, [SP, #12] 0x341909E0: E03E B 46L54 ; 0x34190A60
.L46: 0x341909E2: F240 4034 MOVW R0, #0x0434 0x341909E6: F2C0 7000 MOVT R0, #0x0700 0x341909EA: F7F9 FABD BL RCCEx_GetUSARTCLKFreq ; 0x34189F68 0x341909EE: 9003 STR R0, [SP, #12] 0x341909F0: E036 B 46L54 ; 0x34190A60
.L47: 0x341909F2: F640 4014 MOVW R0, #0x0C14 0x341909F6: F2C0 3000 MOVT R0, #0x0300 0x341909FA: F7F9 FE49 BL RCCEx_GetOTGPHYCLKFreq ; 0x3418A690 0x341909FE: 9003 STR R0, [SP, #12] 0x34190A00: E02E B 46L54 ; 0x34190A60
.L48: 0x34190A02: F241 0014 MOVW R0, #0x1014 0x34190A06: F2C0 1000 MOVT R0, #0x0100 0x34190A0A: F7F9 FEE3 BL RCCEx_GetOTGPHYCKREFCLKFreq ; 0x3418A7D4 0x34190A0E: 9003 STR R0, [SP, #12] 0x34190A10: E026 B 46L54 ; 0x34190A60
.L49: 0x34190A12: F241 4014 MOVW R0, #0x1414 0x34190A16: F2C0 3000 MOVT R0, #0x0300 0x34190A1A: F7F9 FE39 BL RCCEx_GetOTGPHYCLKFreq ; 0x3418A690 0x34190A1E: 9003 STR R0, [SP, #12] 0x34190A20: E01E B 46L54 ; 0x34190A60
.L50: 0x34190A22: F641 0014 MOVW R0, #0x1814 0x34190A26: F2C0 1000 MOVT R0, #0x0100 0x34190A2A: F7F9 FED3 BL RCCEx_GetOTGPHYCKREFCLKFreq ; 0x3418A7D4 0x34190A2E: 9003 STR R0, [SP, #12] 0x34190A30: E016 B 46L54 ; 0x34190A60
.L51: 0x34190A32: 2014 MOVS R0, #20 0x34190A34: F2C0 3000 MOVT R0, #0x0300 0x34190A38: F7F9 FF16 BL RCCEx_GetXSPICLKFreq ; 0x3418A868 0x34190A3C: 9003 STR R0, [SP, #12] 0x34190A3E: E00F B 46L54 ; 0x34190A60
.L52: 0x34190A40: F240 4014 MOVW R0, #0x0414 0x34190A44: F2C0 3000 MOVT R0, #0x0300 0x34190A48: F7F9 FF0E BL RCCEx_GetXSPICLKFreq ; 0x3418A868 0x34190A4C: 9003 STR R0, [SP, #12] 0x34190A4E: E007 B 46L54 ; 0x34190A60
.L53: 0x34190A50: F640 0014 MOVW R0, #0x0814 0x34190A54: F2C0 3000 MOVT R0, #0x0300 0x34190A58: F7F9 FF06 BL RCCEx_GetXSPICLKFreq ; 0x3418A868 0x34190A5C: 9003 STR R0, [SP, #12] 0x34190A5E: E7FF B 46L54 ; 0x34190A60
.L54: 0x34190A60: 9803 LDR R0, [SP, #12] 0x34190A62: B006 ADD SP, SP, #24 0x34190A64: BD80 POP 123R7, PC}

Section .init.HPDMA1_Channel15_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel15_IRQHandler: 0x34190A66: E7FE B HPDMA1_Channel15_IRQHandler ; 0x34190A66

Section .text.RCCEx_GetADCCLKFreq from blto2_FSBL_lto.o, size=438, align=4


RCCEx_GetADCCLKFreq: 0x34190A68: B580 PUSH 123R7, LR} 0x34190A6A: B088 SUB SP, SP, #32 0x34190A6C: 9007 STR R0, [SP, #28] 0x34190A6E: 2000 MOVS R0, #0 0x34190A70: 9006 STR R0, [SP, #24] 0x34190A72: 9807 LDR R0, [SP, #28] 0x34190A74: F7FF FC2E BL LL_RCC_GetADCClockSource ; 0x341902D4 0x34190A78: 4601 MOV R1, R0 0x34190A7A: 9104 STR R1, [SP, #16] 0x34190A7C: B1C8 CBZ R0, .L1 ; 0x34190AB2 0x34190A7E: 9804 LDR R0, [SP, #16] 0x34190A80: 2810 CMP R0, #16 0x34190A82: D01C BEQ 46L2 ; 0x34190ABE 0x34190A84: 9804 LDR R0, [SP, #16] 0x34190A86: 2820 CMP R0, #32 0x34190A88: D01E BEQ 46L3 ; 0x34190AC8 0x34190A8A: 9804 LDR R0, [SP, #16] 0x34190A8C: 2830 CMP R0, #48 0x34190A8E: D058 BEQ 46L9 ; 0x34190B42 0x34190A90: 9804 LDR R0, [SP, #16] 0x34190A92: 2840 CMP R0, #64 0x34190A94: F000 809F BEQ.W 46L17 ; 0x34190BD6 0x34190A98: 9804 LDR R0, [SP, #16] 0x34190A9A: 2850 CMP R0, #80 0x34190A9C: F000 808E BEQ.W 46L15 ; 0x34190BBC 0x34190AA0: 9804 LDR R0, [SP, #16] 0x34190AA2: 2860 CMP R0, #96 0x34190AA4: F000 80A0 BEQ.W 46L19 ; 0x34190BE8 0x34190AA8: 9804 LDR R0, [SP, #16] 0x34190AAA: 2870 CMP R0, #112 0x34190AAC: F000 80A2 BEQ.W 46L20 ; 0x34190BF4 0x34190AB0: E0AA B 46L21 ; 0x34190C08
.L1: 0x34190AB2: F7FF FBA1 BL HAL_RCC_GetSysClockFreq ; 0x341901F8 0x34190AB6: F7F9 FFB9 BL RCCEx_GetHCLKFreq ; 0x3418AA2C 0x34190ABA: 9006 STR R0, [SP, #24] 0x34190ABC: E0A4 B 46L21 ; 0x34190C08
.L2: 0x34190ABE: 2007 MOVS R0, #7 0x34190AC0: F7F8 F912 BL RCCEx_GetCLKPCLKFreq ; 0x34188CE8 0x34190AC4: 9006 STR R0, [SP, #24] 0x34190AC6: E09F B 46L21 ; 0x34190C08
.L3: 0x34190AC8: F7FA FA4A BL LL_RCC_IC7_IsEnabled ; 0x3418AF60 0x34190ACC: B3C0 CBZ R0, .L8 ; 0x34190B40 0x34190ACE: F001 F853 BL LL_RCC_IC7_GetDivider ; 0x34191B78 0x34190AD2: 9005 STR R0, [SP, #20] 0x34190AD4: F7FA FA4C BL LL_RCC_IC7_GetSource ; 0x3418AF70 0x34190AD8: 4601 MOV R1, R0 0x34190ADA: 9103 STR R1, [SP, #12] 0x34190ADC: B160 CBZ R0, .L4 ; 0x34190AF8 0x34190ADE: 9803 LDR R0, [SP, #12] 0x34190AE0: F1B0 5F80 CMP.W R0, #0x10000000 0x34190AE4: D011 BEQ 46L5 ; 0x34190B0A 0x34190AE6: 9803 LDR R0, [SP, #12] 0x34190AE8: F1B0 5F00 CMP.W R0, #0x20000000 0x34190AEC: D016 BEQ 46L6 ; 0x34190B1C 0x34190AEE: 9803 LDR R0, [SP, #12] 0x34190AF0: F1B0 5F40 CMP.W R0, #0x30000000 0x34190AF4: D01B BEQ 46L7 ; 0x34190B2E 0x34190AF6: E023 B 46L8 ; 0x34190B40
.L4: 0x34190AF8: F000 FEFA BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F0 0x34190AFC: 9006 STR R0, [SP, #24] 0x34190AFE: 9806 LDR R0, [SP, #24] 0x34190B00: 9905 LDR R1, [SP, #20] 0x34190B02: FBB0 F0F1 UDIV R0, R0, R1 0x34190B06: 9006 STR R0, [SP, #24] 0x34190B08: E01A B 46L8 ; 0x34190B40
.L5: 0x34190B0A: F000 FF33 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191974 0x34190B0E: 9006 STR R0, [SP, #24] 0x34190B10: 9806 LDR R0, [SP, #24] 0x34190B12: 9905 LDR R1, [SP, #20] 0x34190B14: FBB0 F0F1 UDIV R0, R0, R1 0x34190B18: 9006 STR R0, [SP, #24] 0x34190B1A: E011 B 46L8 ; 0x34190B40
.L6: 0x34190B1C: F000 FF6C BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919F8 0x34190B20: 9006 STR R0, [SP, #24] 0x34190B22: 9806 LDR R0, [SP, #24] 0x34190B24: 9905 LDR R1, [SP, #20] 0x34190B26: FBB0 F0F1 UDIV R0, R0, R1 0x34190B2A: 9006 STR R0, [SP, #24] 0x34190B2C: E008 B 46L8 ; 0x34190B40
.L7: 0x34190B2E: F000 FFA5 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A7C 0x34190B32: 9006 STR R0, [SP, #24] 0x34190B34: 9806 LDR R0, [SP, #24] 0x34190B36: 9905 LDR R1, [SP, #20] 0x34190B38: FBB0 F0F1 UDIV R0, R0, R1 0x34190B3C: 9006 STR R0, [SP, #24] 0x34190B3E: E7FF B 46L8 ; 0x34190B40
.L8: 0x34190B40: E062 B 46L21 ; 0x34190C08
.L9: 0x34190B42: F7FA F9F5 BL LL_RCC_IC8_IsEnabled ; 0x3418AF30 0x34190B46: B3C0 CBZ R0, .L14 ; 0x34190BBA 0x34190B48: F001 F80A BL LL_RCC_IC8_GetDivider ; 0x34191B60 0x34190B4C: 9005 STR R0, [SP, #20] 0x34190B4E: F7FA F9F7 BL LL_RCC_IC8_GetSource ; 0x3418AF40 0x34190B52: 4601 MOV R1, R0 0x34190B54: 9102 STR R1, [SP, #8] 0x34190B56: B160 CBZ R0, .L10 ; 0x34190B72 0x34190B58: 9802 LDR R0, [SP, #8] 0x34190B5A: F1B0 5F80 CMP.W R0, #0x10000000 0x34190B5E: D011 BEQ 46L11 ; 0x34190B84 0x34190B60: 9802 LDR R0, [SP, #8] 0x34190B62: F1B0 5F00 CMP.W R0, #0x20000000 0x34190B66: D016 BEQ 46L12 ; 0x34190B96 0x34190B68: 9802 LDR R0, [SP, #8] 0x34190B6A: F1B0 5F40 CMP.W R0, #0x30000000 0x34190B6E: D01B BEQ 46L13 ; 0x34190BA8 0x34190B70: E023 B 46L14 ; 0x34190BBA
.L10: 0x34190B72: F000 FEBD BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F0 0x34190B76: 9006 STR R0, [SP, #24] 0x34190B78: 9806 LDR R0, [SP, #24] 0x34190B7A: 9905 LDR R1, [SP, #20] 0x34190B7C: FBB0 F0F1 UDIV R0, R0, R1 0x34190B80: 9006 STR R0, [SP, #24] 0x34190B82: E01A B 46L14 ; 0x34190BBA
.L11: 0x34190B84: F000 FEF6 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191974 0x34190B88: 9006 STR R0, [SP, #24] 0x34190B8A: 9806 LDR R0, [SP, #24] 0x34190B8C: 9905 LDR R1, [SP, #20] 0x34190B8E: FBB0 F0F1 UDIV R0, R0, R1 0x34190B92: 9006 STR R0, [SP, #24] 0x34190B94: E011 B 46L14 ; 0x34190BBA
.L12: 0x34190B96: F000 FF2F BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919F8 0x34190B9A: 9006 STR R0, [SP, #24] 0x34190B9C: 9806 LDR R0, [SP, #24] 0x34190B9E: 9905 LDR R1, [SP, #20] 0x34190BA0: FBB0 F0F1 UDIV R0, R0, R1 0x34190BA4: 9006 STR R0, [SP, #24] 0x34190BA6: E008 B 46L14 ; 0x34190BBA
.L13: 0x34190BA8: F000 FF68 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A7C 0x34190BAC: 9006 STR R0, [SP, #24] 0x34190BAE: 9806 LDR R0, [SP, #24] 0x34190BB0: 9905 LDR R1, [SP, #20] 0x34190BB2: FBB0 F0F1 UDIV R0, R0, R1 0x34190BB6: 9006 STR R0, [SP, #24] 0x34190BB8: E7FF B 46L14 ; 0x34190BBA
.L14: 0x34190BBA: E025 B 46L21 ; 0x34190C08
.L15: 0x34190BBC: F7FA F836 BL LL_RCC_HSI_IsReady.77 ; 0x3418AC2C 0x34190BC0: B140 CBZ R0, .L16 ; 0x34190BD4 0x34190BC2: F7FA F83B BL LL_RCC_HSI_GetDivider.78 ; 0x3418AC3C 0x34190BC6: 09C1 LSRS R1, R0, #7 0x34190BC8: F249 0000 MOVW R0, #0x9000 0x34190BCC: F2C0 30D0 MOVT R0, #0x03D0 0x34190BD0: 40C8 LSRS R0, R1 0x34190BD2: 9006 STR R0, [SP, #24]
.L16: 0x34190BD4: E018 B 46L21 ; 0x34190C08
.L17: 0x34190BD6: F7FA F839 BL LL_RCC_MSI_IsReady.79 ; 0x3418AC4C 0x34190BDA: B120 CBZ R0, .L18 ; 0x34190BE6 0x34190BDC: F640 1000 MOVW R0, #0x0900 0x34190BE0: F2C0 003D MOVT R0, #61 0x34190BE4: 9006 STR R0, [SP, #24]
.L18: 0x34190BE6: E00F B 46L21 ; 0x34190C08
.L19: 0x34190BE8: F248 0000 MOVW R0, #0x8000 0x34190BEC: F2C0 00BB MOVT R0, #187 0x34190BF0: 9006 STR R0, [SP, #24] 0x34190BF2: E009 B 46L21 ; 0x34190C08
.L20: 0x34190BF4: F7FF FB00 BL HAL_RCC_GetSysClockFreq ; 0x341901F8 0x34190BF8: 9001 STR R0, [SP, #4] 0x34190BFA: F7F7 FF7B BL LL_RCC_GetTIMPrescaler ; 0x34188AF4 0x34190BFE: 4601 MOV R1, R0 0x34190C00: 9801 LDR R0, [SP, #4] 0x34190C02: 40C8 LSRS R0, R1 0x34190C04: 9006 STR R0, [SP, #24] 0x34190C06: E7FF B 46L21 ; 0x34190C08
.L21: 0x34190C08: 9806 LDR R0, [SP, #24] 0x34190C0A: 9000 STR R0, [SP, #0] 0x34190C0C: F7F7 FF32 BL LL_RCC_GetADCPrescaler ; 0x34188A74 0x34190C10: 4601 MOV R1, R0 0x34190C12: 9800 LDR R0, [SP, #0] 0x34190C14: 3101 ADDS R1, #1 0x34190C16: FBB0 F0F1 UDIV R0, R0, R1 0x34190C1A: B008 ADD SP, SP, #32 0x34190C1C: BD80 POP 123R7, PC}

Section .init.GPDMA1_Channel0_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel0_IRQHandler: 0x34190C1E: E7FE B GPDMA1_Channel0_IRQHandler ; 0x34190C1E

Section .text.RCCEx_GetCSICLKFreq from blto2_FSBL_lto.o, size=134, align=4


RCCEx_GetCSICLKFreq: 0x34190C20: B580 PUSH 123R7, LR} 0x34190C22: B084 SUB SP, SP, #16 0x34190C24: 2000 MOVS R0, #0 0x34190C26: 9003 STR R0, [SP, #12] 0x34190C28: F7FA FA50 BL LL_RCC_IC18_IsEnabled ; 0x3418B0CC 0x34190C2C: B3C0 CBZ R0, .L5 ; 0x34190CA0 0x34190C2E: F001 F80F BL LL_RCC_IC18_GetDivider ; 0x34191C50 0x34190C32: 9002 STR R0, [SP, #8] 0x34190C34: F7FA FA52 BL LL_RCC_IC18_GetSource ; 0x3418B0DC 0x34190C38: 4601 MOV R1, R0 0x34190C3A: 9101 STR R1, [SP, #4] 0x34190C3C: B160 CBZ R0, .L1 ; 0x34190C58 0x34190C3E: 9801 LDR R0, [SP, #4] 0x34190C40: F1B0 5F80 CMP.W R0, #0x10000000 0x34190C44: D011 BEQ 46L2 ; 0x34190C6A 0x34190C46: 9801 LDR R0, [SP, #4] 0x34190C48: F1B0 5F00 CMP.W R0, #0x20000000 0x34190C4C: D016 BEQ 46L3 ; 0x34190C7C 0x34190C4E: 9801 LDR R0, [SP, #4] 0x34190C50: F1B0 5F40 CMP.W R0, #0x30000000 0x34190C54: D01B BEQ 46L4 ; 0x34190C8E 0x34190C56: E023 B 46L5 ; 0x34190CA0
.L1: 0x34190C58: F000 FE4A BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F0 0x34190C5C: 9003 STR R0, [SP, #12] 0x34190C5E: 9803 LDR R0, [SP, #12] 0x34190C60: 9902 LDR R1, [SP, #8] 0x34190C62: FBB0 F0F1 UDIV R0, R0, R1 0x34190C66: 9003 STR R0, [SP, #12] 0x34190C68: E01A B 46L5 ; 0x34190CA0
.L2: 0x34190C6A: F000 FE83 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191974 0x34190C6E: 9003 STR R0, [SP, #12] 0x34190C70: 9803 LDR R0, [SP, #12] 0x34190C72: 9902 LDR R1, [SP, #8] 0x34190C74: FBB0 F0F1 UDIV R0, R0, R1 0x34190C78: 9003 STR R0, [SP, #12] 0x34190C7A: E011 B 46L5 ; 0x34190CA0
.L3: 0x34190C7C: F000 FEBC BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919F8 0x34190C80: 9003 STR R0, [SP, #12] 0x34190C82: 9803 LDR R0, [SP, #12] 0x34190C84: 9902 LDR R1, [SP, #8] 0x34190C86: FBB0 F0F1 UDIV R0, R0, R1 0x34190C8A: 9003 STR R0, [SP, #12] 0x34190C8C: E008 B 46L5 ; 0x34190CA0
.L4: 0x34190C8E: F000 FEF5 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A7C 0x34190C92: 9003 STR R0, [SP, #12] 0x34190C94: 9803 LDR R0, [SP, #12] 0x34190C96: 9902 LDR R1, [SP, #8] 0x34190C98: FBB0 F0F1 UDIV R0, R0, R1 0x34190C9C: 9003 STR R0, [SP, #12] 0x34190C9E: E7FF B 46L5 ; 0x34190CA0
.L5: 0x34190CA0: 9803 LDR R0, [SP, #12] 0x34190CA2: B004 ADD SP, SP, #16 0x34190CA4: BD80 POP 123R7, PC}

Section .init.GPDMA1_Channel1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel1_IRQHandler: 0x34190CA6: E7FE B GPDMA1_Channel1_IRQHandler ; 0x34190CA6

Section .text.RCCEx_GetETH1PTPCLKFreq from blto2_FSBL_lto.o, size=222, align=4


RCCEx_GetETH1PTPCLKFreq: 0x34190CA8: B580 PUSH 123R7, LR} 0x34190CAA: B086 SUB SP, SP, #24 0x34190CAC: 9005 STR R0, [SP, #20] 0x34190CAE: 2000 MOVS R0, #0 0x34190CB0: 9004 STR R0, [SP, #16] 0x34190CB2: 9805 LDR R0, [SP, #20] 0x34190CB4: F7FF FB4A BL LL_RCC_GetETHPTPClockSource ; 0x3419034C 0x34190CB8: 4601 MOV R1, R0 0x34190CBA: 9102 STR R1, [SP, #8] 0x34190CBC: 2803 CMP R0, #3 0x34190CBE: D855 BHI 46L7 ; 0x34190D6C 0x34190CC0: 9902 LDR R1, [SP, #8] 0x34190CC2: E8DF F001 TBB 91PC, R1] 0x34190CC6: 02 DC.B 0x02 ; '\x02' 0x34190CC7: 08 DC.B 0x08 ; '\b' 0x34190CC8: 0D DC.B 0x0D ; '\r' 0x34190CC9: 4A DC.B 0x4A ; 'J' 0x34190CCA: F7FF FA95 BL HAL_RCC_GetSysClockFreq ; 0x341901F8 0x34190CCE: F7F9 FEAD BL RCCEx_GetHCLKFreq ; 0x3418AA2C 0x34190CD2: 9004 STR R0, [SP, #16] 0x34190CD4: E04A B 46L7 ; 0x34190D6C 0x34190CD6: 2007 MOVS R0, #7 0x34190CD8: F7F8 F806 BL RCCEx_GetCLKPCLKFreq ; 0x34188CE8 0x34190CDC: 9004 STR R0, [SP, #16] 0x34190CDE: E045 B 46L7 ; 0x34190D6C 0x34190CE0: F7FA F9BC BL LL_RCC_IC13_IsEnabled ; 0x3418B05C 0x34190CE4: B3C0 CBZ R0, .L5 ; 0x34190D58 0x34190CE6: F000 FF8F BL LL_RCC_IC13_GetDivider ; 0x34191C08 0x34190CEA: 9003 STR R0, [SP, #12] 0x34190CEC: F7FA F9BE BL LL_RCC_IC13_GetSource ; 0x3418B06C 0x34190CF0: 4601 MOV R1, R0 0x34190CF2: 9101 STR R1, [SP, #4] 0x34190CF4: B160 CBZ R0, .L1 ; 0x34190D10 0x34190CF6: 9801 LDR R0, [SP, #4] 0x34190CF8: F1B0 5F80 CMP.W R0, #0x10000000 0x34190CFC: D011 BEQ 46L2 ; 0x34190D22 0x34190CFE: 9801 LDR R0, [SP, #4] 0x34190D00: F1B0 5F00 CMP.W R0, #0x20000000 0x34190D04: D016 BEQ 46L3 ; 0x34190D34 0x34190D06: 9801 LDR R0, [SP, #4] 0x34190D08: F1B0 5F40 CMP.W R0, #0x30000000 0x34190D0C: D01B BEQ 46L4 ; 0x34190D46 0x34190D0E: E023 B 46L5 ; 0x34190D58
.L1: 0x34190D10: F000 FDEE BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F0 0x34190D14: 9004 STR R0, [SP, #16] 0x34190D16: 9804 LDR R0, [SP, #16] 0x34190D18: 9903 LDR R1, [SP, #12] 0x34190D1A: FBB0 F0F1 UDIV R0, R0, R1 0x34190D1E: 9004 STR R0, [SP, #16] 0x34190D20: E01A B 46L5 ; 0x34190D58
.L2: 0x34190D22: F000 FE27 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191974 0x34190D26: 9004 STR R0, [SP, #16] 0x34190D28: 9804 LDR R0, [SP, #16] 0x34190D2A: 9903 LDR R1, [SP, #12] 0x34190D2C: FBB0 F0F1 UDIV R0, R0, R1 0x34190D30: 9004 STR R0, [SP, #16] 0x34190D32: E011 B 46L5 ; 0x34190D58
.L3: 0x34190D34: F000 FE60 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919F8 0x34190D38: 9004 STR R0, [SP, #16] 0x34190D3A: 9804 LDR R0, [SP, #16] 0x34190D3C: 9903 LDR R1, [SP, #12] 0x34190D3E: FBB0 F0F1 UDIV R0, R0, R1 0x34190D42: 9004 STR R0, [SP, #16] 0x34190D44: E008 B 46L5 ; 0x34190D58
.L4: 0x34190D46: F000 FE99 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A7C 0x34190D4A: 9004 STR R0, [SP, #16] 0x34190D4C: 9804 LDR R0, [SP, #16] 0x34190D4E: 9903 LDR R1, [SP, #12] 0x34190D50: FBB0 F0F1 UDIV R0, R0, R1 0x34190D54: 9004 STR R0, [SP, #16] 0x34190D56: E7FF B 46L5 ; 0x34190D58
.L5: 0x34190D58: E008 B 46L7 ; 0x34190D6C 0x34190D5A: F7F9 FF87 BL LL_RCC_HSE_IsReady.80 ; 0x3418AC6C 0x34190D5E: B120 CBZ R0, .L6 ; 0x34190D6A 0x34190D60: F646 4000 MOVW R0, #0x6C00 0x34190D64: F2C0 20DC MOVT R0, #0x02DC 0x34190D68: 9004 STR R0, [SP, #16]
.L6: 0x34190D6A: E7FF B 46L7 ; 0x34190D6C
.L7: 0x34190D6C: 9804 LDR R0, [SP, #16] 0x34190D6E: 9000 STR R0, [SP, #0] 0x34190D70: F7F7 FE88 BL LL_RCC_GetETH1PTPDivider ; 0x34188A84 0x34190D74: 4602 MOV R2, R0 0x34190D76: 9800 LDR R0, [SP, #0] 0x34190D78: 2101 MOVS R1, #1 0x34190D7A: EB01 1112 ADD.W R1, R1, R2, LSR #4 0x34190D7E: FBB0 F0F1 UDIV R0, R0, R1 0x34190D82: B006 ADD SP, SP, #24 0x34190D84: BD80 POP 123R7, PC}

Section .init.GPDMA1_Channel2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel2_IRQHandler: 0x34190D86: E7FE B GPDMA1_Channel2_IRQHandler ; 0x34190D86

Section .text.RCCEx_GetFDCANCLKFreq from blto2_FSBL_lto.o, size=206, align=4


RCCEx_GetFDCANCLKFreq: 0x34190D88: B580 PUSH 123R7, LR} 0x34190D8A: B086 SUB SP, SP, #24 0x34190D8C: 9005 STR R0, [SP, #20] 0x34190D8E: 2000 MOVS R0, #0 0x34190D90: 9004 STR R0, [SP, #16] 0x34190D92: 9805 LDR R0, [SP, #20] 0x34190D94: F7FF FAE6 BL LL_RCC_GetFDCANClockSource ; 0x34190364 0x34190D98: 4601 MOV R1, R0 0x34190D9A: 9102 STR R1, [SP, #8] 0x34190D9C: 2803 CMP R0, #3 0x34190D9E: D857 BHI 46L7 ; 0x34190E50 0x34190DA0: 9902 LDR R1, [SP, #8] 0x34190DA2: E8DF F001 TBB 91PC, R1] 0x34190DA6: 02 DC.B 0x02 ; '\x02' 0x34190DA7: 0A DC.B 0x0A ; '\n' 0x34190DA8: 0F DC.B 0x0F ; '\x0F' 0x34190DA9: 4C DC.B 0x4C ; 'L' 0x34190DAA: F7FF FA25 BL HAL_RCC_GetSysClockFreq ; 0x341901F8 0x34190DAE: F7F9 FE3D BL RCCEx_GetHCLKFreq ; 0x3418AA2C 0x34190DB2: F7FA F863 BL RCCEx_GetPCLK1Freq ; 0x3418AE7C 0x34190DB6: 9004 STR R0, [SP, #16] 0x34190DB8: E04A B 46L7 ; 0x34190E50 0x34190DBA: 2007 MOVS R0, #7 0x34190DBC: F7F7 FF94 BL RCCEx_GetCLKPCLKFreq ; 0x34188CE8 0x34190DC0: 9004 STR R0, [SP, #16] 0x34190DC2: E045 B 46L7 ; 0x34190E50 0x34190DC4: F7FA F93A BL LL_RCC_IC19_IsEnabled ; 0x3418B03C 0x34190DC8: B3C0 CBZ R0, .L5 ; 0x34190E3C 0x34190DCA: F000 FF11 BL LL_RCC_IC19_GetDivider ; 0x34191BF0 0x34190DCE: 9003 STR R0, [SP, #12] 0x34190DD0: F7FA F93C BL LL_RCC_IC19_GetSource ; 0x3418B04C 0x34190DD4: 4601 MOV R1, R0 0x34190DD6: 9101 STR R1, [SP, #4] 0x34190DD8: B160 CBZ R0, .L1 ; 0x34190DF4 0x34190DDA: 9801 LDR R0, [SP, #4] 0x34190DDC: F1B0 5F80 CMP.W R0, #0x10000000 0x34190DE0: D011 BEQ 46L2 ; 0x34190E06 0x34190DE2: 9801 LDR R0, [SP, #4] 0x34190DE4: F1B0 5F00 CMP.W R0, #0x20000000 0x34190DE8: D016 BEQ 46L3 ; 0x34190E18 0x34190DEA: 9801 LDR R0, [SP, #4] 0x34190DEC: F1B0 5F40 CMP.W R0, #0x30000000 0x34190DF0: D01B BEQ 46L4 ; 0x34190E2A 0x34190DF2: E023 B 46L5 ; 0x34190E3C
.L1: 0x34190DF4: F000 FD7C BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F0 0x34190DF8: 9004 STR R0, [SP, #16] 0x34190DFA: 9804 LDR R0, [SP, #16] 0x34190DFC: 9903 LDR R1, [SP, #12] 0x34190DFE: FBB0 F0F1 UDIV R0, R0, R1 0x34190E02: 9004 STR R0, [SP, #16] 0x34190E04: E01A B 46L5 ; 0x34190E3C
.L2: 0x34190E06: F000 FDB5 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191974 0x34190E0A: 9004 STR R0, [SP, #16] 0x34190E0C: 9804 LDR R0, [SP, #16] 0x34190E0E: 9903 LDR R1, [SP, #12] 0x34190E10: FBB0 F0F1 UDIV R0, R0, R1 0x34190E14: 9004 STR R0, [SP, #16] 0x34190E16: E011 B 46L5 ; 0x34190E3C
.L3: 0x34190E18: F000 FDEE BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919F8 0x34190E1C: 9004 STR R0, [SP, #16] 0x34190E1E: 9804 LDR R0, [SP, #16] 0x34190E20: 9903 LDR R1, [SP, #12] 0x34190E22: FBB0 F0F1 UDIV R0, R0, R1 0x34190E26: 9004 STR R0, [SP, #16] 0x34190E28: E008 B 46L5 ; 0x34190E3C
.L4: 0x34190E2A: F000 FE27 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A7C 0x34190E2E: 9004 STR R0, [SP, #16] 0x34190E30: 9804 LDR R0, [SP, #16] 0x34190E32: 9903 LDR R1, [SP, #12] 0x34190E34: FBB0 F0F1 UDIV R0, R0, R1 0x34190E38: 9004 STR R0, [SP, #16] 0x34190E3A: E7FF B 46L5 ; 0x34190E3C
.L5: 0x34190E3C: E008 B 46L7 ; 0x34190E50 0x34190E3E: F7F9 FF15 BL LL_RCC_HSE_IsReady.80 ; 0x3418AC6C 0x34190E42: B120 CBZ R0, .L6 ; 0x34190E4E 0x34190E44: F646 4000 MOVW R0, #0x6C00 0x34190E48: F2C0 20DC MOVT R0, #0x02DC 0x34190E4C: 9004 STR R0, [SP, #16]
.L6: 0x34190E4E: E7FF B 46L7 ; 0x34190E50
.L7: 0x34190E50: 9804 LDR R0, [SP, #16] 0x34190E52: B006 ADD SP, SP, #24 0x34190E54: BD80 POP 123R7, PC}

Section .init.GPDMA1_Channel3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel3_IRQHandler: 0x34190E56: E7FE B GPDMA1_Channel3_IRQHandler ; 0x34190E56

Section .text.RCCEx_GetFMCCLKFreq from blto2_FSBL_lto.o, size=314, align=4


RCCEx_GetFMCCLKFreq: 0x34190E58: B580 PUSH 123R7, LR} 0x34190E5A: B086 SUB SP, SP, #24 0x34190E5C: 9005 STR R0, [SP, #20] 0x34190E5E: 2000 MOVS R0, #0 0x34190E60: 9004 STR R0, [SP, #16] 0x34190E62: 9805 LDR R0, [SP, #20] 0x34190E64: F7FF FA8A BL LL_RCC_GetFMCClockSource ; 0x3419037C 0x34190E68: 4601 MOV R1, R0 0x34190E6A: 9102 STR R1, [SP, #8] 0x34190E6C: B148 CBZ R0, .L1 ; 0x34190E82 0x34190E6E: 9802 LDR R0, [SP, #8] 0x34190E70: 2810 CMP R0, #16 0x34190E72: D00C BEQ 46L2 ; 0x34190E8E 0x34190E74: 9802 LDR R0, [SP, #8] 0x34190E76: 2820 CMP R0, #32 0x34190E78: D00E BEQ 46L3 ; 0x34190E98 0x34190E7A: 9802 LDR R0, [SP, #8] 0x34190E7C: 2830 CMP R0, #48 0x34190E7E: D048 BEQ 46L9 ; 0x34190F12 0x34190E80: E084 B 46L15 ; 0x34190F8C
.L1: 0x34190E82: F7FF F9B9 BL HAL_RCC_GetSysClockFreq ; 0x341901F8 0x34190E86: F7F9 FDD1 BL RCCEx_GetHCLKFreq ; 0x3418AA2C 0x34190E8A: 9004 STR R0, [SP, #16] 0x34190E8C: E07E B 46L15 ; 0x34190F8C
.L2: 0x34190E8E: 2007 MOVS R0, #7 0x34190E90: F7F7 FF2A BL RCCEx_GetCLKPCLKFreq ; 0x34188CE8 0x34190E94: 9004 STR R0, [SP, #16] 0x34190E96: E079 B 46L15 ; 0x34190F8C
.L3: 0x34190E98: F7F9 FDD6 BL LL_RCC_IC3_IsEnabled ; 0x3418AA48 0x34190E9C: B3C0 CBZ R0, .L8 ; 0x34190F10 0x34190E9E: F000 FD1B BL LL_RCC_IC3_GetDivider ; 0x341918D8 0x34190EA2: 9003 STR R0, [SP, #12] 0x34190EA4: F7F9 FDD8 BL LL_RCC_IC3_GetSource ; 0x3418AA58 0x34190EA8: 4601 MOV R1, R0 0x34190EAA: 9101 STR R1, [SP, #4] 0x34190EAC: B160 CBZ R0, .L4 ; 0x34190EC8 0x34190EAE: 9801 LDR R0, [SP, #4] 0x34190EB0: F1B0 5F80 CMP.W R0, #0x10000000 0x34190EB4: D011 BEQ 46L5 ; 0x34190EDA 0x34190EB6: 9801 LDR R0, [SP, #4] 0x34190EB8: F1B0 5F00 CMP.W R0, #0x20000000 0x34190EBC: D016 BEQ 46L6 ; 0x34190EEC 0x34190EBE: 9801 LDR R0, [SP, #4] 0x34190EC0: F1B0 5F40 CMP.W R0, #0x30000000 0x34190EC4: D01B BEQ 46L7 ; 0x34190EFE 0x34190EC6: E023 B 46L8 ; 0x34190F10
.L4: 0x34190EC8: F000 FD12 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F0 0x34190ECC: 9004 STR R0, [SP, #16] 0x34190ECE: 9804 LDR R0, [SP, #16] 0x34190ED0: 9903 LDR R1, [SP, #12] 0x34190ED2: FBB0 F0F1 UDIV R0, R0, R1 0x34190ED6: 9004 STR R0, [SP, #16] 0x34190ED8: E01A B 46L8 ; 0x34190F10
.L5: 0x34190EDA: F000 FD4B BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191974 0x34190EDE: 9004 STR R0, [SP, #16] 0x34190EE0: 9804 LDR R0, [SP, #16] 0x34190EE2: 9903 LDR R1, [SP, #12] 0x34190EE4: FBB0 F0F1 UDIV R0, R0, R1 0x34190EE8: 9004 STR R0, [SP, #16] 0x34190EEA: E011 B 46L8 ; 0x34190F10
.L6: 0x34190EEC: F000 FD84 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919F8 0x34190EF0: 9004 STR R0, [SP, #16] 0x34190EF2: 9804 LDR R0, [SP, #16] 0x34190EF4: 9903 LDR R1, [SP, #12] 0x34190EF6: FBB0 F0F1 UDIV R0, R0, R1 0x34190EFA: 9004 STR R0, [SP, #16] 0x34190EFC: E008 B 46L8 ; 0x34190F10
.L7: 0x34190EFE: F000 FDBD BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A7C 0x34190F02: 9004 STR R0, [SP, #16] 0x34190F04: 9804 LDR R0, [SP, #16] 0x34190F06: 9903 LDR R1, [SP, #12] 0x34190F08: FBB0 F0F1 UDIV R0, R0, R1 0x34190F0C: 9004 STR R0, [SP, #16] 0x34190F0E: E7FF B 46L8 ; 0x34190F10
.L8: 0x34190F10: E03C B 46L15 ; 0x34190F8C
.L9: 0x34190F12: F7F9 FDA9 BL LL_RCC_IC4_IsEnabled ; 0x3418AA68 0x34190F16: B3C0 CBZ R0, .L14 ; 0x34190F8A 0x34190F18: F000 FDF2 BL LL_RCC_IC4_GetDivider ; 0x34191B00 0x34190F1C: 9003 STR R0, [SP, #12] 0x34190F1E: F7F9 FDAB BL LL_RCC_IC4_GetSource ; 0x3418AA78 0x34190F22: 4601 MOV R1, R0 0x34190F24: 9100 STR R1, [SP, #0] 0x34190F26: B160 CBZ R0, .L10 ; 0x34190F42 0x34190F28: 9800 LDR R0, [SP, #0] 0x34190F2A: F1B0 5F80 CMP.W R0, #0x10000000 0x34190F2E: D011 BEQ 46L11 ; 0x34190F54 0x34190F30: 9800 LDR R0, [SP, #0] 0x34190F32: F1B0 5F00 CMP.W R0, #0x20000000 0x34190F36: D016 BEQ 46L12 ; 0x34190F66 0x34190F38: 9800 LDR R0, [SP, #0] 0x34190F3A: F1B0 5F40 CMP.W R0, #0x30000000 0x34190F3E: D01B BEQ 46L13 ; 0x34190F78 0x34190F40: E023 B 46L14 ; 0x34190F8A
.L10: 0x34190F42: F000 FCD5 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F0 0x34190F46: 9004 STR R0, [SP, #16] 0x34190F48: 9804 LDR R0, [SP, #16] 0x34190F4A: 9903 LDR R1, [SP, #12] 0x34190F4C: FBB0 F0F1 UDIV R0, R0, R1 0x34190F50: 9004 STR R0, [SP, #16] 0x34190F52: E01A B 46L14 ; 0x34190F8A
.L11: 0x34190F54: F000 FD0E BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191974 0x34190F58: 9004 STR R0, [SP, #16] 0x34190F5A: 9804 LDR R0, [SP, #16] 0x34190F5C: 9903 LDR R1, [SP, #12] 0x34190F5E: FBB0 F0F1 UDIV R0, R0, R1 0x34190F62: 9004 STR R0, [SP, #16] 0x34190F64: E011 B 46L14 ; 0x34190F8A
.L12: 0x34190F66: F000 FD47 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919F8 0x34190F6A: 9004 STR R0, [SP, #16] 0x34190F6C: 9804 LDR R0, [SP, #16] 0x34190F6E: 9903 LDR R1, [SP, #12] 0x34190F70: FBB0 F0F1 UDIV R0, R0, R1 0x34190F74: 9004 STR R0, [SP, #16] 0x34190F76: E008 B 46L14 ; 0x34190F8A
.L13: 0x34190F78: F000 FD80 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A7C 0x34190F7C: 9004 STR R0, [SP, #16] 0x34190F7E: 9804 LDR R0, [SP, #16] 0x34190F80: 9903 LDR R1, [SP, #12] 0x34190F82: FBB0 F0F1 UDIV R0, R0, R1 0x34190F86: 9004 STR R0, [SP, #16] 0x34190F88: E7FF B 46L14 ; 0x34190F8A
.L14: 0x34190F8A: E7FF B 46L15 ; 0x34190F8C
.L15: 0x34190F8C: 9804 LDR R0, [SP, #16] 0x34190F8E: B006 ADD SP, SP, #24 0x34190F90: BD80 POP 123R7, PC}

Section .init.GPDMA1_Channel4_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel4_IRQHandler: 0x34190F92: E7FE B GPDMA1_Channel4_IRQHandler ; 0x34190F92

Section .text.RCCEx_GetI2CCLKFreq from blto2_FSBL_lto.o, size=706, align=4


RCCEx_GetI2CCLKFreq: 0x34190F94: B580 PUSH 123R7, LR} 0x34190F96: B086 SUB SP, SP, #24 0x34190F98: 9005 STR R0, [SP, #20] 0x34190F9A: 2000 MOVS R0, #0 0x34190F9C: 9004 STR R0, [SP, #16] 0x34190F9E: 9805 LDR R0, [SP, #20] 0x34190FA0: F7F7 FD78 BL LL_RCC_GetI2CClockSource ; 0x34188A94 0x34190FA4: 4601 MOV R1, R0 0x34190FA6: 9102 STR R1, [SP, #8] 0x34190FA8: 210C MOVS R1, #12 0x34190FAA: F2C0 7100 MOVT R1, #0x0700 0x34190FAE: 4288 CMP R0, R1 0x34190FB0: F000 80B1 BEQ.W 46L1 ; 0x34191116 0x34190FB4: 9802 LDR R0, [SP, #8] 0x34190FB6: F240 410C MOVW R1, #0x040C 0x34190FBA: F2C0 7100 MOVT R1, #0x0700 0x34190FBE: 4288 CMP R0, R1 0x34190FC0: F000 80A9 BEQ.W 46L1 ; 0x34191116 0x34190FC4: 9802 LDR R0, [SP, #8] 0x34190FC6: F640 010C MOVW R1, #0x080C 0x34190FCA: F2C0 7100 MOVT R1, #0x0700 0x34190FCE: 4288 CMP R0, R1 0x34190FD0: F000 80A1 BEQ.W 46L1 ; 0x34191116 0x34190FD4: 9802 LDR R0, [SP, #8] 0x34190FD6: F640 410C MOVW R1, #0x0C0C 0x34190FDA: F2C0 7100 MOVT R1, #0x0700 0x34190FDE: 4288 CMP R0, R1 0x34190FE0: F000 8099 BEQ.W 46L1 ; 0x34191116 0x34190FE4: 9802 LDR R0, [SP, #8] 0x34190FE6: 210C MOVS R1, #12 0x34190FE8: F2C0 7101 MOVT R1, #0x0701 0x34190FEC: 4288 CMP R0, R1 0x34190FEE: F000 809A BEQ.W 46L2 ; 0x34191126 0x34190FF2: 9802 LDR R0, [SP, #8] 0x34190FF4: F240 410C MOVW R1, #0x040C 0x34190FF8: F2C0 7101 MOVT R1, #0x0701 0x34190FFC: 4288 CMP R0, R1 0x34190FFE: F000 8092 BEQ.W 46L2 ; 0x34191126 0x34191002: 9802 LDR R0, [SP, #8] 0x34191004: F640 010C MOVW R1, #0x080C 0x34191008: F2C0 7101 MOVT R1, #0x0701 0x3419100C: 4288 CMP R0, R1 0x3419100E: F000 808A BEQ.W 46L2 ; 0x34191126 0x34191012: 9802 LDR R0, [SP, #8] 0x34191014: F640 410C MOVW R1, #0x0C0C 0x34191018: F2C0 7101 MOVT R1, #0x0701 0x3419101C: 4288 CMP R0, R1 0x3419101E: F000 8082 BEQ.W 46L2 ; 0x34191126 0x34191022: 9802 LDR R0, [SP, #8] 0x34191024: 210C MOVS R1, #12 0x34191026: F2C0 7102 MOVT R1, #0x0702 0x3419102A: 4288 CMP R0, R1 0x3419102C: F000 8080 BEQ.W 46L3 ; 0x34191130 0x34191030: 9802 LDR R0, [SP, #8] 0x34191032: F240 410C MOVW R1, #0x040C 0x34191036: F2C0 7102 MOVT R1, #0x0702 0x3419103A: 4288 CMP R0, R1 0x3419103C: D078 BEQ 46L3 ; 0x34191130 0x3419103E: 9802 LDR R0, [SP, #8] 0x34191040: F640 010C MOVW R1, #0x080C 0x34191044: F2C0 7102 MOVT R1, #0x0702 0x34191048: 4288 CMP R0, R1 0x3419104A: D071 BEQ 46L3 ; 0x34191130 0x3419104C: 9802 LDR R0, [SP, #8] 0x3419104E: F640 410C MOVW R1, #0x0C0C 0x34191052: F2C0 7102 MOVT R1, #0x0702 0x34191056: 4288 CMP R0, R1 0x34191058: D06A BEQ 46L3 ; 0x34191130 0x3419105A: 9802 LDR R0, [SP, #8] 0x3419105C: 210C MOVS R1, #12 0x3419105E: F2C0 7103 MOVT R1, #0x0703 0x34191062: 4288 CMP R0, R1 0x34191064: F000 80A1 BEQ.W 46L9 ; 0x341911AA 0x34191068: 9802 LDR R0, [SP, #8] 0x3419106A: F240 410C MOVW R1, #0x040C 0x3419106E: F2C0 7103 MOVT R1, #0x0703 0x34191072: 4288 CMP R0, R1 0x34191074: F000 8099 BEQ.W 46L9 ; 0x341911AA 0x34191078: 9802 LDR R0, [SP, #8] 0x3419107A: F640 010C MOVW R1, #0x080C 0x3419107E: F2C0 7103 MOVT R1, #0x0703 0x34191082: 4288 CMP R0, R1 0x34191084: F000 8091 BEQ.W 46L9 ; 0x341911AA 0x34191088: 9802 LDR R0, [SP, #8] 0x3419108A: F640 410C MOVW R1, #0x0C0C 0x3419108E: F2C0 7103 MOVT R1, #0x0703 0x34191092: 4288 CMP R0, R1 0x34191094: F000 8089 BEQ.W 46L9 ; 0x341911AA 0x34191098: 9802 LDR R0, [SP, #8] 0x3419109A: 210C MOVS R1, #12 0x3419109C: F2C0 7104 MOVT R1, #0x0704 0x341910A0: 4288 CMP R0, R1 0x341910A2: F000 80CC BEQ.W 46L17 ; 0x3419123E 0x341910A6: 9802 LDR R0, [SP, #8] 0x341910A8: F240 410C MOVW R1, #0x040C 0x341910AC: F2C0 7104 MOVT R1, #0x0704 0x341910B0: 4288 CMP R0, R1 0x341910B2: F000 80C4 BEQ.W 46L17 ; 0x3419123E 0x341910B6: 9802 LDR R0, [SP, #8] 0x341910B8: F640 010C MOVW R1, #0x080C 0x341910BC: F2C0 7104 MOVT R1, #0x0704 0x341910C0: 4288 CMP R0, R1 0x341910C2: F000 80BC BEQ.W 46L17 ; 0x3419123E 0x341910C6: 9802 LDR R0, [SP, #8] 0x341910C8: F640 410C MOVW R1, #0x0C0C 0x341910CC: F2C0 7104 MOVT R1, #0x0704 0x341910D0: 4288 CMP R0, R1 0x341910D2: F000 80B4 BEQ.W 46L17 ; 0x3419123E 0x341910D6: 9802 LDR R0, [SP, #8] 0x341910D8: 210C MOVS R1, #12 0x341910DA: F2C0 7105 MOVT R1, #0x0705 0x341910DE: 4288 CMP R0, R1 0x341910E0: F000 80A0 BEQ.W 46L15 ; 0x34191224 0x341910E4: 9802 LDR R0, [SP, #8] 0x341910E6: F240 410C MOVW R1, #0x040C 0x341910EA: F2C0 7105 MOVT R1, #0x0705 0x341910EE: 4288 CMP R0, R1 0x341910F0: F000 8098 BEQ.W 46L15 ; 0x34191224 0x341910F4: 9802 LDR R0, [SP, #8] 0x341910F6: F640 010C MOVW R1, #0x080C 0x341910FA: F2C0 7105 MOVT R1, #0x0705 0x341910FE: 4288 CMP R0, R1 0x34191100: F000 8090 BEQ.W 46L15 ; 0x34191224 0x34191104: 9802 LDR R0, [SP, #8] 0x34191106: F640 410C MOVW R1, #0x0C0C 0x3419110A: F2C0 7105 MOVT R1, #0x0705 0x3419110E: 4288 CMP R0, R1 0x34191110: F000 8088 BEQ.W 46L15 ; 0x34191224 0x34191114: E09C B 46L19 ; 0x34191250
.L1: 0x34191116: F7FF F86F BL HAL_RCC_GetSysClockFreq ; 0x341901F8 0x3419111A: F7F9 FC87 BL RCCEx_GetHCLKFreq ; 0x3418AA2C 0x3419111E: F7F9 FEAD BL RCCEx_GetPCLK1Freq ; 0x3418AE7C 0x34191122: 9004 STR R0, [SP, #16] 0x34191124: E094 B 46L19 ; 0x34191250
.L2: 0x34191126: 2007 MOVS R0, #7 0x34191128: F7F7 FDDE BL RCCEx_GetCLKPCLKFreq ; 0x34188CE8 0x3419112C: 9004 STR R0, [SP, #16] 0x3419112E: E08F B 46L19 ; 0x34191250
.L3: 0x34191130: F7F9 FF74 BL LL_RCC_IC10_IsEnabled ; 0x3418B01C 0x34191134: B3C0 CBZ R0, .L8 ; 0x341911A8 0x34191136: F000 FD4F BL LL_RCC_IC10_GetDivider ; 0x34191BD8 0x3419113A: 9003 STR R0, [SP, #12] 0x3419113C: F7F9 FF76 BL LL_RCC_IC10_GetSource ; 0x3418B02C 0x34191140: 4601 MOV R1, R0 0x34191142: 9101 STR R1, [SP, #4] 0x34191144: B160 CBZ R0, .L4 ; 0x34191160 0x34191146: 9801 LDR R0, [SP, #4] 0x34191148: F1B0 5F80 CMP.W R0, #0x10000000 0x3419114C: D011 BEQ 46L5 ; 0x34191172 0x3419114E: 9801 LDR R0, [SP, #4] 0x34191150: F1B0 5F00 CMP.W R0, #0x20000000 0x34191154: D016 BEQ 46L6 ; 0x34191184 0x34191156: 9801 LDR R0, [SP, #4] 0x34191158: F1B0 5F40 CMP.W R0, #0x30000000 0x3419115C: D01B BEQ 46L7 ; 0x34191196 0x3419115E: E023 B 46L8 ; 0x341911A8
.L4: 0x34191160: F000 FBC6 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F0 0x34191164: 9004 STR R0, [SP, #16] 0x34191166: 9804 LDR R0, [SP, #16] 0x34191168: 9903 LDR R1, [SP, #12] 0x3419116A: FBB0 F0F1 UDIV R0, R0, R1 0x3419116E: 9004 STR R0, [SP, #16] 0x34191170: E01A B 46L8 ; 0x341911A8
.L5: 0x34191172: F000 FBFF BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191974 0x34191176: 9004 STR R0, [SP, #16] 0x34191178: 9804 LDR R0, [SP, #16] 0x3419117A: 9903 LDR R1, [SP, #12] 0x3419117C: FBB0 F0F1 UDIV R0, R0, R1 0x34191180: 9004 STR R0, [SP, #16] 0x34191182: E011 B 46L8 ; 0x341911A8
.L6: 0x34191184: F000 FC38 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919F8 0x34191188: 9004 STR R0, [SP, #16] 0x3419118A: 9804 LDR R0, [SP, #16] 0x3419118C: 9903 LDR R1, [SP, #12] 0x3419118E: FBB0 F0F1 UDIV R0, R0, R1 0x34191192: 9004 STR R0, [SP, #16] 0x34191194: E008 B 46L8 ; 0x341911A8
.L7: 0x34191196: F000 FC71 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A7C 0x3419119A: 9004 STR R0, [SP, #16] 0x3419119C: 9804 LDR R0, [SP, #16] 0x3419119E: 9903 LDR R1, [SP, #12] 0x341911A0: FBB0 F0F1 UDIV R0, R0, R1 0x341911A4: 9004 STR R0, [SP, #16] 0x341911A6: E7FF B 46L8 ; 0x341911A8
.L8: 0x341911A8: E052 B 46L19 ; 0x34191250
.L9: 0x341911AA: F7F9 FE4F BL LL_RCC_IC15_IsEnabled ; 0x3418AE4C 0x341911AE: B3C0 CBZ R0, .L14 ; 0x34191222 0x341911B0: F000 FCB2 BL LL_RCC_IC15_GetDivider ; 0x34191B18 0x341911B4: 9003 STR R0, [SP, #12] 0x341911B6: F7F9 FE51 BL LL_RCC_IC15_GetSource ; 0x3418AE5C 0x341911BA: 4601 MOV R1, R0 0x341911BC: 9100 STR R1, [SP, #0] 0x341911BE: B160 CBZ R0, .L10 ; 0x341911DA 0x341911C0: 9800 LDR R0, [SP, #0] 0x341911C2: F1B0 5F80 CMP.W R0, #0x10000000 0x341911C6: D011 BEQ 46L11 ; 0x341911EC 0x341911C8: 9800 LDR R0, [SP, #0] 0x341911CA: F1B0 5F00 CMP.W R0, #0x20000000 0x341911CE: D016 BEQ 46L12 ; 0x341911FE 0x341911D0: 9800 LDR R0, [SP, #0] 0x341911D2: F1B0 5F40 CMP.W R0, #0x30000000 0x341911D6: D01B BEQ 46L13 ; 0x34191210 0x341911D8: E023 B 46L14 ; 0x34191222
.L10: 0x341911DA: F000 FB89 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F0 0x341911DE: 9004 STR R0, [SP, #16] 0x341911E0: 9804 LDR R0, [SP, #16] 0x341911E2: 9903 LDR R1, [SP, #12] 0x341911E4: FBB0 F0F1 UDIV R0, R0, R1 0x341911E8: 9004 STR R0, [SP, #16] 0x341911EA: E01A B 46L14 ; 0x34191222
.L11: 0x341911EC: F000 FBC2 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191974 0x341911F0: 9004 STR R0, [SP, #16] 0x341911F2: 9804 LDR R0, [SP, #16] 0x341911F4: 9903 LDR R1, [SP, #12] 0x341911F6: FBB0 F0F1 UDIV R0, R0, R1 0x341911FA: 9004 STR R0, [SP, #16] 0x341911FC: E011 B 46L14 ; 0x34191222
.L12: 0x341911FE: F000 FBFB BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919F8 0x34191202: 9004 STR R0, [SP, #16] 0x34191204: 9804 LDR R0, [SP, #16] 0x34191206: 9903 LDR R1, [SP, #12] 0x34191208: FBB0 F0F1 UDIV R0, R0, R1 0x3419120C: 9004 STR R0, [SP, #16] 0x3419120E: E008 B 46L14 ; 0x34191222
.L13: 0x34191210: F000 FC34 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A7C 0x34191214: 9004 STR R0, [SP, #16] 0x34191216: 9804 LDR R0, [SP, #16] 0x34191218: 9903 LDR R1, [SP, #12] 0x3419121A: FBB0 F0F1 UDIV R0, R0, R1 0x3419121E: 9004 STR R0, [SP, #16] 0x34191220: E7FF B 46L14 ; 0x34191222
.L14: 0x34191222: E015 B 46L19 ; 0x34191250
.L15: 0x34191224: F7F9 FD02 BL LL_RCC_HSI_IsReady.77 ; 0x3418AC2C 0x34191228: B140 CBZ R0, .L16 ; 0x3419123C 0x3419122A: F7F9 FD07 BL LL_RCC_HSI_GetDivider.78 ; 0x3418AC3C 0x3419122E: 09C1 LSRS R1, R0, #7 0x34191230: F249 0000 MOVW R0, #0x9000 0x34191234: F2C0 30D0 MOVT R0, #0x03D0 0x34191238: 40C8 LSRS R0, R1 0x3419123A: 9004 STR R0, [SP, #16]
.L16: 0x3419123C: E008 B 46L19 ; 0x34191250
.L17: 0x3419123E: F7F9 FD05 BL LL_RCC_MSI_IsReady.79 ; 0x3418AC4C 0x34191242: B120 CBZ R0, .L18 ; 0x3419124E 0x34191244: F640 1000 MOVW R0, #0x0900 0x34191248: F2C0 003D MOVT R0, #61 0x3419124C: 9004 STR R0, [SP, #16]
.L18: 0x3419124E: E7FF B 46L19 ; 0x34191250
.L19: 0x34191250: 9804 LDR R0, [SP, #16] 0x34191252: B006 ADD SP, SP, #24 0x34191254: BD80 POP 123R7, PC}

Section .init.GPDMA1_Channel5_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel5_IRQHandler: 0x34191256: E7FE B GPDMA1_Channel5_IRQHandler ; 0x34191256

Section .text.RCCEx_GetLPTIMCLKFreq from blto2_FSBL_lto.o, size=706, align=4


RCCEx_GetLPTIMCLKFreq: 0x34191258: B580 PUSH 123R7, LR} 0x3419125A: B086 SUB SP, SP, #24 0x3419125C: 9005 STR R0, [SP, #20] 0x3419125E: 2000 MOVS R0, #0 0x34191260: 9004 STR R0, [SP, #16] 0x34191262: 9805 LDR R0, [SP, #20] 0x34191264: F7F7 FC26 BL LL_RCC_GetLPTIMClockSource ; 0x34188AB4 0x34191268: 4601 MOV R1, R0 0x3419126A: 9102 STR R1, [SP, #8] 0x3419126C: F640 012C MOVW R1, #0x082C 0x34191270: F2C0 7100 MOVT R1, #0x0700 0x34191274: 4288 CMP R0, R1 0x34191276: F000 80E3 BEQ.W 46L1 ; 0x34191440 0x3419127A: 9802 LDR R0, [SP, #8] 0x3419127C: F640 412C MOVW R1, #0x0C2C 0x34191280: F2C0 7100 MOVT R1, #0x0700 0x34191284: 4288 CMP R0, R1 0x34191286: F000 80E3 BEQ.W 46L2 ; 0x34191450 0x3419128A: 9802 LDR R0, [SP, #8] 0x3419128C: F241 012C MOVW R1, #0x102C 0x34191290: F2C0 7100 MOVT R1, #0x0700 0x34191294: 4288 CMP R0, R1 0x34191296: F000 80DB BEQ.W 46L2 ; 0x34191450 0x3419129A: 9802 LDR R0, [SP, #8] 0x3419129C: F241 412C MOVW R1, #0x142C 0x341912A0: F2C0 7100 MOVT R1, #0x0700 0x341912A4: 4288 CMP R0, R1 0x341912A6: F000 80D3 BEQ.W 46L2 ; 0x34191450 0x341912AA: 9802 LDR R0, [SP, #8] 0x341912AC: F641 012C MOVW R1, #0x182C 0x341912B0: F2C0 7100 MOVT R1, #0x0700 0x341912B4: 4288 CMP R0, R1 0x341912B6: F000 80CB BEQ.W 46L2 ; 0x34191450 0x341912BA: 9802 LDR R0, [SP, #8] 0x341912BC: F640 012C MOVW R1, #0x082C 0x341912C0: F2C0 7101 MOVT R1, #0x0701 0x341912C4: 4288 CMP R0, R1 0x341912C6: F000 80CB BEQ.W 46L3 ; 0x34191460 0x341912CA: 9802 LDR R0, [SP, #8] 0x341912CC: F640 412C MOVW R1, #0x0C2C 0x341912D0: F2C0 7101 MOVT R1, #0x0701 0x341912D4: 4288 CMP R0, R1 0x341912D6: F000 80C3 BEQ.W 46L3 ; 0x34191460 0x341912DA: 9802 LDR R0, [SP, #8] 0x341912DC: F241 012C MOVW R1, #0x102C 0x341912E0: F2C0 7101 MOVT R1, #0x0701 0x341912E4: 4288 CMP R0, R1 0x341912E6: F000 80BB BEQ.W 46L3 ; 0x34191460 0x341912EA: 9802 LDR R0, [SP, #8] 0x341912EC: F241 412C MOVW R1, #0x142C 0x341912F0: F2C0 7101 MOVT R1, #0x0701 0x341912F4: 4288 CMP R0, R1 0x341912F6: F000 80B3 BEQ.W 46L3 ; 0x34191460 0x341912FA: 9802 LDR R0, [SP, #8] 0x341912FC: F641 012C MOVW R1, #0x182C 0x34191300: F2C0 7101 MOVT R1, #0x0701 0x34191304: 4288 CMP R0, R1 0x34191306: F000 80AB BEQ.W 46L3 ; 0x34191460 0x3419130A: 9802 LDR R0, [SP, #8] 0x3419130C: F640 012C MOVW R1, #0x082C 0x34191310: F2C0 7102 MOVT R1, #0x0702 0x34191314: 4288 CMP R0, R1 0x34191316: F000 80A8 BEQ.W 46L4 ; 0x3419146A 0x3419131A: 9802 LDR R0, [SP, #8] 0x3419131C: F640 412C MOVW R1, #0x0C2C 0x34191320: F2C0 7102 MOVT R1, #0x0702 0x34191324: 4288 CMP R0, R1 0x34191326: F000 80A0 BEQ.W 46L4 ; 0x3419146A 0x3419132A: 9802 LDR R0, [SP, #8] 0x3419132C: F241 012C MOVW R1, #0x102C 0x34191330: F2C0 7102 MOVT R1, #0x0702 0x34191334: 4288 CMP R0, R1 0x34191336: F000 8098 BEQ.W 46L4 ; 0x3419146A 0x3419133A: 9802 LDR R0, [SP, #8] 0x3419133C: F241 412C MOVW R1, #0x142C 0x34191340: F2C0 7102 MOVT R1, #0x0702 0x34191344: 4288 CMP R0, R1 0x34191346: F000 8090 BEQ.W 46L4 ; 0x3419146A 0x3419134A: 9802 LDR R0, [SP, #8] 0x3419134C: F641 012C MOVW R1, #0x182C 0x34191350: F2C0 7102 MOVT R1, #0x0702 0x34191354: 4288 CMP R0, R1 0x34191356: F000 8088 BEQ.W 46L4 ; 0x3419146A 0x3419135A: 9802 LDR R0, [SP, #8] 0x3419135C: F640 012C MOVW R1, #0x082C 0x34191360: F2C0 7103 MOVT R1, #0x0703 0x34191364: 4288 CMP R0, R1 0x34191366: F000 80BD BEQ.W 46L10 ; 0x341914E4 0x3419136A: 9802 LDR R0, [SP, #8] 0x3419136C: F640 412C MOVW R1, #0x0C2C 0x34191370: F2C0 7103 MOVT R1, #0x0703 0x34191374: 4288 CMP R0, R1 0x34191376: F000 80B5 BEQ.W 46L10 ; 0x341914E4 0x3419137A: 9802 LDR R0, [SP, #8] 0x3419137C: F241 012C MOVW R1, #0x102C 0x34191380: F2C0 7103 MOVT R1, #0x0703 0x34191384: 4288 CMP R0, R1 0x34191386: F000 80AD BEQ.W 46L10 ; 0x341914E4 0x3419138A: 9802 LDR R0, [SP, #8] 0x3419138C: F241 412C MOVW R1, #0x142C 0x34191390: F2C0 7103 MOVT R1, #0x0703 0x34191394: 4288 CMP R0, R1 0x34191396: F000 80A5 BEQ.W 46L10 ; 0x341914E4 0x3419139A: 9802 LDR R0, [SP, #8] 0x3419139C: F641 012C MOVW R1, #0x182C 0x341913A0: F2C0 7103 MOVT R1, #0x0703 0x341913A4: 4288 CMP R0, R1 0x341913A6: F000 809D BEQ.W 46L10 ; 0x341914E4 0x341913AA: 9802 LDR R0, [SP, #8] 0x341913AC: F640 012C MOVW R1, #0x082C 0x341913B0: F2C0 7104 MOVT R1, #0x0704 0x341913B4: 4288 CMP R0, R1 0x341913B6: F000 809C BEQ.W 46L12 ; 0x341914F2 0x341913BA: 9802 LDR R0, [SP, #8] 0x341913BC: F640 412C MOVW R1, #0x0C2C 0x341913C0: F2C0 7104 MOVT R1, #0x0704 0x341913C4: 4288 CMP R0, R1 0x341913C6: F000 8094 BEQ.W 46L12 ; 0x341914F2 0x341913CA: 9802 LDR R0, [SP, #8] 0x341913CC: F241 012C MOVW R1, #0x102C 0x341913D0: F2C0 7104 MOVT R1, #0x0704 0x341913D4: 4288 CMP R0, R1 0x341913D6: F000 808C BEQ.W 46L12 ; 0x341914F2 0x341913DA: 9802 LDR R0, [SP, #8] 0x341913DC: F241 412C MOVW R1, #0x142C 0x341913E0: F2C0 7104 MOVT R1, #0x0704 0x341913E4: 4288 CMP R0, R1 0x341913E6: F000 8084 BEQ.W 46L12 ; 0x341914F2 0x341913EA: 9802 LDR R0, [SP, #8] 0x341913EC: F641 012C MOVW R1, #0x182C 0x341913F0: F2C0 7104 MOVT R1, #0x0704 0x341913F4: 4288 CMP R0, R1 0x341913F6: D07C BEQ 46L12 ; 0x341914F2 0x341913F8: 9802 LDR R0, [SP, #8] 0x341913FA: F640 012C MOVW R1, #0x082C 0x341913FE: F2C0 7105 MOVT R1, #0x0705 0x34191402: 4288 CMP R0, R1 0x34191404: D07C BEQ 46L14 ; 0x34191500 0x34191406: 9802 LDR R0, [SP, #8] 0x34191408: F640 412C MOVW R1, #0x0C2C 0x3419140C: F2C0 7105 MOVT R1, #0x0705 0x34191410: 4288 CMP R0, R1 0x34191412: D075 BEQ 46L14 ; 0x34191500 0x34191414: 9802 LDR R0, [SP, #8] 0x34191416: F241 012C MOVW R1, #0x102C 0x3419141A: F2C0 7105 MOVT R1, #0x0705 0x3419141E: 4288 CMP R0, R1 0x34191420: D06E BEQ 46L14 ; 0x34191500 0x34191422: 9802 LDR R0, [SP, #8] 0x34191424: F241 412C MOVW R1, #0x142C 0x34191428: F2C0 7105 MOVT R1, #0x0705 0x3419142C: 4288 CMP R0, R1 0x3419142E: D067 BEQ 46L14 ; 0x34191500 0x34191430: 9802 LDR R0, [SP, #8] 0x34191432: F641 012C MOVW R1, #0x182C 0x34191436: F2C0 7105 MOVT R1, #0x0705 0x3419143A: 4288 CMP R0, R1 0x3419143C: D060 BEQ 46L14 ; 0x34191500 0x3419143E: E069 B 46L15 ; 0x34191514
.L1: 0x34191440: F7FE FEDA BL HAL_RCC_GetSysClockFreq ; 0x341901F8 0x34191444: F7F9 FAF2 BL RCCEx_GetHCLKFreq ; 0x3418AA2C 0x34191448: F7F9 FD18 BL RCCEx_GetPCLK1Freq ; 0x3418AE7C 0x3419144C: 9004 STR R0, [SP, #16] 0x3419144E: E061 B 46L15 ; 0x34191514
.L2: 0x34191450: F7FE FED2 BL HAL_RCC_GetSysClockFreq ; 0x341901F8 0x34191454: F7F9 FAEA BL RCCEx_GetHCLKFreq ; 0x3418AA2C 0x34191458: F7F9 FD5C BL RCCEx_GetPCLK4Freq ; 0x3418AF14 0x3419145C: 9004 STR R0, [SP, #16] 0x3419145E: E059 B 46L15 ; 0x34191514
.L3: 0x34191460: 2007 MOVS R0, #7 0x34191462: F7F7 FC41 BL RCCEx_GetCLKPCLKFreq ; 0x34188CE8 0x34191466: 9004 STR R0, [SP, #16] 0x34191468: E054 B 46L15 ; 0x34191514
.L4: 0x3419146A: F7F9 FCEF BL LL_RCC_IC15_IsEnabled ; 0x3418AE4C 0x3419146E: B3C0 CBZ R0, .L9 ; 0x341914E2 0x34191470: F000 FB52 BL LL_RCC_IC15_GetDivider ; 0x34191B18 0x34191474: 9003 STR R0, [SP, #12] 0x34191476: F7F9 FCF1 BL LL_RCC_IC15_GetSource ; 0x3418AE5C 0x3419147A: 4601 MOV R1, R0 0x3419147C: 9101 STR R1, [SP, #4] 0x3419147E: B160 CBZ R0, .L5 ; 0x3419149A 0x34191480: 9801 LDR R0, [SP, #4] 0x34191482: F1B0 5F80 CMP.W R0, #0x10000000 0x34191486: D011 BEQ 46L6 ; 0x341914AC 0x34191488: 9801 LDR R0, [SP, #4] 0x3419148A: F1B0 5F00 CMP.W R0, #0x20000000 0x3419148E: D016 BEQ 46L7 ; 0x341914BE 0x34191490: 9801 LDR R0, [SP, #4] 0x34191492: F1B0 5F40 CMP.W R0, #0x30000000 0x34191496: D01B BEQ 46L8 ; 0x341914D0 0x34191498: E023 B 46L9 ; 0x341914E2
.L5: 0x3419149A: F000 FA29 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F0 0x3419149E: 9004 STR R0, [SP, #16] 0x341914A0: 9804 LDR R0, [SP, #16] 0x341914A2: 9903 LDR R1, [SP, #12] 0x341914A4: FBB0 F0F1 UDIV R0, R0, R1 0x341914A8: 9004 STR R0, [SP, #16] 0x341914AA: E01A B 46L9 ; 0x341914E2
.L6: 0x341914AC: F000 FA62 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191974 0x341914B0: 9004 STR R0, [SP, #16] 0x341914B2: 9804 LDR R0, [SP, #16] 0x341914B4: 9903 LDR R1, [SP, #12] 0x341914B6: FBB0 F0F1 UDIV R0, R0, R1 0x341914BA: 9004 STR R0, [SP, #16] 0x341914BC: E011 B 46L9 ; 0x341914E2
.L7: 0x341914BE: F000 FA9B BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919F8 0x341914C2: 9004 STR R0, [SP, #16] 0x341914C4: 9804 LDR R0, [SP, #16] 0x341914C6: 9903 LDR R1, [SP, #12] 0x341914C8: FBB0 F0F1 UDIV R0, R0, R1 0x341914CC: 9004 STR R0, [SP, #16] 0x341914CE: E008 B 46L9 ; 0x341914E2
.L8: 0x341914D0: F000 FAD4 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A7C 0x341914D4: 9004 STR R0, [SP, #16] 0x341914D6: 9804 LDR R0, [SP, #16] 0x341914D8: 9903 LDR R1, [SP, #12] 0x341914DA: FBB0 F0F1 UDIV R0, R0, R1 0x341914DE: 9004 STR R0, [SP, #16] 0x341914E0: E7FF B 46L9 ; 0x341914E2
.L9: 0x341914E2: E017 B 46L15 ; 0x34191514
.L10: 0x341914E4: F7F7 F91C BL LL_RCC_LSE_IsReady.59 ; 0x34188720 0x341914E8: B110 CBZ R0, .L11 ; 0x341914F0 0x341914EA: F44F 4000 MOV.W R0, #0x8000 0x341914EE: 9004 STR R0, [SP, #16]
.L11: 0x341914F0: E010 B 46L15 ; 0x34191514
.L12: 0x341914F2: F7F9 FD55 BL LL_RCC_LSI_IsReady.94 ; 0x3418AFA0 0x341914F6: B110 CBZ R0, .L13 ; 0x341914FE 0x341914F8: F44F 40FA MOV.W R0, #0x7D00 0x341914FC: 9004 STR R0, [SP, #16]
.L13: 0x341914FE: E009 B 46L15 ; 0x34191514
.L14: 0x34191500: F7FE FE7A BL HAL_RCC_GetSysClockFreq ; 0x341901F8 0x34191504: 9000 STR R0, [SP, #0] 0x34191506: F7F7 FAF5 BL LL_RCC_GetTIMPrescaler ; 0x34188AF4 0x3419150A: 4601 MOV R1, R0 0x3419150C: 9800 LDR R0, [SP, #0] 0x3419150E: 40C8 LSRS R0, R1 0x34191510: 9004 STR R0, [SP, #16] 0x34191512: E7FF B 46L15 ; 0x34191514
.L15: 0x34191514: 9804 LDR R0, [SP, #16] 0x34191516: B006 ADD SP, SP, #24 0x34191518: BD80 POP 123R7, PC}

Section .init.GPDMA1_Channel6_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel6_IRQHandler: 0x3419151A: E7FE B GPDMA1_Channel6_IRQHandler ; 0x3419151A

Section .text.RCCEx_GetPSSICLKFreq from blto2_FSBL_lto.o, size=218, align=4


RCCEx_GetPSSICLKFreq: 0x3419151C: B580 PUSH 123R7, LR} 0x3419151E: B086 SUB SP, SP, #24 0x34191520: 9005 STR R0, [SP, #20] 0x34191522: 2000 MOVS R0, #0 0x34191524: 9004 STR R0, [SP, #16] 0x34191526: 9805 LDR R0, [SP, #20] 0x34191528: F7FE FF58 BL LL_RCC_GetPSSIClockSource ; 0x341903DC 0x3419152C: 4601 MOV R1, R0 0x3419152E: 9102 STR R1, [SP, #8] 0x34191530: B148 CBZ R0, .L1 ; 0x34191546 0x34191532: 9802 LDR R0, [SP, #8] 0x34191534: 2810 CMP R0, #16 0x34191536: D00C BEQ 46L2 ; 0x34191552 0x34191538: 9802 LDR R0, [SP, #8] 0x3419153A: 2820 CMP R0, #32 0x3419153C: D00E BEQ 46L3 ; 0x3419155C 0x3419153E: 9802 LDR R0, [SP, #8] 0x34191540: 2830 CMP R0, #48 0x34191542: D048 BEQ 46L9 ; 0x341915D6 0x34191544: E054 B 46L11 ; 0x341915F0
.L1: 0x34191546: F7FE FE57 BL HAL_RCC_GetSysClockFreq ; 0x341901F8 0x3419154A: F7F9 FA6F BL RCCEx_GetHCLKFreq ; 0x3418AA2C 0x3419154E: 9004 STR R0, [SP, #16] 0x34191550: E04E B 46L11 ; 0x341915F0
.L2: 0x34191552: 2007 MOVS R0, #7 0x34191554: F7F7 FBC8 BL RCCEx_GetCLKPCLKFreq ; 0x34188CE8 0x34191558: 9004 STR R0, [SP, #16] 0x3419155A: E049 B 46L11 ; 0x341915F0
.L3: 0x3419155C: F7F9 FD28 BL LL_RCC_IC20_IsEnabled ; 0x3418AFB0 0x34191560: B3C0 CBZ R0, .L8 ; 0x341915D4 0x34191562: F000 FB21 BL LL_RCC_IC20_GetDivider ; 0x34191BA8 0x34191566: 9003 STR R0, [SP, #12] 0x34191568: F7F9 FD2A BL LL_RCC_IC20_GetSource ; 0x3418AFC0 0x3419156C: 4601 MOV R1, R0 0x3419156E: 9101 STR R1, [SP, #4] 0x34191570: B160 CBZ R0, .L4 ; 0x3419158C 0x34191572: 9801 LDR R0, [SP, #4] 0x34191574: F1B0 5F80 CMP.W R0, #0x10000000 0x34191578: D011 BEQ 46L5 ; 0x3419159E 0x3419157A: 9801 LDR R0, [SP, #4] 0x3419157C: F1B0 5F00 CMP.W R0, #0x20000000 0x34191580: D016 BEQ 46L6 ; 0x341915B0 0x34191582: 9801 LDR R0, [SP, #4] 0x34191584: F1B0 5F40 CMP.W R0, #0x30000000 0x34191588: D01B BEQ 46L7 ; 0x341915C2 0x3419158A: E023 B 46L8 ; 0x341915D4
.L4: 0x3419158C: F000 F9B0 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F0 0x34191590: 9004 STR R0, [SP, #16] 0x34191592: 9804 LDR R0, [SP, #16] 0x34191594: 9903 LDR R1, [SP, #12] 0x34191596: FBB0 F0F1 UDIV R0, R0, R1 0x3419159A: 9004 STR R0, [SP, #16] 0x3419159C: E01A B 46L8 ; 0x341915D4
.L5: 0x3419159E: F000 F9E9 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191974 0x341915A2: 9004 STR R0, [SP, #16] 0x341915A4: 9804 LDR R0, [SP, #16] 0x341915A6: 9903 LDR R1, [SP, #12] 0x341915A8: FBB0 F0F1 UDIV R0, R0, R1 0x341915AC: 9004 STR R0, [SP, #16] 0x341915AE: E011 B 46L8 ; 0x341915D4
.L6: 0x341915B0: F000 FA22 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919F8 0x341915B4: 9004 STR R0, [SP, #16] 0x341915B6: 9804 LDR R0, [SP, #16] 0x341915B8: 9903 LDR R1, [SP, #12] 0x341915BA: FBB0 F0F1 UDIV R0, R0, R1 0x341915BE: 9004 STR R0, [SP, #16] 0x341915C0: E008 B 46L8 ; 0x341915D4
.L7: 0x341915C2: F000 FA5B BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A7C 0x341915C6: 9004 STR R0, [SP, #16] 0x341915C8: 9804 LDR R0, [SP, #16] 0x341915CA: 9903 LDR R1, [SP, #12] 0x341915CC: FBB0 F0F1 UDIV R0, R0, R1 0x341915D0: 9004 STR R0, [SP, #16] 0x341915D2: E7FF B 46L8 ; 0x341915D4
.L8: 0x341915D4: E00C B 46L11 ; 0x341915F0
.L9: 0x341915D6: F7F9 FB29 BL LL_RCC_HSI_IsReady.77 ; 0x3418AC2C 0x341915DA: B140 CBZ R0, .L10 ; 0x341915EE 0x341915DC: F7F9 FB2E BL LL_RCC_HSI_GetDivider.78 ; 0x3418AC3C 0x341915E0: 09C1 LSRS R1, R0, #7 0x341915E2: F249 0000 MOVW R0, #0x9000 0x341915E6: F2C0 30D0 MOVT R0, #0x03D0 0x341915EA: 40C8 LSRS R0, R1 0x341915EC: 9004 STR R0, [SP, #16]
.L10: 0x341915EE: E7FF B 46L11 ; 0x341915F0
.L11: 0x341915F0: 9804 LDR R0, [SP, #16] 0x341915F2: B006 ADD SP, SP, #24 0x341915F4: BD80 POP 123R7, PC}

Section .init.GPDMA1_Channel7_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel7_IRQHandler: 0x341915F6: E7FE B GPDMA1_Channel7_IRQHandler ; 0x341915F6

Section .text.RCCEx_GetRTCCLKFreq from blto2_FSBL_lto.o, size=126, align=4


RCCEx_GetRTCCLKFreq: 0x341915F8: B580 PUSH 123R7, LR} 0x341915FA: B084 SUB SP, SP, #16 0x341915FC: 2000 MOVS R0, #0 0x341915FE: 9003 STR R0, [SP, #12] 0x34191600: F7F7 F886 BL LL_RCC_GetRTCClockSource ; 0x34188710 0x34191604: 4601 MOV R1, R0 0x34191606: 9101 STR R1, [SP, #4] 0x34191608: B160 CBZ R0, .L1 ; 0x34191624 0x3419160A: 9801 LDR R0, [SP, #4] 0x3419160C: F5B0 7F80 CMP.W R0, #0x0100 0x34191610: D009 BEQ 46L2 ; 0x34191626 0x34191612: 9801 LDR R0, [SP, #4] 0x34191614: F5B0 7F00 CMP.W R0, #0x0200 0x34191618: D00C BEQ 46L4 ; 0x34191634 0x3419161A: 9801 LDR R0, [SP, #4] 0x3419161C: F5B0 7F40 CMP.W R0, #0x0300 0x34191620: D00F BEQ 46L6 ; 0x34191642 0x34191622: E025 B 46L8 ; 0x34191670
.L1: 0x34191624: E024 B 46L8 ; 0x34191670
.L2: 0x34191626: F7F7 F87B BL LL_RCC_LSE_IsReady.59 ; 0x34188720 0x3419162A: B110 CBZ R0, .L3 ; 0x34191632 0x3419162C: F44F 4000 MOV.W R0, #0x8000 0x34191630: 9003 STR R0, [SP, #12]
.L3: 0x34191632: E01D B 46L8 ; 0x34191670
.L4: 0x34191634: F7F9 FCB4 BL LL_RCC_LSI_IsReady.94 ; 0x3418AFA0 0x34191638: B110 CBZ R0, .L5 ; 0x34191640 0x3419163A: F44F 40FA MOV.W R0, #0x7D00 0x3419163E: 9003 STR R0, [SP, #12]
.L5: 0x34191640: E016 B 46L8 ; 0x34191670
.L6: 0x34191642: F7F9 FB13 BL LL_RCC_HSE_IsReady.80 ; 0x3418AC6C 0x34191646: B190 CBZ R0, .L7 ; 0x3419166E 0x34191648: F248 105C MOVW R0, #0x815C 0x3419164C: F2C5 6002 MOVT R0, #0x5602 0x34191650: 6800 LDR R0, [R0] 0x34191652: F400 317C AND R1, R0, #0x03F000 0x34191656: 2001 MOVS R0, #1 0x34191658: EB00 3011 ADD.W R0, R0, R1, LSR #12 0x3419165C: 9002 STR R0, [SP, #8] 0x3419165E: 9902 LDR R1, [SP, #8] 0x34191660: F646 4000 MOVW R0, #0x6C00 0x34191664: F2C0 20DC MOVT R0, #0x02DC 0x34191668: FBB0 F0F1 UDIV R0, R0, R1 0x3419166C: 9003 STR R0, [SP, #12]
.L7: 0x3419166E: E7FF B 46L8 ; 0x34191670
.L8: 0x34191670: 9803 LDR R0, [SP, #12] 0x34191672: B004 ADD SP, SP, #16 0x34191674: BD80 POP 123R7, PC}

Section .init.GPDMA1_Channel8_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel8_IRQHandler: 0x34191676: E7FE B GPDMA1_Channel8_IRQHandler ; 0x34191676

Section .text.RCCEx_GetSAICLKFreq from blto2_FSBL_lto.o, size=606, align=4


RCCEx_GetSAICLKFreq: 0x34191678: B580 PUSH 123R7, LR} 0x3419167A: B086 SUB SP, SP, #24 0x3419167C: 9005 STR R0, [SP, #20] 0x3419167E: 2000 MOVS R0, #0 0x34191680: 9004 STR R0, [SP, #16] 0x34191682: 9805 LDR R0, [SP, #20] 0x34191684: F7F7 FA1E BL LL_RCC_GetSAIClockSource ; 0x34188AC4 0x34191688: 4601 MOV R1, R0 0x3419168A: 9102 STR R1, [SP, #8] 0x3419168C: F241 4118 MOVW R1, #0x1418 0x34191690: F2C0 7100 MOVT R1, #0x0700 0x34191694: 4288 CMP R0, R1 0x34191696: D073 BEQ 46L1 ; 0x34191780 0x34191698: 9802 LDR R0, [SP, #8] 0x3419169A: F641 0118 MOVW R1, #0x1818 0x3419169E: F2C0 7100 MOVT R1, #0x0700 0x341916A2: 4288 CMP R0, R1 0x341916A4: D06C BEQ 46L1 ; 0x34191780 0x341916A6: 9802 LDR R0, [SP, #8] 0x341916A8: F241 4118 MOVW R1, #0x1418 0x341916AC: F2C0 7101 MOVT R1, #0x0701 0x341916B0: 4288 CMP R0, R1 0x341916B2: D06D BEQ 46L2 ; 0x34191790 0x341916B4: 9802 LDR R0, [SP, #8] 0x341916B6: F641 0118 MOVW R1, #0x1818 0x341916BA: F2C0 7101 MOVT R1, #0x0701 0x341916BE: 4288 CMP R0, R1 0x341916C0: D066 BEQ 46L2 ; 0x34191790 0x341916C2: 9802 LDR R0, [SP, #8] 0x341916C4: F241 4118 MOVW R1, #0x1418 0x341916C8: F2C0 7102 MOVT R1, #0x0702 0x341916CC: 4288 CMP R0, R1 0x341916CE: D064 BEQ 46L3 ; 0x3419179A 0x341916D0: 9802 LDR R0, [SP, #8] 0x341916D2: F641 0118 MOVW R1, #0x1818 0x341916D6: F2C0 7102 MOVT R1, #0x0702 0x341916DA: 4288 CMP R0, R1 0x341916DC: D05D BEQ 46L3 ; 0x3419179A 0x341916DE: 9802 LDR R0, [SP, #8] 0x341916E0: F241 4118 MOVW R1, #0x1418 0x341916E4: F2C0 7103 MOVT R1, #0x0703 0x341916E8: 4288 CMP R0, R1 0x341916EA: F000 8093 BEQ.W 46L9 ; 0x34191814 0x341916EE: 9802 LDR R0, [SP, #8] 0x341916F0: F641 0118 MOVW R1, #0x1818 0x341916F4: F2C0 7103 MOVT R1, #0x0703 0x341916F8: 4288 CMP R0, R1 0x341916FA: F000 808B BEQ.W 46L9 ; 0x34191814 0x341916FE: 9802 LDR R0, [SP, #8] 0x34191700: F241 4118 MOVW R1, #0x1418 0x34191704: F2C0 7104 MOVT R1, #0x0704 0x34191708: 4288 CMP R0, R1 0x3419170A: F000 80CD BEQ.W 46L17 ; 0x341918A8 0x3419170E: 9802 LDR R0, [SP, #8] 0x34191710: F641 0118 MOVW R1, #0x1818 0x34191714: F2C0 7104 MOVT R1, #0x0704 0x34191718: 4288 CMP R0, R1 0x3419171A: F000 80C5 BEQ.W 46L17 ; 0x341918A8 0x3419171E: 9802 LDR R0, [SP, #8] 0x34191720: F241 4118 MOVW R1, #0x1418 0x34191724: F2C0 7105 MOVT R1, #0x0705 0x34191728: 4288 CMP R0, R1 0x3419172A: F000 80B0 BEQ.W 46L15 ; 0x3419188E 0x3419172E: 9802 LDR R0, [SP, #8] 0x34191730: F641 0118 MOVW R1, #0x1818 0x34191734: F2C0 7105 MOVT R1, #0x0705 0x34191738: 4288 CMP R0, R1 0x3419173A: F000 80A8 BEQ.W 46L15 ; 0x3419188E 0x3419173E: 9802 LDR R0, [SP, #8] 0x34191740: F241 4118 MOVW R1, #0x1418 0x34191744: F2C0 7106 MOVT R1, #0x0706 0x34191748: 4288 CMP R0, R1 0x3419174A: F000 80B6 BEQ.W 46L19 ; 0x341918BA 0x3419174E: 9802 LDR R0, [SP, #8] 0x34191750: F641 0118 MOVW R1, #0x1818 0x34191754: F2C0 7106 MOVT R1, #0x0706 0x34191758: 4288 CMP R0, R1 0x3419175A: F000 80AE BEQ.W 46L19 ; 0x341918BA 0x3419175E: 9802 LDR R0, [SP, #8] 0x34191760: F241 4118 MOVW R1, #0x1418 0x34191764: F2C0 7107 MOVT R1, #0x0707 0x34191768: 4288 CMP R0, R1 0x3419176A: F000 80AC BEQ.W 46L20 ; 0x341918C6 0x3419176E: 9802 LDR R0, [SP, #8] 0x34191770: F641 0118 MOVW R1, #0x1818 0x34191774: F2C0 7107 MOVT R1, #0x0707 0x34191778: 4288 CMP R0, R1 0x3419177A: F000 80A4 BEQ.W 46L20 ; 0x341918C6 0x3419177E: E0A7 B 46L21 ; 0x341918D0
.L1: 0x34191780: F7FE FD3A BL HAL_RCC_GetSysClockFreq ; 0x341901F8 0x34191784: F7F9 F952 BL RCCEx_GetHCLKFreq ; 0x3418AA2C 0x34191788: F7F9 FB86 BL RCCEx_GetPCLK2Freq ; 0x3418AE98 0x3419178C: 9004 STR R0, [SP, #16] 0x3419178E: E09F B 46L21 ; 0x341918D0
.L2: 0x34191790: 2007 MOVS R0, #7 0x34191792: F7F7 FAA9 BL RCCEx_GetCLKPCLKFreq ; 0x34188CE8 0x34191796: 9004 STR R0, [SP, #16] 0x34191798: E09A B 46L21 ; 0x341918D0
.L3: 0x3419179A: F7F9 FBE1 BL LL_RCC_IC7_IsEnabled ; 0x3418AF60 0x3419179E: B3C0 CBZ R0, .L8 ; 0x34191812 0x341917A0: F000 F9EA BL LL_RCC_IC7_GetDivider ; 0x34191B78 0x341917A4: 9003 STR R0, [SP, #12] 0x341917A6: F7F9 FBE3 BL LL_RCC_IC7_GetSource ; 0x3418AF70 0x341917AA: 4601 MOV R1, R0 0x341917AC: 9101 STR R1, [SP, #4] 0x341917AE: B160 CBZ R0, .L4 ; 0x341917CA 0x341917B0: 9801 LDR R0, [SP, #4] 0x341917B2: F1B0 5F80 CMP.W R0, #0x10000000 0x341917B6: D011 BEQ 46L5 ; 0x341917DC 0x341917B8: 9801 LDR R0, [SP, #4] 0x341917BA: F1B0 5F00 CMP.W R0, #0x20000000 0x341917BE: D016 BEQ 46L6 ; 0x341917EE 0x341917C0: 9801 LDR R0, [SP, #4] 0x341917C2: F1B0 5F40 CMP.W R0, #0x30000000 0x341917C6: D01B BEQ 46L7 ; 0x34191800 0x341917C8: E023 B 46L8 ; 0x34191812
.L4: 0x341917CA: F000 F891 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F0 0x341917CE: 9004 STR R0, [SP, #16] 0x341917D0: 9804 LDR R0, [SP, #16] 0x341917D2: 9903 LDR R1, [SP, #12] 0x341917D4: FBB0 F0F1 UDIV R0, R0, R1 0x341917D8: 9004 STR R0, [SP, #16] 0x341917DA: E01A B 46L8 ; 0x34191812
.L5: 0x341917DC: F000 F8CA BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191974 0x341917E0: 9004 STR R0, [SP, #16] 0x341917E2: 9804 LDR R0, [SP, #16] 0x341917E4: 9903 LDR R1, [SP, #12] 0x341917E6: FBB0 F0F1 UDIV R0, R0, R1 0x341917EA: 9004 STR R0, [SP, #16] 0x341917EC: E011 B 46L8 ; 0x34191812
.L6: 0x341917EE: F000 F903 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919F8 0x341917F2: 9004 STR R0, [SP, #16] 0x341917F4: 9804 LDR R0, [SP, #16] 0x341917F6: 9903 LDR R1, [SP, #12] 0x341917F8: FBB0 F0F1 UDIV R0, R0, R1 0x341917FC: 9004 STR R0, [SP, #16] 0x341917FE: E008 B 46L8 ; 0x34191812
.L7: 0x34191800: F000 F93C BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A7C 0x34191804: 9004 STR R0, [SP, #16] 0x34191806: 9804 LDR R0, [SP, #16] 0x34191808: 9903 LDR R1, [SP, #12] 0x3419180A: FBB0 F0F1 UDIV R0, R0, R1 0x3419180E: 9004 STR R0, [SP, #16] 0x34191810: E7FF B 46L8 ; 0x34191812
.L8: 0x34191812: E05D B 46L21 ; 0x341918D0
.L9: 0x34191814: F7F9 FB8C BL LL_RCC_IC8_IsEnabled ; 0x3418AF30 0x34191818: B3C0 CBZ R0, .L14 ; 0x3419188C 0x3419181A: F000 F9A1 BL LL_RCC_IC8_GetDivider ; 0x34191B60 0x3419181E: 9003 STR R0, [SP, #12] 0x34191820: F7F9 FB8E BL LL_RCC_IC8_GetSource ; 0x3418AF40 0x34191824: 4601 MOV R1, R0 0x34191826: 9100 STR R1, [SP, #0] 0x34191828: B160 CBZ R0, .L10 ; 0x34191844 0x3419182A: 9800 LDR R0, [SP, #0] 0x3419182C: F1B0 5F80 CMP.W R0, #0x10000000 0x34191830: D011 BEQ 46L11 ; 0x34191856 0x34191832: 9800 LDR R0, [SP, #0] 0x34191834: F1B0 5F00 CMP.W R0, #0x20000000 0x34191838: D016 BEQ 46L12 ; 0x34191868 0x3419183A: 9800 LDR R0, [SP, #0] 0x3419183C: F1B0 5F40 CMP.W R0, #0x30000000 0x34191840: D01B BEQ 46L13 ; 0x3419187A 0x34191842: E023 B 46L14 ; 0x3419188C
.L10: 0x34191844: F000 F854 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x341918F0 0x34191848: 9004 STR R0, [SP, #16] 0x3419184A: 9804 LDR R0, [SP, #16] 0x3419184C: 9903 LDR R1, [SP, #12] 0x3419184E: FBB0 F0F1 UDIV R0, R0, R1 0x34191852: 9004 STR R0, [SP, #16] 0x34191854: E01A B 46L14 ; 0x3419188C
.L11: 0x34191856: F000 F88D BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34191974 0x3419185A: 9004 STR R0, [SP, #16] 0x3419185C: 9804 LDR R0, [SP, #16] 0x3419185E: 9903 LDR R1, [SP, #12] 0x34191860: FBB0 F0F1 UDIV R0, R0, R1 0x34191864: 9004 STR R0, [SP, #16] 0x34191866: E011 B 46L14 ; 0x3419188C
.L12: 0x34191868: F000 F8C6 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x341919F8 0x3419186C: 9004 STR R0, [SP, #16] 0x3419186E: 9804 LDR R0, [SP, #16] 0x34191870: 9903 LDR R1, [SP, #12] 0x34191872: FBB0 F0F1 UDIV R0, R0, R1 0x34191876: 9004 STR R0, [SP, #16] 0x34191878: E008 B 46L14 ; 0x3419188C
.L13: 0x3419187A: F000 F8FF BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34191A7C 0x3419187E: 9004 STR R0, [SP, #16] 0x34191880: 9804 LDR R0, [SP, #16] 0x34191882: 9903 LDR R1, [SP, #12] 0x34191884: FBB0 F0F1 UDIV R0, R0, R1 0x34191888: 9004 STR R0, [SP, #16] 0x3419188A: E7FF B 46L14 ; 0x3419188C
.L14: 0x3419188C: E020 B 46L21 ; 0x341918D0
.L15: 0x3419188E: F7F9 F9CD BL LL_RCC_HSI_IsReady.77 ; 0x3418AC2C 0x34191892: B140 CBZ R0, .L16 ; 0x341918A6 0x34191894: F7F9 F9D2 BL LL_RCC_HSI_GetDivider.78 ; 0x3418AC3C 0x34191898: 09C1 LSRS R1, R0, #7 0x3419189A: F249 0000 MOVW R0, #0x9000 0x3419189E: F2C0 30D0 MOVT R0, #0x03D0 0x341918A2: 40C8 LSRS R0, R1 0x341918A4: 9004 STR R0, [SP, #16]
.L16: 0x341918A6: E013 B 46L21 ; 0x341918D0
.L17: 0x341918A8: F7F9 F9D0 BL LL_RCC_MSI_IsReady.79 ; 0x3418AC4C 0x341918AC: B120 CBZ R0, .L18 ; 0x341918B8 0x341918AE: F640 1000 MOVW R0, #0x0900 0x341918B2: F2C0 003D MOVT R0, #61 0x341918B6: 9004 STR R0, [SP, #16]
.L18: 0x341918B8: E00A B 46L21 ; 0x341918D0
.L19: 0x341918BA: F248 0000 MOVW R0, #0x8000 0x341918BE: F2C0 00BB MOVT R0, #187 0x341918C2: 9004 STR R0, [SP, #16] 0x341918C4: E004 B 46L21 ; 0x341918D0
.L20: 0x341918C6: 2007 MOVS R0, #7 0x341918C8: F7F8 F83E BL RCCEx_GetSPDIFRXCLKFreq ; 0x34189948 0x341918CC: 9004 STR R0, [SP, #16] 0x341918CE: E7FF B 46L21 ; 0x341918D0
.L21: 0x341918D0: 9804 LDR R0, [SP, #16] 0x341918D2: B006 ADD SP, SP, #24 0x341918D4: BD80 POP 123R7, PC}

Section .init.GPDMA1_Channel9_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel9_IRQHandler: 0x341918D6: E7FE B GPDMA1_Channel9_IRQHandler ; 0x341918D6

Section .text.LL_RCC_IC3_GetDivider from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_IC3_GetDivider: 0x341918D8: F248 00CC MOVW R0, #0x80CC 0x341918DC: F2C5 6002 MOVT R0, #0x5602 0x341918E0: 6800 LDR R0, [R0] 0x341918E2: F400 017F AND R1, R0, #0xFF0000 0x341918E6: 2001 MOVS R0, #1 0x341918E8: EB00 4011 ADD.W R0, R0, R1, LSR #16 0x341918EC: 4770 BX LR

Section .init.GPDMA1_Channel10_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel10_IRQHandler: 0x341918EE: E7FE B GPDMA1_Channel10_IRQHandler ; 0x341918EE

Section .text.HAL_RCCEx_GetPLL1CLKFreq from blto2_FSBL_lto.o, size=130, align=4


HAL_RCCEx_GetPLL1CLKFreq: 0x341918F0: B510 PUSH 123R4, LR} 0x341918F2: B08A SUB SP, SP, #40 0x341918F4: 2000 MOVS R0, #0 0x341918F6: 9009 STR R0, [SP, #36] 0x341918F8: F7F9 FA50 BL LL_RCC_PLL1_IsReady.87 ; 0x3418AD9C 0x341918FC: B368 CBZ R0, .L2 ; 0x3419195A 0x341918FE: F7F9 FA55 BL LL_RCC_PLL1P_IsEnabled ; 0x3418ADAC 0x34191902: B348 CBZ R0, .L1 ; 0x34191958 0x34191904: F7F9 FA5A BL LL_RCC_PLL1_GetSource.88 ; 0x3418ADBC 0x34191908: F7F9 F8D6 BL RCCEx_GetPLLSourceFreq ; 0x3418AAB8 0x3419190C: 9007 STR R0, [SP, #28] 0x3419190E: 9807 LDR R0, [SP, #28] 0x34191910: B310 CBZ R0, .L1 ; 0x34191958 0x34191912: F7F9 FA5B BL LL_RCC_PLL1_GetM ; 0x3418ADCC 0x34191916: 9008 STR R0, [SP, #32] 0x34191918: 9808 LDR R0, [SP, #32] 0x3419191A: B1E8 CBZ R0, .L1 ; 0x34191958 0x3419191C: 9807 LDR R0, [SP, #28] 0x3419191E: 9006 STR R0, [SP, #24] 0x34191920: 9808 LDR R0, [SP, #32] 0x34191922: 9003 STR R0, [SP, #12] 0x34191924: F7F9 FA5A BL LL_RCC_PLL1_GetN ; 0x3418ADDC 0x34191928: 9004 STR R0, [SP, #16] 0x3419192A: F7F9 FA5F BL LL_RCC_PLL1_GetFRACN ; 0x3418ADEC 0x3419192E: 9005 STR R0, [SP, #20] 0x34191930: F7F9 FA64 BL LL_RCC_PLL1_GetP1 ; 0x3418ADFC 0x34191934: 9002 STR R0, [SP, #8] 0x34191936: F7F9 FA69 BL LL_RCC_PLL1_GetP2 ; 0x3418AE0C 0x3419193A: F8DD C008 LDR.W R12, [SP, #8] 0x3419193E: 9903 LDR R1, [SP, #12] 0x34191940: 9A04 LDR R2, [SP, #16] 0x34191942: 9B05 LDR R3, [SP, #20] 0x34191944: 4604 MOV R4, R0 0x34191946: 9806 LDR R0, [SP, #24] 0x34191948: 46EE MOV LR, SP 0x3419194A: F8CE 4004 STR.W R4, [LR, #4] 0x3419194E: F8CE C000 STR.W R12, [LR] 0x34191952: F7F9 F91F BL RCCEx_CalcPLLFreq ; 0x3418AB94 0x34191956: 9009 STR R0, [SP, #36]
.L1: 0x34191958: E008 B 46L3 ; 0x3419196C
.L2: 0x3419195A: F7F9 FA5F BL LL_RCC_PLL1_IsEnabledBypass.89 ; 0x3418AE1C 0x3419195E: B128 CBZ R0, .L3 ; 0x3419196C 0x34191960: F7F9 FA2C BL LL_RCC_PLL1_GetSource.88 ; 0x3418ADBC 0x34191964: F7F9 F8A8 BL RCCEx_GetPLLSourceFreq ; 0x3418AAB8 0x34191968: 9009 STR R0, [SP, #36] 0x3419196A: E7FF B 46L3 ; 0x3419196C
.L3: 0x3419196C: 9809 LDR R0, [SP, #36] 0x3419196E: B00A ADD SP, SP, #40 0x34191970: BD10 POP 123R4, PC}

Section .init.GPDMA1_Channel11_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel11_IRQHandler: 0x34191972: E7FE B GPDMA1_Channel11_IRQHandler ; 0x34191972

Section .text.HAL_RCCEx_GetPLL2CLKFreq from blto2_FSBL_lto.o, size=130, align=4


HAL_RCCEx_GetPLL2CLKFreq: 0x34191974: B510 PUSH 123R4, LR} 0x34191976: B08A SUB SP, SP, #40 0x34191978: 2000 MOVS R0, #0 0x3419197A: 9009 STR R0, [SP, #36] 0x3419197C: F7F9 F9C6 BL LL_RCC_PLL2_IsReady.84 ; 0x3418AD0C 0x34191980: B368 CBZ R0, .L2 ; 0x341919DE 0x34191982: F7F9 F9CB BL LL_RCC_PLL2P_IsEnabled ; 0x3418AD1C 0x34191986: B348 CBZ R0, .L1 ; 0x341919DC 0x34191988: F7F9 F9D0 BL LL_RCC_PLL2_GetSource.85 ; 0x3418AD2C 0x3419198C: F7F9 F894 BL RCCEx_GetPLLSourceFreq ; 0x3418AAB8 0x34191990: 9007 STR R0, [SP, #28] 0x34191992: 9807 LDR R0, [SP, #28] 0x34191994: B310 CBZ R0, .L1 ; 0x341919DC 0x34191996: F7F9 F9D1 BL LL_RCC_PLL2_GetM ; 0x3418AD3C 0x3419199A: 9008 STR R0, [SP, #32] 0x3419199C: 9808 LDR R0, [SP, #32] 0x3419199E: B1E8 CBZ R0, .L1 ; 0x341919DC 0x341919A0: 9807 LDR R0, [SP, #28] 0x341919A2: 9006 STR R0, [SP, #24] 0x341919A4: 9808 LDR R0, [SP, #32] 0x341919A6: 9003 STR R0, [SP, #12] 0x341919A8: F7F9 F9D0 BL LL_RCC_PLL2_GetN ; 0x3418AD4C 0x341919AC: 9004 STR R0, [SP, #16] 0x341919AE: F7F9 F9D5 BL LL_RCC_PLL2_GetFRACN ; 0x3418AD5C 0x341919B2: 9005 STR R0, [SP, #20] 0x341919B4: F7F9 F9DA BL LL_RCC_PLL2_GetP1 ; 0x3418AD6C 0x341919B8: 9002 STR R0, [SP, #8] 0x341919BA: F7F9 F9DF BL LL_RCC_PLL2_GetP2 ; 0x3418AD7C 0x341919BE: F8DD C008 LDR.W R12, [SP, #8] 0x341919C2: 9903 LDR R1, [SP, #12] 0x341919C4: 9A04 LDR R2, [SP, #16] 0x341919C6: 9B05 LDR R3, [SP, #20] 0x341919C8: 4604 MOV R4, R0 0x341919CA: 9806 LDR R0, [SP, #24] 0x341919CC: 46EE MOV LR, SP 0x341919CE: F8CE 4004 STR.W R4, [LR, #4] 0x341919D2: F8CE C000 STR.W R12, [LR] 0x341919D6: F7F9 F8DD BL RCCEx_CalcPLLFreq ; 0x3418AB94 0x341919DA: 9009 STR R0, [SP, #36]
.L1: 0x341919DC: E008 B 46L3 ; 0x341919F0
.L2: 0x341919DE: F7F9 F9D5 BL LL_RCC_PLL2_IsEnabledBypass.86 ; 0x3418AD8C 0x341919E2: B128 CBZ R0, .L3 ; 0x341919F0 0x341919E4: F7F9 F9A2 BL LL_RCC_PLL2_GetSource.85 ; 0x3418AD2C 0x341919E8: F7F9 F866 BL RCCEx_GetPLLSourceFreq ; 0x3418AAB8 0x341919EC: 9009 STR R0, [SP, #36] 0x341919EE: E7FF B 46L3 ; 0x341919F0
.L3: 0x341919F0: 9809 LDR R0, [SP, #36] 0x341919F2: B00A ADD SP, SP, #40 0x341919F4: BD10 POP 123R4, PC}

Section .init.GPDMA1_Channel12_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel12_IRQHandler: 0x341919F6: E7FE B GPDMA1_Channel12_IRQHandler ; 0x341919F6

Section .text.HAL_RCCEx_GetPLL3CLKFreq from blto2_FSBL_lto.o, size=130, align=4


HAL_RCCEx_GetPLL3CLKFreq: 0x341919F8: B510 PUSH 123R4, LR} 0x341919FA: B08A SUB SP, SP, #40 0x341919FC: 2000 MOVS R0, #0 0x341919FE: 9009 STR R0, [SP, #36] 0x34191A00: F7F9 F93C BL LL_RCC_PLL3_IsReady.81 ; 0x3418AC7C 0x34191A04: B368 CBZ R0, .L2 ; 0x34191A62 0x34191A06: F7F9 F941 BL LL_RCC_PLL3P_IsEnabled ; 0x3418AC8C 0x34191A0A: B348 CBZ R0, .L1 ; 0x34191A60 0x34191A0C: F7F9 F946 BL LL_RCC_PLL3_GetSource.82 ; 0x3418AC9C 0x34191A10: F7F9 F852 BL RCCEx_GetPLLSourceFreq ; 0x3418AAB8 0x34191A14: 9007 STR R0, [SP, #28] 0x34191A16: 9807 LDR R0, [SP, #28] 0x34191A18: B310 CBZ R0, .L1 ; 0x34191A60 0x34191A1A: F7F9 F947 BL LL_RCC_PLL3_GetM ; 0x3418ACAC 0x34191A1E: 9008 STR R0, [SP, #32] 0x34191A20: 9808 LDR R0, [SP, #32] 0x34191A22: B1E8 CBZ R0, .L1 ; 0x34191A60 0x34191A24: 9807 LDR R0, [SP, #28] 0x34191A26: 9006 STR R0, [SP, #24] 0x34191A28: 9808 LDR R0, [SP, #32] 0x34191A2A: 9003 STR R0, [SP, #12] 0x34191A2C: F7F9 F946 BL LL_RCC_PLL3_GetN ; 0x3418ACBC 0x34191A30: 9004 STR R0, [SP, #16] 0x34191A32: F7F9 F94B BL LL_RCC_PLL3_GetFRACN ; 0x3418ACCC 0x34191A36: 9005 STR R0, [SP, #20] 0x34191A38: F7F9 F950 BL LL_RCC_PLL3_GetP1 ; 0x3418ACDC 0x34191A3C: 9002 STR R0, [SP, #8] 0x34191A3E: F7F9 F955 BL LL_RCC_PLL3_GetP2 ; 0x3418ACEC 0x34191A42: F8DD C008 LDR.W R12, [SP, #8] 0x34191A46: 9903 LDR R1, [SP, #12] 0x34191A48: 9A04 LDR R2, [SP, #16] 0x34191A4A: 9B05 LDR R3, [SP, #20] 0x34191A4C: 4604 MOV R4, R0 0x34191A4E: 9806 LDR R0, [SP, #24] 0x34191A50: 46EE MOV LR, SP 0x34191A52: F8CE 4004 STR.W R4, [LR, #4] 0x34191A56: F8CE C000 STR.W R12, [LR] 0x34191A5A: F7F9 F89B BL RCCEx_CalcPLLFreq ; 0x3418AB94 0x34191A5E: 9009 STR R0, [SP, #36]
.L1: 0x34191A60: E008 B 46L3 ; 0x34191A74
.L2: 0x34191A62: F7F9 F94B BL LL_RCC_PLL3_IsEnabledBypass.83 ; 0x3418ACFC 0x34191A66: B128 CBZ R0, .L3 ; 0x34191A74 0x34191A68: F7F9 F918 BL LL_RCC_PLL3_GetSource.82 ; 0x3418AC9C 0x34191A6C: F7F9 F824 BL RCCEx_GetPLLSourceFreq ; 0x3418AAB8 0x34191A70: 9009 STR R0, [SP, #36] 0x34191A72: E7FF B 46L3 ; 0x34191A74
.L3: 0x34191A74: 9809 LDR R0, [SP, #36] 0x34191A76: B00A ADD SP, SP, #40 0x34191A78: BD10 POP 123R4, PC}

Section .init.GPDMA1_Channel13_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel13_IRQHandler: 0x34191A7A: E7FE B GPDMA1_Channel13_IRQHandler ; 0x34191A7A

Section .text.HAL_RCCEx_GetPLL4CLKFreq from blto2_FSBL_lto.o, size=130, align=4


HAL_RCCEx_GetPLL4CLKFreq: 0x34191A7C: B510 PUSH 123R4, LR} 0x34191A7E: B08A SUB SP, SP, #40 0x34191A80: 2000 MOVS R0, #0 0x34191A82: 9009 STR R0, [SP, #36] 0x34191A84: F7F9 F800 BL LL_RCC_PLL4_IsReady.74 ; 0x3418AA88 0x34191A88: B368 CBZ R0, .L2 ; 0x34191AE6 0x34191A8A: F7F9 F805 BL LL_RCC_PLL4P_IsEnabled ; 0x3418AA98 0x34191A8E: B348 CBZ R0, .L1 ; 0x34191AE4 0x34191A90: F7F9 F80A BL LL_RCC_PLL4_GetSource.75 ; 0x3418AAA8 0x34191A94: F7F9 F810 BL RCCEx_GetPLLSourceFreq ; 0x3418AAB8 0x34191A98: 9007 STR R0, [SP, #28] 0x34191A9A: 9807 LDR R0, [SP, #28] 0x34191A9C: B310 CBZ R0, .L1 ; 0x34191AE4 0x34191A9E: F7F9 F851 BL LL_RCC_PLL4_GetM ; 0x3418AB44 0x34191AA2: 9008 STR R0, [SP, #32] 0x34191AA4: 9808 LDR R0, [SP, #32] 0x34191AA6: B1E8 CBZ R0, .L1 ; 0x34191AE4 0x34191AA8: 9807 LDR R0, [SP, #28] 0x34191AAA: 9006 STR R0, [SP, #24] 0x34191AAC: 9808 LDR R0, [SP, #32] 0x34191AAE: 9003 STR R0, [SP, #12] 0x34191AB0: F7F9 F850 BL LL_RCC_PLL4_GetN ; 0x3418AB54 0x34191AB4: 9004 STR R0, [SP, #16] 0x34191AB6: F7F9 F855 BL LL_RCC_PLL4_GetFRACN ; 0x3418AB64 0x34191ABA: 9005 STR R0, [SP, #20] 0x34191ABC: F7F9 F85A BL LL_RCC_PLL4_GetP1 ; 0x3418AB74 0x34191AC0: 9002 STR R0, [SP, #8] 0x34191AC2: F7F9 F85F BL LL_RCC_PLL4_GetP2 ; 0x3418AB84 0x34191AC6: F8DD C008 LDR.W R12, [SP, #8] 0x34191ACA: 9903 LDR R1, [SP, #12] 0x34191ACC: 9A04 LDR R2, [SP, #16] 0x34191ACE: 9B05 LDR R3, [SP, #20] 0x34191AD0: 4604 MOV R4, R0 0x34191AD2: 9806 LDR R0, [SP, #24] 0x34191AD4: 46EE MOV LR, SP 0x34191AD6: F8CE 4004 STR.W R4, [LR, #4] 0x34191ADA: F8CE C000 STR.W R12, [LR] 0x34191ADE: F7F9 F859 BL RCCEx_CalcPLLFreq ; 0x3418AB94 0x34191AE2: 9009 STR R0, [SP, #36]
.L1: 0x34191AE4: E008 B 46L3 ; 0x34191AF8
.L2: 0x34191AE6: F7F9 F899 BL LL_RCC_PLL4_IsEnabledBypass.76 ; 0x3418AC1C 0x34191AEA: B128 CBZ R0, .L3 ; 0x34191AF8 0x34191AEC: F7F8 FFDC BL LL_RCC_PLL4_GetSource.75 ; 0x3418AAA8 0x34191AF0: F7F8 FFE2 BL RCCEx_GetPLLSourceFreq ; 0x3418AAB8 0x34191AF4: 9009 STR R0, [SP, #36] 0x34191AF6: E7FF B 46L3 ; 0x34191AF8
.L3: 0x34191AF8: 9809 LDR R0, [SP, #36] 0x34191AFA: B00A ADD SP, SP, #40 0x34191AFC: BD10 POP 123R4, PC}

Section .init.GPDMA1_Channel14_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel14_IRQHandler: 0x34191AFE: E7FE B GPDMA1_Channel14_IRQHandler ; 0x34191AFE

Section .text.LL_RCC_IC4_GetDivider from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_IC4_GetDivider: 0x34191B00: F248 00D0 MOVW R0, #0x80D0 0x34191B04: F2C5 6002 MOVT R0, #0x5602 0x34191B08: 6800 LDR R0, [R0] 0x34191B0A: F400 017F AND R1, R0, #0xFF0000 0x34191B0E: 2001 MOVS R0, #1 0x34191B10: EB00 4011 ADD.W R0, R0, R1, LSR #16 0x34191B14: 4770 BX LR

Section .init.GPDMA1_Channel15_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel15_IRQHandler: 0x34191B16: E7FE B GPDMA1_Channel15_IRQHandler ; 0x34191B16

Section .text.LL_RCC_IC15_GetDivider from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_IC15_GetDivider: 0x34191B18: F248 00FC MOVW R0, #0x80FC 0x34191B1C: F2C5 6002 MOVT R0, #0x5602 0x34191B20: 6800 LDR R0, [R0] 0x34191B22: F400 017F AND R1, R0, #0xFF0000 0x34191B26: 2001 MOVS R0, #1 0x34191B28: EB00 4011 ADD.W R0, R0, R1, LSR #16 0x34191B2C: 4770 BX LR

Section .init.I2C1_EV_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


I2C1_EV_IRQHandler: 0x34191B2E: E7FE B I2C1_EV_IRQHandler ; 0x34191B2E

Section .text.LL_RCC_IC9_GetDivider from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_IC9_GetDivider: 0x34191B30: F248 00E4 MOVW R0, #0x80E4 0x34191B34: F2C5 6002 MOVT R0, #0x5602 0x34191B38: 6800 LDR R0, [R0] 0x34191B3A: F400 017F AND R1, R0, #0xFF0000 0x34191B3E: 2001 MOVS R0, #1 0x34191B40: EB00 4011 ADD.W R0, R0, R1, LSR #16 0x34191B44: 4770 BX LR

Section .init.I2C1_ER_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


I2C1_ER_IRQHandler: 0x34191B46: E7FE B I2C1_ER_IRQHandler ; 0x34191B46

Section .text.LL_RCC_IC14_GetDivider from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_IC14_GetDivider: 0x34191B48: F248 00F8 MOVW R0, #0x80F8 0x34191B4C: F2C5 6002 MOVT R0, #0x5602 0x34191B50: 6800 LDR R0, [R0] 0x34191B52: F400 017F AND R1, R0, #0xFF0000 0x34191B56: 2001 MOVS R0, #1 0x34191B58: EB00 4011 ADD.W R0, R0, R1, LSR #16 0x34191B5C: 4770 BX LR

Section .init.I2C2_EV_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


I2C2_EV_IRQHandler: 0x34191B5E: E7FE B I2C2_EV_IRQHandler ; 0x34191B5E

Section .text.LL_RCC_IC8_GetDivider from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_IC8_GetDivider: 0x34191B60: F248 00E0 MOVW R0, #0x80E0 0x34191B64: F2C5 6002 MOVT R0, #0x5602 0x34191B68: 6800 LDR R0, [R0] 0x34191B6A: F400 017F AND R1, R0, #0xFF0000 0x34191B6E: 2001 MOVS R0, #1 0x34191B70: EB00 4011 ADD.W R0, R0, R1, LSR #16 0x34191B74: 4770 BX LR

Section .init.I2C2_ER_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


I2C2_ER_IRQHandler: 0x34191B76: E7FE B I2C2_ER_IRQHandler ; 0x34191B76

Section .text.LL_RCC_IC7_GetDivider from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_IC7_GetDivider: 0x34191B78: F248 00DC MOVW R0, #0x80DC 0x34191B7C: F2C5 6002 MOVT R0, #0x5602 0x34191B80: 6800 LDR R0, [R0] 0x34191B82: F400 017F AND R1, R0, #0xFF0000 0x34191B86: 2001 MOVS R0, #1 0x34191B88: EB00 4011 ADD.W R0, R0, R1, LSR #16 0x34191B8C: 4770 BX LR

Section .init.I2C3_EV_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


I2C3_EV_IRQHandler: 0x34191B8E: E7FE B I2C3_EV_IRQHandler ; 0x34191B8E

Section .text.LL_RCC_IC5_GetDivider from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_IC5_GetDivider: 0x34191B90: F248 00D4 MOVW R0, #0x80D4 0x34191B94: F2C5 6002 MOVT R0, #0x5602 0x34191B98: 6800 LDR R0, [R0] 0x34191B9A: F400 017F AND R1, R0, #0xFF0000 0x34191B9E: 2001 MOVS R0, #1 0x34191BA0: EB00 4011 ADD.W R0, R0, R1, LSR #16 0x34191BA4: 4770 BX LR

Section .init.I2C3_ER_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


I2C3_ER_IRQHandler: 0x34191BA6: E7FE B I2C3_ER_IRQHandler ; 0x34191BA6

Section .text.LL_RCC_IC20_GetDivider from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_IC20_GetDivider: 0x34191BA8: F248 1010 MOVW R0, #0x8110 0x34191BAC: F2C5 6002 MOVT R0, #0x5602 0x34191BB0: 6800 LDR R0, [R0] 0x34191BB2: F400 017F AND R1, R0, #0xFF0000 0x34191BB6: 2001 MOVS R0, #1 0x34191BB8: EB00 4011 ADD.W R0, R0, R1, LSR #16 0x34191BBC: 4770 BX LR

Section .init.I2C4_EV_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


I2C4_EV_IRQHandler: 0x34191BBE: E7FE B I2C4_EV_IRQHandler ; 0x34191BBE

Section .text.LL_RCC_IC16_GetDivider from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_IC16_GetDivider: 0x34191BC0: F248 1000 MOVW R0, #0x8100 0x34191BC4: F2C5 6002 MOVT R0, #0x5602 0x34191BC8: 6800 LDR R0, [R0] 0x34191BCA: F400 017F AND R1, R0, #0xFF0000 0x34191BCE: 2001 MOVS R0, #1 0x34191BD0: EB00 4011 ADD.W R0, R0, R1, LSR #16 0x34191BD4: 4770 BX LR

Section .init.I2C4_ER_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


I2C4_ER_IRQHandler: 0x34191BD6: E7FE B I2C4_ER_IRQHandler ; 0x34191BD6

Section .text.LL_RCC_IC10_GetDivider from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_IC10_GetDivider: 0x34191BD8: F248 00E8 MOVW R0, #0x80E8 0x34191BDC: F2C5 6002 MOVT R0, #0x5602 0x34191BE0: 6800 LDR R0, [R0] 0x34191BE2: F400 017F AND R1, R0, #0xFF0000 0x34191BE6: 2001 MOVS R0, #1 0x34191BE8: EB00 4011 ADD.W R0, R0, R1, LSR #16 0x34191BEC: 4770 BX LR

Section .init.I3C1_EV_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


I3C1_EV_IRQHandler: 0x34191BEE: E7FE B I3C1_EV_IRQHandler ; 0x34191BEE

Section .text.LL_RCC_IC19_GetDivider from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_IC19_GetDivider: 0x34191BF0: F248 100C MOVW R0, #0x810C 0x34191BF4: F2C5 6002 MOVT R0, #0x5602 0x34191BF8: 6800 LDR R0, [R0] 0x34191BFA: F400 017F AND R1, R0, #0xFF0000 0x34191BFE: 2001 MOVS R0, #1 0x34191C00: EB00 4011 ADD.W R0, R0, R1, LSR #16 0x34191C04: 4770 BX LR

Section .init.I3C1_ER_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


I3C1_ER_IRQHandler: 0x34191C06: E7FE B I3C1_ER_IRQHandler ; 0x34191C06

Section .text.LL_RCC_IC13_GetDivider from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_IC13_GetDivider: 0x34191C08: F248 00F4 MOVW R0, #0x80F4 0x34191C0C: F2C5 6002 MOVT R0, #0x5602 0x34191C10: 6800 LDR R0, [R0] 0x34191C12: F400 017F AND R1, R0, #0xFF0000 0x34191C16: 2001 MOVS R0, #1 0x34191C18: EB00 4011 ADD.W R0, R0, R1, LSR #16 0x34191C1C: 4770 BX LR

Section .init.I3C2_EV_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


I3C2_EV_IRQHandler: 0x34191C1E: E7FE B I3C2_EV_IRQHandler ; 0x34191C1E

Section .text.LL_RCC_IC12_GetDivider from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_IC12_GetDivider: 0x34191C20: F248 00F0 MOVW R0, #0x80F0 0x34191C24: F2C5 6002 MOVT R0, #0x5602 0x34191C28: 6800 LDR R0, [R0] 0x34191C2A: F400 017F AND R1, R0, #0xFF0000 0x34191C2E: 2001 MOVS R0, #1 0x34191C30: EB00 4011 ADD.W R0, R0, R1, LSR #16 0x34191C34: 4770 BX LR

Section .init.I3C2_ER_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


I3C2_ER_IRQHandler: 0x34191C36: E7FE B I3C2_ER_IRQHandler ; 0x34191C36

Section .text.LL_RCC_IC17_GetDivider from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_IC17_GetDivider: 0x34191C38: F248 1004 MOVW R0, #0x8104 0x34191C3C: F2C5 6002 MOVT R0, #0x5602 0x34191C40: 6800 LDR R0, [R0] 0x34191C42: F400 017F AND R1, R0, #0xFF0000 0x34191C46: 2001 MOVS R0, #1 0x34191C48: EB00 4011 ADD.W R0, R0, R1, LSR #16 0x34191C4C: 4770 BX LR

Section .init.TIM1_BRK_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM1_BRK_IRQHandler: 0x34191C4E: E7FE B TIM1_BRK_IRQHandler ; 0x34191C4E

Section .text.LL_RCC_IC18_GetDivider from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_IC18_GetDivider: 0x34191C50: F248 1008 MOVW R0, #0x8108 0x34191C54: F2C5 6002 MOVT R0, #0x5602 0x34191C58: 6800 LDR R0, [R0] 0x34191C5A: F400 017F AND R1, R0, #0xFF0000 0x34191C5E: 2001 MOVS R0, #1 0x34191C60: EB00 4011 ADD.W R0, R0, R1, LSR #16 0x34191C64: 4770 BX LR

Section .init.TIM1_UP_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM1_UP_IRQHandler: 0x34191C66: E7FE B TIM1_UP_IRQHandler ; 0x34191C66

Section .text.HAL_XSPI_SetTimeout from blto2_FSBL_lto.o, size=18, align=4


HAL_XSPI_SetTimeout: 0x34191C68: B082 SUB SP, SP, #8 0x34191C6A: 9001 STR R0, [SP, #4] 0x34191C6C: 9100 STR R1, [SP, #0] 0x34191C6E: 9800 LDR R0, [SP, #0] 0x34191C70: 9901 LDR R1, [SP, #4] 0x34191C72: 6608 STR R0, [R1, #96] 0x34191C74: 2000 MOVS R0, #0 0x34191C76: B002 ADD SP, SP, #8 0x34191C78: 4770 BX LR

Section .init.TIM1_TRG_CCU_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM1_TRG_CCU_IRQHandler: 0x34191C7A: E7FE B TIM1_TRG_CCU_IRQHandler ; 0x34191C7A

Section .text.HAL_XSPI_Command from blto2_FSBL_lto.o, size=1106, align=4


HAL_XSPI_Command: 0x34191C7C: B580 PUSH 123R7, LR} 0x34191C7E: B088 SUB SP, SP, #32 0x34191C80: 9007 STR R0, [SP, #28] 0x34191C82: 9106 STR R1, [SP, #24] 0x34191C84: 9205 STR R2, [SP, #20] 0x34191C86: F7EF FEB5 BL HAL_GetTick ; 0x341819F4 0x34191C8A: 9002 STR R0, [SP, #8] 0x34191C8C: 9806 LDR R0, [SP, #24] 0x34191C8E: 6800 LDR R0, [R0] 0x34191C90: B158 CBZ R0, .L1 ; 0x34191CAA 0x34191C92: 9806 LDR R0, [SP, #24] 0x34191C94: 6800 LDR R0, [R0] 0x34191C96: 2801 CMP R0, #1 0x34191C98: D007 BEQ 46L1 ; 0x34191CAA 0x34191C9A: 9806 LDR R0, [SP, #24] 0x34191C9C: 6800 LDR R0, [R0] 0x34191C9E: 2802 CMP R0, #2 0x34191CA0: D003 BEQ 46L1 ; 0x34191CAA 0x34191CA2: 9806 LDR R0, [SP, #24] 0x34191CA4: 6800 LDR R0, [R0] 0x34191CA6: 2803 CMP R0, #3 0x34191CA8: D100 BNE 46L2 ; 0x34191CAC
.L1: 0x34191CAA: E007 B 46L3 ; 0x34191CBC
.L2: 0x34191CAC: F244 204E MOVW R0, #0x424E ; 0x3419424E = .rodata..L.str.98 0x34191CB0: F2C3 4019 MOVT R0, #0x3419 ; 0x3419424E = .rodata..L.str.98 0x34191CB4: F240 3141 MOVW R1, #0x0341 0x34191CB8: F7FB FFEE BL assert_failed ; 0x3418DC98
.L3: 0x34191CBC: 9807 LDR R0, [SP, #28] 0x34191CBE: 6880 LDR R0, [R0, #8] 0x34191CC0: BB10 CBNZ R0, .L6 ; 0x34191D08 0x34191CC2: 9806 LDR R0, [SP, #24] 0x34191CC4: 6840 LDR R0, [R0, #4] 0x34191CC6: B1B0 CBZ R0, .L4 ; 0x34191CF6 0x34191CC8: 9806 LDR R0, [SP, #24] 0x34191CCA: 6840 LDR R0, [R0, #4] 0x34191CCC: F1B0 4F80 CMP.W R0, #0x40000000 0x34191CD0: D011 BEQ 46L4 ; 0x34191CF6 0x34191CD2: 9806 LDR R0, [SP, #24] 0x34191CD4: 6840 LDR R0, [R0, #4] 0x34191CD6: F1B0 4F00 CMP.W R0, #0x80000000 0x34191CDA: D00C BEQ 46L4 ; 0x34191CF6 0x34191CDC: 9806 LDR R0, [SP, #24] 0x34191CDE: 6840 LDR R0, [R0, #4] 0x34191CE0: F1B0 4F40 CMP.W R0, #0xC0000000 0x34191CE4: D007 BEQ 46L4 ; 0x34191CF6 0x34191CE6: 9806 LDR R0, [SP, #24] 0x34191CE8: 6840 LDR R0, [R0, #4] 0x34191CEA: B120 CBZ R0, .L4 ; 0x34191CF6 0x34191CEC: 9806 LDR R0, [SP, #24] 0x34191CEE: 6840 LDR R0, [R0, #4] 0x34191CF0: F1B0 4F00 CMP.W R0, #0x80000000 0x34191CF4: D100 BNE 46L5 ; 0x34191CF8
.L4: 0x34191CF6: E007 B 46L6 ; 0x34191D08
.L5: 0x34191CF8: F244 204E MOVW R0, #0x424E ; 0x3419424E = .rodata..L.str.98 0x34191CFC: F2C3 4019 MOVT R0, #0x3419 ; 0x3419424E = .rodata..L.str.98 0x34191D00: F44F 7151 MOV.W R1, #0x0344 0x34191D04: F7FB FFC8 BL assert_failed ; 0x3418DC98
.L6: 0x34191D08: 9806 LDR R0, [SP, #24] 0x34191D0A: 68C0 LDR R0, [R0, #12] 0x34191D0C: B178 CBZ R0, .L7 ; 0x34191D2E 0x34191D0E: 9806 LDR R0, [SP, #24] 0x34191D10: 68C0 LDR R0, [R0, #12] 0x34191D12: 2801 CMP R0, #1 0x34191D14: D00B BEQ 46L7 ; 0x34191D2E 0x34191D16: 9806 LDR R0, [SP, #24] 0x34191D18: 68C0 LDR R0, [R0, #12] 0x34191D1A: 2802 CMP R0, #2 0x34191D1C: D007 BEQ 46L7 ; 0x34191D2E 0x34191D1E: 9806 LDR R0, [SP, #24] 0x34191D20: 68C0 LDR R0, [R0, #12] 0x34191D22: 2803 CMP R0, #3 0x34191D24: D003 BEQ 46L7 ; 0x34191D2E 0x34191D26: 9806 LDR R0, [SP, #24] 0x34191D28: 68C0 LDR R0, [R0, #12] 0x34191D2A: 2804 CMP R0, #4 0x34191D2C: D100 BNE 46L8 ; 0x34191D30
.L7: 0x34191D2E: E007 B 46L9 ; 0x34191D40
.L8: 0x34191D30: F244 204E MOVW R0, #0x424E ; 0x3419424E = .rodata..L.str.98 0x34191D34: F2C3 4019 MOVT R0, #0x3419 ; 0x3419424E = .rodata..L.str.98 0x34191D38: F240 3147 MOVW R1, #0x0347 0x34191D3C: F7FB FFAC BL assert_failed ; 0x3418DC98
.L9: 0x34191D40: 9806 LDR R0, [SP, #24] 0x34191D42: 68C0 LDR R0, [R0, #12] 0x34191D44: B338 CBZ R0, .L15 ; 0x34191D96 0x34191D46: 9806 LDR R0, [SP, #24] 0x34191D48: 6900 LDR R0, [R0, #16] 0x34191D4A: B158 CBZ R0, .L10 ; 0x34191D64 0x34191D4C: 9806 LDR R0, [SP, #24] 0x34191D4E: 6900 LDR R0, [R0, #16] 0x34191D50: 2810 CMP R0, #16 0x34191D52: D007 BEQ 46L10 ; 0x34191D64 0x34191D54: 9806 LDR R0, [SP, #24] 0x34191D56: 6900 LDR R0, [R0, #16] 0x34191D58: 2820 CMP R0, #32 0x34191D5A: D003 BEQ 46L10 ; 0x34191D64 0x34191D5C: 9806 LDR R0, [SP, #24] 0x34191D5E: 6900 LDR R0, [R0, #16] 0x34191D60: 2830 CMP R0, #48 0x34191D62: D100 BNE 46L11 ; 0x34191D66
.L10: 0x34191D64: E007 B 46L12 ; 0x34191D76
.L11: 0x34191D66: F244 204E MOVW R0, #0x424E ; 0x3419424E = .rodata..L.str.98 0x34191D6A: F2C3 4019 MOVT R0, #0x3419 ; 0x3419424E = .rodata..L.str.98 0x34191D6E: F240 314A MOVW R1, #0x034A 0x34191D72: F7FB FF91 BL assert_failed ; 0x3418DC98
.L12: 0x34191D76: 9806 LDR R0, [SP, #24] 0x34191D78: 6940 LDR R0, [R0, #20] 0x34191D7A: B118 CBZ R0, .L13 ; 0x34191D84 0x34191D7C: 9806 LDR R0, [SP, #24] 0x34191D7E: 6940 LDR R0, [R0, #20] 0x34191D80: 2808 CMP R0, #8 0x34191D82: D100 BNE 46L14 ; 0x34191D86
.L13: 0x34191D84: E007 B 46L15 ; 0x34191D96
.L14: 0x34191D86: F244 204E MOVW R0, #0x424E ; 0x3419424E = .rodata..L.str.98 0x34191D8A: F2C3 4019 MOVT R0, #0x3419 ; 0x3419424E = .rodata..L.str.98 0x34191D8E: F240 314B MOVW R1, #0x034B 0x34191D92: F7FB FF81 BL assert_failed ; 0x3418DC98
.L15: 0x34191D96: 9806 LDR R0, [SP, #24] 0x34191D98: 69C0 LDR R0, [R0, #28] 0x34191D9A: B198 CBZ R0, .L16 ; 0x34191DC4 0x34191D9C: 9806 LDR R0, [SP, #24] 0x34191D9E: 69C0 LDR R0, [R0, #28] 0x34191DA0: F5B0 7F80 CMP.W R0, #0x0100 0x34191DA4: D00E BEQ 46L16 ; 0x34191DC4 0x34191DA6: 9806 LDR R0, [SP, #24] 0x34191DA8: 69C0 LDR R0, [R0, #28] 0x34191DAA: F5B0 7F00 CMP.W R0, #0x0200 0x34191DAE: D009 BEQ 46L16 ; 0x34191DC4 0x34191DB0: 9806 LDR R0, [SP, #24] 0x34191DB2: 69C0 LDR R0, [R0, #28] 0x34191DB4: F5B0 7F40 CMP.W R0, #0x0300 0x34191DB8: D004 BEQ 46L16 ; 0x34191DC4 0x34191DBA: 9806 LDR R0, [SP, #24] 0x34191DBC: 69C0 LDR R0, [R0, #28] 0x34191DBE: F5B0 6F80 CMP.W R0, #0x0400 0x34191DC2: D100 BNE 46L17 ; 0x34191DC6
.L16: 0x34191DC4: E007 B 46L18 ; 0x34191DD6
.L17: 0x34191DC6: F244 204E MOVW R0, #0x424E ; 0x3419424E = .rodata..L.str.98 0x34191DCA: F2C3 4019 MOVT R0, #0x3419 ; 0x3419424E = .rodata..L.str.98 0x34191DCE: F240 314E MOVW R1, #0x034E 0x34191DD2: F7FB FF61 BL assert_failed ; 0x3418DC98
.L18: 0x34191DD6: 9806 LDR R0, [SP, #24] 0x34191DD8: 69C0 LDR R0, [R0, #28] 0x34191DDA: B358 CBZ R0, .L24 ; 0x34191E34 0x34191DDC: 9806 LDR R0, [SP, #24] 0x34191DDE: 6A00 LDR R0, [R0, #32] 0x34191DE0: B170 CBZ R0, .L19 ; 0x34191E00 0x34191DE2: 9806 LDR R0, [SP, #24] 0x34191DE4: 6A00 LDR R0, [R0, #32] 0x34191DE6: F5B0 5F80 CMP.W R0, #0x1000 0x34191DEA: D009 BEQ 46L19 ; 0x34191E00 0x34191DEC: 9806 LDR R0, [SP, #24] 0x34191DEE: 6A00 LDR R0, [R0, #32] 0x34191DF0: F5B0 5F00 CMP.W R0, #0x2000 0x34191DF4: D004 BEQ 46L19 ; 0x34191E00 0x34191DF6: 9806 LDR R0, [SP, #24] 0x34191DF8: 6A00 LDR R0, [R0, #32] 0x34191DFA: F5B0 5F40 CMP.W R0, #0x3000 0x34191DFE: D100 BNE 46L20 ; 0x34191E02
.L19: 0x34191E00: E007 B 46L21 ; 0x34191E12
.L20: 0x34191E02: F244 204E MOVW R0, #0x424E ; 0x3419424E = .rodata..L.str.98 0x34191E06: F2C3 4019 MOVT R0, #0x3419 ; 0x3419424E = .rodata..L.str.98 0x34191E0A: F240 3151 MOVW R1, #0x0351 0x34191E0E: F7FB FF43 BL assert_failed ; 0x3418DC98
.L21: 0x34191E12: 9806 LDR R0, [SP, #24] 0x34191E14: 6A40 LDR R0, [R0, #36] 0x34191E16: B120 CBZ R0, .L22 ; 0x34191E22 0x34191E18: 9806 LDR R0, [SP, #24] 0x34191E1A: 6A40 LDR R0, [R0, #36] 0x34191E1C: F5B0 6F00 CMP.W R0, #0x0800 0x34191E20: D100 BNE 46L23 ; 0x34191E24
.L22: 0x34191E22: E007 B 46L24 ; 0x34191E34
.L23: 0x34191E24: F244 204E MOVW R0, #0x424E ; 0x3419424E = .rodata..L.str.98 0x34191E28: F2C3 4019 MOVT R0, #0x3419 ; 0x3419424E = .rodata..L.str.98 0x34191E2C: F240 3152 MOVW R1, #0x0352 0x34191E30: F7FB FF32 BL assert_failed ; 0x3418DC98
.L24: 0x34191E34: 9806 LDR R0, [SP, #24] 0x34191E36: 6AC0 LDR R0, [R0, #44] 0x34191E38: B198 CBZ R0, .L25 ; 0x34191E62 0x34191E3A: 9806 LDR R0, [SP, #24] 0x34191E3C: 6AC0 LDR R0, [R0, #44] 0x34191E3E: F5B0 3F80 CMP.W R0, #0x010000 0x34191E42: D00E BEQ 46L25 ; 0x34191E62 0x34191E44: 9806 LDR R0, [SP, #24] 0x34191E46: 6AC0 LDR R0, [R0, #44] 0x34191E48: F5B0 3F00 CMP.W R0, #0x020000 0x34191E4C: D009 BEQ 46L25 ; 0x34191E62 0x34191E4E: 9806 LDR R0, [SP, #24] 0x34191E50: 6AC0 LDR R0, [R0, #44] 0x34191E52: F5B0 3F40 CMP.W R0, #0x030000 0x34191E56: D004 BEQ 46L25 ; 0x34191E62 0x34191E58: 9806 LDR R0, [SP, #24] 0x34191E5A: 6AC0 LDR R0, [R0, #44] 0x34191E5C: F5B0 2F80 CMP.W R0, #0x040000 0x34191E60: D100 BNE 46L26 ; 0x34191E64
.L25: 0x34191E62: E007 B 46L27 ; 0x34191E74
.L26: 0x34191E64: F244 204E MOVW R0, #0x424E ; 0x3419424E = .rodata..L.str.98 0x34191E68: F2C3 4019 MOVT R0, #0x3419 ; 0x3419424E = .rodata..L.str.98 0x34191E6C: F240 3155 MOVW R1, #0x0355 0x34191E70: F7FB FF12 BL assert_failed ; 0x3418DC98
.L27: 0x34191E74: 9806 LDR R0, [SP, #24] 0x34191E76: 6AC0 LDR R0, [R0, #44] 0x34191E78: B358 CBZ R0, .L33 ; 0x34191ED2 0x34191E7A: 9806 LDR R0, [SP, #24] 0x34191E7C: 6B00 LDR R0, [R0, #48] 0x34191E7E: B170 CBZ R0, .L28 ; 0x34191E9E 0x34191E80: 9806 LDR R0, [SP, #24] 0x34191E82: 6B00 LDR R0, [R0, #48] 0x34191E84: F5B0 1F80 CMP.W R0, #0x100000 0x34191E88: D009 BEQ 46L28 ; 0x34191E9E 0x34191E8A: 9806 LDR R0, [SP, #24] 0x34191E8C: 6B00 LDR R0, [R0, #48] 0x34191E8E: F5B0 1F00 CMP.W R0, #0x200000 0x34191E92: D004 BEQ 46L28 ; 0x34191E9E 0x34191E94: 9806 LDR R0, [SP, #24] 0x34191E96: 6B00 LDR R0, [R0, #48] 0x34191E98: F5B0 1F40 CMP.W R0, #0x300000 0x34191E9C: D100 BNE 46L29 ; 0x34191EA0
.L28: 0x34191E9E: E007 B 46L30 ; 0x34191EB0
.L29: 0x34191EA0: F244 204E MOVW R0, #0x424E ; 0x3419424E = .rodata..L.str.98 0x34191EA4: F2C3 4019 MOVT R0, #0x3419 ; 0x3419424E = .rodata..L.str.98 0x34191EA8: F44F 7156 MOV.W R1, #0x0358 0x34191EAC: F7FB FEF4 BL assert_failed ; 0x3418DC98
.L30: 0x34191EB0: 9806 LDR R0, [SP, #24] 0x34191EB2: 6B40 LDR R0, [R0, #52] 0x34191EB4: B120 CBZ R0, .L31 ; 0x34191EC0 0x34191EB6: 9806 LDR R0, [SP, #24] 0x34191EB8: 6B40 LDR R0, [R0, #52] 0x34191EBA: F5B0 2F00 CMP.W R0, #0x080000 0x34191EBE: D100 BNE 46L32 ; 0x34191EC2
.L31: 0x34191EC0: E007 B 46L33 ; 0x34191ED2
.L32: 0x34191EC2: F244 204E MOVW R0, #0x424E ; 0x3419424E = .rodata..L.str.98 0x34191EC6: F2C3 4019 MOVT R0, #0x3419 ; 0x3419424E = .rodata..L.str.98 0x34191ECA: F240 3159 MOVW R1, #0x0359 0x34191ECE: F7FB FEE3 BL assert_failed ; 0x3418DC98
.L33: 0x34191ED2: 9807 LDR R0, [SP, #28] 0x34191ED4: 68C0 LDR R0, [R0, #12] 0x34191ED6: F1B0 6F80 CMP.W R0, #0x04000000 0x34191EDA: D10D BNE 46L34 ; 0x34191EF8 0x34191EDC: 9806 LDR R0, [SP, #24] 0x34191EDE: 6B80 LDR R0, [R0, #56] 0x34191EE0: B330 CBZ R0, .L35 ; 0x34191F30 0x34191EE2: 9806 LDR R0, [SP, #24] 0x34191EE4: 6B80 LDR R0, [R0, #56] 0x34191EE6: F1B0 6F80 CMP.W R0, #0x04000000 0x34191EEA: D021 BEQ 46L35 ; 0x34191F30 0x34191EEC: 9806 LDR R0, [SP, #24] 0x34191EEE: 6B80 LDR R0, [R0, #56] 0x34191EF0: F1B0 6FA0 CMP.W R0, #0x05000000 0x34191EF4: D01C BEQ 46L35 ; 0x34191F30 0x34191EF6: E01C B 46L36 ; 0x34191F32
.L34: 0x34191EF8: 9806 LDR R0, [SP, #24] 0x34191EFA: 6B80 LDR R0, [R0, #56] 0x34191EFC: B1C0 CBZ R0, .L35 ; 0x34191F30 0x34191EFE: 9806 LDR R0, [SP, #24] 0x34191F00: 6B80 LDR R0, [R0, #56] 0x34191F02: F1B0 7F80 CMP.W R0, #0x01000000 0x34191F06: D013 BEQ 46L35 ; 0x34191F30 0x34191F08: 9806 LDR R0, [SP, #24] 0x34191F0A: 6B80 LDR R0, [R0, #56] 0x34191F0C: F1B0 7F00 CMP.W R0, #0x02000000 0x34191F10: D00E BEQ 46L35 ; 0x34191F30 0x34191F12: 9806 LDR R0, [SP, #24] 0x34191F14: 6B80 LDR R0, [R0, #56] 0x34191F16: F1B0 7F40 CMP.W R0, #0x03000000 0x34191F1A: D009 BEQ 46L35 ; 0x34191F30 0x34191F1C: 9806 LDR R0, [SP, #24] 0x34191F1E: 6B80 LDR R0, [R0, #56] 0x34191F20: F1B0 6F80 CMP.W R0, #0x04000000 0x34191F24: D004 BEQ 46L35 ; 0x34191F30 0x34191F26: 9806 LDR R0, [SP, #24] 0x34191F28: 6B80 LDR R0, [R0, #56] 0x34191F2A: F1B0 6FA0 CMP.W R0, #0x05000000 0x34191F2E: D100 BNE 46L36 ; 0x34191F32
.L35: 0x34191F30: E007 B 46L37 ; 0x34191F42
.L36: 0x34191F32: F244 204E MOVW R0, #0x424E ; 0x3419424E = .rodata..L.str.98 0x34191F36: F2C3 4019 MOVT R0, #0x3419 ; 0x3419424E = .rodata..L.str.98 0x34191F3A: F44F 7157 MOV.W R1, #0x035C 0x34191F3E: F7FB FEAB BL assert_failed ; 0x3418DC98
.L37: 0x34191F42: 9806 LDR R0, [SP, #24] 0x34191F44: 6B80 LDR R0, [R0, #56] 0x34191F46: B360 CBZ R0, .L44 ; 0x34191FA2 0x34191F48: 9806 LDR R0, [SP, #24] 0x34191F4A: 6800 LDR R0, [R0] 0x34191F4C: B958 CBNZ R0, .L39 ; 0x34191F66 0x34191F4E: 9806 LDR R0, [SP, #24] 0x34191F50: 6BC0 LDR R0, [R0, #60] 0x34191F52: B100 CBZ R0, .L38 ; 0x34191F56 0x34191F54: E007 B 46L39 ; 0x34191F66
.L38: 0x34191F56: F244 204E MOVW R0, #0x424E ; 0x3419424E = .rodata..L.str.98 0x34191F5A: F2C3 4019 MOVT R0, #0x3419 ; 0x3419424E = .rodata..L.str.98 0x34191F5E: F240 3162 MOVW R1, #0x0362 0x34191F62: F7FB FE99 BL assert_failed ; 0x3418DC98
.L39: 0x34191F66: 9806 LDR R0, [SP, #24] 0x34191F68: 6C00 LDR R0, [R0, #64] 0x34191F6A: B120 CBZ R0, .L40 ; 0x34191F76 0x34191F6C: 9806 LDR R0, [SP, #24] 0x34191F6E: 6C00 LDR R0, [R0, #64] 0x34191F70: F1B0 6F00 CMP.W R0, #0x08000000 0x34191F74: D100 BNE 46L41 ; 0x34191F78
.L40: 0x34191F76: E007 B 46L42 ; 0x34191F88
.L41: 0x34191F78: F244 204E MOVW R0, #0x424E ; 0x3419424E = .rodata..L.str.98 0x34191F7C: F2C3 4019 MOVT R0, #0x3419 ; 0x3419424E = .rodata..L.str.98 0x34191F80: F44F 7159 MOV.W R1, #0x0364 0x34191F84: F7FB FE88 BL assert_failed ; 0x3418DC98
.L42: 0x34191F88: 9806 LDR R0, [SP, #24] 0x34191F8A: 6C40 LDR R0, [R0, #68] 0x34191F8C: 281F CMP R0, #31 0x34191F8E: D800 BHI 46L43 ; 0x34191F92 0x34191F90: E007 B 46L44 ; 0x34191FA2
.L43: 0x34191F92: F244 204E MOVW R0, #0x424E ; 0x3419424E = .rodata..L.str.98 0x34191F96: F2C3 4019 MOVT R0, #0x3419 ; 0x3419424E = .rodata..L.str.98 0x34191F9A: F240 3165 MOVW R1, #0x0365 0x34191F9E: F7FB FE7B BL assert_failed ; 0x3418DC98
.L44: 0x34191FA2: 9806 LDR R0, [SP, #24] 0x34191FA4: 6C80 LDR R0, [R0, #72] 0x34191FA6: B120 CBZ R0, .L45 ; 0x34191FB2 0x34191FA8: 9806 LDR R0, [SP, #24] 0x34191FAA: 6C80 LDR R0, [R0, #72] 0x34191FAC: F1B0 5F00 CMP.W R0, #0x20000000 0x34191FB0: D100 BNE 46L46 ; 0x34191FB4
.L45: 0x34191FB2: E007 B 46L47 ; 0x34191FC4
.L46: 0x34191FB4: F244 204E MOVW R0, #0x424E ; 0x3419424E = .rodata..L.str.98 0x34191FB8: F2C3 4019 MOVT R0, #0x3419 ; 0x3419424E = .rodata..L.str.98 0x34191FBC: F44F 715A MOV.W R1, #0x0368 0x34191FC0: F7FB FE6A BL assert_failed ; 0x3418DC98
.L47: 0x34191FC4: 9807 LDR R0, [SP, #28] 0x34191FC6: 6D80 LDR R0, [R0, #88] 0x34191FC8: 9003 STR R0, [SP, #12] 0x34191FCA: 9803 LDR R0, [SP, #12] 0x34191FCC: 2802 CMP R0, #2 0x34191FCE: D104 BNE 46L48 ; 0x34191FDA 0x34191FD0: 9807 LDR R0, [SP, #28] 0x34191FD2: 68C0 LDR R0, [R0, #12] 0x34191FD4: F1B0 6F80 CMP.W R0, #0x04000000 0x34191FD8: D115 BNE 46L50 ; 0x34192006
.L48: 0x34191FDA: 9803 LDR R0, [SP, #12] 0x34191FDC: 2814 CMP R0, #20 0x34191FDE: D107 BNE 46L49 ; 0x34191FF0 0x34191FE0: 9806 LDR R0, [SP, #24] 0x34191FE2: 6800 LDR R0, [R0] 0x34191FE4: 2802 CMP R0, #2 0x34191FE6: D00E BEQ 46L50 ; 0x34192006 0x34191FE8: 9806 LDR R0, [SP, #24] 0x34191FEA: 6800 LDR R0, [R0] 0x34191FEC: 2803 CMP R0, #3 0x34191FEE: D00A BEQ 46L50 ; 0x34192006
.L49: 0x34191FF0: 9803 LDR R0, [SP, #12] 0x34191FF2: 2824 CMP R0, #36 0x34191FF4: D161 BNE 46L61 ; 0x341920BA 0x34191FF6: 9806 LDR R0, [SP, #24] 0x34191FF8: 6800 LDR R0, [R0] 0x34191FFA: 2801 CMP R0, #1 0x34191FFC: D003 BEQ 46L50 ; 0x34192006 0x34191FFE: 9806 LDR R0, [SP, #24] 0x34192000: 6800 LDR R0, [R0] 0x34192002: 2803 CMP R0, #3 0x34192004: D159 BNE 46L61 ; 0x341920BA
.L50: 0x34192006: 9807 LDR R0, [SP, #28] 0x34192008: 9B02 LDR R3, [SP, #8] 0x3419200A: 9905 LDR R1, [SP, #20] 0x3419200C: 466A MOV R2, SP 0x3419200E: 6011 STR R1, [R2] 0x34192010: 2120 MOVS R1, #32 0x34192012: 2200 MOVS R2, #0 0x34192014: F7F9 FB70 BL XSPI_WaitFlagStateUntilTimeout ; 0x3418B6F8 0x34192018: F88D 0013 STRB.W R0, [SP, #19] 0x3419201C: F89D 0013 LDRB.W R0, [SP, #19] 0x34192020: 2800 CMP R0, #0 0x34192022: D146 BNE 46L59 ; 0x341920B2 0x34192024: 9907 LDR R1, [SP, #28] 0x34192026: 2000 MOVS R0, #0 0x34192028: 65C8 STR R0, [R1, #92] 0x3419202A: 9807 LDR R0, [SP, #28] 0x3419202C: 9906 LDR R1, [SP, #24] 0x3419202E: F7F9 FB97 BL XSPI_ConfigCmd ; 0x3418B760 0x34192032: F88D 0013 STRB.W R0, [SP, #19] 0x34192036: F89D 0013 LDRB.W R0, [SP, #19] 0x3419203A: BBC8 CBNZ R0, .L58 ; 0x341920B0 0x3419203C: 9806 LDR R0, [SP, #24] 0x3419203E: 6B80 LDR R0, [R0, #56] 0x34192040: B978 CBNZ R0, .L51 ; 0x34192062 0x34192042: 9807 LDR R0, [SP, #28] 0x34192044: 9B02 LDR R3, [SP, #8] 0x34192046: 9905 LDR R1, [SP, #20] 0x34192048: 466A MOV R2, SP 0x3419204A: 6011 STR R1, [R2] 0x3419204C: 2120 MOVS R1, #32 0x3419204E: 2200 MOVS R2, #0 0x34192050: F7F9 FB52 BL XSPI_WaitFlagStateUntilTimeout ; 0x3418B6F8 0x34192054: F88D 0013 STRB.W R0, [SP, #19] 0x34192058: 9807 LDR R0, [SP, #28] 0x3419205A: 6801 LDR R1, [R0] 0x3419205C: 2002 MOVS R0, #2 0x3419205E: 6248 STR R0, [R1, #36] 0x34192060: E026 B 46L58 ; 0x341920B0
.L51: 0x34192062: 9806 LDR R0, [SP, #24] 0x34192064: 6800 LDR R0, [R0] 0x34192066: B918 CBNZ R0, .L52 ; 0x34192070 0x34192068: 9907 LDR R1, [SP, #28] 0x3419206A: 2004 MOVS R0, #4 0x3419206C: 6588 STR R0, [R1, #88] 0x3419206E: E01F B 46L58 ; 0x341920B0
.L52: 0x34192070: 9806 LDR R0, [SP, #24] 0x34192072: 6800 LDR R0, [R0] 0x34192074: 2801 CMP R0, #1 0x34192076: D10B BNE 46L55 ; 0x34192090 0x34192078: 9807 LDR R0, [SP, #28] 0x3419207A: 6D80 LDR R0, [R0, #88] 0x3419207C: 2824 CMP R0, #36 0x3419207E: D103 BNE 46L53 ; 0x34192088 0x34192080: 9907 LDR R1, [SP, #28] 0x34192082: 2004 MOVS R0, #4 0x34192084: 6588 STR R0, [R1, #88] 0x34192086: E002 B 46L54 ; 0x3419208E
.L53: 0x34192088: 9907 LDR R1, [SP, #28] 0x3419208A: 2014 MOVS R0, #20 0x3419208C: 6588 STR R0, [R1, #88]
.L54: 0x3419208E: E00F B 46L58 ; 0x341920B0
.L55: 0x34192090: 9806 LDR R0, [SP, #24] 0x34192092: 6800 LDR R0, [R0] 0x34192094: 2802 CMP R0, #2 0x34192096: D10B BNE 46L58 ; 0x341920B0 0x34192098: 9807 LDR R0, [SP, #28] 0x3419209A: 6D80 LDR R0, [R0, #88] 0x3419209C: 2814 CMP R0, #20 0x3419209E: D103 BNE 46L56 ; 0x341920A8 0x341920A0: 9907 LDR R1, [SP, #28] 0x341920A2: 2004 MOVS R0, #4 0x341920A4: 6588 STR R0, [R1, #88] 0x341920A6: E002 B 46L57 ; 0x341920AE
.L56: 0x341920A8: 9907 LDR R1, [SP, #28] 0x341920AA: 2024 MOVS R0, #36 0x341920AC: 6588 STR R0, [R1, #88]
.L57: 0x341920AE: E7FF B 46L58 ; 0x341920B0
.L58: 0x341920B0: E002 B 46L60 ; 0x341920B8
.L59: 0x341920B2: 2002 MOVS R0, #2 0x341920B4: F88D 0013 STRB.W R0, [SP, #19]
.L60: 0x341920B8: E005 B 46L62 ; 0x341920C6
.L61: 0x341920BA: 2001 MOVS R0, #1 0x341920BC: F88D 0013 STRB.W R0, [SP, #19] 0x341920C0: 9907 LDR R1, [SP, #28] 0x341920C2: 2010 MOVS R0, #16 0x341920C4: 65C8 STR R0, [R1, #92]
.L62: 0x341920C6: F89D 0013 LDRB.W R0, [SP, #19] 0x341920CA: B008 ADD SP, SP, #32 0x341920CC: BD80 POP 123R7, PC}

Section .init.TIM1_CC_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM1_CC_IRQHandler: 0x341920CE: E7FE B TIM1_CC_IRQHandler ; 0x341920CE

Section .text.HAL_XSPI_Transmit from blto2_FSBL_lto.o, size=226, align=4


HAL_XSPI_Transmit: 0x341920D0: B580 PUSH 123R7, LR} 0x341920D2: B088 SUB SP, SP, #32 0x341920D4: 9007 STR R0, [SP, #28] 0x341920D6: 9106 STR R1, [SP, #24] 0x341920D8: 9205 STR R2, [SP, #20] 0x341920DA: F7EF FC8B BL HAL_GetTick ; 0x341819F4 0x341920DE: 9003 STR R0, [SP, #12] 0x341920E0: 9807 LDR R0, [SP, #28] 0x341920E2: 6800 LDR R0, [R0] 0x341920E4: 3050 ADDS R0, #80 0x341920E6: 9002 STR R0, [SP, #8] 0x341920E8: 9806 LDR R0, [SP, #24] 0x341920EA: B930 CBNZ R0, .L1 ; 0x341920FA 0x341920EC: 2001 MOVS R0, #1 0x341920EE: F88D 0013 STRB.W R0, [SP, #19] 0x341920F2: 9907 LDR R1, [SP, #28] 0x341920F4: 2008 MOVS R0, #8 0x341920F6: 65C8 STR R0, [R1, #92] 0x341920F8: E057 B 46L7 ; 0x341921AA
.L1: 0x341920FA: 9807 LDR R0, [SP, #28] 0x341920FC: 6D80 LDR R0, [R0, #88] 0x341920FE: 2804 CMP R0, #4 0x34192100: D14D BNE 46L6 ; 0x3419219E 0x34192102: 9807 LDR R0, [SP, #28] 0x34192104: 6800 LDR R0, [R0] 0x34192106: 6C00 LDR R0, [R0, #64] 0x34192108: 3001 ADDS R0, #1 0x3419210A: 9907 LDR R1, [SP, #28] 0x3419210C: 64C8 STR R0, [R1, #76] 0x3419210E: 9807 LDR R0, [SP, #28] 0x34192110: 6CC0 LDR R0, [R0, #76] 0x34192112: 9907 LDR R1, [SP, #28] 0x34192114: 6488 STR R0, [R1, #72] 0x34192116: 9806 LDR R0, [SP, #24] 0x34192118: 9907 LDR R1, [SP, #28] 0x3419211A: 6448 STR R0, [R1, #68] 0x3419211C: 9807 LDR R0, [SP, #28] 0x3419211E: 6800 LDR R0, [R0] 0x34192120: 6800 LDR R0, [R0] 0x34192122: F020 5040 BIC R0, R0, #0x30000000 0x34192126: 9907 LDR R1, [SP, #28] 0x34192128: 6809 LDR R1, [R1] 0x3419212A: 6008 STR R0, [R1]
.L2: 0x3419212C: 9807 LDR R0, [SP, #28] 0x3419212E: 9B03 LDR R3, [SP, #12] 0x34192130: 9905 LDR R1, [SP, #20] 0x34192132: 466A MOV R2, SP 0x34192134: 6011 STR R1, [R2] 0x34192136: 2104 MOVS R1, #4 0x34192138: 2201 MOVS R2, #1 0x3419213A: F7F9 FADD BL XSPI_WaitFlagStateUntilTimeout ; 0x3418B6F8 0x3419213E: F88D 0013 STRB.W R0, [SP, #19] 0x34192142: F89D 0013 LDRB.W R0, [SP, #19] 0x34192146: B100 CBZ R0, .L3 ; 0x3419214A 0x34192148: E011 B 46L4 ; 0x3419216E
.L3: 0x3419214A: 9807 LDR R0, [SP, #28] 0x3419214C: 6C40 LDR R0, [R0, #68] 0x3419214E: 7800 LDRB R0, [R0] 0x34192150: 9902 LDR R1, [SP, #8] 0x34192152: 7008 STRB R0, [R1] 0x34192154: 9907 LDR R1, [SP, #28] 0x34192156: 6C48 LDR R0, [R1, #68] 0x34192158: 3001 ADDS R0, #1 0x3419215A: 6448 STR R0, [R1, #68] 0x3419215C: 9907 LDR R1, [SP, #28] 0x3419215E: 6CC8 LDR R0, [R1, #76] 0x34192160: 3801 SUBS R0, #1 0x34192162: 64C8 STR R0, [R1, #76] 0x34192164: 9807 LDR R0, [SP, #28] 0x34192166: 6CC0 LDR R0, [R0, #76] 0x34192168: B108 CBZ R0, .L4 ; 0x3419216E 0x3419216A: F02F C821 LE 46L2 ; 0x3419212C
.L4: 0x3419216E: F89D 0013 LDRB.W R0, [SP, #19] 0x34192172: B998 CBNZ R0, .L5 ; 0x3419219C 0x34192174: 9807 LDR R0, [SP, #28] 0x34192176: 9B03 LDR R3, [SP, #12] 0x34192178: 9905 LDR R1, [SP, #20] 0x3419217A: 466A MOV R2, SP 0x3419217C: 6011 STR R1, [R2] 0x3419217E: 2102 MOVS R1, #2 0x34192180: 2201 MOVS R2, #1 0x34192182: F7F9 FAB9 BL XSPI_WaitFlagStateUntilTimeout ; 0x3418B6F8 0x34192186: F88D 0013 STRB.W R0, [SP, #19] 0x3419218A: F89D 0013 LDRB.W R0, [SP, #19] 0x3419218E: B928 CBNZ R0, .L5 ; 0x3419219C 0x34192190: 9807 LDR R0, [SP, #28] 0x34192192: 6801 LDR R1, [R0] 0x34192194: 2002 MOVS R0, #2 0x34192196: 6248 STR R0, [R1, #36] 0x34192198: 9907 LDR R1, [SP, #28] 0x3419219A: 6588 STR R0, [R1, #88]
.L5: 0x3419219C: E005 B 46L7 ; 0x341921AA
.L6: 0x3419219E: 2001 MOVS R0, #1 0x341921A0: F88D 0013 STRB.W R0, [SP, #19] 0x341921A4: 9907 LDR R1, [SP, #28] 0x341921A6: 2010 MOVS R0, #16 0x341921A8: 65C8 STR R0, [R1, #92]
.L7: 0x341921AA: F89D 0013 LDRB.W R0, [SP, #19] 0x341921AE: B008 ADD SP, SP, #32 0x341921B0: BD80 POP 123R7, PC}

Section .init.TIM2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM2_IRQHandler: 0x341921B2: E7FE B TIM2_IRQHandler ; 0x341921B2

Section .text.HAL_XSPI_AutoPolling from blto2_FSBL_lto.o, size=406, align=4


HAL_XSPI_AutoPolling: 0x341921B4: B580 PUSH 123R7, LR} 0x341921B6: B08A SUB SP, SP, #40 0x341921B8: 9009 STR R0, [SP, #36] 0x341921BA: 9108 STR R1, [SP, #32] 0x341921BC: 9207 STR R2, [SP, #28] 0x341921BE: F7EF FC19 BL HAL_GetTick ; 0x341819F4 0x341921C2: 9005 STR R0, [SP, #20] 0x341921C4: 9809 LDR R0, [SP, #36] 0x341921C6: 6800 LDR R0, [R0] 0x341921C8: 6C80 LDR R0, [R0, #72] 0x341921CA: 9004 STR R0, [SP, #16] 0x341921CC: 9809 LDR R0, [SP, #36] 0x341921CE: 6800 LDR R0, [R0] 0x341921D0: F8D0 0110 LDR.W R0, [R0, #0x0110] 0x341921D4: 9003 STR R0, [SP, #12] 0x341921D6: 9809 LDR R0, [SP, #36] 0x341921D8: 6800 LDR R0, [R0] 0x341921DA: 6C00 LDR R0, [R0, #64] 0x341921DC: 9002 STR R0, [SP, #8] 0x341921DE: 9808 LDR R0, [SP, #32] 0x341921E0: 6880 LDR R0, [R0, #8] 0x341921E2: B120 CBZ R0, .L1 ; 0x341921EE 0x341921E4: 9808 LDR R0, [SP, #32] 0x341921E6: 6880 LDR R0, [R0, #8] 0x341921E8: F5B0 0F00 CMP.W R0, #0x800000 0x341921EC: D100 BNE 46L2 ; 0x341921F0
.L1: 0x341921EE: E007 B 46L3 ; 0x34192200
.L2: 0x341921F0: F244 204E MOVW R0, #0x424E ; 0x3419424E = .rodata..L.str.98 0x341921F4: F2C3 4019 MOVT R0, #0x3419 ; 0x3419424E = .rodata..L.str.98 0x341921F8: F240 7139 MOVW R1, #0x0739 0x341921FC: F7FB FD4C BL assert_failed ; 0x3418DC98
.L3: 0x34192200: 9808 LDR R0, [SP, #32] 0x34192202: 68C0 LDR R0, [R0, #12] 0x34192204: F5B0 0F80 CMP.W R0, #0x400000 0x34192208: D002 BEQ 46L4 ; 0x34192210 0x3419220A: 9808 LDR R0, [SP, #32] 0x3419220C: 68C0 LDR R0, [R0, #12] 0x3419220E: B900 CBNZ R0, .L5 ; 0x34192212
.L4: 0x34192210: E007 B 46L6 ; 0x34192222
.L5: 0x34192212: F244 204E MOVW R0, #0x424E ; 0x3419424E = .rodata..L.str.98 0x34192216: F2C3 4019 MOVT R0, #0x3419 ; 0x3419424E = .rodata..L.str.98 0x3419221A: F240 713A MOVW R1, #0x073A 0x3419221E: F7FB FD3B BL assert_failed ; 0x3418DC98
.L6: 0x34192222: 9808 LDR R0, [SP, #32] 0x34192224: 8A40 LDRH R0, [R0, #18] 0x34192226: B900 CBNZ R0, .L7 ; 0x3419222A 0x34192228: E007 B 46L8 ; 0x3419223A
.L7: 0x3419222A: F244 204E MOVW R0, #0x424E ; 0x3419424E = .rodata..L.str.98 0x3419222E: F2C3 4019 MOVT R0, #0x3419 ; 0x3419424E = .rodata..L.str.98 0x34192232: F240 713B MOVW R1, #0x073B 0x34192236: F7FB FD2F BL assert_failed ; 0x3418DC98
.L8: 0x3419223A: 9802 LDR R0, [SP, #8] 0x3419223C: 3001 ADDS R0, #1 0x3419223E: B120 CBZ R0, .L9 ; 0x3419224A 0x34192240: 9802 LDR R0, [SP, #8] 0x34192242: 3001 ADDS R0, #1 0x34192244: 2804 CMP R0, #4 0x34192246: D800 BHI 46L9 ; 0x3419224A 0x34192248: E007 B 46L10 ; 0x3419225A
.L9: 0x3419224A: F244 204E MOVW R0, #0x424E ; 0x3419424E = .rodata..L.str.98 0x3419224E: F2C3 4019 MOVT R0, #0x3419 ; 0x3419424E = .rodata..L.str.98 0x34192252: F240 713C MOVW R1, #0x073C 0x34192256: F7FB FD1F BL assert_failed ; 0x3418DC98
.L10: 0x3419225A: 9809 LDR R0, [SP, #36] 0x3419225C: 6D80 LDR R0, [R0, #88] 0x3419225E: 2804 CMP R0, #4 0x34192260: D169 BNE 46L17 ; 0x34192336 0x34192262: 9808 LDR R0, [SP, #32] 0x34192264: 68C0 LDR R0, [R0, #12] 0x34192266: F5B0 0F80 CMP.W R0, #0x400000 0x3419226A: D164 BNE 46L17 ; 0x34192336 0x3419226C: 9809 LDR R0, [SP, #36] 0x3419226E: 9B05 LDR R3, [SP, #20] 0x34192270: 9907 LDR R1, [SP, #28] 0x34192272: 466A MOV R2, SP 0x34192274: 6011 STR R1, [R2] 0x34192276: 2120 MOVS R1, #32 0x34192278: 2200 MOVS R2, #0 0x3419227A: F7F9 FA3D BL XSPI_WaitFlagStateUntilTimeout ; 0x3418B6F8 0x3419227E: F88D 001B STRB.W R0, [SP, #27] 0x34192282: F89D 001B LDRB.W R0, [SP, #27] 0x34192286: 2800 CMP R0, #0 0x34192288: D151 BNE 46L15 ; 0x3419232E 0x3419228A: 9808 LDR R0, [SP, #32] 0x3419228C: 6800 LDR R0, [R0] 0x3419228E: 9909 LDR R1, [SP, #36] 0x34192290: 6809 LDR R1, [R1] 0x34192292: F8C1 0088 STR.W R0, [R1, #136] 0x34192296: 9808 LDR R0, [SP, #32] 0x34192298: 6840 LDR R0, [R0, #4] 0x3419229A: 9909 LDR R1, [SP, #36] 0x3419229C: 6809 LDR R1, [R1] 0x3419229E: F8C1 0080 STR.W R0, [R1, #128] 0x341922A2: 9808 LDR R0, [SP, #32] 0x341922A4: 6900 LDR R0, [R0, #16] 0x341922A6: 9909 LDR R1, [SP, #36] 0x341922A8: 6809 LDR R1, [R1] 0x341922AA: F8C1 0090 STR.W R0, [R1, #144] 0x341922AE: 9809 LDR R0, [SP, #36] 0x341922B0: 6800 LDR R0, [R0] 0x341922B2: 6800 LDR R0, [R0] 0x341922B4: F020 5143 BIC R1, R0, #0x30C00000 0x341922B8: 9A08 LDR R2, [SP, #32] 0x341922BA: 6890 LDR R0, [R2, #8] 0x341922BC: 68D2 LDR R2, [R2, #12] 0x341922BE: 4310 ORRS R0, R2 0x341922C0: 4308 ORRS R0, R1 0x341922C2: F040 5000 ORR R0, R0, #0x20000000 0x341922C6: 9909 LDR R1, [SP, #36] 0x341922C8: 6809 LDR R1, [R1] 0x341922CA: 6008 STR R0, [R1] 0x341922CC: 9809 LDR R0, [SP, #36] 0x341922CE: 68C0 LDR R0, [R0, #12] 0x341922D0: F1B0 6F80 CMP.W R0, #0x04000000 0x341922D4: D104 BNE 46L11 ; 0x341922E0 0x341922D6: 9804 LDR R0, [SP, #16] 0x341922D8: 9909 LDR R1, [SP, #36] 0x341922DA: 6809 LDR R1, [R1] 0x341922DC: 6488 STR R0, [R1, #72] 0x341922DE: E010 B 46L13 ; 0x34192302
.L11: 0x341922E0: 9809 LDR R0, [SP, #36] 0x341922E2: 6800 LDR R0, [R0] 0x341922E4: F8D0 0100 LDR.W R0, [R0, #0x0100] 0x341922E8: F410 6FE0 TST R0, #0x0700 0x341922EC: D004 BEQ 46L12 ; 0x341922F8 0x341922EE: 9804 LDR R0, [SP, #16] 0x341922F0: 9909 LDR R1, [SP, #36] 0x341922F2: 6809 LDR R1, [R1] 0x341922F4: 6488 STR R0, [R1, #72] 0x341922F6: E004 B 46L13 ; 0x34192302
.L12: 0x341922F8: 9803 LDR R0, [SP, #12] 0x341922FA: 9909 LDR R1, [SP, #36] 0x341922FC: 6809 LDR R1, [R1] 0x341922FE: F8C1 0110 STR.W R0, [R1, #0x0110]
.L13: 0x34192302: 9809 LDR R0, [SP, #36] 0x34192304: 9B05 LDR R3, [SP, #20] 0x34192306: 9907 LDR R1, [SP, #28] 0x34192308: 466A MOV R2, SP 0x3419230A: 6011 STR R1, [R2] 0x3419230C: 2108 MOVS R1, #8 0x3419230E: 2201 MOVS R2, #1 0x34192310: F7F9 F9F2 BL XSPI_WaitFlagStateUntilTimeout ; 0x3418B6F8 0x34192314: F88D 001B STRB.W R0, [SP, #27] 0x34192318: F89D 001B LDRB.W R0, [SP, #27] 0x3419231C: B930 CBNZ R0, .L14 ; 0x3419232C 0x3419231E: 9809 LDR R0, [SP, #36] 0x34192320: 6801 LDR R1, [R0] 0x34192322: 2008 MOVS R0, #8 0x34192324: 6248 STR R0, [R1, #36] 0x34192326: 9909 LDR R1, [SP, #36] 0x34192328: 2002 MOVS R0, #2 0x3419232A: 6588 STR R0, [R1, #88]
.L14: 0x3419232C: E002 B 46L16 ; 0x34192334
.L15: 0x3419232E: 2002 MOVS R0, #2 0x34192330: F88D 001B STRB.W R0, [SP, #27]
.L16: 0x34192334: E005 B 46L18 ; 0x34192342
.L17: 0x34192336: 2001 MOVS R0, #1 0x34192338: F88D 001B STRB.W R0, [SP, #27] 0x3419233C: 9909 LDR R1, [SP, #36] 0x3419233E: 2010 MOVS R0, #16 0x34192340: 65C8 STR R0, [R1, #92]
.L18: 0x34192342: F89D 001B LDRB.W R0, [SP, #27] 0x34192346: B00A ADD SP, SP, #40 0x34192348: BD80 POP 123R7, PC}

Section .init.TIM3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM3_IRQHandler: 0x3419234A: E7FE B TIM3_IRQHandler ; 0x3419234A

Section .text.HAL_XSPI_MemoryMapped from blto2_FSBL_lto.o, size=330, align=4


HAL_XSPI_MemoryMapped: 0x3419234C: B580 PUSH 123R7, LR} 0x3419234E: B086 SUB SP, SP, #24 0x34192350: 9005 STR R0, [SP, #20] 0x34192352: 9104 STR R1, [SP, #16] 0x34192354: F7EF FB4E BL HAL_GetTick ; 0x341819F4 0x34192358: 9002 STR R0, [SP, #8] 0x3419235A: 9804 LDR R0, [SP, #16] 0x3419235C: 6800 LDR R0, [R0] 0x3419235E: B118 CBZ R0, .L1 ; 0x34192368 0x34192360: 9804 LDR R0, [SP, #16] 0x34192362: 6800 LDR R0, [R0] 0x34192364: 2808 CMP R0, #8 0x34192366: D100 BNE 46L2 ; 0x3419236A
.L1: 0x34192368: E007 B 46L3 ; 0x3419237A
.L2: 0x3419236A: F244 204E MOVW R0, #0x424E ; 0x3419424E = .rodata..L.str.98 0x3419236E: F2C3 4019 MOVT R0, #0x3419 ; 0x3419424E = .rodata..L.str.98 0x34192372: F240 71CD MOVW R1, #0x07CD 0x34192376: F7FB FC8F BL assert_failed ; 0x3418DC98
.L3: 0x3419237A: 9804 LDR R0, [SP, #16] 0x3419237C: 6880 LDR R0, [R0, #8] 0x3419237E: B120 CBZ R0, .L4 ; 0x3419238A 0x34192380: 9804 LDR R0, [SP, #16] 0x34192382: 6880 LDR R0, [R0, #8] 0x34192384: F1B0 7F00 CMP.W R0, #0x02000000 0x34192388: D100 BNE 46L5 ; 0x3419238C
.L4: 0x3419238A: E007 B 46L6 ; 0x3419239C
.L5: 0x3419238C: F244 204E MOVW R0, #0x424E ; 0x3419424E = .rodata..L.str.98 0x34192390: F2C3 4019 MOVT R0, #0x3419 ; 0x3419424E = .rodata..L.str.98 0x34192394: F240 71CE MOVW R1, #0x07CE 0x34192398: F7FB FC7E BL assert_failed ; 0x3418DC98
.L6: 0x3419239C: 9805 LDR R0, [SP, #20] 0x3419239E: 6D80 LDR R0, [R0, #88] 0x341923A0: 2804 CMP R0, #4 0x341923A2: D16E BNE 46L16 ; 0x34192482 0x341923A4: 9805 LDR R0, [SP, #20] 0x341923A6: 9B02 LDR R3, [SP, #8] 0x341923A8: 6E01 LDR R1, [R0, #96] 0x341923AA: 466A MOV R2, SP 0x341923AC: 6011 STR R1, [R2] 0x341923AE: 2120 MOVS R1, #32 0x341923B0: 2200 MOVS R2, #0 0x341923B2: F7F9 F9A1 BL XSPI_WaitFlagStateUntilTimeout ; 0x3418B6F8 0x341923B6: F88D 000F STRB.W R0, [SP, #15] 0x341923BA: F89D 000F LDRB.W R0, [SP, #15] 0x341923BE: 2800 CMP R0, #0 0x341923C0: D15E BNE 46L15 ; 0x34192480 0x341923C2: 9905 LDR R1, [SP, #20] 0x341923C4: 2088 MOVS R0, #136 0x341923C6: 6588 STR R0, [R1, #88] 0x341923C8: 9804 LDR R0, [SP, #16] 0x341923CA: 6880 LDR R0, [R0, #8] 0x341923CC: F1B0 7F00 CMP.W R0, #0x02000000 0x341923D0: D10B BNE 46L7 ; 0x341923EA 0x341923D2: 9805 LDR R0, [SP, #20] 0x341923D4: 6800 LDR R0, [R0] 0x341923D6: 6800 LDR R0, [R0] 0x341923D8: F020 7000 BIC R0, R0, #0x02000000 0x341923DC: 9904 LDR R1, [SP, #16] 0x341923DE: 6889 LDR R1, [R1, #8] 0x341923E0: 4308 ORRS R0, R1 0x341923E2: 9905 LDR R1, [SP, #20] 0x341923E4: 6809 LDR R1, [R1] 0x341923E6: 6008 STR R0, [R1] 0x341923E8: E01D B 46L11 ; 0x34192426
.L7: 0x341923EA: 9804 LDR R0, [SP, #16] 0x341923EC: 68C0 LDR R0, [R0, #12] 0x341923EE: B120 CBZ R0, .L8 ; 0x341923FA 0x341923F0: 9804 LDR R0, [SP, #16] 0x341923F2: 68C0 LDR R0, [R0, #12] 0x341923F4: F1B0 6F80 CMP.W R0, #0x04000000 0x341923F8: D100 BNE 46L9 ; 0x341923FC
.L8: 0x341923FA: E007 B 46L10 ; 0x3419240C
.L9: 0x341923FC: F244 204E MOVW R0, #0x424E ; 0x3419424E = .rodata..L.str.98 0x34192400: F2C3 4019 MOVT R0, #0x3419 ; 0x3419424E = .rodata..L.str.98 0x34192404: F240 71E2 MOVW R1, #0x07E2 0x34192408: F7FB FC46 BL assert_failed ; 0x3418DC98
.L10: 0x3419240C: 9805 LDR R0, [SP, #20] 0x3419240E: 6800 LDR R0, [R0] 0x34192410: 6800 LDR R0, [R0] 0x34192412: F020 60C0 BIC R0, R0, #0x06000000 0x34192416: 9A04 LDR R2, [SP, #16] 0x34192418: 6891 LDR R1, [R2, #8] 0x3419241A: 68D2 LDR R2, [R2, #12] 0x3419241C: 4311 ORRS R1, R2 0x3419241E: 4308 ORRS R0, R1 0x34192420: 9905 LDR R1, [SP, #20] 0x34192422: 6809 LDR R1, [R1] 0x34192424: 6008 STR R0, [R1]
.L11: 0x34192426: 9804 LDR R0, [SP, #16] 0x34192428: 6800 LDR R0, [R0] 0x3419242A: 2808 CMP R0, #8 0x3419242C: D11B BNE 46L14 ; 0x34192466 0x3419242E: 9804 LDR R0, [SP, #16] 0x34192430: 88C0 LDRH R0, [R0, #6] 0x34192432: B900 CBNZ R0, .L12 ; 0x34192436 0x34192434: E007 B 46L13 ; 0x34192446
.L12: 0x34192436: F244 204E MOVW R0, #0x424E ; 0x3419424E = .rodata..L.str.98 0x3419243A: F2C3 4019 MOVT R0, #0x3419 ; 0x3419424E = .rodata..L.str.98 0x3419243E: F240 71EA MOVW R1, #0x07EA 0x34192442: F7FB FC29 BL assert_failed ; 0x3418DC98
.L13: 0x34192446: 9804 LDR R0, [SP, #16] 0x34192448: 6840 LDR R0, [R0, #4] 0x3419244A: 9905 LDR R1, [SP, #20] 0x3419244C: 6809 LDR R1, [R1] 0x3419244E: F8C1 0130 STR.W R0, [R1, #0x0130] 0x34192452: 9805 LDR R0, [SP, #20] 0x34192454: 6801 LDR R1, [R0] 0x34192456: 2010 MOVS R0, #16 0x34192458: 6248 STR R0, [R1, #36] 0x3419245A: 9805 LDR R0, [SP, #20] 0x3419245C: 6801 LDR R1, [R0] 0x3419245E: 6808 LDR R0, [R1] 0x34192460: F440 1080 ORR R0, R0, #0x100000 0x34192464: 6008 STR R0, [R1]
.L14: 0x34192466: 9805 LDR R0, [SP, #20] 0x34192468: 6800 LDR R0, [R0] 0x3419246A: 6800 LDR R0, [R0] 0x3419246C: F020 0108 BIC R1, R0, #8 0x34192470: 9804 LDR R0, [SP, #16] 0x34192472: 6800 LDR R0, [R0] 0x34192474: 4308 ORRS R0, R1 0x34192476: F040 5040 ORR R0, R0, #0x30000000 0x3419247A: 9905 LDR R1, [SP, #20] 0x3419247C: 6809 LDR R1, [R1] 0x3419247E: 6008 STR R0, [R1]
.L15: 0x34192480: E005 B 46L17 ; 0x3419248E
.L16: 0x34192482: 2001 MOVS R0, #1 0x34192484: F88D 000F STRB.W R0, [SP, #15] 0x34192488: 9905 LDR R1, [SP, #20] 0x3419248A: 2010 MOVS R0, #16 0x3419248C: 65C8 STR R0, [R1, #92]
.L17: 0x3419248E: F89D 000F LDRB.W R0, [SP, #15] 0x34192492: B006 ADD SP, SP, #24 0x34192494: BD80 POP 123R7, PC}

Section .init.TIM4_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM4_IRQHandler: 0x34192496: E7FE B TIM4_IRQHandler ; 0x34192496

Section .text.HAL_XSPI_Abort from blto2_FSBL_lto.o, size=246, align=4


HAL_XSPI_Abort: 0x34192498: B580 PUSH 123R7, LR} 0x3419249A: B084 SUB SP, SP, #16 0x3419249C: 9003 STR R0, [SP, #12] 0x3419249E: 2000 MOVS R0, #0 0x341924A0: F88D 000B STRB.W R0, [SP, #11] 0x341924A4: F7EF FAA6 BL HAL_GetTick ; 0x341819F4 0x341924A8: 9001 STR R0, [SP, #4] 0x341924AA: 9803 LDR R0, [SP, #12] 0x341924AC: 6D80 LDR R0, [R0, #88] 0x341924AE: 2800 CMP R0, #0 0x341924B0: D063 BEQ 46L6 ; 0x3419257A 0x341924B2: 9803 LDR R0, [SP, #12] 0x341924B4: 6800 LDR R0, [R0] 0x341924B6: 6800 LDR R0, [R0] 0x341924B8: 0740 LSLS R0, R0, #29 0x341924BA: 2800 CMP R0, #0 0x341924BC: D51D BPL 46L2 ; 0x341924FA 0x341924BE: 9803 LDR R0, [SP, #12] 0x341924C0: 6801 LDR R1, [R0] 0x341924C2: 6808 LDR R0, [R1] 0x341924C4: F020 0004 BIC R0, R0, #4 0x341924C8: 6008 STR R0, [R1] 0x341924CA: 9803 LDR R0, [SP, #12] 0x341924CC: 6D00 LDR R0, [R0, #80] 0x341924CE: F7EF FB89 BL HAL_DMA_Abort ; 0x34181BE4 0x341924D2: F88D 000B STRB.W R0, [SP, #11] 0x341924D6: F89D 000B LDRB.W R0, [SP, #11] 0x341924DA: B110 CBZ R0, .L1 ; 0x341924E2 0x341924DC: 9903 LDR R1, [SP, #12] 0x341924DE: 2004 MOVS R0, #4 0x341924E0: 65C8 STR R0, [R1, #92]
.L1: 0x341924E2: 9803 LDR R0, [SP, #12] 0x341924E4: 6D40 LDR R0, [R0, #84] 0x341924E6: F7EF FB7D BL HAL_DMA_Abort ; 0x34181BE4 0x341924EA: F88D 000B STRB.W R0, [SP, #11] 0x341924EE: F89D 000B LDRB.W R0, [SP, #11] 0x341924F2: B110 CBZ R0, .L2 ; 0x341924FA 0x341924F4: 9903 LDR R1, [SP, #12] 0x341924F6: 2004 MOVS R0, #4 0x341924F8: 65C8 STR R0, [R1, #92]
.L2: 0x341924FA: 9803 LDR R0, [SP, #12] 0x341924FC: 6800 LDR R0, [R0] 0x341924FE: 6A00 LDR R0, [R0, #32] 0x34192500: 0680 LSLS R0, R0, #26 0x34192502: 2800 CMP R0, #0 0x34192504: D52F BPL 46L4 ; 0x34192566 0x34192506: 9803 LDR R0, [SP, #12] 0x34192508: 6801 LDR R1, [R0] 0x3419250A: 6808 LDR R0, [R1] 0x3419250C: F040 0002 ORR R0, R0, #2 0x34192510: 6008 STR R0, [R1] 0x34192512: 9803 LDR R0, [SP, #12] 0x34192514: 9B01 LDR R3, [SP, #4] 0x34192516: 6E01 LDR R1, [R0, #96] 0x34192518: 466A MOV R2, SP 0x3419251A: 6011 STR R1, [R2] 0x3419251C: 2102 MOVS R1, #2 0x3419251E: 2201 MOVS R2, #1 0x34192520: F7F9 F8EA BL XSPI_WaitFlagStateUntilTimeout ; 0x3418B6F8 0x34192524: F88D 000B STRB.W R0, [SP, #11] 0x34192528: F89D 000B LDRB.W R0, [SP, #11] 0x3419252C: B9D0 CBNZ R0, .L3 ; 0x34192564 0x3419252E: 9803 LDR R0, [SP, #12] 0x34192530: 6801 LDR R1, [R0] 0x34192532: 2002 MOVS R0, #2 0x34192534: 6248 STR R0, [R1, #36] 0x34192536: 9803 LDR R0, [SP, #12] 0x34192538: 9B01 LDR R3, [SP, #4] 0x3419253A: 6E01 LDR R1, [R0, #96] 0x3419253C: 466A MOV R2, SP 0x3419253E: 6011 STR R1, [R2] 0x34192540: 2120 MOVS R1, #32 0x34192542: 2200 MOVS R2, #0 0x34192544: F7F9 F8D8 BL XSPI_WaitFlagStateUntilTimeout ; 0x3418B6F8 0x34192548: F88D 000B STRB.W R0, [SP, #11] 0x3419254C: F89D 000B LDRB.W R0, [SP, #11] 0x34192550: B940 CBNZ R0, .L3 ; 0x34192564 0x34192552: 9803 LDR R0, [SP, #12] 0x34192554: 6801 LDR R1, [R0] 0x34192556: 6808 LDR R0, [R1] 0x34192558: F020 5040 BIC R0, R0, #0x30000000 0x3419255C: 6008 STR R0, [R1] 0x3419255E: 9903 LDR R1, [SP, #12] 0x34192560: 2002 MOVS R0, #2 0x34192562: 6588 STR R0, [R1, #88]
.L3: 0x34192564: E008 B 46L5 ; 0x34192578
.L4: 0x34192566: 9803 LDR R0, [SP, #12] 0x34192568: 6801 LDR R1, [R0] 0x3419256A: 6808 LDR R0, [R1] 0x3419256C: F020 5040 BIC R0, R0, #0x30000000 0x34192570: 6008 STR R0, [R1] 0x34192572: 9903 LDR R1, [SP, #12] 0x34192574: 2002 MOVS R0, #2 0x34192576: 6588 STR R0, [R1, #88]
.L5: 0x34192578: E005 B 46L7 ; 0x34192586
.L6: 0x3419257A: 2001 MOVS R0, #1 0x3419257C: F88D 000B STRB.W R0, [SP, #11] 0x34192580: 9903 LDR R1, [SP, #12] 0x34192582: 2010 MOVS R0, #16 0x34192584: 65C8 STR R0, [R1, #92]
.L7: 0x34192586: F89D 000B LDRB.W R0, [SP, #11] 0x3419258A: B004 ADD SP, SP, #16 0x3419258C: BD80 POP 123R7, PC}

Section .init.TIM5_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM5_IRQHandler: 0x3419258E: E7FE B TIM5_IRQHandler ; 0x3419258E

Section .text.HAL_XSPIM_Config from blto2_FSBL_lto.o, size=878, align=4


HAL_XSPIM_Config: 0x34192590: B580 PUSH 123R7, LR} 0x34192592: B092 SUB SP, SP, #72 0x34192594: 9010 STR R0, [SP, #64] 0x34192596: 910F STR R1, [SP, #60] 0x34192598: 920E STR R2, [SP, #56] 0x3419259A: 2000 MOVS R0, #0 0x3419259C: F88D 0037 STRB.W R0, [SP, #55] 0x341925A0: F88D 0035 STRB.W R0, [SP, #53] 0x341925A4: A804 ADD R0, SP, #16 0x341925A6: 2124 MOVS R1, #36 0x341925A8: F7FB F9A2 BL __aeabi_memclr ; 0x3418D8F0 0x341925AC: 980F LDR R0, [SP, #60] 0x341925AE: 6800 LDR R0, [R0] 0x341925B0: B138 CBZ R0, .L1 ; 0x341925C2 0x341925B2: 980F LDR R0, [SP, #60] 0x341925B4: 6800 LDR R0, [R0] 0x341925B6: 2810 CMP R0, #16 0x341925B8: D003 BEQ 46L1 ; 0x341925C2 0x341925BA: 980F LDR R0, [SP, #60] 0x341925BC: 6800 LDR R0, [R0] 0x341925BE: 2870 CMP R0, #112 0x341925C0: D100 BNE 46L2 ; 0x341925C4
.L1: 0x341925C2: E007 B 46L3 ; 0x341925D4
.L2: 0x341925C4: F244 204E MOVW R0, #0x424E ; 0x3419424E = .rodata..L.str.98 0x341925C8: F2C3 4019 MOVT R0, #0x3419 ; 0x3419424E = .rodata..L.str.98 0x341925CC: F640 310D MOVW R1, #0x0B0D 0x341925D0: F7FB FB62 BL assert_failed ; 0x3418DC98
.L3: 0x341925D4: 980F LDR R0, [SP, #60] 0x341925D6: 6840 LDR R0, [R0, #4] 0x341925D8: B118 CBZ R0, .L4 ; 0x341925E2 0x341925DA: 980F LDR R0, [SP, #60] 0x341925DC: 6840 LDR R0, [R0, #4] 0x341925DE: 2801 CMP R0, #1 0x341925E0: D100 BNE 46L5 ; 0x341925E4
.L4: 0x341925E2: E007 B 46L6 ; 0x341925F4
.L5: 0x341925E4: F244 204E MOVW R0, #0x424E ; 0x3419424E = .rodata..L.str.98 0x341925E8: F2C3 4019 MOVT R0, #0x3419 ; 0x3419424E = .rodata..L.str.98 0x341925EC: F640 310E MOVW R1, #0x0B0E 0x341925F0: F7FB FB52 BL assert_failed ; 0x3418DC98
.L6: 0x341925F4: 980F LDR R0, [SP, #60] 0x341925F6: 6880 LDR R0, [R0, #8] 0x341925F8: B128 CBZ R0, .L7 ; 0x34192606 0x341925FA: 980F LDR R0, [SP, #60] 0x341925FC: 6880 LDR R0, [R0, #8] 0x341925FE: F5B0 7F80 CMP.W R0, #0x0100 0x34192602: D800 BHI 46L7 ; 0x34192606 0x34192604: E007 B 46L8 ; 0x34192616
.L7: 0x34192606: F244 204E MOVW R0, #0x424E ; 0x3419424E = .rodata..L.str.98 0x3419260A: F2C3 4019 MOVT R0, #0x3419 ; 0x3419424E = .rodata..L.str.98 0x3419260E: F640 310F MOVW R1, #0x0B0F 0x34192612: F7FB FB41 BL assert_failed ; 0x3418DC98
.L8: 0x34192616: 2000 MOVS R0, #0 0x34192618: F88D 0036 STRB.W R0, [SP, #54]
.L9: 0x3419261C: F89D 0036 LDRB.W R0, [SP, #54] 0x34192620: 2802 CMP R0, #2 0x34192622: D810 BHI 46L10 ; 0x34192646 0x34192624: F89D 1036 LDRB.W R1, [SP, #54] 0x34192628: 1C48 ADDS R0, R1, #1 0x3419262A: EB01 0241 ADD.W R2, R1, R1, LSL #1 0x3419262E: A904 ADD R1, SP, #16 0x34192630: EB01 0182 ADD.W R1, R1, R2, LSL #2 0x34192634: B2C0 UXTB R0, R0 0x34192636: F000 F963 BL XSPIM_GetConfig ; 0x34192900 0x3419263A: F89D 0036 LDRB.W R0, [SP, #54] 0x3419263E: 3001 ADDS R0, #1 0x34192640: F88D 0036 STRB.W R0, [SP, #54] 0x34192644: E7EA B 46L9 ; 0x3419261C
.L10: 0x34192646: 2020 MOVS R0, #32 0x34192648: F7F9 FAEE BL LL_AHB5_GRP1_IsEnabledClock ; 0x3418BC28 0x3419264C: B1A0 CBZ R0, .L11 ; 0x34192678 0x3419264E: F245 0000 MOVW R0, #0x5000 0x34192652: F6C5 0002 MOVT R0, #0x5802 0x34192656: 6800 LDR R0, [R0] 0x34192658: 07C0 LSLS R0, R0, #31 0x3419265A: B168 CBZ R0, .L11 ; 0x34192678 0x3419265C: F245 0100 MOVW R1, #0x5000 0x34192660: F6C5 0102 MOVT R1, #0x5802 0x34192664: 6808 LDR R0, [R1] 0x34192666: F020 0001 BIC R0, R0, #1 0x3419266A: 6008 STR R0, [R1] 0x3419266C: F89D 0035 LDRB.W R0, [SP, #53] 0x34192670: F040 0001 ORR R0, R0, #1 0x34192674: F88D 0035 STRB.W R0, [SP, #53]
.L11: 0x34192678: F44F 5080 MOV.W R0, #0x1000 0x3419267C: F7F9 FAD4 BL LL_AHB5_GRP1_IsEnabledClock ; 0x3418BC28 0x34192680: B1A0 CBZ R0, .L12 ; 0x341926AC 0x34192682: F24A 0000 MOVW R0, #0xA000 0x34192686: F6C5 0002 MOVT R0, #0x5802 0x3419268A: 6800 LDR R0, [R0] 0x3419268C: 07C0 LSLS R0, R0, #31 0x3419268E: B168 CBZ R0, .L12 ; 0x341926AC 0x34192690: F24A 0100 MOVW R1, #0xA000 0x34192694: F6C5 0102 MOVT R1, #0x5802 0x34192698: 6808 LDR R0, [R1] 0x3419269A: F020 0001 BIC R0, R0, #1 0x3419269E: 6008 STR R0, [R1] 0x341926A0: F89D 0035 LDRB.W R0, [SP, #53] 0x341926A4: F040 0002 ORR R0, R0, #2 0x341926A8: F88D 0035 STRB.W R0, [SP, #53]
.L12: 0x341926AC: F44F 3000 MOV.W R0, #0x020000 0x341926B0: F7F9 FABA BL LL_AHB5_GRP1_IsEnabledClock ; 0x3418BC28 0x341926B4: B1A0 CBZ R0, .L13 ; 0x341926E0 0x341926B6: F24D 0000 MOVW R0, #0xD000 0x341926BA: F6C5 0002 MOVT R0, #0x5802 0x341926BE: 6800 LDR R0, [R0] 0x341926C0: 07C0 LSLS R0, R0, #31 0x341926C2: B168 CBZ R0, .L13 ; 0x341926E0 0x341926C4: F24D 0100 MOVW R1, #0xD000 0x341926C8: F6C5 0102 MOVT R1, #0x5802 0x341926CC: 6808 LDR R0, [R1] 0x341926CE: F020 0001 BIC R0, R0, #1 0x341926D2: 6008 STR R0, [R1] 0x341926D4: F89D 0035 LDRB.W R0, [SP, #53] 0x341926D8: F040 0004 ORR R0, R0, #4 0x341926DC: F88D 0035 STRB.W R0, [SP, #53]
.L13: 0x341926E0: 9810 LDR R0, [SP, #64] 0x341926E2: 6800 LDR R0, [R0] 0x341926E4: F245 0100 MOVW R1, #0x5000 0x341926E8: F6C5 0102 MOVT R1, #0x5802 0x341926EC: 4288 CMP R0, R1 0x341926EE: D103 BNE 46L14 ; 0x341926F8 0x341926F0: 980F LDR R0, [SP, #60] 0x341926F2: 6840 LDR R0, [R0, #4] 0x341926F4: 9005 STR R0, [SP, #20] 0x341926F6: E02C B 46L19 ; 0x34192752
.L14: 0x341926F8: 9810 LDR R0, [SP, #64] 0x341926FA: 6800 LDR R0, [R0] 0x341926FC: F24A 0100 MOVW R1, #0xA000 0x34192700: F6C5 0102 MOVT R1, #0x5802 0x34192704: 4288 CMP R0, R1 0x34192706: D103 BNE 46L15 ; 0x34192710 0x34192708: 980F LDR R0, [SP, #60] 0x3419270A: 6840 LDR R0, [R0, #4] 0x3419270C: 9008 STR R0, [SP, #32] 0x3419270E: E020 B 46L19 ; 0x34192752
.L15: 0x34192710: 9810 LDR R0, [SP, #64] 0x34192712: 6800 LDR R0, [R0] 0x34192714: F24D 0100 MOVW R1, #0xD000 0x34192718: F6C5 0102 MOVT R1, #0x5802 0x3419271C: 4288 CMP R0, R1 0x3419271E: D10F BNE 46L18 ; 0x34192740 0x34192720: 980F LDR R0, [SP, #60] 0x34192722: 6840 LDR R0, [R0, #4] 0x34192724: B918 CBNZ R0, .L16 ; 0x3419272E 0x34192726: 2001 MOVS R0, #1 0x34192728: 9005 STR R0, [SP, #20] 0x3419272A: 9008 STR R0, [SP, #32] 0x3419272C: E007 B 46L17 ; 0x3419273E
.L16: 0x3419272E: 980F LDR R0, [SP, #60] 0x34192730: 6840 LDR R0, [R0, #4] 0x34192732: 2801 CMP R0, #1 0x34192734: D103 BNE 46L17 ; 0x3419273E 0x34192736: 2000 MOVS R0, #0 0x34192738: 9005 STR R0, [SP, #20] 0x3419273A: 9008 STR R0, [SP, #32] 0x3419273C: E7FF B 46L17 ; 0x3419273E
.L17: 0x3419273E: E008 B 46L19 ; 0x34192752
.L18: 0x34192740: 9910 LDR R1, [SP, #64] 0x34192742: 6DC8 LDR R0, [R1, #92] 0x34192744: F040 0008 ORR R0, R0, #8 0x34192748: 65C8 STR R0, [R1, #92] 0x3419274A: 2001 MOVS R0, #1 0x3419274C: F88D 0047 STRB.W R0, [SP, #71] 0x34192750: E0D1 B 46L41 ; 0x341928F6
.L19: 0x34192752: F24B 4000 MOVW R0, #0xB400 0x34192756: F6C5 0002 MOVT R0, #0x5802 0x3419275A: 6800 LDR R0, [R0] 0x3419275C: 9003 STR R0, [SP, #12] 0x3419275E: F89D 000C LDRB.W R0, [SP, #12] 0x34192762: 06C0 LSLS R0, R0, #27 0x34192764: 2800 CMP R0, #0 0x34192766: D514 BPL 46L24 ; 0x34192792 0x34192768: F89D 000C LDRB.W R0, [SP, #12] 0x3419276C: 0680 LSLS R0, R0, #26 0x3419276E: 2800 CMP R0, #0 0x34192770: D502 BPL 46L20 ; 0x34192778 0x34192772: 2070 MOVS R0, #112 0x34192774: 9002 STR R0, [SP, #8] 0x34192776: E001 B 46L21 ; 0x3419277C
.L20: 0x34192778: 2010 MOVS R0, #16 0x3419277A: 9002 STR R0, [SP, #8]
.L21: 0x3419277C: F89D 000C LDRB.W R0, [SP, #12] 0x34192780: 0640 LSLS R0, R0, #25 0x34192782: 2800 CMP R0, #0 0x34192784: D502 BPL 46L22 ; 0x3419278C 0x34192786: 2070 MOVS R0, #112 0x34192788: 9001 STR R0, [SP, #4] 0x3419278A: E001 B 46L23 ; 0x34192790
.L22: 0x3419278C: 2010 MOVS R0, #16 0x3419278E: 9001 STR R0, [SP, #4]
.L23: 0x34192790: E002 B 46L25 ; 0x34192798
.L24: 0x34192792: 2000 MOVS R0, #0 0x34192794: 9002 STR R0, [SP, #8] 0x34192796: 9001 STR R0, [SP, #4]
.L25: 0x34192798: F24B 4100 MOVW R1, #0xB400 0x3419279C: F6C5 0102 MOVT R1, #0x5802 0x341927A0: 2000 MOVS R0, #0 0x341927A2: 6008 STR R0, [R1] 0x341927A4: 6808 LDR R0, [R1] 0x341927A6: F420 007F BIC R0, R0, #0xFF0000 0x341927AA: 9A0F LDR R2, [SP, #60] 0x341927AC: 6893 LDR R3, [R2, #8] 0x341927AE: 2200 MOVS R2, #0 0x341927B0: F6CF 72FF MOVT R2, #0xFFFF 0x341927B4: EB02 4203 ADD.W R2, R2, R3, LSL #16 0x341927B8: 4310 ORRS R0, R2 0x341927BA: 6008 STR R0, [R1] 0x341927BC: 9810 LDR R0, [SP, #64] 0x341927BE: 6800 LDR R0, [R0] 0x341927C0: F245 0100 MOVW R1, #0x5000 0x341927C4: F6C5 0102 MOVT R1, #0x5802 0x341927C8: 4288 CMP R0, R1 0x341927CA: D103 BNE 46L26 ; 0x341927D4 0x341927CC: 980F LDR R0, [SP, #60] 0x341927CE: 6800 LDR R0, [R0] 0x341927D0: 9002 STR R0, [SP, #8] 0x341927D2: E00B B 46L27 ; 0x341927EC
.L26: 0x341927D4: 9810 LDR R0, [SP, #64] 0x341927D6: 6800 LDR R0, [R0] 0x341927D8: F24A 0100 MOVW R1, #0xA000 0x341927DC: F6C5 0102 MOVT R1, #0x5802 0x341927E0: 4288 CMP R0, R1 0x341927E2: D103 BNE 46L27 ; 0x341927EC 0x341927E4: 980F LDR R0, [SP, #60] 0x341927E6: 6800 LDR R0, [R0] 0x341927E8: 9001 STR R0, [SP, #4] 0x341927EA: E7FF B 46L27 ; 0x341927EC
.L27: 0x341927EC: 2000 MOVS R0, #0 0x341927EE: 9000 STR R0, [SP, #0] 0x341927F0: 9802 LDR R0, [SP, #8] 0x341927F2: B908 CBNZ R0, .L28 ; 0x341927F8 0x341927F4: 9801 LDR R0, [SP, #4] 0x341927F6: B110 CBZ R0, .L29 ; 0x341927FE
.L28: 0x341927F8: 2010 MOVS R0, #16 0x341927FA: 9000 STR R0, [SP, #0] 0x341927FC: E002 B 46L30 ; 0x34192804
.L29: 0x341927FE: 2010 MOVS R0, #16 0x34192800: 9002 STR R0, [SP, #8] 0x34192802: 9001 STR R0, [SP, #4]
.L30: 0x34192804: 9803 LDR R0, [SP, #12] 0x34192806: F020 0070 BIC R0, R0, #112 0x3419280A: 9003 STR R0, [SP, #12] 0x3419280C: 9800 LDR R0, [SP, #0] 0x3419280E: 2810 CMP R0, #16 0x34192810: D103 BNE 46L31 ; 0x3419281A 0x34192812: 9803 LDR R0, [SP, #12] 0x34192814: F040 0010 ORR R0, R0, #16 0x34192818: 9003 STR R0, [SP, #12]
.L31: 0x3419281A: 9802 LDR R0, [SP, #8] 0x3419281C: 2870 CMP R0, #112 0x3419281E: D103 BNE 46L32 ; 0x34192828 0x34192820: 9803 LDR R0, [SP, #12] 0x34192822: F040 0020 ORR R0, R0, #32 0x34192826: 9003 STR R0, [SP, #12]
.L32: 0x34192828: 9801 LDR R0, [SP, #4] 0x3419282A: 2870 CMP R0, #112 0x3419282C: D103 BNE 46L33 ; 0x34192836 0x3419282E: 9803 LDR R0, [SP, #12] 0x34192830: F040 0040 ORR R0, R0, #64 0x34192834: 9003 STR R0, [SP, #12]
.L33: 0x34192836: F24B 4100 MOVW R1, #0xB400 0x3419283A: F6C5 0102 MOVT R1, #0x5802 0x3419283E: 6808 LDR R0, [R1] 0x34192840: 9A03 LDR R2, [SP, #12] 0x34192842: 0912 LSRS R2, R2, #4 0x34192844: F362 1006 BFI R0, R2, #4, #3 0x34192848: 6008 STR R0, [R1] 0x3419284A: 2000 MOVS R0, #0 0x3419284C: F88D 0036 STRB.W R0, [SP, #54]
.L34: 0x34192850: F89D 0036 LDRB.W R0, [SP, #54] 0x34192854: BB28 CBNZ R0, .L37 ; 0x341928A2 0x34192856: F89D 0036 LDRB.W R0, [SP, #54] 0x3419285A: EB00 0140 ADD.W R1, R0, R0, LSL #1 0x3419285E: A804 ADD R0, SP, #16 0x34192860: EB00 0181 ADD.W R1, R0, R1, LSL #2 0x34192864: 6848 LDR R0, [R1, #4] 0x34192866: 6909 LDR R1, [R1, #16] 0x34192868: 4288 CMP R0, R1 0x3419286A: D108 BNE 46L35 ; 0x3419287E 0x3419286C: F24B 4100 MOVW R1, #0xB400 0x34192870: F6C5 0102 MOVT R1, #0x5802 0x34192874: 6808 LDR R0, [R1] 0x34192876: F040 0001 ORR R0, R0, #1 0x3419287A: 6008 STR R0, [R1] 0x3419287C: E7FF B 46L35 ; 0x3419287E
.L35: 0x3419287E: 9805 LDR R0, [SP, #20] 0x34192880: 2801 CMP R0, #1 0x34192882: D108 BNE 46L36 ; 0x34192896 0x34192884: F24B 4100 MOVW R1, #0xB400 0x34192888: F6C5 0102 MOVT R1, #0x5802 0x3419288C: 6808 LDR R0, [R1] 0x3419288E: F040 0002 ORR R0, R0, #2 0x34192892: 6008 STR R0, [R1] 0x34192894: E7FF B 46L36 ; 0x34192896
.L36: 0x34192896: F89D 0036 LDRB.W R0, [SP, #54] 0x3419289A: 3001 ADDS R0, #1 0x3419289C: F88D 0036 STRB.W R0, [SP, #54] 0x341928A0: E7D6 B 46L34 ; 0x34192850
.L37: 0x341928A2: F89D 0035 LDRB.W R0, [SP, #53] 0x341928A6: 07C0 LSLS R0, R0, #31 0x341928A8: B138 CBZ R0, .L38 ; 0x341928BA 0x341928AA: F245 0100 MOVW R1, #0x5000 0x341928AE: F6C5 0102 MOVT R1, #0x5802 0x341928B2: 6808 LDR R0, [R1] 0x341928B4: F040 0001 ORR R0, R0, #1 0x341928B8: 6008 STR R0, [R1]
.L38: 0x341928BA: F89D 0035 LDRB.W R0, [SP, #53] 0x341928BE: 0780 LSLS R0, R0, #30 0x341928C0: 2800 CMP R0, #0 0x341928C2: D507 BPL 46L39 ; 0x341928D4 0x341928C4: F24A 0100 MOVW R1, #0xA000 0x341928C8: F6C5 0102 MOVT R1, #0x5802 0x341928CC: 6808 LDR R0, [R1] 0x341928CE: F040 0001 ORR R0, R0, #1 0x341928D2: 6008 STR R0, [R1]
.L39: 0x341928D4: F89D 0035 LDRB.W R0, [SP, #53] 0x341928D8: 0740 LSLS R0, R0, #29 0x341928DA: 2800 CMP R0, #0 0x341928DC: D507 BPL 46L40 ; 0x341928EE 0x341928DE: F24D 0100 MOVW R1, #0xD000 0x341928E2: F6C5 0102 MOVT R1, #0x5802 0x341928E6: 6808 LDR R0, [R1] 0x341928E8: F040 0001 ORR R0, R0, #1 0x341928EC: 6008 STR R0, [R1]
.L40: 0x341928EE: F89D 0037 LDRB.W R0, [SP, #55] 0x341928F2: F88D 0047 STRB.W R0, [SP, #71]
.L41: 0x341928F6: F89D 0047 LDRB.W R0, [SP, #71] 0x341928FA: B012 ADD SP, SP, #72 0x341928FC: BD80 POP 123R7, PC}

Section .init.TIM6_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM6_IRQHandler: 0x341928FE: E7FE B TIM6_IRQHandler ; 0x341928FE

Section .text.XSPIM_GetConfig from blto2_FSBL_lto.o, size=210, align=4


XSPIM_GetConfig: 0x34192900: B084 SUB SP, SP, #16 0x34192902: F88D 000F STRB.W R0, [SP, #15] 0x34192906: 9102 STR R1, [SP, #8] 0x34192908: F89D 000F LDRB.W R0, [SP, #15] 0x3419290C: 2801 CMP R0, #1 0x3419290E: D12B BNE 46L6 ; 0x34192968 0x34192910: F24B 4000 MOVW R0, #0xB400 0x34192914: F6C5 0002 MOVT R0, #0x5802 0x34192918: 6800 LDR R0, [R0] 0x3419291A: 0780 LSLS R0, R0, #30 0x3419291C: 2800 CMP R0, #0 0x3419291E: D403 BMI 46L1 ; 0x34192928 0x34192920: 9902 LDR R1, [SP, #8] 0x34192922: 2000 MOVS R0, #0 0x34192924: 6048 STR R0, [R1, #4] 0x34192926: E002 B 46L2 ; 0x3419292E
.L1: 0x34192928: 9902 LDR R1, [SP, #8] 0x3419292A: 2001 MOVS R0, #1 0x3419292C: 6048 STR R0, [R1, #4]
.L2: 0x3419292E: F24B 4000 MOVW R0, #0xB400 0x34192932: F6C5 0002 MOVT R0, #0x5802 0x34192936: 6800 LDR R0, [R0] 0x34192938: F000 0010 AND R0, R0, #16 0x3419293C: 2810 CMP R0, #16 0x3419293E: D003 BEQ 46L3 ; 0x34192948 0x34192940: 9902 LDR R1, [SP, #8] 0x34192942: 2000 MOVS R0, #0 0x34192944: 6008 STR R0, [R1] 0x34192946: E00E B 46L5 ; 0x34192966
.L3: 0x34192948: F24B 4000 MOVW R0, #0xB400 0x3419294C: F6C5 0002 MOVT R0, #0x5802 0x34192950: 6800 LDR R0, [R0] 0x34192952: 0680 LSLS R0, R0, #26 0x34192954: 2800 CMP R0, #0 0x34192956: D503 BPL 46L4 ; 0x34192960 0x34192958: 9902 LDR R1, [SP, #8] 0x3419295A: 2070 MOVS R0, #112 0x3419295C: 6008 STR R0, [R1] 0x3419295E: E002 B 46L5 ; 0x34192966
.L4: 0x34192960: 9902 LDR R1, [SP, #8] 0x34192962: 2010 MOVS R0, #16 0x34192964: 6008 STR R0, [R1]
.L5: 0x34192966: E032 B 46L11 ; 0x341929CE
.L6: 0x34192968: F24B 4000 MOVW R0, #0xB400 0x3419296C: F6C5 0002 MOVT R0, #0x5802 0x34192970: 6801 LDR R1, [R0] 0x34192972: F001 0101 AND R1, R1, #1 0x34192976: 9101 STR R1, [SP, #4] 0x34192978: 6800 LDR R0, [R0] 0x3419297A: F3C0 0040 UBFX R0, R0, #1, #1 0x3419297E: 9000 STR R0, [SP, #0] 0x34192980: 9801 LDR R0, [SP, #4] 0x34192982: 9900 LDR R1, [SP, #0] 0x34192984: 4288 CMP R0, R1 0x34192986: D003 BEQ 46L7 ; 0x34192990 0x34192988: 9902 LDR R1, [SP, #8] 0x3419298A: 2000 MOVS R0, #0 0x3419298C: 6048 STR R0, [R1, #4] 0x3419298E: E002 B 46L8 ; 0x34192996
.L7: 0x34192990: 9902 LDR R1, [SP, #8] 0x34192992: 2001 MOVS R0, #1 0x34192994: 6048 STR R0, [R1, #4]
.L8: 0x34192996: F24B 4000 MOVW R0, #0xB400 0x3419299A: F6C5 0002 MOVT R0, #0x5802 0x3419299E: 6800 LDR R0, [R0] 0x341929A0: F000 0010 AND R0, R0, #16 0x341929A4: 2810 CMP R0, #16 0x341929A6: D003 BEQ 46L9 ; 0x341929B0 0x341929A8: 9902 LDR R1, [SP, #8] 0x341929AA: 2000 MOVS R0, #0 0x341929AC: 6008 STR R0, [R1] 0x341929AE: E00E B 46L11 ; 0x341929CE
.L9: 0x341929B0: F24B 4000 MOVW R0, #0xB400 0x341929B4: F6C5 0002 MOVT R0, #0x5802 0x341929B8: 6800 LDR R0, [R0] 0x341929BA: 0640 LSLS R0, R0, #25 0x341929BC: 2800 CMP R0, #0 0x341929BE: D503 BPL 46L10 ; 0x341929C8 0x341929C0: 9902 LDR R1, [SP, #8] 0x341929C2: 2070 MOVS R0, #112 0x341929C4: 6008 STR R0, [R1] 0x341929C6: E002 B 46L11 ; 0x341929CE
.L10: 0x341929C8: 9902 LDR R1, [SP, #8] 0x341929CA: 2010 MOVS R0, #16 0x341929CC: 6008 STR R0, [R1]
.L11: 0x341929CE: B004 ADD SP, SP, #16 0x341929D0: 4770 BX LR

Section .init.TIM7_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM7_IRQHandler: 0x341929D2: E7FE B TIM7_IRQHandler ; 0x341929D2

Section .text.BOOT_Application from blto2_FSBL_lto.o, size=34, align=4


BOOT_Application: 0x341929D4: B580 PUSH 123R7, LR} 0x341929D6: B082 SUB SP, SP, #8 0x341929D8: F000 F80E BL MapMemory ; 0x341929F8 0x341929DC: F88D 0007 STRB.W R0, [SP, #7] 0x341929E0: F89D 0007 LDRB.W R0, [SP, #7] 0x341929E4: B918 CBNZ R0, .L1 ; 0x341929EE 0x341929E6: F7F9 F92D BL JumpToApplication ; 0x3418BC44 0x341929EA: F88D 0007 STRB.W R0, [SP, #7]
.L1: 0x341929EE: F89D 0007 LDRB.W R0, [SP, #7] 0x341929F2: B002 ADD SP, SP, #8 0x341929F4: BD80 POP 123R7, PC}

Section .init.TIM8_BRK_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM8_BRK_IRQHandler: 0x341929F6: E7FE B TIM8_BRK_IRQHandler ; 0x341929F6

Section .text.MapMemory from blto2_FSBL_lto.o, size=94, align=4


MapMemory: 0x341929F8: B580 PUSH 123R7, LR} 0x341929FA: B082 SUB SP, SP, #8 0x341929FC: 2000 MOVS R0, #0 0x341929FE: F88D 0007 STRB.W R0, [SP, #7] 0x34192A02: F88D 0006 STRB.W R0, [SP, #6]
.L1: 0x34192A06: F89D 0006 LDRB.W R0, [SP, #6] 0x34192A0A: BB00 CBNZ R0, .L7 ; 0x34192A4E 0x34192A0C: F89D 0006 LDRB.W R0, [SP, #6] 0x34192A10: 2100 MOVS R1, #0 0x34192A12: F7FA FD6B BL EXTMEM_MemoryMappedMode ; 0x3418D4EC 0x34192A16: 4601 MOV R1, R0 0x34192A18: 1C48 ADDS R0, R1, #1 0x34192A1A: 9100 STR R1, [SP, #0] 0x34192A1C: B110 CBZ R0, .L2 ; 0x34192A24 0x34192A1E: 9800 LDR R0, [SP, #0] 0x34192A20: B158 CBZ R0, .L4 ; 0x34192A3A 0x34192A22: E00B B 46L5 ; 0x34192A3C
.L2: 0x34192A24: F89D 0006 LDRB.W R0, [SP, #6] 0x34192A28: B918 CBNZ R0, .L3 ; 0x34192A32 0x34192A2A: 2004 MOVS R0, #4 0x34192A2C: F88D 0007 STRB.W R0, [SP, #7] 0x34192A30: E003 B 46L4 ; 0x34192A3A
.L3: 0x34192A32: F89D 0006 LDRB.W R0, [SP, #6] 0x34192A36: F000 FF79 BL EXTMEM_DeInit ; 0x3419392C
.L4: 0x34192A3A: E002 B 46L6 ; 0x34192A42
.L5: 0x34192A3C: 2003 MOVS R0, #3 0x34192A3E: F88D 0007 STRB.W R0, [SP, #7]
.L6: 0x34192A42: F89D 0006 LDRB.W R0, [SP, #6] 0x34192A46: 3001 ADDS R0, #1 0x34192A48: F88D 0006 STRB.W R0, [SP, #6] 0x34192A4C: E7DB B 46L1 ; 0x34192A06
.L7: 0x34192A4E: F89D 0007 LDRB.W R0, [SP, #7] 0x34192A52: B002 ADD SP, SP, #8 0x34192A54: BD80 POP 123R7, PC}

Section .init.TIM8_UP_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM8_UP_IRQHandler: 0x34192A56: E7FE B TIM8_UP_IRQHandler ; 0x34192A56

Section .text.SFDP_ReadHeader from blto2_FSBL_lto.o, size=126, align=4


SFDP_ReadHeader: 0x34192A58: B580 PUSH 123R7, LR} 0x34192A5A: B084 SUB SP, SP, #16 0x34192A5C: 9003 STR R0, [SP, #12] 0x34192A5E: 9102 STR R1, [SP, #8] 0x34192A60: 2000 MOVS R0, #0 0x34192A62: F88D 0006 STRB.W R0, [SP, #6]
.L1: 0x34192A66: 9802 LDR R0, [SP, #8] 0x34192A68: 2100 MOVS R1, #0 0x34192A6A: 6001 STR R1, [R0] 0x34192A6C: 9803 LDR R0, [SP, #12] 0x34192A6E: 3008 ADDS R0, #8 0x34192A70: 9A02 LDR R2, [SP, #8] 0x34192A72: 2308 MOVS R3, #8 0x34192A74: F000 FDFE BL SAL_XSPI_GetSFDP ; 0x34193674 0x34192A78: B118 CBZ R0, .L2 ; 0x34192A82 0x34192A7A: 2003 MOVS R0, #3 0x34192A7C: F88D 0007 STRB.W R0, [SP, #7] 0x34192A80: E025 B 46L7 ; 0x34192ACE
.L2: 0x34192A82: 9803 LDR R0, [SP, #12] 0x34192A84: 9902 LDR R1, [SP, #8] 0x34192A86: 6809 LDR R1, [R1] 0x34192A88: F7F9 F98E BL CheckSFDP_Signature ; 0x3418BDA8 0x34192A8C: 4601 MOV R1, R0 0x34192A8E: 9100 STR R1, [SP, #0] 0x34192A90: B118 CBZ R0, .L3 ; 0x34192A9A 0x34192A92: 9800 LDR R0, [SP, #0] 0x34192A94: 2805 CMP R0, #5 0x34192A96: D007 BEQ 46L4 ; 0x34192AA8 0x34192A98: E00F B 46L5 ; 0x34192ABA
.L3: 0x34192A9A: 2000 MOVS R0, #0 0x34192A9C: F88D 0007 STRB.W R0, [SP, #7] 0x34192AA0: 2002 MOVS R0, #2 0x34192AA2: F88D 0006 STRB.W R0, [SP, #6] 0x34192AA6: E00E B 46L6 ; 0x34192AC6
.L4: 0x34192AA8: 2004 MOVS R0, #4 0x34192AAA: F88D 0007 STRB.W R0, [SP, #7] 0x34192AAE: F89D 0006 LDRB.W R0, [SP, #6] 0x34192AB2: 3001 ADDS R0, #1 0x34192AB4: F88D 0006 STRB.W R0, [SP, #6] 0x34192AB8: E005 B 46L6 ; 0x34192AC6
.L5: 0x34192ABA: 2004 MOVS R0, #4 0x34192ABC: F88D 0007 STRB.W R0, [SP, #7] 0x34192AC0: 2002 MOVS R0, #2 0x34192AC2: F88D 0006 STRB.W R0, [SP, #6]
.L6: 0x34192AC6: F89D 0006 LDRB.W R0, [SP, #6] 0x34192ACA: 2802 CMP R0, #2 0x34192ACC: D3CB BCC 46L1 ; 0x34192A66
.L7: 0x34192ACE: F89D 0007 LDRB.W R0, [SP, #7] 0x34192AD2: B004 ADD SP, SP, #16 0x34192AD4: BD80 POP 123R7, PC}

Section .init.TIM8_TRG_CCU_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM8_TRG_CCU_IRQHandler: 0x34192AD6: E7FE B TIM8_TRG_CCU_IRQHandler ; 0x34192AD6

Section .text.SFDP_CollectData from blto2_FSBL_lto.o, size=458, align=4


SFDP_CollectData: 0x34192AD8: B580 PUSH 123R7, LR} 0x34192ADA: B088 SUB SP, SP, #32 0x34192ADC: 9007 STR R0, [SP, #28] 0x34192ADE: 2000 MOVS R0, #0 0x34192AE0: 9001 STR R0, [SP, #4] 0x34192AE2: F88D 001B STRB.W R0, [SP, #27] 0x34192AE6: 2108 MOVS R1, #8 0x34192AE8: 9105 STR R1, [SP, #20] 0x34192AEA: 9907 LDR R1, [SP, #28] 0x34192AEC: F8C1 0094 STR.W R0, [R1, #148] 0x34192AF0: F240 1054 MOVW R0, #0x0154 ; 0x34000154 = sfdp_param_info 0x34192AF4: F2C3 4000 MOVT R0, #0x3400 ; 0x34000154 = sfdp_param_info 0x34192AF8: 2178 MOVS R1, #120 0x34192AFA: F7FA FEF9 BL __aeabi_memclr ; 0x3418D8F0 0x34192AFE: 9801 LDR R0, [SP, #4] 0x34192B00: F88D 0013 STRB.W R0, [SP, #19]
.L1: 0x34192B04: F89D 0013 LDRB.W R0, [SP, #19] 0x34192B08: 9907 LDR R1, [SP, #28] 0x34192B0A: F891 109C LDRB.W R1, [R1, #156] 0x34192B0E: 3101 ADDS R1, #1 0x34192B10: 4288 CMP R0, R1 0x34192B12: D22C BCS 46L3 ; 0x34192B6E 0x34192B14: 9807 LDR R0, [SP, #28] 0x34192B16: 9905 LDR R1, [SP, #20] 0x34192B18: F89D 2013 LDRB.W R2, [SP, #19] 0x34192B1C: EB02 0342 ADD.W R3, R2, R2, LSL #1 0x34192B20: F240 1254 MOVW R2, #0x0154 ; 0x34000154 = sfdp_param_info 0x34192B24: F2C3 4200 MOVT R2, #0x3400 ; 0x34000154 = sfdp_param_info 0x34192B28: EB02 0283 ADD.W R2, R2, R3, LSL #2 0x34192B2C: F7F9 F9E4 BL sfdp_get_paraminfo ; 0x3418BEF8 0x34192B30: F88D 001B STRB.W R0, [SP, #27] 0x34192B34: F89D 001B LDRB.W R0, [SP, #27] 0x34192B38: B100 CBZ R0, .L2 ; 0x34192B3C 0x34192B3A: E0AE B 46L13 ; 0x34192C9A
.L2: 0x34192B3C: F89D 0013 LDRB.W R0, [SP, #19] 0x34192B40: EB00 0140 ADD.W R1, R0, R0, LSL #1 0x34192B44: F240 1054 MOVW R0, #0x0154 ; 0x34000154 = sfdp_param_info 0x34192B48: F2C3 4000 MOVT R0, #0x3400 ; 0x34000154 = sfdp_param_info 0x34192B4C: F850 2021 LDR.W R2, [R0, R1, LSL #2] 0x34192B50: 9907 LDR R1, [SP, #28] 0x34192B52: F8D1 0094 LDR.W R0, [R1, #148] 0x34192B56: 4310 ORRS R0, R2 0x34192B58: F8C1 0094 STR.W R0, [R1, #148] 0x34192B5C: 9805 LDR R0, [SP, #20] 0x34192B5E: 3008 ADDS R0, #8 0x34192B60: 9005 STR R0, [SP, #20] 0x34192B62: F89D 0013 LDRB.W R0, [SP, #19] 0x34192B66: 3001 ADDS R0, #1 0x34192B68: F88D 0013 STRB.W R0, [SP, #19] 0x34192B6C: E7CA B 46L1 ; 0x34192B04
.L3: 0x34192B6E: 2000 MOVS R0, #0 0x34192B70: F88D 0012 STRB.W R0, [SP, #18]
.L4: 0x34192B74: F89D 0012 LDRB.W R0, [SP, #18] 0x34192B78: EB00 0140 ADD.W R1, R0, R0, LSL #1 0x34192B7C: F240 1054 MOVW R0, #0x0154 ; 0x34000154 = sfdp_param_info 0x34192B80: F2C3 4000 MOVT R0, #0x3400 ; 0x34000154 = sfdp_param_info 0x34192B84: F850 0021 LDR.W R0, [R0, R1, LSL #2] 0x34192B88: 2800 CMP R0, #0 0x34192B8A: F000 8086 BEQ.W 46L13 ; 0x34192C9A 0x34192B8E: 2000 MOVS R0, #0 0x34192B90: 9003 STR R0, [SP, #12] 0x34192B92: F89D 0012 LDRB.W R0, [SP, #18] 0x34192B96: EB00 0140 ADD.W R1, R0, R0, LSL #1 0x34192B9A: F240 1054 MOVW R0, #0x0154 ; 0x34000154 = sfdp_param_info 0x34192B9E: F2C3 4000 MOVT R0, #0x3400 ; 0x34000154 = sfdp_param_info 0x34192BA2: EB00 0181 ADD.W R1, R0, R1, LSL #2 0x34192BA6: 7A09 LDRB R1, [R1, #8] 0x34192BA8: 9102 STR R1, [SP, #8] 0x34192BAA: F89D 1012 LDRB.W R1, [SP, #18] 0x34192BAE: EB01 0141 ADD.W R1, R1, R1, LSL #1 0x34192BB2: F850 0021 LDR.W R0, [R0, R1, LSL #2] 0x34192BB6: 9000 STR R0, [SP, #0] 0x34192BB8: 2808 CMP R0, #8 0x34192BBA: D00E BEQ 46L5 ; 0x34192BDA 0x34192BBC: 9800 LDR R0, [SP, #0] 0x34192BBE: 2840 CMP R0, #64 0x34192BC0: D01E BEQ 46L6 ; 0x34192C00 0x34192BC2: 9800 LDR R0, [SP, #0] 0x34192BC4: 2880 CMP R0, #128 0x34192BC6: D027 BEQ 46L8 ; 0x34192C18 0x34192BC8: 9800 LDR R0, [SP, #0] 0x34192BCA: F5B0 7F00 CMP.W R0, #0x0200 0x34192BCE: D01D BEQ 46L7 ; 0x34192C0C 0x34192BD0: 9800 LDR R0, [SP, #0] 0x34192BD2: F5B0 5F80 CMP.W R0, #0x1000 0x34192BD6: D025 BEQ 46L9 ; 0x34192C24 0x34192BD8: E02A B 46L10 ; 0x34192C30
.L5: 0x34192BDA: F89D 0012 LDRB.W R0, [SP, #18] 0x34192BDE: EB00 0140 ADD.W R1, R0, R0, LSL #1 0x34192BE2: F240 1054 MOVW R0, #0x0154 ; 0x34000154 = sfdp_param_info 0x34192BE6: F2C3 4000 MOVT R0, #0x3400 ; 0x34000154 = sfdp_param_info 0x34192BEA: EB00 0081 ADD.W R0, R0, R1, LSL #2 0x34192BEE: 7A01 LDRB R1, [R0, #8] 0x34192BF0: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x34192BF4: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x34192BF8: F840 1B04 STR R1, [R0], #4 0x34192BFC: 9003 STR R0, [SP, #12] 0x34192BFE: E017 B 46L10 ; 0x34192C30
.L6: 0x34192C00: F240 3038 MOVW R0, #0x0338 ; 0x34000338 = JEDEC_Address4Bytes 0x34192C04: F2C3 4000 MOVT R0, #0x3400 ; 0x34000338 = JEDEC_Address4Bytes 0x34192C08: 9003 STR R0, [SP, #12] 0x34192C0A: E011 B 46L10 ; 0x34192C30
.L7: 0x34192C0C: F240 10CC MOVW R0, #0x01CC ; 0x340001CC = JEDEC_SCCR_Map 0x34192C10: F2C3 4000 MOVT R0, #0x3400 ; 0x340001CC = JEDEC_SCCR_Map 0x34192C14: 9003 STR R0, [SP, #12] 0x34192C16: E00B B 46L10 ; 0x34192C30
.L8: 0x34192C18: F240 3020 MOVW R0, #0x0320 ; 0x34000320 = JEDEC_XSPI10 0x34192C1C: F2C3 4000 MOVT R0, #0x3400 ; 0x34000320 = JEDEC_XSPI10 0x34192C20: 9003 STR R0, [SP, #12] 0x34192C22: E005 B 46L10 ; 0x34192C30
.L9: 0x34192C24: F240 3000 MOVW R0, #0x0300 ; 0x34000300 = JEDEC_OctalDdr 0x34192C28: F2C3 4000 MOVT R0, #0x3400 ; 0x34000300 = JEDEC_OctalDdr 0x34192C2C: 9003 STR R0, [SP, #12] 0x34192C2E: E7FF B 46L10 ; 0x34192C30
.L10: 0x34192C30: 9803 LDR R0, [SP, #12] 0x34192C32: B1B0 CBZ R0, .L11 ; 0x34192C62 0x34192C34: 9807 LDR R0, [SP, #28] 0x34192C36: 3008 ADDS R0, #8 0x34192C38: F89D 1012 LDRB.W R1, [SP, #18] 0x34192C3C: EB01 0241 ADD.W R2, R1, R1, LSL #1 0x34192C40: F240 1154 MOVW R1, #0x0154 ; 0x34000154 = sfdp_param_info 0x34192C44: F2C3 4100 MOVT R1, #0x3400 ; 0x34000154 = sfdp_param_info 0x34192C48: EB01 0182 ADD.W R1, R1, R2, LSL #2 0x34192C4C: 6849 LDR R1, [R1, #4] 0x34192C4E: 9A03 LDR R2, [SP, #12] 0x34192C50: 9B02 LDR R3, [SP, #8] 0x34192C52: 009B LSLS R3, R3, #2 0x34192C54: F000 FD0E BL SAL_XSPI_GetSFDP ; 0x34193674 0x34192C58: B118 CBZ R0, .L11 ; 0x34192C62 0x34192C5A: 200C MOVS R0, #12 0x34192C5C: F88D 001B STRB.W R0, [SP, #27] 0x34192C60: E01B B 46L13 ; 0x34192C9A
.L11: 0x34192C62: F89D 0012 LDRB.W R0, [SP, #18] 0x34192C66: EB00 0140 ADD.W R1, R0, R0, LSL #1 0x34192C6A: F240 1054 MOVW R0, #0x0154 ; 0x34000154 = sfdp_param_info 0x34192C6E: F2C3 4000 MOVT R0, #0x3400 ; 0x34000154 = sfdp_param_info 0x34192C72: F850 0021 LDR.W R0, [R0, R1, LSL #2] 0x34192C76: 2808 CMP R0, #8 0x34192C78: D109 BNE 46L12 ; 0x34192C8E 0x34192C7A: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x34192C7E: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x34192C82: 6C00 LDR R0, [R0, #64] 0x34192C84: F3C0 2005 UBFX R0, R0, #8, #6 0x34192C88: 9907 LDR R1, [SP, #28] 0x34192C8A: F8C1 0098 STR.W R0, [R1, #152]
.L12: 0x34192C8E: F89D 0012 LDRB.W R0, [SP, #18] 0x34192C92: 3001 ADDS R0, #1 0x34192C94: F88D 0012 STRB.W R0, [SP, #18] 0x34192C98: E76C B 46L4 ; 0x34192B74
.L13: 0x34192C9A: F89D 001B LDRB.W R0, [SP, #27] 0x34192C9E: B008 ADD SP, SP, #32 0x34192CA0: BD80 POP 123R7, PC}

Section .init.TIM8_CC_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM8_CC_IRQHandler: 0x34192CA2: E7FE B TIM8_CC_IRQHandler ; 0x34192CA2

Section .text.SFDP_MemoryReset from blto2_FSBL_lto.o, size=458, align=4


SFDP_MemoryReset: 0x34192CA4: B580 PUSH 123R7, LR} 0x34192CA6: B086 SUB SP, SP, #24 0x34192CA8: 9005 STR R0, [SP, #20] 0x34192CAA: 2007 MOVS R0, #7 0x34192CAC: F88D 0012 STRB.W R0, [SP, #18] 0x34192CB0: 2008 MOVS R0, #8 0x34192CB2: 9003 STR R0, [SP, #12] 0x34192CB4: 2000 MOVS R0, #0 0x34192CB6: F88D 000B STRB.W R0, [SP, #11] 0x34192CBA: F88D 000A STRB.W R0, [SP, #10]
.L1: 0x34192CBE: F89D 000A LDRB.W R0, [SP, #10] 0x34192CC2: 9905 LDR R1, [SP, #20] 0x34192CC4: F891 109C LDRB.W R1, [R1, #156] 0x34192CC8: 3101 ADDS R1, #1 0x34192CCA: 4288 CMP R0, R1 0x34192CCC: D23F BCS 46L6 ; 0x34192D4E 0x34192CCE: 9805 LDR R0, [SP, #20] 0x34192CD0: 9903 LDR R1, [SP, #12] 0x34192CD2: F240 1254 MOVW R2, #0x0154 ; 0x34000154 = sfdp_param_info 0x34192CD6: F2C3 4200 MOVT R2, #0x3400 ; 0x34000154 = sfdp_param_info 0x34192CDA: F7F9 F90D BL sfdp_get_paraminfo ; 0x3418BEF8 0x34192CDE: F88D 0012 STRB.W R0, [SP, #18] 0x34192CE2: F89D 0012 LDRB.W R0, [SP, #18] 0x34192CE6: BB08 CBNZ R0, .L3 ; 0x34192D2C 0x34192CE8: F240 1054 MOVW R0, #0x0154 ; 0x34000154 = sfdp_param_info 0x34192CEC: F2C3 4000 MOVT R0, #0x3400 ; 0x34000154 = sfdp_param_info 0x34192CF0: 6800 LDR R0, [R0] 0x34192CF2: 2808 CMP R0, #8 0x34192CF4: D11A BNE 46L3 ; 0x34192D2C 0x34192CF6: 9805 LDR R0, [SP, #20] 0x34192CF8: 3008 ADDS R0, #8 0x34192CFA: F240 1254 MOVW R2, #0x0154 ; 0x34000154 = sfdp_param_info 0x34192CFE: F2C3 4200 MOVT R2, #0x3400 ; 0x34000154 = sfdp_param_info 0x34192D02: 6851 LDR R1, [R2, #4] 0x34192D04: 7A12 LDRB R2, [R2, #8] 0x34192D06: 0093 LSLS R3, R2, #2 0x34192D08: F240 22A0 MOVW R2, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x34192D0C: F2C3 4200 MOVT R2, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x34192D10: 3204 ADDS R2, #4 0x34192D12: F000 FCAF BL SAL_XSPI_GetSFDP ; 0x34193674 0x34192D16: B118 CBZ R0, .L2 ; 0x34192D20 0x34192D18: 200C MOVS R0, #12 0x34192D1A: F88D 0012 STRB.W R0, [SP, #18] 0x34192D1E: E005 B 46L3 ; 0x34192D2C
.L2: 0x34192D20: 2000 MOVS R0, #0 0x34192D22: F88D 0012 STRB.W R0, [SP, #18] 0x34192D26: 2001 MOVS R0, #1 0x34192D28: F88D 000B STRB.W R0, [SP, #11]
.L3: 0x34192D2C: F89D 0012 LDRB.W R0, [SP, #18] 0x34192D30: B918 CBNZ R0, .L4 ; 0x34192D3A 0x34192D32: F89D 000B LDRB.W R0, [SP, #11] 0x34192D36: 2801 CMP R0, #1 0x34192D38: D100 BNE 46L5 ; 0x34192D3C
.L4: 0x34192D3A: E008 B 46L6 ; 0x34192D4E
.L5: 0x34192D3C: 9803 LDR R0, [SP, #12] 0x34192D3E: 3008 ADDS R0, #8 0x34192D40: 9003 STR R0, [SP, #12] 0x34192D42: F89D 000A LDRB.W R0, [SP, #10] 0x34192D46: 3001 ADDS R0, #1 0x34192D48: F88D 000A STRB.W R0, [SP, #10] 0x34192D4C: E7B7 B 46L1 ; 0x34192CBE
.L6: 0x34192D4E: F89D 0012 LDRB.W R0, [SP, #18] 0x34192D52: B910 CBNZ R0, .L7 ; 0x34192D5A 0x34192D54: F89D 000B LDRB.W R0, [SP, #11] 0x34192D58: B918 CBNZ R0, .L8 ; 0x34192D62
.L7: 0x34192D5A: 200C MOVS R0, #12 0x34192D5C: F88D 0012 STRB.W R0, [SP, #18] 0x34192D60: E081 B 46L21 ; 0x34192E66
.L8: 0x34192D62: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x34192D66: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x34192D6A: 6C00 LDR R0, [R0, #64] 0x34192D6C: 0A00 LSRS R0, R0, #8 0x34192D6E: 0680 LSLS R0, R0, #26 0x34192D70: B918 CBNZ R0, .L9 ; 0x34192D7A 0x34192D72: 2000 MOVS R0, #0 0x34192D74: F88D 0013 STRB.W R0, [SP, #19] 0x34192D78: E050 B 46L16 ; 0x34192E1C
.L9: 0x34192D7A: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x34192D7E: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x34192D82: 6C00 LDR R0, [R0, #64] 0x34192D84: 0A00 LSRS R0, R0, #8 0x34192D86: 07C0 LSLS R0, R0, #31 0x34192D88: B118 CBZ R0, .L10 ; 0x34192D92 0x34192D8A: 2001 MOVS R0, #1 0x34192D8C: F88D 0013 STRB.W R0, [SP, #19] 0x34192D90: E044 B 46L16 ; 0x34192E1C
.L10: 0x34192D92: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x34192D96: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x34192D9A: 6C00 LDR R0, [R0, #64] 0x34192D9C: 0A00 LSRS R0, R0, #8 0x34192D9E: 0780 LSLS R0, R0, #30 0x34192DA0: 2800 CMP R0, #0 0x34192DA2: D503 BPL 46L11 ; 0x34192DAC 0x34192DA4: 2002 MOVS R0, #2 0x34192DA6: F88D 0013 STRB.W R0, [SP, #19] 0x34192DAA: E037 B 46L16 ; 0x34192E1C
.L11: 0x34192DAC: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x34192DB0: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x34192DB4: 6C00 LDR R0, [R0, #64] 0x34192DB6: 0A00 LSRS R0, R0, #8 0x34192DB8: 0740 LSLS R0, R0, #29 0x34192DBA: 2800 CMP R0, #0 0x34192DBC: D503 BPL 46L12 ; 0x34192DC6 0x34192DBE: 2003 MOVS R0, #3 0x34192DC0: F88D 0013 STRB.W R0, [SP, #19] 0x34192DC4: E02A B 46L16 ; 0x34192E1C
.L12: 0x34192DC6: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x34192DCA: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x34192DCE: 6C00 LDR R0, [R0, #64] 0x34192DD0: 0A00 LSRS R0, R0, #8 0x34192DD2: 0700 LSLS R0, R0, #28 0x34192DD4: 2800 CMP R0, #0 0x34192DD6: D503 BPL 46L13 ; 0x34192DE0 0x34192DD8: 2004 MOVS R0, #4 0x34192DDA: F88D 0013 STRB.W R0, [SP, #19] 0x34192DDE: E01D B 46L16 ; 0x34192E1C
.L13: 0x34192DE0: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x34192DE4: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x34192DE8: 6C00 LDR R0, [R0, #64] 0x34192DEA: 0A00 LSRS R0, R0, #8 0x34192DEC: 06C0 LSLS R0, R0, #27 0x34192DEE: 2800 CMP R0, #0 0x34192DF0: D503 BPL 46L14 ; 0x34192DFA 0x34192DF2: 2005 MOVS R0, #5 0x34192DF4: F88D 0013 STRB.W R0, [SP, #19] 0x34192DF8: E010 B 46L16 ; 0x34192E1C
.L14: 0x34192DFA: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x34192DFE: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x34192E02: 6C00 LDR R0, [R0, #64] 0x34192E04: 0A00 LSRS R0, R0, #8 0x34192E06: 0680 LSLS R0, R0, #26 0x34192E08: 2800 CMP R0, #0 0x34192E0A: D503 BPL 46L15 ; 0x34192E14 0x34192E0C: 200F MOVS R0, #15 0x34192E0E: F88D 0012 STRB.W R0, [SP, #18] 0x34192E12: E028 B 46L21 ; 0x34192E66
.L15: 0x34192E14: 200C MOVS R0, #12 0x34192E16: F88D 0012 STRB.W R0, [SP, #18] 0x34192E1A: E024 B 46L21 ; 0x34192E66
.L16: 0x34192E1C: F89D 0013 LDRB.W R0, [SP, #19] 0x34192E20: 4601 MOV R1, R0 0x34192E22: 9101 STR R1, [SP, #4] 0x34192E24: B138 CBZ R0, .L17 ; 0x34192E36 0x34192E26: 9801 LDR R0, [SP, #4] 0x34192E28: 3801 SUBS R0, #1 0x34192E2A: 2804 CMP R0, #4 0x34192E2C: D314 BCC 46L19 ; 0x34192E58 0x34192E2E: 9801 LDR R0, [SP, #4] 0x34192E30: 2805 CMP R0, #5 0x34192E32: D001 BEQ 46L18 ; 0x34192E38 0x34192E34: E014 B 46L20 ; 0x34192E60
.L17: 0x34192E36: E016 B 46L21 ; 0x34192E66
.L18: 0x34192E38: 9805 LDR R0, [SP, #20] 0x34192E3A: 3008 ADDS R0, #8 0x34192E3C: 2166 MOVS R1, #102 0x34192E3E: 2300 MOVS R3, #0 0x34192E40: 9300 STR R3, [SP, #0] 0x34192E42: 461A MOV R2, R3 0x34192E44: F7FA F9B8 BL SAL_XSPI_CommandSendData ; 0x3418D1B8 0x34192E48: 9B00 LDR R3, [SP, #0] 0x34192E4A: 9805 LDR R0, [SP, #20] 0x34192E4C: 3008 ADDS R0, #8 0x34192E4E: 2199 MOVS R1, #153 0x34192E50: 461A MOV R2, R3 0x34192E52: F7FA F9B1 BL SAL_XSPI_CommandSendData ; 0x3418D1B8 0x34192E56: E006 B 46L21 ; 0x34192E66
.L19: 0x34192E58: 200F MOVS R0, #15 0x34192E5A: F88D 0012 STRB.W R0, [SP, #18] 0x34192E5E: E002 B 46L21 ; 0x34192E66
.L20: 0x34192E60: 2001 MOVS R0, #1 0x34192E62: F88D 0012 STRB.W R0, [SP, #18]
.L21: 0x34192E66: F89D 0012 LDRB.W R0, [SP, #18] 0x34192E6A: B006 ADD SP, SP, #24 0x34192E6C: BD80 POP 123R7, PC}

Section .init.TIM9_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM9_IRQHandler: 0x34192E6E: E7FE B TIM9_IRQHandler ; 0x34192E6E

Section .text.JEDEC_Basic_ManageQuadEnableRequirement from blto2_FSBL_lto.o, size=338, align=4


JEDEC_Basic_ManageQuadEnableRequirement: 0x34192E70: B580 PUSH 123R7, LR} 0x34192E72: B084 SUB SP, SP, #16 0x34192E74: 9003 STR R0, [SP, #12] 0x34192E76: 200F MOVS R0, #15 0x34192E78: F88D 000B STRB.W R0, [SP, #11] 0x34192E7C: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = JEDEC_Basic 0x34192E80: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = JEDEC_Basic 0x34192E84: 6BC0 LDR R0, [R0, #60] 0x34192E86: F3C0 5002 UBFX R0, R0, #20, #3 0x34192E8A: 4601 MOV R1, R0 0x34192E8C: 9101 STR R1, [SP, #4] 0x34192E8E: 2807 CMP R0, #7 0x34192E90: F200 8093 BHI.W 46L10 ; 0x34192FBA 0x34192E94: 9901 LDR R1, [SP, #4] 0x34192E96: E8DF F001 TBB 91PC, R1] 0x34192E9A: 04 DC.B 0x04 ; '\x04' 0x34192E9B: 05 DC.B 0x05 ; '\x05' 0x34192E9C: 06 DC.B 0x06 ; '\x06' 0x34192E9D: 41 DC.B 0x41 ; 'A' 0x34192E9E: 42 DC.B 0x42 ; 'B' 0x34192E9F: 8D DC.B 0x8D ; '\x8D' 0x34192EA0: 8E DC.B 0x8E ; '\x8E' 0x34192EA1: 8F DC.B 0x8F ; '\x8F' 0x34192EA2: E08A B 46L10 ; 0x34192FBA 0x34192EA4: E089 B 46L10 ; 0x34192FBA 0x34192EA6: 9903 LDR R1, [SP, #12] 0x34192EA8: F101 0008 ADD.W R0, R1, #8 0x34192EAC: F891 1070 LDRB.W R1, [R1, #112] 0x34192EB0: 2300 MOVS R3, #0 0x34192EB2: 461A MOV R2, R3 0x34192EB4: F7FA F9C4 BL SAL_XSPI_SendReadCommand ; 0x3418D240 0x34192EB8: B118 CBZ R0, .L1 ; 0x34192EC2 0x34192EBA: 200C MOVS R0, #12 0x34192EBC: F88D 000B STRB.W R0, [SP, #11] 0x34192EC0: E07B B 46L10 ; 0x34192FBA
.L1: 0x34192EC2: 9803 LDR R0, [SP, #12] 0x34192EC4: 3008 ADDS R0, #8 0x34192EC6: 2105 MOVS R1, #5 0x34192EC8: F10D 0209 ADD.W R2, SP, #9 0x34192ECC: 2301 MOVS R3, #1 0x34192ECE: F7FA F9B7 BL SAL_XSPI_SendReadCommand ; 0x3418D240 0x34192ED2: B118 CBZ R0, .L2 ; 0x34192EDC 0x34192ED4: 200C MOVS R0, #12 0x34192ED6: F88D 000B STRB.W R0, [SP, #11] 0x34192EDA: E06E B 46L10 ; 0x34192FBA
.L2: 0x34192EDC: F89D 0009 LDRB.W R0, [SP, #9] 0x34192EE0: F040 0040 ORR R0, R0, #64 0x34192EE4: F88D 0009 STRB.W R0, [SP, #9] 0x34192EE8: 9803 LDR R0, [SP, #12] 0x34192EEA: 3008 ADDS R0, #8 0x34192EEC: F10D 0209 ADD.W R2, SP, #9 0x34192EF0: 2301 MOVS R3, #1 0x34192EF2: 4619 MOV R1, R3 0x34192EF4: F7FA F960 BL SAL_XSPI_CommandSendData ; 0x3418D1B8 0x34192EF8: B118 CBZ R0, .L3 ; 0x34192F02 0x34192EFA: 200C MOVS R0, #12 0x34192EFC: F88D 000B STRB.W R0, [SP, #11] 0x34192F00: E05B B 46L10 ; 0x34192FBA
.L3: 0x34192F02: 9803 LDR R0, [SP, #12] 0x34192F04: 2164 MOVS R1, #100 0x34192F06: F000 F94F BL driver_check_FlagBUSY ; 0x341931A8 0x34192F0A: B118 CBZ R0, .L4 ; 0x34192F14 0x34192F0C: 200C MOVS R0, #12 0x34192F0E: F88D 000B STRB.W R0, [SP, #11] 0x34192F12: E052 B 46L10 ; 0x34192FBA
.L4: 0x34192F14: 2000 MOVS R0, #0 0x34192F16: F88D 000B STRB.W R0, [SP, #11] 0x34192F1A: E04E B 46L10 ; 0x34192FBA 0x34192F1C: E04D B 46L10 ; 0x34192FBA 0x34192F1E: 9803 LDR R0, [SP, #12] 0x34192F20: 3008 ADDS R0, #8 0x34192F22: 2105 MOVS R1, #5 0x34192F24: F10D 0209 ADD.W R2, SP, #9 0x34192F28: 2302 MOVS R3, #2 0x34192F2A: F7FA F989 BL SAL_XSPI_SendReadCommand ; 0x3418D240 0x34192F2E: B118 CBZ R0, .L5 ; 0x34192F38 0x34192F30: 200C MOVS R0, #12 0x34192F32: F88D 000B STRB.W R0, [SP, #11] 0x34192F36: E040 B 46L10 ; 0x34192FBA
.L5: 0x34192F38: F89D 000A LDRB.W R0, [SP, #10] 0x34192F3C: F040 0002 ORR R0, R0, #2 0x34192F40: F88D 000A STRB.W R0, [SP, #10] 0x34192F44: 9903 LDR R1, [SP, #12] 0x34192F46: F101 0008 ADD.W R0, R1, #8 0x34192F4A: F891 1070 LDRB.W R1, [R1, #112] 0x34192F4E: 2300 MOVS R3, #0 0x34192F50: 461A MOV R2, R3 0x34192F52: F7FA F975 BL SAL_XSPI_SendReadCommand ; 0x3418D240 0x34192F56: B118 CBZ R0, .L6 ; 0x34192F60 0x34192F58: 200C MOVS R0, #12 0x34192F5A: F88D 000B STRB.W R0, [SP, #11] 0x34192F5E: E02C B 46L10 ; 0x34192FBA
.L6: 0x34192F60: 9803 LDR R0, [SP, #12] 0x34192F62: 3008 ADDS R0, #8 0x34192F64: 2101 MOVS R1, #1 0x34192F66: F10D 0209 ADD.W R2, SP, #9 0x34192F6A: 2302 MOVS R3, #2 0x34192F6C: F7FA F924 BL SAL_XSPI_CommandSendData ; 0x3418D1B8 0x34192F70: B118 CBZ R0, .L7 ; 0x34192F7A 0x34192F72: 200C MOVS R0, #12 0x34192F74: F88D 000B STRB.W R0, [SP, #11] 0x34192F78: E01F B 46L10 ; 0x34192FBA
.L7: 0x34192F7A: 9803 LDR R0, [SP, #12] 0x34192F7C: 2164 MOVS R1, #100 0x34192F7E: F000 F913 BL driver_check_FlagBUSY ; 0x341931A8 0x34192F82: B118 CBZ R0, .L8 ; 0x34192F8C 0x34192F84: 200C MOVS R0, #12 0x34192F86: F88D 000B STRB.W R0, [SP, #11] 0x34192F8A: E016 B 46L10 ; 0x34192FBA
.L8: 0x34192F8C: 20FF MOVS R0, #255 0x34192F8E: F88D 000A STRB.W R0, [SP, #10] 0x34192F92: 9803 LDR R0, [SP, #12] 0x34192F94: 3008 ADDS R0, #8 0x34192F96: 2105 MOVS R1, #5 0x34192F98: F10D 0209 ADD.W R2, SP, #9 0x34192F9C: 2302 MOVS R3, #2 0x34192F9E: F7FA F94F BL SAL_XSPI_SendReadCommand ; 0x3418D240 0x34192FA2: B118 CBZ R0, .L9 ; 0x34192FAC 0x34192FA4: 200C MOVS R0, #12 0x34192FA6: F88D 000B STRB.W R0, [SP, #11] 0x34192FAA: E006 B 46L10 ; 0x34192FBA
.L9: 0x34192FAC: 2000 MOVS R0, #0 0x34192FAE: F88D 000B STRB.W R0, [SP, #11] 0x34192FB2: E002 B 46L10 ; 0x34192FBA 0x34192FB4: E001 B 46L10 ; 0x34192FBA 0x34192FB6: E000 B 46L10 ; 0x34192FBA 0x34192FB8: E7FF B 46L10 ; 0x34192FBA
.L10: 0x34192FBA: F89D 000B LDRB.W R0, [SP, #11] 0x34192FBE: B004 ADD SP, SP, #16 0x34192FC0: BD80 POP 123R7, PC}

Section .init.TIM10_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM10_IRQHandler: 0x34192FC2: E7FE B TIM10_IRQHandler ; 0x34192FC2

Section .text.sfdp_enter_octal_mode from blto2_FSBL_lto.o, size=482, align=4


sfdp_enter_octal_mode: 0x34192FC4: B580 PUSH 123R7, LR} 0x34192FC6: B088 SUB SP, SP, #32 0x34192FC8: 9007 STR R0, [SP, #28] 0x34192FCA: 2000 MOVS R0, #0 0x34192FCC: F88D 001B STRB.W R0, [SP, #27] 0x34192FD0: F240 3000 MOVW R0, #0x0300 ; 0x34000300 = JEDEC_OctalDdr 0x34192FD4: F2C3 4000 MOVT R0, #0x3400 ; 0x34000300 = JEDEC_OctalDdr 0x34192FD8: 78C0 LDRB R0, [R0, #3] 0x34192FDA: B358 CBZ R0, .L1 ; 0x34193034 0x34192FDC: F240 3300 MOVW R3, #0x0300 ; 0x34000300 = JEDEC_OctalDdr 0x34192FE0: F2C3 4300 MOVT R3, #0x3400 ; 0x34000300 = JEDEC_OctalDdr 0x34192FE4: 9304 STR R3, [SP, #16] 0x34192FE6: 8858 LDRH R0, [R3, #2] 0x34192FE8: F88D 0014 STRB.W R0, [SP, #20] 0x34192FEC: 6818 LDR R0, [R3] 0x34192FEE: 0A00 LSRS R0, R0, #8 0x34192FF0: A905 ADD R1, SP, #20 0x34192FF2: 1C4A ADDS R2, R1, #1 0x34192FF4: F88D 0015 STRB.W R0, [SP, #21] 0x34192FF8: 6818 LDR R0, [R3] 0x34192FFA: F88D 0016 STRB.W R0, [SP, #22] 0x34192FFE: 79D8 LDRB R0, [R3, #7] 0x34193000: F88D 0017 STRB.W R0, [SP, #23] 0x34193004: 88D8 LDRH R0, [R3, #6] 0x34193006: F88D 0018 STRB.W R0, [SP, #24] 0x3419300A: 6858 LDR R0, [R3, #4] 0x3419300C: 0A00 LSRS R0, R0, #8 0x3419300E: F88D 0019 STRB.W R0, [SP, #25] 0x34193012: 6858 LDR R0, [R3, #4] 0x34193014: F88D 001A STRB.W R0, [SP, #26] 0x34193018: 9807 LDR R0, [SP, #28] 0x3419301A: 3008 ADDS R0, #8 0x3419301C: F89D 1014 LDRB.W R1, [SP, #20] 0x34193020: 78DB LDRB R3, [R3, #3] 0x34193022: 3B01 SUBS R3, #1 0x34193024: B29B UXTH R3, R3 0x34193026: F7FA F8C7 BL SAL_XSPI_CommandSendData ; 0x3418D1B8 0x3419302A: B118 CBZ R0, .L1 ; 0x34193034 0x3419302C: 200B MOVS R0, #11 0x3419302E: F88D 001B STRB.W R0, [SP, #27] 0x34193032: E0B4 B 46L8 ; 0x3419319E
.L1: 0x34193034: F240 3000 MOVW R0, #0x0300 ; 0x34000300 = JEDEC_OctalDdr 0x34193038: F2C3 4000 MOVT R0, #0x3400 ; 0x34000300 = JEDEC_OctalDdr 0x3419303C: 7AC0 LDRB R0, [R0, #11] 0x3419303E: B3A0 CBZ R0, .L3 ; 0x341930AA 0x34193040: 9807 LDR R0, [SP, #28] 0x34193042: 2164 MOVS R1, #100 0x34193044: F000 F8B0 BL driver_check_FlagBUSY ; 0x341931A8 0x34193048: B118 CBZ R0, .L2 ; 0x34193052 0x3419304A: 200C MOVS R0, #12 0x3419304C: F88D 001B STRB.W R0, [SP, #27] 0x34193050: E0A5 B 46L8 ; 0x3419319E
.L2: 0x34193052: F240 3300 MOVW R3, #0x0300 ; 0x34000300 = JEDEC_OctalDdr 0x34193056: F2C3 4300 MOVT R3, #0x3400 ; 0x34000300 = JEDEC_OctalDdr 0x3419305A: 9303 STR R3, [SP, #12] 0x3419305C: 8958 LDRH R0, [R3, #10] 0x3419305E: F88D 0014 STRB.W R0, [SP, #20] 0x34193062: 6898 LDR R0, [R3, #8] 0x34193064: 0A00 LSRS R0, R0, #8 0x34193066: A905 ADD R1, SP, #20 0x34193068: 1C4A ADDS R2, R1, #1 0x3419306A: F88D 0015 STRB.W R0, [SP, #21] 0x3419306E: 6898 LDR R0, [R3, #8] 0x34193070: F88D 0016 STRB.W R0, [SP, #22] 0x34193074: 7BD8 LDRB R0, [R3, #15] 0x34193076: F88D 0017 STRB.W R0, [SP, #23] 0x3419307A: 89D8 LDRH R0, [R3, #14] 0x3419307C: F88D 0018 STRB.W R0, [SP, #24] 0x34193080: 68D8 LDR R0, [R3, #12] 0x34193082: 0A00 LSRS R0, R0, #8 0x34193084: F88D 0019 STRB.W R0, [SP, #25] 0x34193088: 68D8 LDR R0, [R3, #12] 0x3419308A: F88D 001A STRB.W R0, [SP, #26] 0x3419308E: 9807 LDR R0, [SP, #28] 0x34193090: 3008 ADDS R0, #8 0x34193092: F89D 1014 LDRB.W R1, [SP, #20] 0x34193096: 7ADB LDRB R3, [R3, #11] 0x34193098: 3B01 SUBS R3, #1 0x3419309A: B29B UXTH R3, R3 0x3419309C: F7FA F88C BL SAL_XSPI_CommandSendData ; 0x3418D1B8 0x341930A0: B118 CBZ R0, .L3 ; 0x341930AA 0x341930A2: 200B MOVS R0, #11 0x341930A4: F88D 001B STRB.W R0, [SP, #27] 0x341930A8: E079 B 46L8 ; 0x3419319E
.L3: 0x341930AA: F240 3000 MOVW R0, #0x0300 ; 0x34000300 = JEDEC_OctalDdr 0x341930AE: F2C3 4000 MOVT R0, #0x3400 ; 0x34000300 = JEDEC_OctalDdr 0x341930B2: 7CC0 LDRB R0, [R0, #19] 0x341930B4: B3A0 CBZ R0, .L5 ; 0x34193120 0x341930B6: 9807 LDR R0, [SP, #28] 0x341930B8: 2164 MOVS R1, #100 0x341930BA: F000 F875 BL driver_check_FlagBUSY ; 0x341931A8 0x341930BE: B118 CBZ R0, .L4 ; 0x341930C8 0x341930C0: 200C MOVS R0, #12 0x341930C2: F88D 001B STRB.W R0, [SP, #27] 0x341930C6: E06A B 46L8 ; 0x3419319E
.L4: 0x341930C8: F240 3300 MOVW R3, #0x0300 ; 0x34000300 = JEDEC_OctalDdr 0x341930CC: F2C3 4300 MOVT R3, #0x3400 ; 0x34000300 = JEDEC_OctalDdr 0x341930D0: 9302 STR R3, [SP, #8] 0x341930D2: 8A58 LDRH R0, [R3, #18] 0x341930D4: F88D 0014 STRB.W R0, [SP, #20] 0x341930D8: 6918 LDR R0, [R3, #16] 0x341930DA: 0A00 LSRS R0, R0, #8 0x341930DC: A905 ADD R1, SP, #20 0x341930DE: 1C4A ADDS R2, R1, #1 0x341930E0: F88D 0015 STRB.W R0, [SP, #21] 0x341930E4: 6918 LDR R0, [R3, #16] 0x341930E6: F88D 0016 STRB.W R0, [SP, #22] 0x341930EA: 7DD8 LDRB R0, [R3, #23] 0x341930EC: F88D 0017 STRB.W R0, [SP, #23] 0x341930F0: 8AD8 LDRH R0, [R3, #22] 0x341930F2: F88D 0018 STRB.W R0, [SP, #24] 0x341930F6: 6958 LDR R0, [R3, #20] 0x341930F8: 0A00 LSRS R0, R0, #8 0x341930FA: F88D 0019 STRB.W R0, [SP, #25] 0x341930FE: 6958 LDR R0, [R3, #20] 0x34193100: F88D 001A STRB.W R0, [SP, #26] 0x34193104: 9807 LDR R0, [SP, #28] 0x34193106: 3008 ADDS R0, #8 0x34193108: F89D 1014 LDRB.W R1, [SP, #20] 0x3419310C: 7CDB LDRB R3, [R3, #19] 0x3419310E: 3B01 SUBS R3, #1 0x34193110: B29B UXTH R3, R3 0x34193112: F7FA F851 BL SAL_XSPI_CommandSendData ; 0x3418D1B8 0x34193116: B118 CBZ R0, .L5 ; 0x34193120 0x34193118: 200B MOVS R0, #11 0x3419311A: F88D 001B STRB.W R0, [SP, #27] 0x3419311E: E03E B 46L8 ; 0x3419319E
.L5: 0x34193120: F240 3000 MOVW R0, #0x0300 ; 0x34000300 = JEDEC_OctalDdr 0x34193124: F2C3 4000 MOVT R0, #0x3400 ; 0x34000300 = JEDEC_OctalDdr 0x34193128: 7EC0 LDRB R0, [R0, #27] 0x3419312A: B3A0 CBZ R0, .L7 ; 0x34193196 0x3419312C: 9807 LDR R0, [SP, #28] 0x3419312E: 2164 MOVS R1, #100 0x34193130: F000 F83A BL driver_check_FlagBUSY ; 0x341931A8 0x34193134: B118 CBZ R0, .L6 ; 0x3419313E 0x34193136: 200C MOVS R0, #12 0x34193138: F88D 001B STRB.W R0, [SP, #27] 0x3419313C: E02F B 46L8 ; 0x3419319E
.L6: 0x3419313E: F240 3300 MOVW R3, #0x0300 ; 0x34000300 = JEDEC_OctalDdr 0x34193142: F2C3 4300 MOVT R3, #0x3400 ; 0x34000300 = JEDEC_OctalDdr 0x34193146: 9301 STR R3, [SP, #4] 0x34193148: 8B58 LDRH R0, [R3, #26] 0x3419314A: F88D 0014 STRB.W R0, [SP, #20] 0x3419314E: 6998 LDR R0, [R3, #24] 0x34193150: 0A00 LSRS R0, R0, #8 0x34193152: A905 ADD R1, SP, #20 0x34193154: 1C4A ADDS R2, R1, #1 0x34193156: F88D 0015 STRB.W R0, [SP, #21] 0x3419315A: 6998 LDR R0, [R3, #24] 0x3419315C: F88D 0016 STRB.W R0, [SP, #22] 0x34193160: 7FD8 LDRB R0, [R3, #31] 0x34193162: F88D 0017 STRB.W R0, [SP, #23] 0x34193166: 8BD8 LDRH R0, [R3, #30] 0x34193168: F88D 0018 STRB.W R0, [SP, #24] 0x3419316C: 69D8 LDR R0, [R3, #28] 0x3419316E: 0A00 LSRS R0, R0, #8 0x34193170: F88D 0019 STRB.W R0, [SP, #25] 0x34193174: 69D8 LDR R0, [R3, #28] 0x34193176: F88D 001A STRB.W R0, [SP, #26] 0x3419317A: 9807 LDR R0, [SP, #28] 0x3419317C: 3008 ADDS R0, #8 0x3419317E: F89D 1014 LDRB.W R1, [SP, #20] 0x34193182: 7EDB LDRB R3, [R3, #27] 0x34193184: 3B01 SUBS R3, #1 0x34193186: B29B UXTH R3, R3 0x34193188: F7FA F816 BL SAL_XSPI_CommandSendData ; 0x3418D1B8 0x3419318C: B118 CBZ R0, .L7 ; 0x34193196 0x3419318E: 200B MOVS R0, #11 0x34193190: F88D 001B STRB.W R0, [SP, #27] 0x34193194: E003 B 46L8 ; 0x3419319E
.L7: 0x34193196: 9807 LDR R0, [SP, #28] 0x34193198: 3008 ADDS R0, #8 0x3419319A: F000 FB8D BL SAL_XSPI_Abort ; 0x341938B8
.L8: 0x3419319E: F89D 001B LDRB.W R0, [SP, #27] 0x341931A2: B008 ADD SP, SP, #32 0x341931A4: BD80 POP 123R7, PC}

Section .init.TIM11_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM11_IRQHandler: 0x341931A6: E7FE B TIM11_IRQHandler ; 0x341931A6

Section .text.driver_check_FlagBUSY from blto2_FSBL_lto.o, size=102, align=4


driver_check_FlagBUSY: 0x341931A8: B5B0 PUSH 123R4-R5, R7, LR} 0x341931AA: B086 SUB SP, SP, #24 0x341931AC: 9005 STR R0, [SP, #20] 0x341931AE: 9104 STR R1, [SP, #16] 0x341931B0: 20FB MOVS R0, #251 0x341931B2: F88D 000F STRB.W R0, [SP, #15] 0x341931B6: 9805 LDR R0, [SP, #20] 0x341931B8: F890 006C LDRB.W R0, [R0, #108] 0x341931BC: B318 CBZ R0, .L1 ; 0x34193206 0x341931BE: 9B05 LDR R3, [SP, #20] 0x341931C0: F103 0008 ADD.W R0, R3, #8 0x341931C4: F893 206F LDRB.W R2, [R3, #111] 0x341931C8: F893 405D LDRB.W R4, [R3, #93] 0x341931CC: F893 106C LDRB.W R1, [R3, #108] 0x341931D0: F893 E06D LDRB.W LR, [R3, #109] 0x341931D4: F893 306E LDRB.W R3, [R3, #110] 0x341931D8: FA03 F30E LSL.W R3, R3, LR 0x341931DC: F04F 0C01 MOV.W R12, #1 0x341931E0: FA0C FC0E LSL.W R12, R12, LR 0x341931E4: 9D04 LDR R5, [SP, #16] 0x341931E6: 46EE MOV LR, SP 0x341931E8: F8CE 5008 STR.W R5, [LR, #8] 0x341931EC: F8CE 4004 STR.W R4, [LR, #4] 0x341931F0: FA5F FC8C UXTB R12, R12 0x341931F4: F8CE C000 STR.W R12, [LR] 0x341931F8: B2DB UXTB R3, R3 0x341931FA: F7FA F865 BL SAL_XSPI_CheckStatusRegister ; 0x3418D2C8 0x341931FE: B910 CBNZ R0, .L1 ; 0x34193206 0x34193200: 2000 MOVS R0, #0 0x34193202: F88D 000F STRB.W R0, [SP, #15]
.L1: 0x34193206: F99D 000F LDRSB.W R0, [SP, #15] 0x3419320A: B006 ADD SP, SP, #24 0x3419320C: BDB0 POP 123R4-R5, R7, PC}

Section .init.TIM12_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM12_IRQHandler: 0x3419320E: E7FE B TIM12_IRQHandler ; 0x3419320E

Section .text.EXTMEM_DRIVER_NOR_SFDP_Init from blto2_FSBL_lto.o, size=306, align=4


EXTMEM_DRIVER_NOR_SFDP_Init: 0x34193210: B580 PUSH 123R7, LR} 0x34193212: B08C SUB SP, SP, #48 0x34193214: 900B STR R0, [SP, #44] 0x34193216: F88D 102B STRB.W R1, [SP, #43] 0x3419321A: 9209 STR R2, [SP, #36] 0x3419321C: 9308 STR R3, [SP, #32] 0x3419321E: 2000 MOVS R0, #0 0x34193220: 9001 STR R0, [SP, #4] 0x34193222: F88D 001F STRB.W R0, [SP, #31] 0x34193226: F88D 0013 STRB.W R0, [SP, #19] 0x3419322A: 9808 LDR R0, [SP, #32] 0x3419322C: 3008 ADDS R0, #8 0x3419322E: 2198 MOVS R1, #152 0x34193230: F7FA FB5E BL __aeabi_memclr ; 0x3418D8F0 0x34193234: 9801 LDR R0, [SP, #4] 0x34193236: F89D 102B LDRB.W R1, [SP, #43] 0x3419323A: 9A08 LDR R2, [SP, #32] 0x3419323C: F882 105C STRB.W R1, [R2, #92] 0x34193240: 9908 LDR R1, [SP, #32] 0x34193242: F881 0064 STRB.W R0, [R1, #100] 0x34193246: 9809 LDR R0, [SP, #36] 0x34193248: 9908 LDR R1, [SP, #32] 0x3419324A: 6688 STR R0, [R1, #104] 0x3419324C: 9908 LDR R1, [SP, #32] 0x3419324E: 2008 MOVS R0, #8 0x34193250: F881 0059 STRB.W R0, [R1, #89] 0x34193254: 9808 LDR R0, [SP, #32] 0x34193256: 3008 ADDS R0, #8 0x34193258: 990B LDR R1, [SP, #44] 0x3419325A: F000 F891 BL SAL_XSPI_Init ; 0x34193380 0x3419325E: 9808 LDR R0, [SP, #32] 0x34193260: 3008 ADDS R0, #8 0x34193262: 9909 LDR R1, [SP, #36] 0x34193264: F24F 0280 MOVW R2, #0xF080 0x34193268: F2C0 22FA MOVT R2, #0x02FA 0x3419326C: AB02 ADD R3, SP, #8 0x3419326E: F7F9 FEE1 BL SAL_XSPI_SetClock ; 0x3418D034 0x34193272: 9808 LDR R0, [SP, #32] 0x34193274: 3008 ADDS R0, #8 0x34193276: F000 FB13 BL SAL_XSPI_DisableMapMode ; 0x341938A0 0x3419327A: 9808 LDR R0, [SP, #32] 0x3419327C: A905 ADD R1, SP, #20 0x3419327E: F7F8 FDBB BL SFDP_GetHeader ; 0x3418BDF8 0x34193282: B118 CBZ R0, .L1 ; 0x3419328C 0x34193284: 20FF MOVS R0, #255 0x34193286: F88D 001F STRB.W R0, [SP, #31] 0x3419328A: E056 B 46L8 ; 0x3419333A
.L1: 0x3419328C: 9808 LDR R0, [SP, #32] 0x3419328E: F7FF FD09 BL SFDP_MemoryReset ; 0x34192CA4 0x34193292: BF00 NOP 0x34193294: 200A MOVS R0, #10 0x34193296: F7FA FED9 BL HAL_Delay ; 0x3418E04C 0x3419329A: 9808 LDR R0, [SP, #32] 0x3419329C: A905 ADD R1, SP, #20 0x3419329E: F7F8 FDAB BL SFDP_GetHeader ; 0x3418BDF8 0x341932A2: B118 CBZ R0, .L2 ; 0x341932AC 0x341932A4: 20FF MOVS R0, #255 0x341932A6: F88D 001F STRB.W R0, [SP, #31] 0x341932AA: E046 B 46L8 ; 0x3419333A
.L2: 0x341932AC: F89D 001A LDRB.W R0, [SP, #26] 0x341932B0: 280A CMP R0, #10 0x341932B2: D304 BCC 46L3 ; 0x341932BE 0x341932B4: 9908 LDR R1, [SP, #32] 0x341932B6: 2009 MOVS R0, #9 0x341932B8: F881 009C STRB.W R0, [R1, #156] 0x341932BC: E004 B 46L4 ; 0x341932C8
.L3: 0x341932BE: F89D 001A LDRB.W R0, [SP, #26] 0x341932C2: 9908 LDR R1, [SP, #32] 0x341932C4: F881 009C STRB.W R0, [R1, #156]
.L4: 0x341932C8: F89D 001B LDRB.W R0, [SP, #27] 0x341932CC: 9908 LDR R1, [SP, #32] 0x341932CE: F881 009D STRB.W R0, [R1, #157] 0x341932D2: 9808 LDR R0, [SP, #32] 0x341932D4: 3008 ADDS R0, #8 0x341932D6: F10D 010D ADD.W R1, SP, #13 0x341932DA: 2204 MOVS R2, #4 0x341932DC: F7F9 FF10 BL SAL_XSPI_GetId ; 0x3418D100 0x341932E0: F89D 000D LDRB.W R0, [SP, #13] 0x341932E4: 9908 LDR R1, [SP, #32] 0x341932E6: F881 005D STRB.W R0, [R1, #93] 0x341932EA: 9808 LDR R0, [SP, #32] 0x341932EC: F7FF FBF4 BL SFDP_CollectData ; 0x34192AD8 0x341932F0: B118 CBZ R0, .L5 ; 0x341932FA 0x341932F2: 20FF MOVS R0, #255 0x341932F4: F88D 001F STRB.W R0, [SP, #31] 0x341932F8: E01F B 46L8 ; 0x3419333A
.L5: 0x341932FA: 9808 LDR R0, [SP, #32] 0x341932FC: F10D 0113 ADD.W R1, SP, #19 0x34193300: F7F8 FF40 BL SFDP_BuildGenericDriver ; 0x3418C184 0x34193304: B118 CBZ R0, .L6 ; 0x3419330E 0x34193306: 20FD MOVS R0, #253 0x34193308: F88D 001F STRB.W R0, [SP, #31] 0x3419330C: E015 B 46L8 ; 0x3419333A
.L6: 0x3419330E: F89D 0013 LDRB.W R0, [SP, #19] 0x34193312: B948 CBNZ R0, .L7 ; 0x34193328 0x34193314: 9808 LDR R0, [SP, #32] 0x34193316: 6800 LDR R0, [R0] 0x34193318: B130 CBZ R0, .L7 ; 0x34193328 0x3419331A: 9808 LDR R0, [SP, #32] 0x3419331C: 9909 LDR R1, [SP, #36] 0x3419331E: F850 2B08 LDR R2, [R0], #8 0x34193322: AB02 ADD R3, SP, #8 0x34193324: F7F9 FE86 BL SAL_XSPI_SetClock ; 0x3418D034
.L7: 0x34193328: 9808 LDR R0, [SP, #32] 0x3419332A: A905 ADD R1, SP, #20 0x3419332C: F7FF FB94 BL SFDP_ReadHeader ; 0x34192A58 0x34193330: B118 CBZ R0, .L8 ; 0x3419333A 0x34193332: 20F2 MOVS R0, #242 0x34193334: F88D 001F STRB.W R0, [SP, #31] 0x34193338: E7FF B 46L8 ; 0x3419333A
.L8: 0x3419333A: F99D 001F LDRSB.W R0, [SP, #31] 0x3419333E: B00C ADD SP, SP, #48 0x34193340: BD80 POP 123R7, PC}

Section .init.TIM13_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM13_IRQHandler: 0x34193342: E7FE B TIM13_IRQHandler ; 0x34193342

Section .text.EXTMEM_DRIVER_NOR_SFDP_Enable_MemoryMappedMode from blto2_FSBL_lto.o, size=58, align=4


EXTMEM_DRIVER_NOR_SFDP_Enable_MemoryMappedMode: 0x34193344: B580 PUSH 123R7, LR} 0x34193346: B084 SUB SP, SP, #16 0x34193348: 9003 STR R0, [SP, #12] 0x3419334A: F04F 0C00 MOV.W R12, #0 0x3419334E: F88D C00B STRB.W R12, [SP, #11] 0x34193352: 9903 LDR R1, [SP, #12] 0x34193354: F101 0008 ADD.W R0, R1, #8 0x34193358: F891 2050 LDRB.W R2, [R1, #80] 0x3419335C: F891 3075 LDRB.W R3, [R1, #117] 0x34193360: F891 1076 LDRB.W R1, [R1, #118] 0x34193364: 46EE MOV LR, SP 0x34193366: F8CE C000 STR.W R12, [LR] 0x3419336A: F7FA F821 BL SAL_XSPI_EnableMapMode ; 0x3418D3B0 0x3419336E: B110 CBZ R0, .L1 ; 0x34193376 0x34193370: 20F3 MOVS R0, #243 0x34193372: F88D 000B STRB.W R0, [SP, #11]
.L1: 0x34193376: F99D 000B LDRSB.W R0, [SP, #11] 0x3419337A: B004 ADD SP, SP, #16 0x3419337C: BD80 POP 123R7, PC}

Section .init.TIM14_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM14_IRQHandler: 0x3419337E: E7FE B TIM14_IRQHandler ; 0x3419337E

Section .text.SAL_XSPI_Init from blto2_FSBL_lto.o, size=86, align=4


SAL_XSPI_Init: 0x34193380: B580 PUSH 123R7, LR} 0x34193382: B098 SUB SP, SP, #96 0x34193384: 9017 STR R0, [SP, #92] 0x34193386: 9116 STR R1, [SP, #88] 0x34193388: A803 ADD R0, SP, #12 0x3419338A: 9001 STR R0, [SP, #4] 0x3419338C: 214C MOVS R1, #76 0x3419338E: 9102 STR R1, [SP, #8] 0x34193390: F7FA FAAE BL __aeabi_memclr ; 0x3418D8F0 0x34193394: 9901 LDR R1, [SP, #4] 0x34193396: 9A02 LDR R2, [SP, #8] 0x34193398: 205A MOVS R0, #90 0x3419339A: 9005 STR R0, [SP, #20] 0x3419339C: 2001 MOVS R0, #1 0x3419339E: 9006 STR R0, [SP, #24] 0x341933A0: F44F 7080 MOV.W R0, #0x0100 0x341933A4: 900A STR R0, [SP, #40] 0x341933A6: F44F 5000 MOV.W R0, #0x2000 0x341933AA: 900B STR R0, [SP, #44] 0x341933AC: F04F 7080 MOV.W R0, #0x01000000 0x341933B0: 9011 STR R0, [SP, #68] 0x341933B2: 2008 MOVS R0, #8 0x341933B4: 9014 STR R0, [SP, #80] 0x341933B6: 9816 LDR R0, [SP, #88] 0x341933B8: 9B17 LDR R3, [SP, #92] 0x341933BA: 6018 STR R0, [R3] 0x341933BC: 9817 LDR R0, [SP, #92] 0x341933BE: 3004 ADDS R0, #4 0x341933C0: F7FA FA77 BL __aeabi_memcpy4 ; 0x3418D8B2 0x341933C4: 9917 LDR R1, [SP, #92] 0x341933C6: 2000 MOVS R0, #0 0x341933C8: F881 0050 STRB.W R0, [R1, #80] 0x341933CC: 9917 LDR R1, [SP, #92] 0x341933CE: F881 0052 STRB.W R0, [R1, #82] 0x341933D2: B018 ADD SP, SP, #96 0x341933D4: BD80 POP 123R7, PC}

Section .init.TIM15_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM15_IRQHandler: 0x341933D6: E7FE B TIM15_IRQHandler ; 0x341933D6

Section .text.SAL_XSPI_MemoryConfig from blto2_FSBL_lto.o, size=666, align=4


SAL_XSPI_MemoryConfig: 0x341933D8: B580 PUSH 123R7, LR} 0x341933DA: B09A SUB SP, SP, #104 0x341933DC: 9019 STR R0, [SP, #100] 0x341933DE: F88D 1063 STRB.W R1, [SP, #99] 0x341933E2: 9217 STR R2, [SP, #92] 0x341933E4: 2000 MOVS R0, #0 0x341933E6: F88D 005B STRB.W R0, [SP, #91] 0x341933EA: 9819 LDR R0, [SP, #100] 0x341933EC: 1D01 ADDS R1, R0, #4 0x341933EE: A803 ADD R0, SP, #12 0x341933F0: 224C MOVS R2, #76 0x341933F2: F7FA FA5E BL __aeabi_memcpy4 ; 0x3418D8B2 0x341933F6: F89D 0063 LDRB.W R0, [SP, #99] 0x341933FA: 4601 MOV R1, R0 0x341933FC: 9101 STR R1, [SP, #4] 0x341933FE: 2804 CMP R0, #4 0x34193400: F200 812A BHI.W 46L3 ; 0x34193658 0x34193404: 9901 LDR R1, [SP, #4] 0x34193406: E8DF F011 TBH 91PC, R1, LSL #1] 0x3419340A: 05 DC.B 0x05 ; '\x05' 0x3419340B: 00 DC.B 0x00 ; '\0' 0x3419340C: 1F DC.B 0x1F ; '\x1F' 0x3419340D: 01 DC.B 0x01 ; '\x01' 0x3419340E: 08 DC.B 0x08 ; '\b' 0x3419340F: 01 DC.B 0x01 ; '\x01' 0x34193410: 27 DC.B 0x27 ; ''' 0x34193411: 01 DC.B 0x01 ; '\x01' 0x34193412: 0C DC.B 0x0C ; '\x0C' 0x34193413: 01 DC.B 0x01 ; '\x01' 0x34193414: 9817 LDR R0, [SP, #92] 0x34193416: 7800 LDRB R0, [R0] 0x34193418: 9919 LDR R1, [SP, #100] 0x3419341A: F881 0052 STRB.W R0, [R1, #82] 0x3419341E: 9819 LDR R0, [SP, #100] 0x34193420: F890 0052 LDRB.W R0, [R0, #82] 0x34193424: 4601 MOV R1, R0 0x34193426: 9100 STR R1, [SP, #0] 0x34193428: 280D CMP R0, #13 0x3419342A: F200 80F2 BHI.W 46L1 ; 0x34193612 0x3419342E: 9900 LDR R1, [SP, #0] 0x34193430: E8DF F001 TBB 91PC, R1] 0x34193434: 07 DC.B 0x07 ; '\x07' 0x34193435: 07 DC.B 0x07 ; '\x07' 0x34193436: 07 DC.B 0x07 ; '\x07' 0x34193437: 07 DC.B 0x07 ; '\x07' 0x34193438: 1B DC.B 0x1B ; '\x1B' 0x34193439: 2F DC.B 0x2F ; '/' 0x3419343A: 43 DC.B 0x43 ; 'C' 0x3419343B: 43 DC.B 0x43 ; 'C' 0x3419343C: 57 DC.B 0x57 ; 'W' 0x3419343D: 70 DC.B 0x70 ; 'p' 0x3419343E: 84 DC.B 0x84 ; '\x84' 0x3419343F: 9E DC.B 0x9E ; '\x9E' 0x34193440: B9 DC.B 0xB9 ; '\xB9' 0x34193441: D4 DC.B 0xD4 ; '\xD4' 0x34193442: 2001 MOVS R0, #1 0x34193444: 9006 STR R0, [SP, #24] 0x34193446: 2000 MOVS R0, #0 0x34193448: 9007 STR R0, [SP, #28] 0x3419344A: 9008 STR R0, [SP, #32] 0x3419344C: F44F 7180 MOV.W R1, #0x0100 0x34193450: 910A STR R1, [SP, #40] 0x34193452: F44F 5100 MOV.W R1, #0x2000 0x34193456: 910B STR R1, [SP, #44] 0x34193458: 900C STR R0, [SP, #48] 0x3419345A: F04F 7180 MOV.W R1, #0x01000000 0x3419345E: 9111 STR R1, [SP, #68] 0x34193460: 9013 STR R0, [SP, #76] 0x34193462: 2108 MOVS R1, #8 0x34193464: 9114 STR R1, [SP, #80] 0x34193466: 9015 STR R0, [SP, #84] 0x34193468: E0D6 B 46L2 ; 0x34193618 0x3419346A: 2001 MOVS R0, #1 0x3419346C: 9006 STR R0, [SP, #24] 0x3419346E: 2000 MOVS R0, #0 0x34193470: 9007 STR R0, [SP, #28] 0x34193472: 9008 STR R0, [SP, #32] 0x34193474: F44F 7180 MOV.W R1, #0x0100 0x34193478: 910A STR R1, [SP, #40] 0x3419347A: 900C STR R0, [SP, #48] 0x3419347C: F44F 5100 MOV.W R1, #0x2000 0x34193480: 910B STR R1, [SP, #44] 0x34193482: F04F 7140 MOV.W R1, #0x03000000 0x34193486: 9111 STR R1, [SP, #68] 0x34193488: 9013 STR R0, [SP, #76] 0x3419348A: 2106 MOVS R1, #6 0x3419348C: 9114 STR R1, [SP, #80] 0x3419348E: 9015 STR R0, [SP, #84] 0x34193490: E0C2 B 46L2 ; 0x34193618 0x34193492: 2001 MOVS R0, #1 0x34193494: 9006 STR R0, [SP, #24] 0x34193496: 2000 MOVS R0, #0 0x34193498: 9007 STR R0, [SP, #28] 0x3419349A: 9008 STR R0, [SP, #32] 0x3419349C: F44F 7140 MOV.W R1, #0x0300 0x341934A0: 910A STR R1, [SP, #40] 0x341934A2: 900C STR R0, [SP, #48] 0x341934A4: F44F 5100 MOV.W R1, #0x2000 0x341934A8: 910B STR R1, [SP, #44] 0x341934AA: F04F 7140 MOV.W R1, #0x03000000 0x341934AE: 9111 STR R1, [SP, #68] 0x341934B0: 9013 STR R0, [SP, #76] 0x341934B2: 2106 MOVS R1, #6 0x341934B4: 9114 STR R1, [SP, #80] 0x341934B6: 9015 STR R0, [SP, #84] 0x341934B8: E0AE B 46L2 ; 0x34193618 0x341934BA: 2003 MOVS R0, #3 0x341934BC: 9006 STR R0, [SP, #24] 0x341934BE: 2000 MOVS R0, #0 0x341934C0: 9007 STR R0, [SP, #28] 0x341934C2: 9008 STR R0, [SP, #32] 0x341934C4: F44F 7140 MOV.W R1, #0x0300 0x341934C8: 910A STR R1, [SP, #40] 0x341934CA: 900C STR R0, [SP, #48] 0x341934CC: F44F 5100 MOV.W R1, #0x2000 0x341934D0: 910B STR R1, [SP, #44] 0x341934D2: F04F 7140 MOV.W R1, #0x03000000 0x341934D6: 9111 STR R1, [SP, #68] 0x341934D8: 9013 STR R0, [SP, #76] 0x341934DA: 2106 MOVS R1, #6 0x341934DC: 9114 STR R1, [SP, #80] 0x341934DE: 9015 STR R0, [SP, #84] 0x341934E0: E09A B 46L2 ; 0x34193618 0x341934E2: 2003 MOVS R0, #3 0x341934E4: 9006 STR R0, [SP, #24] 0x341934E6: 2000 MOVS R0, #0 0x341934E8: 9007 STR R0, [SP, #28] 0x341934EA: 2108 MOVS R1, #8 0x341934EC: 9108 STR R1, [SP, #32] 0x341934EE: F44F 7140 MOV.W R1, #0x0300 0x341934F2: 910A STR R1, [SP, #40] 0x341934F4: F44F 5100 MOV.W R1, #0x2000 0x341934F8: 910B STR R1, [SP, #44] 0x341934FA: F44F 6100 MOV.W R1, #0x0800 0x341934FE: 910C STR R1, [SP, #48] 0x34193500: F04F 7140 MOV.W R1, #0x03000000 0x34193504: 9111 STR R1, [SP, #68] 0x34193506: F04F 6100 MOV.W R1, #0x08000000 0x3419350A: 9113 STR R1, [SP, #76] 0x3419350C: 2106 MOVS R1, #6 0x3419350E: 9114 STR R1, [SP, #80] 0x34193510: 9015 STR R0, [SP, #84] 0x34193512: E081 B 46L2 ; 0x34193618 0x34193514: 2001 MOVS R0, #1 0x34193516: 9006 STR R0, [SP, #24] 0x34193518: 2000 MOVS R0, #0 0x3419351A: 9007 STR R0, [SP, #28] 0x3419351C: 9008 STR R0, [SP, #32] 0x3419351E: F44F 6180 MOV.W R1, #0x0400 0x34193522: 910A STR R1, [SP, #40] 0x34193524: F44F 5140 MOV.W R1, #0x3000 0x34193528: 910B STR R1, [SP, #44] 0x3419352A: 900C STR R0, [SP, #48] 0x3419352C: F04F 6180 MOV.W R1, #0x04000000 0x34193530: 9111 STR R1, [SP, #68] 0x34193532: 9013 STR R0, [SP, #76] 0x34193534: 2108 MOVS R1, #8 0x34193536: 9114 STR R1, [SP, #80] 0x34193538: 9015 STR R0, [SP, #84] 0x3419353A: E06D B 46L2 ; 0x34193618 0x3419353C: 2004 MOVS R0, #4 0x3419353E: 9006 STR R0, [SP, #24] 0x34193540: 2000 MOVS R0, #0 0x34193542: 9007 STR R0, [SP, #28] 0x34193544: 9008 STR R0, [SP, #32] 0x34193546: F44F 6080 MOV.W R0, #0x0400 0x3419354A: 900A STR R0, [SP, #40] 0x3419354C: F44F 5040 MOV.W R0, #0x3000 0x34193550: 900B STR R0, [SP, #44] 0x34193552: F44F 6000 MOV.W R0, #0x0800 0x34193556: 900C STR R0, [SP, #48] 0x34193558: F04F 6080 MOV.W R0, #0x04000000 0x3419355C: 9011 STR R0, [SP, #68] 0x3419355E: F04F 6000 MOV.W R0, #0x08000000 0x34193562: 9013 STR R0, [SP, #76] 0x34193564: 2008 MOVS R0, #8 0x34193566: 9014 STR R0, [SP, #80] 0x34193568: F04F 5000 MOV.W R0, #0x20000000 0x3419356C: 9015 STR R0, [SP, #84] 0x3419356E: E053 B 46L2 ; 0x34193618 0x34193570: 2004 MOVS R0, #4 0x34193572: 9006 STR R0, [SP, #24] 0x34193574: 2010 MOVS R0, #16 0x34193576: 9007 STR R0, [SP, #28] 0x34193578: 2008 MOVS R0, #8 0x3419357A: 9008 STR R0, [SP, #32] 0x3419357C: F44F 6080 MOV.W R0, #0x0400 0x34193580: 900A STR R0, [SP, #40] 0x34193582: F44F 5040 MOV.W R0, #0x3000 0x34193586: 900B STR R0, [SP, #44] 0x34193588: F44F 6000 MOV.W R0, #0x0800 0x3419358C: 900C STR R0, [SP, #48] 0x3419358E: F04F 6080 MOV.W R0, #0x04000000 0x34193592: 9011 STR R0, [SP, #68] 0x34193594: F04F 6000 MOV.W R0, #0x08000000 0x34193598: 9013 STR R0, [SP, #76] 0x3419359A: 2014 MOVS R0, #20 0x3419359C: 9014 STR R0, [SP, #80] 0x3419359E: F04F 5000 MOV.W R0, #0x20000000 0x341935A2: 9015 STR R0, [SP, #84] 0x341935A4: E038 B 46L2 ; 0x34193618 0x341935A6: 2004 MOVS R0, #4 0x341935A8: 9006 STR R0, [SP, #24] 0x341935AA: 2000 MOVS R0, #0 0x341935AC: 9007 STR R0, [SP, #28] 0x341935AE: 9008 STR R0, [SP, #32] 0x341935B0: F44F 6180 MOV.W R1, #0x0400 0x341935B4: 910A STR R1, [SP, #40] 0x341935B6: F44F 5140 MOV.W R1, #0x3000 0x341935BA: 910B STR R1, [SP, #44] 0x341935BC: F44F 6100 MOV.W R1, #0x0800 0x341935C0: 910C STR R1, [SP, #48] 0x341935C2: 900E STR R0, [SP, #56] 0x341935C4: F04F 6080 MOV.W R0, #0x04000000 0x341935C8: 9011 STR R0, [SP, #68] 0x341935CA: F04F 6000 MOV.W R0, #0x08000000 0x341935CE: 9013 STR R0, [SP, #76] 0x341935D0: 200A MOVS R0, #10 0x341935D2: 9014 STR R0, [SP, #80] 0x341935D4: F04F 5000 MOV.W R0, #0x20000000 0x341935D8: 9015 STR R0, [SP, #84] 0x341935DA: E01D B 46L2 ; 0x34193618 0x341935DC: 2004 MOVS R0, #4 0x341935DE: 9006 STR R0, [SP, #24] 0x341935E0: 2000 MOVS R0, #0 0x341935E2: 9007 STR R0, [SP, #28] 0x341935E4: 9008 STR R0, [SP, #32] 0x341935E6: F44F 6180 MOV.W R1, #0x0400 0x341935EA: 910A STR R1, [SP, #40] 0x341935EC: F44F 5140 MOV.W R1, #0x3000 0x341935F0: 910B STR R1, [SP, #44] 0x341935F2: F44F 6100 MOV.W R1, #0x0800 0x341935F6: 910C STR R1, [SP, #48] 0x341935F8: 900E STR R0, [SP, #56] 0x341935FA: F04F 60A0 MOV.W R0, #0x05000000 0x341935FE: 9011 STR R0, [SP, #68] 0x34193600: F04F 6000 MOV.W R0, #0x08000000 0x34193604: 9013 STR R0, [SP, #76] 0x34193606: 200A MOVS R0, #10 0x34193608: 9014 STR R0, [SP, #80] 0x3419360A: F04F 5000 MOV.W R0, #0x20000000 0x3419360E: 9015 STR R0, [SP, #84] 0x34193610: E002 B 46L2 ; 0x34193618
.L1: 0x34193612: 2001 MOVS R0, #1 0x34193614: F88D 005B STRB.W R0, [SP, #91]
.L2: 0x34193618: E021 B 46L4 ; 0x3419365E 0x3419361A: F44F 5040 MOV.W R0, #0x3000 0x3419361E: 900B STR R0, [SP, #44] 0x34193620: E01D B 46L4 ; 0x3419365E 0x34193622: 9817 LDR R0, [SP, #92] 0x34193624: 7800 LDRB R0, [R0] 0x34193626: F88D 000B STRB.W R0, [SP, #11] 0x3419362A: 9819 LDR R0, [SP, #100] 0x3419362C: 6800 LDR R0, [R0] 0x3419362E: 6800 LDR R0, [R0] 0x34193630: 6880 LDR R0, [R0, #8] 0x34193632: F420 10F8 BIC R0, R0, #0x1F0000 0x34193636: F89D 100B LDRB.W R1, [SP, #11] 0x3419363A: EA40 4001 ORR.W R0, R0, R1, LSL #16 0x3419363E: 9919 LDR R1, [SP, #100] 0x34193640: 6809 LDR R1, [R1] 0x34193642: 6809 LDR R1, [R1] 0x34193644: 6088 STR R0, [R1, #8] 0x34193646: E00A B 46L4 ; 0x3419365E 0x34193648: 9817 LDR R0, [SP, #92] 0x3419364A: 7800 LDRB R0, [R0] 0x3419364C: F88D 000A STRB.W R0, [SP, #10] 0x34193650: F89D 000A LDRB.W R0, [SP, #10] 0x34193654: 9014 STR R0, [SP, #80] 0x34193656: E002 B 46L4 ; 0x3419365E
.L3: 0x34193658: 2001 MOVS R0, #1 0x3419365A: F88D 005B STRB.W R0, [SP, #91]
.L4: 0x3419365E: 9819 LDR R0, [SP, #100] 0x34193660: 3004 ADDS R0, #4 0x34193662: A903 ADD R1, SP, #12 0x34193664: 224C MOVS R2, #76 0x34193666: F7FA F924 BL __aeabi_memcpy4 ; 0x3418D8B2 0x3419366A: F89D 005B LDRB.W R0, [SP, #91] 0x3419366E: B01A ADD SP, SP, #104 0x34193670: BD80 POP 123R7, PC}

Section .init.TIM16_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM16_IRQHandler: 0x34193672: E7FE B TIM16_IRQHandler ; 0x34193672

Section .text.SAL_XSPI_GetSFDP from blto2_FSBL_lto.o, size=222, align=4


SAL_XSPI_GetSFDP: 0x34193674: B580 PUSH 123R7, LR} 0x34193676: B098 SUB SP, SP, #96 0x34193678: 9017 STR R0, [SP, #92] 0x3419367A: 9116 STR R1, [SP, #88] 0x3419367C: 9215 STR R2, [SP, #84] 0x3419367E: 9314 STR R3, [SP, #80] 0x34193680: 9817 LDR R0, [SP, #92] 0x34193682: 1D01 ADDS R1, R0, #4 0x34193684: 4668 MOV R0, SP 0x34193686: 224C MOVS R2, #76 0x34193688: F7FA F913 BL __aeabi_memcpy4 ; 0x3418D8B2 0x3419368C: 9817 LDR R0, [SP, #92] 0x3419368E: F890 0050 LDRB.W R0, [R0, #80] 0x34193692: 9904 LDR R1, [SP, #16] 0x34193694: 225A MOVS R2, #90 0x34193696: F7F9 FD07 BL XSPI_FormatCommand ; 0x3418D0A8 0x3419369A: 9002 STR R0, [SP, #8] 0x3419369C: 9816 LDR R0, [SP, #88] 0x3419369E: 9006 STR R0, [SP, #24] 0x341936A0: 9814 LDR R0, [SP, #80] 0x341936A2: 900F STR R0, [SP, #60] 0x341936A4: 9817 LDR R0, [SP, #92] 0x341936A6: F890 0051 LDRB.W R0, [R0, #81] 0x341936AA: 9011 STR R0, [SP, #68] 0x341936AC: 9807 LDR R0, [SP, #28] 0x341936AE: F5B0 7F80 CMP.W R0, #0x0100 0x341936B2: D003 BEQ 46L1 ; 0x341936BC 0x341936B4: 9807 LDR R0, [SP, #28] 0x341936B6: F5B0 7F40 CMP.W R0, #0x0300 0x341936BA: D102 BNE 46L2 ; 0x341936C2
.L1: 0x341936BC: F44F 5000 MOV.W R0, #0x2000 0x341936C0: 9008 STR R0, [SP, #32]
.L2: 0x341936C2: 9817 LDR R0, [SP, #92] 0x341936C4: F890 0052 LDRB.W R0, [R0, #82] 0x341936C8: 2801 CMP R0, #1 0x341936CA: D013 BEQ 46L3 ; 0x341936F4 0x341936CC: 9817 LDR R0, [SP, #92] 0x341936CE: F890 0052 LDRB.W R0, [R0, #82] 0x341936D2: 2802 CMP R0, #2 0x341936D4: D00E BEQ 46L3 ; 0x341936F4 0x341936D6: 9817 LDR R0, [SP, #92] 0x341936D8: F890 0052 LDRB.W R0, [R0, #82] 0x341936DC: 2803 CMP R0, #3 0x341936DE: D009 BEQ 46L3 ; 0x341936F4 0x341936E0: 9817 LDR R0, [SP, #92] 0x341936E2: F890 0052 LDRB.W R0, [R0, #82] 0x341936E6: 2804 CMP R0, #4 0x341936E8: D004 BEQ 46L3 ; 0x341936F4 0x341936EA: 9817 LDR R0, [SP, #92] 0x341936EC: F890 0052 LDRB.W R0, [R0, #82] 0x341936F0: 2805 CMP R0, #5 0x341936F2: D105 BNE 46L4 ; 0x34193700
.L3: 0x341936F4: F44F 7080 MOV.W R0, #0x0100 0x341936F8: 9007 STR R0, [SP, #28] 0x341936FA: F04F 7080 MOV.W R0, #0x01000000 0x341936FE: 900E STR R0, [SP, #56]
.L4: 0x34193700: 9810 LDR R0, [SP, #64] 0x34193702: F1B0 6F00 CMP.W R0, #0x08000000 0x34193706: D103 BNE 46L5 ; 0x34193710 0x34193708: F04F 5000 MOV.W R0, #0x20000000 0x3419370C: 9012 STR R0, [SP, #72] 0x3419370E: E001 B 46L6 ; 0x34193714
.L5: 0x34193710: 2000 MOVS R0, #0 0x34193712: 9012 STR R0, [SP, #72]
.L6: 0x34193714: 9817 LDR R0, [SP, #92] 0x34193716: 6800 LDR R0, [R0] 0x34193718: 4669 MOV R1, SP 0x3419371A: 2264 MOVS R2, #100 0x3419371C: F7FE FAAE BL HAL_XSPI_Command ; 0x34191C7C 0x34193720: F88D 004F STRB.W R0, [SP, #79] 0x34193724: F89D 004F LDRB.W R0, [SP, #79] 0x34193728: B100 CBZ R0, .L7 ; 0x3419372C 0x3419372A: E007 B 46L8 ; 0x3419373C
.L7: 0x3419372C: 9817 LDR R0, [SP, #92] 0x3419372E: 6800 LDR R0, [R0] 0x34193730: 9915 LDR R1, [SP, #84] 0x34193732: 2264 MOVS R2, #100 0x34193734: F7F8 F9E2 BL HAL_XSPI_Receive ; 0x3418BAFC 0x34193738: F88D 004F STRB.W R0, [SP, #79]
.L8: 0x3419373C: F89D 004F LDRB.W R0, [SP, #79] 0x34193740: B118 CBZ R0, .L9 ; 0x3419374A 0x34193742: 9817 LDR R0, [SP, #92] 0x34193744: 6800 LDR R0, [R0] 0x34193746: F7FE FEA7 BL HAL_XSPI_Abort ; 0x34192498
.L9: 0x3419374A: F89D 004F LDRB.W R0, [SP, #79] 0x3419374E: B018 ADD SP, SP, #96 0x34193750: BD80 POP 123R7, PC}

Section .init.TIM17_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM17_IRQHandler: 0x34193752: E7FE B TIM17_IRQHandler ; 0x34193752

Section .text.SAL_XSPI_Write from blto2_FSBL_lto.o, size=138, align=4


SAL_XSPI_Write: 0x34193754: B580 PUSH 123R7, LR} 0x34193756: B098 SUB SP, SP, #96 0x34193758: F8DD C068 LDR.W R12, [SP, #104] 0x3419375C: 9017 STR R0, [SP, #92] 0x3419375E: F88D 105B STRB.W R1, [SP, #91] 0x34193762: 9215 STR R2, [SP, #84] 0x34193764: 9314 STR R3, [SP, #80] 0x34193766: 9817 LDR R0, [SP, #92] 0x34193768: 1D01 ADDS R1, R0, #4 0x3419376A: 4668 MOV R0, SP 0x3419376C: 224C MOVS R2, #76 0x3419376E: F7FA F8A0 BL __aeabi_memcpy4 ; 0x3418D8B2 0x34193772: 9817 LDR R0, [SP, #92] 0x34193774: F890 0050 LDRB.W R0, [R0, #80] 0x34193778: 9904 LDR R1, [SP, #16] 0x3419377A: F89D 205B LDRB.W R2, [SP, #91] 0x3419377E: F7F9 FC93 BL XSPI_FormatCommand ; 0x3418D0A8 0x34193782: 9002 STR R0, [SP, #8] 0x34193784: 9815 LDR R0, [SP, #84] 0x34193786: 9006 STR R0, [SP, #24] 0x34193788: 981A LDR R0, [SP, #104] 0x3419378A: 900F STR R0, [SP, #60] 0x3419378C: 2000 MOVS R0, #0 0x3419378E: 9011 STR R0, [SP, #68] 0x34193790: 9012 STR R0, [SP, #72] 0x34193792: 9810 LDR R0, [SP, #64] 0x34193794: F1B0 6F00 CMP.W R0, #0x08000000 0x34193798: D104 BNE 46L1 ; 0x341937A4 0x3419379A: 980F LDR R0, [SP, #60] 0x3419379C: 2801 CMP R0, #1 0x3419379E: D101 BNE 46L1 ; 0x341937A4 0x341937A0: 2002 MOVS R0, #2 0x341937A2: 900F STR R0, [SP, #60]
.L1: 0x341937A4: 9817 LDR R0, [SP, #92] 0x341937A6: 6800 LDR R0, [R0] 0x341937A8: 4669 MOV R1, SP 0x341937AA: 2264 MOVS R2, #100 0x341937AC: F7FE FA66 BL HAL_XSPI_Command ; 0x34191C7C 0x341937B0: F88D 004F STRB.W R0, [SP, #79] 0x341937B4: F89D 004F LDRB.W R0, [SP, #79] 0x341937B8: B100 CBZ R0, .L2 ; 0x341937BC 0x341937BA: E005 B 46L3 ; 0x341937C8
.L2: 0x341937BC: 9817 LDR R0, [SP, #92] 0x341937BE: 9914 LDR R1, [SP, #80] 0x341937C0: F7F9 FCEA BL XSPI_Transmit ; 0x3418D198 0x341937C4: F88D 004F STRB.W R0, [SP, #79]
.L3: 0x341937C8: F89D 004F LDRB.W R0, [SP, #79] 0x341937CC: B118 CBZ R0, .L4 ; 0x341937D6 0x341937CE: 9817 LDR R0, [SP, #92] 0x341937D0: 6800 LDR R0, [R0] 0x341937D2: F7FE FE61 BL HAL_XSPI_Abort ; 0x34192498
.L4: 0x341937D6: F89D 004F LDRB.W R0, [SP, #79] 0x341937DA: B018 ADD SP, SP, #96 0x341937DC: BD80 POP 123R7, PC}

Section .init.TIM18_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM18_IRQHandler: 0x341937DE: E7FE B TIM18_IRQHandler ; 0x341937DE

Section .text.SAL_XSPI_CommandSendReadAddress from blto2_FSBL_lto.o, size=190, align=4


SAL_XSPI_CommandSendReadAddress: 0x341937E0: B510 PUSH 123R4, LR} 0x341937E2: B09A SUB SP, SP, #104 0x341937E4: 468C MOV R12, R1 0x341937E6: 4686 MOV LR, R0 0x341937E8: 981D LDR R0, [SP, #116] 0x341937EA: 991C LDR R1, [SP, #112] 0x341937EC: F8CD E064 STR.W LR, [SP, #100] 0x341937F0: F88D C063 STRB.W R12, [SP, #99] 0x341937F4: 9217 STR R2, [SP, #92] 0x341937F6: 9316 STR R3, [SP, #88] 0x341937F8: F8AD 1056 STRH.W R1, [SP, #86] 0x341937FC: F88D 0055 STRB.W R0, [SP, #85] 0x34193800: 9819 LDR R0, [SP, #100] 0x34193802: 1D01 ADDS R1, R0, #4 0x34193804: A802 ADD R0, SP, #8 0x34193806: 224C MOVS R2, #76 0x34193808: F7FA F853 BL __aeabi_memcpy4 ; 0x3418D8B2 0x3419380C: 9819 LDR R0, [SP, #100] 0x3419380E: F890 0050 LDRB.W R0, [R0, #80] 0x34193812: 9906 LDR R1, [SP, #24] 0x34193814: F89D 2063 LDRB.W R2, [SP, #99] 0x34193818: F7F9 FC46 BL XSPI_FormatCommand ; 0x3418D0A8 0x3419381C: 9004 STR R0, [SP, #16] 0x3419381E: 9817 LDR R0, [SP, #92] 0x34193820: 9008 STR R0, [SP, #32] 0x34193822: 9819 LDR R0, [SP, #100] 0x34193824: F890 0051 LDRB.W R0, [R0, #81] 0x34193828: 9013 STR R0, [SP, #76] 0x3419382A: F8BD 0056 LDRH.W R0, [SP, #86] 0x3419382E: 9011 STR R0, [SP, #68] 0x34193830: F89D 0055 LDRB.W R0, [SP, #85] 0x34193834: 28C2 CMP R0, #194 0x34193836: D106 BNE 46L1 ; 0x34193846 0x34193838: 9812 LDR R0, [SP, #72] 0x3419383A: F1B0 6F00 CMP.W R0, #0x08000000 0x3419383E: D102 BNE 46L1 ; 0x34193846 0x34193840: 2000 MOVS R0, #0 0x34193842: 9012 STR R0, [SP, #72] 0x34193844: E00D B 46L3 ; 0x34193862
.L1: 0x34193846: F89D 0055 LDRB.W R0, [SP, #85] 0x3419384A: 28C8 CMP R0, #200 0x3419384C: D107 BNE 46L2 ; 0x3419385E 0x3419384E: 9812 LDR R0, [SP, #72] 0x34193850: F1B0 6F00 CMP.W R0, #0x08000000 0x34193854: D103 BNE 46L2 ; 0x3419385E 0x34193856: 2000 MOVS R0, #0 0x34193858: 9012 STR R0, [SP, #72] 0x3419385A: 9014 STR R0, [SP, #80] 0x3419385C: E001 B 46L3 ; 0x34193862
.L2: 0x3419385E: 2000 MOVS R0, #0 0x34193860: 9014 STR R0, [SP, #80]
.L3: 0x34193862: 9819 LDR R0, [SP, #100] 0x34193864: 6800 LDR R0, [R0] 0x34193866: A902 ADD R1, SP, #8 0x34193868: 2264 MOVS R2, #100 0x3419386A: F7FE FA07 BL HAL_XSPI_Command ; 0x34191C7C 0x3419386E: F88D 0007 STRB.W R0, [SP, #7] 0x34193872: F89D 0007 LDRB.W R0, [SP, #7] 0x34193876: B938 CBNZ R0, .L4 ; 0x34193888 0x34193878: 9819 LDR R0, [SP, #100] 0x3419387A: 6800 LDR R0, [R0] 0x3419387C: 9916 LDR R1, [SP, #88] 0x3419387E: 2264 MOVS R2, #100 0x34193880: F7F8 F93C BL HAL_XSPI_Receive ; 0x3418BAFC 0x34193884: F88D 0007 STRB.W R0, [SP, #7]
.L4: 0x34193888: F89D 0007 LDRB.W R0, [SP, #7] 0x3419388C: B118 CBZ R0, .L5 ; 0x34193896 0x3419388E: 9819 LDR R0, [SP, #100] 0x34193890: 6800 LDR R0, [R0] 0x34193892: F7FE FE01 BL HAL_XSPI_Abort ; 0x34192498
.L5: 0x34193896: F89D 0007 LDRB.W R0, [SP, #7] 0x3419389A: B01A ADD SP, SP, #104 0x3419389C: BD10 POP 123R4, PC}

Section .init.LPTIM1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


LPTIM1_IRQHandler: 0x3419389E: E7FE B LPTIM1_IRQHandler ; 0x3419389E

Section .text.SAL_XSPI_DisableMapMode from blto2_FSBL_lto.o, size=22, align=4


SAL_XSPI_DisableMapMode: 0x341938A0: B580 PUSH 123R7, LR} 0x341938A2: B082 SUB SP, SP, #8 0x341938A4: 9001 STR R0, [SP, #4] 0x341938A6: F3BF 8F4F DSB SY 0x341938AA: 9801 LDR R0, [SP, #4] 0x341938AC: 6800 LDR R0, [R0] 0x341938AE: F7FE FDF3 BL HAL_XSPI_Abort ; 0x34192498 0x341938B2: B002 ADD SP, SP, #8 0x341938B4: BD80 POP 123R7, PC}

Section .init.LPTIM2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


LPTIM2_IRQHandler: 0x341938B6: E7FE B LPTIM2_IRQHandler ; 0x341938B6

Section .text.SAL_XSPI_Abort from blto2_FSBL_lto.o, size=18, align=4


SAL_XSPI_Abort: 0x341938B8: B580 PUSH 123R7, LR} 0x341938BA: B082 SUB SP, SP, #8 0x341938BC: 9001 STR R0, [SP, #4] 0x341938BE: 9801 LDR R0, [SP, #4] 0x341938C0: 6800 LDR R0, [R0] 0x341938C2: F7FE FDE9 BL HAL_XSPI_Abort ; 0x34192498 0x341938C6: B002 ADD SP, SP, #8 0x341938C8: BD80 POP 123R7, PC}

Section .init.LPTIM3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


LPTIM3_IRQHandler: 0x341938CA: E7FE B LPTIM3_IRQHandler ; 0x341938CA

Section .text.EXTMEM_Init from blto2_FSBL_lto.o, size=94, align=4


EXTMEM_Init: 0x341938CC: B580 PUSH 123R7, LR} 0x341938CE: B084 SUB SP, SP, #16 0x341938D0: 9003 STR R0, [SP, #12] 0x341938D2: 9102 STR R1, [SP, #8] 0x341938D4: 20FB MOVS R0, #251 0x341938D6: F88D 0007 STRB.W R0, [SP, #7] 0x341938DA: 9803 LDR R0, [SP, #12] 0x341938DC: BB08 CBNZ R0, .L3 ; 0x34193922 0x341938DE: 2000 MOVS R0, #0 0x341938E0: F88D 0007 STRB.W R0, [SP, #7] 0x341938E4: 9803 LDR R0, [SP, #12] 0x341938E6: 21AC MOVS R1, #172 0x341938E8: 4341 MULS R1, R0, R1 0x341938EA: F240 0000 MOVW R0, #0 ; 0x34000000 = extmem_list_config 0x341938EE: F2C3 4000 MOVT R0, #0x3400 ; 0x34000000 = extmem_list_config 0x341938F2: 5C40 LDRB R0, [R0, R1] 0x341938F4: B990 CBNZ R0, .L2 ; 0x3419391C 0x341938F6: 9803 LDR R0, [SP, #12] 0x341938F8: F240 0200 MOVW R2, #0 ; 0x34000000 = extmem_list_config 0x341938FC: F2C3 4200 MOVT R2, #0x3400 ; 0x34000000 = extmem_list_config 0x34193900: 21AC MOVS R1, #172 0x34193902: FB00 2301 MLA R3, R0, R1, R2 0x34193906: 6858 LDR R0, [R3, #4] 0x34193908: 7A19 LDRB R1, [R3, #8] 0x3419390A: 9A02 LDR R2, [SP, #8] 0x3419390C: 330C ADDS R3, #12 0x3419390E: F7FF FC7F BL EXTMEM_DRIVER_NOR_SFDP_Init ; 0x34193210 0x34193912: B110 CBZ R0, .L1 ; 0x3419391A 0x34193914: 20FD MOVS R0, #253 0x34193916: F88D 0007 STRB.W R0, [SP, #7]
.L1: 0x3419391A: E002 B 46L3 ; 0x34193922
.L2: 0x3419391C: 20FE MOVS R0, #254 0x3419391E: F88D 0007 STRB.W R0, [SP, #7]
.L3: 0x34193922: F99D 0007 LDRSB.W R0, [SP, #7] 0x34193926: B004 ADD SP, SP, #16 0x34193928: BD80 POP 123R7, PC}

Section .init.LPTIM4_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


LPTIM4_IRQHandler: 0x3419392A: E7FE B LPTIM4_IRQHandler ; 0x3419392A

Section .text.EXTMEM_DeInit from blto2_FSBL_lto.o, size=78, align=4


EXTMEM_DeInit: 0x3419392C: B580 PUSH 123R7, LR} 0x3419392E: B082 SUB SP, SP, #8 0x34193930: 9001 STR R0, [SP, #4] 0x34193932: 20FB MOVS R0, #251 0x34193934: F88D 0003 STRB.W R0, [SP, #3] 0x34193938: 9801 LDR R0, [SP, #4] 0x3419393A: B9D0 CBNZ R0, .L2 ; 0x34193972 0x3419393C: 2000 MOVS R0, #0 0x3419393E: F88D 0003 STRB.W R0, [SP, #3] 0x34193942: 9801 LDR R0, [SP, #4] 0x34193944: 21AC MOVS R1, #172 0x34193946: 4341 MULS R1, R0, R1 0x34193948: F240 0000 MOVW R0, #0 ; 0x34000000 = extmem_list_config 0x3419394C: F2C3 4000 MOVT R0, #0x3400 ; 0x34000000 = extmem_list_config 0x34193950: 5C40 LDRB R0, [R0, R1] 0x34193952: B958 CBNZ R0, .L1 ; 0x3419396C 0x34193954: 9801 LDR R0, [SP, #4] 0x34193956: F240 0200 MOVW R2, #0 ; 0x34000000 = extmem_list_config 0x3419395A: F2C3 4200 MOVT R2, #0x3400 ; 0x34000000 = extmem_list_config 0x3419395E: 21AC MOVS R1, #172 0x34193960: FB00 2001 MLA R0, R0, R1, R2 0x34193964: 300C ADDS R0, #12 0x34193966: F7F9 FB4B BL EXTMEM_DRIVER_NOR_SFDP_DeInit ; 0x3418D000 0x3419396A: E002 B 46L2 ; 0x34193972
.L1: 0x3419396C: 20FE MOVS R0, #254 0x3419396E: F88D 0003 STRB.W R0, [SP, #3]
.L2: 0x34193972: F99D 0003 LDRSB.W R0, [SP, #3] 0x34193976: B002 ADD SP, SP, #8 0x34193978: BD80 POP 123R7, PC}

Section .init.LPTIM5_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


LPTIM5_IRQHandler: 0x3419397A: E7FE B LPTIM5_IRQHandler ; 0x3419397A

Section .text.libc.__aeabi_f2ulz from floatasmops_arm.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=62, align=4


__aeabi_f2ulz: 0x3419397C: 0042 LSLS R2, R0, #1 0x3419397E: D215 BCS 46L3 ; 0x341939AC 0x34193980: 0E12 LSRS R2, R2, #24 0x34193982: F1D2 029E RSBS R2, R2, #158 0x34193986: 2A20 CMP R2, #32 0x34193988: D205 BCS 46L1 ; 0x34193996 0x3419398A: 0200 LSLS R0, R0, #8 0x3419398C: F040 4000 ORR R0, R0, #0x80000000 0x34193990: 40D0 LSRS R0, R2 0x34193992: 2100 MOVS R1, #0 0x34193994: 4770 BX LR
.L1: 0x34193996: 3220 ADDS R2, #32 0x34193998: D307 BCC 46L2 ; 0x341939AA 0x3419399A: 0201 LSLS R1, R0, #8 0x3419399C: F041 4100 ORR R1, R1, #0x80000000 0x341939A0: FA61 F002 ROR.W R0, R1, R2 0x341939A4: 40D1 LSRS R1, R2 0x341939A6: 4048 EORS R0, R1 0x341939A8: 4770 BX LR
.L2: 0x341939AA: DD02 BLE 46L4 ; 0x341939B2
.L3: 0x341939AC: 2000 MOVS R0, #0 0x341939AE: 2100 MOVS R1, #0 0x341939B0: 4770 BX LR
.L4: 0x341939B2: F06F 0000 MVN R0, #0 0x341939B6: 4601 MOV R1, R0 0x341939B8: 4770 BX LR

Section .init.ADF1_FLT0_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


ADF1_FLT0_IRQHandler: 0x341939BA: E7FE B ADF1_FLT0_IRQHandler ; 0x341939BA

Section .text.libc.__aeabi_uldivmod from intasmops_arm.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=302, align=4


__aeabi_uldivmod: 0x341939BC: 2B00 CMP R3, #0 0x341939BE: D135 BNE 46L3 ; 0x34193A2C 0x341939C0: B929 CBNZ R1, .L1 ; 0x341939CE 0x341939C2: FBB0 FCF2 UDIV R12, R0, R2 0x341939C6: FB0C 0212 MLS R2, R12, R2, R0 0x341939CA: 4660 MOV R0, R12 0x341939CC: 4770 BX LR
.L1: 0x341939CE: 4291 CMP R1, R2 0x341939D0: D215 BCS 46L2 ; 0x341939FE 0x341939D2: E92D 41F0 PUSH.W 123R4-R8, LR} 0x341939D6: FAB2 F382 CLZ R3, R2 0x341939DA: 409A LSLS R2, R3 0x341939DC: 4099 LSLS R1, R3 0x341939DE: F1D3 0C20 RSBS R12, R3, #32 0x341939E2: FA30 FC0C LSRS.W R12, R0, R12 0x341939E6: EA51 010C ORRS.W R1, R1, R12 0x341939EA: 4098 LSLS R0, R3 0x341939EC: F000 F84E BL 46L5 ; 0x34193A8C 0x341939F0: 0028 MOVS R0, R5 0x341939F2: FA36 F203 LSRS.W R2, R6, R3 0x341939F6: 2100 MOVS R1, #0 0x341939F8: 2300 MOVS R3, #0 0x341939FA: E8BD 81F0 POP.W 123R4-R8, PC}
.L2: 0x341939FE: B5F0 PUSH 123R4-R7, LR} 0x34193A00: FBB1 FCF2 UDIV R12, R1, R2 0x34193A04: FB0C 1112 MLS R1, R12, R2, R1 0x34193A08: FAB2 F382 CLZ R3, R2 0x34193A0C: 409A LSLS R2, R3 0x34193A0E: 4099 LSLS R1, R3 0x34193A10: F1D3 0620 RSBS R6, R3, #32 0x34193A14: FA30 F606 LSRS.W R6, R0, R6 0x34193A18: 4331 ORRS R1, R6 0x34193A1A: 4098 LSLS R0, R3 0x34193A1C: F000 F836 BL 46L5 ; 0x34193A8C 0x34193A20: 4661 MOV R1, R12 0x34193A22: 0028 MOVS R0, R5 0x34193A24: 0032 MOVS R2, R6 0x34193A26: 40DA LSRS R2, R3 0x34193A28: 2300 MOVS R3, #0 0x34193A2A: BDF0 POP 123R4-R7, PC}
.L3: 0x34193A2C: B5F3 PUSH 123R0-R1, R4-R7, LR} 0x34193A2E: FAB3 FC83 CLZ R12, R3 0x34193A32: 0849 LSRS R1, R1, #1 0x34193A34: EA5F 0030 RRXS R0, R0 0x34193A38: FA13 F30C LSLS.W R3, R3, R12 0x34193A3C: F1DC 0420 RSBS R4, R12, #32 0x34193A40: FA32 F404 LSRS.W R4, R2, R4 0x34193A44: 4323 ORRS R3, R4 0x34193A46: B40C PUSH 123R2-R3} 0x34193A48: 001A MOVS R2, R3 0x34193A4A: F000 F81F BL 46L5 ; 0x34193A8C 0x34193A4E: BC0C POP 123R2-R3} 0x34193A50: FA33 F30C LSRS.W R3, R3, R12 0x34193A54: F1DC 0C1F RSBS R12, R12, #31 0x34193A58: FA35 F50C LSRS.W R5, R5, R12 0x34193A5C: BF18 IT NE 0x34193A5E: 1E6D SUBNE R5, R5, #1 0x34193A60: BC03 POP 123R0-R1} 0x34193A62: FBA5 6702 UMULL R6, R7, R5, R2 0x34193A66: FB05 7703 MLA R7, R5, R3, R7 0x34193A6A: 1B80 SUBS R0, R0, R6 0x34193A6C: 41B9 SBCS R1, R7 0x34193A6E: 4290 CMP R0, R2 0x34193A70: EB71 0C03 SBCS.W R12, R1, R3 0x34193A74: D305 BCC 46L4 ; 0x34193A82 0x34193A76: 1A82 SUBS R2, R0, R2 0x34193A78: EB71 0303 SBCS.W R3, R1, R3 0x34193A7C: 1C68 ADDS R0, R5, #1 0x34193A7E: 2100 MOVS R1, #0 0x34193A80: BDF0 POP 123R4-R7, PC}
.L4: 0x34193A82: 0002 MOVS R2, R0 0x34193A84: 000B MOVS R3, R1 0x34193A86: 0028 MOVS R0, R5 0x34193A88: 2100 MOVS R1, #0 0x34193A8A: BDF0 POP 123R4-R7, PC}
.L5: 0x34193A8C: 0D94 LSRS R4, R2, #22 0x34193A8E: F64F 75C2 MOVW R5, #0xFFC2 0x34193A92: 022D LSLS R5, R5, #8 0x34193A94: FBB5 F4F4 UDIV R4, R5, R4 0x34193A98: 0AD6 LSRS R6, R2, #11 0x34193A9A: 1C76 ADDS R6, R6, #1 0x34193A9C: FB04 F504 MUL R5, R4, R4 0x34193AA0: FBA5 5606 UMULL R5, R6, R5, R6 0x34193AA4: 43F6 MVNS R6, R6 0x34193AA6: EB06 1604 ADD.W R6, R6, R4, LSL #4 0x34193AAA: 0855 LSRS R5, R2, #1 0x34193AAC: BF32 ITEE CC 0x34193AAE: 2700 MOVCC R7, #0 0x34193AB0: 0877 LSRCS R7, R6, #1 0x34193AB2: 1C6D ADDCS R5, R5, #1 0x34193AB4: FB05 7716 MLS R7, R5, R6, R7 0x34193AB8: FBA6 4707 UMULL R4, R7, R6, R7 0x34193ABC: 087F LSRS R7, R7, #1 0x34193ABE: EB07 37C6 ADD.W R7, R7, R6, LSL #15 0x34193AC2: 0014 MOVS R4, R2 0x34193AC4: 0015 MOVS R5, R2 0x34193AC6: FBE7 4502 UMLAL R4, R5, R7, R2 0x34193ACA: 1B7F SUBS R7, R7, R5 0x34193ACC: 1C4D ADDS R5, R1, #1 0x34193ACE: 0004 MOVS R4, R0 0x34193AD0: FBE7 4501 UMLAL R4, R5, R7, R1 0x34193AD4: FB05 0612 MLS R6, R5, R2, R0 0x34193AD8: 42A6 CMP R6, R4 0x34193ADA: BF84 ITT HI 0x34193ADC: 1E6D SUBHI R5, R5, #1 0x34193ADE: 18B6 ADDHI R6, R6, R2 0x34193AE0: 4296 CMP R6, R2 0x34193AE2: BF24 ITT CS 0x34193AE4: 1C6D ADDCS R5, R5, #1 0x34193AE6: 1AB6 SUBCS R6, R6, R2 0x34193AE8: 4770 BX LR

Section .init.MDF1_FLT0_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


MDF1_FLT0_IRQHandler: 0x34193AEA: E7FE B MDF1_FLT0_IRQHandler ; 0x34193AEA

Section .init.MDF1_FLT1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


MDF1_FLT1_IRQHandler: 0x34193AEC: E7FE B MDF1_FLT1_IRQHandler ; 0x34193AEC

Section .init.MDF1_FLT2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


MDF1_FLT2_IRQHandler: 0x34193AEE: E7FE B MDF1_FLT2_IRQHandler ; 0x34193AEE

Section .init.MDF1_FLT3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


MDF1_FLT3_IRQHandler: 0x34193AF0: E7FE B MDF1_FLT3_IRQHandler ; 0x34193AF0

Section .init.MDF1_FLT4_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


MDF1_FLT4_IRQHandler: 0x34193AF2: E7FE B MDF1_FLT4_IRQHandler ; 0x34193AF2

Section .init.MDF1_FLT5_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


MDF1_FLT5_IRQHandler: 0x34193AF4: E7FE B MDF1_FLT5_IRQHandler ; 0x34193AF4

Section .init.SAI1_A_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SAI1_A_IRQHandler: 0x34193AF6: E7FE B SAI1_A_IRQHandler ; 0x34193AF6

Section .init.SAI1_B_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SAI1_B_IRQHandler: 0x34193AF8: E7FE B SAI1_B_IRQHandler ; 0x34193AF8

Section .init.SAI2_A_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SAI2_A_IRQHandler: 0x34193AFA: E7FE B SAI2_A_IRQHandler ; 0x34193AFA

Section .init.SAI2_B_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SAI2_B_IRQHandler: 0x34193AFC: E7FE B SAI2_B_IRQHandler ; 0x34193AFC

Section .init.SPDIFRX_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SPDIFRX_IRQHandler: 0x34193AFE: E7FE B SPDIFRX_IRQHandler ; 0x34193AFE

Section .init.SPI1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SPI1_IRQHandler: 0x34193B00: E7FE B SPI1_IRQHandler ; 0x34193B00

Section .init.SPI2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SPI2_IRQHandler: 0x34193B02: E7FE B SPI2_IRQHandler ; 0x34193B02

Section .init.SPI3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SPI3_IRQHandler: 0x34193B04: E7FE B SPI3_IRQHandler ; 0x34193B04

Section .init.SPI4_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SPI4_IRQHandler: 0x34193B06: E7FE B SPI4_IRQHandler ; 0x34193B06

Section .init.SPI5_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SPI5_IRQHandler: 0x34193B08: E7FE B SPI5_IRQHandler ; 0x34193B08

Section .init.SPI6_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SPI6_IRQHandler: 0x34193B0A: E7FE B SPI6_IRQHandler ; 0x34193B0A

Section .init.USART1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


USART1_IRQHandler: 0x34193B0C: E7FE B USART1_IRQHandler ; 0x34193B0C

Section .init.USART2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


USART2_IRQHandler: 0x34193B0E: E7FE B USART2_IRQHandler ; 0x34193B0E

Section .init.USART3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


USART3_IRQHandler: 0x34193B10: E7FE B USART3_IRQHandler ; 0x34193B10

Section .init.UART4_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


UART4_IRQHandler: 0x34193B12: E7FE B UART4_IRQHandler ; 0x34193B12

Section .init.UART5_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


UART5_IRQHandler: 0x34193B14: E7FE B UART5_IRQHandler ; 0x34193B14

Section .init.USART6_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


USART6_IRQHandler: 0x34193B16: E7FE B USART6_IRQHandler ; 0x34193B16

Section .init.UART7_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


UART7_IRQHandler: 0x34193B18: E7FE B UART7_IRQHandler ; 0x34193B18

Section .init.UART8_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


UART8_IRQHandler: 0x34193B1A: E7FE B UART8_IRQHandler ; 0x34193B1A

Section .init.UART9_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


UART9_IRQHandler: 0x34193B1C: E7FE B UART9_IRQHandler ; 0x34193B1C

Section .init.USART10_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


USART10_IRQHandler: 0x34193B1E: E7FE B USART10_IRQHandler ; 0x34193B1E

Section .init.LPUART1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


LPUART1_IRQHandler: 0x34193B20: E7FE B LPUART1_IRQHandler ; 0x34193B20

Section .init.XSPI1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


XSPI1_IRQHandler: 0x34193B22: E7FE B XSPI1_IRQHandler ; 0x34193B22

Section .init.XSPI2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


XSPI2_IRQHandler: 0x34193B24: E7FE B XSPI2_IRQHandler ; 0x34193B24

Section .init.XSPI3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


XSPI3_IRQHandler: 0x34193B26: E7FE B XSPI3_IRQHandler ; 0x34193B26

Section .init.FMC_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


FMC_IRQHandler: 0x34193B28: E7FE B FMC_IRQHandler ; 0x34193B28

Section .init.SDMMC1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SDMMC1_IRQHandler: 0x34193B2A: E7FE B SDMMC1_IRQHandler ; 0x34193B2A

Section .init.SDMMC2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SDMMC2_IRQHandler: 0x34193B2C: E7FE B SDMMC2_IRQHandler ; 0x34193B2C

Section .init.UCPD1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


UCPD1_IRQHandler: 0x34193B2E: E7FE B UCPD1_IRQHandler ; 0x34193B2E

Section .init.USB1_OTG_HS_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


USB1_OTG_HS_IRQHandler: 0x34193B30: E7FE B USB1_OTG_HS_IRQHandler ; 0x34193B30

Section .init.USB2_OTG_HS_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


USB2_OTG_HS_IRQHandler: 0x34193B32: E7FE B USB2_OTG_HS_IRQHandler ; 0x34193B32

Section .init.ETH1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


ETH1_IRQHandler: 0x34193B34: E7FE B ETH1_IRQHandler ; 0x34193B34

Section .init.FDCAN1_IT0_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


FDCAN1_IT0_IRQHandler: 0x34193B36: E7FE B FDCAN1_IT0_IRQHandler ; 0x34193B36

Section .init.FDCAN1_IT1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


FDCAN1_IT1_IRQHandler: 0x34193B38: E7FE B FDCAN1_IT1_IRQHandler ; 0x34193B38

Section .init.FDCAN2_IT0_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


FDCAN2_IT0_IRQHandler: 0x34193B3A: E7FE B FDCAN2_IT0_IRQHandler ; 0x34193B3A

Section .init.FDCAN2_IT1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


FDCAN2_IT1_IRQHandler: 0x34193B3C: E7FE B FDCAN2_IT1_IRQHandler ; 0x34193B3C

Section .init.FDCAN3_IT0_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


FDCAN3_IT0_IRQHandler: 0x34193B3E: E7FE B FDCAN3_IT0_IRQHandler ; 0x34193B3E

Section .init.FDCAN3_IT1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


FDCAN3_IT1_IRQHandler: 0x34193B40: E7FE B FDCAN3_IT1_IRQHandler ; 0x34193B40

Section .init.FDCAN_CU_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


FDCAN_CU_IRQHandler: 0x34193B42: E7FE B FDCAN_CU_IRQHandler ; 0x34193B42

Section .init.MDIOS_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


MDIOS_IRQHandler: 0x34193B44: E7FE B MDIOS_IRQHandler ; 0x34193B44

Section .init.DCMI_PSSI_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


DCMI_PSSI_IRQHandler: 0x34193B46: E7FE B DCMI_PSSI_IRQHandler ; 0x34193B46

Section .init.WAKEUP_PIN_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


WAKEUP_PIN_IRQHandler: 0x34193B48: E7FE B WAKEUP_PIN_IRQHandler ; 0x34193B48

Section .init.CTI_INT0_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


CTI_INT0_IRQHandler: 0x34193B4A: E7FE B CTI_INT0_IRQHandler ; 0x34193B4A

Section .init.CTI_INT1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


CTI_INT1_IRQHandler: 0x34193B4C: E7FE B CTI_INT1_IRQHandler ; 0x34193B4C

Section .init.LTDC_UP_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


LTDC_UP_IRQHandler: 0x34193B4E: E7FE B LTDC_UP_IRQHandler ; 0x34193B4E

Section .init.LTDC_UP_ERR_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


LTDC_UP_ERR_IRQHandler: 0x34193B50: E7FE B LTDC_UP_ERR_IRQHandler ; 0x34193B50

Section .text.libc.fwrite from fileops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=46, align=2


fwrite: 0x34193B52: B5F8 PUSH 123R3-R7, LR} 0x34193B54: 4606 MOV R6, R0 0x34193B56: 4618 MOV R0, R3 0x34193B58: 461D MOV R5, R3 0x34193B5A: 4617 MOV R7, R2 0x34193B5C: 460C MOV R4, R1 0x34193B5E: F000 F9CC BL __SEGGER_RTL_X_file_stat ; 0x34193EFA 0x34193B62: 2800 CMP R0, #0 0x34193B64: D403 BMI 46L1 ; 0x34193B6E 0x34193B66: FB07 F204 MUL R2, R7, R4 0x34193B6A: 42A2 CMP R2, R4 0x34193B6C: D201 BCS 46L2 ; 0x34193B72
.L1: 0x34193B6E: 2000 MOVS R0, #0 0x34193B70: BDF8 POP 123R3-R7, PC}
.L2: 0x34193B72: 4628 MOV R0, R5 0x34193B74: 4631 MOV R1, R6 0x34193B76: F000 F85D BL __SEGGER_RTL_X_file_write ; 0x34193C34 0x34193B7A: FBB0 F0F4 UDIV R0, R0, R4 0x34193B7E: BDF8 POP 123R3-R7, PC}

Section .text.libc.__SEGGER_RTL_float32_isnan from floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=14, align=2


__SEGGER_RTL_float32_isnan: 0x34193B80: EEB4 0A40 VCMP.F32 S0, S0 0x34193B84: EEF1 FA10 VMRS APSR_nzcv, FPSCR 0x34193B88: EA5F 907F CSET R0, VS 0x34193B8C: 4770 BX LR

Section .text.libc.__SEGGER_RTL_float32_isinf from floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=18, align=2


__SEGGER_RTL_float32_isinf: 0x34193B8E: EE10 0A10 VMOV R0, S0 0x34193B92: F020 4000 BIC R0, R0, #0x80000000 0x34193B96: F1B0 4FFF CMP.W R0, #0x7F800000 0x34193B9A: EA5F 901F CSET R0, EQ 0x34193B9E: 4770 BX LR

Section .text.libc.ldexpf from floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=54, align=2


ldexpf: 0x34193BA0: EE10 1A10 VMOV R1, S0 0x34193BA4: F3C1 52C7 UBFX R2, R1, #23, #8 0x34193BA8: F1A2 03FF SUB.W R3, R2, #255 0x34193BAC: F113 0FFE CMN R3, #254 0x34193BB0: D310 BCC 46L3 ; 0x34193BD4 0x34193BB2: 4402 ADD R2, R0 0x34193BB4: 1E50 SUBS R0, R2, #1 0x34193BB6: 28FD CMP R0, #253 0x34193BB8: D804 BHI 46L1 ; 0x34193BC4 0x34193BBA: F021 40FF BIC R0, R1, #0x7F800000 0x34193BBE: EA40 50C2 ORR.W R0, R0, R2, LSL #23 0x34193BC2: E005 B 46L2 ; 0x34193BD0
.L1: 0x34193BC4: F001 4000 AND R0, R1, #0x80000000 0x34193BC8: 2A01 CMP R2, #1 0x34193BCA: BFA8 IT GE 0x34193BCC: F100 40FF ADDGE.W R0, R0, #0x7F800000
.L2: 0x34193BD0: EE00 0A10 VMOV S0, R0
.L3: 0x34193BD4: 4770 BX LR

Section .text.libc.__SEGGER_RTL_pow10f from utilops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=58, align=2


__SEGGER_RTL_pow10f: 0x34193BD6: EEB7 0A00 VMOV.F32 S0, #1 0x34193BDA: 2800 CMP R0, #0 0x34193BDC: EEB0 1A40 VMOV.F32 S2, S0 0x34193BE0: D010 BEQ 46L2 ; 0x34193C04 0x34193BE2: EEB7 1A00 VMOV.F32 S2, #1 0x34193BE6: F64D 0128 MOVW R1, #0xD828 ; 0x3418D828 = __SEGGER_RTL_aPower2f 0x34193BEA: F2C3 4118 MOVT R1, #0x3418 ; 0x3418D828 = __SEGGER_RTL_aPower2f 0x34193BEE: EA50 B250 CNEG R2, R0, MI
.L1: 0x34193BF2: 07D3 LSLS R3, R2, #31 0x34193BF4: BF1C ITT NE 0x34193BF6: ED91 2A00 VLDRNE S4, [R1] 0x34193BFA: EE21 1A02 VMULNE.F32 S2, S2, S4 0x34193BFE: 3104 ADDS R1, #4 0x34193C00: 0852 LSRS R2, R2, #1 0x34193C02: D1F6 BNE 46L1 ; 0x34193BF2
.L2: 0x34193C04: EE80 0A01 VDIV.F32 S0, S0, S2 0x34193C08: 2800 CMP R0, #0 0x34193C0A: FE21 0A00 VSELGE.F32 S0, S2, S0 0x34193C0E: 4770 BX LR

Section .text.libc.__SEGGER_RTL_prin_flush from prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=26, align=2


__SEGGER_RTL_prin_flush: 0x34193C10: 6942 LDR R2, [R0, #20] 0x34193C12: B14A CBZ R2, .L1 ; 0x34193C28 0x34193C14: B510 PUSH 123R4, LR} 0x34193C16: 6A03 LDR R3, [R0, #32] 0x34193C18: 4604 MOV R4, R0 0x34193C1A: 2B00 CMP R3, #0 0x34193C1C: BF1C ITT NE 0x34193C1E: 6921 LDRNE R1, [R4, #16] 0x34193C20: 4798 BLXNE R3 0x34193C22: 2000 MOVS R0, #0 0x34193C24: 6160 STR R0, [R4, #20] 0x34193C26: BD10 POP 123R4, PC}
.L1: 0x34193C28: 4770 BX LR

Section .text.libc.__SEGGER_RTL_stream_write from prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=10, align=2


__SEGGER_RTL_stream_write: 0x34193C2A: 6A43 LDR R3, [R0, #36] 0x34193C2C: 4608 MOV R0, R1 0x34193C2E: 2101 MOVS R1, #1 0x34193C30: F7FF BF8F B.W fwrite ; 0x34193B52

Section .text.libc.__SEGGER_RTL_X_file_write from prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=6, align=2


__SEGGER_RTL_X_file_write: 0x34193C34: 6800 LDR R0, [R0] 0x34193C36: F000 B9D4 B.W SEGGER_RTT_Write ; 0x34193FE2

Section .text.libc._DoInit from SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=98, align=2


_DoInit: 0x34193C3A: B500 PUSH 123LR} 0x34193C3C: F240 00AC MOVW R0, #172 ; 0x340000AC = _SEGGER_RTT 0x34193C40: 2103 MOVS R1, #3 0x34193C42: F2C3 4000 MOVT R0, #0x3400 ; 0x340000AC = _SEGGER_RTT 0x34193C46: F244 329D MOVW R2, #0x439D ; 0x3419439D = .rodata.libc..L.str 0x34193C4A: 6101 STR R1, [R0, #16] 0x34193C4C: F2C3 4219 MOVT R2, #0x3419 ; 0x3419439D = .rodata.libc..L.str 0x34193C50: 6141 STR R1, [R0, #20] 0x34193C52: F240 3158 MOVW R1, #0x0358 ; 0x34000358 = _acUpBuffer 0x34193C56: F2C3 4100 MOVT R1, #0x3400 ; 0x34000358 = _acUpBuffer 0x34193C5A: 6182 STR R2, [R0, #24] 0x34193C5C: 61C1 STR R1, [R0, #28] 0x34193C5E: F44F 6180 MOV.W R1, #0x0400 0x34193C62: F240 7358 MOVW R3, #0x0758 ; 0x34000758 = _acDownBuffer 0x34193C66: 6201 STR R1, [R0, #32] 0x34193C68: 2100 MOVS R1, #0 0x34193C6A: F2C3 4300 MOVT R3, #0x3400 ; 0x34000758 = _acDownBuffer 0x34193C6E: F04F 0E10 MOV.W LR, #16 0x34193C72: 6281 STR R1, [R0, #40] 0x34193C74: 6241 STR R1, [R0, #36] 0x34193C76: 62C1 STR R1, [R0, #44] 0x34193C78: 6602 STR R2, [R0, #96] 0x34193C7A: F244 328C MOVW R2, #0x438C ; 0x3419438C = _DoInit._aInitStr 0x34193C7E: 6643 STR R3, [R0, #100] 0x34193C80: F2C3 4219 MOVT R2, #0x3419 ; 0x3419438C = _DoInit._aInitStr 0x34193C84: F8C0 E068 STR.W LR, [R0, #104] 0x34193C88: 6701 STR R1, [R0, #112] 0x34193C8A: 66C1 STR R1, [R0, #108] 0x34193C8C: 6741 STR R1, [R0, #116]
.L1: 0x34193C8E: 1A53 SUBS R3, R2, R1 0x34193C90: 7BDB LDRB R3, [R3, #15] 0x34193C92: 5443 STRB R3, [R0, R1] 0x34193C94: 3101 ADDS R1, #1 0x34193C96: F00F C007 LE LR, .L1 ; 0x34193C8E 0x34193C9A: BD00 POP 123PC}

Section .text.libc._GetAvailWriteSpace from SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=22, align=2


_GetAvailWriteSpace: 0x34193C9C: 4601 MOV R1, R0 0x34193C9E: 68C0 LDR R0, [R0, #12] 0x34193CA0: 690A LDR R2, [R1, #16] 0x34193CA2: 4282 CMP R2, R0 0x34193CA4: EA6F 0000 MVN.W R0, R0 0x34193CA8: 4410 ADD R0, R2 0x34193CAA: BF9C ITT LS 0x34193CAC: 6889 LDRLS R1, [R1, #8] 0x34193CAE: 4408 ADDLS R0, R1 0x34193CB0: 4770 BX LR

Section .text.libc._WriteNoCheck from SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=58, align=2


_WriteNoCheck: 0x34193CB2: E92D 41F0 PUSH.W 123R4-R8, LR} 0x34193CB6: 4604 MOV R4, R0 0x34193CB8: 6880 LDR R0, [R0, #8] 0x34193CBA: 68E6 LDR R6, [R4, #12] 0x34193CBC: 4615 MOV R5, R2 0x34193CBE: 6863 LDR R3, [R4, #4] 0x34193CC0: 1B87 SUBS R7, R0, R6 0x34193CC2: 1998 ADDS R0, R3, R6 0x34193CC4: 42BA CMP R2, R7 0x34193CC6: D203 BCS 46L1 ; 0x34193CD0 0x34193CC8: F7F9 FDE4 BL memcpy ; 0x3418D894 0x34193CCC: 4435 ADD R5, R6 0x34193CCE: E00A B 46L2 ; 0x34193CE6
.L1: 0x34193CD0: 463A MOV R2, R7 0x34193CD2: 4688 MOV R8, R1 0x34193CD4: F7F9 FDDE BL memcpy ; 0x3418D894 0x34193CD8: 1BED SUBS R5, R5, R7 0x34193CDA: 6860 LDR R0, [R4, #4] 0x34193CDC: EB08 0107 ADD.W R1, R8, R7 0x34193CE0: 462A MOV R2, R5 0x34193CE2: F7F9 FDD7 BL memcpy ; 0x3418D894
.L2: 0x34193CE6: 60E5 STR R5, [R4, #12] 0x34193CE8: E8BD 81F0 POP.W 123R4-R8, PC}

Section .text.libc.strlen from strops.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=42, align=2


strlen: 0x34193CEC: 7801 LDRB R1, [R0] 0x34193CEE: B181 CBZ R1, .L2 ; 0x34193D12 0x34193CF0: 4602 MOV R2, R0
.L1: 0x34193CF2: 4694 MOV R12, R2 0x34193CF4: F852 3B04 LDR R3, [R2], #4 0x34193CF8: F1A3 3101 SUB.W R1, R3, #0x01010101 0x34193CFC: 4399 BICS R1, R3 0x34193CFE: F031 337F BICS R3, R1, #0x7F7F7F7F 0x34193D02: D0F6 BEQ 46L1 ; 0x34193CF2 0x34193D04: BA19 REV R1, R3 0x34193D06: FAB1 F181 CLZ R1, R1 0x34193D0A: EB0C 01D1 ADD.W R1, R12, R1, LSR #3 0x34193D0E: 1A08 SUBS R0, R1, R0 0x34193D10: 4770 BX LR
.L2: 0x34193D12: 2000 MOVS R0, #0 0x34193D14: 4770 BX LR

Section .text.libc.__SEGGER_RTL_current_locale from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=26, align=2


__SEGGER_RTL_current_locale: 0x34193D16: F240 3050 MOVW R0, #0x0350 ; 0x34000350 = __SEGGER_RTL_locale_ptr 0x34193D1A: F240 7168 MOVW R1, #0x0768 ; 0x34000768 = __SEGGER_RTL_global_locale 0x34193D1E: F2C3 4000 MOVT R0, #0x3400 ; 0x34000350 = __SEGGER_RTL_locale_ptr 0x34193D22: F2C3 4100 MOVT R1, #0x3400 ; 0x34000768 = __SEGGER_RTL_global_locale 0x34193D26: 6800 LDR R0, [R0] 0x34193D28: 2800 CMP R0, #0 0x34193D2A: EA51 8000 CSEL R0, R1, R0, EQ 0x34193D2E: 4770 BX LR

Section .text.libc.__SEGGER_RTL_ascii_wctomb from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=14, align=2


__SEGGER_RTL_ascii_wctomb: 0x34193D30: 297F CMP R1, #127 0x34193D32: BF8E ITEE HI 0x34193D34: F06F 0001 MVNHI R0, #1 0x34193D38: 7001 STRBLS R1, [R0] 0x34193D3A: 2001 MOVLS R0, #1 0x34193D3C: 4770 BX LR

Section .rodata.SFDP_BuildGenericDriver.block_erase_unit from blto2_FSBL_lto.o, size=8, align=2


SFDP_BuildGenericDriver.block_erase_unit: 0x34193D3E: 10 DC.B 0x10 ; '\x10' 0x34193D3F: 00 DC.B 0x00 ; '\0' 0x34193D40: 00 DC.B 0x00 ; '\0' 0x34193D41: 01 DC.B 0x01 ; '\x01' 0x34193D42: A0 DC.B 0xA0 ; '\xA0' 0x34193D43: 0F DC.B 0x0F ; '\x0F' 0x34193D44: 00 DC.B 0x00 ; '\0' 0x34193D45: FA DC.B 0xFA ; '\xFA'

Section .text.libc.__SEGGER_RTL_float32_isnormal from floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=24, align=2


__SEGGER_RTL_float32_isnormal: 0x34193D46: EE10 0A10 VMOV R0, S0 0x34193D4A: 0041 LSLS R1, R0, #1 0x34193D4C: F1B1 4F7F CMP.W R1, #0xFF000000 0x34193D50: EA5F 912F CSET R1, CC 0x34193D54: F010 4FFF TST R0, #0x7F800000 0x34193D58: EA5F 8001 CSEL R0, ZR, R1, EQ 0x34193D5C: 4770 BX LR

Section .text.libc.__SEGGER_RTL_float32_signbit from floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=8, align=2


__SEGGER_RTL_float32_signbit: 0x34193D5E: EE10 0A10 VMOV R0, S0 0x34193D62: 0FC0 LSRS R0, R0, #31 0x34193D64: 4770 BX LR

Section .text.libc.frexpf from floatops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=36, align=2


frexpf: 0x34193D66: EE10 1A10 VMOV R1, S0 0x34193D6A: 227E MOVS R2, #126 0x34193D6C: F3C1 53C7 UBFX R3, R1, #23, #8 0x34193D70: F362 51DE BFI R1, R2, #23, #8 0x34193D74: 1E5A SUBS R2, R3, #1 0x34193D76: 2AFE CMP R2, #254 0x34193D78: BF38 IT CC 0x34193D7A: EE00 1A10 VMOVCC S0, R1 0x34193D7E: BF2C ITE CS 0x34193D80: 2100 MOVCS R1, #0 0x34193D82: F1A3 017E SUBCC.W R1, R3, #126 0x34193D86: 6001 STR R1, [R0] 0x34193D88: 4770 BX LR

Section .text.libc.abs from intops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=8, align=2


abs: 0x34193D8A: 2800 CMP R0, #0 0x34193D8C: EA50 B050 CNEG R0, R0, MI 0x34193D90: 4770 BX LR

Section .text.libc.__SEGGER_RTL_putc from prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=132, align=2


__SEGGER_RTL_putc: 0x34193D92: B510 PUSH 123R4, LR} 0x34193D94: B082 SUB SP, SP, #8 0x34193D96: 4604 MOV R4, R0 0x34193D98: 6900 LDR R0, [R0, #16] 0x34193D9A: F88D 1007 STRB.W R1, [SP, #7] 0x34193D9E: B178 CBZ R0, .L1 ; 0x34193DC0 0x34193DA0: E9D4 2300 LDRD R2, R3, [R4] 0x34193DA4: 429A CMP R2, R3 0x34193DA6: D231 BCS 46L4 ; 0x34193E0C 0x34193DA8: 6962 LDR R2, [R4, #20] 0x34193DAA: 1C53 ADDS R3, R2, #1 0x34193DAC: 6163 STR R3, [R4, #20] 0x34193DAE: 5481 STRB R1, [R0, R2] 0x34193DB0: E9D4 0105 LDRD R0, R1, [R4, #20] 0x34193DB4: 4288 CMP R0, R1 0x34193DB6: D129 BNE 46L4 ; 0x34193E0C 0x34193DB8: 4620 MOV R0, R4 0x34193DBA: F7FF FF29 BL __SEGGER_RTL_prin_flush ; 0x34193C10 0x34193DBE: E025 B 46L4 ; 0x34193E0C
.L1: 0x34193DC0: 68E0 LDR R0, [R4, #12] 0x34193DC2: B150 CBZ R0, .L2 ; 0x34193DDA 0x34193DC4: E9D4 2C00 LDRD R2, R12, [R4] 0x34193DC8: 4562 CMP R2, R12 0x34193DCA: D21F BCS 46L4 ; 0x34193E0C 0x34193DCC: 1C53 ADDS R3, R2, #1 0x34193DCE: EBB3 030C SUBS.W R3, R3, R12 0x34193DD2: EA51 8113 CSEL R1, R1, R3, NE 0x34193DD6: 5481 STRB R1, [R0, R2] 0x34193DD8: E018 B 46L4 ; 0x34193E0C
.L2: 0x34193DDA: 68A0 LDR R0, [R4, #8] 0x34193DDC: B158 CBZ R0, .L3 ; 0x34193DF6 0x34193DDE: E9D4 2C00 LDRD R2, R12, [R4] 0x34193DE2: 4562 CMP R2, R12 0x34193DE4: D212 BCS 46L4 ; 0x34193E0C 0x34193DE6: 1C53 ADDS R3, R2, #1 0x34193DE8: EBB3 030C SUBS.W R3, R3, R12 0x34193DEC: BF18 IT NE 0x34193DEE: B2CB UXTBNE R3, R1 0x34193DF0: F840 3022 STR.W R3, [R0, R2, LSL #2] 0x34193DF4: E00A B 46L4 ; 0x34193E0C
.L3: 0x34193DF6: 6A23 LDR R3, [R4, #32] 0x34193DF8: B143 CBZ R3, .L4 ; 0x34193E0C 0x34193DFA: E9D4 0100 LDRD R0, R1, [R4] 0x34193DFE: 4288 CMP R0, R1 0x34193E00: D204 BCS 46L4 ; 0x34193E0C 0x34193E02: F10D 0107 ADD.W R1, SP, #7 0x34193E06: 4620 MOV R0, R4 0x34193E08: 2201 MOVS R2, #1 0x34193E0A: 4798 BLX R3
.L4: 0x34193E0C: 6820 LDR R0, [R4] 0x34193E0E: 3001 ADDS R0, #1 0x34193E10: 6020 STR R0, [R4] 0x34193E12: B002 ADD SP, SP, #8 0x34193E14: BD10 POP 123R4, PC}

Section .text.libc.__SEGGER_RTL_print_padding from prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=32, align=2


__SEGGER_RTL_print_padding: 0x34193E16: 2A01 CMP R2, #1 0x34193E18: DB0C BLT 46L2 ; 0x34193E34 0x34193E1A: B5F8 PUSH 123R3-R7, LR} 0x34193E1C: 4615 MOV R5, R2 0x34193E1E: 460C MOV R4, R1 0x34193E20: 4606 MOV R6, R0
.L1: 0x34193E22: 4630 MOV R0, R6 0x34193E24: 4621 MOV R1, R4 0x34193E26: 462F MOV R7, R5 0x34193E28: 3D01 SUBS R5, #1 0x34193E2A: F7FF FFB2 BL __SEGGER_RTL_putc ; 0x34193D92 0x34193E2E: 2F01 CMP R7, #1 0x34193E30: D8F7 BHI 46L1 ; 0x34193E22 0x34193E32: BDF8 POP 123R3-R7, PC}
.L2: 0x34193E34: 4770 BX LR

Section .text.libc.__SEGGER_RTL_pre_padding from prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=20, align=2


__SEGGER_RTL_pre_padding: 0x34193E36: 06CB LSLS R3, R1, #27 0x34193E38: D406 BMI 46L1 ; 0x34193E48 0x34193E3A: 2330 MOVS R3, #48 0x34193E3C: 0589 LSLS R1, R1, #22 0x34193E3E: BF58 IT PL 0x34193E40: 2320 MOVPL R3, #32 0x34193E42: 4619 MOV R1, R3 0x34193E44: F7FF BFE7 B.W __SEGGER_RTL_print_padding ; 0x34193E16
.L1: 0x34193E48: 4770 BX LR

Section .text.libc.vfprintf from prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=28, align=2


vfprintf: 0x34193E4A: B570 PUSH 123R4-R6, LR} 0x34193E4C: 4614 MOV R4, R2 0x34193E4E: 460D MOV R5, R1 0x34193E50: 4606 MOV R6, R0 0x34193E52: F7FF FF60 BL __SEGGER_RTL_current_locale ; 0x34193D16 0x34193E56: 4601 MOV R1, R0 0x34193E58: 4630 MOV R0, R6 0x34193E5A: 462A MOV R2, R5 0x34193E5C: 4623 MOV R3, R4 0x34193E5E: E8BD 4070 POP.W 123R4-R6, LR} 0x34193E62: F000 B800 B.W vfprintf_l ; 0x34193E66

Section .text.libc.vfprintf_l from prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=104, align=2


vfprintf_l: 0x34193E66: E92D 4FF0 PUSH.W 123R4-R11, LR} 0x34193E6A: AF03 ADD R7, SP, #12 0x34193E6C: B08D SUB SP, SP, #52 0x34193E6E: F847 3C3C STR R3, [R7, #-60] 0x34193E72: 4691 MOV R9, R2 0x34193E74: 460C MOV R4, R1 0x34193E76: 4606 MOV R6, R0 0x34193E78: F000 F859 BL __SEGGER_RTL_X_file_bufsize ; 0x34193F2E 0x34193E7C: 4605 MOV R5, R0 0x34193E7E: 3007 ADDS R0, #7 0x34193E80: F020 0007 BIC R0, R0, #7 0x34193E84: 46EB MOV R11, SP 0x34193E86: EBAD 0800 SUB.W R8, SP, R0 0x34193E8A: 46C5 MOV SP, R8 0x34193E8C: F1A7 0A38 SUB.W R10, R7, #56 0x34193E90: 2100 MOVS R1, #0 0x34193E92: 2224 MOVS R2, #36 0x34193E94: 4650 MOV R0, R10 0x34193E96: F7F9 FD2F BL memset ; 0x3418D8F8 0x34193E9A: F06F 4000 MVN R0, #0x80000000 0x34193E9E: F857 2C3C LDR R2, [R7, #-60] 0x34193EA2: F847 0C34 STR R0, [R7, #-52] 0x34193EA6: F643 402B MOVW R0, #0x3C2B ; 0x34193C2B = __SEGGER_RTL_stream_write 0x34193EAA: F2C3 4019 MOVT R0, #0x3419 ; 0x34193C2B = __SEGGER_RTL_stream_write 0x34193EAE: 4649 MOV R1, R9 0x34193EB0: E947 0606 STRD R0, R6, [R7, #-24] 0x34193EB4: 4650 MOV R0, R10 0x34193EB6: E947 5408 STRD R5, R4, [R7, #-32] 0x34193EBA: F847 8C28 STR R8, [R7, #-40] 0x34193EBE: F7EC FC97 BL __SEGGER_RTL_vfprintf_short_float_long_long ; 0x341807F0 0x34193EC2: 46DD MOV SP, R11 0x34193EC4: F1A7 040C SUB.W R4, R7, #12 0x34193EC8: 46A5 MOV SP, R4 0x34193ECA: E8BD 8FF0 POP.W 123R4-R11, PC}

Section .text.libc.printf from prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=44, align=2


printf: 0x34193ECE: B083 SUB SP, SP, #12 0x34193ED0: B500 PUSH 123LR} 0x34193ED2: B082 SUB SP, SP, #8 0x34193ED4: F240 7C80 MOVW R12, #0x0780 ; 0x34000780 = stdout 0x34193ED8: E9CD 1203 STRD R1, R2, [SP, #12] 0x34193EDC: F2C3 4C00 MOVT R12, #0x3400 ; 0x34000780 = stdout 0x34193EE0: 9305 STR R3, [SP, #20] 0x34193EE2: 4601 MOV R1, R0 0x34193EE4: F8DC 0000 LDR.W R0, [R12] 0x34193EE8: AA03 ADD R2, SP, #12 0x34193EEA: 9201 STR R2, [SP, #4] 0x34193EEC: F7FF FFAD BL vfprintf ; 0x34193E4A 0x34193EF0: B002 ADD SP, SP, #8 0x34193EF2: F85D EB04 POP.W 123LR} 0x34193EF6: B003 ADD SP, SP, #12 0x34193EF8: 4770 BX LR

Section .text.libc.__SEGGER_RTL_X_file_stat from prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=52, align=2


__SEGGER_RTL_X_file_stat: 0x34193EFA: F240 7184 MOVW R1, #0x0784 ; 0x34000784 = stdin 0x34193EFE: F240 7280 MOVW R2, #0x0780 ; 0x34000780 = stdout 0x34193F02: F2C3 4100 MOVT R1, #0x3400 ; 0x34000784 = stdin 0x34193F06: F2C3 4200 MOVT R2, #0x3400 ; 0x34000780 = stdout 0x34193F0A: 6809 LDR R1, [R1] 0x34193F0C: F240 7388 MOVW R3, #0x0788 ; 0x34000788 = stderr 0x34193F10: F2C3 4300 MOVT R3, #0x3400 ; 0x34000788 = stderr 0x34193F14: 6812 LDR R2, [R2] 0x34193F16: 4288 CMP R0, R1 0x34193F18: EA5F 910F CSET R1, NE 0x34193F1C: 681B LDR R3, [R3] 0x34193F1E: 4290 CMP R0, R2 0x34193F20: EA5F 8101 CSEL R1, ZR, R1, EQ 0x34193F24: 4298 CMP R0, R3 0x34193F26: EA5F 8001 CSEL R0, ZR, R1, EQ 0x34193F2A: 4240 RSBS R0, R0, #0 0x34193F2C: 4770 BX LR

Section .text.libc.__SEGGER_RTL_X_file_bufsize from prinops_rtt.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=4, align=2


__SEGGER_RTL_X_file_bufsize: 0x34193F2E: 2040 MOVS R0, #64 0x34193F30: 4770 BX LR

Section .text.libc._WriteBlocking from SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=88, align=2


_WriteBlocking: 0x34193F32: E92D 43F8 PUSH.W 123R3-R9, LR} 0x34193F36: 68C7 LDR R7, [R0, #12] 0x34193F38: 4614 MOV R4, R2 0x34193F3A: 4688 MOV R8, R1 0x34193F3C: 4605 MOV R5, R0 0x34193F3E: F04F 0900 MOV.W R9, #0
.L1: 0x34193F42: 6928 LDR R0, [R5, #16] 0x34193F44: 43F9 MVNS R1, R7 0x34193F46: 42B8 CMP R0, R7 0x34193F48: 4408 ADD R0, R1 0x34193F4A: 68A9 LDR R1, [R5, #8] 0x34193F4C: BF98 IT LS 0x34193F4E: 4408 ADDLS R0, R1 0x34193F50: 686A LDR R2, [R5, #4] 0x34193F52: 1BC9 SUBS R1, R1, R7 0x34193F54: 4288 CMP R0, R1 0x34193F56: EA50 8031 CSEL R0, R0, R1, CC 0x34193F5A: 4641 MOV R1, R8 0x34193F5C: 42A0 CMP R0, R4 0x34193F5E: EA50 8634 CSEL R6, R0, R4, CC 0x34193F62: 19D0 ADDS R0, R2, R7 0x34193F64: 4632 MOV R2, R6 0x34193F66: F7F9 FC95 BL memcpy ; 0x3418D894 0x34193F6A: 68A8 LDR R0, [R5, #8] 0x34193F6C: 19F1 ADDS R1, R6, R7 0x34193F6E: 44B1 ADD R9, R6 0x34193F70: 44B0 ADD R8, R6 0x34193F72: 1A08 SUBS R0, R1, R0 0x34193F74: EBA4 0406 SUB.W R4, R4, R6 0x34193F78: EA51 8710 CSEL R7, R1, R0, NE 0x34193F7C: 60EF STR R7, [R5, #12] 0x34193F7E: B10C CBZ R4, .L2 ; 0x34193F84 0x34193F80: F02F C821 LE 46L1 ; 0x34193F42
.L2: 0x34193F84: 4648 MOV R0, R9 0x34193F86: E8BD 83F8 POP.W 123R3-R9, PC}

Section .text.libc.SEGGER_RTT_WriteNoLock from SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=88, align=2


SEGGER_RTT_WriteNoLock: 0x34193F8A: B570 PUSH 123R4-R6, LR} 0x34193F8C: EB00 0040 ADD.W R0, R0, R0, LSL #1 0x34193F90: F240 03AC MOVW R3, #172 ; 0x340000AC = _SEGGER_RTT 0x34193F94: F2C3 4300 MOVT R3, #0x3400 ; 0x340000AC = _SEGGER_RTT 0x34193F98: EB03 03C0 ADD.W R3, R3, R0, LSL #3 0x34193F9C: F103 0618 ADD.W R6, R3, #24 0x34193FA0: 6AD8 LDR R0, [R3, #44] 0x34193FA2: 2802 CMP R0, #2 0x34193FA4: D018 BEQ 46L5 ; 0x34193FD8 0x34193FA6: 460D MOV R5, R1 0x34193FA8: 4614 MOV R4, R2 0x34193FAA: 2801 CMP R0, #1 0x34193FAC: D007 BEQ 46L2 ; 0x34193FBE 0x34193FAE: B920 CBNZ R0, .L1 ; 0x34193FBA 0x34193FB0: 4630 MOV R0, R6 0x34193FB2: F7FF FE73 BL _GetAvailWriteSpace ; 0x34193C9C 0x34193FB6: 42A0 CMP R0, R4 0x34193FB8: D207 BCS 46L3 ; 0x34193FCA
.L1: 0x34193FBA: 2400 MOVS R4, #0 0x34193FBC: E00A B 46L4 ; 0x34193FD4
.L2: 0x34193FBE: 4630 MOV R0, R6 0x34193FC0: F7FF FE6C BL _GetAvailWriteSpace ; 0x34193C9C 0x34193FC4: 42A0 CMP R0, R4 0x34193FC6: EA50 8434 CSEL R4, R0, R4, CC
.L3: 0x34193FCA: 4630 MOV R0, R6 0x34193FCC: 4629 MOV R1, R5 0x34193FCE: 4622 MOV R2, R4 0x34193FD0: F7FF FE6F BL _WriteNoCheck ; 0x34193CB2
.L4: 0x34193FD4: 4620 MOV R0, R4 0x34193FD6: BD70 POP 123R4-R6, PC}
.L5: 0x34193FD8: 4630 MOV R0, R6 0x34193FDA: E8BD 4070 POP.W 123R4-R6, LR} 0x34193FDE: F7FF BFA8 B.W _WriteBlocking ; 0x34193F32

Section .text.libc.SEGGER_RTT_Write from SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=40, align=2


SEGGER_RTT_Write: 0x34193FE2: B570 PUSH 123R4-R6, LR} 0x34193FE4: F240 03AC MOVW R3, #172 ; 0x340000AC = _SEGGER_RTT 0x34193FE8: 4614 MOV R4, R2 0x34193FEA: F2C3 4300 MOVT R3, #0x3400 ; 0x340000AC = _SEGGER_RTT 0x34193FEE: 460D MOV R5, R1 0x34193FF0: 781B LDRB R3, [R3] 0x34193FF2: 4606 MOV R6, R0 0x34193FF4: 2B00 CMP R3, #0 0x34193FF6: BF08 IT EQ 0x34193FF8: F7FF FE1F BLEQ _DoInit ; 0x34193C3A 0x34193FFC: 4630 MOV R0, R6 0x34193FFE: 4629 MOV R1, R5 0x34194000: 4622 MOV R2, R4 0x34194002: E8BD 4070 POP.W 123R4-R6, LR} 0x34194006: F7FF BFC0 B.W SEGGER_RTT_WriteNoLock ; 0x34193F8A

Section .text.libc.strnlen from strops.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=92, align=2


strnlen: 0x3419400A: 2900 CMP R1, #0 0x3419400C: BF1C ITT NE 0x3419400E: 7802 LDRBNE R2, [R0] 0x34194010: 2A00 CMPNE R2, #0 0x34194012: D101 BNE 46L1 ; 0x34194018 0x34194014: 2000 MOVS R0, #0 0x34194016: 4770 BX LR
.L1: 0x34194018: B500 PUSH 123LR} 0x3419401A: F8D0 E000 LDR.W LR, [R0] 0x3419401E: 4602 MOV R2, R0 0x34194020: 2904 CMP R1, #4 0x34194022: D310 BCC 46L3 ; 0x34194046 0x34194024: F240 1C00 MOVW R12, #0x0100 0x34194028: F2C0 1C01 MOVT R12, #0x0101
.L2: 0x3419402C: EBAC 030E SUB.W R3, R12, LR 0x34194030: EA43 030E ORR.W R3, R3, LR 0x34194034: 43DB MVNS R3, R3 0x34194036: F013 3F80 TST R3, #0x80808080 0x3419403A: D104 BNE 46L3 ; 0x34194046 0x3419403C: F852 EF04 LDR LR, [R2, #4]! 0x34194040: 3904 SUBS R1, #4 0x34194042: 2903 CMP R1, #3 0x34194044: D8F2 BHI 46L2 ; 0x3419402C
.L3: 0x34194046: F1AE 3301 SUB.W R3, LR, #0x01010101 0x3419404A: 1A10 SUBS R0, R2, R0 0x3419404C: EA23 030E BIC.W R3, R3, LR 0x34194050: F023 337F BIC R3, R3, #0x7F7F7F7F 0x34194054: BA1B REV R3, R3 0x34194056: FAB3 F383 CLZ R3, R3 0x3419405A: EBB1 0FD3 CMP.W R1, R3, LSR #3 0x3419405E: BF88 IT HI 0x34194060: 08D9 LSRHI R1, R3, #3 0x34194062: 4408 ADD R0, R1 0x34194064: BD00 POP 123PC}

Section .text.libc.__SEGGER_RTL_ascii_mbtowc from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=48, align=2


__SEGGER_RTL_ascii_mbtowc: 0x34194066: 4684 MOV R12, R0 0x34194068: 2000 MOVS R0, #0 0x3419406A: 2900 CMP R1, #0 0x3419406C: BF18 IT NE 0x3419406E: 2A00 CMPNE R2, #0 0x34194070: D00D BEQ 46L1 ; 0x3419408E 0x34194072: 7808 LDRB R0, [R1] 0x34194074: 0601 LSLS R1, R0, #24 0x34194076: D40B BMI 46L2 ; 0x34194090 0x34194078: F1BC 0F00 CMP.W R12, #0 0x3419407C: BF18 IT NE 0x3419407E: F8CC 0000 STRNE.W R0, [R12] 0x34194082: 2100 MOVS R1, #0 0x34194084: 0600 LSLS R0, R0, #24 0x34194086: E9C3 1100 STRD R1, R1, [R3] 0x3419408A: EA5F 900F CSET R0, NE
.L1: 0x3419408E: 4770 BX LR
.L2: 0x34194090: F06F 0001 MVN R0, #1 0x34194094: 4770 BX LR

Section .text.libc.__SEGGER_RTL_ascii_isctype from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=32, align=2


__SEGGER_RTL_ascii_isctype: 0x34194096: 287F CMP R0, #127 0x34194098: D80B BHI 46L1 ; 0x341940B2 0x3419409A: F244 5284 MOVW R2, #0x4584 ; 0x34194584 = __SEGGER_RTL_ascii_ctype_map 0x3419409E: F244 4307 MOVW R3, #0x4407 ; 0x34194407 = __SEGGER_RTL_ascii_ctype_mask 0x341940A2: F2C3 4219 MOVT R2, #0x3419 ; 0x34194584 = __SEGGER_RTL_ascii_ctype_map 0x341940A6: F2C3 4319 MOVT R3, #0x3419 ; 0x34194407 = __SEGGER_RTL_ascii_ctype_mask 0x341940AA: 5C10 LDRB R0, [R2, R0] 0x341940AC: 5C59 LDRB R1, [R3, R1] 0x341940AE: 4008 ANDS R0, R1 0x341940B0: 4770 BX LR
.L1: 0x341940B2: 2000 MOVS R0, #0 0x341940B4: 4770 BX LR

Section .text.libc.__SEGGER_RTL_ascii_toupper from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=12, align=2


__SEGGER_RTL_ascii_toupper: 0x341940B6: F1A0 0161 SUB.W R1, R0, #97 0x341940BA: 291A CMP R1, #26 0x341940BC: BF38 IT CC 0x341940BE: 3820 SUBCC R0, #32 0x341940C0: 4770 BX LR

Section .text.libc.__SEGGER_RTL_ascii_tolower from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=12, align=2


__SEGGER_RTL_ascii_tolower: 0x341940C2: F1A0 0141 SUB.W R1, R0, #65 0x341940C6: 291A CMP R1, #26 0x341940C8: BF38 IT CC 0x341940CA: 3020 ADDCC R0, #32 0x341940CC: 4770 BX LR

Section .text.libc.__SEGGER_RTL_ascii_iswctype from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=32, align=2


__SEGGER_RTL_ascii_iswctype: 0x341940CE: 287F CMP R0, #127 0x341940D0: D80B BHI 46L1 ; 0x341940EA 0x341940D2: F244 5284 MOVW R2, #0x4584 ; 0x34194584 = __SEGGER_RTL_ascii_ctype_map 0x341940D6: F244 4307 MOVW R3, #0x4407 ; 0x34194407 = __SEGGER_RTL_ascii_ctype_mask 0x341940DA: F2C3 4219 MOVT R2, #0x3419 ; 0x34194584 = __SEGGER_RTL_ascii_ctype_map 0x341940DE: F2C3 4319 MOVT R3, #0x3419 ; 0x34194407 = __SEGGER_RTL_ascii_ctype_mask 0x341940E2: 5C10 LDRB R0, [R2, R0] 0x341940E4: 5C59 LDRB R1, [R3, R1] 0x341940E6: 4008 ANDS R0, R1 0x341940E8: 4770 BX LR
.L1: 0x341940EA: 2000 MOVS R0, #0 0x341940EC: 4770 BX LR

Section .text.libc.__SEGGER_RTL_ascii_towupper from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=12, align=2


__SEGGER_RTL_ascii_towupper: 0x341940EE: F1A0 0161 SUB.W R1, R0, #97 0x341940F2: 291A CMP R1, #26 0x341940F4: BF38 IT CC 0x341940F6: 3820 SUBCC R0, #32 0x341940F8: 4770 BX LR

Section .text.libc.__SEGGER_RTL_ascii_towlower from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=12, align=2


__SEGGER_RTL_ascii_towlower: 0x341940FA: F1A0 0141 SUB.W R1, R0, #65 0x341940FE: 291A CMP R1, #26 0x34194100: BF38 IT CC 0x34194102: 3020 ADDCC R0, #32 0x34194104: 4770 BX LR

Section .rodata.libc..L.str from __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=7, align=1

  0x34194106:  28           DC.B       0x28                     ; '('
  0x34194107:  6E           DC.B       0x6E                     ; 'n'
  0x34194108:  75           DC.B       0x75                     ; 'u'
  0x34194109:  6C           DC.B       0x6C                     ; 'l'
  0x3419410A:  6C           DC.B       0x6C                     ; 'l'
  0x3419410B:  29           DC.B       0x29                     ; ')'
  0x3419410C:  00           DC.B       0x00                     ; '\0'

Section .rodata.libc.__SEGGER_RTL_c_locale_month_names from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=87, align=1


__SEGGER_RTL_c_locale_month_names: 0x3419410D: 4A DC.B 0x4A ; 'J' 0x3419410E: 61 DC.B 0x61 ; 'a' 0x3419410F: 6E DC.B 0x6E ; 'n' 0x34194110: 75 DC.B 0x75 ; 'u' 0x34194111: 61 DC.B 0x61 ; 'a' 0x34194112: 72 DC.B 0x72 ; 'r' 0x34194113: 79 DC.B 0x79 ; 'y' 0x34194114: 00 DC.B 0x00 ; '\0' 0x34194115: 46 DC.B 0x46 ; 'F' 0x34194116: 65 DC.B 0x65 ; 'e' 0x34194117: 62 DC.B 0x62 ; 'b' 0x34194118: 72 DC.B 0x72 ; 'r' 0x34194119: 75 DC.B 0x75 ; 'u' 0x3419411A: 61 DC.B 0x61 ; 'a' 0x3419411B: 72 DC.B 0x72 ; 'r' 0x3419411C: 79 DC.B 0x79 ; 'y' 0x3419411D: 00 DC.B 0x00 ; '\0' 0x3419411E: 4D DC.B 0x4D ; 'M' 0x3419411F: 61 DC.B 0x61 ; 'a' 0x34194120: 72 DC.B 0x72 ; 'r' 0x34194121: 63 DC.B 0x63 ; 'c' 0x34194122: 68 DC.B 0x68 ; 'h' 0x34194123: 00 DC.B 0x00 ; '\0' 0x34194124: 41 DC.B 0x41 ; 'A' 0x34194125: 70 DC.B 0x70 ; 'p' 0x34194126: 72 DC.B 0x72 ; 'r' 0x34194127: 69 DC.B 0x69 ; 'i' 0x34194128: 6C DC.B 0x6C ; 'l' 0x34194129: 00 DC.B 0x00 ; '\0' 0x3419412A: 4D DC.B 0x4D ; 'M' 0x3419412B: 61 DC.B 0x61 ; 'a' 0x3419412C: 79 DC.B 0x79 ; 'y' 0x3419412D: 00 DC.B 0x00 ; '\0' 0x3419412E: 4A DC.B 0x4A ; 'J' 0x3419412F: 75 DC.B 0x75 ; 'u' 0x34194130: 6E DC.B 0x6E ; 'n' 0x34194131: 65 DC.B 0x65 ; 'e' 0x34194132: 00 DC.B 0x00 ; '\0' 0x34194133: 4A DC.B 0x4A ; 'J' 0x34194134: 75 DC.B 0x75 ; 'u' 0x34194135: 6C DC.B 0x6C ; 'l' 0x34194136: 79 DC.B 0x79 ; 'y' 0x34194137: 00 DC.B 0x00 ; '\0' 0x34194138: 41 DC.B 0x41 ; 'A' 0x34194139: 75 DC.B 0x75 ; 'u' 0x3419413A: 67 DC.B 0x67 ; 'g' 0x3419413B: 75 DC.B 0x75 ; 'u' 0x3419413C: 73 DC.B 0x73 ; 's' 0x3419413D: 74 DC.B 0x74 ; 't' 0x3419413E: 00 DC.B 0x00 ; '\0' 0x3419413F: 53 DC.B 0x53 ; 'S' 0x34194140: 65 DC.B 0x65 ; 'e' 0x34194141: 70 DC.B 0x70 ; 'p' 0x34194142: 74 DC.B 0x74 ; 't' 0x34194143: 65 DC.B 0x65 ; 'e' 0x34194144: 6D DC.B 0x6D ; 'm' 0x34194145: 62 DC.B 0x62 ; 'b' 0x34194146: 65 DC.B 0x65 ; 'e' 0x34194147: 72 DC.B 0x72 ; 'r' 0x34194148: 00 DC.B 0x00 ; '\0' 0x34194149: 4F DC.B 0x4F ; 'O' 0x3419414A: 63 DC.B 0x63 ; 'c' 0x3419414B: 74 DC.B 0x74 ; 't' 0x3419414C: 6F DC.B 0x6F ; 'o' 0x3419414D: 62 DC.B 0x62 ; 'b' 0x3419414E: 65 DC.B 0x65 ; 'e' 0x3419414F: 72 DC.B 0x72 ; 'r' 0x34194150: 00 DC.B 0x00 ; '\0' 0x34194151: 4E DC.B 0x4E ; 'N' 0x34194152: 6F DC.B 0x6F ; 'o' 0x34194153: 76 DC.B 0x76 ; 'v' 0x34194154: 65 DC.B 0x65 ; 'e' 0x34194155: 6D DC.B 0x6D ; 'm' 0x34194156: 62 DC.B 0x62 ; 'b' 0x34194157: 65 DC.B 0x65 ; 'e' 0x34194158: 72 DC.B 0x72 ; 'r' 0x34194159: 00 DC.B 0x00 ; '\0' 0x3419415A: 44 DC.B 0x44 ; 'D' 0x3419415B: 65 DC.B 0x65 ; 'e' 0x3419415C: 63 DC.B 0x63 ; 'c' 0x3419415D: 65 DC.B 0x65 ; 'e' 0x3419415E: 6D DC.B 0x6D ; 'm' 0x3419415F: 62 DC.B 0x62 ; 'b' 0x34194160: 65 DC.B 0x65 ; 'e' 0x34194161: 72 DC.B 0x72 ; 'r' 0x34194162: 00 DC.B 0x00 ; '\0' 0x34194163: 00 DC.B 0x00 ; '\0'

Section .rodata.libc.__SEGGER_RTL_c_locale_am_pm_indicator from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=7, align=1


__SEGGER_RTL_c_locale_am_pm_indicator: 0x34194164: 41 DC.B 0x41 ; 'A' 0x34194165: 4D DC.B 0x4D ; 'M' 0x34194166: 00 DC.B 0x00 ; '\0' 0x34194167: 50 DC.B 0x50 ; 'P' 0x34194168: 4D DC.B 0x4D ; 'M' 0x34194169: 00 DC.B 0x00 ; '\0' 0x3419416A: 00 DC.B 0x00 ; '\0'

Section .rodata.libc.__SEGGER_RTL_c_locale_date_time_format from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=15, align=1


__SEGGER_RTL_c_locale_date_time_format: 0x3419416B: 25 DC.B 0x25 ; '%' 0x3419416C: 61 DC.B 0x61 ; 'a' 0x3419416D: 20 DC.B 0x20 ; ' ' 0x3419416E: 25 DC.B 0x25 ; '%' 0x3419416F: 62 DC.B 0x62 ; 'b' 0x34194170: 20 DC.B 0x20 ; ' ' 0x34194171: 25 DC.B 0x25 ; '%' 0x34194172: 65 DC.B 0x65 ; 'e' 0x34194173: 20 DC.B 0x20 ; ' ' 0x34194174: 25 DC.B 0x25 ; '%' 0x34194175: 54 DC.B 0x54 ; 'T' 0x34194176: 20 DC.B 0x20 ; ' ' 0x34194177: 25 DC.B 0x25 ; '%' 0x34194178: 59 DC.B 0x59 ; 'Y' 0x34194179: 00 DC.B 0x00 ; '\0'

Section .rodata..L.str.20 from blto2_FSBL_lto.o, size=106, align=1

  0x3419417A:  44           DC.B       0x44                     ; 'D'
  0x3419417B:  3A           DC.B       0x3A                     ; ':'
  0x3419417C:  5C           DC.B       0x5C                     ; '\\'
  0x3419417D:  50           DC.B       0x50                     ; 'P'
  0x3419417E:  72           DC.B       0x72                     ; 'r'
  0x3419417F:  6F           DC.B       0x6F                     ; 'o'
  0x34194180:  6A           DC.B       0x6A                     ; 'j'
  0x34194181:  65           DC.B       0x65                     ; 'e'
  0x34194182:  6B           DC.B       0x6B                     ; 'k'
  0x34194183:  74           DC.B       0x74                     ; 't'
  0x34194184:  65           DC.B       0x65                     ; 'e'
  0x34194185:  5C           DC.B       0x5C                     ; '\\'
  0x34194186:  68           DC.B       0x68                     ; 'h'
  0x34194187:  61           DC.B       0x61                     ; 'a'
  0x34194188:  64           DC.B       0x64                     ; 'd'
  0x34194189:  65           DC.B       0x65                     ; 'e'
  0x3419418A:  77           DC.B       0x77                     ; 'w'
  0x3419418B:  65           DC.B       0x65                     ; 'e'
  0x3419418C:  5F           DC.B       0x5F                     ; '_'
  0x3419418D:  62           DC.B       0x62                     ; 'b'
  0x3419418E:  6C           DC.B       0x6C                     ; 'l'
  0x3419418F:  74           DC.B       0x74                     ; 't'
  0x34194190:  6F           DC.B       0x6F                     ; 'o'
  0x34194191:  32           DC.B       0x32                     ; '2'
  0x34194192:  5C           DC.B       0x5C                     ; '\\'
  0x34194193:  74           DC.B       0x74                     ; 't'
  0x34194194:  72           DC.B       0x72                     ; 'r'
  0x34194195:  75           DC.B       0x75                     ; 'u'
  0x34194196:  6E           DC.B       0x6E                     ; 'n'
  0x34194197:  6B           DC.B       0x6B                     ; 'k'
  0x34194198:  5C           DC.B       0x5C                     ; '\\'
  0x34194199:  66           DC.B       0x66                     ; 'f'
  0x3419419A:  69           DC.B       0x69                     ; 'i'
  0x3419419B:  72           DC.B       0x72                     ; 'r'
  0x3419419C:  6D           DC.B       0x6D                     ; 'm'
  0x3419419D:  77           DC.B       0x77                     ; 'w'
  0x3419419E:  61           DC.B       0x61                     ; 'a'
  0x3419419F:  72           DC.B       0x72                     ; 'r'
  0x341941A0:  65           DC.B       0x65                     ; 'e'
  0x341941A1:  5C           DC.B       0x5C                     ; '\\'
  0x341941A2:  46           DC.B       0x46                     ; 'F'
  0x341941A3:  53           DC.B       0x53                     ; 'S'
  0x341941A4:  42           DC.B       0x42                     ; 'B'
  0x341941A5:  4C           DC.B       0x4C                     ; 'L'
  0x341941A6:  5C           DC.B       0x5C                     ; '\\'
  0x341941A7:  43           DC.B       0x43                     ; 'C'
  0x341941A8:  75           DC.B       0x75                     ; 'u'
  0x341941A9:  62           DC.B       0x62                     ; 'b'
  0x341941AA:  65           DC.B       0x65                     ; 'e'
  0x341941AB:  4D           DC.B       0x4D                     ; 'M'
  0x341941AC:  58           DC.B       0x58                     ; 'X'
  0x341941AD:  5C           DC.B       0x5C                     ; '\\'
  0x341941AE:  44           DC.B       0x44                     ; 'D'
  0x341941AF:  72           DC.B       0x72                     ; 'r'
  0x341941B0:  69           DC.B       0x69                     ; 'i'
  0x341941B1:  76           DC.B       0x76                     ; 'v'
  0x341941B2:  65           DC.B       0x65                     ; 'e'
  0x341941B3:  72           DC.B       0x72                     ; 'r'
  0x341941B4:  73           DC.B       0x73                     ; 's'
  0x341941B5:  5C           DC.B       0x5C                     ; '\\'
  0x341941B6:  53           DC.B       0x53                     ; 'S'
  0x341941B7:  54           DC.B       0x54                     ; 'T'
  0x341941B8:  4D           DC.B       0x4D                     ; 'M'
  0x341941B9:  33           DC.B       0x33                     ; '3'
  0x341941BA:  32           DC.B       0x32                     ; '2'
  0x341941BB:  4E           DC.B       0x4E                     ; 'N'
  0x341941BC:  36           DC.B       0x36                     ; '6'
  0x341941BD:  78           DC.B       0x78                     ; 'x'
  0x341941BE:  78           DC.B       0x78                     ; 'x'
  0x341941BF:  5F           DC.B       0x5F                     ; '_'
  0x341941C0:  48           DC.B       0x48                     ; 'H'
  0x341941C1:  41           DC.B       0x41                     ; 'A'
  0x341941C2:  4C           DC.B       0x4C                     ; 'L'
  0x341941C3:  5F           DC.B       0x5F                     ; '_'
  0x341941C4:  44           DC.B       0x44                     ; 'D'
  0x341941C5:  72           DC.B       0x72                     ; 'r'
  0x341941C6:  69           DC.B       0x69                     ; 'i'
  0x341941C7:  76           DC.B       0x76                     ; 'v'
  0x341941C8:  65           DC.B       0x65                     ; 'e'
  0x341941C9:  72           DC.B       0x72                     ; 'r'
  0x341941CA:  5C           DC.B       0x5C                     ; '\\'
  0x341941CB:  53           DC.B       0x53                     ; 'S'
  0x341941CC:  72           DC.B       0x72                     ; 'r'
  0x341941CD:  63           DC.B       0x63                     ; 'c'
  0x341941CE:  5C           DC.B       0x5C                     ; '\\'
  0x341941CF:  73           DC.B       0x73                     ; 's'
  0x341941D0:  74           DC.B       0x74                     ; 't'
  0x341941D1:  6D           DC.B       0x6D                     ; 'm'
  0x341941D2:  33           DC.B       0x33                     ; '3'
  0x341941D3:  32           DC.B       0x32                     ; '2'
  0x341941D4:  6E           DC.B       0x6E                     ; 'n'
  0x341941D5:  36           DC.B       0x36                     ; '6'
  0x341941D6:  78           DC.B       0x78                     ; 'x'
  0x341941D7:  78           DC.B       0x78                     ; 'x'
  0x341941D8:  5F           DC.B       0x5F                     ; '_'
  0x341941D9:  68           DC.B       0x68                     ; 'h'
  0x341941DA:  61           DC.B       0x61                     ; 'a'
  0x341941DB:  6C           DC.B       0x6C                     ; 'l'
  0x341941DC:  5F           DC.B       0x5F                     ; '_'
  0x341941DD:  62           DC.B       0x62                     ; 'b'
  0x341941DE:  73           DC.B       0x73                     ; 's'
  0x341941DF:  65           DC.B       0x65                     ; 'e'
  0x341941E0:  63           DC.B       0x63                     ; 'c'
  0x341941E1:  2E           DC.B       0x2E                     ; '.'
  0x341941E2:  63           DC.B       0x63                     ; 'c'
  0x341941E3:  00           DC.B       0x00                     ; '\0'

Section .rodata..L.str.33 from blto2_FSBL_lto.o, size=106, align=1

  0x341941E4:  44           DC.B       0x44                     ; 'D'
  0x341941E5:  3A           DC.B       0x3A                     ; ':'
  0x341941E6:  5C           DC.B       0x5C                     ; '\\'
  0x341941E7:  50           DC.B       0x50                     ; 'P'
  0x341941E8:  72           DC.B       0x72                     ; 'r'
  0x341941E9:  6F           DC.B       0x6F                     ; 'o'
  0x341941EA:  6A           DC.B       0x6A                     ; 'j'
  0x341941EB:  65           DC.B       0x65                     ; 'e'
  0x341941EC:  6B           DC.B       0x6B                     ; 'k'
  0x341941ED:  74           DC.B       0x74                     ; 't'
  0x341941EE:  65           DC.B       0x65                     ; 'e'
  0x341941EF:  5C           DC.B       0x5C                     ; '\\'
  0x341941F0:  68           DC.B       0x68                     ; 'h'
  0x341941F1:  61           DC.B       0x61                     ; 'a'
  0x341941F2:  64           DC.B       0x64                     ; 'd'
  0x341941F3:  65           DC.B       0x65                     ; 'e'
  0x341941F4:  77           DC.B       0x77                     ; 'w'
  0x341941F5:  65           DC.B       0x65                     ; 'e'
  0x341941F6:  5F           DC.B       0x5F                     ; '_'
  0x341941F7:  62           DC.B       0x62                     ; 'b'
  0x341941F8:  6C           DC.B       0x6C                     ; 'l'
  0x341941F9:  74           DC.B       0x74                     ; 't'
  0x341941FA:  6F           DC.B       0x6F                     ; 'o'
  0x341941FB:  32           DC.B       0x32                     ; '2'
  0x341941FC:  5C           DC.B       0x5C                     ; '\\'
  0x341941FD:  74           DC.B       0x74                     ; 't'
  0x341941FE:  72           DC.B       0x72                     ; 'r'
  0x341941FF:  75           DC.B       0x75                     ; 'u'
  0x34194200:  6E           DC.B       0x6E                     ; 'n'
  0x34194201:  6B           DC.B       0x6B                     ; 'k'
  0x34194202:  5C           DC.B       0x5C                     ; '\\'
  0x34194203:  66           DC.B       0x66                     ; 'f'
  0x34194204:  69           DC.B       0x69                     ; 'i'
  0x34194205:  72           DC.B       0x72                     ; 'r'
  0x34194206:  6D           DC.B       0x6D                     ; 'm'
  0x34194207:  77           DC.B       0x77                     ; 'w'
  0x34194208:  61           DC.B       0x61                     ; 'a'
  0x34194209:  72           DC.B       0x72                     ; 'r'
  0x3419420A:  65           DC.B       0x65                     ; 'e'
  0x3419420B:  5C           DC.B       0x5C                     ; '\\'
  0x3419420C:  46           DC.B       0x46                     ; 'F'
  0x3419420D:  53           DC.B       0x53                     ; 'S'
  0x3419420E:  42           DC.B       0x42                     ; 'B'
  0x3419420F:  4C           DC.B       0x4C                     ; 'L'
  0x34194210:  5C           DC.B       0x5C                     ; '\\'
  0x34194211:  43           DC.B       0x43                     ; 'C'
  0x34194212:  75           DC.B       0x75                     ; 'u'
  0x34194213:  62           DC.B       0x62                     ; 'b'
  0x34194214:  65           DC.B       0x65                     ; 'e'
  0x34194215:  4D           DC.B       0x4D                     ; 'M'
  0x34194216:  58           DC.B       0x58                     ; 'X'
  0x34194217:  5C           DC.B       0x5C                     ; '\\'
  0x34194218:  44           DC.B       0x44                     ; 'D'
  0x34194219:  72           DC.B       0x72                     ; 'r'
  0x3419421A:  69           DC.B       0x69                     ; 'i'
  0x3419421B:  76           DC.B       0x76                     ; 'v'
  0x3419421C:  65           DC.B       0x65                     ; 'e'
  0x3419421D:  72           DC.B       0x72                     ; 'r'
  0x3419421E:  73           DC.B       0x73                     ; 's'
  0x3419421F:  5C           DC.B       0x5C                     ; '\\'
  0x34194220:  53           DC.B       0x53                     ; 'S'
  0x34194221:  54           DC.B       0x54                     ; 'T'
  0x34194222:  4D           DC.B       0x4D                     ; 'M'
  0x34194223:  33           DC.B       0x33                     ; '3'
  0x34194224:  32           DC.B       0x32                     ; '2'
  0x34194225:  4E           DC.B       0x4E                     ; 'N'
  0x34194226:  36           DC.B       0x36                     ; '6'
  0x34194227:  78           DC.B       0x78                     ; 'x'
  0x34194228:  78           DC.B       0x78                     ; 'x'
  0x34194229:  5F           DC.B       0x5F                     ; '_'
  0x3419422A:  48           DC.B       0x48                     ; 'H'
  0x3419422B:  41           DC.B       0x41                     ; 'A'
  0x3419422C:  4C           DC.B       0x4C                     ; 'L'
  0x3419422D:  5F           DC.B       0x5F                     ; '_'
  0x3419422E:  44           DC.B       0x44                     ; 'D'
  0x3419422F:  72           DC.B       0x72                     ; 'r'
  0x34194230:  69           DC.B       0x69                     ; 'i'
  0x34194231:  76           DC.B       0x76                     ; 'v'
  0x34194232:  65           DC.B       0x65                     ; 'e'
  0x34194233:  72           DC.B       0x72                     ; 'r'
  0x34194234:  5C           DC.B       0x5C                     ; '\\'
  0x34194235:  53           DC.B       0x53                     ; 'S'
  0x34194236:  72           DC.B       0x72                     ; 'r'
  0x34194237:  63           DC.B       0x63                     ; 'c'
  0x34194238:  5C           DC.B       0x5C                     ; '\\'
  0x34194239:  73           DC.B       0x73                     ; 's'
  0x3419423A:  74           DC.B       0x74                     ; 't'
  0x3419423B:  6D           DC.B       0x6D                     ; 'm'
  0x3419423C:  33           DC.B       0x33                     ; '3'
  0x3419423D:  32           DC.B       0x32                     ; '2'
  0x3419423E:  6E           DC.B       0x6E                     ; 'n'
  0x3419423F:  36           DC.B       0x36                     ; '6'
  0x34194240:  78           DC.B       0x78                     ; 'x'
  0x34194241:  78           DC.B       0x78                     ; 'x'
  0x34194242:  5F           DC.B       0x5F                     ; '_'
  0x34194243:  68           DC.B       0x68                     ; 'h'
  0x34194244:  61           DC.B       0x61                     ; 'a'
  0x34194245:  6C           DC.B       0x6C                     ; 'l'
  0x34194246:  5F           DC.B       0x5F                     ; '_'
  0x34194247:  67           DC.B       0x67                     ; 'g'
  0x34194248:  70           DC.B       0x70                     ; 'p'
  0x34194249:  69           DC.B       0x69                     ; 'i'
  0x3419424A:  6F           DC.B       0x6F                     ; 'o'
  0x3419424B:  2E           DC.B       0x2E                     ; '.'
  0x3419424C:  63           DC.B       0x63                     ; 'c'
  0x3419424D:  00           DC.B       0x00                     ; '\0'

Section .rodata..L.str.98 from blto2_FSBL_lto.o, size=106, align=1

  0x3419424E:  44           DC.B       0x44                     ; 'D'
  0x3419424F:  3A           DC.B       0x3A                     ; ':'
  0x34194250:  5C           DC.B       0x5C                     ; '\\'
  0x34194251:  50           DC.B       0x50                     ; 'P'
  0x34194252:  72           DC.B       0x72                     ; 'r'
  0x34194253:  6F           DC.B       0x6F                     ; 'o'
  0x34194254:  6A           DC.B       0x6A                     ; 'j'
  0x34194255:  65           DC.B       0x65                     ; 'e'
  0x34194256:  6B           DC.B       0x6B                     ; 'k'
  0x34194257:  74           DC.B       0x74                     ; 't'
  0x34194258:  65           DC.B       0x65                     ; 'e'
  0x34194259:  5C           DC.B       0x5C                     ; '\\'
  0x3419425A:  68           DC.B       0x68                     ; 'h'
  0x3419425B:  61           DC.B       0x61                     ; 'a'
  0x3419425C:  64           DC.B       0x64                     ; 'd'
  0x3419425D:  65           DC.B       0x65                     ; 'e'
  0x3419425E:  77           DC.B       0x77                     ; 'w'
  0x3419425F:  65           DC.B       0x65                     ; 'e'
  0x34194260:  5F           DC.B       0x5F                     ; '_'
  0x34194261:  62           DC.B       0x62                     ; 'b'
  0x34194262:  6C           DC.B       0x6C                     ; 'l'
  0x34194263:  74           DC.B       0x74                     ; 't'
  0x34194264:  6F           DC.B       0x6F                     ; 'o'
  0x34194265:  32           DC.B       0x32                     ; '2'
  0x34194266:  5C           DC.B       0x5C                     ; '\\'
  0x34194267:  74           DC.B       0x74                     ; 't'
  0x34194268:  72           DC.B       0x72                     ; 'r'
  0x34194269:  75           DC.B       0x75                     ; 'u'
  0x3419426A:  6E           DC.B       0x6E                     ; 'n'
  0x3419426B:  6B           DC.B       0x6B                     ; 'k'
  0x3419426C:  5C           DC.B       0x5C                     ; '\\'
  0x3419426D:  66           DC.B       0x66                     ; 'f'
  0x3419426E:  69           DC.B       0x69                     ; 'i'
  0x3419426F:  72           DC.B       0x72                     ; 'r'
  0x34194270:  6D           DC.B       0x6D                     ; 'm'
  0x34194271:  77           DC.B       0x77                     ; 'w'
  0x34194272:  61           DC.B       0x61                     ; 'a'
  0x34194273:  72           DC.B       0x72                     ; 'r'
  0x34194274:  65           DC.B       0x65                     ; 'e'
  0x34194275:  5C           DC.B       0x5C                     ; '\\'
  0x34194276:  46           DC.B       0x46                     ; 'F'
  0x34194277:  53           DC.B       0x53                     ; 'S'
  0x34194278:  42           DC.B       0x42                     ; 'B'
  0x34194279:  4C           DC.B       0x4C                     ; 'L'
  0x3419427A:  5C           DC.B       0x5C                     ; '\\'
  0x3419427B:  43           DC.B       0x43                     ; 'C'
  0x3419427C:  75           DC.B       0x75                     ; 'u'
  0x3419427D:  62           DC.B       0x62                     ; 'b'
  0x3419427E:  65           DC.B       0x65                     ; 'e'
  0x3419427F:  4D           DC.B       0x4D                     ; 'M'
  0x34194280:  58           DC.B       0x58                     ; 'X'
  0x34194281:  5C           DC.B       0x5C                     ; '\\'
  0x34194282:  44           DC.B       0x44                     ; 'D'
  0x34194283:  72           DC.B       0x72                     ; 'r'
  0x34194284:  69           DC.B       0x69                     ; 'i'
  0x34194285:  76           DC.B       0x76                     ; 'v'
  0x34194286:  65           DC.B       0x65                     ; 'e'
  0x34194287:  72           DC.B       0x72                     ; 'r'
  0x34194288:  73           DC.B       0x73                     ; 's'
  0x34194289:  5C           DC.B       0x5C                     ; '\\'
  0x3419428A:  53           DC.B       0x53                     ; 'S'
  0x3419428B:  54           DC.B       0x54                     ; 'T'
  0x3419428C:  4D           DC.B       0x4D                     ; 'M'
  0x3419428D:  33           DC.B       0x33                     ; '3'
  0x3419428E:  32           DC.B       0x32                     ; '2'
  0x3419428F:  4E           DC.B       0x4E                     ; 'N'
  0x34194290:  36           DC.B       0x36                     ; '6'
  0x34194291:  78           DC.B       0x78                     ; 'x'
  0x34194292:  78           DC.B       0x78                     ; 'x'
  0x34194293:  5F           DC.B       0x5F                     ; '_'
  0x34194294:  48           DC.B       0x48                     ; 'H'
  0x34194295:  41           DC.B       0x41                     ; 'A'
  0x34194296:  4C           DC.B       0x4C                     ; 'L'
  0x34194297:  5F           DC.B       0x5F                     ; '_'
  0x34194298:  44           DC.B       0x44                     ; 'D'
  0x34194299:  72           DC.B       0x72                     ; 'r'
  0x3419429A:  69           DC.B       0x69                     ; 'i'
  0x3419429B:  76           DC.B       0x76                     ; 'v'
  0x3419429C:  65           DC.B       0x65                     ; 'e'
  0x3419429D:  72           DC.B       0x72                     ; 'r'
  0x3419429E:  5C           DC.B       0x5C                     ; '\\'
  0x3419429F:  53           DC.B       0x53                     ; 'S'
  0x341942A0:  72           DC.B       0x72                     ; 'r'
  0x341942A1:  63           DC.B       0x63                     ; 'c'
  0x341942A2:  5C           DC.B       0x5C                     ; '\\'
  0x341942A3:  73           DC.B       0x73                     ; 's'
  0x341942A4:  74           DC.B       0x74                     ; 't'
  0x341942A5:  6D           DC.B       0x6D                     ; 'm'
  0x341942A6:  33           DC.B       0x33                     ; '3'
  0x341942A7:  32           DC.B       0x32                     ; '2'
  0x341942A8:  6E           DC.B       0x6E                     ; 'n'
  0x341942A9:  36           DC.B       0x36                     ; '6'
  0x341942AA:  78           DC.B       0x78                     ; 'x'
  0x341942AB:  78           DC.B       0x78                     ; 'x'
  0x341942AC:  5F           DC.B       0x5F                     ; '_'
  0x341942AD:  68           DC.B       0x68                     ; 'h'
  0x341942AE:  61           DC.B       0x61                     ; 'a'
  0x341942AF:  6C           DC.B       0x6C                     ; 'l'
  0x341942B0:  5F           DC.B       0x5F                     ; '_'
  0x341942B1:  78           DC.B       0x78                     ; 'x'
  0x341942B2:  73           DC.B       0x73                     ; 's'
  0x341942B3:  70           DC.B       0x70                     ; 'p'
  0x341942B4:  69           DC.B       0x69                     ; 'i'
  0x341942B5:  2E           DC.B       0x2E                     ; '.'
  0x341942B6:  63           DC.B       0x63                     ; 'c'
  0x341942B7:  00           DC.B       0x00                     ; '\0'

Section .rodata.libc.__SEGGER_RTL_c_locale_day_names from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=58, align=1


__SEGGER_RTL_c_locale_day_names: 0x341942B8: 53 DC.B 0x53 ; 'S' 0x341942B9: 75 DC.B 0x75 ; 'u' 0x341942BA: 6E DC.B 0x6E ; 'n' 0x341942BB: 64 DC.B 0x64 ; 'd' 0x341942BC: 61 DC.B 0x61 ; 'a' 0x341942BD: 79 DC.B 0x79 ; 'y' 0x341942BE: 00 DC.B 0x00 ; '\0' 0x341942BF: 4D DC.B 0x4D ; 'M' 0x341942C0: 6F DC.B 0x6F ; 'o' 0x341942C1: 6E DC.B 0x6E ; 'n' 0x341942C2: 64 DC.B 0x64 ; 'd' 0x341942C3: 61 DC.B 0x61 ; 'a' 0x341942C4: 79 DC.B 0x79 ; 'y' 0x341942C5: 00 DC.B 0x00 ; '\0' 0x341942C6: 54 DC.B 0x54 ; 'T' 0x341942C7: 75 DC.B 0x75 ; 'u' 0x341942C8: 65 DC.B 0x65 ; 'e' 0x341942C9: 73 DC.B 0x73 ; 's' 0x341942CA: 64 DC.B 0x64 ; 'd' 0x341942CB: 61 DC.B 0x61 ; 'a' 0x341942CC: 79 DC.B 0x79 ; 'y' 0x341942CD: 00 DC.B 0x00 ; '\0' 0x341942CE: 57 DC.B 0x57 ; 'W' 0x341942CF: 65 DC.B 0x65 ; 'e' 0x341942D0: 64 DC.B 0x64 ; 'd' 0x341942D1: 6E DC.B 0x6E ; 'n' 0x341942D2: 65 DC.B 0x65 ; 'e' 0x341942D3: 73 DC.B 0x73 ; 's' 0x341942D4: 64 DC.B 0x64 ; 'd' 0x341942D5: 61 DC.B 0x61 ; 'a' 0x341942D6: 79 DC.B 0x79 ; 'y' 0x341942D7: 00 DC.B 0x00 ; '\0' 0x341942D8: 54 DC.B 0x54 ; 'T' 0x341942D9: 68 DC.B 0x68 ; 'h' 0x341942DA: 75 DC.B 0x75 ; 'u' 0x341942DB: 72 DC.B 0x72 ; 'r' 0x341942DC: 73 DC.B 0x73 ; 's' 0x341942DD: 64 DC.B 0x64 ; 'd' 0x341942DE: 61 DC.B 0x61 ; 'a' 0x341942DF: 79 DC.B 0x79 ; 'y' 0x341942E0: 00 DC.B 0x00 ; '\0' 0x341942E1: 46 DC.B 0x46 ; 'F' 0x341942E2: 72 DC.B 0x72 ; 'r' 0x341942E3: 69 DC.B 0x69 ; 'i' 0x341942E4: 64 DC.B 0x64 ; 'd' 0x341942E5: 61 DC.B 0x61 ; 'a' 0x341942E6: 79 DC.B 0x79 ; 'y' 0x341942E7: 00 DC.B 0x00 ; '\0' 0x341942E8: 53 DC.B 0x53 ; 'S' 0x341942E9: 61 DC.B 0x61 ; 'a' 0x341942EA: 74 DC.B 0x74 ; 't' 0x341942EB: 75 DC.B 0x75 ; 'u' 0x341942EC: 72 DC.B 0x72 ; 'r' 0x341942ED: 64 DC.B 0x64 ; 'd' 0x341942EE: 61 DC.B 0x61 ; 'a' 0x341942EF: 79 DC.B 0x79 ; 'y' 0x341942F0: 00 DC.B 0x00 ; '\0' 0x341942F1: 00 DC.B 0x00 ; '\0'

Section .rodata.libc..L.str from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=2, align=1

  0x341942F2:  43           DC.B       0x43                     ; 'C'
  0x341942F3:  00           DC.B       0x00                     ; '\0'

Section .rodata.libc.__SEGGER_RTL_data_utf8_period from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=2, align=1


__SEGGER_RTL_data_utf8_period: 0x341942F4: 2E DC.B 0x2E ; '.' 0x341942F5: 00 DC.B 0x00 ; '\0'

Section .rodata..L.str from blto2_FSBL_lto.o, size=25, align=1

  0x341942F6:  5B           DC.B       0x5B                     ; '['
  0x341942F7:  25           DC.B       0x25                     ; '%'
  0x341942F8:  33           DC.B       0x33                     ; '3'
  0x341942F9:  64           DC.B       0x64                     ; 'd'
  0x341942FA:  5D           DC.B       0x5D                     ; ']'
  0x341942FB:  20           DC.B       0x20                     ; ' '
  0x341942FC:  52           DC.B       0x52                     ; 'R'
  0x341942FD:  75           DC.B       0x75                     ; 'u'
  0x341942FE:  6E           DC.B       0x6E                     ; 'n'
  0x341942FF:  6E           DC.B       0x6E                     ; 'n'
  0x34194300:  69           DC.B       0x69                     ; 'i'
  0x34194301:  6E           DC.B       0x6E                     ; 'n'
  0x34194302:  67           DC.B       0x67                     ; 'g'
  0x34194303:  20           DC.B       0x20                     ; ' '
  0x34194304:  61           DC.B       0x61                     ; 'a'
  0x34194305:  74           DC.B       0x74                     ; 't'
  0x34194306:  20           DC.B       0x20                     ; ' '
  0x34194307:  25           DC.B       0x25                     ; '%'
  0x34194308:  75           DC.B       0x75                     ; 'u'
  0x34194309:  20           DC.B       0x20                     ; ' '
  0x3419430A:  4D           DC.B       0x4D                     ; 'M'
  0x3419430B:  48           DC.B       0x48                     ; 'H'
  0x3419430C:  7A           DC.B       0x7A                     ; 'z'
  0x3419430D:  0A           DC.B       0x0A                     ; '\n'
  0x3419430E:  00           DC.B       0x00                     ; '\0'

Section .rodata..L.str.50 from blto2_FSBL_lto.o, size=105, align=1

  0x3419430F:  44           DC.B       0x44                     ; 'D'
  0x34194310:  3A           DC.B       0x3A                     ; ':'
  0x34194311:  5C           DC.B       0x5C                     ; '\\'
  0x34194312:  50           DC.B       0x50                     ; 'P'
  0x34194313:  72           DC.B       0x72                     ; 'r'
  0x34194314:  6F           DC.B       0x6F                     ; 'o'
  0x34194315:  6A           DC.B       0x6A                     ; 'j'
  0x34194316:  65           DC.B       0x65                     ; 'e'
  0x34194317:  6B           DC.B       0x6B                     ; 'k'
  0x34194318:  74           DC.B       0x74                     ; 't'
  0x34194319:  65           DC.B       0x65                     ; 'e'
  0x3419431A:  5C           DC.B       0x5C                     ; '\\'
  0x3419431B:  68           DC.B       0x68                     ; 'h'
  0x3419431C:  61           DC.B       0x61                     ; 'a'
  0x3419431D:  64           DC.B       0x64                     ; 'd'
  0x3419431E:  65           DC.B       0x65                     ; 'e'
  0x3419431F:  77           DC.B       0x77                     ; 'w'
  0x34194320:  65           DC.B       0x65                     ; 'e'
  0x34194321:  5F           DC.B       0x5F                     ; '_'
  0x34194322:  62           DC.B       0x62                     ; 'b'
  0x34194323:  6C           DC.B       0x6C                     ; 'l'
  0x34194324:  74           DC.B       0x74                     ; 't'
  0x34194325:  6F           DC.B       0x6F                     ; 'o'
  0x34194326:  32           DC.B       0x32                     ; '2'
  0x34194327:  5C           DC.B       0x5C                     ; '\\'
  0x34194328:  74           DC.B       0x74                     ; 't'
  0x34194329:  72           DC.B       0x72                     ; 'r'
  0x3419432A:  75           DC.B       0x75                     ; 'u'
  0x3419432B:  6E           DC.B       0x6E                     ; 'n'
  0x3419432C:  6B           DC.B       0x6B                     ; 'k'
  0x3419432D:  5C           DC.B       0x5C                     ; '\\'
  0x3419432E:  66           DC.B       0x66                     ; 'f'
  0x3419432F:  69           DC.B       0x69                     ; 'i'
  0x34194330:  72           DC.B       0x72                     ; 'r'
  0x34194331:  6D           DC.B       0x6D                     ; 'm'
  0x34194332:  77           DC.B       0x77                     ; 'w'
  0x34194333:  61           DC.B       0x61                     ; 'a'
  0x34194334:  72           DC.B       0x72                     ; 'r'
  0x34194335:  65           DC.B       0x65                     ; 'e'
  0x34194336:  5C           DC.B       0x5C                     ; '\\'
  0x34194337:  46           DC.B       0x46                     ; 'F'
  0x34194338:  53           DC.B       0x53                     ; 'S'
  0x34194339:  42           DC.B       0x42                     ; 'B'
  0x3419433A:  4C           DC.B       0x4C                     ; 'L'
  0x3419433B:  5C           DC.B       0x5C                     ; '\\'
  0x3419433C:  43           DC.B       0x43                     ; 'C'
  0x3419433D:  75           DC.B       0x75                     ; 'u'
  0x3419433E:  62           DC.B       0x62                     ; 'b'
  0x3419433F:  65           DC.B       0x65                     ; 'e'
  0x34194340:  4D           DC.B       0x4D                     ; 'M'
  0x34194341:  58           DC.B       0x58                     ; 'X'
  0x34194342:  5C           DC.B       0x5C                     ; '\\'
  0x34194343:  44           DC.B       0x44                     ; 'D'
  0x34194344:  72           DC.B       0x72                     ; 'r'
  0x34194345:  69           DC.B       0x69                     ; 'i'
  0x34194346:  76           DC.B       0x76                     ; 'v'
  0x34194347:  65           DC.B       0x65                     ; 'e'
  0x34194348:  72           DC.B       0x72                     ; 'r'
  0x34194349:  73           DC.B       0x73                     ; 's'
  0x3419434A:  5C           DC.B       0x5C                     ; '\\'
  0x3419434B:  53           DC.B       0x53                     ; 'S'
  0x3419434C:  54           DC.B       0x54                     ; 'T'
  0x3419434D:  4D           DC.B       0x4D                     ; 'M'
  0x3419434E:  33           DC.B       0x33                     ; '3'
  0x3419434F:  32           DC.B       0x32                     ; '2'
  0x34194350:  4E           DC.B       0x4E                     ; 'N'
  0x34194351:  36           DC.B       0x36                     ; '6'
  0x34194352:  78           DC.B       0x78                     ; 'x'
  0x34194353:  78           DC.B       0x78                     ; 'x'
  0x34194354:  5F           DC.B       0x5F                     ; '_'
  0x34194355:  48           DC.B       0x48                     ; 'H'
  0x34194356:  41           DC.B       0x41                     ; 'A'
  0x34194357:  4C           DC.B       0x4C                     ; 'L'
  0x34194358:  5F           DC.B       0x5F                     ; '_'
  0x34194359:  44           DC.B       0x44                     ; 'D'
  0x3419435A:  72           DC.B       0x72                     ; 'r'
  0x3419435B:  69           DC.B       0x69                     ; 'i'
  0x3419435C:  76           DC.B       0x76                     ; 'v'
  0x3419435D:  65           DC.B       0x65                     ; 'e'
  0x3419435E:  72           DC.B       0x72                     ; 'r'
  0x3419435F:  5C           DC.B       0x5C                     ; '\\'
  0x34194360:  53           DC.B       0x53                     ; 'S'
  0x34194361:  72           DC.B       0x72                     ; 'r'
  0x34194362:  63           DC.B       0x63                     ; 'c'
  0x34194363:  5C           DC.B       0x5C                     ; '\\'
  0x34194364:  73           DC.B       0x73                     ; 's'
  0x34194365:  74           DC.B       0x74                     ; 't'
  0x34194366:  6D           DC.B       0x6D                     ; 'm'
  0x34194367:  33           DC.B       0x33                     ; '3'
  0x34194368:  32           DC.B       0x32                     ; '2'
  0x34194369:  6E           DC.B       0x6E                     ; 'n'
  0x3419436A:  36           DC.B       0x36                     ; '6'
  0x3419436B:  78           DC.B       0x78                     ; 'x'
  0x3419436C:  78           DC.B       0x78                     ; 'x'
  0x3419436D:  5F           DC.B       0x5F                     ; '_'
  0x3419436E:  68           DC.B       0x68                     ; 'h'
  0x3419436F:  61           DC.B       0x61                     ; 'a'
  0x34194370:  6C           DC.B       0x6C                     ; 'l'
  0x34194371:  5F           DC.B       0x5F                     ; '_'
  0x34194372:  72           DC.B       0x72                     ; 'r'
  0x34194373:  63           DC.B       0x63                     ; 'c'
  0x34194374:  63           DC.B       0x63                     ; 'c'
  0x34194375:  2E           DC.B       0x2E                     ; '.'
  0x34194376:  63           DC.B       0x63                     ; 'c'
  0x34194377:  00           DC.B       0x00                     ; '\0'

Section .rodata.libc..L.str.1 from __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=5, align=1

  0x34194378:  2D           DC.B       0x2D                     ; '-'
  0x34194379:  49           DC.B       0x49                     ; 'I'
  0x3419437A:  4E           DC.B       0x4E                     ; 'N'
  0x3419437B:  46           DC.B       0x46                     ; 'F'
  0x3419437C:  00           DC.B       0x00                     ; '\0'

Section .rodata.libc..L.str.2 from __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=5, align=1

  0x3419437D:  2D           DC.B       0x2D                     ; '-'
  0x3419437E:  69           DC.B       0x69                     ; 'i'
  0x3419437F:  6E           DC.B       0x6E                     ; 'n'
  0x34194380:  66           DC.B       0x66                     ; 'f'
  0x34194381:  00           DC.B       0x00                     ; '\0'

Section .rodata.libc..L.str.3 from __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=5, align=1

  0x34194382:  2B           DC.B       0x2B                     ; '+'
  0x34194383:  49           DC.B       0x49                     ; 'I'
  0x34194384:  4E           DC.B       0x4E                     ; 'N'
  0x34194385:  46           DC.B       0x46                     ; 'F'
  0x34194386:  00           DC.B       0x00                     ; '\0'

Section .rodata.libc..L.str.4 from __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=5, align=1

  0x34194387:  2B           DC.B       0x2B                     ; '+'
  0x34194388:  69           DC.B       0x69                     ; 'i'
  0x34194389:  6E           DC.B       0x6E                     ; 'n'
  0x3419438A:  66           DC.B       0x66                     ; 'f'
  0x3419438B:  00           DC.B       0x00                     ; '\0'

Section .rodata.libc._DoInit._aInitStr from SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=17, align=1


_DoInit._aInitStr: 0x3419438C: 00 DC.B 0x00 ; '\0' 0x3419438D: 00 DC.B 0x00 ; '\0' 0x3419438E: 00 DC.B 0x00 ; '\0' 0x3419438F: 00 DC.B 0x00 ; '\0' 0x34194390: 00 DC.B 0x00 ; '\0' 0x34194391: 00 DC.B 0x00 ; '\0' 0x34194392: 54 DC.B 0x54 ; 'T' 0x34194393: 54 DC.B 0x54 ; 'T' 0x34194394: 52 DC.B 0x52 ; 'R' 0x34194395: 20 DC.B 0x20 ; ' ' 0x34194396: 52 DC.B 0x52 ; 'R' 0x34194397: 45 DC.B 0x45 ; 'E' 0x34194398: 47 DC.B 0x47 ; 'G' 0x34194399: 47 DC.B 0x47 ; 'G' 0x3419439A: 45 DC.B 0x45 ; 'E' 0x3419439B: 53 DC.B 0x53 ; 'S' 0x3419439C: 00 DC.B 0x00 ; '\0'

Section .rodata.libc..L.str from SEGGER_RTT.o (prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=9, align=1

  0x3419439D:  54           DC.B       0x54                     ; 'T'
  0x3419439E:  65           DC.B       0x65                     ; 'e'
  0x3419439F:  72           DC.B       0x72                     ; 'r'
  0x341943A0:  6D           DC.B       0x6D                     ; 'm'
  0x341943A1:  69           DC.B       0x69                     ; 'i'
  0x341943A2:  6E           DC.B       0x6E                     ; 'n'
  0x341943A3:  61           DC.B       0x61                     ; 'a'
  0x341943A4:  6C           DC.B       0x6C                     ; 'l'
  0x341943A5:  00           DC.B       0x00                     ; '\0'

Section .rodata.libc.__SEGGER_RTL_c_locale_date_format from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=9, align=1


__SEGGER_RTL_c_locale_date_format: 0x341943A6: 25 DC.B 0x25 ; '%' 0x341943A7: 6D DC.B 0x6D ; 'm' 0x341943A8: 2F DC.B 0x2F ; '/' 0x341943A9: 25 DC.B 0x25 ; '%' 0x341943AA: 64 DC.B 0x64 ; 'd' 0x341943AB: 2F DC.B 0x2F ; '/' 0x341943AC: 25 DC.B 0x25 ; '%' 0x341943AD: 79 DC.B 0x79 ; 'y' 0x341943AE: 00 DC.B 0x00 ; '\0'

Section .rodata.libc.__SEGGER_RTL_c_locale_time_format from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=9, align=1


__SEGGER_RTL_c_locale_time_format: 0x341943AF: 25 DC.B 0x25 ; '%' 0x341943B0: 48 DC.B 0x48 ; 'H' 0x341943B1: 3A DC.B 0x3A ; ':' 0x341943B2: 25 DC.B 0x25 ; '%' 0x341943B3: 4D DC.B 0x4D ; 'M' 0x341943B4: 3A DC.B 0x3A ; ':' 0x341943B5: 25 DC.B 0x25 ; '%' 0x341943B6: 53 DC.B 0x53 ; 'S' 0x341943B7: 00 DC.B 0x00 ; '\0'

Section .rodata.libc.__SEGGER_RTL_c_locale_abbrev_day_names from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=29, align=1


__SEGGER_RTL_c_locale_abbrev_day_names: 0x341943B8: 53 DC.B 0x53 ; 'S' 0x341943B9: 75 DC.B 0x75 ; 'u' 0x341943BA: 6E DC.B 0x6E ; 'n' 0x341943BB: 00 DC.B 0x00 ; '\0' 0x341943BC: 4D DC.B 0x4D ; 'M' 0x341943BD: 6F DC.B 0x6F ; 'o' 0x341943BE: 6E DC.B 0x6E ; 'n' 0x341943BF: 00 DC.B 0x00 ; '\0' 0x341943C0: 54 DC.B 0x54 ; 'T' 0x341943C1: 75 DC.B 0x75 ; 'u' 0x341943C2: 65 DC.B 0x65 ; 'e' 0x341943C3: 00 DC.B 0x00 ; '\0' 0x341943C4: 57 DC.B 0x57 ; 'W' 0x341943C5: 65 DC.B 0x65 ; 'e' 0x341943C6: 64 DC.B 0x64 ; 'd' 0x341943C7: 00 DC.B 0x00 ; '\0' 0x341943C8: 54 DC.B 0x54 ; 'T' 0x341943C9: 68 DC.B 0x68 ; 'h' 0x341943CA: 75 DC.B 0x75 ; 'u' 0x341943CB: 00 DC.B 0x00 ; '\0' 0x341943CC: 46 DC.B 0x46 ; 'F' 0x341943CD: 72 DC.B 0x72 ; 'r' 0x341943CE: 69 DC.B 0x69 ; 'i' 0x341943CF: 00 DC.B 0x00 ; '\0' 0x341943D0: 53 DC.B 0x53 ; 'S' 0x341943D1: 61 DC.B 0x61 ; 'a' 0x341943D2: 74 DC.B 0x74 ; 't' 0x341943D3: 00 DC.B 0x00 ; '\0' 0x341943D4: 00 DC.B 0x00 ; '\0'

Section .rodata.libc.__SEGGER_RTL_c_locale_abbrev_month_names from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=49, align=1


__SEGGER_RTL_c_locale_abbrev_month_names: 0x341943D5: 4A DC.B 0x4A ; 'J' 0x341943D6: 61 DC.B 0x61 ; 'a' 0x341943D7: 6E DC.B 0x6E ; 'n' 0x341943D8: 00 DC.B 0x00 ; '\0' 0x341943D9: 46 DC.B 0x46 ; 'F' 0x341943DA: 65 DC.B 0x65 ; 'e' 0x341943DB: 62 DC.B 0x62 ; 'b' 0x341943DC: 00 DC.B 0x00 ; '\0' 0x341943DD: 4D DC.B 0x4D ; 'M' 0x341943DE: 61 DC.B 0x61 ; 'a' 0x341943DF: 72 DC.B 0x72 ; 'r' 0x341943E0: 00 DC.B 0x00 ; '\0' 0x341943E1: 41 DC.B 0x41 ; 'A' 0x341943E2: 70 DC.B 0x70 ; 'p' 0x341943E3: 72 DC.B 0x72 ; 'r' 0x341943E4: 00 DC.B 0x00 ; '\0' 0x341943E5: 4D DC.B 0x4D ; 'M' 0x341943E6: 61 DC.B 0x61 ; 'a' 0x341943E7: 79 DC.B 0x79 ; 'y' 0x341943E8: 00 DC.B 0x00 ; '\0' 0x341943E9: 4A DC.B 0x4A ; 'J' 0x341943EA: 75 DC.B 0x75 ; 'u' 0x341943EB: 6E DC.B 0x6E ; 'n' 0x341943EC: 00 DC.B 0x00 ; '\0' 0x341943ED: 4A DC.B 0x4A ; 'J' 0x341943EE: 75 DC.B 0x75 ; 'u' 0x341943EF: 6C DC.B 0x6C ; 'l' 0x341943F0: 00 DC.B 0x00 ; '\0' 0x341943F1: 41 DC.B 0x41 ; 'A' 0x341943F2: 75 DC.B 0x75 ; 'u' 0x341943F3: 67 DC.B 0x67 ; 'g' 0x341943F4: 00 DC.B 0x00 ; '\0' 0x341943F5: 53 DC.B 0x53 ; 'S' 0x341943F6: 65 DC.B 0x65 ; 'e' 0x341943F7: 70 DC.B 0x70 ; 'p' 0x341943F8: 00 DC.B 0x00 ; '\0' 0x341943F9: 4F DC.B 0x4F ; 'O' 0x341943FA: 63 DC.B 0x63 ; 'c' 0x341943FB: 74 DC.B 0x74 ; 't' 0x341943FC: 00 DC.B 0x00 ; '\0' 0x341943FD: 4E DC.B 0x4E ; 'N' 0x341943FE: 6F DC.B 0x6F ; 'o' 0x341943FF: 76 DC.B 0x76 ; 'v' 0x34194400: 00 DC.B 0x00 ; '\0' 0x34194401: 44 DC.B 0x44 ; 'D' 0x34194402: 65 DC.B 0x65 ; 'e' 0x34194403: 63 DC.B 0x63 ; 'c' 0x34194404: 00 DC.B 0x00 ; '\0' 0x34194405: 00 DC.B 0x00 ; '\0'

Section .rodata.libc.__SEGGER_RTL_data_empty_string from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=1, align=1


__SEGGER_RTL_data_empty_string: 0x34194406: 00 DC.B 0x00 ; '\0'

Section .rodata.libc.__SEGGER_RTL_ascii_ctype_mask from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=13, align=1


__SEGGER_RTL_ascii_ctype_mask: 0x34194407: 00 DC.B 0x00 ; '\0' 0x34194408: 07 DC.B 0x07 ; '\x07' 0x34194409: 03 DC.B 0x03 ; '\x03' 0x3419440A: 20 DC.B 0x20 ; ' ' 0x3419440B: 04 DC.B 0x04 ; '\x04' 0x3419440C: 17 DC.B 0x17 ; '\x17' 0x3419440D: 02 DC.B 0x02 ; '\x02' 0x3419440E: 01 DC.B 0x01 ; '\x01' 0x3419440F: 08 DC.B 0x08 ; '\b' 0x34194410: 57 DC.B 0x57 ; 'W' 0x34194411: 10 DC.B 0x10 ; '\x10' 0x34194412: 40 DC.B 0x40 ; '@' 0x34194413: 80 DC.B 0x80 ; '\x80'

Section .init_array from STM32N6xx_Startup.o, size=4, align=4

  0x34194414:  34181545     DC.W       SystemCoreClockUpdate

Section .rodata..L.str.23 from blto2_FSBL_lto.o, size=108, align=1

  0x34194418:  44           DC.B       0x44                     ; 'D'
  0x34194419:  3A           DC.B       0x3A                     ; ':'
  0x3419441A:  5C           DC.B       0x5C                     ; '\\'
  0x3419441B:  50           DC.B       0x50                     ; 'P'
  0x3419441C:  72           DC.B       0x72                     ; 'r'
  0x3419441D:  6F           DC.B       0x6F                     ; 'o'
  0x3419441E:  6A           DC.B       0x6A                     ; 'j'
  0x3419441F:  65           DC.B       0x65                     ; 'e'
  0x34194420:  6B           DC.B       0x6B                     ; 'k'
  0x34194421:  74           DC.B       0x74                     ; 't'
  0x34194422:  65           DC.B       0x65                     ; 'e'
  0x34194423:  5C           DC.B       0x5C                     ; '\\'
  0x34194424:  68           DC.B       0x68                     ; 'h'
  0x34194425:  61           DC.B       0x61                     ; 'a'
  0x34194426:  64           DC.B       0x64                     ; 'd'
  0x34194427:  65           DC.B       0x65                     ; 'e'
  0x34194428:  77           DC.B       0x77                     ; 'w'
  0x34194429:  65           DC.B       0x65                     ; 'e'
  0x3419442A:  5F           DC.B       0x5F                     ; '_'
  0x3419442B:  62           DC.B       0x62                     ; 'b'
  0x3419442C:  6C           DC.B       0x6C                     ; 'l'
  0x3419442D:  74           DC.B       0x74                     ; 't'
  0x3419442E:  6F           DC.B       0x6F                     ; 'o'
  0x3419442F:  32           DC.B       0x32                     ; '2'
  0x34194430:  5C           DC.B       0x5C                     ; '\\'
  0x34194431:  74           DC.B       0x74                     ; 't'
  0x34194432:  72           DC.B       0x72                     ; 'r'
  0x34194433:  75           DC.B       0x75                     ; 'u'
  0x34194434:  6E           DC.B       0x6E                     ; 'n'
  0x34194435:  6B           DC.B       0x6B                     ; 'k'
  0x34194436:  5C           DC.B       0x5C                     ; '\\'
  0x34194437:  66           DC.B       0x66                     ; 'f'
  0x34194438:  69           DC.B       0x69                     ; 'i'
  0x34194439:  72           DC.B       0x72                     ; 'r'
  0x3419443A:  6D           DC.B       0x6D                     ; 'm'
  0x3419443B:  77           DC.B       0x77                     ; 'w'
  0x3419443C:  61           DC.B       0x61                     ; 'a'
  0x3419443D:  72           DC.B       0x72                     ; 'r'
  0x3419443E:  65           DC.B       0x65                     ; 'e'
  0x3419443F:  5C           DC.B       0x5C                     ; '\\'
  0x34194440:  46           DC.B       0x46                     ; 'F'
  0x34194441:  53           DC.B       0x53                     ; 'S'
  0x34194442:  42           DC.B       0x42                     ; 'B'
  0x34194443:  4C           DC.B       0x4C                     ; 'L'
  0x34194444:  5C           DC.B       0x5C                     ; '\\'
  0x34194445:  43           DC.B       0x43                     ; 'C'
  0x34194446:  75           DC.B       0x75                     ; 'u'
  0x34194447:  62           DC.B       0x62                     ; 'b'
  0x34194448:  65           DC.B       0x65                     ; 'e'
  0x34194449:  4D           DC.B       0x4D                     ; 'M'
  0x3419444A:  58           DC.B       0x58                     ; 'X'
  0x3419444B:  5C           DC.B       0x5C                     ; '\\'
  0x3419444C:  44           DC.B       0x44                     ; 'D'
  0x3419444D:  72           DC.B       0x72                     ; 'r'
  0x3419444E:  69           DC.B       0x69                     ; 'i'
  0x3419444F:  76           DC.B       0x76                     ; 'v'
  0x34194450:  65           DC.B       0x65                     ; 'e'
  0x34194451:  72           DC.B       0x72                     ; 'r'
  0x34194452:  73           DC.B       0x73                     ; 's'
  0x34194453:  5C           DC.B       0x5C                     ; '\\'
  0x34194454:  53           DC.B       0x53                     ; 'S'
  0x34194455:  54           DC.B       0x54                     ; 'T'
  0x34194456:  4D           DC.B       0x4D                     ; 'M'
  0x34194457:  33           DC.B       0x33                     ; '3'
  0x34194458:  32           DC.B       0x32                     ; '2'
  0x34194459:  4E           DC.B       0x4E                     ; 'N'
  0x3419445A:  36           DC.B       0x36                     ; '6'
  0x3419445B:  78           DC.B       0x78                     ; 'x'
  0x3419445C:  78           DC.B       0x78                     ; 'x'
  0x3419445D:  5F           DC.B       0x5F                     ; '_'
  0x3419445E:  48           DC.B       0x48                     ; 'H'
  0x3419445F:  41           DC.B       0x41                     ; 'A'
  0x34194460:  4C           DC.B       0x4C                     ; 'L'
  0x34194461:  5F           DC.B       0x5F                     ; '_'
  0x34194462:  44           DC.B       0x44                     ; 'D'
  0x34194463:  72           DC.B       0x72                     ; 'r'
  0x34194464:  69           DC.B       0x69                     ; 'i'
  0x34194465:  76           DC.B       0x76                     ; 'v'
  0x34194466:  65           DC.B       0x65                     ; 'e'
  0x34194467:  72           DC.B       0x72                     ; 'r'
  0x34194468:  5C           DC.B       0x5C                     ; '\\'
  0x34194469:  53           DC.B       0x53                     ; 'S'
  0x3419446A:  72           DC.B       0x72                     ; 'r'
  0x3419446B:  63           DC.B       0x63                     ; 'c'
  0x3419446C:  5C           DC.B       0x5C                     ; '\\'
  0x3419446D:  73           DC.B       0x73                     ; 's'
  0x3419446E:  74           DC.B       0x74                     ; 't'
  0x3419446F:  6D           DC.B       0x6D                     ; 'm'
  0x34194470:  33           DC.B       0x33                     ; '3'
  0x34194471:  32           DC.B       0x32                     ; '2'
  0x34194472:  6E           DC.B       0x6E                     ; 'n'
  0x34194473:  36           DC.B       0x36                     ; '6'
  0x34194474:  78           DC.B       0x78                     ; 'x'
  0x34194475:  78           DC.B       0x78                     ; 'x'
  0x34194476:  5F           DC.B       0x5F                     ; '_'
  0x34194477:  68           DC.B       0x68                     ; 'h'
  0x34194478:  61           DC.B       0x61                     ; 'a'
  0x34194479:  6C           DC.B       0x6C                     ; 'l'
  0x3419447A:  5F           DC.B       0x5F                     ; '_'
  0x3419447B:  63           DC.B       0x63                     ; 'c'
  0x3419447C:  6F           DC.B       0x6F                     ; 'o'
  0x3419447D:  72           DC.B       0x72                     ; 'r'
  0x3419447E:  74           DC.B       0x74                     ; 't'
  0x3419447F:  65           DC.B       0x65                     ; 'e'
  0x34194480:  78           DC.B       0x78                     ; 'x'
  0x34194481:  2E           DC.B       0x2E                     ; '.'
  0x34194482:  63           DC.B       0x63                     ; 'c'
  0x34194483:  00           DC.B       0x00                     ; '\0'

Section .rodata..L.str.41 from blto2_FSBL_lto.o, size=108, align=1

  0x34194484:  44           DC.B       0x44                     ; 'D'
  0x34194485:  3A           DC.B       0x3A                     ; ':'
  0x34194486:  5C           DC.B       0x5C                     ; '\\'
  0x34194487:  50           DC.B       0x50                     ; 'P'
  0x34194488:  72           DC.B       0x72                     ; 'r'
  0x34194489:  6F           DC.B       0x6F                     ; 'o'
  0x3419448A:  6A           DC.B       0x6A                     ; 'j'
  0x3419448B:  65           DC.B       0x65                     ; 'e'
  0x3419448C:  6B           DC.B       0x6B                     ; 'k'
  0x3419448D:  74           DC.B       0x74                     ; 't'
  0x3419448E:  65           DC.B       0x65                     ; 'e'
  0x3419448F:  5C           DC.B       0x5C                     ; '\\'
  0x34194490:  68           DC.B       0x68                     ; 'h'
  0x34194491:  61           DC.B       0x61                     ; 'a'
  0x34194492:  64           DC.B       0x64                     ; 'd'
  0x34194493:  65           DC.B       0x65                     ; 'e'
  0x34194494:  77           DC.B       0x77                     ; 'w'
  0x34194495:  65           DC.B       0x65                     ; 'e'
  0x34194496:  5F           DC.B       0x5F                     ; '_'
  0x34194497:  62           DC.B       0x62                     ; 'b'
  0x34194498:  6C           DC.B       0x6C                     ; 'l'
  0x34194499:  74           DC.B       0x74                     ; 't'
  0x3419449A:  6F           DC.B       0x6F                     ; 'o'
  0x3419449B:  32           DC.B       0x32                     ; '2'
  0x3419449C:  5C           DC.B       0x5C                     ; '\\'
  0x3419449D:  74           DC.B       0x74                     ; 't'
  0x3419449E:  72           DC.B       0x72                     ; 'r'
  0x3419449F:  75           DC.B       0x75                     ; 'u'
  0x341944A0:  6E           DC.B       0x6E                     ; 'n'
  0x341944A1:  6B           DC.B       0x6B                     ; 'k'
  0x341944A2:  5C           DC.B       0x5C                     ; '\\'
  0x341944A3:  66           DC.B       0x66                     ; 'f'
  0x341944A4:  69           DC.B       0x69                     ; 'i'
  0x341944A5:  72           DC.B       0x72                     ; 'r'
  0x341944A6:  6D           DC.B       0x6D                     ; 'm'
  0x341944A7:  77           DC.B       0x77                     ; 'w'
  0x341944A8:  61           DC.B       0x61                     ; 'a'
  0x341944A9:  72           DC.B       0x72                     ; 'r'
  0x341944AA:  65           DC.B       0x65                     ; 'e'
  0x341944AB:  5C           DC.B       0x5C                     ; '\\'
  0x341944AC:  46           DC.B       0x46                     ; 'F'
  0x341944AD:  53           DC.B       0x53                     ; 'S'
  0x341944AE:  42           DC.B       0x42                     ; 'B'
  0x341944AF:  4C           DC.B       0x4C                     ; 'L'
  0x341944B0:  5C           DC.B       0x5C                     ; '\\'
  0x341944B1:  43           DC.B       0x43                     ; 'C'
  0x341944B2:  75           DC.B       0x75                     ; 'u'
  0x341944B3:  62           DC.B       0x62                     ; 'b'
  0x341944B4:  65           DC.B       0x65                     ; 'e'
  0x341944B5:  4D           DC.B       0x4D                     ; 'M'
  0x341944B6:  58           DC.B       0x58                     ; 'X'
  0x341944B7:  5C           DC.B       0x5C                     ; '\\'
  0x341944B8:  44           DC.B       0x44                     ; 'D'
  0x341944B9:  72           DC.B       0x72                     ; 'r'
  0x341944BA:  69           DC.B       0x69                     ; 'i'
  0x341944BB:  76           DC.B       0x76                     ; 'v'
  0x341944BC:  65           DC.B       0x65                     ; 'e'
  0x341944BD:  72           DC.B       0x72                     ; 'r'
  0x341944BE:  73           DC.B       0x73                     ; 's'
  0x341944BF:  5C           DC.B       0x5C                     ; '\\'
  0x341944C0:  53           DC.B       0x53                     ; 'S'
  0x341944C1:  54           DC.B       0x54                     ; 'T'
  0x341944C2:  4D           DC.B       0x4D                     ; 'M'
  0x341944C3:  33           DC.B       0x33                     ; '3'
  0x341944C4:  32           DC.B       0x32                     ; '2'
  0x341944C5:  4E           DC.B       0x4E                     ; 'N'
  0x341944C6:  36           DC.B       0x36                     ; '6'
  0x341944C7:  78           DC.B       0x78                     ; 'x'
  0x341944C8:  78           DC.B       0x78                     ; 'x'
  0x341944C9:  5F           DC.B       0x5F                     ; '_'
  0x341944CA:  48           DC.B       0x48                     ; 'H'
  0x341944CB:  41           DC.B       0x41                     ; 'A'
  0x341944CC:  4C           DC.B       0x4C                     ; 'L'
  0x341944CD:  5F           DC.B       0x5F                     ; '_'
  0x341944CE:  44           DC.B       0x44                     ; 'D'
  0x341944CF:  72           DC.B       0x72                     ; 'r'
  0x341944D0:  69           DC.B       0x69                     ; 'i'
  0x341944D1:  76           DC.B       0x76                     ; 'v'
  0x341944D2:  65           DC.B       0x65                     ; 'e'
  0x341944D3:  72           DC.B       0x72                     ; 'r'
  0x341944D4:  5C           DC.B       0x5C                     ; '\\'
  0x341944D5:  53           DC.B       0x53                     ; 'S'
  0x341944D6:  72           DC.B       0x72                     ; 'r'
  0x341944D7:  63           DC.B       0x63                     ; 'c'
  0x341944D8:  5C           DC.B       0x5C                     ; '\\'
  0x341944D9:  73           DC.B       0x73                     ; 's'
  0x341944DA:  74           DC.B       0x74                     ; 't'
  0x341944DB:  6D           DC.B       0x6D                     ; 'm'
  0x341944DC:  33           DC.B       0x33                     ; '3'
  0x341944DD:  32           DC.B       0x32                     ; '2'
  0x341944DE:  6E           DC.B       0x6E                     ; 'n'
  0x341944DF:  36           DC.B       0x36                     ; '6'
  0x341944E0:  78           DC.B       0x78                     ; 'x'
  0x341944E1:  78           DC.B       0x78                     ; 'x'
  0x341944E2:  5F           DC.B       0x5F                     ; '_'
  0x341944E3:  68           DC.B       0x68                     ; 'h'
  0x341944E4:  61           DC.B       0x61                     ; 'a'
  0x341944E5:  6C           DC.B       0x6C                     ; 'l'
  0x341944E6:  5F           DC.B       0x5F                     ; '_'
  0x341944E7:  70           DC.B       0x70                     ; 'p'
  0x341944E8:  77           DC.B       0x77                     ; 'w'
  0x341944E9:  72           DC.B       0x72                     ; 'r'
  0x341944EA:  5F           DC.B       0x5F                     ; '_'
  0x341944EB:  65           DC.B       0x65                     ; 'e'
  0x341944EC:  78           DC.B       0x78                     ; 'x'
  0x341944ED:  2E           DC.B       0x2E                     ; '.'
  0x341944EE:  63           DC.B       0x63                     ; 'c'
  0x341944EF:  00           DC.B       0x00                     ; '\0'

Section .rodata..L.str.58 from blto2_FSBL_lto.o, size=108, align=1

  0x341944F0:  44           DC.B       0x44                     ; 'D'
  0x341944F1:  3A           DC.B       0x3A                     ; ':'
  0x341944F2:  5C           DC.B       0x5C                     ; '\\'
  0x341944F3:  50           DC.B       0x50                     ; 'P'
  0x341944F4:  72           DC.B       0x72                     ; 'r'
  0x341944F5:  6F           DC.B       0x6F                     ; 'o'
  0x341944F6:  6A           DC.B       0x6A                     ; 'j'
  0x341944F7:  65           DC.B       0x65                     ; 'e'
  0x341944F8:  6B           DC.B       0x6B                     ; 'k'
  0x341944F9:  74           DC.B       0x74                     ; 't'
  0x341944FA:  65           DC.B       0x65                     ; 'e'
  0x341944FB:  5C           DC.B       0x5C                     ; '\\'
  0x341944FC:  68           DC.B       0x68                     ; 'h'
  0x341944FD:  61           DC.B       0x61                     ; 'a'
  0x341944FE:  64           DC.B       0x64                     ; 'd'
  0x341944FF:  65           DC.B       0x65                     ; 'e'
  0x34194500:  77           DC.B       0x77                     ; 'w'
  0x34194501:  65           DC.B       0x65                     ; 'e'
  0x34194502:  5F           DC.B       0x5F                     ; '_'
  0x34194503:  62           DC.B       0x62                     ; 'b'
  0x34194504:  6C           DC.B       0x6C                     ; 'l'
  0x34194505:  74           DC.B       0x74                     ; 't'
  0x34194506:  6F           DC.B       0x6F                     ; 'o'
  0x34194507:  32           DC.B       0x32                     ; '2'
  0x34194508:  5C           DC.B       0x5C                     ; '\\'
  0x34194509:  74           DC.B       0x74                     ; 't'
  0x3419450A:  72           DC.B       0x72                     ; 'r'
  0x3419450B:  75           DC.B       0x75                     ; 'u'
  0x3419450C:  6E           DC.B       0x6E                     ; 'n'
  0x3419450D:  6B           DC.B       0x6B                     ; 'k'
  0x3419450E:  5C           DC.B       0x5C                     ; '\\'
  0x3419450F:  66           DC.B       0x66                     ; 'f'
  0x34194510:  69           DC.B       0x69                     ; 'i'
  0x34194511:  72           DC.B       0x72                     ; 'r'
  0x34194512:  6D           DC.B       0x6D                     ; 'm'
  0x34194513:  77           DC.B       0x77                     ; 'w'
  0x34194514:  61           DC.B       0x61                     ; 'a'
  0x34194515:  72           DC.B       0x72                     ; 'r'
  0x34194516:  65           DC.B       0x65                     ; 'e'
  0x34194517:  5C           DC.B       0x5C                     ; '\\'
  0x34194518:  46           DC.B       0x46                     ; 'F'
  0x34194519:  53           DC.B       0x53                     ; 'S'
  0x3419451A:  42           DC.B       0x42                     ; 'B'
  0x3419451B:  4C           DC.B       0x4C                     ; 'L'
  0x3419451C:  5C           DC.B       0x5C                     ; '\\'
  0x3419451D:  43           DC.B       0x43                     ; 'C'
  0x3419451E:  75           DC.B       0x75                     ; 'u'
  0x3419451F:  62           DC.B       0x62                     ; 'b'
  0x34194520:  65           DC.B       0x65                     ; 'e'
  0x34194521:  4D           DC.B       0x4D                     ; 'M'
  0x34194522:  58           DC.B       0x58                     ; 'X'
  0x34194523:  5C           DC.B       0x5C                     ; '\\'
  0x34194524:  44           DC.B       0x44                     ; 'D'
  0x34194525:  72           DC.B       0x72                     ; 'r'
  0x34194526:  69           DC.B       0x69                     ; 'i'
  0x34194527:  76           DC.B       0x76                     ; 'v'
  0x34194528:  65           DC.B       0x65                     ; 'e'
  0x34194529:  72           DC.B       0x72                     ; 'r'
  0x3419452A:  73           DC.B       0x73                     ; 's'
  0x3419452B:  5C           DC.B       0x5C                     ; '\\'
  0x3419452C:  53           DC.B       0x53                     ; 'S'
  0x3419452D:  54           DC.B       0x54                     ; 'T'
  0x3419452E:  4D           DC.B       0x4D                     ; 'M'
  0x3419452F:  33           DC.B       0x33                     ; '3'
  0x34194530:  32           DC.B       0x32                     ; '2'
  0x34194531:  4E           DC.B       0x4E                     ; 'N'
  0x34194532:  36           DC.B       0x36                     ; '6'
  0x34194533:  78           DC.B       0x78                     ; 'x'
  0x34194534:  78           DC.B       0x78                     ; 'x'
  0x34194535:  5F           DC.B       0x5F                     ; '_'
  0x34194536:  48           DC.B       0x48                     ; 'H'
  0x34194537:  41           DC.B       0x41                     ; 'A'
  0x34194538:  4C           DC.B       0x4C                     ; 'L'
  0x34194539:  5F           DC.B       0x5F                     ; '_'
  0x3419453A:  44           DC.B       0x44                     ; 'D'
  0x3419453B:  72           DC.B       0x72                     ; 'r'
  0x3419453C:  69           DC.B       0x69                     ; 'i'
  0x3419453D:  76           DC.B       0x76                     ; 'v'
  0x3419453E:  65           DC.B       0x65                     ; 'e'
  0x3419453F:  72           DC.B       0x72                     ; 'r'
  0x34194540:  5C           DC.B       0x5C                     ; '\\'
  0x34194541:  53           DC.B       0x53                     ; 'S'
  0x34194542:  72           DC.B       0x72                     ; 'r'
  0x34194543:  63           DC.B       0x63                     ; 'c'
  0x34194544:  5C           DC.B       0x5C                     ; '\\'
  0x34194545:  73           DC.B       0x73                     ; 's'
  0x34194546:  74           DC.B       0x74                     ; 't'
  0x34194547:  6D           DC.B       0x6D                     ; 'm'
  0x34194548:  33           DC.B       0x33                     ; '3'
  0x34194549:  32           DC.B       0x32                     ; '2'
  0x3419454A:  6E           DC.B       0x6E                     ; 'n'
  0x3419454B:  36           DC.B       0x36                     ; '6'
  0x3419454C:  78           DC.B       0x78                     ; 'x'
  0x3419454D:  78           DC.B       0x78                     ; 'x'
  0x3419454E:  5F           DC.B       0x5F                     ; '_'
  0x3419454F:  68           DC.B       0x68                     ; 'h'
  0x34194550:  61           DC.B       0x61                     ; 'a'
  0x34194551:  6C           DC.B       0x6C                     ; 'l'
  0x34194552:  5F           DC.B       0x5F                     ; '_'
  0x34194553:  72           DC.B       0x72                     ; 'r'
  0x34194554:  63           DC.B       0x63                     ; 'c'
  0x34194555:  63           DC.B       0x63                     ; 'c'
  0x34194556:  5F           DC.B       0x5F                     ; '_'
  0x34194557:  65           DC.B       0x65                     ; 'e'
  0x34194558:  78           DC.B       0x78                     ; 'x'
  0x34194559:  2E           DC.B       0x2E                     ; '.'
  0x3419455A:  63           DC.B       0x63                     ; 'c'
  0x3419455B:  00           DC.B       0x00                     ; '\0'

Section .rodata.libc.__SEGGER_RTL_hex_uc from prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=16, align=1


__SEGGER_RTL_hex_uc: 0x3419455C: 30 DC.B 0x30 ; '0' 0x3419455D: 31 DC.B 0x31 ; '1' 0x3419455E: 32 DC.B 0x32 ; '2' 0x3419455F: 33 DC.B 0x33 ; '3' 0x34194560: 34 DC.B 0x34 ; '4' 0x34194561: 35 DC.B 0x35 ; '5' 0x34194562: 36 DC.B 0x36 ; '6' 0x34194563: 37 DC.B 0x37 ; '7' 0x34194564: 38 DC.B 0x38 ; '8' 0x34194565: 39 DC.B 0x39 ; '9' 0x34194566: 41 DC.B 0x41 ; 'A' 0x34194567: 42 DC.B 0x42 ; 'B' 0x34194568: 43 DC.B 0x43 ; 'C' 0x34194569: 44 DC.B 0x44 ; 'D' 0x3419456A: 45 DC.B 0x45 ; 'E' 0x3419456B: 46 DC.B 0x46 ; 'F'

Section .rodata.libc.__SEGGER_RTL_hex_lc from prinops.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=16, align=1


__SEGGER_RTL_hex_lc: 0x3419456C: 30 DC.B 0x30 ; '0' 0x3419456D: 31 DC.B 0x31 ; '1' 0x3419456E: 32 DC.B 0x32 ; '2' 0x3419456F: 33 DC.B 0x33 ; '3' 0x34194570: 34 DC.B 0x34 ; '4' 0x34194571: 35 DC.B 0x35 ; '5' 0x34194572: 36 DC.B 0x36 ; '6' 0x34194573: 37 DC.B 0x37 ; '7' 0x34194574: 38 DC.B 0x38 ; '8' 0x34194575: 39 DC.B 0x39 ; '9' 0x34194576: 61 DC.B 0x61 ; 'a' 0x34194577: 62 DC.B 0x62 ; 'b' 0x34194578: 63 DC.B 0x63 ; 'c' 0x34194579: 64 DC.B 0x64 ; 'd' 0x3419457A: 65 DC.B 0x65 ; 'e' 0x3419457B: 66 DC.B 0x66 ; 'f'

Section .rodata.libc..L.str.5 from __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=4, align=1

  0x3419457C:  4E           DC.B       0x4E                     ; 'N'
  0x3419457D:  41           DC.B       0x41                     ; 'A'
  0x3419457E:  4E           DC.B       0x4E                     ; 'N'
  0x3419457F:  00           DC.B       0x00                     ; '\0'

Section .rodata.libc..L.str.6 from __SEGGER_RTL_vfprintf_short_float_long_long.o (libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=4, align=1

  0x34194580:  6E           DC.B       0x6E                     ; 'n'
  0x34194581:  61           DC.B       0x61                     ; 'a'
  0x34194582:  6E           DC.B       0x6E                     ; 'n'
  0x34194583:  00           DC.B       0x00                     ; '\0'

Section .rodata.libc.__SEGGER_RTL_ascii_ctype_map from mbops.o (mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=128, align=1


__SEGGER_RTL_ascii_ctype_map: 0x34194584: 20 DC.B 0x20 ; ' ' 0x34194585: 20 DC.B 0x20 ; ' ' 0x34194586: 20 DC.B 0x20 ; ' ' 0x34194587: 20 DC.B 0x20 ; ' ' 0x34194588: 20 DC.B 0x20 ; ' ' 0x34194589: 20 DC.B 0x20 ; ' ' 0x3419458A: 20 DC.B 0x20 ; ' ' 0x3419458B: 20 DC.B 0x20 ; ' ' 0x3419458C: 20 DC.B 0x20 ; ' ' 0x3419458D: 68 DC.B 0x68 ; 'h' 0x3419458E: 28 DC.B 0x28 ; '(' 0x3419458F: 28 DC.B 0x28 ; '(' 0x34194590: 28 DC.B 0x28 ; '(' 0x34194591: 28 DC.B 0x28 ; '(' 0x34194592: 20 DC.B 0x20 ; ' ' 0x34194593: 20 DC.B 0x20 ; ' ' 0x34194594: 20 DC.B 0x20 ; ' ' 0x34194595: 20 DC.B 0x20 ; ' ' 0x34194596: 20 DC.B 0x20 ; ' ' 0x34194597: 20 DC.B 0x20 ; ' ' 0x34194598: 20 DC.B 0x20 ; ' ' 0x34194599: 20 DC.B 0x20 ; ' ' 0x3419459A: 20 DC.B 0x20 ; ' ' 0x3419459B: 20 DC.B 0x20 ; ' ' 0x3419459C: 20 DC.B 0x20 ; ' ' 0x3419459D: 20 DC.B 0x20 ; ' ' 0x3419459E: 20 DC.B 0x20 ; ' ' 0x3419459F: 20 DC.B 0x20 ; ' ' 0x341945A0: 20 DC.B 0x20 ; ' ' 0x341945A1: 20 DC.B 0x20 ; ' ' 0x341945A2: 20 DC.B 0x20 ; ' ' 0x341945A3: 20 DC.B 0x20 ; ' ' 0x341945A4: 48 DC.B 0x48 ; 'H' 0x341945A5: 10 DC.B 0x10 ; '\x10' 0x341945A6: 10 DC.B 0x10 ; '\x10' 0x341945A7: 10 DC.B 0x10 ; '\x10' 0x341945A8: 10 DC.B 0x10 ; '\x10' 0x341945A9: 10 DC.B 0x10 ; '\x10' 0x341945AA: 10 DC.B 0x10 ; '\x10' 0x341945AB: 10 DC.B 0x10 ; '\x10' 0x341945AC: 10 DC.B 0x10 ; '\x10' 0x341945AD: 10 DC.B 0x10 ; '\x10' 0x341945AE: 10 DC.B 0x10 ; '\x10' 0x341945AF: 10 DC.B 0x10 ; '\x10' 0x341945B0: 10 DC.B 0x10 ; '\x10' 0x341945B1: 10 DC.B 0x10 ; '\x10' 0x341945B2: 10 DC.B 0x10 ; '\x10' 0x341945B3: 10 DC.B 0x10 ; '\x10' 0x341945B4: 84 DC.B 0x84 ; '\x84' 0x341945B5: 84 DC.B 0x84 ; '\x84' 0x341945B6: 84 DC.B 0x84 ; '\x84' 0x341945B7: 84 DC.B 0x84 ; '\x84' 0x341945B8: 84 DC.B 0x84 ; '\x84' 0x341945B9: 84 DC.B 0x84 ; '\x84' 0x341945BA: 84 DC.B 0x84 ; '\x84' 0x341945BB: 84 DC.B 0x84 ; '\x84' 0x341945BC: 84 DC.B 0x84 ; '\x84' 0x341945BD: 84 DC.B 0x84 ; '\x84' 0x341945BE: 10 DC.B 0x10 ; '\x10' 0x341945BF: 10 DC.B 0x10 ; '\x10' 0x341945C0: 10 DC.B 0x10 ; '\x10' 0x341945C1: 10 DC.B 0x10 ; '\x10' 0x341945C2: 10 DC.B 0x10 ; '\x10' 0x341945C3: 10 DC.B 0x10 ; '\x10' 0x341945C4: 10 DC.B 0x10 ; '\x10' 0x341945C5: 81 DC.B 0x81 ; '\x81' 0x341945C6: 81 DC.B 0x81 ; '\x81' 0x341945C7: 81 DC.B 0x81 ; '\x81' 0x341945C8: 81 DC.B 0x81 ; '\x81' 0x341945C9: 81 DC.B 0x81 ; '\x81' 0x341945CA: 81 DC.B 0x81 ; '\x81' 0x341945CB: 01 DC.B 0x01 ; '\x01' 0x341945CC: 01 DC.B 0x01 ; '\x01' 0x341945CD: 01 DC.B 0x01 ; '\x01' 0x341945CE: 01 DC.B 0x01 ; '\x01' 0x341945CF: 01 DC.B 0x01 ; '\x01' 0x341945D0: 01 DC.B 0x01 ; '\x01' 0x341945D1: 01 DC.B 0x01 ; '\x01' 0x341945D2: 01 DC.B 0x01 ; '\x01' 0x341945D3: 01 DC.B 0x01 ; '\x01' 0x341945D4: 01 DC.B 0x01 ; '\x01' 0x341945D5: 01 DC.B 0x01 ; '\x01' 0x341945D6: 01 DC.B 0x01 ; '\x01' 0x341945D7: 01 DC.B 0x01 ; '\x01' 0x341945D8: 01 DC.B 0x01 ; '\x01' 0x341945D9: 01 DC.B 0x01 ; '\x01' 0x341945DA: 01 DC.B 0x01 ; '\x01' 0x341945DB: 01 DC.B 0x01 ; '\x01' 0x341945DC: 01 DC.B 0x01 ; '\x01' 0x341945DD: 01 DC.B 0x01 ; '\x01' 0x341945DE: 01 DC.B 0x01 ; '\x01' 0x341945DF: 10 DC.B 0x10 ; '\x10' 0x341945E0: 10 DC.B 0x10 ; '\x10' 0x341945E1: 10 DC.B 0x10 ; '\x10' 0x341945E2: 10 DC.B 0x10 ; '\x10' 0x341945E3: 10 DC.B 0x10 ; '\x10' 0x341945E4: 10 DC.B 0x10 ; '\x10' 0x341945E5: 82 DC.B 0x82 ; '\x82' 0x341945E6: 82 DC.B 0x82 ; '\x82' 0x341945E7: 82 DC.B 0x82 ; '\x82' 0x341945E8: 82 DC.B 0x82 ; '\x82' 0x341945E9: 82 DC.B 0x82 ; '\x82' 0x341945EA: 82 DC.B 0x82 ; '\x82' 0x341945EB: 02 DC.B 0x02 ; '\x02' 0x341945EC: 02 DC.B 0x02 ; '\x02' 0x341945ED: 02 DC.B 0x02 ; '\x02' 0x341945EE: 02 DC.B 0x02 ; '\x02' 0x341945EF: 02 DC.B 0x02 ; '\x02' 0x341945F0: 02 DC.B 0x02 ; '\x02' 0x341945F1: 02 DC.B 0x02 ; '\x02' 0x341945F2: 02 DC.B 0x02 ; '\x02' 0x341945F3: 02 DC.B 0x02 ; '\x02' 0x341945F4: 02 DC.B 0x02 ; '\x02' 0x341945F5: 02 DC.B 0x02 ; '\x02' 0x341945F6: 02 DC.B 0x02 ; '\x02' 0x341945F7: 02 DC.B 0x02 ; '\x02' 0x341945F8: 02 DC.B 0x02 ; '\x02' 0x341945F9: 02 DC.B 0x02 ; '\x02' 0x341945FA: 02 DC.B 0x02 ; '\x02' 0x341945FB: 02 DC.B 0x02 ; '\x02' 0x341945FC: 02 DC.B 0x02 ; '\x02' 0x341945FD: 02 DC.B 0x02 ; '\x02' 0x341945FE: 02 DC.B 0x02 ; '\x02' 0x341945FF: 10 DC.B 0x10 ; '\x10' 0x34194600: 10 DC.B 0x10 ; '\x10' 0x34194601: 10 DC.B 0x10 ; '\x10' 0x34194602: 10 DC.B 0x10 ; '\x10' 0x34194603: 20 DC.B 0x20 ; ' '

Section .segger.init.__SEGGER_init_ctors from SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=36, align=4


__SEGGER_init_ctors: 0x34194604: B500 PUSH 123LR} 0x34194606: 4806 LDR R0, =0x34194414 ; [PC, #24] [0x34194620] 0x34194608: 4906 LDR R1, =0x34194418 ; [PC, #24] [0x34194624]
.L1: 0x3419460A: 4288 CMP R0, R1 0x3419460C: D005 BEQ 46L2 ; 0x3419461A 0x3419460E: 6802 LDR R2, [R0] 0x34194610: 3004 ADDS R0, #4 0x34194612: B403 PUSH 123R0-R1} 0x34194614: 4790 BLX R2 0x34194616: BC03 POP 123R0-R1} 0x34194618: E7F7 B 46L1 ; 0x3419460A
.L2: 0x3419461A: BC08 POP 123R3} 0x3419461C: 4718 BX R3 0x3419461E: 0000 NOP 0x34194620: 34194414 DC.W 34194414 ; R_ARM_ABS32 0x34194624: 34194418 DC.W 34194418 ; R_ARM_ABS32

Section .segger.init.table from [ Linker created ], size=36, align=4

  0x34194628:  34194679     DC.W       __SEGGER_init_zero
  0x3419462C:  00           DC.B       0x00                     ; '\0'
  0x3419462D:  00           DC.B       0x00                     ; '\0'
  0x3419462E:  00           DC.B       0x00                     ; '\0'
  0x3419462F:  34           DC.B       0x34                     ; '4'
  0x34194630:  68           DC.B       0x68                     ; 'h'
  0x34194631:  07           DC.B       0x07                     ; '\x07'
  0x34194632:  00           DC.B       0x00                     ; '\0'
  0x34194633:  00           DC.B       0x00                     ; '\0'
  0x34194634:  3419468B     DC.W       __SEGGER_init_copy
  0x34194638:  68           DC.B       0x68                     ; 'h'
  0x34194639:  07           DC.B       0x07                     ; '\x07'
  0x3419463A:  00           DC.B       0x00                     ; '\0'
  0x3419463B:  34           DC.B       0x34                     ; '4'
  0x3419463C:  3419464C     DC.W       3419464C               ; R_ARM_ABS32
  0x34194640:  29           DC.B       0x29                     ; ')'
  0x34194641:  00           DC.B       0x00                     ; '\0'
  0x34194642:  00           DC.B       0x00                     ; '\0'
  0x34194643:  00           DC.B       0x00                     ; '\0'
  0x34194644:  34194605     DC.W       __SEGGER_init_ctors
  0x34194648:  3418D657     DC.W       __SEGGER_init_done

Section .segger.init.data from [ Linker created ], size=44, align=4

  0x3419464C:  58           DC.B       0x58                     ; 'X'
  0x3419464D:  D9           DC.B       0xD9                     ; '\xD9'
  0x3419464E:  18           DC.B       0x18                     ; '\x18'
  0x3419464F:  34           DC.B       0x34                     ; '4'
  0x34194650:  58           DC.B       0x58                     ; 'X'
  0x34194651:  D9           DC.B       0xD9                     ; '\xD9'
  0x34194652:  18           DC.B       0x18                     ; '\x18'
  0x34194653:  34           DC.B       0x34                     ; '4'
  0x34194654:  58           DC.B       0x58                     ; 'X'
  0x34194655:  D9           DC.B       0xD9                     ; '\xD9'
  0x34194656:  18           DC.B       0x18                     ; '\x18'
  0x34194657:  34           DC.B       0x34                     ; '4'
  0x34194658:  58           DC.B       0x58                     ; 'X'
  0x34194659:  D9           DC.B       0xD9                     ; '\xD9'
  0x3419465A:  18           DC.B       0x18                     ; '\x18'
  0x3419465B:  34           DC.B       0x34                     ; '4'
  0x3419465C:  58           DC.B       0x58                     ; 'X'
  0x3419465D:  D9           DC.B       0xD9                     ; '\xD9'
  0x3419465E:  18           DC.B       0x18                     ; '\x18'
  0x3419465F:  34           DC.B       0x34                     ; '4'
  0x34194660:  10           DC.B       0x10                     ; '\x10'
  0x34194661:  00           DC.B       0x00                     ; '\0'
  0x34194662:  00           DC.B       0x00                     ; '\0'
  0x34194663:  00           DC.B       0x00                     ; '\0'
  0x34194664:  44           DC.B       0x44                     ; 'D'
  0x34194665:  03           DC.B       0x03                     ; '\x03'
  0x34194666:  00           DC.B       0x00                     ; '\0'
  0x34194667:  34           DC.B       0x34                     ; '4'
  0x34194668:  48           DC.B       0x48                     ; 'H'
  0x34194669:  03           DC.B       0x03                     ; '\x03'
  0x3419466A:  00           DC.B       0x00                     ; '\0'
  0x3419466B:  34           DC.B       0x34                     ; '4'
  0x3419466C:  4C           DC.B       0x4C                     ; 'L'
  0x3419466D:  03           DC.B       0x03                     ; '\x03'
  0x3419466E:  00           DC.B       0x00                     ; '\0'
  0x3419466F:  34           DC.B       0x34                     ; '4'
  0x34194670:  00           DC.B       0x00                     ; '\0'
  0x34194671:  90           DC.B       0x90                     ; '\x90'
  0x34194672:  D0           DC.B       0xD0                     ; '\xD0'
  0x34194673:  03           DC.B       0x03                     ; '\x03'
  0x34194674:  01           DC.B       0x01                     ; '\x01'
  0x34194675:  00           DC.B       0x00                     ; '\0'
  0x34194676:  00           DC.B       0x00                     ; '\0'
  0x34194677:  00           DC.B       0x00                     ; '\0'

Section .segger.init.__SEGGER_init_zero from SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=18, align=2


__SEGGER_init_zero: 0x34194678: 6820 LDR R0, [R4] 0x3419467A: 6861 LDR R1, [R4, #4] 0x3419467C: 3408 ADDS R4, #8 0x3419467E: 2200 MOVS R2, #0 0x34194680: E000 B 46L2 ; 0x34194684
.L1: 0x34194682: 5442 STRB R2, [R0, R1]
.L2: 0x34194684: 1E49 SUBS R1, R1, #1 0x34194686: D5FC BPL 46L1 ; 0x34194682 0x34194688: 4770 BX LR

Section .segger.init.__SEGGER_init_copy from SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=20, align=2


__SEGGER_init_copy: 0x3419468A: 6820 LDR R0, [R4] 0x3419468C: 6861 LDR R1, [R4, #4] 0x3419468E: 68A2 LDR R2, [R4, #8] 0x34194690: 340C ADDS R4, #12 0x34194692: E001 B 46L2 ; 0x34194698
.L1: 0x34194694: 5C8B LDRB R3, [R1, R2] 0x34194696: 5483 STRB R3, [R0, R2]
.L2: 0x34194698: 1E52 SUBS R2, R2, #1 0x3419469A: D5FB BPL 46L1 ; 0x34194694 0x3419469C: 4770 BX LR

LINK SUMMARY

 80 866 bytes read-only  code    + 
  1 720 bytes read-only  data    =  82 586 bytes read-only (total)
 10 129 bytes read-write data
Name Range Size Used Unused Alignment Loss
FLEX_RAM 34000000-34063FFF 409 600 10 129 2.47 399 471 97.53 0 0.00
AXI_RAM2 34180400-341FFFFF 523 264 82 590 15.78 440 674 84.22 0 0.00
Link complete: 0 errors.