| Range |
Size |
Symbol or [section] name |
340002A0-340002A3 |
4 |
uwTickPrio |
340002A4-340002A7 |
4 |
SystemCoreClock |
340002A8-340002A8 |
1 |
uwTickFreq |
340002A0-340002A8 |
9 |
Total (3 sections) |
Summary
| Description |
Size |
| Initialization table |
36 bytes |
| Source image |
9 bytes |
| Destination image |
681 bytes |
| Saving |
636 bytes |
LINKER-CREATED VENEERS
Arm-Arm range extension veneers
| Veneer Size |
Target |
Source |
0 |
Total |
|
Thumb-Thumb range extension veneers
| Veneer Size |
Target |
Source |
0 |
Total |
|
Arm-Thumb mode switch veneers
| Veneer Size |
Target |
Source |
0 |
Total |
|
Thumb-Arm mode switch veneers
| Veneer Size |
Target |
Source |
0 |
Total |
|
Summary
| Veneer Type |
Size |
| Thumb-Arm mode switch |
0 |
| Arm-Thumb mode switch |
0 |
| Thumb-Thumb range extension |
0 |
| Arm-Arm range extension |
0 |
| Total: |
0 |
SYMBOL LIST
Function symbols by name
| Symbol name |
Address |
Size |
Align |
Type |
Bd |
Object File |
ADC1_2_IRQHandler |
0x3418E22B |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
ADF1_FLT0_IRQHandler |
0x34192A15 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
BCK_ECC_IRQHandler |
0x3418CD3B |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
BOOT_Application |
0x34191A6D |
34 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
BusFault_Handler |
0x3418CD49 |
2 |
4 |
Code |
Gb |
blto2_FSBL_lto.o |
CACHEAXI_IRQHandler |
0x3418F277 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
CACHE_ECC_IRQHandler |
0x3418CD0B |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
CRYP_IRQHandler |
0x3418D69F |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
CSI_IRQHandler |
0x3418E23B |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
CTI_INT0_IRQHandler |
0x34192A77 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
CTI_INT1_IRQHandler |
0x34192A79 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
CheckSFDP_Signature |
0x3418B01D |
80 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
DCMIPP_IRQHandler |
0x3418E317 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
DCMI_PSSI_IRQHandler |
0x34192A73 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
DMA2D_IRQHandler |
0x3418F2C3 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
DTS_IRQHandler |
0x3418CA43 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
DebugMon_Handler |
0x3418CD55 |
2 |
4 |
Code |
Gb |
blto2_FSBL_lto.o |
ETH1_IRQHandler |
0x34192A61 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
EXTI0_IRQHandler |
0x3418CFDB |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
EXTI10_IRQHandler |
0x3418D3C7 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
EXTI11_IRQHandler |
0x3418D407 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
EXTI12_IRQHandler |
0x3418D457 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
EXTI13_IRQHandler |
0x3418D4BF |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
EXTI14_IRQHandler |
0x3418D533 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
EXTI15_IRQHandler |
0x3418D5A7 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
EXTI1_IRQHandler |
0x3418CFFF |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
EXTI2_IRQHandler |
0x3418D023 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
EXTI3_IRQHandler |
0x3418D047 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
EXTI4_IRQHandler |
0x3418D0C7 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
EXTI5_IRQHandler |
0x3418D0E3 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
EXTI6_IRQHandler |
0x3418D11F |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
EXTI7_IRQHandler |
0x3418D133 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
EXTI8_IRQHandler |
0x3418D22F |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
EXTI9_IRQHandler |
0x3418D387 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
EXTMEM_DRIVER_NOR_SFDP_DeInit |
0x3418C275 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
EXTMEM_DRIVER_NOR_SFDP_Disable_MemoryMappedMode |
0x3418C285 |
36 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
EXTMEM_DRIVER_NOR_SFDP_Enable_MemoryMappedMode |
0x341923DD |
58 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
EXTMEM_DRIVER_NOR_SFDP_Init |
0x341922A9 |
306 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
EXTMEM_DeInit |
0x341929C5 |
78 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
EXTMEM_GetMapAddress |
0x3418C7ED |
196 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
EXTMEM_Init |
0x34192965 |
94 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
EXTMEM_MemoryMappedMode |
0x3418C761 |
140 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
Error_Handler |
0x341807A5 |
4 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
FDCAN1_IT0_IRQHandler |
0x34192A63 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
FDCAN1_IT1_IRQHandler |
0x34192A65 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
FDCAN2_IT0_IRQHandler |
0x34192A67 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
FDCAN2_IT1_IRQHandler |
0x34192A69 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
FDCAN3_IT0_IRQHandler |
0x34192A6B |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
FDCAN3_IT1_IRQHandler |
0x34192A6D |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
FDCAN_CU_IRQHandler |
0x34192A6F |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
FMC_IRQHandler |
0x34192A55 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
FPU_IRQHandler |
0x3418CD3F |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
GFXMMU_IRQHandler |
0x3418F2F3 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
GFXTIM_IRQHandler |
0x3418F303 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
GPDMA1_Channel0_IRQHandler |
0x3418FCB7 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
GPDMA1_Channel10_IRQHandler |
0x34190987 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
GPDMA1_Channel11_IRQHandler |
0x34190A0B |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
GPDMA1_Channel12_IRQHandler |
0x34190A8F |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
GPDMA1_Channel13_IRQHandler |
0x34190B13 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
GPDMA1_Channel14_IRQHandler |
0x34190B97 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
GPDMA1_Channel15_IRQHandler |
0x34190BAF |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
GPDMA1_Channel1_IRQHandler |
0x3418FD3F |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
GPDMA1_Channel2_IRQHandler |
0x3418FE1F |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
GPDMA1_Channel3_IRQHandler |
0x3418FEEF |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
GPDMA1_Channel4_IRQHandler |
0x3419002B |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
GPDMA1_Channel5_IRQHandler |
0x341902EF |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
GPDMA1_Channel6_IRQHandler |
0x341905B3 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
GPDMA1_Channel7_IRQHandler |
0x3419068F |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
GPDMA1_Channel8_IRQHandler |
0x3419070F |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
GPDMA1_Channel9_IRQHandler |
0x3419096F |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
GPU2D_ER_IRQHandler |
0x3418F323 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
GPU2D_IRQHandler |
0x3418F313 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
HAL_BSEC_OTP_Program |
0x3418D231 |
342 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_BSEC_OTP_Read |
0x34180C75 |
124 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_BSEC_OTP_Reload |
0x3418D135 |
250 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_DMA_Abort |
0x34180E59 |
244 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_Delay |
0x3418D0E5 |
58 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_GPIO_Init |
0x34180F4D |
1 928 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_GPIO_WritePin |
0x3418D459 |
102 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_GetTick |
0x34180C69 |
12 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_IncTick |
0x3418D0C9 |
26 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_Init |
0x34180C39 |
48 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_InitTick |
0x3418D049 |
126 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_MspInit |
0x341807A9 |
8 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_NVIC_SetPriority |
0x34180D2D |
168 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_NVIC_SetPriorityGrouping |
0x3418D389 |
62 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_PWREx_ConfigSupply |
0x3418D4C1 |
114 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_PWREx_ConfigVddIORange |
0x3418D5A9 |
226 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_PWREx_ControlVoltageScaling |
0x3418D535 |
114 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_PWREx_EnableVddIO3 |
0x3418D68D |
18 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_RCCEx_GetPLL1CLKFreq |
0x34190989 |
130 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_RCCEx_GetPLL2CLKFreq |
0x34190A0D |
130 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_RCCEx_GetPLL3CLKFreq |
0x34190A91 |
130 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_RCCEx_GetPLL4CLKFreq |
0x34190B15 |
130 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_RCCEx_GetPeriphCLKFreq |
0x3418F4A5 |
1 626 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_RCCEx_PeriphCLKConfig |
0x34181AB9 |
24 268 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_RCC_ClockConfig |
0x3418E6C9 |
2 498 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_RCC_GetClockConfig |
0x341819C9 |
240 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_RCC_GetCpuClockFreq |
0x3418F189 |
238 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_RCC_GetSysClockFreq |
0x3418F291 |
26 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_RCC_OscConfig |
0x3418D6B1 |
2 810 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_SYSTICK_Config |
0x34180E49 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_SuspendTick |
0x3418D121 |
18 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_XSPIM_Config |
0x34191629 |
878 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_XSPI_Abort |
0x34191531 |
246 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_XSPI_AutoPolling |
0x3419124D |
406 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_XSPI_Command |
0x34190D15 |
1 106 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_XSPI_Init |
0x3418A361 |
1 548 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_XSPI_MemoryMapped |
0x341913E5 |
330 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_XSPI_MspInit |
0x34180AF5 |
324 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_XSPI_Receive |
0x3418AD71 |
300 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_XSPI_SetTimeout |
0x34190D01 |
18 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_XSPI_Transmit |
0x34191169 |
226 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HASH_IRQHandler |
0x3418E1AB |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
HPDMA1_Channel0_IRQHandler |
0x3418F34B |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
HPDMA1_Channel10_IRQHandler |
0x3418F443 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
HPDMA1_Channel11_IRQHandler |
0x3418F45B |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
HPDMA1_Channel12_IRQHandler |
0x3418F473 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
HPDMA1_Channel13_IRQHandler |
0x3418F48B |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
HPDMA1_Channel14_IRQHandler |
0x3418F4A3 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
HPDMA1_Channel15_IRQHandler |
0x3418FAFF |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
HPDMA1_Channel1_IRQHandler |
0x3418F36B |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
HPDMA1_Channel2_IRQHandler |
0x3418F383 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
HPDMA1_Channel3_IRQHandler |
0x3418F39B |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
HPDMA1_Channel4_IRQHandler |
0x3418F3B3 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
HPDMA1_Channel5_IRQHandler |
0x3418F3CB |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
HPDMA1_Channel6_IRQHandler |
0x3418F3E3 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
HPDMA1_Channel7_IRQHandler |
0x3418F3FB |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
HPDMA1_Channel8_IRQHandler |
0x3418F413 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
HPDMA1_Channel9_IRQHandler |
0x3418F42B |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
HardFault_Handler |
0x3418CD41 |
2 |
4 |
Code |
Gb |
blto2_FSBL_lto.o |
I2C1_ER_IRQHandler |
0x34190BDF |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
I2C1_EV_IRQHandler |
0x34190BC7 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
I2C2_ER_IRQHandler |
0x34190C0F |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
I2C2_EV_IRQHandler |
0x34190BF7 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
I2C3_ER_IRQHandler |
0x34190C3F |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
I2C3_EV_IRQHandler |
0x34190C27 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
I2C4_ER_IRQHandler |
0x34190C6F |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
I2C4_EV_IRQHandler |
0x34190C57 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
I3C1_ER_IRQHandler |
0x34190C9F |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
I3C1_EV_IRQHandler |
0x34190C87 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
I3C2_ER_IRQHandler |
0x34190CCF |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
I3C2_EV_IRQHandler |
0x34190CB7 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
IAC_IRQHandler |
0x3418CD4F |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
ICACHE_IRQHandler |
0x3418F337 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
IWDG_IRQHandler |
0x3418CD5B |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
JEDEC_Basic_Manage4S4S4SEnableSequence |
0x3418C00D |
132 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
JEDEC_Basic_ManageQuadEnableRequirement |
0x34191F09 |
338 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
JPEG_IRQHandler |
0x3418F2D3 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
JumpToApplication |
0x3418AEB9 |
356 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_AHB4_GRP1_EnableClock |
0x3418CA21 |
34 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_AHB4_GRP1_EnableClock.6 |
0x3418D001 |
34 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_AHB5_GRP1_EnableClock |
0x3418D025 |
34 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_AHB5_GRP1_IsEnabledClock |
0x3418AE9D |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_APB4_GRP2_EnableClock |
0x3418CD0D |
34 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_APB4_GRP2_EnableClock.5 |
0x3418CFDD |
34 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_CLKP_Enable |
0x3418F2F5 |
14 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_CLKP_IsEnabled |
0x3418A331 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetADCClockSource |
0x3418F36D |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetADCPrescaler |
0x34187CE9 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetADFClockSource |
0x3418F385 |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetAHBPrescaler.87 |
0x3418A0A1 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetAPB1Prescaler.89 |
0x3418A179 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetAPB2Prescaler.88 |
0x3418A169 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetAPB4Prescaler.90 |
0x3418A1C5 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetAPB5Prescaler.92 |
0x3418A281 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetCLKPClockSource |
0x3418F39D |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetClockSource |
0x34187DA9 |
48 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetCpuClkSource |
0x34181701 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetDCMIPPClockSource |
0x3418F3B5 |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetETH1PTPDivider |
0x34187CF9 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetETHClockSource |
0x3418F3CD |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetETHPTPClockSource |
0x3418F3E5 |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetFDCANClockSource |
0x3418F3FD |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetFMCClockSource |
0x3418F415 |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetI2CClockSource |
0x34187D09 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetI3CClockSource |
0x34187D19 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetLPTIMClockSource |
0x34187D29 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetLPUARTClockSource |
0x3418F42D |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetLTDCClockSource |
0x3418F445 |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetMDFClockSource |
0x3418F45D |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetPSSIClockSource |
0x3418F475 |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetRTCClockSource |
0x34187985 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetSAIClockSource |
0x34187D39 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetSDMMCClockSource |
0x34187D49 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetSPDIFRXClockSource |
0x3418F48D |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetSPIClockSource |
0x34187D59 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetSysClkSource |
0x34181711 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetTIMPrescaler |
0x34187D69 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetUARTClockSource |
0x3418A0E1 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetUSARTClockSource |
0x34187D79 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetUSBClockSource |
0x3418A0B1 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetXSPIClockSource |
0x34187D99 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_HSE_IsReady |
0x34181881 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_HSE_IsReady.77 |
0x34189EE1 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_HSE_IsSelectedHSEDiv2AsDiv2Clock |
0x34187D89 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_HSE_SelectHSEAsDiv2Clock |
0x3418F339 |
18 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_HSE_SelectHSEDiv2AsDiv2Clock |
0x3418F325 |
18 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_HSI_Disable |
0x3418E1CD |
14 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_HSI_Enable |
0x3418D6A1 |
14 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_HSI_GetDivider |
0x34181891 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_HSI_GetDivider.75 |
0x34189EB1 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_HSI_IsReady |
0x341816F1 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_HSI_IsReady.74 |
0x34189EA1 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_HSI_SetCalibTrimming |
0x3418E1AD |
30 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_HSI_SetDivider |
0x341816D5 |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC10_Enable.58 |
0x341879DD |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC10_GetDivider |
0x34190C71 |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC10_GetSource |
0x3418A2A1 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC10_IsEnabled |
0x3418A291 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC11_GetSource |
0x341817ED |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC12_Enable |
0x34187ACD |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC12_GetDivider |
0x34190CB9 |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC12_GetSource |
0x3418A301 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC12_IsEnabled |
0x3418A2F1 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC13_Enable |
0x34187B4D |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC13_GetDivider |
0x34190CA1 |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC13_GetSource |
0x3418A2E1 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC13_IsEnabled |
0x3418A2D1 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC14_Enable |
0x34187BB9 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC14_GetDivider |
0x34190BE1 |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC14_GetSource |
0x3418A159 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC14_IsEnabled |
0x3418A149 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC15_Enable.59 |
0x341879ED |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC15_GetDivider |
0x34190BB1 |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC15_GetSource |
0x3418A0D1 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC15_IsEnabled |
0x3418A0C1 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC16_Enable |
0x34187BE5 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC16_GetDivider |
0x34190C59 |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC16_GetSource |
0x3418A271 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC16_IsEnabled |
0x3418A261 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC17_Enable |
0x34187AA1 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC17_GetDivider |
0x34190CD1 |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC17_GetSource |
0x3418A321 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC17_IsEnabled |
0x3418A311 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC18_Enable |
0x34187A91 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC18_GetDivider |
0x34190CE9 |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC18_GetSource |
0x3418A351 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC18_IsEnabled |
0x3418A341 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC19_Enable |
0x341879FD |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC19_GetDivider |
0x34190C89 |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC19_GetSource |
0x3418A2C1 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC19_IsEnabled |
0x3418A2B1 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC1_Enable |
0x3418F179 |
14 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC1_GetDivider |
0x3418F279 |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC1_GetSource |
0x341817BD |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC20_Enable.60 |
0x34187A0D |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC20_GetDivider |
0x34190C41 |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC20_GetSource |
0x3418A235 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC20_IsEnabled |
0x3418A225 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC2_GetDivider |
0x3418F2AD |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC2_GetSource |
0x341817CD |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC3_Enable |
0x3418F2D5 |
14 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC3_GetDivider |
0x34190971 |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC3_GetSource |
0x34189CCD |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC3_IsEnabled |
0x34189CBD |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC4_Enable |
0x3418F2E5 |
14 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC4_GetDivider |
0x34190B99 |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC4_GetSource |
0x34189CED |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC4_IsEnabled |
0x34189CDD |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC5_Enable.57 |
0x3418F2C5 |
14 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC5_GetDivider |
0x34190C29 |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC5_GetSource |
0x3418A205 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC5_IsEnabled |
0x3418A1F5 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC6_GetSource |
0x341817DD |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC7_Enable |
0x3418F305 |
14 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC7_GetDivider |
0x34190C11 |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC7_GetSource |
0x3418A1E5 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC7_IsEnabled |
0x3418A1D5 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC8_Enable |
0x3418F315 |
14 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC8_GetDivider |
0x34190BF9 |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC8_GetSource |
0x3418A1B5 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC8_IsEnabled |
0x3418A1A5 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC9_Enable |
0x34187BA9 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC9_GetDivider |
0x34190BC9 |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC9_GetSource |
0x3418A139 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC9_IsEnabled |
0x3418A129 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_LSE_IsReady |
0x3418179D |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_LSE_IsReady.56 |
0x34187995 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_LSI_Disable |
0x3418E22D |
14 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_LSI_Enable |
0x3418E21D |
14 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_LSI_IsReady |
0x3418178D |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_LSI_IsReady.91 |
0x3418A215 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_MSI_Disable |
0x3418E20D |
14 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_MSI_Enable |
0x3418E1FD |
14 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_MSI_GetFrequency |
0x34189ED1 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_MSI_IsReady |
0x3418177D |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_MSI_IsReady.76 |
0x34189EC1 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_MSI_SetCalibTrimming |
0x3418E1DD |
30 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_MSI_SetFrequency |
0x34181761 |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL1P_IsEnabled |
0x3418A021 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL1_GetFRACN |
0x3418A061 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL1_GetM |
0x3418A041 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL1_GetN |
0x3418A051 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL1_GetP1 |
0x3418A071 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL1_GetP2 |
0x3418A081 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL1_GetSource |
0x34181721 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL1_GetSource.85 |
0x3418A031 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL1_IsEnabledBypass |
0x341818A1 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL1_IsEnabledBypass.86 |
0x3418A091 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL1_IsReady |
0x341817AD |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL1_IsReady.84 |
0x3418A011 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL2P_IsEnabled |
0x34189F91 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL2_GetFRACN |
0x34189FD1 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL2_GetM |
0x34189FB1 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL2_GetN |
0x34189FC1 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL2_GetP1 |
0x34189FE1 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL2_GetP2 |
0x34189FF1 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL2_GetSource |
0x34181731 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL2_GetSource.82 |
0x34189FA1 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL2_IsEnabledBypass |
0x341818B1 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL2_IsEnabledBypass.83 |
0x3418A001 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL2_IsReady |
0x341817FD |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL2_IsReady.81 |
0x34189F81 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL3P_IsEnabled |
0x34189F01 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL3_GetFRACN |
0x34189F41 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL3_GetM |
0x34189F21 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL3_GetN |
0x34189F31 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL3_GetP1 |
0x34189F51 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL3_GetP2 |
0x34189F61 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL3_GetSource |
0x34181741 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL3_GetSource.79 |
0x34189F11 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL3_IsEnabledBypass |
0x341818C1 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL3_IsEnabledBypass.80 |
0x34189F71 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL3_IsReady |
0x3418180D |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL3_IsReady.78 |
0x34189EF1 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL4P_IsEnabled |
0x34189D0D |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL4_GetFRACN |
0x34189DD9 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL4_GetM |
0x34189DB9 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL4_GetN |
0x34189DC9 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL4_GetP1 |
0x34189DE9 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL4_GetP2 |
0x34189DF9 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL4_GetSource |
0x34181751 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL4_GetSource.72 |
0x34189D1D |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL4_IsEnabledBypass |
0x341818D1 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL4_IsEnabledBypass.73 |
0x34189E91 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL4_IsReady |
0x3418181D |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL4_IsReady.71 |
0x34189CFD |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetADFClockSource |
0x34187A75 |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetCLKPClockSource |
0x34187A1D |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetClockSource |
0x34187CB5 |
52 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetDCMIPPClockSource |
0x34187AB1 |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetETHClockSource |
0x34187ADD |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetETHPHYInterface |
0x34187AF9 |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetETHREFRXClockSource |
0x34187B15 |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetETHREFTXClockSource |
0x34187B31 |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetFDCANClockSource |
0x34187B5D |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetFMCClockSource |
0x34187A49 |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetI2CClockSource |
0x34187B79 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetI3CClockSource |
0x34187B89 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetLPTIMClockSource |
0x34187B99 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetLPUARTClockSource |
0x34187BC9 |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetLTDCClockSource |
0x34187BF5 |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetMDFClockSource |
0x34187C11 |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetOTGPHYCKREFClockSource |
0x34187CA5 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetOTGPHYClockSource |
0x34187C95 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetPSSIClockSource |
0x34187C2D |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetRTCClockSource |
0x341879C1 |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetRTC_HSEPrescaler |
0x341879A5 |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetSAIClockSource |
0x34187C49 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetSDMMCClockSource |
0x34187A65 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetSPDIFRXClockSource |
0x34187C59 |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetSPIClockSource |
0x34187C75 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetTIMPrescaler |
0x3418F34D |
30 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetUSARTClockSource |
0x34187C85 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetXSPIClockSource |
0x34187A39 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LOCKUP_IRQHandler |
0x3418CC7B |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
LPTIM1_IRQHandler |
0x34192937 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
LPTIM2_IRQHandler |
0x3419294F |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
LPTIM3_IRQHandler |
0x34192963 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
LPTIM4_IRQHandler |
0x341929C3 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
LPTIM5_IRQHandler |
0x34192A13 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
LPUART1_IRQHandler |
0x34192A4D |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
LTDC_LO_ERR_IRQHandler |
0x3418F2AB |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
LTDC_LO_IRQHandler |
0x3418F28F |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
LTDC_UP_ERR_IRQHandler |
0x34192A7D |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
LTDC_UP_IRQHandler |
0x34192A7B |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
MCE1_IRQHandler |
0x3418E1DB |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
MCE2_IRQHandler |
0x3418E1FB |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
MCE3_IRQHandler |
0x3418E20B |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
MCE4_IRQHandler |
0x3418E21B |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
MDF1_FLT0_IRQHandler |
0x34192A17 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
MDF1_FLT1_IRQHandler |
0x34192A19 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
MDF1_FLT2_IRQHandler |
0x34192A1B |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
MDF1_FLT3_IRQHandler |
0x34192A1D |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
MDF1_FLT4_IRQHandler |
0x34192A1F |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
MDF1_FLT5_IRQHandler |
0x34192A21 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
MDIOS_IRQHandler |
0x34192A71 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
MX_BSEC_Init |
0x3418C9C5 |
2 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
MX_EXTMEM_MANAGER_Init |
0x3418C9E1 |
62 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
MX_GPIO_Init |
0x3418074D |
88 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
MX_XSPI2_Init |
0x3418CF5D |
126 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
MapMemory |
0x34191A91 |
94 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
MemManage_Handler |
0x3418CD45 |
2 |
4 |
Code |
Gb |
blto2_FSBL_lto.o |
NMI_Handler |
0x3418CD3D |
2 |
4 |
Code |
Gb |
blto2_FSBL_lto.o |
NPU0_IRQHandler |
0x3418E6C7 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
NPU1_IRQHandler |
0x3418F08B |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
NPU2_IRQHandler |
0x3418F177 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
NPU3_IRQHandler |
0x3418F187 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
NVIC_EncodePriority |
0x34180DE5 |
100 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
OTP_Config |
0x3418CC7D |
142 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
PAHB_ERR_IRQHandler |
0x3418E667 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
PKA_IRQHandler |
0x3418D6AF |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
PVD_PVM_IRQHandler |
0x3418CA1F |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
PendSV_Handler |
0x3418CD59 |
2 |
4 |
Code |
Gb |
blto2_FSBL_lto.o |
RCCEx_CalcPLLFreq |
0x34189E09 |
136 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetADCCLKFreq |
0x3418FB01 |
438 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetADFCLKFreq |
0x34187DD9 |
388 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetCLKPCLKFreq |
0x34187F5D |
736 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetCSICLKFreq |
0x3418FCB9 |
134 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetDCMIPPCLKFreq |
0x3418823D |
228 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetETH1CLKFreq |
0x34188321 |
216 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetETH1PTPCLKFreq |
0x3418FD41 |
222 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetFDCANCLKFreq |
0x3418FE21 |
206 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetFMCCLKFreq |
0x3418FEF1 |
314 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetHCLKFreq |
0x34189CA1 |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetI2CCLKFreq |
0x3419002D |
706 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetI3CCLKFreq |
0x341883F9 |
516 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetLPTIMCLKFreq |
0x341902F1 |
706 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetLPUARTCLKFreq |
0x341885FD |
412 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetLTDCCLKFreq |
0x34188799 |
228 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetMDFCLKFreq |
0x3418887D |
436 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetOTGPHYCKREFCLKFreq |
0x34189A49 |
148 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetOTGPHYCLKFreq |
0x34189905 |
324 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetPCLK1Freq |
0x3418A0F1 |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetPCLK2Freq |
0x3418A10D |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetPCLK4Freq |
0x3418A189 |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetPCLK5Freq |
0x3418A245 |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetPLLSourceFreq |
0x34189D2D |
140 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetPSSICLKFreq |
0x341905B5 |
218 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetRTCCLKFreq |
0x34190691 |
126 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetSAICLKFreq |
0x34190711 |
606 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetSDMMCCLKFreq |
0x34188A31 |
396 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetSPDIFRXCLKFreq |
0x34188BBD |
372 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetSPICLKFreq |
0x34188D31 |
1 196 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetUARTCLKFreq |
0x34189571 |
916 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetUSARTCLKFreq |
0x341891DD |
916 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetXSPICLKFreq |
0x34189ADD |
452 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCC_GetSysClockFreq |
0x341818E1 |
232 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCC_IC_CheckPLLSources |
0x3418F08D |
234 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCC_IRQHandler |
0x3418CB8B |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
RCC_PLL_Config |
0x3418E319 |
846 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCC_PLL_Enable |
0x3418E669 |
94 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCC_PLL_IsNewConfig |
0x3418E23D |
218 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCC_PLL_Source_IsReady |
0x3418182D |
84 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCC_S_IRQHandler |
0x3418CD53 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
RIFSC_TAMPER_IRQHandler |
0x3418CD4B |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
RNG_IRQHandler |
0x3418E1CB |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
RTC_IRQHandler |
0x3418CD57 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
RTC_S_IRQHandler |
0x3418CD43 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
Reset_Handler |
0x3418C8D5 |
|
4 |
Code |
Gb |
STM32N6xx_Startup.o |
SAES_IRQHandler |
0x3418D68B |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
SAI1_A_IRQHandler |
0x34192A23 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
SAI1_B_IRQHandler |
0x34192A25 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
SAI2_A_IRQHandler |
0x34192A27 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
SAI2_B_IRQHandler |
0x34192A29 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
SAL_XSPI_Abort |
0x34192951 |
18 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
SAL_XSPI_CheckStatusRegister |
0x3418C53D |
232 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
SAL_XSPI_CommandSendData |
0x3418C42D |
136 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
SAL_XSPI_CommandSendReadAddress |
0x34192879 |
190 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
SAL_XSPI_DisableMapMode |
0x34192939 |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
SAL_XSPI_EnableMapMode |
0x3418C625 |
200 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
SAL_XSPI_GetId |
0x3418C375 |
152 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
SAL_XSPI_GetSFDP |
0x3419270D |
222 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
SAL_XSPI_Init |
0x34192419 |
86 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
SAL_XSPI_MemoryConfig |
0x34192471 |
666 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
SAL_XSPI_SendReadCommand |
0x3418C4B5 |
136 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
SAL_XSPI_SetClock |
0x3418C2A9 |
116 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
SAL_XSPI_UpdateMemoryType |
0x3418C6ED |
116 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
SAL_XSPI_Write |
0x341927ED |
138 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
SDMMC1_IRQHandler |
0x34192A57 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
SDMMC2_IRQHandler |
0x34192A59 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
SFDP_BuildGenericDriver |
0x3418B3F9 |
3 092 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
SFDP_CollectData |
0x34191B71 |
458 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
SFDP_GetHeader |
0x3418B06D |
256 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
SFDP_MemoryReset |
0x34191D3D |
458 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
SFDP_ReadHeader |
0x34191AF1 |
126 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
SPDIFRX_IRQHandler |
0x34192A2B |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
SPI1_IRQHandler |
0x34192A2D |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
SPI2_IRQHandler |
0x34192A2F |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
SPI3_IRQHandler |
0x34192A31 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
SPI4_IRQHandler |
0x34192A33 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
SPI5_IRQHandler |
0x34192A35 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
SPI6_IRQHandler |
0x34192A37 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
SVC_Handler |
0x3418CD51 |
2 |
4 |
Code |
Gb |
blto2_FSBL_lto.o |
SysTick_Config |
0x3418D409 |
78 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
SysTick_Handler |
0x341807B1 |
8 |
4 |
Code |
Gb |
blto2_FSBL_lto.o |
SystemClock_Config |
0x3418CB8D |
238 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
SystemCoreClockUpdate |
0x341807B9 |
828 |
4 |
Code |
Gb |
blto2_FSBL_lto.o |
SystemInit |
0x3418CD5D |
510 |
4 |
Code |
Gb |
blto2_FSBL_lto.o |
TAMP_IRQHandler |
0x3418CD47 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
TCM_ECC_IRQHandler |
0x3418CD2F |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
TIM10_IRQHandler |
0x3419205B |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
TIM11_IRQHandler |
0x3419223F |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
TIM12_IRQHandler |
0x341922A7 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
TIM13_IRQHandler |
0x341923DB |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
TIM14_IRQHandler |
0x34192417 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
TIM15_IRQHandler |
0x3419246F |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
TIM16_IRQHandler |
0x3419270B |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
TIM17_IRQHandler |
0x341927EB |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
TIM18_IRQHandler |
0x34192877 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
TIM1_BRK_IRQHandler |
0x34190CE7 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
TIM1_CC_IRQHandler |
0x34191167 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
TIM1_TRG_CCU_IRQHandler |
0x34190D13 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
TIM1_UP_IRQHandler |
0x34190CFF |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
TIM2_IRQHandler |
0x3419124B |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
TIM3_IRQHandler |
0x341913E3 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
TIM4_IRQHandler |
0x3419152F |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
TIM5_IRQHandler |
0x34191627 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
TIM6_IRQHandler |
0x34191997 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
TIM7_IRQHandler |
0x34191A6B |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
TIM8_BRK_IRQHandler |
0x34191A8F |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
TIM8_CC_IRQHandler |
0x34191D3B |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
TIM8_TRG_CCU_IRQHandler |
0x34191B6F |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
TIM8_UP_IRQHandler |
0x34191AEF |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
TIM9_IRQHandler |
0x34191F07 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
UART4_IRQHandler |
0x34192A3F |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
UART5_IRQHandler |
0x34192A41 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
UART7_IRQHandler |
0x34192A45 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
UART8_IRQHandler |
0x34192A47 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
UART9_IRQHandler |
0x34192A49 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
UCPD1_IRQHandler |
0x34192A5B |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
USART10_IRQHandler |
0x34192A4B |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
USART1_IRQHandler |
0x34192A39 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
USART2_IRQHandler |
0x34192A3B |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
USART3_IRQHandler |
0x34192A3D |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
USART6_IRQHandler |
0x34192A43 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
USB1_OTG_HS_IRQHandler |
0x34192A5D |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
USB2_OTG_HS_IRQHandler |
0x34192A5F |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
UsageFault_Handler |
0x3418CD4D |
2 |
4 |
Code |
Gb |
blto2_FSBL_lto.o |
VENC_IRQHandler |
0x3418F2E3 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
WAKEUP_PIN_IRQHandler |
0x34192A75 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
WWDG_IRQHandler |
0x3418CF5B |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
XSPI1_IRQHandler |
0x34192A4F |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
XSPI2_IRQHandler |
0x34192A51 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
XSPI3_IRQHandler |
0x34192A53 |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
XSPIM_GetConfig |
0x34191999 |
210 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
XSPI_ConfigCmd |
0x3418A9D5 |
924 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
XSPI_FormatCommand |
0x3418C31D |
88 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
XSPI_Transmit |
0x3418C40D |
32 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
XSPI_WaitFlagStateUntilTimeout |
0x3418A96D |
104 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
__NVIC_GetPriorityGrouping |
0x34180DD5 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
__NVIC_SetPriority |
0x3418D3C9 |
62 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
__NVIC_SetPriorityGrouping |
0x34180CF1 |
60 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
__SEGGER_init_copy |
0x34192DDF |
20 |
2 |
Code |
Wk |
SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) |
__SEGGER_init_ctors |
0x34192D79 |
26 |
4 |
Code |
Wk |
SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) |
__SEGGER_init_done |
0x3418C8CB |
|
4 |
Code |
Gb |
SEGGER_THUMB_Startup.o |
__SEGGER_init_zero |
0x34192DCD |
18 |
2 |
Code |
Wk |
SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) |
__aeabi_memclr |
0x3418C95D |
104 |
4 |
Code |
Wk |
strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) |
__aeabi_memclr4 |
0x3418C95D |
|
4 |
Code |
Wk |
strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) |
__aeabi_memclr8 |
0x3418C95D |
|
4 |
Code |
Wk |
strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) |
__aeabi_memcpy |
0x3418C901 |
|
4 |
Code |
Wk |
strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) |
__aeabi_memcpy4 |
0x3418C91F |
|
4 |
Code |
Wk |
strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) |
__aeabi_memcpy8 |
0x3418C91F |
|
4 |
Code |
Wk |
strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) |
__aeabi_memset |
0x3418C95F |
|
4 |
Code |
Wk |
strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) |
__aeabi_memset4 |
0x3418C95F |
|
4 |
Code |
Wk |
strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) |
__aeabi_memset8 |
0x3418C95F |
|
4 |
Code |
Wk |
strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) |
__startup_complete |
0x3418C8CB |
|
4 |
Code |
Gb |
SEGGER_THUMB_Startup.o |
_start |
0x3418C8C1 |
14 |
4 |
Code |
Gb |
SEGGER_THUMB_Startup.o |
assert_failed |
0x3418CD31 |
10 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
driver_check_FlagBUSY |
0x34192241 |
102 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
exit |
0x3418C8CF |
2 |
4 |
Code |
Gb |
SEGGER_THUMB_Startup.o |
main |
0x3418CA45 |
326 |
4 |
Code |
Gb |
blto2_FSBL_lto.o |
memcpy |
0x3418C901 |
92 |
4 |
Code |
Wk |
strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) |
memset |
0x3418C965 |
|
4 |
Code |
Wk |
strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) |
reset_handler |
0x3418C8D5 |
|
4 |
Code |
Gb |
STM32N6xx_Startup.o |
sfdp_enter_octal_mode |
0x3419205D |
482 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
sfdp_get_paraminfo |
0x3418B16D |
652 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
sfdp_getfrequencevalue |
0x3418C091 |
64 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
sfdp_set_dummycycle |
0x3418C0D1 |
420 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
Function symbols by address
| Address |
Symbol name |
Size |
Align |
Type |
Bd |
Object File |
0x3418074D |
MX_GPIO_Init |
88 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x341807A5 |
Error_Handler |
4 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x341807A9 |
HAL_MspInit |
8 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x341807B1 |
SysTick_Handler |
8 |
4 |
Code |
Gb |
blto2_FSBL_lto.o |
0x341807B9 |
SystemCoreClockUpdate |
828 |
4 |
Code |
Gb |
blto2_FSBL_lto.o |
0x34180AF5 |
HAL_XSPI_MspInit |
324 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34180C39 |
HAL_Init |
48 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34180C69 |
HAL_GetTick |
12 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34180C75 |
HAL_BSEC_OTP_Read |
124 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34180CF1 |
__NVIC_SetPriorityGrouping |
60 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34180D2D |
HAL_NVIC_SetPriority |
168 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34180DD5 |
__NVIC_GetPriorityGrouping |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34180DE5 |
NVIC_EncodePriority |
100 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34180E49 |
HAL_SYSTICK_Config |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34180E59 |
HAL_DMA_Abort |
244 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34180F4D |
HAL_GPIO_Init |
1 928 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x341816D5 |
LL_RCC_HSI_SetDivider |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x341816F1 |
LL_RCC_HSI_IsReady |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34181701 |
LL_RCC_GetCpuClkSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34181711 |
LL_RCC_GetSysClkSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34181721 |
LL_RCC_PLL1_GetSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34181731 |
LL_RCC_PLL2_GetSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34181741 |
LL_RCC_PLL3_GetSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34181751 |
LL_RCC_PLL4_GetSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34181761 |
LL_RCC_MSI_SetFrequency |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418177D |
LL_RCC_MSI_IsReady |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418178D |
LL_RCC_LSI_IsReady |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418179D |
LL_RCC_LSE_IsReady |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x341817AD |
LL_RCC_PLL1_IsReady |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x341817BD |
LL_RCC_IC1_GetSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x341817CD |
LL_RCC_IC2_GetSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x341817DD |
LL_RCC_IC6_GetSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x341817ED |
LL_RCC_IC11_GetSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x341817FD |
LL_RCC_PLL2_IsReady |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418180D |
LL_RCC_PLL3_IsReady |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418181D |
LL_RCC_PLL4_IsReady |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418182D |
RCC_PLL_Source_IsReady |
84 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34181881 |
LL_RCC_HSE_IsReady |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34181891 |
LL_RCC_HSI_GetDivider |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x341818A1 |
LL_RCC_PLL1_IsEnabledBypass |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x341818B1 |
LL_RCC_PLL2_IsEnabledBypass |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x341818C1 |
LL_RCC_PLL3_IsEnabledBypass |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x341818D1 |
LL_RCC_PLL4_IsEnabledBypass |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x341818E1 |
RCC_GetSysClockFreq |
232 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x341819C9 |
HAL_RCC_GetClockConfig |
240 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34181AB9 |
HAL_RCCEx_PeriphCLKConfig |
24 268 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34187985 |
LL_RCC_GetRTCClockSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34187995 |
LL_RCC_LSE_IsReady.56 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x341879A5 |
LL_RCC_SetRTC_HSEPrescaler |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x341879C1 |
LL_RCC_SetRTCClockSource |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x341879DD |
LL_RCC_IC10_Enable.58 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x341879ED |
LL_RCC_IC15_Enable.59 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x341879FD |
LL_RCC_IC19_Enable |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34187A0D |
LL_RCC_IC20_Enable.60 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34187A1D |
LL_RCC_SetCLKPClockSource |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34187A39 |
LL_RCC_SetXSPIClockSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34187A49 |
LL_RCC_SetFMCClockSource |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34187A65 |
LL_RCC_SetSDMMCClockSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34187A75 |
LL_RCC_SetADFClockSource |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34187A91 |
LL_RCC_IC18_Enable |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34187AA1 |
LL_RCC_IC17_Enable |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34187AB1 |
LL_RCC_SetDCMIPPClockSource |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34187ACD |
LL_RCC_IC12_Enable |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34187ADD |
LL_RCC_SetETHClockSource |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34187AF9 |
LL_RCC_SetETHPHYInterface |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34187B15 |
LL_RCC_SetETHREFRXClockSource |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34187B31 |
LL_RCC_SetETHREFTXClockSource |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34187B4D |
LL_RCC_IC13_Enable |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34187B5D |
LL_RCC_SetFDCANClockSource |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34187B79 |
LL_RCC_SetI2CClockSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34187B89 |
LL_RCC_SetI3CClockSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34187B99 |
LL_RCC_SetLPTIMClockSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34187BA9 |
LL_RCC_IC9_Enable |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34187BB9 |
LL_RCC_IC14_Enable |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34187BC9 |
LL_RCC_SetLPUARTClockSource |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34187BE5 |
LL_RCC_IC16_Enable |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34187BF5 |
LL_RCC_SetLTDCClockSource |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34187C11 |
LL_RCC_SetMDFClockSource |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34187C2D |
LL_RCC_SetPSSIClockSource |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34187C49 |
LL_RCC_SetSAIClockSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34187C59 |
LL_RCC_SetSPDIFRXClockSource |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34187C75 |
LL_RCC_SetSPIClockSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34187C85 |
LL_RCC_SetUSARTClockSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34187C95 |
LL_RCC_SetOTGPHYClockSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34187CA5 |
LL_RCC_SetOTGPHYCKREFClockSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34187CB5 |
LL_RCC_SetClockSource |
52 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34187CE9 |
LL_RCC_GetADCPrescaler |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34187CF9 |
LL_RCC_GetETH1PTPDivider |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34187D09 |
LL_RCC_GetI2CClockSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34187D19 |
LL_RCC_GetI3CClockSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34187D29 |
LL_RCC_GetLPTIMClockSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34187D39 |
LL_RCC_GetSAIClockSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34187D49 |
LL_RCC_GetSDMMCClockSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34187D59 |
LL_RCC_GetSPIClockSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34187D69 |
LL_RCC_GetTIMPrescaler |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34187D79 |
LL_RCC_GetUSARTClockSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34187D89 |
LL_RCC_HSE_IsSelectedHSEDiv2AsDiv2Clock |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34187D99 |
LL_RCC_GetXSPIClockSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34187DA9 |
LL_RCC_GetClockSource |
48 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34187DD9 |
RCCEx_GetADFCLKFreq |
388 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34187F5D |
RCCEx_GetCLKPCLKFreq |
736 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418823D |
RCCEx_GetDCMIPPCLKFreq |
228 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34188321 |
RCCEx_GetETH1CLKFreq |
216 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x341883F9 |
RCCEx_GetI3CCLKFreq |
516 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x341885FD |
RCCEx_GetLPUARTCLKFreq |
412 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34188799 |
RCCEx_GetLTDCCLKFreq |
228 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418887D |
RCCEx_GetMDFCLKFreq |
436 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34188A31 |
RCCEx_GetSDMMCCLKFreq |
396 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34188BBD |
RCCEx_GetSPDIFRXCLKFreq |
372 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34188D31 |
RCCEx_GetSPICLKFreq |
1 196 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x341891DD |
RCCEx_GetUSARTCLKFreq |
916 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34189571 |
RCCEx_GetUARTCLKFreq |
916 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34189905 |
RCCEx_GetOTGPHYCLKFreq |
324 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34189A49 |
RCCEx_GetOTGPHYCKREFCLKFreq |
148 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34189ADD |
RCCEx_GetXSPICLKFreq |
452 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34189CA1 |
RCCEx_GetHCLKFreq |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34189CBD |
LL_RCC_IC3_IsEnabled |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34189CCD |
LL_RCC_IC3_GetSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34189CDD |
LL_RCC_IC4_IsEnabled |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34189CED |
LL_RCC_IC4_GetSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34189CFD |
LL_RCC_PLL4_IsReady.71 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34189D0D |
LL_RCC_PLL4P_IsEnabled |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34189D1D |
LL_RCC_PLL4_GetSource.72 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34189D2D |
RCCEx_GetPLLSourceFreq |
140 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34189DB9 |
LL_RCC_PLL4_GetM |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34189DC9 |
LL_RCC_PLL4_GetN |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34189DD9 |
LL_RCC_PLL4_GetFRACN |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34189DE9 |
LL_RCC_PLL4_GetP1 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34189DF9 |
LL_RCC_PLL4_GetP2 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34189E09 |
RCCEx_CalcPLLFreq |
136 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34189E91 |
LL_RCC_PLL4_IsEnabledBypass.73 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34189EA1 |
LL_RCC_HSI_IsReady.74 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34189EB1 |
LL_RCC_HSI_GetDivider.75 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34189EC1 |
LL_RCC_MSI_IsReady.76 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34189ED1 |
LL_RCC_MSI_GetFrequency |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34189EE1 |
LL_RCC_HSE_IsReady.77 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34189EF1 |
LL_RCC_PLL3_IsReady.78 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34189F01 |
LL_RCC_PLL3P_IsEnabled |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34189F11 |
LL_RCC_PLL3_GetSource.79 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34189F21 |
LL_RCC_PLL3_GetM |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34189F31 |
LL_RCC_PLL3_GetN |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34189F41 |
LL_RCC_PLL3_GetFRACN |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34189F51 |
LL_RCC_PLL3_GetP1 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34189F61 |
LL_RCC_PLL3_GetP2 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34189F71 |
LL_RCC_PLL3_IsEnabledBypass.80 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34189F81 |
LL_RCC_PLL2_IsReady.81 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34189F91 |
LL_RCC_PLL2P_IsEnabled |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34189FA1 |
LL_RCC_PLL2_GetSource.82 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34189FB1 |
LL_RCC_PLL2_GetM |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34189FC1 |
LL_RCC_PLL2_GetN |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34189FD1 |
LL_RCC_PLL2_GetFRACN |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34189FE1 |
LL_RCC_PLL2_GetP1 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34189FF1 |
LL_RCC_PLL2_GetP2 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A001 |
LL_RCC_PLL2_IsEnabledBypass.83 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A011 |
LL_RCC_PLL1_IsReady.84 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A021 |
LL_RCC_PLL1P_IsEnabled |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A031 |
LL_RCC_PLL1_GetSource.85 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A041 |
LL_RCC_PLL1_GetM |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A051 |
LL_RCC_PLL1_GetN |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A061 |
LL_RCC_PLL1_GetFRACN |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A071 |
LL_RCC_PLL1_GetP1 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A081 |
LL_RCC_PLL1_GetP2 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A091 |
LL_RCC_PLL1_IsEnabledBypass.86 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A0A1 |
LL_RCC_GetAHBPrescaler.87 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A0B1 |
LL_RCC_GetUSBClockSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A0C1 |
LL_RCC_IC15_IsEnabled |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A0D1 |
LL_RCC_IC15_GetSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A0E1 |
LL_RCC_GetUARTClockSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A0F1 |
RCCEx_GetPCLK1Freq |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A10D |
RCCEx_GetPCLK2Freq |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A129 |
LL_RCC_IC9_IsEnabled |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A139 |
LL_RCC_IC9_GetSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A149 |
LL_RCC_IC14_IsEnabled |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A159 |
LL_RCC_IC14_GetSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A169 |
LL_RCC_GetAPB2Prescaler.88 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A179 |
LL_RCC_GetAPB1Prescaler.89 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A189 |
RCCEx_GetPCLK4Freq |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A1A5 |
LL_RCC_IC8_IsEnabled |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A1B5 |
LL_RCC_IC8_GetSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A1C5 |
LL_RCC_GetAPB4Prescaler.90 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A1D5 |
LL_RCC_IC7_IsEnabled |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A1E5 |
LL_RCC_IC7_GetSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A1F5 |
LL_RCC_IC5_IsEnabled |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A205 |
LL_RCC_IC5_GetSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A215 |
LL_RCC_LSI_IsReady.91 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A225 |
LL_RCC_IC20_IsEnabled |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A235 |
LL_RCC_IC20_GetSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A245 |
RCCEx_GetPCLK5Freq |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A261 |
LL_RCC_IC16_IsEnabled |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A271 |
LL_RCC_IC16_GetSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A281 |
LL_RCC_GetAPB5Prescaler.92 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A291 |
LL_RCC_IC10_IsEnabled |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A2A1 |
LL_RCC_IC10_GetSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A2B1 |
LL_RCC_IC19_IsEnabled |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A2C1 |
LL_RCC_IC19_GetSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A2D1 |
LL_RCC_IC13_IsEnabled |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A2E1 |
LL_RCC_IC13_GetSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A2F1 |
LL_RCC_IC12_IsEnabled |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A301 |
LL_RCC_IC12_GetSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A311 |
LL_RCC_IC17_IsEnabled |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A321 |
LL_RCC_IC17_GetSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A331 |
LL_RCC_CLKP_IsEnabled |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A341 |
LL_RCC_IC18_IsEnabled |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A351 |
LL_RCC_IC18_GetSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A361 |
HAL_XSPI_Init |
1 548 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A96D |
XSPI_WaitFlagStateUntilTimeout |
104 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418A9D5 |
XSPI_ConfigCmd |
924 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418AD71 |
HAL_XSPI_Receive |
300 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418AE9D |
LL_AHB5_GRP1_IsEnabledClock |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418AEB9 |
JumpToApplication |
356 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418B01D |
CheckSFDP_Signature |
80 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418B06D |
SFDP_GetHeader |
256 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418B16D |
sfdp_get_paraminfo |
652 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418B3F9 |
SFDP_BuildGenericDriver |
3 092 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418C00D |
JEDEC_Basic_Manage4S4S4SEnableSequence |
132 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418C091 |
sfdp_getfrequencevalue |
64 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418C0D1 |
sfdp_set_dummycycle |
420 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418C275 |
EXTMEM_DRIVER_NOR_SFDP_DeInit |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418C285 |
EXTMEM_DRIVER_NOR_SFDP_Disable_MemoryMappedMode |
36 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418C2A9 |
SAL_XSPI_SetClock |
116 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418C31D |
XSPI_FormatCommand |
88 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418C375 |
SAL_XSPI_GetId |
152 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418C40D |
XSPI_Transmit |
32 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418C42D |
SAL_XSPI_CommandSendData |
136 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418C4B5 |
SAL_XSPI_SendReadCommand |
136 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418C53D |
SAL_XSPI_CheckStatusRegister |
232 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418C625 |
SAL_XSPI_EnableMapMode |
200 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418C6ED |
SAL_XSPI_UpdateMemoryType |
116 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418C761 |
EXTMEM_MemoryMappedMode |
140 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418C7ED |
EXTMEM_GetMapAddress |
196 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418C8C1 |
_start |
14 |
4 |
Code |
Gb |
SEGGER_THUMB_Startup.o |
0x3418C8CB |
__startup_complete |
|
4 |
Code |
Gb |
SEGGER_THUMB_Startup.o |
0x3418C8CB |
__SEGGER_init_done |
|
4 |
Code |
Gb |
SEGGER_THUMB_Startup.o |
0x3418C8CF |
exit |
2 |
4 |
Code |
Gb |
SEGGER_THUMB_Startup.o |
0x3418C8D5 |
reset_handler |
|
4 |
Code |
Gb |
STM32N6xx_Startup.o |
0x3418C8D5 |
Reset_Handler |
|
4 |
Code |
Gb |
STM32N6xx_Startup.o |
0x3418C901 |
memcpy |
92 |
4 |
Code |
Wk |
strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) |
0x3418C901 |
__aeabi_memcpy |
|
4 |
Code |
Wk |
strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) |
0x3418C91F |
__aeabi_memcpy8 |
|
4 |
Code |
Wk |
strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) |
0x3418C91F |
__aeabi_memcpy4 |
|
4 |
Code |
Wk |
strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) |
0x3418C95D |
__aeabi_memclr8 |
|
4 |
Code |
Wk |
strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) |
0x3418C95D |
__aeabi_memclr4 |
|
4 |
Code |
Wk |
strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) |
0x3418C95D |
__aeabi_memclr |
104 |
4 |
Code |
Wk |
strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) |
0x3418C95F |
__aeabi_memset8 |
|
4 |
Code |
Wk |
strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) |
0x3418C95F |
__aeabi_memset4 |
|
4 |
Code |
Wk |
strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) |
0x3418C95F |
__aeabi_memset |
|
4 |
Code |
Wk |
strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) |
0x3418C965 |
memset |
|
4 |
Code |
Wk |
strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) |
0x3418C9C5 |
MX_BSEC_Init |
2 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418C9E1 |
MX_EXTMEM_MANAGER_Init |
62 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418CA1F |
PVD_PVM_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418CA21 |
LL_AHB4_GRP1_EnableClock |
34 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418CA43 |
DTS_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418CA45 |
main |
326 |
4 |
Code |
Gb |
blto2_FSBL_lto.o |
0x3418CB8B |
RCC_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418CB8D |
SystemClock_Config |
238 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418CC7B |
LOCKUP_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418CC7D |
OTP_Config |
142 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418CD0B |
CACHE_ECC_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418CD0D |
LL_APB4_GRP2_EnableClock |
34 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418CD2F |
TCM_ECC_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418CD31 |
assert_failed |
10 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418CD3B |
BCK_ECC_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418CD3D |
NMI_Handler |
2 |
4 |
Code |
Gb |
blto2_FSBL_lto.o |
0x3418CD3F |
FPU_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418CD41 |
HardFault_Handler |
2 |
4 |
Code |
Gb |
blto2_FSBL_lto.o |
0x3418CD43 |
RTC_S_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418CD45 |
MemManage_Handler |
2 |
4 |
Code |
Gb |
blto2_FSBL_lto.o |
0x3418CD47 |
TAMP_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418CD49 |
BusFault_Handler |
2 |
4 |
Code |
Gb |
blto2_FSBL_lto.o |
0x3418CD4B |
RIFSC_TAMPER_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418CD4D |
UsageFault_Handler |
2 |
4 |
Code |
Gb |
blto2_FSBL_lto.o |
0x3418CD4F |
IAC_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418CD51 |
SVC_Handler |
2 |
4 |
Code |
Gb |
blto2_FSBL_lto.o |
0x3418CD53 |
RCC_S_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418CD55 |
DebugMon_Handler |
2 |
4 |
Code |
Gb |
blto2_FSBL_lto.o |
0x3418CD57 |
RTC_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418CD59 |
PendSV_Handler |
2 |
4 |
Code |
Gb |
blto2_FSBL_lto.o |
0x3418CD5B |
IWDG_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418CD5D |
SystemInit |
510 |
4 |
Code |
Gb |
blto2_FSBL_lto.o |
0x3418CF5B |
WWDG_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418CF5D |
MX_XSPI2_Init |
126 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418CFDB |
EXTI0_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418CFDD |
LL_APB4_GRP2_EnableClock.5 |
34 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418CFFF |
EXTI1_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418D001 |
LL_AHB4_GRP1_EnableClock.6 |
34 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418D023 |
EXTI2_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418D025 |
LL_AHB5_GRP1_EnableClock |
34 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418D047 |
EXTI3_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418D049 |
HAL_InitTick |
126 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418D0C7 |
EXTI4_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418D0C9 |
HAL_IncTick |
26 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418D0E3 |
EXTI5_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418D0E5 |
HAL_Delay |
58 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418D11F |
EXTI6_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418D121 |
HAL_SuspendTick |
18 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418D133 |
EXTI7_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418D135 |
HAL_BSEC_OTP_Reload |
250 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418D22F |
EXTI8_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418D231 |
HAL_BSEC_OTP_Program |
342 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418D387 |
EXTI9_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418D389 |
HAL_NVIC_SetPriorityGrouping |
62 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418D3C7 |
EXTI10_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418D3C9 |
__NVIC_SetPriority |
62 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418D407 |
EXTI11_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418D409 |
SysTick_Config |
78 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418D457 |
EXTI12_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418D459 |
HAL_GPIO_WritePin |
102 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418D4BF |
EXTI13_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418D4C1 |
HAL_PWREx_ConfigSupply |
114 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418D533 |
EXTI14_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418D535 |
HAL_PWREx_ControlVoltageScaling |
114 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418D5A7 |
EXTI15_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418D5A9 |
HAL_PWREx_ConfigVddIORange |
226 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418D68B |
SAES_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418D68D |
HAL_PWREx_EnableVddIO3 |
18 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418D69F |
CRYP_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418D6A1 |
LL_RCC_HSI_Enable |
14 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418D6AF |
PKA_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418D6B1 |
HAL_RCC_OscConfig |
2 810 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418E1AB |
HASH_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418E1AD |
LL_RCC_HSI_SetCalibTrimming |
30 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418E1CB |
RNG_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418E1CD |
LL_RCC_HSI_Disable |
14 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418E1DB |
MCE1_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418E1DD |
LL_RCC_MSI_SetCalibTrimming |
30 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418E1FB |
MCE2_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418E1FD |
LL_RCC_MSI_Enable |
14 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418E20B |
MCE3_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418E20D |
LL_RCC_MSI_Disable |
14 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418E21B |
MCE4_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418E21D |
LL_RCC_LSI_Enable |
14 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418E22B |
ADC1_2_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418E22D |
LL_RCC_LSI_Disable |
14 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418E23B |
CSI_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418E23D |
RCC_PLL_IsNewConfig |
218 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418E317 |
DCMIPP_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418E319 |
RCC_PLL_Config |
846 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418E667 |
PAHB_ERR_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418E669 |
RCC_PLL_Enable |
94 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418E6C7 |
NPU0_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418E6C9 |
HAL_RCC_ClockConfig |
2 498 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418F08B |
NPU1_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418F08D |
RCC_IC_CheckPLLSources |
234 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418F177 |
NPU2_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418F179 |
LL_RCC_IC1_Enable |
14 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418F187 |
NPU3_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418F189 |
HAL_RCC_GetCpuClockFreq |
238 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418F277 |
CACHEAXI_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418F279 |
LL_RCC_IC1_GetDivider |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418F28F |
LTDC_LO_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418F291 |
HAL_RCC_GetSysClockFreq |
26 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418F2AB |
LTDC_LO_ERR_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418F2AD |
LL_RCC_IC2_GetDivider |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418F2C3 |
DMA2D_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418F2C5 |
LL_RCC_IC5_Enable.57 |
14 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418F2D3 |
JPEG_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418F2D5 |
LL_RCC_IC3_Enable |
14 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418F2E3 |
VENC_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418F2E5 |
LL_RCC_IC4_Enable |
14 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418F2F3 |
GFXMMU_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418F2F5 |
LL_RCC_CLKP_Enable |
14 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418F303 |
GFXTIM_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418F305 |
LL_RCC_IC7_Enable |
14 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418F313 |
GPU2D_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418F315 |
LL_RCC_IC8_Enable |
14 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418F323 |
GPU2D_ER_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418F325 |
LL_RCC_HSE_SelectHSEDiv2AsDiv2Clock |
18 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418F337 |
ICACHE_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418F339 |
LL_RCC_HSE_SelectHSEAsDiv2Clock |
18 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418F34B |
HPDMA1_Channel0_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418F34D |
LL_RCC_SetTIMPrescaler |
30 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418F36B |
HPDMA1_Channel1_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418F36D |
LL_RCC_GetADCClockSource |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418F383 |
HPDMA1_Channel2_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418F385 |
LL_RCC_GetADFClockSource |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418F39B |
HPDMA1_Channel3_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418F39D |
LL_RCC_GetCLKPClockSource |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418F3B3 |
HPDMA1_Channel4_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418F3B5 |
LL_RCC_GetDCMIPPClockSource |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418F3CB |
HPDMA1_Channel5_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418F3CD |
LL_RCC_GetETHClockSource |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418F3E3 |
HPDMA1_Channel6_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418F3E5 |
LL_RCC_GetETHPTPClockSource |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418F3FB |
HPDMA1_Channel7_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418F3FD |
LL_RCC_GetFDCANClockSource |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418F413 |
HPDMA1_Channel8_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418F415 |
LL_RCC_GetFMCClockSource |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418F42B |
HPDMA1_Channel9_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418F42D |
LL_RCC_GetLPUARTClockSource |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418F443 |
HPDMA1_Channel10_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418F445 |
LL_RCC_GetLTDCClockSource |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418F45B |
HPDMA1_Channel11_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418F45D |
LL_RCC_GetMDFClockSource |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418F473 |
HPDMA1_Channel12_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418F475 |
LL_RCC_GetPSSIClockSource |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418F48B |
HPDMA1_Channel13_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418F48D |
LL_RCC_GetSPDIFRXClockSource |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418F4A3 |
HPDMA1_Channel14_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418F4A5 |
HAL_RCCEx_GetPeriphCLKFreq |
1 626 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418FAFF |
HPDMA1_Channel15_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418FB01 |
RCCEx_GetADCCLKFreq |
438 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418FCB7 |
GPDMA1_Channel0_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418FCB9 |
RCCEx_GetCSICLKFreq |
134 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418FD3F |
GPDMA1_Channel1_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418FD41 |
RCCEx_GetETH1PTPCLKFreq |
222 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418FE1F |
GPDMA1_Channel2_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418FE21 |
RCCEx_GetFDCANCLKFreq |
206 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3418FEEF |
GPDMA1_Channel3_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3418FEF1 |
RCCEx_GetFMCCLKFreq |
314 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3419002B |
GPDMA1_Channel4_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3419002D |
RCCEx_GetI2CCLKFreq |
706 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x341902EF |
GPDMA1_Channel5_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x341902F1 |
RCCEx_GetLPTIMCLKFreq |
706 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x341905B3 |
GPDMA1_Channel6_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x341905B5 |
RCCEx_GetPSSICLKFreq |
218 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3419068F |
GPDMA1_Channel7_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34190691 |
RCCEx_GetRTCCLKFreq |
126 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3419070F |
GPDMA1_Channel8_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34190711 |
RCCEx_GetSAICLKFreq |
606 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3419096F |
GPDMA1_Channel9_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34190971 |
LL_RCC_IC3_GetDivider |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34190987 |
GPDMA1_Channel10_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34190989 |
HAL_RCCEx_GetPLL1CLKFreq |
130 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34190A0B |
GPDMA1_Channel11_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34190A0D |
HAL_RCCEx_GetPLL2CLKFreq |
130 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34190A8F |
GPDMA1_Channel12_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34190A91 |
HAL_RCCEx_GetPLL3CLKFreq |
130 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34190B13 |
GPDMA1_Channel13_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34190B15 |
HAL_RCCEx_GetPLL4CLKFreq |
130 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34190B97 |
GPDMA1_Channel14_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34190B99 |
LL_RCC_IC4_GetDivider |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34190BAF |
GPDMA1_Channel15_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34190BB1 |
LL_RCC_IC15_GetDivider |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34190BC7 |
I2C1_EV_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34190BC9 |
LL_RCC_IC9_GetDivider |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34190BDF |
I2C1_ER_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34190BE1 |
LL_RCC_IC14_GetDivider |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34190BF7 |
I2C2_EV_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34190BF9 |
LL_RCC_IC8_GetDivider |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34190C0F |
I2C2_ER_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34190C11 |
LL_RCC_IC7_GetDivider |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34190C27 |
I2C3_EV_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34190C29 |
LL_RCC_IC5_GetDivider |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34190C3F |
I2C3_ER_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34190C41 |
LL_RCC_IC20_GetDivider |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34190C57 |
I2C4_EV_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34190C59 |
LL_RCC_IC16_GetDivider |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34190C6F |
I2C4_ER_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34190C71 |
LL_RCC_IC10_GetDivider |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34190C87 |
I3C1_EV_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34190C89 |
LL_RCC_IC19_GetDivider |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34190C9F |
I3C1_ER_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34190CA1 |
LL_RCC_IC13_GetDivider |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34190CB7 |
I3C2_EV_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34190CB9 |
LL_RCC_IC12_GetDivider |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34190CCF |
I3C2_ER_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34190CD1 |
LL_RCC_IC17_GetDivider |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34190CE7 |
TIM1_BRK_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34190CE9 |
LL_RCC_IC18_GetDivider |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34190CFF |
TIM1_UP_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34190D01 |
HAL_XSPI_SetTimeout |
18 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34190D13 |
TIM1_TRG_CCU_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34190D15 |
HAL_XSPI_Command |
1 106 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34191167 |
TIM1_CC_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34191169 |
HAL_XSPI_Transmit |
226 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3419124B |
TIM2_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3419124D |
HAL_XSPI_AutoPolling |
406 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x341913E3 |
TIM3_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x341913E5 |
HAL_XSPI_MemoryMapped |
330 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3419152F |
TIM4_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34191531 |
HAL_XSPI_Abort |
246 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34191627 |
TIM5_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34191629 |
HAL_XSPIM_Config |
878 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34191997 |
TIM6_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34191999 |
XSPIM_GetConfig |
210 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34191A6B |
TIM7_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34191A6D |
BOOT_Application |
34 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34191A8F |
TIM8_BRK_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34191A91 |
MapMemory |
94 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34191AEF |
TIM8_UP_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34191AF1 |
SFDP_ReadHeader |
126 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34191B6F |
TIM8_TRG_CCU_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34191B71 |
SFDP_CollectData |
458 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34191D3B |
TIM8_CC_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34191D3D |
SFDP_MemoryReset |
458 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34191F07 |
TIM9_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34191F09 |
JEDEC_Basic_ManageQuadEnableRequirement |
338 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3419205B |
TIM10_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3419205D |
sfdp_enter_octal_mode |
482 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3419223F |
TIM11_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192241 |
driver_check_FlagBUSY |
102 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x341922A7 |
TIM12_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x341922A9 |
EXTMEM_DRIVER_NOR_SFDP_Init |
306 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x341923DB |
TIM13_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x341923DD |
EXTMEM_DRIVER_NOR_SFDP_Enable_MemoryMappedMode |
58 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34192417 |
TIM14_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192419 |
SAL_XSPI_Init |
86 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3419246F |
TIM15_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192471 |
SAL_XSPI_MemoryConfig |
666 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3419270B |
TIM16_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x3419270D |
SAL_XSPI_GetSFDP |
222 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x341927EB |
TIM17_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x341927ED |
SAL_XSPI_Write |
138 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34192877 |
TIM18_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192879 |
SAL_XSPI_CommandSendReadAddress |
190 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34192937 |
LPTIM1_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192939 |
SAL_XSPI_DisableMapMode |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x3419294F |
LPTIM2_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192951 |
SAL_XSPI_Abort |
18 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34192963 |
LPTIM3_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192965 |
EXTMEM_Init |
94 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x341929C3 |
LPTIM4_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x341929C5 |
EXTMEM_DeInit |
78 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
0x34192A13 |
LPTIM5_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A15 |
ADF1_FLT0_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A17 |
MDF1_FLT0_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A19 |
MDF1_FLT1_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A1B |
MDF1_FLT2_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A1D |
MDF1_FLT3_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A1F |
MDF1_FLT4_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A21 |
MDF1_FLT5_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A23 |
SAI1_A_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A25 |
SAI1_B_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A27 |
SAI2_A_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A29 |
SAI2_B_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A2B |
SPDIFRX_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A2D |
SPI1_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A2F |
SPI2_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A31 |
SPI3_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A33 |
SPI4_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A35 |
SPI5_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A37 |
SPI6_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A39 |
USART1_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A3B |
USART2_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A3D |
USART3_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A3F |
UART4_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A41 |
UART5_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A43 |
USART6_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A45 |
UART7_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A47 |
UART8_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A49 |
UART9_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A4B |
USART10_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A4D |
LPUART1_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A4F |
XSPI1_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A51 |
XSPI2_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A53 |
XSPI3_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A55 |
FMC_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A57 |
SDMMC1_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A59 |
SDMMC2_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A5B |
UCPD1_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A5D |
USB1_OTG_HS_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A5F |
USB2_OTG_HS_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A61 |
ETH1_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A63 |
FDCAN1_IT0_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A65 |
FDCAN1_IT1_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A67 |
FDCAN2_IT0_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A69 |
FDCAN2_IT1_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A6B |
FDCAN3_IT0_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A6D |
FDCAN3_IT1_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A6F |
FDCAN_CU_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A71 |
MDIOS_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A73 |
DCMI_PSSI_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A75 |
WAKEUP_PIN_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A77 |
CTI_INT0_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A79 |
CTI_INT1_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A7B |
LTDC_UP_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192A7D |
LTDC_UP_ERR_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
0x34192D79 |
__SEGGER_init_ctors |
26 |
4 |
Code |
Wk |
SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) |
0x34192DCD |
__SEGGER_init_zero |
18 |
2 |
Code |
Wk |
SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) |
0x34192DDF |
__SEGGER_init_copy |
20 |
2 |
Code |
Wk |
SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) |
Function symbols by descending size
| Symbol name |
Size |
Align |
Type |
Bd |
Object File |
HAL_RCCEx_PeriphCLKConfig |
24 268 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
SFDP_BuildGenericDriver |
3 092 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_RCC_OscConfig |
2 810 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_RCC_ClockConfig |
2 498 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_GPIO_Init |
1 928 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_RCCEx_GetPeriphCLKFreq |
1 626 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_XSPI_Init |
1 548 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetSPICLKFreq |
1 196 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_XSPI_Command |
1 106 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
XSPI_ConfigCmd |
924 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetUARTCLKFreq |
916 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetUSARTCLKFreq |
916 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_XSPIM_Config |
878 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCC_PLL_Config |
846 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
SystemCoreClockUpdate |
828 |
4 |
Code |
Gb |
blto2_FSBL_lto.o |
RCCEx_GetCLKPCLKFreq |
736 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetI2CCLKFreq |
706 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetLPTIMCLKFreq |
706 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
SAL_XSPI_MemoryConfig |
666 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
sfdp_get_paraminfo |
652 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetSAICLKFreq |
606 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetI3CCLKFreq |
516 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
SystemInit |
510 |
4 |
Code |
Gb |
blto2_FSBL_lto.o |
sfdp_enter_octal_mode |
482 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
SFDP_CollectData |
458 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
SFDP_MemoryReset |
458 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetXSPICLKFreq |
452 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetADCCLKFreq |
438 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetMDFCLKFreq |
436 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
sfdp_set_dummycycle |
420 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetLPUARTCLKFreq |
412 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_XSPI_AutoPolling |
406 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetSDMMCCLKFreq |
396 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetADFCLKFreq |
388 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetSPDIFRXCLKFreq |
372 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
JumpToApplication |
356 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_BSEC_OTP_Program |
342 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
JEDEC_Basic_ManageQuadEnableRequirement |
338 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_XSPI_MemoryMapped |
330 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
main |
326 |
4 |
Code |
Gb |
blto2_FSBL_lto.o |
HAL_XSPI_MspInit |
324 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetOTGPHYCLKFreq |
324 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetFMCCLKFreq |
314 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
EXTMEM_DRIVER_NOR_SFDP_Init |
306 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_XSPI_Receive |
300 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
SFDP_GetHeader |
256 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_BSEC_OTP_Reload |
250 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_XSPI_Abort |
246 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_DMA_Abort |
244 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_RCC_GetClockConfig |
240 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_RCC_GetCpuClockFreq |
238 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
SystemClock_Config |
238 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCC_IC_CheckPLLSources |
234 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCC_GetSysClockFreq |
232 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
SAL_XSPI_CheckStatusRegister |
232 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetDCMIPPCLKFreq |
228 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetLTDCCLKFreq |
228 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_PWREx_ConfigVddIORange |
226 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_XSPI_Transmit |
226 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetETH1PTPCLKFreq |
222 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
SAL_XSPI_GetSFDP |
222 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetPSSICLKFreq |
218 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCC_PLL_IsNewConfig |
218 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetETH1CLKFreq |
216 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
XSPIM_GetConfig |
210 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetFDCANCLKFreq |
206 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
SAL_XSPI_EnableMapMode |
200 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
EXTMEM_GetMapAddress |
196 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
SAL_XSPI_CommandSendReadAddress |
190 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_NVIC_SetPriority |
168 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
SAL_XSPI_GetId |
152 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetOTGPHYCKREFCLKFreq |
148 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
OTP_Config |
142 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
EXTMEM_MemoryMappedMode |
140 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetPLLSourceFreq |
140 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
SAL_XSPI_Write |
138 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_CalcPLLFreq |
136 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
SAL_XSPI_CommandSendData |
136 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
SAL_XSPI_SendReadCommand |
136 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetCSICLKFreq |
134 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
JEDEC_Basic_Manage4S4S4SEnableSequence |
132 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_RCCEx_GetPLL1CLKFreq |
130 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_RCCEx_GetPLL2CLKFreq |
130 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_RCCEx_GetPLL3CLKFreq |
130 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_RCCEx_GetPLL4CLKFreq |
130 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_InitTick |
126 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
MX_XSPI2_Init |
126 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetRTCCLKFreq |
126 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
SFDP_ReadHeader |
126 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_BSEC_OTP_Read |
124 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
SAL_XSPI_SetClock |
116 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
SAL_XSPI_UpdateMemoryType |
116 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_PWREx_ConfigSupply |
114 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_PWREx_ControlVoltageScaling |
114 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
XSPI_WaitFlagStateUntilTimeout |
104 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
__aeabi_memclr |
104 |
4 |
Code |
Wk |
strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) |
HAL_GPIO_WritePin |
102 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
driver_check_FlagBUSY |
102 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
NVIC_EncodePriority |
100 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
EXTMEM_Init |
94 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
MapMemory |
94 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCC_PLL_Enable |
94 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
memcpy |
92 |
4 |
Code |
Wk |
strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) |
MX_GPIO_Init |
88 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
XSPI_FormatCommand |
88 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
SAL_XSPI_Init |
86 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCC_PLL_Source_IsReady |
84 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
CheckSFDP_Signature |
80 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
EXTMEM_DeInit |
78 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
SysTick_Config |
78 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
sfdp_getfrequencevalue |
64 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_NVIC_SetPriorityGrouping |
62 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
MX_EXTMEM_MANAGER_Init |
62 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
__NVIC_SetPriority |
62 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
__NVIC_SetPriorityGrouping |
60 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
EXTMEM_DRIVER_NOR_SFDP_Enable_MemoryMappedMode |
58 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_Delay |
58 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetClockSource |
52 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_Init |
48 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetClockSource |
48 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
EXTMEM_DRIVER_NOR_SFDP_Disable_MemoryMappedMode |
36 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
BOOT_Application |
34 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_AHB4_GRP1_EnableClock |
34 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_AHB4_GRP1_EnableClock.6 |
34 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_AHB5_GRP1_EnableClock |
34 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_APB4_GRP2_EnableClock |
34 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_APB4_GRP2_EnableClock.5 |
34 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
XSPI_Transmit |
32 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_HSI_SetCalibTrimming |
30 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_MSI_SetCalibTrimming |
30 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetTIMPrescaler |
30 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_AHB5_GRP1_IsEnabledClock |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_HSI_SetDivider |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_MSI_SetFrequency |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetADFClockSource |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetCLKPClockSource |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetDCMIPPClockSource |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetETHClockSource |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetETHPHYInterface |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetETHREFRXClockSource |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetETHREFTXClockSource |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetFDCANClockSource |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetFMCClockSource |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetLPUARTClockSource |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetLTDCClockSource |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetMDFClockSource |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetPSSIClockSource |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetRTCClockSource |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetRTC_HSEPrescaler |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetSPDIFRXClockSource |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetHCLKFreq |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetPCLK1Freq |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetPCLK2Freq |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetPCLK4Freq |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
RCCEx_GetPCLK5Freq |
28 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_IncTick |
26 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_RCC_GetSysClockFreq |
26 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
__SEGGER_init_ctors |
26 |
4 |
Code |
Wk |
SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) |
LL_RCC_GetADCClockSource |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetADFClockSource |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetCLKPClockSource |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetDCMIPPClockSource |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetETHClockSource |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetETHPTPClockSource |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetFDCANClockSource |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetFMCClockSource |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetLPUARTClockSource |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetLTDCClockSource |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetMDFClockSource |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetPSSIClockSource |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetSPDIFRXClockSource |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC10_GetDivider |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC12_GetDivider |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC13_GetDivider |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC14_GetDivider |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC15_GetDivider |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC16_GetDivider |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC17_GetDivider |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC18_GetDivider |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC19_GetDivider |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC1_GetDivider |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC20_GetDivider |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC2_GetDivider |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC3_GetDivider |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC4_GetDivider |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC5_GetDivider |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC7_GetDivider |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC8_GetDivider |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC9_GetDivider |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
SAL_XSPI_DisableMapMode |
22 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
__SEGGER_init_copy |
20 |
2 |
Code |
Wk |
SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) |
HAL_PWREx_EnableVddIO3 |
18 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_SuspendTick |
18 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_XSPI_SetTimeout |
18 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_HSE_SelectHSEAsDiv2Clock |
18 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_HSE_SelectHSEDiv2AsDiv2Clock |
18 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
SAL_XSPI_Abort |
18 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
__SEGGER_init_zero |
18 |
2 |
Code |
Wk |
SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) |
EXTMEM_DRIVER_NOR_SFDP_DeInit |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_SYSTICK_Config |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_CLKP_IsEnabled |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetADCPrescaler |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetAHBPrescaler.87 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetAPB1Prescaler.89 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetAPB2Prescaler.88 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetAPB4Prescaler.90 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetAPB5Prescaler.92 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetCpuClkSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetETH1PTPDivider |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetI2CClockSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetI3CClockSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetLPTIMClockSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetRTCClockSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetSAIClockSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetSDMMCClockSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetSPIClockSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetSysClkSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetTIMPrescaler |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetUARTClockSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetUSARTClockSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetUSBClockSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_GetXSPIClockSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_HSE_IsReady |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_HSE_IsReady.77 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_HSE_IsSelectedHSEDiv2AsDiv2Clock |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_HSI_GetDivider |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_HSI_GetDivider.75 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_HSI_IsReady |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_HSI_IsReady.74 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC10_Enable.58 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC10_GetSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC10_IsEnabled |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC11_GetSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC12_Enable |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC12_GetSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC12_IsEnabled |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC13_Enable |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC13_GetSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC13_IsEnabled |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC14_Enable |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC14_GetSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC14_IsEnabled |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC15_Enable.59 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC15_GetSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC15_IsEnabled |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC16_Enable |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC16_GetSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC16_IsEnabled |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC17_Enable |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC17_GetSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC17_IsEnabled |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC18_Enable |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC18_GetSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC18_IsEnabled |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC19_Enable |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC19_GetSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC19_IsEnabled |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC1_GetSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC20_Enable.60 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC20_GetSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC20_IsEnabled |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC2_GetSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC3_GetSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC3_IsEnabled |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC4_GetSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC4_IsEnabled |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC5_GetSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC5_IsEnabled |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC6_GetSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC7_GetSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC7_IsEnabled |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC8_GetSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC8_IsEnabled |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC9_Enable |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC9_GetSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC9_IsEnabled |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_LSE_IsReady |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_LSE_IsReady.56 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_LSI_IsReady |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_LSI_IsReady.91 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_MSI_GetFrequency |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_MSI_IsReady |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_MSI_IsReady.76 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL1P_IsEnabled |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL1_GetFRACN |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL1_GetM |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL1_GetN |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL1_GetP1 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL1_GetP2 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL1_GetSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL1_GetSource.85 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL1_IsEnabledBypass |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL1_IsEnabledBypass.86 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL1_IsReady |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL1_IsReady.84 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL2P_IsEnabled |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL2_GetFRACN |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL2_GetM |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL2_GetN |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL2_GetP1 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL2_GetP2 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL2_GetSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL2_GetSource.82 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL2_IsEnabledBypass |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL2_IsEnabledBypass.83 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL2_IsReady |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL2_IsReady.81 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL3P_IsEnabled |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL3_GetFRACN |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL3_GetM |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL3_GetN |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL3_GetP1 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL3_GetP2 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL3_GetSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL3_GetSource.79 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL3_IsEnabledBypass |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL3_IsEnabledBypass.80 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL3_IsReady |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL3_IsReady.78 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL4P_IsEnabled |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL4_GetFRACN |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL4_GetM |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL4_GetN |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL4_GetP1 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL4_GetP2 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL4_GetSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL4_GetSource.72 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL4_IsEnabledBypass |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL4_IsEnabledBypass.73 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL4_IsReady |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_PLL4_IsReady.71 |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetI2CClockSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetI3CClockSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetLPTIMClockSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetOTGPHYCKREFClockSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetOTGPHYClockSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetSAIClockSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetSDMMCClockSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetSPIClockSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetUSARTClockSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_SetXSPIClockSource |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
__NVIC_GetPriorityGrouping |
16 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_CLKP_Enable |
14 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_HSI_Disable |
14 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_HSI_Enable |
14 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC1_Enable |
14 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC3_Enable |
14 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC4_Enable |
14 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC5_Enable.57 |
14 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC7_Enable |
14 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_IC8_Enable |
14 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_LSI_Disable |
14 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_LSI_Enable |
14 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_MSI_Disable |
14 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
LL_RCC_MSI_Enable |
14 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
_start |
14 |
4 |
Code |
Gb |
SEGGER_THUMB_Startup.o |
HAL_GetTick |
12 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
assert_failed |
10 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
HAL_MspInit |
8 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
SysTick_Handler |
8 |
4 |
Code |
Gb |
blto2_FSBL_lto.o |
Error_Handler |
4 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
BusFault_Handler |
2 |
4 |
Code |
Gb |
blto2_FSBL_lto.o |
DebugMon_Handler |
2 |
4 |
Code |
Gb |
blto2_FSBL_lto.o |
HardFault_Handler |
2 |
4 |
Code |
Gb |
blto2_FSBL_lto.o |
MX_BSEC_Init |
2 |
4 |
Code |
Lc |
blto2_FSBL_lto.o |
MemManage_Handler |
2 |
4 |
Code |
Gb |
blto2_FSBL_lto.o |
NMI_Handler |
2 |
4 |
Code |
Gb |
blto2_FSBL_lto.o |
PendSV_Handler |
2 |
4 |
Code |
Gb |
blto2_FSBL_lto.o |
SVC_Handler |
2 |
4 |
Code |
Gb |
blto2_FSBL_lto.o |
UsageFault_Handler |
2 |
4 |
Code |
Gb |
blto2_FSBL_lto.o |
exit |
2 |
4 |
Code |
Gb |
SEGGER_THUMB_Startup.o |
ADC1_2_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
ADF1_FLT0_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
BCK_ECC_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
CACHEAXI_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
CACHE_ECC_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
CRYP_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
CSI_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
CTI_INT0_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
CTI_INT1_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
DCMIPP_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
DCMI_PSSI_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
DMA2D_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
DTS_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
ETH1_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
EXTI0_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
EXTI10_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
EXTI11_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
EXTI12_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
EXTI13_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
EXTI14_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
EXTI15_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
EXTI1_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
EXTI2_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
EXTI3_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
EXTI4_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
EXTI5_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
EXTI6_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
EXTI7_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
EXTI8_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
EXTI9_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
FDCAN1_IT0_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
FDCAN1_IT1_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
FDCAN2_IT0_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
FDCAN2_IT1_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
FDCAN3_IT0_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
FDCAN3_IT1_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
FDCAN_CU_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
FMC_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
FPU_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
GFXMMU_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
GFXTIM_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
GPDMA1_Channel0_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
GPDMA1_Channel10_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
GPDMA1_Channel11_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
GPDMA1_Channel12_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
GPDMA1_Channel13_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
GPDMA1_Channel14_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
GPDMA1_Channel15_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
GPDMA1_Channel1_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
GPDMA1_Channel2_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
GPDMA1_Channel3_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
GPDMA1_Channel4_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
GPDMA1_Channel5_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
GPDMA1_Channel6_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
GPDMA1_Channel7_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
GPDMA1_Channel8_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
GPDMA1_Channel9_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
GPU2D_ER_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
GPU2D_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
HASH_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
HPDMA1_Channel0_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
HPDMA1_Channel10_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
HPDMA1_Channel11_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
HPDMA1_Channel12_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
HPDMA1_Channel13_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
HPDMA1_Channel14_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
HPDMA1_Channel15_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
HPDMA1_Channel1_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
HPDMA1_Channel2_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
HPDMA1_Channel3_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
HPDMA1_Channel4_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
HPDMA1_Channel5_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
HPDMA1_Channel6_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
HPDMA1_Channel7_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
HPDMA1_Channel8_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
HPDMA1_Channel9_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
I2C1_ER_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
I2C1_EV_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
I2C2_ER_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
I2C2_EV_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
I2C3_ER_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
I2C3_EV_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
I2C4_ER_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
I2C4_EV_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
I3C1_ER_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
I3C1_EV_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
I3C2_ER_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
I3C2_EV_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
IAC_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
ICACHE_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
IWDG_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
JPEG_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
LOCKUP_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
LPTIM1_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
LPTIM2_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
LPTIM3_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
LPTIM4_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
LPTIM5_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
LPUART1_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
LTDC_LO_ERR_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
LTDC_LO_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
LTDC_UP_ERR_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
LTDC_UP_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
MCE1_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
MCE2_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
MCE3_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
MCE4_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
MDF1_FLT0_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
MDF1_FLT1_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
MDF1_FLT2_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
MDF1_FLT3_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
MDF1_FLT4_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
MDF1_FLT5_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
MDIOS_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
NPU0_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
NPU1_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
NPU2_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
NPU3_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
PAHB_ERR_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
PKA_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
PVD_PVM_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
RCC_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
RCC_S_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
RIFSC_TAMPER_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
RNG_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
RTC_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
RTC_S_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
Reset_Handler |
|
4 |
Code |
Gb |
STM32N6xx_Startup.o |
SAES_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
SAI1_A_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
SAI1_B_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
SAI2_A_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
SAI2_B_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
SDMMC1_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
SDMMC2_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
SPDIFRX_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
SPI1_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
SPI2_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
SPI3_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
SPI4_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
SPI5_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
SPI6_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
TAMP_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
TCM_ECC_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
TIM10_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
TIM11_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
TIM12_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
TIM13_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
TIM14_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
TIM15_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
TIM16_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
TIM17_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
TIM18_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
TIM1_BRK_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
TIM1_CC_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
TIM1_TRG_CCU_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
TIM1_UP_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
TIM2_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
TIM3_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
TIM4_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
TIM5_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
TIM6_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
TIM7_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
TIM8_BRK_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
TIM8_CC_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
TIM8_TRG_CCU_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
TIM8_UP_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
TIM9_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
UART4_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
UART5_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
UART7_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
UART8_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
UART9_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
UCPD1_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
USART10_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
USART1_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
USART2_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
USART3_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
USART6_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
USB1_OTG_HS_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
USB2_OTG_HS_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
VENC_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
WAKEUP_PIN_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
WWDG_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
XSPI1_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
XSPI2_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
XSPI3_IRQHandler |
|
2 |
Code |
Wk |
stm32n657xx_Vectors.o |
__SEGGER_init_done |
|
4 |
Code |
Gb |
SEGGER_THUMB_Startup.o |
__aeabi_memclr4 |
|
4 |
Code |
Wk |
strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) |
__aeabi_memclr8 |
|
4 |
Code |
Wk |
strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) |
__aeabi_memcpy |
|
4 |
Code |
Wk |
strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) |
__aeabi_memcpy4 |
|
4 |
Code |
Wk |
strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) |
__aeabi_memcpy8 |
|
4 |
Code |
Wk |
strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) |
__aeabi_memset |
|
4 |
Code |
Wk |
strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) |
__aeabi_memset4 |
|
4 |
Code |
Wk |
strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) |
__aeabi_memset8 |
|
4 |
Code |
Wk |
strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) |
__startup_complete |
|
4 |
Code |
Gb |
SEGGER_THUMB_Startup.o |
memset |
|
4 |
Code |
Wk |
strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) |
reset_handler |
|
4 |
Code |
Gb |
STM32N6xx_Startup.o |
Read-write data symbols by name
| Symbol name |
Address |
Size |
Align |
Type |
Bd |
Object File |
JEDEC_Address4Bytes |
0x34000290 |
8 |
4 |
Zero |
Lc |
blto2_FSBL_lto.o |
JEDEC_Basic |
0x340001F8 |
96 |
4 |
Zero |
Lc |
blto2_FSBL_lto.o |
JEDEC_OctalDdr |
0x34000258 |
32 |
4 |
Zero |
Lc |
blto2_FSBL_lto.o |
JEDEC_SCCR_Map |
0x34000124 |
112 |
4 |
Zero |
Lc |
blto2_FSBL_lto.o |
JEDEC_XSPI10 |
0x34000278 |
24 |
4 |
Zero |
Lc |
blto2_FSBL_lto.o |
JumpToApplication.JumpToApp |
0x3400029C |
4 |
4 |
Zero |
Lc |
blto2_FSBL_lto.o |
SystemCoreClock |
0x340002A4 |
4 |
4 |
Init |
Lc |
blto2_FSBL_lto.o |
extmem_list_config |
0x34000000 |
172 |
4 |
Zero |
Lc |
blto2_FSBL_lto.o |
hxspi2 |
0x34000194 |
100 |
4 |
Zero |
Lc |
blto2_FSBL_lto.o |
sfdp_param_info |
0x340000AC |
120 |
4 |
Zero |
Lc |
blto2_FSBL_lto.o |
uwTick |
0x34000298 |
4 |
4 |
Zero |
Lc |
blto2_FSBL_lto.o |
uwTickFreq |
0x340002A8 |
1 |
|
Init |
Lc |
blto2_FSBL_lto.o |
uwTickPrio |
0x340002A0 |
4 |
4 |
Init |
Lc |
blto2_FSBL_lto.o |
Read-write data symbols by address
| Address |
Symbol name |
Size |
Align |
Type |
Bd |
Object File |
0x34000000 |
extmem_list_config |
172 |
4 |
Zero |
Lc |
blto2_FSBL_lto.o |
0x340000AC |
sfdp_param_info |
120 |
4 |
Zero |
Lc |
blto2_FSBL_lto.o |
0x34000124 |
JEDEC_SCCR_Map |
112 |
4 |
Zero |
Lc |
blto2_FSBL_lto.o |
0x34000194 |
hxspi2 |
100 |
4 |
Zero |
Lc |
blto2_FSBL_lto.o |
0x340001F8 |
JEDEC_Basic |
96 |
4 |
Zero |
Lc |
blto2_FSBL_lto.o |
0x34000258 |
JEDEC_OctalDdr |
32 |
4 |
Zero |
Lc |
blto2_FSBL_lto.o |
0x34000278 |
JEDEC_XSPI10 |
24 |
4 |
Zero |
Lc |
blto2_FSBL_lto.o |
0x34000290 |
JEDEC_Address4Bytes |
8 |
4 |
Zero |
Lc |
blto2_FSBL_lto.o |
0x34000298 |
uwTick |
4 |
4 |
Zero |
Lc |
blto2_FSBL_lto.o |
0x3400029C |
JumpToApplication.JumpToApp |
4 |
4 |
Zero |
Lc |
blto2_FSBL_lto.o |
0x340002A0 |
uwTickPrio |
4 |
4 |
Init |
Lc |
blto2_FSBL_lto.o |
0x340002A4 |
SystemCoreClock |
4 |
4 |
Init |
Lc |
blto2_FSBL_lto.o |
0x340002A8 |
uwTickFreq |
1 |
|
Init |
Lc |
blto2_FSBL_lto.o |
Read-write data symbols by descending size
| Symbol name |
Size |
Align |
Type |
Bd |
Object File |
extmem_list_config |
172 |
4 |
Zero |
Lc |
blto2_FSBL_lto.o |
sfdp_param_info |
120 |
4 |
Zero |
Lc |
blto2_FSBL_lto.o |
JEDEC_SCCR_Map |
112 |
4 |
Zero |
Lc |
blto2_FSBL_lto.o |
hxspi2 |
100 |
4 |
Zero |
Lc |
blto2_FSBL_lto.o |
JEDEC_Basic |
96 |
4 |
Zero |
Lc |
blto2_FSBL_lto.o |
JEDEC_OctalDdr |
32 |
4 |
Zero |
Lc |
blto2_FSBL_lto.o |
JEDEC_XSPI10 |
24 |
4 |
Zero |
Lc |
blto2_FSBL_lto.o |
JEDEC_Address4Bytes |
8 |
4 |
Zero |
Lc |
blto2_FSBL_lto.o |
JumpToApplication.JumpToApp |
4 |
4 |
Zero |
Lc |
blto2_FSBL_lto.o |
SystemCoreClock |
4 |
4 |
Init |
Lc |
blto2_FSBL_lto.o |
uwTick |
4 |
4 |
Zero |
Lc |
blto2_FSBL_lto.o |
uwTickPrio |
4 |
4 |
Init |
Lc |
blto2_FSBL_lto.o |
uwTickFreq |
1 |
|
Init |
Lc |
blto2_FSBL_lto.o |
Read-only data symbols by name
| Symbol name |
Address |
Size |
Align |
Type |
Bd |
Object File |
SFDP_BuildGenericDriver.block_erase_unit |
0x34192A7E |
8 |
2 |
Cnst |
Lc |
blto2_FSBL_lto.o |
SFDP_BuildGenericDriver.chip_erase_unit |
0x3418C8B0 |
16 |
4 |
Cnst |
Lc |
blto2_FSBL_lto.o |
__SEGGER_init_data__ |
0x34192DC0 |
[12] |
4 |
Cnst |
Lc |
[ Linker created ] |
__SEGGER_init_table__ |
0x34192D9C |
[36] |
4 |
Cnst |
Lc |
[ Linker created ] |
Read-only data symbols by address
| Address |
Symbol name |
Size |
Align |
Type |
Bd |
Object File |
0x3418C8B0 |
SFDP_BuildGenericDriver.chip_erase_unit |
16 |
4 |
Cnst |
Lc |
blto2_FSBL_lto.o |
0x34192A7E |
SFDP_BuildGenericDriver.block_erase_unit |
8 |
2 |
Cnst |
Lc |
blto2_FSBL_lto.o |
0x34192D9C |
__SEGGER_init_table__ |
[36] |
4 |
Cnst |
Lc |
[ Linker created ] |
0x34192DC0 |
__SEGGER_init_data__ |
[12] |
4 |
Cnst |
Lc |
[ Linker created ] |
Untyped symbols by name
| Symbol name |
Value |
Size |
Align |
Type |
Bd |
Object File |
__AHB_RAM1_segment_end__ |
0x38004000 |
|
|
---- |
Gb |
[ Linker created ] |
__AHB_RAM1_segment_size__ |
0x00004000 |
|
|
---- |
Gb |
[ Linker created ] |
__AHB_RAM1_segment_start__ |
0x38000000 |
|
|
---- |
Gb |
[ Linker created ] |
__AHB_RAM1_segment_used_end__ |
0x38000000 |
|
|
---- |
Gb |
[ Linker created ] |
__AHB_RAM1_segment_used_size__ |
0x00000000 |
|
|
---- |
Gb |
[ Linker created ] |
__AHB_RAM1_segment_used_start__ |
0x38000000 |
|
|
---- |
Gb |
[ Linker created ] |
__AHB_RAM2_segment_end__ |
0x38008000 |
|
|
---- |
Gb |
[ Linker created ] |
__AHB_RAM2_segment_size__ |
0x00004000 |
|
|
---- |
Gb |
[ Linker created ] |
__AHB_RAM2_segment_start__ |
0x38004000 |
|
|
---- |
Gb |
[ Linker created ] |
__AHB_RAM2_segment_used_end__ |
0x38004000 |
|
|
---- |
Gb |
[ Linker created ] |
__AHB_RAM2_segment_used_size__ |
0x00000000 |
|
|
---- |
Gb |
[ Linker created ] |
__AHB_RAM2_segment_used_start__ |
0x38004000 |
|
|
---- |
Gb |
[ Linker created ] |
__AXI_RAM1_segment_end__ |
0x34100000 |
|
|
---- |
Gb |
[ Linker created ] |
__AXI_RAM1_segment_size__ |
0x0009C000 |
|
|
---- |
Gb |
[ Linker created ] |
__AXI_RAM1_segment_start__ |
0x34064000 |
|
|
---- |
Gb |
[ Linker created ] |
__AXI_RAM1_segment_used_end__ |
0x34064000 |
|
|
---- |
Gb |
[ Linker created ] |
__AXI_RAM1_segment_used_size__ |
0x00000000 |
|
|
---- |
Gb |
[ Linker created ] |
__AXI_RAM1_segment_used_start__ |
0x34064000 |
|
|
---- |
Gb |
[ Linker created ] |
__AXI_RAM2_segment_end__ |
0x34200000 |
|
|
---- |
Gb |
[ Linker created ] |
__AXI_RAM2_segment_size__ |
0x0007FC00 |
|
|
---- |
Gb |
[ Linker created ] |
__AXI_RAM2_segment_start__ |
0x34180400 |
|
|
---- |
Gb |
[ Linker created ] |
__AXI_RAM2_segment_used_end__ |
0x34192DF2 |
|
|
---- |
Gb |
[ Linker created ] |
__AXI_RAM2_segment_used_size__ |
0x000129F2 |
|
|
---- |
Gb |
[ Linker created ] |
__AXI_RAM2_segment_used_start__ |
0x34180400 |
|
|
---- |
Gb |
[ Linker created ] |
__AXI_RAM3_segment_end__ |
0x34270000 |
|
|
---- |
Gb |
[ Linker created ] |
__AXI_RAM3_segment_size__ |
0x00070000 |
|
|
---- |
Gb |
[ Linker created ] |
__AXI_RAM3_segment_start__ |
0x34200000 |
|
|
---- |
Gb |
[ Linker created ] |
__AXI_RAM3_segment_used_end__ |
0x34200000 |
|
|
---- |
Gb |
[ Linker created ] |
__AXI_RAM3_segment_used_size__ |
0x00000000 |
|
|
---- |
Gb |
[ Linker created ] |
__AXI_RAM3_segment_used_start__ |
0x34200000 |
|
|
---- |
Gb |
[ Linker created ] |
__AXI_RAM4_segment_end__ |
0x342E0000 |
|
|
---- |
Gb |
[ Linker created ] |
__AXI_RAM4_segment_size__ |
0x00070000 |
|
|
---- |
Gb |
[ Linker created ] |
__AXI_RAM4_segment_start__ |
0x34270000 |
|
|
---- |
Gb |
[ Linker created ] |
__AXI_RAM4_segment_used_end__ |
0x34270000 |
|
|
---- |
Gb |
[ Linker created ] |
__AXI_RAM4_segment_used_size__ |
0x00000000 |
|
|
---- |
Gb |
[ Linker created ] |
__AXI_RAM4_segment_used_start__ |
0x34270000 |
|
|
---- |
Gb |
[ Linker created ] |
__AXI_RAM5_segment_end__ |
0x34350000 |
|
|
---- |
Gb |
[ Linker created ] |
__AXI_RAM5_segment_size__ |
0x00070000 |
|
|
---- |
Gb |
[ Linker created ] |
__AXI_RAM5_segment_start__ |
0x342E0000 |
|
|
---- |
Gb |
[ Linker created ] |
__AXI_RAM5_segment_used_end__ |
0x342E0000 |
|
|
---- |
Gb |
[ Linker created ] |
__AXI_RAM5_segment_used_size__ |
0x00000000 |
|
|
---- |
Gb |
[ Linker created ] |
__AXI_RAM5_segment_used_start__ |
0x342E0000 |
|
|
---- |
Gb |
[ Linker created ] |
__AXI_RAM6_segment_end__ |
0x343C0000 |
|
|
---- |
Gb |
[ Linker created ] |
__AXI_RAM6_segment_size__ |
0x00070000 |
|
|
---- |
Gb |
[ Linker created ] |
__AXI_RAM6_segment_start__ |
0x34350000 |
|
|
---- |
Gb |
[ Linker created ] |
__AXI_RAM6_segment_used_end__ |
0x34350000 |
|
|
---- |
Gb |
[ Linker created ] |
__AXI_RAM6_segment_used_size__ |
0x00000000 |
|
|
---- |
Gb |
[ Linker created ] |
__AXI_RAM6_segment_used_start__ |
0x34350000 |
|
|
---- |
Gb |
[ Linker created ] |
__AXI_RAM7_segment_end__ |
0x34400000 |
|
|
---- |
Gb |
[ Linker created ] |
__AXI_RAM7_segment_size__ |
0x00040000 |
|
|
---- |
Gb |
[ Linker created ] |
__AXI_RAM7_segment_start__ |
0x343C0000 |
|
|
---- |
Gb |
[ Linker created ] |
__AXI_RAM7_segment_used_end__ |
0x343C0000 |
|
|
---- |
Gb |
[ Linker created ] |
__AXI_RAM7_segment_used_size__ |
0x00000000 |
|
|
---- |
Gb |
[ Linker created ] |
__AXI_RAM7_segment_used_start__ |
0x343C0000 |
|
|
---- |
Gb |
[ Linker created ] |
__AXI_RAM8_segment_end__ |
0x34420000 |
|
|
---- |
Gb |
[ Linker created ] |
__AXI_RAM8_segment_size__ |
0x00020000 |
|
|
---- |
Gb |
[ Linker created ] |
__AXI_RAM8_segment_start__ |
0x34400000 |
|
|
---- |
Gb |
[ Linker created ] |
__AXI_RAM8_segment_used_end__ |
0x34400000 |
|
|
---- |
Gb |
[ Linker created ] |
__AXI_RAM8_segment_used_size__ |
0x00000000 |
|
|
---- |
Gb |
[ Linker created ] |
__AXI_RAM8_segment_used_start__ |
0x34400000 |
|
|
---- |
Gb |
[ Linker created ] |
__BKP_RAM_segment_end__ |
0x3C002000 |
|
|
---- |
Gb |
[ Linker created ] |
__BKP_RAM_segment_size__ |
0x00002000 |
|
|
---- |
Gb |
[ Linker created ] |
__BKP_RAM_segment_start__ |
0x3C000000 |
|
|
---- |
Gb |
[ Linker created ] |
__BKP_RAM_segment_used_end__ |
0x3C000000 |
|
|
---- |
Gb |
[ Linker created ] |
__BKP_RAM_segment_used_size__ |
0x00000000 |
|
|
---- |
Gb |
[ Linker created ] |
__BKP_RAM_segment_used_start__ |
0x3C000000 |
|
|
---- |
Gb |
[ Linker created ] |
__DTCM_RAM_segment_end__ |
0x30020000 |
|
|
---- |
Gb |
[ Linker created ] |
__DTCM_RAM_segment_size__ |
0x00020000 |
|
|
---- |
Gb |
[ Linker created ] |
__DTCM_RAM_segment_start__ |
0x30000000 |
|
|
---- |
Gb |
[ Linker created ] |
__DTCM_RAM_segment_used_end__ |
0x30000000 |
|
|
---- |
Gb |
[ Linker created ] |
__DTCM_RAM_segment_used_size__ |
0x00000000 |
|
|
---- |
Gb |
[ Linker created ] |
__DTCM_RAM_segment_used_start__ |
0x30000000 |
|
|
---- |
Gb |
[ Linker created ] |
__FLASH_segment_end__ |
0x34200000 |
|
|
---- |
Gb |
[ Linker created ] |
__FLASH_segment_size__ |
0x0007FC00 |
|
|
---- |
Gb |
[ Linker created ] |
__FLASH_segment_start__ |
0x34180400 |
|
|
---- |
Gb |
[ Linker created ] |
__FLASH_segment_used_end__ |
0x34192DF2 |
|
|
---- |
Gb |
[ Linker created ] |
__FLASH_segment_used_size__ |
0x000129F2 |
|
|
---- |
Gb |
[ Linker created ] |
__FLASH_segment_used_start__ |
0x34180400 |
|
|
---- |
Gb |
[ Linker created ] |
__FLEX_RAM_segment_end__ |
0x34064000 |
|
|
---- |
Gb |
[ Linker created ] |
__FLEX_RAM_segment_size__ |
0x00064000 |
|
|
---- |
Gb |
[ Linker created ] |
__FLEX_RAM_segment_start__ |
0x34000000 |
|
|
---- |
Gb |
[ Linker created ] |
__FLEX_RAM_segment_used_end__ |
0x34064000 |
|
|
---- |
Gb |
[ Linker created ] |
__FLEX_RAM_segment_used_size__ |
0x00064000 |
|
|
---- |
Gb |
[ Linker created ] |
__FLEX_RAM_segment_used_start__ |
0x34000000 |
|
|
---- |
Gb |
[ Linker created ] |
__HEAPSIZE__ |
0x00000100 |
|
|
---- |
Gb |
[ Linker created ] |
__ITCM_RAM_segment_end__ |
0x10010000 |
|
|
---- |
Gb |
[ Linker created ] |
__ITCM_RAM_segment_size__ |
0x00010000 |
|
|
---- |
Gb |
[ Linker created ] |
__ITCM_RAM_segment_start__ |
0x10000000 |
|
|
---- |
Gb |
[ Linker created ] |
__ITCM_RAM_segment_used_end__ |
0x10000000 |
|
|
---- |
Gb |
[ Linker created ] |
__ITCM_RAM_segment_used_size__ |
0x00000000 |
|
|
---- |
Gb |
[ Linker created ] |
__ITCM_RAM_segment_used_start__ |
0x10000000 |
|
|
---- |
Gb |
[ Linker created ] |
__RAM_segment_end__ |
0x34064000 |
|
|
---- |
Gb |
[ Linker created ] |
__RAM_segment_size__ |
0x00064000 |
|
|
---- |
Gb |
[ Linker created ] |
__RAM_segment_start__ |
0x34000000 |
|
|
---- |
Gb |
[ Linker created ] |
__RAM_segment_used_end__ |
0x34064000 |
|
|
---- |
Gb |
[ Linker created ] |
__RAM_segment_used_size__ |
0x00064000 |
|
|
---- |
Gb |
[ Linker created ] |
__RAM_segment_used_start__ |
0x34000000 |
|
|
---- |
Gb |
[ Linker created ] |
__STACKSIZE_PROCESS__ |
0x00000000 |
|
|
---- |
Gb |
[ Linker created ] |
__STACKSIZE__ |
0x00002000 |
|
|
---- |
Gb |
[ Linker created ] |
__ctors_end__ |
0x34192C34 |
|
|
---- |
Gb |
[ Linker created ] |
__ctors_start__ |
0x34192C30 |
|
|
---- |
Gb |
[ Linker created ] |
__stack_end__ |
0x34064000 |
|
|
---- |
Gb |
[ Linker created ] |
__stack_start__ |
0x34062000 |
|
|
---- |
Gb |
[ Linker created ] |
__thread_pointer$ |
0x00000000 |
|
|
---- |
Gb |
[ Linker created ] |
_vectors |
0x34180400 |
[844] |
1024 |
Code |
Gb |
stm32n657xx_Vectors.o |
_vectors_end |
0x3418074C |
|
1024 |
Code |
Lc |
stm32n657xx_Vectors.o |
g_pfnVectors |
0x34180400 |
[844] |
1024 |
Code |
Gb |
stm32n657xx_Vectors.o |
Untyped symbols by address
| Value |
Symbol name |
Size |
Align |
Type |
Bd |
Object File |
0x00000000 |
__thread_pointer$ |
|
|
---- |
Gb |
[ Linker created ] |
0x00000000 |
__STACKSIZE_PROCESS__ |
|
|
---- |
Gb |
[ Linker created ] |
0x00000000 |
__ITCM_RAM_segment_used_size__ |
|
|
---- |
Gb |
[ Linker created ] |
0x00000000 |
__DTCM_RAM_segment_used_size__ |
|
|
---- |
Gb |
[ Linker created ] |
0x00000000 |
__BKP_RAM_segment_used_size__ |
|
|
---- |
Gb |
[ Linker created ] |
0x00000000 |
__AXI_RAM8_segment_used_size__ |
|
|
---- |
Gb |
[ Linker created ] |
0x00000000 |
__AXI_RAM7_segment_used_size__ |
|
|
---- |
Gb |
[ Linker created ] |
0x00000000 |
__AXI_RAM6_segment_used_size__ |
|
|
---- |
Gb |
[ Linker created ] |
0x00000000 |
__AXI_RAM5_segment_used_size__ |
|
|
---- |
Gb |
[ Linker created ] |
0x00000000 |
__AXI_RAM4_segment_used_size__ |
|
|
---- |
Gb |
[ Linker created ] |
0x00000000 |
__AXI_RAM3_segment_used_size__ |
|
|
---- |
Gb |
[ Linker created ] |
0x00000000 |
__AXI_RAM1_segment_used_size__ |
|
|
---- |
Gb |
[ Linker created ] |
0x00000000 |
__AHB_RAM2_segment_used_size__ |
|
|
---- |
Gb |
[ Linker created ] |
0x00000000 |
__AHB_RAM1_segment_used_size__ |
|
|
---- |
Gb |
[ Linker created ] |
0x00000100 |
__HEAPSIZE__ |
|
|
---- |
Gb |
[ Linker created ] |
0x00002000 |
__STACKSIZE__ |
|
|
---- |
Gb |
[ Linker created ] |
0x00002000 |
__BKP_RAM_segment_size__ |
|
|
---- |
Gb |
[ Linker created ] |
0x00004000 |
__AHB_RAM2_segment_size__ |
|
|
---- |
Gb |
[ Linker created ] |
0x00004000 |
__AHB_RAM1_segment_size__ |
|
|
---- |
Gb |
[ Linker created ] |
0x00010000 |
__ITCM_RAM_segment_size__ |
|
|
---- |
Gb |
[ Linker created ] |
0x000129F2 |
__FLASH_segment_used_size__ |
|
|
---- |
Gb |
[ Linker created ] |
0x000129F2 |
__AXI_RAM2_segment_used_size__ |
|
|
---- |
Gb |
[ Linker created ] |
0x00020000 |
__DTCM_RAM_segment_size__ |
|
|
---- |
Gb |
[ Linker created ] |
0x00020000 |
__AXI_RAM8_segment_size__ |
|
|
---- |
Gb |
[ Linker created ] |
0x00040000 |
__AXI_RAM7_segment_size__ |
|
|
---- |
Gb |
[ Linker created ] |
0x00064000 |
__RAM_segment_used_size__ |
|
|
---- |
Gb |
[ Linker created ] |
0x00064000 |
__RAM_segment_size__ |
|
|
---- |
Gb |
[ Linker created ] |
0x00064000 |
__FLEX_RAM_segment_used_size__ |
|
|
---- |
Gb |
[ Linker created ] |
0x00064000 |
__FLEX_RAM_segment_size__ |
|
|
---- |
Gb |
[ Linker created ] |
0x00070000 |
__AXI_RAM6_segment_size__ |
|
|
---- |
Gb |
[ Linker created ] |
0x00070000 |
__AXI_RAM5_segment_size__ |
|
|
---- |
Gb |
[ Linker created ] |
0x00070000 |
__AXI_RAM4_segment_size__ |
|
|
---- |
Gb |
[ Linker created ] |
0x00070000 |
__AXI_RAM3_segment_size__ |
|
|
---- |
Gb |
[ Linker created ] |
0x0007FC00 |
__FLASH_segment_size__ |
|
|
---- |
Gb |
[ Linker created ] |
0x0007FC00 |
__AXI_RAM2_segment_size__ |
|
|
---- |
Gb |
[ Linker created ] |
0x0009C000 |
__AXI_RAM1_segment_size__ |
|
|
---- |
Gb |
[ Linker created ] |
0x10000000 |
__ITCM_RAM_segment_used_start__ |
|
|
---- |
Gb |
[ Linker created ] |
0x10000000 |
__ITCM_RAM_segment_used_end__ |
|
|
---- |
Gb |
[ Linker created ] |
0x10000000 |
__ITCM_RAM_segment_start__ |
|
|
---- |
Gb |
[ Linker created ] |
0x10010000 |
__ITCM_RAM_segment_end__ |
|
|
---- |
Gb |
[ Linker created ] |
0x30000000 |
__DTCM_RAM_segment_used_start__ |
|
|
---- |
Gb |
[ Linker created ] |
0x30000000 |
__DTCM_RAM_segment_used_end__ |
|
|
---- |
Gb |
[ Linker created ] |
0x30000000 |
__DTCM_RAM_segment_start__ |
|
|
---- |
Gb |
[ Linker created ] |
0x30020000 |
__DTCM_RAM_segment_end__ |
|
|
---- |
Gb |
[ Linker created ] |
0x34000000 |
__RAM_segment_used_start__ |
|
|
---- |
Gb |
[ Linker created ] |
0x34000000 |
__RAM_segment_start__ |
|
|
---- |
Gb |
[ Linker created ] |
0x34000000 |
__FLEX_RAM_segment_used_start__ |
|
|
---- |
Gb |
[ Linker created ] |
0x34000000 |
__FLEX_RAM_segment_start__ |
|
|
---- |
Gb |
[ Linker created ] |
0x34062000 |
__stack_start__ |
|
|
---- |
Gb |
[ Linker created ] |
0x34064000 |
__stack_end__ |
|
|
---- |
Gb |
[ Linker created ] |
0x34064000 |
__RAM_segment_used_end__ |
|
|
---- |
Gb |
[ Linker created ] |
0x34064000 |
__RAM_segment_end__ |
|
|
---- |
Gb |
[ Linker created ] |
0x34064000 |
__FLEX_RAM_segment_used_end__ |
|
|
---- |
Gb |
[ Linker created ] |
0x34064000 |
__FLEX_RAM_segment_end__ |
|
|
---- |
Gb |
[ Linker created ] |
0x34064000 |
__AXI_RAM1_segment_used_start__ |
|
|
---- |
Gb |
[ Linker created ] |
0x34064000 |
__AXI_RAM1_segment_used_end__ |
|
|
---- |
Gb |
[ Linker created ] |
0x34064000 |
__AXI_RAM1_segment_start__ |
|
|
---- |
Gb |
[ Linker created ] |
0x34100000 |
__AXI_RAM1_segment_end__ |
|
|
---- |
Gb |
[ Linker created ] |
0x34180400 |
g_pfnVectors |
[844] |
1024 |
Code |
Gb |
stm32n657xx_Vectors.o |
0x34180400 |
_vectors |
[844] |
1024 |
Code |
Gb |
stm32n657xx_Vectors.o |
0x34180400 |
__FLASH_segment_used_start__ |
|
|
---- |
Gb |
[ Linker created ] |
0x34180400 |
__FLASH_segment_start__ |
|
|
---- |
Gb |
[ Linker created ] |
0x34180400 |
__AXI_RAM2_segment_used_start__ |
|
|
---- |
Gb |
[ Linker created ] |
0x34180400 |
__AXI_RAM2_segment_start__ |
|
|
---- |
Gb |
[ Linker created ] |
0x3418074C |
_vectors_end |
|
1024 |
Code |
Lc |
stm32n657xx_Vectors.o |
0x34192C30 |
__ctors_start__ |
|
|
---- |
Gb |
[ Linker created ] |
0x34192C34 |
__ctors_end__ |
|
|
---- |
Gb |
[ Linker created ] |
0x34192DF2 |
__FLASH_segment_used_end__ |
|
|
---- |
Gb |
[ Linker created ] |
0x34192DF2 |
__AXI_RAM2_segment_used_end__ |
|
|
---- |
Gb |
[ Linker created ] |
0x34200000 |
__FLASH_segment_end__ |
|
|
---- |
Gb |
[ Linker created ] |
0x34200000 |
__AXI_RAM3_segment_used_start__ |
|
|
---- |
Gb |
[ Linker created ] |
0x34200000 |
__AXI_RAM3_segment_used_end__ |
|
|
---- |
Gb |
[ Linker created ] |
0x34200000 |
__AXI_RAM3_segment_start__ |
|
|
---- |
Gb |
[ Linker created ] |
0x34200000 |
__AXI_RAM2_segment_end__ |
|
|
---- |
Gb |
[ Linker created ] |
0x34270000 |
__AXI_RAM4_segment_used_start__ |
|
|
---- |
Gb |
[ Linker created ] |
0x34270000 |
__AXI_RAM4_segment_used_end__ |
|
|
---- |
Gb |
[ Linker created ] |
0x34270000 |
__AXI_RAM4_segment_start__ |
|
|
---- |
Gb |
[ Linker created ] |
0x34270000 |
__AXI_RAM3_segment_end__ |
|
|
---- |
Gb |
[ Linker created ] |
0x342E0000 |
__AXI_RAM5_segment_used_start__ |
|
|
---- |
Gb |
[ Linker created ] |
0x342E0000 |
__AXI_RAM5_segment_used_end__ |
|
|
---- |
Gb |
[ Linker created ] |
0x342E0000 |
__AXI_RAM5_segment_start__ |
|
|
---- |
Gb |
[ Linker created ] |
0x342E0000 |
__AXI_RAM4_segment_end__ |
|
|
---- |
Gb |
[ Linker created ] |
0x34350000 |
__AXI_RAM6_segment_used_start__ |
|
|
---- |
Gb |
[ Linker created ] |
0x34350000 |
__AXI_RAM6_segment_used_end__ |
|
|
---- |
Gb |
[ Linker created ] |
0x34350000 |
__AXI_RAM6_segment_start__ |
|
|
---- |
Gb |
[ Linker created ] |
0x34350000 |
__AXI_RAM5_segment_end__ |
|
|
---- |
Gb |
[ Linker created ] |
0x343C0000 |
__AXI_RAM7_segment_used_start__ |
|
|
---- |
Gb |
[ Linker created ] |
0x343C0000 |
__AXI_RAM7_segment_used_end__ |
|
|
---- |
Gb |
[ Linker created ] |
0x343C0000 |
__AXI_RAM7_segment_start__ |
|
|
---- |
Gb |
[ Linker created ] |
0x343C0000 |
__AXI_RAM6_segment_end__ |
|
|
---- |
Gb |
[ Linker created ] |
0x34400000 |
__AXI_RAM8_segment_used_start__ |
|
|
---- |
Gb |
[ Linker created ] |
0x34400000 |
__AXI_RAM8_segment_used_end__ |
|
|
---- |
Gb |
[ Linker created ] |
0x34400000 |
__AXI_RAM8_segment_start__ |
|
|
---- |
Gb |
[ Linker created ] |
0x34400000 |
__AXI_RAM7_segment_end__ |
|
|
---- |
Gb |
[ Linker created ] |
0x34420000 |
__AXI_RAM8_segment_end__ |
|
|
---- |
Gb |
[ Linker created ] |
0x38000000 |
__AHB_RAM1_segment_used_start__ |
|
|
---- |
Gb |
[ Linker created ] |
0x38000000 |
__AHB_RAM1_segment_used_end__ |
|
|
---- |
Gb |
[ Linker created ] |
0x38000000 |
__AHB_RAM1_segment_start__ |
|
|
---- |
Gb |
[ Linker created ] |
0x38004000 |
__AHB_RAM2_segment_used_start__ |
|
|
---- |
Gb |
[ Linker created ] |
0x38004000 |
__AHB_RAM2_segment_used_end__ |
|
|
---- |
Gb |
[ Linker created ] |
0x38004000 |
__AHB_RAM2_segment_start__ |
|
|
---- |
Gb |
[ Linker created ] |
0x38004000 |
__AHB_RAM1_segment_end__ |
|
|
---- |
Gb |
[ Linker created ] |
0x38008000 |
__AHB_RAM2_segment_end__ |
|
|
---- |
Gb |
[ Linker created ] |
0x3C000000 |
__BKP_RAM_segment_used_start__ |
|
|
---- |
Gb |
[ Linker created ] |
0x3C000000 |
__BKP_RAM_segment_used_end__ |
|
|
---- |
Gb |
[ Linker created ] |
0x3C000000 |
__BKP_RAM_segment_start__ |
|
|
---- |
Gb |
[ Linker created ] |
0x3C002000 |
__BKP_RAM_segment_end__ |
|
|
---- |
Gb |
[ Linker created ] |
REGION LIST
Regions by name
| Name |
Range |
Size |
AHB_RAM1 |
38000000-38003FFF |
16 384 |
AHB_RAM2 |
38004000-38007FFF |
16 384 |
AXI_RAM1 |
34064000-340FFFFF |
638 976 |
AXI_RAM2 |
34180400-341FFFFF |
523 264 |
AXI_RAM3 |
34200000-3426FFFF |
458 752 |
AXI_RAM4 |
34270000-342DFFFF |
458 752 |
AXI_RAM5 |
342E0000-3434FFFF |
458 752 |
AXI_RAM6 |
34350000-343BFFFF |
458 752 |
AXI_RAM7 |
343C0000-343FFFFF |
262 144 |
AXI_RAM8 |
34400000-3441FFFF |
131 072 |
BKP_RAM |
3C000000-3C001FFF |
8 192 |
DTCM_RAM |
30000000-3001FFFF |
131 072 |
FLASH |
34180400-341FFFFF |
523 264 |
FLEX_RAM |
34000000-34063FFF |
409 600 |
ITCM_RAM |
10000000-1000FFFF |
65 536 |
RAM |
34000000-34063FFF |
409 600 |
Analysis
AXI_RAM2:
Identical to region FLASH
FLASH:
Identical to region AXI_RAM2
FLEX_RAM:
Identical to region RAM
RAM:
Identical to region FLEX_RAM
BLOCK LIST
Blocks by name
| Name |
Range |
Size |
Ordering |
ctors |
34192C30-34192C33 |
4 |
Auto |
stack |
34062000-34063FFF |
8 192 |
Auto |
Blocks by address
| Range |
Size |
Name |
Ordering |
34062000-34063FFF |
8 192 |
stack |
Auto |
34192C30-34192C33 |
4 |
ctors |
Auto |
STACK SIZES
Functions by stack size
| Function name |
Stack |
Object File |
MX_BSEC_Init
HAL_RCCEx_GetPeriphCLKFreq
EXTMEM_Init
MX_EXTMEM_MANAGER_Init
MX_GPIO_Init
LL_AHB4_GRP1_EnableClock
HAL_GPIO_WritePin
HAL_GPIO_Init
HAL_Init
SystemClock_Config
OTP_Config
Error_Handler
MX_XSPI2_Init
HAL_Delay
BOOT_Application
HAL_PWREx_ConfigSupply
HAL_PWREx_ControlVoltageScaling
HAL_RCC_OscConfig
HAL_RCC_GetClockConfig
HAL_RCC_ClockConfig
LL_APB4_GRP2_EnableClock
HAL_BSEC_OTP_Read
HAL_BSEC_OTP_Program
assert_failed
HAL_MspInit
HAL_PWREx_EnableVddIO3
HAL_IncTick
HAL_XSPI_Init
HAL_XSPIM_Config
HAL_XSPI_MspInit
LL_APB4_GRP2_EnableClock.5
LL_AHB4_GRP1_EnableClock.6
HAL_PWREx_ConfigVddIORange
HAL_RCCEx_PeriphCLKConfig
LL_AHB5_GRP1_EnableClock
HAL_NVIC_SetPriorityGrouping
HAL_InitTick
HAL_SYSTICK_Config
HAL_NVIC_SetPriority
HAL_GetTick
HAL_SuspendTick
HAL_BSEC_OTP_Reload
__NVIC_SetPriorityGrouping
__NVIC_GetPriorityGrouping
NVIC_EncodePriority
__NVIC_SetPriority
SysTick_Config
HAL_DMA_Abort
LL_RCC_HSI_SetDivider
LL_RCC_HSI_Enable
LL_RCC_HSI_IsReady
LL_RCC_GetCpuClkSource
LL_RCC_GetSysClkSource
LL_RCC_PLL1_GetSource
LL_RCC_PLL2_GetSource
LL_RCC_PLL3_GetSource
LL_RCC_PLL4_GetSource
LL_RCC_HSI_SetCalibTrimming
LL_RCC_HSI_Disable
LL_RCC_MSI_SetCalibTrimming
LL_RCC_MSI_SetFrequency
LL_RCC_MSI_Enable
LL_RCC_MSI_IsReady
LL_RCC_MSI_Disable
LL_RCC_LSI_Enable
LL_RCC_LSI_IsReady
LL_RCC_LSI_Disable
LL_RCC_LSE_IsReady
RCC_PLL_IsNewConfig
LL_RCC_PLL1_IsReady
LL_RCC_IC1_GetSource
LL_RCC_IC2_GetSource
LL_RCC_IC6_GetSource
LL_RCC_IC11_GetSource
RCC_PLL_Config
RCC_PLL_Enable
LL_RCC_PLL2_IsReady
LL_RCC_PLL3_IsReady
LL_RCC_PLL4_IsReady
RCC_PLL_Source_IsReady
LL_RCC_HSE_IsReady
RCC_IC_CheckPLLSources
LL_RCC_IC1_Enable
HAL_RCC_GetCpuClockFreq
LL_RCC_PLL1_IsEnabledBypass
LL_RCC_PLL2_IsEnabledBypass
LL_RCC_PLL3_IsEnabledBypass
LL_RCC_PLL4_IsEnabledBypass
LL_RCC_HSI_GetDivider
LL_RCC_IC1_GetDivider
HAL_RCCEx_GetPLL1CLKFreq
HAL_RCCEx_GetPLL2CLKFreq
HAL_RCCEx_GetPLL3CLKFreq
HAL_RCCEx_GetPLL4CLKFreq
HAL_RCC_GetSysClockFreq
LL_RCC_IC2_GetDivider
RCC_GetSysClockFreq
LL_RCC_GetRTCClockSource
LL_RCC_LSE_IsReady.56
LL_RCC_SetRTC_HSEPrescaler
LL_RCC_SetRTCClockSource
LL_RCC_IC5_Enable.57
LL_RCC_IC10_Enable.58
LL_RCC_IC15_Enable.59
LL_RCC_IC19_Enable
LL_RCC_IC20_Enable.60
LL_RCC_SetCLKPClockSource
LL_RCC_IC3_Enable
LL_RCC_IC4_Enable
LL_RCC_CLKP_Enable
LL_RCC_SetXSPIClockSource
LL_RCC_SetFMCClockSource
LL_RCC_SetSDMMCClockSource
LL_RCC_IC7_Enable
LL_RCC_IC8_Enable
LL_RCC_SetADFClockSource
LL_RCC_IC18_Enable
LL_RCC_IC17_Enable
LL_RCC_SetDCMIPPClockSource
LL_RCC_IC12_Enable
LL_RCC_SetETHClockSource
LL_RCC_SetETHPHYInterface
LL_RCC_SetETHREFRXClockSource
LL_RCC_SetETHREFTXClockSource
LL_RCC_IC13_Enable
LL_RCC_SetFDCANClockSource
LL_RCC_SetI2CClockSource
LL_RCC_SetI3CClockSource
LL_RCC_SetLPTIMClockSource
LL_RCC_IC9_Enable
LL_RCC_IC14_Enable
LL_RCC_SetLPUARTClockSource
LL_RCC_IC16_Enable
LL_RCC_SetLTDCClockSource
LL_RCC_SetMDFClockSource
LL_RCC_SetPSSIClockSource
LL_RCC_SetSAIClockSource
LL_RCC_SetSPDIFRXClockSource
LL_RCC_SetSPIClockSource
LL_RCC_SetUSARTClockSource
LL_RCC_SetOTGPHYClockSource
LL_RCC_HSE_SelectHSEDiv2AsDiv2Clock
LL_RCC_HSE_SelectHSEAsDiv2Clock
LL_RCC_SetOTGPHYCKREFClockSource
LL_RCC_SetTIMPrescaler
LL_RCC_SetClockSource
LL_RCC_GetADCClockSource
LL_RCC_GetADCPrescaler
LL_RCC_GetADFClockSource
LL_RCC_GetCLKPClockSource
LL_RCC_GetDCMIPPClockSource
LL_RCC_GetETHClockSource
LL_RCC_GetETHPTPClockSource
LL_RCC_GetETH1PTPDivider
LL_RCC_GetFDCANClockSource
LL_RCC_GetFMCClockSource
LL_RCC_GetI2CClockSource
LL_RCC_GetI3CClockSource
LL_RCC_GetLPTIMClockSource
LL_RCC_GetLPUARTClockSource
LL_RCC_GetLTDCClockSource
LL_RCC_GetMDFClockSource
LL_RCC_GetPSSIClockSource
LL_RCC_GetSAIClockSource
LL_RCC_GetSDMMCClockSource
LL_RCC_GetSPDIFRXClockSource
LL_RCC_GetSPIClockSource
LL_RCC_GetTIMPrescaler
LL_RCC_GetUSARTClockSource
LL_RCC_HSE_IsSelectedHSEDiv2AsDiv2Clock
LL_RCC_GetXSPIClockSource
LL_RCC_GetClockSource
RCCEx_GetADCCLKFreq
RCCEx_GetADFCLKFreq
RCCEx_GetCSICLKFreq
RCCEx_GetCLKPCLKFreq
RCCEx_GetDCMIPPCLKFreq
RCCEx_GetETH1CLKFreq
RCCEx_GetETH1PTPCLKFreq
RCCEx_GetFDCANCLKFreq
RCCEx_GetFMCCLKFreq
RCCEx_GetI2CCLKFreq
RCCEx_GetI3CCLKFreq
RCCEx_GetLPTIMCLKFreq
RCCEx_GetLPUARTCLKFreq
RCCEx_GetLTDCCLKFreq
RCCEx_GetMDFCLKFreq
RCCEx_GetPSSICLKFreq
RCCEx_GetRTCCLKFreq
RCCEx_GetSAICLKFreq
RCCEx_GetSDMMCCLKFreq
RCCEx_GetSPDIFRXCLKFreq
RCCEx_GetSPICLKFreq
RCCEx_GetUSARTCLKFreq
RCCEx_GetUARTCLKFreq
RCCEx_GetOTGPHYCLKFreq
RCCEx_GetOTGPHYCKREFCLKFreq
RCCEx_GetXSPICLKFreq
RCCEx_GetHCLKFreq
LL_RCC_IC7_IsEnabled
LL_RCC_IC7_GetDivider
LL_RCC_IC7_GetSource
LL_RCC_IC8_IsEnabled
LL_RCC_IC8_GetDivider
LL_RCC_IC8_GetSource
LL_RCC_HSI_IsReady.74
LL_RCC_HSI_GetDivider.75
LL_RCC_MSI_IsReady.76
LL_RCC_IC18_IsEnabled
LL_RCC_IC18_GetDivider
LL_RCC_IC18_GetSource
LL_RCC_CLKP_IsEnabled
LL_RCC_HSE_IsReady.77
LL_RCC_IC5_IsEnabled
LL_RCC_IC5_GetDivider
LL_RCC_IC5_GetSource
LL_RCC_IC10_IsEnabled
LL_RCC_IC10_GetDivider
LL_RCC_IC10_GetSource
LL_RCC_IC15_IsEnabled
LL_RCC_IC15_GetDivider
LL_RCC_IC15_GetSource
LL_RCC_IC19_IsEnabled
LL_RCC_IC19_GetDivider
LL_RCC_IC19_GetSource
LL_RCC_IC20_IsEnabled
LL_RCC_IC20_GetDivider
LL_RCC_IC20_GetSource
RCCEx_GetPCLK5Freq
LL_RCC_IC17_IsEnabled
LL_RCC_IC17_GetDivider
LL_RCC_IC17_GetSource
LL_RCC_IC12_IsEnabled
LL_RCC_IC12_GetDivider
LL_RCC_IC12_GetSource
LL_RCC_IC13_IsEnabled
LL_RCC_IC13_GetDivider
LL_RCC_IC13_GetSource
RCCEx_GetPCLK1Freq
LL_RCC_IC3_IsEnabled
LL_RCC_IC3_GetDivider
LL_RCC_IC3_GetSource
LL_RCC_IC4_IsEnabled
LL_RCC_IC4_GetDivider
LL_RCC_IC4_GetSource
RCCEx_GetPCLK4Freq
LL_RCC_LSI_IsReady.91
LL_RCC_IC9_IsEnabled
LL_RCC_IC9_GetDivider
LL_RCC_IC9_GetSource
LL_RCC_IC14_IsEnabled
LL_RCC_IC14_GetDivider
LL_RCC_IC14_GetSource
LL_RCC_IC16_IsEnabled
LL_RCC_IC16_GetDivider
LL_RCC_IC16_GetSource
RCCEx_GetPCLK2Freq
LL_RCC_GetUARTClockSource
LL_RCC_GetUSBClockSource
LL_RCC_GetAHBPrescaler.87
LL_RCC_PLL1_IsReady.84
LL_RCC_PLL1P_IsEnabled
LL_RCC_PLL1_GetSource.85
RCCEx_GetPLLSourceFreq
LL_RCC_PLL1_GetM
LL_RCC_PLL1_GetN
LL_RCC_PLL1_GetFRACN
LL_RCC_PLL1_GetP1
LL_RCC_PLL1_GetP2
RCCEx_CalcPLLFreq
LL_RCC_PLL1_IsEnabledBypass.86
LL_RCC_PLL2_IsReady.81
LL_RCC_PLL2P_IsEnabled
LL_RCC_PLL2_GetSource.82
LL_RCC_PLL2_GetM
LL_RCC_PLL2_GetN
LL_RCC_PLL2_GetFRACN
LL_RCC_PLL2_GetP1
LL_RCC_PLL2_GetP2
LL_RCC_PLL2_IsEnabledBypass.83
LL_RCC_PLL3_IsReady.78
LL_RCC_PLL3P_IsEnabled
LL_RCC_PLL3_GetSource.79
LL_RCC_PLL3_GetM
LL_RCC_PLL3_GetN
LL_RCC_PLL3_GetFRACN
LL_RCC_PLL3_GetP1
LL_RCC_PLL3_GetP2
LL_RCC_PLL3_IsEnabledBypass.80
LL_RCC_PLL4_IsReady.71
LL_RCC_PLL4P_IsEnabled
LL_RCC_PLL4_GetSource.72
LL_RCC_PLL4_GetM
LL_RCC_PLL4_GetN
LL_RCC_PLL4_GetFRACN
LL_RCC_PLL4_GetP1
LL_RCC_PLL4_GetP2
LL_RCC_PLL4_IsEnabledBypass.73
LL_RCC_MSI_GetFrequency
LL_RCC_GetAPB1Prescaler.89
LL_RCC_GetAPB2Prescaler.88
LL_RCC_GetAPB4Prescaler.90
LL_RCC_GetAPB5Prescaler.92
HAL_XSPI_SetTimeout
XSPI_WaitFlagStateUntilTimeout
HAL_XSPI_Command
XSPI_ConfigCmd
HAL_XSPI_Transmit
HAL_XSPI_Receive
HAL_XSPI_AutoPolling
HAL_XSPI_MemoryMapped
HAL_XSPI_Abort
XSPIM_GetConfig
LL_AHB5_GRP1_IsEnabledClock
MapMemory
JumpToApplication
EXTMEM_MemoryMappedMode
EXTMEM_DeInit
EXTMEM_GetMapAddress
SFDP_ReadHeader
SAL_XSPI_GetSFDP
CheckSFDP_Signature
SAL_XSPI_UpdateMemoryType
SFDP_GetHeader
SAL_XSPI_MemoryConfig
SFDP_CollectData
sfdp_get_paraminfo
SFDP_MemoryReset
SAL_XSPI_CommandSendData
SFDP_BuildGenericDriver
JEDEC_Basic_Manage4S4S4SEnableSequence
JEDEC_Basic_ManageQuadEnableRequirement
sfdp_enter_octal_mode
driver_check_FlagBUSY
SAL_XSPI_CheckStatusRegister
sfdp_getfrequencevalue
SAL_XSPI_SetClock
sfdp_set_dummycycle
SAL_XSPI_SendReadCommand
SAL_XSPI_Abort
SAL_XSPI_CommandSendReadAddress
SAL_XSPI_Write
EXTMEM_DRIVER_NOR_SFDP_Init
SAL_XSPI_Init
SAL_XSPI_DisableMapMode
SAL_XSPI_GetId
EXTMEM_DRIVER_NOR_SFDP_DeInit
EXTMEM_DRIVER_NOR_SFDP_Enable_MemoryMappedMode
EXTMEM_DRIVER_NOR_SFDP_Disable_MemoryMappedMode
SAL_XSPI_EnableMapMode
XSPI_FormatCommand
XSPI_Transmit
main
NMI_Handler
HardFault_Handler
MemManage_Handler
BusFault_Handler
UsageFault_Handler
SVC_Handler
DebugMon_Handler
PendSV_Handler
SysTick_Handler
SystemInit
SystemCoreClockUpdate
_start
__SEGGER_init_done
__startup_complete
exit
PVD_PVM_IRQHandler
DTS_IRQHandler
RCC_IRQHandler
LOCKUP_IRQHandler
CACHE_ECC_IRQHandler
TCM_ECC_IRQHandler
BCK_ECC_IRQHandler
FPU_IRQHandler
RTC_S_IRQHandler
TAMP_IRQHandler
RIFSC_TAMPER_IRQHandler
IAC_IRQHandler
RCC_S_IRQHandler
RTC_IRQHandler
IWDG_IRQHandler
WWDG_IRQHandler
EXTI0_IRQHandler
EXTI1_IRQHandler
EXTI2_IRQHandler
EXTI3_IRQHandler
EXTI4_IRQHandler
EXTI5_IRQHandler
EXTI6_IRQHandler
EXTI7_IRQHandler
EXTI8_IRQHandler
EXTI9_IRQHandler
EXTI10_IRQHandler
EXTI11_IRQHandler
EXTI12_IRQHandler
EXTI13_IRQHandler
EXTI14_IRQHandler
EXTI15_IRQHandler
SAES_IRQHandler
CRYP_IRQHandler
PKA_IRQHandler
HASH_IRQHandler
RNG_IRQHandler
MCE1_IRQHandler
MCE2_IRQHandler
MCE3_IRQHandler
MCE4_IRQHandler
ADC1_2_IRQHandler
CSI_IRQHandler
DCMIPP_IRQHandler
PAHB_ERR_IRQHandler
NPU0_IRQHandler
NPU1_IRQHandler
NPU2_IRQHandler
NPU3_IRQHandler
CACHEAXI_IRQHandler
LTDC_LO_IRQHandler
LTDC_LO_ERR_IRQHandler
DMA2D_IRQHandler
JPEG_IRQHandler
VENC_IRQHandler
GFXMMU_IRQHandler
GFXTIM_IRQHandler
GPU2D_IRQHandler
GPU2D_ER_IRQHandler
ICACHE_IRQHandler
HPDMA1_Channel0_IRQHandler
HPDMA1_Channel1_IRQHandler
HPDMA1_Channel2_IRQHandler
HPDMA1_Channel3_IRQHandler
HPDMA1_Channel4_IRQHandler
HPDMA1_Channel5_IRQHandler
HPDMA1_Channel6_IRQHandler
HPDMA1_Channel7_IRQHandler
HPDMA1_Channel8_IRQHandler
HPDMA1_Channel9_IRQHandler
HPDMA1_Channel10_IRQHandler
HPDMA1_Channel11_IRQHandler
HPDMA1_Channel12_IRQHandler
HPDMA1_Channel13_IRQHandler
HPDMA1_Channel14_IRQHandler
HPDMA1_Channel15_IRQHandler
GPDMA1_Channel0_IRQHandler
GPDMA1_Channel1_IRQHandler
GPDMA1_Channel2_IRQHandler
GPDMA1_Channel3_IRQHandler
GPDMA1_Channel4_IRQHandler
GPDMA1_Channel5_IRQHandler
GPDMA1_Channel6_IRQHandler
GPDMA1_Channel7_IRQHandler
GPDMA1_Channel8_IRQHandler
GPDMA1_Channel9_IRQHandler
GPDMA1_Channel10_IRQHandler
GPDMA1_Channel11_IRQHandler
GPDMA1_Channel12_IRQHandler
GPDMA1_Channel13_IRQHandler
GPDMA1_Channel14_IRQHandler
GPDMA1_Channel15_IRQHandler
I2C1_EV_IRQHandler
I2C1_ER_IRQHandler
I2C2_EV_IRQHandler
I2C2_ER_IRQHandler
I2C3_EV_IRQHandler
I2C3_ER_IRQHandler
I2C4_EV_IRQHandler
I2C4_ER_IRQHandler
I3C1_EV_IRQHandler
I3C1_ER_IRQHandler
I3C2_EV_IRQHandler
I3C2_ER_IRQHandler
TIM1_BRK_IRQHandler
TIM1_UP_IRQHandler
TIM1_TRG_CCU_IRQHandler
TIM1_CC_IRQHandler
TIM2_IRQHandler
TIM3_IRQHandler
TIM4_IRQHandler
TIM5_IRQHandler
TIM6_IRQHandler
TIM7_IRQHandler
TIM8_BRK_IRQHandler
TIM8_UP_IRQHandler
TIM8_TRG_CCU_IRQHandler
TIM8_CC_IRQHandler
TIM9_IRQHandler
TIM10_IRQHandler
TIM11_IRQHandler
TIM12_IRQHandler
TIM13_IRQHandler
TIM14_IRQHandler
TIM15_IRQHandler
TIM16_IRQHandler
TIM17_IRQHandler
TIM18_IRQHandler
LPTIM1_IRQHandler
LPTIM2_IRQHandler
LPTIM3_IRQHandler
LPTIM4_IRQHandler
LPTIM5_IRQHandler
ADF1_FLT0_IRQHandler
MDF1_FLT0_IRQHandler
MDF1_FLT1_IRQHandler
MDF1_FLT2_IRQHandler
MDF1_FLT3_IRQHandler
MDF1_FLT4_IRQHandler
MDF1_FLT5_IRQHandler
SAI1_A_IRQHandler
SAI1_B_IRQHandler
SAI2_A_IRQHandler
SAI2_B_IRQHandler
SPDIFRX_IRQHandler
SPI1_IRQHandler
SPI2_IRQHandler
SPI3_IRQHandler
SPI4_IRQHandler
SPI5_IRQHandler
SPI6_IRQHandler
USART1_IRQHandler
USART2_IRQHandler
USART3_IRQHandler
UART4_IRQHandler
UART5_IRQHandler
USART6_IRQHandler
UART7_IRQHandler
UART8_IRQHandler
UART9_IRQHandler
USART10_IRQHandler
LPUART1_IRQHandler
XSPI1_IRQHandler
XSPI2_IRQHandler
XSPI3_IRQHandler
FMC_IRQHandler
SDMMC1_IRQHandler
SDMMC2_IRQHandler
UCPD1_IRQHandler
USB1_OTG_HS_IRQHandler
USB2_OTG_HS_IRQHandler
ETH1_IRQHandler
FDCAN1_IT0_IRQHandler
FDCAN1_IT1_IRQHandler
FDCAN2_IT0_IRQHandler
FDCAN2_IT1_IRQHandler
FDCAN3_IT0_IRQHandler
FDCAN3_IT1_IRQHandler
FDCAN_CU_IRQHandler
MDIOS_IRQHandler
DCMI_PSSI_IRQHandler
WAKEUP_PIN_IRQHandler
CTI_INT0_IRQHandler
CTI_INT1_IRQHandler
LTDC_UP_IRQHandler
LTDC_UP_ERR_IRQHandler
reset_handler
Reset_Handler
__SEGGER_init_zero
__SEGGER_init_copy
__SEGGER_init_ctors
memcpy
__aeabi_memcpy
__aeabi_memcpy4
__aeabi_memcpy8
__aeabi_memclr
__aeabi_memclr8
__aeabi_memclr4
__aeabi_memset8
__aeabi_memset4
__aeabi_memset
memset
No unused object files
ABSOLUTE LISTING
Section .bss.extmem_list_config from blto2_FSBL_lto.o, size=172, align=4
extmem_list_config:
0x34000000: 01 DC.B 0x01 ; '\x01'
0x34000001: 11 DC.B 0x11 ; '\x11'
0x34000002: 01 DC.B 0x01 ; '\x01'
0x34000003: 25 DC.B 0x25 ; '%'
0x34000004: 0E DC.B 0x0E ; '\x0E'
0x34000005: 13 DC.B 0x13 ; '\x13'
0x34000006: 05 DC.B 0x05 ; '\x05'
0x34000007: 03 DC.B 0x03 ; '\x03'
0x34000008: 0E DC.B 0x0E ; '\x0E'
0x34000009: 10 DC.B 0x10 ; '\x10'
0x3400000A: 17 DC.B 0x17 ; '\x17'
0x3400000B: B4 DC.B 0xB4 ; '\xB4'
0x3400000C: 42 DC.B 0x42 ; 'B'
0x3400000D: 19 DC.B 0x19 ; '\x19'
0x3400000E: 11 DC.B 0x11 ; '\x11'
0x3400000F: 01 DC.B 0x01 ; '\x01'
0x34000010: 12 DC.B 0x12 ; '\x12'
0x34000011: 06 DC.B 0x06 ; '\x06'
0x34000012: 43 DC.B 0x43 ; 'C'
0x34000013: 17 DC.B 0x17 ; '\x17'
0x34000014: 00 DC.B 0x00 ; '\0'
0x34000015: 00 DC.B 0x00 ; '\0'
0x34000016: 02 DC.B 0x02 ; '\x02'
0x34000017: 2E DC.B 0x2E ; '.'
0x34000018: 00 DC.B 0x00 ; '\0'
0x34000019: 11 DC.B 0x11 ; '\x11'
0x3400001A: 01 DC.B 0x01 ; '\x01'
0x3400001B: 12 DC.B 0x12 ; '\x12'
0x3400001C: 06 DC.B 0x06 ; '\x06'
0x3400001D: 40 DC.B 0x40 ; '@'
0x3400001E: 18 DC.B 0x18 ; '\x18'
0x3400001F: 03 DC.B 0x03 ; '\x03'
0x34000020: 0E DC.B 0x0E ; '\x0E'
0x34000021: 3A DC.B 0x3A ; ':'
0x34000022: 0B DC.B 0x0B ; '\v'
0x34000023: 3B DC.B 0x3B ; ';'
0x34000024: 0B DC.B 0x0B ; '\v'
0x34000025: 27 DC.B 0x27 ; '''
0x34000026: 19 DC.B 0x19 ; '\x19'
0x34000027: 3F DC.B 0x3F ; '?'
0x34000028: 19 DC.B 0x19 ; '\x19'
0x34000029: 00 DC.B 0x00 ; '\0'
0x3400002A: 00 DC.B 0x00 ; '\0'
0x3400002B: 03 DC.B 0x03 ; '\x03'
0x3400002C: 04 DC.B 0x04 ; '\x04'
0x3400002D: 01 DC.B 0x01 ; '\x01'
0x3400002E: 49 DC.B 0x49 ; 'I'
0x3400002F: 13 DC.B 0x13 ; '\x13'
0x34000030: 0B DC.B 0x0B ; '\v'
0x34000031: 0B DC.B 0x0B ; '\v'
0x34000032: 3A DC.B 0x3A ; ':'
0x34000033: 0B DC.B 0x0B ; '\v'
0x34000034: 3B DC.B 0x3B ; ';'
0x34000035: 0B DC.B 0x0B ; '\v'
0x34000036: 00 DC.B 0x00 ; '\0'
0x34000037: 00 DC.B 0x00 ; '\0'
0x34000038: 04 DC.B 0x04 ; '\x04'
0x34000039: 28 DC.B 0x28 ; '('
0x3400003A: 00 DC.B 0x00 ; '\0'
0x3400003B: 03 DC.B 0x03 ; '\x03'
0x3400003C: 0E DC.B 0x0E ; '\x0E'
0x3400003D: 1C DC.B 0x1C ; '\x1C'
0x3400003E: 0F DC.B 0x0F ; '\x0F'
0x3400003F: 00 DC.B 0x00 ; '\0'
0x34000040: 00 DC.B 0x00 ; '\0'
0x34000041: 05 DC.B 0x05 ; '\x05'
0x34000042: 24 DC.B 0x24 ; '$'
0x34000043: 00 DC.B 0x00 ; '\0'
0x34000044: 03 DC.B 0x03 ; '\x03'
0x34000045: 0E DC.B 0x0E ; '\x0E'
0x34000046: 3E DC.B 0x3E ; '>'
0x34000047: 0B DC.B 0x0B ; '\v'
0x34000048: 0B DC.B 0x0B ; '\v'
0x34000049: 0B DC.B 0x0B ; '\v'
0x3400004A: 00 DC.B 0x00 ; '\0'
0x3400004B: 00 DC.B 0x00 ; '\0'
0x3400004C: 06 DC.B 0x06 ; '\x06'
0x3400004D: 04 DC.B 0x04 ; '\x04'
0x3400004E: 01 DC.B 0x01 ; '\x01'
0x3400004F: 49 DC.B 0x49 ; 'I'
0x34000050: 10 DC.B 0x10 ; '\x10'
0x34000051: 0B DC.B 0x0B ; '\v'
0x34000052: 0B DC.B 0x0B ; '\v'
0x34000053: 3A DC.B 0x3A ; ':'
0x34000054: 0B DC.B 0x0B ; '\v'
0x34000055: 3B DC.B 0x3B ; ';'
0x34000056: 0B DC.B 0x0B ; '\v'
0x34000057: 00 DC.B 0x00 ; '\0'
0x34000058: 00 DC.B 0x00 ; '\0'
0x34000059: 07 DC.B 0x07 ; '\x07'
0x3400005A: 0F DC.B 0x0F ; '\x0F'
0x3400005B: 00 DC.B 0x00 ; '\0'
0x3400005C: 00 DC.B 0x00 ; '\0'
0x3400005D: 00 DC.B 0x00 ; '\0'
0x3400005E: 08 DC.B 0x08 ; '\b'
0x3400005F: 11 DC.B 0x11 ; '\x11'
0x34000060: 01 DC.B 0x01 ; '\x01'
0x34000061: 25 DC.B 0x25 ; '%'
0x34000062: 0E DC.B 0x0E ; '\x0E'
0x34000063: 13 DC.B 0x13 ; '\x13'
0x34000064: 05 DC.B 0x05 ; '\x05'
0x34000065: 03 DC.B 0x03 ; '\x03'
0x34000066: 0E DC.B 0x0E ; '\x0E'
0x34000067: 10 DC.B 0x10 ; '\x10'
0x34000068: 17 DC.B 0x17 ; '\x17'
0x34000069: B4 DC.B 0xB4 ; '\xB4'
0x3400006A: 42 DC.B 0x42 ; 'B'
0x3400006B: 19 DC.B 0x19 ; '\x19'
0x3400006C: 11 DC.B 0x11 ; '\x11'
0x3400006D: 01 DC.B 0x01 ; '\x01'
0x3400006E: 55 DC.B 0x55 ; 'U'
0x3400006F: 17 DC.B 0x17 ; '\x17'
0x34000070: 43 DC.B 0x43 ; 'C'
0x34000071: 17 DC.B 0x17 ; '\x17'
0x34000072: 00 DC.B 0x00 ; '\0'
0x34000073: 00 DC.B 0x00 ; '\0'
0x34000074: 09 DC.B 0x09 ; '\t'
0x34000075: 0F DC.B 0x0F ; '\x0F'
0x34000076: 00 DC.B 0x00 ; '\0'
0x34000077: 49 DC.B 0x49 ; 'I'
0x34000078: 13 DC.B 0x13 ; '\x13'
0x34000079: 00 DC.B 0x00 ; '\0'
0x3400007A: 00 DC.B 0x00 ; '\0'
0x3400007B: 0A DC.B 0x0A ; '\n'
0x3400007C: 16 DC.B 0x16 ; '\x16'
0x3400007D: 00 DC.B 0x00 ; '\0'
0x3400007E: 49 DC.B 0x49 ; 'I'
0x3400007F: 13 DC.B 0x13 ; '\x13'
0x34000080: 03 DC.B 0x03 ; '\x03'
0x34000081: 0E DC.B 0x0E ; '\x0E'
0x34000082: 3A DC.B 0x3A ; ':'
0x34000083: 0B DC.B 0x0B ; '\v'
0x34000084: 3B DC.B 0x3B ; ';'
0x34000085: 05 DC.B 0x05 ; '\x05'
0x34000086: 00 DC.B 0x00 ; '\0'
0x34000087: 00 DC.B 0x00 ; '\0'
0x34000088: 0B DC.B 0x0B ; '\v'
0x34000089: 13 DC.B 0x13 ; '\x13'
0x3400008A: 01 DC.B 0x01 ; '\x01'
0x3400008B: 0B DC.B 0x0B ; '\v'
0x3400008C: 0B DC.B 0x0B ; '\v'
0x3400008D: 3A DC.B 0x3A ; ':'
0x3400008E: 0B DC.B 0x0B ; '\v'
0x3400008F: 3B DC.B 0x3B ; ';'
0x34000090: 05 DC.B 0x05 ; '\x05'
0x34000091: 00 DC.B 0x00 ; '\0'
0x34000092: 00 DC.B 0x00 ; '\0'
0x34000093: 0C DC.B 0x0C ; '\x0C'
0x34000094: 0D DC.B 0x0D ; '\r'
0x34000095: 00 DC.B 0x00 ; '\0'
0x34000096: 03 DC.B 0x03 ; '\x03'
0x34000097: 0E DC.B 0x0E ; '\x0E'
0x34000098: 49 DC.B 0x49 ; 'I'
0x34000099: 13 DC.B 0x13 ; '\x13'
0x3400009A: 3A DC.B 0x3A ; ':'
0x3400009B: 0B DC.B 0x0B ; '\v'
0x3400009C: 3B DC.B 0x3B ; ';'
0x3400009D: 05 DC.B 0x05 ; '\x05'
0x3400009E: 38 DC.B 0x38 ; '8'
0x3400009F: 0B DC.B 0x0B ; '\v'
0x340000A0: 00 DC.B 0x00 ; '\0'
0x340000A1: 00 DC.B 0x00 ; '\0'
0x340000A2: 0D DC.B 0x0D ; '\r'
0x340000A3: 35 DC.B 0x35 ; '5'
0x340000A4: 00 DC.B 0x00 ; '\0'
0x340000A5: 49 DC.B 0x49 ; 'I'
0x340000A6: 13 DC.B 0x13 ; '\x13'
0x340000A7: 00 DC.B 0x00 ; '\0'
0x340000A8: 00 DC.B 0x00 ; '\0'
0x340000A9: 0E DC.B 0x0E ; '\x0E'
0x340000AA: 01 DC.B 0x01 ; '\x01'
0x340000AB: 01 DC.B 0x01 ; '\x01'
Section .bss.sfdp_param_info from blto2_FSBL_lto.o, size=120, align=4
sfdp_param_info:
0x340000AC: 10 DC.B 0x10 ; '\x10'
0x340000AD: 00 DC.B 0x00 ; '\0'
0x340000AE: 00 DC.B 0x00 ; '\0'
0x340000AF: 01 DC.B 0x01 ; '\x01'
0x340000B0: A0 DC.B 0xA0 ; '\xA0'
0x340000B1: 0F DC.B 0x0F ; '\x0F'
0x340000B2: 00 DC.B 0x00 ; '\0'
0x340000B3: FA DC.B 0xFA ; '\xFA'
0x340000B4: 10 DC.B 0x10 ; '\x10'
0x340000B5: 00 DC.B 0x00 ; '\0'
0x340000B6: 00 DC.B 0x00 ; '\0'
0x340000B7: 00 DC.B 0x00 ; '\0'
0x340000B8: 00 DC.B 0x00 ; '\0'
0x340000B9: 01 DC.B 0x01 ; '\x01'
0x340000BA: 00 DC.B 0x00 ; '\0'
0x340000BB: 00 DC.B 0x00 ; '\0'
0x340000BC: A0 DC.B 0xA0 ; '\xA0'
0x340000BD: 0F DC.B 0x0F ; '\x0F'
0x340000BE: 00 DC.B 0x00 ; '\0'
0x340000BF: 00 DC.B 0x00 ; '\0'
0x340000C0: 00 DC.B 0x00 ; '\0'
0x340000C1: FA DC.B 0xFA ; '\xFA'
0x340000C2: 00 DC.B 0x00 ; '\0'
0x340000C3: 00 DC.B 0x00 ; '\0'
0x340000C4: 00 DC.B 0x00 ; '\0'
0x340000C5: 00 DC.B 0x00 ; '\0'
0x340000C6: 21 DC.B 0x21 ; '!'
0x340000C7: 00 DC.B 0x00 ; '\0'
0x340000C8: 32 DC.B 0x32 ; '2'
0x340000C9: 00 DC.B 0x00 ; '\0'
0x340000CA: 42 DC.B 0x42 ; 'B'
0x340000CB: 00 DC.B 0x00 ; '\0'
0x340000CC: 50 DC.B 0x50 ; 'P'
0x340000CD: 00 DC.B 0x00 ; '\0'
0x340000CE: 64 DC.B 0x64 ; 'd'
0x340000CF: 00 DC.B 0x00 ; '\0'
0x340000D0: 85 DC.B 0x85 ; '\x85'
0x340000D1: 00 DC.B 0x00 ; '\0'
0x340000D2: A6 DC.B 0xA6 ; '\xA6'
0x340000D3: 00 DC.B 0x00 ; '\0'
0x340000D4: C8 DC.B 0xC8 ; '\xC8'
0x340000D5: 00 DC.B 0x00 ; '\0'
0x340000D6: FA DC.B 0xFA ; '\xFA'
0x340000D7: 00 DC.B 0x00 ; '\0'
0x340000D8: 0A DC.B 0x0A ; '\n'
0x340000D9: 01 DC.B 0x01 ; '\x01'
0x340000DA: 4D DC.B 0x4D ; 'M'
0x340000DB: 01 DC.B 0x01 ; '\x01'
0x340000DC: 90 DC.B 0x90 ; '\x90'
0x340000DD: 01 DC.B 0x01 ; '\x01'
0x340000DE: 03 DC.B 0x03 ; '\x03'
0x340000DF: 07 DC.B 0x07 ; '\x07'
0x340000E0: 0F DC.B 0x0F ; '\x0F'
0x340000E1: 1F DC.B 0x1F ; '\x1F'
0x340000E2: 00 DC.B 0x00 ; '\0'
0x340000E3: 00 DC.B 0x00 ; '\0'
0x340000E4: 01 DC.B 0x01 ; '\x01'
0x340000E5: 11 DC.B 0x11 ; '\x11'
0x340000E6: 01 DC.B 0x01 ; '\x01'
0x340000E7: 25 DC.B 0x25 ; '%'
0x340000E8: 0E DC.B 0x0E ; '\x0E'
0x340000E9: 13 DC.B 0x13 ; '\x13'
0x340000EA: 05 DC.B 0x05 ; '\x05'
0x340000EB: 03 DC.B 0x03 ; '\x03'
0x340000EC: 0E DC.B 0x0E ; '\x0E'
0x340000ED: 10 DC.B 0x10 ; '\x10'
0x340000EE: 17 DC.B 0x17 ; '\x17'
0x340000EF: B4 DC.B 0xB4 ; '\xB4'
0x340000F0: 42 DC.B 0x42 ; 'B'
0x340000F1: 19 DC.B 0x19 ; '\x19'
0x340000F2: 11 DC.B 0x11 ; '\x11'
0x340000F3: 01 DC.B 0x01 ; '\x01'
0x340000F4: 12 DC.B 0x12 ; '\x12'
0x340000F5: 06 DC.B 0x06 ; '\x06'
0x340000F6: 43 DC.B 0x43 ; 'C'
0x340000F7: 17 DC.B 0x17 ; '\x17'
0x340000F8: 00 DC.B 0x00 ; '\0'
0x340000F9: 00 DC.B 0x00 ; '\0'
0x340000FA: 02 DC.B 0x02 ; '\x02'
0x340000FB: 2E DC.B 0x2E ; '.'
0x340000FC: 00 DC.B 0x00 ; '\0'
0x340000FD: 11 DC.B 0x11 ; '\x11'
0x340000FE: 01 DC.B 0x01 ; '\x01'
0x340000FF: 12 DC.B 0x12 ; '\x12'
0x34000100: 06 DC.B 0x06 ; '\x06'
0x34000101: 40 DC.B 0x40 ; '@'
0x34000102: 18 DC.B 0x18 ; '\x18'
0x34000103: 03 DC.B 0x03 ; '\x03'
0x34000104: 0E DC.B 0x0E ; '\x0E'
0x34000105: 3A DC.B 0x3A ; ':'
0x34000106: 0B DC.B 0x0B ; '\v'
0x34000107: 3B DC.B 0x3B ; ';'
0x34000108: 0B DC.B 0x0B ; '\v'
0x34000109: 27 DC.B 0x27 ; '''
0x3400010A: 19 DC.B 0x19 ; '\x19'
0x3400010B: 3F DC.B 0x3F ; '?'
0x3400010C: 19 DC.B 0x19 ; '\x19'
0x3400010D: 00 DC.B 0x00 ; '\0'
0x3400010E: 00 DC.B 0x00 ; '\0'
0x3400010F: 03 DC.B 0x03 ; '\x03'
0x34000110: 04 DC.B 0x04 ; '\x04'
0x34000111: 01 DC.B 0x01 ; '\x01'
0x34000112: 49 DC.B 0x49 ; 'I'
0x34000113: 13 DC.B 0x13 ; '\x13'
0x34000114: 0B DC.B 0x0B ; '\v'
0x34000115: 0B DC.B 0x0B ; '\v'
0x34000116: 3A DC.B 0x3A ; ':'
0x34000117: 0B DC.B 0x0B ; '\v'
0x34000118: 3B DC.B 0x3B ; ';'
0x34000119: 0B DC.B 0x0B ; '\v'
0x3400011A: 00 DC.B 0x00 ; '\0'
0x3400011B: 00 DC.B 0x00 ; '\0'
0x3400011C: 04 DC.B 0x04 ; '\x04'
0x3400011D: 28 DC.B 0x28 ; '('
0x3400011E: 00 DC.B 0x00 ; '\0'
0x3400011F: 03 DC.B 0x03 ; '\x03'
0x34000120: 0E DC.B 0x0E ; '\x0E'
0x34000121: 1C DC.B 0x1C ; '\x1C'
0x34000122: 0F DC.B 0x0F ; '\x0F'
0x34000123: 00 DC.B 0x00 ; '\0'
Section .bss.JEDEC_SCCR_Map from blto2_FSBL_lto.o, size=112, align=4
JEDEC_SCCR_Map:
0x34000124: 10 DC.B 0x10 ; '\x10'
0x34000125: 00 DC.B 0x00 ; '\0'
0x34000126: 00 DC.B 0x00 ; '\0'
0x34000127: 01 DC.B 0x01 ; '\x01'
0x34000128: A0 DC.B 0xA0 ; '\xA0'
0x34000129: 0F DC.B 0x0F ; '\x0F'
0x3400012A: 00 DC.B 0x00 ; '\0'
0x3400012B: FA DC.B 0xFA ; '\xFA'
0x3400012C: 10 DC.B 0x10 ; '\x10'
0x3400012D: 00 DC.B 0x00 ; '\0'
0x3400012E: 00 DC.B 0x00 ; '\0'
0x3400012F: 00 DC.B 0x00 ; '\0'
0x34000130: 00 DC.B 0x00 ; '\0'
0x34000131: 01 DC.B 0x01 ; '\x01'
0x34000132: 00 DC.B 0x00 ; '\0'
0x34000133: 00 DC.B 0x00 ; '\0'
0x34000134: A0 DC.B 0xA0 ; '\xA0'
0x34000135: 0F DC.B 0x0F ; '\x0F'
0x34000136: 00 DC.B 0x00 ; '\0'
0x34000137: 00 DC.B 0x00 ; '\0'
0x34000138: 00 DC.B 0x00 ; '\0'
0x34000139: FA DC.B 0xFA ; '\xFA'
0x3400013A: 00 DC.B 0x00 ; '\0'
0x3400013B: 00 DC.B 0x00 ; '\0'
0x3400013C: 00 DC.B 0x00 ; '\0'
0x3400013D: 00 DC.B 0x00 ; '\0'
0x3400013E: 21 DC.B 0x21 ; '!'
0x3400013F: 00 DC.B 0x00 ; '\0'
0x34000140: 32 DC.B 0x32 ; '2'
0x34000141: 00 DC.B 0x00 ; '\0'
0x34000142: 42 DC.B 0x42 ; 'B'
0x34000143: 00 DC.B 0x00 ; '\0'
0x34000144: 50 DC.B 0x50 ; 'P'
0x34000145: 00 DC.B 0x00 ; '\0'
0x34000146: 64 DC.B 0x64 ; 'd'
0x34000147: 00 DC.B 0x00 ; '\0'
0x34000148: 85 DC.B 0x85 ; '\x85'
0x34000149: 00 DC.B 0x00 ; '\0'
0x3400014A: A6 DC.B 0xA6 ; '\xA6'
0x3400014B: 00 DC.B 0x00 ; '\0'
0x3400014C: C8 DC.B 0xC8 ; '\xC8'
0x3400014D: 00 DC.B 0x00 ; '\0'
0x3400014E: FA DC.B 0xFA ; '\xFA'
0x3400014F: 00 DC.B 0x00 ; '\0'
0x34000150: 0A DC.B 0x0A ; '\n'
0x34000151: 01 DC.B 0x01 ; '\x01'
0x34000152: 4D DC.B 0x4D ; 'M'
0x34000153: 01 DC.B 0x01 ; '\x01'
0x34000154: 90 DC.B 0x90 ; '\x90'
0x34000155: 01 DC.B 0x01 ; '\x01'
0x34000156: 03 DC.B 0x03 ; '\x03'
0x34000157: 07 DC.B 0x07 ; '\x07'
0x34000158: 0F DC.B 0x0F ; '\x0F'
0x34000159: 1F DC.B 0x1F ; '\x1F'
0x3400015A: 00 DC.B 0x00 ; '\0'
0x3400015B: 00 DC.B 0x00 ; '\0'
0x3400015C: 01 DC.B 0x01 ; '\x01'
0x3400015D: 11 DC.B 0x11 ; '\x11'
0x3400015E: 01 DC.B 0x01 ; '\x01'
0x3400015F: 25 DC.B 0x25 ; '%'
0x34000160: 0E DC.B 0x0E ; '\x0E'
0x34000161: 13 DC.B 0x13 ; '\x13'
0x34000162: 05 DC.B 0x05 ; '\x05'
0x34000163: 03 DC.B 0x03 ; '\x03'
0x34000164: 0E DC.B 0x0E ; '\x0E'
0x34000165: 10 DC.B 0x10 ; '\x10'
0x34000166: 17 DC.B 0x17 ; '\x17'
0x34000167: B4 DC.B 0xB4 ; '\xB4'
0x34000168: 42 DC.B 0x42 ; 'B'
0x34000169: 19 DC.B 0x19 ; '\x19'
0x3400016A: 11 DC.B 0x11 ; '\x11'
0x3400016B: 01 DC.B 0x01 ; '\x01'
0x3400016C: 12 DC.B 0x12 ; '\x12'
0x3400016D: 06 DC.B 0x06 ; '\x06'
0x3400016E: 43 DC.B 0x43 ; 'C'
0x3400016F: 17 DC.B 0x17 ; '\x17'
0x34000170: 00 DC.B 0x00 ; '\0'
0x34000171: 00 DC.B 0x00 ; '\0'
0x34000172: 02 DC.B 0x02 ; '\x02'
0x34000173: 2E DC.B 0x2E ; '.'
0x34000174: 00 DC.B 0x00 ; '\0'
0x34000175: 11 DC.B 0x11 ; '\x11'
0x34000176: 01 DC.B 0x01 ; '\x01'
0x34000177: 12 DC.B 0x12 ; '\x12'
0x34000178: 06 DC.B 0x06 ; '\x06'
0x34000179: 40 DC.B 0x40 ; '@'
0x3400017A: 18 DC.B 0x18 ; '\x18'
0x3400017B: 03 DC.B 0x03 ; '\x03'
0x3400017C: 0E DC.B 0x0E ; '\x0E'
0x3400017D: 3A DC.B 0x3A ; ':'
0x3400017E: 0B DC.B 0x0B ; '\v'
0x3400017F: 3B DC.B 0x3B ; ';'
0x34000180: 0B DC.B 0x0B ; '\v'
0x34000181: 27 DC.B 0x27 ; '''
0x34000182: 19 DC.B 0x19 ; '\x19'
0x34000183: 3F DC.B 0x3F ; '?'
0x34000184: 19 DC.B 0x19 ; '\x19'
0x34000185: 00 DC.B 0x00 ; '\0'
0x34000186: 00 DC.B 0x00 ; '\0'
0x34000187: 03 DC.B 0x03 ; '\x03'
0x34000188: 04 DC.B 0x04 ; '\x04'
0x34000189: 01 DC.B 0x01 ; '\x01'
0x3400018A: 49 DC.B 0x49 ; 'I'
0x3400018B: 13 DC.B 0x13 ; '\x13'
0x3400018C: 0B DC.B 0x0B ; '\v'
0x3400018D: 0B DC.B 0x0B ; '\v'
0x3400018E: 3A DC.B 0x3A ; ':'
0x3400018F: 0B DC.B 0x0B ; '\v'
0x34000190: 3B DC.B 0x3B ; ';'
0x34000191: 0B DC.B 0x0B ; '\v'
0x34000192: 00 DC.B 0x00 ; '\0'
0x34000193: 00 DC.B 0x00 ; '\0'
Section .bss.hxspi2 from blto2_FSBL_lto.o, size=100, align=4
hxspi2:
0x34000194: 01 DC.B 0x01 ; '\x01'
0x34000195: 00 DC.B 0x00 ; '\0'
0x34000196: 00 DC.B 0x00 ; '\0'
0x34000197: 00 DC.B 0x00 ; '\0'
0x34000198: 44 DC.B 0x44 ; 'D'
0x34000199: 3A DC.B 0x3A ; ':'
0x3400019A: 5C DC.B 0x5C ; '\\'
0x3400019B: 50 DC.B 0x50 ; 'P'
0x3400019C: 72 DC.B 0x72 ; 'r'
0x3400019D: 6F DC.B 0x6F ; 'o'
0x3400019E: 6A DC.B 0x6A ; 'j'
0x3400019F: 65 DC.B 0x65 ; 'e'
0x340001A0: 6B DC.B 0x6B ; 'k'
0x340001A1: 74 DC.B 0x74 ; 't'
0x340001A2: 65 DC.B 0x65 ; 'e'
0x340001A3: 5C DC.B 0x5C ; '\\'
0x340001A4: 68 DC.B 0x68 ; 'h'
0x340001A5: 61 DC.B 0x61 ; 'a'
0x340001A6: 64 DC.B 0x64 ; 'd'
0x340001A7: 65 DC.B 0x65 ; 'e'
0x340001A8: 77 DC.B 0x77 ; 'w'
0x340001A9: 65 DC.B 0x65 ; 'e'
0x340001AA: 5F DC.B 0x5F ; '_'
0x340001AB: 62 DC.B 0x62 ; 'b'
0x340001AC: 6C DC.B 0x6C ; 'l'
0x340001AD: 74 DC.B 0x74 ; 't'
0x340001AE: 6F DC.B 0x6F ; 'o'
0x340001AF: 32 DC.B 0x32 ; '2'
0x340001B0: 5C DC.B 0x5C ; '\\'
0x340001B1: 74 DC.B 0x74 ; 't'
0x340001B2: 72 DC.B 0x72 ; 'r'
0x340001B3: 75 DC.B 0x75 ; 'u'
0x340001B4: 6E DC.B 0x6E ; 'n'
0x340001B5: 6B DC.B 0x6B ; 'k'
0x340001B6: 5C DC.B 0x5C ; '\\'
0x340001B7: 66 DC.B 0x66 ; 'f'
0x340001B8: 69 DC.B 0x69 ; 'i'
0x340001B9: 72 DC.B 0x72 ; 'r'
0x340001BA: 6D DC.B 0x6D ; 'm'
0x340001BB: 77 DC.B 0x77 ; 'w'
0x340001BC: 61 DC.B 0x61 ; 'a'
0x340001BD: 72 DC.B 0x72 ; 'r'
0x340001BE: 65 DC.B 0x65 ; 'e'
0x340001BF: 5C DC.B 0x5C ; '\\'
0x340001C0: 46 DC.B 0x46 ; 'F'
0x340001C1: 53 DC.B 0x53 ; 'S'
0x340001C2: 42 DC.B 0x42 ; 'B'
0x340001C3: 4C DC.B 0x4C ; 'L'
0x340001C4: 5C DC.B 0x5C ; '\\'
0x340001C5: 43 DC.B 0x43 ; 'C'
0x340001C6: 75 DC.B 0x75 ; 'u'
0x340001C7: 62 DC.B 0x62 ; 'b'
0x340001C8: 65 DC.B 0x65 ; 'e'
0x340001C9: 4D DC.B 0x4D ; 'M'
0x340001CA: 58 DC.B 0x58 ; 'X'
0x340001CB: 5C DC.B 0x5C ; '\\'
0x340001CC: 44 DC.B 0x44 ; 'D'
0x340001CD: 72 DC.B 0x72 ; 'r'
0x340001CE: 69 DC.B 0x69 ; 'i'
0x340001CF: 76 DC.B 0x76 ; 'v'
0x340001D0: 65 DC.B 0x65 ; 'e'
0x340001D1: 72 DC.B 0x72 ; 'r'
0x340001D2: 73 DC.B 0x73 ; 's'
0x340001D3: 5C DC.B 0x5C ; '\\'
0x340001D4: 53 DC.B 0x53 ; 'S'
0x340001D5: 54 DC.B 0x54 ; 'T'
0x340001D6: 4D DC.B 0x4D ; 'M'
0x340001D7: 33 DC.B 0x33 ; '3'
0x340001D8: 32 DC.B 0x32 ; '2'
0x340001D9: 4E DC.B 0x4E ; 'N'
0x340001DA: 36 DC.B 0x36 ; '6'
0x340001DB: 78 DC.B 0x78 ; 'x'
0x340001DC: 78 DC.B 0x78 ; 'x'
0x340001DD: 5F DC.B 0x5F ; '_'
0x340001DE: 48 DC.B 0x48 ; 'H'
0x340001DF: 41 DC.B 0x41 ; 'A'
0x340001E0: 4C DC.B 0x4C ; 'L'
0x340001E1: 5F DC.B 0x5F ; '_'
0x340001E2: 44 DC.B 0x44 ; 'D'
0x340001E3: 72 DC.B 0x72 ; 'r'
0x340001E4: 69 DC.B 0x69 ; 'i'
0x340001E5: 76 DC.B 0x76 ; 'v'
0x340001E6: 65 DC.B 0x65 ; 'e'
0x340001E7: 72 DC.B 0x72 ; 'r'
0x340001E8: 5C DC.B 0x5C ; '\\'
0x340001E9: 53 DC.B 0x53 ; 'S'
0x340001EA: 72 DC.B 0x72 ; 'r'
0x340001EB: 63 DC.B 0x63 ; 'c'
0x340001EC: 5C DC.B 0x5C ; '\\'
0x340001ED: 73 DC.B 0x73 ; 's'
0x340001EE: 74 DC.B 0x74 ; 't'
0x340001EF: 6D DC.B 0x6D ; 'm'
0x340001F0: 33 DC.B 0x33 ; '3'
0x340001F1: 32 DC.B 0x32 ; '2'
0x340001F2: 6E DC.B 0x6E ; 'n'
0x340001F3: 36 DC.B 0x36 ; '6'
0x340001F4: 78 DC.B 0x78 ; 'x'
0x340001F5: 78 DC.B 0x78 ; 'x'
0x340001F6: 5F DC.B 0x5F ; '_'
0x340001F7: 68 DC.B 0x68 ; 'h'
Section .bss.JEDEC_Basic from blto2_FSBL_lto.o, size=96, align=4
JEDEC_Basic:
0x340001F8: 10 DC.B 0x10 ; '\x10'
0x340001F9: 00 DC.B 0x00 ; '\0'
0x340001FA: 00 DC.B 0x00 ; '\0'
0x340001FB: 01 DC.B 0x01 ; '\x01'
0x340001FC: A0 DC.B 0xA0 ; '\xA0'
0x340001FD: 0F DC.B 0x0F ; '\x0F'
0x340001FE: 00 DC.B 0x00 ; '\0'
0x340001FF: FA DC.B 0xFA ; '\xFA'
0x34000200: 10 DC.B 0x10 ; '\x10'
0x34000201: 00 DC.B 0x00 ; '\0'
0x34000202: 00 DC.B 0x00 ; '\0'
0x34000203: 00 DC.B 0x00 ; '\0'
0x34000204: 00 DC.B 0x00 ; '\0'
0x34000205: 01 DC.B 0x01 ; '\x01'
0x34000206: 00 DC.B 0x00 ; '\0'
0x34000207: 00 DC.B 0x00 ; '\0'
0x34000208: A0 DC.B 0xA0 ; '\xA0'
0x34000209: 0F DC.B 0x0F ; '\x0F'
0x3400020A: 00 DC.B 0x00 ; '\0'
0x3400020B: 00 DC.B 0x00 ; '\0'
0x3400020C: 00 DC.B 0x00 ; '\0'
0x3400020D: FA DC.B 0xFA ; '\xFA'
0x3400020E: 00 DC.B 0x00 ; '\0'
0x3400020F: 00 DC.B 0x00 ; '\0'
0x34000210: 00 DC.B 0x00 ; '\0'
0x34000211: 00 DC.B 0x00 ; '\0'
0x34000212: 21 DC.B 0x21 ; '!'
0x34000213: 00 DC.B 0x00 ; '\0'
0x34000214: 32 DC.B 0x32 ; '2'
0x34000215: 00 DC.B 0x00 ; '\0'
0x34000216: 42 DC.B 0x42 ; 'B'
0x34000217: 00 DC.B 0x00 ; '\0'
0x34000218: 50 DC.B 0x50 ; 'P'
0x34000219: 00 DC.B 0x00 ; '\0'
0x3400021A: 64 DC.B 0x64 ; 'd'
0x3400021B: 00 DC.B 0x00 ; '\0'
0x3400021C: 85 DC.B 0x85 ; '\x85'
0x3400021D: 00 DC.B 0x00 ; '\0'
0x3400021E: A6 DC.B 0xA6 ; '\xA6'
0x3400021F: 00 DC.B 0x00 ; '\0'
0x34000220: C8 DC.B 0xC8 ; '\xC8'
0x34000221: 00 DC.B 0x00 ; '\0'
0x34000222: FA DC.B 0xFA ; '\xFA'
0x34000223: 00 DC.B 0x00 ; '\0'
0x34000224: 0A DC.B 0x0A ; '\n'
0x34000225: 01 DC.B 0x01 ; '\x01'
0x34000226: 4D DC.B 0x4D ; 'M'
0x34000227: 01 DC.B 0x01 ; '\x01'
0x34000228: 90 DC.B 0x90 ; '\x90'
0x34000229: 01 DC.B 0x01 ; '\x01'
0x3400022A: 03 DC.B 0x03 ; '\x03'
0x3400022B: 07 DC.B 0x07 ; '\x07'
0x3400022C: 0F DC.B 0x0F ; '\x0F'
0x3400022D: 1F DC.B 0x1F ; '\x1F'
0x3400022E: 00 DC.B 0x00 ; '\0'
0x3400022F: 00 DC.B 0x00 ; '\0'
0x34000230: 01 DC.B 0x01 ; '\x01'
0x34000231: 11 DC.B 0x11 ; '\x11'
0x34000232: 01 DC.B 0x01 ; '\x01'
0x34000233: 25 DC.B 0x25 ; '%'
0x34000234: 0E DC.B 0x0E ; '\x0E'
0x34000235: 13 DC.B 0x13 ; '\x13'
0x34000236: 05 DC.B 0x05 ; '\x05'
0x34000237: 03 DC.B 0x03 ; '\x03'
0x34000238: 0E DC.B 0x0E ; '\x0E'
0x34000239: 10 DC.B 0x10 ; '\x10'
0x3400023A: 17 DC.B 0x17 ; '\x17'
0x3400023B: B4 DC.B 0xB4 ; '\xB4'
0x3400023C: 42 DC.B 0x42 ; 'B'
0x3400023D: 19 DC.B 0x19 ; '\x19'
0x3400023E: 11 DC.B 0x11 ; '\x11'
0x3400023F: 01 DC.B 0x01 ; '\x01'
0x34000240: 12 DC.B 0x12 ; '\x12'
0x34000241: 06 DC.B 0x06 ; '\x06'
0x34000242: 43 DC.B 0x43 ; 'C'
0x34000243: 17 DC.B 0x17 ; '\x17'
0x34000244: 00 DC.B 0x00 ; '\0'
0x34000245: 00 DC.B 0x00 ; '\0'
0x34000246: 02 DC.B 0x02 ; '\x02'
0x34000247: 2E DC.B 0x2E ; '.'
0x34000248: 00 DC.B 0x00 ; '\0'
0x34000249: 11 DC.B 0x11 ; '\x11'
0x3400024A: 01 DC.B 0x01 ; '\x01'
0x3400024B: 12 DC.B 0x12 ; '\x12'
0x3400024C: 06 DC.B 0x06 ; '\x06'
0x3400024D: 40 DC.B 0x40 ; '@'
0x3400024E: 18 DC.B 0x18 ; '\x18'
0x3400024F: 03 DC.B 0x03 ; '\x03'
0x34000250: 0E DC.B 0x0E ; '\x0E'
0x34000251: 3A DC.B 0x3A ; ':'
0x34000252: 0B DC.B 0x0B ; '\v'
0x34000253: 3B DC.B 0x3B ; ';'
0x34000254: 0B DC.B 0x0B ; '\v'
0x34000255: 27 DC.B 0x27 ; '''
0x34000256: 19 DC.B 0x19 ; '\x19'
0x34000257: 3F DC.B 0x3F ; '?'
Section .bss.JEDEC_OctalDdr from blto2_FSBL_lto.o, size=32, align=4
JEDEC_OctalDdr:
0x34000258: 10 DC.B 0x10 ; '\x10'
0x34000259: 00 DC.B 0x00 ; '\0'
0x3400025A: 00 DC.B 0x00 ; '\0'
0x3400025B: 01 DC.B 0x01 ; '\x01'
0x3400025C: A0 DC.B 0xA0 ; '\xA0'
0x3400025D: 0F DC.B 0x0F ; '\x0F'
0x3400025E: 00 DC.B 0x00 ; '\0'
0x3400025F: FA DC.B 0xFA ; '\xFA'
0x34000260: 10 DC.B 0x10 ; '\x10'
0x34000261: 00 DC.B 0x00 ; '\0'
0x34000262: 00 DC.B 0x00 ; '\0'
0x34000263: 00 DC.B 0x00 ; '\0'
0x34000264: 00 DC.B 0x00 ; '\0'
0x34000265: 01 DC.B 0x01 ; '\x01'
0x34000266: 00 DC.B 0x00 ; '\0'
0x34000267: 00 DC.B 0x00 ; '\0'
0x34000268: A0 DC.B 0xA0 ; '\xA0'
0x34000269: 0F DC.B 0x0F ; '\x0F'
0x3400026A: 00 DC.B 0x00 ; '\0'
0x3400026B: 00 DC.B 0x00 ; '\0'
0x3400026C: 00 DC.B 0x00 ; '\0'
0x3400026D: FA DC.B 0xFA ; '\xFA'
0x3400026E: 00 DC.B 0x00 ; '\0'
0x3400026F: 00 DC.B 0x00 ; '\0'
0x34000270: 00 DC.B 0x00 ; '\0'
0x34000271: 00 DC.B 0x00 ; '\0'
0x34000272: 21 DC.B 0x21 ; '!'
0x34000273: 00 DC.B 0x00 ; '\0'
0x34000274: 32 DC.B 0x32 ; '2'
0x34000275: 00 DC.B 0x00 ; '\0'
0x34000276: 42 DC.B 0x42 ; 'B'
0x34000277: 00 DC.B 0x00 ; '\0'
Section .bss.JEDEC_XSPI10 from blto2_FSBL_lto.o, size=24, align=4
JEDEC_XSPI10:
0x34000278: 10 DC.B 0x10 ; '\x10'
0x34000279: 00 DC.B 0x00 ; '\0'
0x3400027A: 00 DC.B 0x00 ; '\0'
0x3400027B: 01 DC.B 0x01 ; '\x01'
0x3400027C: A0 DC.B 0xA0 ; '\xA0'
0x3400027D: 0F DC.B 0x0F ; '\x0F'
0x3400027E: 00 DC.B 0x00 ; '\0'
0x3400027F: FA DC.B 0xFA ; '\xFA'
0x34000280: 10 DC.B 0x10 ; '\x10'
0x34000281: 00 DC.B 0x00 ; '\0'
0x34000282: 00 DC.B 0x00 ; '\0'
0x34000283: 00 DC.B 0x00 ; '\0'
0x34000284: 00 DC.B 0x00 ; '\0'
0x34000285: 01 DC.B 0x01 ; '\x01'
0x34000286: 00 DC.B 0x00 ; '\0'
0x34000287: 00 DC.B 0x00 ; '\0'
0x34000288: A0 DC.B 0xA0 ; '\xA0'
0x34000289: 0F DC.B 0x0F ; '\x0F'
0x3400028A: 00 DC.B 0x00 ; '\0'
0x3400028B: 00 DC.B 0x00 ; '\0'
0x3400028C: 00 DC.B 0x00 ; '\0'
0x3400028D: FA DC.B 0xFA ; '\xFA'
0x3400028E: 00 DC.B 0x00 ; '\0'
0x3400028F: 00 DC.B 0x00 ; '\0'
Section .bss.JEDEC_Address4Bytes from blto2_FSBL_lto.o, size=8, align=4
JEDEC_Address4Bytes:
0x34000290: 01 DC.B 0x01 ; '\x01'
0x34000291: 11 DC.B 0x11 ; '\x11'
0x34000292: 01 DC.B 0x01 ; '\x01'
0x34000293: 25 DC.B 0x25 ; '%'
0x34000294: 0E DC.B 0x0E ; '\x0E'
0x34000295: 13 DC.B 0x13 ; '\x13'
0x34000296: 05 DC.B 0x05 ; '\x05'
0x34000297: 03 DC.B 0x03 ; '\x03'
Section .bss.uwTick from blto2_FSBL_lto.o, size=4, align=4
uwTick:
0x34000298: 44 DC.B 0x44 ; 'D'
0x34000299: 3A DC.B 0x3A ; ':'
0x3400029A: 5C DC.B 0x5C ; '\\'
0x3400029B: 50 DC.B 0x50 ; 'P'
Section .bss.JumpToApplication.JumpToApp from blto2_FSBL_lto.o, size=4, align=4
JumpToApplication.JumpToApp:
0x3400029C: 00 DC.B 0x00 ; '\0'
0x3400029D: 08 DC.B 0x08 ; '\b'
0x3400029E: 06 DC.B 0x06 ; '\x06'
0x3400029F: 02 DC.B 0x02 ; '\x02'
Section .data.uwTickPrio from blto2_FSBL_lto.o, size=4, align=4
uwTickPrio:
0x340002A0: 10 DC.B 0x10 ; '\x10'
0x340002A1: 00 DC.B 0x00 ; '\0'
0x340002A2: 00 DC.B 0x00 ; '\0'
0x340002A3: 00 DC.B 0x00 ; '\0'
Section .data.SystemCoreClock from blto2_FSBL_lto.o, size=4, align=4
SystemCoreClock:
0x340002A4: 00 DC.B 0x00 ; '\0'
0x340002A5: 90 DC.B 0x90 ; '\x90'
0x340002A6: D0 DC.B 0xD0 ; '\xD0'
0x340002A7: 03 DC.B 0x03 ; '\x03'
Section .data.uwTickFreq from blto2_FSBL_lto.o, size=1, align=1
uwTickFreq:
0x340002A8: 01 DC.B 0x01 ; '\x01'
Section .bss.block.stack from [ Linker created ], size=8192, align=8
(34062000-34063FFF excluded)
Section .vectors from stm32n657xx_Vectors.o, size=844, align=1024
_vectors:
g_pfnVectors:
0x34180400: 34064000 DC.W 34064000 ; R_ARM_ABS32
0x34180404: 3418C8D5 DC.W reset_handler
0x34180408: 3418CD3D DC.W NMI_Handler
0x3418040C: 3418CD41 DC.W HardFault_Handler
0x34180410: 3418CD45 DC.W MemManage_Handler
0x34180414: 3418CD49 DC.W BusFault_Handler
0x34180418: 3418CD4D DC.W UsageFault_Handler
0x3418041C: 00 DC.B 0x00 ; '\0'
0x3418041D: 00 DC.B 0x00 ; '\0'
0x3418041E: 00 DC.B 0x00 ; '\0'
0x3418041F: 00 DC.B 0x00 ; '\0'
0x34180420: 00 DC.B 0x00 ; '\0'
0x34180421: 00 DC.B 0x00 ; '\0'
0x34180422: 00 DC.B 0x00 ; '\0'
0x34180423: 00 DC.B 0x00 ; '\0'
0x34180424: 00 DC.B 0x00 ; '\0'
0x34180425: 00 DC.B 0x00 ; '\0'
0x34180426: 00 DC.B 0x00 ; '\0'
0x34180427: 00 DC.B 0x00 ; '\0'
0x34180428: 00 DC.B 0x00 ; '\0'
0x34180429: 00 DC.B 0x00 ; '\0'
0x3418042A: 00 DC.B 0x00 ; '\0'
0x3418042B: 00 DC.B 0x00 ; '\0'
0x3418042C: 3418CD51 DC.W SVC_Handler
0x34180430: 3418CD55 DC.W DebugMon_Handler
0x34180434: 00 DC.B 0x00 ; '\0'
0x34180435: 00 DC.B 0x00 ; '\0'
0x34180436: 00 DC.B 0x00 ; '\0'
0x34180437: 00 DC.B 0x00 ; '\0'
0x34180438: 3418CD59 DC.W PendSV_Handler
0x3418043C: 341807B1 DC.W SysTick_Handler
0x34180440: 3418CA1F DC.W PVD_PVM_IRQHandler
0x34180444: 00 DC.B 0x00 ; '\0'
0x34180445: 00 DC.B 0x00 ; '\0'
0x34180446: 00 DC.B 0x00 ; '\0'
0x34180447: 00 DC.B 0x00 ; '\0'
0x34180448: 3418CA43 DC.W DTS_IRQHandler
0x3418044C: 3418CB8B DC.W RCC_IRQHandler
0x34180450: 3418CC7B DC.W LOCKUP_IRQHandler
0x34180454: 3418CD0B DC.W CACHE_ECC_IRQHandler
0x34180458: 3418CD2F DC.W TCM_ECC_IRQHandler
0x3418045C: 3418CD3B DC.W BCK_ECC_IRQHandler
0x34180460: 3418CD3F DC.W FPU_IRQHandler
0x34180464: 00 DC.B 0x00 ; '\0'
0x34180465: 00 DC.B 0x00 ; '\0'
0x34180466: 00 DC.B 0x00 ; '\0'
0x34180467: 00 DC.B 0x00 ; '\0'
0x34180468: 3418CD43 DC.W RTC_S_IRQHandler
0x3418046C: 3418CD47 DC.W TAMP_IRQHandler
0x34180470: 3418CD4B DC.W RIFSC_TAMPER_IRQHandler
0x34180474: 3418CD4F DC.W IAC_IRQHandler
0x34180478: 3418CD53 DC.W RCC_S_IRQHandler
0x3418047C: 00 DC.B 0x00 ; '\0'
0x3418047D: 00 DC.B 0x00 ; '\0'
0x3418047E: 00 DC.B 0x00 ; '\0'
0x3418047F: 00 DC.B 0x00 ; '\0'
0x34180480: 3418CD57 DC.W RTC_IRQHandler
0x34180484: 00 DC.B 0x00 ; '\0'
0x34180485: 00 DC.B 0x00 ; '\0'
0x34180486: 00 DC.B 0x00 ; '\0'
0x34180487: 00 DC.B 0x00 ; '\0'
0x34180488: 3418CD5B DC.W IWDG_IRQHandler
0x3418048C: 3418CF5B DC.W WWDG_IRQHandler
0x34180490: 3418CFDB DC.W EXTI0_IRQHandler
0x34180494: 3418CFFF DC.W EXTI1_IRQHandler
0x34180498: 3418D023 DC.W EXTI2_IRQHandler
0x3418049C: 3418D047 DC.W EXTI3_IRQHandler
0x341804A0: 3418D0C7 DC.W EXTI4_IRQHandler
0x341804A4: 3418D0E3 DC.W EXTI5_IRQHandler
0x341804A8: 3418D11F DC.W EXTI6_IRQHandler
0x341804AC: 3418D133 DC.W EXTI7_IRQHandler
0x341804B0: 3418D22F DC.W EXTI8_IRQHandler
0x341804B4: 3418D387 DC.W EXTI9_IRQHandler
0x341804B8: 3418D3C7 DC.W EXTI10_IRQHandler
0x341804BC: 3418D407 DC.W EXTI11_IRQHandler
0x341804C0: 3418D457 DC.W EXTI12_IRQHandler
0x341804C4: 3418D4BF DC.W EXTI13_IRQHandler
0x341804C8: 3418D533 DC.W EXTI14_IRQHandler
0x341804CC: 3418D5A7 DC.W EXTI15_IRQHandler
0x341804D0: 3418D68B DC.W SAES_IRQHandler
0x341804D4: 3418D69F DC.W CRYP_IRQHandler
0x341804D8: 3418D6AF DC.W PKA_IRQHandler
0x341804DC: 3418E1AB DC.W HASH_IRQHandler
0x341804E0: 3418E1CB DC.W RNG_IRQHandler
0x341804E4: 00 DC.B 0x00 ; '\0'
0x341804E5: 00 DC.B 0x00 ; '\0'
0x341804E6: 00 DC.B 0x00 ; '\0'
0x341804E7: 00 DC.B 0x00 ; '\0'
0x341804E8: 3418E1DB DC.W MCE1_IRQHandler
0x341804EC: 3418E1FB DC.W MCE2_IRQHandler
0x341804F0: 3418E20B DC.W MCE3_IRQHandler
0x341804F4: 3418E21B DC.W MCE4_IRQHandler
0x341804F8: 3418E22B DC.W ADC1_2_IRQHandler
0x341804FC: 3418E23B DC.W CSI_IRQHandler
0x34180500: 3418E317 DC.W DCMIPP_IRQHandler
0x34180504: 00 DC.B 0x00 ; '\0'
0x34180505: 00 DC.B 0x00 ; '\0'
0x34180506: 00 DC.B 0x00 ; '\0'
0x34180507: 00 DC.B 0x00 ; '\0'
0x34180508: 00 DC.B 0x00 ; '\0'
0x34180509: 00 DC.B 0x00 ; '\0'
0x3418050A: 00 DC.B 0x00 ; '\0'
0x3418050B: 00 DC.B 0x00 ; '\0'
0x3418050C: 00 DC.B 0x00 ; '\0'
0x3418050D: 00 DC.B 0x00 ; '\0'
0x3418050E: 00 DC.B 0x00 ; '\0'
0x3418050F: 00 DC.B 0x00 ; '\0'
0x34180510: 3418E667 DC.W PAHB_ERR_IRQHandler
0x34180514: 3418E6C7 DC.W NPU0_IRQHandler
0x34180518: 3418F08B DC.W NPU1_IRQHandler
0x3418051C: 3418F177 DC.W NPU2_IRQHandler
0x34180520: 3418F187 DC.W NPU3_IRQHandler
0x34180524: 3418F277 DC.W CACHEAXI_IRQHandler
0x34180528: 3418F28F DC.W LTDC_LO_IRQHandler
0x3418052C: 3418F2AB DC.W LTDC_LO_ERR_IRQHandler
0x34180530: 3418F2C3 DC.W DMA2D_IRQHandler
0x34180534: 3418F2D3 DC.W JPEG_IRQHandler
0x34180538: 3418F2E3 DC.W VENC_IRQHandler
0x3418053C: 3418F2F3 DC.W GFXMMU_IRQHandler
0x34180540: 3418F303 DC.W GFXTIM_IRQHandler
0x34180544: 3418F313 DC.W GPU2D_IRQHandler
0x34180548: 3418F323 DC.W GPU2D_ER_IRQHandler
0x3418054C: 3418F337 DC.W ICACHE_IRQHandler
0x34180550: 3418F34B DC.W HPDMA1_Channel0_IRQHandler
0x34180554: 3418F36B DC.W HPDMA1_Channel1_IRQHandler
0x34180558: 3418F383 DC.W HPDMA1_Channel2_IRQHandler
0x3418055C: 3418F39B DC.W HPDMA1_Channel3_IRQHandler
0x34180560: 3418F3B3 DC.W HPDMA1_Channel4_IRQHandler
0x34180564: 3418F3CB DC.W HPDMA1_Channel5_IRQHandler
0x34180568: 3418F3E3 DC.W HPDMA1_Channel6_IRQHandler
0x3418056C: 3418F3FB DC.W HPDMA1_Channel7_IRQHandler
0x34180570: 3418F413 DC.W HPDMA1_Channel8_IRQHandler
0x34180574: 3418F42B DC.W HPDMA1_Channel9_IRQHandler
0x34180578: 3418F443 DC.W HPDMA1_Channel10_IRQHandler
0x3418057C: 3418F45B DC.W HPDMA1_Channel11_IRQHandler
0x34180580: 3418F473 DC.W HPDMA1_Channel12_IRQHandler
0x34180584: 3418F48B DC.W HPDMA1_Channel13_IRQHandler
0x34180588: 3418F4A3 DC.W HPDMA1_Channel14_IRQHandler
0x3418058C: 3418FAFF DC.W HPDMA1_Channel15_IRQHandler
0x34180590: 3418FCB7 DC.W GPDMA1_Channel0_IRQHandler
0x34180594: 3418FD3F DC.W GPDMA1_Channel1_IRQHandler
0x34180598: 3418FE1F DC.W GPDMA1_Channel2_IRQHandler
0x3418059C: 3418FEEF DC.W GPDMA1_Channel3_IRQHandler
0x341805A0: 3419002B DC.W GPDMA1_Channel4_IRQHandler
0x341805A4: 341902EF DC.W GPDMA1_Channel5_IRQHandler
0x341805A8: 341905B3 DC.W GPDMA1_Channel6_IRQHandler
0x341805AC: 3419068F DC.W GPDMA1_Channel7_IRQHandler
0x341805B0: 3419070F DC.W GPDMA1_Channel8_IRQHandler
0x341805B4: 3419096F DC.W GPDMA1_Channel9_IRQHandler
0x341805B8: 34190987 DC.W GPDMA1_Channel10_IRQHandler
0x341805BC: 34190A0B DC.W GPDMA1_Channel11_IRQHandler
0x341805C0: 34190A8F DC.W GPDMA1_Channel12_IRQHandler
0x341805C4: 34190B13 DC.W GPDMA1_Channel13_IRQHandler
0x341805C8: 34190B97 DC.W GPDMA1_Channel14_IRQHandler
0x341805CC: 34190BAF DC.W GPDMA1_Channel15_IRQHandler
0x341805D0: 34190BC7 DC.W I2C1_EV_IRQHandler
0x341805D4: 34190BDF DC.W I2C1_ER_IRQHandler
0x341805D8: 34190BF7 DC.W I2C2_EV_IRQHandler
0x341805DC: 34190C0F DC.W I2C2_ER_IRQHandler
0x341805E0: 34190C27 DC.W I2C3_EV_IRQHandler
0x341805E4: 34190C3F DC.W I2C3_ER_IRQHandler
0x341805E8: 34190C57 DC.W I2C4_EV_IRQHandler
0x341805EC: 34190C6F DC.W I2C4_ER_IRQHandler
0x341805F0: 34190C87 DC.W I3C1_EV_IRQHandler
0x341805F4: 34190C9F DC.W I3C1_ER_IRQHandler
0x341805F8: 34190CB7 DC.W I3C2_EV_IRQHandler
0x341805FC: 34190CCF DC.W I3C2_ER_IRQHandler
0x34180600: 34190CE7 DC.W TIM1_BRK_IRQHandler
0x34180604: 34190CFF DC.W TIM1_UP_IRQHandler
0x34180608: 34190D13 DC.W TIM1_TRG_CCU_IRQHandler
0x3418060C: 34191167 DC.W TIM1_CC_IRQHandler
0x34180610: 3419124B DC.W TIM2_IRQHandler
0x34180614: 341913E3 DC.W TIM3_IRQHandler
0x34180618: 3419152F DC.W TIM4_IRQHandler
0x3418061C: 34191627 DC.W TIM5_IRQHandler
0x34180620: 34191997 DC.W TIM6_IRQHandler
0x34180624: 34191A6B DC.W TIM7_IRQHandler
0x34180628: 34191A8F DC.W TIM8_BRK_IRQHandler
0x3418062C: 34191AEF DC.W TIM8_UP_IRQHandler
0x34180630: 34191B6F DC.W TIM8_TRG_CCU_IRQHandler
0x34180634: 34191D3B DC.W TIM8_CC_IRQHandler
0x34180638: 34191F07 DC.W TIM9_IRQHandler
0x3418063C: 3419205B DC.W TIM10_IRQHandler
0x34180640: 3419223F DC.W TIM11_IRQHandler
0x34180644: 341922A7 DC.W TIM12_IRQHandler
0x34180648: 341923DB DC.W TIM13_IRQHandler
0x3418064C: 34192417 DC.W TIM14_IRQHandler
0x34180650: 3419246F DC.W TIM15_IRQHandler
0x34180654: 3419270B DC.W TIM16_IRQHandler
0x34180658: 341927EB DC.W TIM17_IRQHandler
0x3418065C: 34192877 DC.W TIM18_IRQHandler
0x34180660: 34192937 DC.W LPTIM1_IRQHandler
0x34180664: 3419294F DC.W LPTIM2_IRQHandler
0x34180668: 34192963 DC.W LPTIM3_IRQHandler
0x3418066C: 341929C3 DC.W LPTIM4_IRQHandler
0x34180670: 34192A13 DC.W LPTIM5_IRQHandler
0x34180674: 34192A15 DC.W ADF1_FLT0_IRQHandler
0x34180678: 34192A17 DC.W MDF1_FLT0_IRQHandler
0x3418067C: 34192A19 DC.W MDF1_FLT1_IRQHandler
0x34180680: 34192A1B DC.W MDF1_FLT2_IRQHandler
0x34180684: 34192A1D DC.W MDF1_FLT3_IRQHandler
0x34180688: 34192A1F DC.W MDF1_FLT4_IRQHandler
0x3418068C: 34192A21 DC.W MDF1_FLT5_IRQHandler
0x34180690: 34192A23 DC.W SAI1_A_IRQHandler
0x34180694: 34192A25 DC.W SAI1_B_IRQHandler
0x34180698: 34192A27 DC.W SAI2_A_IRQHandler
0x3418069C: 34192A29 DC.W SAI2_B_IRQHandler
0x341806A0: 34192A2B DC.W SPDIFRX_IRQHandler
0x341806A4: 34192A2D DC.W SPI1_IRQHandler
0x341806A8: 34192A2F DC.W SPI2_IRQHandler
0x341806AC: 34192A31 DC.W SPI3_IRQHandler
0x341806B0: 34192A33 DC.W SPI4_IRQHandler
0x341806B4: 34192A35 DC.W SPI5_IRQHandler
0x341806B8: 34192A37 DC.W SPI6_IRQHandler
0x341806BC: 34192A39 DC.W USART1_IRQHandler
0x341806C0: 34192A3B DC.W USART2_IRQHandler
0x341806C4: 34192A3D DC.W USART3_IRQHandler
0x341806C8: 34192A3F DC.W UART4_IRQHandler
0x341806CC: 34192A41 DC.W UART5_IRQHandler
0x341806D0: 34192A43 DC.W USART6_IRQHandler
0x341806D4: 34192A45 DC.W UART7_IRQHandler
0x341806D8: 34192A47 DC.W UART8_IRQHandler
0x341806DC: 34192A49 DC.W UART9_IRQHandler
0x341806E0: 34192A4B DC.W USART10_IRQHandler
0x341806E4: 34192A4D DC.W LPUART1_IRQHandler
0x341806E8: 34192A4F DC.W XSPI1_IRQHandler
0x341806EC: 34192A51 DC.W XSPI2_IRQHandler
0x341806F0: 34192A53 DC.W XSPI3_IRQHandler
0x341806F4: 34192A55 DC.W FMC_IRQHandler
0x341806F8: 34192A57 DC.W SDMMC1_IRQHandler
0x341806FC: 34192A59 DC.W SDMMC2_IRQHandler
0x34180700: 34192A5B DC.W UCPD1_IRQHandler
0x34180704: 34192A5D DC.W USB1_OTG_HS_IRQHandler
0x34180708: 34192A5F DC.W USB2_OTG_HS_IRQHandler
0x3418070C: 34192A61 DC.W ETH1_IRQHandler
0x34180710: 34192A63 DC.W FDCAN1_IT0_IRQHandler
0x34180714: 34192A65 DC.W FDCAN1_IT1_IRQHandler
0x34180718: 34192A67 DC.W FDCAN2_IT0_IRQHandler
0x3418071C: 34192A69 DC.W FDCAN2_IT1_IRQHandler
0x34180720: 34192A6B DC.W FDCAN3_IT0_IRQHandler
0x34180724: 34192A6D DC.W FDCAN3_IT1_IRQHandler
0x34180728: 34192A6F DC.W FDCAN_CU_IRQHandler
0x3418072C: 34192A71 DC.W MDIOS_IRQHandler
0x34180730: 34192A73 DC.W DCMI_PSSI_IRQHandler
0x34180734: 34192A75 DC.W WAKEUP_PIN_IRQHandler
0x34180738: 34192A77 DC.W CTI_INT0_IRQHandler
0x3418073C: 34192A79 DC.W CTI_INT1_IRQHandler
0x34180740: 00 DC.B 0x00 ; '\0'
0x34180741: 00 DC.B 0x00 ; '\0'
0x34180742: 00 DC.B 0x00 ; '\0'
0x34180743: 00 DC.B 0x00 ; '\0'
0x34180744: 34192A7B DC.W LTDC_UP_IRQHandler
0x34180748: 34192A7D DC.W LTDC_UP_ERR_IRQHandler
Section .text.MX_GPIO_Init from blto2_FSBL_lto.o, size=88, align=4
MX_GPIO_Init:
_vectors_end:
0x3418074C: B580 PUSH 123R7, LR}
0x3418074E: B088 SUB SP, SP, #32
0x34180750: 2000 MOVS R0, #0
0x34180752: 9001 STR R0, [SP, #4]
0x34180754: 9007 STR R0, [SP, #28]
0x34180756: 9006 STR R0, [SP, #24]
0x34180758: 9005 STR R0, [SP, #20]
0x3418075A: 9004 STR R0, [SP, #16]
0x3418075C: 9003 STR R0, [SP, #12]
0x3418075E: F44F 5000 MOV.W R0, #0x2000
0x34180762: F00C F95D BL LL_AHB4_GRP1_EnableClock ; 0x3418CA20
0x34180766: 2040 MOVS R0, #64
0x34180768: F00C F95A BL LL_AHB4_GRP1_EnableClock ; 0x3418CA20
0x3418076C: 2001 MOVS R0, #1
0x3418076E: 9000 STR R0, [SP, #0]
0x34180770: F00C F956 BL LL_AHB4_GRP1_EnableClock ; 0x3418CA20
0x34180774: 2002 MOVS R0, #2
0x34180776: F00C F953 BL LL_AHB4_GRP1_EnableClock ; 0x3418CA20
0x3418077A: 9900 LDR R1, [SP, #0]
0x3418077C: 9A01 LDR R2, [SP, #4]
0x3418077E: F641 0000 MOVW R0, #0x1800
0x34180782: F2C5 6002 MOVT R0, #0x5602
0x34180786: 9002 STR R0, [SP, #8]
0x34180788: F00C FE66 BL HAL_GPIO_WritePin ; 0x3418D458
0x3418078C: 9A00 LDR R2, [SP, #0]
0x3418078E: 9901 LDR R1, [SP, #4]
0x34180790: 9802 LDR R0, [SP, #8]
0x34180792: 9203 STR R2, [SP, #12]
0x34180794: 9204 STR R2, [SP, #16]
0x34180796: 9105 STR R1, [SP, #20]
0x34180798: 9106 STR R1, [SP, #24]
0x3418079A: A903 ADD R1, SP, #12
0x3418079C: F000 FBD6 BL HAL_GPIO_Init ; 0x34180F4C
0x341807A0: B008 ADD SP, SP, #32
0x341807A2: BD80 POP 123R7, PC}
Section .text.Error_Handler from blto2_FSBL_lto.o, size=4, align=4
Error_Handler:
0x341807A4: B672 CPSID i
.L1:
0x341807A6: E7FE B 46L1 ; 0x341807A6
Section .text.HAL_MspInit from blto2_FSBL_lto.o, size=8, align=4
HAL_MspInit:
0x341807A8: B580 PUSH 123R7, LR}
0x341807AA: F00C FF6F BL HAL_PWREx_EnableVddIO3 ; 0x3418D68C
0x341807AE: BD80 POP 123R7, PC}
Section .text.SysTick_Handler from blto2_FSBL_lto.o, size=8, align=4
SysTick_Handler:
0x341807B0: B580 PUSH 123R7, LR}
0x341807B2: F00C FC89 BL HAL_IncTick ; 0x3418D0C8
0x341807B6: BD80 POP 123R7, PC}
Section .text.SystemCoreClockUpdate from blto2_FSBL_lto.o, size=828, align=4
SystemCoreClockUpdate:
0x341807B8: B08E SUB SP, SP, #56
0x341807BA: 2000 MOVS R0, #0
0x341807BC: 900D STR R0, [SP, #52]
0x341807BE: 900C STR R0, [SP, #48]
0x341807C0: 900B STR R0, [SP, #44]
0x341807C2: 900A STR R0, [SP, #40]
0x341807C4: 9009 STR R0, [SP, #36]
0x341807C6: 9008 STR R0, [SP, #32]
0x341807C8: F248 0020 MOVW R0, #0x8020
0x341807CC: F2C5 6002 MOVT R0, #0x5602
0x341807D0: 6800 LDR R0, [R0]
0x341807D2: F400 1040 AND R0, R0, #0x300000
0x341807D6: 4601 MOV R1, R0
0x341807D8: 9102 STR R1, [SP, #8]
0x341807DA: B160 CBZ R0, .L1 ; 0x341807F6
0x341807DC: 9802 LDR R0, [SP, #8]
0x341807DE: F5B0 1F80 CMP.W R0, #0x100000
0x341807E2: D016 BEQ 46L2 ; 0x34180812
0x341807E4: 9802 LDR R0, [SP, #8]
0x341807E6: F5B0 1F00 CMP.W R0, #0x200000
0x341807EA: D026 BEQ 46L5 ; 0x3418083A
0x341807EC: 9802 LDR R0, [SP, #8]
0x341807EE: F5B0 1F40 CMP.W R0, #0x300000
0x341807F2: D028 BEQ 46L6 ; 0x34180846
0x341807F4: E174 B 46L23 ; 0x34180AE0
.L1:
0x341807F6: F248 0048 MOVW R0, #0x8048
0x341807FA: F2C5 6002 MOVT R0, #0x5602
0x341807FE: 6800 LDR R0, [R0]
0x34180800: F3C0 11C1 UBFX R1, R0, #7, #2
0x34180804: F249 0000 MOVW R0, #0x9000
0x34180808: F2C0 30D0 MOVT R0, #0x03D0
0x3418080C: 40C8 LSRS R0, R1
0x3418080E: 900D STR R0, [SP, #52]
0x34180810: E166 B 46L23 ; 0x34180AE0
.L2:
0x34180812: F248 0044 MOVW R0, #0x8044
0x34180816: F2C5 6002 MOVT R0, #0x5602
0x3418081A: 6800 LDR R0, [R0]
0x3418081C: 0580 LSLS R0, R0, #22
0x3418081E: 2800 CMP R0, #0
0x34180820: D405 BMI 46L3 ; 0x3418082E
0x34180822: F640 1000 MOVW R0, #0x0900
0x34180826: F2C0 003D MOVT R0, #61
0x3418082A: 900D STR R0, [SP, #52]
0x3418082C: E004 B 46L4 ; 0x34180838
.L3:
0x3418082E: F242 4000 MOVW R0, #0x2400
0x34180832: F2C0 00F4 MOVT R0, #244
0x34180836: 900D STR R0, [SP, #52]
.L4:
0x34180838: E152 B 46L23 ; 0x34180AE0
.L5:
0x3418083A: F646 4000 MOVW R0, #0x6C00
0x3418083E: F2C0 20DC MOVT R0, #0x02DC
0x34180842: 900D STR R0, [SP, #52]
0x34180844: E14C B 46L23 ; 0x34180AE0
.L6:
0x34180846: F248 00C4 MOVW R0, #0x80C4
0x3418084A: F2C5 6002 MOVT R0, #0x5602
0x3418084E: 6800 LDR R0, [R0]
0x34180850: F000 5040 AND R0, R0, #0x30000000
0x34180854: 4601 MOV R1, R0
0x34180856: 9101 STR R1, [SP, #4]
0x34180858: B140 CBZ R0, .L7 ; 0x3418086C
0x3418085A: 9801 LDR R0, [SP, #4]
0x3418085C: F1B0 5F80 CMP.W R0, #0x10000000
0x34180860: D033 BEQ 46L9 ; 0x341808CA
0x34180862: 9801 LDR R0, [SP, #4]
0x34180864: F1B0 5F00 CMP.W R0, #0x20000000
0x34180868: D05E BEQ 46L11 ; 0x34180928
0x3418086A: E08C B 46L13 ; 0x34180986
.L7:
0x3418086C: F248 0080 MOVW R0, #0x8080
0x34180870: F2C5 6002 MOVT R0, #0x5602
0x34180874: 6800 LDR R0, [R0]
0x34180876: 9007 STR R0, [SP, #28]
0x34180878: 9807 LDR R0, [SP, #28]
0x3418087A: F000 40E0 AND R0, R0, #0x70000000
0x3418087E: 9006 STR R0, [SP, #24]
0x34180880: 9807 LDR R0, [SP, #28]
0x34180882: F000 6000 AND R0, R0, #0x08000000
0x34180886: 9005 STR R0, [SP, #20]
0x34180888: 9805 LDR R0, [SP, #20]
0x3418088A: B9E8 CBNZ R0, .L8 ; 0x341808C8
0x3418088C: 9807 LDR R0, [SP, #28]
0x3418088E: F3C0 5005 UBFX R0, R0, #20, #6
0x34180892: 900C STR R0, [SP, #48]
0x34180894: 9807 LDR R0, [SP, #28]
0x34180896: F3C0 200B UBFX R0, R0, #8, #12
0x3418089A: 900B STR R0, [SP, #44]
0x3418089C: F248 0084 MOVW R0, #0x8084
0x341808A0: F2C5 6002 MOVT R0, #0x5602
0x341808A4: 6800 LDR R0, [R0]
0x341808A6: F020 407F BIC R0, R0, #0xFF000000
0x341808AA: 900A STR R0, [SP, #40]
0x341808AC: F248 0088 MOVW R0, #0x8088
0x341808B0: F2C5 6002 MOVT R0, #0x5602
0x341808B4: 6800 LDR R0, [R0]
0x341808B6: 9007 STR R0, [SP, #28]
0x341808B8: 9807 LDR R0, [SP, #28]
0x341808BA: F3C0 60C2 UBFX R0, R0, #27, #3
0x341808BE: 9009 STR R0, [SP, #36]
0x341808C0: 9807 LDR R0, [SP, #28]
0x341808C2: F3C0 6002 UBFX R0, R0, #24, #3
0x341808C6: 9008 STR R0, [SP, #32]
.L8:
0x341808C8: E08B B 46L14 ; 0x341809E2
.L9:
0x341808CA: F248 0090 MOVW R0, #0x8090
0x341808CE: F2C5 6002 MOVT R0, #0x5602
0x341808D2: 6800 LDR R0, [R0]
0x341808D4: 9007 STR R0, [SP, #28]
0x341808D6: 9807 LDR R0, [SP, #28]
0x341808D8: F000 40E0 AND R0, R0, #0x70000000
0x341808DC: 9006 STR R0, [SP, #24]
0x341808DE: 9807 LDR R0, [SP, #28]
0x341808E0: F000 6000 AND R0, R0, #0x08000000
0x341808E4: 9005 STR R0, [SP, #20]
0x341808E6: 9805 LDR R0, [SP, #20]
0x341808E8: B9E8 CBNZ R0, .L10 ; 0x34180926
0x341808EA: 9807 LDR R0, [SP, #28]
0x341808EC: F3C0 5005 UBFX R0, R0, #20, #6
0x341808F0: 900C STR R0, [SP, #48]
0x341808F2: 9807 LDR R0, [SP, #28]
0x341808F4: F3C0 200B UBFX R0, R0, #8, #12
0x341808F8: 900B STR R0, [SP, #44]
0x341808FA: F248 0094 MOVW R0, #0x8094
0x341808FE: F2C5 6002 MOVT R0, #0x5602
0x34180902: 6800 LDR R0, [R0]
0x34180904: F020 407F BIC R0, R0, #0xFF000000
0x34180908: 900A STR R0, [SP, #40]
0x3418090A: F248 0098 MOVW R0, #0x8098
0x3418090E: F2C5 6002 MOVT R0, #0x5602
0x34180912: 6800 LDR R0, [R0]
0x34180914: 9007 STR R0, [SP, #28]
0x34180916: 9807 LDR R0, [SP, #28]
0x34180918: F3C0 60C2 UBFX R0, R0, #27, #3
0x3418091C: 9009 STR R0, [SP, #36]
0x3418091E: 9807 LDR R0, [SP, #28]
0x34180920: F3C0 6002 UBFX R0, R0, #24, #3
0x34180924: 9008 STR R0, [SP, #32]
.L10:
0x34180926: E05C B 46L14 ; 0x341809E2
.L11:
0x34180928: F248 00A0 MOVW R0, #0x80A0
0x3418092C: F2C5 6002 MOVT R0, #0x5602
0x34180930: 6800 LDR R0, [R0]
0x34180932: 9007 STR R0, [SP, #28]
0x34180934: 9807 LDR R0, [SP, #28]
0x34180936: F000 40E0 AND R0, R0, #0x70000000
0x3418093A: 9006 STR R0, [SP, #24]
0x3418093C: 9807 LDR R0, [SP, #28]
0x3418093E: F000 6000 AND R0, R0, #0x08000000
0x34180942: 9005 STR R0, [SP, #20]
0x34180944: 9805 LDR R0, [SP, #20]
0x34180946: B9E8 CBNZ R0, .L12 ; 0x34180984
0x34180948: 9807 LDR R0, [SP, #28]
0x3418094A: F3C0 5005 UBFX R0, R0, #20, #6
0x3418094E: 900C STR R0, [SP, #48]
0x34180950: 9807 LDR R0, [SP, #28]
0x34180952: F3C0 200B UBFX R0, R0, #8, #12
0x34180956: 900B STR R0, [SP, #44]
0x34180958: F248 00A4 MOVW R0, #0x80A4
0x3418095C: F2C5 6002 MOVT R0, #0x5602
0x34180960: 6800 LDR R0, [R0]
0x34180962: F020 407F BIC R0, R0, #0xFF000000
0x34180966: 900A STR R0, [SP, #40]
0x34180968: F248 00A8 MOVW R0, #0x80A8
0x3418096C: F2C5 6002 MOVT R0, #0x5602
0x34180970: 6800 LDR R0, [R0]
0x34180972: 9007 STR R0, [SP, #28]
0x34180974: 9807 LDR R0, [SP, #28]
0x34180976: F3C0 60C2 UBFX R0, R0, #27, #3
0x3418097A: 9009 STR R0, [SP, #36]
0x3418097C: 9807 LDR R0, [SP, #28]
0x3418097E: F3C0 6002 UBFX R0, R0, #24, #3
0x34180982: 9008 STR R0, [SP, #32]
.L12:
0x34180984: E02D B 46L14 ; 0x341809E2
.L13:
0x34180986: F248 00B0 MOVW R0, #0x80B0
0x3418098A: F2C5 6002 MOVT R0, #0x5602
0x3418098E: 6800 LDR R0, [R0]
0x34180990: 9007 STR R0, [SP, #28]
0x34180992: 9807 LDR R0, [SP, #28]
0x34180994: F000 40E0 AND R0, R0, #0x70000000
0x34180998: 9006 STR R0, [SP, #24]
0x3418099A: 9807 LDR R0, [SP, #28]
0x3418099C: F000 6000 AND R0, R0, #0x08000000
0x341809A0: 9005 STR R0, [SP, #20]
0x341809A2: 9805 LDR R0, [SP, #20]
0x341809A4: B9E8 CBNZ R0, .L14 ; 0x341809E2
0x341809A6: 9807 LDR R0, [SP, #28]
0x341809A8: F3C0 5005 UBFX R0, R0, #20, #6
0x341809AC: 900C STR R0, [SP, #48]
0x341809AE: 9807 LDR R0, [SP, #28]
0x341809B0: F3C0 200B UBFX R0, R0, #8, #12
0x341809B4: 900B STR R0, [SP, #44]
0x341809B6: F248 00B4 MOVW R0, #0x80B4
0x341809BA: F2C5 6002 MOVT R0, #0x5602
0x341809BE: 6800 LDR R0, [R0]
0x341809C0: F020 407F BIC R0, R0, #0xFF000000
0x341809C4: 900A STR R0, [SP, #40]
0x341809C6: F248 00B8 MOVW R0, #0x80B8
0x341809CA: F2C5 6002 MOVT R0, #0x5602
0x341809CE: 6800 LDR R0, [R0]
0x341809D0: 9007 STR R0, [SP, #28]
0x341809D2: 9807 LDR R0, [SP, #28]
0x341809D4: F3C0 60C2 UBFX R0, R0, #27, #3
0x341809D8: 9009 STR R0, [SP, #36]
0x341809DA: 9807 LDR R0, [SP, #28]
0x341809DC: F3C0 6002 UBFX R0, R0, #24, #3
0x341809E0: 9008 STR R0, [SP, #32]
.L14:
0x341809E2: 9806 LDR R0, [SP, #24]
0x341809E4: 9000 STR R0, [SP, #0]
0x341809E6: B160 CBZ R0, .L15 ; 0x34180A02
0x341809E8: 9800 LDR R0, [SP, #0]
0x341809EA: F1B0 5F80 CMP.W R0, #0x10000000
0x341809EE: D016 BEQ 46L16 ; 0x34180A1E
0x341809F0: 9800 LDR R0, [SP, #0]
0x341809F2: F1B0 5F00 CMP.W R0, #0x20000000
0x341809F6: D026 BEQ 46L19 ; 0x34180A46
0x341809F8: 9800 LDR R0, [SP, #0]
0x341809FA: F1B0 5F40 CMP.W R0, #0x30000000
0x341809FE: D028 BEQ 46L20 ; 0x34180A52
0x34180A00: E02D B 46L21 ; 0x34180A5E
.L15:
0x34180A02: F248 0048 MOVW R0, #0x8048
0x34180A06: F2C5 6002 MOVT R0, #0x5602
0x34180A0A: 6800 LDR R0, [R0]
0x34180A0C: F3C0 11C1 UBFX R1, R0, #7, #2
0x34180A10: F249 0000 MOVW R0, #0x9000
0x34180A14: F2C0 30D0 MOVT R0, #0x03D0
0x34180A18: 40C8 LSRS R0, R1
0x34180A1A: 900D STR R0, [SP, #52]
0x34180A1C: E01F B 46L21 ; 0x34180A5E
.L16:
0x34180A1E: F248 0044 MOVW R0, #0x8044
0x34180A22: F2C5 6002 MOVT R0, #0x5602
0x34180A26: 6800 LDR R0, [R0]
0x34180A28: 0580 LSLS R0, R0, #22
0x34180A2A: 2800 CMP R0, #0
0x34180A2C: D405 BMI 46L17 ; 0x34180A3A
0x34180A2E: F640 1000 MOVW R0, #0x0900
0x34180A32: F2C0 003D MOVT R0, #61
0x34180A36: 900D STR R0, [SP, #52]
0x34180A38: E004 B 46L18 ; 0x34180A44
.L17:
0x34180A3A: F242 4000 MOVW R0, #0x2400
0x34180A3E: F2C0 00F4 MOVT R0, #244
0x34180A42: 900D STR R0, [SP, #52]
.L18:
0x34180A44: E00B B 46L21 ; 0x34180A5E
.L19:
0x34180A46: F646 4000 MOVW R0, #0x6C00
0x34180A4A: F2C0 20DC MOVT R0, #0x02DC
0x34180A4E: 900D STR R0, [SP, #52]
0x34180A50: E005 B 46L21 ; 0x34180A5E
.L20:
0x34180A52: F248 0000 MOVW R0, #0x8000
0x34180A56: F2C0 00BB MOVT R0, #187
0x34180A5A: 900D STR R0, [SP, #52]
0x34180A5C: E7FF B 46L21 ; 0x34180A5E
.L21:
0x34180A5E: 9805 LDR R0, [SP, #20]
0x34180A60: BB68 CBNZ R0, .L22 ; 0x34180ABE
0x34180A62: ED9D 0A0D VLDR S0, [SP, #52]
0x34180A66: EEB8 0A40 VCVT.F32.U32 S0, S0
0x34180A6A: ED9D 1A0B VLDR S2, [SP, #44]
0x34180A6E: EEB8 1A41 VCVT.F32.U32 S2, S2
0x34180A72: ED9D 2A0A VLDR S4, [SP, #40]
0x34180A76: EEB8 2A42 VCVT.F32.U32 S4, S4
0x34180A7A: ED9F 3A1D VLDR S6, =0x33800000 ; [PC, #116] [0x34180AF0]
0x34180A7E: EE22 2A03 VMUL.F32 S4, S4, S6
0x34180A82: EE31 1A02 VADD.F32 S2, S2, S4
0x34180A86: EE20 0A01 VMUL.F32 S0, S0, S2
0x34180A8A: ED9D 1A0C VLDR S2, [SP, #48]
0x34180A8E: EEB8 1A41 VCVT.F32.U32 S2, S2
0x34180A92: EE80 0A01 VDIV.F32 S0, S0, S2
0x34180A96: ED8D 0A03 VSTR S0, [SP, #12]
0x34180A9A: ED9D 0A03 VLDR S0, [SP, #12]
0x34180A9E: ED9D 1A09 VLDR S2, [SP, #36]
0x34180AA2: EEB8 1A41 VCVT.F32.U32 S2, S2
0x34180AA6: ED9D 2A08 VLDR S4, [SP, #32]
0x34180AAA: EEB8 2A42 VCVT.F32.U32 S4, S4
0x34180AAE: EE21 1A02 VMUL.F32 S2, S2, S4
0x34180AB2: EE80 0A01 VDIV.F32 S0, S0, S2
0x34180AB6: EEBC 0AC0 VCVT.U32.F32 S0, S0
0x34180ABA: ED8D 0A0D VSTR S0, [SP, #52]
.L22:
0x34180ABE: F248 00C4 MOVW R0, #0x80C4
0x34180AC2: F2C5 6002 MOVT R0, #0x5602
0x34180AC6: 6800 LDR R0, [R0]
0x34180AC8: F400 017F AND R1, R0, #0xFF0000
0x34180ACC: 2001 MOVS R0, #1
0x34180ACE: EB00 4011 ADD.W R0, R0, R1, LSR #16
0x34180AD2: 9004 STR R0, [SP, #16]
0x34180AD4: 980D LDR R0, [SP, #52]
0x34180AD6: 9904 LDR R1, [SP, #16]
0x34180AD8: FBB0 F0F1 UDIV R0, R0, R1
0x34180ADC: 900D STR R0, [SP, #52]
0x34180ADE: E7FF B 46L23 ; 0x34180AE0
.L23:
0x34180AE0: 980D LDR R0, [SP, #52]
0x34180AE2: F240 21A4 MOVW R1, #0x02A4 ; 0x340002A4 = SystemCoreClock
0x34180AE6: F2C3 4100 MOVT R1, #0x3400 ; 0x340002A4 = SystemCoreClock
0x34180AEA: 6008 STR R0, [R1]
0x34180AEC: B00E ADD SP, SP, #56
0x34180AEE: 4770 BX LR
0x34180AF0: 33800000 DC.W 0x33800000
Section .text.HAL_XSPI_MspInit from blto2_FSBL_lto.o, size=324, align=4
HAL_XSPI_MspInit:
0x34180AF4: B580 PUSH 123R7, LR}
0x34180AF6: B0F2 SUB SP, SP, #0x01C8
0x34180AF8: 9071 STR R0, [SP, #0x01C4]
0x34180AFA: 2000 MOVS R0, #0
0x34180AFC: 9070 STR R0, [SP, #0x01C0]
0x34180AFE: 906F STR R0, [SP, #0x01BC]
0x34180B00: 906E STR R0, [SP, #0x01B8]
0x34180B02: 906D STR R0, [SP, #0x01B4]
0x34180B04: 906C STR R0, [SP, #0x01B0]
0x34180B06: A808 ADD R0, SP, #32
0x34180B08: F44F 71C8 MOV.W R1, #0x0190
0x34180B0C: F00B FF26 BL __aeabi_memclr ; 0x3418C95C
0x34180B10: 9871 LDR R0, [SP, #0x01C4]
0x34180B12: 6800 LDR R0, [R0]
0x34180B14: F24A 0100 MOVW R1, #0xA000
0x34180B18: F6C5 0102 MOVT R1, #0x5802
0x34180B1C: 4288 CMP R0, R1
0x34180B1E: F040 8089 BNE.W 46L5 ; 0x34180C34
0x34180B22: 2000 MOVS R0, #0
0x34180B24: 9005 STR R0, [SP, #20]
0x34180B26: 2002 MOVS R0, #2
0x34180B28: 9003 STR R0, [SP, #12]
0x34180B2A: F00C FA57 BL LL_APB4_GRP2_EnableClock.5 ; 0x3418CFDC
0x34180B2E: 2001 MOVS R0, #1
0x34180B30: 9004 STR R0, [SP, #16]
0x34180B32: F00C FA53 BL LL_APB4_GRP2_EnableClock.5 ; 0x3418CFDC
0x34180B36: F44F 2080 MOV.W R0, #0x040000
0x34180B3A: F00C FA61 BL LL_AHB4_GRP1_EnableClock.6 ; 0x3418D000
0x34180B3E: F00C FDA5 BL HAL_PWREx_EnableVddIO3 ; 0x3418D68C
0x34180B42: 9803 LDR R0, [SP, #12]
0x34180B44: 9904 LDR R1, [SP, #16]
0x34180B46: F00C FD2F BL HAL_PWREx_ConfigVddIORange ; 0x3418D5A8
0x34180B4A: F249 0000 MOVW R0, #0x9000
0x34180B4E: F2C5 6000 MOVT R0, #0x5600
0x34180B52: 9006 STR R0, [SP, #24]
0x34180B54: A806 ADD R0, SP, #24
0x34180B56: 217C MOVS R1, #124
0x34180B58: AA05 ADD R2, SP, #20
0x34180B5A: F000 F88B BL HAL_BSEC_OTP_Read ; 0x34180C74
0x34180B5E: B108 CBZ R0, .L1 ; 0x34180B64
0x34180B60: F7FF FE20 BL Error_Handler ; 0x341807A4
.L1:
0x34180B64: F89D 0015 LDRB.W R0, [SP, #21]
0x34180B68: 0600 LSLS R0, R0, #24
0x34180B6A: 2800 CMP R0, #0
0x34180B6C: D531 BPL 46L3 ; 0x34180BD2
0x34180B6E: 2000 MOVS R0, #0
0x34180B70: 900E STR R0, [SP, #56]
0x34180B72: 2106 MOVS R1, #6
0x34180B74: 910F STR R1, [SP, #60]
0x34180B76: F44F 0100 MOV.W R1, #0x800000
0x34180B7A: 9109 STR R1, [SP, #36]
0x34180B7C: 9008 STR R0, [SP, #32]
0x34180B7E: F240 4014 MOVW R0, #0x0414
0x34180B82: F2C0 3002 MOVT R0, #0x0302
0x34180B86: 9034 STR R0, [SP, #208]
0x34180B88: A808 ADD R0, SP, #32
0x34180B8A: F000 FF95 BL HAL_RCCEx_PeriphCLKConfig ; 0x34181AB8
0x34180B8E: B108 CBZ R0, .L2 ; 0x34180B94
0x34180B90: F7FF FE08 BL Error_Handler ; 0x341807A4
.L2:
0x34180B94: F44F 5000 MOV.W R0, #0x2000
0x34180B98: 9002 STR R0, [SP, #8]
0x34180B9A: F00C FA43 BL LL_AHB5_GRP1_EnableClock ; 0x3418D024
0x34180B9E: F44F 5080 MOV.W R0, #0x1000
0x34180BA2: F00C FA3F BL LL_AHB5_GRP1_EnableClock ; 0x3418D024
0x34180BA6: 9802 LDR R0, [SP, #8]
0x34180BA8: F00C FA2A BL LL_AHB4_GRP1_EnableClock.6 ; 0x3418D000
0x34180BAC: F640 707F MOVW R0, #0x0F7F
0x34180BB0: 906C STR R0, [SP, #0x01B0]
0x34180BB2: 2002 MOVS R0, #2
0x34180BB4: 906D STR R0, [SP, #0x01B4]
0x34180BB6: 2000 MOVS R0, #0
0x34180BB8: 906E STR R0, [SP, #0x01B8]
0x34180BBA: 2003 MOVS R0, #3
0x34180BBC: 906F STR R0, [SP, #0x01BC]
0x34180BBE: 2009 MOVS R0, #9
0x34180BC0: 9070 STR R0, [SP, #0x01C0]
0x34180BC2: F243 4000 MOVW R0, #0x3400
0x34180BC6: F2C5 6002 MOVT R0, #0x5602
0x34180BCA: A96C ADD R1, SP, #0x01B0
0x34180BCC: F000 F9BE BL HAL_GPIO_Init ; 0x34180F4C
0x34180BD0: E030 B 46L5 ; 0x34180C34
.L3:
0x34180BD2: F44F 0000 MOV.W R0, #0x800000
0x34180BD6: 9009 STR R0, [SP, #36]
0x34180BD8: 2000 MOVS R0, #0
0x34180BDA: 9008 STR R0, [SP, #32]
0x34180BDC: F240 4114 MOVW R1, #0x0414
0x34180BE0: F2C0 3102 MOVT R1, #0x0302
0x34180BE4: 9134 STR R1, [SP, #208]
0x34180BE6: 900E STR R0, [SP, #56]
0x34180BE8: 2018 MOVS R0, #24
0x34180BEA: 900F STR R0, [SP, #60]
0x34180BEC: A808 ADD R0, SP, #32
0x34180BEE: F000 FF63 BL HAL_RCCEx_PeriphCLKConfig ; 0x34181AB8
0x34180BF2: B108 CBZ R0, .L4 ; 0x34180BF8
0x34180BF4: F7FF FDD6 BL Error_Handler ; 0x341807A4
.L4:
0x34180BF8: F44F 5000 MOV.W R0, #0x2000
0x34180BFC: 9001 STR R0, [SP, #4]
0x34180BFE: F00C FA11 BL LL_AHB5_GRP1_EnableClock ; 0x3418D024
0x34180C02: F44F 5080 MOV.W R0, #0x1000
0x34180C06: F00C FA0D BL LL_AHB5_GRP1_EnableClock ; 0x3418D024
0x34180C0A: 9801 LDR R0, [SP, #4]
0x34180C0C: F00C F9F8 BL LL_AHB4_GRP1_EnableClock.6 ; 0x3418D000
0x34180C10: F640 707F MOVW R0, #0x0F7F
0x34180C14: 906C STR R0, [SP, #0x01B0]
0x34180C16: 2002 MOVS R0, #2
0x34180C18: 906D STR R0, [SP, #0x01B4]
0x34180C1A: 2000 MOVS R0, #0
0x34180C1C: 906E STR R0, [SP, #0x01B8]
0x34180C1E: 2003 MOVS R0, #3
0x34180C20: 906F STR R0, [SP, #0x01BC]
0x34180C22: 2009 MOVS R0, #9
0x34180C24: 9070 STR R0, [SP, #0x01C0]
0x34180C26: F243 4000 MOVW R0, #0x3400
0x34180C2A: F2C5 6002 MOVT R0, #0x5602
0x34180C2E: A96C ADD R1, SP, #0x01B0
0x34180C30: F000 F98C BL HAL_GPIO_Init ; 0x34180F4C
.L5:
0x34180C34: B072 ADD SP, SP, #0x01C8
0x34180C36: BD80 POP 123R7, PC}
Section .text.HAL_Init from blto2_FSBL_lto.o, size=48, align=4
HAL_Init:
0x34180C38: B580 PUSH 123R7, LR}
0x34180C3A: B082 SUB SP, SP, #8
0x34180C3C: 2003 MOVS R0, #3
0x34180C3E: F00C FBA3 BL HAL_NVIC_SetPriorityGrouping ; 0x3418D388
0x34180C42: F7FF FDB9 BL SystemCoreClockUpdate ; 0x341807B8
0x34180C46: 200F MOVS R0, #15
0x34180C48: F00C F9FE BL HAL_InitTick ; 0x3418D048
0x34180C4C: B118 CBZ R0, .L1 ; 0x34180C56
0x34180C4E: 2001 MOVS R0, #1
0x34180C50: F88D 0007 STRB.W R0, [SP, #7]
0x34180C54: E004 B 46L2 ; 0x34180C60
.L1:
0x34180C56: F7FF FDA7 BL HAL_MspInit ; 0x341807A8
0x34180C5A: 2000 MOVS R0, #0
0x34180C5C: F88D 0007 STRB.W R0, [SP, #7]
.L2:
0x34180C60: F89D 0007 LDRB.W R0, [SP, #7]
0x34180C64: B002 ADD SP, SP, #8
0x34180C66: BD80 POP 123R7, PC}
Section .text.HAL_GetTick from blto2_FSBL_lto.o, size=12, align=4
HAL_GetTick:
0x34180C68: F240 2098 MOVW R0, #0x0298 ; 0x34000298 = uwTick
0x34180C6C: F2C3 4000 MOVT R0, #0x3400 ; 0x34000298 = uwTick
0x34180C70: 6800 LDR R0, [R0]
0x34180C72: 4770 BX LR
Section .text.HAL_BSEC_OTP_Read from blto2_FSBL_lto.o, size=124, align=4
HAL_BSEC_OTP_Read:
0x34180C74: B580 PUSH 123R7, LR}
0x34180C76: B084 SUB SP, SP, #16
0x34180C78: 9002 STR R0, [SP, #8]
0x34180C7A: 9101 STR R1, [SP, #4]
0x34180C7C: 9200 STR R2, [SP, #0]
0x34180C7E: 9802 LDR R0, [SP, #8]
0x34180C80: B918 CBNZ R0, .L1 ; 0x34180C8A
0x34180C82: 2001 MOVS R0, #1
0x34180C84: F88D 000F STRB.W R0, [SP, #15]
0x34180C88: E02E B 46L8 ; 0x34180CE8
.L1:
0x34180C8A: 9800 LDR R0, [SP, #0]
0x34180C8C: B138 CBZ R0, .L2 ; 0x34180C9E
0x34180C8E: 9802 LDR R0, [SP, #8]
0x34180C90: 6800 LDR R0, [R0]
0x34180C92: F249 0100 MOVW R1, #0x9000
0x34180C96: F2C5 6100 MOVT R1, #0x5600
0x34180C9A: 4288 CMP R0, R1
0x34180C9C: D005 BEQ 46L3 ; 0x34180CAA
.L2:
0x34180C9E: 9902 LDR R1, [SP, #8]
0x34180CA0: 2001 MOVS R0, #1
0x34180CA2: 6048 STR R0, [R1, #4]
0x34180CA4: F88D 000F STRB.W R0, [SP, #15]
0x34180CA8: E01E B 46L8 ; 0x34180CE8
.L3:
0x34180CAA: 9801 LDR R0, [SP, #4]
0x34180CAC: 08C0 LSRS R0, R0, #3
0x34180CAE: 282E CMP R0, #46
0x34180CB0: D811 BHI 46L6 ; 0x34180CD6
0x34180CB2: 9802 LDR R0, [SP, #8]
0x34180CB4: 9901 LDR R1, [SP, #4]
0x34180CB6: F00C FA3D BL HAL_BSEC_OTP_Reload ; 0x3418D134
0x34180CBA: B938 CBNZ R0, .L4 ; 0x34180CCC
0x34180CBC: 9802 LDR R0, [SP, #8]
0x34180CBE: 6800 LDR R0, [R0]
0x34180CC0: 9901 LDR R1, [SP, #4]
0x34180CC2: F850 0021 LDR.W R0, [R0, R1, LSL #2]
0x34180CC6: 9900 LDR R1, [SP, #0]
0x34180CC8: 6008 STR R0, [R1]
0x34180CCA: E003 B 46L5 ; 0x34180CD4
.L4:
0x34180CCC: 2001 MOVS R0, #1
0x34180CCE: F88D 000F STRB.W R0, [SP, #15]
0x34180CD2: E009 B 46L8 ; 0x34180CE8
.L5:
0x34180CD4: E005 B 46L7 ; 0x34180CE2
.L6:
0x34180CD6: 9902 LDR R1, [SP, #8]
0x34180CD8: 2001 MOVS R0, #1
0x34180CDA: 6048 STR R0, [R1, #4]
0x34180CDC: F88D 000F STRB.W R0, [SP, #15]
0x34180CE0: E002 B 46L8 ; 0x34180CE8
.L7:
0x34180CE2: 2000 MOVS R0, #0
0x34180CE4: F88D 000F STRB.W R0, [SP, #15]
.L8:
0x34180CE8: F89D 000F LDRB.W R0, [SP, #15]
0x34180CEC: B004 ADD SP, SP, #16
0x34180CEE: BD80 POP 123R7, PC}
Section .text.__NVIC_SetPriorityGrouping from blto2_FSBL_lto.o, size=60, align=4
__NVIC_SetPriorityGrouping:
0x34180CF0: B083 SUB SP, SP, #12
0x34180CF2: 9002 STR R0, [SP, #8]
0x34180CF4: 9802 LDR R0, [SP, #8]
0x34180CF6: F000 0007 AND R0, R0, #7
0x34180CFA: 9000 STR R0, [SP, #0]
0x34180CFC: F64E 510C MOVW R1, #0xED0C
0x34180D00: F2CE 0100 MOVT R1, #0xE000
0x34180D04: 6808 LDR R0, [R1]
0x34180D06: 9001 STR R0, [SP, #4]
0x34180D08: 9801 LDR R0, [SP, #4]
0x34180D0A: F64F 02FF MOVW R2, #0xF8FF
0x34180D0E: 4010 ANDS R0, R2
0x34180D10: 9001 STR R0, [SP, #4]
0x34180D12: 9801 LDR R0, [SP, #4]
0x34180D14: 9A00 LDR R2, [SP, #0]
0x34180D16: EA40 2002 ORR.W R0, R0, R2, LSL #8
0x34180D1A: 2200 MOVS R2, #0
0x34180D1C: F2C0 52FA MOVT R2, #0x05FA
0x34180D20: 4310 ORRS R0, R2
0x34180D22: 9001 STR R0, [SP, #4]
0x34180D24: 9801 LDR R0, [SP, #4]
0x34180D26: 6008 STR R0, [R1]
0x34180D28: B003 ADD SP, SP, #12
0x34180D2A: 4770 BX LR
Section .text.HAL_NVIC_SetPriority from blto2_FSBL_lto.o, size=168, align=4
HAL_NVIC_SetPriority:
0x34180D2C: B580 PUSH 123R7, LR}
0x34180D2E: B086 SUB SP, SP, #24
0x34180D30: F8AD 0016 STRH.W R0, [SP, #22]
0x34180D34: 9104 STR R1, [SP, #16]
0x34180D36: 9203 STR R2, [SP, #12]
0x34180D38: F9BD 0016 LDRSH.W R0, [SP, #22]
0x34180D3C: F110 0F0C CMN R0, #12
0x34180D40: DB04 BLT 46L1 ; 0x34180D4C
0x34180D42: F9BD 0016 LDRSH.W R0, [SP, #22]
0x34180D46: 3004 ADDS R0, #4
0x34180D48: B100 CBZ R0, .L1 ; 0x34180D4C
0x34180D4A: E006 B 46L2 ; 0x34180D5A
.L1:
0x34180D4C: F642 4034 MOVW R0, #0x2C34 ; 0x34192C34 = .rodata..L.str.20
0x34180D50: F2C3 4019 MOVT R0, #0x3419 ; 0x34192C34 = .rodata..L.str.20
0x34180D54: 21FF MOVS R1, #255
0x34180D56: F00B FFEB BL assert_failed ; 0x3418CD30
.L2:
0x34180D5A: F000 F83B BL __NVIC_GetPriorityGrouping ; 0x34180DD4
0x34180D5E: F000 0007 AND R0, R0, #7
0x34180D62: 9002 STR R0, [SP, #8]
0x34180D64: 9802 LDR R0, [SP, #8]
0x34180D66: 2802 CMP R0, #2
0x34180D68: D802 BHI 46L3 ; 0x34180D70
0x34180D6A: 9803 LDR R0, [SP, #12]
0x34180D6C: B138 CBZ R0, .L4 ; 0x34180D7E
0x34180D6E: E007 B 46L5 ; 0x34180D80
.L3:
0x34180D70: 9803 LDR R0, [SP, #12]
0x34180D72: 9902 LDR R1, [SP, #8]
0x34180D74: 1ECA SUBS R2, R1, #3
0x34180D76: 2101 MOVS R1, #1
0x34180D78: 4091 LSLS R1, R2
0x34180D7A: 4288 CMP R0, R1
0x34180D7C: D200 BCS 46L5 ; 0x34180D80
.L4:
0x34180D7E: E007 B 46L6 ; 0x34180D90
.L5:
0x34180D80: F642 4034 MOVW R0, #0x2C34 ; 0x34192C34 = .rodata..L.str.20
0x34180D84: F2C3 4019 MOVT R0, #0x3419 ; 0x34192C34 = .rodata..L.str.20
0x34180D88: F44F 7181 MOV.W R1, #0x0102
0x34180D8C: F00B FFD0 BL assert_failed ; 0x3418CD30
.L6:
0x34180D90: 9804 LDR R0, [SP, #16]
0x34180D92: 280F CMP R0, #15
0x34180D94: D808 BHI 46L7 ; 0x34180DA8
0x34180D96: 9804 LDR R0, [SP, #16]
0x34180D98: 9902 LDR R1, [SP, #8]
0x34180D9A: F1C1 0207 RSB R2, R1, #7
0x34180D9E: 2101 MOVS R1, #1
0x34180DA0: 4091 LSLS R1, R2
0x34180DA2: 4288 CMP R0, R1
0x34180DA4: D200 BCS 46L7 ; 0x34180DA8
0x34180DA6: E007 B 46L8 ; 0x34180DB8
.L7:
0x34180DA8: F642 4034 MOVW R0, #0x2C34 ; 0x34192C34 = .rodata..L.str.20
0x34180DAC: F2C3 4019 MOVT R0, #0x3419 ; 0x34192C34 = .rodata..L.str.20
0x34180DB0: F240 1103 MOVW R1, #0x0103
0x34180DB4: F00B FFBC BL assert_failed ; 0x3418CD30
.L8:
0x34180DB8: F9BD 0016 LDRSH.W R0, [SP, #22]
0x34180DBC: 9001 STR R0, [SP, #4]
0x34180DBE: 9802 LDR R0, [SP, #8]
0x34180DC0: 9904 LDR R1, [SP, #16]
0x34180DC2: 9A03 LDR R2, [SP, #12]
0x34180DC4: F000 F80E BL NVIC_EncodePriority ; 0x34180DE4
0x34180DC8: 4601 MOV R1, R0
0x34180DCA: 9801 LDR R0, [SP, #4]
0x34180DCC: F00C FAFC BL __NVIC_SetPriority ; 0x3418D3C8
0x34180DD0: B006 ADD SP, SP, #24
0x34180DD2: BD80 POP 123R7, PC}
Section .text.__NVIC_GetPriorityGrouping from blto2_FSBL_lto.o, size=16, align=4
__NVIC_GetPriorityGrouping:
0x34180DD4: F64E 500C MOVW R0, #0xED0C
0x34180DD8: F2CE 0000 MOVT R0, #0xE000
0x34180DDC: 6800 LDR R0, [R0]
0x34180DDE: F3C0 2002 UBFX R0, R0, #8, #3
0x34180DE2: 4770 BX LR
Section .text.NVIC_EncodePriority from blto2_FSBL_lto.o, size=100, align=4
NVIC_EncodePriority:
0x34180DE4: B088 SUB SP, SP, #32
0x34180DE6: 9007 STR R0, [SP, #28]
0x34180DE8: 9106 STR R1, [SP, #24]
0x34180DEA: 9205 STR R2, [SP, #20]
0x34180DEC: 9807 LDR R0, [SP, #28]
0x34180DEE: F000 0007 AND R0, R0, #7
0x34180DF2: 9004 STR R0, [SP, #16]
0x34180DF4: 9804 LDR R0, [SP, #16]
0x34180DF6: F1C0 0007 RSB R0, R0, #7
0x34180DFA: 2805 CMP R0, #5
0x34180DFC: D302 BCC 46L1 ; 0x34180E04
0x34180DFE: 2004 MOVS R0, #4
0x34180E00: 9001 STR R0, [SP, #4]
0x34180E02: E003 B 46L2 ; 0x34180E0C
.L1:
0x34180E04: 9804 LDR R0, [SP, #16]
0x34180E06: F1C0 0007 RSB R0, R0, #7
0x34180E0A: 9001 STR R0, [SP, #4]
.L2:
0x34180E0C: 9801 LDR R0, [SP, #4]
0x34180E0E: 9003 STR R0, [SP, #12]
0x34180E10: 9804 LDR R0, [SP, #16]
0x34180E12: 3004 ADDS R0, #4
0x34180E14: 2806 CMP R0, #6
0x34180E16: D802 BHI 46L3 ; 0x34180E1E
0x34180E18: 2000 MOVS R0, #0
0x34180E1A: 9000 STR R0, [SP, #0]
0x34180E1C: E002 B 46L4 ; 0x34180E24
.L3:
0x34180E1E: 9804 LDR R0, [SP, #16]
0x34180E20: 3803 SUBS R0, #3
0x34180E22: 9000 STR R0, [SP, #0]
.L4:
0x34180E24: 9800 LDR R0, [SP, #0]
0x34180E26: 9002 STR R0, [SP, #8]
0x34180E28: 9806 LDR R0, [SP, #24]
0x34180E2A: 9903 LDR R1, [SP, #12]
0x34180E2C: 2201 MOVS R2, #1
0x34180E2E: FA02 F101 LSL.W R1, R2, R1
0x34180E32: 3901 SUBS R1, #1
0x34180E34: 4008 ANDS R0, R1
0x34180E36: 9B02 LDR R3, [SP, #8]
0x34180E38: 4098 LSLS R0, R3
0x34180E3A: 9905 LDR R1, [SP, #20]
0x34180E3C: 409A LSLS R2, R3
0x34180E3E: 3A01 SUBS R2, #1
0x34180E40: 4011 ANDS R1, R2
0x34180E42: 4308 ORRS R0, R1
0x34180E44: B008 ADD SP, SP, #32
0x34180E46: 4770 BX LR
Section .text.HAL_SYSTICK_Config from blto2_FSBL_lto.o, size=16, align=4
HAL_SYSTICK_Config:
0x34180E48: B580 PUSH 123R7, LR}
0x34180E4A: B082 SUB SP, SP, #8
0x34180E4C: 9001 STR R0, [SP, #4]
0x34180E4E: 9801 LDR R0, [SP, #4]
0x34180E50: F00C FADA BL SysTick_Config ; 0x3418D408
0x34180E54: B002 ADD SP, SP, #8
0x34180E56: BD80 POP 123R7, PC}
Section .text.HAL_DMA_Abort from blto2_FSBL_lto.o, size=244, align=4
HAL_DMA_Abort:
0x34180E58: B580 PUSH 123R7, LR}
0x34180E5A: B084 SUB SP, SP, #16
0x34180E5C: 9002 STR R0, [SP, #8]
0x34180E5E: F7FF FF03 BL HAL_GetTick ; 0x34180C68
0x34180E62: 9001 STR R0, [SP, #4]
0x34180E64: 9802 LDR R0, [SP, #8]
0x34180E66: B918 CBNZ R0, .L1 ; 0x34180E70
0x34180E68: 2001 MOVS R0, #1
0x34180E6A: F88D 000F STRB.W R0, [SP, #15]
0x34180E6E: E069 B 46L8 ; 0x34180F44
.L1:
0x34180E70: 9802 LDR R0, [SP, #8]
0x34180E72: F890 0054 LDRB.W R0, [R0, #84]
0x34180E76: 2802 CMP R0, #2
0x34180E78: D00A BEQ 46L2 ; 0x34180E90
0x34180E7A: 9902 LDR R1, [SP, #8]
0x34180E7C: 2020 MOVS R0, #32
0x34180E7E: 6588 STR R0, [R1, #88]
0x34180E80: 9902 LDR R1, [SP, #8]
0x34180E82: 2000 MOVS R0, #0
0x34180E84: F881 004C STRB.W R0, [R1, #76]
0x34180E88: 2001 MOVS R0, #1
0x34180E8A: F88D 000F STRB.W R0, [SP, #15]
0x34180E8E: E059 B 46L8 ; 0x34180F44
.L2:
0x34180E90: 9802 LDR R0, [SP, #8]
0x34180E92: 6801 LDR R1, [R0]
0x34180E94: 6948 LDR R0, [R1, #20]
0x34180E96: F040 0004 ORR R0, R0, #4
0x34180E9A: 6148 STR R0, [R1, #20]
0x34180E9C: 9902 LDR R1, [SP, #8]
0x34180E9E: 2005 MOVS R0, #5
0x34180EA0: F881 0054 STRB.W R0, [R1, #84]
.L3:
0x34180EA4: 9802 LDR R0, [SP, #8]
0x34180EA6: 6800 LDR R0, [R0]
0x34180EA8: 6900 LDR R0, [R0, #16]
0x34180EAA: 0480 LSLS R0, R0, #18
0x34180EAC: 2800 CMP R0, #0
0x34180EAE: D421 BMI 46L6 ; 0x34180EF4
0x34180EB0: F7FF FEDA BL HAL_GetTick ; 0x34180C68
0x34180EB4: 9901 LDR R1, [SP, #4]
0x34180EB6: 1A40 SUBS R0, R0, R1
0x34180EB8: 2806 CMP R0, #6
0x34180EBA: D31A BCC 46L5 ; 0x34180EF2
0x34180EBC: 9902 LDR R1, [SP, #8]
0x34180EBE: 6D88 LDR R0, [R1, #88]
0x34180EC0: F040 0010 ORR R0, R0, #16
0x34180EC4: 6588 STR R0, [R1, #88]
0x34180EC6: 9902 LDR R1, [SP, #8]
0x34180EC8: 2003 MOVS R0, #3
0x34180ECA: F881 0054 STRB.W R0, [R1, #84]
0x34180ECE: 9802 LDR R0, [SP, #8]
0x34180ED0: F890 0050 LDRB.W R0, [R0, #80]
0x34180ED4: 0600 LSLS R0, R0, #24
0x34180ED6: 2800 CMP R0, #0
0x34180ED8: D503 BPL 46L4 ; 0x34180EE2
0x34180EDA: 9802 LDR R0, [SP, #8]
0x34180EDC: 6F41 LDR R1, [R0, #116]
0x34180EDE: 2001 MOVS R0, #1
0x34180EE0: 7308 STRB R0, [R1, #12]
.L4:
0x34180EE2: 9902 LDR R1, [SP, #8]
0x34180EE4: 2000 MOVS R0, #0
0x34180EE6: F881 004C STRB.W R0, [R1, #76]
0x34180EEA: 2001 MOVS R0, #1
0x34180EEC: F88D 000F STRB.W R0, [SP, #15]
0x34180EF0: E028 B 46L8 ; 0x34180F44
.L5:
0x34180EF2: E7D7 B 46L3 ; 0x34180EA4
.L6:
0x34180EF4: 9802 LDR R0, [SP, #8]
0x34180EF6: 6801 LDR R1, [R0]
0x34180EF8: 6948 LDR R0, [R1, #20]
0x34180EFA: F040 0002 ORR R0, R0, #2
0x34180EFE: 6148 STR R0, [R1, #20]
0x34180F00: 9902 LDR R1, [SP, #8]
0x34180F02: 2004 MOVS R0, #4
0x34180F04: F881 0054 STRB.W R0, [R1, #84]
0x34180F08: 9802 LDR R0, [SP, #8]
0x34180F0A: 6801 LDR R1, [R0]
0x34180F0C: F44F 40FE MOV.W R0, #0x7F00
0x34180F10: 60C8 STR R0, [R1, #12]
0x34180F12: 9902 LDR R1, [SP, #8]
0x34180F14: 2001 MOVS R0, #1
0x34180F16: F881 0054 STRB.W R0, [R1, #84]
0x34180F1A: 9802 LDR R0, [SP, #8]
0x34180F1C: F890 0050 LDRB.W R0, [R0, #80]
0x34180F20: 0600 LSLS R0, R0, #24
0x34180F22: 2800 CMP R0, #0
0x34180F24: D507 BPL 46L7 ; 0x34180F36
0x34180F26: 9802 LDR R0, [SP, #8]
0x34180F28: 6F41 LDR R1, [R0, #116]
0x34180F2A: 2001 MOVS R0, #1
0x34180F2C: 7308 STRB R0, [R1, #12]
0x34180F2E: 9802 LDR R0, [SP, #8]
0x34180F30: 6801 LDR R1, [R0]
0x34180F32: 2000 MOVS R0, #0
0x34180F34: 6488 STR R0, [R1, #72]
.L7:
0x34180F36: 9902 LDR R1, [SP, #8]
0x34180F38: 2000 MOVS R0, #0
0x34180F3A: F881 004C STRB.W R0, [R1, #76]
0x34180F3E: 2000 MOVS R0, #0
0x34180F40: F88D 000F STRB.W R0, [SP, #15]
.L8:
0x34180F44: F89D 000F LDRB.W R0, [SP, #15]
0x34180F48: B004 ADD SP, SP, #16
0x34180F4A: BD80 POP 123R7, PC}
Section .text.HAL_GPIO_Init from blto2_FSBL_lto.o, size=1928, align=4
HAL_GPIO_Init:
0x34180F4C: B580 PUSH 123R7, LR}
0x34180F4E: B090 SUB SP, SP, #64
0x34180F50: 900F STR R0, [SP, #60]
0x34180F52: 910E STR R1, [SP, #56]
0x34180F54: 2000 MOVS R0, #0
0x34180F56: 900D STR R0, [SP, #52]
0x34180F58: 980F LDR R0, [SP, #60]
0x34180F5A: 2100 MOVS R1, #0
0x34180F5C: F2C5 6102 MOVT R1, #0x5602
0x34180F60: 4288 CMP R0, R1
0x34180F62: F000 80A4 BEQ.W 46L1 ; 0x341810AE
0x34180F66: 980F LDR R0, [SP, #60]
0x34180F68: 2100 MOVS R1, #0
0x34180F6A: F2C4 6102 MOVT R1, #0x4602
0x34180F6E: 4288 CMP R0, R1
0x34180F70: F000 809D BEQ.W 46L1 ; 0x341810AE
0x34180F74: 980F LDR R0, [SP, #60]
0x34180F76: F240 4100 MOVW R1, #0x0400
0x34180F7A: F2C5 6102 MOVT R1, #0x5602
0x34180F7E: 4288 CMP R0, R1
0x34180F80: F000 8095 BEQ.W 46L1 ; 0x341810AE
0x34180F84: 980F LDR R0, [SP, #60]
0x34180F86: F240 4100 MOVW R1, #0x0400
0x34180F8A: F2C4 6102 MOVT R1, #0x4602
0x34180F8E: 4288 CMP R0, R1
0x34180F90: F000 808D BEQ.W 46L1 ; 0x341810AE
0x34180F94: 980F LDR R0, [SP, #60]
0x34180F96: F640 0100 MOVW R1, #0x0800
0x34180F9A: F2C5 6102 MOVT R1, #0x5602
0x34180F9E: 4288 CMP R0, R1
0x34180FA0: F000 8085 BEQ.W 46L1 ; 0x341810AE
0x34180FA4: 980F LDR R0, [SP, #60]
0x34180FA6: F640 0100 MOVW R1, #0x0800
0x34180FAA: F2C4 6102 MOVT R1, #0x4602
0x34180FAE: 4288 CMP R0, R1
0x34180FB0: D07D BEQ 46L1 ; 0x341810AE
0x34180FB2: 980F LDR R0, [SP, #60]
0x34180FB4: F640 4100 MOVW R1, #0x0C00
0x34180FB8: F2C5 6102 MOVT R1, #0x5602
0x34180FBC: 4288 CMP R0, R1
0x34180FBE: D076 BEQ 46L1 ; 0x341810AE
0x34180FC0: 980F LDR R0, [SP, #60]
0x34180FC2: F640 4100 MOVW R1, #0x0C00
0x34180FC6: F2C4 6102 MOVT R1, #0x4602
0x34180FCA: 4288 CMP R0, R1
0x34180FCC: D06F BEQ 46L1 ; 0x341810AE
0x34180FCE: 980F LDR R0, [SP, #60]
0x34180FD0: F241 0100 MOVW R1, #0x1000
0x34180FD4: F2C5 6102 MOVT R1, #0x5602
0x34180FD8: 4288 CMP R0, R1
0x34180FDA: D068 BEQ 46L1 ; 0x341810AE
0x34180FDC: 980F LDR R0, [SP, #60]
0x34180FDE: F241 0100 MOVW R1, #0x1000
0x34180FE2: F2C4 6102 MOVT R1, #0x4602
0x34180FE6: 4288 CMP R0, R1
0x34180FE8: D061 BEQ 46L1 ; 0x341810AE
0x34180FEA: 980F LDR R0, [SP, #60]
0x34180FEC: F241 4100 MOVW R1, #0x1400
0x34180FF0: F2C5 6102 MOVT R1, #0x5602
0x34180FF4: 4288 CMP R0, R1
0x34180FF6: D05A BEQ 46L1 ; 0x341810AE
0x34180FF8: 980F LDR R0, [SP, #60]
0x34180FFA: F241 4100 MOVW R1, #0x1400
0x34180FFE: F2C4 6102 MOVT R1, #0x4602
0x34181002: 4288 CMP R0, R1
0x34181004: D053 BEQ 46L1 ; 0x341810AE
0x34181006: 980F LDR R0, [SP, #60]
0x34181008: F641 0100 MOVW R1, #0x1800
0x3418100C: F2C5 6102 MOVT R1, #0x5602
0x34181010: 4288 CMP R0, R1
0x34181012: D04C BEQ 46L1 ; 0x341810AE
0x34181014: 980F LDR R0, [SP, #60]
0x34181016: F641 0100 MOVW R1, #0x1800
0x3418101A: F2C4 6102 MOVT R1, #0x4602
0x3418101E: 4288 CMP R0, R1
0x34181020: D045 BEQ 46L1 ; 0x341810AE
0x34181022: 980F LDR R0, [SP, #60]
0x34181024: F641 4100 MOVW R1, #0x1C00
0x34181028: F2C5 6102 MOVT R1, #0x5602
0x3418102C: 4288 CMP R0, R1
0x3418102E: D03E BEQ 46L1 ; 0x341810AE
0x34181030: 980F LDR R0, [SP, #60]
0x34181032: F641 4100 MOVW R1, #0x1C00
0x34181036: F2C4 6102 MOVT R1, #0x4602
0x3418103A: 4288 CMP R0, R1
0x3418103C: D037 BEQ 46L1 ; 0x341810AE
0x3418103E: 980F LDR R0, [SP, #60]
0x34181040: F243 4100 MOVW R1, #0x3400
0x34181044: F2C5 6102 MOVT R1, #0x5602
0x34181048: 4288 CMP R0, R1
0x3418104A: D030 BEQ 46L1 ; 0x341810AE
0x3418104C: 980F LDR R0, [SP, #60]
0x3418104E: F243 4100 MOVW R1, #0x3400
0x34181052: F2C4 6102 MOVT R1, #0x4602
0x34181056: 4288 CMP R0, R1
0x34181058: D029 BEQ 46L1 ; 0x341810AE
0x3418105A: 980F LDR R0, [SP, #60]
0x3418105C: F643 0100 MOVW R1, #0x3800
0x34181060: F2C5 6102 MOVT R1, #0x5602
0x34181064: 4288 CMP R0, R1
0x34181066: D022 BEQ 46L1 ; 0x341810AE
0x34181068: 980F LDR R0, [SP, #60]
0x3418106A: F643 0100 MOVW R1, #0x3800
0x3418106E: F2C4 6102 MOVT R1, #0x4602
0x34181072: 4288 CMP R0, R1
0x34181074: D01B BEQ 46L1 ; 0x341810AE
0x34181076: 980F LDR R0, [SP, #60]
0x34181078: F643 4100 MOVW R1, #0x3C00
0x3418107C: F2C5 6102 MOVT R1, #0x5602
0x34181080: 4288 CMP R0, R1
0x34181082: D014 BEQ 46L1 ; 0x341810AE
0x34181084: 980F LDR R0, [SP, #60]
0x34181086: F643 4100 MOVW R1, #0x3C00
0x3418108A: F2C4 6102 MOVT R1, #0x4602
0x3418108E: 4288 CMP R0, R1
0x34181090: D00D BEQ 46L1 ; 0x341810AE
0x34181092: 980F LDR R0, [SP, #60]
0x34181094: F244 0100 MOVW R1, #0x4000
0x34181098: F2C5 6102 MOVT R1, #0x5602
0x3418109C: 4288 CMP R0, R1
0x3418109E: D006 BEQ 46L1 ; 0x341810AE
0x341810A0: 980F LDR R0, [SP, #60]
0x341810A2: F244 0100 MOVW R1, #0x4000
0x341810A6: F2C4 6102 MOVT R1, #0x4602
0x341810AA: 4288 CMP R0, R1
0x341810AC: D100 BNE 46L2 ; 0x341810B0
.L1:
0x341810AE: E006 B 46L3 ; 0x341810BE
.L2:
0x341810B0: F642 20F0 MOVW R0, #0x2AF0 ; 0x34192AF0 = .rodata..L.str.30
0x341810B4: F2C3 4019 MOVT R0, #0x3419 ; 0x34192AF0 = .rodata..L.str.30
0x341810B8: 21AD MOVS R1, #173
0x341810BA: F00B FE39 BL assert_failed ; 0x3418CD30
.L3:
0x341810BE: 980E LDR R0, [SP, #56]
0x341810C0: 8800 LDRH R0, [R0]
0x341810C2: B118 CBZ R0, .L4 ; 0x341810CC
0x341810C4: 980E LDR R0, [SP, #56]
0x341810C6: 8840 LDRH R0, [R0, #2]
0x341810C8: B900 CBNZ R0, .L4 ; 0x341810CC
0x341810CA: E006 B 46L5 ; 0x341810DA
.L4:
0x341810CC: F642 20F0 MOVW R0, #0x2AF0 ; 0x34192AF0 = .rodata..L.str.30
0x341810D0: F2C3 4019 MOVT R0, #0x3419 ; 0x34192AF0 = .rodata..L.str.30
0x341810D4: 21AE MOVS R1, #174
0x341810D6: F00B FE2B BL assert_failed ; 0x3418CD30
.L5:
0x341810DA: 980E LDR R0, [SP, #56]
0x341810DC: 6840 LDR R0, [R0, #4]
0x341810DE: B388 CBZ R0, .L6 ; 0x34181144
0x341810E0: 980E LDR R0, [SP, #56]
0x341810E2: 6840 LDR R0, [R0, #4]
0x341810E4: 2801 CMP R0, #1
0x341810E6: D02D BEQ 46L6 ; 0x34181144
0x341810E8: 980E LDR R0, [SP, #56]
0x341810EA: 6840 LDR R0, [R0, #4]
0x341810EC: 2811 CMP R0, #17
0x341810EE: D029 BEQ 46L6 ; 0x34181144
0x341810F0: 980E LDR R0, [SP, #56]
0x341810F2: 6840 LDR R0, [R0, #4]
0x341810F4: 2802 CMP R0, #2
0x341810F6: D025 BEQ 46L6 ; 0x34181144
0x341810F8: 980E LDR R0, [SP, #56]
0x341810FA: 6840 LDR R0, [R0, #4]
0x341810FC: 2812 CMP R0, #18
0x341810FE: D021 BEQ 46L6 ; 0x34181144
0x34181100: 980E LDR R0, [SP, #56]
0x34181102: 6840 LDR R0, [R0, #4]
0x34181104: F5B0 1F88 CMP.W R0, #0x110000
0x34181108: D01C BEQ 46L6 ; 0x34181144
0x3418110A: 980E LDR R0, [SP, #56]
0x3418110C: 6840 LDR R0, [R0, #4]
0x3418110E: F5B0 1F04 CMP.W R0, #0x210000
0x34181112: D017 BEQ 46L6 ; 0x34181144
0x34181114: 980E LDR R0, [SP, #56]
0x34181116: 6840 LDR R0, [R0, #4]
0x34181118: F5B0 1F44 CMP.W R0, #0x310000
0x3418111C: D012 BEQ 46L6 ; 0x34181144
0x3418111E: 980E LDR R0, [SP, #56]
0x34181120: 6840 LDR R0, [R0, #4]
0x34181122: F5B0 1F90 CMP.W R0, #0x120000
0x34181126: D00D BEQ 46L6 ; 0x34181144
0x34181128: 980E LDR R0, [SP, #56]
0x3418112A: 6840 LDR R0, [R0, #4]
0x3418112C: F5B0 1F08 CMP.W R0, #0x220000
0x34181130: D008 BEQ 46L6 ; 0x34181144
0x34181132: 980E LDR R0, [SP, #56]
0x34181134: 6840 LDR R0, [R0, #4]
0x34181136: F5B0 1F48 CMP.W R0, #0x320000
0x3418113A: D003 BEQ 46L6 ; 0x34181144
0x3418113C: 980E LDR R0, [SP, #56]
0x3418113E: 6840 LDR R0, [R0, #4]
0x34181140: 2803 CMP R0, #3
0x34181142: D100 BNE 46L7 ; 0x34181146
.L6:
0x34181144: E006 B 46L8 ; 0x34181154
.L7:
0x34181146: F642 20F0 MOVW R0, #0x2AF0 ; 0x34192AF0 = .rodata..L.str.30
0x3418114A: F2C3 4019 MOVT R0, #0x3419 ; 0x34192AF0 = .rodata..L.str.30
0x3418114E: 21AF MOVS R1, #175
0x34181150: F00B FDEE BL assert_failed ; 0x3418CD30
.L8:
0x34181154: 980E LDR R0, [SP, #56]
0x34181156: 6800 LDR R0, [R0]
0x34181158: 990D LDR R1, [SP, #52]
0x3418115A: 40C8 LSRS R0, R1
0x3418115C: 2800 CMP R0, #0
0x3418115E: F000 82B7 BEQ.W 46L52 ; 0x341816D0
0x34181162: 980E LDR R0, [SP, #56]
0x34181164: 6800 LDR R0, [R0]
0x34181166: 9A0D LDR R2, [SP, #52]
0x34181168: 2101 MOVS R1, #1
0x3418116A: 4091 LSLS R1, R2
0x3418116C: 4008 ANDS R0, R1
0x3418116E: 900C STR R0, [SP, #48]
0x34181170: 980C LDR R0, [SP, #48]
0x34181172: 2800 CMP R0, #0
0x34181174: F000 82A8 BEQ.W 46L51 ; 0x341816C8
0x34181178: 980E LDR R0, [SP, #56]
0x3418117A: 6840 LDR R0, [R0, #4]
0x3418117C: F000 0003 AND R0, R0, #3
0x34181180: 2801 CMP R0, #1
0x34181182: D005 BEQ 46L9 ; 0x34181190
0x34181184: 980E LDR R0, [SP, #56]
0x34181186: 6840 LDR R0, [R0, #4]
0x34181188: F000 0003 AND R0, R0, #3
0x3418118C: 2802 CMP R0, #2
0x3418118E: D144 BNE 46L13 ; 0x3418121A
.L9:
0x34181190: 980E LDR R0, [SP, #56]
0x34181192: 68C0 LDR R0, [R0, #12]
0x34181194: B158 CBZ R0, .L10 ; 0x341811AE
0x34181196: 980E LDR R0, [SP, #56]
0x34181198: 68C0 LDR R0, [R0, #12]
0x3418119A: 2801 CMP R0, #1
0x3418119C: D007 BEQ 46L10 ; 0x341811AE
0x3418119E: 980E LDR R0, [SP, #56]
0x341811A0: 68C0 LDR R0, [R0, #12]
0x341811A2: 2802 CMP R0, #2
0x341811A4: D003 BEQ 46L10 ; 0x341811AE
0x341811A6: 980E LDR R0, [SP, #56]
0x341811A8: 68C0 LDR R0, [R0, #12]
0x341811AA: 2803 CMP R0, #3
0x341811AC: D100 BNE 46L11 ; 0x341811B0
.L10:
0x341811AE: E006 B 46L12 ; 0x341811BE
.L11:
0x341811B0: F642 20F0 MOVW R0, #0x2AF0 ; 0x34192AF0 = .rodata..L.str.30
0x341811B4: F2C3 4019 MOVT R0, #0x3419 ; 0x34192AF0 = .rodata..L.str.30
0x341811B8: 21BE MOVS R1, #190
0x341811BA: F00B FDB9 BL assert_failed ; 0x3418CD30
.L12:
0x341811BE: 980F LDR R0, [SP, #60]
0x341811C0: 6880 LDR R0, [R0, #8]
0x341811C2: 900B STR R0, [SP, #44]
0x341811C4: 980D LDR R0, [SP, #52]
0x341811C6: 0041 LSLS R1, R0, #1
0x341811C8: 2003 MOVS R0, #3
0x341811CA: FA00 F101 LSL.W R1, R0, R1
0x341811CE: 980B LDR R0, [SP, #44]
0x341811D0: 4388 BICS R0, R1
0x341811D2: 900B STR R0, [SP, #44]
0x341811D4: 980E LDR R0, [SP, #56]
0x341811D6: 68C0 LDR R0, [R0, #12]
0x341811D8: 990D LDR R1, [SP, #52]
0x341811DA: 0049 LSLS R1, R1, #1
0x341811DC: FA00 F101 LSL.W R1, R0, R1
0x341811E0: 980B LDR R0, [SP, #44]
0x341811E2: 4308 ORRS R0, R1
0x341811E4: 900B STR R0, [SP, #44]
0x341811E6: 980B LDR R0, [SP, #44]
0x341811E8: 990F LDR R1, [SP, #60]
0x341811EA: 6088 STR R0, [R1, #8]
0x341811EC: 980F LDR R0, [SP, #60]
0x341811EE: 6840 LDR R0, [R0, #4]
0x341811F0: 900B STR R0, [SP, #44]
0x341811F2: 990D LDR R1, [SP, #52]
0x341811F4: 2001 MOVS R0, #1
0x341811F6: FA00 F101 LSL.W R1, R0, R1
0x341811FA: 980B LDR R0, [SP, #44]
0x341811FC: 4388 BICS R0, R1
0x341811FE: 900B STR R0, [SP, #44]
0x34181200: 980E LDR R0, [SP, #56]
0x34181202: 6840 LDR R0, [R0, #4]
0x34181204: F3C0 1000 UBFX R0, R0, #4, #1
0x34181208: 990D LDR R1, [SP, #52]
0x3418120A: FA00 F101 LSL.W R1, R0, R1
0x3418120E: 980B LDR R0, [SP, #44]
0x34181210: 4308 ORRS R0, R1
0x34181212: 900B STR R0, [SP, #44]
0x34181214: 980B LDR R0, [SP, #44]
0x34181216: 990F LDR R1, [SP, #60]
0x34181218: 6048 STR R0, [R1, #4]
.L13:
0x3418121A: 980E LDR R0, [SP, #56]
0x3418121C: 6840 LDR R0, [R0, #4]
0x3418121E: 43C0 MVNS R0, R0
0x34181220: 0780 LSLS R0, R0, #30
0x34181222: B940 CBNZ R0, .L14 ; 0x34181236
0x34181224: 980E LDR R0, [SP, #56]
0x34181226: 6840 LDR R0, [R0, #4]
0x34181228: 43C0 MVNS R0, R0
0x3418122A: 0780 LSLS R0, R0, #30
0x3418122C: BB68 CBNZ R0, .L18 ; 0x3418128A
0x3418122E: 980E LDR R0, [SP, #56]
0x34181230: 6880 LDR R0, [R0, #8]
0x34181232: 2801 CMP R0, #1
0x34181234: D029 BEQ 46L18 ; 0x3418128A
.L14:
0x34181236: 980E LDR R0, [SP, #56]
0x34181238: 6880 LDR R0, [R0, #8]
0x3418123A: B138 CBZ R0, .L15 ; 0x3418124C
0x3418123C: 980E LDR R0, [SP, #56]
0x3418123E: 6880 LDR R0, [R0, #8]
0x34181240: 2801 CMP R0, #1
0x34181242: D003 BEQ 46L15 ; 0x3418124C
0x34181244: 980E LDR R0, [SP, #56]
0x34181246: 6880 LDR R0, [R0, #8]
0x34181248: 2802 CMP R0, #2
0x3418124A: D100 BNE 46L16 ; 0x3418124E
.L15:
0x3418124C: E006 B 46L17 ; 0x3418125C
.L16:
0x3418124E: F642 20F0 MOVW R0, #0x2AF0 ; 0x34192AF0 = .rodata..L.str.30
0x34181252: F2C3 4019 MOVT R0, #0x3419 ; 0x34192AF0 = .rodata..L.str.30
0x34181256: 21D1 MOVS R1, #209
0x34181258: F00B FD6A BL assert_failed ; 0x3418CD30
.L17:
0x3418125C: 980F LDR R0, [SP, #60]
0x3418125E: 68C0 LDR R0, [R0, #12]
0x34181260: 900B STR R0, [SP, #44]
0x34181262: 980D LDR R0, [SP, #52]
0x34181264: 0041 LSLS R1, R0, #1
0x34181266: 2003 MOVS R0, #3
0x34181268: FA00 F101 LSL.W R1, R0, R1
0x3418126C: 980B LDR R0, [SP, #44]
0x3418126E: 4388 BICS R0, R1
0x34181270: 900B STR R0, [SP, #44]
0x34181272: 980E LDR R0, [SP, #56]
0x34181274: 6880 LDR R0, [R0, #8]
0x34181276: 990D LDR R1, [SP, #52]
0x34181278: 0049 LSLS R1, R1, #1
0x3418127A: FA00 F101 LSL.W R1, R0, R1
0x3418127E: 980B LDR R0, [SP, #44]
0x34181280: 4308 ORRS R0, R1
0x34181282: 900B STR R0, [SP, #44]
0x34181284: 980B LDR R0, [SP, #44]
0x34181286: 990F LDR R1, [SP, #60]
0x34181288: 60C8 STR R0, [R1, #12]
.L18:
0x3418128A: 980E LDR R0, [SP, #56]
0x3418128C: 6840 LDR R0, [R0, #4]
0x3418128E: F000 0003 AND R0, R0, #3
0x34181292: 2802 CMP R0, #2
0x34181294: F040 80E4 BNE.W 46L24 ; 0x34181460
0x34181298: 980F LDR R0, [SP, #60]
0x3418129A: 2100 MOVS R1, #0
0x3418129C: F2C5 6102 MOVT R1, #0x5602
0x341812A0: 4288 CMP R0, R1
0x341812A2: F000 80A4 BEQ.W 46L19 ; 0x341813EE
0x341812A6: 980F LDR R0, [SP, #60]
0x341812A8: 2100 MOVS R1, #0
0x341812AA: F2C4 6102 MOVT R1, #0x4602
0x341812AE: 4288 CMP R0, R1
0x341812B0: F000 809D BEQ.W 46L19 ; 0x341813EE
0x341812B4: 980F LDR R0, [SP, #60]
0x341812B6: F240 4100 MOVW R1, #0x0400
0x341812BA: F2C5 6102 MOVT R1, #0x5602
0x341812BE: 4288 CMP R0, R1
0x341812C0: F000 8095 BEQ.W 46L19 ; 0x341813EE
0x341812C4: 980F LDR R0, [SP, #60]
0x341812C6: F240 4100 MOVW R1, #0x0400
0x341812CA: F2C4 6102 MOVT R1, #0x4602
0x341812CE: 4288 CMP R0, R1
0x341812D0: F000 808D BEQ.W 46L19 ; 0x341813EE
0x341812D4: 980F LDR R0, [SP, #60]
0x341812D6: F640 0100 MOVW R1, #0x0800
0x341812DA: F2C5 6102 MOVT R1, #0x5602
0x341812DE: 4288 CMP R0, R1
0x341812E0: F000 8085 BEQ.W 46L19 ; 0x341813EE
0x341812E4: 980F LDR R0, [SP, #60]
0x341812E6: F640 0100 MOVW R1, #0x0800
0x341812EA: F2C4 6102 MOVT R1, #0x4602
0x341812EE: 4288 CMP R0, R1
0x341812F0: D07D BEQ 46L19 ; 0x341813EE
0x341812F2: 980F LDR R0, [SP, #60]
0x341812F4: F640 4100 MOVW R1, #0x0C00
0x341812F8: F2C5 6102 MOVT R1, #0x5602
0x341812FC: 4288 CMP R0, R1
0x341812FE: D076 BEQ 46L19 ; 0x341813EE
0x34181300: 980F LDR R0, [SP, #60]
0x34181302: F640 4100 MOVW R1, #0x0C00
0x34181306: F2C4 6102 MOVT R1, #0x4602
0x3418130A: 4288 CMP R0, R1
0x3418130C: D06F BEQ 46L19 ; 0x341813EE
0x3418130E: 980F LDR R0, [SP, #60]
0x34181310: F241 0100 MOVW R1, #0x1000
0x34181314: F2C5 6102 MOVT R1, #0x5602
0x34181318: 4288 CMP R0, R1
0x3418131A: D068 BEQ 46L19 ; 0x341813EE
0x3418131C: 980F LDR R0, [SP, #60]
0x3418131E: F241 0100 MOVW R1, #0x1000
0x34181322: F2C4 6102 MOVT R1, #0x4602
0x34181326: 4288 CMP R0, R1
0x34181328: D061 BEQ 46L19 ; 0x341813EE
0x3418132A: 980F LDR R0, [SP, #60]
0x3418132C: F241 4100 MOVW R1, #0x1400
0x34181330: F2C5 6102 MOVT R1, #0x5602
0x34181334: 4288 CMP R0, R1
0x34181336: D05A BEQ 46L19 ; 0x341813EE
0x34181338: 980F LDR R0, [SP, #60]
0x3418133A: F241 4100 MOVW R1, #0x1400
0x3418133E: F2C4 6102 MOVT R1, #0x4602
0x34181342: 4288 CMP R0, R1
0x34181344: D053 BEQ 46L19 ; 0x341813EE
0x34181346: 980F LDR R0, [SP, #60]
0x34181348: F641 0100 MOVW R1, #0x1800
0x3418134C: F2C5 6102 MOVT R1, #0x5602
0x34181350: 4288 CMP R0, R1
0x34181352: D04C BEQ 46L19 ; 0x341813EE
0x34181354: 980F LDR R0, [SP, #60]
0x34181356: F641 0100 MOVW R1, #0x1800
0x3418135A: F2C4 6102 MOVT R1, #0x4602
0x3418135E: 4288 CMP R0, R1
0x34181360: D045 BEQ 46L19 ; 0x341813EE
0x34181362: 980F LDR R0, [SP, #60]
0x34181364: F641 4100 MOVW R1, #0x1C00
0x34181368: F2C5 6102 MOVT R1, #0x5602
0x3418136C: 4288 CMP R0, R1
0x3418136E: D03E BEQ 46L19 ; 0x341813EE
0x34181370: 980F LDR R0, [SP, #60]
0x34181372: F641 4100 MOVW R1, #0x1C00
0x34181376: F2C4 6102 MOVT R1, #0x4602
0x3418137A: 4288 CMP R0, R1
0x3418137C: D037 BEQ 46L19 ; 0x341813EE
0x3418137E: 980F LDR R0, [SP, #60]
0x34181380: F243 4100 MOVW R1, #0x3400
0x34181384: F2C5 6102 MOVT R1, #0x5602
0x34181388: 4288 CMP R0, R1
0x3418138A: D030 BEQ 46L19 ; 0x341813EE
0x3418138C: 980F LDR R0, [SP, #60]
0x3418138E: F243 4100 MOVW R1, #0x3400
0x34181392: F2C4 6102 MOVT R1, #0x4602
0x34181396: 4288 CMP R0, R1
0x34181398: D029 BEQ 46L19 ; 0x341813EE
0x3418139A: 980F LDR R0, [SP, #60]
0x3418139C: F643 0100 MOVW R1, #0x3800
0x341813A0: F2C5 6102 MOVT R1, #0x5602
0x341813A4: 4288 CMP R0, R1
0x341813A6: D022 BEQ 46L19 ; 0x341813EE
0x341813A8: 980F LDR R0, [SP, #60]
0x341813AA: F643 0100 MOVW R1, #0x3800
0x341813AE: F2C4 6102 MOVT R1, #0x4602
0x341813B2: 4288 CMP R0, R1
0x341813B4: D01B BEQ 46L19 ; 0x341813EE
0x341813B6: 980F LDR R0, [SP, #60]
0x341813B8: F643 4100 MOVW R1, #0x3C00
0x341813BC: F2C5 6102 MOVT R1, #0x5602
0x341813C0: 4288 CMP R0, R1
0x341813C2: D014 BEQ 46L19 ; 0x341813EE
0x341813C4: 980F LDR R0, [SP, #60]
0x341813C6: F643 4100 MOVW R1, #0x3C00
0x341813CA: F2C4 6102 MOVT R1, #0x4602
0x341813CE: 4288 CMP R0, R1
0x341813D0: D00D BEQ 46L19 ; 0x341813EE
0x341813D2: 980F LDR R0, [SP, #60]
0x341813D4: F244 0100 MOVW R1, #0x4000
0x341813D8: F2C5 6102 MOVT R1, #0x5602
0x341813DC: 4288 CMP R0, R1
0x341813DE: D006 BEQ 46L19 ; 0x341813EE
0x341813E0: 980F LDR R0, [SP, #60]
0x341813E2: F244 0100 MOVW R1, #0x4000
0x341813E6: F2C4 6102 MOVT R1, #0x4602
0x341813EA: 4288 CMP R0, R1
0x341813EC: D100 BNE 46L20 ; 0x341813F0
.L19:
0x341813EE: E006 B 46L21 ; 0x341813FE
.L20:
0x341813F0: F642 20F0 MOVW R0, #0x2AF0 ; 0x34192AF0 = .rodata..L.str.30
0x341813F4: F2C3 4019 MOVT R0, #0x3419 ; 0x34192AF0 = .rodata..L.str.30
0x341813F8: 21DE MOVS R1, #222
0x341813FA: F00B FC99 BL assert_failed ; 0x3418CD30
.L21:
0x341813FE: 980E LDR R0, [SP, #56]
0x34181400: 6900 LDR R0, [R0, #16]
0x34181402: 280F CMP R0, #15
0x34181404: D800 BHI 46L22 ; 0x34181408
0x34181406: E006 B 46L23 ; 0x34181416
.L22:
0x34181408: F642 20F0 MOVW R0, #0x2AF0 ; 0x34192AF0 = .rodata..L.str.30
0x3418140C: F2C3 4019 MOVT R0, #0x3419 ; 0x34192AF0 = .rodata..L.str.30
0x34181410: 21DF MOVS R1, #223
0x34181412: F00B FC8D BL assert_failed ; 0x3418CD30
.L23:
0x34181416: 980F LDR R0, [SP, #60]
0x34181418: 990D LDR R1, [SP, #52]
0x3418141A: F06F 0203 MVN R2, #3
0x3418141E: EA02 0151 AND.W R1, R2, R1, LSR #1
0x34181422: 4408 ADD R0, R1
0x34181424: 6A00 LDR R0, [R0, #32]
0x34181426: 900B STR R0, [SP, #44]
0x34181428: 980D LDR R0, [SP, #52]
0x3418142A: F000 0007 AND R0, R0, #7
0x3418142E: 0081 LSLS R1, R0, #2
0x34181430: 200F MOVS R0, #15
0x34181432: FA00 F101 LSL.W R1, R0, R1
0x34181436: 980B LDR R0, [SP, #44]
0x34181438: 4388 BICS R0, R1
0x3418143A: 900B STR R0, [SP, #44]
0x3418143C: 980E LDR R0, [SP, #56]
0x3418143E: 6900 LDR R0, [R0, #16]
0x34181440: 990D LDR R1, [SP, #52]
0x34181442: F001 0107 AND R1, R1, #7
0x34181446: 0089 LSLS R1, R1, #2
0x34181448: FA00 F101 LSL.W R1, R0, R1
0x3418144C: 980B LDR R0, [SP, #44]
0x3418144E: 4308 ORRS R0, R1
0x34181450: 900B STR R0, [SP, #44]
0x34181452: 980B LDR R0, [SP, #44]
0x34181454: 990F LDR R1, [SP, #60]
0x34181456: 9B0D LDR R3, [SP, #52]
0x34181458: EA02 0253 AND.W R2, R2, R3, LSR #1
0x3418145C: 4411 ADD R1, R2
0x3418145E: 6208 STR R0, [R1, #32]
.L24:
0x34181460: 980F LDR R0, [SP, #60]
0x34181462: 6800 LDR R0, [R0]
0x34181464: 900B STR R0, [SP, #44]
0x34181466: 980D LDR R0, [SP, #52]
0x34181468: 0041 LSLS R1, R0, #1
0x3418146A: 2003 MOVS R0, #3
0x3418146C: FA00 F101 LSL.W R1, R0, R1
0x34181470: 980B LDR R0, [SP, #44]
0x34181472: 4388 BICS R0, R1
0x34181474: 900B STR R0, [SP, #44]
0x34181476: 980E LDR R0, [SP, #56]
0x34181478: 6840 LDR R0, [R0, #4]
0x3418147A: F000 0003 AND R0, R0, #3
0x3418147E: 990D LDR R1, [SP, #52]
0x34181480: 0049 LSLS R1, R1, #1
0x34181482: FA00 F101 LSL.W R1, R0, R1
0x34181486: 980B LDR R0, [SP, #44]
0x34181488: 4308 ORRS R0, R1
0x3418148A: 900B STR R0, [SP, #44]
0x3418148C: 980B LDR R0, [SP, #44]
0x3418148E: 990F LDR R1, [SP, #60]
0x34181490: 6008 STR R0, [R1]
0x34181492: 980E LDR R0, [SP, #56]
0x34181494: 7980 LDRB R0, [R0, #6]
0x34181496: 0780 LSLS R0, R0, #30
0x34181498: 2800 CMP R0, #0
0x3418149A: F000 8115 BEQ.W 46L51 ; 0x341816C8
0x3418149E: 980D LDR R0, [SP, #52]
0x341814A0: F020 0003 BIC R0, R0, #3
0x341814A4: F245 0160 MOVW R1, #0x5060
0x341814A8: F2C5 6102 MOVT R1, #0x5602
0x341814AC: 5840 LDR R0, [R0, R1]
0x341814AE: 900B STR R0, [SP, #44]
0x341814B0: 980D LDR R0, [SP, #52]
0x341814B2: F000 0003 AND R0, R0, #3
0x341814B6: 00C1 LSLS R1, R0, #3
0x341814B8: 200F MOVS R0, #15
0x341814BA: FA00 F101 LSL.W R1, R0, R1
0x341814BE: 980B LDR R0, [SP, #44]
0x341814C0: 4388 BICS R0, R1
0x341814C2: 900B STR R0, [SP, #44]
0x341814C4: 980F LDR R0, [SP, #60]
0x341814C6: 2100 MOVS R1, #0
0x341814C8: F2C5 6102 MOVT R1, #0x5602
0x341814CC: 4288 CMP R0, R1
0x341814CE: D102 BNE 46L25 ; 0x341814D6
0x341814D0: 2000 MOVS R0, #0
0x341814D2: 900A STR R0, [SP, #40]
0x341814D4: E082 B 46L46 ; 0x341815DC
.L25:
0x341814D6: 980F LDR R0, [SP, #60]
0x341814D8: F240 4100 MOVW R1, #0x0400
0x341814DC: F2C5 6102 MOVT R1, #0x5602
0x341814E0: 4288 CMP R0, R1
0x341814E2: D102 BNE 46L26 ; 0x341814EA
0x341814E4: 2001 MOVS R0, #1
0x341814E6: 9009 STR R0, [SP, #36]
0x341814E8: E076 B 46L45 ; 0x341815D8
.L26:
0x341814EA: 980F LDR R0, [SP, #60]
0x341814EC: F640 0100 MOVW R1, #0x0800
0x341814F0: F2C5 6102 MOVT R1, #0x5602
0x341814F4: 4288 CMP R0, R1
0x341814F6: D102 BNE 46L27 ; 0x341814FE
0x341814F8: 2002 MOVS R0, #2
0x341814FA: 9008 STR R0, [SP, #32]
0x341814FC: E06A B 46L44 ; 0x341815D4
.L27:
0x341814FE: 980F LDR R0, [SP, #60]
0x34181500: F640 4100 MOVW R1, #0x0C00
0x34181504: F2C5 6102 MOVT R1, #0x5602
0x34181508: 4288 CMP R0, R1
0x3418150A: D102 BNE 46L28 ; 0x34181512
0x3418150C: 2003 MOVS R0, #3
0x3418150E: 9007 STR R0, [SP, #28]
0x34181510: E05E B 46L43 ; 0x341815D0
.L28:
0x34181512: 980F LDR R0, [SP, #60]
0x34181514: F241 0100 MOVW R1, #0x1000
0x34181518: F2C5 6102 MOVT R1, #0x5602
0x3418151C: 4288 CMP R0, R1
0x3418151E: D102 BNE 46L29 ; 0x34181526
0x34181520: 2004 MOVS R0, #4
0x34181522: 9006 STR R0, [SP, #24]
0x34181524: E052 B 46L42 ; 0x341815CC
.L29:
0x34181526: 980F LDR R0, [SP, #60]
0x34181528: F241 4100 MOVW R1, #0x1400
0x3418152C: F2C5 6102 MOVT R1, #0x5602
0x34181530: 4288 CMP R0, R1
0x34181532: D102 BNE 46L30 ; 0x3418153A
0x34181534: 2005 MOVS R0, #5
0x34181536: 9005 STR R0, [SP, #20]
0x34181538: E046 B 46L41 ; 0x341815C8
.L30:
0x3418153A: 980F LDR R0, [SP, #60]
0x3418153C: F641 0100 MOVW R1, #0x1800
0x34181540: F2C5 6102 MOVT R1, #0x5602
0x34181544: 4288 CMP R0, R1
0x34181546: D102 BNE 46L31 ; 0x3418154E
0x34181548: 2006 MOVS R0, #6
0x3418154A: 9004 STR R0, [SP, #16]
0x3418154C: E03A B 46L40 ; 0x341815C4
.L31:
0x3418154E: 980F LDR R0, [SP, #60]
0x34181550: F641 4100 MOVW R1, #0x1C00
0x34181554: F2C5 6102 MOVT R1, #0x5602
0x34181558: 4288 CMP R0, R1
0x3418155A: D102 BNE 46L32 ; 0x34181562
0x3418155C: 2007 MOVS R0, #7
0x3418155E: 9003 STR R0, [SP, #12]
0x34181560: E02E B 46L39 ; 0x341815C0
.L32:
0x34181562: 980F LDR R0, [SP, #60]
0x34181564: F243 4100 MOVW R1, #0x3400
0x34181568: F2C5 6102 MOVT R1, #0x5602
0x3418156C: 4288 CMP R0, R1
0x3418156E: D102 BNE 46L33 ; 0x34181576
0x34181570: 2008 MOVS R0, #8
0x34181572: 9002 STR R0, [SP, #8]
0x34181574: E022 B 46L38 ; 0x341815BC
.L33:
0x34181576: 980F LDR R0, [SP, #60]
0x34181578: F643 0100 MOVW R1, #0x3800
0x3418157C: F2C5 6102 MOVT R1, #0x5602
0x34181580: 4288 CMP R0, R1
0x34181582: D102 BNE 46L34 ; 0x3418158A
0x34181584: 2009 MOVS R0, #9
0x34181586: 9001 STR R0, [SP, #4]
0x34181588: E016 B 46L37 ; 0x341815B8
.L34:
0x3418158A: 980F LDR R0, [SP, #60]
0x3418158C: F643 4100 MOVW R1, #0x3C00
0x34181590: F2C5 6102 MOVT R1, #0x5602
0x34181594: 4288 CMP R0, R1
0x34181596: D102 BNE 46L35 ; 0x3418159E
0x34181598: 200A MOVS R0, #10
0x3418159A: 9000 STR R0, [SP, #0]
0x3418159C: E00A B 46L36 ; 0x341815B4
.L35:
0x3418159E: 980F LDR R0, [SP, #60]
0x341815A0: F244 0100 MOVW R1, #0x4000
0x341815A4: F2C5 6102 MOVT R1, #0x5602
0x341815A8: 4288 CMP R0, R1
0x341815AA: F04F 0010 MOV.W R0, #16
0x341815AE: BF08 IT EQ
0x341815B0: 200B MOVEQ R0, #11
0x341815B2: 9000 STR R0, [SP, #0]
.L36:
0x341815B4: 9800 LDR R0, [SP, #0]
0x341815B6: 9001 STR R0, [SP, #4]
.L37:
0x341815B8: 9801 LDR R0, [SP, #4]
0x341815BA: 9002 STR R0, [SP, #8]
.L38:
0x341815BC: 9802 LDR R0, [SP, #8]
0x341815BE: 9003 STR R0, [SP, #12]
.L39:
0x341815C0: 9803 LDR R0, [SP, #12]
0x341815C2: 9004 STR R0, [SP, #16]
.L40:
0x341815C4: 9804 LDR R0, [SP, #16]
0x341815C6: 9005 STR R0, [SP, #20]
.L41:
0x341815C8: 9805 LDR R0, [SP, #20]
0x341815CA: 9006 STR R0, [SP, #24]
.L42:
0x341815CC: 9806 LDR R0, [SP, #24]
0x341815CE: 9007 STR R0, [SP, #28]
.L43:
0x341815D0: 9807 LDR R0, [SP, #28]
0x341815D2: 9008 STR R0, [SP, #32]
.L44:
0x341815D4: 9808 LDR R0, [SP, #32]
0x341815D6: 9009 STR R0, [SP, #36]
.L45:
0x341815D8: 9809 LDR R0, [SP, #36]
0x341815DA: 900A STR R0, [SP, #40]
.L46:
0x341815DC: 980A LDR R0, [SP, #40]
0x341815DE: 990D LDR R1, [SP, #52]
0x341815E0: F001 0103 AND R1, R1, #3
0x341815E4: 00C9 LSLS R1, R1, #3
0x341815E6: FA00 F101 LSL.W R1, R0, R1
0x341815EA: 980B LDR R0, [SP, #44]
0x341815EC: 4308 ORRS R0, R1
0x341815EE: 900B STR R0, [SP, #44]
0x341815F0: 980B LDR R0, [SP, #44]
0x341815F2: 990D LDR R1, [SP, #52]
0x341815F4: F021 0103 BIC R1, R1, #3
0x341815F8: F245 0260 MOVW R2, #0x5060
0x341815FC: F2C5 6202 MOVT R2, #0x5602
0x34181600: 5088 STR R0, [R1, R2]
0x34181602: F245 0080 MOVW R0, #0x5080
0x34181606: F2C5 6002 MOVT R0, #0x5602
0x3418160A: 6800 LDR R0, [R0]
0x3418160C: 900B STR R0, [SP, #44]
0x3418160E: 990C LDR R1, [SP, #48]
0x34181610: 980B LDR R0, [SP, #44]
0x34181612: 4388 BICS R0, R1
0x34181614: 900B STR R0, [SP, #44]
0x34181616: 980E LDR R0, [SP, #56]
0x34181618: 7980 LDRB R0, [R0, #6]
0x3418161A: 07C0 LSLS R0, R0, #31
0x3418161C: B118 CBZ R0, .L47 ; 0x34181626
0x3418161E: 990C LDR R1, [SP, #48]
0x34181620: 980B LDR R0, [SP, #44]
0x34181622: 4308 ORRS R0, R1
0x34181624: 900B STR R0, [SP, #44]
.L47:
0x34181626: 980B LDR R0, [SP, #44]
0x34181628: F245 0180 MOVW R1, #0x5080
0x3418162C: F2C5 6102 MOVT R1, #0x5602
0x34181630: 6008 STR R0, [R1]
0x34181632: F245 0084 MOVW R0, #0x5084
0x34181636: F2C5 6002 MOVT R0, #0x5602
0x3418163A: 6800 LDR R0, [R0]
0x3418163C: 900B STR R0, [SP, #44]
0x3418163E: 990C LDR R1, [SP, #48]
0x34181640: 980B LDR R0, [SP, #44]
0x34181642: 4388 BICS R0, R1
0x34181644: 900B STR R0, [SP, #44]
0x34181646: 980E LDR R0, [SP, #56]
0x34181648: 7980 LDRB R0, [R0, #6]
0x3418164A: 0780 LSLS R0, R0, #30
0x3418164C: 2800 CMP R0, #0
0x3418164E: D503 BPL 46L48 ; 0x34181658
0x34181650: 990C LDR R1, [SP, #48]
0x34181652: 980B LDR R0, [SP, #44]
0x34181654: 4308 ORRS R0, R1
0x34181656: 900B STR R0, [SP, #44]
.L48:
0x34181658: 980B LDR R0, [SP, #44]
0x3418165A: F245 0184 MOVW R1, #0x5084
0x3418165E: F2C5 6102 MOVT R1, #0x5602
0x34181662: 6008 STR R0, [R1]
0x34181664: F245 0000 MOVW R0, #0x5000
0x34181668: F2C5 6002 MOVT R0, #0x5602
0x3418166C: 6800 LDR R0, [R0]
0x3418166E: 900B STR R0, [SP, #44]
0x34181670: 990C LDR R1, [SP, #48]
0x34181672: 980B LDR R0, [SP, #44]
0x34181674: 4388 BICS R0, R1
0x34181676: 900B STR R0, [SP, #44]
0x34181678: 980E LDR R0, [SP, #56]
0x3418167A: 7980 LDRB R0, [R0, #6]
0x3418167C: 06C0 LSLS R0, R0, #27
0x3418167E: 2800 CMP R0, #0
0x34181680: D503 BPL 46L49 ; 0x3418168A
0x34181682: 990C LDR R1, [SP, #48]
0x34181684: 980B LDR R0, [SP, #44]
0x34181686: 4308 ORRS R0, R1
0x34181688: 900B STR R0, [SP, #44]
.L49:
0x3418168A: 980B LDR R0, [SP, #44]
0x3418168C: F245 0100 MOVW R1, #0x5000
0x34181690: F2C5 6102 MOVT R1, #0x5602
0x34181694: 6008 STR R0, [R1]
0x34181696: F245 0004 MOVW R0, #0x5004
0x3418169A: F2C5 6002 MOVT R0, #0x5602
0x3418169E: 6800 LDR R0, [R0]
0x341816A0: 900B STR R0, [SP, #44]
0x341816A2: 990C LDR R1, [SP, #48]
0x341816A4: 980B LDR R0, [SP, #44]
0x341816A6: 4388 BICS R0, R1
0x341816A8: 900B STR R0, [SP, #44]
0x341816AA: 980E LDR R0, [SP, #56]
0x341816AC: 7980 LDRB R0, [R0, #6]
0x341816AE: 0680 LSLS R0, R0, #26
0x341816B0: 2800 CMP R0, #0
0x341816B2: D503 BPL 46L50 ; 0x341816BC
0x341816B4: 990C LDR R1, [SP, #48]
0x341816B6: 980B LDR R0, [SP, #44]
0x341816B8: 4308 ORRS R0, R1
0x341816BA: 900B STR R0, [SP, #44]
.L50:
0x341816BC: 980B LDR R0, [SP, #44]
0x341816BE: F245 0104 MOVW R1, #0x5004
0x341816C2: F2C5 6102 MOVT R1, #0x5602
0x341816C6: 6008 STR R0, [R1]
.L51:
0x341816C8: 980D LDR R0, [SP, #52]
0x341816CA: 3001 ADDS R0, #1
0x341816CC: 900D STR R0, [SP, #52]
0x341816CE: E541 B 46L8 ; 0x34181154
.L52:
0x341816D0: B010 ADD SP, SP, #64
0x341816D2: BD80 POP 123R7, PC}
Section .text.LL_RCC_HSI_SetDivider from blto2_FSBL_lto.o, size=28, align=4
LL_RCC_HSI_SetDivider:
0x341816D4: B081 SUB SP, SP, #4
0x341816D6: 9000 STR R0, [SP, #0]
0x341816D8: F248 0148 MOVW R1, #0x8048
0x341816DC: F2C5 6102 MOVT R1, #0x5602
0x341816E0: 6808 LDR R0, [R1]
0x341816E2: F420 70C0 BIC R0, R0, #0x0180
0x341816E6: 9A00 LDR R2, [SP, #0]
0x341816E8: 4310 ORRS R0, R2
0x341816EA: 6008 STR R0, [R1]
0x341816EC: B001 ADD SP, SP, #4
0x341816EE: 4770 BX LR
Section .text.LL_RCC_HSI_IsReady from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_HSI_IsReady:
0x341816F0: F248 0004 MOVW R0, #0x8004
0x341816F4: F2C5 6002 MOVT R0, #0x5602
0x341816F8: 6800 LDR R0, [R0]
0x341816FA: F3C0 00C0 UBFX R0, R0, #3, #1
0x341816FE: 4770 BX LR
Section .text.LL_RCC_GetCpuClkSource from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_GetCpuClkSource:
0x34181700: F248 0020 MOVW R0, #0x8020
0x34181704: F2C5 6002 MOVT R0, #0x5602
0x34181708: 6800 LDR R0, [R0]
0x3418170A: F400 1040 AND R0, R0, #0x300000
0x3418170E: 4770 BX LR
Section .text.LL_RCC_GetSysClkSource from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_GetSysClkSource:
0x34181710: F248 0020 MOVW R0, #0x8020
0x34181714: F2C5 6002 MOVT R0, #0x5602
0x34181718: 6800 LDR R0, [R0]
0x3418171A: F000 5040 AND R0, R0, #0x30000000
0x3418171E: 4770 BX LR
Section .text.LL_RCC_PLL1_GetSource from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_PLL1_GetSource:
0x34181720: F248 0080 MOVW R0, #0x8080
0x34181724: F2C5 6002 MOVT R0, #0x5602
0x34181728: 6800 LDR R0, [R0]
0x3418172A: F000 40E0 AND R0, R0, #0x70000000
0x3418172E: 4770 BX LR
Section .text.LL_RCC_PLL2_GetSource from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_PLL2_GetSource:
0x34181730: F248 0090 MOVW R0, #0x8090
0x34181734: F2C5 6002 MOVT R0, #0x5602
0x34181738: 6800 LDR R0, [R0]
0x3418173A: F000 40E0 AND R0, R0, #0x70000000
0x3418173E: 4770 BX LR
Section .text.LL_RCC_PLL3_GetSource from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_PLL3_GetSource:
0x34181740: F248 00A0 MOVW R0, #0x80A0
0x34181744: F2C5 6002 MOVT R0, #0x5602
0x34181748: 6800 LDR R0, [R0]
0x3418174A: F000 40E0 AND R0, R0, #0x70000000
0x3418174E: 4770 BX LR
Section .text.LL_RCC_PLL4_GetSource from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_PLL4_GetSource:
0x34181750: F248 00B0 MOVW R0, #0x80B0
0x34181754: F2C5 6002 MOVT R0, #0x5602
0x34181758: 6800 LDR R0, [R0]
0x3418175A: F000 40E0 AND R0, R0, #0x70000000
0x3418175E: 4770 BX LR
Section .text.LL_RCC_MSI_SetFrequency from blto2_FSBL_lto.o, size=28, align=4
LL_RCC_MSI_SetFrequency:
0x34181760: B081 SUB SP, SP, #4
0x34181762: 9000 STR R0, [SP, #0]
0x34181764: F248 0144 MOVW R1, #0x8044
0x34181768: F2C5 6102 MOVT R1, #0x5602
0x3418176C: 6808 LDR R0, [R1]
0x3418176E: F420 7000 BIC R0, R0, #0x0200
0x34181772: 9A00 LDR R2, [SP, #0]
0x34181774: 4310 ORRS R0, R2
0x34181776: 6008 STR R0, [R1]
0x34181778: B001 ADD SP, SP, #4
0x3418177A: 4770 BX LR
Section .text.LL_RCC_MSI_IsReady from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_MSI_IsReady:
0x3418177C: F248 0004 MOVW R0, #0x8004
0x34181780: F2C5 6002 MOVT R0, #0x5602
0x34181784: 6800 LDR R0, [R0]
0x34181786: F3C0 0080 UBFX R0, R0, #2, #1
0x3418178A: 4770 BX LR
Section .text.LL_RCC_LSI_IsReady from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_LSI_IsReady:
0x3418178C: F248 0004 MOVW R0, #0x8004
0x34181790: F2C5 6002 MOVT R0, #0x5602
0x34181794: 6800 LDR R0, [R0]
0x34181796: F000 0001 AND R0, R0, #1
0x3418179A: 4770 BX LR
Section .text.LL_RCC_LSE_IsReady from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_LSE_IsReady:
0x3418179C: F248 0004 MOVW R0, #0x8004
0x341817A0: F2C5 6002 MOVT R0, #0x5602
0x341817A4: 6800 LDR R0, [R0]
0x341817A6: F3C0 0040 UBFX R0, R0, #1, #1
0x341817AA: 4770 BX LR
Section .text.LL_RCC_PLL1_IsReady from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_PLL1_IsReady:
0x341817AC: F248 0004 MOVW R0, #0x8004
0x341817B0: F2C5 6002 MOVT R0, #0x5602
0x341817B4: 6800 LDR R0, [R0]
0x341817B6: F3C0 2000 UBFX R0, R0, #8, #1
0x341817BA: 4770 BX LR
Section .text.LL_RCC_IC1_GetSource from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_IC1_GetSource:
0x341817BC: F248 00C4 MOVW R0, #0x80C4
0x341817C0: F2C5 6002 MOVT R0, #0x5602
0x341817C4: 6800 LDR R0, [R0]
0x341817C6: F000 5040 AND R0, R0, #0x30000000
0x341817CA: 4770 BX LR
Section .text.LL_RCC_IC2_GetSource from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_IC2_GetSource:
0x341817CC: F248 00C8 MOVW R0, #0x80C8
0x341817D0: F2C5 6002 MOVT R0, #0x5602
0x341817D4: 6800 LDR R0, [R0]
0x341817D6: F000 5040 AND R0, R0, #0x30000000
0x341817DA: 4770 BX LR
Section .text.LL_RCC_IC6_GetSource from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_IC6_GetSource:
0x341817DC: F248 00D8 MOVW R0, #0x80D8
0x341817E0: F2C5 6002 MOVT R0, #0x5602
0x341817E4: 6800 LDR R0, [R0]
0x341817E6: F000 5040 AND R0, R0, #0x30000000
0x341817EA: 4770 BX LR
Section .text.LL_RCC_IC11_GetSource from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_IC11_GetSource:
0x341817EC: F248 00EC MOVW R0, #0x80EC
0x341817F0: F2C5 6002 MOVT R0, #0x5602
0x341817F4: 6800 LDR R0, [R0]
0x341817F6: F000 5040 AND R0, R0, #0x30000000
0x341817FA: 4770 BX LR
Section .text.LL_RCC_PLL2_IsReady from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_PLL2_IsReady:
0x341817FC: F248 0004 MOVW R0, #0x8004
0x34181800: F2C5 6002 MOVT R0, #0x5602
0x34181804: 6800 LDR R0, [R0]
0x34181806: F3C0 2040 UBFX R0, R0, #9, #1
0x3418180A: 4770 BX LR
Section .text.LL_RCC_PLL3_IsReady from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_PLL3_IsReady:
0x3418180C: F248 0004 MOVW R0, #0x8004
0x34181810: F2C5 6002 MOVT R0, #0x5602
0x34181814: 6800 LDR R0, [R0]
0x34181816: F3C0 2080 UBFX R0, R0, #10, #1
0x3418181A: 4770 BX LR
Section .text.LL_RCC_PLL4_IsReady from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_PLL4_IsReady:
0x3418181C: F248 0004 MOVW R0, #0x8004
0x34181820: F2C5 6002 MOVT R0, #0x5602
0x34181824: 6800 LDR R0, [R0]
0x34181826: F3C0 20C0 UBFX R0, R0, #11, #1
0x3418182A: 4770 BX LR
Section .text.RCC_PLL_Source_IsReady from blto2_FSBL_lto.o, size=84, align=4
RCC_PLL_Source_IsReady:
0x3418182C: B580 PUSH 123R7, LR}
0x3418182E: B084 SUB SP, SP, #16
0x34181830: 9003 STR R0, [SP, #12]
0x34181832: 2001 MOVS R0, #1
0x34181834: 9002 STR R0, [SP, #8]
0x34181836: 9803 LDR R0, [SP, #12]
0x34181838: 9001 STR R0, [SP, #4]
0x3418183A: B160 CBZ R0, .L1 ; 0x34181856
0x3418183C: 9801 LDR R0, [SP, #4]
0x3418183E: F1B0 5F80 CMP.W R0, #0x10000000
0x34181842: D00E BEQ 46L3 ; 0x34181862
0x34181844: 9801 LDR R0, [SP, #4]
0x34181846: F1B0 5F00 CMP.W R0, #0x20000000
0x3418184A: D010 BEQ 46L5 ; 0x3418186E
0x3418184C: 9801 LDR R0, [SP, #4]
0x3418184E: F1B0 5F40 CMP.W R0, #0x30000000
0x34181852: D012 BEQ 46L7 ; 0x3418187A
0x34181854: E011 B 46L7 ; 0x3418187A
.L1:
0x34181856: F7FF FF4B BL LL_RCC_HSI_IsReady ; 0x341816F0
0x3418185A: B908 CBNZ R0, .L2 ; 0x34181860
0x3418185C: 2000 MOVS R0, #0
0x3418185E: 9002 STR R0, [SP, #8]
.L2:
0x34181860: E00B B 46L7 ; 0x3418187A
.L3:
0x34181862: F7FF FF8B BL LL_RCC_MSI_IsReady ; 0x3418177C
0x34181866: B908 CBNZ R0, .L4 ; 0x3418186C
0x34181868: 2000 MOVS R0, #0
0x3418186A: 9002 STR R0, [SP, #8]
.L4:
0x3418186C: E005 B 46L7 ; 0x3418187A
.L5:
0x3418186E: F000 F807 BL LL_RCC_HSE_IsReady ; 0x34181880
0x34181872: B908 CBNZ R0, .L6 ; 0x34181878
0x34181874: 2000 MOVS R0, #0
0x34181876: 9002 STR R0, [SP, #8]
.L6:
0x34181878: E7FF B 46L7 ; 0x3418187A
.L7:
0x3418187A: 9802 LDR R0, [SP, #8]
0x3418187C: B004 ADD SP, SP, #16
0x3418187E: BD80 POP 123R7, PC}
Section .text.LL_RCC_HSE_IsReady from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_HSE_IsReady:
0x34181880: F248 0004 MOVW R0, #0x8004
0x34181884: F2C5 6002 MOVT R0, #0x5602
0x34181888: 6800 LDR R0, [R0]
0x3418188A: F3C0 1000 UBFX R0, R0, #4, #1
0x3418188E: 4770 BX LR
Section .text.LL_RCC_HSI_GetDivider from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_HSI_GetDivider:
0x34181890: F248 0048 MOVW R0, #0x8048
0x34181894: F2C5 6002 MOVT R0, #0x5602
0x34181898: 6800 LDR R0, [R0]
0x3418189A: F400 70C0 AND R0, R0, #0x0180
0x3418189E: 4770 BX LR
Section .text.LL_RCC_PLL1_IsEnabledBypass from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_PLL1_IsEnabledBypass:
0x341818A0: F248 0080 MOVW R0, #0x8080
0x341818A4: F2C5 6002 MOVT R0, #0x5602
0x341818A8: 6800 LDR R0, [R0]
0x341818AA: F3C0 60C0 UBFX R0, R0, #27, #1
0x341818AE: 4770 BX LR
Section .text.LL_RCC_PLL2_IsEnabledBypass from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_PLL2_IsEnabledBypass:
0x341818B0: F248 0090 MOVW R0, #0x8090
0x341818B4: F2C5 6002 MOVT R0, #0x5602
0x341818B8: 6800 LDR R0, [R0]
0x341818BA: F3C0 60C0 UBFX R0, R0, #27, #1
0x341818BE: 4770 BX LR
Section .text.LL_RCC_PLL3_IsEnabledBypass from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_PLL3_IsEnabledBypass:
0x341818C0: F248 00A0 MOVW R0, #0x80A0
0x341818C4: F2C5 6002 MOVT R0, #0x5602
0x341818C8: 6800 LDR R0, [R0]
0x341818CA: F3C0 60C0 UBFX R0, R0, #27, #1
0x341818CE: 4770 BX LR
Section .text.LL_RCC_PLL4_IsEnabledBypass from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_PLL4_IsEnabledBypass:
0x341818D0: F248 00B0 MOVW R0, #0x80B0
0x341818D4: F2C5 6002 MOVT R0, #0x5602
0x341818D8: 6800 LDR R0, [R0]
0x341818DA: F3C0 60C0 UBFX R0, R0, #27, #1
0x341818DE: 4770 BX LR
Section .text.RCC_GetSysClockFreq from blto2_FSBL_lto.o, size=232, align=4
RCC_GetSysClockFreq:
0x341818E0: B580 PUSH 123R7, LR}
0x341818E2: B086 SUB SP, SP, #24
0x341818E4: 9005 STR R0, [SP, #20]
0x341818E6: 9104 STR R1, [SP, #16]
0x341818E8: 2000 MOVS R0, #0
0x341818EA: 9003 STR R0, [SP, #12]
0x341818EC: F7FF FF10 BL LL_RCC_GetSysClkSource ; 0x34181710
0x341818F0: 4601 MOV R1, R0
0x341818F2: 9102 STR R1, [SP, #8]
0x341818F4: B160 CBZ R0, .L1 ; 0x34181910
0x341818F6: 9802 LDR R0, [SP, #8]
0x341818F8: F1B0 5F80 CMP.W R0, #0x10000000
0x341818FC: D012 BEQ 46L2 ; 0x34181924
0x341818FE: 9802 LDR R0, [SP, #8]
0x34181900: F1B0 5F00 CMP.W R0, #0x20000000
0x34181904: D022 BEQ 46L3 ; 0x3418194C
0x34181906: 9802 LDR R0, [SP, #8]
0x34181908: F1B0 5F40 CMP.W R0, #0x30000000
0x3418190C: D024 BEQ 46L4 ; 0x34181958
0x3418190E: E058 B 46L10 ; 0x341819C2
.L1:
0x34181910: F7FF FFBE BL LL_RCC_HSI_GetDivider ; 0x34181890
0x34181914: 09C1 LSRS R1, R0, #7
0x34181916: F249 0000 MOVW R0, #0x9000
0x3418191A: F2C0 30D0 MOVT R0, #0x03D0
0x3418191E: 40C8 LSRS R0, R1
0x34181920: 9003 STR R0, [SP, #12]
0x34181922: E04E B 46L10 ; 0x341819C2
.L2:
0x34181924: F248 0044 MOVW R0, #0x8044
0x34181928: F2C5 6002 MOVT R0, #0x5602
0x3418192C: 6800 LDR R0, [R0]
0x3418192E: F400 7000 AND R0, R0, #0x0200
0x34181932: F5B0 7F00 CMP.W R0, #0x0200
0x34181936: F640 1000 MOVW R0, #0x0900
0x3418193A: F2C0 003D MOVT R0, #61
0x3418193E: BF04 ITT EQ
0x34181940: F242 4000 MOVWEQ R0, #0x2400
0x34181944: F2C0 00F4 MOVTEQ R0, #244
0x34181948: 9003 STR R0, [SP, #12]
0x3418194A: E03A B 46L10 ; 0x341819C2
.L3:
0x3418194C: F646 4000 MOVW R0, #0x6C00
0x34181950: F2C0 20DC MOVT R0, #0x02DC
0x34181954: 9003 STR R0, [SP, #12]
0x34181956: E034 B 46L10 ; 0x341819C2
.L4:
0x34181958: 9805 LDR R0, [SP, #20]
0x3418195A: 9001 STR R0, [SP, #4]
0x3418195C: B160 CBZ R0, .L5 ; 0x34181978
0x3418195E: 9801 LDR R0, [SP, #4]
0x34181960: F1B0 5F80 CMP.W R0, #0x10000000
0x34181964: D011 BEQ 46L6 ; 0x3418198A
0x34181966: 9801 LDR R0, [SP, #4]
0x34181968: F1B0 5F00 CMP.W R0, #0x20000000
0x3418196C: D016 BEQ 46L7 ; 0x3418199C
0x3418196E: 9801 LDR R0, [SP, #4]
0x34181970: F1B0 5F40 CMP.W R0, #0x30000000
0x34181974: D01B BEQ 46L8 ; 0x341819AE
0x34181976: E023 B 46L9 ; 0x341819C0
.L5:
0x34181978: F00F F806 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x34190988
0x3418197C: 9003 STR R0, [SP, #12]
0x3418197E: 9803 LDR R0, [SP, #12]
0x34181980: 9904 LDR R1, [SP, #16]
0x34181982: FBB0 F0F1 UDIV R0, R0, R1
0x34181986: 9003 STR R0, [SP, #12]
0x34181988: E01A B 46L9 ; 0x341819C0
.L6:
0x3418198A: F00F F83F BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34190A0C
0x3418198E: 9003 STR R0, [SP, #12]
0x34181990: 9803 LDR R0, [SP, #12]
0x34181992: 9904 LDR R1, [SP, #16]
0x34181994: FBB0 F0F1 UDIV R0, R0, R1
0x34181998: 9003 STR R0, [SP, #12]
0x3418199A: E011 B 46L9 ; 0x341819C0
.L7:
0x3418199C: F00F F878 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x34190A90
0x341819A0: 9003 STR R0, [SP, #12]
0x341819A2: 9803 LDR R0, [SP, #12]
0x341819A4: 9904 LDR R1, [SP, #16]
0x341819A6: FBB0 F0F1 UDIV R0, R0, R1
0x341819AA: 9003 STR R0, [SP, #12]
0x341819AC: E008 B 46L9 ; 0x341819C0
.L8:
0x341819AE: F00F F8B1 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34190B14
0x341819B2: 9003 STR R0, [SP, #12]
0x341819B4: 9803 LDR R0, [SP, #12]
0x341819B6: 9904 LDR R1, [SP, #16]
0x341819B8: FBB0 F0F1 UDIV R0, R0, R1
0x341819BC: 9003 STR R0, [SP, #12]
0x341819BE: E7FF B 46L9 ; 0x341819C0
.L9:
0x341819C0: E7FF B 46L10 ; 0x341819C2
.L10:
0x341819C2: 9803 LDR R0, [SP, #12]
0x341819C4: B006 ADD SP, SP, #24
0x341819C6: BD80 POP 123R7, PC}
Section .text.HAL_RCC_GetClockConfig from blto2_FSBL_lto.o, size=240, align=4
HAL_RCC_GetClockConfig:
0x341819C8: B082 SUB SP, SP, #8
0x341819CA: 9001 STR R0, [SP, #4]
0x341819CC: 9901 LDR R1, [SP, #4]
0x341819CE: 207F MOVS R0, #127
0x341819D0: 6008 STR R0, [R1]
0x341819D2: F248 0020 MOVW R0, #0x8020
0x341819D6: F2C5 6002 MOVT R0, #0x5602
0x341819DA: 6800 LDR R0, [R0]
0x341819DC: 9000 STR R0, [SP, #0]
0x341819DE: 9800 LDR R0, [SP, #0]
0x341819E0: F400 1040 AND R0, R0, #0x300000
0x341819E4: 0900 LSRS R0, R0, #4
0x341819E6: 9901 LDR R1, [SP, #4]
0x341819E8: 6048 STR R0, [R1, #4]
0x341819EA: 9800 LDR R0, [SP, #0]
0x341819EC: F000 5040 AND R0, R0, #0x30000000
0x341819F0: 0900 LSRS R0, R0, #4
0x341819F2: 9901 LDR R1, [SP, #4]
0x341819F4: 6088 STR R0, [R1, #8]
0x341819F6: F248 0024 MOVW R0, #0x8024
0x341819FA: F2C5 6002 MOVT R0, #0x5602
0x341819FE: 6800 LDR R0, [R0]
0x34181A00: 9000 STR R0, [SP, #0]
0x34181A02: 9800 LDR R0, [SP, #0]
0x34181A04: F400 00E0 AND R0, R0, #0x700000
0x34181A08: 9901 LDR R1, [SP, #4]
0x34181A0A: 60C8 STR R0, [R1, #12]
0x34181A0C: 9800 LDR R0, [SP, #0]
0x34181A0E: F000 0007 AND R0, R0, #7
0x34181A12: 9901 LDR R1, [SP, #4]
0x34181A14: 6108 STR R0, [R1, #16]
0x34181A16: 9800 LDR R0, [SP, #0]
0x34181A18: F000 0070 AND R0, R0, #112
0x34181A1C: 9901 LDR R1, [SP, #4]
0x34181A1E: 6148 STR R0, [R1, #20]
0x34181A20: 9800 LDR R0, [SP, #0]
0x34181A22: F400 40E0 AND R0, R0, #0x7000
0x34181A26: 9901 LDR R1, [SP, #4]
0x34181A28: 6188 STR R0, [R1, #24]
0x34181A2A: 9800 LDR R0, [SP, #0]
0x34181A2C: F400 20E0 AND R0, R0, #0x070000
0x34181A30: 9901 LDR R1, [SP, #4]
0x34181A32: 61C8 STR R0, [R1, #28]
0x34181A34: F248 00C4 MOVW R0, #0x80C4
0x34181A38: F2C5 6002 MOVT R0, #0x5602
0x34181A3C: 6800 LDR R0, [R0]
0x34181A3E: 9000 STR R0, [SP, #0]
0x34181A40: 9800 LDR R0, [SP, #0]
0x34181A42: F000 5040 AND R0, R0, #0x30000000
0x34181A46: 9901 LDR R1, [SP, #4]
0x34181A48: 6208 STR R0, [R1, #32]
0x34181A4A: F89D 0002 LDRB.W R0, [SP, #2]
0x34181A4E: 3001 ADDS R0, #1
0x34181A50: 9901 LDR R1, [SP, #4]
0x34181A52: 6248 STR R0, [R1, #36]
0x34181A54: F248 00C8 MOVW R0, #0x80C8
0x34181A58: F2C5 6002 MOVT R0, #0x5602
0x34181A5C: 6800 LDR R0, [R0]
0x34181A5E: 9000 STR R0, [SP, #0]
0x34181A60: 9800 LDR R0, [SP, #0]
0x34181A62: F000 5040 AND R0, R0, #0x30000000
0x34181A66: 9901 LDR R1, [SP, #4]
0x34181A68: 6288 STR R0, [R1, #40]
0x34181A6A: F89D 0002 LDRB.W R0, [SP, #2]
0x34181A6E: 3001 ADDS R0, #1
0x34181A70: 9901 LDR R1, [SP, #4]
0x34181A72: 62C8 STR R0, [R1, #44]
0x34181A74: F248 00D8 MOVW R0, #0x80D8
0x34181A78: F2C5 6002 MOVT R0, #0x5602
0x34181A7C: 6800 LDR R0, [R0]
0x34181A7E: 9000 STR R0, [SP, #0]
0x34181A80: 9800 LDR R0, [SP, #0]
0x34181A82: F000 5040 AND R0, R0, #0x30000000
0x34181A86: 9901 LDR R1, [SP, #4]
0x34181A88: 6308 STR R0, [R1, #48]
0x34181A8A: F89D 0002 LDRB.W R0, [SP, #2]
0x34181A8E: 3001 ADDS R0, #1
0x34181A90: 9901 LDR R1, [SP, #4]
0x34181A92: 6348 STR R0, [R1, #52]
0x34181A94: F248 00EC MOVW R0, #0x80EC
0x34181A98: F2C5 6002 MOVT R0, #0x5602
0x34181A9C: 6800 LDR R0, [R0]
0x34181A9E: 9000 STR R0, [SP, #0]
0x34181AA0: 9800 LDR R0, [SP, #0]
0x34181AA2: F000 5040 AND R0, R0, #0x30000000
0x34181AA6: 9901 LDR R1, [SP, #4]
0x34181AA8: 6388 STR R0, [R1, #56]
0x34181AAA: F89D 0002 LDRB.W R0, [SP, #2]
0x34181AAE: 3001 ADDS R0, #1
0x34181AB0: 9901 LDR R1, [SP, #4]
0x34181AB2: 63C8 STR R0, [R1, #60]
0x34181AB4: B002 ADD SP, SP, #8
0x34181AB6: 4770 BX LR
Section .text.HAL_RCCEx_PeriphCLKConfig from blto2_FSBL_lto.o, size=24268, align=4
HAL_RCCEx_PeriphCLKConfig:
0x34181AB8: B580 PUSH 123R7, LR}
0x34181ABA: B086 SUB SP, SP, #24
0x34181ABC: 9004 STR R0, [SP, #16]
0x34181ABE: 2000 MOVS R0, #0
0x34181AC0: F88D 0007 STRB.W R0, [SP, #7]
0x34181AC4: F88D 0006 STRB.W R0, [SP, #6]
0x34181AC8: 9804 LDR R0, [SP, #16]
0x34181ACA: 7840 LDRB R0, [R0, #1]
0x34181ACC: 0700 LSLS R0, R0, #28
0x34181ACE: 2800 CMP R0, #0
0x34181AD0: F100 8135 BMI.W 46L1 ; 0x34181D3E
0x34181AD4: 9804 LDR R0, [SP, #16]
0x34181AD6: 7980 LDRB R0, [R0, #6]
0x34181AD8: 0640 LSLS R0, R0, #25
0x34181ADA: 2800 CMP R0, #0
0x34181ADC: F100 812F BMI.W 46L1 ; 0x34181D3E
0x34181AE0: 9804 LDR R0, [SP, #16]
0x34181AE2: 7980 LDRB R0, [R0, #6]
0x34181AE4: 0600 LSLS R0, R0, #24
0x34181AE6: 2800 CMP R0, #0
0x34181AE8: F100 8129 BMI.W 46L1 ; 0x34181D3E
0x34181AEC: 9804 LDR R0, [SP, #16]
0x34181AEE: 79C0 LDRB R0, [R0, #7]
0x34181AF0: 07C0 LSLS R0, R0, #31
0x34181AF2: 2800 CMP R0, #0
0x34181AF4: F040 8123 BNE.W 46L1 ; 0x34181D3E
0x34181AF8: 9804 LDR R0, [SP, #16]
0x34181AFA: 7800 LDRB R0, [R0]
0x34181AFC: 0740 LSLS R0, R0, #29
0x34181AFE: 2800 CMP R0, #0
0x34181B00: F100 811D BMI.W 46L1 ; 0x34181D3E
0x34181B04: 9804 LDR R0, [SP, #16]
0x34181B06: 6800 LDR R0, [R0]
0x34181B08: 07C0 LSLS R0, R0, #31
0x34181B0A: 2800 CMP R0, #0
0x34181B0C: F040 8117 BNE.W 46L1 ; 0x34181D3E
0x34181B10: 9804 LDR R0, [SP, #16]
0x34181B12: 7800 LDRB R0, [R0]
0x34181B14: 0780 LSLS R0, R0, #30
0x34181B16: 2800 CMP R0, #0
0x34181B18: F100 8111 BMI.W 46L1 ; 0x34181D3E
0x34181B1C: 9804 LDR R0, [SP, #16]
0x34181B1E: 7800 LDRB R0, [R0]
0x34181B20: 0700 LSLS R0, R0, #28
0x34181B22: 2800 CMP R0, #0
0x34181B24: F100 810B BMI.W 46L1 ; 0x34181D3E
0x34181B28: 9804 LDR R0, [SP, #16]
0x34181B2A: 7800 LDRB R0, [R0]
0x34181B2C: 06C0 LSLS R0, R0, #27
0x34181B2E: 2800 CMP R0, #0
0x34181B30: F100 8105 BMI.W 46L1 ; 0x34181D3E
0x34181B34: 9804 LDR R0, [SP, #16]
0x34181B36: 7800 LDRB R0, [R0]
0x34181B38: 0680 LSLS R0, R0, #26
0x34181B3A: 2800 CMP R0, #0
0x34181B3C: F100 80FF BMI.W 46L1 ; 0x34181D3E
0x34181B40: 9804 LDR R0, [SP, #16]
0x34181B42: 7800 LDRB R0, [R0]
0x34181B44: 0640 LSLS R0, R0, #25
0x34181B46: 2800 CMP R0, #0
0x34181B48: F100 80F9 BMI.W 46L1 ; 0x34181D3E
0x34181B4C: 9804 LDR R0, [SP, #16]
0x34181B4E: 7800 LDRB R0, [R0]
0x34181B50: 0600 LSLS R0, R0, #24
0x34181B52: 2800 CMP R0, #0
0x34181B54: F100 80F3 BMI.W 46L1 ; 0x34181D3E
0x34181B58: 9804 LDR R0, [SP, #16]
0x34181B5A: 7840 LDRB R0, [R0, #1]
0x34181B5C: 07C0 LSLS R0, R0, #31
0x34181B5E: 2800 CMP R0, #0
0x34181B60: F040 80ED BNE.W 46L1 ; 0x34181D3E
0x34181B64: 9804 LDR R0, [SP, #16]
0x34181B66: 7840 LDRB R0, [R0, #1]
0x34181B68: 0780 LSLS R0, R0, #30
0x34181B6A: 2800 CMP R0, #0
0x34181B6C: F100 80E7 BMI.W 46L1 ; 0x34181D3E
0x34181B70: 9804 LDR R0, [SP, #16]
0x34181B72: 7840 LDRB R0, [R0, #1]
0x34181B74: 0740 LSLS R0, R0, #29
0x34181B76: 2800 CMP R0, #0
0x34181B78: F100 80E1 BMI.W 46L1 ; 0x34181D3E
0x34181B7C: 9804 LDR R0, [SP, #16]
0x34181B7E: 7840 LDRB R0, [R0, #1]
0x34181B80: 06C0 LSLS R0, R0, #27
0x34181B82: 2800 CMP R0, #0
0x34181B84: F100 80DB BMI.W 46L1 ; 0x34181D3E
0x34181B88: 9804 LDR R0, [SP, #16]
0x34181B8A: 7840 LDRB R0, [R0, #1]
0x34181B8C: 0680 LSLS R0, R0, #26
0x34181B8E: 2800 CMP R0, #0
0x34181B90: F100 80D5 BMI.W 46L1 ; 0x34181D3E
0x34181B94: 9804 LDR R0, [SP, #16]
0x34181B96: 7840 LDRB R0, [R0, #1]
0x34181B98: 0640 LSLS R0, R0, #25
0x34181B9A: 2800 CMP R0, #0
0x34181B9C: F100 80CF BMI.W 46L1 ; 0x34181D3E
0x34181BA0: 9804 LDR R0, [SP, #16]
0x34181BA2: 7840 LDRB R0, [R0, #1]
0x34181BA4: 0600 LSLS R0, R0, #24
0x34181BA6: 2800 CMP R0, #0
0x34181BA8: F100 80C9 BMI.W 46L1 ; 0x34181D3E
0x34181BAC: 9804 LDR R0, [SP, #16]
0x34181BAE: 7880 LDRB R0, [R0, #2]
0x34181BB0: 07C0 LSLS R0, R0, #31
0x34181BB2: 2800 CMP R0, #0
0x34181BB4: F040 80C3 BNE.W 46L1 ; 0x34181D3E
0x34181BB8: 9804 LDR R0, [SP, #16]
0x34181BBA: 7880 LDRB R0, [R0, #2]
0x34181BBC: 0780 LSLS R0, R0, #30
0x34181BBE: 2800 CMP R0, #0
0x34181BC0: F100 80BD BMI.W 46L1 ; 0x34181D3E
0x34181BC4: 9804 LDR R0, [SP, #16]
0x34181BC6: 7880 LDRB R0, [R0, #2]
0x34181BC8: 0740 LSLS R0, R0, #29
0x34181BCA: 2800 CMP R0, #0
0x34181BCC: F100 80B7 BMI.W 46L1 ; 0x34181D3E
0x34181BD0: 9804 LDR R0, [SP, #16]
0x34181BD2: 7880 LDRB R0, [R0, #2]
0x34181BD4: 0700 LSLS R0, R0, #28
0x34181BD6: 2800 CMP R0, #0
0x34181BD8: F100 80B1 BMI.W 46L1 ; 0x34181D3E
0x34181BDC: 9804 LDR R0, [SP, #16]
0x34181BDE: 7880 LDRB R0, [R0, #2]
0x34181BE0: 06C0 LSLS R0, R0, #27
0x34181BE2: 2800 CMP R0, #0
0x34181BE4: F100 80AB BMI.W 46L1 ; 0x34181D3E
0x34181BE8: 9804 LDR R0, [SP, #16]
0x34181BEA: 7880 LDRB R0, [R0, #2]
0x34181BEC: 0680 LSLS R0, R0, #26
0x34181BEE: 2800 CMP R0, #0
0x34181BF0: F100 80A5 BMI.W 46L1 ; 0x34181D3E
0x34181BF4: 9804 LDR R0, [SP, #16]
0x34181BF6: 7880 LDRB R0, [R0, #2]
0x34181BF8: 0640 LSLS R0, R0, #25
0x34181BFA: 2800 CMP R0, #0
0x34181BFC: F100 809F BMI.W 46L1 ; 0x34181D3E
0x34181C00: 9804 LDR R0, [SP, #16]
0x34181C02: 7880 LDRB R0, [R0, #2]
0x34181C04: 0600 LSLS R0, R0, #24
0x34181C06: 2800 CMP R0, #0
0x34181C08: F100 8099 BMI.W 46L1 ; 0x34181D3E
0x34181C0C: 9804 LDR R0, [SP, #16]
0x34181C0E: 78C0 LDRB R0, [R0, #3]
0x34181C10: 07C0 LSLS R0, R0, #31
0x34181C12: 2800 CMP R0, #0
0x34181C14: F040 8093 BNE.W 46L1 ; 0x34181D3E
0x34181C18: 9804 LDR R0, [SP, #16]
0x34181C1A: 78C0 LDRB R0, [R0, #3]
0x34181C1C: 0780 LSLS R0, R0, #30
0x34181C1E: 2800 CMP R0, #0
0x34181C20: F100 808D BMI.W 46L1 ; 0x34181D3E
0x34181C24: 9804 LDR R0, [SP, #16]
0x34181C26: 78C0 LDRB R0, [R0, #3]
0x34181C28: 0740 LSLS R0, R0, #29
0x34181C2A: 2800 CMP R0, #0
0x34181C2C: F100 8087 BMI.W 46L1 ; 0x34181D3E
0x34181C30: 9804 LDR R0, [SP, #16]
0x34181C32: 78C0 LDRB R0, [R0, #3]
0x34181C34: 0700 LSLS R0, R0, #28
0x34181C36: 2800 CMP R0, #0
0x34181C38: F100 8081 BMI.W 46L1 ; 0x34181D3E
0x34181C3C: 9804 LDR R0, [SP, #16]
0x34181C3E: 78C0 LDRB R0, [R0, #3]
0x34181C40: 06C0 LSLS R0, R0, #27
0x34181C42: 2800 CMP R0, #0
0x34181C44: D47B BMI 46L1 ; 0x34181D3E
0x34181C46: 9804 LDR R0, [SP, #16]
0x34181C48: 78C0 LDRB R0, [R0, #3]
0x34181C4A: 0680 LSLS R0, R0, #26
0x34181C4C: 2800 CMP R0, #0
0x34181C4E: D476 BMI 46L1 ; 0x34181D3E
0x34181C50: 9804 LDR R0, [SP, #16]
0x34181C52: 78C0 LDRB R0, [R0, #3]
0x34181C54: 0640 LSLS R0, R0, #25
0x34181C56: 2800 CMP R0, #0
0x34181C58: D471 BMI 46L1 ; 0x34181D3E
0x34181C5A: 9804 LDR R0, [SP, #16]
0x34181C5C: 78C0 LDRB R0, [R0, #3]
0x34181C5E: 0600 LSLS R0, R0, #24
0x34181C60: 2800 CMP R0, #0
0x34181C62: D46C BMI 46L1 ; 0x34181D3E
0x34181C64: 9804 LDR R0, [SP, #16]
0x34181C66: 7900 LDRB R0, [R0, #4]
0x34181C68: 07C0 LSLS R0, R0, #31
0x34181C6A: 2800 CMP R0, #0
0x34181C6C: D167 BNE 46L1 ; 0x34181D3E
0x34181C6E: 9804 LDR R0, [SP, #16]
0x34181C70: 7900 LDRB R0, [R0, #4]
0x34181C72: 0780 LSLS R0, R0, #30
0x34181C74: 2800 CMP R0, #0
0x34181C76: D462 BMI 46L1 ; 0x34181D3E
0x34181C78: 9804 LDR R0, [SP, #16]
0x34181C7A: 7900 LDRB R0, [R0, #4]
0x34181C7C: 0740 LSLS R0, R0, #29
0x34181C7E: 2800 CMP R0, #0
0x34181C80: D45D BMI 46L1 ; 0x34181D3E
0x34181C82: 9804 LDR R0, [SP, #16]
0x34181C84: 7900 LDRB R0, [R0, #4]
0x34181C86: 0700 LSLS R0, R0, #28
0x34181C88: 2800 CMP R0, #0
0x34181C8A: D458 BMI 46L1 ; 0x34181D3E
0x34181C8C: 9804 LDR R0, [SP, #16]
0x34181C8E: 7900 LDRB R0, [R0, #4]
0x34181C90: 06C0 LSLS R0, R0, #27
0x34181C92: 2800 CMP R0, #0
0x34181C94: D453 BMI 46L1 ; 0x34181D3E
0x34181C96: 9804 LDR R0, [SP, #16]
0x34181C98: 7900 LDRB R0, [R0, #4]
0x34181C9A: 0680 LSLS R0, R0, #26
0x34181C9C: 2800 CMP R0, #0
0x34181C9E: D44E BMI 46L1 ; 0x34181D3E
0x34181CA0: 9804 LDR R0, [SP, #16]
0x34181CA2: 7900 LDRB R0, [R0, #4]
0x34181CA4: 0640 LSLS R0, R0, #25
0x34181CA6: 2800 CMP R0, #0
0x34181CA8: D449 BMI 46L1 ; 0x34181D3E
0x34181CAA: 9804 LDR R0, [SP, #16]
0x34181CAC: 7900 LDRB R0, [R0, #4]
0x34181CAE: 0600 LSLS R0, R0, #24
0x34181CB0: 2800 CMP R0, #0
0x34181CB2: D444 BMI 46L1 ; 0x34181D3E
0x34181CB4: 9804 LDR R0, [SP, #16]
0x34181CB6: 7940 LDRB R0, [R0, #5]
0x34181CB8: 07C0 LSLS R0, R0, #31
0x34181CBA: 2800 CMP R0, #0
0x34181CBC: D13F BNE 46L1 ; 0x34181D3E
0x34181CBE: 9804 LDR R0, [SP, #16]
0x34181CC0: 7940 LDRB R0, [R0, #5]
0x34181CC2: 0780 LSLS R0, R0, #30
0x34181CC4: 2800 CMP R0, #0
0x34181CC6: D43A BMI 46L1 ; 0x34181D3E
0x34181CC8: 9804 LDR R0, [SP, #16]
0x34181CCA: 7940 LDRB R0, [R0, #5]
0x34181CCC: 0740 LSLS R0, R0, #29
0x34181CCE: 2800 CMP R0, #0
0x34181CD0: D435 BMI 46L1 ; 0x34181D3E
0x34181CD2: 9804 LDR R0, [SP, #16]
0x34181CD4: 7940 LDRB R0, [R0, #5]
0x34181CD6: 0700 LSLS R0, R0, #28
0x34181CD8: 2800 CMP R0, #0
0x34181CDA: D430 BMI 46L1 ; 0x34181D3E
0x34181CDC: 9804 LDR R0, [SP, #16]
0x34181CDE: 7940 LDRB R0, [R0, #5]
0x34181CE0: 06C0 LSLS R0, R0, #27
0x34181CE2: 2800 CMP R0, #0
0x34181CE4: D42B BMI 46L1 ; 0x34181D3E
0x34181CE6: 9804 LDR R0, [SP, #16]
0x34181CE8: 7940 LDRB R0, [R0, #5]
0x34181CEA: 0680 LSLS R0, R0, #26
0x34181CEC: 2800 CMP R0, #0
0x34181CEE: D426 BMI 46L1 ; 0x34181D3E
0x34181CF0: 9804 LDR R0, [SP, #16]
0x34181CF2: 7940 LDRB R0, [R0, #5]
0x34181CF4: 0640 LSLS R0, R0, #25
0x34181CF6: 2800 CMP R0, #0
0x34181CF8: D421 BMI 46L1 ; 0x34181D3E
0x34181CFA: 9804 LDR R0, [SP, #16]
0x34181CFC: 7940 LDRB R0, [R0, #5]
0x34181CFE: 0600 LSLS R0, R0, #24
0x34181D00: 2800 CMP R0, #0
0x34181D02: D41C BMI 46L1 ; 0x34181D3E
0x34181D04: 9804 LDR R0, [SP, #16]
0x34181D06: 7980 LDRB R0, [R0, #6]
0x34181D08: 07C0 LSLS R0, R0, #31
0x34181D0A: B9C0 CBNZ R0, .L1 ; 0x34181D3E
0x34181D0C: 9804 LDR R0, [SP, #16]
0x34181D0E: 7980 LDRB R0, [R0, #6]
0x34181D10: 0780 LSLS R0, R0, #30
0x34181D12: 2800 CMP R0, #0
0x34181D14: D413 BMI 46L1 ; 0x34181D3E
0x34181D16: 9804 LDR R0, [SP, #16]
0x34181D18: 7980 LDRB R0, [R0, #6]
0x34181D1A: 0740 LSLS R0, R0, #29
0x34181D1C: 2800 CMP R0, #0
0x34181D1E: D40E BMI 46L1 ; 0x34181D3E
0x34181D20: 9804 LDR R0, [SP, #16]
0x34181D22: 7980 LDRB R0, [R0, #6]
0x34181D24: 06C0 LSLS R0, R0, #27
0x34181D26: 2800 CMP R0, #0
0x34181D28: D409 BMI 46L1 ; 0x34181D3E
0x34181D2A: 9804 LDR R0, [SP, #16]
0x34181D2C: 7980 LDRB R0, [R0, #6]
0x34181D2E: 0700 LSLS R0, R0, #28
0x34181D30: 2800 CMP R0, #0
0x34181D32: D404 BMI 46L1 ; 0x34181D3E
0x34181D34: 9804 LDR R0, [SP, #16]
0x34181D36: 7980 LDRB R0, [R0, #6]
0x34181D38: 0680 LSLS R0, R0, #26
0x34181D3A: 2800 CMP R0, #0
0x34181D3C: D500 BPL 46L2 ; 0x34181D40
.L1:
0x34181D3E: E006 B 46L3 ; 0x34181D4E
.L2:
0x34181D40: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34181D44: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34181D48: 2188 MOVS R1, #136
0x34181D4A: F00A FFF1 BL assert_failed ; 0x3418CD30
.L3:
0x34181D4E: 9804 LDR R0, [SP, #16]
0x34181D50: 78C0 LDRB R0, [R0, #3]
0x34181D52: 0700 LSLS R0, R0, #28
0x34181D54: 2800 CMP R0, #0
0x34181D56: F140 82B1 BPL.W 46L15 ; 0x341822BC
0x34181D5A: 9804 LDR R0, [SP, #16]
0x34181D5C: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34181D60: F5B0 7F80 CMP.W R0, #0x0100
0x34181D64: F000 8248 BEQ.W 46L4 ; 0x341821F8
0x34181D68: 9804 LDR R0, [SP, #16]
0x34181D6A: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34181D6E: F5B0 7F00 CMP.W R0, #0x0200
0x34181D72: F000 8241 BEQ.W 46L4 ; 0x341821F8
0x34181D76: 9804 LDR R0, [SP, #16]
0x34181D78: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34181D7C: F5B0 7F40 CMP.W R0, #0x0300
0x34181D80: F000 823A BEQ.W 46L4 ; 0x341821F8
0x34181D84: 9804 LDR R0, [SP, #16]
0x34181D86: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34181D8A: F5B0 5F98 CMP.W R0, #0x1300
0x34181D8E: F000 8233 BEQ.W 46L4 ; 0x341821F8
0x34181D92: 9804 LDR R0, [SP, #16]
0x34181D94: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34181D98: F5B0 5F0C CMP.W R0, #0x2300
0x34181D9C: F000 822C BEQ.W 46L4 ; 0x341821F8
0x34181DA0: 9804 LDR R0, [SP, #16]
0x34181DA2: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34181DA6: F5B0 5F4C CMP.W R0, #0x3300
0x34181DAA: F000 8225 BEQ.W 46L4 ; 0x341821F8
0x34181DAE: 9804 LDR R0, [SP, #16]
0x34181DB0: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34181DB4: F5B0 4F86 CMP.W R0, #0x4300
0x34181DB8: F000 821E BEQ.W 46L4 ; 0x341821F8
0x34181DBC: 9804 LDR R0, [SP, #16]
0x34181DBE: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34181DC2: F5B0 4FA6 CMP.W R0, #0x5300
0x34181DC6: F000 8217 BEQ.W 46L4 ; 0x341821F8
0x34181DCA: 9804 LDR R0, [SP, #16]
0x34181DCC: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34181DD0: F5B0 4FC6 CMP.W R0, #0x6300
0x34181DD4: F000 8210 BEQ.W 46L4 ; 0x341821F8
0x34181DD8: 9804 LDR R0, [SP, #16]
0x34181DDA: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34181DDE: F5B0 4FE6 CMP.W R0, #0x7300
0x34181DE2: F000 8209 BEQ.W 46L4 ; 0x341821F8
0x34181DE6: 9804 LDR R0, [SP, #16]
0x34181DE8: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34181DEC: F5B0 4F03 CMP.W R0, #0x8300
0x34181DF0: F000 8202 BEQ.W 46L4 ; 0x341821F8
0x34181DF4: 9804 LDR R0, [SP, #16]
0x34181DF6: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34181DFA: F5B0 4F13 CMP.W R0, #0x9300
0x34181DFE: F000 81FB BEQ.W 46L4 ; 0x341821F8
0x34181E02: 9804 LDR R0, [SP, #16]
0x34181E04: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34181E08: F5B0 4F23 CMP.W R0, #0xA300
0x34181E0C: F000 81F4 BEQ.W 46L4 ; 0x341821F8
0x34181E10: 9804 LDR R0, [SP, #16]
0x34181E12: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34181E16: F5B0 4F33 CMP.W R0, #0xB300
0x34181E1A: F000 81ED BEQ.W 46L4 ; 0x341821F8
0x34181E1E: 9804 LDR R0, [SP, #16]
0x34181E20: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34181E24: F5B0 4F43 CMP.W R0, #0xC300
0x34181E28: F000 81E6 BEQ.W 46L4 ; 0x341821F8
0x34181E2C: 9804 LDR R0, [SP, #16]
0x34181E2E: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34181E32: F5B0 4F53 CMP.W R0, #0xD300
0x34181E36: F000 81DF BEQ.W 46L4 ; 0x341821F8
0x34181E3A: 9804 LDR R0, [SP, #16]
0x34181E3C: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34181E40: F5B0 4F63 CMP.W R0, #0xE300
0x34181E44: F000 81D8 BEQ.W 46L4 ; 0x341821F8
0x34181E48: 9804 LDR R0, [SP, #16]
0x34181E4A: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34181E4E: F5B0 4F73 CMP.W R0, #0xF300
0x34181E52: F000 81D1 BEQ.W 46L4 ; 0x341821F8
0x34181E56: 9804 LDR R0, [SP, #16]
0x34181E58: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34181E5C: F240 3100 MOVW R1, #0x0300
0x34181E60: F2C0 0101 MOVT R1, #1
0x34181E64: 4288 CMP R0, R1
0x34181E66: F000 81C7 BEQ.W 46L4 ; 0x341821F8
0x34181E6A: 9804 LDR R0, [SP, #16]
0x34181E6C: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34181E70: F241 3100 MOVW R1, #0x1300
0x34181E74: F2C0 0101 MOVT R1, #1
0x34181E78: 4288 CMP R0, R1
0x34181E7A: F000 81BD BEQ.W 46L4 ; 0x341821F8
0x34181E7E: 9804 LDR R0, [SP, #16]
0x34181E80: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34181E84: F242 3100 MOVW R1, #0x2300
0x34181E88: F2C0 0101 MOVT R1, #1
0x34181E8C: 4288 CMP R0, R1
0x34181E8E: F000 81B3 BEQ.W 46L4 ; 0x341821F8
0x34181E92: 9804 LDR R0, [SP, #16]
0x34181E94: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34181E98: F243 3100 MOVW R1, #0x3300
0x34181E9C: F2C0 0101 MOVT R1, #1
0x34181EA0: 4288 CMP R0, R1
0x34181EA2: F000 81A9 BEQ.W 46L4 ; 0x341821F8
0x34181EA6: 9804 LDR R0, [SP, #16]
0x34181EA8: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34181EAC: F244 3100 MOVW R1, #0x4300
0x34181EB0: F2C0 0101 MOVT R1, #1
0x34181EB4: 4288 CMP R0, R1
0x34181EB6: F000 819F BEQ.W 46L4 ; 0x341821F8
0x34181EBA: 9804 LDR R0, [SP, #16]
0x34181EBC: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34181EC0: F245 3100 MOVW R1, #0x5300
0x34181EC4: F2C0 0101 MOVT R1, #1
0x34181EC8: 4288 CMP R0, R1
0x34181ECA: F000 8195 BEQ.W 46L4 ; 0x341821F8
0x34181ECE: 9804 LDR R0, [SP, #16]
0x34181ED0: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34181ED4: F246 3100 MOVW R1, #0x6300
0x34181ED8: F2C0 0101 MOVT R1, #1
0x34181EDC: 4288 CMP R0, R1
0x34181EDE: F000 818B BEQ.W 46L4 ; 0x341821F8
0x34181EE2: 9804 LDR R0, [SP, #16]
0x34181EE4: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34181EE8: F247 3100 MOVW R1, #0x7300
0x34181EEC: F2C0 0101 MOVT R1, #1
0x34181EF0: 4288 CMP R0, R1
0x34181EF2: F000 8181 BEQ.W 46L4 ; 0x341821F8
0x34181EF6: 9804 LDR R0, [SP, #16]
0x34181EF8: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34181EFC: F248 3100 MOVW R1, #0x8300
0x34181F00: F2C0 0101 MOVT R1, #1
0x34181F04: 4288 CMP R0, R1
0x34181F06: F000 8177 BEQ.W 46L4 ; 0x341821F8
0x34181F0A: 9804 LDR R0, [SP, #16]
0x34181F0C: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34181F10: F249 3100 MOVW R1, #0x9300
0x34181F14: F2C0 0101 MOVT R1, #1
0x34181F18: 4288 CMP R0, R1
0x34181F1A: F000 816D BEQ.W 46L4 ; 0x341821F8
0x34181F1E: 9804 LDR R0, [SP, #16]
0x34181F20: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34181F24: F24A 3100 MOVW R1, #0xA300
0x34181F28: F2C0 0101 MOVT R1, #1
0x34181F2C: 4288 CMP R0, R1
0x34181F2E: F000 8163 BEQ.W 46L4 ; 0x341821F8
0x34181F32: 9804 LDR R0, [SP, #16]
0x34181F34: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34181F38: F24B 3100 MOVW R1, #0xB300
0x34181F3C: F2C0 0101 MOVT R1, #1
0x34181F40: 4288 CMP R0, R1
0x34181F42: F000 8159 BEQ.W 46L4 ; 0x341821F8
0x34181F46: 9804 LDR R0, [SP, #16]
0x34181F48: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34181F4C: F24C 3100 MOVW R1, #0xC300
0x34181F50: F2C0 0101 MOVT R1, #1
0x34181F54: 4288 CMP R0, R1
0x34181F56: F000 814F BEQ.W 46L4 ; 0x341821F8
0x34181F5A: 9804 LDR R0, [SP, #16]
0x34181F5C: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34181F60: F24D 3100 MOVW R1, #0xD300
0x34181F64: F2C0 0101 MOVT R1, #1
0x34181F68: 4288 CMP R0, R1
0x34181F6A: F000 8145 BEQ.W 46L4 ; 0x341821F8
0x34181F6E: 9804 LDR R0, [SP, #16]
0x34181F70: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34181F74: F24E 3100 MOVW R1, #0xE300
0x34181F78: F2C0 0101 MOVT R1, #1
0x34181F7C: 4288 CMP R0, R1
0x34181F7E: F000 813B BEQ.W 46L4 ; 0x341821F8
0x34181F82: 9804 LDR R0, [SP, #16]
0x34181F84: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34181F88: F24F 3100 MOVW R1, #0xF300
0x34181F8C: F2C0 0101 MOVT R1, #1
0x34181F90: 4288 CMP R0, R1
0x34181F92: F000 8131 BEQ.W 46L4 ; 0x341821F8
0x34181F96: 9804 LDR R0, [SP, #16]
0x34181F98: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34181F9C: F240 3100 MOVW R1, #0x0300
0x34181FA0: F2C0 0102 MOVT R1, #2
0x34181FA4: 4288 CMP R0, R1
0x34181FA6: F000 8127 BEQ.W 46L4 ; 0x341821F8
0x34181FAA: 9804 LDR R0, [SP, #16]
0x34181FAC: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34181FB0: F241 3100 MOVW R1, #0x1300
0x34181FB4: F2C0 0102 MOVT R1, #2
0x34181FB8: 4288 CMP R0, R1
0x34181FBA: F000 811D BEQ.W 46L4 ; 0x341821F8
0x34181FBE: 9804 LDR R0, [SP, #16]
0x34181FC0: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34181FC4: F242 3100 MOVW R1, #0x2300
0x34181FC8: F2C0 0102 MOVT R1, #2
0x34181FCC: 4288 CMP R0, R1
0x34181FCE: F000 8113 BEQ.W 46L4 ; 0x341821F8
0x34181FD2: 9804 LDR R0, [SP, #16]
0x34181FD4: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34181FD8: F243 3100 MOVW R1, #0x3300
0x34181FDC: F2C0 0102 MOVT R1, #2
0x34181FE0: 4288 CMP R0, R1
0x34181FE2: F000 8109 BEQ.W 46L4 ; 0x341821F8
0x34181FE6: 9804 LDR R0, [SP, #16]
0x34181FE8: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34181FEC: F244 3100 MOVW R1, #0x4300
0x34181FF0: F2C0 0102 MOVT R1, #2
0x34181FF4: 4288 CMP R0, R1
0x34181FF6: F000 80FF BEQ.W 46L4 ; 0x341821F8
0x34181FFA: 9804 LDR R0, [SP, #16]
0x34181FFC: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34182000: F245 3100 MOVW R1, #0x5300
0x34182004: F2C0 0102 MOVT R1, #2
0x34182008: 4288 CMP R0, R1
0x3418200A: F000 80F5 BEQ.W 46L4 ; 0x341821F8
0x3418200E: 9804 LDR R0, [SP, #16]
0x34182010: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34182014: F246 3100 MOVW R1, #0x6300
0x34182018: F2C0 0102 MOVT R1, #2
0x3418201C: 4288 CMP R0, R1
0x3418201E: F000 80EB BEQ.W 46L4 ; 0x341821F8
0x34182022: 9804 LDR R0, [SP, #16]
0x34182024: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34182028: F247 3100 MOVW R1, #0x7300
0x3418202C: F2C0 0102 MOVT R1, #2
0x34182030: 4288 CMP R0, R1
0x34182032: F000 80E1 BEQ.W 46L4 ; 0x341821F8
0x34182036: 9804 LDR R0, [SP, #16]
0x34182038: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x3418203C: F248 3100 MOVW R1, #0x8300
0x34182040: F2C0 0102 MOVT R1, #2
0x34182044: 4288 CMP R0, R1
0x34182046: F000 80D7 BEQ.W 46L4 ; 0x341821F8
0x3418204A: 9804 LDR R0, [SP, #16]
0x3418204C: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34182050: F249 3100 MOVW R1, #0x9300
0x34182054: F2C0 0102 MOVT R1, #2
0x34182058: 4288 CMP R0, R1
0x3418205A: F000 80CD BEQ.W 46L4 ; 0x341821F8
0x3418205E: 9804 LDR R0, [SP, #16]
0x34182060: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34182064: F24A 3100 MOVW R1, #0xA300
0x34182068: F2C0 0102 MOVT R1, #2
0x3418206C: 4288 CMP R0, R1
0x3418206E: F000 80C3 BEQ.W 46L4 ; 0x341821F8
0x34182072: 9804 LDR R0, [SP, #16]
0x34182074: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34182078: F24B 3100 MOVW R1, #0xB300
0x3418207C: F2C0 0102 MOVT R1, #2
0x34182080: 4288 CMP R0, R1
0x34182082: F000 80B9 BEQ.W 46L4 ; 0x341821F8
0x34182086: 9804 LDR R0, [SP, #16]
0x34182088: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x3418208C: F24C 3100 MOVW R1, #0xC300
0x34182090: F2C0 0102 MOVT R1, #2
0x34182094: 4288 CMP R0, R1
0x34182096: F000 80AF BEQ.W 46L4 ; 0x341821F8
0x3418209A: 9804 LDR R0, [SP, #16]
0x3418209C: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x341820A0: F24D 3100 MOVW R1, #0xD300
0x341820A4: F2C0 0102 MOVT R1, #2
0x341820A8: 4288 CMP R0, R1
0x341820AA: F000 80A5 BEQ.W 46L4 ; 0x341821F8
0x341820AE: 9804 LDR R0, [SP, #16]
0x341820B0: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x341820B4: F24E 3100 MOVW R1, #0xE300
0x341820B8: F2C0 0102 MOVT R1, #2
0x341820BC: 4288 CMP R0, R1
0x341820BE: F000 809B BEQ.W 46L4 ; 0x341821F8
0x341820C2: 9804 LDR R0, [SP, #16]
0x341820C4: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x341820C8: F24F 3100 MOVW R1, #0xF300
0x341820CC: F2C0 0102 MOVT R1, #2
0x341820D0: 4288 CMP R0, R1
0x341820D2: F000 8091 BEQ.W 46L4 ; 0x341821F8
0x341820D6: 9804 LDR R0, [SP, #16]
0x341820D8: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x341820DC: F240 3100 MOVW R1, #0x0300
0x341820E0: F2C0 0103 MOVT R1, #3
0x341820E4: 4288 CMP R0, R1
0x341820E6: F000 8087 BEQ.W 46L4 ; 0x341821F8
0x341820EA: 9804 LDR R0, [SP, #16]
0x341820EC: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x341820F0: F241 3100 MOVW R1, #0x1300
0x341820F4: F2C0 0103 MOVT R1, #3
0x341820F8: 4288 CMP R0, R1
0x341820FA: D07D BEQ 46L4 ; 0x341821F8
0x341820FC: 9804 LDR R0, [SP, #16]
0x341820FE: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34182102: F242 3100 MOVW R1, #0x2300
0x34182106: F2C0 0103 MOVT R1, #3
0x3418210A: 4288 CMP R0, R1
0x3418210C: D074 BEQ 46L4 ; 0x341821F8
0x3418210E: 9804 LDR R0, [SP, #16]
0x34182110: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34182114: F243 3100 MOVW R1, #0x3300
0x34182118: F2C0 0103 MOVT R1, #3
0x3418211C: 4288 CMP R0, R1
0x3418211E: D06B BEQ 46L4 ; 0x341821F8
0x34182120: 9804 LDR R0, [SP, #16]
0x34182122: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34182126: F244 3100 MOVW R1, #0x4300
0x3418212A: F2C0 0103 MOVT R1, #3
0x3418212E: 4288 CMP R0, R1
0x34182130: D062 BEQ 46L4 ; 0x341821F8
0x34182132: 9804 LDR R0, [SP, #16]
0x34182134: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34182138: F245 3100 MOVW R1, #0x5300
0x3418213C: F2C0 0103 MOVT R1, #3
0x34182140: 4288 CMP R0, R1
0x34182142: D059 BEQ 46L4 ; 0x341821F8
0x34182144: 9804 LDR R0, [SP, #16]
0x34182146: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x3418214A: F246 3100 MOVW R1, #0x6300
0x3418214E: F2C0 0103 MOVT R1, #3
0x34182152: 4288 CMP R0, R1
0x34182154: D050 BEQ 46L4 ; 0x341821F8
0x34182156: 9804 LDR R0, [SP, #16]
0x34182158: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x3418215C: F247 3100 MOVW R1, #0x7300
0x34182160: F2C0 0103 MOVT R1, #3
0x34182164: 4288 CMP R0, R1
0x34182166: D047 BEQ 46L4 ; 0x341821F8
0x34182168: 9804 LDR R0, [SP, #16]
0x3418216A: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x3418216E: F248 3100 MOVW R1, #0x8300
0x34182172: F2C0 0103 MOVT R1, #3
0x34182176: 4288 CMP R0, R1
0x34182178: D03E BEQ 46L4 ; 0x341821F8
0x3418217A: 9804 LDR R0, [SP, #16]
0x3418217C: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34182180: F249 3100 MOVW R1, #0x9300
0x34182184: F2C0 0103 MOVT R1, #3
0x34182188: 4288 CMP R0, R1
0x3418218A: D035 BEQ 46L4 ; 0x341821F8
0x3418218C: 9804 LDR R0, [SP, #16]
0x3418218E: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34182192: F24A 3100 MOVW R1, #0xA300
0x34182196: F2C0 0103 MOVT R1, #3
0x3418219A: 4288 CMP R0, R1
0x3418219C: D02C BEQ 46L4 ; 0x341821F8
0x3418219E: 9804 LDR R0, [SP, #16]
0x341821A0: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x341821A4: F24B 3100 MOVW R1, #0xB300
0x341821A8: F2C0 0103 MOVT R1, #3
0x341821AC: 4288 CMP R0, R1
0x341821AE: D023 BEQ 46L4 ; 0x341821F8
0x341821B0: 9804 LDR R0, [SP, #16]
0x341821B2: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x341821B6: F24C 3100 MOVW R1, #0xC300
0x341821BA: F2C0 0103 MOVT R1, #3
0x341821BE: 4288 CMP R0, R1
0x341821C0: D01A BEQ 46L4 ; 0x341821F8
0x341821C2: 9804 LDR R0, [SP, #16]
0x341821C4: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x341821C8: F24D 3100 MOVW R1, #0xD300
0x341821CC: F2C0 0103 MOVT R1, #3
0x341821D0: 4288 CMP R0, R1
0x341821D2: D011 BEQ 46L4 ; 0x341821F8
0x341821D4: 9804 LDR R0, [SP, #16]
0x341821D6: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x341821DA: F24E 3100 MOVW R1, #0xE300
0x341821DE: F2C0 0103 MOVT R1, #3
0x341821E2: 4288 CMP R0, R1
0x341821E4: D008 BEQ 46L4 ; 0x341821F8
0x341821E6: 9804 LDR R0, [SP, #16]
0x341821E8: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x341821EC: F24F 3100 MOVW R1, #0xF300
0x341821F0: F2C0 0103 MOVT R1, #3
0x341821F4: 4288 CMP R0, R1
0x341821F6: D100 BNE 46L5 ; 0x341821FA
.L4:
0x341821F8: E006 B 46L6 ; 0x34182208
.L5:
0x341821FA: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341821FE: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34182202: 218E MOVS R1, #142
0x34182204: F00A FD94 BL assert_failed ; 0x3418CD30
.L6:
0x34182208: F005 FBBC BL LL_RCC_GetRTCClockSource ; 0x34187984
0x3418220C: 9003 STR R0, [SP, #12]
0x3418220E: 9803 LDR R0, [SP, #12]
0x34182210: B1B0 CBZ R0, .L7 ; 0x34182240
0x34182212: 9803 LDR R0, [SP, #12]
0x34182214: 9904 LDR R1, [SP, #16]
0x34182216: F8D1 1188 LDR.W R1, [R1, #0x0188]
0x3418221A: F401 7140 AND R1, R1, #0x0300
0x3418221E: 4288 CMP R0, R1
0x34182220: D00E BEQ 46L7 ; 0x34182240
0x34182222: F644 002C MOVW R0, #0x482C
0x34182226: F2C5 6002 MOVT R0, #0x5602
0x3418222A: 6801 LDR R1, [R0]
0x3418222C: F041 0101 ORR R1, R1, #1
0x34182230: 6001 STR R1, [R0]
0x34182232: 6800 LDR R0, [R0]
0x34182234: 07C0 LSLS R0, R0, #31
0x34182236: B918 CBNZ R0, .L7 ; 0x34182240
0x34182238: 2001 MOVS R0, #1
0x3418223A: F88D 0007 STRB.W R0, [SP, #7]
0x3418223E: E7FF B 46L7 ; 0x34182240
.L7:
0x34182240: F89D 0007 LDRB.W R0, [SP, #7]
0x34182244: BBB0 CBNZ R0, .L14 ; 0x341822B4
0x34182246: 9804 LDR R0, [SP, #16]
0x34182248: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x3418224C: F5B0 7F80 CMP.W R0, #0x0100
0x34182250: D112 BNE 46L10 ; 0x34182278
0x34182252: F7FE FD09 BL HAL_GetTick ; 0x34180C68
0x34182256: 9002 STR R0, [SP, #8]
.L8:
0x34182258: F005 FB9C BL LL_RCC_LSE_IsReady.56 ; 0x34187994
0x3418225C: B960 CBNZ R0, .L10 ; 0x34182278
0x3418225E: F7FE FD03 BL HAL_GetTick ; 0x34180C68
0x34182262: 9902 LDR R1, [SP, #8]
0x34182264: 1A40 SUBS R0, R0, R1
0x34182266: F241 3189 MOVW R1, #0x1389
0x3418226A: 4288 CMP R0, R1
0x3418226C: D303 BCC 46L9 ; 0x34182276
0x3418226E: 2003 MOVS R0, #3
0x34182270: F88D 0007 STRB.W R0, [SP, #7]
0x34182274: E000 B 46L10 ; 0x34182278
.L9:
0x34182276: E7EF B 46L8 ; 0x34182258
.L10:
0x34182278: F89D 0007 LDRB.W R0, [SP, #7]
0x3418227C: B9A8 CBNZ R0, .L12 ; 0x341822AA
0x3418227E: 9804 LDR R0, [SP, #16]
0x34182280: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34182284: 43C0 MVNS R0, R0
0x34182286: F410 7F40 TST R0, #0x0300
0x3418228A: D106 BNE 46L11 ; 0x3418229A
0x3418228C: 9804 LDR R0, [SP, #16]
0x3418228E: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x34182292: F420 7040 BIC R0, R0, #0x0300
0x34182296: F005 FB85 BL LL_RCC_SetRTC_HSEPrescaler ; 0x341879A4
.L11:
0x3418229A: 9804 LDR R0, [SP, #16]
0x3418229C: F8D0 0188 LDR.W R0, [R0, #0x0188]
0x341822A0: F400 7040 AND R0, R0, #0x0300
0x341822A4: F005 FB8C BL LL_RCC_SetRTCClockSource ; 0x341879C0
0x341822A8: E003 B 46L13 ; 0x341822B2
.L12:
0x341822AA: F89D 0007 LDRB.W R0, [SP, #7]
0x341822AE: F88D 0006 STRB.W R0, [SP, #6]
.L13:
0x341822B2: E003 B 46L15 ; 0x341822BC
.L14:
0x341822B4: F89D 0007 LDRB.W R0, [SP, #7]
0x341822B8: F88D 0006 STRB.W R0, [SP, #6]
.L15:
0x341822BC: 9804 LDR R0, [SP, #16]
0x341822BE: 7800 LDRB R0, [R0]
0x341822C0: 0740 LSLS R0, R0, #29
0x341822C2: 2800 CMP R0, #0
0x341822C4: F140 81AE BPL.W 46L49 ; 0x34182624
0x341822C8: 9804 LDR R0, [SP, #16]
0x341822CA: F8D0 00B8 LDR.W R0, [R0, #184]
0x341822CE: B310 CBZ R0, .L16 ; 0x34182316
0x341822D0: 9804 LDR R0, [SP, #16]
0x341822D2: F8D0 00B8 LDR.W R0, [R0, #184]
0x341822D6: 2801 CMP R0, #1
0x341822D8: D01D BEQ 46L16 ; 0x34182316
0x341822DA: 9804 LDR R0, [SP, #16]
0x341822DC: F8D0 00B8 LDR.W R0, [R0, #184]
0x341822E0: 2802 CMP R0, #2
0x341822E2: D018 BEQ 46L16 ; 0x34182316
0x341822E4: 9804 LDR R0, [SP, #16]
0x341822E6: F8D0 00B8 LDR.W R0, [R0, #184]
0x341822EA: 2803 CMP R0, #3
0x341822EC: D013 BEQ 46L16 ; 0x34182316
0x341822EE: 9804 LDR R0, [SP, #16]
0x341822F0: F8D0 00B8 LDR.W R0, [R0, #184]
0x341822F4: 2804 CMP R0, #4
0x341822F6: D00E BEQ 46L16 ; 0x34182316
0x341822F8: 9804 LDR R0, [SP, #16]
0x341822FA: F8D0 00B8 LDR.W R0, [R0, #184]
0x341822FE: 2805 CMP R0, #5
0x34182300: D009 BEQ 46L16 ; 0x34182316
0x34182302: 9804 LDR R0, [SP, #16]
0x34182304: F8D0 00B8 LDR.W R0, [R0, #184]
0x34182308: 2806 CMP R0, #6
0x3418230A: D004 BEQ 46L16 ; 0x34182316
0x3418230C: 9804 LDR R0, [SP, #16]
0x3418230E: F8D0 00B8 LDR.W R0, [R0, #184]
0x34182312: 2807 CMP R0, #7
0x34182314: D100 BNE 46L17 ; 0x34182318
.L16:
0x34182316: E006 B 46L18 ; 0x34182326
.L17:
0x34182318: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x3418231C: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34182320: 21D4 MOVS R1, #212
0x34182322: F00A FD05 BL assert_failed ; 0x3418CD30
.L18:
0x34182326: 9804 LDR R0, [SP, #16]
0x34182328: F8D0 00B8 LDR.W R0, [R0, #184]
0x3418232C: 2804 CMP R0, #4
0x3418232E: D142 BNE 46L24 ; 0x341823B6
0x34182330: 9804 LDR R0, [SP, #16]
0x34182332: 6A80 LDR R0, [R0, #40]
0x34182334: B170 CBZ R0, .L19 ; 0x34182354
0x34182336: 9804 LDR R0, [SP, #16]
0x34182338: 6A80 LDR R0, [R0, #40]
0x3418233A: F1B0 5F80 CMP.W R0, #0x10000000
0x3418233E: D009 BEQ 46L19 ; 0x34182354
0x34182340: 9804 LDR R0, [SP, #16]
0x34182342: 6A80 LDR R0, [R0, #40]
0x34182344: F1B0 5F00 CMP.W R0, #0x20000000
0x34182348: D004 BEQ 46L19 ; 0x34182354
0x3418234A: 9804 LDR R0, [SP, #16]
0x3418234C: 6A80 LDR R0, [R0, #40]
0x3418234E: F1B0 5F40 CMP.W R0, #0x30000000
0x34182352: D100 BNE 46L20 ; 0x34182356
.L19:
0x34182354: E006 B 46L21 ; 0x34182364
.L20:
0x34182356: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x3418235A: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x3418235E: 21D9 MOVS R1, #217
0x34182360: F00A FCE6 BL assert_failed ; 0x3418CD30
.L21:
0x34182364: 9804 LDR R0, [SP, #16]
0x34182366: 6AC0 LDR R0, [R0, #44]
0x34182368: B128 CBZ R0, .L22 ; 0x34182376
0x3418236A: 9804 LDR R0, [SP, #16]
0x3418236C: 6AC0 LDR R0, [R0, #44]
0x3418236E: F5B0 7F80 CMP.W R0, #0x0100
0x34182372: D800 BHI 46L22 ; 0x34182376
0x34182374: E006 B 46L23 ; 0x34182384
.L22:
0x34182376: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x3418237A: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x3418237E: 21DA MOVS R1, #218
0x34182380: F00A FCD6 BL assert_failed ; 0x3418CD30
.L23:
0x34182384: F248 01D4 MOVW R1, #0x80D4
0x34182388: F2C5 6102 MOVT R1, #0x5602
0x3418238C: 6808 LDR R0, [R1]
0x3418238E: F64F 72FF MOVW R2, #0xFFFF
0x34182392: F6CC 7200 MOVT R2, #0xCF00
0x34182396: 4010 ANDS R0, R2
0x34182398: 9B04 LDR R3, [SP, #16]
0x3418239A: 6A9A LDR R2, [R3, #40]
0x3418239C: F8D3 C02C LDR.W R12, [R3, #44]
0x341823A0: 2300 MOVS R3, #0
0x341823A2: F6CF 73FF MOVT R3, #0xFFFF
0x341823A6: EB03 430C ADD.W R3, R3, R12, LSL #16
0x341823AA: 431A ORRS R2, R3
0x341823AC: 4310 ORRS R0, R2
0x341823AE: 6008 STR R0, [R1]
0x341823B0: F00C FF88 BL LL_RCC_IC5_Enable.57 ; 0x3418F2C4
0x341823B4: E131 B 46L48 ; 0x3418261A
.L24:
0x341823B6: 9804 LDR R0, [SP, #16]
0x341823B8: F8D0 00B8 LDR.W R0, [R0, #184]
0x341823BC: 2805 CMP R0, #5
0x341823BE: D142 BNE 46L30 ; 0x34182446
0x341823C0: 9804 LDR R0, [SP, #16]
0x341823C2: 6D00 LDR R0, [R0, #80]
0x341823C4: B170 CBZ R0, .L25 ; 0x341823E4
0x341823C6: 9804 LDR R0, [SP, #16]
0x341823C8: 6D00 LDR R0, [R0, #80]
0x341823CA: F1B0 5F80 CMP.W R0, #0x10000000
0x341823CE: D009 BEQ 46L25 ; 0x341823E4
0x341823D0: 9804 LDR R0, [SP, #16]
0x341823D2: 6D00 LDR R0, [R0, #80]
0x341823D4: F1B0 5F00 CMP.W R0, #0x20000000
0x341823D8: D004 BEQ 46L25 ; 0x341823E4
0x341823DA: 9804 LDR R0, [SP, #16]
0x341823DC: 6D00 LDR R0, [R0, #80]
0x341823DE: F1B0 5F40 CMP.W R0, #0x30000000
0x341823E2: D100 BNE 46L26 ; 0x341823E6
.L25:
0x341823E4: E006 B 46L27 ; 0x341823F4
.L26:
0x341823E6: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341823EA: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341823EE: 21E6 MOVS R1, #230
0x341823F0: F00A FC9E BL assert_failed ; 0x3418CD30
.L27:
0x341823F4: 9804 LDR R0, [SP, #16]
0x341823F6: 6D40 LDR R0, [R0, #84]
0x341823F8: B128 CBZ R0, .L28 ; 0x34182406
0x341823FA: 9804 LDR R0, [SP, #16]
0x341823FC: 6D40 LDR R0, [R0, #84]
0x341823FE: F5B0 7F80 CMP.W R0, #0x0100
0x34182402: D800 BHI 46L28 ; 0x34182406
0x34182404: E006 B 46L29 ; 0x34182414
.L28:
0x34182406: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x3418240A: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x3418240E: 21E7 MOVS R1, #231
0x34182410: F00A FC8E BL assert_failed ; 0x3418CD30
.L29:
0x34182414: F248 01E8 MOVW R1, #0x80E8
0x34182418: F2C5 6102 MOVT R1, #0x5602
0x3418241C: 6808 LDR R0, [R1]
0x3418241E: F64F 72FF MOVW R2, #0xFFFF
0x34182422: F6CC 7200 MOVT R2, #0xCF00
0x34182426: 4010 ANDS R0, R2
0x34182428: 9B04 LDR R3, [SP, #16]
0x3418242A: 6D1A LDR R2, [R3, #80]
0x3418242C: F8D3 C054 LDR.W R12, [R3, #84]
0x34182430: 2300 MOVS R3, #0
0x34182432: F6CF 73FF MOVT R3, #0xFFFF
0x34182436: EB03 430C ADD.W R3, R3, R12, LSL #16
0x3418243A: 431A ORRS R2, R3
0x3418243C: 4310 ORRS R0, R2
0x3418243E: 6008 STR R0, [R1]
0x34182440: F005 FACC BL LL_RCC_IC10_Enable.58 ; 0x341879DC
0x34182444: E0E9 B 46L48 ; 0x3418261A
.L30:
0x34182446: 9804 LDR R0, [SP, #16]
0x34182448: F8D0 00B8 LDR.W R0, [R0, #184]
0x3418244C: 2806 CMP R0, #6
0x3418244E: D142 BNE 46L36 ; 0x341824D6
0x34182450: 9804 LDR R0, [SP, #16]
0x34182452: 6F80 LDR R0, [R0, #120]
0x34182454: B170 CBZ R0, .L31 ; 0x34182474
0x34182456: 9804 LDR R0, [SP, #16]
0x34182458: 6F80 LDR R0, [R0, #120]
0x3418245A: F1B0 5F80 CMP.W R0, #0x10000000
0x3418245E: D009 BEQ 46L31 ; 0x34182474
0x34182460: 9804 LDR R0, [SP, #16]
0x34182462: 6F80 LDR R0, [R0, #120]
0x34182464: F1B0 5F00 CMP.W R0, #0x20000000
0x34182468: D004 BEQ 46L31 ; 0x34182474
0x3418246A: 9804 LDR R0, [SP, #16]
0x3418246C: 6F80 LDR R0, [R0, #120]
0x3418246E: F1B0 5F40 CMP.W R0, #0x30000000
0x34182472: D100 BNE 46L32 ; 0x34182476
.L31:
0x34182474: E006 B 46L33 ; 0x34182484
.L32:
0x34182476: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x3418247A: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x3418247E: 21F3 MOVS R1, #243
0x34182480: F00A FC56 BL assert_failed ; 0x3418CD30
.L33:
0x34182484: 9804 LDR R0, [SP, #16]
0x34182486: 6FC0 LDR R0, [R0, #124]
0x34182488: B128 CBZ R0, .L34 ; 0x34182496
0x3418248A: 9804 LDR R0, [SP, #16]
0x3418248C: 6FC0 LDR R0, [R0, #124]
0x3418248E: F5B0 7F80 CMP.W R0, #0x0100
0x34182492: D800 BHI 46L34 ; 0x34182496
0x34182494: E006 B 46L35 ; 0x341824A4
.L34:
0x34182496: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x3418249A: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x3418249E: 21F4 MOVS R1, #244
0x341824A0: F00A FC46 BL assert_failed ; 0x3418CD30
.L35:
0x341824A4: F248 01FC MOVW R1, #0x80FC
0x341824A8: F2C5 6102 MOVT R1, #0x5602
0x341824AC: 6808 LDR R0, [R1]
0x341824AE: F64F 72FF MOVW R2, #0xFFFF
0x341824B2: F6CC 7200 MOVT R2, #0xCF00
0x341824B6: 4010 ANDS R0, R2
0x341824B8: 9B04 LDR R3, [SP, #16]
0x341824BA: 6F9A LDR R2, [R3, #120]
0x341824BC: F8D3 C07C LDR.W R12, [R3, #124]
0x341824C0: 2300 MOVS R3, #0
0x341824C2: F6CF 73FF MOVT R3, #0xFFFF
0x341824C6: EB03 430C ADD.W R3, R3, R12, LSL #16
0x341824CA: 431A ORRS R2, R3
0x341824CC: 4310 ORRS R0, R2
0x341824CE: 6008 STR R0, [R1]
0x341824D0: F005 FA8C BL LL_RCC_IC15_Enable.59 ; 0x341879EC
0x341824D4: E0A1 B 46L48 ; 0x3418261A
.L36:
0x341824D6: 9804 LDR R0, [SP, #16]
0x341824D8: F8D0 00B8 LDR.W R0, [R0, #184]
0x341824DC: 2803 CMP R0, #3
0x341824DE: D14B BNE 46L42 ; 0x34182578
0x341824E0: 9804 LDR R0, [SP, #16]
0x341824E2: F8D0 0098 LDR.W R0, [R0, #152]
0x341824E6: B188 CBZ R0, .L37 ; 0x3418250C
0x341824E8: 9804 LDR R0, [SP, #16]
0x341824EA: F8D0 0098 LDR.W R0, [R0, #152]
0x341824EE: F1B0 5F80 CMP.W R0, #0x10000000
0x341824F2: D00B BEQ 46L37 ; 0x3418250C
0x341824F4: 9804 LDR R0, [SP, #16]
0x341824F6: F8D0 0098 LDR.W R0, [R0, #152]
0x341824FA: F1B0 5F00 CMP.W R0, #0x20000000
0x341824FE: D005 BEQ 46L37 ; 0x3418250C
0x34182500: 9804 LDR R0, [SP, #16]
0x34182502: F8D0 0098 LDR.W R0, [R0, #152]
0x34182506: F1B0 5F40 CMP.W R0, #0x30000000
0x3418250A: D100 BNE 46L38 ; 0x3418250E
.L37:
0x3418250C: E007 B 46L39 ; 0x3418251E
.L38:
0x3418250E: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34182512: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34182516: F44F 7180 MOV.W R1, #0x0100
0x3418251A: F00A FC09 BL assert_failed ; 0x3418CD30
.L39:
0x3418251E: 9804 LDR R0, [SP, #16]
0x34182520: F8D0 009C LDR.W R0, [R0, #156]
0x34182524: B130 CBZ R0, .L40 ; 0x34182534
0x34182526: 9804 LDR R0, [SP, #16]
0x34182528: F8D0 009C LDR.W R0, [R0, #156]
0x3418252C: F5B0 7F80 CMP.W R0, #0x0100
0x34182530: D800 BHI 46L40 ; 0x34182534
0x34182532: E007 B 46L41 ; 0x34182544
.L40:
0x34182534: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34182538: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x3418253C: F240 1101 MOVW R1, #0x0101
0x34182540: F00A FBF6 BL assert_failed ; 0x3418CD30
.L41:
0x34182544: F248 110C MOVW R1, #0x810C
0x34182548: F2C5 6102 MOVT R1, #0x5602
0x3418254C: 6808 LDR R0, [R1]
0x3418254E: F64F 72FF MOVW R2, #0xFFFF
0x34182552: F6CC 7200 MOVT R2, #0xCF00
0x34182556: 4010 ANDS R0, R2
0x34182558: 9B04 LDR R3, [SP, #16]
0x3418255A: F8D3 2098 LDR.W R2, [R3, #152]
0x3418255E: F8D3 C09C LDR.W R12, [R3, #156]
0x34182562: 2300 MOVS R3, #0
0x34182564: F6CF 73FF MOVT R3, #0xFFFF
0x34182568: EB03 430C ADD.W R3, R3, R12, LSL #16
0x3418256C: 431A ORRS R2, R3
0x3418256E: 4310 ORRS R0, R2
0x34182570: 6008 STR R0, [R1]
0x34182572: F005 FA43 BL LL_RCC_IC19_Enable ; 0x341879FC
0x34182576: E050 B 46L48 ; 0x3418261A
.L42:
0x34182578: 9804 LDR R0, [SP, #16]
0x3418257A: F8D0 00B8 LDR.W R0, [R0, #184]
0x3418257E: 2807 CMP R0, #7
0x34182580: D14B BNE 46L48 ; 0x3418261A
0x34182582: 9804 LDR R0, [SP, #16]
0x34182584: F8D0 00A0 LDR.W R0, [R0, #160]
0x34182588: B188 CBZ R0, .L43 ; 0x341825AE
0x3418258A: 9804 LDR R0, [SP, #16]
0x3418258C: F8D0 00A0 LDR.W R0, [R0, #160]
0x34182590: F1B0 5F80 CMP.W R0, #0x10000000
0x34182594: D00B BEQ 46L43 ; 0x341825AE
0x34182596: 9804 LDR R0, [SP, #16]
0x34182598: F8D0 00A0 LDR.W R0, [R0, #160]
0x3418259C: F1B0 5F00 CMP.W R0, #0x20000000
0x341825A0: D005 BEQ 46L43 ; 0x341825AE
0x341825A2: 9804 LDR R0, [SP, #16]
0x341825A4: F8D0 00A0 LDR.W R0, [R0, #160]
0x341825A8: F1B0 5F40 CMP.W R0, #0x30000000
0x341825AC: D100 BNE 46L44 ; 0x341825B0
.L43:
0x341825AE: E007 B 46L45 ; 0x341825C0
.L44:
0x341825B0: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341825B4: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341825B8: F240 110D MOVW R1, #0x010D
0x341825BC: F00A FBB8 BL assert_failed ; 0x3418CD30
.L45:
0x341825C0: 9804 LDR R0, [SP, #16]
0x341825C2: F8D0 00A4 LDR.W R0, [R0, #164]
0x341825C6: B130 CBZ R0, .L46 ; 0x341825D6
0x341825C8: 9804 LDR R0, [SP, #16]
0x341825CA: F8D0 00A4 LDR.W R0, [R0, #164]
0x341825CE: F5B0 7F80 CMP.W R0, #0x0100
0x341825D2: D800 BHI 46L46 ; 0x341825D6
0x341825D4: E007 B 46L47 ; 0x341825E6
.L46:
0x341825D6: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341825DA: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341825DE: F44F 7187 MOV.W R1, #0x010E
0x341825E2: F00A FBA5 BL assert_failed ; 0x3418CD30
.L47:
0x341825E6: F248 1110 MOVW R1, #0x8110
0x341825EA: F2C5 6102 MOVT R1, #0x5602
0x341825EE: 6808 LDR R0, [R1]
0x341825F0: F64F 72FF MOVW R2, #0xFFFF
0x341825F4: F6CC 7200 MOVT R2, #0xCF00
0x341825F8: 4010 ANDS R0, R2
0x341825FA: 9B04 LDR R3, [SP, #16]
0x341825FC: F8D3 20A0 LDR.W R2, [R3, #160]
0x34182600: F8D3 C0A4 LDR.W R12, [R3, #164]
0x34182604: 2300 MOVS R3, #0
0x34182606: F6CF 73FF MOVT R3, #0xFFFF
0x3418260A: EB03 430C ADD.W R3, R3, R12, LSL #16
0x3418260E: 431A ORRS R2, R3
0x34182610: 4310 ORRS R0, R2
0x34182612: 6008 STR R0, [R1]
0x34182614: F005 F9FA BL LL_RCC_IC20_Enable.60 ; 0x34187A0C
0x34182618: E7FF B 46L48 ; 0x3418261A
.L48:
0x3418261A: 9804 LDR R0, [SP, #16]
0x3418261C: F8D0 00B8 LDR.W R0, [R0, #184]
0x34182620: F005 F9FC BL LL_RCC_SetCLKPClockSource ; 0x34187A1C
.L49:
0x34182624: 9804 LDR R0, [SP, #16]
0x34182626: 7980 LDRB R0, [R0, #6]
0x34182628: 0640 LSLS R0, R0, #25
0x3418262A: 2800 CMP R0, #0
0x3418262C: F140 80D3 BPL.W 46L66 ; 0x341827D6
0x34182630: 9804 LDR R0, [SP, #16]
0x34182632: F8D0 00AC LDR.W R0, [R0, #172]
0x34182636: 2114 MOVS R1, #20
0x34182638: F2C0 3100 MOVT R1, #0x0300
0x3418263C: 4288 CMP R0, R1
0x3418263E: D017 BEQ 46L50 ; 0x34182670
0x34182640: 9804 LDR R0, [SP, #16]
0x34182642: F8D0 00AC LDR.W R0, [R0, #172]
0x34182646: 2114 MOVS R1, #20
0x34182648: F2C0 3101 MOVT R1, #0x0301
0x3418264C: 4288 CMP R0, R1
0x3418264E: D00F BEQ 46L50 ; 0x34182670
0x34182650: 9804 LDR R0, [SP, #16]
0x34182652: F8D0 00AC LDR.W R0, [R0, #172]
0x34182656: 2114 MOVS R1, #20
0x34182658: F2C0 3102 MOVT R1, #0x0302
0x3418265C: 4288 CMP R0, R1
0x3418265E: D007 BEQ 46L50 ; 0x34182670
0x34182660: 9804 LDR R0, [SP, #16]
0x34182662: F8D0 00AC LDR.W R0, [R0, #172]
0x34182666: 2114 MOVS R1, #20
0x34182668: F2C0 3103 MOVT R1, #0x0303
0x3418266C: 4288 CMP R0, R1
0x3418266E: D100 BNE 46L51 ; 0x34182672
.L50:
0x34182670: E007 B 46L52 ; 0x34182682
.L51:
0x34182672: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34182676: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x3418267A: F44F 7192 MOV.W R1, #0x0124
0x3418267E: F00A FB57 BL assert_failed ; 0x3418CD30
.L52:
0x34182682: 9804 LDR R0, [SP, #16]
0x34182684: F8D0 00AC LDR.W R0, [R0, #172]
0x34182688: 2114 MOVS R1, #20
0x3418268A: F2C0 3102 MOVT R1, #0x0302
0x3418268E: 4288 CMP R0, R1
0x34182690: D144 BNE 46L58 ; 0x3418271C
0x34182692: 9804 LDR R0, [SP, #16]
0x34182694: 6980 LDR R0, [R0, #24]
0x34182696: B170 CBZ R0, .L53 ; 0x341826B6
0x34182698: 9804 LDR R0, [SP, #16]
0x3418269A: 6980 LDR R0, [R0, #24]
0x3418269C: F1B0 5F80 CMP.W R0, #0x10000000
0x341826A0: D009 BEQ 46L53 ; 0x341826B6
0x341826A2: 9804 LDR R0, [SP, #16]
0x341826A4: 6980 LDR R0, [R0, #24]
0x341826A6: F1B0 5F00 CMP.W R0, #0x20000000
0x341826AA: D004 BEQ 46L53 ; 0x341826B6
0x341826AC: 9804 LDR R0, [SP, #16]
0x341826AE: 6980 LDR R0, [R0, #24]
0x341826B0: F1B0 5F40 CMP.W R0, #0x30000000
0x341826B4: D100 BNE 46L54 ; 0x341826B8
.L53:
0x341826B6: E007 B 46L55 ; 0x341826C8
.L54:
0x341826B8: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341826BC: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341826C0: F240 1129 MOVW R1, #0x0129
0x341826C4: F00A FB34 BL assert_failed ; 0x3418CD30
.L55:
0x341826C8: 9804 LDR R0, [SP, #16]
0x341826CA: 69C0 LDR R0, [R0, #28]
0x341826CC: B128 CBZ R0, .L56 ; 0x341826DA
0x341826CE: 9804 LDR R0, [SP, #16]
0x341826D0: 69C0 LDR R0, [R0, #28]
0x341826D2: F5B0 7F80 CMP.W R0, #0x0100
0x341826D6: D800 BHI 46L56 ; 0x341826DA
0x341826D8: E007 B 46L57 ; 0x341826EA
.L56:
0x341826DA: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341826DE: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341826E2: F44F 7195 MOV.W R1, #0x012A
0x341826E6: F00A FB23 BL assert_failed ; 0x3418CD30
.L57:
0x341826EA: F248 01CC MOVW R1, #0x80CC
0x341826EE: F2C5 6102 MOVT R1, #0x5602
0x341826F2: 6808 LDR R0, [R1]
0x341826F4: F64F 72FF MOVW R2, #0xFFFF
0x341826F8: F6CC 7200 MOVT R2, #0xCF00
0x341826FC: 4010 ANDS R0, R2
0x341826FE: 9B04 LDR R3, [SP, #16]
0x34182700: 699A LDR R2, [R3, #24]
0x34182702: F8D3 C01C LDR.W R12, [R3, #28]
0x34182706: 2300 MOVS R3, #0
0x34182708: F6CF 73FF MOVT R3, #0xFFFF
0x3418270C: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34182710: 431A ORRS R2, R3
0x34182712: 4310 ORRS R0, R2
0x34182714: 6008 STR R0, [R1]
0x34182716: F00C FDDD BL LL_RCC_IC3_Enable ; 0x3418F2D4
0x3418271A: E057 B 46L65 ; 0x341827CC
.L58:
0x3418271C: 9804 LDR R0, [SP, #16]
0x3418271E: F8D0 00AC LDR.W R0, [R0, #172]
0x34182722: 2114 MOVS R1, #20
0x34182724: F2C0 3103 MOVT R1, #0x0303
0x34182728: 4288 CMP R0, R1
0x3418272A: D144 BNE 46L64 ; 0x341827B6
0x3418272C: 9804 LDR R0, [SP, #16]
0x3418272E: 6A00 LDR R0, [R0, #32]
0x34182730: B170 CBZ R0, .L59 ; 0x34182750
0x34182732: 9804 LDR R0, [SP, #16]
0x34182734: 6A00 LDR R0, [R0, #32]
0x34182736: F1B0 5F80 CMP.W R0, #0x10000000
0x3418273A: D009 BEQ 46L59 ; 0x34182750
0x3418273C: 9804 LDR R0, [SP, #16]
0x3418273E: 6A00 LDR R0, [R0, #32]
0x34182740: F1B0 5F00 CMP.W R0, #0x20000000
0x34182744: D004 BEQ 46L59 ; 0x34182750
0x34182746: 9804 LDR R0, [SP, #16]
0x34182748: 6A00 LDR R0, [R0, #32]
0x3418274A: F1B0 5F40 CMP.W R0, #0x30000000
0x3418274E: D100 BNE 46L60 ; 0x34182752
.L59:
0x34182750: E007 B 46L61 ; 0x34182762
.L60:
0x34182752: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34182756: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x3418275A: F44F 719B MOV.W R1, #0x0136
0x3418275E: F00A FAE7 BL assert_failed ; 0x3418CD30
.L61:
0x34182762: 9804 LDR R0, [SP, #16]
0x34182764: 6A40 LDR R0, [R0, #36]
0x34182766: B128 CBZ R0, .L62 ; 0x34182774
0x34182768: 9804 LDR R0, [SP, #16]
0x3418276A: 6A40 LDR R0, [R0, #36]
0x3418276C: F5B0 7F80 CMP.W R0, #0x0100
0x34182770: D800 BHI 46L62 ; 0x34182774
0x34182772: E007 B 46L63 ; 0x34182784
.L62:
0x34182774: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34182778: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x3418277C: F240 1137 MOVW R1, #0x0137
0x34182780: F00A FAD6 BL assert_failed ; 0x3418CD30
.L63:
0x34182784: F248 01D0 MOVW R1, #0x80D0
0x34182788: F2C5 6102 MOVT R1, #0x5602
0x3418278C: 6808 LDR R0, [R1]
0x3418278E: F64F 72FF MOVW R2, #0xFFFF
0x34182792: F6CC 7200 MOVT R2, #0xCF00
0x34182796: 4010 ANDS R0, R2
0x34182798: 9B04 LDR R3, [SP, #16]
0x3418279A: 6A1A LDR R2, [R3, #32]
0x3418279C: F8D3 C024 LDR.W R12, [R3, #36]
0x341827A0: 2300 MOVS R3, #0
0x341827A2: F6CF 73FF MOVT R3, #0xFFFF
0x341827A6: EB03 430C ADD.W R3, R3, R12, LSL #16
0x341827AA: 431A ORRS R2, R3
0x341827AC: 4310 ORRS R0, R2
0x341827AE: 6008 STR R0, [R1]
0x341827B0: F00C FD98 BL LL_RCC_IC4_Enable ; 0x3418F2E4
0x341827B4: E00A B 46L65 ; 0x341827CC
.L64:
0x341827B6: 9804 LDR R0, [SP, #16]
0x341827B8: F8D0 00AC LDR.W R0, [R0, #172]
0x341827BC: 2114 MOVS R1, #20
0x341827BE: F2C0 3101 MOVT R1, #0x0301
0x341827C2: 4288 CMP R0, R1
0x341827C4: D102 BNE 46L65 ; 0x341827CC
0x341827C6: F00C FD95 BL LL_RCC_CLKP_Enable ; 0x3418F2F4
0x341827CA: E7FF B 46L65 ; 0x341827CC
.L65:
0x341827CC: 9804 LDR R0, [SP, #16]
0x341827CE: F8D0 00AC LDR.W R0, [R0, #172]
0x341827D2: F005 F931 BL LL_RCC_SetXSPIClockSource ; 0x34187A38
.L66:
0x341827D6: 9804 LDR R0, [SP, #16]
0x341827D8: 7980 LDRB R0, [R0, #6]
0x341827DA: 0600 LSLS R0, R0, #24
0x341827DC: 2800 CMP R0, #0
0x341827DE: F140 80DA BPL.W 46L83 ; 0x34182996
0x341827E2: 9804 LDR R0, [SP, #16]
0x341827E4: F8D0 00B0 LDR.W R0, [R0, #176]
0x341827E8: F240 4114 MOVW R1, #0x0414
0x341827EC: F2C0 3100 MOVT R1, #0x0300
0x341827F0: 4288 CMP R0, R1
0x341827F2: D01A BEQ 46L67 ; 0x3418282A
0x341827F4: 9804 LDR R0, [SP, #16]
0x341827F6: F8D0 00B0 LDR.W R0, [R0, #176]
0x341827FA: F240 4114 MOVW R1, #0x0414
0x341827FE: F2C0 3101 MOVT R1, #0x0301
0x34182802: 4288 CMP R0, R1
0x34182804: D011 BEQ 46L67 ; 0x3418282A
0x34182806: 9804 LDR R0, [SP, #16]
0x34182808: F8D0 00B0 LDR.W R0, [R0, #176]
0x3418280C: F240 4114 MOVW R1, #0x0414
0x34182810: F2C0 3102 MOVT R1, #0x0302
0x34182814: 4288 CMP R0, R1
0x34182816: D008 BEQ 46L67 ; 0x3418282A
0x34182818: 9804 LDR R0, [SP, #16]
0x3418281A: F8D0 00B0 LDR.W R0, [R0, #176]
0x3418281E: F240 4114 MOVW R1, #0x0414
0x34182822: F2C0 3103 MOVT R1, #0x0303
0x34182826: 4288 CMP R0, R1
0x34182828: D100 BNE 46L68 ; 0x3418282C
.L67:
0x3418282A: E007 B 46L69 ; 0x3418283C
.L68:
0x3418282C: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34182830: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34182834: F240 1151 MOVW R1, #0x0151
0x34182838: F00A FA7A BL assert_failed ; 0x3418CD30
.L69:
0x3418283C: 9804 LDR R0, [SP, #16]
0x3418283E: F8D0 00B0 LDR.W R0, [R0, #176]
0x34182842: F240 4114 MOVW R1, #0x0414
0x34182846: F2C0 3102 MOVT R1, #0x0302
0x3418284A: 4288 CMP R0, R1
0x3418284C: D144 BNE 46L75 ; 0x341828D8
0x3418284E: 9804 LDR R0, [SP, #16]
0x34182850: 6980 LDR R0, [R0, #24]
0x34182852: B170 CBZ R0, .L70 ; 0x34182872
0x34182854: 9804 LDR R0, [SP, #16]
0x34182856: 6980 LDR R0, [R0, #24]
0x34182858: F1B0 5F80 CMP.W R0, #0x10000000
0x3418285C: D009 BEQ 46L70 ; 0x34182872
0x3418285E: 9804 LDR R0, [SP, #16]
0x34182860: 6980 LDR R0, [R0, #24]
0x34182862: F1B0 5F00 CMP.W R0, #0x20000000
0x34182866: D004 BEQ 46L70 ; 0x34182872
0x34182868: 9804 LDR R0, [SP, #16]
0x3418286A: 6980 LDR R0, [R0, #24]
0x3418286C: F1B0 5F40 CMP.W R0, #0x30000000
0x34182870: D100 BNE 46L71 ; 0x34182874
.L70:
0x34182872: E007 B 46L72 ; 0x34182884
.L71:
0x34182874: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34182878: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x3418287C: F44F 71AB MOV.W R1, #0x0156
0x34182880: F00A FA56 BL assert_failed ; 0x3418CD30
.L72:
0x34182884: 9804 LDR R0, [SP, #16]
0x34182886: 69C0 LDR R0, [R0, #28]
0x34182888: B128 CBZ R0, .L73 ; 0x34182896
0x3418288A: 9804 LDR R0, [SP, #16]
0x3418288C: 69C0 LDR R0, [R0, #28]
0x3418288E: F5B0 7F80 CMP.W R0, #0x0100
0x34182892: D800 BHI 46L73 ; 0x34182896
0x34182894: E007 B 46L74 ; 0x341828A6
.L73:
0x34182896: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x3418289A: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x3418289E: F240 1157 MOVW R1, #0x0157
0x341828A2: F00A FA45 BL assert_failed ; 0x3418CD30
.L74:
0x341828A6: F248 01CC MOVW R1, #0x80CC
0x341828AA: F2C5 6102 MOVT R1, #0x5602
0x341828AE: 6808 LDR R0, [R1]
0x341828B0: F64F 72FF MOVW R2, #0xFFFF
0x341828B4: F6CC 7200 MOVT R2, #0xCF00
0x341828B8: 4010 ANDS R0, R2
0x341828BA: 9B04 LDR R3, [SP, #16]
0x341828BC: 699A LDR R2, [R3, #24]
0x341828BE: F8D3 C01C LDR.W R12, [R3, #28]
0x341828C2: 2300 MOVS R3, #0
0x341828C4: F6CF 73FF MOVT R3, #0xFFFF
0x341828C8: EB03 430C ADD.W R3, R3, R12, LSL #16
0x341828CC: 431A ORRS R2, R3
0x341828CE: 4310 ORRS R0, R2
0x341828D0: 6008 STR R0, [R1]
0x341828D2: F00C FCFF BL LL_RCC_IC3_Enable ; 0x3418F2D4
0x341828D6: E059 B 46L82 ; 0x3418298C
.L75:
0x341828D8: 9804 LDR R0, [SP, #16]
0x341828DA: F8D0 00B0 LDR.W R0, [R0, #176]
0x341828DE: F240 4114 MOVW R1, #0x0414
0x341828E2: F2C0 3103 MOVT R1, #0x0303
0x341828E6: 4288 CMP R0, R1
0x341828E8: D144 BNE 46L81 ; 0x34182974
0x341828EA: 9804 LDR R0, [SP, #16]
0x341828EC: 6A00 LDR R0, [R0, #32]
0x341828EE: B170 CBZ R0, .L76 ; 0x3418290E
0x341828F0: 9804 LDR R0, [SP, #16]
0x341828F2: 6A00 LDR R0, [R0, #32]
0x341828F4: F1B0 5F80 CMP.W R0, #0x10000000
0x341828F8: D009 BEQ 46L76 ; 0x3418290E
0x341828FA: 9804 LDR R0, [SP, #16]
0x341828FC: 6A00 LDR R0, [R0, #32]
0x341828FE: F1B0 5F00 CMP.W R0, #0x20000000
0x34182902: D004 BEQ 46L76 ; 0x3418290E
0x34182904: 9804 LDR R0, [SP, #16]
0x34182906: 6A00 LDR R0, [R0, #32]
0x34182908: F1B0 5F40 CMP.W R0, #0x30000000
0x3418290C: D100 BNE 46L77 ; 0x34182910
.L76:
0x3418290E: E007 B 46L78 ; 0x34182920
.L77:
0x34182910: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34182914: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34182918: F240 1163 MOVW R1, #0x0163
0x3418291C: F00A FA08 BL assert_failed ; 0x3418CD30
.L78:
0x34182920: 9804 LDR R0, [SP, #16]
0x34182922: 6A40 LDR R0, [R0, #36]
0x34182924: B128 CBZ R0, .L79 ; 0x34182932
0x34182926: 9804 LDR R0, [SP, #16]
0x34182928: 6A40 LDR R0, [R0, #36]
0x3418292A: F5B0 7F80 CMP.W R0, #0x0100
0x3418292E: D800 BHI 46L79 ; 0x34182932
0x34182930: E007 B 46L80 ; 0x34182942
.L79:
0x34182932: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34182936: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x3418293A: F44F 71B2 MOV.W R1, #0x0164
0x3418293E: F00A F9F7 BL assert_failed ; 0x3418CD30
.L80:
0x34182942: F248 01D0 MOVW R1, #0x80D0
0x34182946: F2C5 6102 MOVT R1, #0x5602
0x3418294A: 6808 LDR R0, [R1]
0x3418294C: F64F 72FF MOVW R2, #0xFFFF
0x34182950: F6CC 7200 MOVT R2, #0xCF00
0x34182954: 4010 ANDS R0, R2
0x34182956: 9B04 LDR R3, [SP, #16]
0x34182958: 6A1A LDR R2, [R3, #32]
0x3418295A: F8D3 C024 LDR.W R12, [R3, #36]
0x3418295E: 2300 MOVS R3, #0
0x34182960: F6CF 73FF MOVT R3, #0xFFFF
0x34182964: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34182968: 431A ORRS R2, R3
0x3418296A: 4310 ORRS R0, R2
0x3418296C: 6008 STR R0, [R1]
0x3418296E: F00C FCB9 BL LL_RCC_IC4_Enable ; 0x3418F2E4
0x34182972: E00B B 46L82 ; 0x3418298C
.L81:
0x34182974: 9804 LDR R0, [SP, #16]
0x34182976: F8D0 00B0 LDR.W R0, [R0, #176]
0x3418297A: F240 4114 MOVW R1, #0x0414
0x3418297E: F2C0 3101 MOVT R1, #0x0301
0x34182982: 4288 CMP R0, R1
0x34182984: D102 BNE 46L82 ; 0x3418298C
0x34182986: F00C FCB5 BL LL_RCC_CLKP_Enable ; 0x3418F2F4
0x3418298A: E7FF B 46L82 ; 0x3418298C
.L82:
0x3418298C: 9804 LDR R0, [SP, #16]
0x3418298E: F8D0 00B0 LDR.W R0, [R0, #176]
0x34182992: F005 F851 BL LL_RCC_SetXSPIClockSource ; 0x34187A38
.L83:
0x34182996: 9804 LDR R0, [SP, #16]
0x34182998: 79C0 LDRB R0, [R0, #7]
0x3418299A: 07C0 LSLS R0, R0, #31
0x3418299C: 2800 CMP R0, #0
0x3418299E: F000 80DA BEQ.W 46L100 ; 0x34182B56
0x341829A2: 9804 LDR R0, [SP, #16]
0x341829A4: F8D0 00B4 LDR.W R0, [R0, #180]
0x341829A8: F640 0114 MOVW R1, #0x0814
0x341829AC: F2C0 3100 MOVT R1, #0x0300
0x341829B0: 4288 CMP R0, R1
0x341829B2: D01A BEQ 46L84 ; 0x341829EA
0x341829B4: 9804 LDR R0, [SP, #16]
0x341829B6: F8D0 00B4 LDR.W R0, [R0, #180]
0x341829BA: F640 0114 MOVW R1, #0x0814
0x341829BE: F2C0 3101 MOVT R1, #0x0301
0x341829C2: 4288 CMP R0, R1
0x341829C4: D011 BEQ 46L84 ; 0x341829EA
0x341829C6: 9804 LDR R0, [SP, #16]
0x341829C8: F8D0 00B4 LDR.W R0, [R0, #180]
0x341829CC: F640 0114 MOVW R1, #0x0814
0x341829D0: F2C0 3102 MOVT R1, #0x0302
0x341829D4: 4288 CMP R0, R1
0x341829D6: D008 BEQ 46L84 ; 0x341829EA
0x341829D8: 9804 LDR R0, [SP, #16]
0x341829DA: F8D0 00B4 LDR.W R0, [R0, #180]
0x341829DE: F640 0114 MOVW R1, #0x0814
0x341829E2: F2C0 3103 MOVT R1, #0x0303
0x341829E6: 4288 CMP R0, R1
0x341829E8: D100 BNE 46L85 ; 0x341829EC
.L84:
0x341829EA: E007 B 46L86 ; 0x341829FC
.L85:
0x341829EC: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341829F0: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341829F4: F44F 71BF MOV.W R1, #0x017E
0x341829F8: F00A F99A BL assert_failed ; 0x3418CD30
.L86:
0x341829FC: 9804 LDR R0, [SP, #16]
0x341829FE: F8D0 00B4 LDR.W R0, [R0, #180]
0x34182A02: F640 0114 MOVW R1, #0x0814
0x34182A06: F2C0 3102 MOVT R1, #0x0302
0x34182A0A: 4288 CMP R0, R1
0x34182A0C: D144 BNE 46L92 ; 0x34182A98
0x34182A0E: 9804 LDR R0, [SP, #16]
0x34182A10: 6980 LDR R0, [R0, #24]
0x34182A12: B170 CBZ R0, .L87 ; 0x34182A32
0x34182A14: 9804 LDR R0, [SP, #16]
0x34182A16: 6980 LDR R0, [R0, #24]
0x34182A18: F1B0 5F80 CMP.W R0, #0x10000000
0x34182A1C: D009 BEQ 46L87 ; 0x34182A32
0x34182A1E: 9804 LDR R0, [SP, #16]
0x34182A20: 6980 LDR R0, [R0, #24]
0x34182A22: F1B0 5F00 CMP.W R0, #0x20000000
0x34182A26: D004 BEQ 46L87 ; 0x34182A32
0x34182A28: 9804 LDR R0, [SP, #16]
0x34182A2A: 6980 LDR R0, [R0, #24]
0x34182A2C: F1B0 5F40 CMP.W R0, #0x30000000
0x34182A30: D100 BNE 46L88 ; 0x34182A34
.L87:
0x34182A32: E007 B 46L89 ; 0x34182A44
.L88:
0x34182A34: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34182A38: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34182A3C: F240 1183 MOVW R1, #0x0183
0x34182A40: F00A F976 BL assert_failed ; 0x3418CD30
.L89:
0x34182A44: 9804 LDR R0, [SP, #16]
0x34182A46: 69C0 LDR R0, [R0, #28]
0x34182A48: B128 CBZ R0, .L90 ; 0x34182A56
0x34182A4A: 9804 LDR R0, [SP, #16]
0x34182A4C: 69C0 LDR R0, [R0, #28]
0x34182A4E: F5B0 7F80 CMP.W R0, #0x0100
0x34182A52: D800 BHI 46L90 ; 0x34182A56
0x34182A54: E007 B 46L91 ; 0x34182A66
.L90:
0x34182A56: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34182A5A: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34182A5E: F44F 71C2 MOV.W R1, #0x0184
0x34182A62: F00A F965 BL assert_failed ; 0x3418CD30
.L91:
0x34182A66: F248 01CC MOVW R1, #0x80CC
0x34182A6A: F2C5 6102 MOVT R1, #0x5602
0x34182A6E: 6808 LDR R0, [R1]
0x34182A70: F64F 72FF MOVW R2, #0xFFFF
0x34182A74: F6CC 7200 MOVT R2, #0xCF00
0x34182A78: 4010 ANDS R0, R2
0x34182A7A: 9B04 LDR R3, [SP, #16]
0x34182A7C: 699A LDR R2, [R3, #24]
0x34182A7E: F8D3 C01C LDR.W R12, [R3, #28]
0x34182A82: 2300 MOVS R3, #0
0x34182A84: F6CF 73FF MOVT R3, #0xFFFF
0x34182A88: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34182A8C: 431A ORRS R2, R3
0x34182A8E: 4310 ORRS R0, R2
0x34182A90: 6008 STR R0, [R1]
0x34182A92: F00C FC1F BL LL_RCC_IC3_Enable ; 0x3418F2D4
0x34182A96: E059 B 46L99 ; 0x34182B4C
.L92:
0x34182A98: 9804 LDR R0, [SP, #16]
0x34182A9A: F8D0 00B4 LDR.W R0, [R0, #180]
0x34182A9E: F640 0114 MOVW R1, #0x0814
0x34182AA2: F2C0 3103 MOVT R1, #0x0303
0x34182AA6: 4288 CMP R0, R1
0x34182AA8: D144 BNE 46L98 ; 0x34182B34
0x34182AAA: 9804 LDR R0, [SP, #16]
0x34182AAC: 6A00 LDR R0, [R0, #32]
0x34182AAE: B170 CBZ R0, .L93 ; 0x34182ACE
0x34182AB0: 9804 LDR R0, [SP, #16]
0x34182AB2: 6A00 LDR R0, [R0, #32]
0x34182AB4: F1B0 5F80 CMP.W R0, #0x10000000
0x34182AB8: D009 BEQ 46L93 ; 0x34182ACE
0x34182ABA: 9804 LDR R0, [SP, #16]
0x34182ABC: 6A00 LDR R0, [R0, #32]
0x34182ABE: F1B0 5F00 CMP.W R0, #0x20000000
0x34182AC2: D004 BEQ 46L93 ; 0x34182ACE
0x34182AC4: 9804 LDR R0, [SP, #16]
0x34182AC6: 6A00 LDR R0, [R0, #32]
0x34182AC8: F1B0 5F40 CMP.W R0, #0x30000000
0x34182ACC: D100 BNE 46L94 ; 0x34182AD0
.L93:
0x34182ACE: E007 B 46L95 ; 0x34182AE0
.L94:
0x34182AD0: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34182AD4: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34182AD8: F44F 71C8 MOV.W R1, #0x0190
0x34182ADC: F00A F928 BL assert_failed ; 0x3418CD30
.L95:
0x34182AE0: 9804 LDR R0, [SP, #16]
0x34182AE2: 6A40 LDR R0, [R0, #36]
0x34182AE4: B128 CBZ R0, .L96 ; 0x34182AF2
0x34182AE6: 9804 LDR R0, [SP, #16]
0x34182AE8: 6A40 LDR R0, [R0, #36]
0x34182AEA: F5B0 7F80 CMP.W R0, #0x0100
0x34182AEE: D800 BHI 46L96 ; 0x34182AF2
0x34182AF0: E007 B 46L97 ; 0x34182B02
.L96:
0x34182AF2: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34182AF6: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34182AFA: F240 1191 MOVW R1, #0x0191
0x34182AFE: F00A F917 BL assert_failed ; 0x3418CD30
.L97:
0x34182B02: F248 01D0 MOVW R1, #0x80D0
0x34182B06: F2C5 6102 MOVT R1, #0x5602
0x34182B0A: 6808 LDR R0, [R1]
0x34182B0C: F64F 72FF MOVW R2, #0xFFFF
0x34182B10: F6CC 7200 MOVT R2, #0xCF00
0x34182B14: 4010 ANDS R0, R2
0x34182B16: 9B04 LDR R3, [SP, #16]
0x34182B18: 6A1A LDR R2, [R3, #32]
0x34182B1A: F8D3 C024 LDR.W R12, [R3, #36]
0x34182B1E: 2300 MOVS R3, #0
0x34182B20: F6CF 73FF MOVT R3, #0xFFFF
0x34182B24: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34182B28: 431A ORRS R2, R3
0x34182B2A: 4310 ORRS R0, R2
0x34182B2C: 6008 STR R0, [R1]
0x34182B2E: F00C FBD9 BL LL_RCC_IC4_Enable ; 0x3418F2E4
0x34182B32: E00B B 46L99 ; 0x34182B4C
.L98:
0x34182B34: 9804 LDR R0, [SP, #16]
0x34182B36: F8D0 00B4 LDR.W R0, [R0, #180]
0x34182B3A: F640 0114 MOVW R1, #0x0814
0x34182B3E: F2C0 3101 MOVT R1, #0x0301
0x34182B42: 4288 CMP R0, R1
0x34182B44: D102 BNE 46L99 ; 0x34182B4C
0x34182B46: F00C FBD5 BL LL_RCC_CLKP_Enable ; 0x3418F2F4
0x34182B4A: E7FF B 46L99 ; 0x34182B4C
.L99:
0x34182B4C: 9804 LDR R0, [SP, #16]
0x34182B4E: F8D0 00B4 LDR.W R0, [R0, #180]
0x34182B52: F004 FF71 BL LL_RCC_SetXSPIClockSource ; 0x34187A38
.L100:
0x34182B56: 9804 LDR R0, [SP, #16]
0x34182B58: 7840 LDRB R0, [R0, #1]
0x34182B5A: 0700 LSLS R0, R0, #28
0x34182B5C: 2800 CMP R0, #0
0x34182B5E: F140 80BD BPL.W 46L117 ; 0x34182CDC
0x34182B62: 9804 LDR R0, [SP, #16]
0x34182B64: F8D0 00A8 LDR.W R0, [R0, #168]
0x34182B68: B170 CBZ R0, .L101 ; 0x34182B88
0x34182B6A: 9804 LDR R0, [SP, #16]
0x34182B6C: F8D0 00A8 LDR.W R0, [R0, #168]
0x34182B70: 2810 CMP R0, #16
0x34182B72: D009 BEQ 46L101 ; 0x34182B88
0x34182B74: 9804 LDR R0, [SP, #16]
0x34182B76: F8D0 00A8 LDR.W R0, [R0, #168]
0x34182B7A: 2820 CMP R0, #32
0x34182B7C: D004 BEQ 46L101 ; 0x34182B88
0x34182B7E: 9804 LDR R0, [SP, #16]
0x34182B80: F8D0 00A8 LDR.W R0, [R0, #168]
0x34182B84: 2830 CMP R0, #48
0x34182B86: D100 BNE 46L102 ; 0x34182B8A
.L101:
0x34182B88: E007 B 46L103 ; 0x34182B9A
.L102:
0x34182B8A: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34182B8E: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34182B92: F240 11AB MOVW R1, #0x01AB
0x34182B96: F00A F8CB BL assert_failed ; 0x3418CD30
.L103:
0x34182B9A: 9804 LDR R0, [SP, #16]
0x34182B9C: F8D0 00A8 LDR.W R0, [R0, #168]
0x34182BA0: 2820 CMP R0, #32
0x34182BA2: D144 BNE 46L109 ; 0x34182C2E
0x34182BA4: 9804 LDR R0, [SP, #16]
0x34182BA6: 6980 LDR R0, [R0, #24]
0x34182BA8: B170 CBZ R0, .L104 ; 0x34182BC8
0x34182BAA: 9804 LDR R0, [SP, #16]
0x34182BAC: 6980 LDR R0, [R0, #24]
0x34182BAE: F1B0 5F80 CMP.W R0, #0x10000000
0x34182BB2: D009 BEQ 46L104 ; 0x34182BC8
0x34182BB4: 9804 LDR R0, [SP, #16]
0x34182BB6: 6980 LDR R0, [R0, #24]
0x34182BB8: F1B0 5F00 CMP.W R0, #0x20000000
0x34182BBC: D004 BEQ 46L104 ; 0x34182BC8
0x34182BBE: 9804 LDR R0, [SP, #16]
0x34182BC0: 6980 LDR R0, [R0, #24]
0x34182BC2: F1B0 5F40 CMP.W R0, #0x30000000
0x34182BC6: D100 BNE 46L105 ; 0x34182BCA
.L104:
0x34182BC8: E007 B 46L106 ; 0x34182BDA
.L105:
0x34182BCA: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34182BCE: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34182BD2: F44F 71D8 MOV.W R1, #0x01B0
0x34182BD6: F00A F8AB BL assert_failed ; 0x3418CD30
.L106:
0x34182BDA: 9804 LDR R0, [SP, #16]
0x34182BDC: 69C0 LDR R0, [R0, #28]
0x34182BDE: B128 CBZ R0, .L107 ; 0x34182BEC
0x34182BE0: 9804 LDR R0, [SP, #16]
0x34182BE2: 69C0 LDR R0, [R0, #28]
0x34182BE4: F5B0 7F80 CMP.W R0, #0x0100
0x34182BE8: D800 BHI 46L107 ; 0x34182BEC
0x34182BEA: E007 B 46L108 ; 0x34182BFC
.L107:
0x34182BEC: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34182BF0: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34182BF4: F240 11B1 MOVW R1, #0x01B1
0x34182BF8: F00A F89A BL assert_failed ; 0x3418CD30
.L108:
0x34182BFC: F248 01CC MOVW R1, #0x80CC
0x34182C00: F2C5 6102 MOVT R1, #0x5602
0x34182C04: 6808 LDR R0, [R1]
0x34182C06: F64F 72FF MOVW R2, #0xFFFF
0x34182C0A: F6CC 7200 MOVT R2, #0xCF00
0x34182C0E: 4010 ANDS R0, R2
0x34182C10: 9B04 LDR R3, [SP, #16]
0x34182C12: 699A LDR R2, [R3, #24]
0x34182C14: F8D3 C01C LDR.W R12, [R3, #28]
0x34182C18: 2300 MOVS R3, #0
0x34182C1A: F6CF 73FF MOVT R3, #0xFFFF
0x34182C1E: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34182C22: 431A ORRS R2, R3
0x34182C24: 4310 ORRS R0, R2
0x34182C26: 6008 STR R0, [R1]
0x34182C28: F00C FB54 BL LL_RCC_IC3_Enable ; 0x3418F2D4
0x34182C2C: E051 B 46L116 ; 0x34182CD2
.L109:
0x34182C2E: 9804 LDR R0, [SP, #16]
0x34182C30: F8D0 00A8 LDR.W R0, [R0, #168]
0x34182C34: 2830 CMP R0, #48
0x34182C36: D144 BNE 46L115 ; 0x34182CC2
0x34182C38: 9804 LDR R0, [SP, #16]
0x34182C3A: 6A00 LDR R0, [R0, #32]
0x34182C3C: B170 CBZ R0, .L110 ; 0x34182C5C
0x34182C3E: 9804 LDR R0, [SP, #16]
0x34182C40: 6A00 LDR R0, [R0, #32]
0x34182C42: F1B0 5F80 CMP.W R0, #0x10000000
0x34182C46: D009 BEQ 46L110 ; 0x34182C5C
0x34182C48: 9804 LDR R0, [SP, #16]
0x34182C4A: 6A00 LDR R0, [R0, #32]
0x34182C4C: F1B0 5F00 CMP.W R0, #0x20000000
0x34182C50: D004 BEQ 46L110 ; 0x34182C5C
0x34182C52: 9804 LDR R0, [SP, #16]
0x34182C54: 6A00 LDR R0, [R0, #32]
0x34182C56: F1B0 5F40 CMP.W R0, #0x30000000
0x34182C5A: D100 BNE 46L111 ; 0x34182C5E
.L110:
0x34182C5C: E007 B 46L112 ; 0x34182C6E
.L111:
0x34182C5E: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34182C62: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34182C66: F240 11BD MOVW R1, #0x01BD
0x34182C6A: F00A F861 BL assert_failed ; 0x3418CD30
.L112:
0x34182C6E: 9804 LDR R0, [SP, #16]
0x34182C70: 6A40 LDR R0, [R0, #36]
0x34182C72: B128 CBZ R0, .L113 ; 0x34182C80
0x34182C74: 9804 LDR R0, [SP, #16]
0x34182C76: 6A40 LDR R0, [R0, #36]
0x34182C78: F5B0 7F80 CMP.W R0, #0x0100
0x34182C7C: D800 BHI 46L113 ; 0x34182C80
0x34182C7E: E007 B 46L114 ; 0x34182C90
.L113:
0x34182C80: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34182C84: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34182C88: F44F 71DF MOV.W R1, #0x01BE
0x34182C8C: F00A F850 BL assert_failed ; 0x3418CD30
.L114:
0x34182C90: F248 01D0 MOVW R1, #0x80D0
0x34182C94: F2C5 6102 MOVT R1, #0x5602
0x34182C98: 6808 LDR R0, [R1]
0x34182C9A: F64F 72FF MOVW R2, #0xFFFF
0x34182C9E: F6CC 7200 MOVT R2, #0xCF00
0x34182CA2: 4010 ANDS R0, R2
0x34182CA4: 9B04 LDR R3, [SP, #16]
0x34182CA6: 6A1A LDR R2, [R3, #32]
0x34182CA8: F8D3 C024 LDR.W R12, [R3, #36]
0x34182CAC: 2300 MOVS R3, #0
0x34182CAE: F6CF 73FF MOVT R3, #0xFFFF
0x34182CB2: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34182CB6: 431A ORRS R2, R3
0x34182CB8: 4310 ORRS R0, R2
0x34182CBA: 6008 STR R0, [R1]
0x34182CBC: F00C FB12 BL LL_RCC_IC4_Enable ; 0x3418F2E4
0x34182CC0: E007 B 46L116 ; 0x34182CD2
.L115:
0x34182CC2: 9804 LDR R0, [SP, #16]
0x34182CC4: F8D0 00A8 LDR.W R0, [R0, #168]
0x34182CC8: 2810 CMP R0, #16
0x34182CCA: D102 BNE 46L116 ; 0x34182CD2
0x34182CCC: F00C FB12 BL LL_RCC_CLKP_Enable ; 0x3418F2F4
0x34182CD0: E7FF B 46L116 ; 0x34182CD2
.L116:
0x34182CD2: 9804 LDR R0, [SP, #16]
0x34182CD4: F8D0 00A8 LDR.W R0, [R0, #168]
0x34182CD8: F004 FEB6 BL LL_RCC_SetFMCClockSource ; 0x34187A48
.L117:
0x34182CDC: 9804 LDR R0, [SP, #16]
0x34182CDE: 78C0 LDRB R0, [R0, #3]
0x34182CE0: 0640 LSLS R0, R0, #25
0x34182CE2: 2800 CMP R0, #0
0x34182CE4: F140 80D3 BPL.W 46L134 ; 0x34182E8E
0x34182CE8: 9804 LDR R0, [SP, #16]
0x34182CEA: F8D0 012C LDR.W R0, [R0, #0x012C]
0x34182CEE: 211C MOVS R1, #28
0x34182CF0: F2C0 3100 MOVT R1, #0x0300
0x34182CF4: 4288 CMP R0, R1
0x34182CF6: D017 BEQ 46L118 ; 0x34182D28
0x34182CF8: 9804 LDR R0, [SP, #16]
0x34182CFA: F8D0 012C LDR.W R0, [R0, #0x012C]
0x34182CFE: 211C MOVS R1, #28
0x34182D00: F2C0 3101 MOVT R1, #0x0301
0x34182D04: 4288 CMP R0, R1
0x34182D06: D00F BEQ 46L118 ; 0x34182D28
0x34182D08: 9804 LDR R0, [SP, #16]
0x34182D0A: F8D0 012C LDR.W R0, [R0, #0x012C]
0x34182D0E: 211C MOVS R1, #28
0x34182D10: F2C0 3102 MOVT R1, #0x0302
0x34182D14: 4288 CMP R0, R1
0x34182D16: D007 BEQ 46L118 ; 0x34182D28
0x34182D18: 9804 LDR R0, [SP, #16]
0x34182D1A: F8D0 012C LDR.W R0, [R0, #0x012C]
0x34182D1E: 211C MOVS R1, #28
0x34182D20: F2C0 3103 MOVT R1, #0x0303
0x34182D24: 4288 CMP R0, R1
0x34182D26: D100 BNE 46L119 ; 0x34182D2A
.L118:
0x34182D28: E007 B 46L120 ; 0x34182D3A
.L119:
0x34182D2A: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34182D2E: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34182D32: F44F 71EC MOV.W R1, #0x01D8
0x34182D36: F009 FFFB BL assert_failed ; 0x3418CD30
.L120:
0x34182D3A: 9804 LDR R0, [SP, #16]
0x34182D3C: F8D0 012C LDR.W R0, [R0, #0x012C]
0x34182D40: 211C MOVS R1, #28
0x34182D42: F2C0 3102 MOVT R1, #0x0302
0x34182D46: 4288 CMP R0, R1
0x34182D48: D144 BNE 46L126 ; 0x34182DD4
0x34182D4A: 9804 LDR R0, [SP, #16]
0x34182D4C: 6A00 LDR R0, [R0, #32]
0x34182D4E: B170 CBZ R0, .L121 ; 0x34182D6E
0x34182D50: 9804 LDR R0, [SP, #16]
0x34182D52: 6A00 LDR R0, [R0, #32]
0x34182D54: F1B0 5F80 CMP.W R0, #0x10000000
0x34182D58: D009 BEQ 46L121 ; 0x34182D6E
0x34182D5A: 9804 LDR R0, [SP, #16]
0x34182D5C: 6A00 LDR R0, [R0, #32]
0x34182D5E: F1B0 5F00 CMP.W R0, #0x20000000
0x34182D62: D004 BEQ 46L121 ; 0x34182D6E
0x34182D64: 9804 LDR R0, [SP, #16]
0x34182D66: 6A00 LDR R0, [R0, #32]
0x34182D68: F1B0 5F40 CMP.W R0, #0x30000000
0x34182D6C: D100 BNE 46L122 ; 0x34182D70
.L121:
0x34182D6E: E007 B 46L123 ; 0x34182D80
.L122:
0x34182D70: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34182D74: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34182D78: F240 11DD MOVW R1, #0x01DD
0x34182D7C: F009 FFD8 BL assert_failed ; 0x3418CD30
.L123:
0x34182D80: 9804 LDR R0, [SP, #16]
0x34182D82: 6A40 LDR R0, [R0, #36]
0x34182D84: B128 CBZ R0, .L124 ; 0x34182D92
0x34182D86: 9804 LDR R0, [SP, #16]
0x34182D88: 6A40 LDR R0, [R0, #36]
0x34182D8A: F5B0 7F80 CMP.W R0, #0x0100
0x34182D8E: D800 BHI 46L124 ; 0x34182D92
0x34182D90: E007 B 46L125 ; 0x34182DA2
.L124:
0x34182D92: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34182D96: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34182D9A: F44F 71EF MOV.W R1, #0x01DE
0x34182D9E: F009 FFC7 BL assert_failed ; 0x3418CD30
.L125:
0x34182DA2: F248 01D0 MOVW R1, #0x80D0
0x34182DA6: F2C5 6102 MOVT R1, #0x5602
0x34182DAA: 6808 LDR R0, [R1]
0x34182DAC: F64F 72FF MOVW R2, #0xFFFF
0x34182DB0: F6CC 7200 MOVT R2, #0xCF00
0x34182DB4: 4010 ANDS R0, R2
0x34182DB6: 9B04 LDR R3, [SP, #16]
0x34182DB8: 6A1A LDR R2, [R3, #32]
0x34182DBA: F8D3 C024 LDR.W R12, [R3, #36]
0x34182DBE: 2300 MOVS R3, #0
0x34182DC0: F6CF 73FF MOVT R3, #0xFFFF
0x34182DC4: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34182DC8: 431A ORRS R2, R3
0x34182DCA: 4310 ORRS R0, R2
0x34182DCC: 6008 STR R0, [R1]
0x34182DCE: F00C FA89 BL LL_RCC_IC4_Enable ; 0x3418F2E4
0x34182DD2: E057 B 46L133 ; 0x34182E84
.L126:
0x34182DD4: 9804 LDR R0, [SP, #16]
0x34182DD6: F8D0 012C LDR.W R0, [R0, #0x012C]
0x34182DDA: 211C MOVS R1, #28
0x34182DDC: F2C0 3103 MOVT R1, #0x0303
0x34182DE0: 4288 CMP R0, R1
0x34182DE2: D144 BNE 46L132 ; 0x34182E6E
0x34182DE4: 9804 LDR R0, [SP, #16]
0x34182DE6: 6A80 LDR R0, [R0, #40]
0x34182DE8: B170 CBZ R0, .L127 ; 0x34182E08
0x34182DEA: 9804 LDR R0, [SP, #16]
0x34182DEC: 6A80 LDR R0, [R0, #40]
0x34182DEE: F1B0 5F80 CMP.W R0, #0x10000000
0x34182DF2: D009 BEQ 46L127 ; 0x34182E08
0x34182DF4: 9804 LDR R0, [SP, #16]
0x34182DF6: 6A80 LDR R0, [R0, #40]
0x34182DF8: F1B0 5F00 CMP.W R0, #0x20000000
0x34182DFC: D004 BEQ 46L127 ; 0x34182E08
0x34182DFE: 9804 LDR R0, [SP, #16]
0x34182E00: 6A80 LDR R0, [R0, #40]
0x34182E02: F1B0 5F40 CMP.W R0, #0x30000000
0x34182E06: D100 BNE 46L128 ; 0x34182E0A
.L127:
0x34182E08: E007 B 46L129 ; 0x34182E1A
.L128:
0x34182E0A: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34182E0E: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34182E12: F44F 71F5 MOV.W R1, #0x01EA
0x34182E16: F009 FF8B BL assert_failed ; 0x3418CD30
.L129:
0x34182E1A: 9804 LDR R0, [SP, #16]
0x34182E1C: 6AC0 LDR R0, [R0, #44]
0x34182E1E: B128 CBZ R0, .L130 ; 0x34182E2C
0x34182E20: 9804 LDR R0, [SP, #16]
0x34182E22: 6AC0 LDR R0, [R0, #44]
0x34182E24: F5B0 7F80 CMP.W R0, #0x0100
0x34182E28: D800 BHI 46L130 ; 0x34182E2C
0x34182E2A: E007 B 46L131 ; 0x34182E3C
.L130:
0x34182E2C: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34182E30: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34182E34: F240 11EB MOVW R1, #0x01EB
0x34182E38: F009 FF7A BL assert_failed ; 0x3418CD30
.L131:
0x34182E3C: F248 01D4 MOVW R1, #0x80D4
0x34182E40: F2C5 6102 MOVT R1, #0x5602
0x34182E44: 6808 LDR R0, [R1]
0x34182E46: F64F 72FF MOVW R2, #0xFFFF
0x34182E4A: F6CC 7200 MOVT R2, #0xCF00
0x34182E4E: 4010 ANDS R0, R2
0x34182E50: 9B04 LDR R3, [SP, #16]
0x34182E52: 6A9A LDR R2, [R3, #40]
0x34182E54: F8D3 C02C LDR.W R12, [R3, #44]
0x34182E58: 2300 MOVS R3, #0
0x34182E5A: F6CF 73FF MOVT R3, #0xFFFF
0x34182E5E: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34182E62: 431A ORRS R2, R3
0x34182E64: 4310 ORRS R0, R2
0x34182E66: 6008 STR R0, [R1]
0x34182E68: F00C FA2C BL LL_RCC_IC5_Enable.57 ; 0x3418F2C4
0x34182E6C: E00A B 46L133 ; 0x34182E84
.L132:
0x34182E6E: 9804 LDR R0, [SP, #16]
0x34182E70: F8D0 012C LDR.W R0, [R0, #0x012C]
0x34182E74: 211C MOVS R1, #28
0x34182E76: F2C0 3101 MOVT R1, #0x0301
0x34182E7A: 4288 CMP R0, R1
0x34182E7C: D102 BNE 46L133 ; 0x34182E84
0x34182E7E: F00C FA39 BL LL_RCC_CLKP_Enable ; 0x3418F2F4
0x34182E82: E7FF B 46L133 ; 0x34182E84
.L133:
0x34182E84: 9804 LDR R0, [SP, #16]
0x34182E86: F8D0 012C LDR.W R0, [R0, #0x012C]
0x34182E8A: F004 FDEB BL LL_RCC_SetSDMMCClockSource ; 0x34187A64
.L134:
0x34182E8E: 9804 LDR R0, [SP, #16]
0x34182E90: 78C0 LDRB R0, [R0, #3]
0x34182E92: 0600 LSLS R0, R0, #24
0x34182E94: 2800 CMP R0, #0
0x34182E96: F140 80DA BPL.W 46L151 ; 0x3418304E
0x34182E9A: 9804 LDR R0, [SP, #16]
0x34182E9C: F8D0 0130 LDR.W R0, [R0, #0x0130]
0x34182EA0: F240 411C MOVW R1, #0x041C
0x34182EA4: F2C0 3100 MOVT R1, #0x0300
0x34182EA8: 4288 CMP R0, R1
0x34182EAA: D01A BEQ 46L135 ; 0x34182EE2
0x34182EAC: 9804 LDR R0, [SP, #16]
0x34182EAE: F8D0 0130 LDR.W R0, [R0, #0x0130]
0x34182EB2: F240 411C MOVW R1, #0x041C
0x34182EB6: F2C0 3101 MOVT R1, #0x0301
0x34182EBA: 4288 CMP R0, R1
0x34182EBC: D011 BEQ 46L135 ; 0x34182EE2
0x34182EBE: 9804 LDR R0, [SP, #16]
0x34182EC0: F8D0 0130 LDR.W R0, [R0, #0x0130]
0x34182EC4: F240 411C MOVW R1, #0x041C
0x34182EC8: F2C0 3102 MOVT R1, #0x0302
0x34182ECC: 4288 CMP R0, R1
0x34182ECE: D008 BEQ 46L135 ; 0x34182EE2
0x34182ED0: 9804 LDR R0, [SP, #16]
0x34182ED2: F8D0 0130 LDR.W R0, [R0, #0x0130]
0x34182ED6: F240 411C MOVW R1, #0x041C
0x34182EDA: F2C0 3103 MOVT R1, #0x0303
0x34182EDE: 4288 CMP R0, R1
0x34182EE0: D100 BNE 46L136 ; 0x34182EE4
.L135:
0x34182EE2: E007 B 46L137 ; 0x34182EF4
.L136:
0x34182EE4: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34182EE8: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34182EEC: F240 2105 MOVW R1, #0x0205
0x34182EF0: F009 FF1E BL assert_failed ; 0x3418CD30
.L137:
0x34182EF4: 9804 LDR R0, [SP, #16]
0x34182EF6: F8D0 0130 LDR.W R0, [R0, #0x0130]
0x34182EFA: F240 411C MOVW R1, #0x041C
0x34182EFE: F2C0 3102 MOVT R1, #0x0302
0x34182F02: 4288 CMP R0, R1
0x34182F04: D144 BNE 46L143 ; 0x34182F90
0x34182F06: 9804 LDR R0, [SP, #16]
0x34182F08: 6A00 LDR R0, [R0, #32]
0x34182F0A: B170 CBZ R0, .L138 ; 0x34182F2A
0x34182F0C: 9804 LDR R0, [SP, #16]
0x34182F0E: 6A00 LDR R0, [R0, #32]
0x34182F10: F1B0 5F80 CMP.W R0, #0x10000000
0x34182F14: D009 BEQ 46L138 ; 0x34182F2A
0x34182F16: 9804 LDR R0, [SP, #16]
0x34182F18: 6A00 LDR R0, [R0, #32]
0x34182F1A: F1B0 5F00 CMP.W R0, #0x20000000
0x34182F1E: D004 BEQ 46L138 ; 0x34182F2A
0x34182F20: 9804 LDR R0, [SP, #16]
0x34182F22: 6A00 LDR R0, [R0, #32]
0x34182F24: F1B0 5F40 CMP.W R0, #0x30000000
0x34182F28: D100 BNE 46L139 ; 0x34182F2C
.L138:
0x34182F2A: E007 B 46L140 ; 0x34182F3C
.L139:
0x34182F2C: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34182F30: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34182F34: F240 210A MOVW R1, #0x020A
0x34182F38: F009 FEFA BL assert_failed ; 0x3418CD30
.L140:
0x34182F3C: 9804 LDR R0, [SP, #16]
0x34182F3E: 6A40 LDR R0, [R0, #36]
0x34182F40: B128 CBZ R0, .L141 ; 0x34182F4E
0x34182F42: 9804 LDR R0, [SP, #16]
0x34182F44: 6A40 LDR R0, [R0, #36]
0x34182F46: F5B0 7F80 CMP.W R0, #0x0100
0x34182F4A: D800 BHI 46L141 ; 0x34182F4E
0x34182F4C: E007 B 46L142 ; 0x34182F5E
.L141:
0x34182F4E: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34182F52: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34182F56: F240 210B MOVW R1, #0x020B
0x34182F5A: F009 FEE9 BL assert_failed ; 0x3418CD30
.L142:
0x34182F5E: F248 01D0 MOVW R1, #0x80D0
0x34182F62: F2C5 6102 MOVT R1, #0x5602
0x34182F66: 6808 LDR R0, [R1]
0x34182F68: F64F 72FF MOVW R2, #0xFFFF
0x34182F6C: F6CC 7200 MOVT R2, #0xCF00
0x34182F70: 4010 ANDS R0, R2
0x34182F72: 9B04 LDR R3, [SP, #16]
0x34182F74: 6A1A LDR R2, [R3, #32]
0x34182F76: F8D3 C024 LDR.W R12, [R3, #36]
0x34182F7A: 2300 MOVS R3, #0
0x34182F7C: F6CF 73FF MOVT R3, #0xFFFF
0x34182F80: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34182F84: 431A ORRS R2, R3
0x34182F86: 4310 ORRS R0, R2
0x34182F88: 6008 STR R0, [R1]
0x34182F8A: F00C F9AB BL LL_RCC_IC4_Enable ; 0x3418F2E4
0x34182F8E: E059 B 46L150 ; 0x34183044
.L143:
0x34182F90: 9804 LDR R0, [SP, #16]
0x34182F92: F8D0 0130 LDR.W R0, [R0, #0x0130]
0x34182F96: F240 411C MOVW R1, #0x041C
0x34182F9A: F2C0 3103 MOVT R1, #0x0303
0x34182F9E: 4288 CMP R0, R1
0x34182FA0: D144 BNE 46L149 ; 0x3418302C
0x34182FA2: 9804 LDR R0, [SP, #16]
0x34182FA4: 6A80 LDR R0, [R0, #40]
0x34182FA6: B170 CBZ R0, .L144 ; 0x34182FC6
0x34182FA8: 9804 LDR R0, [SP, #16]
0x34182FAA: 6A80 LDR R0, [R0, #40]
0x34182FAC: F1B0 5F80 CMP.W R0, #0x10000000
0x34182FB0: D009 BEQ 46L144 ; 0x34182FC6
0x34182FB2: 9804 LDR R0, [SP, #16]
0x34182FB4: 6A80 LDR R0, [R0, #40]
0x34182FB6: F1B0 5F00 CMP.W R0, #0x20000000
0x34182FBA: D004 BEQ 46L144 ; 0x34182FC6
0x34182FBC: 9804 LDR R0, [SP, #16]
0x34182FBE: 6A80 LDR R0, [R0, #40]
0x34182FC0: F1B0 5F40 CMP.W R0, #0x30000000
0x34182FC4: D100 BNE 46L145 ; 0x34182FC8
.L144:
0x34182FC6: E007 B 46L146 ; 0x34182FD8
.L145:
0x34182FC8: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34182FCC: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34182FD0: F240 2117 MOVW R1, #0x0217
0x34182FD4: F009 FEAC BL assert_failed ; 0x3418CD30
.L146:
0x34182FD8: 9804 LDR R0, [SP, #16]
0x34182FDA: 6AC0 LDR R0, [R0, #44]
0x34182FDC: B128 CBZ R0, .L147 ; 0x34182FEA
0x34182FDE: 9804 LDR R0, [SP, #16]
0x34182FE0: 6AC0 LDR R0, [R0, #44]
0x34182FE2: F5B0 7F80 CMP.W R0, #0x0100
0x34182FE6: D800 BHI 46L147 ; 0x34182FEA
0x34182FE8: E007 B 46L148 ; 0x34182FFA
.L147:
0x34182FEA: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34182FEE: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34182FF2: F44F 7106 MOV.W R1, #0x0218
0x34182FF6: F009 FE9B BL assert_failed ; 0x3418CD30
.L148:
0x34182FFA: F248 01D4 MOVW R1, #0x80D4
0x34182FFE: F2C5 6102 MOVT R1, #0x5602
0x34183002: 6808 LDR R0, [R1]
0x34183004: F64F 72FF MOVW R2, #0xFFFF
0x34183008: F6CC 7200 MOVT R2, #0xCF00
0x3418300C: 4010 ANDS R0, R2
0x3418300E: 9B04 LDR R3, [SP, #16]
0x34183010: 6A9A LDR R2, [R3, #40]
0x34183012: F8D3 C02C LDR.W R12, [R3, #44]
0x34183016: 2300 MOVS R3, #0
0x34183018: F6CF 73FF MOVT R3, #0xFFFF
0x3418301C: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34183020: 431A ORRS R2, R3
0x34183022: 4310 ORRS R0, R2
0x34183024: 6008 STR R0, [R1]
0x34183026: F00C F94D BL LL_RCC_IC5_Enable.57 ; 0x3418F2C4
0x3418302A: E00B B 46L150 ; 0x34183044
.L149:
0x3418302C: 9804 LDR R0, [SP, #16]
0x3418302E: F8D0 0130 LDR.W R0, [R0, #0x0130]
0x34183032: F240 411C MOVW R1, #0x041C
0x34183036: F2C0 3101 MOVT R1, #0x0301
0x3418303A: 4288 CMP R0, R1
0x3418303C: D102 BNE 46L150 ; 0x34183044
0x3418303E: F00C F959 BL LL_RCC_CLKP_Enable ; 0x3418F2F4
0x34183042: E7FF B 46L150 ; 0x34183044
.L150:
0x34183044: 9804 LDR R0, [SP, #16]
0x34183046: F8D0 0130 LDR.W R0, [R0, #0x0130]
0x3418304A: F004 FD0B BL LL_RCC_SetSDMMCClockSource ; 0x34187A64
.L151:
0x3418304E: 9804 LDR R0, [SP, #16]
0x34183050: 6800 LDR R0, [R0]
0x34183052: 07C0 LSLS R0, R0, #31
0x34183054: 2800 CMP R0, #0
0x34183056: F000 80F3 BEQ.W 46L170 ; 0x34183240
0x3418305A: 9804 LDR R0, [SP, #16]
0x3418305C: F8D0 00BC LDR.W R0, [R0, #188]
0x34183060: B310 CBZ R0, .L152 ; 0x341830A8
0x34183062: 9804 LDR R0, [SP, #16]
0x34183064: F8D0 00BC LDR.W R0, [R0, #188]
0x34183068: 2810 CMP R0, #16
0x3418306A: D01D BEQ 46L152 ; 0x341830A8
0x3418306C: 9804 LDR R0, [SP, #16]
0x3418306E: F8D0 00BC LDR.W R0, [R0, #188]
0x34183072: 2820 CMP R0, #32
0x34183074: D018 BEQ 46L152 ; 0x341830A8
0x34183076: 9804 LDR R0, [SP, #16]
0x34183078: F8D0 00BC LDR.W R0, [R0, #188]
0x3418307C: 2830 CMP R0, #48
0x3418307E: D013 BEQ 46L152 ; 0x341830A8
0x34183080: 9804 LDR R0, [SP, #16]
0x34183082: F8D0 00BC LDR.W R0, [R0, #188]
0x34183086: 2840 CMP R0, #64
0x34183088: D00E BEQ 46L152 ; 0x341830A8
0x3418308A: 9804 LDR R0, [SP, #16]
0x3418308C: F8D0 00BC LDR.W R0, [R0, #188]
0x34183090: 2850 CMP R0, #80
0x34183092: D009 BEQ 46L152 ; 0x341830A8
0x34183094: 9804 LDR R0, [SP, #16]
0x34183096: F8D0 00BC LDR.W R0, [R0, #188]
0x3418309A: 2860 CMP R0, #96
0x3418309C: D004 BEQ 46L152 ; 0x341830A8
0x3418309E: 9804 LDR R0, [SP, #16]
0x341830A0: F8D0 00BC LDR.W R0, [R0, #188]
0x341830A4: 2870 CMP R0, #112
0x341830A6: D100 BNE 46L153 ; 0x341830AA
.L152:
0x341830A8: E007 B 46L154 ; 0x341830BA
.L153:
0x341830AA: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341830AE: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341830B2: F240 2132 MOVW R1, #0x0232
0x341830B6: F009 FE3B BL assert_failed ; 0x3418CD30
.L154:
0x341830BA: 9804 LDR R0, [SP, #16]
0x341830BC: F8D0 00C0 LDR.W R0, [R0, #192]
0x341830C0: B130 CBZ R0, .L155 ; 0x341830D0
0x341830C2: 9804 LDR R0, [SP, #16]
0x341830C4: F8D0 00C0 LDR.W R0, [R0, #192]
0x341830C8: F5B0 7F80 CMP.W R0, #0x0100
0x341830CC: D800 BHI 46L155 ; 0x341830D0
0x341830CE: E007 B 46L156 ; 0x341830E0
.L155:
0x341830D0: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341830D4: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341830D8: F240 2133 MOVW R1, #0x0233
0x341830DC: F009 FE28 BL assert_failed ; 0x3418CD30
.L156:
0x341830E0: 9804 LDR R0, [SP, #16]
0x341830E2: F8D0 00BC LDR.W R0, [R0, #188]
0x341830E6: 2820 CMP R0, #32
0x341830E8: D144 BNE 46L162 ; 0x34183174
0x341830EA: 9804 LDR R0, [SP, #16]
0x341830EC: 6B80 LDR R0, [R0, #56]
0x341830EE: B170 CBZ R0, .L157 ; 0x3418310E
0x341830F0: 9804 LDR R0, [SP, #16]
0x341830F2: 6B80 LDR R0, [R0, #56]
0x341830F4: F1B0 5F80 CMP.W R0, #0x10000000
0x341830F8: D009 BEQ 46L157 ; 0x3418310E
0x341830FA: 9804 LDR R0, [SP, #16]
0x341830FC: 6B80 LDR R0, [R0, #56]
0x341830FE: F1B0 5F00 CMP.W R0, #0x20000000
0x34183102: D004 BEQ 46L157 ; 0x3418310E
0x34183104: 9804 LDR R0, [SP, #16]
0x34183106: 6B80 LDR R0, [R0, #56]
0x34183108: F1B0 5F40 CMP.W R0, #0x30000000
0x3418310C: D100 BNE 46L158 ; 0x34183110
.L157:
0x3418310E: E007 B 46L159 ; 0x34183120
.L158:
0x34183110: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34183114: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34183118: F44F 710E MOV.W R1, #0x0238
0x3418311C: F009 FE08 BL assert_failed ; 0x3418CD30
.L159:
0x34183120: 9804 LDR R0, [SP, #16]
0x34183122: 6BC0 LDR R0, [R0, #60]
0x34183124: B128 CBZ R0, .L160 ; 0x34183132
0x34183126: 9804 LDR R0, [SP, #16]
0x34183128: 6BC0 LDR R0, [R0, #60]
0x3418312A: F5B0 7F80 CMP.W R0, #0x0100
0x3418312E: D800 BHI 46L160 ; 0x34183132
0x34183130: E007 B 46L161 ; 0x34183142
.L160:
0x34183132: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34183136: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x3418313A: F240 2139 MOVW R1, #0x0239
0x3418313E: F009 FDF7 BL assert_failed ; 0x3418CD30
.L161:
0x34183142: F248 01DC MOVW R1, #0x80DC
0x34183146: F2C5 6102 MOVT R1, #0x5602
0x3418314A: 6808 LDR R0, [R1]
0x3418314C: F64F 72FF MOVW R2, #0xFFFF
0x34183150: F6CC 7200 MOVT R2, #0xCF00
0x34183154: 4010 ANDS R0, R2
0x34183156: 9B04 LDR R3, [SP, #16]
0x34183158: 6B9A LDR R2, [R3, #56]
0x3418315A: F8D3 C03C LDR.W R12, [R3, #60]
0x3418315E: 2300 MOVS R3, #0
0x34183160: F6CF 73FF MOVT R3, #0xFFFF
0x34183164: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34183168: 431A ORRS R2, R3
0x3418316A: 4310 ORRS R0, R2
0x3418316C: 6008 STR R0, [R1]
0x3418316E: F00C F8C9 BL LL_RCC_IC7_Enable ; 0x3418F304
0x34183172: E051 B 46L169 ; 0x34183218
.L162:
0x34183174: 9804 LDR R0, [SP, #16]
0x34183176: F8D0 00BC LDR.W R0, [R0, #188]
0x3418317A: 2830 CMP R0, #48
0x3418317C: D144 BNE 46L168 ; 0x34183208
0x3418317E: 9804 LDR R0, [SP, #16]
0x34183180: 6C00 LDR R0, [R0, #64]
0x34183182: B170 CBZ R0, .L163 ; 0x341831A2
0x34183184: 9804 LDR R0, [SP, #16]
0x34183186: 6C00 LDR R0, [R0, #64]
0x34183188: F1B0 5F80 CMP.W R0, #0x10000000
0x3418318C: D009 BEQ 46L163 ; 0x341831A2
0x3418318E: 9804 LDR R0, [SP, #16]
0x34183190: 6C00 LDR R0, [R0, #64]
0x34183192: F1B0 5F00 CMP.W R0, #0x20000000
0x34183196: D004 BEQ 46L163 ; 0x341831A2
0x34183198: 9804 LDR R0, [SP, #16]
0x3418319A: 6C00 LDR R0, [R0, #64]
0x3418319C: F1B0 5F40 CMP.W R0, #0x30000000
0x341831A0: D100 BNE 46L164 ; 0x341831A4
.L163:
0x341831A2: E007 B 46L165 ; 0x341831B4
.L164:
0x341831A4: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341831A8: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341831AC: F240 2145 MOVW R1, #0x0245
0x341831B0: F009 FDBE BL assert_failed ; 0x3418CD30
.L165:
0x341831B4: 9804 LDR R0, [SP, #16]
0x341831B6: 6C40 LDR R0, [R0, #68]
0x341831B8: B128 CBZ R0, .L166 ; 0x341831C6
0x341831BA: 9804 LDR R0, [SP, #16]
0x341831BC: 6C40 LDR R0, [R0, #68]
0x341831BE: F5B0 7F80 CMP.W R0, #0x0100
0x341831C2: D800 BHI 46L166 ; 0x341831C6
0x341831C4: E007 B 46L167 ; 0x341831D6
.L166:
0x341831C6: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341831CA: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341831CE: F240 2146 MOVW R1, #0x0246
0x341831D2: F009 FDAD BL assert_failed ; 0x3418CD30
.L167:
0x341831D6: F248 01E0 MOVW R1, #0x80E0
0x341831DA: F2C5 6102 MOVT R1, #0x5602
0x341831DE: 6808 LDR R0, [R1]
0x341831E0: F64F 72FF MOVW R2, #0xFFFF
0x341831E4: F6CC 7200 MOVT R2, #0xCF00
0x341831E8: 4010 ANDS R0, R2
0x341831EA: 9B04 LDR R3, [SP, #16]
0x341831EC: 6C1A LDR R2, [R3, #64]
0x341831EE: F8D3 C044 LDR.W R12, [R3, #68]
0x341831F2: 2300 MOVS R3, #0
0x341831F4: F6CF 73FF MOVT R3, #0xFFFF
0x341831F8: EB03 430C ADD.W R3, R3, R12, LSL #16
0x341831FC: 431A ORRS R2, R3
0x341831FE: 4310 ORRS R0, R2
0x34183200: 6008 STR R0, [R1]
0x34183202: F00C F887 BL LL_RCC_IC8_Enable ; 0x3418F314
0x34183206: E007 B 46L169 ; 0x34183218
.L168:
0x34183208: 9804 LDR R0, [SP, #16]
0x3418320A: F8D0 00BC LDR.W R0, [R0, #188]
0x3418320E: 2810 CMP R0, #16
0x34183210: D102 BNE 46L169 ; 0x34183218
0x34183212: F00C F86F BL LL_RCC_CLKP_Enable ; 0x3418F2F4
0x34183216: E7FF B 46L169 ; 0x34183218
.L169:
0x34183218: F248 1144 MOVW R1, #0x8144
0x3418321C: F2C5 6102 MOVT R1, #0x5602
0x34183220: 6808 LDR R0, [R1]
0x34183222: F64F 7270 MOVW R2, #0xFF70
0x34183226: 4390 BICS R0, R2
0x34183228: 9A04 LDR R2, [SP, #16]
0x3418322A: F8D2 30BC LDR.W R3, [R2, #188]
0x3418322E: F8D2 C0C0 LDR.W R12, [R2, #192]
0x34183232: F06F 02FF MVN R2, #255
0x34183236: EB02 220C ADD.W R2, R2, R12, LSL #8
0x3418323A: 431A ORRS R2, R3
0x3418323C: 4310 ORRS R0, R2
0x3418323E: 6008 STR R0, [R1]
.L170:
0x34183240: 9804 LDR R0, [SP, #16]
0x34183242: 7800 LDRB R0, [R0]
0x34183244: 0780 LSLS R0, R0, #30
0x34183246: 2800 CMP R0, #0
0x34183248: F140 80D1 BPL.W 46L187 ; 0x341833EE
0x3418324C: 9804 LDR R0, [SP, #16]
0x3418324E: F8D0 00C4 LDR.W R0, [R0, #196]
0x34183252: B310 CBZ R0, .L171 ; 0x3418329A
0x34183254: 9804 LDR R0, [SP, #16]
0x34183256: F8D0 00C4 LDR.W R0, [R0, #196]
0x3418325A: 2801 CMP R0, #1
0x3418325C: D01D BEQ 46L171 ; 0x3418329A
0x3418325E: 9804 LDR R0, [SP, #16]
0x34183260: F8D0 00C4 LDR.W R0, [R0, #196]
0x34183264: 2802 CMP R0, #2
0x34183266: D018 BEQ 46L171 ; 0x3418329A
0x34183268: 9804 LDR R0, [SP, #16]
0x3418326A: F8D0 00C4 LDR.W R0, [R0, #196]
0x3418326E: 2803 CMP R0, #3
0x34183270: D013 BEQ 46L171 ; 0x3418329A
0x34183272: 9804 LDR R0, [SP, #16]
0x34183274: F8D0 00C4 LDR.W R0, [R0, #196]
0x34183278: 2804 CMP R0, #4
0x3418327A: D00E BEQ 46L171 ; 0x3418329A
0x3418327C: 9804 LDR R0, [SP, #16]
0x3418327E: F8D0 00C4 LDR.W R0, [R0, #196]
0x34183282: 2805 CMP R0, #5
0x34183284: D009 BEQ 46L171 ; 0x3418329A
0x34183286: 9804 LDR R0, [SP, #16]
0x34183288: F8D0 00C4 LDR.W R0, [R0, #196]
0x3418328C: 2806 CMP R0, #6
0x3418328E: D004 BEQ 46L171 ; 0x3418329A
0x34183290: 9804 LDR R0, [SP, #16]
0x34183292: F8D0 00C4 LDR.W R0, [R0, #196]
0x34183296: 2807 CMP R0, #7
0x34183298: D100 BNE 46L172 ; 0x3418329C
.L171:
0x3418329A: E007 B 46L173 ; 0x341832AC
.L172:
0x3418329C: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341832A0: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341832A4: F240 2161 MOVW R1, #0x0261
0x341832A8: F009 FD42 BL assert_failed ; 0x3418CD30
.L173:
0x341832AC: 9804 LDR R0, [SP, #16]
0x341832AE: F8D0 00C4 LDR.W R0, [R0, #196]
0x341832B2: 2802 CMP R0, #2
0x341832B4: D144 BNE 46L179 ; 0x34183340
0x341832B6: 9804 LDR R0, [SP, #16]
0x341832B8: 6B80 LDR R0, [R0, #56]
0x341832BA: B170 CBZ R0, .L174 ; 0x341832DA
0x341832BC: 9804 LDR R0, [SP, #16]
0x341832BE: 6B80 LDR R0, [R0, #56]
0x341832C0: F1B0 5F80 CMP.W R0, #0x10000000
0x341832C4: D009 BEQ 46L174 ; 0x341832DA
0x341832C6: 9804 LDR R0, [SP, #16]
0x341832C8: 6B80 LDR R0, [R0, #56]
0x341832CA: F1B0 5F00 CMP.W R0, #0x20000000
0x341832CE: D004 BEQ 46L174 ; 0x341832DA
0x341832D0: 9804 LDR R0, [SP, #16]
0x341832D2: 6B80 LDR R0, [R0, #56]
0x341832D4: F1B0 5F40 CMP.W R0, #0x30000000
0x341832D8: D100 BNE 46L175 ; 0x341832DC
.L174:
0x341832DA: E007 B 46L176 ; 0x341832EC
.L175:
0x341832DC: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341832E0: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341832E4: F240 2166 MOVW R1, #0x0266
0x341832E8: F009 FD22 BL assert_failed ; 0x3418CD30
.L176:
0x341832EC: 9804 LDR R0, [SP, #16]
0x341832EE: 6BC0 LDR R0, [R0, #60]
0x341832F0: B128 CBZ R0, .L177 ; 0x341832FE
0x341832F2: 9804 LDR R0, [SP, #16]
0x341832F4: 6BC0 LDR R0, [R0, #60]
0x341832F6: F5B0 7F80 CMP.W R0, #0x0100
0x341832FA: D800 BHI 46L177 ; 0x341832FE
0x341832FC: E007 B 46L178 ; 0x3418330E
.L177:
0x341832FE: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34183302: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34183306: F240 2167 MOVW R1, #0x0267
0x3418330A: F009 FD11 BL assert_failed ; 0x3418CD30
.L178:
0x3418330E: F248 01DC MOVW R1, #0x80DC
0x34183312: F2C5 6102 MOVT R1, #0x5602
0x34183316: 6808 LDR R0, [R1]
0x34183318: F64F 72FF MOVW R2, #0xFFFF
0x3418331C: F6CC 7200 MOVT R2, #0xCF00
0x34183320: 4010 ANDS R0, R2
0x34183322: 9B04 LDR R3, [SP, #16]
0x34183324: 6B9A LDR R2, [R3, #56]
0x34183326: F8D3 C03C LDR.W R12, [R3, #60]
0x3418332A: 2300 MOVS R3, #0
0x3418332C: F6CF 73FF MOVT R3, #0xFFFF
0x34183330: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34183334: 431A ORRS R2, R3
0x34183336: 4310 ORRS R0, R2
0x34183338: 6008 STR R0, [R1]
0x3418333A: F00B FFE3 BL LL_RCC_IC7_Enable ; 0x3418F304
0x3418333E: E051 B 46L186 ; 0x341833E4
.L179:
0x34183340: 9804 LDR R0, [SP, #16]
0x34183342: F8D0 00C4 LDR.W R0, [R0, #196]
0x34183346: 2803 CMP R0, #3
0x34183348: D144 BNE 46L185 ; 0x341833D4
0x3418334A: 9804 LDR R0, [SP, #16]
0x3418334C: 6C00 LDR R0, [R0, #64]
0x3418334E: B170 CBZ R0, .L180 ; 0x3418336E
0x34183350: 9804 LDR R0, [SP, #16]
0x34183352: 6C00 LDR R0, [R0, #64]
0x34183354: F1B0 5F80 CMP.W R0, #0x10000000
0x34183358: D009 BEQ 46L180 ; 0x3418336E
0x3418335A: 9804 LDR R0, [SP, #16]
0x3418335C: 6C00 LDR R0, [R0, #64]
0x3418335E: F1B0 5F00 CMP.W R0, #0x20000000
0x34183362: D004 BEQ 46L180 ; 0x3418336E
0x34183364: 9804 LDR R0, [SP, #16]
0x34183366: 6C00 LDR R0, [R0, #64]
0x34183368: F1B0 5F40 CMP.W R0, #0x30000000
0x3418336C: D100 BNE 46L181 ; 0x34183370
.L180:
0x3418336E: E007 B 46L182 ; 0x34183380
.L181:
0x34183370: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34183374: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34183378: F240 2173 MOVW R1, #0x0273
0x3418337C: F009 FCD8 BL assert_failed ; 0x3418CD30
.L182:
0x34183380: 9804 LDR R0, [SP, #16]
0x34183382: 6C40 LDR R0, [R0, #68]
0x34183384: B128 CBZ R0, .L183 ; 0x34183392
0x34183386: 9804 LDR R0, [SP, #16]
0x34183388: 6C40 LDR R0, [R0, #68]
0x3418338A: F5B0 7F80 CMP.W R0, #0x0100
0x3418338E: D800 BHI 46L183 ; 0x34183392
0x34183390: E007 B 46L184 ; 0x341833A2
.L183:
0x34183392: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34183396: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x3418339A: F44F 711D MOV.W R1, #0x0274
0x3418339E: F009 FCC7 BL assert_failed ; 0x3418CD30
.L184:
0x341833A2: F248 01E0 MOVW R1, #0x80E0
0x341833A6: F2C5 6102 MOVT R1, #0x5602
0x341833AA: 6808 LDR R0, [R1]
0x341833AC: F64F 72FF MOVW R2, #0xFFFF
0x341833B0: F6CC 7200 MOVT R2, #0xCF00
0x341833B4: 4010 ANDS R0, R2
0x341833B6: 9B04 LDR R3, [SP, #16]
0x341833B8: 6C1A LDR R2, [R3, #64]
0x341833BA: F8D3 C044 LDR.W R12, [R3, #68]
0x341833BE: 2300 MOVS R3, #0
0x341833C0: F6CF 73FF MOVT R3, #0xFFFF
0x341833C4: EB03 430C ADD.W R3, R3, R12, LSL #16
0x341833C8: 431A ORRS R2, R3
0x341833CA: 4310 ORRS R0, R2
0x341833CC: 6008 STR R0, [R1]
0x341833CE: F00B FFA1 BL LL_RCC_IC8_Enable ; 0x3418F314
0x341833D2: E007 B 46L186 ; 0x341833E4
.L185:
0x341833D4: 9804 LDR R0, [SP, #16]
0x341833D6: F8D0 00C4 LDR.W R0, [R0, #196]
0x341833DA: 2801 CMP R0, #1
0x341833DC: D102 BNE 46L186 ; 0x341833E4
0x341833DE: F00B FF89 BL LL_RCC_CLKP_Enable ; 0x3418F2F4
0x341833E2: E7FF B 46L186 ; 0x341833E4
.L186:
0x341833E4: 9804 LDR R0, [SP, #16]
0x341833E6: F8D0 00C4 LDR.W R0, [R0, #196]
0x341833EA: F004 FB43 BL LL_RCC_SetADFClockSource ; 0x34187A74
.L187:
0x341833EE: 9804 LDR R0, [SP, #16]
0x341833F0: 7800 LDRB R0, [R0]
0x341833F2: 0700 LSLS R0, R0, #28
0x341833F4: 2800 CMP R0, #0
0x341833F6: D54A BPL 46L193 ; 0x3418348E
0x341833F8: 9804 LDR R0, [SP, #16]
0x341833FA: F8D0 0090 LDR.W R0, [R0, #144]
0x341833FE: B188 CBZ R0, .L188 ; 0x34183424
0x34183400: 9804 LDR R0, [SP, #16]
0x34183402: F8D0 0090 LDR.W R0, [R0, #144]
0x34183406: F1B0 5F80 CMP.W R0, #0x10000000
0x3418340A: D00B BEQ 46L188 ; 0x34183424
0x3418340C: 9804 LDR R0, [SP, #16]
0x3418340E: F8D0 0090 LDR.W R0, [R0, #144]
0x34183412: F1B0 5F00 CMP.W R0, #0x20000000
0x34183416: D005 BEQ 46L188 ; 0x34183424
0x34183418: 9804 LDR R0, [SP, #16]
0x3418341A: F8D0 0090 LDR.W R0, [R0, #144]
0x3418341E: F1B0 5F40 CMP.W R0, #0x30000000
0x34183422: D100 BNE 46L189 ; 0x34183426
.L188:
0x34183424: E007 B 46L190 ; 0x34183436
.L189:
0x34183426: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x3418342A: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x3418342E: F240 218E MOVW R1, #0x028E
0x34183432: F009 FC7D BL assert_failed ; 0x3418CD30
.L190:
0x34183436: 9804 LDR R0, [SP, #16]
0x34183438: F8D0 0094 LDR.W R0, [R0, #148]
0x3418343C: B130 CBZ R0, .L191 ; 0x3418344C
0x3418343E: 9804 LDR R0, [SP, #16]
0x34183440: F8D0 0094 LDR.W R0, [R0, #148]
0x34183444: F5B0 7F80 CMP.W R0, #0x0100
0x34183448: D800 BHI 46L191 ; 0x3418344C
0x3418344A: E007 B 46L192 ; 0x3418345C
.L191:
0x3418344C: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34183450: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34183454: F240 218F MOVW R1, #0x028F
0x34183458: F009 FC6A BL assert_failed ; 0x3418CD30
.L192:
0x3418345C: F248 1108 MOVW R1, #0x8108
0x34183460: F2C5 6102 MOVT R1, #0x5602
0x34183464: 6808 LDR R0, [R1]
0x34183466: F64F 72FF MOVW R2, #0xFFFF
0x3418346A: F6CC 7200 MOVT R2, #0xCF00
0x3418346E: 4010 ANDS R0, R2
0x34183470: 9B04 LDR R3, [SP, #16]
0x34183472: F8D3 2090 LDR.W R2, [R3, #144]
0x34183476: F8D3 C094 LDR.W R12, [R3, #148]
0x3418347A: 2300 MOVS R3, #0
0x3418347C: F6CF 73FF MOVT R3, #0xFFFF
0x34183480: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34183484: 431A ORRS R2, R3
0x34183486: 4310 ORRS R0, R2
0x34183488: 6008 STR R0, [R1]
0x3418348A: F004 FB01 BL LL_RCC_IC18_Enable ; 0x34187A90
.L193:
0x3418348E: 9804 LDR R0, [SP, #16]
0x34183490: 7800 LDRB R0, [R0]
0x34183492: 06C0 LSLS R0, R0, #27
0x34183494: 2800 CMP R0, #0
0x34183496: D57E BPL 46L204 ; 0x34183596
0x34183498: 9804 LDR R0, [SP, #16]
0x3418349A: F8D0 00C8 LDR.W R0, [R0, #200]
0x3418349E: B188 CBZ R0, .L194 ; 0x341834C4
0x341834A0: 9804 LDR R0, [SP, #16]
0x341834A2: F8D0 00C8 LDR.W R0, [R0, #200]
0x341834A6: F5B0 1F80 CMP.W R0, #0x100000
0x341834AA: D00B BEQ 46L194 ; 0x341834C4
0x341834AC: 9804 LDR R0, [SP, #16]
0x341834AE: F8D0 00C8 LDR.W R0, [R0, #200]
0x341834B2: F5B0 1F00 CMP.W R0, #0x200000
0x341834B6: D005 BEQ 46L194 ; 0x341834C4
0x341834B8: 9804 LDR R0, [SP, #16]
0x341834BA: F8D0 00C8 LDR.W R0, [R0, #200]
0x341834BE: F5B0 1F40 CMP.W R0, #0x300000
0x341834C2: D100 BNE 46L195 ; 0x341834C6
.L194:
0x341834C4: E007 B 46L196 ; 0x341834D6
.L195:
0x341834C6: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341834CA: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341834CE: F240 219D MOVW R1, #0x029D
0x341834D2: F009 FC2D BL assert_failed ; 0x3418CD30
.L196:
0x341834D6: 9804 LDR R0, [SP, #16]
0x341834D8: F8D0 00C8 LDR.W R0, [R0, #200]
0x341834DC: F5B0 1F00 CMP.W R0, #0x200000
0x341834E0: D14B BNE 46L202 ; 0x3418357A
0x341834E2: 9804 LDR R0, [SP, #16]
0x341834E4: F8D0 0088 LDR.W R0, [R0, #136]
0x341834E8: B188 CBZ R0, .L197 ; 0x3418350E
0x341834EA: 9804 LDR R0, [SP, #16]
0x341834EC: F8D0 0088 LDR.W R0, [R0, #136]
0x341834F0: F1B0 5F80 CMP.W R0, #0x10000000
0x341834F4: D00B BEQ 46L197 ; 0x3418350E
0x341834F6: 9804 LDR R0, [SP, #16]
0x341834F8: F8D0 0088 LDR.W R0, [R0, #136]
0x341834FC: F1B0 5F00 CMP.W R0, #0x20000000
0x34183500: D005 BEQ 46L197 ; 0x3418350E
0x34183502: 9804 LDR R0, [SP, #16]
0x34183504: F8D0 0088 LDR.W R0, [R0, #136]
0x34183508: F1B0 5F40 CMP.W R0, #0x30000000
0x3418350C: D100 BNE 46L198 ; 0x34183510
.L197:
0x3418350E: E007 B 46L199 ; 0x34183520
.L198:
0x34183510: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34183514: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34183518: F240 21A2 MOVW R1, #0x02A2
0x3418351C: F009 FC08 BL assert_failed ; 0x3418CD30
.L199:
0x34183520: 9804 LDR R0, [SP, #16]
0x34183522: F8D0 008C LDR.W R0, [R0, #140]
0x34183526: B130 CBZ R0, .L200 ; 0x34183536
0x34183528: 9804 LDR R0, [SP, #16]
0x3418352A: F8D0 008C LDR.W R0, [R0, #140]
0x3418352E: F5B0 7F80 CMP.W R0, #0x0100
0x34183532: D800 BHI 46L200 ; 0x34183536
0x34183534: E007 B 46L201 ; 0x34183546
.L200:
0x34183536: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x3418353A: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x3418353E: F240 21A3 MOVW R1, #0x02A3
0x34183542: F009 FBF5 BL assert_failed ; 0x3418CD30
.L201:
0x34183546: F248 1104 MOVW R1, #0x8104
0x3418354A: F2C5 6102 MOVT R1, #0x5602
0x3418354E: 6808 LDR R0, [R1]
0x34183550: F64F 72FF MOVW R2, #0xFFFF
0x34183554: F6CC 7200 MOVT R2, #0xCF00
0x34183558: 4010 ANDS R0, R2
0x3418355A: 9B04 LDR R3, [SP, #16]
0x3418355C: F8D3 2088 LDR.W R2, [R3, #136]
0x34183560: F8D3 C08C LDR.W R12, [R3, #140]
0x34183564: 2300 MOVS R3, #0
0x34183566: F6CF 73FF MOVT R3, #0xFFFF
0x3418356A: EB03 430C ADD.W R3, R3, R12, LSL #16
0x3418356E: 431A ORRS R2, R3
0x34183570: 4310 ORRS R0, R2
0x34183572: 6008 STR R0, [R1]
0x34183574: F004 FA94 BL LL_RCC_IC17_Enable ; 0x34187AA0
0x34183578: E008 B 46L203 ; 0x3418358C
.L202:
0x3418357A: 9804 LDR R0, [SP, #16]
0x3418357C: F8D0 00C8 LDR.W R0, [R0, #200]
0x34183580: F5B0 1F80 CMP.W R0, #0x100000
0x34183584: D102 BNE 46L203 ; 0x3418358C
0x34183586: F00B FEB5 BL LL_RCC_CLKP_Enable ; 0x3418F2F4
0x3418358A: E7FF B 46L203 ; 0x3418358C
.L203:
0x3418358C: 9804 LDR R0, [SP, #16]
0x3418358E: F8D0 00C8 LDR.W R0, [R0, #200]
0x34183592: F004 FA8D BL LL_RCC_SetDCMIPPClockSource ; 0x34187AB0
.L204:
0x34183596: 9804 LDR R0, [SP, #16]
0x34183598: 7800 LDRB R0, [R0]
0x3418359A: 0680 LSLS R0, R0, #26
0x3418359C: 2800 CMP R0, #0
0x3418359E: D577 BPL 46L215 ; 0x34183690
0x341835A0: 9804 LDR R0, [SP, #16]
0x341835A2: F8D0 00CC LDR.W R0, [R0, #204]
0x341835A6: B188 CBZ R0, .L205 ; 0x341835CC
0x341835A8: 9804 LDR R0, [SP, #16]
0x341835AA: F8D0 00CC LDR.W R0, [R0, #204]
0x341835AE: F5B0 5F80 CMP.W R0, #0x1000
0x341835B2: D00B BEQ 46L205 ; 0x341835CC
0x341835B4: 9804 LDR R0, [SP, #16]
0x341835B6: F8D0 00CC LDR.W R0, [R0, #204]
0x341835BA: F5B0 5F00 CMP.W R0, #0x2000
0x341835BE: D005 BEQ 46L205 ; 0x341835CC
0x341835C0: 9804 LDR R0, [SP, #16]
0x341835C2: F8D0 00CC LDR.W R0, [R0, #204]
0x341835C6: F5B0 5F40 CMP.W R0, #0x3000
0x341835CA: D100 BNE 46L206 ; 0x341835CE
.L205:
0x341835CC: E007 B 46L207 ; 0x341835DE
.L206:
0x341835CE: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341835D2: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341835D6: F240 21BD MOVW R1, #0x02BD
0x341835DA: F009 FBA9 BL assert_failed ; 0x3418CD30
.L207:
0x341835DE: 9804 LDR R0, [SP, #16]
0x341835E0: F8D0 00CC LDR.W R0, [R0, #204]
0x341835E4: F5B0 5F00 CMP.W R0, #0x2000
0x341835E8: D144 BNE 46L213 ; 0x34183674
0x341835EA: 9804 LDR R0, [SP, #16]
0x341835EC: 6E00 LDR R0, [R0, #96]
0x341835EE: B170 CBZ R0, .L208 ; 0x3418360E
0x341835F0: 9804 LDR R0, [SP, #16]
0x341835F2: 6E00 LDR R0, [R0, #96]
0x341835F4: F1B0 5F80 CMP.W R0, #0x10000000
0x341835F8: D009 BEQ 46L208 ; 0x3418360E
0x341835FA: 9804 LDR R0, [SP, #16]
0x341835FC: 6E00 LDR R0, [R0, #96]
0x341835FE: F1B0 5F00 CMP.W R0, #0x20000000
0x34183602: D004 BEQ 46L208 ; 0x3418360E
0x34183604: 9804 LDR R0, [SP, #16]
0x34183606: 6E00 LDR R0, [R0, #96]
0x34183608: F1B0 5F40 CMP.W R0, #0x30000000
0x3418360C: D100 BNE 46L209 ; 0x34183610
.L208:
0x3418360E: E007 B 46L210 ; 0x34183620
.L209:
0x34183610: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34183614: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34183618: F240 21C2 MOVW R1, #0x02C2
0x3418361C: F009 FB88 BL assert_failed ; 0x3418CD30
.L210:
0x34183620: 9804 LDR R0, [SP, #16]
0x34183622: 6E40 LDR R0, [R0, #100]
0x34183624: B128 CBZ R0, .L211 ; 0x34183632
0x34183626: 9804 LDR R0, [SP, #16]
0x34183628: 6E40 LDR R0, [R0, #100]
0x3418362A: F5B0 7F80 CMP.W R0, #0x0100
0x3418362E: D800 BHI 46L211 ; 0x34183632
0x34183630: E007 B 46L212 ; 0x34183642
.L211:
0x34183632: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34183636: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x3418363A: F240 21C3 MOVW R1, #0x02C3
0x3418363E: F009 FB77 BL assert_failed ; 0x3418CD30
.L212:
0x34183642: F248 01F0 MOVW R1, #0x80F0
0x34183646: F2C5 6102 MOVT R1, #0x5602
0x3418364A: 6808 LDR R0, [R1]
0x3418364C: F64F 72FF MOVW R2, #0xFFFF
0x34183650: F6CC 7200 MOVT R2, #0xCF00
0x34183654: 4010 ANDS R0, R2
0x34183656: 9B04 LDR R3, [SP, #16]
0x34183658: 6E1A LDR R2, [R3, #96]
0x3418365A: F8D3 C064 LDR.W R12, [R3, #100]
0x3418365E: 2300 MOVS R3, #0
0x34183660: F6CF 73FF MOVT R3, #0xFFFF
0x34183664: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34183668: 431A ORRS R2, R3
0x3418366A: 4310 ORRS R0, R2
0x3418366C: 6008 STR R0, [R1]
0x3418366E: F004 FA2D BL LL_RCC_IC12_Enable ; 0x34187ACC
0x34183672: E008 B 46L214 ; 0x34183686
.L213:
0x34183674: 9804 LDR R0, [SP, #16]
0x34183676: F8D0 00CC LDR.W R0, [R0, #204]
0x3418367A: F5B0 5F80 CMP.W R0, #0x1000
0x3418367E: D102 BNE 46L214 ; 0x34183686
0x34183680: F00B FE38 BL LL_RCC_CLKP_Enable ; 0x3418F2F4
0x34183684: E7FF B 46L214 ; 0x34183686
.L214:
0x34183686: 9804 LDR R0, [SP, #16]
0x34183688: F8D0 00CC LDR.W R0, [R0, #204]
0x3418368C: F004 FA26 BL LL_RCC_SetETHClockSource ; 0x34187ADC
.L215:
0x34183690: 9804 LDR R0, [SP, #16]
0x34183692: 7800 LDRB R0, [R0]
0x34183694: 0640 LSLS R0, R0, #25
0x34183696: 2800 CMP R0, #0
0x34183698: D51D BPL 46L219 ; 0x341836D6
0x3418369A: 9804 LDR R0, [SP, #16]
0x3418369C: F8D0 00D0 LDR.W R0, [R0, #208]
0x341836A0: B158 CBZ R0, .L216 ; 0x341836BA
0x341836A2: 9804 LDR R0, [SP, #16]
0x341836A4: F8D0 00D0 LDR.W R0, [R0, #208]
0x341836A8: F5B0 3F80 CMP.W R0, #0x010000
0x341836AC: D005 BEQ 46L216 ; 0x341836BA
0x341836AE: 9804 LDR R0, [SP, #16]
0x341836B0: F8D0 00D0 LDR.W R0, [R0, #208]
0x341836B4: F5B0 2F80 CMP.W R0, #0x040000
0x341836B8: D100 BNE 46L217 ; 0x341836BC
.L216:
0x341836BA: E007 B 46L218 ; 0x341836CC
.L217:
0x341836BC: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341836C0: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341836C4: F240 21DD MOVW R1, #0x02DD
0x341836C8: F009 FB32 BL assert_failed ; 0x3418CD30
.L218:
0x341836CC: 9804 LDR R0, [SP, #16]
0x341836CE: F8D0 00D0 LDR.W R0, [R0, #208]
0x341836D2: F004 FA11 BL LL_RCC_SetETHPHYInterface ; 0x34187AF8
.L219:
0x341836D6: 9804 LDR R0, [SP, #16]
0x341836D8: 7800 LDRB R0, [R0]
0x341836DA: 0600 LSLS R0, R0, #24
0x341836DC: 2800 CMP R0, #0
0x341836DE: D517 BPL 46L223 ; 0x34183710
0x341836E0: 9804 LDR R0, [SP, #16]
0x341836E2: F8D0 00D4 LDR.W R0, [R0, #212]
0x341836E6: B128 CBZ R0, .L220 ; 0x341836F4
0x341836E8: 9804 LDR R0, [SP, #16]
0x341836EA: F8D0 00D4 LDR.W R0, [R0, #212]
0x341836EE: F5B0 1F80 CMP.W R0, #0x100000
0x341836F2: D100 BNE 46L221 ; 0x341836F6
.L220:
0x341836F4: E007 B 46L222 ; 0x34183706
.L221:
0x341836F6: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341836FA: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341836FE: F240 21E7 MOVW R1, #0x02E7
0x34183702: F009 FB15 BL assert_failed ; 0x3418CD30
.L222:
0x34183706: 9804 LDR R0, [SP, #16]
0x34183708: F8D0 00D4 LDR.W R0, [R0, #212]
0x3418370C: F004 FA02 BL LL_RCC_SetETHREFRXClockSource ; 0x34187B14
.L223:
0x34183710: 9804 LDR R0, [SP, #16]
0x34183712: 7840 LDRB R0, [R0, #1]
0x34183714: 07C0 LSLS R0, R0, #31
0x34183716: B1B8 CBZ R0, .L227 ; 0x34183748
0x34183718: 9804 LDR R0, [SP, #16]
0x3418371A: F8D0 00D8 LDR.W R0, [R0, #216]
0x3418371E: B128 CBZ R0, .L224 ; 0x3418372C
0x34183720: 9804 LDR R0, [SP, #16]
0x34183722: F8D0 00D8 LDR.W R0, [R0, #216]
0x34183726: F1B0 7F80 CMP.W R0, #0x01000000
0x3418372A: D100 BNE 46L225 ; 0x3418372E
.L224:
0x3418372C: E007 B 46L226 ; 0x3418373E
.L225:
0x3418372E: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34183732: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34183736: F240 21F1 MOVW R1, #0x02F1
0x3418373A: F009 FAF9 BL assert_failed ; 0x3418CD30
.L226:
0x3418373E: 9804 LDR R0, [SP, #16]
0x34183740: F8D0 00D8 LDR.W R0, [R0, #216]
0x34183744: F004 F9F4 BL LL_RCC_SetETHREFTXClockSource ; 0x34187B30
.L227:
0x34183748: 9804 LDR R0, [SP, #16]
0x3418374A: 7840 LDRB R0, [R0, #1]
0x3418374C: 0780 LSLS R0, R0, #30
0x3418374E: 2800 CMP R0, #0
0x34183750: F140 8093 BPL.W 46L240 ; 0x3418387A
0x34183754: 9804 LDR R0, [SP, #16]
0x34183756: F8D0 00DC LDR.W R0, [R0, #220]
0x3418375A: B170 CBZ R0, .L228 ; 0x3418377A
0x3418375C: 9804 LDR R0, [SP, #16]
0x3418375E: F8D0 00DC LDR.W R0, [R0, #220]
0x34183762: 2801 CMP R0, #1
0x34183764: D009 BEQ 46L228 ; 0x3418377A
0x34183766: 9804 LDR R0, [SP, #16]
0x34183768: F8D0 00DC LDR.W R0, [R0, #220]
0x3418376C: 2802 CMP R0, #2
0x3418376E: D004 BEQ 46L228 ; 0x3418377A
0x34183770: 9804 LDR R0, [SP, #16]
0x34183772: F8D0 00DC LDR.W R0, [R0, #220]
0x34183776: 2803 CMP R0, #3
0x34183778: D100 BNE 46L229 ; 0x3418377C
.L228:
0x3418377A: E007 B 46L230 ; 0x3418378C
.L229:
0x3418377C: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34183780: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34183784: F240 21FB MOVW R1, #0x02FB
0x34183788: F009 FAD2 BL assert_failed ; 0x3418CD30
.L230:
0x3418378C: 9804 LDR R0, [SP, #16]
0x3418378E: F8D0 00E0 LDR.W R0, [R0, #224]
0x34183792: B128 CBZ R0, .L231 ; 0x341837A0
0x34183794: 9804 LDR R0, [SP, #16]
0x34183796: F8D0 00E0 LDR.W R0, [R0, #224]
0x3418379A: 2810 CMP R0, #16
0x3418379C: D800 BHI 46L231 ; 0x341837A0
0x3418379E: E007 B 46L232 ; 0x341837B0
.L231:
0x341837A0: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341837A4: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341837A8: F44F 713F MOV.W R1, #0x02FC
0x341837AC: F009 FAC0 BL assert_failed ; 0x3418CD30
.L232:
0x341837B0: 9804 LDR R0, [SP, #16]
0x341837B2: F8D0 00DC LDR.W R0, [R0, #220]
0x341837B6: 2802 CMP R0, #2
0x341837B8: D144 BNE 46L238 ; 0x34183844
0x341837BA: 9804 LDR R0, [SP, #16]
0x341837BC: 6E80 LDR R0, [R0, #104]
0x341837BE: B170 CBZ R0, .L233 ; 0x341837DE
0x341837C0: 9804 LDR R0, [SP, #16]
0x341837C2: 6E80 LDR R0, [R0, #104]
0x341837C4: F1B0 5F80 CMP.W R0, #0x10000000
0x341837C8: D009 BEQ 46L233 ; 0x341837DE
0x341837CA: 9804 LDR R0, [SP, #16]
0x341837CC: 6E80 LDR R0, [R0, #104]
0x341837CE: F1B0 5F00 CMP.W R0, #0x20000000
0x341837D2: D004 BEQ 46L233 ; 0x341837DE
0x341837D4: 9804 LDR R0, [SP, #16]
0x341837D6: 6E80 LDR R0, [R0, #104]
0x341837D8: F1B0 5F40 CMP.W R0, #0x30000000
0x341837DC: D100 BNE 46L234 ; 0x341837E0
.L233:
0x341837DE: E007 B 46L235 ; 0x341837F0
.L234:
0x341837E0: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341837E4: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341837E8: F240 3101 MOVW R1, #0x0301
0x341837EC: F009 FAA0 BL assert_failed ; 0x3418CD30
.L235:
0x341837F0: 9804 LDR R0, [SP, #16]
0x341837F2: 6EC0 LDR R0, [R0, #108]
0x341837F4: B128 CBZ R0, .L236 ; 0x34183802
0x341837F6: 9804 LDR R0, [SP, #16]
0x341837F8: 6EC0 LDR R0, [R0, #108]
0x341837FA: F5B0 7F80 CMP.W R0, #0x0100
0x341837FE: D800 BHI 46L236 ; 0x34183802
0x34183800: E007 B 46L237 ; 0x34183812
.L236:
0x34183802: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34183806: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x3418380A: F240 3102 MOVW R1, #0x0302
0x3418380E: F009 FA8F BL assert_failed ; 0x3418CD30
.L237:
0x34183812: F248 01F4 MOVW R1, #0x80F4
0x34183816: F2C5 6102 MOVT R1, #0x5602
0x3418381A: 6808 LDR R0, [R1]
0x3418381C: F64F 72FF MOVW R2, #0xFFFF
0x34183820: F6CC 7200 MOVT R2, #0xCF00
0x34183824: 4010 ANDS R0, R2
0x34183826: 9B04 LDR R3, [SP, #16]
0x34183828: 6E9A LDR R2, [R3, #104]
0x3418382A: F8D3 C06C LDR.W R12, [R3, #108]
0x3418382E: 2300 MOVS R3, #0
0x34183830: F6CF 73FF MOVT R3, #0xFFFF
0x34183834: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34183838: 431A ORRS R2, R3
0x3418383A: 4310 ORRS R0, R2
0x3418383C: 6008 STR R0, [R1]
0x3418383E: F004 F985 BL LL_RCC_IC13_Enable ; 0x34187B4C
0x34183842: E007 B 46L239 ; 0x34183854
.L238:
0x34183844: 9804 LDR R0, [SP, #16]
0x34183846: F8D0 00DC LDR.W R0, [R0, #220]
0x3418384A: 2801 CMP R0, #1
0x3418384C: D102 BNE 46L239 ; 0x34183854
0x3418384E: F00B FD51 BL LL_RCC_CLKP_Enable ; 0x3418F2F4
0x34183852: E7FF B 46L239 ; 0x34183854
.L239:
0x34183854: F248 1148 MOVW R1, #0x8148
0x34183858: F2C5 6102 MOVT R1, #0x5602
0x3418385C: 6808 LDR R0, [R1]
0x3418385E: F020 00F3 BIC R0, R0, #243
0x34183862: 9A04 LDR R2, [SP, #16]
0x34183864: F8D2 30DC LDR.W R3, [R2, #220]
0x34183868: F8D2 C0E0 LDR.W R12, [R2, #224]
0x3418386C: F06F 020F MVN R2, #15
0x34183870: EB02 120C ADD.W R2, R2, R12, LSL #4
0x34183874: 431A ORRS R2, R3
0x34183876: 4310 ORRS R0, R2
0x34183878: 6008 STR R0, [R1]
.L240:
0x3418387A: 9804 LDR R0, [SP, #16]
0x3418387C: 7840 LDRB R0, [R0, #1]
0x3418387E: 0740 LSLS R0, R0, #29
0x34183880: 2800 CMP R0, #0
0x34183882: D579 BPL 46L251 ; 0x34183978
0x34183884: 9804 LDR R0, [SP, #16]
0x34183886: F8D0 00E4 LDR.W R0, [R0, #228]
0x3418388A: B170 CBZ R0, .L241 ; 0x341838AA
0x3418388C: 9804 LDR R0, [SP, #16]
0x3418388E: F8D0 00E4 LDR.W R0, [R0, #228]
0x34183892: 2801 CMP R0, #1
0x34183894: D009 BEQ 46L241 ; 0x341838AA
0x34183896: 9804 LDR R0, [SP, #16]
0x34183898: F8D0 00E4 LDR.W R0, [R0, #228]
0x3418389C: 2802 CMP R0, #2
0x3418389E: D004 BEQ 46L241 ; 0x341838AA
0x341838A0: 9804 LDR R0, [SP, #16]
0x341838A2: F8D0 00E4 LDR.W R0, [R0, #228]
0x341838A6: 2803 CMP R0, #3
0x341838A8: D100 BNE 46L242 ; 0x341838AC
.L241:
0x341838AA: E007 B 46L243 ; 0x341838BC
.L242:
0x341838AC: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341838B0: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341838B4: F240 311E MOVW R1, #0x031E
0x341838B8: F009 FA3A BL assert_failed ; 0x3418CD30
.L243:
0x341838BC: 9804 LDR R0, [SP, #16]
0x341838BE: F8D0 00E4 LDR.W R0, [R0, #228]
0x341838C2: 2802 CMP R0, #2
0x341838C4: D14B BNE 46L249 ; 0x3418395E
0x341838C6: 9804 LDR R0, [SP, #16]
0x341838C8: F8D0 0098 LDR.W R0, [R0, #152]
0x341838CC: B188 CBZ R0, .L244 ; 0x341838F2
0x341838CE: 9804 LDR R0, [SP, #16]
0x341838D0: F8D0 0098 LDR.W R0, [R0, #152]
0x341838D4: F1B0 5F80 CMP.W R0, #0x10000000
0x341838D8: D00B BEQ 46L244 ; 0x341838F2
0x341838DA: 9804 LDR R0, [SP, #16]
0x341838DC: F8D0 0098 LDR.W R0, [R0, #152]
0x341838E0: F1B0 5F00 CMP.W R0, #0x20000000
0x341838E4: D005 BEQ 46L244 ; 0x341838F2
0x341838E6: 9804 LDR R0, [SP, #16]
0x341838E8: F8D0 0098 LDR.W R0, [R0, #152]
0x341838EC: F1B0 5F40 CMP.W R0, #0x30000000
0x341838F0: D100 BNE 46L245 ; 0x341838F4
.L244:
0x341838F2: E007 B 46L246 ; 0x34183904
.L245:
0x341838F4: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341838F8: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341838FC: F240 3123 MOVW R1, #0x0323
0x34183900: F009 FA16 BL assert_failed ; 0x3418CD30
.L246:
0x34183904: 9804 LDR R0, [SP, #16]
0x34183906: F8D0 009C LDR.W R0, [R0, #156]
0x3418390A: B130 CBZ R0, .L247 ; 0x3418391A
0x3418390C: 9804 LDR R0, [SP, #16]
0x3418390E: F8D0 009C LDR.W R0, [R0, #156]
0x34183912: F5B0 7F80 CMP.W R0, #0x0100
0x34183916: D800 BHI 46L247 ; 0x3418391A
0x34183918: E007 B 46L248 ; 0x3418392A
.L247:
0x3418391A: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x3418391E: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34183922: F44F 7149 MOV.W R1, #0x0324
0x34183926: F009 FA03 BL assert_failed ; 0x3418CD30
.L248:
0x3418392A: F248 110C MOVW R1, #0x810C
0x3418392E: F2C5 6102 MOVT R1, #0x5602
0x34183932: 6808 LDR R0, [R1]
0x34183934: F64F 72FF MOVW R2, #0xFFFF
0x34183938: F6CC 7200 MOVT R2, #0xCF00
0x3418393C: 4010 ANDS R0, R2
0x3418393E: 9B04 LDR R3, [SP, #16]
0x34183940: F8D3 2098 LDR.W R2, [R3, #152]
0x34183944: F8D3 C09C LDR.W R12, [R3, #156]
0x34183948: 2300 MOVS R3, #0
0x3418394A: F6CF 73FF MOVT R3, #0xFFFF
0x3418394E: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34183952: 431A ORRS R2, R3
0x34183954: 4310 ORRS R0, R2
0x34183956: 6008 STR R0, [R1]
0x34183958: F004 F850 BL LL_RCC_IC19_Enable ; 0x341879FC
0x3418395C: E007 B 46L250 ; 0x3418396E
.L249:
0x3418395E: 9804 LDR R0, [SP, #16]
0x34183960: F8D0 00E4 LDR.W R0, [R0, #228]
0x34183964: 2801 CMP R0, #1
0x34183966: D102 BNE 46L250 ; 0x3418396E
0x34183968: F00B FCC4 BL LL_RCC_CLKP_Enable ; 0x3418F2F4
0x3418396C: E7FF B 46L250 ; 0x3418396E
.L250:
0x3418396E: 9804 LDR R0, [SP, #16]
0x34183970: F8D0 00E4 LDR.W R0, [R0, #228]
0x34183974: F004 F8F2 BL LL_RCC_SetFDCANClockSource ; 0x34187B5C
.L251:
0x34183978: 9804 LDR R0, [SP, #16]
0x3418397A: 7840 LDRB R0, [R0, #1]
0x3418397C: 06C0 LSLS R0, R0, #27
0x3418397E: 2800 CMP R0, #0
0x34183980: F140 80E3 BPL.W 46L268 ; 0x34183B4A
0x34183984: 9804 LDR R0, [SP, #16]
0x34183986: F8D0 00E8 LDR.W R0, [R0, #232]
0x3418398A: 210C MOVS R1, #12
0x3418398C: F2C0 7100 MOVT R1, #0x0700
0x34183990: 4288 CMP R0, R1
0x34183992: D027 BEQ 46L252 ; 0x341839E4
0x34183994: 9804 LDR R0, [SP, #16]
0x34183996: F8D0 00E8 LDR.W R0, [R0, #232]
0x3418399A: 210C MOVS R1, #12
0x3418399C: F2C0 7101 MOVT R1, #0x0701
0x341839A0: 4288 CMP R0, R1
0x341839A2: D01F BEQ 46L252 ; 0x341839E4
0x341839A4: 9804 LDR R0, [SP, #16]
0x341839A6: F8D0 00E8 LDR.W R0, [R0, #232]
0x341839AA: 210C MOVS R1, #12
0x341839AC: F2C0 7102 MOVT R1, #0x0702
0x341839B0: 4288 CMP R0, R1
0x341839B2: D017 BEQ 46L252 ; 0x341839E4
0x341839B4: 9804 LDR R0, [SP, #16]
0x341839B6: F8D0 00E8 LDR.W R0, [R0, #232]
0x341839BA: 210C MOVS R1, #12
0x341839BC: F2C0 7103 MOVT R1, #0x0703
0x341839C0: 4288 CMP R0, R1
0x341839C2: D00F BEQ 46L252 ; 0x341839E4
0x341839C4: 9804 LDR R0, [SP, #16]
0x341839C6: F8D0 00E8 LDR.W R0, [R0, #232]
0x341839CA: 210C MOVS R1, #12
0x341839CC: F2C0 7104 MOVT R1, #0x0704
0x341839D0: 4288 CMP R0, R1
0x341839D2: D007 BEQ 46L252 ; 0x341839E4
0x341839D4: 9804 LDR R0, [SP, #16]
0x341839D6: F8D0 00E8 LDR.W R0, [R0, #232]
0x341839DA: 210C MOVS R1, #12
0x341839DC: F2C0 7105 MOVT R1, #0x0705
0x341839E0: 4288 CMP R0, R1
0x341839E2: D100 BNE 46L253 ; 0x341839E6
.L252:
0x341839E4: E007 B 46L254 ; 0x341839F6
.L253:
0x341839E6: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341839EA: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341839EE: F240 313E MOVW R1, #0x033E
0x341839F2: F009 F99D BL assert_failed ; 0x3418CD30
.L254:
0x341839F6: 9804 LDR R0, [SP, #16]
0x341839F8: F8D0 00E8 LDR.W R0, [R0, #232]
0x341839FC: 210C MOVS R1, #12
0x341839FE: F2C0 7102 MOVT R1, #0x0702
0x34183A02: 4288 CMP R0, R1
0x34183A04: D144 BNE 46L260 ; 0x34183A90
0x34183A06: 9804 LDR R0, [SP, #16]
0x34183A08: 6D00 LDR R0, [R0, #80]
0x34183A0A: B170 CBZ R0, .L255 ; 0x34183A2A
0x34183A0C: 9804 LDR R0, [SP, #16]
0x34183A0E: 6D00 LDR R0, [R0, #80]
0x34183A10: F1B0 5F80 CMP.W R0, #0x10000000
0x34183A14: D009 BEQ 46L255 ; 0x34183A2A
0x34183A16: 9804 LDR R0, [SP, #16]
0x34183A18: 6D00 LDR R0, [R0, #80]
0x34183A1A: F1B0 5F00 CMP.W R0, #0x20000000
0x34183A1E: D004 BEQ 46L255 ; 0x34183A2A
0x34183A20: 9804 LDR R0, [SP, #16]
0x34183A22: 6D00 LDR R0, [R0, #80]
0x34183A24: F1B0 5F40 CMP.W R0, #0x30000000
0x34183A28: D100 BNE 46L256 ; 0x34183A2C
.L255:
0x34183A2A: E007 B 46L257 ; 0x34183A3C
.L256:
0x34183A2C: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34183A30: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34183A34: F240 3143 MOVW R1, #0x0343
0x34183A38: F009 F97A BL assert_failed ; 0x3418CD30
.L257:
0x34183A3C: 9804 LDR R0, [SP, #16]
0x34183A3E: 6D40 LDR R0, [R0, #84]
0x34183A40: B128 CBZ R0, .L258 ; 0x34183A4E
0x34183A42: 9804 LDR R0, [SP, #16]
0x34183A44: 6D40 LDR R0, [R0, #84]
0x34183A46: F5B0 7F80 CMP.W R0, #0x0100
0x34183A4A: D800 BHI 46L258 ; 0x34183A4E
0x34183A4C: E007 B 46L259 ; 0x34183A5E
.L258:
0x34183A4E: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34183A52: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34183A56: F44F 7151 MOV.W R1, #0x0344
0x34183A5A: F009 F969 BL assert_failed ; 0x3418CD30
.L259:
0x34183A5E: F248 01E8 MOVW R1, #0x80E8
0x34183A62: F2C5 6102 MOVT R1, #0x5602
0x34183A66: 6808 LDR R0, [R1]
0x34183A68: F64F 72FF MOVW R2, #0xFFFF
0x34183A6C: F6CC 7200 MOVT R2, #0xCF00
0x34183A70: 4010 ANDS R0, R2
0x34183A72: 9B04 LDR R3, [SP, #16]
0x34183A74: 6D1A LDR R2, [R3, #80]
0x34183A76: F8D3 C054 LDR.W R12, [R3, #84]
0x34183A7A: 2300 MOVS R3, #0
0x34183A7C: F6CF 73FF MOVT R3, #0xFFFF
0x34183A80: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34183A84: 431A ORRS R2, R3
0x34183A86: 4310 ORRS R0, R2
0x34183A88: 6008 STR R0, [R1]
0x34183A8A: F003 FFA7 BL LL_RCC_IC10_Enable.58 ; 0x341879DC
0x34183A8E: E057 B 46L267 ; 0x34183B40
.L260:
0x34183A90: 9804 LDR R0, [SP, #16]
0x34183A92: F8D0 00E8 LDR.W R0, [R0, #232]
0x34183A96: 210C MOVS R1, #12
0x34183A98: F2C0 7103 MOVT R1, #0x0703
0x34183A9C: 4288 CMP R0, R1
0x34183A9E: D144 BNE 46L266 ; 0x34183B2A
0x34183AA0: 9804 LDR R0, [SP, #16]
0x34183AA2: 6F80 LDR R0, [R0, #120]
0x34183AA4: B170 CBZ R0, .L261 ; 0x34183AC4
0x34183AA6: 9804 LDR R0, [SP, #16]
0x34183AA8: 6F80 LDR R0, [R0, #120]
0x34183AAA: F1B0 5F80 CMP.W R0, #0x10000000
0x34183AAE: D009 BEQ 46L261 ; 0x34183AC4
0x34183AB0: 9804 LDR R0, [SP, #16]
0x34183AB2: 6F80 LDR R0, [R0, #120]
0x34183AB4: F1B0 5F00 CMP.W R0, #0x20000000
0x34183AB8: D004 BEQ 46L261 ; 0x34183AC4
0x34183ABA: 9804 LDR R0, [SP, #16]
0x34183ABC: 6F80 LDR R0, [R0, #120]
0x34183ABE: F1B0 5F40 CMP.W R0, #0x30000000
0x34183AC2: D100 BNE 46L262 ; 0x34183AC6
.L261:
0x34183AC4: E007 B 46L263 ; 0x34183AD6
.L262:
0x34183AC6: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34183ACA: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34183ACE: F44F 7154 MOV.W R1, #0x0350
0x34183AD2: F009 F92D BL assert_failed ; 0x3418CD30
.L263:
0x34183AD6: 9804 LDR R0, [SP, #16]
0x34183AD8: 6FC0 LDR R0, [R0, #124]
0x34183ADA: B128 CBZ R0, .L264 ; 0x34183AE8
0x34183ADC: 9804 LDR R0, [SP, #16]
0x34183ADE: 6FC0 LDR R0, [R0, #124]
0x34183AE0: F5B0 7F80 CMP.W R0, #0x0100
0x34183AE4: D800 BHI 46L264 ; 0x34183AE8
0x34183AE6: E007 B 46L265 ; 0x34183AF8
.L264:
0x34183AE8: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34183AEC: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34183AF0: F240 3151 MOVW R1, #0x0351
0x34183AF4: F009 F91C BL assert_failed ; 0x3418CD30
.L265:
0x34183AF8: F248 01FC MOVW R1, #0x80FC
0x34183AFC: F2C5 6102 MOVT R1, #0x5602
0x34183B00: 6808 LDR R0, [R1]
0x34183B02: F64F 72FF MOVW R2, #0xFFFF
0x34183B06: F6CC 7200 MOVT R2, #0xCF00
0x34183B0A: 4010 ANDS R0, R2
0x34183B0C: 9B04 LDR R3, [SP, #16]
0x34183B0E: 6F9A LDR R2, [R3, #120]
0x34183B10: F8D3 C07C LDR.W R12, [R3, #124]
0x34183B14: 2300 MOVS R3, #0
0x34183B16: F6CF 73FF MOVT R3, #0xFFFF
0x34183B1A: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34183B1E: 431A ORRS R2, R3
0x34183B20: 4310 ORRS R0, R2
0x34183B22: 6008 STR R0, [R1]
0x34183B24: F003 FF62 BL LL_RCC_IC15_Enable.59 ; 0x341879EC
0x34183B28: E00A B 46L267 ; 0x34183B40
.L266:
0x34183B2A: 9804 LDR R0, [SP, #16]
0x34183B2C: F8D0 00E8 LDR.W R0, [R0, #232]
0x34183B30: 210C MOVS R1, #12
0x34183B32: F2C0 7101 MOVT R1, #0x0701
0x34183B36: 4288 CMP R0, R1
0x34183B38: D102 BNE 46L267 ; 0x34183B40
0x34183B3A: F00B FBDB BL LL_RCC_CLKP_Enable ; 0x3418F2F4
0x34183B3E: E7FF B 46L267 ; 0x34183B40
.L267:
0x34183B40: 9804 LDR R0, [SP, #16]
0x34183B42: F8D0 00E8 LDR.W R0, [R0, #232]
0x34183B46: F004 F817 BL LL_RCC_SetI2CClockSource ; 0x34187B78
.L268:
0x34183B4A: 9804 LDR R0, [SP, #16]
0x34183B4C: 7840 LDRB R0, [R0, #1]
0x34183B4E: 0680 LSLS R0, R0, #26
0x34183B50: 2800 CMP R0, #0
0x34183B52: F140 80EC BPL.W 46L285 ; 0x34183D2E
0x34183B56: 9804 LDR R0, [SP, #16]
0x34183B58: F8D0 00EC LDR.W R0, [R0, #236]
0x34183B5C: F240 410C MOVW R1, #0x040C
0x34183B60: F2C0 7100 MOVT R1, #0x0700
0x34183B64: 4288 CMP R0, R1
0x34183B66: D02C BEQ 46L269 ; 0x34183BC2
0x34183B68: 9804 LDR R0, [SP, #16]
0x34183B6A: F8D0 00EC LDR.W R0, [R0, #236]
0x34183B6E: F240 410C MOVW R1, #0x040C
0x34183B72: F2C0 7101 MOVT R1, #0x0701
0x34183B76: 4288 CMP R0, R1
0x34183B78: D023 BEQ 46L269 ; 0x34183BC2
0x34183B7A: 9804 LDR R0, [SP, #16]
0x34183B7C: F8D0 00EC LDR.W R0, [R0, #236]
0x34183B80: F240 410C MOVW R1, #0x040C
0x34183B84: F2C0 7102 MOVT R1, #0x0702
0x34183B88: 4288 CMP R0, R1
0x34183B8A: D01A BEQ 46L269 ; 0x34183BC2
0x34183B8C: 9804 LDR R0, [SP, #16]
0x34183B8E: F8D0 00EC LDR.W R0, [R0, #236]
0x34183B92: F240 410C MOVW R1, #0x040C
0x34183B96: F2C0 7103 MOVT R1, #0x0703
0x34183B9A: 4288 CMP R0, R1
0x34183B9C: D011 BEQ 46L269 ; 0x34183BC2
0x34183B9E: 9804 LDR R0, [SP, #16]
0x34183BA0: F8D0 00EC LDR.W R0, [R0, #236]
0x34183BA4: F240 410C MOVW R1, #0x040C
0x34183BA8: F2C0 7104 MOVT R1, #0x0704
0x34183BAC: 4288 CMP R0, R1
0x34183BAE: D008 BEQ 46L269 ; 0x34183BC2
0x34183BB0: 9804 LDR R0, [SP, #16]
0x34183BB2: F8D0 00EC LDR.W R0, [R0, #236]
0x34183BB6: F240 410C MOVW R1, #0x040C
0x34183BBA: F2C0 7105 MOVT R1, #0x0705
0x34183BBE: 4288 CMP R0, R1
0x34183BC0: D100 BNE 46L270 ; 0x34183BC4
.L269:
0x34183BC2: E007 B 46L271 ; 0x34183BD4
.L270:
0x34183BC4: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34183BC8: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34183BCC: F240 316B MOVW R1, #0x036B
0x34183BD0: F009 F8AE BL assert_failed ; 0x3418CD30
.L271:
0x34183BD4: 9804 LDR R0, [SP, #16]
0x34183BD6: F8D0 00EC LDR.W R0, [R0, #236]
0x34183BDA: F240 410C MOVW R1, #0x040C
0x34183BDE: F2C0 7102 MOVT R1, #0x0702
0x34183BE2: 4288 CMP R0, R1
0x34183BE4: D144 BNE 46L277 ; 0x34183C70
0x34183BE6: 9804 LDR R0, [SP, #16]
0x34183BE8: 6D00 LDR R0, [R0, #80]
0x34183BEA: B170 CBZ R0, .L272 ; 0x34183C0A
0x34183BEC: 9804 LDR R0, [SP, #16]
0x34183BEE: 6D00 LDR R0, [R0, #80]
0x34183BF0: F1B0 5F80 CMP.W R0, #0x10000000
0x34183BF4: D009 BEQ 46L272 ; 0x34183C0A
0x34183BF6: 9804 LDR R0, [SP, #16]
0x34183BF8: 6D00 LDR R0, [R0, #80]
0x34183BFA: F1B0 5F00 CMP.W R0, #0x20000000
0x34183BFE: D004 BEQ 46L272 ; 0x34183C0A
0x34183C00: 9804 LDR R0, [SP, #16]
0x34183C02: 6D00 LDR R0, [R0, #80]
0x34183C04: F1B0 5F40 CMP.W R0, #0x30000000
0x34183C08: D100 BNE 46L273 ; 0x34183C0C
.L272:
0x34183C0A: E007 B 46L274 ; 0x34183C1C
.L273:
0x34183C0C: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34183C10: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34183C14: F44F 715C MOV.W R1, #0x0370
0x34183C18: F009 F88A BL assert_failed ; 0x3418CD30
.L274:
0x34183C1C: 9804 LDR R0, [SP, #16]
0x34183C1E: 6D40 LDR R0, [R0, #84]
0x34183C20: B128 CBZ R0, .L275 ; 0x34183C2E
0x34183C22: 9804 LDR R0, [SP, #16]
0x34183C24: 6D40 LDR R0, [R0, #84]
0x34183C26: F5B0 7F80 CMP.W R0, #0x0100
0x34183C2A: D800 BHI 46L275 ; 0x34183C2E
0x34183C2C: E007 B 46L276 ; 0x34183C3E
.L275:
0x34183C2E: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34183C32: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34183C36: F240 3171 MOVW R1, #0x0371
0x34183C3A: F009 F879 BL assert_failed ; 0x3418CD30
.L276:
0x34183C3E: F248 01E8 MOVW R1, #0x80E8
0x34183C42: F2C5 6102 MOVT R1, #0x5602
0x34183C46: 6808 LDR R0, [R1]
0x34183C48: F64F 72FF MOVW R2, #0xFFFF
0x34183C4C: F6CC 7200 MOVT R2, #0xCF00
0x34183C50: 4010 ANDS R0, R2
0x34183C52: 9B04 LDR R3, [SP, #16]
0x34183C54: 6D1A LDR R2, [R3, #80]
0x34183C56: F8D3 C054 LDR.W R12, [R3, #84]
0x34183C5A: 2300 MOVS R3, #0
0x34183C5C: F6CF 73FF MOVT R3, #0xFFFF
0x34183C60: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34183C64: 431A ORRS R2, R3
0x34183C66: 4310 ORRS R0, R2
0x34183C68: 6008 STR R0, [R1]
0x34183C6A: F003 FEB7 BL LL_RCC_IC10_Enable.58 ; 0x341879DC
0x34183C6E: E059 B 46L284 ; 0x34183D24
.L277:
0x34183C70: 9804 LDR R0, [SP, #16]
0x34183C72: F8D0 00EC LDR.W R0, [R0, #236]
0x34183C76: F240 410C MOVW R1, #0x040C
0x34183C7A: F2C0 7103 MOVT R1, #0x0703
0x34183C7E: 4288 CMP R0, R1
0x34183C80: D144 BNE 46L283 ; 0x34183D0C
0x34183C82: 9804 LDR R0, [SP, #16]
0x34183C84: 6F80 LDR R0, [R0, #120]
0x34183C86: B170 CBZ R0, .L278 ; 0x34183CA6
0x34183C88: 9804 LDR R0, [SP, #16]
0x34183C8A: 6F80 LDR R0, [R0, #120]
0x34183C8C: F1B0 5F80 CMP.W R0, #0x10000000
0x34183C90: D009 BEQ 46L278 ; 0x34183CA6
0x34183C92: 9804 LDR R0, [SP, #16]
0x34183C94: 6F80 LDR R0, [R0, #120]
0x34183C96: F1B0 5F00 CMP.W R0, #0x20000000
0x34183C9A: D004 BEQ 46L278 ; 0x34183CA6
0x34183C9C: 9804 LDR R0, [SP, #16]
0x34183C9E: 6F80 LDR R0, [R0, #120]
0x34183CA0: F1B0 5F40 CMP.W R0, #0x30000000
0x34183CA4: D100 BNE 46L279 ; 0x34183CA8
.L278:
0x34183CA6: E007 B 46L280 ; 0x34183CB8
.L279:
0x34183CA8: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34183CAC: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34183CB0: F240 317D MOVW R1, #0x037D
0x34183CB4: F009 F83C BL assert_failed ; 0x3418CD30
.L280:
0x34183CB8: 9804 LDR R0, [SP, #16]
0x34183CBA: 6FC0 LDR R0, [R0, #124]
0x34183CBC: B128 CBZ R0, .L281 ; 0x34183CCA
0x34183CBE: 9804 LDR R0, [SP, #16]
0x34183CC0: 6FC0 LDR R0, [R0, #124]
0x34183CC2: F5B0 7F80 CMP.W R0, #0x0100
0x34183CC6: D800 BHI 46L281 ; 0x34183CCA
0x34183CC8: E007 B 46L282 ; 0x34183CDA
.L281:
0x34183CCA: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34183CCE: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34183CD2: F240 317E MOVW R1, #0x037E
0x34183CD6: F009 F82B BL assert_failed ; 0x3418CD30
.L282:
0x34183CDA: F248 01FC MOVW R1, #0x80FC
0x34183CDE: F2C5 6102 MOVT R1, #0x5602
0x34183CE2: 6808 LDR R0, [R1]
0x34183CE4: F64F 72FF MOVW R2, #0xFFFF
0x34183CE8: F6CC 7200 MOVT R2, #0xCF00
0x34183CEC: 4010 ANDS R0, R2
0x34183CEE: 9B04 LDR R3, [SP, #16]
0x34183CF0: 6F9A LDR R2, [R3, #120]
0x34183CF2: F8D3 C07C LDR.W R12, [R3, #124]
0x34183CF6: 2300 MOVS R3, #0
0x34183CF8: F6CF 73FF MOVT R3, #0xFFFF
0x34183CFC: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34183D00: 431A ORRS R2, R3
0x34183D02: 4310 ORRS R0, R2
0x34183D04: 6008 STR R0, [R1]
0x34183D06: F003 FE71 BL LL_RCC_IC15_Enable.59 ; 0x341879EC
0x34183D0A: E00B B 46L284 ; 0x34183D24
.L283:
0x34183D0C: 9804 LDR R0, [SP, #16]
0x34183D0E: F8D0 00EC LDR.W R0, [R0, #236]
0x34183D12: F240 410C MOVW R1, #0x040C
0x34183D16: F2C0 7101 MOVT R1, #0x0701
0x34183D1A: 4288 CMP R0, R1
0x34183D1C: D102 BNE 46L284 ; 0x34183D24
0x34183D1E: F00B FAE9 BL LL_RCC_CLKP_Enable ; 0x3418F2F4
0x34183D22: E7FF B 46L284 ; 0x34183D24
.L284:
0x34183D24: 9804 LDR R0, [SP, #16]
0x34183D26: F8D0 00EC LDR.W R0, [R0, #236]
0x34183D2A: F003 FF25 BL LL_RCC_SetI2CClockSource ; 0x34187B78
.L285:
0x34183D2E: 9804 LDR R0, [SP, #16]
0x34183D30: 7840 LDRB R0, [R0, #1]
0x34183D32: 0640 LSLS R0, R0, #25
0x34183D34: 2800 CMP R0, #0
0x34183D36: F140 80EC BPL.W 46L302 ; 0x34183F12
0x34183D3A: 9804 LDR R0, [SP, #16]
0x34183D3C: F8D0 00F0 LDR.W R0, [R0, #240]
0x34183D40: F640 010C MOVW R1, #0x080C
0x34183D44: F2C0 7100 MOVT R1, #0x0700
0x34183D48: 4288 CMP R0, R1
0x34183D4A: D02C BEQ 46L286 ; 0x34183DA6
0x34183D4C: 9804 LDR R0, [SP, #16]
0x34183D4E: F8D0 00F0 LDR.W R0, [R0, #240]
0x34183D52: F640 010C MOVW R1, #0x080C
0x34183D56: F2C0 7101 MOVT R1, #0x0701
0x34183D5A: 4288 CMP R0, R1
0x34183D5C: D023 BEQ 46L286 ; 0x34183DA6
0x34183D5E: 9804 LDR R0, [SP, #16]
0x34183D60: F8D0 00F0 LDR.W R0, [R0, #240]
0x34183D64: F640 010C MOVW R1, #0x080C
0x34183D68: F2C0 7102 MOVT R1, #0x0702
0x34183D6C: 4288 CMP R0, R1
0x34183D6E: D01A BEQ 46L286 ; 0x34183DA6
0x34183D70: 9804 LDR R0, [SP, #16]
0x34183D72: F8D0 00F0 LDR.W R0, [R0, #240]
0x34183D76: F640 010C MOVW R1, #0x080C
0x34183D7A: F2C0 7103 MOVT R1, #0x0703
0x34183D7E: 4288 CMP R0, R1
0x34183D80: D011 BEQ 46L286 ; 0x34183DA6
0x34183D82: 9804 LDR R0, [SP, #16]
0x34183D84: F8D0 00F0 LDR.W R0, [R0, #240]
0x34183D88: F640 010C MOVW R1, #0x080C
0x34183D8C: F2C0 7104 MOVT R1, #0x0704
0x34183D90: 4288 CMP R0, R1
0x34183D92: D008 BEQ 46L286 ; 0x34183DA6
0x34183D94: 9804 LDR R0, [SP, #16]
0x34183D96: F8D0 00F0 LDR.W R0, [R0, #240]
0x34183D9A: F640 010C MOVW R1, #0x080C
0x34183D9E: F2C0 7105 MOVT R1, #0x0705
0x34183DA2: 4288 CMP R0, R1
0x34183DA4: D100 BNE 46L287 ; 0x34183DA8
.L286:
0x34183DA6: E007 B 46L288 ; 0x34183DB8
.L287:
0x34183DA8: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34183DAC: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34183DB0: F44F 7166 MOV.W R1, #0x0398
0x34183DB4: F008 FFBC BL assert_failed ; 0x3418CD30
.L288:
0x34183DB8: 9804 LDR R0, [SP, #16]
0x34183DBA: F8D0 00F0 LDR.W R0, [R0, #240]
0x34183DBE: F640 010C MOVW R1, #0x080C
0x34183DC2: F2C0 7102 MOVT R1, #0x0702
0x34183DC6: 4288 CMP R0, R1
0x34183DC8: D144 BNE 46L294 ; 0x34183E54
0x34183DCA: 9804 LDR R0, [SP, #16]
0x34183DCC: 6D00 LDR R0, [R0, #80]
0x34183DCE: B170 CBZ R0, .L289 ; 0x34183DEE
0x34183DD0: 9804 LDR R0, [SP, #16]
0x34183DD2: 6D00 LDR R0, [R0, #80]
0x34183DD4: F1B0 5F80 CMP.W R0, #0x10000000
0x34183DD8: D009 BEQ 46L289 ; 0x34183DEE
0x34183DDA: 9804 LDR R0, [SP, #16]
0x34183DDC: 6D00 LDR R0, [R0, #80]
0x34183DDE: F1B0 5F00 CMP.W R0, #0x20000000
0x34183DE2: D004 BEQ 46L289 ; 0x34183DEE
0x34183DE4: 9804 LDR R0, [SP, #16]
0x34183DE6: 6D00 LDR R0, [R0, #80]
0x34183DE8: F1B0 5F40 CMP.W R0, #0x30000000
0x34183DEC: D100 BNE 46L290 ; 0x34183DF0
.L289:
0x34183DEE: E007 B 46L291 ; 0x34183E00
.L290:
0x34183DF0: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34183DF4: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34183DF8: F240 319D MOVW R1, #0x039D
0x34183DFC: F008 FF98 BL assert_failed ; 0x3418CD30
.L291:
0x34183E00: 9804 LDR R0, [SP, #16]
0x34183E02: 6D40 LDR R0, [R0, #84]
0x34183E04: B128 CBZ R0, .L292 ; 0x34183E12
0x34183E06: 9804 LDR R0, [SP, #16]
0x34183E08: 6D40 LDR R0, [R0, #84]
0x34183E0A: F5B0 7F80 CMP.W R0, #0x0100
0x34183E0E: D800 BHI 46L292 ; 0x34183E12
0x34183E10: E007 B 46L293 ; 0x34183E22
.L292:
0x34183E12: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34183E16: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34183E1A: F240 319E MOVW R1, #0x039E
0x34183E1E: F008 FF87 BL assert_failed ; 0x3418CD30
.L293:
0x34183E22: F248 01E8 MOVW R1, #0x80E8
0x34183E26: F2C5 6102 MOVT R1, #0x5602
0x34183E2A: 6808 LDR R0, [R1]
0x34183E2C: F64F 72FF MOVW R2, #0xFFFF
0x34183E30: F6CC 7200 MOVT R2, #0xCF00
0x34183E34: 4010 ANDS R0, R2
0x34183E36: 9B04 LDR R3, [SP, #16]
0x34183E38: 6D1A LDR R2, [R3, #80]
0x34183E3A: F8D3 C054 LDR.W R12, [R3, #84]
0x34183E3E: 2300 MOVS R3, #0
0x34183E40: F6CF 73FF MOVT R3, #0xFFFF
0x34183E44: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34183E48: 431A ORRS R2, R3
0x34183E4A: 4310 ORRS R0, R2
0x34183E4C: 6008 STR R0, [R1]
0x34183E4E: F003 FDC5 BL LL_RCC_IC10_Enable.58 ; 0x341879DC
0x34183E52: E059 B 46L301 ; 0x34183F08
.L294:
0x34183E54: 9804 LDR R0, [SP, #16]
0x34183E56: F8D0 00F0 LDR.W R0, [R0, #240]
0x34183E5A: F640 010C MOVW R1, #0x080C
0x34183E5E: F2C0 7103 MOVT R1, #0x0703
0x34183E62: 4288 CMP R0, R1
0x34183E64: D144 BNE 46L300 ; 0x34183EF0
0x34183E66: 9804 LDR R0, [SP, #16]
0x34183E68: 6F80 LDR R0, [R0, #120]
0x34183E6A: B170 CBZ R0, .L295 ; 0x34183E8A
0x34183E6C: 9804 LDR R0, [SP, #16]
0x34183E6E: 6F80 LDR R0, [R0, #120]
0x34183E70: F1B0 5F80 CMP.W R0, #0x10000000
0x34183E74: D009 BEQ 46L295 ; 0x34183E8A
0x34183E76: 9804 LDR R0, [SP, #16]
0x34183E78: 6F80 LDR R0, [R0, #120]
0x34183E7A: F1B0 5F00 CMP.W R0, #0x20000000
0x34183E7E: D004 BEQ 46L295 ; 0x34183E8A
0x34183E80: 9804 LDR R0, [SP, #16]
0x34183E82: 6F80 LDR R0, [R0, #120]
0x34183E84: F1B0 5F40 CMP.W R0, #0x30000000
0x34183E88: D100 BNE 46L296 ; 0x34183E8C
.L295:
0x34183E8A: E007 B 46L297 ; 0x34183E9C
.L296:
0x34183E8C: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34183E90: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34183E94: F240 31AA MOVW R1, #0x03AA
0x34183E98: F008 FF4A BL assert_failed ; 0x3418CD30
.L297:
0x34183E9C: 9804 LDR R0, [SP, #16]
0x34183E9E: 6FC0 LDR R0, [R0, #124]
0x34183EA0: B128 CBZ R0, .L298 ; 0x34183EAE
0x34183EA2: 9804 LDR R0, [SP, #16]
0x34183EA4: 6FC0 LDR R0, [R0, #124]
0x34183EA6: F5B0 7F80 CMP.W R0, #0x0100
0x34183EAA: D800 BHI 46L298 ; 0x34183EAE
0x34183EAC: E007 B 46L299 ; 0x34183EBE
.L298:
0x34183EAE: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34183EB2: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34183EB6: F240 31AB MOVW R1, #0x03AB
0x34183EBA: F008 FF39 BL assert_failed ; 0x3418CD30
.L299:
0x34183EBE: F248 01FC MOVW R1, #0x80FC
0x34183EC2: F2C5 6102 MOVT R1, #0x5602
0x34183EC6: 6808 LDR R0, [R1]
0x34183EC8: F64F 72FF MOVW R2, #0xFFFF
0x34183ECC: F6CC 7200 MOVT R2, #0xCF00
0x34183ED0: 4010 ANDS R0, R2
0x34183ED2: 9B04 LDR R3, [SP, #16]
0x34183ED4: 6F9A LDR R2, [R3, #120]
0x34183ED6: F8D3 C07C LDR.W R12, [R3, #124]
0x34183EDA: 2300 MOVS R3, #0
0x34183EDC: F6CF 73FF MOVT R3, #0xFFFF
0x34183EE0: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34183EE4: 431A ORRS R2, R3
0x34183EE6: 4310 ORRS R0, R2
0x34183EE8: 6008 STR R0, [R1]
0x34183EEA: F003 FD7F BL LL_RCC_IC15_Enable.59 ; 0x341879EC
0x34183EEE: E00B B 46L301 ; 0x34183F08
.L300:
0x34183EF0: 9804 LDR R0, [SP, #16]
0x34183EF2: F8D0 00F0 LDR.W R0, [R0, #240]
0x34183EF6: F640 010C MOVW R1, #0x080C
0x34183EFA: F2C0 7101 MOVT R1, #0x0701
0x34183EFE: 4288 CMP R0, R1
0x34183F00: D102 BNE 46L301 ; 0x34183F08
0x34183F02: F00B F9F7 BL LL_RCC_CLKP_Enable ; 0x3418F2F4
0x34183F06: E7FF B 46L301 ; 0x34183F08
.L301:
0x34183F08: 9804 LDR R0, [SP, #16]
0x34183F0A: F8D0 00F0 LDR.W R0, [R0, #240]
0x34183F0E: F003 FE33 BL LL_RCC_SetI2CClockSource ; 0x34187B78
.L302:
0x34183F12: 9804 LDR R0, [SP, #16]
0x34183F14: 7840 LDRB R0, [R0, #1]
0x34183F16: 0600 LSLS R0, R0, #24
0x34183F18: 2800 CMP R0, #0
0x34183F1A: F140 80EC BPL.W 46L319 ; 0x341840F6
0x34183F1E: 9804 LDR R0, [SP, #16]
0x34183F20: F8D0 00F4 LDR.W R0, [R0, #244]
0x34183F24: F640 410C MOVW R1, #0x0C0C
0x34183F28: F2C0 7100 MOVT R1, #0x0700
0x34183F2C: 4288 CMP R0, R1
0x34183F2E: D02C BEQ 46L303 ; 0x34183F8A
0x34183F30: 9804 LDR R0, [SP, #16]
0x34183F32: F8D0 00F4 LDR.W R0, [R0, #244]
0x34183F36: F640 410C MOVW R1, #0x0C0C
0x34183F3A: F2C0 7101 MOVT R1, #0x0701
0x34183F3E: 4288 CMP R0, R1
0x34183F40: D023 BEQ 46L303 ; 0x34183F8A
0x34183F42: 9804 LDR R0, [SP, #16]
0x34183F44: F8D0 00F4 LDR.W R0, [R0, #244]
0x34183F48: F640 410C MOVW R1, #0x0C0C
0x34183F4C: F2C0 7102 MOVT R1, #0x0702
0x34183F50: 4288 CMP R0, R1
0x34183F52: D01A BEQ 46L303 ; 0x34183F8A
0x34183F54: 9804 LDR R0, [SP, #16]
0x34183F56: F8D0 00F4 LDR.W R0, [R0, #244]
0x34183F5A: F640 410C MOVW R1, #0x0C0C
0x34183F5E: F2C0 7103 MOVT R1, #0x0703
0x34183F62: 4288 CMP R0, R1
0x34183F64: D011 BEQ 46L303 ; 0x34183F8A
0x34183F66: 9804 LDR R0, [SP, #16]
0x34183F68: F8D0 00F4 LDR.W R0, [R0, #244]
0x34183F6C: F640 410C MOVW R1, #0x0C0C
0x34183F70: F2C0 7104 MOVT R1, #0x0704
0x34183F74: 4288 CMP R0, R1
0x34183F76: D008 BEQ 46L303 ; 0x34183F8A
0x34183F78: 9804 LDR R0, [SP, #16]
0x34183F7A: F8D0 00F4 LDR.W R0, [R0, #244]
0x34183F7E: F640 410C MOVW R1, #0x0C0C
0x34183F82: F2C0 7105 MOVT R1, #0x0705
0x34183F86: 4288 CMP R0, R1
0x34183F88: D100 BNE 46L304 ; 0x34183F8C
.L303:
0x34183F8A: E007 B 46L305 ; 0x34183F9C
.L304:
0x34183F8C: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34183F90: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34183F94: F240 31C5 MOVW R1, #0x03C5
0x34183F98: F008 FECA BL assert_failed ; 0x3418CD30
.L305:
0x34183F9C: 9804 LDR R0, [SP, #16]
0x34183F9E: F8D0 00F4 LDR.W R0, [R0, #244]
0x34183FA2: F640 410C MOVW R1, #0x0C0C
0x34183FA6: F2C0 7102 MOVT R1, #0x0702
0x34183FAA: 4288 CMP R0, R1
0x34183FAC: D144 BNE 46L311 ; 0x34184038
0x34183FAE: 9804 LDR R0, [SP, #16]
0x34183FB0: 6D00 LDR R0, [R0, #80]
0x34183FB2: B170 CBZ R0, .L306 ; 0x34183FD2
0x34183FB4: 9804 LDR R0, [SP, #16]
0x34183FB6: 6D00 LDR R0, [R0, #80]
0x34183FB8: F1B0 5F80 CMP.W R0, #0x10000000
0x34183FBC: D009 BEQ 46L306 ; 0x34183FD2
0x34183FBE: 9804 LDR R0, [SP, #16]
0x34183FC0: 6D00 LDR R0, [R0, #80]
0x34183FC2: F1B0 5F00 CMP.W R0, #0x20000000
0x34183FC6: D004 BEQ 46L306 ; 0x34183FD2
0x34183FC8: 9804 LDR R0, [SP, #16]
0x34183FCA: 6D00 LDR R0, [R0, #80]
0x34183FCC: F1B0 5F40 CMP.W R0, #0x30000000
0x34183FD0: D100 BNE 46L307 ; 0x34183FD4
.L306:
0x34183FD2: E007 B 46L308 ; 0x34183FE4
.L307:
0x34183FD4: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34183FD8: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34183FDC: F240 31CA MOVW R1, #0x03CA
0x34183FE0: F008 FEA6 BL assert_failed ; 0x3418CD30
.L308:
0x34183FE4: 9804 LDR R0, [SP, #16]
0x34183FE6: 6D40 LDR R0, [R0, #84]
0x34183FE8: B128 CBZ R0, .L309 ; 0x34183FF6
0x34183FEA: 9804 LDR R0, [SP, #16]
0x34183FEC: 6D40 LDR R0, [R0, #84]
0x34183FEE: F5B0 7F80 CMP.W R0, #0x0100
0x34183FF2: D800 BHI 46L309 ; 0x34183FF6
0x34183FF4: E007 B 46L310 ; 0x34184006
.L309:
0x34183FF6: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34183FFA: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34183FFE: F240 31CB MOVW R1, #0x03CB
0x34184002: F008 FE95 BL assert_failed ; 0x3418CD30
.L310:
0x34184006: F248 01E8 MOVW R1, #0x80E8
0x3418400A: F2C5 6102 MOVT R1, #0x5602
0x3418400E: 6808 LDR R0, [R1]
0x34184010: F64F 72FF MOVW R2, #0xFFFF
0x34184014: F6CC 7200 MOVT R2, #0xCF00
0x34184018: 4010 ANDS R0, R2
0x3418401A: 9B04 LDR R3, [SP, #16]
0x3418401C: 6D1A LDR R2, [R3, #80]
0x3418401E: F8D3 C054 LDR.W R12, [R3, #84]
0x34184022: 2300 MOVS R3, #0
0x34184024: F6CF 73FF MOVT R3, #0xFFFF
0x34184028: EB03 430C ADD.W R3, R3, R12, LSL #16
0x3418402C: 431A ORRS R2, R3
0x3418402E: 4310 ORRS R0, R2
0x34184030: 6008 STR R0, [R1]
0x34184032: F003 FCD3 BL LL_RCC_IC10_Enable.58 ; 0x341879DC
0x34184036: E059 B 46L318 ; 0x341840EC
.L311:
0x34184038: 9804 LDR R0, [SP, #16]
0x3418403A: F8D0 00F4 LDR.W R0, [R0, #244]
0x3418403E: F640 410C MOVW R1, #0x0C0C
0x34184042: F2C0 7103 MOVT R1, #0x0703
0x34184046: 4288 CMP R0, R1
0x34184048: D144 BNE 46L317 ; 0x341840D4
0x3418404A: 9804 LDR R0, [SP, #16]
0x3418404C: 6F80 LDR R0, [R0, #120]
0x3418404E: B170 CBZ R0, .L312 ; 0x3418406E
0x34184050: 9804 LDR R0, [SP, #16]
0x34184052: 6F80 LDR R0, [R0, #120]
0x34184054: F1B0 5F80 CMP.W R0, #0x10000000
0x34184058: D009 BEQ 46L312 ; 0x3418406E
0x3418405A: 9804 LDR R0, [SP, #16]
0x3418405C: 6F80 LDR R0, [R0, #120]
0x3418405E: F1B0 5F00 CMP.W R0, #0x20000000
0x34184062: D004 BEQ 46L312 ; 0x3418406E
0x34184064: 9804 LDR R0, [SP, #16]
0x34184066: 6F80 LDR R0, [R0, #120]
0x34184068: F1B0 5F40 CMP.W R0, #0x30000000
0x3418406C: D100 BNE 46L313 ; 0x34184070
.L312:
0x3418406E: E007 B 46L314 ; 0x34184080
.L313:
0x34184070: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34184074: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34184078: F240 31D7 MOVW R1, #0x03D7
0x3418407C: F008 FE58 BL assert_failed ; 0x3418CD30
.L314:
0x34184080: 9804 LDR R0, [SP, #16]
0x34184082: 6FC0 LDR R0, [R0, #124]
0x34184084: B128 CBZ R0, .L315 ; 0x34184092
0x34184086: 9804 LDR R0, [SP, #16]
0x34184088: 6FC0 LDR R0, [R0, #124]
0x3418408A: F5B0 7F80 CMP.W R0, #0x0100
0x3418408E: D800 BHI 46L315 ; 0x34184092
0x34184090: E007 B 46L316 ; 0x341840A2
.L315:
0x34184092: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34184096: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x3418409A: F44F 7176 MOV.W R1, #0x03D8
0x3418409E: F008 FE47 BL assert_failed ; 0x3418CD30
.L316:
0x341840A2: F248 01FC MOVW R1, #0x80FC
0x341840A6: F2C5 6102 MOVT R1, #0x5602
0x341840AA: 6808 LDR R0, [R1]
0x341840AC: F64F 72FF MOVW R2, #0xFFFF
0x341840B0: F6CC 7200 MOVT R2, #0xCF00
0x341840B4: 4010 ANDS R0, R2
0x341840B6: 9B04 LDR R3, [SP, #16]
0x341840B8: 6F9A LDR R2, [R3, #120]
0x341840BA: F8D3 C07C LDR.W R12, [R3, #124]
0x341840BE: 2300 MOVS R3, #0
0x341840C0: F6CF 73FF MOVT R3, #0xFFFF
0x341840C4: EB03 430C ADD.W R3, R3, R12, LSL #16
0x341840C8: 431A ORRS R2, R3
0x341840CA: 4310 ORRS R0, R2
0x341840CC: 6008 STR R0, [R1]
0x341840CE: F003 FC8D BL LL_RCC_IC15_Enable.59 ; 0x341879EC
0x341840D2: E00B B 46L318 ; 0x341840EC
.L317:
0x341840D4: 9804 LDR R0, [SP, #16]
0x341840D6: F8D0 00F4 LDR.W R0, [R0, #244]
0x341840DA: F640 410C MOVW R1, #0x0C0C
0x341840DE: F2C0 7101 MOVT R1, #0x0701
0x341840E2: 4288 CMP R0, R1
0x341840E4: D102 BNE 46L318 ; 0x341840EC
0x341840E6: F00B F905 BL LL_RCC_CLKP_Enable ; 0x3418F2F4
0x341840EA: E7FF B 46L318 ; 0x341840EC
.L318:
0x341840EC: 9804 LDR R0, [SP, #16]
0x341840EE: F8D0 00F4 LDR.W R0, [R0, #244]
0x341840F2: F003 FD41 BL LL_RCC_SetI2CClockSource ; 0x34187B78
.L319:
0x341840F6: 9804 LDR R0, [SP, #16]
0x341840F8: 7880 LDRB R0, [R0, #2]
0x341840FA: 07C0 LSLS R0, R0, #31
0x341840FC: 2800 CMP R0, #0
0x341840FE: F000 80EC BEQ.W 46L336 ; 0x341842DA
0x34184102: 9804 LDR R0, [SP, #16]
0x34184104: F8D0 00F8 LDR.W R0, [R0, #248]
0x34184108: F241 010C MOVW R1, #0x100C
0x3418410C: F2C0 7100 MOVT R1, #0x0700
0x34184110: 4288 CMP R0, R1
0x34184112: D02C BEQ 46L320 ; 0x3418416E
0x34184114: 9804 LDR R0, [SP, #16]
0x34184116: F8D0 00F8 LDR.W R0, [R0, #248]
0x3418411A: F241 010C MOVW R1, #0x100C
0x3418411E: F2C0 7101 MOVT R1, #0x0701
0x34184122: 4288 CMP R0, R1
0x34184124: D023 BEQ 46L320 ; 0x3418416E
0x34184126: 9804 LDR R0, [SP, #16]
0x34184128: F8D0 00F8 LDR.W R0, [R0, #248]
0x3418412C: F241 010C MOVW R1, #0x100C
0x34184130: F2C0 7102 MOVT R1, #0x0702
0x34184134: 4288 CMP R0, R1
0x34184136: D01A BEQ 46L320 ; 0x3418416E
0x34184138: 9804 LDR R0, [SP, #16]
0x3418413A: F8D0 00F8 LDR.W R0, [R0, #248]
0x3418413E: F241 010C MOVW R1, #0x100C
0x34184142: F2C0 7103 MOVT R1, #0x0703
0x34184146: 4288 CMP R0, R1
0x34184148: D011 BEQ 46L320 ; 0x3418416E
0x3418414A: 9804 LDR R0, [SP, #16]
0x3418414C: F8D0 00F8 LDR.W R0, [R0, #248]
0x34184150: F241 010C MOVW R1, #0x100C
0x34184154: F2C0 7104 MOVT R1, #0x0704
0x34184158: 4288 CMP R0, R1
0x3418415A: D008 BEQ 46L320 ; 0x3418416E
0x3418415C: 9804 LDR R0, [SP, #16]
0x3418415E: F8D0 00F8 LDR.W R0, [R0, #248]
0x34184162: F241 010C MOVW R1, #0x100C
0x34184166: F2C0 7105 MOVT R1, #0x0705
0x3418416A: 4288 CMP R0, R1
0x3418416C: D100 BNE 46L321 ; 0x34184170
.L320:
0x3418416E: E007 B 46L322 ; 0x34184180
.L321:
0x34184170: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34184174: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34184178: F240 31F2 MOVW R1, #0x03F2
0x3418417C: F008 FDD8 BL assert_failed ; 0x3418CD30
.L322:
0x34184180: 9804 LDR R0, [SP, #16]
0x34184182: F8D0 00F8 LDR.W R0, [R0, #248]
0x34184186: F241 010C MOVW R1, #0x100C
0x3418418A: F2C0 7102 MOVT R1, #0x0702
0x3418418E: 4288 CMP R0, R1
0x34184190: D144 BNE 46L328 ; 0x3418421C
0x34184192: 9804 LDR R0, [SP, #16]
0x34184194: 6D00 LDR R0, [R0, #80]
0x34184196: B170 CBZ R0, .L323 ; 0x341841B6
0x34184198: 9804 LDR R0, [SP, #16]
0x3418419A: 6D00 LDR R0, [R0, #80]
0x3418419C: F1B0 5F80 CMP.W R0, #0x10000000
0x341841A0: D009 BEQ 46L323 ; 0x341841B6
0x341841A2: 9804 LDR R0, [SP, #16]
0x341841A4: 6D00 LDR R0, [R0, #80]
0x341841A6: F1B0 5F00 CMP.W R0, #0x20000000
0x341841AA: D004 BEQ 46L323 ; 0x341841B6
0x341841AC: 9804 LDR R0, [SP, #16]
0x341841AE: 6D00 LDR R0, [R0, #80]
0x341841B0: F1B0 5F40 CMP.W R0, #0x30000000
0x341841B4: D100 BNE 46L324 ; 0x341841B8
.L323:
0x341841B6: E007 B 46L325 ; 0x341841C8
.L324:
0x341841B8: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341841BC: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341841C0: F240 31F7 MOVW R1, #0x03F7
0x341841C4: F008 FDB4 BL assert_failed ; 0x3418CD30
.L325:
0x341841C8: 9804 LDR R0, [SP, #16]
0x341841CA: 6D40 LDR R0, [R0, #84]
0x341841CC: B128 CBZ R0, .L326 ; 0x341841DA
0x341841CE: 9804 LDR R0, [SP, #16]
0x341841D0: 6D40 LDR R0, [R0, #84]
0x341841D2: F5B0 7F80 CMP.W R0, #0x0100
0x341841D6: D800 BHI 46L326 ; 0x341841DA
0x341841D8: E007 B 46L327 ; 0x341841EA
.L326:
0x341841DA: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341841DE: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341841E2: F44F 717E MOV.W R1, #0x03F8
0x341841E6: F008 FDA3 BL assert_failed ; 0x3418CD30
.L327:
0x341841EA: F248 01E8 MOVW R1, #0x80E8
0x341841EE: F2C5 6102 MOVT R1, #0x5602
0x341841F2: 6808 LDR R0, [R1]
0x341841F4: F64F 72FF MOVW R2, #0xFFFF
0x341841F8: F6CC 7200 MOVT R2, #0xCF00
0x341841FC: 4010 ANDS R0, R2
0x341841FE: 9B04 LDR R3, [SP, #16]
0x34184200: 6D1A LDR R2, [R3, #80]
0x34184202: F8D3 C054 LDR.W R12, [R3, #84]
0x34184206: 2300 MOVS R3, #0
0x34184208: F6CF 73FF MOVT R3, #0xFFFF
0x3418420C: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34184210: 431A ORRS R2, R3
0x34184212: 4310 ORRS R0, R2
0x34184214: 6008 STR R0, [R1]
0x34184216: F003 FBE1 BL LL_RCC_IC10_Enable.58 ; 0x341879DC
0x3418421A: E059 B 46L335 ; 0x341842D0
.L328:
0x3418421C: 9804 LDR R0, [SP, #16]
0x3418421E: F8D0 00F8 LDR.W R0, [R0, #248]
0x34184222: F241 010C MOVW R1, #0x100C
0x34184226: F2C0 7103 MOVT R1, #0x0703
0x3418422A: 4288 CMP R0, R1
0x3418422C: D144 BNE 46L334 ; 0x341842B8
0x3418422E: 9804 LDR R0, [SP, #16]
0x34184230: 6F80 LDR R0, [R0, #120]
0x34184232: B170 CBZ R0, .L329 ; 0x34184252
0x34184234: 9804 LDR R0, [SP, #16]
0x34184236: 6F80 LDR R0, [R0, #120]
0x34184238: F1B0 5F80 CMP.W R0, #0x10000000
0x3418423C: D009 BEQ 46L329 ; 0x34184252
0x3418423E: 9804 LDR R0, [SP, #16]
0x34184240: 6F80 LDR R0, [R0, #120]
0x34184242: F1B0 5F00 CMP.W R0, #0x20000000
0x34184246: D004 BEQ 46L329 ; 0x34184252
0x34184248: 9804 LDR R0, [SP, #16]
0x3418424A: 6F80 LDR R0, [R0, #120]
0x3418424C: F1B0 5F40 CMP.W R0, #0x30000000
0x34184250: D100 BNE 46L330 ; 0x34184254
.L329:
0x34184252: E007 B 46L331 ; 0x34184264
.L330:
0x34184254: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34184258: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x3418425C: F240 4104 MOVW R1, #0x0404
0x34184260: F008 FD66 BL assert_failed ; 0x3418CD30
.L331:
0x34184264: 9804 LDR R0, [SP, #16]
0x34184266: 6FC0 LDR R0, [R0, #124]
0x34184268: B128 CBZ R0, .L332 ; 0x34184276
0x3418426A: 9804 LDR R0, [SP, #16]
0x3418426C: 6FC0 LDR R0, [R0, #124]
0x3418426E: F5B0 7F80 CMP.W R0, #0x0100
0x34184272: D800 BHI 46L332 ; 0x34184276
0x34184274: E007 B 46L333 ; 0x34184286
.L332:
0x34184276: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x3418427A: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x3418427E: F240 4105 MOVW R1, #0x0405
0x34184282: F008 FD55 BL assert_failed ; 0x3418CD30
.L333:
0x34184286: F248 01FC MOVW R1, #0x80FC
0x3418428A: F2C5 6102 MOVT R1, #0x5602
0x3418428E: 6808 LDR R0, [R1]
0x34184290: F64F 72FF MOVW R2, #0xFFFF
0x34184294: F6CC 7200 MOVT R2, #0xCF00
0x34184298: 4010 ANDS R0, R2
0x3418429A: 9B04 LDR R3, [SP, #16]
0x3418429C: 6F9A LDR R2, [R3, #120]
0x3418429E: F8D3 C07C LDR.W R12, [R3, #124]
0x341842A2: 2300 MOVS R3, #0
0x341842A4: F6CF 73FF MOVT R3, #0xFFFF
0x341842A8: EB03 430C ADD.W R3, R3, R12, LSL #16
0x341842AC: 431A ORRS R2, R3
0x341842AE: 4310 ORRS R0, R2
0x341842B0: 6008 STR R0, [R1]
0x341842B2: F003 FB9B BL LL_RCC_IC15_Enable.59 ; 0x341879EC
0x341842B6: E00B B 46L335 ; 0x341842D0
.L334:
0x341842B8: 9804 LDR R0, [SP, #16]
0x341842BA: F8D0 00F8 LDR.W R0, [R0, #248]
0x341842BE: F241 010C MOVW R1, #0x100C
0x341842C2: F2C0 7101 MOVT R1, #0x0701
0x341842C6: 4288 CMP R0, R1
0x341842C8: D102 BNE 46L335 ; 0x341842D0
0x341842CA: F00B F813 BL LL_RCC_CLKP_Enable ; 0x3418F2F4
0x341842CE: E7FF B 46L335 ; 0x341842D0
.L335:
0x341842D0: 9804 LDR R0, [SP, #16]
0x341842D2: F8D0 00F8 LDR.W R0, [R0, #248]
0x341842D6: F003 FC57 BL LL_RCC_SetI3CClockSource ; 0x34187B88
.L336:
0x341842DA: 9804 LDR R0, [SP, #16]
0x341842DC: 7880 LDRB R0, [R0, #2]
0x341842DE: 0780 LSLS R0, R0, #30
0x341842E0: 2800 CMP R0, #0
0x341842E2: F140 80EC BPL.W 46L353 ; 0x341844BE
0x341842E6: 9804 LDR R0, [SP, #16]
0x341842E8: F8D0 00FC LDR.W R0, [R0, #252]
0x341842EC: F241 410C MOVW R1, #0x140C
0x341842F0: F2C0 7100 MOVT R1, #0x0700
0x341842F4: 4288 CMP R0, R1
0x341842F6: D02C BEQ 46L337 ; 0x34184352
0x341842F8: 9804 LDR R0, [SP, #16]
0x341842FA: F8D0 00FC LDR.W R0, [R0, #252]
0x341842FE: F241 410C MOVW R1, #0x140C
0x34184302: F2C0 7101 MOVT R1, #0x0701
0x34184306: 4288 CMP R0, R1
0x34184308: D023 BEQ 46L337 ; 0x34184352
0x3418430A: 9804 LDR R0, [SP, #16]
0x3418430C: F8D0 00FC LDR.W R0, [R0, #252]
0x34184310: F241 410C MOVW R1, #0x140C
0x34184314: F2C0 7102 MOVT R1, #0x0702
0x34184318: 4288 CMP R0, R1
0x3418431A: D01A BEQ 46L337 ; 0x34184352
0x3418431C: 9804 LDR R0, [SP, #16]
0x3418431E: F8D0 00FC LDR.W R0, [R0, #252]
0x34184322: F241 410C MOVW R1, #0x140C
0x34184326: F2C0 7103 MOVT R1, #0x0703
0x3418432A: 4288 CMP R0, R1
0x3418432C: D011 BEQ 46L337 ; 0x34184352
0x3418432E: 9804 LDR R0, [SP, #16]
0x34184330: F8D0 00FC LDR.W R0, [R0, #252]
0x34184334: F241 410C MOVW R1, #0x140C
0x34184338: F2C0 7104 MOVT R1, #0x0704
0x3418433C: 4288 CMP R0, R1
0x3418433E: D008 BEQ 46L337 ; 0x34184352
0x34184340: 9804 LDR R0, [SP, #16]
0x34184342: F8D0 00FC LDR.W R0, [R0, #252]
0x34184346: F241 410C MOVW R1, #0x140C
0x3418434A: F2C0 7105 MOVT R1, #0x0705
0x3418434E: 4288 CMP R0, R1
0x34184350: D100 BNE 46L338 ; 0x34184354
.L337:
0x34184352: E007 B 46L339 ; 0x34184364
.L338:
0x34184354: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34184358: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x3418435C: F240 411F MOVW R1, #0x041F
0x34184360: F008 FCE6 BL assert_failed ; 0x3418CD30
.L339:
0x34184364: 9804 LDR R0, [SP, #16]
0x34184366: F8D0 00FC LDR.W R0, [R0, #252]
0x3418436A: F241 410C MOVW R1, #0x140C
0x3418436E: F2C0 7102 MOVT R1, #0x0702
0x34184372: 4288 CMP R0, R1
0x34184374: D144 BNE 46L345 ; 0x34184400
0x34184376: 9804 LDR R0, [SP, #16]
0x34184378: 6D00 LDR R0, [R0, #80]
0x3418437A: B170 CBZ R0, .L340 ; 0x3418439A
0x3418437C: 9804 LDR R0, [SP, #16]
0x3418437E: 6D00 LDR R0, [R0, #80]
0x34184380: F1B0 5F80 CMP.W R0, #0x10000000
0x34184384: D009 BEQ 46L340 ; 0x3418439A
0x34184386: 9804 LDR R0, [SP, #16]
0x34184388: 6D00 LDR R0, [R0, #80]
0x3418438A: F1B0 5F00 CMP.W R0, #0x20000000
0x3418438E: D004 BEQ 46L340 ; 0x3418439A
0x34184390: 9804 LDR R0, [SP, #16]
0x34184392: 6D00 LDR R0, [R0, #80]
0x34184394: F1B0 5F40 CMP.W R0, #0x30000000
0x34184398: D100 BNE 46L341 ; 0x3418439C
.L340:
0x3418439A: E007 B 46L342 ; 0x341843AC
.L341:
0x3418439C: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341843A0: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341843A4: F240 4124 MOVW R1, #0x0424
0x341843A8: F008 FCC2 BL assert_failed ; 0x3418CD30
.L342:
0x341843AC: 9804 LDR R0, [SP, #16]
0x341843AE: 6D40 LDR R0, [R0, #84]
0x341843B0: B128 CBZ R0, .L343 ; 0x341843BE
0x341843B2: 9804 LDR R0, [SP, #16]
0x341843B4: 6D40 LDR R0, [R0, #84]
0x341843B6: F5B0 7F80 CMP.W R0, #0x0100
0x341843BA: D800 BHI 46L343 ; 0x341843BE
0x341843BC: E007 B 46L344 ; 0x341843CE
.L343:
0x341843BE: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341843C2: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341843C6: F240 4125 MOVW R1, #0x0425
0x341843CA: F008 FCB1 BL assert_failed ; 0x3418CD30
.L344:
0x341843CE: F248 01E8 MOVW R1, #0x80E8
0x341843D2: F2C5 6102 MOVT R1, #0x5602
0x341843D6: 6808 LDR R0, [R1]
0x341843D8: F64F 72FF MOVW R2, #0xFFFF
0x341843DC: F6CC 7200 MOVT R2, #0xCF00
0x341843E0: 4010 ANDS R0, R2
0x341843E2: 9B04 LDR R3, [SP, #16]
0x341843E4: 6D1A LDR R2, [R3, #80]
0x341843E6: F8D3 C054 LDR.W R12, [R3, #84]
0x341843EA: 2300 MOVS R3, #0
0x341843EC: F6CF 73FF MOVT R3, #0xFFFF
0x341843F0: EB03 430C ADD.W R3, R3, R12, LSL #16
0x341843F4: 431A ORRS R2, R3
0x341843F6: 4310 ORRS R0, R2
0x341843F8: 6008 STR R0, [R1]
0x341843FA: F003 FAEF BL LL_RCC_IC10_Enable.58 ; 0x341879DC
0x341843FE: E059 B 46L352 ; 0x341844B4
.L345:
0x34184400: 9804 LDR R0, [SP, #16]
0x34184402: F8D0 00FC LDR.W R0, [R0, #252]
0x34184406: F241 410C MOVW R1, #0x140C
0x3418440A: F2C0 7103 MOVT R1, #0x0703
0x3418440E: 4288 CMP R0, R1
0x34184410: D144 BNE 46L351 ; 0x3418449C
0x34184412: 9804 LDR R0, [SP, #16]
0x34184414: 6F80 LDR R0, [R0, #120]
0x34184416: B170 CBZ R0, .L346 ; 0x34184436
0x34184418: 9804 LDR R0, [SP, #16]
0x3418441A: 6F80 LDR R0, [R0, #120]
0x3418441C: F1B0 5F80 CMP.W R0, #0x10000000
0x34184420: D009 BEQ 46L346 ; 0x34184436
0x34184422: 9804 LDR R0, [SP, #16]
0x34184424: 6F80 LDR R0, [R0, #120]
0x34184426: F1B0 5F00 CMP.W R0, #0x20000000
0x3418442A: D004 BEQ 46L346 ; 0x34184436
0x3418442C: 9804 LDR R0, [SP, #16]
0x3418442E: 6F80 LDR R0, [R0, #120]
0x34184430: F1B0 5F40 CMP.W R0, #0x30000000
0x34184434: D100 BNE 46L347 ; 0x34184438
.L346:
0x34184436: E007 B 46L348 ; 0x34184448
.L347:
0x34184438: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x3418443C: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34184440: F240 4131 MOVW R1, #0x0431
0x34184444: F008 FC74 BL assert_failed ; 0x3418CD30
.L348:
0x34184448: 9804 LDR R0, [SP, #16]
0x3418444A: 6FC0 LDR R0, [R0, #124]
0x3418444C: B128 CBZ R0, .L349 ; 0x3418445A
0x3418444E: 9804 LDR R0, [SP, #16]
0x34184450: 6FC0 LDR R0, [R0, #124]
0x34184452: F5B0 7F80 CMP.W R0, #0x0100
0x34184456: D800 BHI 46L349 ; 0x3418445A
0x34184458: E007 B 46L350 ; 0x3418446A
.L349:
0x3418445A: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x3418445E: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34184462: F240 4132 MOVW R1, #0x0432
0x34184466: F008 FC63 BL assert_failed ; 0x3418CD30
.L350:
0x3418446A: F248 01FC MOVW R1, #0x80FC
0x3418446E: F2C5 6102 MOVT R1, #0x5602
0x34184472: 6808 LDR R0, [R1]
0x34184474: F64F 72FF MOVW R2, #0xFFFF
0x34184478: F6CC 7200 MOVT R2, #0xCF00
0x3418447C: 4010 ANDS R0, R2
0x3418447E: 9B04 LDR R3, [SP, #16]
0x34184480: 6F9A LDR R2, [R3, #120]
0x34184482: F8D3 C07C LDR.W R12, [R3, #124]
0x34184486: 2300 MOVS R3, #0
0x34184488: F6CF 73FF MOVT R3, #0xFFFF
0x3418448C: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34184490: 431A ORRS R2, R3
0x34184492: 4310 ORRS R0, R2
0x34184494: 6008 STR R0, [R1]
0x34184496: F003 FAA9 BL LL_RCC_IC15_Enable.59 ; 0x341879EC
0x3418449A: E00B B 46L352 ; 0x341844B4
.L351:
0x3418449C: 9804 LDR R0, [SP, #16]
0x3418449E: F8D0 00FC LDR.W R0, [R0, #252]
0x341844A2: F241 410C MOVW R1, #0x140C
0x341844A6: F2C0 7101 MOVT R1, #0x0701
0x341844AA: 4288 CMP R0, R1
0x341844AC: D102 BNE 46L352 ; 0x341844B4
0x341844AE: F00A FF21 BL LL_RCC_CLKP_Enable ; 0x3418F2F4
0x341844B2: E7FF B 46L352 ; 0x341844B4
.L352:
0x341844B4: 9804 LDR R0, [SP, #16]
0x341844B6: F8D0 00FC LDR.W R0, [R0, #252]
0x341844BA: F003 FB65 BL LL_RCC_SetI3CClockSource ; 0x34187B88
.L353:
0x341844BE: 9804 LDR R0, [SP, #16]
0x341844C0: 7880 LDRB R0, [R0, #2]
0x341844C2: 0740 LSLS R0, R0, #29
0x341844C4: 2800 CMP R0, #0
0x341844C6: F140 809E BPL.W 46L364 ; 0x34184606
0x341844CA: 9804 LDR R0, [SP, #16]
0x341844CC: F8D0 0100 LDR.W R0, [R0, #0x0100]
0x341844D0: F640 012C MOVW R1, #0x082C
0x341844D4: F2C0 7100 MOVT R1, #0x0700
0x341844D8: 4288 CMP R0, R1
0x341844DA: D02C BEQ 46L354 ; 0x34184536
0x341844DC: 9804 LDR R0, [SP, #16]
0x341844DE: F8D0 0100 LDR.W R0, [R0, #0x0100]
0x341844E2: F640 012C MOVW R1, #0x082C
0x341844E6: F2C0 7101 MOVT R1, #0x0701
0x341844EA: 4288 CMP R0, R1
0x341844EC: D023 BEQ 46L354 ; 0x34184536
0x341844EE: 9804 LDR R0, [SP, #16]
0x341844F0: F8D0 0100 LDR.W R0, [R0, #0x0100]
0x341844F4: F640 012C MOVW R1, #0x082C
0x341844F8: F2C0 7102 MOVT R1, #0x0702
0x341844FC: 4288 CMP R0, R1
0x341844FE: D01A BEQ 46L354 ; 0x34184536
0x34184500: 9804 LDR R0, [SP, #16]
0x34184502: F8D0 0100 LDR.W R0, [R0, #0x0100]
0x34184506: F640 012C MOVW R1, #0x082C
0x3418450A: F2C0 7103 MOVT R1, #0x0703
0x3418450E: 4288 CMP R0, R1
0x34184510: D011 BEQ 46L354 ; 0x34184536
0x34184512: 9804 LDR R0, [SP, #16]
0x34184514: F8D0 0100 LDR.W R0, [R0, #0x0100]
0x34184518: F640 012C MOVW R1, #0x082C
0x3418451C: F2C0 7104 MOVT R1, #0x0704
0x34184520: 4288 CMP R0, R1
0x34184522: D008 BEQ 46L354 ; 0x34184536
0x34184524: 9804 LDR R0, [SP, #16]
0x34184526: F8D0 0100 LDR.W R0, [R0, #0x0100]
0x3418452A: F640 012C MOVW R1, #0x082C
0x3418452E: F2C0 7105 MOVT R1, #0x0705
0x34184532: 4288 CMP R0, R1
0x34184534: D100 BNE 46L355 ; 0x34184538
.L354:
0x34184536: E007 B 46L356 ; 0x34184548
.L355:
0x34184538: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x3418453C: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34184540: F240 414C MOVW R1, #0x044C
0x34184544: F008 FBF4 BL assert_failed ; 0x3418CD30
.L356:
0x34184548: 9804 LDR R0, [SP, #16]
0x3418454A: F8D0 0100 LDR.W R0, [R0, #0x0100]
0x3418454E: F640 012C MOVW R1, #0x082C
0x34184552: F2C0 7102 MOVT R1, #0x0702
0x34184556: 4288 CMP R0, R1
0x34184558: D144 BNE 46L362 ; 0x341845E4
0x3418455A: 9804 LDR R0, [SP, #16]
0x3418455C: 6F80 LDR R0, [R0, #120]
0x3418455E: B170 CBZ R0, .L357 ; 0x3418457E
0x34184560: 9804 LDR R0, [SP, #16]
0x34184562: 6F80 LDR R0, [R0, #120]
0x34184564: F1B0 5F80 CMP.W R0, #0x10000000
0x34184568: D009 BEQ 46L357 ; 0x3418457E
0x3418456A: 9804 LDR R0, [SP, #16]
0x3418456C: 6F80 LDR R0, [R0, #120]
0x3418456E: F1B0 5F00 CMP.W R0, #0x20000000
0x34184572: D004 BEQ 46L357 ; 0x3418457E
0x34184574: 9804 LDR R0, [SP, #16]
0x34184576: 6F80 LDR R0, [R0, #120]
0x34184578: F1B0 5F40 CMP.W R0, #0x30000000
0x3418457C: D100 BNE 46L358 ; 0x34184580
.L357:
0x3418457E: E007 B 46L359 ; 0x34184590
.L358:
0x34184580: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34184584: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34184588: F240 4151 MOVW R1, #0x0451
0x3418458C: F008 FBD0 BL assert_failed ; 0x3418CD30
.L359:
0x34184590: 9804 LDR R0, [SP, #16]
0x34184592: 6FC0 LDR R0, [R0, #124]
0x34184594: B128 CBZ R0, .L360 ; 0x341845A2
0x34184596: 9804 LDR R0, [SP, #16]
0x34184598: 6FC0 LDR R0, [R0, #124]
0x3418459A: F5B0 7F80 CMP.W R0, #0x0100
0x3418459E: D800 BHI 46L360 ; 0x341845A2
0x341845A0: E007 B 46L361 ; 0x341845B2
.L360:
0x341845A2: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341845A6: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341845AA: F240 4152 MOVW R1, #0x0452
0x341845AE: F008 FBBF BL assert_failed ; 0x3418CD30
.L361:
0x341845B2: F248 01FC MOVW R1, #0x80FC
0x341845B6: F2C5 6102 MOVT R1, #0x5602
0x341845BA: 6808 LDR R0, [R1]
0x341845BC: F64F 72FF MOVW R2, #0xFFFF
0x341845C0: F6CC 7200 MOVT R2, #0xCF00
0x341845C4: 4010 ANDS R0, R2
0x341845C6: 9B04 LDR R3, [SP, #16]
0x341845C8: 6F9A LDR R2, [R3, #120]
0x341845CA: F8D3 C07C LDR.W R12, [R3, #124]
0x341845CE: 2300 MOVS R3, #0
0x341845D0: F6CF 73FF MOVT R3, #0xFFFF
0x341845D4: EB03 430C ADD.W R3, R3, R12, LSL #16
0x341845D8: 431A ORRS R2, R3
0x341845DA: 4310 ORRS R0, R2
0x341845DC: 6008 STR R0, [R1]
0x341845DE: F003 FA05 BL LL_RCC_IC15_Enable.59 ; 0x341879EC
0x341845E2: E00B B 46L363 ; 0x341845FC
.L362:
0x341845E4: 9804 LDR R0, [SP, #16]
0x341845E6: F8D0 0100 LDR.W R0, [R0, #0x0100]
0x341845EA: F640 012C MOVW R1, #0x082C
0x341845EE: F2C0 7101 MOVT R1, #0x0701
0x341845F2: 4288 CMP R0, R1
0x341845F4: D102 BNE 46L363 ; 0x341845FC
0x341845F6: F00A FE7D BL LL_RCC_CLKP_Enable ; 0x3418F2F4
0x341845FA: E7FF B 46L363 ; 0x341845FC
.L363:
0x341845FC: 9804 LDR R0, [SP, #16]
0x341845FE: F8D0 0100 LDR.W R0, [R0, #0x0100]
0x34184602: F003 FAC9 BL LL_RCC_SetLPTIMClockSource ; 0x34187B98
.L364:
0x34184606: 9804 LDR R0, [SP, #16]
0x34184608: 7880 LDRB R0, [R0, #2]
0x3418460A: 0700 LSLS R0, R0, #28
0x3418460C: 2800 CMP R0, #0
0x3418460E: F140 809E BPL.W 46L375 ; 0x3418474E
0x34184612: 9804 LDR R0, [SP, #16]
0x34184614: F8D0 0104 LDR.W R0, [R0, #0x0104]
0x34184618: F640 412C MOVW R1, #0x0C2C
0x3418461C: F2C0 7100 MOVT R1, #0x0700
0x34184620: 4288 CMP R0, R1
0x34184622: D02C BEQ 46L365 ; 0x3418467E
0x34184624: 9804 LDR R0, [SP, #16]
0x34184626: F8D0 0104 LDR.W R0, [R0, #0x0104]
0x3418462A: F640 412C MOVW R1, #0x0C2C
0x3418462E: F2C0 7101 MOVT R1, #0x0701
0x34184632: 4288 CMP R0, R1
0x34184634: D023 BEQ 46L365 ; 0x3418467E
0x34184636: 9804 LDR R0, [SP, #16]
0x34184638: F8D0 0104 LDR.W R0, [R0, #0x0104]
0x3418463C: F640 412C MOVW R1, #0x0C2C
0x34184640: F2C0 7102 MOVT R1, #0x0702
0x34184644: 4288 CMP R0, R1
0x34184646: D01A BEQ 46L365 ; 0x3418467E
0x34184648: 9804 LDR R0, [SP, #16]
0x3418464A: F8D0 0104 LDR.W R0, [R0, #0x0104]
0x3418464E: F640 412C MOVW R1, #0x0C2C
0x34184652: F2C0 7103 MOVT R1, #0x0703
0x34184656: 4288 CMP R0, R1
0x34184658: D011 BEQ 46L365 ; 0x3418467E
0x3418465A: 9804 LDR R0, [SP, #16]
0x3418465C: F8D0 0104 LDR.W R0, [R0, #0x0104]
0x34184660: F640 412C MOVW R1, #0x0C2C
0x34184664: F2C0 7104 MOVT R1, #0x0704
0x34184668: 4288 CMP R0, R1
0x3418466A: D008 BEQ 46L365 ; 0x3418467E
0x3418466C: 9804 LDR R0, [SP, #16]
0x3418466E: F8D0 0104 LDR.W R0, [R0, #0x0104]
0x34184672: F640 412C MOVW R1, #0x0C2C
0x34184676: F2C0 7105 MOVT R1, #0x0705
0x3418467A: 4288 CMP R0, R1
0x3418467C: D100 BNE 46L366 ; 0x34184680
.L365:
0x3418467E: E007 B 46L367 ; 0x34184690
.L366:
0x34184680: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34184684: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34184688: F240 416C MOVW R1, #0x046C
0x3418468C: F008 FB50 BL assert_failed ; 0x3418CD30
.L367:
0x34184690: 9804 LDR R0, [SP, #16]
0x34184692: F8D0 0104 LDR.W R0, [R0, #0x0104]
0x34184696: F640 412C MOVW R1, #0x0C2C
0x3418469A: F2C0 7102 MOVT R1, #0x0702
0x3418469E: 4288 CMP R0, R1
0x341846A0: D144 BNE 46L373 ; 0x3418472C
0x341846A2: 9804 LDR R0, [SP, #16]
0x341846A4: 6F80 LDR R0, [R0, #120]
0x341846A6: B170 CBZ R0, .L368 ; 0x341846C6
0x341846A8: 9804 LDR R0, [SP, #16]
0x341846AA: 6F80 LDR R0, [R0, #120]
0x341846AC: F1B0 5F80 CMP.W R0, #0x10000000
0x341846B0: D009 BEQ 46L368 ; 0x341846C6
0x341846B2: 9804 LDR R0, [SP, #16]
0x341846B4: 6F80 LDR R0, [R0, #120]
0x341846B6: F1B0 5F00 CMP.W R0, #0x20000000
0x341846BA: D004 BEQ 46L368 ; 0x341846C6
0x341846BC: 9804 LDR R0, [SP, #16]
0x341846BE: 6F80 LDR R0, [R0, #120]
0x341846C0: F1B0 5F40 CMP.W R0, #0x30000000
0x341846C4: D100 BNE 46L369 ; 0x341846C8
.L368:
0x341846C6: E007 B 46L370 ; 0x341846D8
.L369:
0x341846C8: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341846CC: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341846D0: F240 4171 MOVW R1, #0x0471
0x341846D4: F008 FB2C BL assert_failed ; 0x3418CD30
.L370:
0x341846D8: 9804 LDR R0, [SP, #16]
0x341846DA: 6FC0 LDR R0, [R0, #124]
0x341846DC: B128 CBZ R0, .L371 ; 0x341846EA
0x341846DE: 9804 LDR R0, [SP, #16]
0x341846E0: 6FC0 LDR R0, [R0, #124]
0x341846E2: F5B0 7F80 CMP.W R0, #0x0100
0x341846E6: D800 BHI 46L371 ; 0x341846EA
0x341846E8: E007 B 46L372 ; 0x341846FA
.L371:
0x341846EA: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341846EE: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341846F2: F240 4172 MOVW R1, #0x0472
0x341846F6: F008 FB1B BL assert_failed ; 0x3418CD30
.L372:
0x341846FA: F248 01FC MOVW R1, #0x80FC
0x341846FE: F2C5 6102 MOVT R1, #0x5602
0x34184702: 6808 LDR R0, [R1]
0x34184704: F64F 72FF MOVW R2, #0xFFFF
0x34184708: F6CC 7200 MOVT R2, #0xCF00
0x3418470C: 4010 ANDS R0, R2
0x3418470E: 9B04 LDR R3, [SP, #16]
0x34184710: 6F9A LDR R2, [R3, #120]
0x34184712: F8D3 C07C LDR.W R12, [R3, #124]
0x34184716: 2300 MOVS R3, #0
0x34184718: F6CF 73FF MOVT R3, #0xFFFF
0x3418471C: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34184720: 431A ORRS R2, R3
0x34184722: 4310 ORRS R0, R2
0x34184724: 6008 STR R0, [R1]
0x34184726: F003 F961 BL LL_RCC_IC15_Enable.59 ; 0x341879EC
0x3418472A: E00B B 46L374 ; 0x34184744
.L373:
0x3418472C: 9804 LDR R0, [SP, #16]
0x3418472E: F8D0 0104 LDR.W R0, [R0, #0x0104]
0x34184732: F640 412C MOVW R1, #0x0C2C
0x34184736: F2C0 7101 MOVT R1, #0x0701
0x3418473A: 4288 CMP R0, R1
0x3418473C: D102 BNE 46L374 ; 0x34184744
0x3418473E: F00A FDD9 BL LL_RCC_CLKP_Enable ; 0x3418F2F4
0x34184742: E7FF B 46L374 ; 0x34184744
.L374:
0x34184744: 9804 LDR R0, [SP, #16]
0x34184746: F8D0 0104 LDR.W R0, [R0, #0x0104]
0x3418474A: F003 FA25 BL LL_RCC_SetLPTIMClockSource ; 0x34187B98
.L375:
0x3418474E: 9804 LDR R0, [SP, #16]
0x34184750: 7880 LDRB R0, [R0, #2]
0x34184752: 06C0 LSLS R0, R0, #27
0x34184754: 2800 CMP R0, #0
0x34184756: F140 809E BPL.W 46L386 ; 0x34184896
0x3418475A: 9804 LDR R0, [SP, #16]
0x3418475C: F8D0 0108 LDR.W R0, [R0, #0x0108]
0x34184760: F241 012C MOVW R1, #0x102C
0x34184764: F2C0 7100 MOVT R1, #0x0700
0x34184768: 4288 CMP R0, R1
0x3418476A: D02C BEQ 46L376 ; 0x341847C6
0x3418476C: 9804 LDR R0, [SP, #16]
0x3418476E: F8D0 0108 LDR.W R0, [R0, #0x0108]
0x34184772: F241 012C MOVW R1, #0x102C
0x34184776: F2C0 7101 MOVT R1, #0x0701
0x3418477A: 4288 CMP R0, R1
0x3418477C: D023 BEQ 46L376 ; 0x341847C6
0x3418477E: 9804 LDR R0, [SP, #16]
0x34184780: F8D0 0108 LDR.W R0, [R0, #0x0108]
0x34184784: F241 012C MOVW R1, #0x102C
0x34184788: F2C0 7102 MOVT R1, #0x0702
0x3418478C: 4288 CMP R0, R1
0x3418478E: D01A BEQ 46L376 ; 0x341847C6
0x34184790: 9804 LDR R0, [SP, #16]
0x34184792: F8D0 0108 LDR.W R0, [R0, #0x0108]
0x34184796: F241 012C MOVW R1, #0x102C
0x3418479A: F2C0 7103 MOVT R1, #0x0703
0x3418479E: 4288 CMP R0, R1
0x341847A0: D011 BEQ 46L376 ; 0x341847C6
0x341847A2: 9804 LDR R0, [SP, #16]
0x341847A4: F8D0 0108 LDR.W R0, [R0, #0x0108]
0x341847A8: F241 012C MOVW R1, #0x102C
0x341847AC: F2C0 7104 MOVT R1, #0x0704
0x341847B0: 4288 CMP R0, R1
0x341847B2: D008 BEQ 46L376 ; 0x341847C6
0x341847B4: 9804 LDR R0, [SP, #16]
0x341847B6: F8D0 0108 LDR.W R0, [R0, #0x0108]
0x341847BA: F241 012C MOVW R1, #0x102C
0x341847BE: F2C0 7105 MOVT R1, #0x0705
0x341847C2: 4288 CMP R0, R1
0x341847C4: D100 BNE 46L377 ; 0x341847C8
.L376:
0x341847C6: E007 B 46L378 ; 0x341847D8
.L377:
0x341847C8: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341847CC: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341847D0: F240 418C MOVW R1, #0x048C
0x341847D4: F008 FAAC BL assert_failed ; 0x3418CD30
.L378:
0x341847D8: 9804 LDR R0, [SP, #16]
0x341847DA: F8D0 0108 LDR.W R0, [R0, #0x0108]
0x341847DE: F241 012C MOVW R1, #0x102C
0x341847E2: F2C0 7102 MOVT R1, #0x0702
0x341847E6: 4288 CMP R0, R1
0x341847E8: D144 BNE 46L384 ; 0x34184874
0x341847EA: 9804 LDR R0, [SP, #16]
0x341847EC: 6F80 LDR R0, [R0, #120]
0x341847EE: B170 CBZ R0, .L379 ; 0x3418480E
0x341847F0: 9804 LDR R0, [SP, #16]
0x341847F2: 6F80 LDR R0, [R0, #120]
0x341847F4: F1B0 5F80 CMP.W R0, #0x10000000
0x341847F8: D009 BEQ 46L379 ; 0x3418480E
0x341847FA: 9804 LDR R0, [SP, #16]
0x341847FC: 6F80 LDR R0, [R0, #120]
0x341847FE: F1B0 5F00 CMP.W R0, #0x20000000
0x34184802: D004 BEQ 46L379 ; 0x3418480E
0x34184804: 9804 LDR R0, [SP, #16]
0x34184806: 6F80 LDR R0, [R0, #120]
0x34184808: F1B0 5F40 CMP.W R0, #0x30000000
0x3418480C: D100 BNE 46L380 ; 0x34184810
.L379:
0x3418480E: E007 B 46L381 ; 0x34184820
.L380:
0x34184810: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34184814: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34184818: F240 4191 MOVW R1, #0x0491
0x3418481C: F008 FA88 BL assert_failed ; 0x3418CD30
.L381:
0x34184820: 9804 LDR R0, [SP, #16]
0x34184822: 6FC0 LDR R0, [R0, #124]
0x34184824: B128 CBZ R0, .L382 ; 0x34184832
0x34184826: 9804 LDR R0, [SP, #16]
0x34184828: 6FC0 LDR R0, [R0, #124]
0x3418482A: F5B0 7F80 CMP.W R0, #0x0100
0x3418482E: D800 BHI 46L382 ; 0x34184832
0x34184830: E007 B 46L383 ; 0x34184842
.L382:
0x34184832: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34184836: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x3418483A: F240 4192 MOVW R1, #0x0492
0x3418483E: F008 FA77 BL assert_failed ; 0x3418CD30
.L383:
0x34184842: F248 01FC MOVW R1, #0x80FC
0x34184846: F2C5 6102 MOVT R1, #0x5602
0x3418484A: 6808 LDR R0, [R1]
0x3418484C: F64F 72FF MOVW R2, #0xFFFF
0x34184850: F6CC 7200 MOVT R2, #0xCF00
0x34184854: 4010 ANDS R0, R2
0x34184856: 9B04 LDR R3, [SP, #16]
0x34184858: 6F9A LDR R2, [R3, #120]
0x3418485A: F8D3 C07C LDR.W R12, [R3, #124]
0x3418485E: 2300 MOVS R3, #0
0x34184860: F6CF 73FF MOVT R3, #0xFFFF
0x34184864: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34184868: 431A ORRS R2, R3
0x3418486A: 4310 ORRS R0, R2
0x3418486C: 6008 STR R0, [R1]
0x3418486E: F003 F8BD BL LL_RCC_IC15_Enable.59 ; 0x341879EC
0x34184872: E00B B 46L385 ; 0x3418488C
.L384:
0x34184874: 9804 LDR R0, [SP, #16]
0x34184876: F8D0 0108 LDR.W R0, [R0, #0x0108]
0x3418487A: F241 012C MOVW R1, #0x102C
0x3418487E: F2C0 7101 MOVT R1, #0x0701
0x34184882: 4288 CMP R0, R1
0x34184884: D102 BNE 46L385 ; 0x3418488C
0x34184886: F00A FD35 BL LL_RCC_CLKP_Enable ; 0x3418F2F4
0x3418488A: E7FF B 46L385 ; 0x3418488C
.L385:
0x3418488C: 9804 LDR R0, [SP, #16]
0x3418488E: F8D0 0108 LDR.W R0, [R0, #0x0108]
0x34184892: F003 F981 BL LL_RCC_SetLPTIMClockSource ; 0x34187B98
.L386:
0x34184896: 9804 LDR R0, [SP, #16]
0x34184898: 7880 LDRB R0, [R0, #2]
0x3418489A: 0680 LSLS R0, R0, #26
0x3418489C: 2800 CMP R0, #0
0x3418489E: F140 809E BPL.W 46L397 ; 0x341849DE
0x341848A2: 9804 LDR R0, [SP, #16]
0x341848A4: F8D0 010C LDR.W R0, [R0, #0x010C]
0x341848A8: F241 412C MOVW R1, #0x142C
0x341848AC: F2C0 7100 MOVT R1, #0x0700
0x341848B0: 4288 CMP R0, R1
0x341848B2: D02C BEQ 46L387 ; 0x3418490E
0x341848B4: 9804 LDR R0, [SP, #16]
0x341848B6: F8D0 010C LDR.W R0, [R0, #0x010C]
0x341848BA: F241 412C MOVW R1, #0x142C
0x341848BE: F2C0 7101 MOVT R1, #0x0701
0x341848C2: 4288 CMP R0, R1
0x341848C4: D023 BEQ 46L387 ; 0x3418490E
0x341848C6: 9804 LDR R0, [SP, #16]
0x341848C8: F8D0 010C LDR.W R0, [R0, #0x010C]
0x341848CC: F241 412C MOVW R1, #0x142C
0x341848D0: F2C0 7102 MOVT R1, #0x0702
0x341848D4: 4288 CMP R0, R1
0x341848D6: D01A BEQ 46L387 ; 0x3418490E
0x341848D8: 9804 LDR R0, [SP, #16]
0x341848DA: F8D0 010C LDR.W R0, [R0, #0x010C]
0x341848DE: F241 412C MOVW R1, #0x142C
0x341848E2: F2C0 7103 MOVT R1, #0x0703
0x341848E6: 4288 CMP R0, R1
0x341848E8: D011 BEQ 46L387 ; 0x3418490E
0x341848EA: 9804 LDR R0, [SP, #16]
0x341848EC: F8D0 010C LDR.W R0, [R0, #0x010C]
0x341848F0: F241 412C MOVW R1, #0x142C
0x341848F4: F2C0 7104 MOVT R1, #0x0704
0x341848F8: 4288 CMP R0, R1
0x341848FA: D008 BEQ 46L387 ; 0x3418490E
0x341848FC: 9804 LDR R0, [SP, #16]
0x341848FE: F8D0 010C LDR.W R0, [R0, #0x010C]
0x34184902: F241 412C MOVW R1, #0x142C
0x34184906: F2C0 7105 MOVT R1, #0x0705
0x3418490A: 4288 CMP R0, R1
0x3418490C: D100 BNE 46L388 ; 0x34184910
.L387:
0x3418490E: E007 B 46L389 ; 0x34184920
.L388:
0x34184910: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34184914: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34184918: F240 41AC MOVW R1, #0x04AC
0x3418491C: F008 FA08 BL assert_failed ; 0x3418CD30
.L389:
0x34184920: 9804 LDR R0, [SP, #16]
0x34184922: F8D0 010C LDR.W R0, [R0, #0x010C]
0x34184926: F241 412C MOVW R1, #0x142C
0x3418492A: F2C0 7102 MOVT R1, #0x0702
0x3418492E: 4288 CMP R0, R1
0x34184930: D144 BNE 46L395 ; 0x341849BC
0x34184932: 9804 LDR R0, [SP, #16]
0x34184934: 6F80 LDR R0, [R0, #120]
0x34184936: B170 CBZ R0, .L390 ; 0x34184956
0x34184938: 9804 LDR R0, [SP, #16]
0x3418493A: 6F80 LDR R0, [R0, #120]
0x3418493C: F1B0 5F80 CMP.W R0, #0x10000000
0x34184940: D009 BEQ 46L390 ; 0x34184956
0x34184942: 9804 LDR R0, [SP, #16]
0x34184944: 6F80 LDR R0, [R0, #120]
0x34184946: F1B0 5F00 CMP.W R0, #0x20000000
0x3418494A: D004 BEQ 46L390 ; 0x34184956
0x3418494C: 9804 LDR R0, [SP, #16]
0x3418494E: 6F80 LDR R0, [R0, #120]
0x34184950: F1B0 5F40 CMP.W R0, #0x30000000
0x34184954: D100 BNE 46L391 ; 0x34184958
.L390:
0x34184956: E007 B 46L392 ; 0x34184968
.L391:
0x34184958: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x3418495C: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34184960: F240 41B1 MOVW R1, #0x04B1
0x34184964: F008 F9E4 BL assert_failed ; 0x3418CD30
.L392:
0x34184968: 9804 LDR R0, [SP, #16]
0x3418496A: 6FC0 LDR R0, [R0, #124]
0x3418496C: B128 CBZ R0, .L393 ; 0x3418497A
0x3418496E: 9804 LDR R0, [SP, #16]
0x34184970: 6FC0 LDR R0, [R0, #124]
0x34184972: F5B0 7F80 CMP.W R0, #0x0100
0x34184976: D800 BHI 46L393 ; 0x3418497A
0x34184978: E007 B 46L394 ; 0x3418498A
.L393:
0x3418497A: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x3418497E: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34184982: F240 41B2 MOVW R1, #0x04B2
0x34184986: F008 F9D3 BL assert_failed ; 0x3418CD30
.L394:
0x3418498A: F248 01FC MOVW R1, #0x80FC
0x3418498E: F2C5 6102 MOVT R1, #0x5602
0x34184992: 6808 LDR R0, [R1]
0x34184994: F64F 72FF MOVW R2, #0xFFFF
0x34184998: F6CC 7200 MOVT R2, #0xCF00
0x3418499C: 4010 ANDS R0, R2
0x3418499E: 9B04 LDR R3, [SP, #16]
0x341849A0: 6F9A LDR R2, [R3, #120]
0x341849A2: F8D3 C07C LDR.W R12, [R3, #124]
0x341849A6: 2300 MOVS R3, #0
0x341849A8: F6CF 73FF MOVT R3, #0xFFFF
0x341849AC: EB03 430C ADD.W R3, R3, R12, LSL #16
0x341849B0: 431A ORRS R2, R3
0x341849B2: 4310 ORRS R0, R2
0x341849B4: 6008 STR R0, [R1]
0x341849B6: F003 F819 BL LL_RCC_IC15_Enable.59 ; 0x341879EC
0x341849BA: E00B B 46L396 ; 0x341849D4
.L395:
0x341849BC: 9804 LDR R0, [SP, #16]
0x341849BE: F8D0 010C LDR.W R0, [R0, #0x010C]
0x341849C2: F241 412C MOVW R1, #0x142C
0x341849C6: F2C0 7101 MOVT R1, #0x0701
0x341849CA: 4288 CMP R0, R1
0x341849CC: D102 BNE 46L396 ; 0x341849D4
0x341849CE: F00A FC91 BL LL_RCC_CLKP_Enable ; 0x3418F2F4
0x341849D2: E7FF B 46L396 ; 0x341849D4
.L396:
0x341849D4: 9804 LDR R0, [SP, #16]
0x341849D6: F8D0 010C LDR.W R0, [R0, #0x010C]
0x341849DA: F003 F8DD BL LL_RCC_SetLPTIMClockSource ; 0x34187B98
.L397:
0x341849DE: 9804 LDR R0, [SP, #16]
0x341849E0: 7880 LDRB R0, [R0, #2]
0x341849E2: 0640 LSLS R0, R0, #25
0x341849E4: 2800 CMP R0, #0
0x341849E6: F140 809E BPL.W 46L408 ; 0x34184B26
0x341849EA: 9804 LDR R0, [SP, #16]
0x341849EC: F8D0 0110 LDR.W R0, [R0, #0x0110]
0x341849F0: F641 012C MOVW R1, #0x182C
0x341849F4: F2C0 7100 MOVT R1, #0x0700
0x341849F8: 4288 CMP R0, R1
0x341849FA: D02C BEQ 46L398 ; 0x34184A56
0x341849FC: 9804 LDR R0, [SP, #16]
0x341849FE: F8D0 0110 LDR.W R0, [R0, #0x0110]
0x34184A02: F641 012C MOVW R1, #0x182C
0x34184A06: F2C0 7101 MOVT R1, #0x0701
0x34184A0A: 4288 CMP R0, R1
0x34184A0C: D023 BEQ 46L398 ; 0x34184A56
0x34184A0E: 9804 LDR R0, [SP, #16]
0x34184A10: F8D0 0110 LDR.W R0, [R0, #0x0110]
0x34184A14: F641 012C MOVW R1, #0x182C
0x34184A18: F2C0 7102 MOVT R1, #0x0702
0x34184A1C: 4288 CMP R0, R1
0x34184A1E: D01A BEQ 46L398 ; 0x34184A56
0x34184A20: 9804 LDR R0, [SP, #16]
0x34184A22: F8D0 0110 LDR.W R0, [R0, #0x0110]
0x34184A26: F641 012C MOVW R1, #0x182C
0x34184A2A: F2C0 7103 MOVT R1, #0x0703
0x34184A2E: 4288 CMP R0, R1
0x34184A30: D011 BEQ 46L398 ; 0x34184A56
0x34184A32: 9804 LDR R0, [SP, #16]
0x34184A34: F8D0 0110 LDR.W R0, [R0, #0x0110]
0x34184A38: F641 012C MOVW R1, #0x182C
0x34184A3C: F2C0 7104 MOVT R1, #0x0704
0x34184A40: 4288 CMP R0, R1
0x34184A42: D008 BEQ 46L398 ; 0x34184A56
0x34184A44: 9804 LDR R0, [SP, #16]
0x34184A46: F8D0 0110 LDR.W R0, [R0, #0x0110]
0x34184A4A: F641 012C MOVW R1, #0x182C
0x34184A4E: F2C0 7105 MOVT R1, #0x0705
0x34184A52: 4288 CMP R0, R1
0x34184A54: D100 BNE 46L399 ; 0x34184A58
.L398:
0x34184A56: E007 B 46L400 ; 0x34184A68
.L399:
0x34184A58: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34184A5C: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34184A60: F240 41CC MOVW R1, #0x04CC
0x34184A64: F008 F964 BL assert_failed ; 0x3418CD30
.L400:
0x34184A68: 9804 LDR R0, [SP, #16]
0x34184A6A: F8D0 0110 LDR.W R0, [R0, #0x0110]
0x34184A6E: F641 012C MOVW R1, #0x182C
0x34184A72: F2C0 7102 MOVT R1, #0x0702
0x34184A76: 4288 CMP R0, R1
0x34184A78: D144 BNE 46L406 ; 0x34184B04
0x34184A7A: 9804 LDR R0, [SP, #16]
0x34184A7C: 6F80 LDR R0, [R0, #120]
0x34184A7E: B170 CBZ R0, .L401 ; 0x34184A9E
0x34184A80: 9804 LDR R0, [SP, #16]
0x34184A82: 6F80 LDR R0, [R0, #120]
0x34184A84: F1B0 5F80 CMP.W R0, #0x10000000
0x34184A88: D009 BEQ 46L401 ; 0x34184A9E
0x34184A8A: 9804 LDR R0, [SP, #16]
0x34184A8C: 6F80 LDR R0, [R0, #120]
0x34184A8E: F1B0 5F00 CMP.W R0, #0x20000000
0x34184A92: D004 BEQ 46L401 ; 0x34184A9E
0x34184A94: 9804 LDR R0, [SP, #16]
0x34184A96: 6F80 LDR R0, [R0, #120]
0x34184A98: F1B0 5F40 CMP.W R0, #0x30000000
0x34184A9C: D100 BNE 46L402 ; 0x34184AA0
.L401:
0x34184A9E: E007 B 46L403 ; 0x34184AB0
.L402:
0x34184AA0: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34184AA4: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34184AA8: F240 41D1 MOVW R1, #0x04D1
0x34184AAC: F008 F940 BL assert_failed ; 0x3418CD30
.L403:
0x34184AB0: 9804 LDR R0, [SP, #16]
0x34184AB2: 6FC0 LDR R0, [R0, #124]
0x34184AB4: B128 CBZ R0, .L404 ; 0x34184AC2
0x34184AB6: 9804 LDR R0, [SP, #16]
0x34184AB8: 6FC0 LDR R0, [R0, #124]
0x34184ABA: F5B0 7F80 CMP.W R0, #0x0100
0x34184ABE: D800 BHI 46L404 ; 0x34184AC2
0x34184AC0: E007 B 46L405 ; 0x34184AD2
.L404:
0x34184AC2: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34184AC6: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34184ACA: F240 41D2 MOVW R1, #0x04D2
0x34184ACE: F008 F92F BL assert_failed ; 0x3418CD30
.L405:
0x34184AD2: F248 01FC MOVW R1, #0x80FC
0x34184AD6: F2C5 6102 MOVT R1, #0x5602
0x34184ADA: 6808 LDR R0, [R1]
0x34184ADC: F64F 72FF MOVW R2, #0xFFFF
0x34184AE0: F6CC 7200 MOVT R2, #0xCF00
0x34184AE4: 4010 ANDS R0, R2
0x34184AE6: 9B04 LDR R3, [SP, #16]
0x34184AE8: 6F9A LDR R2, [R3, #120]
0x34184AEA: F8D3 C07C LDR.W R12, [R3, #124]
0x34184AEE: 2300 MOVS R3, #0
0x34184AF0: F6CF 73FF MOVT R3, #0xFFFF
0x34184AF4: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34184AF8: 431A ORRS R2, R3
0x34184AFA: 4310 ORRS R0, R2
0x34184AFC: 6008 STR R0, [R1]
0x34184AFE: F002 FF75 BL LL_RCC_IC15_Enable.59 ; 0x341879EC
0x34184B02: E00B B 46L407 ; 0x34184B1C
.L406:
0x34184B04: 9804 LDR R0, [SP, #16]
0x34184B06: F8D0 0110 LDR.W R0, [R0, #0x0110]
0x34184B0A: F641 012C MOVW R1, #0x182C
0x34184B0E: F2C0 7101 MOVT R1, #0x0701
0x34184B12: 4288 CMP R0, R1
0x34184B14: D102 BNE 46L407 ; 0x34184B1C
0x34184B16: F00A FBED BL LL_RCC_CLKP_Enable ; 0x3418F2F4
0x34184B1A: E7FF B 46L407 ; 0x34184B1C
.L407:
0x34184B1C: 9804 LDR R0, [SP, #16]
0x34184B1E: F8D0 0110 LDR.W R0, [R0, #0x0110]
0x34184B22: F003 F839 BL LL_RCC_SetLPTIMClockSource ; 0x34187B98
.L408:
0x34184B26: 9804 LDR R0, [SP, #16]
0x34184B28: 7880 LDRB R0, [R0, #2]
0x34184B2A: 0600 LSLS R0, R0, #24
0x34184B2C: 2800 CMP R0, #0
0x34184B2E: F140 80D5 BPL.W 46L425 ; 0x34184CDC
0x34184B32: 9804 LDR R0, [SP, #16]
0x34184B34: F8D0 0114 LDR.W R0, [R0, #0x0114]
0x34184B38: B318 CBZ R0, .L409 ; 0x34184B82
0x34184B3A: 9804 LDR R0, [SP, #16]
0x34184B3C: F8D0 0114 LDR.W R0, [R0, #0x0114]
0x34184B40: F5B0 7F80 CMP.W R0, #0x0100
0x34184B44: D01D BEQ 46L409 ; 0x34184B82
0x34184B46: 9804 LDR R0, [SP, #16]
0x34184B48: F8D0 0114 LDR.W R0, [R0, #0x0114]
0x34184B4C: F5B0 7F00 CMP.W R0, #0x0200
0x34184B50: D017 BEQ 46L409 ; 0x34184B82
0x34184B52: 9804 LDR R0, [SP, #16]
0x34184B54: F8D0 0114 LDR.W R0, [R0, #0x0114]
0x34184B58: F5B0 7F40 CMP.W R0, #0x0300
0x34184B5C: D011 BEQ 46L409 ; 0x34184B82
0x34184B5E: 9804 LDR R0, [SP, #16]
0x34184B60: F8D0 0114 LDR.W R0, [R0, #0x0114]
0x34184B64: F5B0 6F80 CMP.W R0, #0x0400
0x34184B68: D00B BEQ 46L409 ; 0x34184B82
0x34184B6A: 9804 LDR R0, [SP, #16]
0x34184B6C: F8D0 0114 LDR.W R0, [R0, #0x0114]
0x34184B70: F5B0 6FA0 CMP.W R0, #0x0500
0x34184B74: D005 BEQ 46L409 ; 0x34184B82
0x34184B76: 9804 LDR R0, [SP, #16]
0x34184B78: F8D0 0114 LDR.W R0, [R0, #0x0114]
0x34184B7C: F5B0 6FC0 CMP.W R0, #0x0600
0x34184B80: D100 BNE 46L410 ; 0x34184B84
.L409:
0x34184B82: E007 B 46L411 ; 0x34184B94
.L410:
0x34184B84: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34184B88: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34184B8C: F240 41EC MOVW R1, #0x04EC
0x34184B90: F008 F8CE BL assert_failed ; 0x3418CD30
.L411:
0x34184B94: 9804 LDR R0, [SP, #16]
0x34184B96: F8D0 0114 LDR.W R0, [R0, #0x0114]
0x34184B9A: F5B0 7F00 CMP.W R0, #0x0200
0x34184B9E: D144 BNE 46L417 ; 0x34184C2A
0x34184BA0: 9804 LDR R0, [SP, #16]
0x34184BA2: 6C80 LDR R0, [R0, #72]
0x34184BA4: B170 CBZ R0, .L412 ; 0x34184BC4
0x34184BA6: 9804 LDR R0, [SP, #16]
0x34184BA8: 6C80 LDR R0, [R0, #72]
0x34184BAA: F1B0 5F80 CMP.W R0, #0x10000000
0x34184BAE: D009 BEQ 46L412 ; 0x34184BC4
0x34184BB0: 9804 LDR R0, [SP, #16]
0x34184BB2: 6C80 LDR R0, [R0, #72]
0x34184BB4: F1B0 5F00 CMP.W R0, #0x20000000
0x34184BB8: D004 BEQ 46L412 ; 0x34184BC4
0x34184BBA: 9804 LDR R0, [SP, #16]
0x34184BBC: 6C80 LDR R0, [R0, #72]
0x34184BBE: F1B0 5F40 CMP.W R0, #0x30000000
0x34184BC2: D100 BNE 46L413 ; 0x34184BC6
.L412:
0x34184BC4: E007 B 46L414 ; 0x34184BD6
.L413:
0x34184BC6: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34184BCA: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34184BCE: F240 41F1 MOVW R1, #0x04F1
0x34184BD2: F008 F8AD BL assert_failed ; 0x3418CD30
.L414:
0x34184BD6: 9804 LDR R0, [SP, #16]
0x34184BD8: 6CC0 LDR R0, [R0, #76]
0x34184BDA: B128 CBZ R0, .L415 ; 0x34184BE8
0x34184BDC: 9804 LDR R0, [SP, #16]
0x34184BDE: 6CC0 LDR R0, [R0, #76]
0x34184BE0: F5B0 7F80 CMP.W R0, #0x0100
0x34184BE4: D800 BHI 46L415 ; 0x34184BE8
0x34184BE6: E007 B 46L416 ; 0x34184BF8
.L415:
0x34184BE8: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34184BEC: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34184BF0: F240 41F2 MOVW R1, #0x04F2
0x34184BF4: F008 F89C BL assert_failed ; 0x3418CD30
.L416:
0x34184BF8: F248 01E4 MOVW R1, #0x80E4
0x34184BFC: F2C5 6102 MOVT R1, #0x5602
0x34184C00: 6808 LDR R0, [R1]
0x34184C02: F64F 72FF MOVW R2, #0xFFFF
0x34184C06: F6CC 7200 MOVT R2, #0xCF00
0x34184C0A: 4010 ANDS R0, R2
0x34184C0C: 9B04 LDR R3, [SP, #16]
0x34184C0E: 6C9A LDR R2, [R3, #72]
0x34184C10: F8D3 C04C LDR.W R12, [R3, #76]
0x34184C14: 2300 MOVS R3, #0
0x34184C16: F6CF 73FF MOVT R3, #0xFFFF
0x34184C1A: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34184C1E: 431A ORRS R2, R3
0x34184C20: 4310 ORRS R0, R2
0x34184C22: 6008 STR R0, [R1]
0x34184C24: F002 FFC0 BL LL_RCC_IC9_Enable ; 0x34187BA8
0x34184C28: E053 B 46L424 ; 0x34184CD2
.L417:
0x34184C2A: 9804 LDR R0, [SP, #16]
0x34184C2C: F8D0 0114 LDR.W R0, [R0, #0x0114]
0x34184C30: F5B0 7F40 CMP.W R0, #0x0300
0x34184C34: D144 BNE 46L423 ; 0x34184CC0
0x34184C36: 9804 LDR R0, [SP, #16]
0x34184C38: 6F00 LDR R0, [R0, #112]
0x34184C3A: B170 CBZ R0, .L418 ; 0x34184C5A
0x34184C3C: 9804 LDR R0, [SP, #16]
0x34184C3E: 6F00 LDR R0, [R0, #112]
0x34184C40: F1B0 5F80 CMP.W R0, #0x10000000
0x34184C44: D009 BEQ 46L418 ; 0x34184C5A
0x34184C46: 9804 LDR R0, [SP, #16]
0x34184C48: 6F00 LDR R0, [R0, #112]
0x34184C4A: F1B0 5F00 CMP.W R0, #0x20000000
0x34184C4E: D004 BEQ 46L418 ; 0x34184C5A
0x34184C50: 9804 LDR R0, [SP, #16]
0x34184C52: 6F00 LDR R0, [R0, #112]
0x34184C54: F1B0 5F40 CMP.W R0, #0x30000000
0x34184C58: D100 BNE 46L419 ; 0x34184C5C
.L418:
0x34184C5A: E007 B 46L420 ; 0x34184C6C
.L419:
0x34184C5C: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34184C60: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34184C64: F240 41FE MOVW R1, #0x04FE
0x34184C68: F008 F862 BL assert_failed ; 0x3418CD30
.L420:
0x34184C6C: 9804 LDR R0, [SP, #16]
0x34184C6E: 6F40 LDR R0, [R0, #116]
0x34184C70: B128 CBZ R0, .L421 ; 0x34184C7E
0x34184C72: 9804 LDR R0, [SP, #16]
0x34184C74: 6F40 LDR R0, [R0, #116]
0x34184C76: F5B0 7F80 CMP.W R0, #0x0100
0x34184C7A: D800 BHI 46L421 ; 0x34184C7E
0x34184C7C: E007 B 46L422 ; 0x34184C8E
.L421:
0x34184C7E: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34184C82: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34184C86: F240 41FF MOVW R1, #0x04FF
0x34184C8A: F008 F851 BL assert_failed ; 0x3418CD30
.L422:
0x34184C8E: F248 01F8 MOVW R1, #0x80F8
0x34184C92: F2C5 6102 MOVT R1, #0x5602
0x34184C96: 6808 LDR R0, [R1]
0x34184C98: F64F 72FF MOVW R2, #0xFFFF
0x34184C9C: F6CC 7200 MOVT R2, #0xCF00
0x34184CA0: 4010 ANDS R0, R2
0x34184CA2: 9B04 LDR R3, [SP, #16]
0x34184CA4: 6F1A LDR R2, [R3, #112]
0x34184CA6: F8D3 C074 LDR.W R12, [R3, #116]
0x34184CAA: 2300 MOVS R3, #0
0x34184CAC: F6CF 73FF MOVT R3, #0xFFFF
0x34184CB0: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34184CB4: 431A ORRS R2, R3
0x34184CB6: 4310 ORRS R0, R2
0x34184CB8: 6008 STR R0, [R1]
0x34184CBA: F002 FF7D BL LL_RCC_IC14_Enable ; 0x34187BB8
0x34184CBE: E008 B 46L424 ; 0x34184CD2
.L423:
0x34184CC0: 9804 LDR R0, [SP, #16]
0x34184CC2: F8D0 0114 LDR.W R0, [R0, #0x0114]
0x34184CC6: F5B0 7F80 CMP.W R0, #0x0100
0x34184CCA: D102 BNE 46L424 ; 0x34184CD2
0x34184CCC: F00A FB12 BL LL_RCC_CLKP_Enable ; 0x3418F2F4
0x34184CD0: E7FF B 46L424 ; 0x34184CD2
.L424:
0x34184CD2: 9804 LDR R0, [SP, #16]
0x34184CD4: F8D0 0114 LDR.W R0, [R0, #0x0114]
0x34184CD8: F002 FF76 BL LL_RCC_SetLPUARTClockSource ; 0x34187BC8
.L425:
0x34184CDC: 9804 LDR R0, [SP, #16]
0x34184CDE: 78C0 LDRB R0, [R0, #3]
0x34184CE0: 07C0 LSLS R0, R0, #31
0x34184CE2: 2800 CMP R0, #0
0x34184CE4: D07E BEQ 46L436 ; 0x34184DE4
0x34184CE6: 9804 LDR R0, [SP, #16]
0x34184CE8: F8D0 0118 LDR.W R0, [R0, #0x0118]
0x34184CEC: B188 CBZ R0, .L426 ; 0x34184D12
0x34184CEE: 9804 LDR R0, [SP, #16]
0x34184CF0: F8D0 0118 LDR.W R0, [R0, #0x0118]
0x34184CF4: F1B0 7F80 CMP.W R0, #0x01000000
0x34184CF8: D00B BEQ 46L426 ; 0x34184D12
0x34184CFA: 9804 LDR R0, [SP, #16]
0x34184CFC: F8D0 0118 LDR.W R0, [R0, #0x0118]
0x34184D00: F1B0 7F00 CMP.W R0, #0x02000000
0x34184D04: D005 BEQ 46L426 ; 0x34184D12
0x34184D06: 9804 LDR R0, [SP, #16]
0x34184D08: F8D0 0118 LDR.W R0, [R0, #0x0118]
0x34184D0C: F1B0 7F40 CMP.W R0, #0x03000000
0x34184D10: D100 BNE 46L427 ; 0x34184D14
.L426:
0x34184D12: E007 B 46L428 ; 0x34184D24
.L427:
0x34184D14: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34184D18: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34184D1C: F240 5119 MOVW R1, #0x0519
0x34184D20: F008 F806 BL assert_failed ; 0x3418CD30
.L428:
0x34184D24: 9804 LDR R0, [SP, #16]
0x34184D26: F8D0 0118 LDR.W R0, [R0, #0x0118]
0x34184D2A: F1B0 7F00 CMP.W R0, #0x02000000
0x34184D2E: D14B BNE 46L434 ; 0x34184DC8
0x34184D30: 9804 LDR R0, [SP, #16]
0x34184D32: F8D0 0080 LDR.W R0, [R0, #128]
0x34184D36: B188 CBZ R0, .L429 ; 0x34184D5C
0x34184D38: 9804 LDR R0, [SP, #16]
0x34184D3A: F8D0 0080 LDR.W R0, [R0, #128]
0x34184D3E: F1B0 5F80 CMP.W R0, #0x10000000
0x34184D42: D00B BEQ 46L429 ; 0x34184D5C
0x34184D44: 9804 LDR R0, [SP, #16]
0x34184D46: F8D0 0080 LDR.W R0, [R0, #128]
0x34184D4A: F1B0 5F00 CMP.W R0, #0x20000000
0x34184D4E: D005 BEQ 46L429 ; 0x34184D5C
0x34184D50: 9804 LDR R0, [SP, #16]
0x34184D52: F8D0 0080 LDR.W R0, [R0, #128]
0x34184D56: F1B0 5F40 CMP.W R0, #0x30000000
0x34184D5A: D100 BNE 46L430 ; 0x34184D5E
.L429:
0x34184D5C: E007 B 46L431 ; 0x34184D6E
.L430:
0x34184D5E: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34184D62: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34184D66: F240 511E MOVW R1, #0x051E
0x34184D6A: F007 FFE1 BL assert_failed ; 0x3418CD30
.L431:
0x34184D6E: 9804 LDR R0, [SP, #16]
0x34184D70: F8D0 0084 LDR.W R0, [R0, #132]
0x34184D74: B130 CBZ R0, .L432 ; 0x34184D84
0x34184D76: 9804 LDR R0, [SP, #16]
0x34184D78: F8D0 0084 LDR.W R0, [R0, #132]
0x34184D7C: F5B0 7F80 CMP.W R0, #0x0100
0x34184D80: D800 BHI 46L432 ; 0x34184D84
0x34184D82: E007 B 46L433 ; 0x34184D94
.L432:
0x34184D84: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34184D88: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34184D8C: F240 511F MOVW R1, #0x051F
0x34184D90: F007 FFCE BL assert_failed ; 0x3418CD30
.L433:
0x34184D94: F248 1100 MOVW R1, #0x8100
0x34184D98: F2C5 6102 MOVT R1, #0x5602
0x34184D9C: 6808 LDR R0, [R1]
0x34184D9E: F64F 72FF MOVW R2, #0xFFFF
0x34184DA2: F6CC 7200 MOVT R2, #0xCF00
0x34184DA6: 4010 ANDS R0, R2
0x34184DA8: 9B04 LDR R3, [SP, #16]
0x34184DAA: F8D3 2080 LDR.W R2, [R3, #128]
0x34184DAE: F8D3 C084 LDR.W R12, [R3, #132]
0x34184DB2: 2300 MOVS R3, #0
0x34184DB4: F6CF 73FF MOVT R3, #0xFFFF
0x34184DB8: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34184DBC: 431A ORRS R2, R3
0x34184DBE: 4310 ORRS R0, R2
0x34184DC0: 6008 STR R0, [R1]
0x34184DC2: F002 FF0F BL LL_RCC_IC16_Enable ; 0x34187BE4
0x34184DC6: E008 B 46L435 ; 0x34184DDA
.L434:
0x34184DC8: 9804 LDR R0, [SP, #16]
0x34184DCA: F8D0 0118 LDR.W R0, [R0, #0x0118]
0x34184DCE: F1B0 7F80 CMP.W R0, #0x01000000
0x34184DD2: D102 BNE 46L435 ; 0x34184DDA
0x34184DD4: F00A FA8E BL LL_RCC_CLKP_Enable ; 0x3418F2F4
0x34184DD8: E7FF B 46L435 ; 0x34184DDA
.L435:
0x34184DDA: 9804 LDR R0, [SP, #16]
0x34184DDC: F8D0 0118 LDR.W R0, [R0, #0x0118]
0x34184DE0: F002 FF08 BL LL_RCC_SetLTDCClockSource ; 0x34187BF4
.L436:
0x34184DE4: 9804 LDR R0, [SP, #16]
0x34184DE6: 78C0 LDRB R0, [R0, #3]
0x34184DE8: 0780 LSLS R0, R0, #30
0x34184DEA: 2800 CMP R0, #0
0x34184DEC: F140 80DB BPL.W 46L453 ; 0x34184FA6
0x34184DF0: 9804 LDR R0, [SP, #16]
0x34184DF2: F8D0 011C LDR.W R0, [R0, #0x011C]
0x34184DF6: B348 CBZ R0, .L437 ; 0x34184E4C
0x34184DF8: 9804 LDR R0, [SP, #16]
0x34184DFA: F8D0 011C LDR.W R0, [R0, #0x011C]
0x34184DFE: F5B0 3F80 CMP.W R0, #0x010000
0x34184E02: D023 BEQ 46L437 ; 0x34184E4C
0x34184E04: 9804 LDR R0, [SP, #16]
0x34184E06: F8D0 011C LDR.W R0, [R0, #0x011C]
0x34184E0A: F5B0 3F00 CMP.W R0, #0x020000
0x34184E0E: D01D BEQ 46L437 ; 0x34184E4C
0x34184E10: 9804 LDR R0, [SP, #16]
0x34184E12: F8D0 011C LDR.W R0, [R0, #0x011C]
0x34184E16: F5B0 3F40 CMP.W R0, #0x030000
0x34184E1A: D017 BEQ 46L437 ; 0x34184E4C
0x34184E1C: 9804 LDR R0, [SP, #16]
0x34184E1E: F8D0 011C LDR.W R0, [R0, #0x011C]
0x34184E22: F5B0 2F80 CMP.W R0, #0x040000
0x34184E26: D011 BEQ 46L437 ; 0x34184E4C
0x34184E28: 9804 LDR R0, [SP, #16]
0x34184E2A: F8D0 011C LDR.W R0, [R0, #0x011C]
0x34184E2E: F5B0 2FA0 CMP.W R0, #0x050000
0x34184E32: D00B BEQ 46L437 ; 0x34184E4C
0x34184E34: 9804 LDR R0, [SP, #16]
0x34184E36: F8D0 011C LDR.W R0, [R0, #0x011C]
0x34184E3A: F5B0 2FC0 CMP.W R0, #0x060000
0x34184E3E: D005 BEQ 46L437 ; 0x34184E4C
0x34184E40: 9804 LDR R0, [SP, #16]
0x34184E42: F8D0 011C LDR.W R0, [R0, #0x011C]
0x34184E46: F5B0 2FE0 CMP.W R0, #0x070000
0x34184E4A: D100 BNE 46L438 ; 0x34184E4E
.L437:
0x34184E4C: E007 B 46L439 ; 0x34184E5E
.L438:
0x34184E4E: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34184E52: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34184E56: F240 5139 MOVW R1, #0x0539
0x34184E5A: F007 FF69 BL assert_failed ; 0x3418CD30
.L439:
0x34184E5E: 9804 LDR R0, [SP, #16]
0x34184E60: F8D0 011C LDR.W R0, [R0, #0x011C]
0x34184E64: F5B0 3F00 CMP.W R0, #0x020000
0x34184E68: D144 BNE 46L445 ; 0x34184EF4
0x34184E6A: 9804 LDR R0, [SP, #16]
0x34184E6C: 6B80 LDR R0, [R0, #56]
0x34184E6E: B170 CBZ R0, .L440 ; 0x34184E8E
0x34184E70: 9804 LDR R0, [SP, #16]
0x34184E72: 6B80 LDR R0, [R0, #56]
0x34184E74: F1B0 5F80 CMP.W R0, #0x10000000
0x34184E78: D009 BEQ 46L440 ; 0x34184E8E
0x34184E7A: 9804 LDR R0, [SP, #16]
0x34184E7C: 6B80 LDR R0, [R0, #56]
0x34184E7E: F1B0 5F00 CMP.W R0, #0x20000000
0x34184E82: D004 BEQ 46L440 ; 0x34184E8E
0x34184E84: 9804 LDR R0, [SP, #16]
0x34184E86: 6B80 LDR R0, [R0, #56]
0x34184E88: F1B0 5F40 CMP.W R0, #0x30000000
0x34184E8C: D100 BNE 46L441 ; 0x34184E90
.L440:
0x34184E8E: E007 B 46L442 ; 0x34184EA0
.L441:
0x34184E90: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34184E94: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34184E98: F240 513E MOVW R1, #0x053E
0x34184E9C: F007 FF48 BL assert_failed ; 0x3418CD30
.L442:
0x34184EA0: 9804 LDR R0, [SP, #16]
0x34184EA2: 6BC0 LDR R0, [R0, #60]
0x34184EA4: B128 CBZ R0, .L443 ; 0x34184EB2
0x34184EA6: 9804 LDR R0, [SP, #16]
0x34184EA8: 6BC0 LDR R0, [R0, #60]
0x34184EAA: F5B0 7F80 CMP.W R0, #0x0100
0x34184EAE: D800 BHI 46L443 ; 0x34184EB2
0x34184EB0: E007 B 46L444 ; 0x34184EC2
.L443:
0x34184EB2: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34184EB6: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34184EBA: F240 513F MOVW R1, #0x053F
0x34184EBE: F007 FF37 BL assert_failed ; 0x3418CD30
.L444:
0x34184EC2: F248 01DC MOVW R1, #0x80DC
0x34184EC6: F2C5 6102 MOVT R1, #0x5602
0x34184ECA: 6808 LDR R0, [R1]
0x34184ECC: F64F 72FF MOVW R2, #0xFFFF
0x34184ED0: F6CC 7200 MOVT R2, #0xCF00
0x34184ED4: 4010 ANDS R0, R2
0x34184ED6: 9B04 LDR R3, [SP, #16]
0x34184ED8: 6B9A LDR R2, [R3, #56]
0x34184EDA: F8D3 C03C LDR.W R12, [R3, #60]
0x34184EDE: 2300 MOVS R3, #0
0x34184EE0: F6CF 73FF MOVT R3, #0xFFFF
0x34184EE4: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34184EE8: 431A ORRS R2, R3
0x34184EEA: 4310 ORRS R0, R2
0x34184EEC: 6008 STR R0, [R1]
0x34184EEE: F00A FA09 BL LL_RCC_IC7_Enable ; 0x3418F304
0x34184EF2: E053 B 46L452 ; 0x34184F9C
.L445:
0x34184EF4: 9804 LDR R0, [SP, #16]
0x34184EF6: F8D0 011C LDR.W R0, [R0, #0x011C]
0x34184EFA: F5B0 3F40 CMP.W R0, #0x030000
0x34184EFE: D144 BNE 46L451 ; 0x34184F8A
0x34184F00: 9804 LDR R0, [SP, #16]
0x34184F02: 6C00 LDR R0, [R0, #64]
0x34184F04: B170 CBZ R0, .L446 ; 0x34184F24
0x34184F06: 9804 LDR R0, [SP, #16]
0x34184F08: 6C00 LDR R0, [R0, #64]
0x34184F0A: F1B0 5F80 CMP.W R0, #0x10000000
0x34184F0E: D009 BEQ 46L446 ; 0x34184F24
0x34184F10: 9804 LDR R0, [SP, #16]
0x34184F12: 6C00 LDR R0, [R0, #64]
0x34184F14: F1B0 5F00 CMP.W R0, #0x20000000
0x34184F18: D004 BEQ 46L446 ; 0x34184F24
0x34184F1A: 9804 LDR R0, [SP, #16]
0x34184F1C: 6C00 LDR R0, [R0, #64]
0x34184F1E: F1B0 5F40 CMP.W R0, #0x30000000
0x34184F22: D100 BNE 46L447 ; 0x34184F26
.L446:
0x34184F24: E007 B 46L448 ; 0x34184F36
.L447:
0x34184F26: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34184F2A: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34184F2E: F240 514B MOVW R1, #0x054B
0x34184F32: F007 FEFD BL assert_failed ; 0x3418CD30
.L448:
0x34184F36: 9804 LDR R0, [SP, #16]
0x34184F38: 6C40 LDR R0, [R0, #68]
0x34184F3A: B128 CBZ R0, .L449 ; 0x34184F48
0x34184F3C: 9804 LDR R0, [SP, #16]
0x34184F3E: 6C40 LDR R0, [R0, #68]
0x34184F40: F5B0 7F80 CMP.W R0, #0x0100
0x34184F44: D800 BHI 46L449 ; 0x34184F48
0x34184F46: E007 B 46L450 ; 0x34184F58
.L449:
0x34184F48: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34184F4C: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34184F50: F240 514C MOVW R1, #0x054C
0x34184F54: F007 FEEC BL assert_failed ; 0x3418CD30
.L450:
0x34184F58: F248 01E0 MOVW R1, #0x80E0
0x34184F5C: F2C5 6102 MOVT R1, #0x5602
0x34184F60: 6808 LDR R0, [R1]
0x34184F62: F64F 72FF MOVW R2, #0xFFFF
0x34184F66: F6CC 7200 MOVT R2, #0xCF00
0x34184F6A: 4010 ANDS R0, R2
0x34184F6C: 9B04 LDR R3, [SP, #16]
0x34184F6E: 6C1A LDR R2, [R3, #64]
0x34184F70: F8D3 C044 LDR.W R12, [R3, #68]
0x34184F74: 2300 MOVS R3, #0
0x34184F76: F6CF 73FF MOVT R3, #0xFFFF
0x34184F7A: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34184F7E: 431A ORRS R2, R3
0x34184F80: 4310 ORRS R0, R2
0x34184F82: 6008 STR R0, [R1]
0x34184F84: F00A F9C6 BL LL_RCC_IC8_Enable ; 0x3418F314
0x34184F88: E008 B 46L452 ; 0x34184F9C
.L451:
0x34184F8A: 9804 LDR R0, [SP, #16]
0x34184F8C: F8D0 011C LDR.W R0, [R0, #0x011C]
0x34184F90: F5B0 3F80 CMP.W R0, #0x010000
0x34184F94: D102 BNE 46L452 ; 0x34184F9C
0x34184F96: F00A F9AD BL LL_RCC_CLKP_Enable ; 0x3418F2F4
0x34184F9A: E7FF B 46L452 ; 0x34184F9C
.L452:
0x34184F9C: 9804 LDR R0, [SP, #16]
0x34184F9E: F8D0 011C LDR.W R0, [R0, #0x011C]
0x34184FA2: F002 FE35 BL LL_RCC_SetMDFClockSource ; 0x34187C10
.L453:
0x34184FA6: 9804 LDR R0, [SP, #16]
0x34184FA8: 78C0 LDRB R0, [R0, #3]
0x34184FAA: 0740 LSLS R0, R0, #29
0x34184FAC: 2800 CMP R0, #0
0x34184FAE: D579 BPL 46L464 ; 0x341850A4
0x34184FB0: 9804 LDR R0, [SP, #16]
0x34184FB2: F8D0 0120 LDR.W R0, [R0, #0x0120]
0x34184FB6: B170 CBZ R0, .L454 ; 0x34184FD6
0x34184FB8: 9804 LDR R0, [SP, #16]
0x34184FBA: F8D0 0120 LDR.W R0, [R0, #0x0120]
0x34184FBE: 2810 CMP R0, #16
0x34184FC0: D009 BEQ 46L454 ; 0x34184FD6
0x34184FC2: 9804 LDR R0, [SP, #16]
0x34184FC4: F8D0 0120 LDR.W R0, [R0, #0x0120]
0x34184FC8: 2820 CMP R0, #32
0x34184FCA: D004 BEQ 46L454 ; 0x34184FD6
0x34184FCC: 9804 LDR R0, [SP, #16]
0x34184FCE: F8D0 0120 LDR.W R0, [R0, #0x0120]
0x34184FD2: 2830 CMP R0, #48
0x34184FD4: D100 BNE 46L455 ; 0x34184FD8
.L454:
0x34184FD6: E007 B 46L456 ; 0x34184FE8
.L455:
0x34184FD8: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34184FDC: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34184FE0: F240 5166 MOVW R1, #0x0566
0x34184FE4: F007 FEA4 BL assert_failed ; 0x3418CD30
.L456:
0x34184FE8: 9804 LDR R0, [SP, #16]
0x34184FEA: F8D0 0120 LDR.W R0, [R0, #0x0120]
0x34184FEE: 2820 CMP R0, #32
0x34184FF0: D14B BNE 46L462 ; 0x3418508A
0x34184FF2: 9804 LDR R0, [SP, #16]
0x34184FF4: F8D0 00A0 LDR.W R0, [R0, #160]
0x34184FF8: B188 CBZ R0, .L457 ; 0x3418501E
0x34184FFA: 9804 LDR R0, [SP, #16]
0x34184FFC: F8D0 00A0 LDR.W R0, [R0, #160]
0x34185000: F1B0 5F80 CMP.W R0, #0x10000000
0x34185004: D00B BEQ 46L457 ; 0x3418501E
0x34185006: 9804 LDR R0, [SP, #16]
0x34185008: F8D0 00A0 LDR.W R0, [R0, #160]
0x3418500C: F1B0 5F00 CMP.W R0, #0x20000000
0x34185010: D005 BEQ 46L457 ; 0x3418501E
0x34185012: 9804 LDR R0, [SP, #16]
0x34185014: F8D0 00A0 LDR.W R0, [R0, #160]
0x34185018: F1B0 5F40 CMP.W R0, #0x30000000
0x3418501C: D100 BNE 46L458 ; 0x34185020
.L457:
0x3418501E: E007 B 46L459 ; 0x34185030
.L458:
0x34185020: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34185024: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34185028: F240 516B MOVW R1, #0x056B
0x3418502C: F007 FE80 BL assert_failed ; 0x3418CD30
.L459:
0x34185030: 9804 LDR R0, [SP, #16]
0x34185032: F8D0 00A4 LDR.W R0, [R0, #164]
0x34185036: B130 CBZ R0, .L460 ; 0x34185046
0x34185038: 9804 LDR R0, [SP, #16]
0x3418503A: F8D0 00A4 LDR.W R0, [R0, #164]
0x3418503E: F5B0 7F80 CMP.W R0, #0x0100
0x34185042: D800 BHI 46L460 ; 0x34185046
0x34185044: E007 B 46L461 ; 0x34185056
.L460:
0x34185046: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x3418504A: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x3418504E: F240 516C MOVW R1, #0x056C
0x34185052: F007 FE6D BL assert_failed ; 0x3418CD30
.L461:
0x34185056: F248 1110 MOVW R1, #0x8110
0x3418505A: F2C5 6102 MOVT R1, #0x5602
0x3418505E: 6808 LDR R0, [R1]
0x34185060: F64F 72FF MOVW R2, #0xFFFF
0x34185064: F6CC 7200 MOVT R2, #0xCF00
0x34185068: 4010 ANDS R0, R2
0x3418506A: 9B04 LDR R3, [SP, #16]
0x3418506C: F8D3 20A0 LDR.W R2, [R3, #160]
0x34185070: F8D3 C0A4 LDR.W R12, [R3, #164]
0x34185074: 2300 MOVS R3, #0
0x34185076: F6CF 73FF MOVT R3, #0xFFFF
0x3418507A: EB03 430C ADD.W R3, R3, R12, LSL #16
0x3418507E: 431A ORRS R2, R3
0x34185080: 4310 ORRS R0, R2
0x34185082: 6008 STR R0, [R1]
0x34185084: F002 FCC2 BL LL_RCC_IC20_Enable.60 ; 0x34187A0C
0x34185088: E007 B 46L463 ; 0x3418509A
.L462:
0x3418508A: 9804 LDR R0, [SP, #16]
0x3418508C: F8D0 0120 LDR.W R0, [R0, #0x0120]
0x34185090: 2810 CMP R0, #16
0x34185092: D102 BNE 46L463 ; 0x3418509A
0x34185094: F00A F92E BL LL_RCC_CLKP_Enable ; 0x3418F2F4
0x34185098: E7FF B 46L463 ; 0x3418509A
.L463:
0x3418509A: 9804 LDR R0, [SP, #16]
0x3418509C: F8D0 0120 LDR.W R0, [R0, #0x0120]
0x341850A0: F002 FDC4 BL LL_RCC_SetPSSIClockSource ; 0x34187C2C
.L464:
0x341850A4: 9804 LDR R0, [SP, #16]
0x341850A6: 78C0 LDRB R0, [R0, #3]
0x341850A8: 06C0 LSLS R0, R0, #27
0x341850AA: 2800 CMP R0, #0
0x341850AC: F140 80FE BPL.W 46L481 ; 0x341852AC
0x341850B0: 9804 LDR R0, [SP, #16]
0x341850B2: F8D0 0124 LDR.W R0, [R0, #0x0124]
0x341850B6: F241 4118 MOVW R1, #0x1418
0x341850BA: F2C0 7100 MOVT R1, #0x0700
0x341850BE: 4288 CMP R0, R1
0x341850C0: D03E BEQ 46L465 ; 0x34185140
0x341850C2: 9804 LDR R0, [SP, #16]
0x341850C4: F8D0 0124 LDR.W R0, [R0, #0x0124]
0x341850C8: F241 4118 MOVW R1, #0x1418
0x341850CC: F2C0 7101 MOVT R1, #0x0701
0x341850D0: 4288 CMP R0, R1
0x341850D2: D035 BEQ 46L465 ; 0x34185140
0x341850D4: 9804 LDR R0, [SP, #16]
0x341850D6: F8D0 0124 LDR.W R0, [R0, #0x0124]
0x341850DA: F241 4118 MOVW R1, #0x1418
0x341850DE: F2C0 7102 MOVT R1, #0x0702
0x341850E2: 4288 CMP R0, R1
0x341850E4: D02C BEQ 46L465 ; 0x34185140
0x341850E6: 9804 LDR R0, [SP, #16]
0x341850E8: F8D0 0124 LDR.W R0, [R0, #0x0124]
0x341850EC: F241 4118 MOVW R1, #0x1418
0x341850F0: F2C0 7103 MOVT R1, #0x0703
0x341850F4: 4288 CMP R0, R1
0x341850F6: D023 BEQ 46L465 ; 0x34185140
0x341850F8: 9804 LDR R0, [SP, #16]
0x341850FA: F8D0 0124 LDR.W R0, [R0, #0x0124]
0x341850FE: F241 4118 MOVW R1, #0x1418
0x34185102: F2C0 7104 MOVT R1, #0x0704
0x34185106: 4288 CMP R0, R1
0x34185108: D01A BEQ 46L465 ; 0x34185140
0x3418510A: 9804 LDR R0, [SP, #16]
0x3418510C: F8D0 0124 LDR.W R0, [R0, #0x0124]
0x34185110: F241 4118 MOVW R1, #0x1418
0x34185114: F2C0 7105 MOVT R1, #0x0705
0x34185118: 4288 CMP R0, R1
0x3418511A: D011 BEQ 46L465 ; 0x34185140
0x3418511C: 9804 LDR R0, [SP, #16]
0x3418511E: F8D0 0124 LDR.W R0, [R0, #0x0124]
0x34185122: F241 4118 MOVW R1, #0x1418
0x34185126: F2C0 7106 MOVT R1, #0x0706
0x3418512A: 4288 CMP R0, R1
0x3418512C: D008 BEQ 46L465 ; 0x34185140
0x3418512E: 9804 LDR R0, [SP, #16]
0x34185130: F8D0 0124 LDR.W R0, [R0, #0x0124]
0x34185134: F241 4118 MOVW R1, #0x1418
0x34185138: F2C0 7107 MOVT R1, #0x0707
0x3418513C: 4288 CMP R0, R1
0x3418513E: D100 BNE 46L466 ; 0x34185142
.L465:
0x34185140: E007 B 46L467 ; 0x34185152
.L466:
0x34185142: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34185146: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x3418514A: F240 5186 MOVW R1, #0x0586
0x3418514E: F007 FDEF BL assert_failed ; 0x3418CD30
.L467:
0x34185152: 9804 LDR R0, [SP, #16]
0x34185154: F8D0 0124 LDR.W R0, [R0, #0x0124]
0x34185158: F241 4118 MOVW R1, #0x1418
0x3418515C: F2C0 7102 MOVT R1, #0x0702
0x34185160: 4288 CMP R0, R1
0x34185162: D144 BNE 46L473 ; 0x341851EE
0x34185164: 9804 LDR R0, [SP, #16]
0x34185166: 6B80 LDR R0, [R0, #56]
0x34185168: B170 CBZ R0, .L468 ; 0x34185188
0x3418516A: 9804 LDR R0, [SP, #16]
0x3418516C: 6B80 LDR R0, [R0, #56]
0x3418516E: F1B0 5F80 CMP.W R0, #0x10000000
0x34185172: D009 BEQ 46L468 ; 0x34185188
0x34185174: 9804 LDR R0, [SP, #16]
0x34185176: 6B80 LDR R0, [R0, #56]
0x34185178: F1B0 5F00 CMP.W R0, #0x20000000
0x3418517C: D004 BEQ 46L468 ; 0x34185188
0x3418517E: 9804 LDR R0, [SP, #16]
0x34185180: 6B80 LDR R0, [R0, #56]
0x34185182: F1B0 5F40 CMP.W R0, #0x30000000
0x34185186: D100 BNE 46L469 ; 0x3418518A
.L468:
0x34185188: E007 B 46L470 ; 0x3418519A
.L469:
0x3418518A: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x3418518E: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34185192: F240 518B MOVW R1, #0x058B
0x34185196: F007 FDCB BL assert_failed ; 0x3418CD30
.L470:
0x3418519A: 9804 LDR R0, [SP, #16]
0x3418519C: 6BC0 LDR R0, [R0, #60]
0x3418519E: B128 CBZ R0, .L471 ; 0x341851AC
0x341851A0: 9804 LDR R0, [SP, #16]
0x341851A2: 6BC0 LDR R0, [R0, #60]
0x341851A4: F5B0 7F80 CMP.W R0, #0x0100
0x341851A8: D800 BHI 46L471 ; 0x341851AC
0x341851AA: E007 B 46L472 ; 0x341851BC
.L471:
0x341851AC: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341851B0: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341851B4: F240 518C MOVW R1, #0x058C
0x341851B8: F007 FDBA BL assert_failed ; 0x3418CD30
.L472:
0x341851BC: F248 01DC MOVW R1, #0x80DC
0x341851C0: F2C5 6102 MOVT R1, #0x5602
0x341851C4: 6808 LDR R0, [R1]
0x341851C6: F64F 72FF MOVW R2, #0xFFFF
0x341851CA: F6CC 7200 MOVT R2, #0xCF00
0x341851CE: 4010 ANDS R0, R2
0x341851D0: 9B04 LDR R3, [SP, #16]
0x341851D2: 6B9A LDR R2, [R3, #56]
0x341851D4: F8D3 C03C LDR.W R12, [R3, #60]
0x341851D8: 2300 MOVS R3, #0
0x341851DA: F6CF 73FF MOVT R3, #0xFFFF
0x341851DE: EB03 430C ADD.W R3, R3, R12, LSL #16
0x341851E2: 431A ORRS R2, R3
0x341851E4: 4310 ORRS R0, R2
0x341851E6: 6008 STR R0, [R1]
0x341851E8: F00A F88C BL LL_RCC_IC7_Enable ; 0x3418F304
0x341851EC: E059 B 46L480 ; 0x341852A2
.L473:
0x341851EE: 9804 LDR R0, [SP, #16]
0x341851F0: F8D0 0124 LDR.W R0, [R0, #0x0124]
0x341851F4: F241 4118 MOVW R1, #0x1418
0x341851F8: F2C0 7103 MOVT R1, #0x0703
0x341851FC: 4288 CMP R0, R1
0x341851FE: D144 BNE 46L479 ; 0x3418528A
0x34185200: 9804 LDR R0, [SP, #16]
0x34185202: 6C00 LDR R0, [R0, #64]
0x34185204: B170 CBZ R0, .L474 ; 0x34185224
0x34185206: 9804 LDR R0, [SP, #16]
0x34185208: 6C00 LDR R0, [R0, #64]
0x3418520A: F1B0 5F80 CMP.W R0, #0x10000000
0x3418520E: D009 BEQ 46L474 ; 0x34185224
0x34185210: 9804 LDR R0, [SP, #16]
0x34185212: 6C00 LDR R0, [R0, #64]
0x34185214: F1B0 5F00 CMP.W R0, #0x20000000
0x34185218: D004 BEQ 46L474 ; 0x34185224
0x3418521A: 9804 LDR R0, [SP, #16]
0x3418521C: 6C00 LDR R0, [R0, #64]
0x3418521E: F1B0 5F40 CMP.W R0, #0x30000000
0x34185222: D100 BNE 46L475 ; 0x34185226
.L474:
0x34185224: E007 B 46L476 ; 0x34185236
.L475:
0x34185226: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x3418522A: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x3418522E: F44F 61B3 MOV.W R1, #0x0598
0x34185232: F007 FD7D BL assert_failed ; 0x3418CD30
.L476:
0x34185236: 9804 LDR R0, [SP, #16]
0x34185238: 6C40 LDR R0, [R0, #68]
0x3418523A: B128 CBZ R0, .L477 ; 0x34185248
0x3418523C: 9804 LDR R0, [SP, #16]
0x3418523E: 6C40 LDR R0, [R0, #68]
0x34185240: F5B0 7F80 CMP.W R0, #0x0100
0x34185244: D800 BHI 46L477 ; 0x34185248
0x34185246: E007 B 46L478 ; 0x34185258
.L477:
0x34185248: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x3418524C: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34185250: F240 5199 MOVW R1, #0x0599
0x34185254: F007 FD6C BL assert_failed ; 0x3418CD30
.L478:
0x34185258: F248 01E0 MOVW R1, #0x80E0
0x3418525C: F2C5 6102 MOVT R1, #0x5602
0x34185260: 6808 LDR R0, [R1]
0x34185262: F64F 72FF MOVW R2, #0xFFFF
0x34185266: F6CC 7200 MOVT R2, #0xCF00
0x3418526A: 4010 ANDS R0, R2
0x3418526C: 9B04 LDR R3, [SP, #16]
0x3418526E: 6C1A LDR R2, [R3, #64]
0x34185270: F8D3 C044 LDR.W R12, [R3, #68]
0x34185274: 2300 MOVS R3, #0
0x34185276: F6CF 73FF MOVT R3, #0xFFFF
0x3418527A: EB03 430C ADD.W R3, R3, R12, LSL #16
0x3418527E: 431A ORRS R2, R3
0x34185280: 4310 ORRS R0, R2
0x34185282: 6008 STR R0, [R1]
0x34185284: F00A F846 BL LL_RCC_IC8_Enable ; 0x3418F314
0x34185288: E00B B 46L480 ; 0x341852A2
.L479:
0x3418528A: 9804 LDR R0, [SP, #16]
0x3418528C: F8D0 0124 LDR.W R0, [R0, #0x0124]
0x34185290: F241 4118 MOVW R1, #0x1418
0x34185294: F2C0 7101 MOVT R1, #0x0701
0x34185298: 4288 CMP R0, R1
0x3418529A: D102 BNE 46L480 ; 0x341852A2
0x3418529C: F00A F82A BL LL_RCC_CLKP_Enable ; 0x3418F2F4
0x341852A0: E7FF B 46L480 ; 0x341852A2
.L480:
0x341852A2: 9804 LDR R0, [SP, #16]
0x341852A4: F8D0 0124 LDR.W R0, [R0, #0x0124]
0x341852A8: F002 FCCE BL LL_RCC_SetSAIClockSource ; 0x34187C48
.L481:
0x341852AC: 9804 LDR R0, [SP, #16]
0x341852AE: 78C0 LDRB R0, [R0, #3]
0x341852B0: 0680 LSLS R0, R0, #26
0x341852B2: 2800 CMP R0, #0
0x341852B4: F140 80FE BPL.W 46L498 ; 0x341854B4
0x341852B8: 9804 LDR R0, [SP, #16]
0x341852BA: F8D0 0128 LDR.W R0, [R0, #0x0128]
0x341852BE: F641 0118 MOVW R1, #0x1818
0x341852C2: F2C0 7100 MOVT R1, #0x0700
0x341852C6: 4288 CMP R0, R1
0x341852C8: D03E BEQ 46L482 ; 0x34185348
0x341852CA: 9804 LDR R0, [SP, #16]
0x341852CC: F8D0 0128 LDR.W R0, [R0, #0x0128]
0x341852D0: F641 0118 MOVW R1, #0x1818
0x341852D4: F2C0 7101 MOVT R1, #0x0701
0x341852D8: 4288 CMP R0, R1
0x341852DA: D035 BEQ 46L482 ; 0x34185348
0x341852DC: 9804 LDR R0, [SP, #16]
0x341852DE: F8D0 0128 LDR.W R0, [R0, #0x0128]
0x341852E2: F641 0118 MOVW R1, #0x1818
0x341852E6: F2C0 7102 MOVT R1, #0x0702
0x341852EA: 4288 CMP R0, R1
0x341852EC: D02C BEQ 46L482 ; 0x34185348
0x341852EE: 9804 LDR R0, [SP, #16]
0x341852F0: F8D0 0128 LDR.W R0, [R0, #0x0128]
0x341852F4: F641 0118 MOVW R1, #0x1818
0x341852F8: F2C0 7103 MOVT R1, #0x0703
0x341852FC: 4288 CMP R0, R1
0x341852FE: D023 BEQ 46L482 ; 0x34185348
0x34185300: 9804 LDR R0, [SP, #16]
0x34185302: F8D0 0128 LDR.W R0, [R0, #0x0128]
0x34185306: F641 0118 MOVW R1, #0x1818
0x3418530A: F2C0 7104 MOVT R1, #0x0704
0x3418530E: 4288 CMP R0, R1
0x34185310: D01A BEQ 46L482 ; 0x34185348
0x34185312: 9804 LDR R0, [SP, #16]
0x34185314: F8D0 0128 LDR.W R0, [R0, #0x0128]
0x34185318: F641 0118 MOVW R1, #0x1818
0x3418531C: F2C0 7105 MOVT R1, #0x0705
0x34185320: 4288 CMP R0, R1
0x34185322: D011 BEQ 46L482 ; 0x34185348
0x34185324: 9804 LDR R0, [SP, #16]
0x34185326: F8D0 0128 LDR.W R0, [R0, #0x0128]
0x3418532A: F641 0118 MOVW R1, #0x1818
0x3418532E: F2C0 7106 MOVT R1, #0x0706
0x34185332: 4288 CMP R0, R1
0x34185334: D008 BEQ 46L482 ; 0x34185348
0x34185336: 9804 LDR R0, [SP, #16]
0x34185338: F8D0 0128 LDR.W R0, [R0, #0x0128]
0x3418533C: F641 0118 MOVW R1, #0x1818
0x34185340: F2C0 7107 MOVT R1, #0x0707
0x34185344: 4288 CMP R0, R1
0x34185346: D100 BNE 46L483 ; 0x3418534A
.L482:
0x34185348: E007 B 46L484 ; 0x3418535A
.L483:
0x3418534A: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x3418534E: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34185352: F240 51B3 MOVW R1, #0x05B3
0x34185356: F007 FCEB BL assert_failed ; 0x3418CD30
.L484:
0x3418535A: 9804 LDR R0, [SP, #16]
0x3418535C: F8D0 0128 LDR.W R0, [R0, #0x0128]
0x34185360: F641 0118 MOVW R1, #0x1818
0x34185364: F2C0 7102 MOVT R1, #0x0702
0x34185368: 4288 CMP R0, R1
0x3418536A: D144 BNE 46L490 ; 0x341853F6
0x3418536C: 9804 LDR R0, [SP, #16]
0x3418536E: 6B80 LDR R0, [R0, #56]
0x34185370: B170 CBZ R0, .L485 ; 0x34185390
0x34185372: 9804 LDR R0, [SP, #16]
0x34185374: 6B80 LDR R0, [R0, #56]
0x34185376: F1B0 5F80 CMP.W R0, #0x10000000
0x3418537A: D009 BEQ 46L485 ; 0x34185390
0x3418537C: 9804 LDR R0, [SP, #16]
0x3418537E: 6B80 LDR R0, [R0, #56]
0x34185380: F1B0 5F00 CMP.W R0, #0x20000000
0x34185384: D004 BEQ 46L485 ; 0x34185390
0x34185386: 9804 LDR R0, [SP, #16]
0x34185388: 6B80 LDR R0, [R0, #56]
0x3418538A: F1B0 5F40 CMP.W R0, #0x30000000
0x3418538E: D100 BNE 46L486 ; 0x34185392
.L485:
0x34185390: E007 B 46L487 ; 0x341853A2
.L486:
0x34185392: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34185396: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x3418539A: F44F 61B7 MOV.W R1, #0x05B8
0x3418539E: F007 FCC7 BL assert_failed ; 0x3418CD30
.L487:
0x341853A2: 9804 LDR R0, [SP, #16]
0x341853A4: 6BC0 LDR R0, [R0, #60]
0x341853A6: B128 CBZ R0, .L488 ; 0x341853B4
0x341853A8: 9804 LDR R0, [SP, #16]
0x341853AA: 6BC0 LDR R0, [R0, #60]
0x341853AC: F5B0 7F80 CMP.W R0, #0x0100
0x341853B0: D800 BHI 46L488 ; 0x341853B4
0x341853B2: E007 B 46L489 ; 0x341853C4
.L488:
0x341853B4: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341853B8: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341853BC: F240 51B9 MOVW R1, #0x05B9
0x341853C0: F007 FCB6 BL assert_failed ; 0x3418CD30
.L489:
0x341853C4: F248 01DC MOVW R1, #0x80DC
0x341853C8: F2C5 6102 MOVT R1, #0x5602
0x341853CC: 6808 LDR R0, [R1]
0x341853CE: F64F 72FF MOVW R2, #0xFFFF
0x341853D2: F6CC 7200 MOVT R2, #0xCF00
0x341853D6: 4010 ANDS R0, R2
0x341853D8: 9B04 LDR R3, [SP, #16]
0x341853DA: 6B9A LDR R2, [R3, #56]
0x341853DC: F8D3 C03C LDR.W R12, [R3, #60]
0x341853E0: 2300 MOVS R3, #0
0x341853E2: F6CF 73FF MOVT R3, #0xFFFF
0x341853E6: EB03 430C ADD.W R3, R3, R12, LSL #16
0x341853EA: 431A ORRS R2, R3
0x341853EC: 4310 ORRS R0, R2
0x341853EE: 6008 STR R0, [R1]
0x341853F0: F009 FF88 BL LL_RCC_IC7_Enable ; 0x3418F304
0x341853F4: E059 B 46L497 ; 0x341854AA
.L490:
0x341853F6: 9804 LDR R0, [SP, #16]
0x341853F8: F8D0 0128 LDR.W R0, [R0, #0x0128]
0x341853FC: F641 0118 MOVW R1, #0x1818
0x34185400: F2C0 7103 MOVT R1, #0x0703
0x34185404: 4288 CMP R0, R1
0x34185406: D144 BNE 46L496 ; 0x34185492
0x34185408: 9804 LDR R0, [SP, #16]
0x3418540A: 6C00 LDR R0, [R0, #64]
0x3418540C: B170 CBZ R0, .L491 ; 0x3418542C
0x3418540E: 9804 LDR R0, [SP, #16]
0x34185410: 6C00 LDR R0, [R0, #64]
0x34185412: F1B0 5F80 CMP.W R0, #0x10000000
0x34185416: D009 BEQ 46L491 ; 0x3418542C
0x34185418: 9804 LDR R0, [SP, #16]
0x3418541A: 6C00 LDR R0, [R0, #64]
0x3418541C: F1B0 5F00 CMP.W R0, #0x20000000
0x34185420: D004 BEQ 46L491 ; 0x3418542C
0x34185422: 9804 LDR R0, [SP, #16]
0x34185424: 6C00 LDR R0, [R0, #64]
0x34185426: F1B0 5F40 CMP.W R0, #0x30000000
0x3418542A: D100 BNE 46L492 ; 0x3418542E
.L491:
0x3418542C: E007 B 46L493 ; 0x3418543E
.L492:
0x3418542E: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34185432: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34185436: F240 51C5 MOVW R1, #0x05C5
0x3418543A: F007 FC79 BL assert_failed ; 0x3418CD30
.L493:
0x3418543E: 9804 LDR R0, [SP, #16]
0x34185440: 6C40 LDR R0, [R0, #68]
0x34185442: B128 CBZ R0, .L494 ; 0x34185450
0x34185444: 9804 LDR R0, [SP, #16]
0x34185446: 6C40 LDR R0, [R0, #68]
0x34185448: F5B0 7F80 CMP.W R0, #0x0100
0x3418544C: D800 BHI 46L494 ; 0x34185450
0x3418544E: E007 B 46L495 ; 0x34185460
.L494:
0x34185450: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34185454: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34185458: F240 51C6 MOVW R1, #0x05C6
0x3418545C: F007 FC68 BL assert_failed ; 0x3418CD30
.L495:
0x34185460: F248 01E0 MOVW R1, #0x80E0
0x34185464: F2C5 6102 MOVT R1, #0x5602
0x34185468: 6808 LDR R0, [R1]
0x3418546A: F64F 72FF MOVW R2, #0xFFFF
0x3418546E: F6CC 7200 MOVT R2, #0xCF00
0x34185472: 4010 ANDS R0, R2
0x34185474: 9B04 LDR R3, [SP, #16]
0x34185476: 6C1A LDR R2, [R3, #64]
0x34185478: F8D3 C044 LDR.W R12, [R3, #68]
0x3418547C: 2300 MOVS R3, #0
0x3418547E: F6CF 73FF MOVT R3, #0xFFFF
0x34185482: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34185486: 431A ORRS R2, R3
0x34185488: 4310 ORRS R0, R2
0x3418548A: 6008 STR R0, [R1]
0x3418548C: F009 FF42 BL LL_RCC_IC8_Enable ; 0x3418F314
0x34185490: E00B B 46L497 ; 0x341854AA
.L496:
0x34185492: 9804 LDR R0, [SP, #16]
0x34185494: F8D0 0128 LDR.W R0, [R0, #0x0128]
0x34185498: F641 0118 MOVW R1, #0x1818
0x3418549C: F2C0 7101 MOVT R1, #0x0701
0x341854A0: 4288 CMP R0, R1
0x341854A2: D102 BNE 46L497 ; 0x341854AA
0x341854A4: F009 FF26 BL LL_RCC_CLKP_Enable ; 0x3418F2F4
0x341854A8: E7FF B 46L497 ; 0x341854AA
.L497:
0x341854AA: 9804 LDR R0, [SP, #16]
0x341854AC: F8D0 0128 LDR.W R0, [R0, #0x0128]
0x341854B0: F002 FBCA BL LL_RCC_SetSAIClockSource ; 0x34187C48
.L498:
0x341854B4: 9804 LDR R0, [SP, #16]
0x341854B6: 7900 LDRB R0, [R0, #4]
0x341854B8: 07C0 LSLS R0, R0, #31
0x341854BA: 2800 CMP R0, #0
0x341854BC: F000 80CC BEQ.W 46L515 ; 0x34185658
0x341854C0: 9804 LDR R0, [SP, #16]
0x341854C2: F8D0 014C LDR.W R0, [R0, #0x014C]
0x341854C6: B1E8 CBZ R0, .L499 ; 0x34185504
0x341854C8: 9804 LDR R0, [SP, #16]
0x341854CA: F8D0 014C LDR.W R0, [R0, #0x014C]
0x341854CE: 2801 CMP R0, #1
0x341854D0: D018 BEQ 46L499 ; 0x34185504
0x341854D2: 9804 LDR R0, [SP, #16]
0x341854D4: F8D0 014C LDR.W R0, [R0, #0x014C]
0x341854D8: 2802 CMP R0, #2
0x341854DA: D013 BEQ 46L499 ; 0x34185504
0x341854DC: 9804 LDR R0, [SP, #16]
0x341854DE: F8D0 014C LDR.W R0, [R0, #0x014C]
0x341854E2: 2803 CMP R0, #3
0x341854E4: D00E BEQ 46L499 ; 0x34185504
0x341854E6: 9804 LDR R0, [SP, #16]
0x341854E8: F8D0 014C LDR.W R0, [R0, #0x014C]
0x341854EC: 2804 CMP R0, #4
0x341854EE: D009 BEQ 46L499 ; 0x34185504
0x341854F0: 9804 LDR R0, [SP, #16]
0x341854F2: F8D0 014C LDR.W R0, [R0, #0x014C]
0x341854F6: 2805 CMP R0, #5
0x341854F8: D004 BEQ 46L499 ; 0x34185504
0x341854FA: 9804 LDR R0, [SP, #16]
0x341854FC: F8D0 014C LDR.W R0, [R0, #0x014C]
0x34185500: 2806 CMP R0, #6
0x34185502: D100 BNE 46L500 ; 0x34185506
.L499:
0x34185504: E007 B 46L501 ; 0x34185516
.L500:
0x34185506: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x3418550A: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x3418550E: F44F 61BC MOV.W R1, #0x05E0
0x34185512: F007 FC0D BL assert_failed ; 0x3418CD30
.L501:
0x34185516: 9804 LDR R0, [SP, #16]
0x34185518: F8D0 014C LDR.W R0, [R0, #0x014C]
0x3418551C: 2802 CMP R0, #2
0x3418551E: D144 BNE 46L507 ; 0x341855AA
0x34185520: 9804 LDR R0, [SP, #16]
0x34185522: 6B80 LDR R0, [R0, #56]
0x34185524: B170 CBZ R0, .L502 ; 0x34185544
0x34185526: 9804 LDR R0, [SP, #16]
0x34185528: 6B80 LDR R0, [R0, #56]
0x3418552A: F1B0 5F80 CMP.W R0, #0x10000000
0x3418552E: D009 BEQ 46L502 ; 0x34185544
0x34185530: 9804 LDR R0, [SP, #16]
0x34185532: 6B80 LDR R0, [R0, #56]
0x34185534: F1B0 5F00 CMP.W R0, #0x20000000
0x34185538: D004 BEQ 46L502 ; 0x34185544
0x3418553A: 9804 LDR R0, [SP, #16]
0x3418553C: 6B80 LDR R0, [R0, #56]
0x3418553E: F1B0 5F40 CMP.W R0, #0x30000000
0x34185542: D100 BNE 46L503 ; 0x34185546
.L502:
0x34185544: E007 B 46L504 ; 0x34185556
.L503:
0x34185546: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x3418554A: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x3418554E: F240 51E5 MOVW R1, #0x05E5
0x34185552: F007 FBED BL assert_failed ; 0x3418CD30
.L504:
0x34185556: 9804 LDR R0, [SP, #16]
0x34185558: 6BC0 LDR R0, [R0, #60]
0x3418555A: B128 CBZ R0, .L505 ; 0x34185568
0x3418555C: 9804 LDR R0, [SP, #16]
0x3418555E: 6BC0 LDR R0, [R0, #60]
0x34185560: F5B0 7F80 CMP.W R0, #0x0100
0x34185564: D800 BHI 46L505 ; 0x34185568
0x34185566: E007 B 46L506 ; 0x34185578
.L505:
0x34185568: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x3418556C: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34185570: F240 51E6 MOVW R1, #0x05E6
0x34185574: F007 FBDC BL assert_failed ; 0x3418CD30
.L506:
0x34185578: F248 01DC MOVW R1, #0x80DC
0x3418557C: F2C5 6102 MOVT R1, #0x5602
0x34185580: 6808 LDR R0, [R1]
0x34185582: F64F 72FF MOVW R2, #0xFFFF
0x34185586: F6CC 7200 MOVT R2, #0xCF00
0x3418558A: 4010 ANDS R0, R2
0x3418558C: 9B04 LDR R3, [SP, #16]
0x3418558E: 6B9A LDR R2, [R3, #56]
0x34185590: F8D3 C03C LDR.W R12, [R3, #60]
0x34185594: 2300 MOVS R3, #0
0x34185596: F6CF 73FF MOVT R3, #0xFFFF
0x3418559A: EB03 430C ADD.W R3, R3, R12, LSL #16
0x3418559E: 431A ORRS R2, R3
0x341855A0: 4310 ORRS R0, R2
0x341855A2: 6008 STR R0, [R1]
0x341855A4: F009 FEAE BL LL_RCC_IC7_Enable ; 0x3418F304
0x341855A8: E051 B 46L514 ; 0x3418564E
.L507:
0x341855AA: 9804 LDR R0, [SP, #16]
0x341855AC: F8D0 014C LDR.W R0, [R0, #0x014C]
0x341855B0: 2803 CMP R0, #3
0x341855B2: D144 BNE 46L513 ; 0x3418563E
0x341855B4: 9804 LDR R0, [SP, #16]
0x341855B6: 6C00 LDR R0, [R0, #64]
0x341855B8: B170 CBZ R0, .L508 ; 0x341855D8
0x341855BA: 9804 LDR R0, [SP, #16]
0x341855BC: 6C00 LDR R0, [R0, #64]
0x341855BE: F1B0 5F80 CMP.W R0, #0x10000000
0x341855C2: D009 BEQ 46L508 ; 0x341855D8
0x341855C4: 9804 LDR R0, [SP, #16]
0x341855C6: 6C00 LDR R0, [R0, #64]
0x341855C8: F1B0 5F00 CMP.W R0, #0x20000000
0x341855CC: D004 BEQ 46L508 ; 0x341855D8
0x341855CE: 9804 LDR R0, [SP, #16]
0x341855D0: 6C00 LDR R0, [R0, #64]
0x341855D2: F1B0 5F40 CMP.W R0, #0x30000000
0x341855D6: D100 BNE 46L509 ; 0x341855DA
.L508:
0x341855D8: E007 B 46L510 ; 0x341855EA
.L509:
0x341855DA: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341855DE: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341855E2: F240 51F2 MOVW R1, #0x05F2
0x341855E6: F007 FBA3 BL assert_failed ; 0x3418CD30
.L510:
0x341855EA: 9804 LDR R0, [SP, #16]
0x341855EC: 6C40 LDR R0, [R0, #68]
0x341855EE: B128 CBZ R0, .L511 ; 0x341855FC
0x341855F0: 9804 LDR R0, [SP, #16]
0x341855F2: 6C40 LDR R0, [R0, #68]
0x341855F4: F5B0 7F80 CMP.W R0, #0x0100
0x341855F8: D800 BHI 46L511 ; 0x341855FC
0x341855FA: E007 B 46L512 ; 0x3418560C
.L511:
0x341855FC: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34185600: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34185604: F240 51F3 MOVW R1, #0x05F3
0x34185608: F007 FB92 BL assert_failed ; 0x3418CD30
.L512:
0x3418560C: F248 01E0 MOVW R1, #0x80E0
0x34185610: F2C5 6102 MOVT R1, #0x5602
0x34185614: 6808 LDR R0, [R1]
0x34185616: F64F 72FF MOVW R2, #0xFFFF
0x3418561A: F6CC 7200 MOVT R2, #0xCF00
0x3418561E: 4010 ANDS R0, R2
0x34185620: 9B04 LDR R3, [SP, #16]
0x34185622: 6C1A LDR R2, [R3, #64]
0x34185624: F8D3 C044 LDR.W R12, [R3, #68]
0x34185628: 2300 MOVS R3, #0
0x3418562A: F6CF 73FF MOVT R3, #0xFFFF
0x3418562E: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34185632: 431A ORRS R2, R3
0x34185634: 4310 ORRS R0, R2
0x34185636: 6008 STR R0, [R1]
0x34185638: F009 FE6C BL LL_RCC_IC8_Enable ; 0x3418F314
0x3418563C: E007 B 46L514 ; 0x3418564E
.L513:
0x3418563E: 9804 LDR R0, [SP, #16]
0x34185640: F8D0 014C LDR.W R0, [R0, #0x014C]
0x34185644: 2801 CMP R0, #1
0x34185646: D102 BNE 46L514 ; 0x3418564E
0x34185648: F009 FE54 BL LL_RCC_CLKP_Enable ; 0x3418F2F4
0x3418564C: E7FF B 46L514 ; 0x3418564E
.L514:
0x3418564E: 9804 LDR R0, [SP, #16]
0x34185650: F8D0 014C LDR.W R0, [R0, #0x014C]
0x34185654: F002 FB00 BL LL_RCC_SetSPDIFRXClockSource ; 0x34187C58
.L515:
0x34185658: 9804 LDR R0, [SP, #16]
0x3418565A: 7900 LDRB R0, [R0, #4]
0x3418565C: 0780 LSLS R0, R0, #30
0x3418565E: 2800 CMP R0, #0
0x34185660: F140 80F5 BPL.W 46L532 ; 0x3418584E
0x34185664: 9804 LDR R0, [SP, #16]
0x34185666: F8D0 0134 LDR.W R0, [R0, #0x0134]
0x3418566A: F240 4120 MOVW R1, #0x0420
0x3418566E: F2C0 7100 MOVT R1, #0x0700
0x34185672: 4288 CMP R0, R1
0x34185674: D035 BEQ 46L516 ; 0x341856E2
0x34185676: 9804 LDR R0, [SP, #16]
0x34185678: F8D0 0134 LDR.W R0, [R0, #0x0134]
0x3418567C: F240 4120 MOVW R1, #0x0420
0x34185680: F2C0 7101 MOVT R1, #0x0701
0x34185684: 4288 CMP R0, R1
0x34185686: D02C BEQ 46L516 ; 0x341856E2
0x34185688: 9804 LDR R0, [SP, #16]
0x3418568A: F8D0 0134 LDR.W R0, [R0, #0x0134]
0x3418568E: F240 4120 MOVW R1, #0x0420
0x34185692: F2C0 7102 MOVT R1, #0x0702
0x34185696: 4288 CMP R0, R1
0x34185698: D023 BEQ 46L516 ; 0x341856E2
0x3418569A: 9804 LDR R0, [SP, #16]
0x3418569C: F8D0 0134 LDR.W R0, [R0, #0x0134]
0x341856A0: F240 4120 MOVW R1, #0x0420
0x341856A4: F2C0 7103 MOVT R1, #0x0703
0x341856A8: 4288 CMP R0, R1
0x341856AA: D01A BEQ 46L516 ; 0x341856E2
0x341856AC: 9804 LDR R0, [SP, #16]
0x341856AE: F8D0 0134 LDR.W R0, [R0, #0x0134]
0x341856B2: F240 4120 MOVW R1, #0x0420
0x341856B6: F2C0 7104 MOVT R1, #0x0704
0x341856BA: 4288 CMP R0, R1
0x341856BC: D011 BEQ 46L516 ; 0x341856E2
0x341856BE: 9804 LDR R0, [SP, #16]
0x341856C0: F8D0 0134 LDR.W R0, [R0, #0x0134]
0x341856C4: F240 4120 MOVW R1, #0x0420
0x341856C8: F2C0 7105 MOVT R1, #0x0705
0x341856CC: 4288 CMP R0, R1
0x341856CE: D008 BEQ 46L516 ; 0x341856E2
0x341856D0: 9804 LDR R0, [SP, #16]
0x341856D2: F8D0 0134 LDR.W R0, [R0, #0x0134]
0x341856D6: F240 4120 MOVW R1, #0x0420
0x341856DA: F2C0 7106 MOVT R1, #0x0706
0x341856DE: 4288 CMP R0, R1
0x341856E0: D100 BNE 46L517 ; 0x341856E4
.L516:
0x341856E2: E007 B 46L518 ; 0x341856F4
.L517:
0x341856E4: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341856E8: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341856EC: F240 610D MOVW R1, #0x060D
0x341856F0: F007 FB1E BL assert_failed ; 0x3418CD30
.L518:
0x341856F4: 9804 LDR R0, [SP, #16]
0x341856F6: F8D0 0134 LDR.W R0, [R0, #0x0134]
0x341856FA: F240 4120 MOVW R1, #0x0420
0x341856FE: F2C0 7102 MOVT R1, #0x0702
0x34185702: 4288 CMP R0, R1
0x34185704: D144 BNE 46L524 ; 0x34185790
0x34185706: 9804 LDR R0, [SP, #16]
0x34185708: 6C00 LDR R0, [R0, #64]
0x3418570A: B170 CBZ R0, .L519 ; 0x3418572A
0x3418570C: 9804 LDR R0, [SP, #16]
0x3418570E: 6C00 LDR R0, [R0, #64]
0x34185710: F1B0 5F80 CMP.W R0, #0x10000000
0x34185714: D009 BEQ 46L519 ; 0x3418572A
0x34185716: 9804 LDR R0, [SP, #16]
0x34185718: 6C00 LDR R0, [R0, #64]
0x3418571A: F1B0 5F00 CMP.W R0, #0x20000000
0x3418571E: D004 BEQ 46L519 ; 0x3418572A
0x34185720: 9804 LDR R0, [SP, #16]
0x34185722: 6C00 LDR R0, [R0, #64]
0x34185724: F1B0 5F40 CMP.W R0, #0x30000000
0x34185728: D100 BNE 46L520 ; 0x3418572C
.L519:
0x3418572A: E007 B 46L521 ; 0x3418573C
.L520:
0x3418572C: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34185730: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34185734: F240 6112 MOVW R1, #0x0612
0x34185738: F007 FAFA BL assert_failed ; 0x3418CD30
.L521:
0x3418573C: 9804 LDR R0, [SP, #16]
0x3418573E: 6C40 LDR R0, [R0, #68]
0x34185740: B128 CBZ R0, .L522 ; 0x3418574E
0x34185742: 9804 LDR R0, [SP, #16]
0x34185744: 6C40 LDR R0, [R0, #68]
0x34185746: F5B0 7F80 CMP.W R0, #0x0100
0x3418574A: D800 BHI 46L522 ; 0x3418574E
0x3418574C: E007 B 46L523 ; 0x3418575E
.L522:
0x3418574E: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34185752: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34185756: F240 6113 MOVW R1, #0x0613
0x3418575A: F007 FAE9 BL assert_failed ; 0x3418CD30
.L523:
0x3418575E: F248 01E0 MOVW R1, #0x80E0
0x34185762: F2C5 6102 MOVT R1, #0x5602
0x34185766: 6808 LDR R0, [R1]
0x34185768: F64F 72FF MOVW R2, #0xFFFF
0x3418576C: F6CC 7200 MOVT R2, #0xCF00
0x34185770: 4010 ANDS R0, R2
0x34185772: 9B04 LDR R3, [SP, #16]
0x34185774: 6C1A LDR R2, [R3, #64]
0x34185776: F8D3 C044 LDR.W R12, [R3, #68]
0x3418577A: 2300 MOVS R3, #0
0x3418577C: F6CF 73FF MOVT R3, #0xFFFF
0x34185780: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34185784: 431A ORRS R2, R3
0x34185786: 4310 ORRS R0, R2
0x34185788: 6008 STR R0, [R1]
0x3418578A: F009 FDC3 BL LL_RCC_IC8_Enable ; 0x3418F314
0x3418578E: E059 B 46L531 ; 0x34185844
.L524:
0x34185790: 9804 LDR R0, [SP, #16]
0x34185792: F8D0 0134 LDR.W R0, [R0, #0x0134]
0x34185796: F240 4120 MOVW R1, #0x0420
0x3418579A: F2C0 7103 MOVT R1, #0x0703
0x3418579E: 4288 CMP R0, R1
0x341857A0: D144 BNE 46L530 ; 0x3418582C
0x341857A2: 9804 LDR R0, [SP, #16]
0x341857A4: 6C80 LDR R0, [R0, #72]
0x341857A6: B170 CBZ R0, .L525 ; 0x341857C6
0x341857A8: 9804 LDR R0, [SP, #16]
0x341857AA: 6C80 LDR R0, [R0, #72]
0x341857AC: F1B0 5F80 CMP.W R0, #0x10000000
0x341857B0: D009 BEQ 46L525 ; 0x341857C6
0x341857B2: 9804 LDR R0, [SP, #16]
0x341857B4: 6C80 LDR R0, [R0, #72]
0x341857B6: F1B0 5F00 CMP.W R0, #0x20000000
0x341857BA: D004 BEQ 46L525 ; 0x341857C6
0x341857BC: 9804 LDR R0, [SP, #16]
0x341857BE: 6C80 LDR R0, [R0, #72]
0x341857C0: F1B0 5F40 CMP.W R0, #0x30000000
0x341857C4: D100 BNE 46L526 ; 0x341857C8
.L525:
0x341857C6: E007 B 46L527 ; 0x341857D8
.L526:
0x341857C8: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341857CC: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341857D0: F240 611F MOVW R1, #0x061F
0x341857D4: F007 FAAC BL assert_failed ; 0x3418CD30
.L527:
0x341857D8: 9804 LDR R0, [SP, #16]
0x341857DA: 6CC0 LDR R0, [R0, #76]
0x341857DC: B128 CBZ R0, .L528 ; 0x341857EA
0x341857DE: 9804 LDR R0, [SP, #16]
0x341857E0: 6CC0 LDR R0, [R0, #76]
0x341857E2: F5B0 7F80 CMP.W R0, #0x0100
0x341857E6: D800 BHI 46L528 ; 0x341857EA
0x341857E8: E007 B 46L529 ; 0x341857FA
.L528:
0x341857EA: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341857EE: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341857F2: F44F 61C4 MOV.W R1, #0x0620
0x341857F6: F007 FA9B BL assert_failed ; 0x3418CD30
.L529:
0x341857FA: F248 01E4 MOVW R1, #0x80E4
0x341857FE: F2C5 6102 MOVT R1, #0x5602
0x34185802: 6808 LDR R0, [R1]
0x34185804: F64F 72FF MOVW R2, #0xFFFF
0x34185808: F6CC 7200 MOVT R2, #0xCF00
0x3418580C: 4010 ANDS R0, R2
0x3418580E: 9B04 LDR R3, [SP, #16]
0x34185810: 6C9A LDR R2, [R3, #72]
0x34185812: F8D3 C04C LDR.W R12, [R3, #76]
0x34185816: 2300 MOVS R3, #0
0x34185818: F6CF 73FF MOVT R3, #0xFFFF
0x3418581C: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34185820: 431A ORRS R2, R3
0x34185822: 4310 ORRS R0, R2
0x34185824: 6008 STR R0, [R1]
0x34185826: F002 F9BF BL LL_RCC_IC9_Enable ; 0x34187BA8
0x3418582A: E00B B 46L531 ; 0x34185844
.L530:
0x3418582C: 9804 LDR R0, [SP, #16]
0x3418582E: F8D0 0134 LDR.W R0, [R0, #0x0134]
0x34185832: F240 4120 MOVW R1, #0x0420
0x34185836: F2C0 7101 MOVT R1, #0x0701
0x3418583A: 4288 CMP R0, R1
0x3418583C: D102 BNE 46L531 ; 0x34185844
0x3418583E: F009 FD59 BL LL_RCC_CLKP_Enable ; 0x3418F2F4
0x34185842: E7FF B 46L531 ; 0x34185844
.L531:
0x34185844: 9804 LDR R0, [SP, #16]
0x34185846: F8D0 0134 LDR.W R0, [R0, #0x0134]
0x3418584A: F002 FA13 BL LL_RCC_SetSPIClockSource ; 0x34187C74
.L532:
0x3418584E: 9804 LDR R0, [SP, #16]
0x34185850: 7900 LDRB R0, [R0, #4]
0x34185852: 0740 LSLS R0, R0, #29
0x34185854: 2800 CMP R0, #0
0x34185856: F140 80F5 BPL.W 46L549 ; 0x34185A44
0x3418585A: 9804 LDR R0, [SP, #16]
0x3418585C: F8D0 0138 LDR.W R0, [R0, #0x0138]
0x34185860: F640 0120 MOVW R1, #0x0820
0x34185864: F2C0 7100 MOVT R1, #0x0700
0x34185868: 4288 CMP R0, R1
0x3418586A: D035 BEQ 46L533 ; 0x341858D8
0x3418586C: 9804 LDR R0, [SP, #16]
0x3418586E: F8D0 0138 LDR.W R0, [R0, #0x0138]
0x34185872: F640 0120 MOVW R1, #0x0820
0x34185876: F2C0 7101 MOVT R1, #0x0701
0x3418587A: 4288 CMP R0, R1
0x3418587C: D02C BEQ 46L533 ; 0x341858D8
0x3418587E: 9804 LDR R0, [SP, #16]
0x34185880: F8D0 0138 LDR.W R0, [R0, #0x0138]
0x34185884: F640 0120 MOVW R1, #0x0820
0x34185888: F2C0 7102 MOVT R1, #0x0702
0x3418588C: 4288 CMP R0, R1
0x3418588E: D023 BEQ 46L533 ; 0x341858D8
0x34185890: 9804 LDR R0, [SP, #16]
0x34185892: F8D0 0138 LDR.W R0, [R0, #0x0138]
0x34185896: F640 0120 MOVW R1, #0x0820
0x3418589A: F2C0 7103 MOVT R1, #0x0703
0x3418589E: 4288 CMP R0, R1
0x341858A0: D01A BEQ 46L533 ; 0x341858D8
0x341858A2: 9804 LDR R0, [SP, #16]
0x341858A4: F8D0 0138 LDR.W R0, [R0, #0x0138]
0x341858A8: F640 0120 MOVW R1, #0x0820
0x341858AC: F2C0 7104 MOVT R1, #0x0704
0x341858B0: 4288 CMP R0, R1
0x341858B2: D011 BEQ 46L533 ; 0x341858D8
0x341858B4: 9804 LDR R0, [SP, #16]
0x341858B6: F8D0 0138 LDR.W R0, [R0, #0x0138]
0x341858BA: F640 0120 MOVW R1, #0x0820
0x341858BE: F2C0 7105 MOVT R1, #0x0705
0x341858C2: 4288 CMP R0, R1
0x341858C4: D008 BEQ 46L533 ; 0x341858D8
0x341858C6: 9804 LDR R0, [SP, #16]
0x341858C8: F8D0 0138 LDR.W R0, [R0, #0x0138]
0x341858CC: F640 0120 MOVW R1, #0x0820
0x341858D0: F2C0 7106 MOVT R1, #0x0706
0x341858D4: 4288 CMP R0, R1
0x341858D6: D100 BNE 46L534 ; 0x341858DA
.L533:
0x341858D8: E007 B 46L535 ; 0x341858EA
.L534:
0x341858DA: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341858DE: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341858E2: F240 613A MOVW R1, #0x063A
0x341858E6: F007 FA23 BL assert_failed ; 0x3418CD30
.L535:
0x341858EA: 9804 LDR R0, [SP, #16]
0x341858EC: F8D0 0138 LDR.W R0, [R0, #0x0138]
0x341858F0: F640 0120 MOVW R1, #0x0820
0x341858F4: F2C0 7102 MOVT R1, #0x0702
0x341858F8: 4288 CMP R0, R1
0x341858FA: D144 BNE 46L541 ; 0x34185986
0x341858FC: 9804 LDR R0, [SP, #16]
0x341858FE: 6C00 LDR R0, [R0, #64]
0x34185900: B170 CBZ R0, .L536 ; 0x34185920
0x34185902: 9804 LDR R0, [SP, #16]
0x34185904: 6C00 LDR R0, [R0, #64]
0x34185906: F1B0 5F80 CMP.W R0, #0x10000000
0x3418590A: D009 BEQ 46L536 ; 0x34185920
0x3418590C: 9804 LDR R0, [SP, #16]
0x3418590E: 6C00 LDR R0, [R0, #64]
0x34185910: F1B0 5F00 CMP.W R0, #0x20000000
0x34185914: D004 BEQ 46L536 ; 0x34185920
0x34185916: 9804 LDR R0, [SP, #16]
0x34185918: 6C00 LDR R0, [R0, #64]
0x3418591A: F1B0 5F40 CMP.W R0, #0x30000000
0x3418591E: D100 BNE 46L537 ; 0x34185922
.L536:
0x34185920: E007 B 46L538 ; 0x34185932
.L537:
0x34185922: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34185926: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x3418592A: F240 613F MOVW R1, #0x063F
0x3418592E: F007 F9FF BL assert_failed ; 0x3418CD30
.L538:
0x34185932: 9804 LDR R0, [SP, #16]
0x34185934: 6C40 LDR R0, [R0, #68]
0x34185936: B128 CBZ R0, .L539 ; 0x34185944
0x34185938: 9804 LDR R0, [SP, #16]
0x3418593A: 6C40 LDR R0, [R0, #68]
0x3418593C: F5B0 7F80 CMP.W R0, #0x0100
0x34185940: D800 BHI 46L539 ; 0x34185944
0x34185942: E007 B 46L540 ; 0x34185954
.L539:
0x34185944: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34185948: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x3418594C: F44F 61C8 MOV.W R1, #0x0640
0x34185950: F007 F9EE BL assert_failed ; 0x3418CD30
.L540:
0x34185954: F248 01E0 MOVW R1, #0x80E0
0x34185958: F2C5 6102 MOVT R1, #0x5602
0x3418595C: 6808 LDR R0, [R1]
0x3418595E: F64F 72FF MOVW R2, #0xFFFF
0x34185962: F6CC 7200 MOVT R2, #0xCF00
0x34185966: 4010 ANDS R0, R2
0x34185968: 9B04 LDR R3, [SP, #16]
0x3418596A: 6C1A LDR R2, [R3, #64]
0x3418596C: F8D3 C044 LDR.W R12, [R3, #68]
0x34185970: 2300 MOVS R3, #0
0x34185972: F6CF 73FF MOVT R3, #0xFFFF
0x34185976: EB03 430C ADD.W R3, R3, R12, LSL #16
0x3418597A: 431A ORRS R2, R3
0x3418597C: 4310 ORRS R0, R2
0x3418597E: 6008 STR R0, [R1]
0x34185980: F009 FCC8 BL LL_RCC_IC8_Enable ; 0x3418F314
0x34185984: E059 B 46L548 ; 0x34185A3A
.L541:
0x34185986: 9804 LDR R0, [SP, #16]
0x34185988: F8D0 0138 LDR.W R0, [R0, #0x0138]
0x3418598C: F640 0120 MOVW R1, #0x0820
0x34185990: F2C0 7103 MOVT R1, #0x0703
0x34185994: 4288 CMP R0, R1
0x34185996: D144 BNE 46L547 ; 0x34185A22
0x34185998: 9804 LDR R0, [SP, #16]
0x3418599A: 6C80 LDR R0, [R0, #72]
0x3418599C: B170 CBZ R0, .L542 ; 0x341859BC
0x3418599E: 9804 LDR R0, [SP, #16]
0x341859A0: 6C80 LDR R0, [R0, #72]
0x341859A2: F1B0 5F80 CMP.W R0, #0x10000000
0x341859A6: D009 BEQ 46L542 ; 0x341859BC
0x341859A8: 9804 LDR R0, [SP, #16]
0x341859AA: 6C80 LDR R0, [R0, #72]
0x341859AC: F1B0 5F00 CMP.W R0, #0x20000000
0x341859B0: D004 BEQ 46L542 ; 0x341859BC
0x341859B2: 9804 LDR R0, [SP, #16]
0x341859B4: 6C80 LDR R0, [R0, #72]
0x341859B6: F1B0 5F40 CMP.W R0, #0x30000000
0x341859BA: D100 BNE 46L543 ; 0x341859BE
.L542:
0x341859BC: E007 B 46L544 ; 0x341859CE
.L543:
0x341859BE: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341859C2: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341859C6: F240 614C MOVW R1, #0x064C
0x341859CA: F007 F9B1 BL assert_failed ; 0x3418CD30
.L544:
0x341859CE: 9804 LDR R0, [SP, #16]
0x341859D0: 6CC0 LDR R0, [R0, #76]
0x341859D2: B128 CBZ R0, .L545 ; 0x341859E0
0x341859D4: 9804 LDR R0, [SP, #16]
0x341859D6: 6CC0 LDR R0, [R0, #76]
0x341859D8: F5B0 7F80 CMP.W R0, #0x0100
0x341859DC: D800 BHI 46L545 ; 0x341859E0
0x341859DE: E007 B 46L546 ; 0x341859F0
.L545:
0x341859E0: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341859E4: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341859E8: F240 614D MOVW R1, #0x064D
0x341859EC: F007 F9A0 BL assert_failed ; 0x3418CD30
.L546:
0x341859F0: F248 01E4 MOVW R1, #0x80E4
0x341859F4: F2C5 6102 MOVT R1, #0x5602
0x341859F8: 6808 LDR R0, [R1]
0x341859FA: F64F 72FF MOVW R2, #0xFFFF
0x341859FE: F6CC 7200 MOVT R2, #0xCF00
0x34185A02: 4010 ANDS R0, R2
0x34185A04: 9B04 LDR R3, [SP, #16]
0x34185A06: 6C9A LDR R2, [R3, #72]
0x34185A08: F8D3 C04C LDR.W R12, [R3, #76]
0x34185A0C: 2300 MOVS R3, #0
0x34185A0E: F6CF 73FF MOVT R3, #0xFFFF
0x34185A12: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34185A16: 431A ORRS R2, R3
0x34185A18: 4310 ORRS R0, R2
0x34185A1A: 6008 STR R0, [R1]
0x34185A1C: F002 F8C4 BL LL_RCC_IC9_Enable ; 0x34187BA8
0x34185A20: E00B B 46L548 ; 0x34185A3A
.L547:
0x34185A22: 9804 LDR R0, [SP, #16]
0x34185A24: F8D0 0138 LDR.W R0, [R0, #0x0138]
0x34185A28: F640 0120 MOVW R1, #0x0820
0x34185A2C: F2C0 7101 MOVT R1, #0x0701
0x34185A30: 4288 CMP R0, R1
0x34185A32: D102 BNE 46L548 ; 0x34185A3A
0x34185A34: F009 FC5E BL LL_RCC_CLKP_Enable ; 0x3418F2F4
0x34185A38: E7FF B 46L548 ; 0x34185A3A
.L548:
0x34185A3A: 9804 LDR R0, [SP, #16]
0x34185A3C: F8D0 0138 LDR.W R0, [R0, #0x0138]
0x34185A40: F002 F918 BL LL_RCC_SetSPIClockSource ; 0x34187C74
.L549:
0x34185A44: 9804 LDR R0, [SP, #16]
0x34185A46: 7900 LDRB R0, [R0, #4]
0x34185A48: 0700 LSLS R0, R0, #28
0x34185A4A: 2800 CMP R0, #0
0x34185A4C: F140 80F5 BPL.W 46L566 ; 0x34185C3A
0x34185A50: 9804 LDR R0, [SP, #16]
0x34185A52: F8D0 013C LDR.W R0, [R0, #0x013C]
0x34185A56: F640 4120 MOVW R1, #0x0C20
0x34185A5A: F2C0 7100 MOVT R1, #0x0700
0x34185A5E: 4288 CMP R0, R1
0x34185A60: D035 BEQ 46L550 ; 0x34185ACE
0x34185A62: 9804 LDR R0, [SP, #16]
0x34185A64: F8D0 013C LDR.W R0, [R0, #0x013C]
0x34185A68: F640 4120 MOVW R1, #0x0C20
0x34185A6C: F2C0 7101 MOVT R1, #0x0701
0x34185A70: 4288 CMP R0, R1
0x34185A72: D02C BEQ 46L550 ; 0x34185ACE
0x34185A74: 9804 LDR R0, [SP, #16]
0x34185A76: F8D0 013C LDR.W R0, [R0, #0x013C]
0x34185A7A: F640 4120 MOVW R1, #0x0C20
0x34185A7E: F2C0 7102 MOVT R1, #0x0702
0x34185A82: 4288 CMP R0, R1
0x34185A84: D023 BEQ 46L550 ; 0x34185ACE
0x34185A86: 9804 LDR R0, [SP, #16]
0x34185A88: F8D0 013C LDR.W R0, [R0, #0x013C]
0x34185A8C: F640 4120 MOVW R1, #0x0C20
0x34185A90: F2C0 7103 MOVT R1, #0x0703
0x34185A94: 4288 CMP R0, R1
0x34185A96: D01A BEQ 46L550 ; 0x34185ACE
0x34185A98: 9804 LDR R0, [SP, #16]
0x34185A9A: F8D0 013C LDR.W R0, [R0, #0x013C]
0x34185A9E: F640 4120 MOVW R1, #0x0C20
0x34185AA2: F2C0 7104 MOVT R1, #0x0704
0x34185AA6: 4288 CMP R0, R1
0x34185AA8: D011 BEQ 46L550 ; 0x34185ACE
0x34185AAA: 9804 LDR R0, [SP, #16]
0x34185AAC: F8D0 013C LDR.W R0, [R0, #0x013C]
0x34185AB0: F640 4120 MOVW R1, #0x0C20
0x34185AB4: F2C0 7105 MOVT R1, #0x0705
0x34185AB8: 4288 CMP R0, R1
0x34185ABA: D008 BEQ 46L550 ; 0x34185ACE
0x34185ABC: 9804 LDR R0, [SP, #16]
0x34185ABE: F8D0 013C LDR.W R0, [R0, #0x013C]
0x34185AC2: F640 4120 MOVW R1, #0x0C20
0x34185AC6: F2C0 7106 MOVT R1, #0x0706
0x34185ACA: 4288 CMP R0, R1
0x34185ACC: D100 BNE 46L551 ; 0x34185AD0
.L550:
0x34185ACE: E007 B 46L552 ; 0x34185AE0
.L551:
0x34185AD0: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34185AD4: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34185AD8: F240 6167 MOVW R1, #0x0667
0x34185ADC: F007 F928 BL assert_failed ; 0x3418CD30
.L552:
0x34185AE0: 9804 LDR R0, [SP, #16]
0x34185AE2: F8D0 013C LDR.W R0, [R0, #0x013C]
0x34185AE6: F640 4120 MOVW R1, #0x0C20
0x34185AEA: F2C0 7102 MOVT R1, #0x0702
0x34185AEE: 4288 CMP R0, R1
0x34185AF0: D144 BNE 46L558 ; 0x34185B7C
0x34185AF2: 9804 LDR R0, [SP, #16]
0x34185AF4: 6C00 LDR R0, [R0, #64]
0x34185AF6: B170 CBZ R0, .L553 ; 0x34185B16
0x34185AF8: 9804 LDR R0, [SP, #16]
0x34185AFA: 6C00 LDR R0, [R0, #64]
0x34185AFC: F1B0 5F80 CMP.W R0, #0x10000000
0x34185B00: D009 BEQ 46L553 ; 0x34185B16
0x34185B02: 9804 LDR R0, [SP, #16]
0x34185B04: 6C00 LDR R0, [R0, #64]
0x34185B06: F1B0 5F00 CMP.W R0, #0x20000000
0x34185B0A: D004 BEQ 46L553 ; 0x34185B16
0x34185B0C: 9804 LDR R0, [SP, #16]
0x34185B0E: 6C00 LDR R0, [R0, #64]
0x34185B10: F1B0 5F40 CMP.W R0, #0x30000000
0x34185B14: D100 BNE 46L554 ; 0x34185B18
.L553:
0x34185B16: E007 B 46L555 ; 0x34185B28
.L554:
0x34185B18: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34185B1C: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34185B20: F240 616C MOVW R1, #0x066C
0x34185B24: F007 F904 BL assert_failed ; 0x3418CD30
.L555:
0x34185B28: 9804 LDR R0, [SP, #16]
0x34185B2A: 6C40 LDR R0, [R0, #68]
0x34185B2C: B128 CBZ R0, .L556 ; 0x34185B3A
0x34185B2E: 9804 LDR R0, [SP, #16]
0x34185B30: 6C40 LDR R0, [R0, #68]
0x34185B32: F5B0 7F80 CMP.W R0, #0x0100
0x34185B36: D800 BHI 46L556 ; 0x34185B3A
0x34185B38: E007 B 46L557 ; 0x34185B4A
.L556:
0x34185B3A: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34185B3E: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34185B42: F240 616D MOVW R1, #0x066D
0x34185B46: F007 F8F3 BL assert_failed ; 0x3418CD30
.L557:
0x34185B4A: F248 01E0 MOVW R1, #0x80E0
0x34185B4E: F2C5 6102 MOVT R1, #0x5602
0x34185B52: 6808 LDR R0, [R1]
0x34185B54: F64F 72FF MOVW R2, #0xFFFF
0x34185B58: F6CC 7200 MOVT R2, #0xCF00
0x34185B5C: 4010 ANDS R0, R2
0x34185B5E: 9B04 LDR R3, [SP, #16]
0x34185B60: 6C1A LDR R2, [R3, #64]
0x34185B62: F8D3 C044 LDR.W R12, [R3, #68]
0x34185B66: 2300 MOVS R3, #0
0x34185B68: F6CF 73FF MOVT R3, #0xFFFF
0x34185B6C: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34185B70: 431A ORRS R2, R3
0x34185B72: 4310 ORRS R0, R2
0x34185B74: 6008 STR R0, [R1]
0x34185B76: F009 FBCD BL LL_RCC_IC8_Enable ; 0x3418F314
0x34185B7A: E059 B 46L565 ; 0x34185C30
.L558:
0x34185B7C: 9804 LDR R0, [SP, #16]
0x34185B7E: F8D0 013C LDR.W R0, [R0, #0x013C]
0x34185B82: F640 4120 MOVW R1, #0x0C20
0x34185B86: F2C0 7103 MOVT R1, #0x0703
0x34185B8A: 4288 CMP R0, R1
0x34185B8C: D144 BNE 46L564 ; 0x34185C18
0x34185B8E: 9804 LDR R0, [SP, #16]
0x34185B90: 6C80 LDR R0, [R0, #72]
0x34185B92: B170 CBZ R0, .L559 ; 0x34185BB2
0x34185B94: 9804 LDR R0, [SP, #16]
0x34185B96: 6C80 LDR R0, [R0, #72]
0x34185B98: F1B0 5F80 CMP.W R0, #0x10000000
0x34185B9C: D009 BEQ 46L559 ; 0x34185BB2
0x34185B9E: 9804 LDR R0, [SP, #16]
0x34185BA0: 6C80 LDR R0, [R0, #72]
0x34185BA2: F1B0 5F00 CMP.W R0, #0x20000000
0x34185BA6: D004 BEQ 46L559 ; 0x34185BB2
0x34185BA8: 9804 LDR R0, [SP, #16]
0x34185BAA: 6C80 LDR R0, [R0, #72]
0x34185BAC: F1B0 5F40 CMP.W R0, #0x30000000
0x34185BB0: D100 BNE 46L560 ; 0x34185BB4
.L559:
0x34185BB2: E007 B 46L561 ; 0x34185BC4
.L560:
0x34185BB4: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34185BB8: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34185BBC: F240 6179 MOVW R1, #0x0679
0x34185BC0: F007 F8B6 BL assert_failed ; 0x3418CD30
.L561:
0x34185BC4: 9804 LDR R0, [SP, #16]
0x34185BC6: 6CC0 LDR R0, [R0, #76]
0x34185BC8: B128 CBZ R0, .L562 ; 0x34185BD6
0x34185BCA: 9804 LDR R0, [SP, #16]
0x34185BCC: 6CC0 LDR R0, [R0, #76]
0x34185BCE: F5B0 7F80 CMP.W R0, #0x0100
0x34185BD2: D800 BHI 46L562 ; 0x34185BD6
0x34185BD4: E007 B 46L563 ; 0x34185BE6
.L562:
0x34185BD6: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34185BDA: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34185BDE: F240 617A MOVW R1, #0x067A
0x34185BE2: F007 F8A5 BL assert_failed ; 0x3418CD30
.L563:
0x34185BE6: F248 01E4 MOVW R1, #0x80E4
0x34185BEA: F2C5 6102 MOVT R1, #0x5602
0x34185BEE: 6808 LDR R0, [R1]
0x34185BF0: F64F 72FF MOVW R2, #0xFFFF
0x34185BF4: F6CC 7200 MOVT R2, #0xCF00
0x34185BF8: 4010 ANDS R0, R2
0x34185BFA: 9B04 LDR R3, [SP, #16]
0x34185BFC: 6C9A LDR R2, [R3, #72]
0x34185BFE: F8D3 C04C LDR.W R12, [R3, #76]
0x34185C02: 2300 MOVS R3, #0
0x34185C04: F6CF 73FF MOVT R3, #0xFFFF
0x34185C08: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34185C0C: 431A ORRS R2, R3
0x34185C0E: 4310 ORRS R0, R2
0x34185C10: 6008 STR R0, [R1]
0x34185C12: F001 FFC9 BL LL_RCC_IC9_Enable ; 0x34187BA8
0x34185C16: E00B B 46L565 ; 0x34185C30
.L564:
0x34185C18: 9804 LDR R0, [SP, #16]
0x34185C1A: F8D0 013C LDR.W R0, [R0, #0x013C]
0x34185C1E: F640 4120 MOVW R1, #0x0C20
0x34185C22: F2C0 7101 MOVT R1, #0x0701
0x34185C26: 4288 CMP R0, R1
0x34185C28: D102 BNE 46L565 ; 0x34185C30
0x34185C2A: F009 FB63 BL LL_RCC_CLKP_Enable ; 0x3418F2F4
0x34185C2E: E7FF B 46L565 ; 0x34185C30
.L565:
0x34185C30: 9804 LDR R0, [SP, #16]
0x34185C32: F8D0 013C LDR.W R0, [R0, #0x013C]
0x34185C36: F002 F81D BL LL_RCC_SetSPIClockSource ; 0x34187C74
.L566:
0x34185C3A: 9804 LDR R0, [SP, #16]
0x34185C3C: 7900 LDRB R0, [R0, #4]
0x34185C3E: 06C0 LSLS R0, R0, #27
0x34185C40: 2800 CMP R0, #0
0x34185C42: F140 80F5 BPL.W 46L583 ; 0x34185E30
0x34185C46: 9804 LDR R0, [SP, #16]
0x34185C48: F8D0 0140 LDR.W R0, [R0, #0x0140]
0x34185C4C: F241 0120 MOVW R1, #0x1020
0x34185C50: F2C0 7100 MOVT R1, #0x0700
0x34185C54: 4288 CMP R0, R1
0x34185C56: D035 BEQ 46L567 ; 0x34185CC4
0x34185C58: 9804 LDR R0, [SP, #16]
0x34185C5A: F8D0 0140 LDR.W R0, [R0, #0x0140]
0x34185C5E: F241 0120 MOVW R1, #0x1020
0x34185C62: F2C0 7101 MOVT R1, #0x0701
0x34185C66: 4288 CMP R0, R1
0x34185C68: D02C BEQ 46L567 ; 0x34185CC4
0x34185C6A: 9804 LDR R0, [SP, #16]
0x34185C6C: F8D0 0140 LDR.W R0, [R0, #0x0140]
0x34185C70: F241 0120 MOVW R1, #0x1020
0x34185C74: F2C0 7102 MOVT R1, #0x0702
0x34185C78: 4288 CMP R0, R1
0x34185C7A: D023 BEQ 46L567 ; 0x34185CC4
0x34185C7C: 9804 LDR R0, [SP, #16]
0x34185C7E: F8D0 0140 LDR.W R0, [R0, #0x0140]
0x34185C82: F241 0120 MOVW R1, #0x1020
0x34185C86: F2C0 7103 MOVT R1, #0x0703
0x34185C8A: 4288 CMP R0, R1
0x34185C8C: D01A BEQ 46L567 ; 0x34185CC4
0x34185C8E: 9804 LDR R0, [SP, #16]
0x34185C90: F8D0 0140 LDR.W R0, [R0, #0x0140]
0x34185C94: F241 0120 MOVW R1, #0x1020
0x34185C98: F2C0 7104 MOVT R1, #0x0704
0x34185C9C: 4288 CMP R0, R1
0x34185C9E: D011 BEQ 46L567 ; 0x34185CC4
0x34185CA0: 9804 LDR R0, [SP, #16]
0x34185CA2: F8D0 0140 LDR.W R0, [R0, #0x0140]
0x34185CA6: F241 0120 MOVW R1, #0x1020
0x34185CAA: F2C0 7105 MOVT R1, #0x0705
0x34185CAE: 4288 CMP R0, R1
0x34185CB0: D008 BEQ 46L567 ; 0x34185CC4
0x34185CB2: 9804 LDR R0, [SP, #16]
0x34185CB4: F8D0 0140 LDR.W R0, [R0, #0x0140]
0x34185CB8: F241 0120 MOVW R1, #0x1020
0x34185CBC: F2C0 7106 MOVT R1, #0x0706
0x34185CC0: 4288 CMP R0, R1
0x34185CC2: D100 BNE 46L568 ; 0x34185CC6
.L567:
0x34185CC4: E007 B 46L569 ; 0x34185CD6
.L568:
0x34185CC6: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34185CCA: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34185CCE: F240 6194 MOVW R1, #0x0694
0x34185CD2: F007 F82D BL assert_failed ; 0x3418CD30
.L569:
0x34185CD6: 9804 LDR R0, [SP, #16]
0x34185CD8: F8D0 0140 LDR.W R0, [R0, #0x0140]
0x34185CDC: F241 0120 MOVW R1, #0x1020
0x34185CE0: F2C0 7102 MOVT R1, #0x0702
0x34185CE4: 4288 CMP R0, R1
0x34185CE6: D144 BNE 46L575 ; 0x34185D72
0x34185CE8: 9804 LDR R0, [SP, #16]
0x34185CEA: 6C80 LDR R0, [R0, #72]
0x34185CEC: B170 CBZ R0, .L570 ; 0x34185D0C
0x34185CEE: 9804 LDR R0, [SP, #16]
0x34185CF0: 6C80 LDR R0, [R0, #72]
0x34185CF2: F1B0 5F80 CMP.W R0, #0x10000000
0x34185CF6: D009 BEQ 46L570 ; 0x34185D0C
0x34185CF8: 9804 LDR R0, [SP, #16]
0x34185CFA: 6C80 LDR R0, [R0, #72]
0x34185CFC: F1B0 5F00 CMP.W R0, #0x20000000
0x34185D00: D004 BEQ 46L570 ; 0x34185D0C
0x34185D02: 9804 LDR R0, [SP, #16]
0x34185D04: 6C80 LDR R0, [R0, #72]
0x34185D06: F1B0 5F40 CMP.W R0, #0x30000000
0x34185D0A: D100 BNE 46L571 ; 0x34185D0E
.L570:
0x34185D0C: E007 B 46L572 ; 0x34185D1E
.L571:
0x34185D0E: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34185D12: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34185D16: F240 6199 MOVW R1, #0x0699
0x34185D1A: F007 F809 BL assert_failed ; 0x3418CD30
.L572:
0x34185D1E: 9804 LDR R0, [SP, #16]
0x34185D20: 6CC0 LDR R0, [R0, #76]
0x34185D22: B128 CBZ R0, .L573 ; 0x34185D30
0x34185D24: 9804 LDR R0, [SP, #16]
0x34185D26: 6CC0 LDR R0, [R0, #76]
0x34185D28: F5B0 7F80 CMP.W R0, #0x0100
0x34185D2C: D800 BHI 46L573 ; 0x34185D30
0x34185D2E: E007 B 46L574 ; 0x34185D40
.L573:
0x34185D30: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34185D34: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34185D38: F240 619A MOVW R1, #0x069A
0x34185D3C: F006 FFF8 BL assert_failed ; 0x3418CD30
.L574:
0x34185D40: F248 01E4 MOVW R1, #0x80E4
0x34185D44: F2C5 6102 MOVT R1, #0x5602
0x34185D48: 6808 LDR R0, [R1]
0x34185D4A: F64F 72FF MOVW R2, #0xFFFF
0x34185D4E: F6CC 7200 MOVT R2, #0xCF00
0x34185D52: 4010 ANDS R0, R2
0x34185D54: 9B04 LDR R3, [SP, #16]
0x34185D56: 6C9A LDR R2, [R3, #72]
0x34185D58: F8D3 C04C LDR.W R12, [R3, #76]
0x34185D5C: 2300 MOVS R3, #0
0x34185D5E: F6CF 73FF MOVT R3, #0xFFFF
0x34185D62: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34185D66: 431A ORRS R2, R3
0x34185D68: 4310 ORRS R0, R2
0x34185D6A: 6008 STR R0, [R1]
0x34185D6C: F001 FF1C BL LL_RCC_IC9_Enable ; 0x34187BA8
0x34185D70: E059 B 46L582 ; 0x34185E26
.L575:
0x34185D72: 9804 LDR R0, [SP, #16]
0x34185D74: F8D0 0140 LDR.W R0, [R0, #0x0140]
0x34185D78: F241 0120 MOVW R1, #0x1020
0x34185D7C: F2C0 7103 MOVT R1, #0x0703
0x34185D80: 4288 CMP R0, R1
0x34185D82: D144 BNE 46L581 ; 0x34185E0E
0x34185D84: 9804 LDR R0, [SP, #16]
0x34185D86: 6F00 LDR R0, [R0, #112]
0x34185D88: B170 CBZ R0, .L576 ; 0x34185DA8
0x34185D8A: 9804 LDR R0, [SP, #16]
0x34185D8C: 6F00 LDR R0, [R0, #112]
0x34185D8E: F1B0 5F80 CMP.W R0, #0x10000000
0x34185D92: D009 BEQ 46L576 ; 0x34185DA8
0x34185D94: 9804 LDR R0, [SP, #16]
0x34185D96: 6F00 LDR R0, [R0, #112]
0x34185D98: F1B0 5F00 CMP.W R0, #0x20000000
0x34185D9C: D004 BEQ 46L576 ; 0x34185DA8
0x34185D9E: 9804 LDR R0, [SP, #16]
0x34185DA0: 6F00 LDR R0, [R0, #112]
0x34185DA2: F1B0 5F40 CMP.W R0, #0x30000000
0x34185DA6: D100 BNE 46L577 ; 0x34185DAA
.L576:
0x34185DA8: E007 B 46L578 ; 0x34185DBA
.L577:
0x34185DAA: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34185DAE: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34185DB2: F240 61A6 MOVW R1, #0x06A6
0x34185DB6: F006 FFBB BL assert_failed ; 0x3418CD30
.L578:
0x34185DBA: 9804 LDR R0, [SP, #16]
0x34185DBC: 6F40 LDR R0, [R0, #116]
0x34185DBE: B128 CBZ R0, .L579 ; 0x34185DCC
0x34185DC0: 9804 LDR R0, [SP, #16]
0x34185DC2: 6F40 LDR R0, [R0, #116]
0x34185DC4: F5B0 7F80 CMP.W R0, #0x0100
0x34185DC8: D800 BHI 46L579 ; 0x34185DCC
0x34185DCA: E007 B 46L580 ; 0x34185DDC
.L579:
0x34185DCC: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34185DD0: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34185DD4: F240 61A7 MOVW R1, #0x06A7
0x34185DD8: F006 FFAA BL assert_failed ; 0x3418CD30
.L580:
0x34185DDC: F248 01F8 MOVW R1, #0x80F8
0x34185DE0: F2C5 6102 MOVT R1, #0x5602
0x34185DE4: 6808 LDR R0, [R1]
0x34185DE6: F64F 72FF MOVW R2, #0xFFFF
0x34185DEA: F6CC 7200 MOVT R2, #0xCF00
0x34185DEE: 4010 ANDS R0, R2
0x34185DF0: 9B04 LDR R3, [SP, #16]
0x34185DF2: 6F1A LDR R2, [R3, #112]
0x34185DF4: F8D3 C074 LDR.W R12, [R3, #116]
0x34185DF8: 2300 MOVS R3, #0
0x34185DFA: F6CF 73FF MOVT R3, #0xFFFF
0x34185DFE: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34185E02: 431A ORRS R2, R3
0x34185E04: 4310 ORRS R0, R2
0x34185E06: 6008 STR R0, [R1]
0x34185E08: F001 FED6 BL LL_RCC_IC14_Enable ; 0x34187BB8
0x34185E0C: E00B B 46L582 ; 0x34185E26
.L581:
0x34185E0E: 9804 LDR R0, [SP, #16]
0x34185E10: F8D0 0140 LDR.W R0, [R0, #0x0140]
0x34185E14: F241 0120 MOVW R1, #0x1020
0x34185E18: F2C0 7101 MOVT R1, #0x0701
0x34185E1C: 4288 CMP R0, R1
0x34185E1E: D102 BNE 46L582 ; 0x34185E26
0x34185E20: F009 FA68 BL LL_RCC_CLKP_Enable ; 0x3418F2F4
0x34185E24: E7FF B 46L582 ; 0x34185E26
.L582:
0x34185E26: 9804 LDR R0, [SP, #16]
0x34185E28: F8D0 0140 LDR.W R0, [R0, #0x0140]
0x34185E2C: F001 FF22 BL LL_RCC_SetSPIClockSource ; 0x34187C74
.L583:
0x34185E30: 9804 LDR R0, [SP, #16]
0x34185E32: 7900 LDRB R0, [R0, #4]
0x34185E34: 0680 LSLS R0, R0, #26
0x34185E36: 2800 CMP R0, #0
0x34185E38: F140 80F5 BPL.W 46L600 ; 0x34186026
0x34185E3C: 9804 LDR R0, [SP, #16]
0x34185E3E: F8D0 0144 LDR.W R0, [R0, #0x0144]
0x34185E42: F241 4120 MOVW R1, #0x1420
0x34185E46: F2C0 7100 MOVT R1, #0x0700
0x34185E4A: 4288 CMP R0, R1
0x34185E4C: D035 BEQ 46L584 ; 0x34185EBA
0x34185E4E: 9804 LDR R0, [SP, #16]
0x34185E50: F8D0 0144 LDR.W R0, [R0, #0x0144]
0x34185E54: F241 4120 MOVW R1, #0x1420
0x34185E58: F2C0 7101 MOVT R1, #0x0701
0x34185E5C: 4288 CMP R0, R1
0x34185E5E: D02C BEQ 46L584 ; 0x34185EBA
0x34185E60: 9804 LDR R0, [SP, #16]
0x34185E62: F8D0 0144 LDR.W R0, [R0, #0x0144]
0x34185E66: F241 4120 MOVW R1, #0x1420
0x34185E6A: F2C0 7102 MOVT R1, #0x0702
0x34185E6E: 4288 CMP R0, R1
0x34185E70: D023 BEQ 46L584 ; 0x34185EBA
0x34185E72: 9804 LDR R0, [SP, #16]
0x34185E74: F8D0 0144 LDR.W R0, [R0, #0x0144]
0x34185E78: F241 4120 MOVW R1, #0x1420
0x34185E7C: F2C0 7103 MOVT R1, #0x0703
0x34185E80: 4288 CMP R0, R1
0x34185E82: D01A BEQ 46L584 ; 0x34185EBA
0x34185E84: 9804 LDR R0, [SP, #16]
0x34185E86: F8D0 0144 LDR.W R0, [R0, #0x0144]
0x34185E8A: F241 4120 MOVW R1, #0x1420
0x34185E8E: F2C0 7104 MOVT R1, #0x0704
0x34185E92: 4288 CMP R0, R1
0x34185E94: D011 BEQ 46L584 ; 0x34185EBA
0x34185E96: 9804 LDR R0, [SP, #16]
0x34185E98: F8D0 0144 LDR.W R0, [R0, #0x0144]
0x34185E9C: F241 4120 MOVW R1, #0x1420
0x34185EA0: F2C0 7105 MOVT R1, #0x0705
0x34185EA4: 4288 CMP R0, R1
0x34185EA6: D008 BEQ 46L584 ; 0x34185EBA
0x34185EA8: 9804 LDR R0, [SP, #16]
0x34185EAA: F8D0 0144 LDR.W R0, [R0, #0x0144]
0x34185EAE: F241 4120 MOVW R1, #0x1420
0x34185EB2: F2C0 7106 MOVT R1, #0x0706
0x34185EB6: 4288 CMP R0, R1
0x34185EB8: D100 BNE 46L585 ; 0x34185EBC
.L584:
0x34185EBA: E007 B 46L586 ; 0x34185ECC
.L585:
0x34185EBC: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34185EC0: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34185EC4: F240 61C1 MOVW R1, #0x06C1
0x34185EC8: F006 FF32 BL assert_failed ; 0x3418CD30
.L586:
0x34185ECC: 9804 LDR R0, [SP, #16]
0x34185ECE: F8D0 0144 LDR.W R0, [R0, #0x0144]
0x34185ED2: F241 4120 MOVW R1, #0x1420
0x34185ED6: F2C0 7102 MOVT R1, #0x0702
0x34185EDA: 4288 CMP R0, R1
0x34185EDC: D144 BNE 46L592 ; 0x34185F68
0x34185EDE: 9804 LDR R0, [SP, #16]
0x34185EE0: 6C80 LDR R0, [R0, #72]
0x34185EE2: B170 CBZ R0, .L587 ; 0x34185F02
0x34185EE4: 9804 LDR R0, [SP, #16]
0x34185EE6: 6C80 LDR R0, [R0, #72]
0x34185EE8: F1B0 5F80 CMP.W R0, #0x10000000
0x34185EEC: D009 BEQ 46L587 ; 0x34185F02
0x34185EEE: 9804 LDR R0, [SP, #16]
0x34185EF0: 6C80 LDR R0, [R0, #72]
0x34185EF2: F1B0 5F00 CMP.W R0, #0x20000000
0x34185EF6: D004 BEQ 46L587 ; 0x34185F02
0x34185EF8: 9804 LDR R0, [SP, #16]
0x34185EFA: 6C80 LDR R0, [R0, #72]
0x34185EFC: F1B0 5F40 CMP.W R0, #0x30000000
0x34185F00: D100 BNE 46L588 ; 0x34185F04
.L587:
0x34185F02: E007 B 46L589 ; 0x34185F14
.L588:
0x34185F04: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34185F08: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34185F0C: F240 61C6 MOVW R1, #0x06C6
0x34185F10: F006 FF0E BL assert_failed ; 0x3418CD30
.L589:
0x34185F14: 9804 LDR R0, [SP, #16]
0x34185F16: 6CC0 LDR R0, [R0, #76]
0x34185F18: B128 CBZ R0, .L590 ; 0x34185F26
0x34185F1A: 9804 LDR R0, [SP, #16]
0x34185F1C: 6CC0 LDR R0, [R0, #76]
0x34185F1E: F5B0 7F80 CMP.W R0, #0x0100
0x34185F22: D800 BHI 46L590 ; 0x34185F26
0x34185F24: E007 B 46L591 ; 0x34185F36
.L590:
0x34185F26: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34185F2A: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34185F2E: F240 61C7 MOVW R1, #0x06C7
0x34185F32: F006 FEFD BL assert_failed ; 0x3418CD30
.L591:
0x34185F36: F248 01E4 MOVW R1, #0x80E4
0x34185F3A: F2C5 6102 MOVT R1, #0x5602
0x34185F3E: 6808 LDR R0, [R1]
0x34185F40: F64F 72FF MOVW R2, #0xFFFF
0x34185F44: F6CC 7200 MOVT R2, #0xCF00
0x34185F48: 4010 ANDS R0, R2
0x34185F4A: 9B04 LDR R3, [SP, #16]
0x34185F4C: 6C9A LDR R2, [R3, #72]
0x34185F4E: F8D3 C04C LDR.W R12, [R3, #76]
0x34185F52: 2300 MOVS R3, #0
0x34185F54: F6CF 73FF MOVT R3, #0xFFFF
0x34185F58: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34185F5C: 431A ORRS R2, R3
0x34185F5E: 4310 ORRS R0, R2
0x34185F60: 6008 STR R0, [R1]
0x34185F62: F001 FE21 BL LL_RCC_IC9_Enable ; 0x34187BA8
0x34185F66: E059 B 46L599 ; 0x3418601C
.L592:
0x34185F68: 9804 LDR R0, [SP, #16]
0x34185F6A: F8D0 0144 LDR.W R0, [R0, #0x0144]
0x34185F6E: F241 4120 MOVW R1, #0x1420
0x34185F72: F2C0 7103 MOVT R1, #0x0703
0x34185F76: 4288 CMP R0, R1
0x34185F78: D144 BNE 46L598 ; 0x34186004
0x34185F7A: 9804 LDR R0, [SP, #16]
0x34185F7C: 6F00 LDR R0, [R0, #112]
0x34185F7E: B170 CBZ R0, .L593 ; 0x34185F9E
0x34185F80: 9804 LDR R0, [SP, #16]
0x34185F82: 6F00 LDR R0, [R0, #112]
0x34185F84: F1B0 5F80 CMP.W R0, #0x10000000
0x34185F88: D009 BEQ 46L593 ; 0x34185F9E
0x34185F8A: 9804 LDR R0, [SP, #16]
0x34185F8C: 6F00 LDR R0, [R0, #112]
0x34185F8E: F1B0 5F00 CMP.W R0, #0x20000000
0x34185F92: D004 BEQ 46L593 ; 0x34185F9E
0x34185F94: 9804 LDR R0, [SP, #16]
0x34185F96: 6F00 LDR R0, [R0, #112]
0x34185F98: F1B0 5F40 CMP.W R0, #0x30000000
0x34185F9C: D100 BNE 46L594 ; 0x34185FA0
.L593:
0x34185F9E: E007 B 46L595 ; 0x34185FB0
.L594:
0x34185FA0: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34185FA4: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34185FA8: F240 61D3 MOVW R1, #0x06D3
0x34185FAC: F006 FEC0 BL assert_failed ; 0x3418CD30
.L595:
0x34185FB0: 9804 LDR R0, [SP, #16]
0x34185FB2: 6F40 LDR R0, [R0, #116]
0x34185FB4: B128 CBZ R0, .L596 ; 0x34185FC2
0x34185FB6: 9804 LDR R0, [SP, #16]
0x34185FB8: 6F40 LDR R0, [R0, #116]
0x34185FBA: F5B0 7F80 CMP.W R0, #0x0100
0x34185FBE: D800 BHI 46L596 ; 0x34185FC2
0x34185FC0: E007 B 46L597 ; 0x34185FD2
.L596:
0x34185FC2: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34185FC6: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34185FCA: F240 61D4 MOVW R1, #0x06D4
0x34185FCE: F006 FEAF BL assert_failed ; 0x3418CD30
.L597:
0x34185FD2: F248 01F8 MOVW R1, #0x80F8
0x34185FD6: F2C5 6102 MOVT R1, #0x5602
0x34185FDA: 6808 LDR R0, [R1]
0x34185FDC: F64F 72FF MOVW R2, #0xFFFF
0x34185FE0: F6CC 7200 MOVT R2, #0xCF00
0x34185FE4: 4010 ANDS R0, R2
0x34185FE6: 9B04 LDR R3, [SP, #16]
0x34185FE8: 6F1A LDR R2, [R3, #112]
0x34185FEA: F8D3 C074 LDR.W R12, [R3, #116]
0x34185FEE: 2300 MOVS R3, #0
0x34185FF0: F6CF 73FF MOVT R3, #0xFFFF
0x34185FF4: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34185FF8: 431A ORRS R2, R3
0x34185FFA: 4310 ORRS R0, R2
0x34185FFC: 6008 STR R0, [R1]
0x34185FFE: F001 FDDB BL LL_RCC_IC14_Enable ; 0x34187BB8
0x34186002: E00B B 46L599 ; 0x3418601C
.L598:
0x34186004: 9804 LDR R0, [SP, #16]
0x34186006: F8D0 0144 LDR.W R0, [R0, #0x0144]
0x3418600A: F241 4120 MOVW R1, #0x1420
0x3418600E: F2C0 7101 MOVT R1, #0x0701
0x34186012: 4288 CMP R0, R1
0x34186014: D102 BNE 46L599 ; 0x3418601C
0x34186016: F009 F96D BL LL_RCC_CLKP_Enable ; 0x3418F2F4
0x3418601A: E7FF B 46L599 ; 0x3418601C
.L599:
0x3418601C: 9804 LDR R0, [SP, #16]
0x3418601E: F8D0 0144 LDR.W R0, [R0, #0x0144]
0x34186022: F001 FE27 BL LL_RCC_SetSPIClockSource ; 0x34187C74
.L600:
0x34186026: 9804 LDR R0, [SP, #16]
0x34186028: 7900 LDRB R0, [R0, #4]
0x3418602A: 0640 LSLS R0, R0, #25
0x3418602C: 2800 CMP R0, #0
0x3418602E: F140 80F5 BPL.W 46L617 ; 0x3418621C
0x34186032: 9804 LDR R0, [SP, #16]
0x34186034: F8D0 0148 LDR.W R0, [R0, #0x0148]
0x34186038: F641 0120 MOVW R1, #0x1820
0x3418603C: F2C0 7100 MOVT R1, #0x0700
0x34186040: 4288 CMP R0, R1
0x34186042: D035 BEQ 46L601 ; 0x341860B0
0x34186044: 9804 LDR R0, [SP, #16]
0x34186046: F8D0 0148 LDR.W R0, [R0, #0x0148]
0x3418604A: F641 0120 MOVW R1, #0x1820
0x3418604E: F2C0 7101 MOVT R1, #0x0701
0x34186052: 4288 CMP R0, R1
0x34186054: D02C BEQ 46L601 ; 0x341860B0
0x34186056: 9804 LDR R0, [SP, #16]
0x34186058: F8D0 0148 LDR.W R0, [R0, #0x0148]
0x3418605C: F641 0120 MOVW R1, #0x1820
0x34186060: F2C0 7102 MOVT R1, #0x0702
0x34186064: 4288 CMP R0, R1
0x34186066: D023 BEQ 46L601 ; 0x341860B0
0x34186068: 9804 LDR R0, [SP, #16]
0x3418606A: F8D0 0148 LDR.W R0, [R0, #0x0148]
0x3418606E: F641 0120 MOVW R1, #0x1820
0x34186072: F2C0 7103 MOVT R1, #0x0703
0x34186076: 4288 CMP R0, R1
0x34186078: D01A BEQ 46L601 ; 0x341860B0
0x3418607A: 9804 LDR R0, [SP, #16]
0x3418607C: F8D0 0148 LDR.W R0, [R0, #0x0148]
0x34186080: F641 0120 MOVW R1, #0x1820
0x34186084: F2C0 7104 MOVT R1, #0x0704
0x34186088: 4288 CMP R0, R1
0x3418608A: D011 BEQ 46L601 ; 0x341860B0
0x3418608C: 9804 LDR R0, [SP, #16]
0x3418608E: F8D0 0148 LDR.W R0, [R0, #0x0148]
0x34186092: F641 0120 MOVW R1, #0x1820
0x34186096: F2C0 7105 MOVT R1, #0x0705
0x3418609A: 4288 CMP R0, R1
0x3418609C: D008 BEQ 46L601 ; 0x341860B0
0x3418609E: 9804 LDR R0, [SP, #16]
0x341860A0: F8D0 0148 LDR.W R0, [R0, #0x0148]
0x341860A4: F641 0120 MOVW R1, #0x1820
0x341860A8: F2C0 7106 MOVT R1, #0x0706
0x341860AC: 4288 CMP R0, R1
0x341860AE: D100 BNE 46L602 ; 0x341860B2
.L601:
0x341860B0: E007 B 46L603 ; 0x341860C2
.L602:
0x341860B2: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341860B6: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341860BA: F240 61EE MOVW R1, #0x06EE
0x341860BE: F006 FE37 BL assert_failed ; 0x3418CD30
.L603:
0x341860C2: 9804 LDR R0, [SP, #16]
0x341860C4: F8D0 0148 LDR.W R0, [R0, #0x0148]
0x341860C8: F641 0120 MOVW R1, #0x1820
0x341860CC: F2C0 7102 MOVT R1, #0x0702
0x341860D0: 4288 CMP R0, R1
0x341860D2: D144 BNE 46L609 ; 0x3418615E
0x341860D4: 9804 LDR R0, [SP, #16]
0x341860D6: 6C00 LDR R0, [R0, #64]
0x341860D8: B170 CBZ R0, .L604 ; 0x341860F8
0x341860DA: 9804 LDR R0, [SP, #16]
0x341860DC: 6C00 LDR R0, [R0, #64]
0x341860DE: F1B0 5F80 CMP.W R0, #0x10000000
0x341860E2: D009 BEQ 46L604 ; 0x341860F8
0x341860E4: 9804 LDR R0, [SP, #16]
0x341860E6: 6C00 LDR R0, [R0, #64]
0x341860E8: F1B0 5F00 CMP.W R0, #0x20000000
0x341860EC: D004 BEQ 46L604 ; 0x341860F8
0x341860EE: 9804 LDR R0, [SP, #16]
0x341860F0: 6C00 LDR R0, [R0, #64]
0x341860F2: F1B0 5F40 CMP.W R0, #0x30000000
0x341860F6: D100 BNE 46L605 ; 0x341860FA
.L604:
0x341860F8: E007 B 46L606 ; 0x3418610A
.L605:
0x341860FA: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341860FE: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34186102: F240 61F3 MOVW R1, #0x06F3
0x34186106: F006 FE13 BL assert_failed ; 0x3418CD30
.L606:
0x3418610A: 9804 LDR R0, [SP, #16]
0x3418610C: 6C40 LDR R0, [R0, #68]
0x3418610E: B128 CBZ R0, .L607 ; 0x3418611C
0x34186110: 9804 LDR R0, [SP, #16]
0x34186112: 6C40 LDR R0, [R0, #68]
0x34186114: F5B0 7F80 CMP.W R0, #0x0100
0x34186118: D800 BHI 46L607 ; 0x3418611C
0x3418611A: E007 B 46L608 ; 0x3418612C
.L607:
0x3418611C: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34186120: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34186124: F240 61F4 MOVW R1, #0x06F4
0x34186128: F006 FE02 BL assert_failed ; 0x3418CD30
.L608:
0x3418612C: F248 01E0 MOVW R1, #0x80E0
0x34186130: F2C5 6102 MOVT R1, #0x5602
0x34186134: 6808 LDR R0, [R1]
0x34186136: F64F 72FF MOVW R2, #0xFFFF
0x3418613A: F6CC 7200 MOVT R2, #0xCF00
0x3418613E: 4010 ANDS R0, R2
0x34186140: 9B04 LDR R3, [SP, #16]
0x34186142: 6C1A LDR R2, [R3, #64]
0x34186144: F8D3 C044 LDR.W R12, [R3, #68]
0x34186148: 2300 MOVS R3, #0
0x3418614A: F6CF 73FF MOVT R3, #0xFFFF
0x3418614E: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34186152: 431A ORRS R2, R3
0x34186154: 4310 ORRS R0, R2
0x34186156: 6008 STR R0, [R1]
0x34186158: F009 F8DC BL LL_RCC_IC8_Enable ; 0x3418F314
0x3418615C: E059 B 46L616 ; 0x34186212
.L609:
0x3418615E: 9804 LDR R0, [SP, #16]
0x34186160: F8D0 0148 LDR.W R0, [R0, #0x0148]
0x34186164: F641 0120 MOVW R1, #0x1820
0x34186168: F2C0 7103 MOVT R1, #0x0703
0x3418616C: 4288 CMP R0, R1
0x3418616E: D144 BNE 46L615 ; 0x341861FA
0x34186170: 9804 LDR R0, [SP, #16]
0x34186172: 6C80 LDR R0, [R0, #72]
0x34186174: B170 CBZ R0, .L610 ; 0x34186194
0x34186176: 9804 LDR R0, [SP, #16]
0x34186178: 6C80 LDR R0, [R0, #72]
0x3418617A: F1B0 5F80 CMP.W R0, #0x10000000
0x3418617E: D009 BEQ 46L610 ; 0x34186194
0x34186180: 9804 LDR R0, [SP, #16]
0x34186182: 6C80 LDR R0, [R0, #72]
0x34186184: F1B0 5F00 CMP.W R0, #0x20000000
0x34186188: D004 BEQ 46L610 ; 0x34186194
0x3418618A: 9804 LDR R0, [SP, #16]
0x3418618C: 6C80 LDR R0, [R0, #72]
0x3418618E: F1B0 5F40 CMP.W R0, #0x30000000
0x34186192: D100 BNE 46L611 ; 0x34186196
.L610:
0x34186194: E007 B 46L612 ; 0x341861A6
.L611:
0x34186196: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x3418619A: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x3418619E: F44F 61E0 MOV.W R1, #0x0700
0x341861A2: F006 FDC5 BL assert_failed ; 0x3418CD30
.L612:
0x341861A6: 9804 LDR R0, [SP, #16]
0x341861A8: 6CC0 LDR R0, [R0, #76]
0x341861AA: B128 CBZ R0, .L613 ; 0x341861B8
0x341861AC: 9804 LDR R0, [SP, #16]
0x341861AE: 6CC0 LDR R0, [R0, #76]
0x341861B0: F5B0 7F80 CMP.W R0, #0x0100
0x341861B4: D800 BHI 46L613 ; 0x341861B8
0x341861B6: E007 B 46L614 ; 0x341861C8
.L613:
0x341861B8: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341861BC: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341861C0: F240 7101 MOVW R1, #0x0701
0x341861C4: F006 FDB4 BL assert_failed ; 0x3418CD30
.L614:
0x341861C8: F248 01E4 MOVW R1, #0x80E4
0x341861CC: F2C5 6102 MOVT R1, #0x5602
0x341861D0: 6808 LDR R0, [R1]
0x341861D2: F64F 72FF MOVW R2, #0xFFFF
0x341861D6: F6CC 7200 MOVT R2, #0xCF00
0x341861DA: 4010 ANDS R0, R2
0x341861DC: 9B04 LDR R3, [SP, #16]
0x341861DE: 6C9A LDR R2, [R3, #72]
0x341861E0: F8D3 C04C LDR.W R12, [R3, #76]
0x341861E4: 2300 MOVS R3, #0
0x341861E6: F6CF 73FF MOVT R3, #0xFFFF
0x341861EA: EB03 430C ADD.W R3, R3, R12, LSL #16
0x341861EE: 431A ORRS R2, R3
0x341861F0: 4310 ORRS R0, R2
0x341861F2: 6008 STR R0, [R1]
0x341861F4: F001 FCD8 BL LL_RCC_IC9_Enable ; 0x34187BA8
0x341861F8: E00B B 46L616 ; 0x34186212
.L615:
0x341861FA: 9804 LDR R0, [SP, #16]
0x341861FC: F8D0 0148 LDR.W R0, [R0, #0x0148]
0x34186200: F641 0120 MOVW R1, #0x1820
0x34186204: F2C0 7101 MOVT R1, #0x0701
0x34186208: 4288 CMP R0, R1
0x3418620A: D102 BNE 46L616 ; 0x34186212
0x3418620C: F009 F872 BL LL_RCC_CLKP_Enable ; 0x3418F2F4
0x34186210: E7FF B 46L616 ; 0x34186212
.L616:
0x34186212: 9804 LDR R0, [SP, #16]
0x34186214: F8D0 0148 LDR.W R0, [R0, #0x0148]
0x34186218: F001 FD2C BL LL_RCC_SetSPIClockSource ; 0x34187C74
.L617:
0x3418621C: 9804 LDR R0, [SP, #16]
0x3418621E: 7940 LDRB R0, [R0, #5]
0x34186220: 07C0 LSLS R0, R0, #31
0x34186222: 2800 CMP R0, #0
0x34186224: F000 80EB BEQ.W 46L634 ; 0x341863FE
0x34186228: 9804 LDR R0, [SP, #16]
0x3418622A: F8D0 0150 LDR.W R0, [R0, #0x0150]
0x3418622E: 2130 MOVS R1, #48
0x34186230: F2C0 7100 MOVT R1, #0x0700
0x34186234: 4288 CMP R0, R1
0x34186236: D02F BEQ 46L618 ; 0x34186298
0x34186238: 9804 LDR R0, [SP, #16]
0x3418623A: F8D0 0150 LDR.W R0, [R0, #0x0150]
0x3418623E: 2130 MOVS R1, #48
0x34186240: F2C0 7101 MOVT R1, #0x0701
0x34186244: 4288 CMP R0, R1
0x34186246: D027 BEQ 46L618 ; 0x34186298
0x34186248: 9804 LDR R0, [SP, #16]
0x3418624A: F8D0 0150 LDR.W R0, [R0, #0x0150]
0x3418624E: 2130 MOVS R1, #48
0x34186250: F2C0 7102 MOVT R1, #0x0702
0x34186254: 4288 CMP R0, R1
0x34186256: D01F BEQ 46L618 ; 0x34186298
0x34186258: 9804 LDR R0, [SP, #16]
0x3418625A: F8D0 0150 LDR.W R0, [R0, #0x0150]
0x3418625E: 2130 MOVS R1, #48
0x34186260: F2C0 7103 MOVT R1, #0x0703
0x34186264: 4288 CMP R0, R1
0x34186266: D017 BEQ 46L618 ; 0x34186298
0x34186268: 9804 LDR R0, [SP, #16]
0x3418626A: F8D0 0150 LDR.W R0, [R0, #0x0150]
0x3418626E: 2130 MOVS R1, #48
0x34186270: F2C0 7104 MOVT R1, #0x0704
0x34186274: 4288 CMP R0, R1
0x34186276: D00F BEQ 46L618 ; 0x34186298
0x34186278: 9804 LDR R0, [SP, #16]
0x3418627A: F8D0 0150 LDR.W R0, [R0, #0x0150]
0x3418627E: 2130 MOVS R1, #48
0x34186280: F2C0 7105 MOVT R1, #0x0705
0x34186284: 4288 CMP R0, R1
0x34186286: D007 BEQ 46L618 ; 0x34186298
0x34186288: 9804 LDR R0, [SP, #16]
0x3418628A: F8D0 0150 LDR.W R0, [R0, #0x0150]
0x3418628E: 2130 MOVS R1, #48
0x34186290: F2C0 7106 MOVT R1, #0x0706
0x34186294: 4288 CMP R0, R1
0x34186296: D100 BNE 46L619 ; 0x3418629A
.L618:
0x34186298: E007 B 46L620 ; 0x341862AA
.L619:
0x3418629A: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x3418629E: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341862A2: F240 711B MOVW R1, #0x071B
0x341862A6: F006 FD43 BL assert_failed ; 0x3418CD30
.L620:
0x341862AA: 9804 LDR R0, [SP, #16]
0x341862AC: F8D0 0150 LDR.W R0, [R0, #0x0150]
0x341862B0: 2130 MOVS R1, #48
0x341862B2: F2C0 7102 MOVT R1, #0x0702
0x341862B6: 4288 CMP R0, R1
0x341862B8: D144 BNE 46L626 ; 0x34186344
0x341862BA: 9804 LDR R0, [SP, #16]
0x341862BC: 6C80 LDR R0, [R0, #72]
0x341862BE: B170 CBZ R0, .L621 ; 0x341862DE
0x341862C0: 9804 LDR R0, [SP, #16]
0x341862C2: 6C80 LDR R0, [R0, #72]
0x341862C4: F1B0 5F80 CMP.W R0, #0x10000000
0x341862C8: D009 BEQ 46L621 ; 0x341862DE
0x341862CA: 9804 LDR R0, [SP, #16]
0x341862CC: 6C80 LDR R0, [R0, #72]
0x341862CE: F1B0 5F00 CMP.W R0, #0x20000000
0x341862D2: D004 BEQ 46L621 ; 0x341862DE
0x341862D4: 9804 LDR R0, [SP, #16]
0x341862D6: 6C80 LDR R0, [R0, #72]
0x341862D8: F1B0 5F40 CMP.W R0, #0x30000000
0x341862DC: D100 BNE 46L622 ; 0x341862E0
.L621:
0x341862DE: E007 B 46L623 ; 0x341862F0
.L622:
0x341862E0: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341862E4: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341862E8: F44F 61E4 MOV.W R1, #0x0720
0x341862EC: F006 FD20 BL assert_failed ; 0x3418CD30
.L623:
0x341862F0: 9804 LDR R0, [SP, #16]
0x341862F2: 6CC0 LDR R0, [R0, #76]
0x341862F4: B128 CBZ R0, .L624 ; 0x34186302
0x341862F6: 9804 LDR R0, [SP, #16]
0x341862F8: 6CC0 LDR R0, [R0, #76]
0x341862FA: F5B0 7F80 CMP.W R0, #0x0100
0x341862FE: D800 BHI 46L624 ; 0x34186302
0x34186300: E007 B 46L625 ; 0x34186312
.L624:
0x34186302: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34186306: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x3418630A: F240 7121 MOVW R1, #0x0721
0x3418630E: F006 FD0F BL assert_failed ; 0x3418CD30
.L625:
0x34186312: F248 01E4 MOVW R1, #0x80E4
0x34186316: F2C5 6102 MOVT R1, #0x5602
0x3418631A: 6808 LDR R0, [R1]
0x3418631C: F64F 72FF MOVW R2, #0xFFFF
0x34186320: F6CC 7200 MOVT R2, #0xCF00
0x34186324: 4010 ANDS R0, R2
0x34186326: 9B04 LDR R3, [SP, #16]
0x34186328: 6C9A LDR R2, [R3, #72]
0x3418632A: F8D3 C04C LDR.W R12, [R3, #76]
0x3418632E: 2300 MOVS R3, #0
0x34186330: F6CF 73FF MOVT R3, #0xFFFF
0x34186334: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34186338: 431A ORRS R2, R3
0x3418633A: 4310 ORRS R0, R2
0x3418633C: 6008 STR R0, [R1]
0x3418633E: F001 FC33 BL LL_RCC_IC9_Enable ; 0x34187BA8
0x34186342: E057 B 46L633 ; 0x341863F4
.L626:
0x34186344: 9804 LDR R0, [SP, #16]
0x34186346: F8D0 0150 LDR.W R0, [R0, #0x0150]
0x3418634A: 2130 MOVS R1, #48
0x3418634C: F2C0 7103 MOVT R1, #0x0703
0x34186350: 4288 CMP R0, R1
0x34186352: D144 BNE 46L632 ; 0x341863DE
0x34186354: 9804 LDR R0, [SP, #16]
0x34186356: 6F00 LDR R0, [R0, #112]
0x34186358: B170 CBZ R0, .L627 ; 0x34186378
0x3418635A: 9804 LDR R0, [SP, #16]
0x3418635C: 6F00 LDR R0, [R0, #112]
0x3418635E: F1B0 5F80 CMP.W R0, #0x10000000
0x34186362: D009 BEQ 46L627 ; 0x34186378
0x34186364: 9804 LDR R0, [SP, #16]
0x34186366: 6F00 LDR R0, [R0, #112]
0x34186368: F1B0 5F00 CMP.W R0, #0x20000000
0x3418636C: D004 BEQ 46L627 ; 0x34186378
0x3418636E: 9804 LDR R0, [SP, #16]
0x34186370: 6F00 LDR R0, [R0, #112]
0x34186372: F1B0 5F40 CMP.W R0, #0x30000000
0x34186376: D100 BNE 46L628 ; 0x3418637A
.L627:
0x34186378: E007 B 46L629 ; 0x3418638A
.L628:
0x3418637A: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x3418637E: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34186382: F240 712D MOVW R1, #0x072D
0x34186386: F006 FCD3 BL assert_failed ; 0x3418CD30
.L629:
0x3418638A: 9804 LDR R0, [SP, #16]
0x3418638C: 6F40 LDR R0, [R0, #116]
0x3418638E: B128 CBZ R0, .L630 ; 0x3418639C
0x34186390: 9804 LDR R0, [SP, #16]
0x34186392: 6F40 LDR R0, [R0, #116]
0x34186394: F5B0 7F80 CMP.W R0, #0x0100
0x34186398: D800 BHI 46L630 ; 0x3418639C
0x3418639A: E007 B 46L631 ; 0x341863AC
.L630:
0x3418639C: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341863A0: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341863A4: F240 712E MOVW R1, #0x072E
0x341863A8: F006 FCC2 BL assert_failed ; 0x3418CD30
.L631:
0x341863AC: F248 01F8 MOVW R1, #0x80F8
0x341863B0: F2C5 6102 MOVT R1, #0x5602
0x341863B4: 6808 LDR R0, [R1]
0x341863B6: F64F 72FF MOVW R2, #0xFFFF
0x341863BA: F6CC 7200 MOVT R2, #0xCF00
0x341863BE: 4010 ANDS R0, R2
0x341863C0: 9B04 LDR R3, [SP, #16]
0x341863C2: 6F1A LDR R2, [R3, #112]
0x341863C4: F8D3 C074 LDR.W R12, [R3, #116]
0x341863C8: 2300 MOVS R3, #0
0x341863CA: F6CF 73FF MOVT R3, #0xFFFF
0x341863CE: EB03 430C ADD.W R3, R3, R12, LSL #16
0x341863D2: 431A ORRS R2, R3
0x341863D4: 4310 ORRS R0, R2
0x341863D6: 6008 STR R0, [R1]
0x341863D8: F001 FBEE BL LL_RCC_IC14_Enable ; 0x34187BB8
0x341863DC: E00A B 46L633 ; 0x341863F4
.L632:
0x341863DE: 9804 LDR R0, [SP, #16]
0x341863E0: F8D0 0150 LDR.W R0, [R0, #0x0150]
0x341863E4: 2130 MOVS R1, #48
0x341863E6: F2C0 7101 MOVT R1, #0x0701
0x341863EA: 4288 CMP R0, R1
0x341863EC: D102 BNE 46L633 ; 0x341863F4
0x341863EE: F008 FF81 BL LL_RCC_CLKP_Enable ; 0x3418F2F4
0x341863F2: E7FF B 46L633 ; 0x341863F4
.L633:
0x341863F4: 9804 LDR R0, [SP, #16]
0x341863F6: F8D0 0150 LDR.W R0, [R0, #0x0150]
0x341863FA: F001 FC43 BL LL_RCC_SetUSARTClockSource ; 0x34187C84
.L634:
0x341863FE: 9804 LDR R0, [SP, #16]
0x34186400: 7940 LDRB R0, [R0, #5]
0x34186402: 0780 LSLS R0, R0, #30
0x34186404: 2800 CMP R0, #0
0x34186406: F140 80F5 BPL.W 46L651 ; 0x341865F4
0x3418640A: 9804 LDR R0, [SP, #16]
0x3418640C: F8D0 0154 LDR.W R0, [R0, #0x0154]
0x34186410: F240 4130 MOVW R1, #0x0430
0x34186414: F2C0 7100 MOVT R1, #0x0700
0x34186418: 4288 CMP R0, R1
0x3418641A: D035 BEQ 46L635 ; 0x34186488
0x3418641C: 9804 LDR R0, [SP, #16]
0x3418641E: F8D0 0154 LDR.W R0, [R0, #0x0154]
0x34186422: F240 4130 MOVW R1, #0x0430
0x34186426: F2C0 7101 MOVT R1, #0x0701
0x3418642A: 4288 CMP R0, R1
0x3418642C: D02C BEQ 46L635 ; 0x34186488
0x3418642E: 9804 LDR R0, [SP, #16]
0x34186430: F8D0 0154 LDR.W R0, [R0, #0x0154]
0x34186434: F240 4130 MOVW R1, #0x0430
0x34186438: F2C0 7102 MOVT R1, #0x0702
0x3418643C: 4288 CMP R0, R1
0x3418643E: D023 BEQ 46L635 ; 0x34186488
0x34186440: 9804 LDR R0, [SP, #16]
0x34186442: F8D0 0154 LDR.W R0, [R0, #0x0154]
0x34186446: F240 4130 MOVW R1, #0x0430
0x3418644A: F2C0 7103 MOVT R1, #0x0703
0x3418644E: 4288 CMP R0, R1
0x34186450: D01A BEQ 46L635 ; 0x34186488
0x34186452: 9804 LDR R0, [SP, #16]
0x34186454: F8D0 0154 LDR.W R0, [R0, #0x0154]
0x34186458: F240 4130 MOVW R1, #0x0430
0x3418645C: F2C0 7104 MOVT R1, #0x0704
0x34186460: 4288 CMP R0, R1
0x34186462: D011 BEQ 46L635 ; 0x34186488
0x34186464: 9804 LDR R0, [SP, #16]
0x34186466: F8D0 0154 LDR.W R0, [R0, #0x0154]
0x3418646A: F240 4130 MOVW R1, #0x0430
0x3418646E: F2C0 7105 MOVT R1, #0x0705
0x34186472: 4288 CMP R0, R1
0x34186474: D008 BEQ 46L635 ; 0x34186488
0x34186476: 9804 LDR R0, [SP, #16]
0x34186478: F8D0 0154 LDR.W R0, [R0, #0x0154]
0x3418647C: F240 4130 MOVW R1, #0x0430
0x34186480: F2C0 7106 MOVT R1, #0x0706
0x34186484: 4288 CMP R0, R1
0x34186486: D100 BNE 46L636 ; 0x3418648A
.L635:
0x34186488: E007 B 46L637 ; 0x3418649A
.L636:
0x3418648A: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x3418648E: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34186492: F44F 61E9 MOV.W R1, #0x0748
0x34186496: F006 FC4B BL assert_failed ; 0x3418CD30
.L637:
0x3418649A: 9804 LDR R0, [SP, #16]
0x3418649C: F8D0 0154 LDR.W R0, [R0, #0x0154]
0x341864A0: F240 4130 MOVW R1, #0x0430
0x341864A4: F2C0 7102 MOVT R1, #0x0702
0x341864A8: 4288 CMP R0, R1
0x341864AA: D144 BNE 46L643 ; 0x34186536
0x341864AC: 9804 LDR R0, [SP, #16]
0x341864AE: 6C80 LDR R0, [R0, #72]
0x341864B0: B170 CBZ R0, .L638 ; 0x341864D0
0x341864B2: 9804 LDR R0, [SP, #16]
0x341864B4: 6C80 LDR R0, [R0, #72]
0x341864B6: F1B0 5F80 CMP.W R0, #0x10000000
0x341864BA: D009 BEQ 46L638 ; 0x341864D0
0x341864BC: 9804 LDR R0, [SP, #16]
0x341864BE: 6C80 LDR R0, [R0, #72]
0x341864C0: F1B0 5F00 CMP.W R0, #0x20000000
0x341864C4: D004 BEQ 46L638 ; 0x341864D0
0x341864C6: 9804 LDR R0, [SP, #16]
0x341864C8: 6C80 LDR R0, [R0, #72]
0x341864CA: F1B0 5F40 CMP.W R0, #0x30000000
0x341864CE: D100 BNE 46L639 ; 0x341864D2
.L638:
0x341864D0: E007 B 46L640 ; 0x341864E2
.L639:
0x341864D2: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341864D6: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341864DA: F240 714D MOVW R1, #0x074D
0x341864DE: F006 FC27 BL assert_failed ; 0x3418CD30
.L640:
0x341864E2: 9804 LDR R0, [SP, #16]
0x341864E4: 6CC0 LDR R0, [R0, #76]
0x341864E6: B128 CBZ R0, .L641 ; 0x341864F4
0x341864E8: 9804 LDR R0, [SP, #16]
0x341864EA: 6CC0 LDR R0, [R0, #76]
0x341864EC: F5B0 7F80 CMP.W R0, #0x0100
0x341864F0: D800 BHI 46L641 ; 0x341864F4
0x341864F2: E007 B 46L642 ; 0x34186504
.L641:
0x341864F4: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341864F8: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341864FC: F240 714E MOVW R1, #0x074E
0x34186500: F006 FC16 BL assert_failed ; 0x3418CD30
.L642:
0x34186504: F248 01E4 MOVW R1, #0x80E4
0x34186508: F2C5 6102 MOVT R1, #0x5602
0x3418650C: 6808 LDR R0, [R1]
0x3418650E: F64F 72FF MOVW R2, #0xFFFF
0x34186512: F6CC 7200 MOVT R2, #0xCF00
0x34186516: 4010 ANDS R0, R2
0x34186518: 9B04 LDR R3, [SP, #16]
0x3418651A: 6C9A LDR R2, [R3, #72]
0x3418651C: F8D3 C04C LDR.W R12, [R3, #76]
0x34186520: 2300 MOVS R3, #0
0x34186522: F6CF 73FF MOVT R3, #0xFFFF
0x34186526: EB03 430C ADD.W R3, R3, R12, LSL #16
0x3418652A: 431A ORRS R2, R3
0x3418652C: 4310 ORRS R0, R2
0x3418652E: 6008 STR R0, [R1]
0x34186530: F001 FB3A BL LL_RCC_IC9_Enable ; 0x34187BA8
0x34186534: E059 B 46L650 ; 0x341865EA
.L643:
0x34186536: 9804 LDR R0, [SP, #16]
0x34186538: F8D0 0154 LDR.W R0, [R0, #0x0154]
0x3418653C: F240 4130 MOVW R1, #0x0430
0x34186540: F2C0 7103 MOVT R1, #0x0703
0x34186544: 4288 CMP R0, R1
0x34186546: D144 BNE 46L649 ; 0x341865D2
0x34186548: 9804 LDR R0, [SP, #16]
0x3418654A: 6F00 LDR R0, [R0, #112]
0x3418654C: B170 CBZ R0, .L644 ; 0x3418656C
0x3418654E: 9804 LDR R0, [SP, #16]
0x34186550: 6F00 LDR R0, [R0, #112]
0x34186552: F1B0 5F80 CMP.W R0, #0x10000000
0x34186556: D009 BEQ 46L644 ; 0x3418656C
0x34186558: 9804 LDR R0, [SP, #16]
0x3418655A: 6F00 LDR R0, [R0, #112]
0x3418655C: F1B0 5F00 CMP.W R0, #0x20000000
0x34186560: D004 BEQ 46L644 ; 0x3418656C
0x34186562: 9804 LDR R0, [SP, #16]
0x34186564: 6F00 LDR R0, [R0, #112]
0x34186566: F1B0 5F40 CMP.W R0, #0x30000000
0x3418656A: D100 BNE 46L645 ; 0x3418656E
.L644:
0x3418656C: E007 B 46L646 ; 0x3418657E
.L645:
0x3418656E: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34186572: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34186576: F240 715A MOVW R1, #0x075A
0x3418657A: F006 FBD9 BL assert_failed ; 0x3418CD30
.L646:
0x3418657E: 9804 LDR R0, [SP, #16]
0x34186580: 6F40 LDR R0, [R0, #116]
0x34186582: B128 CBZ R0, .L647 ; 0x34186590
0x34186584: 9804 LDR R0, [SP, #16]
0x34186586: 6F40 LDR R0, [R0, #116]
0x34186588: F5B0 7F80 CMP.W R0, #0x0100
0x3418658C: D800 BHI 46L647 ; 0x34186590
0x3418658E: E007 B 46L648 ; 0x341865A0
.L647:
0x34186590: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34186594: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34186598: F240 715B MOVW R1, #0x075B
0x3418659C: F006 FBC8 BL assert_failed ; 0x3418CD30
.L648:
0x341865A0: F248 01F8 MOVW R1, #0x80F8
0x341865A4: F2C5 6102 MOVT R1, #0x5602
0x341865A8: 6808 LDR R0, [R1]
0x341865AA: F64F 72FF MOVW R2, #0xFFFF
0x341865AE: F6CC 7200 MOVT R2, #0xCF00
0x341865B2: 4010 ANDS R0, R2
0x341865B4: 9B04 LDR R3, [SP, #16]
0x341865B6: 6F1A LDR R2, [R3, #112]
0x341865B8: F8D3 C074 LDR.W R12, [R3, #116]
0x341865BC: 2300 MOVS R3, #0
0x341865BE: F6CF 73FF MOVT R3, #0xFFFF
0x341865C2: EB03 430C ADD.W R3, R3, R12, LSL #16
0x341865C6: 431A ORRS R2, R3
0x341865C8: 4310 ORRS R0, R2
0x341865CA: 6008 STR R0, [R1]
0x341865CC: F001 FAF4 BL LL_RCC_IC14_Enable ; 0x34187BB8
0x341865D0: E00B B 46L650 ; 0x341865EA
.L649:
0x341865D2: 9804 LDR R0, [SP, #16]
0x341865D4: F8D0 0154 LDR.W R0, [R0, #0x0154]
0x341865D8: F240 4130 MOVW R1, #0x0430
0x341865DC: F2C0 7101 MOVT R1, #0x0701
0x341865E0: 4288 CMP R0, R1
0x341865E2: D102 BNE 46L650 ; 0x341865EA
0x341865E4: F008 FE86 BL LL_RCC_CLKP_Enable ; 0x3418F2F4
0x341865E8: E7FF B 46L650 ; 0x341865EA
.L650:
0x341865EA: 9804 LDR R0, [SP, #16]
0x341865EC: F8D0 0154 LDR.W R0, [R0, #0x0154]
0x341865F0: F001 FB48 BL LL_RCC_SetUSARTClockSource ; 0x34187C84
.L651:
0x341865F4: 9804 LDR R0, [SP, #16]
0x341865F6: 7940 LDRB R0, [R0, #5]
0x341865F8: 0740 LSLS R0, R0, #29
0x341865FA: 2800 CMP R0, #0
0x341865FC: F140 80F5 BPL.W 46L668 ; 0x341867EA
0x34186600: 9804 LDR R0, [SP, #16]
0x34186602: F8D0 0158 LDR.W R0, [R0, #0x0158]
0x34186606: F640 0130 MOVW R1, #0x0830
0x3418660A: F2C0 7100 MOVT R1, #0x0700
0x3418660E: 4288 CMP R0, R1
0x34186610: D035 BEQ 46L652 ; 0x3418667E
0x34186612: 9804 LDR R0, [SP, #16]
0x34186614: F8D0 0158 LDR.W R0, [R0, #0x0158]
0x34186618: F640 0130 MOVW R1, #0x0830
0x3418661C: F2C0 7101 MOVT R1, #0x0701
0x34186620: 4288 CMP R0, R1
0x34186622: D02C BEQ 46L652 ; 0x3418667E
0x34186624: 9804 LDR R0, [SP, #16]
0x34186626: F8D0 0158 LDR.W R0, [R0, #0x0158]
0x3418662A: F640 0130 MOVW R1, #0x0830
0x3418662E: F2C0 7102 MOVT R1, #0x0702
0x34186632: 4288 CMP R0, R1
0x34186634: D023 BEQ 46L652 ; 0x3418667E
0x34186636: 9804 LDR R0, [SP, #16]
0x34186638: F8D0 0158 LDR.W R0, [R0, #0x0158]
0x3418663C: F640 0130 MOVW R1, #0x0830
0x34186640: F2C0 7103 MOVT R1, #0x0703
0x34186644: 4288 CMP R0, R1
0x34186646: D01A BEQ 46L652 ; 0x3418667E
0x34186648: 9804 LDR R0, [SP, #16]
0x3418664A: F8D0 0158 LDR.W R0, [R0, #0x0158]
0x3418664E: F640 0130 MOVW R1, #0x0830
0x34186652: F2C0 7104 MOVT R1, #0x0704
0x34186656: 4288 CMP R0, R1
0x34186658: D011 BEQ 46L652 ; 0x3418667E
0x3418665A: 9804 LDR R0, [SP, #16]
0x3418665C: F8D0 0158 LDR.W R0, [R0, #0x0158]
0x34186660: F640 0130 MOVW R1, #0x0830
0x34186664: F2C0 7105 MOVT R1, #0x0705
0x34186668: 4288 CMP R0, R1
0x3418666A: D008 BEQ 46L652 ; 0x3418667E
0x3418666C: 9804 LDR R0, [SP, #16]
0x3418666E: F8D0 0158 LDR.W R0, [R0, #0x0158]
0x34186672: F640 0130 MOVW R1, #0x0830
0x34186676: F2C0 7106 MOVT R1, #0x0706
0x3418667A: 4288 CMP R0, R1
0x3418667C: D100 BNE 46L653 ; 0x34186680
.L652:
0x3418667E: E007 B 46L654 ; 0x34186690
.L653:
0x34186680: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34186684: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34186688: F240 7175 MOVW R1, #0x0775
0x3418668C: F006 FB50 BL assert_failed ; 0x3418CD30
.L654:
0x34186690: 9804 LDR R0, [SP, #16]
0x34186692: F8D0 0158 LDR.W R0, [R0, #0x0158]
0x34186696: F640 0130 MOVW R1, #0x0830
0x3418669A: F2C0 7102 MOVT R1, #0x0702
0x3418669E: 4288 CMP R0, R1
0x341866A0: D144 BNE 46L660 ; 0x3418672C
0x341866A2: 9804 LDR R0, [SP, #16]
0x341866A4: 6C80 LDR R0, [R0, #72]
0x341866A6: B170 CBZ R0, .L655 ; 0x341866C6
0x341866A8: 9804 LDR R0, [SP, #16]
0x341866AA: 6C80 LDR R0, [R0, #72]
0x341866AC: F1B0 5F80 CMP.W R0, #0x10000000
0x341866B0: D009 BEQ 46L655 ; 0x341866C6
0x341866B2: 9804 LDR R0, [SP, #16]
0x341866B4: 6C80 LDR R0, [R0, #72]
0x341866B6: F1B0 5F00 CMP.W R0, #0x20000000
0x341866BA: D004 BEQ 46L655 ; 0x341866C6
0x341866BC: 9804 LDR R0, [SP, #16]
0x341866BE: 6C80 LDR R0, [R0, #72]
0x341866C0: F1B0 5F40 CMP.W R0, #0x30000000
0x341866C4: D100 BNE 46L656 ; 0x341866C8
.L655:
0x341866C6: E007 B 46L657 ; 0x341866D8
.L656:
0x341866C8: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341866CC: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341866D0: F240 717A MOVW R1, #0x077A
0x341866D4: F006 FB2C BL assert_failed ; 0x3418CD30
.L657:
0x341866D8: 9804 LDR R0, [SP, #16]
0x341866DA: 6CC0 LDR R0, [R0, #76]
0x341866DC: B128 CBZ R0, .L658 ; 0x341866EA
0x341866DE: 9804 LDR R0, [SP, #16]
0x341866E0: 6CC0 LDR R0, [R0, #76]
0x341866E2: F5B0 7F80 CMP.W R0, #0x0100
0x341866E6: D800 BHI 46L658 ; 0x341866EA
0x341866E8: E007 B 46L659 ; 0x341866FA
.L658:
0x341866EA: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341866EE: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341866F2: F240 717B MOVW R1, #0x077B
0x341866F6: F006 FB1B BL assert_failed ; 0x3418CD30
.L659:
0x341866FA: F248 01E4 MOVW R1, #0x80E4
0x341866FE: F2C5 6102 MOVT R1, #0x5602
0x34186702: 6808 LDR R0, [R1]
0x34186704: F64F 72FF MOVW R2, #0xFFFF
0x34186708: F6CC 7200 MOVT R2, #0xCF00
0x3418670C: 4010 ANDS R0, R2
0x3418670E: 9B04 LDR R3, [SP, #16]
0x34186710: 6C9A LDR R2, [R3, #72]
0x34186712: F8D3 C04C LDR.W R12, [R3, #76]
0x34186716: 2300 MOVS R3, #0
0x34186718: F6CF 73FF MOVT R3, #0xFFFF
0x3418671C: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34186720: 431A ORRS R2, R3
0x34186722: 4310 ORRS R0, R2
0x34186724: 6008 STR R0, [R1]
0x34186726: F001 FA3F BL LL_RCC_IC9_Enable ; 0x34187BA8
0x3418672A: E059 B 46L667 ; 0x341867E0
.L660:
0x3418672C: 9804 LDR R0, [SP, #16]
0x3418672E: F8D0 0158 LDR.W R0, [R0, #0x0158]
0x34186732: F640 0130 MOVW R1, #0x0830
0x34186736: F2C0 7103 MOVT R1, #0x0703
0x3418673A: 4288 CMP R0, R1
0x3418673C: D144 BNE 46L666 ; 0x341867C8
0x3418673E: 9804 LDR R0, [SP, #16]
0x34186740: 6F00 LDR R0, [R0, #112]
0x34186742: B170 CBZ R0, .L661 ; 0x34186762
0x34186744: 9804 LDR R0, [SP, #16]
0x34186746: 6F00 LDR R0, [R0, #112]
0x34186748: F1B0 5F80 CMP.W R0, #0x10000000
0x3418674C: D009 BEQ 46L661 ; 0x34186762
0x3418674E: 9804 LDR R0, [SP, #16]
0x34186750: 6F00 LDR R0, [R0, #112]
0x34186752: F1B0 5F00 CMP.W R0, #0x20000000
0x34186756: D004 BEQ 46L661 ; 0x34186762
0x34186758: 9804 LDR R0, [SP, #16]
0x3418675A: 6F00 LDR R0, [R0, #112]
0x3418675C: F1B0 5F40 CMP.W R0, #0x30000000
0x34186760: D100 BNE 46L662 ; 0x34186764
.L661:
0x34186762: E007 B 46L663 ; 0x34186774
.L662:
0x34186764: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34186768: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x3418676C: F240 7187 MOVW R1, #0x0787
0x34186770: F006 FADE BL assert_failed ; 0x3418CD30
.L663:
0x34186774: 9804 LDR R0, [SP, #16]
0x34186776: 6F40 LDR R0, [R0, #116]
0x34186778: B128 CBZ R0, .L664 ; 0x34186786
0x3418677A: 9804 LDR R0, [SP, #16]
0x3418677C: 6F40 LDR R0, [R0, #116]
0x3418677E: F5B0 7F80 CMP.W R0, #0x0100
0x34186782: D800 BHI 46L664 ; 0x34186786
0x34186784: E007 B 46L665 ; 0x34186796
.L664:
0x34186786: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x3418678A: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x3418678E: F44F 61F1 MOV.W R1, #0x0788
0x34186792: F006 FACD BL assert_failed ; 0x3418CD30
.L665:
0x34186796: F248 01F8 MOVW R1, #0x80F8
0x3418679A: F2C5 6102 MOVT R1, #0x5602
0x3418679E: 6808 LDR R0, [R1]
0x341867A0: F64F 72FF MOVW R2, #0xFFFF
0x341867A4: F6CC 7200 MOVT R2, #0xCF00
0x341867A8: 4010 ANDS R0, R2
0x341867AA: 9B04 LDR R3, [SP, #16]
0x341867AC: 6F1A LDR R2, [R3, #112]
0x341867AE: F8D3 C074 LDR.W R12, [R3, #116]
0x341867B2: 2300 MOVS R3, #0
0x341867B4: F6CF 73FF MOVT R3, #0xFFFF
0x341867B8: EB03 430C ADD.W R3, R3, R12, LSL #16
0x341867BC: 431A ORRS R2, R3
0x341867BE: 4310 ORRS R0, R2
0x341867C0: 6008 STR R0, [R1]
0x341867C2: F001 F9F9 BL LL_RCC_IC14_Enable ; 0x34187BB8
0x341867C6: E00B B 46L667 ; 0x341867E0
.L666:
0x341867C8: 9804 LDR R0, [SP, #16]
0x341867CA: F8D0 0158 LDR.W R0, [R0, #0x0158]
0x341867CE: F640 0130 MOVW R1, #0x0830
0x341867D2: F2C0 7101 MOVT R1, #0x0701
0x341867D6: 4288 CMP R0, R1
0x341867D8: D102 BNE 46L667 ; 0x341867E0
0x341867DA: F008 FD8B BL LL_RCC_CLKP_Enable ; 0x3418F2F4
0x341867DE: E7FF B 46L667 ; 0x341867E0
.L667:
0x341867E0: 9804 LDR R0, [SP, #16]
0x341867E2: F8D0 0158 LDR.W R0, [R0, #0x0158]
0x341867E6: F001 FA4D BL LL_RCC_SetUSARTClockSource ; 0x34187C84
.L668:
0x341867EA: 9804 LDR R0, [SP, #16]
0x341867EC: 7940 LDRB R0, [R0, #5]
0x341867EE: 0700 LSLS R0, R0, #28
0x341867F0: 2800 CMP R0, #0
0x341867F2: F140 80F5 BPL.W 46L685 ; 0x341869E0
0x341867F6: 9804 LDR R0, [SP, #16]
0x341867F8: F8D0 015C LDR.W R0, [R0, #0x015C]
0x341867FC: F640 4130 MOVW R1, #0x0C30
0x34186800: F2C0 7100 MOVT R1, #0x0700
0x34186804: 4288 CMP R0, R1
0x34186806: D035 BEQ 46L669 ; 0x34186874
0x34186808: 9804 LDR R0, [SP, #16]
0x3418680A: F8D0 015C LDR.W R0, [R0, #0x015C]
0x3418680E: F640 4130 MOVW R1, #0x0C30
0x34186812: F2C0 7101 MOVT R1, #0x0701
0x34186816: 4288 CMP R0, R1
0x34186818: D02C BEQ 46L669 ; 0x34186874
0x3418681A: 9804 LDR R0, [SP, #16]
0x3418681C: F8D0 015C LDR.W R0, [R0, #0x015C]
0x34186820: F640 4130 MOVW R1, #0x0C30
0x34186824: F2C0 7102 MOVT R1, #0x0702
0x34186828: 4288 CMP R0, R1
0x3418682A: D023 BEQ 46L669 ; 0x34186874
0x3418682C: 9804 LDR R0, [SP, #16]
0x3418682E: F8D0 015C LDR.W R0, [R0, #0x015C]
0x34186832: F640 4130 MOVW R1, #0x0C30
0x34186836: F2C0 7103 MOVT R1, #0x0703
0x3418683A: 4288 CMP R0, R1
0x3418683C: D01A BEQ 46L669 ; 0x34186874
0x3418683E: 9804 LDR R0, [SP, #16]
0x34186840: F8D0 015C LDR.W R0, [R0, #0x015C]
0x34186844: F640 4130 MOVW R1, #0x0C30
0x34186848: F2C0 7104 MOVT R1, #0x0704
0x3418684C: 4288 CMP R0, R1
0x3418684E: D011 BEQ 46L669 ; 0x34186874
0x34186850: 9804 LDR R0, [SP, #16]
0x34186852: F8D0 015C LDR.W R0, [R0, #0x015C]
0x34186856: F640 4130 MOVW R1, #0x0C30
0x3418685A: F2C0 7105 MOVT R1, #0x0705
0x3418685E: 4288 CMP R0, R1
0x34186860: D008 BEQ 46L669 ; 0x34186874
0x34186862: 9804 LDR R0, [SP, #16]
0x34186864: F8D0 015C LDR.W R0, [R0, #0x015C]
0x34186868: F640 4130 MOVW R1, #0x0C30
0x3418686C: F2C0 7106 MOVT R1, #0x0706
0x34186870: 4288 CMP R0, R1
0x34186872: D100 BNE 46L670 ; 0x34186876
.L669:
0x34186874: E007 B 46L671 ; 0x34186886
.L670:
0x34186876: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x3418687A: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x3418687E: F240 71A2 MOVW R1, #0x07A2
0x34186882: F006 FA55 BL assert_failed ; 0x3418CD30
.L671:
0x34186886: 9804 LDR R0, [SP, #16]
0x34186888: F8D0 015C LDR.W R0, [R0, #0x015C]
0x3418688C: F640 4130 MOVW R1, #0x0C30
0x34186890: F2C0 7102 MOVT R1, #0x0702
0x34186894: 4288 CMP R0, R1
0x34186896: D144 BNE 46L677 ; 0x34186922
0x34186898: 9804 LDR R0, [SP, #16]
0x3418689A: 6C80 LDR R0, [R0, #72]
0x3418689C: B170 CBZ R0, .L672 ; 0x341868BC
0x3418689E: 9804 LDR R0, [SP, #16]
0x341868A0: 6C80 LDR R0, [R0, #72]
0x341868A2: F1B0 5F80 CMP.W R0, #0x10000000
0x341868A6: D009 BEQ 46L672 ; 0x341868BC
0x341868A8: 9804 LDR R0, [SP, #16]
0x341868AA: 6C80 LDR R0, [R0, #72]
0x341868AC: F1B0 5F00 CMP.W R0, #0x20000000
0x341868B0: D004 BEQ 46L672 ; 0x341868BC
0x341868B2: 9804 LDR R0, [SP, #16]
0x341868B4: 6C80 LDR R0, [R0, #72]
0x341868B6: F1B0 5F40 CMP.W R0, #0x30000000
0x341868BA: D100 BNE 46L673 ; 0x341868BE
.L672:
0x341868BC: E007 B 46L674 ; 0x341868CE
.L673:
0x341868BE: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341868C2: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341868C6: F240 71A7 MOVW R1, #0x07A7
0x341868CA: F006 FA31 BL assert_failed ; 0x3418CD30
.L674:
0x341868CE: 9804 LDR R0, [SP, #16]
0x341868D0: 6CC0 LDR R0, [R0, #76]
0x341868D2: B128 CBZ R0, .L675 ; 0x341868E0
0x341868D4: 9804 LDR R0, [SP, #16]
0x341868D6: 6CC0 LDR R0, [R0, #76]
0x341868D8: F5B0 7F80 CMP.W R0, #0x0100
0x341868DC: D800 BHI 46L675 ; 0x341868E0
0x341868DE: E007 B 46L676 ; 0x341868F0
.L675:
0x341868E0: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341868E4: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341868E8: F44F 61F5 MOV.W R1, #0x07A8
0x341868EC: F006 FA20 BL assert_failed ; 0x3418CD30
.L676:
0x341868F0: F248 01E4 MOVW R1, #0x80E4
0x341868F4: F2C5 6102 MOVT R1, #0x5602
0x341868F8: 6808 LDR R0, [R1]
0x341868FA: F64F 72FF MOVW R2, #0xFFFF
0x341868FE: F6CC 7200 MOVT R2, #0xCF00
0x34186902: 4010 ANDS R0, R2
0x34186904: 9B04 LDR R3, [SP, #16]
0x34186906: 6C9A LDR R2, [R3, #72]
0x34186908: F8D3 C04C LDR.W R12, [R3, #76]
0x3418690C: 2300 MOVS R3, #0
0x3418690E: F6CF 73FF MOVT R3, #0xFFFF
0x34186912: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34186916: 431A ORRS R2, R3
0x34186918: 4310 ORRS R0, R2
0x3418691A: 6008 STR R0, [R1]
0x3418691C: F001 F944 BL LL_RCC_IC9_Enable ; 0x34187BA8
0x34186920: E059 B 46L684 ; 0x341869D6
.L677:
0x34186922: 9804 LDR R0, [SP, #16]
0x34186924: F8D0 015C LDR.W R0, [R0, #0x015C]
0x34186928: F640 4130 MOVW R1, #0x0C30
0x3418692C: F2C0 7103 MOVT R1, #0x0703
0x34186930: 4288 CMP R0, R1
0x34186932: D144 BNE 46L683 ; 0x341869BE
0x34186934: 9804 LDR R0, [SP, #16]
0x34186936: 6F00 LDR R0, [R0, #112]
0x34186938: B170 CBZ R0, .L678 ; 0x34186958
0x3418693A: 9804 LDR R0, [SP, #16]
0x3418693C: 6F00 LDR R0, [R0, #112]
0x3418693E: F1B0 5F80 CMP.W R0, #0x10000000
0x34186942: D009 BEQ 46L678 ; 0x34186958
0x34186944: 9804 LDR R0, [SP, #16]
0x34186946: 6F00 LDR R0, [R0, #112]
0x34186948: F1B0 5F00 CMP.W R0, #0x20000000
0x3418694C: D004 BEQ 46L678 ; 0x34186958
0x3418694E: 9804 LDR R0, [SP, #16]
0x34186950: 6F00 LDR R0, [R0, #112]
0x34186952: F1B0 5F40 CMP.W R0, #0x30000000
0x34186956: D100 BNE 46L679 ; 0x3418695A
.L678:
0x34186958: E007 B 46L680 ; 0x3418696A
.L679:
0x3418695A: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x3418695E: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34186962: F240 71B4 MOVW R1, #0x07B4
0x34186966: F006 F9E3 BL assert_failed ; 0x3418CD30
.L680:
0x3418696A: 9804 LDR R0, [SP, #16]
0x3418696C: 6F40 LDR R0, [R0, #116]
0x3418696E: B128 CBZ R0, .L681 ; 0x3418697C
0x34186970: 9804 LDR R0, [SP, #16]
0x34186972: 6F40 LDR R0, [R0, #116]
0x34186974: F5B0 7F80 CMP.W R0, #0x0100
0x34186978: D800 BHI 46L681 ; 0x3418697C
0x3418697A: E007 B 46L682 ; 0x3418698C
.L681:
0x3418697C: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34186980: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34186984: F240 71B5 MOVW R1, #0x07B5
0x34186988: F006 F9D2 BL assert_failed ; 0x3418CD30
.L682:
0x3418698C: F248 01F8 MOVW R1, #0x80F8
0x34186990: F2C5 6102 MOVT R1, #0x5602
0x34186994: 6808 LDR R0, [R1]
0x34186996: F64F 72FF MOVW R2, #0xFFFF
0x3418699A: F6CC 7200 MOVT R2, #0xCF00
0x3418699E: 4010 ANDS R0, R2
0x341869A0: 9B04 LDR R3, [SP, #16]
0x341869A2: 6F1A LDR R2, [R3, #112]
0x341869A4: F8D3 C074 LDR.W R12, [R3, #116]
0x341869A8: 2300 MOVS R3, #0
0x341869AA: F6CF 73FF MOVT R3, #0xFFFF
0x341869AE: EB03 430C ADD.W R3, R3, R12, LSL #16
0x341869B2: 431A ORRS R2, R3
0x341869B4: 4310 ORRS R0, R2
0x341869B6: 6008 STR R0, [R1]
0x341869B8: F001 F8FE BL LL_RCC_IC14_Enable ; 0x34187BB8
0x341869BC: E00B B 46L684 ; 0x341869D6
.L683:
0x341869BE: 9804 LDR R0, [SP, #16]
0x341869C0: F8D0 015C LDR.W R0, [R0, #0x015C]
0x341869C4: F640 4130 MOVW R1, #0x0C30
0x341869C8: F2C0 7101 MOVT R1, #0x0701
0x341869CC: 4288 CMP R0, R1
0x341869CE: D102 BNE 46L684 ; 0x341869D6
0x341869D0: F008 FC90 BL LL_RCC_CLKP_Enable ; 0x3418F2F4
0x341869D4: E7FF B 46L684 ; 0x341869D6
.L684:
0x341869D6: 9804 LDR R0, [SP, #16]
0x341869D8: F8D0 015C LDR.W R0, [R0, #0x015C]
0x341869DC: F001 F952 BL LL_RCC_SetUSARTClockSource ; 0x34187C84
.L685:
0x341869E0: 9804 LDR R0, [SP, #16]
0x341869E2: 7940 LDRB R0, [R0, #5]
0x341869E4: 06C0 LSLS R0, R0, #27
0x341869E6: 2800 CMP R0, #0
0x341869E8: F140 80F5 BPL.W 46L702 ; 0x34186BD6
0x341869EC: 9804 LDR R0, [SP, #16]
0x341869EE: F8D0 0160 LDR.W R0, [R0, #0x0160]
0x341869F2: F241 0130 MOVW R1, #0x1030
0x341869F6: F2C0 7100 MOVT R1, #0x0700
0x341869FA: 4288 CMP R0, R1
0x341869FC: D035 BEQ 46L686 ; 0x34186A6A
0x341869FE: 9804 LDR R0, [SP, #16]
0x34186A00: F8D0 0160 LDR.W R0, [R0, #0x0160]
0x34186A04: F241 0130 MOVW R1, #0x1030
0x34186A08: F2C0 7101 MOVT R1, #0x0701
0x34186A0C: 4288 CMP R0, R1
0x34186A0E: D02C BEQ 46L686 ; 0x34186A6A
0x34186A10: 9804 LDR R0, [SP, #16]
0x34186A12: F8D0 0160 LDR.W R0, [R0, #0x0160]
0x34186A16: F241 0130 MOVW R1, #0x1030
0x34186A1A: F2C0 7102 MOVT R1, #0x0702
0x34186A1E: 4288 CMP R0, R1
0x34186A20: D023 BEQ 46L686 ; 0x34186A6A
0x34186A22: 9804 LDR R0, [SP, #16]
0x34186A24: F8D0 0160 LDR.W R0, [R0, #0x0160]
0x34186A28: F241 0130 MOVW R1, #0x1030
0x34186A2C: F2C0 7103 MOVT R1, #0x0703
0x34186A30: 4288 CMP R0, R1
0x34186A32: D01A BEQ 46L686 ; 0x34186A6A
0x34186A34: 9804 LDR R0, [SP, #16]
0x34186A36: F8D0 0160 LDR.W R0, [R0, #0x0160]
0x34186A3A: F241 0130 MOVW R1, #0x1030
0x34186A3E: F2C0 7104 MOVT R1, #0x0704
0x34186A42: 4288 CMP R0, R1
0x34186A44: D011 BEQ 46L686 ; 0x34186A6A
0x34186A46: 9804 LDR R0, [SP, #16]
0x34186A48: F8D0 0160 LDR.W R0, [R0, #0x0160]
0x34186A4C: F241 0130 MOVW R1, #0x1030
0x34186A50: F2C0 7105 MOVT R1, #0x0705
0x34186A54: 4288 CMP R0, R1
0x34186A56: D008 BEQ 46L686 ; 0x34186A6A
0x34186A58: 9804 LDR R0, [SP, #16]
0x34186A5A: F8D0 0160 LDR.W R0, [R0, #0x0160]
0x34186A5E: F241 0130 MOVW R1, #0x1030
0x34186A62: F2C0 7106 MOVT R1, #0x0706
0x34186A66: 4288 CMP R0, R1
0x34186A68: D100 BNE 46L687 ; 0x34186A6C
.L686:
0x34186A6A: E007 B 46L688 ; 0x34186A7C
.L687:
0x34186A6C: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34186A70: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34186A74: F240 71CF MOVW R1, #0x07CF
0x34186A78: F006 F95A BL assert_failed ; 0x3418CD30
.L688:
0x34186A7C: 9804 LDR R0, [SP, #16]
0x34186A7E: F8D0 0160 LDR.W R0, [R0, #0x0160]
0x34186A82: F241 0130 MOVW R1, #0x1030
0x34186A86: F2C0 7102 MOVT R1, #0x0702
0x34186A8A: 4288 CMP R0, R1
0x34186A8C: D144 BNE 46L694 ; 0x34186B18
0x34186A8E: 9804 LDR R0, [SP, #16]
0x34186A90: 6C80 LDR R0, [R0, #72]
0x34186A92: B170 CBZ R0, .L689 ; 0x34186AB2
0x34186A94: 9804 LDR R0, [SP, #16]
0x34186A96: 6C80 LDR R0, [R0, #72]
0x34186A98: F1B0 5F80 CMP.W R0, #0x10000000
0x34186A9C: D009 BEQ 46L689 ; 0x34186AB2
0x34186A9E: 9804 LDR R0, [SP, #16]
0x34186AA0: 6C80 LDR R0, [R0, #72]
0x34186AA2: F1B0 5F00 CMP.W R0, #0x20000000
0x34186AA6: D004 BEQ 46L689 ; 0x34186AB2
0x34186AA8: 9804 LDR R0, [SP, #16]
0x34186AAA: 6C80 LDR R0, [R0, #72]
0x34186AAC: F1B0 5F40 CMP.W R0, #0x30000000
0x34186AB0: D100 BNE 46L690 ; 0x34186AB4
.L689:
0x34186AB2: E007 B 46L691 ; 0x34186AC4
.L690:
0x34186AB4: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34186AB8: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34186ABC: F240 71D4 MOVW R1, #0x07D4
0x34186AC0: F006 F936 BL assert_failed ; 0x3418CD30
.L691:
0x34186AC4: 9804 LDR R0, [SP, #16]
0x34186AC6: 6CC0 LDR R0, [R0, #76]
0x34186AC8: B128 CBZ R0, .L692 ; 0x34186AD6
0x34186ACA: 9804 LDR R0, [SP, #16]
0x34186ACC: 6CC0 LDR R0, [R0, #76]
0x34186ACE: F5B0 7F80 CMP.W R0, #0x0100
0x34186AD2: D800 BHI 46L692 ; 0x34186AD6
0x34186AD4: E007 B 46L693 ; 0x34186AE6
.L692:
0x34186AD6: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34186ADA: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34186ADE: F240 71D5 MOVW R1, #0x07D5
0x34186AE2: F006 F925 BL assert_failed ; 0x3418CD30
.L693:
0x34186AE6: F248 01E4 MOVW R1, #0x80E4
0x34186AEA: F2C5 6102 MOVT R1, #0x5602
0x34186AEE: 6808 LDR R0, [R1]
0x34186AF0: F64F 72FF MOVW R2, #0xFFFF
0x34186AF4: F6CC 7200 MOVT R2, #0xCF00
0x34186AF8: 4010 ANDS R0, R2
0x34186AFA: 9B04 LDR R3, [SP, #16]
0x34186AFC: 6C9A LDR R2, [R3, #72]
0x34186AFE: F8D3 C04C LDR.W R12, [R3, #76]
0x34186B02: 2300 MOVS R3, #0
0x34186B04: F6CF 73FF MOVT R3, #0xFFFF
0x34186B08: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34186B0C: 431A ORRS R2, R3
0x34186B0E: 4310 ORRS R0, R2
0x34186B10: 6008 STR R0, [R1]
0x34186B12: F001 F849 BL LL_RCC_IC9_Enable ; 0x34187BA8
0x34186B16: E059 B 46L701 ; 0x34186BCC
.L694:
0x34186B18: 9804 LDR R0, [SP, #16]
0x34186B1A: F8D0 0160 LDR.W R0, [R0, #0x0160]
0x34186B1E: F241 0130 MOVW R1, #0x1030
0x34186B22: F2C0 7103 MOVT R1, #0x0703
0x34186B26: 4288 CMP R0, R1
0x34186B28: D144 BNE 46L700 ; 0x34186BB4
0x34186B2A: 9804 LDR R0, [SP, #16]
0x34186B2C: 6F00 LDR R0, [R0, #112]
0x34186B2E: B170 CBZ R0, .L695 ; 0x34186B4E
0x34186B30: 9804 LDR R0, [SP, #16]
0x34186B32: 6F00 LDR R0, [R0, #112]
0x34186B34: F1B0 5F80 CMP.W R0, #0x10000000
0x34186B38: D009 BEQ 46L695 ; 0x34186B4E
0x34186B3A: 9804 LDR R0, [SP, #16]
0x34186B3C: 6F00 LDR R0, [R0, #112]
0x34186B3E: F1B0 5F00 CMP.W R0, #0x20000000
0x34186B42: D004 BEQ 46L695 ; 0x34186B4E
0x34186B44: 9804 LDR R0, [SP, #16]
0x34186B46: 6F00 LDR R0, [R0, #112]
0x34186B48: F1B0 5F40 CMP.W R0, #0x30000000
0x34186B4C: D100 BNE 46L696 ; 0x34186B50
.L695:
0x34186B4E: E007 B 46L697 ; 0x34186B60
.L696:
0x34186B50: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34186B54: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34186B58: F240 71E1 MOVW R1, #0x07E1
0x34186B5C: F006 F8E8 BL assert_failed ; 0x3418CD30
.L697:
0x34186B60: 9804 LDR R0, [SP, #16]
0x34186B62: 6F40 LDR R0, [R0, #116]
0x34186B64: B128 CBZ R0, .L698 ; 0x34186B72
0x34186B66: 9804 LDR R0, [SP, #16]
0x34186B68: 6F40 LDR R0, [R0, #116]
0x34186B6A: F5B0 7F80 CMP.W R0, #0x0100
0x34186B6E: D800 BHI 46L698 ; 0x34186B72
0x34186B70: E007 B 46L699 ; 0x34186B82
.L698:
0x34186B72: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34186B76: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34186B7A: F240 71E2 MOVW R1, #0x07E2
0x34186B7E: F006 F8D7 BL assert_failed ; 0x3418CD30
.L699:
0x34186B82: F248 01F8 MOVW R1, #0x80F8
0x34186B86: F2C5 6102 MOVT R1, #0x5602
0x34186B8A: 6808 LDR R0, [R1]
0x34186B8C: F64F 72FF MOVW R2, #0xFFFF
0x34186B90: F6CC 7200 MOVT R2, #0xCF00
0x34186B94: 4010 ANDS R0, R2
0x34186B96: 9B04 LDR R3, [SP, #16]
0x34186B98: 6F1A LDR R2, [R3, #112]
0x34186B9A: F8D3 C074 LDR.W R12, [R3, #116]
0x34186B9E: 2300 MOVS R3, #0
0x34186BA0: F6CF 73FF MOVT R3, #0xFFFF
0x34186BA4: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34186BA8: 431A ORRS R2, R3
0x34186BAA: 4310 ORRS R0, R2
0x34186BAC: 6008 STR R0, [R1]
0x34186BAE: F001 F803 BL LL_RCC_IC14_Enable ; 0x34187BB8
0x34186BB2: E00B B 46L701 ; 0x34186BCC
.L700:
0x34186BB4: 9804 LDR R0, [SP, #16]
0x34186BB6: F8D0 0160 LDR.W R0, [R0, #0x0160]
0x34186BBA: F241 0130 MOVW R1, #0x1030
0x34186BBE: F2C0 7101 MOVT R1, #0x0701
0x34186BC2: 4288 CMP R0, R1
0x34186BC4: D102 BNE 46L701 ; 0x34186BCC
0x34186BC6: F008 FB95 BL LL_RCC_CLKP_Enable ; 0x3418F2F4
0x34186BCA: E7FF B 46L701 ; 0x34186BCC
.L701:
0x34186BCC: 9804 LDR R0, [SP, #16]
0x34186BCE: F8D0 0160 LDR.W R0, [R0, #0x0160]
0x34186BD2: F001 F857 BL LL_RCC_SetUSARTClockSource ; 0x34187C84
.L702:
0x34186BD6: 9804 LDR R0, [SP, #16]
0x34186BD8: 7940 LDRB R0, [R0, #5]
0x34186BDA: 0680 LSLS R0, R0, #26
0x34186BDC: 2800 CMP R0, #0
0x34186BDE: F140 80F5 BPL.W 46L719 ; 0x34186DCC
0x34186BE2: 9804 LDR R0, [SP, #16]
0x34186BE4: F8D0 0164 LDR.W R0, [R0, #0x0164]
0x34186BE8: F241 4130 MOVW R1, #0x1430
0x34186BEC: F2C0 7100 MOVT R1, #0x0700
0x34186BF0: 4288 CMP R0, R1
0x34186BF2: D035 BEQ 46L703 ; 0x34186C60
0x34186BF4: 9804 LDR R0, [SP, #16]
0x34186BF6: F8D0 0164 LDR.W R0, [R0, #0x0164]
0x34186BFA: F241 4130 MOVW R1, #0x1430
0x34186BFE: F2C0 7101 MOVT R1, #0x0701
0x34186C02: 4288 CMP R0, R1
0x34186C04: D02C BEQ 46L703 ; 0x34186C60
0x34186C06: 9804 LDR R0, [SP, #16]
0x34186C08: F8D0 0164 LDR.W R0, [R0, #0x0164]
0x34186C0C: F241 4130 MOVW R1, #0x1430
0x34186C10: F2C0 7102 MOVT R1, #0x0702
0x34186C14: 4288 CMP R0, R1
0x34186C16: D023 BEQ 46L703 ; 0x34186C60
0x34186C18: 9804 LDR R0, [SP, #16]
0x34186C1A: F8D0 0164 LDR.W R0, [R0, #0x0164]
0x34186C1E: F241 4130 MOVW R1, #0x1430
0x34186C22: F2C0 7103 MOVT R1, #0x0703
0x34186C26: 4288 CMP R0, R1
0x34186C28: D01A BEQ 46L703 ; 0x34186C60
0x34186C2A: 9804 LDR R0, [SP, #16]
0x34186C2C: F8D0 0164 LDR.W R0, [R0, #0x0164]
0x34186C30: F241 4130 MOVW R1, #0x1430
0x34186C34: F2C0 7104 MOVT R1, #0x0704
0x34186C38: 4288 CMP R0, R1
0x34186C3A: D011 BEQ 46L703 ; 0x34186C60
0x34186C3C: 9804 LDR R0, [SP, #16]
0x34186C3E: F8D0 0164 LDR.W R0, [R0, #0x0164]
0x34186C42: F241 4130 MOVW R1, #0x1430
0x34186C46: F2C0 7105 MOVT R1, #0x0705
0x34186C4A: 4288 CMP R0, R1
0x34186C4C: D008 BEQ 46L703 ; 0x34186C60
0x34186C4E: 9804 LDR R0, [SP, #16]
0x34186C50: F8D0 0164 LDR.W R0, [R0, #0x0164]
0x34186C54: F241 4130 MOVW R1, #0x1430
0x34186C58: F2C0 7106 MOVT R1, #0x0706
0x34186C5C: 4288 CMP R0, R1
0x34186C5E: D100 BNE 46L704 ; 0x34186C62
.L703:
0x34186C60: E007 B 46L705 ; 0x34186C72
.L704:
0x34186C62: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34186C66: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34186C6A: F240 71FC MOVW R1, #0x07FC
0x34186C6E: F006 F85F BL assert_failed ; 0x3418CD30
.L705:
0x34186C72: 9804 LDR R0, [SP, #16]
0x34186C74: F8D0 0164 LDR.W R0, [R0, #0x0164]
0x34186C78: F241 4130 MOVW R1, #0x1430
0x34186C7C: F2C0 7102 MOVT R1, #0x0702
0x34186C80: 4288 CMP R0, R1
0x34186C82: D144 BNE 46L711 ; 0x34186D0E
0x34186C84: 9804 LDR R0, [SP, #16]
0x34186C86: 6C80 LDR R0, [R0, #72]
0x34186C88: B170 CBZ R0, .L706 ; 0x34186CA8
0x34186C8A: 9804 LDR R0, [SP, #16]
0x34186C8C: 6C80 LDR R0, [R0, #72]
0x34186C8E: F1B0 5F80 CMP.W R0, #0x10000000
0x34186C92: D009 BEQ 46L706 ; 0x34186CA8
0x34186C94: 9804 LDR R0, [SP, #16]
0x34186C96: 6C80 LDR R0, [R0, #72]
0x34186C98: F1B0 5F00 CMP.W R0, #0x20000000
0x34186C9C: D004 BEQ 46L706 ; 0x34186CA8
0x34186C9E: 9804 LDR R0, [SP, #16]
0x34186CA0: 6C80 LDR R0, [R0, #72]
0x34186CA2: F1B0 5F40 CMP.W R0, #0x30000000
0x34186CA6: D100 BNE 46L707 ; 0x34186CAA
.L706:
0x34186CA8: E007 B 46L708 ; 0x34186CBA
.L707:
0x34186CAA: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34186CAE: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34186CB2: F640 0101 MOVW R1, #0x0801
0x34186CB6: F006 F83B BL assert_failed ; 0x3418CD30
.L708:
0x34186CBA: 9804 LDR R0, [SP, #16]
0x34186CBC: 6CC0 LDR R0, [R0, #76]
0x34186CBE: B128 CBZ R0, .L709 ; 0x34186CCC
0x34186CC0: 9804 LDR R0, [SP, #16]
0x34186CC2: 6CC0 LDR R0, [R0, #76]
0x34186CC4: F5B0 7F80 CMP.W R0, #0x0100
0x34186CC8: D800 BHI 46L709 ; 0x34186CCC
0x34186CCA: E007 B 46L710 ; 0x34186CDC
.L709:
0x34186CCC: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34186CD0: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34186CD4: F640 0102 MOVW R1, #0x0802
0x34186CD8: F006 F82A BL assert_failed ; 0x3418CD30
.L710:
0x34186CDC: F248 01E4 MOVW R1, #0x80E4
0x34186CE0: F2C5 6102 MOVT R1, #0x5602
0x34186CE4: 6808 LDR R0, [R1]
0x34186CE6: F64F 72FF MOVW R2, #0xFFFF
0x34186CEA: F6CC 7200 MOVT R2, #0xCF00
0x34186CEE: 4010 ANDS R0, R2
0x34186CF0: 9B04 LDR R3, [SP, #16]
0x34186CF2: 6C9A LDR R2, [R3, #72]
0x34186CF4: F8D3 C04C LDR.W R12, [R3, #76]
0x34186CF8: 2300 MOVS R3, #0
0x34186CFA: F6CF 73FF MOVT R3, #0xFFFF
0x34186CFE: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34186D02: 431A ORRS R2, R3
0x34186D04: 4310 ORRS R0, R2
0x34186D06: 6008 STR R0, [R1]
0x34186D08: F000 FF4E BL LL_RCC_IC9_Enable ; 0x34187BA8
0x34186D0C: E059 B 46L718 ; 0x34186DC2
.L711:
0x34186D0E: 9804 LDR R0, [SP, #16]
0x34186D10: F8D0 0164 LDR.W R0, [R0, #0x0164]
0x34186D14: F241 4130 MOVW R1, #0x1430
0x34186D18: F2C0 7103 MOVT R1, #0x0703
0x34186D1C: 4288 CMP R0, R1
0x34186D1E: D144 BNE 46L717 ; 0x34186DAA
0x34186D20: 9804 LDR R0, [SP, #16]
0x34186D22: 6F00 LDR R0, [R0, #112]
0x34186D24: B170 CBZ R0, .L712 ; 0x34186D44
0x34186D26: 9804 LDR R0, [SP, #16]
0x34186D28: 6F00 LDR R0, [R0, #112]
0x34186D2A: F1B0 5F80 CMP.W R0, #0x10000000
0x34186D2E: D009 BEQ 46L712 ; 0x34186D44
0x34186D30: 9804 LDR R0, [SP, #16]
0x34186D32: 6F00 LDR R0, [R0, #112]
0x34186D34: F1B0 5F00 CMP.W R0, #0x20000000
0x34186D38: D004 BEQ 46L712 ; 0x34186D44
0x34186D3A: 9804 LDR R0, [SP, #16]
0x34186D3C: 6F00 LDR R0, [R0, #112]
0x34186D3E: F1B0 5F40 CMP.W R0, #0x30000000
0x34186D42: D100 BNE 46L713 ; 0x34186D46
.L712:
0x34186D44: E007 B 46L714 ; 0x34186D56
.L713:
0x34186D46: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34186D4A: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34186D4E: F640 010E MOVW R1, #0x080E
0x34186D52: F005 FFED BL assert_failed ; 0x3418CD30
.L714:
0x34186D56: 9804 LDR R0, [SP, #16]
0x34186D58: 6F40 LDR R0, [R0, #116]
0x34186D5A: B128 CBZ R0, .L715 ; 0x34186D68
0x34186D5C: 9804 LDR R0, [SP, #16]
0x34186D5E: 6F40 LDR R0, [R0, #116]
0x34186D60: F5B0 7F80 CMP.W R0, #0x0100
0x34186D64: D800 BHI 46L715 ; 0x34186D68
0x34186D66: E007 B 46L716 ; 0x34186D78
.L715:
0x34186D68: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34186D6C: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34186D70: F640 010F MOVW R1, #0x080F
0x34186D74: F005 FFDC BL assert_failed ; 0x3418CD30
.L716:
0x34186D78: F248 01F8 MOVW R1, #0x80F8
0x34186D7C: F2C5 6102 MOVT R1, #0x5602
0x34186D80: 6808 LDR R0, [R1]
0x34186D82: F64F 72FF MOVW R2, #0xFFFF
0x34186D86: F6CC 7200 MOVT R2, #0xCF00
0x34186D8A: 4010 ANDS R0, R2
0x34186D8C: 9B04 LDR R3, [SP, #16]
0x34186D8E: 6F1A LDR R2, [R3, #112]
0x34186D90: F8D3 C074 LDR.W R12, [R3, #116]
0x34186D94: 2300 MOVS R3, #0
0x34186D96: F6CF 73FF MOVT R3, #0xFFFF
0x34186D9A: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34186D9E: 431A ORRS R2, R3
0x34186DA0: 4310 ORRS R0, R2
0x34186DA2: 6008 STR R0, [R1]
0x34186DA4: F000 FF08 BL LL_RCC_IC14_Enable ; 0x34187BB8
0x34186DA8: E00B B 46L718 ; 0x34186DC2
.L717:
0x34186DAA: 9804 LDR R0, [SP, #16]
0x34186DAC: F8D0 0164 LDR.W R0, [R0, #0x0164]
0x34186DB0: F241 4130 MOVW R1, #0x1430
0x34186DB4: F2C0 7101 MOVT R1, #0x0701
0x34186DB8: 4288 CMP R0, R1
0x34186DBA: D102 BNE 46L718 ; 0x34186DC2
0x34186DBC: F008 FA9A BL LL_RCC_CLKP_Enable ; 0x3418F2F4
0x34186DC0: E7FF B 46L718 ; 0x34186DC2
.L718:
0x34186DC2: 9804 LDR R0, [SP, #16]
0x34186DC4: F8D0 0164 LDR.W R0, [R0, #0x0164]
0x34186DC8: F000 FF5C BL LL_RCC_SetUSARTClockSource ; 0x34187C84
.L719:
0x34186DCC: 9804 LDR R0, [SP, #16]
0x34186DCE: 7940 LDRB R0, [R0, #5]
0x34186DD0: 0640 LSLS R0, R0, #25
0x34186DD2: 2800 CMP R0, #0
0x34186DD4: F140 80F5 BPL.W 46L736 ; 0x34186FC2
0x34186DD8: 9804 LDR R0, [SP, #16]
0x34186DDA: F8D0 0168 LDR.W R0, [R0, #0x0168]
0x34186DDE: F641 0130 MOVW R1, #0x1830
0x34186DE2: F2C0 7100 MOVT R1, #0x0700
0x34186DE6: 4288 CMP R0, R1
0x34186DE8: D035 BEQ 46L720 ; 0x34186E56
0x34186DEA: 9804 LDR R0, [SP, #16]
0x34186DEC: F8D0 0168 LDR.W R0, [R0, #0x0168]
0x34186DF0: F641 0130 MOVW R1, #0x1830
0x34186DF4: F2C0 7101 MOVT R1, #0x0701
0x34186DF8: 4288 CMP R0, R1
0x34186DFA: D02C BEQ 46L720 ; 0x34186E56
0x34186DFC: 9804 LDR R0, [SP, #16]
0x34186DFE: F8D0 0168 LDR.W R0, [R0, #0x0168]
0x34186E02: F641 0130 MOVW R1, #0x1830
0x34186E06: F2C0 7102 MOVT R1, #0x0702
0x34186E0A: 4288 CMP R0, R1
0x34186E0C: D023 BEQ 46L720 ; 0x34186E56
0x34186E0E: 9804 LDR R0, [SP, #16]
0x34186E10: F8D0 0168 LDR.W R0, [R0, #0x0168]
0x34186E14: F641 0130 MOVW R1, #0x1830
0x34186E18: F2C0 7103 MOVT R1, #0x0703
0x34186E1C: 4288 CMP R0, R1
0x34186E1E: D01A BEQ 46L720 ; 0x34186E56
0x34186E20: 9804 LDR R0, [SP, #16]
0x34186E22: F8D0 0168 LDR.W R0, [R0, #0x0168]
0x34186E26: F641 0130 MOVW R1, #0x1830
0x34186E2A: F2C0 7104 MOVT R1, #0x0704
0x34186E2E: 4288 CMP R0, R1
0x34186E30: D011 BEQ 46L720 ; 0x34186E56
0x34186E32: 9804 LDR R0, [SP, #16]
0x34186E34: F8D0 0168 LDR.W R0, [R0, #0x0168]
0x34186E38: F641 0130 MOVW R1, #0x1830
0x34186E3C: F2C0 7105 MOVT R1, #0x0705
0x34186E40: 4288 CMP R0, R1
0x34186E42: D008 BEQ 46L720 ; 0x34186E56
0x34186E44: 9804 LDR R0, [SP, #16]
0x34186E46: F8D0 0168 LDR.W R0, [R0, #0x0168]
0x34186E4A: F641 0130 MOVW R1, #0x1830
0x34186E4E: F2C0 7106 MOVT R1, #0x0706
0x34186E52: 4288 CMP R0, R1
0x34186E54: D100 BNE 46L721 ; 0x34186E58
.L720:
0x34186E56: E007 B 46L722 ; 0x34186E68
.L721:
0x34186E58: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34186E5C: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34186E60: F640 0129 MOVW R1, #0x0829
0x34186E64: F005 FF64 BL assert_failed ; 0x3418CD30
.L722:
0x34186E68: 9804 LDR R0, [SP, #16]
0x34186E6A: F8D0 0168 LDR.W R0, [R0, #0x0168]
0x34186E6E: F641 0130 MOVW R1, #0x1830
0x34186E72: F2C0 7102 MOVT R1, #0x0702
0x34186E76: 4288 CMP R0, R1
0x34186E78: D144 BNE 46L728 ; 0x34186F04
0x34186E7A: 9804 LDR R0, [SP, #16]
0x34186E7C: 6C80 LDR R0, [R0, #72]
0x34186E7E: B170 CBZ R0, .L723 ; 0x34186E9E
0x34186E80: 9804 LDR R0, [SP, #16]
0x34186E82: 6C80 LDR R0, [R0, #72]
0x34186E84: F1B0 5F80 CMP.W R0, #0x10000000
0x34186E88: D009 BEQ 46L723 ; 0x34186E9E
0x34186E8A: 9804 LDR R0, [SP, #16]
0x34186E8C: 6C80 LDR R0, [R0, #72]
0x34186E8E: F1B0 5F00 CMP.W R0, #0x20000000
0x34186E92: D004 BEQ 46L723 ; 0x34186E9E
0x34186E94: 9804 LDR R0, [SP, #16]
0x34186E96: 6C80 LDR R0, [R0, #72]
0x34186E98: F1B0 5F40 CMP.W R0, #0x30000000
0x34186E9C: D100 BNE 46L724 ; 0x34186EA0
.L723:
0x34186E9E: E007 B 46L725 ; 0x34186EB0
.L724:
0x34186EA0: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34186EA4: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34186EA8: F640 012E MOVW R1, #0x082E
0x34186EAC: F005 FF40 BL assert_failed ; 0x3418CD30
.L725:
0x34186EB0: 9804 LDR R0, [SP, #16]
0x34186EB2: 6CC0 LDR R0, [R0, #76]
0x34186EB4: B128 CBZ R0, .L726 ; 0x34186EC2
0x34186EB6: 9804 LDR R0, [SP, #16]
0x34186EB8: 6CC0 LDR R0, [R0, #76]
0x34186EBA: F5B0 7F80 CMP.W R0, #0x0100
0x34186EBE: D800 BHI 46L726 ; 0x34186EC2
0x34186EC0: E007 B 46L727 ; 0x34186ED2
.L726:
0x34186EC2: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34186EC6: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34186ECA: F640 012F MOVW R1, #0x082F
0x34186ECE: F005 FF2F BL assert_failed ; 0x3418CD30
.L727:
0x34186ED2: F248 01E4 MOVW R1, #0x80E4
0x34186ED6: F2C5 6102 MOVT R1, #0x5602
0x34186EDA: 6808 LDR R0, [R1]
0x34186EDC: F64F 72FF MOVW R2, #0xFFFF
0x34186EE0: F6CC 7200 MOVT R2, #0xCF00
0x34186EE4: 4010 ANDS R0, R2
0x34186EE6: 9B04 LDR R3, [SP, #16]
0x34186EE8: 6C9A LDR R2, [R3, #72]
0x34186EEA: F8D3 C04C LDR.W R12, [R3, #76]
0x34186EEE: 2300 MOVS R3, #0
0x34186EF0: F6CF 73FF MOVT R3, #0xFFFF
0x34186EF4: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34186EF8: 431A ORRS R2, R3
0x34186EFA: 4310 ORRS R0, R2
0x34186EFC: 6008 STR R0, [R1]
0x34186EFE: F000 FE53 BL LL_RCC_IC9_Enable ; 0x34187BA8
0x34186F02: E059 B 46L735 ; 0x34186FB8
.L728:
0x34186F04: 9804 LDR R0, [SP, #16]
0x34186F06: F8D0 0168 LDR.W R0, [R0, #0x0168]
0x34186F0A: F641 0130 MOVW R1, #0x1830
0x34186F0E: F2C0 7103 MOVT R1, #0x0703
0x34186F12: 4288 CMP R0, R1
0x34186F14: D144 BNE 46L734 ; 0x34186FA0
0x34186F16: 9804 LDR R0, [SP, #16]
0x34186F18: 6F00 LDR R0, [R0, #112]
0x34186F1A: B170 CBZ R0, .L729 ; 0x34186F3A
0x34186F1C: 9804 LDR R0, [SP, #16]
0x34186F1E: 6F00 LDR R0, [R0, #112]
0x34186F20: F1B0 5F80 CMP.W R0, #0x10000000
0x34186F24: D009 BEQ 46L729 ; 0x34186F3A
0x34186F26: 9804 LDR R0, [SP, #16]
0x34186F28: 6F00 LDR R0, [R0, #112]
0x34186F2A: F1B0 5F00 CMP.W R0, #0x20000000
0x34186F2E: D004 BEQ 46L729 ; 0x34186F3A
0x34186F30: 9804 LDR R0, [SP, #16]
0x34186F32: 6F00 LDR R0, [R0, #112]
0x34186F34: F1B0 5F40 CMP.W R0, #0x30000000
0x34186F38: D100 BNE 46L730 ; 0x34186F3C
.L729:
0x34186F3A: E007 B 46L731 ; 0x34186F4C
.L730:
0x34186F3C: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34186F40: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34186F44: F640 013B MOVW R1, #0x083B
0x34186F48: F005 FEF2 BL assert_failed ; 0x3418CD30
.L731:
0x34186F4C: 9804 LDR R0, [SP, #16]
0x34186F4E: 6F40 LDR R0, [R0, #116]
0x34186F50: B128 CBZ R0, .L732 ; 0x34186F5E
0x34186F52: 9804 LDR R0, [SP, #16]
0x34186F54: 6F40 LDR R0, [R0, #116]
0x34186F56: F5B0 7F80 CMP.W R0, #0x0100
0x34186F5A: D800 BHI 46L732 ; 0x34186F5E
0x34186F5C: E007 B 46L733 ; 0x34186F6E
.L732:
0x34186F5E: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34186F62: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34186F66: F640 013C MOVW R1, #0x083C
0x34186F6A: F005 FEE1 BL assert_failed ; 0x3418CD30
.L733:
0x34186F6E: F248 01F8 MOVW R1, #0x80F8
0x34186F72: F2C5 6102 MOVT R1, #0x5602
0x34186F76: 6808 LDR R0, [R1]
0x34186F78: F64F 72FF MOVW R2, #0xFFFF
0x34186F7C: F6CC 7200 MOVT R2, #0xCF00
0x34186F80: 4010 ANDS R0, R2
0x34186F82: 9B04 LDR R3, [SP, #16]
0x34186F84: 6F1A LDR R2, [R3, #112]
0x34186F86: F8D3 C074 LDR.W R12, [R3, #116]
0x34186F8A: 2300 MOVS R3, #0
0x34186F8C: F6CF 73FF MOVT R3, #0xFFFF
0x34186F90: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34186F94: 431A ORRS R2, R3
0x34186F96: 4310 ORRS R0, R2
0x34186F98: 6008 STR R0, [R1]
0x34186F9A: F000 FE0D BL LL_RCC_IC14_Enable ; 0x34187BB8
0x34186F9E: E00B B 46L735 ; 0x34186FB8
.L734:
0x34186FA0: 9804 LDR R0, [SP, #16]
0x34186FA2: F8D0 0168 LDR.W R0, [R0, #0x0168]
0x34186FA6: F641 0130 MOVW R1, #0x1830
0x34186FAA: F2C0 7101 MOVT R1, #0x0701
0x34186FAE: 4288 CMP R0, R1
0x34186FB0: D102 BNE 46L735 ; 0x34186FB8
0x34186FB2: F008 F99F BL LL_RCC_CLKP_Enable ; 0x3418F2F4
0x34186FB6: E7FF B 46L735 ; 0x34186FB8
.L735:
0x34186FB8: 9804 LDR R0, [SP, #16]
0x34186FBA: F8D0 0168 LDR.W R0, [R0, #0x0168]
0x34186FBE: F000 FE61 BL LL_RCC_SetUSARTClockSource ; 0x34187C84
.L736:
0x34186FC2: 9804 LDR R0, [SP, #16]
0x34186FC4: 7940 LDRB R0, [R0, #5]
0x34186FC6: 0600 LSLS R0, R0, #24
0x34186FC8: 2800 CMP R0, #0
0x34186FCA: F140 80F5 BPL.W 46L753 ; 0x341871B8
0x34186FCE: 9804 LDR R0, [SP, #16]
0x34186FD0: F8D0 016C LDR.W R0, [R0, #0x016C]
0x34186FD4: F641 4130 MOVW R1, #0x1C30
0x34186FD8: F2C0 7100 MOVT R1, #0x0700
0x34186FDC: 4288 CMP R0, R1
0x34186FDE: D035 BEQ 46L737 ; 0x3418704C
0x34186FE0: 9804 LDR R0, [SP, #16]
0x34186FE2: F8D0 016C LDR.W R0, [R0, #0x016C]
0x34186FE6: F641 4130 MOVW R1, #0x1C30
0x34186FEA: F2C0 7101 MOVT R1, #0x0701
0x34186FEE: 4288 CMP R0, R1
0x34186FF0: D02C BEQ 46L737 ; 0x3418704C
0x34186FF2: 9804 LDR R0, [SP, #16]
0x34186FF4: F8D0 016C LDR.W R0, [R0, #0x016C]
0x34186FF8: F641 4130 MOVW R1, #0x1C30
0x34186FFC: F2C0 7102 MOVT R1, #0x0702
0x34187000: 4288 CMP R0, R1
0x34187002: D023 BEQ 46L737 ; 0x3418704C
0x34187004: 9804 LDR R0, [SP, #16]
0x34187006: F8D0 016C LDR.W R0, [R0, #0x016C]
0x3418700A: F641 4130 MOVW R1, #0x1C30
0x3418700E: F2C0 7103 MOVT R1, #0x0703
0x34187012: 4288 CMP R0, R1
0x34187014: D01A BEQ 46L737 ; 0x3418704C
0x34187016: 9804 LDR R0, [SP, #16]
0x34187018: F8D0 016C LDR.W R0, [R0, #0x016C]
0x3418701C: F641 4130 MOVW R1, #0x1C30
0x34187020: F2C0 7104 MOVT R1, #0x0704
0x34187024: 4288 CMP R0, R1
0x34187026: D011 BEQ 46L737 ; 0x3418704C
0x34187028: 9804 LDR R0, [SP, #16]
0x3418702A: F8D0 016C LDR.W R0, [R0, #0x016C]
0x3418702E: F641 4130 MOVW R1, #0x1C30
0x34187032: F2C0 7105 MOVT R1, #0x0705
0x34187036: 4288 CMP R0, R1
0x34187038: D008 BEQ 46L737 ; 0x3418704C
0x3418703A: 9804 LDR R0, [SP, #16]
0x3418703C: F8D0 016C LDR.W R0, [R0, #0x016C]
0x34187040: F641 4130 MOVW R1, #0x1C30
0x34187044: F2C0 7106 MOVT R1, #0x0706
0x34187048: 4288 CMP R0, R1
0x3418704A: D100 BNE 46L738 ; 0x3418704E
.L737:
0x3418704C: E007 B 46L739 ; 0x3418705E
.L738:
0x3418704E: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34187052: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34187056: F640 0156 MOVW R1, #0x0856
0x3418705A: F005 FE69 BL assert_failed ; 0x3418CD30
.L739:
0x3418705E: 9804 LDR R0, [SP, #16]
0x34187060: F8D0 016C LDR.W R0, [R0, #0x016C]
0x34187064: F641 4130 MOVW R1, #0x1C30
0x34187068: F2C0 7102 MOVT R1, #0x0702
0x3418706C: 4288 CMP R0, R1
0x3418706E: D144 BNE 46L745 ; 0x341870FA
0x34187070: 9804 LDR R0, [SP, #16]
0x34187072: 6C80 LDR R0, [R0, #72]
0x34187074: B170 CBZ R0, .L740 ; 0x34187094
0x34187076: 9804 LDR R0, [SP, #16]
0x34187078: 6C80 LDR R0, [R0, #72]
0x3418707A: F1B0 5F80 CMP.W R0, #0x10000000
0x3418707E: D009 BEQ 46L740 ; 0x34187094
0x34187080: 9804 LDR R0, [SP, #16]
0x34187082: 6C80 LDR R0, [R0, #72]
0x34187084: F1B0 5F00 CMP.W R0, #0x20000000
0x34187088: D004 BEQ 46L740 ; 0x34187094
0x3418708A: 9804 LDR R0, [SP, #16]
0x3418708C: 6C80 LDR R0, [R0, #72]
0x3418708E: F1B0 5F40 CMP.W R0, #0x30000000
0x34187092: D100 BNE 46L741 ; 0x34187096
.L740:
0x34187094: E007 B 46L742 ; 0x341870A6
.L741:
0x34187096: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x3418709A: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x3418709E: F640 015B MOVW R1, #0x085B
0x341870A2: F005 FE45 BL assert_failed ; 0x3418CD30
.L742:
0x341870A6: 9804 LDR R0, [SP, #16]
0x341870A8: 6CC0 LDR R0, [R0, #76]
0x341870AA: B128 CBZ R0, .L743 ; 0x341870B8
0x341870AC: 9804 LDR R0, [SP, #16]
0x341870AE: 6CC0 LDR R0, [R0, #76]
0x341870B0: F5B0 7F80 CMP.W R0, #0x0100
0x341870B4: D800 BHI 46L743 ; 0x341870B8
0x341870B6: E007 B 46L744 ; 0x341870C8
.L743:
0x341870B8: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341870BC: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341870C0: F640 015C MOVW R1, #0x085C
0x341870C4: F005 FE34 BL assert_failed ; 0x3418CD30
.L744:
0x341870C8: F248 01E4 MOVW R1, #0x80E4
0x341870CC: F2C5 6102 MOVT R1, #0x5602
0x341870D0: 6808 LDR R0, [R1]
0x341870D2: F64F 72FF MOVW R2, #0xFFFF
0x341870D6: F6CC 7200 MOVT R2, #0xCF00
0x341870DA: 4010 ANDS R0, R2
0x341870DC: 9B04 LDR R3, [SP, #16]
0x341870DE: 6C9A LDR R2, [R3, #72]
0x341870E0: F8D3 C04C LDR.W R12, [R3, #76]
0x341870E4: 2300 MOVS R3, #0
0x341870E6: F6CF 73FF MOVT R3, #0xFFFF
0x341870EA: EB03 430C ADD.W R3, R3, R12, LSL #16
0x341870EE: 431A ORRS R2, R3
0x341870F0: 4310 ORRS R0, R2
0x341870F2: 6008 STR R0, [R1]
0x341870F4: F000 FD58 BL LL_RCC_IC9_Enable ; 0x34187BA8
0x341870F8: E059 B 46L752 ; 0x341871AE
.L745:
0x341870FA: 9804 LDR R0, [SP, #16]
0x341870FC: F8D0 016C LDR.W R0, [R0, #0x016C]
0x34187100: F641 4130 MOVW R1, #0x1C30
0x34187104: F2C0 7103 MOVT R1, #0x0703
0x34187108: 4288 CMP R0, R1
0x3418710A: D144 BNE 46L751 ; 0x34187196
0x3418710C: 9804 LDR R0, [SP, #16]
0x3418710E: 6F00 LDR R0, [R0, #112]
0x34187110: B170 CBZ R0, .L746 ; 0x34187130
0x34187112: 9804 LDR R0, [SP, #16]
0x34187114: 6F00 LDR R0, [R0, #112]
0x34187116: F1B0 5F80 CMP.W R0, #0x10000000
0x3418711A: D009 BEQ 46L746 ; 0x34187130
0x3418711C: 9804 LDR R0, [SP, #16]
0x3418711E: 6F00 LDR R0, [R0, #112]
0x34187120: F1B0 5F00 CMP.W R0, #0x20000000
0x34187124: D004 BEQ 46L746 ; 0x34187130
0x34187126: 9804 LDR R0, [SP, #16]
0x34187128: 6F00 LDR R0, [R0, #112]
0x3418712A: F1B0 5F40 CMP.W R0, #0x30000000
0x3418712E: D100 BNE 46L747 ; 0x34187132
.L746:
0x34187130: E007 B 46L748 ; 0x34187142
.L747:
0x34187132: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34187136: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x3418713A: F640 0168 MOVW R1, #0x0868
0x3418713E: F005 FDF7 BL assert_failed ; 0x3418CD30
.L748:
0x34187142: 9804 LDR R0, [SP, #16]
0x34187144: 6F40 LDR R0, [R0, #116]
0x34187146: B128 CBZ R0, .L749 ; 0x34187154
0x34187148: 9804 LDR R0, [SP, #16]
0x3418714A: 6F40 LDR R0, [R0, #116]
0x3418714C: F5B0 7F80 CMP.W R0, #0x0100
0x34187150: D800 BHI 46L749 ; 0x34187154
0x34187152: E007 B 46L750 ; 0x34187164
.L749:
0x34187154: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34187158: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x3418715C: F640 0169 MOVW R1, #0x0869
0x34187160: F005 FDE6 BL assert_failed ; 0x3418CD30
.L750:
0x34187164: F248 01F8 MOVW R1, #0x80F8
0x34187168: F2C5 6102 MOVT R1, #0x5602
0x3418716C: 6808 LDR R0, [R1]
0x3418716E: F64F 72FF MOVW R2, #0xFFFF
0x34187172: F6CC 7200 MOVT R2, #0xCF00
0x34187176: 4010 ANDS R0, R2
0x34187178: 9B04 LDR R3, [SP, #16]
0x3418717A: 6F1A LDR R2, [R3, #112]
0x3418717C: F8D3 C074 LDR.W R12, [R3, #116]
0x34187180: 2300 MOVS R3, #0
0x34187182: F6CF 73FF MOVT R3, #0xFFFF
0x34187186: EB03 430C ADD.W R3, R3, R12, LSL #16
0x3418718A: 431A ORRS R2, R3
0x3418718C: 4310 ORRS R0, R2
0x3418718E: 6008 STR R0, [R1]
0x34187190: F000 FD12 BL LL_RCC_IC14_Enable ; 0x34187BB8
0x34187194: E00B B 46L752 ; 0x341871AE
.L751:
0x34187196: 9804 LDR R0, [SP, #16]
0x34187198: F8D0 016C LDR.W R0, [R0, #0x016C]
0x3418719C: F641 4130 MOVW R1, #0x1C30
0x341871A0: F2C0 7101 MOVT R1, #0x0701
0x341871A4: 4288 CMP R0, R1
0x341871A6: D102 BNE 46L752 ; 0x341871AE
0x341871A8: F008 F8A4 BL LL_RCC_CLKP_Enable ; 0x3418F2F4
0x341871AC: E7FF B 46L752 ; 0x341871AE
.L752:
0x341871AE: 9804 LDR R0, [SP, #16]
0x341871B0: F8D0 016C LDR.W R0, [R0, #0x016C]
0x341871B4: F000 FD66 BL LL_RCC_SetUSARTClockSource ; 0x34187C84
.L753:
0x341871B8: 9804 LDR R0, [SP, #16]
0x341871BA: 7980 LDRB R0, [R0, #6]
0x341871BC: 07C0 LSLS R0, R0, #31
0x341871BE: 2800 CMP R0, #0
0x341871C0: F000 80EB BEQ.W 46L770 ; 0x3418739A
0x341871C4: 9804 LDR R0, [SP, #16]
0x341871C6: F8D0 0170 LDR.W R0, [R0, #0x0170]
0x341871CA: 2134 MOVS R1, #52
0x341871CC: F2C0 7100 MOVT R1, #0x0700
0x341871D0: 4288 CMP R0, R1
0x341871D2: D02F BEQ 46L754 ; 0x34187234
0x341871D4: 9804 LDR R0, [SP, #16]
0x341871D6: F8D0 0170 LDR.W R0, [R0, #0x0170]
0x341871DA: 2134 MOVS R1, #52
0x341871DC: F2C0 7101 MOVT R1, #0x0701
0x341871E0: 4288 CMP R0, R1
0x341871E2: D027 BEQ 46L754 ; 0x34187234
0x341871E4: 9804 LDR R0, [SP, #16]
0x341871E6: F8D0 0170 LDR.W R0, [R0, #0x0170]
0x341871EA: 2134 MOVS R1, #52
0x341871EC: F2C0 7102 MOVT R1, #0x0702
0x341871F0: 4288 CMP R0, R1
0x341871F2: D01F BEQ 46L754 ; 0x34187234
0x341871F4: 9804 LDR R0, [SP, #16]
0x341871F6: F8D0 0170 LDR.W R0, [R0, #0x0170]
0x341871FA: 2134 MOVS R1, #52
0x341871FC: F2C0 7103 MOVT R1, #0x0703
0x34187200: 4288 CMP R0, R1
0x34187202: D017 BEQ 46L754 ; 0x34187234
0x34187204: 9804 LDR R0, [SP, #16]
0x34187206: F8D0 0170 LDR.W R0, [R0, #0x0170]
0x3418720A: 2134 MOVS R1, #52
0x3418720C: F2C0 7104 MOVT R1, #0x0704
0x34187210: 4288 CMP R0, R1
0x34187212: D00F BEQ 46L754 ; 0x34187234
0x34187214: 9804 LDR R0, [SP, #16]
0x34187216: F8D0 0170 LDR.W R0, [R0, #0x0170]
0x3418721A: 2134 MOVS R1, #52
0x3418721C: F2C0 7105 MOVT R1, #0x0705
0x34187220: 4288 CMP R0, R1
0x34187222: D007 BEQ 46L754 ; 0x34187234
0x34187224: 9804 LDR R0, [SP, #16]
0x34187226: F8D0 0170 LDR.W R0, [R0, #0x0170]
0x3418722A: 2134 MOVS R1, #52
0x3418722C: F2C0 7106 MOVT R1, #0x0706
0x34187230: 4288 CMP R0, R1
0x34187232: D100 BNE 46L755 ; 0x34187236
.L754:
0x34187234: E007 B 46L756 ; 0x34187246
.L755:
0x34187236: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x3418723A: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x3418723E: F640 0183 MOVW R1, #0x0883
0x34187242: F005 FD75 BL assert_failed ; 0x3418CD30
.L756:
0x34187246: 9804 LDR R0, [SP, #16]
0x34187248: F8D0 0170 LDR.W R0, [R0, #0x0170]
0x3418724C: 2134 MOVS R1, #52
0x3418724E: F2C0 7102 MOVT R1, #0x0702
0x34187252: 4288 CMP R0, R1
0x34187254: D144 BNE 46L762 ; 0x341872E0
0x34187256: 9804 LDR R0, [SP, #16]
0x34187258: 6C80 LDR R0, [R0, #72]
0x3418725A: B170 CBZ R0, .L757 ; 0x3418727A
0x3418725C: 9804 LDR R0, [SP, #16]
0x3418725E: 6C80 LDR R0, [R0, #72]
0x34187260: F1B0 5F80 CMP.W R0, #0x10000000
0x34187264: D009 BEQ 46L757 ; 0x3418727A
0x34187266: 9804 LDR R0, [SP, #16]
0x34187268: 6C80 LDR R0, [R0, #72]
0x3418726A: F1B0 5F00 CMP.W R0, #0x20000000
0x3418726E: D004 BEQ 46L757 ; 0x3418727A
0x34187270: 9804 LDR R0, [SP, #16]
0x34187272: 6C80 LDR R0, [R0, #72]
0x34187274: F1B0 5F40 CMP.W R0, #0x30000000
0x34187278: D100 BNE 46L758 ; 0x3418727C
.L757:
0x3418727A: E007 B 46L759 ; 0x3418728C
.L758:
0x3418727C: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34187280: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34187284: F640 0188 MOVW R1, #0x0888
0x34187288: F005 FD52 BL assert_failed ; 0x3418CD30
.L759:
0x3418728C: 9804 LDR R0, [SP, #16]
0x3418728E: 6CC0 LDR R0, [R0, #76]
0x34187290: B128 CBZ R0, .L760 ; 0x3418729E
0x34187292: 9804 LDR R0, [SP, #16]
0x34187294: 6CC0 LDR R0, [R0, #76]
0x34187296: F5B0 7F80 CMP.W R0, #0x0100
0x3418729A: D800 BHI 46L760 ; 0x3418729E
0x3418729C: E007 B 46L761 ; 0x341872AE
.L760:
0x3418729E: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341872A2: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341872A6: F640 0189 MOVW R1, #0x0889
0x341872AA: F005 FD41 BL assert_failed ; 0x3418CD30
.L761:
0x341872AE: F248 01E4 MOVW R1, #0x80E4
0x341872B2: F2C5 6102 MOVT R1, #0x5602
0x341872B6: 6808 LDR R0, [R1]
0x341872B8: F64F 72FF MOVW R2, #0xFFFF
0x341872BC: F6CC 7200 MOVT R2, #0xCF00
0x341872C0: 4010 ANDS R0, R2
0x341872C2: 9B04 LDR R3, [SP, #16]
0x341872C4: 6C9A LDR R2, [R3, #72]
0x341872C6: F8D3 C04C LDR.W R12, [R3, #76]
0x341872CA: 2300 MOVS R3, #0
0x341872CC: F6CF 73FF MOVT R3, #0xFFFF
0x341872D0: EB03 430C ADD.W R3, R3, R12, LSL #16
0x341872D4: 431A ORRS R2, R3
0x341872D6: 4310 ORRS R0, R2
0x341872D8: 6008 STR R0, [R1]
0x341872DA: F000 FC65 BL LL_RCC_IC9_Enable ; 0x34187BA8
0x341872DE: E057 B 46L769 ; 0x34187390
.L762:
0x341872E0: 9804 LDR R0, [SP, #16]
0x341872E2: F8D0 0170 LDR.W R0, [R0, #0x0170]
0x341872E6: 2134 MOVS R1, #52
0x341872E8: F2C0 7103 MOVT R1, #0x0703
0x341872EC: 4288 CMP R0, R1
0x341872EE: D144 BNE 46L768 ; 0x3418737A
0x341872F0: 9804 LDR R0, [SP, #16]
0x341872F2: 6F00 LDR R0, [R0, #112]
0x341872F4: B170 CBZ R0, .L763 ; 0x34187314
0x341872F6: 9804 LDR R0, [SP, #16]
0x341872F8: 6F00 LDR R0, [R0, #112]
0x341872FA: F1B0 5F80 CMP.W R0, #0x10000000
0x341872FE: D009 BEQ 46L763 ; 0x34187314
0x34187300: 9804 LDR R0, [SP, #16]
0x34187302: 6F00 LDR R0, [R0, #112]
0x34187304: F1B0 5F00 CMP.W R0, #0x20000000
0x34187308: D004 BEQ 46L763 ; 0x34187314
0x3418730A: 9804 LDR R0, [SP, #16]
0x3418730C: 6F00 LDR R0, [R0, #112]
0x3418730E: F1B0 5F40 CMP.W R0, #0x30000000
0x34187312: D100 BNE 46L764 ; 0x34187316
.L763:
0x34187314: E007 B 46L765 ; 0x34187326
.L764:
0x34187316: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x3418731A: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x3418731E: F640 0195 MOVW R1, #0x0895
0x34187322: F005 FD05 BL assert_failed ; 0x3418CD30
.L765:
0x34187326: 9804 LDR R0, [SP, #16]
0x34187328: 6F40 LDR R0, [R0, #116]
0x3418732A: B128 CBZ R0, .L766 ; 0x34187338
0x3418732C: 9804 LDR R0, [SP, #16]
0x3418732E: 6F40 LDR R0, [R0, #116]
0x34187330: F5B0 7F80 CMP.W R0, #0x0100
0x34187334: D800 BHI 46L766 ; 0x34187338
0x34187336: E007 B 46L767 ; 0x34187348
.L766:
0x34187338: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x3418733C: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34187340: F640 0196 MOVW R1, #0x0896
0x34187344: F005 FCF4 BL assert_failed ; 0x3418CD30
.L767:
0x34187348: F248 01F8 MOVW R1, #0x80F8
0x3418734C: F2C5 6102 MOVT R1, #0x5602
0x34187350: 6808 LDR R0, [R1]
0x34187352: F64F 72FF MOVW R2, #0xFFFF
0x34187356: F6CC 7200 MOVT R2, #0xCF00
0x3418735A: 4010 ANDS R0, R2
0x3418735C: 9B04 LDR R3, [SP, #16]
0x3418735E: 6F1A LDR R2, [R3, #112]
0x34187360: F8D3 C074 LDR.W R12, [R3, #116]
0x34187364: 2300 MOVS R3, #0
0x34187366: F6CF 73FF MOVT R3, #0xFFFF
0x3418736A: EB03 430C ADD.W R3, R3, R12, LSL #16
0x3418736E: 431A ORRS R2, R3
0x34187370: 4310 ORRS R0, R2
0x34187372: 6008 STR R0, [R1]
0x34187374: F000 FC20 BL LL_RCC_IC14_Enable ; 0x34187BB8
0x34187378: E00A B 46L769 ; 0x34187390
.L768:
0x3418737A: 9804 LDR R0, [SP, #16]
0x3418737C: F8D0 0170 LDR.W R0, [R0, #0x0170]
0x34187380: 2134 MOVS R1, #52
0x34187382: F2C0 7101 MOVT R1, #0x0701
0x34187386: 4288 CMP R0, R1
0x34187388: D102 BNE 46L769 ; 0x34187390
0x3418738A: F007 FFB3 BL LL_RCC_CLKP_Enable ; 0x3418F2F4
0x3418738E: E7FF B 46L769 ; 0x34187390
.L769:
0x34187390: 9804 LDR R0, [SP, #16]
0x34187392: F8D0 0170 LDR.W R0, [R0, #0x0170]
0x34187396: F000 FC75 BL LL_RCC_SetUSARTClockSource ; 0x34187C84
.L770:
0x3418739A: 9804 LDR R0, [SP, #16]
0x3418739C: 7980 LDRB R0, [R0, #6]
0x3418739E: 0780 LSLS R0, R0, #30
0x341873A0: 2800 CMP R0, #0
0x341873A2: F140 80F5 BPL.W 46L787 ; 0x34187590
0x341873A6: 9804 LDR R0, [SP, #16]
0x341873A8: F8D0 0174 LDR.W R0, [R0, #0x0174]
0x341873AC: F240 4134 MOVW R1, #0x0434
0x341873B0: F2C0 7100 MOVT R1, #0x0700
0x341873B4: 4288 CMP R0, R1
0x341873B6: D035 BEQ 46L771 ; 0x34187424
0x341873B8: 9804 LDR R0, [SP, #16]
0x341873BA: F8D0 0174 LDR.W R0, [R0, #0x0174]
0x341873BE: F240 4134 MOVW R1, #0x0434
0x341873C2: F2C0 7101 MOVT R1, #0x0701
0x341873C6: 4288 CMP R0, R1
0x341873C8: D02C BEQ 46L771 ; 0x34187424
0x341873CA: 9804 LDR R0, [SP, #16]
0x341873CC: F8D0 0174 LDR.W R0, [R0, #0x0174]
0x341873D0: F240 4134 MOVW R1, #0x0434
0x341873D4: F2C0 7102 MOVT R1, #0x0702
0x341873D8: 4288 CMP R0, R1
0x341873DA: D023 BEQ 46L771 ; 0x34187424
0x341873DC: 9804 LDR R0, [SP, #16]
0x341873DE: F8D0 0174 LDR.W R0, [R0, #0x0174]
0x341873E2: F240 4134 MOVW R1, #0x0434
0x341873E6: F2C0 7103 MOVT R1, #0x0703
0x341873EA: 4288 CMP R0, R1
0x341873EC: D01A BEQ 46L771 ; 0x34187424
0x341873EE: 9804 LDR R0, [SP, #16]
0x341873F0: F8D0 0174 LDR.W R0, [R0, #0x0174]
0x341873F4: F240 4134 MOVW R1, #0x0434
0x341873F8: F2C0 7104 MOVT R1, #0x0704
0x341873FC: 4288 CMP R0, R1
0x341873FE: D011 BEQ 46L771 ; 0x34187424
0x34187400: 9804 LDR R0, [SP, #16]
0x34187402: F8D0 0174 LDR.W R0, [R0, #0x0174]
0x34187406: F240 4134 MOVW R1, #0x0434
0x3418740A: F2C0 7105 MOVT R1, #0x0705
0x3418740E: 4288 CMP R0, R1
0x34187410: D008 BEQ 46L771 ; 0x34187424
0x34187412: 9804 LDR R0, [SP, #16]
0x34187414: F8D0 0174 LDR.W R0, [R0, #0x0174]
0x34187418: F240 4134 MOVW R1, #0x0434
0x3418741C: F2C0 7106 MOVT R1, #0x0706
0x34187420: 4288 CMP R0, R1
0x34187422: D100 BNE 46L772 ; 0x34187426
.L771:
0x34187424: E007 B 46L773 ; 0x34187436
.L772:
0x34187426: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x3418742A: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x3418742E: F44F 610B MOV.W R1, #0x08B0
0x34187432: F005 FC7D BL assert_failed ; 0x3418CD30
.L773:
0x34187436: 9804 LDR R0, [SP, #16]
0x34187438: F8D0 0174 LDR.W R0, [R0, #0x0174]
0x3418743C: F240 4134 MOVW R1, #0x0434
0x34187440: F2C0 7102 MOVT R1, #0x0702
0x34187444: 4288 CMP R0, R1
0x34187446: D144 BNE 46L779 ; 0x341874D2
0x34187448: 9804 LDR R0, [SP, #16]
0x3418744A: 6C80 LDR R0, [R0, #72]
0x3418744C: B170 CBZ R0, .L774 ; 0x3418746C
0x3418744E: 9804 LDR R0, [SP, #16]
0x34187450: 6C80 LDR R0, [R0, #72]
0x34187452: F1B0 5F80 CMP.W R0, #0x10000000
0x34187456: D009 BEQ 46L774 ; 0x3418746C
0x34187458: 9804 LDR R0, [SP, #16]
0x3418745A: 6C80 LDR R0, [R0, #72]
0x3418745C: F1B0 5F00 CMP.W R0, #0x20000000
0x34187460: D004 BEQ 46L774 ; 0x3418746C
0x34187462: 9804 LDR R0, [SP, #16]
0x34187464: 6C80 LDR R0, [R0, #72]
0x34187466: F1B0 5F40 CMP.W R0, #0x30000000
0x3418746A: D100 BNE 46L775 ; 0x3418746E
.L774:
0x3418746C: E007 B 46L776 ; 0x3418747E
.L775:
0x3418746E: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34187472: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34187476: F640 01B5 MOVW R1, #0x08B5
0x3418747A: F005 FC59 BL assert_failed ; 0x3418CD30
.L776:
0x3418747E: 9804 LDR R0, [SP, #16]
0x34187480: 6CC0 LDR R0, [R0, #76]
0x34187482: B128 CBZ R0, .L777 ; 0x34187490
0x34187484: 9804 LDR R0, [SP, #16]
0x34187486: 6CC0 LDR R0, [R0, #76]
0x34187488: F5B0 7F80 CMP.W R0, #0x0100
0x3418748C: D800 BHI 46L777 ; 0x34187490
0x3418748E: E007 B 46L778 ; 0x341874A0
.L777:
0x34187490: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34187494: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34187498: F640 01B6 MOVW R1, #0x08B6
0x3418749C: F005 FC48 BL assert_failed ; 0x3418CD30
.L778:
0x341874A0: F248 01E4 MOVW R1, #0x80E4
0x341874A4: F2C5 6102 MOVT R1, #0x5602
0x341874A8: 6808 LDR R0, [R1]
0x341874AA: F64F 72FF MOVW R2, #0xFFFF
0x341874AE: F6CC 7200 MOVT R2, #0xCF00
0x341874B2: 4010 ANDS R0, R2
0x341874B4: 9B04 LDR R3, [SP, #16]
0x341874B6: 6C9A LDR R2, [R3, #72]
0x341874B8: F8D3 C04C LDR.W R12, [R3, #76]
0x341874BC: 2300 MOVS R3, #0
0x341874BE: F6CF 73FF MOVT R3, #0xFFFF
0x341874C2: EB03 430C ADD.W R3, R3, R12, LSL #16
0x341874C6: 431A ORRS R2, R3
0x341874C8: 4310 ORRS R0, R2
0x341874CA: 6008 STR R0, [R1]
0x341874CC: F000 FB6C BL LL_RCC_IC9_Enable ; 0x34187BA8
0x341874D0: E059 B 46L786 ; 0x34187586
.L779:
0x341874D2: 9804 LDR R0, [SP, #16]
0x341874D4: F8D0 0174 LDR.W R0, [R0, #0x0174]
0x341874D8: F240 4134 MOVW R1, #0x0434
0x341874DC: F2C0 7103 MOVT R1, #0x0703
0x341874E0: 4288 CMP R0, R1
0x341874E2: D144 BNE 46L785 ; 0x3418756E
0x341874E4: 9804 LDR R0, [SP, #16]
0x341874E6: 6F00 LDR R0, [R0, #112]
0x341874E8: B170 CBZ R0, .L780 ; 0x34187508
0x341874EA: 9804 LDR R0, [SP, #16]
0x341874EC: 6F00 LDR R0, [R0, #112]
0x341874EE: F1B0 5F80 CMP.W R0, #0x10000000
0x341874F2: D009 BEQ 46L780 ; 0x34187508
0x341874F4: 9804 LDR R0, [SP, #16]
0x341874F6: 6F00 LDR R0, [R0, #112]
0x341874F8: F1B0 5F00 CMP.W R0, #0x20000000
0x341874FC: D004 BEQ 46L780 ; 0x34187508
0x341874FE: 9804 LDR R0, [SP, #16]
0x34187500: 6F00 LDR R0, [R0, #112]
0x34187502: F1B0 5F40 CMP.W R0, #0x30000000
0x34187506: D100 BNE 46L781 ; 0x3418750A
.L780:
0x34187508: E007 B 46L782 ; 0x3418751A
.L781:
0x3418750A: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x3418750E: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34187512: F640 01C2 MOVW R1, #0x08C2
0x34187516: F005 FC0B BL assert_failed ; 0x3418CD30
.L782:
0x3418751A: 9804 LDR R0, [SP, #16]
0x3418751C: 6F40 LDR R0, [R0, #116]
0x3418751E: B128 CBZ R0, .L783 ; 0x3418752C
0x34187520: 9804 LDR R0, [SP, #16]
0x34187522: 6F40 LDR R0, [R0, #116]
0x34187524: F5B0 7F80 CMP.W R0, #0x0100
0x34187528: D800 BHI 46L783 ; 0x3418752C
0x3418752A: E007 B 46L784 ; 0x3418753C
.L783:
0x3418752C: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34187530: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34187534: F640 01C3 MOVW R1, #0x08C3
0x34187538: F005 FBFA BL assert_failed ; 0x3418CD30
.L784:
0x3418753C: F248 01F8 MOVW R1, #0x80F8
0x34187540: F2C5 6102 MOVT R1, #0x5602
0x34187544: 6808 LDR R0, [R1]
0x34187546: F64F 72FF MOVW R2, #0xFFFF
0x3418754A: F6CC 7200 MOVT R2, #0xCF00
0x3418754E: 4010 ANDS R0, R2
0x34187550: 9B04 LDR R3, [SP, #16]
0x34187552: 6F1A LDR R2, [R3, #112]
0x34187554: F8D3 C074 LDR.W R12, [R3, #116]
0x34187558: 2300 MOVS R3, #0
0x3418755A: F6CF 73FF MOVT R3, #0xFFFF
0x3418755E: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34187562: 431A ORRS R2, R3
0x34187564: 4310 ORRS R0, R2
0x34187566: 6008 STR R0, [R1]
0x34187568: F000 FB26 BL LL_RCC_IC14_Enable ; 0x34187BB8
0x3418756C: E00B B 46L786 ; 0x34187586
.L785:
0x3418756E: 9804 LDR R0, [SP, #16]
0x34187570: F8D0 0174 LDR.W R0, [R0, #0x0174]
0x34187574: F240 4134 MOVW R1, #0x0434
0x34187578: F2C0 7101 MOVT R1, #0x0701
0x3418757C: 4288 CMP R0, R1
0x3418757E: D102 BNE 46L786 ; 0x34187586
0x34187580: F007 FEB8 BL LL_RCC_CLKP_Enable ; 0x3418F2F4
0x34187584: E7FF B 46L786 ; 0x34187586
.L786:
0x34187586: 9804 LDR R0, [SP, #16]
0x34187588: F8D0 0174 LDR.W R0, [R0, #0x0174]
0x3418758C: F000 FB7A BL LL_RCC_SetUSARTClockSource ; 0x34187C84
.L787:
0x34187590: 9804 LDR R0, [SP, #16]
0x34187592: 7980 LDRB R0, [R0, #6]
0x34187594: 0740 LSLS R0, R0, #29
0x34187596: 2800 CMP R0, #0
0x34187598: F140 80A2 BPL.W 46L799 ; 0x341876E0
0x3418759C: 9804 LDR R0, [SP, #16]
0x3418759E: F8D0 0178 LDR.W R0, [R0, #0x0178]
0x341875A2: F640 4114 MOVW R1, #0x0C14
0x341875A6: F2C0 3100 MOVT R1, #0x0300
0x341875AA: 4288 CMP R0, R1
0x341875AC: D023 BEQ 46L788 ; 0x341875F6
0x341875AE: 9804 LDR R0, [SP, #16]
0x341875B0: F8D0 0178 LDR.W R0, [R0, #0x0178]
0x341875B4: F640 4114 MOVW R1, #0x0C14
0x341875B8: F2C0 3101 MOVT R1, #0x0301
0x341875BC: 4288 CMP R0, R1
0x341875BE: D01A BEQ 46L788 ; 0x341875F6
0x341875C0: 9804 LDR R0, [SP, #16]
0x341875C2: F8D0 0178 LDR.W R0, [R0, #0x0178]
0x341875C6: F640 4114 MOVW R1, #0x0C14
0x341875CA: F2C0 3102 MOVT R1, #0x0302
0x341875CE: 4288 CMP R0, R1
0x341875D0: D011 BEQ 46L788 ; 0x341875F6
0x341875D2: 9804 LDR R0, [SP, #16]
0x341875D4: F8D0 0178 LDR.W R0, [R0, #0x0178]
0x341875D8: F640 4114 MOVW R1, #0x0C14
0x341875DC: F2C0 3103 MOVT R1, #0x0303
0x341875E0: 4288 CMP R0, R1
0x341875E2: D008 BEQ 46L788 ; 0x341875F6
0x341875E4: 9804 LDR R0, [SP, #16]
0x341875E6: F8D0 0178 LDR.W R0, [R0, #0x0178]
0x341875EA: F640 4114 MOVW R1, #0x0C14
0x341875EE: F2C8 3103 MOVT R1, #0x8303
0x341875F2: 4288 CMP R0, R1
0x341875F4: D100 BNE 46L789 ; 0x341875F8
.L788:
0x341875F6: E007 B 46L790 ; 0x34187608
.L789:
0x341875F8: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341875FC: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34187600: F640 01DD MOVW R1, #0x08DD
0x34187604: F005 FB94 BL assert_failed ; 0x3418CD30
.L790:
0x34187608: 9804 LDR R0, [SP, #16]
0x3418760A: F8D0 0178 LDR.W R0, [R0, #0x0178]
0x3418760E: F640 4114 MOVW R1, #0x0C14
0x34187612: F2C0 3102 MOVT R1, #0x0302
0x34187616: 4288 CMP R0, R1
0x34187618: D144 BNE 46L796 ; 0x341876A4
0x3418761A: 9804 LDR R0, [SP, #16]
0x3418761C: 6F80 LDR R0, [R0, #120]
0x3418761E: B170 CBZ R0, .L791 ; 0x3418763E
0x34187620: 9804 LDR R0, [SP, #16]
0x34187622: 6F80 LDR R0, [R0, #120]
0x34187624: F1B0 5F80 CMP.W R0, #0x10000000
0x34187628: D009 BEQ 46L791 ; 0x3418763E
0x3418762A: 9804 LDR R0, [SP, #16]
0x3418762C: 6F80 LDR R0, [R0, #120]
0x3418762E: F1B0 5F00 CMP.W R0, #0x20000000
0x34187632: D004 BEQ 46L791 ; 0x3418763E
0x34187634: 9804 LDR R0, [SP, #16]
0x34187636: 6F80 LDR R0, [R0, #120]
0x34187638: F1B0 5F40 CMP.W R0, #0x30000000
0x3418763C: D100 BNE 46L792 ; 0x34187640
.L791:
0x3418763E: E007 B 46L793 ; 0x34187650
.L792:
0x34187640: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34187644: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34187648: F640 01E2 MOVW R1, #0x08E2
0x3418764C: F005 FB70 BL assert_failed ; 0x3418CD30
.L793:
0x34187650: 9804 LDR R0, [SP, #16]
0x34187652: 6FC0 LDR R0, [R0, #124]
0x34187654: B128 CBZ R0, .L794 ; 0x34187662
0x34187656: 9804 LDR R0, [SP, #16]
0x34187658: 6FC0 LDR R0, [R0, #124]
0x3418765A: F5B0 7F80 CMP.W R0, #0x0100
0x3418765E: D800 BHI 46L794 ; 0x34187662
0x34187660: E007 B 46L795 ; 0x34187672
.L794:
0x34187662: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34187666: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x3418766A: F640 01E3 MOVW R1, #0x08E3
0x3418766E: F005 FB5F BL assert_failed ; 0x3418CD30
.L795:
0x34187672: F248 01FC MOVW R1, #0x80FC
0x34187676: F2C5 6102 MOVT R1, #0x5602
0x3418767A: 6808 LDR R0, [R1]
0x3418767C: F64F 72FF MOVW R2, #0xFFFF
0x34187680: F6CC 7200 MOVT R2, #0xCF00
0x34187684: 4010 ANDS R0, R2
0x34187686: 9B04 LDR R3, [SP, #16]
0x34187688: 6F9A LDR R2, [R3, #120]
0x3418768A: F8D3 C07C LDR.W R12, [R3, #124]
0x3418768E: 2300 MOVS R3, #0
0x34187690: F6CF 73FF MOVT R3, #0xFFFF
0x34187694: EB03 430C ADD.W R3, R3, R12, LSL #16
0x34187698: 431A ORRS R2, R3
0x3418769A: 4310 ORRS R0, R2
0x3418769C: 6008 STR R0, [R1]
0x3418769E: F000 F9A5 BL LL_RCC_IC15_Enable.59 ; 0x341879EC
0x341876A2: E00B B 46L797 ; 0x341876BC
.L796:
0x341876A4: 9804 LDR R0, [SP, #16]
0x341876A6: F8D0 0178 LDR.W R0, [R0, #0x0178]
0x341876AA: F640 4114 MOVW R1, #0x0C14
0x341876AE: F2C0 3101 MOVT R1, #0x0301
0x341876B2: 4288 CMP R0, R1
0x341876B4: D102 BNE 46L797 ; 0x341876BC
0x341876B6: F007 FE1D BL LL_RCC_CLKP_Enable ; 0x3418F2F4
0x341876BA: E7FF B 46L797 ; 0x341876BC
.L797:
0x341876BC: 9804 LDR R0, [SP, #16]
0x341876BE: F8D0 0178 LDR.W R0, [R0, #0x0178]
0x341876C2: F020 4000 BIC R0, R0, #0x80000000
0x341876C6: F000 FAE5 BL LL_RCC_SetOTGPHYClockSource ; 0x34187C94
0x341876CA: 9804 LDR R0, [SP, #16]
0x341876CC: F8D0 0178 LDR.W R0, [R0, #0x0178]
0x341876D0: 0FC0 LSRS R0, R0, #31
0x341876D2: 2801 CMP R0, #1
0x341876D4: D102 BNE 46L798 ; 0x341876DC
0x341876D6: F007 FE25 BL LL_RCC_HSE_SelectHSEDiv2AsDiv2Clock ; 0x3418F324
0x341876DA: E001 B 46L799 ; 0x341876E0
.L798:
0x341876DC: F007 FE2C BL LL_RCC_HSE_SelectHSEAsDiv2Clock ; 0x3418F338
.L799:
0x341876E0: 9804 LDR R0, [SP, #16]
0x341876E2: 7980 LDRB R0, [R0, #6]
0x341876E4: 06C0 LSLS R0, R0, #27
0x341876E6: 2800 CMP R0, #0
0x341876E8: F140 80A2 BPL.W 46L811 ; 0x34187830
0x341876EC: 9804 LDR R0, [SP, #16]
0x341876EE: F8D0 0180 LDR.W R0, [R0, #0x0180]
0x341876F2: F241 4114 MOVW R1, #0x1414
0x341876F6: F2C0 3100 MOVT R1, #0x0300
0x341876FA: 4288 CMP R0, R1
0x341876FC: D023 BEQ 46L800 ; 0x34187746
0x341876FE: 9804 LDR R0, [SP, #16]
0x34187700: F8D0 0180 LDR.W R0, [R0, #0x0180]
0x34187704: F241 4114 MOVW R1, #0x1414
0x34187708: F2C0 3101 MOVT R1, #0x0301
0x3418770C: 4288 CMP R0, R1
0x3418770E: D01A BEQ 46L800 ; 0x34187746
0x34187710: 9804 LDR R0, [SP, #16]
0x34187712: F8D0 0180 LDR.W R0, [R0, #0x0180]
0x34187716: F241 4114 MOVW R1, #0x1414
0x3418771A: F2C0 3102 MOVT R1, #0x0302
0x3418771E: 4288 CMP R0, R1
0x34187720: D011 BEQ 46L800 ; 0x34187746
0x34187722: 9804 LDR R0, [SP, #16]
0x34187724: F8D0 0180 LDR.W R0, [R0, #0x0180]
0x34187728: F241 4114 MOVW R1, #0x1414
0x3418772C: F2C0 3103 MOVT R1, #0x0303
0x34187730: 4288 CMP R0, R1
0x34187732: D008 BEQ 46L800 ; 0x34187746
0x34187734: 9804 LDR R0, [SP, #16]
0x34187736: F8D0 0180 LDR.W R0, [R0, #0x0180]
0x3418773A: F241 4114 MOVW R1, #0x1414
0x3418773E: F2C8 3103 MOVT R1, #0x8303
0x34187742: 4288 CMP R0, R1
0x34187744: D100 BNE 46L801 ; 0x34187748
.L800:
0x34187746: E007 B 46L802 ; 0x34187758
.L801:
0x34187748: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x3418774C: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34187750: F640 01FD MOVW R1, #0x08FD
0x34187754: F005 FAEC BL assert_failed ; 0x3418CD30
.L802:
0x34187758: 9804 LDR R0, [SP, #16]
0x3418775A: F8D0 0180 LDR.W R0, [R0, #0x0180]
0x3418775E: F241 4114 MOVW R1, #0x1414
0x34187762: F2C0 3102 MOVT R1, #0x0302
0x34187766: 4288 CMP R0, R1
0x34187768: D144 BNE 46L808 ; 0x341877F4
0x3418776A: 9804 LDR R0, [SP, #16]
0x3418776C: 6F80 LDR R0, [R0, #120]
0x3418776E: B170 CBZ R0, .L803 ; 0x3418778E
0x34187770: 9804 LDR R0, [SP, #16]
0x34187772: 6F80 LDR R0, [R0, #120]
0x34187774: F1B0 5F80 CMP.W R0, #0x10000000
0x34187778: D009 BEQ 46L803 ; 0x3418778E
0x3418777A: 9804 LDR R0, [SP, #16]
0x3418777C: 6F80 LDR R0, [R0, #120]
0x3418777E: F1B0 5F00 CMP.W R0, #0x20000000
0x34187782: D004 BEQ 46L803 ; 0x3418778E
0x34187784: 9804 LDR R0, [SP, #16]
0x34187786: 6F80 LDR R0, [R0, #120]
0x34187788: F1B0 5F40 CMP.W R0, #0x30000000
0x3418778C: D100 BNE 46L804 ; 0x34187790
.L803:
0x3418778E: E007 B 46L805 ; 0x341877A0
.L804:
0x34187790: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34187794: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34187798: F640 1102 MOVW R1, #0x0902
0x3418779C: F005 FAC8 BL assert_failed ; 0x3418CD30
.L805:
0x341877A0: 9804 LDR R0, [SP, #16]
0x341877A2: 6FC0 LDR R0, [R0, #124]
0x341877A4: B128 CBZ R0, .L806 ; 0x341877B2
0x341877A6: 9804 LDR R0, [SP, #16]
0x341877A8: 6FC0 LDR R0, [R0, #124]
0x341877AA: F5B0 7F80 CMP.W R0, #0x0100
0x341877AE: D800 BHI 46L806 ; 0x341877B2
0x341877B0: E007 B 46L807 ; 0x341877C2
.L806:
0x341877B2: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341877B6: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341877BA: F640 1103 MOVW R1, #0x0903
0x341877BE: F005 FAB7 BL assert_failed ; 0x3418CD30
.L807:
0x341877C2: F248 01FC MOVW R1, #0x80FC
0x341877C6: F2C5 6102 MOVT R1, #0x5602
0x341877CA: 6808 LDR R0, [R1]
0x341877CC: F64F 72FF MOVW R2, #0xFFFF
0x341877D0: F6CC 7200 MOVT R2, #0xCF00
0x341877D4: 4010 ANDS R0, R2
0x341877D6: 9B04 LDR R3, [SP, #16]
0x341877D8: 6F9A LDR R2, [R3, #120]
0x341877DA: F8D3 C07C LDR.W R12, [R3, #124]
0x341877DE: 2300 MOVS R3, #0
0x341877E0: F6CF 73FF MOVT R3, #0xFFFF
0x341877E4: EB03 430C ADD.W R3, R3, R12, LSL #16
0x341877E8: 431A ORRS R2, R3
0x341877EA: 4310 ORRS R0, R2
0x341877EC: 6008 STR R0, [R1]
0x341877EE: F000 F8FD BL LL_RCC_IC15_Enable.59 ; 0x341879EC
0x341877F2: E00B B 46L809 ; 0x3418780C
.L808:
0x341877F4: 9804 LDR R0, [SP, #16]
0x341877F6: F8D0 0180 LDR.W R0, [R0, #0x0180]
0x341877FA: F241 4114 MOVW R1, #0x1414
0x341877FE: F2C0 3101 MOVT R1, #0x0301
0x34187802: 4288 CMP R0, R1
0x34187804: D102 BNE 46L809 ; 0x3418780C
0x34187806: F007 FD75 BL LL_RCC_CLKP_Enable ; 0x3418F2F4
0x3418780A: E7FF B 46L809 ; 0x3418780C
.L809:
0x3418780C: 9804 LDR R0, [SP, #16]
0x3418780E: F8D0 0180 LDR.W R0, [R0, #0x0180]
0x34187812: F020 4000 BIC R0, R0, #0x80000000
0x34187816: F000 FA3D BL LL_RCC_SetOTGPHYClockSource ; 0x34187C94
0x3418781A: 9804 LDR R0, [SP, #16]
0x3418781C: F8D0 0180 LDR.W R0, [R0, #0x0180]
0x34187820: 0FC0 LSRS R0, R0, #31
0x34187822: 2801 CMP R0, #1
0x34187824: D102 BNE 46L810 ; 0x3418782C
0x34187826: F007 FD7D BL LL_RCC_HSE_SelectHSEDiv2AsDiv2Clock ; 0x3418F324
0x3418782A: E001 B 46L811 ; 0x34187830
.L810:
0x3418782C: F007 FD84 BL LL_RCC_HSE_SelectHSEAsDiv2Clock ; 0x3418F338
.L811:
0x34187830: 9804 LDR R0, [SP, #16]
0x34187832: 7980 LDRB R0, [R0, #6]
0x34187834: 0700 LSLS R0, R0, #28
0x34187836: 2800 CMP R0, #0
0x34187838: D535 BPL 46L816 ; 0x341878A6
0x3418783A: 9804 LDR R0, [SP, #16]
0x3418783C: F8D0 017C LDR.W R0, [R0, #0x017C]
0x34187840: F241 0114 MOVW R1, #0x1014
0x34187844: F2C0 1100 MOVT R1, #0x0100
0x34187848: 4288 CMP R0, R1
0x3418784A: D011 BEQ 46L812 ; 0x34187870
0x3418784C: 9804 LDR R0, [SP, #16]
0x3418784E: F8D0 017C LDR.W R0, [R0, #0x017C]
0x34187852: F241 0114 MOVW R1, #0x1014
0x34187856: F2C0 1101 MOVT R1, #0x0101
0x3418785A: 4288 CMP R0, R1
0x3418785C: D008 BEQ 46L812 ; 0x34187870
0x3418785E: 9804 LDR R0, [SP, #16]
0x34187860: F8D0 017C LDR.W R0, [R0, #0x017C]
0x34187864: F241 0114 MOVW R1, #0x1014
0x34187868: F2C8 1101 MOVT R1, #0x8101
0x3418786C: 4288 CMP R0, R1
0x3418786E: D100 BNE 46L813 ; 0x34187872
.L812:
0x34187870: E007 B 46L814 ; 0x34187882
.L813:
0x34187872: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34187876: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x3418787A: F640 111D MOVW R1, #0x091D
0x3418787E: F005 FA57 BL assert_failed ; 0x3418CD30
.L814:
0x34187882: 9804 LDR R0, [SP, #16]
0x34187884: F8D0 017C LDR.W R0, [R0, #0x017C]
0x34187888: F020 4000 BIC R0, R0, #0x80000000
0x3418788C: F000 FA0A BL LL_RCC_SetOTGPHYCKREFClockSource ; 0x34187CA4
0x34187890: 9804 LDR R0, [SP, #16]
0x34187892: F8D0 017C LDR.W R0, [R0, #0x017C]
0x34187896: 0FC0 LSRS R0, R0, #31
0x34187898: 2801 CMP R0, #1
0x3418789A: D102 BNE 46L815 ; 0x341878A2
0x3418789C: F007 FD42 BL LL_RCC_HSE_SelectHSEDiv2AsDiv2Clock ; 0x3418F324
0x341878A0: E001 B 46L816 ; 0x341878A6
.L815:
0x341878A2: F007 FD49 BL LL_RCC_HSE_SelectHSEAsDiv2Clock ; 0x3418F338
.L816:
0x341878A6: 9804 LDR R0, [SP, #16]
0x341878A8: 7980 LDRB R0, [R0, #6]
0x341878AA: 0680 LSLS R0, R0, #26
0x341878AC: 2800 CMP R0, #0
0x341878AE: D535 BPL 46L821 ; 0x3418791C
0x341878B0: 9804 LDR R0, [SP, #16]
0x341878B2: F8D0 0184 LDR.W R0, [R0, #0x0184]
0x341878B6: F641 0114 MOVW R1, #0x1814
0x341878BA: F2C0 1100 MOVT R1, #0x0100
0x341878BE: 4288 CMP R0, R1
0x341878C0: D011 BEQ 46L817 ; 0x341878E6
0x341878C2: 9804 LDR R0, [SP, #16]
0x341878C4: F8D0 0184 LDR.W R0, [R0, #0x0184]
0x341878C8: F641 0114 MOVW R1, #0x1814
0x341878CC: F2C0 1101 MOVT R1, #0x0101
0x341878D0: 4288 CMP R0, R1
0x341878D2: D008 BEQ 46L817 ; 0x341878E6
0x341878D4: 9804 LDR R0, [SP, #16]
0x341878D6: F8D0 0184 LDR.W R0, [R0, #0x0184]
0x341878DA: F641 0114 MOVW R1, #0x1814
0x341878DE: F2C8 1101 MOVT R1, #0x8101
0x341878E2: 4288 CMP R0, R1
0x341878E4: D100 BNE 46L818 ; 0x341878E8
.L817:
0x341878E6: E007 B 46L819 ; 0x341878F8
.L818:
0x341878E8: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x341878EC: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x341878F0: F640 1127 MOVW R1, #0x0927
0x341878F4: F005 FA1C BL assert_failed ; 0x3418CD30
.L819:
0x341878F8: 9804 LDR R0, [SP, #16]
0x341878FA: F8D0 0184 LDR.W R0, [R0, #0x0184]
0x341878FE: F020 4000 BIC R0, R0, #0x80000000
0x34187902: F000 F9CF BL LL_RCC_SetOTGPHYCKREFClockSource ; 0x34187CA4
0x34187906: 9804 LDR R0, [SP, #16]
0x34187908: F8D0 0184 LDR.W R0, [R0, #0x0184]
0x3418790C: 0FC0 LSRS R0, R0, #31
0x3418790E: 2801 CMP R0, #1
0x34187910: D102 BNE 46L820 ; 0x34187918
0x34187912: F007 FD07 BL LL_RCC_HSE_SelectHSEDiv2AsDiv2Clock ; 0x3418F324
0x34187916: E001 B 46L821 ; 0x3418791C
.L820:
0x34187918: F007 FD0E BL LL_RCC_HSE_SelectHSEAsDiv2Clock ; 0x3418F338
.L821:
0x3418791C: 9804 LDR R0, [SP, #16]
0x3418791E: 7900 LDRB R0, [R0, #4]
0x34187920: 0600 LSLS R0, R0, #24
0x34187922: 2800 CMP R0, #0
0x34187924: D520 BPL 46L825 ; 0x34187968
0x34187926: 9804 LDR R0, [SP, #16]
0x34187928: F8D0 018C LDR.W R0, [R0, #0x018C]
0x3418792C: B170 CBZ R0, .L822 ; 0x3418794C
0x3418792E: 9804 LDR R0, [SP, #16]
0x34187930: F8D0 018C LDR.W R0, [R0, #0x018C]
0x34187934: 2801 CMP R0, #1
0x34187936: D009 BEQ 46L822 ; 0x3418794C
0x34187938: 9804 LDR R0, [SP, #16]
0x3418793A: F8D0 018C LDR.W R0, [R0, #0x018C]
0x3418793E: 2802 CMP R0, #2
0x34187940: D004 BEQ 46L822 ; 0x3418794C
0x34187942: 9804 LDR R0, [SP, #16]
0x34187944: F8D0 018C LDR.W R0, [R0, #0x018C]
0x34187948: 2803 CMP R0, #3
0x3418794A: D100 BNE 46L823 ; 0x3418794E
.L822:
0x3418794C: E007 B 46L824 ; 0x3418795E
.L823:
0x3418794E: F642 500C MOVW R0, #0x2D0C ; 0x34192D0C = .rodata..L.str.55
0x34187952: F2C3 4019 MOVT R0, #0x3419 ; 0x34192D0C = .rodata..L.str.55
0x34187956: F640 1131 MOVW R1, #0x0931
0x3418795A: F005 F9E9 BL assert_failed ; 0x3418CD30
.L824:
0x3418795E: 9804 LDR R0, [SP, #16]
0x34187960: F8D0 018C LDR.W R0, [R0, #0x018C]
0x34187964: F007 FCF2 BL LL_RCC_SetTIMPrescaler ; 0x3418F34C
.L825:
0x34187968: F89D 0006 LDRB.W R0, [SP, #6]
0x3418796C: B918 CBNZ R0, .L826 ; 0x34187976
0x3418796E: 2000 MOVS R0, #0
0x34187970: F88D 0017 STRB.W R0, [SP, #23]
0x34187974: E002 B 46L827 ; 0x3418797C
.L826:
0x34187976: 2001 MOVS R0, #1
0x34187978: F88D 0017 STRB.W R0, [SP, #23]
.L827:
0x3418797C: F89D 0017 LDRB.W R0, [SP, #23]
0x34187980: B006 ADD SP, SP, #24
0x34187982: BD80 POP 123R7, PC}
Section .text.LL_RCC_GetRTCClockSource from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_GetRTCClockSource:
0x34187984: F248 105C MOVW R0, #0x815C
0x34187988: F2C5 6002 MOVT R0, #0x5602
0x3418798C: 6800 LDR R0, [R0]
0x3418798E: F400 7040 AND R0, R0, #0x0300
0x34187992: 4770 BX LR
Section .text.LL_RCC_LSE_IsReady.56 from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_LSE_IsReady.56:
0x34187994: F248 0004 MOVW R0, #0x8004
0x34187998: F2C5 6002 MOVT R0, #0x5602
0x3418799C: 6800 LDR R0, [R0]
0x3418799E: F3C0 0040 UBFX R0, R0, #1, #1
0x341879A2: 4770 BX LR
Section .text.LL_RCC_SetRTC_HSEPrescaler from blto2_FSBL_lto.o, size=28, align=4
LL_RCC_SetRTC_HSEPrescaler:
0x341879A4: B081 SUB SP, SP, #4
0x341879A6: 9000 STR R0, [SP, #0]
0x341879A8: F248 115C MOVW R1, #0x815C
0x341879AC: F2C5 6102 MOVT R1, #0x5602
0x341879B0: 6808 LDR R0, [R1]
0x341879B2: F420 307C BIC R0, R0, #0x03F000
0x341879B6: 9A00 LDR R2, [SP, #0]
0x341879B8: 4310 ORRS R0, R2
0x341879BA: 6008 STR R0, [R1]
0x341879BC: B001 ADD SP, SP, #4
0x341879BE: 4770 BX LR
Section .text.LL_RCC_SetRTCClockSource from blto2_FSBL_lto.o, size=28, align=4
LL_RCC_SetRTCClockSource:
0x341879C0: B081 SUB SP, SP, #4
0x341879C2: 9000 STR R0, [SP, #0]
0x341879C4: F248 115C MOVW R1, #0x815C
0x341879C8: F2C5 6102 MOVT R1, #0x5602
0x341879CC: 6808 LDR R0, [R1]
0x341879CE: F420 7040 BIC R0, R0, #0x0300
0x341879D2: 9A00 LDR R2, [SP, #0]
0x341879D4: 4310 ORRS R0, R2
0x341879D6: 6008 STR R0, [R1]
0x341879D8: B001 ADD SP, SP, #4
0x341879DA: 4770 BX LR
Section .text.LL_RCC_IC10_Enable.58 from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_IC10_Enable.58:
0x341879DC: F648 2140 MOVW R1, #0x8A40
0x341879E0: F2C5 6102 MOVT R1, #0x5602
0x341879E4: F44F 7000 MOV.W R0, #0x0200
0x341879E8: 6008 STR R0, [R1]
0x341879EA: 4770 BX LR
Section .text.LL_RCC_IC15_Enable.59 from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_IC15_Enable.59:
0x341879EC: F648 2140 MOVW R1, #0x8A40
0x341879F0: F2C5 6102 MOVT R1, #0x5602
0x341879F4: F44F 4080 MOV.W R0, #0x4000
0x341879F8: 6008 STR R0, [R1]
0x341879FA: 4770 BX LR
Section .text.LL_RCC_IC19_Enable from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_IC19_Enable:
0x341879FC: F648 2140 MOVW R1, #0x8A40
0x34187A00: F2C5 6102 MOVT R1, #0x5602
0x34187A04: F44F 2080 MOV.W R0, #0x040000
0x34187A08: 6008 STR R0, [R1]
0x34187A0A: 4770 BX LR
Section .text.LL_RCC_IC20_Enable.60 from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_IC20_Enable.60:
0x34187A0C: F648 2140 MOVW R1, #0x8A40
0x34187A10: F2C5 6102 MOVT R1, #0x5602
0x34187A14: F44F 2000 MOV.W R0, #0x080000
0x34187A18: 6008 STR R0, [R1]
0x34187A1A: 4770 BX LR
Section .text.LL_RCC_SetCLKPClockSource from blto2_FSBL_lto.o, size=28, align=4
LL_RCC_SetCLKPClockSource:
0x34187A1C: B081 SUB SP, SP, #4
0x34187A1E: 9000 STR R0, [SP, #0]
0x34187A20: F248 115C MOVW R1, #0x815C
0x34187A24: F2C5 6102 MOVT R1, #0x5602
0x34187A28: 6808 LDR R0, [R1]
0x34187A2A: F020 0007 BIC R0, R0, #7
0x34187A2E: 9A00 LDR R2, [SP, #0]
0x34187A30: 4310 ORRS R0, R2
0x34187A32: 6008 STR R0, [R1]
0x34187A34: B001 ADD SP, SP, #4
0x34187A36: 4770 BX LR
Section .text.LL_RCC_SetXSPIClockSource from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_SetXSPIClockSource:
0x34187A38: B580 PUSH 123R7, LR}
0x34187A3A: B082 SUB SP, SP, #8
0x34187A3C: 9001 STR R0, [SP, #4]
0x34187A3E: 9801 LDR R0, [SP, #4]
0x34187A40: F000 F938 BL LL_RCC_SetClockSource ; 0x34187CB4
0x34187A44: B002 ADD SP, SP, #8
0x34187A46: BD80 POP 123R7, PC}
Section .text.LL_RCC_SetFMCClockSource from blto2_FSBL_lto.o, size=28, align=4
LL_RCC_SetFMCClockSource:
0x34187A48: B081 SUB SP, SP, #4
0x34187A4A: 9000 STR R0, [SP, #0]
0x34187A4C: F248 114C MOVW R1, #0x814C
0x34187A50: F2C5 6102 MOVT R1, #0x5602
0x34187A54: 6808 LDR R0, [R1]
0x34187A56: F020 0030 BIC R0, R0, #48
0x34187A5A: 9A00 LDR R2, [SP, #0]
0x34187A5C: 4310 ORRS R0, R2
0x34187A5E: 6008 STR R0, [R1]
0x34187A60: B001 ADD SP, SP, #4
0x34187A62: 4770 BX LR
Section .text.LL_RCC_SetSDMMCClockSource from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_SetSDMMCClockSource:
0x34187A64: B580 PUSH 123R7, LR}
0x34187A66: B082 SUB SP, SP, #8
0x34187A68: 9001 STR R0, [SP, #4]
0x34187A6A: 9801 LDR R0, [SP, #4]
0x34187A6C: F000 F922 BL LL_RCC_SetClockSource ; 0x34187CB4
0x34187A70: B002 ADD SP, SP, #8
0x34187A72: BD80 POP 123R7, PC}
Section .text.LL_RCC_SetADFClockSource from blto2_FSBL_lto.o, size=28, align=4
LL_RCC_SetADFClockSource:
0x34187A74: B081 SUB SP, SP, #4
0x34187A76: 9000 STR R0, [SP, #0]
0x34187A78: F248 1144 MOVW R1, #0x8144
0x34187A7C: F2C5 6102 MOVT R1, #0x5602
0x34187A80: 6808 LDR R0, [R1]
0x34187A82: F020 0007 BIC R0, R0, #7
0x34187A86: 9A00 LDR R2, [SP, #0]
0x34187A88: 4310 ORRS R0, R2
0x34187A8A: 6008 STR R0, [R1]
0x34187A8C: B001 ADD SP, SP, #4
0x34187A8E: 4770 BX LR
Section .text.LL_RCC_IC18_Enable from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_IC18_Enable:
0x34187A90: F648 2140 MOVW R1, #0x8A40
0x34187A94: F2C5 6102 MOVT R1, #0x5602
0x34187A98: F44F 3000 MOV.W R0, #0x020000
0x34187A9C: 6008 STR R0, [R1]
0x34187A9E: 4770 BX LR
Section .text.LL_RCC_IC17_Enable from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_IC17_Enable:
0x34187AA0: F648 2140 MOVW R1, #0x8A40
0x34187AA4: F2C5 6102 MOVT R1, #0x5602
0x34187AA8: F44F 3080 MOV.W R0, #0x010000
0x34187AAC: 6008 STR R0, [R1]
0x34187AAE: 4770 BX LR
Section .text.LL_RCC_SetDCMIPPClockSource from blto2_FSBL_lto.o, size=28, align=4
LL_RCC_SetDCMIPPClockSource:
0x34187AB0: B081 SUB SP, SP, #4
0x34187AB2: 9000 STR R0, [SP, #0]
0x34187AB4: F248 1144 MOVW R1, #0x8144
0x34187AB8: F2C5 6102 MOVT R1, #0x5602
0x34187ABC: 6808 LDR R0, [R1]
0x34187ABE: F420 1040 BIC R0, R0, #0x300000
0x34187AC2: 9A00 LDR R2, [SP, #0]
0x34187AC4: 4310 ORRS R0, R2
0x34187AC6: 6008 STR R0, [R1]
0x34187AC8: B001 ADD SP, SP, #4
0x34187ACA: 4770 BX LR
Section .text.LL_RCC_IC12_Enable from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_IC12_Enable:
0x34187ACC: F648 2140 MOVW R1, #0x8A40
0x34187AD0: F2C5 6102 MOVT R1, #0x5602
0x34187AD4: F44F 6000 MOV.W R0, #0x0800
0x34187AD8: 6008 STR R0, [R1]
0x34187ADA: 4770 BX LR
Section .text.LL_RCC_SetETHClockSource from blto2_FSBL_lto.o, size=28, align=4
LL_RCC_SetETHClockSource:
0x34187ADC: B081 SUB SP, SP, #4
0x34187ADE: 9000 STR R0, [SP, #0]
0x34187AE0: F248 1148 MOVW R1, #0x8148
0x34187AE4: F2C5 6102 MOVT R1, #0x5602
0x34187AE8: 6808 LDR R0, [R1]
0x34187AEA: F420 5040 BIC R0, R0, #0x3000
0x34187AEE: 9A00 LDR R2, [SP, #0]
0x34187AF0: 4310 ORRS R0, R2
0x34187AF2: 6008 STR R0, [R1]
0x34187AF4: B001 ADD SP, SP, #4
0x34187AF6: 4770 BX LR
Section .text.LL_RCC_SetETHPHYInterface from blto2_FSBL_lto.o, size=28, align=4
LL_RCC_SetETHPHYInterface:
0x34187AF8: B081 SUB SP, SP, #4
0x34187AFA: 9000 STR R0, [SP, #0]
0x34187AFC: F248 1148 MOVW R1, #0x8148
0x34187B00: F2C5 6102 MOVT R1, #0x5602
0x34187B04: 6808 LDR R0, [R1]
0x34187B06: F420 20E0 BIC R0, R0, #0x070000
0x34187B0A: 9A00 LDR R2, [SP, #0]
0x34187B0C: 4310 ORRS R0, R2
0x34187B0E: 6008 STR R0, [R1]
0x34187B10: B001 ADD SP, SP, #4
0x34187B12: 4770 BX LR
Section .text.LL_RCC_SetETHREFRXClockSource from blto2_FSBL_lto.o, size=28, align=4
LL_RCC_SetETHREFRXClockSource:
0x34187B14: B081 SUB SP, SP, #4
0x34187B16: 9000 STR R0, [SP, #0]
0x34187B18: F248 1148 MOVW R1, #0x8148
0x34187B1C: F2C5 6102 MOVT R1, #0x5602
0x34187B20: 6808 LDR R0, [R1]
0x34187B22: F420 1080 BIC R0, R0, #0x100000
0x34187B26: 9A00 LDR R2, [SP, #0]
0x34187B28: 4310 ORRS R0, R2
0x34187B2A: 6008 STR R0, [R1]
0x34187B2C: B001 ADD SP, SP, #4
0x34187B2E: 4770 BX LR
Section .text.LL_RCC_SetETHREFTXClockSource from blto2_FSBL_lto.o, size=28, align=4
LL_RCC_SetETHREFTXClockSource:
0x34187B30: B081 SUB SP, SP, #4
0x34187B32: 9000 STR R0, [SP, #0]
0x34187B34: F248 1148 MOVW R1, #0x8148
0x34187B38: F2C5 6102 MOVT R1, #0x5602
0x34187B3C: 6808 LDR R0, [R1]
0x34187B3E: F020 7080 BIC R0, R0, #0x01000000
0x34187B42: 9A00 LDR R2, [SP, #0]
0x34187B44: 4310 ORRS R0, R2
0x34187B46: 6008 STR R0, [R1]
0x34187B48: B001 ADD SP, SP, #4
0x34187B4A: 4770 BX LR
Section .text.LL_RCC_IC13_Enable from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_IC13_Enable:
0x34187B4C: F648 2140 MOVW R1, #0x8A40
0x34187B50: F2C5 6102 MOVT R1, #0x5602
0x34187B54: F44F 5080 MOV.W R0, #0x1000
0x34187B58: 6008 STR R0, [R1]
0x34187B5A: 4770 BX LR
Section .text.LL_RCC_SetFDCANClockSource from blto2_FSBL_lto.o, size=28, align=4
LL_RCC_SetFDCANClockSource:
0x34187B5C: B081 SUB SP, SP, #4
0x34187B5E: 9000 STR R0, [SP, #0]
0x34187B60: F248 114C MOVW R1, #0x814C
0x34187B64: F2C5 6102 MOVT R1, #0x5602
0x34187B68: 6808 LDR R0, [R1]
0x34187B6A: F020 0003 BIC R0, R0, #3
0x34187B6E: 9A00 LDR R2, [SP, #0]
0x34187B70: 4310 ORRS R0, R2
0x34187B72: 6008 STR R0, [R1]
0x34187B74: B001 ADD SP, SP, #4
0x34187B76: 4770 BX LR
Section .text.LL_RCC_SetI2CClockSource from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_SetI2CClockSource:
0x34187B78: B580 PUSH 123R7, LR}
0x34187B7A: B082 SUB SP, SP, #8
0x34187B7C: 9001 STR R0, [SP, #4]
0x34187B7E: 9801 LDR R0, [SP, #4]
0x34187B80: F000 F898 BL LL_RCC_SetClockSource ; 0x34187CB4
0x34187B84: B002 ADD SP, SP, #8
0x34187B86: BD80 POP 123R7, PC}
Section .text.LL_RCC_SetI3CClockSource from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_SetI3CClockSource:
0x34187B88: B580 PUSH 123R7, LR}
0x34187B8A: B082 SUB SP, SP, #8
0x34187B8C: 9001 STR R0, [SP, #4]
0x34187B8E: 9801 LDR R0, [SP, #4]
0x34187B90: F000 F890 BL LL_RCC_SetClockSource ; 0x34187CB4
0x34187B94: B002 ADD SP, SP, #8
0x34187B96: BD80 POP 123R7, PC}
Section .text.LL_RCC_SetLPTIMClockSource from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_SetLPTIMClockSource:
0x34187B98: B580 PUSH 123R7, LR}
0x34187B9A: B082 SUB SP, SP, #8
0x34187B9C: 9001 STR R0, [SP, #4]
0x34187B9E: 9801 LDR R0, [SP, #4]
0x34187BA0: F000 F888 BL LL_RCC_SetClockSource ; 0x34187CB4
0x34187BA4: B002 ADD SP, SP, #8
0x34187BA6: BD80 POP 123R7, PC}
Section .text.LL_RCC_IC9_Enable from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_IC9_Enable:
0x34187BA8: F648 2140 MOVW R1, #0x8A40
0x34187BAC: F2C5 6102 MOVT R1, #0x5602
0x34187BB0: F44F 7080 MOV.W R0, #0x0100
0x34187BB4: 6008 STR R0, [R1]
0x34187BB6: 4770 BX LR
Section .text.LL_RCC_IC14_Enable from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_IC14_Enable:
0x34187BB8: F648 2140 MOVW R1, #0x8A40
0x34187BBC: F2C5 6102 MOVT R1, #0x5602
0x34187BC0: F44F 5000 MOV.W R0, #0x2000
0x34187BC4: 6008 STR R0, [R1]
0x34187BC6: 4770 BX LR
Section .text.LL_RCC_SetLPUARTClockSource from blto2_FSBL_lto.o, size=28, align=4
LL_RCC_SetLPUARTClockSource:
0x34187BC8: B081 SUB SP, SP, #4
0x34187BCA: 9000 STR R0, [SP, #0]
0x34187BCC: F248 1178 MOVW R1, #0x8178
0x34187BD0: F2C5 6102 MOVT R1, #0x5602
0x34187BD4: 6808 LDR R0, [R1]
0x34187BD6: F420 60E0 BIC R0, R0, #0x0700
0x34187BDA: 9A00 LDR R2, [SP, #0]
0x34187BDC: 4310 ORRS R0, R2
0x34187BDE: 6008 STR R0, [R1]
0x34187BE0: B001 ADD SP, SP, #4
0x34187BE2: 4770 BX LR
Section .text.LL_RCC_IC16_Enable from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_IC16_Enable:
0x34187BE4: F648 2140 MOVW R1, #0x8A40
0x34187BE8: F2C5 6102 MOVT R1, #0x5602
0x34187BEC: F44F 4000 MOV.W R0, #0x8000
0x34187BF0: 6008 STR R0, [R1]
0x34187BF2: 4770 BX LR
Section .text.LL_RCC_SetLTDCClockSource from blto2_FSBL_lto.o, size=28, align=4
LL_RCC_SetLTDCClockSource:
0x34187BF4: B081 SUB SP, SP, #4
0x34187BF6: 9000 STR R0, [SP, #0]
0x34187BF8: F248 1150 MOVW R1, #0x8150
0x34187BFC: F2C5 6102 MOVT R1, #0x5602
0x34187C00: 6808 LDR R0, [R1]
0x34187C02: F020 7040 BIC R0, R0, #0x03000000
0x34187C06: 9A00 LDR R2, [SP, #0]
0x34187C08: 4310 ORRS R0, R2
0x34187C0A: 6008 STR R0, [R1]
0x34187C0C: B001 ADD SP, SP, #4
0x34187C0E: 4770 BX LR
Section .text.LL_RCC_SetMDFClockSource from blto2_FSBL_lto.o, size=28, align=4
LL_RCC_SetMDFClockSource:
0x34187C10: B081 SUB SP, SP, #4
0x34187C12: 9000 STR R0, [SP, #0]
0x34187C14: F248 1154 MOVW R1, #0x8154
0x34187C18: F2C5 6102 MOVT R1, #0x5602
0x34187C1C: 6808 LDR R0, [R1]
0x34187C1E: F420 20E0 BIC R0, R0, #0x070000
0x34187C22: 9A00 LDR R2, [SP, #0]
0x34187C24: 4310 ORRS R0, R2
0x34187C26: 6008 STR R0, [R1]
0x34187C28: B001 ADD SP, SP, #4
0x34187C2A: 4770 BX LR
Section .text.LL_RCC_SetPSSIClockSource from blto2_FSBL_lto.o, size=28, align=4
LL_RCC_SetPSSIClockSource:
0x34187C2C: B081 SUB SP, SP, #4
0x34187C2E: 9000 STR R0, [SP, #0]
0x34187C30: F248 115C MOVW R1, #0x815C
0x34187C34: F2C5 6102 MOVT R1, #0x5602
0x34187C38: 6808 LDR R0, [R1]
0x34187C3A: F020 0030 BIC R0, R0, #48
0x34187C3E: 9A00 LDR R2, [SP, #0]
0x34187C40: 4310 ORRS R0, R2
0x34187C42: 6008 STR R0, [R1]
0x34187C44: B001 ADD SP, SP, #4
0x34187C46: 4770 BX LR
Section .text.LL_RCC_SetSAIClockSource from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_SetSAIClockSource:
0x34187C48: B580 PUSH 123R7, LR}
0x34187C4A: B082 SUB SP, SP, #8
0x34187C4C: 9001 STR R0, [SP, #4]
0x34187C4E: 9801 LDR R0, [SP, #4]
0x34187C50: F000 F830 BL LL_RCC_SetClockSource ; 0x34187CB4
0x34187C54: B002 ADD SP, SP, #8
0x34187C56: BD80 POP 123R7, PC}
Section .text.LL_RCC_SetSPDIFRXClockSource from blto2_FSBL_lto.o, size=28, align=4
LL_RCC_SetSPDIFRXClockSource:
0x34187C58: B081 SUB SP, SP, #4
0x34187C5A: 9000 STR R0, [SP, #0]
0x34187C5C: F248 1164 MOVW R1, #0x8164
0x34187C60: F2C5 6102 MOVT R1, #0x5602
0x34187C64: 6808 LDR R0, [R1]
0x34187C66: F020 0007 BIC R0, R0, #7
0x34187C6A: 9A00 LDR R2, [SP, #0]
0x34187C6C: 4310 ORRS R0, R2
0x34187C6E: 6008 STR R0, [R1]
0x34187C70: B001 ADD SP, SP, #4
0x34187C72: 4770 BX LR
Section .text.LL_RCC_SetSPIClockSource from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_SetSPIClockSource:
0x34187C74: B580 PUSH 123R7, LR}
0x34187C76: B082 SUB SP, SP, #8
0x34187C78: 9001 STR R0, [SP, #4]
0x34187C7A: 9801 LDR R0, [SP, #4]
0x34187C7C: F000 F81A BL LL_RCC_SetClockSource ; 0x34187CB4
0x34187C80: B002 ADD SP, SP, #8
0x34187C82: BD80 POP 123R7, PC}
Section .text.LL_RCC_SetUSARTClockSource from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_SetUSARTClockSource:
0x34187C84: B580 PUSH 123R7, LR}
0x34187C86: B082 SUB SP, SP, #8
0x34187C88: 9001 STR R0, [SP, #4]
0x34187C8A: 9801 LDR R0, [SP, #4]
0x34187C8C: F000 F812 BL LL_RCC_SetClockSource ; 0x34187CB4
0x34187C90: B002 ADD SP, SP, #8
0x34187C92: BD80 POP 123R7, PC}
Section .text.LL_RCC_SetOTGPHYClockSource from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_SetOTGPHYClockSource:
0x34187C94: B580 PUSH 123R7, LR}
0x34187C96: B082 SUB SP, SP, #8
0x34187C98: 9001 STR R0, [SP, #4]
0x34187C9A: 9801 LDR R0, [SP, #4]
0x34187C9C: F000 F80A BL LL_RCC_SetClockSource ; 0x34187CB4
0x34187CA0: B002 ADD SP, SP, #8
0x34187CA2: BD80 POP 123R7, PC}
Section .text.LL_RCC_SetOTGPHYCKREFClockSource from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_SetOTGPHYCKREFClockSource:
0x34187CA4: B580 PUSH 123R7, LR}
0x34187CA6: B082 SUB SP, SP, #8
0x34187CA8: 9001 STR R0, [SP, #4]
0x34187CAA: 9801 LDR R0, [SP, #4]
0x34187CAC: F000 F802 BL LL_RCC_SetClockSource ; 0x34187CB4
0x34187CB0: B002 ADD SP, SP, #8
0x34187CB2: BD80 POP 123R7, PC}
Section .text.LL_RCC_SetClockSource from blto2_FSBL_lto.o, size=52, align=4
LL_RCC_SetClockSource:
0x34187CB4: B082 SUB SP, SP, #8
0x34187CB6: 9001 STR R0, [SP, #4]
0x34187CB8: F89D 0004 LDRB.W R0, [SP, #4]
0x34187CBC: F248 1144 MOVW R1, #0x8144
0x34187CC0: F2C5 6102 MOVT R1, #0x5602
0x34187CC4: 4408 ADD R0, R1
0x34187CC6: 9000 STR R0, [SP, #0]
0x34187CC8: 9800 LDR R0, [SP, #0]
0x34187CCA: 6800 LDR R0, [R0]
0x34187CCC: 9901 LDR R1, [SP, #4]
0x34187CCE: 0E0B LSRS R3, R1, #24
0x34187CD0: F3C1 2204 UBFX R2, R1, #8, #5
0x34187CD4: 4093 LSLS R3, R2
0x34187CD6: 4398 BICS R0, R3
0x34187CD8: F3C1 4107 UBFX R1, R1, #16, #8
0x34187CDC: 4091 LSLS R1, R2
0x34187CDE: 4308 ORRS R0, R1
0x34187CE0: 9900 LDR R1, [SP, #0]
0x34187CE2: 6008 STR R0, [R1]
0x34187CE4: B002 ADD SP, SP, #8
0x34187CE6: 4770 BX LR
Section .text.LL_RCC_GetADCPrescaler from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_GetADCPrescaler:
0x34187CE8: F248 1044 MOVW R0, #0x8144
0x34187CEC: F2C5 6002 MOVT R0, #0x5602
0x34187CF0: 6800 LDR R0, [R0]
0x34187CF2: B280 UXTH R0, R0
0x34187CF4: 0A00 LSRS R0, R0, #8
0x34187CF6: 4770 BX LR
Section .text.LL_RCC_GetETH1PTPDivider from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_GetETH1PTPDivider:
0x34187CF8: F248 1048 MOVW R0, #0x8148
0x34187CFC: F2C5 6002 MOVT R0, #0x5602
0x34187D00: 6800 LDR R0, [R0]
0x34187D02: F000 00F0 AND R0, R0, #240
0x34187D06: 4770 BX LR
Section .text.LL_RCC_GetI2CClockSource from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_GetI2CClockSource:
0x34187D08: B580 PUSH 123R7, LR}
0x34187D0A: B082 SUB SP, SP, #8
0x34187D0C: 9001 STR R0, [SP, #4]
0x34187D0E: 9801 LDR R0, [SP, #4]
0x34187D10: F000 F84A BL LL_RCC_GetClockSource ; 0x34187DA8
0x34187D14: B002 ADD SP, SP, #8
0x34187D16: BD80 POP 123R7, PC}
Section .text.LL_RCC_GetI3CClockSource from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_GetI3CClockSource:
0x34187D18: B580 PUSH 123R7, LR}
0x34187D1A: B082 SUB SP, SP, #8
0x34187D1C: 9001 STR R0, [SP, #4]
0x34187D1E: 9801 LDR R0, [SP, #4]
0x34187D20: F000 F842 BL LL_RCC_GetClockSource ; 0x34187DA8
0x34187D24: B002 ADD SP, SP, #8
0x34187D26: BD80 POP 123R7, PC}
Section .text.LL_RCC_GetLPTIMClockSource from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_GetLPTIMClockSource:
0x34187D28: B580 PUSH 123R7, LR}
0x34187D2A: B082 SUB SP, SP, #8
0x34187D2C: 9001 STR R0, [SP, #4]
0x34187D2E: 9801 LDR R0, [SP, #4]
0x34187D30: F000 F83A BL LL_RCC_GetClockSource ; 0x34187DA8
0x34187D34: B002 ADD SP, SP, #8
0x34187D36: BD80 POP 123R7, PC}
Section .text.LL_RCC_GetSAIClockSource from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_GetSAIClockSource:
0x34187D38: B580 PUSH 123R7, LR}
0x34187D3A: B082 SUB SP, SP, #8
0x34187D3C: 9001 STR R0, [SP, #4]
0x34187D3E: 9801 LDR R0, [SP, #4]
0x34187D40: F000 F832 BL LL_RCC_GetClockSource ; 0x34187DA8
0x34187D44: B002 ADD SP, SP, #8
0x34187D46: BD80 POP 123R7, PC}
Section .text.LL_RCC_GetSDMMCClockSource from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_GetSDMMCClockSource:
0x34187D48: B580 PUSH 123R7, LR}
0x34187D4A: B082 SUB SP, SP, #8
0x34187D4C: 9001 STR R0, [SP, #4]
0x34187D4E: 9801 LDR R0, [SP, #4]
0x34187D50: F000 F82A BL LL_RCC_GetClockSource ; 0x34187DA8
0x34187D54: B002 ADD SP, SP, #8
0x34187D56: BD80 POP 123R7, PC}
Section .text.LL_RCC_GetSPIClockSource from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_GetSPIClockSource:
0x34187D58: B580 PUSH 123R7, LR}
0x34187D5A: B082 SUB SP, SP, #8
0x34187D5C: 9001 STR R0, [SP, #4]
0x34187D5E: 9801 LDR R0, [SP, #4]
0x34187D60: F000 F822 BL LL_RCC_GetClockSource ; 0x34187DA8
0x34187D64: B002 ADD SP, SP, #8
0x34187D66: BD80 POP 123R7, PC}
Section .text.LL_RCC_GetTIMPrescaler from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_GetTIMPrescaler:
0x34187D68: F248 0024 MOVW R0, #0x8024
0x34187D6C: F2C5 6002 MOVT R0, #0x5602
0x34187D70: 6800 LDR R0, [R0]
0x34187D72: F3C0 6001 UBFX R0, R0, #24, #2
0x34187D76: 4770 BX LR
Section .text.LL_RCC_GetUSARTClockSource from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_GetUSARTClockSource:
0x34187D78: B580 PUSH 123R7, LR}
0x34187D7A: B082 SUB SP, SP, #8
0x34187D7C: 9001 STR R0, [SP, #4]
0x34187D7E: 9801 LDR R0, [SP, #4]
0x34187D80: F000 F812 BL LL_RCC_GetClockSource ; 0x34187DA8
0x34187D84: B002 ADD SP, SP, #8
0x34187D86: BD80 POP 123R7, PC}
Section .text.LL_RCC_HSE_IsSelectedHSEDiv2AsDiv2Clock from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_HSE_IsSelectedHSEDiv2AsDiv2Clock:
0x34187D88: F248 0054 MOVW R0, #0x8054
0x34187D8C: F2C5 6002 MOVT R0, #0x5602
0x34187D90: 6800 LDR R0, [R0]
0x34187D92: F3C0 1080 UBFX R0, R0, #6, #1
0x34187D96: 4770 BX LR
Section .text.LL_RCC_GetXSPIClockSource from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_GetXSPIClockSource:
0x34187D98: B580 PUSH 123R7, LR}
0x34187D9A: B082 SUB SP, SP, #8
0x34187D9C: 9001 STR R0, [SP, #4]
0x34187D9E: 9801 LDR R0, [SP, #4]
0x34187DA0: F000 F802 BL LL_RCC_GetClockSource ; 0x34187DA8
0x34187DA4: B002 ADD SP, SP, #8
0x34187DA6: BD80 POP 123R7, PC}
Section .text.LL_RCC_GetClockSource from blto2_FSBL_lto.o, size=48, align=4
LL_RCC_GetClockSource:
0x34187DA8: B082 SUB SP, SP, #8
0x34187DAA: 9001 STR R0, [SP, #4]
0x34187DAC: F89D 0004 LDRB.W R0, [SP, #4]
0x34187DB0: F248 1144 MOVW R1, #0x8144
0x34187DB4: F2C5 6102 MOVT R1, #0x5602
0x34187DB8: 4408 ADD R0, R1
0x34187DBA: 9000 STR R0, [SP, #0]
0x34187DBC: 9801 LDR R0, [SP, #4]
0x34187DBE: 9900 LDR R1, [SP, #0]
0x34187DC0: 6809 LDR R1, [R1]
0x34187DC2: 9A01 LDR R2, [SP, #4]
0x34187DC4: 0E13 LSRS R3, R2, #24
0x34187DC6: F3C2 2204 UBFX R2, R2, #8, #5
0x34187DCA: 4093 LSLS R3, R2
0x34187DCC: 4019 ANDS R1, R3
0x34187DCE: 40D1 LSRS R1, R2
0x34187DD0: EA40 4001 ORR.W R0, R0, R1, LSL #16
0x34187DD4: B002 ADD SP, SP, #8
0x34187DD6: 4770 BX LR
Section .text.RCCEx_GetADFCLKFreq from blto2_FSBL_lto.o, size=388, align=4
RCCEx_GetADFCLKFreq:
0x34187DD8: B580 PUSH 123R7, LR}
0x34187DDA: B088 SUB SP, SP, #32
0x34187DDC: 9007 STR R0, [SP, #28]
0x34187DDE: 2000 MOVS R0, #0
0x34187DE0: 9006 STR R0, [SP, #24]
0x34187DE2: 9807 LDR R0, [SP, #28]
0x34187DE4: F007 FACE BL LL_RCC_GetADFClockSource ; 0x3418F384
0x34187DE8: 4601 MOV R1, R0
0x34187DEA: 9104 STR R1, [SP, #16]
0x34187DEC: 2807 CMP R0, #7
0x34187DEE: F200 80B2 BHI.W 46L13 ; 0x34187F56
0x34187DF2: 9904 LDR R1, [SP, #16]
0x34187DF4: E8DF F001 TBB 91PC, R1]
0x34187DF8: 04 DC.B 0x04 ; '\x04'
0x34187DF9: 0A DC.B 0x0A ; '\n'
0x34187DFA: 0F DC.B 0x0F ; '\x0F'
0x34187DFB: 4C DC.B 0x4C ; 'L'
0x34187DFC: 96 DC.B 0x96 ; '\x96'
0x34187DFD: 89 DC.B 0x89 ; '\x89'
0x34187DFE: 9F DC.B 0x9F ; '\x9F'
0x34187DFF: A5 DC.B 0xA5 ; '\xA5'
0x34187E00: F007 FA46 BL HAL_RCC_GetSysClockFreq ; 0x3418F290
0x34187E04: F001 FF4C BL RCCEx_GetHCLKFreq ; 0x34189CA0
0x34187E08: 9006 STR R0, [SP, #24]
0x34187E0A: E0A4 B 46L13 ; 0x34187F56
0x34187E0C: 2007 MOVS R0, #7
0x34187E0E: F000 F8A5 BL RCCEx_GetCLKPCLKFreq ; 0x34187F5C
0x34187E12: 9006 STR R0, [SP, #24]
0x34187E14: E09F B 46L13 ; 0x34187F56
0x34187E16: F002 F9DD BL LL_RCC_IC7_IsEnabled ; 0x3418A1D4
0x34187E1A: B3C0 CBZ R0, .L5 ; 0x34187E8E
0x34187E1C: F008 FEF8 BL LL_RCC_IC7_GetDivider ; 0x34190C10
0x34187E20: 9005 STR R0, [SP, #20]
0x34187E22: F002 F9DF BL LL_RCC_IC7_GetSource ; 0x3418A1E4
0x34187E26: 4601 MOV R1, R0
0x34187E28: 9103 STR R1, [SP, #12]
0x34187E2A: B160 CBZ R0, .L1 ; 0x34187E46
0x34187E2C: 9803 LDR R0, [SP, #12]
0x34187E2E: F1B0 5F80 CMP.W R0, #0x10000000
0x34187E32: D011 BEQ 46L2 ; 0x34187E58
0x34187E34: 9803 LDR R0, [SP, #12]
0x34187E36: F1B0 5F00 CMP.W R0, #0x20000000
0x34187E3A: D016 BEQ 46L3 ; 0x34187E6A
0x34187E3C: 9803 LDR R0, [SP, #12]
0x34187E3E: F1B0 5F40 CMP.W R0, #0x30000000
0x34187E42: D01B BEQ 46L4 ; 0x34187E7C
0x34187E44: E023 B 46L5 ; 0x34187E8E
.L1:
0x34187E46: F008 FD9F BL HAL_RCCEx_GetPLL1CLKFreq ; 0x34190988
0x34187E4A: 9006 STR R0, [SP, #24]
0x34187E4C: 9806 LDR R0, [SP, #24]
0x34187E4E: 9905 LDR R1, [SP, #20]
0x34187E50: FBB0 F0F1 UDIV R0, R0, R1
0x34187E54: 9006 STR R0, [SP, #24]
0x34187E56: E01A B 46L5 ; 0x34187E8E
.L2:
0x34187E58: F008 FDD8 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34190A0C
0x34187E5C: 9006 STR R0, [SP, #24]
0x34187E5E: 9806 LDR R0, [SP, #24]
0x34187E60: 9905 LDR R1, [SP, #20]
0x34187E62: FBB0 F0F1 UDIV R0, R0, R1
0x34187E66: 9006 STR R0, [SP, #24]
0x34187E68: E011 B 46L5 ; 0x34187E8E
.L3:
0x34187E6A: F008 FE11 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x34190A90
0x34187E6E: 9006 STR R0, [SP, #24]
0x34187E70: 9806 LDR R0, [SP, #24]
0x34187E72: 9905 LDR R1, [SP, #20]
0x34187E74: FBB0 F0F1 UDIV R0, R0, R1
0x34187E78: 9006 STR R0, [SP, #24]
0x34187E7A: E008 B 46L5 ; 0x34187E8E
.L4:
0x34187E7C: F008 FE4A BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34190B14
0x34187E80: 9006 STR R0, [SP, #24]
0x34187E82: 9806 LDR R0, [SP, #24]
0x34187E84: 9905 LDR R1, [SP, #20]
0x34187E86: FBB0 F0F1 UDIV R0, R0, R1
0x34187E8A: 9006 STR R0, [SP, #24]
0x34187E8C: E7FF B 46L5 ; 0x34187E8E
.L5:
0x34187E8E: E062 B 46L13 ; 0x34187F56
0x34187E90: F002 F988 BL LL_RCC_IC8_IsEnabled ; 0x3418A1A4
0x34187E94: B3C0 CBZ R0, .L10 ; 0x34187F08
0x34187E96: F008 FEAF BL LL_RCC_IC8_GetDivider ; 0x34190BF8
0x34187E9A: 9005 STR R0, [SP, #20]
0x34187E9C: F002 F98A BL LL_RCC_IC8_GetSource ; 0x3418A1B4
0x34187EA0: 4601 MOV R1, R0
0x34187EA2: 9102 STR R1, [SP, #8]
0x34187EA4: B160 CBZ R0, .L6 ; 0x34187EC0
0x34187EA6: 9802 LDR R0, [SP, #8]
0x34187EA8: F1B0 5F80 CMP.W R0, #0x10000000
0x34187EAC: D011 BEQ 46L7 ; 0x34187ED2
0x34187EAE: 9802 LDR R0, [SP, #8]
0x34187EB0: F1B0 5F00 CMP.W R0, #0x20000000
0x34187EB4: D016 BEQ 46L8 ; 0x34187EE4
0x34187EB6: 9802 LDR R0, [SP, #8]
0x34187EB8: F1B0 5F40 CMP.W R0, #0x30000000
0x34187EBC: D01B BEQ 46L9 ; 0x34187EF6
0x34187EBE: E023 B 46L10 ; 0x34187F08
.L6:
0x34187EC0: F008 FD62 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x34190988
0x34187EC4: 9006 STR R0, [SP, #24]
0x34187EC6: 9806 LDR R0, [SP, #24]
0x34187EC8: 9905 LDR R1, [SP, #20]
0x34187ECA: FBB0 F0F1 UDIV R0, R0, R1
0x34187ECE: 9006 STR R0, [SP, #24]
0x34187ED0: E01A B 46L10 ; 0x34187F08
.L7:
0x34187ED2: F008 FD9B BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34190A0C
0x34187ED6: 9006 STR R0, [SP, #24]
0x34187ED8: 9806 LDR R0, [SP, #24]
0x34187EDA: 9905 LDR R1, [SP, #20]
0x34187EDC: FBB0 F0F1 UDIV R0, R0, R1
0x34187EE0: 9006 STR R0, [SP, #24]
0x34187EE2: E011 B 46L10 ; 0x34187F08
.L8:
0x34187EE4: F008 FDD4 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x34190A90
0x34187EE8: 9006 STR R0, [SP, #24]
0x34187EEA: 9806 LDR R0, [SP, #24]
0x34187EEC: 9905 LDR R1, [SP, #20]
0x34187EEE: FBB0 F0F1 UDIV R0, R0, R1
0x34187EF2: 9006 STR R0, [SP, #24]
0x34187EF4: E008 B 46L10 ; 0x34187F08
.L9:
0x34187EF6: F008 FE0D BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34190B14
0x34187EFA: 9006 STR R0, [SP, #24]
0x34187EFC: 9806 LDR R0, [SP, #24]
0x34187EFE: 9905 LDR R1, [SP, #20]
0x34187F00: FBB0 F0F1 UDIV R0, R0, R1
0x34187F04: 9006 STR R0, [SP, #24]
0x34187F06: E7FF B 46L10 ; 0x34187F08
.L10:
0x34187F08: E025 B 46L13 ; 0x34187F56
0x34187F0A: F001 FFC9 BL LL_RCC_HSI_IsReady.74 ; 0x34189EA0
0x34187F0E: B140 CBZ R0, .L11 ; 0x34187F22
0x34187F10: F001 FFCE BL LL_RCC_HSI_GetDivider.75 ; 0x34189EB0
0x34187F14: 09C1 LSRS R1, R0, #7
0x34187F16: F249 0000 MOVW R0, #0x9000
0x34187F1A: F2C0 30D0 MOVT R0, #0x03D0
0x34187F1E: 40C8 LSRS R0, R1
0x34187F20: 9006 STR R0, [SP, #24]
.L11:
0x34187F22: E018 B 46L13 ; 0x34187F56
0x34187F24: F001 FFCC BL LL_RCC_MSI_IsReady.76 ; 0x34189EC0
0x34187F28: B120 CBZ R0, .L12 ; 0x34187F34
0x34187F2A: F640 1000 MOVW R0, #0x0900
0x34187F2E: F2C0 003D MOVT R0, #61
0x34187F32: 9006 STR R0, [SP, #24]
.L12:
0x34187F34: E00F B 46L13 ; 0x34187F56
0x34187F36: F248 0000 MOVW R0, #0x8000
0x34187F3A: F2C0 00BB MOVT R0, #187
0x34187F3E: 9006 STR R0, [SP, #24]
0x34187F40: E009 B 46L13 ; 0x34187F56
0x34187F42: F007 F9A5 BL HAL_RCC_GetSysClockFreq ; 0x3418F290
0x34187F46: 9001 STR R0, [SP, #4]
0x34187F48: F7FF FF0E BL LL_RCC_GetTIMPrescaler ; 0x34187D68
0x34187F4C: 4601 MOV R1, R0
0x34187F4E: 9801 LDR R0, [SP, #4]
0x34187F50: 40C8 LSRS R0, R1
0x34187F52: 9006 STR R0, [SP, #24]
0x34187F54: E7FF B 46L13 ; 0x34187F56
.L13:
0x34187F56: 9806 LDR R0, [SP, #24]
0x34187F58: B008 ADD SP, SP, #32
0x34187F5A: BD80 POP 123R7, PC}
Section .text.RCCEx_GetCLKPCLKFreq from blto2_FSBL_lto.o, size=736, align=4
RCCEx_GetCLKPCLKFreq:
0x34187F5C: B580 PUSH 123R7, LR}
0x34187F5E: B08A SUB SP, SP, #40
0x34187F60: 9009 STR R0, [SP, #36]
0x34187F62: 2000 MOVS R0, #0
0x34187F64: 9008 STR R0, [SP, #32]
0x34187F66: F002 F9E3 BL LL_RCC_CLKP_IsEnabled ; 0x3418A330
0x34187F6A: 2801 CMP R0, #1
0x34187F6C: F040 8163 BNE.W 46L29 ; 0x34188236
0x34187F70: 9809 LDR R0, [SP, #36]
0x34187F72: F007 FA13 BL LL_RCC_GetCLKPClockSource ; 0x3418F39C
0x34187F76: 4601 MOV R1, R0
0x34187F78: 9106 STR R1, [SP, #24]
0x34187F7A: 2807 CMP R0, #7
0x34187F7C: F200 815B BHI.W 46L29 ; 0x34188236
0x34187F80: 9906 LDR R1, [SP, #24]
0x34187F82: E8DF F011 TBH 91PC, R1, LSL #1]
0x34187F86: 08 DC.B 0x08 ; '\b'
0x34187F87: 00 DC.B 0x00 ; '\0'
0x34187F88: 15 DC.B 0x15 ; '\x15'
0x34187F89: 00 DC.B 0x00 ; '\0'
0x34187F8A: 1E DC.B 0x1E ; '\x1E'
0x34187F8B: 00 DC.B 0x00 ; '\0'
0x34187F8C: DE DC.B 0xDE ; '\xDE'
0x34187F8D: 00 DC.B 0x00 ; '\0'
0x34187F8E: 27 DC.B 0x27 ; '''
0x34187F8F: 00 DC.B 0x00 ; '\0'
0x34187F90: 64 DC.B 0x64 ; 'd'
0x34187F91: 00 DC.B 0x00 ; '\0'
0x34187F92: A1 DC.B 0xA1 ; '\xA1'
0x34187F93: 00 DC.B 0x00 ; '\0'
0x34187F94: 1B DC.B 0x1B ; '\x1B'
0x34187F95: 01 DC.B 0x01 ; '\x01'
0x34187F96: F001 FF83 BL LL_RCC_HSI_IsReady.74 ; 0x34189EA0
0x34187F9A: B140 CBZ R0, .L1 ; 0x34187FAE
0x34187F9C: F001 FF88 BL LL_RCC_HSI_GetDivider.75 ; 0x34189EB0
0x34187FA0: 09C1 LSRS R1, R0, #7
0x34187FA2: F249 0000 MOVW R0, #0x9000
0x34187FA6: F2C0 30D0 MOVT R0, #0x03D0
0x34187FAA: 40C8 LSRS R0, R1
0x34187FAC: 9008 STR R0, [SP, #32]
.L1:
0x34187FAE: E142 B 46L29 ; 0x34188236
0x34187FB0: F001 FF86 BL LL_RCC_MSI_IsReady.76 ; 0x34189EC0
0x34187FB4: B120 CBZ R0, .L2 ; 0x34187FC0
0x34187FB6: F640 1000 MOVW R0, #0x0900
0x34187FBA: F2C0 003D MOVT R0, #61
0x34187FBE: 9008 STR R0, [SP, #32]
.L2:
0x34187FC0: E139 B 46L29 ; 0x34188236
0x34187FC2: F001 FF8D BL LL_RCC_HSE_IsReady.77 ; 0x34189EE0
0x34187FC6: B120 CBZ R0, .L3 ; 0x34187FD2
0x34187FC8: F646 4000 MOVW R0, #0x6C00
0x34187FCC: F2C0 20DC MOVT R0, #0x02DC
0x34187FD0: 9008 STR R0, [SP, #32]
.L3:
0x34187FD2: E130 B 46L29 ; 0x34188236
0x34187FD4: F002 F90E BL LL_RCC_IC5_IsEnabled ; 0x3418A1F4
0x34187FD8: B3C0 CBZ R0, .L8 ; 0x3418804C
0x34187FDA: F008 FE25 BL LL_RCC_IC5_GetDivider ; 0x34190C28
0x34187FDE: 9007 STR R0, [SP, #28]
0x34187FE0: F002 F910 BL LL_RCC_IC5_GetSource ; 0x3418A204
0x34187FE4: 4601 MOV R1, R0
0x34187FE6: 9105 STR R1, [SP, #20]
0x34187FE8: B160 CBZ R0, .L4 ; 0x34188004
0x34187FEA: 9805 LDR R0, [SP, #20]
0x34187FEC: F1B0 5F80 CMP.W R0, #0x10000000
0x34187FF0: D011 BEQ 46L5 ; 0x34188016
0x34187FF2: 9805 LDR R0, [SP, #20]
0x34187FF4: F1B0 5F00 CMP.W R0, #0x20000000
0x34187FF8: D016 BEQ 46L6 ; 0x34188028
0x34187FFA: 9805 LDR R0, [SP, #20]
0x34187FFC: F1B0 5F40 CMP.W R0, #0x30000000
0x34188000: D01B BEQ 46L7 ; 0x3418803A
0x34188002: E023 B 46L8 ; 0x3418804C
.L4:
0x34188004: F008 FCC0 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x34190988
0x34188008: 9008 STR R0, [SP, #32]
0x3418800A: 9808 LDR R0, [SP, #32]
0x3418800C: 9907 LDR R1, [SP, #28]
0x3418800E: FBB0 F0F1 UDIV R0, R0, R1
0x34188012: 9008 STR R0, [SP, #32]
0x34188014: E01A B 46L8 ; 0x3418804C
.L5:
0x34188016: F008 FCF9 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34190A0C
0x3418801A: 9008 STR R0, [SP, #32]
0x3418801C: 9808 LDR R0, [SP, #32]
0x3418801E: 9907 LDR R1, [SP, #28]
0x34188020: FBB0 F0F1 UDIV R0, R0, R1
0x34188024: 9008 STR R0, [SP, #32]
0x34188026: E011 B 46L8 ; 0x3418804C
.L6:
0x34188028: F008 FD32 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x34190A90
0x3418802C: 9008 STR R0, [SP, #32]
0x3418802E: 9808 LDR R0, [SP, #32]
0x34188030: 9907 LDR R1, [SP, #28]
0x34188032: FBB0 F0F1 UDIV R0, R0, R1
0x34188036: 9008 STR R0, [SP, #32]
0x34188038: E008 B 46L8 ; 0x3418804C
.L7:
0x3418803A: F008 FD6B BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34190B14
0x3418803E: 9008 STR R0, [SP, #32]
0x34188040: 9808 LDR R0, [SP, #32]
0x34188042: 9907 LDR R1, [SP, #28]
0x34188044: FBB0 F0F1 UDIV R0, R0, R1
0x34188048: 9008 STR R0, [SP, #32]
0x3418804A: E7FF B 46L8 ; 0x3418804C
.L8:
0x3418804C: E0F3 B 46L29 ; 0x34188236
0x3418804E: F002 F91F BL LL_RCC_IC10_IsEnabled ; 0x3418A290
0x34188052: B3C0 CBZ R0, .L13 ; 0x341880C6
0x34188054: F008 FE0C BL LL_RCC_IC10_GetDivider ; 0x34190C70
0x34188058: 9007 STR R0, [SP, #28]
0x3418805A: F002 F921 BL LL_RCC_IC10_GetSource ; 0x3418A2A0
0x3418805E: 4601 MOV R1, R0
0x34188060: 9104 STR R1, [SP, #16]
0x34188062: B160 CBZ R0, .L9 ; 0x3418807E
0x34188064: 9804 LDR R0, [SP, #16]
0x34188066: F1B0 5F80 CMP.W R0, #0x10000000
0x3418806A: D011 BEQ 46L10 ; 0x34188090
0x3418806C: 9804 LDR R0, [SP, #16]
0x3418806E: F1B0 5F00 CMP.W R0, #0x20000000
0x34188072: D016 BEQ 46L11 ; 0x341880A2
0x34188074: 9804 LDR R0, [SP, #16]
0x34188076: F1B0 5F40 CMP.W R0, #0x30000000
0x3418807A: D01B BEQ 46L12 ; 0x341880B4
0x3418807C: E023 B 46L13 ; 0x341880C6
.L9:
0x3418807E: F008 FC83 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x34190988
0x34188082: 9008 STR R0, [SP, #32]
0x34188084: 9808 LDR R0, [SP, #32]
0x34188086: 9907 LDR R1, [SP, #28]
0x34188088: FBB0 F0F1 UDIV R0, R0, R1
0x3418808C: 9008 STR R0, [SP, #32]
0x3418808E: E01A B 46L13 ; 0x341880C6
.L10:
0x34188090: F008 FCBC BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34190A0C
0x34188094: 9008 STR R0, [SP, #32]
0x34188096: 9808 LDR R0, [SP, #32]
0x34188098: 9907 LDR R1, [SP, #28]
0x3418809A: FBB0 F0F1 UDIV R0, R0, R1
0x3418809E: 9008 STR R0, [SP, #32]
0x341880A0: E011 B 46L13 ; 0x341880C6
.L11:
0x341880A2: F008 FCF5 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x34190A90
0x341880A6: 9008 STR R0, [SP, #32]
0x341880A8: 9808 LDR R0, [SP, #32]
0x341880AA: 9907 LDR R1, [SP, #28]
0x341880AC: FBB0 F0F1 UDIV R0, R0, R1
0x341880B0: 9008 STR R0, [SP, #32]
0x341880B2: E008 B 46L13 ; 0x341880C6
.L12:
0x341880B4: F008 FD2E BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34190B14
0x341880B8: 9008 STR R0, [SP, #32]
0x341880BA: 9808 LDR R0, [SP, #32]
0x341880BC: 9907 LDR R1, [SP, #28]
0x341880BE: FBB0 F0F1 UDIV R0, R0, R1
0x341880C2: 9008 STR R0, [SP, #32]
0x341880C4: E7FF B 46L13 ; 0x341880C6
.L13:
0x341880C6: E0B6 B 46L29 ; 0x34188236
0x341880C8: F001 FFFA BL LL_RCC_IC15_IsEnabled ; 0x3418A0C0
0x341880CC: B3C0 CBZ R0, .L18 ; 0x34188140
0x341880CE: F008 FD6F BL LL_RCC_IC15_GetDivider ; 0x34190BB0
0x341880D2: 9007 STR R0, [SP, #28]
0x341880D4: F001 FFFC BL LL_RCC_IC15_GetSource ; 0x3418A0D0
0x341880D8: 4601 MOV R1, R0
0x341880DA: 9103 STR R1, [SP, #12]
0x341880DC: B160 CBZ R0, .L14 ; 0x341880F8
0x341880DE: 9803 LDR R0, [SP, #12]
0x341880E0: F1B0 5F80 CMP.W R0, #0x10000000
0x341880E4: D011 BEQ 46L15 ; 0x3418810A
0x341880E6: 9803 LDR R0, [SP, #12]
0x341880E8: F1B0 5F00 CMP.W R0, #0x20000000
0x341880EC: D016 BEQ 46L16 ; 0x3418811C
0x341880EE: 9803 LDR R0, [SP, #12]
0x341880F0: F1B0 5F40 CMP.W R0, #0x30000000
0x341880F4: D01B BEQ 46L17 ; 0x3418812E
0x341880F6: E023 B 46L18 ; 0x34188140
.L14:
0x341880F8: F008 FC46 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x34190988
0x341880FC: 9008 STR R0, [SP, #32]
0x341880FE: 9808 LDR R0, [SP, #32]
0x34188100: 9907 LDR R1, [SP, #28]
0x34188102: FBB0 F0F1 UDIV R0, R0, R1
0x34188106: 9008 STR R0, [SP, #32]
0x34188108: E01A B 46L18 ; 0x34188140
.L15:
0x3418810A: F008 FC7F BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34190A0C
0x3418810E: 9008 STR R0, [SP, #32]
0x34188110: 9808 LDR R0, [SP, #32]
0x34188112: 9907 LDR R1, [SP, #28]
0x34188114: FBB0 F0F1 UDIV R0, R0, R1
0x34188118: 9008 STR R0, [SP, #32]
0x3418811A: E011 B 46L18 ; 0x34188140
.L16:
0x3418811C: F008 FCB8 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x34190A90
0x34188120: 9008 STR R0, [SP, #32]
0x34188122: 9808 LDR R0, [SP, #32]
0x34188124: 9907 LDR R1, [SP, #28]
0x34188126: FBB0 F0F1 UDIV R0, R0, R1
0x3418812A: 9008 STR R0, [SP, #32]
0x3418812C: E008 B 46L18 ; 0x34188140
.L17:
0x3418812E: F008 FCF1 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34190B14
0x34188132: 9008 STR R0, [SP, #32]
0x34188134: 9808 LDR R0, [SP, #32]
0x34188136: 9907 LDR R1, [SP, #28]
0x34188138: FBB0 F0F1 UDIV R0, R0, R1
0x3418813C: 9008 STR R0, [SP, #32]
0x3418813E: E7FF B 46L18 ; 0x34188140
.L18:
0x34188140: E079 B 46L29 ; 0x34188236
0x34188142: F002 F8B5 BL LL_RCC_IC19_IsEnabled ; 0x3418A2B0
0x34188146: B3C0 CBZ R0, .L23 ; 0x341881BA
0x34188148: F008 FD9E BL LL_RCC_IC19_GetDivider ; 0x34190C88
0x3418814C: 9007 STR R0, [SP, #28]
0x3418814E: F002 F8B7 BL LL_RCC_IC19_GetSource ; 0x3418A2C0
0x34188152: 4601 MOV R1, R0
0x34188154: 9102 STR R1, [SP, #8]
0x34188156: B160 CBZ R0, .L19 ; 0x34188172
0x34188158: 9802 LDR R0, [SP, #8]
0x3418815A: F1B0 5F80 CMP.W R0, #0x10000000
0x3418815E: D011 BEQ 46L20 ; 0x34188184
0x34188160: 9802 LDR R0, [SP, #8]
0x34188162: F1B0 5F00 CMP.W R0, #0x20000000
0x34188166: D016 BEQ 46L21 ; 0x34188196
0x34188168: 9802 LDR R0, [SP, #8]
0x3418816A: F1B0 5F40 CMP.W R0, #0x30000000
0x3418816E: D01B BEQ 46L22 ; 0x341881A8
0x34188170: E023 B 46L23 ; 0x341881BA
.L19:
0x34188172: F008 FC09 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x34190988
0x34188176: 9008 STR R0, [SP, #32]
0x34188178: 9808 LDR R0, [SP, #32]
0x3418817A: 9907 LDR R1, [SP, #28]
0x3418817C: FBB0 F0F1 UDIV R0, R0, R1
0x34188180: 9008 STR R0, [SP, #32]
0x34188182: E01A B 46L23 ; 0x341881BA
.L20:
0x34188184: F008 FC42 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34190A0C
0x34188188: 9008 STR R0, [SP, #32]
0x3418818A: 9808 LDR R0, [SP, #32]
0x3418818C: 9907 LDR R1, [SP, #28]
0x3418818E: FBB0 F0F1 UDIV R0, R0, R1
0x34188192: 9008 STR R0, [SP, #32]
0x34188194: E011 B 46L23 ; 0x341881BA
.L21:
0x34188196: F008 FC7B BL HAL_RCCEx_GetPLL3CLKFreq ; 0x34190A90
0x3418819A: 9008 STR R0, [SP, #32]
0x3418819C: 9808 LDR R0, [SP, #32]
0x3418819E: 9907 LDR R1, [SP, #28]
0x341881A0: FBB0 F0F1 UDIV R0, R0, R1
0x341881A4: 9008 STR R0, [SP, #32]
0x341881A6: E008 B 46L23 ; 0x341881BA
.L22:
0x341881A8: F008 FCB4 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34190B14
0x341881AC: 9008 STR R0, [SP, #32]
0x341881AE: 9808 LDR R0, [SP, #32]
0x341881B0: 9907 LDR R1, [SP, #28]
0x341881B2: FBB0 F0F1 UDIV R0, R0, R1
0x341881B6: 9008 STR R0, [SP, #32]
0x341881B8: E7FF B 46L23 ; 0x341881BA
.L23:
0x341881BA: E03C B 46L29 ; 0x34188236
0x341881BC: F002 F832 BL LL_RCC_IC20_IsEnabled ; 0x3418A224
0x341881C0: B3C0 CBZ R0, .L28 ; 0x34188234
0x341881C2: F008 FD3D BL LL_RCC_IC20_GetDivider ; 0x34190C40
0x341881C6: 9007 STR R0, [SP, #28]
0x341881C8: F002 F834 BL LL_RCC_IC20_GetSource ; 0x3418A234
0x341881CC: 4601 MOV R1, R0
0x341881CE: 9101 STR R1, [SP, #4]
0x341881D0: B160 CBZ R0, .L24 ; 0x341881EC
0x341881D2: 9801 LDR R0, [SP, #4]
0x341881D4: F1B0 5F80 CMP.W R0, #0x10000000
0x341881D8: D011 BEQ 46L25 ; 0x341881FE
0x341881DA: 9801 LDR R0, [SP, #4]
0x341881DC: F1B0 5F00 CMP.W R0, #0x20000000
0x341881E0: D016 BEQ 46L26 ; 0x34188210
0x341881E2: 9801 LDR R0, [SP, #4]
0x341881E4: F1B0 5F40 CMP.W R0, #0x30000000
0x341881E8: D01B BEQ 46L27 ; 0x34188222
0x341881EA: E023 B 46L28 ; 0x34188234
.L24:
0x341881EC: F008 FBCC BL HAL_RCCEx_GetPLL1CLKFreq ; 0x34190988
0x341881F0: 9008 STR R0, [SP, #32]
0x341881F2: 9808 LDR R0, [SP, #32]
0x341881F4: 9907 LDR R1, [SP, #28]
0x341881F6: FBB0 F0F1 UDIV R0, R0, R1
0x341881FA: 9008 STR R0, [SP, #32]
0x341881FC: E01A B 46L28 ; 0x34188234
.L25:
0x341881FE: F008 FC05 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34190A0C
0x34188202: 9008 STR R0, [SP, #32]
0x34188204: 9808 LDR R0, [SP, #32]
0x34188206: 9907 LDR R1, [SP, #28]
0x34188208: FBB0 F0F1 UDIV R0, R0, R1
0x3418820C: 9008 STR R0, [SP, #32]
0x3418820E: E011 B 46L28 ; 0x34188234
.L26:
0x34188210: F008 FC3E BL HAL_RCCEx_GetPLL3CLKFreq ; 0x34190A90
0x34188214: 9008 STR R0, [SP, #32]
0x34188216: 9808 LDR R0, [SP, #32]
0x34188218: 9907 LDR R1, [SP, #28]
0x3418821A: FBB0 F0F1 UDIV R0, R0, R1
0x3418821E: 9008 STR R0, [SP, #32]
0x34188220: E008 B 46L28 ; 0x34188234
.L27:
0x34188222: F008 FC77 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34190B14
0x34188226: 9008 STR R0, [SP, #32]
0x34188228: 9808 LDR R0, [SP, #32]
0x3418822A: 9907 LDR R1, [SP, #28]
0x3418822C: FBB0 F0F1 UDIV R0, R0, R1
0x34188230: 9008 STR R0, [SP, #32]
0x34188232: E7FF B 46L28 ; 0x34188234
.L28:
0x34188234: E7FF B 46L29 ; 0x34188236
.L29:
0x34188236: 9808 LDR R0, [SP, #32]
0x34188238: B00A ADD SP, SP, #40
0x3418823A: BD80 POP 123R7, PC}
Section .text.RCCEx_GetDCMIPPCLKFreq from blto2_FSBL_lto.o, size=228, align=4
RCCEx_GetDCMIPPCLKFreq:
0x3418823C: B580 PUSH 123R7, LR}
0x3418823E: B086 SUB SP, SP, #24
0x34188240: 9005 STR R0, [SP, #20]
0x34188242: 2000 MOVS R0, #0
0x34188244: 9004 STR R0, [SP, #16]
0x34188246: 9805 LDR R0, [SP, #20]
0x34188248: F007 F8B4 BL LL_RCC_GetDCMIPPClockSource ; 0x3418F3B4
0x3418824C: 4601 MOV R1, R0
0x3418824E: 9102 STR R1, [SP, #8]
0x34188250: B160 CBZ R0, .L1 ; 0x3418826C
0x34188252: 9802 LDR R0, [SP, #8]
0x34188254: F5B0 1F80 CMP.W R0, #0x100000
0x34188258: D010 BEQ 46L2 ; 0x3418827C
0x3418825A: 9802 LDR R0, [SP, #8]
0x3418825C: F5B0 1F00 CMP.W R0, #0x200000
0x34188260: D011 BEQ 46L3 ; 0x34188286
0x34188262: 9802 LDR R0, [SP, #8]
0x34188264: F5B0 1F40 CMP.W R0, #0x300000
0x34188268: D04A BEQ 46L9 ; 0x34188300
0x3418826A: E056 B 46L11 ; 0x3418831A
.L1:
0x3418826C: F007 F810 BL HAL_RCC_GetSysClockFreq ; 0x3418F290
0x34188270: F001 FD16 BL RCCEx_GetHCLKFreq ; 0x34189CA0
0x34188274: F001 FFE6 BL RCCEx_GetPCLK5Freq ; 0x3418A244
0x34188278: 9004 STR R0, [SP, #16]
0x3418827A: E04E B 46L11 ; 0x3418831A
.L2:
0x3418827C: 2007 MOVS R0, #7
0x3418827E: F7FF FE6D BL RCCEx_GetCLKPCLKFreq ; 0x34187F5C
0x34188282: 9004 STR R0, [SP, #16]
0x34188284: E049 B 46L11 ; 0x3418831A
.L3:
0x34188286: F002 F843 BL LL_RCC_IC17_IsEnabled ; 0x3418A310
0x3418828A: B3C0 CBZ R0, .L8 ; 0x341882FE
0x3418828C: F008 FD20 BL LL_RCC_IC17_GetDivider ; 0x34190CD0
0x34188290: 9003 STR R0, [SP, #12]
0x34188292: F002 F845 BL LL_RCC_IC17_GetSource ; 0x3418A320
0x34188296: 4601 MOV R1, R0
0x34188298: 9101 STR R1, [SP, #4]
0x3418829A: B160 CBZ R0, .L4 ; 0x341882B6
0x3418829C: 9801 LDR R0, [SP, #4]
0x3418829E: F1B0 5F80 CMP.W R0, #0x10000000
0x341882A2: D011 BEQ 46L5 ; 0x341882C8
0x341882A4: 9801 LDR R0, [SP, #4]
0x341882A6: F1B0 5F00 CMP.W R0, #0x20000000
0x341882AA: D016 BEQ 46L6 ; 0x341882DA
0x341882AC: 9801 LDR R0, [SP, #4]
0x341882AE: F1B0 5F40 CMP.W R0, #0x30000000
0x341882B2: D01B BEQ 46L7 ; 0x341882EC
0x341882B4: E023 B 46L8 ; 0x341882FE
.L4:
0x341882B6: F008 FB67 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x34190988
0x341882BA: 9004 STR R0, [SP, #16]
0x341882BC: 9804 LDR R0, [SP, #16]
0x341882BE: 9903 LDR R1, [SP, #12]
0x341882C0: FBB0 F0F1 UDIV R0, R0, R1
0x341882C4: 9004 STR R0, [SP, #16]
0x341882C6: E01A B 46L8 ; 0x341882FE
.L5:
0x341882C8: F008 FBA0 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34190A0C
0x341882CC: 9004 STR R0, [SP, #16]
0x341882CE: 9804 LDR R0, [SP, #16]
0x341882D0: 9903 LDR R1, [SP, #12]
0x341882D2: FBB0 F0F1 UDIV R0, R0, R1
0x341882D6: 9004 STR R0, [SP, #16]
0x341882D8: E011 B 46L8 ; 0x341882FE
.L6:
0x341882DA: F008 FBD9 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x34190A90
0x341882DE: 9004 STR R0, [SP, #16]
0x341882E0: 9804 LDR R0, [SP, #16]
0x341882E2: 9903 LDR R1, [SP, #12]
0x341882E4: FBB0 F0F1 UDIV R0, R0, R1
0x341882E8: 9004 STR R0, [SP, #16]
0x341882EA: E008 B 46L8 ; 0x341882FE
.L7:
0x341882EC: F008 FC12 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34190B14
0x341882F0: 9004 STR R0, [SP, #16]
0x341882F2: 9804 LDR R0, [SP, #16]
0x341882F4: 9903 LDR R1, [SP, #12]
0x341882F6: FBB0 F0F1 UDIV R0, R0, R1
0x341882FA: 9004 STR R0, [SP, #16]
0x341882FC: E7FF B 46L8 ; 0x341882FE
.L8:
0x341882FE: E00C B 46L11 ; 0x3418831A
.L9:
0x34188300: F001 FDCE BL LL_RCC_HSI_IsReady.74 ; 0x34189EA0
0x34188304: B140 CBZ R0, .L10 ; 0x34188318
0x34188306: F001 FDD3 BL LL_RCC_HSI_GetDivider.75 ; 0x34189EB0
0x3418830A: 09C1 LSRS R1, R0, #7
0x3418830C: F249 0000 MOVW R0, #0x9000
0x34188310: F2C0 30D0 MOVT R0, #0x03D0
0x34188314: 40C8 LSRS R0, R1
0x34188316: 9004 STR R0, [SP, #16]
.L10:
0x34188318: E7FF B 46L11 ; 0x3418831A
.L11:
0x3418831A: 9804 LDR R0, [SP, #16]
0x3418831C: B006 ADD SP, SP, #24
0x3418831E: BD80 POP 123R7, PC}
Section .text.RCCEx_GetETH1CLKFreq from blto2_FSBL_lto.o, size=216, align=4
RCCEx_GetETH1CLKFreq:
0x34188320: B580 PUSH 123R7, LR}
0x34188322: B086 SUB SP, SP, #24
0x34188324: 9005 STR R0, [SP, #20]
0x34188326: 2000 MOVS R0, #0
0x34188328: 9004 STR R0, [SP, #16]
0x3418832A: 9805 LDR R0, [SP, #20]
0x3418832C: F007 F84E BL LL_RCC_GetETHClockSource ; 0x3418F3CC
0x34188330: 4601 MOV R1, R0
0x34188332: 9102 STR R1, [SP, #8]
0x34188334: B160 CBZ R0, .L1 ; 0x34188350
0x34188336: 9802 LDR R0, [SP, #8]
0x34188338: F5B0 5F80 CMP.W R0, #0x1000
0x3418833C: D00E BEQ 46L2 ; 0x3418835C
0x3418833E: 9802 LDR R0, [SP, #8]
0x34188340: F5B0 5F00 CMP.W R0, #0x2000
0x34188344: D00F BEQ 46L3 ; 0x34188366
0x34188346: 9802 LDR R0, [SP, #8]
0x34188348: F5B0 5F40 CMP.W R0, #0x3000
0x3418834C: D048 BEQ 46L9 ; 0x341883E0
0x3418834E: E050 B 46L11 ; 0x341883F2
.L1:
0x34188350: F006 FF9E BL HAL_RCC_GetSysClockFreq ; 0x3418F290
0x34188354: F001 FCA4 BL RCCEx_GetHCLKFreq ; 0x34189CA0
0x34188358: 9004 STR R0, [SP, #16]
0x3418835A: E04A B 46L11 ; 0x341883F2
.L2:
0x3418835C: 2007 MOVS R0, #7
0x3418835E: F7FF FDFD BL RCCEx_GetCLKPCLKFreq ; 0x34187F5C
0x34188362: 9004 STR R0, [SP, #16]
0x34188364: E045 B 46L11 ; 0x341883F2
.L3:
0x34188366: F001 FFC3 BL LL_RCC_IC12_IsEnabled ; 0x3418A2F0
0x3418836A: B3C0 CBZ R0, .L8 ; 0x341883DE
0x3418836C: F008 FCA4 BL LL_RCC_IC12_GetDivider ; 0x34190CB8
0x34188370: 9003 STR R0, [SP, #12]
0x34188372: F001 FFC5 BL LL_RCC_IC12_GetSource ; 0x3418A300
0x34188376: 4601 MOV R1, R0
0x34188378: 9101 STR R1, [SP, #4]
0x3418837A: B160 CBZ R0, .L4 ; 0x34188396
0x3418837C: 9801 LDR R0, [SP, #4]
0x3418837E: F1B0 5F80 CMP.W R0, #0x10000000
0x34188382: D011 BEQ 46L5 ; 0x341883A8
0x34188384: 9801 LDR R0, [SP, #4]
0x34188386: F1B0 5F00 CMP.W R0, #0x20000000
0x3418838A: D016 BEQ 46L6 ; 0x341883BA
0x3418838C: 9801 LDR R0, [SP, #4]
0x3418838E: F1B0 5F40 CMP.W R0, #0x30000000
0x34188392: D01B BEQ 46L7 ; 0x341883CC
0x34188394: E023 B 46L8 ; 0x341883DE
.L4:
0x34188396: F008 FAF7 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x34190988
0x3418839A: 9004 STR R0, [SP, #16]
0x3418839C: 9804 LDR R0, [SP, #16]
0x3418839E: 9903 LDR R1, [SP, #12]
0x341883A0: FBB0 F0F1 UDIV R0, R0, R1
0x341883A4: 9004 STR R0, [SP, #16]
0x341883A6: E01A B 46L8 ; 0x341883DE
.L5:
0x341883A8: F008 FB30 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34190A0C
0x341883AC: 9004 STR R0, [SP, #16]
0x341883AE: 9804 LDR R0, [SP, #16]
0x341883B0: 9903 LDR R1, [SP, #12]
0x341883B2: FBB0 F0F1 UDIV R0, R0, R1
0x341883B6: 9004 STR R0, [SP, #16]
0x341883B8: E011 B 46L8 ; 0x341883DE
.L6:
0x341883BA: F008 FB69 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x34190A90
0x341883BE: 9004 STR R0, [SP, #16]
0x341883C0: 9804 LDR R0, [SP, #16]
0x341883C2: 9903 LDR R1, [SP, #12]
0x341883C4: FBB0 F0F1 UDIV R0, R0, R1
0x341883C8: 9004 STR R0, [SP, #16]
0x341883CA: E008 B 46L8 ; 0x341883DE
.L7:
0x341883CC: F008 FBA2 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34190B14
0x341883D0: 9004 STR R0, [SP, #16]
0x341883D2: 9804 LDR R0, [SP, #16]
0x341883D4: 9903 LDR R1, [SP, #12]
0x341883D6: FBB0 F0F1 UDIV R0, R0, R1
0x341883DA: 9004 STR R0, [SP, #16]
0x341883DC: E7FF B 46L8 ; 0x341883DE
.L8:
0x341883DE: E008 B 46L11 ; 0x341883F2
.L9:
0x341883E0: F001 FD7E BL LL_RCC_HSE_IsReady.77 ; 0x34189EE0
0x341883E4: B120 CBZ R0, .L10 ; 0x341883F0
0x341883E6: F646 4000 MOVW R0, #0x6C00
0x341883EA: F2C0 20DC MOVT R0, #0x02DC
0x341883EE: 9004 STR R0, [SP, #16]
.L10:
0x341883F0: E7FF B 46L11 ; 0x341883F2
.L11:
0x341883F2: 9804 LDR R0, [SP, #16]
0x341883F4: B006 ADD SP, SP, #24
0x341883F6: BD80 POP 123R7, PC}
Section .text.RCCEx_GetI3CCLKFreq from blto2_FSBL_lto.o, size=516, align=4
RCCEx_GetI3CCLKFreq:
0x341883F8: B580 PUSH 123R7, LR}
0x341883FA: B086 SUB SP, SP, #24
0x341883FC: 9005 STR R0, [SP, #20]
0x341883FE: 2000 MOVS R0, #0
0x34188400: 9004 STR R0, [SP, #16]
0x34188402: 9805 LDR R0, [SP, #20]
0x34188404: F7FF FC88 BL LL_RCC_GetI3CClockSource ; 0x34187D18
0x34188408: 4601 MOV R1, R0
0x3418840A: 9102 STR R1, [SP, #8]
0x3418840C: F241 010C MOVW R1, #0x100C
0x34188410: F2C0 7100 MOVT R1, #0x0700
0x34188414: 4288 CMP R0, R1
0x34188416: D051 BEQ 46L1 ; 0x341884BC
0x34188418: 9802 LDR R0, [SP, #8]
0x3418841A: F241 410C MOVW R1, #0x140C
0x3418841E: F2C0 7100 MOVT R1, #0x0700
0x34188422: 4288 CMP R0, R1
0x34188424: D04A BEQ 46L1 ; 0x341884BC
0x34188426: 9802 LDR R0, [SP, #8]
0x34188428: F241 010C MOVW R1, #0x100C
0x3418842C: F2C0 7101 MOVT R1, #0x0701
0x34188430: 4288 CMP R0, R1
0x34188432: D04B BEQ 46L2 ; 0x341884CC
0x34188434: 9802 LDR R0, [SP, #8]
0x34188436: F241 410C MOVW R1, #0x140C
0x3418843A: F2C0 7101 MOVT R1, #0x0701
0x3418843E: 4288 CMP R0, R1
0x34188440: D044 BEQ 46L2 ; 0x341884CC
0x34188442: 9802 LDR R0, [SP, #8]
0x34188444: F241 010C MOVW R1, #0x100C
0x34188448: F2C0 7102 MOVT R1, #0x0702
0x3418844C: 4288 CMP R0, R1
0x3418844E: D042 BEQ 46L3 ; 0x341884D6
0x34188450: 9802 LDR R0, [SP, #8]
0x34188452: F241 410C MOVW R1, #0x140C
0x34188456: F2C0 7102 MOVT R1, #0x0702
0x3418845A: 4288 CMP R0, R1
0x3418845C: D03B BEQ 46L3 ; 0x341884D6
0x3418845E: 9802 LDR R0, [SP, #8]
0x34188460: F241 010C MOVW R1, #0x100C
0x34188464: F2C0 7103 MOVT R1, #0x0703
0x34188468: 4288 CMP R0, R1
0x3418846A: D071 BEQ 46L9 ; 0x34188550
0x3418846C: 9802 LDR R0, [SP, #8]
0x3418846E: F241 410C MOVW R1, #0x140C
0x34188472: F2C0 7103 MOVT R1, #0x0703
0x34188476: 4288 CMP R0, R1
0x34188478: D06A BEQ 46L9 ; 0x34188550
0x3418847A: 9802 LDR R0, [SP, #8]
0x3418847C: F241 010C MOVW R1, #0x100C
0x34188480: F2C0 7104 MOVT R1, #0x0704
0x34188484: 4288 CMP R0, R1
0x34188486: F000 80AD BEQ.W 46L17 ; 0x341885E4
0x3418848A: 9802 LDR R0, [SP, #8]
0x3418848C: F241 410C MOVW R1, #0x140C
0x34188490: F2C0 7104 MOVT R1, #0x0704
0x34188494: 4288 CMP R0, R1
0x34188496: F000 80A5 BEQ.W 46L17 ; 0x341885E4
0x3418849A: 9802 LDR R0, [SP, #8]
0x3418849C: F241 010C MOVW R1, #0x100C
0x341884A0: F2C0 7105 MOVT R1, #0x0705
0x341884A4: 4288 CMP R0, R1
0x341884A6: F000 8090 BEQ.W 46L15 ; 0x341885CA
0x341884AA: 9802 LDR R0, [SP, #8]
0x341884AC: F241 410C MOVW R1, #0x140C
0x341884B0: F2C0 7105 MOVT R1, #0x0705
0x341884B4: 4288 CMP R0, R1
0x341884B6: F000 8088 BEQ.W 46L15 ; 0x341885CA
0x341884BA: E09C B 46L19 ; 0x341885F6
.L1:
0x341884BC: F006 FEE8 BL HAL_RCC_GetSysClockFreq ; 0x3418F290
0x341884C0: F001 FBEE BL RCCEx_GetHCLKFreq ; 0x34189CA0
0x341884C4: F001 FE14 BL RCCEx_GetPCLK1Freq ; 0x3418A0F0
0x341884C8: 9004 STR R0, [SP, #16]
0x341884CA: E094 B 46L19 ; 0x341885F6
.L2:
0x341884CC: 2007 MOVS R0, #7
0x341884CE: F7FF FD45 BL RCCEx_GetCLKPCLKFreq ; 0x34187F5C
0x341884D2: 9004 STR R0, [SP, #16]
0x341884D4: E08F B 46L19 ; 0x341885F6
.L3:
0x341884D6: F001 FEDB BL LL_RCC_IC10_IsEnabled ; 0x3418A290
0x341884DA: B3C0 CBZ R0, .L8 ; 0x3418854E
0x341884DC: F008 FBC8 BL LL_RCC_IC10_GetDivider ; 0x34190C70
0x341884E0: 9003 STR R0, [SP, #12]
0x341884E2: F001 FEDD BL LL_RCC_IC10_GetSource ; 0x3418A2A0
0x341884E6: 4601 MOV R1, R0
0x341884E8: 9101 STR R1, [SP, #4]
0x341884EA: B160 CBZ R0, .L4 ; 0x34188506
0x341884EC: 9801 LDR R0, [SP, #4]
0x341884EE: F1B0 5F80 CMP.W R0, #0x10000000
0x341884F2: D011 BEQ 46L5 ; 0x34188518
0x341884F4: 9801 LDR R0, [SP, #4]
0x341884F6: F1B0 5F00 CMP.W R0, #0x20000000
0x341884FA: D016 BEQ 46L6 ; 0x3418852A
0x341884FC: 9801 LDR R0, [SP, #4]
0x341884FE: F1B0 5F40 CMP.W R0, #0x30000000
0x34188502: D01B BEQ 46L7 ; 0x3418853C
0x34188504: E023 B 46L8 ; 0x3418854E
.L4:
0x34188506: F008 FA3F BL HAL_RCCEx_GetPLL1CLKFreq ; 0x34190988
0x3418850A: 9004 STR R0, [SP, #16]
0x3418850C: 9804 LDR R0, [SP, #16]
0x3418850E: 9903 LDR R1, [SP, #12]
0x34188510: FBB0 F0F1 UDIV R0, R0, R1
0x34188514: 9004 STR R0, [SP, #16]
0x34188516: E01A B 46L8 ; 0x3418854E
.L5:
0x34188518: F008 FA78 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34190A0C
0x3418851C: 9004 STR R0, [SP, #16]
0x3418851E: 9804 LDR R0, [SP, #16]
0x34188520: 9903 LDR R1, [SP, #12]
0x34188522: FBB0 F0F1 UDIV R0, R0, R1
0x34188526: 9004 STR R0, [SP, #16]
0x34188528: E011 B 46L8 ; 0x3418854E
.L6:
0x3418852A: F008 FAB1 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x34190A90
0x3418852E: 9004 STR R0, [SP, #16]
0x34188530: 9804 LDR R0, [SP, #16]
0x34188532: 9903 LDR R1, [SP, #12]
0x34188534: FBB0 F0F1 UDIV R0, R0, R1
0x34188538: 9004 STR R0, [SP, #16]
0x3418853A: E008 B 46L8 ; 0x3418854E
.L7:
0x3418853C: F008 FAEA BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34190B14
0x34188540: 9004 STR R0, [SP, #16]
0x34188542: 9804 LDR R0, [SP, #16]
0x34188544: 9903 LDR R1, [SP, #12]
0x34188546: FBB0 F0F1 UDIV R0, R0, R1
0x3418854A: 9004 STR R0, [SP, #16]
0x3418854C: E7FF B 46L8 ; 0x3418854E
.L8:
0x3418854E: E052 B 46L19 ; 0x341885F6
.L9:
0x34188550: F001 FDB6 BL LL_RCC_IC15_IsEnabled ; 0x3418A0C0
0x34188554: B3C0 CBZ R0, .L14 ; 0x341885C8
0x34188556: F008 FB2B BL LL_RCC_IC15_GetDivider ; 0x34190BB0
0x3418855A: 9003 STR R0, [SP, #12]
0x3418855C: F001 FDB8 BL LL_RCC_IC15_GetSource ; 0x3418A0D0
0x34188560: 4601 MOV R1, R0
0x34188562: 9100 STR R1, [SP, #0]
0x34188564: B160 CBZ R0, .L10 ; 0x34188580
0x34188566: 9800 LDR R0, [SP, #0]
0x34188568: F1B0 5F80 CMP.W R0, #0x10000000
0x3418856C: D011 BEQ 46L11 ; 0x34188592
0x3418856E: 9800 LDR R0, [SP, #0]
0x34188570: F1B0 5F00 CMP.W R0, #0x20000000
0x34188574: D016 BEQ 46L12 ; 0x341885A4
0x34188576: 9800 LDR R0, [SP, #0]
0x34188578: F1B0 5F40 CMP.W R0, #0x30000000
0x3418857C: D01B BEQ 46L13 ; 0x341885B6
0x3418857E: E023 B 46L14 ; 0x341885C8
.L10:
0x34188580: F008 FA02 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x34190988
0x34188584: 9004 STR R0, [SP, #16]
0x34188586: 9804 LDR R0, [SP, #16]
0x34188588: 9903 LDR R1, [SP, #12]
0x3418858A: FBB0 F0F1 UDIV R0, R0, R1
0x3418858E: 9004 STR R0, [SP, #16]
0x34188590: E01A B 46L14 ; 0x341885C8
.L11:
0x34188592: F008 FA3B BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34190A0C
0x34188596: 9004 STR R0, [SP, #16]
0x34188598: 9804 LDR R0, [SP, #16]
0x3418859A: 9903 LDR R1, [SP, #12]
0x3418859C: FBB0 F0F1 UDIV R0, R0, R1
0x341885A0: 9004 STR R0, [SP, #16]
0x341885A2: E011 B 46L14 ; 0x341885C8
.L12:
0x341885A4: F008 FA74 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x34190A90
0x341885A8: 9004 STR R0, [SP, #16]
0x341885AA: 9804 LDR R0, [SP, #16]
0x341885AC: 9903 LDR R1, [SP, #12]
0x341885AE: FBB0 F0F1 UDIV R0, R0, R1
0x341885B2: 9004 STR R0, [SP, #16]
0x341885B4: E008 B 46L14 ; 0x341885C8
.L13:
0x341885B6: F008 FAAD BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34190B14
0x341885BA: 9004 STR R0, [SP, #16]
0x341885BC: 9804 LDR R0, [SP, #16]
0x341885BE: 9903 LDR R1, [SP, #12]
0x341885C0: FBB0 F0F1 UDIV R0, R0, R1
0x341885C4: 9004 STR R0, [SP, #16]
0x341885C6: E7FF B 46L14 ; 0x341885C8
.L14:
0x341885C8: E015 B 46L19 ; 0x341885F6
.L15:
0x341885CA: F001 FC69 BL LL_RCC_HSI_IsReady.74 ; 0x34189EA0
0x341885CE: B140 CBZ R0, .L16 ; 0x341885E2
0x341885D0: F001 FC6E BL LL_RCC_HSI_GetDivider.75 ; 0x34189EB0
0x341885D4: 09C1 LSRS R1, R0, #7
0x341885D6: F249 0000 MOVW R0, #0x9000
0x341885DA: F2C0 30D0 MOVT R0, #0x03D0
0x341885DE: 40C8 LSRS R0, R1
0x341885E0: 9004 STR R0, [SP, #16]
.L16:
0x341885E2: E008 B 46L19 ; 0x341885F6
.L17:
0x341885E4: F001 FC6C BL LL_RCC_MSI_IsReady.76 ; 0x34189EC0
0x341885E8: B120 CBZ R0, .L18 ; 0x341885F4
0x341885EA: F640 1000 MOVW R0, #0x0900
0x341885EE: F2C0 003D MOVT R0, #61
0x341885F2: 9004 STR R0, [SP, #16]
.L18:
0x341885F4: E7FF B 46L19 ; 0x341885F6
.L19:
0x341885F6: 9804 LDR R0, [SP, #16]
0x341885F8: B006 ADD SP, SP, #24
0x341885FA: BD80 POP 123R7, PC}
Section .text.RCCEx_GetLPUARTCLKFreq from blto2_FSBL_lto.o, size=412, align=4
RCCEx_GetLPUARTCLKFreq:
0x341885FC: B580 PUSH 123R7, LR}
0x341885FE: B086 SUB SP, SP, #24
0x34188600: 9005 STR R0, [SP, #20]
0x34188602: 2000 MOVS R0, #0
0x34188604: 9004 STR R0, [SP, #16]
0x34188606: 9805 LDR R0, [SP, #20]
0x34188608: F006 FF10 BL LL_RCC_GetLPUARTClockSource ; 0x3418F42C
0x3418860C: 4601 MOV R1, R0
0x3418860E: 9102 STR R1, [SP, #8]
0x34188610: B1D8 CBZ R0, .L1 ; 0x3418864A
0x34188612: 9802 LDR R0, [SP, #8]
0x34188614: F5B0 7F80 CMP.W R0, #0x0100
0x34188618: D01F BEQ 46L2 ; 0x3418865A
0x3418861A: 9802 LDR R0, [SP, #8]
0x3418861C: F5B0 7F00 CMP.W R0, #0x0200
0x34188620: D020 BEQ 46L3 ; 0x34188664
0x34188622: 9802 LDR R0, [SP, #8]
0x34188624: F5B0 7F40 CMP.W R0, #0x0300
0x34188628: D059 BEQ 46L9 ; 0x341886DE
0x3418862A: 9802 LDR R0, [SP, #8]
0x3418862C: F5B0 6F80 CMP.W R0, #0x0400
0x34188630: F000 80A8 BEQ.W 46L19 ; 0x34188784
0x34188634: 9802 LDR R0, [SP, #8]
0x34188636: F5B0 6FA0 CMP.W R0, #0x0500
0x3418863A: F000 809A BEQ.W 46L17 ; 0x34188772
0x3418863E: 9802 LDR R0, [SP, #8]
0x34188640: F5B0 6FC0 CMP.W R0, #0x0600
0x34188644: F000 8088 BEQ.W 46L15 ; 0x34188758
0x34188648: E0A3 B 46L21 ; 0x34188792
.L1:
0x3418864A: F006 FE21 BL HAL_RCC_GetSysClockFreq ; 0x3418F290
0x3418864E: F001 FB27 BL RCCEx_GetHCLKFreq ; 0x34189CA0
0x34188652: F001 FD99 BL RCCEx_GetPCLK4Freq ; 0x3418A188
0x34188656: 9004 STR R0, [SP, #16]
0x34188658: E09B B 46L21 ; 0x34188792
.L2:
0x3418865A: 2007 MOVS R0, #7
0x3418865C: F7FF FC7E BL RCCEx_GetCLKPCLKFreq ; 0x34187F5C
0x34188660: 9004 STR R0, [SP, #16]
0x34188662: E096 B 46L21 ; 0x34188792
.L3:
0x34188664: F001 FD60 BL LL_RCC_IC9_IsEnabled ; 0x3418A128
0x34188668: B3C0 CBZ R0, .L8 ; 0x341886DC
0x3418866A: F008 FAAD BL LL_RCC_IC9_GetDivider ; 0x34190BC8
0x3418866E: 9003 STR R0, [SP, #12]
0x34188670: F001 FD62 BL LL_RCC_IC9_GetSource ; 0x3418A138
0x34188674: 4601 MOV R1, R0
0x34188676: 9101 STR R1, [SP, #4]
0x34188678: B160 CBZ R0, .L4 ; 0x34188694
0x3418867A: 9801 LDR R0, [SP, #4]
0x3418867C: F1B0 5F80 CMP.W R0, #0x10000000
0x34188680: D011 BEQ 46L5 ; 0x341886A6
0x34188682: 9801 LDR R0, [SP, #4]
0x34188684: F1B0 5F00 CMP.W R0, #0x20000000
0x34188688: D016 BEQ 46L6 ; 0x341886B8
0x3418868A: 9801 LDR R0, [SP, #4]
0x3418868C: F1B0 5F40 CMP.W R0, #0x30000000
0x34188690: D01B BEQ 46L7 ; 0x341886CA
0x34188692: E023 B 46L8 ; 0x341886DC
.L4:
0x34188694: F008 F978 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x34190988
0x34188698: 9004 STR R0, [SP, #16]
0x3418869A: 9804 LDR R0, [SP, #16]
0x3418869C: 9903 LDR R1, [SP, #12]
0x3418869E: FBB0 F0F1 UDIV R0, R0, R1
0x341886A2: 9004 STR R0, [SP, #16]
0x341886A4: E01A B 46L8 ; 0x341886DC
.L5:
0x341886A6: F008 F9B1 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34190A0C
0x341886AA: 9004 STR R0, [SP, #16]
0x341886AC: 9804 LDR R0, [SP, #16]
0x341886AE: 9903 LDR R1, [SP, #12]
0x341886B0: FBB0 F0F1 UDIV R0, R0, R1
0x341886B4: 9004 STR R0, [SP, #16]
0x341886B6: E011 B 46L8 ; 0x341886DC
.L6:
0x341886B8: F008 F9EA BL HAL_RCCEx_GetPLL3CLKFreq ; 0x34190A90
0x341886BC: 9004 STR R0, [SP, #16]
0x341886BE: 9804 LDR R0, [SP, #16]
0x341886C0: 9903 LDR R1, [SP, #12]
0x341886C2: FBB0 F0F1 UDIV R0, R0, R1
0x341886C6: 9004 STR R0, [SP, #16]
0x341886C8: E008 B 46L8 ; 0x341886DC
.L7:
0x341886CA: F008 FA23 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34190B14
0x341886CE: 9004 STR R0, [SP, #16]
0x341886D0: 9804 LDR R0, [SP, #16]
0x341886D2: 9903 LDR R1, [SP, #12]
0x341886D4: FBB0 F0F1 UDIV R0, R0, R1
0x341886D8: 9004 STR R0, [SP, #16]
0x341886DA: E7FF B 46L8 ; 0x341886DC
.L8:
0x341886DC: E059 B 46L21 ; 0x34188792
.L9:
0x341886DE: F001 FD33 BL LL_RCC_IC14_IsEnabled ; 0x3418A148
0x341886E2: B3C0 CBZ R0, .L14 ; 0x34188756
0x341886E4: F008 FA7C BL LL_RCC_IC14_GetDivider ; 0x34190BE0
0x341886E8: 9003 STR R0, [SP, #12]
0x341886EA: F001 FD35 BL LL_RCC_IC14_GetSource ; 0x3418A158
0x341886EE: 4601 MOV R1, R0
0x341886F0: 9100 STR R1, [SP, #0]
0x341886F2: B160 CBZ R0, .L10 ; 0x3418870E
0x341886F4: 9800 LDR R0, [SP, #0]
0x341886F6: F1B0 5F80 CMP.W R0, #0x10000000
0x341886FA: D011 BEQ 46L11 ; 0x34188720
0x341886FC: 9800 LDR R0, [SP, #0]
0x341886FE: F1B0 5F00 CMP.W R0, #0x20000000
0x34188702: D016 BEQ 46L12 ; 0x34188732
0x34188704: 9800 LDR R0, [SP, #0]
0x34188706: F1B0 5F40 CMP.W R0, #0x30000000
0x3418870A: D01B BEQ 46L13 ; 0x34188744
0x3418870C: E023 B 46L14 ; 0x34188756
.L10:
0x3418870E: F008 F93B BL HAL_RCCEx_GetPLL1CLKFreq ; 0x34190988
0x34188712: 9004 STR R0, [SP, #16]
0x34188714: 9804 LDR R0, [SP, #16]
0x34188716: 9903 LDR R1, [SP, #12]
0x34188718: FBB0 F0F1 UDIV R0, R0, R1
0x3418871C: 9004 STR R0, [SP, #16]
0x3418871E: E01A B 46L14 ; 0x34188756
.L11:
0x34188720: F008 F974 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34190A0C
0x34188724: 9004 STR R0, [SP, #16]
0x34188726: 9804 LDR R0, [SP, #16]
0x34188728: 9903 LDR R1, [SP, #12]
0x3418872A: FBB0 F0F1 UDIV R0, R0, R1
0x3418872E: 9004 STR R0, [SP, #16]
0x34188730: E011 B 46L14 ; 0x34188756
.L12:
0x34188732: F008 F9AD BL HAL_RCCEx_GetPLL3CLKFreq ; 0x34190A90
0x34188736: 9004 STR R0, [SP, #16]
0x34188738: 9804 LDR R0, [SP, #16]
0x3418873A: 9903 LDR R1, [SP, #12]
0x3418873C: FBB0 F0F1 UDIV R0, R0, R1
0x34188740: 9004 STR R0, [SP, #16]
0x34188742: E008 B 46L14 ; 0x34188756
.L13:
0x34188744: F008 F9E6 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34190B14
0x34188748: 9004 STR R0, [SP, #16]
0x3418874A: 9804 LDR R0, [SP, #16]
0x3418874C: 9903 LDR R1, [SP, #12]
0x3418874E: FBB0 F0F1 UDIV R0, R0, R1
0x34188752: 9004 STR R0, [SP, #16]
0x34188754: E7FF B 46L14 ; 0x34188756
.L14:
0x34188756: E01C B 46L21 ; 0x34188792
.L15:
0x34188758: F001 FBA2 BL LL_RCC_HSI_IsReady.74 ; 0x34189EA0
0x3418875C: B140 CBZ R0, .L16 ; 0x34188770
0x3418875E: F001 FBA7 BL LL_RCC_HSI_GetDivider.75 ; 0x34189EB0
0x34188762: 09C1 LSRS R1, R0, #7
0x34188764: F249 0000 MOVW R0, #0x9000
0x34188768: F2C0 30D0 MOVT R0, #0x03D0
0x3418876C: 40C8 LSRS R0, R1
0x3418876E: 9004 STR R0, [SP, #16]
.L16:
0x34188770: E00F B 46L21 ; 0x34188792
.L17:
0x34188772: F001 FBA5 BL LL_RCC_MSI_IsReady.76 ; 0x34189EC0
0x34188776: B120 CBZ R0, .L18 ; 0x34188782
0x34188778: F640 1000 MOVW R0, #0x0900
0x3418877C: F2C0 003D MOVT R0, #61
0x34188780: 9004 STR R0, [SP, #16]
.L18:
0x34188782: E006 B 46L21 ; 0x34188792
.L19:
0x34188784: F7FF F906 BL LL_RCC_LSE_IsReady.56 ; 0x34187994
0x34188788: B110 CBZ R0, .L20 ; 0x34188790
0x3418878A: F44F 4000 MOV.W R0, #0x8000
0x3418878E: 9004 STR R0, [SP, #16]
.L20:
0x34188790: E7FF B 46L21 ; 0x34188792
.L21:
0x34188792: 9804 LDR R0, [SP, #16]
0x34188794: B006 ADD SP, SP, #24
0x34188796: BD80 POP 123R7, PC}
Section .text.RCCEx_GetLTDCCLKFreq from blto2_FSBL_lto.o, size=228, align=4
RCCEx_GetLTDCCLKFreq:
0x34188798: B580 PUSH 123R7, LR}
0x3418879A: B086 SUB SP, SP, #24
0x3418879C: 9005 STR R0, [SP, #20]
0x3418879E: 2000 MOVS R0, #0
0x341887A0: 9004 STR R0, [SP, #16]
0x341887A2: 9805 LDR R0, [SP, #20]
0x341887A4: F006 FE4E BL LL_RCC_GetLTDCClockSource ; 0x3418F444
0x341887A8: 4601 MOV R1, R0
0x341887AA: 9102 STR R1, [SP, #8]
0x341887AC: B160 CBZ R0, .L1 ; 0x341887C8
0x341887AE: 9802 LDR R0, [SP, #8]
0x341887B0: F1B0 7F80 CMP.W R0, #0x01000000
0x341887B4: D010 BEQ 46L2 ; 0x341887D8
0x341887B6: 9802 LDR R0, [SP, #8]
0x341887B8: F1B0 7F00 CMP.W R0, #0x02000000
0x341887BC: D011 BEQ 46L3 ; 0x341887E2
0x341887BE: 9802 LDR R0, [SP, #8]
0x341887C0: F1B0 7F40 CMP.W R0, #0x03000000
0x341887C4: D04A BEQ 46L9 ; 0x3418885C
0x341887C6: E056 B 46L11 ; 0x34188876
.L1:
0x341887C8: F006 FD62 BL HAL_RCC_GetSysClockFreq ; 0x3418F290
0x341887CC: F001 FA68 BL RCCEx_GetHCLKFreq ; 0x34189CA0
0x341887D0: F001 FD38 BL RCCEx_GetPCLK5Freq ; 0x3418A244
0x341887D4: 9004 STR R0, [SP, #16]
0x341887D6: E04E B 46L11 ; 0x34188876
.L2:
0x341887D8: 2007 MOVS R0, #7
0x341887DA: F7FF FBBF BL RCCEx_GetCLKPCLKFreq ; 0x34187F5C
0x341887DE: 9004 STR R0, [SP, #16]
0x341887E0: E049 B 46L11 ; 0x34188876
.L3:
0x341887E2: F001 FD3D BL LL_RCC_IC16_IsEnabled ; 0x3418A260
0x341887E6: B3C0 CBZ R0, .L8 ; 0x3418885A
0x341887E8: F008 FA36 BL LL_RCC_IC16_GetDivider ; 0x34190C58
0x341887EC: 9003 STR R0, [SP, #12]
0x341887EE: F001 FD3F BL LL_RCC_IC16_GetSource ; 0x3418A270
0x341887F2: 4601 MOV R1, R0
0x341887F4: 9101 STR R1, [SP, #4]
0x341887F6: B160 CBZ R0, .L4 ; 0x34188812
0x341887F8: 9801 LDR R0, [SP, #4]
0x341887FA: F1B0 5F80 CMP.W R0, #0x10000000
0x341887FE: D011 BEQ 46L5 ; 0x34188824
0x34188800: 9801 LDR R0, [SP, #4]
0x34188802: F1B0 5F00 CMP.W R0, #0x20000000
0x34188806: D016 BEQ 46L6 ; 0x34188836
0x34188808: 9801 LDR R0, [SP, #4]
0x3418880A: F1B0 5F40 CMP.W R0, #0x30000000
0x3418880E: D01B BEQ 46L7 ; 0x34188848
0x34188810: E023 B 46L8 ; 0x3418885A
.L4:
0x34188812: F008 F8B9 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x34190988
0x34188816: 9004 STR R0, [SP, #16]
0x34188818: 9804 LDR R0, [SP, #16]
0x3418881A: 9903 LDR R1, [SP, #12]
0x3418881C: FBB0 F0F1 UDIV R0, R0, R1
0x34188820: 9004 STR R0, [SP, #16]
0x34188822: E01A B 46L8 ; 0x3418885A
.L5:
0x34188824: F008 F8F2 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34190A0C
0x34188828: 9004 STR R0, [SP, #16]
0x3418882A: 9804 LDR R0, [SP, #16]
0x3418882C: 9903 LDR R1, [SP, #12]
0x3418882E: FBB0 F0F1 UDIV R0, R0, R1
0x34188832: 9004 STR R0, [SP, #16]
0x34188834: E011 B 46L8 ; 0x3418885A
.L6:
0x34188836: F008 F92B BL HAL_RCCEx_GetPLL3CLKFreq ; 0x34190A90
0x3418883A: 9004 STR R0, [SP, #16]
0x3418883C: 9804 LDR R0, [SP, #16]
0x3418883E: 9903 LDR R1, [SP, #12]
0x34188840: FBB0 F0F1 UDIV R0, R0, R1
0x34188844: 9004 STR R0, [SP, #16]
0x34188846: E008 B 46L8 ; 0x3418885A
.L7:
0x34188848: F008 F964 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34190B14
0x3418884C: 9004 STR R0, [SP, #16]
0x3418884E: 9804 LDR R0, [SP, #16]
0x34188850: 9903 LDR R1, [SP, #12]
0x34188852: FBB0 F0F1 UDIV R0, R0, R1
0x34188856: 9004 STR R0, [SP, #16]
0x34188858: E7FF B 46L8 ; 0x3418885A
.L8:
0x3418885A: E00C B 46L11 ; 0x34188876
.L9:
0x3418885C: F001 FB20 BL LL_RCC_HSI_IsReady.74 ; 0x34189EA0
0x34188860: B140 CBZ R0, .L10 ; 0x34188874
0x34188862: F001 FB25 BL LL_RCC_HSI_GetDivider.75 ; 0x34189EB0
0x34188866: 09C1 LSRS R1, R0, #7
0x34188868: F249 0000 MOVW R0, #0x9000
0x3418886C: F2C0 30D0 MOVT R0, #0x03D0
0x34188870: 40C8 LSRS R0, R1
0x34188872: 9004 STR R0, [SP, #16]
.L10:
0x34188874: E7FF B 46L11 ; 0x34188876
.L11:
0x34188876: 9804 LDR R0, [SP, #16]
0x34188878: B006 ADD SP, SP, #24
0x3418887A: BD80 POP 123R7, PC}
Section .text.RCCEx_GetMDFCLKFreq from blto2_FSBL_lto.o, size=436, align=4
RCCEx_GetMDFCLKFreq:
0x3418887C: B580 PUSH 123R7, LR}
0x3418887E: B088 SUB SP, SP, #32
0x34188880: 9007 STR R0, [SP, #28]
0x34188882: 2000 MOVS R0, #0
0x34188884: 9006 STR R0, [SP, #24]
0x34188886: 9807 LDR R0, [SP, #28]
0x34188888: F006 FDE8 BL LL_RCC_GetMDFClockSource ; 0x3418F45C
0x3418888C: 4601 MOV R1, R0
0x3418888E: 9104 STR R1, [SP, #16]
0x34188890: B300 CBZ R0, .L1 ; 0x341888D4
0x34188892: 9804 LDR R0, [SP, #16]
0x34188894: F5B0 3F80 CMP.W R0, #0x010000
0x34188898: D022 BEQ 46L2 ; 0x341888E0
0x3418889A: 9804 LDR R0, [SP, #16]
0x3418889C: F5B0 3F00 CMP.W R0, #0x020000
0x341888A0: D023 BEQ 46L3 ; 0x341888EA
0x341888A2: 9804 LDR R0, [SP, #16]
0x341888A4: F5B0 3F40 CMP.W R0, #0x030000
0x341888A8: D05C BEQ 46L9 ; 0x34188964
0x341888AA: 9804 LDR R0, [SP, #16]
0x341888AC: F5B0 2F80 CMP.W R0, #0x040000
0x341888B0: F000 80A2 BEQ.W 46L17 ; 0x341889F8
0x341888B4: 9804 LDR R0, [SP, #16]
0x341888B6: F5B0 2FA0 CMP.W R0, #0x050000
0x341888BA: F000 8090 BEQ.W 46L15 ; 0x341889DE
0x341888BE: 9804 LDR R0, [SP, #16]
0x341888C0: F5B0 2FC0 CMP.W R0, #0x060000
0x341888C4: F000 80A1 BEQ.W 46L19 ; 0x34188A0A
0x341888C8: 9804 LDR R0, [SP, #16]
0x341888CA: F5B0 2FE0 CMP.W R0, #0x070000
0x341888CE: F000 80A2 BEQ.W 46L20 ; 0x34188A16
0x341888D2: E0AA B 46L21 ; 0x34188A2A
.L1:
0x341888D4: F006 FCDC BL HAL_RCC_GetSysClockFreq ; 0x3418F290
0x341888D8: F001 F9E2 BL RCCEx_GetHCLKFreq ; 0x34189CA0
0x341888DC: 9006 STR R0, [SP, #24]
0x341888DE: E0A4 B 46L21 ; 0x34188A2A
.L2:
0x341888E0: 2007 MOVS R0, #7
0x341888E2: F7FF FB3B BL RCCEx_GetCLKPCLKFreq ; 0x34187F5C
0x341888E6: 9006 STR R0, [SP, #24]
0x341888E8: E09F B 46L21 ; 0x34188A2A
.L3:
0x341888EA: F001 FC73 BL LL_RCC_IC7_IsEnabled ; 0x3418A1D4
0x341888EE: B3C0 CBZ R0, .L8 ; 0x34188962
0x341888F0: F008 F98E BL LL_RCC_IC7_GetDivider ; 0x34190C10
0x341888F4: 9005 STR R0, [SP, #20]
0x341888F6: F001 FC75 BL LL_RCC_IC7_GetSource ; 0x3418A1E4
0x341888FA: 4601 MOV R1, R0
0x341888FC: 9103 STR R1, [SP, #12]
0x341888FE: B160 CBZ R0, .L4 ; 0x3418891A
0x34188900: 9803 LDR R0, [SP, #12]
0x34188902: F1B0 5F80 CMP.W R0, #0x10000000
0x34188906: D011 BEQ 46L5 ; 0x3418892C
0x34188908: 9803 LDR R0, [SP, #12]
0x3418890A: F1B0 5F00 CMP.W R0, #0x20000000
0x3418890E: D016 BEQ 46L6 ; 0x3418893E
0x34188910: 9803 LDR R0, [SP, #12]
0x34188912: F1B0 5F40 CMP.W R0, #0x30000000
0x34188916: D01B BEQ 46L7 ; 0x34188950
0x34188918: E023 B 46L8 ; 0x34188962
.L4:
0x3418891A: F008 F835 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x34190988
0x3418891E: 9006 STR R0, [SP, #24]
0x34188920: 9806 LDR R0, [SP, #24]
0x34188922: 9905 LDR R1, [SP, #20]
0x34188924: FBB0 F0F1 UDIV R0, R0, R1
0x34188928: 9006 STR R0, [SP, #24]
0x3418892A: E01A B 46L8 ; 0x34188962
.L5:
0x3418892C: F008 F86E BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34190A0C
0x34188930: 9006 STR R0, [SP, #24]
0x34188932: 9806 LDR R0, [SP, #24]
0x34188934: 9905 LDR R1, [SP, #20]
0x34188936: FBB0 F0F1 UDIV R0, R0, R1
0x3418893A: 9006 STR R0, [SP, #24]
0x3418893C: E011 B 46L8 ; 0x34188962
.L6:
0x3418893E: F008 F8A7 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x34190A90
0x34188942: 9006 STR R0, [SP, #24]
0x34188944: 9806 LDR R0, [SP, #24]
0x34188946: 9905 LDR R1, [SP, #20]
0x34188948: FBB0 F0F1 UDIV R0, R0, R1
0x3418894C: 9006 STR R0, [SP, #24]
0x3418894E: E008 B 46L8 ; 0x34188962
.L7:
0x34188950: F008 F8E0 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34190B14
0x34188954: 9006 STR R0, [SP, #24]
0x34188956: 9806 LDR R0, [SP, #24]
0x34188958: 9905 LDR R1, [SP, #20]
0x3418895A: FBB0 F0F1 UDIV R0, R0, R1
0x3418895E: 9006 STR R0, [SP, #24]
0x34188960: E7FF B 46L8 ; 0x34188962
.L8:
0x34188962: E062 B 46L21 ; 0x34188A2A
.L9:
0x34188964: F001 FC1E BL LL_RCC_IC8_IsEnabled ; 0x3418A1A4
0x34188968: B3C0 CBZ R0, .L14 ; 0x341889DC
0x3418896A: F008 F945 BL LL_RCC_IC8_GetDivider ; 0x34190BF8
0x3418896E: 9005 STR R0, [SP, #20]
0x34188970: F001 FC20 BL LL_RCC_IC8_GetSource ; 0x3418A1B4
0x34188974: 4601 MOV R1, R0
0x34188976: 9102 STR R1, [SP, #8]
0x34188978: B160 CBZ R0, .L10 ; 0x34188994
0x3418897A: 9802 LDR R0, [SP, #8]
0x3418897C: F1B0 5F80 CMP.W R0, #0x10000000
0x34188980: D011 BEQ 46L11 ; 0x341889A6
0x34188982: 9802 LDR R0, [SP, #8]
0x34188984: F1B0 5F00 CMP.W R0, #0x20000000
0x34188988: D016 BEQ 46L12 ; 0x341889B8
0x3418898A: 9802 LDR R0, [SP, #8]
0x3418898C: F1B0 5F40 CMP.W R0, #0x30000000
0x34188990: D01B BEQ 46L13 ; 0x341889CA
0x34188992: E023 B 46L14 ; 0x341889DC
.L10:
0x34188994: F007 FFF8 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x34190988
0x34188998: 9006 STR R0, [SP, #24]
0x3418899A: 9806 LDR R0, [SP, #24]
0x3418899C: 9905 LDR R1, [SP, #20]
0x3418899E: FBB0 F0F1 UDIV R0, R0, R1
0x341889A2: 9006 STR R0, [SP, #24]
0x341889A4: E01A B 46L14 ; 0x341889DC
.L11:
0x341889A6: F008 F831 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34190A0C
0x341889AA: 9006 STR R0, [SP, #24]
0x341889AC: 9806 LDR R0, [SP, #24]
0x341889AE: 9905 LDR R1, [SP, #20]
0x341889B0: FBB0 F0F1 UDIV R0, R0, R1
0x341889B4: 9006 STR R0, [SP, #24]
0x341889B6: E011 B 46L14 ; 0x341889DC
.L12:
0x341889B8: F008 F86A BL HAL_RCCEx_GetPLL3CLKFreq ; 0x34190A90
0x341889BC: 9006 STR R0, [SP, #24]
0x341889BE: 9806 LDR R0, [SP, #24]
0x341889C0: 9905 LDR R1, [SP, #20]
0x341889C2: FBB0 F0F1 UDIV R0, R0, R1
0x341889C6: 9006 STR R0, [SP, #24]
0x341889C8: E008 B 46L14 ; 0x341889DC
.L13:
0x341889CA: F008 F8A3 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34190B14
0x341889CE: 9006 STR R0, [SP, #24]
0x341889D0: 9806 LDR R0, [SP, #24]
0x341889D2: 9905 LDR R1, [SP, #20]
0x341889D4: FBB0 F0F1 UDIV R0, R0, R1
0x341889D8: 9006 STR R0, [SP, #24]
0x341889DA: E7FF B 46L14 ; 0x341889DC
.L14:
0x341889DC: E025 B 46L21 ; 0x34188A2A
.L15:
0x341889DE: F001 FA5F BL LL_RCC_HSI_IsReady.74 ; 0x34189EA0
0x341889E2: B140 CBZ R0, .L16 ; 0x341889F6
0x341889E4: F001 FA64 BL LL_RCC_HSI_GetDivider.75 ; 0x34189EB0
0x341889E8: 09C1 LSRS R1, R0, #7
0x341889EA: F249 0000 MOVW R0, #0x9000
0x341889EE: F2C0 30D0 MOVT R0, #0x03D0
0x341889F2: 40C8 LSRS R0, R1
0x341889F4: 9006 STR R0, [SP, #24]
.L16:
0x341889F6: E018 B 46L21 ; 0x34188A2A
.L17:
0x341889F8: F001 FA62 BL LL_RCC_MSI_IsReady.76 ; 0x34189EC0
0x341889FC: B120 CBZ R0, .L18 ; 0x34188A08
0x341889FE: F640 1000 MOVW R0, #0x0900
0x34188A02: F2C0 003D MOVT R0, #61
0x34188A06: 9006 STR R0, [SP, #24]
.L18:
0x34188A08: E00F B 46L21 ; 0x34188A2A
.L19:
0x34188A0A: F248 0000 MOVW R0, #0x8000
0x34188A0E: F2C0 00BB MOVT R0, #187
0x34188A12: 9006 STR R0, [SP, #24]
0x34188A14: E009 B 46L21 ; 0x34188A2A
.L20:
0x34188A16: F006 FC3B BL HAL_RCC_GetSysClockFreq ; 0x3418F290
0x34188A1A: 9001 STR R0, [SP, #4]
0x34188A1C: F7FF F9A4 BL LL_RCC_GetTIMPrescaler ; 0x34187D68
0x34188A20: 4601 MOV R1, R0
0x34188A22: 9801 LDR R0, [SP, #4]
0x34188A24: 40C8 LSRS R0, R1
0x34188A26: 9006 STR R0, [SP, #24]
0x34188A28: E7FF B 46L21 ; 0x34188A2A
.L21:
0x34188A2A: 9806 LDR R0, [SP, #24]
0x34188A2C: B008 ADD SP, SP, #32
0x34188A2E: BD80 POP 123R7, PC}
Section .text.RCCEx_GetSDMMCCLKFreq from blto2_FSBL_lto.o, size=396, align=4
RCCEx_GetSDMMCCLKFreq:
0x34188A30: B580 PUSH 123R7, LR}
0x34188A32: B086 SUB SP, SP, #24
0x34188A34: 9005 STR R0, [SP, #20]
0x34188A36: 2000 MOVS R0, #0
0x34188A38: 9004 STR R0, [SP, #16]
0x34188A3A: 9805 LDR R0, [SP, #20]
0x34188A3C: F7FF F984 BL LL_RCC_GetSDMMCClockSource ; 0x34187D48
0x34188A40: 4601 MOV R1, R0
0x34188A42: 9102 STR R1, [SP, #8]
0x34188A44: 211C MOVS R1, #28
0x34188A46: F2C0 3100 MOVT R1, #0x0300
0x34188A4A: 4288 CMP R0, R1
0x34188A4C: D02E BEQ 46L1 ; 0x34188AAC
0x34188A4E: 9802 LDR R0, [SP, #8]
0x34188A50: F240 411C MOVW R1, #0x041C
0x34188A54: F2C0 3100 MOVT R1, #0x0300
0x34188A58: 4288 CMP R0, R1
0x34188A5A: D027 BEQ 46L1 ; 0x34188AAC
0x34188A5C: 9802 LDR R0, [SP, #8]
0x34188A5E: 211C MOVS R1, #28
0x34188A60: F2C0 3101 MOVT R1, #0x0301
0x34188A64: 4288 CMP R0, R1
0x34188A66: D027 BEQ 46L2 ; 0x34188AB8
0x34188A68: 9802 LDR R0, [SP, #8]
0x34188A6A: F240 411C MOVW R1, #0x041C
0x34188A6E: F2C0 3101 MOVT R1, #0x0301
0x34188A72: 4288 CMP R0, R1
0x34188A74: D020 BEQ 46L2 ; 0x34188AB8
0x34188A76: 9802 LDR R0, [SP, #8]
0x34188A78: 211C MOVS R1, #28
0x34188A7A: F2C0 3102 MOVT R1, #0x0302
0x34188A7E: 4288 CMP R0, R1
0x34188A80: D01F BEQ 46L3 ; 0x34188AC2
0x34188A82: 9802 LDR R0, [SP, #8]
0x34188A84: F240 411C MOVW R1, #0x041C
0x34188A88: F2C0 3102 MOVT R1, #0x0302
0x34188A8C: 4288 CMP R0, R1
0x34188A8E: D018 BEQ 46L3 ; 0x34188AC2
0x34188A90: 9802 LDR R0, [SP, #8]
0x34188A92: 211C MOVS R1, #28
0x34188A94: F2C0 3103 MOVT R1, #0x0303
0x34188A98: 4288 CMP R0, R1
0x34188A9A: D04F BEQ 46L9 ; 0x34188B3C
0x34188A9C: 9802 LDR R0, [SP, #8]
0x34188A9E: F240 411C MOVW R1, #0x041C
0x34188AA2: F2C0 3103 MOVT R1, #0x0303
0x34188AA6: 4288 CMP R0, R1
0x34188AA8: D048 BEQ 46L9 ; 0x34188B3C
0x34188AAA: E084 B 46L15 ; 0x34188BB6
.L1:
0x34188AAC: F006 FBF0 BL HAL_RCC_GetSysClockFreq ; 0x3418F290
0x34188AB0: F001 F8F6 BL RCCEx_GetHCLKFreq ; 0x34189CA0
0x34188AB4: 9004 STR R0, [SP, #16]
0x34188AB6: E07E B 46L15 ; 0x34188BB6
.L2:
0x34188AB8: 2007 MOVS R0, #7
0x34188ABA: F7FF FA4F BL RCCEx_GetCLKPCLKFreq ; 0x34187F5C
0x34188ABE: 9004 STR R0, [SP, #16]
0x34188AC0: E079 B 46L15 ; 0x34188BB6
.L3:
0x34188AC2: F001 F90B BL LL_RCC_IC4_IsEnabled ; 0x34189CDC
0x34188AC6: B3C0 CBZ R0, .L8 ; 0x34188B3A
0x34188AC8: F008 F866 BL LL_RCC_IC4_GetDivider ; 0x34190B98
0x34188ACC: 9003 STR R0, [SP, #12]
0x34188ACE: F001 F90D BL LL_RCC_IC4_GetSource ; 0x34189CEC
0x34188AD2: 4601 MOV R1, R0
0x34188AD4: 9101 STR R1, [SP, #4]
0x34188AD6: B160 CBZ R0, .L4 ; 0x34188AF2
0x34188AD8: 9801 LDR R0, [SP, #4]
0x34188ADA: F1B0 5F80 CMP.W R0, #0x10000000
0x34188ADE: D011 BEQ 46L5 ; 0x34188B04
0x34188AE0: 9801 LDR R0, [SP, #4]
0x34188AE2: F1B0 5F00 CMP.W R0, #0x20000000
0x34188AE6: D016 BEQ 46L6 ; 0x34188B16
0x34188AE8: 9801 LDR R0, [SP, #4]
0x34188AEA: F1B0 5F40 CMP.W R0, #0x30000000
0x34188AEE: D01B BEQ 46L7 ; 0x34188B28
0x34188AF0: E023 B 46L8 ; 0x34188B3A
.L4:
0x34188AF2: F007 FF49 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x34190988
0x34188AF6: 9004 STR R0, [SP, #16]
0x34188AF8: 9804 LDR R0, [SP, #16]
0x34188AFA: 9903 LDR R1, [SP, #12]
0x34188AFC: FBB0 F0F1 UDIV R0, R0, R1
0x34188B00: 9004 STR R0, [SP, #16]
0x34188B02: E01A B 46L8 ; 0x34188B3A
.L5:
0x34188B04: F007 FF82 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34190A0C
0x34188B08: 9004 STR R0, [SP, #16]
0x34188B0A: 9804 LDR R0, [SP, #16]
0x34188B0C: 9903 LDR R1, [SP, #12]
0x34188B0E: FBB0 F0F1 UDIV R0, R0, R1
0x34188B12: 9004 STR R0, [SP, #16]
0x34188B14: E011 B 46L8 ; 0x34188B3A
.L6:
0x34188B16: F007 FFBB BL HAL_RCCEx_GetPLL3CLKFreq ; 0x34190A90
0x34188B1A: 9004 STR R0, [SP, #16]
0x34188B1C: 9804 LDR R0, [SP, #16]
0x34188B1E: 9903 LDR R1, [SP, #12]
0x34188B20: FBB0 F0F1 UDIV R0, R0, R1
0x34188B24: 9004 STR R0, [SP, #16]
0x34188B26: E008 B 46L8 ; 0x34188B3A
.L7:
0x34188B28: F007 FFF4 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34190B14
0x34188B2C: 9004 STR R0, [SP, #16]
0x34188B2E: 9804 LDR R0, [SP, #16]
0x34188B30: 9903 LDR R1, [SP, #12]
0x34188B32: FBB0 F0F1 UDIV R0, R0, R1
0x34188B36: 9004 STR R0, [SP, #16]
0x34188B38: E7FF B 46L8 ; 0x34188B3A
.L8:
0x34188B3A: E03C B 46L15 ; 0x34188BB6
.L9:
0x34188B3C: F001 FB5A BL LL_RCC_IC5_IsEnabled ; 0x3418A1F4
0x34188B40: B3C0 CBZ R0, .L14 ; 0x34188BB4
0x34188B42: F008 F871 BL LL_RCC_IC5_GetDivider ; 0x34190C28
0x34188B46: 9003 STR R0, [SP, #12]
0x34188B48: F001 FB5C BL LL_RCC_IC5_GetSource ; 0x3418A204
0x34188B4C: 4601 MOV R1, R0
0x34188B4E: 9100 STR R1, [SP, #0]
0x34188B50: B160 CBZ R0, .L10 ; 0x34188B6C
0x34188B52: 9800 LDR R0, [SP, #0]
0x34188B54: F1B0 5F80 CMP.W R0, #0x10000000
0x34188B58: D011 BEQ 46L11 ; 0x34188B7E
0x34188B5A: 9800 LDR R0, [SP, #0]
0x34188B5C: F1B0 5F00 CMP.W R0, #0x20000000
0x34188B60: D016 BEQ 46L12 ; 0x34188B90
0x34188B62: 9800 LDR R0, [SP, #0]
0x34188B64: F1B0 5F40 CMP.W R0, #0x30000000
0x34188B68: D01B BEQ 46L13 ; 0x34188BA2
0x34188B6A: E023 B 46L14 ; 0x34188BB4
.L10:
0x34188B6C: F007 FF0C BL HAL_RCCEx_GetPLL1CLKFreq ; 0x34190988
0x34188B70: 9004 STR R0, [SP, #16]
0x34188B72: 9804 LDR R0, [SP, #16]
0x34188B74: 9903 LDR R1, [SP, #12]
0x34188B76: FBB0 F0F1 UDIV R0, R0, R1
0x34188B7A: 9004 STR R0, [SP, #16]
0x34188B7C: E01A B 46L14 ; 0x34188BB4
.L11:
0x34188B7E: F007 FF45 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34190A0C
0x34188B82: 9004 STR R0, [SP, #16]
0x34188B84: 9804 LDR R0, [SP, #16]
0x34188B86: 9903 LDR R1, [SP, #12]
0x34188B88: FBB0 F0F1 UDIV R0, R0, R1
0x34188B8C: 9004 STR R0, [SP, #16]
0x34188B8E: E011 B 46L14 ; 0x34188BB4
.L12:
0x34188B90: F007 FF7E BL HAL_RCCEx_GetPLL3CLKFreq ; 0x34190A90
0x34188B94: 9004 STR R0, [SP, #16]
0x34188B96: 9804 LDR R0, [SP, #16]
0x34188B98: 9903 LDR R1, [SP, #12]
0x34188B9A: FBB0 F0F1 UDIV R0, R0, R1
0x34188B9E: 9004 STR R0, [SP, #16]
0x34188BA0: E008 B 46L14 ; 0x34188BB4
.L13:
0x34188BA2: F007 FFB7 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34190B14
0x34188BA6: 9004 STR R0, [SP, #16]
0x34188BA8: 9804 LDR R0, [SP, #16]
0x34188BAA: 9903 LDR R1, [SP, #12]
0x34188BAC: FBB0 F0F1 UDIV R0, R0, R1
0x34188BB0: 9004 STR R0, [SP, #16]
0x34188BB2: E7FF B 46L14 ; 0x34188BB4
.L14:
0x34188BB4: E7FF B 46L15 ; 0x34188BB6
.L15:
0x34188BB6: 9804 LDR R0, [SP, #16]
0x34188BB8: B006 ADD SP, SP, #24
0x34188BBA: BD80 POP 123R7, PC}
Section .text.RCCEx_GetSPDIFRXCLKFreq from blto2_FSBL_lto.o, size=372, align=4
RCCEx_GetSPDIFRXCLKFreq:
0x34188BBC: B580 PUSH 123R7, LR}
0x34188BBE: B086 SUB SP, SP, #24
0x34188BC0: 9005 STR R0, [SP, #20]
0x34188BC2: 2000 MOVS R0, #0
0x34188BC4: 9004 STR R0, [SP, #16]
0x34188BC6: 9805 LDR R0, [SP, #20]
0x34188BC8: F006 FC60 BL LL_RCC_GetSPDIFRXClockSource ; 0x3418F48C
0x34188BCC: 4601 MOV R1, R0
0x34188BCE: 9102 STR R1, [SP, #8]
0x34188BD0: 2806 CMP R0, #6
0x34188BD2: F200 80AA BHI.W 46L13 ; 0x34188D2A
0x34188BD6: 9902 LDR R1, [SP, #8]
0x34188BD8: E8DF F001 TBB 91PC, R1]
0x34188BDC: 04 DC.B 0x04 ; '\x04'
0x34188BDD: 0C DC.B 0x0C ; '\x0C'
0x34188BDE: 11 DC.B 0x11 ; '\x11'
0x34188BDF: 4E DC.B 0x4E ; 'N'
0x34188BE0: 98 DC.B 0x98 ; '\x98'
0x34188BE1: 8B DC.B 0x8B ; '\x8B'
0x34188BE2: A1 DC.B 0xA1 ; '\xA1'
0x34188BE3: 00 DC.B 0x00 ; '\0'
0x34188BE4: F006 FB54 BL HAL_RCC_GetSysClockFreq ; 0x3418F290
0x34188BE8: F001 F85A BL RCCEx_GetHCLKFreq ; 0x34189CA0
0x34188BEC: F001 FA80 BL RCCEx_GetPCLK1Freq ; 0x3418A0F0
0x34188BF0: 9004 STR R0, [SP, #16]
0x34188BF2: E09A B 46L13 ; 0x34188D2A
0x34188BF4: 2007 MOVS R0, #7
0x34188BF6: F7FF F9B1 BL RCCEx_GetCLKPCLKFreq ; 0x34187F5C
0x34188BFA: 9004 STR R0, [SP, #16]
0x34188BFC: E095 B 46L13 ; 0x34188D2A
0x34188BFE: F001 FAE9 BL LL_RCC_IC7_IsEnabled ; 0x3418A1D4
0x34188C02: B3C0 CBZ R0, .L5 ; 0x34188C76
0x34188C04: F008 F804 BL LL_RCC_IC7_GetDivider ; 0x34190C10
0x34188C08: 9003 STR R0, [SP, #12]
0x34188C0A: F001 FAEB BL LL_RCC_IC7_GetSource ; 0x3418A1E4
0x34188C0E: 4601 MOV R1, R0
0x34188C10: 9101 STR R1, [SP, #4]
0x34188C12: B160 CBZ R0, .L1 ; 0x34188C2E
0x34188C14: 9801 LDR R0, [SP, #4]
0x34188C16: F1B0 5F80 CMP.W R0, #0x10000000
0x34188C1A: D011 BEQ 46L2 ; 0x34188C40
0x34188C1C: 9801 LDR R0, [SP, #4]
0x34188C1E: F1B0 5F00 CMP.W R0, #0x20000000
0x34188C22: D016 BEQ 46L3 ; 0x34188C52
0x34188C24: 9801 LDR R0, [SP, #4]
0x34188C26: F1B0 5F40 CMP.W R0, #0x30000000
0x34188C2A: D01B BEQ 46L4 ; 0x34188C64
0x34188C2C: E023 B 46L5 ; 0x34188C76
.L1:
0x34188C2E: F007 FEAB BL HAL_RCCEx_GetPLL1CLKFreq ; 0x34190988
0x34188C32: 9004 STR R0, [SP, #16]
0x34188C34: 9804 LDR R0, [SP, #16]
0x34188C36: 9903 LDR R1, [SP, #12]
0x34188C38: FBB0 F0F1 UDIV R0, R0, R1
0x34188C3C: 9004 STR R0, [SP, #16]
0x34188C3E: E01A B 46L5 ; 0x34188C76
.L2:
0x34188C40: F007 FEE4 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34190A0C
0x34188C44: 9004 STR R0, [SP, #16]
0x34188C46: 9804 LDR R0, [SP, #16]
0x34188C48: 9903 LDR R1, [SP, #12]
0x34188C4A: FBB0 F0F1 UDIV R0, R0, R1
0x34188C4E: 9004 STR R0, [SP, #16]
0x34188C50: E011 B 46L5 ; 0x34188C76
.L3:
0x34188C52: F007 FF1D BL HAL_RCCEx_GetPLL3CLKFreq ; 0x34190A90
0x34188C56: 9004 STR R0, [SP, #16]
0x34188C58: 9804 LDR R0, [SP, #16]
0x34188C5A: 9903 LDR R1, [SP, #12]
0x34188C5C: FBB0 F0F1 UDIV R0, R0, R1
0x34188C60: 9004 STR R0, [SP, #16]
0x34188C62: E008 B 46L5 ; 0x34188C76
.L4:
0x34188C64: F007 FF56 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34190B14
0x34188C68: 9004 STR R0, [SP, #16]
0x34188C6A: 9804 LDR R0, [SP, #16]
0x34188C6C: 9903 LDR R1, [SP, #12]
0x34188C6E: FBB0 F0F1 UDIV R0, R0, R1
0x34188C72: 9004 STR R0, [SP, #16]
0x34188C74: E7FF B 46L5 ; 0x34188C76
.L5:
0x34188C76: E058 B 46L13 ; 0x34188D2A
0x34188C78: F001 FA94 BL LL_RCC_IC8_IsEnabled ; 0x3418A1A4
0x34188C7C: B3C0 CBZ R0, .L10 ; 0x34188CF0
0x34188C7E: F007 FFBB BL LL_RCC_IC8_GetDivider ; 0x34190BF8
0x34188C82: 9003 STR R0, [SP, #12]
0x34188C84: F001 FA96 BL LL_RCC_IC8_GetSource ; 0x3418A1B4
0x34188C88: 4601 MOV R1, R0
0x34188C8A: 9100 STR R1, [SP, #0]
0x34188C8C: B160 CBZ R0, .L6 ; 0x34188CA8
0x34188C8E: 9800 LDR R0, [SP, #0]
0x34188C90: F1B0 5F80 CMP.W R0, #0x10000000
0x34188C94: D011 BEQ 46L7 ; 0x34188CBA
0x34188C96: 9800 LDR R0, [SP, #0]
0x34188C98: F1B0 5F00 CMP.W R0, #0x20000000
0x34188C9C: D016 BEQ 46L8 ; 0x34188CCC
0x34188C9E: 9800 LDR R0, [SP, #0]
0x34188CA0: F1B0 5F40 CMP.W R0, #0x30000000
0x34188CA4: D01B BEQ 46L9 ; 0x34188CDE
0x34188CA6: E023 B 46L10 ; 0x34188CF0
.L6:
0x34188CA8: F007 FE6E BL HAL_RCCEx_GetPLL1CLKFreq ; 0x34190988
0x34188CAC: 9004 STR R0, [SP, #16]
0x34188CAE: 9804 LDR R0, [SP, #16]
0x34188CB0: 9903 LDR R1, [SP, #12]
0x34188CB2: FBB0 F0F1 UDIV R0, R0, R1
0x34188CB6: 9004 STR R0, [SP, #16]
0x34188CB8: E01A B 46L10 ; 0x34188CF0
.L7:
0x34188CBA: F007 FEA7 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34190A0C
0x34188CBE: 9004 STR R0, [SP, #16]
0x34188CC0: 9804 LDR R0, [SP, #16]
0x34188CC2: 9903 LDR R1, [SP, #12]
0x34188CC4: FBB0 F0F1 UDIV R0, R0, R1
0x34188CC8: 9004 STR R0, [SP, #16]
0x34188CCA: E011 B 46L10 ; 0x34188CF0
.L8:
0x34188CCC: F007 FEE0 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x34190A90
0x34188CD0: 9004 STR R0, [SP, #16]
0x34188CD2: 9804 LDR R0, [SP, #16]
0x34188CD4: 9903 LDR R1, [SP, #12]
0x34188CD6: FBB0 F0F1 UDIV R0, R0, R1
0x34188CDA: 9004 STR R0, [SP, #16]
0x34188CDC: E008 B 46L10 ; 0x34188CF0
.L9:
0x34188CDE: F007 FF19 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34190B14
0x34188CE2: 9004 STR R0, [SP, #16]
0x34188CE4: 9804 LDR R0, [SP, #16]
0x34188CE6: 9903 LDR R1, [SP, #12]
0x34188CE8: FBB0 F0F1 UDIV R0, R0, R1
0x34188CEC: 9004 STR R0, [SP, #16]
0x34188CEE: E7FF B 46L10 ; 0x34188CF0
.L10:
0x34188CF0: E01B B 46L13 ; 0x34188D2A
0x34188CF2: F001 F8D5 BL LL_RCC_HSI_IsReady.74 ; 0x34189EA0
0x34188CF6: B140 CBZ R0, .L11 ; 0x34188D0A
0x34188CF8: F001 F8DA BL LL_RCC_HSI_GetDivider.75 ; 0x34189EB0
0x34188CFC: 09C1 LSRS R1, R0, #7
0x34188CFE: F249 0000 MOVW R0, #0x9000
0x34188D02: F2C0 30D0 MOVT R0, #0x03D0
0x34188D06: 40C8 LSRS R0, R1
0x34188D08: 9004 STR R0, [SP, #16]
.L11:
0x34188D0A: E00E B 46L13 ; 0x34188D2A
0x34188D0C: F001 F8D8 BL LL_RCC_MSI_IsReady.76 ; 0x34189EC0
0x34188D10: B120 CBZ R0, .L12 ; 0x34188D1C
0x34188D12: F640 1000 MOVW R0, #0x0900
0x34188D16: F2C0 003D MOVT R0, #61
0x34188D1A: 9004 STR R0, [SP, #16]
.L12:
0x34188D1C: E005 B 46L13 ; 0x34188D2A
0x34188D1E: F248 0000 MOVW R0, #0x8000
0x34188D22: F2C0 00BB MOVT R0, #187
0x34188D26: 9004 STR R0, [SP, #16]
0x34188D28: E7FF B 46L13 ; 0x34188D2A
.L13:
0x34188D2A: 9804 LDR R0, [SP, #16]
0x34188D2C: B006 ADD SP, SP, #24
0x34188D2E: BD80 POP 123R7, PC}
Section .text.RCCEx_GetSPICLKFreq from blto2_FSBL_lto.o, size=1196, align=4
RCCEx_GetSPICLKFreq:
0x34188D30: B580 PUSH 123R7, LR}
0x34188D32: B088 SUB SP, SP, #32
0x34188D34: 9007 STR R0, [SP, #28]
0x34188D36: 2000 MOVS R0, #0
0x34188D38: 9006 STR R0, [SP, #24]
0x34188D3A: 9807 LDR R0, [SP, #28]
0x34188D3C: F7FF F80C BL LL_RCC_GetSPIClockSource ; 0x34187D58
0x34188D40: 4601 MOV R1, R0
0x34188D42: 9104 STR R1, [SP, #16]
0x34188D44: F240 4120 MOVW R1, #0x0420
0x34188D48: F2C0 7100 MOVT R1, #0x0700
0x34188D4C: 4288 CMP R0, R1
0x34188D4E: F000 8151 BEQ.W 46L2 ; 0x34188FF4
0x34188D52: 9804 LDR R0, [SP, #16]
0x34188D54: F640 0120 MOVW R1, #0x0820
0x34188D58: F2C0 7100 MOVT R1, #0x0700
0x34188D5C: 4288 CMP R0, R1
0x34188D5E: F000 8141 BEQ.W 46L1 ; 0x34188FE4
0x34188D62: 9804 LDR R0, [SP, #16]
0x34188D64: F640 4120 MOVW R1, #0x0C20
0x34188D68: F2C0 7100 MOVT R1, #0x0700
0x34188D6C: 4288 CMP R0, R1
0x34188D6E: F000 8139 BEQ.W 46L1 ; 0x34188FE4
0x34188D72: 9804 LDR R0, [SP, #16]
0x34188D74: F241 0120 MOVW R1, #0x1020
0x34188D78: F2C0 7100 MOVT R1, #0x0700
0x34188D7C: 4288 CMP R0, R1
0x34188D7E: F000 8139 BEQ.W 46L2 ; 0x34188FF4
0x34188D82: 9804 LDR R0, [SP, #16]
0x34188D84: F241 4120 MOVW R1, #0x1420
0x34188D88: F2C0 7100 MOVT R1, #0x0700
0x34188D8C: 4288 CMP R0, R1
0x34188D8E: F000 8131 BEQ.W 46L2 ; 0x34188FF4
0x34188D92: 9804 LDR R0, [SP, #16]
0x34188D94: F641 0120 MOVW R1, #0x1820
0x34188D98: F2C0 7100 MOVT R1, #0x0700
0x34188D9C: 4288 CMP R0, R1
0x34188D9E: F000 8131 BEQ.W 46L3 ; 0x34189004
0x34188DA2: 9804 LDR R0, [SP, #16]
0x34188DA4: F240 4120 MOVW R1, #0x0420
0x34188DA8: F2C0 7101 MOVT R1, #0x0701
0x34188DAC: 4288 CMP R0, R1
0x34188DAE: F000 8131 BEQ.W 46L4 ; 0x34189014
0x34188DB2: 9804 LDR R0, [SP, #16]
0x34188DB4: F640 0120 MOVW R1, #0x0820
0x34188DB8: F2C0 7101 MOVT R1, #0x0701
0x34188DBC: 4288 CMP R0, R1
0x34188DBE: F000 8129 BEQ.W 46L4 ; 0x34189014
0x34188DC2: 9804 LDR R0, [SP, #16]
0x34188DC4: F640 4120 MOVW R1, #0x0C20
0x34188DC8: F2C0 7101 MOVT R1, #0x0701
0x34188DCC: 4288 CMP R0, R1
0x34188DCE: F000 8121 BEQ.W 46L4 ; 0x34189014
0x34188DD2: 9804 LDR R0, [SP, #16]
0x34188DD4: F241 0120 MOVW R1, #0x1020
0x34188DD8: F2C0 7101 MOVT R1, #0x0701
0x34188DDC: 4288 CMP R0, R1
0x34188DDE: F000 8119 BEQ.W 46L4 ; 0x34189014
0x34188DE2: 9804 LDR R0, [SP, #16]
0x34188DE4: F241 4120 MOVW R1, #0x1420
0x34188DE8: F2C0 7101 MOVT R1, #0x0701
0x34188DEC: 4288 CMP R0, R1
0x34188DEE: F000 8111 BEQ.W 46L4 ; 0x34189014
0x34188DF2: 9804 LDR R0, [SP, #16]
0x34188DF4: F641 0120 MOVW R1, #0x1820
0x34188DF8: F2C0 7101 MOVT R1, #0x0701
0x34188DFC: 4288 CMP R0, R1
0x34188DFE: F000 8109 BEQ.W 46L4 ; 0x34189014
0x34188E02: 9804 LDR R0, [SP, #16]
0x34188E04: F240 4120 MOVW R1, #0x0420
0x34188E08: F2C0 7102 MOVT R1, #0x0702
0x34188E0C: 4288 CMP R0, R1
0x34188E0E: F000 8106 BEQ.W 46L5 ; 0x3418901E
0x34188E12: 9804 LDR R0, [SP, #16]
0x34188E14: F640 0120 MOVW R1, #0x0820
0x34188E18: F2C0 7102 MOVT R1, #0x0702
0x34188E1C: 4288 CMP R0, R1
0x34188E1E: F000 80FE BEQ.W 46L5 ; 0x3418901E
0x34188E22: 9804 LDR R0, [SP, #16]
0x34188E24: F640 4120 MOVW R1, #0x0C20
0x34188E28: F2C0 7102 MOVT R1, #0x0702
0x34188E2C: 4288 CMP R0, R1
0x34188E2E: F000 80F6 BEQ.W 46L5 ; 0x3418901E
0x34188E32: 9804 LDR R0, [SP, #16]
0x34188E34: F241 0120 MOVW R1, #0x1020
0x34188E38: F2C0 7102 MOVT R1, #0x0702
0x34188E3C: 4288 CMP R0, R1
0x34188E3E: F000 812B BEQ.W 46L11 ; 0x34189098
0x34188E42: 9804 LDR R0, [SP, #16]
0x34188E44: F241 4120 MOVW R1, #0x1420
0x34188E48: F2C0 7102 MOVT R1, #0x0702
0x34188E4C: 4288 CMP R0, R1
0x34188E4E: F000 8123 BEQ.W 46L11 ; 0x34189098
0x34188E52: 9804 LDR R0, [SP, #16]
0x34188E54: F641 0120 MOVW R1, #0x1820
0x34188E58: F2C0 7102 MOVT R1, #0x0702
0x34188E5C: 4288 CMP R0, R1
0x34188E5E: F000 80DE BEQ.W 46L5 ; 0x3418901E
0x34188E62: 9804 LDR R0, [SP, #16]
0x34188E64: F240 4120 MOVW R1, #0x0420
0x34188E68: F2C0 7103 MOVT R1, #0x0703
0x34188E6C: 4288 CMP R0, R1
0x34188E6E: F000 8113 BEQ.W 46L11 ; 0x34189098
0x34188E72: 9804 LDR R0, [SP, #16]
0x34188E74: F640 0120 MOVW R1, #0x0820
0x34188E78: F2C0 7103 MOVT R1, #0x0703
0x34188E7C: 4288 CMP R0, R1
0x34188E7E: F000 810B BEQ.W 46L11 ; 0x34189098
0x34188E82: 9804 LDR R0, [SP, #16]
0x34188E84: F640 4120 MOVW R1, #0x0C20
0x34188E88: F2C0 7103 MOVT R1, #0x0703
0x34188E8C: 4288 CMP R0, R1
0x34188E8E: F000 8103 BEQ.W 46L11 ; 0x34189098
0x34188E92: 9804 LDR R0, [SP, #16]
0x34188E94: F241 0120 MOVW R1, #0x1020
0x34188E98: F2C0 7103 MOVT R1, #0x0703
0x34188E9C: 4288 CMP R0, R1
0x34188E9E: F000 8138 BEQ.W 46L17 ; 0x34189112
0x34188EA2: 9804 LDR R0, [SP, #16]
0x34188EA4: F241 4120 MOVW R1, #0x1420
0x34188EA8: F2C0 7103 MOVT R1, #0x0703
0x34188EAC: 4288 CMP R0, R1
0x34188EAE: F000 8130 BEQ.W 46L17 ; 0x34189112
0x34188EB2: 9804 LDR R0, [SP, #16]
0x34188EB4: F641 0120 MOVW R1, #0x1820
0x34188EB8: F2C0 7103 MOVT R1, #0x0703
0x34188EBC: 4288 CMP R0, R1
0x34188EBE: F000 80EB BEQ.W 46L11 ; 0x34189098
0x34188EC2: 9804 LDR R0, [SP, #16]
0x34188EC4: F240 4120 MOVW R1, #0x0420
0x34188EC8: F2C0 7104 MOVT R1, #0x0704
0x34188ECC: 4288 CMP R0, R1
0x34188ECE: F000 816A BEQ.W 46L25 ; 0x341891A6
0x34188ED2: 9804 LDR R0, [SP, #16]
0x34188ED4: F640 0120 MOVW R1, #0x0820
0x34188ED8: F2C0 7104 MOVT R1, #0x0704
0x34188EDC: 4288 CMP R0, R1
0x34188EDE: F000 8162 BEQ.W 46L25 ; 0x341891A6
0x34188EE2: 9804 LDR R0, [SP, #16]
0x34188EE4: F640 4120 MOVW R1, #0x0C20
0x34188EE8: F2C0 7104 MOVT R1, #0x0704
0x34188EEC: 4288 CMP R0, R1
0x34188EEE: F000 815A BEQ.W 46L25 ; 0x341891A6
0x34188EF2: 9804 LDR R0, [SP, #16]
0x34188EF4: F241 0120 MOVW R1, #0x1020
0x34188EF8: F2C0 7104 MOVT R1, #0x0704
0x34188EFC: 4288 CMP R0, R1
0x34188EFE: F000 8152 BEQ.W 46L25 ; 0x341891A6
0x34188F02: 9804 LDR R0, [SP, #16]
0x34188F04: F241 4120 MOVW R1, #0x1420
0x34188F08: F2C0 7104 MOVT R1, #0x0704
0x34188F0C: 4288 CMP R0, R1
0x34188F0E: F000 814A BEQ.W 46L25 ; 0x341891A6
0x34188F12: 9804 LDR R0, [SP, #16]
0x34188F14: F641 0120 MOVW R1, #0x1820
0x34188F18: F2C0 7104 MOVT R1, #0x0704
0x34188F1C: 4288 CMP R0, R1
0x34188F1E: F000 8142 BEQ.W 46L25 ; 0x341891A6
0x34188F22: 9804 LDR R0, [SP, #16]
0x34188F24: F240 4120 MOVW R1, #0x0420
0x34188F28: F2C0 7105 MOVT R1, #0x0705
0x34188F2C: 4288 CMP R0, R1
0x34188F2E: F000 812D BEQ.W 46L23 ; 0x3418918C
0x34188F32: 9804 LDR R0, [SP, #16]
0x34188F34: F640 0120 MOVW R1, #0x0820
0x34188F38: F2C0 7105 MOVT R1, #0x0705
0x34188F3C: 4288 CMP R0, R1
0x34188F3E: F000 8125 BEQ.W 46L23 ; 0x3418918C
0x34188F42: 9804 LDR R0, [SP, #16]
0x34188F44: F640 4120 MOVW R1, #0x0C20
0x34188F48: F2C0 7105 MOVT R1, #0x0705
0x34188F4C: 4288 CMP R0, R1
0x34188F4E: F000 811D BEQ.W 46L23 ; 0x3418918C
0x34188F52: 9804 LDR R0, [SP, #16]
0x34188F54: F241 0120 MOVW R1, #0x1020
0x34188F58: F2C0 7105 MOVT R1, #0x0705
0x34188F5C: 4288 CMP R0, R1
0x34188F5E: F000 8115 BEQ.W 46L23 ; 0x3418918C
0x34188F62: 9804 LDR R0, [SP, #16]
0x34188F64: F241 4120 MOVW R1, #0x1420
0x34188F68: F2C0 7105 MOVT R1, #0x0705
0x34188F6C: 4288 CMP R0, R1
0x34188F6E: F000 810D BEQ.W 46L23 ; 0x3418918C
0x34188F72: 9804 LDR R0, [SP, #16]
0x34188F74: F641 0120 MOVW R1, #0x1820
0x34188F78: F2C0 7105 MOVT R1, #0x0705
0x34188F7C: 4288 CMP R0, R1
0x34188F7E: F000 8105 BEQ.W 46L23 ; 0x3418918C
0x34188F82: 9804 LDR R0, [SP, #16]
0x34188F84: F240 4120 MOVW R1, #0x0420
0x34188F88: F2C0 7106 MOVT R1, #0x0706
0x34188F8C: 4288 CMP R0, R1
0x34188F8E: F000 8113 BEQ.W 46L27 ; 0x341891B8
0x34188F92: 9804 LDR R0, [SP, #16]
0x34188F94: F640 0120 MOVW R1, #0x0820
0x34188F98: F2C0 7106 MOVT R1, #0x0706
0x34188F9C: 4288 CMP R0, R1
0x34188F9E: F000 810B BEQ.W 46L27 ; 0x341891B8
0x34188FA2: 9804 LDR R0, [SP, #16]
0x34188FA4: F640 4120 MOVW R1, #0x0C20
0x34188FA8: F2C0 7106 MOVT R1, #0x0706
0x34188FAC: 4288 CMP R0, R1
0x34188FAE: F000 8103 BEQ.W 46L27 ; 0x341891B8
0x34188FB2: 9804 LDR R0, [SP, #16]
0x34188FB4: F241 0120 MOVW R1, #0x1020
0x34188FB8: F2C0 7106 MOVT R1, #0x0706
0x34188FBC: 4288 CMP R0, R1
0x34188FBE: F000 8101 BEQ.W 46L28 ; 0x341891C4
0x34188FC2: 9804 LDR R0, [SP, #16]
0x34188FC4: F241 4120 MOVW R1, #0x1420
0x34188FC8: F2C0 7106 MOVT R1, #0x0706
0x34188FCC: 4288 CMP R0, R1
0x34188FCE: F000 80F9 BEQ.W 46L28 ; 0x341891C4
0x34188FD2: 9804 LDR R0, [SP, #16]
0x34188FD4: F641 0120 MOVW R1, #0x1820
0x34188FD8: F2C0 7106 MOVT R1, #0x0706
0x34188FDC: 4288 CMP R0, R1
0x34188FDE: F000 80EB BEQ.W 46L27 ; 0x341891B8
0x34188FE2: E0F8 B 46L30 ; 0x341891D6
.L1:
0x34188FE4: F006 F954 BL HAL_RCC_GetSysClockFreq ; 0x3418F290
0x34188FE8: F000 FE5A BL RCCEx_GetHCLKFreq ; 0x34189CA0
0x34188FEC: F001 F880 BL RCCEx_GetPCLK1Freq ; 0x3418A0F0
0x34188FF0: 9006 STR R0, [SP, #24]
0x34188FF2: E0F0 B 46L30 ; 0x341891D6
.L2:
0x34188FF4: F006 F94C BL HAL_RCC_GetSysClockFreq ; 0x3418F290
0x34188FF8: F000 FE52 BL RCCEx_GetHCLKFreq ; 0x34189CA0
0x34188FFC: F001 F886 BL RCCEx_GetPCLK2Freq ; 0x3418A10C
0x34189000: 9006 STR R0, [SP, #24]
0x34189002: E0E8 B 46L30 ; 0x341891D6
.L3:
0x34189004: F006 F944 BL HAL_RCC_GetSysClockFreq ; 0x3418F290
0x34189008: F000 FE4A BL RCCEx_GetHCLKFreq ; 0x34189CA0
0x3418900C: F001 F8BC BL RCCEx_GetPCLK4Freq ; 0x3418A188
0x34189010: 9006 STR R0, [SP, #24]
0x34189012: E0E0 B 46L30 ; 0x341891D6
.L4:
0x34189014: 2007 MOVS R0, #7
0x34189016: F7FE FFA1 BL RCCEx_GetCLKPCLKFreq ; 0x34187F5C
0x3418901A: 9006 STR R0, [SP, #24]
0x3418901C: E0DB B 46L30 ; 0x341891D6
.L5:
0x3418901E: F001 F8C1 BL LL_RCC_IC8_IsEnabled ; 0x3418A1A4
0x34189022: B3C0 CBZ R0, .L10 ; 0x34189096
0x34189024: F007 FDE8 BL LL_RCC_IC8_GetDivider ; 0x34190BF8
0x34189028: 9005 STR R0, [SP, #20]
0x3418902A: F001 F8C3 BL LL_RCC_IC8_GetSource ; 0x3418A1B4
0x3418902E: 4601 MOV R1, R0
0x34189030: 9103 STR R1, [SP, #12]
0x34189032: B160 CBZ R0, .L6 ; 0x3418904E
0x34189034: 9803 LDR R0, [SP, #12]
0x34189036: F1B0 5F80 CMP.W R0, #0x10000000
0x3418903A: D011 BEQ 46L7 ; 0x34189060
0x3418903C: 9803 LDR R0, [SP, #12]
0x3418903E: F1B0 5F00 CMP.W R0, #0x20000000
0x34189042: D016 BEQ 46L8 ; 0x34189072
0x34189044: 9803 LDR R0, [SP, #12]
0x34189046: F1B0 5F40 CMP.W R0, #0x30000000
0x3418904A: D01B BEQ 46L9 ; 0x34189084
0x3418904C: E023 B 46L10 ; 0x34189096
.L6:
0x3418904E: F007 FC9B BL HAL_RCCEx_GetPLL1CLKFreq ; 0x34190988
0x34189052: 9006 STR R0, [SP, #24]
0x34189054: 9806 LDR R0, [SP, #24]
0x34189056: 9905 LDR R1, [SP, #20]
0x34189058: FBB0 F0F1 UDIV R0, R0, R1
0x3418905C: 9006 STR R0, [SP, #24]
0x3418905E: E01A B 46L10 ; 0x34189096
.L7:
0x34189060: F007 FCD4 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34190A0C
0x34189064: 9006 STR R0, [SP, #24]
0x34189066: 9806 LDR R0, [SP, #24]
0x34189068: 9905 LDR R1, [SP, #20]
0x3418906A: FBB0 F0F1 UDIV R0, R0, R1
0x3418906E: 9006 STR R0, [SP, #24]
0x34189070: E011 B 46L10 ; 0x34189096
.L8:
0x34189072: F007 FD0D BL HAL_RCCEx_GetPLL3CLKFreq ; 0x34190A90
0x34189076: 9006 STR R0, [SP, #24]
0x34189078: 9806 LDR R0, [SP, #24]
0x3418907A: 9905 LDR R1, [SP, #20]
0x3418907C: FBB0 F0F1 UDIV R0, R0, R1
0x34189080: 9006 STR R0, [SP, #24]
0x34189082: E008 B 46L10 ; 0x34189096
.L9:
0x34189084: F007 FD46 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34190B14
0x34189088: 9006 STR R0, [SP, #24]
0x3418908A: 9806 LDR R0, [SP, #24]
0x3418908C: 9905 LDR R1, [SP, #20]
0x3418908E: FBB0 F0F1 UDIV R0, R0, R1
0x34189092: 9006 STR R0, [SP, #24]
0x34189094: E7FF B 46L10 ; 0x34189096
.L10:
0x34189096: E09E B 46L30 ; 0x341891D6
.L11:
0x34189098: F001 F846 BL LL_RCC_IC9_IsEnabled ; 0x3418A128
0x3418909C: B3C0 CBZ R0, .L16 ; 0x34189110
0x3418909E: F007 FD93 BL LL_RCC_IC9_GetDivider ; 0x34190BC8
0x341890A2: 9005 STR R0, [SP, #20]
0x341890A4: F001 F848 BL LL_RCC_IC9_GetSource ; 0x3418A138
0x341890A8: 4601 MOV R1, R0
0x341890AA: 9102 STR R1, [SP, #8]
0x341890AC: B160 CBZ R0, .L12 ; 0x341890C8
0x341890AE: 9802 LDR R0, [SP, #8]
0x341890B0: F1B0 5F80 CMP.W R0, #0x10000000
0x341890B4: D011 BEQ 46L13 ; 0x341890DA
0x341890B6: 9802 LDR R0, [SP, #8]
0x341890B8: F1B0 5F00 CMP.W R0, #0x20000000
0x341890BC: D016 BEQ 46L14 ; 0x341890EC
0x341890BE: 9802 LDR R0, [SP, #8]
0x341890C0: F1B0 5F40 CMP.W R0, #0x30000000
0x341890C4: D01B BEQ 46L15 ; 0x341890FE
0x341890C6: E023 B 46L16 ; 0x34189110
.L12:
0x341890C8: F007 FC5E BL HAL_RCCEx_GetPLL1CLKFreq ; 0x34190988
0x341890CC: 9006 STR R0, [SP, #24]
0x341890CE: 9806 LDR R0, [SP, #24]
0x341890D0: 9905 LDR R1, [SP, #20]
0x341890D2: FBB0 F0F1 UDIV R0, R0, R1
0x341890D6: 9006 STR R0, [SP, #24]
0x341890D8: E01A B 46L16 ; 0x34189110
.L13:
0x341890DA: F007 FC97 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34190A0C
0x341890DE: 9006 STR R0, [SP, #24]
0x341890E0: 9806 LDR R0, [SP, #24]
0x341890E2: 9905 LDR R1, [SP, #20]
0x341890E4: FBB0 F0F1 UDIV R0, R0, R1
0x341890E8: 9006 STR R0, [SP, #24]
0x341890EA: E011 B 46L16 ; 0x34189110
.L14:
0x341890EC: F007 FCD0 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x34190A90
0x341890F0: 9006 STR R0, [SP, #24]
0x341890F2: 9806 LDR R0, [SP, #24]
0x341890F4: 9905 LDR R1, [SP, #20]
0x341890F6: FBB0 F0F1 UDIV R0, R0, R1
0x341890FA: 9006 STR R0, [SP, #24]
0x341890FC: E008 B 46L16 ; 0x34189110
.L15:
0x341890FE: F007 FD09 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34190B14
0x34189102: 9006 STR R0, [SP, #24]
0x34189104: 9806 LDR R0, [SP, #24]
0x34189106: 9905 LDR R1, [SP, #20]
0x34189108: FBB0 F0F1 UDIV R0, R0, R1
0x3418910C: 9006 STR R0, [SP, #24]
0x3418910E: E7FF B 46L16 ; 0x34189110
.L16:
0x34189110: E061 B 46L30 ; 0x341891D6
.L17:
0x34189112: F001 F819 BL LL_RCC_IC14_IsEnabled ; 0x3418A148
0x34189116: B3C0 CBZ R0, .L22 ; 0x3418918A
0x34189118: F007 FD62 BL LL_RCC_IC14_GetDivider ; 0x34190BE0
0x3418911C: 9005 STR R0, [SP, #20]
0x3418911E: F001 F81B BL LL_RCC_IC14_GetSource ; 0x3418A158
0x34189122: 4601 MOV R1, R0
0x34189124: 9101 STR R1, [SP, #4]
0x34189126: B160 CBZ R0, .L18 ; 0x34189142
0x34189128: 9801 LDR R0, [SP, #4]
0x3418912A: F1B0 5F80 CMP.W R0, #0x10000000
0x3418912E: D011 BEQ 46L19 ; 0x34189154
0x34189130: 9801 LDR R0, [SP, #4]
0x34189132: F1B0 5F00 CMP.W R0, #0x20000000
0x34189136: D016 BEQ 46L20 ; 0x34189166
0x34189138: 9801 LDR R0, [SP, #4]
0x3418913A: F1B0 5F40 CMP.W R0, #0x30000000
0x3418913E: D01B BEQ 46L21 ; 0x34189178
0x34189140: E023 B 46L22 ; 0x3418918A
.L18:
0x34189142: F007 FC21 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x34190988
0x34189146: 9006 STR R0, [SP, #24]
0x34189148: 9806 LDR R0, [SP, #24]
0x3418914A: 9905 LDR R1, [SP, #20]
0x3418914C: FBB0 F0F1 UDIV R0, R0, R1
0x34189150: 9006 STR R0, [SP, #24]
0x34189152: E01A B 46L22 ; 0x3418918A
.L19:
0x34189154: F007 FC5A BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34190A0C
0x34189158: 9006 STR R0, [SP, #24]
0x3418915A: 9806 LDR R0, [SP, #24]
0x3418915C: 9905 LDR R1, [SP, #20]
0x3418915E: FBB0 F0F1 UDIV R0, R0, R1
0x34189162: 9006 STR R0, [SP, #24]
0x34189164: E011 B 46L22 ; 0x3418918A
.L20:
0x34189166: F007 FC93 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x34190A90
0x3418916A: 9006 STR R0, [SP, #24]
0x3418916C: 9806 LDR R0, [SP, #24]
0x3418916E: 9905 LDR R1, [SP, #20]
0x34189170: FBB0 F0F1 UDIV R0, R0, R1
0x34189174: 9006 STR R0, [SP, #24]
0x34189176: E008 B 46L22 ; 0x3418918A
.L21:
0x34189178: F007 FCCC BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34190B14
0x3418917C: 9006 STR R0, [SP, #24]
0x3418917E: 9806 LDR R0, [SP, #24]
0x34189180: 9905 LDR R1, [SP, #20]
0x34189182: FBB0 F0F1 UDIV R0, R0, R1
0x34189186: 9006 STR R0, [SP, #24]
0x34189188: E7FF B 46L22 ; 0x3418918A
.L22:
0x3418918A: E024 B 46L30 ; 0x341891D6
.L23:
0x3418918C: F000 FE88 BL LL_RCC_HSI_IsReady.74 ; 0x34189EA0
0x34189190: B140 CBZ R0, .L24 ; 0x341891A4
0x34189192: F000 FE8D BL LL_RCC_HSI_GetDivider.75 ; 0x34189EB0
0x34189196: 09C1 LSRS R1, R0, #7
0x34189198: F249 0000 MOVW R0, #0x9000
0x3418919C: F2C0 30D0 MOVT R0, #0x03D0
0x341891A0: 40C8 LSRS R0, R1
0x341891A2: 9006 STR R0, [SP, #24]
.L24:
0x341891A4: E017 B 46L30 ; 0x341891D6
.L25:
0x341891A6: F000 FE8B BL LL_RCC_MSI_IsReady.76 ; 0x34189EC0
0x341891AA: B120 CBZ R0, .L26 ; 0x341891B6
0x341891AC: F640 1000 MOVW R0, #0x0900
0x341891B0: F2C0 003D MOVT R0, #61
0x341891B4: 9006 STR R0, [SP, #24]
.L26:
0x341891B6: E00E B 46L30 ; 0x341891D6
.L27:
0x341891B8: F248 0000 MOVW R0, #0x8000
0x341891BC: F2C0 00BB MOVT R0, #187
0x341891C0: 9006 STR R0, [SP, #24]
0x341891C2: E008 B 46L30 ; 0x341891D6
.L28:
0x341891C4: F000 FE8C BL LL_RCC_HSE_IsReady.77 ; 0x34189EE0
0x341891C8: B120 CBZ R0, .L29 ; 0x341891D4
0x341891CA: F646 4000 MOVW R0, #0x6C00
0x341891CE: F2C0 20DC MOVT R0, #0x02DC
0x341891D2: 9006 STR R0, [SP, #24]
.L29:
0x341891D4: E7FF B 46L30 ; 0x341891D6
.L30:
0x341891D6: 9806 LDR R0, [SP, #24]
0x341891D8: B008 ADD SP, SP, #32
0x341891DA: BD80 POP 123R7, PC}
Section .text.RCCEx_GetUSARTCLKFreq from blto2_FSBL_lto.o, size=916, align=4
RCCEx_GetUSARTCLKFreq:
0x341891DC: B580 PUSH 123R7, LR}
0x341891DE: B086 SUB SP, SP, #24
0x341891E0: 9005 STR R0, [SP, #20]
0x341891E2: 2000 MOVS R0, #0
0x341891E4: 9004 STR R0, [SP, #16]
0x341891E6: 9805 LDR R0, [SP, #20]
0x341891E8: F7FE FDC6 BL LL_RCC_GetUSARTClockSource ; 0x34187D78
0x341891EC: 4601 MOV R1, R0
0x341891EE: 9102 STR R1, [SP, #8]
0x341891F0: 2130 MOVS R1, #48
0x341891F2: F2C0 7100 MOVT R1, #0x0700
0x341891F6: 4288 CMP R0, R1
0x341891F8: F000 810B BEQ.W 46L1 ; 0x34189412
0x341891FC: 9802 LDR R0, [SP, #8]
0x341891FE: F240 4130 MOVW R1, #0x0430
0x34189202: F2C0 7100 MOVT R1, #0x0700
0x34189206: 4288 CMP R0, R1
0x34189208: F000 810B BEQ.W 46L2 ; 0x34189422
0x3418920C: 9802 LDR R0, [SP, #8]
0x3418920E: F240 4134 MOVW R1, #0x0434
0x34189212: F2C0 7100 MOVT R1, #0x0700
0x34189216: 4288 CMP R0, R1
0x34189218: F000 80FB BEQ.W 46L1 ; 0x34189412
0x3418921C: 9802 LDR R0, [SP, #8]
0x3418921E: F640 0130 MOVW R1, #0x0830
0x34189222: F2C0 7100 MOVT R1, #0x0700
0x34189226: 4288 CMP R0, R1
0x34189228: F000 80FB BEQ.W 46L2 ; 0x34189422
0x3418922C: 9802 LDR R0, [SP, #8]
0x3418922E: F241 4130 MOVW R1, #0x1430
0x34189232: F2C0 7100 MOVT R1, #0x0700
0x34189236: 4288 CMP R0, R1
0x34189238: F000 80EB BEQ.W 46L1 ; 0x34189412
0x3418923C: 9802 LDR R0, [SP, #8]
0x3418923E: 2130 MOVS R1, #48
0x34189240: F2C0 7101 MOVT R1, #0x0701
0x34189244: 4288 CMP R0, R1
0x34189246: F000 80F4 BEQ.W 46L3 ; 0x34189432
0x3418924A: 9802 LDR R0, [SP, #8]
0x3418924C: F240 4130 MOVW R1, #0x0430
0x34189250: F2C0 7101 MOVT R1, #0x0701
0x34189254: 4288 CMP R0, R1
0x34189256: F000 80EC BEQ.W 46L3 ; 0x34189432
0x3418925A: 9802 LDR R0, [SP, #8]
0x3418925C: F240 4134 MOVW R1, #0x0434
0x34189260: F2C0 7101 MOVT R1, #0x0701
0x34189264: 4288 CMP R0, R1
0x34189266: F000 80E4 BEQ.W 46L3 ; 0x34189432
0x3418926A: 9802 LDR R0, [SP, #8]
0x3418926C: F640 0130 MOVW R1, #0x0830
0x34189270: F2C0 7101 MOVT R1, #0x0701
0x34189274: 4288 CMP R0, R1
0x34189276: F000 80DC BEQ.W 46L3 ; 0x34189432
0x3418927A: 9802 LDR R0, [SP, #8]
0x3418927C: F241 4130 MOVW R1, #0x1430
0x34189280: F2C0 7101 MOVT R1, #0x0701
0x34189284: 4288 CMP R0, R1
0x34189286: F000 80D4 BEQ.W 46L3 ; 0x34189432
0x3418928A: 9802 LDR R0, [SP, #8]
0x3418928C: 2130 MOVS R1, #48
0x3418928E: F2C0 7102 MOVT R1, #0x0702
0x34189292: 4288 CMP R0, R1
0x34189294: F000 80D2 BEQ.W 46L4 ; 0x3418943C
0x34189298: 9802 LDR R0, [SP, #8]
0x3418929A: F240 4130 MOVW R1, #0x0430
0x3418929E: F2C0 7102 MOVT R1, #0x0702
0x341892A2: 4288 CMP R0, R1
0x341892A4: F000 80CA BEQ.W 46L4 ; 0x3418943C
0x341892A8: 9802 LDR R0, [SP, #8]
0x341892AA: F240 4134 MOVW R1, #0x0434
0x341892AE: F2C0 7102 MOVT R1, #0x0702
0x341892B2: 4288 CMP R0, R1
0x341892B4: F000 80C2 BEQ.W 46L4 ; 0x3418943C
0x341892B8: 9802 LDR R0, [SP, #8]
0x341892BA: F640 0130 MOVW R1, #0x0830
0x341892BE: F2C0 7102 MOVT R1, #0x0702
0x341892C2: 4288 CMP R0, R1
0x341892C4: F000 80BA BEQ.W 46L4 ; 0x3418943C
0x341892C8: 9802 LDR R0, [SP, #8]
0x341892CA: F241 4130 MOVW R1, #0x1430
0x341892CE: F2C0 7102 MOVT R1, #0x0702
0x341892D2: 4288 CMP R0, R1
0x341892D4: F000 80B2 BEQ.W 46L4 ; 0x3418943C
0x341892D8: 9802 LDR R0, [SP, #8]
0x341892DA: 2130 MOVS R1, #48
0x341892DC: F2C0 7103 MOVT R1, #0x0703
0x341892E0: 4288 CMP R0, R1
0x341892E2: F000 80E8 BEQ.W 46L10 ; 0x341894B6
0x341892E6: 9802 LDR R0, [SP, #8]
0x341892E8: F240 4130 MOVW R1, #0x0430
0x341892EC: F2C0 7103 MOVT R1, #0x0703
0x341892F0: 4288 CMP R0, R1
0x341892F2: F000 80E0 BEQ.W 46L10 ; 0x341894B6
0x341892F6: 9802 LDR R0, [SP, #8]
0x341892F8: F240 4134 MOVW R1, #0x0434
0x341892FC: F2C0 7103 MOVT R1, #0x0703
0x34189300: 4288 CMP R0, R1
0x34189302: F000 80D8 BEQ.W 46L10 ; 0x341894B6
0x34189306: 9802 LDR R0, [SP, #8]
0x34189308: F640 0130 MOVW R1, #0x0830
0x3418930C: F2C0 7103 MOVT R1, #0x0703
0x34189310: 4288 CMP R0, R1
0x34189312: F000 80D0 BEQ.W 46L10 ; 0x341894B6
0x34189316: 9802 LDR R0, [SP, #8]
0x34189318: F241 4130 MOVW R1, #0x1430
0x3418931C: F2C0 7103 MOVT R1, #0x0703
0x34189320: 4288 CMP R0, R1
0x34189322: F000 80C8 BEQ.W 46L10 ; 0x341894B6
0x34189326: 9802 LDR R0, [SP, #8]
0x34189328: 2130 MOVS R1, #48
0x3418932A: F2C0 7104 MOVT R1, #0x0704
0x3418932E: 4288 CMP R0, R1
0x34189330: F000 8114 BEQ.W 46L20 ; 0x3418955C
0x34189334: 9802 LDR R0, [SP, #8]
0x34189336: F240 4130 MOVW R1, #0x0430
0x3418933A: F2C0 7104 MOVT R1, #0x0704
0x3418933E: 4288 CMP R0, R1
0x34189340: F000 810C BEQ.W 46L20 ; 0x3418955C
0x34189344: 9802 LDR R0, [SP, #8]
0x34189346: F240 4134 MOVW R1, #0x0434
0x3418934A: F2C0 7104 MOVT R1, #0x0704
0x3418934E: 4288 CMP R0, R1
0x34189350: F000 8104 BEQ.W 46L20 ; 0x3418955C
0x34189354: 9802 LDR R0, [SP, #8]
0x34189356: F640 0130 MOVW R1, #0x0830
0x3418935A: F2C0 7104 MOVT R1, #0x0704
0x3418935E: 4288 CMP R0, R1
0x34189360: F000 80FC BEQ.W 46L20 ; 0x3418955C
0x34189364: 9802 LDR R0, [SP, #8]
0x34189366: F241 4130 MOVW R1, #0x1430
0x3418936A: F2C0 7104 MOVT R1, #0x0704
0x3418936E: 4288 CMP R0, R1
0x34189370: F000 80F4 BEQ.W 46L20 ; 0x3418955C
0x34189374: 9802 LDR R0, [SP, #8]
0x34189376: 2130 MOVS R1, #48
0x34189378: F2C0 7105 MOVT R1, #0x0705
0x3418937C: 4288 CMP R0, R1
0x3418937E: F000 80E4 BEQ.W 46L18 ; 0x3418954A
0x34189382: 9802 LDR R0, [SP, #8]
0x34189384: F240 4130 MOVW R1, #0x0430
0x34189388: F2C0 7105 MOVT R1, #0x0705
0x3418938C: 4288 CMP R0, R1
0x3418938E: F000 80DC BEQ.W 46L18 ; 0x3418954A
0x34189392: 9802 LDR R0, [SP, #8]
0x34189394: F240 4134 MOVW R1, #0x0434
0x34189398: F2C0 7105 MOVT R1, #0x0705
0x3418939C: 4288 CMP R0, R1
0x3418939E: F000 80D4 BEQ.W 46L18 ; 0x3418954A
0x341893A2: 9802 LDR R0, [SP, #8]
0x341893A4: F640 0130 MOVW R1, #0x0830
0x341893A8: F2C0 7105 MOVT R1, #0x0705
0x341893AC: 4288 CMP R0, R1
0x341893AE: F000 80CC BEQ.W 46L18 ; 0x3418954A
0x341893B2: 9802 LDR R0, [SP, #8]
0x341893B4: F241 4130 MOVW R1, #0x1430
0x341893B8: F2C0 7105 MOVT R1, #0x0705
0x341893BC: 4288 CMP R0, R1
0x341893BE: F000 80C4 BEQ.W 46L18 ; 0x3418954A
0x341893C2: 9802 LDR R0, [SP, #8]
0x341893C4: 2130 MOVS R1, #48
0x341893C6: F2C0 7106 MOVT R1, #0x0706
0x341893CA: 4288 CMP R0, R1
0x341893CC: F000 80B0 BEQ.W 46L16 ; 0x34189530
0x341893D0: 9802 LDR R0, [SP, #8]
0x341893D2: F240 4130 MOVW R1, #0x0430
0x341893D6: F2C0 7106 MOVT R1, #0x0706
0x341893DA: 4288 CMP R0, R1
0x341893DC: F000 80A8 BEQ.W 46L16 ; 0x34189530
0x341893E0: 9802 LDR R0, [SP, #8]
0x341893E2: F240 4134 MOVW R1, #0x0434
0x341893E6: F2C0 7106 MOVT R1, #0x0706
0x341893EA: 4288 CMP R0, R1
0x341893EC: F000 80A0 BEQ.W 46L16 ; 0x34189530
0x341893F0: 9802 LDR R0, [SP, #8]
0x341893F2: F640 0130 MOVW R1, #0x0830
0x341893F6: F2C0 7106 MOVT R1, #0x0706
0x341893FA: 4288 CMP R0, R1
0x341893FC: F000 8098 BEQ.W 46L16 ; 0x34189530
0x34189400: 9802 LDR R0, [SP, #8]
0x34189402: F241 4130 MOVW R1, #0x1430
0x34189406: F2C0 7106 MOVT R1, #0x0706
0x3418940A: 4288 CMP R0, R1
0x3418940C: F000 8090 BEQ.W 46L16 ; 0x34189530
0x34189410: E0AB B 46L22 ; 0x3418956A
.L1:
0x34189412: F005 FF3D BL HAL_RCC_GetSysClockFreq ; 0x3418F290
0x34189416: F000 FC43 BL RCCEx_GetHCLKFreq ; 0x34189CA0
0x3418941A: F000 FE77 BL RCCEx_GetPCLK2Freq ; 0x3418A10C
0x3418941E: 9004 STR R0, [SP, #16]
0x34189420: E0A3 B 46L22 ; 0x3418956A
.L2:
0x34189422: F005 FF35 BL HAL_RCC_GetSysClockFreq ; 0x3418F290
0x34189426: F000 FC3B BL RCCEx_GetHCLKFreq ; 0x34189CA0
0x3418942A: F000 FE61 BL RCCEx_GetPCLK1Freq ; 0x3418A0F0
0x3418942E: 9004 STR R0, [SP, #16]
0x34189430: E09B B 46L22 ; 0x3418956A
.L3:
0x34189432: 2007 MOVS R0, #7
0x34189434: F7FE FD92 BL RCCEx_GetCLKPCLKFreq ; 0x34187F5C
0x34189438: 9004 STR R0, [SP, #16]
0x3418943A: E096 B 46L22 ; 0x3418956A
.L4:
0x3418943C: F000 FE74 BL LL_RCC_IC9_IsEnabled ; 0x3418A128
0x34189440: B3C0 CBZ R0, .L9 ; 0x341894B4
0x34189442: F007 FBC1 BL LL_RCC_IC9_GetDivider ; 0x34190BC8
0x34189446: 9003 STR R0, [SP, #12]
0x34189448: F000 FE76 BL LL_RCC_IC9_GetSource ; 0x3418A138
0x3418944C: 4601 MOV R1, R0
0x3418944E: 9101 STR R1, [SP, #4]
0x34189450: B160 CBZ R0, .L5 ; 0x3418946C
0x34189452: 9801 LDR R0, [SP, #4]
0x34189454: F1B0 5F80 CMP.W R0, #0x10000000
0x34189458: D011 BEQ 46L6 ; 0x3418947E
0x3418945A: 9801 LDR R0, [SP, #4]
0x3418945C: F1B0 5F00 CMP.W R0, #0x20000000
0x34189460: D016 BEQ 46L7 ; 0x34189490
0x34189462: 9801 LDR R0, [SP, #4]
0x34189464: F1B0 5F40 CMP.W R0, #0x30000000
0x34189468: D01B BEQ 46L8 ; 0x341894A2
0x3418946A: E023 B 46L9 ; 0x341894B4
.L5:
0x3418946C: F007 FA8C BL HAL_RCCEx_GetPLL1CLKFreq ; 0x34190988
0x34189470: 9004 STR R0, [SP, #16]
0x34189472: 9804 LDR R0, [SP, #16]
0x34189474: 9903 LDR R1, [SP, #12]
0x34189476: FBB0 F0F1 UDIV R0, R0, R1
0x3418947A: 9004 STR R0, [SP, #16]
0x3418947C: E01A B 46L9 ; 0x341894B4
.L6:
0x3418947E: F007 FAC5 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34190A0C
0x34189482: 9004 STR R0, [SP, #16]
0x34189484: 9804 LDR R0, [SP, #16]
0x34189486: 9903 LDR R1, [SP, #12]
0x34189488: FBB0 F0F1 UDIV R0, R0, R1
0x3418948C: 9004 STR R0, [SP, #16]
0x3418948E: E011 B 46L9 ; 0x341894B4
.L7:
0x34189490: F007 FAFE BL HAL_RCCEx_GetPLL3CLKFreq ; 0x34190A90
0x34189494: 9004 STR R0, [SP, #16]
0x34189496: 9804 LDR R0, [SP, #16]
0x34189498: 9903 LDR R1, [SP, #12]
0x3418949A: FBB0 F0F1 UDIV R0, R0, R1
0x3418949E: 9004 STR R0, [SP, #16]
0x341894A0: E008 B 46L9 ; 0x341894B4
.L8:
0x341894A2: F007 FB37 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34190B14
0x341894A6: 9004 STR R0, [SP, #16]
0x341894A8: 9804 LDR R0, [SP, #16]
0x341894AA: 9903 LDR R1, [SP, #12]
0x341894AC: FBB0 F0F1 UDIV R0, R0, R1
0x341894B0: 9004 STR R0, [SP, #16]
0x341894B2: E7FF B 46L9 ; 0x341894B4
.L9:
0x341894B4: E059 B 46L22 ; 0x3418956A
.L10:
0x341894B6: F000 FE47 BL LL_RCC_IC14_IsEnabled ; 0x3418A148
0x341894BA: B3C0 CBZ R0, .L15 ; 0x3418952E
0x341894BC: F007 FB90 BL LL_RCC_IC14_GetDivider ; 0x34190BE0
0x341894C0: 9003 STR R0, [SP, #12]
0x341894C2: F000 FE49 BL LL_RCC_IC14_GetSource ; 0x3418A158
0x341894C6: 4601 MOV R1, R0
0x341894C8: 9100 STR R1, [SP, #0]
0x341894CA: B160 CBZ R0, .L11 ; 0x341894E6
0x341894CC: 9800 LDR R0, [SP, #0]
0x341894CE: F1B0 5F80 CMP.W R0, #0x10000000
0x341894D2: D011 BEQ 46L12 ; 0x341894F8
0x341894D4: 9800 LDR R0, [SP, #0]
0x341894D6: F1B0 5F00 CMP.W R0, #0x20000000
0x341894DA: D016 BEQ 46L13 ; 0x3418950A
0x341894DC: 9800 LDR R0, [SP, #0]
0x341894DE: F1B0 5F40 CMP.W R0, #0x30000000
0x341894E2: D01B BEQ 46L14 ; 0x3418951C
0x341894E4: E023 B 46L15 ; 0x3418952E
.L11:
0x341894E6: F007 FA4F BL HAL_RCCEx_GetPLL1CLKFreq ; 0x34190988
0x341894EA: 9004 STR R0, [SP, #16]
0x341894EC: 9804 LDR R0, [SP, #16]
0x341894EE: 9903 LDR R1, [SP, #12]
0x341894F0: FBB0 F0F1 UDIV R0, R0, R1
0x341894F4: 9004 STR R0, [SP, #16]
0x341894F6: E01A B 46L15 ; 0x3418952E
.L12:
0x341894F8: F007 FA88 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34190A0C
0x341894FC: 9004 STR R0, [SP, #16]
0x341894FE: 9804 LDR R0, [SP, #16]
0x34189500: 9903 LDR R1, [SP, #12]
0x34189502: FBB0 F0F1 UDIV R0, R0, R1
0x34189506: 9004 STR R0, [SP, #16]
0x34189508: E011 B 46L15 ; 0x3418952E
.L13:
0x3418950A: F007 FAC1 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x34190A90
0x3418950E: 9004 STR R0, [SP, #16]
0x34189510: 9804 LDR R0, [SP, #16]
0x34189512: 9903 LDR R1, [SP, #12]
0x34189514: FBB0 F0F1 UDIV R0, R0, R1
0x34189518: 9004 STR R0, [SP, #16]
0x3418951A: E008 B 46L15 ; 0x3418952E
.L14:
0x3418951C: F007 FAFA BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34190B14
0x34189520: 9004 STR R0, [SP, #16]
0x34189522: 9804 LDR R0, [SP, #16]
0x34189524: 9903 LDR R1, [SP, #12]
0x34189526: FBB0 F0F1 UDIV R0, R0, R1
0x3418952A: 9004 STR R0, [SP, #16]
0x3418952C: E7FF B 46L15 ; 0x3418952E
.L15:
0x3418952E: E01C B 46L22 ; 0x3418956A
.L16:
0x34189530: F000 FCB6 BL LL_RCC_HSI_IsReady.74 ; 0x34189EA0
0x34189534: B140 CBZ R0, .L17 ; 0x34189548
0x34189536: F000 FCBB BL LL_RCC_HSI_GetDivider.75 ; 0x34189EB0
0x3418953A: 09C1 LSRS R1, R0, #7
0x3418953C: F249 0000 MOVW R0, #0x9000
0x34189540: F2C0 30D0 MOVT R0, #0x03D0
0x34189544: 40C8 LSRS R0, R1
0x34189546: 9004 STR R0, [SP, #16]
.L17:
0x34189548: E00F B 46L22 ; 0x3418956A
.L18:
0x3418954A: F000 FCB9 BL LL_RCC_MSI_IsReady.76 ; 0x34189EC0
0x3418954E: B120 CBZ R0, .L19 ; 0x3418955A
0x34189550: F640 1000 MOVW R0, #0x0900
0x34189554: F2C0 003D MOVT R0, #61
0x34189558: 9004 STR R0, [SP, #16]
.L19:
0x3418955A: E006 B 46L22 ; 0x3418956A
.L20:
0x3418955C: F7FE FA1A BL LL_RCC_LSE_IsReady.56 ; 0x34187994
0x34189560: B110 CBZ R0, .L21 ; 0x34189568
0x34189562: F44F 4000 MOV.W R0, #0x8000
0x34189566: 9004 STR R0, [SP, #16]
.L21:
0x34189568: E7FF B 46L22 ; 0x3418956A
.L22:
0x3418956A: 9804 LDR R0, [SP, #16]
0x3418956C: B006 ADD SP, SP, #24
0x3418956E: BD80 POP 123R7, PC}
Section .text.RCCEx_GetUARTCLKFreq from blto2_FSBL_lto.o, size=916, align=4
RCCEx_GetUARTCLKFreq:
0x34189570: B580 PUSH 123R7, LR}
0x34189572: B086 SUB SP, SP, #24
0x34189574: 9005 STR R0, [SP, #20]
0x34189576: 2000 MOVS R0, #0
0x34189578: 9004 STR R0, [SP, #16]
0x3418957A: 9805 LDR R0, [SP, #20]
0x3418957C: F000 FDB0 BL LL_RCC_GetUARTClockSource ; 0x3418A0E0
0x34189580: 4601 MOV R1, R0
0x34189582: 9102 STR R1, [SP, #8]
0x34189584: 2134 MOVS R1, #52
0x34189586: F2C0 7100 MOVT R1, #0x0700
0x3418958A: 4288 CMP R0, R1
0x3418958C: F000 8113 BEQ.W 46L2 ; 0x341897B6
0x34189590: 9802 LDR R0, [SP, #8]
0x34189592: F640 4130 MOVW R1, #0x0C30
0x34189596: F2C0 7100 MOVT R1, #0x0700
0x3418959A: 4288 CMP R0, R1
0x3418959C: F000 8103 BEQ.W 46L1 ; 0x341897A6
0x341895A0: 9802 LDR R0, [SP, #8]
0x341895A2: F241 0130 MOVW R1, #0x1030
0x341895A6: F2C0 7100 MOVT R1, #0x0700
0x341895AA: 4288 CMP R0, R1
0x341895AC: F000 80FB BEQ.W 46L1 ; 0x341897A6
0x341895B0: 9802 LDR R0, [SP, #8]
0x341895B2: F641 0130 MOVW R1, #0x1830
0x341895B6: F2C0 7100 MOVT R1, #0x0700
0x341895BA: 4288 CMP R0, R1
0x341895BC: F000 80F3 BEQ.W 46L1 ; 0x341897A6
0x341895C0: 9802 LDR R0, [SP, #8]
0x341895C2: F641 4130 MOVW R1, #0x1C30
0x341895C6: F2C0 7100 MOVT R1, #0x0700
0x341895CA: 4288 CMP R0, R1
0x341895CC: F000 80EB BEQ.W 46L1 ; 0x341897A6
0x341895D0: 9802 LDR R0, [SP, #8]
0x341895D2: 2134 MOVS R1, #52
0x341895D4: F2C0 7101 MOVT R1, #0x0701
0x341895D8: 4288 CMP R0, R1
0x341895DA: F000 80F4 BEQ.W 46L3 ; 0x341897C6
0x341895DE: 9802 LDR R0, [SP, #8]
0x341895E0: F640 4130 MOVW R1, #0x0C30
0x341895E4: F2C0 7101 MOVT R1, #0x0701
0x341895E8: 4288 CMP R0, R1
0x341895EA: F000 80EC BEQ.W 46L3 ; 0x341897C6
0x341895EE: 9802 LDR R0, [SP, #8]
0x341895F0: F241 0130 MOVW R1, #0x1030
0x341895F4: F2C0 7101 MOVT R1, #0x0701
0x341895F8: 4288 CMP R0, R1
0x341895FA: F000 80E4 BEQ.W 46L3 ; 0x341897C6
0x341895FE: 9802 LDR R0, [SP, #8]
0x34189600: F641 0130 MOVW R1, #0x1830
0x34189604: F2C0 7101 MOVT R1, #0x0701
0x34189608: 4288 CMP R0, R1
0x3418960A: F000 80DC BEQ.W 46L3 ; 0x341897C6
0x3418960E: 9802 LDR R0, [SP, #8]
0x34189610: F641 4130 MOVW R1, #0x1C30
0x34189614: F2C0 7101 MOVT R1, #0x0701
0x34189618: 4288 CMP R0, R1
0x3418961A: F000 80D4 BEQ.W 46L3 ; 0x341897C6
0x3418961E: 9802 LDR R0, [SP, #8]
0x34189620: 2134 MOVS R1, #52
0x34189622: F2C0 7102 MOVT R1, #0x0702
0x34189626: 4288 CMP R0, R1
0x34189628: F000 80D2 BEQ.W 46L4 ; 0x341897D0
0x3418962C: 9802 LDR R0, [SP, #8]
0x3418962E: F640 4130 MOVW R1, #0x0C30
0x34189632: F2C0 7102 MOVT R1, #0x0702
0x34189636: 4288 CMP R0, R1
0x34189638: F000 80CA BEQ.W 46L4 ; 0x341897D0
0x3418963C: 9802 LDR R0, [SP, #8]
0x3418963E: F241 0130 MOVW R1, #0x1030
0x34189642: F2C0 7102 MOVT R1, #0x0702
0x34189646: 4288 CMP R0, R1
0x34189648: F000 80C2 BEQ.W 46L4 ; 0x341897D0
0x3418964C: 9802 LDR R0, [SP, #8]
0x3418964E: F641 0130 MOVW R1, #0x1830
0x34189652: F2C0 7102 MOVT R1, #0x0702
0x34189656: 4288 CMP R0, R1
0x34189658: F000 80BA BEQ.W 46L4 ; 0x341897D0
0x3418965C: 9802 LDR R0, [SP, #8]
0x3418965E: F641 4130 MOVW R1, #0x1C30
0x34189662: F2C0 7102 MOVT R1, #0x0702
0x34189666: 4288 CMP R0, R1
0x34189668: F000 80B2 BEQ.W 46L4 ; 0x341897D0
0x3418966C: 9802 LDR R0, [SP, #8]
0x3418966E: 2134 MOVS R1, #52
0x34189670: F2C0 7103 MOVT R1, #0x0703
0x34189674: 4288 CMP R0, R1
0x34189676: F000 80E8 BEQ.W 46L10 ; 0x3418984A
0x3418967A: 9802 LDR R0, [SP, #8]
0x3418967C: F640 4130 MOVW R1, #0x0C30
0x34189680: F2C0 7103 MOVT R1, #0x0703
0x34189684: 4288 CMP R0, R1
0x34189686: F000 80E0 BEQ.W 46L10 ; 0x3418984A
0x3418968A: 9802 LDR R0, [SP, #8]
0x3418968C: F241 0130 MOVW R1, #0x1030
0x34189690: F2C0 7103 MOVT R1, #0x0703
0x34189694: 4288 CMP R0, R1
0x34189696: F000 80D8 BEQ.W 46L10 ; 0x3418984A
0x3418969A: 9802 LDR R0, [SP, #8]
0x3418969C: F641 0130 MOVW R1, #0x1830
0x341896A0: F2C0 7103 MOVT R1, #0x0703
0x341896A4: 4288 CMP R0, R1
0x341896A6: F000 80D0 BEQ.W 46L10 ; 0x3418984A
0x341896AA: 9802 LDR R0, [SP, #8]
0x341896AC: F641 4130 MOVW R1, #0x1C30
0x341896B0: F2C0 7103 MOVT R1, #0x0703
0x341896B4: 4288 CMP R0, R1
0x341896B6: F000 80C8 BEQ.W 46L10 ; 0x3418984A
0x341896BA: 9802 LDR R0, [SP, #8]
0x341896BC: 2134 MOVS R1, #52
0x341896BE: F2C0 7104 MOVT R1, #0x0704
0x341896C2: 4288 CMP R0, R1
0x341896C4: F000 8114 BEQ.W 46L20 ; 0x341898F0
0x341896C8: 9802 LDR R0, [SP, #8]
0x341896CA: F640 4130 MOVW R1, #0x0C30
0x341896CE: F2C0 7104 MOVT R1, #0x0704
0x341896D2: 4288 CMP R0, R1
0x341896D4: F000 810C BEQ.W 46L20 ; 0x341898F0
0x341896D8: 9802 LDR R0, [SP, #8]
0x341896DA: F241 0130 MOVW R1, #0x1030
0x341896DE: F2C0 7104 MOVT R1, #0x0704
0x341896E2: 4288 CMP R0, R1
0x341896E4: F000 8104 BEQ.W 46L20 ; 0x341898F0
0x341896E8: 9802 LDR R0, [SP, #8]
0x341896EA: F641 0130 MOVW R1, #0x1830
0x341896EE: F2C0 7104 MOVT R1, #0x0704
0x341896F2: 4288 CMP R0, R1
0x341896F4: F000 80FC BEQ.W 46L20 ; 0x341898F0
0x341896F8: 9802 LDR R0, [SP, #8]
0x341896FA: F641 4130 MOVW R1, #0x1C30
0x341896FE: F2C0 7104 MOVT R1, #0x0704
0x34189702: 4288 CMP R0, R1
0x34189704: F000 80F4 BEQ.W 46L20 ; 0x341898F0
0x34189708: 9802 LDR R0, [SP, #8]
0x3418970A: 2134 MOVS R1, #52
0x3418970C: F2C0 7105 MOVT R1, #0x0705
0x34189710: 4288 CMP R0, R1
0x34189712: F000 80E4 BEQ.W 46L18 ; 0x341898DE
0x34189716: 9802 LDR R0, [SP, #8]
0x34189718: F640 4130 MOVW R1, #0x0C30
0x3418971C: F2C0 7105 MOVT R1, #0x0705
0x34189720: 4288 CMP R0, R1
0x34189722: F000 80DC BEQ.W 46L18 ; 0x341898DE
0x34189726: 9802 LDR R0, [SP, #8]
0x34189728: F241 0130 MOVW R1, #0x1030
0x3418972C: F2C0 7105 MOVT R1, #0x0705
0x34189730: 4288 CMP R0, R1
0x34189732: F000 80D4 BEQ.W 46L18 ; 0x341898DE
0x34189736: 9802 LDR R0, [SP, #8]
0x34189738: F641 0130 MOVW R1, #0x1830
0x3418973C: F2C0 7105 MOVT R1, #0x0705
0x34189740: 4288 CMP R0, R1
0x34189742: F000 80CC BEQ.W 46L18 ; 0x341898DE
0x34189746: 9802 LDR R0, [SP, #8]
0x34189748: F641 4130 MOVW R1, #0x1C30
0x3418974C: F2C0 7105 MOVT R1, #0x0705
0x34189750: 4288 CMP R0, R1
0x34189752: F000 80C4 BEQ.W 46L18 ; 0x341898DE
0x34189756: 9802 LDR R0, [SP, #8]
0x34189758: 2134 MOVS R1, #52
0x3418975A: F2C0 7106 MOVT R1, #0x0706
0x3418975E: 4288 CMP R0, R1
0x34189760: F000 80B0 BEQ.W 46L16 ; 0x341898C4
0x34189764: 9802 LDR R0, [SP, #8]
0x34189766: F640 4130 MOVW R1, #0x0C30
0x3418976A: F2C0 7106 MOVT R1, #0x0706
0x3418976E: 4288 CMP R0, R1
0x34189770: F000 80A8 BEQ.W 46L16 ; 0x341898C4
0x34189774: 9802 LDR R0, [SP, #8]
0x34189776: F241 0130 MOVW R1, #0x1030
0x3418977A: F2C0 7106 MOVT R1, #0x0706
0x3418977E: 4288 CMP R0, R1
0x34189780: F000 80A0 BEQ.W 46L16 ; 0x341898C4
0x34189784: 9802 LDR R0, [SP, #8]
0x34189786: F641 0130 MOVW R1, #0x1830
0x3418978A: F2C0 7106 MOVT R1, #0x0706
0x3418978E: 4288 CMP R0, R1
0x34189790: F000 8098 BEQ.W 46L16 ; 0x341898C4
0x34189794: 9802 LDR R0, [SP, #8]
0x34189796: F641 4130 MOVW R1, #0x1C30
0x3418979A: F2C0 7106 MOVT R1, #0x0706
0x3418979E: 4288 CMP R0, R1
0x341897A0: F000 8090 BEQ.W 46L16 ; 0x341898C4
0x341897A4: E0AB B 46L22 ; 0x341898FE
.L1:
0x341897A6: F005 FD73 BL HAL_RCC_GetSysClockFreq ; 0x3418F290
0x341897AA: F000 FA79 BL RCCEx_GetHCLKFreq ; 0x34189CA0
0x341897AE: F000 FC9F BL RCCEx_GetPCLK1Freq ; 0x3418A0F0
0x341897B2: 9004 STR R0, [SP, #16]
0x341897B4: E0A3 B 46L22 ; 0x341898FE
.L2:
0x341897B6: F005 FD6B BL HAL_RCC_GetSysClockFreq ; 0x3418F290
0x341897BA: F000 FA71 BL RCCEx_GetHCLKFreq ; 0x34189CA0
0x341897BE: F000 FCA5 BL RCCEx_GetPCLK2Freq ; 0x3418A10C
0x341897C2: 9004 STR R0, [SP, #16]
0x341897C4: E09B B 46L22 ; 0x341898FE
.L3:
0x341897C6: 2007 MOVS R0, #7
0x341897C8: F7FE FBC8 BL RCCEx_GetCLKPCLKFreq ; 0x34187F5C
0x341897CC: 9004 STR R0, [SP, #16]
0x341897CE: E096 B 46L22 ; 0x341898FE
.L4:
0x341897D0: F000 FCAA BL LL_RCC_IC9_IsEnabled ; 0x3418A128
0x341897D4: B3C0 CBZ R0, .L9 ; 0x34189848
0x341897D6: F007 F9F7 BL LL_RCC_IC9_GetDivider ; 0x34190BC8
0x341897DA: 9003 STR R0, [SP, #12]
0x341897DC: F000 FCAC BL LL_RCC_IC9_GetSource ; 0x3418A138
0x341897E0: 4601 MOV R1, R0
0x341897E2: 9101 STR R1, [SP, #4]
0x341897E4: B160 CBZ R0, .L5 ; 0x34189800
0x341897E6: 9801 LDR R0, [SP, #4]
0x341897E8: F1B0 5F80 CMP.W R0, #0x10000000
0x341897EC: D011 BEQ 46L6 ; 0x34189812
0x341897EE: 9801 LDR R0, [SP, #4]
0x341897F0: F1B0 5F00 CMP.W R0, #0x20000000
0x341897F4: D016 BEQ 46L7 ; 0x34189824
0x341897F6: 9801 LDR R0, [SP, #4]
0x341897F8: F1B0 5F40 CMP.W R0, #0x30000000
0x341897FC: D01B BEQ 46L8 ; 0x34189836
0x341897FE: E023 B 46L9 ; 0x34189848
.L5:
0x34189800: F007 F8C2 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x34190988
0x34189804: 9004 STR R0, [SP, #16]
0x34189806: 9804 LDR R0, [SP, #16]
0x34189808: 9903 LDR R1, [SP, #12]
0x3418980A: FBB0 F0F1 UDIV R0, R0, R1
0x3418980E: 9004 STR R0, [SP, #16]
0x34189810: E01A B 46L9 ; 0x34189848
.L6:
0x34189812: F007 F8FB BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34190A0C
0x34189816: 9004 STR R0, [SP, #16]
0x34189818: 9804 LDR R0, [SP, #16]
0x3418981A: 9903 LDR R1, [SP, #12]
0x3418981C: FBB0 F0F1 UDIV R0, R0, R1
0x34189820: 9004 STR R0, [SP, #16]
0x34189822: E011 B 46L9 ; 0x34189848
.L7:
0x34189824: F007 F934 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x34190A90
0x34189828: 9004 STR R0, [SP, #16]
0x3418982A: 9804 LDR R0, [SP, #16]
0x3418982C: 9903 LDR R1, [SP, #12]
0x3418982E: FBB0 F0F1 UDIV R0, R0, R1
0x34189832: 9004 STR R0, [SP, #16]
0x34189834: E008 B 46L9 ; 0x34189848
.L8:
0x34189836: F007 F96D BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34190B14
0x3418983A: 9004 STR R0, [SP, #16]
0x3418983C: 9804 LDR R0, [SP, #16]
0x3418983E: 9903 LDR R1, [SP, #12]
0x34189840: FBB0 F0F1 UDIV R0, R0, R1
0x34189844: 9004 STR R0, [SP, #16]
0x34189846: E7FF B 46L9 ; 0x34189848
.L9:
0x34189848: E059 B 46L22 ; 0x341898FE
.L10:
0x3418984A: F000 FC7D BL LL_RCC_IC14_IsEnabled ; 0x3418A148
0x3418984E: B3C0 CBZ R0, .L15 ; 0x341898C2
0x34189850: F007 F9C6 BL LL_RCC_IC14_GetDivider ; 0x34190BE0
0x34189854: 9003 STR R0, [SP, #12]
0x34189856: F000 FC7F BL LL_RCC_IC14_GetSource ; 0x3418A158
0x3418985A: 4601 MOV R1, R0
0x3418985C: 9100 STR R1, [SP, #0]
0x3418985E: B160 CBZ R0, .L11 ; 0x3418987A
0x34189860: 9800 LDR R0, [SP, #0]
0x34189862: F1B0 5F80 CMP.W R0, #0x10000000
0x34189866: D011 BEQ 46L12 ; 0x3418988C
0x34189868: 9800 LDR R0, [SP, #0]
0x3418986A: F1B0 5F00 CMP.W R0, #0x20000000
0x3418986E: D016 BEQ 46L13 ; 0x3418989E
0x34189870: 9800 LDR R0, [SP, #0]
0x34189872: F1B0 5F40 CMP.W R0, #0x30000000
0x34189876: D01B BEQ 46L14 ; 0x341898B0
0x34189878: E023 B 46L15 ; 0x341898C2
.L11:
0x3418987A: F007 F885 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x34190988
0x3418987E: 9004 STR R0, [SP, #16]
0x34189880: 9804 LDR R0, [SP, #16]
0x34189882: 9903 LDR R1, [SP, #12]
0x34189884: FBB0 F0F1 UDIV R0, R0, R1
0x34189888: 9004 STR R0, [SP, #16]
0x3418988A: E01A B 46L15 ; 0x341898C2
.L12:
0x3418988C: F007 F8BE BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34190A0C
0x34189890: 9004 STR R0, [SP, #16]
0x34189892: 9804 LDR R0, [SP, #16]
0x34189894: 9903 LDR R1, [SP, #12]
0x34189896: FBB0 F0F1 UDIV R0, R0, R1
0x3418989A: 9004 STR R0, [SP, #16]
0x3418989C: E011 B 46L15 ; 0x341898C2
.L13:
0x3418989E: F007 F8F7 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x34190A90
0x341898A2: 9004 STR R0, [SP, #16]
0x341898A4: 9804 LDR R0, [SP, #16]
0x341898A6: 9903 LDR R1, [SP, #12]
0x341898A8: FBB0 F0F1 UDIV R0, R0, R1
0x341898AC: 9004 STR R0, [SP, #16]
0x341898AE: E008 B 46L15 ; 0x341898C2
.L14:
0x341898B0: F007 F930 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34190B14
0x341898B4: 9004 STR R0, [SP, #16]
0x341898B6: 9804 LDR R0, [SP, #16]
0x341898B8: 9903 LDR R1, [SP, #12]
0x341898BA: FBB0 F0F1 UDIV R0, R0, R1
0x341898BE: 9004 STR R0, [SP, #16]
0x341898C0: E7FF B 46L15 ; 0x341898C2
.L15:
0x341898C2: E01C B 46L22 ; 0x341898FE
.L16:
0x341898C4: F000 FAEC BL LL_RCC_HSI_IsReady.74 ; 0x34189EA0
0x341898C8: B140 CBZ R0, .L17 ; 0x341898DC
0x341898CA: F000 FAF1 BL LL_RCC_HSI_GetDivider.75 ; 0x34189EB0
0x341898CE: 09C1 LSRS R1, R0, #7
0x341898D0: F249 0000 MOVW R0, #0x9000
0x341898D4: F2C0 30D0 MOVT R0, #0x03D0
0x341898D8: 40C8 LSRS R0, R1
0x341898DA: 9004 STR R0, [SP, #16]
.L17:
0x341898DC: E00F B 46L22 ; 0x341898FE
.L18:
0x341898DE: F000 FAEF BL LL_RCC_MSI_IsReady.76 ; 0x34189EC0
0x341898E2: B120 CBZ R0, .L19 ; 0x341898EE
0x341898E4: F640 1000 MOVW R0, #0x0900
0x341898E8: F2C0 003D MOVT R0, #61
0x341898EC: 9004 STR R0, [SP, #16]
.L19:
0x341898EE: E006 B 46L22 ; 0x341898FE
.L20:
0x341898F0: F7FE F850 BL LL_RCC_LSE_IsReady.56 ; 0x34187994
0x341898F4: B110 CBZ R0, .L21 ; 0x341898FC
0x341898F6: F44F 4000 MOV.W R0, #0x8000
0x341898FA: 9004 STR R0, [SP, #16]
.L21:
0x341898FC: E7FF B 46L22 ; 0x341898FE
.L22:
0x341898FE: 9804 LDR R0, [SP, #16]
0x34189900: B006 ADD SP, SP, #24
0x34189902: BD80 POP 123R7, PC}
Section .text.RCCEx_GetOTGPHYCLKFreq from blto2_FSBL_lto.o, size=324, align=4
RCCEx_GetOTGPHYCLKFreq:
0x34189904: B580 PUSH 123R7, LR}
0x34189906: B086 SUB SP, SP, #24
0x34189908: 9005 STR R0, [SP, #20]
0x3418990A: 2000 MOVS R0, #0
0x3418990C: 9004 STR R0, [SP, #16]
0x3418990E: 9805 LDR R0, [SP, #20]
0x34189910: F000 FBCE BL LL_RCC_GetUSBClockSource ; 0x3418A0B0
0x34189914: 4601 MOV R1, R0
0x34189916: 9102 STR R1, [SP, #8]
0x34189918: F640 4114 MOVW R1, #0x0C14
0x3418991C: F2C0 3100 MOVT R1, #0x0300
0x34189920: 4288 CMP R0, R1
0x34189922: D036 BEQ 46L2 ; 0x34189992
0x34189924: 9802 LDR R0, [SP, #8]
0x34189926: F241 4114 MOVW R1, #0x1414
0x3418992A: F2C0 3100 MOVT R1, #0x0300
0x3418992E: 4288 CMP R0, R1
0x34189930: D02F BEQ 46L2 ; 0x34189992
0x34189932: 9802 LDR R0, [SP, #8]
0x34189934: F640 4114 MOVW R1, #0x0C14
0x34189938: F2C0 3101 MOVT R1, #0x0301
0x3418993C: 4288 CMP R0, R1
0x3418993E: D023 BEQ 46L1 ; 0x34189988
0x34189940: 9802 LDR R0, [SP, #8]
0x34189942: F241 4114 MOVW R1, #0x1414
0x34189946: F2C0 3101 MOVT R1, #0x0301
0x3418994A: 4288 CMP R0, R1
0x3418994C: D01C BEQ 46L1 ; 0x34189988
0x3418994E: 9802 LDR R0, [SP, #8]
0x34189950: F640 4114 MOVW R1, #0x0C14
0x34189954: F2C0 3102 MOVT R1, #0x0302
0x34189958: 4288 CMP R0, R1
0x3418995A: D035 BEQ 46L7 ; 0x341899C8
0x3418995C: 9802 LDR R0, [SP, #8]
0x3418995E: F241 4114 MOVW R1, #0x1414
0x34189962: F2C0 3102 MOVT R1, #0x0302
0x34189966: 4288 CMP R0, R1
0x34189968: D02E BEQ 46L7 ; 0x341899C8
0x3418996A: 9802 LDR R0, [SP, #8]
0x3418996C: F640 4114 MOVW R1, #0x0C14
0x34189970: F2C0 3103 MOVT R1, #0x0303
0x34189974: 4288 CMP R0, R1
0x34189976: D015 BEQ 46L4 ; 0x341899A4
0x34189978: 9802 LDR R0, [SP, #8]
0x3418997A: F241 4114 MOVW R1, #0x1414
0x3418997E: F2C0 3103 MOVT R1, #0x0303
0x34189982: 4288 CMP R0, R1
0x34189984: D00E BEQ 46L4 ; 0x341899A4
0x34189986: E05C B 46L13 ; 0x34189A42
.L1:
0x34189988: 2007 MOVS R0, #7
0x3418998A: F7FE FAE7 BL RCCEx_GetCLKPCLKFreq ; 0x34187F5C
0x3418998E: 9004 STR R0, [SP, #16]
0x34189990: E057 B 46L13 ; 0x34189A42
.L2:
0x34189992: F000 FAA5 BL LL_RCC_HSE_IsReady.77 ; 0x34189EE0
0x34189996: B120 CBZ R0, .L3 ; 0x341899A2
0x34189998: F243 6000 MOVW R0, #0x3600
0x3418999C: F2C0 106E MOVT R0, #0x016E
0x341899A0: 9004 STR R0, [SP, #16]
.L3:
0x341899A2: E04E B 46L13 ; 0x34189A42
.L4:
0x341899A4: F000 FA9C BL LL_RCC_HSE_IsReady.77 ; 0x34189EE0
0x341899A8: B168 CBZ R0, .L6 ; 0x341899C6
0x341899AA: F7FE F9ED BL LL_RCC_HSE_IsSelectedHSEDiv2AsDiv2Clock ; 0x34187D88
0x341899AE: B928 CBNZ R0, .L5 ; 0x341899BC
0x341899B0: F646 4000 MOVW R0, #0x6C00
0x341899B4: F2C0 20DC MOVT R0, #0x02DC
0x341899B8: 9004 STR R0, [SP, #16]
0x341899BA: E004 B 46L6 ; 0x341899C6
.L5:
0x341899BC: F243 6000 MOVW R0, #0x3600
0x341899C0: F2C0 106E MOVT R0, #0x016E
0x341899C4: 9004 STR R0, [SP, #16]
.L6:
0x341899C6: E03C B 46L13 ; 0x34189A42
.L7:
0x341899C8: F000 FB7A BL LL_RCC_IC15_IsEnabled ; 0x3418A0C0
0x341899CC: B3C0 CBZ R0, .L12 ; 0x34189A40
0x341899CE: F007 F8EF BL LL_RCC_IC15_GetDivider ; 0x34190BB0
0x341899D2: 9003 STR R0, [SP, #12]
0x341899D4: F000 FB7C BL LL_RCC_IC15_GetSource ; 0x3418A0D0
0x341899D8: 4601 MOV R1, R0
0x341899DA: 9101 STR R1, [SP, #4]
0x341899DC: B160 CBZ R0, .L8 ; 0x341899F8
0x341899DE: 9801 LDR R0, [SP, #4]
0x341899E0: F1B0 5F80 CMP.W R0, #0x10000000
0x341899E4: D011 BEQ 46L9 ; 0x34189A0A
0x341899E6: 9801 LDR R0, [SP, #4]
0x341899E8: F1B0 5F00 CMP.W R0, #0x20000000
0x341899EC: D016 BEQ 46L10 ; 0x34189A1C
0x341899EE: 9801 LDR R0, [SP, #4]
0x341899F0: F1B0 5F40 CMP.W R0, #0x30000000
0x341899F4: D01B BEQ 46L11 ; 0x34189A2E
0x341899F6: E023 B 46L12 ; 0x34189A40
.L8:
0x341899F8: F006 FFC6 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x34190988
0x341899FC: 9004 STR R0, [SP, #16]
0x341899FE: 9804 LDR R0, [SP, #16]
0x34189A00: 9903 LDR R1, [SP, #12]
0x34189A02: FBB0 F0F1 UDIV R0, R0, R1
0x34189A06: 9004 STR R0, [SP, #16]
0x34189A08: E01A B 46L12 ; 0x34189A40
.L9:
0x34189A0A: F006 FFFF BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34190A0C
0x34189A0E: 9004 STR R0, [SP, #16]
0x34189A10: 9804 LDR R0, [SP, #16]
0x34189A12: 9903 LDR R1, [SP, #12]
0x34189A14: FBB0 F0F1 UDIV R0, R0, R1
0x34189A18: 9004 STR R0, [SP, #16]
0x34189A1A: E011 B 46L12 ; 0x34189A40
.L10:
0x34189A1C: F007 F838 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x34190A90
0x34189A20: 9004 STR R0, [SP, #16]
0x34189A22: 9804 LDR R0, [SP, #16]
0x34189A24: 9903 LDR R1, [SP, #12]
0x34189A26: FBB0 F0F1 UDIV R0, R0, R1
0x34189A2A: 9004 STR R0, [SP, #16]
0x34189A2C: E008 B 46L12 ; 0x34189A40
.L11:
0x34189A2E: F007 F871 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34190B14
0x34189A32: 9004 STR R0, [SP, #16]
0x34189A34: 9804 LDR R0, [SP, #16]
0x34189A36: 9903 LDR R1, [SP, #12]
0x34189A38: FBB0 F0F1 UDIV R0, R0, R1
0x34189A3C: 9004 STR R0, [SP, #16]
0x34189A3E: E7FF B 46L12 ; 0x34189A40
.L12:
0x34189A40: E7FF B 46L13 ; 0x34189A42
.L13:
0x34189A42: 9804 LDR R0, [SP, #16]
0x34189A44: B006 ADD SP, SP, #24
0x34189A46: BD80 POP 123R7, PC}
Section .text.RCCEx_GetOTGPHYCKREFCLKFreq from blto2_FSBL_lto.o, size=148, align=4
RCCEx_GetOTGPHYCKREFCLKFreq:
0x34189A48: B580 PUSH 123R7, LR}
0x34189A4A: B084 SUB SP, SP, #16
0x34189A4C: 9003 STR R0, [SP, #12]
0x34189A4E: 2000 MOVS R0, #0
0x34189A50: 9002 STR R0, [SP, #8]
0x34189A52: 9803 LDR R0, [SP, #12]
0x34189A54: F000 FB2C BL LL_RCC_GetUSBClockSource ; 0x3418A0B0
0x34189A58: 4601 MOV R1, R0
0x34189A5A: 9101 STR R1, [SP, #4]
0x34189A5C: F241 0114 MOVW R1, #0x1014
0x34189A60: F2C0 1100 MOVT R1, #0x0100
0x34189A64: 4288 CMP R0, R1
0x34189A66: D026 BEQ 46L4 ; 0x34189AB6
0x34189A68: 9801 LDR R0, [SP, #4]
0x34189A6A: F641 0114 MOVW R1, #0x1814
0x34189A6E: F2C0 1100 MOVT R1, #0x0100
0x34189A72: 4288 CMP R0, R1
0x34189A74: D027 BEQ 46L5 ; 0x34189AC6
0x34189A76: 9801 LDR R0, [SP, #4]
0x34189A78: F241 0114 MOVW R1, #0x1014
0x34189A7C: F2C0 1101 MOVT R1, #0x0101
0x34189A80: 4288 CMP R0, R1
0x34189A82: D006 BEQ 46L1 ; 0x34189A92
0x34189A84: 9801 LDR R0, [SP, #4]
0x34189A86: F641 0114 MOVW R1, #0x1814
0x34189A8A: F2C0 1101 MOVT R1, #0x0101
0x34189A8E: 4288 CMP R0, R1
0x34189A90: D121 BNE 46L6 ; 0x34189AD6
.L1:
0x34189A92: F000 FA25 BL LL_RCC_HSE_IsReady.77 ; 0x34189EE0
0x34189A96: B168 CBZ R0, .L3 ; 0x34189AB4
0x34189A98: F7FE F976 BL LL_RCC_HSE_IsSelectedHSEDiv2AsDiv2Clock ; 0x34187D88
0x34189A9C: B928 CBNZ R0, .L2 ; 0x34189AAA
0x34189A9E: F646 4000 MOVW R0, #0x6C00
0x34189AA2: F2C0 20DC MOVT R0, #0x02DC
0x34189AA6: 9002 STR R0, [SP, #8]
0x34189AA8: E004 B 46L3 ; 0x34189AB4
.L2:
0x34189AAA: F243 6000 MOVW R0, #0x3600
0x34189AAE: F2C0 106E MOVT R0, #0x016E
0x34189AB2: 9002 STR R0, [SP, #8]
.L3:
0x34189AB4: E00F B 46L6 ; 0x34189AD6
.L4:
0x34189AB6: F640 4014 MOVW R0, #0x0C14
0x34189ABA: F2C0 3000 MOVT R0, #0x0300
0x34189ABE: F7FF FF21 BL RCCEx_GetOTGPHYCLKFreq ; 0x34189904
0x34189AC2: 9002 STR R0, [SP, #8]
0x34189AC4: E007 B 46L6 ; 0x34189AD6
.L5:
0x34189AC6: F241 4014 MOVW R0, #0x1414
0x34189ACA: F2C0 3000 MOVT R0, #0x0300
0x34189ACE: F7FF FF19 BL RCCEx_GetOTGPHYCLKFreq ; 0x34189904
0x34189AD2: 9002 STR R0, [SP, #8]
0x34189AD4: E7FF B 46L6 ; 0x34189AD6
.L6:
0x34189AD6: 9802 LDR R0, [SP, #8]
0x34189AD8: B004 ADD SP, SP, #16
0x34189ADA: BD80 POP 123R7, PC}
Section .text.RCCEx_GetXSPICLKFreq from blto2_FSBL_lto.o, size=452, align=4
RCCEx_GetXSPICLKFreq:
0x34189ADC: B580 PUSH 123R7, LR}
0x34189ADE: B086 SUB SP, SP, #24
0x34189AE0: 9005 STR R0, [SP, #20]
0x34189AE2: 2000 MOVS R0, #0
0x34189AE4: 9004 STR R0, [SP, #16]
0x34189AE6: 9805 LDR R0, [SP, #20]
0x34189AE8: F7FE F956 BL LL_RCC_GetXSPIClockSource ; 0x34187D98
0x34189AEC: 4601 MOV R1, R0
0x34189AEE: 9102 STR R1, [SP, #8]
0x34189AF0: 2114 MOVS R1, #20
0x34189AF2: F2C0 3100 MOVT R1, #0x0300
0x34189AF6: 4288 CMP R0, R1
0x34189AF8: D04A BEQ 46L1 ; 0x34189B90
0x34189AFA: 9802 LDR R0, [SP, #8]
0x34189AFC: F240 4114 MOVW R1, #0x0414
0x34189B00: F2C0 3100 MOVT R1, #0x0300
0x34189B04: 4288 CMP R0, R1
0x34189B06: D043 BEQ 46L1 ; 0x34189B90
0x34189B08: 9802 LDR R0, [SP, #8]
0x34189B0A: F640 0114 MOVW R1, #0x0814
0x34189B0E: F2C0 3100 MOVT R1, #0x0300
0x34189B12: 4288 CMP R0, R1
0x34189B14: D03C BEQ 46L1 ; 0x34189B90
0x34189B16: 9802 LDR R0, [SP, #8]
0x34189B18: 2114 MOVS R1, #20
0x34189B1A: F2C0 3101 MOVT R1, #0x0301
0x34189B1E: 4288 CMP R0, R1
0x34189B20: D03C BEQ 46L2 ; 0x34189B9C
0x34189B22: 9802 LDR R0, [SP, #8]
0x34189B24: F240 4114 MOVW R1, #0x0414
0x34189B28: F2C0 3101 MOVT R1, #0x0301
0x34189B2C: 4288 CMP R0, R1
0x34189B2E: D035 BEQ 46L2 ; 0x34189B9C
0x34189B30: 9802 LDR R0, [SP, #8]
0x34189B32: F640 0114 MOVW R1, #0x0814
0x34189B36: F2C0 3101 MOVT R1, #0x0301
0x34189B3A: 4288 CMP R0, R1
0x34189B3C: D02E BEQ 46L2 ; 0x34189B9C
0x34189B3E: 9802 LDR R0, [SP, #8]
0x34189B40: 2114 MOVS R1, #20
0x34189B42: F2C0 3102 MOVT R1, #0x0302
0x34189B46: 4288 CMP R0, R1
0x34189B48: D02D BEQ 46L3 ; 0x34189BA6
0x34189B4A: 9802 LDR R0, [SP, #8]
0x34189B4C: F240 4114 MOVW R1, #0x0414
0x34189B50: F2C0 3102 MOVT R1, #0x0302
0x34189B54: 4288 CMP R0, R1
0x34189B56: D026 BEQ 46L3 ; 0x34189BA6
0x34189B58: 9802 LDR R0, [SP, #8]
0x34189B5A: F640 0114 MOVW R1, #0x0814
0x34189B5E: F2C0 3102 MOVT R1, #0x0302
0x34189B62: 4288 CMP R0, R1
0x34189B64: D01F BEQ 46L3 ; 0x34189BA6
0x34189B66: 9802 LDR R0, [SP, #8]
0x34189B68: 2114 MOVS R1, #20
0x34189B6A: F2C0 3103 MOVT R1, #0x0303
0x34189B6E: 4288 CMP R0, R1
0x34189B70: D056 BEQ 46L9 ; 0x34189C20
0x34189B72: 9802 LDR R0, [SP, #8]
0x34189B74: F240 4114 MOVW R1, #0x0414
0x34189B78: F2C0 3103 MOVT R1, #0x0303
0x34189B7C: 4288 CMP R0, R1
0x34189B7E: D04F BEQ 46L9 ; 0x34189C20
0x34189B80: 9802 LDR R0, [SP, #8]
0x34189B82: F640 0114 MOVW R1, #0x0814
0x34189B86: F2C0 3103 MOVT R1, #0x0303
0x34189B8A: 4288 CMP R0, R1
0x34189B8C: D048 BEQ 46L9 ; 0x34189C20
0x34189B8E: E084 B 46L15 ; 0x34189C9A
.L1:
0x34189B90: F005 FB7E BL HAL_RCC_GetSysClockFreq ; 0x3418F290
0x34189B94: F000 F884 BL RCCEx_GetHCLKFreq ; 0x34189CA0
0x34189B98: 9004 STR R0, [SP, #16]
0x34189B9A: E07E B 46L15 ; 0x34189C9A
.L2:
0x34189B9C: 2007 MOVS R0, #7
0x34189B9E: F7FE F9DD BL RCCEx_GetCLKPCLKFreq ; 0x34187F5C
0x34189BA2: 9004 STR R0, [SP, #16]
0x34189BA4: E079 B 46L15 ; 0x34189C9A
.L3:
0x34189BA6: F000 F889 BL LL_RCC_IC3_IsEnabled ; 0x34189CBC
0x34189BAA: B3C0 CBZ R0, .L8 ; 0x34189C1E
0x34189BAC: F006 FEE0 BL LL_RCC_IC3_GetDivider ; 0x34190970
0x34189BB0: 9003 STR R0, [SP, #12]
0x34189BB2: F000 F88B BL LL_RCC_IC3_GetSource ; 0x34189CCC
0x34189BB6: 4601 MOV R1, R0
0x34189BB8: 9101 STR R1, [SP, #4]
0x34189BBA: B160 CBZ R0, .L4 ; 0x34189BD6
0x34189BBC: 9801 LDR R0, [SP, #4]
0x34189BBE: F1B0 5F80 CMP.W R0, #0x10000000
0x34189BC2: D011 BEQ 46L5 ; 0x34189BE8
0x34189BC4: 9801 LDR R0, [SP, #4]
0x34189BC6: F1B0 5F00 CMP.W R0, #0x20000000
0x34189BCA: D016 BEQ 46L6 ; 0x34189BFA
0x34189BCC: 9801 LDR R0, [SP, #4]
0x34189BCE: F1B0 5F40 CMP.W R0, #0x30000000
0x34189BD2: D01B BEQ 46L7 ; 0x34189C0C
0x34189BD4: E023 B 46L8 ; 0x34189C1E
.L4:
0x34189BD6: F006 FED7 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x34190988
0x34189BDA: 9004 STR R0, [SP, #16]
0x34189BDC: 9804 LDR R0, [SP, #16]
0x34189BDE: 9903 LDR R1, [SP, #12]
0x34189BE0: FBB0 F0F1 UDIV R0, R0, R1
0x34189BE4: 9004 STR R0, [SP, #16]
0x34189BE6: E01A B 46L8 ; 0x34189C1E
.L5:
0x34189BE8: F006 FF10 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34190A0C
0x34189BEC: 9004 STR R0, [SP, #16]
0x34189BEE: 9804 LDR R0, [SP, #16]
0x34189BF0: 9903 LDR R1, [SP, #12]
0x34189BF2: FBB0 F0F1 UDIV R0, R0, R1
0x34189BF6: 9004 STR R0, [SP, #16]
0x34189BF8: E011 B 46L8 ; 0x34189C1E
.L6:
0x34189BFA: F006 FF49 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x34190A90
0x34189BFE: 9004 STR R0, [SP, #16]
0x34189C00: 9804 LDR R0, [SP, #16]
0x34189C02: 9903 LDR R1, [SP, #12]
0x34189C04: FBB0 F0F1 UDIV R0, R0, R1
0x34189C08: 9004 STR R0, [SP, #16]
0x34189C0A: E008 B 46L8 ; 0x34189C1E
.L7:
0x34189C0C: F006 FF82 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34190B14
0x34189C10: 9004 STR R0, [SP, #16]
0x34189C12: 9804 LDR R0, [SP, #16]
0x34189C14: 9903 LDR R1, [SP, #12]
0x34189C16: FBB0 F0F1 UDIV R0, R0, R1
0x34189C1A: 9004 STR R0, [SP, #16]
0x34189C1C: E7FF B 46L8 ; 0x34189C1E
.L8:
0x34189C1E: E03C B 46L15 ; 0x34189C9A
.L9:
0x34189C20: F000 F85C BL LL_RCC_IC4_IsEnabled ; 0x34189CDC
0x34189C24: B3C0 CBZ R0, .L14 ; 0x34189C98
0x34189C26: F006 FFB7 BL LL_RCC_IC4_GetDivider ; 0x34190B98
0x34189C2A: 9003 STR R0, [SP, #12]
0x34189C2C: F000 F85E BL LL_RCC_IC4_GetSource ; 0x34189CEC
0x34189C30: 4601 MOV R1, R0
0x34189C32: 9100 STR R1, [SP, #0]
0x34189C34: B160 CBZ R0, .L10 ; 0x34189C50
0x34189C36: 9800 LDR R0, [SP, #0]
0x34189C38: F1B0 5F80 CMP.W R0, #0x10000000
0x34189C3C: D011 BEQ 46L11 ; 0x34189C62
0x34189C3E: 9800 LDR R0, [SP, #0]
0x34189C40: F1B0 5F00 CMP.W R0, #0x20000000
0x34189C44: D016 BEQ 46L12 ; 0x34189C74
0x34189C46: 9800 LDR R0, [SP, #0]
0x34189C48: F1B0 5F40 CMP.W R0, #0x30000000
0x34189C4C: D01B BEQ 46L13 ; 0x34189C86
0x34189C4E: E023 B 46L14 ; 0x34189C98
.L10:
0x34189C50: F006 FE9A BL HAL_RCCEx_GetPLL1CLKFreq ; 0x34190988
0x34189C54: 9004 STR R0, [SP, #16]
0x34189C56: 9804 LDR R0, [SP, #16]
0x34189C58: 9903 LDR R1, [SP, #12]
0x34189C5A: FBB0 F0F1 UDIV R0, R0, R1
0x34189C5E: 9004 STR R0, [SP, #16]
0x34189C60: E01A B 46L14 ; 0x34189C98
.L11:
0x34189C62: F006 FED3 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34190A0C
0x34189C66: 9004 STR R0, [SP, #16]
0x34189C68: 9804 LDR R0, [SP, #16]
0x34189C6A: 9903 LDR R1, [SP, #12]
0x34189C6C: FBB0 F0F1 UDIV R0, R0, R1
0x34189C70: 9004 STR R0, [SP, #16]
0x34189C72: E011 B 46L14 ; 0x34189C98
.L12:
0x34189C74: F006 FF0C BL HAL_RCCEx_GetPLL3CLKFreq ; 0x34190A90
0x34189C78: 9004 STR R0, [SP, #16]
0x34189C7A: 9804 LDR R0, [SP, #16]
0x34189C7C: 9903 LDR R1, [SP, #12]
0x34189C7E: FBB0 F0F1 UDIV R0, R0, R1
0x34189C82: 9004 STR R0, [SP, #16]
0x34189C84: E008 B 46L14 ; 0x34189C98
.L13:
0x34189C86: F006 FF45 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34190B14
0x34189C8A: 9004 STR R0, [SP, #16]
0x34189C8C: 9804 LDR R0, [SP, #16]
0x34189C8E: 9903 LDR R1, [SP, #12]
0x34189C90: FBB0 F0F1 UDIV R0, R0, R1
0x34189C94: 9004 STR R0, [SP, #16]
0x34189C96: E7FF B 46L14 ; 0x34189C98
.L14:
0x34189C98: E7FF B 46L15 ; 0x34189C9A
.L15:
0x34189C9A: 9804 LDR R0, [SP, #16]
0x34189C9C: B006 ADD SP, SP, #24
0x34189C9E: BD80 POP 123R7, PC}
Section .text.RCCEx_GetHCLKFreq from blto2_FSBL_lto.o, size=28, align=4
RCCEx_GetHCLKFreq:
0x34189CA0: B580 PUSH 123R7, LR}
0x34189CA2: B082 SUB SP, SP, #8
0x34189CA4: 9001 STR R0, [SP, #4]
0x34189CA6: 9801 LDR R0, [SP, #4]
0x34189CA8: 9000 STR R0, [SP, #0]
0x34189CAA: F000 F9F9 BL LL_RCC_GetAHBPrescaler.87 ; 0x3418A0A0
0x34189CAE: 4601 MOV R1, R0
0x34189CB0: 9800 LDR R0, [SP, #0]
0x34189CB2: F3C1 5102 UBFX R1, R1, #20, #3
0x34189CB6: 40C8 LSRS R0, R1
0x34189CB8: B002 ADD SP, SP, #8
0x34189CBA: BD80 POP 123R7, PC}
Section .text.LL_RCC_IC3_IsEnabled from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_IC3_IsEnabled:
0x34189CBC: F248 2040 MOVW R0, #0x8240
0x34189CC0: F2C5 6002 MOVT R0, #0x5602
0x34189CC4: 6800 LDR R0, [R0]
0x34189CC6: F3C0 0080 UBFX R0, R0, #2, #1
0x34189CCA: 4770 BX LR
Section .text.LL_RCC_IC3_GetSource from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_IC3_GetSource:
0x34189CCC: F248 00CC MOVW R0, #0x80CC
0x34189CD0: F2C5 6002 MOVT R0, #0x5602
0x34189CD4: 6800 LDR R0, [R0]
0x34189CD6: F000 5040 AND R0, R0, #0x30000000
0x34189CDA: 4770 BX LR
Section .text.LL_RCC_IC4_IsEnabled from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_IC4_IsEnabled:
0x34189CDC: F248 2040 MOVW R0, #0x8240
0x34189CE0: F2C5 6002 MOVT R0, #0x5602
0x34189CE4: 6800 LDR R0, [R0]
0x34189CE6: F3C0 00C0 UBFX R0, R0, #3, #1
0x34189CEA: 4770 BX LR
Section .text.LL_RCC_IC4_GetSource from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_IC4_GetSource:
0x34189CEC: F248 00D0 MOVW R0, #0x80D0
0x34189CF0: F2C5 6002 MOVT R0, #0x5602
0x34189CF4: 6800 LDR R0, [R0]
0x34189CF6: F000 5040 AND R0, R0, #0x30000000
0x34189CFA: 4770 BX LR
Section .text.LL_RCC_PLL4_IsReady.71 from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_PLL4_IsReady.71:
0x34189CFC: F248 0004 MOVW R0, #0x8004
0x34189D00: F2C5 6002 MOVT R0, #0x5602
0x34189D04: 6800 LDR R0, [R0]
0x34189D06: F3C0 20C0 UBFX R0, R0, #11, #1
0x34189D0A: 4770 BX LR
Section .text.LL_RCC_PLL4P_IsEnabled from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_PLL4P_IsEnabled:
0x34189D0C: F248 00B8 MOVW R0, #0x80B8
0x34189D10: F2C5 6002 MOVT R0, #0x5602
0x34189D14: 6800 LDR R0, [R0]
0x34189D16: F3C0 7080 UBFX R0, R0, #30, #1
0x34189D1A: 4770 BX LR
Section .text.LL_RCC_PLL4_GetSource.72 from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_PLL4_GetSource.72:
0x34189D1C: F248 00B0 MOVW R0, #0x80B0
0x34189D20: F2C5 6002 MOVT R0, #0x5602
0x34189D24: 6800 LDR R0, [R0]
0x34189D26: F000 40E0 AND R0, R0, #0x70000000
0x34189D2A: 4770 BX LR
Section .text.RCCEx_GetPLLSourceFreq from blto2_FSBL_lto.o, size=140, align=4
RCCEx_GetPLLSourceFreq:
0x34189D2C: B580 PUSH 123R7, LR}
0x34189D2E: B084 SUB SP, SP, #16
0x34189D30: 9003 STR R0, [SP, #12]
0x34189D32: 2000 MOVS R0, #0
0x34189D34: 9002 STR R0, [SP, #8]
0x34189D36: 9803 LDR R0, [SP, #12]
0x34189D38: 9001 STR R0, [SP, #4]
0x34189D3A: B160 CBZ R0, .L1 ; 0x34189D56
0x34189D3C: 9801 LDR R0, [SP, #4]
0x34189D3E: F1B0 5F80 CMP.W R0, #0x10000000
0x34189D42: D015 BEQ 46L3 ; 0x34189D70
0x34189D44: 9801 LDR R0, [SP, #4]
0x34189D46: F1B0 5F00 CMP.W R0, #0x20000000
0x34189D4A: D023 BEQ 46L6 ; 0x34189D94
0x34189D4C: 9801 LDR R0, [SP, #4]
0x34189D4E: F1B0 5F40 CMP.W R0, #0x30000000
0x34189D52: D028 BEQ 46L8 ; 0x34189DA6
0x34189D54: E02D B 46L9 ; 0x34189DB2
.L1:
0x34189D56: F000 F8A3 BL LL_RCC_HSI_IsReady.74 ; 0x34189EA0
0x34189D5A: B140 CBZ R0, .L2 ; 0x34189D6E
0x34189D5C: F000 F8A8 BL LL_RCC_HSI_GetDivider.75 ; 0x34189EB0
0x34189D60: 09C1 LSRS R1, R0, #7
0x34189D62: F249 0000 MOVW R0, #0x9000
0x34189D66: F2C0 30D0 MOVT R0, #0x03D0
0x34189D6A: 40C8 LSRS R0, R1
0x34189D6C: 9002 STR R0, [SP, #8]
.L2:
0x34189D6E: E020 B 46L9 ; 0x34189DB2
.L3:
0x34189D70: F000 F8A6 BL LL_RCC_MSI_IsReady.76 ; 0x34189EC0
0x34189D74: B168 CBZ R0, .L5 ; 0x34189D92
0x34189D76: F000 F8AB BL LL_RCC_MSI_GetFrequency ; 0x34189ED0
0x34189D7A: B928 CBNZ R0, .L4 ; 0x34189D88
0x34189D7C: F640 1000 MOVW R0, #0x0900
0x34189D80: F2C0 003D MOVT R0, #61
0x34189D84: 9002 STR R0, [SP, #8]
0x34189D86: E004 B 46L5 ; 0x34189D92
.L4:
0x34189D88: F242 4000 MOVW R0, #0x2400
0x34189D8C: F2C0 00F4 MOVT R0, #244
0x34189D90: 9002 STR R0, [SP, #8]
.L5:
0x34189D92: E00E B 46L9 ; 0x34189DB2
.L6:
0x34189D94: F000 F8A4 BL LL_RCC_HSE_IsReady.77 ; 0x34189EE0
0x34189D98: B120 CBZ R0, .L7 ; 0x34189DA4
0x34189D9A: F646 4000 MOVW R0, #0x6C00
0x34189D9E: F2C0 20DC MOVT R0, #0x02DC
0x34189DA2: 9002 STR R0, [SP, #8]
.L7:
0x34189DA4: E005 B 46L9 ; 0x34189DB2
.L8:
0x34189DA6: F248 0000 MOVW R0, #0x8000
0x34189DAA: F2C0 00BB MOVT R0, #187
0x34189DAE: 9002 STR R0, [SP, #8]
0x34189DB0: E7FF B 46L9 ; 0x34189DB2
.L9:
0x34189DB2: 9802 LDR R0, [SP, #8]
0x34189DB4: B004 ADD SP, SP, #16
0x34189DB6: BD80 POP 123R7, PC}
Section .text.LL_RCC_PLL4_GetM from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_PLL4_GetM:
0x34189DB8: F248 00B0 MOVW R0, #0x80B0
0x34189DBC: F2C5 6002 MOVT R0, #0x5602
0x34189DC0: 6800 LDR R0, [R0]
0x34189DC2: F3C0 5005 UBFX R0, R0, #20, #6
0x34189DC6: 4770 BX LR
Section .text.LL_RCC_PLL4_GetN from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_PLL4_GetN:
0x34189DC8: F248 00B0 MOVW R0, #0x80B0
0x34189DCC: F2C5 6002 MOVT R0, #0x5602
0x34189DD0: 6800 LDR R0, [R0]
0x34189DD2: F3C0 200B UBFX R0, R0, #8, #12
0x34189DD6: 4770 BX LR
Section .text.LL_RCC_PLL4_GetFRACN from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_PLL4_GetFRACN:
0x34189DD8: F248 00B4 MOVW R0, #0x80B4
0x34189DDC: F2C5 6002 MOVT R0, #0x5602
0x34189DE0: 6800 LDR R0, [R0]
0x34189DE2: F020 407F BIC R0, R0, #0xFF000000
0x34189DE6: 4770 BX LR
Section .text.LL_RCC_PLL4_GetP1 from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_PLL4_GetP1:
0x34189DE8: F248 00B8 MOVW R0, #0x80B8
0x34189DEC: F2C5 6002 MOVT R0, #0x5602
0x34189DF0: 6800 LDR R0, [R0]
0x34189DF2: F3C0 60C2 UBFX R0, R0, #27, #3
0x34189DF6: 4770 BX LR
Section .text.LL_RCC_PLL4_GetP2 from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_PLL4_GetP2:
0x34189DF8: F248 00B8 MOVW R0, #0x80B8
0x34189DFC: F2C5 6002 MOVT R0, #0x5602
0x34189E00: 6800 LDR R0, [R0]
0x34189E02: F3C0 6002 UBFX R0, R0, #24, #3
0x34189E06: 4770 BX LR
Section .text.RCCEx_CalcPLLFreq from blto2_FSBL_lto.o, size=136, align=4
RCCEx_CalcPLLFreq:
0x34189E08: B085 SUB SP, SP, #20
0x34189E0A: F8DD C018 LDR.W R12, [SP, #24]
0x34189E0E: F8DD C014 LDR.W R12, [SP, #20]
0x34189E12: 9004 STR R0, [SP, #16]
0x34189E14: 9103 STR R1, [SP, #12]
0x34189E16: 9202 STR R2, [SP, #8]
0x34189E18: 9301 STR R3, [SP, #4]
0x34189E1A: ED9D 0A04 VLDR S0, [SP, #16]
0x34189E1E: EEB8 0A40 VCVT.F32.U32 S0, S0
0x34189E22: ED9D 1A02 VLDR S2, [SP, #8]
0x34189E26: EEB8 1A41 VCVT.F32.U32 S2, S2
0x34189E2A: ED9D 2A01 VLDR S4, [SP, #4]
0x34189E2E: EEB8 2A42 VCVT.F32.U32 S4, S4
0x34189E32: ED9F 3A16 VLDR S6, =0x33800000 ; [PC, #88] [0x34189E8C]
0x34189E36: EE22 2A03 VMUL.F32 S4, S4, S6
0x34189E3A: EE31 1A02 VADD.F32 S2, S2, S4
0x34189E3E: EE20 0A01 VMUL.F32 S0, S0, S2
0x34189E42: ED9D 1A03 VLDR S2, [SP, #12]
0x34189E46: EEB8 1A41 VCVT.F32.U32 S2, S2
0x34189E4A: EE80 0A01 VDIV.F32 S0, S0, S2
0x34189E4E: ED8D 0A00 VSTR S0, [SP]
0x34189E52: ED9D 0A00 VLDR S0, [SP]
0x34189E56: ED9D 1A05 VLDR S2, [SP, #20]
0x34189E5A: EEB8 1A41 VCVT.F32.U32 S2, S2
0x34189E5E: EE80 0A01 VDIV.F32 S0, S0, S2
0x34189E62: ED8D 0A00 VSTR S0, [SP]
0x34189E66: ED9D 0A00 VLDR S0, [SP]
0x34189E6A: ED9D 1A06 VLDR S2, [SP, #24]
0x34189E6E: EEB8 1A41 VCVT.F32.U32 S2, S2
0x34189E72: EE80 0A01 VDIV.F32 S0, S0, S2
0x34189E76: ED8D 0A00 VSTR S0, [SP]
0x34189E7A: ED9D 0A00 VLDR S0, [SP]
0x34189E7E: EEBC 0AC0 VCVT.U32.F32 S0, S0
0x34189E82: EE10 0A10 VMOV R0, S0
0x34189E86: B005 ADD SP, SP, #20
0x34189E88: 4770 BX LR
0x34189E8A: BF00 NOP
0x34189E8C: 33800000 DC.W 0x33800000
Section .text.LL_RCC_PLL4_IsEnabledBypass.73 from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_PLL4_IsEnabledBypass.73:
0x34189E90: F248 00B0 MOVW R0, #0x80B0
0x34189E94: F2C5 6002 MOVT R0, #0x5602
0x34189E98: 6800 LDR R0, [R0]
0x34189E9A: F3C0 60C0 UBFX R0, R0, #27, #1
0x34189E9E: 4770 BX LR
Section .text.LL_RCC_HSI_IsReady.74 from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_HSI_IsReady.74:
0x34189EA0: F248 0004 MOVW R0, #0x8004
0x34189EA4: F2C5 6002 MOVT R0, #0x5602
0x34189EA8: 6800 LDR R0, [R0]
0x34189EAA: F3C0 00C0 UBFX R0, R0, #3, #1
0x34189EAE: 4770 BX LR
Section .text.LL_RCC_HSI_GetDivider.75 from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_HSI_GetDivider.75:
0x34189EB0: F248 0048 MOVW R0, #0x8048
0x34189EB4: F2C5 6002 MOVT R0, #0x5602
0x34189EB8: 6800 LDR R0, [R0]
0x34189EBA: F400 70C0 AND R0, R0, #0x0180
0x34189EBE: 4770 BX LR
Section .text.LL_RCC_MSI_IsReady.76 from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_MSI_IsReady.76:
0x34189EC0: F248 0004 MOVW R0, #0x8004
0x34189EC4: F2C5 6002 MOVT R0, #0x5602
0x34189EC8: 6800 LDR R0, [R0]
0x34189ECA: F3C0 0080 UBFX R0, R0, #2, #1
0x34189ECE: 4770 BX LR
Section .text.LL_RCC_MSI_GetFrequency from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_MSI_GetFrequency:
0x34189ED0: F248 0044 MOVW R0, #0x8044
0x34189ED4: F2C5 6002 MOVT R0, #0x5602
0x34189ED8: 6800 LDR R0, [R0]
0x34189EDA: F400 7000 AND R0, R0, #0x0200
0x34189EDE: 4770 BX LR
Section .text.LL_RCC_HSE_IsReady.77 from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_HSE_IsReady.77:
0x34189EE0: F248 0004 MOVW R0, #0x8004
0x34189EE4: F2C5 6002 MOVT R0, #0x5602
0x34189EE8: 6800 LDR R0, [R0]
0x34189EEA: F3C0 1000 UBFX R0, R0, #4, #1
0x34189EEE: 4770 BX LR
Section .text.LL_RCC_PLL3_IsReady.78 from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_PLL3_IsReady.78:
0x34189EF0: F248 0004 MOVW R0, #0x8004
0x34189EF4: F2C5 6002 MOVT R0, #0x5602
0x34189EF8: 6800 LDR R0, [R0]
0x34189EFA: F3C0 2080 UBFX R0, R0, #10, #1
0x34189EFE: 4770 BX LR
Section .text.LL_RCC_PLL3P_IsEnabled from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_PLL3P_IsEnabled:
0x34189F00: F248 00A8 MOVW R0, #0x80A8
0x34189F04: F2C5 6002 MOVT R0, #0x5602
0x34189F08: 6800 LDR R0, [R0]
0x34189F0A: F3C0 7080 UBFX R0, R0, #30, #1
0x34189F0E: 4770 BX LR
Section .text.LL_RCC_PLL3_GetSource.79 from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_PLL3_GetSource.79:
0x34189F10: F248 00A0 MOVW R0, #0x80A0
0x34189F14: F2C5 6002 MOVT R0, #0x5602
0x34189F18: 6800 LDR R0, [R0]
0x34189F1A: F000 40E0 AND R0, R0, #0x70000000
0x34189F1E: 4770 BX LR
Section .text.LL_RCC_PLL3_GetM from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_PLL3_GetM:
0x34189F20: F248 00A0 MOVW R0, #0x80A0
0x34189F24: F2C5 6002 MOVT R0, #0x5602
0x34189F28: 6800 LDR R0, [R0]
0x34189F2A: F3C0 5005 UBFX R0, R0, #20, #6
0x34189F2E: 4770 BX LR
Section .text.LL_RCC_PLL3_GetN from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_PLL3_GetN:
0x34189F30: F248 00A0 MOVW R0, #0x80A0
0x34189F34: F2C5 6002 MOVT R0, #0x5602
0x34189F38: 6800 LDR R0, [R0]
0x34189F3A: F3C0 200B UBFX R0, R0, #8, #12
0x34189F3E: 4770 BX LR
Section .text.LL_RCC_PLL3_GetFRACN from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_PLL3_GetFRACN:
0x34189F40: F248 00A4 MOVW R0, #0x80A4
0x34189F44: F2C5 6002 MOVT R0, #0x5602
0x34189F48: 6800 LDR R0, [R0]
0x34189F4A: F020 407F BIC R0, R0, #0xFF000000
0x34189F4E: 4770 BX LR
Section .text.LL_RCC_PLL3_GetP1 from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_PLL3_GetP1:
0x34189F50: F248 00A8 MOVW R0, #0x80A8
0x34189F54: F2C5 6002 MOVT R0, #0x5602
0x34189F58: 6800 LDR R0, [R0]
0x34189F5A: F3C0 60C2 UBFX R0, R0, #27, #3
0x34189F5E: 4770 BX LR
Section .text.LL_RCC_PLL3_GetP2 from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_PLL3_GetP2:
0x34189F60: F248 00A8 MOVW R0, #0x80A8
0x34189F64: F2C5 6002 MOVT R0, #0x5602
0x34189F68: 6800 LDR R0, [R0]
0x34189F6A: F3C0 6002 UBFX R0, R0, #24, #3
0x34189F6E: 4770 BX LR
Section .text.LL_RCC_PLL3_IsEnabledBypass.80 from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_PLL3_IsEnabledBypass.80:
0x34189F70: F248 00A0 MOVW R0, #0x80A0
0x34189F74: F2C5 6002 MOVT R0, #0x5602
0x34189F78: 6800 LDR R0, [R0]
0x34189F7A: F3C0 60C0 UBFX R0, R0, #27, #1
0x34189F7E: 4770 BX LR
Section .text.LL_RCC_PLL2_IsReady.81 from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_PLL2_IsReady.81:
0x34189F80: F248 0004 MOVW R0, #0x8004
0x34189F84: F2C5 6002 MOVT R0, #0x5602
0x34189F88: 6800 LDR R0, [R0]
0x34189F8A: F3C0 2040 UBFX R0, R0, #9, #1
0x34189F8E: 4770 BX LR
Section .text.LL_RCC_PLL2P_IsEnabled from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_PLL2P_IsEnabled:
0x34189F90: F248 0098 MOVW R0, #0x8098
0x34189F94: F2C5 6002 MOVT R0, #0x5602
0x34189F98: 6800 LDR R0, [R0]
0x34189F9A: F3C0 7080 UBFX R0, R0, #30, #1
0x34189F9E: 4770 BX LR
Section .text.LL_RCC_PLL2_GetSource.82 from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_PLL2_GetSource.82:
0x34189FA0: F248 0090 MOVW R0, #0x8090
0x34189FA4: F2C5 6002 MOVT R0, #0x5602
0x34189FA8: 6800 LDR R0, [R0]
0x34189FAA: F000 40E0 AND R0, R0, #0x70000000
0x34189FAE: 4770 BX LR
Section .text.LL_RCC_PLL2_GetM from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_PLL2_GetM:
0x34189FB0: F248 0090 MOVW R0, #0x8090
0x34189FB4: F2C5 6002 MOVT R0, #0x5602
0x34189FB8: 6800 LDR R0, [R0]
0x34189FBA: F3C0 5005 UBFX R0, R0, #20, #6
0x34189FBE: 4770 BX LR
Section .text.LL_RCC_PLL2_GetN from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_PLL2_GetN:
0x34189FC0: F248 0090 MOVW R0, #0x8090
0x34189FC4: F2C5 6002 MOVT R0, #0x5602
0x34189FC8: 6800 LDR R0, [R0]
0x34189FCA: F3C0 200B UBFX R0, R0, #8, #12
0x34189FCE: 4770 BX LR
Section .text.LL_RCC_PLL2_GetFRACN from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_PLL2_GetFRACN:
0x34189FD0: F248 0094 MOVW R0, #0x8094
0x34189FD4: F2C5 6002 MOVT R0, #0x5602
0x34189FD8: 6800 LDR R0, [R0]
0x34189FDA: F020 407F BIC R0, R0, #0xFF000000
0x34189FDE: 4770 BX LR
Section .text.LL_RCC_PLL2_GetP1 from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_PLL2_GetP1:
0x34189FE0: F248 0098 MOVW R0, #0x8098
0x34189FE4: F2C5 6002 MOVT R0, #0x5602
0x34189FE8: 6800 LDR R0, [R0]
0x34189FEA: F3C0 60C2 UBFX R0, R0, #27, #3
0x34189FEE: 4770 BX LR
Section .text.LL_RCC_PLL2_GetP2 from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_PLL2_GetP2:
0x34189FF0: F248 0098 MOVW R0, #0x8098
0x34189FF4: F2C5 6002 MOVT R0, #0x5602
0x34189FF8: 6800 LDR R0, [R0]
0x34189FFA: F3C0 6002 UBFX R0, R0, #24, #3
0x34189FFE: 4770 BX LR
Section .text.LL_RCC_PLL2_IsEnabledBypass.83 from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_PLL2_IsEnabledBypass.83:
0x3418A000: F248 0090 MOVW R0, #0x8090
0x3418A004: F2C5 6002 MOVT R0, #0x5602
0x3418A008: 6800 LDR R0, [R0]
0x3418A00A: F3C0 60C0 UBFX R0, R0, #27, #1
0x3418A00E: 4770 BX LR
Section .text.LL_RCC_PLL1_IsReady.84 from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_PLL1_IsReady.84:
0x3418A010: F248 0004 MOVW R0, #0x8004
0x3418A014: F2C5 6002 MOVT R0, #0x5602
0x3418A018: 6800 LDR R0, [R0]
0x3418A01A: F3C0 2000 UBFX R0, R0, #8, #1
0x3418A01E: 4770 BX LR
Section .text.LL_RCC_PLL1P_IsEnabled from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_PLL1P_IsEnabled:
0x3418A020: F248 0088 MOVW R0, #0x8088
0x3418A024: F2C5 6002 MOVT R0, #0x5602
0x3418A028: 6800 LDR R0, [R0]
0x3418A02A: F3C0 7080 UBFX R0, R0, #30, #1
0x3418A02E: 4770 BX LR
Section .text.LL_RCC_PLL1_GetSource.85 from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_PLL1_GetSource.85:
0x3418A030: F248 0080 MOVW R0, #0x8080
0x3418A034: F2C5 6002 MOVT R0, #0x5602
0x3418A038: 6800 LDR R0, [R0]
0x3418A03A: F000 40E0 AND R0, R0, #0x70000000
0x3418A03E: 4770 BX LR
Section .text.LL_RCC_PLL1_GetM from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_PLL1_GetM:
0x3418A040: F248 0080 MOVW R0, #0x8080
0x3418A044: F2C5 6002 MOVT R0, #0x5602
0x3418A048: 6800 LDR R0, [R0]
0x3418A04A: F3C0 5005 UBFX R0, R0, #20, #6
0x3418A04E: 4770 BX LR
Section .text.LL_RCC_PLL1_GetN from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_PLL1_GetN:
0x3418A050: F248 0080 MOVW R0, #0x8080
0x3418A054: F2C5 6002 MOVT R0, #0x5602
0x3418A058: 6800 LDR R0, [R0]
0x3418A05A: F3C0 200B UBFX R0, R0, #8, #12
0x3418A05E: 4770 BX LR
Section .text.LL_RCC_PLL1_GetFRACN from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_PLL1_GetFRACN:
0x3418A060: F248 0084 MOVW R0, #0x8084
0x3418A064: F2C5 6002 MOVT R0, #0x5602
0x3418A068: 6800 LDR R0, [R0]
0x3418A06A: F020 407F BIC R0, R0, #0xFF000000
0x3418A06E: 4770 BX LR
Section .text.LL_RCC_PLL1_GetP1 from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_PLL1_GetP1:
0x3418A070: F248 0088 MOVW R0, #0x8088
0x3418A074: F2C5 6002 MOVT R0, #0x5602
0x3418A078: 6800 LDR R0, [R0]
0x3418A07A: F3C0 60C2 UBFX R0, R0, #27, #3
0x3418A07E: 4770 BX LR
Section .text.LL_RCC_PLL1_GetP2 from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_PLL1_GetP2:
0x3418A080: F248 0088 MOVW R0, #0x8088
0x3418A084: F2C5 6002 MOVT R0, #0x5602
0x3418A088: 6800 LDR R0, [R0]
0x3418A08A: F3C0 6002 UBFX R0, R0, #24, #3
0x3418A08E: 4770 BX LR
Section .text.LL_RCC_PLL1_IsEnabledBypass.86 from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_PLL1_IsEnabledBypass.86:
0x3418A090: F248 0080 MOVW R0, #0x8080
0x3418A094: F2C5 6002 MOVT R0, #0x5602
0x3418A098: 6800 LDR R0, [R0]
0x3418A09A: F3C0 60C0 UBFX R0, R0, #27, #1
0x3418A09E: 4770 BX LR
Section .text.LL_RCC_GetAHBPrescaler.87 from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_GetAHBPrescaler.87:
0x3418A0A0: F248 0024 MOVW R0, #0x8024
0x3418A0A4: F2C5 6002 MOVT R0, #0x5602
0x3418A0A8: 6800 LDR R0, [R0]
0x3418A0AA: F400 00E0 AND R0, R0, #0x700000
0x3418A0AE: 4770 BX LR
Section .text.LL_RCC_GetUSBClockSource from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_GetUSBClockSource:
0x3418A0B0: B580 PUSH 123R7, LR}
0x3418A0B2: B082 SUB SP, SP, #8
0x3418A0B4: 9001 STR R0, [SP, #4]
0x3418A0B6: 9801 LDR R0, [SP, #4]
0x3418A0B8: F7FD FE76 BL LL_RCC_GetClockSource ; 0x34187DA8
0x3418A0BC: B002 ADD SP, SP, #8
0x3418A0BE: BD80 POP 123R7, PC}
Section .text.LL_RCC_IC15_IsEnabled from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_IC15_IsEnabled:
0x3418A0C0: F248 2040 MOVW R0, #0x8240
0x3418A0C4: F2C5 6002 MOVT R0, #0x5602
0x3418A0C8: 6800 LDR R0, [R0]
0x3418A0CA: F3C0 3080 UBFX R0, R0, #14, #1
0x3418A0CE: 4770 BX LR
Section .text.LL_RCC_IC15_GetSource from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_IC15_GetSource:
0x3418A0D0: F248 00FC MOVW R0, #0x80FC
0x3418A0D4: F2C5 6002 MOVT R0, #0x5602
0x3418A0D8: 6800 LDR R0, [R0]
0x3418A0DA: F000 5040 AND R0, R0, #0x30000000
0x3418A0DE: 4770 BX LR
Section .text.LL_RCC_GetUARTClockSource from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_GetUARTClockSource:
0x3418A0E0: B580 PUSH 123R7, LR}
0x3418A0E2: B082 SUB SP, SP, #8
0x3418A0E4: 9001 STR R0, [SP, #4]
0x3418A0E6: 9801 LDR R0, [SP, #4]
0x3418A0E8: F7FD FE5E BL LL_RCC_GetClockSource ; 0x34187DA8
0x3418A0EC: B002 ADD SP, SP, #8
0x3418A0EE: BD80 POP 123R7, PC}
Section .text.RCCEx_GetPCLK1Freq from blto2_FSBL_lto.o, size=28, align=4
RCCEx_GetPCLK1Freq:
0x3418A0F0: B580 PUSH 123R7, LR}
0x3418A0F2: B082 SUB SP, SP, #8
0x3418A0F4: 9001 STR R0, [SP, #4]
0x3418A0F6: 9801 LDR R0, [SP, #4]
0x3418A0F8: 9000 STR R0, [SP, #0]
0x3418A0FA: F000 F83D BL LL_RCC_GetAPB1Prescaler.89 ; 0x3418A178
0x3418A0FE: 4601 MOV R1, R0
0x3418A100: 9800 LDR R0, [SP, #0]
0x3418A102: F001 0107 AND R1, R1, #7
0x3418A106: 40C8 LSRS R0, R1
0x3418A108: B002 ADD SP, SP, #8
0x3418A10A: BD80 POP 123R7, PC}
Section .text.RCCEx_GetPCLK2Freq from blto2_FSBL_lto.o, size=28, align=4
RCCEx_GetPCLK2Freq:
0x3418A10C: B580 PUSH 123R7, LR}
0x3418A10E: B082 SUB SP, SP, #8
0x3418A110: 9001 STR R0, [SP, #4]
0x3418A112: 9801 LDR R0, [SP, #4]
0x3418A114: 9000 STR R0, [SP, #0]
0x3418A116: F000 F827 BL LL_RCC_GetAPB2Prescaler.88 ; 0x3418A168
0x3418A11A: 4601 MOV R1, R0
0x3418A11C: 9800 LDR R0, [SP, #0]
0x3418A11E: F3C1 1102 UBFX R1, R1, #4, #3
0x3418A122: 40C8 LSRS R0, R1
0x3418A124: B002 ADD SP, SP, #8
0x3418A126: BD80 POP 123R7, PC}
Section .text.LL_RCC_IC9_IsEnabled from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_IC9_IsEnabled:
0x3418A128: F248 2040 MOVW R0, #0x8240
0x3418A12C: F2C5 6002 MOVT R0, #0x5602
0x3418A130: 6800 LDR R0, [R0]
0x3418A132: F3C0 2000 UBFX R0, R0, #8, #1
0x3418A136: 4770 BX LR
Section .text.LL_RCC_IC9_GetSource from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_IC9_GetSource:
0x3418A138: F248 00E4 MOVW R0, #0x80E4
0x3418A13C: F2C5 6002 MOVT R0, #0x5602
0x3418A140: 6800 LDR R0, [R0]
0x3418A142: F000 5040 AND R0, R0, #0x30000000
0x3418A146: 4770 BX LR
Section .text.LL_RCC_IC14_IsEnabled from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_IC14_IsEnabled:
0x3418A148: F248 2040 MOVW R0, #0x8240
0x3418A14C: F2C5 6002 MOVT R0, #0x5602
0x3418A150: 6800 LDR R0, [R0]
0x3418A152: F3C0 3040 UBFX R0, R0, #13, #1
0x3418A156: 4770 BX LR
Section .text.LL_RCC_IC14_GetSource from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_IC14_GetSource:
0x3418A158: F248 00F8 MOVW R0, #0x80F8
0x3418A15C: F2C5 6002 MOVT R0, #0x5602
0x3418A160: 6800 LDR R0, [R0]
0x3418A162: F000 5040 AND R0, R0, #0x30000000
0x3418A166: 4770 BX LR
Section .text.LL_RCC_GetAPB2Prescaler.88 from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_GetAPB2Prescaler.88:
0x3418A168: F248 0024 MOVW R0, #0x8024
0x3418A16C: F2C5 6002 MOVT R0, #0x5602
0x3418A170: 6800 LDR R0, [R0]
0x3418A172: F000 0070 AND R0, R0, #112
0x3418A176: 4770 BX LR
Section .text.LL_RCC_GetAPB1Prescaler.89 from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_GetAPB1Prescaler.89:
0x3418A178: F248 0024 MOVW R0, #0x8024
0x3418A17C: F2C5 6002 MOVT R0, #0x5602
0x3418A180: 6800 LDR R0, [R0]
0x3418A182: F000 0007 AND R0, R0, #7
0x3418A186: 4770 BX LR
Section .text.RCCEx_GetPCLK4Freq from blto2_FSBL_lto.o, size=28, align=4
RCCEx_GetPCLK4Freq:
0x3418A188: B580 PUSH 123R7, LR}
0x3418A18A: B082 SUB SP, SP, #8
0x3418A18C: 9001 STR R0, [SP, #4]
0x3418A18E: 9801 LDR R0, [SP, #4]
0x3418A190: 9000 STR R0, [SP, #0]
0x3418A192: F000 F817 BL LL_RCC_GetAPB4Prescaler.90 ; 0x3418A1C4
0x3418A196: 4601 MOV R1, R0
0x3418A198: 9800 LDR R0, [SP, #0]
0x3418A19A: F3C1 3102 UBFX R1, R1, #12, #3
0x3418A19E: 40C8 LSRS R0, R1
0x3418A1A0: B002 ADD SP, SP, #8
0x3418A1A2: BD80 POP 123R7, PC}
Section .text.LL_RCC_IC8_IsEnabled from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_IC8_IsEnabled:
0x3418A1A4: F248 2040 MOVW R0, #0x8240
0x3418A1A8: F2C5 6002 MOVT R0, #0x5602
0x3418A1AC: 6800 LDR R0, [R0]
0x3418A1AE: B2C0 UXTB R0, R0
0x3418A1B0: 09C0 LSRS R0, R0, #7
0x3418A1B2: 4770 BX LR
Section .text.LL_RCC_IC8_GetSource from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_IC8_GetSource:
0x3418A1B4: F248 00E0 MOVW R0, #0x80E0
0x3418A1B8: F2C5 6002 MOVT R0, #0x5602
0x3418A1BC: 6800 LDR R0, [R0]
0x3418A1BE: F000 5040 AND R0, R0, #0x30000000
0x3418A1C2: 4770 BX LR
Section .text.LL_RCC_GetAPB4Prescaler.90 from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_GetAPB4Prescaler.90:
0x3418A1C4: F248 0024 MOVW R0, #0x8024
0x3418A1C8: F2C5 6002 MOVT R0, #0x5602
0x3418A1CC: 6800 LDR R0, [R0]
0x3418A1CE: F400 40E0 AND R0, R0, #0x7000
0x3418A1D2: 4770 BX LR
Section .text.LL_RCC_IC7_IsEnabled from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_IC7_IsEnabled:
0x3418A1D4: F248 2040 MOVW R0, #0x8240
0x3418A1D8: F2C5 6002 MOVT R0, #0x5602
0x3418A1DC: 6800 LDR R0, [R0]
0x3418A1DE: F3C0 1080 UBFX R0, R0, #6, #1
0x3418A1E2: 4770 BX LR
Section .text.LL_RCC_IC7_GetSource from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_IC7_GetSource:
0x3418A1E4: F248 00DC MOVW R0, #0x80DC
0x3418A1E8: F2C5 6002 MOVT R0, #0x5602
0x3418A1EC: 6800 LDR R0, [R0]
0x3418A1EE: F000 5040 AND R0, R0, #0x30000000
0x3418A1F2: 4770 BX LR
Section .text.LL_RCC_IC5_IsEnabled from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_IC5_IsEnabled:
0x3418A1F4: F248 2040 MOVW R0, #0x8240
0x3418A1F8: F2C5 6002 MOVT R0, #0x5602
0x3418A1FC: 6800 LDR R0, [R0]
0x3418A1FE: F3C0 1000 UBFX R0, R0, #4, #1
0x3418A202: 4770 BX LR
Section .text.LL_RCC_IC5_GetSource from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_IC5_GetSource:
0x3418A204: F248 00D4 MOVW R0, #0x80D4
0x3418A208: F2C5 6002 MOVT R0, #0x5602
0x3418A20C: 6800 LDR R0, [R0]
0x3418A20E: F000 5040 AND R0, R0, #0x30000000
0x3418A212: 4770 BX LR
Section .text.LL_RCC_LSI_IsReady.91 from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_LSI_IsReady.91:
0x3418A214: F248 0004 MOVW R0, #0x8004
0x3418A218: F2C5 6002 MOVT R0, #0x5602
0x3418A21C: 6800 LDR R0, [R0]
0x3418A21E: F000 0001 AND R0, R0, #1
0x3418A222: 4770 BX LR
Section .text.LL_RCC_IC20_IsEnabled from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_IC20_IsEnabled:
0x3418A224: F248 2040 MOVW R0, #0x8240
0x3418A228: F2C5 6002 MOVT R0, #0x5602
0x3418A22C: 6800 LDR R0, [R0]
0x3418A22E: F3C0 40C0 UBFX R0, R0, #19, #1
0x3418A232: 4770 BX LR
Section .text.LL_RCC_IC20_GetSource from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_IC20_GetSource:
0x3418A234: F248 1010 MOVW R0, #0x8110
0x3418A238: F2C5 6002 MOVT R0, #0x5602
0x3418A23C: 6800 LDR R0, [R0]
0x3418A23E: F000 5040 AND R0, R0, #0x30000000
0x3418A242: 4770 BX LR
Section .text.RCCEx_GetPCLK5Freq from blto2_FSBL_lto.o, size=28, align=4
RCCEx_GetPCLK5Freq:
0x3418A244: B580 PUSH 123R7, LR}
0x3418A246: B082 SUB SP, SP, #8
0x3418A248: 9001 STR R0, [SP, #4]
0x3418A24A: 9801 LDR R0, [SP, #4]
0x3418A24C: 9000 STR R0, [SP, #0]
0x3418A24E: F000 F817 BL LL_RCC_GetAPB5Prescaler.92 ; 0x3418A280
0x3418A252: 4601 MOV R1, R0
0x3418A254: 9800 LDR R0, [SP, #0]
0x3418A256: F3C1 4102 UBFX R1, R1, #16, #3
0x3418A25A: 40C8 LSRS R0, R1
0x3418A25C: B002 ADD SP, SP, #8
0x3418A25E: BD80 POP 123R7, PC}
Section .text.LL_RCC_IC16_IsEnabled from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_IC16_IsEnabled:
0x3418A260: F248 2040 MOVW R0, #0x8240
0x3418A264: F2C5 6002 MOVT R0, #0x5602
0x3418A268: 6800 LDR R0, [R0]
0x3418A26A: B280 UXTH R0, R0
0x3418A26C: 0BC0 LSRS R0, R0, #15
0x3418A26E: 4770 BX LR
Section .text.LL_RCC_IC16_GetSource from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_IC16_GetSource:
0x3418A270: F248 1000 MOVW R0, #0x8100
0x3418A274: F2C5 6002 MOVT R0, #0x5602
0x3418A278: 6800 LDR R0, [R0]
0x3418A27A: F000 5040 AND R0, R0, #0x30000000
0x3418A27E: 4770 BX LR
Section .text.LL_RCC_GetAPB5Prescaler.92 from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_GetAPB5Prescaler.92:
0x3418A280: F248 0024 MOVW R0, #0x8024
0x3418A284: F2C5 6002 MOVT R0, #0x5602
0x3418A288: 6800 LDR R0, [R0]
0x3418A28A: F400 20E0 AND R0, R0, #0x070000
0x3418A28E: 4770 BX LR
Section .text.LL_RCC_IC10_IsEnabled from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_IC10_IsEnabled:
0x3418A290: F248 2040 MOVW R0, #0x8240
0x3418A294: F2C5 6002 MOVT R0, #0x5602
0x3418A298: 6800 LDR R0, [R0]
0x3418A29A: F3C0 2040 UBFX R0, R0, #9, #1
0x3418A29E: 4770 BX LR
Section .text.LL_RCC_IC10_GetSource from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_IC10_GetSource:
0x3418A2A0: F248 00E8 MOVW R0, #0x80E8
0x3418A2A4: F2C5 6002 MOVT R0, #0x5602
0x3418A2A8: 6800 LDR R0, [R0]
0x3418A2AA: F000 5040 AND R0, R0, #0x30000000
0x3418A2AE: 4770 BX LR
Section .text.LL_RCC_IC19_IsEnabled from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_IC19_IsEnabled:
0x3418A2B0: F248 2040 MOVW R0, #0x8240
0x3418A2B4: F2C5 6002 MOVT R0, #0x5602
0x3418A2B8: 6800 LDR R0, [R0]
0x3418A2BA: F3C0 4080 UBFX R0, R0, #18, #1
0x3418A2BE: 4770 BX LR
Section .text.LL_RCC_IC19_GetSource from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_IC19_GetSource:
0x3418A2C0: F248 100C MOVW R0, #0x810C
0x3418A2C4: F2C5 6002 MOVT R0, #0x5602
0x3418A2C8: 6800 LDR R0, [R0]
0x3418A2CA: F000 5040 AND R0, R0, #0x30000000
0x3418A2CE: 4770 BX LR
Section .text.LL_RCC_IC13_IsEnabled from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_IC13_IsEnabled:
0x3418A2D0: F248 2040 MOVW R0, #0x8240
0x3418A2D4: F2C5 6002 MOVT R0, #0x5602
0x3418A2D8: 6800 LDR R0, [R0]
0x3418A2DA: F3C0 3000 UBFX R0, R0, #12, #1
0x3418A2DE: 4770 BX LR
Section .text.LL_RCC_IC13_GetSource from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_IC13_GetSource:
0x3418A2E0: F248 00F4 MOVW R0, #0x80F4
0x3418A2E4: F2C5 6002 MOVT R0, #0x5602
0x3418A2E8: 6800 LDR R0, [R0]
0x3418A2EA: F000 5040 AND R0, R0, #0x30000000
0x3418A2EE: 4770 BX LR
Section .text.LL_RCC_IC12_IsEnabled from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_IC12_IsEnabled:
0x3418A2F0: F248 2040 MOVW R0, #0x8240
0x3418A2F4: F2C5 6002 MOVT R0, #0x5602
0x3418A2F8: 6800 LDR R0, [R0]
0x3418A2FA: F3C0 20C0 UBFX R0, R0, #11, #1
0x3418A2FE: 4770 BX LR
Section .text.LL_RCC_IC12_GetSource from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_IC12_GetSource:
0x3418A300: F248 00F0 MOVW R0, #0x80F0
0x3418A304: F2C5 6002 MOVT R0, #0x5602
0x3418A308: 6800 LDR R0, [R0]
0x3418A30A: F000 5040 AND R0, R0, #0x30000000
0x3418A30E: 4770 BX LR
Section .text.LL_RCC_IC17_IsEnabled from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_IC17_IsEnabled:
0x3418A310: F248 2040 MOVW R0, #0x8240
0x3418A314: F2C5 6002 MOVT R0, #0x5602
0x3418A318: 6800 LDR R0, [R0]
0x3418A31A: F3C0 4000 UBFX R0, R0, #16, #1
0x3418A31E: 4770 BX LR
Section .text.LL_RCC_IC17_GetSource from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_IC17_GetSource:
0x3418A320: F248 1004 MOVW R0, #0x8104
0x3418A324: F2C5 6002 MOVT R0, #0x5602
0x3418A328: 6800 LDR R0, [R0]
0x3418A32A: F000 5040 AND R0, R0, #0x30000000
0x3418A32E: 4770 BX LR
Section .text.LL_RCC_CLKP_IsEnabled from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_CLKP_IsEnabled:
0x3418A330: F248 2048 MOVW R0, #0x8248
0x3418A334: F2C5 6002 MOVT R0, #0x5602
0x3418A338: 6800 LDR R0, [R0]
0x3418A33A: F3C0 1080 UBFX R0, R0, #6, #1
0x3418A33E: 4770 BX LR
Section .text.LL_RCC_IC18_IsEnabled from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_IC18_IsEnabled:
0x3418A340: F248 2040 MOVW R0, #0x8240
0x3418A344: F2C5 6002 MOVT R0, #0x5602
0x3418A348: 6800 LDR R0, [R0]
0x3418A34A: F3C0 4040 UBFX R0, R0, #17, #1
0x3418A34E: 4770 BX LR
Section .text.LL_RCC_IC18_GetSource from blto2_FSBL_lto.o, size=16, align=4
LL_RCC_IC18_GetSource:
0x3418A350: F248 1008 MOVW R0, #0x8108
0x3418A354: F2C5 6002 MOVT R0, #0x5602
0x3418A358: 6800 LDR R0, [R0]
0x3418A35A: F000 5040 AND R0, R0, #0x30000000
0x3418A35E: 4770 BX LR
Section .text.HAL_XSPI_Init from blto2_FSBL_lto.o, size=1548, align=4
HAL_XSPI_Init:
0x3418A360: B580 PUSH 123R7, LR}
0x3418A362: B086 SUB SP, SP, #24
0x3418A364: 9004 STR R0, [SP, #16]
0x3418A366: 2000 MOVS R0, #0
0x3418A368: F88D 000F STRB.W R0, [SP, #15]
0x3418A36C: F7F6 FC7C BL HAL_GetTick ; 0x34180C68
0x3418A370: 9002 STR R0, [SP, #8]
0x3418A372: 9804 LDR R0, [SP, #16]
0x3418A374: B918 CBNZ R0, .L1 ; 0x3418A37E
0x3418A376: 2001 MOVS R0, #1
0x3418A378: F88D 000F STRB.W R0, [SP, #15]
0x3418A37C: E2EE B 46L45 ; 0x3418A95C
.L1:
0x3418A37E: 9804 LDR R0, [SP, #16]
0x3418A380: 6880 LDR R0, [R0, #8]
0x3418A382: B118 CBZ R0, .L2 ; 0x3418A38C
0x3418A384: 9804 LDR R0, [SP, #16]
0x3418A386: 6880 LDR R0, [R0, #8]
0x3418A388: 2840 CMP R0, #64
0x3418A38A: D100 BNE 46L3 ; 0x3418A38E
.L2:
0x3418A38C: E007 B 46L4 ; 0x3418A39E
.L3:
0x3418A38E: F642 305A MOVW R0, #0x2B5A ; 0x34192B5A = .rodata..L.str.95
0x3418A392: F2C3 4019 MOVT R0, #0x3419 ; 0x34192B5A = .rodata..L.str.95
0x3418A396: F44F 71B2 MOV.W R1, #0x0164
0x3418A39A: F002 FCC9 BL assert_failed ; 0x3418CD30
.L4:
0x3418A39E: 9804 LDR R0, [SP, #16]
0x3418A3A0: 68C0 LDR R0, [R0, #12]
0x3418A3A2: B1C0 CBZ R0, .L5 ; 0x3418A3D6
0x3418A3A4: 9804 LDR R0, [SP, #16]
0x3418A3A6: 68C0 LDR R0, [R0, #12]
0x3418A3A8: F1B0 7F80 CMP.W R0, #0x01000000
0x3418A3AC: D013 BEQ 46L5 ; 0x3418A3D6
0x3418A3AE: 9804 LDR R0, [SP, #16]
0x3418A3B0: 68C0 LDR R0, [R0, #12]
0x3418A3B2: F1B0 7F00 CMP.W R0, #0x02000000
0x3418A3B6: D00E BEQ 46L5 ; 0x3418A3D6
0x3418A3B8: 9804 LDR R0, [SP, #16]
0x3418A3BA: 68C0 LDR R0, [R0, #12]
0x3418A3BC: F1B0 7F40 CMP.W R0, #0x03000000
0x3418A3C0: D009 BEQ 46L5 ; 0x3418A3D6
0x3418A3C2: 9804 LDR R0, [SP, #16]
0x3418A3C4: 68C0 LDR R0, [R0, #12]
0x3418A3C6: F1B0 6F80 CMP.W R0, #0x04000000
0x3418A3CA: D004 BEQ 46L5 ; 0x3418A3D6
0x3418A3CC: 9804 LDR R0, [SP, #16]
0x3418A3CE: 68C0 LDR R0, [R0, #12]
0x3418A3D0: F1B0 6FC0 CMP.W R0, #0x06000000
0x3418A3D4: D100 BNE 46L6 ; 0x3418A3D8
.L5:
0x3418A3D6: E007 B 46L7 ; 0x3418A3E8
.L6:
0x3418A3D8: F642 305A MOVW R0, #0x2B5A ; 0x34192B5A = .rodata..L.str.95
0x3418A3DC: F2C3 4019 MOVT R0, #0x3419 ; 0x34192B5A = .rodata..L.str.95
0x3418A3E0: F240 1165 MOVW R1, #0x0165
0x3418A3E4: F002 FCA4 BL assert_failed ; 0x3418CD30
.L7:
0x3418A3E8: 9804 LDR R0, [SP, #16]
0x3418A3EA: 6900 LDR R0, [R0, #16]
0x3418A3EC: 2800 CMP R0, #0
0x3418A3EE: D07B BEQ 46L8 ; 0x3418A4E8
0x3418A3F0: 9804 LDR R0, [SP, #16]
0x3418A3F2: 6900 LDR R0, [R0, #16]
0x3418A3F4: 2801 CMP R0, #1
0x3418A3F6: D077 BEQ 46L8 ; 0x3418A4E8
0x3418A3F8: 9804 LDR R0, [SP, #16]
0x3418A3FA: 6900 LDR R0, [R0, #16]
0x3418A3FC: 2802 CMP R0, #2
0x3418A3FE: D073 BEQ 46L8 ; 0x3418A4E8
0x3418A400: 9804 LDR R0, [SP, #16]
0x3418A402: 6900 LDR R0, [R0, #16]
0x3418A404: 2803 CMP R0, #3
0x3418A406: D06F BEQ 46L8 ; 0x3418A4E8
0x3418A408: 9804 LDR R0, [SP, #16]
0x3418A40A: 6900 LDR R0, [R0, #16]
0x3418A40C: 2804 CMP R0, #4
0x3418A40E: D06B BEQ 46L8 ; 0x3418A4E8
0x3418A410: 9804 LDR R0, [SP, #16]
0x3418A412: 6900 LDR R0, [R0, #16]
0x3418A414: 2805 CMP R0, #5
0x3418A416: D067 BEQ 46L8 ; 0x3418A4E8
0x3418A418: 9804 LDR R0, [SP, #16]
0x3418A41A: 6900 LDR R0, [R0, #16]
0x3418A41C: 2806 CMP R0, #6
0x3418A41E: D063 BEQ 46L8 ; 0x3418A4E8
0x3418A420: 9804 LDR R0, [SP, #16]
0x3418A422: 6900 LDR R0, [R0, #16]
0x3418A424: 2807 CMP R0, #7
0x3418A426: D05F BEQ 46L8 ; 0x3418A4E8
0x3418A428: 9804 LDR R0, [SP, #16]
0x3418A42A: 6900 LDR R0, [R0, #16]
0x3418A42C: 2808 CMP R0, #8
0x3418A42E: D05B BEQ 46L8 ; 0x3418A4E8
0x3418A430: 9804 LDR R0, [SP, #16]
0x3418A432: 6900 LDR R0, [R0, #16]
0x3418A434: 2809 CMP R0, #9
0x3418A436: D057 BEQ 46L8 ; 0x3418A4E8
0x3418A438: 9804 LDR R0, [SP, #16]
0x3418A43A: 6900 LDR R0, [R0, #16]
0x3418A43C: 280A CMP R0, #10
0x3418A43E: D053 BEQ 46L8 ; 0x3418A4E8
0x3418A440: 9804 LDR R0, [SP, #16]
0x3418A442: 6900 LDR R0, [R0, #16]
0x3418A444: 280B CMP R0, #11
0x3418A446: D04F BEQ 46L8 ; 0x3418A4E8
0x3418A448: 9804 LDR R0, [SP, #16]
0x3418A44A: 6900 LDR R0, [R0, #16]
0x3418A44C: 280C CMP R0, #12
0x3418A44E: D04B BEQ 46L8 ; 0x3418A4E8
0x3418A450: 9804 LDR R0, [SP, #16]
0x3418A452: 6900 LDR R0, [R0, #16]
0x3418A454: 280D CMP R0, #13
0x3418A456: D047 BEQ 46L8 ; 0x3418A4E8
0x3418A458: 9804 LDR R0, [SP, #16]
0x3418A45A: 6900 LDR R0, [R0, #16]
0x3418A45C: 280E CMP R0, #14
0x3418A45E: D043 BEQ 46L8 ; 0x3418A4E8
0x3418A460: 9804 LDR R0, [SP, #16]
0x3418A462: 6900 LDR R0, [R0, #16]
0x3418A464: 280F CMP R0, #15
0x3418A466: D03F BEQ 46L8 ; 0x3418A4E8
0x3418A468: 9804 LDR R0, [SP, #16]
0x3418A46A: 6900 LDR R0, [R0, #16]
0x3418A46C: 2810 CMP R0, #16
0x3418A46E: D03B BEQ 46L8 ; 0x3418A4E8
0x3418A470: 9804 LDR R0, [SP, #16]
0x3418A472: 6900 LDR R0, [R0, #16]
0x3418A474: 2811 CMP R0, #17
0x3418A476: D037 BEQ 46L8 ; 0x3418A4E8
0x3418A478: 9804 LDR R0, [SP, #16]
0x3418A47A: 6900 LDR R0, [R0, #16]
0x3418A47C: 2812 CMP R0, #18
0x3418A47E: D033 BEQ 46L8 ; 0x3418A4E8
0x3418A480: 9804 LDR R0, [SP, #16]
0x3418A482: 6900 LDR R0, [R0, #16]
0x3418A484: 2813 CMP R0, #19
0x3418A486: D02F BEQ 46L8 ; 0x3418A4E8
0x3418A488: 9804 LDR R0, [SP, #16]
0x3418A48A: 6900 LDR R0, [R0, #16]
0x3418A48C: 2814 CMP R0, #20
0x3418A48E: D02B BEQ 46L8 ; 0x3418A4E8
0x3418A490: 9804 LDR R0, [SP, #16]
0x3418A492: 6900 LDR R0, [R0, #16]
0x3418A494: 2815 CMP R0, #21
0x3418A496: D027 BEQ 46L8 ; 0x3418A4E8
0x3418A498: 9804 LDR R0, [SP, #16]
0x3418A49A: 6900 LDR R0, [R0, #16]
0x3418A49C: 2816 CMP R0, #22
0x3418A49E: D023 BEQ 46L8 ; 0x3418A4E8
0x3418A4A0: 9804 LDR R0, [SP, #16]
0x3418A4A2: 6900 LDR R0, [R0, #16]
0x3418A4A4: 2817 CMP R0, #23
0x3418A4A6: D01F BEQ 46L8 ; 0x3418A4E8
0x3418A4A8: 9804 LDR R0, [SP, #16]
0x3418A4AA: 6900 LDR R0, [R0, #16]
0x3418A4AC: 2818 CMP R0, #24
0x3418A4AE: D01B BEQ 46L8 ; 0x3418A4E8
0x3418A4B0: 9804 LDR R0, [SP, #16]
0x3418A4B2: 6900 LDR R0, [R0, #16]
0x3418A4B4: 2819 CMP R0, #25
0x3418A4B6: D017 BEQ 46L8 ; 0x3418A4E8
0x3418A4B8: 9804 LDR R0, [SP, #16]
0x3418A4BA: 6900 LDR R0, [R0, #16]
0x3418A4BC: 281A CMP R0, #26
0x3418A4BE: D013 BEQ 46L8 ; 0x3418A4E8
0x3418A4C0: 9804 LDR R0, [SP, #16]
0x3418A4C2: 6900 LDR R0, [R0, #16]
0x3418A4C4: 281B CMP R0, #27
0x3418A4C6: D00F BEQ 46L8 ; 0x3418A4E8
0x3418A4C8: 9804 LDR R0, [SP, #16]
0x3418A4CA: 6900 LDR R0, [R0, #16]
0x3418A4CC: 281C CMP R0, #28
0x3418A4CE: D00B BEQ 46L8 ; 0x3418A4E8
0x3418A4D0: 9804 LDR R0, [SP, #16]
0x3418A4D2: 6900 LDR R0, [R0, #16]
0x3418A4D4: 281D CMP R0, #29
0x3418A4D6: D007 BEQ 46L8 ; 0x3418A4E8
0x3418A4D8: 9804 LDR R0, [SP, #16]
0x3418A4DA: 6900 LDR R0, [R0, #16]
0x3418A4DC: 281E CMP R0, #30
0x3418A4DE: D003 BEQ 46L8 ; 0x3418A4E8
0x3418A4E0: 9804 LDR R0, [SP, #16]
0x3418A4E2: 6900 LDR R0, [R0, #16]
0x3418A4E4: 281F CMP R0, #31
0x3418A4E6: D100 BNE 46L9 ; 0x3418A4EA
.L8:
0x3418A4E8: E007 B 46L10 ; 0x3418A4FA
.L9:
0x3418A4EA: F642 305A MOVW R0, #0x2B5A ; 0x34192B5A = .rodata..L.str.95
0x3418A4EE: F2C3 4019 MOVT R0, #0x3419 ; 0x34192B5A = .rodata..L.str.95
0x3418A4F2: F44F 71B3 MOV.W R1, #0x0166
0x3418A4F6: F002 FC1B BL assert_failed ; 0x3418CD30
.L10:
0x3418A4FA: 9804 LDR R0, [SP, #16]
0x3418A4FC: 6940 LDR R0, [R0, #20]
0x3418A4FE: B120 CBZ R0, .L11 ; 0x3418A50A
0x3418A500: 9804 LDR R0, [SP, #16]
0x3418A502: 6940 LDR R0, [R0, #20]
0x3418A504: 2840 CMP R0, #64
0x3418A506: D800 BHI 46L11 ; 0x3418A50A
0x3418A508: E007 B 46L12 ; 0x3418A51A
.L11:
0x3418A50A: F642 305A MOVW R0, #0x2B5A ; 0x34192B5A = .rodata..L.str.95
0x3418A50E: F2C3 4019 MOVT R0, #0x3419 ; 0x34192B5A = .rodata..L.str.95
0x3418A512: F240 1167 MOVW R1, #0x0167
0x3418A516: F002 FC0B BL assert_failed ; 0x3418CD30
.L12:
0x3418A51A: 9804 LDR R0, [SP, #16]
0x3418A51C: 6980 LDR R0, [R0, #24]
0x3418A51E: B118 CBZ R0, .L13 ; 0x3418A528
0x3418A520: 9804 LDR R0, [SP, #16]
0x3418A522: 6980 LDR R0, [R0, #24]
0x3418A524: 2802 CMP R0, #2
0x3418A526: D100 BNE 46L14 ; 0x3418A52A
.L13:
0x3418A528: E007 B 46L15 ; 0x3418A53A
.L14:
0x3418A52A: F642 305A MOVW R0, #0x2B5A ; 0x34192B5A = .rodata..L.str.95
0x3418A52E: F2C3 4019 MOVT R0, #0x3419 ; 0x34192B5A = .rodata..L.str.95
0x3418A532: F44F 71B4 MOV.W R1, #0x0168
0x3418A536: F002 FBFB BL assert_failed ; 0x3418CD30
.L15:
0x3418A53A: 9804 LDR R0, [SP, #16]
0x3418A53C: 69C0 LDR R0, [R0, #28]
0x3418A53E: B118 CBZ R0, .L16 ; 0x3418A548
0x3418A540: 9804 LDR R0, [SP, #16]
0x3418A542: 69C0 LDR R0, [R0, #28]
0x3418A544: 2801 CMP R0, #1
0x3418A546: D100 BNE 46L17 ; 0x3418A54A
.L16:
0x3418A548: E007 B 46L18 ; 0x3418A55A
.L17:
0x3418A54A: F642 305A MOVW R0, #0x2B5A ; 0x34192B5A = .rodata..L.str.95
0x3418A54E: F2C3 4019 MOVT R0, #0x3419 ; 0x34192B5A = .rodata..L.str.95
0x3418A552: F240 1169 MOVW R1, #0x0169
0x3418A556: F002 FBEB BL assert_failed ; 0x3418CD30
.L18:
0x3418A55A: 9804 LDR R0, [SP, #16]
0x3418A55C: 6A00 LDR R0, [R0, #32]
0x3418A55E: B198 CBZ R0, .L19 ; 0x3418A588
0x3418A560: 9804 LDR R0, [SP, #16]
0x3418A562: 6A00 LDR R0, [R0, #32]
0x3418A564: F5B0 3F00 CMP.W R0, #0x020000
0x3418A568: D00E BEQ 46L19 ; 0x3418A588
0x3418A56A: 9804 LDR R0, [SP, #16]
0x3418A56C: 6A00 LDR R0, [R0, #32]
0x3418A56E: F5B0 3F40 CMP.W R0, #0x030000
0x3418A572: D009 BEQ 46L19 ; 0x3418A588
0x3418A574: 9804 LDR R0, [SP, #16]
0x3418A576: 6A00 LDR R0, [R0, #32]
0x3418A578: F5B0 2F80 CMP.W R0, #0x040000
0x3418A57C: D004 BEQ 46L19 ; 0x3418A588
0x3418A57E: 9804 LDR R0, [SP, #16]
0x3418A580: 6A00 LDR R0, [R0, #32]
0x3418A582: F5B0 2FA0 CMP.W R0, #0x050000
0x3418A586: D100 BNE 46L20 ; 0x3418A58A
.L19:
0x3418A588: E007 B 46L21 ; 0x3418A59A
.L20:
0x3418A58A: F642 305A MOVW R0, #0x2B5A ; 0x34192B5A = .rodata..L.str.95
0x3418A58E: F2C3 4019 MOVT R0, #0x3419 ; 0x34192B5A = .rodata..L.str.95
0x3418A592: F44F 71B5 MOV.W R1, #0x016A
0x3418A596: F002 FBCB BL assert_failed ; 0x3418CD30
.L21:
0x3418A59A: 9804 LDR R0, [SP, #16]
0x3418A59C: 6A40 LDR R0, [R0, #36]
0x3418A59E: 28FF CMP R0, #255
0x3418A5A0: D800 BHI 46L22 ; 0x3418A5A4
0x3418A5A2: E007 B 46L23 ; 0x3418A5B4
.L22:
0x3418A5A4: F642 305A MOVW R0, #0x2B5A ; 0x34192B5A = .rodata..L.str.95
0x3418A5A8: F2C3 4019 MOVT R0, #0x3419 ; 0x34192B5A = .rodata..L.str.95
0x3418A5AC: F240 116B MOVW R1, #0x016B
0x3418A5B0: F002 FBBE BL assert_failed ; 0x3418CD30
.L23:
0x3418A5B4: 9804 LDR R0, [SP, #16]
0x3418A5B6: 6A80 LDR R0, [R0, #40]
0x3418A5B8: B120 CBZ R0, .L24 ; 0x3418A5C4
0x3418A5BA: 9804 LDR R0, [SP, #16]
0x3418A5BC: 6A80 LDR R0, [R0, #40]
0x3418A5BE: F1B0 4F80 CMP.W R0, #0x40000000
0x3418A5C2: D100 BNE 46L25 ; 0x3418A5C6
.L24:
0x3418A5C4: E007 B 46L26 ; 0x3418A5D6
.L25:
0x3418A5C6: F642 305A MOVW R0, #0x2B5A ; 0x34192B5A = .rodata..L.str.95
0x3418A5CA: F2C3 4019 MOVT R0, #0x3419 ; 0x34192B5A = .rodata..L.str.95
0x3418A5CE: F44F 71B6 MOV.W R1, #0x016C
0x3418A5D2: F002 FBAD BL assert_failed ; 0x3418CD30
.L26:
0x3418A5D6: 9804 LDR R0, [SP, #16]
0x3418A5D8: 6B00 LDR R0, [R0, #48]
0x3418A5DA: 2800 CMP R0, #0
0x3418A5DC: D07B BEQ 46L27 ; 0x3418A6D6
0x3418A5DE: 9804 LDR R0, [SP, #16]
0x3418A5E0: 6B00 LDR R0, [R0, #48]
0x3418A5E2: 2801 CMP R0, #1
0x3418A5E4: D077 BEQ 46L27 ; 0x3418A6D6
0x3418A5E6: 9804 LDR R0, [SP, #16]
0x3418A5E8: 6B00 LDR R0, [R0, #48]
0x3418A5EA: 2802 CMP R0, #2
0x3418A5EC: D073 BEQ 46L27 ; 0x3418A6D6
0x3418A5EE: 9804 LDR R0, [SP, #16]
0x3418A5F0: 6B00 LDR R0, [R0, #48]
0x3418A5F2: 2803 CMP R0, #3
0x3418A5F4: D06F BEQ 46L27 ; 0x3418A6D6
0x3418A5F6: 9804 LDR R0, [SP, #16]
0x3418A5F8: 6B00 LDR R0, [R0, #48]
0x3418A5FA: 2804 CMP R0, #4
0x3418A5FC: D06B BEQ 46L27 ; 0x3418A6D6
0x3418A5FE: 9804 LDR R0, [SP, #16]
0x3418A600: 6B00 LDR R0, [R0, #48]
0x3418A602: 2805 CMP R0, #5
0x3418A604: D067 BEQ 46L27 ; 0x3418A6D6
0x3418A606: 9804 LDR R0, [SP, #16]
0x3418A608: 6B00 LDR R0, [R0, #48]
0x3418A60A: 2806 CMP R0, #6
0x3418A60C: D063 BEQ 46L27 ; 0x3418A6D6
0x3418A60E: 9804 LDR R0, [SP, #16]
0x3418A610: 6B00 LDR R0, [R0, #48]
0x3418A612: 2807 CMP R0, #7
0x3418A614: D05F BEQ 46L27 ; 0x3418A6D6
0x3418A616: 9804 LDR R0, [SP, #16]
0x3418A618: 6B00 LDR R0, [R0, #48]
0x3418A61A: 2808 CMP R0, #8
0x3418A61C: D05B BEQ 46L27 ; 0x3418A6D6
0x3418A61E: 9804 LDR R0, [SP, #16]
0x3418A620: 6B00 LDR R0, [R0, #48]
0x3418A622: 2809 CMP R0, #9
0x3418A624: D057 BEQ 46L27 ; 0x3418A6D6
0x3418A626: 9804 LDR R0, [SP, #16]
0x3418A628: 6B00 LDR R0, [R0, #48]
0x3418A62A: 280A CMP R0, #10
0x3418A62C: D053 BEQ 46L27 ; 0x3418A6D6
0x3418A62E: 9804 LDR R0, [SP, #16]
0x3418A630: 6B00 LDR R0, [R0, #48]
0x3418A632: 280B CMP R0, #11
0x3418A634: D04F BEQ 46L27 ; 0x3418A6D6
0x3418A636: 9804 LDR R0, [SP, #16]
0x3418A638: 6B00 LDR R0, [R0, #48]
0x3418A63A: 280C CMP R0, #12
0x3418A63C: D04B BEQ 46L27 ; 0x3418A6D6
0x3418A63E: 9804 LDR R0, [SP, #16]
0x3418A640: 6B00 LDR R0, [R0, #48]
0x3418A642: 280D CMP R0, #13
0x3418A644: D047 BEQ 46L27 ; 0x3418A6D6
0x3418A646: 9804 LDR R0, [SP, #16]
0x3418A648: 6B00 LDR R0, [R0, #48]
0x3418A64A: 280E CMP R0, #14
0x3418A64C: D043 BEQ 46L27 ; 0x3418A6D6
0x3418A64E: 9804 LDR R0, [SP, #16]
0x3418A650: 6B00 LDR R0, [R0, #48]
0x3418A652: 280F CMP R0, #15
0x3418A654: D03F BEQ 46L27 ; 0x3418A6D6
0x3418A656: 9804 LDR R0, [SP, #16]
0x3418A658: 6B00 LDR R0, [R0, #48]
0x3418A65A: 2810 CMP R0, #16
0x3418A65C: D03B BEQ 46L27 ; 0x3418A6D6
0x3418A65E: 9804 LDR R0, [SP, #16]
0x3418A660: 6B00 LDR R0, [R0, #48]
0x3418A662: 2811 CMP R0, #17
0x3418A664: D037 BEQ 46L27 ; 0x3418A6D6
0x3418A666: 9804 LDR R0, [SP, #16]
0x3418A668: 6B00 LDR R0, [R0, #48]
0x3418A66A: 2812 CMP R0, #18
0x3418A66C: D033 BEQ 46L27 ; 0x3418A6D6
0x3418A66E: 9804 LDR R0, [SP, #16]
0x3418A670: 6B00 LDR R0, [R0, #48]
0x3418A672: 2813 CMP R0, #19
0x3418A674: D02F BEQ 46L27 ; 0x3418A6D6
0x3418A676: 9804 LDR R0, [SP, #16]
0x3418A678: 6B00 LDR R0, [R0, #48]
0x3418A67A: 2814 CMP R0, #20
0x3418A67C: D02B BEQ 46L27 ; 0x3418A6D6
0x3418A67E: 9804 LDR R0, [SP, #16]
0x3418A680: 6B00 LDR R0, [R0, #48]
0x3418A682: 2815 CMP R0, #21
0x3418A684: D027 BEQ 46L27 ; 0x3418A6D6
0x3418A686: 9804 LDR R0, [SP, #16]
0x3418A688: 6B00 LDR R0, [R0, #48]
0x3418A68A: 2816 CMP R0, #22
0x3418A68C: D023 BEQ 46L27 ; 0x3418A6D6
0x3418A68E: 9804 LDR R0, [SP, #16]
0x3418A690: 6B00 LDR R0, [R0, #48]
0x3418A692: 2817 CMP R0, #23
0x3418A694: D01F BEQ 46L27 ; 0x3418A6D6
0x3418A696: 9804 LDR R0, [SP, #16]
0x3418A698: 6B00 LDR R0, [R0, #48]
0x3418A69A: 2818 CMP R0, #24
0x3418A69C: D01B BEQ 46L27 ; 0x3418A6D6
0x3418A69E: 9804 LDR R0, [SP, #16]
0x3418A6A0: 6B00 LDR R0, [R0, #48]
0x3418A6A2: 2819 CMP R0, #25
0x3418A6A4: D017 BEQ 46L27 ; 0x3418A6D6
0x3418A6A6: 9804 LDR R0, [SP, #16]
0x3418A6A8: 6B00 LDR R0, [R0, #48]
0x3418A6AA: 281A CMP R0, #26
0x3418A6AC: D013 BEQ 46L27 ; 0x3418A6D6
0x3418A6AE: 9804 LDR R0, [SP, #16]
0x3418A6B0: 6B00 LDR R0, [R0, #48]
0x3418A6B2: 281B CMP R0, #27
0x3418A6B4: D00F BEQ 46L27 ; 0x3418A6D6
0x3418A6B6: 9804 LDR R0, [SP, #16]
0x3418A6B8: 6B00 LDR R0, [R0, #48]
0x3418A6BA: 281C CMP R0, #28
0x3418A6BC: D00B BEQ 46L27 ; 0x3418A6D6
0x3418A6BE: 9804 LDR R0, [SP, #16]
0x3418A6C0: 6B00 LDR R0, [R0, #48]
0x3418A6C2: 281D CMP R0, #29
0x3418A6C4: D007 BEQ 46L27 ; 0x3418A6D6
0x3418A6C6: 9804 LDR R0, [SP, #16]
0x3418A6C8: 6B00 LDR R0, [R0, #48]
0x3418A6CA: 281E CMP R0, #30
0x3418A6CC: D003 BEQ 46L27 ; 0x3418A6D6
0x3418A6CE: 9804 LDR R0, [SP, #16]
0x3418A6D0: 6B00 LDR R0, [R0, #48]
0x3418A6D2: 281F CMP R0, #31
0x3418A6D4: D100 BNE 46L28 ; 0x3418A6D8
.L27:
0x3418A6D6: E007 B 46L29 ; 0x3418A6E8
.L28:
0x3418A6D8: F642 305A MOVW R0, #0x2B5A ; 0x34192B5A = .rodata..L.str.95
0x3418A6DC: F2C3 4019 MOVT R0, #0x3419 ; 0x34192B5A = .rodata..L.str.95
0x3418A6E0: F240 116D MOVW R1, #0x016D
0x3418A6E4: F002 FB24 BL assert_failed ; 0x3418CD30
.L29:
0x3418A6E8: 9804 LDR R0, [SP, #16]
0x3418A6EA: 6840 LDR R0, [R0, #4]
0x3418A6EC: B120 CBZ R0, .L30 ; 0x3418A6F8
0x3418A6EE: 9804 LDR R0, [SP, #16]
0x3418A6F0: 6840 LDR R0, [R0, #4]
0x3418A6F2: 2840 CMP R0, #64
0x3418A6F4: D800 BHI 46L30 ; 0x3418A6F8
0x3418A6F6: E007 B 46L31 ; 0x3418A708
.L30:
0x3418A6F8: F642 305A MOVW R0, #0x2B5A ; 0x34192B5A = .rodata..L.str.95
0x3418A6FC: F2C3 4019 MOVT R0, #0x3419 ; 0x34192B5A = .rodata..L.str.95
0x3418A700: F44F 71B7 MOV.W R1, #0x016E
0x3418A704: F002 FB14 BL assert_failed ; 0x3418CD30
.L31:
0x3418A708: 9804 LDR R0, [SP, #16]
0x3418A70A: 6B40 LDR R0, [R0, #52]
0x3418A70C: 28FF CMP R0, #255
0x3418A70E: D800 BHI 46L32 ; 0x3418A712
0x3418A710: E007 B 46L33 ; 0x3418A722
.L32:
0x3418A712: F642 305A MOVW R0, #0x2B5A ; 0x34192B5A = .rodata..L.str.95
0x3418A716: F2C3 4019 MOVT R0, #0x3419 ; 0x34192B5A = .rodata..L.str.95
0x3418A71A: F240 116F MOVW R1, #0x016F
0x3418A71E: F002 FB07 BL assert_failed ; 0x3418CD30
.L33:
0x3418A722: 9804 LDR R0, [SP, #16]
0x3418A724: 6BC0 LDR R0, [R0, #60]
0x3418A726: B120 CBZ R0, .L34 ; 0x3418A732
0x3418A728: 9804 LDR R0, [SP, #16]
0x3418A72A: 6BC0 LDR R0, [R0, #60]
0x3418A72C: F1B0 7F80 CMP.W R0, #0x01000000
0x3418A730: D100 BNE 46L35 ; 0x3418A734
.L34:
0x3418A732: E007 B 46L36 ; 0x3418A744
.L35:
0x3418A734: F642 305A MOVW R0, #0x2B5A ; 0x34192B5A = .rodata..L.str.95
0x3418A738: F2C3 4019 MOVT R0, #0x3419 ; 0x34192B5A = .rodata..L.str.95
0x3418A73C: F44F 71B8 MOV.W R1, #0x0170
0x3418A740: F002 FAF6 BL assert_failed ; 0x3418CD30
.L36:
0x3418A744: 9804 LDR R0, [SP, #16]
0x3418A746: 6C00 LDR R0, [R0, #64]
0x3418A748: B120 CBZ R0, .L37 ; 0x3418A754
0x3418A74A: 9804 LDR R0, [SP, #16]
0x3418A74C: 6C00 LDR R0, [R0, #64]
0x3418A74E: F5B0 1F00 CMP.W R0, #0x200000
0x3418A752: D100 BNE 46L38 ; 0x3418A756
.L37:
0x3418A754: E007 B 46L39 ; 0x3418A766
.L38:
0x3418A756: F642 305A MOVW R0, #0x2B5A ; 0x34192B5A = .rodata..L.str.95
0x3418A75A: F2C3 4019 MOVT R0, #0x3419 ; 0x34192B5A = .rodata..L.str.95
0x3418A75E: F240 1171 MOVW R1, #0x0171
0x3418A762: F002 FAE5 BL assert_failed ; 0x3418CD30
.L39:
0x3418A766: 9904 LDR R1, [SP, #16]
0x3418A768: 2000 MOVS R0, #0
0x3418A76A: 65C8 STR R0, [R1, #92]
0x3418A76C: 9804 LDR R0, [SP, #16]
0x3418A76E: 6D80 LDR R0, [R0, #88]
0x3418A770: 2800 CMP R0, #0
0x3418A772: F040 80F3 BNE.W 46L45 ; 0x3418A95C
0x3418A776: 9804 LDR R0, [SP, #16]
0x3418A778: F7F6 F9BC BL HAL_XSPI_MspInit ; 0x34180AF4
0x3418A77C: 9804 LDR R0, [SP, #16]
0x3418A77E: F241 3188 MOVW R1, #0x1388
0x3418A782: F006 FABD BL HAL_XSPI_SetTimeout ; 0x34190D00
0x3418A786: 9804 LDR R0, [SP, #16]
0x3418A788: 6800 LDR R0, [R0]
0x3418A78A: 6880 LDR R0, [R0, #8]
0x3418A78C: F24C 01FC MOVW R1, #0xC0FC
0x3418A790: F6CF 01E0 MOVT R1, #0xF8E0
0x3418A794: 4008 ANDS R0, R1
0x3418A796: 9B04 LDR R3, [SP, #16]
0x3418A798: 6819 LDR R1, [R3]
0x3418A79A: 68DA LDR R2, [R3, #12]
0x3418A79C: F8D3 C010 LDR.W R12, [R3, #16]
0x3418A7A0: F8D3 E014 LDR.W LR, [R3, #20]
0x3418A7A4: EA42 420C ORR.W R2, R2, R12, LSL #16
0x3418A7A8: F06F 0CFF MVN R12, #255
0x3418A7AC: EB0C 2C0E ADD.W R12, R12, LR, LSL #8
0x3418A7B0: EA42 020C ORR.W R2, R2, R12
0x3418A7B4: 69DB LDR R3, [R3, #28]
0x3418A7B6: 431A ORRS R2, R3
0x3418A7B8: 4310 ORRS R0, R2
0x3418A7BA: 6088 STR R0, [R1, #8]
0x3418A7BC: 9804 LDR R0, [SP, #16]
0x3418A7BE: 6C00 LDR R0, [R0, #64]
0x3418A7C0: F5B0 1F00 CMP.W R0, #0x200000
0x3418A7C4: D105 BNE 46L40 ; 0x3418A7D2
0x3418A7C6: 9804 LDR R0, [SP, #16]
0x3418A7C8: 6801 LDR R1, [R0]
0x3418A7CA: 6888 LDR R0, [R1, #8]
0x3418A7CC: F440 1000 ORR R0, R0, #0x200000
0x3418A7D0: 6088 STR R0, [R1, #8]
.L40:
0x3418A7D2: 9804 LDR R0, [SP, #16]
0x3418A7D4: 6800 LDR R0, [R0]
0x3418A7D6: 68C0 LDR R0, [R0, #12]
0x3418A7D8: F420 20E0 BIC R0, R0, #0x070000
0x3418A7DC: 9A04 LDR R2, [SP, #16]
0x3418A7DE: 6811 LDR R1, [R2]
0x3418A7E0: 6A12 LDR R2, [R2, #32]
0x3418A7E2: 4310 ORRS R0, R2
0x3418A7E4: 60C8 STR R0, [R1, #12]
0x3418A7E6: 9804 LDR R0, [SP, #16]
0x3418A7E8: 6800 LDR R0, [R0]
0x3418A7EA: 6900 LDR R0, [R0, #16]
0x3418A7EC: F420 10F8 BIC R0, R0, #0x1F0000
0x3418A7F0: 9A04 LDR R2, [SP, #16]
0x3418A7F2: 6811 LDR R1, [R2]
0x3418A7F4: 6B12 LDR R2, [R2, #48]
0x3418A7F6: EA40 4002 ORR.W R0, R0, R2, LSL #16
0x3418A7FA: 6108 STR R0, [R1, #16]
0x3418A7FC: 9804 LDR R0, [SP, #16]
0x3418A7FE: 6800 LDR R0, [R0]
0x3418A800: 6900 LDR R0, [R0, #16]
0x3418A802: F020 00FF BIC R0, R0, #255
0x3418A806: 9A04 LDR R2, [SP, #16]
0x3418A808: 6811 LDR R1, [R2]
0x3418A80A: 6B52 LDR R2, [R2, #52]
0x3418A80C: 4310 ORRS R0, R2
0x3418A80E: 6108 STR R0, [R1, #16]
0x3418A810: 9804 LDR R0, [SP, #16]
0x3418A812: 6801 LDR R1, [R0]
0x3418A814: 6B80 LDR R0, [R0, #56]
0x3418A816: 6148 STR R0, [R1, #20]
0x3418A818: 9804 LDR R0, [SP, #16]
0x3418A81A: 6800 LDR R0, [R0]
0x3418A81C: 6800 LDR R0, [R0]
0x3418A81E: F420 507C BIC R0, R0, #0x3F00
0x3418A822: 9A04 LDR R2, [SP, #16]
0x3418A824: 6811 LDR R1, [R2]
0x3418A826: 6853 LDR R3, [R2, #4]
0x3418A828: F06F 02FF MVN R2, #255
0x3418A82C: EB02 2203 ADD.W R2, R2, R3, LSL #8
0x3418A830: 4310 ORRS R0, R2
0x3418A832: 6008 STR R0, [R1]
0x3418A834: 9804 LDR R0, [SP, #16]
0x3418A836: 9B02 LDR R3, [SP, #8]
0x3418A838: 6E01 LDR R1, [R0, #96]
0x3418A83A: 466A MOV R2, SP
0x3418A83C: 6011 STR R1, [R2]
0x3418A83E: 2120 MOVS R1, #32
0x3418A840: 2200 MOVS R2, #0
0x3418A842: F000 F893 BL XSPI_WaitFlagStateUntilTimeout ; 0x3418A96C
0x3418A846: F88D 000F STRB.W R0, [SP, #15]
0x3418A84A: F89D 000F LDRB.W R0, [SP, #15]
0x3418A84E: 2800 CMP R0, #0
0x3418A850: F040 8084 BNE.W 46L45 ; 0x3418A95C
0x3418A854: 9804 LDR R0, [SP, #16]
0x3418A856: 6800 LDR R0, [R0]
0x3418A858: 68C0 LDR R0, [R0, #12]
0x3418A85A: F020 00FF BIC R0, R0, #255
0x3418A85E: 9A04 LDR R2, [SP, #16]
0x3418A860: 6811 LDR R1, [R2]
0x3418A862: 6A52 LDR R2, [R2, #36]
0x3418A864: 4310 ORRS R0, R2
0x3418A866: 60C8 STR R0, [R1, #12]
0x3418A868: 9804 LDR R0, [SP, #16]
0x3418A86A: 6800 LDR R0, [R0]
0x3418A86C: F245 0100 MOVW R1, #0x5000
0x3418A870: F6C5 0102 MOVT R1, #0x5802
0x3418A874: 4288 CMP R0, R1
0x3418A876: D027 BEQ 46L41 ; 0x3418A8C8
0x3418A878: 9804 LDR R0, [SP, #16]
0x3418A87A: 6800 LDR R0, [R0]
0x3418A87C: F245 0100 MOVW R1, #0x5000
0x3418A880: F6C4 0102 MOVT R1, #0x4802
0x3418A884: 4288 CMP R0, R1
0x3418A886: D01F BEQ 46L41 ; 0x3418A8C8
0x3418A888: 9804 LDR R0, [SP, #16]
0x3418A88A: 6800 LDR R0, [R0]
0x3418A88C: F24A 0100 MOVW R1, #0xA000
0x3418A890: F6C5 0102 MOVT R1, #0x5802
0x3418A894: 4288 CMP R0, R1
0x3418A896: D017 BEQ 46L41 ; 0x3418A8C8
0x3418A898: 9804 LDR R0, [SP, #16]
0x3418A89A: 6800 LDR R0, [R0]
0x3418A89C: F24A 0100 MOVW R1, #0xA000
0x3418A8A0: F6C4 0102 MOVT R1, #0x4802
0x3418A8A4: 4288 CMP R0, R1
0x3418A8A6: D00F BEQ 46L41 ; 0x3418A8C8
0x3418A8A8: 9804 LDR R0, [SP, #16]
0x3418A8AA: 6800 LDR R0, [R0]
0x3418A8AC: F24D 0100 MOVW R1, #0xD000
0x3418A8B0: F6C5 0102 MOVT R1, #0x5802
0x3418A8B4: 4288 CMP R0, R1
0x3418A8B6: D007 BEQ 46L41 ; 0x3418A8C8
0x3418A8B8: 9804 LDR R0, [SP, #16]
0x3418A8BA: 6800 LDR R0, [R0]
0x3418A8BC: F24D 0100 MOVW R1, #0xD000
0x3418A8C0: F6C4 0102 MOVT R1, #0x4802
0x3418A8C4: 4288 CMP R0, R1
0x3418A8C6: D112 BNE 46L42 ; 0x3418A8EE
.L41:
0x3418A8C8: 9804 LDR R0, [SP, #16]
0x3418A8CA: 9B02 LDR R3, [SP, #8]
0x3418A8CC: 6E01 LDR R1, [R0, #96]
0x3418A8CE: 466A MOV R2, SP
0x3418A8D0: 6011 STR R1, [R2]
0x3418A8D2: 2120 MOVS R1, #32
0x3418A8D4: 2200 MOVS R2, #0
0x3418A8D6: F000 F849 BL XSPI_WaitFlagStateUntilTimeout ; 0x3418A96C
0x3418A8DA: F88D 000F STRB.W R0, [SP, #15]
0x3418A8DE: F89D 000F LDRB.W R0, [SP, #15]
0x3418A8E2: B120 CBZ R0, .L42 ; 0x3418A8EE
0x3418A8E4: F89D 000F LDRB.W R0, [SP, #15]
0x3418A8E8: F88D 0017 STRB.W R0, [SP, #23]
0x3418A8EC: E03A B 46L46 ; 0x3418A964
.L42:
0x3418A8EE: 9804 LDR R0, [SP, #16]
0x3418A8F0: 6800 LDR R0, [R0]
0x3418A8F2: 6800 LDR R0, [R0]
0x3418A8F4: F64F 71BF MOVW R1, #0xFFBF
0x3418A8F8: F6CF 61FF MOVT R1, #0xFEFF
0x3418A8FC: 4008 ANDS R0, R1
0x3418A8FE: 9B04 LDR R3, [SP, #16]
0x3418A900: 6819 LDR R1, [R3]
0x3418A902: 689A LDR R2, [R3, #8]
0x3418A904: 6BDB LDR R3, [R3, #60]
0x3418A906: 431A ORRS R2, R3
0x3418A908: 4310 ORRS R0, R2
0x3418A90A: 6008 STR R0, [R1]
0x3418A90C: 9804 LDR R0, [SP, #16]
0x3418A90E: 6800 LDR R0, [R0]
0x3418A910: F8D0 0108 LDR.W R0, [R0, #0x0108]
0x3418A914: F020 4080 BIC R0, R0, #0x40000000
0x3418A918: 9A04 LDR R2, [SP, #16]
0x3418A91A: 6811 LDR R1, [R2]
0x3418A91C: 6A92 LDR R2, [R2, #40]
0x3418A91E: 4310 ORRS R0, R2
0x3418A920: F8C1 0108 STR.W R0, [R1, #0x0108]
0x3418A924: 9804 LDR R0, [SP, #16]
0x3418A926: 6801 LDR R1, [R0]
0x3418A928: 6808 LDR R0, [R1]
0x3418A92A: F040 0001 ORR R0, R0, #1
0x3418A92E: 6008 STR R0, [R1]
0x3418A930: 9804 LDR R0, [SP, #16]
0x3418A932: 6980 LDR R0, [R0, #24]
0x3418A934: 2802 CMP R0, #2
0x3418A936: D105 BNE 46L43 ; 0x3418A944
0x3418A938: 9804 LDR R0, [SP, #16]
0x3418A93A: 6801 LDR R1, [R0]
0x3418A93C: 6888 LDR R0, [R1, #8]
0x3418A93E: F040 0002 ORR R0, R0, #2
0x3418A942: 6088 STR R0, [R1, #8]
.L43:
0x3418A944: 9804 LDR R0, [SP, #16]
0x3418A946: 68C0 LDR R0, [R0, #12]
0x3418A948: F1B0 6F80 CMP.W R0, #0x04000000
0x3418A94C: D103 BNE 46L44 ; 0x3418A956
0x3418A94E: 9904 LDR R1, [SP, #16]
0x3418A950: 2001 MOVS R0, #1
0x3418A952: 6588 STR R0, [R1, #88]
0x3418A954: E002 B 46L45 ; 0x3418A95C
.L44:
0x3418A956: 9904 LDR R1, [SP, #16]
0x3418A958: 2002 MOVS R0, #2
0x3418A95A: 6588 STR R0, [R1, #88]
.L45:
0x3418A95C: F89D 000F LDRB.W R0, [SP, #15]
0x3418A960: F88D 0017 STRB.W R0, [SP, #23]
.L46:
0x3418A964: F89D 0017 LDRB.W R0, [SP, #23]
0x3418A968: B006 ADD SP, SP, #24
0x3418A96A: BD80 POP 123R7, PC}
Section .text.XSPI_WaitFlagStateUntilTimeout from blto2_FSBL_lto.o, size=104, align=4
XSPI_WaitFlagStateUntilTimeout:
0x3418A96C: B580 PUSH 123R7, LR}
0x3418A96E: B086 SUB SP, SP, #24
0x3418A970: F8DD C020 LDR.W R12, [SP, #32]
0x3418A974: 9004 STR R0, [SP, #16]
0x3418A976: 9103 STR R1, [SP, #12]
0x3418A978: F88D 200B STRB.W R2, [SP, #11]
0x3418A97C: 9301 STR R3, [SP, #4]
.L1:
0x3418A97E: 9804 LDR R0, [SP, #16]
0x3418A980: 6800 LDR R0, [R0]
0x3418A982: 6A00 LDR R0, [R0, #32]
0x3418A984: 9903 LDR R1, [SP, #12]
0x3418A986: 4208 TST R0, R1
0x3418A988: EA5F 900F CSET R0, NE
0x3418A98C: F89D 100B LDRB.W R1, [SP, #11]
0x3418A990: 4288 CMP R0, R1
0x3418A992: D018 BEQ 46L4 ; 0x3418A9C6
0x3418A994: 9808 LDR R0, [SP, #32]
0x3418A996: 3001 ADDS R0, #1
0x3418A998: B1A0 CBZ R0, .L3 ; 0x3418A9C4
0x3418A99A: F7F6 F965 BL HAL_GetTick ; 0x34180C68
0x3418A99E: 9901 LDR R1, [SP, #4]
0x3418A9A0: 1A40 SUBS R0, R0, R1
0x3418A9A2: 9908 LDR R1, [SP, #32]
0x3418A9A4: 4288 CMP R0, R1
0x3418A9A6: D801 BHI 46L2 ; 0x3418A9AC
0x3418A9A8: 9808 LDR R0, [SP, #32]
0x3418A9AA: B958 CBNZ R0, .L3 ; 0x3418A9C4
.L2:
0x3418A9AC: 9904 LDR R1, [SP, #16]
0x3418A9AE: 2002 MOVS R0, #2
0x3418A9B0: 6588 STR R0, [R1, #88]
0x3418A9B2: 9904 LDR R1, [SP, #16]
0x3418A9B4: 6DC8 LDR R0, [R1, #92]
0x3418A9B6: F040 0001 ORR R0, R0, #1
0x3418A9BA: 65C8 STR R0, [R1, #92]
0x3418A9BC: 2003 MOVS R0, #3
0x3418A9BE: F88D 0017 STRB.W R0, [SP, #23]
0x3418A9C2: E003 B 46L5 ; 0x3418A9CC
.L3:
0x3418A9C4: E7DB B 46L1 ; 0x3418A97E
.L4:
0x3418A9C6: 2000 MOVS R0, #0
0x3418A9C8: F88D 0017 STRB.W R0, [SP, #23]
.L5:
0x3418A9CC: F89D 0017 LDRB.W R0, [SP, #23]
0x3418A9D0: B006 ADD SP, SP, #24
0x3418A9D2: BD80 POP 123R7, PC}
Section .text.XSPI_ConfigCmd from blto2_FSBL_lto.o, size=924, align=4
XSPI_ConfigCmd:
0x3418A9D4: B580 PUSH 123R7, LR}
0x3418A9D6: B088 SUB SP, SP, #32
0x3418A9D8: 9007 STR R0, [SP, #28]
0x3418A9DA: 9106 STR R1, [SP, #24]
0x3418A9DC: 2000 MOVS R0, #0
0x3418A9DE: F88D 0017 STRB.W R0, [SP, #23]
0x3418A9E2: 9807 LDR R0, [SP, #28]
0x3418A9E4: 6800 LDR R0, [R0]
0x3418A9E6: 6800 LDR R0, [R0]
0x3418A9E8: F020 5040 BIC R0, R0, #0x30000000
0x3418A9EC: 9907 LDR R1, [SP, #28]
0x3418A9EE: 6809 LDR R1, [R1]
0x3418A9F0: 6008 STR R0, [R1]
0x3418A9F2: 9807 LDR R0, [SP, #28]
0x3418A9F4: 6880 LDR R0, [R0, #8]
0x3418A9F6: BB68 CBNZ R0, .L4 ; 0x3418AA54
0x3418A9F8: 9806 LDR R0, [SP, #24]
0x3418A9FA: 6840 LDR R0, [R0, #4]
0x3418A9FC: B1B0 CBZ R0, .L1 ; 0x3418AA2C
0x3418A9FE: 9806 LDR R0, [SP, #24]
0x3418AA00: 6840 LDR R0, [R0, #4]
0x3418AA02: F1B0 4F80 CMP.W R0, #0x40000000
0x3418AA06: D011 BEQ 46L1 ; 0x3418AA2C
0x3418AA08: 9806 LDR R0, [SP, #24]
0x3418AA0A: 6840 LDR R0, [R0, #4]
0x3418AA0C: F1B0 4F00 CMP.W R0, #0x80000000
0x3418AA10: D00C BEQ 46L1 ; 0x3418AA2C
0x3418AA12: 9806 LDR R0, [SP, #24]
0x3418AA14: 6840 LDR R0, [R0, #4]
0x3418AA16: F1B0 4F40 CMP.W R0, #0xC0000000
0x3418AA1A: D007 BEQ 46L1 ; 0x3418AA2C
0x3418AA1C: 9806 LDR R0, [SP, #24]
0x3418AA1E: 6840 LDR R0, [R0, #4]
0x3418AA20: B120 CBZ R0, .L1 ; 0x3418AA2C
0x3418AA22: 9806 LDR R0, [SP, #24]
0x3418AA24: 6840 LDR R0, [R0, #4]
0x3418AA26: F1B0 4F00 CMP.W R0, #0x80000000
0x3418AA2A: D100 BNE 46L2 ; 0x3418AA2E
.L1:
0x3418AA2C: E007 B 46L3 ; 0x3418AA3E
.L2:
0x3418AA2E: F642 305A MOVW R0, #0x2B5A ; 0x34192B5A = .rodata..L.str.95
0x3418AA32: F2C3 4019 MOVT R0, #0x3419 ; 0x34192B5A = .rodata..L.str.95
0x3418AA36: F640 5102 MOVW R1, #0x0D02
0x3418AA3A: F002 F979 BL assert_failed ; 0x3418CD30
.L3:
0x3418AA3E: 9807 LDR R0, [SP, #28]
0x3418AA40: 6800 LDR R0, [R0]
0x3418AA42: 6800 LDR R0, [R0]
0x3418AA44: F020 4040 BIC R0, R0, #0xC0000000
0x3418AA48: 9906 LDR R1, [SP, #24]
0x3418AA4A: 6849 LDR R1, [R1, #4]
0x3418AA4C: 4308 ORRS R0, R1
0x3418AA4E: 9907 LDR R1, [SP, #28]
0x3418AA50: 6809 LDR R1, [R1]
0x3418AA52: 6008 STR R0, [R1]
.L4:
0x3418AA54: 9806 LDR R0, [SP, #24]
0x3418AA56: 6800 LDR R0, [R0]
0x3418AA58: 2802 CMP R0, #2
0x3418AA5A: D114 BNE 46L5 ; 0x3418AA86
0x3418AA5C: 9807 LDR R0, [SP, #28]
0x3418AA5E: 6800 LDR R0, [R0]
0x3418AA60: F500 70C0 ADD.W R0, R0, #0x0180
0x3418AA64: 9004 STR R0, [SP, #16]
0x3418AA66: 9807 LDR R0, [SP, #28]
0x3418AA68: 6800 LDR R0, [R0]
0x3418AA6A: F500 70C4 ADD.W R0, R0, #0x0188
0x3418AA6E: 9003 STR R0, [SP, #12]
0x3418AA70: 9807 LDR R0, [SP, #28]
0x3418AA72: 6800 LDR R0, [R0]
0x3418AA74: F500 70C8 ADD.W R0, R0, #0x0190
0x3418AA78: 9002 STR R0, [SP, #8]
0x3418AA7A: 9807 LDR R0, [SP, #28]
0x3418AA7C: 6800 LDR R0, [R0]
0x3418AA7E: F500 70D0 ADD.W R0, R0, #0x01A0
0x3418AA82: 9001 STR R0, [SP, #4]
0x3418AA84: E02C B 46L7 ; 0x3418AAE0
.L5:
0x3418AA86: 9806 LDR R0, [SP, #24]
0x3418AA88: 6800 LDR R0, [R0]
0x3418AA8A: 2803 CMP R0, #3
0x3418AA8C: D114 BNE 46L6 ; 0x3418AAB8
0x3418AA8E: 9807 LDR R0, [SP, #28]
0x3418AA90: 6800 LDR R0, [R0]
0x3418AA92: F500 70A0 ADD.W R0, R0, #0x0140
0x3418AA96: 9004 STR R0, [SP, #16]
0x3418AA98: 9807 LDR R0, [SP, #28]
0x3418AA9A: 6800 LDR R0, [R0]
0x3418AA9C: F500 70A4 ADD.W R0, R0, #0x0148
0x3418AAA0: 9003 STR R0, [SP, #12]
0x3418AAA2: 9807 LDR R0, [SP, #28]
0x3418AAA4: 6800 LDR R0, [R0]
0x3418AAA6: F500 70A8 ADD.W R0, R0, #0x0150
0x3418AAAA: 9002 STR R0, [SP, #8]
0x3418AAAC: 9807 LDR R0, [SP, #28]
0x3418AAAE: 6800 LDR R0, [R0]
0x3418AAB0: F500 70B0 ADD.W R0, R0, #0x0160
0x3418AAB4: 9001 STR R0, [SP, #4]
0x3418AAB6: E013 B 46L7 ; 0x3418AAE0
.L6:
0x3418AAB8: 9807 LDR R0, [SP, #28]
0x3418AABA: 6800 LDR R0, [R0]
0x3418AABC: F500 7080 ADD.W R0, R0, #0x0100
0x3418AAC0: 9004 STR R0, [SP, #16]
0x3418AAC2: 9807 LDR R0, [SP, #28]
0x3418AAC4: 6800 LDR R0, [R0]
0x3418AAC6: F500 7084 ADD.W R0, R0, #0x0108
0x3418AACA: 9003 STR R0, [SP, #12]
0x3418AACC: 9807 LDR R0, [SP, #28]
0x3418AACE: 6800 LDR R0, [R0]
0x3418AAD0: F500 7088 ADD.W R0, R0, #0x0110
0x3418AAD4: 9002 STR R0, [SP, #8]
0x3418AAD6: 9807 LDR R0, [SP, #28]
0x3418AAD8: 6800 LDR R0, [R0]
0x3418AADA: F500 7090 ADD.W R0, R0, #0x0120
0x3418AADE: 9001 STR R0, [SP, #4]
.L7:
0x3418AAE0: 9806 LDR R0, [SP, #24]
0x3418AAE2: 6C80 LDR R0, [R0, #72]
0x3418AAE4: 9904 LDR R1, [SP, #16]
0x3418AAE6: 6008 STR R0, [R1]
0x3418AAE8: 9806 LDR R0, [SP, #24]
0x3418AAEA: 6AC0 LDR R0, [R0, #44]
0x3418AAEC: B180 CBZ R0, .L8 ; 0x3418AB10
0x3418AAEE: 9806 LDR R0, [SP, #24]
0x3418AAF0: 6A80 LDR R0, [R0, #40]
0x3418AAF2: 9901 LDR R1, [SP, #4]
0x3418AAF4: 6008 STR R0, [R1]
0x3418AAF6: 9804 LDR R0, [SP, #16]
0x3418AAF8: 6800 LDR R0, [R0]
0x3418AAFA: F420 107C BIC R0, R0, #0x3F0000
0x3418AAFE: 9B06 LDR R3, [SP, #24]
0x3418AB00: 6AD9 LDR R1, [R3, #44]
0x3418AB02: 6B1A LDR R2, [R3, #48]
0x3418AB04: 6B5B LDR R3, [R3, #52]
0x3418AB06: 4319 ORRS R1, R3
0x3418AB08: 4311 ORRS R1, R2
0x3418AB0A: 4308 ORRS R0, R1
0x3418AB0C: 9904 LDR R1, [SP, #16]
0x3418AB0E: 6008 STR R0, [R1]
.L8:
0x3418AB10: 9803 LDR R0, [SP, #12]
0x3418AB12: 6800 LDR R0, [R0]
0x3418AB14: F020 001F BIC R0, R0, #31
0x3418AB18: 9906 LDR R1, [SP, #24]
0x3418AB1A: 6C49 LDR R1, [R1, #68]
0x3418AB1C: 4308 ORRS R0, R1
0x3418AB1E: 9903 LDR R1, [SP, #12]
0x3418AB20: 6008 STR R0, [R1]
0x3418AB22: 9806 LDR R0, [SP, #24]
0x3418AB24: 6B80 LDR R0, [R0, #56]
0x3418AB26: B140 CBZ R0, .L9 ; 0x3418AB3A
0x3418AB28: 9806 LDR R0, [SP, #24]
0x3418AB2A: 6800 LDR R0, [R0]
0x3418AB2C: B928 CBNZ R0, .L9 ; 0x3418AB3A
0x3418AB2E: 9806 LDR R0, [SP, #24]
0x3418AB30: 6BC0 LDR R0, [R0, #60]
0x3418AB32: 3801 SUBS R0, #1
0x3418AB34: 9907 LDR R1, [SP, #28]
0x3418AB36: 6809 LDR R1, [R1]
0x3418AB38: 6408 STR R0, [R1, #64]
.L9:
0x3418AB3A: 9806 LDR R0, [SP, #24]
0x3418AB3C: 6B80 LDR R0, [R0, #56]
0x3418AB3E: B1D8 CBZ R0, .L11 ; 0x3418AB78
0x3418AB40: 9806 LDR R0, [SP, #24]
0x3418AB42: 6C00 LDR R0, [R0, #64]
0x3418AB44: F1B0 6F00 CMP.W R0, #0x08000000
0x3418AB48: D108 BNE 46L10 ; 0x3418AB5C
0x3418AB4A: 9807 LDR R0, [SP, #28]
0x3418AB4C: 6801 LDR R1, [R0]
0x3418AB4E: F8D1 0108 LDR.W R0, [R1, #0x0108]
0x3418AB52: F020 4080 BIC R0, R0, #0x40000000
0x3418AB56: F8C1 0108 STR.W R0, [R1, #0x0108]
0x3418AB5A: E00D B 46L11 ; 0x3418AB78
.L10:
0x3418AB5C: 9807 LDR R0, [SP, #28]
0x3418AB5E: 6A80 LDR R0, [R0, #40]
0x3418AB60: F1B0 4F80 CMP.W R0, #0x40000000
0x3418AB64: D108 BNE 46L11 ; 0x3418AB78
0x3418AB66: 9807 LDR R0, [SP, #28]
0x3418AB68: 6801 LDR R1, [R0]
0x3418AB6A: F8D1 0108 LDR.W R0, [R1, #0x0108]
0x3418AB6E: F040 4080 ORR R0, R0, #0x40000000
0x3418AB72: F8C1 0108 STR.W R0, [R1, #0x0108]
0x3418AB76: E7FF B 46L11 ; 0x3418AB78
.L11:
0x3418AB78: 9806 LDR R0, [SP, #24]
0x3418AB7A: 68C0 LDR R0, [R0, #12]
0x3418AB7C: 2800 CMP R0, #0
0x3418AB7E: F000 808A BEQ.W 46L20 ; 0x3418AC96
0x3418AB82: 9806 LDR R0, [SP, #24]
0x3418AB84: 69C0 LDR R0, [R0, #28]
0x3418AB86: 2800 CMP R0, #0
0x3418AB88: D057 BEQ 46L16 ; 0x3418AC3A
0x3418AB8A: 9806 LDR R0, [SP, #24]
0x3418AB8C: 6B80 LDR R0, [R0, #56]
0x3418AB8E: B1F8 CBZ R0, .L12 ; 0x3418ABD0
0x3418AB90: 9804 LDR R0, [SP, #16]
0x3418AB92: 6800 LDR R0, [R0]
0x3418AB94: F24C 01C0 MOVW R1, #0xC0C0
0x3418AB98: F2CF 01FF MOVT R1, #0xF0FF
0x3418AB9C: 4008 ANDS R0, R1
0x3418AB9E: 9A06 LDR R2, [SP, #24]
0x3418ABA0: 9200 STR R2, [SP, #0]
0x3418ABA2: 68D1 LDR R1, [R2, #12]
0x3418ABA4: F8D2 C010 LDR.W R12, [R2, #16]
0x3418ABA8: F8D2 E014 LDR.W LR, [R2, #20]
0x3418ABAC: 69D3 LDR R3, [R2, #28]
0x3418ABAE: EA41 010E ORR.W R1, R1, LR
0x3418ABB2: EA41 010C ORR.W R1, R1, R12
0x3418ABB6: 4319 ORRS R1, R3
0x3418ABB8: 6A53 LDR R3, [R2, #36]
0x3418ABBA: 4319 ORRS R1, R3
0x3418ABBC: 6A13 LDR R3, [R2, #32]
0x3418ABBE: 4319 ORRS R1, R3
0x3418ABC0: 6B93 LDR R3, [R2, #56]
0x3418ABC2: 4319 ORRS R1, R3
0x3418ABC4: 6C12 LDR R2, [R2, #64]
0x3418ABC6: 4311 ORRS R1, R2
0x3418ABC8: 4308 ORRS R0, R1
0x3418ABCA: 9904 LDR R1, [SP, #16]
0x3418ABCC: 6008 STR R0, [R1]
0x3418ABCE: E017 B 46L13 ; 0x3418AC00
.L12:
0x3418ABD0: 9804 LDR R0, [SP, #16]
0x3418ABD2: 6800 LDR R0, [R0]
0x3418ABD4: F643 713F MOVW R1, #0x3F3F
0x3418ABD8: 4388 BICS R0, R1
0x3418ABDA: 9A06 LDR R2, [SP, #24]
0x3418ABDC: 68D1 LDR R1, [R2, #12]
0x3418ABDE: F8D2 C010 LDR.W R12, [R2, #16]
0x3418ABE2: F8D2 E014 LDR.W LR, [R2, #20]
0x3418ABE6: 69D3 LDR R3, [R2, #28]
0x3418ABE8: EA41 010E ORR.W R1, R1, LR
0x3418ABEC: EA41 010C ORR.W R1, R1, R12
0x3418ABF0: 4319 ORRS R1, R3
0x3418ABF2: 6A53 LDR R3, [R2, #36]
0x3418ABF4: 4319 ORRS R1, R3
0x3418ABF6: 6A12 LDR R2, [R2, #32]
0x3418ABF8: 4311 ORRS R1, R2
0x3418ABFA: 4308 ORRS R0, R1
0x3418ABFC: 9904 LDR R1, [SP, #16]
0x3418ABFE: 6008 STR R0, [R1]
.L13:
0x3418AC00: 9806 LDR R0, [SP, #24]
0x3418AC02: 6880 LDR R0, [R0, #8]
0x3418AC04: 9902 LDR R1, [SP, #8]
0x3418AC06: 6008 STR R0, [R1]
0x3418AC08: 9806 LDR R0, [SP, #24]
0x3418AC0A: 6980 LDR R0, [R0, #24]
0x3418AC0C: 9907 LDR R1, [SP, #28]
0x3418AC0E: 6809 LDR R1, [R1]
0x3418AC10: 6488 STR R0, [R1, #72]
0x3418AC12: 9806 LDR R0, [SP, #24]
0x3418AC14: 6800 LDR R0, [R0]
0x3418AC16: B978 CBNZ R0, .L15 ; 0x3418AC38
0x3418AC18: 9807 LDR R0, [SP, #28]
0x3418AC1A: 6800 LDR R0, [R0]
0x3418AC1C: 6C80 LDR R0, [R0, #72]
0x3418AC1E: 9906 LDR R1, [SP, #24]
0x3418AC20: 6989 LDR R1, [R1, #24]
0x3418AC22: 4288 CMP R0, R1
0x3418AC24: D100 BNE 46L14 ; 0x3418AC28
0x3418AC26: E007 B 46L15 ; 0x3418AC38
.L14:
0x3418AC28: F642 305A MOVW R0, #0x2B5A ; 0x34192B5A = .rodata..L.str.95
0x3418AC2C: F2C3 4019 MOVT R0, #0x3419 ; 0x34192B5A = .rodata..L.str.95
0x3418AC30: F640 516B MOVW R1, #0x0D6B
0x3418AC34: F002 F87C BL assert_failed ; 0x3418CD30
.L15:
0x3418AC38: E02C B 46L19 ; 0x3418AC94
.L16:
0x3418AC3A: 9806 LDR R0, [SP, #24]
0x3418AC3C: 6B80 LDR R0, [R0, #56]
0x3418AC3E: B1C0 CBZ R0, .L17 ; 0x3418AC72
0x3418AC40: 9804 LDR R0, [SP, #16]
0x3418AC42: 6800 LDR R0, [R0]
0x3418AC44: F64F 71C0 MOVW R1, #0xFFC0
0x3418AC48: F2CF 01FF MOVT R1, #0xF0FF
0x3418AC4C: 4008 ANDS R0, R1
0x3418AC4E: 9A06 LDR R2, [SP, #24]
0x3418AC50: 68D1 LDR R1, [R2, #12]
0x3418AC52: F8D2 C010 LDR.W R12, [R2, #16]
0x3418AC56: F8D2 E014 LDR.W LR, [R2, #20]
0x3418AC5A: 6B93 LDR R3, [R2, #56]
0x3418AC5C: EA41 010E ORR.W R1, R1, LR
0x3418AC60: EA41 010C ORR.W R1, R1, R12
0x3418AC64: 4319 ORRS R1, R3
0x3418AC66: 6C12 LDR R2, [R2, #64]
0x3418AC68: 4311 ORRS R1, R2
0x3418AC6A: 4308 ORRS R0, R1
0x3418AC6C: 9904 LDR R1, [SP, #16]
0x3418AC6E: 6008 STR R0, [R1]
0x3418AC70: E00C B 46L18 ; 0x3418AC8C
.L17:
0x3418AC72: 9804 LDR R0, [SP, #16]
0x3418AC74: 6800 LDR R0, [R0]
0x3418AC76: F020 003F BIC R0, R0, #63
0x3418AC7A: 9B06 LDR R3, [SP, #24]
0x3418AC7C: 68D9 LDR R1, [R3, #12]
0x3418AC7E: 691A LDR R2, [R3, #16]
0x3418AC80: 695B LDR R3, [R3, #20]
0x3418AC82: 4319 ORRS R1, R3
0x3418AC84: 4311 ORRS R1, R2
0x3418AC86: 4308 ORRS R0, R1
0x3418AC88: 9904 LDR R1, [SP, #16]
0x3418AC8A: 6008 STR R0, [R1]
.L18:
0x3418AC8C: 9806 LDR R0, [SP, #24]
0x3418AC8E: 6880 LDR R0, [R0, #8]
0x3418AC90: 9902 LDR R1, [SP, #8]
0x3418AC92: 6008 STR R0, [R1]
.L19:
0x3418AC94: E04B B 46L26 ; 0x3418AD2E
.L20:
0x3418AC96: 9806 LDR R0, [SP, #24]
0x3418AC98: 69C0 LDR R0, [R0, #28]
0x3418AC9A: 2800 CMP R0, #0
0x3418AC9C: D041 BEQ 46L25 ; 0x3418AD22
0x3418AC9E: 9806 LDR R0, [SP, #24]
0x3418ACA0: 6B80 LDR R0, [R0, #56]
0x3418ACA2: B1C0 CBZ R0, .L21 ; 0x3418ACD6
0x3418ACA4: 9804 LDR R0, [SP, #16]
0x3418ACA6: 6800 LDR R0, [R0]
0x3418ACA8: F24C 01FF MOVW R1, #0xC0FF
0x3418ACAC: F2CF 01FF MOVT R1, #0xF0FF
0x3418ACB0: 4008 ANDS R0, R1
0x3418ACB2: 9A06 LDR R2, [SP, #24]
0x3418ACB4: 69D1 LDR R1, [R2, #28]
0x3418ACB6: F8D2 C020 LDR.W R12, [R2, #32]
0x3418ACBA: F8D2 E024 LDR.W LR, [R2, #36]
0x3418ACBE: 6B93 LDR R3, [R2, #56]
0x3418ACC0: EA41 010E ORR.W R1, R1, LR
0x3418ACC4: EA41 010C ORR.W R1, R1, R12
0x3418ACC8: 4319 ORRS R1, R3
0x3418ACCA: 6C12 LDR R2, [R2, #64]
0x3418ACCC: 4311 ORRS R1, R2
0x3418ACCE: 4308 ORRS R0, R1
0x3418ACD0: 9904 LDR R1, [SP, #16]
0x3418ACD2: 6008 STR R0, [R1]
0x3418ACD4: E00C B 46L22 ; 0x3418ACF0
.L21:
0x3418ACD6: 9804 LDR R0, [SP, #16]
0x3418ACD8: 6800 LDR R0, [R0]
0x3418ACDA: F420 507C BIC R0, R0, #0x3F00
0x3418ACDE: 9B06 LDR R3, [SP, #24]
0x3418ACE0: 69D9 LDR R1, [R3, #28]
0x3418ACE2: 6A1A LDR R2, [R3, #32]
0x3418ACE4: 6A5B LDR R3, [R3, #36]
0x3418ACE6: 4319 ORRS R1, R3
0x3418ACE8: 4311 ORRS R1, R2
0x3418ACEA: 4308 ORRS R0, R1
0x3418ACEC: 9904 LDR R1, [SP, #16]
0x3418ACEE: 6008 STR R0, [R1]
.L22:
0x3418ACF0: 9806 LDR R0, [SP, #24]
0x3418ACF2: 6980 LDR R0, [R0, #24]
0x3418ACF4: 9907 LDR R1, [SP, #28]
0x3418ACF6: 6809 LDR R1, [R1]
0x3418ACF8: 6488 STR R0, [R1, #72]
0x3418ACFA: 9806 LDR R0, [SP, #24]
0x3418ACFC: 6800 LDR R0, [R0]
0x3418ACFE: B978 CBNZ R0, .L24 ; 0x3418AD20
0x3418AD00: 9807 LDR R0, [SP, #28]
0x3418AD02: 6800 LDR R0, [R0]
0x3418AD04: 6C80 LDR R0, [R0, #72]
0x3418AD06: 9906 LDR R1, [SP, #24]
0x3418AD08: 6989 LDR R1, [R1, #24]
0x3418AD0A: 4288 CMP R0, R1
0x3418AD0C: D100 BNE 46L23 ; 0x3418AD10
0x3418AD0E: E007 B 46L24 ; 0x3418AD20
.L23:
0x3418AD10: F642 305A MOVW R0, #0x2B5A ; 0x34192B5A = .rodata..L.str.95
0x3418AD14: F2C3 4019 MOVT R0, #0x3419 ; 0x34192B5A = .rodata..L.str.95
0x3418AD18: F640 51A5 MOVW R1, #0x0DA5
0x3418AD1C: F002 F808 BL assert_failed ; 0x3418CD30
.L24:
0x3418AD20: E005 B 46L26 ; 0x3418AD2E
.L25:
0x3418AD22: 2001 MOVS R0, #1
0x3418AD24: F88D 0017 STRB.W R0, [SP, #23]
0x3418AD28: 9907 LDR R1, [SP, #28]
0x3418AD2A: 2008 MOVS R0, #8
0x3418AD2C: 65C8 STR R0, [R1, #92]
.L26:
0x3418AD2E: 9806 LDR R0, [SP, #24]
0x3418AD30: 6B80 LDR R0, [R0, #56]
0x3418AD32: B1C8 CBZ R0, .L28 ; 0x3418AD68
0x3418AD34: 9806 LDR R0, [SP, #24]
0x3418AD36: 6800 LDR R0, [R0]
0x3418AD38: B9B0 CBNZ R0, .L28 ; 0x3418AD68
0x3418AD3A: 9806 LDR R0, [SP, #24]
0x3418AD3C: 6BC0 LDR R0, [R0, #60]
0x3418AD3E: 3801 SUBS R0, #1
0x3418AD40: 9907 LDR R1, [SP, #28]
0x3418AD42: 6809 LDR R1, [R1]
0x3418AD44: 6408 STR R0, [R1, #64]
0x3418AD46: 9807 LDR R0, [SP, #28]
0x3418AD48: 6800 LDR R0, [R0]
0x3418AD4A: 6C00 LDR R0, [R0, #64]
0x3418AD4C: 9906 LDR R1, [SP, #24]
0x3418AD4E: 6BC9 LDR R1, [R1, #60]
0x3418AD50: 3901 SUBS R1, #1
0x3418AD52: 4288 CMP R0, R1
0x3418AD54: D100 BNE 46L27 ; 0x3418AD58
0x3418AD56: E007 B 46L28 ; 0x3418AD68
.L27:
0x3418AD58: F642 305A MOVW R0, #0x2B5A ; 0x34192B5A = .rodata..L.str.95
0x3418AD5C: F2C3 4019 MOVT R0, #0x3419 ; 0x34192B5A = .rodata..L.str.95
0x3418AD60: F640 51B8 MOVW R1, #0x0DB8
0x3418AD64: F001 FFE4 BL assert_failed ; 0x3418CD30
.L28:
0x3418AD68: F89D 0017 LDRB.W R0, [SP, #23]
0x3418AD6C: B008 ADD SP, SP, #32
0x3418AD6E: BD80 POP 123R7, PC}
Section .text.HAL_XSPI_Receive from blto2_FSBL_lto.o, size=300, align=4
HAL_XSPI_Receive:
0x3418AD70: B580 PUSH 123R7, LR}
0x3418AD72: B08A SUB SP, SP, #40
0x3418AD74: 9009 STR R0, [SP, #36]
0x3418AD76: 9108 STR R1, [SP, #32]
0x3418AD78: 9207 STR R2, [SP, #28]
0x3418AD7A: F7F5 FF75 BL HAL_GetTick ; 0x34180C68
0x3418AD7E: 9005 STR R0, [SP, #20]
0x3418AD80: 9809 LDR R0, [SP, #36]
0x3418AD82: 6800 LDR R0, [R0]
0x3418AD84: 3050 ADDS R0, #80
0x3418AD86: 9004 STR R0, [SP, #16]
0x3418AD88: 9809 LDR R0, [SP, #36]
0x3418AD8A: 6800 LDR R0, [R0]
0x3418AD8C: 6C80 LDR R0, [R0, #72]
0x3418AD8E: 9003 STR R0, [SP, #12]
0x3418AD90: 9809 LDR R0, [SP, #36]
0x3418AD92: 6800 LDR R0, [R0]
0x3418AD94: F8D0 0110 LDR.W R0, [R0, #0x0110]
0x3418AD98: 9002 STR R0, [SP, #8]
0x3418AD9A: 9808 LDR R0, [SP, #32]
0x3418AD9C: B930 CBNZ R0, .L1 ; 0x3418ADAC
0x3418AD9E: 2001 MOVS R0, #1
0x3418ADA0: F88D 001B STRB.W R0, [SP, #27]
0x3418ADA4: 9909 LDR R1, [SP, #36]
0x3418ADA6: 2008 MOVS R0, #8
0x3418ADA8: 65C8 STR R0, [R1, #92]
0x3418ADAA: E073 B 46L9 ; 0x3418AE94
.L1:
0x3418ADAC: 9809 LDR R0, [SP, #36]
0x3418ADAE: 6D80 LDR R0, [R0, #88]
0x3418ADB0: 2804 CMP R0, #4
0x3418ADB2: D169 BNE 46L8 ; 0x3418AE88
0x3418ADB4: 9809 LDR R0, [SP, #36]
0x3418ADB6: 6800 LDR R0, [R0]
0x3418ADB8: 6C00 LDR R0, [R0, #64]
0x3418ADBA: 3001 ADDS R0, #1
0x3418ADBC: 9909 LDR R1, [SP, #36]
0x3418ADBE: 64C8 STR R0, [R1, #76]
0x3418ADC0: 9809 LDR R0, [SP, #36]
0x3418ADC2: 6CC0 LDR R0, [R0, #76]
0x3418ADC4: 9909 LDR R1, [SP, #36]
0x3418ADC6: 6488 STR R0, [R1, #72]
0x3418ADC8: 9808 LDR R0, [SP, #32]
0x3418ADCA: 9909 LDR R1, [SP, #36]
0x3418ADCC: 6448 STR R0, [R1, #68]
0x3418ADCE: 9809 LDR R0, [SP, #36]
0x3418ADD0: 6800 LDR R0, [R0]
0x3418ADD2: 6800 LDR R0, [R0]
0x3418ADD4: 2101 MOVS R1, #1
0x3418ADD6: F361 701D BFI R0, R1, #28, #2
0x3418ADDA: 9909 LDR R1, [SP, #36]
0x3418ADDC: 6809 LDR R1, [R1]
0x3418ADDE: 6008 STR R0, [R1]
0x3418ADE0: 9809 LDR R0, [SP, #36]
0x3418ADE2: 68C0 LDR R0, [R0, #12]
0x3418ADE4: F1B0 6F80 CMP.W R0, #0x04000000
0x3418ADE8: D104 BNE 46L2 ; 0x3418ADF4
0x3418ADEA: 9803 LDR R0, [SP, #12]
0x3418ADEC: 9909 LDR R1, [SP, #36]
0x3418ADEE: 6809 LDR R1, [R1]
0x3418ADF0: 6488 STR R0, [R1, #72]
0x3418ADF2: E010 B 46L4 ; 0x3418AE16
.L2:
0x3418ADF4: 9809 LDR R0, [SP, #36]
0x3418ADF6: 6800 LDR R0, [R0]
0x3418ADF8: F8D0 0100 LDR.W R0, [R0, #0x0100]
0x3418ADFC: F410 6FE0 TST R0, #0x0700
0x3418AE00: D004 BEQ 46L3 ; 0x3418AE0C
0x3418AE02: 9803 LDR R0, [SP, #12]
0x3418AE04: 9909 LDR R1, [SP, #36]
0x3418AE06: 6809 LDR R1, [R1]
0x3418AE08: 6488 STR R0, [R1, #72]
0x3418AE0A: E004 B 46L4 ; 0x3418AE16
.L3:
0x3418AE0C: 9802 LDR R0, [SP, #8]
0x3418AE0E: 9909 LDR R1, [SP, #36]
0x3418AE10: 6809 LDR R1, [R1]
0x3418AE12: F8C1 0110 STR.W R0, [R1, #0x0110]
.L4:
0x3418AE16: 9809 LDR R0, [SP, #36]
0x3418AE18: 9B05 LDR R3, [SP, #20]
0x3418AE1A: 9907 LDR R1, [SP, #28]
0x3418AE1C: 466A MOV R2, SP
0x3418AE1E: 6011 STR R1, [R2]
0x3418AE20: 2106 MOVS R1, #6
0x3418AE22: 2201 MOVS R2, #1
0x3418AE24: F7FF FDA2 BL XSPI_WaitFlagStateUntilTimeout ; 0x3418A96C
0x3418AE28: F88D 001B STRB.W R0, [SP, #27]
0x3418AE2C: F89D 001B LDRB.W R0, [SP, #27]
0x3418AE30: B100 CBZ R0, .L5 ; 0x3418AE34
0x3418AE32: E011 B 46L6 ; 0x3418AE58
.L5:
0x3418AE34: 9804 LDR R0, [SP, #16]
0x3418AE36: 7800 LDRB R0, [R0]
0x3418AE38: 9909 LDR R1, [SP, #36]
0x3418AE3A: 6C49 LDR R1, [R1, #68]
0x3418AE3C: 7008 STRB R0, [R1]
0x3418AE3E: 9909 LDR R1, [SP, #36]
0x3418AE40: 6C48 LDR R0, [R1, #68]
0x3418AE42: 3001 ADDS R0, #1
0x3418AE44: 6448 STR R0, [R1, #68]
0x3418AE46: 9909 LDR R1, [SP, #36]
0x3418AE48: 6CC8 LDR R0, [R1, #76]
0x3418AE4A: 3801 SUBS R0, #1
0x3418AE4C: 64C8 STR R0, [R1, #76]
0x3418AE4E: 9809 LDR R0, [SP, #36]
0x3418AE50: 6CC0 LDR R0, [R0, #76]
0x3418AE52: B108 CBZ R0, .L6 ; 0x3418AE58
0x3418AE54: F02F C821 LE 46L4 ; 0x3418AE16
.L6:
0x3418AE58: F89D 001B LDRB.W R0, [SP, #27]
0x3418AE5C: B998 CBNZ R0, .L7 ; 0x3418AE86
0x3418AE5E: 9809 LDR R0, [SP, #36]
0x3418AE60: 9B05 LDR R3, [SP, #20]
0x3418AE62: 9907 LDR R1, [SP, #28]
0x3418AE64: 466A MOV R2, SP
0x3418AE66: 6011 STR R1, [R2]
0x3418AE68: 2102 MOVS R1, #2
0x3418AE6A: 2201 MOVS R2, #1
0x3418AE6C: F7FF FD7E BL XSPI_WaitFlagStateUntilTimeout ; 0x3418A96C
0x3418AE70: F88D 001B STRB.W R0, [SP, #27]
0x3418AE74: F89D 001B LDRB.W R0, [SP, #27]
0x3418AE78: B928 CBNZ R0, .L7 ; 0x3418AE86
0x3418AE7A: 9809 LDR R0, [SP, #36]
0x3418AE7C: 6801 LDR R1, [R0]
0x3418AE7E: 2002 MOVS R0, #2
0x3418AE80: 6248 STR R0, [R1, #36]
0x3418AE82: 9909 LDR R1, [SP, #36]
0x3418AE84: 6588 STR R0, [R1, #88]
.L7:
0x3418AE86: E005 B 46L9 ; 0x3418AE94
.L8:
0x3418AE88: 2001 MOVS R0, #1
0x3418AE8A: F88D 001B STRB.W R0, [SP, #27]
0x3418AE8E: 9909 LDR R1, [SP, #36]
0x3418AE90: 2010 MOVS R0, #16
0x3418AE92: 65C8 STR R0, [R1, #92]
.L9:
0x3418AE94: F89D 001B LDRB.W R0, [SP, #27]
0x3418AE98: B00A ADD SP, SP, #40
0x3418AE9A: BD80 POP 123R7, PC}
Section .text.LL_AHB5_GRP1_IsEnabledClock from blto2_FSBL_lto.o, size=28, align=4
LL_AHB5_GRP1_IsEnabledClock:
0x3418AE9C: B081 SUB SP, SP, #4
0x3418AE9E: 9000 STR R0, [SP, #0]
0x3418AEA0: F248 2060 MOVW R0, #0x8260
0x3418AEA4: F2C5 6002 MOVT R0, #0x5602
0x3418AEA8: 6800 LDR R0, [R0]
0x3418AEAA: 43C0 MVNS R0, R0
0x3418AEAC: 9900 LDR R1, [SP, #0]
0x3418AEAE: 4208 TST R0, R1
0x3418AEB0: EA5F 901F CSET R0, EQ
0x3418AEB4: B001 ADD SP, SP, #4
0x3418AEB6: 4770 BX LR
Section .text.JumpToApplication from blto2_FSBL_lto.o, size=356, align=4
JumpToApplication:
0x3418AEB8: B5D0 PUSH 123R4, R6-R7, LR}
0x3418AEBA: AF02 ADD R7, SP, #8
0x3418AEBC: B094 SUB SP, SP, #80
0x3418AEBE: 466C MOV R4, SP
0x3418AEC0: F36F 0404 BFC R4, #0, #5
0x3418AEC4: 46A5 MOV SP, R4
0x3418AEC6: 2000 MOVS R0, #0
0x3418AEC8: A905 ADD R1, SP, #20
0x3418AECA: F001 FC8F BL EXTMEM_GetMapAddress ; 0x3418C7EC
0x3418AECE: B118 CBZ R0, .L1 ; 0x3418AED8
0x3418AED0: 2004 MOVS R0, #4
0x3418AED2: F88D 001F STRB.W R0, [SP, #31]
0x3418AED6: E09B B 46L8 ; 0x3418B010
.L1:
0x3418AED8: F002 F922 BL HAL_SuspendTick ; 0x3418D120
0x3418AEDC: F64E 5014 MOVW R0, #0xED14
0x3418AEE0: F2CE 0000 MOVT R0, #0xE000
0x3418AEE4: 6800 LDR R0, [R0]
0x3418AEE6: 0380 LSLS R0, R0, #14
0x3418AEE8: 2800 CMP R0, #0
0x3418AEEA: D515 BPL 46L2 ; 0x3418AF18
0x3418AEEC: F3BF 8F4F DSB SY
0x3418AEF0: F3BF 8F6F ISB SY
0x3418AEF4: F64E 5114 MOVW R1, #0xED14
0x3418AEF8: F2CE 0100 MOVT R1, #0xE000
0x3418AEFC: 6808 LDR R0, [R1]
0x3418AEFE: F420 3000 BIC R0, R0, #0x020000
0x3418AF02: 6008 STR R0, [R1]
0x3418AF04: F64E 7150 MOVW R1, #0xEF50
0x3418AF08: F2CE 0100 MOVT R1, #0xE000
0x3418AF0C: 2000 MOVS R0, #0
0x3418AF0E: 6008 STR R0, [R1]
0x3418AF10: F3BF 8F4F DSB SY
0x3418AF14: F3BF 8F6F ISB SY
.L2:
0x3418AF18: F64E 5014 MOVW R0, #0xED14
0x3418AF1C: F2CE 0000 MOVT R0, #0xE000
0x3418AF20: 6800 LDR R0, [R0]
0x3418AF22: 03C0 LSLS R0, R0, #15
0x3418AF24: 2800 CMP R0, #0
0x3418AF26: D543 BPL 46L7 ; 0x3418AFB0
0x3418AF28: F64E 5184 MOVW R1, #0xED84
0x3418AF2C: F2CE 0100 MOVT R1, #0xE000
0x3418AF30: 2000 MOVS R0, #0
0x3418AF32: 6008 STR R0, [R1]
0x3418AF34: F3BF 8F4F DSB SY
0x3418AF38: F64E 5114 MOVW R1, #0xED14
0x3418AF3C: F2CE 0100 MOVT R1, #0xE000
0x3418AF40: 6808 LDR R0, [R1]
0x3418AF42: F420 3080 BIC R0, R0, #0x010000
0x3418AF46: 6008 STR R0, [R1]
0x3418AF48: F3BF 8F4F DSB SY
0x3418AF4C: F64E 7170 MOVW R1, #0xEF70
0x3418AF50: F2CE 0100 MOVT R1, #0xE000
0x3418AF54: A808 ADD R0, SP, #32
0x3418AF56: 6008 STR R0, [R1]
0x3418AF58: F3BF 8F4F DSB SY
0x3418AF5C: F3BF 8F6F ISB SY
0x3418AF60: F64E 5080 MOVW R0, #0xED80
0x3418AF64: F2CE 0000 MOVT R0, #0xE000
0x3418AF68: 6800 LDR R0, [R0]
0x3418AF6A: 9008 STR R0, [SP, #32]
0x3418AF6C: 9808 LDR R0, [SP, #32]
0x3418AF6E: F3C0 304E UBFX R0, R0, #13, #15
0x3418AF72: 9009 STR R0, [SP, #36]
.L3:
0x3418AF74: 9808 LDR R0, [SP, #32]
0x3418AF76: F3C0 00C9 UBFX R0, R0, #3, #10
0x3418AF7A: 900A STR R0, [SP, #40]
.L4:
0x3418AF7C: 9909 LDR R1, [SP, #36]
0x3418AF7E: 980A LDR R0, [SP, #40]
0x3418AF80: 0780 LSLS R0, R0, #30
0x3418AF82: F361 104D BFI R0, R1, #5, #9
0x3418AF86: F64E 7174 MOVW R1, #0xEF74
0x3418AF8A: F2CE 0100 MOVT R1, #0xE000
0x3418AF8E: 6008 STR R0, [R1]
0x3418AF90: 980A LDR R0, [SP, #40]
0x3418AF92: 1E41 SUBS R1, R0, #1
0x3418AF94: 910A STR R1, [SP, #40]
0x3418AF96: B108 CBZ R0, .L5 ; 0x3418AF9C
0x3418AF98: F02F C011 LE 46L4 ; 0x3418AF7C
.L5:
0x3418AF9C: 9809 LDR R0, [SP, #36]
0x3418AF9E: 1E41 SUBS R1, R0, #1
0x3418AFA0: 9109 STR R1, [SP, #36]
0x3418AFA2: B108 CBZ R0, .L6 ; 0x3418AFA8
0x3418AFA4: F02F C01B LE 46L3 ; 0x3418AF74
.L6:
0x3418AFA8: F3BF 8F4F DSB SY
0x3418AFAC: F3BF 8F6F ISB SY
.L7:
0x3418AFB0: F3EF 8010 MRS R0, PRIMASK
0x3418AFB4: 9010 STR R0, [SP, #64]
0x3418AFB6: 9810 LDR R0, [SP, #64]
0x3418AFB8: 9006 STR R0, [SP, #24]
0x3418AFBA: B672 CPSID i
0x3418AFBC: 9805 LDR R0, [SP, #20]
0x3418AFBE: F240 4100 MOVW R1, #0x0400
0x3418AFC2: F2C0 0108 MOVT R1, #8
0x3418AFC6: 4408 ADD R0, R1
0x3418AFC8: 9005 STR R0, [SP, #20]
0x3418AFCA: 9805 LDR R0, [SP, #20]
0x3418AFCC: F64E 5108 MOVW R1, #0xED08
0x3418AFD0: F2CE 0100 MOVT R1, #0xE000
0x3418AFD4: 6008 STR R0, [R1]
0x3418AFD6: 9805 LDR R0, [SP, #20]
0x3418AFD8: 6841 LDR R1, [R0, #4]
0x3418AFDA: F240 209C MOVW R0, #0x029C ; 0x3400029C = JumpToApplication.JumpToApp
0x3418AFDE: F2C3 4000 MOVT R0, #0x3400 ; 0x3400029C = JumpToApplication.JumpToApp
0x3418AFE2: 6001 STR R1, [R0]
0x3418AFE4: 2100 MOVS R1, #0
0x3418AFE6: 9104 STR R1, [SP, #16]
0x3418AFE8: 9111 STR R1, [SP, #68]
0x3418AFEA: 9911 LDR R1, [SP, #68]
0x3418AFEC: F381 880A MSR MSPLIM, R1
0x3418AFF0: 9905 LDR R1, [SP, #20]
0x3418AFF2: 6809 LDR R1, [R1]
0x3418AFF4: 9112 STR R1, [SP, #72]
0x3418AFF6: 9912 LDR R1, [SP, #72]
0x3418AFF8: F381 8808 MSR MSP, R1
0x3418AFFC: 9906 LDR R1, [SP, #24]
0x3418AFFE: 9113 STR R1, [SP, #76]
0x3418B000: 9913 LDR R1, [SP, #76]
0x3418B002: F381 8810 MSR PRIMASK, R1
0x3418B006: 6800 LDR R0, [R0]
0x3418B008: 4780 BLX R0
0x3418B00A: 9804 LDR R0, [SP, #16]
0x3418B00C: F88D 001F STRB.W R0, [SP, #31]
.L8:
0x3418B010: F89D 001F LDRB.W R0, [SP, #31]
0x3418B014: F1A7 0408 SUB.W R4, R7, #8
0x3418B018: 46A5 MOV SP, R4
0x3418B01A: BDD0 POP 123R4, R6-R7, PC}
Section .text.CheckSFDP_Signature from blto2_FSBL_lto.o, size=80, align=4
CheckSFDP_Signature:
0x3418B01C: B580 PUSH 123R7, LR}
0x3418B01E: B084 SUB SP, SP, #16
0x3418B020: 9003 STR R0, [SP, #12]
0x3418B022: 9102 STR R1, [SP, #8]
0x3418B024: 2004 MOVS R0, #4
0x3418B026: F88D 0007 STRB.W R0, [SP, #7]
0x3418B02A: 9802 LDR R0, [SP, #8]
0x3418B02C: 9000 STR R0, [SP, #0]
0x3418B02E: F245 3146 MOVW R1, #0x5346
0x3418B032: F2C4 4150 MOVT R1, #0x4450
0x3418B036: 4288 CMP R0, R1
0x3418B038: D00A BEQ 46L1 ; 0x3418B050
0x3418B03A: 9800 LDR R0, [SP, #0]
0x3418B03C: F244 6153 MOVW R1, #0x4653
0x3418B040: F2C5 0144 MOVT R1, #0x5044
0x3418B044: 4288 CMP R0, R1
0x3418B046: D10D BNE 46L3 ; 0x3418B064
0x3418B048: 2000 MOVS R0, #0
0x3418B04A: F88D 0007 STRB.W R0, [SP, #7]
0x3418B04E: E009 B 46L3 ; 0x3418B064
.L1:
0x3418B050: 9803 LDR R0, [SP, #12]
0x3418B052: 3008 ADDS R0, #8
0x3418B054: 2100 MOVS R1, #0
0x3418B056: F001 FB49 BL SAL_XSPI_UpdateMemoryType ; 0x3418C6EC
0x3418B05A: B910 CBNZ R0, .L2 ; 0x3418B062
0x3418B05C: 2005 MOVS R0, #5
0x3418B05E: F88D 0007 STRB.W R0, [SP, #7]
.L2:
0x3418B062: E7FF B 46L3 ; 0x3418B064
.L3:
0x3418B064: F89D 0007 LDRB.W R0, [SP, #7]
0x3418B068: B004 ADD SP, SP, #16
0x3418B06A: BD80 POP 123R7, PC}
0x3418B06C: B580 PUSH 123R7, LR}
0x3418B06E: B08C SUB SP, SP, #48
0x3418B070: 900B STR R0, [SP, #44]
0x3418B072: 910A STR R1, [SP, #40]
0x3418B074: 2004 MOVS R0, #4
0x3418B076: F88D 0027 STRB.W R0, [SP, #39]
0x3418B07A: F640 200B MOVW R0, #0x0A0B
0x3418B07E: F2C1 000B MOVT R0, #0x100B
0x3418B082: 9008 STR R0, [SP, #32]
0x3418B084: F640 000B MOVW R0, #0x080B
0x3418B088: F2C1 400B MOVT R0, #0x140B
0x3418B08C: 9007 STR R0, [SP, #28]
0x3418B08E: F640 0006 MOVW R0, #0x0806
0x3418B092: F2C0 6006 MOVT R0, #0x0606
0x3418B096: 9006 STR R0, [SP, #24]
0x3418B098: F640 0000 MOVW R0, #0x0800
0x3418B09C: F2C0 2006 MOVT R0, #0x0206
0x3418B0A0: 9005 STR R0, [SP, #20]
0x3418B0A2: 2000 MOVS R0, #0
0x3418B0A4: F88D 0013 STRB.W R0, [SP, #19]
.L1:
0x3418B0A8: F89D 1013 LDRB.W R1, [SP, #19]
0x3418B0AC: 2000 MOVS R0, #0
0x3418B0AE: 2907 CMP R1, #7
0x3418B0B0: 9003 STR R0, [SP, #12]
0x3418B0B2: D805 BHI 46L2 ; 0x3418B0C0
0x3418B0B4: F89D 0027 LDRB.W R0, [SP, #39]
0x3418B0B8: 2804 CMP R0, #4
0x3418B0BA: EA5F 901F CSET R0, EQ
0x3418B0BE: 9003 STR R0, [SP, #12]
.L2:
0x3418B0C0: 9803 LDR R0, [SP, #12]
0x3418B0C2: 07C0 LSLS R0, R0, #31
0x3418B0C4: 2800 CMP R0, #0
0x3418B0C6: D04D BEQ 46L8 ; 0x3418B164
0x3418B0C8: F89D 1013 LDRB.W R1, [SP, #19]
0x3418B0CC: A805 ADD R0, SP, #20
0x3418B0CE: 9001 STR R0, [SP, #4]
0x3418B0D0: F810 0011 LDRB.W R0, [R0, R1, LSL #1]
0x3418B0D4: 990B LDR R1, [SP, #44]
0x3418B0D6: F881 0064 STRB.W R0, [R1, #100]
0x3418B0DA: 990B LDR R1, [SP, #44]
0x3418B0DC: F101 0008 ADD.W R0, R1, #8
0x3418B0E0: F101 0264 ADD.W R2, R1, #100
0x3418B0E4: 2100 MOVS R1, #0
0x3418B0E6: 9102 STR R1, [SP, #8]
0x3418B0E8: F007 F9C2 BL SAL_XSPI_MemoryConfig ; 0x34192470
0x3418B0EC: 9901 LDR R1, [SP, #4]
0x3418B0EE: 9802 LDR R0, [SP, #8]
0x3418B0F0: F89D 2013 LDRB.W R2, [SP, #19]
0x3418B0F4: EB01 0142 ADD.W R1, R1, R2, LSL #1
0x3418B0F8: 7849 LDRB R1, [R1, #1]
0x3418B0FA: 9A0B LDR R2, [SP, #44]
0x3418B0FC: F882 1059 STRB.W R1, [R2, #89]
0x3418B100: F88D 0012 STRB.W R0, [SP, #18]
.L3:
0x3418B104: F89D 1012 LDRB.W R1, [SP, #18]
0x3418B108: 2000 MOVS R0, #0
0x3418B10A: 2901 CMP R1, #1
0x3418B10C: 9000 STR R0, [SP, #0]
0x3418B10E: D805 BHI 46L4 ; 0x3418B11C
0x3418B110: F89D 0027 LDRB.W R0, [SP, #39]
0x3418B114: 2804 CMP R0, #4
0x3418B116: EA5F 901F CSET R0, EQ
0x3418B11A: 9000 STR R0, [SP, #0]
.L4:
0x3418B11C: 9800 LDR R0, [SP, #0]
0x3418B11E: 07C0 LSLS R0, R0, #31
0x3418B120: B1D0 CBZ R0, .L7 ; 0x3418B158
0x3418B122: F89D 0012 LDRB.W R0, [SP, #18]
0x3418B126: 990B LDR R1, [SP, #44]
0x3418B128: F881 0058 STRB.W R0, [R1, #88]
0x3418B12C: 980B LDR R0, [SP, #44]
0x3418B12E: 990A LDR R1, [SP, #40]
0x3418B130: F006 FCDE BL SFDP_ReadHeader ; 0x34191AF0
0x3418B134: B910 CBNZ R0, .L5 ; 0x3418B13C
0x3418B136: 2000 MOVS R0, #0
0x3418B138: F88D 0027 STRB.W R0, [SP, #39]
.L5:
0x3418B13C: F89D 1013 LDRB.W R1, [SP, #19]
0x3418B140: A805 ADD R0, SP, #20
0x3418B142: F810 0011 LDRB.W R0, [R0, R1, LSL #1]
0x3418B146: 2805 CMP R0, #5
0x3418B148: DC00 BGT 46L6 ; 0x3418B14C
0x3418B14A: E005 B 46L7 ; 0x3418B158
.L6:
0x3418B14C: F89D 0012 LDRB.W R0, [SP, #18]
0x3418B150: 3001 ADDS R0, #1
0x3418B152: F88D 0012 STRB.W R0, [SP, #18]
0x3418B156: E7D5 B 46L3 ; 0x3418B104
.L7:
0x3418B158: F89D 0013 LDRB.W R0, [SP, #19]
0x3418B15C: 3001 ADDS R0, #1
0x3418B15E: F88D 0013 STRB.W R0, [SP, #19]
0x3418B162: E7A1 B 46L1 ; 0x3418B0A8
.L8:
0x3418B164: F89D 0027 LDRB.W R0, [SP, #39]
0x3418B168: B00C ADD SP, SP, #48
0x3418B16A: BD80 POP 123R7, PC}
Section .text.sfdp_get_paraminfo from blto2_FSBL_lto.o, size=652, align=4
sfdp_get_paraminfo:
0x3418B16C: B580 PUSH 123R7, LR}
0x3418B16E: B088 SUB SP, SP, #32
0x3418B170: 9007 STR R0, [SP, #28]
0x3418B172: 9106 STR R1, [SP, #24]
0x3418B174: 9205 STR R2, [SP, #20]
0x3418B176: 2000 MOVS R0, #0
0x3418B178: F88D 0013 STRB.W R0, [SP, #19]
0x3418B17C: 9003 STR R0, [SP, #12]
0x3418B17E: 9002 STR R0, [SP, #8]
0x3418B180: 9807 LDR R0, [SP, #28]
0x3418B182: 3008 ADDS R0, #8
0x3418B184: 9906 LDR R1, [SP, #24]
0x3418B186: AA02 ADD R2, SP, #8
0x3418B188: 2308 MOVS R3, #8
0x3418B18A: F007 FABF BL SAL_XSPI_GetSFDP ; 0x3419270C
0x3418B18E: B118 CBZ R0, .L1 ; 0x3418B198
0x3418B190: 2003 MOVS R0, #3
0x3418B192: F88D 0013 STRB.W R0, [SP, #19]
0x3418B196: E12B B 46L10 ; 0x3418B3F0
.L1:
0x3418B198: 9905 LDR R1, [SP, #20]
0x3418B19A: 2000 MOVS R0, #0
0x3418B19C: 6008 STR R0, [R1]
0x3418B19E: F89D 000B LDRB.W R0, [SP, #11]
0x3418B1A2: 9905 LDR R1, [SP, #20]
0x3418B1A4: 7208 STRB R0, [R1, #8]
0x3418B1A6: F89D 100C LDRB.W R1, [SP, #12]
0x3418B1AA: F89D 200D LDRB.W R2, [SP, #13]
0x3418B1AE: F89D 000E LDRB.W R0, [SP, #14]
0x3418B1B2: 0400 LSLS R0, R0, #16
0x3418B1B4: EA40 2002 ORR.W R0, R0, R2, LSL #8
0x3418B1B8: 4408 ADD R0, R1
0x3418B1BA: 9905 LDR R1, [SP, #20]
0x3418B1BC: 6048 STR R0, [R1, #4]
0x3418B1BE: F89D 000F LDRB.W R0, [SP, #15]
0x3418B1C2: B178 CBZ R0, .L4 ; 0x3418B1E4
0x3418B1C4: F99D 000F LDRSB.W R0, [SP, #15]
0x3418B1C8: 2800 CMP R0, #0
0x3418B1CA: D40B BMI 46L4 ; 0x3418B1E4
0x3418B1CC: F89D 0008 LDRB.W R0, [SP, #8]
0x3418B1D0: 07C0 LSLS R0, R0, #31
0x3418B1D2: B118 CBZ R0, .L2 ; 0x3418B1DC
0x3418B1D4: 9905 LDR R1, [SP, #20]
0x3418B1D6: 2001 MOVS R0, #1
0x3418B1D8: 6008 STR R0, [R1]
0x3418B1DA: E002 B 46L3 ; 0x3418B1E2
.L2:
0x3418B1DC: 9905 LDR R1, [SP, #20]
0x3418B1DE: 2002 MOVS R0, #2
0x3418B1E0: 6008 STR R0, [R1]
.L3:
0x3418B1E2: E105 B 46L10 ; 0x3418B3F0
.L4:
0x3418B1E4: F99D 000F LDRSB.W R0, [SP, #15]
0x3418B1E8: F1B0 3FFF CMP.W R0, #0xFFFFFFFF
0x3418B1EC: F300 80FC BGT.W 46L9 ; 0x3418B3E8
0x3418B1F0: F89D 0008 LDRB.W R0, [SP, #8]
0x3418B1F4: 07C0 LSLS R0, R0, #31
0x3418B1F6: B910 CBNZ R0, .L5 ; 0x3418B1FE
0x3418B1F8: 9905 LDR R1, [SP, #20]
0x3418B1FA: 2004 MOVS R0, #4
0x3418B1FC: 6008 STR R0, [R1]
.L5:
0x3418B1FE: F89D 000F LDRB.W R0, [SP, #15]
0x3418B202: 28FF CMP R0, #255
0x3418B204: F040 80EC BNE.W 46L8 ; 0x3418B3E0
0x3418B208: F89D 0008 LDRB.W R0, [SP, #8]
0x3418B20C: 4601 MOV R1, R0
0x3418B20E: 9101 STR R1, [SP, #4]
0x3418B210: 288E CMP R0, #142
0x3418B212: F200 80E5 BHI.W 46L8 ; 0x3418B3E0
0x3418B216: 9901 LDR R1, [SP, #4]
0x3418B218: E8DF F011 TBH 91PC, R1, LSL #1]
0x3418B21C: 8F DC.B 0x8F ; '\x8F'
0x3418B21D: 00 DC.B 0x00 ; '\0'
0x3418B21E: E2 DC.B 0xE2 ; '\xE2'
0x3418B21F: 00 DC.B 0x00 ; '\0'
0x3418B220: E2 DC.B 0xE2 ; '\xE2'
0x3418B221: 00 DC.B 0x00 ; '\0'
0x3418B222: A4 DC.B 0xA4 ; '\xA4'
0x3418B223: 00 DC.B 0x00 ; '\0'
0x3418B224: E2 DC.B 0xE2 ; '\xE2'
0x3418B225: 00 DC.B 0x00 ; '\0'
0x3418B226: AC DC.B 0xAC ; '\xAC'
0x3418B227: 00 DC.B 0x00 ; '\0'
0x3418B228: B0 DC.B 0xB0 ; '\xB0'
0x3418B229: 00 DC.B 0x00 ; '\0'
0x3418B22A: E2 DC.B 0xE2 ; '\xE2'
0x3418B22B: 00 DC.B 0x00 ; '\0'
0x3418B22C: E2 DC.B 0xE2 ; '\xE2'
0x3418B22D: 00 DC.B 0x00 ; '\0'
0x3418B22E: BF DC.B 0xBF ; '\xBF'
0x3418B22F: 00 DC.B 0x00 ; '\0'
0x3418B230: C4 DC.B 0xC4 ; '\xC4'
0x3418B231: 00 DC.B 0x00 ; '\0'
0x3418B232: E2 DC.B 0xE2 ; '\xE2'
0x3418B233: 00 DC.B 0x00 ; '\0'
0x3418B234: CE DC.B 0xCE ; '\xCE'
0x3418B235: 00 DC.B 0x00 ; '\0'
0x3418B236: E2 DC.B 0xE2 ; '\xE2'
0x3418B237: 00 DC.B 0x00 ; '\0'
0x3418B238: E2 DC.B 0xE2 ; '\xE2'
0x3418B239: 00 DC.B 0x00 ; '\0'
0x3418B23A: DD DC.B 0xDD ; '\xDD'
0x3418B23B: 00 DC.B 0x00 ; '\0'
0x3418B23C: E2 DC.B 0xE2 ; '\xE2'
0x3418B23D: 00 DC.B 0x00 ; '\0'
0x3418B23E: E2 DC.B 0xE2 ; '\xE2'
0x3418B23F: 00 DC.B 0x00 ; '\0'
0x3418B240: E2 DC.B 0xE2 ; '\xE2'
0x3418B241: 00 DC.B 0x00 ; '\0'
0x3418B242: E2 DC.B 0xE2 ; '\xE2'
0x3418B243: 00 DC.B 0x00 ; '\0'
0x3418B244: E2 DC.B 0xE2 ; '\xE2'
0x3418B245: 00 DC.B 0x00 ; '\0'
0x3418B246: E2 DC.B 0xE2 ; '\xE2'
0x3418B247: 00 DC.B 0x00 ; '\0'
0x3418B248: E2 DC.B 0xE2 ; '\xE2'
0x3418B249: 00 DC.B 0x00 ; '\0'
0x3418B24A: E2 DC.B 0xE2 ; '\xE2'
0x3418B24B: 00 DC.B 0x00 ; '\0'
0x3418B24C: E2 DC.B 0xE2 ; '\xE2'
0x3418B24D: 00 DC.B 0x00 ; '\0'
0x3418B24E: E2 DC.B 0xE2 ; '\xE2'
0x3418B24F: 00 DC.B 0x00 ; '\0'
0x3418B250: E2 DC.B 0xE2 ; '\xE2'
0x3418B251: 00 DC.B 0x00 ; '\0'
0x3418B252: E2 DC.B 0xE2 ; '\xE2'
0x3418B253: 00 DC.B 0x00 ; '\0'
0x3418B254: E2 DC.B 0xE2 ; '\xE2'
0x3418B255: 00 DC.B 0x00 ; '\0'
0x3418B256: E2 DC.B 0xE2 ; '\xE2'
0x3418B257: 00 DC.B 0x00 ; '\0'
0x3418B258: E2 DC.B 0xE2 ; '\xE2'
0x3418B259: 00 DC.B 0x00 ; '\0'
0x3418B25A: E2 DC.B 0xE2 ; '\xE2'
0x3418B25B: 00 DC.B 0x00 ; '\0'
0x3418B25C: E2 DC.B 0xE2 ; '\xE2'
0x3418B25D: 00 DC.B 0x00 ; '\0'
0x3418B25E: E2 DC.B 0xE2 ; '\xE2'
0x3418B25F: 00 DC.B 0x00 ; '\0'
0x3418B260: E2 DC.B 0xE2 ; '\xE2'
0x3418B261: 00 DC.B 0x00 ; '\0'
0x3418B262: E2 DC.B 0xE2 ; '\xE2'
0x3418B263: 00 DC.B 0x00 ; '\0'
0x3418B264: E2 DC.B 0xE2 ; '\xE2'
0x3418B265: 00 DC.B 0x00 ; '\0'
0x3418B266: E2 DC.B 0xE2 ; '\xE2'
0x3418B267: 00 DC.B 0x00 ; '\0'
0x3418B268: E2 DC.B 0xE2 ; '\xE2'
0x3418B269: 00 DC.B 0x00 ; '\0'
0x3418B26A: E2 DC.B 0xE2 ; '\xE2'
0x3418B26B: 00 DC.B 0x00 ; '\0'
0x3418B26C: E2 DC.B 0xE2 ; '\xE2'
0x3418B26D: 00 DC.B 0x00 ; '\0'
0x3418B26E: E2 DC.B 0xE2 ; '\xE2'
0x3418B26F: 00 DC.B 0x00 ; '\0'
0x3418B270: E2 DC.B 0xE2 ; '\xE2'
0x3418B271: 00 DC.B 0x00 ; '\0'
0x3418B272: E2 DC.B 0xE2 ; '\xE2'
0x3418B273: 00 DC.B 0x00 ; '\0'
0x3418B274: E2 DC.B 0xE2 ; '\xE2'
0x3418B275: 00 DC.B 0x00 ; '\0'
0x3418B276: E2 DC.B 0xE2 ; '\xE2'
0x3418B277: 00 DC.B 0x00 ; '\0'
0x3418B278: E2 DC.B 0xE2 ; '\xE2'
0x3418B279: 00 DC.B 0x00 ; '\0'
0x3418B27A: E2 DC.B 0xE2 ; '\xE2'
0x3418B27B: 00 DC.B 0x00 ; '\0'
0x3418B27C: E2 DC.B 0xE2 ; '\xE2'
0x3418B27D: 00 DC.B 0x00 ; '\0'
0x3418B27E: E2 DC.B 0xE2 ; '\xE2'
0x3418B27F: 00 DC.B 0x00 ; '\0'
0x3418B280: E2 DC.B 0xE2 ; '\xE2'
0x3418B281: 00 DC.B 0x00 ; '\0'
0x3418B282: E2 DC.B 0xE2 ; '\xE2'
0x3418B283: 00 DC.B 0x00 ; '\0'
0x3418B284: E2 DC.B 0xE2 ; '\xE2'
0x3418B285: 00 DC.B 0x00 ; '\0'
0x3418B286: E2 DC.B 0xE2 ; '\xE2'
0x3418B287: 00 DC.B 0x00 ; '\0'
0x3418B288: E2 DC.B 0xE2 ; '\xE2'
0x3418B289: 00 DC.B 0x00 ; '\0'
0x3418B28A: E2 DC.B 0xE2 ; '\xE2'
0x3418B28B: 00 DC.B 0x00 ; '\0'
0x3418B28C: E2 DC.B 0xE2 ; '\xE2'
0x3418B28D: 00 DC.B 0x00 ; '\0'
0x3418B28E: E2 DC.B 0xE2 ; '\xE2'
0x3418B28F: 00 DC.B 0x00 ; '\0'
0x3418B290: E2 DC.B 0xE2 ; '\xE2'
0x3418B291: 00 DC.B 0x00 ; '\0'
0x3418B292: E2 DC.B 0xE2 ; '\xE2'
0x3418B293: 00 DC.B 0x00 ; '\0'
0x3418B294: E2 DC.B 0xE2 ; '\xE2'
0x3418B295: 00 DC.B 0x00 ; '\0'
0x3418B296: E2 DC.B 0xE2 ; '\xE2'
0x3418B297: 00 DC.B 0x00 ; '\0'
0x3418B298: E2 DC.B 0xE2 ; '\xE2'
0x3418B299: 00 DC.B 0x00 ; '\0'
0x3418B29A: E2 DC.B 0xE2 ; '\xE2'
0x3418B29B: 00 DC.B 0x00 ; '\0'
0x3418B29C: E2 DC.B 0xE2 ; '\xE2'
0x3418B29D: 00 DC.B 0x00 ; '\0'
0x3418B29E: E2 DC.B 0xE2 ; '\xE2'
0x3418B29F: 00 DC.B 0x00 ; '\0'
0x3418B2A0: E2 DC.B 0xE2 ; '\xE2'
0x3418B2A1: 00 DC.B 0x00 ; '\0'
0x3418B2A2: E2 DC.B 0xE2 ; '\xE2'
0x3418B2A3: 00 DC.B 0x00 ; '\0'
0x3418B2A4: E2 DC.B 0xE2 ; '\xE2'
0x3418B2A5: 00 DC.B 0x00 ; '\0'
0x3418B2A6: E2 DC.B 0xE2 ; '\xE2'
0x3418B2A7: 00 DC.B 0x00 ; '\0'
0x3418B2A8: E2 DC.B 0xE2 ; '\xE2'
0x3418B2A9: 00 DC.B 0x00 ; '\0'
0x3418B2AA: E2 DC.B 0xE2 ; '\xE2'
0x3418B2AB: 00 DC.B 0x00 ; '\0'
0x3418B2AC: E2 DC.B 0xE2 ; '\xE2'
0x3418B2AD: 00 DC.B 0x00 ; '\0'
0x3418B2AE: E2 DC.B 0xE2 ; '\xE2'
0x3418B2AF: 00 DC.B 0x00 ; '\0'
0x3418B2B0: E2 DC.B 0xE2 ; '\xE2'
0x3418B2B1: 00 DC.B 0x00 ; '\0'
0x3418B2B2: E2 DC.B 0xE2 ; '\xE2'
0x3418B2B3: 00 DC.B 0x00 ; '\0'
0x3418B2B4: E2 DC.B 0xE2 ; '\xE2'
0x3418B2B5: 00 DC.B 0x00 ; '\0'
0x3418B2B6: E2 DC.B 0xE2 ; '\xE2'
0x3418B2B7: 00 DC.B 0x00 ; '\0'
0x3418B2B8: E2 DC.B 0xE2 ; '\xE2'
0x3418B2B9: 00 DC.B 0x00 ; '\0'
0x3418B2BA: E2 DC.B 0xE2 ; '\xE2'
0x3418B2BB: 00 DC.B 0x00 ; '\0'
0x3418B2BC: E2 DC.B 0xE2 ; '\xE2'
0x3418B2BD: 00 DC.B 0x00 ; '\0'
0x3418B2BE: E2 DC.B 0xE2 ; '\xE2'
0x3418B2BF: 00 DC.B 0x00 ; '\0'
0x3418B2C0: E2 DC.B 0xE2 ; '\xE2'
0x3418B2C1: 00 DC.B 0x00 ; '\0'
0x3418B2C2: E2 DC.B 0xE2 ; '\xE2'
0x3418B2C3: 00 DC.B 0x00 ; '\0'
0x3418B2C4: E2 DC.B 0xE2 ; '\xE2'
0x3418B2C5: 00 DC.B 0x00 ; '\0'
0x3418B2C6: E2 DC.B 0xE2 ; '\xE2'
0x3418B2C7: 00 DC.B 0x00 ; '\0'
0x3418B2C8: E2 DC.B 0xE2 ; '\xE2'
0x3418B2C9: 00 DC.B 0x00 ; '\0'
0x3418B2CA: E2 DC.B 0xE2 ; '\xE2'
0x3418B2CB: 00 DC.B 0x00 ; '\0'
0x3418B2CC: E2 DC.B 0xE2 ; '\xE2'
0x3418B2CD: 00 DC.B 0x00 ; '\0'
0x3418B2CE: E2 DC.B 0xE2 ; '\xE2'
0x3418B2CF: 00 DC.B 0x00 ; '\0'
0x3418B2D0: E2 DC.B 0xE2 ; '\xE2'
0x3418B2D1: 00 DC.B 0x00 ; '\0'
0x3418B2D2: E2 DC.B 0xE2 ; '\xE2'
0x3418B2D3: 00 DC.B 0x00 ; '\0'
0x3418B2D4: E2 DC.B 0xE2 ; '\xE2'
0x3418B2D5: 00 DC.B 0x00 ; '\0'
0x3418B2D6: E2 DC.B 0xE2 ; '\xE2'
0x3418B2D7: 00 DC.B 0x00 ; '\0'
0x3418B2D8: E2 DC.B 0xE2 ; '\xE2'
0x3418B2D9: 00 DC.B 0x00 ; '\0'
0x3418B2DA: E2 DC.B 0xE2 ; '\xE2'
0x3418B2DB: 00 DC.B 0x00 ; '\0'
0x3418B2DC: E2 DC.B 0xE2 ; '\xE2'
0x3418B2DD: 00 DC.B 0x00 ; '\0'
0x3418B2DE: E2 DC.B 0xE2 ; '\xE2'
0x3418B2DF: 00 DC.B 0x00 ; '\0'
0x3418B2E0: E2 DC.B 0xE2 ; '\xE2'
0x3418B2E1: 00 DC.B 0x00 ; '\0'
0x3418B2E2: E2 DC.B 0xE2 ; '\xE2'
0x3418B2E3: 00 DC.B 0x00 ; '\0'
0x3418B2E4: E2 DC.B 0xE2 ; '\xE2'
0x3418B2E5: 00 DC.B 0x00 ; '\0'
0x3418B2E6: E2 DC.B 0xE2 ; '\xE2'
0x3418B2E7: 00 DC.B 0x00 ; '\0'
0x3418B2E8: E2 DC.B 0xE2 ; '\xE2'
0x3418B2E9: 00 DC.B 0x00 ; '\0'
0x3418B2EA: E2 DC.B 0xE2 ; '\xE2'
0x3418B2EB: 00 DC.B 0x00 ; '\0'
0x3418B2EC: E2 DC.B 0xE2 ; '\xE2'
0x3418B2ED: 00 DC.B 0x00 ; '\0'
0x3418B2EE: E2 DC.B 0xE2 ; '\xE2'
0x3418B2EF: 00 DC.B 0x00 ; '\0'
0x3418B2F0: E2 DC.B 0xE2 ; '\xE2'
0x3418B2F1: 00 DC.B 0x00 ; '\0'
0x3418B2F2: E2 DC.B 0xE2 ; '\xE2'
0x3418B2F3: 00 DC.B 0x00 ; '\0'
0x3418B2F4: E2 DC.B 0xE2 ; '\xE2'
0x3418B2F5: 00 DC.B 0x00 ; '\0'
0x3418B2F6: E2 DC.B 0xE2 ; '\xE2'
0x3418B2F7: 00 DC.B 0x00 ; '\0'
0x3418B2F8: E2 DC.B 0xE2 ; '\xE2'
0x3418B2F9: 00 DC.B 0x00 ; '\0'
0x3418B2FA: E2 DC.B 0xE2 ; '\xE2'
0x3418B2FB: 00 DC.B 0x00 ; '\0'
0x3418B2FC: E2 DC.B 0xE2 ; '\xE2'
0x3418B2FD: 00 DC.B 0x00 ; '\0'
0x3418B2FE: E2 DC.B 0xE2 ; '\xE2'
0x3418B2FF: 00 DC.B 0x00 ; '\0'
0x3418B300: E2 DC.B 0xE2 ; '\xE2'
0x3418B301: 00 DC.B 0x00 ; '\0'
0x3418B302: E2 DC.B 0xE2 ; '\xE2'
0x3418B303: 00 DC.B 0x00 ; '\0'
0x3418B304: E2 DC.B 0xE2 ; '\xE2'
0x3418B305: 00 DC.B 0x00 ; '\0'
0x3418B306: E2 DC.B 0xE2 ; '\xE2'
0x3418B307: 00 DC.B 0x00 ; '\0'
0x3418B308: E2 DC.B 0xE2 ; '\xE2'
0x3418B309: 00 DC.B 0x00 ; '\0'
0x3418B30A: E2 DC.B 0xE2 ; '\xE2'
0x3418B30B: 00 DC.B 0x00 ; '\0'
0x3418B30C: E2 DC.B 0xE2 ; '\xE2'
0x3418B30D: 00 DC.B 0x00 ; '\0'
0x3418B30E: E2 DC.B 0xE2 ; '\xE2'
0x3418B30F: 00 DC.B 0x00 ; '\0'
0x3418B310: E2 DC.B 0xE2 ; '\xE2'
0x3418B311: 00 DC.B 0x00 ; '\0'
0x3418B312: E2 DC.B 0xE2 ; '\xE2'
0x3418B313: 00 DC.B 0x00 ; '\0'
0x3418B314: E2 DC.B 0xE2 ; '\xE2'
0x3418B315: 00 DC.B 0x00 ; '\0'
0x3418B316: E2 DC.B 0xE2 ; '\xE2'
0x3418B317: 00 DC.B 0x00 ; '\0'
0x3418B318: E2 DC.B 0xE2 ; '\xE2'
0x3418B319: 00 DC.B 0x00 ; '\0'
0x3418B31A: E2 DC.B 0xE2 ; '\xE2'
0x3418B31B: 00 DC.B 0x00 ; '\0'
0x3418B31C: E2 DC.B 0xE2 ; '\xE2'
0x3418B31D: 00 DC.B 0x00 ; '\0'
0x3418B31E: A0 DC.B 0xA0 ; '\xA0'
0x3418B31F: 00 DC.B 0x00 ; '\0'
0x3418B320: E2 DC.B 0xE2 ; '\xE2'
0x3418B321: 00 DC.B 0x00 ; '\0'
0x3418B322: E2 DC.B 0xE2 ; '\xE2'
0x3418B323: 00 DC.B 0x00 ; '\0'
0x3418B324: A8 DC.B 0xA8 ; '\xA8'
0x3418B325: 00 DC.B 0x00 ; '\0'
0x3418B326: E2 DC.B 0xE2 ; '\xE2'
0x3418B327: 00 DC.B 0x00 ; '\0'
0x3418B328: E2 DC.B 0xE2 ; '\xE2'
0x3418B329: 00 DC.B 0x00 ; '\0'
0x3418B32A: B5 DC.B 0xB5 ; '\xB5'
0x3418B32B: 00 DC.B 0x00 ; '\0'
0x3418B32C: BA DC.B 0xBA ; '\xBA'
0x3418B32D: 00 DC.B 0x00 ; '\0'
0x3418B32E: E2 DC.B 0xE2 ; '\xE2'
0x3418B32F: 00 DC.B 0x00 ; '\0'
0x3418B330: E2 DC.B 0xE2 ; '\xE2'
0x3418B331: 00 DC.B 0x00 ; '\0'
0x3418B332: C9 DC.B 0xC9 ; '\xC9'
0x3418B333: 00 DC.B 0x00 ; '\0'
0x3418B334: E2 DC.B 0xE2 ; '\xE2'
0x3418B335: 00 DC.B 0x00 ; '\0'
0x3418B336: D3 DC.B 0xD3 ; '\xD3'
0x3418B337: 00 DC.B 0x00 ; '\0'
0x3418B338: D8 DC.B 0xD8 ; '\xD8'
0x3418B339: 00 DC.B 0x00 ; '\0'
0x3418B33A: 9905 LDR R1, [SP, #20]
0x3418B33C: 2008 MOVS R0, #8
0x3418B33E: 6008 STR R0, [R1]
0x3418B340: F89D 000B LDRB.W R0, [SP, #11]
0x3418B344: 2816 CMP R0, #22
0x3418B346: D803 BHI 46L6 ; 0x3418B350
0x3418B348: F89D 000B LDRB.W R0, [SP, #11]
0x3418B34C: 9000 STR R0, [SP, #0]
0x3418B34E: E001 B 46L7 ; 0x3418B354
.L6:
0x3418B350: 2017 MOVS R0, #23
0x3418B352: 9000 STR R0, [SP, #0]
.L7:
0x3418B354: 9800 LDR R0, [SP, #0]
0x3418B356: 9905 LDR R1, [SP, #20]
0x3418B358: 7208 STRB R0, [R1, #8]
0x3418B35A: E041 B 46L8 ; 0x3418B3E0
0x3418B35C: 9905 LDR R1, [SP, #20]
0x3418B35E: 2010 MOVS R0, #16
0x3418B360: 6008 STR R0, [R1]
0x3418B362: E03D B 46L8 ; 0x3418B3E0
0x3418B364: 9905 LDR R1, [SP, #20]
0x3418B366: 2020 MOVS R0, #32
0x3418B368: 6008 STR R0, [R1]
0x3418B36A: E039 B 46L8 ; 0x3418B3E0
0x3418B36C: 9905 LDR R1, [SP, #20]
0x3418B36E: 2040 MOVS R0, #64
0x3418B370: 6008 STR R0, [R1]
0x3418B372: E035 B 46L8 ; 0x3418B3E0
0x3418B374: 9905 LDR R1, [SP, #20]
0x3418B376: 2080 MOVS R0, #128
0x3418B378: 6008 STR R0, [R1]
0x3418B37A: E031 B 46L8 ; 0x3418B3E0
0x3418B37C: 9905 LDR R1, [SP, #20]
0x3418B37E: F44F 7080 MOV.W R0, #0x0100
0x3418B382: 6008 STR R0, [R1]
0x3418B384: E02C B 46L8 ; 0x3418B3E0
0x3418B386: 9905 LDR R1, [SP, #20]
0x3418B388: F44F 7000 MOV.W R0, #0x0200
0x3418B38C: 6008 STR R0, [R1]
0x3418B38E: E027 B 46L8 ; 0x3418B3E0
0x3418B390: 9905 LDR R1, [SP, #20]
0x3418B392: F44F 6080 MOV.W R0, #0x0400
0x3418B396: 6008 STR R0, [R1]
0x3418B398: E022 B 46L8 ; 0x3418B3E0
0x3418B39A: 9905 LDR R1, [SP, #20]
0x3418B39C: F44F 6000 MOV.W R0, #0x0800
0x3418B3A0: 6008 STR R0, [R1]
0x3418B3A2: E01D B 46L8 ; 0x3418B3E0
0x3418B3A4: 9905 LDR R1, [SP, #20]
0x3418B3A6: F44F 5080 MOV.W R0, #0x1000
0x3418B3AA: 6008 STR R0, [R1]
0x3418B3AC: E018 B 46L8 ; 0x3418B3E0
0x3418B3AE: 9905 LDR R1, [SP, #20]
0x3418B3B0: F44F 5000 MOV.W R0, #0x2000
0x3418B3B4: 6008 STR R0, [R1]
0x3418B3B6: E013 B 46L8 ; 0x3418B3E0
0x3418B3B8: 9905 LDR R1, [SP, #20]
0x3418B3BA: F44F 4080 MOV.W R0, #0x4000
0x3418B3BE: 6008 STR R0, [R1]
0x3418B3C0: E00E B 46L8 ; 0x3418B3E0
0x3418B3C2: 9905 LDR R1, [SP, #20]
0x3418B3C4: F44F 4000 MOV.W R0, #0x8000
0x3418B3C8: 6008 STR R0, [R1]
0x3418B3CA: E009 B 46L8 ; 0x3418B3E0
0x3418B3CC: 9905 LDR R1, [SP, #20]
0x3418B3CE: F44F 3080 MOV.W R0, #0x010000
0x3418B3D2: 6008 STR R0, [R1]
0x3418B3D4: E004 B 46L8 ; 0x3418B3E0
0x3418B3D6: 9905 LDR R1, [SP, #20]
0x3418B3D8: F44F 3000 MOV.W R0, #0x020000
0x3418B3DC: 6008 STR R0, [R1]
0x3418B3DE: E7FF B 46L8 ; 0x3418B3E0
.L8:
0x3418B3E0: 9805 LDR R0, [SP, #20]
0x3418B3E2: 6800 LDR R0, [R0]
0x3418B3E4: BF00 NOP
0x3418B3E6: E003 B 46L10 ; 0x3418B3F0
.L9:
0x3418B3E8: 2003 MOVS R0, #3
0x3418B3EA: F88D 0013 STRB.W R0, [SP, #19]
0x3418B3EE: E7FF B 46L10 ; 0x3418B3F0
.L10:
0x3418B3F0: F89D 0013 LDRB.W R0, [SP, #19]
0x3418B3F4: B008 ADD SP, SP, #32
0x3418B3F6: BD80 POP 123R7, PC}
Section .text.SFDP_BuildGenericDriver from blto2_FSBL_lto.o, size=3092, align=4
SFDP_BuildGenericDriver:
0x3418B3F8: B5B0 PUSH 123R4-R5, R7, LR}
0x3418B3FA: B08E SUB SP, SP, #56
0x3418B3FC: 900C STR R0, [SP, #48]
0x3418B3FE: 910B STR R1, [SP, #44]
0x3418B400: 2000 MOVS R0, #0
0x3418B402: F88D 002B STRB.W R0, [SP, #43]
0x3418B406: F88D 002A STRB.W R0, [SP, #42]
0x3418B40A: 980C LDR R0, [SP, #48]
0x3418B40C: F8D0 0094 LDR.W R0, [R0, #148]
0x3418B410: F000 0008 AND R0, R0, #8
0x3418B414: 2808 CMP R0, #8
0x3418B416: D004 BEQ 46L1 ; 0x3418B422
0x3418B418: 2007 MOVS R0, #7
0x3418B41A: F88D 002B STRB.W R0, [SP, #43]
0x3418B41E: F000 BDF1 B.W 46L83 ; 0x3418C004
.L1:
0x3418B422: F240 10F8 MOVW R0, #0x01F8 ; 0x340001F8 = JEDEC_Basic
0x3418B426: F2C3 4000 MOVT R0, #0x3400 ; 0x340001F8 = JEDEC_Basic
0x3418B42A: 7AC0 LDRB R0, [R0, #11]
0x3418B42C: 0600 LSLS R0, R0, #24
0x3418B42E: 2800 CMP R0, #0
0x3418B430: D40F BMI 46L2 ; 0x3418B452
0x3418B432: F240 10F8 MOVW R0, #0x01F8 ; 0x340001F8 = JEDEC_Basic
0x3418B436: F2C3 4000 MOVT R0, #0x3400 ; 0x340001F8 = JEDEC_Basic
0x3418B43A: 6880 LDR R0, [R0, #8]
0x3418B43C: 3001 ADDS R0, #1
0x3418B43E: 900D STR R0, [SP, #52]
0x3418B440: 980D LDR R0, [SP, #52]
0x3418B442: FAB0 F080 CLZ R0, R0
0x3418B446: F1C0 001F RSB R0, R0, #31
0x3418B44A: 990C LDR R1, [SP, #48]
0x3418B44C: F881 005E STRB.W R0, [R1, #94]
0x3418B450: E007 B 46L3 ; 0x3418B462
.L2:
0x3418B452: F240 10F8 MOVW R0, #0x01F8 ; 0x340001F8 = JEDEC_Basic
0x3418B456: F2C3 4000 MOVT R0, #0x3400 ; 0x340001F8 = JEDEC_Basic
0x3418B45A: 6880 LDR R0, [R0, #8]
0x3418B45C: 990C LDR R1, [SP, #48]
0x3418B45E: F881 005E STRB.W R0, [R1, #94]
.L3:
0x3418B462: 990C LDR R1, [SP, #48]
0x3418B464: F891 005E LDRB.W R0, [R1, #94]
0x3418B468: 3803 SUBS R0, #3
0x3418B46A: F881 005E STRB.W R0, [R1, #94]
0x3418B46E: 980C LDR R0, [SP, #48]
0x3418B470: F890 005E LDRB.W R0, [R0, #94]
0x3418B474: 3801 SUBS R0, #1
0x3418B476: F88D 001F STRB.W R0, [SP, #31]
0x3418B47A: 980C LDR R0, [SP, #48]
0x3418B47C: 3008 ADDS R0, #8
0x3418B47E: 2104 MOVS R1, #4
0x3418B480: F10D 021F ADD.W R2, SP, #31
0x3418B484: F006 FFF4 BL SAL_XSPI_MemoryConfig ; 0x34192470
0x3418B488: F240 10F8 MOVW R0, #0x01F8 ; 0x340001F8 = JEDEC_Basic
0x3418B48C: F2C3 4000 MOVT R0, #0x3400 ; 0x340001F8 = JEDEC_Basic
0x3418B490: 9004 STR R0, [SP, #16]
0x3418B492: 6AC1 LDR R1, [R0, #44]
0x3418B494: F3C1 1203 UBFX R2, R1, #4, #4
0x3418B498: 2101 MOVS R1, #1
0x3418B49A: 4091 LSLS R1, R2
0x3418B49C: 9A0C LDR R2, [SP, #48]
0x3418B49E: 6611 STR R1, [R2, #96]
0x3418B4A0: 9A0C LDR R2, [SP, #48]
0x3418B4A2: 2102 MOVS R1, #2
0x3418B4A4: F882 1075 STRB.W R1, [R2, #117]
0x3418B4A8: 6A01 LDR R1, [R0, #32]
0x3418B4AA: 9A0C LDR R2, [SP, #48]
0x3418B4AC: F882 1077 STRB.W R1, [R2, #119]
0x3418B4B0: 6A01 LDR R1, [R0, #32]
0x3418B4B2: 0A09 LSRS R1, R1, #8
0x3418B4B4: 9A0C LDR R2, [SP, #48]
0x3418B4B6: F882 1078 STRB.W R1, [R2, #120]
0x3418B4BA: 8C41 LDRH R1, [R0, #34]
0x3418B4BC: 9A0C LDR R2, [SP, #48]
0x3418B4BE: F882 1079 STRB.W R1, [R2, #121]
0x3418B4C2: F890 1023 LDRB.W R1, [R0, #35]
0x3418B4C6: 9A0C LDR R2, [SP, #48]
0x3418B4C8: F882 107A STRB.W R1, [R2, #122]
0x3418B4CC: 6A41 LDR R1, [R0, #36]
0x3418B4CE: 9A0C LDR R2, [SP, #48]
0x3418B4D0: F882 107B STRB.W R1, [R2, #123]
0x3418B4D4: 6A41 LDR R1, [R0, #36]
0x3418B4D6: 0A09 LSRS R1, R1, #8
0x3418B4D8: 9A0C LDR R2, [SP, #48]
0x3418B4DA: F882 107C STRB.W R1, [R2, #124]
0x3418B4DE: 8CC1 LDRH R1, [R0, #38]
0x3418B4E0: 9A0C LDR R2, [SP, #48]
0x3418B4E2: F882 107D STRB.W R1, [R2, #125]
0x3418B4E6: F890 0027 LDRB.W R0, [R0, #39]
0x3418B4EA: 990C LDR R1, [SP, #48]
0x3418B4EC: F881 007E STRB.W R0, [R1, #126]
0x3418B4F0: 980C LDR R0, [SP, #48]
0x3418B4F2: F890 0077 LDRB.W R0, [R0, #119]
0x3418B4F6: B1B0 CBZ R0, .L4 ; 0x3418B526
0x3418B4F8: F240 10F8 MOVW R0, #0x01F8 ; 0x340001F8 = JEDEC_Basic
0x3418B4FC: F2C3 4000 MOVT R0, #0x3400 ; 0x340001F8 = JEDEC_Basic
0x3418B500: 6A81 LDR R1, [R0, #40]
0x3418B502: F001 000F AND R0, R1, #15
0x3418B506: F3C1 1204 UBFX R2, R1, #4, #5
0x3418B50A: 3201 ADDS R2, #1
0x3418B50C: 4350 MULS R0, R2, R0
0x3418B50E: F3C1 2241 UBFX R2, R1, #9, #2
0x3418B512: F642 217E MOVW R1, #0x2A7E ; 0x34192A7E = SFDP_BuildGenericDriver.block_erase_unit
0x3418B516: F2C3 4119 MOVT R1, #0x3419 ; 0x34192A7E = SFDP_BuildGenericDriver.block_erase_unit
0x3418B51A: F831 1012 LDRH.W R1, [R1, R2, LSL #1]
0x3418B51E: 4348 MULS R0, R1, R0
0x3418B520: 990C LDR R1, [SP, #48]
0x3418B522: F8C1 0080 STR.W R0, [R1, #128]
.L4:
0x3418B526: 980C LDR R0, [SP, #48]
0x3418B528: F890 0079 LDRB.W R0, [R0, #121]
0x3418B52C: B1B0 CBZ R0, .L5 ; 0x3418B55C
0x3418B52E: F240 10F8 MOVW R0, #0x01F8 ; 0x340001F8 = JEDEC_Basic
0x3418B532: F2C3 4000 MOVT R0, #0x3400 ; 0x340001F8 = JEDEC_Basic
0x3418B536: 6A81 LDR R1, [R0, #40]
0x3418B538: F001 000F AND R0, R1, #15
0x3418B53C: F3C1 22C4 UBFX R2, R1, #11, #5
0x3418B540: 3201 ADDS R2, #1
0x3418B542: 4350 MULS R0, R2, R0
0x3418B544: F3C1 4201 UBFX R2, R1, #16, #2
0x3418B548: F642 217E MOVW R1, #0x2A7E ; 0x34192A7E = SFDP_BuildGenericDriver.block_erase_unit
0x3418B54C: F2C3 4119 MOVT R1, #0x3419 ; 0x34192A7E = SFDP_BuildGenericDriver.block_erase_unit
0x3418B550: F831 1012 LDRH.W R1, [R1, R2, LSL #1]
0x3418B554: 4348 MULS R0, R1, R0
0x3418B556: 990C LDR R1, [SP, #48]
0x3418B558: F8C1 0084 STR.W R0, [R1, #132]
.L5:
0x3418B55C: 980C LDR R0, [SP, #48]
0x3418B55E: F890 007B LDRB.W R0, [R0, #123]
0x3418B562: B1B0 CBZ R0, .L6 ; 0x3418B592
0x3418B564: F240 10F8 MOVW R0, #0x01F8 ; 0x340001F8 = JEDEC_Basic
0x3418B568: F2C3 4000 MOVT R0, #0x3400 ; 0x340001F8 = JEDEC_Basic
0x3418B56C: 6A81 LDR R1, [R0, #40]
0x3418B56E: F001 000F AND R0, R1, #15
0x3418B572: F3C1 4284 UBFX R2, R1, #18, #5
0x3418B576: 3201 ADDS R2, #1
0x3418B578: 4350 MULS R0, R2, R0
0x3418B57A: F3C1 52C1 UBFX R2, R1, #23, #2
0x3418B57E: F642 217E MOVW R1, #0x2A7E ; 0x34192A7E = SFDP_BuildGenericDriver.block_erase_unit
0x3418B582: F2C3 4119 MOVT R1, #0x3419 ; 0x34192A7E = SFDP_BuildGenericDriver.block_erase_unit
0x3418B586: F831 1012 LDRH.W R1, [R1, R2, LSL #1]
0x3418B58A: 4348 MULS R0, R1, R0
0x3418B58C: 990C LDR R1, [SP, #48]
0x3418B58E: F8C1 0088 STR.W R0, [R1, #136]
.L6:
0x3418B592: 980C LDR R0, [SP, #48]
0x3418B594: F890 007D LDRB.W R0, [R0, #125]
0x3418B598: B1A8 CBZ R0, .L7 ; 0x3418B5C6
0x3418B59A: F240 10F8 MOVW R0, #0x01F8 ; 0x340001F8 = JEDEC_Basic
0x3418B59E: F2C3 4000 MOVT R0, #0x3400 ; 0x340001F8 = JEDEC_Basic
0x3418B5A2: 6A81 LDR R1, [R0, #40]
0x3418B5A4: F001 000F AND R0, R1, #15
0x3418B5A8: F3C1 6244 UBFX R2, R1, #25, #5
0x3418B5AC: 3201 ADDS R2, #1
0x3418B5AE: 4350 MULS R0, R2, R0
0x3418B5B0: 0F8A LSRS R2, R1, #30
0x3418B5B2: F642 217E MOVW R1, #0x2A7E ; 0x34192A7E = SFDP_BuildGenericDriver.block_erase_unit
0x3418B5B6: F2C3 4119 MOVT R1, #0x3419 ; 0x34192A7E = SFDP_BuildGenericDriver.block_erase_unit
0x3418B5BA: F831 1012 LDRH.W R1, [R1, R2, LSL #1]
0x3418B5BE: 4348 MULS R0, R1, R0
0x3418B5C0: 990C LDR R1, [SP, #48]
0x3418B5C2: F8C1 008C STR.W R0, [R1, #140]
.L7:
0x3418B5C6: F240 10F8 MOVW R0, #0x01F8 ; 0x340001F8 = JEDEC_Basic
0x3418B5CA: F2C3 4000 MOVT R0, #0x3400 ; 0x340001F8 = JEDEC_Basic
0x3418B5CE: 6A81 LDR R1, [R0, #40]
0x3418B5D0: 6AC2 LDR R2, [R0, #44]
0x3418B5D2: F001 010F AND R1, R1, #15
0x3418B5D6: F3C2 6304 UBFX R3, R2, #24, #5
0x3418B5DA: 3301 ADDS R3, #1
0x3418B5DC: 4359 MULS R1, R3, R1
0x3418B5DE: F3C2 7341 UBFX R3, R2, #29, #2
0x3418B5E2: F64C 02B0 MOVW R2, #0xC8B0 ; 0x3418C8B0 = SFDP_BuildGenericDriver.chip_erase_unit
0x3418B5E6: F2C3 4218 MOVT R2, #0x3418 ; 0x3418C8B0 = SFDP_BuildGenericDriver.chip_erase_unit
0x3418B5EA: F852 2023 LDR.W R2, [R2, R3, LSL #2]
0x3418B5EE: 4351 MULS R1, R2, R1
0x3418B5F0: 9A0C LDR R2, [SP, #48]
0x3418B5F2: F8C2 1090 STR.W R1, [R2, #144]
0x3418B5F6: 9A0C LDR R2, [SP, #48]
0x3418B5F8: 2105 MOVS R1, #5
0x3418B5FA: F882 1071 STRB.W R1, [R2, #113]
0x3418B5FE: 9A0C LDR R2, [SP, #48]
0x3418B600: F882 106C STRB.W R1, [R2, #108]
0x3418B604: 6840 LDR R0, [R0, #4]
0x3418B606: 0900 LSRS R0, R0, #4
0x3418B608: 07C0 LSLS R0, R0, #31
0x3418B60A: B920 CBNZ R0, .L8 ; 0x3418B616
0x3418B60C: 990C LDR R1, [SP, #48]
0x3418B60E: 2050 MOVS R0, #80
0x3418B610: F881 0070 STRB.W R0, [R1, #112]
0x3418B614: E003 B 46L9 ; 0x3418B61E
.L8:
0x3418B616: 990C LDR R1, [SP, #48]
0x3418B618: 2006 MOVS R0, #6
0x3418B61A: F881 0070 STRB.W R0, [R1, #112]
.L9:
0x3418B61E: F240 10F8 MOVW R0, #0x01F8 ; 0x340001F8 = JEDEC_Basic
0x3418B622: F2C3 4000 MOVT R0, #0x3400 ; 0x340001F8 = JEDEC_Basic
0x3418B626: F890 0040 LDRB.W R0, [R0, #64]
0x3418B62A: 07C0 LSLS R0, R0, #31
0x3418B62C: B120 CBZ R0, .L10 ; 0x3418B638
0x3418B62E: 990C LDR R1, [SP, #48]
0x3418B630: 2006 MOVS R0, #6
0x3418B632: F881 0070 STRB.W R0, [R1, #112]
0x3418B636: E03C B 46L15 ; 0x3418B6B2
.L10:
0x3418B638: F240 10F8 MOVW R0, #0x01F8 ; 0x340001F8 = JEDEC_Basic
0x3418B63C: F2C3 4000 MOVT R0, #0x3400 ; 0x340001F8 = JEDEC_Basic
0x3418B640: F890 0040 LDRB.W R0, [R0, #64]
0x3418B644: 0780 LSLS R0, R0, #30
0x3418B646: 2800 CMP R0, #0
0x3418B648: D504 BPL 46L11 ; 0x3418B654
0x3418B64A: 990C LDR R1, [SP, #48]
0x3418B64C: 2006 MOVS R0, #6
0x3418B64E: F881 0070 STRB.W R0, [R1, #112]
0x3418B652: E02E B 46L15 ; 0x3418B6B2
.L11:
0x3418B654: F240 10F8 MOVW R0, #0x01F8 ; 0x340001F8 = JEDEC_Basic
0x3418B658: F2C3 4000 MOVT R0, #0x3400 ; 0x340001F8 = JEDEC_Basic
0x3418B65C: F890 0040 LDRB.W R0, [R0, #64]
0x3418B660: 0740 LSLS R0, R0, #29
0x3418B662: 2800 CMP R0, #0
0x3418B664: D504 BPL 46L12 ; 0x3418B670
0x3418B666: 990C LDR R1, [SP, #48]
0x3418B668: 2050 MOVS R0, #80
0x3418B66A: F881 0070 STRB.W R0, [R1, #112]
0x3418B66E: E020 B 46L15 ; 0x3418B6B2
.L12:
0x3418B670: F240 10F8 MOVW R0, #0x01F8 ; 0x340001F8 = JEDEC_Basic
0x3418B674: F2C3 4000 MOVT R0, #0x3400 ; 0x340001F8 = JEDEC_Basic
0x3418B678: F890 0040 LDRB.W R0, [R0, #64]
0x3418B67C: 0700 LSLS R0, R0, #28
0x3418B67E: 2800 CMP R0, #0
0x3418B680: D504 BPL 46L13 ; 0x3418B68C
0x3418B682: 990C LDR R1, [SP, #48]
0x3418B684: 2006 MOVS R0, #6
0x3418B686: F881 0070 STRB.W R0, [R1, #112]
0x3418B68A: E012 B 46L15 ; 0x3418B6B2
.L13:
0x3418B68C: F240 10F8 MOVW R0, #0x01F8 ; 0x340001F8 = JEDEC_Basic
0x3418B690: F2C3 4000 MOVT R0, #0x3400 ; 0x340001F8 = JEDEC_Basic
0x3418B694: F890 0040 LDRB.W R0, [R0, #64]
0x3418B698: 06C0 LSLS R0, R0, #27
0x3418B69A: 2800 CMP R0, #0
0x3418B69C: D504 BPL 46L14 ; 0x3418B6A8
0x3418B69E: 990C LDR R1, [SP, #48]
0x3418B6A0: 2006 MOVS R0, #6
0x3418B6A2: F881 0070 STRB.W R0, [R1, #112]
0x3418B6A6: E004 B 46L15 ; 0x3418B6B2
.L14:
0x3418B6A8: 200A MOVS R0, #10
0x3418B6AA: F88D 002B STRB.W R0, [SP, #43]
0x3418B6AE: F000 BCA9 B.W 46L83 ; 0x3418C004
.L15:
0x3418B6B2: 980C LDR R0, [SP, #48]
0x3418B6B4: F890 0095 LDRB.W R0, [R0, #149]
0x3418B6B8: 0780 LSLS R0, R0, #30
0x3418B6BA: 2800 CMP R0, #0
0x3418B6BC: D56A BPL 46L20 ; 0x3418B794
0x3418B6BE: F240 1024 MOVW R0, #0x0124 ; 0x34000124 = JEDEC_SCCR_Map
0x3418B6C2: F2C3 4000 MOVT R0, #0x3400 ; 0x34000124 = JEDEC_SCCR_Map
0x3418B6C6: 6900 LDR R0, [R0, #16]
0x3418B6C8: 0FC0 LSRS R0, R0, #31
0x3418B6CA: B368 CBZ R0, .L17 ; 0x3418B728
0x3418B6CC: F240 1024 MOVW R0, #0x0124 ; 0x34000124 = JEDEC_SCCR_Map
0x3418B6D0: F2C3 4000 MOVT R0, #0x3400 ; 0x34000124 = JEDEC_SCCR_Map
0x3418B6D4: 6901 LDR R1, [R0, #16]
0x3418B6D6: 0A09 LSRS R1, R1, #8
0x3418B6D8: 9A0C LDR R2, [SP, #48]
0x3418B6DA: F882 106C STRB.W R1, [R2, #108]
0x3418B6DE: 7CC1 LDRB R1, [R0, #19]
0x3418B6E0: F001 0107 AND R1, R1, #7
0x3418B6E4: 9A0C LDR R2, [SP, #48]
0x3418B6E6: F882 106D STRB.W R1, [R2, #109]
0x3418B6EA: 6901 LDR R1, [R0, #16]
0x3418B6EC: F3C1 7180 UBFX R1, R1, #30, #1
0x3418B6F0: 9A0C LDR R2, [SP, #48]
0x3418B6F2: F882 106E STRB.W R1, [R2, #110]
0x3418B6F6: 7CC1 LDRB R1, [R0, #19]
0x3418B6F8: F001 0107 AND R1, R1, #7
0x3418B6FC: 9A0C LDR R2, [SP, #48]
0x3418B6FE: F882 106D STRB.W R1, [R2, #109]
0x3418B702: 6900 LDR R0, [R0, #16]
0x3418B704: 0F00 LSRS R0, R0, #28
0x3418B706: 07C0 LSLS R0, R0, #31
0x3418B708: B150 CBZ R0, .L16 ; 0x3418B720
0x3418B70A: F240 1024 MOVW R0, #0x0124 ; 0x34000124 = JEDEC_SCCR_Map
0x3418B70E: F2C3 4000 MOVT R0, #0x3400 ; 0x34000124 = JEDEC_SCCR_Map
0x3418B712: 6900 LDR R0, [R0, #16]
0x3418B714: F3C0 60C0 UBFX R0, R0, #27, #1
0x3418B718: 990C LDR R1, [SP, #48]
0x3418B71A: F881 006F STRB.W R0, [R1, #111]
0x3418B71E: E003 B 46L17 ; 0x3418B728
.L16:
0x3418B720: 990C LDR R1, [SP, #48]
0x3418B722: 20FF MOVS R0, #255
0x3418B724: F881 006F STRB.W R0, [R1, #111]
.L17:
0x3418B728: F240 1024 MOVW R0, #0x0124 ; 0x34000124 = JEDEC_SCCR_Map
0x3418B72C: F2C3 4000 MOVT R0, #0x3400 ; 0x34000124 = JEDEC_SCCR_Map
0x3418B730: 6940 LDR R0, [R0, #20]
0x3418B732: 0FC0 LSRS R0, R0, #31
0x3418B734: B368 CBZ R0, .L19 ; 0x3418B792
0x3418B736: F240 1024 MOVW R0, #0x0124 ; 0x34000124 = JEDEC_SCCR_Map
0x3418B73A: F2C3 4000 MOVT R0, #0x3400 ; 0x34000124 = JEDEC_SCCR_Map
0x3418B73E: 6941 LDR R1, [R0, #20]
0x3418B740: 0A09 LSRS R1, R1, #8
0x3418B742: 9A0C LDR R2, [SP, #48]
0x3418B744: F882 1071 STRB.W R1, [R2, #113]
0x3418B748: 7DC1 LDRB R1, [R0, #23]
0x3418B74A: F001 0107 AND R1, R1, #7
0x3418B74E: 9A0C LDR R2, [SP, #48]
0x3418B750: F882 1072 STRB.W R1, [R2, #114]
0x3418B754: 6941 LDR R1, [R0, #20]
0x3418B756: F3C1 7180 UBFX R1, R1, #30, #1
0x3418B75A: 9A0C LDR R2, [SP, #48]
0x3418B75C: F882 1073 STRB.W R1, [R2, #115]
0x3418B760: 7DC1 LDRB R1, [R0, #23]
0x3418B762: F001 0107 AND R1, R1, #7
0x3418B766: 9A0C LDR R2, [SP, #48]
0x3418B768: F882 1072 STRB.W R1, [R2, #114]
0x3418B76C: 6900 LDR R0, [R0, #16]
0x3418B76E: 0F00 LSRS R0, R0, #28
0x3418B770: 07C0 LSLS R0, R0, #31
0x3418B772: B150 CBZ R0, .L18 ; 0x3418B78A
0x3418B774: F240 1024 MOVW R0, #0x0124 ; 0x34000124 = JEDEC_SCCR_Map
0x3418B778: F2C3 4000 MOVT R0, #0x3400 ; 0x34000124 = JEDEC_SCCR_Map
0x3418B77C: 6940 LDR R0, [R0, #20]
0x3418B77E: F3C0 60C0 UBFX R0, R0, #27, #1
0x3418B782: 990C LDR R1, [SP, #48]
0x3418B784: F881 0074 STRB.W R0, [R1, #116]
0x3418B788: E003 B 46L19 ; 0x3418B792
.L18:
0x3418B78A: 990C LDR R1, [SP, #48]
0x3418B78C: 20FF MOVS R0, #255
0x3418B78E: F881 0074 STRB.W R0, [R1, #116]
.L19:
0x3418B792: E036 B 46L23 ; 0x3418B802
.L20:
0x3418B794: 990C LDR R1, [SP, #48]
0x3418B796: 2001 MOVS R0, #1
0x3418B798: F881 0072 STRB.W R0, [R1, #114]
0x3418B79C: 990C LDR R1, [SP, #48]
0x3418B79E: 2000 MOVS R0, #0
0x3418B7A0: F881 0073 STRB.W R0, [R1, #115]
0x3418B7A4: F240 10F8 MOVW R0, #0x01F8 ; 0x340001F8 = JEDEC_Basic
0x3418B7A8: F2C3 4000 MOVT R0, #0x3400 ; 0x340001F8 = JEDEC_Basic
0x3418B7AC: 6B80 LDR R0, [R0, #56]
0x3418B7AE: 0880 LSRS R0, R0, #2
0x3418B7B0: 07C0 LSLS R0, R0, #31
0x3418B7B2: B158 CBZ R0, .L21 ; 0x3418B7CC
0x3418B7B4: 990C LDR R1, [SP, #48]
0x3418B7B6: 2005 MOVS R0, #5
0x3418B7B8: F881 006C STRB.W R0, [R1, #108]
0x3418B7BC: 990C LDR R1, [SP, #48]
0x3418B7BE: 2000 MOVS R0, #0
0x3418B7C0: F881 006D STRB.W R0, [R1, #109]
0x3418B7C4: 990C LDR R1, [SP, #48]
0x3418B7C6: F881 006E STRB.W R0, [R1, #110]
0x3418B7CA: E01A B 46L23 ; 0x3418B802
.L21:
0x3418B7CC: F240 10F8 MOVW R0, #0x01F8 ; 0x340001F8 = JEDEC_Basic
0x3418B7D0: F2C3 4000 MOVT R0, #0x3400 ; 0x340001F8 = JEDEC_Basic
0x3418B7D4: 6B80 LDR R0, [R0, #56]
0x3418B7D6: 0880 LSRS R0, R0, #2
0x3418B7D8: 0780 LSLS R0, R0, #30
0x3418B7DA: 2800 CMP R0, #0
0x3418B7DC: D50C BPL 46L22 ; 0x3418B7F8
0x3418B7DE: 990C LDR R1, [SP, #48]
0x3418B7E0: 2070 MOVS R0, #112
0x3418B7E2: F881 006C STRB.W R0, [R1, #108]
0x3418B7E6: 990C LDR R1, [SP, #48]
0x3418B7E8: 2007 MOVS R0, #7
0x3418B7EA: F881 006D STRB.W R0, [R1, #109]
0x3418B7EE: 990C LDR R1, [SP, #48]
0x3418B7F0: 2001 MOVS R0, #1
0x3418B7F2: F881 006E STRB.W R0, [R1, #110]
0x3418B7F6: E004 B 46L23 ; 0x3418B802
.L22:
0x3418B7F8: 2009 MOVS R0, #9
0x3418B7FA: F88D 002B STRB.W R0, [SP, #43]
0x3418B7FE: F000 BC01 B.W 46L83 ; 0x3418C004
.L23:
0x3418B802: 990C LDR R1, [SP, #48]
0x3418B804: 2003 MOVS R0, #3
0x3418B806: F881 0076 STRB.W R0, [R1, #118]
0x3418B80A: 2000 MOVS R0, #0
0x3418B80C: 9009 STR R0, [SP, #36]
0x3418B80E: 980C LDR R0, [SP, #48]
0x3418B810: 3008 ADDS R0, #8
0x3418B812: 2101 MOVS R1, #1
0x3418B814: AA09 ADD R2, SP, #36
0x3418B816: F006 FE2B BL SAL_XSPI_MemoryConfig ; 0x34192470
0x3418B81A: 980C LDR R0, [SP, #48]
0x3418B81C: F890 0094 LDRB.W R0, [R0, #148]
0x3418B820: 0700 LSLS R0, R0, #28
0x3418B822: 2800 CMP R0, #0
0x3418B824: F140 80EB BPL.W 46L35 ; 0x3418B9FE
0x3418B828: 980C LDR R0, [SP, #48]
0x3418B82A: F890 005C LDRB.W R0, [R0, #92]
0x3418B82E: 2802 CMP R0, #2
0x3418B830: F300 80E5 BGT.W 46L35 ; 0x3418B9FE
0x3418B834: 990C LDR R1, [SP, #48]
0x3418B836: 2000 MOVS R0, #0
0x3418B838: F881 0064 STRB.W R0, [R1, #100]
0x3418B83C: 980C LDR R0, [SP, #48]
0x3418B83E: F890 005C LDRB.W R0, [R0, #92]
0x3418B842: 2801 CMP R0, #1
0x3418B844: DB48 BLT 46L26 ; 0x3418B8D8
0x3418B846: F240 10F8 MOVW R0, #0x01F8 ; 0x340001F8 = JEDEC_Basic
0x3418B84A: F2C3 4000 MOVT R0, #0x3400 ; 0x340001F8 = JEDEC_Basic
0x3418B84E: 7C40 LDRB R0, [R0, #17]
0x3418B850: B198 CBZ R0, .L24 ; 0x3418B87A
0x3418B852: F240 10F8 MOVW R0, #0x01F8 ; 0x340001F8 = JEDEC_Basic
0x3418B856: F2C3 4000 MOVT R0, #0x3400 ; 0x340001F8 = JEDEC_Basic
0x3418B85A: 6902 LDR R2, [R0, #16]
0x3418B85C: F002 011F AND R1, R2, #31
0x3418B860: F3C2 1242 UBFX R2, R2, #5, #3
0x3418B864: 4411 ADD R1, R2
0x3418B866: 9109 STR R1, [SP, #36]
0x3418B868: 6900 LDR R0, [R0, #16]
0x3418B86A: 0A00 LSRS R0, R0, #8
0x3418B86C: 990C LDR R1, [SP, #48]
0x3418B86E: F881 0076 STRB.W R0, [R1, #118]
0x3418B872: 990C LDR R1, [SP, #48]
0x3418B874: 2001 MOVS R0, #1
0x3418B876: F881 0064 STRB.W R0, [R1, #100]
.L24:
0x3418B87A: F240 10F8 MOVW R0, #0x01F8 ; 0x340001F8 = JEDEC_Basic
0x3418B87E: F2C3 4000 MOVT R0, #0x3400 ; 0x340001F8 = JEDEC_Basic
0x3418B882: 7CC0 LDRB R0, [R0, #19]
0x3418B884: B190 CBZ R0, .L25 ; 0x3418B8AC
0x3418B886: F240 10F8 MOVW R0, #0x01F8 ; 0x340001F8 = JEDEC_Basic
0x3418B88A: F2C3 4000 MOVT R0, #0x3400 ; 0x340001F8 = JEDEC_Basic
0x3418B88E: 6902 LDR R2, [R0, #16]
0x3418B890: F3C2 4104 UBFX R1, R2, #16, #5
0x3418B894: F3C2 5242 UBFX R2, R2, #21, #3
0x3418B898: 4411 ADD R1, R2
0x3418B89A: 9109 STR R1, [SP, #36]
0x3418B89C: 7CC0 LDRB R0, [R0, #19]
0x3418B89E: 990C LDR R1, [SP, #48]
0x3418B8A0: F881 0076 STRB.W R0, [R1, #118]
0x3418B8A4: 990C LDR R1, [SP, #48]
0x3418B8A6: 2002 MOVS R0, #2
0x3418B8A8: F881 0064 STRB.W R0, [R1, #100]
.L25:
0x3418B8AC: F240 10F8 MOVW R0, #0x01F8 ; 0x340001F8 = JEDEC_Basic
0x3418B8B0: F2C3 4000 MOVT R0, #0x3400 ; 0x340001F8 = JEDEC_Basic
0x3418B8B4: 7D00 LDRB R0, [R0, #20]
0x3418B8B6: 07C0 LSLS R0, R0, #31
0x3418B8B8: B170 CBZ R0, .L26 ; 0x3418B8D8
0x3418B8BA: F240 10F8 MOVW R0, #0x01F8 ; 0x340001F8 = JEDEC_Basic
0x3418B8BE: F2C3 4000 MOVT R0, #0x3400 ; 0x340001F8 = JEDEC_Basic
0x3418B8C2: 6982 LDR R2, [R0, #24]
0x3418B8C4: F3C2 4104 UBFX R1, R2, #16, #5
0x3418B8C8: F3C2 5242 UBFX R2, R2, #21, #3
0x3418B8CC: 4411 ADD R1, R2
0x3418B8CE: 9109 STR R1, [SP, #36]
0x3418B8D0: 7EC0 LDRB R0, [R0, #27]
0x3418B8D2: 990C LDR R1, [SP, #48]
0x3418B8D4: F881 0076 STRB.W R0, [R1, #118]
.L26:
0x3418B8D8: 980C LDR R0, [SP, #48]
0x3418B8DA: F890 005C LDRB.W R0, [R0, #92]
0x3418B8DE: 2802 CMP R0, #2
0x3418B8E0: DB75 BLT 46L33 ; 0x3418B9CE
0x3418B8E2: F240 10F8 MOVW R0, #0x01F8 ; 0x340001F8 = JEDEC_Basic
0x3418B8E6: F2C3 4000 MOVT R0, #0x3400 ; 0x340001F8 = JEDEC_Basic
0x3418B8EA: 6940 LDR R0, [R0, #20]
0x3418B8EC: 0900 LSRS R0, R0, #4
0x3418B8EE: 07C0 LSLS R0, R0, #31
0x3418B8F0: B1E0 CBZ R0, .L28 ; 0x3418B92C
0x3418B8F2: F240 10F8 MOVW R0, #0x01F8 ; 0x340001F8 = JEDEC_Basic
0x3418B8F6: F2C3 4000 MOVT R0, #0x3400 ; 0x340001F8 = JEDEC_Basic
0x3418B8FA: 69C2 LDR R2, [R0, #28]
0x3418B8FC: F3C2 4104 UBFX R1, R2, #16, #5
0x3418B900: F3C2 5242 UBFX R2, R2, #21, #3
0x3418B904: 4411 ADD R1, R2
0x3418B906: 9109 STR R1, [SP, #36]
0x3418B908: 7FC0 LDRB R0, [R0, #31]
0x3418B90A: 990C LDR R1, [SP, #48]
0x3418B90C: F881 0076 STRB.W R0, [R1, #118]
0x3418B910: 990C LDR R1, [SP, #48]
0x3418B912: 2006 MOVS R0, #6
0x3418B914: F881 0064 STRB.W R0, [R1, #100]
0x3418B918: 980C LDR R0, [SP, #48]
0x3418B91A: F000 FB77 BL JEDEC_Basic_Manage4S4S4SEnableSequence ; 0x3418C00C
0x3418B91E: F88D 002B STRB.W R0, [SP, #43]
0x3418B922: F89D 002B LDRB.W R0, [SP, #43]
0x3418B926: B100 CBZ R0, .L27 ; 0x3418B92A
0x3418B928: E36C B 46L83 ; 0x3418C004
.L27:
0x3418B92A: E04A B 46L32 ; 0x3418B9C2
.L28:
0x3418B92C: F240 10F8 MOVW R0, #0x01F8 ; 0x340001F8 = JEDEC_Basic
0x3418B930: F2C3 4000 MOVT R0, #0x3400 ; 0x340001F8 = JEDEC_Basic
0x3418B934: 6840 LDR R0, [R0, #4]
0x3418B936: 0D40 LSRS R0, R0, #21
0x3418B938: 07C0 LSLS R0, R0, #31
0x3418B93A: B1E8 CBZ R0, .L30 ; 0x3418B978
0x3418B93C: F240 10F8 MOVW R0, #0x01F8 ; 0x340001F8 = JEDEC_Basic
0x3418B940: F2C3 4000 MOVT R0, #0x3400 ; 0x340001F8 = JEDEC_Basic
0x3418B944: 68C2 LDR R2, [R0, #12]
0x3418B946: F002 011F AND R1, R2, #31
0x3418B94A: F3C2 1242 UBFX R2, R2, #5, #3
0x3418B94E: 4411 ADD R1, R2
0x3418B950: 9109 STR R1, [SP, #36]
0x3418B952: 68C0 LDR R0, [R0, #12]
0x3418B954: 0A00 LSRS R0, R0, #8
0x3418B956: 990C LDR R1, [SP, #48]
0x3418B958: F881 0076 STRB.W R0, [R1, #118]
0x3418B95C: 990C LDR R1, [SP, #48]
0x3418B95E: 2005 MOVS R0, #5
0x3418B960: F881 0064 STRB.W R0, [R1, #100]
0x3418B964: 980C LDR R0, [SP, #48]
0x3418B966: F006 FACF BL JEDEC_Basic_ManageQuadEnableRequirement ; 0x34191F08
0x3418B96A: F88D 002B STRB.W R0, [SP, #43]
0x3418B96E: F89D 002B LDRB.W R0, [SP, #43]
0x3418B972: B100 CBZ R0, .L29 ; 0x3418B976
0x3418B974: E346 B 46L83 ; 0x3418C004
.L29:
0x3418B976: E024 B 46L32 ; 0x3418B9C2
.L30:
0x3418B978: F240 10F8 MOVW R0, #0x01F8 ; 0x340001F8 = JEDEC_Basic
0x3418B97C: F2C3 4000 MOVT R0, #0x3400 ; 0x340001F8 = JEDEC_Basic
0x3418B980: 6840 LDR R0, [R0, #4]
0x3418B982: 0D80 LSRS R0, R0, #22
0x3418B984: 07C0 LSLS R0, R0, #31
0x3418B986: B1E0 CBZ R0, .L32 ; 0x3418B9C2
0x3418B988: F240 10F8 MOVW R0, #0x01F8 ; 0x340001F8 = JEDEC_Basic
0x3418B98C: F2C3 4000 MOVT R0, #0x3400 ; 0x340001F8 = JEDEC_Basic
0x3418B990: 68C2 LDR R2, [R0, #12]
0x3418B992: F3C2 4104 UBFX R1, R2, #16, #5
0x3418B996: F3C2 5242 UBFX R2, R2, #21, #3
0x3418B99A: 4411 ADD R1, R2
0x3418B99C: 9109 STR R1, [SP, #36]
0x3418B99E: 7BC0 LDRB R0, [R0, #15]
0x3418B9A0: 990C LDR R1, [SP, #48]
0x3418B9A2: F881 0076 STRB.W R0, [R1, #118]
0x3418B9A6: 990C LDR R1, [SP, #48]
0x3418B9A8: 2004 MOVS R0, #4
0x3418B9AA: F881 0064 STRB.W R0, [R1, #100]
0x3418B9AE: 980C LDR R0, [SP, #48]
0x3418B9B0: F006 FAAA BL JEDEC_Basic_ManageQuadEnableRequirement ; 0x34191F08
0x3418B9B4: F88D 002B STRB.W R0, [SP, #43]
0x3418B9B8: F89D 002B LDRB.W R0, [SP, #43]
0x3418B9BC: B100 CBZ R0, .L31 ; 0x3418B9C0
0x3418B9BE: E321 B 46L83 ; 0x3418C004
.L31:
0x3418B9C0: E7FF B 46L32 ; 0x3418B9C2
.L32:
0x3418B9C2: 980C LDR R0, [SP, #48]
0x3418B9C4: 3008 ADDS R0, #8
0x3418B9C6: 2101 MOVS R1, #1
0x3418B9C8: AA09 ADD R2, SP, #36
0x3418B9CA: F006 FD51 BL SAL_XSPI_MemoryConfig ; 0x34192470
.L33:
0x3418B9CE: 990C LDR R1, [SP, #48]
0x3418B9D0: F101 0008 ADD.W R0, R1, #8
0x3418B9D4: F101 0264 ADD.W R2, R1, #100
0x3418B9D8: 2100 MOVS R1, #0
0x3418B9DA: F006 FD49 BL SAL_XSPI_MemoryConfig ; 0x34192470
0x3418B9DE: B118 CBZ R0, .L34 ; 0x3418B9E8
0x3418B9E0: 200C MOVS R0, #12
0x3418B9E2: F88D 002B STRB.W R0, [SP, #43]
0x3418B9E6: E30D B 46L83 ; 0x3418C004
.L34:
0x3418B9E8: 980C LDR R0, [SP, #48]
0x3418B9EA: 3008 ADDS R0, #8
0x3418B9EC: 2101 MOVS R1, #1
0x3418B9EE: AA09 ADD R2, SP, #36
0x3418B9F0: F006 FD3E BL SAL_XSPI_MemoryConfig ; 0x34192470
0x3418B9F4: B118 CBZ R0, .L35 ; 0x3418B9FE
0x3418B9F6: 200C MOVS R0, #12
0x3418B9F8: F88D 002B STRB.W R0, [SP, #43]
0x3418B9FC: E302 B 46L83 ; 0x3418C004
.L35:
0x3418B9FE: 980C LDR R0, [SP, #48]
0x3418BA00: F890 0095 LDRB.W R0, [R0, #149]
0x3418BA04: 06C0 LSLS R0, R0, #27
0x3418BA06: 2800 CMP R0, #0
0x3418BA08: F140 8081 BPL.W 46L45 ; 0x3418BB0E
0x3418BA0C: 980C LDR R0, [SP, #48]
0x3418BA0E: F890 005C LDRB.W R0, [R0, #92]
0x3418BA12: 2803 CMP R0, #3
0x3418BA14: D17B BNE 46L45 ; 0x3418BB0E
0x3418BA16: 980C LDR R0, [SP, #48]
0x3418BA18: F890 0064 LDRB.W R0, [R0, #100]
0x3418BA1C: 280B CMP R0, #11
0x3418BA1E: D103 BNE 46L36 ; 0x3418BA28
0x3418BA20: 2001 MOVS R0, #1
0x3418BA22: F88D 002A STRB.W R0, [SP, #42]
0x3418BA26: E03C B 46L42 ; 0x3418BAA2
.L36:
0x3418BA28: 980C LDR R0, [SP, #48]
0x3418BA2A: F006 FB17 BL sfdp_enter_octal_mode ; 0x3419205C
0x3418BA2E: BBC0 CBNZ R0, .L42 ; 0x3418BAA2
0x3418BA30: 2001 MOVS R0, #1
0x3418BA32: F88D 002A STRB.W R0, [SP, #42]
0x3418BA36: 980C LDR R0, [SP, #48]
0x3418BA38: F890 005D LDRB.W R0, [R0, #93]
0x3418BA3C: 28C8 CMP R0, #200
0x3418BA3E: D104 BNE 46L37 ; 0x3418BA4A
0x3418BA40: 990C LDR R1, [SP, #48]
0x3418BA42: 200A MOVS R0, #10
0x3418BA44: F881 0064 STRB.W R0, [R1, #100]
0x3418BA48: E003 B 46L38 ; 0x3418BA52
.L37:
0x3418BA4A: 990C LDR R1, [SP, #48]
0x3418BA4C: 200B MOVS R0, #11
0x3418BA4E: F881 0064 STRB.W R0, [R1, #100]
.L38:
0x3418BA52: 990C LDR R1, [SP, #48]
0x3418BA54: F101 0008 ADD.W R0, R1, #8
0x3418BA58: F101 0264 ADD.W R2, R1, #100
0x3418BA5C: 2100 MOVS R1, #0
0x3418BA5E: F006 FD07 BL SAL_XSPI_MemoryConfig ; 0x34192470
0x3418BA62: B118 CBZ R0, .L39 ; 0x3418BA6C
0x3418BA64: 200C MOVS R0, #12
0x3418BA66: F88D 002B STRB.W R0, [SP, #43]
0x3418BA6A: E2CB B 46L83 ; 0x3418C004
.L39:
0x3418BA6C: 980C LDR R0, [SP, #48]
0x3418BA6E: F890 009D LDRB.W R0, [R0, #157]
0x3418BA72: 28FD CMP R0, #253
0x3418BA74: D107 BNE 46L40 ; 0x3418BA86
0x3418BA76: 2014 MOVS R0, #20
0x3418BA78: 9009 STR R0, [SP, #36]
0x3418BA7A: 980C LDR R0, [SP, #48]
0x3418BA7C: 3008 ADDS R0, #8
0x3418BA7E: 2101 MOVS R1, #1
0x3418BA80: AA09 ADD R2, SP, #36
0x3418BA82: F006 FCF5 BL SAL_XSPI_MemoryConfig ; 0x34192470
.L40:
0x3418BA86: 980C LDR R0, [SP, #48]
0x3418BA88: F890 009D LDRB.W R0, [R0, #157]
0x3418BA8C: 28FE CMP R0, #254
0x3418BA8E: D107 BNE 46L41 ; 0x3418BAA0
0x3418BA90: 2008 MOVS R0, #8
0x3418BA92: 9009 STR R0, [SP, #36]
0x3418BA94: 980C LDR R0, [SP, #48]
0x3418BA96: 3008 ADDS R0, #8
0x3418BA98: 2101 MOVS R1, #1
0x3418BA9A: AA09 ADD R2, SP, #36
0x3418BA9C: F006 FCE8 BL SAL_XSPI_MemoryConfig ; 0x34192470
.L41:
0x3418BAA0: E7FF B 46L42 ; 0x3418BAA2
.L42:
0x3418BAA2: 980C LDR R0, [SP, #48]
0x3418BAA4: F890 0094 LDRB.W R0, [R0, #148]
0x3418BAA8: 0700 LSLS R0, R0, #28
0x3418BAAA: 2800 CMP R0, #0
0x3418BAAC: D51D BPL 46L44 ; 0x3418BAEA
0x3418BAAE: F240 10F8 MOVW R0, #0x01F8 ; 0x340001F8 = JEDEC_Basic
0x3418BAB2: F2C3 4000 MOVT R0, #0x3400 ; 0x340001F8 = JEDEC_Basic
0x3418BAB6: 6800 LDR R0, [R0]
0x3418BAB8: 2811 CMP R0, #17
0x3418BABA: D316 BCC 46L44 ; 0x3418BAEA
0x3418BABC: F240 10F8 MOVW R0, #0x01F8 ; 0x340001F8 = JEDEC_Basic
0x3418BAC0: F2C3 4000 MOVT R0, #0x3400 ; 0x340001F8 = JEDEC_Basic
0x3418BAC4: 6C80 LDR R0, [R0, #72]
0x3418BAC6: F3C0 7041 UBFX R0, R0, #29, #2
0x3418BACA: 2802 CMP R0, #2
0x3418BACC: D303 BCC 46L43 ; 0x3418BAD6
0x3418BACE: 200F MOVS R0, #15
0x3418BAD0: F88D 002B STRB.W R0, [SP, #43]
0x3418BAD4: E296 B 46L83 ; 0x3418C004
.L43:
0x3418BAD6: F240 10F8 MOVW R0, #0x01F8 ; 0x340001F8 = JEDEC_Basic
0x3418BADA: F2C3 4000 MOVT R0, #0x3400 ; 0x340001F8 = JEDEC_Basic
0x3418BADE: 6C80 LDR R0, [R0, #72]
0x3418BAE0: F3C0 7041 UBFX R0, R0, #29, #2
0x3418BAE4: 990C LDR R1, [SP, #48]
0x3418BAE6: F881 0058 STRB.W R0, [R1, #88]
.L44:
0x3418BAEA: 980C LDR R0, [SP, #48]
0x3418BAEC: F890 0094 LDRB.W R0, [R0, #148]
0x3418BAF0: 0600 LSLS R0, R0, #24
0x3418BAF2: 2800 CMP R0, #0
0x3418BAF4: D50B BPL 46L45 ; 0x3418BB0E
0x3418BAF6: F240 2078 MOVW R0, #0x0278 ; 0x34000278 = JEDEC_XSPI10
0x3418BAFA: F2C3 4000 MOVT R0, #0x3400 ; 0x34000278 = JEDEC_XSPI10
0x3418BAFE: 6800 LDR R0, [R0]
0x3418BB00: 0F80 LSRS R0, R0, #30
0x3418BB02: 07C0 LSLS R0, R0, #31
0x3418BB04: B118 CBZ R0, .L45 ; 0x3418BB0E
0x3418BB06: 990C LDR R1, [SP, #48]
0x3418BB08: 2014 MOVS R0, #20
0x3418BB0A: F881 0059 STRB.W R0, [R1, #89]
.L45:
0x3418BB0E: 980C LDR R0, [SP, #48]
0x3418BB10: 2164 MOVS R1, #100
0x3418BB12: F006 FB95 BL driver_check_FlagBUSY ; 0x34192240
0x3418BB16: B118 CBZ R0, .L46 ; 0x3418BB20
0x3418BB18: 200C MOVS R0, #12
0x3418BB1A: F88D 002B STRB.W R0, [SP, #43]
0x3418BB1E: E271 B 46L83 ; 0x3418C004
.L46:
0x3418BB20: 980C LDR R0, [SP, #48]
0x3418BB22: F890 0094 LDRB.W R0, [R0, #148]
0x3418BB26: 0640 LSLS R0, R0, #25
0x3418BB28: 2800 CMP R0, #0
0x3418BB2A: F140 817E BPL.W 46L69 ; 0x3418BE2A
0x3418BB2E: 980C LDR R0, [SP, #48]
0x3418BB30: F890 005E LDRB.W R0, [R0, #94]
0x3418BB34: 2819 CMP R0, #25
0x3418BB36: F0C0 8178 BCC.W 46L69 ; 0x3418BE2A
0x3418BB3A: F240 10F8 MOVW R0, #0x01F8 ; 0x340001F8 = JEDEC_Basic
0x3418BB3E: F2C3 4000 MOVT R0, #0x3400 ; 0x340001F8 = JEDEC_Basic
0x3418BB42: F890 0043 LDRB.W R0, [R0, #67]
0x3418BB46: 28FF CMP R0, #255
0x3418BB48: F000 816F BEQ.W 46L69 ; 0x3418BE2A
0x3418BB4C: F89D 002A LDRB.W R0, [SP, #42]
0x3418BB50: 2800 CMP R0, #0
0x3418BB52: F040 80F2 BNE.W 46L63 ; 0x3418BD3A
0x3418BB56: F240 10F8 MOVW R0, #0x01F8 ; 0x340001F8 = JEDEC_Basic
0x3418BB5A: F2C3 4000 MOVT R0, #0x3400 ; 0x340001F8 = JEDEC_Basic
0x3418BB5E: 6C00 LDR R0, [R0, #64]
0x3418BB60: 0E00 LSRS R0, R0, #24
0x3418BB62: 07C0 LSLS R0, R0, #31
0x3418BB64: B1B8 CBZ R0, .L49 ; 0x3418BB96
0x3418BB66: 980C LDR R0, [SP, #48]
0x3418BB68: 3008 ADDS R0, #8
0x3418BB6A: 21B7 MOVS R1, #183
0x3418BB6C: 2300 MOVS R3, #0
0x3418BB6E: 461A MOV R2, R3
0x3418BB70: F000 FC5C BL SAL_XSPI_CommandSendData ; 0x3418C42C
0x3418BB74: B118 CBZ R0, .L47 ; 0x3418BB7E
0x3418BB76: 200C MOVS R0, #12
0x3418BB78: F88D 002B STRB.W R0, [SP, #43]
0x3418BB7C: E242 B 46L83 ; 0x3418C004
.L47:
0x3418BB7E: 980C LDR R0, [SP, #48]
0x3418BB80: 3008 ADDS R0, #8
0x3418BB82: 2102 MOVS R1, #2
0x3418BB84: 2200 MOVS R2, #0
0x3418BB86: F006 FC73 BL SAL_XSPI_MemoryConfig ; 0x34192470
0x3418BB8A: B118 CBZ R0, .L48 ; 0x3418BB94
0x3418BB8C: 200C MOVS R0, #12
0x3418BB8E: F88D 002B STRB.W R0, [SP, #43]
0x3418BB92: E237 B 46L83 ; 0x3418C004
.L48:
0x3418BB94: E064 B 46L56 ; 0x3418BC60
.L49:
0x3418BB96: F240 10F8 MOVW R0, #0x01F8 ; 0x340001F8 = JEDEC_Basic
0x3418BB9A: F2C3 4000 MOVT R0, #0x3400 ; 0x340001F8 = JEDEC_Basic
0x3418BB9E: 6C00 LDR R0, [R0, #64]
0x3418BBA0: 0E00 LSRS R0, R0, #24
0x3418BBA2: 0780 LSLS R0, R0, #30
0x3418BBA4: 2800 CMP R0, #0
0x3418BBA6: D543 BPL 46L53 ; 0x3418BC30
0x3418BBA8: 990C LDR R1, [SP, #48]
0x3418BBAA: F101 0008 ADD.W R0, R1, #8
0x3418BBAE: F891 1070 LDRB.W R1, [R1, #112]
0x3418BBB2: 2300 MOVS R3, #0
0x3418BBB4: 461A MOV R2, R3
0x3418BBB6: F000 FC39 BL SAL_XSPI_CommandSendData ; 0x3418C42C
0x3418BBBA: B118 CBZ R0, .L50 ; 0x3418BBC4
0x3418BBBC: 200C MOVS R0, #12
0x3418BBBE: F88D 002B STRB.W R0, [SP, #43]
0x3418BBC2: E21F B 46L83 ; 0x3418C004
.L50:
0x3418BBC4: 9B0C LDR R3, [SP, #48]
0x3418BBC6: F103 0008 ADD.W R0, R3, #8
0x3418BBCA: F893 2074 LDRB.W R2, [R3, #116]
0x3418BBCE: F893 405D LDRB.W R4, [R3, #93]
0x3418BBD2: F893 1071 LDRB.W R1, [R3, #113]
0x3418BBD6: F893 E072 LDRB.W LR, [R3, #114]
0x3418BBDA: F893 3073 LDRB.W R3, [R3, #115]
0x3418BBDE: 2B00 CMP R3, #0
0x3418BBE0: EA5F 931F CSET R3, EQ
0x3418BBE4: FA03 F30E LSL.W R3, R3, LR
0x3418BBE8: F04F 0C01 MOV.W R12, #1
0x3418BBEC: FA0C FC0E LSL.W R12, R12, LR
0x3418BBF0: 46EE MOV LR, SP
0x3418BBF2: F44F 757A MOV.W R5, #0x03E8
0x3418BBF6: F8CE 5008 STR.W R5, [LR, #8]
0x3418BBFA: F8CE 4004 STR.W R4, [LR, #4]
0x3418BBFE: FA5F FC8C UXTB R12, R12
0x3418BC02: F8CE C000 STR.W R12, [LR]
0x3418BC06: B2DB UXTB R3, R3
0x3418BC08: F000 FC98 BL SAL_XSPI_CheckStatusRegister ; 0x3418C53C
0x3418BC0C: B118 CBZ R0, .L51 ; 0x3418BC16
0x3418BC0E: 200C MOVS R0, #12
0x3418BC10: F88D 002B STRB.W R0, [SP, #43]
0x3418BC14: E1F6 B 46L83 ; 0x3418C004
.L51:
0x3418BC16: 980C LDR R0, [SP, #48]
0x3418BC18: 3008 ADDS R0, #8
0x3418BC1A: 21B7 MOVS R1, #183
0x3418BC1C: 2300 MOVS R3, #0
0x3418BC1E: 461A MOV R2, R3
0x3418BC20: F000 FC04 BL SAL_XSPI_CommandSendData ; 0x3418C42C
0x3418BC24: B118 CBZ R0, .L52 ; 0x3418BC2E
0x3418BC26: 200C MOVS R0, #12
0x3418BC28: F88D 002B STRB.W R0, [SP, #43]
0x3418BC2C: E1EA B 46L83 ; 0x3418C004
.L52:
0x3418BC2E: E017 B 46L56 ; 0x3418BC60
.L53:
0x3418BC30: F240 10F8 MOVW R0, #0x01F8 ; 0x340001F8 = JEDEC_Basic
0x3418BC34: F2C3 4000 MOVT R0, #0x3400 ; 0x340001F8 = JEDEC_Basic
0x3418BC38: 6C00 LDR R0, [R0, #64]
0x3418BC3A: 0E00 LSRS R0, R0, #24
0x3418BC3C: 0640 LSLS R0, R0, #25
0x3418BC3E: 2800 CMP R0, #0
0x3418BC40: D500 BPL 46L54 ; 0x3418BC44
0x3418BC42: E00D B 46L56 ; 0x3418BC60
.L54:
0x3418BC44: F240 10F8 MOVW R0, #0x01F8 ; 0x340001F8 = JEDEC_Basic
0x3418BC48: F2C3 4000 MOVT R0, #0x3400 ; 0x340001F8 = JEDEC_Basic
0x3418BC4C: 6C00 LDR R0, [R0, #64]
0x3418BC4E: 0E00 LSRS R0, R0, #24
0x3418BC50: 0680 LSLS R0, R0, #26
0x3418BC52: 2800 CMP R0, #0
0x3418BC54: D500 BPL 46L55 ; 0x3418BC58
0x3418BC56: E003 B 46L56 ; 0x3418BC60
.L55:
0x3418BC58: 200F MOVS R0, #15
0x3418BC5A: F88D 002B STRB.W R0, [SP, #43]
0x3418BC5E: E1D1 B 46L83 ; 0x3418C004
.L56:
0x3418BC60: 980C LDR R0, [SP, #48]
0x3418BC62: 3008 ADDS R0, #8
0x3418BC64: 2102 MOVS R1, #2
0x3418BC66: 2200 MOVS R2, #0
0x3418BC68: F006 FC02 BL SAL_XSPI_MemoryConfig ; 0x34192470
0x3418BC6C: B118 CBZ R0, .L57 ; 0x3418BC76
0x3418BC6E: 200C MOVS R0, #12
0x3418BC70: F88D 002B STRB.W R0, [SP, #43]
0x3418BC74: E1C6 B 46L83 ; 0x3418C004
.L57:
0x3418BC76: 980C LDR R0, [SP, #48]
0x3418BC78: F890 0064 LDRB.W R0, [R0, #100]
0x3418BC7C: BB50 CBNZ R0, .L60 ; 0x3418BCD4
0x3418BC7E: F240 2090 MOVW R0, #0x0290 ; 0x34000290 = JEDEC_Address4Bytes
0x3418BC82: F2C3 4000 MOVT R0, #0x3400 ; 0x34000290 = JEDEC_Address4Bytes
0x3418BC86: 7800 LDRB R0, [R0]
0x3418BC88: 07C0 LSLS R0, R0, #31
0x3418BC8A: B118 CBZ R0, .L58 ; 0x3418BC94
0x3418BC8C: 990C LDR R1, [SP, #48]
0x3418BC8E: 2013 MOVS R0, #19
0x3418BC90: F881 0076 STRB.W R0, [R1, #118]
.L58:
0x3418BC94: F240 2090 MOVW R0, #0x0290 ; 0x34000290 = JEDEC_Address4Bytes
0x3418BC98: F2C3 4000 MOVT R0, #0x3400 ; 0x34000290 = JEDEC_Address4Bytes
0x3418BC9C: 6800 LDR R0, [R0]
0x3418BC9E: 0980 LSRS R0, R0, #6
0x3418BCA0: 07C0 LSLS R0, R0, #31
0x3418BCA2: B118 CBZ R0, .L59 ; 0x3418BCAC
0x3418BCA4: 990C LDR R1, [SP, #48]
0x3418BCA6: 2012 MOVS R0, #18
0x3418BCA8: F881 0075 STRB.W R0, [R1, #117]
.L59:
0x3418BCAC: F240 2090 MOVW R0, #0x0290 ; 0x34000290 = JEDEC_Address4Bytes
0x3418BCB0: F2C3 4000 MOVT R0, #0x3400 ; 0x34000290 = JEDEC_Address4Bytes
0x3418BCB4: 6800 LDR R0, [R0]
0x3418BCB6: 0840 LSRS R0, R0, #1
0x3418BCB8: 07C0 LSLS R0, R0, #31
0x3418BCBA: B158 CBZ R0, .L60 ; 0x3418BCD4
0x3418BCBC: 990C LDR R1, [SP, #48]
0x3418BCBE: 200C MOVS R0, #12
0x3418BCC0: F881 0076 STRB.W R0, [R1, #118]
0x3418BCC4: 2008 MOVS R0, #8
0x3418BCC6: 9009 STR R0, [SP, #36]
0x3418BCC8: 980C LDR R0, [SP, #48]
0x3418BCCA: 3008 ADDS R0, #8
0x3418BCCC: 2101 MOVS R1, #1
0x3418BCCE: AA09 ADD R2, SP, #36
0x3418BCD0: F006 FBCE BL SAL_XSPI_MemoryConfig ; 0x34192470
.L60:
0x3418BCD4: 980C LDR R0, [SP, #48]
0x3418BCD6: F890 0064 LDRB.W R0, [R0, #100]
0x3418BCDA: 2801 CMP R0, #1
0x3418BCDC: D10B BNE 46L61 ; 0x3418BCF6
0x3418BCDE: F240 2090 MOVW R0, #0x0290 ; 0x34000290 = JEDEC_Address4Bytes
0x3418BCE2: F2C3 4000 MOVT R0, #0x3400 ; 0x34000290 = JEDEC_Address4Bytes
0x3418BCE6: 6800 LDR R0, [R0]
0x3418BCE8: 0880 LSRS R0, R0, #2
0x3418BCEA: 07C0 LSLS R0, R0, #31
0x3418BCEC: B118 CBZ R0, .L61 ; 0x3418BCF6
0x3418BCEE: 990C LDR R1, [SP, #48]
0x3418BCF0: 203C MOVS R0, #60
0x3418BCF2: F881 0076 STRB.W R0, [R1, #118]
.L61:
0x3418BCF6: 980C LDR R0, [SP, #48]
0x3418BCF8: F890 0064 LDRB.W R0, [R0, #100]
0x3418BCFC: 2802 CMP R0, #2
0x3418BCFE: D10B BNE 46L62 ; 0x3418BD18
0x3418BD00: F240 2090 MOVW R0, #0x0290 ; 0x34000290 = JEDEC_Address4Bytes
0x3418BD04: F2C3 4000 MOVT R0, #0x3400 ; 0x34000290 = JEDEC_Address4Bytes
0x3418BD08: 6800 LDR R0, [R0]
0x3418BD0A: 08C0 LSRS R0, R0, #3
0x3418BD0C: 07C0 LSLS R0, R0, #31
0x3418BD0E: B118 CBZ R0, .L62 ; 0x3418BD18
0x3418BD10: 990C LDR R1, [SP, #48]
0x3418BD12: 20BC MOVS R0, #188
0x3418BD14: F881 0076 STRB.W R0, [R1, #118]
.L62:
0x3418BD18: 980C LDR R0, [SP, #48]
0x3418BD1A: F890 0064 LDRB.W R0, [R0, #100]
0x3418BD1E: 2803 CMP R0, #3
0x3418BD20: D10B BNE 46L63 ; 0x3418BD3A
0x3418BD22: F240 2090 MOVW R0, #0x0290 ; 0x34000290 = JEDEC_Address4Bytes
0x3418BD26: F2C3 4000 MOVT R0, #0x3400 ; 0x34000290 = JEDEC_Address4Bytes
0x3418BD2A: 6800 LDR R0, [R0]
0x3418BD2C: 0B40 LSRS R0, R0, #13
0x3418BD2E: 07C0 LSLS R0, R0, #31
0x3418BD30: B118 CBZ R0, .L63 ; 0x3418BD3A
0x3418BD32: 990C LDR R1, [SP, #48]
0x3418BD34: 200E MOVS R0, #14
0x3418BD36: F881 0076 STRB.W R0, [R1, #118]
.L63:
0x3418BD3A: 980C LDR R0, [SP, #48]
0x3418BD3C: F890 005C LDRB.W R0, [R0, #92]
0x3418BD40: 2803 CMP R0, #3
0x3418BD42: D12C BNE 46L65 ; 0x3418BD9E
0x3418BD44: 980C LDR R0, [SP, #48]
0x3418BD46: F890 0064 LDRB.W R0, [R0, #100]
0x3418BD4A: BB40 CBNZ R0, .L65 ; 0x3418BD9E
0x3418BD4C: F240 2090 MOVW R0, #0x0290 ; 0x34000290 = JEDEC_Address4Bytes
0x3418BD50: F2C3 4000 MOVT R0, #0x3400 ; 0x34000290 = JEDEC_Address4Bytes
0x3418BD54: 6800 LDR R0, [R0]
0x3418BD56: 0D40 LSRS R0, R0, #21
0x3418BD58: 07C0 LSLS R0, R0, #31
0x3418BD5A: B300 CBZ R0, .L65 ; 0x3418BD9E
0x3418BD5C: F240 2090 MOVW R0, #0x0290 ; 0x34000290 = JEDEC_Address4Bytes
0x3418BD60: F2C3 4000 MOVT R0, #0x3400 ; 0x34000290 = JEDEC_Address4Bytes
0x3418BD64: 6800 LDR R0, [R0]
0x3418BD66: 0E00 LSRS R0, R0, #24
0x3418BD68: 07C0 LSLS R0, R0, #31
0x3418BD6A: B1C0 CBZ R0, .L65 ; 0x3418BD9E
0x3418BD6C: 990C LDR R1, [SP, #48]
0x3418BD6E: 2009 MOVS R0, #9
0x3418BD70: F881 0064 STRB.W R0, [R1, #100]
0x3418BD74: 990C LDR R1, [SP, #48]
0x3418BD76: F101 0008 ADD.W R0, R1, #8
0x3418BD7A: F101 0264 ADD.W R2, R1, #100
0x3418BD7E: 2100 MOVS R1, #0
0x3418BD80: F006 FB76 BL SAL_XSPI_MemoryConfig ; 0x34192470
0x3418BD84: B118 CBZ R0, .L64 ; 0x3418BD8E
0x3418BD86: 200C MOVS R0, #12
0x3418BD88: F88D 002B STRB.W R0, [SP, #43]
0x3418BD8C: E13A B 46L83 ; 0x3418C004
.L64:
0x3418BD8E: 990C LDR R1, [SP, #48]
0x3418BD90: 20CC MOVS R0, #204
0x3418BD92: F881 0076 STRB.W R0, [R1, #118]
0x3418BD96: 990C LDR R1, [SP, #48]
0x3418BD98: 208E MOVS R0, #142
0x3418BD9A: F881 0075 STRB.W R0, [R1, #117]
.L65:
0x3418BD9E: 980C LDR R0, [SP, #48]
0x3418BDA0: F890 0064 LDRB.W R0, [R0, #100]
0x3418BDA4: 280A CMP R0, #10
0x3418BDA6: D12B BNE 46L68 ; 0x3418BE00
0x3418BDA8: F240 2090 MOVW R0, #0x0290 ; 0x34000290 = JEDEC_Address4Bytes
0x3418BDAC: F2C3 4000 MOVT R0, #0x3400 ; 0x34000290 = JEDEC_Address4Bytes
0x3418BDB0: 6800 LDR R0, [R0]
0x3418BDB2: 0E00 LSRS R0, R0, #24
0x3418BDB4: 07C0 LSLS R0, R0, #31
0x3418BDB6: B118 CBZ R0, .L66 ; 0x3418BDC0
0x3418BDB8: 990C LDR R1, [SP, #48]
0x3418BDBA: 2002 MOVS R0, #2
0x3418BDBC: F881 0075 STRB.W R0, [R1, #117]
.L66:
0x3418BDC0: F240 2090 MOVW R0, #0x0290 ; 0x34000290 = JEDEC_Address4Bytes
0x3418BDC4: F2C3 4000 MOVT R0, #0x3400 ; 0x34000290 = JEDEC_Address4Bytes
0x3418BDC8: 6800 LDR R0, [R0]
0x3418BDCA: 0D40 LSRS R0, R0, #21
0x3418BDCC: 07C0 LSLS R0, R0, #31
0x3418BDCE: B158 CBZ R0, .L67 ; 0x3418BDE8
0x3418BDD0: 990C LDR R1, [SP, #48]
0x3418BDD2: 20CC MOVS R0, #204
0x3418BDD4: F881 0076 STRB.W R0, [R1, #118]
0x3418BDD8: 2008 MOVS R0, #8
0x3418BDDA: 9009 STR R0, [SP, #36]
0x3418BDDC: 980C LDR R0, [SP, #48]
0x3418BDDE: 3008 ADDS R0, #8
0x3418BDE0: 2101 MOVS R1, #1
0x3418BDE2: AA09 ADD R2, SP, #36
0x3418BDE4: F006 FB44 BL SAL_XSPI_MemoryConfig ; 0x34192470
.L67:
0x3418BDE8: F240 2090 MOVW R0, #0x0290 ; 0x34000290 = JEDEC_Address4Bytes
0x3418BDEC: F2C3 4000 MOVT R0, #0x3400 ; 0x34000290 = JEDEC_Address4Bytes
0x3418BDF0: 6800 LDR R0, [R0]
0x3418BDF2: 0D80 LSRS R0, R0, #22
0x3418BDF4: 07C0 LSLS R0, R0, #31
0x3418BDF6: B118 CBZ R0, .L68 ; 0x3418BE00
0x3418BDF8: 990C LDR R1, [SP, #48]
0x3418BDFA: 20FD MOVS R0, #253
0x3418BDFC: F881 0076 STRB.W R0, [R1, #118]
.L68:
0x3418BE00: F240 2090 MOVW R0, #0x0290 ; 0x34000290 = JEDEC_Address4Bytes
0x3418BE04: F2C3 4000 MOVT R0, #0x3400 ; 0x34000290 = JEDEC_Address4Bytes
0x3418BE08: 6841 LDR R1, [R0, #4]
0x3418BE0A: 9A0C LDR R2, [SP, #48]
0x3418BE0C: F882 1078 STRB.W R1, [R2, #120]
0x3418BE10: 6841 LDR R1, [R0, #4]
0x3418BE12: 0A09 LSRS R1, R1, #8
0x3418BE14: 9A0C LDR R2, [SP, #48]
0x3418BE16: F882 107A STRB.W R1, [R2, #122]
0x3418BE1A: 88C1 LDRH R1, [R0, #6]
0x3418BE1C: 9A0C LDR R2, [SP, #48]
0x3418BE1E: F882 107C STRB.W R1, [R2, #124]
0x3418BE22: 79C0 LDRB R0, [R0, #7]
0x3418BE24: 990C LDR R1, [SP, #48]
0x3418BE26: F881 007E STRB.W R0, [R1, #126]
.L69:
0x3418BE2A: 980C LDR R0, [SP, #48]
0x3418BE2C: F890 0094 LDRB.W R0, [R0, #148]
0x3418BE30: 0600 LSLS R0, R0, #24
0x3418BE32: 2800 CMP R0, #0
0x3418BE34: F140 80E6 BPL.W 46L83 ; 0x3418C004
0x3418BE38: 980C LDR R0, [SP, #48]
0x3418BE3A: F890 0064 LDRB.W R0, [R0, #100]
0x3418BE3E: 280B CMP R0, #11
0x3418BE40: D005 BEQ 46L70 ; 0x3418BE4E
0x3418BE42: 980C LDR R0, [SP, #48]
0x3418BE44: F890 0064 LDRB.W R0, [R0, #100]
0x3418BE48: 280A CMP R0, #10
0x3418BE4A: F040 80DB BNE.W 46L83 ; 0x3418C004
.L70:
0x3418BE4E: 2000 MOVS R0, #0
0x3418BE50: 9006 STR R0, [SP, #24]
0x3418BE52: F240 2078 MOVW R0, #0x0278 ; 0x34000278 = JEDEC_XSPI10
0x3418BE56: F2C3 4000 MOVT R0, #0x3400 ; 0x34000278 = JEDEC_XSPI10
0x3418BE5A: 7840 LDRB R0, [R0, #1]
0x3418BE5C: B140 CBZ R0, .L71 ; 0x3418BE70
0x3418BE5E: F240 2078 MOVW R0, #0x0278 ; 0x34000278 = JEDEC_XSPI10
0x3418BE62: F2C3 4000 MOVT R0, #0x3400 ; 0x34000278 = JEDEC_XSPI10
0x3418BE66: 6800 LDR R0, [R0]
0x3418BE68: 0A00 LSRS R0, R0, #8
0x3418BE6A: 990C LDR R1, [SP, #48]
0x3418BE6C: F881 0076 STRB.W R0, [R1, #118]
.L71:
0x3418BE70: F240 2078 MOVW R0, #0x0278 ; 0x34000278 = JEDEC_XSPI10
0x3418BE74: F2C3 4000 MOVT R0, #0x3400 ; 0x34000278 = JEDEC_XSPI10
0x3418BE78: 7D00 LDRB R0, [R0, #20]
0x3418BE7A: 06C0 LSLS R0, R0, #27
0x3418BE7C: B168 CBZ R0, .L72 ; 0x3418BE9A
0x3418BE7E: F240 2078 MOVW R0, #0x0278 ; 0x34000278 = JEDEC_XSPI10
0x3418BE82: F2C3 4000 MOVT R0, #0x3400 ; 0x34000278 = JEDEC_XSPI10
0x3418BE86: 6940 LDR R0, [R0, #20]
0x3418BE88: F000 001F AND R0, R0, #31
0x3418BE8C: 9009 STR R0, [SP, #36]
0x3418BE8E: 980C LDR R0, [SP, #48]
0x3418BE90: 3008 ADDS R0, #8
0x3418BE92: 2101 MOVS R1, #1
0x3418BE94: AA09 ADD R2, SP, #36
0x3418BE96: F006 FAEB BL SAL_XSPI_MemoryConfig ; 0x34192470
.L72:
0x3418BE9A: F240 10F8 MOVW R0, #0x01F8 ; 0x340001F8 = JEDEC_Basic
0x3418BE9E: F2C3 4000 MOVT R0, #0x3400 ; 0x340001F8 = JEDEC_Basic
0x3418BEA2: 6D00 LDR R0, [R0, #80]
0x3418BEA4: 0F00 LSRS R0, R0, #28
0x3418BEA6: F000 F8F3 BL sfdp_getfrequencevalue ; 0x3418C090
0x3418BEAA: 9005 STR R0, [SP, #20]
0x3418BEAC: 9805 LDR R0, [SP, #20]
0x3418BEAE: 990C LDR R1, [SP, #48]
0x3418BEB0: 6E89 LDR R1, [R1, #104]
0x3418BEB2: 4288 CMP R0, R1
0x3418BEB4: D902 BLS 46L73 ; 0x3418BEBC
0x3418BEB6: 980C LDR R0, [SP, #48]
0x3418BEB8: 6E80 LDR R0, [R0, #104]
0x3418BEBA: 9005 STR R0, [SP, #20]
.L73:
0x3418BEBC: 980C LDR R0, [SP, #48]
0x3418BEBE: 6800 LDR R0, [R0]
0x3418BEC0: B138 CBZ R0, .L74 ; 0x3418BED2
0x3418BEC2: 9805 LDR R0, [SP, #20]
0x3418BEC4: 990C LDR R1, [SP, #48]
0x3418BEC6: 6809 LDR R1, [R1]
0x3418BEC8: 4288 CMP R0, R1
0x3418BECA: D902 BLS 46L74 ; 0x3418BED2
0x3418BECC: 980C LDR R0, [SP, #48]
0x3418BECE: 6800 LDR R0, [R0]
0x3418BED0: 9005 STR R0, [SP, #20]
.L74:
0x3418BED2: 990C LDR R1, [SP, #48]
0x3418BED4: F101 0008 ADD.W R0, R1, #8
0x3418BED8: 6E89 LDR R1, [R1, #104]
0x3418BEDA: 9A05 LDR R2, [SP, #20]
0x3418BEDC: AB06 ADD R3, SP, #24
0x3418BEDE: F000 F9E3 BL SAL_XSPI_SetClock ; 0x3418C2A8
0x3418BEE2: B118 CBZ R0, .L75 ; 0x3418BEEC
0x3418BEE4: 200D MOVS R0, #13
0x3418BEE6: F88D 002B STRB.W R0, [SP, #43]
0x3418BEEA: E08B B 46L83 ; 0x3418C004
.L75:
0x3418BEEC: 990B LDR R1, [SP, #44]
0x3418BEEE: 2001 MOVS R0, #1
0x3418BEF0: 7008 STRB R0, [R1]
0x3418BEF2: 9806 LDR R0, [SP, #24]
0x3418BEF4: F24C 2100 MOVW R1, #0xC200
0x3418BEF8: F6C0 31EB MOVT R1, #0x0BEB
0x3418BEFC: 4288 CMP R0, R1
0x3418BEFE: D314 BCC 46L76 ; 0x3418BF2A
0x3418BF00: F240 2078 MOVW R0, #0x0278 ; 0x34000278 = JEDEC_XSPI10
0x3418BF04: F2C3 4000 MOVT R0, #0x3400 ; 0x34000278 = JEDEC_XSPI10
0x3418BF08: 68C0 LDR R0, [R0, #12]
0x3418BF0A: 09C0 LSRS R0, R0, #7
0x3418BF0C: 06C0 LSLS R0, R0, #27
0x3418BF0E: B160 CBZ R0, .L76 ; 0x3418BF2A
0x3418BF10: F240 2078 MOVW R0, #0x0278 ; 0x34000278 = JEDEC_XSPI10
0x3418BF14: F2C3 4000 MOVT R0, #0x3400 ; 0x34000278 = JEDEC_XSPI10
0x3418BF18: 68C1 LDR R1, [R0, #12]
0x3418BF1A: F3C1 11C4 UBFX R1, R1, #7, #5
0x3418BF1E: 9109 STR R1, [SP, #36]
0x3418BF20: 68C0 LDR R0, [R0, #12]
0x3418BF22: F3C0 0084 UBFX R0, R0, #2, #5
0x3418BF26: 9008 STR R0, [SP, #32]
0x3418BF28: E041 B 46L79 ; 0x3418BFAE
.L76:
0x3418BF2A: 9806 LDR R0, [SP, #24]
0x3418BF2C: F24F 5180 MOVW R1, #0xF580
0x3418BF30: F6C0 11E4 MOVT R1, #0x09E4
0x3418BF34: 4288 CMP R0, R1
0x3418BF36: D312 BCC 46L77 ; 0x3418BF5E
0x3418BF38: F240 2078 MOVW R0, #0x0278 ; 0x34000278 = JEDEC_XSPI10
0x3418BF3C: F2C3 4000 MOVT R0, #0x3400 ; 0x34000278 = JEDEC_XSPI10
0x3418BF40: 6900 LDR R0, [R0, #16]
0x3418BF42: 0EC0 LSRS R0, R0, #27
0x3418BF44: B158 CBZ R0, .L77 ; 0x3418BF5E
0x3418BF46: F240 2078 MOVW R0, #0x0278 ; 0x34000278 = JEDEC_XSPI10
0x3418BF4A: F2C3 4000 MOVT R0, #0x3400 ; 0x34000278 = JEDEC_XSPI10
0x3418BF4E: 6901 LDR R1, [R0, #16]
0x3418BF50: 0EC9 LSRS R1, R1, #27
0x3418BF52: 9109 STR R1, [SP, #36]
0x3418BF54: 6900 LDR R0, [R0, #16]
0x3418BF56: F3C0 5084 UBFX R0, R0, #22, #5
0x3418BF5A: 9008 STR R0, [SP, #32]
0x3418BF5C: E027 B 46L79 ; 0x3418BFAE
.L77:
0x3418BF5E: 9806 LDR R0, [SP, #24]
0x3418BF60: F646 3140 MOVW R1, #0x6B40
0x3418BF64: F2C0 71ED MOVT R1, #0x07ED
0x3418BF68: 4288 CMP R0, R1
0x3418BF6A: D314 BCC 46L78 ; 0x3418BF96
0x3418BF6C: F240 2078 MOVW R0, #0x0278 ; 0x34000278 = JEDEC_XSPI10
0x3418BF70: F2C3 4000 MOVT R0, #0x3400 ; 0x34000278 = JEDEC_XSPI10
0x3418BF74: 6900 LDR R0, [R0, #16]
0x3418BF76: 0C40 LSRS R0, R0, #17
0x3418BF78: 06C0 LSLS R0, R0, #27
0x3418BF7A: B160 CBZ R0, .L78 ; 0x3418BF96
0x3418BF7C: F240 2078 MOVW R0, #0x0278 ; 0x34000278 = JEDEC_XSPI10
0x3418BF80: F2C3 4000 MOVT R0, #0x3400 ; 0x34000278 = JEDEC_XSPI10
0x3418BF84: 6901 LDR R1, [R0, #16]
0x3418BF86: F3C1 4144 UBFX R1, R1, #17, #5
0x3418BF8A: 9109 STR R1, [SP, #36]
0x3418BF8C: 6900 LDR R0, [R0, #16]
0x3418BF8E: F3C0 3004 UBFX R0, R0, #12, #5
0x3418BF92: 9008 STR R0, [SP, #32]
0x3418BF94: E00B B 46L79 ; 0x3418BFAE
.L78:
0x3418BF96: F240 2078 MOVW R0, #0x0278 ; 0x34000278 = JEDEC_XSPI10
0x3418BF9A: F2C3 4000 MOVT R0, #0x3400 ; 0x34000278 = JEDEC_XSPI10
0x3418BF9E: 6901 LDR R1, [R0, #16]
0x3418BFA0: F3C1 11C4 UBFX R1, R1, #7, #5
0x3418BFA4: 9109 STR R1, [SP, #36]
0x3418BFA6: 6900 LDR R0, [R0, #16]
0x3418BFA8: F3C0 0084 UBFX R0, R0, #2, #5
0x3418BFAC: 9008 STR R0, [SP, #32]
.L79:
0x3418BFAE: 980C LDR R0, [SP, #48]
0x3418BFB0: F890 005D LDRB.W R0, [R0, #93]
0x3418BFB4: 28C8 CMP R0, #200
0x3418BFB6: D108 BNE 46L80 ; 0x3418BFCA
0x3418BFB8: 2010 MOVS R0, #16
0x3418BFBA: 9009 STR R0, [SP, #36]
0x3418BFBC: 980C LDR R0, [SP, #48]
0x3418BFBE: 3008 ADDS R0, #8
0x3418BFC0: 2101 MOVS R1, #1
0x3418BFC2: AA09 ADD R2, SP, #36
0x3418BFC4: F006 FA54 BL SAL_XSPI_MemoryConfig ; 0x34192470
0x3418BFC8: E01C B 46L83 ; 0x3418C004
.L80:
0x3418BFCA: 980C LDR R0, [SP, #48]
0x3418BFCC: F890 0095 LDRB.W R0, [R0, #149]
0x3418BFD0: 0780 LSLS R0, R0, #30
0x3418BFD2: 2800 CMP R0, #0
0x3418BFD4: D512 BPL 46L82 ; 0x3418BFFC
0x3418BFD6: F240 1024 MOVW R0, #0x0124 ; 0x34000124 = JEDEC_SCCR_Map
0x3418BFDA: F2C3 4000 MOVT R0, #0x3400 ; 0x34000124 = JEDEC_SCCR_Map
0x3418BFDE: 6A00 LDR R0, [R0, #32]
0x3418BFE0: 0FC0 LSRS R0, R0, #31
0x3418BFE2: B158 CBZ R0, .L82 ; 0x3418BFFC
0x3418BFE4: 980C LDR R0, [SP, #48]
0x3418BFE6: 9908 LDR R1, [SP, #32]
0x3418BFE8: F000 F872 BL sfdp_set_dummycycle ; 0x3418C0D0
0x3418BFEC: B928 CBNZ R0, .L81 ; 0x3418BFFA
0x3418BFEE: 980C LDR R0, [SP, #48]
0x3418BFF0: 3008 ADDS R0, #8
0x3418BFF2: 2101 MOVS R1, #1
0x3418BFF4: AA09 ADD R2, SP, #36
0x3418BFF6: F006 FA3B BL SAL_XSPI_MemoryConfig ; 0x34192470
.L81:
0x3418BFFA: E003 B 46L83 ; 0x3418C004
.L82:
0x3418BFFC: 200E MOVS R0, #14
0x3418BFFE: F88D 002B STRB.W R0, [SP, #43]
0x3418C002: E7FF B 46L83 ; 0x3418C004
.L83:
0x3418C004: F89D 002B LDRB.W R0, [SP, #43]
0x3418C008: B00E ADD SP, SP, #56
0x3418C00A: BDB0 POP 123R4-R5, R7, PC}
Section .text.JEDEC_Basic_Manage4S4S4SEnableSequence from blto2_FSBL_lto.o, size=132, align=4
JEDEC_Basic_Manage4S4S4SEnableSequence:
0x3418C00C: B580 PUSH 123R7, LR}
0x3418C00E: B084 SUB SP, SP, #16
0x3418C010: 9003 STR R0, [SP, #12]
0x3418C012: 200F MOVS R0, #15
0x3418C014: F88D 000B STRB.W R0, [SP, #11]
0x3418C018: 2000 MOVS R0, #0
0x3418C01A: F88D 000A STRB.W R0, [SP, #10]
0x3418C01E: F240 10F8 MOVW R0, #0x01F8 ; 0x340001F8 = JEDEC_Basic
0x3418C022: F2C3 4000 MOVT R0, #0x3400 ; 0x340001F8 = JEDEC_Basic
0x3418C026: 6BC0 LDR R0, [R0, #60]
0x3418C028: 0900 LSRS R0, R0, #4
0x3418C02A: 07C0 LSLS R0, R0, #31
0x3418C02C: B140 CBZ R0, .L1 ; 0x3418C040
0x3418C02E: 9803 LDR R0, [SP, #12]
0x3418C030: F005 FF6A BL JEDEC_Basic_ManageQuadEnableRequirement ; 0x34191F08
0x3418C034: F88D 000B STRB.W R0, [SP, #11]
0x3418C038: 2038 MOVS R0, #56
0x3418C03A: F88D 000A STRB.W R0, [SP, #10]
0x3418C03E: E011 B 46L2 ; 0x3418C064
.L1:
0x3418C040: F240 10F8 MOVW R0, #0x01F8 ; 0x340001F8 = JEDEC_Basic
0x3418C044: F2C3 4000 MOVT R0, #0x3400 ; 0x340001F8 = JEDEC_Basic
0x3418C048: 6BC0 LDR R0, [R0, #60]
0x3418C04A: 0900 LSRS R0, R0, #4
0x3418C04C: 0740 LSLS R0, R0, #29
0x3418C04E: 2800 CMP R0, #0
0x3418C050: D508 BPL 46L2 ; 0x3418C064
0x3418C052: 9803 LDR R0, [SP, #12]
0x3418C054: F005 FF58 BL JEDEC_Basic_ManageQuadEnableRequirement ; 0x34191F08
0x3418C058: F88D 000B STRB.W R0, [SP, #11]
0x3418C05C: 2035 MOVS R0, #53
0x3418C05E: F88D 000A STRB.W R0, [SP, #10]
0x3418C062: E7FF B 46L2 ; 0x3418C064
.L2:
0x3418C064: F89D 000B LDRB.W R0, [SP, #11]
0x3418C068: B970 CBNZ R0, .L3 ; 0x3418C088
0x3418C06A: F89D 000A LDRB.W R0, [SP, #10]
0x3418C06E: B158 CBZ R0, .L3 ; 0x3418C088
0x3418C070: 9803 LDR R0, [SP, #12]
0x3418C072: 3008 ADDS R0, #8
0x3418C074: F89D 100A LDRB.W R1, [SP, #10]
0x3418C078: 2300 MOVS R3, #0
0x3418C07A: 9301 STR R3, [SP, #4]
0x3418C07C: 461A MOV R2, R3
0x3418C07E: F000 FA19 BL SAL_XSPI_SendReadCommand ; 0x3418C4B4
0x3418C082: 9801 LDR R0, [SP, #4]
0x3418C084: F88D 000B STRB.W R0, [SP, #11]
.L3:
0x3418C088: F89D 000B LDRB.W R0, [SP, #11]
0x3418C08C: B004 ADD SP, SP, #16
0x3418C08E: BD80 POP 123R7, PC}
Section .text.sfdp_getfrequencevalue from blto2_FSBL_lto.o, size=64, align=4
sfdp_getfrequencevalue:
0x3418C090: B580 PUSH 123R7, LR}
0x3418C092: B08A SUB SP, SP, #40
0x3418C094: 9008 STR R0, [SP, #32]
0x3418C096: F64C 11C6 MOVW R1, #0xC9C6 ; 0x3418C9C6 = .rodata..L__const.sfdp_getfrequencevalue.freqMhz_table
0x3418C09A: F2C3 4118 MOVT R1, #0x3418 ; 0x3418C9C6 = .rodata..L__const.sfdp_getfrequencevalue.freqMhz_table
0x3418C09E: F10D 0006 ADD.W R0, SP, #6
0x3418C0A2: 221A MOVS R2, #26
0x3418C0A4: F000 FC2C BL memcpy ; 0x3418C900
0x3418C0A8: 9808 LDR R0, [SP, #32]
0x3418C0AA: 2809 CMP R0, #9
0x3418C0AC: D80B BHI 46L1 ; 0x3418C0C6
0x3418C0AE: 9908 LDR R1, [SP, #32]
0x3418C0B0: F10D 0006 ADD.W R0, SP, #6
0x3418C0B4: F830 0011 LDRH.W R0, [R0, R1, LSL #1]
0x3418C0B8: F244 2140 MOVW R1, #0x4240
0x3418C0BC: F2C0 010F MOVT R1, #15
0x3418C0C0: 4348 MULS R0, R1, R0
0x3418C0C2: 9009 STR R0, [SP, #36]
0x3418C0C4: E001 B 46L2 ; 0x3418C0CA
.L1:
0x3418C0C6: 2000 MOVS R0, #0
0x3418C0C8: 9009 STR R0, [SP, #36]
.L2:
0x3418C0CA: 9809 LDR R0, [SP, #36]
0x3418C0CC: B00A ADD SP, SP, #40
0x3418C0CE: BD80 POP 123R7, PC}
Section .text.sfdp_set_dummycycle from blto2_FSBL_lto.o, size=420, align=4
sfdp_set_dummycycle:
0x3418C0D0: B5B0 PUSH 123R4-R5, R7, LR}
0x3418C0D2: B088 SUB SP, SP, #32
0x3418C0D4: 9007 STR R0, [SP, #28]
0x3418C0D6: 9106 STR R1, [SP, #24]
0x3418C0D8: F240 7003 MOVW R0, #0x0703
0x3418C0DC: F6C1 700F MOVT R0, #0x1F0F
0x3418C0E0: 9005 STR R0, [SP, #20]
0x3418C0E2: 2000 MOVS R0, #0
0x3418C0E4: F88D 0013 STRB.W R0, [SP, #19]
0x3418C0E8: F8AD 0010 STRH.W R0, [SP, #16]
0x3418C0EC: F240 1024 MOVW R0, #0x0124 ; 0x34000124 = JEDEC_SCCR_Map
0x3418C0F0: F2C3 4000 MOVT R0, #0x3400 ; 0x34000124 = JEDEC_SCCR_Map
0x3418C0F4: 6A00 LDR R0, [R0, #32]
0x3418C0F6: 0F00 LSRS R0, R0, #28
0x3418C0F8: 07C0 LSLS R0, R0, #31
0x3418C0FA: B958 CBNZ R0, .L1 ; 0x3418C114
0x3418C0FC: F240 1024 MOVW R0, #0x0124 ; 0x34000124 = JEDEC_SCCR_Map
0x3418C100: F2C3 4000 MOVT R0, #0x3400 ; 0x34000124 = JEDEC_SCCR_Map
0x3418C104: 6A00 LDR R0, [R0, #32]
0x3418C106: 0FC0 LSRS R0, R0, #31
0x3418C108: 2801 CMP R0, #1
0x3418C10A: D103 BNE 46L1 ; 0x3418C114
0x3418C10C: 200C MOVS R0, #12
0x3418C10E: F88D 0013 STRB.W R0, [SP, #19]
0x3418C112: E0AB B 46L9 ; 0x3418C26C
.L1:
0x3418C114: F240 1024 MOVW R0, #0x0124 ; 0x34000124 = JEDEC_SCCR_Map
0x3418C118: F2C3 4000 MOVT R0, #0x3400 ; 0x34000124 = JEDEC_SCCR_Map
0x3418C11C: 6A00 LDR R0, [R0, #32]
0x3418C11E: 0EC0 LSRS R0, R0, #27
0x3418C120: 07C0 LSLS R0, R0, #31
0x3418C122: B140 CBZ R0, .L2 ; 0x3418C136
0x3418C124: F240 1024 MOVW R0, #0x0124 ; 0x34000124 = JEDEC_SCCR_Map
0x3418C128: F2C3 4000 MOVT R0, #0x3400 ; 0x34000124 = JEDEC_SCCR_Map
0x3418C12C: F890 0022 LDRB.W R0, [R0, #34]
0x3418C130: 0200 LSLS R0, R0, #8
0x3418C132: 9003 STR R0, [SP, #12]
0x3418C134: E00E B 46L4 ; 0x3418C154
.L2:
0x3418C136: 9807 LDR R0, [SP, #28]
0x3418C138: F890 005D LDRB.W R0, [R0, #93]
0x3418C13C: 28C8 CMP R0, #200
0x3418C13E: D102 BNE 46L3 ; 0x3418C146
0x3418C140: 2001 MOVS R0, #1
0x3418C142: 9003 STR R0, [SP, #12]
0x3418C144: E006 B 46L4 ; 0x3418C154
.L3:
0x3418C146: F240 1024 MOVW R0, #0x0124 ; 0x34000124 = JEDEC_SCCR_Map
0x3418C14A: F2C3 4000 MOVT R0, #0x3400 ; 0x34000124 = JEDEC_SCCR_Map
0x3418C14E: F890 0022 LDRB.W R0, [R0, #34]
0x3418C152: 9003 STR R0, [SP, #12]
.L4:
0x3418C154: 9B07 LDR R3, [SP, #28]
0x3418C156: F103 0008 ADD.W R0, R3, #8
0x3418C15A: F240 1124 MOVW R1, #0x0124 ; 0x34000124 = JEDEC_SCCR_Map
0x3418C15E: F2C3 4100 MOVT R1, #0x3400 ; 0x34000124 = JEDEC_SCCR_Map
0x3418C162: F891 1021 LDRB.W R1, [R1, #33]
0x3418C166: 9A03 LDR R2, [SP, #12]
0x3418C168: F893 305D LDRB.W R3, [R3, #93]
0x3418C16C: 46EC MOV R12, SP
0x3418C16E: F8CC 3004 STR.W R3, [R12, #4]
0x3418C172: 2302 MOVS R3, #2
0x3418C174: F8CC 3000 STR.W R3, [R12]
0x3418C178: AB04 ADD R3, SP, #16
0x3418C17A: F006 FB7D BL SAL_XSPI_CommandSendReadAddress ; 0x34192878
0x3418C17E: B118 CBZ R0, .L5 ; 0x3418C188
0x3418C180: 200C MOVS R0, #12
0x3418C182: F88D 0013 STRB.W R0, [SP, #19]
0x3418C186: E071 B 46L9 ; 0x3418C26C
.L5:
0x3418C188: 9907 LDR R1, [SP, #28]
0x3418C18A: F101 0008 ADD.W R0, R1, #8
0x3418C18E: F891 1070 LDRB.W R1, [R1, #112]
0x3418C192: 2300 MOVS R3, #0
0x3418C194: 461A MOV R2, R3
0x3418C196: F000 F949 BL SAL_XSPI_CommandSendData ; 0x3418C42C
0x3418C19A: B118 CBZ R0, .L6 ; 0x3418C1A4
0x3418C19C: 200C MOVS R0, #12
0x3418C19E: F88D 0013 STRB.W R0, [SP, #19]
0x3418C1A2: E063 B 46L9 ; 0x3418C26C
.L6:
0x3418C1A4: 9B07 LDR R3, [SP, #28]
0x3418C1A6: F103 0008 ADD.W R0, R3, #8
0x3418C1AA: F893 2074 LDRB.W R2, [R3, #116]
0x3418C1AE: F893 405D LDRB.W R4, [R3, #93]
0x3418C1B2: F893 1071 LDRB.W R1, [R3, #113]
0x3418C1B6: F893 E072 LDRB.W LR, [R3, #114]
0x3418C1BA: F893 3073 LDRB.W R3, [R3, #115]
0x3418C1BE: 2B00 CMP R3, #0
0x3418C1C0: EA5F 931F CSET R3, EQ
0x3418C1C4: FA03 F30E LSL.W R3, R3, LR
0x3418C1C8: F04F 0C01 MOV.W R12, #1
0x3418C1CC: FA0C FC0E LSL.W R12, R12, LR
0x3418C1D0: 46EE MOV LR, SP
0x3418C1D2: F44F 757A MOV.W R5, #0x03E8
0x3418C1D6: F8CE 5008 STR.W R5, [LR, #8]
0x3418C1DA: F8CE 4004 STR.W R4, [LR, #4]
0x3418C1DE: FA5F FC8C UXTB R12, R12
0x3418C1E2: F8CE C000 STR.W R12, [LR]
0x3418C1E6: B2DB UXTB R3, R3
0x3418C1E8: F000 F9A8 BL SAL_XSPI_CheckStatusRegister ; 0x3418C53C
0x3418C1EC: B118 CBZ R0, .L7 ; 0x3418C1F6
0x3418C1EE: 200C MOVS R0, #12
0x3418C1F0: F88D 0013 STRB.W R0, [SP, #19]
0x3418C1F4: E03A B 46L9 ; 0x3418C26C
.L7:
0x3418C1F6: F89D 0010 LDRB.W R0, [SP, #16]
0x3418C1FA: F240 1124 MOVW R1, #0x0124 ; 0x34000124 = JEDEC_SCCR_Map
0x3418C1FE: F2C3 4100 MOVT R1, #0x3400 ; 0x34000124 = JEDEC_SCCR_Map
0x3418C202: 6A0B LDR R3, [R1, #32]
0x3418C204: F3C3 7C41 UBFX R12, R3, #29, #2
0x3418C208: AA05 ADD R2, SP, #20
0x3418C20A: 4462 ADD R2, R12
0x3418C20C: 7812 LDRB R2, [R2]
0x3418C20E: F3C3 6302 UBFX R3, R3, #24, #3
0x3418C212: 409A LSLS R2, R3
0x3418C214: 4390 BICS R0, R2
0x3418C216: F88D 0010 STRB.W R0, [SP, #16]
0x3418C21A: F89D 0010 LDRB.W R0, [SP, #16]
0x3418C21E: 9A06 LDR R2, [SP, #24]
0x3418C220: F891 3023 LDRB.W R3, [R1, #35]
0x3418C224: F003 0307 AND R3, R3, #7
0x3418C228: 409A LSLS R2, R3
0x3418C22A: 4310 ORRS R0, R2
0x3418C22C: F88D 0010 STRB.W R0, [SP, #16]
0x3418C230: F89D 0010 LDRB.W R0, [SP, #16]
0x3418C234: F88D 0011 STRB.W R0, [SP, #17]
0x3418C238: 9807 LDR R0, [SP, #28]
0x3418C23A: 3008 ADDS R0, #8
0x3418C23C: F891 1020 LDRB.W R1, [R1, #32]
0x3418C240: 9A03 LDR R2, [SP, #12]
0x3418C242: 46EC MOV R12, SP
0x3418C244: 2302 MOVS R3, #2
0x3418C246: F8CC 3000 STR.W R3, [R12]
0x3418C24A: AB04 ADD R3, SP, #16
0x3418C24C: F006 FACE BL SAL_XSPI_Write ; 0x341927EC
0x3418C250: B118 CBZ R0, .L8 ; 0x3418C25A
0x3418C252: 200C MOVS R0, #12
0x3418C254: F88D 0013 STRB.W R0, [SP, #19]
0x3418C258: E008 B 46L9 ; 0x3418C26C
.L8:
0x3418C25A: 9807 LDR R0, [SP, #28]
0x3418C25C: 2164 MOVS R1, #100
0x3418C25E: F005 FFEF BL driver_check_FlagBUSY ; 0x34192240
0x3418C262: B118 CBZ R0, .L9 ; 0x3418C26C
0x3418C264: 200C MOVS R0, #12
0x3418C266: F88D 0013 STRB.W R0, [SP, #19]
0x3418C26A: E7FF B 46L9 ; 0x3418C26C
.L9:
0x3418C26C: F89D 0013 LDRB.W R0, [SP, #19]
0x3418C270: B008 ADD SP, SP, #32
0x3418C272: BDB0 POP 123R4-R5, R7, PC}
Section .text.EXTMEM_DRIVER_NOR_SFDP_DeInit from blto2_FSBL_lto.o, size=16, align=4
EXTMEM_DRIVER_NOR_SFDP_DeInit:
0x3418C274: B081 SUB SP, SP, #4
0x3418C276: 9000 STR R0, [SP, #0]
0x3418C278: 9900 LDR R1, [SP, #0]
0x3418C27A: 2000 MOVS R0, #0
0x3418C27C: F881 005E STRB.W R0, [R1, #94]
0x3418C280: B001 ADD SP, SP, #4
0x3418C282: 4770 BX LR
Section .text.EXTMEM_DRIVER_NOR_SFDP_Disable_MemoryMappedMode from blto2_FSBL_lto.o, size=36, align=4
EXTMEM_DRIVER_NOR_SFDP_Disable_MemoryMappedMode:
0x3418C284: B580 PUSH 123R7, LR}
0x3418C286: B082 SUB SP, SP, #8
0x3418C288: 9001 STR R0, [SP, #4]
0x3418C28A: 2000 MOVS R0, #0
0x3418C28C: F88D 0003 STRB.W R0, [SP, #3]
0x3418C290: 9801 LDR R0, [SP, #4]
0x3418C292: 3008 ADDS R0, #8
0x3418C294: F006 FB50 BL SAL_XSPI_DisableMapMode ; 0x34192938
0x3418C298: B110 CBZ R0, .L1 ; 0x3418C2A0
0x3418C29A: 20F3 MOVS R0, #243
0x3418C29C: F88D 0003 STRB.W R0, [SP, #3]
.L1:
0x3418C2A0: F99D 0003 LDRSB.W R0, [SP, #3]
0x3418C2A4: B002 ADD SP, SP, #8
0x3418C2A6: BD80 POP 123R7, PC}
Section .text.SAL_XSPI_SetClock from blto2_FSBL_lto.o, size=116, align=4
SAL_XSPI_SetClock:
0x3418C2A8: B086 SUB SP, SP, #24
0x3418C2AA: 9005 STR R0, [SP, #20]
0x3418C2AC: 9104 STR R1, [SP, #16]
0x3418C2AE: 9203 STR R2, [SP, #12]
0x3418C2B0: 9302 STR R3, [SP, #8]
0x3418C2B2: 2000 MOVS R0, #0
0x3418C2B4: F88D 0007 STRB.W R0, [SP, #7]
0x3418C2B8: 9803 LDR R0, [SP, #12]
0x3418C2BA: B918 CBNZ R0, .L1 ; 0x3418C2C4
0x3418C2BC: 2001 MOVS R0, #1
0x3418C2BE: F88D 0007 STRB.W R0, [SP, #7]
0x3418C2C2: E027 B 46L3 ; 0x3418C314
.L1:
0x3418C2C4: 9804 LDR R0, [SP, #16]
0x3418C2C6: 9903 LDR R1, [SP, #12]
0x3418C2C8: FBB0 F0F1 UDIV R0, R0, R1
0x3418C2CC: 9000 STR R0, [SP, #0]
0x3418C2CE: 9800 LDR R0, [SP, #0]
0x3418C2D0: B168 CBZ R0, .L2 ; 0x3418C2EE
0x3418C2D2: 9804 LDR R0, [SP, #16]
0x3418C2D4: 9900 LDR R1, [SP, #0]
0x3418C2D6: FBB0 F0F1 UDIV R0, R0, R1
0x3418C2DA: 9902 LDR R1, [SP, #8]
0x3418C2DC: 6008 STR R0, [R1]
0x3418C2DE: 9802 LDR R0, [SP, #8]
0x3418C2E0: 6800 LDR R0, [R0]
0x3418C2E2: 9903 LDR R1, [SP, #12]
0x3418C2E4: 4288 CMP R0, R1
0x3418C2E6: D802 BHI 46L2 ; 0x3418C2EE
0x3418C2E8: 9800 LDR R0, [SP, #0]
0x3418C2EA: 3801 SUBS R0, #1
0x3418C2EC: 9000 STR R0, [SP, #0]
.L2:
0x3418C2EE: 9804 LDR R0, [SP, #16]
0x3418C2F0: 9900 LDR R1, [SP, #0]
0x3418C2F2: 3101 ADDS R1, #1
0x3418C2F4: FBB0 F0F1 UDIV R0, R0, R1
0x3418C2F8: 9902 LDR R1, [SP, #8]
0x3418C2FA: 6008 STR R0, [R1]
0x3418C2FC: 9805 LDR R0, [SP, #20]
0x3418C2FE: 6800 LDR R0, [R0]
0x3418C300: 6800 LDR R0, [R0]
0x3418C302: 68C0 LDR R0, [R0, #12]
0x3418C304: F020 00FF BIC R0, R0, #255
0x3418C308: 9900 LDR R1, [SP, #0]
0x3418C30A: 4308 ORRS R0, R1
0x3418C30C: 9905 LDR R1, [SP, #20]
0x3418C30E: 6809 LDR R1, [R1]
0x3418C310: 6809 LDR R1, [R1]
0x3418C312: 60C8 STR R0, [R1, #12]
.L3:
0x3418C314: F89D 0007 LDRB.W R0, [SP, #7]
0x3418C318: B006 ADD SP, SP, #24
0x3418C31A: 4770 BX LR
Section .text.XSPI_FormatCommand from blto2_FSBL_lto.o, size=88, align=4
XSPI_FormatCommand:
0x3418C31C: B083 SUB SP, SP, #12
0x3418C31E: F88D 000B STRB.W R0, [SP, #11]
0x3418C322: 9101 STR R1, [SP, #4]
0x3418C324: F88D 2003 STRB.W R2, [SP, #3]
0x3418C328: 9801 LDR R0, [SP, #4]
0x3418C32A: 2810 CMP R0, #16
0x3418C32C: D11A BNE 46L3 ; 0x3418C364
0x3418C32E: F89D 0003 LDRB.W R0, [SP, #3]
0x3418C332: 0200 LSLS R0, R0, #8
0x3418C334: F8AD 0000 STRH.W R0, [SP]
0x3418C338: F89D 000B LDRB.W R0, [SP, #11]
0x3418C33C: 2801 CMP R0, #1
0x3418C33E: D109 BNE 46L1 ; 0x3418C354
0x3418C340: F89D 0003 LDRB.W R0, [SP, #3]
0x3418C344: F080 01FF EOR R1, R0, #255
0x3418C348: F8BD 0000 LDRH.W R0, [SP]
0x3418C34C: 4308 ORRS R0, R1
0x3418C34E: F8AD 0000 STRH.W R0, [SP]
0x3418C352: E006 B 46L2 ; 0x3418C362
.L1:
0x3418C354: F89D 1003 LDRB.W R1, [SP, #3]
0x3418C358: F8BD 0000 LDRH.W R0, [SP]
0x3418C35C: 4308 ORRS R0, R1
0x3418C35E: F8AD 0000 STRH.W R0, [SP]
.L2:
0x3418C362: E003 B 46L4 ; 0x3418C36C
.L3:
0x3418C364: F89D 0003 LDRB.W R0, [SP, #3]
0x3418C368: F8AD 0000 STRH.W R0, [SP]
.L4:
0x3418C36C: F8BD 0000 LDRH.W R0, [SP]
0x3418C370: B003 ADD SP, SP, #12
0x3418C372: 4770 BX LR
Section .text.SAL_XSPI_GetId from blto2_FSBL_lto.o, size=152, align=4
SAL_XSPI_GetId:
0x3418C374: B580 PUSH 123R7, LR}
0x3418C376: B098 SUB SP, SP, #96
0x3418C378: 9017 STR R0, [SP, #92]
0x3418C37A: 9116 STR R1, [SP, #88]
0x3418C37C: 9215 STR R2, [SP, #84]
0x3418C37E: 9817 LDR R0, [SP, #92]
0x3418C380: 1D01 ADDS R1, R0, #4
0x3418C382: A801 ADD R0, SP, #4
0x3418C384: 224C MOVS R2, #76
0x3418C386: F000 FACA BL __aeabi_memcpy4 ; 0x3418C91E
0x3418C38A: 9817 LDR R0, [SP, #92]
0x3418C38C: F890 0050 LDRB.W R0, [R0, #80]
0x3418C390: 9905 LDR R1, [SP, #20]
0x3418C392: 229F MOVS R2, #159
0x3418C394: F7FF FFC2 BL XSPI_FormatCommand ; 0x3418C31C
0x3418C398: 9003 STR R0, [SP, #12]
0x3418C39A: 9815 LDR R0, [SP, #84]
0x3418C39C: 9010 STR R0, [SP, #64]
0x3418C39E: 9804 LDR R0, [SP, #16]
0x3418C3A0: 2801 CMP R0, #1
0x3418C3A2: D106 BNE 46L1 ; 0x3418C3B2
0x3418C3A4: 2000 MOVS R0, #0
0x3418C3A6: 9008 STR R0, [SP, #32]
0x3418C3A8: 9012 STR R0, [SP, #72]
0x3418C3AA: F04F 7080 MOV.W R0, #0x01000000
0x3418C3AE: 900F STR R0, [SP, #60]
0x3418C3B0: E00D B 46L3 ; 0x3418C3CE
.L1:
0x3418C3B2: 9804 LDR R0, [SP, #16]
0x3418C3B4: 2803 CMP R0, #3
0x3418C3B6: D106 BNE 46L2 ; 0x3418C3C6
0x3418C3B8: 2000 MOVS R0, #0
0x3418C3BA: 9008 STR R0, [SP, #32]
0x3418C3BC: 9012 STR R0, [SP, #72]
0x3418C3BE: F04F 7040 MOV.W R0, #0x03000000
0x3418C3C2: 900F STR R0, [SP, #60]
0x3418C3C4: E003 B 46L3 ; 0x3418C3CE
.L2:
0x3418C3C6: 2000 MOVS R0, #0
0x3418C3C8: 9007 STR R0, [SP, #28]
0x3418C3CA: 2008 MOVS R0, #8
0x3418C3CC: 9012 STR R0, [SP, #72]
.L3:
0x3418C3CE: 9817 LDR R0, [SP, #92]
0x3418C3D0: 6800 LDR R0, [R0]
0x3418C3D2: A901 ADD R1, SP, #4
0x3418C3D4: 2264 MOVS R2, #100
0x3418C3D6: F004 FC9D BL HAL_XSPI_Command ; 0x34190D14
0x3418C3DA: F88D 0053 STRB.W R0, [SP, #83]
0x3418C3DE: F89D 0053 LDRB.W R0, [SP, #83]
0x3418C3E2: B100 CBZ R0, .L4 ; 0x3418C3E6
0x3418C3E4: E007 B 46L5 ; 0x3418C3F6
.L4:
0x3418C3E6: 9817 LDR R0, [SP, #92]
0x3418C3E8: 6800 LDR R0, [R0]
0x3418C3EA: 9916 LDR R1, [SP, #88]
0x3418C3EC: 2264 MOVS R2, #100
0x3418C3EE: F7FE FCBF BL HAL_XSPI_Receive ; 0x3418AD70
0x3418C3F2: F88D 0053 STRB.W R0, [SP, #83]
.L5:
0x3418C3F6: F89D 0053 LDRB.W R0, [SP, #83]
0x3418C3FA: B118 CBZ R0, .L6 ; 0x3418C404
0x3418C3FC: 9817 LDR R0, [SP, #92]
0x3418C3FE: 6800 LDR R0, [R0]
0x3418C400: F005 F896 BL HAL_XSPI_Abort ; 0x34191530
.L6:
0x3418C404: F89D 0053 LDRB.W R0, [SP, #83]
0x3418C408: B018 ADD SP, SP, #96
0x3418C40A: BD80 POP 123R7, PC}
Section .text.XSPI_Transmit from blto2_FSBL_lto.o, size=32, align=4
XSPI_Transmit:
0x3418C40C: B580 PUSH 123R7, LR}
0x3418C40E: B084 SUB SP, SP, #16
0x3418C410: 9003 STR R0, [SP, #12]
0x3418C412: 9102 STR R1, [SP, #8]
0x3418C414: 9803 LDR R0, [SP, #12]
0x3418C416: 6800 LDR R0, [R0]
0x3418C418: 9902 LDR R1, [SP, #8]
0x3418C41A: 2264 MOVS R2, #100
0x3418C41C: F004 FEA4 BL HAL_XSPI_Transmit ; 0x34191168
0x3418C420: F88D 0007 STRB.W R0, [SP, #7]
0x3418C424: F89D 0007 LDRB.W R0, [SP, #7]
0x3418C428: B004 ADD SP, SP, #16
0x3418C42A: BD80 POP 123R7, PC}
Section .text.SAL_XSPI_CommandSendData from blto2_FSBL_lto.o, size=136, align=4
SAL_XSPI_CommandSendData:
0x3418C42C: B580 PUSH 123R7, LR}
0x3418C42E: B098 SUB SP, SP, #96
0x3418C430: 9017 STR R0, [SP, #92]
0x3418C432: F88D 105B STRB.W R1, [SP, #91]
0x3418C436: 9215 STR R2, [SP, #84]
0x3418C438: F8AD 3052 STRH.W R3, [SP, #82]
0x3418C43C: 9817 LDR R0, [SP, #92]
0x3418C43E: 1D01 ADDS R1, R0, #4
0x3418C440: A801 ADD R0, SP, #4
0x3418C442: 224C MOVS R2, #76
0x3418C444: F000 FA6B BL __aeabi_memcpy4 ; 0x3418C91E
0x3418C448: 9817 LDR R0, [SP, #92]
0x3418C44A: F890 0050 LDRB.W R0, [R0, #80]
0x3418C44E: 9905 LDR R1, [SP, #20]
0x3418C450: F89D 205B LDRB.W R2, [SP, #91]
0x3418C454: F7FF FF62 BL XSPI_FormatCommand ; 0x3418C31C
0x3418C458: 9003 STR R0, [SP, #12]
0x3418C45A: 2000 MOVS R0, #0
0x3418C45C: 9008 STR R0, [SP, #32]
0x3418C45E: 9012 STR R0, [SP, #72]
0x3418C460: F8BD 1052 LDRH.W R1, [SP, #82]
0x3418C464: 9110 STR R1, [SP, #64]
0x3418C466: 9013 STR R0, [SP, #76]
0x3418C468: F8BD 0052 LDRH.W R0, [SP, #82]
0x3418C46C: B908 CBNZ R0, .L1 ; 0x3418C472
0x3418C46E: 2000 MOVS R0, #0
0x3418C470: 900F STR R0, [SP, #60]
.L1:
0x3418C472: 9817 LDR R0, [SP, #92]
0x3418C474: 6800 LDR R0, [R0]
0x3418C476: A901 ADD R1, SP, #4
0x3418C478: 2264 MOVS R2, #100
0x3418C47A: F004 FC4B BL HAL_XSPI_Command ; 0x34190D14
0x3418C47E: F88D 0003 STRB.W R0, [SP, #3]
0x3418C482: F89D 0003 LDRB.W R0, [SP, #3]
0x3418C486: B950 CBNZ R0, .L2 ; 0x3418C49E
0x3418C488: F8BD 0052 LDRH.W R0, [SP, #82]
0x3418C48C: B138 CBZ R0, .L2 ; 0x3418C49E
0x3418C48E: 9817 LDR R0, [SP, #92]
0x3418C490: 6800 LDR R0, [R0]
0x3418C492: 9915 LDR R1, [SP, #84]
0x3418C494: 2264 MOVS R2, #100
0x3418C496: F004 FE67 BL HAL_XSPI_Transmit ; 0x34191168
0x3418C49A: F88D 0003 STRB.W R0, [SP, #3]
.L2:
0x3418C49E: F89D 0003 LDRB.W R0, [SP, #3]
0x3418C4A2: B118 CBZ R0, .L3 ; 0x3418C4AC
0x3418C4A4: 9817 LDR R0, [SP, #92]
0x3418C4A6: 6800 LDR R0, [R0]
0x3418C4A8: F005 F842 BL HAL_XSPI_Abort ; 0x34191530
.L3:
0x3418C4AC: F89D 0003 LDRB.W R0, [SP, #3]
0x3418C4B0: B018 ADD SP, SP, #96
0x3418C4B2: BD80 POP 123R7, PC}
Section .text.SAL_XSPI_SendReadCommand from blto2_FSBL_lto.o, size=136, align=4
SAL_XSPI_SendReadCommand:
0x3418C4B4: B580 PUSH 123R7, LR}
0x3418C4B6: B098 SUB SP, SP, #96
0x3418C4B8: 9017 STR R0, [SP, #92]
0x3418C4BA: F88D 105B STRB.W R1, [SP, #91]
0x3418C4BE: 9215 STR R2, [SP, #84]
0x3418C4C0: F8AD 3052 STRH.W R3, [SP, #82]
0x3418C4C4: 9817 LDR R0, [SP, #92]
0x3418C4C6: 1D01 ADDS R1, R0, #4
0x3418C4C8: A801 ADD R0, SP, #4
0x3418C4CA: 224C MOVS R2, #76
0x3418C4CC: F000 FA27 BL __aeabi_memcpy4 ; 0x3418C91E
0x3418C4D0: 9817 LDR R0, [SP, #92]
0x3418C4D2: F890 0050 LDRB.W R0, [R0, #80]
0x3418C4D6: 9905 LDR R1, [SP, #20]
0x3418C4D8: F89D 205B LDRB.W R2, [SP, #91]
0x3418C4DC: F7FF FF1E BL XSPI_FormatCommand ; 0x3418C31C
0x3418C4E0: 9003 STR R0, [SP, #12]
0x3418C4E2: 2000 MOVS R0, #0
0x3418C4E4: 9008 STR R0, [SP, #32]
0x3418C4E6: 9012 STR R0, [SP, #72]
0x3418C4E8: F8BD 1052 LDRH.W R1, [SP, #82]
0x3418C4EC: 9110 STR R1, [SP, #64]
0x3418C4EE: 9013 STR R0, [SP, #76]
0x3418C4F0: F8BD 0052 LDRH.W R0, [SP, #82]
0x3418C4F4: B908 CBNZ R0, .L1 ; 0x3418C4FA
0x3418C4F6: 2000 MOVS R0, #0
0x3418C4F8: 900F STR R0, [SP, #60]
.L1:
0x3418C4FA: 9817 LDR R0, [SP, #92]
0x3418C4FC: 6800 LDR R0, [R0]
0x3418C4FE: A901 ADD R1, SP, #4
0x3418C500: 2264 MOVS R2, #100
0x3418C502: F004 FC07 BL HAL_XSPI_Command ; 0x34190D14
0x3418C506: F88D 0003 STRB.W R0, [SP, #3]
0x3418C50A: F89D 0003 LDRB.W R0, [SP, #3]
0x3418C50E: B950 CBNZ R0, .L2 ; 0x3418C526
0x3418C510: F8BD 0052 LDRH.W R0, [SP, #82]
0x3418C514: B138 CBZ R0, .L2 ; 0x3418C526
0x3418C516: 9817 LDR R0, [SP, #92]
0x3418C518: 6800 LDR R0, [R0]
0x3418C51A: 9915 LDR R1, [SP, #84]
0x3418C51C: 2264 MOVS R2, #100
0x3418C51E: F7FE FC27 BL HAL_XSPI_Receive ; 0x3418AD70
0x3418C522: F88D 0003 STRB.W R0, [SP, #3]
.L2:
0x3418C526: F89D 0003 LDRB.W R0, [SP, #3]
0x3418C52A: B118 CBZ R0, .L3 ; 0x3418C534
0x3418C52C: 9817 LDR R0, [SP, #92]
0x3418C52E: 6800 LDR R0, [R0]
0x3418C530: F004 FFFE BL HAL_XSPI_Abort ; 0x34191530
.L3:
0x3418C534: F89D 0003 LDRB.W R0, [SP, #3]
0x3418C538: B018 ADD SP, SP, #96
0x3418C53A: BD80 POP 123R7, PC}
Section .text.SAL_XSPI_CheckStatusRegister from blto2_FSBL_lto.o, size=232, align=4
SAL_XSPI_CheckStatusRegister:
0x3418C53C: B510 PUSH 123R4, LR}
0x3418C53E: B09E SUB SP, SP, #120
0x3418C540: 468C MOV R12, R1
0x3418C542: 4686 MOV LR, R0
0x3418C544: 9822 LDR R0, [SP, #136]
0x3418C546: 9821 LDR R0, [SP, #132]
0x3418C548: 9920 LDR R1, [SP, #128]
0x3418C54A: F8CD E074 STR.W LR, [SP, #116]
0x3418C54E: F88D C073 STRB.W R12, [SP, #115]
0x3418C552: 921B STR R2, [SP, #108]
0x3418C554: F88D 306B STRB.W R3, [SP, #107]
0x3418C558: F88D 106A STRB.W R1, [SP, #106]
0x3418C55C: F88D 0069 STRB.W R0, [SP, #105]
0x3418C560: 981D LDR R0, [SP, #116]
0x3418C562: 1D01 ADDS R1, R0, #4
0x3418C564: A807 ADD R0, SP, #28
0x3418C566: 224C MOVS R2, #76
0x3418C568: F000 F9D9 BL __aeabi_memcpy4 ; 0x3418C91E
0x3418C56C: F89D 006B LDRB.W R0, [SP, #107]
0x3418C570: 9002 STR R0, [SP, #8]
0x3418C572: F89D 006A LDRB.W R0, [SP, #106]
0x3418C576: 9003 STR R0, [SP, #12]
0x3418C578: 2000 MOVS R0, #0
0x3418C57A: 9000 STR R0, [SP, #0]
0x3418C57C: 9004 STR R0, [SP, #16]
0x3418C57E: F44F 0080 MOV.W R0, #0x400000
0x3418C582: 9005 STR R0, [SP, #20]
0x3418C584: 2010 MOVS R0, #16
0x3418C586: 9006 STR R0, [SP, #24]
0x3418C588: 981D LDR R0, [SP, #116]
0x3418C58A: F890 0050 LDRB.W R0, [R0, #80]
0x3418C58E: 990B LDR R1, [SP, #44]
0x3418C590: F89D 2073 LDRB.W R2, [SP, #115]
0x3418C594: F7FF FEC2 BL XSPI_FormatCommand ; 0x3418C31C
0x3418C598: 4601 MOV R1, R0
0x3418C59A: 9800 LDR R0, [SP, #0]
0x3418C59C: 9109 STR R1, [SP, #36]
0x3418C59E: 2101 MOVS R1, #1
0x3418C5A0: 9116 STR R1, [SP, #88]
0x3418C5A2: 9019 STR R0, [SP, #100]
0x3418C5A4: 980A LDR R0, [SP, #40]
0x3418C5A6: 2801 CMP R0, #1
0x3418C5A8: D105 BNE 46L1 ; 0x3418C5B6
0x3418C5AA: F04F 7080 MOV.W R0, #0x01000000
0x3418C5AE: 9015 STR R0, [SP, #84]
0x3418C5B0: 2000 MOVS R0, #0
0x3418C5B2: 900E STR R0, [SP, #56]
0x3418C5B4: 9018 STR R0, [SP, #96]
.L1:
0x3418C5B6: 9815 LDR R0, [SP, #84]
0x3418C5B8: F1B0 6F80 CMP.W R0, #0x04000000
0x3418C5BC: D114 BNE 46L3 ; 0x3418C5E8
0x3418C5BE: F89D 0069 LDRB.W R0, [SP, #105]
0x3418C5C2: 28C2 CMP R0, #194
0x3418C5C4: D108 BNE 46L2 ; 0x3418C5D8
0x3418C5C6: 9817 LDR R0, [SP, #92]
0x3418C5C8: F1B0 6F00 CMP.W R0, #0x08000000
0x3418C5CC: D104 BNE 46L2 ; 0x3418C5D8
0x3418C5CE: F04F 5000 MOV.W R0, #0x20000000
0x3418C5D2: 9019 STR R0, [SP, #100]
0x3418C5D4: 2000 MOVS R0, #0
0x3418C5D6: 9017 STR R0, [SP, #92]
.L2:
0x3418C5D8: F44F 6080 MOV.W R0, #0x0400
0x3418C5DC: 900E STR R0, [SP, #56]
0x3418C5DE: F44F 5040 MOV.W R0, #0x3000
0x3418C5E2: 900F STR R0, [SP, #60]
0x3418C5E4: 981B LDR R0, [SP, #108]
0x3418C5E6: 900D STR R0, [SP, #52]
.L3:
0x3418C5E8: 981D LDR R0, [SP, #116]
0x3418C5EA: 6800 LDR R0, [R0]
0x3418C5EC: A907 ADD R1, SP, #28
0x3418C5EE: 2264 MOVS R2, #100
0x3418C5F0: F004 FB90 BL HAL_XSPI_Command ; 0x34190D14
0x3418C5F4: F88D 0007 STRB.W R0, [SP, #7]
0x3418C5F8: F89D 0007 LDRB.W R0, [SP, #7]
0x3418C5FC: B938 CBNZ R0, .L4 ; 0x3418C60E
0x3418C5FE: 981D LDR R0, [SP, #116]
0x3418C600: 6800 LDR R0, [R0]
0x3418C602: 9A22 LDR R2, [SP, #136]
0x3418C604: A902 ADD R1, SP, #8
0x3418C606: F004 FE21 BL HAL_XSPI_AutoPolling ; 0x3419124C
0x3418C60A: F88D 0007 STRB.W R0, [SP, #7]
.L4:
0x3418C60E: F89D 0007 LDRB.W R0, [SP, #7]
0x3418C612: B118 CBZ R0, .L5 ; 0x3418C61C
0x3418C614: 981D LDR R0, [SP, #116]
0x3418C616: 6800 LDR R0, [R0]
0x3418C618: F004 FF8A BL HAL_XSPI_Abort ; 0x34191530
.L5:
0x3418C61C: F89D 0007 LDRB.W R0, [SP, #7]
0x3418C620: B01E ADD SP, SP, #120
0x3418C622: BD10 POP 123R4, PC}
Section .text.SAL_XSPI_EnableMapMode from blto2_FSBL_lto.o, size=200, align=4
SAL_XSPI_EnableMapMode:
0x3418C624: B580 PUSH 123R7, LR}
0x3418C626: B09C SUB SP, SP, #112
0x3418C628: 4684 MOV R12, R0
0x3418C62A: 981E LDR R0, [SP, #120]
0x3418C62C: F8CD C06C STR.W R12, [SP, #108]
0x3418C630: F88D 106B STRB.W R1, [SP, #107]
0x3418C634: F88D 206A STRB.W R2, [SP, #106]
0x3418C638: F88D 3069 STRB.W R3, [SP, #105]
0x3418C63C: F88D 0068 STRB.W R0, [SP, #104]
0x3418C640: 981B LDR R0, [SP, #108]
0x3418C642: 1D01 ADDS R1, R0, #4
0x3418C644: A806 ADD R0, SP, #24
0x3418C646: 9001 STR R0, [SP, #4]
0x3418C648: 224C MOVS R2, #76
0x3418C64A: F000 F968 BL __aeabi_memcpy4 ; 0x3418C91E
0x3418C64E: 2000 MOVS R0, #0
0x3418C650: 9005 STR R0, [SP, #20]
0x3418C652: 9004 STR R0, [SP, #16]
0x3418C654: 9003 STR R0, [SP, #12]
0x3418C656: 9002 STR R0, [SP, #8]
0x3418C658: 2001 MOVS R0, #1
0x3418C65A: 9006 STR R0, [SP, #24]
0x3418C65C: 981B LDR R0, [SP, #108]
0x3418C65E: F890 0050 LDRB.W R0, [R0, #80]
0x3418C662: 990A LDR R1, [SP, #40]
0x3418C664: F89D 206B LDRB.W R2, [SP, #107]
0x3418C668: F7FF FE58 BL XSPI_FormatCommand ; 0x3418C31C
0x3418C66C: 9901 LDR R1, [SP, #4]
0x3418C66E: 9008 STR R0, [SP, #32]
0x3418C670: F89D 006A LDRB.W R0, [SP, #106]
0x3418C674: 9017 STR R0, [SP, #92]
0x3418C676: 981B LDR R0, [SP, #108]
0x3418C678: 6800 LDR R0, [R0]
0x3418C67A: 2264 MOVS R2, #100
0x3418C67C: F004 FB4A BL HAL_XSPI_Command ; 0x34190D14
0x3418C680: F88D 0067 STRB.W R0, [SP, #103]
0x3418C684: F89D 0067 LDRB.W R0, [SP, #103]
0x3418C688: B100 CBZ R0, .L1 ; 0x3418C68C
0x3418C68A: E024 B 46L3 ; 0x3418C6D6
.L1:
0x3418C68C: 2002 MOVS R0, #2
0x3418C68E: 9006 STR R0, [SP, #24]
0x3418C690: 981B LDR R0, [SP, #108]
0x3418C692: F890 0050 LDRB.W R0, [R0, #80]
0x3418C696: 990A LDR R1, [SP, #40]
0x3418C698: F89D 2069 LDRB.W R2, [SP, #105]
0x3418C69C: F7FF FE3E BL XSPI_FormatCommand ; 0x3418C31C
0x3418C6A0: 9008 STR R0, [SP, #32]
0x3418C6A2: F89D 0068 LDRB.W R0, [SP, #104]
0x3418C6A6: 9017 STR R0, [SP, #92]
0x3418C6A8: 981B LDR R0, [SP, #108]
0x3418C6AA: 6800 LDR R0, [R0]
0x3418C6AC: A906 ADD R1, SP, #24
0x3418C6AE: 2264 MOVS R2, #100
0x3418C6B0: F004 FB30 BL HAL_XSPI_Command ; 0x34190D14
0x3418C6B4: F88D 0067 STRB.W R0, [SP, #103]
0x3418C6B8: F89D 0067 LDRB.W R0, [SP, #103]
0x3418C6BC: B100 CBZ R0, .L2 ; 0x3418C6C0
0x3418C6BE: E00A B 46L3 ; 0x3418C6D6
.L2:
0x3418C6C0: 2000 MOVS R0, #0
0x3418C6C2: 9002 STR R0, [SP, #8]
0x3418C6C4: 2050 MOVS R0, #80
0x3418C6C6: 9003 STR R0, [SP, #12]
0x3418C6C8: 981B LDR R0, [SP, #108]
0x3418C6CA: 6800 LDR R0, [R0]
0x3418C6CC: A902 ADD R1, SP, #8
0x3418C6CE: F004 FE89 BL HAL_XSPI_MemoryMapped ; 0x341913E4
0x3418C6D2: F88D 0067 STRB.W R0, [SP, #103]
.L3:
0x3418C6D6: F89D 0067 LDRB.W R0, [SP, #103]
0x3418C6DA: B118 CBZ R0, .L4 ; 0x3418C6E4
0x3418C6DC: 981B LDR R0, [SP, #108]
0x3418C6DE: 6800 LDR R0, [R0]
0x3418C6E0: F004 FF26 BL HAL_XSPI_Abort ; 0x34191530
.L4:
0x3418C6E4: F89D 0067 LDRB.W R0, [SP, #103]
0x3418C6E8: B01C ADD SP, SP, #112
0x3418C6EA: BD80 POP 123R7, PC}
Section .text.SAL_XSPI_UpdateMemoryType from blto2_FSBL_lto.o, size=116, align=4
SAL_XSPI_UpdateMemoryType:
0x3418C6EC: B084 SUB SP, SP, #16
0x3418C6EE: 9002 STR R0, [SP, #8]
0x3418C6F0: F88D 1007 STRB.W R1, [SP, #7]
0x3418C6F4: 2000 MOVS R0, #0
0x3418C6F6: F88D 0006 STRB.W R0, [SP, #6]
0x3418C6FA: 9802 LDR R0, [SP, #8]
0x3418C6FC: 6800 LDR R0, [R0]
0x3418C6FE: 6800 LDR R0, [R0]
0x3418C700: 6880 LDR R0, [R0, #8]
0x3418C702: F000 60E0 AND R0, R0, #0x07000000
0x3418C706: 9000 STR R0, [SP, #0]
0x3418C708: F89D 0007 LDRB.W R0, [SP, #7]
0x3418C70C: B9E0 CBNZ R0, .L4 ; 0x3418C748
0x3418C70E: 9800 LDR R0, [SP, #0]
0x3418C710: B918 CBNZ R0, .L1 ; 0x3418C71A
0x3418C712: F04F 7080 MOV.W R0, #0x01000000
0x3418C716: 9000 STR R0, [SP, #0]
0x3418C718: E009 B 46L3 ; 0x3418C72E
.L1:
0x3418C71A: 9800 LDR R0, [SP, #0]
0x3418C71C: F1B0 7F80 CMP.W R0, #0x01000000
0x3418C720: D102 BNE 46L2 ; 0x3418C728
0x3418C722: 2000 MOVS R0, #0
0x3418C724: 9000 STR R0, [SP, #0]
0x3418C726: E002 B 46L3 ; 0x3418C72E
.L2:
0x3418C728: 2001 MOVS R0, #1
0x3418C72A: F88D 0006 STRB.W R0, [SP, #6]
.L3:
0x3418C72E: 9802 LDR R0, [SP, #8]
0x3418C730: 6800 LDR R0, [R0]
0x3418C732: 6800 LDR R0, [R0]
0x3418C734: 6880 LDR R0, [R0, #8]
0x3418C736: F020 60E0 BIC R0, R0, #0x07000000
0x3418C73A: 9900 LDR R1, [SP, #0]
0x3418C73C: 4308 ORRS R0, R1
0x3418C73E: 9902 LDR R1, [SP, #8]
0x3418C740: 6809 LDR R1, [R1]
0x3418C742: 6809 LDR R1, [R1]
0x3418C744: 6088 STR R0, [R1, #8]
0x3418C746: E003 B 46L5 ; 0x3418C750
.L4:
0x3418C748: 2001 MOVS R0, #1
0x3418C74A: F88D 000F STRB.W R0, [SP, #15]
0x3418C74E: E003 B 46L6 ; 0x3418C758
.L5:
0x3418C750: F89D 0006 LDRB.W R0, [SP, #6]
0x3418C754: F88D 000F STRB.W R0, [SP, #15]
.L6:
0x3418C758: F89D 000F LDRB.W R0, [SP, #15]
0x3418C75C: B004 ADD SP, SP, #16
0x3418C75E: 4770 BX LR
Section .text.EXTMEM_MemoryMappedMode from blto2_FSBL_lto.o, size=140, align=4
EXTMEM_MemoryMappedMode:
0x3418C760: B580 PUSH 123R7, LR}
0x3418C762: B084 SUB SP, SP, #16
0x3418C764: 9002 STR R0, [SP, #8]
0x3418C766: F88D 1007 STRB.W R1, [SP, #7]
0x3418C76A: 20FB MOVS R0, #251
0x3418C76C: F88D 0006 STRB.W R0, [SP, #6]
0x3418C770: 9802 LDR R0, [SP, #8]
0x3418C772: BB98 CBNZ R0, .L5 ; 0x3418C7DC
0x3418C774: 2000 MOVS R0, #0
0x3418C776: F88D 0006 STRB.W R0, [SP, #6]
0x3418C77A: 9802 LDR R0, [SP, #8]
0x3418C77C: 21AC MOVS R1, #172
0x3418C77E: 4341 MULS R1, R0, R1
0x3418C780: F240 0000 MOVW R0, #0 ; 0x34000000 = extmem_list_config
0x3418C784: F2C3 4000 MOVT R0, #0x3400 ; 0x34000000 = extmem_list_config
0x3418C788: 5C40 LDRB R0, [R0, R1]
0x3418C78A: BB20 CBNZ R0, .L4 ; 0x3418C7D6
0x3418C78C: F89D 0007 LDRB.W R0, [SP, #7]
0x3418C790: B980 CBNZ R0, .L2 ; 0x3418C7B4
0x3418C792: 9802 LDR R0, [SP, #8]
0x3418C794: F240 0200 MOVW R2, #0 ; 0x34000000 = extmem_list_config
0x3418C798: F2C3 4200 MOVT R2, #0x3400 ; 0x34000000 = extmem_list_config
0x3418C79C: 21AC MOVS R1, #172
0x3418C79E: FB00 2001 MLA R0, R0, R1, R2
0x3418C7A2: 300C ADDS R0, #12
0x3418C7A4: F005 FE1A BL EXTMEM_DRIVER_NOR_SFDP_Enable_MemoryMappedMode ; 0x341923DC
0x3418C7A8: B118 CBZ R0, .L1 ; 0x3418C7B2
0x3418C7AA: 20FD MOVS R0, #253
0x3418C7AC: F88D 000F STRB.W R0, [SP, #15]
0x3418C7B0: E018 B 46L6 ; 0x3418C7E4
.L1:
0x3418C7B2: E00F B 46L3 ; 0x3418C7D4
.L2:
0x3418C7B4: 9802 LDR R0, [SP, #8]
0x3418C7B6: F240 0200 MOVW R2, #0 ; 0x34000000 = extmem_list_config
0x3418C7BA: F2C3 4200 MOVT R2, #0x3400 ; 0x34000000 = extmem_list_config
0x3418C7BE: 21AC MOVS R1, #172
0x3418C7C0: FB00 2001 MLA R0, R0, R1, R2
0x3418C7C4: 300C ADDS R0, #12
0x3418C7C6: F7FF FD5D BL EXTMEM_DRIVER_NOR_SFDP_Disable_MemoryMappedMode ; 0x3418C284
0x3418C7CA: B118 CBZ R0, .L3 ; 0x3418C7D4
0x3418C7CC: 20FD MOVS R0, #253
0x3418C7CE: F88D 000F STRB.W R0, [SP, #15]
0x3418C7D2: E007 B 46L6 ; 0x3418C7E4
.L3:
0x3418C7D4: E002 B 46L5 ; 0x3418C7DC
.L4:
0x3418C7D6: 20FE MOVS R0, #254
0x3418C7D8: F88D 0006 STRB.W R0, [SP, #6]
.L5:
0x3418C7DC: F89D 0006 LDRB.W R0, [SP, #6]
0x3418C7E0: F88D 000F STRB.W R0, [SP, #15]
.L6:
0x3418C7E4: F99D 000F LDRSB.W R0, [SP, #15]
0x3418C7E8: B004 ADD SP, SP, #16
0x3418C7EA: BD80 POP 123R7, PC}
Section .text.EXTMEM_GetMapAddress from blto2_FSBL_lto.o, size=196, align=4
EXTMEM_GetMapAddress:
0x3418C7EC: B083 SUB SP, SP, #12
0x3418C7EE: 9002 STR R0, [SP, #8]
0x3418C7F0: 9101 STR R1, [SP, #4]
0x3418C7F2: 20FB MOVS R0, #251
0x3418C7F4: F88D 0003 STRB.W R0, [SP, #3]
0x3418C7F8: 9802 LDR R0, [SP, #8]
0x3418C7FA: 2800 CMP R0, #0
0x3418C7FC: D154 BNE 46L7 ; 0x3418C8A8
0x3418C7FE: 2000 MOVS R0, #0
0x3418C800: F88D 0003 STRB.W R0, [SP, #3]
0x3418C804: 9802 LDR R0, [SP, #8]
0x3418C806: 21AC MOVS R1, #172
0x3418C808: 4341 MULS R1, R0, R1
0x3418C80A: F240 0000 MOVW R0, #0 ; 0x34000000 = extmem_list_config
0x3418C80E: F2C3 4000 MOVT R0, #0x3400 ; 0x34000000 = extmem_list_config
0x3418C812: 5C40 LDRB R0, [R0, R1]
0x3418C814: F010 0FFD TST R0, #253
0x3418C818: D000 BEQ 46L1 ; 0x3418C81C
0x3418C81A: E042 B 46L6 ; 0x3418C8A2
.L1:
0x3418C81C: 9802 LDR R0, [SP, #8]
0x3418C81E: F240 0200 MOVW R2, #0 ; 0x34000000 = extmem_list_config
0x3418C822: F2C3 4200 MOVT R2, #0x3400 ; 0x34000000 = extmem_list_config
0x3418C826: 21AC MOVS R1, #172
0x3418C828: FB00 2001 MLA R0, R0, R1, R2
0x3418C82C: 6840 LDR R0, [R0, #4]
0x3418C82E: 6800 LDR R0, [R0]
0x3418C830: F245 0100 MOVW R1, #0x5000
0x3418C834: F6C5 0102 MOVT R1, #0x5802
0x3418C838: 4288 CMP R0, R1
0x3418C83A: D104 BNE 46L2 ; 0x3418C846
0x3418C83C: 9901 LDR R1, [SP, #4]
0x3418C83E: F04F 4010 MOV.W R0, #0x90000000
0x3418C842: 6008 STR R0, [R1]
0x3418C844: E02C B 46L5 ; 0x3418C8A0
.L2:
0x3418C846: 9802 LDR R0, [SP, #8]
0x3418C848: F240 0200 MOVW R2, #0 ; 0x34000000 = extmem_list_config
0x3418C84C: F2C3 4200 MOVT R2, #0x3400 ; 0x34000000 = extmem_list_config
0x3418C850: 21AC MOVS R1, #172
0x3418C852: FB00 2001 MLA R0, R0, R1, R2
0x3418C856: 6840 LDR R0, [R0, #4]
0x3418C858: 6800 LDR R0, [R0]
0x3418C85A: F24A 0100 MOVW R1, #0xA000
0x3418C85E: F6C5 0102 MOVT R1, #0x5802
0x3418C862: 4288 CMP R0, R1
0x3418C864: D104 BNE 46L3 ; 0x3418C870
0x3418C866: 9901 LDR R1, [SP, #4]
0x3418C868: F04F 40E0 MOV.W R0, #0x70000000
0x3418C86C: 6008 STR R0, [R1]
0x3418C86E: E017 B 46L5 ; 0x3418C8A0
.L3:
0x3418C870: 9802 LDR R0, [SP, #8]
0x3418C872: F240 0200 MOVW R2, #0 ; 0x34000000 = extmem_list_config
0x3418C876: F2C3 4200 MOVT R2, #0x3400 ; 0x34000000 = extmem_list_config
0x3418C87A: 21AC MOVS R1, #172
0x3418C87C: FB00 2001 MLA R0, R0, R1, R2
0x3418C880: 6840 LDR R0, [R0, #4]
0x3418C882: 6800 LDR R0, [R0]
0x3418C884: F24D 0100 MOVW R1, #0xD000
0x3418C888: F6C5 0102 MOVT R1, #0x5802
0x3418C88C: 4288 CMP R0, R1
0x3418C88E: D104 BNE 46L4 ; 0x3418C89A
0x3418C890: 9901 LDR R1, [SP, #4]
0x3418C892: F04F 4000 MOV.W R0, #0x80000000
0x3418C896: 6008 STR R0, [R1]
0x3418C898: E002 B 46L5 ; 0x3418C8A0
.L4:
0x3418C89A: 20FD MOVS R0, #253
0x3418C89C: F88D 0003 STRB.W R0, [SP, #3]
.L5:
0x3418C8A0: E002 B 46L7 ; 0x3418C8A8
.L6:
0x3418C8A2: 20FE MOVS R0, #254
0x3418C8A4: F88D 0003 STRB.W R0, [SP, #3]
.L7:
0x3418C8A8: F99D 0003 LDRSB.W R0, [SP, #3]
0x3418C8AC: B003 ADD SP, SP, #12
0x3418C8AE: 4770 BX LR
Section .rodata.SFDP_BuildGenericDriver.chip_erase_unit from blto2_FSBL_lto.o, size=16, align=4
SFDP_BuildGenericDriver.chip_erase_unit:
0x3418C8B0: 10 DC.B 0x10 ; '\x10'
0x3418C8B1: 00 DC.B 0x00 ; '\0'
0x3418C8B2: 00 DC.B 0x00 ; '\0'
0x3418C8B3: 00 DC.B 0x00 ; '\0'
0x3418C8B4: 00 DC.B 0x00 ; '\0'
0x3418C8B5: 01 DC.B 0x01 ; '\x01'
0x3418C8B6: 00 DC.B 0x00 ; '\0'
0x3418C8B7: 00 DC.B 0x00 ; '\0'
0x3418C8B8: A0 DC.B 0xA0 ; '\xA0'
0x3418C8B9: 0F DC.B 0x0F ; '\x0F'
0x3418C8BA: 00 DC.B 0x00 ; '\0'
0x3418C8BB: 00 DC.B 0x00 ; '\0'
0x3418C8BC: 00 DC.B 0x00 ; '\0'
0x3418C8BD: FA DC.B 0xFA ; '\xFA'
0x3418C8BE: 00 DC.B 0x00 ; '\0'
0x3418C8BF: 00 DC.B 0x00 ; '\0'
Section .init._start from SEGGER_THUMB_Startup.o, size=20, align=4
_start:
0x3418C8C0: 4C03 LDR R4, =0x34192D9C ; [PC, #12] [0x3418C8D0]
.L1:
0x3418C8C2: 6820 LDR R0, [R4]
0x3418C8C4: 3404 ADDS R4, #4
0x3418C8C6: 4780 BLX R0
0x3418C8C8: E7FB B 46L1 ; 0x3418C8C2
__SEGGER_init_done:
__startup_complete:
0x3418C8CA: F000 F8BB BL main ; 0x3418CA44
exit:
0x3418C8CE: E7FE B exit ; 0x3418C8CE
0x3418C8D0: 34192D9C DC.W 34192D9C ; R_ARM_ABS32
Section .init.Reset_Handler from STM32N6xx_Startup.o, size=44, align=4
reset_handler:
Reset_Handler:
0x3418C8D4: 4909 LDR R1, =0x34062000 ; [PC, #36] [0x3418C8FC]
0x3418C8D6: F381 880A MSR MSPLIM, R1
0x3418C8DA: F04F 0100 MOV.W R1, #0
0x3418C8DE: F381 880B MSR PSPLIM, R1
0x3418C8E2: F000 FA3B BL SystemInit ; 0x3418CD5C
0x3418C8E6: F64E 5088 MOVW R0, #0xED88
0x3418C8EA: F2CE 0000 MOVT R0, #0xE000
0x3418C8EE: 6801 LDR R1, [R0]
0x3418C8F0: F451 0170 ORRS R1, R1, #0xF00000
0x3418C8F4: 6001 STR R1, [R0]
0x3418C8F6: F7FF FFE3 BL _start ; 0x3418C8C0
0x3418C8FA: 00 DC.B 0x00 ; '\0'
0x3418C8FB: 00 DC.B 0x00 ; '\0'
0x3418C8FC: 34062000 DC.W 34062000 ; R_ARM_ABS32
Section .text.libc.memcpy from strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=92, align=4
memcpy:
__aeabi_memcpy:
0x3418C900: B35A CBZ R2, .L9 ; 0x3418C95A
0x3418C902: 4684 MOV R12, R0
0x3418C904: EA90 0301 EORS.W R3, R0, R1
0x3418C908: 079B LSLS R3, R3, #30
0x3418C90A: D11F BNE 46L7 ; 0x3418C94C
.L1:
0x3418C90C: 0783 LSLS R3, R0, #30
0x3418C90E: D007 BEQ 46L2 ; 0x3418C920
0x3418C910: F811 3B01 LDRB R3, [R1], #1
0x3418C914: F800 3B01 STRB R3, [R0], #1
0x3418C918: 1E52 SUBS R2, R2, #1
0x3418C91A: D1F7 BNE 46L1 ; 0x3418C90C
0x3418C91C: E01C B 46L8 ; 0x3418C958
__aeabi_memcpy4:
__aeabi_memcpy8:
0x3418C91E: 4684 MOV R12, R0
.L2:
0x3418C920: 3A20 SUBS R2, #32
0x3418C922: D309 BCC 46L4 ; 0x3418C938
0x3418C924: E92D 07F0 PUSH.W 123R4-R10}
.L3:
0x3418C928: E8B1 07F8 LDM.W R1!, {R3-R10}
0x3418C92C: E8A0 07F8 STM.W R0!, {R3-R10}
0x3418C930: 3A20 SUBS R2, #32
0x3418C932: D2F9 BCS 46L3 ; 0x3418C928
0x3418C934: E8BD 07F0 POP.W 123R4-R10}
.L4:
0x3418C938: 321C ADDS R2, #28
0x3418C93A: D405 BMI 46L6 ; 0x3418C948
.L5:
0x3418C93C: F851 3B04 LDR R3, [R1], #4
0x3418C940: F840 3B04 STR R3, [R0], #4
0x3418C944: 1F12 SUBS R2, R2, #4
0x3418C946: D2F9 BCS 46L5 ; 0x3418C93C
.L6:
0x3418C948: 3204 ADDS R2, #4
0x3418C94A: D005 BEQ 46L8 ; 0x3418C958
.L7:
0x3418C94C: F811 3B01 LDRB R3, [R1], #1
0x3418C950: F800 3B01 STRB R3, [R0], #1
0x3418C954: 1E52 SUBS R2, R2, #1
0x3418C956: D1F9 BNE 46L7 ; 0x3418C94C
.L8:
0x3418C958: 4660 MOV R0, R12
.L9:
0x3418C95A: 4770 BX LR
Section .text.libc.__aeabi_memclr from strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=104, align=4
__aeabi_memclr:
__aeabi_memclr8:
__aeabi_memclr4:
0x3418C95C: 2200 MOVS R2, #0
__aeabi_memset8:
__aeabi_memset4:
__aeabi_memset:
0x3418C95E: 000B MOVS R3, R1
0x3418C960: 0011 MOVS R1, R2
0x3418C962: 001A MOVS R2, R3
memset:
0x3418C964: 4684 MOV R12, R0
0x3418C966: B35A CBZ R2, .L7 ; 0x3418C9C0
.L1:
0x3418C968: 0783 LSLS R3, R0, #30
0x3418C96A: D004 BEQ 46L2 ; 0x3418C976
0x3418C96C: F800 1B01 STRB R1, [R0], #1
0x3418C970: 1E52 SUBS R2, R2, #1
0x3418C972: D1F9 BNE 46L1 ; 0x3418C968
0x3418C974: E024 B 46L7 ; 0x3418C9C0
.L2:
0x3418C976: B2C9 UXTB R1, R1
0x3418C978: EA41 2101 ORR.W R1, R1, R1, LSL #8
0x3418C97C: EA41 4101 ORR.W R1, R1, R1, LSL #16
0x3418C980: 2A20 CMP R2, #32
0x3418C982: D311 BCC 46L4 ; 0x3418C9A8
0x3418C984: 3A20 SUBS R2, #32
0x3418C986: E92D 03F0 PUSH.W 123R4-R9}
0x3418C98A: 460B MOV R3, R1
0x3418C98C: 460C MOV R4, R1
0x3418C98E: 460D MOV R5, R1
0x3418C990: 460E MOV R6, R1
0x3418C992: 460F MOV R7, R1
0x3418C994: 4688 MOV R8, R1
0x3418C996: 4689 MOV R9, R1
.L3:
0x3418C998: E8A0 03FA STM.W R0!, {R1, R3-R9}
0x3418C99C: 3A20 SUBS R2, #32
0x3418C99E: D2FB BCS 46L3 ; 0x3418C998
0x3418C9A0: E8BD 03F0 POP.W 123R4-R9}
0x3418C9A4: 3220 ADDS R2, #32
0x3418C9A6: D00B BEQ 46L7 ; 0x3418C9C0
.L4:
0x3418C9A8: 2A04 CMP R2, #4
0x3418C9AA: D305 BCC 46L6 ; 0x3418C9B8
.L5:
0x3418C9AC: F840 1B04 STR R1, [R0], #4
0x3418C9B0: 1F12 SUBS R2, R2, #4
0x3418C9B2: D005 BEQ 46L7 ; 0x3418C9C0
0x3418C9B4: 2A04 CMP R2, #4
0x3418C9B6: D2F9 BCS 46L5 ; 0x3418C9AC
.L6:
0x3418C9B8: F800 1B01 STRB R1, [R0], #1
0x3418C9BC: 1E52 SUBS R2, R2, #1
0x3418C9BE: D1FB BNE 46L6 ; 0x3418C9B8
.L7:
0x3418C9C0: 4660 MOV R0, R12
0x3418C9C2: 4770 BX LR
Section .text.MX_BSEC_Init from blto2_FSBL_lto.o, size=2, align=4
MX_BSEC_Init:
0x3418C9C4: 4770 BX LR
Section .rodata..L__const.sfdp_getfrequencevalue.freqMhz_table from blto2_FSBL_lto.o, size=26, align=2
0x3418C9C6: 00 DC.B 0x00 ; '\0'
0x3418C9C7: 00 DC.B 0x00 ; '\0'
0x3418C9C8: 21 DC.B 0x21 ; '!'
0x3418C9C9: 00 DC.B 0x00 ; '\0'
0x3418C9CA: 32 DC.B 0x32 ; '2'
0x3418C9CB: 00 DC.B 0x00 ; '\0'
0x3418C9CC: 42 DC.B 0x42 ; 'B'
0x3418C9CD: 00 DC.B 0x00 ; '\0'
0x3418C9CE: 50 DC.B 0x50 ; 'P'
0x3418C9CF: 00 DC.B 0x00 ; '\0'
0x3418C9D0: 64 DC.B 0x64 ; 'd'
0x3418C9D1: 00 DC.B 0x00 ; '\0'
0x3418C9D2: 85 DC.B 0x85 ; '\x85'
0x3418C9D3: 00 DC.B 0x00 ; '\0'
0x3418C9D4: A6 DC.B 0xA6 ; '\xA6'
0x3418C9D5: 00 DC.B 0x00 ; '\0'
0x3418C9D6: C8 DC.B 0xC8 ; '\xC8'
0x3418C9D7: 00 DC.B 0x00 ; '\0'
0x3418C9D8: FA DC.B 0xFA ; '\xFA'
0x3418C9D9: 00 DC.B 0x00 ; '\0'
0x3418C9DA: 0A DC.B 0x0A ; '\n'
0x3418C9DB: 01 DC.B 0x01 ; '\x01'
0x3418C9DC: 4D DC.B 0x4D ; 'M'
0x3418C9DD: 01 DC.B 0x01 ; '\x01'
0x3418C9DE: 90 DC.B 0x90 ; '\x90'
0x3418C9DF: 01 DC.B 0x01 ; '\x01'
Section .text.MX_EXTMEM_MANAGER_Init from blto2_FSBL_lto.o, size=62, align=4
MX_EXTMEM_MANAGER_Init:
0x3418C9E0: B580 PUSH 123R7, LR}
0x3418C9E2: B082 SUB SP, SP, #8
0x3418C9E4: F240 0000 MOVW R0, #0 ; 0x34000000 = extmem_list_config
0x3418C9E8: F2C3 4000 MOVT R0, #0x3400 ; 0x34000000 = extmem_list_config
0x3418C9EC: 9000 STR R0, [SP, #0]
0x3418C9EE: 21AC MOVS R1, #172
0x3418C9F0: F7FF FFB4 BL __aeabi_memclr ; 0x3418C95C
0x3418C9F4: 9A00 LDR R2, [SP, #0]
0x3418C9F6: 2000 MOVS R0, #0
0x3418C9F8: 9001 STR R0, [SP, #4]
0x3418C9FA: 7010 STRB R0, [R2]
0x3418C9FC: F240 1194 MOVW R1, #0x0194 ; 0x34000194 = hxspi2
0x3418CA00: F2C3 4100 MOVT R1, #0x3400 ; 0x34000194 = hxspi2
0x3418CA04: 6051 STR R1, [R2, #4]
0x3418CA06: 2103 MOVS R1, #3
0x3418CA08: 7211 STRB R1, [R2, #8]
0x3418CA0A: F44F 0100 MOV.W R1, #0x800000
0x3418CA0E: F002 FD49 BL HAL_RCCEx_GetPeriphCLKFreq ; 0x3418F4A4
0x3418CA12: 4601 MOV R1, R0
0x3418CA14: 9801 LDR R0, [SP, #4]
0x3418CA16: F005 FFA5 BL EXTMEM_Init ; 0x34192964
0x3418CA1A: B002 ADD SP, SP, #8
0x3418CA1C: BD80 POP 123R7, PC}
Section .init.PVD_PVM_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
PVD_PVM_IRQHandler:
0x3418CA1E: E7FE B PVD_PVM_IRQHandler ; 0x3418CA1E
Section .text.LL_AHB4_GRP1_EnableClock from blto2_FSBL_lto.o, size=34, align=4
LL_AHB4_GRP1_EnableClock:
0x3418CA20: B082 SUB SP, SP, #8
0x3418CA22: 9001 STR R0, [SP, #4]
0x3418CA24: 9801 LDR R0, [SP, #4]
0x3418CA26: F648 215C MOVW R1, #0x8A5C
0x3418CA2A: F2C5 6102 MOVT R1, #0x5602
0x3418CA2E: 6008 STR R0, [R1]
0x3418CA30: F248 205C MOVW R0, #0x825C
0x3418CA34: F2C5 6002 MOVT R0, #0x5602
0x3418CA38: 6800 LDR R0, [R0]
0x3418CA3A: 9000 STR R0, [SP, #0]
0x3418CA3C: 9800 LDR R0, [SP, #0]
0x3418CA3E: B002 ADD SP, SP, #8
0x3418CA40: 4770 BX LR
Section .init.DTS_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
DTS_IRQHandler:
0x3418CA42: E7FE B DTS_IRQHandler ; 0x3418CA42
Section .text.main from blto2_FSBL_lto.o, size=326, align=4
main:
0x3418CA44: B580 PUSH 123R7, LR}
0x3418CA46: B088 SUB SP, SP, #32
0x3418CA48: 2000 MOVS R0, #0
0x3418CA4A: 9004 STR R0, [SP, #16]
0x3418CA4C: F64E 5014 MOVW R0, #0xED14
0x3418CA50: F2CE 0000 MOVT R0, #0xE000
0x3418CA54: 6800 LDR R0, [R0]
0x3418CA56: 0380 LSLS R0, R0, #14
0x3418CA58: 2800 CMP R0, #0
0x3418CA5A: D500 BPL 46L1 ; 0x3418CA5E
0x3418CA5C: E019 B 46L2 ; 0x3418CA92
.L1:
0x3418CA5E: F3BF 8F4F DSB SY
0x3418CA62: F3BF 8F6F ISB SY
0x3418CA66: F64E 7150 MOVW R1, #0xEF50
0x3418CA6A: F2CE 0100 MOVT R1, #0xE000
0x3418CA6E: 2000 MOVS R0, #0
0x3418CA70: 6008 STR R0, [R1]
0x3418CA72: F3BF 8F4F DSB SY
0x3418CA76: F3BF 8F6F ISB SY
0x3418CA7A: F64E 5114 MOVW R1, #0xED14
0x3418CA7E: F2CE 0100 MOVT R1, #0xE000
0x3418CA82: 6808 LDR R0, [R1]
0x3418CA84: F440 3000 ORR R0, R0, #0x020000
0x3418CA88: 6008 STR R0, [R1]
0x3418CA8A: F3BF 8F4F DSB SY
0x3418CA8E: F3BF 8F6F ISB SY
.L2:
0x3418CA92: F64E 5014 MOVW R0, #0xED14
0x3418CA96: F2CE 0000 MOVT R0, #0xE000
0x3418CA9A: 6800 LDR R0, [R0]
0x3418CA9C: 03C0 LSLS R0, R0, #15
0x3418CA9E: 2800 CMP R0, #0
0x3418CAA0: D500 BPL 46L3 ; 0x3418CAA4
0x3418CAA2: E039 B 46L8 ; 0x3418CB18
.L3:
0x3418CAA4: F64E 5184 MOVW R1, #0xED84
0x3418CAA8: F2CE 0100 MOVT R1, #0xE000
0x3418CAAC: 2000 MOVS R0, #0
0x3418CAAE: 6008 STR R0, [R1]
0x3418CAB0: F3BF 8F4F DSB SY
0x3418CAB4: F64E 5080 MOVW R0, #0xED80
0x3418CAB8: F2CE 0000 MOVT R0, #0xE000
0x3418CABC: 6800 LDR R0, [R0]
0x3418CABE: 9007 STR R0, [SP, #28]
0x3418CAC0: 9807 LDR R0, [SP, #28]
0x3418CAC2: F3C0 304E UBFX R0, R0, #13, #15
0x3418CAC6: 9006 STR R0, [SP, #24]
.L4:
0x3418CAC8: 9807 LDR R0, [SP, #28]
0x3418CACA: F3C0 00C9 UBFX R0, R0, #3, #10
0x3418CACE: 9005 STR R0, [SP, #20]
.L5:
0x3418CAD0: 9906 LDR R1, [SP, #24]
0x3418CAD2: 9805 LDR R0, [SP, #20]
0x3418CAD4: 0780 LSLS R0, R0, #30
0x3418CAD6: F361 104D BFI R0, R1, #5, #9
0x3418CADA: F64E 7160 MOVW R1, #0xEF60
0x3418CADE: F2CE 0100 MOVT R1, #0xE000
0x3418CAE2: 6008 STR R0, [R1]
0x3418CAE4: 9805 LDR R0, [SP, #20]
0x3418CAE6: 1E41 SUBS R1, R0, #1
0x3418CAE8: 9105 STR R1, [SP, #20]
0x3418CAEA: B108 CBZ R0, .L6 ; 0x3418CAF0
0x3418CAEC: F02F C011 LE 46L5 ; 0x3418CAD0
.L6:
0x3418CAF0: 9806 LDR R0, [SP, #24]
0x3418CAF2: 1E41 SUBS R1, R0, #1
0x3418CAF4: 9106 STR R1, [SP, #24]
0x3418CAF6: B108 CBZ R0, .L7 ; 0x3418CAFC
0x3418CAF8: F02F C01B LE 46L4 ; 0x3418CAC8
.L7:
0x3418CAFC: F3BF 8F4F DSB SY
0x3418CB00: F64E 5114 MOVW R1, #0xED14
0x3418CB04: F2CE 0100 MOVT R1, #0xE000
0x3418CB08: 6808 LDR R0, [R1]
0x3418CB0A: F440 3080 ORR R0, R0, #0x010000
0x3418CB0E: 6008 STR R0, [R1]
0x3418CB10: F3BF 8F4F DSB SY
0x3418CB14: F3BF 8F6F ISB SY
.L8:
0x3418CB18: F7F4 F88E BL HAL_Init ; 0x34180C38
0x3418CB1C: F000 F836 BL SystemClock_Config ; 0x3418CB8C
0x3418CB20: F000 F8AC BL OTP_Config ; 0x3418CC7C
0x3418CB24: B108 CBZ R0, .L9 ; 0x3418CB2A
0x3418CB26: F7F3 FE3D BL Error_Handler ; 0x341807A4
.L9:
0x3418CB2A: F7F3 FE0F BL MX_GPIO_Init ; 0x3418074C
0x3418CB2E: F000 FA15 BL MX_XSPI2_Init ; 0x3418CF5C
0x3418CB32: F7FF FF47 BL MX_BSEC_Init ; 0x3418C9C4
0x3418CB36: F7FF FF53 BL MX_EXTMEM_MANAGER_Init ; 0x3418C9E0
0x3418CB3A: 2000 MOVS R0, #0
0x3418CB3C: 9003 STR R0, [SP, #12]
.L10:
0x3418CB3E: 9803 LDR R0, [SP, #12]
0x3418CB40: F242 710F MOVW R1, #0x270F
0x3418CB44: 4288 CMP R0, R1
0x3418CB46: DC19 BGT 46L11 ; 0x3418CB7C
0x3418CB48: F641 0000 MOVW R0, #0x1800
0x3418CB4C: F2C5 6002 MOVT R0, #0x5602
0x3418CB50: 9000 STR R0, [SP, #0]
0x3418CB52: 2201 MOVS R2, #1
0x3418CB54: 9201 STR R2, [SP, #4]
0x3418CB56: 4611 MOV R1, R2
0x3418CB58: F000 FC7E BL HAL_GPIO_WritePin ; 0x3418D458
0x3418CB5C: 2019 MOVS R0, #25
0x3418CB5E: 9002 STR R0, [SP, #8]
0x3418CB60: F000 FAC0 BL HAL_Delay ; 0x3418D0E4
0x3418CB64: 9800 LDR R0, [SP, #0]
0x3418CB66: 9901 LDR R1, [SP, #4]
0x3418CB68: 2200 MOVS R2, #0
0x3418CB6A: F000 FC75 BL HAL_GPIO_WritePin ; 0x3418D458
0x3418CB6E: 9802 LDR R0, [SP, #8]
0x3418CB70: F000 FAB8 BL HAL_Delay ; 0x3418D0E4
0x3418CB74: 9803 LDR R0, [SP, #12]
0x3418CB76: 3001 ADDS R0, #1
0x3418CB78: 9003 STR R0, [SP, #12]
0x3418CB7A: E7E0 B 46L10 ; 0x3418CB3E
.L11:
0x3418CB7C: F004 FF76 BL BOOT_Application ; 0x34191A6C
0x3418CB80: B108 CBZ R0, .L12 ; 0x3418CB86
0x3418CB82: F7F3 FE0F BL Error_Handler ; 0x341807A4
.L12:
0x3418CB86: BF00 NOP
0x3418CB88: E7FD B 46L12 ; 0x3418CB86
Section .init.RCC_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
RCC_IRQHandler:
0x3418CB8A: E7FE B RCC_IRQHandler ; 0x3418CB8A
Section .text.SystemClock_Config from blto2_FSBL_lto.o, size=238, align=4
SystemClock_Config:
0x3418CB8C: B580 PUSH 123R7, LR}
0x3418CB8E: B0B8 SUB SP, SP, #224
0x3418CB90: A812 ADD R0, SP, #72
0x3418CB92: 2198 MOVS R1, #152
0x3418CB94: F7FF FEE2 BL __aeabi_memclr ; 0x3418C95C
0x3418CB98: A802 ADD R0, SP, #8
0x3418CB9A: 2140 MOVS R1, #64
0x3418CB9C: F7FF FEDE BL __aeabi_memclr ; 0x3418C95C
0x3418CBA0: 2000 MOVS R0, #0
0x3418CBA2: F000 FC8D BL HAL_PWREx_ConfigSupply ; 0x3418D4C0
0x3418CBA6: B108 CBZ R0, .L1 ; 0x3418CBAC
0x3418CBA8: F7F3 FDFC BL Error_Handler ; 0x341807A4
.L1:
0x3418CBAC: 2001 MOVS R0, #1
0x3418CBAE: F000 FCC1 BL HAL_PWREx_ControlVoltageScaling ; 0x3418D534
0x3418CBB2: B108 CBZ R0, .L2 ; 0x3418CBB8
0x3418CBB4: F7F3 FDF6 BL Error_Handler ; 0x341807A4
.L2:
0x3418CBB8: 2002 MOVS R0, #2
0x3418CBBA: 9012 STR R0, [SP, #72]
0x3418CBBC: 2008 MOVS R0, #8
0x3418CBBE: 9015 STR R0, [SP, #84]
0x3418CBC0: 2000 MOVS R0, #0
0x3418CBC2: 9016 STR R0, [SP, #88]
0x3418CBC4: 9017 STR R0, [SP, #92]
0x3418CBC6: 901C STR R0, [SP, #112]
0x3418CBC8: 9023 STR R0, [SP, #140]
0x3418CBCA: 902A STR R0, [SP, #168]
0x3418CBCC: 9031 STR R0, [SP, #196]
0x3418CBCE: A812 ADD R0, SP, #72
0x3418CBD0: F000 FD6E BL HAL_RCC_OscConfig ; 0x3418D6B0
0x3418CBD4: B108 CBZ R0, .L3 ; 0x3418CBDA
0x3418CBD6: F7F3 FDE5 BL Error_Handler ; 0x341807A4
.L3:
0x3418CBDA: A802 ADD R0, SP, #8
0x3418CBDC: F7F4 FEF4 BL HAL_RCC_GetClockConfig ; 0x341819C8
0x3418CBE0: 9803 LDR R0, [SP, #12]
0x3418CBE2: F5B0 3F40 CMP.W R0, #0x030000
0x3418CBE6: D003 BEQ 46L4 ; 0x3418CBF0
0x3418CBE8: 9804 LDR R0, [SP, #16]
0x3418CBEA: F1B0 7F40 CMP.W R0, #0x03000000
0x3418CBEE: D10A BNE 46L5 ; 0x3418CC06
.L4:
0x3418CBF0: 2003 MOVS R0, #3
0x3418CBF2: 9002 STR R0, [SP, #8]
0x3418CBF4: 2000 MOVS R0, #0
0x3418CBF6: 9003 STR R0, [SP, #12]
0x3418CBF8: 9004 STR R0, [SP, #16]
0x3418CBFA: A802 ADD R0, SP, #8
0x3418CBFC: F001 FD64 BL HAL_RCC_ClockConfig ; 0x3418E6C8
0x3418CC00: B108 CBZ R0, .L5 ; 0x3418CC06
0x3418CC02: F7F3 FDCF BL Error_Handler ; 0x341807A4
.L5:
0x3418CC06: 2000 MOVS R0, #0
0x3418CC08: 9012 STR R0, [SP, #72]
0x3418CC0A: 2102 MOVS R1, #2
0x3418CC0C: 911C STR R1, [SP, #112]
0x3418CC0E: 901D STR R0, [SP, #116]
0x3418CC10: 2104 MOVS R1, #4
0x3418CC12: 911E STR R1, [SP, #120]
0x3418CC14: 214B MOVS R1, #75
0x3418CC16: 9120 STR R1, [SP, #128]
0x3418CC18: 901F STR R0, [SP, #124]
0x3418CC1A: 2101 MOVS R1, #1
0x3418CC1C: 9121 STR R1, [SP, #132]
0x3418CC1E: 9122 STR R1, [SP, #136]
0x3418CC20: 9023 STR R0, [SP, #140]
0x3418CC22: 902A STR R0, [SP, #168]
0x3418CC24: 9031 STR R0, [SP, #196]
0x3418CC26: A812 ADD R0, SP, #72
0x3418CC28: F000 FD42 BL HAL_RCC_OscConfig ; 0x3418D6B0
0x3418CC2C: B108 CBZ R0, .L6 ; 0x3418CC32
0x3418CC2E: F7F3 FDB9 BL Error_Handler ; 0x341807A4
.L6:
0x3418CC32: 207F MOVS R0, #127
0x3418CC34: 9002 STR R0, [SP, #8]
0x3418CC36: F44F 3040 MOV.W R0, #0x030000
0x3418CC3A: 9003 STR R0, [SP, #12]
0x3418CC3C: F04F 7040 MOV.W R0, #0x03000000
0x3418CC40: 9004 STR R0, [SP, #16]
0x3418CC42: F44F 1080 MOV.W R0, #0x100000
0x3418CC46: 9005 STR R0, [SP, #20]
0x3418CC48: 2100 MOVS R1, #0
0x3418CC4A: 9101 STR R1, [SP, #4]
0x3418CC4C: 9106 STR R1, [SP, #24]
0x3418CC4E: 9107 STR R1, [SP, #28]
0x3418CC50: 9108 STR R1, [SP, #32]
0x3418CC52: 9109 STR R1, [SP, #36]
0x3418CC54: 910A STR R1, [SP, #40]
0x3418CC56: 2002 MOVS R0, #2
0x3418CC58: 900B STR R0, [SP, #44]
0x3418CC5A: 910C STR R1, [SP, #48]
0x3418CC5C: 2003 MOVS R0, #3
0x3418CC5E: 900D STR R0, [SP, #52]
0x3418CC60: 910E STR R1, [SP, #56]
0x3418CC62: 2204 MOVS R2, #4
0x3418CC64: 920F STR R2, [SP, #60]
0x3418CC66: 9110 STR R1, [SP, #64]
0x3418CC68: 9011 STR R0, [SP, #68]
0x3418CC6A: A802 ADD R0, SP, #8
0x3418CC6C: F001 FD2C BL HAL_RCC_ClockConfig ; 0x3418E6C8
0x3418CC70: B108 CBZ R0, .L7 ; 0x3418CC76
0x3418CC72: F7F3 FD97 BL Error_Handler ; 0x341807A4
.L7:
0x3418CC76: B038 ADD SP, SP, #224
0x3418CC78: BD80 POP 123R7, PC}
Section .init.LOCKUP_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
LOCKUP_IRQHandler:
0x3418CC7A: E7FE B LOCKUP_IRQHandler ; 0x3418CC7A
Section .text.OTP_Config from blto2_FSBL_lto.o, size=142, align=4
OTP_Config:
0x3418CC7C: B580 PUSH 123R7, LR}
0x3418CC7E: B086 SUB SP, SP, #24
0x3418CC80: 2000 MOVS R0, #0
0x3418CC82: 9000 STR R0, [SP, #0]
0x3418CC84: 2001 MOVS R0, #1
0x3418CC86: F000 F841 BL LL_APB4_GRP2_EnableClock ; 0x3418CD0C
0x3418CC8A: 2002 MOVS R0, #2
0x3418CC8C: F000 F83E BL LL_APB4_GRP2_EnableClock ; 0x3418CD0C
0x3418CC90: F249 0000 MOVW R0, #0x9000
0x3418CC94: F2C5 6000 MOVT R0, #0x5600
0x3418CC98: 9001 STR R0, [SP, #4]
0x3418CC9A: 207C MOVS R0, #124
0x3418CC9C: 9005 STR R0, [SP, #20]
0x3418CC9E: 9905 LDR R1, [SP, #20]
0x3418CCA0: A801 ADD R0, SP, #4
0x3418CCA2: AA03 ADD R2, SP, #12
0x3418CCA4: F7F3 FFE6 BL HAL_BSEC_OTP_Read ; 0x34180C74
0x3418CCA8: BB48 CBNZ R0, .L6 ; 0x3418CCFE
0x3418CCAA: F44F 4000 MOV.W R0, #0x8000
0x3418CCAE: 9004 STR R0, [SP, #16]
0x3418CCB0: 9803 LDR R0, [SP, #12]
0x3418CCB2: 43C0 MVNS R0, R0
0x3418CCB4: 9904 LDR R1, [SP, #16]
0x3418CCB6: 4208 TST R0, R1
0x3418CCB8: D020 BEQ 46L5 ; 0x3418CCFC
0x3418CCBA: 9904 LDR R1, [SP, #16]
0x3418CCBC: 9803 LDR R0, [SP, #12]
0x3418CCBE: 4308 ORRS R0, R1
0x3418CCC0: 9003 STR R0, [SP, #12]
0x3418CCC2: 9905 LDR R1, [SP, #20]
0x3418CCC4: 9A03 LDR R2, [SP, #12]
0x3418CCC6: A801 ADD R0, SP, #4
0x3418CCC8: 2300 MOVS R3, #0
0x3418CCCA: F000 FAB1 BL HAL_BSEC_OTP_Program ; 0x3418D230
0x3418CCCE: B990 CBNZ R0, .L4 ; 0x3418CCF6
0x3418CCD0: 9905 LDR R1, [SP, #20]
0x3418CCD2: A801 ADD R0, SP, #4
0x3418CCD4: AA03 ADD R2, SP, #12
0x3418CCD6: F7F3 FFCD BL HAL_BSEC_OTP_Read ; 0x34180C74
0x3418CCDA: B940 CBNZ R0, .L2 ; 0x3418CCEE
0x3418CCDC: 9803 LDR R0, [SP, #12]
0x3418CCDE: 43C0 MVNS R0, R0
0x3418CCE0: 9904 LDR R1, [SP, #16]
0x3418CCE2: 4208 TST R0, R1
0x3418CCE4: D002 BEQ 46L1 ; 0x3418CCEC
0x3418CCE6: F04F 30FF MOV.W R0, #0xFFFFFFFF
0x3418CCEA: 9000 STR R0, [SP, #0]
.L1:
0x3418CCEC: E002 B 46L3 ; 0x3418CCF4
.L2:
0x3418CCEE: F06F 0001 MVN R0, #1
0x3418CCF2: 9000 STR R0, [SP, #0]
.L3:
0x3418CCF4: E002 B 46L5 ; 0x3418CCFC
.L4:
0x3418CCF6: F06F 0002 MVN R0, #2
0x3418CCFA: 9000 STR R0, [SP, #0]
.L5:
0x3418CCFC: E002 B 46L7 ; 0x3418CD04
.L6:
0x3418CCFE: F06F 0003 MVN R0, #3
0x3418CD02: 9000 STR R0, [SP, #0]
.L7:
0x3418CD04: 9800 LDR R0, [SP, #0]
0x3418CD06: B006 ADD SP, SP, #24
0x3418CD08: BD80 POP 123R7, PC}
Section .init.CACHE_ECC_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
CACHE_ECC_IRQHandler:
0x3418CD0A: E7FE B CACHE_ECC_IRQHandler ; 0x3418CD0A
Section .text.LL_APB4_GRP2_EnableClock from blto2_FSBL_lto.o, size=34, align=4
LL_APB4_GRP2_EnableClock:
0x3418CD0C: B082 SUB SP, SP, #8
0x3418CD0E: 9001 STR R0, [SP, #4]
0x3418CD10: 9801 LDR R0, [SP, #4]
0x3418CD12: F648 2178 MOVW R1, #0x8A78
0x3418CD16: F2C5 6102 MOVT R1, #0x5602
0x3418CD1A: 6008 STR R0, [R1]
0x3418CD1C: F248 2078 MOVW R0, #0x8278
0x3418CD20: F2C5 6002 MOVT R0, #0x5602
0x3418CD24: 6800 LDR R0, [R0]
0x3418CD26: 9000 STR R0, [SP, #0]
0x3418CD28: 9800 LDR R0, [SP, #0]
0x3418CD2A: B002 ADD SP, SP, #8
0x3418CD2C: 4770 BX LR
Section .init.TCM_ECC_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
TCM_ECC_IRQHandler:
0x3418CD2E: E7FE B TCM_ECC_IRQHandler ; 0x3418CD2E
Section .text.assert_failed from blto2_FSBL_lto.o, size=10, align=4
assert_failed:
0x3418CD30: B082 SUB SP, SP, #8
0x3418CD32: 9001 STR R0, [SP, #4]
0x3418CD34: 9100 STR R1, [SP, #0]
0x3418CD36: B002 ADD SP, SP, #8
0x3418CD38: 4770 BX LR
Section .init.BCK_ECC_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
BCK_ECC_IRQHandler:
0x3418CD3A: E7FE B BCK_ECC_IRQHandler ; 0x3418CD3A
Section .text.NMI_Handler from blto2_FSBL_lto.o, size=2, align=4
NMI_Handler:
0x3418CD3C: E7FE B NMI_Handler ; 0x3418CD3C
Section .init.FPU_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
FPU_IRQHandler:
0x3418CD3E: E7FE B FPU_IRQHandler ; 0x3418CD3E
Section .text.HardFault_Handler from blto2_FSBL_lto.o, size=2, align=4
HardFault_Handler:
0x3418CD40: E7FE B HardFault_Handler ; 0x3418CD40
Section .init.RTC_S_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
RTC_S_IRQHandler:
0x3418CD42: E7FE B RTC_S_IRQHandler ; 0x3418CD42
Section .text.MemManage_Handler from blto2_FSBL_lto.o, size=2, align=4
MemManage_Handler:
0x3418CD44: E7FE B MemManage_Handler ; 0x3418CD44
Section .init.TAMP_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
TAMP_IRQHandler:
0x3418CD46: E7FE B TAMP_IRQHandler ; 0x3418CD46
Section .text.BusFault_Handler from blto2_FSBL_lto.o, size=2, align=4
BusFault_Handler:
0x3418CD48: E7FE B BusFault_Handler ; 0x3418CD48
Section .init.RIFSC_TAMPER_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
RIFSC_TAMPER_IRQHandler:
0x3418CD4A: E7FE B RIFSC_TAMPER_IRQHandler ; 0x3418CD4A
Section .text.UsageFault_Handler from blto2_FSBL_lto.o, size=2, align=4
UsageFault_Handler:
0x3418CD4C: E7FE B UsageFault_Handler ; 0x3418CD4C
Section .init.IAC_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
IAC_IRQHandler:
0x3418CD4E: E7FE B IAC_IRQHandler ; 0x3418CD4E
Section .text.SVC_Handler from blto2_FSBL_lto.o, size=2, align=4
SVC_Handler:
0x3418CD50: 4770 BX LR
Section .init.RCC_S_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
RCC_S_IRQHandler:
0x3418CD52: E7FE B RCC_S_IRQHandler ; 0x3418CD52
Section .text.DebugMon_Handler from blto2_FSBL_lto.o, size=2, align=4
DebugMon_Handler:
0x3418CD54: 4770 BX LR
Section .init.RTC_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
RTC_IRQHandler:
0x3418CD56: E7FE B RTC_IRQHandler ; 0x3418CD56
Section .text.PendSV_Handler from blto2_FSBL_lto.o, size=2, align=4
PendSV_Handler:
0x3418CD58: 4770 BX LR
Section .init.IWDG_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
IWDG_IRQHandler:
0x3418CD5A: E7FE B IWDG_IRQHandler ; 0x3418CD5A
Section .text.SystemInit from blto2_FSBL_lto.o, size=510, align=4
SystemInit:
0x3418CD5C: B510 PUSH 123R4, LR}
0x3418CD5E: F240 4000 MOVW R0, #0x0400 ; 0x34180400 = g_pfnVectors
0x3418CD62: F2C3 4018 MOVT R0, #0x3418 ; 0x34180400 = g_pfnVectors
0x3418CD66: F64E 5108 MOVW R1, #0xED08
0x3418CD6A: F2CE 0100 MOVT R1, #0xE000
0x3418CD6E: 6008 STR R0, [R1]
0x3418CD70: F648 2218 MOVW R2, #0x8A18
0x3418CD74: F2C5 6202 MOVT R2, #0x5602
0x3418CD78: 2001 MOVS R0, #1
0x3418CD7A: 6010 STR R0, [R2]
0x3418CD7C: F249 2218 MOVW R2, #0x9218
0x3418CD80: F2C5 6202 MOVT R2, #0x5602
0x3418CD84: 6010 STR R0, [R2]
0x3418CD86: F249 2258 MOVW R2, #0x9258
0x3418CD8A: F2C5 6202 MOVT R2, #0x5602
0x3418CD8E: 6010 STR R0, [R2]
0x3418CD90: F64E 54D8 MOVW R4, #0xEDD8
0x3418CD94: F2CE 0400 MOVT R4, #0xE000
0x3418CD98: 2200 MOVS R2, #0
0x3418CD9A: 6022 STR R2, [R4]
0x3418CD9C: F64E 5CDC MOVW R12, #0xEDDC
0x3418CDA0: F2CE 0C00 MOVT R12, #0xE000
0x3418CDA4: F8CC 2000 STR.W R2, [R12]
0x3418CDA8: F64E 53E0 MOVW R3, #0xEDE0
0x3418CDAC: F2CE 0300 MOVT R3, #0xE000
0x3418CDB0: 601A STR R2, [R3]
0x3418CDB2: 6020 STR R0, [R4]
0x3418CDB4: F8CC 2000 STR.W R2, [R12]
0x3418CDB8: 601A STR R2, [R3]
0x3418CDBA: F04F 0E02 MOV.W LR, #2
0x3418CDBE: F8C4 E000 STR.W LR, [R4]
0x3418CDC2: F8CC 2000 STR.W R2, [R12]
0x3418CDC6: 601A STR R2, [R3]
0x3418CDC8: F04F 0E03 MOV.W LR, #3
0x3418CDCC: F8C4 E000 STR.W LR, [R4]
0x3418CDD0: F8CC 2000 STR.W R2, [R12]
0x3418CDD4: 601A STR R2, [R3]
0x3418CDD6: F04F 0E04 MOV.W LR, #4
0x3418CDDA: F8C4 E000 STR.W LR, [R4]
0x3418CDDE: F8CC 2000 STR.W R2, [R12]
0x3418CDE2: 601A STR R2, [R3]
0x3418CDE4: F04F 0E05 MOV.W LR, #5
0x3418CDE8: F8C4 E000 STR.W LR, [R4]
0x3418CDEC: F8CC 2000 STR.W R2, [R12]
0x3418CDF0: 601A STR R2, [R3]
0x3418CDF2: F04F 0E06 MOV.W LR, #6
0x3418CDF6: F8C4 E000 STR.W LR, [R4]
0x3418CDFA: F8CC 2000 STR.W R2, [R12]
0x3418CDFE: 601A STR R2, [R3]
0x3418CE00: F04F 0E07 MOV.W LR, #7
0x3418CE04: F8C4 E000 STR.W LR, [R4]
0x3418CE08: F8CC 2000 STR.W R2, [R12]
0x3418CE0C: 601A STR R2, [R3]
0x3418CE0E: F648 2278 MOVW R2, #0x8A78
0x3418CE12: F2C5 6202 MOVT R2, #0x5602
0x3418CE16: 6010 STR R0, [R2]
0x3418CE18: F248 2378 MOVW R3, #0x8278
0x3418CE1C: F2C5 6302 MOVT R3, #0x5602
0x3418CE20: 681A LDR R2, [R3]
0x3418CE22: 680A LDR R2, [R1]
0x3418CE24: F248 0110 MOVW R1, #0x8010
0x3418CE28: F2C5 6100 MOVT R1, #0x5600
0x3418CE2C: 600A STR R2, [R1]
0x3418CE2E: F644 0C34 MOVW R12, #0x4834
0x3418CE32: F2C5 6C02 MOVT R12, #0x5602
0x3418CE36: F8DC 2000 LDR.W R2, [R12]
0x3418CE3A: F442 7280 ORR R2, R2, #0x0100
0x3418CE3E: F8CC 2000 STR.W R2, [R12]
0x3418CE42: F644 0C38 MOVW R12, #0x4838
0x3418CE46: F2C5 6C02 MOVT R12, #0x5602
0x3418CE4A: F8DC 2000 LDR.W R2, [R12]
0x3418CE4E: F442 7280 ORR R2, R2, #0x0100
0x3418CE52: F8CC 2000 STR.W R2, [R12]
0x3418CE56: F644 023C MOVW R2, #0x483C
0x3418CE5A: F2C5 6202 MOVT R2, #0x5602
0x3418CE5E: F8D2 C000 LDR.W R12, [R2]
0x3418CE62: F44C 7C40 ORR R12, R12, #0x0300
0x3418CE66: F8C2 C000 STR.W R12, [R2]
0x3418CE6A: F248 0E54 MOVW LR, #0x8054
0x3418CE6E: F2C5 6E00 MOVT LR, #0x5600
0x3418CE72: F240 2C87 MOVW R12, #0x0287
0x3418CE76: F8CE C000 STR.W R12, [LR]
0x3418CE7A: F248 0E5C MOVW LR, #0x805C
0x3418CE7E: F2C5 6E00 MOVT LR, #0x5600
0x3418CE82: F8CE C000 STR.W R12, [LR]
0x3418CE86: F248 0E44 MOVW LR, #0x8044
0x3418CE8A: F2C5 6E00 MOVT LR, #0x5600
0x3418CE8E: F8CE C000 STR.W R12, [LR]
0x3418CE92: F248 0E4C MOVW LR, #0x804C
0x3418CE96: F2C5 6E00 MOVT LR, #0x5600
0x3418CE9A: F8CE C000 STR.W R12, [LR]
0x3418CE9E: F248 0E64 MOVW LR, #0x8064
0x3418CEA2: F2C5 6E00 MOVT LR, #0x5600
0x3418CEA6: F8CE C000 STR.W R12, [LR]
0x3418CEAA: F8D2 C000 LDR.W R12, [R2]
0x3418CEAE: F44C 5C80 ORR R12, R12, #0x1000
0x3418CEB2: F8C2 C000 STR.W R12, [R2]
0x3418CEB6: F8D2 C000 LDR.W R12, [R2]
0x3418CEBA: F04C 0C10 ORR R12, R12, #16
0x3418CEBE: F8C2 C000 STR.W R12, [R2]
0x3418CEC2: 6812 LDR R2, [R2]
0x3418CEC4: F248 2C74 MOVW R12, #0x8274
0x3418CEC8: F2C5 6C02 MOVT R12, #0x5602
0x3418CECC: F8DC 2000 LDR.W R2, [R12]
0x3418CED0: F442 4200 ORR R2, R2, #0x8000
0x3418CED4: F8CC 2000 STR.W R2, [R12]
0x3418CED8: 681A LDR R2, [R3]
0x3418CEDA: F042 0210 ORR R2, R2, #16
0x3418CEDE: 601A STR R2, [R3]
0x3418CEE0: 681A LDR R2, [R3]
0x3418CEE2: 681A LDR R2, [R3]
0x3418CEE4: F022 0210 BIC R2, R2, #16
0x3418CEE8: 601A STR R2, [R3]
0x3418CEEA: F648 2320 MOVW R3, #0x8A20
0x3418CEEE: F2C5 6302 MOVT R3, #0x5602
0x3418CEF2: F44F 5240 MOV.W R2, #0x3000
0x3418CEF6: 601A STR R2, [R3]
0x3418CEF8: F249 2320 MOVW R3, #0x9220
0x3418CEFC: F2C5 6302 MOVT R3, #0x5602
0x3418CF00: 601A STR R2, [R3]
0x3418CF02: F648 2224 MOVW R2, #0x8A24
0x3418CF06: F2C5 6202 MOVT R2, #0x5602
0x3418CF0A: 6010 STR R0, [R2]
0x3418CF0C: F249 2224 MOVW R2, #0x9224
0x3418CF10: F2C5 6202 MOVT R2, #0x5602
0x3418CF14: 6010 STR R0, [R2]
0x3418CF16: F249 2264 MOVW R2, #0x9264
0x3418CF1A: F2C5 6202 MOVT R2, #0x5602
0x3418CF1E: 6010 STR R0, [R2]
0x3418CF20: F249 235C MOVW R3, #0x925C
0x3418CF24: F2C5 6302 MOVT R3, #0x5602
0x3418CF28: 2240 MOVS R2, #64
0x3418CF2A: 601A STR R2, [R3]
0x3418CF2C: 6809 LDR R1, [R1]
0x3418CF2E: F249 2178 MOVW R1, #0x9278
0x3418CF32: F2C5 6102 MOVT R1, #0x5602
0x3418CF36: 6008 STR R0, [R1]
0x3418CF38: F64E 5188 MOVW R1, #0xED88
0x3418CF3C: F2CE 0100 MOVT R1, #0xE000
0x3418CF40: 6808 LDR R0, [R1]
0x3418CF42: F440 0070 ORR R0, R0, #0xF00000
0x3418CF46: 6008 STR R0, [R1]
0x3418CF48: F64E 5188 MOVW R1, #0xED88
0x3418CF4C: F2CE 0102 MOVT R1, #0xE002
0x3418CF50: 6808 LDR R0, [R1]
0x3418CF52: F440 0070 ORR R0, R0, #0xF00000
0x3418CF56: 6008 STR R0, [R1]
0x3418CF58: BD10 POP 123R4, PC}
Section .init.WWDG_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
WWDG_IRQHandler:
0x3418CF5A: E7FE B WWDG_IRQHandler ; 0x3418CF5A
Section .text.MX_XSPI2_Init from blto2_FSBL_lto.o, size=126, align=4
MX_XSPI2_Init:
0x3418CF5C: B580 PUSH 123R7, LR}
0x3418CF5E: B086 SUB SP, SP, #24
0x3418CF60: 2100 MOVS R1, #0
0x3418CF62: 9101 STR R1, [SP, #4]
0x3418CF64: 9105 STR R1, [SP, #20]
0x3418CF66: 9104 STR R1, [SP, #16]
0x3418CF68: 9103 STR R1, [SP, #12]
0x3418CF6A: F240 1094 MOVW R0, #0x0194 ; 0x34000194 = hxspi2
0x3418CF6E: F2C3 4000 MOVT R0, #0x3400 ; 0x34000194 = hxspi2
0x3418CF72: 9002 STR R0, [SP, #8]
0x3418CF74: F24A 0200 MOVW R2, #0xA000
0x3418CF78: F6C5 0202 MOVT R2, #0x5802
0x3418CF7C: 6002 STR R2, [R0]
0x3418CF7E: 2204 MOVS R2, #4
0x3418CF80: 6042 STR R2, [R0, #4]
0x3418CF82: 6081 STR R1, [R0, #8]
0x3418CF84: F04F 7280 MOV.W R2, #0x01000000
0x3418CF88: 60C2 STR R2, [R0, #12]
0x3418CF8A: 2219 MOVS R2, #25
0x3418CF8C: 6102 STR R2, [R0, #16]
0x3418CF8E: 2202 MOVS R2, #2
0x3418CF90: 6142 STR R2, [R0, #20]
0x3418CF92: 6181 STR R1, [R0, #24]
0x3418CF94: 61C1 STR R1, [R0, #28]
0x3418CF96: 6201 STR R1, [R0, #32]
0x3418CF98: 6241 STR R1, [R0, #36]
0x3418CF9A: 6281 STR R1, [R0, #40]
0x3418CF9C: F04F 5280 MOV.W R2, #0x10000000
0x3418CFA0: 62C2 STR R2, [R0, #44]
0x3418CFA2: 6301 STR R1, [R0, #48]
0x3418CFA4: 6341 STR R1, [R0, #52]
0x3418CFA6: 6381 STR R1, [R0, #56]
0x3418CFA8: 63C1 STR R1, [R0, #60]
0x3418CFAA: F7FD F9D9 BL HAL_XSPI_Init ; 0x3418A360
0x3418CFAE: B108 CBZ R0, .L1 ; 0x3418CFB4
0x3418CFB0: F7F3 FBF8 BL Error_Handler ; 0x341807A4
.L1:
0x3418CFB4: 2010 MOVS R0, #16
0x3418CFB6: 9003 STR R0, [SP, #12]
0x3418CFB8: 2001 MOVS R0, #1
0x3418CFBA: 9004 STR R0, [SP, #16]
0x3418CFBC: 9005 STR R0, [SP, #20]
0x3418CFBE: F240 1094 MOVW R0, #0x0194 ; 0x34000194 = hxspi2
0x3418CFC2: F2C3 4000 MOVT R0, #0x3400 ; 0x34000194 = hxspi2
0x3418CFC6: A903 ADD R1, SP, #12
0x3418CFC8: F241 3288 MOVW R2, #0x1388
0x3418CFCC: F004 FB2C BL HAL_XSPIM_Config ; 0x34191628
0x3418CFD0: B108 CBZ R0, .L2 ; 0x3418CFD6
0x3418CFD2: F7F3 FBE7 BL Error_Handler ; 0x341807A4
.L2:
0x3418CFD6: B006 ADD SP, SP, #24
0x3418CFD8: BD80 POP 123R7, PC}
Section .init.EXTI0_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
EXTI0_IRQHandler:
0x3418CFDA: E7FE B EXTI0_IRQHandler ; 0x3418CFDA
Section .text.LL_APB4_GRP2_EnableClock.5 from blto2_FSBL_lto.o, size=34, align=4
LL_APB4_GRP2_EnableClock.5:
0x3418CFDC: B082 SUB SP, SP, #8
0x3418CFDE: 9001 STR R0, [SP, #4]
0x3418CFE0: 9801 LDR R0, [SP, #4]
0x3418CFE2: F648 2178 MOVW R1, #0x8A78
0x3418CFE6: F2C5 6102 MOVT R1, #0x5602
0x3418CFEA: 6008 STR R0, [R1]
0x3418CFEC: F248 2078 MOVW R0, #0x8278
0x3418CFF0: F2C5 6002 MOVT R0, #0x5602
0x3418CFF4: 6800 LDR R0, [R0]
0x3418CFF6: 9000 STR R0, [SP, #0]
0x3418CFF8: 9800 LDR R0, [SP, #0]
0x3418CFFA: B002 ADD SP, SP, #8
0x3418CFFC: 4770 BX LR
Section .init.EXTI1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
EXTI1_IRQHandler:
0x3418CFFE: E7FE B EXTI1_IRQHandler ; 0x3418CFFE
Section .text.LL_AHB4_GRP1_EnableClock.6 from blto2_FSBL_lto.o, size=34, align=4
LL_AHB4_GRP1_EnableClock.6:
0x3418D000: B082 SUB SP, SP, #8
0x3418D002: 9001 STR R0, [SP, #4]
0x3418D004: 9801 LDR R0, [SP, #4]
0x3418D006: F648 215C MOVW R1, #0x8A5C
0x3418D00A: F2C5 6102 MOVT R1, #0x5602
0x3418D00E: 6008 STR R0, [R1]
0x3418D010: F248 205C MOVW R0, #0x825C
0x3418D014: F2C5 6002 MOVT R0, #0x5602
0x3418D018: 6800 LDR R0, [R0]
0x3418D01A: 9000 STR R0, [SP, #0]
0x3418D01C: 9800 LDR R0, [SP, #0]
0x3418D01E: B002 ADD SP, SP, #8
0x3418D020: 4770 BX LR
Section .init.EXTI2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
EXTI2_IRQHandler:
0x3418D022: E7FE B EXTI2_IRQHandler ; 0x3418D022
Section .text.LL_AHB5_GRP1_EnableClock from blto2_FSBL_lto.o, size=34, align=4
LL_AHB5_GRP1_EnableClock:
0x3418D024: B082 SUB SP, SP, #8
0x3418D026: 9001 STR R0, [SP, #4]
0x3418D028: 9801 LDR R0, [SP, #4]
0x3418D02A: F648 2160 MOVW R1, #0x8A60
0x3418D02E: F2C5 6102 MOVT R1, #0x5602
0x3418D032: 6008 STR R0, [R1]
0x3418D034: F248 2060 MOVW R0, #0x8260
0x3418D038: F2C5 6002 MOVT R0, #0x5602
0x3418D03C: 6800 LDR R0, [R0]
0x3418D03E: 9000 STR R0, [SP, #0]
0x3418D040: 9800 LDR R0, [SP, #0]
0x3418D042: B002 ADD SP, SP, #8
0x3418D044: 4770 BX LR
Section .init.EXTI3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
EXTI3_IRQHandler:
0x3418D046: E7FE B EXTI3_IRQHandler ; 0x3418D046
Section .text.HAL_InitTick from blto2_FSBL_lto.o, size=126, align=4
HAL_InitTick:
0x3418D048: B580 PUSH 123R7, LR}
0x3418D04A: B082 SUB SP, SP, #8
0x3418D04C: 9000 STR R0, [SP, #0]
0x3418D04E: F240 20A8 MOVW R0, #0x02A8 ; 0x340002A8 = uwTickFreq
0x3418D052: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A8 = uwTickFreq
0x3418D056: 7800 LDRB R0, [R0]
0x3418D058: B918 CBNZ R0, .L1 ; 0x3418D062
0x3418D05A: 2001 MOVS R0, #1
0x3418D05C: F88D 0007 STRB.W R0, [SP, #7]
0x3418D060: E02D B 46L5 ; 0x3418D0BE
.L1:
0x3418D062: F240 20A4 MOVW R0, #0x02A4 ; 0x340002A4 = SystemCoreClock
0x3418D066: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A4 = SystemCoreClock
0x3418D06A: 6800 LDR R0, [R0]
0x3418D06C: F240 21A8 MOVW R1, #0x02A8 ; 0x340002A8 = uwTickFreq
0x3418D070: F2C3 4100 MOVT R1, #0x3400 ; 0x340002A8 = uwTickFreq
0x3418D074: 780A LDRB R2, [R1]
0x3418D076: F44F 717A MOV.W R1, #0x03E8
0x3418D07A: FBB1 F1F2 UDIV R1, R1, R2
0x3418D07E: FBB0 F0F1 UDIV R0, R0, R1
0x3418D082: F7F3 FEE1 BL HAL_SYSTICK_Config ; 0x34180E48
0x3418D086: B118 CBZ R0, .L2 ; 0x3418D090
0x3418D088: 2001 MOVS R0, #1
0x3418D08A: F88D 0007 STRB.W R0, [SP, #7]
0x3418D08E: E016 B 46L5 ; 0x3418D0BE
.L2:
0x3418D090: 9800 LDR R0, [SP, #0]
0x3418D092: 280F CMP R0, #15
0x3418D094: D80C BHI 46L3 ; 0x3418D0B0
0x3418D096: 9900 LDR R1, [SP, #0]
0x3418D098: F04F 30FF MOV.W R0, #0xFFFFFFFF
0x3418D09C: 2200 MOVS R2, #0
0x3418D09E: F7F3 FE45 BL HAL_NVIC_SetPriority ; 0x34180D2C
0x3418D0A2: 9800 LDR R0, [SP, #0]
0x3418D0A4: F240 21A0 MOVW R1, #0x02A0 ; 0x340002A0 = uwTickPrio
0x3418D0A8: F2C3 4100 MOVT R1, #0x3400 ; 0x340002A0 = uwTickPrio
0x3418D0AC: 6008 STR R0, [R1]
0x3418D0AE: E003 B 46L4 ; 0x3418D0B8
.L3:
0x3418D0B0: 2001 MOVS R0, #1
0x3418D0B2: F88D 0007 STRB.W R0, [SP, #7]
0x3418D0B6: E002 B 46L5 ; 0x3418D0BE
.L4:
0x3418D0B8: 2000 MOVS R0, #0
0x3418D0BA: F88D 0007 STRB.W R0, [SP, #7]
.L5:
0x3418D0BE: F89D 0007 LDRB.W R0, [SP, #7]
0x3418D0C2: B002 ADD SP, SP, #8
0x3418D0C4: BD80 POP 123R7, PC}
Section .init.EXTI4_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
EXTI4_IRQHandler:
0x3418D0C6: E7FE B EXTI4_IRQHandler ; 0x3418D0C6
Section .text.HAL_IncTick from blto2_FSBL_lto.o, size=26, align=4
HAL_IncTick:
0x3418D0C8: F240 20A8 MOVW R0, #0x02A8 ; 0x340002A8 = uwTickFreq
0x3418D0CC: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A8 = uwTickFreq
0x3418D0D0: 7802 LDRB R2, [R0]
0x3418D0D2: F240 2198 MOVW R1, #0x0298 ; 0x34000298 = uwTick
0x3418D0D6: F2C3 4100 MOVT R1, #0x3400 ; 0x34000298 = uwTick
0x3418D0DA: 6808 LDR R0, [R1]
0x3418D0DC: 4410 ADD R0, R2
0x3418D0DE: 6008 STR R0, [R1]
0x3418D0E0: 4770 BX LR
Section .init.EXTI5_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
EXTI5_IRQHandler:
0x3418D0E2: E7FE B EXTI5_IRQHandler ; 0x3418D0E2
Section .text.HAL_Delay from blto2_FSBL_lto.o, size=58, align=4
HAL_Delay:
0x3418D0E4: B580 PUSH 123R7, LR}
0x3418D0E6: B084 SUB SP, SP, #16
0x3418D0E8: 9003 STR R0, [SP, #12]
0x3418D0EA: F7F3 FDBD BL HAL_GetTick ; 0x34180C68
0x3418D0EE: 9002 STR R0, [SP, #8]
0x3418D0F0: 9803 LDR R0, [SP, #12]
0x3418D0F2: 9001 STR R0, [SP, #4]
0x3418D0F4: 9801 LDR R0, [SP, #4]
0x3418D0F6: 3001 ADDS R0, #1
0x3418D0F8: B138 CBZ R0, .L1 ; 0x3418D10A
0x3418D0FA: F240 20A8 MOVW R0, #0x02A8 ; 0x340002A8 = uwTickFreq
0x3418D0FE: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A8 = uwTickFreq
0x3418D102: 7801 LDRB R1, [R0]
0x3418D104: 9801 LDR R0, [SP, #4]
0x3418D106: 4408 ADD R0, R1
0x3418D108: 9001 STR R0, [SP, #4]
.L1:
0x3418D10A: F7F3 FDAD BL HAL_GetTick ; 0x34180C68
0x3418D10E: 9902 LDR R1, [SP, #8]
0x3418D110: 1A40 SUBS R0, R0, R1
0x3418D112: 9901 LDR R1, [SP, #4]
0x3418D114: 4288 CMP R0, R1
0x3418D116: D200 BCS 46L2 ; 0x3418D11A
0x3418D118: E7F7 B 46L1 ; 0x3418D10A
.L2:
0x3418D11A: B004 ADD SP, SP, #16
0x3418D11C: BD80 POP 123R7, PC}
Section .init.EXTI6_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
EXTI6_IRQHandler:
0x3418D11E: E7FE B EXTI6_IRQHandler ; 0x3418D11E
Section .text.HAL_SuspendTick from blto2_FSBL_lto.o, size=18, align=4
HAL_SuspendTick:
0x3418D120: F24E 0110 MOVW R1, #0xE010
0x3418D124: F2CE 0100 MOVT R1, #0xE000
0x3418D128: 6808 LDR R0, [R1]
0x3418D12A: F020 0002 BIC R0, R0, #2
0x3418D12E: 6008 STR R0, [R1]
0x3418D130: 4770 BX LR
Section .init.EXTI7_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
EXTI7_IRQHandler:
0x3418D132: E7FE B EXTI7_IRQHandler ; 0x3418D132
Section .text.HAL_BSEC_OTP_Reload from blto2_FSBL_lto.o, size=250, align=4
HAL_BSEC_OTP_Reload:
0x3418D134: B580 PUSH 123R7, LR}
0x3418D136: B086 SUB SP, SP, #24
0x3418D138: 9004 STR R0, [SP, #16]
0x3418D13A: 9103 STR R1, [SP, #12]
0x3418D13C: F7F3 FD94 BL HAL_GetTick ; 0x34180C68
0x3418D140: 9000 STR R0, [SP, #0]
0x3418D142: 9804 LDR R0, [SP, #16]
0x3418D144: B918 CBNZ R0, .L1 ; 0x3418D14E
0x3418D146: 2001 MOVS R0, #1
0x3418D148: F88D 0017 STRB.W R0, [SP, #23]
0x3418D14C: E06B B 46L11 ; 0x3418D226
.L1:
0x3418D14E: 9804 LDR R0, [SP, #16]
0x3418D150: 6800 LDR R0, [R0]
0x3418D152: F249 0100 MOVW R1, #0x9000
0x3418D156: F2C5 6100 MOVT R1, #0x5600
0x3418D15A: 4288 CMP R0, R1
0x3418D15C: D005 BEQ 46L2 ; 0x3418D16A
0x3418D15E: 9904 LDR R1, [SP, #16]
0x3418D160: 2001 MOVS R0, #1
0x3418D162: 6048 STR R0, [R1, #4]
0x3418D164: F88D 0017 STRB.W R0, [SP, #23]
0x3418D168: E05D B 46L11 ; 0x3418D226
.L2:
0x3418D16A: 9803 LDR R0, [SP, #12]
0x3418D16C: 08C0 LSRS R0, R0, #3
0x3418D16E: 282E CMP R0, #46
0x3418D170: D850 BHI 46L9 ; 0x3418D214
0x3418D172: 9803 LDR R0, [SP, #12]
0x3418D174: 0940 LSRS R0, R0, #5
0x3418D176: 9002 STR R0, [SP, #8]
0x3418D178: 9803 LDR R0, [SP, #12]
0x3418D17A: F000 011F AND R1, R0, #31
0x3418D17E: 2001 MOVS R0, #1
0x3418D180: 4088 LSLS R0, R1
0x3418D182: 9001 STR R0, [SP, #4]
0x3418D184: 9804 LDR R0, [SP, #16]
0x3418D186: 6800 LDR R0, [R0]
0x3418D188: 9902 LDR R1, [SP, #8]
0x3418D18A: EB00 0081 ADD.W R0, R0, R1, LSL #2
0x3418D18E: F8D0 0880 LDR.W R0, [R0, #0x0880]
0x3418D192: 9901 LDR R1, [SP, #4]
0x3418D194: 4208 TST R0, R1
0x3418D196: D135 BNE 46L7 ; 0x3418D204
0x3418D198: 9804 LDR R0, [SP, #16]
0x3418D19A: 6800 LDR R0, [R0]
0x3418D19C: F8D0 0C04 LDR.W R0, [R0, #0x0C04]
0x3418D1A0: F246 11FF MOVW R1, #0x61FF
0x3418D1A4: 4388 BICS R0, R1
0x3418D1A6: 9903 LDR R1, [SP, #12]
0x3418D1A8: 4308 ORRS R0, R1
0x3418D1AA: 9904 LDR R1, [SP, #16]
0x3418D1AC: 6809 LDR R1, [R1]
0x3418D1AE: F8C1 0C04 STR.W R0, [R1, #0x0C04]
.L3:
0x3418D1B2: 9804 LDR R0, [SP, #16]
0x3418D1B4: 6800 LDR R0, [R0]
0x3418D1B6: F8D0 0E44 LDR.W R0, [R0, #0x0E44]
0x3418D1BA: 07C0 LSLS R0, R0, #31
0x3418D1BC: B170 CBZ R0, .L5 ; 0x3418D1DC
0x3418D1BE: F7F3 FD53 BL HAL_GetTick ; 0x34180C68
0x3418D1C2: 9900 LDR R1, [SP, #0]
0x3418D1C4: 1A40 SUBS R0, R0, R1
0x3418D1C6: F5B0 7F7A CMP.W R0, #0x03E8
0x3418D1CA: D906 BLS 46L4 ; 0x3418D1DA
0x3418D1CC: 9904 LDR R1, [SP, #16]
0x3418D1CE: 200A MOVS R0, #10
0x3418D1D0: 6048 STR R0, [R1, #4]
0x3418D1D2: 2001 MOVS R0, #1
0x3418D1D4: F88D 0017 STRB.W R0, [SP, #23]
0x3418D1D8: E025 B 46L11 ; 0x3418D226
.L4:
0x3418D1DA: E7EA B 46L3 ; 0x3418D1B2
.L5:
0x3418D1DC: 9804 LDR R0, [SP, #16]
0x3418D1DE: 6800 LDR R0, [R0]
0x3418D1E0: F8D0 0E44 LDR.W R0, [R0, #0x0E44]
0x3418D1E4: F410 0F8C TST R0, #0x460000
0x3418D1E8: D00B BEQ 46L6 ; 0x3418D202
0x3418D1EA: 9804 LDR R0, [SP, #16]
0x3418D1EC: 6800 LDR R0, [R0]
0x3418D1EE: F8D0 0E44 LDR.W R0, [R0, #0x0E44]
0x3418D1F2: F400 008C AND R0, R0, #0x460000
0x3418D1F6: 9904 LDR R1, [SP, #16]
0x3418D1F8: 6048 STR R0, [R1, #4]
0x3418D1FA: 2001 MOVS R0, #1
0x3418D1FC: F88D 0017 STRB.W R0, [SP, #23]
0x3418D200: E011 B 46L11 ; 0x3418D226
.L6:
0x3418D202: E006 B 46L8 ; 0x3418D212
.L7:
0x3418D204: 9904 LDR R1, [SP, #16]
0x3418D206: 2004 MOVS R0, #4
0x3418D208: 6048 STR R0, [R1, #4]
0x3418D20A: 2001 MOVS R0, #1
0x3418D20C: F88D 0017 STRB.W R0, [SP, #23]
0x3418D210: E009 B 46L11 ; 0x3418D226
.L8:
0x3418D212: E005 B 46L10 ; 0x3418D220
.L9:
0x3418D214: 9904 LDR R1, [SP, #16]
0x3418D216: 2001 MOVS R0, #1
0x3418D218: 6048 STR R0, [R1, #4]
0x3418D21A: F88D 0017 STRB.W R0, [SP, #23]
0x3418D21E: E002 B 46L11 ; 0x3418D226
.L10:
0x3418D220: 2000 MOVS R0, #0
0x3418D222: F88D 0017 STRB.W R0, [SP, #23]
.L11:
0x3418D226: F89D 0017 LDRB.W R0, [SP, #23]
0x3418D22A: B006 ADD SP, SP, #24
0x3418D22C: BD80 POP 123R7, PC}
Section .init.EXTI8_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
EXTI8_IRQHandler:
0x3418D22E: E7FE B EXTI8_IRQHandler ; 0x3418D22E
Section .text.HAL_BSEC_OTP_Program from blto2_FSBL_lto.o, size=342, align=4
HAL_BSEC_OTP_Program:
0x3418D230: B580 PUSH 123R7, LR}
0x3418D232: B08A SUB SP, SP, #40
0x3418D234: 9008 STR R0, [SP, #32]
0x3418D236: 9107 STR R1, [SP, #28]
0x3418D238: 9206 STR R2, [SP, #24]
0x3418D23A: 9305 STR R3, [SP, #20]
0x3418D23C: F7F3 FD14 BL HAL_GetTick ; 0x34180C68
0x3418D240: 9001 STR R0, [SP, #4]
0x3418D242: 9808 LDR R0, [SP, #32]
0x3418D244: B918 CBNZ R0, .L1 ; 0x3418D24E
0x3418D246: 2001 MOVS R0, #1
0x3418D248: F88D 0027 STRB.W R0, [SP, #39]
0x3418D24C: E097 B 46L17 ; 0x3418D37E
.L1:
0x3418D24E: 9808 LDR R0, [SP, #32]
0x3418D250: 6800 LDR R0, [R0]
0x3418D252: F249 0100 MOVW R1, #0x9000
0x3418D256: F2C5 6100 MOVT R1, #0x5600
0x3418D25A: 4288 CMP R0, R1
0x3418D25C: D005 BEQ 46L2 ; 0x3418D26A
0x3418D25E: 9908 LDR R1, [SP, #32]
0x3418D260: 2001 MOVS R0, #1
0x3418D262: 6048 STR R0, [R1, #4]
0x3418D264: F88D 0027 STRB.W R0, [SP, #39]
0x3418D268: E089 B 46L17 ; 0x3418D37E
.L2:
0x3418D26A: 9805 LDR R0, [SP, #20]
0x3418D26C: B118 CBZ R0, .L3 ; 0x3418D276
0x3418D26E: 9805 LDR R0, [SP, #20]
0x3418D270: F5B0 4F80 CMP.W R0, #0x4000
0x3418D274: D100 BNE 46L4 ; 0x3418D278
.L3:
0x3418D276: E007 B 46L5 ; 0x3418D288
.L4:
0x3418D278: F642 2086 MOVW R0, #0x2A86 ; 0x34192A86 = .rodata..L.str.17
0x3418D27C: F2C3 4019 MOVT R0, #0x3419 ; 0x34192A86 = .rodata..L.str.17
0x3418D280: F44F 71DD MOV.W R1, #0x01BA
0x3418D284: F7FF FD54 BL assert_failed ; 0x3418CD30
.L5:
0x3418D288: 9807 LDR R0, [SP, #28]
0x3418D28A: 08C0 LSRS R0, R0, #3
0x3418D28C: 282E CMP R0, #46
0x3418D28E: D86D BHI 46L15 ; 0x3418D36C
0x3418D290: 9807 LDR R0, [SP, #28]
0x3418D292: 0940 LSRS R0, R0, #5
0x3418D294: 9004 STR R0, [SP, #16]
0x3418D296: 9807 LDR R0, [SP, #28]
0x3418D298: F000 011F AND R1, R0, #31
0x3418D29C: 2001 MOVS R0, #1
0x3418D29E: 4088 LSLS R0, R1
0x3418D2A0: 9003 STR R0, [SP, #12]
0x3418D2A2: 9808 LDR R0, [SP, #32]
0x3418D2A4: 6800 LDR R0, [R0]
0x3418D2A6: 9904 LDR R1, [SP, #16]
0x3418D2A8: EB00 0081 ADD.W R0, R0, R1, LSL #2
0x3418D2AC: F8D0 0800 LDR.W R0, [R0, #0x0800]
0x3418D2B0: 9903 LDR R1, [SP, #12]
0x3418D2B2: 4208 TST R0, R1
0x3418D2B4: D152 BNE 46L13 ; 0x3418D35C
0x3418D2B6: 9806 LDR R0, [SP, #24]
0x3418D2B8: 9908 LDR R1, [SP, #32]
0x3418D2BA: 6809 LDR R1, [R1]
0x3418D2BC: F8C1 0C08 STR.W R0, [R1, #0x0C08]
0x3418D2C0: 9808 LDR R0, [SP, #32]
0x3418D2C2: 6800 LDR R0, [R0]
0x3418D2C4: F8D0 0C04 LDR.W R0, [R0, #0x0C04]
0x3418D2C8: F246 11FF MOVW R1, #0x61FF
0x3418D2CC: EA20 0101 BIC.W R1, R0, R1
0x3418D2D0: 9807 LDR R0, [SP, #28]
0x3418D2D2: 9A05 LDR R2, [SP, #20]
0x3418D2D4: 4310 ORRS R0, R2
0x3418D2D6: 4308 ORRS R0, R1
0x3418D2D8: F440 5000 ORR R0, R0, #0x2000
0x3418D2DC: 9908 LDR R1, [SP, #32]
0x3418D2DE: 6809 LDR R1, [R1]
0x3418D2E0: F8C1 0C04 STR.W R0, [R1, #0x0C04]
.L6:
0x3418D2E4: 9808 LDR R0, [SP, #32]
0x3418D2E6: 6800 LDR R0, [R0]
0x3418D2E8: F8D0 0E44 LDR.W R0, [R0, #0x0E44]
0x3418D2EC: 07C0 LSLS R0, R0, #31
0x3418D2EE: B170 CBZ R0, .L8 ; 0x3418D30E
0x3418D2F0: F7F3 FCBA BL HAL_GetTick ; 0x34180C68
0x3418D2F4: 9901 LDR R1, [SP, #4]
0x3418D2F6: 1A40 SUBS R0, R0, R1
0x3418D2F8: F5B0 7F7A CMP.W R0, #0x03E8
0x3418D2FC: D906 BLS 46L7 ; 0x3418D30C
0x3418D2FE: 9908 LDR R1, [SP, #32]
0x3418D300: 200A MOVS R0, #10
0x3418D302: 6048 STR R0, [R1, #4]
0x3418D304: 2001 MOVS R0, #1
0x3418D306: F88D 0027 STRB.W R0, [SP, #39]
0x3418D30A: E038 B 46L17 ; 0x3418D37E
.L7:
0x3418D30C: E7EA B 46L6 ; 0x3418D2E4
.L8:
0x3418D30E: 9808 LDR R0, [SP, #32]
0x3418D310: 6800 LDR R0, [R0]
0x3418D312: F8D0 0E44 LDR.W R0, [R0, #0x0E44]
0x3418D316: 03C0 LSLS R0, R0, #15
0x3418D318: 2800 CMP R0, #0
0x3418D31A: D507 BPL 46L9 ; 0x3418D32C
0x3418D31C: 9908 LDR R1, [SP, #32]
0x3418D31E: F44F 3080 MOV.W R0, #0x010000
0x3418D322: 6048 STR R0, [R1, #4]
0x3418D324: 2001 MOVS R0, #1
0x3418D326: F88D 0027 STRB.W R0, [SP, #39]
0x3418D32A: E028 B 46L17 ; 0x3418D37E
.L9:
0x3418D32C: 9808 LDR R0, [SP, #32]
0x3418D32E: 9907 LDR R1, [SP, #28]
0x3418D330: AA02 ADD R2, SP, #8
0x3418D332: F7F3 FC9F BL HAL_BSEC_OTP_Read ; 0x34180C74
0x3418D336: B960 CBNZ R0, .L11 ; 0x3418D352
0x3418D338: 9802 LDR R0, [SP, #8]
0x3418D33A: 9906 LDR R1, [SP, #24]
0x3418D33C: 4288 CMP R0, R1
0x3418D33E: D007 BEQ 46L10 ; 0x3418D350
0x3418D340: 9908 LDR R1, [SP, #32]
0x3418D342: F44F 3080 MOV.W R0, #0x010000
0x3418D346: 6048 STR R0, [R1, #4]
0x3418D348: 2001 MOVS R0, #1
0x3418D34A: F88D 0027 STRB.W R0, [SP, #39]
0x3418D34E: E016 B 46L17 ; 0x3418D37E
.L10:
0x3418D350: E003 B 46L12 ; 0x3418D35A
.L11:
0x3418D352: 2001 MOVS R0, #1
0x3418D354: F88D 0027 STRB.W R0, [SP, #39]
0x3418D358: E011 B 46L17 ; 0x3418D37E
.L12:
0x3418D35A: E006 B 46L14 ; 0x3418D36A
.L13:
0x3418D35C: 9908 LDR R1, [SP, #32]
0x3418D35E: 2004 MOVS R0, #4
0x3418D360: 6048 STR R0, [R1, #4]
0x3418D362: 2001 MOVS R0, #1
0x3418D364: F88D 0027 STRB.W R0, [SP, #39]
0x3418D368: E009 B 46L17 ; 0x3418D37E
.L14:
0x3418D36A: E005 B 46L16 ; 0x3418D378
.L15:
0x3418D36C: 9908 LDR R1, [SP, #32]
0x3418D36E: 2001 MOVS R0, #1
0x3418D370: 6048 STR R0, [R1, #4]
0x3418D372: F88D 0027 STRB.W R0, [SP, #39]
0x3418D376: E002 B 46L17 ; 0x3418D37E
.L16:
0x3418D378: 2000 MOVS R0, #0
0x3418D37A: F88D 0027 STRB.W R0, [SP, #39]
.L17:
0x3418D37E: F89D 0027 LDRB.W R0, [SP, #39]
0x3418D382: B00A ADD SP, SP, #40
0x3418D384: BD80 POP 123R7, PC}
Section .init.EXTI9_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
EXTI9_IRQHandler:
0x3418D386: E7FE B EXTI9_IRQHandler ; 0x3418D386
Section .text.HAL_NVIC_SetPriorityGrouping from blto2_FSBL_lto.o, size=62, align=4
HAL_NVIC_SetPriorityGrouping:
0x3418D388: B580 PUSH 123R7, LR}
0x3418D38A: B082 SUB SP, SP, #8
0x3418D38C: 9001 STR R0, [SP, #4]
0x3418D38E: 9801 LDR R0, [SP, #4]
0x3418D390: 2807 CMP R0, #7
0x3418D392: D00B BEQ 46L1 ; 0x3418D3AC
0x3418D394: 9801 LDR R0, [SP, #4]
0x3418D396: 2806 CMP R0, #6
0x3418D398: D008 BEQ 46L1 ; 0x3418D3AC
0x3418D39A: 9801 LDR R0, [SP, #4]
0x3418D39C: 2805 CMP R0, #5
0x3418D39E: D005 BEQ 46L1 ; 0x3418D3AC
0x3418D3A0: 9801 LDR R0, [SP, #4]
0x3418D3A2: 2804 CMP R0, #4
0x3418D3A4: D002 BEQ 46L1 ; 0x3418D3AC
0x3418D3A6: 9801 LDR R0, [SP, #4]
0x3418D3A8: 2803 CMP R0, #3
0x3418D3AA: D100 BNE 46L2 ; 0x3418D3AE
.L1:
0x3418D3AC: E006 B 46L3 ; 0x3418D3BC
.L2:
0x3418D3AE: F642 4034 MOVW R0, #0x2C34 ; 0x34192C34 = .rodata..L.str.20
0x3418D3B2: F2C3 4019 MOVT R0, #0x3419 ; 0x34192C34 = .rodata..L.str.20
0x3418D3B6: 21E6 MOVS R1, #230
0x3418D3B8: F7FF FCBA BL assert_failed ; 0x3418CD30
.L3:
0x3418D3BC: 9801 LDR R0, [SP, #4]
0x3418D3BE: F7F3 FC97 BL __NVIC_SetPriorityGrouping ; 0x34180CF0
0x3418D3C2: B002 ADD SP, SP, #8
0x3418D3C4: BD80 POP 123R7, PC}
Section .init.EXTI10_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
EXTI10_IRQHandler:
0x3418D3C6: E7FE B EXTI10_IRQHandler ; 0x3418D3C6
Section .text.__NVIC_SetPriority from blto2_FSBL_lto.o, size=62, align=4
__NVIC_SetPriority:
0x3418D3C8: B082 SUB SP, SP, #8
0x3418D3CA: F8AD 0006 STRH.W R0, [SP, #6]
0x3418D3CE: 9100 STR R1, [SP, #0]
0x3418D3D0: F9BD 0006 LDRSH.W R0, [SP, #6]
0x3418D3D4: 2800 CMP R0, #0
0x3418D3D6: D409 BMI 46L1 ; 0x3418D3EC
0x3418D3D8: 9800 LDR R0, [SP, #0]
0x3418D3DA: 0100 LSLS R0, R0, #4
0x3418D3DC: F9BD 1006 LDRSH.W R1, [SP, #6]
0x3418D3E0: F24E 4200 MOVW R2, #0xE400
0x3418D3E4: F2CE 0200 MOVT R2, #0xE000
0x3418D3E8: 5488 STRB R0, [R1, R2]
0x3418D3EA: E00A B 46L2 ; 0x3418D402
.L1:
0x3418D3EC: 9800 LDR R0, [SP, #0]
0x3418D3EE: 0100 LSLS R0, R0, #4
0x3418D3F0: F8BD 1006 LDRH.W R1, [SP, #6]
0x3418D3F4: F001 010F AND R1, R1, #15
0x3418D3F8: F64E 5214 MOVW R2, #0xED14
0x3418D3FC: F2CE 0200 MOVT R2, #0xE000
0x3418D400: 5488 STRB R0, [R1, R2]
.L2:
0x3418D402: B002 ADD SP, SP, #8
0x3418D404: 4770 BX LR
Section .init.EXTI11_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
EXTI11_IRQHandler:
0x3418D406: E7FE B EXTI11_IRQHandler ; 0x3418D406
Section .text.SysTick_Config from blto2_FSBL_lto.o, size=78, align=4
SysTick_Config:
0x3418D408: B580 PUSH 123R7, LR}
0x3418D40A: B082 SUB SP, SP, #8
0x3418D40C: 9000 STR R0, [SP, #0]
0x3418D40E: 9800 LDR R0, [SP, #0]
0x3418D410: 3801 SUBS R0, #1
0x3418D412: F1B0 7F80 CMP.W R0, #0x01000000
0x3418D416: D302 BCC 46L1 ; 0x3418D41E
0x3418D418: 2001 MOVS R0, #1
0x3418D41A: 9001 STR R0, [SP, #4]
0x3418D41C: E018 B 46L2 ; 0x3418D450
.L1:
0x3418D41E: 9800 LDR R0, [SP, #0]
0x3418D420: 3801 SUBS R0, #1
0x3418D422: F24E 0114 MOVW R1, #0xE014
0x3418D426: F2CE 0100 MOVT R1, #0xE000
0x3418D42A: 6008 STR R0, [R1]
0x3418D42C: F04F 30FF MOV.W R0, #0xFFFFFFFF
0x3418D430: 210F MOVS R1, #15
0x3418D432: F7FF FFC9 BL __NVIC_SetPriority ; 0x3418D3C8
0x3418D436: F24E 0118 MOVW R1, #0xE018
0x3418D43A: F2CE 0100 MOVT R1, #0xE000
0x3418D43E: 2000 MOVS R0, #0
0x3418D440: 6008 STR R0, [R1]
0x3418D442: F24E 0210 MOVW R2, #0xE010
0x3418D446: F2CE 0200 MOVT R2, #0xE000
0x3418D44A: 2107 MOVS R1, #7
0x3418D44C: 6011 STR R1, [R2]
0x3418D44E: 9001 STR R0, [SP, #4]
.L2:
0x3418D450: 9801 LDR R0, [SP, #4]
0x3418D452: B002 ADD SP, SP, #8
0x3418D454: BD80 POP 123R7, PC}
Section .init.EXTI12_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
EXTI12_IRQHandler:
0x3418D456: E7FE B EXTI12_IRQHandler ; 0x3418D456
Section .text.HAL_GPIO_WritePin from blto2_FSBL_lto.o, size=102, align=4
HAL_GPIO_WritePin:
0x3418D458: B580 PUSH 123R7, LR}
0x3418D45A: B082 SUB SP, SP, #8
0x3418D45C: 9001 STR R0, [SP, #4]
0x3418D45E: F8AD 1002 STRH.W R1, [SP, #2]
0x3418D462: F88D 2001 STRB.W R2, [SP, #1]
0x3418D466: F8BD 0002 LDRH.W R0, [SP, #2]
0x3418D46A: B110 CBZ R0, .L1 ; 0x3418D472
0x3418D46C: 2000 MOVS R0, #0
0x3418D46E: B900 CBNZ R0, .L1 ; 0x3418D472
0x3418D470: E007 B 46L2 ; 0x3418D482
.L1:
0x3418D472: F642 20F0 MOVW R0, #0x2AF0 ; 0x34192AF0 = .rodata..L.str.30
0x3418D476: F2C3 4019 MOVT R0, #0x3419 ; 0x34192AF0 = .rodata..L.str.30
0x3418D47A: F44F 71D0 MOV.W R1, #0x01A0
0x3418D47E: F7FF FC57 BL assert_failed ; 0x3418CD30
.L2:
0x3418D482: F89D 0001 LDRB.W R0, [SP, #1]
0x3418D486: B118 CBZ R0, .L3 ; 0x3418D490
0x3418D488: F89D 0001 LDRB.W R0, [SP, #1]
0x3418D48C: 2801 CMP R0, #1
0x3418D48E: D100 BNE 46L4 ; 0x3418D492
.L3:
0x3418D490: E007 B 46L5 ; 0x3418D4A2
.L4:
0x3418D492: F642 20F0 MOVW R0, #0x2AF0 ; 0x34192AF0 = .rodata..L.str.30
0x3418D496: F2C3 4019 MOVT R0, #0x3419 ; 0x34192AF0 = .rodata..L.str.30
0x3418D49A: F240 11A1 MOVW R1, #0x01A1
0x3418D49E: F7FF FC47 BL assert_failed ; 0x3418CD30
.L5:
0x3418D4A2: F89D 0001 LDRB.W R0, [SP, #1]
0x3418D4A6: B120 CBZ R0, .L6 ; 0x3418D4B2
0x3418D4A8: F8BD 0002 LDRH.W R0, [SP, #2]
0x3418D4AC: 9901 LDR R1, [SP, #4]
0x3418D4AE: 6188 STR R0, [R1, #24]
0x3418D4B0: E003 B 46L7 ; 0x3418D4BA
.L6:
0x3418D4B2: F8BD 0002 LDRH.W R0, [SP, #2]
0x3418D4B6: 9901 LDR R1, [SP, #4]
0x3418D4B8: 6288 STR R0, [R1, #40]
.L7:
0x3418D4BA: B002 ADD SP, SP, #8
0x3418D4BC: BD80 POP 123R7, PC}
Section .init.EXTI13_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
EXTI13_IRQHandler:
0x3418D4BE: E7FE B EXTI13_IRQHandler ; 0x3418D4BE
Section .text.HAL_PWREx_ConfigSupply from blto2_FSBL_lto.o, size=114, align=4
HAL_PWREx_ConfigSupply:
0x3418D4C0: B580 PUSH 123R7, LR}
0x3418D4C2: B084 SUB SP, SP, #16
0x3418D4C4: 9002 STR R0, [SP, #8]
0x3418D4C6: 9802 LDR R0, [SP, #8]
0x3418D4C8: 2804 CMP R0, #4
0x3418D4CA: D001 BEQ 46L1 ; 0x3418D4D0
0x3418D4CC: 9802 LDR R0, [SP, #8]
0x3418D4CE: B900 CBNZ R0, .L2 ; 0x3418D4D2
.L1:
0x3418D4D0: E007 B 46L3 ; 0x3418D4E2
.L2:
0x3418D4D2: F642 40A0 MOVW R0, #0x2CA0 ; 0x34192CA0 = .rodata..L.str.38
0x3418D4D6: F2C3 4019 MOVT R0, #0x3419 ; 0x34192CA0 = .rodata..L.str.38
0x3418D4DA: F44F 7187 MOV.W R1, #0x010E
0x3418D4DE: F7FF FC27 BL assert_failed ; 0x3418CD30
.L3:
0x3418D4E2: F644 0100 MOVW R1, #0x4800
0x3418D4E6: F2C5 6102 MOVT R1, #0x5602
0x3418D4EA: 6808 LDR R0, [R1]
0x3418D4EC: F020 0004 BIC R0, R0, #4
0x3418D4F0: 9A02 LDR R2, [SP, #8]
0x3418D4F2: 4310 ORRS R0, R2
0x3418D4F4: 6008 STR R0, [R1]
0x3418D4F6: F7F3 FBB7 BL HAL_GetTick ; 0x34180C68
0x3418D4FA: 9001 STR R0, [SP, #4]
.L4:
0x3418D4FC: F644 0020 MOVW R0, #0x4820
0x3418D500: F2C5 6002 MOVT R0, #0x5602
0x3418D504: 6800 LDR R0, [R0]
0x3418D506: 0380 LSLS R0, R0, #14
0x3418D508: 2800 CMP R0, #0
0x3418D50A: D40B BMI 46L6 ; 0x3418D524
0x3418D50C: F7F3 FBAC BL HAL_GetTick ; 0x34180C68
0x3418D510: 9901 LDR R1, [SP, #4]
0x3418D512: 1A40 SUBS R0, R0, R1
0x3418D514: F5B0 7F7A CMP.W R0, #0x03E8
0x3418D518: D903 BLS 46L5 ; 0x3418D522
0x3418D51A: 2001 MOVS R0, #1
0x3418D51C: F88D 000F STRB.W R0, [SP, #15]
0x3418D520: E003 B 46L7 ; 0x3418D52A
.L5:
0x3418D522: E7EB B 46L4 ; 0x3418D4FC
.L6:
0x3418D524: 2000 MOVS R0, #0
0x3418D526: F88D 000F STRB.W R0, [SP, #15]
.L7:
0x3418D52A: F89D 000F LDRB.W R0, [SP, #15]
0x3418D52E: B004 ADD SP, SP, #16
0x3418D530: BD80 POP 123R7, PC}
Section .init.EXTI14_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
EXTI14_IRQHandler:
0x3418D532: E7FE B EXTI14_IRQHandler ; 0x3418D532
Section .text.HAL_PWREx_ControlVoltageScaling from blto2_FSBL_lto.o, size=114, align=4
HAL_PWREx_ControlVoltageScaling:
0x3418D534: B580 PUSH 123R7, LR}
0x3418D536: B084 SUB SP, SP, #16
0x3418D538: 9002 STR R0, [SP, #8]
0x3418D53A: 9802 LDR R0, [SP, #8]
0x3418D53C: 2801 CMP R0, #1
0x3418D53E: D001 BEQ 46L1 ; 0x3418D544
0x3418D540: 9802 LDR R0, [SP, #8]
0x3418D542: B900 CBNZ R0, .L2 ; 0x3418D546
.L1:
0x3418D544: E007 B 46L3 ; 0x3418D556
.L2:
0x3418D546: F642 40A0 MOVW R0, #0x2CA0 ; 0x34192CA0 = .rodata..L.str.38
0x3418D54A: F2C3 4019 MOVT R0, #0x3419 ; 0x34192CA0 = .rodata..L.str.38
0x3418D54E: F240 1141 MOVW R1, #0x0141
0x3418D552: F7FF FBED BL assert_failed ; 0x3418CD30
.L3:
0x3418D556: F644 0120 MOVW R1, #0x4820
0x3418D55A: F2C5 6102 MOVT R1, #0x5602
0x3418D55E: 6808 LDR R0, [R1]
0x3418D560: F020 0001 BIC R0, R0, #1
0x3418D564: 9A02 LDR R2, [SP, #8]
0x3418D566: 4310 ORRS R0, R2
0x3418D568: 6008 STR R0, [R1]
0x3418D56A: F7F3 FB7D BL HAL_GetTick ; 0x34180C68
0x3418D56E: 9001 STR R0, [SP, #4]
.L4:
0x3418D570: F644 0020 MOVW R0, #0x4820
0x3418D574: F2C5 6002 MOVT R0, #0x5602
0x3418D578: 6800 LDR R0, [R0]
0x3418D57A: 0780 LSLS R0, R0, #30
0x3418D57C: 2800 CMP R0, #0
0x3418D57E: D40B BMI 46L6 ; 0x3418D598
0x3418D580: F7F3 FB72 BL HAL_GetTick ; 0x34180C68
0x3418D584: 9901 LDR R1, [SP, #4]
0x3418D586: 1A40 SUBS R0, R0, R1
0x3418D588: F5B0 7F7A CMP.W R0, #0x03E8
0x3418D58C: D903 BLS 46L5 ; 0x3418D596
0x3418D58E: 2001 MOVS R0, #1
0x3418D590: F88D 000F STRB.W R0, [SP, #15]
0x3418D594: E003 B 46L7 ; 0x3418D59E
.L5:
0x3418D596: E7EB B 46L4 ; 0x3418D570
.L6:
0x3418D598: 2000 MOVS R0, #0
0x3418D59A: F88D 000F STRB.W R0, [SP, #15]
.L7:
0x3418D59E: F89D 000F LDRB.W R0, [SP, #15]
0x3418D5A2: B004 ADD SP, SP, #16
0x3418D5A4: BD80 POP 123R7, PC}
Section .init.EXTI15_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
EXTI15_IRQHandler:
0x3418D5A6: E7FE B EXTI15_IRQHandler ; 0x3418D5A6
Section .text.HAL_PWREx_ConfigVddIORange from blto2_FSBL_lto.o, size=226, align=4
HAL_PWREx_ConfigVddIORange:
0x3418D5A8: B580 PUSH 123R7, LR}
0x3418D5AA: B084 SUB SP, SP, #16
0x3418D5AC: 9003 STR R0, [SP, #12]
0x3418D5AE: 9102 STR R1, [SP, #8]
0x3418D5B0: 9803 LDR R0, [SP, #12]
0x3418D5B2: B158 CBZ R0, .L1 ; 0x3418D5CC
0x3418D5B4: 9803 LDR R0, [SP, #12]
0x3418D5B6: 2801 CMP R0, #1
0x3418D5B8: D008 BEQ 46L1 ; 0x3418D5CC
0x3418D5BA: 9803 LDR R0, [SP, #12]
0x3418D5BC: 2802 CMP R0, #2
0x3418D5BE: D005 BEQ 46L1 ; 0x3418D5CC
0x3418D5C0: 9803 LDR R0, [SP, #12]
0x3418D5C2: 2803 CMP R0, #3
0x3418D5C4: D002 BEQ 46L1 ; 0x3418D5CC
0x3418D5C6: 9803 LDR R0, [SP, #12]
0x3418D5C8: 2804 CMP R0, #4
0x3418D5CA: D100 BNE 46L2 ; 0x3418D5CE
.L1:
0x3418D5CC: E007 B 46L3 ; 0x3418D5DE
.L2:
0x3418D5CE: F642 40A0 MOVW R0, #0x2CA0 ; 0x34192CA0 = .rodata..L.str.38
0x3418D5D2: F2C3 4019 MOVT R0, #0x3419 ; 0x34192CA0 = .rodata..L.str.38
0x3418D5D6: F240 316A MOVW R1, #0x036A
0x3418D5DA: F7FF FBA9 BL assert_failed ; 0x3418CD30
.L3:
0x3418D5DE: 9802 LDR R0, [SP, #8]
0x3418D5E0: B110 CBZ R0, .L4 ; 0x3418D5E8
0x3418D5E2: 9802 LDR R0, [SP, #8]
0x3418D5E4: 2801 CMP R0, #1
0x3418D5E6: D100 BNE 46L5 ; 0x3418D5EA
.L4:
0x3418D5E8: E007 B 46L6 ; 0x3418D5FA
.L5:
0x3418D5EA: F642 40A0 MOVW R0, #0x2CA0 ; 0x34192CA0 = .rodata..L.str.38
0x3418D5EE: F2C3 4019 MOVT R0, #0x3419 ; 0x34192CA0 = .rodata..L.str.38
0x3418D5F2: F240 316B MOVW R1, #0x036B
0x3418D5F6: F7FF FB9B BL assert_failed ; 0x3418CD30
.L6:
0x3418D5FA: 9803 LDR R0, [SP, #12]
0x3418D5FC: 9001 STR R0, [SP, #4]
0x3418D5FE: 2804 CMP R0, #4
0x3418D600: D841 BHI 46L7 ; 0x3418D686
0x3418D602: 9901 LDR R1, [SP, #4]
0x3418D604: E8DF F001 TBB 91PC, R1]
0x3418D608: 03 DC.B 0x03 ; '\x03'
0x3418D609: 0F DC.B 0x0F ; '\x0F'
0x3418D60A: 1B DC.B 0x1B ; '\x1B'
0x3418D60B: 27 DC.B 0x27 ; '''
0x3418D60C: 33 DC.B 0x33 ; '3'
0x3418D60D: 00 DC.B 0x00 ; '\0'
0x3418D60E: F644 013C MOVW R1, #0x483C
0x3418D612: F2C5 6102 MOVT R1, #0x5602
0x3418D616: 6808 LDR R0, [R1]
0x3418D618: F020 7080 BIC R0, R0, #0x01000000
0x3418D61C: 9A02 LDR R2, [SP, #8]
0x3418D61E: EA40 6002 ORR.W R0, R0, R2, LSL #24
0x3418D622: 6008 STR R0, [R1]
0x3418D624: E02F B 46L7 ; 0x3418D686
0x3418D626: F644 013C MOVW R1, #0x483C
0x3418D62A: F2C5 6102 MOVT R1, #0x5602
0x3418D62E: 6808 LDR R0, [R1]
0x3418D630: F020 7000 BIC R0, R0, #0x02000000
0x3418D634: 9A02 LDR R2, [SP, #8]
0x3418D636: EA40 6042 ORR.W R0, R0, R2, LSL #25
0x3418D63A: 6008 STR R0, [R1]
0x3418D63C: E023 B 46L7 ; 0x3418D686
0x3418D63E: F644 013C MOVW R1, #0x483C
0x3418D642: F2C5 6102 MOVT R1, #0x5602
0x3418D646: 6808 LDR R0, [R1]
0x3418D648: F020 6080 BIC R0, R0, #0x04000000
0x3418D64C: 9A02 LDR R2, [SP, #8]
0x3418D64E: EA40 6082 ORR.W R0, R0, R2, LSL #26
0x3418D652: 6008 STR R0, [R1]
0x3418D654: E017 B 46L7 ; 0x3418D686
0x3418D656: F644 0134 MOVW R1, #0x4834
0x3418D65A: F2C5 6102 MOVT R1, #0x5602
0x3418D65E: 6808 LDR R0, [R1]
0x3418D660: F020 7080 BIC R0, R0, #0x01000000
0x3418D664: 9A02 LDR R2, [SP, #8]
0x3418D666: EA40 6002 ORR.W R0, R0, R2, LSL #24
0x3418D66A: 6008 STR R0, [R1]
0x3418D66C: E00B B 46L7 ; 0x3418D686
0x3418D66E: F644 0138 MOVW R1, #0x4838
0x3418D672: F2C5 6102 MOVT R1, #0x5602
0x3418D676: 6808 LDR R0, [R1]
0x3418D678: F020 7080 BIC R0, R0, #0x01000000
0x3418D67C: 9A02 LDR R2, [SP, #8]
0x3418D67E: EA40 6002 ORR.W R0, R0, R2, LSL #24
0x3418D682: 6008 STR R0, [R1]
0x3418D684: E7FF B 46L7 ; 0x3418D686
.L7:
0x3418D686: B004 ADD SP, SP, #16
0x3418D688: BD80 POP 123R7, PC}
Section .init.SAES_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
SAES_IRQHandler:
0x3418D68A: E7FE B SAES_IRQHandler ; 0x3418D68A
Section .text.HAL_PWREx_EnableVddIO3 from blto2_FSBL_lto.o, size=18, align=4
HAL_PWREx_EnableVddIO3:
0x3418D68C: F644 013C MOVW R1, #0x483C
0x3418D690: F2C5 6102 MOVT R1, #0x5602
0x3418D694: 6808 LDR R0, [R1]
0x3418D696: F440 7000 ORR R0, R0, #0x0200
0x3418D69A: 6008 STR R0, [R1]
0x3418D69C: 4770 BX LR
Section .init.CRYP_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
CRYP_IRQHandler:
0x3418D69E: E7FE B CRYP_IRQHandler ; 0x3418D69E
Section .text.LL_RCC_HSI_Enable from blto2_FSBL_lto.o, size=14, align=4
LL_RCC_HSI_Enable:
0x3418D6A0: F648 0100 MOVW R1, #0x8800
0x3418D6A4: F2C5 6102 MOVT R1, #0x5602
0x3418D6A8: 2008 MOVS R0, #8
0x3418D6AA: 6008 STR R0, [R1]
0x3418D6AC: 4770 BX LR
Section .init.PKA_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
PKA_IRQHandler:
0x3418D6AE: E7FE B PKA_IRQHandler ; 0x3418D6AE
Section .text.HAL_RCC_OscConfig from blto2_FSBL_lto.o, size=2810, align=4
HAL_RCC_OscConfig:
0x3418D6B0: B580 PUSH 123R7, LR}
0x3418D6B2: B0A2 SUB SP, SP, #136
0x3418D6B4: 9020 STR R0, [SP, #128]
0x3418D6B6: 9820 LDR R0, [SP, #128]
0x3418D6B8: B920 CBNZ R0, .L1 ; 0x3418D6C4
0x3418D6BA: 2001 MOVS R0, #1
0x3418D6BC: F88D 0087 STRB.W R0, [SP, #135]
0x3418D6C0: F000 BD6F B.W 46L144 ; 0x3418E1A2
.L1:
0x3418D6C4: 9820 LDR R0, [SP, #128]
0x3418D6C6: 6800 LDR R0, [R0]
0x3418D6C8: B1E0 CBZ R0, .L2 ; 0x3418D704
0x3418D6CA: 9820 LDR R0, [SP, #128]
0x3418D6CC: 6800 LDR R0, [R0]
0x3418D6CE: F000 0001 AND R0, R0, #1
0x3418D6D2: 2801 CMP R0, #1
0x3418D6D4: D016 BEQ 46L2 ; 0x3418D704
0x3418D6D6: 9820 LDR R0, [SP, #128]
0x3418D6D8: 6800 LDR R0, [R0]
0x3418D6DA: F000 0002 AND R0, R0, #2
0x3418D6DE: 2802 CMP R0, #2
0x3418D6E0: D010 BEQ 46L2 ; 0x3418D704
0x3418D6E2: 9820 LDR R0, [SP, #128]
0x3418D6E4: 6800 LDR R0, [R0]
0x3418D6E6: F000 0010 AND R0, R0, #16
0x3418D6EA: 2810 CMP R0, #16
0x3418D6EC: D00A BEQ 46L2 ; 0x3418D704
0x3418D6EE: 9820 LDR R0, [SP, #128]
0x3418D6F0: 6800 LDR R0, [R0]
0x3418D6F2: F000 0008 AND R0, R0, #8
0x3418D6F6: 2808 CMP R0, #8
0x3418D6F8: D004 BEQ 46L2 ; 0x3418D704
0x3418D6FA: 9820 LDR R0, [SP, #128]
0x3418D6FC: 7800 LDRB R0, [R0]
0x3418D6FE: 0740 LSLS R0, R0, #29
0x3418D700: 2800 CMP R0, #0
0x3418D702: D500 BPL 46L3 ; 0x3418D706
.L2:
0x3418D704: E007 B 46L4 ; 0x3418D716
.L3:
0x3418D706: F642 30C4 MOVW R0, #0x2BC4 ; 0x34192BC4 = .rodata..L.str.47
0x3418D70A: F2C3 4019 MOVT R0, #0x3419 ; 0x34192BC4 = .rodata..L.str.47
0x3418D70E: F44F 71BB MOV.W R1, #0x0176
0x3418D712: F7FF FB0D BL assert_failed ; 0x3418CD30
.L4:
0x3418D716: F7F3 FFF3 BL LL_RCC_GetCpuClkSource ; 0x34181700
0x3418D71A: 901D STR R0, [SP, #116]
0x3418D71C: F7F3 FFF8 BL LL_RCC_GetSysClkSource ; 0x34181710
0x3418D720: 901E STR R0, [SP, #120]
0x3418D722: F7F3 FFFD BL LL_RCC_PLL1_GetSource ; 0x34181720
0x3418D726: 901C STR R0, [SP, #112]
0x3418D728: F7F4 F802 BL LL_RCC_PLL2_GetSource ; 0x34181730
0x3418D72C: 901B STR R0, [SP, #108]
0x3418D72E: F7F4 F807 BL LL_RCC_PLL3_GetSource ; 0x34181740
0x3418D732: 901A STR R0, [SP, #104]
0x3418D734: F7F4 F80C BL LL_RCC_PLL4_GetSource ; 0x34181750
0x3418D738: 9019 STR R0, [SP, #100]
0x3418D73A: F248 0004 MOVW R0, #0x8004
0x3418D73E: F2C5 6002 MOVT R0, #0x5602
0x3418D742: 6800 LDR R0, [R0]
0x3418D744: 9018 STR R0, [SP, #96]
0x3418D746: 9820 LDR R0, [SP, #128]
0x3418D748: 7800 LDRB R0, [R0]
0x3418D74A: 07C0 LSLS R0, R0, #31
0x3418D74C: 2800 CMP R0, #0
0x3418D74E: F000 8101 BEQ.W 46L29 ; 0x3418D954
0x3418D752: 9820 LDR R0, [SP, #128]
0x3418D754: 6840 LDR R0, [R0, #4]
0x3418D756: B188 CBZ R0, .L5 ; 0x3418D77C
0x3418D758: 9820 LDR R0, [SP, #128]
0x3418D75A: 6840 LDR R0, [R0, #4]
0x3418D75C: 2810 CMP R0, #16
0x3418D75E: D00D BEQ 46L5 ; 0x3418D77C
0x3418D760: 9820 LDR R0, [SP, #128]
0x3418D762: 6840 LDR R0, [R0, #4]
0x3418D764: F248 0110 MOVW R1, #0x8010
0x3418D768: 4288 CMP R0, R1
0x3418D76A: D007 BEQ 46L5 ; 0x3418D77C
0x3418D76C: 9820 LDR R0, [SP, #128]
0x3418D76E: 6840 LDR R0, [R0, #4]
0x3418D770: F248 0110 MOVW R1, #0x8010
0x3418D774: F2C0 0101 MOVT R1, #1
0x3418D778: 4288 CMP R0, R1
0x3418D77A: D100 BNE 46L6 ; 0x3418D77E
.L5:
0x3418D77C: E007 B 46L7 ; 0x3418D78E
.L6:
0x3418D77E: F642 30C4 MOVW R0, #0x2BC4 ; 0x34192BC4 = .rodata..L.str.47
0x3418D782: F2C3 4019 MOVT R0, #0x3419 ; 0x34192BC4 = .rodata..L.str.47
0x3418D786: F44F 71C2 MOV.W R1, #0x0184
0x3418D78A: F7FF FAD1 BL assert_failed ; 0x3418CD30
.L7:
0x3418D78E: 981D LDR R0, [SP, #116]
0x3418D790: F5B0 1F00 CMP.W R0, #0x200000
0x3418D794: D02A BEQ 46L11 ; 0x3418D7EC
0x3418D796: 981E LDR R0, [SP, #120]
0x3418D798: F1B0 5F00 CMP.W R0, #0x20000000
0x3418D79C: D026 BEQ 46L11 ; 0x3418D7EC
0x3418D79E: 981C LDR R0, [SP, #112]
0x3418D7A0: F1B0 5F00 CMP.W R0, #0x20000000
0x3418D7A4: D105 BNE 46L8 ; 0x3418D7B2
0x3418D7A6: 9818 LDR R0, [SP, #96]
0x3418D7A8: F400 7080 AND R0, R0, #0x0100
0x3418D7AC: F5B0 7F80 CMP.W R0, #0x0100
0x3418D7B0: D01C BEQ 46L11 ; 0x3418D7EC
.L8:
0x3418D7B2: 981B LDR R0, [SP, #108]
0x3418D7B4: F1B0 5F00 CMP.W R0, #0x20000000
0x3418D7B8: D105 BNE 46L9 ; 0x3418D7C6
0x3418D7BA: 9818 LDR R0, [SP, #96]
0x3418D7BC: F400 7000 AND R0, R0, #0x0200
0x3418D7C0: F5B0 7F00 CMP.W R0, #0x0200
0x3418D7C4: D012 BEQ 46L11 ; 0x3418D7EC
.L9:
0x3418D7C6: 981A LDR R0, [SP, #104]
0x3418D7C8: F1B0 5F00 CMP.W R0, #0x20000000
0x3418D7CC: D105 BNE 46L10 ; 0x3418D7DA
0x3418D7CE: 9818 LDR R0, [SP, #96]
0x3418D7D0: F400 6080 AND R0, R0, #0x0400
0x3418D7D4: F5B0 6F80 CMP.W R0, #0x0400
0x3418D7D8: D008 BEQ 46L11 ; 0x3418D7EC
.L10:
0x3418D7DA: 9819 LDR R0, [SP, #100]
0x3418D7DC: F1B0 5F00 CMP.W R0, #0x20000000
0x3418D7E0: D12E BNE 46L18 ; 0x3418D840
0x3418D7E2: F89D 0061 LDRB.W R0, [SP, #97]
0x3418D7E6: 0700 LSLS R0, R0, #28
0x3418D7E8: 2800 CMP R0, #0
0x3418D7EA: D529 BPL 46L18 ; 0x3418D840
.L11:
0x3418D7EC: 9820 LDR R0, [SP, #128]
0x3418D7EE: 6840 LDR R0, [R0, #4]
0x3418D7F0: B920 CBNZ R0, .L12 ; 0x3418D7FC
0x3418D7F2: 2001 MOVS R0, #1
0x3418D7F4: F88D 0087 STRB.W R0, [SP, #135]
0x3418D7F8: F000 BCD3 B.W 46L144 ; 0x3418E1A2
.L12:
0x3418D7FC: F7F3 FA34 BL HAL_GetTick ; 0x34180C68
0x3418D800: 901F STR R0, [SP, #124]
.L13:
0x3418D802: F248 0004 MOVW R0, #0x8004
0x3418D806: F2C5 6002 MOVT R0, #0x5602
0x3418D80A: 6800 LDR R0, [R0]
0x3418D80C: 06C0 LSLS R0, R0, #27
0x3418D80E: 2800 CMP R0, #0
0x3418D810: D40B BMI 46L15 ; 0x3418D82A
0x3418D812: F7F3 FA29 BL HAL_GetTick ; 0x34180C68
0x3418D816: 991F LDR R1, [SP, #124]
0x3418D818: 1A40 SUBS R0, R0, R1
0x3418D81A: 2865 CMP R0, #101
0x3418D81C: D304 BCC 46L14 ; 0x3418D828
0x3418D81E: 2003 MOVS R0, #3
0x3418D820: F88D 0087 STRB.W R0, [SP, #135]
0x3418D824: F000 BCBD B.W 46L144 ; 0x3418E1A2
.L14:
0x3418D828: E7EB B 46L13 ; 0x3418D802
.L15:
0x3418D82A: F7F3 FA1D BL HAL_GetTick ; 0x34180C68
0x3418D82E: 901F STR R0, [SP, #124]
.L16:
0x3418D830: F7F3 FA1A BL HAL_GetTick ; 0x34180C68
0x3418D834: 991F LDR R1, [SP, #124]
0x3418D836: 1A40 SUBS R0, R0, R1
0x3418D838: 2801 CMP R0, #1
0x3418D83A: D800 BHI 46L17 ; 0x3418D83E
0x3418D83C: E7F8 B 46L16 ; 0x3418D830
.L17:
0x3418D83E: E089 B 46L29 ; 0x3418D954
.L18:
0x3418D840: 9820 LDR R0, [SP, #128]
0x3418D842: 6840 LDR R0, [R0, #4]
0x3418D844: 2810 CMP R0, #16
0x3418D846: D106 BNE 46L19 ; 0x3418D856
0x3418D848: F648 0100 MOVW R1, #0x8800
0x3418D84C: F2C5 6102 MOVT R1, #0x5602
0x3418D850: 2010 MOVS R0, #16
0x3418D852: 6008 STR R0, [R1]
0x3418D854: E04F B 46L23 ; 0x3418D8F6
.L19:
0x3418D856: 9820 LDR R0, [SP, #128]
0x3418D858: 6840 LDR R0, [R0, #4]
0x3418D85A: B970 CBNZ R0, .L20 ; 0x3418D87A
0x3418D85C: F249 0100 MOVW R1, #0x9000
0x3418D860: F2C5 6102 MOVT R1, #0x5602
0x3418D864: 2010 MOVS R0, #16
0x3418D866: 6008 STR R0, [R1]
0x3418D868: F248 0154 MOVW R1, #0x8054
0x3418D86C: F2C5 6102 MOVT R1, #0x5602
0x3418D870: 6808 LDR R0, [R1]
0x3418D872: F420 30C0 BIC R0, R0, #0x018000
0x3418D876: 6008 STR R0, [R1]
0x3418D878: E03D B 46L23 ; 0x3418D8F6
.L20:
0x3418D87A: 9820 LDR R0, [SP, #128]
0x3418D87C: 6840 LDR R0, [R0, #4]
0x3418D87E: F248 0110 MOVW R1, #0x8010
0x3418D882: 4288 CMP R0, R1
0x3418D884: D112 BNE 46L21 ; 0x3418D8AC
0x3418D886: F248 0154 MOVW R1, #0x8054
0x3418D88A: F2C5 6102 MOVT R1, #0x5602
0x3418D88E: 6808 LDR R0, [R1]
0x3418D890: F440 4000 ORR R0, R0, #0x8000
0x3418D894: 6008 STR R0, [R1]
0x3418D896: 6808 LDR R0, [R1]
0x3418D898: F420 3080 BIC R0, R0, #0x010000
0x3418D89C: 6008 STR R0, [R1]
0x3418D89E: F648 0100 MOVW R1, #0x8800
0x3418D8A2: F2C5 6102 MOVT R1, #0x5602
0x3418D8A6: 2010 MOVS R0, #16
0x3418D8A8: 6008 STR R0, [R1]
0x3418D8AA: E024 B 46L23 ; 0x3418D8F6
.L21:
0x3418D8AC: 9820 LDR R0, [SP, #128]
0x3418D8AE: 6840 LDR R0, [R0, #4]
0x3418D8B0: F248 0110 MOVW R1, #0x8010
0x3418D8B4: F2C0 0101 MOVT R1, #1
0x3418D8B8: 4288 CMP R0, R1
0x3418D8BA: D10E BNE 46L22 ; 0x3418D8DA
0x3418D8BC: F248 0154 MOVW R1, #0x8054
0x3418D8C0: F2C5 6102 MOVT R1, #0x5602
0x3418D8C4: 6808 LDR R0, [R1]
0x3418D8C6: F440 30C0 ORR R0, R0, #0x018000
0x3418D8CA: 6008 STR R0, [R1]
0x3418D8CC: F648 0100 MOVW R1, #0x8800
0x3418D8D0: F2C5 6102 MOVT R1, #0x5602
0x3418D8D4: 2010 MOVS R0, #16
0x3418D8D6: 6008 STR R0, [R1]
0x3418D8D8: E00D B 46L23 ; 0x3418D8F6
.L22:
0x3418D8DA: F249 0100 MOVW R1, #0x9000
0x3418D8DE: F2C5 6102 MOVT R1, #0x5602
0x3418D8E2: 2010 MOVS R0, #16
0x3418D8E4: 6008 STR R0, [R1]
0x3418D8E6: F248 0154 MOVW R1, #0x8054
0x3418D8EA: F2C5 6102 MOVT R1, #0x5602
0x3418D8EE: 6808 LDR R0, [R1]
0x3418D8F0: F420 30C0 BIC R0, R0, #0x018000
0x3418D8F4: 6008 STR R0, [R1]
.L23:
0x3418D8F6: F7F3 F9B7 BL HAL_GetTick ; 0x34180C68
0x3418D8FA: 901F STR R0, [SP, #124]
0x3418D8FC: 9820 LDR R0, [SP, #128]
0x3418D8FE: 6840 LDR R0, [R0, #4]
0x3418D900: B1A0 CBZ R0, .L27 ; 0x3418D92C
.L24:
0x3418D902: F248 0004 MOVW R0, #0x8004
0x3418D906: F2C5 6002 MOVT R0, #0x5602
0x3418D90A: 6800 LDR R0, [R0]
0x3418D90C: 06C0 LSLS R0, R0, #27
0x3418D90E: 2800 CMP R0, #0
0x3418D910: D40B BMI 46L26 ; 0x3418D92A
0x3418D912: F7F3 F9A9 BL HAL_GetTick ; 0x34180C68
0x3418D916: 991F LDR R1, [SP, #124]
0x3418D918: 1A40 SUBS R0, R0, R1
0x3418D91A: 2865 CMP R0, #101
0x3418D91C: D304 BCC 46L25 ; 0x3418D928
0x3418D91E: 2003 MOVS R0, #3
0x3418D920: F88D 0087 STRB.W R0, [SP, #135]
0x3418D924: F000 BC3D B.W 46L144 ; 0x3418E1A2
.L25:
0x3418D928: E7EB B 46L24 ; 0x3418D902
.L26:
0x3418D92A: E013 B 46L29 ; 0x3418D954
.L27:
0x3418D92C: F248 0004 MOVW R0, #0x8004
0x3418D930: F2C5 6002 MOVT R0, #0x5602
0x3418D934: 6800 LDR R0, [R0]
0x3418D936: 06C0 LSLS R0, R0, #27
0x3418D938: 2800 CMP R0, #0
0x3418D93A: D50B BPL 46L29 ; 0x3418D954
0x3418D93C: F7F3 F994 BL HAL_GetTick ; 0x34180C68
0x3418D940: 991F LDR R1, [SP, #124]
0x3418D942: 1A40 SUBS R0, R0, R1
0x3418D944: 2865 CMP R0, #101
0x3418D946: D304 BCC 46L28 ; 0x3418D952
0x3418D948: 2003 MOVS R0, #3
0x3418D94A: F88D 0087 STRB.W R0, [SP, #135]
0x3418D94E: F000 BC28 B.W 46L144 ; 0x3418E1A2
.L28:
0x3418D952: E7EB B 46L27 ; 0x3418D92C
.L29:
0x3418D954: 9820 LDR R0, [SP, #128]
0x3418D956: 7800 LDRB R0, [R0]
0x3418D958: 0780 LSLS R0, R0, #30
0x3418D95A: 2800 CMP R0, #0
0x3418D95C: F140 80C4 BPL.W 46L55 ; 0x3418DAE8
0x3418D960: 9820 LDR R0, [SP, #128]
0x3418D962: 68C0 LDR R0, [R0, #12]
0x3418D964: B118 CBZ R0, .L30 ; 0x3418D96E
0x3418D966: 9820 LDR R0, [SP, #128]
0x3418D968: 68C0 LDR R0, [R0, #12]
0x3418D96A: 2808 CMP R0, #8
0x3418D96C: D100 BNE 46L31 ; 0x3418D970
.L30:
0x3418D96E: E007 B 46L32 ; 0x3418D980
.L31:
0x3418D970: F642 30C4 MOVW R0, #0x2BC4 ; 0x34192BC4 = .rodata..L.str.47
0x3418D974: F2C3 4019 MOVT R0, #0x3419 ; 0x34192BC4 = .rodata..L.str.47
0x3418D978: F240 11CD MOVW R1, #0x01CD
0x3418D97C: F7FF F9D8 BL assert_failed ; 0x3418CD30
.L32:
0x3418D980: 981D LDR R0, [SP, #116]
0x3418D982: B300 CBZ R0, .L36 ; 0x3418D9C6
0x3418D984: 981E LDR R0, [SP, #120]
0x3418D986: B1F0 CBZ R0, .L36 ; 0x3418D9C6
0x3418D988: 981C LDR R0, [SP, #112]
0x3418D98A: B928 CBNZ R0, .L33 ; 0x3418D998
0x3418D98C: 9818 LDR R0, [SP, #96]
0x3418D98E: F400 7080 AND R0, R0, #0x0100
0x3418D992: F5B0 7F80 CMP.W R0, #0x0100
0x3418D996: D016 BEQ 46L36 ; 0x3418D9C6
.L33:
0x3418D998: 981B LDR R0, [SP, #108]
0x3418D99A: B928 CBNZ R0, .L34 ; 0x3418D9A8
0x3418D99C: 9818 LDR R0, [SP, #96]
0x3418D99E: F400 7000 AND R0, R0, #0x0200
0x3418D9A2: F5B0 7F00 CMP.W R0, #0x0200
0x3418D9A6: D00E BEQ 46L36 ; 0x3418D9C6
.L34:
0x3418D9A8: 981A LDR R0, [SP, #104]
0x3418D9AA: B928 CBNZ R0, .L35 ; 0x3418D9B8
0x3418D9AC: 9818 LDR R0, [SP, #96]
0x3418D9AE: F400 6080 AND R0, R0, #0x0400
0x3418D9B2: F5B0 6F80 CMP.W R0, #0x0400
0x3418D9B6: D006 BEQ 46L36 ; 0x3418D9C6
.L35:
0x3418D9B8: 9819 LDR R0, [SP, #100]
0x3418D9BA: BBD8 CBNZ R0, .L43 ; 0x3418DA34
0x3418D9BC: F89D 0061 LDRB.W R0, [SP, #97]
0x3418D9C0: 0700 LSLS R0, R0, #28
0x3418D9C2: 2800 CMP R0, #0
0x3418D9C4: D536 BPL 46L43 ; 0x3418DA34
.L36:
0x3418D9C6: 9820 LDR R0, [SP, #128]
0x3418D9C8: 68C0 LDR R0, [R0, #12]
0x3418D9CA: B918 CBNZ R0, .L37 ; 0x3418D9D4
0x3418D9CC: 2001 MOVS R0, #1
0x3418D9CE: F88D 0087 STRB.W R0, [SP, #135]
0x3418D9D2: E3E6 B 46L144 ; 0x3418E1A2
.L37:
0x3418D9D4: 9820 LDR R0, [SP, #128]
0x3418D9D6: 6900 LDR R0, [R0, #16]
0x3418D9D8: B168 CBZ R0, .L38 ; 0x3418D9F6
0x3418D9DA: 9820 LDR R0, [SP, #128]
0x3418D9DC: 6900 LDR R0, [R0, #16]
0x3418D9DE: 2880 CMP R0, #128
0x3418D9E0: D009 BEQ 46L38 ; 0x3418D9F6
0x3418D9E2: 9820 LDR R0, [SP, #128]
0x3418D9E4: 6900 LDR R0, [R0, #16]
0x3418D9E6: F5B0 7F80 CMP.W R0, #0x0100
0x3418D9EA: D004 BEQ 46L38 ; 0x3418D9F6
0x3418D9EC: 9820 LDR R0, [SP, #128]
0x3418D9EE: 6900 LDR R0, [R0, #16]
0x3418D9F0: F5B0 7FC0 CMP.W R0, #0x0180
0x3418D9F4: D100 BNE 46L39 ; 0x3418D9F8
.L38:
0x3418D9F6: E007 B 46L40 ; 0x3418DA08
.L39:
0x3418D9F8: F642 30C4 MOVW R0, #0x2BC4 ; 0x34192BC4 = .rodata..L.str.47
0x3418D9FC: F2C3 4019 MOVT R0, #0x3419 ; 0x34192BC4 = .rodata..L.str.47
0x3418DA00: F240 11DF MOVW R1, #0x01DF
0x3418DA04: F7FF F994 BL assert_failed ; 0x3418CD30
.L40:
0x3418DA08: 9820 LDR R0, [SP, #128]
0x3418DA0A: 6940 LDR R0, [R0, #20]
0x3418DA0C: 287F CMP R0, #127
0x3418DA0E: D800 BHI 46L41 ; 0x3418DA12
0x3418DA10: E007 B 46L42 ; 0x3418DA22
.L41:
0x3418DA12: F642 30C4 MOVW R0, #0x2BC4 ; 0x34192BC4 = .rodata..L.str.47
0x3418DA16: F2C3 4019 MOVT R0, #0x3419 ; 0x34192BC4 = .rodata..L.str.47
0x3418DA1A: F44F 71F0 MOV.W R1, #0x01E0
0x3418DA1E: F7FF F987 BL assert_failed ; 0x3418CD30
.L42:
0x3418DA22: 9820 LDR R0, [SP, #128]
0x3418DA24: 6900 LDR R0, [R0, #16]
0x3418DA26: F7F3 FE55 BL LL_RCC_HSI_SetDivider ; 0x341816D4
0x3418DA2A: 9820 LDR R0, [SP, #128]
0x3418DA2C: 6940 LDR R0, [R0, #20]
0x3418DA2E: F000 FBBD BL LL_RCC_HSI_SetCalibTrimming ; 0x3418E1AC
0x3418DA32: E059 B 46L55 ; 0x3418DAE8
.L43:
0x3418DA34: 9820 LDR R0, [SP, #128]
0x3418DA36: 68C0 LDR R0, [R0, #12]
0x3418DA38: 2800 CMP R0, #0
0x3418DA3A: D042 BEQ 46L52 ; 0x3418DAC2
0x3418DA3C: 9820 LDR R0, [SP, #128]
0x3418DA3E: 6900 LDR R0, [R0, #16]
0x3418DA40: B168 CBZ R0, .L44 ; 0x3418DA5E
0x3418DA42: 9820 LDR R0, [SP, #128]
0x3418DA44: 6900 LDR R0, [R0, #16]
0x3418DA46: 2880 CMP R0, #128
0x3418DA48: D009 BEQ 46L44 ; 0x3418DA5E
0x3418DA4A: 9820 LDR R0, [SP, #128]
0x3418DA4C: 6900 LDR R0, [R0, #16]
0x3418DA4E: F5B0 7F80 CMP.W R0, #0x0100
0x3418DA52: D004 BEQ 46L44 ; 0x3418DA5E
0x3418DA54: 9820 LDR R0, [SP, #128]
0x3418DA56: 6900 LDR R0, [R0, #16]
0x3418DA58: F5B0 7FC0 CMP.W R0, #0x0180
0x3418DA5C: D100 BNE 46L45 ; 0x3418DA60
.L44:
0x3418DA5E: E007 B 46L46 ; 0x3418DA70
.L45:
0x3418DA60: F642 30C4 MOVW R0, #0x2BC4 ; 0x34192BC4 = .rodata..L.str.47
0x3418DA64: F2C3 4019 MOVT R0, #0x3419 ; 0x34192BC4 = .rodata..L.str.47
0x3418DA68: F44F 71F7 MOV.W R1, #0x01EE
0x3418DA6C: F7FF F960 BL assert_failed ; 0x3418CD30
.L46:
0x3418DA70: 9820 LDR R0, [SP, #128]
0x3418DA72: 6940 LDR R0, [R0, #20]
0x3418DA74: 287F CMP R0, #127
0x3418DA76: D800 BHI 46L47 ; 0x3418DA7A
0x3418DA78: E007 B 46L48 ; 0x3418DA8A
.L47:
0x3418DA7A: F642 30C4 MOVW R0, #0x2BC4 ; 0x34192BC4 = .rodata..L.str.47
0x3418DA7E: F2C3 4019 MOVT R0, #0x3419 ; 0x34192BC4 = .rodata..L.str.47
0x3418DA82: F240 11EF MOVW R1, #0x01EF
0x3418DA86: F7FF F953 BL assert_failed ; 0x3418CD30
.L48:
0x3418DA8A: F7FF FE09 BL LL_RCC_HSI_Enable ; 0x3418D6A0
0x3418DA8E: F7F3 F8EB BL HAL_GetTick ; 0x34180C68
0x3418DA92: 901F STR R0, [SP, #124]
.L49:
0x3418DA94: F7F3 FE2C BL LL_RCC_HSI_IsReady ; 0x341816F0
0x3418DA98: B950 CBNZ R0, .L51 ; 0x3418DAB0
0x3418DA9A: F7F3 F8E5 BL HAL_GetTick ; 0x34180C68
0x3418DA9E: 991F LDR R1, [SP, #124]
0x3418DAA0: 1A40 SUBS R0, R0, R1
0x3418DAA2: 2802 CMP R0, #2
0x3418DAA4: D303 BCC 46L50 ; 0x3418DAAE
0x3418DAA6: 2003 MOVS R0, #3
0x3418DAA8: F88D 0087 STRB.W R0, [SP, #135]
0x3418DAAC: E379 B 46L144 ; 0x3418E1A2
.L50:
0x3418DAAE: E7F1 B 46L49 ; 0x3418DA94
.L51:
0x3418DAB0: 9820 LDR R0, [SP, #128]
0x3418DAB2: 6900 LDR R0, [R0, #16]
0x3418DAB4: F7F3 FE0E BL LL_RCC_HSI_SetDivider ; 0x341816D4
0x3418DAB8: 9820 LDR R0, [SP, #128]
0x3418DABA: 6940 LDR R0, [R0, #20]
0x3418DABC: F000 FB76 BL LL_RCC_HSI_SetCalibTrimming ; 0x3418E1AC
0x3418DAC0: E012 B 46L55 ; 0x3418DAE8
.L52:
0x3418DAC2: F000 FB83 BL LL_RCC_HSI_Disable ; 0x3418E1CC
0x3418DAC6: F7F3 F8CF BL HAL_GetTick ; 0x34180C68
0x3418DACA: 901F STR R0, [SP, #124]
.L53:
0x3418DACC: F7F3 FE10 BL LL_RCC_HSI_IsReady ; 0x341816F0
0x3418DAD0: B150 CBZ R0, .L55 ; 0x3418DAE8
0x3418DAD2: F7F3 F8C9 BL HAL_GetTick ; 0x34180C68
0x3418DAD6: 991F LDR R1, [SP, #124]
0x3418DAD8: 1A40 SUBS R0, R0, R1
0x3418DADA: 2802 CMP R0, #2
0x3418DADC: D303 BCC 46L54 ; 0x3418DAE6
0x3418DADE: 2003 MOVS R0, #3
0x3418DAE0: F88D 0087 STRB.W R0, [SP, #135]
0x3418DAE4: E35D B 46L144 ; 0x3418E1A2
.L54:
0x3418DAE6: E7F1 B 46L53 ; 0x3418DACC
.L55:
0x3418DAE8: 9820 LDR R0, [SP, #128]
0x3418DAEA: 7800 LDRB R0, [R0]
0x3418DAEC: 06C0 LSLS R0, R0, #27
0x3418DAEE: 2800 CMP R0, #0
0x3418DAF0: F140 80A8 BPL.W 46L78 ; 0x3418DC44
0x3418DAF4: 9820 LDR R0, [SP, #128]
0x3418DAF6: 69C0 LDR R0, [R0, #28]
0x3418DAF8: B118 CBZ R0, .L56 ; 0x3418DB02
0x3418DAFA: 9820 LDR R0, [SP, #128]
0x3418DAFC: 69C0 LDR R0, [R0, #28]
0x3418DAFE: 2804 CMP R0, #4
0x3418DB00: D100 BNE 46L57 ; 0x3418DB04
.L56:
0x3418DB02: E007 B 46L58 ; 0x3418DB14
.L57:
0x3418DB04: F642 30C4 MOVW R0, #0x2BC4 ; 0x34192BC4 = .rodata..L.str.47
0x3418DB08: F2C3 4019 MOVT R0, #0x3419 ; 0x34192BC4 = .rodata..L.str.47
0x3418DB0C: F240 211D MOVW R1, #0x021D
0x3418DB10: F7FF F90E BL assert_failed ; 0x3418CD30
.L58:
0x3418DB14: 981D LDR R0, [SP, #116]
0x3418DB16: F5B0 1F80 CMP.W R0, #0x100000
0x3418DB1A: D02A BEQ 46L62 ; 0x3418DB72
0x3418DB1C: 981E LDR R0, [SP, #120]
0x3418DB1E: F1B0 5F80 CMP.W R0, #0x10000000
0x3418DB22: D026 BEQ 46L62 ; 0x3418DB72
0x3418DB24: 981C LDR R0, [SP, #112]
0x3418DB26: F1B0 5F80 CMP.W R0, #0x10000000
0x3418DB2A: D105 BNE 46L59 ; 0x3418DB38
0x3418DB2C: 9818 LDR R0, [SP, #96]
0x3418DB2E: F400 7080 AND R0, R0, #0x0100
0x3418DB32: F5B0 7F80 CMP.W R0, #0x0100
0x3418DB36: D01C BEQ 46L62 ; 0x3418DB72
.L59:
0x3418DB38: 981B LDR R0, [SP, #108]
0x3418DB3A: F1B0 5F80 CMP.W R0, #0x10000000
0x3418DB3E: D105 BNE 46L60 ; 0x3418DB4C
0x3418DB40: 9818 LDR R0, [SP, #96]
0x3418DB42: F400 7000 AND R0, R0, #0x0200
0x3418DB46: F5B0 7F00 CMP.W R0, #0x0200
0x3418DB4A: D012 BEQ 46L62 ; 0x3418DB72
.L60:
0x3418DB4C: 981A LDR R0, [SP, #104]
0x3418DB4E: F1B0 5F80 CMP.W R0, #0x10000000
0x3418DB52: D105 BNE 46L61 ; 0x3418DB60
0x3418DB54: 9818 LDR R0, [SP, #96]
0x3418DB56: F400 6080 AND R0, R0, #0x0400
0x3418DB5A: F5B0 6F80 CMP.W R0, #0x0400
0x3418DB5E: D008 BEQ 46L62 ; 0x3418DB72
.L61:
0x3418DB60: 9819 LDR R0, [SP, #100]
0x3418DB62: F1B0 5F80 CMP.W R0, #0x10000000
0x3418DB66: D11D BNE 46L66 ; 0x3418DBA4
0x3418DB68: F89D 0061 LDRB.W R0, [SP, #97]
0x3418DB6C: 0700 LSLS R0, R0, #28
0x3418DB6E: 2800 CMP R0, #0
0x3418DB70: D518 BPL 46L66 ; 0x3418DBA4
.L62:
0x3418DB72: 9820 LDR R0, [SP, #128]
0x3418DB74: 69C0 LDR R0, [R0, #28]
0x3418DB76: B918 CBNZ R0, .L63 ; 0x3418DB80
0x3418DB78: 2001 MOVS R0, #1
0x3418DB7A: F88D 0087 STRB.W R0, [SP, #135]
0x3418DB7E: E310 B 46L144 ; 0x3418E1A2
.L63:
0x3418DB80: 9820 LDR R0, [SP, #128]
0x3418DB82: 6A40 LDR R0, [R0, #36]
0x3418DB84: 281F CMP R0, #31
0x3418DB86: D800 BHI 46L64 ; 0x3418DB8A
0x3418DB88: E007 B 46L65 ; 0x3418DB9A
.L64:
0x3418DB8A: F642 30C4 MOVW R0, #0x2BC4 ; 0x34192BC4 = .rodata..L.str.47
0x3418DB8E: F2C3 4019 MOVT R0, #0x3419 ; 0x34192BC4 = .rodata..L.str.47
0x3418DB92: F44F 710C MOV.W R1, #0x0230
0x3418DB96: F7FF F8CB BL assert_failed ; 0x3418CD30
.L65:
0x3418DB9A: 9820 LDR R0, [SP, #128]
0x3418DB9C: 6A40 LDR R0, [R0, #36]
0x3418DB9E: F000 FB1D BL LL_RCC_MSI_SetCalibTrimming ; 0x3418E1DC
0x3418DBA2: E04F B 46L78 ; 0x3418DC44
.L66:
0x3418DBA4: 9820 LDR R0, [SP, #128]
0x3418DBA6: 69C0 LDR R0, [R0, #28]
0x3418DBA8: B3C8 CBZ R0, .L75 ; 0x3418DC1E
0x3418DBAA: 9820 LDR R0, [SP, #128]
0x3418DBAC: 6A00 LDR R0, [R0, #32]
0x3418DBAE: B120 CBZ R0, .L67 ; 0x3418DBBA
0x3418DBB0: 9820 LDR R0, [SP, #128]
0x3418DBB2: 6A00 LDR R0, [R0, #32]
0x3418DBB4: F5B0 7F00 CMP.W R0, #0x0200
0x3418DBB8: D100 BNE 46L68 ; 0x3418DBBC
.L67:
0x3418DBBA: E007 B 46L69 ; 0x3418DBCC
.L68:
0x3418DBBC: F642 30C4 MOVW R0, #0x2BC4 ; 0x34192BC4 = .rodata..L.str.47
0x3418DBC0: F2C3 4019 MOVT R0, #0x3419 ; 0x34192BC4 = .rodata..L.str.47
0x3418DBC4: F44F 710F MOV.W R1, #0x023C
0x3418DBC8: F7FF F8B2 BL assert_failed ; 0x3418CD30
.L69:
0x3418DBCC: 9820 LDR R0, [SP, #128]
0x3418DBCE: 6A40 LDR R0, [R0, #36]
0x3418DBD0: 281F CMP R0, #31
0x3418DBD2: D800 BHI 46L70 ; 0x3418DBD6
0x3418DBD4: E007 B 46L71 ; 0x3418DBE6
.L70:
0x3418DBD6: F642 30C4 MOVW R0, #0x2BC4 ; 0x34192BC4 = .rodata..L.str.47
0x3418DBDA: F2C3 4019 MOVT R0, #0x3419 ; 0x34192BC4 = .rodata..L.str.47
0x3418DBDE: F240 213D MOVW R1, #0x023D
0x3418DBE2: F7FF F8A5 BL assert_failed ; 0x3418CD30
.L71:
0x3418DBE6: 9820 LDR R0, [SP, #128]
0x3418DBE8: 6A00 LDR R0, [R0, #32]
0x3418DBEA: F7F3 FDB9 BL LL_RCC_MSI_SetFrequency ; 0x34181760
0x3418DBEE: F000 FB05 BL LL_RCC_MSI_Enable ; 0x3418E1FC
0x3418DBF2: F7F3 F839 BL HAL_GetTick ; 0x34180C68
0x3418DBF6: 901F STR R0, [SP, #124]
.L72:
0x3418DBF8: F7F3 FDC0 BL LL_RCC_MSI_IsReady ; 0x3418177C
0x3418DBFC: B950 CBNZ R0, .L74 ; 0x3418DC14
0x3418DBFE: F7F3 F833 BL HAL_GetTick ; 0x34180C68
0x3418DC02: 991F LDR R1, [SP, #124]
0x3418DC04: 1A40 SUBS R0, R0, R1
0x3418DC06: 2802 CMP R0, #2
0x3418DC08: D303 BCC 46L73 ; 0x3418DC12
0x3418DC0A: 2003 MOVS R0, #3
0x3418DC0C: F88D 0087 STRB.W R0, [SP, #135]
0x3418DC10: E2C7 B 46L144 ; 0x3418E1A2
.L73:
0x3418DC12: E7F1 B 46L72 ; 0x3418DBF8
.L74:
0x3418DC14: 9820 LDR R0, [SP, #128]
0x3418DC16: 6A40 LDR R0, [R0, #36]
0x3418DC18: F000 FAE0 BL LL_RCC_MSI_SetCalibTrimming ; 0x3418E1DC
0x3418DC1C: E012 B 46L78 ; 0x3418DC44
.L75:
0x3418DC1E: F000 FAF5 BL LL_RCC_MSI_Disable ; 0x3418E20C
0x3418DC22: F7F3 F821 BL HAL_GetTick ; 0x34180C68
0x3418DC26: 901F STR R0, [SP, #124]
.L76:
0x3418DC28: F7F3 FDA8 BL LL_RCC_MSI_IsReady ; 0x3418177C
0x3418DC2C: B150 CBZ R0, .L78 ; 0x3418DC44
0x3418DC2E: F7F3 F81B BL HAL_GetTick ; 0x34180C68
0x3418DC32: 991F LDR R1, [SP, #124]
0x3418DC34: 1A40 SUBS R0, R0, R1
0x3418DC36: 2802 CMP R0, #2
0x3418DC38: D303 BCC 46L77 ; 0x3418DC42
0x3418DC3A: 2003 MOVS R0, #3
0x3418DC3C: F88D 0087 STRB.W R0, [SP, #135]
0x3418DC40: E2AF B 46L144 ; 0x3418E1A2
.L77:
0x3418DC42: E7F1 B 46L76 ; 0x3418DC28
.L78:
0x3418DC44: 9820 LDR R0, [SP, #128]
0x3418DC46: 7800 LDRB R0, [R0]
0x3418DC48: 0700 LSLS R0, R0, #28
0x3418DC4A: 2800 CMP R0, #0
0x3418DC4C: D539 BPL 46L88 ; 0x3418DCC2
0x3418DC4E: 9820 LDR R0, [SP, #128]
0x3418DC50: 6980 LDR R0, [R0, #24]
0x3418DC52: B118 CBZ R0, .L79 ; 0x3418DC5C
0x3418DC54: 9820 LDR R0, [SP, #128]
0x3418DC56: 6980 LDR R0, [R0, #24]
0x3418DC58: 2801 CMP R0, #1
0x3418DC5A: D100 BNE 46L80 ; 0x3418DC5E
.L79:
0x3418DC5C: E007 B 46L81 ; 0x3418DC6E
.L80:
0x3418DC5E: F642 30C4 MOVW R0, #0x2BC4 ; 0x34192BC4 = .rodata..L.str.47
0x3418DC62: F2C3 4019 MOVT R0, #0x3419 ; 0x34192BC4 = .rodata..L.str.47
0x3418DC66: F240 216D MOVW R1, #0x026D
0x3418DC6A: F7FF F861 BL assert_failed ; 0x3418CD30
.L81:
0x3418DC6E: 9820 LDR R0, [SP, #128]
0x3418DC70: 6980 LDR R0, [R0, #24]
0x3418DC72: B198 CBZ R0, .L85 ; 0x3418DC9C
0x3418DC74: F000 FAD2 BL LL_RCC_LSI_Enable ; 0x3418E21C
0x3418DC78: F7F2 FFF6 BL HAL_GetTick ; 0x34180C68
0x3418DC7C: 901F STR R0, [SP, #124]
.L82:
0x3418DC7E: F7F3 FD85 BL LL_RCC_LSI_IsReady ; 0x3418178C
0x3418DC82: B950 CBNZ R0, .L84 ; 0x3418DC9A
0x3418DC84: F7F2 FFF0 BL HAL_GetTick ; 0x34180C68
0x3418DC88: 991F LDR R1, [SP, #124]
0x3418DC8A: 1A40 SUBS R0, R0, R1
0x3418DC8C: 2802 CMP R0, #2
0x3418DC8E: D303 BCC 46L83 ; 0x3418DC98
0x3418DC90: 2003 MOVS R0, #3
0x3418DC92: F88D 0087 STRB.W R0, [SP, #135]
0x3418DC96: E284 B 46L144 ; 0x3418E1A2
.L83:
0x3418DC98: E7F1 B 46L82 ; 0x3418DC7E
.L84:
0x3418DC9A: E012 B 46L88 ; 0x3418DCC2
.L85:
0x3418DC9C: F000 FAC6 BL LL_RCC_LSI_Disable ; 0x3418E22C
0x3418DCA0: F7F2 FFE2 BL HAL_GetTick ; 0x34180C68
0x3418DCA4: 901F STR R0, [SP, #124]
.L86:
0x3418DCA6: F7F3 FD71 BL LL_RCC_LSI_IsReady ; 0x3418178C
0x3418DCAA: B150 CBZ R0, .L88 ; 0x3418DCC2
0x3418DCAC: F7F2 FFDC BL HAL_GetTick ; 0x34180C68
0x3418DCB0: 991F LDR R1, [SP, #124]
0x3418DCB2: 1A40 SUBS R0, R0, R1
0x3418DCB4: 2802 CMP R0, #2
0x3418DCB6: D303 BCC 46L87 ; 0x3418DCC0
0x3418DCB8: 2003 MOVS R0, #3
0x3418DCBA: F88D 0087 STRB.W R0, [SP, #135]
0x3418DCBE: E270 B 46L144 ; 0x3418E1A2
.L87:
0x3418DCC0: E7F1 B 46L86 ; 0x3418DCA6
.L88:
0x3418DCC2: 9820 LDR R0, [SP, #128]
0x3418DCC4: 7800 LDRB R0, [R0]
0x3418DCC6: 0740 LSLS R0, R0, #29
0x3418DCC8: 2800 CMP R0, #0
0x3418DCCA: F140 80AF BPL.W 46L103 ; 0x3418DE2C
0x3418DCCE: 9820 LDR R0, [SP, #128]
0x3418DCD0: 6880 LDR R0, [R0, #8]
0x3418DCD2: B188 CBZ R0, .L89 ; 0x3418DCF8
0x3418DCD4: 9820 LDR R0, [SP, #128]
0x3418DCD6: 6880 LDR R0, [R0, #8]
0x3418DCD8: 2802 CMP R0, #2
0x3418DCDA: D00D BEQ 46L89 ; 0x3418DCF8
0x3418DCDC: 9820 LDR R0, [SP, #128]
0x3418DCDE: 6880 LDR R0, [R0, #8]
0x3418DCE0: F248 0102 MOVW R1, #0x8002
0x3418DCE4: 4288 CMP R0, R1
0x3418DCE6: D007 BEQ 46L89 ; 0x3418DCF8
0x3418DCE8: 9820 LDR R0, [SP, #128]
0x3418DCEA: 6880 LDR R0, [R0, #8]
0x3418DCEC: F248 0102 MOVW R1, #0x8002
0x3418DCF0: F2C0 0101 MOVT R1, #1
0x3418DCF4: 4288 CMP R0, R1
0x3418DCF6: D100 BNE 46L90 ; 0x3418DCFA
.L89:
0x3418DCF8: E007 B 46L91 ; 0x3418DD0A
.L90:
0x3418DCFA: F642 30C4 MOVW R0, #0x2BC4 ; 0x34192BC4 = .rodata..L.str.47
0x3418DCFE: F2C3 4019 MOVT R0, #0x3419 ; 0x34192BC4 = .rodata..L.str.47
0x3418DD02: F44F 7126 MOV.W R1, #0x0298
0x3418DD06: F7FF F813 BL assert_failed ; 0x3418CD30
.L91:
0x3418DD0A: 9820 LDR R0, [SP, #128]
0x3418DD0C: 6880 LDR R0, [R0, #8]
0x3418DD0E: 2802 CMP R0, #2
0x3418DD10: D106 BNE 46L92 ; 0x3418DD20
0x3418DD12: F648 0100 MOVW R1, #0x8800
0x3418DD16: F2C5 6102 MOVT R1, #0x5602
0x3418DD1A: 2002 MOVS R0, #2
0x3418DD1C: 6008 STR R0, [R1]
0x3418DD1E: E05B B 46L96 ; 0x3418DDD8
.L92:
0x3418DD20: 9820 LDR R0, [SP, #128]
0x3418DD22: 6880 LDR R0, [R0, #8]
0x3418DD24: B990 CBNZ R0, .L93 ; 0x3418DD4C
0x3418DD26: F249 0100 MOVW R1, #0x9000
0x3418DD2A: F2C5 6102 MOVT R1, #0x5602
0x3418DD2E: 2002 MOVS R0, #2
0x3418DD30: 6008 STR R0, [R1]
0x3418DD32: F248 0140 MOVW R1, #0x8040
0x3418DD36: F2C5 6102 MOVT R1, #0x5602
0x3418DD3A: 6808 LDR R0, [R1]
0x3418DD3C: F420 3080 BIC R0, R0, #0x010000
0x3418DD40: 6008 STR R0, [R1]
0x3418DD42: 6808 LDR R0, [R1]
0x3418DD44: F420 4000 BIC R0, R0, #0x8000
0x3418DD48: 6008 STR R0, [R1]
0x3418DD4A: E045 B 46L96 ; 0x3418DDD8
.L93:
0x3418DD4C: 9820 LDR R0, [SP, #128]
0x3418DD4E: 6880 LDR R0, [R0, #8]
0x3418DD50: F248 0102 MOVW R1, #0x8002
0x3418DD54: 4288 CMP R0, R1
0x3418DD56: D112 BNE 46L94 ; 0x3418DD7E
0x3418DD58: F248 0140 MOVW R1, #0x8040
0x3418DD5C: F2C5 6102 MOVT R1, #0x5602
0x3418DD60: 6808 LDR R0, [R1]
0x3418DD62: F440 4000 ORR R0, R0, #0x8000
0x3418DD66: 6008 STR R0, [R1]
0x3418DD68: 6808 LDR R0, [R1]
0x3418DD6A: F420 3080 BIC R0, R0, #0x010000
0x3418DD6E: 6008 STR R0, [R1]
0x3418DD70: F648 0100 MOVW R1, #0x8800
0x3418DD74: F2C5 6102 MOVT R1, #0x5602
0x3418DD78: 2002 MOVS R0, #2
0x3418DD7A: 6008 STR R0, [R1]
0x3418DD7C: E02C B 46L96 ; 0x3418DDD8
.L94:
0x3418DD7E: 9820 LDR R0, [SP, #128]
0x3418DD80: 6880 LDR R0, [R0, #8]
0x3418DD82: F248 0102 MOVW R1, #0x8002
0x3418DD86: F2C0 0101 MOVT R1, #1
0x3418DD8A: 4288 CMP R0, R1
0x3418DD8C: D112 BNE 46L95 ; 0x3418DDB4
0x3418DD8E: F248 0140 MOVW R1, #0x8040
0x3418DD92: F2C5 6102 MOVT R1, #0x5602
0x3418DD96: 6808 LDR R0, [R1]
0x3418DD98: F440 4000 ORR R0, R0, #0x8000
0x3418DD9C: 6008 STR R0, [R1]
0x3418DD9E: 6808 LDR R0, [R1]
0x3418DDA0: F440 3080 ORR R0, R0, #0x010000
0x3418DDA4: 6008 STR R0, [R1]
0x3418DDA6: F648 0100 MOVW R1, #0x8800
0x3418DDAA: F2C5 6102 MOVT R1, #0x5602
0x3418DDAE: 2002 MOVS R0, #2
0x3418DDB0: 6008 STR R0, [R1]
0x3418DDB2: E011 B 46L96 ; 0x3418DDD8
.L95:
0x3418DDB4: F249 0100 MOVW R1, #0x9000
0x3418DDB8: F2C5 6102 MOVT R1, #0x5602
0x3418DDBC: 2002 MOVS R0, #2
0x3418DDBE: 6008 STR R0, [R1]
0x3418DDC0: F248 0140 MOVW R1, #0x8040
0x3418DDC4: F2C5 6102 MOVT R1, #0x5602
0x3418DDC8: 6808 LDR R0, [R1]
0x3418DDCA: F420 4000 BIC R0, R0, #0x8000
0x3418DDCE: 6008 STR R0, [R1]
0x3418DDD0: 6808 LDR R0, [R1]
0x3418DDD2: F420 3080 BIC R0, R0, #0x010000
0x3418DDD6: 6008 STR R0, [R1]
.L96:
0x3418DDD8: 9820 LDR R0, [SP, #128]
0x3418DDDA: 6880 LDR R0, [R0, #8]
0x3418DDDC: B198 CBZ R0, .L100 ; 0x3418DE06
0x3418DDDE: F7F2 FF43 BL HAL_GetTick ; 0x34180C68
0x3418DDE2: 901F STR R0, [SP, #124]
.L97:
0x3418DDE4: F7F3 FCDA BL LL_RCC_LSE_IsReady ; 0x3418179C
0x3418DDE8: B960 CBNZ R0, .L99 ; 0x3418DE04
0x3418DDEA: F7F2 FF3D BL HAL_GetTick ; 0x34180C68
0x3418DDEE: 991F LDR R1, [SP, #124]
0x3418DDF0: 1A40 SUBS R0, R0, R1
0x3418DDF2: F241 3189 MOVW R1, #0x1389
0x3418DDF6: 4288 CMP R0, R1
0x3418DDF8: D303 BCC 46L98 ; 0x3418DE02
0x3418DDFA: 2003 MOVS R0, #3
0x3418DDFC: F88D 0087 STRB.W R0, [SP, #135]
0x3418DE00: E1CF B 46L144 ; 0x3418E1A2
.L98:
0x3418DE02: E7EF B 46L97 ; 0x3418DDE4
.L99:
0x3418DE04: E012 B 46L103 ; 0x3418DE2C
.L100:
0x3418DE06: F7F2 FF2F BL HAL_GetTick ; 0x34180C68
0x3418DE0A: 901F STR R0, [SP, #124]
.L101:
0x3418DE0C: F7F3 FCC6 BL LL_RCC_LSE_IsReady ; 0x3418179C
0x3418DE10: B160 CBZ R0, .L103 ; 0x3418DE2C
0x3418DE12: F7F2 FF29 BL HAL_GetTick ; 0x34180C68
0x3418DE16: 991F LDR R1, [SP, #124]
0x3418DE18: 1A40 SUBS R0, R0, R1
0x3418DE1A: F241 3189 MOVW R1, #0x1389
0x3418DE1E: 4288 CMP R0, R1
0x3418DE20: D303 BCC 46L102 ; 0x3418DE2A
0x3418DE22: 2003 MOVS R0, #3
0x3418DE24: F88D 0087 STRB.W R0, [SP, #135]
0x3418DE28: E1BB B 46L144 ; 0x3418E1A2
.L102:
0x3418DE2A: E7EF B 46L101 ; 0x3418DE0C
.L103:
0x3418DE2C: 9820 LDR R0, [SP, #128]
0x3418DE2E: 6A80 LDR R0, [R0, #40]
0x3418DE30: B158 CBZ R0, .L104 ; 0x3418DE4A
0x3418DE32: 9820 LDR R0, [SP, #128]
0x3418DE34: 6A80 LDR R0, [R0, #40]
0x3418DE36: 2801 CMP R0, #1
0x3418DE38: D007 BEQ 46L104 ; 0x3418DE4A
0x3418DE3A: 9820 LDR R0, [SP, #128]
0x3418DE3C: 6A80 LDR R0, [R0, #40]
0x3418DE3E: 2802 CMP R0, #2
0x3418DE40: D003 BEQ 46L104 ; 0x3418DE4A
0x3418DE42: 9820 LDR R0, [SP, #128]
0x3418DE44: 6A80 LDR R0, [R0, #40]
0x3418DE46: 2803 CMP R0, #3
0x3418DE48: D100 BNE 46L105 ; 0x3418DE4C
.L104:
0x3418DE4A: E007 B 46L106 ; 0x3418DE5C
.L105:
0x3418DE4C: F642 30C4 MOVW R0, #0x2BC4 ; 0x34192BC4 = .rodata..L.str.47
0x3418DE50: F2C3 4019 MOVT R0, #0x3419 ; 0x34192BC4 = .rodata..L.str.47
0x3418DE54: F240 21BD MOVW R1, #0x02BD
0x3418DE58: F7FE FF6A BL assert_failed ; 0x3418CD30
.L106:
0x3418DE5C: 9820 LDR R0, [SP, #128]
0x3418DE5E: 6A80 LDR R0, [R0, #40]
0x3418DE60: 2800 CMP R0, #0
0x3418DE62: D04B BEQ 46L113 ; 0x3418DEFC
0x3418DE64: 9820 LDR R0, [SP, #128]
0x3418DE66: F100 0128 ADD.W R1, R0, #40
0x3418DE6A: 2000 MOVS R0, #0
0x3418DE6C: F000 F9E6 BL RCC_PLL_IsNewConfig ; 0x3418E23C
0x3418DE70: 9017 STR R0, [SP, #92]
0x3418DE72: F7F3 FC9B BL LL_RCC_PLL1_IsReady ; 0x341817AC
0x3418DE76: 9016 STR R0, [SP, #88]
0x3418DE78: 9817 LDR R0, [SP, #92]
0x3418DE7A: 2801 CMP R0, #1
0x3418DE7C: D12F BNE 46L111 ; 0x3418DEDE
0x3418DE7E: F7F3 FC9D BL LL_RCC_IC1_GetSource ; 0x341817BC
0x3418DE82: 9015 STR R0, [SP, #84]
0x3418DE84: F7F3 FCA2 BL LL_RCC_IC2_GetSource ; 0x341817CC
0x3418DE88: 9014 STR R0, [SP, #80]
0x3418DE8A: F7F3 FCA7 BL LL_RCC_IC6_GetSource ; 0x341817DC
0x3418DE8E: 9013 STR R0, [SP, #76]
0x3418DE90: F7F3 FCAC BL LL_RCC_IC11_GetSource ; 0x341817EC
0x3418DE94: 9012 STR R0, [SP, #72]
0x3418DE96: 981D LDR R0, [SP, #116]
0x3418DE98: F5B0 1F40 CMP.W R0, #0x300000
0x3418DE9C: D105 BNE 46L107 ; 0x3418DEAA
0x3418DE9E: 9815 LDR R0, [SP, #84]
0x3418DEA0: B918 CBNZ R0, .L107 ; 0x3418DEAA
0x3418DEA2: 2001 MOVS R0, #1
0x3418DEA4: F88D 0087 STRB.W R0, [SP, #135]
0x3418DEA8: E17B B 46L144 ; 0x3418E1A2
.L107:
0x3418DEAA: 981E LDR R0, [SP, #120]
0x3418DEAC: F1B0 5F40 CMP.W R0, #0x30000000
0x3418DEB0: D109 BNE 46L109 ; 0x3418DEC6
0x3418DEB2: 9814 LDR R0, [SP, #80]
0x3418DEB4: B118 CBZ R0, .L108 ; 0x3418DEBE
0x3418DEB6: 9813 LDR R0, [SP, #76]
0x3418DEB8: B108 CBZ R0, .L108 ; 0x3418DEBE
0x3418DEBA: 9812 LDR R0, [SP, #72]
0x3418DEBC: B918 CBNZ R0, .L109 ; 0x3418DEC6
.L108:
0x3418DEBE: 2001 MOVS R0, #1
0x3418DEC0: F88D 0087 STRB.W R0, [SP, #135]
0x3418DEC4: E16D B 46L144 ; 0x3418E1A2
.L109:
0x3418DEC6: 9820 LDR R0, [SP, #128]
0x3418DEC8: F100 0128 ADD.W R1, R0, #40
0x3418DECC: 2000 MOVS R0, #0
0x3418DECE: F000 FA23 BL RCC_PLL_Config ; 0x3418E318
0x3418DED2: B118 CBZ R0, .L110 ; 0x3418DEDC
0x3418DED4: 2001 MOVS R0, #1
0x3418DED6: F88D 0087 STRB.W R0, [SP, #135]
0x3418DEDA: E162 B 46L144 ; 0x3418E1A2
.L110:
0x3418DEDC: E00E B 46L113 ; 0x3418DEFC
.L111:
0x3418DEDE: 9820 LDR R0, [SP, #128]
0x3418DEE0: 6A80 LDR R0, [R0, #40]
0x3418DEE2: 2802 CMP R0, #2
0x3418DEE4: D10A BNE 46L113 ; 0x3418DEFC
0x3418DEE6: 9816 LDR R0, [SP, #88]
0x3418DEE8: B940 CBNZ R0, .L113 ; 0x3418DEFC
0x3418DEEA: 2000 MOVS R0, #0
0x3418DEEC: F000 FBBC BL RCC_PLL_Enable ; 0x3418E668
0x3418DEF0: B118 CBZ R0, .L112 ; 0x3418DEFA
0x3418DEF2: 2001 MOVS R0, #1
0x3418DEF4: F88D 0087 STRB.W R0, [SP, #135]
0x3418DEF8: E153 B 46L144 ; 0x3418E1A2
.L112:
0x3418DEFA: E7FF B 46L113 ; 0x3418DEFC
.L113:
0x3418DEFC: 9820 LDR R0, [SP, #128]
0x3418DEFE: 6C40 LDR R0, [R0, #68]
0x3418DF00: B158 CBZ R0, .L114 ; 0x3418DF1A
0x3418DF02: 9820 LDR R0, [SP, #128]
0x3418DF04: 6C40 LDR R0, [R0, #68]
0x3418DF06: 2801 CMP R0, #1
0x3418DF08: D007 BEQ 46L114 ; 0x3418DF1A
0x3418DF0A: 9820 LDR R0, [SP, #128]
0x3418DF0C: 6C40 LDR R0, [R0, #68]
0x3418DF0E: 2802 CMP R0, #2
0x3418DF10: D003 BEQ 46L114 ; 0x3418DF1A
0x3418DF12: 9820 LDR R0, [SP, #128]
0x3418DF14: 6C40 LDR R0, [R0, #68]
0x3418DF16: 2803 CMP R0, #3
0x3418DF18: D100 BNE 46L115 ; 0x3418DF1C
.L114:
0x3418DF1A: E007 B 46L116 ; 0x3418DF2C
.L115:
0x3418DF1C: F642 30C4 MOVW R0, #0x2BC4 ; 0x34192BC4 = .rodata..L.str.47
0x3418DF20: F2C3 4019 MOVT R0, #0x3419 ; 0x34192BC4 = .rodata..L.str.47
0x3418DF24: F240 21EB MOVW R1, #0x02EB
0x3418DF28: F7FE FF02 BL assert_failed ; 0x3418CD30
.L116:
0x3418DF2C: 9820 LDR R0, [SP, #128]
0x3418DF2E: 6C40 LDR R0, [R0, #68]
0x3418DF30: 2800 CMP R0, #0
0x3418DF32: D053 BEQ 46L123 ; 0x3418DFDC
0x3418DF34: 9820 LDR R0, [SP, #128]
0x3418DF36: F100 0144 ADD.W R1, R0, #68
0x3418DF3A: 2001 MOVS R0, #1
0x3418DF3C: F000 F97E BL RCC_PLL_IsNewConfig ; 0x3418E23C
0x3418DF40: 9011 STR R0, [SP, #68]
0x3418DF42: F7F3 FC5B BL LL_RCC_PLL2_IsReady ; 0x341817FC
0x3418DF46: 9010 STR R0, [SP, #64]
0x3418DF48: 9811 LDR R0, [SP, #68]
0x3418DF4A: 2801 CMP R0, #1
0x3418DF4C: D137 BNE 46L121 ; 0x3418DFBE
0x3418DF4E: F7F3 FC35 BL LL_RCC_IC1_GetSource ; 0x341817BC
0x3418DF52: 900F STR R0, [SP, #60]
0x3418DF54: F7F3 FC3A BL LL_RCC_IC2_GetSource ; 0x341817CC
0x3418DF58: 900E STR R0, [SP, #56]
0x3418DF5A: F7F3 FC3F BL LL_RCC_IC6_GetSource ; 0x341817DC
0x3418DF5E: 900D STR R0, [SP, #52]
0x3418DF60: F7F3 FC44 BL LL_RCC_IC11_GetSource ; 0x341817EC
0x3418DF64: 900C STR R0, [SP, #48]
0x3418DF66: 981D LDR R0, [SP, #116]
0x3418DF68: F5B0 1F40 CMP.W R0, #0x300000
0x3418DF6C: D107 BNE 46L117 ; 0x3418DF7E
0x3418DF6E: 980F LDR R0, [SP, #60]
0x3418DF70: F1B0 5F80 CMP.W R0, #0x10000000
0x3418DF74: D103 BNE 46L117 ; 0x3418DF7E
0x3418DF76: 2001 MOVS R0, #1
0x3418DF78: F88D 0087 STRB.W R0, [SP, #135]
0x3418DF7C: E111 B 46L144 ; 0x3418E1A2
.L117:
0x3418DF7E: 981E LDR R0, [SP, #120]
0x3418DF80: F1B0 5F40 CMP.W R0, #0x30000000
0x3418DF84: D10F BNE 46L119 ; 0x3418DFA6
0x3418DF86: 980E LDR R0, [SP, #56]
0x3418DF88: F1B0 5F80 CMP.W R0, #0x10000000
0x3418DF8C: D007 BEQ 46L118 ; 0x3418DF9E
0x3418DF8E: 980D LDR R0, [SP, #52]
0x3418DF90: F1B0 5F80 CMP.W R0, #0x10000000
0x3418DF94: D003 BEQ 46L118 ; 0x3418DF9E
0x3418DF96: 980C LDR R0, [SP, #48]
0x3418DF98: F1B0 5F80 CMP.W R0, #0x10000000
0x3418DF9C: D103 BNE 46L119 ; 0x3418DFA6
.L118:
0x3418DF9E: 2001 MOVS R0, #1
0x3418DFA0: F88D 0087 STRB.W R0, [SP, #135]
0x3418DFA4: E0FD B 46L144 ; 0x3418E1A2
.L119:
0x3418DFA6: 9820 LDR R0, [SP, #128]
0x3418DFA8: F100 0144 ADD.W R1, R0, #68
0x3418DFAC: 2001 MOVS R0, #1
0x3418DFAE: F000 F9B3 BL RCC_PLL_Config ; 0x3418E318
0x3418DFB2: B118 CBZ R0, .L120 ; 0x3418DFBC
0x3418DFB4: 2001 MOVS R0, #1
0x3418DFB6: F88D 0087 STRB.W R0, [SP, #135]
0x3418DFBA: E0F2 B 46L144 ; 0x3418E1A2
.L120:
0x3418DFBC: E00E B 46L123 ; 0x3418DFDC
.L121:
0x3418DFBE: 9820 LDR R0, [SP, #128]
0x3418DFC0: 6C40 LDR R0, [R0, #68]
0x3418DFC2: 2802 CMP R0, #2
0x3418DFC4: D10A BNE 46L123 ; 0x3418DFDC
0x3418DFC6: 9810 LDR R0, [SP, #64]
0x3418DFC8: B940 CBNZ R0, .L123 ; 0x3418DFDC
0x3418DFCA: 2001 MOVS R0, #1
0x3418DFCC: F000 FB4C BL RCC_PLL_Enable ; 0x3418E668
0x3418DFD0: B118 CBZ R0, .L122 ; 0x3418DFDA
0x3418DFD2: 2001 MOVS R0, #1
0x3418DFD4: F88D 0087 STRB.W R0, [SP, #135]
0x3418DFD8: E0E3 B 46L144 ; 0x3418E1A2
.L122:
0x3418DFDA: E7FF B 46L123 ; 0x3418DFDC
.L123:
0x3418DFDC: 9820 LDR R0, [SP, #128]
0x3418DFDE: 6E00 LDR R0, [R0, #96]
0x3418DFE0: B158 CBZ R0, .L124 ; 0x3418DFFA
0x3418DFE2: 9820 LDR R0, [SP, #128]
0x3418DFE4: 6E00 LDR R0, [R0, #96]
0x3418DFE6: 2801 CMP R0, #1
0x3418DFE8: D007 BEQ 46L124 ; 0x3418DFFA
0x3418DFEA: 9820 LDR R0, [SP, #128]
0x3418DFEC: 6E00 LDR R0, [R0, #96]
0x3418DFEE: 2802 CMP R0, #2
0x3418DFF0: D003 BEQ 46L124 ; 0x3418DFFA
0x3418DFF2: 9820 LDR R0, [SP, #128]
0x3418DFF4: 6E00 LDR R0, [R0, #96]
0x3418DFF6: 2803 CMP R0, #3
0x3418DFF8: D100 BNE 46L125 ; 0x3418DFFC
.L124:
0x3418DFFA: E007 B 46L126 ; 0x3418E00C
.L125:
0x3418DFFC: F642 30C4 MOVW R0, #0x2BC4 ; 0x34192BC4 = .rodata..L.str.47
0x3418E000: F2C3 4019 MOVT R0, #0x3419 ; 0x34192BC4 = .rodata..L.str.47
0x3418E004: F240 3119 MOVW R1, #0x0319
0x3418E008: F7FE FE92 BL assert_failed ; 0x3418CD30
.L126:
0x3418E00C: 9820 LDR R0, [SP, #128]
0x3418E00E: 6E00 LDR R0, [R0, #96]
0x3418E010: 2800 CMP R0, #0
0x3418E012: D053 BEQ 46L133 ; 0x3418E0BC
0x3418E014: 9820 LDR R0, [SP, #128]
0x3418E016: F100 0160 ADD.W R1, R0, #96
0x3418E01A: 2002 MOVS R0, #2
0x3418E01C: F000 F90E BL RCC_PLL_IsNewConfig ; 0x3418E23C
0x3418E020: 900B STR R0, [SP, #44]
0x3418E022: F7F3 FBF3 BL LL_RCC_PLL3_IsReady ; 0x3418180C
0x3418E026: 900A STR R0, [SP, #40]
0x3418E028: 980B LDR R0, [SP, #44]
0x3418E02A: 2801 CMP R0, #1
0x3418E02C: D137 BNE 46L131 ; 0x3418E09E
0x3418E02E: F7F3 FBC5 BL LL_RCC_IC1_GetSource ; 0x341817BC
0x3418E032: 9009 STR R0, [SP, #36]
0x3418E034: F7F3 FBCA BL LL_RCC_IC2_GetSource ; 0x341817CC
0x3418E038: 9008 STR R0, [SP, #32]
0x3418E03A: F7F3 FBCF BL LL_RCC_IC6_GetSource ; 0x341817DC
0x3418E03E: 9007 STR R0, [SP, #28]
0x3418E040: F7F3 FBD4 BL LL_RCC_IC11_GetSource ; 0x341817EC
0x3418E044: 9006 STR R0, [SP, #24]
0x3418E046: 981D LDR R0, [SP, #116]
0x3418E048: F5B0 1F40 CMP.W R0, #0x300000
0x3418E04C: D107 BNE 46L127 ; 0x3418E05E
0x3418E04E: 9809 LDR R0, [SP, #36]
0x3418E050: F1B0 5F00 CMP.W R0, #0x20000000
0x3418E054: D103 BNE 46L127 ; 0x3418E05E
0x3418E056: 2001 MOVS R0, #1
0x3418E058: F88D 0087 STRB.W R0, [SP, #135]
0x3418E05C: E0A1 B 46L144 ; 0x3418E1A2
.L127:
0x3418E05E: 981E LDR R0, [SP, #120]
0x3418E060: F1B0 5F40 CMP.W R0, #0x30000000
0x3418E064: D10F BNE 46L129 ; 0x3418E086
0x3418E066: 9808 LDR R0, [SP, #32]
0x3418E068: F1B0 5F00 CMP.W R0, #0x20000000
0x3418E06C: D007 BEQ 46L128 ; 0x3418E07E
0x3418E06E: 9807 LDR R0, [SP, #28]
0x3418E070: F1B0 5F00 CMP.W R0, #0x20000000
0x3418E074: D003 BEQ 46L128 ; 0x3418E07E
0x3418E076: 9806 LDR R0, [SP, #24]
0x3418E078: F1B0 5F00 CMP.W R0, #0x20000000
0x3418E07C: D103 BNE 46L129 ; 0x3418E086
.L128:
0x3418E07E: 2001 MOVS R0, #1
0x3418E080: F88D 0087 STRB.W R0, [SP, #135]
0x3418E084: E08D B 46L144 ; 0x3418E1A2
.L129:
0x3418E086: 9820 LDR R0, [SP, #128]
0x3418E088: F100 0160 ADD.W R1, R0, #96
0x3418E08C: 2002 MOVS R0, #2
0x3418E08E: F000 F943 BL RCC_PLL_Config ; 0x3418E318
0x3418E092: B118 CBZ R0, .L130 ; 0x3418E09C
0x3418E094: 2001 MOVS R0, #1
0x3418E096: F88D 0087 STRB.W R0, [SP, #135]
0x3418E09A: E082 B 46L144 ; 0x3418E1A2
.L130:
0x3418E09C: E00E B 46L133 ; 0x3418E0BC
.L131:
0x3418E09E: 9820 LDR R0, [SP, #128]
0x3418E0A0: 6E00 LDR R0, [R0, #96]
0x3418E0A2: 2802 CMP R0, #2
0x3418E0A4: D10A BNE 46L133 ; 0x3418E0BC
0x3418E0A6: 980A LDR R0, [SP, #40]
0x3418E0A8: B940 CBNZ R0, .L133 ; 0x3418E0BC
0x3418E0AA: 2002 MOVS R0, #2
0x3418E0AC: F000 FADC BL RCC_PLL_Enable ; 0x3418E668
0x3418E0B0: B118 CBZ R0, .L132 ; 0x3418E0BA
0x3418E0B2: 2001 MOVS R0, #1
0x3418E0B4: F88D 0087 STRB.W R0, [SP, #135]
0x3418E0B8: E073 B 46L144 ; 0x3418E1A2
.L132:
0x3418E0BA: E7FF B 46L133 ; 0x3418E0BC
.L133:
0x3418E0BC: 9820 LDR R0, [SP, #128]
0x3418E0BE: 6FC0 LDR R0, [R0, #124]
0x3418E0C0: B158 CBZ R0, .L134 ; 0x3418E0DA
0x3418E0C2: 9820 LDR R0, [SP, #128]
0x3418E0C4: 6FC0 LDR R0, [R0, #124]
0x3418E0C6: 2801 CMP R0, #1
0x3418E0C8: D007 BEQ 46L134 ; 0x3418E0DA
0x3418E0CA: 9820 LDR R0, [SP, #128]
0x3418E0CC: 6FC0 LDR R0, [R0, #124]
0x3418E0CE: 2802 CMP R0, #2
0x3418E0D0: D003 BEQ 46L134 ; 0x3418E0DA
0x3418E0D2: 9820 LDR R0, [SP, #128]
0x3418E0D4: 6FC0 LDR R0, [R0, #124]
0x3418E0D6: 2803 CMP R0, #3
0x3418E0D8: D100 BNE 46L135 ; 0x3418E0DC
.L134:
0x3418E0DA: E007 B 46L136 ; 0x3418E0EC
.L135:
0x3418E0DC: F642 30C4 MOVW R0, #0x2BC4 ; 0x34192BC4 = .rodata..L.str.47
0x3418E0E0: F2C3 4019 MOVT R0, #0x3419 ; 0x34192BC4 = .rodata..L.str.47
0x3418E0E4: F240 3146 MOVW R1, #0x0346
0x3418E0E8: F7FE FE22 BL assert_failed ; 0x3418CD30
.L136:
0x3418E0EC: 9820 LDR R0, [SP, #128]
0x3418E0EE: 6FC0 LDR R0, [R0, #124]
0x3418E0F0: 2800 CMP R0, #0
0x3418E0F2: D053 BEQ 46L143 ; 0x3418E19C
0x3418E0F4: 9820 LDR R0, [SP, #128]
0x3418E0F6: F100 017C ADD.W R1, R0, #124
0x3418E0FA: 2003 MOVS R0, #3
0x3418E0FC: F000 F89E BL RCC_PLL_IsNewConfig ; 0x3418E23C
0x3418E100: 9005 STR R0, [SP, #20]
0x3418E102: F7F3 FB8B BL LL_RCC_PLL4_IsReady ; 0x3418181C
0x3418E106: 9004 STR R0, [SP, #16]
0x3418E108: 9805 LDR R0, [SP, #20]
0x3418E10A: 2801 CMP R0, #1
0x3418E10C: D137 BNE 46L141 ; 0x3418E17E
0x3418E10E: F7F3 FB55 BL LL_RCC_IC1_GetSource ; 0x341817BC
0x3418E112: 9003 STR R0, [SP, #12]
0x3418E114: F7F3 FB5A BL LL_RCC_IC2_GetSource ; 0x341817CC
0x3418E118: 9002 STR R0, [SP, #8]
0x3418E11A: F7F3 FB5F BL LL_RCC_IC6_GetSource ; 0x341817DC
0x3418E11E: 9001 STR R0, [SP, #4]
0x3418E120: F7F3 FB64 BL LL_RCC_IC11_GetSource ; 0x341817EC
0x3418E124: 9000 STR R0, [SP, #0]
0x3418E126: 981D LDR R0, [SP, #116]
0x3418E128: F5B0 1F40 CMP.W R0, #0x300000
0x3418E12C: D107 BNE 46L137 ; 0x3418E13E
0x3418E12E: 9803 LDR R0, [SP, #12]
0x3418E130: F1B0 5F40 CMP.W R0, #0x30000000
0x3418E134: D103 BNE 46L137 ; 0x3418E13E
0x3418E136: 2001 MOVS R0, #1
0x3418E138: F88D 0087 STRB.W R0, [SP, #135]
0x3418E13C: E031 B 46L144 ; 0x3418E1A2
.L137:
0x3418E13E: 981E LDR R0, [SP, #120]
0x3418E140: F1B0 5F40 CMP.W R0, #0x30000000
0x3418E144: D10F BNE 46L139 ; 0x3418E166
0x3418E146: 9802 LDR R0, [SP, #8]
0x3418E148: F1B0 5F40 CMP.W R0, #0x30000000
0x3418E14C: D007 BEQ 46L138 ; 0x3418E15E
0x3418E14E: 9801 LDR R0, [SP, #4]
0x3418E150: F1B0 5F40 CMP.W R0, #0x30000000
0x3418E154: D003 BEQ 46L138 ; 0x3418E15E
0x3418E156: 9800 LDR R0, [SP, #0]
0x3418E158: F1B0 5F40 CMP.W R0, #0x30000000
0x3418E15C: D103 BNE 46L139 ; 0x3418E166
.L138:
0x3418E15E: 2001 MOVS R0, #1
0x3418E160: F88D 0087 STRB.W R0, [SP, #135]
0x3418E164: E01D B 46L144 ; 0x3418E1A2
.L139:
0x3418E166: 9820 LDR R0, [SP, #128]
0x3418E168: F100 017C ADD.W R1, R0, #124
0x3418E16C: 2003 MOVS R0, #3
0x3418E16E: F000 F8D3 BL RCC_PLL_Config ; 0x3418E318
0x3418E172: B118 CBZ R0, .L140 ; 0x3418E17C
0x3418E174: 2001 MOVS R0, #1
0x3418E176: F88D 0087 STRB.W R0, [SP, #135]
0x3418E17A: E012 B 46L144 ; 0x3418E1A2
.L140:
0x3418E17C: E00E B 46L143 ; 0x3418E19C
.L141:
0x3418E17E: 9820 LDR R0, [SP, #128]
0x3418E180: 6FC0 LDR R0, [R0, #124]
0x3418E182: 2802 CMP R0, #2
0x3418E184: D10A BNE 46L143 ; 0x3418E19C
0x3418E186: 9804 LDR R0, [SP, #16]
0x3418E188: B940 CBNZ R0, .L143 ; 0x3418E19C
0x3418E18A: 2003 MOVS R0, #3
0x3418E18C: F000 FA6C BL RCC_PLL_Enable ; 0x3418E668
0x3418E190: B118 CBZ R0, .L142 ; 0x3418E19A
0x3418E192: 2001 MOVS R0, #1
0x3418E194: F88D 0087 STRB.W R0, [SP, #135]
0x3418E198: E003 B 46L144 ; 0x3418E1A2
.L142:
0x3418E19A: E7FF B 46L143 ; 0x3418E19C
.L143:
0x3418E19C: 2000 MOVS R0, #0
0x3418E19E: F88D 0087 STRB.W R0, [SP, #135]
.L144:
0x3418E1A2: F89D 0087 LDRB.W R0, [SP, #135]
0x3418E1A6: B022 ADD SP, SP, #136
0x3418E1A8: BD80 POP 123R7, PC}
Section .init.HASH_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
HASH_IRQHandler:
0x3418E1AA: E7FE B HASH_IRQHandler ; 0x3418E1AA
Section .text.LL_RCC_HSI_SetCalibTrimming from blto2_FSBL_lto.o, size=30, align=4
LL_RCC_HSI_SetCalibTrimming:
0x3418E1AC: B081 SUB SP, SP, #4
0x3418E1AE: 9000 STR R0, [SP, #0]
0x3418E1B0: F248 0148 MOVW R1, #0x8048
0x3418E1B4: F2C5 6102 MOVT R1, #0x5602
0x3418E1B8: 6808 LDR R0, [R1]
0x3418E1BA: F420 00FE BIC R0, R0, #0x7F0000
0x3418E1BE: 9A00 LDR R2, [SP, #0]
0x3418E1C0: EA40 4002 ORR.W R0, R0, R2, LSL #16
0x3418E1C4: 6008 STR R0, [R1]
0x3418E1C6: B001 ADD SP, SP, #4
0x3418E1C8: 4770 BX LR
Section .init.RNG_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
RNG_IRQHandler:
0x3418E1CA: E7FE B RNG_IRQHandler ; 0x3418E1CA
Section .text.LL_RCC_HSI_Disable from blto2_FSBL_lto.o, size=14, align=4
LL_RCC_HSI_Disable:
0x3418E1CC: F249 0100 MOVW R1, #0x9000
0x3418E1D0: F2C5 6102 MOVT R1, #0x5602
0x3418E1D4: 2008 MOVS R0, #8
0x3418E1D6: 6008 STR R0, [R1]
0x3418E1D8: 4770 BX LR
Section .init.MCE1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
MCE1_IRQHandler:
0x3418E1DA: E7FE B MCE1_IRQHandler ; 0x3418E1DA
Section .text.LL_RCC_MSI_SetCalibTrimming from blto2_FSBL_lto.o, size=30, align=4
LL_RCC_MSI_SetCalibTrimming:
0x3418E1DC: B081 SUB SP, SP, #4
0x3418E1DE: 9000 STR R0, [SP, #0]
0x3418E1E0: F248 0144 MOVW R1, #0x8044
0x3418E1E4: F2C5 6102 MOVT R1, #0x5602
0x3418E1E8: 6808 LDR R0, [R1]
0x3418E1EA: F420 10F8 BIC R0, R0, #0x1F0000
0x3418E1EE: 9A00 LDR R2, [SP, #0]
0x3418E1F0: EA40 4002 ORR.W R0, R0, R2, LSL #16
0x3418E1F4: 6008 STR R0, [R1]
0x3418E1F6: B001 ADD SP, SP, #4
0x3418E1F8: 4770 BX LR
Section .init.MCE2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
MCE2_IRQHandler:
0x3418E1FA: E7FE B MCE2_IRQHandler ; 0x3418E1FA
Section .text.LL_RCC_MSI_Enable from blto2_FSBL_lto.o, size=14, align=4
LL_RCC_MSI_Enable:
0x3418E1FC: F648 0100 MOVW R1, #0x8800
0x3418E200: F2C5 6102 MOVT R1, #0x5602
0x3418E204: 2004 MOVS R0, #4
0x3418E206: 6008 STR R0, [R1]
0x3418E208: 4770 BX LR
Section .init.MCE3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
MCE3_IRQHandler:
0x3418E20A: E7FE B MCE3_IRQHandler ; 0x3418E20A
Section .text.LL_RCC_MSI_Disable from blto2_FSBL_lto.o, size=14, align=4
LL_RCC_MSI_Disable:
0x3418E20C: F249 0100 MOVW R1, #0x9000
0x3418E210: F2C5 6102 MOVT R1, #0x5602
0x3418E214: 2004 MOVS R0, #4
0x3418E216: 6008 STR R0, [R1]
0x3418E218: 4770 BX LR
Section .init.MCE4_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
MCE4_IRQHandler:
0x3418E21A: E7FE B MCE4_IRQHandler ; 0x3418E21A
Section .text.LL_RCC_LSI_Enable from blto2_FSBL_lto.o, size=14, align=4
LL_RCC_LSI_Enable:
0x3418E21C: F648 0100 MOVW R1, #0x8800
0x3418E220: F2C5 6102 MOVT R1, #0x5602
0x3418E224: 2001 MOVS R0, #1
0x3418E226: 6008 STR R0, [R1]
0x3418E228: 4770 BX LR
Section .init.ADC1_2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
ADC1_2_IRQHandler:
0x3418E22A: E7FE B ADC1_2_IRQHandler ; 0x3418E22A
Section .text.LL_RCC_LSI_Disable from blto2_FSBL_lto.o, size=14, align=4
LL_RCC_LSI_Disable:
0x3418E22C: F249 0100 MOVW R1, #0x9000
0x3418E230: F2C5 6102 MOVT R1, #0x5602
0x3418E234: 2001 MOVS R0, #1
0x3418E236: 6008 STR R0, [R1]
0x3418E238: 4770 BX LR
Section .init.CSI_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
CSI_IRQHandler:
0x3418E23A: E7FE B CSI_IRQHandler ; 0x3418E23A
Section .text.RCC_PLL_IsNewConfig from blto2_FSBL_lto.o, size=218, align=4
RCC_PLL_IsNewConfig:
0x3418E23C: B087 SUB SP, SP, #28
0x3418E23E: 9006 STR R0, [SP, #24]
0x3418E240: 9105 STR R1, [SP, #20]
0x3418E242: 2000 MOVS R0, #0
0x3418E244: 9001 STR R0, [SP, #4]
0x3418E246: 9906 LDR R1, [SP, #24]
0x3418E248: F248 0080 MOVW R0, #0x8080
0x3418E24C: F2C5 6002 MOVT R0, #0x5602
0x3418E250: EB00 1001 ADD.W R0, R0, R1, LSL #4
0x3418E254: 9004 STR R0, [SP, #16]
0x3418E256: 9906 LDR R1, [SP, #24]
0x3418E258: F248 0084 MOVW R0, #0x8084
0x3418E25C: F2C5 6002 MOVT R0, #0x5602
0x3418E260: EB00 1001 ADD.W R0, R0, R1, LSL #4
0x3418E264: 9003 STR R0, [SP, #12]
0x3418E266: 9906 LDR R1, [SP, #24]
0x3418E268: F248 0088 MOVW R0, #0x8088
0x3418E26C: F2C5 6002 MOVT R0, #0x5602
0x3418E270: EB00 1001 ADD.W R0, R0, R1, LSL #4
0x3418E274: 9002 STR R0, [SP, #8]
0x3418E276: 9804 LDR R0, [SP, #16]
0x3418E278: 6800 LDR R0, [R0]
0x3418E27A: F64F 7100 MOVW R1, #0xFF00
0x3418E27E: F2C7 31FF MOVT R1, #0x73FF
0x3418E282: 4008 ANDS R0, R1
0x3418E284: 9A05 LDR R2, [SP, #20]
0x3418E286: 6851 LDR R1, [R2, #4]
0x3418E288: 6893 LDR R3, [R2, #8]
0x3418E28A: 6912 LDR R2, [R2, #16]
0x3418E28C: EA41 5103 ORR.W R1, R1, R3, LSL #20
0x3418E290: EA41 2102 ORR.W R1, R1, R2, LSL #8
0x3418E294: 4288 CMP R0, R1
0x3418E296: D002 BEQ 46L1 ; 0x3418E29E
0x3418E298: 2001 MOVS R0, #1
0x3418E29A: 9001 STR R0, [SP, #4]
0x3418E29C: E038 B 46L7 ; 0x3418E310
.L1:
0x3418E29E: 9803 LDR R0, [SP, #12]
0x3418E2A0: 6800 LDR R0, [R0]
0x3418E2A2: F020 407F BIC R0, R0, #0xFF000000
0x3418E2A6: 9905 LDR R1, [SP, #20]
0x3418E2A8: 68C9 LDR R1, [R1, #12]
0x3418E2AA: 4288 CMP R0, R1
0x3418E2AC: D002 BEQ 46L2 ; 0x3418E2B4
0x3418E2AE: 2001 MOVS R0, #1
0x3418E2B0: 9001 STR R0, [SP, #4]
0x3418E2B2: E02D B 46L7 ; 0x3418E310
.L2:
0x3418E2B4: 9802 LDR R0, [SP, #8]
0x3418E2B6: 6800 LDR R0, [R0]
0x3418E2B8: F000 507C AND R0, R0, #0x3F000000
0x3418E2BC: 9A05 LDR R2, [SP, #20]
0x3418E2BE: 6951 LDR R1, [R2, #20]
0x3418E2C0: 6992 LDR R2, [R2, #24]
0x3418E2C2: 06C9 LSLS R1, R1, #27
0x3418E2C4: EA41 6102 ORR.W R1, R1, R2, LSL #24
0x3418E2C8: 4288 CMP R0, R1
0x3418E2CA: D002 BEQ 46L3 ; 0x3418E2D2
0x3418E2CC: 2001 MOVS R0, #1
0x3418E2CE: 9001 STR R0, [SP, #4]
0x3418E2D0: E01E B 46L7 ; 0x3418E310
.L3:
0x3418E2D2: F248 0004 MOVW R0, #0x8004
0x3418E2D6: F2C5 6002 MOVT R0, #0x5602
0x3418E2DA: 6800 LDR R0, [R0]
0x3418E2DC: 43C0 MVNS R0, R0
0x3418E2DE: 9906 LDR R1, [SP, #24]
0x3418E2E0: 40C8 LSRS R0, R1
0x3418E2E2: 05C0 LSLS R0, R0, #23
0x3418E2E4: 2800 CMP R0, #0
0x3418E2E6: D402 BMI 46L4 ; 0x3418E2EE
0x3418E2E8: 2002 MOVS R0, #2
0x3418E2EA: 9000 STR R0, [SP, #0]
0x3418E2EC: E009 B 46L6 ; 0x3418E302
.L4:
0x3418E2EE: 9804 LDR R0, [SP, #16]
0x3418E2F0: 6800 LDR R0, [R0]
0x3418E2F2: 0100 LSLS R0, R0, #4
0x3418E2F4: 2800 CMP R0, #0
0x3418E2F6: D502 BPL 46L5 ; 0x3418E2FE
0x3418E2F8: 2003 MOVS R0, #3
0x3418E2FA: 9000 STR R0, [SP, #0]
0x3418E2FC: E001 B 46L6 ; 0x3418E302
.L5:
0x3418E2FE: 2001 MOVS R0, #1
0x3418E300: 9000 STR R0, [SP, #0]
.L6:
0x3418E302: 9800 LDR R0, [SP, #0]
0x3418E304: 9905 LDR R1, [SP, #20]
0x3418E306: 6809 LDR R1, [R1]
0x3418E308: 4288 CMP R0, R1
0x3418E30A: D001 BEQ 46L7 ; 0x3418E310
0x3418E30C: 2001 MOVS R0, #1
0x3418E30E: 9001 STR R0, [SP, #4]
.L7:
0x3418E310: 9801 LDR R0, [SP, #4]
0x3418E312: B007 ADD SP, SP, #28
0x3418E314: 4770 BX LR
Section .init.DCMIPP_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
DCMIPP_IRQHandler:
0x3418E316: E7FE B DCMIPP_IRQHandler ; 0x3418E316
Section .text.RCC_PLL_Config from blto2_FSBL_lto.o, size=846, align=4
RCC_PLL_Config:
0x3418E318: B580 PUSH 123R7, LR}
0x3418E31A: B088 SUB SP, SP, #32
0x3418E31C: 9006 STR R0, [SP, #24]
0x3418E31E: 9105 STR R1, [SP, #20]
0x3418E320: 2000 MOVS R0, #0
0x3418E322: F88D 0007 STRB.W R0, [SP, #7]
0x3418E326: 9906 LDR R1, [SP, #24]
0x3418E328: F248 0080 MOVW R0, #0x8080
0x3418E32C: F2C5 6002 MOVT R0, #0x5602
0x3418E330: EB00 1001 ADD.W R0, R0, R1, LSL #4
0x3418E334: 9004 STR R0, [SP, #16]
0x3418E336: 9906 LDR R1, [SP, #24]
0x3418E338: F248 0084 MOVW R0, #0x8084
0x3418E33C: F2C5 6002 MOVT R0, #0x5602
0x3418E340: EB00 1001 ADD.W R0, R0, R1, LSL #4
0x3418E344: 9003 STR R0, [SP, #12]
0x3418E346: 9906 LDR R1, [SP, #24]
0x3418E348: F248 0088 MOVW R0, #0x8088
0x3418E34C: F2C5 6002 MOVT R0, #0x5602
0x3418E350: EB00 1001 ADD.W R0, R0, R1, LSL #4
0x3418E354: 9002 STR R0, [SP, #8]
0x3418E356: 9805 LDR R0, [SP, #20]
0x3418E358: 6800 LDR R0, [R0]
0x3418E35A: 2802 CMP R0, #2
0x3418E35C: F040 80F3 BNE.W 46L21 ; 0x3418E546
0x3418E360: 9805 LDR R0, [SP, #20]
0x3418E362: 6840 LDR R0, [R0, #4]
0x3418E364: B170 CBZ R0, .L1 ; 0x3418E384
0x3418E366: 9805 LDR R0, [SP, #20]
0x3418E368: 6840 LDR R0, [R0, #4]
0x3418E36A: F1B0 5F80 CMP.W R0, #0x10000000
0x3418E36E: D009 BEQ 46L1 ; 0x3418E384
0x3418E370: 9805 LDR R0, [SP, #20]
0x3418E372: 6840 LDR R0, [R0, #4]
0x3418E374: F1B0 5F00 CMP.W R0, #0x20000000
0x3418E378: D004 BEQ 46L1 ; 0x3418E384
0x3418E37A: 9805 LDR R0, [SP, #20]
0x3418E37C: 6840 LDR R0, [R0, #4]
0x3418E37E: F1B0 5F40 CMP.W R0, #0x30000000
0x3418E382: D100 BNE 46L2 ; 0x3418E386
.L1:
0x3418E384: E007 B 46L3 ; 0x3418E396
.L2:
0x3418E386: F642 30C4 MOVW R0, #0x2BC4 ; 0x34192BC4 = .rodata..L.str.47
0x3418E38A: F2C3 4019 MOVT R0, #0x3419 ; 0x34192BC4 = .rodata..L.str.47
0x3418E38E: F640 0159 MOVW R1, #0x0859
0x3418E392: F7FE FCCD BL assert_failed ; 0x3418CD30
.L3:
0x3418E396: 9805 LDR R0, [SP, #20]
0x3418E398: 7BC0 LDRB R0, [R0, #15]
0x3418E39A: B900 CBNZ R0, .L4 ; 0x3418E39E
0x3418E39C: E007 B 46L5 ; 0x3418E3AE
.L4:
0x3418E39E: F642 30C4 MOVW R0, #0x2BC4 ; 0x34192BC4 = .rodata..L.str.47
0x3418E3A2: F2C3 4019 MOVT R0, #0x3419 ; 0x34192BC4 = .rodata..L.str.47
0x3418E3A6: F640 015A MOVW R1, #0x085A
0x3418E3AA: F7FE FCC1 BL assert_failed ; 0x3418CD30
.L5:
0x3418E3AE: 9805 LDR R0, [SP, #20]
0x3418E3B0: 6880 LDR R0, [R0, #8]
0x3418E3B2: B120 CBZ R0, .L6 ; 0x3418E3BE
0x3418E3B4: 9805 LDR R0, [SP, #20]
0x3418E3B6: 6880 LDR R0, [R0, #8]
0x3418E3B8: 283F CMP R0, #63
0x3418E3BA: D800 BHI 46L6 ; 0x3418E3BE
0x3418E3BC: E007 B 46L7 ; 0x3418E3CE
.L6:
0x3418E3BE: F642 30C4 MOVW R0, #0x2BC4 ; 0x34192BC4 = .rodata..L.str.47
0x3418E3C2: F2C3 4019 MOVT R0, #0x3419 ; 0x34192BC4 = .rodata..L.str.47
0x3418E3C6: F640 015B MOVW R1, #0x085B
0x3418E3CA: F7FE FCB1 BL assert_failed ; 0x3418CD30
.L7:
0x3418E3CE: 9805 LDR R0, [SP, #20]
0x3418E3D0: 6900 LDR R0, [R0, #16]
0x3418E3D2: 280A CMP R0, #10
0x3418E3D4: D306 BCC 46L8 ; 0x3418E3E4
0x3418E3D6: 9805 LDR R0, [SP, #20]
0x3418E3D8: 6900 LDR R0, [R0, #16]
0x3418E3DA: F640 11C4 MOVW R1, #0x09C4
0x3418E3DE: 4288 CMP R0, R1
0x3418E3E0: D800 BHI 46L8 ; 0x3418E3E4
0x3418E3E2: E007 B 46L9 ; 0x3418E3F4
.L8:
0x3418E3E4: F642 30C4 MOVW R0, #0x2BC4 ; 0x34192BC4 = .rodata..L.str.47
0x3418E3E8: F2C3 4019 MOVT R0, #0x3419 ; 0x34192BC4 = .rodata..L.str.47
0x3418E3EC: F640 015C MOVW R1, #0x085C
0x3418E3F0: F7FE FC9E BL assert_failed ; 0x3418CD30
.L9:
0x3418E3F4: 9805 LDR R0, [SP, #20]
0x3418E3F6: 6940 LDR R0, [R0, #20]
0x3418E3F8: B120 CBZ R0, .L10 ; 0x3418E404
0x3418E3FA: 9805 LDR R0, [SP, #20]
0x3418E3FC: 6940 LDR R0, [R0, #20]
0x3418E3FE: 2807 CMP R0, #7
0x3418E400: D800 BHI 46L10 ; 0x3418E404
0x3418E402: E007 B 46L11 ; 0x3418E414
.L10:
0x3418E404: F642 30C4 MOVW R0, #0x2BC4 ; 0x34192BC4 = .rodata..L.str.47
0x3418E408: F2C3 4019 MOVT R0, #0x3419 ; 0x34192BC4 = .rodata..L.str.47
0x3418E40C: F640 015D MOVW R1, #0x085D
0x3418E410: F7FE FC8E BL assert_failed ; 0x3418CD30
.L11:
0x3418E414: 9805 LDR R0, [SP, #20]
0x3418E416: 6980 LDR R0, [R0, #24]
0x3418E418: B120 CBZ R0, .L12 ; 0x3418E424
0x3418E41A: 9805 LDR R0, [SP, #20]
0x3418E41C: 6980 LDR R0, [R0, #24]
0x3418E41E: 2807 CMP R0, #7
0x3418E420: D800 BHI 46L12 ; 0x3418E424
0x3418E422: E007 B 46L13 ; 0x3418E434
.L12:
0x3418E424: F642 30C4 MOVW R0, #0x2BC4 ; 0x34192BC4 = .rodata..L.str.47
0x3418E428: F2C3 4019 MOVT R0, #0x3419 ; 0x34192BC4 = .rodata..L.str.47
0x3418E42C: F640 015E MOVW R1, #0x085E
0x3418E430: F7FE FC7E BL assert_failed ; 0x3418CD30
.L13:
0x3418E434: 9906 LDR R1, [SP, #24]
0x3418E436: F44F 7080 MOV.W R0, #0x0100
0x3418E43A: 4088 LSLS R0, R1
0x3418E43C: F249 0100 MOVW R1, #0x9000
0x3418E440: F2C5 6102 MOVT R1, #0x5602
0x3418E444: 6008 STR R0, [R1]
0x3418E446: F7F2 FC0F BL HAL_GetTick ; 0x34180C68
0x3418E44A: 9000 STR R0, [SP, #0]
.L14:
0x3418E44C: F248 0004 MOVW R0, #0x8004
0x3418E450: F2C5 6002 MOVT R0, #0x5602
0x3418E454: 6800 LDR R0, [R0]
0x3418E456: 43C0 MVNS R0, R0
0x3418E458: 9906 LDR R1, [SP, #24]
0x3418E45A: 40C8 LSRS R0, R1
0x3418E45C: 05C0 LSLS R0, R0, #23
0x3418E45E: 2800 CMP R0, #0
0x3418E460: D40A BMI 46L16 ; 0x3418E478
0x3418E462: F7F2 FC01 BL HAL_GetTick ; 0x34180C68
0x3418E466: 9900 LDR R1, [SP, #0]
0x3418E468: 1A40 SUBS R0, R0, R1
0x3418E46A: 2802 CMP R0, #2
0x3418E46C: D303 BCC 46L15 ; 0x3418E476
0x3418E46E: 2003 MOVS R0, #3
0x3418E470: F88D 001F STRB.W R0, [SP, #31]
0x3418E474: E0F3 B 46L35 ; 0x3418E65E
.L15:
0x3418E476: E7E9 B 46L14 ; 0x3418E44C
.L16:
0x3418E478: 9902 LDR R1, [SP, #8]
0x3418E47A: 6808 LDR R0, [R1]
0x3418E47C: F040 0004 ORR R0, R0, #4
0x3418E480: 6008 STR R0, [R1]
0x3418E482: 9904 LDR R1, [SP, #16]
0x3418E484: 6808 LDR R0, [R1]
0x3418E486: F020 6000 BIC R0, R0, #0x08000000
0x3418E48A: 6008 STR R0, [R1]
0x3418E48C: 9804 LDR R0, [SP, #16]
0x3418E48E: 6800 LDR R0, [R0]
0x3418E490: 21FF MOVS R1, #255
0x3418E492: F6C8 4100 MOVT R1, #0x8C00
0x3418E496: 4008 ANDS R0, R1
0x3418E498: 9A05 LDR R2, [SP, #20]
0x3418E49A: 6851 LDR R1, [R2, #4]
0x3418E49C: 6893 LDR R3, [R2, #8]
0x3418E49E: 6912 LDR R2, [R2, #16]
0x3418E4A0: EA41 5103 ORR.W R1, R1, R3, LSL #20
0x3418E4A4: EA41 2102 ORR.W R1, R1, R2, LSL #8
0x3418E4A8: 4308 ORRS R0, R1
0x3418E4AA: 9904 LDR R1, [SP, #16]
0x3418E4AC: 6008 STR R0, [R1]
0x3418E4AE: 9802 LDR R0, [SP, #8]
0x3418E4B0: 6800 LDR R0, [R0]
0x3418E4B2: F020 507C BIC R0, R0, #0x3F000000
0x3418E4B6: 9A05 LDR R2, [SP, #20]
0x3418E4B8: 6951 LDR R1, [R2, #20]
0x3418E4BA: 6992 LDR R2, [R2, #24]
0x3418E4BC: 06C9 LSLS R1, R1, #27
0x3418E4BE: EA41 6102 ORR.W R1, R1, R2, LSL #24
0x3418E4C2: 4308 ORRS R0, R1
0x3418E4C4: 9902 LDR R1, [SP, #8]
0x3418E4C6: 6008 STR R0, [R1]
0x3418E4C8: 9803 LDR R0, [SP, #12]
0x3418E4CA: 6800 LDR R0, [R0]
0x3418E4CC: F000 407F AND R0, R0, #0xFF000000
0x3418E4D0: 9905 LDR R1, [SP, #20]
0x3418E4D2: 68C9 LDR R1, [R1, #12]
0x3418E4D4: 4308 ORRS R0, R1
0x3418E4D6: 9903 LDR R1, [SP, #12]
0x3418E4D8: 6008 STR R0, [R1]
0x3418E4DA: 9902 LDR R1, [SP, #8]
0x3418E4DC: 6808 LDR R0, [R1]
0x3418E4DE: F020 0008 BIC R0, R0, #8
0x3418E4E2: 6008 STR R0, [R1]
0x3418E4E4: 9805 LDR R0, [SP, #20]
0x3418E4E6: 68C0 LDR R0, [R0, #12]
0x3418E4E8: B120 CBZ R0, .L17 ; 0x3418E4F4
0x3418E4EA: 9902 LDR R1, [SP, #8]
0x3418E4EC: 6808 LDR R0, [R1]
0x3418E4EE: F040 000A ORR R0, R0, #10
0x3418E4F2: 6008 STR R0, [R1]
.L17:
0x3418E4F4: 9902 LDR R1, [SP, #8]
0x3418E4F6: 6808 LDR R0, [R1]
0x3418E4F8: 2201 MOVS R2, #1
0x3418E4FA: F2C4 0200 MOVT R2, #0x4000
0x3418E4FE: 4310 ORRS R0, R2
0x3418E500: 6008 STR R0, [R1]
0x3418E502: 9906 LDR R1, [SP, #24]
0x3418E504: F44F 7080 MOV.W R0, #0x0100
0x3418E508: 4088 LSLS R0, R1
0x3418E50A: F648 0100 MOVW R1, #0x8800
0x3418E50E: F2C5 6102 MOVT R1, #0x5602
0x3418E512: 6008 STR R0, [R1]
0x3418E514: F7F2 FBA8 BL HAL_GetTick ; 0x34180C68
0x3418E518: 9000 STR R0, [SP, #0]
.L18:
0x3418E51A: F248 0004 MOVW R0, #0x8004
0x3418E51E: F2C5 6002 MOVT R0, #0x5602
0x3418E522: 6800 LDR R0, [R0]
0x3418E524: 9906 LDR R1, [SP, #24]
0x3418E526: 40C8 LSRS R0, R1
0x3418E528: 05C0 LSLS R0, R0, #23
0x3418E52A: 2800 CMP R0, #0
0x3418E52C: D40A BMI 46L20 ; 0x3418E544
0x3418E52E: F7F2 FB9B BL HAL_GetTick ; 0x34180C68
0x3418E532: 9900 LDR R1, [SP, #0]
0x3418E534: 1A40 SUBS R0, R0, R1
0x3418E536: 2802 CMP R0, #2
0x3418E538: D303 BCC 46L19 ; 0x3418E542
0x3418E53A: 2003 MOVS R0, #3
0x3418E53C: F88D 001F STRB.W R0, [SP, #31]
0x3418E540: E08D B 46L35 ; 0x3418E65E
.L19:
0x3418E542: E7EA B 46L18 ; 0x3418E51A
.L20:
0x3418E544: E087 B 46L34 ; 0x3418E656
.L21:
0x3418E546: 9805 LDR R0, [SP, #20]
0x3418E548: 6800 LDR R0, [R0]
0x3418E54A: 2803 CMP R0, #3
0x3418E54C: D152 BNE 46L30 ; 0x3418E5F4
0x3418E54E: 9805 LDR R0, [SP, #20]
0x3418E550: 6840 LDR R0, [R0, #4]
0x3418E552: B170 CBZ R0, .L22 ; 0x3418E572
0x3418E554: 9805 LDR R0, [SP, #20]
0x3418E556: 6840 LDR R0, [R0, #4]
0x3418E558: F1B0 5F80 CMP.W R0, #0x10000000
0x3418E55C: D009 BEQ 46L22 ; 0x3418E572
0x3418E55E: 9805 LDR R0, [SP, #20]
0x3418E560: 6840 LDR R0, [R0, #4]
0x3418E562: F1B0 5F00 CMP.W R0, #0x20000000
0x3418E566: D004 BEQ 46L22 ; 0x3418E572
0x3418E568: 9805 LDR R0, [SP, #20]
0x3418E56A: 6840 LDR R0, [R0, #4]
0x3418E56C: F1B0 5F40 CMP.W R0, #0x30000000
0x3418E570: D100 BNE 46L23 ; 0x3418E574
.L22:
0x3418E572: E007 B 46L24 ; 0x3418E584
.L23:
0x3418E574: F642 30C4 MOVW R0, #0x2BC4 ; 0x34192BC4 = .rodata..L.str.47
0x3418E578: F2C3 4019 MOVT R0, #0x3419 ; 0x34192BC4 = .rodata..L.str.47
0x3418E57C: F640 019E MOVW R1, #0x089E
0x3418E580: F7FE FBD6 BL assert_failed ; 0x3418CD30
.L24:
0x3418E584: 9805 LDR R0, [SP, #20]
0x3418E586: 6840 LDR R0, [R0, #4]
0x3418E588: F7F3 F950 BL RCC_PLL_Source_IsReady ; 0x3418182C
0x3418E58C: 2801 CMP R0, #1
0x3418E58E: D12D BNE 46L28 ; 0x3418E5EC
0x3418E590: 9906 LDR R1, [SP, #24]
0x3418E592: F44F 7080 MOV.W R0, #0x0100
0x3418E596: 4088 LSLS R0, R1
0x3418E598: F249 0100 MOVW R1, #0x9000
0x3418E59C: F2C5 6102 MOVT R1, #0x5602
0x3418E5A0: 6008 STR R0, [R1]
0x3418E5A2: F7F2 FB61 BL HAL_GetTick ; 0x34180C68
0x3418E5A6: 9000 STR R0, [SP, #0]
.L25:
0x3418E5A8: F248 0004 MOVW R0, #0x8004
0x3418E5AC: F2C5 6002 MOVT R0, #0x5602
0x3418E5B0: 6800 LDR R0, [R0]
0x3418E5B2: 43C0 MVNS R0, R0
0x3418E5B4: 9906 LDR R1, [SP, #24]
0x3418E5B6: 40C8 LSRS R0, R1
0x3418E5B8: 05C0 LSLS R0, R0, #23
0x3418E5BA: 2800 CMP R0, #0
0x3418E5BC: D40A BMI 46L27 ; 0x3418E5D4
0x3418E5BE: F7F2 FB53 BL HAL_GetTick ; 0x34180C68
0x3418E5C2: 9900 LDR R1, [SP, #0]
0x3418E5C4: 1A40 SUBS R0, R0, R1
0x3418E5C6: 2802 CMP R0, #2
0x3418E5C8: D303 BCC 46L26 ; 0x3418E5D2
0x3418E5CA: 2003 MOVS R0, #3
0x3418E5CC: F88D 001F STRB.W R0, [SP, #31]
0x3418E5D0: E045 B 46L35 ; 0x3418E65E
.L26:
0x3418E5D2: E7E9 B 46L25 ; 0x3418E5A8
.L27:
0x3418E5D4: 9804 LDR R0, [SP, #16]
0x3418E5D6: 6800 LDR R0, [R0]
0x3418E5D8: F020 41F0 BIC R1, R0, #0x78000000
0x3418E5DC: 9805 LDR R0, [SP, #20]
0x3418E5DE: 6840 LDR R0, [R0, #4]
0x3418E5E0: 4308 ORRS R0, R1
0x3418E5E2: F040 6000 ORR R0, R0, #0x08000000
0x3418E5E6: 9904 LDR R1, [SP, #16]
0x3418E5E8: 6008 STR R0, [R1]
0x3418E5EA: E002 B 46L29 ; 0x3418E5F2
.L28:
0x3418E5EC: 2001 MOVS R0, #1
0x3418E5EE: F88D 0007 STRB.W R0, [SP, #7]
.L29:
0x3418E5F2: E030 B 46L34 ; 0x3418E656
.L30:
0x3418E5F4: 9805 LDR R0, [SP, #20]
0x3418E5F6: 6800 LDR R0, [R0]
0x3418E5F8: 2801 CMP R0, #1
0x3418E5FA: D12C BNE 46L34 ; 0x3418E656
0x3418E5FC: 9902 LDR R1, [SP, #8]
0x3418E5FE: 6808 LDR R0, [R1]
0x3418E600: F020 4080 BIC R0, R0, #0x40000000
0x3418E604: 6008 STR R0, [R1]
0x3418E606: 9906 LDR R1, [SP, #24]
0x3418E608: F44F 7080 MOV.W R0, #0x0100
0x3418E60C: 4088 LSLS R0, R1
0x3418E60E: F249 0100 MOVW R1, #0x9000
0x3418E612: F2C5 6102 MOVT R1, #0x5602
0x3418E616: 6008 STR R0, [R1]
0x3418E618: F7F2 FB26 BL HAL_GetTick ; 0x34180C68
0x3418E61C: 9000 STR R0, [SP, #0]
.L31:
0x3418E61E: F248 0004 MOVW R0, #0x8004
0x3418E622: F2C5 6002 MOVT R0, #0x5602
0x3418E626: 6800 LDR R0, [R0]
0x3418E628: 43C0 MVNS R0, R0
0x3418E62A: 9906 LDR R1, [SP, #24]
0x3418E62C: 40C8 LSRS R0, R1
0x3418E62E: 05C0 LSLS R0, R0, #23
0x3418E630: 2800 CMP R0, #0
0x3418E632: D40A BMI 46L33 ; 0x3418E64A
0x3418E634: F7F2 FB18 BL HAL_GetTick ; 0x34180C68
0x3418E638: 9900 LDR R1, [SP, #0]
0x3418E63A: 1A40 SUBS R0, R0, R1
0x3418E63C: 2802 CMP R0, #2
0x3418E63E: D303 BCC 46L32 ; 0x3418E648
0x3418E640: 2003 MOVS R0, #3
0x3418E642: F88D 001F STRB.W R0, [SP, #31]
0x3418E646: E00A B 46L35 ; 0x3418E65E
.L32:
0x3418E648: E7E9 B 46L31 ; 0x3418E61E
.L33:
0x3418E64A: 9904 LDR R1, [SP, #16]
0x3418E64C: 6808 LDR R0, [R1]
0x3418E64E: F020 6000 BIC R0, R0, #0x08000000
0x3418E652: 6008 STR R0, [R1]
0x3418E654: E7FF B 46L34 ; 0x3418E656
.L34:
0x3418E656: F89D 0007 LDRB.W R0, [SP, #7]
0x3418E65A: F88D 001F STRB.W R0, [SP, #31]
.L35:
0x3418E65E: F89D 001F LDRB.W R0, [SP, #31]
0x3418E662: B008 ADD SP, SP, #32
0x3418E664: BD80 POP 123R7, PC}
Section .init.PAHB_ERR_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
PAHB_ERR_IRQHandler:
0x3418E666: E7FE B PAHB_ERR_IRQHandler ; 0x3418E666
Section .text.RCC_PLL_Enable from blto2_FSBL_lto.o, size=94, align=4
RCC_PLL_Enable:
0x3418E668: B580 PUSH 123R7, LR}
0x3418E66A: B084 SUB SP, SP, #16
0x3418E66C: 9002 STR R0, [SP, #8]
0x3418E66E: 2000 MOVS R0, #0
0x3418E670: F88D 0007 STRB.W R0, [SP, #7]
0x3418E674: 9902 LDR R1, [SP, #8]
0x3418E676: F44F 7080 MOV.W R0, #0x0100
0x3418E67A: 4088 LSLS R0, R1
0x3418E67C: F648 0100 MOVW R1, #0x8800
0x3418E680: F2C5 6102 MOVT R1, #0x5602
0x3418E684: 6008 STR R0, [R1]
0x3418E686: F7F2 FAEF BL HAL_GetTick ; 0x34180C68
0x3418E68A: 9000 STR R0, [SP, #0]
.L1:
0x3418E68C: F248 0004 MOVW R0, #0x8004
0x3418E690: F2C5 6002 MOVT R0, #0x5602
0x3418E694: 6800 LDR R0, [R0]
0x3418E696: 9902 LDR R1, [SP, #8]
0x3418E698: 40C8 LSRS R0, R1
0x3418E69A: 05C0 LSLS R0, R0, #23
0x3418E69C: 2800 CMP R0, #0
0x3418E69E: D40A BMI 46L3 ; 0x3418E6B6
0x3418E6A0: F7F2 FAE2 BL HAL_GetTick ; 0x34180C68
0x3418E6A4: 9900 LDR R1, [SP, #0]
0x3418E6A6: 1A40 SUBS R0, R0, R1
0x3418E6A8: 2802 CMP R0, #2
0x3418E6AA: D303 BCC 46L2 ; 0x3418E6B4
0x3418E6AC: 2003 MOVS R0, #3
0x3418E6AE: F88D 000F STRB.W R0, [SP, #15]
0x3418E6B2: E004 B 46L4 ; 0x3418E6BE
.L2:
0x3418E6B4: E7EA B 46L1 ; 0x3418E68C
.L3:
0x3418E6B6: F89D 0007 LDRB.W R0, [SP, #7]
0x3418E6BA: F88D 000F STRB.W R0, [SP, #15]
.L4:
0x3418E6BE: F89D 000F LDRB.W R0, [SP, #15]
0x3418E6C2: B004 ADD SP, SP, #16
0x3418E6C4: BD80 POP 123R7, PC}
Section .init.NPU0_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
NPU0_IRQHandler:
0x3418E6C6: E7FE B NPU0_IRQHandler ; 0x3418E6C6
Section .text.HAL_RCC_ClockConfig from blto2_FSBL_lto.o, size=2498, align=4
HAL_RCC_ClockConfig:
0x3418E6C8: B580 PUSH 123R7, LR}
0x3418E6CA: B084 SUB SP, SP, #16
0x3418E6CC: 9002 STR R0, [SP, #8]
0x3418E6CE: 9802 LDR R0, [SP, #8]
0x3418E6D0: B920 CBNZ R0, .L1 ; 0x3418E6DC
0x3418E6D2: 2001 MOVS R0, #1
0x3418E6D4: F88D 000F STRB.W R0, [SP, #15]
0x3418E6D8: F000 BCD3 B.W 46L93 ; 0x3418F082
.L1:
0x3418E6DC: 9802 LDR R0, [SP, #8]
0x3418E6DE: 6800 LDR R0, [R0]
0x3418E6E0: 287F CMP R0, #127
0x3418E6E2: D800 BHI 46L2 ; 0x3418E6E6
0x3418E6E4: E007 B 46L3 ; 0x3418E6F6
.L2:
0x3418E6E6: F642 30C4 MOVW R0, #0x2BC4 ; 0x34192BC4 = .rodata..L.str.47
0x3418E6EA: F2C3 4019 MOVT R0, #0x3419 ; 0x34192BC4 = .rodata..L.str.47
0x3418E6EE: F240 3196 MOVW R1, #0x0396
0x3418E6F2: F7FE FB1D BL assert_failed ; 0x3418CD30
.L3:
0x3418E6F6: 9802 LDR R0, [SP, #8]
0x3418E6F8: 7800 LDRB R0, [R0]
0x3418E6FA: 0700 LSLS R0, R0, #28
0x3418E6FC: 2800 CMP R0, #0
0x3418E6FE: D53D BPL 46L7 ; 0x3418E77C
0x3418E700: 9802 LDR R0, [SP, #8]
0x3418E702: 6900 LDR R0, [R0, #16]
0x3418E704: B1D8 CBZ R0, .L4 ; 0x3418E73E
0x3418E706: 9802 LDR R0, [SP, #8]
0x3418E708: 6900 LDR R0, [R0, #16]
0x3418E70A: 2801 CMP R0, #1
0x3418E70C: D017 BEQ 46L4 ; 0x3418E73E
0x3418E70E: 9802 LDR R0, [SP, #8]
0x3418E710: 6900 LDR R0, [R0, #16]
0x3418E712: 2802 CMP R0, #2
0x3418E714: D013 BEQ 46L4 ; 0x3418E73E
0x3418E716: 9802 LDR R0, [SP, #8]
0x3418E718: 6900 LDR R0, [R0, #16]
0x3418E71A: 2803 CMP R0, #3
0x3418E71C: D00F BEQ 46L4 ; 0x3418E73E
0x3418E71E: 9802 LDR R0, [SP, #8]
0x3418E720: 6900 LDR R0, [R0, #16]
0x3418E722: 2804 CMP R0, #4
0x3418E724: D00B BEQ 46L4 ; 0x3418E73E
0x3418E726: 9802 LDR R0, [SP, #8]
0x3418E728: 6900 LDR R0, [R0, #16]
0x3418E72A: 2805 CMP R0, #5
0x3418E72C: D007 BEQ 46L4 ; 0x3418E73E
0x3418E72E: 9802 LDR R0, [SP, #8]
0x3418E730: 6900 LDR R0, [R0, #16]
0x3418E732: 2806 CMP R0, #6
0x3418E734: D003 BEQ 46L4 ; 0x3418E73E
0x3418E736: 9802 LDR R0, [SP, #8]
0x3418E738: 6900 LDR R0, [R0, #16]
0x3418E73A: 2807 CMP R0, #7
0x3418E73C: D100 BNE 46L5 ; 0x3418E740
.L4:
0x3418E73E: E007 B 46L6 ; 0x3418E750
.L5:
0x3418E740: F642 30C4 MOVW R0, #0x2BC4 ; 0x34192BC4 = .rodata..L.str.47
0x3418E744: F2C3 4019 MOVT R0, #0x3419 ; 0x34192BC4 = .rodata..L.str.47
0x3418E748: F240 319D MOVW R1, #0x039D
0x3418E74C: F7FE FAF0 BL assert_failed ; 0x3418CD30
.L6:
0x3418E750: 9802 LDR R0, [SP, #8]
0x3418E752: 6900 LDR R0, [R0, #16]
0x3418E754: F248 0124 MOVW R1, #0x8024
0x3418E758: F2C5 6102 MOVT R1, #0x5602
0x3418E75C: 6809 LDR R1, [R1]
0x3418E75E: F001 0107 AND R1, R1, #7
0x3418E762: 4288 CMP R0, R1
0x3418E764: D90A BLS 46L7 ; 0x3418E77C
0x3418E766: F248 0124 MOVW R1, #0x8024
0x3418E76A: F2C5 6102 MOVT R1, #0x5602
0x3418E76E: 6808 LDR R0, [R1]
0x3418E770: F020 0007 BIC R0, R0, #7
0x3418E774: 9A02 LDR R2, [SP, #8]
0x3418E776: 6912 LDR R2, [R2, #16]
0x3418E778: 4310 ORRS R0, R2
0x3418E77A: 6008 STR R0, [R1]
.L7:
0x3418E77C: 9802 LDR R0, [SP, #8]
0x3418E77E: 7800 LDRB R0, [R0]
0x3418E780: 06C0 LSLS R0, R0, #27
0x3418E782: 2800 CMP R0, #0
0x3418E784: D53D BPL 46L11 ; 0x3418E802
0x3418E786: 9802 LDR R0, [SP, #8]
0x3418E788: 6940 LDR R0, [R0, #20]
0x3418E78A: B1D8 CBZ R0, .L8 ; 0x3418E7C4
0x3418E78C: 9802 LDR R0, [SP, #8]
0x3418E78E: 6940 LDR R0, [R0, #20]
0x3418E790: 2810 CMP R0, #16
0x3418E792: D017 BEQ 46L8 ; 0x3418E7C4
0x3418E794: 9802 LDR R0, [SP, #8]
0x3418E796: 6940 LDR R0, [R0, #20]
0x3418E798: 2820 CMP R0, #32
0x3418E79A: D013 BEQ 46L8 ; 0x3418E7C4
0x3418E79C: 9802 LDR R0, [SP, #8]
0x3418E79E: 6940 LDR R0, [R0, #20]
0x3418E7A0: 2830 CMP R0, #48
0x3418E7A2: D00F BEQ 46L8 ; 0x3418E7C4
0x3418E7A4: 9802 LDR R0, [SP, #8]
0x3418E7A6: 6940 LDR R0, [R0, #20]
0x3418E7A8: 2840 CMP R0, #64
0x3418E7AA: D00B BEQ 46L8 ; 0x3418E7C4
0x3418E7AC: 9802 LDR R0, [SP, #8]
0x3418E7AE: 6940 LDR R0, [R0, #20]
0x3418E7B0: 2850 CMP R0, #80
0x3418E7B2: D007 BEQ 46L8 ; 0x3418E7C4
0x3418E7B4: 9802 LDR R0, [SP, #8]
0x3418E7B6: 6940 LDR R0, [R0, #20]
0x3418E7B8: 2860 CMP R0, #96
0x3418E7BA: D003 BEQ 46L8 ; 0x3418E7C4
0x3418E7BC: 9802 LDR R0, [SP, #8]
0x3418E7BE: 6940 LDR R0, [R0, #20]
0x3418E7C0: 2870 CMP R0, #112
0x3418E7C2: D100 BNE 46L9 ; 0x3418E7C6
.L8:
0x3418E7C4: E007 B 46L10 ; 0x3418E7D6
.L9:
0x3418E7C6: F642 30C4 MOVW R0, #0x2BC4 ; 0x34192BC4 = .rodata..L.str.47
0x3418E7CA: F2C3 4019 MOVT R0, #0x3419 ; 0x34192BC4 = .rodata..L.str.47
0x3418E7CE: F240 31A7 MOVW R1, #0x03A7
0x3418E7D2: F7FE FAAD BL assert_failed ; 0x3418CD30
.L10:
0x3418E7D6: 9802 LDR R0, [SP, #8]
0x3418E7D8: 6940 LDR R0, [R0, #20]
0x3418E7DA: F248 0124 MOVW R1, #0x8024
0x3418E7DE: F2C5 6102 MOVT R1, #0x5602
0x3418E7E2: 6809 LDR R1, [R1]
0x3418E7E4: F001 0170 AND R1, R1, #112
0x3418E7E8: 4288 CMP R0, R1
0x3418E7EA: D90A BLS 46L11 ; 0x3418E802
0x3418E7EC: F248 0124 MOVW R1, #0x8024
0x3418E7F0: F2C5 6102 MOVT R1, #0x5602
0x3418E7F4: 6808 LDR R0, [R1]
0x3418E7F6: F020 0070 BIC R0, R0, #112
0x3418E7FA: 9A02 LDR R2, [SP, #8]
0x3418E7FC: 6952 LDR R2, [R2, #20]
0x3418E7FE: 4310 ORRS R0, R2
0x3418E800: 6008 STR R0, [R1]
.L11:
0x3418E802: 9802 LDR R0, [SP, #8]
0x3418E804: 7800 LDRB R0, [R0]
0x3418E806: 0680 LSLS R0, R0, #26
0x3418E808: 2800 CMP R0, #0
0x3418E80A: D544 BPL 46L15 ; 0x3418E896
0x3418E80C: 9802 LDR R0, [SP, #8]
0x3418E80E: 6980 LDR R0, [R0, #24]
0x3418E810: B310 CBZ R0, .L12 ; 0x3418E858
0x3418E812: 9802 LDR R0, [SP, #8]
0x3418E814: 6980 LDR R0, [R0, #24]
0x3418E816: F5B0 5F80 CMP.W R0, #0x1000
0x3418E81A: D01D BEQ 46L12 ; 0x3418E858
0x3418E81C: 9802 LDR R0, [SP, #8]
0x3418E81E: 6980 LDR R0, [R0, #24]
0x3418E820: F5B0 5F00 CMP.W R0, #0x2000
0x3418E824: D018 BEQ 46L12 ; 0x3418E858
0x3418E826: 9802 LDR R0, [SP, #8]
0x3418E828: 6980 LDR R0, [R0, #24]
0x3418E82A: F5B0 5F40 CMP.W R0, #0x3000
0x3418E82E: D013 BEQ 46L12 ; 0x3418E858
0x3418E830: 9802 LDR R0, [SP, #8]
0x3418E832: 6980 LDR R0, [R0, #24]
0x3418E834: F5B0 4F80 CMP.W R0, #0x4000
0x3418E838: D00E BEQ 46L12 ; 0x3418E858
0x3418E83A: 9802 LDR R0, [SP, #8]
0x3418E83C: 6980 LDR R0, [R0, #24]
0x3418E83E: F5B0 4FA0 CMP.W R0, #0x5000
0x3418E842: D009 BEQ 46L12 ; 0x3418E858
0x3418E844: 9802 LDR R0, [SP, #8]
0x3418E846: 6980 LDR R0, [R0, #24]
0x3418E848: F5B0 4FC0 CMP.W R0, #0x6000
0x3418E84C: D004 BEQ 46L12 ; 0x3418E858
0x3418E84E: 9802 LDR R0, [SP, #8]
0x3418E850: 6980 LDR R0, [R0, #24]
0x3418E852: F5B0 4FE0 CMP.W R0, #0x7000
0x3418E856: D100 BNE 46L13 ; 0x3418E85A
.L12:
0x3418E858: E007 B 46L14 ; 0x3418E86A
.L13:
0x3418E85A: F642 30C4 MOVW R0, #0x2BC4 ; 0x34192BC4 = .rodata..L.str.47
0x3418E85E: F2C3 4019 MOVT R0, #0x3419 ; 0x34192BC4 = .rodata..L.str.47
0x3418E862: F240 31B1 MOVW R1, #0x03B1
0x3418E866: F7FE FA63 BL assert_failed ; 0x3418CD30
.L14:
0x3418E86A: 9802 LDR R0, [SP, #8]
0x3418E86C: 6980 LDR R0, [R0, #24]
0x3418E86E: F248 0124 MOVW R1, #0x8024
0x3418E872: F2C5 6102 MOVT R1, #0x5602
0x3418E876: 6809 LDR R1, [R1]
0x3418E878: F401 41E0 AND R1, R1, #0x7000
0x3418E87C: 4288 CMP R0, R1
0x3418E87E: D90A BLS 46L15 ; 0x3418E896
0x3418E880: F248 0124 MOVW R1, #0x8024
0x3418E884: F2C5 6102 MOVT R1, #0x5602
0x3418E888: 6808 LDR R0, [R1]
0x3418E88A: F420 40E0 BIC R0, R0, #0x7000
0x3418E88E: 9A02 LDR R2, [SP, #8]
0x3418E890: 6992 LDR R2, [R2, #24]
0x3418E892: 4310 ORRS R0, R2
0x3418E894: 6008 STR R0, [R1]
.L15:
0x3418E896: 9802 LDR R0, [SP, #8]
0x3418E898: 7800 LDRB R0, [R0]
0x3418E89A: 0640 LSLS R0, R0, #25
0x3418E89C: 2800 CMP R0, #0
0x3418E89E: D544 BPL 46L19 ; 0x3418E92A
0x3418E8A0: 9802 LDR R0, [SP, #8]
0x3418E8A2: 69C0 LDR R0, [R0, #28]
0x3418E8A4: B310 CBZ R0, .L16 ; 0x3418E8EC
0x3418E8A6: 9802 LDR R0, [SP, #8]
0x3418E8A8: 69C0 LDR R0, [R0, #28]
0x3418E8AA: F5B0 3F80 CMP.W R0, #0x010000
0x3418E8AE: D01D BEQ 46L16 ; 0x3418E8EC
0x3418E8B0: 9802 LDR R0, [SP, #8]
0x3418E8B2: 69C0 LDR R0, [R0, #28]
0x3418E8B4: F5B0 3F00 CMP.W R0, #0x020000
0x3418E8B8: D018 BEQ 46L16 ; 0x3418E8EC
0x3418E8BA: 9802 LDR R0, [SP, #8]
0x3418E8BC: 69C0 LDR R0, [R0, #28]
0x3418E8BE: F5B0 3F40 CMP.W R0, #0x030000
0x3418E8C2: D013 BEQ 46L16 ; 0x3418E8EC
0x3418E8C4: 9802 LDR R0, [SP, #8]
0x3418E8C6: 69C0 LDR R0, [R0, #28]
0x3418E8C8: F5B0 2F80 CMP.W R0, #0x040000
0x3418E8CC: D00E BEQ 46L16 ; 0x3418E8EC
0x3418E8CE: 9802 LDR R0, [SP, #8]
0x3418E8D0: 69C0 LDR R0, [R0, #28]
0x3418E8D2: F5B0 2FA0 CMP.W R0, #0x050000
0x3418E8D6: D009 BEQ 46L16 ; 0x3418E8EC
0x3418E8D8: 9802 LDR R0, [SP, #8]
0x3418E8DA: 69C0 LDR R0, [R0, #28]
0x3418E8DC: F5B0 2FC0 CMP.W R0, #0x060000
0x3418E8E0: D004 BEQ 46L16 ; 0x3418E8EC
0x3418E8E2: 9802 LDR R0, [SP, #8]
0x3418E8E4: 69C0 LDR R0, [R0, #28]
0x3418E8E6: F5B0 2FE0 CMP.W R0, #0x070000
0x3418E8EA: D100 BNE 46L17 ; 0x3418E8EE
.L16:
0x3418E8EC: E007 B 46L18 ; 0x3418E8FE
.L17:
0x3418E8EE: F642 30C4 MOVW R0, #0x2BC4 ; 0x34192BC4 = .rodata..L.str.47
0x3418E8F2: F2C3 4019 MOVT R0, #0x3419 ; 0x34192BC4 = .rodata..L.str.47
0x3418E8F6: F240 31BB MOVW R1, #0x03BB
0x3418E8FA: F7FE FA19 BL assert_failed ; 0x3418CD30
.L18:
0x3418E8FE: 9802 LDR R0, [SP, #8]
0x3418E900: 69C0 LDR R0, [R0, #28]
0x3418E902: F248 0124 MOVW R1, #0x8024
0x3418E906: F2C5 6102 MOVT R1, #0x5602
0x3418E90A: 6809 LDR R1, [R1]
0x3418E90C: F401 21E0 AND R1, R1, #0x070000
0x3418E910: 4288 CMP R0, R1
0x3418E912: D90A BLS 46L19 ; 0x3418E92A
0x3418E914: F248 0124 MOVW R1, #0x8024
0x3418E918: F2C5 6102 MOVT R1, #0x5602
0x3418E91C: 6808 LDR R0, [R1]
0x3418E91E: F420 20E0 BIC R0, R0, #0x070000
0x3418E922: 9A02 LDR R2, [SP, #8]
0x3418E924: 69D2 LDR R2, [R2, #28]
0x3418E926: 4310 ORRS R0, R2
0x3418E928: 6008 STR R0, [R1]
.L19:
0x3418E92A: 9802 LDR R0, [SP, #8]
0x3418E92C: 7800 LDRB R0, [R0]
0x3418E92E: 0740 LSLS R0, R0, #29
0x3418E930: 2800 CMP R0, #0
0x3418E932: D544 BPL 46L23 ; 0x3418E9BE
0x3418E934: 9802 LDR R0, [SP, #8]
0x3418E936: 68C0 LDR R0, [R0, #12]
0x3418E938: B310 CBZ R0, .L20 ; 0x3418E980
0x3418E93A: 9802 LDR R0, [SP, #8]
0x3418E93C: 68C0 LDR R0, [R0, #12]
0x3418E93E: F5B0 1F80 CMP.W R0, #0x100000
0x3418E942: D01D BEQ 46L20 ; 0x3418E980
0x3418E944: 9802 LDR R0, [SP, #8]
0x3418E946: 68C0 LDR R0, [R0, #12]
0x3418E948: F5B0 1F00 CMP.W R0, #0x200000
0x3418E94C: D018 BEQ 46L20 ; 0x3418E980
0x3418E94E: 9802 LDR R0, [SP, #8]
0x3418E950: 68C0 LDR R0, [R0, #12]
0x3418E952: F5B0 1F40 CMP.W R0, #0x300000
0x3418E956: D013 BEQ 46L20 ; 0x3418E980
0x3418E958: 9802 LDR R0, [SP, #8]
0x3418E95A: 68C0 LDR R0, [R0, #12]
0x3418E95C: F5B0 0F80 CMP.W R0, #0x400000
0x3418E960: D00E BEQ 46L20 ; 0x3418E980
0x3418E962: 9802 LDR R0, [SP, #8]
0x3418E964: 68C0 LDR R0, [R0, #12]
0x3418E966: F5B0 0FA0 CMP.W R0, #0x500000
0x3418E96A: D009 BEQ 46L20 ; 0x3418E980
0x3418E96C: 9802 LDR R0, [SP, #8]
0x3418E96E: 68C0 LDR R0, [R0, #12]
0x3418E970: F5B0 0FC0 CMP.W R0, #0x600000
0x3418E974: D004 BEQ 46L20 ; 0x3418E980
0x3418E976: 9802 LDR R0, [SP, #8]
0x3418E978: 68C0 LDR R0, [R0, #12]
0x3418E97A: F5B0 0FE0 CMP.W R0, #0x700000
0x3418E97E: D100 BNE 46L21 ; 0x3418E982
.L20:
0x3418E980: E007 B 46L22 ; 0x3418E992
.L21:
0x3418E982: F642 30C4 MOVW R0, #0x2BC4 ; 0x34192BC4 = .rodata..L.str.47
0x3418E986: F2C3 4019 MOVT R0, #0x3419 ; 0x34192BC4 = .rodata..L.str.47
0x3418E98A: F240 31C5 MOVW R1, #0x03C5
0x3418E98E: F7FE F9CF BL assert_failed ; 0x3418CD30
.L22:
0x3418E992: 9802 LDR R0, [SP, #8]
0x3418E994: 68C0 LDR R0, [R0, #12]
0x3418E996: F248 0124 MOVW R1, #0x8024
0x3418E99A: F2C5 6102 MOVT R1, #0x5602
0x3418E99E: 6809 LDR R1, [R1]
0x3418E9A0: F401 01E0 AND R1, R1, #0x700000
0x3418E9A4: 4288 CMP R0, R1
0x3418E9A6: D90A BLS 46L23 ; 0x3418E9BE
0x3418E9A8: F248 0124 MOVW R1, #0x8024
0x3418E9AC: F2C5 6102 MOVT R1, #0x5602
0x3418E9B0: 6808 LDR R0, [R1]
0x3418E9B2: F420 00E0 BIC R0, R0, #0x700000
0x3418E9B6: 9A02 LDR R2, [SP, #8]
0x3418E9B8: 68D2 LDR R2, [R2, #12]
0x3418E9BA: 4310 ORRS R0, R2
0x3418E9BC: 6008 STR R0, [R1]
.L23:
0x3418E9BE: 9802 LDR R0, [SP, #8]
0x3418E9C0: 7800 LDRB R0, [R0]
0x3418E9C2: 07C0 LSLS R0, R0, #31
0x3418E9C4: 2800 CMP R0, #0
0x3418E9C6: F000 80B3 BEQ.W 46L42 ; 0x3418EB30
0x3418E9CA: 9802 LDR R0, [SP, #8]
0x3418E9CC: 6840 LDR R0, [R0, #4]
0x3418E9CE: B170 CBZ R0, .L24 ; 0x3418E9EE
0x3418E9D0: 9802 LDR R0, [SP, #8]
0x3418E9D2: 6840 LDR R0, [R0, #4]
0x3418E9D4: F5B0 3F80 CMP.W R0, #0x010000
0x3418E9D8: D009 BEQ 46L24 ; 0x3418E9EE
0x3418E9DA: 9802 LDR R0, [SP, #8]
0x3418E9DC: 6840 LDR R0, [R0, #4]
0x3418E9DE: F5B0 3F00 CMP.W R0, #0x020000
0x3418E9E2: D004 BEQ 46L24 ; 0x3418E9EE
0x3418E9E4: 9802 LDR R0, [SP, #8]
0x3418E9E6: 6840 LDR R0, [R0, #4]
0x3418E9E8: F5B0 3F40 CMP.W R0, #0x030000
0x3418E9EC: D100 BNE 46L25 ; 0x3418E9F0
.L24:
0x3418E9EE: E007 B 46L26 ; 0x3418EA00
.L25:
0x3418E9F0: F642 30C4 MOVW R0, #0x2BC4 ; 0x34192BC4 = .rodata..L.str.47
0x3418E9F4: F2C3 4019 MOVT R0, #0x3419 ; 0x34192BC4 = .rodata..L.str.47
0x3418E9F8: F44F 7174 MOV.W R1, #0x03D0
0x3418E9FC: F7FE F998 BL assert_failed ; 0x3418CD30
.L26:
0x3418EA00: 9802 LDR R0, [SP, #8]
0x3418EA02: 6840 LDR R0, [R0, #4]
0x3418EA04: F5B0 3F00 CMP.W R0, #0x020000
0x3418EA08: D107 BNE 46L28 ; 0x3418EA1A
0x3418EA0A: F7F2 FF39 BL LL_RCC_HSE_IsReady ; 0x34181880
0x3418EA0E: B918 CBNZ R0, .L27 ; 0x3418EA18
0x3418EA10: 2001 MOVS R0, #1
0x3418EA12: F88D 000F STRB.W R0, [SP, #15]
0x3418EA16: E334 B 46L93 ; 0x3418F082
.L27:
0x3418EA18: E061 B 46L38 ; 0x3418EADE
.L28:
0x3418EA1A: 9802 LDR R0, [SP, #8]
0x3418EA1C: 6840 LDR R0, [R0, #4]
0x3418EA1E: F5B0 3F40 CMP.W R0, #0x030000
0x3418EA22: D148 BNE 46L35 ; 0x3418EAB6
0x3418EA24: 9802 LDR R0, [SP, #8]
0x3418EA26: 6A00 LDR R0, [R0, #32]
0x3418EA28: B170 CBZ R0, .L29 ; 0x3418EA48
0x3418EA2A: 9802 LDR R0, [SP, #8]
0x3418EA2C: 6A00 LDR R0, [R0, #32]
0x3418EA2E: F1B0 5F80 CMP.W R0, #0x10000000
0x3418EA32: D009 BEQ 46L29 ; 0x3418EA48
0x3418EA34: 9802 LDR R0, [SP, #8]
0x3418EA36: 6A00 LDR R0, [R0, #32]
0x3418EA38: F1B0 5F00 CMP.W R0, #0x20000000
0x3418EA3C: D004 BEQ 46L29 ; 0x3418EA48
0x3418EA3E: 9802 LDR R0, [SP, #8]
0x3418EA40: 6A00 LDR R0, [R0, #32]
0x3418EA42: F1B0 5F40 CMP.W R0, #0x30000000
0x3418EA46: D100 BNE 46L30 ; 0x3418EA4A
.L29:
0x3418EA48: E007 B 46L31 ; 0x3418EA5A
.L30:
0x3418EA4A: F642 30C4 MOVW R0, #0x2BC4 ; 0x34192BC4 = .rodata..L.str.47
0x3418EA4E: F2C3 4019 MOVT R0, #0x3419 ; 0x34192BC4 = .rodata..L.str.47
0x3418EA52: F240 31DF MOVW R1, #0x03DF
0x3418EA56: F7FE F96B BL assert_failed ; 0x3418CD30
.L31:
0x3418EA5A: 9802 LDR R0, [SP, #8]
0x3418EA5C: 6A40 LDR R0, [R0, #36]
0x3418EA5E: B128 CBZ R0, .L32 ; 0x3418EA6C
0x3418EA60: 9802 LDR R0, [SP, #8]
0x3418EA62: 6A40 LDR R0, [R0, #36]
0x3418EA64: F5B0 7F80 CMP.W R0, #0x0100
0x3418EA68: D800 BHI 46L32 ; 0x3418EA6C
0x3418EA6A: E007 B 46L33 ; 0x3418EA7C
.L32:
0x3418EA6C: F642 30C4 MOVW R0, #0x2BC4 ; 0x34192BC4 = .rodata..L.str.47
0x3418EA70: F2C3 4019 MOVT R0, #0x3419 ; 0x34192BC4 = .rodata..L.str.47
0x3418EA74: F44F 7178 MOV.W R1, #0x03E0
0x3418EA78: F7FE F95A BL assert_failed ; 0x3418CD30
.L33:
0x3418EA7C: F7F2 FE9E BL LL_RCC_IC1_GetSource ; 0x341817BC
0x3418EA80: 9902 LDR R1, [SP, #8]
0x3418EA82: 6A09 LDR R1, [R1, #32]
0x3418EA84: F000 FB02 BL RCC_IC_CheckPLLSources ; 0x3418F08C
0x3418EA88: 2801 CMP R0, #1
0x3418EA8A: D003 BEQ 46L34 ; 0x3418EA94
0x3418EA8C: 2001 MOVS R0, #1
0x3418EA8E: F88D 000F STRB.W R0, [SP, #15]
0x3418EA92: E2F6 B 46L93 ; 0x3418F082
.L34:
0x3418EA94: 9902 LDR R1, [SP, #8]
0x3418EA96: 6A08 LDR R0, [R1, #32]
0x3418EA98: 6A4A LDR R2, [R1, #36]
0x3418EA9A: 2100 MOVS R1, #0
0x3418EA9C: F6CF 71FF MOVT R1, #0xFFFF
0x3418EAA0: EB01 4102 ADD.W R1, R1, R2, LSL #16
0x3418EAA4: 4308 ORRS R0, R1
0x3418EAA6: F248 01C4 MOVW R1, #0x80C4
0x3418EAAA: F2C5 6102 MOVT R1, #0x5602
0x3418EAAE: 6008 STR R0, [R1]
0x3418EAB0: F000 FB62 BL LL_RCC_IC1_Enable ; 0x3418F178
0x3418EAB4: E013 B 46L38 ; 0x3418EADE
.L35:
0x3418EAB6: 9802 LDR R0, [SP, #8]
0x3418EAB8: 6840 LDR R0, [R0, #4]
0x3418EABA: F5B0 3F80 CMP.W R0, #0x010000
0x3418EABE: D107 BNE 46L37 ; 0x3418EAD0
0x3418EAC0: F7F2 FE5C BL LL_RCC_MSI_IsReady ; 0x3418177C
0x3418EAC4: B918 CBNZ R0, .L36 ; 0x3418EACE
0x3418EAC6: 2001 MOVS R0, #1
0x3418EAC8: F88D 000F STRB.W R0, [SP, #15]
0x3418EACC: E2D9 B 46L93 ; 0x3418F082
.L36:
0x3418EACE: E006 B 46L38 ; 0x3418EADE
.L37:
0x3418EAD0: F7F2 FE0E BL LL_RCC_HSI_IsReady ; 0x341816F0
0x3418EAD4: B918 CBNZ R0, .L38 ; 0x3418EADE
0x3418EAD6: 2001 MOVS R0, #1
0x3418EAD8: F88D 000F STRB.W R0, [SP, #15]
0x3418EADC: E2D1 B 46L93 ; 0x3418F082
.L38:
0x3418EADE: F248 0120 MOVW R1, #0x8020
0x3418EAE2: F2C5 6102 MOVT R1, #0x5602
0x3418EAE6: 6808 LDR R0, [R1]
0x3418EAE8: F420 3040 BIC R0, R0, #0x030000
0x3418EAEC: 9A02 LDR R2, [SP, #8]
0x3418EAEE: 6852 LDR R2, [R2, #4]
0x3418EAF0: 4310 ORRS R0, R2
0x3418EAF2: 6008 STR R0, [R1]
0x3418EAF4: F7F2 F8B8 BL HAL_GetTick ; 0x34180C68
0x3418EAF8: 9001 STR R0, [SP, #4]
.L39:
0x3418EAFA: F7F2 FE01 BL LL_RCC_GetCpuClkSource ; 0x34181700
0x3418EAFE: 9902 LDR R1, [SP, #8]
0x3418EB00: 6849 LDR R1, [R1, #4]
0x3418EB02: 0109 LSLS R1, R1, #4
0x3418EB04: 4288 CMP R0, R1
0x3418EB06: D00C BEQ 46L41 ; 0x3418EB22
0x3418EB08: F7F2 F8AE BL HAL_GetTick ; 0x34180C68
0x3418EB0C: 9901 LDR R1, [SP, #4]
0x3418EB0E: 1A40 SUBS R0, R0, R1
0x3418EB10: F241 3189 MOVW R1, #0x1389
0x3418EB14: 4288 CMP R0, R1
0x3418EB16: D303 BCC 46L40 ; 0x3418EB20
0x3418EB18: 2003 MOVS R0, #3
0x3418EB1A: F88D 000F STRB.W R0, [SP, #15]
0x3418EB1E: E2B0 B 46L93 ; 0x3418F082
.L40:
0x3418EB20: E7EB B 46L39 ; 0x3418EAFA
.L41:
0x3418EB22: F000 FB31 BL HAL_RCC_GetCpuClockFreq ; 0x3418F188
0x3418EB26: F240 21A4 MOVW R1, #0x02A4 ; 0x340002A4 = SystemCoreClock
0x3418EB2A: F2C3 4100 MOVT R1, #0x3400 ; 0x340002A4 = SystemCoreClock
0x3418EB2E: 6008 STR R0, [R1]
.L42:
0x3418EB30: 9802 LDR R0, [SP, #8]
0x3418EB32: 7800 LDRB R0, [R0]
0x3418EB34: 0780 LSLS R0, R0, #30
0x3418EB36: 2800 CMP R0, #0
0x3418EB38: F140 8136 BPL.W 46L72 ; 0x3418EDA8
0x3418EB3C: 9802 LDR R0, [SP, #8]
0x3418EB3E: 6880 LDR R0, [R0, #8]
0x3418EB40: B170 CBZ R0, .L43 ; 0x3418EB60
0x3418EB42: 9802 LDR R0, [SP, #8]
0x3418EB44: 6880 LDR R0, [R0, #8]
0x3418EB46: F1B0 7F80 CMP.W R0, #0x01000000
0x3418EB4A: D009 BEQ 46L43 ; 0x3418EB60
0x3418EB4C: 9802 LDR R0, [SP, #8]
0x3418EB4E: 6880 LDR R0, [R0, #8]
0x3418EB50: F1B0 7F00 CMP.W R0, #0x02000000
0x3418EB54: D004 BEQ 46L43 ; 0x3418EB60
0x3418EB56: 9802 LDR R0, [SP, #8]
0x3418EB58: 6880 LDR R0, [R0, #8]
0x3418EB5A: F1B0 7F40 CMP.W R0, #0x03000000
0x3418EB5E: D100 BNE 46L44 ; 0x3418EB62
.L43:
0x3418EB60: E007 B 46L45 ; 0x3418EB72
.L44:
0x3418EB62: F642 30C4 MOVW R0, #0x2BC4 ; 0x34192BC4 = .rodata..L.str.47
0x3418EB66: F2C3 4019 MOVT R0, #0x3419 ; 0x34192BC4 = .rodata..L.str.47
0x3418EB6A: F240 4119 MOVW R1, #0x0419
0x3418EB6E: F7FE F8DF BL assert_failed ; 0x3418CD30
.L45:
0x3418EB72: 9802 LDR R0, [SP, #8]
0x3418EB74: 6880 LDR R0, [R0, #8]
0x3418EB76: F1B0 7F00 CMP.W R0, #0x02000000
0x3418EB7A: D107 BNE 46L47 ; 0x3418EB8C
0x3418EB7C: F7F2 FE80 BL LL_RCC_HSE_IsReady ; 0x34181880
0x3418EB80: B918 CBNZ R0, .L46 ; 0x3418EB8A
0x3418EB82: 2001 MOVS R0, #1
0x3418EB84: F88D 000F STRB.W R0, [SP, #15]
0x3418EB88: E27B B 46L93 ; 0x3418F082
.L46:
0x3418EB8A: E0EB B 46L69 ; 0x3418ED64
.L47:
0x3418EB8C: 9802 LDR R0, [SP, #8]
0x3418EB8E: 6880 LDR R0, [R0, #8]
0x3418EB90: F1B0 7F40 CMP.W R0, #0x03000000
0x3418EB94: F040 80D4 BNE.W 46L66 ; 0x3418ED40
0x3418EB98: 9802 LDR R0, [SP, #8]
0x3418EB9A: 6A80 LDR R0, [R0, #40]
0x3418EB9C: B170 CBZ R0, .L48 ; 0x3418EBBC
0x3418EB9E: 9802 LDR R0, [SP, #8]
0x3418EBA0: 6A80 LDR R0, [R0, #40]
0x3418EBA2: F1B0 5F80 CMP.W R0, #0x10000000
0x3418EBA6: D009 BEQ 46L48 ; 0x3418EBBC
0x3418EBA8: 9802 LDR R0, [SP, #8]
0x3418EBAA: 6A80 LDR R0, [R0, #40]
0x3418EBAC: F1B0 5F00 CMP.W R0, #0x20000000
0x3418EBB0: D004 BEQ 46L48 ; 0x3418EBBC
0x3418EBB2: 9802 LDR R0, [SP, #8]
0x3418EBB4: 6A80 LDR R0, [R0, #40]
0x3418EBB6: F1B0 5F40 CMP.W R0, #0x30000000
0x3418EBBA: D100 BNE 46L49 ; 0x3418EBBE
.L48:
0x3418EBBC: E007 B 46L50 ; 0x3418EBCE
.L49:
0x3418EBBE: F642 30C4 MOVW R0, #0x2BC4 ; 0x34192BC4 = .rodata..L.str.47
0x3418EBC2: F2C3 4019 MOVT R0, #0x3419 ; 0x34192BC4 = .rodata..L.str.47
0x3418EBC6: F44F 6185 MOV.W R1, #0x0428
0x3418EBCA: F7FE F8B1 BL assert_failed ; 0x3418CD30
.L50:
0x3418EBCE: 9802 LDR R0, [SP, #8]
0x3418EBD0: 6AC0 LDR R0, [R0, #44]
0x3418EBD2: B128 CBZ R0, .L51 ; 0x3418EBE0
0x3418EBD4: 9802 LDR R0, [SP, #8]
0x3418EBD6: 6AC0 LDR R0, [R0, #44]
0x3418EBD8: F5B0 7F80 CMP.W R0, #0x0100
0x3418EBDC: D800 BHI 46L51 ; 0x3418EBE0
0x3418EBDE: E007 B 46L52 ; 0x3418EBF0
.L51:
0x3418EBE0: F642 30C4 MOVW R0, #0x2BC4 ; 0x34192BC4 = .rodata..L.str.47
0x3418EBE4: F2C3 4019 MOVT R0, #0x3419 ; 0x34192BC4 = .rodata..L.str.47
0x3418EBE8: F240 4129 MOVW R1, #0x0429
0x3418EBEC: F7FE F8A0 BL assert_failed ; 0x3418CD30
.L52:
0x3418EBF0: 9802 LDR R0, [SP, #8]
0x3418EBF2: 6B00 LDR R0, [R0, #48]
0x3418EBF4: B170 CBZ R0, .L53 ; 0x3418EC14
0x3418EBF6: 9802 LDR R0, [SP, #8]
0x3418EBF8: 6B00 LDR R0, [R0, #48]
0x3418EBFA: F1B0 5F80 CMP.W R0, #0x10000000
0x3418EBFE: D009 BEQ 46L53 ; 0x3418EC14
0x3418EC00: 9802 LDR R0, [SP, #8]
0x3418EC02: 6B00 LDR R0, [R0, #48]
0x3418EC04: F1B0 5F00 CMP.W R0, #0x20000000
0x3418EC08: D004 BEQ 46L53 ; 0x3418EC14
0x3418EC0A: 9802 LDR R0, [SP, #8]
0x3418EC0C: 6B00 LDR R0, [R0, #48]
0x3418EC0E: F1B0 5F40 CMP.W R0, #0x30000000
0x3418EC12: D100 BNE 46L54 ; 0x3418EC16
.L53:
0x3418EC14: E007 B 46L55 ; 0x3418EC26
.L54:
0x3418EC16: F642 30C4 MOVW R0, #0x2BC4 ; 0x34192BC4 = .rodata..L.str.47
0x3418EC1A: F2C3 4019 MOVT R0, #0x3419 ; 0x34192BC4 = .rodata..L.str.47
0x3418EC1E: F240 412A MOVW R1, #0x042A
0x3418EC22: F7FE F885 BL assert_failed ; 0x3418CD30
.L55:
0x3418EC26: 9802 LDR R0, [SP, #8]
0x3418EC28: 6B40 LDR R0, [R0, #52]
0x3418EC2A: B128 CBZ R0, .L56 ; 0x3418EC38
0x3418EC2C: 9802 LDR R0, [SP, #8]
0x3418EC2E: 6B40 LDR R0, [R0, #52]
0x3418EC30: F5B0 7F80 CMP.W R0, #0x0100
0x3418EC34: D800 BHI 46L56 ; 0x3418EC38
0x3418EC36: E007 B 46L57 ; 0x3418EC48
.L56:
0x3418EC38: F642 30C4 MOVW R0, #0x2BC4 ; 0x34192BC4 = .rodata..L.str.47
0x3418EC3C: F2C3 4019 MOVT R0, #0x3419 ; 0x34192BC4 = .rodata..L.str.47
0x3418EC40: F240 412B MOVW R1, #0x042B
0x3418EC44: F7FE F874 BL assert_failed ; 0x3418CD30
.L57:
0x3418EC48: 9802 LDR R0, [SP, #8]
0x3418EC4A: 6B80 LDR R0, [R0, #56]
0x3418EC4C: B170 CBZ R0, .L58 ; 0x3418EC6C
0x3418EC4E: 9802 LDR R0, [SP, #8]
0x3418EC50: 6B80 LDR R0, [R0, #56]
0x3418EC52: F1B0 5F80 CMP.W R0, #0x10000000
0x3418EC56: D009 BEQ 46L58 ; 0x3418EC6C
0x3418EC58: 9802 LDR R0, [SP, #8]
0x3418EC5A: 6B80 LDR R0, [R0, #56]
0x3418EC5C: F1B0 5F00 CMP.W R0, #0x20000000
0x3418EC60: D004 BEQ 46L58 ; 0x3418EC6C
0x3418EC62: 9802 LDR R0, [SP, #8]
0x3418EC64: 6B80 LDR R0, [R0, #56]
0x3418EC66: F1B0 5F40 CMP.W R0, #0x30000000
0x3418EC6A: D100 BNE 46L59 ; 0x3418EC6E
.L58:
0x3418EC6C: E007 B 46L60 ; 0x3418EC7E
.L59:
0x3418EC6E: F642 30C4 MOVW R0, #0x2BC4 ; 0x34192BC4 = .rodata..L.str.47
0x3418EC72: F2C3 4019 MOVT R0, #0x3419 ; 0x34192BC4 = .rodata..L.str.47
0x3418EC76: F240 412C MOVW R1, #0x042C
0x3418EC7A: F7FE F859 BL assert_failed ; 0x3418CD30
.L60:
0x3418EC7E: 9802 LDR R0, [SP, #8]
0x3418EC80: 6BC0 LDR R0, [R0, #60]
0x3418EC82: B128 CBZ R0, .L61 ; 0x3418EC90
0x3418EC84: 9802 LDR R0, [SP, #8]
0x3418EC86: 6BC0 LDR R0, [R0, #60]
0x3418EC88: F5B0 7F80 CMP.W R0, #0x0100
0x3418EC8C: D800 BHI 46L61 ; 0x3418EC90
0x3418EC8E: E007 B 46L62 ; 0x3418ECA0
.L61:
0x3418EC90: F642 30C4 MOVW R0, #0x2BC4 ; 0x34192BC4 = .rodata..L.str.47
0x3418EC94: F2C3 4019 MOVT R0, #0x3419 ; 0x34192BC4 = .rodata..L.str.47
0x3418EC98: F240 412D MOVW R1, #0x042D
0x3418EC9C: F7FE F848 BL assert_failed ; 0x3418CD30
.L62:
0x3418ECA0: F7F2 FD94 BL LL_RCC_IC2_GetSource ; 0x341817CC
0x3418ECA4: 9902 LDR R1, [SP, #8]
0x3418ECA6: 6A89 LDR R1, [R1, #40]
0x3418ECA8: F000 F9F0 BL RCC_IC_CheckPLLSources ; 0x3418F08C
0x3418ECAC: 2801 CMP R0, #1
0x3418ECAE: D003 BEQ 46L63 ; 0x3418ECB8
0x3418ECB0: 2001 MOVS R0, #1
0x3418ECB2: F88D 000F STRB.W R0, [SP, #15]
0x3418ECB6: E1E4 B 46L93 ; 0x3418F082
.L63:
0x3418ECB8: F7F2 FD90 BL LL_RCC_IC6_GetSource ; 0x341817DC
0x3418ECBC: 9902 LDR R1, [SP, #8]
0x3418ECBE: 6B09 LDR R1, [R1, #48]
0x3418ECC0: F000 F9E4 BL RCC_IC_CheckPLLSources ; 0x3418F08C
0x3418ECC4: 2801 CMP R0, #1
0x3418ECC6: D003 BEQ 46L64 ; 0x3418ECD0
0x3418ECC8: 2001 MOVS R0, #1
0x3418ECCA: F88D 000F STRB.W R0, [SP, #15]
0x3418ECCE: E1D8 B 46L93 ; 0x3418F082
.L64:
0x3418ECD0: F7F2 FD8C BL LL_RCC_IC11_GetSource ; 0x341817EC
0x3418ECD4: 9902 LDR R1, [SP, #8]
0x3418ECD6: 6B89 LDR R1, [R1, #56]
0x3418ECD8: F000 F9D8 BL RCC_IC_CheckPLLSources ; 0x3418F08C
0x3418ECDC: 2801 CMP R0, #1
0x3418ECDE: D003 BEQ 46L65 ; 0x3418ECE8
0x3418ECE0: 2001 MOVS R0, #1
0x3418ECE2: F88D 000F STRB.W R0, [SP, #15]
0x3418ECE6: E1CC B 46L93 ; 0x3418F082
.L65:
0x3418ECE8: 9902 LDR R1, [SP, #8]
0x3418ECEA: 6A88 LDR R0, [R1, #40]
0x3418ECEC: 6ACA LDR R2, [R1, #44]
0x3418ECEE: 2100 MOVS R1, #0
0x3418ECF0: F6CF 71FF MOVT R1, #0xFFFF
0x3418ECF4: EB01 4202 ADD.W R2, R1, R2, LSL #16
0x3418ECF8: 4310 ORRS R0, R2
0x3418ECFA: F248 02C8 MOVW R2, #0x80C8
0x3418ECFE: F2C5 6202 MOVT R2, #0x5602
0x3418ED02: 6010 STR R0, [R2]
0x3418ED04: 9A02 LDR R2, [SP, #8]
0x3418ED06: 6B10 LDR R0, [R2, #48]
0x3418ED08: 6B52 LDR R2, [R2, #52]
0x3418ED0A: EB01 4202 ADD.W R2, R1, R2, LSL #16
0x3418ED0E: 4310 ORRS R0, R2
0x3418ED10: F248 02D8 MOVW R2, #0x80D8
0x3418ED14: F2C5 6202 MOVT R2, #0x5602
0x3418ED18: 6010 STR R0, [R2]
0x3418ED1A: 9A02 LDR R2, [SP, #8]
0x3418ED1C: 6B90 LDR R0, [R2, #56]
0x3418ED1E: 6BD2 LDR R2, [R2, #60]
0x3418ED20: EB01 4102 ADD.W R1, R1, R2, LSL #16
0x3418ED24: 4308 ORRS R0, R1
0x3418ED26: F248 01EC MOVW R1, #0x80EC
0x3418ED2A: F2C5 6102 MOVT R1, #0x5602
0x3418ED2E: 6008 STR R0, [R1]
0x3418ED30: F648 2140 MOVW R1, #0x8A40
0x3418ED34: F2C5 6102 MOVT R1, #0x5602
0x3418ED38: F240 4022 MOVW R0, #0x0422
0x3418ED3C: 6008 STR R0, [R1]
0x3418ED3E: E011 B 46L69 ; 0x3418ED64
.L66:
0x3418ED40: 9802 LDR R0, [SP, #8]
0x3418ED42: 6880 LDR R0, [R0, #8]
0x3418ED44: B938 CBNZ R0, .L68 ; 0x3418ED56
0x3418ED46: F7F2 FCD3 BL LL_RCC_HSI_IsReady ; 0x341816F0
0x3418ED4A: B918 CBNZ R0, .L67 ; 0x3418ED54
0x3418ED4C: 2001 MOVS R0, #1
0x3418ED4E: F88D 000F STRB.W R0, [SP, #15]
0x3418ED52: E196 B 46L93 ; 0x3418F082
.L67:
0x3418ED54: E006 B 46L69 ; 0x3418ED64
.L68:
0x3418ED56: F7F2 FD11 BL LL_RCC_MSI_IsReady ; 0x3418177C
0x3418ED5A: B918 CBNZ R0, .L69 ; 0x3418ED64
0x3418ED5C: 2001 MOVS R0, #1
0x3418ED5E: F88D 000F STRB.W R0, [SP, #15]
0x3418ED62: E18E B 46L93 ; 0x3418F082
.L69:
0x3418ED64: F248 0120 MOVW R1, #0x8020
0x3418ED68: F2C5 6102 MOVT R1, #0x5602
0x3418ED6C: 6808 LDR R0, [R1]
0x3418ED6E: F020 7040 BIC R0, R0, #0x03000000
0x3418ED72: 9A02 LDR R2, [SP, #8]
0x3418ED74: 6892 LDR R2, [R2, #8]
0x3418ED76: 4310 ORRS R0, R2
0x3418ED78: 6008 STR R0, [R1]
0x3418ED7A: F7F1 FF75 BL HAL_GetTick ; 0x34180C68
0x3418ED7E: 9001 STR R0, [SP, #4]
.L70:
0x3418ED80: F7F2 FCC6 BL LL_RCC_GetSysClkSource ; 0x34181710
0x3418ED84: 9902 LDR R1, [SP, #8]
0x3418ED86: 6889 LDR R1, [R1, #8]
0x3418ED88: 0109 LSLS R1, R1, #4
0x3418ED8A: 4288 CMP R0, R1
0x3418ED8C: D00C BEQ 46L72 ; 0x3418EDA8
0x3418ED8E: F7F1 FF6B BL HAL_GetTick ; 0x34180C68
0x3418ED92: 9901 LDR R1, [SP, #4]
0x3418ED94: 1A40 SUBS R0, R0, R1
0x3418ED96: F241 3189 MOVW R1, #0x1389
0x3418ED9A: 4288 CMP R0, R1
0x3418ED9C: D303 BCC 46L71 ; 0x3418EDA6
0x3418ED9E: 2003 MOVS R0, #3
0x3418EDA0: F88D 000F STRB.W R0, [SP, #15]
0x3418EDA4: E16D B 46L93 ; 0x3418F082
.L71:
0x3418EDA6: E7EB B 46L70 ; 0x3418ED80
.L72:
0x3418EDA8: 9802 LDR R0, [SP, #8]
0x3418EDAA: 7800 LDRB R0, [R0]
0x3418EDAC: 0740 LSLS R0, R0, #29
0x3418EDAE: 2800 CMP R0, #0
0x3418EDB0: D544 BPL 46L76 ; 0x3418EE3C
0x3418EDB2: 9802 LDR R0, [SP, #8]
0x3418EDB4: 68C0 LDR R0, [R0, #12]
0x3418EDB6: B310 CBZ R0, .L73 ; 0x3418EDFE
0x3418EDB8: 9802 LDR R0, [SP, #8]
0x3418EDBA: 68C0 LDR R0, [R0, #12]
0x3418EDBC: F5B0 1F80 CMP.W R0, #0x100000
0x3418EDC0: D01D BEQ 46L73 ; 0x3418EDFE
0x3418EDC2: 9802 LDR R0, [SP, #8]
0x3418EDC4: 68C0 LDR R0, [R0, #12]
0x3418EDC6: F5B0 1F00 CMP.W R0, #0x200000
0x3418EDCA: D018 BEQ 46L73 ; 0x3418EDFE
0x3418EDCC: 9802 LDR R0, [SP, #8]
0x3418EDCE: 68C0 LDR R0, [R0, #12]
0x3418EDD0: F5B0 1F40 CMP.W R0, #0x300000
0x3418EDD4: D013 BEQ 46L73 ; 0x3418EDFE
0x3418EDD6: 9802 LDR R0, [SP, #8]
0x3418EDD8: 68C0 LDR R0, [R0, #12]
0x3418EDDA: F5B0 0F80 CMP.W R0, #0x400000
0x3418EDDE: D00E BEQ 46L73 ; 0x3418EDFE
0x3418EDE0: 9802 LDR R0, [SP, #8]
0x3418EDE2: 68C0 LDR R0, [R0, #12]
0x3418EDE4: F5B0 0FA0 CMP.W R0, #0x500000
0x3418EDE8: D009 BEQ 46L73 ; 0x3418EDFE
0x3418EDEA: 9802 LDR R0, [SP, #8]
0x3418EDEC: 68C0 LDR R0, [R0, #12]
0x3418EDEE: F5B0 0FC0 CMP.W R0, #0x600000
0x3418EDF2: D004 BEQ 46L73 ; 0x3418EDFE
0x3418EDF4: 9802 LDR R0, [SP, #8]
0x3418EDF6: 68C0 LDR R0, [R0, #12]
0x3418EDF8: F5B0 0FE0 CMP.W R0, #0x700000
0x3418EDFC: D100 BNE 46L74 ; 0x3418EE00
.L73:
0x3418EDFE: E007 B 46L75 ; 0x3418EE10
.L74:
0x3418EE00: F642 30C4 MOVW R0, #0x2BC4 ; 0x34192BC4 = .rodata..L.str.47
0x3418EE04: F2C3 4019 MOVT R0, #0x3419 ; 0x34192BC4 = .rodata..L.str.47
0x3418EE08: F44F 618E MOV.W R1, #0x0470
0x3418EE0C: F7FD FF90 BL assert_failed ; 0x3418CD30
.L75:
0x3418EE10: 9802 LDR R0, [SP, #8]
0x3418EE12: 68C0 LDR R0, [R0, #12]
0x3418EE14: F248 0124 MOVW R1, #0x8024
0x3418EE18: F2C5 6102 MOVT R1, #0x5602
0x3418EE1C: 6809 LDR R1, [R1]
0x3418EE1E: F401 01E0 AND R1, R1, #0x700000
0x3418EE22: 4288 CMP R0, R1
0x3418EE24: D20A BCS 46L76 ; 0x3418EE3C
0x3418EE26: F248 0124 MOVW R1, #0x8024
0x3418EE2A: F2C5 6102 MOVT R1, #0x5602
0x3418EE2E: 6808 LDR R0, [R1]
0x3418EE30: F420 00E0 BIC R0, R0, #0x700000
0x3418EE34: 9A02 LDR R2, [SP, #8]
0x3418EE36: 68D2 LDR R2, [R2, #12]
0x3418EE38: 4310 ORRS R0, R2
0x3418EE3A: 6008 STR R0, [R1]
.L76:
0x3418EE3C: 9802 LDR R0, [SP, #8]
0x3418EE3E: 7800 LDRB R0, [R0]
0x3418EE40: 0700 LSLS R0, R0, #28
0x3418EE42: 2800 CMP R0, #0
0x3418EE44: D53D BPL 46L80 ; 0x3418EEC2
0x3418EE46: 9802 LDR R0, [SP, #8]
0x3418EE48: 6900 LDR R0, [R0, #16]
0x3418EE4A: B1D8 CBZ R0, .L77 ; 0x3418EE84
0x3418EE4C: 9802 LDR R0, [SP, #8]
0x3418EE4E: 6900 LDR R0, [R0, #16]
0x3418EE50: 2801 CMP R0, #1
0x3418EE52: D017 BEQ 46L77 ; 0x3418EE84
0x3418EE54: 9802 LDR R0, [SP, #8]
0x3418EE56: 6900 LDR R0, [R0, #16]
0x3418EE58: 2802 CMP R0, #2
0x3418EE5A: D013 BEQ 46L77 ; 0x3418EE84
0x3418EE5C: 9802 LDR R0, [SP, #8]
0x3418EE5E: 6900 LDR R0, [R0, #16]
0x3418EE60: 2803 CMP R0, #3
0x3418EE62: D00F BEQ 46L77 ; 0x3418EE84
0x3418EE64: 9802 LDR R0, [SP, #8]
0x3418EE66: 6900 LDR R0, [R0, #16]
0x3418EE68: 2804 CMP R0, #4
0x3418EE6A: D00B BEQ 46L77 ; 0x3418EE84
0x3418EE6C: 9802 LDR R0, [SP, #8]
0x3418EE6E: 6900 LDR R0, [R0, #16]
0x3418EE70: 2805 CMP R0, #5
0x3418EE72: D007 BEQ 46L77 ; 0x3418EE84
0x3418EE74: 9802 LDR R0, [SP, #8]
0x3418EE76: 6900 LDR R0, [R0, #16]
0x3418EE78: 2806 CMP R0, #6
0x3418EE7A: D003 BEQ 46L77 ; 0x3418EE84
0x3418EE7C: 9802 LDR R0, [SP, #8]
0x3418EE7E: 6900 LDR R0, [R0, #16]
0x3418EE80: 2807 CMP R0, #7
0x3418EE82: D100 BNE 46L78 ; 0x3418EE86
.L77:
0x3418EE84: E007 B 46L79 ; 0x3418EE96
.L78:
0x3418EE86: F642 30C4 MOVW R0, #0x2BC4 ; 0x34192BC4 = .rodata..L.str.47
0x3418EE8A: F2C3 4019 MOVT R0, #0x3419 ; 0x34192BC4 = .rodata..L.str.47
0x3418EE8E: F240 417B MOVW R1, #0x047B
0x3418EE92: F7FD FF4D BL assert_failed ; 0x3418CD30
.L79:
0x3418EE96: 9802 LDR R0, [SP, #8]
0x3418EE98: 6900 LDR R0, [R0, #16]
0x3418EE9A: F248 0124 MOVW R1, #0x8024
0x3418EE9E: F2C5 6102 MOVT R1, #0x5602
0x3418EEA2: 6809 LDR R1, [R1]
0x3418EEA4: F001 0107 AND R1, R1, #7
0x3418EEA8: 4288 CMP R0, R1
0x3418EEAA: D20A BCS 46L80 ; 0x3418EEC2
0x3418EEAC: F248 0124 MOVW R1, #0x8024
0x3418EEB0: F2C5 6102 MOVT R1, #0x5602
0x3418EEB4: 6808 LDR R0, [R1]
0x3418EEB6: F020 0007 BIC R0, R0, #7
0x3418EEBA: 9A02 LDR R2, [SP, #8]
0x3418EEBC: 6912 LDR R2, [R2, #16]
0x3418EEBE: 4310 ORRS R0, R2
0x3418EEC0: 6008 STR R0, [R1]
.L80:
0x3418EEC2: 9802 LDR R0, [SP, #8]
0x3418EEC4: 7800 LDRB R0, [R0]
0x3418EEC6: 06C0 LSLS R0, R0, #27
0x3418EEC8: 2800 CMP R0, #0
0x3418EECA: D53D BPL 46L84 ; 0x3418EF48
0x3418EECC: 9802 LDR R0, [SP, #8]
0x3418EECE: 6940 LDR R0, [R0, #20]
0x3418EED0: B1D8 CBZ R0, .L81 ; 0x3418EF0A
0x3418EED2: 9802 LDR R0, [SP, #8]
0x3418EED4: 6940 LDR R0, [R0, #20]
0x3418EED6: 2810 CMP R0, #16
0x3418EED8: D017 BEQ 46L81 ; 0x3418EF0A
0x3418EEDA: 9802 LDR R0, [SP, #8]
0x3418EEDC: 6940 LDR R0, [R0, #20]
0x3418EEDE: 2820 CMP R0, #32
0x3418EEE0: D013 BEQ 46L81 ; 0x3418EF0A
0x3418EEE2: 9802 LDR R0, [SP, #8]
0x3418EEE4: 6940 LDR R0, [R0, #20]
0x3418EEE6: 2830 CMP R0, #48
0x3418EEE8: D00F BEQ 46L81 ; 0x3418EF0A
0x3418EEEA: 9802 LDR R0, [SP, #8]
0x3418EEEC: 6940 LDR R0, [R0, #20]
0x3418EEEE: 2840 CMP R0, #64
0x3418EEF0: D00B BEQ 46L81 ; 0x3418EF0A
0x3418EEF2: 9802 LDR R0, [SP, #8]
0x3418EEF4: 6940 LDR R0, [R0, #20]
0x3418EEF6: 2850 CMP R0, #80
0x3418EEF8: D007 BEQ 46L81 ; 0x3418EF0A
0x3418EEFA: 9802 LDR R0, [SP, #8]
0x3418EEFC: 6940 LDR R0, [R0, #20]
0x3418EEFE: 2860 CMP R0, #96
0x3418EF00: D003 BEQ 46L81 ; 0x3418EF0A
0x3418EF02: 9802 LDR R0, [SP, #8]
0x3418EF04: 6940 LDR R0, [R0, #20]
0x3418EF06: 2870 CMP R0, #112
0x3418EF08: D100 BNE 46L82 ; 0x3418EF0C
.L81:
0x3418EF0A: E007 B 46L83 ; 0x3418EF1C
.L82:
0x3418EF0C: F642 30C4 MOVW R0, #0x2BC4 ; 0x34192BC4 = .rodata..L.str.47
0x3418EF10: F2C3 4019 MOVT R0, #0x3419 ; 0x34192BC4 = .rodata..L.str.47
0x3418EF14: F240 4185 MOVW R1, #0x0485
0x3418EF18: F7FD FF0A BL assert_failed ; 0x3418CD30
.L83:
0x3418EF1C: 9802 LDR R0, [SP, #8]
0x3418EF1E: 6940 LDR R0, [R0, #20]
0x3418EF20: F248 0124 MOVW R1, #0x8024
0x3418EF24: F2C5 6102 MOVT R1, #0x5602
0x3418EF28: 6809 LDR R1, [R1]
0x3418EF2A: F001 0170 AND R1, R1, #112
0x3418EF2E: 4288 CMP R0, R1
0x3418EF30: D20A BCS 46L84 ; 0x3418EF48
0x3418EF32: F248 0124 MOVW R1, #0x8024
0x3418EF36: F2C5 6102 MOVT R1, #0x5602
0x3418EF3A: 6808 LDR R0, [R1]
0x3418EF3C: F020 0070 BIC R0, R0, #112
0x3418EF40: 9A02 LDR R2, [SP, #8]
0x3418EF42: 6952 LDR R2, [R2, #20]
0x3418EF44: 4310 ORRS R0, R2
0x3418EF46: 6008 STR R0, [R1]
.L84:
0x3418EF48: 9802 LDR R0, [SP, #8]
0x3418EF4A: 7800 LDRB R0, [R0]
0x3418EF4C: 0680 LSLS R0, R0, #26
0x3418EF4E: 2800 CMP R0, #0
0x3418EF50: D544 BPL 46L88 ; 0x3418EFDC
0x3418EF52: 9802 LDR R0, [SP, #8]
0x3418EF54: 6980 LDR R0, [R0, #24]
0x3418EF56: B310 CBZ R0, .L85 ; 0x3418EF9E
0x3418EF58: 9802 LDR R0, [SP, #8]
0x3418EF5A: 6980 LDR R0, [R0, #24]
0x3418EF5C: F5B0 5F80 CMP.W R0, #0x1000
0x3418EF60: D01D BEQ 46L85 ; 0x3418EF9E
0x3418EF62: 9802 LDR R0, [SP, #8]
0x3418EF64: 6980 LDR R0, [R0, #24]
0x3418EF66: F5B0 5F00 CMP.W R0, #0x2000
0x3418EF6A: D018 BEQ 46L85 ; 0x3418EF9E
0x3418EF6C: 9802 LDR R0, [SP, #8]
0x3418EF6E: 6980 LDR R0, [R0, #24]
0x3418EF70: F5B0 5F40 CMP.W R0, #0x3000
0x3418EF74: D013 BEQ 46L85 ; 0x3418EF9E
0x3418EF76: 9802 LDR R0, [SP, #8]
0x3418EF78: 6980 LDR R0, [R0, #24]
0x3418EF7A: F5B0 4F80 CMP.W R0, #0x4000
0x3418EF7E: D00E BEQ 46L85 ; 0x3418EF9E
0x3418EF80: 9802 LDR R0, [SP, #8]
0x3418EF82: 6980 LDR R0, [R0, #24]
0x3418EF84: F5B0 4FA0 CMP.W R0, #0x5000
0x3418EF88: D009 BEQ 46L85 ; 0x3418EF9E
0x3418EF8A: 9802 LDR R0, [SP, #8]
0x3418EF8C: 6980 LDR R0, [R0, #24]
0x3418EF8E: F5B0 4FC0 CMP.W R0, #0x6000
0x3418EF92: D004 BEQ 46L85 ; 0x3418EF9E
0x3418EF94: 9802 LDR R0, [SP, #8]
0x3418EF96: 6980 LDR R0, [R0, #24]
0x3418EF98: F5B0 4FE0 CMP.W R0, #0x7000
0x3418EF9C: D100 BNE 46L86 ; 0x3418EFA0
.L85:
0x3418EF9E: E007 B 46L87 ; 0x3418EFB0
.L86:
0x3418EFA0: F642 30C4 MOVW R0, #0x2BC4 ; 0x34192BC4 = .rodata..L.str.47
0x3418EFA4: F2C3 4019 MOVT R0, #0x3419 ; 0x34192BC4 = .rodata..L.str.47
0x3418EFA8: F240 418F MOVW R1, #0x048F
0x3418EFAC: F7FD FEC0 BL assert_failed ; 0x3418CD30
.L87:
0x3418EFB0: 9802 LDR R0, [SP, #8]
0x3418EFB2: 6980 LDR R0, [R0, #24]
0x3418EFB4: F248 0124 MOVW R1, #0x8024
0x3418EFB8: F2C5 6102 MOVT R1, #0x5602
0x3418EFBC: 6809 LDR R1, [R1]
0x3418EFBE: F401 41E0 AND R1, R1, #0x7000
0x3418EFC2: 4288 CMP R0, R1
0x3418EFC4: D20A BCS 46L88 ; 0x3418EFDC
0x3418EFC6: F248 0124 MOVW R1, #0x8024
0x3418EFCA: F2C5 6102 MOVT R1, #0x5602
0x3418EFCE: 6808 LDR R0, [R1]
0x3418EFD0: F420 40E0 BIC R0, R0, #0x7000
0x3418EFD4: 9A02 LDR R2, [SP, #8]
0x3418EFD6: 6992 LDR R2, [R2, #24]
0x3418EFD8: 4310 ORRS R0, R2
0x3418EFDA: 6008 STR R0, [R1]
.L88:
0x3418EFDC: 9802 LDR R0, [SP, #8]
0x3418EFDE: 7800 LDRB R0, [R0]
0x3418EFE0: 0640 LSLS R0, R0, #25
0x3418EFE2: 2800 CMP R0, #0
0x3418EFE4: D544 BPL 46L92 ; 0x3418F070
0x3418EFE6: 9802 LDR R0, [SP, #8]
0x3418EFE8: 69C0 LDR R0, [R0, #28]
0x3418EFEA: B310 CBZ R0, .L89 ; 0x3418F032
0x3418EFEC: 9802 LDR R0, [SP, #8]
0x3418EFEE: 69C0 LDR R0, [R0, #28]
0x3418EFF0: F5B0 3F80 CMP.W R0, #0x010000
0x3418EFF4: D01D BEQ 46L89 ; 0x3418F032
0x3418EFF6: 9802 LDR R0, [SP, #8]
0x3418EFF8: 69C0 LDR R0, [R0, #28]
0x3418EFFA: F5B0 3F00 CMP.W R0, #0x020000
0x3418EFFE: D018 BEQ 46L89 ; 0x3418F032
0x3418F000: 9802 LDR R0, [SP, #8]
0x3418F002: 69C0 LDR R0, [R0, #28]
0x3418F004: F5B0 3F40 CMP.W R0, #0x030000
0x3418F008: D013 BEQ 46L89 ; 0x3418F032
0x3418F00A: 9802 LDR R0, [SP, #8]
0x3418F00C: 69C0 LDR R0, [R0, #28]
0x3418F00E: F5B0 2F80 CMP.W R0, #0x040000
0x3418F012: D00E BEQ 46L89 ; 0x3418F032
0x3418F014: 9802 LDR R0, [SP, #8]
0x3418F016: 69C0 LDR R0, [R0, #28]
0x3418F018: F5B0 2FA0 CMP.W R0, #0x050000
0x3418F01C: D009 BEQ 46L89 ; 0x3418F032
0x3418F01E: 9802 LDR R0, [SP, #8]
0x3418F020: 69C0 LDR R0, [R0, #28]
0x3418F022: F5B0 2FC0 CMP.W R0, #0x060000
0x3418F026: D004 BEQ 46L89 ; 0x3418F032
0x3418F028: 9802 LDR R0, [SP, #8]
0x3418F02A: 69C0 LDR R0, [R0, #28]
0x3418F02C: F5B0 2FE0 CMP.W R0, #0x070000
0x3418F030: D100 BNE 46L90 ; 0x3418F034
.L89:
0x3418F032: E007 B 46L91 ; 0x3418F044
.L90:
0x3418F034: F642 30C4 MOVW R0, #0x2BC4 ; 0x34192BC4 = .rodata..L.str.47
0x3418F038: F2C3 4019 MOVT R0, #0x3419 ; 0x34192BC4 = .rodata..L.str.47
0x3418F03C: F240 4199 MOVW R1, #0x0499
0x3418F040: F7FD FE76 BL assert_failed ; 0x3418CD30
.L91:
0x3418F044: 9802 LDR R0, [SP, #8]
0x3418F046: 69C0 LDR R0, [R0, #28]
0x3418F048: F248 0124 MOVW R1, #0x8024
0x3418F04C: F2C5 6102 MOVT R1, #0x5602
0x3418F050: 6809 LDR R1, [R1]
0x3418F052: F401 21E0 AND R1, R1, #0x070000
0x3418F056: 4288 CMP R0, R1
0x3418F058: D20A BCS 46L92 ; 0x3418F070
0x3418F05A: F248 0124 MOVW R1, #0x8024
0x3418F05E: F2C5 6102 MOVT R1, #0x5602
0x3418F062: 6808 LDR R0, [R1]
0x3418F064: F420 20E0 BIC R0, R0, #0x070000
0x3418F068: 9A02 LDR R2, [SP, #8]
0x3418F06A: 69D2 LDR R2, [R2, #28]
0x3418F06C: 4310 ORRS R0, R2
0x3418F06E: 6008 STR R0, [R1]
.L92:
0x3418F070: F240 20A0 MOVW R0, #0x02A0 ; 0x340002A0 = uwTickPrio
0x3418F074: F2C3 4000 MOVT R0, #0x3400 ; 0x340002A0 = uwTickPrio
0x3418F078: 6800 LDR R0, [R0]
0x3418F07A: F7FD FFE5 BL HAL_InitTick ; 0x3418D048
0x3418F07E: F88D 000F STRB.W R0, [SP, #15]
.L93:
0x3418F082: F89D 000F LDRB.W R0, [SP, #15]
0x3418F086: B004 ADD SP, SP, #16
0x3418F088: BD80 POP 123R7, PC}
Section .init.NPU1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
NPU1_IRQHandler:
0x3418F08A: E7FE B NPU1_IRQHandler ; 0x3418F08A
Section .text.RCC_IC_CheckPLLSources from blto2_FSBL_lto.o, size=234, align=4
RCC_IC_CheckPLLSources:
0x3418F08C: B580 PUSH 123R7, LR}
0x3418F08E: B086 SUB SP, SP, #24
0x3418F090: 9005 STR R0, [SP, #20]
0x3418F092: 9104 STR R1, [SP, #16]
0x3418F094: 2001 MOVS R0, #1
0x3418F096: 9003 STR R0, [SP, #12]
0x3418F098: 9805 LDR R0, [SP, #20]
0x3418F09A: 9002 STR R0, [SP, #8]
0x3418F09C: B160 CBZ R0, .L1 ; 0x3418F0B8
0x3418F09E: 9802 LDR R0, [SP, #8]
0x3418F0A0: F1B0 5F80 CMP.W R0, #0x10000000
0x3418F0A4: D011 BEQ 46L3 ; 0x3418F0CA
0x3418F0A6: 9802 LDR R0, [SP, #8]
0x3418F0A8: F1B0 5F00 CMP.W R0, #0x20000000
0x3418F0AC: D016 BEQ 46L5 ; 0x3418F0DC
0x3418F0AE: 9802 LDR R0, [SP, #8]
0x3418F0B0: F1B0 5F40 CMP.W R0, #0x30000000
0x3418F0B4: D01B BEQ 46L7 ; 0x3418F0EE
0x3418F0B6: E023 B 46L9 ; 0x3418F100
.L1:
0x3418F0B8: F7F2 FB78 BL LL_RCC_PLL1_IsReady ; 0x341817AC
0x3418F0BC: B920 CBNZ R0, .L2 ; 0x3418F0C8
0x3418F0BE: F7F2 FBEF BL LL_RCC_PLL1_IsEnabledBypass ; 0x341818A0
0x3418F0C2: B908 CBNZ R0, .L2 ; 0x3418F0C8
0x3418F0C4: 2000 MOVS R0, #0
0x3418F0C6: 9003 STR R0, [SP, #12]
.L2:
0x3418F0C8: E01C B 46L10 ; 0x3418F104
.L3:
0x3418F0CA: F7F2 FB97 BL LL_RCC_PLL2_IsReady ; 0x341817FC
0x3418F0CE: B920 CBNZ R0, .L4 ; 0x3418F0DA
0x3418F0D0: F7F2 FBEE BL LL_RCC_PLL2_IsEnabledBypass ; 0x341818B0
0x3418F0D4: B908 CBNZ R0, .L4 ; 0x3418F0DA
0x3418F0D6: 2000 MOVS R0, #0
0x3418F0D8: 9003 STR R0, [SP, #12]
.L4:
0x3418F0DA: E013 B 46L10 ; 0x3418F104
.L5:
0x3418F0DC: F7F2 FB96 BL LL_RCC_PLL3_IsReady ; 0x3418180C
0x3418F0E0: B920 CBNZ R0, .L6 ; 0x3418F0EC
0x3418F0E2: F7F2 FBED BL LL_RCC_PLL3_IsEnabledBypass ; 0x341818C0
0x3418F0E6: B908 CBNZ R0, .L6 ; 0x3418F0EC
0x3418F0E8: 2000 MOVS R0, #0
0x3418F0EA: 9003 STR R0, [SP, #12]
.L6:
0x3418F0EC: E00A B 46L10 ; 0x3418F104
.L7:
0x3418F0EE: F7F2 FB95 BL LL_RCC_PLL4_IsReady ; 0x3418181C
0x3418F0F2: B920 CBNZ R0, .L8 ; 0x3418F0FE
0x3418F0F4: F7F2 FBEC BL LL_RCC_PLL4_IsEnabledBypass ; 0x341818D0
0x3418F0F8: B908 CBNZ R0, .L8 ; 0x3418F0FE
0x3418F0FA: 2000 MOVS R0, #0
0x3418F0FC: 9003 STR R0, [SP, #12]
.L8:
0x3418F0FE: E001 B 46L10 ; 0x3418F104
.L9:
0x3418F100: 2000 MOVS R0, #0
0x3418F102: 9003 STR R0, [SP, #12]
.L10:
0x3418F104: 9804 LDR R0, [SP, #16]
0x3418F106: 9001 STR R0, [SP, #4]
0x3418F108: B160 CBZ R0, .L11 ; 0x3418F124
0x3418F10A: 9801 LDR R0, [SP, #4]
0x3418F10C: F1B0 5F80 CMP.W R0, #0x10000000
0x3418F110: D011 BEQ 46L13 ; 0x3418F136
0x3418F112: 9801 LDR R0, [SP, #4]
0x3418F114: F1B0 5F00 CMP.W R0, #0x20000000
0x3418F118: D016 BEQ 46L15 ; 0x3418F148
0x3418F11A: 9801 LDR R0, [SP, #4]
0x3418F11C: F1B0 5F40 CMP.W R0, #0x30000000
0x3418F120: D01B BEQ 46L17 ; 0x3418F15A
0x3418F122: E023 B 46L19 ; 0x3418F16C
.L11:
0x3418F124: F7F2 FB42 BL LL_RCC_PLL1_IsReady ; 0x341817AC
0x3418F128: B920 CBNZ R0, .L12 ; 0x3418F134
0x3418F12A: F7F2 FBB9 BL LL_RCC_PLL1_IsEnabledBypass ; 0x341818A0
0x3418F12E: B908 CBNZ R0, .L12 ; 0x3418F134
0x3418F130: 2000 MOVS R0, #0
0x3418F132: 9003 STR R0, [SP, #12]
.L12:
0x3418F134: E01C B 46L20 ; 0x3418F170
.L13:
0x3418F136: F7F2 FB61 BL LL_RCC_PLL2_IsReady ; 0x341817FC
0x3418F13A: B920 CBNZ R0, .L14 ; 0x3418F146
0x3418F13C: F7F2 FBB8 BL LL_RCC_PLL2_IsEnabledBypass ; 0x341818B0
0x3418F140: B908 CBNZ R0, .L14 ; 0x3418F146
0x3418F142: 2000 MOVS R0, #0
0x3418F144: 9003 STR R0, [SP, #12]
.L14:
0x3418F146: E013 B 46L20 ; 0x3418F170
.L15:
0x3418F148: F7F2 FB60 BL LL_RCC_PLL3_IsReady ; 0x3418180C
0x3418F14C: B920 CBNZ R0, .L16 ; 0x3418F158
0x3418F14E: F7F2 FBB7 BL LL_RCC_PLL3_IsEnabledBypass ; 0x341818C0
0x3418F152: B908 CBNZ R0, .L16 ; 0x3418F158
0x3418F154: 2000 MOVS R0, #0
0x3418F156: 9003 STR R0, [SP, #12]
.L16:
0x3418F158: E00A B 46L20 ; 0x3418F170
.L17:
0x3418F15A: F7F2 FB5F BL LL_RCC_PLL4_IsReady ; 0x3418181C
0x3418F15E: B920 CBNZ R0, .L18 ; 0x3418F16A
0x3418F160: F7F2 FBB6 BL LL_RCC_PLL4_IsEnabledBypass ; 0x341818D0
0x3418F164: B908 CBNZ R0, .L18 ; 0x3418F16A
0x3418F166: 2000 MOVS R0, #0
0x3418F168: 9003 STR R0, [SP, #12]
.L18:
0x3418F16A: E001 B 46L20 ; 0x3418F170
.L19:
0x3418F16C: 2000 MOVS R0, #0
0x3418F16E: 9003 STR R0, [SP, #12]
.L20:
0x3418F170: 9803 LDR R0, [SP, #12]
0x3418F172: B006 ADD SP, SP, #24
0x3418F174: BD80 POP 123R7, PC}
Section .init.NPU2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
NPU2_IRQHandler:
0x3418F176: E7FE B NPU2_IRQHandler ; 0x3418F176
Section .text.LL_RCC_IC1_Enable from blto2_FSBL_lto.o, size=14, align=4
LL_RCC_IC1_Enable:
0x3418F178: F648 2140 MOVW R1, #0x8A40
0x3418F17C: F2C5 6102 MOVT R1, #0x5602
0x3418F180: 2001 MOVS R0, #1
0x3418F182: 6008 STR R0, [R1]
0x3418F184: 4770 BX LR
Section .init.NPU3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
NPU3_IRQHandler:
0x3418F186: E7FE B NPU3_IRQHandler ; 0x3418F186
Section .text.HAL_RCC_GetCpuClockFreq from blto2_FSBL_lto.o, size=238, align=4
HAL_RCC_GetCpuClockFreq:
0x3418F188: B580 PUSH 123R7, LR}
0x3418F18A: B084 SUB SP, SP, #16
0x3418F18C: 2000 MOVS R0, #0
0x3418F18E: 9003 STR R0, [SP, #12]
0x3418F190: F7F2 FAB6 BL LL_RCC_GetCpuClkSource ; 0x34181700
0x3418F194: 4601 MOV R1, R0
0x3418F196: 9101 STR R1, [SP, #4]
0x3418F198: B160 CBZ R0, .L1 ; 0x3418F1B4
0x3418F19A: 9801 LDR R0, [SP, #4]
0x3418F19C: F5B0 1F80 CMP.W R0, #0x100000
0x3418F1A0: D012 BEQ 46L2 ; 0x3418F1C8
0x3418F1A2: 9801 LDR R0, [SP, #4]
0x3418F1A4: F5B0 1F00 CMP.W R0, #0x200000
0x3418F1A8: D022 BEQ 46L3 ; 0x3418F1F0
0x3418F1AA: 9801 LDR R0, [SP, #4]
0x3418F1AC: F5B0 1F40 CMP.W R0, #0x300000
0x3418F1B0: D024 BEQ 46L4 ; 0x3418F1FC
0x3418F1B2: E05D B 46L10 ; 0x3418F270
.L1:
0x3418F1B4: F7F2 FB6C BL LL_RCC_HSI_GetDivider ; 0x34181890
0x3418F1B8: 09C1 LSRS R1, R0, #7
0x3418F1BA: F249 0000 MOVW R0, #0x9000
0x3418F1BE: F2C0 30D0 MOVT R0, #0x03D0
0x3418F1C2: 40C8 LSRS R0, R1
0x3418F1C4: 9003 STR R0, [SP, #12]
0x3418F1C6: E053 B 46L10 ; 0x3418F270
.L2:
0x3418F1C8: F248 0044 MOVW R0, #0x8044
0x3418F1CC: F2C5 6002 MOVT R0, #0x5602
0x3418F1D0: 6800 LDR R0, [R0]
0x3418F1D2: F400 7000 AND R0, R0, #0x0200
0x3418F1D6: F5B0 7F00 CMP.W R0, #0x0200
0x3418F1DA: F640 1000 MOVW R0, #0x0900
0x3418F1DE: F2C0 003D MOVT R0, #61
0x3418F1E2: BF04 ITT EQ
0x3418F1E4: F242 4000 MOVWEQ R0, #0x2400
0x3418F1E8: F2C0 00F4 MOVTEQ R0, #244
0x3418F1EC: 9003 STR R0, [SP, #12]
0x3418F1EE: E03F B 46L10 ; 0x3418F270
.L3:
0x3418F1F0: F646 4000 MOVW R0, #0x6C00
0x3418F1F4: F2C0 20DC MOVT R0, #0x02DC
0x3418F1F8: 9003 STR R0, [SP, #12]
0x3418F1FA: E039 B 46L10 ; 0x3418F270
.L4:
0x3418F1FC: F000 F83C BL LL_RCC_IC1_GetDivider ; 0x3418F278
0x3418F200: 9002 STR R0, [SP, #8]
0x3418F202: F7F2 FADB BL LL_RCC_IC1_GetSource ; 0x341817BC
0x3418F206: 4601 MOV R1, R0
0x3418F208: 9100 STR R1, [SP, #0]
0x3418F20A: B160 CBZ R0, .L5 ; 0x3418F226
0x3418F20C: 9800 LDR R0, [SP, #0]
0x3418F20E: F1B0 5F80 CMP.W R0, #0x10000000
0x3418F212: D011 BEQ 46L6 ; 0x3418F238
0x3418F214: 9800 LDR R0, [SP, #0]
0x3418F216: F1B0 5F00 CMP.W R0, #0x20000000
0x3418F21A: D016 BEQ 46L7 ; 0x3418F24A
0x3418F21C: 9800 LDR R0, [SP, #0]
0x3418F21E: F1B0 5F40 CMP.W R0, #0x30000000
0x3418F222: D01B BEQ 46L8 ; 0x3418F25C
0x3418F224: E023 B 46L9 ; 0x3418F26E
.L5:
0x3418F226: F001 FBAF BL HAL_RCCEx_GetPLL1CLKFreq ; 0x34190988
0x3418F22A: 9003 STR R0, [SP, #12]
0x3418F22C: 9803 LDR R0, [SP, #12]
0x3418F22E: 9902 LDR R1, [SP, #8]
0x3418F230: FBB0 F0F1 UDIV R0, R0, R1
0x3418F234: 9003 STR R0, [SP, #12]
0x3418F236: E01A B 46L9 ; 0x3418F26E
.L6:
0x3418F238: F001 FBE8 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34190A0C
0x3418F23C: 9003 STR R0, [SP, #12]
0x3418F23E: 9803 LDR R0, [SP, #12]
0x3418F240: 9902 LDR R1, [SP, #8]
0x3418F242: FBB0 F0F1 UDIV R0, R0, R1
0x3418F246: 9003 STR R0, [SP, #12]
0x3418F248: E011 B 46L9 ; 0x3418F26E
.L7:
0x3418F24A: F001 FC21 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x34190A90
0x3418F24E: 9003 STR R0, [SP, #12]
0x3418F250: 9803 LDR R0, [SP, #12]
0x3418F252: 9902 LDR R1, [SP, #8]
0x3418F254: FBB0 F0F1 UDIV R0, R0, R1
0x3418F258: 9003 STR R0, [SP, #12]
0x3418F25A: E008 B 46L9 ; 0x3418F26E
.L8:
0x3418F25C: F001 FC5A BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34190B14
0x3418F260: 9003 STR R0, [SP, #12]
0x3418F262: 9803 LDR R0, [SP, #12]
0x3418F264: 9902 LDR R1, [SP, #8]
0x3418F266: FBB0 F0F1 UDIV R0, R0, R1
0x3418F26A: 9003 STR R0, [SP, #12]
0x3418F26C: E7FF B 46L9 ; 0x3418F26E
.L9:
0x3418F26E: E7FF B 46L10 ; 0x3418F270
.L10:
0x3418F270: 9803 LDR R0, [SP, #12]
0x3418F272: B004 ADD SP, SP, #16
0x3418F274: BD80 POP 123R7, PC}
Section .init.CACHEAXI_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
CACHEAXI_IRQHandler:
0x3418F276: E7FE B CACHEAXI_IRQHandler ; 0x3418F276
Section .text.LL_RCC_IC1_GetDivider from blto2_FSBL_lto.o, size=22, align=4
LL_RCC_IC1_GetDivider:
0x3418F278: F248 00C4 MOVW R0, #0x80C4
0x3418F27C: F2C5 6002 MOVT R0, #0x5602
0x3418F280: 6800 LDR R0, [R0]
0x3418F282: F400 017F AND R1, R0, #0xFF0000
0x3418F286: 2001 MOVS R0, #1
0x3418F288: EB00 4011 ADD.W R0, R0, R1, LSR #16
0x3418F28C: 4770 BX LR
Section .init.LTDC_LO_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
LTDC_LO_IRQHandler:
0x3418F28E: E7FE B LTDC_LO_IRQHandler ; 0x3418F28E
Section .text.HAL_RCC_GetSysClockFreq from blto2_FSBL_lto.o, size=26, align=4
HAL_RCC_GetSysClockFreq:
0x3418F290: B580 PUSH 123R7, LR}
0x3418F292: B082 SUB SP, SP, #8
0x3418F294: F7F2 FA9A BL LL_RCC_IC2_GetSource ; 0x341817CC
0x3418F298: 9001 STR R0, [SP, #4]
0x3418F29A: F000 F807 BL LL_RCC_IC2_GetDivider ; 0x3418F2AC
0x3418F29E: 4601 MOV R1, R0
0x3418F2A0: 9801 LDR R0, [SP, #4]
0x3418F2A2: F7F2 FB1D BL RCC_GetSysClockFreq ; 0x341818E0
0x3418F2A6: B002 ADD SP, SP, #8
0x3418F2A8: BD80 POP 123R7, PC}
Section .init.LTDC_LO_ERR_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
LTDC_LO_ERR_IRQHandler:
0x3418F2AA: E7FE B LTDC_LO_ERR_IRQHandler ; 0x3418F2AA
Section .text.LL_RCC_IC2_GetDivider from blto2_FSBL_lto.o, size=22, align=4
LL_RCC_IC2_GetDivider:
0x3418F2AC: F248 00C8 MOVW R0, #0x80C8
0x3418F2B0: F2C5 6002 MOVT R0, #0x5602
0x3418F2B4: 6800 LDR R0, [R0]
0x3418F2B6: F400 017F AND R1, R0, #0xFF0000
0x3418F2BA: 2001 MOVS R0, #1
0x3418F2BC: EB00 4011 ADD.W R0, R0, R1, LSR #16
0x3418F2C0: 4770 BX LR
Section .init.DMA2D_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
DMA2D_IRQHandler:
0x3418F2C2: E7FE B DMA2D_IRQHandler ; 0x3418F2C2
Section .text.LL_RCC_IC5_Enable.57 from blto2_FSBL_lto.o, size=14, align=4
LL_RCC_IC5_Enable.57:
0x3418F2C4: F648 2140 MOVW R1, #0x8A40
0x3418F2C8: F2C5 6102 MOVT R1, #0x5602
0x3418F2CC: 2010 MOVS R0, #16
0x3418F2CE: 6008 STR R0, [R1]
0x3418F2D0: 4770 BX LR
Section .init.JPEG_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
JPEG_IRQHandler:
0x3418F2D2: E7FE B JPEG_IRQHandler ; 0x3418F2D2
Section .text.LL_RCC_IC3_Enable from blto2_FSBL_lto.o, size=14, align=4
LL_RCC_IC3_Enable:
0x3418F2D4: F648 2140 MOVW R1, #0x8A40
0x3418F2D8: F2C5 6102 MOVT R1, #0x5602
0x3418F2DC: 2004 MOVS R0, #4
0x3418F2DE: 6008 STR R0, [R1]
0x3418F2E0: 4770 BX LR
Section .init.VENC_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
VENC_IRQHandler:
0x3418F2E2: E7FE B VENC_IRQHandler ; 0x3418F2E2
Section .text.LL_RCC_IC4_Enable from blto2_FSBL_lto.o, size=14, align=4
LL_RCC_IC4_Enable:
0x3418F2E4: F648 2140 MOVW R1, #0x8A40
0x3418F2E8: F2C5 6102 MOVT R1, #0x5602
0x3418F2EC: 2008 MOVS R0, #8
0x3418F2EE: 6008 STR R0, [R1]
0x3418F2F0: 4770 BX LR
Section .init.GFXMMU_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
GFXMMU_IRQHandler:
0x3418F2F2: E7FE B GFXMMU_IRQHandler ; 0x3418F2F2
Section .text.LL_RCC_CLKP_Enable from blto2_FSBL_lto.o, size=14, align=4
LL_RCC_CLKP_Enable:
0x3418F2F4: F648 2148 MOVW R1, #0x8A48
0x3418F2F8: F2C5 6102 MOVT R1, #0x5602
0x3418F2FC: 2040 MOVS R0, #64
0x3418F2FE: 6008 STR R0, [R1]
0x3418F300: 4770 BX LR
Section .init.GFXTIM_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
GFXTIM_IRQHandler:
0x3418F302: E7FE B GFXTIM_IRQHandler ; 0x3418F302
Section .text.LL_RCC_IC7_Enable from blto2_FSBL_lto.o, size=14, align=4
LL_RCC_IC7_Enable:
0x3418F304: F648 2140 MOVW R1, #0x8A40
0x3418F308: F2C5 6102 MOVT R1, #0x5602
0x3418F30C: 2040 MOVS R0, #64
0x3418F30E: 6008 STR R0, [R1]
0x3418F310: 4770 BX LR
Section .init.GPU2D_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
GPU2D_IRQHandler:
0x3418F312: E7FE B GPU2D_IRQHandler ; 0x3418F312
Section .text.LL_RCC_IC8_Enable from blto2_FSBL_lto.o, size=14, align=4
LL_RCC_IC8_Enable:
0x3418F314: F648 2140 MOVW R1, #0x8A40
0x3418F318: F2C5 6102 MOVT R1, #0x5602
0x3418F31C: 2080 MOVS R0, #128
0x3418F31E: 6008 STR R0, [R1]
0x3418F320: 4770 BX LR
Section .init.GPU2D_ER_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
GPU2D_ER_IRQHandler:
0x3418F322: E7FE B GPU2D_ER_IRQHandler ; 0x3418F322
Section .text.LL_RCC_HSE_SelectHSEDiv2AsDiv2Clock from blto2_FSBL_lto.o, size=18, align=4
LL_RCC_HSE_SelectHSEDiv2AsDiv2Clock:
0x3418F324: F248 0154 MOVW R1, #0x8054
0x3418F328: F2C5 6102 MOVT R1, #0x5602
0x3418F32C: 6808 LDR R0, [R1]
0x3418F32E: F040 0040 ORR R0, R0, #64
0x3418F332: 6008 STR R0, [R1]
0x3418F334: 4770 BX LR
Section .init.ICACHE_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
ICACHE_IRQHandler:
0x3418F336: E7FE B ICACHE_IRQHandler ; 0x3418F336
Section .text.LL_RCC_HSE_SelectHSEAsDiv2Clock from blto2_FSBL_lto.o, size=18, align=4
LL_RCC_HSE_SelectHSEAsDiv2Clock:
0x3418F338: F248 0154 MOVW R1, #0x8054
0x3418F33C: F2C5 6102 MOVT R1, #0x5602
0x3418F340: 6808 LDR R0, [R1]
0x3418F342: F020 0040 BIC R0, R0, #64
0x3418F346: 6008 STR R0, [R1]
0x3418F348: 4770 BX LR
Section .init.HPDMA1_Channel0_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
HPDMA1_Channel0_IRQHandler:
0x3418F34A: E7FE B HPDMA1_Channel0_IRQHandler ; 0x3418F34A
Section .text.LL_RCC_SetTIMPrescaler from blto2_FSBL_lto.o, size=30, align=4
LL_RCC_SetTIMPrescaler:
0x3418F34C: B081 SUB SP, SP, #4
0x3418F34E: 9000 STR R0, [SP, #0]
0x3418F350: F248 0124 MOVW R1, #0x8024
0x3418F354: F2C5 6102 MOVT R1, #0x5602
0x3418F358: 6808 LDR R0, [R1]
0x3418F35A: F020 7040 BIC R0, R0, #0x03000000
0x3418F35E: 9A00 LDR R2, [SP, #0]
0x3418F360: EA40 6002 ORR.W R0, R0, R2, LSL #24
0x3418F364: 6008 STR R0, [R1]
0x3418F366: B001 ADD SP, SP, #4
0x3418F368: 4770 BX LR
Section .init.HPDMA1_Channel1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
HPDMA1_Channel1_IRQHandler:
0x3418F36A: E7FE B HPDMA1_Channel1_IRQHandler ; 0x3418F36A
Section .text.LL_RCC_GetADCClockSource from blto2_FSBL_lto.o, size=22, align=4
LL_RCC_GetADCClockSource:
0x3418F36C: B081 SUB SP, SP, #4
0x3418F36E: 9000 STR R0, [SP, #0]
0x3418F370: F248 1044 MOVW R0, #0x8144
0x3418F374: F2C5 6002 MOVT R0, #0x5602
0x3418F378: 6800 LDR R0, [R0]
0x3418F37A: F000 0070 AND R0, R0, #112
0x3418F37E: B001 ADD SP, SP, #4
0x3418F380: 4770 BX LR
Section .init.HPDMA1_Channel2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
HPDMA1_Channel2_IRQHandler:
0x3418F382: E7FE B HPDMA1_Channel2_IRQHandler ; 0x3418F382
Section .text.LL_RCC_GetADFClockSource from blto2_FSBL_lto.o, size=22, align=4
LL_RCC_GetADFClockSource:
0x3418F384: B081 SUB SP, SP, #4
0x3418F386: 9000 STR R0, [SP, #0]
0x3418F388: F248 1044 MOVW R0, #0x8144
0x3418F38C: F2C5 6002 MOVT R0, #0x5602
0x3418F390: 6800 LDR R0, [R0]
0x3418F392: F000 0007 AND R0, R0, #7
0x3418F396: B001 ADD SP, SP, #4
0x3418F398: 4770 BX LR
Section .init.HPDMA1_Channel3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
HPDMA1_Channel3_IRQHandler:
0x3418F39A: E7FE B HPDMA1_Channel3_IRQHandler ; 0x3418F39A
Section .text.LL_RCC_GetCLKPClockSource from blto2_FSBL_lto.o, size=22, align=4
LL_RCC_GetCLKPClockSource:
0x3418F39C: B081 SUB SP, SP, #4
0x3418F39E: 9000 STR R0, [SP, #0]
0x3418F3A0: F248 105C MOVW R0, #0x815C
0x3418F3A4: F2C5 6002 MOVT R0, #0x5602
0x3418F3A8: 6800 LDR R0, [R0]
0x3418F3AA: F000 0007 AND R0, R0, #7
0x3418F3AE: B001 ADD SP, SP, #4
0x3418F3B0: 4770 BX LR
Section .init.HPDMA1_Channel4_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
HPDMA1_Channel4_IRQHandler:
0x3418F3B2: E7FE B HPDMA1_Channel4_IRQHandler ; 0x3418F3B2
Section .text.LL_RCC_GetDCMIPPClockSource from blto2_FSBL_lto.o, size=22, align=4
LL_RCC_GetDCMIPPClockSource:
0x3418F3B4: B081 SUB SP, SP, #4
0x3418F3B6: 9000 STR R0, [SP, #0]
0x3418F3B8: F248 1044 MOVW R0, #0x8144
0x3418F3BC: F2C5 6002 MOVT R0, #0x5602
0x3418F3C0: 6800 LDR R0, [R0]
0x3418F3C2: F400 1040 AND R0, R0, #0x300000
0x3418F3C6: B001 ADD SP, SP, #4
0x3418F3C8: 4770 BX LR
Section .init.HPDMA1_Channel5_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
HPDMA1_Channel5_IRQHandler:
0x3418F3CA: E7FE B HPDMA1_Channel5_IRQHandler ; 0x3418F3CA
Section .text.LL_RCC_GetETHClockSource from blto2_FSBL_lto.o, size=22, align=4
LL_RCC_GetETHClockSource:
0x3418F3CC: B081 SUB SP, SP, #4
0x3418F3CE: 9000 STR R0, [SP, #0]
0x3418F3D0: F248 1048 MOVW R0, #0x8148
0x3418F3D4: F2C5 6002 MOVT R0, #0x5602
0x3418F3D8: 6800 LDR R0, [R0]
0x3418F3DA: F400 5040 AND R0, R0, #0x3000
0x3418F3DE: B001 ADD SP, SP, #4
0x3418F3E0: 4770 BX LR
Section .init.HPDMA1_Channel6_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
HPDMA1_Channel6_IRQHandler:
0x3418F3E2: E7FE B HPDMA1_Channel6_IRQHandler ; 0x3418F3E2
Section .text.LL_RCC_GetETHPTPClockSource from blto2_FSBL_lto.o, size=22, align=4
LL_RCC_GetETHPTPClockSource:
0x3418F3E4: B081 SUB SP, SP, #4
0x3418F3E6: 9000 STR R0, [SP, #0]
0x3418F3E8: F248 1048 MOVW R0, #0x8148
0x3418F3EC: F2C5 6002 MOVT R0, #0x5602
0x3418F3F0: 6800 LDR R0, [R0]
0x3418F3F2: F000 0003 AND R0, R0, #3
0x3418F3F6: B001 ADD SP, SP, #4
0x3418F3F8: 4770 BX LR
Section .init.HPDMA1_Channel7_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
HPDMA1_Channel7_IRQHandler:
0x3418F3FA: E7FE B HPDMA1_Channel7_IRQHandler ; 0x3418F3FA
Section .text.LL_RCC_GetFDCANClockSource from blto2_FSBL_lto.o, size=22, align=4
LL_RCC_GetFDCANClockSource:
0x3418F3FC: B081 SUB SP, SP, #4
0x3418F3FE: 9000 STR R0, [SP, #0]
0x3418F400: F248 104C MOVW R0, #0x814C
0x3418F404: F2C5 6002 MOVT R0, #0x5602
0x3418F408: 6800 LDR R0, [R0]
0x3418F40A: F000 0003 AND R0, R0, #3
0x3418F40E: B001 ADD SP, SP, #4
0x3418F410: 4770 BX LR
Section .init.HPDMA1_Channel8_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
HPDMA1_Channel8_IRQHandler:
0x3418F412: E7FE B HPDMA1_Channel8_IRQHandler ; 0x3418F412
Section .text.LL_RCC_GetFMCClockSource from blto2_FSBL_lto.o, size=22, align=4
LL_RCC_GetFMCClockSource:
0x3418F414: B081 SUB SP, SP, #4
0x3418F416: 9000 STR R0, [SP, #0]
0x3418F418: F248 104C MOVW R0, #0x814C
0x3418F41C: F2C5 6002 MOVT R0, #0x5602
0x3418F420: 6800 LDR R0, [R0]
0x3418F422: F000 0030 AND R0, R0, #48
0x3418F426: B001 ADD SP, SP, #4
0x3418F428: 4770 BX LR
Section .init.HPDMA1_Channel9_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
HPDMA1_Channel9_IRQHandler:
0x3418F42A: E7FE B HPDMA1_Channel9_IRQHandler ; 0x3418F42A
Section .text.LL_RCC_GetLPUARTClockSource from blto2_FSBL_lto.o, size=22, align=4
LL_RCC_GetLPUARTClockSource:
0x3418F42C: B081 SUB SP, SP, #4
0x3418F42E: 9000 STR R0, [SP, #0]
0x3418F430: F248 1078 MOVW R0, #0x8178
0x3418F434: F2C5 6002 MOVT R0, #0x5602
0x3418F438: 6800 LDR R0, [R0]
0x3418F43A: F400 60E0 AND R0, R0, #0x0700
0x3418F43E: B001 ADD SP, SP, #4
0x3418F440: 4770 BX LR
Section .init.HPDMA1_Channel10_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
HPDMA1_Channel10_IRQHandler:
0x3418F442: E7FE B HPDMA1_Channel10_IRQHandler ; 0x3418F442
Section .text.LL_RCC_GetLTDCClockSource from blto2_FSBL_lto.o, size=22, align=4
LL_RCC_GetLTDCClockSource:
0x3418F444: B081 SUB SP, SP, #4
0x3418F446: 9000 STR R0, [SP, #0]
0x3418F448: F248 1050 MOVW R0, #0x8150
0x3418F44C: F2C5 6002 MOVT R0, #0x5602
0x3418F450: 6800 LDR R0, [R0]
0x3418F452: F000 7040 AND R0, R0, #0x03000000
0x3418F456: B001 ADD SP, SP, #4
0x3418F458: 4770 BX LR
Section .init.HPDMA1_Channel11_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
HPDMA1_Channel11_IRQHandler:
0x3418F45A: E7FE B HPDMA1_Channel11_IRQHandler ; 0x3418F45A
Section .text.LL_RCC_GetMDFClockSource from blto2_FSBL_lto.o, size=22, align=4
LL_RCC_GetMDFClockSource:
0x3418F45C: B081 SUB SP, SP, #4
0x3418F45E: 9000 STR R0, [SP, #0]
0x3418F460: F248 1054 MOVW R0, #0x8154
0x3418F464: F2C5 6002 MOVT R0, #0x5602
0x3418F468: 6800 LDR R0, [R0]
0x3418F46A: F400 20E0 AND R0, R0, #0x070000
0x3418F46E: B001 ADD SP, SP, #4
0x3418F470: 4770 BX LR
Section .init.HPDMA1_Channel12_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
HPDMA1_Channel12_IRQHandler:
0x3418F472: E7FE B HPDMA1_Channel12_IRQHandler ; 0x3418F472
Section .text.LL_RCC_GetPSSIClockSource from blto2_FSBL_lto.o, size=22, align=4
LL_RCC_GetPSSIClockSource:
0x3418F474: B081 SUB SP, SP, #4
0x3418F476: 9000 STR R0, [SP, #0]
0x3418F478: F248 105C MOVW R0, #0x815C
0x3418F47C: F2C5 6002 MOVT R0, #0x5602
0x3418F480: 6800 LDR R0, [R0]
0x3418F482: F000 0030 AND R0, R0, #48
0x3418F486: B001 ADD SP, SP, #4
0x3418F488: 4770 BX LR
Section .init.HPDMA1_Channel13_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
HPDMA1_Channel13_IRQHandler:
0x3418F48A: E7FE B HPDMA1_Channel13_IRQHandler ; 0x3418F48A
Section .text.LL_RCC_GetSPDIFRXClockSource from blto2_FSBL_lto.o, size=22, align=4
LL_RCC_GetSPDIFRXClockSource:
0x3418F48C: B081 SUB SP, SP, #4
0x3418F48E: 9000 STR R0, [SP, #0]
0x3418F490: F248 1064 MOVW R0, #0x8164
0x3418F494: F2C5 6002 MOVT R0, #0x5602
0x3418F498: 6800 LDR R0, [R0]
0x3418F49A: F000 0007 AND R0, R0, #7
0x3418F49E: B001 ADD SP, SP, #4
0x3418F4A0: 4770 BX LR
Section .init.HPDMA1_Channel14_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
HPDMA1_Channel14_IRQHandler:
0x3418F4A2: E7FE B HPDMA1_Channel14_IRQHandler ; 0x3418F4A2
Section .text.HAL_RCCEx_GetPeriphCLKFreq from blto2_FSBL_lto.o, size=1626, align=4
HAL_RCCEx_GetPeriphCLKFreq:
0x3418F4A4: B580 PUSH 123R7, LR}
0x3418F4A6: B086 SUB SP, SP, #24
0x3418F4A8: 9105 STR R1, [SP, #20]
0x3418F4AA: 9004 STR R0, [SP, #16]
0x3418F4AC: 2000 MOVS R0, #0
0x3418F4AE: 9003 STR R0, [SP, #12]
0x3418F4B0: 9804 LDR R0, [SP, #16]
0x3418F4B2: 9001 STR R0, [SP, #4]
0x3418F4B4: 9905 LDR R1, [SP, #20]
0x3418F4B6: 9102 STR R1, [SP, #8]
0x3418F4B8: F080 0001 EOR R0, R0, #1
0x3418F4BC: 4308 ORRS R0, R1
0x3418F4BE: 2800 CMP R0, #0
0x3418F4C0: F000 81A1 BEQ.W 46L1 ; 0x3418F806
0x3418F4C4: 9902 LDR R1, [SP, #8]
0x3418F4C6: 9801 LDR R0, [SP, #4]
0x3418F4C8: F080 0002 EOR R0, R0, #2
0x3418F4CC: 4308 ORRS R0, R1
0x3418F4CE: 2800 CMP R0, #0
0x3418F4D0: F000 819E BEQ.W 46L2 ; 0x3418F810
0x3418F4D4: 9902 LDR R1, [SP, #8]
0x3418F4D6: 9801 LDR R0, [SP, #4]
0x3418F4D8: F080 0004 EOR R0, R0, #4
0x3418F4DC: 4308 ORRS R0, R1
0x3418F4DE: 2800 CMP R0, #0
0x3418F4E0: F000 819F BEQ.W 46L4 ; 0x3418F822
0x3418F4E4: 9902 LDR R1, [SP, #8]
0x3418F4E6: 9801 LDR R0, [SP, #4]
0x3418F4E8: F080 0008 EOR R0, R0, #8
0x3418F4EC: 4308 ORRS R0, R1
0x3418F4EE: 2800 CMP R0, #0
0x3418F4F0: F000 8193 BEQ.W 46L3 ; 0x3418F81A
0x3418F4F4: 9902 LDR R1, [SP, #8]
0x3418F4F6: 9801 LDR R0, [SP, #4]
0x3418F4F8: F080 0010 EOR R0, R0, #16
0x3418F4FC: 4308 ORRS R0, R1
0x3418F4FE: 2800 CMP R0, #0
0x3418F500: F000 8194 BEQ.W 46L5 ; 0x3418F82C
0x3418F504: 9902 LDR R1, [SP, #8]
0x3418F506: 9801 LDR R0, [SP, #4]
0x3418F508: F080 0020 EOR R0, R0, #32
0x3418F50C: 4308 ORRS R0, R1
0x3418F50E: 2800 CMP R0, #0
0x3418F510: F000 8192 BEQ.W 46L6 ; 0x3418F838
0x3418F514: 9902 LDR R1, [SP, #8]
0x3418F516: 9801 LDR R0, [SP, #4]
0x3418F518: F480 7000 EOR R0, R0, #0x0200
0x3418F51C: 4308 ORRS R0, R1
0x3418F51E: 2800 CMP R0, #0
0x3418F520: F000 8190 BEQ.W 46L7 ; 0x3418F844
0x3418F524: 9902 LDR R1, [SP, #8]
0x3418F526: 9801 LDR R0, [SP, #4]
0x3418F528: F480 6080 EOR R0, R0, #0x0400
0x3418F52C: 4308 ORRS R0, R1
0x3418F52E: 2800 CMP R0, #0
0x3418F530: F000 818D BEQ.W 46L8 ; 0x3418F84E
0x3418F534: 9902 LDR R1, [SP, #8]
0x3418F536: 9801 LDR R0, [SP, #4]
0x3418F538: F480 6000 EOR R0, R0, #0x0800
0x3418F53C: 4308 ORRS R0, R1
0x3418F53E: 2800 CMP R0, #0
0x3418F540: F000 818A BEQ.W 46L9 ; 0x3418F858
0x3418F544: 9902 LDR R1, [SP, #8]
0x3418F546: 9801 LDR R0, [SP, #4]
0x3418F548: F480 5080 EOR R0, R0, #0x1000
0x3418F54C: 4308 ORRS R0, R1
0x3418F54E: 2800 CMP R0, #0
0x3418F550: F000 8187 BEQ.W 46L10 ; 0x3418F862
0x3418F554: 9902 LDR R1, [SP, #8]
0x3418F556: 9801 LDR R0, [SP, #4]
0x3418F558: F480 5000 EOR R0, R0, #0x2000
0x3418F55C: 4308 ORRS R0, R1
0x3418F55E: 2800 CMP R0, #0
0x3418F560: F000 8186 BEQ.W 46L11 ; 0x3418F870
0x3418F564: 9902 LDR R1, [SP, #8]
0x3418F566: 9801 LDR R0, [SP, #4]
0x3418F568: F480 4080 EOR R0, R0, #0x4000
0x3418F56C: 4308 ORRS R0, R1
0x3418F56E: 2800 CMP R0, #0
0x3418F570: F000 8186 BEQ.W 46L12 ; 0x3418F880
0x3418F574: 9902 LDR R1, [SP, #8]
0x3418F576: 9801 LDR R0, [SP, #4]
0x3418F578: F480 4000 EOR R0, R0, #0x8000
0x3418F57C: 4308 ORRS R0, R1
0x3418F57E: 2800 CMP R0, #0
0x3418F580: F000 8186 BEQ.W 46L13 ; 0x3418F890
0x3418F584: 9902 LDR R1, [SP, #8]
0x3418F586: 9801 LDR R0, [SP, #4]
0x3418F588: F480 3080 EOR R0, R0, #0x010000
0x3418F58C: 4308 ORRS R0, R1
0x3418F58E: 2800 CMP R0, #0
0x3418F590: F000 8186 BEQ.W 46L14 ; 0x3418F8A0
0x3418F594: 9902 LDR R1, [SP, #8]
0x3418F596: 9801 LDR R0, [SP, #4]
0x3418F598: F480 3000 EOR R0, R0, #0x020000
0x3418F59C: 4308 ORRS R0, R1
0x3418F59E: 2800 CMP R0, #0
0x3418F5A0: F000 8186 BEQ.W 46L15 ; 0x3418F8B0
0x3418F5A4: 9902 LDR R1, [SP, #8]
0x3418F5A6: 9801 LDR R0, [SP, #4]
0x3418F5A8: F480 2080 EOR R0, R0, #0x040000
0x3418F5AC: 4308 ORRS R0, R1
0x3418F5AE: 2800 CMP R0, #0
0x3418F5B0: F000 8186 BEQ.W 46L16 ; 0x3418F8C0
0x3418F5B4: 9902 LDR R1, [SP, #8]
0x3418F5B6: 9801 LDR R0, [SP, #4]
0x3418F5B8: F480 2000 EOR R0, R0, #0x080000
0x3418F5BC: 4308 ORRS R0, R1
0x3418F5BE: 2800 CMP R0, #0
0x3418F5C0: F000 8186 BEQ.W 46L17 ; 0x3418F8D0
0x3418F5C4: 9902 LDR R1, [SP, #8]
0x3418F5C6: 9801 LDR R0, [SP, #4]
0x3418F5C8: F480 1080 EOR R0, R0, #0x100000
0x3418F5CC: 4308 ORRS R0, R1
0x3418F5CE: 2800 CMP R0, #0
0x3418F5D0: F000 8186 BEQ.W 46L18 ; 0x3418F8E0
0x3418F5D4: 9902 LDR R1, [SP, #8]
0x3418F5D6: 9801 LDR R0, [SP, #4]
0x3418F5D8: F480 1000 EOR R0, R0, #0x200000
0x3418F5DC: 4308 ORRS R0, R1
0x3418F5DE: 2800 CMP R0, #0
0x3418F5E0: F000 8186 BEQ.W 46L19 ; 0x3418F8F0
0x3418F5E4: 9902 LDR R1, [SP, #8]
0x3418F5E6: 9801 LDR R0, [SP, #4]
0x3418F5E8: F480 0080 EOR R0, R0, #0x400000
0x3418F5EC: 4308 ORRS R0, R1
0x3418F5EE: 2800 CMP R0, #0
0x3418F5F0: F000 8186 BEQ.W 46L20 ; 0x3418F900
0x3418F5F4: 9902 LDR R1, [SP, #8]
0x3418F5F6: 9801 LDR R0, [SP, #4]
0x3418F5F8: F480 0000 EOR R0, R0, #0x800000
0x3418F5FC: 4308 ORRS R0, R1
0x3418F5FE: 2800 CMP R0, #0
0x3418F600: F000 8186 BEQ.W 46L21 ; 0x3418F910
0x3418F604: 9902 LDR R1, [SP, #8]
0x3418F606: 9801 LDR R0, [SP, #4]
0x3418F608: F080 7080 EOR R0, R0, #0x01000000
0x3418F60C: 4308 ORRS R0, R1
0x3418F60E: 2800 CMP R0, #0
0x3418F610: F000 8184 BEQ.W 46L22 ; 0x3418F91C
0x3418F614: 9902 LDR R1, [SP, #8]
0x3418F616: 9801 LDR R0, [SP, #4]
0x3418F618: F080 7000 EOR R0, R0, #0x02000000
0x3418F61C: 4308 ORRS R0, R1
0x3418F61E: 2800 CMP R0, #0
0x3418F620: F000 8182 BEQ.W 46L23 ; 0x3418F928
0x3418F624: 9902 LDR R1, [SP, #8]
0x3418F626: 9801 LDR R0, [SP, #4]
0x3418F628: F080 6080 EOR R0, R0, #0x04000000
0x3418F62C: 4308 ORRS R0, R1
0x3418F62E: 2800 CMP R0, #0
0x3418F630: F000 8180 BEQ.W 46L24 ; 0x3418F934
0x3418F634: 9902 LDR R1, [SP, #8]
0x3418F636: 9801 LDR R0, [SP, #4]
0x3418F638: F080 6000 EOR R0, R0, #0x08000000
0x3418F63C: 4308 ORRS R0, R1
0x3418F63E: 2800 CMP R0, #0
0x3418F640: F000 817D BEQ.W 46L25 ; 0x3418F93E
0x3418F644: 9902 LDR R1, [SP, #8]
0x3418F646: 9801 LDR R0, [SP, #4]
0x3418F648: F080 5080 EOR R0, R0, #0x10000000
0x3418F64C: 4308 ORRS R0, R1
0x3418F64E: 2800 CMP R0, #0
0x3418F650: F000 8179 BEQ.W 46L26 ; 0x3418F946
0x3418F654: 9902 LDR R1, [SP, #8]
0x3418F656: 9801 LDR R0, [SP, #4]
0x3418F658: F080 5000 EOR R0, R0, #0x20000000
0x3418F65C: 4308 ORRS R0, R1
0x3418F65E: 2800 CMP R0, #0
0x3418F660: F000 8179 BEQ.W 46L27 ; 0x3418F956
0x3418F664: 9902 LDR R1, [SP, #8]
0x3418F666: 9801 LDR R0, [SP, #4]
0x3418F668: F080 4080 EOR R0, R0, #0x40000000
0x3418F66C: 4308 ORRS R0, R1
0x3418F66E: 2800 CMP R0, #0
0x3418F670: F000 8179 BEQ.W 46L28 ; 0x3418F966
0x3418F674: 9902 LDR R1, [SP, #8]
0x3418F676: 9801 LDR R0, [SP, #4]
0x3418F678: F080 4000 EOR R0, R0, #0x80000000
0x3418F67C: 4308 ORRS R0, R1
0x3418F67E: 2800 CMP R0, #0
0x3418F680: F000 8178 BEQ.W 46L29 ; 0x3418F974
0x3418F684: 9801 LDR R0, [SP, #4]
0x3418F686: 9902 LDR R1, [SP, #8]
0x3418F688: F081 0101 EOR R1, R1, #1
0x3418F68C: 4308 ORRS R0, R1
0x3418F68E: 2800 CMP R0, #0
0x3418F690: F000 8178 BEQ.W 46L30 ; 0x3418F984
0x3418F694: 9801 LDR R0, [SP, #4]
0x3418F696: 9902 LDR R1, [SP, #8]
0x3418F698: F081 0102 EOR R1, R1, #2
0x3418F69C: 4308 ORRS R0, R1
0x3418F69E: 2800 CMP R0, #0
0x3418F6A0: F000 8175 BEQ.W 46L31 ; 0x3418F98E
0x3418F6A4: 9801 LDR R0, [SP, #4]
0x3418F6A6: 9902 LDR R1, [SP, #8]
0x3418F6A8: F081 0104 EOR R1, R1, #4
0x3418F6AC: 4308 ORRS R0, R1
0x3418F6AE: 2800 CMP R0, #0
0x3418F6B0: F000 8175 BEQ.W 46L32 ; 0x3418F99E
0x3418F6B4: 9801 LDR R0, [SP, #4]
0x3418F6B6: 9902 LDR R1, [SP, #8]
0x3418F6B8: F081 0108 EOR R1, R1, #8
0x3418F6BC: 4308 ORRS R0, R1
0x3418F6BE: 2800 CMP R0, #0
0x3418F6C0: F000 8175 BEQ.W 46L33 ; 0x3418F9AE
0x3418F6C4: 9801 LDR R0, [SP, #4]
0x3418F6C6: 9902 LDR R1, [SP, #8]
0x3418F6C8: F081 0110 EOR R1, R1, #16
0x3418F6CC: 4308 ORRS R0, R1
0x3418F6CE: 2800 CMP R0, #0
0x3418F6D0: F000 8175 BEQ.W 46L34 ; 0x3418F9BE
0x3418F6D4: 9801 LDR R0, [SP, #4]
0x3418F6D6: 9902 LDR R1, [SP, #8]
0x3418F6D8: F081 0120 EOR R1, R1, #32
0x3418F6DC: 4308 ORRS R0, R1
0x3418F6DE: 2800 CMP R0, #0
0x3418F6E0: F000 8175 BEQ.W 46L35 ; 0x3418F9CE
0x3418F6E4: 9801 LDR R0, [SP, #4]
0x3418F6E6: 9902 LDR R1, [SP, #8]
0x3418F6E8: F081 0140 EOR R1, R1, #64
0x3418F6EC: 4308 ORRS R0, R1
0x3418F6EE: 2800 CMP R0, #0
0x3418F6F0: F000 8175 BEQ.W 46L36 ; 0x3418F9DE
0x3418F6F4: 9801 LDR R0, [SP, #4]
0x3418F6F6: 9902 LDR R1, [SP, #8]
0x3418F6F8: F481 7180 EOR R1, R1, #0x0100
0x3418F6FC: 4308 ORRS R0, R1
0x3418F6FE: 2800 CMP R0, #0
0x3418F700: F000 8175 BEQ.W 46L37 ; 0x3418F9EE
0x3418F704: 9801 LDR R0, [SP, #4]
0x3418F706: 9902 LDR R1, [SP, #8]
0x3418F708: F481 7100 EOR R1, R1, #0x0200
0x3418F70C: 4308 ORRS R0, R1
0x3418F70E: 2800 CMP R0, #0
0x3418F710: F000 8174 BEQ.W 46L38 ; 0x3418F9FC
0x3418F714: 9801 LDR R0, [SP, #4]
0x3418F716: 9902 LDR R1, [SP, #8]
0x3418F718: F481 6180 EOR R1, R1, #0x0400
0x3418F71C: 4308 ORRS R0, R1
0x3418F71E: 2800 CMP R0, #0
0x3418F720: F000 8174 BEQ.W 46L39 ; 0x3418FA0C
0x3418F724: 9801 LDR R0, [SP, #4]
0x3418F726: 9902 LDR R1, [SP, #8]
0x3418F728: F481 6100 EOR R1, R1, #0x0800
0x3418F72C: 4308 ORRS R0, R1
0x3418F72E: 2800 CMP R0, #0
0x3418F730: F000 8174 BEQ.W 46L40 ; 0x3418FA1C
0x3418F734: 9801 LDR R0, [SP, #4]
0x3418F736: 9902 LDR R1, [SP, #8]
0x3418F738: F481 5180 EOR R1, R1, #0x1000
0x3418F73C: 4308 ORRS R0, R1
0x3418F73E: 2800 CMP R0, #0
0x3418F740: F000 8174 BEQ.W 46L41 ; 0x3418FA2C
0x3418F744: 9801 LDR R0, [SP, #4]
0x3418F746: 9902 LDR R1, [SP, #8]
0x3418F748: F481 5100 EOR R1, R1, #0x2000
0x3418F74C: 4308 ORRS R0, R1
0x3418F74E: 2800 CMP R0, #0
0x3418F750: F000 8174 BEQ.W 46L42 ; 0x3418FA3C
0x3418F754: 9801 LDR R0, [SP, #4]
0x3418F756: 9902 LDR R1, [SP, #8]
0x3418F758: F481 4180 EOR R1, R1, #0x4000
0x3418F75C: 4308 ORRS R0, R1
0x3418F75E: 2800 CMP R0, #0
0x3418F760: F000 8174 BEQ.W 46L43 ; 0x3418FA4C
0x3418F764: 9801 LDR R0, [SP, #4]
0x3418F766: 9902 LDR R1, [SP, #8]
0x3418F768: F481 4100 EOR R1, R1, #0x8000
0x3418F76C: 4308 ORRS R0, R1
0x3418F76E: 2800 CMP R0, #0
0x3418F770: F000 8174 BEQ.W 46L44 ; 0x3418FA5C
0x3418F774: 9801 LDR R0, [SP, #4]
0x3418F776: 9902 LDR R1, [SP, #8]
0x3418F778: F481 3180 EOR R1, R1, #0x010000
0x3418F77C: 4308 ORRS R0, R1
0x3418F77E: 2800 CMP R0, #0
0x3418F780: F000 8174 BEQ.W 46L45 ; 0x3418FA6C
0x3418F784: 9801 LDR R0, [SP, #4]
0x3418F786: 9902 LDR R1, [SP, #8]
0x3418F788: F481 3100 EOR R1, R1, #0x020000
0x3418F78C: 4308 ORRS R0, R1
0x3418F78E: 2800 CMP R0, #0
0x3418F790: F000 8173 BEQ.W 46L46 ; 0x3418FA7A
0x3418F794: 9801 LDR R0, [SP, #4]
0x3418F796: 9902 LDR R1, [SP, #8]
0x3418F798: F481 2180 EOR R1, R1, #0x040000
0x3418F79C: 4308 ORRS R0, R1
0x3418F79E: 2800 CMP R0, #0
0x3418F7A0: F000 8173 BEQ.W 46L47 ; 0x3418FA8A
0x3418F7A4: 9801 LDR R0, [SP, #4]
0x3418F7A6: 9902 LDR R1, [SP, #8]
0x3418F7A8: F481 2100 EOR R1, R1, #0x080000
0x3418F7AC: 4308 ORRS R0, R1
0x3418F7AE: 2800 CMP R0, #0
0x3418F7B0: F000 8173 BEQ.W 46L48 ; 0x3418FA9A
0x3418F7B4: 9801 LDR R0, [SP, #4]
0x3418F7B6: 9902 LDR R1, [SP, #8]
0x3418F7B8: F481 1180 EOR R1, R1, #0x100000
0x3418F7BC: 4308 ORRS R0, R1
0x3418F7BE: 2800 CMP R0, #0
0x3418F7C0: F000 8173 BEQ.W 46L49 ; 0x3418FAAA
0x3418F7C4: 9801 LDR R0, [SP, #4]
0x3418F7C6: 9902 LDR R1, [SP, #8]
0x3418F7C8: F481 1100 EOR R1, R1, #0x200000
0x3418F7CC: 4308 ORRS R0, R1
0x3418F7CE: 2800 CMP R0, #0
0x3418F7D0: F000 8173 BEQ.W 46L50 ; 0x3418FABA
0x3418F7D4: 9801 LDR R0, [SP, #4]
0x3418F7D6: 9902 LDR R1, [SP, #8]
0x3418F7D8: F481 0180 EOR R1, R1, #0x400000
0x3418F7DC: 4308 ORRS R0, R1
0x3418F7DE: 2800 CMP R0, #0
0x3418F7E0: F000 8173 BEQ.W 46L51 ; 0x3418FACA
0x3418F7E4: 9801 LDR R0, [SP, #4]
0x3418F7E6: 9902 LDR R1, [SP, #8]
0x3418F7E8: F481 0100 EOR R1, R1, #0x800000
0x3418F7EC: 4308 ORRS R0, R1
0x3418F7EE: 2800 CMP R0, #0
0x3418F7F0: F000 8172 BEQ.W 46L52 ; 0x3418FAD8
0x3418F7F4: 9801 LDR R0, [SP, #4]
0x3418F7F6: 9902 LDR R1, [SP, #8]
0x3418F7F8: F081 7180 EOR R1, R1, #0x01000000
0x3418F7FC: 4308 ORRS R0, R1
0x3418F7FE: 2800 CMP R0, #0
0x3418F800: F000 8172 BEQ.W 46L53 ; 0x3418FAE8
0x3418F804: E178 B 46L54 ; 0x3418FAF8
.L1:
0x3418F806: 2070 MOVS R0, #112
0x3418F808: F000 F97A BL RCCEx_GetADCCLKFreq ; 0x3418FB00
0x3418F80C: 9003 STR R0, [SP, #12]
0x3418F80E: E173 B 46L54 ; 0x3418FAF8
.L2:
0x3418F810: 2007 MOVS R0, #7
0x3418F812: F7F8 FAE1 BL RCCEx_GetADFCLKFreq ; 0x34187DD8
0x3418F816: 9003 STR R0, [SP, #12]
0x3418F818: E16E B 46L54 ; 0x3418FAF8
.L3:
0x3418F81A: F000 FA4D BL RCCEx_GetCSICLKFreq ; 0x3418FCB8
0x3418F81E: 9003 STR R0, [SP, #12]
0x3418F820: E16A B 46L54 ; 0x3418FAF8
.L4:
0x3418F822: 2007 MOVS R0, #7
0x3418F824: F7F8 FB9A BL RCCEx_GetCLKPCLKFreq ; 0x34187F5C
0x3418F828: 9003 STR R0, [SP, #12]
0x3418F82A: E165 B 46L54 ; 0x3418FAF8
.L5:
0x3418F82C: F44F 1040 MOV.W R0, #0x300000
0x3418F830: F7F8 FD04 BL RCCEx_GetDCMIPPCLKFreq ; 0x3418823C
0x3418F834: 9003 STR R0, [SP, #12]
0x3418F836: E15F B 46L54 ; 0x3418FAF8
.L6:
0x3418F838: F44F 5040 MOV.W R0, #0x3000
0x3418F83C: F7F8 FD70 BL RCCEx_GetETH1CLKFreq ; 0x34188320
0x3418F840: 9003 STR R0, [SP, #12]
0x3418F842: E159 B 46L54 ; 0x3418FAF8
.L7:
0x3418F844: 2003 MOVS R0, #3
0x3418F846: F000 FA7B BL RCCEx_GetETH1PTPCLKFreq ; 0x3418FD40
0x3418F84A: 9003 STR R0, [SP, #12]
0x3418F84C: E154 B 46L54 ; 0x3418FAF8
.L8:
0x3418F84E: 2003 MOVS R0, #3
0x3418F850: F000 FAE6 BL RCCEx_GetFDCANCLKFreq ; 0x3418FE20
0x3418F854: 9003 STR R0, [SP, #12]
0x3418F856: E14F B 46L54 ; 0x3418FAF8
.L9:
0x3418F858: 2030 MOVS R0, #48
0x3418F85A: F000 FB49 BL RCCEx_GetFMCCLKFreq ; 0x3418FEF0
0x3418F85E: 9003 STR R0, [SP, #12]
0x3418F860: E14A B 46L54 ; 0x3418FAF8
.L10:
0x3418F862: 200C MOVS R0, #12
0x3418F864: F2C0 7000 MOVT R0, #0x0700
0x3418F868: F000 FBE0 BL RCCEx_GetI2CCLKFreq ; 0x3419002C
0x3418F86C: 9003 STR R0, [SP, #12]
0x3418F86E: E143 B 46L54 ; 0x3418FAF8
.L11:
0x3418F870: F240 400C MOVW R0, #0x040C
0x3418F874: F2C0 7000 MOVT R0, #0x0700
0x3418F878: F000 FBD8 BL RCCEx_GetI2CCLKFreq ; 0x3419002C
0x3418F87C: 9003 STR R0, [SP, #12]
0x3418F87E: E13B B 46L54 ; 0x3418FAF8
.L12:
0x3418F880: F640 000C MOVW R0, #0x080C
0x3418F884: F2C0 7000 MOVT R0, #0x0700
0x3418F888: F000 FBD0 BL RCCEx_GetI2CCLKFreq ; 0x3419002C
0x3418F88C: 9003 STR R0, [SP, #12]
0x3418F88E: E133 B 46L54 ; 0x3418FAF8
.L13:
0x3418F890: F640 400C MOVW R0, #0x0C0C
0x3418F894: F2C0 7000 MOVT R0, #0x0700
0x3418F898: F000 FBC8 BL RCCEx_GetI2CCLKFreq ; 0x3419002C
0x3418F89C: 9003 STR R0, [SP, #12]
0x3418F89E: E12B B 46L54 ; 0x3418FAF8
.L14:
0x3418F8A0: F241 000C MOVW R0, #0x100C
0x3418F8A4: F2C0 7000 MOVT R0, #0x0700
0x3418F8A8: F7F8 FDA6 BL RCCEx_GetI3CCLKFreq ; 0x341883F8
0x3418F8AC: 9003 STR R0, [SP, #12]
0x3418F8AE: E123 B 46L54 ; 0x3418FAF8
.L15:
0x3418F8B0: F241 400C MOVW R0, #0x140C
0x3418F8B4: F2C0 7000 MOVT R0, #0x0700
0x3418F8B8: F7F8 FD9E BL RCCEx_GetI3CCLKFreq ; 0x341883F8
0x3418F8BC: 9003 STR R0, [SP, #12]
0x3418F8BE: E11B B 46L54 ; 0x3418FAF8
.L16:
0x3418F8C0: F640 002C MOVW R0, #0x082C
0x3418F8C4: F2C0 7000 MOVT R0, #0x0700
0x3418F8C8: F000 FD12 BL RCCEx_GetLPTIMCLKFreq ; 0x341902F0
0x3418F8CC: 9003 STR R0, [SP, #12]
0x3418F8CE: E113 B 46L54 ; 0x3418FAF8
.L17:
0x3418F8D0: F640 402C MOVW R0, #0x0C2C
0x3418F8D4: F2C0 7000 MOVT R0, #0x0700
0x3418F8D8: F000 FD0A BL RCCEx_GetLPTIMCLKFreq ; 0x341902F0
0x3418F8DC: 9003 STR R0, [SP, #12]
0x3418F8DE: E10B B 46L54 ; 0x3418FAF8
.L18:
0x3418F8E0: F241 002C MOVW R0, #0x102C
0x3418F8E4: F2C0 7000 MOVT R0, #0x0700
0x3418F8E8: F000 FD02 BL RCCEx_GetLPTIMCLKFreq ; 0x341902F0
0x3418F8EC: 9003 STR R0, [SP, #12]
0x3418F8EE: E103 B 46L54 ; 0x3418FAF8
.L19:
0x3418F8F0: F241 402C MOVW R0, #0x142C
0x3418F8F4: F2C0 7000 MOVT R0, #0x0700
0x3418F8F8: F000 FCFA BL RCCEx_GetLPTIMCLKFreq ; 0x341902F0
0x3418F8FC: 9003 STR R0, [SP, #12]
0x3418F8FE: E0FB B 46L54 ; 0x3418FAF8
.L20:
0x3418F900: F641 002C MOVW R0, #0x182C
0x3418F904: F2C0 7000 MOVT R0, #0x0700
0x3418F908: F000 FCF2 BL RCCEx_GetLPTIMCLKFreq ; 0x341902F0
0x3418F90C: 9003 STR R0, [SP, #12]
0x3418F90E: E0F3 B 46L54 ; 0x3418FAF8
.L21:
0x3418F910: F44F 60E0 MOV.W R0, #0x0700
0x3418F914: F7F8 FE72 BL RCCEx_GetLPUARTCLKFreq ; 0x341885FC
0x3418F918: 9003 STR R0, [SP, #12]
0x3418F91A: E0ED B 46L54 ; 0x3418FAF8
.L22:
0x3418F91C: F04F 7040 MOV.W R0, #0x03000000
0x3418F920: F7F8 FF3A BL RCCEx_GetLTDCCLKFreq ; 0x34188798
0x3418F924: 9003 STR R0, [SP, #12]
0x3418F926: E0E7 B 46L54 ; 0x3418FAF8
.L23:
0x3418F928: F44F 20E0 MOV.W R0, #0x070000
0x3418F92C: F7F8 FFA6 BL RCCEx_GetMDFCLKFreq ; 0x3418887C
0x3418F930: 9003 STR R0, [SP, #12]
0x3418F932: E0E1 B 46L54 ; 0x3418FAF8
.L24:
0x3418F934: 2030 MOVS R0, #48
0x3418F936: F000 FE3D BL RCCEx_GetPSSICLKFreq ; 0x341905B4
0x3418F93A: 9003 STR R0, [SP, #12]
0x3418F93C: E0DC B 46L54 ; 0x3418FAF8
.L25:
0x3418F93E: F000 FEA7 BL RCCEx_GetRTCCLKFreq ; 0x34190690
0x3418F942: 9003 STR R0, [SP, #12]
0x3418F944: E0D8 B 46L54 ; 0x3418FAF8
.L26:
0x3418F946: F241 4018 MOVW R0, #0x1418
0x3418F94A: F2C0 7000 MOVT R0, #0x0700
0x3418F94E: F000 FEDF BL RCCEx_GetSAICLKFreq ; 0x34190710
0x3418F952: 9003 STR R0, [SP, #12]
0x3418F954: E0D0 B 46L54 ; 0x3418FAF8
.L27:
0x3418F956: F641 0018 MOVW R0, #0x1818
0x3418F95A: F2C0 7000 MOVT R0, #0x0700
0x3418F95E: F000 FED7 BL RCCEx_GetSAICLKFreq ; 0x34190710
0x3418F962: 9003 STR R0, [SP, #12]
0x3418F964: E0C8 B 46L54 ; 0x3418FAF8
.L28:
0x3418F966: 201C MOVS R0, #28
0x3418F968: F2C0 3000 MOVT R0, #0x0300
0x3418F96C: F7F9 F860 BL RCCEx_GetSDMMCCLKFreq ; 0x34188A30
0x3418F970: 9003 STR R0, [SP, #12]
0x3418F972: E0C1 B 46L54 ; 0x3418FAF8
.L29:
0x3418F974: F240 401C MOVW R0, #0x041C
0x3418F978: F2C0 3000 MOVT R0, #0x0300
0x3418F97C: F7F9 F858 BL RCCEx_GetSDMMCCLKFreq ; 0x34188A30
0x3418F980: 9003 STR R0, [SP, #12]
0x3418F982: E0B9 B 46L54 ; 0x3418FAF8
.L30:
0x3418F984: 2007 MOVS R0, #7
0x3418F986: F7F9 F919 BL RCCEx_GetSPDIFRXCLKFreq ; 0x34188BBC
0x3418F98A: 9003 STR R0, [SP, #12]
0x3418F98C: E0B4 B 46L54 ; 0x3418FAF8
.L31:
0x3418F98E: F240 4020 MOVW R0, #0x0420
0x3418F992: F2C0 7000 MOVT R0, #0x0700
0x3418F996: F7F9 F9CB BL RCCEx_GetSPICLKFreq ; 0x34188D30
0x3418F99A: 9003 STR R0, [SP, #12]
0x3418F99C: E0AC B 46L54 ; 0x3418FAF8
.L32:
0x3418F99E: F640 0020 MOVW R0, #0x0820
0x3418F9A2: F2C0 7000 MOVT R0, #0x0700
0x3418F9A6: F7F9 F9C3 BL RCCEx_GetSPICLKFreq ; 0x34188D30
0x3418F9AA: 9003 STR R0, [SP, #12]
0x3418F9AC: E0A4 B 46L54 ; 0x3418FAF8
.L33:
0x3418F9AE: F640 4020 MOVW R0, #0x0C20
0x3418F9B2: F2C0 7000 MOVT R0, #0x0700
0x3418F9B6: F7F9 F9BB BL RCCEx_GetSPICLKFreq ; 0x34188D30
0x3418F9BA: 9003 STR R0, [SP, #12]
0x3418F9BC: E09C B 46L54 ; 0x3418FAF8
.L34:
0x3418F9BE: F241 0020 MOVW R0, #0x1020
0x3418F9C2: F2C0 7000 MOVT R0, #0x0700
0x3418F9C6: F7F9 F9B3 BL RCCEx_GetSPICLKFreq ; 0x34188D30
0x3418F9CA: 9003 STR R0, [SP, #12]
0x3418F9CC: E094 B 46L54 ; 0x3418FAF8
.L35:
0x3418F9CE: F241 4020 MOVW R0, #0x1420
0x3418F9D2: F2C0 7000 MOVT R0, #0x0700
0x3418F9D6: F7F9 F9AB BL RCCEx_GetSPICLKFreq ; 0x34188D30
0x3418F9DA: 9003 STR R0, [SP, #12]
0x3418F9DC: E08C B 46L54 ; 0x3418FAF8
.L36:
0x3418F9DE: F641 0020 MOVW R0, #0x1820
0x3418F9E2: F2C0 7000 MOVT R0, #0x0700
0x3418F9E6: F7F9 F9A3 BL RCCEx_GetSPICLKFreq ; 0x34188D30
0x3418F9EA: 9003 STR R0, [SP, #12]
0x3418F9EC: E084 B 46L54 ; 0x3418FAF8
.L37:
0x3418F9EE: 2030 MOVS R0, #48
0x3418F9F0: F2C0 7000 MOVT R0, #0x0700
0x3418F9F4: F7F9 FBF2 BL RCCEx_GetUSARTCLKFreq ; 0x341891DC
0x3418F9F8: 9003 STR R0, [SP, #12]
0x3418F9FA: E07D B 46L54 ; 0x3418FAF8
.L38:
0x3418F9FC: F240 4030 MOVW R0, #0x0430
0x3418FA00: F2C0 7000 MOVT R0, #0x0700
0x3418FA04: F7F9 FBEA BL RCCEx_GetUSARTCLKFreq ; 0x341891DC
0x3418FA08: 9003 STR R0, [SP, #12]
0x3418FA0A: E075 B 46L54 ; 0x3418FAF8
.L39:
0x3418FA0C: F640 0030 MOVW R0, #0x0830
0x3418FA10: F2C0 7000 MOVT R0, #0x0700
0x3418FA14: F7F9 FBE2 BL RCCEx_GetUSARTCLKFreq ; 0x341891DC
0x3418FA18: 9003 STR R0, [SP, #12]
0x3418FA1A: E06D B 46L54 ; 0x3418FAF8
.L40:
0x3418FA1C: F640 4030 MOVW R0, #0x0C30
0x3418FA20: F2C0 7000 MOVT R0, #0x0700
0x3418FA24: F7F9 FDA4 BL RCCEx_GetUARTCLKFreq ; 0x34189570
0x3418FA28: 9003 STR R0, [SP, #12]
0x3418FA2A: E065 B 46L54 ; 0x3418FAF8
.L41:
0x3418FA2C: F241 0030 MOVW R0, #0x1030
0x3418FA30: F2C0 7000 MOVT R0, #0x0700
0x3418FA34: F7F9 FD9C BL RCCEx_GetUARTCLKFreq ; 0x34189570
0x3418FA38: 9003 STR R0, [SP, #12]
0x3418FA3A: E05D B 46L54 ; 0x3418FAF8
.L42:
0x3418FA3C: F241 4030 MOVW R0, #0x1430
0x3418FA40: F2C0 7000 MOVT R0, #0x0700
0x3418FA44: F7F9 FBCA BL RCCEx_GetUSARTCLKFreq ; 0x341891DC
0x3418FA48: 9003 STR R0, [SP, #12]
0x3418FA4A: E055 B 46L54 ; 0x3418FAF8
.L43:
0x3418FA4C: F641 0030 MOVW R0, #0x1830
0x3418FA50: F2C0 7000 MOVT R0, #0x0700
0x3418FA54: F7F9 FD8C BL RCCEx_GetUARTCLKFreq ; 0x34189570
0x3418FA58: 9003 STR R0, [SP, #12]
0x3418FA5A: E04D B 46L54 ; 0x3418FAF8
.L44:
0x3418FA5C: F641 4030 MOVW R0, #0x1C30
0x3418FA60: F2C0 7000 MOVT R0, #0x0700
0x3418FA64: F7F9 FD84 BL RCCEx_GetUARTCLKFreq ; 0x34189570
0x3418FA68: 9003 STR R0, [SP, #12]
0x3418FA6A: E045 B 46L54 ; 0x3418FAF8
.L45:
0x3418FA6C: 2034 MOVS R0, #52
0x3418FA6E: F2C0 7000 MOVT R0, #0x0700
0x3418FA72: F7F9 FD7D BL RCCEx_GetUARTCLKFreq ; 0x34189570
0x3418FA76: 9003 STR R0, [SP, #12]
0x3418FA78: E03E B 46L54 ; 0x3418FAF8
.L46:
0x3418FA7A: F240 4034 MOVW R0, #0x0434
0x3418FA7E: F2C0 7000 MOVT R0, #0x0700
0x3418FA82: F7F9 FBAB BL RCCEx_GetUSARTCLKFreq ; 0x341891DC
0x3418FA86: 9003 STR R0, [SP, #12]
0x3418FA88: E036 B 46L54 ; 0x3418FAF8
.L47:
0x3418FA8A: F640 4014 MOVW R0, #0x0C14
0x3418FA8E: F2C0 3000 MOVT R0, #0x0300
0x3418FA92: F7F9 FF37 BL RCCEx_GetOTGPHYCLKFreq ; 0x34189904
0x3418FA96: 9003 STR R0, [SP, #12]
0x3418FA98: E02E B 46L54 ; 0x3418FAF8
.L48:
0x3418FA9A: F241 0014 MOVW R0, #0x1014
0x3418FA9E: F2C0 1000 MOVT R0, #0x0100
0x3418FAA2: F7F9 FFD1 BL RCCEx_GetOTGPHYCKREFCLKFreq ; 0x34189A48
0x3418FAA6: 9003 STR R0, [SP, #12]
0x3418FAA8: E026 B 46L54 ; 0x3418FAF8
.L49:
0x3418FAAA: F241 4014 MOVW R0, #0x1414
0x3418FAAE: F2C0 3000 MOVT R0, #0x0300
0x3418FAB2: F7F9 FF27 BL RCCEx_GetOTGPHYCLKFreq ; 0x34189904
0x3418FAB6: 9003 STR R0, [SP, #12]
0x3418FAB8: E01E B 46L54 ; 0x3418FAF8
.L50:
0x3418FABA: F641 0014 MOVW R0, #0x1814
0x3418FABE: F2C0 1000 MOVT R0, #0x0100
0x3418FAC2: F7F9 FFC1 BL RCCEx_GetOTGPHYCKREFCLKFreq ; 0x34189A48
0x3418FAC6: 9003 STR R0, [SP, #12]
0x3418FAC8: E016 B 46L54 ; 0x3418FAF8
.L51:
0x3418FACA: 2014 MOVS R0, #20
0x3418FACC: F2C0 3000 MOVT R0, #0x0300
0x3418FAD0: F7FA F804 BL RCCEx_GetXSPICLKFreq ; 0x34189ADC
0x3418FAD4: 9003 STR R0, [SP, #12]
0x3418FAD6: E00F B 46L54 ; 0x3418FAF8
.L52:
0x3418FAD8: F240 4014 MOVW R0, #0x0414
0x3418FADC: F2C0 3000 MOVT R0, #0x0300
0x3418FAE0: F7F9 FFFC BL RCCEx_GetXSPICLKFreq ; 0x34189ADC
0x3418FAE4: 9003 STR R0, [SP, #12]
0x3418FAE6: E007 B 46L54 ; 0x3418FAF8
.L53:
0x3418FAE8: F640 0014 MOVW R0, #0x0814
0x3418FAEC: F2C0 3000 MOVT R0, #0x0300
0x3418FAF0: F7F9 FFF4 BL RCCEx_GetXSPICLKFreq ; 0x34189ADC
0x3418FAF4: 9003 STR R0, [SP, #12]
0x3418FAF6: E7FF B 46L54 ; 0x3418FAF8
.L54:
0x3418FAF8: 9803 LDR R0, [SP, #12]
0x3418FAFA: B006 ADD SP, SP, #24
0x3418FAFC: BD80 POP 123R7, PC}
Section .init.HPDMA1_Channel15_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
HPDMA1_Channel15_IRQHandler:
0x3418FAFE: E7FE B HPDMA1_Channel15_IRQHandler ; 0x3418FAFE
Section .text.RCCEx_GetADCCLKFreq from blto2_FSBL_lto.o, size=438, align=4
RCCEx_GetADCCLKFreq:
0x3418FB00: B580 PUSH 123R7, LR}
0x3418FB02: B088 SUB SP, SP, #32
0x3418FB04: 9007 STR R0, [SP, #28]
0x3418FB06: 2000 MOVS R0, #0
0x3418FB08: 9006 STR R0, [SP, #24]
0x3418FB0A: 9807 LDR R0, [SP, #28]
0x3418FB0C: F7FF FC2E BL LL_RCC_GetADCClockSource ; 0x3418F36C
0x3418FB10: 4601 MOV R1, R0
0x3418FB12: 9104 STR R1, [SP, #16]
0x3418FB14: B1C8 CBZ R0, .L1 ; 0x3418FB4A
0x3418FB16: 9804 LDR R0, [SP, #16]
0x3418FB18: 2810 CMP R0, #16
0x3418FB1A: D01C BEQ 46L2 ; 0x3418FB56
0x3418FB1C: 9804 LDR R0, [SP, #16]
0x3418FB1E: 2820 CMP R0, #32
0x3418FB20: D01E BEQ 46L3 ; 0x3418FB60
0x3418FB22: 9804 LDR R0, [SP, #16]
0x3418FB24: 2830 CMP R0, #48
0x3418FB26: D058 BEQ 46L9 ; 0x3418FBDA
0x3418FB28: 9804 LDR R0, [SP, #16]
0x3418FB2A: 2840 CMP R0, #64
0x3418FB2C: F000 809F BEQ.W 46L17 ; 0x3418FC6E
0x3418FB30: 9804 LDR R0, [SP, #16]
0x3418FB32: 2850 CMP R0, #80
0x3418FB34: F000 808E BEQ.W 46L15 ; 0x3418FC54
0x3418FB38: 9804 LDR R0, [SP, #16]
0x3418FB3A: 2860 CMP R0, #96
0x3418FB3C: F000 80A0 BEQ.W 46L19 ; 0x3418FC80
0x3418FB40: 9804 LDR R0, [SP, #16]
0x3418FB42: 2870 CMP R0, #112
0x3418FB44: F000 80A2 BEQ.W 46L20 ; 0x3418FC8C
0x3418FB48: E0AA B 46L21 ; 0x3418FCA0
.L1:
0x3418FB4A: F7FF FBA1 BL HAL_RCC_GetSysClockFreq ; 0x3418F290
0x3418FB4E: F7FA F8A7 BL RCCEx_GetHCLKFreq ; 0x34189CA0
0x3418FB52: 9006 STR R0, [SP, #24]
0x3418FB54: E0A4 B 46L21 ; 0x3418FCA0
.L2:
0x3418FB56: 2007 MOVS R0, #7
0x3418FB58: F7F8 FA00 BL RCCEx_GetCLKPCLKFreq ; 0x34187F5C
0x3418FB5C: 9006 STR R0, [SP, #24]
0x3418FB5E: E09F B 46L21 ; 0x3418FCA0
.L3:
0x3418FB60: F7FA FB38 BL LL_RCC_IC7_IsEnabled ; 0x3418A1D4
0x3418FB64: B3C0 CBZ R0, .L8 ; 0x3418FBD8
0x3418FB66: F001 F853 BL LL_RCC_IC7_GetDivider ; 0x34190C10
0x3418FB6A: 9005 STR R0, [SP, #20]
0x3418FB6C: F7FA FB3A BL LL_RCC_IC7_GetSource ; 0x3418A1E4
0x3418FB70: 4601 MOV R1, R0
0x3418FB72: 9103 STR R1, [SP, #12]
0x3418FB74: B160 CBZ R0, .L4 ; 0x3418FB90
0x3418FB76: 9803 LDR R0, [SP, #12]
0x3418FB78: F1B0 5F80 CMP.W R0, #0x10000000
0x3418FB7C: D011 BEQ 46L5 ; 0x3418FBA2
0x3418FB7E: 9803 LDR R0, [SP, #12]
0x3418FB80: F1B0 5F00 CMP.W R0, #0x20000000
0x3418FB84: D016 BEQ 46L6 ; 0x3418FBB4
0x3418FB86: 9803 LDR R0, [SP, #12]
0x3418FB88: F1B0 5F40 CMP.W R0, #0x30000000
0x3418FB8C: D01B BEQ 46L7 ; 0x3418FBC6
0x3418FB8E: E023 B 46L8 ; 0x3418FBD8
.L4:
0x3418FB90: F000 FEFA BL HAL_RCCEx_GetPLL1CLKFreq ; 0x34190988
0x3418FB94: 9006 STR R0, [SP, #24]
0x3418FB96: 9806 LDR R0, [SP, #24]
0x3418FB98: 9905 LDR R1, [SP, #20]
0x3418FB9A: FBB0 F0F1 UDIV R0, R0, R1
0x3418FB9E: 9006 STR R0, [SP, #24]
0x3418FBA0: E01A B 46L8 ; 0x3418FBD8
.L5:
0x3418FBA2: F000 FF33 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34190A0C
0x3418FBA6: 9006 STR R0, [SP, #24]
0x3418FBA8: 9806 LDR R0, [SP, #24]
0x3418FBAA: 9905 LDR R1, [SP, #20]
0x3418FBAC: FBB0 F0F1 UDIV R0, R0, R1
0x3418FBB0: 9006 STR R0, [SP, #24]
0x3418FBB2: E011 B 46L8 ; 0x3418FBD8
.L6:
0x3418FBB4: F000 FF6C BL HAL_RCCEx_GetPLL3CLKFreq ; 0x34190A90
0x3418FBB8: 9006 STR R0, [SP, #24]
0x3418FBBA: 9806 LDR R0, [SP, #24]
0x3418FBBC: 9905 LDR R1, [SP, #20]
0x3418FBBE: FBB0 F0F1 UDIV R0, R0, R1
0x3418FBC2: 9006 STR R0, [SP, #24]
0x3418FBC4: E008 B 46L8 ; 0x3418FBD8
.L7:
0x3418FBC6: F000 FFA5 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34190B14
0x3418FBCA: 9006 STR R0, [SP, #24]
0x3418FBCC: 9806 LDR R0, [SP, #24]
0x3418FBCE: 9905 LDR R1, [SP, #20]
0x3418FBD0: FBB0 F0F1 UDIV R0, R0, R1
0x3418FBD4: 9006 STR R0, [SP, #24]
0x3418FBD6: E7FF B 46L8 ; 0x3418FBD8
.L8:
0x3418FBD8: E062 B 46L21 ; 0x3418FCA0
.L9:
0x3418FBDA: F7FA FAE3 BL LL_RCC_IC8_IsEnabled ; 0x3418A1A4
0x3418FBDE: B3C0 CBZ R0, .L14 ; 0x3418FC52
0x3418FBE0: F001 F80A BL LL_RCC_IC8_GetDivider ; 0x34190BF8
0x3418FBE4: 9005 STR R0, [SP, #20]
0x3418FBE6: F7FA FAE5 BL LL_RCC_IC8_GetSource ; 0x3418A1B4
0x3418FBEA: 4601 MOV R1, R0
0x3418FBEC: 9102 STR R1, [SP, #8]
0x3418FBEE: B160 CBZ R0, .L10 ; 0x3418FC0A
0x3418FBF0: 9802 LDR R0, [SP, #8]
0x3418FBF2: F1B0 5F80 CMP.W R0, #0x10000000
0x3418FBF6: D011 BEQ 46L11 ; 0x3418FC1C
0x3418FBF8: 9802 LDR R0, [SP, #8]
0x3418FBFA: F1B0 5F00 CMP.W R0, #0x20000000
0x3418FBFE: D016 BEQ 46L12 ; 0x3418FC2E
0x3418FC00: 9802 LDR R0, [SP, #8]
0x3418FC02: F1B0 5F40 CMP.W R0, #0x30000000
0x3418FC06: D01B BEQ 46L13 ; 0x3418FC40
0x3418FC08: E023 B 46L14 ; 0x3418FC52
.L10:
0x3418FC0A: F000 FEBD BL HAL_RCCEx_GetPLL1CLKFreq ; 0x34190988
0x3418FC0E: 9006 STR R0, [SP, #24]
0x3418FC10: 9806 LDR R0, [SP, #24]
0x3418FC12: 9905 LDR R1, [SP, #20]
0x3418FC14: FBB0 F0F1 UDIV R0, R0, R1
0x3418FC18: 9006 STR R0, [SP, #24]
0x3418FC1A: E01A B 46L14 ; 0x3418FC52
.L11:
0x3418FC1C: F000 FEF6 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34190A0C
0x3418FC20: 9006 STR R0, [SP, #24]
0x3418FC22: 9806 LDR R0, [SP, #24]
0x3418FC24: 9905 LDR R1, [SP, #20]
0x3418FC26: FBB0 F0F1 UDIV R0, R0, R1
0x3418FC2A: 9006 STR R0, [SP, #24]
0x3418FC2C: E011 B 46L14 ; 0x3418FC52
.L12:
0x3418FC2E: F000 FF2F BL HAL_RCCEx_GetPLL3CLKFreq ; 0x34190A90
0x3418FC32: 9006 STR R0, [SP, #24]
0x3418FC34: 9806 LDR R0, [SP, #24]
0x3418FC36: 9905 LDR R1, [SP, #20]
0x3418FC38: FBB0 F0F1 UDIV R0, R0, R1
0x3418FC3C: 9006 STR R0, [SP, #24]
0x3418FC3E: E008 B 46L14 ; 0x3418FC52
.L13:
0x3418FC40: F000 FF68 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34190B14
0x3418FC44: 9006 STR R0, [SP, #24]
0x3418FC46: 9806 LDR R0, [SP, #24]
0x3418FC48: 9905 LDR R1, [SP, #20]
0x3418FC4A: FBB0 F0F1 UDIV R0, R0, R1
0x3418FC4E: 9006 STR R0, [SP, #24]
0x3418FC50: E7FF B 46L14 ; 0x3418FC52
.L14:
0x3418FC52: E025 B 46L21 ; 0x3418FCA0
.L15:
0x3418FC54: F7FA F924 BL LL_RCC_HSI_IsReady.74 ; 0x34189EA0
0x3418FC58: B140 CBZ R0, .L16 ; 0x3418FC6C
0x3418FC5A: F7FA F929 BL LL_RCC_HSI_GetDivider.75 ; 0x34189EB0
0x3418FC5E: 09C1 LSRS R1, R0, #7
0x3418FC60: F249 0000 MOVW R0, #0x9000
0x3418FC64: F2C0 30D0 MOVT R0, #0x03D0
0x3418FC68: 40C8 LSRS R0, R1
0x3418FC6A: 9006 STR R0, [SP, #24]
.L16:
0x3418FC6C: E018 B 46L21 ; 0x3418FCA0
.L17:
0x3418FC6E: F7FA F927 BL LL_RCC_MSI_IsReady.76 ; 0x34189EC0
0x3418FC72: B120 CBZ R0, .L18 ; 0x3418FC7E
0x3418FC74: F640 1000 MOVW R0, #0x0900
0x3418FC78: F2C0 003D MOVT R0, #61
0x3418FC7C: 9006 STR R0, [SP, #24]
.L18:
0x3418FC7E: E00F B 46L21 ; 0x3418FCA0
.L19:
0x3418FC80: F248 0000 MOVW R0, #0x8000
0x3418FC84: F2C0 00BB MOVT R0, #187
0x3418FC88: 9006 STR R0, [SP, #24]
0x3418FC8A: E009 B 46L21 ; 0x3418FCA0
.L20:
0x3418FC8C: F7FF FB00 BL HAL_RCC_GetSysClockFreq ; 0x3418F290
0x3418FC90: 9001 STR R0, [SP, #4]
0x3418FC92: F7F8 F869 BL LL_RCC_GetTIMPrescaler ; 0x34187D68
0x3418FC96: 4601 MOV R1, R0
0x3418FC98: 9801 LDR R0, [SP, #4]
0x3418FC9A: 40C8 LSRS R0, R1
0x3418FC9C: 9006 STR R0, [SP, #24]
0x3418FC9E: E7FF B 46L21 ; 0x3418FCA0
.L21:
0x3418FCA0: 9806 LDR R0, [SP, #24]
0x3418FCA2: 9000 STR R0, [SP, #0]
0x3418FCA4: F7F8 F820 BL LL_RCC_GetADCPrescaler ; 0x34187CE8
0x3418FCA8: 4601 MOV R1, R0
0x3418FCAA: 9800 LDR R0, [SP, #0]
0x3418FCAC: 3101 ADDS R1, #1
0x3418FCAE: FBB0 F0F1 UDIV R0, R0, R1
0x3418FCB2: B008 ADD SP, SP, #32
0x3418FCB4: BD80 POP 123R7, PC}
Section .init.GPDMA1_Channel0_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
GPDMA1_Channel0_IRQHandler:
0x3418FCB6: E7FE B GPDMA1_Channel0_IRQHandler ; 0x3418FCB6
Section .text.RCCEx_GetCSICLKFreq from blto2_FSBL_lto.o, size=134, align=4
RCCEx_GetCSICLKFreq:
0x3418FCB8: B580 PUSH 123R7, LR}
0x3418FCBA: B084 SUB SP, SP, #16
0x3418FCBC: 2000 MOVS R0, #0
0x3418FCBE: 9003 STR R0, [SP, #12]
0x3418FCC0: F7FA FB3E BL LL_RCC_IC18_IsEnabled ; 0x3418A340
0x3418FCC4: B3C0 CBZ R0, .L5 ; 0x3418FD38
0x3418FCC6: F001 F80F BL LL_RCC_IC18_GetDivider ; 0x34190CE8
0x3418FCCA: 9002 STR R0, [SP, #8]
0x3418FCCC: F7FA FB40 BL LL_RCC_IC18_GetSource ; 0x3418A350
0x3418FCD0: 4601 MOV R1, R0
0x3418FCD2: 9101 STR R1, [SP, #4]
0x3418FCD4: B160 CBZ R0, .L1 ; 0x3418FCF0
0x3418FCD6: 9801 LDR R0, [SP, #4]
0x3418FCD8: F1B0 5F80 CMP.W R0, #0x10000000
0x3418FCDC: D011 BEQ 46L2 ; 0x3418FD02
0x3418FCDE: 9801 LDR R0, [SP, #4]
0x3418FCE0: F1B0 5F00 CMP.W R0, #0x20000000
0x3418FCE4: D016 BEQ 46L3 ; 0x3418FD14
0x3418FCE6: 9801 LDR R0, [SP, #4]
0x3418FCE8: F1B0 5F40 CMP.W R0, #0x30000000
0x3418FCEC: D01B BEQ 46L4 ; 0x3418FD26
0x3418FCEE: E023 B 46L5 ; 0x3418FD38
.L1:
0x3418FCF0: F000 FE4A BL HAL_RCCEx_GetPLL1CLKFreq ; 0x34190988
0x3418FCF4: 9003 STR R0, [SP, #12]
0x3418FCF6: 9803 LDR R0, [SP, #12]
0x3418FCF8: 9902 LDR R1, [SP, #8]
0x3418FCFA: FBB0 F0F1 UDIV R0, R0, R1
0x3418FCFE: 9003 STR R0, [SP, #12]
0x3418FD00: E01A B 46L5 ; 0x3418FD38
.L2:
0x3418FD02: F000 FE83 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34190A0C
0x3418FD06: 9003 STR R0, [SP, #12]
0x3418FD08: 9803 LDR R0, [SP, #12]
0x3418FD0A: 9902 LDR R1, [SP, #8]
0x3418FD0C: FBB0 F0F1 UDIV R0, R0, R1
0x3418FD10: 9003 STR R0, [SP, #12]
0x3418FD12: E011 B 46L5 ; 0x3418FD38
.L3:
0x3418FD14: F000 FEBC BL HAL_RCCEx_GetPLL3CLKFreq ; 0x34190A90
0x3418FD18: 9003 STR R0, [SP, #12]
0x3418FD1A: 9803 LDR R0, [SP, #12]
0x3418FD1C: 9902 LDR R1, [SP, #8]
0x3418FD1E: FBB0 F0F1 UDIV R0, R0, R1
0x3418FD22: 9003 STR R0, [SP, #12]
0x3418FD24: E008 B 46L5 ; 0x3418FD38
.L4:
0x3418FD26: F000 FEF5 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34190B14
0x3418FD2A: 9003 STR R0, [SP, #12]
0x3418FD2C: 9803 LDR R0, [SP, #12]
0x3418FD2E: 9902 LDR R1, [SP, #8]
0x3418FD30: FBB0 F0F1 UDIV R0, R0, R1
0x3418FD34: 9003 STR R0, [SP, #12]
0x3418FD36: E7FF B 46L5 ; 0x3418FD38
.L5:
0x3418FD38: 9803 LDR R0, [SP, #12]
0x3418FD3A: B004 ADD SP, SP, #16
0x3418FD3C: BD80 POP 123R7, PC}
Section .init.GPDMA1_Channel1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
GPDMA1_Channel1_IRQHandler:
0x3418FD3E: E7FE B GPDMA1_Channel1_IRQHandler ; 0x3418FD3E
Section .text.RCCEx_GetETH1PTPCLKFreq from blto2_FSBL_lto.o, size=222, align=4
RCCEx_GetETH1PTPCLKFreq:
0x3418FD40: B580 PUSH 123R7, LR}
0x3418FD42: B086 SUB SP, SP, #24
0x3418FD44: 9005 STR R0, [SP, #20]
0x3418FD46: 2000 MOVS R0, #0
0x3418FD48: 9004 STR R0, [SP, #16]
0x3418FD4A: 9805 LDR R0, [SP, #20]
0x3418FD4C: F7FF FB4A BL LL_RCC_GetETHPTPClockSource ; 0x3418F3E4
0x3418FD50: 4601 MOV R1, R0
0x3418FD52: 9102 STR R1, [SP, #8]
0x3418FD54: 2803 CMP R0, #3
0x3418FD56: D855 BHI 46L7 ; 0x3418FE04
0x3418FD58: 9902 LDR R1, [SP, #8]
0x3418FD5A: E8DF F001 TBB 91PC, R1]
0x3418FD5E: 02 DC.B 0x02 ; '\x02'
0x3418FD5F: 08 DC.B 0x08 ; '\b'
0x3418FD60: 0D DC.B 0x0D ; '\r'
0x3418FD61: 4A DC.B 0x4A ; 'J'
0x3418FD62: F7FF FA95 BL HAL_RCC_GetSysClockFreq ; 0x3418F290
0x3418FD66: F7F9 FF9B BL RCCEx_GetHCLKFreq ; 0x34189CA0
0x3418FD6A: 9004 STR R0, [SP, #16]
0x3418FD6C: E04A B 46L7 ; 0x3418FE04
0x3418FD6E: 2007 MOVS R0, #7
0x3418FD70: F7F8 F8F4 BL RCCEx_GetCLKPCLKFreq ; 0x34187F5C
0x3418FD74: 9004 STR R0, [SP, #16]
0x3418FD76: E045 B 46L7 ; 0x3418FE04
0x3418FD78: F7FA FAAA BL LL_RCC_IC13_IsEnabled ; 0x3418A2D0
0x3418FD7C: B3C0 CBZ R0, .L5 ; 0x3418FDF0
0x3418FD7E: F000 FF8F BL LL_RCC_IC13_GetDivider ; 0x34190CA0
0x3418FD82: 9003 STR R0, [SP, #12]
0x3418FD84: F7FA FAAC BL LL_RCC_IC13_GetSource ; 0x3418A2E0
0x3418FD88: 4601 MOV R1, R0
0x3418FD8A: 9101 STR R1, [SP, #4]
0x3418FD8C: B160 CBZ R0, .L1 ; 0x3418FDA8
0x3418FD8E: 9801 LDR R0, [SP, #4]
0x3418FD90: F1B0 5F80 CMP.W R0, #0x10000000
0x3418FD94: D011 BEQ 46L2 ; 0x3418FDBA
0x3418FD96: 9801 LDR R0, [SP, #4]
0x3418FD98: F1B0 5F00 CMP.W R0, #0x20000000
0x3418FD9C: D016 BEQ 46L3 ; 0x3418FDCC
0x3418FD9E: 9801 LDR R0, [SP, #4]
0x3418FDA0: F1B0 5F40 CMP.W R0, #0x30000000
0x3418FDA4: D01B BEQ 46L4 ; 0x3418FDDE
0x3418FDA6: E023 B 46L5 ; 0x3418FDF0
.L1:
0x3418FDA8: F000 FDEE BL HAL_RCCEx_GetPLL1CLKFreq ; 0x34190988
0x3418FDAC: 9004 STR R0, [SP, #16]
0x3418FDAE: 9804 LDR R0, [SP, #16]
0x3418FDB0: 9903 LDR R1, [SP, #12]
0x3418FDB2: FBB0 F0F1 UDIV R0, R0, R1
0x3418FDB6: 9004 STR R0, [SP, #16]
0x3418FDB8: E01A B 46L5 ; 0x3418FDF0
.L2:
0x3418FDBA: F000 FE27 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34190A0C
0x3418FDBE: 9004 STR R0, [SP, #16]
0x3418FDC0: 9804 LDR R0, [SP, #16]
0x3418FDC2: 9903 LDR R1, [SP, #12]
0x3418FDC4: FBB0 F0F1 UDIV R0, R0, R1
0x3418FDC8: 9004 STR R0, [SP, #16]
0x3418FDCA: E011 B 46L5 ; 0x3418FDF0
.L3:
0x3418FDCC: F000 FE60 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x34190A90
0x3418FDD0: 9004 STR R0, [SP, #16]
0x3418FDD2: 9804 LDR R0, [SP, #16]
0x3418FDD4: 9903 LDR R1, [SP, #12]
0x3418FDD6: FBB0 F0F1 UDIV R0, R0, R1
0x3418FDDA: 9004 STR R0, [SP, #16]
0x3418FDDC: E008 B 46L5 ; 0x3418FDF0
.L4:
0x3418FDDE: F000 FE99 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34190B14
0x3418FDE2: 9004 STR R0, [SP, #16]
0x3418FDE4: 9804 LDR R0, [SP, #16]
0x3418FDE6: 9903 LDR R1, [SP, #12]
0x3418FDE8: FBB0 F0F1 UDIV R0, R0, R1
0x3418FDEC: 9004 STR R0, [SP, #16]
0x3418FDEE: E7FF B 46L5 ; 0x3418FDF0
.L5:
0x3418FDF0: E008 B 46L7 ; 0x3418FE04
0x3418FDF2: F7FA F875 BL LL_RCC_HSE_IsReady.77 ; 0x34189EE0
0x3418FDF6: B120 CBZ R0, .L6 ; 0x3418FE02
0x3418FDF8: F646 4000 MOVW R0, #0x6C00
0x3418FDFC: F2C0 20DC MOVT R0, #0x02DC
0x3418FE00: 9004 STR R0, [SP, #16]
.L6:
0x3418FE02: E7FF B 46L7 ; 0x3418FE04
.L7:
0x3418FE04: 9804 LDR R0, [SP, #16]
0x3418FE06: 9000 STR R0, [SP, #0]
0x3418FE08: F7F7 FF76 BL LL_RCC_GetETH1PTPDivider ; 0x34187CF8
0x3418FE0C: 4602 MOV R2, R0
0x3418FE0E: 9800 LDR R0, [SP, #0]
0x3418FE10: 2101 MOVS R1, #1
0x3418FE12: EB01 1112 ADD.W R1, R1, R2, LSR #4
0x3418FE16: FBB0 F0F1 UDIV R0, R0, R1
0x3418FE1A: B006 ADD SP, SP, #24
0x3418FE1C: BD80 POP 123R7, PC}
Section .init.GPDMA1_Channel2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
GPDMA1_Channel2_IRQHandler:
0x3418FE1E: E7FE B GPDMA1_Channel2_IRQHandler ; 0x3418FE1E
Section .text.RCCEx_GetFDCANCLKFreq from blto2_FSBL_lto.o, size=206, align=4
RCCEx_GetFDCANCLKFreq:
0x3418FE20: B580 PUSH 123R7, LR}
0x3418FE22: B086 SUB SP, SP, #24
0x3418FE24: 9005 STR R0, [SP, #20]
0x3418FE26: 2000 MOVS R0, #0
0x3418FE28: 9004 STR R0, [SP, #16]
0x3418FE2A: 9805 LDR R0, [SP, #20]
0x3418FE2C: F7FF FAE6 BL LL_RCC_GetFDCANClockSource ; 0x3418F3FC
0x3418FE30: 4601 MOV R1, R0
0x3418FE32: 9102 STR R1, [SP, #8]
0x3418FE34: 2803 CMP R0, #3
0x3418FE36: D857 BHI 46L7 ; 0x3418FEE8
0x3418FE38: 9902 LDR R1, [SP, #8]
0x3418FE3A: E8DF F001 TBB 91PC, R1]
0x3418FE3E: 02 DC.B 0x02 ; '\x02'
0x3418FE3F: 0A DC.B 0x0A ; '\n'
0x3418FE40: 0F DC.B 0x0F ; '\x0F'
0x3418FE41: 4C DC.B 0x4C ; 'L'
0x3418FE42: F7FF FA25 BL HAL_RCC_GetSysClockFreq ; 0x3418F290
0x3418FE46: F7F9 FF2B BL RCCEx_GetHCLKFreq ; 0x34189CA0
0x3418FE4A: F7FA F951 BL RCCEx_GetPCLK1Freq ; 0x3418A0F0
0x3418FE4E: 9004 STR R0, [SP, #16]
0x3418FE50: E04A B 46L7 ; 0x3418FEE8
0x3418FE52: 2007 MOVS R0, #7
0x3418FE54: F7F8 F882 BL RCCEx_GetCLKPCLKFreq ; 0x34187F5C
0x3418FE58: 9004 STR R0, [SP, #16]
0x3418FE5A: E045 B 46L7 ; 0x3418FEE8
0x3418FE5C: F7FA FA28 BL LL_RCC_IC19_IsEnabled ; 0x3418A2B0
0x3418FE60: B3C0 CBZ R0, .L5 ; 0x3418FED4
0x3418FE62: F000 FF11 BL LL_RCC_IC19_GetDivider ; 0x34190C88
0x3418FE66: 9003 STR R0, [SP, #12]
0x3418FE68: F7FA FA2A BL LL_RCC_IC19_GetSource ; 0x3418A2C0
0x3418FE6C: 4601 MOV R1, R0
0x3418FE6E: 9101 STR R1, [SP, #4]
0x3418FE70: B160 CBZ R0, .L1 ; 0x3418FE8C
0x3418FE72: 9801 LDR R0, [SP, #4]
0x3418FE74: F1B0 5F80 CMP.W R0, #0x10000000
0x3418FE78: D011 BEQ 46L2 ; 0x3418FE9E
0x3418FE7A: 9801 LDR R0, [SP, #4]
0x3418FE7C: F1B0 5F00 CMP.W R0, #0x20000000
0x3418FE80: D016 BEQ 46L3 ; 0x3418FEB0
0x3418FE82: 9801 LDR R0, [SP, #4]
0x3418FE84: F1B0 5F40 CMP.W R0, #0x30000000
0x3418FE88: D01B BEQ 46L4 ; 0x3418FEC2
0x3418FE8A: E023 B 46L5 ; 0x3418FED4
.L1:
0x3418FE8C: F000 FD7C BL HAL_RCCEx_GetPLL1CLKFreq ; 0x34190988
0x3418FE90: 9004 STR R0, [SP, #16]
0x3418FE92: 9804 LDR R0, [SP, #16]
0x3418FE94: 9903 LDR R1, [SP, #12]
0x3418FE96: FBB0 F0F1 UDIV R0, R0, R1
0x3418FE9A: 9004 STR R0, [SP, #16]
0x3418FE9C: E01A B 46L5 ; 0x3418FED4
.L2:
0x3418FE9E: F000 FDB5 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34190A0C
0x3418FEA2: 9004 STR R0, [SP, #16]
0x3418FEA4: 9804 LDR R0, [SP, #16]
0x3418FEA6: 9903 LDR R1, [SP, #12]
0x3418FEA8: FBB0 F0F1 UDIV R0, R0, R1
0x3418FEAC: 9004 STR R0, [SP, #16]
0x3418FEAE: E011 B 46L5 ; 0x3418FED4
.L3:
0x3418FEB0: F000 FDEE BL HAL_RCCEx_GetPLL3CLKFreq ; 0x34190A90
0x3418FEB4: 9004 STR R0, [SP, #16]
0x3418FEB6: 9804 LDR R0, [SP, #16]
0x3418FEB8: 9903 LDR R1, [SP, #12]
0x3418FEBA: FBB0 F0F1 UDIV R0, R0, R1
0x3418FEBE: 9004 STR R0, [SP, #16]
0x3418FEC0: E008 B 46L5 ; 0x3418FED4
.L4:
0x3418FEC2: F000 FE27 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34190B14
0x3418FEC6: 9004 STR R0, [SP, #16]
0x3418FEC8: 9804 LDR R0, [SP, #16]
0x3418FECA: 9903 LDR R1, [SP, #12]
0x3418FECC: FBB0 F0F1 UDIV R0, R0, R1
0x3418FED0: 9004 STR R0, [SP, #16]
0x3418FED2: E7FF B 46L5 ; 0x3418FED4
.L5:
0x3418FED4: E008 B 46L7 ; 0x3418FEE8
0x3418FED6: F7FA F803 BL LL_RCC_HSE_IsReady.77 ; 0x34189EE0
0x3418FEDA: B120 CBZ R0, .L6 ; 0x3418FEE6
0x3418FEDC: F646 4000 MOVW R0, #0x6C00
0x3418FEE0: F2C0 20DC MOVT R0, #0x02DC
0x3418FEE4: 9004 STR R0, [SP, #16]
.L6:
0x3418FEE6: E7FF B 46L7 ; 0x3418FEE8
.L7:
0x3418FEE8: 9804 LDR R0, [SP, #16]
0x3418FEEA: B006 ADD SP, SP, #24
0x3418FEEC: BD80 POP 123R7, PC}
Section .init.GPDMA1_Channel3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
GPDMA1_Channel3_IRQHandler:
0x3418FEEE: E7FE B GPDMA1_Channel3_IRQHandler ; 0x3418FEEE
Section .text.RCCEx_GetFMCCLKFreq from blto2_FSBL_lto.o, size=314, align=4
RCCEx_GetFMCCLKFreq:
0x3418FEF0: B580 PUSH 123R7, LR}
0x3418FEF2: B086 SUB SP, SP, #24
0x3418FEF4: 9005 STR R0, [SP, #20]
0x3418FEF6: 2000 MOVS R0, #0
0x3418FEF8: 9004 STR R0, [SP, #16]
0x3418FEFA: 9805 LDR R0, [SP, #20]
0x3418FEFC: F7FF FA8A BL LL_RCC_GetFMCClockSource ; 0x3418F414
0x3418FF00: 4601 MOV R1, R0
0x3418FF02: 9102 STR R1, [SP, #8]
0x3418FF04: B148 CBZ R0, .L1 ; 0x3418FF1A
0x3418FF06: 9802 LDR R0, [SP, #8]
0x3418FF08: 2810 CMP R0, #16
0x3418FF0A: D00C BEQ 46L2 ; 0x3418FF26
0x3418FF0C: 9802 LDR R0, [SP, #8]
0x3418FF0E: 2820 CMP R0, #32
0x3418FF10: D00E BEQ 46L3 ; 0x3418FF30
0x3418FF12: 9802 LDR R0, [SP, #8]
0x3418FF14: 2830 CMP R0, #48
0x3418FF16: D048 BEQ 46L9 ; 0x3418FFAA
0x3418FF18: E084 B 46L15 ; 0x34190024
.L1:
0x3418FF1A: F7FF F9B9 BL HAL_RCC_GetSysClockFreq ; 0x3418F290
0x3418FF1E: F7F9 FEBF BL RCCEx_GetHCLKFreq ; 0x34189CA0
0x3418FF22: 9004 STR R0, [SP, #16]
0x3418FF24: E07E B 46L15 ; 0x34190024
.L2:
0x3418FF26: 2007 MOVS R0, #7
0x3418FF28: F7F8 F818 BL RCCEx_GetCLKPCLKFreq ; 0x34187F5C
0x3418FF2C: 9004 STR R0, [SP, #16]
0x3418FF2E: E079 B 46L15 ; 0x34190024
.L3:
0x3418FF30: F7F9 FEC4 BL LL_RCC_IC3_IsEnabled ; 0x34189CBC
0x3418FF34: B3C0 CBZ R0, .L8 ; 0x3418FFA8
0x3418FF36: F000 FD1B BL LL_RCC_IC3_GetDivider ; 0x34190970
0x3418FF3A: 9003 STR R0, [SP, #12]
0x3418FF3C: F7F9 FEC6 BL LL_RCC_IC3_GetSource ; 0x34189CCC
0x3418FF40: 4601 MOV R1, R0
0x3418FF42: 9101 STR R1, [SP, #4]
0x3418FF44: B160 CBZ R0, .L4 ; 0x3418FF60
0x3418FF46: 9801 LDR R0, [SP, #4]
0x3418FF48: F1B0 5F80 CMP.W R0, #0x10000000
0x3418FF4C: D011 BEQ 46L5 ; 0x3418FF72
0x3418FF4E: 9801 LDR R0, [SP, #4]
0x3418FF50: F1B0 5F00 CMP.W R0, #0x20000000
0x3418FF54: D016 BEQ 46L6 ; 0x3418FF84
0x3418FF56: 9801 LDR R0, [SP, #4]
0x3418FF58: F1B0 5F40 CMP.W R0, #0x30000000
0x3418FF5C: D01B BEQ 46L7 ; 0x3418FF96
0x3418FF5E: E023 B 46L8 ; 0x3418FFA8
.L4:
0x3418FF60: F000 FD12 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x34190988
0x3418FF64: 9004 STR R0, [SP, #16]
0x3418FF66: 9804 LDR R0, [SP, #16]
0x3418FF68: 9903 LDR R1, [SP, #12]
0x3418FF6A: FBB0 F0F1 UDIV R0, R0, R1
0x3418FF6E: 9004 STR R0, [SP, #16]
0x3418FF70: E01A B 46L8 ; 0x3418FFA8
.L5:
0x3418FF72: F000 FD4B BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34190A0C
0x3418FF76: 9004 STR R0, [SP, #16]
0x3418FF78: 9804 LDR R0, [SP, #16]
0x3418FF7A: 9903 LDR R1, [SP, #12]
0x3418FF7C: FBB0 F0F1 UDIV R0, R0, R1
0x3418FF80: 9004 STR R0, [SP, #16]
0x3418FF82: E011 B 46L8 ; 0x3418FFA8
.L6:
0x3418FF84: F000 FD84 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x34190A90
0x3418FF88: 9004 STR R0, [SP, #16]
0x3418FF8A: 9804 LDR R0, [SP, #16]
0x3418FF8C: 9903 LDR R1, [SP, #12]
0x3418FF8E: FBB0 F0F1 UDIV R0, R0, R1
0x3418FF92: 9004 STR R0, [SP, #16]
0x3418FF94: E008 B 46L8 ; 0x3418FFA8
.L7:
0x3418FF96: F000 FDBD BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34190B14
0x3418FF9A: 9004 STR R0, [SP, #16]
0x3418FF9C: 9804 LDR R0, [SP, #16]
0x3418FF9E: 9903 LDR R1, [SP, #12]
0x3418FFA0: FBB0 F0F1 UDIV R0, R0, R1
0x3418FFA4: 9004 STR R0, [SP, #16]
0x3418FFA6: E7FF B 46L8 ; 0x3418FFA8
.L8:
0x3418FFA8: E03C B 46L15 ; 0x34190024
.L9:
0x3418FFAA: F7F9 FE97 BL LL_RCC_IC4_IsEnabled ; 0x34189CDC
0x3418FFAE: B3C0 CBZ R0, .L14 ; 0x34190022
0x3418FFB0: F000 FDF2 BL LL_RCC_IC4_GetDivider ; 0x34190B98
0x3418FFB4: 9003 STR R0, [SP, #12]
0x3418FFB6: F7F9 FE99 BL LL_RCC_IC4_GetSource ; 0x34189CEC
0x3418FFBA: 4601 MOV R1, R0
0x3418FFBC: 9100 STR R1, [SP, #0]
0x3418FFBE: B160 CBZ R0, .L10 ; 0x3418FFDA
0x3418FFC0: 9800 LDR R0, [SP, #0]
0x3418FFC2: F1B0 5F80 CMP.W R0, #0x10000000
0x3418FFC6: D011 BEQ 46L11 ; 0x3418FFEC
0x3418FFC8: 9800 LDR R0, [SP, #0]
0x3418FFCA: F1B0 5F00 CMP.W R0, #0x20000000
0x3418FFCE: D016 BEQ 46L12 ; 0x3418FFFE
0x3418FFD0: 9800 LDR R0, [SP, #0]
0x3418FFD2: F1B0 5F40 CMP.W R0, #0x30000000
0x3418FFD6: D01B BEQ 46L13 ; 0x34190010
0x3418FFD8: E023 B 46L14 ; 0x34190022
.L10:
0x3418FFDA: F000 FCD5 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x34190988
0x3418FFDE: 9004 STR R0, [SP, #16]
0x3418FFE0: 9804 LDR R0, [SP, #16]
0x3418FFE2: 9903 LDR R1, [SP, #12]
0x3418FFE4: FBB0 F0F1 UDIV R0, R0, R1
0x3418FFE8: 9004 STR R0, [SP, #16]
0x3418FFEA: E01A B 46L14 ; 0x34190022
.L11:
0x3418FFEC: F000 FD0E BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34190A0C
0x3418FFF0: 9004 STR R0, [SP, #16]
0x3418FFF2: 9804 LDR R0, [SP, #16]
0x3418FFF4: 9903 LDR R1, [SP, #12]
0x3418FFF6: FBB0 F0F1 UDIV R0, R0, R1
0x3418FFFA: 9004 STR R0, [SP, #16]
0x3418FFFC: E011 B 46L14 ; 0x34190022
.L12:
0x3418FFFE: F000 FD47 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x34190A90
0x34190002: 9004 STR R0, [SP, #16]
0x34190004: 9804 LDR R0, [SP, #16]
0x34190006: 9903 LDR R1, [SP, #12]
0x34190008: FBB0 F0F1 UDIV R0, R0, R1
0x3419000C: 9004 STR R0, [SP, #16]
0x3419000E: E008 B 46L14 ; 0x34190022
.L13:
0x34190010: F000 FD80 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34190B14
0x34190014: 9004 STR R0, [SP, #16]
0x34190016: 9804 LDR R0, [SP, #16]
0x34190018: 9903 LDR R1, [SP, #12]
0x3419001A: FBB0 F0F1 UDIV R0, R0, R1
0x3419001E: 9004 STR R0, [SP, #16]
0x34190020: E7FF B 46L14 ; 0x34190022
.L14:
0x34190022: E7FF B 46L15 ; 0x34190024
.L15:
0x34190024: 9804 LDR R0, [SP, #16]
0x34190026: B006 ADD SP, SP, #24
0x34190028: BD80 POP 123R7, PC}
Section .init.GPDMA1_Channel4_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
GPDMA1_Channel4_IRQHandler:
0x3419002A: E7FE B GPDMA1_Channel4_IRQHandler ; 0x3419002A
Section .text.RCCEx_GetI2CCLKFreq from blto2_FSBL_lto.o, size=706, align=4
RCCEx_GetI2CCLKFreq:
0x3419002C: B580 PUSH 123R7, LR}
0x3419002E: B086 SUB SP, SP, #24
0x34190030: 9005 STR R0, [SP, #20]
0x34190032: 2000 MOVS R0, #0
0x34190034: 9004 STR R0, [SP, #16]
0x34190036: 9805 LDR R0, [SP, #20]
0x34190038: F7F7 FE66 BL LL_RCC_GetI2CClockSource ; 0x34187D08
0x3419003C: 4601 MOV R1, R0
0x3419003E: 9102 STR R1, [SP, #8]
0x34190040: 210C MOVS R1, #12
0x34190042: F2C0 7100 MOVT R1, #0x0700
0x34190046: 4288 CMP R0, R1
0x34190048: F000 80B1 BEQ.W 46L1 ; 0x341901AE
0x3419004C: 9802 LDR R0, [SP, #8]
0x3419004E: F240 410C MOVW R1, #0x040C
0x34190052: F2C0 7100 MOVT R1, #0x0700
0x34190056: 4288 CMP R0, R1
0x34190058: F000 80A9 BEQ.W 46L1 ; 0x341901AE
0x3419005C: 9802 LDR R0, [SP, #8]
0x3419005E: F640 010C MOVW R1, #0x080C
0x34190062: F2C0 7100 MOVT R1, #0x0700
0x34190066: 4288 CMP R0, R1
0x34190068: F000 80A1 BEQ.W 46L1 ; 0x341901AE
0x3419006C: 9802 LDR R0, [SP, #8]
0x3419006E: F640 410C MOVW R1, #0x0C0C
0x34190072: F2C0 7100 MOVT R1, #0x0700
0x34190076: 4288 CMP R0, R1
0x34190078: F000 8099 BEQ.W 46L1 ; 0x341901AE
0x3419007C: 9802 LDR R0, [SP, #8]
0x3419007E: 210C MOVS R1, #12
0x34190080: F2C0 7101 MOVT R1, #0x0701
0x34190084: 4288 CMP R0, R1
0x34190086: F000 809A BEQ.W 46L2 ; 0x341901BE
0x3419008A: 9802 LDR R0, [SP, #8]
0x3419008C: F240 410C MOVW R1, #0x040C
0x34190090: F2C0 7101 MOVT R1, #0x0701
0x34190094: 4288 CMP R0, R1
0x34190096: F000 8092 BEQ.W 46L2 ; 0x341901BE
0x3419009A: 9802 LDR R0, [SP, #8]
0x3419009C: F640 010C MOVW R1, #0x080C
0x341900A0: F2C0 7101 MOVT R1, #0x0701
0x341900A4: 4288 CMP R0, R1
0x341900A6: F000 808A BEQ.W 46L2 ; 0x341901BE
0x341900AA: 9802 LDR R0, [SP, #8]
0x341900AC: F640 410C MOVW R1, #0x0C0C
0x341900B0: F2C0 7101 MOVT R1, #0x0701
0x341900B4: 4288 CMP R0, R1
0x341900B6: F000 8082 BEQ.W 46L2 ; 0x341901BE
0x341900BA: 9802 LDR R0, [SP, #8]
0x341900BC: 210C MOVS R1, #12
0x341900BE: F2C0 7102 MOVT R1, #0x0702
0x341900C2: 4288 CMP R0, R1
0x341900C4: F000 8080 BEQ.W 46L3 ; 0x341901C8
0x341900C8: 9802 LDR R0, [SP, #8]
0x341900CA: F240 410C MOVW R1, #0x040C
0x341900CE: F2C0 7102 MOVT R1, #0x0702
0x341900D2: 4288 CMP R0, R1
0x341900D4: D078 BEQ 46L3 ; 0x341901C8
0x341900D6: 9802 LDR R0, [SP, #8]
0x341900D8: F640 010C MOVW R1, #0x080C
0x341900DC: F2C0 7102 MOVT R1, #0x0702
0x341900E0: 4288 CMP R0, R1
0x341900E2: D071 BEQ 46L3 ; 0x341901C8
0x341900E4: 9802 LDR R0, [SP, #8]
0x341900E6: F640 410C MOVW R1, #0x0C0C
0x341900EA: F2C0 7102 MOVT R1, #0x0702
0x341900EE: 4288 CMP R0, R1
0x341900F0: D06A BEQ 46L3 ; 0x341901C8
0x341900F2: 9802 LDR R0, [SP, #8]
0x341900F4: 210C MOVS R1, #12
0x341900F6: F2C0 7103 MOVT R1, #0x0703
0x341900FA: 4288 CMP R0, R1
0x341900FC: F000 80A1 BEQ.W 46L9 ; 0x34190242
0x34190100: 9802 LDR R0, [SP, #8]
0x34190102: F240 410C MOVW R1, #0x040C
0x34190106: F2C0 7103 MOVT R1, #0x0703
0x3419010A: 4288 CMP R0, R1
0x3419010C: F000 8099 BEQ.W 46L9 ; 0x34190242
0x34190110: 9802 LDR R0, [SP, #8]
0x34190112: F640 010C MOVW R1, #0x080C
0x34190116: F2C0 7103 MOVT R1, #0x0703
0x3419011A: 4288 CMP R0, R1
0x3419011C: F000 8091 BEQ.W 46L9 ; 0x34190242
0x34190120: 9802 LDR R0, [SP, #8]
0x34190122: F640 410C MOVW R1, #0x0C0C
0x34190126: F2C0 7103 MOVT R1, #0x0703
0x3419012A: 4288 CMP R0, R1
0x3419012C: F000 8089 BEQ.W 46L9 ; 0x34190242
0x34190130: 9802 LDR R0, [SP, #8]
0x34190132: 210C MOVS R1, #12
0x34190134: F2C0 7104 MOVT R1, #0x0704
0x34190138: 4288 CMP R0, R1
0x3419013A: F000 80CC BEQ.W 46L17 ; 0x341902D6
0x3419013E: 9802 LDR R0, [SP, #8]
0x34190140: F240 410C MOVW R1, #0x040C
0x34190144: F2C0 7104 MOVT R1, #0x0704
0x34190148: 4288 CMP R0, R1
0x3419014A: F000 80C4 BEQ.W 46L17 ; 0x341902D6
0x3419014E: 9802 LDR R0, [SP, #8]
0x34190150: F640 010C MOVW R1, #0x080C
0x34190154: F2C0 7104 MOVT R1, #0x0704
0x34190158: 4288 CMP R0, R1
0x3419015A: F000 80BC BEQ.W 46L17 ; 0x341902D6
0x3419015E: 9802 LDR R0, [SP, #8]
0x34190160: F640 410C MOVW R1, #0x0C0C
0x34190164: F2C0 7104 MOVT R1, #0x0704
0x34190168: 4288 CMP R0, R1
0x3419016A: F000 80B4 BEQ.W 46L17 ; 0x341902D6
0x3419016E: 9802 LDR R0, [SP, #8]
0x34190170: 210C MOVS R1, #12
0x34190172: F2C0 7105 MOVT R1, #0x0705
0x34190176: 4288 CMP R0, R1
0x34190178: F000 80A0 BEQ.W 46L15 ; 0x341902BC
0x3419017C: 9802 LDR R0, [SP, #8]
0x3419017E: F240 410C MOVW R1, #0x040C
0x34190182: F2C0 7105 MOVT R1, #0x0705
0x34190186: 4288 CMP R0, R1
0x34190188: F000 8098 BEQ.W 46L15 ; 0x341902BC
0x3419018C: 9802 LDR R0, [SP, #8]
0x3419018E: F640 010C MOVW R1, #0x080C
0x34190192: F2C0 7105 MOVT R1, #0x0705
0x34190196: 4288 CMP R0, R1
0x34190198: F000 8090 BEQ.W 46L15 ; 0x341902BC
0x3419019C: 9802 LDR R0, [SP, #8]
0x3419019E: F640 410C MOVW R1, #0x0C0C
0x341901A2: F2C0 7105 MOVT R1, #0x0705
0x341901A6: 4288 CMP R0, R1
0x341901A8: F000 8088 BEQ.W 46L15 ; 0x341902BC
0x341901AC: E09C B 46L19 ; 0x341902E8
.L1:
0x341901AE: F7FF F86F BL HAL_RCC_GetSysClockFreq ; 0x3418F290
0x341901B2: F7F9 FD75 BL RCCEx_GetHCLKFreq ; 0x34189CA0
0x341901B6: F7F9 FF9B BL RCCEx_GetPCLK1Freq ; 0x3418A0F0
0x341901BA: 9004 STR R0, [SP, #16]
0x341901BC: E094 B 46L19 ; 0x341902E8
.L2:
0x341901BE: 2007 MOVS R0, #7
0x341901C0: F7F7 FECC BL RCCEx_GetCLKPCLKFreq ; 0x34187F5C
0x341901C4: 9004 STR R0, [SP, #16]
0x341901C6: E08F B 46L19 ; 0x341902E8
.L3:
0x341901C8: F7FA F862 BL LL_RCC_IC10_IsEnabled ; 0x3418A290
0x341901CC: B3C0 CBZ R0, .L8 ; 0x34190240
0x341901CE: F000 FD4F BL LL_RCC_IC10_GetDivider ; 0x34190C70
0x341901D2: 9003 STR R0, [SP, #12]
0x341901D4: F7FA F864 BL LL_RCC_IC10_GetSource ; 0x3418A2A0
0x341901D8: 4601 MOV R1, R0
0x341901DA: 9101 STR R1, [SP, #4]
0x341901DC: B160 CBZ R0, .L4 ; 0x341901F8
0x341901DE: 9801 LDR R0, [SP, #4]
0x341901E0: F1B0 5F80 CMP.W R0, #0x10000000
0x341901E4: D011 BEQ 46L5 ; 0x3419020A
0x341901E6: 9801 LDR R0, [SP, #4]
0x341901E8: F1B0 5F00 CMP.W R0, #0x20000000
0x341901EC: D016 BEQ 46L6 ; 0x3419021C
0x341901EE: 9801 LDR R0, [SP, #4]
0x341901F0: F1B0 5F40 CMP.W R0, #0x30000000
0x341901F4: D01B BEQ 46L7 ; 0x3419022E
0x341901F6: E023 B 46L8 ; 0x34190240
.L4:
0x341901F8: F000 FBC6 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x34190988
0x341901FC: 9004 STR R0, [SP, #16]
0x341901FE: 9804 LDR R0, [SP, #16]
0x34190200: 9903 LDR R1, [SP, #12]
0x34190202: FBB0 F0F1 UDIV R0, R0, R1
0x34190206: 9004 STR R0, [SP, #16]
0x34190208: E01A B 46L8 ; 0x34190240
.L5:
0x3419020A: F000 FBFF BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34190A0C
0x3419020E: 9004 STR R0, [SP, #16]
0x34190210: 9804 LDR R0, [SP, #16]
0x34190212: 9903 LDR R1, [SP, #12]
0x34190214: FBB0 F0F1 UDIV R0, R0, R1
0x34190218: 9004 STR R0, [SP, #16]
0x3419021A: E011 B 46L8 ; 0x34190240
.L6:
0x3419021C: F000 FC38 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x34190A90
0x34190220: 9004 STR R0, [SP, #16]
0x34190222: 9804 LDR R0, [SP, #16]
0x34190224: 9903 LDR R1, [SP, #12]
0x34190226: FBB0 F0F1 UDIV R0, R0, R1
0x3419022A: 9004 STR R0, [SP, #16]
0x3419022C: E008 B 46L8 ; 0x34190240
.L7:
0x3419022E: F000 FC71 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34190B14
0x34190232: 9004 STR R0, [SP, #16]
0x34190234: 9804 LDR R0, [SP, #16]
0x34190236: 9903 LDR R1, [SP, #12]
0x34190238: FBB0 F0F1 UDIV R0, R0, R1
0x3419023C: 9004 STR R0, [SP, #16]
0x3419023E: E7FF B 46L8 ; 0x34190240
.L8:
0x34190240: E052 B 46L19 ; 0x341902E8
.L9:
0x34190242: F7F9 FF3D BL LL_RCC_IC15_IsEnabled ; 0x3418A0C0
0x34190246: B3C0 CBZ R0, .L14 ; 0x341902BA
0x34190248: F000 FCB2 BL LL_RCC_IC15_GetDivider ; 0x34190BB0
0x3419024C: 9003 STR R0, [SP, #12]
0x3419024E: F7F9 FF3F BL LL_RCC_IC15_GetSource ; 0x3418A0D0
0x34190252: 4601 MOV R1, R0
0x34190254: 9100 STR R1, [SP, #0]
0x34190256: B160 CBZ R0, .L10 ; 0x34190272
0x34190258: 9800 LDR R0, [SP, #0]
0x3419025A: F1B0 5F80 CMP.W R0, #0x10000000
0x3419025E: D011 BEQ 46L11 ; 0x34190284
0x34190260: 9800 LDR R0, [SP, #0]
0x34190262: F1B0 5F00 CMP.W R0, #0x20000000
0x34190266: D016 BEQ 46L12 ; 0x34190296
0x34190268: 9800 LDR R0, [SP, #0]
0x3419026A: F1B0 5F40 CMP.W R0, #0x30000000
0x3419026E: D01B BEQ 46L13 ; 0x341902A8
0x34190270: E023 B 46L14 ; 0x341902BA
.L10:
0x34190272: F000 FB89 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x34190988
0x34190276: 9004 STR R0, [SP, #16]
0x34190278: 9804 LDR R0, [SP, #16]
0x3419027A: 9903 LDR R1, [SP, #12]
0x3419027C: FBB0 F0F1 UDIV R0, R0, R1
0x34190280: 9004 STR R0, [SP, #16]
0x34190282: E01A B 46L14 ; 0x341902BA
.L11:
0x34190284: F000 FBC2 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34190A0C
0x34190288: 9004 STR R0, [SP, #16]
0x3419028A: 9804 LDR R0, [SP, #16]
0x3419028C: 9903 LDR R1, [SP, #12]
0x3419028E: FBB0 F0F1 UDIV R0, R0, R1
0x34190292: 9004 STR R0, [SP, #16]
0x34190294: E011 B 46L14 ; 0x341902BA
.L12:
0x34190296: F000 FBFB BL HAL_RCCEx_GetPLL3CLKFreq ; 0x34190A90
0x3419029A: 9004 STR R0, [SP, #16]
0x3419029C: 9804 LDR R0, [SP, #16]
0x3419029E: 9903 LDR R1, [SP, #12]
0x341902A0: FBB0 F0F1 UDIV R0, R0, R1
0x341902A4: 9004 STR R0, [SP, #16]
0x341902A6: E008 B 46L14 ; 0x341902BA
.L13:
0x341902A8: F000 FC34 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34190B14
0x341902AC: 9004 STR R0, [SP, #16]
0x341902AE: 9804 LDR R0, [SP, #16]
0x341902B0: 9903 LDR R1, [SP, #12]
0x341902B2: FBB0 F0F1 UDIV R0, R0, R1
0x341902B6: 9004 STR R0, [SP, #16]
0x341902B8: E7FF B 46L14 ; 0x341902BA
.L14:
0x341902BA: E015 B 46L19 ; 0x341902E8
.L15:
0x341902BC: F7F9 FDF0 BL LL_RCC_HSI_IsReady.74 ; 0x34189EA0
0x341902C0: B140 CBZ R0, .L16 ; 0x341902D4
0x341902C2: F7F9 FDF5 BL LL_RCC_HSI_GetDivider.75 ; 0x34189EB0
0x341902C6: 09C1 LSRS R1, R0, #7
0x341902C8: F249 0000 MOVW R0, #0x9000
0x341902CC: F2C0 30D0 MOVT R0, #0x03D0
0x341902D0: 40C8 LSRS R0, R1
0x341902D2: 9004 STR R0, [SP, #16]
.L16:
0x341902D4: E008 B 46L19 ; 0x341902E8
.L17:
0x341902D6: F7F9 FDF3 BL LL_RCC_MSI_IsReady.76 ; 0x34189EC0
0x341902DA: B120 CBZ R0, .L18 ; 0x341902E6
0x341902DC: F640 1000 MOVW R0, #0x0900
0x341902E0: F2C0 003D MOVT R0, #61
0x341902E4: 9004 STR R0, [SP, #16]
.L18:
0x341902E6: E7FF B 46L19 ; 0x341902E8
.L19:
0x341902E8: 9804 LDR R0, [SP, #16]
0x341902EA: B006 ADD SP, SP, #24
0x341902EC: BD80 POP 123R7, PC}
Section .init.GPDMA1_Channel5_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
GPDMA1_Channel5_IRQHandler:
0x341902EE: E7FE B GPDMA1_Channel5_IRQHandler ; 0x341902EE
Section .text.RCCEx_GetLPTIMCLKFreq from blto2_FSBL_lto.o, size=706, align=4
RCCEx_GetLPTIMCLKFreq:
0x341902F0: B580 PUSH 123R7, LR}
0x341902F2: B086 SUB SP, SP, #24
0x341902F4: 9005 STR R0, [SP, #20]
0x341902F6: 2000 MOVS R0, #0
0x341902F8: 9004 STR R0, [SP, #16]
0x341902FA: 9805 LDR R0, [SP, #20]
0x341902FC: F7F7 FD14 BL LL_RCC_GetLPTIMClockSource ; 0x34187D28
0x34190300: 4601 MOV R1, R0
0x34190302: 9102 STR R1, [SP, #8]
0x34190304: F640 012C MOVW R1, #0x082C
0x34190308: F2C0 7100 MOVT R1, #0x0700
0x3419030C: 4288 CMP R0, R1
0x3419030E: F000 80E3 BEQ.W 46L1 ; 0x341904D8
0x34190312: 9802 LDR R0, [SP, #8]
0x34190314: F640 412C MOVW R1, #0x0C2C
0x34190318: F2C0 7100 MOVT R1, #0x0700
0x3419031C: 4288 CMP R0, R1
0x3419031E: F000 80E3 BEQ.W 46L2 ; 0x341904E8
0x34190322: 9802 LDR R0, [SP, #8]
0x34190324: F241 012C MOVW R1, #0x102C
0x34190328: F2C0 7100 MOVT R1, #0x0700
0x3419032C: 4288 CMP R0, R1
0x3419032E: F000 80DB BEQ.W 46L2 ; 0x341904E8
0x34190332: 9802 LDR R0, [SP, #8]
0x34190334: F241 412C MOVW R1, #0x142C
0x34190338: F2C0 7100 MOVT R1, #0x0700
0x3419033C: 4288 CMP R0, R1
0x3419033E: F000 80D3 BEQ.W 46L2 ; 0x341904E8
0x34190342: 9802 LDR R0, [SP, #8]
0x34190344: F641 012C MOVW R1, #0x182C
0x34190348: F2C0 7100 MOVT R1, #0x0700
0x3419034C: 4288 CMP R0, R1
0x3419034E: F000 80CB BEQ.W 46L2 ; 0x341904E8
0x34190352: 9802 LDR R0, [SP, #8]
0x34190354: F640 012C MOVW R1, #0x082C
0x34190358: F2C0 7101 MOVT R1, #0x0701
0x3419035C: 4288 CMP R0, R1
0x3419035E: F000 80CB BEQ.W 46L3 ; 0x341904F8
0x34190362: 9802 LDR R0, [SP, #8]
0x34190364: F640 412C MOVW R1, #0x0C2C
0x34190368: F2C0 7101 MOVT R1, #0x0701
0x3419036C: 4288 CMP R0, R1
0x3419036E: F000 80C3 BEQ.W 46L3 ; 0x341904F8
0x34190372: 9802 LDR R0, [SP, #8]
0x34190374: F241 012C MOVW R1, #0x102C
0x34190378: F2C0 7101 MOVT R1, #0x0701
0x3419037C: 4288 CMP R0, R1
0x3419037E: F000 80BB BEQ.W 46L3 ; 0x341904F8
0x34190382: 9802 LDR R0, [SP, #8]
0x34190384: F241 412C MOVW R1, #0x142C
0x34190388: F2C0 7101 MOVT R1, #0x0701
0x3419038C: 4288 CMP R0, R1
0x3419038E: F000 80B3 BEQ.W 46L3 ; 0x341904F8
0x34190392: 9802 LDR R0, [SP, #8]
0x34190394: F641 012C MOVW R1, #0x182C
0x34190398: F2C0 7101 MOVT R1, #0x0701
0x3419039C: 4288 CMP R0, R1
0x3419039E: F000 80AB BEQ.W 46L3 ; 0x341904F8
0x341903A2: 9802 LDR R0, [SP, #8]
0x341903A4: F640 012C MOVW R1, #0x082C
0x341903A8: F2C0 7102 MOVT R1, #0x0702
0x341903AC: 4288 CMP R0, R1
0x341903AE: F000 80A8 BEQ.W 46L4 ; 0x34190502
0x341903B2: 9802 LDR R0, [SP, #8]
0x341903B4: F640 412C MOVW R1, #0x0C2C
0x341903B8: F2C0 7102 MOVT R1, #0x0702
0x341903BC: 4288 CMP R0, R1
0x341903BE: F000 80A0 BEQ.W 46L4 ; 0x34190502
0x341903C2: 9802 LDR R0, [SP, #8]
0x341903C4: F241 012C MOVW R1, #0x102C
0x341903C8: F2C0 7102 MOVT R1, #0x0702
0x341903CC: 4288 CMP R0, R1
0x341903CE: F000 8098 BEQ.W 46L4 ; 0x34190502
0x341903D2: 9802 LDR R0, [SP, #8]
0x341903D4: F241 412C MOVW R1, #0x142C
0x341903D8: F2C0 7102 MOVT R1, #0x0702
0x341903DC: 4288 CMP R0, R1
0x341903DE: F000 8090 BEQ.W 46L4 ; 0x34190502
0x341903E2: 9802 LDR R0, [SP, #8]
0x341903E4: F641 012C MOVW R1, #0x182C
0x341903E8: F2C0 7102 MOVT R1, #0x0702
0x341903EC: 4288 CMP R0, R1
0x341903EE: F000 8088 BEQ.W 46L4 ; 0x34190502
0x341903F2: 9802 LDR R0, [SP, #8]
0x341903F4: F640 012C MOVW R1, #0x082C
0x341903F8: F2C0 7103 MOVT R1, #0x0703
0x341903FC: 4288 CMP R0, R1
0x341903FE: F000 80BD BEQ.W 46L10 ; 0x3419057C
0x34190402: 9802 LDR R0, [SP, #8]
0x34190404: F640 412C MOVW R1, #0x0C2C
0x34190408: F2C0 7103 MOVT R1, #0x0703
0x3419040C: 4288 CMP R0, R1
0x3419040E: F000 80B5 BEQ.W 46L10 ; 0x3419057C
0x34190412: 9802 LDR R0, [SP, #8]
0x34190414: F241 012C MOVW R1, #0x102C
0x34190418: F2C0 7103 MOVT R1, #0x0703
0x3419041C: 4288 CMP R0, R1
0x3419041E: F000 80AD BEQ.W 46L10 ; 0x3419057C
0x34190422: 9802 LDR R0, [SP, #8]
0x34190424: F241 412C MOVW R1, #0x142C
0x34190428: F2C0 7103 MOVT R1, #0x0703
0x3419042C: 4288 CMP R0, R1
0x3419042E: F000 80A5 BEQ.W 46L10 ; 0x3419057C
0x34190432: 9802 LDR R0, [SP, #8]
0x34190434: F641 012C MOVW R1, #0x182C
0x34190438: F2C0 7103 MOVT R1, #0x0703
0x3419043C: 4288 CMP R0, R1
0x3419043E: F000 809D BEQ.W 46L10 ; 0x3419057C
0x34190442: 9802 LDR R0, [SP, #8]
0x34190444: F640 012C MOVW R1, #0x082C
0x34190448: F2C0 7104 MOVT R1, #0x0704
0x3419044C: 4288 CMP R0, R1
0x3419044E: F000 809C BEQ.W 46L12 ; 0x3419058A
0x34190452: 9802 LDR R0, [SP, #8]
0x34190454: F640 412C MOVW R1, #0x0C2C
0x34190458: F2C0 7104 MOVT R1, #0x0704
0x3419045C: 4288 CMP R0, R1
0x3419045E: F000 8094 BEQ.W 46L12 ; 0x3419058A
0x34190462: 9802 LDR R0, [SP, #8]
0x34190464: F241 012C MOVW R1, #0x102C
0x34190468: F2C0 7104 MOVT R1, #0x0704
0x3419046C: 4288 CMP R0, R1
0x3419046E: F000 808C BEQ.W 46L12 ; 0x3419058A
0x34190472: 9802 LDR R0, [SP, #8]
0x34190474: F241 412C MOVW R1, #0x142C
0x34190478: F2C0 7104 MOVT R1, #0x0704
0x3419047C: 4288 CMP R0, R1
0x3419047E: F000 8084 BEQ.W 46L12 ; 0x3419058A
0x34190482: 9802 LDR R0, [SP, #8]
0x34190484: F641 012C MOVW R1, #0x182C
0x34190488: F2C0 7104 MOVT R1, #0x0704
0x3419048C: 4288 CMP R0, R1
0x3419048E: D07C BEQ 46L12 ; 0x3419058A
0x34190490: 9802 LDR R0, [SP, #8]
0x34190492: F640 012C MOVW R1, #0x082C
0x34190496: F2C0 7105 MOVT R1, #0x0705
0x3419049A: 4288 CMP R0, R1
0x3419049C: D07C BEQ 46L14 ; 0x34190598
0x3419049E: 9802 LDR R0, [SP, #8]
0x341904A0: F640 412C MOVW R1, #0x0C2C
0x341904A4: F2C0 7105 MOVT R1, #0x0705
0x341904A8: 4288 CMP R0, R1
0x341904AA: D075 BEQ 46L14 ; 0x34190598
0x341904AC: 9802 LDR R0, [SP, #8]
0x341904AE: F241 012C MOVW R1, #0x102C
0x341904B2: F2C0 7105 MOVT R1, #0x0705
0x341904B6: 4288 CMP R0, R1
0x341904B8: D06E BEQ 46L14 ; 0x34190598
0x341904BA: 9802 LDR R0, [SP, #8]
0x341904BC: F241 412C MOVW R1, #0x142C
0x341904C0: F2C0 7105 MOVT R1, #0x0705
0x341904C4: 4288 CMP R0, R1
0x341904C6: D067 BEQ 46L14 ; 0x34190598
0x341904C8: 9802 LDR R0, [SP, #8]
0x341904CA: F641 012C MOVW R1, #0x182C
0x341904CE: F2C0 7105 MOVT R1, #0x0705
0x341904D2: 4288 CMP R0, R1
0x341904D4: D060 BEQ 46L14 ; 0x34190598
0x341904D6: E069 B 46L15 ; 0x341905AC
.L1:
0x341904D8: F7FE FEDA BL HAL_RCC_GetSysClockFreq ; 0x3418F290
0x341904DC: F7F9 FBE0 BL RCCEx_GetHCLKFreq ; 0x34189CA0
0x341904E0: F7F9 FE06 BL RCCEx_GetPCLK1Freq ; 0x3418A0F0
0x341904E4: 9004 STR R0, [SP, #16]
0x341904E6: E061 B 46L15 ; 0x341905AC
.L2:
0x341904E8: F7FE FED2 BL HAL_RCC_GetSysClockFreq ; 0x3418F290
0x341904EC: F7F9 FBD8 BL RCCEx_GetHCLKFreq ; 0x34189CA0
0x341904F0: F7F9 FE4A BL RCCEx_GetPCLK4Freq ; 0x3418A188
0x341904F4: 9004 STR R0, [SP, #16]
0x341904F6: E059 B 46L15 ; 0x341905AC
.L3:
0x341904F8: 2007 MOVS R0, #7
0x341904FA: F7F7 FD2F BL RCCEx_GetCLKPCLKFreq ; 0x34187F5C
0x341904FE: 9004 STR R0, [SP, #16]
0x34190500: E054 B 46L15 ; 0x341905AC
.L4:
0x34190502: F7F9 FDDD BL LL_RCC_IC15_IsEnabled ; 0x3418A0C0
0x34190506: B3C0 CBZ R0, .L9 ; 0x3419057A
0x34190508: F000 FB52 BL LL_RCC_IC15_GetDivider ; 0x34190BB0
0x3419050C: 9003 STR R0, [SP, #12]
0x3419050E: F7F9 FDDF BL LL_RCC_IC15_GetSource ; 0x3418A0D0
0x34190512: 4601 MOV R1, R0
0x34190514: 9101 STR R1, [SP, #4]
0x34190516: B160 CBZ R0, .L5 ; 0x34190532
0x34190518: 9801 LDR R0, [SP, #4]
0x3419051A: F1B0 5F80 CMP.W R0, #0x10000000
0x3419051E: D011 BEQ 46L6 ; 0x34190544
0x34190520: 9801 LDR R0, [SP, #4]
0x34190522: F1B0 5F00 CMP.W R0, #0x20000000
0x34190526: D016 BEQ 46L7 ; 0x34190556
0x34190528: 9801 LDR R0, [SP, #4]
0x3419052A: F1B0 5F40 CMP.W R0, #0x30000000
0x3419052E: D01B BEQ 46L8 ; 0x34190568
0x34190530: E023 B 46L9 ; 0x3419057A
.L5:
0x34190532: F000 FA29 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x34190988
0x34190536: 9004 STR R0, [SP, #16]
0x34190538: 9804 LDR R0, [SP, #16]
0x3419053A: 9903 LDR R1, [SP, #12]
0x3419053C: FBB0 F0F1 UDIV R0, R0, R1
0x34190540: 9004 STR R0, [SP, #16]
0x34190542: E01A B 46L9 ; 0x3419057A
.L6:
0x34190544: F000 FA62 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34190A0C
0x34190548: 9004 STR R0, [SP, #16]
0x3419054A: 9804 LDR R0, [SP, #16]
0x3419054C: 9903 LDR R1, [SP, #12]
0x3419054E: FBB0 F0F1 UDIV R0, R0, R1
0x34190552: 9004 STR R0, [SP, #16]
0x34190554: E011 B 46L9 ; 0x3419057A
.L7:
0x34190556: F000 FA9B BL HAL_RCCEx_GetPLL3CLKFreq ; 0x34190A90
0x3419055A: 9004 STR R0, [SP, #16]
0x3419055C: 9804 LDR R0, [SP, #16]
0x3419055E: 9903 LDR R1, [SP, #12]
0x34190560: FBB0 F0F1 UDIV R0, R0, R1
0x34190564: 9004 STR R0, [SP, #16]
0x34190566: E008 B 46L9 ; 0x3419057A
.L8:
0x34190568: F000 FAD4 BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34190B14
0x3419056C: 9004 STR R0, [SP, #16]
0x3419056E: 9804 LDR R0, [SP, #16]
0x34190570: 9903 LDR R1, [SP, #12]
0x34190572: FBB0 F0F1 UDIV R0, R0, R1
0x34190576: 9004 STR R0, [SP, #16]
0x34190578: E7FF B 46L9 ; 0x3419057A
.L9:
0x3419057A: E017 B 46L15 ; 0x341905AC
.L10:
0x3419057C: F7F7 FA0A BL LL_RCC_LSE_IsReady.56 ; 0x34187994
0x34190580: B110 CBZ R0, .L11 ; 0x34190588
0x34190582: F44F 4000 MOV.W R0, #0x8000
0x34190586: 9004 STR R0, [SP, #16]
.L11:
0x34190588: E010 B 46L15 ; 0x341905AC
.L12:
0x3419058A: F7F9 FE43 BL LL_RCC_LSI_IsReady.91 ; 0x3418A214
0x3419058E: B110 CBZ R0, .L13 ; 0x34190596
0x34190590: F44F 40FA MOV.W R0, #0x7D00
0x34190594: 9004 STR R0, [SP, #16]
.L13:
0x34190596: E009 B 46L15 ; 0x341905AC
.L14:
0x34190598: F7FE FE7A BL HAL_RCC_GetSysClockFreq ; 0x3418F290
0x3419059C: 9000 STR R0, [SP, #0]
0x3419059E: F7F7 FBE3 BL LL_RCC_GetTIMPrescaler ; 0x34187D68
0x341905A2: 4601 MOV R1, R0
0x341905A4: 9800 LDR R0, [SP, #0]
0x341905A6: 40C8 LSRS R0, R1
0x341905A8: 9004 STR R0, [SP, #16]
0x341905AA: E7FF B 46L15 ; 0x341905AC
.L15:
0x341905AC: 9804 LDR R0, [SP, #16]
0x341905AE: B006 ADD SP, SP, #24
0x341905B0: BD80 POP 123R7, PC}
Section .init.GPDMA1_Channel6_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
GPDMA1_Channel6_IRQHandler:
0x341905B2: E7FE B GPDMA1_Channel6_IRQHandler ; 0x341905B2
Section .text.RCCEx_GetPSSICLKFreq from blto2_FSBL_lto.o, size=218, align=4
RCCEx_GetPSSICLKFreq:
0x341905B4: B580 PUSH 123R7, LR}
0x341905B6: B086 SUB SP, SP, #24
0x341905B8: 9005 STR R0, [SP, #20]
0x341905BA: 2000 MOVS R0, #0
0x341905BC: 9004 STR R0, [SP, #16]
0x341905BE: 9805 LDR R0, [SP, #20]
0x341905C0: F7FE FF58 BL LL_RCC_GetPSSIClockSource ; 0x3418F474
0x341905C4: 4601 MOV R1, R0
0x341905C6: 9102 STR R1, [SP, #8]
0x341905C8: B148 CBZ R0, .L1 ; 0x341905DE
0x341905CA: 9802 LDR R0, [SP, #8]
0x341905CC: 2810 CMP R0, #16
0x341905CE: D00C BEQ 46L2 ; 0x341905EA
0x341905D0: 9802 LDR R0, [SP, #8]
0x341905D2: 2820 CMP R0, #32
0x341905D4: D00E BEQ 46L3 ; 0x341905F4
0x341905D6: 9802 LDR R0, [SP, #8]
0x341905D8: 2830 CMP R0, #48
0x341905DA: D048 BEQ 46L9 ; 0x3419066E
0x341905DC: E054 B 46L11 ; 0x34190688
.L1:
0x341905DE: F7FE FE57 BL HAL_RCC_GetSysClockFreq ; 0x3418F290
0x341905E2: F7F9 FB5D BL RCCEx_GetHCLKFreq ; 0x34189CA0
0x341905E6: 9004 STR R0, [SP, #16]
0x341905E8: E04E B 46L11 ; 0x34190688
.L2:
0x341905EA: 2007 MOVS R0, #7
0x341905EC: F7F7 FCB6 BL RCCEx_GetCLKPCLKFreq ; 0x34187F5C
0x341905F0: 9004 STR R0, [SP, #16]
0x341905F2: E049 B 46L11 ; 0x34190688
.L3:
0x341905F4: F7F9 FE16 BL LL_RCC_IC20_IsEnabled ; 0x3418A224
0x341905F8: B3C0 CBZ R0, .L8 ; 0x3419066C
0x341905FA: F000 FB21 BL LL_RCC_IC20_GetDivider ; 0x34190C40
0x341905FE: 9003 STR R0, [SP, #12]
0x34190600: F7F9 FE18 BL LL_RCC_IC20_GetSource ; 0x3418A234
0x34190604: 4601 MOV R1, R0
0x34190606: 9101 STR R1, [SP, #4]
0x34190608: B160 CBZ R0, .L4 ; 0x34190624
0x3419060A: 9801 LDR R0, [SP, #4]
0x3419060C: F1B0 5F80 CMP.W R0, #0x10000000
0x34190610: D011 BEQ 46L5 ; 0x34190636
0x34190612: 9801 LDR R0, [SP, #4]
0x34190614: F1B0 5F00 CMP.W R0, #0x20000000
0x34190618: D016 BEQ 46L6 ; 0x34190648
0x3419061A: 9801 LDR R0, [SP, #4]
0x3419061C: F1B0 5F40 CMP.W R0, #0x30000000
0x34190620: D01B BEQ 46L7 ; 0x3419065A
0x34190622: E023 B 46L8 ; 0x3419066C
.L4:
0x34190624: F000 F9B0 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x34190988
0x34190628: 9004 STR R0, [SP, #16]
0x3419062A: 9804 LDR R0, [SP, #16]
0x3419062C: 9903 LDR R1, [SP, #12]
0x3419062E: FBB0 F0F1 UDIV R0, R0, R1
0x34190632: 9004 STR R0, [SP, #16]
0x34190634: E01A B 46L8 ; 0x3419066C
.L5:
0x34190636: F000 F9E9 BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34190A0C
0x3419063A: 9004 STR R0, [SP, #16]
0x3419063C: 9804 LDR R0, [SP, #16]
0x3419063E: 9903 LDR R1, [SP, #12]
0x34190640: FBB0 F0F1 UDIV R0, R0, R1
0x34190644: 9004 STR R0, [SP, #16]
0x34190646: E011 B 46L8 ; 0x3419066C
.L6:
0x34190648: F000 FA22 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x34190A90
0x3419064C: 9004 STR R0, [SP, #16]
0x3419064E: 9804 LDR R0, [SP, #16]
0x34190650: 9903 LDR R1, [SP, #12]
0x34190652: FBB0 F0F1 UDIV R0, R0, R1
0x34190656: 9004 STR R0, [SP, #16]
0x34190658: E008 B 46L8 ; 0x3419066C
.L7:
0x3419065A: F000 FA5B BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34190B14
0x3419065E: 9004 STR R0, [SP, #16]
0x34190660: 9804 LDR R0, [SP, #16]
0x34190662: 9903 LDR R1, [SP, #12]
0x34190664: FBB0 F0F1 UDIV R0, R0, R1
0x34190668: 9004 STR R0, [SP, #16]
0x3419066A: E7FF B 46L8 ; 0x3419066C
.L8:
0x3419066C: E00C B 46L11 ; 0x34190688
.L9:
0x3419066E: F7F9 FC17 BL LL_RCC_HSI_IsReady.74 ; 0x34189EA0
0x34190672: B140 CBZ R0, .L10 ; 0x34190686
0x34190674: F7F9 FC1C BL LL_RCC_HSI_GetDivider.75 ; 0x34189EB0
0x34190678: 09C1 LSRS R1, R0, #7
0x3419067A: F249 0000 MOVW R0, #0x9000
0x3419067E: F2C0 30D0 MOVT R0, #0x03D0
0x34190682: 40C8 LSRS R0, R1
0x34190684: 9004 STR R0, [SP, #16]
.L10:
0x34190686: E7FF B 46L11 ; 0x34190688
.L11:
0x34190688: 9804 LDR R0, [SP, #16]
0x3419068A: B006 ADD SP, SP, #24
0x3419068C: BD80 POP 123R7, PC}
Section .init.GPDMA1_Channel7_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
GPDMA1_Channel7_IRQHandler:
0x3419068E: E7FE B GPDMA1_Channel7_IRQHandler ; 0x3419068E
Section .text.RCCEx_GetRTCCLKFreq from blto2_FSBL_lto.o, size=126, align=4
RCCEx_GetRTCCLKFreq:
0x34190690: B580 PUSH 123R7, LR}
0x34190692: B084 SUB SP, SP, #16
0x34190694: 2000 MOVS R0, #0
0x34190696: 9003 STR R0, [SP, #12]
0x34190698: F7F7 F974 BL LL_RCC_GetRTCClockSource ; 0x34187984
0x3419069C: 4601 MOV R1, R0
0x3419069E: 9101 STR R1, [SP, #4]
0x341906A0: B160 CBZ R0, .L1 ; 0x341906BC
0x341906A2: 9801 LDR R0, [SP, #4]
0x341906A4: F5B0 7F80 CMP.W R0, #0x0100
0x341906A8: D009 BEQ 46L2 ; 0x341906BE
0x341906AA: 9801 LDR R0, [SP, #4]
0x341906AC: F5B0 7F00 CMP.W R0, #0x0200
0x341906B0: D00C BEQ 46L4 ; 0x341906CC
0x341906B2: 9801 LDR R0, [SP, #4]
0x341906B4: F5B0 7F40 CMP.W R0, #0x0300
0x341906B8: D00F BEQ 46L6 ; 0x341906DA
0x341906BA: E025 B 46L8 ; 0x34190708
.L1:
0x341906BC: E024 B 46L8 ; 0x34190708
.L2:
0x341906BE: F7F7 F969 BL LL_RCC_LSE_IsReady.56 ; 0x34187994
0x341906C2: B110 CBZ R0, .L3 ; 0x341906CA
0x341906C4: F44F 4000 MOV.W R0, #0x8000
0x341906C8: 9003 STR R0, [SP, #12]
.L3:
0x341906CA: E01D B 46L8 ; 0x34190708
.L4:
0x341906CC: F7F9 FDA2 BL LL_RCC_LSI_IsReady.91 ; 0x3418A214
0x341906D0: B110 CBZ R0, .L5 ; 0x341906D8
0x341906D2: F44F 40FA MOV.W R0, #0x7D00
0x341906D6: 9003 STR R0, [SP, #12]
.L5:
0x341906D8: E016 B 46L8 ; 0x34190708
.L6:
0x341906DA: F7F9 FC01 BL LL_RCC_HSE_IsReady.77 ; 0x34189EE0
0x341906DE: B190 CBZ R0, .L7 ; 0x34190706
0x341906E0: F248 105C MOVW R0, #0x815C
0x341906E4: F2C5 6002 MOVT R0, #0x5602
0x341906E8: 6800 LDR R0, [R0]
0x341906EA: F400 317C AND R1, R0, #0x03F000
0x341906EE: 2001 MOVS R0, #1
0x341906F0: EB00 3011 ADD.W R0, R0, R1, LSR #12
0x341906F4: 9002 STR R0, [SP, #8]
0x341906F6: 9902 LDR R1, [SP, #8]
0x341906F8: F646 4000 MOVW R0, #0x6C00
0x341906FC: F2C0 20DC MOVT R0, #0x02DC
0x34190700: FBB0 F0F1 UDIV R0, R0, R1
0x34190704: 9003 STR R0, [SP, #12]
.L7:
0x34190706: E7FF B 46L8 ; 0x34190708
.L8:
0x34190708: 9803 LDR R0, [SP, #12]
0x3419070A: B004 ADD SP, SP, #16
0x3419070C: BD80 POP 123R7, PC}
Section .init.GPDMA1_Channel8_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
GPDMA1_Channel8_IRQHandler:
0x3419070E: E7FE B GPDMA1_Channel8_IRQHandler ; 0x3419070E
Section .text.RCCEx_GetSAICLKFreq from blto2_FSBL_lto.o, size=606, align=4
RCCEx_GetSAICLKFreq:
0x34190710: B580 PUSH 123R7, LR}
0x34190712: B086 SUB SP, SP, #24
0x34190714: 9005 STR R0, [SP, #20]
0x34190716: 2000 MOVS R0, #0
0x34190718: 9004 STR R0, [SP, #16]
0x3419071A: 9805 LDR R0, [SP, #20]
0x3419071C: F7F7 FB0C BL LL_RCC_GetSAIClockSource ; 0x34187D38
0x34190720: 4601 MOV R1, R0
0x34190722: 9102 STR R1, [SP, #8]
0x34190724: F241 4118 MOVW R1, #0x1418
0x34190728: F2C0 7100 MOVT R1, #0x0700
0x3419072C: 4288 CMP R0, R1
0x3419072E: D073 BEQ 46L1 ; 0x34190818
0x34190730: 9802 LDR R0, [SP, #8]
0x34190732: F641 0118 MOVW R1, #0x1818
0x34190736: F2C0 7100 MOVT R1, #0x0700
0x3419073A: 4288 CMP R0, R1
0x3419073C: D06C BEQ 46L1 ; 0x34190818
0x3419073E: 9802 LDR R0, [SP, #8]
0x34190740: F241 4118 MOVW R1, #0x1418
0x34190744: F2C0 7101 MOVT R1, #0x0701
0x34190748: 4288 CMP R0, R1
0x3419074A: D06D BEQ 46L2 ; 0x34190828
0x3419074C: 9802 LDR R0, [SP, #8]
0x3419074E: F641 0118 MOVW R1, #0x1818
0x34190752: F2C0 7101 MOVT R1, #0x0701
0x34190756: 4288 CMP R0, R1
0x34190758: D066 BEQ 46L2 ; 0x34190828
0x3419075A: 9802 LDR R0, [SP, #8]
0x3419075C: F241 4118 MOVW R1, #0x1418
0x34190760: F2C0 7102 MOVT R1, #0x0702
0x34190764: 4288 CMP R0, R1
0x34190766: D064 BEQ 46L3 ; 0x34190832
0x34190768: 9802 LDR R0, [SP, #8]
0x3419076A: F641 0118 MOVW R1, #0x1818
0x3419076E: F2C0 7102 MOVT R1, #0x0702
0x34190772: 4288 CMP R0, R1
0x34190774: D05D BEQ 46L3 ; 0x34190832
0x34190776: 9802 LDR R0, [SP, #8]
0x34190778: F241 4118 MOVW R1, #0x1418
0x3419077C: F2C0 7103 MOVT R1, #0x0703
0x34190780: 4288 CMP R0, R1
0x34190782: F000 8093 BEQ.W 46L9 ; 0x341908AC
0x34190786: 9802 LDR R0, [SP, #8]
0x34190788: F641 0118 MOVW R1, #0x1818
0x3419078C: F2C0 7103 MOVT R1, #0x0703
0x34190790: 4288 CMP R0, R1
0x34190792: F000 808B BEQ.W 46L9 ; 0x341908AC
0x34190796: 9802 LDR R0, [SP, #8]
0x34190798: F241 4118 MOVW R1, #0x1418
0x3419079C: F2C0 7104 MOVT R1, #0x0704
0x341907A0: 4288 CMP R0, R1
0x341907A2: F000 80CD BEQ.W 46L17 ; 0x34190940
0x341907A6: 9802 LDR R0, [SP, #8]
0x341907A8: F641 0118 MOVW R1, #0x1818
0x341907AC: F2C0 7104 MOVT R1, #0x0704
0x341907B0: 4288 CMP R0, R1
0x341907B2: F000 80C5 BEQ.W 46L17 ; 0x34190940
0x341907B6: 9802 LDR R0, [SP, #8]
0x341907B8: F241 4118 MOVW R1, #0x1418
0x341907BC: F2C0 7105 MOVT R1, #0x0705
0x341907C0: 4288 CMP R0, R1
0x341907C2: F000 80B0 BEQ.W 46L15 ; 0x34190926
0x341907C6: 9802 LDR R0, [SP, #8]
0x341907C8: F641 0118 MOVW R1, #0x1818
0x341907CC: F2C0 7105 MOVT R1, #0x0705
0x341907D0: 4288 CMP R0, R1
0x341907D2: F000 80A8 BEQ.W 46L15 ; 0x34190926
0x341907D6: 9802 LDR R0, [SP, #8]
0x341907D8: F241 4118 MOVW R1, #0x1418
0x341907DC: F2C0 7106 MOVT R1, #0x0706
0x341907E0: 4288 CMP R0, R1
0x341907E2: F000 80B6 BEQ.W 46L19 ; 0x34190952
0x341907E6: 9802 LDR R0, [SP, #8]
0x341907E8: F641 0118 MOVW R1, #0x1818
0x341907EC: F2C0 7106 MOVT R1, #0x0706
0x341907F0: 4288 CMP R0, R1
0x341907F2: F000 80AE BEQ.W 46L19 ; 0x34190952
0x341907F6: 9802 LDR R0, [SP, #8]
0x341907F8: F241 4118 MOVW R1, #0x1418
0x341907FC: F2C0 7107 MOVT R1, #0x0707
0x34190800: 4288 CMP R0, R1
0x34190802: F000 80AC BEQ.W 46L20 ; 0x3419095E
0x34190806: 9802 LDR R0, [SP, #8]
0x34190808: F641 0118 MOVW R1, #0x1818
0x3419080C: F2C0 7107 MOVT R1, #0x0707
0x34190810: 4288 CMP R0, R1
0x34190812: F000 80A4 BEQ.W 46L20 ; 0x3419095E
0x34190816: E0A7 B 46L21 ; 0x34190968
.L1:
0x34190818: F7FE FD3A BL HAL_RCC_GetSysClockFreq ; 0x3418F290
0x3419081C: F7F9 FA40 BL RCCEx_GetHCLKFreq ; 0x34189CA0
0x34190820: F7F9 FC74 BL RCCEx_GetPCLK2Freq ; 0x3418A10C
0x34190824: 9004 STR R0, [SP, #16]
0x34190826: E09F B 46L21 ; 0x34190968
.L2:
0x34190828: 2007 MOVS R0, #7
0x3419082A: F7F7 FB97 BL RCCEx_GetCLKPCLKFreq ; 0x34187F5C
0x3419082E: 9004 STR R0, [SP, #16]
0x34190830: E09A B 46L21 ; 0x34190968
.L3:
0x34190832: F7F9 FCCF BL LL_RCC_IC7_IsEnabled ; 0x3418A1D4
0x34190836: B3C0 CBZ R0, .L8 ; 0x341908AA
0x34190838: F000 F9EA BL LL_RCC_IC7_GetDivider ; 0x34190C10
0x3419083C: 9003 STR R0, [SP, #12]
0x3419083E: F7F9 FCD1 BL LL_RCC_IC7_GetSource ; 0x3418A1E4
0x34190842: 4601 MOV R1, R0
0x34190844: 9101 STR R1, [SP, #4]
0x34190846: B160 CBZ R0, .L4 ; 0x34190862
0x34190848: 9801 LDR R0, [SP, #4]
0x3419084A: F1B0 5F80 CMP.W R0, #0x10000000
0x3419084E: D011 BEQ 46L5 ; 0x34190874
0x34190850: 9801 LDR R0, [SP, #4]
0x34190852: F1B0 5F00 CMP.W R0, #0x20000000
0x34190856: D016 BEQ 46L6 ; 0x34190886
0x34190858: 9801 LDR R0, [SP, #4]
0x3419085A: F1B0 5F40 CMP.W R0, #0x30000000
0x3419085E: D01B BEQ 46L7 ; 0x34190898
0x34190860: E023 B 46L8 ; 0x341908AA
.L4:
0x34190862: F000 F891 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x34190988
0x34190866: 9004 STR R0, [SP, #16]
0x34190868: 9804 LDR R0, [SP, #16]
0x3419086A: 9903 LDR R1, [SP, #12]
0x3419086C: FBB0 F0F1 UDIV R0, R0, R1
0x34190870: 9004 STR R0, [SP, #16]
0x34190872: E01A B 46L8 ; 0x341908AA
.L5:
0x34190874: F000 F8CA BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34190A0C
0x34190878: 9004 STR R0, [SP, #16]
0x3419087A: 9804 LDR R0, [SP, #16]
0x3419087C: 9903 LDR R1, [SP, #12]
0x3419087E: FBB0 F0F1 UDIV R0, R0, R1
0x34190882: 9004 STR R0, [SP, #16]
0x34190884: E011 B 46L8 ; 0x341908AA
.L6:
0x34190886: F000 F903 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x34190A90
0x3419088A: 9004 STR R0, [SP, #16]
0x3419088C: 9804 LDR R0, [SP, #16]
0x3419088E: 9903 LDR R1, [SP, #12]
0x34190890: FBB0 F0F1 UDIV R0, R0, R1
0x34190894: 9004 STR R0, [SP, #16]
0x34190896: E008 B 46L8 ; 0x341908AA
.L7:
0x34190898: F000 F93C BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34190B14
0x3419089C: 9004 STR R0, [SP, #16]
0x3419089E: 9804 LDR R0, [SP, #16]
0x341908A0: 9903 LDR R1, [SP, #12]
0x341908A2: FBB0 F0F1 UDIV R0, R0, R1
0x341908A6: 9004 STR R0, [SP, #16]
0x341908A8: E7FF B 46L8 ; 0x341908AA
.L8:
0x341908AA: E05D B 46L21 ; 0x34190968
.L9:
0x341908AC: F7F9 FC7A BL LL_RCC_IC8_IsEnabled ; 0x3418A1A4
0x341908B0: B3C0 CBZ R0, .L14 ; 0x34190924
0x341908B2: F000 F9A1 BL LL_RCC_IC8_GetDivider ; 0x34190BF8
0x341908B6: 9003 STR R0, [SP, #12]
0x341908B8: F7F9 FC7C BL LL_RCC_IC8_GetSource ; 0x3418A1B4
0x341908BC: 4601 MOV R1, R0
0x341908BE: 9100 STR R1, [SP, #0]
0x341908C0: B160 CBZ R0, .L10 ; 0x341908DC
0x341908C2: 9800 LDR R0, [SP, #0]
0x341908C4: F1B0 5F80 CMP.W R0, #0x10000000
0x341908C8: D011 BEQ 46L11 ; 0x341908EE
0x341908CA: 9800 LDR R0, [SP, #0]
0x341908CC: F1B0 5F00 CMP.W R0, #0x20000000
0x341908D0: D016 BEQ 46L12 ; 0x34190900
0x341908D2: 9800 LDR R0, [SP, #0]
0x341908D4: F1B0 5F40 CMP.W R0, #0x30000000
0x341908D8: D01B BEQ 46L13 ; 0x34190912
0x341908DA: E023 B 46L14 ; 0x34190924
.L10:
0x341908DC: F000 F854 BL HAL_RCCEx_GetPLL1CLKFreq ; 0x34190988
0x341908E0: 9004 STR R0, [SP, #16]
0x341908E2: 9804 LDR R0, [SP, #16]
0x341908E4: 9903 LDR R1, [SP, #12]
0x341908E6: FBB0 F0F1 UDIV R0, R0, R1
0x341908EA: 9004 STR R0, [SP, #16]
0x341908EC: E01A B 46L14 ; 0x34190924
.L11:
0x341908EE: F000 F88D BL HAL_RCCEx_GetPLL2CLKFreq ; 0x34190A0C
0x341908F2: 9004 STR R0, [SP, #16]
0x341908F4: 9804 LDR R0, [SP, #16]
0x341908F6: 9903 LDR R1, [SP, #12]
0x341908F8: FBB0 F0F1 UDIV R0, R0, R1
0x341908FC: 9004 STR R0, [SP, #16]
0x341908FE: E011 B 46L14 ; 0x34190924
.L12:
0x34190900: F000 F8C6 BL HAL_RCCEx_GetPLL3CLKFreq ; 0x34190A90
0x34190904: 9004 STR R0, [SP, #16]
0x34190906: 9804 LDR R0, [SP, #16]
0x34190908: 9903 LDR R1, [SP, #12]
0x3419090A: FBB0 F0F1 UDIV R0, R0, R1
0x3419090E: 9004 STR R0, [SP, #16]
0x34190910: E008 B 46L14 ; 0x34190924
.L13:
0x34190912: F000 F8FF BL HAL_RCCEx_GetPLL4CLKFreq ; 0x34190B14
0x34190916: 9004 STR R0, [SP, #16]
0x34190918: 9804 LDR R0, [SP, #16]
0x3419091A: 9903 LDR R1, [SP, #12]
0x3419091C: FBB0 F0F1 UDIV R0, R0, R1
0x34190920: 9004 STR R0, [SP, #16]
0x34190922: E7FF B 46L14 ; 0x34190924
.L14:
0x34190924: E020 B 46L21 ; 0x34190968
.L15:
0x34190926: F7F9 FABB BL LL_RCC_HSI_IsReady.74 ; 0x34189EA0
0x3419092A: B140 CBZ R0, .L16 ; 0x3419093E
0x3419092C: F7F9 FAC0 BL LL_RCC_HSI_GetDivider.75 ; 0x34189EB0
0x34190930: 09C1 LSRS R1, R0, #7
0x34190932: F249 0000 MOVW R0, #0x9000
0x34190936: F2C0 30D0 MOVT R0, #0x03D0
0x3419093A: 40C8 LSRS R0, R1
0x3419093C: 9004 STR R0, [SP, #16]
.L16:
0x3419093E: E013 B 46L21 ; 0x34190968
.L17:
0x34190940: F7F9 FABE BL LL_RCC_MSI_IsReady.76 ; 0x34189EC0
0x34190944: B120 CBZ R0, .L18 ; 0x34190950
0x34190946: F640 1000 MOVW R0, #0x0900
0x3419094A: F2C0 003D MOVT R0, #61
0x3419094E: 9004 STR R0, [SP, #16]
.L18:
0x34190950: E00A B 46L21 ; 0x34190968
.L19:
0x34190952: F248 0000 MOVW R0, #0x8000
0x34190956: F2C0 00BB MOVT R0, #187
0x3419095A: 9004 STR R0, [SP, #16]
0x3419095C: E004 B 46L21 ; 0x34190968
.L20:
0x3419095E: 2007 MOVS R0, #7
0x34190960: F7F8 F92C BL RCCEx_GetSPDIFRXCLKFreq ; 0x34188BBC
0x34190964: 9004 STR R0, [SP, #16]
0x34190966: E7FF B 46L21 ; 0x34190968
.L21:
0x34190968: 9804 LDR R0, [SP, #16]
0x3419096A: B006 ADD SP, SP, #24
0x3419096C: BD80 POP 123R7, PC}
Section .init.GPDMA1_Channel9_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
GPDMA1_Channel9_IRQHandler:
0x3419096E: E7FE B GPDMA1_Channel9_IRQHandler ; 0x3419096E
Section .text.LL_RCC_IC3_GetDivider from blto2_FSBL_lto.o, size=22, align=4
LL_RCC_IC3_GetDivider:
0x34190970: F248 00CC MOVW R0, #0x80CC
0x34190974: F2C5 6002 MOVT R0, #0x5602
0x34190978: 6800 LDR R0, [R0]
0x3419097A: F400 017F AND R1, R0, #0xFF0000
0x3419097E: 2001 MOVS R0, #1
0x34190980: EB00 4011 ADD.W R0, R0, R1, LSR #16
0x34190984: 4770 BX LR
Section .init.GPDMA1_Channel10_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
GPDMA1_Channel10_IRQHandler:
0x34190986: E7FE B GPDMA1_Channel10_IRQHandler ; 0x34190986
Section .text.HAL_RCCEx_GetPLL1CLKFreq from blto2_FSBL_lto.o, size=130, align=4
HAL_RCCEx_GetPLL1CLKFreq:
0x34190988: B510 PUSH 123R4, LR}
0x3419098A: B08A SUB SP, SP, #40
0x3419098C: 2000 MOVS R0, #0
0x3419098E: 9009 STR R0, [SP, #36]
0x34190990: F7F9 FB3E BL LL_RCC_PLL1_IsReady.84 ; 0x3418A010
0x34190994: B368 CBZ R0, .L2 ; 0x341909F2
0x34190996: F7F9 FB43 BL LL_RCC_PLL1P_IsEnabled ; 0x3418A020
0x3419099A: B348 CBZ R0, .L1 ; 0x341909F0
0x3419099C: F7F9 FB48 BL LL_RCC_PLL1_GetSource.85 ; 0x3418A030
0x341909A0: F7F9 F9C4 BL RCCEx_GetPLLSourceFreq ; 0x34189D2C
0x341909A4: 9007 STR R0, [SP, #28]
0x341909A6: 9807 LDR R0, [SP, #28]
0x341909A8: B310 CBZ R0, .L1 ; 0x341909F0
0x341909AA: F7F9 FB49 BL LL_RCC_PLL1_GetM ; 0x3418A040
0x341909AE: 9008 STR R0, [SP, #32]
0x341909B0: 9808 LDR R0, [SP, #32]
0x341909B2: B1E8 CBZ R0, .L1 ; 0x341909F0
0x341909B4: 9807 LDR R0, [SP, #28]
0x341909B6: 9006 STR R0, [SP, #24]
0x341909B8: 9808 LDR R0, [SP, #32]
0x341909BA: 9003 STR R0, [SP, #12]
0x341909BC: F7F9 FB48 BL LL_RCC_PLL1_GetN ; 0x3418A050
0x341909C0: 9004 STR R0, [SP, #16]
0x341909C2: F7F9 FB4D BL LL_RCC_PLL1_GetFRACN ; 0x3418A060
0x341909C6: 9005 STR R0, [SP, #20]
0x341909C8: F7F9 FB52 BL LL_RCC_PLL1_GetP1 ; 0x3418A070
0x341909CC: 9002 STR R0, [SP, #8]
0x341909CE: F7F9 FB57 BL LL_RCC_PLL1_GetP2 ; 0x3418A080
0x341909D2: F8DD C008 LDR.W R12, [SP, #8]
0x341909D6: 9903 LDR R1, [SP, #12]
0x341909D8: 9A04 LDR R2, [SP, #16]
0x341909DA: 9B05 LDR R3, [SP, #20]
0x341909DC: 4604 MOV R4, R0
0x341909DE: 9806 LDR R0, [SP, #24]
0x341909E0: 46EE MOV LR, SP
0x341909E2: F8CE 4004 STR.W R4, [LR, #4]
0x341909E6: F8CE C000 STR.W R12, [LR]
0x341909EA: F7F9 FA0D BL RCCEx_CalcPLLFreq ; 0x34189E08
0x341909EE: 9009 STR R0, [SP, #36]
.L1:
0x341909F0: E008 B 46L3 ; 0x34190A04
.L2:
0x341909F2: F7F9 FB4D BL LL_RCC_PLL1_IsEnabledBypass.86 ; 0x3418A090
0x341909F6: B128 CBZ R0, .L3 ; 0x34190A04
0x341909F8: F7F9 FB1A BL LL_RCC_PLL1_GetSource.85 ; 0x3418A030
0x341909FC: F7F9 F996 BL RCCEx_GetPLLSourceFreq ; 0x34189D2C
0x34190A00: 9009 STR R0, [SP, #36]
0x34190A02: E7FF B 46L3 ; 0x34190A04
.L3:
0x34190A04: 9809 LDR R0, [SP, #36]
0x34190A06: B00A ADD SP, SP, #40
0x34190A08: BD10 POP 123R4, PC}
Section .init.GPDMA1_Channel11_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
GPDMA1_Channel11_IRQHandler:
0x34190A0A: E7FE B GPDMA1_Channel11_IRQHandler ; 0x34190A0A
Section .text.HAL_RCCEx_GetPLL2CLKFreq from blto2_FSBL_lto.o, size=130, align=4
HAL_RCCEx_GetPLL2CLKFreq:
0x34190A0C: B510 PUSH 123R4, LR}
0x34190A0E: B08A SUB SP, SP, #40
0x34190A10: 2000 MOVS R0, #0
0x34190A12: 9009 STR R0, [SP, #36]
0x34190A14: F7F9 FAB4 BL LL_RCC_PLL2_IsReady.81 ; 0x34189F80
0x34190A18: B368 CBZ R0, .L2 ; 0x34190A76
0x34190A1A: F7F9 FAB9 BL LL_RCC_PLL2P_IsEnabled ; 0x34189F90
0x34190A1E: B348 CBZ R0, .L1 ; 0x34190A74
0x34190A20: F7F9 FABE BL LL_RCC_PLL2_GetSource.82 ; 0x34189FA0
0x34190A24: F7F9 F982 BL RCCEx_GetPLLSourceFreq ; 0x34189D2C
0x34190A28: 9007 STR R0, [SP, #28]
0x34190A2A: 9807 LDR R0, [SP, #28]
0x34190A2C: B310 CBZ R0, .L1 ; 0x34190A74
0x34190A2E: F7F9 FABF BL LL_RCC_PLL2_GetM ; 0x34189FB0
0x34190A32: 9008 STR R0, [SP, #32]
0x34190A34: 9808 LDR R0, [SP, #32]
0x34190A36: B1E8 CBZ R0, .L1 ; 0x34190A74
0x34190A38: 9807 LDR R0, [SP, #28]
0x34190A3A: 9006 STR R0, [SP, #24]
0x34190A3C: 9808 LDR R0, [SP, #32]
0x34190A3E: 9003 STR R0, [SP, #12]
0x34190A40: F7F9 FABE BL LL_RCC_PLL2_GetN ; 0x34189FC0
0x34190A44: 9004 STR R0, [SP, #16]
0x34190A46: F7F9 FAC3 BL LL_RCC_PLL2_GetFRACN ; 0x34189FD0
0x34190A4A: 9005 STR R0, [SP, #20]
0x34190A4C: F7F9 FAC8 BL LL_RCC_PLL2_GetP1 ; 0x34189FE0
0x34190A50: 9002 STR R0, [SP, #8]
0x34190A52: F7F9 FACD BL LL_RCC_PLL2_GetP2 ; 0x34189FF0
0x34190A56: F8DD C008 LDR.W R12, [SP, #8]
0x34190A5A: 9903 LDR R1, [SP, #12]
0x34190A5C: 9A04 LDR R2, [SP, #16]
0x34190A5E: 9B05 LDR R3, [SP, #20]
0x34190A60: 4604 MOV R4, R0
0x34190A62: 9806 LDR R0, [SP, #24]
0x34190A64: 46EE MOV LR, SP
0x34190A66: F8CE 4004 STR.W R4, [LR, #4]
0x34190A6A: F8CE C000 STR.W R12, [LR]
0x34190A6E: F7F9 F9CB BL RCCEx_CalcPLLFreq ; 0x34189E08
0x34190A72: 9009 STR R0, [SP, #36]
.L1:
0x34190A74: E008 B 46L3 ; 0x34190A88
.L2:
0x34190A76: F7F9 FAC3 BL LL_RCC_PLL2_IsEnabledBypass.83 ; 0x3418A000
0x34190A7A: B128 CBZ R0, .L3 ; 0x34190A88
0x34190A7C: F7F9 FA90 BL LL_RCC_PLL2_GetSource.82 ; 0x34189FA0
0x34190A80: F7F9 F954 BL RCCEx_GetPLLSourceFreq ; 0x34189D2C
0x34190A84: 9009 STR R0, [SP, #36]
0x34190A86: E7FF B 46L3 ; 0x34190A88
.L3:
0x34190A88: 9809 LDR R0, [SP, #36]
0x34190A8A: B00A ADD SP, SP, #40
0x34190A8C: BD10 POP 123R4, PC}
Section .init.GPDMA1_Channel12_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
GPDMA1_Channel12_IRQHandler:
0x34190A8E: E7FE B GPDMA1_Channel12_IRQHandler ; 0x34190A8E
Section .text.HAL_RCCEx_GetPLL3CLKFreq from blto2_FSBL_lto.o, size=130, align=4
HAL_RCCEx_GetPLL3CLKFreq:
0x34190A90: B510 PUSH 123R4, LR}
0x34190A92: B08A SUB SP, SP, #40
0x34190A94: 2000 MOVS R0, #0
0x34190A96: 9009 STR R0, [SP, #36]
0x34190A98: F7F9 FA2A BL LL_RCC_PLL3_IsReady.78 ; 0x34189EF0
0x34190A9C: B368 CBZ R0, .L2 ; 0x34190AFA
0x34190A9E: F7F9 FA2F BL LL_RCC_PLL3P_IsEnabled ; 0x34189F00
0x34190AA2: B348 CBZ R0, .L1 ; 0x34190AF8
0x34190AA4: F7F9 FA34 BL LL_RCC_PLL3_GetSource.79 ; 0x34189F10
0x34190AA8: F7F9 F940 BL RCCEx_GetPLLSourceFreq ; 0x34189D2C
0x34190AAC: 9007 STR R0, [SP, #28]
0x34190AAE: 9807 LDR R0, [SP, #28]
0x34190AB0: B310 CBZ R0, .L1 ; 0x34190AF8
0x34190AB2: F7F9 FA35 BL LL_RCC_PLL3_GetM ; 0x34189F20
0x34190AB6: 9008 STR R0, [SP, #32]
0x34190AB8: 9808 LDR R0, [SP, #32]
0x34190ABA: B1E8 CBZ R0, .L1 ; 0x34190AF8
0x34190ABC: 9807 LDR R0, [SP, #28]
0x34190ABE: 9006 STR R0, [SP, #24]
0x34190AC0: 9808 LDR R0, [SP, #32]
0x34190AC2: 9003 STR R0, [SP, #12]
0x34190AC4: F7F9 FA34 BL LL_RCC_PLL3_GetN ; 0x34189F30
0x34190AC8: 9004 STR R0, [SP, #16]
0x34190ACA: F7F9 FA39 BL LL_RCC_PLL3_GetFRACN ; 0x34189F40
0x34190ACE: 9005 STR R0, [SP, #20]
0x34190AD0: F7F9 FA3E BL LL_RCC_PLL3_GetP1 ; 0x34189F50
0x34190AD4: 9002 STR R0, [SP, #8]
0x34190AD6: F7F9 FA43 BL LL_RCC_PLL3_GetP2 ; 0x34189F60
0x34190ADA: F8DD C008 LDR.W R12, [SP, #8]
0x34190ADE: 9903 LDR R1, [SP, #12]
0x34190AE0: 9A04 LDR R2, [SP, #16]
0x34190AE2: 9B05 LDR R3, [SP, #20]
0x34190AE4: 4604 MOV R4, R0
0x34190AE6: 9806 LDR R0, [SP, #24]
0x34190AE8: 46EE MOV LR, SP
0x34190AEA: F8CE 4004 STR.W R4, [LR, #4]
0x34190AEE: F8CE C000 STR.W R12, [LR]
0x34190AF2: F7F9 F989 BL RCCEx_CalcPLLFreq ; 0x34189E08
0x34190AF6: 9009 STR R0, [SP, #36]
.L1:
0x34190AF8: E008 B 46L3 ; 0x34190B0C
.L2:
0x34190AFA: F7F9 FA39 BL LL_RCC_PLL3_IsEnabledBypass.80 ; 0x34189F70
0x34190AFE: B128 CBZ R0, .L3 ; 0x34190B0C
0x34190B00: F7F9 FA06 BL LL_RCC_PLL3_GetSource.79 ; 0x34189F10
0x34190B04: F7F9 F912 BL RCCEx_GetPLLSourceFreq ; 0x34189D2C
0x34190B08: 9009 STR R0, [SP, #36]
0x34190B0A: E7FF B 46L3 ; 0x34190B0C
.L3:
0x34190B0C: 9809 LDR R0, [SP, #36]
0x34190B0E: B00A ADD SP, SP, #40
0x34190B10: BD10 POP 123R4, PC}
Section .init.GPDMA1_Channel13_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
GPDMA1_Channel13_IRQHandler:
0x34190B12: E7FE B GPDMA1_Channel13_IRQHandler ; 0x34190B12
Section .text.HAL_RCCEx_GetPLL4CLKFreq from blto2_FSBL_lto.o, size=130, align=4
HAL_RCCEx_GetPLL4CLKFreq:
0x34190B14: B510 PUSH 123R4, LR}
0x34190B16: B08A SUB SP, SP, #40
0x34190B18: 2000 MOVS R0, #0
0x34190B1A: 9009 STR R0, [SP, #36]
0x34190B1C: F7F9 F8EE BL LL_RCC_PLL4_IsReady.71 ; 0x34189CFC
0x34190B20: B368 CBZ R0, .L2 ; 0x34190B7E
0x34190B22: F7F9 F8F3 BL LL_RCC_PLL4P_IsEnabled ; 0x34189D0C
0x34190B26: B348 CBZ R0, .L1 ; 0x34190B7C
0x34190B28: F7F9 F8F8 BL LL_RCC_PLL4_GetSource.72 ; 0x34189D1C
0x34190B2C: F7F9 F8FE BL RCCEx_GetPLLSourceFreq ; 0x34189D2C
0x34190B30: 9007 STR R0, [SP, #28]
0x34190B32: 9807 LDR R0, [SP, #28]
0x34190B34: B310 CBZ R0, .L1 ; 0x34190B7C
0x34190B36: F7F9 F93F BL LL_RCC_PLL4_GetM ; 0x34189DB8
0x34190B3A: 9008 STR R0, [SP, #32]
0x34190B3C: 9808 LDR R0, [SP, #32]
0x34190B3E: B1E8 CBZ R0, .L1 ; 0x34190B7C
0x34190B40: 9807 LDR R0, [SP, #28]
0x34190B42: 9006 STR R0, [SP, #24]
0x34190B44: 9808 LDR R0, [SP, #32]
0x34190B46: 9003 STR R0, [SP, #12]
0x34190B48: F7F9 F93E BL LL_RCC_PLL4_GetN ; 0x34189DC8
0x34190B4C: 9004 STR R0, [SP, #16]
0x34190B4E: F7F9 F943 BL LL_RCC_PLL4_GetFRACN ; 0x34189DD8
0x34190B52: 9005 STR R0, [SP, #20]
0x34190B54: F7F9 F948 BL LL_RCC_PLL4_GetP1 ; 0x34189DE8
0x34190B58: 9002 STR R0, [SP, #8]
0x34190B5A: F7F9 F94D BL LL_RCC_PLL4_GetP2 ; 0x34189DF8
0x34190B5E: F8DD C008 LDR.W R12, [SP, #8]
0x34190B62: 9903 LDR R1, [SP, #12]
0x34190B64: 9A04 LDR R2, [SP, #16]
0x34190B66: 9B05 LDR R3, [SP, #20]
0x34190B68: 4604 MOV R4, R0
0x34190B6A: 9806 LDR R0, [SP, #24]
0x34190B6C: 46EE MOV LR, SP
0x34190B6E: F8CE 4004 STR.W R4, [LR, #4]
0x34190B72: F8CE C000 STR.W R12, [LR]
0x34190B76: F7F9 F947 BL RCCEx_CalcPLLFreq ; 0x34189E08
0x34190B7A: 9009 STR R0, [SP, #36]
.L1:
0x34190B7C: E008 B 46L3 ; 0x34190B90
.L2:
0x34190B7E: F7F9 F987 BL LL_RCC_PLL4_IsEnabledBypass.73 ; 0x34189E90
0x34190B82: B128 CBZ R0, .L3 ; 0x34190B90
0x34190B84: F7F9 F8CA BL LL_RCC_PLL4_GetSource.72 ; 0x34189D1C
0x34190B88: F7F9 F8D0 BL RCCEx_GetPLLSourceFreq ; 0x34189D2C
0x34190B8C: 9009 STR R0, [SP, #36]
0x34190B8E: E7FF B 46L3 ; 0x34190B90
.L3:
0x34190B90: 9809 LDR R0, [SP, #36]
0x34190B92: B00A ADD SP, SP, #40
0x34190B94: BD10 POP 123R4, PC}
Section .init.GPDMA1_Channel14_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
GPDMA1_Channel14_IRQHandler:
0x34190B96: E7FE B GPDMA1_Channel14_IRQHandler ; 0x34190B96
Section .text.LL_RCC_IC4_GetDivider from blto2_FSBL_lto.o, size=22, align=4
LL_RCC_IC4_GetDivider:
0x34190B98: F248 00D0 MOVW R0, #0x80D0
0x34190B9C: F2C5 6002 MOVT R0, #0x5602
0x34190BA0: 6800 LDR R0, [R0]
0x34190BA2: F400 017F AND R1, R0, #0xFF0000
0x34190BA6: 2001 MOVS R0, #1
0x34190BA8: EB00 4011 ADD.W R0, R0, R1, LSR #16
0x34190BAC: 4770 BX LR
Section .init.GPDMA1_Channel15_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
GPDMA1_Channel15_IRQHandler:
0x34190BAE: E7FE B GPDMA1_Channel15_IRQHandler ; 0x34190BAE
Section .text.LL_RCC_IC15_GetDivider from blto2_FSBL_lto.o, size=22, align=4
LL_RCC_IC15_GetDivider:
0x34190BB0: F248 00FC MOVW R0, #0x80FC
0x34190BB4: F2C5 6002 MOVT R0, #0x5602
0x34190BB8: 6800 LDR R0, [R0]
0x34190BBA: F400 017F AND R1, R0, #0xFF0000
0x34190BBE: 2001 MOVS R0, #1
0x34190BC0: EB00 4011 ADD.W R0, R0, R1, LSR #16
0x34190BC4: 4770 BX LR
Section .init.I2C1_EV_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
I2C1_EV_IRQHandler:
0x34190BC6: E7FE B I2C1_EV_IRQHandler ; 0x34190BC6
Section .text.LL_RCC_IC9_GetDivider from blto2_FSBL_lto.o, size=22, align=4
LL_RCC_IC9_GetDivider:
0x34190BC8: F248 00E4 MOVW R0, #0x80E4
0x34190BCC: F2C5 6002 MOVT R0, #0x5602
0x34190BD0: 6800 LDR R0, [R0]
0x34190BD2: F400 017F AND R1, R0, #0xFF0000
0x34190BD6: 2001 MOVS R0, #1
0x34190BD8: EB00 4011 ADD.W R0, R0, R1, LSR #16
0x34190BDC: 4770 BX LR
Section .init.I2C1_ER_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
I2C1_ER_IRQHandler:
0x34190BDE: E7FE B I2C1_ER_IRQHandler ; 0x34190BDE
Section .text.LL_RCC_IC14_GetDivider from blto2_FSBL_lto.o, size=22, align=4
LL_RCC_IC14_GetDivider:
0x34190BE0: F248 00F8 MOVW R0, #0x80F8
0x34190BE4: F2C5 6002 MOVT R0, #0x5602
0x34190BE8: 6800 LDR R0, [R0]
0x34190BEA: F400 017F AND R1, R0, #0xFF0000
0x34190BEE: 2001 MOVS R0, #1
0x34190BF0: EB00 4011 ADD.W R0, R0, R1, LSR #16
0x34190BF4: 4770 BX LR
Section .init.I2C2_EV_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
I2C2_EV_IRQHandler:
0x34190BF6: E7FE B I2C2_EV_IRQHandler ; 0x34190BF6
Section .text.LL_RCC_IC8_GetDivider from blto2_FSBL_lto.o, size=22, align=4
LL_RCC_IC8_GetDivider:
0x34190BF8: F248 00E0 MOVW R0, #0x80E0
0x34190BFC: F2C5 6002 MOVT R0, #0x5602
0x34190C00: 6800 LDR R0, [R0]
0x34190C02: F400 017F AND R1, R0, #0xFF0000
0x34190C06: 2001 MOVS R0, #1
0x34190C08: EB00 4011 ADD.W R0, R0, R1, LSR #16
0x34190C0C: 4770 BX LR
Section .init.I2C2_ER_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
I2C2_ER_IRQHandler:
0x34190C0E: E7FE B I2C2_ER_IRQHandler ; 0x34190C0E
Section .text.LL_RCC_IC7_GetDivider from blto2_FSBL_lto.o, size=22, align=4
LL_RCC_IC7_GetDivider:
0x34190C10: F248 00DC MOVW R0, #0x80DC
0x34190C14: F2C5 6002 MOVT R0, #0x5602
0x34190C18: 6800 LDR R0, [R0]
0x34190C1A: F400 017F AND R1, R0, #0xFF0000
0x34190C1E: 2001 MOVS R0, #1
0x34190C20: EB00 4011 ADD.W R0, R0, R1, LSR #16
0x34190C24: 4770 BX LR
Section .init.I2C3_EV_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
I2C3_EV_IRQHandler:
0x34190C26: E7FE B I2C3_EV_IRQHandler ; 0x34190C26
Section .text.LL_RCC_IC5_GetDivider from blto2_FSBL_lto.o, size=22, align=4
LL_RCC_IC5_GetDivider:
0x34190C28: F248 00D4 MOVW R0, #0x80D4
0x34190C2C: F2C5 6002 MOVT R0, #0x5602
0x34190C30: 6800 LDR R0, [R0]
0x34190C32: F400 017F AND R1, R0, #0xFF0000
0x34190C36: 2001 MOVS R0, #1
0x34190C38: EB00 4011 ADD.W R0, R0, R1, LSR #16
0x34190C3C: 4770 BX LR
Section .init.I2C3_ER_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
I2C3_ER_IRQHandler:
0x34190C3E: E7FE B I2C3_ER_IRQHandler ; 0x34190C3E
Section .text.LL_RCC_IC20_GetDivider from blto2_FSBL_lto.o, size=22, align=4
LL_RCC_IC20_GetDivider:
0x34190C40: F248 1010 MOVW R0, #0x8110
0x34190C44: F2C5 6002 MOVT R0, #0x5602
0x34190C48: 6800 LDR R0, [R0]
0x34190C4A: F400 017F AND R1, R0, #0xFF0000
0x34190C4E: 2001 MOVS R0, #1
0x34190C50: EB00 4011 ADD.W R0, R0, R1, LSR #16
0x34190C54: 4770 BX LR
Section .init.I2C4_EV_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
I2C4_EV_IRQHandler:
0x34190C56: E7FE B I2C4_EV_IRQHandler ; 0x34190C56
Section .text.LL_RCC_IC16_GetDivider from blto2_FSBL_lto.o, size=22, align=4
LL_RCC_IC16_GetDivider:
0x34190C58: F248 1000 MOVW R0, #0x8100
0x34190C5C: F2C5 6002 MOVT R0, #0x5602
0x34190C60: 6800 LDR R0, [R0]
0x34190C62: F400 017F AND R1, R0, #0xFF0000
0x34190C66: 2001 MOVS R0, #1
0x34190C68: EB00 4011 ADD.W R0, R0, R1, LSR #16
0x34190C6C: 4770 BX LR
Section .init.I2C4_ER_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
I2C4_ER_IRQHandler:
0x34190C6E: E7FE B I2C4_ER_IRQHandler ; 0x34190C6E
Section .text.LL_RCC_IC10_GetDivider from blto2_FSBL_lto.o, size=22, align=4
LL_RCC_IC10_GetDivider:
0x34190C70: F248 00E8 MOVW R0, #0x80E8
0x34190C74: F2C5 6002 MOVT R0, #0x5602
0x34190C78: 6800 LDR R0, [R0]
0x34190C7A: F400 017F AND R1, R0, #0xFF0000
0x34190C7E: 2001 MOVS R0, #1
0x34190C80: EB00 4011 ADD.W R0, R0, R1, LSR #16
0x34190C84: 4770 BX LR
Section .init.I3C1_EV_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
I3C1_EV_IRQHandler:
0x34190C86: E7FE B I3C1_EV_IRQHandler ; 0x34190C86
Section .text.LL_RCC_IC19_GetDivider from blto2_FSBL_lto.o, size=22, align=4
LL_RCC_IC19_GetDivider:
0x34190C88: F248 100C MOVW R0, #0x810C
0x34190C8C: F2C5 6002 MOVT R0, #0x5602
0x34190C90: 6800 LDR R0, [R0]
0x34190C92: F400 017F AND R1, R0, #0xFF0000
0x34190C96: 2001 MOVS R0, #1
0x34190C98: EB00 4011 ADD.W R0, R0, R1, LSR #16
0x34190C9C: 4770 BX LR
Section .init.I3C1_ER_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
I3C1_ER_IRQHandler:
0x34190C9E: E7FE B I3C1_ER_IRQHandler ; 0x34190C9E
Section .text.LL_RCC_IC13_GetDivider from blto2_FSBL_lto.o, size=22, align=4
LL_RCC_IC13_GetDivider:
0x34190CA0: F248 00F4 MOVW R0, #0x80F4
0x34190CA4: F2C5 6002 MOVT R0, #0x5602
0x34190CA8: 6800 LDR R0, [R0]
0x34190CAA: F400 017F AND R1, R0, #0xFF0000
0x34190CAE: 2001 MOVS R0, #1
0x34190CB0: EB00 4011 ADD.W R0, R0, R1, LSR #16
0x34190CB4: 4770 BX LR
Section .init.I3C2_EV_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
I3C2_EV_IRQHandler:
0x34190CB6: E7FE B I3C2_EV_IRQHandler ; 0x34190CB6
Section .text.LL_RCC_IC12_GetDivider from blto2_FSBL_lto.o, size=22, align=4
LL_RCC_IC12_GetDivider:
0x34190CB8: F248 00F0 MOVW R0, #0x80F0
0x34190CBC: F2C5 6002 MOVT R0, #0x5602
0x34190CC0: 6800 LDR R0, [R0]
0x34190CC2: F400 017F AND R1, R0, #0xFF0000
0x34190CC6: 2001 MOVS R0, #1
0x34190CC8: EB00 4011 ADD.W R0, R0, R1, LSR #16
0x34190CCC: 4770 BX LR
Section .init.I3C2_ER_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
I3C2_ER_IRQHandler:
0x34190CCE: E7FE B I3C2_ER_IRQHandler ; 0x34190CCE
Section .text.LL_RCC_IC17_GetDivider from blto2_FSBL_lto.o, size=22, align=4
LL_RCC_IC17_GetDivider:
0x34190CD0: F248 1004 MOVW R0, #0x8104
0x34190CD4: F2C5 6002 MOVT R0, #0x5602
0x34190CD8: 6800 LDR R0, [R0]
0x34190CDA: F400 017F AND R1, R0, #0xFF0000
0x34190CDE: 2001 MOVS R0, #1
0x34190CE0: EB00 4011 ADD.W R0, R0, R1, LSR #16
0x34190CE4: 4770 BX LR
Section .init.TIM1_BRK_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
TIM1_BRK_IRQHandler:
0x34190CE6: E7FE B TIM1_BRK_IRQHandler ; 0x34190CE6
Section .text.LL_RCC_IC18_GetDivider from blto2_FSBL_lto.o, size=22, align=4
LL_RCC_IC18_GetDivider:
0x34190CE8: F248 1008 MOVW R0, #0x8108
0x34190CEC: F2C5 6002 MOVT R0, #0x5602
0x34190CF0: 6800 LDR R0, [R0]
0x34190CF2: F400 017F AND R1, R0, #0xFF0000
0x34190CF6: 2001 MOVS R0, #1
0x34190CF8: EB00 4011 ADD.W R0, R0, R1, LSR #16
0x34190CFC: 4770 BX LR
Section .init.TIM1_UP_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
TIM1_UP_IRQHandler:
0x34190CFE: E7FE B TIM1_UP_IRQHandler ; 0x34190CFE
Section .text.HAL_XSPI_SetTimeout from blto2_FSBL_lto.o, size=18, align=4
HAL_XSPI_SetTimeout:
0x34190D00: B082 SUB SP, SP, #8
0x34190D02: 9001 STR R0, [SP, #4]
0x34190D04: 9100 STR R1, [SP, #0]
0x34190D06: 9800 LDR R0, [SP, #0]
0x34190D08: 9901 LDR R1, [SP, #4]
0x34190D0A: 6608 STR R0, [R1, #96]
0x34190D0C: 2000 MOVS R0, #0
0x34190D0E: B002 ADD SP, SP, #8
0x34190D10: 4770 BX LR
Section .init.TIM1_TRG_CCU_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
TIM1_TRG_CCU_IRQHandler:
0x34190D12: E7FE B TIM1_TRG_CCU_IRQHandler ; 0x34190D12
Section .text.HAL_XSPI_Command from blto2_FSBL_lto.o, size=1106, align=4
HAL_XSPI_Command:
0x34190D14: B580 PUSH 123R7, LR}
0x34190D16: B088 SUB SP, SP, #32
0x34190D18: 9007 STR R0, [SP, #28]
0x34190D1A: 9106 STR R1, [SP, #24]
0x34190D1C: 9205 STR R2, [SP, #20]
0x34190D1E: F7EF FFA3 BL HAL_GetTick ; 0x34180C68
0x34190D22: 9002 STR R0, [SP, #8]
0x34190D24: 9806 LDR R0, [SP, #24]
0x34190D26: 6800 LDR R0, [R0]
0x34190D28: B158 CBZ R0, .L1 ; 0x34190D42
0x34190D2A: 9806 LDR R0, [SP, #24]
0x34190D2C: 6800 LDR R0, [R0]
0x34190D2E: 2801 CMP R0, #1
0x34190D30: D007 BEQ 46L1 ; 0x34190D42
0x34190D32: 9806 LDR R0, [SP, #24]
0x34190D34: 6800 LDR R0, [R0]
0x34190D36: 2802 CMP R0, #2
0x34190D38: D003 BEQ 46L1 ; 0x34190D42
0x34190D3A: 9806 LDR R0, [SP, #24]
0x34190D3C: 6800 LDR R0, [R0]
0x34190D3E: 2803 CMP R0, #3
0x34190D40: D100 BNE 46L2 ; 0x34190D44
.L1:
0x34190D42: E007 B 46L3 ; 0x34190D54
.L2:
0x34190D44: F642 305A MOVW R0, #0x2B5A ; 0x34192B5A = .rodata..L.str.95
0x34190D48: F2C3 4019 MOVT R0, #0x3419 ; 0x34192B5A = .rodata..L.str.95
0x34190D4C: F240 3141 MOVW R1, #0x0341
0x34190D50: F7FB FFEE BL assert_failed ; 0x3418CD30
.L3:
0x34190D54: 9807 LDR R0, [SP, #28]
0x34190D56: 6880 LDR R0, [R0, #8]
0x34190D58: BB10 CBNZ R0, .L6 ; 0x34190DA0
0x34190D5A: 9806 LDR R0, [SP, #24]
0x34190D5C: 6840 LDR R0, [R0, #4]
0x34190D5E: B1B0 CBZ R0, .L4 ; 0x34190D8E
0x34190D60: 9806 LDR R0, [SP, #24]
0x34190D62: 6840 LDR R0, [R0, #4]
0x34190D64: F1B0 4F80 CMP.W R0, #0x40000000
0x34190D68: D011 BEQ 46L4 ; 0x34190D8E
0x34190D6A: 9806 LDR R0, [SP, #24]
0x34190D6C: 6840 LDR R0, [R0, #4]
0x34190D6E: F1B0 4F00 CMP.W R0, #0x80000000
0x34190D72: D00C BEQ 46L4 ; 0x34190D8E
0x34190D74: 9806 LDR R0, [SP, #24]
0x34190D76: 6840 LDR R0, [R0, #4]
0x34190D78: F1B0 4F40 CMP.W R0, #0xC0000000
0x34190D7C: D007 BEQ 46L4 ; 0x34190D8E
0x34190D7E: 9806 LDR R0, [SP, #24]
0x34190D80: 6840 LDR R0, [R0, #4]
0x34190D82: B120 CBZ R0, .L4 ; 0x34190D8E
0x34190D84: 9806 LDR R0, [SP, #24]
0x34190D86: 6840 LDR R0, [R0, #4]
0x34190D88: F1B0 4F00 CMP.W R0, #0x80000000
0x34190D8C: D100 BNE 46L5 ; 0x34190D90
.L4:
0x34190D8E: E007 B 46L6 ; 0x34190DA0
.L5:
0x34190D90: F642 305A MOVW R0, #0x2B5A ; 0x34192B5A = .rodata..L.str.95
0x34190D94: F2C3 4019 MOVT R0, #0x3419 ; 0x34192B5A = .rodata..L.str.95
0x34190D98: F44F 7151 MOV.W R1, #0x0344
0x34190D9C: F7FB FFC8 BL assert_failed ; 0x3418CD30
.L6:
0x34190DA0: 9806 LDR R0, [SP, #24]
0x34190DA2: 68C0 LDR R0, [R0, #12]
0x34190DA4: B178 CBZ R0, .L7 ; 0x34190DC6
0x34190DA6: 9806 LDR R0, [SP, #24]
0x34190DA8: 68C0 LDR R0, [R0, #12]
0x34190DAA: 2801 CMP R0, #1
0x34190DAC: D00B BEQ 46L7 ; 0x34190DC6
0x34190DAE: 9806 LDR R0, [SP, #24]
0x34190DB0: 68C0 LDR R0, [R0, #12]
0x34190DB2: 2802 CMP R0, #2
0x34190DB4: D007 BEQ 46L7 ; 0x34190DC6
0x34190DB6: 9806 LDR R0, [SP, #24]
0x34190DB8: 68C0 LDR R0, [R0, #12]
0x34190DBA: 2803 CMP R0, #3
0x34190DBC: D003 BEQ 46L7 ; 0x34190DC6
0x34190DBE: 9806 LDR R0, [SP, #24]
0x34190DC0: 68C0 LDR R0, [R0, #12]
0x34190DC2: 2804 CMP R0, #4
0x34190DC4: D100 BNE 46L8 ; 0x34190DC8
.L7:
0x34190DC6: E007 B 46L9 ; 0x34190DD8
.L8:
0x34190DC8: F642 305A MOVW R0, #0x2B5A ; 0x34192B5A = .rodata..L.str.95
0x34190DCC: F2C3 4019 MOVT R0, #0x3419 ; 0x34192B5A = .rodata..L.str.95
0x34190DD0: F240 3147 MOVW R1, #0x0347
0x34190DD4: F7FB FFAC BL assert_failed ; 0x3418CD30
.L9:
0x34190DD8: 9806 LDR R0, [SP, #24]
0x34190DDA: 68C0 LDR R0, [R0, #12]
0x34190DDC: B338 CBZ R0, .L15 ; 0x34190E2E
0x34190DDE: 9806 LDR R0, [SP, #24]
0x34190DE0: 6900 LDR R0, [R0, #16]
0x34190DE2: B158 CBZ R0, .L10 ; 0x34190DFC
0x34190DE4: 9806 LDR R0, [SP, #24]
0x34190DE6: 6900 LDR R0, [R0, #16]
0x34190DE8: 2810 CMP R0, #16
0x34190DEA: D007 BEQ 46L10 ; 0x34190DFC
0x34190DEC: 9806 LDR R0, [SP, #24]
0x34190DEE: 6900 LDR R0, [R0, #16]
0x34190DF0: 2820 CMP R0, #32
0x34190DF2: D003 BEQ 46L10 ; 0x34190DFC
0x34190DF4: 9806 LDR R0, [SP, #24]
0x34190DF6: 6900 LDR R0, [R0, #16]
0x34190DF8: 2830 CMP R0, #48
0x34190DFA: D100 BNE 46L11 ; 0x34190DFE
.L10:
0x34190DFC: E007 B 46L12 ; 0x34190E0E
.L11:
0x34190DFE: F642 305A MOVW R0, #0x2B5A ; 0x34192B5A = .rodata..L.str.95
0x34190E02: F2C3 4019 MOVT R0, #0x3419 ; 0x34192B5A = .rodata..L.str.95
0x34190E06: F240 314A MOVW R1, #0x034A
0x34190E0A: F7FB FF91 BL assert_failed ; 0x3418CD30
.L12:
0x34190E0E: 9806 LDR R0, [SP, #24]
0x34190E10: 6940 LDR R0, [R0, #20]
0x34190E12: B118 CBZ R0, .L13 ; 0x34190E1C
0x34190E14: 9806 LDR R0, [SP, #24]
0x34190E16: 6940 LDR R0, [R0, #20]
0x34190E18: 2808 CMP R0, #8
0x34190E1A: D100 BNE 46L14 ; 0x34190E1E
.L13:
0x34190E1C: E007 B 46L15 ; 0x34190E2E
.L14:
0x34190E1E: F642 305A MOVW R0, #0x2B5A ; 0x34192B5A = .rodata..L.str.95
0x34190E22: F2C3 4019 MOVT R0, #0x3419 ; 0x34192B5A = .rodata..L.str.95
0x34190E26: F240 314B MOVW R1, #0x034B
0x34190E2A: F7FB FF81 BL assert_failed ; 0x3418CD30
.L15:
0x34190E2E: 9806 LDR R0, [SP, #24]
0x34190E30: 69C0 LDR R0, [R0, #28]
0x34190E32: B198 CBZ R0, .L16 ; 0x34190E5C
0x34190E34: 9806 LDR R0, [SP, #24]
0x34190E36: 69C0 LDR R0, [R0, #28]
0x34190E38: F5B0 7F80 CMP.W R0, #0x0100
0x34190E3C: D00E BEQ 46L16 ; 0x34190E5C
0x34190E3E: 9806 LDR R0, [SP, #24]
0x34190E40: 69C0 LDR R0, [R0, #28]
0x34190E42: F5B0 7F00 CMP.W R0, #0x0200
0x34190E46: D009 BEQ 46L16 ; 0x34190E5C
0x34190E48: 9806 LDR R0, [SP, #24]
0x34190E4A: 69C0 LDR R0, [R0, #28]
0x34190E4C: F5B0 7F40 CMP.W R0, #0x0300
0x34190E50: D004 BEQ 46L16 ; 0x34190E5C
0x34190E52: 9806 LDR R0, [SP, #24]
0x34190E54: 69C0 LDR R0, [R0, #28]
0x34190E56: F5B0 6F80 CMP.W R0, #0x0400
0x34190E5A: D100 BNE 46L17 ; 0x34190E5E
.L16:
0x34190E5C: E007 B 46L18 ; 0x34190E6E
.L17:
0x34190E5E: F642 305A MOVW R0, #0x2B5A ; 0x34192B5A = .rodata..L.str.95
0x34190E62: F2C3 4019 MOVT R0, #0x3419 ; 0x34192B5A = .rodata..L.str.95
0x34190E66: F240 314E MOVW R1, #0x034E
0x34190E6A: F7FB FF61 BL assert_failed ; 0x3418CD30
.L18:
0x34190E6E: 9806 LDR R0, [SP, #24]
0x34190E70: 69C0 LDR R0, [R0, #28]
0x34190E72: B358 CBZ R0, .L24 ; 0x34190ECC
0x34190E74: 9806 LDR R0, [SP, #24]
0x34190E76: 6A00 LDR R0, [R0, #32]
0x34190E78: B170 CBZ R0, .L19 ; 0x34190E98
0x34190E7A: 9806 LDR R0, [SP, #24]
0x34190E7C: 6A00 LDR R0, [R0, #32]
0x34190E7E: F5B0 5F80 CMP.W R0, #0x1000
0x34190E82: D009 BEQ 46L19 ; 0x34190E98
0x34190E84: 9806 LDR R0, [SP, #24]
0x34190E86: 6A00 LDR R0, [R0, #32]
0x34190E88: F5B0 5F00 CMP.W R0, #0x2000
0x34190E8C: D004 BEQ 46L19 ; 0x34190E98
0x34190E8E: 9806 LDR R0, [SP, #24]
0x34190E90: 6A00 LDR R0, [R0, #32]
0x34190E92: F5B0 5F40 CMP.W R0, #0x3000
0x34190E96: D100 BNE 46L20 ; 0x34190E9A
.L19:
0x34190E98: E007 B 46L21 ; 0x34190EAA
.L20:
0x34190E9A: F642 305A MOVW R0, #0x2B5A ; 0x34192B5A = .rodata..L.str.95
0x34190E9E: F2C3 4019 MOVT R0, #0x3419 ; 0x34192B5A = .rodata..L.str.95
0x34190EA2: F240 3151 MOVW R1, #0x0351
0x34190EA6: F7FB FF43 BL assert_failed ; 0x3418CD30
.L21:
0x34190EAA: 9806 LDR R0, [SP, #24]
0x34190EAC: 6A40 LDR R0, [R0, #36]
0x34190EAE: B120 CBZ R0, .L22 ; 0x34190EBA
0x34190EB0: 9806 LDR R0, [SP, #24]
0x34190EB2: 6A40 LDR R0, [R0, #36]
0x34190EB4: F5B0 6F00 CMP.W R0, #0x0800
0x34190EB8: D100 BNE 46L23 ; 0x34190EBC
.L22:
0x34190EBA: E007 B 46L24 ; 0x34190ECC
.L23:
0x34190EBC: F642 305A MOVW R0, #0x2B5A ; 0x34192B5A = .rodata..L.str.95
0x34190EC0: F2C3 4019 MOVT R0, #0x3419 ; 0x34192B5A = .rodata..L.str.95
0x34190EC4: F240 3152 MOVW R1, #0x0352
0x34190EC8: F7FB FF32 BL assert_failed ; 0x3418CD30
.L24:
0x34190ECC: 9806 LDR R0, [SP, #24]
0x34190ECE: 6AC0 LDR R0, [R0, #44]
0x34190ED0: B198 CBZ R0, .L25 ; 0x34190EFA
0x34190ED2: 9806 LDR R0, [SP, #24]
0x34190ED4: 6AC0 LDR R0, [R0, #44]
0x34190ED6: F5B0 3F80 CMP.W R0, #0x010000
0x34190EDA: D00E BEQ 46L25 ; 0x34190EFA
0x34190EDC: 9806 LDR R0, [SP, #24]
0x34190EDE: 6AC0 LDR R0, [R0, #44]
0x34190EE0: F5B0 3F00 CMP.W R0, #0x020000
0x34190EE4: D009 BEQ 46L25 ; 0x34190EFA
0x34190EE6: 9806 LDR R0, [SP, #24]
0x34190EE8: 6AC0 LDR R0, [R0, #44]
0x34190EEA: F5B0 3F40 CMP.W R0, #0x030000
0x34190EEE: D004 BEQ 46L25 ; 0x34190EFA
0x34190EF0: 9806 LDR R0, [SP, #24]
0x34190EF2: 6AC0 LDR R0, [R0, #44]
0x34190EF4: F5B0 2F80 CMP.W R0, #0x040000
0x34190EF8: D100 BNE 46L26 ; 0x34190EFC
.L25:
0x34190EFA: E007 B 46L27 ; 0x34190F0C
.L26:
0x34190EFC: F642 305A MOVW R0, #0x2B5A ; 0x34192B5A = .rodata..L.str.95
0x34190F00: F2C3 4019 MOVT R0, #0x3419 ; 0x34192B5A = .rodata..L.str.95
0x34190F04: F240 3155 MOVW R1, #0x0355
0x34190F08: F7FB FF12 BL assert_failed ; 0x3418CD30
.L27:
0x34190F0C: 9806 LDR R0, [SP, #24]
0x34190F0E: 6AC0 LDR R0, [R0, #44]
0x34190F10: B358 CBZ R0, .L33 ; 0x34190F6A
0x34190F12: 9806 LDR R0, [SP, #24]
0x34190F14: 6B00 LDR R0, [R0, #48]
0x34190F16: B170 CBZ R0, .L28 ; 0x34190F36
0x34190F18: 9806 LDR R0, [SP, #24]
0x34190F1A: 6B00 LDR R0, [R0, #48]
0x34190F1C: F5B0 1F80 CMP.W R0, #0x100000
0x34190F20: D009 BEQ 46L28 ; 0x34190F36
0x34190F22: 9806 LDR R0, [SP, #24]
0x34190F24: 6B00 LDR R0, [R0, #48]
0x34190F26: F5B0 1F00 CMP.W R0, #0x200000
0x34190F2A: D004 BEQ 46L28 ; 0x34190F36
0x34190F2C: 9806 LDR R0, [SP, #24]
0x34190F2E: 6B00 LDR R0, [R0, #48]
0x34190F30: F5B0 1F40 CMP.W R0, #0x300000
0x34190F34: D100 BNE 46L29 ; 0x34190F38
.L28:
0x34190F36: E007 B 46L30 ; 0x34190F48
.L29:
0x34190F38: F642 305A MOVW R0, #0x2B5A ; 0x34192B5A = .rodata..L.str.95
0x34190F3C: F2C3 4019 MOVT R0, #0x3419 ; 0x34192B5A = .rodata..L.str.95
0x34190F40: F44F 7156 MOV.W R1, #0x0358
0x34190F44: F7FB FEF4 BL assert_failed ; 0x3418CD30
.L30:
0x34190F48: 9806 LDR R0, [SP, #24]
0x34190F4A: 6B40 LDR R0, [R0, #52]
0x34190F4C: B120 CBZ R0, .L31 ; 0x34190F58
0x34190F4E: 9806 LDR R0, [SP, #24]
0x34190F50: 6B40 LDR R0, [R0, #52]
0x34190F52: F5B0 2F00 CMP.W R0, #0x080000
0x34190F56: D100 BNE 46L32 ; 0x34190F5A
.L31:
0x34190F58: E007 B 46L33 ; 0x34190F6A
.L32:
0x34190F5A: F642 305A MOVW R0, #0x2B5A ; 0x34192B5A = .rodata..L.str.95
0x34190F5E: F2C3 4019 MOVT R0, #0x3419 ; 0x34192B5A = .rodata..L.str.95
0x34190F62: F240 3159 MOVW R1, #0x0359
0x34190F66: F7FB FEE3 BL assert_failed ; 0x3418CD30
.L33:
0x34190F6A: 9807 LDR R0, [SP, #28]
0x34190F6C: 68C0 LDR R0, [R0, #12]
0x34190F6E: F1B0 6F80 CMP.W R0, #0x04000000
0x34190F72: D10D BNE 46L34 ; 0x34190F90
0x34190F74: 9806 LDR R0, [SP, #24]
0x34190F76: 6B80 LDR R0, [R0, #56]
0x34190F78: B330 CBZ R0, .L35 ; 0x34190FC8
0x34190F7A: 9806 LDR R0, [SP, #24]
0x34190F7C: 6B80 LDR R0, [R0, #56]
0x34190F7E: F1B0 6F80 CMP.W R0, #0x04000000
0x34190F82: D021 BEQ 46L35 ; 0x34190FC8
0x34190F84: 9806 LDR R0, [SP, #24]
0x34190F86: 6B80 LDR R0, [R0, #56]
0x34190F88: F1B0 6FA0 CMP.W R0, #0x05000000
0x34190F8C: D01C BEQ 46L35 ; 0x34190FC8
0x34190F8E: E01C B 46L36 ; 0x34190FCA
.L34:
0x34190F90: 9806 LDR R0, [SP, #24]
0x34190F92: 6B80 LDR R0, [R0, #56]
0x34190F94: B1C0 CBZ R0, .L35 ; 0x34190FC8
0x34190F96: 9806 LDR R0, [SP, #24]
0x34190F98: 6B80 LDR R0, [R0, #56]
0x34190F9A: F1B0 7F80 CMP.W R0, #0x01000000
0x34190F9E: D013 BEQ 46L35 ; 0x34190FC8
0x34190FA0: 9806 LDR R0, [SP, #24]
0x34190FA2: 6B80 LDR R0, [R0, #56]
0x34190FA4: F1B0 7F00 CMP.W R0, #0x02000000
0x34190FA8: D00E BEQ 46L35 ; 0x34190FC8
0x34190FAA: 9806 LDR R0, [SP, #24]
0x34190FAC: 6B80 LDR R0, [R0, #56]
0x34190FAE: F1B0 7F40 CMP.W R0, #0x03000000
0x34190FB2: D009 BEQ 46L35 ; 0x34190FC8
0x34190FB4: 9806 LDR R0, [SP, #24]
0x34190FB6: 6B80 LDR R0, [R0, #56]
0x34190FB8: F1B0 6F80 CMP.W R0, #0x04000000
0x34190FBC: D004 BEQ 46L35 ; 0x34190FC8
0x34190FBE: 9806 LDR R0, [SP, #24]
0x34190FC0: 6B80 LDR R0, [R0, #56]
0x34190FC2: F1B0 6FA0 CMP.W R0, #0x05000000
0x34190FC6: D100 BNE 46L36 ; 0x34190FCA
.L35:
0x34190FC8: E007 B 46L37 ; 0x34190FDA
.L36:
0x34190FCA: F642 305A MOVW R0, #0x2B5A ; 0x34192B5A = .rodata..L.str.95
0x34190FCE: F2C3 4019 MOVT R0, #0x3419 ; 0x34192B5A = .rodata..L.str.95
0x34190FD2: F44F 7157 MOV.W R1, #0x035C
0x34190FD6: F7FB FEAB BL assert_failed ; 0x3418CD30
.L37:
0x34190FDA: 9806 LDR R0, [SP, #24]
0x34190FDC: 6B80 LDR R0, [R0, #56]
0x34190FDE: B360 CBZ R0, .L44 ; 0x3419103A
0x34190FE0: 9806 LDR R0, [SP, #24]
0x34190FE2: 6800 LDR R0, [R0]
0x34190FE4: B958 CBNZ R0, .L39 ; 0x34190FFE
0x34190FE6: 9806 LDR R0, [SP, #24]
0x34190FE8: 6BC0 LDR R0, [R0, #60]
0x34190FEA: B100 CBZ R0, .L38 ; 0x34190FEE
0x34190FEC: E007 B 46L39 ; 0x34190FFE
.L38:
0x34190FEE: F642 305A MOVW R0, #0x2B5A ; 0x34192B5A = .rodata..L.str.95
0x34190FF2: F2C3 4019 MOVT R0, #0x3419 ; 0x34192B5A = .rodata..L.str.95
0x34190FF6: F240 3162 MOVW R1, #0x0362
0x34190FFA: F7FB FE99 BL assert_failed ; 0x3418CD30
.L39:
0x34190FFE: 9806 LDR R0, [SP, #24]
0x34191000: 6C00 LDR R0, [R0, #64]
0x34191002: B120 CBZ R0, .L40 ; 0x3419100E
0x34191004: 9806 LDR R0, [SP, #24]
0x34191006: 6C00 LDR R0, [R0, #64]
0x34191008: F1B0 6F00 CMP.W R0, #0x08000000
0x3419100C: D100 BNE 46L41 ; 0x34191010
.L40:
0x3419100E: E007 B 46L42 ; 0x34191020
.L41:
0x34191010: F642 305A MOVW R0, #0x2B5A ; 0x34192B5A = .rodata..L.str.95
0x34191014: F2C3 4019 MOVT R0, #0x3419 ; 0x34192B5A = .rodata..L.str.95
0x34191018: F44F 7159 MOV.W R1, #0x0364
0x3419101C: F7FB FE88 BL assert_failed ; 0x3418CD30
.L42:
0x34191020: 9806 LDR R0, [SP, #24]
0x34191022: 6C40 LDR R0, [R0, #68]
0x34191024: 281F CMP R0, #31
0x34191026: D800 BHI 46L43 ; 0x3419102A
0x34191028: E007 B 46L44 ; 0x3419103A
.L43:
0x3419102A: F642 305A MOVW R0, #0x2B5A ; 0x34192B5A = .rodata..L.str.95
0x3419102E: F2C3 4019 MOVT R0, #0x3419 ; 0x34192B5A = .rodata..L.str.95
0x34191032: F240 3165 MOVW R1, #0x0365
0x34191036: F7FB FE7B BL assert_failed ; 0x3418CD30
.L44:
0x3419103A: 9806 LDR R0, [SP, #24]
0x3419103C: 6C80 LDR R0, [R0, #72]
0x3419103E: B120 CBZ R0, .L45 ; 0x3419104A
0x34191040: 9806 LDR R0, [SP, #24]
0x34191042: 6C80 LDR R0, [R0, #72]
0x34191044: F1B0 5F00 CMP.W R0, #0x20000000
0x34191048: D100 BNE 46L46 ; 0x3419104C
.L45:
0x3419104A: E007 B 46L47 ; 0x3419105C
.L46:
0x3419104C: F642 305A MOVW R0, #0x2B5A ; 0x34192B5A = .rodata..L.str.95
0x34191050: F2C3 4019 MOVT R0, #0x3419 ; 0x34192B5A = .rodata..L.str.95
0x34191054: F44F 715A MOV.W R1, #0x0368
0x34191058: F7FB FE6A BL assert_failed ; 0x3418CD30
.L47:
0x3419105C: 9807 LDR R0, [SP, #28]
0x3419105E: 6D80 LDR R0, [R0, #88]
0x34191060: 9003 STR R0, [SP, #12]
0x34191062: 9803 LDR R0, [SP, #12]
0x34191064: 2802 CMP R0, #2
0x34191066: D104 BNE 46L48 ; 0x34191072
0x34191068: 9807 LDR R0, [SP, #28]
0x3419106A: 68C0 LDR R0, [R0, #12]
0x3419106C: F1B0 6F80 CMP.W R0, #0x04000000
0x34191070: D115 BNE 46L50 ; 0x3419109E
.L48:
0x34191072: 9803 LDR R0, [SP, #12]
0x34191074: 2814 CMP R0, #20
0x34191076: D107 BNE 46L49 ; 0x34191088
0x34191078: 9806 LDR R0, [SP, #24]
0x3419107A: 6800 LDR R0, [R0]
0x3419107C: 2802 CMP R0, #2
0x3419107E: D00E BEQ 46L50 ; 0x3419109E
0x34191080: 9806 LDR R0, [SP, #24]
0x34191082: 6800 LDR R0, [R0]
0x34191084: 2803 CMP R0, #3
0x34191086: D00A BEQ 46L50 ; 0x3419109E
.L49:
0x34191088: 9803 LDR R0, [SP, #12]
0x3419108A: 2824 CMP R0, #36
0x3419108C: D161 BNE 46L61 ; 0x34191152
0x3419108E: 9806 LDR R0, [SP, #24]
0x34191090: 6800 LDR R0, [R0]
0x34191092: 2801 CMP R0, #1
0x34191094: D003 BEQ 46L50 ; 0x3419109E
0x34191096: 9806 LDR R0, [SP, #24]
0x34191098: 6800 LDR R0, [R0]
0x3419109A: 2803 CMP R0, #3
0x3419109C: D159 BNE 46L61 ; 0x34191152
.L50:
0x3419109E: 9807 LDR R0, [SP, #28]
0x341910A0: 9B02 LDR R3, [SP, #8]
0x341910A2: 9905 LDR R1, [SP, #20]
0x341910A4: 466A MOV R2, SP
0x341910A6: 6011 STR R1, [R2]
0x341910A8: 2120 MOVS R1, #32
0x341910AA: 2200 MOVS R2, #0
0x341910AC: F7F9 FC5E BL XSPI_WaitFlagStateUntilTimeout ; 0x3418A96C
0x341910B0: F88D 0013 STRB.W R0, [SP, #19]
0x341910B4: F89D 0013 LDRB.W R0, [SP, #19]
0x341910B8: 2800 CMP R0, #0
0x341910BA: D146 BNE 46L59 ; 0x3419114A
0x341910BC: 9907 LDR R1, [SP, #28]
0x341910BE: 2000 MOVS R0, #0
0x341910C0: 65C8 STR R0, [R1, #92]
0x341910C2: 9807 LDR R0, [SP, #28]
0x341910C4: 9906 LDR R1, [SP, #24]
0x341910C6: F7F9 FC85 BL XSPI_ConfigCmd ; 0x3418A9D4
0x341910CA: F88D 0013 STRB.W R0, [SP, #19]
0x341910CE: F89D 0013 LDRB.W R0, [SP, #19]
0x341910D2: BBC8 CBNZ R0, .L58 ; 0x34191148
0x341910D4: 9806 LDR R0, [SP, #24]
0x341910D6: 6B80 LDR R0, [R0, #56]
0x341910D8: B978 CBNZ R0, .L51 ; 0x341910FA
0x341910DA: 9807 LDR R0, [SP, #28]
0x341910DC: 9B02 LDR R3, [SP, #8]
0x341910DE: 9905 LDR R1, [SP, #20]
0x341910E0: 466A MOV R2, SP
0x341910E2: 6011 STR R1, [R2]
0x341910E4: 2120 MOVS R1, #32
0x341910E6: 2200 MOVS R2, #0
0x341910E8: F7F9 FC40 BL XSPI_WaitFlagStateUntilTimeout ; 0x3418A96C
0x341910EC: F88D 0013 STRB.W R0, [SP, #19]
0x341910F0: 9807 LDR R0, [SP, #28]
0x341910F2: 6801 LDR R1, [R0]
0x341910F4: 2002 MOVS R0, #2
0x341910F6: 6248 STR R0, [R1, #36]
0x341910F8: E026 B 46L58 ; 0x34191148
.L51:
0x341910FA: 9806 LDR R0, [SP, #24]
0x341910FC: 6800 LDR R0, [R0]
0x341910FE: B918 CBNZ R0, .L52 ; 0x34191108
0x34191100: 9907 LDR R1, [SP, #28]
0x34191102: 2004 MOVS R0, #4
0x34191104: 6588 STR R0, [R1, #88]
0x34191106: E01F B 46L58 ; 0x34191148
.L52:
0x34191108: 9806 LDR R0, [SP, #24]
0x3419110A: 6800 LDR R0, [R0]
0x3419110C: 2801 CMP R0, #1
0x3419110E: D10B BNE 46L55 ; 0x34191128
0x34191110: 9807 LDR R0, [SP, #28]
0x34191112: 6D80 LDR R0, [R0, #88]
0x34191114: 2824 CMP R0, #36
0x34191116: D103 BNE 46L53 ; 0x34191120
0x34191118: 9907 LDR R1, [SP, #28]
0x3419111A: 2004 MOVS R0, #4
0x3419111C: 6588 STR R0, [R1, #88]
0x3419111E: E002 B 46L54 ; 0x34191126
.L53:
0x34191120: 9907 LDR R1, [SP, #28]
0x34191122: 2014 MOVS R0, #20
0x34191124: 6588 STR R0, [R1, #88]
.L54:
0x34191126: E00F B 46L58 ; 0x34191148
.L55:
0x34191128: 9806 LDR R0, [SP, #24]
0x3419112A: 6800 LDR R0, [R0]
0x3419112C: 2802 CMP R0, #2
0x3419112E: D10B BNE 46L58 ; 0x34191148
0x34191130: 9807 LDR R0, [SP, #28]
0x34191132: 6D80 LDR R0, [R0, #88]
0x34191134: 2814 CMP R0, #20
0x34191136: D103 BNE 46L56 ; 0x34191140
0x34191138: 9907 LDR R1, [SP, #28]
0x3419113A: 2004 MOVS R0, #4
0x3419113C: 6588 STR R0, [R1, #88]
0x3419113E: E002 B 46L57 ; 0x34191146
.L56:
0x34191140: 9907 LDR R1, [SP, #28]
0x34191142: 2024 MOVS R0, #36
0x34191144: 6588 STR R0, [R1, #88]
.L57:
0x34191146: E7FF B 46L58 ; 0x34191148
.L58:
0x34191148: E002 B 46L60 ; 0x34191150
.L59:
0x3419114A: 2002 MOVS R0, #2
0x3419114C: F88D 0013 STRB.W R0, [SP, #19]
.L60:
0x34191150: E005 B 46L62 ; 0x3419115E
.L61:
0x34191152: 2001 MOVS R0, #1
0x34191154: F88D 0013 STRB.W R0, [SP, #19]
0x34191158: 9907 LDR R1, [SP, #28]
0x3419115A: 2010 MOVS R0, #16
0x3419115C: 65C8 STR R0, [R1, #92]
.L62:
0x3419115E: F89D 0013 LDRB.W R0, [SP, #19]
0x34191162: B008 ADD SP, SP, #32
0x34191164: BD80 POP 123R7, PC}
Section .init.TIM1_CC_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
TIM1_CC_IRQHandler:
0x34191166: E7FE B TIM1_CC_IRQHandler ; 0x34191166
Section .text.HAL_XSPI_Transmit from blto2_FSBL_lto.o, size=226, align=4
HAL_XSPI_Transmit:
0x34191168: B580 PUSH 123R7, LR}
0x3419116A: B088 SUB SP, SP, #32
0x3419116C: 9007 STR R0, [SP, #28]
0x3419116E: 9106 STR R1, [SP, #24]
0x34191170: 9205 STR R2, [SP, #20]
0x34191172: F7EF FD79 BL HAL_GetTick ; 0x34180C68
0x34191176: 9003 STR R0, [SP, #12]
0x34191178: 9807 LDR R0, [SP, #28]
0x3419117A: 6800 LDR R0, [R0]
0x3419117C: 3050 ADDS R0, #80
0x3419117E: 9002 STR R0, [SP, #8]
0x34191180: 9806 LDR R0, [SP, #24]
0x34191182: B930 CBNZ R0, .L1 ; 0x34191192
0x34191184: 2001 MOVS R0, #1
0x34191186: F88D 0013 STRB.W R0, [SP, #19]
0x3419118A: 9907 LDR R1, [SP, #28]
0x3419118C: 2008 MOVS R0, #8
0x3419118E: 65C8 STR R0, [R1, #92]
0x34191190: E057 B 46L7 ; 0x34191242
.L1:
0x34191192: 9807 LDR R0, [SP, #28]
0x34191194: 6D80 LDR R0, [R0, #88]
0x34191196: 2804 CMP R0, #4
0x34191198: D14D BNE 46L6 ; 0x34191236
0x3419119A: 9807 LDR R0, [SP, #28]
0x3419119C: 6800 LDR R0, [R0]
0x3419119E: 6C00 LDR R0, [R0, #64]
0x341911A0: 3001 ADDS R0, #1
0x341911A2: 9907 LDR R1, [SP, #28]
0x341911A4: 64C8 STR R0, [R1, #76]
0x341911A6: 9807 LDR R0, [SP, #28]
0x341911A8: 6CC0 LDR R0, [R0, #76]
0x341911AA: 9907 LDR R1, [SP, #28]
0x341911AC: 6488 STR R0, [R1, #72]
0x341911AE: 9806 LDR R0, [SP, #24]
0x341911B0: 9907 LDR R1, [SP, #28]
0x341911B2: 6448 STR R0, [R1, #68]
0x341911B4: 9807 LDR R0, [SP, #28]
0x341911B6: 6800 LDR R0, [R0]
0x341911B8: 6800 LDR R0, [R0]
0x341911BA: F020 5040 BIC R0, R0, #0x30000000
0x341911BE: 9907 LDR R1, [SP, #28]
0x341911C0: 6809 LDR R1, [R1]
0x341911C2: 6008 STR R0, [R1]
.L2:
0x341911C4: 9807 LDR R0, [SP, #28]
0x341911C6: 9B03 LDR R3, [SP, #12]
0x341911C8: 9905 LDR R1, [SP, #20]
0x341911CA: 466A MOV R2, SP
0x341911CC: 6011 STR R1, [R2]
0x341911CE: 2104 MOVS R1, #4
0x341911D0: 2201 MOVS R2, #1
0x341911D2: F7F9 FBCB BL XSPI_WaitFlagStateUntilTimeout ; 0x3418A96C
0x341911D6: F88D 0013 STRB.W R0, [SP, #19]
0x341911DA: F89D 0013 LDRB.W R0, [SP, #19]
0x341911DE: B100 CBZ R0, .L3 ; 0x341911E2
0x341911E0: E011 B 46L4 ; 0x34191206
.L3:
0x341911E2: 9807 LDR R0, [SP, #28]
0x341911E4: 6C40 LDR R0, [R0, #68]
0x341911E6: 7800 LDRB R0, [R0]
0x341911E8: 9902 LDR R1, [SP, #8]
0x341911EA: 7008 STRB R0, [R1]
0x341911EC: 9907 LDR R1, [SP, #28]
0x341911EE: 6C48 LDR R0, [R1, #68]
0x341911F0: 3001 ADDS R0, #1
0x341911F2: 6448 STR R0, [R1, #68]
0x341911F4: 9907 LDR R1, [SP, #28]
0x341911F6: 6CC8 LDR R0, [R1, #76]
0x341911F8: 3801 SUBS R0, #1
0x341911FA: 64C8 STR R0, [R1, #76]
0x341911FC: 9807 LDR R0, [SP, #28]
0x341911FE: 6CC0 LDR R0, [R0, #76]
0x34191200: B108 CBZ R0, .L4 ; 0x34191206
0x34191202: F02F C821 LE 46L2 ; 0x341911C4
.L4:
0x34191206: F89D 0013 LDRB.W R0, [SP, #19]
0x3419120A: B998 CBNZ R0, .L5 ; 0x34191234
0x3419120C: 9807 LDR R0, [SP, #28]
0x3419120E: 9B03 LDR R3, [SP, #12]
0x34191210: 9905 LDR R1, [SP, #20]
0x34191212: 466A MOV R2, SP
0x34191214: 6011 STR R1, [R2]
0x34191216: 2102 MOVS R1, #2
0x34191218: 2201 MOVS R2, #1
0x3419121A: F7F9 FBA7 BL XSPI_WaitFlagStateUntilTimeout ; 0x3418A96C
0x3419121E: F88D 0013 STRB.W R0, [SP, #19]
0x34191222: F89D 0013 LDRB.W R0, [SP, #19]
0x34191226: B928 CBNZ R0, .L5 ; 0x34191234
0x34191228: 9807 LDR R0, [SP, #28]
0x3419122A: 6801 LDR R1, [R0]
0x3419122C: 2002 MOVS R0, #2
0x3419122E: 6248 STR R0, [R1, #36]
0x34191230: 9907 LDR R1, [SP, #28]
0x34191232: 6588 STR R0, [R1, #88]
.L5:
0x34191234: E005 B 46L7 ; 0x34191242
.L6:
0x34191236: 2001 MOVS R0, #1
0x34191238: F88D 0013 STRB.W R0, [SP, #19]
0x3419123C: 9907 LDR R1, [SP, #28]
0x3419123E: 2010 MOVS R0, #16
0x34191240: 65C8 STR R0, [R1, #92]
.L7:
0x34191242: F89D 0013 LDRB.W R0, [SP, #19]
0x34191246: B008 ADD SP, SP, #32
0x34191248: BD80 POP 123R7, PC}
Section .init.TIM2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
TIM2_IRQHandler:
0x3419124A: E7FE B TIM2_IRQHandler ; 0x3419124A
Section .text.HAL_XSPI_AutoPolling from blto2_FSBL_lto.o, size=406, align=4
HAL_XSPI_AutoPolling:
0x3419124C: B580 PUSH 123R7, LR}
0x3419124E: B08A SUB SP, SP, #40
0x34191250: 9009 STR R0, [SP, #36]
0x34191252: 9108 STR R1, [SP, #32]
0x34191254: 9207 STR R2, [SP, #28]
0x34191256: F7EF FD07 BL HAL_GetTick ; 0x34180C68
0x3419125A: 9005 STR R0, [SP, #20]
0x3419125C: 9809 LDR R0, [SP, #36]
0x3419125E: 6800 LDR R0, [R0]
0x34191260: 6C80 LDR R0, [R0, #72]
0x34191262: 9004 STR R0, [SP, #16]
0x34191264: 9809 LDR R0, [SP, #36]
0x34191266: 6800 LDR R0, [R0]
0x34191268: F8D0 0110 LDR.W R0, [R0, #0x0110]
0x3419126C: 9003 STR R0, [SP, #12]
0x3419126E: 9809 LDR R0, [SP, #36]
0x34191270: 6800 LDR R0, [R0]
0x34191272: 6C00 LDR R0, [R0, #64]
0x34191274: 9002 STR R0, [SP, #8]
0x34191276: 9808 LDR R0, [SP, #32]
0x34191278: 6880 LDR R0, [R0, #8]
0x3419127A: B120 CBZ R0, .L1 ; 0x34191286
0x3419127C: 9808 LDR R0, [SP, #32]
0x3419127E: 6880 LDR R0, [R0, #8]
0x34191280: F5B0 0F00 CMP.W R0, #0x800000
0x34191284: D100 BNE 46L2 ; 0x34191288
.L1:
0x34191286: E007 B 46L3 ; 0x34191298
.L2:
0x34191288: F642 305A MOVW R0, #0x2B5A ; 0x34192B5A = .rodata..L.str.95
0x3419128C: F2C3 4019 MOVT R0, #0x3419 ; 0x34192B5A = .rodata..L.str.95
0x34191290: F240 7139 MOVW R1, #0x0739
0x34191294: F7FB FD4C BL assert_failed ; 0x3418CD30
.L3:
0x34191298: 9808 LDR R0, [SP, #32]
0x3419129A: 68C0 LDR R0, [R0, #12]
0x3419129C: F5B0 0F80 CMP.W R0, #0x400000
0x341912A0: D002 BEQ 46L4 ; 0x341912A8
0x341912A2: 9808 LDR R0, [SP, #32]
0x341912A4: 68C0 LDR R0, [R0, #12]
0x341912A6: B900 CBNZ R0, .L5 ; 0x341912AA
.L4:
0x341912A8: E007 B 46L6 ; 0x341912BA
.L5:
0x341912AA: F642 305A MOVW R0, #0x2B5A ; 0x34192B5A = .rodata..L.str.95
0x341912AE: F2C3 4019 MOVT R0, #0x3419 ; 0x34192B5A = .rodata..L.str.95
0x341912B2: F240 713A MOVW R1, #0x073A
0x341912B6: F7FB FD3B BL assert_failed ; 0x3418CD30
.L6:
0x341912BA: 9808 LDR R0, [SP, #32]
0x341912BC: 8A40 LDRH R0, [R0, #18]
0x341912BE: B900 CBNZ R0, .L7 ; 0x341912C2
0x341912C0: E007 B 46L8 ; 0x341912D2
.L7:
0x341912C2: F642 305A MOVW R0, #0x2B5A ; 0x34192B5A = .rodata..L.str.95
0x341912C6: F2C3 4019 MOVT R0, #0x3419 ; 0x34192B5A = .rodata..L.str.95
0x341912CA: F240 713B MOVW R1, #0x073B
0x341912CE: F7FB FD2F BL assert_failed ; 0x3418CD30
.L8:
0x341912D2: 9802 LDR R0, [SP, #8]
0x341912D4: 3001 ADDS R0, #1
0x341912D6: B120 CBZ R0, .L9 ; 0x341912E2
0x341912D8: 9802 LDR R0, [SP, #8]
0x341912DA: 3001 ADDS R0, #1
0x341912DC: 2804 CMP R0, #4
0x341912DE: D800 BHI 46L9 ; 0x341912E2
0x341912E0: E007 B 46L10 ; 0x341912F2
.L9:
0x341912E2: F642 305A MOVW R0, #0x2B5A ; 0x34192B5A = .rodata..L.str.95
0x341912E6: F2C3 4019 MOVT R0, #0x3419 ; 0x34192B5A = .rodata..L.str.95
0x341912EA: F240 713C MOVW R1, #0x073C
0x341912EE: F7FB FD1F BL assert_failed ; 0x3418CD30
.L10:
0x341912F2: 9809 LDR R0, [SP, #36]
0x341912F4: 6D80 LDR R0, [R0, #88]
0x341912F6: 2804 CMP R0, #4
0x341912F8: D169 BNE 46L17 ; 0x341913CE
0x341912FA: 9808 LDR R0, [SP, #32]
0x341912FC: 68C0 LDR R0, [R0, #12]
0x341912FE: F5B0 0F80 CMP.W R0, #0x400000
0x34191302: D164 BNE 46L17 ; 0x341913CE
0x34191304: 9809 LDR R0, [SP, #36]
0x34191306: 9B05 LDR R3, [SP, #20]
0x34191308: 9907 LDR R1, [SP, #28]
0x3419130A: 466A MOV R2, SP
0x3419130C: 6011 STR R1, [R2]
0x3419130E: 2120 MOVS R1, #32
0x34191310: 2200 MOVS R2, #0
0x34191312: F7F9 FB2B BL XSPI_WaitFlagStateUntilTimeout ; 0x3418A96C
0x34191316: F88D 001B STRB.W R0, [SP, #27]
0x3419131A: F89D 001B LDRB.W R0, [SP, #27]
0x3419131E: 2800 CMP R0, #0
0x34191320: D151 BNE 46L15 ; 0x341913C6
0x34191322: 9808 LDR R0, [SP, #32]
0x34191324: 6800 LDR R0, [R0]
0x34191326: 9909 LDR R1, [SP, #36]
0x34191328: 6809 LDR R1, [R1]
0x3419132A: F8C1 0088 STR.W R0, [R1, #136]
0x3419132E: 9808 LDR R0, [SP, #32]
0x34191330: 6840 LDR R0, [R0, #4]
0x34191332: 9909 LDR R1, [SP, #36]
0x34191334: 6809 LDR R1, [R1]
0x34191336: F8C1 0080 STR.W R0, [R1, #128]
0x3419133A: 9808 LDR R0, [SP, #32]
0x3419133C: 6900 LDR R0, [R0, #16]
0x3419133E: 9909 LDR R1, [SP, #36]
0x34191340: 6809 LDR R1, [R1]
0x34191342: F8C1 0090 STR.W R0, [R1, #144]
0x34191346: 9809 LDR R0, [SP, #36]
0x34191348: 6800 LDR R0, [R0]
0x3419134A: 6800 LDR R0, [R0]
0x3419134C: F020 5143 BIC R1, R0, #0x30C00000
0x34191350: 9A08 LDR R2, [SP, #32]
0x34191352: 6890 LDR R0, [R2, #8]
0x34191354: 68D2 LDR R2, [R2, #12]
0x34191356: 4310 ORRS R0, R2
0x34191358: 4308 ORRS R0, R1
0x3419135A: F040 5000 ORR R0, R0, #0x20000000
0x3419135E: 9909 LDR R1, [SP, #36]
0x34191360: 6809 LDR R1, [R1]
0x34191362: 6008 STR R0, [R1]
0x34191364: 9809 LDR R0, [SP, #36]
0x34191366: 68C0 LDR R0, [R0, #12]
0x34191368: F1B0 6F80 CMP.W R0, #0x04000000
0x3419136C: D104 BNE 46L11 ; 0x34191378
0x3419136E: 9804 LDR R0, [SP, #16]
0x34191370: 9909 LDR R1, [SP, #36]
0x34191372: 6809 LDR R1, [R1]
0x34191374: 6488 STR R0, [R1, #72]
0x34191376: E010 B 46L13 ; 0x3419139A
.L11:
0x34191378: 9809 LDR R0, [SP, #36]
0x3419137A: 6800 LDR R0, [R0]
0x3419137C: F8D0 0100 LDR.W R0, [R0, #0x0100]
0x34191380: F410 6FE0 TST R0, #0x0700
0x34191384: D004 BEQ 46L12 ; 0x34191390
0x34191386: 9804 LDR R0, [SP, #16]
0x34191388: 9909 LDR R1, [SP, #36]
0x3419138A: 6809 LDR R1, [R1]
0x3419138C: 6488 STR R0, [R1, #72]
0x3419138E: E004 B 46L13 ; 0x3419139A
.L12:
0x34191390: 9803 LDR R0, [SP, #12]
0x34191392: 9909 LDR R1, [SP, #36]
0x34191394: 6809 LDR R1, [R1]
0x34191396: F8C1 0110 STR.W R0, [R1, #0x0110]
.L13:
0x3419139A: 9809 LDR R0, [SP, #36]
0x3419139C: 9B05 LDR R3, [SP, #20]
0x3419139E: 9907 LDR R1, [SP, #28]
0x341913A0: 466A MOV R2, SP
0x341913A2: 6011 STR R1, [R2]
0x341913A4: 2108 MOVS R1, #8
0x341913A6: 2201 MOVS R2, #1
0x341913A8: F7F9 FAE0 BL XSPI_WaitFlagStateUntilTimeout ; 0x3418A96C
0x341913AC: F88D 001B STRB.W R0, [SP, #27]
0x341913B0: F89D 001B LDRB.W R0, [SP, #27]
0x341913B4: B930 CBNZ R0, .L14 ; 0x341913C4
0x341913B6: 9809 LDR R0, [SP, #36]
0x341913B8: 6801 LDR R1, [R0]
0x341913BA: 2008 MOVS R0, #8
0x341913BC: 6248 STR R0, [R1, #36]
0x341913BE: 9909 LDR R1, [SP, #36]
0x341913C0: 2002 MOVS R0, #2
0x341913C2: 6588 STR R0, [R1, #88]
.L14:
0x341913C4: E002 B 46L16 ; 0x341913CC
.L15:
0x341913C6: 2002 MOVS R0, #2
0x341913C8: F88D 001B STRB.W R0, [SP, #27]
.L16:
0x341913CC: E005 B 46L18 ; 0x341913DA
.L17:
0x341913CE: 2001 MOVS R0, #1
0x341913D0: F88D 001B STRB.W R0, [SP, #27]
0x341913D4: 9909 LDR R1, [SP, #36]
0x341913D6: 2010 MOVS R0, #16
0x341913D8: 65C8 STR R0, [R1, #92]
.L18:
0x341913DA: F89D 001B LDRB.W R0, [SP, #27]
0x341913DE: B00A ADD SP, SP, #40
0x341913E0: BD80 POP 123R7, PC}
Section .init.TIM3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
TIM3_IRQHandler:
0x341913E2: E7FE B TIM3_IRQHandler ; 0x341913E2
Section .text.HAL_XSPI_MemoryMapped from blto2_FSBL_lto.o, size=330, align=4
HAL_XSPI_MemoryMapped:
0x341913E4: B580 PUSH 123R7, LR}
0x341913E6: B086 SUB SP, SP, #24
0x341913E8: 9005 STR R0, [SP, #20]
0x341913EA: 9104 STR R1, [SP, #16]
0x341913EC: F7EF FC3C BL HAL_GetTick ; 0x34180C68
0x341913F0: 9002 STR R0, [SP, #8]
0x341913F2: 9804 LDR R0, [SP, #16]
0x341913F4: 6800 LDR R0, [R0]
0x341913F6: B118 CBZ R0, .L1 ; 0x34191400
0x341913F8: 9804 LDR R0, [SP, #16]
0x341913FA: 6800 LDR R0, [R0]
0x341913FC: 2808 CMP R0, #8
0x341913FE: D100 BNE 46L2 ; 0x34191402
.L1:
0x34191400: E007 B 46L3 ; 0x34191412
.L2:
0x34191402: F642 305A MOVW R0, #0x2B5A ; 0x34192B5A = .rodata..L.str.95
0x34191406: F2C3 4019 MOVT R0, #0x3419 ; 0x34192B5A = .rodata..L.str.95
0x3419140A: F240 71CD MOVW R1, #0x07CD
0x3419140E: F7FB FC8F BL assert_failed ; 0x3418CD30
.L3:
0x34191412: 9804 LDR R0, [SP, #16]
0x34191414: 6880 LDR R0, [R0, #8]
0x34191416: B120 CBZ R0, .L4 ; 0x34191422
0x34191418: 9804 LDR R0, [SP, #16]
0x3419141A: 6880 LDR R0, [R0, #8]
0x3419141C: F1B0 7F00 CMP.W R0, #0x02000000
0x34191420: D100 BNE 46L5 ; 0x34191424
.L4:
0x34191422: E007 B 46L6 ; 0x34191434
.L5:
0x34191424: F642 305A MOVW R0, #0x2B5A ; 0x34192B5A = .rodata..L.str.95
0x34191428: F2C3 4019 MOVT R0, #0x3419 ; 0x34192B5A = .rodata..L.str.95
0x3419142C: F240 71CE MOVW R1, #0x07CE
0x34191430: F7FB FC7E BL assert_failed ; 0x3418CD30
.L6:
0x34191434: 9805 LDR R0, [SP, #20]
0x34191436: 6D80 LDR R0, [R0, #88]
0x34191438: 2804 CMP R0, #4
0x3419143A: D16E BNE 46L16 ; 0x3419151A
0x3419143C: 9805 LDR R0, [SP, #20]
0x3419143E: 9B02 LDR R3, [SP, #8]
0x34191440: 6E01 LDR R1, [R0, #96]
0x34191442: 466A MOV R2, SP
0x34191444: 6011 STR R1, [R2]
0x34191446: 2120 MOVS R1, #32
0x34191448: 2200 MOVS R2, #0
0x3419144A: F7F9 FA8F BL XSPI_WaitFlagStateUntilTimeout ; 0x3418A96C
0x3419144E: F88D 000F STRB.W R0, [SP, #15]
0x34191452: F89D 000F LDRB.W R0, [SP, #15]
0x34191456: 2800 CMP R0, #0
0x34191458: D15E BNE 46L15 ; 0x34191518
0x3419145A: 9905 LDR R1, [SP, #20]
0x3419145C: 2088 MOVS R0, #136
0x3419145E: 6588 STR R0, [R1, #88]
0x34191460: 9804 LDR R0, [SP, #16]
0x34191462: 6880 LDR R0, [R0, #8]
0x34191464: F1B0 7F00 CMP.W R0, #0x02000000
0x34191468: D10B BNE 46L7 ; 0x34191482
0x3419146A: 9805 LDR R0, [SP, #20]
0x3419146C: 6800 LDR R0, [R0]
0x3419146E: 6800 LDR R0, [R0]
0x34191470: F020 7000 BIC R0, R0, #0x02000000
0x34191474: 9904 LDR R1, [SP, #16]
0x34191476: 6889 LDR R1, [R1, #8]
0x34191478: 4308 ORRS R0, R1
0x3419147A: 9905 LDR R1, [SP, #20]
0x3419147C: 6809 LDR R1, [R1]
0x3419147E: 6008 STR R0, [R1]
0x34191480: E01D B 46L11 ; 0x341914BE
.L7:
0x34191482: 9804 LDR R0, [SP, #16]
0x34191484: 68C0 LDR R0, [R0, #12]
0x34191486: B120 CBZ R0, .L8 ; 0x34191492
0x34191488: 9804 LDR R0, [SP, #16]
0x3419148A: 68C0 LDR R0, [R0, #12]
0x3419148C: F1B0 6F80 CMP.W R0, #0x04000000
0x34191490: D100 BNE 46L9 ; 0x34191494
.L8:
0x34191492: E007 B 46L10 ; 0x341914A4
.L9:
0x34191494: F642 305A MOVW R0, #0x2B5A ; 0x34192B5A = .rodata..L.str.95
0x34191498: F2C3 4019 MOVT R0, #0x3419 ; 0x34192B5A = .rodata..L.str.95
0x3419149C: F240 71E2 MOVW R1, #0x07E2
0x341914A0: F7FB FC46 BL assert_failed ; 0x3418CD30
.L10:
0x341914A4: 9805 LDR R0, [SP, #20]
0x341914A6: 6800 LDR R0, [R0]
0x341914A8: 6800 LDR R0, [R0]
0x341914AA: F020 60C0 BIC R0, R0, #0x06000000
0x341914AE: 9A04 LDR R2, [SP, #16]
0x341914B0: 6891 LDR R1, [R2, #8]
0x341914B2: 68D2 LDR R2, [R2, #12]
0x341914B4: 4311 ORRS R1, R2
0x341914B6: 4308 ORRS R0, R1
0x341914B8: 9905 LDR R1, [SP, #20]
0x341914BA: 6809 LDR R1, [R1]
0x341914BC: 6008 STR R0, [R1]
.L11:
0x341914BE: 9804 LDR R0, [SP, #16]
0x341914C0: 6800 LDR R0, [R0]
0x341914C2: 2808 CMP R0, #8
0x341914C4: D11B BNE 46L14 ; 0x341914FE
0x341914C6: 9804 LDR R0, [SP, #16]
0x341914C8: 88C0 LDRH R0, [R0, #6]
0x341914CA: B900 CBNZ R0, .L12 ; 0x341914CE
0x341914CC: E007 B 46L13 ; 0x341914DE
.L12:
0x341914CE: F642 305A MOVW R0, #0x2B5A ; 0x34192B5A = .rodata..L.str.95
0x341914D2: F2C3 4019 MOVT R0, #0x3419 ; 0x34192B5A = .rodata..L.str.95
0x341914D6: F240 71EA MOVW R1, #0x07EA
0x341914DA: F7FB FC29 BL assert_failed ; 0x3418CD30
.L13:
0x341914DE: 9804 LDR R0, [SP, #16]
0x341914E0: 6840 LDR R0, [R0, #4]
0x341914E2: 9905 LDR R1, [SP, #20]
0x341914E4: 6809 LDR R1, [R1]
0x341914E6: F8C1 0130 STR.W R0, [R1, #0x0130]
0x341914EA: 9805 LDR R0, [SP, #20]
0x341914EC: 6801 LDR R1, [R0]
0x341914EE: 2010 MOVS R0, #16
0x341914F0: 6248 STR R0, [R1, #36]
0x341914F2: 9805 LDR R0, [SP, #20]
0x341914F4: 6801 LDR R1, [R0]
0x341914F6: 6808 LDR R0, [R1]
0x341914F8: F440 1080 ORR R0, R0, #0x100000
0x341914FC: 6008 STR R0, [R1]
.L14:
0x341914FE: 9805 LDR R0, [SP, #20]
0x34191500: 6800 LDR R0, [R0]
0x34191502: 6800 LDR R0, [R0]
0x34191504: F020 0108 BIC R1, R0, #8
0x34191508: 9804 LDR R0, [SP, #16]
0x3419150A: 6800 LDR R0, [R0]
0x3419150C: 4308 ORRS R0, R1
0x3419150E: F040 5040 ORR R0, R0, #0x30000000
0x34191512: 9905 LDR R1, [SP, #20]
0x34191514: 6809 LDR R1, [R1]
0x34191516: 6008 STR R0, [R1]
.L15:
0x34191518: E005 B 46L17 ; 0x34191526
.L16:
0x3419151A: 2001 MOVS R0, #1
0x3419151C: F88D 000F STRB.W R0, [SP, #15]
0x34191520: 9905 LDR R1, [SP, #20]
0x34191522: 2010 MOVS R0, #16
0x34191524: 65C8 STR R0, [R1, #92]
.L17:
0x34191526: F89D 000F LDRB.W R0, [SP, #15]
0x3419152A: B006 ADD SP, SP, #24
0x3419152C: BD80 POP 123R7, PC}
Section .init.TIM4_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
TIM4_IRQHandler:
0x3419152E: E7FE B TIM4_IRQHandler ; 0x3419152E
Section .text.HAL_XSPI_Abort from blto2_FSBL_lto.o, size=246, align=4
HAL_XSPI_Abort:
0x34191530: B580 PUSH 123R7, LR}
0x34191532: B084 SUB SP, SP, #16
0x34191534: 9003 STR R0, [SP, #12]
0x34191536: 2000 MOVS R0, #0
0x34191538: F88D 000B STRB.W R0, [SP, #11]
0x3419153C: F7EF FB94 BL HAL_GetTick ; 0x34180C68
0x34191540: 9001 STR R0, [SP, #4]
0x34191542: 9803 LDR R0, [SP, #12]
0x34191544: 6D80 LDR R0, [R0, #88]
0x34191546: 2800 CMP R0, #0
0x34191548: D063 BEQ 46L6 ; 0x34191612
0x3419154A: 9803 LDR R0, [SP, #12]
0x3419154C: 6800 LDR R0, [R0]
0x3419154E: 6800 LDR R0, [R0]
0x34191550: 0740 LSLS R0, R0, #29
0x34191552: 2800 CMP R0, #0
0x34191554: D51D BPL 46L2 ; 0x34191592
0x34191556: 9803 LDR R0, [SP, #12]
0x34191558: 6801 LDR R1, [R0]
0x3419155A: 6808 LDR R0, [R1]
0x3419155C: F020 0004 BIC R0, R0, #4
0x34191560: 6008 STR R0, [R1]
0x34191562: 9803 LDR R0, [SP, #12]
0x34191564: 6D00 LDR R0, [R0, #80]
0x34191566: F7EF FC77 BL HAL_DMA_Abort ; 0x34180E58
0x3419156A: F88D 000B STRB.W R0, [SP, #11]
0x3419156E: F89D 000B LDRB.W R0, [SP, #11]
0x34191572: B110 CBZ R0, .L1 ; 0x3419157A
0x34191574: 9903 LDR R1, [SP, #12]
0x34191576: 2004 MOVS R0, #4
0x34191578: 65C8 STR R0, [R1, #92]
.L1:
0x3419157A: 9803 LDR R0, [SP, #12]
0x3419157C: 6D40 LDR R0, [R0, #84]
0x3419157E: F7EF FC6B BL HAL_DMA_Abort ; 0x34180E58
0x34191582: F88D 000B STRB.W R0, [SP, #11]
0x34191586: F89D 000B LDRB.W R0, [SP, #11]
0x3419158A: B110 CBZ R0, .L2 ; 0x34191592
0x3419158C: 9903 LDR R1, [SP, #12]
0x3419158E: 2004 MOVS R0, #4
0x34191590: 65C8 STR R0, [R1, #92]
.L2:
0x34191592: 9803 LDR R0, [SP, #12]
0x34191594: 6800 LDR R0, [R0]
0x34191596: 6A00 LDR R0, [R0, #32]
0x34191598: 0680 LSLS R0, R0, #26
0x3419159A: 2800 CMP R0, #0
0x3419159C: D52F BPL 46L4 ; 0x341915FE
0x3419159E: 9803 LDR R0, [SP, #12]
0x341915A0: 6801 LDR R1, [R0]
0x341915A2: 6808 LDR R0, [R1]
0x341915A4: F040 0002 ORR R0, R0, #2
0x341915A8: 6008 STR R0, [R1]
0x341915AA: 9803 LDR R0, [SP, #12]
0x341915AC: 9B01 LDR R3, [SP, #4]
0x341915AE: 6E01 LDR R1, [R0, #96]
0x341915B0: 466A MOV R2, SP
0x341915B2: 6011 STR R1, [R2]
0x341915B4: 2102 MOVS R1, #2
0x341915B6: 2201 MOVS R2, #1
0x341915B8: F7F9 F9D8 BL XSPI_WaitFlagStateUntilTimeout ; 0x3418A96C
0x341915BC: F88D 000B STRB.W R0, [SP, #11]
0x341915C0: F89D 000B LDRB.W R0, [SP, #11]
0x341915C4: B9D0 CBNZ R0, .L3 ; 0x341915FC
0x341915C6: 9803 LDR R0, [SP, #12]
0x341915C8: 6801 LDR R1, [R0]
0x341915CA: 2002 MOVS R0, #2
0x341915CC: 6248 STR R0, [R1, #36]
0x341915CE: 9803 LDR R0, [SP, #12]
0x341915D0: 9B01 LDR R3, [SP, #4]
0x341915D2: 6E01 LDR R1, [R0, #96]
0x341915D4: 466A MOV R2, SP
0x341915D6: 6011 STR R1, [R2]
0x341915D8: 2120 MOVS R1, #32
0x341915DA: 2200 MOVS R2, #0
0x341915DC: F7F9 F9C6 BL XSPI_WaitFlagStateUntilTimeout ; 0x3418A96C
0x341915E0: F88D 000B STRB.W R0, [SP, #11]
0x341915E4: F89D 000B LDRB.W R0, [SP, #11]
0x341915E8: B940 CBNZ R0, .L3 ; 0x341915FC
0x341915EA: 9803 LDR R0, [SP, #12]
0x341915EC: 6801 LDR R1, [R0]
0x341915EE: 6808 LDR R0, [R1]
0x341915F0: F020 5040 BIC R0, R0, #0x30000000
0x341915F4: 6008 STR R0, [R1]
0x341915F6: 9903 LDR R1, [SP, #12]
0x341915F8: 2002 MOVS R0, #2
0x341915FA: 6588 STR R0, [R1, #88]
.L3:
0x341915FC: E008 B 46L5 ; 0x34191610
.L4:
0x341915FE: 9803 LDR R0, [SP, #12]
0x34191600: 6801 LDR R1, [R0]
0x34191602: 6808 LDR R0, [R1]
0x34191604: F020 5040 BIC R0, R0, #0x30000000
0x34191608: 6008 STR R0, [R1]
0x3419160A: 9903 LDR R1, [SP, #12]
0x3419160C: 2002 MOVS R0, #2
0x3419160E: 6588 STR R0, [R1, #88]
.L5:
0x34191610: E005 B 46L7 ; 0x3419161E
.L6:
0x34191612: 2001 MOVS R0, #1
0x34191614: F88D 000B STRB.W R0, [SP, #11]
0x34191618: 9903 LDR R1, [SP, #12]
0x3419161A: 2010 MOVS R0, #16
0x3419161C: 65C8 STR R0, [R1, #92]
.L7:
0x3419161E: F89D 000B LDRB.W R0, [SP, #11]
0x34191622: B004 ADD SP, SP, #16
0x34191624: BD80 POP 123R7, PC}
Section .init.TIM5_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
TIM5_IRQHandler:
0x34191626: E7FE B TIM5_IRQHandler ; 0x34191626
Section .text.HAL_XSPIM_Config from blto2_FSBL_lto.o, size=878, align=4
HAL_XSPIM_Config:
0x34191628: B580 PUSH 123R7, LR}
0x3419162A: B092 SUB SP, SP, #72
0x3419162C: 9010 STR R0, [SP, #64]
0x3419162E: 910F STR R1, [SP, #60]
0x34191630: 920E STR R2, [SP, #56]
0x34191632: 2000 MOVS R0, #0
0x34191634: F88D 0037 STRB.W R0, [SP, #55]
0x34191638: F88D 0035 STRB.W R0, [SP, #53]
0x3419163C: A804 ADD R0, SP, #16
0x3419163E: 2124 MOVS R1, #36
0x34191640: F7FB F98C BL __aeabi_memclr ; 0x3418C95C
0x34191644: 980F LDR R0, [SP, #60]
0x34191646: 6800 LDR R0, [R0]
0x34191648: B138 CBZ R0, .L1 ; 0x3419165A
0x3419164A: 980F LDR R0, [SP, #60]
0x3419164C: 6800 LDR R0, [R0]
0x3419164E: 2810 CMP R0, #16
0x34191650: D003 BEQ 46L1 ; 0x3419165A
0x34191652: 980F LDR R0, [SP, #60]
0x34191654: 6800 LDR R0, [R0]
0x34191656: 2870 CMP R0, #112
0x34191658: D100 BNE 46L2 ; 0x3419165C
.L1:
0x3419165A: E007 B 46L3 ; 0x3419166C
.L2:
0x3419165C: F642 305A MOVW R0, #0x2B5A ; 0x34192B5A = .rodata..L.str.95
0x34191660: F2C3 4019 MOVT R0, #0x3419 ; 0x34192B5A = .rodata..L.str.95
0x34191664: F640 310D MOVW R1, #0x0B0D
0x34191668: F7FB FB62 BL assert_failed ; 0x3418CD30
.L3:
0x3419166C: 980F LDR R0, [SP, #60]
0x3419166E: 6840 LDR R0, [R0, #4]
0x34191670: B118 CBZ R0, .L4 ; 0x3419167A
0x34191672: 980F LDR R0, [SP, #60]
0x34191674: 6840 LDR R0, [R0, #4]
0x34191676: 2801 CMP R0, #1
0x34191678: D100 BNE 46L5 ; 0x3419167C
.L4:
0x3419167A: E007 B 46L6 ; 0x3419168C
.L5:
0x3419167C: F642 305A MOVW R0, #0x2B5A ; 0x34192B5A = .rodata..L.str.95
0x34191680: F2C3 4019 MOVT R0, #0x3419 ; 0x34192B5A = .rodata..L.str.95
0x34191684: F640 310E MOVW R1, #0x0B0E
0x34191688: F7FB FB52 BL assert_failed ; 0x3418CD30
.L6:
0x3419168C: 980F LDR R0, [SP, #60]
0x3419168E: 6880 LDR R0, [R0, #8]
0x34191690: B128 CBZ R0, .L7 ; 0x3419169E
0x34191692: 980F LDR R0, [SP, #60]
0x34191694: 6880 LDR R0, [R0, #8]
0x34191696: F5B0 7F80 CMP.W R0, #0x0100
0x3419169A: D800 BHI 46L7 ; 0x3419169E
0x3419169C: E007 B 46L8 ; 0x341916AE
.L7:
0x3419169E: F642 305A MOVW R0, #0x2B5A ; 0x34192B5A = .rodata..L.str.95
0x341916A2: F2C3 4019 MOVT R0, #0x3419 ; 0x34192B5A = .rodata..L.str.95
0x341916A6: F640 310F MOVW R1, #0x0B0F
0x341916AA: F7FB FB41 BL assert_failed ; 0x3418CD30
.L8:
0x341916AE: 2000 MOVS R0, #0
0x341916B0: F88D 0036 STRB.W R0, [SP, #54]
.L9:
0x341916B4: F89D 0036 LDRB.W R0, [SP, #54]
0x341916B8: 2802 CMP R0, #2
0x341916BA: D810 BHI 46L10 ; 0x341916DE
0x341916BC: F89D 1036 LDRB.W R1, [SP, #54]
0x341916C0: 1C48 ADDS R0, R1, #1
0x341916C2: EB01 0241 ADD.W R2, R1, R1, LSL #1
0x341916C6: A904 ADD R1, SP, #16
0x341916C8: EB01 0182 ADD.W R1, R1, R2, LSL #2
0x341916CC: B2C0 UXTB R0, R0
0x341916CE: F000 F963 BL XSPIM_GetConfig ; 0x34191998
0x341916D2: F89D 0036 LDRB.W R0, [SP, #54]
0x341916D6: 3001 ADDS R0, #1
0x341916D8: F88D 0036 STRB.W R0, [SP, #54]
0x341916DC: E7EA B 46L9 ; 0x341916B4
.L10:
0x341916DE: 2020 MOVS R0, #32
0x341916E0: F7F9 FBDC BL LL_AHB5_GRP1_IsEnabledClock ; 0x3418AE9C
0x341916E4: B1A0 CBZ R0, .L11 ; 0x34191710
0x341916E6: F245 0000 MOVW R0, #0x5000
0x341916EA: F6C5 0002 MOVT R0, #0x5802
0x341916EE: 6800 LDR R0, [R0]
0x341916F0: 07C0 LSLS R0, R0, #31
0x341916F2: B168 CBZ R0, .L11 ; 0x34191710
0x341916F4: F245 0100 MOVW R1, #0x5000
0x341916F8: F6C5 0102 MOVT R1, #0x5802
0x341916FC: 6808 LDR R0, [R1]
0x341916FE: F020 0001 BIC R0, R0, #1
0x34191702: 6008 STR R0, [R1]
0x34191704: F89D 0035 LDRB.W R0, [SP, #53]
0x34191708: F040 0001 ORR R0, R0, #1
0x3419170C: F88D 0035 STRB.W R0, [SP, #53]
.L11:
0x34191710: F44F 5080 MOV.W R0, #0x1000
0x34191714: F7F9 FBC2 BL LL_AHB5_GRP1_IsEnabledClock ; 0x3418AE9C
0x34191718: B1A0 CBZ R0, .L12 ; 0x34191744
0x3419171A: F24A 0000 MOVW R0, #0xA000
0x3419171E: F6C5 0002 MOVT R0, #0x5802
0x34191722: 6800 LDR R0, [R0]
0x34191724: 07C0 LSLS R0, R0, #31
0x34191726: B168 CBZ R0, .L12 ; 0x34191744
0x34191728: F24A 0100 MOVW R1, #0xA000
0x3419172C: F6C5 0102 MOVT R1, #0x5802
0x34191730: 6808 LDR R0, [R1]
0x34191732: F020 0001 BIC R0, R0, #1
0x34191736: 6008 STR R0, [R1]
0x34191738: F89D 0035 LDRB.W R0, [SP, #53]
0x3419173C: F040 0002 ORR R0, R0, #2
0x34191740: F88D 0035 STRB.W R0, [SP, #53]
.L12:
0x34191744: F44F 3000 MOV.W R0, #0x020000
0x34191748: F7F9 FBA8 BL LL_AHB5_GRP1_IsEnabledClock ; 0x3418AE9C
0x3419174C: B1A0 CBZ R0, .L13 ; 0x34191778
0x3419174E: F24D 0000 MOVW R0, #0xD000
0x34191752: F6C5 0002 MOVT R0, #0x5802
0x34191756: 6800 LDR R0, [R0]
0x34191758: 07C0 LSLS R0, R0, #31
0x3419175A: B168 CBZ R0, .L13 ; 0x34191778
0x3419175C: F24D 0100 MOVW R1, #0xD000
0x34191760: F6C5 0102 MOVT R1, #0x5802
0x34191764: 6808 LDR R0, [R1]
0x34191766: F020 0001 BIC R0, R0, #1
0x3419176A: 6008 STR R0, [R1]
0x3419176C: F89D 0035 LDRB.W R0, [SP, #53]
0x34191770: F040 0004 ORR R0, R0, #4
0x34191774: F88D 0035 STRB.W R0, [SP, #53]
.L13:
0x34191778: 9810 LDR R0, [SP, #64]
0x3419177A: 6800 LDR R0, [R0]
0x3419177C: F245 0100 MOVW R1, #0x5000
0x34191780: F6C5 0102 MOVT R1, #0x5802
0x34191784: 4288 CMP R0, R1
0x34191786: D103 BNE 46L14 ; 0x34191790
0x34191788: 980F LDR R0, [SP, #60]
0x3419178A: 6840 LDR R0, [R0, #4]
0x3419178C: 9005 STR R0, [SP, #20]
0x3419178E: E02C B 46L19 ; 0x341917EA
.L14:
0x34191790: 9810 LDR R0, [SP, #64]
0x34191792: 6800 LDR R0, [R0]
0x34191794: F24A 0100 MOVW R1, #0xA000
0x34191798: F6C5 0102 MOVT R1, #0x5802
0x3419179C: 4288 CMP R0, R1
0x3419179E: D103 BNE 46L15 ; 0x341917A8
0x341917A0: 980F LDR R0, [SP, #60]
0x341917A2: 6840 LDR R0, [R0, #4]
0x341917A4: 9008 STR R0, [SP, #32]
0x341917A6: E020 B 46L19 ; 0x341917EA
.L15:
0x341917A8: 9810 LDR R0, [SP, #64]
0x341917AA: 6800 LDR R0, [R0]
0x341917AC: F24D 0100 MOVW R1, #0xD000
0x341917B0: F6C5 0102 MOVT R1, #0x5802
0x341917B4: 4288 CMP R0, R1
0x341917B6: D10F BNE 46L18 ; 0x341917D8
0x341917B8: 980F LDR R0, [SP, #60]
0x341917BA: 6840 LDR R0, [R0, #4]
0x341917BC: B918 CBNZ R0, .L16 ; 0x341917C6
0x341917BE: 2001 MOVS R0, #1
0x341917C0: 9005 STR R0, [SP, #20]
0x341917C2: 9008 STR R0, [SP, #32]
0x341917C4: E007 B 46L17 ; 0x341917D6
.L16:
0x341917C6: 980F LDR R0, [SP, #60]
0x341917C8: 6840 LDR R0, [R0, #4]
0x341917CA: 2801 CMP R0, #1
0x341917CC: D103 BNE 46L17 ; 0x341917D6
0x341917CE: 2000 MOVS R0, #0
0x341917D0: 9005 STR R0, [SP, #20]
0x341917D2: 9008 STR R0, [SP, #32]
0x341917D4: E7FF B 46L17 ; 0x341917D6
.L17:
0x341917D6: E008 B 46L19 ; 0x341917EA
.L18:
0x341917D8: 9910 LDR R1, [SP, #64]
0x341917DA: 6DC8 LDR R0, [R1, #92]
0x341917DC: F040 0008 ORR R0, R0, #8
0x341917E0: 65C8 STR R0, [R1, #92]
0x341917E2: 2001 MOVS R0, #1
0x341917E4: F88D 0047 STRB.W R0, [SP, #71]
0x341917E8: E0D1 B 46L41 ; 0x3419198E
.L19:
0x341917EA: F24B 4000 MOVW R0, #0xB400
0x341917EE: F6C5 0002 MOVT R0, #0x5802
0x341917F2: 6800 LDR R0, [R0]
0x341917F4: 9003 STR R0, [SP, #12]
0x341917F6: F89D 000C LDRB.W R0, [SP, #12]
0x341917FA: 06C0 LSLS R0, R0, #27
0x341917FC: 2800 CMP R0, #0
0x341917FE: D514 BPL 46L24 ; 0x3419182A
0x34191800: F89D 000C LDRB.W R0, [SP, #12]
0x34191804: 0680 LSLS R0, R0, #26
0x34191806: 2800 CMP R0, #0
0x34191808: D502 BPL 46L20 ; 0x34191810
0x3419180A: 2070 MOVS R0, #112
0x3419180C: 9002 STR R0, [SP, #8]
0x3419180E: E001 B 46L21 ; 0x34191814
.L20:
0x34191810: 2010 MOVS R0, #16
0x34191812: 9002 STR R0, [SP, #8]
.L21:
0x34191814: F89D 000C LDRB.W R0, [SP, #12]
0x34191818: 0640 LSLS R0, R0, #25
0x3419181A: 2800 CMP R0, #0
0x3419181C: D502 BPL 46L22 ; 0x34191824
0x3419181E: 2070 MOVS R0, #112
0x34191820: 9001 STR R0, [SP, #4]
0x34191822: E001 B 46L23 ; 0x34191828
.L22:
0x34191824: 2010 MOVS R0, #16
0x34191826: 9001 STR R0, [SP, #4]
.L23:
0x34191828: E002 B 46L25 ; 0x34191830
.L24:
0x3419182A: 2000 MOVS R0, #0
0x3419182C: 9002 STR R0, [SP, #8]
0x3419182E: 9001 STR R0, [SP, #4]
.L25:
0x34191830: F24B 4100 MOVW R1, #0xB400
0x34191834: F6C5 0102 MOVT R1, #0x5802
0x34191838: 2000 MOVS R0, #0
0x3419183A: 6008 STR R0, [R1]
0x3419183C: 6808 LDR R0, [R1]
0x3419183E: F420 007F BIC R0, R0, #0xFF0000
0x34191842: 9A0F LDR R2, [SP, #60]
0x34191844: 6893 LDR R3, [R2, #8]
0x34191846: 2200 MOVS R2, #0
0x34191848: F6CF 72FF MOVT R2, #0xFFFF
0x3419184C: EB02 4203 ADD.W R2, R2, R3, LSL #16
0x34191850: 4310 ORRS R0, R2
0x34191852: 6008 STR R0, [R1]
0x34191854: 9810 LDR R0, [SP, #64]
0x34191856: 6800 LDR R0, [R0]
0x34191858: F245 0100 MOVW R1, #0x5000
0x3419185C: F6C5 0102 MOVT R1, #0x5802
0x34191860: 4288 CMP R0, R1
0x34191862: D103 BNE 46L26 ; 0x3419186C
0x34191864: 980F LDR R0, [SP, #60]
0x34191866: 6800 LDR R0, [R0]
0x34191868: 9002 STR R0, [SP, #8]
0x3419186A: E00B B 46L27 ; 0x34191884
.L26:
0x3419186C: 9810 LDR R0, [SP, #64]
0x3419186E: 6800 LDR R0, [R0]
0x34191870: F24A 0100 MOVW R1, #0xA000
0x34191874: F6C5 0102 MOVT R1, #0x5802
0x34191878: 4288 CMP R0, R1
0x3419187A: D103 BNE 46L27 ; 0x34191884
0x3419187C: 980F LDR R0, [SP, #60]
0x3419187E: 6800 LDR R0, [R0]
0x34191880: 9001 STR R0, [SP, #4]
0x34191882: E7FF B 46L27 ; 0x34191884
.L27:
0x34191884: 2000 MOVS R0, #0
0x34191886: 9000 STR R0, [SP, #0]
0x34191888: 9802 LDR R0, [SP, #8]
0x3419188A: B908 CBNZ R0, .L28 ; 0x34191890
0x3419188C: 9801 LDR R0, [SP, #4]
0x3419188E: B110 CBZ R0, .L29 ; 0x34191896
.L28:
0x34191890: 2010 MOVS R0, #16
0x34191892: 9000 STR R0, [SP, #0]
0x34191894: E002 B 46L30 ; 0x3419189C
.L29:
0x34191896: 2010 MOVS R0, #16
0x34191898: 9002 STR R0, [SP, #8]
0x3419189A: 9001 STR R0, [SP, #4]
.L30:
0x3419189C: 9803 LDR R0, [SP, #12]
0x3419189E: F020 0070 BIC R0, R0, #112
0x341918A2: 9003 STR R0, [SP, #12]
0x341918A4: 9800 LDR R0, [SP, #0]
0x341918A6: 2810 CMP R0, #16
0x341918A8: D103 BNE 46L31 ; 0x341918B2
0x341918AA: 9803 LDR R0, [SP, #12]
0x341918AC: F040 0010 ORR R0, R0, #16
0x341918B0: 9003 STR R0, [SP, #12]
.L31:
0x341918B2: 9802 LDR R0, [SP, #8]
0x341918B4: 2870 CMP R0, #112
0x341918B6: D103 BNE 46L32 ; 0x341918C0
0x341918B8: 9803 LDR R0, [SP, #12]
0x341918BA: F040 0020 ORR R0, R0, #32
0x341918BE: 9003 STR R0, [SP, #12]
.L32:
0x341918C0: 9801 LDR R0, [SP, #4]
0x341918C2: 2870 CMP R0, #112
0x341918C4: D103 BNE 46L33 ; 0x341918CE
0x341918C6: 9803 LDR R0, [SP, #12]
0x341918C8: F040 0040 ORR R0, R0, #64
0x341918CC: 9003 STR R0, [SP, #12]
.L33:
0x341918CE: F24B 4100 MOVW R1, #0xB400
0x341918D2: F6C5 0102 MOVT R1, #0x5802
0x341918D6: 6808 LDR R0, [R1]
0x341918D8: 9A03 LDR R2, [SP, #12]
0x341918DA: 0912 LSRS R2, R2, #4
0x341918DC: F362 1006 BFI R0, R2, #4, #3
0x341918E0: 6008 STR R0, [R1]
0x341918E2: 2000 MOVS R0, #0
0x341918E4: F88D 0036 STRB.W R0, [SP, #54]
.L34:
0x341918E8: F89D 0036 LDRB.W R0, [SP, #54]
0x341918EC: BB28 CBNZ R0, .L37 ; 0x3419193A
0x341918EE: F89D 0036 LDRB.W R0, [SP, #54]
0x341918F2: EB00 0140 ADD.W R1, R0, R0, LSL #1
0x341918F6: A804 ADD R0, SP, #16
0x341918F8: EB00 0181 ADD.W R1, R0, R1, LSL #2
0x341918FC: 6848 LDR R0, [R1, #4]
0x341918FE: 6909 LDR R1, [R1, #16]
0x34191900: 4288 CMP R0, R1
0x34191902: D108 BNE 46L35 ; 0x34191916
0x34191904: F24B 4100 MOVW R1, #0xB400
0x34191908: F6C5 0102 MOVT R1, #0x5802
0x3419190C: 6808 LDR R0, [R1]
0x3419190E: F040 0001 ORR R0, R0, #1
0x34191912: 6008 STR R0, [R1]
0x34191914: E7FF B 46L35 ; 0x34191916
.L35:
0x34191916: 9805 LDR R0, [SP, #20]
0x34191918: 2801 CMP R0, #1
0x3419191A: D108 BNE 46L36 ; 0x3419192E
0x3419191C: F24B 4100 MOVW R1, #0xB400
0x34191920: F6C5 0102 MOVT R1, #0x5802
0x34191924: 6808 LDR R0, [R1]
0x34191926: F040 0002 ORR R0, R0, #2
0x3419192A: 6008 STR R0, [R1]
0x3419192C: E7FF B 46L36 ; 0x3419192E
.L36:
0x3419192E: F89D 0036 LDRB.W R0, [SP, #54]
0x34191932: 3001 ADDS R0, #1
0x34191934: F88D 0036 STRB.W R0, [SP, #54]
0x34191938: E7D6 B 46L34 ; 0x341918E8
.L37:
0x3419193A: F89D 0035 LDRB.W R0, [SP, #53]
0x3419193E: 07C0 LSLS R0, R0, #31
0x34191940: B138 CBZ R0, .L38 ; 0x34191952
0x34191942: F245 0100 MOVW R1, #0x5000
0x34191946: F6C5 0102 MOVT R1, #0x5802
0x3419194A: 6808 LDR R0, [R1]
0x3419194C: F040 0001 ORR R0, R0, #1
0x34191950: 6008 STR R0, [R1]
.L38:
0x34191952: F89D 0035 LDRB.W R0, [SP, #53]
0x34191956: 0780 LSLS R0, R0, #30
0x34191958: 2800 CMP R0, #0
0x3419195A: D507 BPL 46L39 ; 0x3419196C
0x3419195C: F24A 0100 MOVW R1, #0xA000
0x34191960: F6C5 0102 MOVT R1, #0x5802
0x34191964: 6808 LDR R0, [R1]
0x34191966: F040 0001 ORR R0, R0, #1
0x3419196A: 6008 STR R0, [R1]
.L39:
0x3419196C: F89D 0035 LDRB.W R0, [SP, #53]
0x34191970: 0740 LSLS R0, R0, #29
0x34191972: 2800 CMP R0, #0
0x34191974: D507 BPL 46L40 ; 0x34191986
0x34191976: F24D 0100 MOVW R1, #0xD000
0x3419197A: F6C5 0102 MOVT R1, #0x5802
0x3419197E: 6808 LDR R0, [R1]
0x34191980: F040 0001 ORR R0, R0, #1
0x34191984: 6008 STR R0, [R1]
.L40:
0x34191986: F89D 0037 LDRB.W R0, [SP, #55]
0x3419198A: F88D 0047 STRB.W R0, [SP, #71]
.L41:
0x3419198E: F89D 0047 LDRB.W R0, [SP, #71]
0x34191992: B012 ADD SP, SP, #72
0x34191994: BD80 POP 123R7, PC}
Section .init.TIM6_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
TIM6_IRQHandler:
0x34191996: E7FE B TIM6_IRQHandler ; 0x34191996
Section .text.XSPIM_GetConfig from blto2_FSBL_lto.o, size=210, align=4
XSPIM_GetConfig:
0x34191998: B084 SUB SP, SP, #16
0x3419199A: F88D 000F STRB.W R0, [SP, #15]
0x3419199E: 9102 STR R1, [SP, #8]
0x341919A0: F89D 000F LDRB.W R0, [SP, #15]
0x341919A4: 2801 CMP R0, #1
0x341919A6: D12B BNE 46L6 ; 0x34191A00
0x341919A8: F24B 4000 MOVW R0, #0xB400
0x341919AC: F6C5 0002 MOVT R0, #0x5802
0x341919B0: 6800 LDR R0, [R0]
0x341919B2: 0780 LSLS R0, R0, #30
0x341919B4: 2800 CMP R0, #0
0x341919B6: D403 BMI 46L1 ; 0x341919C0
0x341919B8: 9902 LDR R1, [SP, #8]
0x341919BA: 2000 MOVS R0, #0
0x341919BC: 6048 STR R0, [R1, #4]
0x341919BE: E002 B 46L2 ; 0x341919C6
.L1:
0x341919C0: 9902 LDR R1, [SP, #8]
0x341919C2: 2001 MOVS R0, #1
0x341919C4: 6048 STR R0, [R1, #4]
.L2:
0x341919C6: F24B 4000 MOVW R0, #0xB400
0x341919CA: F6C5 0002 MOVT R0, #0x5802
0x341919CE: 6800 LDR R0, [R0]
0x341919D0: F000 0010 AND R0, R0, #16
0x341919D4: 2810 CMP R0, #16
0x341919D6: D003 BEQ 46L3 ; 0x341919E0
0x341919D8: 9902 LDR R1, [SP, #8]
0x341919DA: 2000 MOVS R0, #0
0x341919DC: 6008 STR R0, [R1]
0x341919DE: E00E B 46L5 ; 0x341919FE
.L3:
0x341919E0: F24B 4000 MOVW R0, #0xB400
0x341919E4: F6C5 0002 MOVT R0, #0x5802
0x341919E8: 6800 LDR R0, [R0]
0x341919EA: 0680 LSLS R0, R0, #26
0x341919EC: 2800 CMP R0, #0
0x341919EE: D503 BPL 46L4 ; 0x341919F8
0x341919F0: 9902 LDR R1, [SP, #8]
0x341919F2: 2070 MOVS R0, #112
0x341919F4: 6008 STR R0, [R1]
0x341919F6: E002 B 46L5 ; 0x341919FE
.L4:
0x341919F8: 9902 LDR R1, [SP, #8]
0x341919FA: 2010 MOVS R0, #16
0x341919FC: 6008 STR R0, [R1]
.L5:
0x341919FE: E032 B 46L11 ; 0x34191A66
.L6:
0x34191A00: F24B 4000 MOVW R0, #0xB400
0x34191A04: F6C5 0002 MOVT R0, #0x5802
0x34191A08: 6801 LDR R1, [R0]
0x34191A0A: F001 0101 AND R1, R1, #1
0x34191A0E: 9101 STR R1, [SP, #4]
0x34191A10: 6800 LDR R0, [R0]
0x34191A12: F3C0 0040 UBFX R0, R0, #1, #1
0x34191A16: 9000 STR R0, [SP, #0]
0x34191A18: 9801 LDR R0, [SP, #4]
0x34191A1A: 9900 LDR R1, [SP, #0]
0x34191A1C: 4288 CMP R0, R1
0x34191A1E: D003 BEQ 46L7 ; 0x34191A28
0x34191A20: 9902 LDR R1, [SP, #8]
0x34191A22: 2000 MOVS R0, #0
0x34191A24: 6048 STR R0, [R1, #4]
0x34191A26: E002 B 46L8 ; 0x34191A2E
.L7:
0x34191A28: 9902 LDR R1, [SP, #8]
0x34191A2A: 2001 MOVS R0, #1
0x34191A2C: 6048 STR R0, [R1, #4]
.L8:
0x34191A2E: F24B 4000 MOVW R0, #0xB400
0x34191A32: F6C5 0002 MOVT R0, #0x5802
0x34191A36: 6800 LDR R0, [R0]
0x34191A38: F000 0010 AND R0, R0, #16
0x34191A3C: 2810 CMP R0, #16
0x34191A3E: D003 BEQ 46L9 ; 0x34191A48
0x34191A40: 9902 LDR R1, [SP, #8]
0x34191A42: 2000 MOVS R0, #0
0x34191A44: 6008 STR R0, [R1]
0x34191A46: E00E B 46L11 ; 0x34191A66
.L9:
0x34191A48: F24B 4000 MOVW R0, #0xB400
0x34191A4C: F6C5 0002 MOVT R0, #0x5802
0x34191A50: 6800 LDR R0, [R0]
0x34191A52: 0640 LSLS R0, R0, #25
0x34191A54: 2800 CMP R0, #0
0x34191A56: D503 BPL 46L10 ; 0x34191A60
0x34191A58: 9902 LDR R1, [SP, #8]
0x34191A5A: 2070 MOVS R0, #112
0x34191A5C: 6008 STR R0, [R1]
0x34191A5E: E002 B 46L11 ; 0x34191A66
.L10:
0x34191A60: 9902 LDR R1, [SP, #8]
0x34191A62: 2010 MOVS R0, #16
0x34191A64: 6008 STR R0, [R1]
.L11:
0x34191A66: B004 ADD SP, SP, #16
0x34191A68: 4770 BX LR
Section .init.TIM7_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
TIM7_IRQHandler:
0x34191A6A: E7FE B TIM7_IRQHandler ; 0x34191A6A
Section .text.BOOT_Application from blto2_FSBL_lto.o, size=34, align=4
BOOT_Application:
0x34191A6C: B580 PUSH 123R7, LR}
0x34191A6E: B082 SUB SP, SP, #8
0x34191A70: F000 F80E BL MapMemory ; 0x34191A90
0x34191A74: F88D 0007 STRB.W R0, [SP, #7]
0x34191A78: F89D 0007 LDRB.W R0, [SP, #7]
0x34191A7C: B918 CBNZ R0, .L1 ; 0x34191A86
0x34191A7E: F7F9 FA1B BL JumpToApplication ; 0x3418AEB8
0x34191A82: F88D 0007 STRB.W R0, [SP, #7]
.L1:
0x34191A86: F89D 0007 LDRB.W R0, [SP, #7]
0x34191A8A: B002 ADD SP, SP, #8
0x34191A8C: BD80 POP 123R7, PC}
Section .init.TIM8_BRK_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
TIM8_BRK_IRQHandler:
0x34191A8E: E7FE B TIM8_BRK_IRQHandler ; 0x34191A8E
Section .text.MapMemory from blto2_FSBL_lto.o, size=94, align=4
MapMemory:
0x34191A90: B580 PUSH 123R7, LR}
0x34191A92: B082 SUB SP, SP, #8
0x34191A94: 2000 MOVS R0, #0
0x34191A96: F88D 0007 STRB.W R0, [SP, #7]
0x34191A9A: F88D 0006 STRB.W R0, [SP, #6]
.L1:
0x34191A9E: F89D 0006 LDRB.W R0, [SP, #6]
0x34191AA2: BB00 CBNZ R0, .L7 ; 0x34191AE6
0x34191AA4: F89D 0006 LDRB.W R0, [SP, #6]
0x34191AA8: 2100 MOVS R1, #0
0x34191AAA: F7FA FE59 BL EXTMEM_MemoryMappedMode ; 0x3418C760
0x34191AAE: 4601 MOV R1, R0
0x34191AB0: 1C48 ADDS R0, R1, #1
0x34191AB2: 9100 STR R1, [SP, #0]
0x34191AB4: B110 CBZ R0, .L2 ; 0x34191ABC
0x34191AB6: 9800 LDR R0, [SP, #0]
0x34191AB8: B158 CBZ R0, .L4 ; 0x34191AD2
0x34191ABA: E00B B 46L5 ; 0x34191AD4
.L2:
0x34191ABC: F89D 0006 LDRB.W R0, [SP, #6]
0x34191AC0: B918 CBNZ R0, .L3 ; 0x34191ACA
0x34191AC2: 2004 MOVS R0, #4
0x34191AC4: F88D 0007 STRB.W R0, [SP, #7]
0x34191AC8: E003 B 46L4 ; 0x34191AD2
.L3:
0x34191ACA: F89D 0006 LDRB.W R0, [SP, #6]
0x34191ACE: F000 FF79 BL EXTMEM_DeInit ; 0x341929C4
.L4:
0x34191AD2: E002 B 46L6 ; 0x34191ADA
.L5:
0x34191AD4: 2003 MOVS R0, #3
0x34191AD6: F88D 0007 STRB.W R0, [SP, #7]
.L6:
0x34191ADA: F89D 0006 LDRB.W R0, [SP, #6]
0x34191ADE: 3001 ADDS R0, #1
0x34191AE0: F88D 0006 STRB.W R0, [SP, #6]
0x34191AE4: E7DB B 46L1 ; 0x34191A9E
.L7:
0x34191AE6: F89D 0007 LDRB.W R0, [SP, #7]
0x34191AEA: B002 ADD SP, SP, #8
0x34191AEC: BD80 POP 123R7, PC}
Section .init.TIM8_UP_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
TIM8_UP_IRQHandler:
0x34191AEE: E7FE B TIM8_UP_IRQHandler ; 0x34191AEE
0x34191AF0: B580 PUSH 123R7, LR}
0x34191AF2: B084 SUB SP, SP, #16
0x34191AF4: 9003 STR R0, [SP, #12]
0x34191AF6: 9102 STR R1, [SP, #8]
0x34191AF8: 2000 MOVS R0, #0
0x34191AFA: F88D 0006 STRB.W R0, [SP, #6]
.L1:
0x34191AFE: 9802 LDR R0, [SP, #8]
0x34191B00: 2100 MOVS R1, #0
0x34191B02: 6001 STR R1, [R0]
0x34191B04: 9803 LDR R0, [SP, #12]
0x34191B06: 3008 ADDS R0, #8
0x34191B08: 9A02 LDR R2, [SP, #8]
0x34191B0A: 2308 MOVS R3, #8
0x34191B0C: F000 FDFE BL SAL_XSPI_GetSFDP ; 0x3419270C
0x34191B10: B118 CBZ R0, .L2 ; 0x34191B1A
0x34191B12: 2003 MOVS R0, #3
0x34191B14: F88D 0007 STRB.W R0, [SP, #7]
0x34191B18: E025 B 46L7 ; 0x34191B66
.L2:
0x34191B1A: 9803 LDR R0, [SP, #12]
0x34191B1C: 9902 LDR R1, [SP, #8]
0x34191B1E: 6809 LDR R1, [R1]
0x34191B20: F7F9 FA7C BL CheckSFDP_Signature ; 0x3418B01C
0x34191B24: 4601 MOV R1, R0
0x34191B26: 9100 STR R1, [SP, #0]
0x34191B28: B118 CBZ R0, .L3 ; 0x34191B32
0x34191B2A: 9800 LDR R0, [SP, #0]
0x34191B2C: 2805 CMP R0, #5
0x34191B2E: D007 BEQ 46L4 ; 0x34191B40
0x34191B30: E00F B 46L5 ; 0x34191B52
.L3:
0x34191B32: 2000 MOVS R0, #0
0x34191B34: F88D 0007 STRB.W R0, [SP, #7]
0x34191B38: 2002 MOVS R0, #2
0x34191B3A: F88D 0006 STRB.W R0, [SP, #6]
0x34191B3E: E00E B 46L6 ; 0x34191B5E
.L4:
0x34191B40: 2004 MOVS R0, #4
0x34191B42: F88D 0007 STRB.W R0, [SP, #7]
0x34191B46: F89D 0006 LDRB.W R0, [SP, #6]
0x34191B4A: 3001 ADDS R0, #1
0x34191B4C: F88D 0006 STRB.W R0, [SP, #6]
0x34191B50: E005 B 46L6 ; 0x34191B5E
.L5:
0x34191B52: 2004 MOVS R0, #4
0x34191B54: F88D 0007 STRB.W R0, [SP, #7]
0x34191B58: 2002 MOVS R0, #2
0x34191B5A: F88D 0006 STRB.W R0, [SP, #6]
.L6:
0x34191B5E: F89D 0006 LDRB.W R0, [SP, #6]
0x34191B62: 2802 CMP R0, #2
0x34191B64: D3CB BCC 46L1 ; 0x34191AFE
.L7:
0x34191B66: F89D 0007 LDRB.W R0, [SP, #7]
0x34191B6A: B004 ADD SP, SP, #16
0x34191B6C: BD80 POP 123R7, PC}
Section .init.TIM8_TRG_CCU_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
TIM8_TRG_CCU_IRQHandler:
0x34191B6E: E7FE B TIM8_TRG_CCU_IRQHandler ; 0x34191B6E
Section .text.SFDP_CollectData from blto2_FSBL_lto.o, size=458, align=4
SFDP_CollectData:
0x34191B70: B580 PUSH 123R7, LR}
0x34191B72: B088 SUB SP, SP, #32
0x34191B74: 9007 STR R0, [SP, #28]
0x34191B76: 2000 MOVS R0, #0
0x34191B78: 9001 STR R0, [SP, #4]
0x34191B7A: F88D 001B STRB.W R0, [SP, #27]
0x34191B7E: 2108 MOVS R1, #8
0x34191B80: 9105 STR R1, [SP, #20]
0x34191B82: 9907 LDR R1, [SP, #28]
0x34191B84: F8C1 0094 STR.W R0, [R1, #148]
0x34191B88: F240 00AC MOVW R0, #172 ; 0x340000AC = sfdp_param_info
0x34191B8C: F2C3 4000 MOVT R0, #0x3400 ; 0x340000AC = sfdp_param_info
0x34191B90: 2178 MOVS R1, #120
0x34191B92: F7FA FEE3 BL __aeabi_memclr ; 0x3418C95C
0x34191B96: 9801 LDR R0, [SP, #4]
0x34191B98: F88D 0013 STRB.W R0, [SP, #19]
.L1:
0x34191B9C: F89D 0013 LDRB.W R0, [SP, #19]
0x34191BA0: 9907 LDR R1, [SP, #28]
0x34191BA2: F891 109C LDRB.W R1, [R1, #156]
0x34191BA6: 3101 ADDS R1, #1
0x34191BA8: 4288 CMP R0, R1
0x34191BAA: D22C BCS 46L3 ; 0x34191C06
0x34191BAC: 9807 LDR R0, [SP, #28]
0x34191BAE: 9905 LDR R1, [SP, #20]
0x34191BB0: F89D 2013 LDRB.W R2, [SP, #19]
0x34191BB4: EB02 0342 ADD.W R3, R2, R2, LSL #1
0x34191BB8: F240 02AC MOVW R2, #172 ; 0x340000AC = sfdp_param_info
0x34191BBC: F2C3 4200 MOVT R2, #0x3400 ; 0x340000AC = sfdp_param_info
0x34191BC0: EB02 0283 ADD.W R2, R2, R3, LSL #2
0x34191BC4: F7F9 FAD2 BL sfdp_get_paraminfo ; 0x3418B16C
0x34191BC8: F88D 001B STRB.W R0, [SP, #27]
0x34191BCC: F89D 001B LDRB.W R0, [SP, #27]
0x34191BD0: B100 CBZ R0, .L2 ; 0x34191BD4
0x34191BD2: E0AE B 46L13 ; 0x34191D32
.L2:
0x34191BD4: F89D 0013 LDRB.W R0, [SP, #19]
0x34191BD8: EB00 0140 ADD.W R1, R0, R0, LSL #1
0x34191BDC: F240 00AC MOVW R0, #172 ; 0x340000AC = sfdp_param_info
0x34191BE0: F2C3 4000 MOVT R0, #0x3400 ; 0x340000AC = sfdp_param_info
0x34191BE4: F850 2021 LDR.W R2, [R0, R1, LSL #2]
0x34191BE8: 9907 LDR R1, [SP, #28]
0x34191BEA: F8D1 0094 LDR.W R0, [R1, #148]
0x34191BEE: 4310 ORRS R0, R2
0x34191BF0: F8C1 0094 STR.W R0, [R1, #148]
0x34191BF4: 9805 LDR R0, [SP, #20]
0x34191BF6: 3008 ADDS R0, #8
0x34191BF8: 9005 STR R0, [SP, #20]
0x34191BFA: F89D 0013 LDRB.W R0, [SP, #19]
0x34191BFE: 3001 ADDS R0, #1
0x34191C00: F88D 0013 STRB.W R0, [SP, #19]
0x34191C04: E7CA B 46L1 ; 0x34191B9C
.L3:
0x34191C06: 2000 MOVS R0, #0
0x34191C08: F88D 0012 STRB.W R0, [SP, #18]
.L4:
0x34191C0C: F89D 0012 LDRB.W R0, [SP, #18]
0x34191C10: EB00 0140 ADD.W R1, R0, R0, LSL #1
0x34191C14: F240 00AC MOVW R0, #172 ; 0x340000AC = sfdp_param_info
0x34191C18: F2C3 4000 MOVT R0, #0x3400 ; 0x340000AC = sfdp_param_info
0x34191C1C: F850 0021 LDR.W R0, [R0, R1, LSL #2]
0x34191C20: 2800 CMP R0, #0
0x34191C22: F000 8086 BEQ.W 46L13 ; 0x34191D32
0x34191C26: 2000 MOVS R0, #0
0x34191C28: 9003 STR R0, [SP, #12]
0x34191C2A: F89D 0012 LDRB.W R0, [SP, #18]
0x34191C2E: EB00 0140 ADD.W R1, R0, R0, LSL #1
0x34191C32: F240 00AC MOVW R0, #172 ; 0x340000AC = sfdp_param_info
0x34191C36: F2C3 4000 MOVT R0, #0x3400 ; 0x340000AC = sfdp_param_info
0x34191C3A: EB00 0181 ADD.W R1, R0, R1, LSL #2
0x34191C3E: 7A09 LDRB R1, [R1, #8]
0x34191C40: 9102 STR R1, [SP, #8]
0x34191C42: F89D 1012 LDRB.W R1, [SP, #18]
0x34191C46: EB01 0141 ADD.W R1, R1, R1, LSL #1
0x34191C4A: F850 0021 LDR.W R0, [R0, R1, LSL #2]
0x34191C4E: 9000 STR R0, [SP, #0]
0x34191C50: 2808 CMP R0, #8
0x34191C52: D00E BEQ 46L5 ; 0x34191C72
0x34191C54: 9800 LDR R0, [SP, #0]
0x34191C56: 2840 CMP R0, #64
0x34191C58: D01E BEQ 46L6 ; 0x34191C98
0x34191C5A: 9800 LDR R0, [SP, #0]
0x34191C5C: 2880 CMP R0, #128
0x34191C5E: D027 BEQ 46L8 ; 0x34191CB0
0x34191C60: 9800 LDR R0, [SP, #0]
0x34191C62: F5B0 7F00 CMP.W R0, #0x0200
0x34191C66: D01D BEQ 46L7 ; 0x34191CA4
0x34191C68: 9800 LDR R0, [SP, #0]
0x34191C6A: F5B0 5F80 CMP.W R0, #0x1000
0x34191C6E: D025 BEQ 46L9 ; 0x34191CBC
0x34191C70: E02A B 46L10 ; 0x34191CC8
.L5:
0x34191C72: F89D 0012 LDRB.W R0, [SP, #18]
0x34191C76: EB00 0140 ADD.W R1, R0, R0, LSL #1
0x34191C7A: F240 00AC MOVW R0, #172 ; 0x340000AC = sfdp_param_info
0x34191C7E: F2C3 4000 MOVT R0, #0x3400 ; 0x340000AC = sfdp_param_info
0x34191C82: EB00 0081 ADD.W R0, R0, R1, LSL #2
0x34191C86: 7A01 LDRB R1, [R0, #8]
0x34191C88: F240 10F8 MOVW R0, #0x01F8 ; 0x340001F8 = JEDEC_Basic
0x34191C8C: F2C3 4000 MOVT R0, #0x3400 ; 0x340001F8 = JEDEC_Basic
0x34191C90: F840 1B04 STR R1, [R0], #4
0x34191C94: 9003 STR R0, [SP, #12]
0x34191C96: E017 B 46L10 ; 0x34191CC8
.L6:
0x34191C98: F240 2090 MOVW R0, #0x0290 ; 0x34000290 = JEDEC_Address4Bytes
0x34191C9C: F2C3 4000 MOVT R0, #0x3400 ; 0x34000290 = JEDEC_Address4Bytes
0x34191CA0: 9003 STR R0, [SP, #12]
0x34191CA2: E011 B 46L10 ; 0x34191CC8
.L7:
0x34191CA4: F240 1024 MOVW R0, #0x0124 ; 0x34000124 = JEDEC_SCCR_Map
0x34191CA8: F2C3 4000 MOVT R0, #0x3400 ; 0x34000124 = JEDEC_SCCR_Map
0x34191CAC: 9003 STR R0, [SP, #12]
0x34191CAE: E00B B 46L10 ; 0x34191CC8
.L8:
0x34191CB0: F240 2078 MOVW R0, #0x0278 ; 0x34000278 = JEDEC_XSPI10
0x34191CB4: F2C3 4000 MOVT R0, #0x3400 ; 0x34000278 = JEDEC_XSPI10
0x34191CB8: 9003 STR R0, [SP, #12]
0x34191CBA: E005 B 46L10 ; 0x34191CC8
.L9:
0x34191CBC: F240 2058 MOVW R0, #0x0258 ; 0x34000258 = JEDEC_OctalDdr
0x34191CC0: F2C3 4000 MOVT R0, #0x3400 ; 0x34000258 = JEDEC_OctalDdr
0x34191CC4: 9003 STR R0, [SP, #12]
0x34191CC6: E7FF B 46L10 ; 0x34191CC8
.L10:
0x34191CC8: 9803 LDR R0, [SP, #12]
0x34191CCA: B1B0 CBZ R0, .L11 ; 0x34191CFA
0x34191CCC: 9807 LDR R0, [SP, #28]
0x34191CCE: 3008 ADDS R0, #8
0x34191CD0: F89D 1012 LDRB.W R1, [SP, #18]
0x34191CD4: EB01 0241 ADD.W R2, R1, R1, LSL #1
0x34191CD8: F240 01AC MOVW R1, #172 ; 0x340000AC = sfdp_param_info
0x34191CDC: F2C3 4100 MOVT R1, #0x3400 ; 0x340000AC = sfdp_param_info
0x34191CE0: EB01 0182 ADD.W R1, R1, R2, LSL #2
0x34191CE4: 6849 LDR R1, [R1, #4]
0x34191CE6: 9A03 LDR R2, [SP, #12]
0x34191CE8: 9B02 LDR R3, [SP, #8]
0x34191CEA: 009B LSLS R3, R3, #2
0x34191CEC: F000 FD0E BL SAL_XSPI_GetSFDP ; 0x3419270C
0x34191CF0: B118 CBZ R0, .L11 ; 0x34191CFA
0x34191CF2: 200C MOVS R0, #12
0x34191CF4: F88D 001B STRB.W R0, [SP, #27]
0x34191CF8: E01B B 46L13 ; 0x34191D32
.L11:
0x34191CFA: F89D 0012 LDRB.W R0, [SP, #18]
0x34191CFE: EB00 0140 ADD.W R1, R0, R0, LSL #1
0x34191D02: F240 00AC MOVW R0, #172 ; 0x340000AC = sfdp_param_info
0x34191D06: F2C3 4000 MOVT R0, #0x3400 ; 0x340000AC = sfdp_param_info
0x34191D0A: F850 0021 LDR.W R0, [R0, R1, LSL #2]
0x34191D0E: 2808 CMP R0, #8
0x34191D10: D109 BNE 46L12 ; 0x34191D26
0x34191D12: F240 10F8 MOVW R0, #0x01F8 ; 0x340001F8 = JEDEC_Basic
0x34191D16: F2C3 4000 MOVT R0, #0x3400 ; 0x340001F8 = JEDEC_Basic
0x34191D1A: 6C00 LDR R0, [R0, #64]
0x34191D1C: F3C0 2005 UBFX R0, R0, #8, #6
0x34191D20: 9907 LDR R1, [SP, #28]
0x34191D22: F8C1 0098 STR.W R0, [R1, #152]
.L12:
0x34191D26: F89D 0012 LDRB.W R0, [SP, #18]
0x34191D2A: 3001 ADDS R0, #1
0x34191D2C: F88D 0012 STRB.W R0, [SP, #18]
0x34191D30: E76C B 46L4 ; 0x34191C0C
.L13:
0x34191D32: F89D 001B LDRB.W R0, [SP, #27]
0x34191D36: B008 ADD SP, SP, #32
0x34191D38: BD80 POP 123R7, PC}
Section .init.TIM8_CC_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
TIM8_CC_IRQHandler:
0x34191D3A: E7FE B TIM8_CC_IRQHandler ; 0x34191D3A
Section .text.SFDP_MemoryReset from blto2_FSBL_lto.o, size=458, align=4
SFDP_MemoryReset:
0x34191D3C: B580 PUSH 123R7, LR}
0x34191D3E: B086 SUB SP, SP, #24
0x34191D40: 9005 STR R0, [SP, #20]
0x34191D42: 2007 MOVS R0, #7
0x34191D44: F88D 0012 STRB.W R0, [SP, #18]
0x34191D48: 2008 MOVS R0, #8
0x34191D4A: 9003 STR R0, [SP, #12]
0x34191D4C: 2000 MOVS R0, #0
0x34191D4E: F88D 000B STRB.W R0, [SP, #11]
0x34191D52: F88D 000A STRB.W R0, [SP, #10]
.L1:
0x34191D56: F89D 000A LDRB.W R0, [SP, #10]
0x34191D5A: 9905 LDR R1, [SP, #20]
0x34191D5C: F891 109C LDRB.W R1, [R1, #156]
0x34191D60: 3101 ADDS R1, #1
0x34191D62: 4288 CMP R0, R1
0x34191D64: D23F BCS 46L6 ; 0x34191DE6
0x34191D66: 9805 LDR R0, [SP, #20]
0x34191D68: 9903 LDR R1, [SP, #12]
0x34191D6A: F240 02AC MOVW R2, #172 ; 0x340000AC = sfdp_param_info
0x34191D6E: F2C3 4200 MOVT R2, #0x3400 ; 0x340000AC = sfdp_param_info
0x34191D72: F7F9 F9FB BL sfdp_get_paraminfo ; 0x3418B16C
0x34191D76: F88D 0012 STRB.W R0, [SP, #18]
0x34191D7A: F89D 0012 LDRB.W R0, [SP, #18]
0x34191D7E: BB08 CBNZ R0, .L3 ; 0x34191DC4
0x34191D80: F240 00AC MOVW R0, #172 ; 0x340000AC = sfdp_param_info
0x34191D84: F2C3 4000 MOVT R0, #0x3400 ; 0x340000AC = sfdp_param_info
0x34191D88: 6800 LDR R0, [R0]
0x34191D8A: 2808 CMP R0, #8
0x34191D8C: D11A BNE 46L3 ; 0x34191DC4
0x34191D8E: 9805 LDR R0, [SP, #20]
0x34191D90: 3008 ADDS R0, #8
0x34191D92: F240 02AC MOVW R2, #172 ; 0x340000AC = sfdp_param_info
0x34191D96: F2C3 4200 MOVT R2, #0x3400 ; 0x340000AC = sfdp_param_info
0x34191D9A: 6851 LDR R1, [R2, #4]
0x34191D9C: 7A12 LDRB R2, [R2, #8]
0x34191D9E: 0093 LSLS R3, R2, #2
0x34191DA0: F240 12F8 MOVW R2, #0x01F8 ; 0x340001F8 = JEDEC_Basic
0x34191DA4: F2C3 4200 MOVT R2, #0x3400 ; 0x340001F8 = JEDEC_Basic
0x34191DA8: 3204 ADDS R2, #4
0x34191DAA: F000 FCAF BL SAL_XSPI_GetSFDP ; 0x3419270C
0x34191DAE: B118 CBZ R0, .L2 ; 0x34191DB8
0x34191DB0: 200C MOVS R0, #12
0x34191DB2: F88D 0012 STRB.W R0, [SP, #18]
0x34191DB6: E005 B 46L3 ; 0x34191DC4
.L2:
0x34191DB8: 2000 MOVS R0, #0
0x34191DBA: F88D 0012 STRB.W R0, [SP, #18]
0x34191DBE: 2001 MOVS R0, #1
0x34191DC0: F88D 000B STRB.W R0, [SP, #11]
.L3:
0x34191DC4: F89D 0012 LDRB.W R0, [SP, #18]
0x34191DC8: B918 CBNZ R0, .L4 ; 0x34191DD2
0x34191DCA: F89D 000B LDRB.W R0, [SP, #11]
0x34191DCE: 2801 CMP R0, #1
0x34191DD0: D100 BNE 46L5 ; 0x34191DD4
.L4:
0x34191DD2: E008 B 46L6 ; 0x34191DE6
.L5:
0x34191DD4: 9803 LDR R0, [SP, #12]
0x34191DD6: 3008 ADDS R0, #8
0x34191DD8: 9003 STR R0, [SP, #12]
0x34191DDA: F89D 000A LDRB.W R0, [SP, #10]
0x34191DDE: 3001 ADDS R0, #1
0x34191DE0: F88D 000A STRB.W R0, [SP, #10]
0x34191DE4: E7B7 B 46L1 ; 0x34191D56
.L6:
0x34191DE6: F89D 0012 LDRB.W R0, [SP, #18]
0x34191DEA: B910 CBNZ R0, .L7 ; 0x34191DF2
0x34191DEC: F89D 000B LDRB.W R0, [SP, #11]
0x34191DF0: B918 CBNZ R0, .L8 ; 0x34191DFA
.L7:
0x34191DF2: 200C MOVS R0, #12
0x34191DF4: F88D 0012 STRB.W R0, [SP, #18]
0x34191DF8: E081 B 46L21 ; 0x34191EFE
.L8:
0x34191DFA: F240 10F8 MOVW R0, #0x01F8 ; 0x340001F8 = JEDEC_Basic
0x34191DFE: F2C3 4000 MOVT R0, #0x3400 ; 0x340001F8 = JEDEC_Basic
0x34191E02: 6C00 LDR R0, [R0, #64]
0x34191E04: 0A00 LSRS R0, R0, #8
0x34191E06: 0680 LSLS R0, R0, #26
0x34191E08: B918 CBNZ R0, .L9 ; 0x34191E12
0x34191E0A: 2000 MOVS R0, #0
0x34191E0C: F88D 0013 STRB.W R0, [SP, #19]
0x34191E10: E050 B 46L16 ; 0x34191EB4
.L9:
0x34191E12: F240 10F8 MOVW R0, #0x01F8 ; 0x340001F8 = JEDEC_Basic
0x34191E16: F2C3 4000 MOVT R0, #0x3400 ; 0x340001F8 = JEDEC_Basic
0x34191E1A: 6C00 LDR R0, [R0, #64]
0x34191E1C: 0A00 LSRS R0, R0, #8
0x34191E1E: 07C0 LSLS R0, R0, #31
0x34191E20: B118 CBZ R0, .L10 ; 0x34191E2A
0x34191E22: 2001 MOVS R0, #1
0x34191E24: F88D 0013 STRB.W R0, [SP, #19]
0x34191E28: E044 B 46L16 ; 0x34191EB4
.L10:
0x34191E2A: F240 10F8 MOVW R0, #0x01F8 ; 0x340001F8 = JEDEC_Basic
0x34191E2E: F2C3 4000 MOVT R0, #0x3400 ; 0x340001F8 = JEDEC_Basic
0x34191E32: 6C00 LDR R0, [R0, #64]
0x34191E34: 0A00 LSRS R0, R0, #8
0x34191E36: 0780 LSLS R0, R0, #30
0x34191E38: 2800 CMP R0, #0
0x34191E3A: D503 BPL 46L11 ; 0x34191E44
0x34191E3C: 2002 MOVS R0, #2
0x34191E3E: F88D 0013 STRB.W R0, [SP, #19]
0x34191E42: E037 B 46L16 ; 0x34191EB4
.L11:
0x34191E44: F240 10F8 MOVW R0, #0x01F8 ; 0x340001F8 = JEDEC_Basic
0x34191E48: F2C3 4000 MOVT R0, #0x3400 ; 0x340001F8 = JEDEC_Basic
0x34191E4C: 6C00 LDR R0, [R0, #64]
0x34191E4E: 0A00 LSRS R0, R0, #8
0x34191E50: 0740 LSLS R0, R0, #29
0x34191E52: 2800 CMP R0, #0
0x34191E54: D503 BPL 46L12 ; 0x34191E5E
0x34191E56: 2003 MOVS R0, #3
0x34191E58: F88D 0013 STRB.W R0, [SP, #19]
0x34191E5C: E02A B 46L16 ; 0x34191EB4
.L12:
0x34191E5E: F240 10F8 MOVW R0, #0x01F8 ; 0x340001F8 = JEDEC_Basic
0x34191E62: F2C3 4000 MOVT R0, #0x3400 ; 0x340001F8 = JEDEC_Basic
0x34191E66: 6C00 LDR R0, [R0, #64]
0x34191E68: 0A00 LSRS R0, R0, #8
0x34191E6A: 0700 LSLS R0, R0, #28
0x34191E6C: 2800 CMP R0, #0
0x34191E6E: D503 BPL 46L13 ; 0x34191E78
0x34191E70: 2004 MOVS R0, #4
0x34191E72: F88D 0013 STRB.W R0, [SP, #19]
0x34191E76: E01D B 46L16 ; 0x34191EB4
.L13:
0x34191E78: F240 10F8 MOVW R0, #0x01F8 ; 0x340001F8 = JEDEC_Basic
0x34191E7C: F2C3 4000 MOVT R0, #0x3400 ; 0x340001F8 = JEDEC_Basic
0x34191E80: 6C00 LDR R0, [R0, #64]
0x34191E82: 0A00 LSRS R0, R0, #8
0x34191E84: 06C0 LSLS R0, R0, #27
0x34191E86: 2800 CMP R0, #0
0x34191E88: D503 BPL 46L14 ; 0x34191E92
0x34191E8A: 2005 MOVS R0, #5
0x34191E8C: F88D 0013 STRB.W R0, [SP, #19]
0x34191E90: E010 B 46L16 ; 0x34191EB4
.L14:
0x34191E92: F240 10F8 MOVW R0, #0x01F8 ; 0x340001F8 = JEDEC_Basic
0x34191E96: F2C3 4000 MOVT R0, #0x3400 ; 0x340001F8 = JEDEC_Basic
0x34191E9A: 6C00 LDR R0, [R0, #64]
0x34191E9C: 0A00 LSRS R0, R0, #8
0x34191E9E: 0680 LSLS R0, R0, #26
0x34191EA0: 2800 CMP R0, #0
0x34191EA2: D503 BPL 46L15 ; 0x34191EAC
0x34191EA4: 200F MOVS R0, #15
0x34191EA6: F88D 0012 STRB.W R0, [SP, #18]
0x34191EAA: E028 B 46L21 ; 0x34191EFE
.L15:
0x34191EAC: 200C MOVS R0, #12
0x34191EAE: F88D 0012 STRB.W R0, [SP, #18]
0x34191EB2: E024 B 46L21 ; 0x34191EFE
.L16:
0x34191EB4: F89D 0013 LDRB.W R0, [SP, #19]
0x34191EB8: 4601 MOV R1, R0
0x34191EBA: 9101 STR R1, [SP, #4]
0x34191EBC: B138 CBZ R0, .L17 ; 0x34191ECE
0x34191EBE: 9801 LDR R0, [SP, #4]
0x34191EC0: 3801 SUBS R0, #1
0x34191EC2: 2804 CMP R0, #4
0x34191EC4: D314 BCC 46L19 ; 0x34191EF0
0x34191EC6: 9801 LDR R0, [SP, #4]
0x34191EC8: 2805 CMP R0, #5
0x34191ECA: D001 BEQ 46L18 ; 0x34191ED0
0x34191ECC: E014 B 46L20 ; 0x34191EF8
.L17:
0x34191ECE: E016 B 46L21 ; 0x34191EFE
.L18:
0x34191ED0: 9805 LDR R0, [SP, #20]
0x34191ED2: 3008 ADDS R0, #8
0x34191ED4: 2166 MOVS R1, #102
0x34191ED6: 2300 MOVS R3, #0
0x34191ED8: 9300 STR R3, [SP, #0]
0x34191EDA: 461A MOV R2, R3
0x34191EDC: F7FA FAA6 BL SAL_XSPI_CommandSendData ; 0x3418C42C
0x34191EE0: 9B00 LDR R3, [SP, #0]
0x34191EE2: 9805 LDR R0, [SP, #20]
0x34191EE4: 3008 ADDS R0, #8
0x34191EE6: 2199 MOVS R1, #153
0x34191EE8: 461A MOV R2, R3
0x34191EEA: F7FA FA9F BL SAL_XSPI_CommandSendData ; 0x3418C42C
0x34191EEE: E006 B 46L21 ; 0x34191EFE
.L19:
0x34191EF0: 200F MOVS R0, #15
0x34191EF2: F88D 0012 STRB.W R0, [SP, #18]
0x34191EF6: E002 B 46L21 ; 0x34191EFE
.L20:
0x34191EF8: 2001 MOVS R0, #1
0x34191EFA: F88D 0012 STRB.W R0, [SP, #18]
.L21:
0x34191EFE: F89D 0012 LDRB.W R0, [SP, #18]
0x34191F02: B006 ADD SP, SP, #24
0x34191F04: BD80 POP 123R7, PC}
Section .init.TIM9_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
TIM9_IRQHandler:
0x34191F06: E7FE B TIM9_IRQHandler ; 0x34191F06
Section .text.JEDEC_Basic_ManageQuadEnableRequirement from blto2_FSBL_lto.o, size=338, align=4
JEDEC_Basic_ManageQuadEnableRequirement:
0x34191F08: B580 PUSH 123R7, LR}
0x34191F0A: B084 SUB SP, SP, #16
0x34191F0C: 9003 STR R0, [SP, #12]
0x34191F0E: 200F MOVS R0, #15
0x34191F10: F88D 000B STRB.W R0, [SP, #11]
0x34191F14: F240 10F8 MOVW R0, #0x01F8 ; 0x340001F8 = JEDEC_Basic
0x34191F18: F2C3 4000 MOVT R0, #0x3400 ; 0x340001F8 = JEDEC_Basic
0x34191F1C: 6BC0 LDR R0, [R0, #60]
0x34191F1E: F3C0 5002 UBFX R0, R0, #20, #3
0x34191F22: 4601 MOV R1, R0
0x34191F24: 9101 STR R1, [SP, #4]
0x34191F26: 2807 CMP R0, #7
0x34191F28: F200 8093 BHI.W 46L10 ; 0x34192052
0x34191F2C: 9901 LDR R1, [SP, #4]
0x34191F2E: E8DF F001 TBB 91PC, R1]
0x34191F32: 04 DC.B 0x04 ; '\x04'
0x34191F33: 05 DC.B 0x05 ; '\x05'
0x34191F34: 06 DC.B 0x06 ; '\x06'
0x34191F35: 41 DC.B 0x41 ; 'A'
0x34191F36: 42 DC.B 0x42 ; 'B'
0x34191F37: 8D DC.B 0x8D ; '\x8D'
0x34191F38: 8E DC.B 0x8E ; '\x8E'
0x34191F39: 8F DC.B 0x8F ; '\x8F'
0x34191F3A: E08A B 46L10 ; 0x34192052
0x34191F3C: E089 B 46L10 ; 0x34192052
0x34191F3E: 9903 LDR R1, [SP, #12]
0x34191F40: F101 0008 ADD.W R0, R1, #8
0x34191F44: F891 1070 LDRB.W R1, [R1, #112]
0x34191F48: 2300 MOVS R3, #0
0x34191F4A: 461A MOV R2, R3
0x34191F4C: F7FA FAB2 BL SAL_XSPI_SendReadCommand ; 0x3418C4B4
0x34191F50: B118 CBZ R0, .L1 ; 0x34191F5A
0x34191F52: 200C MOVS R0, #12
0x34191F54: F88D 000B STRB.W R0, [SP, #11]
0x34191F58: E07B B 46L10 ; 0x34192052
.L1:
0x34191F5A: 9803 LDR R0, [SP, #12]
0x34191F5C: 3008 ADDS R0, #8
0x34191F5E: 2105 MOVS R1, #5
0x34191F60: F10D 0209 ADD.W R2, SP, #9
0x34191F64: 2301 MOVS R3, #1
0x34191F66: F7FA FAA5 BL SAL_XSPI_SendReadCommand ; 0x3418C4B4
0x34191F6A: B118 CBZ R0, .L2 ; 0x34191F74
0x34191F6C: 200C MOVS R0, #12
0x34191F6E: F88D 000B STRB.W R0, [SP, #11]
0x34191F72: E06E B 46L10 ; 0x34192052
.L2:
0x34191F74: F89D 0009 LDRB.W R0, [SP, #9]
0x34191F78: F040 0040 ORR R0, R0, #64
0x34191F7C: F88D 0009 STRB.W R0, [SP, #9]
0x34191F80: 9803 LDR R0, [SP, #12]
0x34191F82: 3008 ADDS R0, #8
0x34191F84: F10D 0209 ADD.W R2, SP, #9
0x34191F88: 2301 MOVS R3, #1
0x34191F8A: 4619 MOV R1, R3
0x34191F8C: F7FA FA4E BL SAL_XSPI_CommandSendData ; 0x3418C42C
0x34191F90: B118 CBZ R0, .L3 ; 0x34191F9A
0x34191F92: 200C MOVS R0, #12
0x34191F94: F88D 000B STRB.W R0, [SP, #11]
0x34191F98: E05B B 46L10 ; 0x34192052
.L3:
0x34191F9A: 9803 LDR R0, [SP, #12]
0x34191F9C: 2164 MOVS R1, #100
0x34191F9E: F000 F94F BL driver_check_FlagBUSY ; 0x34192240
0x34191FA2: B118 CBZ R0, .L4 ; 0x34191FAC
0x34191FA4: 200C MOVS R0, #12
0x34191FA6: F88D 000B STRB.W R0, [SP, #11]
0x34191FAA: E052 B 46L10 ; 0x34192052
.L4:
0x34191FAC: 2000 MOVS R0, #0
0x34191FAE: F88D 000B STRB.W R0, [SP, #11]
0x34191FB2: E04E B 46L10 ; 0x34192052
0x34191FB4: E04D B 46L10 ; 0x34192052
0x34191FB6: 9803 LDR R0, [SP, #12]
0x34191FB8: 3008 ADDS R0, #8
0x34191FBA: 2105 MOVS R1, #5
0x34191FBC: F10D 0209 ADD.W R2, SP, #9
0x34191FC0: 2302 MOVS R3, #2
0x34191FC2: F7FA FA77 BL SAL_XSPI_SendReadCommand ; 0x3418C4B4
0x34191FC6: B118 CBZ R0, .L5 ; 0x34191FD0
0x34191FC8: 200C MOVS R0, #12
0x34191FCA: F88D 000B STRB.W R0, [SP, #11]
0x34191FCE: E040 B 46L10 ; 0x34192052
.L5:
0x34191FD0: F89D 000A LDRB.W R0, [SP, #10]
0x34191FD4: F040 0002 ORR R0, R0, #2
0x34191FD8: F88D 000A STRB.W R0, [SP, #10]
0x34191FDC: 9903 LDR R1, [SP, #12]
0x34191FDE: F101 0008 ADD.W R0, R1, #8
0x34191FE2: F891 1070 LDRB.W R1, [R1, #112]
0x34191FE6: 2300 MOVS R3, #0
0x34191FE8: 461A MOV R2, R3
0x34191FEA: F7FA FA63 BL SAL_XSPI_SendReadCommand ; 0x3418C4B4
0x34191FEE: B118 CBZ R0, .L6 ; 0x34191FF8
0x34191FF0: 200C MOVS R0, #12
0x34191FF2: F88D 000B STRB.W R0, [SP, #11]
0x34191FF6: E02C B 46L10 ; 0x34192052
.L6:
0x34191FF8: 9803 LDR R0, [SP, #12]
0x34191FFA: 3008 ADDS R0, #8
0x34191FFC: 2101 MOVS R1, #1
0x34191FFE: F10D 0209 ADD.W R2, SP, #9
0x34192002: 2302 MOVS R3, #2
0x34192004: F7FA FA12 BL SAL_XSPI_CommandSendData ; 0x3418C42C
0x34192008: B118 CBZ R0, .L7 ; 0x34192012
0x3419200A: 200C MOVS R0, #12
0x3419200C: F88D 000B STRB.W R0, [SP, #11]
0x34192010: E01F B 46L10 ; 0x34192052
.L7:
0x34192012: 9803 LDR R0, [SP, #12]
0x34192014: 2164 MOVS R1, #100
0x34192016: F000 F913 BL driver_check_FlagBUSY ; 0x34192240
0x3419201A: B118 CBZ R0, .L8 ; 0x34192024
0x3419201C: 200C MOVS R0, #12
0x3419201E: F88D 000B STRB.W R0, [SP, #11]
0x34192022: E016 B 46L10 ; 0x34192052
.L8:
0x34192024: 20FF MOVS R0, #255
0x34192026: F88D 000A STRB.W R0, [SP, #10]
0x3419202A: 9803 LDR R0, [SP, #12]
0x3419202C: 3008 ADDS R0, #8
0x3419202E: 2105 MOVS R1, #5
0x34192030: F10D 0209 ADD.W R2, SP, #9
0x34192034: 2302 MOVS R3, #2
0x34192036: F7FA FA3D BL SAL_XSPI_SendReadCommand ; 0x3418C4B4
0x3419203A: B118 CBZ R0, .L9 ; 0x34192044
0x3419203C: 200C MOVS R0, #12
0x3419203E: F88D 000B STRB.W R0, [SP, #11]
0x34192042: E006 B 46L10 ; 0x34192052
.L9:
0x34192044: 2000 MOVS R0, #0
0x34192046: F88D 000B STRB.W R0, [SP, #11]
0x3419204A: E002 B 46L10 ; 0x34192052
0x3419204C: E001 B 46L10 ; 0x34192052
0x3419204E: E000 B 46L10 ; 0x34192052
0x34192050: E7FF B 46L10 ; 0x34192052
.L10:
0x34192052: F89D 000B LDRB.W R0, [SP, #11]
0x34192056: B004 ADD SP, SP, #16
0x34192058: BD80 POP 123R7, PC}
Section .init.TIM10_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
TIM10_IRQHandler:
0x3419205A: E7FE B TIM10_IRQHandler ; 0x3419205A
Section .text.sfdp_enter_octal_mode from blto2_FSBL_lto.o, size=482, align=4
sfdp_enter_octal_mode:
0x3419205C: B580 PUSH 123R7, LR}
0x3419205E: B088 SUB SP, SP, #32
0x34192060: 9007 STR R0, [SP, #28]
0x34192062: 2000 MOVS R0, #0
0x34192064: F88D 001B STRB.W R0, [SP, #27]
0x34192068: F240 2058 MOVW R0, #0x0258 ; 0x34000258 = JEDEC_OctalDdr
0x3419206C: F2C3 4000 MOVT R0, #0x3400 ; 0x34000258 = JEDEC_OctalDdr
0x34192070: 78C0 LDRB R0, [R0, #3]
0x34192072: B358 CBZ R0, .L1 ; 0x341920CC
0x34192074: F240 2358 MOVW R3, #0x0258 ; 0x34000258 = JEDEC_OctalDdr
0x34192078: F2C3 4300 MOVT R3, #0x3400 ; 0x34000258 = JEDEC_OctalDdr
0x3419207C: 9304 STR R3, [SP, #16]
0x3419207E: 8858 LDRH R0, [R3, #2]
0x34192080: F88D 0014 STRB.W R0, [SP, #20]
0x34192084: 6818 LDR R0, [R3]
0x34192086: 0A00 LSRS R0, R0, #8
0x34192088: A905 ADD R1, SP, #20
0x3419208A: 1C4A ADDS R2, R1, #1
0x3419208C: F88D 0015 STRB.W R0, [SP, #21]
0x34192090: 6818 LDR R0, [R3]
0x34192092: F88D 0016 STRB.W R0, [SP, #22]
0x34192096: 79D8 LDRB R0, [R3, #7]
0x34192098: F88D 0017 STRB.W R0, [SP, #23]
0x3419209C: 88D8 LDRH R0, [R3, #6]
0x3419209E: F88D 0018 STRB.W R0, [SP, #24]
0x341920A2: 6858 LDR R0, [R3, #4]
0x341920A4: 0A00 LSRS R0, R0, #8
0x341920A6: F88D 0019 STRB.W R0, [SP, #25]
0x341920AA: 6858 LDR R0, [R3, #4]
0x341920AC: F88D 001A STRB.W R0, [SP, #26]
0x341920B0: 9807 LDR R0, [SP, #28]
0x341920B2: 3008 ADDS R0, #8
0x341920B4: F89D 1014 LDRB.W R1, [SP, #20]
0x341920B8: 78DB LDRB R3, [R3, #3]
0x341920BA: 3B01 SUBS R3, #1
0x341920BC: B29B UXTH R3, R3
0x341920BE: F7FA F9B5 BL SAL_XSPI_CommandSendData ; 0x3418C42C
0x341920C2: B118 CBZ R0, .L1 ; 0x341920CC
0x341920C4: 200B MOVS R0, #11
0x341920C6: F88D 001B STRB.W R0, [SP, #27]
0x341920CA: E0B4 B 46L8 ; 0x34192236
.L1:
0x341920CC: F240 2058 MOVW R0, #0x0258 ; 0x34000258 = JEDEC_OctalDdr
0x341920D0: F2C3 4000 MOVT R0, #0x3400 ; 0x34000258 = JEDEC_OctalDdr
0x341920D4: 7AC0 LDRB R0, [R0, #11]
0x341920D6: B3A0 CBZ R0, .L3 ; 0x34192142
0x341920D8: 9807 LDR R0, [SP, #28]
0x341920DA: 2164 MOVS R1, #100
0x341920DC: F000 F8B0 BL driver_check_FlagBUSY ; 0x34192240
0x341920E0: B118 CBZ R0, .L2 ; 0x341920EA
0x341920E2: 200C MOVS R0, #12
0x341920E4: F88D 001B STRB.W R0, [SP, #27]
0x341920E8: E0A5 B 46L8 ; 0x34192236
.L2:
0x341920EA: F240 2358 MOVW R3, #0x0258 ; 0x34000258 = JEDEC_OctalDdr
0x341920EE: F2C3 4300 MOVT R3, #0x3400 ; 0x34000258 = JEDEC_OctalDdr
0x341920F2: 9303 STR R3, [SP, #12]
0x341920F4: 8958 LDRH R0, [R3, #10]
0x341920F6: F88D 0014 STRB.W R0, [SP, #20]
0x341920FA: 6898 LDR R0, [R3, #8]
0x341920FC: 0A00 LSRS R0, R0, #8
0x341920FE: A905 ADD R1, SP, #20
0x34192100: 1C4A ADDS R2, R1, #1
0x34192102: F88D 0015 STRB.W R0, [SP, #21]
0x34192106: 6898 LDR R0, [R3, #8]
0x34192108: F88D 0016 STRB.W R0, [SP, #22]
0x3419210C: 7BD8 LDRB R0, [R3, #15]
0x3419210E: F88D 0017 STRB.W R0, [SP, #23]
0x34192112: 89D8 LDRH R0, [R3, #14]
0x34192114: F88D 0018 STRB.W R0, [SP, #24]
0x34192118: 68D8 LDR R0, [R3, #12]
0x3419211A: 0A00 LSRS R0, R0, #8
0x3419211C: F88D 0019 STRB.W R0, [SP, #25]
0x34192120: 68D8 LDR R0, [R3, #12]
0x34192122: F88D 001A STRB.W R0, [SP, #26]
0x34192126: 9807 LDR R0, [SP, #28]
0x34192128: 3008 ADDS R0, #8
0x3419212A: F89D 1014 LDRB.W R1, [SP, #20]
0x3419212E: 7ADB LDRB R3, [R3, #11]
0x34192130: 3B01 SUBS R3, #1
0x34192132: B29B UXTH R3, R3
0x34192134: F7FA F97A BL SAL_XSPI_CommandSendData ; 0x3418C42C
0x34192138: B118 CBZ R0, .L3 ; 0x34192142
0x3419213A: 200B MOVS R0, #11
0x3419213C: F88D 001B STRB.W R0, [SP, #27]
0x34192140: E079 B 46L8 ; 0x34192236
.L3:
0x34192142: F240 2058 MOVW R0, #0x0258 ; 0x34000258 = JEDEC_OctalDdr
0x34192146: F2C3 4000 MOVT R0, #0x3400 ; 0x34000258 = JEDEC_OctalDdr
0x3419214A: 7CC0 LDRB R0, [R0, #19]
0x3419214C: B3A0 CBZ R0, .L5 ; 0x341921B8
0x3419214E: 9807 LDR R0, [SP, #28]
0x34192150: 2164 MOVS R1, #100
0x34192152: F000 F875 BL driver_check_FlagBUSY ; 0x34192240
0x34192156: B118 CBZ R0, .L4 ; 0x34192160
0x34192158: 200C MOVS R0, #12
0x3419215A: F88D 001B STRB.W R0, [SP, #27]
0x3419215E: E06A B 46L8 ; 0x34192236
.L4:
0x34192160: F240 2358 MOVW R3, #0x0258 ; 0x34000258 = JEDEC_OctalDdr
0x34192164: F2C3 4300 MOVT R3, #0x3400 ; 0x34000258 = JEDEC_OctalDdr
0x34192168: 9302 STR R3, [SP, #8]
0x3419216A: 8A58 LDRH R0, [R3, #18]
0x3419216C: F88D 0014 STRB.W R0, [SP, #20]
0x34192170: 6918 LDR R0, [R3, #16]
0x34192172: 0A00 LSRS R0, R0, #8
0x34192174: A905 ADD R1, SP, #20
0x34192176: 1C4A ADDS R2, R1, #1
0x34192178: F88D 0015 STRB.W R0, [SP, #21]
0x3419217C: 6918 LDR R0, [R3, #16]
0x3419217E: F88D 0016 STRB.W R0, [SP, #22]
0x34192182: 7DD8 LDRB R0, [R3, #23]
0x34192184: F88D 0017 STRB.W R0, [SP, #23]
0x34192188: 8AD8 LDRH R0, [R3, #22]
0x3419218A: F88D 0018 STRB.W R0, [SP, #24]
0x3419218E: 6958 LDR R0, [R3, #20]
0x34192190: 0A00 LSRS R0, R0, #8
0x34192192: F88D 0019 STRB.W R0, [SP, #25]
0x34192196: 6958 LDR R0, [R3, #20]
0x34192198: F88D 001A STRB.W R0, [SP, #26]
0x3419219C: 9807 LDR R0, [SP, #28]
0x3419219E: 3008 ADDS R0, #8
0x341921A0: F89D 1014 LDRB.W R1, [SP, #20]
0x341921A4: 7CDB LDRB R3, [R3, #19]
0x341921A6: 3B01 SUBS R3, #1
0x341921A8: B29B UXTH R3, R3
0x341921AA: F7FA F93F BL SAL_XSPI_CommandSendData ; 0x3418C42C
0x341921AE: B118 CBZ R0, .L5 ; 0x341921B8
0x341921B0: 200B MOVS R0, #11
0x341921B2: F88D 001B STRB.W R0, [SP, #27]
0x341921B6: E03E B 46L8 ; 0x34192236
.L5:
0x341921B8: F240 2058 MOVW R0, #0x0258 ; 0x34000258 = JEDEC_OctalDdr
0x341921BC: F2C3 4000 MOVT R0, #0x3400 ; 0x34000258 = JEDEC_OctalDdr
0x341921C0: 7EC0 LDRB R0, [R0, #27]
0x341921C2: B3A0 CBZ R0, .L7 ; 0x3419222E
0x341921C4: 9807 LDR R0, [SP, #28]
0x341921C6: 2164 MOVS R1, #100
0x341921C8: F000 F83A BL driver_check_FlagBUSY ; 0x34192240
0x341921CC: B118 CBZ R0, .L6 ; 0x341921D6
0x341921CE: 200C MOVS R0, #12
0x341921D0: F88D 001B STRB.W R0, [SP, #27]
0x341921D4: E02F B 46L8 ; 0x34192236
.L6:
0x341921D6: F240 2358 MOVW R3, #0x0258 ; 0x34000258 = JEDEC_OctalDdr
0x341921DA: F2C3 4300 MOVT R3, #0x3400 ; 0x34000258 = JEDEC_OctalDdr
0x341921DE: 9301 STR R3, [SP, #4]
0x341921E0: 8B58 LDRH R0, [R3, #26]
0x341921E2: F88D 0014 STRB.W R0, [SP, #20]
0x341921E6: 6998 LDR R0, [R3, #24]
0x341921E8: 0A00 LSRS R0, R0, #8
0x341921EA: A905 ADD R1, SP, #20
0x341921EC: 1C4A ADDS R2, R1, #1
0x341921EE: F88D 0015 STRB.W R0, [SP, #21]
0x341921F2: 6998 LDR R0, [R3, #24]
0x341921F4: F88D 0016 STRB.W R0, [SP, #22]
0x341921F8: 7FD8 LDRB R0, [R3, #31]
0x341921FA: F88D 0017 STRB.W R0, [SP, #23]
0x341921FE: 8BD8 LDRH R0, [R3, #30]
0x34192200: F88D 0018 STRB.W R0, [SP, #24]
0x34192204: 69D8 LDR R0, [R3, #28]
0x34192206: 0A00 LSRS R0, R0, #8
0x34192208: F88D 0019 STRB.W R0, [SP, #25]
0x3419220C: 69D8 LDR R0, [R3, #28]
0x3419220E: F88D 001A STRB.W R0, [SP, #26]
0x34192212: 9807 LDR R0, [SP, #28]
0x34192214: 3008 ADDS R0, #8
0x34192216: F89D 1014 LDRB.W R1, [SP, #20]
0x3419221A: 7EDB LDRB R3, [R3, #27]
0x3419221C: 3B01 SUBS R3, #1
0x3419221E: B29B UXTH R3, R3
0x34192220: F7FA F904 BL SAL_XSPI_CommandSendData ; 0x3418C42C
0x34192224: B118 CBZ R0, .L7 ; 0x3419222E
0x34192226: 200B MOVS R0, #11
0x34192228: F88D 001B STRB.W R0, [SP, #27]
0x3419222C: E003 B 46L8 ; 0x34192236
.L7:
0x3419222E: 9807 LDR R0, [SP, #28]
0x34192230: 3008 ADDS R0, #8
0x34192232: F000 FB8D BL SAL_XSPI_Abort ; 0x34192950
.L8:
0x34192236: F89D 001B LDRB.W R0, [SP, #27]
0x3419223A: B008 ADD SP, SP, #32
0x3419223C: BD80 POP 123R7, PC}
Section .init.TIM11_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
TIM11_IRQHandler:
0x3419223E: E7FE B TIM11_IRQHandler ; 0x3419223E
Section .text.driver_check_FlagBUSY from blto2_FSBL_lto.o, size=102, align=4
driver_check_FlagBUSY:
0x34192240: B5B0 PUSH 123R4-R5, R7, LR}
0x34192242: B086 SUB SP, SP, #24
0x34192244: 9005 STR R0, [SP, #20]
0x34192246: 9104 STR R1, [SP, #16]
0x34192248: 20FB MOVS R0, #251
0x3419224A: F88D 000F STRB.W R0, [SP, #15]
0x3419224E: 9805 LDR R0, [SP, #20]
0x34192250: F890 006C LDRB.W R0, [R0, #108]
0x34192254: B318 CBZ R0, .L1 ; 0x3419229E
0x34192256: 9B05 LDR R3, [SP, #20]
0x34192258: F103 0008 ADD.W R0, R3, #8
0x3419225C: F893 206F LDRB.W R2, [R3, #111]
0x34192260: F893 405D LDRB.W R4, [R3, #93]
0x34192264: F893 106C LDRB.W R1, [R3, #108]
0x34192268: F893 E06D LDRB.W LR, [R3, #109]
0x3419226C: F893 306E LDRB.W R3, [R3, #110]
0x34192270: FA03 F30E LSL.W R3, R3, LR
0x34192274: F04F 0C01 MOV.W R12, #1
0x34192278: FA0C FC0E LSL.W R12, R12, LR
0x3419227C: 9D04 LDR R5, [SP, #16]
0x3419227E: 46EE MOV LR, SP
0x34192280: F8CE 5008 STR.W R5, [LR, #8]
0x34192284: F8CE 4004 STR.W R4, [LR, #4]
0x34192288: FA5F FC8C UXTB R12, R12
0x3419228C: F8CE C000 STR.W R12, [LR]
0x34192290: B2DB UXTB R3, R3
0x34192292: F7FA F953 BL SAL_XSPI_CheckStatusRegister ; 0x3418C53C
0x34192296: B910 CBNZ R0, .L1 ; 0x3419229E
0x34192298: 2000 MOVS R0, #0
0x3419229A: F88D 000F STRB.W R0, [SP, #15]
.L1:
0x3419229E: F99D 000F LDRSB.W R0, [SP, #15]
0x341922A2: B006 ADD SP, SP, #24
0x341922A4: BDB0 POP 123R4-R5, R7, PC}
Section .init.TIM12_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
TIM12_IRQHandler:
0x341922A6: E7FE B TIM12_IRQHandler ; 0x341922A6
Section .text.EXTMEM_DRIVER_NOR_SFDP_Init from blto2_FSBL_lto.o, size=306, align=4
EXTMEM_DRIVER_NOR_SFDP_Init:
0x341922A8: B580 PUSH 123R7, LR}
0x341922AA: B08C SUB SP, SP, #48
0x341922AC: 900B STR R0, [SP, #44]
0x341922AE: F88D 102B STRB.W R1, [SP, #43]
0x341922B2: 9209 STR R2, [SP, #36]
0x341922B4: 9308 STR R3, [SP, #32]
0x341922B6: 2000 MOVS R0, #0
0x341922B8: 9001 STR R0, [SP, #4]
0x341922BA: F88D 001F STRB.W R0, [SP, #31]
0x341922BE: F88D 0013 STRB.W R0, [SP, #19]
0x341922C2: 9808 LDR R0, [SP, #32]
0x341922C4: 3008 ADDS R0, #8
0x341922C6: 2198 MOVS R1, #152
0x341922C8: F7FA FB48 BL __aeabi_memclr ; 0x3418C95C
0x341922CC: 9801 LDR R0, [SP, #4]
0x341922CE: F89D 102B LDRB.W R1, [SP, #43]
0x341922D2: 9A08 LDR R2, [SP, #32]
0x341922D4: F882 105C STRB.W R1, [R2, #92]
0x341922D8: 9908 LDR R1, [SP, #32]
0x341922DA: F881 0064 STRB.W R0, [R1, #100]
0x341922DE: 9809 LDR R0, [SP, #36]
0x341922E0: 9908 LDR R1, [SP, #32]
0x341922E2: 6688 STR R0, [R1, #104]
0x341922E4: 9908 LDR R1, [SP, #32]
0x341922E6: 2008 MOVS R0, #8
0x341922E8: F881 0059 STRB.W R0, [R1, #89]
0x341922EC: 9808 LDR R0, [SP, #32]
0x341922EE: 3008 ADDS R0, #8
0x341922F0: 990B LDR R1, [SP, #44]
0x341922F2: F000 F891 BL SAL_XSPI_Init ; 0x34192418
0x341922F6: 9808 LDR R0, [SP, #32]
0x341922F8: 3008 ADDS R0, #8
0x341922FA: 9909 LDR R1, [SP, #36]
0x341922FC: F24F 0280 MOVW R2, #0xF080
0x34192300: F2C0 22FA MOVT R2, #0x02FA
0x34192304: AB02 ADD R3, SP, #8
0x34192306: F7F9 FFCF BL SAL_XSPI_SetClock ; 0x3418C2A8
0x3419230A: 9808 LDR R0, [SP, #32]
0x3419230C: 3008 ADDS R0, #8
0x3419230E: F000 FB13 BL SAL_XSPI_DisableMapMode ; 0x34192938
0x34192312: 9808 LDR R0, [SP, #32]
0x34192314: A905 ADD R1, SP, #20
0x34192316: F7F8 FEA9 BL SFDP_GetHeader ; 0x3418B06C
0x3419231A: B118 CBZ R0, .L1 ; 0x34192324
0x3419231C: 20FF MOVS R0, #255
0x3419231E: F88D 001F STRB.W R0, [SP, #31]
0x34192322: E056 B 46L8 ; 0x341923D2
.L1:
0x34192324: 9808 LDR R0, [SP, #32]
0x34192326: F7FF FD09 BL SFDP_MemoryReset ; 0x34191D3C
0x3419232A: BF00 NOP
0x3419232C: 200A MOVS R0, #10
0x3419232E: F7FA FED9 BL HAL_Delay ; 0x3418D0E4
0x34192332: 9808 LDR R0, [SP, #32]
0x34192334: A905 ADD R1, SP, #20
0x34192336: F7F8 FE99 BL SFDP_GetHeader ; 0x3418B06C
0x3419233A: B118 CBZ R0, .L2 ; 0x34192344
0x3419233C: 20FF MOVS R0, #255
0x3419233E: F88D 001F STRB.W R0, [SP, #31]
0x34192342: E046 B 46L8 ; 0x341923D2
.L2:
0x34192344: F89D 001A LDRB.W R0, [SP, #26]
0x34192348: 280A CMP R0, #10
0x3419234A: D304 BCC 46L3 ; 0x34192356
0x3419234C: 9908 LDR R1, [SP, #32]
0x3419234E: 2009 MOVS R0, #9
0x34192350: F881 009C STRB.W R0, [R1, #156]
0x34192354: E004 B 46L4 ; 0x34192360
.L3:
0x34192356: F89D 001A LDRB.W R0, [SP, #26]
0x3419235A: 9908 LDR R1, [SP, #32]
0x3419235C: F881 009C STRB.W R0, [R1, #156]
.L4:
0x34192360: F89D 001B LDRB.W R0, [SP, #27]
0x34192364: 9908 LDR R1, [SP, #32]
0x34192366: F881 009D STRB.W R0, [R1, #157]
0x3419236A: 9808 LDR R0, [SP, #32]
0x3419236C: 3008 ADDS R0, #8
0x3419236E: F10D 010D ADD.W R1, SP, #13
0x34192372: 2204 MOVS R2, #4
0x34192374: F7F9 FFFE BL SAL_XSPI_GetId ; 0x3418C374
0x34192378: F89D 000D LDRB.W R0, [SP, #13]
0x3419237C: 9908 LDR R1, [SP, #32]
0x3419237E: F881 005D STRB.W R0, [R1, #93]
0x34192382: 9808 LDR R0, [SP, #32]
0x34192384: F7FF FBF4 BL SFDP_CollectData ; 0x34191B70
0x34192388: B118 CBZ R0, .L5 ; 0x34192392
0x3419238A: 20FF MOVS R0, #255
0x3419238C: F88D 001F STRB.W R0, [SP, #31]
0x34192390: E01F B 46L8 ; 0x341923D2
.L5:
0x34192392: 9808 LDR R0, [SP, #32]
0x34192394: F10D 0113 ADD.W R1, SP, #19
0x34192398: F7F9 F82E BL SFDP_BuildGenericDriver ; 0x3418B3F8
0x3419239C: B118 CBZ R0, .L6 ; 0x341923A6
0x3419239E: 20FD MOVS R0, #253
0x341923A0: F88D 001F STRB.W R0, [SP, #31]
0x341923A4: E015 B 46L8 ; 0x341923D2
.L6:
0x341923A6: F89D 0013 LDRB.W R0, [SP, #19]
0x341923AA: B948 CBNZ R0, .L7 ; 0x341923C0
0x341923AC: 9808 LDR R0, [SP, #32]
0x341923AE: 6800 LDR R0, [R0]
0x341923B0: B130 CBZ R0, .L7 ; 0x341923C0
0x341923B2: 9808 LDR R0, [SP, #32]
0x341923B4: 9909 LDR R1, [SP, #36]
0x341923B6: F850 2B08 LDR R2, [R0], #8
0x341923BA: AB02 ADD R3, SP, #8
0x341923BC: F7F9 FF74 BL SAL_XSPI_SetClock ; 0x3418C2A8
.L7:
0x341923C0: 9808 LDR R0, [SP, #32]
0x341923C2: A905 ADD R1, SP, #20
0x341923C4: F7FF FB94 BL SFDP_ReadHeader ; 0x34191AF0
0x341923C8: B118 CBZ R0, .L8 ; 0x341923D2
0x341923CA: 20F2 MOVS R0, #242
0x341923CC: F88D 001F STRB.W R0, [SP, #31]
0x341923D0: E7FF B 46L8 ; 0x341923D2
.L8:
0x341923D2: F99D 001F LDRSB.W R0, [SP, #31]
0x341923D6: B00C ADD SP, SP, #48
0x341923D8: BD80 POP 123R7, PC}
Section .init.TIM13_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
TIM13_IRQHandler:
0x341923DA: E7FE B TIM13_IRQHandler ; 0x341923DA
Section .text.EXTMEM_DRIVER_NOR_SFDP_Enable_MemoryMappedMode from blto2_FSBL_lto.o, size=58, align=4
EXTMEM_DRIVER_NOR_SFDP_Enable_MemoryMappedMode:
0x341923DC: B580 PUSH 123R7, LR}
0x341923DE: B084 SUB SP, SP, #16
0x341923E0: 9003 STR R0, [SP, #12]
0x341923E2: F04F 0C00 MOV.W R12, #0
0x341923E6: F88D C00B STRB.W R12, [SP, #11]
0x341923EA: 9903 LDR R1, [SP, #12]
0x341923EC: F101 0008 ADD.W R0, R1, #8
0x341923F0: F891 2050 LDRB.W R2, [R1, #80]
0x341923F4: F891 3075 LDRB.W R3, [R1, #117]
0x341923F8: F891 1076 LDRB.W R1, [R1, #118]
0x341923FC: 46EE MOV LR, SP
0x341923FE: F8CE C000 STR.W R12, [LR]
0x34192402: F7FA F90F BL SAL_XSPI_EnableMapMode ; 0x3418C624
0x34192406: B110 CBZ R0, .L1 ; 0x3419240E
0x34192408: 20F3 MOVS R0, #243
0x3419240A: F88D 000B STRB.W R0, [SP, #11]
.L1:
0x3419240E: F99D 000B LDRSB.W R0, [SP, #11]
0x34192412: B004 ADD SP, SP, #16
0x34192414: BD80 POP 123R7, PC}
Section .init.TIM14_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
TIM14_IRQHandler:
0x34192416: E7FE B TIM14_IRQHandler ; 0x34192416
Section .text.SAL_XSPI_Init from blto2_FSBL_lto.o, size=86, align=4
SAL_XSPI_Init:
0x34192418: B580 PUSH 123R7, LR}
0x3419241A: B098 SUB SP, SP, #96
0x3419241C: 9017 STR R0, [SP, #92]
0x3419241E: 9116 STR R1, [SP, #88]
0x34192420: A803 ADD R0, SP, #12
0x34192422: 9001 STR R0, [SP, #4]
0x34192424: 214C MOVS R1, #76
0x34192426: 9102 STR R1, [SP, #8]
0x34192428: F7FA FA98 BL __aeabi_memclr ; 0x3418C95C
0x3419242C: 9901 LDR R1, [SP, #4]
0x3419242E: 9A02 LDR R2, [SP, #8]
0x34192430: 205A MOVS R0, #90
0x34192432: 9005 STR R0, [SP, #20]
0x34192434: 2001 MOVS R0, #1
0x34192436: 9006 STR R0, [SP, #24]
0x34192438: F44F 7080 MOV.W R0, #0x0100
0x3419243C: 900A STR R0, [SP, #40]
0x3419243E: F44F 5000 MOV.W R0, #0x2000
0x34192442: 900B STR R0, [SP, #44]
0x34192444: F04F 7080 MOV.W R0, #0x01000000
0x34192448: 9011 STR R0, [SP, #68]
0x3419244A: 2008 MOVS R0, #8
0x3419244C: 9014 STR R0, [SP, #80]
0x3419244E: 9816 LDR R0, [SP, #88]
0x34192450: 9B17 LDR R3, [SP, #92]
0x34192452: 6018 STR R0, [R3]
0x34192454: 9817 LDR R0, [SP, #92]
0x34192456: 3004 ADDS R0, #4
0x34192458: F7FA FA61 BL __aeabi_memcpy4 ; 0x3418C91E
0x3419245C: 9917 LDR R1, [SP, #92]
0x3419245E: 2000 MOVS R0, #0
0x34192460: F881 0050 STRB.W R0, [R1, #80]
0x34192464: 9917 LDR R1, [SP, #92]
0x34192466: F881 0052 STRB.W R0, [R1, #82]
0x3419246A: B018 ADD SP, SP, #96
0x3419246C: BD80 POP 123R7, PC}
Section .init.TIM15_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
TIM15_IRQHandler:
0x3419246E: E7FE B TIM15_IRQHandler ; 0x3419246E
Section .text.SAL_XSPI_MemoryConfig from blto2_FSBL_lto.o, size=666, align=4
SAL_XSPI_MemoryConfig:
0x34192470: B580 PUSH 123R7, LR}
0x34192472: B09A SUB SP, SP, #104
0x34192474: 9019 STR R0, [SP, #100]
0x34192476: F88D 1063 STRB.W R1, [SP, #99]
0x3419247A: 9217 STR R2, [SP, #92]
0x3419247C: 2000 MOVS R0, #0
0x3419247E: F88D 005B STRB.W R0, [SP, #91]
0x34192482: 9819 LDR R0, [SP, #100]
0x34192484: 1D01 ADDS R1, R0, #4
0x34192486: A803 ADD R0, SP, #12
0x34192488: 224C MOVS R2, #76
0x3419248A: F7FA FA48 BL __aeabi_memcpy4 ; 0x3418C91E
0x3419248E: F89D 0063 LDRB.W R0, [SP, #99]
0x34192492: 4601 MOV R1, R0
0x34192494: 9101 STR R1, [SP, #4]
0x34192496: 2804 CMP R0, #4
0x34192498: F200 812A BHI.W 46L3 ; 0x341926F0
0x3419249C: 9901 LDR R1, [SP, #4]
0x3419249E: E8DF F011 TBH 91PC, R1, LSL #1]
0x341924A2: 05 DC.B 0x05 ; '\x05'
0x341924A3: 00 DC.B 0x00 ; '\0'
0x341924A4: 1F DC.B 0x1F ; '\x1F'
0x341924A5: 01 DC.B 0x01 ; '\x01'
0x341924A6: 08 DC.B 0x08 ; '\b'
0x341924A7: 01 DC.B 0x01 ; '\x01'
0x341924A8: 27 DC.B 0x27 ; '''
0x341924A9: 01 DC.B 0x01 ; '\x01'
0x341924AA: 0C DC.B 0x0C ; '\x0C'
0x341924AB: 01 DC.B 0x01 ; '\x01'
0x341924AC: 9817 LDR R0, [SP, #92]
0x341924AE: 7800 LDRB R0, [R0]
0x341924B0: 9919 LDR R1, [SP, #100]
0x341924B2: F881 0052 STRB.W R0, [R1, #82]
0x341924B6: 9819 LDR R0, [SP, #100]
0x341924B8: F890 0052 LDRB.W R0, [R0, #82]
0x341924BC: 4601 MOV R1, R0
0x341924BE: 9100 STR R1, [SP, #0]
0x341924C0: 280D CMP R0, #13
0x341924C2: F200 80F2 BHI.W 46L1 ; 0x341926AA
0x341924C6: 9900 LDR R1, [SP, #0]
0x341924C8: E8DF F001 TBB 91PC, R1]
0x341924CC: 07 DC.B 0x07 ; '\x07'
0x341924CD: 07 DC.B 0x07 ; '\x07'
0x341924CE: 07 DC.B 0x07 ; '\x07'
0x341924CF: 07 DC.B 0x07 ; '\x07'
0x341924D0: 1B DC.B 0x1B ; '\x1B'
0x341924D1: 2F DC.B 0x2F ; '/'
0x341924D2: 43 DC.B 0x43 ; 'C'
0x341924D3: 43 DC.B 0x43 ; 'C'
0x341924D4: 57 DC.B 0x57 ; 'W'
0x341924D5: 70 DC.B 0x70 ; 'p'
0x341924D6: 84 DC.B 0x84 ; '\x84'
0x341924D7: 9E DC.B 0x9E ; '\x9E'
0x341924D8: B9 DC.B 0xB9 ; '\xB9'
0x341924D9: D4 DC.B 0xD4 ; '\xD4'
0x341924DA: 2001 MOVS R0, #1
0x341924DC: 9006 STR R0, [SP, #24]
0x341924DE: 2000 MOVS R0, #0
0x341924E0: 9007 STR R0, [SP, #28]
0x341924E2: 9008 STR R0, [SP, #32]
0x341924E4: F44F 7180 MOV.W R1, #0x0100
0x341924E8: 910A STR R1, [SP, #40]
0x341924EA: F44F 5100 MOV.W R1, #0x2000
0x341924EE: 910B STR R1, [SP, #44]
0x341924F0: 900C STR R0, [SP, #48]
0x341924F2: F04F 7180 MOV.W R1, #0x01000000
0x341924F6: 9111 STR R1, [SP, #68]
0x341924F8: 9013 STR R0, [SP, #76]
0x341924FA: 2108 MOVS R1, #8
0x341924FC: 9114 STR R1, [SP, #80]
0x341924FE: 9015 STR R0, [SP, #84]
0x34192500: E0D6 B 46L2 ; 0x341926B0
0x34192502: 2001 MOVS R0, #1
0x34192504: 9006 STR R0, [SP, #24]
0x34192506: 2000 MOVS R0, #0
0x34192508: 9007 STR R0, [SP, #28]
0x3419250A: 9008 STR R0, [SP, #32]
0x3419250C: F44F 7180 MOV.W R1, #0x0100
0x34192510: 910A STR R1, [SP, #40]
0x34192512: 900C STR R0, [SP, #48]
0x34192514: F44F 5100 MOV.W R1, #0x2000
0x34192518: 910B STR R1, [SP, #44]
0x3419251A: F04F 7140 MOV.W R1, #0x03000000
0x3419251E: 9111 STR R1, [SP, #68]
0x34192520: 9013 STR R0, [SP, #76]
0x34192522: 2106 MOVS R1, #6
0x34192524: 9114 STR R1, [SP, #80]
0x34192526: 9015 STR R0, [SP, #84]
0x34192528: E0C2 B 46L2 ; 0x341926B0
0x3419252A: 2001 MOVS R0, #1
0x3419252C: 9006 STR R0, [SP, #24]
0x3419252E: 2000 MOVS R0, #0
0x34192530: 9007 STR R0, [SP, #28]
0x34192532: 9008 STR R0, [SP, #32]
0x34192534: F44F 7140 MOV.W R1, #0x0300
0x34192538: 910A STR R1, [SP, #40]
0x3419253A: 900C STR R0, [SP, #48]
0x3419253C: F44F 5100 MOV.W R1, #0x2000
0x34192540: 910B STR R1, [SP, #44]
0x34192542: F04F 7140 MOV.W R1, #0x03000000
0x34192546: 9111 STR R1, [SP, #68]
0x34192548: 9013 STR R0, [SP, #76]
0x3419254A: 2106 MOVS R1, #6
0x3419254C: 9114 STR R1, [SP, #80]
0x3419254E: 9015 STR R0, [SP, #84]
0x34192550: E0AE B 46L2 ; 0x341926B0
0x34192552: 2003 MOVS R0, #3
0x34192554: 9006 STR R0, [SP, #24]
0x34192556: 2000 MOVS R0, #0
0x34192558: 9007 STR R0, [SP, #28]
0x3419255A: 9008 STR R0, [SP, #32]
0x3419255C: F44F 7140 MOV.W R1, #0x0300
0x34192560: 910A STR R1, [SP, #40]
0x34192562: 900C STR R0, [SP, #48]
0x34192564: F44F 5100 MOV.W R1, #0x2000
0x34192568: 910B STR R1, [SP, #44]
0x3419256A: F04F 7140 MOV.W R1, #0x03000000
0x3419256E: 9111 STR R1, [SP, #68]
0x34192570: 9013 STR R0, [SP, #76]
0x34192572: 2106 MOVS R1, #6
0x34192574: 9114 STR R1, [SP, #80]
0x34192576: 9015 STR R0, [SP, #84]
0x34192578: E09A B 46L2 ; 0x341926B0
0x3419257A: 2003 MOVS R0, #3
0x3419257C: 9006 STR R0, [SP, #24]
0x3419257E: 2000 MOVS R0, #0
0x34192580: 9007 STR R0, [SP, #28]
0x34192582: 2108 MOVS R1, #8
0x34192584: 9108 STR R1, [SP, #32]
0x34192586: F44F 7140 MOV.W R1, #0x0300
0x3419258A: 910A STR R1, [SP, #40]
0x3419258C: F44F 5100 MOV.W R1, #0x2000
0x34192590: 910B STR R1, [SP, #44]
0x34192592: F44F 6100 MOV.W R1, #0x0800
0x34192596: 910C STR R1, [SP, #48]
0x34192598: F04F 7140 MOV.W R1, #0x03000000
0x3419259C: 9111 STR R1, [SP, #68]
0x3419259E: F04F 6100 MOV.W R1, #0x08000000
0x341925A2: 9113 STR R1, [SP, #76]
0x341925A4: 2106 MOVS R1, #6
0x341925A6: 9114 STR R1, [SP, #80]
0x341925A8: 9015 STR R0, [SP, #84]
0x341925AA: E081 B 46L2 ; 0x341926B0
0x341925AC: 2001 MOVS R0, #1
0x341925AE: 9006 STR R0, [SP, #24]
0x341925B0: 2000 MOVS R0, #0
0x341925B2: 9007 STR R0, [SP, #28]
0x341925B4: 9008 STR R0, [SP, #32]
0x341925B6: F44F 6180 MOV.W R1, #0x0400
0x341925BA: 910A STR R1, [SP, #40]
0x341925BC: F44F 5140 MOV.W R1, #0x3000
0x341925C0: 910B STR R1, [SP, #44]
0x341925C2: 900C STR R0, [SP, #48]
0x341925C4: F04F 6180 MOV.W R1, #0x04000000
0x341925C8: 9111 STR R1, [SP, #68]
0x341925CA: 9013 STR R0, [SP, #76]
0x341925CC: 2108 MOVS R1, #8
0x341925CE: 9114 STR R1, [SP, #80]
0x341925D0: 9015 STR R0, [SP, #84]
0x341925D2: E06D B 46L2 ; 0x341926B0
0x341925D4: 2004 MOVS R0, #4
0x341925D6: 9006 STR R0, [SP, #24]
0x341925D8: 2000 MOVS R0, #0
0x341925DA: 9007 STR R0, [SP, #28]
0x341925DC: 9008 STR R0, [SP, #32]
0x341925DE: F44F 6080 MOV.W R0, #0x0400
0x341925E2: 900A STR R0, [SP, #40]
0x341925E4: F44F 5040 MOV.W R0, #0x3000
0x341925E8: 900B STR R0, [SP, #44]
0x341925EA: F44F 6000 MOV.W R0, #0x0800
0x341925EE: 900C STR R0, [SP, #48]
0x341925F0: F04F 6080 MOV.W R0, #0x04000000
0x341925F4: 9011 STR R0, [SP, #68]
0x341925F6: F04F 6000 MOV.W R0, #0x08000000
0x341925FA: 9013 STR R0, [SP, #76]
0x341925FC: 2008 MOVS R0, #8
0x341925FE: 9014 STR R0, [SP, #80]
0x34192600: F04F 5000 MOV.W R0, #0x20000000
0x34192604: 9015 STR R0, [SP, #84]
0x34192606: E053 B 46L2 ; 0x341926B0
0x34192608: 2004 MOVS R0, #4
0x3419260A: 9006 STR R0, [SP, #24]
0x3419260C: 2010 MOVS R0, #16
0x3419260E: 9007 STR R0, [SP, #28]
0x34192610: 2008 MOVS R0, #8
0x34192612: 9008 STR R0, [SP, #32]
0x34192614: F44F 6080 MOV.W R0, #0x0400
0x34192618: 900A STR R0, [SP, #40]
0x3419261A: F44F 5040 MOV.W R0, #0x3000
0x3419261E: 900B STR R0, [SP, #44]
0x34192620: F44F 6000 MOV.W R0, #0x0800
0x34192624: 900C STR R0, [SP, #48]
0x34192626: F04F 6080 MOV.W R0, #0x04000000
0x3419262A: 9011 STR R0, [SP, #68]
0x3419262C: F04F 6000 MOV.W R0, #0x08000000
0x34192630: 9013 STR R0, [SP, #76]
0x34192632: 2014 MOVS R0, #20
0x34192634: 9014 STR R0, [SP, #80]
0x34192636: F04F 5000 MOV.W R0, #0x20000000
0x3419263A: 9015 STR R0, [SP, #84]
0x3419263C: E038 B 46L2 ; 0x341926B0
0x3419263E: 2004 MOVS R0, #4
0x34192640: 9006 STR R0, [SP, #24]
0x34192642: 2000 MOVS R0, #0
0x34192644: 9007 STR R0, [SP, #28]
0x34192646: 9008 STR R0, [SP, #32]
0x34192648: F44F 6180 MOV.W R1, #0x0400
0x3419264C: 910A STR R1, [SP, #40]
0x3419264E: F44F 5140 MOV.W R1, #0x3000
0x34192652: 910B STR R1, [SP, #44]
0x34192654: F44F 6100 MOV.W R1, #0x0800
0x34192658: 910C STR R1, [SP, #48]
0x3419265A: 900E STR R0, [SP, #56]
0x3419265C: F04F 6080 MOV.W R0, #0x04000000
0x34192660: 9011 STR R0, [SP, #68]
0x34192662: F04F 6000 MOV.W R0, #0x08000000
0x34192666: 9013 STR R0, [SP, #76]
0x34192668: 200A MOVS R0, #10
0x3419266A: 9014 STR R0, [SP, #80]
0x3419266C: F04F 5000 MOV.W R0, #0x20000000
0x34192670: 9015 STR R0, [SP, #84]
0x34192672: E01D B 46L2 ; 0x341926B0
0x34192674: 2004 MOVS R0, #4
0x34192676: 9006 STR R0, [SP, #24]
0x34192678: 2000 MOVS R0, #0
0x3419267A: 9007 STR R0, [SP, #28]
0x3419267C: 9008 STR R0, [SP, #32]
0x3419267E: F44F 6180 MOV.W R1, #0x0400
0x34192682: 910A STR R1, [SP, #40]
0x34192684: F44F 5140 MOV.W R1, #0x3000
0x34192688: 910B STR R1, [SP, #44]
0x3419268A: F44F 6100 MOV.W R1, #0x0800
0x3419268E: 910C STR R1, [SP, #48]
0x34192690: 900E STR R0, [SP, #56]
0x34192692: F04F 60A0 MOV.W R0, #0x05000000
0x34192696: 9011 STR R0, [SP, #68]
0x34192698: F04F 6000 MOV.W R0, #0x08000000
0x3419269C: 9013 STR R0, [SP, #76]
0x3419269E: 200A MOVS R0, #10
0x341926A0: 9014 STR R0, [SP, #80]
0x341926A2: F04F 5000 MOV.W R0, #0x20000000
0x341926A6: 9015 STR R0, [SP, #84]
0x341926A8: E002 B 46L2 ; 0x341926B0
.L1:
0x341926AA: 2001 MOVS R0, #1
0x341926AC: F88D 005B STRB.W R0, [SP, #91]
.L2:
0x341926B0: E021 B 46L4 ; 0x341926F6
0x341926B2: F44F 5040 MOV.W R0, #0x3000
0x341926B6: 900B STR R0, [SP, #44]
0x341926B8: E01D B 46L4 ; 0x341926F6
0x341926BA: 9817 LDR R0, [SP, #92]
0x341926BC: 7800 LDRB R0, [R0]
0x341926BE: F88D 000B STRB.W R0, [SP, #11]
0x341926C2: 9819 LDR R0, [SP, #100]
0x341926C4: 6800 LDR R0, [R0]
0x341926C6: 6800 LDR R0, [R0]
0x341926C8: 6880 LDR R0, [R0, #8]
0x341926CA: F420 10F8 BIC R0, R0, #0x1F0000
0x341926CE: F89D 100B LDRB.W R1, [SP, #11]
0x341926D2: EA40 4001 ORR.W R0, R0, R1, LSL #16
0x341926D6: 9919 LDR R1, [SP, #100]
0x341926D8: 6809 LDR R1, [R1]
0x341926DA: 6809 LDR R1, [R1]
0x341926DC: 6088 STR R0, [R1, #8]
0x341926DE: E00A B 46L4 ; 0x341926F6
0x341926E0: 9817 LDR R0, [SP, #92]
0x341926E2: 7800 LDRB R0, [R0]
0x341926E4: F88D 000A STRB.W R0, [SP, #10]
0x341926E8: F89D 000A LDRB.W R0, [SP, #10]
0x341926EC: 9014 STR R0, [SP, #80]
0x341926EE: E002 B 46L4 ; 0x341926F6
.L3:
0x341926F0: 2001 MOVS R0, #1
0x341926F2: F88D 005B STRB.W R0, [SP, #91]
.L4:
0x341926F6: 9819 LDR R0, [SP, #100]
0x341926F8: 3004 ADDS R0, #4
0x341926FA: A903 ADD R1, SP, #12
0x341926FC: 224C MOVS R2, #76
0x341926FE: F7FA F90E BL __aeabi_memcpy4 ; 0x3418C91E
0x34192702: F89D 005B LDRB.W R0, [SP, #91]
0x34192706: B01A ADD SP, SP, #104
0x34192708: BD80 POP 123R7, PC}
Section .init.TIM16_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
TIM16_IRQHandler:
0x3419270A: E7FE B TIM16_IRQHandler ; 0x3419270A
Section .text.SAL_XSPI_GetSFDP from blto2_FSBL_lto.o, size=222, align=4
SAL_XSPI_GetSFDP:
0x3419270C: B580 PUSH 123R7, LR}
0x3419270E: B098 SUB SP, SP, #96
0x34192710: 9017 STR R0, [SP, #92]
0x34192712: 9116 STR R1, [SP, #88]
0x34192714: 9215 STR R2, [SP, #84]
0x34192716: 9314 STR R3, [SP, #80]
0x34192718: 9817 LDR R0, [SP, #92]
0x3419271A: 1D01 ADDS R1, R0, #4
0x3419271C: 4668 MOV R0, SP
0x3419271E: 224C MOVS R2, #76
0x34192720: F7FA F8FD BL __aeabi_memcpy4 ; 0x3418C91E
0x34192724: 9817 LDR R0, [SP, #92]
0x34192726: F890 0050 LDRB.W R0, [R0, #80]
0x3419272A: 9904 LDR R1, [SP, #16]
0x3419272C: 225A MOVS R2, #90
0x3419272E: F7F9 FDF5 BL XSPI_FormatCommand ; 0x3418C31C
0x34192732: 9002 STR R0, [SP, #8]
0x34192734: 9816 LDR R0, [SP, #88]
0x34192736: 9006 STR R0, [SP, #24]
0x34192738: 9814 LDR R0, [SP, #80]
0x3419273A: 900F STR R0, [SP, #60]
0x3419273C: 9817 LDR R0, [SP, #92]
0x3419273E: F890 0051 LDRB.W R0, [R0, #81]
0x34192742: 9011 STR R0, [SP, #68]
0x34192744: 9807 LDR R0, [SP, #28]
0x34192746: F5B0 7F80 CMP.W R0, #0x0100
0x3419274A: D003 BEQ 46L1 ; 0x34192754
0x3419274C: 9807 LDR R0, [SP, #28]
0x3419274E: F5B0 7F40 CMP.W R0, #0x0300
0x34192752: D102 BNE 46L2 ; 0x3419275A
.L1:
0x34192754: F44F 5000 MOV.W R0, #0x2000
0x34192758: 9008 STR R0, [SP, #32]
.L2:
0x3419275A: 9817 LDR R0, [SP, #92]
0x3419275C: F890 0052 LDRB.W R0, [R0, #82]
0x34192760: 2801 CMP R0, #1
0x34192762: D013 BEQ 46L3 ; 0x3419278C
0x34192764: 9817 LDR R0, [SP, #92]
0x34192766: F890 0052 LDRB.W R0, [R0, #82]
0x3419276A: 2802 CMP R0, #2
0x3419276C: D00E BEQ 46L3 ; 0x3419278C
0x3419276E: 9817 LDR R0, [SP, #92]
0x34192770: F890 0052 LDRB.W R0, [R0, #82]
0x34192774: 2803 CMP R0, #3
0x34192776: D009 BEQ 46L3 ; 0x3419278C
0x34192778: 9817 LDR R0, [SP, #92]
0x3419277A: F890 0052 LDRB.W R0, [R0, #82]
0x3419277E: 2804 CMP R0, #4
0x34192780: D004 BEQ 46L3 ; 0x3419278C
0x34192782: 9817 LDR R0, [SP, #92]
0x34192784: F890 0052 LDRB.W R0, [R0, #82]
0x34192788: 2805 CMP R0, #5
0x3419278A: D105 BNE 46L4 ; 0x34192798
.L3:
0x3419278C: F44F 7080 MOV.W R0, #0x0100
0x34192790: 9007 STR R0, [SP, #28]
0x34192792: F04F 7080 MOV.W R0, #0x01000000
0x34192796: 900E STR R0, [SP, #56]
.L4:
0x34192798: 9810 LDR R0, [SP, #64]
0x3419279A: F1B0 6F00 CMP.W R0, #0x08000000
0x3419279E: D103 BNE 46L5 ; 0x341927A8
0x341927A0: F04F 5000 MOV.W R0, #0x20000000
0x341927A4: 9012 STR R0, [SP, #72]
0x341927A6: E001 B 46L6 ; 0x341927AC
.L5:
0x341927A8: 2000 MOVS R0, #0
0x341927AA: 9012 STR R0, [SP, #72]
.L6:
0x341927AC: 9817 LDR R0, [SP, #92]
0x341927AE: 6800 LDR R0, [R0]
0x341927B0: 4669 MOV R1, SP
0x341927B2: 2264 MOVS R2, #100
0x341927B4: F7FE FAAE BL HAL_XSPI_Command ; 0x34190D14
0x341927B8: F88D 004F STRB.W R0, [SP, #79]
0x341927BC: F89D 004F LDRB.W R0, [SP, #79]
0x341927C0: B100 CBZ R0, .L7 ; 0x341927C4
0x341927C2: E007 B 46L8 ; 0x341927D4
.L7:
0x341927C4: 9817 LDR R0, [SP, #92]
0x341927C6: 6800 LDR R0, [R0]
0x341927C8: 9915 LDR R1, [SP, #84]
0x341927CA: 2264 MOVS R2, #100
0x341927CC: F7F8 FAD0 BL HAL_XSPI_Receive ; 0x3418AD70
0x341927D0: F88D 004F STRB.W R0, [SP, #79]
.L8:
0x341927D4: F89D 004F LDRB.W R0, [SP, #79]
0x341927D8: B118 CBZ R0, .L9 ; 0x341927E2
0x341927DA: 9817 LDR R0, [SP, #92]
0x341927DC: 6800 LDR R0, [R0]
0x341927DE: F7FE FEA7 BL HAL_XSPI_Abort ; 0x34191530
.L9:
0x341927E2: F89D 004F LDRB.W R0, [SP, #79]
0x341927E6: B018 ADD SP, SP, #96
0x341927E8: BD80 POP 123R7, PC}
Section .init.TIM17_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
TIM17_IRQHandler:
0x341927EA: E7FE B TIM17_IRQHandler ; 0x341927EA
Section .text.SAL_XSPI_Write from blto2_FSBL_lto.o, size=138, align=4
SAL_XSPI_Write:
0x341927EC: B580 PUSH 123R7, LR}
0x341927EE: B098 SUB SP, SP, #96
0x341927F0: F8DD C068 LDR.W R12, [SP, #104]
0x341927F4: 9017 STR R0, [SP, #92]
0x341927F6: F88D 105B STRB.W R1, [SP, #91]
0x341927FA: 9215 STR R2, [SP, #84]
0x341927FC: 9314 STR R3, [SP, #80]
0x341927FE: 9817 LDR R0, [SP, #92]
0x34192800: 1D01 ADDS R1, R0, #4
0x34192802: 4668 MOV R0, SP
0x34192804: 224C MOVS R2, #76
0x34192806: F7FA F88A BL __aeabi_memcpy4 ; 0x3418C91E
0x3419280A: 9817 LDR R0, [SP, #92]
0x3419280C: F890 0050 LDRB.W R0, [R0, #80]
0x34192810: 9904 LDR R1, [SP, #16]
0x34192812: F89D 205B LDRB.W R2, [SP, #91]
0x34192816: F7F9 FD81 BL XSPI_FormatCommand ; 0x3418C31C
0x3419281A: 9002 STR R0, [SP, #8]
0x3419281C: 9815 LDR R0, [SP, #84]
0x3419281E: 9006 STR R0, [SP, #24]
0x34192820: 981A LDR R0, [SP, #104]
0x34192822: 900F STR R0, [SP, #60]
0x34192824: 2000 MOVS R0, #0
0x34192826: 9011 STR R0, [SP, #68]
0x34192828: 9012 STR R0, [SP, #72]
0x3419282A: 9810 LDR R0, [SP, #64]
0x3419282C: F1B0 6F00 CMP.W R0, #0x08000000
0x34192830: D104 BNE 46L1 ; 0x3419283C
0x34192832: 980F LDR R0, [SP, #60]
0x34192834: 2801 CMP R0, #1
0x34192836: D101 BNE 46L1 ; 0x3419283C
0x34192838: 2002 MOVS R0, #2
0x3419283A: 900F STR R0, [SP, #60]
.L1:
0x3419283C: 9817 LDR R0, [SP, #92]
0x3419283E: 6800 LDR R0, [R0]
0x34192840: 4669 MOV R1, SP
0x34192842: 2264 MOVS R2, #100
0x34192844: F7FE FA66 BL HAL_XSPI_Command ; 0x34190D14
0x34192848: F88D 004F STRB.W R0, [SP, #79]
0x3419284C: F89D 004F LDRB.W R0, [SP, #79]
0x34192850: B100 CBZ R0, .L2 ; 0x34192854
0x34192852: E005 B 46L3 ; 0x34192860
.L2:
0x34192854: 9817 LDR R0, [SP, #92]
0x34192856: 9914 LDR R1, [SP, #80]
0x34192858: F7F9 FDD8 BL XSPI_Transmit ; 0x3418C40C
0x3419285C: F88D 004F STRB.W R0, [SP, #79]
.L3:
0x34192860: F89D 004F LDRB.W R0, [SP, #79]
0x34192864: B118 CBZ R0, .L4 ; 0x3419286E
0x34192866: 9817 LDR R0, [SP, #92]
0x34192868: 6800 LDR R0, [R0]
0x3419286A: F7FE FE61 BL HAL_XSPI_Abort ; 0x34191530
.L4:
0x3419286E: F89D 004F LDRB.W R0, [SP, #79]
0x34192872: B018 ADD SP, SP, #96
0x34192874: BD80 POP 123R7, PC}
Section .init.TIM18_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
TIM18_IRQHandler:
0x34192876: E7FE B TIM18_IRQHandler ; 0x34192876
Section .text.SAL_XSPI_CommandSendReadAddress from blto2_FSBL_lto.o, size=190, align=4
SAL_XSPI_CommandSendReadAddress:
0x34192878: B510 PUSH 123R4, LR}
0x3419287A: B09A SUB SP, SP, #104
0x3419287C: 468C MOV R12, R1
0x3419287E: 4686 MOV LR, R0
0x34192880: 981D LDR R0, [SP, #116]
0x34192882: 991C LDR R1, [SP, #112]
0x34192884: F8CD E064 STR.W LR, [SP, #100]
0x34192888: F88D C063 STRB.W R12, [SP, #99]
0x3419288C: 9217 STR R2, [SP, #92]
0x3419288E: 9316 STR R3, [SP, #88]
0x34192890: F8AD 1056 STRH.W R1, [SP, #86]
0x34192894: F88D 0055 STRB.W R0, [SP, #85]
0x34192898: 9819 LDR R0, [SP, #100]
0x3419289A: 1D01 ADDS R1, R0, #4
0x3419289C: A802 ADD R0, SP, #8
0x3419289E: 224C MOVS R2, #76
0x341928A0: F7FA F83D BL __aeabi_memcpy4 ; 0x3418C91E
0x341928A4: 9819 LDR R0, [SP, #100]
0x341928A6: F890 0050 LDRB.W R0, [R0, #80]
0x341928AA: 9906 LDR R1, [SP, #24]
0x341928AC: F89D 2063 LDRB.W R2, [SP, #99]
0x341928B0: F7F9 FD34 BL XSPI_FormatCommand ; 0x3418C31C
0x341928B4: 9004 STR R0, [SP, #16]
0x341928B6: 9817 LDR R0, [SP, #92]
0x341928B8: 9008 STR R0, [SP, #32]
0x341928BA: 9819 LDR R0, [SP, #100]
0x341928BC: F890 0051 LDRB.W R0, [R0, #81]
0x341928C0: 9013 STR R0, [SP, #76]
0x341928C2: F8BD 0056 LDRH.W R0, [SP, #86]
0x341928C6: 9011 STR R0, [SP, #68]
0x341928C8: F89D 0055 LDRB.W R0, [SP, #85]
0x341928CC: 28C2 CMP R0, #194
0x341928CE: D106 BNE 46L1 ; 0x341928DE
0x341928D0: 9812 LDR R0, [SP, #72]
0x341928D2: F1B0 6F00 CMP.W R0, #0x08000000
0x341928D6: D102 BNE 46L1 ; 0x341928DE
0x341928D8: 2000 MOVS R0, #0
0x341928DA: 9012 STR R0, [SP, #72]
0x341928DC: E00D B 46L3 ; 0x341928FA
.L1:
0x341928DE: F89D 0055 LDRB.W R0, [SP, #85]
0x341928E2: 28C8 CMP R0, #200
0x341928E4: D107 BNE 46L2 ; 0x341928F6
0x341928E6: 9812 LDR R0, [SP, #72]
0x341928E8: F1B0 6F00 CMP.W R0, #0x08000000
0x341928EC: D103 BNE 46L2 ; 0x341928F6
0x341928EE: 2000 MOVS R0, #0
0x341928F0: 9012 STR R0, [SP, #72]
0x341928F2: 9014 STR R0, [SP, #80]
0x341928F4: E001 B 46L3 ; 0x341928FA
.L2:
0x341928F6: 2000 MOVS R0, #0
0x341928F8: 9014 STR R0, [SP, #80]
.L3:
0x341928FA: 9819 LDR R0, [SP, #100]
0x341928FC: 6800 LDR R0, [R0]
0x341928FE: A902 ADD R1, SP, #8
0x34192900: 2264 MOVS R2, #100
0x34192902: F7FE FA07 BL HAL_XSPI_Command ; 0x34190D14
0x34192906: F88D 0007 STRB.W R0, [SP, #7]
0x3419290A: F89D 0007 LDRB.W R0, [SP, #7]
0x3419290E: B938 CBNZ R0, .L4 ; 0x34192920
0x34192910: 9819 LDR R0, [SP, #100]
0x34192912: 6800 LDR R0, [R0]
0x34192914: 9916 LDR R1, [SP, #88]
0x34192916: 2264 MOVS R2, #100
0x34192918: F7F8 FA2A BL HAL_XSPI_Receive ; 0x3418AD70
0x3419291C: F88D 0007 STRB.W R0, [SP, #7]
.L4:
0x34192920: F89D 0007 LDRB.W R0, [SP, #7]
0x34192924: B118 CBZ R0, .L5 ; 0x3419292E
0x34192926: 9819 LDR R0, [SP, #100]
0x34192928: 6800 LDR R0, [R0]
0x3419292A: F7FE FE01 BL HAL_XSPI_Abort ; 0x34191530
.L5:
0x3419292E: F89D 0007 LDRB.W R0, [SP, #7]
0x34192932: B01A ADD SP, SP, #104
0x34192934: BD10 POP 123R4, PC}
Section .init.LPTIM1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
LPTIM1_IRQHandler:
0x34192936: E7FE B LPTIM1_IRQHandler ; 0x34192936
Section .text.SAL_XSPI_DisableMapMode from blto2_FSBL_lto.o, size=22, align=4
SAL_XSPI_DisableMapMode:
0x34192938: B580 PUSH 123R7, LR}
0x3419293A: B082 SUB SP, SP, #8
0x3419293C: 9001 STR R0, [SP, #4]
0x3419293E: F3BF 8F4F DSB SY
0x34192942: 9801 LDR R0, [SP, #4]
0x34192944: 6800 LDR R0, [R0]
0x34192946: F7FE FDF3 BL HAL_XSPI_Abort ; 0x34191530
0x3419294A: B002 ADD SP, SP, #8
0x3419294C: BD80 POP 123R7, PC}
Section .init.LPTIM2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
LPTIM2_IRQHandler:
0x3419294E: E7FE B LPTIM2_IRQHandler ; 0x3419294E
Section .text.SAL_XSPI_Abort from blto2_FSBL_lto.o, size=18, align=4
SAL_XSPI_Abort:
0x34192950: B580 PUSH 123R7, LR}
0x34192952: B082 SUB SP, SP, #8
0x34192954: 9001 STR R0, [SP, #4]
0x34192956: 9801 LDR R0, [SP, #4]
0x34192958: 6800 LDR R0, [R0]
0x3419295A: F7FE FDE9 BL HAL_XSPI_Abort ; 0x34191530
0x3419295E: B002 ADD SP, SP, #8
0x34192960: BD80 POP 123R7, PC}
Section .init.LPTIM3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
LPTIM3_IRQHandler:
0x34192962: E7FE B LPTIM3_IRQHandler ; 0x34192962
Section .text.EXTMEM_Init from blto2_FSBL_lto.o, size=94, align=4
EXTMEM_Init:
0x34192964: B580 PUSH 123R7, LR}
0x34192966: B084 SUB SP, SP, #16
0x34192968: 9003 STR R0, [SP, #12]
0x3419296A: 9102 STR R1, [SP, #8]
0x3419296C: 20FB MOVS R0, #251
0x3419296E: F88D 0007 STRB.W R0, [SP, #7]
0x34192972: 9803 LDR R0, [SP, #12]
0x34192974: BB08 CBNZ R0, .L3 ; 0x341929BA
0x34192976: 2000 MOVS R0, #0
0x34192978: F88D 0007 STRB.W R0, [SP, #7]
0x3419297C: 9803 LDR R0, [SP, #12]
0x3419297E: 21AC MOVS R1, #172
0x34192980: 4341 MULS R1, R0, R1
0x34192982: F240 0000 MOVW R0, #0 ; 0x34000000 = extmem_list_config
0x34192986: F2C3 4000 MOVT R0, #0x3400 ; 0x34000000 = extmem_list_config
0x3419298A: 5C40 LDRB R0, [R0, R1]
0x3419298C: B990 CBNZ R0, .L2 ; 0x341929B4
0x3419298E: 9803 LDR R0, [SP, #12]
0x34192990: F240 0200 MOVW R2, #0 ; 0x34000000 = extmem_list_config
0x34192994: F2C3 4200 MOVT R2, #0x3400 ; 0x34000000 = extmem_list_config
0x34192998: 21AC MOVS R1, #172
0x3419299A: FB00 2301 MLA R3, R0, R1, R2
0x3419299E: 6858 LDR R0, [R3, #4]
0x341929A0: 7A19 LDRB R1, [R3, #8]
0x341929A2: 9A02 LDR R2, [SP, #8]
0x341929A4: 330C ADDS R3, #12
0x341929A6: F7FF FC7F BL EXTMEM_DRIVER_NOR_SFDP_Init ; 0x341922A8
0x341929AA: B110 CBZ R0, .L1 ; 0x341929B2
0x341929AC: 20FD MOVS R0, #253
0x341929AE: F88D 0007 STRB.W R0, [SP, #7]
.L1:
0x341929B2: E002 B 46L3 ; 0x341929BA
.L2:
0x341929B4: 20FE MOVS R0, #254
0x341929B6: F88D 0007 STRB.W R0, [SP, #7]
.L3:
0x341929BA: F99D 0007 LDRSB.W R0, [SP, #7]
0x341929BE: B004 ADD SP, SP, #16
0x341929C0: BD80 POP 123R7, PC}
Section .init.LPTIM4_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
LPTIM4_IRQHandler:
0x341929C2: E7FE B LPTIM4_IRQHandler ; 0x341929C2
Section .text.EXTMEM_DeInit from blto2_FSBL_lto.o, size=78, align=4
EXTMEM_DeInit:
0x341929C4: B580 PUSH 123R7, LR}
0x341929C6: B082 SUB SP, SP, #8
0x341929C8: 9001 STR R0, [SP, #4]
0x341929CA: 20FB MOVS R0, #251
0x341929CC: F88D 0003 STRB.W R0, [SP, #3]
0x341929D0: 9801 LDR R0, [SP, #4]
0x341929D2: B9D0 CBNZ R0, .L2 ; 0x34192A0A
0x341929D4: 2000 MOVS R0, #0
0x341929D6: F88D 0003 STRB.W R0, [SP, #3]
0x341929DA: 9801 LDR R0, [SP, #4]
0x341929DC: 21AC MOVS R1, #172
0x341929DE: 4341 MULS R1, R0, R1
0x341929E0: F240 0000 MOVW R0, #0 ; 0x34000000 = extmem_list_config
0x341929E4: F2C3 4000 MOVT R0, #0x3400 ; 0x34000000 = extmem_list_config
0x341929E8: 5C40 LDRB R0, [R0, R1]
0x341929EA: B958 CBNZ R0, .L1 ; 0x34192A04
0x341929EC: 9801 LDR R0, [SP, #4]
0x341929EE: F240 0200 MOVW R2, #0 ; 0x34000000 = extmem_list_config
0x341929F2: F2C3 4200 MOVT R2, #0x3400 ; 0x34000000 = extmem_list_config
0x341929F6: 21AC MOVS R1, #172
0x341929F8: FB00 2001 MLA R0, R0, R1, R2
0x341929FC: 300C ADDS R0, #12
0x341929FE: F7F9 FC39 BL EXTMEM_DRIVER_NOR_SFDP_DeInit ; 0x3418C274
0x34192A02: E002 B 46L2 ; 0x34192A0A
.L1:
0x34192A04: 20FE MOVS R0, #254
0x34192A06: F88D 0003 STRB.W R0, [SP, #3]
.L2:
0x34192A0A: F99D 0003 LDRSB.W R0, [SP, #3]
0x34192A0E: B002 ADD SP, SP, #8
0x34192A10: BD80 POP 123R7, PC}
Section .init.LPTIM5_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
LPTIM5_IRQHandler:
0x34192A12: E7FE B LPTIM5_IRQHandler ; 0x34192A12
Section .init.ADF1_FLT0_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
ADF1_FLT0_IRQHandler:
0x34192A14: E7FE B ADF1_FLT0_IRQHandler ; 0x34192A14
Section .init.MDF1_FLT0_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
MDF1_FLT0_IRQHandler:
0x34192A16: E7FE B MDF1_FLT0_IRQHandler ; 0x34192A16
Section .init.MDF1_FLT1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
MDF1_FLT1_IRQHandler:
0x34192A18: E7FE B MDF1_FLT1_IRQHandler ; 0x34192A18
Section .init.MDF1_FLT2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
MDF1_FLT2_IRQHandler:
0x34192A1A: E7FE B MDF1_FLT2_IRQHandler ; 0x34192A1A
Section .init.MDF1_FLT3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
MDF1_FLT3_IRQHandler:
0x34192A1C: E7FE B MDF1_FLT3_IRQHandler ; 0x34192A1C
Section .init.MDF1_FLT4_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
MDF1_FLT4_IRQHandler:
0x34192A1E: E7FE B MDF1_FLT4_IRQHandler ; 0x34192A1E
Section .init.MDF1_FLT5_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
MDF1_FLT5_IRQHandler:
0x34192A20: E7FE B MDF1_FLT5_IRQHandler ; 0x34192A20
Section .init.SAI1_A_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
SAI1_A_IRQHandler:
0x34192A22: E7FE B SAI1_A_IRQHandler ; 0x34192A22
Section .init.SAI1_B_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
SAI1_B_IRQHandler:
0x34192A24: E7FE B SAI1_B_IRQHandler ; 0x34192A24
Section .init.SAI2_A_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
SAI2_A_IRQHandler:
0x34192A26: E7FE B SAI2_A_IRQHandler ; 0x34192A26
Section .init.SAI2_B_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
SAI2_B_IRQHandler:
0x34192A28: E7FE B SAI2_B_IRQHandler ; 0x34192A28
Section .init.SPDIFRX_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
SPDIFRX_IRQHandler:
0x34192A2A: E7FE B SPDIFRX_IRQHandler ; 0x34192A2A
Section .init.SPI1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
SPI1_IRQHandler:
0x34192A2C: E7FE B SPI1_IRQHandler ; 0x34192A2C
Section .init.SPI2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
SPI2_IRQHandler:
0x34192A2E: E7FE B SPI2_IRQHandler ; 0x34192A2E
Section .init.SPI3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
SPI3_IRQHandler:
0x34192A30: E7FE B SPI3_IRQHandler ; 0x34192A30
Section .init.SPI4_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
SPI4_IRQHandler:
0x34192A32: E7FE B SPI4_IRQHandler ; 0x34192A32
Section .init.SPI5_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
SPI5_IRQHandler:
0x34192A34: E7FE B SPI5_IRQHandler ; 0x34192A34
Section .init.SPI6_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
SPI6_IRQHandler:
0x34192A36: E7FE B SPI6_IRQHandler ; 0x34192A36
Section .init.USART1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
USART1_IRQHandler:
0x34192A38: E7FE B USART1_IRQHandler ; 0x34192A38
Section .init.USART2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
USART2_IRQHandler:
0x34192A3A: E7FE B USART2_IRQHandler ; 0x34192A3A
Section .init.USART3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
USART3_IRQHandler:
0x34192A3C: E7FE B USART3_IRQHandler ; 0x34192A3C
Section .init.UART4_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
UART4_IRQHandler:
0x34192A3E: E7FE B UART4_IRQHandler ; 0x34192A3E
Section .init.UART5_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
UART5_IRQHandler:
0x34192A40: E7FE B UART5_IRQHandler ; 0x34192A40
Section .init.USART6_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
USART6_IRQHandler:
0x34192A42: E7FE B USART6_IRQHandler ; 0x34192A42
Section .init.UART7_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
UART7_IRQHandler:
0x34192A44: E7FE B UART7_IRQHandler ; 0x34192A44
Section .init.UART8_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
UART8_IRQHandler:
0x34192A46: E7FE B UART8_IRQHandler ; 0x34192A46
Section .init.UART9_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
UART9_IRQHandler:
0x34192A48: E7FE B UART9_IRQHandler ; 0x34192A48
Section .init.USART10_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
USART10_IRQHandler:
0x34192A4A: E7FE B USART10_IRQHandler ; 0x34192A4A
Section .init.LPUART1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
LPUART1_IRQHandler:
0x34192A4C: E7FE B LPUART1_IRQHandler ; 0x34192A4C
Section .init.XSPI1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
XSPI1_IRQHandler:
0x34192A4E: E7FE B XSPI1_IRQHandler ; 0x34192A4E
Section .init.XSPI2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
XSPI2_IRQHandler:
0x34192A50: E7FE B XSPI2_IRQHandler ; 0x34192A50
Section .init.XSPI3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
XSPI3_IRQHandler:
0x34192A52: E7FE B XSPI3_IRQHandler ; 0x34192A52
Section .init.FMC_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
FMC_IRQHandler:
0x34192A54: E7FE B FMC_IRQHandler ; 0x34192A54
Section .init.SDMMC1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
SDMMC1_IRQHandler:
0x34192A56: E7FE B SDMMC1_IRQHandler ; 0x34192A56
Section .init.SDMMC2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
SDMMC2_IRQHandler:
0x34192A58: E7FE B SDMMC2_IRQHandler ; 0x34192A58
Section .init.UCPD1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
UCPD1_IRQHandler:
0x34192A5A: E7FE B UCPD1_IRQHandler ; 0x34192A5A
Section .init.USB1_OTG_HS_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
USB1_OTG_HS_IRQHandler:
0x34192A5C: E7FE B USB1_OTG_HS_IRQHandler ; 0x34192A5C
Section .init.USB2_OTG_HS_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
USB2_OTG_HS_IRQHandler:
0x34192A5E: E7FE B USB2_OTG_HS_IRQHandler ; 0x34192A5E
Section .init.ETH1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
ETH1_IRQHandler:
0x34192A60: E7FE B ETH1_IRQHandler ; 0x34192A60
Section .init.FDCAN1_IT0_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
FDCAN1_IT0_IRQHandler:
0x34192A62: E7FE B FDCAN1_IT0_IRQHandler ; 0x34192A62
Section .init.FDCAN1_IT1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
FDCAN1_IT1_IRQHandler:
0x34192A64: E7FE B FDCAN1_IT1_IRQHandler ; 0x34192A64
Section .init.FDCAN2_IT0_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
FDCAN2_IT0_IRQHandler:
0x34192A66: E7FE B FDCAN2_IT0_IRQHandler ; 0x34192A66
Section .init.FDCAN2_IT1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
FDCAN2_IT1_IRQHandler:
0x34192A68: E7FE B FDCAN2_IT1_IRQHandler ; 0x34192A68
Section .init.FDCAN3_IT0_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
FDCAN3_IT0_IRQHandler:
0x34192A6A: E7FE B FDCAN3_IT0_IRQHandler ; 0x34192A6A
Section .init.FDCAN3_IT1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
FDCAN3_IT1_IRQHandler:
0x34192A6C: E7FE B FDCAN3_IT1_IRQHandler ; 0x34192A6C
Section .init.FDCAN_CU_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
FDCAN_CU_IRQHandler:
0x34192A6E: E7FE B FDCAN_CU_IRQHandler ; 0x34192A6E
Section .init.MDIOS_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
MDIOS_IRQHandler:
0x34192A70: E7FE B MDIOS_IRQHandler ; 0x34192A70
Section .init.DCMI_PSSI_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
DCMI_PSSI_IRQHandler:
0x34192A72: E7FE B DCMI_PSSI_IRQHandler ; 0x34192A72
Section .init.WAKEUP_PIN_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
WAKEUP_PIN_IRQHandler:
0x34192A74: E7FE B WAKEUP_PIN_IRQHandler ; 0x34192A74
Section .init.CTI_INT0_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
CTI_INT0_IRQHandler:
0x34192A76: E7FE B CTI_INT0_IRQHandler ; 0x34192A76
Section .init.CTI_INT1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
CTI_INT1_IRQHandler:
0x34192A78: E7FE B CTI_INT1_IRQHandler ; 0x34192A78
Section .init.LTDC_UP_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
LTDC_UP_IRQHandler:
0x34192A7A: E7FE B LTDC_UP_IRQHandler ; 0x34192A7A
Section .init.LTDC_UP_ERR_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2
LTDC_UP_ERR_IRQHandler:
0x34192A7C: E7FE B LTDC_UP_ERR_IRQHandler ; 0x34192A7C
Section .rodata.SFDP_BuildGenericDriver.block_erase_unit from blto2_FSBL_lto.o, size=8, align=2
SFDP_BuildGenericDriver.block_erase_unit:
0x34192A7E: 10 DC.B 0x10 ; '\x10'
0x34192A7F: 00 DC.B 0x00 ; '\0'
0x34192A80: 00 DC.B 0x00 ; '\0'
0x34192A81: 01 DC.B 0x01 ; '\x01'
0x34192A82: A0 DC.B 0xA0 ; '\xA0'
0x34192A83: 0F DC.B 0x0F ; '\x0F'
0x34192A84: 00 DC.B 0x00 ; '\0'
0x34192A85: FA DC.B 0xFA ; '\xFA'
Section .rodata..L.str.17 from blto2_FSBL_lto.o, size=106, align=1
0x34192A86: 44 DC.B 0x44 ; 'D'
0x34192A87: 3A DC.B 0x3A ; ':'
0x34192A88: 5C DC.B 0x5C ; '\\'
0x34192A89: 50 DC.B 0x50 ; 'P'
0x34192A8A: 72 DC.B 0x72 ; 'r'
0x34192A8B: 6F DC.B 0x6F ; 'o'
0x34192A8C: 6A DC.B 0x6A ; 'j'
0x34192A8D: 65 DC.B 0x65 ; 'e'
0x34192A8E: 6B DC.B 0x6B ; 'k'
0x34192A8F: 74 DC.B 0x74 ; 't'
0x34192A90: 65 DC.B 0x65 ; 'e'
0x34192A91: 5C DC.B 0x5C ; '\\'
0x34192A92: 68 DC.B 0x68 ; 'h'
0x34192A93: 61 DC.B 0x61 ; 'a'
0x34192A94: 64 DC.B 0x64 ; 'd'
0x34192A95: 65 DC.B 0x65 ; 'e'
0x34192A96: 77 DC.B 0x77 ; 'w'
0x34192A97: 65 DC.B 0x65 ; 'e'
0x34192A98: 5F DC.B 0x5F ; '_'
0x34192A99: 62 DC.B 0x62 ; 'b'
0x34192A9A: 6C DC.B 0x6C ; 'l'
0x34192A9B: 74 DC.B 0x74 ; 't'
0x34192A9C: 6F DC.B 0x6F ; 'o'
0x34192A9D: 32 DC.B 0x32 ; '2'
0x34192A9E: 5C DC.B 0x5C ; '\\'
0x34192A9F: 74 DC.B 0x74 ; 't'
0x34192AA0: 72 DC.B 0x72 ; 'r'
0x34192AA1: 75 DC.B 0x75 ; 'u'
0x34192AA2: 6E DC.B 0x6E ; 'n'
0x34192AA3: 6B DC.B 0x6B ; 'k'
0x34192AA4: 5C DC.B 0x5C ; '\\'
0x34192AA5: 66 DC.B 0x66 ; 'f'
0x34192AA6: 69 DC.B 0x69 ; 'i'
0x34192AA7: 72 DC.B 0x72 ; 'r'
0x34192AA8: 6D DC.B 0x6D ; 'm'
0x34192AA9: 77 DC.B 0x77 ; 'w'
0x34192AAA: 61 DC.B 0x61 ; 'a'
0x34192AAB: 72 DC.B 0x72 ; 'r'
0x34192AAC: 65 DC.B 0x65 ; 'e'
0x34192AAD: 5C DC.B 0x5C ; '\\'
0x34192AAE: 46 DC.B 0x46 ; 'F'
0x34192AAF: 53 DC.B 0x53 ; 'S'
0x34192AB0: 42 DC.B 0x42 ; 'B'
0x34192AB1: 4C DC.B 0x4C ; 'L'
0x34192AB2: 5C DC.B 0x5C ; '\\'
0x34192AB3: 43 DC.B 0x43 ; 'C'
0x34192AB4: 75 DC.B 0x75 ; 'u'
0x34192AB5: 62 DC.B 0x62 ; 'b'
0x34192AB6: 65 DC.B 0x65 ; 'e'
0x34192AB7: 4D DC.B 0x4D ; 'M'
0x34192AB8: 58 DC.B 0x58 ; 'X'
0x34192AB9: 5C DC.B 0x5C ; '\\'
0x34192ABA: 44 DC.B 0x44 ; 'D'
0x34192ABB: 72 DC.B 0x72 ; 'r'
0x34192ABC: 69 DC.B 0x69 ; 'i'
0x34192ABD: 76 DC.B 0x76 ; 'v'
0x34192ABE: 65 DC.B 0x65 ; 'e'
0x34192ABF: 72 DC.B 0x72 ; 'r'
0x34192AC0: 73 DC.B 0x73 ; 's'
0x34192AC1: 5C DC.B 0x5C ; '\\'
0x34192AC2: 53 DC.B 0x53 ; 'S'
0x34192AC3: 54 DC.B 0x54 ; 'T'
0x34192AC4: 4D DC.B 0x4D ; 'M'
0x34192AC5: 33 DC.B 0x33 ; '3'
0x34192AC6: 32 DC.B 0x32 ; '2'
0x34192AC7: 4E DC.B 0x4E ; 'N'
0x34192AC8: 36 DC.B 0x36 ; '6'
0x34192AC9: 78 DC.B 0x78 ; 'x'
0x34192ACA: 78 DC.B 0x78 ; 'x'
0x34192ACB: 5F DC.B 0x5F ; '_'
0x34192ACC: 48 DC.B 0x48 ; 'H'
0x34192ACD: 41 DC.B 0x41 ; 'A'
0x34192ACE: 4C DC.B 0x4C ; 'L'
0x34192ACF: 5F DC.B 0x5F ; '_'
0x34192AD0: 44 DC.B 0x44 ; 'D'
0x34192AD1: 72 DC.B 0x72 ; 'r'
0x34192AD2: 69 DC.B 0x69 ; 'i'
0x34192AD3: 76 DC.B 0x76 ; 'v'
0x34192AD4: 65 DC.B 0x65 ; 'e'
0x34192AD5: 72 DC.B 0x72 ; 'r'
0x34192AD6: 5C DC.B 0x5C ; '\\'
0x34192AD7: 53 DC.B 0x53 ; 'S'
0x34192AD8: 72 DC.B 0x72 ; 'r'
0x34192AD9: 63 DC.B 0x63 ; 'c'
0x34192ADA: 5C DC.B 0x5C ; '\\'
0x34192ADB: 73 DC.B 0x73 ; 's'
0x34192ADC: 74 DC.B 0x74 ; 't'
0x34192ADD: 6D DC.B 0x6D ; 'm'
0x34192ADE: 33 DC.B 0x33 ; '3'
0x34192ADF: 32 DC.B 0x32 ; '2'
0x34192AE0: 6E DC.B 0x6E ; 'n'
0x34192AE1: 36 DC.B 0x36 ; '6'
0x34192AE2: 78 DC.B 0x78 ; 'x'
0x34192AE3: 78 DC.B 0x78 ; 'x'
0x34192AE4: 5F DC.B 0x5F ; '_'
0x34192AE5: 68 DC.B 0x68 ; 'h'
0x34192AE6: 61 DC.B 0x61 ; 'a'
0x34192AE7: 6C DC.B 0x6C ; 'l'
0x34192AE8: 5F DC.B 0x5F ; '_'
0x34192AE9: 62 DC.B 0x62 ; 'b'
0x34192AEA: 73 DC.B 0x73 ; 's'
0x34192AEB: 65 DC.B 0x65 ; 'e'
0x34192AEC: 63 DC.B 0x63 ; 'c'
0x34192AED: 2E DC.B 0x2E ; '.'
0x34192AEE: 63 DC.B 0x63 ; 'c'
0x34192AEF: 00 DC.B 0x00 ; '\0'
Section .rodata..L.str.30 from blto2_FSBL_lto.o, size=106, align=1
0x34192AF0: 44 DC.B 0x44 ; 'D'
0x34192AF1: 3A DC.B 0x3A ; ':'
0x34192AF2: 5C DC.B 0x5C ; '\\'
0x34192AF3: 50 DC.B 0x50 ; 'P'
0x34192AF4: 72 DC.B 0x72 ; 'r'
0x34192AF5: 6F DC.B 0x6F ; 'o'
0x34192AF6: 6A DC.B 0x6A ; 'j'
0x34192AF7: 65 DC.B 0x65 ; 'e'
0x34192AF8: 6B DC.B 0x6B ; 'k'
0x34192AF9: 74 DC.B 0x74 ; 't'
0x34192AFA: 65 DC.B 0x65 ; 'e'
0x34192AFB: 5C DC.B 0x5C ; '\\'
0x34192AFC: 68 DC.B 0x68 ; 'h'
0x34192AFD: 61 DC.B 0x61 ; 'a'
0x34192AFE: 64 DC.B 0x64 ; 'd'
0x34192AFF: 65 DC.B 0x65 ; 'e'
0x34192B00: 77 DC.B 0x77 ; 'w'
0x34192B01: 65 DC.B 0x65 ; 'e'
0x34192B02: 5F DC.B 0x5F ; '_'
0x34192B03: 62 DC.B 0x62 ; 'b'
0x34192B04: 6C DC.B 0x6C ; 'l'
0x34192B05: 74 DC.B 0x74 ; 't'
0x34192B06: 6F DC.B 0x6F ; 'o'
0x34192B07: 32 DC.B 0x32 ; '2'
0x34192B08: 5C DC.B 0x5C ; '\\'
0x34192B09: 74 DC.B 0x74 ; 't'
0x34192B0A: 72 DC.B 0x72 ; 'r'
0x34192B0B: 75 DC.B 0x75 ; 'u'
0x34192B0C: 6E DC.B 0x6E ; 'n'
0x34192B0D: 6B DC.B 0x6B ; 'k'
0x34192B0E: 5C DC.B 0x5C ; '\\'
0x34192B0F: 66 DC.B 0x66 ; 'f'
0x34192B10: 69 DC.B 0x69 ; 'i'
0x34192B11: 72 DC.B 0x72 ; 'r'
0x34192B12: 6D DC.B 0x6D ; 'm'
0x34192B13: 77 DC.B 0x77 ; 'w'
0x34192B14: 61 DC.B 0x61 ; 'a'
0x34192B15: 72 DC.B 0x72 ; 'r'
0x34192B16: 65 DC.B 0x65 ; 'e'
0x34192B17: 5C DC.B 0x5C ; '\\'
0x34192B18: 46 DC.B 0x46 ; 'F'
0x34192B19: 53 DC.B 0x53 ; 'S'
0x34192B1A: 42 DC.B 0x42 ; 'B'
0x34192B1B: 4C DC.B 0x4C ; 'L'
0x34192B1C: 5C DC.B 0x5C ; '\\'
0x34192B1D: 43 DC.B 0x43 ; 'C'
0x34192B1E: 75 DC.B 0x75 ; 'u'
0x34192B1F: 62 DC.B 0x62 ; 'b'
0x34192B20: 65 DC.B 0x65 ; 'e'
0x34192B21: 4D DC.B 0x4D ; 'M'
0x34192B22: 58 DC.B 0x58 ; 'X'
0x34192B23: 5C DC.B 0x5C ; '\\'
0x34192B24: 44 DC.B 0x44 ; 'D'
0x34192B25: 72 DC.B 0x72 ; 'r'
0x34192B26: 69 DC.B 0x69 ; 'i'
0x34192B27: 76 DC.B 0x76 ; 'v'
0x34192B28: 65 DC.B 0x65 ; 'e'
0x34192B29: 72 DC.B 0x72 ; 'r'
0x34192B2A: 73 DC.B 0x73 ; 's'
0x34192B2B: 5C DC.B 0x5C ; '\\'
0x34192B2C: 53 DC.B 0x53 ; 'S'
0x34192B2D: 54 DC.B 0x54 ; 'T'
0x34192B2E: 4D DC.B 0x4D ; 'M'
0x34192B2F: 33 DC.B 0x33 ; '3'
0x34192B30: 32 DC.B 0x32 ; '2'
0x34192B31: 4E DC.B 0x4E ; 'N'
0x34192B32: 36 DC.B 0x36 ; '6'
0x34192B33: 78 DC.B 0x78 ; 'x'
0x34192B34: 78 DC.B 0x78 ; 'x'
0x34192B35: 5F DC.B 0x5F ; '_'
0x34192B36: 48 DC.B 0x48 ; 'H'
0x34192B37: 41 DC.B 0x41 ; 'A'
0x34192B38: 4C DC.B 0x4C ; 'L'
0x34192B39: 5F DC.B 0x5F ; '_'
0x34192B3A: 44 DC.B 0x44 ; 'D'
0x34192B3B: 72 DC.B 0x72 ; 'r'
0x34192B3C: 69 DC.B 0x69 ; 'i'
0x34192B3D: 76 DC.B 0x76 ; 'v'
0x34192B3E: 65 DC.B 0x65 ; 'e'
0x34192B3F: 72 DC.B 0x72 ; 'r'
0x34192B40: 5C DC.B 0x5C ; '\\'
0x34192B41: 53 DC.B 0x53 ; 'S'
0x34192B42: 72 DC.B 0x72 ; 'r'
0x34192B43: 63 DC.B 0x63 ; 'c'
0x34192B44: 5C DC.B 0x5C ; '\\'
0x34192B45: 73 DC.B 0x73 ; 's'
0x34192B46: 74 DC.B 0x74 ; 't'
0x34192B47: 6D DC.B 0x6D ; 'm'
0x34192B48: 33 DC.B 0x33 ; '3'
0x34192B49: 32 DC.B 0x32 ; '2'
0x34192B4A: 6E DC.B 0x6E ; 'n'
0x34192B4B: 36 DC.B 0x36 ; '6'
0x34192B4C: 78 DC.B 0x78 ; 'x'
0x34192B4D: 78 DC.B 0x78 ; 'x'
0x34192B4E: 5F DC.B 0x5F ; '_'
0x34192B4F: 68 DC.B 0x68 ; 'h'
0x34192B50: 61 DC.B 0x61 ; 'a'
0x34192B51: 6C DC.B 0x6C ; 'l'
0x34192B52: 5F DC.B 0x5F ; '_'
0x34192B53: 67 DC.B 0x67 ; 'g'
0x34192B54: 70 DC.B 0x70 ; 'p'
0x34192B55: 69 DC.B 0x69 ; 'i'
0x34192B56: 6F DC.B 0x6F ; 'o'
0x34192B57: 2E DC.B 0x2E ; '.'
0x34192B58: 63 DC.B 0x63 ; 'c'
0x34192B59: 00 DC.B 0x00 ; '\0'
Section .rodata..L.str.95 from blto2_FSBL_lto.o, size=106, align=1
0x34192B5A: 44 DC.B 0x44 ; 'D'
0x34192B5B: 3A DC.B 0x3A ; ':'
0x34192B5C: 5C DC.B 0x5C ; '\\'
0x34192B5D: 50 DC.B 0x50 ; 'P'
0x34192B5E: 72 DC.B 0x72 ; 'r'
0x34192B5F: 6F DC.B 0x6F ; 'o'
0x34192B60: 6A DC.B 0x6A ; 'j'
0x34192B61: 65 DC.B 0x65 ; 'e'
0x34192B62: 6B DC.B 0x6B ; 'k'
0x34192B63: 74 DC.B 0x74 ; 't'
0x34192B64: 65 DC.B 0x65 ; 'e'
0x34192B65: 5C DC.B 0x5C ; '\\'
0x34192B66: 68 DC.B 0x68 ; 'h'
0x34192B67: 61 DC.B 0x61 ; 'a'
0x34192B68: 64 DC.B 0x64 ; 'd'
0x34192B69: 65 DC.B 0x65 ; 'e'
0x34192B6A: 77 DC.B 0x77 ; 'w'
0x34192B6B: 65 DC.B 0x65 ; 'e'
0x34192B6C: 5F DC.B 0x5F ; '_'
0x34192B6D: 62 DC.B 0x62 ; 'b'
0x34192B6E: 6C DC.B 0x6C ; 'l'
0x34192B6F: 74 DC.B 0x74 ; 't'
0x34192B70: 6F DC.B 0x6F ; 'o'
0x34192B71: 32 DC.B 0x32 ; '2'
0x34192B72: 5C DC.B 0x5C ; '\\'
0x34192B73: 74 DC.B 0x74 ; 't'
0x34192B74: 72 DC.B 0x72 ; 'r'
0x34192B75: 75 DC.B 0x75 ; 'u'
0x34192B76: 6E DC.B 0x6E ; 'n'
0x34192B77: 6B DC.B 0x6B ; 'k'
0x34192B78: 5C DC.B 0x5C ; '\\'
0x34192B79: 66 DC.B 0x66 ; 'f'
0x34192B7A: 69 DC.B 0x69 ; 'i'
0x34192B7B: 72 DC.B 0x72 ; 'r'
0x34192B7C: 6D DC.B 0x6D ; 'm'
0x34192B7D: 77 DC.B 0x77 ; 'w'
0x34192B7E: 61 DC.B 0x61 ; 'a'
0x34192B7F: 72 DC.B 0x72 ; 'r'
0x34192B80: 65 DC.B 0x65 ; 'e'
0x34192B81: 5C DC.B 0x5C ; '\\'
0x34192B82: 46 DC.B 0x46 ; 'F'
0x34192B83: 53 DC.B 0x53 ; 'S'
0x34192B84: 42 DC.B 0x42 ; 'B'
0x34192B85: 4C DC.B 0x4C ; 'L'
0x34192B86: 5C DC.B 0x5C ; '\\'
0x34192B87: 43 DC.B 0x43 ; 'C'
0x34192B88: 75 DC.B 0x75 ; 'u'
0x34192B89: 62 DC.B 0x62 ; 'b'
0x34192B8A: 65 DC.B 0x65 ; 'e'
0x34192B8B: 4D DC.B 0x4D ; 'M'
0x34192B8C: 58 DC.B 0x58 ; 'X'
0x34192B8D: 5C DC.B 0x5C ; '\\'
0x34192B8E: 44 DC.B 0x44 ; 'D'
0x34192B8F: 72 DC.B 0x72 ; 'r'
0x34192B90: 69 DC.B 0x69 ; 'i'
0x34192B91: 76 DC.B 0x76 ; 'v'
0x34192B92: 65 DC.B 0x65 ; 'e'
0x34192B93: 72 DC.B 0x72 ; 'r'
0x34192B94: 73 DC.B 0x73 ; 's'
0x34192B95: 5C DC.B 0x5C ; '\\'
0x34192B96: 53 DC.B 0x53 ; 'S'
0x34192B97: 54 DC.B 0x54 ; 'T'
0x34192B98: 4D DC.B 0x4D ; 'M'
0x34192B99: 33 DC.B 0x33 ; '3'
0x34192B9A: 32 DC.B 0x32 ; '2'
0x34192B9B: 4E DC.B 0x4E ; 'N'
0x34192B9C: 36 DC.B 0x36 ; '6'
0x34192B9D: 78 DC.B 0x78 ; 'x'
0x34192B9E: 78 DC.B 0x78 ; 'x'
0x34192B9F: 5F DC.B 0x5F ; '_'
0x34192BA0: 48 DC.B 0x48 ; 'H'
0x34192BA1: 41 DC.B 0x41 ; 'A'
0x34192BA2: 4C DC.B 0x4C ; 'L'
0x34192BA3: 5F DC.B 0x5F ; '_'
0x34192BA4: 44 DC.B 0x44 ; 'D'
0x34192BA5: 72 DC.B 0x72 ; 'r'
0x34192BA6: 69 DC.B 0x69 ; 'i'
0x34192BA7: 76 DC.B 0x76 ; 'v'
0x34192BA8: 65 DC.B 0x65 ; 'e'
0x34192BA9: 72 DC.B 0x72 ; 'r'
0x34192BAA: 5C DC.B 0x5C ; '\\'
0x34192BAB: 53 DC.B 0x53 ; 'S'
0x34192BAC: 72 DC.B 0x72 ; 'r'
0x34192BAD: 63 DC.B 0x63 ; 'c'
0x34192BAE: 5C DC.B 0x5C ; '\\'
0x34192BAF: 73 DC.B 0x73 ; 's'
0x34192BB0: 74 DC.B 0x74 ; 't'
0x34192BB1: 6D DC.B 0x6D ; 'm'
0x34192BB2: 33 DC.B 0x33 ; '3'
0x34192BB3: 32 DC.B 0x32 ; '2'
0x34192BB4: 6E DC.B 0x6E ; 'n'
0x34192BB5: 36 DC.B 0x36 ; '6'
0x34192BB6: 78 DC.B 0x78 ; 'x'
0x34192BB7: 78 DC.B 0x78 ; 'x'
0x34192BB8: 5F DC.B 0x5F ; '_'
0x34192BB9: 68 DC.B 0x68 ; 'h'
0x34192BBA: 61 DC.B 0x61 ; 'a'
0x34192BBB: 6C DC.B 0x6C ; 'l'
0x34192BBC: 5F DC.B 0x5F ; '_'
0x34192BBD: 78 DC.B 0x78 ; 'x'
0x34192BBE: 73 DC.B 0x73 ; 's'
0x34192BBF: 70 DC.B 0x70 ; 'p'
0x34192BC0: 69 DC.B 0x69 ; 'i'
0x34192BC1: 2E DC.B 0x2E ; '.'
0x34192BC2: 63 DC.B 0x63 ; 'c'
0x34192BC3: 00 DC.B 0x00 ; '\0'
Section .rodata..L.str.47 from blto2_FSBL_lto.o, size=105, align=1
0x34192BC4: 44 DC.B 0x44 ; 'D'
0x34192BC5: 3A DC.B 0x3A ; ':'
0x34192BC6: 5C DC.B 0x5C ; '\\'
0x34192BC7: 50 DC.B 0x50 ; 'P'
0x34192BC8: 72 DC.B 0x72 ; 'r'
0x34192BC9: 6F DC.B 0x6F ; 'o'
0x34192BCA: 6A DC.B 0x6A ; 'j'
0x34192BCB: 65 DC.B 0x65 ; 'e'
0x34192BCC: 6B DC.B 0x6B ; 'k'
0x34192BCD: 74 DC.B 0x74 ; 't'
0x34192BCE: 65 DC.B 0x65 ; 'e'
0x34192BCF: 5C DC.B 0x5C ; '\\'
0x34192BD0: 68 DC.B 0x68 ; 'h'
0x34192BD1: 61 DC.B 0x61 ; 'a'
0x34192BD2: 64 DC.B 0x64 ; 'd'
0x34192BD3: 65 DC.B 0x65 ; 'e'
0x34192BD4: 77 DC.B 0x77 ; 'w'
0x34192BD5: 65 DC.B 0x65 ; 'e'
0x34192BD6: 5F DC.B 0x5F ; '_'
0x34192BD7: 62 DC.B 0x62 ; 'b'
0x34192BD8: 6C DC.B 0x6C ; 'l'
0x34192BD9: 74 DC.B 0x74 ; 't'
0x34192BDA: 6F DC.B 0x6F ; 'o'
0x34192BDB: 32 DC.B 0x32 ; '2'
0x34192BDC: 5C DC.B 0x5C ; '\\'
0x34192BDD: 74 DC.B 0x74 ; 't'
0x34192BDE: 72 DC.B 0x72 ; 'r'
0x34192BDF: 75 DC.B 0x75 ; 'u'
0x34192BE0: 6E DC.B 0x6E ; 'n'
0x34192BE1: 6B DC.B 0x6B ; 'k'
0x34192BE2: 5C DC.B 0x5C ; '\\'
0x34192BE3: 66 DC.B 0x66 ; 'f'
0x34192BE4: 69 DC.B 0x69 ; 'i'
0x34192BE5: 72 DC.B 0x72 ; 'r'
0x34192BE6: 6D DC.B 0x6D ; 'm'
0x34192BE7: 77 DC.B 0x77 ; 'w'
0x34192BE8: 61 DC.B 0x61 ; 'a'
0x34192BE9: 72 DC.B 0x72 ; 'r'
0x34192BEA: 65 DC.B 0x65 ; 'e'
0x34192BEB: 5C DC.B 0x5C ; '\\'
0x34192BEC: 46 DC.B 0x46 ; 'F'
0x34192BED: 53 DC.B 0x53 ; 'S'
0x34192BEE: 42 DC.B 0x42 ; 'B'
0x34192BEF: 4C DC.B 0x4C ; 'L'
0x34192BF0: 5C DC.B 0x5C ; '\\'
0x34192BF1: 43 DC.B 0x43 ; 'C'
0x34192BF2: 75 DC.B 0x75 ; 'u'
0x34192BF3: 62 DC.B 0x62 ; 'b'
0x34192BF4: 65 DC.B 0x65 ; 'e'
0x34192BF5: 4D DC.B 0x4D ; 'M'
0x34192BF6: 58 DC.B 0x58 ; 'X'
0x34192BF7: 5C DC.B 0x5C ; '\\'
0x34192BF8: 44 DC.B 0x44 ; 'D'
0x34192BF9: 72 DC.B 0x72 ; 'r'
0x34192BFA: 69 DC.B 0x69 ; 'i'
0x34192BFB: 76 DC.B 0x76 ; 'v'
0x34192BFC: 65 DC.B 0x65 ; 'e'
0x34192BFD: 72 DC.B 0x72 ; 'r'
0x34192BFE: 73 DC.B 0x73 ; 's'
0x34192BFF: 5C DC.B 0x5C ; '\\'
0x34192C00: 53 DC.B 0x53 ; 'S'
0x34192C01: 54 DC.B 0x54 ; 'T'
0x34192C02: 4D DC.B 0x4D ; 'M'
0x34192C03: 33 DC.B 0x33 ; '3'
0x34192C04: 32 DC.B 0x32 ; '2'
0x34192C05: 4E DC.B 0x4E ; 'N'
0x34192C06: 36 DC.B 0x36 ; '6'
0x34192C07: 78 DC.B 0x78 ; 'x'
0x34192C08: 78 DC.B 0x78 ; 'x'
0x34192C09: 5F DC.B 0x5F ; '_'
0x34192C0A: 48 DC.B 0x48 ; 'H'
0x34192C0B: 41 DC.B 0x41 ; 'A'
0x34192C0C: 4C DC.B 0x4C ; 'L'
0x34192C0D: 5F DC.B 0x5F ; '_'
0x34192C0E: 44 DC.B 0x44 ; 'D'
0x34192C0F: 72 DC.B 0x72 ; 'r'
0x34192C10: 69 DC.B 0x69 ; 'i'
0x34192C11: 76 DC.B 0x76 ; 'v'
0x34192C12: 65 DC.B 0x65 ; 'e'
0x34192C13: 72 DC.B 0x72 ; 'r'
0x34192C14: 5C DC.B 0x5C ; '\\'
0x34192C15: 53 DC.B 0x53 ; 'S'
0x34192C16: 72 DC.B 0x72 ; 'r'
0x34192C17: 63 DC.B 0x63 ; 'c'
0x34192C18: 5C DC.B 0x5C ; '\\'
0x34192C19: 73 DC.B 0x73 ; 's'
0x34192C1A: 74 DC.B 0x74 ; 't'
0x34192C1B: 6D DC.B 0x6D ; 'm'
0x34192C1C: 33 DC.B 0x33 ; '3'
0x34192C1D: 32 DC.B 0x32 ; '2'
0x34192C1E: 6E DC.B 0x6E ; 'n'
0x34192C1F: 36 DC.B 0x36 ; '6'
0x34192C20: 78 DC.B 0x78 ; 'x'
0x34192C21: 78 DC.B 0x78 ; 'x'
0x34192C22: 5F DC.B 0x5F ; '_'
0x34192C23: 68 DC.B 0x68 ; 'h'
0x34192C24: 61 DC.B 0x61 ; 'a'
0x34192C25: 6C DC.B 0x6C ; 'l'
0x34192C26: 5F DC.B 0x5F ; '_'
0x34192C27: 72 DC.B 0x72 ; 'r'
0x34192C28: 63 DC.B 0x63 ; 'c'
0x34192C29: 63 DC.B 0x63 ; 'c'
0x34192C2A: 2E DC.B 0x2E ; '.'
0x34192C2B: 63 DC.B 0x63 ; 'c'
0x34192C2C: 00 DC.B 0x00 ; '\0'
Section .init_array from STM32N6xx_Startup.o, size=4, align=4
0x34192C30: 341807B9 DC.W SystemCoreClockUpdate
Section .rodata..L.str.20 from blto2_FSBL_lto.o, size=108, align=1
0x34192C34: 44 DC.B 0x44 ; 'D'
0x34192C35: 3A DC.B 0x3A ; ':'
0x34192C36: 5C DC.B 0x5C ; '\\'
0x34192C37: 50 DC.B 0x50 ; 'P'
0x34192C38: 72 DC.B 0x72 ; 'r'
0x34192C39: 6F DC.B 0x6F ; 'o'
0x34192C3A: 6A DC.B 0x6A ; 'j'
0x34192C3B: 65 DC.B 0x65 ; 'e'
0x34192C3C: 6B DC.B 0x6B ; 'k'
0x34192C3D: 74 DC.B 0x74 ; 't'
0x34192C3E: 65 DC.B 0x65 ; 'e'
0x34192C3F: 5C DC.B 0x5C ; '\\'
0x34192C40: 68 DC.B 0x68 ; 'h'
0x34192C41: 61 DC.B 0x61 ; 'a'
0x34192C42: 64 DC.B 0x64 ; 'd'
0x34192C43: 65 DC.B 0x65 ; 'e'
0x34192C44: 77 DC.B 0x77 ; 'w'
0x34192C45: 65 DC.B 0x65 ; 'e'
0x34192C46: 5F DC.B 0x5F ; '_'
0x34192C47: 62 DC.B 0x62 ; 'b'
0x34192C48: 6C DC.B 0x6C ; 'l'
0x34192C49: 74 DC.B 0x74 ; 't'
0x34192C4A: 6F DC.B 0x6F ; 'o'
0x34192C4B: 32 DC.B 0x32 ; '2'
0x34192C4C: 5C DC.B 0x5C ; '\\'
0x34192C4D: 74 DC.B 0x74 ; 't'
0x34192C4E: 72 DC.B 0x72 ; 'r'
0x34192C4F: 75 DC.B 0x75 ; 'u'
0x34192C50: 6E DC.B 0x6E ; 'n'
0x34192C51: 6B DC.B 0x6B ; 'k'
0x34192C52: 5C DC.B 0x5C ; '\\'
0x34192C53: 66 DC.B 0x66 ; 'f'
0x34192C54: 69 DC.B 0x69 ; 'i'
0x34192C55: 72 DC.B 0x72 ; 'r'
0x34192C56: 6D DC.B 0x6D ; 'm'
0x34192C57: 77 DC.B 0x77 ; 'w'
0x34192C58: 61 DC.B 0x61 ; 'a'
0x34192C59: 72 DC.B 0x72 ; 'r'
0x34192C5A: 65 DC.B 0x65 ; 'e'
0x34192C5B: 5C DC.B 0x5C ; '\\'
0x34192C5C: 46 DC.B 0x46 ; 'F'
0x34192C5D: 53 DC.B 0x53 ; 'S'
0x34192C5E: 42 DC.B 0x42 ; 'B'
0x34192C5F: 4C DC.B 0x4C ; 'L'
0x34192C60: 5C DC.B 0x5C ; '\\'
0x34192C61: 43 DC.B 0x43 ; 'C'
0x34192C62: 75 DC.B 0x75 ; 'u'
0x34192C63: 62 DC.B 0x62 ; 'b'
0x34192C64: 65 DC.B 0x65 ; 'e'
0x34192C65: 4D DC.B 0x4D ; 'M'
0x34192C66: 58 DC.B 0x58 ; 'X'
0x34192C67: 5C DC.B 0x5C ; '\\'
0x34192C68: 44 DC.B 0x44 ; 'D'
0x34192C69: 72 DC.B 0x72 ; 'r'
0x34192C6A: 69 DC.B 0x69 ; 'i'
0x34192C6B: 76 DC.B 0x76 ; 'v'
0x34192C6C: 65 DC.B 0x65 ; 'e'
0x34192C6D: 72 DC.B 0x72 ; 'r'
0x34192C6E: 73 DC.B 0x73 ; 's'
0x34192C6F: 5C DC.B 0x5C ; '\\'
0x34192C70: 53 DC.B 0x53 ; 'S'
0x34192C71: 54 DC.B 0x54 ; 'T'
0x34192C72: 4D DC.B 0x4D ; 'M'
0x34192C73: 33 DC.B 0x33 ; '3'
0x34192C74: 32 DC.B 0x32 ; '2'
0x34192C75: 4E DC.B 0x4E ; 'N'
0x34192C76: 36 DC.B 0x36 ; '6'
0x34192C77: 78 DC.B 0x78 ; 'x'
0x34192C78: 78 DC.B 0x78 ; 'x'
0x34192C79: 5F DC.B 0x5F ; '_'
0x34192C7A: 48 DC.B 0x48 ; 'H'
0x34192C7B: 41 DC.B 0x41 ; 'A'
0x34192C7C: 4C DC.B 0x4C ; 'L'
0x34192C7D: 5F DC.B 0x5F ; '_'
0x34192C7E: 44 DC.B 0x44 ; 'D'
0x34192C7F: 72 DC.B 0x72 ; 'r'
0x34192C80: 69 DC.B 0x69 ; 'i'
0x34192C81: 76 DC.B 0x76 ; 'v'
0x34192C82: 65 DC.B 0x65 ; 'e'
0x34192C83: 72 DC.B 0x72 ; 'r'
0x34192C84: 5C DC.B 0x5C ; '\\'
0x34192C85: 53 DC.B 0x53 ; 'S'
0x34192C86: 72 DC.B 0x72 ; 'r'
0x34192C87: 63 DC.B 0x63 ; 'c'
0x34192C88: 5C DC.B 0x5C ; '\\'
0x34192C89: 73 DC.B 0x73 ; 's'
0x34192C8A: 74 DC.B 0x74 ; 't'
0x34192C8B: 6D DC.B 0x6D ; 'm'
0x34192C8C: 33 DC.B 0x33 ; '3'
0x34192C8D: 32 DC.B 0x32 ; '2'
0x34192C8E: 6E DC.B 0x6E ; 'n'
0x34192C8F: 36 DC.B 0x36 ; '6'
0x34192C90: 78 DC.B 0x78 ; 'x'
0x34192C91: 78 DC.B 0x78 ; 'x'
0x34192C92: 5F DC.B 0x5F ; '_'
0x34192C93: 68 DC.B 0x68 ; 'h'
0x34192C94: 61 DC.B 0x61 ; 'a'
0x34192C95: 6C DC.B 0x6C ; 'l'
0x34192C96: 5F DC.B 0x5F ; '_'
0x34192C97: 63 DC.B 0x63 ; 'c'
0x34192C98: 6F DC.B 0x6F ; 'o'
0x34192C99: 72 DC.B 0x72 ; 'r'
0x34192C9A: 74 DC.B 0x74 ; 't'
0x34192C9B: 65 DC.B 0x65 ; 'e'
0x34192C9C: 78 DC.B 0x78 ; 'x'
0x34192C9D: 2E DC.B 0x2E ; '.'
0x34192C9E: 63 DC.B 0x63 ; 'c'
0x34192C9F: 00 DC.B 0x00 ; '\0'
Section .rodata..L.str.38 from blto2_FSBL_lto.o, size=108, align=1
0x34192CA0: 44 DC.B 0x44 ; 'D'
0x34192CA1: 3A DC.B 0x3A ; ':'
0x34192CA2: 5C DC.B 0x5C ; '\\'
0x34192CA3: 50 DC.B 0x50 ; 'P'
0x34192CA4: 72 DC.B 0x72 ; 'r'
0x34192CA5: 6F DC.B 0x6F ; 'o'
0x34192CA6: 6A DC.B 0x6A ; 'j'
0x34192CA7: 65 DC.B 0x65 ; 'e'
0x34192CA8: 6B DC.B 0x6B ; 'k'
0x34192CA9: 74 DC.B 0x74 ; 't'
0x34192CAA: 65 DC.B 0x65 ; 'e'
0x34192CAB: 5C DC.B 0x5C ; '\\'
0x34192CAC: 68 DC.B 0x68 ; 'h'
0x34192CAD: 61 DC.B 0x61 ; 'a'
0x34192CAE: 64 DC.B 0x64 ; 'd'
0x34192CAF: 65 DC.B 0x65 ; 'e'
0x34192CB0: 77 DC.B 0x77 ; 'w'
0x34192CB1: 65 DC.B 0x65 ; 'e'
0x34192CB2: 5F DC.B 0x5F ; '_'
0x34192CB3: 62 DC.B 0x62 ; 'b'
0x34192CB4: 6C DC.B 0x6C ; 'l'
0x34192CB5: 74 DC.B 0x74 ; 't'
0x34192CB6: 6F DC.B 0x6F ; 'o'
0x34192CB7: 32 DC.B 0x32 ; '2'
0x34192CB8: 5C DC.B 0x5C ; '\\'
0x34192CB9: 74 DC.B 0x74 ; 't'
0x34192CBA: 72 DC.B 0x72 ; 'r'
0x34192CBB: 75 DC.B 0x75 ; 'u'
0x34192CBC: 6E DC.B 0x6E ; 'n'
0x34192CBD: 6B DC.B 0x6B ; 'k'
0x34192CBE: 5C DC.B 0x5C ; '\\'
0x34192CBF: 66 DC.B 0x66 ; 'f'
0x34192CC0: 69 DC.B 0x69 ; 'i'
0x34192CC1: 72 DC.B 0x72 ; 'r'
0x34192CC2: 6D DC.B 0x6D ; 'm'
0x34192CC3: 77 DC.B 0x77 ; 'w'
0x34192CC4: 61 DC.B 0x61 ; 'a'
0x34192CC5: 72 DC.B 0x72 ; 'r'
0x34192CC6: 65 DC.B 0x65 ; 'e'
0x34192CC7: 5C DC.B 0x5C ; '\\'
0x34192CC8: 46 DC.B 0x46 ; 'F'
0x34192CC9: 53 DC.B 0x53 ; 'S'
0x34192CCA: 42 DC.B 0x42 ; 'B'
0x34192CCB: 4C DC.B 0x4C ; 'L'
0x34192CCC: 5C DC.B 0x5C ; '\\'
0x34192CCD: 43 DC.B 0x43 ; 'C'
0x34192CCE: 75 DC.B 0x75 ; 'u'
0x34192CCF: 62 DC.B 0x62 ; 'b'
0x34192CD0: 65 DC.B 0x65 ; 'e'
0x34192CD1: 4D DC.B 0x4D ; 'M'
0x34192CD2: 58 DC.B 0x58 ; 'X'
0x34192CD3: 5C DC.B 0x5C ; '\\'
0x34192CD4: 44 DC.B 0x44 ; 'D'
0x34192CD5: 72 DC.B 0x72 ; 'r'
0x34192CD6: 69 DC.B 0x69 ; 'i'
0x34192CD7: 76 DC.B 0x76 ; 'v'
0x34192CD8: 65 DC.B 0x65 ; 'e'
0x34192CD9: 72 DC.B 0x72 ; 'r'
0x34192CDA: 73 DC.B 0x73 ; 's'
0x34192CDB: 5C DC.B 0x5C ; '\\'
0x34192CDC: 53 DC.B 0x53 ; 'S'
0x34192CDD: 54 DC.B 0x54 ; 'T'
0x34192CDE: 4D DC.B 0x4D ; 'M'
0x34192CDF: 33 DC.B 0x33 ; '3'
0x34192CE0: 32 DC.B 0x32 ; '2'
0x34192CE1: 4E DC.B 0x4E ; 'N'
0x34192CE2: 36 DC.B 0x36 ; '6'
0x34192CE3: 78 DC.B 0x78 ; 'x'
0x34192CE4: 78 DC.B 0x78 ; 'x'
0x34192CE5: 5F DC.B 0x5F ; '_'
0x34192CE6: 48 DC.B 0x48 ; 'H'
0x34192CE7: 41 DC.B 0x41 ; 'A'
0x34192CE8: 4C DC.B 0x4C ; 'L'
0x34192CE9: 5F DC.B 0x5F ; '_'
0x34192CEA: 44 DC.B 0x44 ; 'D'
0x34192CEB: 72 DC.B 0x72 ; 'r'
0x34192CEC: 69 DC.B 0x69 ; 'i'
0x34192CED: 76 DC.B 0x76 ; 'v'
0x34192CEE: 65 DC.B 0x65 ; 'e'
0x34192CEF: 72 DC.B 0x72 ; 'r'
0x34192CF0: 5C DC.B 0x5C ; '\\'
0x34192CF1: 53 DC.B 0x53 ; 'S'
0x34192CF2: 72 DC.B 0x72 ; 'r'
0x34192CF3: 63 DC.B 0x63 ; 'c'
0x34192CF4: 5C DC.B 0x5C ; '\\'
0x34192CF5: 73 DC.B 0x73 ; 's'
0x34192CF6: 74 DC.B 0x74 ; 't'
0x34192CF7: 6D DC.B 0x6D ; 'm'
0x34192CF8: 33 DC.B 0x33 ; '3'
0x34192CF9: 32 DC.B 0x32 ; '2'
0x34192CFA: 6E DC.B 0x6E ; 'n'
0x34192CFB: 36 DC.B 0x36 ; '6'
0x34192CFC: 78 DC.B 0x78 ; 'x'
0x34192CFD: 78 DC.B 0x78 ; 'x'
0x34192CFE: 5F DC.B 0x5F ; '_'
0x34192CFF: 68 DC.B 0x68 ; 'h'
0x34192D00: 61 DC.B 0x61 ; 'a'
0x34192D01: 6C DC.B 0x6C ; 'l'
0x34192D02: 5F DC.B 0x5F ; '_'
0x34192D03: 70 DC.B 0x70 ; 'p'
0x34192D04: 77 DC.B 0x77 ; 'w'
0x34192D05: 72 DC.B 0x72 ; 'r'
0x34192D06: 5F DC.B 0x5F ; '_'
0x34192D07: 65 DC.B 0x65 ; 'e'
0x34192D08: 78 DC.B 0x78 ; 'x'
0x34192D09: 2E DC.B 0x2E ; '.'
0x34192D0A: 63 DC.B 0x63 ; 'c'
0x34192D0B: 00 DC.B 0x00 ; '\0'
Section .rodata..L.str.55 from blto2_FSBL_lto.o, size=108, align=1
0x34192D0C: 44 DC.B 0x44 ; 'D'
0x34192D0D: 3A DC.B 0x3A ; ':'
0x34192D0E: 5C DC.B 0x5C ; '\\'
0x34192D0F: 50 DC.B 0x50 ; 'P'
0x34192D10: 72 DC.B 0x72 ; 'r'
0x34192D11: 6F DC.B 0x6F ; 'o'
0x34192D12: 6A DC.B 0x6A ; 'j'
0x34192D13: 65 DC.B 0x65 ; 'e'
0x34192D14: 6B DC.B 0x6B ; 'k'
0x34192D15: 74 DC.B 0x74 ; 't'
0x34192D16: 65 DC.B 0x65 ; 'e'
0x34192D17: 5C DC.B 0x5C ; '\\'
0x34192D18: 68 DC.B 0x68 ; 'h'
0x34192D19: 61 DC.B 0x61 ; 'a'
0x34192D1A: 64 DC.B 0x64 ; 'd'
0x34192D1B: 65 DC.B 0x65 ; 'e'
0x34192D1C: 77 DC.B 0x77 ; 'w'
0x34192D1D: 65 DC.B 0x65 ; 'e'
0x34192D1E: 5F DC.B 0x5F ; '_'
0x34192D1F: 62 DC.B 0x62 ; 'b'
0x34192D20: 6C DC.B 0x6C ; 'l'
0x34192D21: 74 DC.B 0x74 ; 't'
0x34192D22: 6F DC.B 0x6F ; 'o'
0x34192D23: 32 DC.B 0x32 ; '2'
0x34192D24: 5C DC.B 0x5C ; '\\'
0x34192D25: 74 DC.B 0x74 ; 't'
0x34192D26: 72 DC.B 0x72 ; 'r'
0x34192D27: 75 DC.B 0x75 ; 'u'
0x34192D28: 6E DC.B 0x6E ; 'n'
0x34192D29: 6B DC.B 0x6B ; 'k'
0x34192D2A: 5C DC.B 0x5C ; '\\'
0x34192D2B: 66 DC.B 0x66 ; 'f'
0x34192D2C: 69 DC.B 0x69 ; 'i'
0x34192D2D: 72 DC.B 0x72 ; 'r'
0x34192D2E: 6D DC.B 0x6D ; 'm'
0x34192D2F: 77 DC.B 0x77 ; 'w'
0x34192D30: 61 DC.B 0x61 ; 'a'
0x34192D31: 72 DC.B 0x72 ; 'r'
0x34192D32: 65 DC.B 0x65 ; 'e'
0x34192D33: 5C DC.B 0x5C ; '\\'
0x34192D34: 46 DC.B 0x46 ; 'F'
0x34192D35: 53 DC.B 0x53 ; 'S'
0x34192D36: 42 DC.B 0x42 ; 'B'
0x34192D37: 4C DC.B 0x4C ; 'L'
0x34192D38: 5C DC.B 0x5C ; '\\'
0x34192D39: 43 DC.B 0x43 ; 'C'
0x34192D3A: 75 DC.B 0x75 ; 'u'
0x34192D3B: 62 DC.B 0x62 ; 'b'
0x34192D3C: 65 DC.B 0x65 ; 'e'
0x34192D3D: 4D DC.B 0x4D ; 'M'
0x34192D3E: 58 DC.B 0x58 ; 'X'
0x34192D3F: 5C DC.B 0x5C ; '\\'
0x34192D40: 44 DC.B 0x44 ; 'D'
0x34192D41: 72 DC.B 0x72 ; 'r'
0x34192D42: 69 DC.B 0x69 ; 'i'
0x34192D43: 76 DC.B 0x76 ; 'v'
0x34192D44: 65 DC.B 0x65 ; 'e'
0x34192D45: 72 DC.B 0x72 ; 'r'
0x34192D46: 73 DC.B 0x73 ; 's'
0x34192D47: 5C DC.B 0x5C ; '\\'
0x34192D48: 53 DC.B 0x53 ; 'S'
0x34192D49: 54 DC.B 0x54 ; 'T'
0x34192D4A: 4D DC.B 0x4D ; 'M'
0x34192D4B: 33 DC.B 0x33 ; '3'
0x34192D4C: 32 DC.B 0x32 ; '2'
0x34192D4D: 4E DC.B 0x4E ; 'N'
0x34192D4E: 36 DC.B 0x36 ; '6'
0x34192D4F: 78 DC.B 0x78 ; 'x'
0x34192D50: 78 DC.B 0x78 ; 'x'
0x34192D51: 5F DC.B 0x5F ; '_'
0x34192D52: 48 DC.B 0x48 ; 'H'
0x34192D53: 41 DC.B 0x41 ; 'A'
0x34192D54: 4C DC.B 0x4C ; 'L'
0x34192D55: 5F DC.B 0x5F ; '_'
0x34192D56: 44 DC.B 0x44 ; 'D'
0x34192D57: 72 DC.B 0x72 ; 'r'
0x34192D58: 69 DC.B 0x69 ; 'i'
0x34192D59: 76 DC.B 0x76 ; 'v'
0x34192D5A: 65 DC.B 0x65 ; 'e'
0x34192D5B: 72 DC.B 0x72 ; 'r'
0x34192D5C: 5C DC.B 0x5C ; '\\'
0x34192D5D: 53 DC.B 0x53 ; 'S'
0x34192D5E: 72 DC.B 0x72 ; 'r'
0x34192D5F: 63 DC.B 0x63 ; 'c'
0x34192D60: 5C DC.B 0x5C ; '\\'
0x34192D61: 73 DC.B 0x73 ; 's'
0x34192D62: 74 DC.B 0x74 ; 't'
0x34192D63: 6D DC.B 0x6D ; 'm'
0x34192D64: 33 DC.B 0x33 ; '3'
0x34192D65: 32 DC.B 0x32 ; '2'
0x34192D66: 6E DC.B 0x6E ; 'n'
0x34192D67: 36 DC.B 0x36 ; '6'
0x34192D68: 78 DC.B 0x78 ; 'x'
0x34192D69: 78 DC.B 0x78 ; 'x'
0x34192D6A: 5F DC.B 0x5F ; '_'
0x34192D6B: 68 DC.B 0x68 ; 'h'
0x34192D6C: 61 DC.B 0x61 ; 'a'
0x34192D6D: 6C DC.B 0x6C ; 'l'
0x34192D6E: 5F DC.B 0x5F ; '_'
0x34192D6F: 72 DC.B 0x72 ; 'r'
0x34192D70: 63 DC.B 0x63 ; 'c'
0x34192D71: 63 DC.B 0x63 ; 'c'
0x34192D72: 5F DC.B 0x5F ; '_'
0x34192D73: 65 DC.B 0x65 ; 'e'
0x34192D74: 78 DC.B 0x78 ; 'x'
0x34192D75: 2E DC.B 0x2E ; '.'
0x34192D76: 63 DC.B 0x63 ; 'c'
0x34192D77: 00 DC.B 0x00 ; '\0'
Section .segger.init.__SEGGER_init_ctors from SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=36, align=4
__SEGGER_init_ctors:
0x34192D78: B500 PUSH 123LR}
0x34192D7A: 4806 LDR R0, =0x34192C30 ; [PC, #24] [0x34192D94]
0x34192D7C: 4906 LDR R1, =0x34192C34 ; [PC, #24] [0x34192D98]
.L1:
0x34192D7E: 4288 CMP R0, R1
0x34192D80: D005 BEQ 46L2 ; 0x34192D8E
0x34192D82: 6802 LDR R2, [R0]
0x34192D84: 3004 ADDS R0, #4
0x34192D86: B403 PUSH 123R0-R1}
0x34192D88: 4790 BLX R2
0x34192D8A: BC03 POP 123R0-R1}
0x34192D8C: E7F7 B 46L1 ; 0x34192D7E
.L2:
0x34192D8E: BC08 POP 123R3}
0x34192D90: 4718 BX R3
0x34192D92: 0000 NOP
0x34192D94: 34192C30 DC.W 34192C30 ; R_ARM_ABS32
0x34192D98: 34192C34 DC.W 34192C34 ; R_ARM_ABS32
Section .segger.init.table from [ Linker created ], size=36, align=4
0x34192D9C: 34192DCD DC.W __SEGGER_init_zero
0x34192DA0: 00 DC.B 0x00 ; '\0'
0x34192DA1: 00 DC.B 0x00 ; '\0'
0x34192DA2: 00 DC.B 0x00 ; '\0'
0x34192DA3: 34 DC.B 0x34 ; '4'
0x34192DA4: A0 DC.B 0xA0 ; '\xA0'
0x34192DA5: 02 DC.B 0x02 ; '\x02'
0x34192DA6: 00 DC.B 0x00 ; '\0'
0x34192DA7: 00 DC.B 0x00 ; '\0'
0x34192DA8: 34192DDF DC.W __SEGGER_init_copy
0x34192DAC: A0 DC.B 0xA0 ; '\xA0'
0x34192DAD: 02 DC.B 0x02 ; '\x02'
0x34192DAE: 00 DC.B 0x00 ; '\0'
0x34192DAF: 34 DC.B 0x34 ; '4'
0x34192DB0: 34192DC0 DC.W 34192DC0 ; R_ARM_ABS32
0x34192DB4: 09 DC.B 0x09 ; '\t'
0x34192DB5: 00 DC.B 0x00 ; '\0'
0x34192DB6: 00 DC.B 0x00 ; '\0'
0x34192DB7: 00 DC.B 0x00 ; '\0'
0x34192DB8: 34192D79 DC.W __SEGGER_init_ctors
0x34192DBC: 3418C8CB DC.W __SEGGER_init_done
Section .segger.init.data from [ Linker created ], size=12, align=4
0x34192DC0: 10 DC.B 0x10 ; '\x10'
0x34192DC1: 00 DC.B 0x00 ; '\0'
0x34192DC2: 00 DC.B 0x00 ; '\0'
0x34192DC3: 00 DC.B 0x00 ; '\0'
0x34192DC4: 00 DC.B 0x00 ; '\0'
0x34192DC5: 90 DC.B 0x90 ; '\x90'
0x34192DC6: D0 DC.B 0xD0 ; '\xD0'
0x34192DC7: 03 DC.B 0x03 ; '\x03'
0x34192DC8: 01 DC.B 0x01 ; '\x01'
0x34192DC9: 00 DC.B 0x00 ; '\0'
0x34192DCA: 00 DC.B 0x00 ; '\0'
0x34192DCB: 00 DC.B 0x00 ; '\0'
Section .segger.init.__SEGGER_init_zero from SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=18, align=2
__SEGGER_init_zero:
0x34192DCC: 6820 LDR R0, [R4]
0x34192DCE: 6861 LDR R1, [R4, #4]
0x34192DD0: 3408 ADDS R4, #8
0x34192DD2: 2200 MOVS R2, #0
0x34192DD4: E000 B 46L2 ; 0x34192DD8
.L1:
0x34192DD6: 5442 STRB R2, [R0, R1]
.L2:
0x34192DD8: 1E49 SUBS R1, R1, #1
0x34192DDA: D5FC BPL 46L1 ; 0x34192DD6
0x34192DDC: 4770 BX LR
Section .segger.init.__SEGGER_init_copy from SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=20, align=2
__SEGGER_init_copy:
0x34192DDE: 6820 LDR R0, [R4]
0x34192DE0: 6861 LDR R1, [R4, #4]
0x34192DE2: 68A2 LDR R2, [R4, #8]
0x34192DE4: 340C ADDS R4, #12
0x34192DE6: E001 B 46L2 ; 0x34192DEC
.L1:
0x34192DE8: 5C8B LDRB R3, [R1, R2]
0x34192DEA: 5483 STRB R3, [R0, R2]
.L2:
0x34192DEC: 1E52 SUBS R2, R2, #1
0x34192DEE: D5FB BPL 46L1 ; 0x34192DE8
0x34192DF0: 4770 BX LR
LINK SUMMARY
Memory breakdown
75 422 bytes read-only code +
845 bytes read-only data = 76 267 bytes read-only (total)
8 873 bytes read-write data
Region summary
| Name |
Range |
Size |
Used |
Unused |
Alignment Loss |
FLEX_RAM |
34000000-34063FFF |
409 600 |
8 873 2.17 |
400 727 97.83 |
0 0.00 |
AXI_RAM2 |
34180400-341FFFFF |
523 264 |
76 271 14.58 |
446 993 85.42 |
0 0.00 |
Diagnostic summary
Link complete: 0 errors.