Index: trunk/firmware/App/CubeMX/Appli/Core/Src/main.c
===================================================================
--- trunk/firmware/App/CubeMX/Appli/Core/Src/main.c	(revision 22)
+++ trunk/firmware/App/CubeMX/Appli/Core/Src/main.c	(revision 23)
@@ -48,4 +48,5 @@
 
 /* Private function prototypes -----------------------------------------------*/
+static void MPU_Config(void);
 /* USER CODE BEGIN PFP */
 
@@ -66,5 +67,19 @@
   /* USER CODE BEGIN 1 */
 
+  /* System clock already configured, simply SystemCoreClock init */
+  SystemCoreClockUpdate();
+
   /* USER CODE END 1 */
+
+  /* MPU Configuration--------------------------------------------------------*/
+  MPU_Config();
+
+  /* Enable the CPU Cache */
+
+  /* Enable I-Cache---------------------------------------------------------*/
+  SCB_EnableICache();
+
+  /* Enable D-Cache---------------------------------------------------------*/
+  SCB_EnableDCache();
 
   /* MCU Configuration--------------------------------------------------------*/
@@ -100,4 +115,44 @@
 /* USER CODE END 4 */
 
+ /* MPU Configuration */
+
+void MPU_Config(void)
+{
+  MPU_Region_InitTypeDef MPU_InitStruct = {0};
+  MPU_Attributes_InitTypeDef MPU_AttributesInit = {0};
+  uint32_t primask_bit = __get_PRIMASK();
+  __disable_irq();
+
+  /* Disables the MPU */
+  HAL_MPU_Disable();
+
+  /** Initializes and configures the Region 0 and the memory to be protected
+  */
+  MPU_InitStruct.Enable = MPU_REGION_ENABLE;
+  MPU_InitStruct.Number = MPU_REGION_NUMBER0;
+  MPU_InitStruct.BaseAddress = 0x38000000;
+  MPU_InitStruct.LimitAddress = 0x38000040;
+  MPU_InitStruct.AttributesIndex = MPU_ATTRIBUTES_NUMBER0;
+  MPU_InitStruct.AccessPermission = MPU_REGION_ALL_RW;
+  MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE;
+  MPU_InitStruct.DisablePrivExec = MPU_PRIV_INSTRUCTION_ACCESS_ENABLE;
+  MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;
+
+  HAL_MPU_ConfigRegion(&MPU_InitStruct);
+
+  /** Initializes and configures the Attribute 0 and the memory to be protected
+  */
+  MPU_AttributesInit.Number = MPU_ATTRIBUTES_NUMBER0;
+  MPU_AttributesInit.Attributes = INNER_OUTER(MPU_NOT_CACHEABLE);
+
+  HAL_MPU_ConfigMemoryAttributes(&MPU_AttributesInit);
+  /* Enables the MPU */
+  HAL_MPU_Enable(MPU_HFNMI_PRIVDEF);
+
+  /* Exit critical section to lock the system and avoid any issue around MPU mechanism */
+  __set_PRIMASK(primask_bit);
+
+}
+
 /**
   * @brief  This function is executed in case of error occurrence.
Index: trunk/firmware/App/CubeMX/blto2_App.ioc
===================================================================
--- trunk/firmware/App/CubeMX/blto2_App.ioc	(revision 22)
+++ trunk/firmware/App/CubeMX/blto2_App.ioc	(revision 23)
@@ -7,9 +7,60 @@
 CORTEX_M55_FSBL.CPU_ICache=Enabled
 CORTEX_M55_FSBL.IPParameters=CPU_ICache,CPU_DCache
+CORTEX_M55_S.AccessPermission-Cortex_Memory_Protection_Unit_Region0_Settings=MPU_REGION_ALL_RW
+CORTEX_M55_S.Attributes0=MPU_ATTRIBUTES_NUMBER0
+CORTEX_M55_S.AttributesIndex-Cortex_Memory_Protection_Unit_Region0_Settings=MPU_ATTRIBUTES_NUMBER0
+CORTEX_M55_S.BaseAddress-Cortex_Memory_Protection_Unit_Region0_Settings=0x38000000
+CORTEX_M55_S.CPU_DCache=Enabled
+CORTEX_M55_S.CPU_ICache=Enabled
+CORTEX_M55_S.Enable-Cortex_Memory_Protection_Unit_Region0_Settings=MPU_REGION_ENABLE
+CORTEX_M55_S.IPParameters=CPU_ICache,CPU_DCache,MPU_Control,Enable-Cortex_Memory_Protection_Unit_Region0_Settings,AttributesIndex-Cortex_Memory_Protection_Unit_Region0_Settings,Attributes0,BaseAddress-Cortex_Memory_Protection_Unit_Region0_Settings,LimitAddress-Cortex_Memory_Protection_Unit_Region0_Settings,AccessPermission-Cortex_Memory_Protection_Unit_Region0_Settings
+CORTEX_M55_S.LimitAddress-Cortex_Memory_Protection_Unit_Region0_Settings=0x38000040
+CORTEX_M55_S.MPU_Control=MPU_HFNMI_PRIVDEF
 ExtMemLoader.IPs=EXTMEM_LOADER,EXTMEM_MANAGER,RCC\:I,GPIO
-FSBL.IPs=CORTEX_M55_FSBL,GPDMA1\:I,HDP,HPDMA1\:I,LINKEDLIST,RCC,GPIO\:I,NVIC\:I
+FSBL.IPs=CORTEX_M55_FSBL,GPDMA1\:I,HDP,HPDMA1\:I,LINKEDLIST,RCC,GPIO\:I,NVIC\:I,MEMORYMAP
 File.Version=6
 GPIO.groupedBy=
 KeepUserPlacement=false
+MMTAppReg1.MEMORYMAP.AppRegionName=RAM
+MMTAppReg1.MEMORYMAP.ContextName=FSBL
+MMTAppReg1.MEMORYMAP.CoreName=ARM Cortex-M55
+MMTAppReg1.MEMORYMAP.DefaultDataRegion=true
+MMTAppReg1.MEMORYMAP.IPParameters=StartAddress,Size,CoreName,DefaultDataRegion,ContextName,Name
+MMTAppReg1.MEMORYMAP.Name=RAM
+MMTAppReg1.MEMORYMAP.Size=262144
+MMTAppReg1.MEMORYMAP.StartAddress=0x341C0000
+MMTAppReg2.MEMORYMAP.AppRegionName=FLASH
+MMTAppReg2.MEMORYMAP.ContextName=FSBL
+MMTAppReg2.MEMORYMAP.CoreName=ARM Cortex-M55
+MMTAppReg2.MEMORYMAP.DefaultCodeRegion=true
+MMTAppReg2.MEMORYMAP.DefaultDataRegion=false
+MMTAppReg2.MEMORYMAP.IPParameters=StartAddress,Size,CoreName,DefaultDataRegion,ContextName,Name,DefaultCodeRegion,ISRRegion,RootBootRegion
+MMTAppReg2.MEMORYMAP.ISRRegion=true
+MMTAppReg2.MEMORYMAP.Name=FLASH
+MMTAppReg2.MEMORYMAP.RootBootRegion=true
+MMTAppReg2.MEMORYMAP.Size=261120
+MMTAppReg2.MEMORYMAP.StartAddress=0x34180400
+MMTAppReg3.MEMORYMAP.AppRegionName=RAM
+MMTAppReg3.MEMORYMAP.ContextName=Appli
+MMTAppReg3.MEMORYMAP.CoreName=ARM Cortex-M55
+MMTAppReg3.MEMORYMAP.DefaultDataRegion=true
+MMTAppReg3.MEMORYMAP.IPParameters=StartAddress,Size,CoreName,DefaultDataRegion,ContextName,Name
+MMTAppReg3.MEMORYMAP.Name=RAM
+MMTAppReg3.MEMORYMAP.Size=1572864
+MMTAppReg3.MEMORYMAP.StartAddress=0x34080000
+MMTAppReg4.MEMORYMAP.AppRegionName=FLASH
+MMTAppReg4.MEMORYMAP.ContextName=Appli
+MMTAppReg4.MEMORYMAP.CoreName=ARM Cortex-M55
+MMTAppReg4.MEMORYMAP.DefaultCodeRegion=true
+MMTAppReg4.MEMORYMAP.DefaultDataRegion=false
+MMTAppReg4.MEMORYMAP.IPParameters=StartAddress,Size,CoreName,DefaultDataRegion,ContextName,Name,DefaultCodeRegion,ISRRegion,RootBootRegion
+MMTAppReg4.MEMORYMAP.ISRRegion=true
+MMTAppReg4.MEMORYMAP.Name=FLASH
+MMTAppReg4.MEMORYMAP.RootBootRegion=true
+MMTAppReg4.MEMORYMAP.Size=523264
+MMTAppReg4.MEMORYMAP.StartAddress=0x34000400
+MMTAppRegionsCount=4
+MMTConfigApplied=false
+MMTSectionSuffix=
 Mcu.CPN=STM32N657X0H3Q
 Mcu.Context0=FSBL
@@ -21,13 +72,15 @@
 Mcu.IP0=CORTEX_M55_FSBL
 Mcu.IP1=CORTEX_M55_S
-Mcu.IP2=NVIC1
-Mcu.IP3=NVIC
-Mcu.IP4=RCC
-Mcu.IP5=RIF
-Mcu.IPNb=6
+Mcu.IP2=MEMORYMAP
+Mcu.IP3=NVIC1
+Mcu.IP4=NVIC
+Mcu.IP5=RCC
+Mcu.IP6=RIF
+Mcu.IPNb=7
 Mcu.Name=STM32N657X0HxQ
 Mcu.Package=VFBGA264
 Mcu.Pin0=VP_RIF_VS_RIF1
-Mcu.PinsNb=1
+Mcu.Pin1=VP_MEMORYMAP_VS_MEMORYMAP
+Mcu.PinsNb=2
 Mcu.ThirdPartyNb=0
 Mcu.UserConstants=
@@ -108,5 +161,5 @@
 ProjectManager.UAScriptBeforePath=
 ProjectManager.UnderRoot=false
-ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false-FSBL,1-SystemIsolation_Config-RIF-false-HAL-true-Appli,0-MX_CORTEX_M55_FSBL_Init-CORTEX_M55_FSBL-false-HAL-true-FSBL,0-MX_CORTEX_M55_S_Init-CORTEX_M55_S-false-HAL-true-Appli
+ProjectManager.functionlistsort=1-SystemClock_Config-RCC-true-HAL-false-FSBL,2-MX_GPIO_Init-GPIO-false-HAL-true-FSBL,1-MX_GPIO_Init-GPIO-false-HAL-true-Appli,2-SystemIsolation_Config-RIF-false-HAL-true-Appli,0-MX_CORTEX_M55_FSBL_Init-CORTEX_M55_FSBL-false-HAL-true-FSBL,0-MX_CORTEX_M55_S_Init-CORTEX_M55_S-false-HAL-true-Appli,1-MX_GPIO_Init-GPIO-false-HAL-true-ExtMemLoader
 RCC.ADC12Freq_Value=200000000
 RCC.ADFFreq_Value=200000000
@@ -774,4 +827,6 @@
 RIF.VENC_CID_RIMU=0
 RIF.default_config=false
+VP_MEMORYMAP_VS_MEMORYMAP.Mode=CurAppReg
+VP_MEMORYMAP_VS_MEMORYMAP.Signal=MEMORYMAP_VS_MEMORYMAP
 VP_RIF_VS_RIF1.Mode=RISUP
 VP_RIF_VS_RIF1.Signal=RIF_VS_RIF1