CONTENTS

• LINK INFORMATION
  • Linker version
  • Command line
• LINKER SCRIPT
  • Linker script 'D:/Projekte/hadewe_blto2/trunk/firmware/FSBL/SES/STM32N6xx_RAM.icf'
• PLACEMENT SUMMARY
  • place at 0x34180400
  • place at 0x34200000
  • "<#14> at line 120, col 45": place in [0x34180400 to 0x341FFFFF] with maximum packing
  • "<#16> at line 128, col 45": place in [0x34180400 to 0x341FFFFF] with auto order
  • "<#17> at line 132, col 45": place in [0x34180400 to 0x341FFFFF] with auto order
• MODULE SUMMARY
  • Memory use by input file
  • Memory use by archive member
  • Memory use by linker
• MODULE DETAIL
  • Module blto2_FSBL_lto.o
  • Module SEGGER_THUMB_Startup.o
  • Module stm32n657xx_Vectors.o
  • Module STM32N6xx_Startup.o
  • Module SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
  • Module strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
  • All modules
• SECTION DETAIL
  • Sections by address
• UNUSED MEMORY SUMMARY
  • Detail
• INITIALIZATION TABLE
  • Constructor list
  • Initialize by zero
  • Initialize by copy with packing=none
  • Summary
• LINKER-CREATED VENEERS
  • Arm-Arm range extension veneers
  • Thumb-Thumb range extension veneers
  • Arm-Thumb mode switch veneers
  • Thumb-Arm mode switch veneers
  • Summary
• SYMBOL LIST
  • Function symbols by name
  • Function symbols by address
  • Function symbols by descending size
  • Read-write data symbols by name
  • Read-write data symbols by address
  • Read-write data symbols by descending size
  • Read-only data symbols by name
  • Read-only data symbols by address
  • Untyped symbols by name
  • Untyped symbols by address
• REGION LIST
  • Regions by name
  • Analysis
• BLOCK LIST
  • Blocks by name
  • Blocks by address
• STACK SIZES
  • Functions by stack size
  • Functions without stack size information
• UNUSED INPUTS
  • Unused object files
• ABSOLUTE LISTING
  • Section .vectors from stm32n657xx_Vectors.o, size=844, align=1024
  • Section .text.main from blto2_FSBL_lto.o, size=1036, align=4
  • Section .text.SysTick_Handler from blto2_FSBL_lto.o, size=16, align=4
  • Section .text.SystemCoreClockUpdate from blto2_FSBL_lto.o, size=400, align=4
  • Section .text.HAL_RCC_ClockConfig from blto2_FSBL_lto.o, size=1472, align=4
  • Section .text.RCC_IC_CheckPLLSources from blto2_FSBL_lto.o, size=148, align=4
  • Section .text.RCCEx_GetPLLSourceFreq from blto2_FSBL_lto.o, size=128, align=4
  • Section .rodata..Lswitch.table.HAL_GPIO_DeInit from blto2_FSBL_lto.o, size=64, align=4
  • Section .rodata..Lswitch.table.RCC_PLL_Config from blto2_FSBL_lto.o, size=12, align=4
  • Section .init._start from SEGGER_THUMB_Startup.o, size=20, align=4
  • Section .init.Reset_Handler from STM32N6xx_Startup.o, size=44, align=4
  • Section .text.libc.__aeabi_memclr from strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=104, align=4
  • Section .text.NMI_Handler from blto2_FSBL_lto.o, size=2, align=4
  • Section .text.SVC_Handler from blto2_FSBL_lto.o, size=2, align=4
  • Section .text.SystemInit from blto2_FSBL_lto.o, size=302, align=4
  • Section .text.HAL_GPIO_Init from blto2_FSBL_lto.o, size=418, align=4
  • Section .text.HAL_RCC_OscConfig from blto2_FSBL_lto.o, size=1714, align=4
  • Section .text.RCC_PLL_IsNewConfig from blto2_FSBL_lto.o, size=134, align=4
  • Section .text.RCC_PLL_Config from blto2_FSBL_lto.o, size=446, align=4
  • Section .init_array from STM32N6xx_Startup.o, size=4, align=4
  • Section .bss.uwTick from blto2_FSBL_lto.o, size=4, align=4
  • Section .bss.uwTickPrio from blto2_FSBL_lto.o, size=1, align=4
  • Section .data.SystemCoreClock from blto2_FSBL_lto.o, size=4, align=4
  • Section .segger.init.__SEGGER_init_ctors from SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=36, align=4
  • Section .segger.init.table from [ Linker created ], size=36, align=4
  • Section .segger.init.data from [ Linker created ], size=4, align=4
  • Section .segger.init.__SEGGER_init_zero from SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=18, align=2
  • Section .segger.init.__SEGGER_init_copy from SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=20, align=2
  • Section .bss.block.stack from [ Linker created ], size=8192, align=8
• OPTIMIZATION REPORT
  • Transformations performed
• LINK SUMMARY
  • Memory breakdown
  • Region summary
  • Diagnostic summary

LINK INFORMATION

Linker version

SEGGER ARM Linker 4.44.5 compiled Aug  7 2026 18:47:09
Copyright (c) 2017-2026 SEGGER Microcontroller GmbH    www.segger.com

Command line

--add-region:ITCM_RAM=0x00010000@0x10000000
--add-region:DTCM_RAM=0x00020000@0x30000000
--add-region:FLEX_RAM=0x00064000@0x34000000
--add-region:AXI_RAM1=0x0009c000@0x34064000
--add-region:AXI_RAM2=0x0007fc00@0x34180400
--add-region:AXI_RAM3=0x00070000@0x34200000
--add-region:AXI_RAM4=0x00070000@0x34270000
--add-region:AXI_RAM5=0x00070000@0x342e0000
--add-region:AXI_RAM6=0x00070000@0x34350000
--add-region:AXI_RAM7=0x00040000@0x343c0000
--add-region:AXI_RAM8=0x00020000@0x34400000
--add-region:AHB_RAM1=0x00004000@0x38000000
--add-region:AHB_RAM2=0x00004000@0x38004000
--add-region:BKP_RAM=0x00002000@0x3c000000
--full-section-headers
--dedupe-code
--merge-sections
--merge-strings
--map-html
--map-file=Output/Release/Exe/blto2_FSBL.htm
--map-full
--list-all-undefineds
-eReset_Handler
-EL
-mcpu=8.1-M.main
--silent
-TD:/Projekte/hadewe_blto2/trunk/firmware/FSBL/SES/STM32N6xx_RAM.icf
--defsym=__STACKSIZE__=8192
--defsym=__STACKSIZE_PROCESS__=0
--defsym=__HEAPSIZE__=256
--defsym=__SEGGER_RTL_vfprintf=__SEGGER_RTL_vfprintf_short_float_long_long
--defsym=__SEGGER_RTL_vfscanf=__SEGGER_RTL_vfscanf_int
-u_vectors
-o
D:/Projekte/hadewe_blto2/trunk/firmware/FSBL/SES/Output/Release/Exe/blto2_FSBL.elf
D:/Projekte/hadewe_blto2/trunk/firmware/FSBL/SES/Output/Release/Obj/blto2_FSBL_lto.o
Output/Release/Obj/SEGGER_THUMB_Startup.o
Output/Release/Obj/stm32n657xx_Vectors.o
Output/Release/Obj/STM32N6xx_Startup.o
C:/Program Files/SEGGER/SEGGER Embedded Studio 8.30a/lib/libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a
C:/Program Files/SEGGER/SEGGER Embedded Studio 8.30a/lib/SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a
C:/Program Files/SEGGER/SEGGER Embedded Studio 8.30a/lib/prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a
C:/Program Files/SEGGER/SEGGER Embedded Studio 8.30a/lib/heapops_disable_interrupts_locking_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a
C:/Program Files/SEGGER/SEGGER Embedded Studio 8.30a/lib/strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a
C:/Program Files/SEGGER/SEGGER Embedded Studio 8.30a/lib/mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a

LINKER SCRIPT

Linker script 'D:/Projekte/hadewe_blto2/trunk/firmware/FSBL/SES/STM32N6xx_RAM.icf'

/*********************************************************************
*                    SEGGER Microcontroller GmbH                     *
*                        The Embedded Experts                        *
**********************************************************************
*                                                                    *
*            (c) 2014 - 2026 SEGGER Microcontroller GmbH             *
*                                                                    *
*       www.segger.com     Support: support@segger.com               *
*                                                                    *
**********************************************************************
*                                                                    *
* All rights reserved.                                               *
*                                                                    *
* Redistribution and use in source and binary forms, with or         *
* without modification, are permitted provided that the following    *
* condition is met:                                                  *
*                                                                    *
* - Redistributions of source code must retain the above copyright   *
*   notice, this condition and the following disclaimer.             *
*                                                                    *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND             *
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,        *
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF           *
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE           *
* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR           *
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT  *
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;    *
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF      *
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT          *
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE  *
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH   *
* DAMAGE.                                                            *
*                                                                    *
**********************************************************************
-------------------------- END-OF-HEADER -----------------------------

File    : STM32N6xx_RAM.icf
Purpose : STM32N6xx linker script for application placement in RAM
          (to be copied to RAM by bootloader or debugger)
          for use with the SEGGER Linker.
Maps    : STM32N645A0HxQ, STM32N645B0HxQ, STM32N645I0HxQ, STM32N645L0HxQ,
          STM32N645X0HxQ, STM32N645Z0HxQ, STM32N647A0HxQ, STM32N647B0HxQ,
          STM32N647I0HxQ, STM32N647L0HxQ, STM32N647X0HxQ, STM32N647Z0HxQ,
          STM32N655A0HxQ, STM32N655B0HxQ, STM32N655I0HxQ, STM32N655L0HxQ,
          STM32N655X0HxQ, STM32N655Z0HxQ, STM32N657A0HxQ, STM32N657B0HxQ,
          STM32N657I0HxQ, STM32N657L0HxQ, STM32N657X0HxQ, STM32N657Z0HxQ
Literature:
  [1]  SEGGER Linker User Guide (https://www.segger.com/doc/UM20005_Linker.html)
  [2]  SEGGER Linker Section Placement (https://wiki.segger.com/SEGGER_Linker_Script_Files)
*/

define memory with size = 4G;

//
// Combined regions per memory type
//
define region RAM   = AXI_RAM2;

//
// Block definitions
//
define block ctors                          { section .ctors,     section .ctors.*, block with         alphabetical order { init_array } };
define block dtors                          { section .dtors,     section .dtors.*, block with reverse alphabetical order { fini_array } };
define block exidx                          { section .ARM.exidx, section .ARM.exidx.* };
define block tbss                           { section .tbss,      section .tbss.*  };
define block tdata                          { section .tdata,     section .tdata.* };
define block tls with fixed order           { block tbss, block tdata };
define block tdata_load                     { copy of block tdata };
define block heap           with auto size = __HEAPSIZE__,  alignment = 8, readwrite access { };
define block stack          with      size = __STACKSIZE__, alignment = 8, readwrite access { };
define block stack_process  with      size = __STACKSIZE_PROCESS__, alignment = 8, /* fill =0xCD, */ readwrite access { };

//
// Explicit initialization settings for sections
// Packing options for initialize by copy: packing=auto/lzss/zpak/packbits
//
do not initialize                           { section .non_init, section .non_init.*, section .*.non_init, section .*.non_init.* };
do not initialize                           { section .no_init, section .no_init.*, section .*.no_init, section .*.no_init.* };   // Legacy sections, kept for backwards compatibility
do not initialize                           { section .noinit, section .noinit.*, section .*.noinit, section .*.noinit.* };       // Legacy sections, used by some SDKs/HALs
do not initialize                           { section .vectors_ram };
initialize by copy with packing=auto        { section .data, section .data.*, section .*.data, section .*.data.* };               // Static data sections
initialize by copy with packing=auto        { section .fast, section .fast.*, section .*.fast, section .*.fast.* };               // "RAM Code" sections

initialize by calling __SEGGER_STOP_X_InitLimits    { section .data.stop.* };

#define USES_ALLOC_FUNC                                   \
  linked symbol malloc || linked symbol aligned_alloc ||  \
  linked symbol calloc || linked symbol realloc

initialize by calling __SEGGER_init_heap if USES_ALLOC_FUNC { block heap };                        // Init the heap if one is required
initialize by calling __SEGGER_init_ctors    { block ctors };                                      // Call constructors for global objects which need to be constructed before reaching main (if any). Make sure this is done after setting up heap.

//assert with warning "free() linked into application but there are no calls to an allocation function!" {
//  linked symbol free => USES_ALLOC_FUNC
//};

assert with error "heap is too small!"              { USES_ALLOC_FUNC => size  of block heap >= 48 };
assert with error "heap size not a multiple of 8!"  { USES_ALLOC_FUNC => size  of block heap % 8 == 0 };
assert with error "heap not correctly aligned!"     { USES_ALLOC_FUNC => start of block heap % 8 == 0 };

//
// Explicit placement in RAMn
//
place in AHB_RAM1                           { section .AHB_RAM1, section .AHB_RAM1.* };
place in AHB_RAM2                           { section .AHB_RAM2, section .AHB_RAM2.* };
place in AXI_RAM1                           { section .AXI_RAM1, section .AXI_RAM1.* };  // This region may be deactivated and not accessible
place in AXI_RAM2                           { section .AXI_RAM2, section .AXI_RAM2.* };  // This region may be deactivated and not accessible
place in AXI_RAM3                           { section .AXI_RAM3, section .AXI_RAM3.* };  // This region may be deactivated and not accessible
place in AXI_RAM4                           { section .AXI_RAM4, section .AXI_RAM4.* };  // This region may be deactivated and not accessible
place in BKP_RAM                            { section .BKP_RAM,  section .BKP_RAM.*  };  // This region may be deactivated and not accessible
place in DTCM_RAM                           { section .DTCM_RAM, section .DTCM_RAM.* };  // This region may be deactivated and not accessible
place in FLEX_RAM                           { section .FLEX_RAM, section .FLEX_RAM.* };
place in ITCM_RAM                           { section .ITCM_RAM, section .ITCM_RAM.* };  // This region may be deactivated and not accessible

//
// RAM Placement
//
place at start of RAM                       { section .vectors };                                   // Vector table section
place in RAM with minimum size order        { block tdata_load,                                     // Thread-local-storage load image
                                              block exidx,                                          // ARM exception unwinding block
                                              block ctors,                                          // Constructors block
                                              block dtors,                                          // Destructors block
                                              readonly,                                             // Catch-all for readonly data (e.g. .rodata, .srodata)
                                              readexec                                              // Catch-all for (readonly) executable code (e.g. .text)
                                            };
place in RAM                                { section .fast, section .fast.* };                     // "ramfunc" section
place in RAM with auto order                { block tls,                                            // Thread-local-storage block
                                              readwrite,                                            // Catch-all for initialized/uninitialized data sections (e.g. .data, .noinit)
                                              zeroinit                                              // Catch-all for zero-initialized data sections (e.g. .bss)
                                            };
place in RAM                                { block heap };                                         // Heap reserved block
place at end of RAM                         { block stack };                                        // Stack reserved block at the end

PLACEMENT SUMMARY

place at 0x34180400

place at 0x34200000

"<#14> at line 120, col 45": place in [0x34180400 to 0x341FFFFF] with maximum packing

"<#16> at line 128, col 45": place in [0x34180400 to 0x341FFFFF] with auto order

"<#17> at line 132, col 45": place in [0x34180400 to 0x341FFFFF] with auto order

MODULE SUMMARY

Memory use by input file

Memory use by archive member

Memory use by linker

MODULE DETAIL

Module blto2_FSBL_lto.o

Module SEGGER_THUMB_Startup.o

Module stm32n657xx_Vectors.o

Module STM32N6xx_Startup.o

Module SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)

Module strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)

All modules

SECTION DETAIL

Sections by address

UNUSED MEMORY SUMMARY

Detail

INITIALIZATION TABLE

Constructor list

Initialize by zero

Initialize by copy with packing=none

Summary

LINKER-CREATED VENEERS

Arm-Arm range extension veneers

Thumb-Thumb range extension veneers

Arm-Thumb mode switch veneers

Thumb-Arm mode switch veneers

Summary

SYMBOL LIST

Function symbols by name

Function symbols by address