CONTENTS

LINK INFORMATION

SEGGER ARM Linker 4.44.5 compiled Aug  7 2026 18:47:09
Copyright (c) 2017-2026 SEGGER Microcontroller GmbH    www.segger.com
--add-region:ITCM_RAM=0x00010000@0x10000000
--add-region:DTCM_RAM=0x00020000@0x30000000
--add-region:FLEX_RAM=0x00064000@0x34000000
--add-region:AXI_RAM1=0x0009c000@0x34064000
--add-region:AXI_RAM2=0x0007fc00@0x34180400
--add-region:AXI_RAM3=0x00070000@0x34200000
--add-region:AXI_RAM4=0x00070000@0x34270000
--add-region:AXI_RAM5=0x00070000@0x342e0000
--add-region:AXI_RAM6=0x00070000@0x34350000
--add-region:AXI_RAM7=0x00040000@0x343c0000
--add-region:AXI_RAM8=0x00020000@0x34400000
--add-region:AHB_RAM1=0x00004000@0x38000000
--add-region:AHB_RAM2=0x00004000@0x38004000
--add-region:BKP_RAM=0x00002000@0x3c000000
--full-section-headers
--merge-sections
--merge-strings
--map-html
--map-file=Output/Production/Exe/blto2_FSBL.htm
--map-full
--list-all-undefineds
-eReset_Handler
-EL
-mcpu=8.1-M.main
--silent
-TD:/Projekte/hadewe_blto2/trunk/firmware/FSBL/SES/STM32N6xx_RAM.icf
--defsym=__STACKSIZE__=8192
--defsym=__STACKSIZE_PROCESS__=0
--defsym=__HEAPSIZE__=256
--defsym=__SEGGER_RTL_vfprintf=__SEGGER_RTL_vfprintf_short_float_long_long
--defsym=__SEGGER_RTL_vfscanf=__SEGGER_RTL_vfscanf_int
-u_vectors
-o
D:/Projekte/hadewe_blto2/trunk/firmware/FSBL/SES/Output/Production/Exe/blto2_FSBL.elf
D:/Projekte/hadewe_blto2/trunk/firmware/FSBL/SES/Output/Production/Obj/blto2_FSBL_lto.o
Output/Production/Obj/SEGGER_THUMB_Startup.o
Output/Production/Obj/stm32n657xx_Vectors.o
Output/Production/Obj/STM32N6xx_Startup.o
C:/Program Files/SEGGER/SEGGER Embedded Studio 8.30a/lib/libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a
C:/Program Files/SEGGER/SEGGER Embedded Studio 8.30a/lib/SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a
C:/Program Files/SEGGER/SEGGER Embedded Studio 8.30a/lib/prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a
C:/Program Files/SEGGER/SEGGER Embedded Studio 8.30a/lib/heapops_disable_interrupts_locking_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a
C:/Program Files/SEGGER/SEGGER Embedded Studio 8.30a/lib/strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a
C:/Program Files/SEGGER/SEGGER Embedded Studio 8.30a/lib/mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a

LINKER SCRIPT

Linker script 'D:/Projekte/hadewe_blto2/trunk/firmware/FSBL/SES/STM32N6xx_RAM.icf'

/*********************************************************************
*                    SEGGER Microcontroller GmbH                     *
*                        The Embedded Experts                        *
**********************************************************************
*                                                                    *
*            (c) 2014 - 2026 SEGGER Microcontroller GmbH             *
*                                                                    *
*       www.segger.com     Support: support@segger.com               *
*                                                                    *
**********************************************************************
*                                                                    *
* All rights reserved.                                               *
*                                                                    *
* Redistribution and use in source and binary forms, with or         *
* without modification, are permitted provided that the following    *
* condition is met:                                                  *
*                                                                    *
* - Redistributions of source code must retain the above copyright   *
*   notice, this condition and the following disclaimer.             *
*                                                                    *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND             *
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,        *
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF           *
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE           *
* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR           *
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT  *
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;    *
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF      *
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT          *
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE  *
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH   *
* DAMAGE.                                                            *
*                                                                    *
**********************************************************************
-------------------------- END-OF-HEADER -----------------------------

File    : STM32N6xx_RAM.icf
Purpose : STM32N6xx linker script for application placement in RAM
          (to be copied to RAM by bootloader or debugger)
          for use with the SEGGER Linker.
Maps    : STM32N645A0HxQ, STM32N645B0HxQ, STM32N645I0HxQ, STM32N645L0HxQ,
          STM32N645X0HxQ, STM32N645Z0HxQ, STM32N647A0HxQ, STM32N647B0HxQ,
          STM32N647I0HxQ, STM32N647L0HxQ, STM32N647X0HxQ, STM32N647Z0HxQ,
          STM32N655A0HxQ, STM32N655B0HxQ, STM32N655I0HxQ, STM32N655L0HxQ,
          STM32N655X0HxQ, STM32N655Z0HxQ, STM32N657A0HxQ, STM32N657B0HxQ,
          STM32N657I0HxQ, STM32N657L0HxQ, STM32N657X0HxQ, STM32N657Z0HxQ
Literature:
  [1]  SEGGER Linker User Guide (https://www.segger.com/doc/UM20005_Linker.html)
  [2]  SEGGER Linker Section Placement (https://wiki.segger.com/SEGGER_Linker_Script_Files)
*/

define memory with size = 4G;

//
// Combined regions per memory type
//
define region RAM   = AXI_RAM2;

//
// Block definitions
//
define block ctors                          { section .ctors,     section .ctors.*, block with         alphabetical order { init_array } };
define block dtors                          { section .dtors,     section .dtors.*, block with reverse alphabetical order { fini_array } };
define block exidx                          { section .ARM.exidx, section .ARM.exidx.* };
define block tbss                           { section .tbss,      section .tbss.*  };
define block tdata                          { section .tdata,     section .tdata.* };
define block tls with fixed order           { block tbss, block tdata };
define block tdata_load                     { copy of block tdata };
define block heap           with auto size = __HEAPSIZE__,  alignment = 8, readwrite access { };
define block stack          with      size = __STACKSIZE__, alignment = 8, readwrite access { };
define block stack_process  with      size = __STACKSIZE_PROCESS__, alignment = 8, /* fill =0xCD, */ readwrite access { };

//
// Explicit initialization settings for sections
// Packing options for initialize by copy: packing=auto/lzss/zpak/packbits
//
do not initialize                           { section .non_init, section .non_init.*, section .*.non_init, section .*.non_init.* };
do not initialize                           { section .no_init, section .no_init.*, section .*.no_init, section .*.no_init.* };   // Legacy sections, kept for backwards compatibility
do not initialize                           { section .noinit, section .noinit.*, section .*.noinit, section .*.noinit.* };       // Legacy sections, used by some SDKs/HALs
do not initialize                           { section .vectors_ram };
initialize by copy with packing=auto        { section .data, section .data.*, section .*.data, section .*.data.* };               // Static data sections
initialize by copy with packing=auto        { section .fast, section .fast.*, section .*.fast, section .*.fast.* };               // "RAM Code" sections

initialize by calling __SEGGER_STOP_X_InitLimits    { section .data.stop.* };

#define USES_ALLOC_FUNC                                   \
  linked symbol malloc || linked symbol aligned_alloc ||  \
  linked symbol calloc || linked symbol realloc

initialize by calling __SEGGER_init_heap if USES_ALLOC_FUNC { block heap };                        // Init the heap if one is required
initialize by calling __SEGGER_init_ctors    { block ctors };                                      // Call constructors for global objects which need to be constructed before reaching main (if any). Make sure this is done after setting up heap.

//assert with warning "free() linked into application but there are no calls to an allocation function!" {
//  linked symbol free => USES_ALLOC_FUNC
//};

assert with error "heap is too small!"              { USES_ALLOC_FUNC => size  of block heap >= 48 };
assert with error "heap size not a multiple of 8!"  { USES_ALLOC_FUNC => size  of block heap % 8 == 0 };
assert with error "heap not correctly aligned!"     { USES_ALLOC_FUNC => start of block heap % 8 == 0 };

//
// Explicit placement in RAMn
//
place in AHB_RAM1                           { section .AHB_RAM1, section .AHB_RAM1.* };
place in AHB_RAM2                           { section .AHB_RAM2, section .AHB_RAM2.* };
place in AXI_RAM1                           { section .AXI_RAM1, section .AXI_RAM1.* };  // This region may be deactivated and not accessible
place in AXI_RAM2                           { section .AXI_RAM2, section .AXI_RAM2.* };  // This region may be deactivated and not accessible
place in AXI_RAM3                           { section .AXI_RAM3, section .AXI_RAM3.* };  // This region may be deactivated and not accessible
place in AXI_RAM4                           { section .AXI_RAM4, section .AXI_RAM4.* };  // This region may be deactivated and not accessible
place in BKP_RAM                            { section .BKP_RAM,  section .BKP_RAM.*  };  // This region may be deactivated and not accessible
place in DTCM_RAM                           { section .DTCM_RAM, section .DTCM_RAM.* };  // This region may be deactivated and not accessible
place in FLEX_RAM                           { section .FLEX_RAM, section .FLEX_RAM.* };
place in ITCM_RAM                           { section .ITCM_RAM, section .ITCM_RAM.* };  // This region may be deactivated and not accessible

//
// RAM Placement
//
place at start of RAM                       { section .vectors };                                   // Vector table section
place in RAM with minimum size order        { block tdata_load,                                     // Thread-local-storage load image
                                              block exidx,                                          // ARM exception unwinding block
                                              block ctors,                                          // Constructors block
                                              block dtors,                                          // Destructors block
                                              readonly,                                             // Catch-all for readonly data (e.g. .rodata, .srodata)
                                              readexec                                              // Catch-all for (readonly) executable code (e.g. .text)
                                            };
place in RAM                                { section .fast, section .fast.* };                     // "ramfunc" section
place in RAM with auto order                { block tls,                                            // Thread-local-storage block
                                              readwrite,                                            // Catch-all for initialized/uninitialized data sections (e.g. .data, .noinit)
                                              zeroinit                                              // Catch-all for zero-initialized data sections (e.g. .bss)
                                            };
place in RAM                                { block heap };                                         // Heap reserved block
place at end of RAM                         { block stack };                                        // Stack reserved block at the end

PLACEMENT SUMMARY

place at 0x34180400

Symbol or [section] name Type Address Size Align Object File
_vectors Code 0x34180400 844 1024 stm32n657xx_Vectors.o

place at 0x34200000

Symbol or [section] name Type Address Size Align Object File
[.bss.block.stack] None 0x341FE000 8 192 8 [ Linker created ]

"<#14> at line 120, col 45": place in [0x34180400 to 0x341FFFFF] with maximum packing

Symbol or [section] name Type Address Size Align Object File
main Code 0x3418074C 1 184 4 blto2_FSBL_lto.o
SysTick_Handler Code 0x34180BEC 16 4 blto2_FSBL_lto.o
SystemCoreClockUpdate Code 0x34180BFC 400 4 blto2_FSBL_lto.o
HAL_RCC_ClockConfig Code 0x34180D8C 1 472 4 blto2_FSBL_lto.o
RCC_IC_CheckPLLSources Code 0x3418134C 148 4 blto2_FSBL_lto.o
RCCEx_GetPLLSourceFreq Code 0x341813E0 128 4 blto2_FSBL_lto.o
[.rodata..Lswitch.table.HAL_GPIO_DeInit] Cnst 0x34181460 64 4 blto2_FSBL_lto.o
[.rodata..Lswitch.table.RCC_PLL_Config] Cnst 0x341814A0 12 4 blto2_FSBL_lto.o
_start Code 0x341814AC 20 4 SEGGER_THUMB_Startup.o
reset_handler Code 0x341814C0 44 4 STM32N6xx_Startup.o
__aeabi_memclr Code 0x341814EC 104 4 strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
NMI_Handler Code 0x34181554 2 4 blto2_FSBL_lto.o
PVD_PVM_IRQHandler Code 0x34181556 2 2 stm32n657xx_Vectors.o
HardFault_Handler Code 0x34181558 2 4 blto2_FSBL_lto.o
DTS_IRQHandler Code 0x3418155A 2 2 stm32n657xx_Vectors.o
MemManage_Handler Code 0x3418155C 2 4 blto2_FSBL_lto.o
RCC_IRQHandler Code 0x3418155E 2 2 stm32n657xx_Vectors.o
BusFault_Handler Code 0x34181560 2 4 blto2_FSBL_lto.o
LOCKUP_IRQHandler Code 0x34181562 2 2 stm32n657xx_Vectors.o
UsageFault_Handler Code 0x34181564 2 4 blto2_FSBL_lto.o
CACHE_ECC_IRQHandler Code 0x34181566 2 2 stm32n657xx_Vectors.o
SVC_Handler Code 0x34181568 2 4 blto2_FSBL_lto.o
TCM_ECC_IRQHandler Code 0x3418156A 2 2 stm32n657xx_Vectors.o
DebugMon_Handler Code 0x3418156C 2 4 blto2_FSBL_lto.o
BCK_ECC_IRQHandler Code 0x3418156E 2 2 stm32n657xx_Vectors.o
PendSV_Handler Code 0x34181570 2 4 blto2_FSBL_lto.o
FPU_IRQHandler Code 0x34181572 2 2 stm32n657xx_Vectors.o
SystemInit Code 0x34181574 302 4 blto2_FSBL_lto.o
RTC_S_IRQHandler Code 0x341816A2 2 2 stm32n657xx_Vectors.o
HAL_GPIO_Init Code 0x341816A4 418 4 blto2_FSBL_lto.o
TAMP_IRQHandler Code 0x34181846 2 2 stm32n657xx_Vectors.o
HAL_RCC_OscConfig Code 0x34181848 1 714 4 blto2_FSBL_lto.o
RIFSC_TAMPER_IRQHandler Code 0x34181EFA 2 2 stm32n657xx_Vectors.o
RCC_PLL_IsNewConfig Code 0x34181EFC 134 4 blto2_FSBL_lto.o
IAC_IRQHandler Code 0x34181F82 2 2 stm32n657xx_Vectors.o
RCC_PLL_Config Code 0x34181F84 446 4 blto2_FSBL_lto.o
RCC_S_IRQHandler Code 0x34182142 2 2 stm32n657xx_Vectors.o
RTC_IRQHandler Code 0x34182144 2 2 stm32n657xx_Vectors.o
IWDG_IRQHandler Code 0x34182146 2 2 stm32n657xx_Vectors.o
WWDG_IRQHandler Code 0x34182148 2 2 stm32n657xx_Vectors.o
EXTI0_IRQHandler Code 0x3418214A 2 2 stm32n657xx_Vectors.o
EXTI1_IRQHandler Code 0x3418214C 2 2 stm32n657xx_Vectors.o
EXTI2_IRQHandler Code 0x3418214E 2 2 stm32n657xx_Vectors.o
EXTI3_IRQHandler Code 0x34182150 2 2 stm32n657xx_Vectors.o
EXTI4_IRQHandler Code 0x34182152 2 2 stm32n657xx_Vectors.o
EXTI5_IRQHandler Code 0x34182154 2 2 stm32n657xx_Vectors.o
EXTI6_IRQHandler Code 0x34182156 2 2 stm32n657xx_Vectors.o
EXTI7_IRQHandler Code 0x34182158 2 2 stm32n657xx_Vectors.o
EXTI8_IRQHandler Code 0x3418215A 2 2 stm32n657xx_Vectors.o
EXTI9_IRQHandler Code 0x3418215C 2 2 stm32n657xx_Vectors.o
EXTI10_IRQHandler Code 0x3418215E 2 2 stm32n657xx_Vectors.o
EXTI11_IRQHandler Code 0x34182160 2 2 stm32n657xx_Vectors.o
EXTI12_IRQHandler Code 0x34182162 2 2 stm32n657xx_Vectors.o
EXTI13_IRQHandler Code 0x34182164 2 2 stm32n657xx_Vectors.o
EXTI14_IRQHandler Code 0x34182166 2 2 stm32n657xx_Vectors.o
EXTI15_IRQHandler Code 0x34182168 2 2 stm32n657xx_Vectors.o
SAES_IRQHandler Code 0x3418216A 2 2 stm32n657xx_Vectors.o
CRYP_IRQHandler Code 0x3418216C 2 2 stm32n657xx_Vectors.o
PKA_IRQHandler Code 0x3418216E 2 2 stm32n657xx_Vectors.o
HASH_IRQHandler Code 0x34182170 2 2 stm32n657xx_Vectors.o
RNG_IRQHandler Code 0x34182172 2 2 stm32n657xx_Vectors.o
MCE1_IRQHandler Code 0x34182174 2 2 stm32n657xx_Vectors.o
MCE2_IRQHandler Code 0x34182176 2 2 stm32n657xx_Vectors.o
MCE3_IRQHandler Code 0x34182178 2 2 stm32n657xx_Vectors.o
MCE4_IRQHandler Code 0x3418217A 2 2 stm32n657xx_Vectors.o
ADC1_2_IRQHandler Code 0x3418217C 2 2 stm32n657xx_Vectors.o
CSI_IRQHandler Code 0x3418217E 2 2 stm32n657xx_Vectors.o
DCMIPP_IRQHandler Code 0x34182180 2 2 stm32n657xx_Vectors.o
PAHB_ERR_IRQHandler Code 0x34182182 2 2 stm32n657xx_Vectors.o
NPU0_IRQHandler Code 0x34182184 2 2 stm32n657xx_Vectors.o
NPU1_IRQHandler Code 0x34182186 2 2 stm32n657xx_Vectors.o
NPU2_IRQHandler Code 0x34182188 2 2 stm32n657xx_Vectors.o
NPU3_IRQHandler Code 0x3418218A 2 2 stm32n657xx_Vectors.o
CACHEAXI_IRQHandler Code 0x3418218C 2 2 stm32n657xx_Vectors.o
LTDC_LO_IRQHandler Code 0x3418218E 2 2 stm32n657xx_Vectors.o
LTDC_LO_ERR_IRQHandler Code 0x34182190 2 2 stm32n657xx_Vectors.o
DMA2D_IRQHandler Code 0x34182192 2 2 stm32n657xx_Vectors.o
JPEG_IRQHandler Code 0x34182194 2 2 stm32n657xx_Vectors.o
VENC_IRQHandler Code 0x34182196 2 2 stm32n657xx_Vectors.o
GFXMMU_IRQHandler Code 0x34182198 2 2 stm32n657xx_Vectors.o
GFXTIM_IRQHandler Code 0x3418219A 2 2 stm32n657xx_Vectors.o
GPU2D_IRQHandler Code 0x3418219C 2 2 stm32n657xx_Vectors.o
GPU2D_ER_IRQHandler Code 0x3418219E 2 2 stm32n657xx_Vectors.o
ICACHE_IRQHandler Code 0x341821A0 2 2 stm32n657xx_Vectors.o
HPDMA1_Channel0_IRQHandler Code 0x341821A2 2 2 stm32n657xx_Vectors.o
HPDMA1_Channel1_IRQHandler Code 0x341821A4 2 2 stm32n657xx_Vectors.o
HPDMA1_Channel2_IRQHandler Code 0x341821A6 2 2 stm32n657xx_Vectors.o
HPDMA1_Channel3_IRQHandler Code 0x341821A8 2 2 stm32n657xx_Vectors.o
HPDMA1_Channel4_IRQHandler Code 0x341821AA 2 2 stm32n657xx_Vectors.o
HPDMA1_Channel5_IRQHandler Code 0x341821AC 2 2 stm32n657xx_Vectors.o
HPDMA1_Channel6_IRQHandler Code 0x341821AE 2 2 stm32n657xx_Vectors.o
HPDMA1_Channel7_IRQHandler Code 0x341821B0 2 2 stm32n657xx_Vectors.o
HPDMA1_Channel8_IRQHandler Code 0x341821B2 2 2 stm32n657xx_Vectors.o
HPDMA1_Channel9_IRQHandler Code 0x341821B4 2 2 stm32n657xx_Vectors.o
HPDMA1_Channel10_IRQHandler Code 0x341821B6 2 2 stm32n657xx_Vectors.o
HPDMA1_Channel11_IRQHandler Code 0x341821B8 2 2 stm32n657xx_Vectors.o
HPDMA1_Channel12_IRQHandler Code 0x341821BA 2 2 stm32n657xx_Vectors.o
HPDMA1_Channel13_IRQHandler Code 0x341821BC 2 2 stm32n657xx_Vectors.o
HPDMA1_Channel14_IRQHandler Code 0x341821BE 2 2 stm32n657xx_Vectors.o
HPDMA1_Channel15_IRQHandler Code 0x341821C0 2 2 stm32n657xx_Vectors.o
GPDMA1_Channel0_IRQHandler Code 0x341821C2 2 2 stm32n657xx_Vectors.o
GPDMA1_Channel1_IRQHandler Code 0x341821C4 2 2 stm32n657xx_Vectors.o
GPDMA1_Channel2_IRQHandler Code 0x341821C6 2 2 stm32n657xx_Vectors.o
GPDMA1_Channel3_IRQHandler Code 0x341821C8 2 2 stm32n657xx_Vectors.o
GPDMA1_Channel4_IRQHandler Code 0x341821CA 2 2 stm32n657xx_Vectors.o
GPDMA1_Channel5_IRQHandler Code 0x341821CC 2 2 stm32n657xx_Vectors.o
GPDMA1_Channel6_IRQHandler Code 0x341821CE 2 2 stm32n657xx_Vectors.o
GPDMA1_Channel7_IRQHandler Code 0x341821D0 2 2 stm32n657xx_Vectors.o
GPDMA1_Channel8_IRQHandler Code 0x341821D2 2 2 stm32n657xx_Vectors.o
GPDMA1_Channel9_IRQHandler Code 0x341821D4 2 2 stm32n657xx_Vectors.o
GPDMA1_Channel10_IRQHandler Code 0x341821D6 2 2 stm32n657xx_Vectors.o
GPDMA1_Channel11_IRQHandler Code 0x341821D8 2 2 stm32n657xx_Vectors.o
GPDMA1_Channel12_IRQHandler Code 0x341821DA 2 2 stm32n657xx_Vectors.o
GPDMA1_Channel13_IRQHandler Code 0x341821DC 2 2 stm32n657xx_Vectors.o
GPDMA1_Channel14_IRQHandler Code 0x341821DE 2 2 stm32n657xx_Vectors.o
GPDMA1_Channel15_IRQHandler Code 0x341821E0 2 2 stm32n657xx_Vectors.o
I2C1_EV_IRQHandler Code 0x341821E2 2 2 stm32n657xx_Vectors.o
I2C1_ER_IRQHandler Code 0x341821E4 2 2 stm32n657xx_Vectors.o
I2C2_EV_IRQHandler Code 0x341821E6 2 2 stm32n657xx_Vectors.o
I2C2_ER_IRQHandler Code 0x341821E8 2 2 stm32n657xx_Vectors.o
I2C3_EV_IRQHandler Code 0x341821EA 2 2 stm32n657xx_Vectors.o
I2C3_ER_IRQHandler Code 0x341821EC 2 2 stm32n657xx_Vectors.o
I2C4_EV_IRQHandler Code 0x341821EE 2 2 stm32n657xx_Vectors.o
I2C4_ER_IRQHandler Code 0x341821F0 2 2 stm32n657xx_Vectors.o
I3C1_EV_IRQHandler Code 0x341821F2 2 2 stm32n657xx_Vectors.o
I3C1_ER_IRQHandler Code 0x341821F4 2 2 stm32n657xx_Vectors.o
I3C2_EV_IRQHandler Code 0x341821F6 2 2 stm32n657xx_Vectors.o
I3C2_ER_IRQHandler Code 0x341821F8 2 2 stm32n657xx_Vectors.o
TIM1_BRK_IRQHandler Code 0x341821FA 2 2 stm32n657xx_Vectors.o
TIM1_UP_IRQHandler Code 0x341821FC 2 2 stm32n657xx_Vectors.o
TIM1_TRG_CCU_IRQHandler Code 0x341821FE 2 2 stm32n657xx_Vectors.o
TIM1_CC_IRQHandler Code 0x34182200 2 2 stm32n657xx_Vectors.o
TIM2_IRQHandler Code 0x34182202 2 2 stm32n657xx_Vectors.o
TIM3_IRQHandler Code 0x34182204 2 2 stm32n657xx_Vectors.o
TIM4_IRQHandler Code 0x34182206 2 2 stm32n657xx_Vectors.o
TIM5_IRQHandler Code 0x34182208 2 2 stm32n657xx_Vectors.o
TIM6_IRQHandler Code 0x3418220A 2 2 stm32n657xx_Vectors.o
TIM7_IRQHandler Code 0x3418220C 2 2 stm32n657xx_Vectors.o
TIM8_BRK_IRQHandler Code 0x3418220E 2 2 stm32n657xx_Vectors.o
TIM8_UP_IRQHandler Code 0x34182210 2 2 stm32n657xx_Vectors.o
TIM8_TRG_CCU_IRQHandler Code 0x34182212 2 2 stm32n657xx_Vectors.o
TIM8_CC_IRQHandler Code 0x34182214 2 2 stm32n657xx_Vectors.o
TIM9_IRQHandler Code 0x34182216 2 2 stm32n657xx_Vectors.o
TIM10_IRQHandler Code 0x34182218 2 2 stm32n657xx_Vectors.o
TIM11_IRQHandler Code 0x3418221A 2 2 stm32n657xx_Vectors.o
TIM12_IRQHandler Code 0x3418221C 2 2 stm32n657xx_Vectors.o
TIM13_IRQHandler Code 0x3418221E 2 2 stm32n657xx_Vectors.o
TIM14_IRQHandler Code 0x34182220 2 2 stm32n657xx_Vectors.o
TIM15_IRQHandler Code 0x34182222 2 2 stm32n657xx_Vectors.o
TIM16_IRQHandler Code 0x34182224 2 2 stm32n657xx_Vectors.o
TIM17_IRQHandler Code 0x34182226 2 2 stm32n657xx_Vectors.o
TIM18_IRQHandler Code 0x34182228 2 2 stm32n657xx_Vectors.o
LPTIM1_IRQHandler Code 0x3418222A 2 2 stm32n657xx_Vectors.o
LPTIM2_IRQHandler Code 0x3418222C 2 2 stm32n657xx_Vectors.o
LPTIM3_IRQHandler Code 0x3418222E 2 2 stm32n657xx_Vectors.o
LPTIM4_IRQHandler Code 0x34182230 2 2 stm32n657xx_Vectors.o
LPTIM5_IRQHandler Code 0x34182232 2 2 stm32n657xx_Vectors.o
ADF1_FLT0_IRQHandler Code 0x34182234 2 2 stm32n657xx_Vectors.o
MDF1_FLT0_IRQHandler Code 0x34182236 2 2 stm32n657xx_Vectors.o
MDF1_FLT1_IRQHandler Code 0x34182238 2 2 stm32n657xx_Vectors.o
MDF1_FLT2_IRQHandler Code 0x3418223A 2 2 stm32n657xx_Vectors.o
MDF1_FLT3_IRQHandler Code 0x3418223C 2 2 stm32n657xx_Vectors.o
MDF1_FLT4_IRQHandler Code 0x3418223E 2 2 stm32n657xx_Vectors.o
MDF1_FLT5_IRQHandler Code 0x34182240 2 2 stm32n657xx_Vectors.o
SAI1_A_IRQHandler Code 0x34182242 2 2 stm32n657xx_Vectors.o
SAI1_B_IRQHandler Code 0x34182244 2 2 stm32n657xx_Vectors.o
SAI2_A_IRQHandler Code 0x34182246 2 2 stm32n657xx_Vectors.o
SAI2_B_IRQHandler Code 0x34182248 2 2 stm32n657xx_Vectors.o
SPDIFRX_IRQHandler Code 0x3418224A 2 2 stm32n657xx_Vectors.o
SPI1_IRQHandler Code 0x3418224C 2 2 stm32n657xx_Vectors.o
SPI2_IRQHandler Code 0x3418224E 2 2 stm32n657xx_Vectors.o
SPI3_IRQHandler Code 0x34182250 2 2 stm32n657xx_Vectors.o
SPI4_IRQHandler Code 0x34182252 2 2 stm32n657xx_Vectors.o
SPI5_IRQHandler Code 0x34182254 2 2 stm32n657xx_Vectors.o
SPI6_IRQHandler Code 0x34182256 2 2 stm32n657xx_Vectors.o
USART1_IRQHandler Code 0x34182258 2 2 stm32n657xx_Vectors.o
USART2_IRQHandler Code 0x3418225A 2 2 stm32n657xx_Vectors.o
USART3_IRQHandler Code 0x3418225C 2 2 stm32n657xx_Vectors.o
UART4_IRQHandler Code 0x3418225E 2 2 stm32n657xx_Vectors.o
UART5_IRQHandler Code 0x34182260 2 2 stm32n657xx_Vectors.o
USART6_IRQHandler Code 0x34182262 2 2 stm32n657xx_Vectors.o
UART7_IRQHandler Code 0x34182264 2 2 stm32n657xx_Vectors.o
UART8_IRQHandler Code 0x34182266 2 2 stm32n657xx_Vectors.o
UART9_IRQHandler Code 0x34182268 2 2 stm32n657xx_Vectors.o
USART10_IRQHandler Code 0x3418226A 2 2 stm32n657xx_Vectors.o
LPUART1_IRQHandler Code 0x3418226C 2 2 stm32n657xx_Vectors.o
XSPI1_IRQHandler Code 0x3418226E 2 2 stm32n657xx_Vectors.o
XSPI2_IRQHandler Code 0x34182270 2 2 stm32n657xx_Vectors.o
XSPI3_IRQHandler Code 0x34182272 2 2 stm32n657xx_Vectors.o
FMC_IRQHandler Code 0x34182274 2 2 stm32n657xx_Vectors.o
SDMMC1_IRQHandler Code 0x34182276 2 2 stm32n657xx_Vectors.o
SDMMC2_IRQHandler Code 0x34182278 2 2 stm32n657xx_Vectors.o
UCPD1_IRQHandler Code 0x3418227A 2 2 stm32n657xx_Vectors.o
USB1_OTG_HS_IRQHandler Code 0x3418227C 2 2 stm32n657xx_Vectors.o
USB2_OTG_HS_IRQHandler Code 0x3418227E 2 2 stm32n657xx_Vectors.o
ETH1_IRQHandler Code 0x34182280 2 2 stm32n657xx_Vectors.o
FDCAN1_IT0_IRQHandler Code 0x34182282 2 2 stm32n657xx_Vectors.o
FDCAN1_IT1_IRQHandler Code 0x34182284 2 2 stm32n657xx_Vectors.o
FDCAN2_IT0_IRQHandler Code 0x34182286 2 2 stm32n657xx_Vectors.o
FDCAN2_IT1_IRQHandler Code 0x34182288 2 2 stm32n657xx_Vectors.o
FDCAN3_IT0_IRQHandler Code 0x3418228A 2 2 stm32n657xx_Vectors.o
FDCAN3_IT1_IRQHandler Code 0x3418228C 2 2 stm32n657xx_Vectors.o
FDCAN_CU_IRQHandler Code 0x3418228E 2 2 stm32n657xx_Vectors.o
MDIOS_IRQHandler Code 0x34182290 2 2 stm32n657xx_Vectors.o
DCMI_PSSI_IRQHandler Code 0x34182292 2 2 stm32n657xx_Vectors.o
WAKEUP_PIN_IRQHandler Code 0x34182294 2 2 stm32n657xx_Vectors.o
CTI_INT0_IRQHandler Code 0x34182296 2 2 stm32n657xx_Vectors.o
CTI_INT1_IRQHandler Code 0x34182298 2 2 stm32n657xx_Vectors.o
LTDC_UP_IRQHandler Code 0x3418229A 2 2 stm32n657xx_Vectors.o
LTDC_UP_ERR_IRQHandler Code 0x3418229C 2 2 stm32n657xx_Vectors.o
[.rodata.block.tdata.copy] Cnst 0x3418229E 1 [ Linker created ]
[.init_array] ---- 0x341822A0 4 4 STM32N6xx_Startup.o
__SEGGER_init_ctors Code 0x341822B0 36 4 SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_init_table__ Cnst 0x341822D4 36 4 [ Linker created ]
__SEGGER_init_data__ Cnst 0x341822F8 4 4 [ Linker created ]
__SEGGER_init_zero Code 0x341822FC 18 2 SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_init_copy Code 0x3418230E 20 2 SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)

"<#16> at line 128, col 45": place in [0x34180400 to 0x341FFFFF] with auto order

Symbol or [section] name Type Address Size Align Object File
[.bss.block.heap] None 0x341822A0 8 [ Linker created ]
uwTick Zero 0x341822A4 4 4 blto2_FSBL_lto.o
uwTickPrio Zero 0x341822A8 1 4 blto2_FSBL_lto.o
SystemCoreClock Init 0x341822AC 4 4 blto2_FSBL_lto.o
[.bss.block.stack] None 0x341FE000 8 192 8 [ Linker created ]

"<#17> at line 132, col 45": place in [0x34180400 to 0x341FFFFF] with auto order

Symbol or [section] name Type Address Size Align Object File
[.bss.block.heap] None 0x341822A0 8 [ Linker created ]

MODULE SUMMARY

Memory use by input file

Object File RX Code RO Data RW Data ZI Data
blto2_FSBL_lto.o 6 378 76 4 5
SEGGER_THUMB_Startup.o 20
stm32n657xx_Vectors.o 1 216
STM32N6xx_Startup.o 44
Subtotal (4 objects) 7 658 76 4 5
SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a 74
strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a 104
Subtotal (2archives) 178
Linker created (shared data, fills, blocks): 40 8 192
Total: 7 836 116 4 8 197

Memory use by archive member

Archive member RX Code RO Data RW Data ZI Data
SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) 74
strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) 104
Subtotal (2 members from 2 archives) 178
Objects (4 files) 7 658 76 4 5
Linker created (shared data, fills, blocks): 40 8 192
Total: 7 836 116 4 8 197

Memory use by linker

Description RX Code RO Data RW Data ZI Data
Initialization table 40
Memory for block 'stack' 8 192
Subtotal (linker created): 40 8 192
Objects (4 files) 7 658 76 4 5
Archives (2 files) 178
Total: 7 836 116 4 8 197

MODULE DETAIL

Module blto2_FSBL_lto.o

Symbol or [section] name Code RO Data RW Data ZI Data
HAL_RCC_OscConfig 1 714
HAL_RCC_ClockConfig 1 472
main 1 184
RCC_PLL_Config 446
HAL_GPIO_Init 418
SystemCoreClockUpdate 400
SystemInit 302
RCC_IC_CheckPLLSources 148
RCC_PLL_IsNewConfig 134
RCCEx_GetPLLSourceFreq 128
SysTick_Handler 16
NMI_Handler 2
HardFault_Handler 2
MemManage_Handler 2
BusFault_Handler 2
UsageFault_Handler 2
SVC_Handler 2
DebugMon_Handler 2
PendSV_Handler 2
[.rodata..Lswitch.table.HAL_GPIO_DeInit] 64
[.rodata..Lswitch.table.RCC_PLL_Config] 12
SystemCoreClock 4
uwTick 4
uwTickPrio 1
Total: 6 378 76 4 5

Module SEGGER_THUMB_Startup.o

Symbol or [section] name Code RO Data RW Data ZI Data
_start 20
Total: 20

Module stm32n657xx_Vectors.o

Symbol or [section] name Code RO Data RW Data ZI Data
_vectors 844
PVD_PVM_IRQHandler 2
DTS_IRQHandler 2
RCC_IRQHandler 2
LOCKUP_IRQHandler 2
CACHE_ECC_IRQHandler 2
TCM_ECC_IRQHandler 2
BCK_ECC_IRQHandler 2
FPU_IRQHandler 2
RTC_S_IRQHandler 2
TAMP_IRQHandler 2
RIFSC_TAMPER_IRQHandler 2
IAC_IRQHandler 2
RCC_S_IRQHandler 2
RTC_IRQHandler 2
IWDG_IRQHandler 2
WWDG_IRQHandler 2
EXTI0_IRQHandler 2
EXTI1_IRQHandler 2
EXTI2_IRQHandler 2
EXTI3_IRQHandler 2
EXTI4_IRQHandler 2
EXTI5_IRQHandler 2
EXTI6_IRQHandler 2
EXTI7_IRQHandler 2
EXTI8_IRQHandler 2
EXTI9_IRQHandler 2
EXTI10_IRQHandler 2
EXTI11_IRQHandler 2
EXTI12_IRQHandler 2
EXTI13_IRQHandler 2
EXTI14_IRQHandler 2
EXTI15_IRQHandler 2
SAES_IRQHandler 2
CRYP_IRQHandler 2
PKA_IRQHandler 2
HASH_IRQHandler 2
RNG_IRQHandler 2
MCE1_IRQHandler 2
MCE2_IRQHandler 2
MCE3_IRQHandler 2
MCE4_IRQHandler 2
ADC1_2_IRQHandler 2
CSI_IRQHandler 2
DCMIPP_IRQHandler 2
PAHB_ERR_IRQHandler 2
NPU0_IRQHandler 2
NPU1_IRQHandler 2
NPU2_IRQHandler 2
NPU3_IRQHandler 2
CACHEAXI_IRQHandler 2
LTDC_LO_IRQHandler 2
LTDC_LO_ERR_IRQHandler 2
DMA2D_IRQHandler 2
JPEG_IRQHandler 2
VENC_IRQHandler 2
GFXMMU_IRQHandler 2
GFXTIM_IRQHandler 2
GPU2D_IRQHandler 2
GPU2D_ER_IRQHandler 2
ICACHE_IRQHandler 2
HPDMA1_Channel0_IRQHandler 2
HPDMA1_Channel1_IRQHandler 2
HPDMA1_Channel2_IRQHandler 2
HPDMA1_Channel3_IRQHandler 2
HPDMA1_Channel4_IRQHandler 2
HPDMA1_Channel5_IRQHandler 2
HPDMA1_Channel6_IRQHandler 2
HPDMA1_Channel7_IRQHandler 2
HPDMA1_Channel8_IRQHandler 2
HPDMA1_Channel9_IRQHandler 2
HPDMA1_Channel10_IRQHandler 2
HPDMA1_Channel11_IRQHandler 2
HPDMA1_Channel12_IRQHandler 2
HPDMA1_Channel13_IRQHandler 2
HPDMA1_Channel14_IRQHandler 2
HPDMA1_Channel15_IRQHandler 2
GPDMA1_Channel0_IRQHandler 2
GPDMA1_Channel1_IRQHandler 2
GPDMA1_Channel2_IRQHandler 2
GPDMA1_Channel3_IRQHandler 2
GPDMA1_Channel4_IRQHandler 2
GPDMA1_Channel5_IRQHandler 2
GPDMA1_Channel6_IRQHandler 2
GPDMA1_Channel7_IRQHandler 2
GPDMA1_Channel8_IRQHandler 2
GPDMA1_Channel9_IRQHandler 2
GPDMA1_Channel10_IRQHandler 2
GPDMA1_Channel11_IRQHandler 2
GPDMA1_Channel12_IRQHandler 2
GPDMA1_Channel13_IRQHandler 2
GPDMA1_Channel14_IRQHandler 2
GPDMA1_Channel15_IRQHandler 2
I2C1_EV_IRQHandler 2
I2C1_ER_IRQHandler 2
I2C2_EV_IRQHandler 2
I2C2_ER_IRQHandler 2
I2C3_EV_IRQHandler 2
I2C3_ER_IRQHandler 2
I2C4_EV_IRQHandler 2
I2C4_ER_IRQHandler 2
I3C1_EV_IRQHandler 2
I3C1_ER_IRQHandler 2
I3C2_EV_IRQHandler 2
I3C2_ER_IRQHandler 2
TIM1_BRK_IRQHandler 2
TIM1_UP_IRQHandler 2
TIM1_TRG_CCU_IRQHandler 2
TIM1_CC_IRQHandler 2
TIM2_IRQHandler 2
TIM3_IRQHandler 2
TIM4_IRQHandler 2
TIM5_IRQHandler 2
TIM6_IRQHandler 2
TIM7_IRQHandler 2
TIM8_BRK_IRQHandler 2
TIM8_UP_IRQHandler 2
TIM8_TRG_CCU_IRQHandler 2
TIM8_CC_IRQHandler 2
TIM9_IRQHandler 2
TIM10_IRQHandler 2
TIM11_IRQHandler 2
TIM12_IRQHandler 2
TIM13_IRQHandler 2
TIM14_IRQHandler 2
TIM15_IRQHandler 2
TIM16_IRQHandler 2
TIM17_IRQHandler 2
TIM18_IRQHandler 2
LPTIM1_IRQHandler 2
LPTIM2_IRQHandler 2
LPTIM3_IRQHandler 2
LPTIM4_IRQHandler 2
LPTIM5_IRQHandler 2
ADF1_FLT0_IRQHandler 2
MDF1_FLT0_IRQHandler 2
MDF1_FLT1_IRQHandler 2
MDF1_FLT2_IRQHandler 2
MDF1_FLT3_IRQHandler 2
MDF1_FLT4_IRQHandler 2
MDF1_FLT5_IRQHandler 2
SAI1_A_IRQHandler 2
SAI1_B_IRQHandler 2
SAI2_A_IRQHandler 2
SAI2_B_IRQHandler 2
SPDIFRX_IRQHandler 2
SPI1_IRQHandler 2
SPI2_IRQHandler 2
SPI3_IRQHandler 2
SPI4_IRQHandler 2
SPI5_IRQHandler 2
SPI6_IRQHandler 2
USART1_IRQHandler 2
USART2_IRQHandler 2
USART3_IRQHandler 2
UART4_IRQHandler 2
UART5_IRQHandler 2
USART6_IRQHandler 2
UART7_IRQHandler 2
UART8_IRQHandler 2
UART9_IRQHandler 2
USART10_IRQHandler 2
LPUART1_IRQHandler 2
XSPI1_IRQHandler 2
XSPI2_IRQHandler 2
XSPI3_IRQHandler 2
FMC_IRQHandler 2
SDMMC1_IRQHandler 2
SDMMC2_IRQHandler 2
UCPD1_IRQHandler 2
USB1_OTG_HS_IRQHandler 2
USB2_OTG_HS_IRQHandler 2
ETH1_IRQHandler 2
FDCAN1_IT0_IRQHandler 2
FDCAN1_IT1_IRQHandler 2
FDCAN2_IT0_IRQHandler 2
FDCAN2_IT1_IRQHandler 2
FDCAN3_IT0_IRQHandler 2
FDCAN3_IT1_IRQHandler 2
FDCAN_CU_IRQHandler 2
MDIOS_IRQHandler 2
DCMI_PSSI_IRQHandler 2
WAKEUP_PIN_IRQHandler 2
CTI_INT0_IRQHandler 2
CTI_INT1_IRQHandler 2
LTDC_UP_IRQHandler 2
LTDC_UP_ERR_IRQHandler 2
Total: 1 216

Module STM32N6xx_Startup.o

Symbol or [section] name Code RO Data RW Data ZI Data
reset_handler 44
Total: 44

Module SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)

Symbol or [section] name Code RO Data RW Data ZI Data
__SEGGER_init_ctors 36
__SEGGER_init_copy 20
__SEGGER_init_zero 18
Total: 74

Module strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)

Symbol or [section] name Code RO Data RW Data ZI Data
__aeabi_memclr 104
Total: 104

All modules

Code RO Data RW Data ZI Data
Grand total: 7 836 76 4 5

SECTION DETAIL

Sections by address

Range Symbol or [section] Name Size Al Init Ac Object File
34180400-3418074B _vectors 844 1024 Code RX stm32n657xx_Vectors.o
3418074C-34180BEB main 1 184 4 Code RX blto2_FSBL_lto.o
34180BEC-34180BFB SysTick_Handler 16 4 Code RX blto2_FSBL_lto.o
34180BFC-34180D8B SystemCoreClockUpdate 400 4 Code RX blto2_FSBL_lto.o
34180D8C-3418134B HAL_RCC_ClockConfig 1 472 4 Code RX blto2_FSBL_lto.o
3418134C-341813DF RCC_IC_CheckPLLSources 148 4 Code RX blto2_FSBL_lto.o
341813E0-3418145F RCCEx_GetPLLSourceFreq 128 4 Code RX blto2_FSBL_lto.o
34181460-3418149F [.rodata..Lswitch.table.HAL_GPIO_DeInit] 64 4 Cnst RO blto2_FSBL_lto.o
341814A0-341814AB [.rodata..Lswitch.table.RCC_PLL_Config] 12 4 Cnst RO blto2_FSBL_lto.o
341814AC-341814BF _start 20 4 Code RX SEGGER_THUMB_Startup.o
341814C0-341814EB reset_handler 44 4 Code RX STM32N6xx_Startup.o
341814EC-34181553 __aeabi_memclr 104 4 Code RX strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34181554-34181555 NMI_Handler 2 4 Code RX blto2_FSBL_lto.o
34181556-34181557 PVD_PVM_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34181558-34181559 HardFault_Handler 2 4 Code RX blto2_FSBL_lto.o
3418155A-3418155B DTS_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418155C-3418155D MemManage_Handler 2 4 Code RX blto2_FSBL_lto.o
3418155E-3418155F RCC_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34181560-34181561 BusFault_Handler 2 4 Code RX blto2_FSBL_lto.o
34181562-34181563 LOCKUP_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34181564-34181565 UsageFault_Handler 2 4 Code RX blto2_FSBL_lto.o
34181566-34181567 CACHE_ECC_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34181568-34181569 SVC_Handler 2 4 Code RX blto2_FSBL_lto.o
3418156A-3418156B TCM_ECC_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418156C-3418156D DebugMon_Handler 2 4 Code RX blto2_FSBL_lto.o
3418156E-3418156F BCK_ECC_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34181570-34181571 PendSV_Handler 2 4 Code RX blto2_FSBL_lto.o
34181572-34181573 FPU_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34181574-341816A1 SystemInit 302 4 Code RX blto2_FSBL_lto.o
341816A2-341816A3 RTC_S_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341816A4-34181845 HAL_GPIO_Init 418 4 Code RX blto2_FSBL_lto.o
34181846-34181847 TAMP_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34181848-34181EF9 HAL_RCC_OscConfig 1 714 4 Code RX blto2_FSBL_lto.o
34181EFA-34181EFB RIFSC_TAMPER_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34181EFC-34181F81 RCC_PLL_IsNewConfig 134 4 Code RX blto2_FSBL_lto.o
34181F82-34181F83 IAC_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34181F84-34182141 RCC_PLL_Config 446 4 Code RX blto2_FSBL_lto.o
34182142-34182143 RCC_S_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182144-34182145 RTC_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182146-34182147 IWDG_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182148-34182149 WWDG_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418214A-3418214B EXTI0_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418214C-3418214D EXTI1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418214E-3418214F EXTI2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182150-34182151 EXTI3_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182152-34182153 EXTI4_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182154-34182155 EXTI5_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182156-34182157 EXTI6_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182158-34182159 EXTI7_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418215A-3418215B EXTI8_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418215C-3418215D EXTI9_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418215E-3418215F EXTI10_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182160-34182161 EXTI11_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182162-34182163 EXTI12_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182164-34182165 EXTI13_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182166-34182167 EXTI14_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182168-34182169 EXTI15_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418216A-3418216B SAES_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418216C-3418216D CRYP_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418216E-3418216F PKA_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182170-34182171 HASH_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182172-34182173 RNG_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182174-34182175 MCE1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182176-34182177 MCE2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182178-34182179 MCE3_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418217A-3418217B MCE4_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418217C-3418217D ADC1_2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418217E-3418217F CSI_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182180-34182181 DCMIPP_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182182-34182183 PAHB_ERR_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182184-34182185 NPU0_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182186-34182187 NPU1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182188-34182189 NPU2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418218A-3418218B NPU3_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418218C-3418218D CACHEAXI_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418218E-3418218F LTDC_LO_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182190-34182191 LTDC_LO_ERR_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182192-34182193 DMA2D_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182194-34182195 JPEG_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182196-34182197 VENC_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182198-34182199 GFXMMU_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418219A-3418219B GFXTIM_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418219C-3418219D GPU2D_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418219E-3418219F GPU2D_ER_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341821A0-341821A1 ICACHE_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341821A2-341821A3 HPDMA1_Channel0_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341821A4-341821A5 HPDMA1_Channel1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341821A6-341821A7 HPDMA1_Channel2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341821A8-341821A9 HPDMA1_Channel3_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341821AA-341821AB HPDMA1_Channel4_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341821AC-341821AD HPDMA1_Channel5_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341821AE-341821AF HPDMA1_Channel6_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341821B0-341821B1 HPDMA1_Channel7_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341821B2-341821B3 HPDMA1_Channel8_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341821B4-341821B5 HPDMA1_Channel9_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341821B6-341821B7 HPDMA1_Channel10_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341821B8-341821B9 HPDMA1_Channel11_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341821BA-341821BB HPDMA1_Channel12_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341821BC-341821BD HPDMA1_Channel13_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341821BE-341821BF HPDMA1_Channel14_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341821C0-341821C1 HPDMA1_Channel15_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341821C2-341821C3 GPDMA1_Channel0_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341821C4-341821C5 GPDMA1_Channel1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341821C6-341821C7 GPDMA1_Channel2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341821C8-341821C9 GPDMA1_Channel3_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341821CA-341821CB GPDMA1_Channel4_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341821CC-341821CD GPDMA1_Channel5_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341821CE-341821CF GPDMA1_Channel6_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341821D0-341821D1 GPDMA1_Channel7_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341821D2-341821D3 GPDMA1_Channel8_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341821D4-341821D5 GPDMA1_Channel9_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341821D6-341821D7 GPDMA1_Channel10_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341821D8-341821D9 GPDMA1_Channel11_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341821DA-341821DB GPDMA1_Channel12_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341821DC-341821DD GPDMA1_Channel13_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341821DE-341821DF GPDMA1_Channel14_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341821E0-341821E1 GPDMA1_Channel15_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341821E2-341821E3 I2C1_EV_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341821E4-341821E5 I2C1_ER_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341821E6-341821E7 I2C2_EV_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341821E8-341821E9 I2C2_ER_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341821EA-341821EB I2C3_EV_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341821EC-341821ED I2C3_ER_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341821EE-341821EF I2C4_EV_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341821F0-341821F1 I2C4_ER_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341821F2-341821F3 I3C1_EV_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341821F4-341821F5 I3C1_ER_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341821F6-341821F7 I3C2_EV_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341821F8-341821F9 I3C2_ER_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341821FA-341821FB TIM1_BRK_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341821FC-341821FD TIM1_UP_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341821FE-341821FF TIM1_TRG_CCU_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182200-34182201 TIM1_CC_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182202-34182203 TIM2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182204-34182205 TIM3_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182206-34182207 TIM4_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182208-34182209 TIM5_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418220A-3418220B TIM6_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418220C-3418220D TIM7_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418220E-3418220F TIM8_BRK_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182210-34182211 TIM8_UP_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182212-34182213 TIM8_TRG_CCU_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182214-34182215 TIM8_CC_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182216-34182217 TIM9_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182218-34182219 TIM10_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418221A-3418221B TIM11_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418221C-3418221D TIM12_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418221E-3418221F TIM13_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182220-34182221 TIM14_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182222-34182223 TIM15_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182224-34182225 TIM16_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182226-34182227 TIM17_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182228-34182229 TIM18_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418222A-3418222B LPTIM1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418222C-3418222D LPTIM2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418222E-3418222F LPTIM3_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182230-34182231 LPTIM4_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182232-34182233 LPTIM5_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182234-34182235 ADF1_FLT0_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182236-34182237 MDF1_FLT0_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182238-34182239 MDF1_FLT1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418223A-3418223B MDF1_FLT2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418223C-3418223D MDF1_FLT3_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418223E-3418223F MDF1_FLT4_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182240-34182241 MDF1_FLT5_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182242-34182243 SAI1_A_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182244-34182245 SAI1_B_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182246-34182247 SAI2_A_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182248-34182249 SAI2_B_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418224A-3418224B SPDIFRX_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418224C-3418224D SPI1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418224E-3418224F SPI2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182250-34182251 SPI3_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182252-34182253 SPI4_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182254-34182255 SPI5_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182256-34182257 SPI6_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182258-34182259 USART1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418225A-3418225B USART2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418225C-3418225D USART3_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418225E-3418225F UART4_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182260-34182261 UART5_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182262-34182263 USART6_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182264-34182265 UART7_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182266-34182267 UART8_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182268-34182269 UART9_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418226A-3418226B USART10_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418226C-3418226D LPUART1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418226E-3418226F XSPI1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182270-34182271 XSPI2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182272-34182273 XSPI3_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182274-34182275 FMC_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182276-34182277 SDMMC1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182278-34182279 SDMMC2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418227A-3418227B UCPD1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418227C-3418227D USB1_OTG_HS_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418227E-3418227F USB2_OTG_HS_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182280-34182281 ETH1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182282-34182283 FDCAN1_IT0_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182284-34182285 FDCAN1_IT1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182286-34182287 FDCAN2_IT0_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182288-34182289 FDCAN2_IT1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418228A-3418228B FDCAN3_IT0_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418228C-3418228D FDCAN3_IT1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418228E-3418228F FDCAN_CU_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182290-34182291 MDIOS_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182292-34182293 DCMI_PSSI_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182294-34182295 WAKEUP_PIN_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182296-34182297 CTI_INT0_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182298-34182299 CTI_INT1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418229A-3418229B LTDC_UP_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418229C-3418229D LTDC_UP_ERR_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418229E-3418229F ( UNUSED .=.+2 ) 2 - ---- - -
341822A0-341822A3 [.init_array] 4 4 ---- -- STM32N6xx_Startup.o
341822A4-341822A7 uwTick 4 4 Zero ZI blto2_FSBL_lto.o
341822A8-341822A8 uwTickPrio 1 4 Zero ZI blto2_FSBL_lto.o
341822A9-341822AB ( ALIGN .=.+3 ) 3 - ---- - -
341822AC-341822AF SystemCoreClock 4 4 Init RW blto2_FSBL_lto.o
341822B0-341822D3 __SEGGER_init_ctors 36 4 Code RX SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
341822D4-341822F7 __SEGGER_init_table__ 36 4 Cnst RO [ Linker created ]
341822F8-341822FB __SEGGER_init_data__ 4 4 Cnst RO [ Linker created ]
341822FC-3418230D __SEGGER_init_zero 18 2 Code RX SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
3418230E-34182321 __SEGGER_init_copy 20 2 Code RX SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34182322-341FDFFF ( UNUSED .=.+507102 ) 507 102 - ---- - -
341FE000-341FFFFF [.bss.block.stack] 8 192 8 None ZI [ Linker created ]

UNUSED MEMORY SUMMARY

Detail

Range Size Reason
3418229E-3418229F 2 Unused memory between sections '.init.LTDC_UP_ERR_IRQHandler' and '.init_array'
341822A9-341822AB 3 Filler between sections '.bss.uwTickPrio' and '.data.SystemCoreClock' as align=4
NOTE: section '.bss.uwTickPrio' has size 1 that is not a multiple of its alignment 4
34182322-341FDFFF 507 102 Unused memory between sections '.segger.init.__SEGGER_init_copy' and '.bss.block.stack'

INITIALIZATION TABLE

Constructor list

Table
Address
Called
Address
Called
Symbol or [section] name
0x341822A0 0x34180BFD SystemCoreClockUpdate

Initialize by zero

Initialize by copy with packing=none

Range Size Symbol or [section] name
341822A4-341822A7 4 uwTick
341822A8-341822A8 1 uwTickPrio
341822A4-341822A8 5 Total (2 sections)

Summary

Range Size Symbol or [section] name
341822AC-341822AF 4 SystemCoreClock
341822AC-341822AF 4 Total (1 sections)
Description Size
Initialization table 36 bytes
Source image 4 bytes
Destination image 9 bytes
Saving -31 bytes

LINKER-CREATED VENEERS

Arm-Arm range extension veneers

Veneer Size Target Source
0 Total

Thumb-Thumb range extension veneers

Veneer Size Target Source
0 Total

Arm-Thumb mode switch veneers

Veneer Size Target Source
0 Total

Thumb-Arm mode switch veneers

Veneer Size Target Source
0 Total

Summary

Veneer Type Size
Thumb-Arm mode switch 0
Arm-Thumb mode switch 0
Thumb-Thumb range extension 0
Arm-Arm range extension 0
Total: 0

SYMBOL LIST

Function symbols by name

Symbol name Address Size Align Type Bd Object File
ADC1_2_IRQHandler 0x3418217D 2 Code Wk stm32n657xx_Vectors.o
ADF1_FLT0_IRQHandler 0x34182235 2 Code Wk stm32n657xx_Vectors.o
BCK_ECC_IRQHandler 0x3418156F 2 Code Wk stm32n657xx_Vectors.o
BusFault_Handler 0x34181561 2 4 Code Gb blto2_FSBL_lto.o
CACHEAXI_IRQHandler 0x3418218D 2 Code Wk stm32n657xx_Vectors.o
CACHE_ECC_IRQHandler 0x34181567 2 Code Wk stm32n657xx_Vectors.o
CRYP_IRQHandler 0x3418216D 2 Code Wk stm32n657xx_Vectors.o
CSI_IRQHandler 0x3418217F 2 Code Wk stm32n657xx_Vectors.o
CTI_INT0_IRQHandler 0x34182297 2 Code Wk stm32n657xx_Vectors.o
CTI_INT1_IRQHandler 0x34182299 2 Code Wk stm32n657xx_Vectors.o
DCMIPP_IRQHandler 0x34182181 2 Code Wk stm32n657xx_Vectors.o
DCMI_PSSI_IRQHandler 0x34182293 2 Code Wk stm32n657xx_Vectors.o
DMA2D_IRQHandler 0x34182193 2 Code Wk stm32n657xx_Vectors.o
DTS_IRQHandler 0x3418155B 2 Code Wk stm32n657xx_Vectors.o
DebugMon_Handler 0x3418156D 2 4 Code Gb blto2_FSBL_lto.o
ETH1_IRQHandler 0x34182281 2 Code Wk stm32n657xx_Vectors.o
EXTI0_IRQHandler 0x3418214B 2 Code Wk stm32n657xx_Vectors.o
EXTI10_IRQHandler 0x3418215F 2 Code Wk stm32n657xx_Vectors.o
EXTI11_IRQHandler 0x34182161 2 Code Wk stm32n657xx_Vectors.o
EXTI12_IRQHandler 0x34182163 2 Code Wk stm32n657xx_Vectors.o
EXTI13_IRQHandler 0x34182165 2 Code Wk stm32n657xx_Vectors.o
EXTI14_IRQHandler 0x34182167 2 Code Wk stm32n657xx_Vectors.o
EXTI15_IRQHandler 0x34182169 2 Code Wk stm32n657xx_Vectors.o
EXTI1_IRQHandler 0x3418214D 2 Code Wk stm32n657xx_Vectors.o
EXTI2_IRQHandler 0x3418214F 2 Code Wk stm32n657xx_Vectors.o
EXTI3_IRQHandler 0x34182151 2 Code Wk stm32n657xx_Vectors.o
EXTI4_IRQHandler 0x34182153 2 Code Wk stm32n657xx_Vectors.o
EXTI5_IRQHandler 0x34182155 2 Code Wk stm32n657xx_Vectors.o
EXTI6_IRQHandler 0x34182157 2 Code Wk stm32n657xx_Vectors.o
EXTI7_IRQHandler 0x34182159 2 Code Wk stm32n657xx_Vectors.o
EXTI8_IRQHandler 0x3418215B 2 Code Wk stm32n657xx_Vectors.o
EXTI9_IRQHandler 0x3418215D 2 Code Wk stm32n657xx_Vectors.o
FDCAN1_IT0_IRQHandler 0x34182283 2 Code Wk stm32n657xx_Vectors.o
FDCAN1_IT1_IRQHandler 0x34182285 2 Code Wk stm32n657xx_Vectors.o
FDCAN2_IT0_IRQHandler 0x34182287 2 Code Wk stm32n657xx_Vectors.o
FDCAN2_IT1_IRQHandler 0x34182289 2 Code Wk stm32n657xx_Vectors.o
FDCAN3_IT0_IRQHandler 0x3418228B 2 Code Wk stm32n657xx_Vectors.o
FDCAN3_IT1_IRQHandler 0x3418228D 2 Code Wk stm32n657xx_Vectors.o
FDCAN_CU_IRQHandler 0x3418228F 2 Code Wk stm32n657xx_Vectors.o
FMC_IRQHandler 0x34182275 2 Code Wk stm32n657xx_Vectors.o
FPU_IRQHandler 0x34181573 2 Code Wk stm32n657xx_Vectors.o
GFXMMU_IRQHandler 0x34182199 2 Code Wk stm32n657xx_Vectors.o
GFXTIM_IRQHandler 0x3418219B 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel0_IRQHandler 0x341821C3 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel10_IRQHandler 0x341821D7 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel11_IRQHandler 0x341821D9 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel12_IRQHandler 0x341821DB 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel13_IRQHandler 0x341821DD 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel14_IRQHandler 0x341821DF 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel15_IRQHandler 0x341821E1 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel1_IRQHandler 0x341821C5 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel2_IRQHandler 0x341821C7 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel3_IRQHandler 0x341821C9 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel4_IRQHandler 0x341821CB 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel5_IRQHandler 0x341821CD 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel6_IRQHandler 0x341821CF 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel7_IRQHandler 0x341821D1 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel8_IRQHandler 0x341821D3 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel9_IRQHandler 0x341821D5 2 Code Wk stm32n657xx_Vectors.o
GPU2D_ER_IRQHandler 0x3418219F 2 Code Wk stm32n657xx_Vectors.o
GPU2D_IRQHandler 0x3418219D 2 Code Wk stm32n657xx_Vectors.o
HAL_GPIO_Init 0x341816A5 418 4 Code Lc blto2_FSBL_lto.o
HAL_RCC_ClockConfig 0x34180D8D 1 472 4 Code Lc blto2_FSBL_lto.o
HAL_RCC_OscConfig 0x34181849 1 714 4 Code Lc blto2_FSBL_lto.o
HASH_IRQHandler 0x34182171 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel0_IRQHandler 0x341821A3 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel10_IRQHandler 0x341821B7 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel11_IRQHandler 0x341821B9 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel12_IRQHandler 0x341821BB 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel13_IRQHandler 0x341821BD 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel14_IRQHandler 0x341821BF 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel15_IRQHandler 0x341821C1 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel1_IRQHandler 0x341821A5 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel2_IRQHandler 0x341821A7 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel3_IRQHandler 0x341821A9 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel4_IRQHandler 0x341821AB 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel5_IRQHandler 0x341821AD 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel6_IRQHandler 0x341821AF 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel7_IRQHandler 0x341821B1 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel8_IRQHandler 0x341821B3 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel9_IRQHandler 0x341821B5 2 Code Wk stm32n657xx_Vectors.o
HardFault_Handler 0x34181559 2 4 Code Gb blto2_FSBL_lto.o
I2C1_ER_IRQHandler 0x341821E5 2 Code Wk stm32n657xx_Vectors.o
I2C1_EV_IRQHandler 0x341821E3 2 Code Wk stm32n657xx_Vectors.o
I2C2_ER_IRQHandler 0x341821E9 2 Code Wk stm32n657xx_Vectors.o
I2C2_EV_IRQHandler 0x341821E7 2 Code Wk stm32n657xx_Vectors.o
I2C3_ER_IRQHandler 0x341821ED 2 Code Wk stm32n657xx_Vectors.o
I2C3_EV_IRQHandler 0x341821EB 2 Code Wk stm32n657xx_Vectors.o
I2C4_ER_IRQHandler 0x341821F1 2 Code Wk stm32n657xx_Vectors.o
I2C4_EV_IRQHandler 0x341821EF 2 Code Wk stm32n657xx_Vectors.o
I3C1_ER_IRQHandler 0x341821F5 2 Code Wk stm32n657xx_Vectors.o
I3C1_EV_IRQHandler 0x341821F3 2 Code Wk stm32n657xx_Vectors.o
I3C2_ER_IRQHandler 0x341821F9 2 Code Wk stm32n657xx_Vectors.o
I3C2_EV_IRQHandler 0x341821F7 2 Code Wk stm32n657xx_Vectors.o
IAC_IRQHandler 0x34181F83 2 Code Wk stm32n657xx_Vectors.o
ICACHE_IRQHandler 0x341821A1 2 Code Wk stm32n657xx_Vectors.o
IWDG_IRQHandler 0x34182147 2 Code Wk stm32n657xx_Vectors.o
JPEG_IRQHandler 0x34182195 2 Code Wk stm32n657xx_Vectors.o
LOCKUP_IRQHandler 0x34181563 2 Code Wk stm32n657xx_Vectors.o
LPTIM1_IRQHandler 0x3418222B 2 Code Wk stm32n657xx_Vectors.o
LPTIM2_IRQHandler 0x3418222D 2 Code Wk stm32n657xx_Vectors.o
LPTIM3_IRQHandler 0x3418222F 2 Code Wk stm32n657xx_Vectors.o
LPTIM4_IRQHandler 0x34182231 2 Code Wk stm32n657xx_Vectors.o
LPTIM5_IRQHandler 0x34182233 2 Code Wk stm32n657xx_Vectors.o
LPUART1_IRQHandler 0x3418226D 2 Code Wk stm32n657xx_Vectors.o
LTDC_LO_ERR_IRQHandler 0x34182191 2 Code Wk stm32n657xx_Vectors.o
LTDC_LO_IRQHandler 0x3418218F 2 Code Wk stm32n657xx_Vectors.o
LTDC_UP_ERR_IRQHandler 0x3418229D 2 Code Wk stm32n657xx_Vectors.o
LTDC_UP_IRQHandler 0x3418229B 2 Code Wk stm32n657xx_Vectors.o
MCE1_IRQHandler 0x34182175 2 Code Wk stm32n657xx_Vectors.o
MCE2_IRQHandler 0x34182177 2 Code Wk stm32n657xx_Vectors.o
MCE3_IRQHandler 0x34182179 2 Code Wk stm32n657xx_Vectors.o
MCE4_IRQHandler 0x3418217B 2 Code Wk stm32n657xx_Vectors.o
MDF1_FLT0_IRQHandler 0x34182237 2 Code Wk stm32n657xx_Vectors.o
MDF1_FLT1_IRQHandler 0x34182239 2 Code Wk stm32n657xx_Vectors.o
MDF1_FLT2_IRQHandler 0x3418223B 2 Code Wk stm32n657xx_Vectors.o
MDF1_FLT3_IRQHandler 0x3418223D 2 Code Wk stm32n657xx_Vectors.o
MDF1_FLT4_IRQHandler 0x3418223F 2 Code Wk stm32n657xx_Vectors.o
MDF1_FLT5_IRQHandler 0x34182241 2 Code Wk stm32n657xx_Vectors.o
MDIOS_IRQHandler 0x34182291 2 Code Wk stm32n657xx_Vectors.o
MemManage_Handler 0x3418155D 2 4 Code Gb blto2_FSBL_lto.o
NMI_Handler 0x34181555 2 4 Code Gb blto2_FSBL_lto.o
NPU0_IRQHandler 0x34182185 2 Code Wk stm32n657xx_Vectors.o
NPU1_IRQHandler 0x34182187 2 Code Wk stm32n657xx_Vectors.o
NPU2_IRQHandler 0x34182189 2 Code Wk stm32n657xx_Vectors.o
NPU3_IRQHandler 0x3418218B 2 Code Wk stm32n657xx_Vectors.o
PAHB_ERR_IRQHandler 0x34182183 2 Code Wk stm32n657xx_Vectors.o
PKA_IRQHandler 0x3418216F 2 Code Wk stm32n657xx_Vectors.o
PVD_PVM_IRQHandler 0x34181557 2 Code Wk stm32n657xx_Vectors.o
PendSV_Handler 0x34181571 2 4 Code Gb blto2_FSBL_lto.o
RCCEx_GetPLLSourceFreq 0x341813E1 128 4 Code Lc blto2_FSBL_lto.o
RCC_IC_CheckPLLSources 0x3418134D 148 4 Code Lc blto2_FSBL_lto.o
RCC_IRQHandler 0x3418155F 2 Code Wk stm32n657xx_Vectors.o
RCC_PLL_Config 0x34181F85 446 4 Code Lc blto2_FSBL_lto.o
RCC_PLL_IsNewConfig 0x34181EFD 134 4 Code Lc blto2_FSBL_lto.o
RCC_S_IRQHandler 0x34182143 2 Code Wk stm32n657xx_Vectors.o
RIFSC_TAMPER_IRQHandler 0x34181EFB 2 Code Wk stm32n657xx_Vectors.o
RNG_IRQHandler 0x34182173 2 Code Wk stm32n657xx_Vectors.o
RTC_IRQHandler 0x34182145 2 Code Wk stm32n657xx_Vectors.o
RTC_S_IRQHandler 0x341816A3 2 Code Wk stm32n657xx_Vectors.o
Reset_Handler 0x341814C1 4 Code Gb STM32N6xx_Startup.o
SAES_IRQHandler 0x3418216B 2 Code Wk stm32n657xx_Vectors.o
SAI1_A_IRQHandler 0x34182243 2 Code Wk stm32n657xx_Vectors.o
SAI1_B_IRQHandler 0x34182245 2 Code Wk stm32n657xx_Vectors.o
SAI2_A_IRQHandler 0x34182247 2 Code Wk stm32n657xx_Vectors.o
SAI2_B_IRQHandler 0x34182249 2 Code Wk stm32n657xx_Vectors.o
SDMMC1_IRQHandler 0x34182277 2 Code Wk stm32n657xx_Vectors.o
SDMMC2_IRQHandler 0x34182279 2 Code Wk stm32n657xx_Vectors.o
SPDIFRX_IRQHandler 0x3418224B 2 Code Wk stm32n657xx_Vectors.o
SPI1_IRQHandler 0x3418224D 2 Code Wk stm32n657xx_Vectors.o
SPI2_IRQHandler 0x3418224F 2 Code Wk stm32n657xx_Vectors.o
SPI3_IRQHandler 0x34182251 2 Code Wk stm32n657xx_Vectors.o
SPI4_IRQHandler 0x34182253 2 Code Wk stm32n657xx_Vectors.o
SPI5_IRQHandler 0x34182255 2 Code Wk stm32n657xx_Vectors.o
SPI6_IRQHandler 0x34182257 2 Code Wk stm32n657xx_Vectors.o
SVC_Handler 0x34181569 2 4 Code Gb blto2_FSBL_lto.o
SysTick_Handler 0x34180BED 16 4 Code Gb blto2_FSBL_lto.o
SystemCoreClockUpdate 0x34180BFD 400 4 Code Gb blto2_FSBL_lto.o
SystemInit 0x34181575 302 4 Code Gb blto2_FSBL_lto.o
TAMP_IRQHandler 0x34181847 2 Code Wk stm32n657xx_Vectors.o
TCM_ECC_IRQHandler 0x3418156B 2 Code Wk stm32n657xx_Vectors.o
TIM10_IRQHandler 0x34182219 2 Code Wk stm32n657xx_Vectors.o
TIM11_IRQHandler 0x3418221B 2 Code Wk stm32n657xx_Vectors.o
TIM12_IRQHandler 0x3418221D 2 Code Wk stm32n657xx_Vectors.o
TIM13_IRQHandler 0x3418221F 2 Code Wk stm32n657xx_Vectors.o
TIM14_IRQHandler 0x34182221 2 Code Wk stm32n657xx_Vectors.o
TIM15_IRQHandler 0x34182223 2 Code Wk stm32n657xx_Vectors.o
TIM16_IRQHandler 0x34182225 2 Code Wk stm32n657xx_Vectors.o
TIM17_IRQHandler 0x34182227 2 Code Wk stm32n657xx_Vectors.o
TIM18_IRQHandler 0x34182229 2 Code Wk stm32n657xx_Vectors.o
TIM1_BRK_IRQHandler 0x341821FB 2 Code Wk stm32n657xx_Vectors.o
TIM1_CC_IRQHandler 0x34182201 2 Code Wk stm32n657xx_Vectors.o
TIM1_TRG_CCU_IRQHandler 0x341821FF 2 Code Wk stm32n657xx_Vectors.o
TIM1_UP_IRQHandler 0x341821FD 2 Code Wk stm32n657xx_Vectors.o
TIM2_IRQHandler 0x34182203 2 Code Wk stm32n657xx_Vectors.o
TIM3_IRQHandler 0x34182205 2 Code Wk stm32n657xx_Vectors.o
TIM4_IRQHandler 0x34182207 2 Code Wk stm32n657xx_Vectors.o
TIM5_IRQHandler 0x34182209 2 Code Wk stm32n657xx_Vectors.o
TIM6_IRQHandler 0x3418220B 2 Code Wk stm32n657xx_Vectors.o
TIM7_IRQHandler 0x3418220D 2 Code Wk stm32n657xx_Vectors.o
TIM8_BRK_IRQHandler 0x3418220F 2 Code Wk stm32n657xx_Vectors.o
TIM8_CC_IRQHandler 0x34182215 2 Code Wk stm32n657xx_Vectors.o
TIM8_TRG_CCU_IRQHandler 0x34182213 2 Code Wk stm32n657xx_Vectors.o
TIM8_UP_IRQHandler 0x34182211 2 Code Wk stm32n657xx_Vectors.o
TIM9_IRQHandler 0x34182217 2 Code Wk stm32n657xx_Vectors.o
UART4_IRQHandler 0x3418225F 2 Code Wk stm32n657xx_Vectors.o
UART5_IRQHandler 0x34182261 2 Code Wk stm32n657xx_Vectors.o
UART7_IRQHandler 0x34182265 2 Code Wk stm32n657xx_Vectors.o
UART8_IRQHandler 0x34182267 2 Code Wk stm32n657xx_Vectors.o
UART9_IRQHandler 0x34182269 2 Code Wk stm32n657xx_Vectors.o
UCPD1_IRQHandler 0x3418227B 2 Code Wk stm32n657xx_Vectors.o
USART10_IRQHandler 0x3418226B 2 Code Wk stm32n657xx_Vectors.o
USART1_IRQHandler 0x34182259 2 Code Wk stm32n657xx_Vectors.o
USART2_IRQHandler 0x3418225B 2 Code Wk stm32n657xx_Vectors.o
USART3_IRQHandler 0x3418225D 2 Code Wk stm32n657xx_Vectors.o
USART6_IRQHandler 0x34182263 2 Code Wk stm32n657xx_Vectors.o
USB1_OTG_HS_IRQHandler 0x3418227D 2 Code Wk stm32n657xx_Vectors.o
USB2_OTG_HS_IRQHandler 0x3418227F 2 Code Wk stm32n657xx_Vectors.o
UsageFault_Handler 0x34181565 2 4 Code Gb blto2_FSBL_lto.o
VENC_IRQHandler 0x34182197 2 Code Wk stm32n657xx_Vectors.o
WAKEUP_PIN_IRQHandler 0x34182295 2 Code Wk stm32n657xx_Vectors.o
WWDG_IRQHandler 0x34182149 2 Code Wk stm32n657xx_Vectors.o
XSPI1_IRQHandler 0x3418226F 2 Code Wk stm32n657xx_Vectors.o
XSPI2_IRQHandler 0x34182271 2 Code Wk stm32n657xx_Vectors.o
XSPI3_IRQHandler 0x34182273 2 Code Wk stm32n657xx_Vectors.o
__SEGGER_init_copy 0x3418230F 20 2 Code Wk SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_init_ctors 0x341822B1 26 4 Code Wk SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_init_done 0x341814B7 4 Code Gb SEGGER_THUMB_Startup.o
__SEGGER_init_zero 0x341822FD 18 2 Code Wk SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__aeabi_memclr 0x341814ED 104 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__aeabi_memclr4 0x341814ED 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__aeabi_memclr8 0x341814ED 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__aeabi_memset 0x341814EF 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__aeabi_memset4 0x341814EF 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__aeabi_memset8 0x341814EF 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__startup_complete 0x341814B7 4 Code Gb SEGGER_THUMB_Startup.o
_start 0x341814AD 14 4 Code Gb SEGGER_THUMB_Startup.o
exit 0x341814BB 2 4 Code Gb SEGGER_THUMB_Startup.o
main 0x3418074D 1 184 4 Code Gb blto2_FSBL_lto.o
memset 0x341814F5 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
reset_handler 0x341814C1 4 Code Gb STM32N6xx_Startup.o

Function symbols by address

Address Symbol name Size Align Type Bd Object File
0x3418074D main 1 184 4 Code Gb blto2_FSBL_lto.o
0x34180BED SysTick_Handler 16 4 Code Gb blto2_FSBL_lto.o
0x34180BFD SystemCoreClockUpdate 400 4 Code Gb blto2_FSBL_lto.o
0x34180D8D HAL_RCC_ClockConfig 1 472 4 Code Lc blto2_FSBL_lto.o
0x3418134D RCC_IC_CheckPLLSources 148 4 Code Lc blto2_FSBL_lto.o
0x341813E1 RCCEx_GetPLLSourceFreq 128 4 Code Lc blto2_FSBL_lto.o
0x341814AD _start 14 4 Code Gb SEGGER_THUMB_Startup.o
0x341814B7 __startup_complete 4 Code Gb SEGGER_THUMB_Startup.o
0x341814B7 __SEGGER_init_done 4 Code Gb SEGGER_THUMB_Startup.o
0x341814BB exit 2 4 Code Gb SEGGER_THUMB_Startup.o
0x341814C1 reset_handler 4 Code Gb STM32N6xx_Startup.o
0x341814C1 Reset_Handler 4 Code Gb STM32N6xx_Startup.o
0x341814ED __aeabi_memclr8 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x341814ED __aeabi_memclr4 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x341814ED __aeabi_memclr 104 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x341814EF __aeabi_memset8 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x341814EF __aeabi_memset4 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x341814EF __aeabi_memset 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x341814F5 memset 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34181555 NMI_Handler 2 4 Code Gb blto2_FSBL_lto.o
0x34181557 PVD_PVM_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34181559 HardFault_Handler 2 4 Code Gb blto2_FSBL_lto.o
0x3418155B DTS_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418155D MemManage_Handler 2 4 Code Gb blto2_FSBL_lto.o
0x3418155F RCC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34181561 BusFault_Handler 2 4 Code Gb blto2_FSBL_lto.o
0x34181563 LOCKUP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34181565 UsageFault_Handler 2 4 Code Gb blto2_FSBL_lto.o
0x34181567 CACHE_ECC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34181569 SVC_Handler 2 4 Code Gb blto2_FSBL_lto.o
0x3418156B TCM_ECC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418156D DebugMon_Handler 2 4 Code Gb blto2_FSBL_lto.o
0x3418156F BCK_ECC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34181571 PendSV_Handler 2 4 Code Gb blto2_FSBL_lto.o
0x34181573 FPU_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34181575 SystemInit 302 4 Code Gb blto2_FSBL_lto.o
0x341816A3 RTC_S_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341816A5 HAL_GPIO_Init 418 4 Code Lc blto2_FSBL_lto.o
0x34181847 TAMP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34181849 HAL_RCC_OscConfig 1 714 4 Code Lc blto2_FSBL_lto.o
0x34181EFB RIFSC_TAMPER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34181EFD RCC_PLL_IsNewConfig 134 4 Code Lc blto2_FSBL_lto.o
0x34181F83 IAC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34181F85 RCC_PLL_Config 446 4 Code Lc blto2_FSBL_lto.o
0x34182143 RCC_S_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182145 RTC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182147 IWDG_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182149 WWDG_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418214B EXTI0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418214D EXTI1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418214F EXTI2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182151 EXTI3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182153 EXTI4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182155 EXTI5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182157 EXTI6_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182159 EXTI7_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418215B EXTI8_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418215D EXTI9_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418215F EXTI10_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182161 EXTI11_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182163 EXTI12_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182165 EXTI13_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182167 EXTI14_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182169 EXTI15_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418216B SAES_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418216D CRYP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418216F PKA_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182171 HASH_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182173 RNG_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182175 MCE1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182177 MCE2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182179 MCE3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418217B MCE4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418217D ADC1_2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418217F CSI_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182181 DCMIPP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182183 PAHB_ERR_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182185 NPU0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182187 NPU1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182189 NPU2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418218B NPU3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418218D CACHEAXI_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418218F LTDC_LO_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182191 LTDC_LO_ERR_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182193 DMA2D_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182195 JPEG_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182197 VENC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182199 GFXMMU_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418219B GFXTIM_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418219D GPU2D_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418219F GPU2D_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341821A1 ICACHE_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341821A3 HPDMA1_Channel0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341821A5 HPDMA1_Channel1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341821A7 HPDMA1_Channel2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341821A9 HPDMA1_Channel3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341821AB HPDMA1_Channel4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341821AD HPDMA1_Channel5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341821AF HPDMA1_Channel6_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341821B1 HPDMA1_Channel7_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341821B3 HPDMA1_Channel8_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341821B5 HPDMA1_Channel9_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341821B7 HPDMA1_Channel10_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341821B9 HPDMA1_Channel11_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341821BB HPDMA1_Channel12_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341821BD HPDMA1_Channel13_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341821BF HPDMA1_Channel14_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341821C1 HPDMA1_Channel15_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341821C3 GPDMA1_Channel0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341821C5 GPDMA1_Channel1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341821C7 GPDMA1_Channel2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341821C9 GPDMA1_Channel3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341821CB GPDMA1_Channel4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341821CD GPDMA1_Channel5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341821CF GPDMA1_Channel6_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341821D1 GPDMA1_Channel7_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341821D3 GPDMA1_Channel8_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341821D5 GPDMA1_Channel9_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341821D7 GPDMA1_Channel10_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341821D9 GPDMA1_Channel11_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341821DB GPDMA1_Channel12_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341821DD GPDMA1_Channel13_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341821DF GPDMA1_Channel14_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341821E1 GPDMA1_Channel15_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341821E3 I2C1_EV_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341821E5 I2C1_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341821E7 I2C2_EV_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341821E9 I2C2_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341821EB I2C3_EV_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341821ED I2C3_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341821EF I2C4_EV_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341821F1 I2C4_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341821F3 I3C1_EV_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341821F5 I3C1_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341821F7 I3C2_EV_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341821F9 I3C2_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341821FB TIM1_BRK_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341821FD TIM1_UP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341821FF TIM1_TRG_CCU_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182201 TIM1_CC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182203 TIM2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182205 TIM3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182207 TIM4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182209 TIM5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418220B TIM6_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418220D TIM7_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418220F TIM8_BRK_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182211 TIM8_UP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182213 TIM8_TRG_CCU_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182215 TIM8_CC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182217 TIM9_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182219 TIM10_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418221B TIM11_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418221D TIM12_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418221F TIM13_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182221 TIM14_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182223 TIM15_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182225 TIM16_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182227 TIM17_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182229 TIM18_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418222B LPTIM1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418222D LPTIM2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418222F LPTIM3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182231 LPTIM4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182233 LPTIM5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182235 ADF1_FLT0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182237 MDF1_FLT0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182239 MDF1_FLT1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418223B MDF1_FLT2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418223D MDF1_FLT3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418223F MDF1_FLT4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182241 MDF1_FLT5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182243 SAI1_A_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182245 SAI1_B_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182247 SAI2_A_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182249 SAI2_B_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418224B SPDIFRX_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418224D SPI1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418224F SPI2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182251 SPI3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182253 SPI4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182255 SPI5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182257 SPI6_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182259 USART1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418225B USART2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418225D USART3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418225F UART4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182261 UART5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182263 USART6_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182265 UART7_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182267 UART8_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182269 UART9_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418226B USART10_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418226D LPUART1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418226F XSPI1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182271 XSPI2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182273 XSPI3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182275 FMC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182277 SDMMC1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182279 SDMMC2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418227B UCPD1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418227D USB1_OTG_HS_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418227F USB2_OTG_HS_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182281 ETH1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182283 FDCAN1_IT0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182285 FDCAN1_IT1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182287 FDCAN2_IT0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182289 FDCAN2_IT1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418228B FDCAN3_IT0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418228D FDCAN3_IT1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418228F FDCAN_CU_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182291 MDIOS_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182293 DCMI_PSSI_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182295 WAKEUP_PIN_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182297 CTI_INT0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182299 CTI_INT1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418229B LTDC_UP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418229D LTDC_UP_ERR_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341822B1 __SEGGER_init_ctors 26 4 Code Wk SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x341822FD __SEGGER_init_zero 18 2 Code Wk SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x3418230F __SEGGER_init_copy 20 2 Code Wk SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)

Function symbols by descending size

Symbol name Size Align Type Bd Object File
HAL_RCC_OscConfig 1 714 4 Code Lc blto2_FSBL_lto.o
HAL_RCC_ClockConfig 1 472 4 Code Lc blto2_FSBL_lto.o
main 1 184 4 Code Gb blto2_FSBL_lto.o
RCC_PLL_Config 446 4 Code Lc blto2_FSBL_lto.o
HAL_GPIO_Init 418 4 Code Lc blto2_FSBL_lto.o
SystemCoreClockUpdate 400 4 Code Gb blto2_FSBL_lto.o
SystemInit 302 4 Code Gb blto2_FSBL_lto.o
RCC_IC_CheckPLLSources 148 4 Code Lc blto2_FSBL_lto.o
RCC_PLL_IsNewConfig 134 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetPLLSourceFreq 128 4 Code Lc blto2_FSBL_lto.o
__aeabi_memclr 104 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_init_ctors 26 4 Code Wk SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_init_copy 20 2 Code Wk SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_init_zero 18 2 Code Wk SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
SysTick_Handler 16 4 Code Gb blto2_FSBL_lto.o
_start 14 4 Code Gb SEGGER_THUMB_Startup.o
BusFault_Handler 2 4 Code Gb blto2_FSBL_lto.o
DebugMon_Handler 2 4 Code Gb blto2_FSBL_lto.o
HardFault_Handler 2 4 Code Gb blto2_FSBL_lto.o
MemManage_Handler 2 4 Code Gb blto2_FSBL_lto.o
NMI_Handler 2 4 Code Gb blto2_FSBL_lto.o
PendSV_Handler 2 4 Code Gb blto2_FSBL_lto.o
SVC_Handler 2 4 Code Gb blto2_FSBL_lto.o
UsageFault_Handler 2 4 Code Gb blto2_FSBL_lto.o
exit 2 4 Code Gb SEGGER_THUMB_Startup.o
ADC1_2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
ADF1_FLT0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
BCK_ECC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
CACHEAXI_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
CACHE_ECC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
CRYP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
CSI_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
CTI_INT0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
CTI_INT1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
DCMIPP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
DCMI_PSSI_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
DMA2D_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
DTS_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
ETH1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI10_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI11_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI12_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI13_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI14_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI15_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI6_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI7_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI8_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI9_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
FDCAN1_IT0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
FDCAN1_IT1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
FDCAN2_IT0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
FDCAN2_IT1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
FDCAN3_IT0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
FDCAN3_IT1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
FDCAN_CU_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
FMC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
FPU_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GFXMMU_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GFXTIM_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel10_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel11_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel12_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel13_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel14_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel15_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel6_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel7_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel8_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel9_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPU2D_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPU2D_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HASH_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel10_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel11_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel12_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel13_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel14_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel15_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel6_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel7_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel8_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel9_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
I2C1_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
I2C1_EV_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
I2C2_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
I2C2_EV_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
I2C3_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
I2C3_EV_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
I2C4_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
I2C4_EV_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
I3C1_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
I3C1_EV_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
I3C2_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
I3C2_EV_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
IAC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
ICACHE_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
IWDG_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
JPEG_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
LOCKUP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
LPTIM1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
LPTIM2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
LPTIM3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
LPTIM4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
LPTIM5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
LPUART1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
LTDC_LO_ERR_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
LTDC_LO_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
LTDC_UP_ERR_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
LTDC_UP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
MCE1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
MCE2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
MCE3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
MCE4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
MDF1_FLT0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
MDF1_FLT1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
MDF1_FLT2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
MDF1_FLT3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
MDF1_FLT4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
MDF1_FLT5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
MDIOS_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
NPU0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
NPU1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
NPU2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
NPU3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
PAHB_ERR_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
PKA_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
PVD_PVM_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
RCC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
RCC_S_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
RIFSC_TAMPER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
RNG_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
RTC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
RTC_S_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
Reset_Handler 4 Code Gb STM32N6xx_Startup.o
SAES_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SAI1_A_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SAI1_B_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SAI2_A_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SAI2_B_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SDMMC1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SDMMC2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SPDIFRX_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SPI1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SPI2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SPI3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SPI4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SPI5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SPI6_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TAMP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TCM_ECC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM10_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM11_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM12_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM13_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM14_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM15_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM16_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM17_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM18_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM1_BRK_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM1_CC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM1_TRG_CCU_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM1_UP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM6_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM7_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM8_BRK_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM8_CC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM8_TRG_CCU_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM8_UP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM9_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
UART4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
UART5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
UART7_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
UART8_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
UART9_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
UCPD1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
USART10_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
USART1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
USART2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
USART3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
USART6_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
USB1_OTG_HS_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
USB2_OTG_HS_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
VENC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
WAKEUP_PIN_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
WWDG_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
XSPI1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
XSPI2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
XSPI3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
__SEGGER_init_done 4 Code Gb SEGGER_THUMB_Startup.o
__aeabi_memclr4 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__aeabi_memclr8 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__aeabi_memset 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__aeabi_memset4 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__aeabi_memset8 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__startup_complete 4 Code Gb SEGGER_THUMB_Startup.o
memset 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
reset_handler 4 Code Gb STM32N6xx_Startup.o

Read-write data symbols by name

Symbol name Address Size Align Type Bd Object File
SystemCoreClock 0x341822AC 4 4 Init Lc blto2_FSBL_lto.o
uwTick 0x341822A4 4 4 Zero Lc blto2_FSBL_lto.o
uwTickPrio 0x341822A8 1 4 Zero Lc blto2_FSBL_lto.o

Read-write data symbols by address

Address Symbol name Size Align Type Bd Object File
0x341822A4 uwTick 4 4 Zero Lc blto2_FSBL_lto.o
0x341822A8 uwTickPrio 1 4 Zero Lc blto2_FSBL_lto.o
0x341822AC SystemCoreClock 4 4 Init Lc blto2_FSBL_lto.o

Read-write data symbols by descending size

Symbol name Size Align Type Bd Object File
SystemCoreClock 4 4 Init Lc blto2_FSBL_lto.o
uwTick 4 4 Zero Lc blto2_FSBL_lto.o
uwTickPrio 1 4 Zero Lc blto2_FSBL_lto.o

Read-only data symbols by name

Symbol name Address Size Align Type Bd Object File
__SEGGER_init_data__ 0x341822F8 [4] 4 Cnst Lc [ Linker created ]
__SEGGER_init_table__ 0x341822D4 [36] 4 Cnst Lc [ Linker created ]

Read-only data symbols by address

Address Symbol name Size Align Type Bd Object File
0x341822D4 __SEGGER_init_table__ [36] 4 Cnst Lc [ Linker created ]
0x341822F8 __SEGGER_init_data__ [4] 4 Cnst Lc [ Linker created ]

Untyped symbols by name

Symbol name Value Size Align Type Bd Object File
__AHB_RAM1_segment_end__ 0x38004000 ---- Gb [ Linker created ]
__AHB_RAM1_segment_size__ 0x00004000 ---- Gb [ Linker created ]
__AHB_RAM1_segment_start__ 0x38000000 ---- Gb [ Linker created ]
__AHB_RAM1_segment_used_end__ 0x38000000 ---- Gb [ Linker created ]
__AHB_RAM1_segment_used_size__ 0x00000000 ---- Gb [ Linker created ]
__AHB_RAM1_segment_used_start__ 0x38000000 ---- Gb [ Linker created ]
__AHB_RAM2_segment_end__ 0x38008000 ---- Gb [ Linker created ]
__AHB_RAM2_segment_size__ 0x00004000 ---- Gb [ Linker created ]
__AHB_RAM2_segment_start__ 0x38004000 ---- Gb [ Linker created ]
__AHB_RAM2_segment_used_end__ 0x38004000 ---- Gb [ Linker created ]
__AHB_RAM2_segment_used_size__ 0x00000000 ---- Gb [ Linker created ]
__AHB_RAM2_segment_used_start__ 0x38004000 ---- Gb [ Linker created ]
__AXI_RAM1_segment_end__ 0x34100000 ---- Gb [ Linker created ]
__AXI_RAM1_segment_size__ 0x0009C000 ---- Gb [ Linker created ]
__AXI_RAM1_segment_start__ 0x34064000 ---- Gb [ Linker created ]
__AXI_RAM1_segment_used_end__ 0x34064000 ---- Gb [ Linker created ]
__AXI_RAM1_segment_used_size__ 0x00000000 ---- Gb [ Linker created ]
__AXI_RAM1_segment_used_start__ 0x34064000 ---- Gb [ Linker created ]
__AXI_RAM2_segment_end__ 0x34200000 ---- Gb [ Linker created ]
__AXI_RAM2_segment_size__ 0x0007FC00 ---- Gb [ Linker created ]
__AXI_RAM2_segment_start__ 0x34180400 ---- Gb [ Linker created ]
__AXI_RAM2_segment_used_end__ 0x34200000 ---- Gb [ Linker created ]
__AXI_RAM2_segment_used_size__ 0x0007FC00 ---- Gb [ Linker created ]
__AXI_RAM2_segment_used_start__ 0x34180400 ---- Gb [ Linker created ]
__AXI_RAM3_segment_end__ 0x34270000 ---- Gb [ Linker created ]
__AXI_RAM3_segment_size__ 0x00070000 ---- Gb [ Linker created ]
__AXI_RAM3_segment_start__ 0x34200000 ---- Gb [ Linker created ]
__AXI_RAM3_segment_used_end__ 0x34200000 ---- Gb [ Linker created ]
__AXI_RAM3_segment_used_size__ 0x00000000 ---- Gb [ Linker created ]
__AXI_RAM3_segment_used_start__ 0x34200000 ---- Gb [ Linker created ]
__AXI_RAM4_segment_end__ 0x342E0000 ---- Gb [ Linker created ]
__AXI_RAM4_segment_size__ 0x00070000 ---- Gb [ Linker created ]
__AXI_RAM4_segment_start__ 0x34270000 ---- Gb [ Linker created ]
__AXI_RAM4_segment_used_end__ 0x34270000 ---- Gb [ Linker created ]
__AXI_RAM4_segment_used_size__ 0x00000000 ---- Gb [ Linker created ]
__AXI_RAM4_segment_used_start__ 0x34270000 ---- Gb [ Linker created ]
__AXI_RAM5_segment_end__ 0x34350000 ---- Gb [ Linker created ]
__AXI_RAM5_segment_size__ 0x00070000 ---- Gb [ Linker created ]
__AXI_RAM5_segment_start__ 0x342E0000 ---- Gb [ Linker created ]
__AXI_RAM5_segment_used_end__ 0x342E0000 ---- Gb [ Linker created ]
__AXI_RAM5_segment_used_size__ 0x00000000 ---- Gb [ Linker created ]
__AXI_RAM5_segment_used_start__ 0x342E0000 ---- Gb [ Linker created ]
__AXI_RAM6_segment_end__ 0x343C0000 ---- Gb [ Linker created ]
__AXI_RAM6_segment_size__ 0x00070000 ---- Gb [ Linker created ]
__AXI_RAM6_segment_start__ 0x34350000 ---- Gb [ Linker created ]
__AXI_RAM6_segment_used_end__ 0x34350000 ---- Gb [ Linker created ]
__AXI_RAM6_segment_used_size__ 0x00000000 ---- Gb [ Linker created ]
__AXI_RAM6_segment_used_start__ 0x34350000 ---- Gb [ Linker created ]
__AXI_RAM7_segment_end__ 0x34400000 ---- Gb [ Linker created ]
__AXI_RAM7_segment_size__ 0x00040000 ---- Gb [ Linker created ]
__AXI_RAM7_segment_start__ 0x343C0000 ---- Gb [ Linker created ]
__AXI_RAM7_segment_used_end__ 0x343C0000 ---- Gb [ Linker created ]
__AXI_RAM7_segment_used_size__ 0x00000000 ---- Gb [ Linker created ]
__AXI_RAM7_segment_used_start__ 0x343C0000 ---- Gb [ Linker created ]
__AXI_RAM8_segment_end__ 0x34420000 ---- Gb [ Linker created ]
__AXI_RAM8_segment_size__ 0x00020000 ---- Gb [ Linker created ]
__AXI_RAM8_segment_start__ 0x34400000 ---- Gb [ Linker created ]
__AXI_RAM8_segment_used_end__ 0x34400000 ---- Gb [ Linker created ]
__AXI_RAM8_segment_used_size__ 0x00000000 ---- Gb [ Linker created ]
__AXI_RAM8_segment_used_start__ 0x34400000 ---- Gb [ Linker created ]
__BKP_RAM_segment_end__ 0x3C002000 ---- Gb [ Linker created ]
__BKP_RAM_segment_size__ 0x00002000 ---- Gb [ Linker created ]
__BKP_RAM_segment_start__ 0x3C000000 ---- Gb [ Linker created ]
__BKP_RAM_segment_used_end__ 0x3C000000 ---- Gb [ Linker created ]
__BKP_RAM_segment_used_size__ 0x00000000 ---- Gb [ Linker created ]
__BKP_RAM_segment_used_start__ 0x3C000000 ---- Gb [ Linker created ]
__DTCM_RAM_segment_end__ 0x30020000 ---- Gb [ Linker created ]
__DTCM_RAM_segment_size__ 0x00020000 ---- Gb [ Linker created ]
__DTCM_RAM_segment_start__ 0x30000000 ---- Gb [ Linker created ]
__DTCM_RAM_segment_used_end__ 0x30000000 ---- Gb [ Linker created ]
__DTCM_RAM_segment_used_size__ 0x00000000 ---- Gb [ Linker created ]
__DTCM_RAM_segment_used_start__ 0x30000000 ---- Gb [ Linker created ]
__FLEX_RAM_segment_end__ 0x34064000 ---- Gb [ Linker created ]
__FLEX_RAM_segment_size__ 0x00064000 ---- Gb [ Linker created ]
__FLEX_RAM_segment_start__ 0x34000000 ---- Gb [ Linker created ]
__FLEX_RAM_segment_used_end__ 0x34000000 ---- Gb [ Linker created ]
__FLEX_RAM_segment_used_size__ 0x00000000 ---- Gb [ Linker created ]
__FLEX_RAM_segment_used_start__ 0x34000000 ---- Gb [ Linker created ]
__HEAPSIZE__ 0x00000100 ---- Gb [ Linker created ]
__ITCM_RAM_segment_end__ 0x10010000 ---- Gb [ Linker created ]
__ITCM_RAM_segment_size__ 0x00010000 ---- Gb [ Linker created ]
__ITCM_RAM_segment_start__ 0x10000000 ---- Gb [ Linker created ]
__ITCM_RAM_segment_used_end__ 0x10000000 ---- Gb [ Linker created ]
__ITCM_RAM_segment_used_size__ 0x00000000 ---- Gb [ Linker created ]
__ITCM_RAM_segment_used_start__ 0x10000000 ---- Gb [ Linker created ]
__RAM_segment_end__ 0x34200000 ---- Gb [ Linker created ]
__RAM_segment_size__ 0x0007FC00 ---- Gb [ Linker created ]
__RAM_segment_start__ 0x34180400 ---- Gb [ Linker created ]
__RAM_segment_used_end__ 0x34200000 ---- Gb [ Linker created ]
__RAM_segment_used_size__ 0x0007FC00 ---- Gb [ Linker created ]
__RAM_segment_used_start__ 0x34180400 ---- Gb [ Linker created ]
__STACKSIZE_PROCESS__ 0x00000000 ---- Gb [ Linker created ]
__STACKSIZE__ 0x00002000 ---- Gb [ Linker created ]
__ctors_end__ 0x341822A4 ---- Gb [ Linker created ]
__ctors_start__ 0x341822A0 ---- Gb [ Linker created ]
__stack_end__ 0x34200000 ---- Gb [ Linker created ]
__stack_start__ 0x341FE000 ---- Gb [ Linker created ]
__thread_pointer$ 0x00000000 ---- Gb [ Linker created ]
_vectors 0x34180400 [844] 1024 Code Gb stm32n657xx_Vectors.o
_vectors_end 0x3418074C 1024 Code Lc stm32n657xx_Vectors.o
g_pfnVectors 0x34180400 [844] 1024 Code Gb stm32n657xx_Vectors.o

Untyped symbols by address

Value Symbol name Size Align Type Bd Object File
0x00000000 __thread_pointer$ ---- Gb [ Linker created ]
0x00000000 __STACKSIZE_PROCESS__ ---- Gb [ Linker created ]
0x00000000 __ITCM_RAM_segment_used_size__ ---- Gb [ Linker created ]
0x00000000 __FLEX_RAM_segment_used_size__ ---- Gb [ Linker created ]
0x00000000 __DTCM_RAM_segment_used_size__ ---- Gb [ Linker created ]
0x00000000 __BKP_RAM_segment_used_size__ ---- Gb [ Linker created ]
0x00000000 __AXI_RAM8_segment_used_size__ ---- Gb [ Linker created ]
0x00000000 __AXI_RAM7_segment_used_size__ ---- Gb [ Linker created ]
0x00000000 __AXI_RAM6_segment_used_size__ ---- Gb [ Linker created ]
0x00000000 __AXI_RAM5_segment_used_size__ ---- Gb [ Linker created ]
0x00000000 __AXI_RAM4_segment_used_size__ ---- Gb [ Linker created ]
0x00000000 __AXI_RAM3_segment_used_size__ ---- Gb [ Linker created ]
0x00000000 __AXI_RAM1_segment_used_size__ ---- Gb [ Linker created ]
0x00000000 __AHB_RAM2_segment_used_size__ ---- Gb [ Linker created ]
0x00000000 __AHB_RAM1_segment_used_size__ ---- Gb [ Linker created ]
0x00000100 __HEAPSIZE__ ---- Gb [ Linker created ]
0x00002000 __STACKSIZE__ ---- Gb [ Linker created ]
0x00002000 __BKP_RAM_segment_size__ ---- Gb [ Linker created ]
0x00004000 __AHB_RAM2_segment_size__ ---- Gb [ Linker created ]
0x00004000 __AHB_RAM1_segment_size__ ---- Gb [ Linker created ]
0x00010000 __ITCM_RAM_segment_size__ ---- Gb [ Linker created ]
0x00020000 __DTCM_RAM_segment_size__ ---- Gb [ Linker created ]
0x00020000 __AXI_RAM8_segment_size__ ---- Gb [ Linker created ]
0x00040000 __AXI_RAM7_segment_size__ ---- Gb [ Linker created ]
0x00064000 __FLEX_RAM_segment_size__ ---- Gb [ Linker created ]
0x00070000 __AXI_RAM6_segment_size__ ---- Gb [ Linker created ]
0x00070000 __AXI_RAM5_segment_size__ ---- Gb [ Linker created ]
0x00070000 __AXI_RAM4_segment_size__ ---- Gb [ Linker created ]
0x00070000 __AXI_RAM3_segment_size__ ---- Gb [ Linker created ]
0x0007FC00 __RAM_segment_used_size__ ---- Gb [ Linker created ]
0x0007FC00 __RAM_segment_size__ ---- Gb [ Linker created ]
0x0007FC00 __AXI_RAM2_segment_used_size__ ---- Gb [ Linker created ]
0x0007FC00 __AXI_RAM2_segment_size__ ---- Gb [ Linker created ]
0x0009C000 __AXI_RAM1_segment_size__ ---- Gb [ Linker created ]
0x10000000 __ITCM_RAM_segment_used_start__ ---- Gb [ Linker created ]
0x10000000 __ITCM_RAM_segment_used_end__ ---- Gb [ Linker created ]
0x10000000 __ITCM_RAM_segment_start__ ---- Gb [ Linker created ]
0x10010000 __ITCM_RAM_segment_end__ ---- Gb [ Linker created ]
0x30000000 __DTCM_RAM_segment_used_start__ ---- Gb [ Linker created ]
0x30000000 __DTCM_RAM_segment_used_end__ ---- Gb [ Linker created ]
0x30000000 __DTCM_RAM_segment_start__ ---- Gb [ Linker created ]
0x30020000 __DTCM_RAM_segment_end__ ---- Gb [ Linker created ]
0x34000000 __FLEX_RAM_segment_used_start__ ---- Gb [ Linker created ]
0x34000000 __FLEX_RAM_segment_used_end__ ---- Gb [ Linker created ]
0x34000000 __FLEX_RAM_segment_start__ ---- Gb [ Linker created ]
0x34064000 __FLEX_RAM_segment_end__ ---- Gb [ Linker created ]
0x34064000 __AXI_RAM1_segment_used_start__ ---- Gb [ Linker created ]
0x34064000 __AXI_RAM1_segment_used_end__ ---- Gb [ Linker created ]
0x34064000 __AXI_RAM1_segment_start__ ---- Gb [ Linker created ]
0x34100000 __AXI_RAM1_segment_end__ ---- Gb [ Linker created ]
0x34180400 g_pfnVectors [844] 1024 Code Gb stm32n657xx_Vectors.o
0x34180400 _vectors [844] 1024 Code Gb stm32n657xx_Vectors.o
0x34180400 __RAM_segment_used_start__ ---- Gb [ Linker created ]
0x34180400 __RAM_segment_start__ ---- Gb [ Linker created ]
0x34180400 __AXI_RAM2_segment_used_start__ ---- Gb [ Linker created ]
0x34180400 __AXI_RAM2_segment_start__ ---- Gb [ Linker created ]
0x3418074C _vectors_end 1024 Code Lc stm32n657xx_Vectors.o
0x341822A0 __ctors_start__ ---- Gb [ Linker created ]
0x341822A4 __ctors_end__ ---- Gb [ Linker created ]
0x341FE000 __stack_start__ ---- Gb [ Linker created ]
0x34200000 __stack_end__ ---- Gb [ Linker created ]
0x34200000 __RAM_segment_used_end__ ---- Gb [ Linker created ]
0x34200000 __RAM_segment_end__ ---- Gb [ Linker created ]
0x34200000 __AXI_RAM3_segment_used_start__ ---- Gb [ Linker created ]
0x34200000 __AXI_RAM3_segment_used_end__ ---- Gb [ Linker created ]
0x34200000 __AXI_RAM3_segment_start__ ---- Gb [ Linker created ]
0x34200000 __AXI_RAM2_segment_used_end__ ---- Gb [ Linker created ]
0x34200000 __AXI_RAM2_segment_end__ ---- Gb [ Linker created ]
0x34270000 __AXI_RAM4_segment_used_start__ ---- Gb [ Linker created ]
0x34270000 __AXI_RAM4_segment_used_end__ ---- Gb [ Linker created ]
0x34270000 __AXI_RAM4_segment_start__ ---- Gb [ Linker created ]
0x34270000 __AXI_RAM3_segment_end__ ---- Gb [ Linker created ]
0x342E0000 __AXI_RAM5_segment_used_start__ ---- Gb [ Linker created ]
0x342E0000 __AXI_RAM5_segment_used_end__ ---- Gb [ Linker created ]
0x342E0000 __AXI_RAM5_segment_start__ ---- Gb [ Linker created ]
0x342E0000 __AXI_RAM4_segment_end__ ---- Gb [ Linker created ]
0x34350000 __AXI_RAM6_segment_used_start__ ---- Gb [ Linker created ]
0x34350000 __AXI_RAM6_segment_used_end__ ---- Gb [ Linker created ]
0x34350000 __AXI_RAM6_segment_start__ ---- Gb [ Linker created ]
0x34350000 __AXI_RAM5_segment_end__ ---- Gb [ Linker created ]
0x343C0000 __AXI_RAM7_segment_used_start__ ---- Gb [ Linker created ]
0x343C0000 __AXI_RAM7_segment_used_end__ ---- Gb [ Linker created ]
0x343C0000 __AXI_RAM7_segment_start__ ---- Gb [ Linker created ]
0x343C0000 __AXI_RAM6_segment_end__ ---- Gb [ Linker created ]
0x34400000 __AXI_RAM8_segment_used_start__ ---- Gb [ Linker created ]
0x34400000 __AXI_RAM8_segment_used_end__ ---- Gb [ Linker created ]
0x34400000 __AXI_RAM8_segment_start__ ---- Gb [ Linker created ]
0x34400000 __AXI_RAM7_segment_end__ ---- Gb [ Linker created ]
0x34420000 __AXI_RAM8_segment_end__ ---- Gb [ Linker created ]
0x38000000 __AHB_RAM1_segment_used_start__ ---- Gb [ Linker created ]
0x38000000 __AHB_RAM1_segment_used_end__ ---- Gb [ Linker created ]
0x38000000 __AHB_RAM1_segment_start__ ---- Gb [ Linker created ]
0x38004000 __AHB_RAM2_segment_used_start__ ---- Gb [ Linker created ]
0x38004000 __AHB_RAM2_segment_used_end__ ---- Gb [ Linker created ]
0x38004000 __AHB_RAM2_segment_start__ ---- Gb [ Linker created ]
0x38004000 __AHB_RAM1_segment_end__ ---- Gb [ Linker created ]
0x38008000 __AHB_RAM2_segment_end__ ---- Gb [ Linker created ]
0x3C000000 __BKP_RAM_segment_used_start__ ---- Gb [ Linker created ]
0x3C000000 __BKP_RAM_segment_used_end__ ---- Gb [ Linker created ]
0x3C000000 __BKP_RAM_segment_start__ ---- Gb [ Linker created ]
0x3C002000 __BKP_RAM_segment_end__ ---- Gb [ Linker created ]

REGION LIST

Regions by name

Name Range Size
AHB_RAM1 38000000-38003FFF 16 384
AHB_RAM2 38004000-38007FFF 16 384
AXI_RAM1 34064000-340FFFFF 638 976
AXI_RAM2 34180400-341FFFFF 523 264
AXI_RAM3 34200000-3426FFFF 458 752
AXI_RAM4 34270000-342DFFFF 458 752
AXI_RAM5 342E0000-3434FFFF 458 752
AXI_RAM6 34350000-343BFFFF 458 752
AXI_RAM7 343C0000-343FFFFF 262 144
AXI_RAM8 34400000-3441FFFF 131 072
BKP_RAM 3C000000-3C001FFF 8 192
DTCM_RAM 30000000-3001FFFF 131 072
FLEX_RAM 34000000-34063FFF 409 600
ITCM_RAM 10000000-1000FFFF 65 536
RAM 34180400-341FFFFF 523 264

Analysis

AXI_RAM2: Identical to region RAM RAM: Identical to region AXI_RAM2

BLOCK LIST

Blocks by name

Name Range Size Ordering
ctors 341822A0-341822A3 4 Auto
stack 341FE000-341FFFFF 8 192 Auto

Blocks by address

Range Size Name Ordering
341822A0-341822A3 4 ctors Auto
341FE000-341FFFFF 8 192 stack Auto

STACK SIZES

Functions by stack size

Function name Stack Object File

Functions without stack size information

HAL_RCC_OscConfig HAL_RCC_ClockConfig HAL_GPIO_Init RCC_PLL_IsNewConfig RCC_PLL_Config RCC_IC_CheckPLLSources RCCEx_GetPLLSourceFreq main SystemCoreClockUpdate NMI_Handler HardFault_Handler MemManage_Handler BusFault_Handler UsageFault_Handler SVC_Handler DebugMon_Handler PendSV_Handler SysTick_Handler SystemInit _start __SEGGER_init_done __startup_complete exit PVD_PVM_IRQHandler DTS_IRQHandler RCC_IRQHandler LOCKUP_IRQHandler CACHE_ECC_IRQHandler TCM_ECC_IRQHandler BCK_ECC_IRQHandler FPU_IRQHandler RTC_S_IRQHandler TAMP_IRQHandler RIFSC_TAMPER_IRQHandler IAC_IRQHandler RCC_S_IRQHandler RTC_IRQHandler IWDG_IRQHandler WWDG_IRQHandler EXTI0_IRQHandler EXTI1_IRQHandler EXTI2_IRQHandler EXTI3_IRQHandler EXTI4_IRQHandler EXTI5_IRQHandler EXTI6_IRQHandler EXTI7_IRQHandler EXTI8_IRQHandler EXTI9_IRQHandler EXTI10_IRQHandler EXTI11_IRQHandler EXTI12_IRQHandler EXTI13_IRQHandler EXTI14_IRQHandler EXTI15_IRQHandler SAES_IRQHandler CRYP_IRQHandler PKA_IRQHandler HASH_IRQHandler RNG_IRQHandler MCE1_IRQHandler MCE2_IRQHandler MCE3_IRQHandler MCE4_IRQHandler ADC1_2_IRQHandler CSI_IRQHandler DCMIPP_IRQHandler PAHB_ERR_IRQHandler NPU0_IRQHandler NPU1_IRQHandler NPU2_IRQHandler NPU3_IRQHandler CACHEAXI_IRQHandler LTDC_LO_IRQHandler LTDC_LO_ERR_IRQHandler DMA2D_IRQHandler JPEG_IRQHandler VENC_IRQHandler GFXMMU_IRQHandler GFXTIM_IRQHandler GPU2D_IRQHandler GPU2D_ER_IRQHandler ICACHE_IRQHandler HPDMA1_Channel0_IRQHandler HPDMA1_Channel1_IRQHandler HPDMA1_Channel2_IRQHandler HPDMA1_Channel3_IRQHandler HPDMA1_Channel4_IRQHandler HPDMA1_Channel5_IRQHandler HPDMA1_Channel6_IRQHandler HPDMA1_Channel7_IRQHandler HPDMA1_Channel8_IRQHandler HPDMA1_Channel9_IRQHandler HPDMA1_Channel10_IRQHandler HPDMA1_Channel11_IRQHandler HPDMA1_Channel12_IRQHandler HPDMA1_Channel13_IRQHandler HPDMA1_Channel14_IRQHandler HPDMA1_Channel15_IRQHandler GPDMA1_Channel0_IRQHandler GPDMA1_Channel1_IRQHandler GPDMA1_Channel2_IRQHandler GPDMA1_Channel3_IRQHandler GPDMA1_Channel4_IRQHandler GPDMA1_Channel5_IRQHandler GPDMA1_Channel6_IRQHandler GPDMA1_Channel7_IRQHandler GPDMA1_Channel8_IRQHandler GPDMA1_Channel9_IRQHandler GPDMA1_Channel10_IRQHandler GPDMA1_Channel11_IRQHandler GPDMA1_Channel12_IRQHandler GPDMA1_Channel13_IRQHandler GPDMA1_Channel14_IRQHandler GPDMA1_Channel15_IRQHandler I2C1_EV_IRQHandler I2C1_ER_IRQHandler I2C2_EV_IRQHandler I2C2_ER_IRQHandler I2C3_EV_IRQHandler I2C3_ER_IRQHandler I2C4_EV_IRQHandler I2C4_ER_IRQHandler I3C1_EV_IRQHandler I3C1_ER_IRQHandler I3C2_EV_IRQHandler I3C2_ER_IRQHandler TIM1_BRK_IRQHandler TIM1_UP_IRQHandler TIM1_TRG_CCU_IRQHandler TIM1_CC_IRQHandler TIM2_IRQHandler TIM3_IRQHandler TIM4_IRQHandler TIM5_IRQHandler TIM6_IRQHandler TIM7_IRQHandler TIM8_BRK_IRQHandler TIM8_UP_IRQHandler TIM8_TRG_CCU_IRQHandler TIM8_CC_IRQHandler TIM9_IRQHandler TIM10_IRQHandler TIM11_IRQHandler TIM12_IRQHandler TIM13_IRQHandler TIM14_IRQHandler TIM15_IRQHandler TIM16_IRQHandler TIM17_IRQHandler TIM18_IRQHandler LPTIM1_IRQHandler LPTIM2_IRQHandler LPTIM3_IRQHandler LPTIM4_IRQHandler LPTIM5_IRQHandler ADF1_FLT0_IRQHandler MDF1_FLT0_IRQHandler MDF1_FLT1_IRQHandler MDF1_FLT2_IRQHandler MDF1_FLT3_IRQHandler MDF1_FLT4_IRQHandler MDF1_FLT5_IRQHandler SAI1_A_IRQHandler SAI1_B_IRQHandler SAI2_A_IRQHandler SAI2_B_IRQHandler SPDIFRX_IRQHandler SPI1_IRQHandler SPI2_IRQHandler SPI3_IRQHandler SPI4_IRQHandler SPI5_IRQHandler SPI6_IRQHandler USART1_IRQHandler USART2_IRQHandler USART3_IRQHandler UART4_IRQHandler UART5_IRQHandler USART6_IRQHandler UART7_IRQHandler UART8_IRQHandler UART9_IRQHandler USART10_IRQHandler LPUART1_IRQHandler XSPI1_IRQHandler XSPI2_IRQHandler XSPI3_IRQHandler FMC_IRQHandler SDMMC1_IRQHandler SDMMC2_IRQHandler UCPD1_IRQHandler USB1_OTG_HS_IRQHandler USB2_OTG_HS_IRQHandler ETH1_IRQHandler FDCAN1_IT0_IRQHandler FDCAN1_IT1_IRQHandler FDCAN2_IT0_IRQHandler FDCAN2_IT1_IRQHandler FDCAN3_IT0_IRQHandler FDCAN3_IT1_IRQHandler FDCAN_CU_IRQHandler MDIOS_IRQHandler DCMI_PSSI_IRQHandler WAKEUP_PIN_IRQHandler CTI_INT0_IRQHandler CTI_INT1_IRQHandler LTDC_UP_IRQHandler LTDC_UP_ERR_IRQHandler reset_handler Reset_Handler __SEGGER_init_zero __SEGGER_init_copy __SEGGER_init_ctors __aeabi_memclr __aeabi_memclr8 __aeabi_memclr4 __aeabi_memset8 __aeabi_memset4 __aeabi_memset memset

UNUSED INPUTS

Unused object files

No unused object files

ABSOLUTE LISTING

Section .vectors from stm32n657xx_Vectors.o, size=844, align=1024


_vectors: g_pfnVectors: 0x34180400: 34200000 DC.W 34200000 ; R_ARM_ABS32 0x34180404: 341814C1 DC.W reset_handler 0x34180408: 34181555 DC.W NMI_Handler 0x3418040C: 34181559 DC.W HardFault_Handler 0x34180410: 3418155D DC.W MemManage_Handler 0x34180414: 34181561 DC.W BusFault_Handler 0x34180418: 34181565 DC.W UsageFault_Handler 0x3418041C: 00 DC.B 0x00 ; '\0' 0x3418041D: 00 DC.B 0x00 ; '\0' 0x3418041E: 00 DC.B 0x00 ; '\0' 0x3418041F: 00 DC.B 0x00 ; '\0' 0x34180420: 00 DC.B 0x00 ; '\0' 0x34180421: 00 DC.B 0x00 ; '\0' 0x34180422: 00 DC.B 0x00 ; '\0' 0x34180423: 00 DC.B 0x00 ; '\0' 0x34180424: 00 DC.B 0x00 ; '\0' 0x34180425: 00 DC.B 0x00 ; '\0' 0x34180426: 00 DC.B 0x00 ; '\0' 0x34180427: 00 DC.B 0x00 ; '\0' 0x34180428: 00 DC.B 0x00 ; '\0' 0x34180429: 00 DC.B 0x00 ; '\0' 0x3418042A: 00 DC.B 0x00 ; '\0' 0x3418042B: 00 DC.B 0x00 ; '\0' 0x3418042C: 34181569 DC.W SVC_Handler 0x34180430: 3418156D DC.W DebugMon_Handler 0x34180434: 00 DC.B 0x00 ; '\0' 0x34180435: 00 DC.B 0x00 ; '\0' 0x34180436: 00 DC.B 0x00 ; '\0' 0x34180437: 00 DC.B 0x00 ; '\0' 0x34180438: 34181571 DC.W PendSV_Handler 0x3418043C: 34180BED DC.W SysTick_Handler 0x34180440: 34181557 DC.W PVD_PVM_IRQHandler 0x34180444: 00 DC.B 0x00 ; '\0' 0x34180445: 00 DC.B 0x00 ; '\0' 0x34180446: 00 DC.B 0x00 ; '\0' 0x34180447: 00 DC.B 0x00 ; '\0' 0x34180448: 3418155B DC.W DTS_IRQHandler 0x3418044C: 3418155F DC.W RCC_IRQHandler 0x34180450: 34181563 DC.W LOCKUP_IRQHandler 0x34180454: 34181567 DC.W CACHE_ECC_IRQHandler 0x34180458: 3418156B DC.W TCM_ECC_IRQHandler 0x3418045C: 3418156F DC.W BCK_ECC_IRQHandler 0x34180460: 34181573 DC.W FPU_IRQHandler 0x34180464: 00 DC.B 0x00 ; '\0' 0x34180465: 00 DC.B 0x00 ; '\0' 0x34180466: 00 DC.B 0x00 ; '\0' 0x34180467: 00 DC.B 0x00 ; '\0' 0x34180468: 341816A3 DC.W RTC_S_IRQHandler 0x3418046C: 34181847 DC.W TAMP_IRQHandler 0x34180470: 34181EFB DC.W RIFSC_TAMPER_IRQHandler 0x34180474: 34181F83 DC.W IAC_IRQHandler 0x34180478: 34182143 DC.W RCC_S_IRQHandler 0x3418047C: 00 DC.B 0x00 ; '\0' 0x3418047D: 00 DC.B 0x00 ; '\0' 0x3418047E: 00 DC.B 0x00 ; '\0' 0x3418047F: 00 DC.B 0x00 ; '\0' 0x34180480: 34182145 DC.W RTC_IRQHandler 0x34180484: 00 DC.B 0x00 ; '\0' 0x34180485: 00 DC.B 0x00 ; '\0' 0x34180486: 00 DC.B 0x00 ; '\0' 0x34180487: 00 DC.B 0x00 ; '\0' 0x34180488: 34182147 DC.W IWDG_IRQHandler 0x3418048C: 34182149 DC.W WWDG_IRQHandler 0x34180490: 3418214B DC.W EXTI0_IRQHandler 0x34180494: 3418214D DC.W EXTI1_IRQHandler 0x34180498: 3418214F DC.W EXTI2_IRQHandler 0x3418049C: 34182151 DC.W EXTI3_IRQHandler 0x341804A0: 34182153 DC.W EXTI4_IRQHandler 0x341804A4: 34182155 DC.W EXTI5_IRQHandler 0x341804A8: 34182157 DC.W EXTI6_IRQHandler 0x341804AC: 34182159 DC.W EXTI7_IRQHandler 0x341804B0: 3418215B DC.W EXTI8_IRQHandler 0x341804B4: 3418215D DC.W EXTI9_IRQHandler 0x341804B8: 3418215F DC.W EXTI10_IRQHandler 0x341804BC: 34182161 DC.W EXTI11_IRQHandler 0x341804C0: 34182163 DC.W EXTI12_IRQHandler 0x341804C4: 34182165 DC.W EXTI13_IRQHandler 0x341804C8: 34182167 DC.W EXTI14_IRQHandler 0x341804CC: 34182169 DC.W EXTI15_IRQHandler 0x341804D0: 3418216B DC.W SAES_IRQHandler 0x341804D4: 3418216D DC.W CRYP_IRQHandler 0x341804D8: 3418216F DC.W PKA_IRQHandler 0x341804DC: 34182171 DC.W HASH_IRQHandler 0x341804E0: 34182173 DC.W RNG_IRQHandler 0x341804E4: 00 DC.B 0x00 ; '\0' 0x341804E5: 00 DC.B 0x00 ; '\0' 0x341804E6: 00 DC.B 0x00 ; '\0' 0x341804E7: 00 DC.B 0x00 ; '\0' 0x341804E8: 34182175 DC.W MCE1_IRQHandler 0x341804EC: 34182177 DC.W MCE2_IRQHandler 0x341804F0: 34182179 DC.W MCE3_IRQHandler 0x341804F4: 3418217B DC.W MCE4_IRQHandler 0x341804F8: 3418217D DC.W ADC1_2_IRQHandler 0x341804FC: 3418217F DC.W CSI_IRQHandler 0x34180500: 34182181 DC.W DCMIPP_IRQHandler 0x34180504: 00 DC.B 0x00 ; '\0' 0x34180505: 00 DC.B 0x00 ; '\0' 0x34180506: 00 DC.B 0x00 ; '\0' 0x34180507: 00 DC.B 0x00 ; '\0' 0x34180508: 00 DC.B 0x00 ; '\0' 0x34180509: 00 DC.B 0x00 ; '\0' 0x3418050A: 00 DC.B 0x00 ; '\0' 0x3418050B: 00 DC.B 0x00 ; '\0' 0x3418050C: 00 DC.B 0x00 ; '\0' 0x3418050D: 00 DC.B 0x00 ; '\0' 0x3418050E: 00 DC.B 0x00 ; '\0' 0x3418050F: 00 DC.B 0x00 ; '\0' 0x34180510: 34182183 DC.W PAHB_ERR_IRQHandler 0x34180514: 34182185 DC.W NPU0_IRQHandler 0x34180518: 34182187 DC.W NPU1_IRQHandler 0x3418051C: 34182189 DC.W NPU2_IRQHandler 0x34180520: 3418218B DC.W NPU3_IRQHandler 0x34180524: 3418218D DC.W CACHEAXI_IRQHandler 0x34180528: 3418218F DC.W LTDC_LO_IRQHandler 0x3418052C: 34182191 DC.W LTDC_LO_ERR_IRQHandler 0x34180530: 34182193 DC.W DMA2D_IRQHandler 0x34180534: 34182195 DC.W JPEG_IRQHandler 0x34180538: 34182197 DC.W VENC_IRQHandler 0x3418053C: 34182199 DC.W GFXMMU_IRQHandler 0x34180540: 3418219B DC.W GFXTIM_IRQHandler 0x34180544: 3418219D DC.W GPU2D_IRQHandler 0x34180548: 3418219F DC.W GPU2D_ER_IRQHandler 0x3418054C: 341821A1 DC.W ICACHE_IRQHandler 0x34180550: 341821A3 DC.W HPDMA1_Channel0_IRQHandler 0x34180554: 341821A5 DC.W HPDMA1_Channel1_IRQHandler 0x34180558: 341821A7 DC.W HPDMA1_Channel2_IRQHandler 0x3418055C: 341821A9 DC.W HPDMA1_Channel3_IRQHandler 0x34180560: 341821AB DC.W HPDMA1_Channel4_IRQHandler 0x34180564: 341821AD DC.W HPDMA1_Channel5_IRQHandler 0x34180568: 341821AF DC.W HPDMA1_Channel6_IRQHandler 0x3418056C: 341821B1 DC.W HPDMA1_Channel7_IRQHandler 0x34180570: 341821B3 DC.W HPDMA1_Channel8_IRQHandler 0x34180574: 341821B5 DC.W HPDMA1_Channel9_IRQHandler 0x34180578: 341821B7 DC.W HPDMA1_Channel10_IRQHandler 0x3418057C: 341821B9 DC.W HPDMA1_Channel11_IRQHandler 0x34180580: 341821BB DC.W HPDMA1_Channel12_IRQHandler 0x34180584: 341821BD DC.W HPDMA1_Channel13_IRQHandler 0x34180588: 341821BF DC.W HPDMA1_Channel14_IRQHandler 0x3418058C: 341821C1 DC.W HPDMA1_Channel15_IRQHandler 0x34180590: 341821C3 DC.W GPDMA1_Channel0_IRQHandler 0x34180594: 341821C5 DC.W GPDMA1_Channel1_IRQHandler 0x34180598: 341821C7 DC.W GPDMA1_Channel2_IRQHandler 0x3418059C: 341821C9 DC.W GPDMA1_Channel3_IRQHandler 0x341805A0: 341821CB DC.W GPDMA1_Channel4_IRQHandler 0x341805A4: 341821CD DC.W GPDMA1_Channel5_IRQHandler 0x341805A8: 341821CF DC.W GPDMA1_Channel6_IRQHandler 0x341805AC: 341821D1 DC.W GPDMA1_Channel7_IRQHandler 0x341805B0: 341821D3 DC.W GPDMA1_Channel8_IRQHandler 0x341805B4: 341821D5 DC.W GPDMA1_Channel9_IRQHandler 0x341805B8: 341821D7 DC.W GPDMA1_Channel10_IRQHandler 0x341805BC: 341821D9 DC.W GPDMA1_Channel11_IRQHandler 0x341805C0: 341821DB DC.W GPDMA1_Channel12_IRQHandler 0x341805C4: 341821DD DC.W GPDMA1_Channel13_IRQHandler 0x341805C8: 341821DF DC.W GPDMA1_Channel14_IRQHandler 0x341805CC: 341821E1 DC.W GPDMA1_Channel15_IRQHandler 0x341805D0: 341821E3 DC.W I2C1_EV_IRQHandler 0x341805D4: 341821E5 DC.W I2C1_ER_IRQHandler 0x341805D8: 341821E7 DC.W I2C2_EV_IRQHandler 0x341805DC: 341821E9 DC.W I2C2_ER_IRQHandler 0x341805E0: 341821EB DC.W I2C3_EV_IRQHandler 0x341805E4: 341821ED DC.W I2C3_ER_IRQHandler 0x341805E8: 341821EF DC.W I2C4_EV_IRQHandler 0x341805EC: 341821F1 DC.W I2C4_ER_IRQHandler 0x341805F0: 341821F3 DC.W I3C1_EV_IRQHandler 0x341805F4: 341821F5 DC.W I3C1_ER_IRQHandler 0x341805F8: 341821F7 DC.W I3C2_EV_IRQHandler 0x341805FC: 341821F9 DC.W I3C2_ER_IRQHandler 0x34180600: 341821FB DC.W TIM1_BRK_IRQHandler 0x34180604: 341821FD DC.W TIM1_UP_IRQHandler 0x34180608: 341821FF DC.W TIM1_TRG_CCU_IRQHandler 0x3418060C: 34182201 DC.W TIM1_CC_IRQHandler 0x34180610: 34182203 DC.W TIM2_IRQHandler 0x34180614: 34182205 DC.W TIM3_IRQHandler 0x34180618: 34182207 DC.W TIM4_IRQHandler 0x3418061C: 34182209 DC.W TIM5_IRQHandler 0x34180620: 3418220B DC.W TIM6_IRQHandler 0x34180624: 3418220D DC.W TIM7_IRQHandler 0x34180628: 3418220F DC.W TIM8_BRK_IRQHandler 0x3418062C: 34182211 DC.W TIM8_UP_IRQHandler 0x34180630: 34182213 DC.W TIM8_TRG_CCU_IRQHandler 0x34180634: 34182215 DC.W TIM8_CC_IRQHandler 0x34180638: 34182217 DC.W TIM9_IRQHandler 0x3418063C: 34182219 DC.W TIM10_IRQHandler 0x34180640: 3418221B DC.W TIM11_IRQHandler 0x34180644: 3418221D DC.W TIM12_IRQHandler 0x34180648: 3418221F DC.W TIM13_IRQHandler 0x3418064C: 34182221 DC.W TIM14_IRQHandler 0x34180650: 34182223 DC.W TIM15_IRQHandler 0x34180654: 34182225 DC.W TIM16_IRQHandler 0x34180658: 34182227 DC.W TIM17_IRQHandler 0x3418065C: 34182229 DC.W TIM18_IRQHandler 0x34180660: 3418222B DC.W LPTIM1_IRQHandler 0x34180664: 3418222D DC.W LPTIM2_IRQHandler 0x34180668: 3418222F DC.W LPTIM3_IRQHandler 0x3418066C: 34182231 DC.W LPTIM4_IRQHandler 0x34180670: 34182233 DC.W LPTIM5_IRQHandler 0x34180674: 34182235 DC.W ADF1_FLT0_IRQHandler 0x34180678: 34182237 DC.W MDF1_FLT0_IRQHandler 0x3418067C: 34182239 DC.W MDF1_FLT1_IRQHandler 0x34180680: 3418223B DC.W MDF1_FLT2_IRQHandler 0x34180684: 3418223D DC.W MDF1_FLT3_IRQHandler 0x34180688: 3418223F DC.W MDF1_FLT4_IRQHandler 0x3418068C: 34182241 DC.W MDF1_FLT5_IRQHandler 0x34180690: 34182243 DC.W SAI1_A_IRQHandler 0x34180694: 34182245 DC.W SAI1_B_IRQHandler 0x34180698: 34182247 DC.W SAI2_A_IRQHandler 0x3418069C: 34182249 DC.W SAI2_B_IRQHandler 0x341806A0: 3418224B DC.W SPDIFRX_IRQHandler 0x341806A4: 3418224D DC.W SPI1_IRQHandler 0x341806A8: 3418224F DC.W SPI2_IRQHandler 0x341806AC: 34182251 DC.W SPI3_IRQHandler 0x341806B0: 34182253 DC.W SPI4_IRQHandler 0x341806B4: 34182255 DC.W SPI5_IRQHandler 0x341806B8: 34182257 DC.W SPI6_IRQHandler 0x341806BC: 34182259 DC.W USART1_IRQHandler 0x341806C0: 3418225B DC.W USART2_IRQHandler 0x341806C4: 3418225D DC.W USART3_IRQHandler 0x341806C8: 3418225F DC.W UART4_IRQHandler 0x341806CC: 34182261 DC.W UART5_IRQHandler 0x341806D0: 34182263 DC.W USART6_IRQHandler 0x341806D4: 34182265 DC.W UART7_IRQHandler 0x341806D8: 34182267 DC.W UART8_IRQHandler 0x341806DC: 34182269 DC.W UART9_IRQHandler 0x341806E0: 3418226B DC.W USART10_IRQHandler 0x341806E4: 3418226D DC.W LPUART1_IRQHandler 0x341806E8: 3418226F DC.W XSPI1_IRQHandler 0x341806EC: 34182271 DC.W XSPI2_IRQHandler 0x341806F0: 34182273 DC.W XSPI3_IRQHandler 0x341806F4: 34182275 DC.W FMC_IRQHandler 0x341806F8: 34182277 DC.W SDMMC1_IRQHandler 0x341806FC: 34182279 DC.W SDMMC2_IRQHandler 0x34180700: 3418227B DC.W UCPD1_IRQHandler 0x34180704: 3418227D DC.W USB1_OTG_HS_IRQHandler 0x34180708: 3418227F DC.W USB2_OTG_HS_IRQHandler 0x3418070C: 34182281 DC.W ETH1_IRQHandler 0x34180710: 34182283 DC.W FDCAN1_IT0_IRQHandler 0x34180714: 34182285 DC.W FDCAN1_IT1_IRQHandler 0x34180718: 34182287 DC.W FDCAN2_IT0_IRQHandler 0x3418071C: 34182289 DC.W FDCAN2_IT1_IRQHandler 0x34180720: 3418228B DC.W FDCAN3_IT0_IRQHandler 0x34180724: 3418228D DC.W FDCAN3_IT1_IRQHandler 0x34180728: 3418228F DC.W FDCAN_CU_IRQHandler 0x3418072C: 34182291 DC.W MDIOS_IRQHandler 0x34180730: 34182293 DC.W DCMI_PSSI_IRQHandler 0x34180734: 34182295 DC.W WAKEUP_PIN_IRQHandler 0x34180738: 34182297 DC.W CTI_INT0_IRQHandler 0x3418073C: 34182299 DC.W CTI_INT1_IRQHandler 0x34180740: 00 DC.B 0x00 ; '\0' 0x34180741: 00 DC.B 0x00 ; '\0' 0x34180742: 00 DC.B 0x00 ; '\0' 0x34180743: 00 DC.B 0x00 ; '\0' 0x34180744: 3418229B DC.W LTDC_UP_IRQHandler 0x34180748: 3418229D DC.W LTDC_UP_ERR_IRQHandler

Section .text.main from blto2_FSBL_lto.o, size=1184, align=4


main: _vectors_end: 0x3418074C: B0B6 SUB SP, SP, #216 0x3418074E: F64E 5414 MOVW R4, #0xED14 0x34180752: F2CE 0400 MOVT R4, #0xE000 0x34180756: 6820 LDR R0, [R4] 0x34180758: 0380 LSLS R0, R0, #14 0x3418075A: D412 BMI 46L1 ; 0x34180782 0x3418075C: F3BF 8F4F DSB SY 0x34180760: 2000 MOVS R0, #0 0x34180762: F3BF 8F6F ISB SY 0x34180766: F8C4 023C STR.W R0, [R4, #0x023C] 0x3418076A: F3BF 8F4F DSB SY 0x3418076E: F3BF 8F6F ISB SY 0x34180772: 6820 LDR R0, [R4] 0x34180774: F440 3000 ORR R0, R0, #0x020000 0x34180778: 6020 STR R0, [R4] 0x3418077A: F3BF 8F4F DSB SY 0x3418077E: F3BF 8F6F ISB SY
.L1: 0x34180782: 6820 LDR R0, [R4] 0x34180784: 03C0 LSLS R0, R0, #15 0x34180786: D426 BMI 46L4 ; 0x341807D6 0x34180788: 2000 MOVS R0, #0 0x3418078A: F643 72E0 MOVW R2, #0x3FE0 0x3418078E: 6720 STR R0, [R4, #112] 0x34180790: F3BF 8F4F DSB SY 0x34180794: 6EE1 LDR R1, [R4, #108] 0x34180796: F3C1 06C9 UBFX R6, R1, #3, #10 0x3418079A: F3C1 304E UBFX R0, R1, #13, #15 0x3418079E: F106 0A01 ADD.W R10, R6, #1 0x341807A2: BF00 NOP
.L2: 0x341807A4: F04A E001 DLS LR, R10 0x341807A8: 4631 MOV R1, R6 0x341807AA: EA02 1340 AND.W R3, R2, R0, LSL #5 0x341807AE: BF00 NOP
.L3: 0x341807B0: EA43 7581 ORR.W R5, R3, R1, LSL #30 0x341807B4: 3901 SUBS R1, #1 0x341807B6: F8C4 524C STR.W R5, [R4, #0x024C] 0x341807BA: F00F C807 LE LR, .L3 ; 0x341807B0 0x341807BE: 3801 SUBS R0, #1 0x341807C0: D2F0 BCS 46L2 ; 0x341807A4 0x341807C2: F3BF 8F4F DSB SY 0x341807C6: 6820 LDR R0, [R4] 0x341807C8: F440 3080 ORR R0, R0, #0x010000 0x341807CC: 6020 STR R0, [R4] 0x341807CE: F3BF 8F4F DSB SY 0x341807D2: F3BF 8F6F ISB SY
.L4: 0x341807D6: F854 0C08 LDR R0, [R4, #-8] 0x341807DA: F64F 01FF MOVW R1, #0xF8FF 0x341807DE: F644 0520 MOVW R5, #0x4820 0x341807E2: 4008 ANDS R0, R1 0x341807E4: F240 3100 MOVW R1, #0x0300 0x341807E8: F2C0 51FA MOVT R1, #0x05FA 0x341807EC: 4308 ORRS R0, R1 0x341807EE: F844 0C08 STR R0, [R4, #-8] 0x341807F2: F2C5 6502 MOVT R5, #0x5602 0x341807F6: F000 FA01 BL SystemCoreClockUpdate ; 0x34180BFC 0x341807FA: F242 20AC MOVW R0, #0x22AC ; 0x341822AC = SystemCoreClock 0x341807FE: F644 51D3 MOVW R1, #0x4DD3 0x34180802: F2C3 4018 MOVT R0, #0x3418 ; 0x341822AC = SystemCoreClock 0x34180806: 6800 LDR R0, [R0] 0x34180808: F2C1 0162 MOVT R1, #0x1062 0x3418080C: FBA0 0101 UMULL R0, R1, R0, R1 0x34180810: F04F 30FF MOV.W R0, #0xFFFFFFFF 0x34180814: EB00 1191 ADD.W R1, R0, R1, LSR #6 0x34180818: 0E0A LSRS R2, R1, #24 0x3418081A: D124 BNE 46L5 ; 0x34180866 0x3418081C: F24E 0210 MOVW R2, #0xE010 0x34180820: F2CE 0200 MOVT R2, #0xE000 0x34180824: 6051 STR R1, [R2, #4] 0x34180826: 21F0 MOVS R1, #240 0x34180828: 73E1 STRB R1, [R4, #15] 0x3418082A: 2100 MOVS R1, #0 0x3418082C: 6091 STR R1, [R2, #8] 0x3418082E: 2107 MOVS R1, #7 0x34180830: 6011 STR R1, [R2] 0x34180832: F854 1C08 LDR R1, [R4, #-8] 0x34180836: F3C1 2102 UBFX R1, R1, #8, #3 0x3418083A: F081 0207 EOR R2, R1, #7 0x3418083E: 2A04 CMP R2, #4 0x34180840: BF28 IT CS 0x34180842: 2204 MOVCS R2, #4 0x34180844: 4090 LSLS R0, R2 0x34180846: 43C0 MVNS R0, R0 0x34180848: 3903 SUBS R1, #3 0x3418084A: BF28 IT CS 0x3418084C: 4088 LSLCS R0, R1 0x3418084E: 2101 MOVS R1, #1 0x34180850: 0100 LSLS R0, R0, #4 0x34180852: 73E0 STRB R0, [R4, #15] 0x34180854: F242 20A8 MOVW R0, #0x22A8 ; 0x341822A8 = uwTickPrio 0x34180858: F2C3 4018 MOVT R0, #0x3418 ; 0x341822A8 = uwTickPrio 0x3418085C: 7001 STRB R1, [R0] 0x3418085E: 69E8 LDR R0, [R5, #28] 0x34180860: F440 7000 ORR R0, R0, #0x0200 0x34180864: 61E8 STR R0, [R5, #28]
.L5: 0x34180866: A811 ADD R0, SP, #68 0x34180868: 2194 MOVS R1, #148 0x3418086A: F000 FE3F BL __aeabi_memclr ; 0x341814EC 0x3418086E: 4668 MOV R0, SP 0x34180870: 2140 MOVS R1, #64 0x34180872: F000 FE3B BL __aeabi_memclr ; 0x341814EC 0x34180876: F855 0C20 LDR R0, [R5, #-32] 0x3418087A: F242 2AA4 MOVW R10, #0x22A4 ; 0x341822A4 = uwTick 0x3418087E: F2C3 4A18 MOVT R10, #0x3418 ; 0x341822A4 = uwTick 0x34180882: F020 0004 BIC R0, R0, #4 0x34180886: F845 0C20 STR R0, [R5, #-32] 0x3418088A: F8DA 0000 LDR.W R0, [R10] 0x3418088E: BF00 NOP
.L6: 0x34180890: 6829 LDR R1, [R5] 0x34180892: 0389 LSLS R1, R1, #14 0x34180894: D407 BMI 46L8 ; 0x341808A6 0x34180896: F8DA 1000 LDR.W R1, [R10] 0x3418089A: 1A09 SUBS R1, R1, R0 0x3418089C: F5B1 7F7A CMP.W R1, #0x03E8 0x341808A0: D9F6 BLS 46L6 ; 0x34180890 0x341808A2: B672 CPSID i
.L7: 0x341808A4: E7FE B 46L7 ; 0x341808A4
.L8: 0x341808A6: 6828 LDR R0, [R5] 0x341808A8: F020 0001 BIC R0, R0, #1 0x341808AC: 6028 STR R0, [R5] 0x341808AE: F8DA 0000 LDR.W R0, [R10] 0x341808B2: BF00 NOP
.L9: 0x341808B4: 6829 LDR R1, [R5] 0x341808B6: 0789 LSLS R1, R1, #30 0x341808B8: D407 BMI 46L11 ; 0x341808CA 0x341808BA: F8DA 1000 LDR.W R1, [R10] 0x341808BE: 1A09 SUBS R1, R1, R0 0x341808C0: F5B1 7F7A CMP.W R1, #0x03E8 0x341808C4: D9F6 BLS 46L9 ; 0x341808B4 0x341808C6: B672 CPSID i
.L10: 0x341808C8: E7FE B 46L10 ; 0x341808C8
.L11: 0x341808CA: 2002 MOVS R0, #2 0x341808CC: 9010 STR R0, [SP, #64] 0x341808CE: 2008 MOVS R0, #8 0x341808D0: 9013 STR R0, [SP, #76] 0x341808D2: 2000 MOVS R0, #0 0x341808D4: E9CD 0014 STRD R0, R0, [SP, #80] 0x341808D8: 901A STR R0, [SP, #104] 0x341808DA: 9021 STR R0, [SP, #132] 0x341808DC: 9028 STR R0, [SP, #160] 0x341808DE: 902F STR R0, [SP, #188] 0x341808E0: A810 ADD R0, SP, #64 0x341808E2: F000 FFB1 BL HAL_RCC_OscConfig ; 0x34181848 0x341808E6: B110 CBZ R0, .L13 ; 0x341808EE 0x341808E8: B672 CPSID i 0x341808EA: BF00 NOP
.L12: 0x341808EC: E7FE B 46L12 ; 0x341808EC
.L13: 0x341808EE: 207F MOVS R0, #127 0x341808F0: F248 265C MOVW R6, #0x825C 0x341808F4: 9000 STR R0, [SP, #0] 0x341808F6: F64F 50C4 MOVW R0, #0xFDC4 0x341808FA: F2C5 6602 MOVT R6, #0x5602 0x341808FE: F44F 3140 MOV.W R1, #0x030000 0x34180902: F6CF 70FF MOVT R0, #0xFFFF 0x34180906: 5830 LDR R0, [R6, R0] 0x34180908: EA01 1110 AND.W R1, R1, R0, LSR #4 0x3418090C: 9101 STR R1, [SP, #4] 0x3418090E: F5B1 3F40 CMP.W R1, #0x030000 0x34180912: F04F 7140 MOV.W R1, #0x03000000 0x34180916: EA01 1010 AND.W R0, R1, R0, LSR #4 0x3418091A: F64F 51C8 MOVW R1, #0xFDC8 0x3418091E: 9002 STR R0, [SP, #8] 0x34180920: F6CF 71FF MOVT R1, #0xFFFF 0x34180924: 5871 LDR R1, [R6, R1] 0x34180926: F401 02E0 AND R2, R1, #0x700000 0x3418092A: 9203 STR R2, [SP, #12] 0x3418092C: F001 0207 AND R2, R1, #7 0x34180930: 9204 STR R2, [SP, #16] 0x34180932: F001 0270 AND R2, R1, #112 0x34180936: 9205 STR R2, [SP, #20] 0x34180938: F401 42E0 AND R2, R1, #0x7000 0x3418093C: F401 21E0 AND R1, R1, #0x070000 0x34180940: E9CD 2106 STRD R2, R1, [SP, #24] 0x34180944: F64F 6168 MOVW R1, #0xFE68 0x34180948: F6CF 71FF MOVT R1, #0xFFFF 0x3418094C: 5871 LDR R1, [R6, R1] 0x3418094E: F001 5240 AND R2, R1, #0x30000000 0x34180952: 9208 STR R2, [SP, #32] 0x34180954: F04F 0201 MOV.W R2, #1 0x34180958: FA52 F1A1 UXTAB R1, R2, R1, ROR #16 0x3418095C: 9109 STR R1, [SP, #36] 0x3418095E: F64F 616C MOVW R1, #0xFE6C 0x34180962: F6CF 71FF MOVT R1, #0xFFFF 0x34180966: 5871 LDR R1, [R6, R1] 0x34180968: F001 5340 AND R3, R1, #0x30000000 0x3418096C: FA52 F1A1 UXTAB R1, R2, R1, ROR #16 0x34180970: E9CD 310A STRD R3, R1, [SP, #40] 0x34180974: F64F 617C MOVW R1, #0xFE7C 0x34180978: F6CF 71FF MOVT R1, #0xFFFF 0x3418097C: 5871 LDR R1, [R6, R1] 0x3418097E: F001 5340 AND R3, R1, #0x30000000 0x34180982: FA52 F1A1 UXTAB R1, R2, R1, ROR #16 0x34180986: E9CD 310C STRD R3, R1, [SP, #48] 0x3418098A: F64F 6190 MOVW R1, #0xFE90 0x3418098E: F6CF 71FF MOVT R1, #0xFFFF 0x34180992: 5871 LDR R1, [R6, R1] 0x34180994: FA52 F2A1 UXTAB R2, R2, R1, ROR #16 0x34180998: F001 5140 AND R1, R1, #0x30000000 0x3418099C: E9CD 120E STRD R1, R2, [SP, #56] 0x341809A0: BF18 IT NE 0x341809A2: F1B0 7F40 CMPNE.W R0, #0x03000000 0x341809A6: D10A BNE 46L15 ; 0x341809BE 0x341809A8: 2003 MOVS R0, #3 0x341809AA: 9000 STR R0, [SP, #0] 0x341809AC: 2000 MOVS R0, #0 0x341809AE: E9CD 0001 STRD R0, R0, [SP, #4] 0x341809B2: 4668 MOV R0, SP 0x341809B4: F000 F9EA BL HAL_RCC_ClockConfig ; 0x34180D8C 0x341809B8: B108 CBZ R0, .L15 ; 0x341809BE 0x341809BA: B672 CPSID i
.L14: 0x341809BC: E7FE B 46L14 ; 0x341809BC
.L15: 0x341809BE: 2500 MOVS R5, #0 0x341809C0: 204B MOVS R0, #75 0x341809C2: E9CD 501D STRD R5, R0, [SP, #116] 0x341809C6: 2001 MOVS R0, #1 0x341809C8: F04F 0902 MOV.W R9, #2 0x341809CC: F04F 0804 MOV.W R8, #4 0x341809D0: 9510 STR R5, [SP, #64] 0x341809D2: E9CD 001F STRD R0, R0, [SP, #124] 0x341809D6: A810 ADD R0, SP, #64 0x341809D8: F8CD 8070 STR.W R8, [SP, #112] 0x341809DC: E9CD 951A STRD R9, R5, [SP, #104] 0x341809E0: 9521 STR R5, [SP, #132] 0x341809E2: 9528 STR R5, [SP, #160] 0x341809E4: 952F STR R5, [SP, #188] 0x341809E6: F000 FF2F BL HAL_RCC_OscConfig ; 0x34181848 0x341809EA: B110 CBZ R0, .L17 ; 0x341809F2 0x341809EC: B672 CPSID i 0x341809EE: BF00 NOP
.L16: 0x341809F0: E7FE B 46L16 ; 0x341809F0
.L17: 0x341809F2: 207F MOVS R0, #127 0x341809F4: 2703 MOVS R7, #3 0x341809F6: 9000 STR R0, [SP, #0] 0x341809F8: F44F 3040 MOV.W R0, #0x030000 0x341809FC: 9001 STR R0, [SP, #4] 0x341809FE: F04F 7040 MOV.W R0, #0x03000000 0x34180A02: 9002 STR R0, [SP, #8] 0x34180A04: F44F 1080 MOV.W R0, #0x100000 0x34180A08: E9CD 0503 STRD R0, R5, [SP, #12] 0x34180A0C: 4668 MOV R0, SP 0x34180A0E: 970F STR R7, [SP, #60] 0x34180A10: E9CD 5505 STRD R5, R5, [SP, #20] 0x34180A14: E9CD 5507 STRD R5, R5, [SP, #28] 0x34180A18: E9CD 9509 STRD R9, R5, [SP, #36] 0x34180A1C: E9CD 750B STRD R7, R5, [SP, #44] 0x34180A20: E9CD 850D STRD R8, R5, [SP, #52] 0x34180A24: F000 F9B2 BL HAL_RCC_ClockConfig ; 0x34180D8C 0x34180A28: B108 CBZ R0, .L19 ; 0x34180A2E 0x34180A2A: B672 CPSID i
.L18: 0x34180A2C: E7FE B 46L18 ; 0x34180A2C
.L19: 0x34180A2E: F04F 0B00 MOV.W R11, #0 0x34180A32: F506 6000 ADD.W R0, R6, #0x0800 0x34180A36: F44F 3180 MOV.W R1, #0x010000 0x34180A3A: F641 0528 MOVW R5, #0x1828 0x34180A3E: E9CD BB13 STRD R11, R11, [SP, #76] 0x34180A42: 6001 STR R1, [R0] 0x34180A44: 6831 LDR R1, [R6] 0x34180A46: F2C5 6502 MOVT R5, #0x5602 0x34180A4A: 9100 STR R1, [SP, #0] 0x34180A4C: 9900 LDR R1, [SP, #0] 0x34180A4E: F8C0 8000 STR.W R8, [R0] 0x34180A52: F04F 0801 MOV.W R8, #1 0x34180A56: 6831 LDR R1, [R6] 0x34180A58: 9100 STR R1, [SP, #0] 0x34180A5A: 9900 LDR R1, [SP, #0] 0x34180A5C: 2110 MOVS R1, #16 0x34180A5E: 6001 STR R1, [R0] 0x34180A60: 6831 LDR R1, [R6] 0x34180A62: 9100 STR R1, [SP, #0] 0x34180A64: 9900 LDR R1, [SP, #0] 0x34180A66: 2108 MOVS R1, #8 0x34180A68: 6001 STR R1, [R0] 0x34180A6A: 6831 LDR R1, [R6] 0x34180A6C: 9100 STR R1, [SP, #0] 0x34180A6E: 9900 LDR R1, [SP, #0] 0x34180A70: 2180 MOVS R1, #128 0x34180A72: 6001 STR R1, [R0] 0x34180A74: 6831 LDR R1, [R6] 0x34180A76: 9100 STR R1, [SP, #0] 0x34180A78: 9900 LDR R1, [SP, #0] 0x34180A7A: F8C0 9000 STR.W R9, [R0] 0x34180A7E: 6831 LDR R1, [R6] 0x34180A80: 9100 STR R1, [SP, #0] 0x34180A82: 9900 LDR R1, [SP, #0] 0x34180A84: F44F 4100 MOV.W R1, #0x8000 0x34180A88: 6001 STR R1, [R0] 0x34180A8A: 6831 LDR R1, [R6] 0x34180A8C: 9100 STR R1, [SP, #0] 0x34180A8E: 9900 LDR R1, [SP, #0] 0x34180A90: F44F 4180 MOV.W R1, #0x4000 0x34180A94: 6001 STR R1, [R0] 0x34180A96: 6831 LDR R1, [R6] 0x34180A98: 9100 STR R1, [SP, #0] 0x34180A9A: 9900 LDR R1, [SP, #0] 0x34180A9C: 2140 MOVS R1, #64 0x34180A9E: 6001 STR R1, [R0] 0x34180AA0: 6831 LDR R1, [R6] 0x34180AA2: 9100 STR R1, [SP, #0] 0x34180AA4: 9900 LDR R1, [SP, #0] 0x34180AA6: 2120 MOVS R1, #32 0x34180AA8: 6001 STR R1, [R0] 0x34180AAA: 6831 LDR R1, [R6] 0x34180AAC: 9100 STR R1, [SP, #0] 0x34180AAE: 9900 LDR R1, [SP, #0] 0x34180AB0: F44F 5100 MOV.W R1, #0x2000 0x34180AB4: 6001 STR R1, [R0] 0x34180AB6: 6831 LDR R1, [R6] 0x34180AB8: 9100 STR R1, [SP, #0] 0x34180ABA: 9900 LDR R1, [SP, #0] 0x34180ABC: F8C0 8000 STR.W R8, [R0] 0x34180AC0: A910 ADD R1, SP, #64 0x34180AC2: 6830 LDR R0, [R6] 0x34180AC4: 9000 STR R0, [SP, #0] 0x34180AC6: 9800 LDR R0, [SP, #0] 0x34180AC8: 20FF MOVS R0, #255 0x34180ACA: F8C5 8000 STR.W R8, [R5] 0x34180ACE: E881 0881 STM.W R1, {R0, R7, R11} 0x34180AD2: A910 ADD R1, SP, #64 0x34180AD4: F244 0000 MOVW R0, #0x4000 0x34180AD8: F2C5 6002 MOVT R0, #0x5602 0x34180ADC: F000 FDE2 BL HAL_GPIO_Init ; 0x341816A4 0x34180AE0: F643 70FF MOVW R0, #0x3FFF 0x34180AE4: A910 ADD R1, SP, #64 0x34180AE6: F1A5 0928 SUB.W R9, R5, #40 0x34180AEA: E881 0881 STM.W R1, {R0, R7, R11} 0x34180AEE: F5A9 5080 SUB.W R0, R9, #0x1000 0x34180AF2: A910 ADD R1, SP, #64 0x34180AF4: F000 FDD6 BL HAL_GPIO_Init ; 0x341816A4 0x34180AF8: F64F 76FF MOVW R6, #0xFFFF 0x34180AFC: A810 ADD R0, SP, #64 0x34180AFE: E880 08C0 STM.W R0, {R6-R7, R11} 0x34180B02: F5A9 6000 SUB.W R0, R9, #0x0800 0x34180B06: A910 ADD R1, SP, #64 0x34180B08: F000 FDCC BL HAL_GPIO_Init ; 0x341816A4 0x34180B0C: A810 ADD R0, SP, #64 0x34180B0E: A910 ADD R1, SP, #64 0x34180B10: E880 08C0 STM.W R0, {R6-R7, R11} 0x34180B14: F5A9 6040 SUB.W R0, R9, #0x0C00 0x34180B18: F000 FDC4 BL HAL_GPIO_Init ; 0x341816A4 0x34180B1C: F44F 707F MOV.W R0, #0x03FC 0x34180B20: A910 ADD R1, SP, #64 0x34180B22: E881 0881 STM.W R1, {R0, R7, R11} 0x34180B26: F505 7076 ADD.W R0, R5, #0x03D8 0x34180B2A: A910 ADD R1, SP, #64 0x34180B2C: F000 FDBA BL HAL_GPIO_Init ; 0x341816A4 0x34180B30: A810 ADD R0, SP, #64 0x34180B32: A910 ADD R1, SP, #64 0x34180B34: E880 08C0 STM.W R0, {R6-R7, R11} 0x34180B38: F5A9 50A0 SUB.W R0, R9, #0x1400 0x34180B3C: F000 FDB2 BL HAL_GPIO_Init ; 0x341816A4 0x34180B40: A810 ADD R0, SP, #64 0x34180B42: A910 ADD R1, SP, #64 0x34180B44: E880 08C0 STM.W R0, {R6-R7, R11} 0x34180B48: F509 56E0 ADD.W R6, R9, #0x1C00 0x34180B4C: F506 6000 ADD.W R0, R6, #0x0800 0x34180B50: F000 FDA8 BL HAL_GPIO_Init ; 0x341816A4 0x34180B54: 203F MOVS R0, #63 0x34180B56: A910 ADD R1, SP, #64 0x34180B58: E881 0881 STM.W R1, {R0, R7, R11} 0x34180B5C: F506 6080 ADD.W R0, R6, #0x0400 0x34180B60: A910 ADD R1, SP, #64 0x34180B62: F000 FD9F BL HAL_GPIO_Init ; 0x341816A4 0x34180B66: F64F 30FE MOVW R0, #0xFBFE 0x34180B6A: A910 ADD R1, SP, #64 0x34180B6C: E881 0881 STM.W R1, {R0, R7, R11} 0x34180B70: 4648 MOV R0, R9 0x34180B72: A910 ADD R1, SP, #64 0x34180B74: F000 FD96 BL HAL_GPIO_Init ; 0x341816A4 0x34180B78: F64F 70FF MOVW R0, #0xFFFF 0x34180B7C: A910 ADD R1, SP, #64 0x34180B7E: E881 0881 STM.W R1, {R0, R7, R11} 0x34180B82: F5A9 6080 SUB.W R0, R9, #0x0400 0x34180B86: A910 ADD R1, SP, #64 0x34180B88: F000 FD8C BL HAL_GPIO_Init ; 0x341816A4 0x34180B8C: F649 70FF MOVW R0, #0x9FFF 0x34180B90: A910 ADD R1, SP, #64 0x34180B92: E881 0881 STM.W R1, {R0, R7, R11} 0x34180B96: F5A9 50C0 SUB.W R0, R9, #0x1800 0x34180B9A: A910 ADD R1, SP, #64 0x34180B9C: F000 FD82 BL HAL_GPIO_Init ; 0x341816A4 0x34180BA0: F44F 5084 MOV.W R0, #0x1080 0x34180BA4: A910 ADD R1, SP, #64 0x34180BA6: E881 0881 STM.W R1, {R0, R7, R11} 0x34180BAA: 4630 MOV R0, R6 0x34180BAC: A910 ADD R1, SP, #64 0x34180BAE: F000 FD79 BL HAL_GPIO_Init ; 0x341816A4 0x34180BB2: 4648 MOV R0, R9 0x34180BB4: A910 ADD R1, SP, #64 0x34180BB6: E9CD 8810 STRD R8, R8, [SP, #64] 0x34180BBA: E9CD BB12 STRD R11, R11, [SP, #72] 0x34180BBE: F000 FD71 BL HAL_GPIO_Init ; 0x341816A4 0x34180BC2: BF00 NOP
.L20: 0x34180BC4: F845 8C10 STR R8, [R5, #-16] 0x34180BC8: F8DA 0000 LDR.W R0, [R10]
.L21: 0x34180BCC: F8DA 1000 LDR.W R1, [R10] 0x34180BD0: 1A09 SUBS R1, R1, R0 0x34180BD2: 29FB CMP R1, #251 0x34180BD4: D3FA BCC 46L21 ; 0x34180BCC 0x34180BD6: F8C5 8000 STR.W R8, [R5] 0x34180BDA: F8DA 0000 LDR.W R0, [R10] 0x34180BDE: BF00 NOP
.L22: 0x34180BE0: F8DA 1000 LDR.W R1, [R10] 0x34180BE4: 1A09 SUBS R1, R1, R0 0x34180BE6: 29FB CMP R1, #251 0x34180BE8: D3FA BCC 46L22 ; 0x34180BE0 0x34180BEA: E7EB B 46L20 ; 0x34180BC4

Section .text.SysTick_Handler from blto2_FSBL_lto.o, size=16, align=4


SysTick_Handler: 0x34180BEC: F242 20A4 MOVW R0, #0x22A4 ; 0x341822A4 = uwTick 0x34180BF0: F2C3 4018 MOVT R0, #0x3418 ; 0x341822A4 = uwTick 0x34180BF4: 6801 LDR R1, [R0] 0x34180BF6: 3101 ADDS R1, #1 0x34180BF8: 6001 STR R1, [R0] 0x34180BFA: 4770 BX LR

Section .text.SystemCoreClockUpdate from blto2_FSBL_lto.o, size=400, align=4


SystemCoreClockUpdate: 0x34180BFC: F248 0144 MOVW R1, #0x8044 0x34180C00: F646 4000 MOVW R0, #0x6C00 0x34180C04: F2C5 6102 MOVT R1, #0x5602 0x34180C08: F851 2C24 LDR R2, [R1, #-36] 0x34180C0C: F3C2 5201 UBFX R2, R2, #20, #2 0x34180C10: F2C0 20DC MOVT R0, #0x02DC 0x34180C14: E8DF F002 TBB 91PC, R2] 0x34180C18: 02 DC.B 0x02 ; '\x02' 0x34180C19: 0C DC.B 0x0C ; '\x0C' 0x34180C1A: AB DC.B 0xAB ; '\xAB' 0x34180C1B: 19 DC.B 0x19 ; '\x19' 0x34180C1C: 6848 LDR R0, [R1, #4] 0x34180C1E: F249 0100 MOVW R1, #0x9000 0x34180C22: F2C0 31D0 MOVT R1, #0x03D0 0x34180C26: F3C0 10C1 UBFX R0, R0, #7, #2 0x34180C2A: FA21 F000 LSR.W R0, R1, R0 0x34180C2E: E09E B 46L6 ; 0x34180D6E 0x34180C30: 6808 LDR R0, [R1] 0x34180C32: 0580 LSLS R0, R0, #22 0x34180C34: F242 4000 MOVW R0, #0x2400 0x34180C38: F2C0 00F4 MOVT R0, #244 0x34180C3C: F100 8097 BMI.W 46L6 ; 0x34180D6E 0x34180C40: F640 1000 MOVW R0, #0x0900 0x34180C44: F2C0 003D MOVT R0, #61 0x34180C48: E091 B 46L6 ; 0x34180D6E 0x34180C4A: F8D1 2080 LDR.W R2, [R1, #128] 0x34180C4E: F3C2 7201 UBFX R2, R2, #28, #2 0x34180C52: B530 PUSH 123R4-R5, LR} 0x34180C54: E8DF F002 TBB 91PC, R2] 0x34180C58: 02 DC.B 0x02 ; '\x02' 0x34180C59: 1A DC.B 0x1A ; '\x1A' 0x34180C5A: 0A DC.B 0x0A ; '\n' 0x34180C5B: 12 DC.B 0x12 ; '\x12' 0x34180C5C: 6BCD LDR R5, [R1, #60] 0x34180C5E: 012B LSLS R3, R5, #4 0x34180C60: D442 BMI 46L2 ; 0x34180CE8 0x34180C62: F101 0C40 ADD.W R12, R1, #64 0x34180C66: F101 0E44 ADD.W LR, R1, #68 0x34180C6A: E016 B 46L1 ; 0x34180C9A 0x34180C6C: 6DCD LDR R5, [R1, #92] 0x34180C6E: 012B LSLS R3, R5, #4 0x34180C70: D43A BMI 46L2 ; 0x34180CE8 0x34180C72: F101 0C60 ADD.W R12, R1, #96 0x34180C76: F101 0E64 ADD.W LR, R1, #100 0x34180C7A: E00E B 46L1 ; 0x34180C9A 0x34180C7C: 6ECD LDR R5, [R1, #108] 0x34180C7E: 012B LSLS R3, R5, #4 0x34180C80: D432 BMI 46L2 ; 0x34180CE8 0x34180C82: F101 0C70 ADD.W R12, R1, #112 0x34180C86: F101 0E74 ADD.W LR, R1, #116 0x34180C8A: E006 B 46L1 ; 0x34180C9A 0x34180C8C: 6CCD LDR R5, [R1, #76] 0x34180C8E: 012B LSLS R3, R5, #4 0x34180C90: D42A BMI 46L2 ; 0x34180CE8 0x34180C92: F101 0C50 ADD.W R12, R1, #80 0x34180C96: F101 0E54 ADD.W LR, R1, #84
.L1: 0x34180C9A: F8DC 3000 LDR.W R3, [R12] 0x34180C9E: F3C5 240B UBFX R4, R5, #8, #12 0x34180CA2: F023 437F BIC R3, R3, #0xFF000000 0x34180CA6: EE01 3A10 VMOV S2, R3 0x34180CAA: F8DE 2000 LDR.W R2, [LR] 0x34180CAE: EE00 4A10 VMOV S0, R4 0x34180CB2: EEB8 1A41 VCVT.F32.U32 S2, S2 0x34180CB6: ED9F 2A34 VLDR S4, =0x33800000 ; [PC, #208] [0x34180D88] 0x34180CBA: F3C5 5305 UBFX R3, R5, #20, #6 0x34180CBE: F3C2 64C2 UBFX R4, R2, #27, #3 0x34180CC2: F3C2 6202 UBFX R2, R2, #24, #3 0x34180CC6: EEB8 0A40 VCVT.F32.U32 S0, S0 0x34180CCA: EE21 1A02 VMUL.F32 S2, S2, S4 0x34180CCE: 4362 MULS R2, R4, R2 0x34180CD0: EE31 0A00 VADD.F32 S0, S2, S0 0x34180CD4: EE01 3A10 VMOV S2, R3 0x34180CD8: 2301 MOVS R3, #1 0x34180CDA: EEB8 2A41 VCVT.F32.U32 S4, S2 0x34180CDE: EE01 2A10 VMOV S2, R2 0x34180CE2: EEB8 1A41 VCVT.F32.U32 S2, S2 0x34180CE6: E006 B 46L3 ; 0x34180CF6
.L2: 0x34180CE8: ED9F 0A26 VLDR S0, =0x00000000 ; [PC, #152] [0x34180D84] 0x34180CEC: 2300 MOVS R3, #0 0x34180CEE: EEB0 1A40 VMOV.F32 S2, S0 0x34180CF2: EEB0 2A40 VMOV.F32 S4, S0
.L3: 0x34180CF6: F3C5 7202 UBFX R2, R5, #28, #3 0x34180CFA: 2A03 CMP R2, #3 0x34180CFC: D83D BHI 46L7 ; 0x34180D7A 0x34180CFE: E8DF F002 TBB 91PC, R2] 0x34180D02: 02 DC.B 0x02 ; '\x02' 0x34180D03: 0D DC.B 0x0D ; '\r' 0x34180D04: 1E DC.B 0x1E ; '\x1E' 0x34180D05: 1A DC.B 0x1A ; '\x1A' 0x34180D06: 6848 LDR R0, [R1, #4] 0x34180D08: F249 0200 MOVW R2, #0x9000 0x34180D0C: F2C0 32D0 MOVT R2, #0x03D0 0x34180D10: F3C0 10C1 UBFX R0, R0, #7, #2 0x34180D14: FA22 F000 LSR.W R0, R2, R0 0x34180D18: B993 CBNZ R3, .L4 ; 0x34180D40 0x34180D1A: E01F B 46L5 ; 0x34180D5C 0x34180D1C: 6808 LDR R0, [R1] 0x34180D1E: 0580 LSLS R0, R0, #22 0x34180D20: F242 4000 MOVW R0, #0x2400 0x34180D24: F2C0 00F4 MOVT R0, #244 0x34180D28: BF5C ITT PL 0x34180D2A: F640 1000 MOVWPL R0, #0x0900 0x34180D2E: F2C0 003D MOVTPL R0, #61 0x34180D32: B92B CBNZ R3, .L4 ; 0x34180D40 0x34180D34: E012 B 46L5 ; 0x34180D5C 0x34180D36: F248 0000 MOVW R0, #0x8000 0x34180D3A: F2C0 00BB MOVT R0, #187 0x34180D3E: B16B CBZ R3, .L5 ; 0x34180D5C
.L4: 0x34180D40: EE03 0A10 VMOV S6, R0 0x34180D44: EEB8 3A43 VCVT.F32.U32 S6, S6 0x34180D48: EE20 0A03 VMUL.F32 S0, S0, S6 0x34180D4C: EE80 0A02 VDIV.F32 S0, S0, S4 0x34180D50: EE80 0A01 VDIV.F32 S0, S0, S2 0x34180D54: EEBC 0AC0 VCVT.U32.F32 S0, S0 0x34180D58: EE10 0A10 VMOV R0, S0
.L5: 0x34180D5C: F8D1 1080 LDR.W R1, [R1, #128] 0x34180D60: 2201 MOVS R2, #1 0x34180D62: FA52 F1A1 UXTAB R1, R2, R1, ROR #16 0x34180D66: FBB0 F0F1 UDIV R0, R0, R1 0x34180D6A: E8BD 4030 POP.W 123R4-R5, LR}
.L6: 0x34180D6E: F242 21AC MOVW R1, #0x22AC ; 0x341822AC = SystemCoreClock 0x34180D72: F2C3 4118 MOVT R1, #0x3418 ; 0x341822AC = SystemCoreClock 0x34180D76: 6008 STR R0, [R1] 0x34180D78: 4770 BX LR
.L7: 0x34180D7A: 2000 MOVS R0, #0 0x34180D7C: 2B00 CMP R3, #0 0x34180D7E: D1DF BNE 46L4 ; 0x34180D40 0x34180D80: E7EC B 46L5 ; 0x34180D5C 0x34180D82: BF00 NOP 0x34180D84: 00000000 DC.W 0x00000000 0x34180D88: 33800000 DC.W 0x33800000

Section .text.HAL_RCC_ClockConfig from blto2_FSBL_lto.o, size=1472, align=4


HAL_RCC_ClockConfig: 0x34180D8C: B570 PUSH 123R4-R6, LR} 0x34180D8E: 6801 LDR R1, [R0] 0x34180D90: F248 0424 MOVW R4, #0x8024 0x34180D94: F2C5 6402 MOVT R4, #0x5602 0x34180D98: 070A LSLS R2, R1, #28 0x34180D9A: D46A BMI 46L13 ; 0x34180E72 0x34180D9C: 06CA LSLS R2, R1, #27 0x34180D9E: D475 BMI 46L14 ; 0x34180E8C
.L1: 0x34180DA0: 068A LSLS R2, R1, #26 0x34180DA2: F100 8081 BMI.W 46L15 ; 0x34180EA8
.L2: 0x34180DA6: 064A LSLS R2, R1, #25 0x34180DA8: F100 808C BMI.W 46L16 ; 0x34180EC4
.L3: 0x34180DAC: 074A LSLS R2, R1, #29 0x34180DAE: F100 8097 BMI.W 46L17 ; 0x34180EE0
.L4: 0x34180DB2: 07CA LSLS R2, R1, #31 0x34180DB4: F040 80A2 BNE.W 46L18 ; 0x34180EFC
.L5: 0x34180DB8: 078A LSLS R2, R1, #30 0x34180DBA: F100 8216 BMI.W 46L39 ; 0x341811EA
.L6: 0x34180DBE: 074A LSLS R2, R1, #29 0x34180DC0: F100 8241 BMI.W 46L43 ; 0x34181246
.L7: 0x34180DC4: 070A LSLS R2, R1, #28 0x34180DC6: F100 824C BMI.W 46L44 ; 0x34181262
.L8: 0x34180DCA: 06CA LSLS R2, R1, #27 0x34180DCC: F100 8257 BMI.W 46L45 ; 0x3418127E
.L9: 0x34180DD0: 068A LSLS R2, R1, #26 0x34180DD2: F100 8262 BMI.W 46L46 ; 0x3418129A
.L10: 0x34180DD6: 0649 LSLS R1, R1, #25 0x34180DD8: D50A BPL 46L12 ; 0x34180DF0
.L11: 0x34180DDA: 69C0 LDR R0, [R0, #28] 0x34180DDC: 6821 LDR R1, [R4] 0x34180DDE: F401 21E0 AND R1, R1, #0x070000 0x34180DE2: 4288 CMP R0, R1 0x34180DE4: BF3F ITTTT CC 0x34180DE6: 6821 LDRCC R1, [R4] 0x34180DE8: F421 21E0 BICCC R1, R1, #0x070000 0x34180DEC: 4308 ORRCC R0, R1 0x34180DEE: 6020 STRCC R0, [R4]
.L12: 0x34180DF0: F242 20AC MOVW R0, #0x22AC ; 0x341822AC = SystemCoreClock 0x34180DF4: F644 51D3 MOVW R1, #0x4DD3 0x34180DF8: F2C3 4018 MOVT R0, #0x3418 ; 0x341822AC = SystemCoreClock 0x34180DFC: 6800 LDR R0, [R0] 0x34180DFE: F2C1 0162 MOVT R1, #0x1062 0x34180E02: FBA0 0101 UMULL R0, R1, R0, R1 0x34180E06: F04F 30FF MOV.W R0, #0xFFFFFFFF 0x34180E0A: EB00 1091 ADD.W R0, R0, R1, LSR #6 0x34180E0E: 0E01 LSRS R1, R0, #24 0x34180E10: F040 81DA BNE.W 46L34 ; 0x341811C8 0x34180E14: F242 21A8 MOVW R1, #0x22A8 ; 0x341822A8 = uwTickPrio 0x34180E18: F24E 0310 MOVW R3, #0xE010 0x34180E1C: F2C3 4118 MOVT R1, #0x3418 ; 0x341822A8 = uwTickPrio 0x34180E20: 780A LDRB R2, [R1] 0x34180E22: F2CE 0300 MOVT R3, #0xE000 0x34180E26: 6058 STR R0, [R3, #4] 0x34180E28: 20F0 MOVS R0, #240 0x34180E2A: 2A01 CMP R2, #1 0x34180E2C: F603 5213 ADDW R2, R3, #0x0D13 0x34180E30: 7010 STRB R0, [R2] 0x34180E32: F04F 0000 MOV.W R0, #0 0x34180E36: 6098 STR R0, [R3, #8] 0x34180E38: F04F 0007 MOV.W R0, #7 0x34180E3C: 6018 STR R0, [R3] 0x34180E3E: F04F 0001 MOV.W R0, #1 0x34180E42: F040 808A BNE.W 46L20 ; 0x34180F5A 0x34180E46: F852 3C17 LDR R3, [R2, #-23] 0x34180E4A: F04F 35FF MOV.W R5, #0xFFFFFFFF 0x34180E4E: F3C3 2302 UBFX R3, R3, #8, #3 0x34180E52: F083 0607 EOR R6, R3, #7 0x34180E56: 2E04 CMP R6, #4 0x34180E58: BF28 IT CS 0x34180E5A: 2604 MOVCS R6, #4 0x34180E5C: FA05 F606 LSL.W R6, R5, R6 0x34180E60: 43F6 MVNS R6, R6 0x34180E62: 3B03 SUBS R3, #3 0x34180E64: BF28 IT CS 0x34180E66: 409E LSLCS R6, R3 0x34180E68: 0133 LSLS R3, R6, #4 0x34180E6A: 7013 STRB R3, [R2] 0x34180E6C: 7008 STRB R0, [R1] 0x34180E6E: 2000 MOVS R0, #0 0x34180E70: BD70 POP 123R4-R6, PC}
.L13: 0x34180E72: 6902 LDR R2, [R0, #16] 0x34180E74: 6823 LDR R3, [R4] 0x34180E76: F003 0307 AND R3, R3, #7 0x34180E7A: 429A CMP R2, R3 0x34180E7C: BF81 ITTTT HI 0x34180E7E: 6823 LDRHI R3, [R4] 0x34180E80: F023 0307 BICHI R3, R3, #7 0x34180E84: 431A ORRHI R2, R3 0x34180E86: 6022 STRHI R2, [R4] 0x34180E88: 06CA LSLS R2, R1, #27 0x34180E8A: D589 BPL 46L1 ; 0x34180DA0
.L14: 0x34180E8C: 6942 LDR R2, [R0, #20] 0x34180E8E: 6823 LDR R3, [R4] 0x34180E90: F003 0370 AND R3, R3, #112 0x34180E94: 429A CMP R2, R3 0x34180E96: BF81 ITTTT HI 0x34180E98: 6823 LDRHI R3, [R4] 0x34180E9A: F023 0370 BICHI R3, R3, #112 0x34180E9E: 431A ORRHI R2, R3 0x34180EA0: 6022 STRHI R2, [R4] 0x34180EA2: 068A LSLS R2, R1, #26 0x34180EA4: F57F AF7F BPL.W 46L2 ; 0x34180DA6
.L15: 0x34180EA8: 6982 LDR R2, [R0, #24] 0x34180EAA: 6823 LDR R3, [R4] 0x34180EAC: F403 43E0 AND R3, R3, #0x7000 0x34180EB0: 429A CMP R2, R3 0x34180EB2: BF81 ITTTT HI 0x34180EB4: 6823 LDRHI R3, [R4] 0x34180EB6: F423 43E0 BICHI R3, R3, #0x7000 0x34180EBA: 431A ORRHI R2, R3 0x34180EBC: 6022 STRHI R2, [R4] 0x34180EBE: 064A LSLS R2, R1, #25 0x34180EC0: F57F AF74 BPL.W 46L3 ; 0x34180DAC
.L16: 0x34180EC4: 69C2 LDR R2, [R0, #28] 0x34180EC6: 6823 LDR R3, [R4] 0x34180EC8: F403 23E0 AND R3, R3, #0x070000 0x34180ECC: 429A CMP R2, R3 0x34180ECE: BF81 ITTTT HI 0x34180ED0: 6823 LDRHI R3, [R4] 0x34180ED2: F423 23E0 BICHI R3, R3, #0x070000 0x34180ED6: 431A ORRHI R2, R3 0x34180ED8: 6022 STRHI R2, [R4] 0x34180EDA: 074A LSLS R2, R1, #29 0x34180EDC: F57F AF69 BPL.W 46L4 ; 0x34180DB2
.L17: 0x34180EE0: 68C2 LDR R2, [R0, #12] 0x34180EE2: 6823 LDR R3, [R4] 0x34180EE4: F403 03E0 AND R3, R3, #0x700000 0x34180EE8: 429A CMP R2, R3 0x34180EEA: BF81 ITTTT HI 0x34180EEC: 6823 LDRHI R3, [R4] 0x34180EEE: F423 03E0 BICHI R3, R3, #0x700000 0x34180EF2: 431A ORRHI R2, R3 0x34180EF4: 6022 STRHI R2, [R4] 0x34180EF6: 07CA LSLS R2, R1, #31 0x34180EF8: F43F AF5E BEQ.W 46L5 ; 0x34180DB8
.L18: 0x34180EFC: 6841 LDR R1, [R0, #4] 0x34180EFE: F5B1 3F80 CMP.W R1, #0x010000 0x34180F02: D02B BEQ 46L21 ; 0x34180F5C 0x34180F04: F5B1 3F40 CMP.W R1, #0x030000 0x34180F08: D00A BEQ 46L19 ; 0x34180F20 0x34180F0A: F854 2C20 LDR R2, [R4, #-32] 0x34180F0E: F5B1 3F00 CMP.W R1, #0x020000 0x34180F12: D12B BNE 46L22 ; 0x34180F6C 0x34180F14: 06D1 LSLS R1, R2, #27 0x34180F16: F140 8157 BPL.W 46L34 ; 0x341811C8 0x34180F1A: F44F 3100 MOV.W R1, #0x020000 0x34180F1E: E028 B 46L23 ; 0x34180F72
.L19: 0x34180F20: 4605 MOV R5, R0 0x34180F22: 6A01 LDR R1, [R0, #32] 0x34180F24: F8D4 00A0 LDR.W R0, [R4, #160] 0x34180F28: F000 5040 AND R0, R0, #0x30000000 0x34180F2C: F000 FA0E BL RCC_IC_CheckPLLSources ; 0x3418134C 0x34180F30: 2800 CMP R0, #0 0x34180F32: F04F 0001 MOV.W R0, #1 0x34180F36: D010 BEQ 46L20 ; 0x34180F5A 0x34180F38: E9D5 1308 LDRD R1, R3, [R5, #32] 0x34180F3C: 2600 MOVS R6, #0 0x34180F3E: F6CF 76FF MOVT R6, #0xFFFF 0x34180F42: 2201 MOVS R2, #1 0x34180F44: 4628 MOV R0, R5 0x34180F46: EB06 4303 ADD.W R3, R6, R3, LSL #16 0x34180F4A: 430B ORRS R3, R1 0x34180F4C: 6869 LDR R1, [R5, #4] 0x34180F4E: F8C4 30A0 STR.W R3, [R4, #160] 0x34180F52: F604 231C ADDW R3, R4, #0x0A1C 0x34180F56: 601A STR R2, [R3] 0x34180F58: E00B B 46L23 ; 0x34180F72
.L20: 0x34180F5A: BD70 POP 123R4-R6, PC}
.L21: 0x34180F5C: F854 1C20 LDR R1, [R4, #-32] 0x34180F60: 0749 LSLS R1, R1, #29 0x34180F62: F140 8131 BPL.W 46L34 ; 0x341811C8 0x34180F66: F44F 3180 MOV.W R1, #0x010000 0x34180F6A: E002 B 46L23 ; 0x34180F72
.L22: 0x34180F6C: 0712 LSLS R2, R2, #28 0x34180F6E: F140 812B BPL.W 46L34 ; 0x341811C8
.L23: 0x34180F72: F854 2C04 LDR R2, [R4, #-4] 0x34180F76: F241 3688 MOVW R6, #0x1388 0x34180F7A: F422 3240 BIC R2, R2, #0x030000 0x34180F7E: 430A ORRS R2, R1 0x34180F80: F844 2C04 STR R2, [R4, #-4] 0x34180F84: F242 22A4 MOVW R2, #0x22A4 ; 0x341822A4 = uwTick 0x34180F88: F2C3 4218 MOVT R2, #0x3418 ; 0x341822A4 = uwTick 0x34180F8C: 6813 LDR R3, [R2] 0x34180F8E: BF00 NOP
.L24: 0x34180F90: F854 5C04 LDR R5, [R4, #-4] 0x34180F94: F405 1540 AND R5, R5, #0x300000 0x34180F98: EBB5 1F01 CMP.W R5, R1, LSL #4 0x34180F9C: D005 BEQ 46L25 ; 0x34180FAA 0x34180F9E: 6815 LDR R5, [R2] 0x34180FA0: 1AED SUBS R5, R5, R3 0x34180FA2: 42B5 CMP R5, R6 0x34180FA4: D9F4 BLS 46L24 ; 0x34180F90 0x34180FA6: 2003 MOVS R0, #3 0x34180FA8: BD70 POP 123R4-R6, PC}
.L25: 0x34180FAA: F854 1C04 LDR R1, [R4, #-4] 0x34180FAE: F3C1 5201 UBFX R2, R1, #20, #2 0x34180FB2: F646 4100 MOVW R1, #0x6C00 0x34180FB6: F2C0 21DC MOVT R1, #0x02DC 0x34180FBA: E8DF F012 TBH 91PC, R2, LSL #1] 0x34180FBE: 04 DC.B 0x04 ; '\x04' 0x34180FBF: 00 DC.B 0x00 ; '\0' 0x34180FC0: 0E DC.B 0x0E ; '\x0E' 0x34180FC1: 00 DC.B 0x00 ; '\0' 0x34180FC2: 0D DC.B 0x0D ; '\r' 0x34180FC3: 01 DC.B 0x01 ; '\x01' 0x34180FC4: 1B DC.B 0x1B ; '\x1B' 0x34180FC5: 00 DC.B 0x00 ; '\0' 0x34180FC6: 6A61 LDR R1, [R4, #36] 0x34180FC8: F249 0200 MOVW R2, #0x9000 0x34180FCC: F2C0 32D0 MOVT R2, #0x03D0 0x34180FD0: F3C1 11C1 UBFX R1, R1, #7, #2 0x34180FD4: FA22 F101 LSR.W R1, R2, R1 0x34180FD8: E0FE B 46L38 ; 0x341811D8 0x34180FDA: 6A21 LDR R1, [R4, #32] 0x34180FDC: 0589 LSLS R1, R1, #22 0x34180FDE: F242 4100 MOVW R1, #0x2400 0x34180FE2: F2C0 01F4 MOVT R1, #244 0x34180FE6: F100 80F7 BMI.W 46L38 ; 0x341811D8 0x34180FEA: F640 1100 MOVW R1, #0x0900 0x34180FEE: F2C0 013D MOVT R1, #61 0x34180FF2: E0F1 B 46L38 ; 0x341811D8 0x34180FF4: F8D4 10A0 LDR.W R1, [R4, #160] 0x34180FF8: 2201 MOVS R2, #1 0x34180FFA: FA52 F5A1 UXTAB R5, R2, R1, ROR #16 0x34180FFE: F8D4 10A0 LDR.W R1, [R4, #160] 0x34181002: F3C1 7201 UBFX R2, R1, #28, #2 0x34181006: F854 1C20 LDR R1, [R4, #-32] 0x3418100A: E8DF F002 TBB 91PC, R2] 0x3418100E: 02 DC.B 0x02 ; '\x02' 0x3418100F: 1C DC.B 0x1C ; '\x1C' 0x34181010: 0A DC.B 0x0A ; '\n' 0x34181011: 12 DC.B 0x12 ; '\x12' 0x34181012: 05C9 LSLS R1, R1, #23 0x34181014: D475 BMI 46L30 ; 0x34181102 0x34181016: 6DE1 LDR R1, [R4, #92] 0x34181018: 0109 LSLS R1, R1, #4 0x3418101A: F140 80DA BPL.W 46L36 ; 0x341811D2 0x3418101E: 6DE1 LDR R1, [R4, #92] 0x34181020: E019 B 46L26 ; 0x34181056 0x34181022: 0549 LSLS R1, R1, #21 0x34181024: D41F BMI 46L28 ; 0x34181066 0x34181026: 6FE1 LDR R1, [R4, #124] 0x34181028: 0109 LSLS R1, R1, #4 0x3418102A: F140 80D2 BPL.W 46L36 ; 0x341811D2 0x3418102E: 6FE1 LDR R1, [R4, #124] 0x34181030: E011 B 46L26 ; 0x34181056 0x34181032: 0509 LSLS R1, R1, #20 0x34181034: D43D BMI 46L29 ; 0x341810B2 0x34181036: F8D4 108C LDR.W R1, [R4, #140] 0x3418103A: 0109 LSLS R1, R1, #4 0x3418103C: F140 80C9 BPL.W 46L36 ; 0x341811D2 0x34181040: F8D4 108C LDR.W R1, [R4, #140] 0x34181044: E007 B 46L26 ; 0x34181056 0x34181046: 0589 LSLS R1, R1, #22 0x34181048: F100 80C0 BMI.W 46L35 ; 0x341811CC 0x3418104C: 6EE1 LDR R1, [R4, #108] 0x3418104E: 0109 LSLS R1, R1, #4 0x34181050: F140 80BF BPL.W 46L36 ; 0x341811D2 0x34181054: 6EE1 LDR R1, [R4, #108]
.L26: 0x34181056: 4606 MOV R6, R0 0x34181058: F001 40E0 AND R0, R1, #0x70000000 0x3418105C: F000 F9C0 BL RCCEx_GetPLLSourceFreq ; 0x341813E0 0x34181060: 4601 MOV R1, R0
.L27: 0x34181062: 4630 MOV R0, R6 0x34181064: E0B6 B 46L37 ; 0x341811D4
.L28: 0x34181066: F8D4 1084 LDR.W R1, [R4, #132] 0x3418106A: 0049 LSLS R1, R1, #1 0x3418106C: F140 80B1 BPL.W 46L36 ; 0x341811D2 0x34181070: 4606 MOV R6, R0 0x34181072: 6FE0 LDR R0, [R4, #124] 0x34181074: F000 40E0 AND R0, R0, #0x70000000 0x34181078: F000 F9B2 BL RCCEx_GetPLLSourceFreq ; 0x341813E0 0x3418107C: 0001 MOVS R1, R0 0x3418107E: D0F0 BEQ 46L27 ; 0x34181062 0x34181080: 6FE0 LDR R0, [R4, #124] 0x34181082: F3C0 5205 UBFX R2, R0, #20, #6 0x34181086: 4630 MOV R0, R6 0x34181088: 2A00 CMP R2, #0 0x3418108A: F000 80A2 BEQ.W 46L36 ; 0x341811D2 0x3418108E: EE00 1A10 VMOV S0, R1 0x34181092: 6FE1 LDR R1, [R4, #124] 0x34181094: F8D4 3080 LDR.W R3, [R4, #128] 0x34181098: F3C1 210B UBFX R1, R1, #8, #12 0x3418109C: F023 437F BIC R3, R3, #0xFF000000 0x341810A0: EE01 1A10 VMOV S2, R1 0x341810A4: F8D4 1084 LDR.W R1, [R4, #132] 0x341810A8: EE02 3A10 VMOV S4, R3 0x341810AC: F8D4 3084 LDR.W R3, [R4, #132] 0x341810B0: E120 B 46L48 ; 0x341812F4
.L29: 0x341810B2: F8D4 1094 LDR.W R1, [R4, #148] 0x341810B6: 0049 LSLS R1, R1, #1 0x341810B8: F140 808B BPL.W 46L36 ; 0x341811D2 0x341810BC: 4606 MOV R6, R0 0x341810BE: F8D4 008C LDR.W R0, [R4, #140] 0x341810C2: F000 40E0 AND R0, R0, #0x70000000 0x341810C6: F000 F98B BL RCCEx_GetPLLSourceFreq ; 0x341813E0 0x341810CA: 0001 MOVS R1, R0 0x341810CC: D0C9 BEQ 46L27 ; 0x34181062 0x341810CE: F8D4 008C LDR.W R0, [R4, #140] 0x341810D2: F3C0 5205 UBFX R2, R0, #20, #6 0x341810D6: 4630 MOV R0, R6 0x341810D8: 2A00 CMP R2, #0 0x341810DA: D07A BEQ 46L36 ; 0x341811D2 0x341810DC: EE00 1A10 VMOV S0, R1 0x341810E0: F8D4 108C LDR.W R1, [R4, #140] 0x341810E4: F8D4 3090 LDR.W R3, [R4, #144] 0x341810E8: F3C1 210B UBFX R1, R1, #8, #12 0x341810EC: F023 437F BIC R3, R3, #0xFF000000 0x341810F0: EE01 1A10 VMOV S2, R1 0x341810F4: F8D4 1094 LDR.W R1, [R4, #148] 0x341810F8: EE02 3A10 VMOV S4, R3 0x341810FC: F8D4 3094 LDR.W R3, [R4, #148] 0x34181100: E0F8 B 46L48 ; 0x341812F4
.L30: 0x34181102: 6E61 LDR R1, [R4, #100] 0x34181104: 0049 LSLS R1, R1, #1 0x34181106: D564 BPL 46L36 ; 0x341811D2 0x34181108: 4606 MOV R6, R0 0x3418110A: 6DE0 LDR R0, [R4, #92] 0x3418110C: F000 40E0 AND R0, R0, #0x70000000 0x34181110: F000 F966 BL RCCEx_GetPLLSourceFreq ; 0x341813E0 0x34181114: 0001 MOVS R1, R0 0x34181116: D0A4 BEQ 46L27 ; 0x34181062 0x34181118: 6DE0 LDR R0, [R4, #92] 0x3418111A: F3C0 5205 UBFX R2, R0, #20, #6 0x3418111E: 4630 MOV R0, R6 0x34181120: 2A00 CMP R2, #0 0x34181122: D056 BEQ 46L36 ; 0x341811D2 0x34181124: EE00 1A10 VMOV S0, R1 0x34181128: 6DE1 LDR R1, [R4, #92] 0x3418112A: 6E23 LDR R3, [R4, #96] 0x3418112C: F3C1 210B UBFX R1, R1, #8, #12 0x34181130: F023 437F BIC R3, R3, #0xFF000000 0x34181134: EE01 1A10 VMOV S2, R1 0x34181138: 6E61 LDR R1, [R4, #100] 0x3418113A: EE02 3A10 VMOV S4, R3 0x3418113E: 6E63 LDR R3, [R4, #100] 0x34181140: E0D8 B 46L48 ; 0x341812F4
.L31: 0x34181142: 4605 MOV R5, R0 0x34181144: 6A81 LDR R1, [R0, #40] 0x34181146: F8D4 00A4 LDR.W R0, [R4, #164] 0x3418114A: F000 5040 AND R0, R0, #0x30000000 0x3418114E: F000 F8FD BL RCC_IC_CheckPLLSources ; 0x3418134C 0x34181152: B3C8 CBZ R0, .L34 ; 0x341811C8 0x34181154: F8D4 00B4 LDR.W R0, [R4, #180] 0x34181158: 6B29 LDR R1, [R5, #48] 0x3418115A: F000 5040 AND R0, R0, #0x30000000 0x3418115E: F000 F8F5 BL RCC_IC_CheckPLLSources ; 0x3418134C 0x34181162: B388 CBZ R0, .L34 ; 0x341811C8 0x34181164: F8D4 00C8 LDR.W R0, [R4, #200] 0x34181168: 6BA9 LDR R1, [R5, #56] 0x3418116A: F000 5040 AND R0, R0, #0x30000000 0x3418116E: F000 F8ED BL RCC_IC_CheckPLLSources ; 0x3418134C 0x34181172: B348 CBZ R0, .L34 ; 0x341811C8 0x34181174: E9D5 210A LDRD R2, R1, [R5, #40] 0x34181178: 2300 MOVS R3, #0 0x3418117A: F6CF 73FF MOVT R3, #0xFFFF 0x3418117E: 4628 MOV R0, R5 0x34181180: 6B2E LDR R6, [R5, #48] 0x34181182: EB03 4101 ADD.W R1, R3, R1, LSL #16 0x34181186: 430A ORRS R2, R1 0x34181188: 68A9 LDR R1, [R5, #8] 0x3418118A: F8C4 20A4 STR.W R2, [R4, #164] 0x3418118E: 6B6A LDR R2, [R5, #52] 0x34181190: EB03 4202 ADD.W R2, R3, R2, LSL #16 0x34181194: 4332 ORRS R2, R6 0x34181196: F8C4 20B4 STR.W R2, [R4, #180] 0x3418119A: 6BEA LDR R2, [R5, #60] 0x3418119C: EB03 4202 ADD.W R2, R3, R2, LSL #16 0x341811A0: 6BAB LDR R3, [R5, #56] 0x341811A2: 431A ORRS R2, R3 0x341811A4: F240 4322 MOVW R3, #0x0422 0x341811A8: F8C4 20C8 STR.W R2, [R4, #200] 0x341811AC: F648 2240 MOVW R2, #0x8A40 0x341811B0: F2C5 6202 MOVT R2, #0x5602 0x341811B4: 6013 STR R3, [R2] 0x341811B6: E027 B 46L40 ; 0x34181208
.L32: 0x341811B8: F854 1C20 LDR R1, [R4, #-32] 0x341811BC: 0709 LSLS R1, R1, #28 0x341811BE: D503 BPL 46L34 ; 0x341811C8 0x341811C0: 2100 MOVS R1, #0 0x341811C2: E021 B 46L40 ; 0x34181208
.L33: 0x341811C4: 0752 LSLS R2, R2, #29 0x341811C6: D41F BMI 46L40 ; 0x34181208
.L34: 0x341811C8: 2001 MOVS R0, #1 0x341811CA: BD70 POP 123R4-R6, PC}
.L35: 0x341811CC: 6F61 LDR R1, [R4, #116] 0x341811CE: 0049 LSLS R1, R1, #1 0x341811D0: D472 BMI 46L47 ; 0x341812B8
.L36: 0x341811D2: 2100 MOVS R1, #0
.L37: 0x341811D4: FBB1 F1F5 UDIV R1, R1, R5
.L38: 0x341811D8: F242 22AC MOVW R2, #0x22AC ; 0x341822AC = SystemCoreClock 0x341811DC: F2C3 4218 MOVT R2, #0x3418 ; 0x341822AC = SystemCoreClock 0x341811E0: 6011 STR R1, [R2] 0x341811E2: 6801 LDR R1, [R0] 0x341811E4: 078A LSLS R2, R1, #30 0x341811E6: F57F ADEA BPL.W 46L6 ; 0x34180DBE
.L39: 0x341811EA: 6881 LDR R1, [R0, #8] 0x341811EC: 2900 CMP R1, #0 0x341811EE: D0E3 BEQ 46L32 ; 0x341811B8 0x341811F0: F1B1 7F40 CMP.W R1, #0x03000000 0x341811F4: D0A5 BEQ 46L31 ; 0x34181142 0x341811F6: F854 2C20 LDR R2, [R4, #-32] 0x341811FA: F1B1 7F00 CMP.W R1, #0x02000000 0x341811FE: D1E1 BNE 46L33 ; 0x341811C4 0x34181200: 06D1 LSLS R1, R2, #27 0x34181202: D5E1 BPL 46L34 ; 0x341811C8 0x34181204: F04F 7100 MOV.W R1, #0x02000000
.L40: 0x34181208: F854 2C04 LDR R2, [R4, #-4] 0x3418120C: F241 3688 MOVW R6, #0x1388 0x34181210: F022 7240 BIC R2, R2, #0x03000000 0x34181214: 430A ORRS R2, R1 0x34181216: F844 2C04 STR R2, [R4, #-4] 0x3418121A: F242 22A4 MOVW R2, #0x22A4 ; 0x341822A4 = uwTick 0x3418121E: F2C3 4218 MOVT R2, #0x3418 ; 0x341822A4 = uwTick 0x34181222: 6813 LDR R3, [R2]
.L41: 0x34181224: F854 5C04 LDR R5, [R4, #-4] 0x34181228: F005 5540 AND R5, R5, #0x30000000 0x3418122C: EBB5 1F01 CMP.W R5, R1, LSL #4 0x34181230: D005 BEQ 46L42 ; 0x3418123E 0x34181232: 6815 LDR R5, [R2] 0x34181234: 1AED SUBS R5, R5, R3 0x34181236: 42B5 CMP R5, R6 0x34181238: D9F4 BLS 46L41 ; 0x34181224 0x3418123A: 2003 MOVS R0, #3 0x3418123C: BD70 POP 123R4-R6, PC}
.L42: 0x3418123E: 6801 LDR R1, [R0] 0x34181240: 074A LSLS R2, R1, #29 0x34181242: F57F ADBF BPL.W 46L7 ; 0x34180DC4
.L43: 0x34181246: 68C2 LDR R2, [R0, #12] 0x34181248: 6823 LDR R3, [R4] 0x3418124A: F403 03E0 AND R3, R3, #0x700000 0x3418124E: 429A CMP R2, R3 0x34181250: BF3F ITTTT CC 0x34181252: 6823 LDRCC R3, [R4] 0x34181254: F423 03E0 BICCC R3, R3, #0x700000 0x34181258: 431A ORRCC R2, R3 0x3418125A: 6022 STRCC R2, [R4] 0x3418125C: 070A LSLS R2, R1, #28 0x3418125E: F57F ADB4 BPL.W 46L8 ; 0x34180DCA
.L44: 0x34181262: 6902 LDR R2, [R0, #16] 0x34181264: 6823 LDR R3, [R4] 0x34181266: F003 0307 AND R3, R3, #7 0x3418126A: 429A CMP R2, R3 0x3418126C: BF3F ITTTT CC 0x3418126E: 6823 LDRCC R3, [R4] 0x34181270: F023 0307 BICCC R3, R3, #7 0x34181274: 431A ORRCC R2, R3 0x34181276: 6022 STRCC R2, [R4] 0x34181278: 06CA LSLS R2, R1, #27 0x3418127A: F57F ADA9 BPL.W 46L9 ; 0x34180DD0
.L45: 0x3418127E: 6942 LDR R2, [R0, #20] 0x34181280: 6823 LDR R3, [R4] 0x34181282: F003 0370 AND R3, R3, #112 0x34181286: 429A CMP R2, R3 0x34181288: BF3F ITTTT CC 0x3418128A: 6823 LDRCC R3, [R4] 0x3418128C: F023 0370 BICCC R3, R3, #112 0x34181290: 431A ORRCC R2, R3 0x34181292: 6022 STRCC R2, [R4] 0x34181294: 068A LSLS R2, R1, #26 0x34181296: F57F AD9E BPL.W 46L10 ; 0x34180DD6
.L46: 0x3418129A: 6982 LDR R2, [R0, #24] 0x3418129C: 6823 LDR R3, [R4] 0x3418129E: F403 43E0 AND R3, R3, #0x7000 0x341812A2: 429A CMP R2, R3 0x341812A4: BF3F ITTTT CC 0x341812A6: 6823 LDRCC R3, [R4] 0x341812A8: F423 43E0 BICCC R3, R3, #0x7000 0x341812AC: 431A ORRCC R2, R3 0x341812AE: 6022 STRCC R2, [R4] 0x341812B0: 0649 LSLS R1, R1, #25 0x341812B2: F53F AD92 BMI.W 46L11 ; 0x34180DDA 0x341812B6: E59B B 46L12 ; 0x34180DF0
.L47: 0x341812B8: 4606 MOV R6, R0 0x341812BA: 6EE0 LDR R0, [R4, #108] 0x341812BC: F000 40E0 AND R0, R0, #0x70000000 0x341812C0: F000 F88E BL RCCEx_GetPLLSourceFreq ; 0x341813E0 0x341812C4: 0001 MOVS R1, R0 0x341812C6: F43F AECC BEQ.W 46L27 ; 0x34181062 0x341812CA: 6EE0 LDR R0, [R4, #108] 0x341812CC: F3C0 5205 UBFX R2, R0, #20, #6 0x341812D0: 4630 MOV R0, R6 0x341812D2: 2A00 CMP R2, #0 0x341812D4: F43F AF7D BEQ.W 46L36 ; 0x341811D2 0x341812D8: EE00 1A10 VMOV S0, R1 0x341812DC: 6EE1 LDR R1, [R4, #108] 0x341812DE: 6F23 LDR R3, [R4, #112] 0x341812E0: F3C1 210B UBFX R1, R1, #8, #12 0x341812E4: F023 437F BIC R3, R3, #0xFF000000 0x341812E8: EE01 1A10 VMOV S2, R1 0x341812EC: 6F61 LDR R1, [R4, #116] 0x341812EE: EE02 3A10 VMOV S4, R3 0x341812F2: 6F63 LDR R3, [R4, #116]
.L48: 0x341812F4: EEB8 2A42 VCVT.F32.U32 S4, S4 0x341812F8: ED9F 3A13 VLDR S6, =0x33800000 ; [PC, #76] [0x34181348] 0x341812FC: EEB8 1A41 VCVT.F32.U32 S2, S2 0x34181300: EE22 2A03 VMUL.F32 S4, S4, S6 0x34181304: EEB8 0A40 VCVT.F32.U32 S0, S0 0x34181308: EE32 1A01 VADD.F32 S2, S4, S2 0x3418130C: F3C1 61C2 UBFX R1, R1, #27, #3 0x34181310: EE21 0A00 VMUL.F32 S0, S2, S0 0x34181314: EE01 2A10 VMOV S2, R2 0x34181318: F3C3 6302 UBFX R3, R3, #24, #3 0x3418131C: EEB8 1A41 VCVT.F32.U32 S2, S2 0x34181320: EE80 0A01 VDIV.F32 S0, S0, S2 0x34181324: EE01 1A10 VMOV S2, R1 0x34181328: EEB8 1A41 VCVT.F32.U32 S2, S2 0x3418132C: EE80 0A01 VDIV.F32 S0, S0, S2 0x34181330: EE01 3A10 VMOV S2, R3 0x34181334: EEB8 1A41 VCVT.F32.U32 S2, S2 0x34181338: EE80 0A01 VDIV.F32 S0, S0, S2 0x3418133C: EEBC 0AC0 VCVT.U32.F32 S0, S0 0x34181340: EE10 1A10 VMOV R1, S0 0x34181344: E746 B 46L37 ; 0x341811D4 0x34181346: BF00 NOP 0x34181348: 33800000 DC.W 0x33800000

Section .text.RCC_IC_CheckPLLSources from blto2_FSBL_lto.o, size=148, align=4


RCC_IC_CheckPLLSources: 0x3418134C: F248 0204 MOVW R2, #0x8004 0x34181350: EA4F 7030 ROR R0, R0, #28 0x34181354: F2C5 6202 MOVT R2, #0x5602 0x34181358: 2803 CMP R0, #3 0x3418135A: D81F BHI 46L3 ; 0x3418139C 0x3418135C: E8DF F000 TBB 91PC, R0] 0x34181360: 02 DC.B 0x02 ; '\x02' 0x34181361: 18 DC.B 0x18 ; '\x18' 0x34181362: 08 DC.B 0x08 ; '\b' 0x34181363: 11 DC.B 0x11 ; '\x11' 0x34181364: 4610 MOV R0, R2 0x34181366: F850 3B7C LDR R3, [R0], #124 0x3418136A: 05DB LSLS R3, R3, #23 0x3418136C: D505 BPL 46L1 ; 0x3418137A 0x3418136E: E00D B 46L2 ; 0x3418138C 0x34181370: 4610 MOV R0, R2 0x34181372: F850 3B9C LDR R3, [R0], #156 0x34181376: 055B LSLS R3, R3, #21 0x34181378: D408 BMI 46L2 ; 0x3418138C
.L1: 0x3418137A: 6800 LDR R0, [R0] 0x3418137C: F3C0 60C0 UBFX R0, R0, #27, #1 0x34181380: E00D B 46L4 ; 0x3418139E 0x34181382: 4610 MOV R0, R2 0x34181384: F850 3BAC LDR R3, [R0], #172 0x34181388: 051B LSLS R3, R3, #20 0x3418138A: D5F6 BPL 46L1 ; 0x3418137A
.L2: 0x3418138C: 2001 MOVS R0, #1 0x3418138E: E006 B 46L4 ; 0x3418139E 0x34181390: 4610 MOV R0, R2 0x34181392: F850 3B8C LDR R3, [R0], #140 0x34181396: 059B LSLS R3, R3, #22 0x34181398: D4F8 BMI 46L2 ; 0x3418138C 0x3418139A: E7EE B 46L1 ; 0x3418137A
.L3: 0x3418139C: 2000 MOVS R0, #0
.L4: 0x3418139E: EA4F 7131 ROR R1, R1, #28 0x341813A2: 2903 CMP R1, #3 0x341813A4: D81A BHI 46L7 ; 0x341813DC 0x341813A6: E8DF F001 TBB 91PC, R1] 0x341813AA: 02 DC.B 0x02 ; '\x02' 0x341813AB: 14 DC.B 0x14 ; '\x14' 0x341813AC: 07 DC.B 0x07 ; '\x07' 0x341813AD: 0F DC.B 0x0F ; '\x0F' 0x341813AE: F852 1B7C LDR R1, [R2], #124 0x341813B2: 05C9 LSLS R1, R1, #23 0x341813B4: D504 BPL 46L5 ; 0x341813C0 0x341813B6: 4770 BX LR 0x341813B8: F852 1B9C LDR R1, [R2], #156 0x341813BC: 0549 LSLS R1, R1, #21 0x341813BE: D402 BMI 46L6 ; 0x341813C6
.L5: 0x341813C0: 6811 LDR R1, [R2] 0x341813C2: EA00 60D1 AND.W R0, R0, R1, LSR #27
.L6: 0x341813C6: 4770 BX LR 0x341813C8: F852 1BAC LDR R1, [R2], #172 0x341813CC: 0509 LSLS R1, R1, #20 0x341813CE: D5F7 BPL 46L5 ; 0x341813C0 0x341813D0: 4770 BX LR 0x341813D2: F852 1B8C LDR R1, [R2], #140 0x341813D6: 0589 LSLS R1, R1, #22 0x341813D8: D5F2 BPL 46L5 ; 0x341813C0 0x341813DA: 4770 BX LR
.L7: 0x341813DC: 2000 MOVS R0, #0 0x341813DE: 4770 BX LR

Section .text.RCCEx_GetPLLSourceFreq from blto2_FSBL_lto.o, size=128, align=4


RCCEx_GetPLLSourceFreq: 0x341813E0: EA4F 7030 ROR R0, R0, #28 0x341813E4: 2803 CMP R0, #3 0x341813E6: D82D BHI 46L1 ; 0x34181444 0x341813E8: E8DF F000 TBB 91PC, R0] 0x341813EC: 02 DC.B 0x02 ; '\x02' 0x341813ED: 25 DC.B 0x25 ; '%' 0x341813EE: 13 DC.B 0x13 ; '\x13' 0x341813EF: 20 DC.B 0x20 ; ' ' 0x341813F0: F248 0004 MOVW R0, #0x8004 0x341813F4: F2C5 6002 MOVT R0, #0x5602 0x341813F8: 6801 LDR R1, [R0] 0x341813FA: 0709 LSLS R1, R1, #28 0x341813FC: D522 BPL 46L1 ; 0x34181444 0x341813FE: 6C40 LDR R0, [R0, #68] 0x34181400: F249 0100 MOVW R1, #0x9000 0x34181404: F2C0 31D0 MOVT R1, #0x03D0 0x34181408: F3C0 10C1 UBFX R0, R0, #7, #2 0x3418140C: FA21 F000 LSR.W R0, R1, R0 0x34181410: 4770 BX LR 0x34181412: F248 0004 MOVW R0, #0x8004 0x34181416: F646 4100 MOVW R1, #0x6C00 0x3418141A: F2C5 6002 MOVT R0, #0x5602 0x3418141E: 6800 LDR R0, [R0] 0x34181420: F2C0 21DC MOVT R1, #0x02DC 0x34181424: 06C0 LSLS R0, R0, #27 0x34181426: EA01 70E0 AND.W R0, R1, R0, ASR #31 0x3418142A: 4770 BX LR 0x3418142C: F248 0000 MOVW R0, #0x8000 0x34181430: F2C0 00BB MOVT R0, #187 0x34181434: 4770 BX LR 0x34181436: F248 0004 MOVW R0, #0x8004 0x3418143A: F2C5 6002 MOVT R0, #0x5602 0x3418143E: 6801 LDR R1, [R0] 0x34181440: 0749 LSLS R1, R1, #29 0x34181442: D401 BMI 46L2 ; 0x34181448
.L1: 0x34181444: 2000 MOVS R0, #0 0x34181446: 4770 BX LR
.L2: 0x34181448: 6C00 LDR R0, [R0, #64] 0x3418144A: 0580 LSLS R0, R0, #22 0x3418144C: F242 4000 MOVW R0, #0x2400 0x34181450: F2C0 00F4 MOVT R0, #244 0x34181454: BF5C ITT PL 0x34181456: F640 1000 MOVWPL R0, #0x0900 0x3418145A: F2C0 003D MOVTPL R0, #61 0x3418145E: 4770 BX LR

Section .rodata..Lswitch.table.HAL_GPIO_DeInit from blto2_FSBL_lto.o, size=64, align=4

  0x34181460:  00           DC.B       0x00                     ; '\0'
  0x34181461:  00           DC.B       0x00                     ; '\0'
  0x34181462:  00           DC.B       0x00                     ; '\0'
  0x34181463:  00           DC.B       0x00                     ; '\0'
  0x34181464:  01           DC.B       0x01                     ; '\x01'
  0x34181465:  00           DC.B       0x00                     ; '\0'
  0x34181466:  00           DC.B       0x00                     ; '\0'
  0x34181467:  00           DC.B       0x00                     ; '\0'
  0x34181468:  02           DC.B       0x02                     ; '\x02'
  0x34181469:  00           DC.B       0x00                     ; '\0'
  0x3418146A:  00           DC.B       0x00                     ; '\0'
  0x3418146B:  00           DC.B       0x00                     ; '\0'
  0x3418146C:  03           DC.B       0x03                     ; '\x03'
  0x3418146D:  00           DC.B       0x00                     ; '\0'
  0x3418146E:  00           DC.B       0x00                     ; '\0'
  0x3418146F:  00           DC.B       0x00                     ; '\0'
  0x34181470:  04           DC.B       0x04                     ; '\x04'
  0x34181471:  00           DC.B       0x00                     ; '\0'
  0x34181472:  00           DC.B       0x00                     ; '\0'
  0x34181473:  00           DC.B       0x00                     ; '\0'
  0x34181474:  05           DC.B       0x05                     ; '\x05'
  0x34181475:  00           DC.B       0x00                     ; '\0'
  0x34181476:  00           DC.B       0x00                     ; '\0'
  0x34181477:  00           DC.B       0x00                     ; '\0'
  0x34181478:  06           DC.B       0x06                     ; '\x06'
  0x34181479:  00           DC.B       0x00                     ; '\0'
  0x3418147A:  00           DC.B       0x00                     ; '\0'
  0x3418147B:  00           DC.B       0x00                     ; '\0'
  0x3418147C:  07           DC.B       0x07                     ; '\x07'
  0x3418147D:  00           DC.B       0x00                     ; '\0'
  0x3418147E:  00           DC.B       0x00                     ; '\0'
  0x3418147F:  00           DC.B       0x00                     ; '\0'
  0x34181480:  00           DC.B       0x00                     ; '\0'
  0x34181481:  00           DC.B       0x00                     ; '\0'
  0x34181482:  00           DC.B       0x00                     ; '\0'
  0x34181483:  00           DC.B       0x00                     ; '\0'
  0x34181484:  00           DC.B       0x00                     ; '\0'
  0x34181485:  00           DC.B       0x00                     ; '\0'
  0x34181486:  00           DC.B       0x00                     ; '\0'
  0x34181487:  00           DC.B       0x00                     ; '\0'
  0x34181488:  00           DC.B       0x00                     ; '\0'
  0x34181489:  00           DC.B       0x00                     ; '\0'
  0x3418148A:  00           DC.B       0x00                     ; '\0'
  0x3418148B:  00           DC.B       0x00                     ; '\0'
  0x3418148C:  00           DC.B       0x00                     ; '\0'
  0x3418148D:  00           DC.B       0x00                     ; '\0'
  0x3418148E:  00           DC.B       0x00                     ; '\0'
  0x3418148F:  00           DC.B       0x00                     ; '\0'
  0x34181490:  00           DC.B       0x00                     ; '\0'
  0x34181491:  00           DC.B       0x00                     ; '\0'
  0x34181492:  00           DC.B       0x00                     ; '\0'
  0x34181493:  00           DC.B       0x00                     ; '\0'
  0x34181494:  08           DC.B       0x08                     ; '\b'
  0x34181495:  00           DC.B       0x00                     ; '\0'
  0x34181496:  00           DC.B       0x00                     ; '\0'
  0x34181497:  00           DC.B       0x00                     ; '\0'
  0x34181498:  09           DC.B       0x09                     ; '\t'
  0x34181499:  00           DC.B       0x00                     ; '\0'
  0x3418149A:  00           DC.B       0x00                     ; '\0'
  0x3418149B:  00           DC.B       0x00                     ; '\0'
  0x3418149C:  0A           DC.B       0x0A                     ; '\n'
  0x3418149D:  00           DC.B       0x00                     ; '\0'
  0x3418149E:  00           DC.B       0x00                     ; '\0'
  0x3418149F:  00           DC.B       0x00                     ; '\0'

Section .rodata..Lswitch.table.RCC_PLL_Config from blto2_FSBL_lto.o, size=12, align=4

  0x341814A0:  03           DC.B       0x03                     ; '\x03'
  0x341814A1:  00           DC.B       0x00                     ; '\0'
  0x341814A2:  00           DC.B       0x00                     ; '\0'
  0x341814A3:  00           DC.B       0x00                     ; '\0'
  0x341814A4:  02           DC.B       0x02                     ; '\x02'
  0x341814A5:  00           DC.B       0x00                     ; '\0'
  0x341814A6:  00           DC.B       0x00                     ; '\0'
  0x341814A7:  00           DC.B       0x00                     ; '\0'
  0x341814A8:  04           DC.B       0x04                     ; '\x04'
  0x341814A9:  00           DC.B       0x00                     ; '\0'
  0x341814AA:  00           DC.B       0x00                     ; '\0'
  0x341814AB:  00           DC.B       0x00                     ; '\0'

Section .init._start from SEGGER_THUMB_Startup.o, size=20, align=4


_start: 0x341814AC: 4C03 LDR R4, =0x341822D4 ; [PC, #12] [0x341814BC]
.L1: 0x341814AE: 6820 LDR R0, [R4] 0x341814B0: 3404 ADDS R4, #4 0x341814B2: 4780 BLX R0 0x341814B4: E7FB B 46L1 ; 0x341814AE
__SEGGER_init_done: __startup_complete: 0x341814B6: F7FF F949 BL main ; 0x3418074C
exit: 0x341814BA: E7FE B exit ; 0x341814BA 0x341814BC: 341822D4 DC.W 341822D4 ; R_ARM_ABS32

Section .init.Reset_Handler from STM32N6xx_Startup.o, size=44, align=4


reset_handler: Reset_Handler: 0x341814C0: 4909 LDR R1, =0x341FE000 ; [PC, #36] [0x341814E8] 0x341814C2: F381 880A MSR MSPLIM, R1 0x341814C6: F04F 0100 MOV.W R1, #0 0x341814CA: F381 880B MSR PSPLIM, R1 0x341814CE: F000 F851 BL SystemInit ; 0x34181574 0x341814D2: F64E 5088 MOVW R0, #0xED88 0x341814D6: F2CE 0000 MOVT R0, #0xE000 0x341814DA: 6801 LDR R1, [R0] 0x341814DC: F451 0170 ORRS R1, R1, #0xF00000 0x341814E0: 6001 STR R1, [R0] 0x341814E2: F7FF FFE3 BL _start ; 0x341814AC 0x341814E6: 00 DC.B 0x00 ; '\0' 0x341814E7: 00 DC.B 0x00 ; '\0' 0x341814E8: 341FE000 DC.W 341FE000 ; R_ARM_ABS32

Section .text.libc.__aeabi_memclr from strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=104, align=4


__aeabi_memclr: __aeabi_memclr8: __aeabi_memclr4: 0x341814EC: 2200 MOVS R2, #0
__aeabi_memset8: __aeabi_memset4: __aeabi_memset: 0x341814EE: 000B MOVS R3, R1 0x341814F0: 0011 MOVS R1, R2 0x341814F2: 001A MOVS R2, R3
memset: 0x341814F4: 4684 MOV R12, R0 0x341814F6: B35A CBZ R2, .L7 ; 0x34181550
.L1: 0x341814F8: 0783 LSLS R3, R0, #30 0x341814FA: D004 BEQ 46L2 ; 0x34181506 0x341814FC: F800 1B01 STRB R1, [R0], #1 0x34181500: 1E52 SUBS R2, R2, #1 0x34181502: D1F9 BNE 46L1 ; 0x341814F8 0x34181504: E024 B 46L7 ; 0x34181550
.L2: 0x34181506: B2C9 UXTB R1, R1 0x34181508: EA41 2101 ORR.W R1, R1, R1, LSL #8 0x3418150C: EA41 4101 ORR.W R1, R1, R1, LSL #16 0x34181510: 2A20 CMP R2, #32 0x34181512: D311 BCC 46L4 ; 0x34181538 0x34181514: 3A20 SUBS R2, #32 0x34181516: E92D 03F0 PUSH.W 123R4-R9} 0x3418151A: 460B MOV R3, R1 0x3418151C: 460C MOV R4, R1 0x3418151E: 460D MOV R5, R1 0x34181520: 460E MOV R6, R1 0x34181522: 460F MOV R7, R1 0x34181524: 4688 MOV R8, R1 0x34181526: 4689 MOV R9, R1
.L3: 0x34181528: E8A0 03FA STM.W R0!, {R1, R3-R9} 0x3418152C: 3A20 SUBS R2, #32 0x3418152E: D2FB BCS 46L3 ; 0x34181528 0x34181530: E8BD 03F0 POP.W 123R4-R9} 0x34181534: 3220 ADDS R2, #32 0x34181536: D00B BEQ 46L7 ; 0x34181550
.L4: 0x34181538: 2A04 CMP R2, #4 0x3418153A: D305 BCC 46L6 ; 0x34181548
.L5: 0x3418153C: F840 1B04 STR R1, [R0], #4 0x34181540: 1F12 SUBS R2, R2, #4 0x34181542: D005 BEQ 46L7 ; 0x34181550 0x34181544: 2A04 CMP R2, #4 0x34181546: D2F9 BCS 46L5 ; 0x3418153C
.L6: 0x34181548: F800 1B01 STRB R1, [R0], #1 0x3418154C: 1E52 SUBS R2, R2, #1 0x3418154E: D1FB BNE 46L6 ; 0x34181548
.L7: 0x34181550: 4660 MOV R0, R12 0x34181552: 4770 BX LR

Section .text.NMI_Handler from blto2_FSBL_lto.o, size=2, align=4


NMI_Handler: 0x34181554: E7FE B NMI_Handler ; 0x34181554

Section .init.PVD_PVM_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


PVD_PVM_IRQHandler: 0x34181556: E7FE B PVD_PVM_IRQHandler ; 0x34181556

Section .text.HardFault_Handler from blto2_FSBL_lto.o, size=2, align=4


HardFault_Handler: 0x34181558: E7FE B HardFault_Handler ; 0x34181558

Section .init.DTS_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


DTS_IRQHandler: 0x3418155A: E7FE B DTS_IRQHandler ; 0x3418155A

Section .text.MemManage_Handler from blto2_FSBL_lto.o, size=2, align=4


MemManage_Handler: 0x3418155C: E7FE B MemManage_Handler ; 0x3418155C

Section .init.RCC_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


RCC_IRQHandler: 0x3418155E: E7FE B RCC_IRQHandler ; 0x3418155E

Section .text.BusFault_Handler from blto2_FSBL_lto.o, size=2, align=4


BusFault_Handler: 0x34181560: E7FE B BusFault_Handler ; 0x34181560

Section .init.LOCKUP_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


LOCKUP_IRQHandler: 0x34181562: E7FE B LOCKUP_IRQHandler ; 0x34181562

Section .text.UsageFault_Handler from blto2_FSBL_lto.o, size=2, align=4


UsageFault_Handler: 0x34181564: E7FE B UsageFault_Handler ; 0x34181564

Section .init.CACHE_ECC_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


CACHE_ECC_IRQHandler: 0x34181566: E7FE B CACHE_ECC_IRQHandler ; 0x34181566

Section .text.SVC_Handler from blto2_FSBL_lto.o, size=2, align=4


SVC_Handler: 0x34181568: 4770 BX LR

Section .init.TCM_ECC_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TCM_ECC_IRQHandler: 0x3418156A: E7FE B TCM_ECC_IRQHandler ; 0x3418156A

Section .text.DebugMon_Handler from blto2_FSBL_lto.o, size=2, align=4


DebugMon_Handler: 0x3418156C: 4770 BX LR

Section .init.BCK_ECC_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


BCK_ECC_IRQHandler: 0x3418156E: E7FE B BCK_ECC_IRQHandler ; 0x3418156E

Section .text.PendSV_Handler from blto2_FSBL_lto.o, size=2, align=4


PendSV_Handler: 0x34181570: 4770 BX LR

Section .init.FPU_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


FPU_IRQHandler: 0x34181572: E7FE B FPU_IRQHandler ; 0x34181572

Section .text.SystemInit from blto2_FSBL_lto.o, size=302, align=4


SystemInit: 0x34181574: B530 PUSH 123R4-R5, LR} 0x34181576: F240 4100 MOVW R1, #0x0400 ; 0x34180400 = g_pfnVectors 0x3418157A: F64E 50D8 MOVW R0, #0xEDD8 0x3418157E: F648 2C18 MOVW R12, #0x8A18 0x34181582: F2C3 4118 MOVT R1, #0x3418 ; 0x34180400 = g_pfnVectors 0x34181586: F2CE 0000 MOVT R0, #0xE000 0x3418158A: 2200 MOVS R2, #0 0x3418158C: F2C5 6C02 MOVT R12, #0x5602 0x34181590: 2302 MOVS R3, #2 0x34181592: F840 1CD0 STR R1, [R0, #-208] 0x34181596: 2101 MOVS R1, #1 0x34181598: F60C 0E08 ADDW LR, R12, #0x0808 0x3418159C: F8CC 1000 STR.W R1, [R12] 0x341815A0: F8CC 1800 STR.W R1, [R12, #0x0800] 0x341815A4: F8CE 1038 STR.W R1, [LR, #56] 0x341815A8: 6002 STR R2, [R0] 0x341815AA: 6042 STR R2, [R0, #4] 0x341815AC: 6082 STR R2, [R0, #8] 0x341815AE: 6001 STR R1, [R0] 0x341815B0: 6042 STR R2, [R0, #4] 0x341815B2: 6082 STR R2, [R0, #8] 0x341815B4: 6003 STR R3, [R0] 0x341815B6: 2303 MOVS R3, #3 0x341815B8: 6042 STR R2, [R0, #4] 0x341815BA: 6082 STR R2, [R0, #8] 0x341815BC: 6003 STR R3, [R0] 0x341815BE: 2304 MOVS R3, #4 0x341815C0: 6042 STR R2, [R0, #4] 0x341815C2: 6082 STR R2, [R0, #8] 0x341815C4: 6003 STR R3, [R0] 0x341815C6: 2305 MOVS R3, #5 0x341815C8: 6042 STR R2, [R0, #4] 0x341815CA: 6082 STR R2, [R0, #8] 0x341815CC: 6003 STR R3, [R0] 0x341815CE: 2306 MOVS R3, #6 0x341815D0: 6042 STR R2, [R0, #4] 0x341815D2: 6082 STR R2, [R0, #8] 0x341815D4: 6003 STR R3, [R0] 0x341815D6: 2307 MOVS R3, #7 0x341815D8: 6042 STR R2, [R0, #4] 0x341815DA: 6082 STR R2, [R0, #8] 0x341815DC: 6003 STR R3, [R0] 0x341815DE: 6042 STR R2, [R0, #4] 0x341815E0: 6082 STR R2, [R0, #8] 0x341815E2: F5AC 62F4 SUB.W R2, R12, #0x07A0 0x341815E6: F8CC 1060 STR.W R1, [R12, #96] 0x341815EA: 6813 LDR R3, [R2] 0x341815EC: F850 4CD0 LDR R4, [R0, #-208] 0x341815F0: F248 0310 MOVW R3, #0x8010 0x341815F4: F2C5 6300 MOVT R3, #0x5600 0x341815F8: 601C STR R4, [R3] 0x341815FA: F644 043C MOVW R4, #0x483C 0x341815FE: F2C5 6402 MOVT R4, #0x5602 0x34181602: F854 5C08 LDR R5, [R4, #-8] 0x34181606: F445 7580 ORR R5, R5, #0x0100 0x3418160A: F844 5C08 STR R5, [R4, #-8] 0x3418160E: F854 5C04 LDR R5, [R4, #-4] 0x34181612: F445 7580 ORR R5, R5, #0x0100 0x34181616: F844 5C04 STR R5, [R4, #-4] 0x3418161A: 6825 LDR R5, [R4] 0x3418161C: F445 7540 ORR R5, R5, #0x0300 0x34181620: 6025 STR R5, [R4] 0x34181622: F240 2587 MOVW R5, #0x0287 0x34181626: 645D STR R5, [R3, #68] 0x34181628: 64DD STR R5, [R3, #76] 0x3418162A: 635D STR R5, [R3, #52] 0x3418162C: 63DD STR R5, [R3, #60] 0x3418162E: 655D STR R5, [R3, #84] 0x34181630: 6825 LDR R5, [R4] 0x34181632: F445 5580 ORR R5, R5, #0x1000 0x34181636: 6025 STR R5, [R4] 0x34181638: 6825 LDR R5, [R4] 0x3418163A: F045 0510 ORR R5, R5, #16 0x3418163E: 6025 STR R5, [R4] 0x34181640: 6824 LDR R4, [R4] 0x34181642: F852 4C04 LDR R4, [R2, #-4] 0x34181646: F444 4400 ORR R4, R4, #0x8000 0x3418164A: F842 4C04 STR R4, [R2, #-4] 0x3418164E: 6814 LDR R4, [R2] 0x34181650: F044 0410 ORR R4, R4, #16 0x34181654: 6014 STR R4, [R2] 0x34181656: 6814 LDR R4, [R2] 0x34181658: 6814 LDR R4, [R2] 0x3418165A: F024 0410 BIC R4, R4, #16 0x3418165E: 6014 STR R4, [R2] 0x34181660: F44F 5240 MOV.W R2, #0x3000 0x34181664: F8CC 2008 STR.W R2, [R12, #8] 0x34181668: F8CE 2000 STR.W R2, [LR] 0x3418166C: 2240 MOVS R2, #64 0x3418166E: F8CC 100C STR.W R1, [R12, #12] 0x34181672: F8CE 1004 STR.W R1, [LR, #4] 0x34181676: F8CE 1044 STR.W R1, [LR, #68] 0x3418167A: F8CE 203C STR.W R2, [LR, #60] 0x3418167E: 681A LDR R2, [R3] 0x34181680: F8CE 1058 STR.W R1, [LR, #88] 0x34181684: F850 1C50 LDR R1, [R0, #-80] 0x34181688: F441 0170 ORR R1, R1, #0xF00000 0x3418168C: F840 1C50 STR R1, [R0, #-80] 0x34181690: F64E 5088 MOVW R0, #0xED88 0x34181694: F2CE 0002 MOVT R0, #0xE002 0x34181698: 6801 LDR R1, [R0] 0x3418169A: F441 0170 ORR R1, R1, #0xF00000 0x3418169E: 6001 STR R1, [R0] 0x341816A0: BD30 POP 123R4-R5, PC}

Section .init.RTC_S_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


RTC_S_IRQHandler: 0x341816A2: E7FE B RTC_S_IRQHandler ; 0x341816A2

Section .text.HAL_GPIO_Init from blto2_FSBL_lto.o, size=418, align=4


HAL_GPIO_Init: 0x341816A4: E92D 4FF0 PUSH.W 123R4-R11, LR} 0x341816A8: B083 SUB SP, SP, #12 0x341816AA: 680C LDR R4, [R1] 0x341816AC: 2C00 CMP R4, #0 0x341816AE: F000 80C7 BEQ.W 46L6 ; 0x34181840 0x341816B2: F245 0E00 MOVW LR, #0x5000 0x341816B6: F100 4328 ADD.W R3, R0, #0xA8000000 0x341816BA: F2C5 6E02 MOVT LR, #0x5602 0x341816BE: F103 73FF ADD.W R3, R3, #0x01FE0000 0x341816C2: EA4F 22B3 ROR R2, R3, #10 0x341816C6: F5AE 5380 SUB.W R3, LR, #0x1000 0x341816CA: 4298 CMP R0, R3 0x341816CC: BF14 ITE NE 0x341816CE: 2310 MOVNE R3, #16 0x341816D0: 230B MOVEQ R3, #11 0x341816D2: B297 UXTH R7, R2 0x341816D4: F24E 06FF MOVW R6, #0xE0FF 0x341816D8: 9302 STR R3, [SP, #8] 0x341816DA: 2500 MOVS R5, #0 0x341816DC: 2A10 CMP R2, #16 0x341816DE: EA5F 932F CSET R3, CC 0x341816E2: FA26 F707 LSR.W R7, R6, R7 0x341816E6: 9200 STR R2, [SP, #0] 0x341816E8: EA03 0207 AND.W R2, R3, R7 0x341816EC: 9201 STR R2, [SP, #4] 0x341816EE: E084 B 46L5 ; 0x341817FA
.L1: 0x341816F0: F1BB 0F03 CMP.W R11, #3 0x341816F4: BF08 IT EQ 0x341816F6: F1BC 0F01 CMPEQ.W R12, #1 0x341816FA: D024 BEQ 46L3 ; 0x34181746 0x341816FC: 006B LSLS R3, R5, #1 0x341816FE: 2203 MOVS R2, #3 0x34181700: FA02 F303 LSL.W R3, R2, R3 0x34181704: 43DC MVNS R4, R3
.L2: 0x34181706: 68C3 LDR R3, [R0, #12] 0x34181708: 4023 ANDS R3, R4 0x3418170A: 006C LSLS R4, R5, #1 0x3418170C: FA0C F604 LSL.W R6, R12, R4 0x34181710: 4333 ORRS R3, R6 0x34181712: F1BB 0F02 CMP.W R11, #2 0x34181716: 60C3 STR R3, [R0, #12] 0x34181718: D115 BNE 46L3 ; 0x34181746 0x3418171A: F06F 0203 MVN R2, #3 0x3418171E: EA02 0655 AND.W R6, R2, R5, LSR #1 0x34181722: 221C MOVS R2, #28 0x34181724: 690B LDR R3, [R1, #16] 0x34181726: EA02 0485 AND.W R4, R2, R5, LSL #2 0x3418172A: 220F MOVS R2, #15 0x3418172C: 40A3 LSLS R3, R4 0x3418172E: FA02 F404 LSL.W R4, R2, R4 0x34181732: F100 0220 ADD.W R2, R0, #32 0x34181736: 5997 LDR R7, [R2, R6] 0x34181738: 43A7 BICS R7, R4 0x3418173A: 433B ORRS R3, R7 0x3418173C: 5193 STR R3, [R2, R6] 0x3418173E: F8D1 9004 LDR.W R9, [R1, #4] 0x34181742: F009 0B03 AND R11, R9, #3
.L3: 0x34181746: 006B LSLS R3, R5, #1 0x34181748: 2203 MOVS R2, #3 0x3418174A: 6806 LDR R6, [R0] 0x3418174C: FA0B F703 LSL.W R7, R11, R3 0x34181750: FA02 F303 LSL.W R3, R2, R3 0x34181754: EA26 0303 BIC.W R3, R6, R3 0x34181758: 433B ORRS R3, R7 0x3418175A: F419 3F40 TST R9, #0x030000 0x3418175E: 6003 STR R3, [R0] 0x34181760: D046 BEQ 46L4 ; 0x341817F0 0x34181762: F10E 0460 ADD.W R4, LR, #96 0x34181766: F025 0303 BIC R3, R5, #3 0x3418176A: 58E6 LDR R6, [R4, R3] 0x3418176C: E9DD 2301 LDRD R2, R3, [SP, #4] 0x34181770: 2A00 CMP R2, #0 0x34181772: BF1F ITTTT NE 0x34181774: 9A00 LDRNE R2, [SP, #0] 0x34181776: F241 4360 MOVWNE R3, #0x1460 ; 0x34181460 = .rodata..Lswitch.table.HAL_GPIO_DeInit 0x3418177A: F2C3 4318 MOVTNE R3, #0x3418 ; 0x34181460 = .rodata..Lswitch.table.HAL_GPIO_DeInit 0x3418177E: F853 3022 LDRNE.W R3, [R3, R2, LSL #2] 0x34181782: 2218 MOVS R2, #24 0x34181784: EA02 07C5 AND.W R7, R2, R5, LSL #3 0x34181788: 220F MOVS R2, #15 0x3418178A: 40BB LSLS R3, R7 0x3418178C: FA02 F707 LSL.W R7, R2, R7 0x34181790: EA26 0707 BIC.W R7, R6, R7 0x34181794: 433B ORRS R3, R7 0x34181796: 08AF LSRS R7, R5, #2 0x34181798: F844 3027 STR.W R3, [R4, R7, LSL #2] 0x3418179C: F8DE 3080 LDR.W R3, [LR, #128] 0x341817A0: 684F LDR R7, [R1, #4] 0x341817A2: 03FE LSLS R6, R7, #15 0x341817A4: BF4C ITE MI 0x341817A6: EA43 0608 ORRMI.W R6, R3, R8 0x341817AA: EA23 0608 BICPL.W R6, R3, R8 0x341817AE: F8CE 6080 STR.W R6, [LR, #128] 0x341817B2: F8DE 3084 LDR.W R3, [LR, #132] 0x341817B6: 03BE LSLS R6, R7, #14 0x341817B8: BF4C ITE MI 0x341817BA: EA43 0608 ORRMI.W R6, R3, R8 0x341817BE: EA23 0608 BICPL.W R6, R3, R8 0x341817C2: F8CE 6084 STR.W R6, [LR, #132] 0x341817C6: F8DE 3000 LDR.W R3, [LR] 0x341817CA: 02FE LSLS R6, R7, #11 0x341817CC: BF4C ITE MI 0x341817CE: EA43 0608 ORRMI.W R6, R3, R8 0x341817D2: EA23 0608 BICPL.W R6, R3, R8 0x341817D6: F8CE 6000 STR.W R6, [LR] 0x341817DA: 02BB LSLS R3, R7, #10 0x341817DC: F8DE 3004 LDR.W R3, [LR, #4] 0x341817E0: EA43 0708 ORR.W R7, R3, R8 0x341817E4: BF58 IT PL 0x341817E6: EA23 0708 BICPL.W R7, R3, R8 0x341817EA: F8CE 7004 STR.W R7, [LR, #4] 0x341817EE: BF00 NOP
.L4: 0x341817F0: 680C LDR R4, [R1] 0x341817F2: 3501 ADDS R5, #1 0x341817F4: FA34 F305 LSRS.W R3, R4, R5 0x341817F8: D022 BEQ 46L6 ; 0x34181840
.L5: 0x341817FA: 2201 MOVS R2, #1 0x341817FC: FA02 FA05 LSL.W R10, R2, R5 0x34181800: EA1A 0804 ANDS.W R8, R10, R4 0x34181804: D0F4 BEQ 46L4 ; 0x341817F0 0x34181806: E9D1 9C01 LDRD R9, R12, [R1, #4] 0x3418180A: F009 0B03 AND R11, R9, #3 0x3418180E: F1AB 0301 SUB.W R3, R11, #1 0x34181812: 2B01 CMP R3, #1 0x34181814: F63F AF6C BHI.W 46L1 ; 0x341816F0 0x34181818: 68CB LDR R3, [R1, #12] 0x3418181A: 2203 MOVS R2, #3 0x3418181C: 006C LSLS R4, R5, #1 0x3418181E: 6886 LDR R6, [R0, #8] 0x34181820: 40A3 LSLS R3, R4 0x34181822: FA02 F404 LSL.W R4, R2, R4 0x34181826: 43A6 BICS R6, R4 0x34181828: 4333 ORRS R3, R6 0x3418182A: 6083 STR R3, [R0, #8] 0x3418182C: 6843 LDR R3, [R0, #4] 0x3418182E: F3C9 1600 UBFX R6, R9, #4, #1 0x34181832: EA23 030A BIC.W R3, R3, R10 0x34181836: 40AE LSLS R6, R5 0x34181838: 4333 ORRS R3, R6 0x3418183A: 43E4 MVNS R4, R4 0x3418183C: 6043 STR R3, [R0, #4] 0x3418183E: E762 B 46L2 ; 0x34181706
.L6: 0x34181840: B003 ADD SP, SP, #12 0x34181842: E8BD 8FF0 POP.W 123R4-R11, PC}

Section .init.TAMP_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TAMP_IRQHandler: 0x34181846: E7FE B TAMP_IRQHandler ; 0x34181846

Section .text.HAL_RCC_OscConfig from blto2_FSBL_lto.o, size=1714, align=4


HAL_RCC_OscConfig: 0x34181848: E92D 4FF8 PUSH.W 123R3-R11, LR} 0x3418184C: 6801 LDR R1, [R0] 0x3418184E: F248 0604 MOVW R6, #0x8004 0x34181852: 4604 MOV R4, R0 0x34181854: F2C5 6602 MOVT R6, #0x5602 0x34181858: 07C8 LSLS R0, R1, #31 0x3418185A: 69F0 LDR R0, [R6, #28] 0x3418185C: F400 1A40 AND R10, R0, #0x300000 0x34181860: 69F0 LDR R0, [R6, #28] 0x34181862: F000 5840 AND R8, R0, #0x30000000 0x34181866: 6FF0 LDR R0, [R6, #124] 0x34181868: F000 49E0 AND R9, R0, #0x70000000 0x3418186C: F8D6 008C LDR.W R0, [R6, #140] 0x34181870: F000 4BE0 AND R11, R0, #0x70000000 0x34181874: F8D6 009C LDR.W R0, [R6, #156] 0x34181878: F000 4EE0 AND LR, R0, #0x70000000 0x3418187C: F8D6 00AC LDR.W R0, [R6, #172] 0x34181880: 6832 LDR R2, [R6] 0x34181882: F000 4CE0 AND R12, R0, #0x70000000 0x34181886: D01D BEQ 46L4 ; 0x341818C4 0x34181888: F5BA 1F00 CMP.W R10, #0x200000 0x3418188C: BF18 IT NE 0x3418188E: F1B8 5F00 CMPNE.W R8, #0x20000000 0x34181892: F040 82D1 BNE.W 46L65 ; 0x34181E38
.L1: 0x34181896: 6860 LDR R0, [R4, #4] 0x34181898: 2800 CMP R0, #0 0x3418189A: F000 8246 BEQ.W 46L49 ; 0x34181D2A 0x3418189E: F242 20A4 MOVW R0, #0x22A4 ; 0x341822A4 = uwTick 0x341818A2: F2C3 4018 MOVT R0, #0x3418 ; 0x341822A4 = uwTick 0x341818A6: 6807 LDR R7, [R0]
.L2: 0x341818A8: 6833 LDR R3, [R6] 0x341818AA: 06DB LSLS R3, R3, #27 0x341818AC: 6803 LDR R3, [R0] 0x341818AE: D405 BMI 46L3 ; 0x341818BC 0x341818B0: 1BDB SUBS R3, R3, R7 0x341818B2: 2B64 CMP R3, #100 0x341818B4: D9F8 BLS 46L2 ; 0x341818A8 0x341818B6: 2003 MOVS R0, #3 0x341818B8: E8BD 8FF8 POP.W 123R3-R11, PC}
.L3: 0x341818BC: 6807 LDR R7, [R0] 0x341818BE: 1AFF SUBS R7, R7, R3 0x341818C0: 2F02 CMP R7, #2 0x341818C2: D3FB BCC 46L3 ; 0x341818BC
.L4: 0x341818C4: 0788 LSLS R0, R1, #30 0x341818C6: D516 BPL 46L7 ; 0x341818F6 0x341818C8: F1BA 0F00 CMP.W R10, #0 0x341818CC: BF18 IT NE 0x341818CE: F1B8 0F00 CMPNE.W R8, #0 0x341818D2: D177 BNE 46L16 ; 0x341819C4
.L5: 0x341818D4: 68E0 LDR R0, [R4, #12] 0x341818D6: 2800 CMP R0, #0 0x341818D8: F000 8227 BEQ.W 46L49 ; 0x34181D2A
.L6: 0x341818DC: 6C70 LDR R0, [R6, #68] 0x341818DE: E9D4 3704 LDRD R3, R7, [R4, #16] 0x341818E2: F420 70C0 BIC R0, R0, #0x0180 0x341818E6: 4318 ORRS R0, R3 0x341818E8: 6470 STR R0, [R6, #68] 0x341818EA: 6C70 LDR R0, [R6, #68] 0x341818EC: F420 00FE BIC R0, R0, #0x7F0000 0x341818F0: EA40 4007 ORR.W R0, R0, R7, LSL #16 0x341818F4: 6470 STR R0, [R6, #68]
.L7: 0x341818F6: 06C8 LSLS R0, R1, #27 0x341818F8: D511 BPL 46L10 ; 0x3418191E 0x341818FA: F5BA 1F80 CMP.W R10, #0x100000 0x341818FE: BF18 IT NE 0x34181900: F1B8 5F80 CMPNE.W R8, #0x10000000 0x34181904: F040 8096 BNE.W 46L22 ; 0x34181A34
.L8: 0x34181908: 69E0 LDR R0, [R4, #28] 0x3418190A: 2800 CMP R0, #0 0x3418190C: F000 820D BEQ.W 46L49 ; 0x34181D2A 0x34181910: 6A63 LDR R3, [R4, #36]
.L9: 0x34181912: 6C30 LDR R0, [R6, #64] 0x34181914: F420 10F8 BIC R0, R0, #0x1F0000 0x34181918: EA40 4003 ORR.W R0, R0, R3, LSL #16 0x3418191C: 6430 STR R0, [R6, #64]
.L10: 0x3418191E: F648 0500 MOVW R5, #0x8800 0x34181922: 0708 LSLS R0, R1, #28 0x34181924: F2C5 6502 MOVT R5, #0x5602 0x34181928: D437 BMI 46L14 ; 0x3418199A
.L11: 0x3418192A: 0748 LSLS R0, R1, #29 0x3418192C: F100 816F BMI.W 46L37 ; 0x34181C0E
.L12: 0x34181930: 46A1 MOV R9, R4 0x34181932: F859 0F28 LDR R0, [R9, #40]! 0x34181936: 2800 CMP R0, #0 0x34181938: F000 80E7 BEQ.W 46L32 ; 0x34181B0A 0x3418193C: 2000 MOVS R0, #0 0x3418193E: 4649 MOV R1, R9 0x34181940: F000 FADC BL RCC_PLL_IsNewConfig ; 0x34181EFC 0x34181944: 2800 CMP R0, #0 0x34181946: 6830 LDR R0, [R6] 0x34181948: F000 80D7 BEQ.W 46L31 ; 0x34181AFA 0x3418194C: F8D6 30C0 LDR.W R3, [R6, #192] 0x34181950: F8D6 00C4 LDR.W R0, [R6, #196] 0x34181954: F8D6 20D4 LDR.W R2, [R6, #212] 0x34181958: F8D6 10E8 LDR.W R1, [R6, #232] 0x3418195C: F5BA 1F40 CMP.W R10, #0x300000 0x34181960: BF08 IT EQ 0x34181962: F013 5340 ANDSEQ R3, R3, #0x30000000 0x34181966: F000 81E0 BEQ.W 46L49 ; 0x34181D2A 0x3418196A: F1B8 5F40 CMP.W R8, #0x30000000 0x3418196E: D10C BNE 46L13 ; 0x3418198A 0x34181970: F010 5F40 TST R0, #0x30000000 0x34181974: F04F 0001 MOV.W R0, #1 0x34181978: F000 82BD BEQ.W 46L78 ; 0x34181EF6 0x3418197C: F012 5240 ANDS R2, R2, #0x30000000 0x34181980: BF18 IT NE 0x34181982: F011 5140 ANDSNE R1, R1, #0x30000000 0x34181986: F000 82B6 BEQ.W 46L78 ; 0x34181EF6
.L13: 0x3418198A: 2000 MOVS R0, #0 0x3418198C: 4649 MOV R1, R9 0x3418198E: F000 FAF9 BL RCC_PLL_Config ; 0x34181F84 0x34181992: 2800 CMP R0, #0 0x34181994: F040 81C9 BNE.W 46L49 ; 0x34181D2A 0x34181998: E0B7 B 46L32 ; 0x34181B0A
.L14: 0x3418199A: 69A0 LDR R0, [R4, #24] 0x3418199C: 2201 MOVS R2, #1 0x3418199E: 2800 CMP R0, #0 0x341819A0: F242 20A4 MOVW R0, #0x22A4 ; 0x341822A4 = uwTick 0x341819A4: F2C3 4018 MOVT R0, #0x3418 ; 0x341822A4 = uwTick 0x341819A8: F000 8098 BEQ.W 46L29 ; 0x34181ADC 0x341819AC: 602A STR R2, [R5] 0x341819AE: 6802 LDR R2, [R0]
.L15: 0x341819B0: 6833 LDR R3, [R6] 0x341819B2: 07DB LSLS R3, R3, #31 0x341819B4: D1B9 BNE 46L11 ; 0x3418192A 0x341819B6: 6803 LDR R3, [R0] 0x341819B8: 1A9B SUBS R3, R3, R2 0x341819BA: 2B01 CMP R3, #1 0x341819BC: D9F8 BLS 46L15 ; 0x341819B0 0x341819BE: 2003 MOVS R0, #3 0x341819C0: E8BD 8FF8 POP.W 123R3-R11, PC}
.L16: 0x341819C4: F1B9 0F00 CMP.W R9, #0 0x341819C8: D103 BNE 46L17 ; 0x341819D2 0x341819CA: F412 7080 ANDS R0, R2, #0x0100 0x341819CE: F47F AF81 BNE.W 46L5 ; 0x341818D4
.L17: 0x341819D2: F1BB 0F00 CMP.W R11, #0 0x341819D6: D103 BNE 46L18 ; 0x341819E0 0x341819D8: F412 7000 ANDS R0, R2, #0x0200 0x341819DC: F47F AF7A BNE.W 46L5 ; 0x341818D4
.L18: 0x341819E0: F1BE 0F00 CMP.W LR, #0 0x341819E4: D103 BNE 46L19 ; 0x341819EE 0x341819E6: F412 6080 ANDS R0, R2, #0x0400 0x341819EA: F47F AF73 BNE.W 46L5 ; 0x341818D4
.L19: 0x341819EE: F1BC 0F00 CMP.W R12, #0 0x341819F2: D103 BNE 46L20 ; 0x341819FC 0x341819F4: F412 6000 ANDS R0, R2, #0x0800 0x341819F8: F47F AF6C BNE.W 46L5 ; 0x341818D4
.L20: 0x341819FC: 68E3 LDR R3, [R4, #12] 0x341819FE: F648 0000 MOVW R0, #0x8800 0x34181A02: F242 25A4 MOVW R5, #0x22A4 ; 0x341822A4 = uwTick 0x34181A06: F2C5 6002 MOVT R0, #0x5602 0x34181A0A: 2B00 CMP R3, #0 0x34181A0C: F04F 0308 MOV.W R3, #8 0x34181A10: F2C3 4518 MOVT R5, #0x3418 ; 0x341822A4 = uwTick 0x34181A14: F000 81F1 BEQ.W 46L61 ; 0x34181DFA 0x34181A18: 6003 STR R3, [R0] 0x34181A1A: 682B LDR R3, [R5]
.L21: 0x34181A1C: 6830 LDR R0, [R6] 0x34181A1E: 0700 LSLS R0, R0, #28 0x34181A20: F53F AF5C BMI.W 46L6 ; 0x341818DC 0x34181A24: 6828 LDR R0, [R5] 0x34181A26: 1AC0 SUBS R0, R0, R3 0x34181A28: 2801 CMP R0, #1 0x34181A2A: F04F 0003 MOV.W R0, #3 0x34181A2E: D9F5 BLS 46L21 ; 0x34181A1C 0x34181A30: E8BD 8FF8 POP.W 123R3-R11, PC}
.L22: 0x34181A34: F1B9 5F80 CMP.W R9, #0x10000000 0x34181A38: D103 BNE 46L23 ; 0x34181A42 0x34181A3A: F412 7080 ANDS R0, R2, #0x0100 0x34181A3E: F47F AF63 BNE.W 46L8 ; 0x34181908
.L23: 0x34181A42: F1BB 5F80 CMP.W R11, #0x10000000 0x34181A46: D103 BNE 46L24 ; 0x34181A50 0x34181A48: F412 7000 ANDS R0, R2, #0x0200 0x34181A4C: F47F AF5C BNE.W 46L8 ; 0x34181908
.L24: 0x34181A50: F1BE 5F80 CMP.W LR, #0x10000000 0x34181A54: D103 BNE 46L25 ; 0x34181A5E 0x34181A56: F412 6080 ANDS R0, R2, #0x0400 0x34181A5A: F47F AF55 BNE.W 46L8 ; 0x34181908
.L25: 0x34181A5E: F1BC 5F80 CMP.W R12, #0x10000000 0x34181A62: D103 BNE 46L26 ; 0x34181A6C 0x34181A64: F412 6000 ANDS R0, R2, #0x0800 0x34181A68: F47F AF4E BNE.W 46L8 ; 0x34181908
.L26: 0x34181A6C: 69E2 LDR R2, [R4, #28] 0x34181A6E: F648 0000 MOVW R0, #0x8800 0x34181A72: F2C5 6002 MOVT R0, #0x5602 0x34181A76: 2A00 CMP R2, #0 0x34181A78: F242 22A4 MOVW R2, #0x22A4 ; 0x341822A4 = uwTick 0x34181A7C: F2C3 4218 MOVT R2, #0x3418 ; 0x341822A4 = uwTick 0x34181A80: F000 81CA BEQ.W 46L63 ; 0x34181E18 0x34181A84: E9D4 7308 LDRD R7, R3, [R4, #32] 0x34181A88: F8D6 9040 LDR.W R9, [R6, #64] 0x34181A8C: F429 7900 BIC R9, R9, #0x0200 0x34181A90: EA47 0709 ORR.W R7, R7, R9 0x34181A94: 6437 STR R7, [R6, #64] 0x34181A96: 2704 MOVS R7, #4 0x34181A98: 6007 STR R7, [R0] 0x34181A9A: F8D2 9000 LDR.W R9, [R2]
.L27: 0x34181A9E: 6830 LDR R0, [R6] 0x34181AA0: 0740 LSLS R0, R0, #29 0x34181AA2: F53F AF36 BMI.W 46L9 ; 0x34181912 0x34181AA6: 6810 LDR R0, [R2] 0x34181AA8: EBA0 0009 SUB.W R0, R0, R9 0x34181AAC: 2801 CMP R0, #1 0x34181AAE: F04F 0003 MOV.W R0, #3 0x34181AB2: D9F4 BLS 46L27 ; 0x34181A9E 0x34181AB4: E8BD 8FF8 POP.W 123R3-R11, PC}
.L28: 0x34181AB8: F248 0102 MOVW R1, #0x8002 0x34181ABC: 4288 CMP R0, R1 0x34181ABE: F000 80D9 BEQ.W 46L41 ; 0x34181C74 0x34181AC2: F501 3180 ADD.W R1, R1, #0x010000 0x34181AC6: 4288 CMP R0, R1 0x34181AC8: F040 80AA BNE.W 46L38 ; 0x34181C20 0x34181ACC: 6BF0 LDR R0, [R6, #60] 0x34181ACE: F440 4000 ORR R0, R0, #0x8000 0x34181AD2: 63F0 STR R0, [R6, #60] 0x34181AD4: 6BF0 LDR R0, [R6, #60] 0x34181AD6: F440 3080 ORR R0, R0, #0x010000 0x34181ADA: E0D2 B 46L42 ; 0x34181C82
.L29: 0x34181ADC: F8C5 2800 STR.W R2, [R5, #0x0800] 0x34181AE0: 6802 LDR R2, [R0] 0x34181AE2: BF00 NOP
.L30: 0x34181AE4: 6833 LDR R3, [R6] 0x34181AE6: 07DB LSLS R3, R3, #31 0x34181AE8: F43F AF1F BEQ.W 46L11 ; 0x3418192A 0x34181AEC: 6803 LDR R3, [R0] 0x34181AEE: 1A9B SUBS R3, R3, R2 0x34181AF0: 2B01 CMP R3, #1 0x34181AF2: D9F7 BLS 46L30 ; 0x34181AE4 0x34181AF4: 2003 MOVS R0, #3 0x34181AF6: E8BD 8FF8 POP.W 123R3-R11, PC}
.L31: 0x34181AFA: F8D9 1000 LDR.W R1, [R9] 0x34181AFE: 2902 CMP R1, #2 0x34181B00: BF08 IT EQ 0x34181B02: F410 7080 ANDSEQ R0, R0, #0x0100 0x34181B06: F000 8113 BEQ.W 46L50 ; 0x34181D30
.L32: 0x34181B0A: 46A1 MOV R9, R4 0x34181B0C: F859 0F44 LDR R0, [R9, #68]! 0x34181B10: 2800 CMP R0, #0 0x34181B12: D03F BEQ 46L35 ; 0x34181B94 0x34181B14: 2001 MOVS R0, #1 0x34181B16: 4649 MOV R1, R9 0x34181B18: F000 F9F0 BL RCC_PLL_IsNewConfig ; 0x34181EFC 0x34181B1C: 2800 CMP R0, #0 0x34181B1E: 6830 LDR R0, [R6] 0x34181B20: D030 BEQ 46L34 ; 0x34181B84 0x34181B22: F8D6 30C0 LDR.W R3, [R6, #192] 0x34181B26: F8D6 00C4 LDR.W R0, [R6, #196] 0x34181B2A: F8D6 20D4 LDR.W R2, [R6, #212] 0x34181B2E: F8D6 10E8 LDR.W R1, [R6, #232] 0x34181B32: F5BA 1F40 CMP.W R10, #0x300000 0x34181B36: BF04 ITT EQ 0x34181B38: F003 5340 ANDEQ R3, R3, #0x30000000 0x34181B3C: F1B3 5F80 CMPEQ.W R3, #0x10000000 0x34181B40: F000 80F3 BEQ.W 46L49 ; 0x34181D2A 0x34181B44: F1B8 5F40 CMP.W R8, #0x30000000 0x34181B48: D112 BNE 46L33 ; 0x34181B70 0x34181B4A: F000 5040 AND R0, R0, #0x30000000 0x34181B4E: F1B0 5F80 CMP.W R0, #0x10000000 0x34181B52: F04F 0001 MOV.W R0, #1 0x34181B56: BF1C ITT NE 0x34181B58: F002 5240 ANDNE R2, R2, #0x30000000 0x34181B5C: F1B2 5F80 CMPNE.W R2, #0x10000000 0x34181B60: F000 81C9 BEQ.W 46L78 ; 0x34181EF6 0x34181B64: F001 5140 AND R1, R1, #0x30000000 0x34181B68: F1B1 5F80 CMP.W R1, #0x10000000 0x34181B6C: F000 81C3 BEQ.W 46L78 ; 0x34181EF6
.L33: 0x34181B70: 2001 MOVS R0, #1 0x34181B72: 4649 MOV R1, R9 0x34181B74: F000 FA06 BL RCC_PLL_Config ; 0x34181F84 0x34181B78: 0001 MOVS R1, R0 0x34181B7A: F04F 0001 MOV.W R0, #1 0x34181B7E: F040 81BA BNE.W 46L78 ; 0x34181EF6 0x34181B82: E007 B 46L35 ; 0x34181B94
.L34: 0x34181B84: F8D9 1000 LDR.W R1, [R9] 0x34181B88: 2902 CMP R1, #2 0x34181B8A: BF08 IT EQ 0x34181B8C: F410 7000 ANDSEQ R0, R0, #0x0200 0x34181B90: F000 80EB BEQ.W 46L54 ; 0x34181D6A
.L35: 0x34181B94: 46A1 MOV R9, R4 0x34181B96: F859 0F60 LDR R0, [R9, #96]! 0x34181B9A: 2800 CMP R0, #0 0x34181B9C: F000 808E BEQ.W 46L47 ; 0x34181CBC 0x34181BA0: 2002 MOVS R0, #2 0x34181BA2: 4649 MOV R1, R9 0x34181BA4: F000 F9AA BL RCC_PLL_IsNewConfig ; 0x34181EFC 0x34181BA8: 2800 CMP R0, #0 0x34181BAA: 6830 LDR R0, [R6] 0x34181BAC: F000 807F BEQ.W 46L46 ; 0x34181CAE 0x34181BB0: F8D6 30C0 LDR.W R3, [R6, #192] 0x34181BB4: F8D6 00C4 LDR.W R0, [R6, #196] 0x34181BB8: F8D6 20D4 LDR.W R2, [R6, #212] 0x34181BBC: F8D6 10E8 LDR.W R1, [R6, #232] 0x34181BC0: F5BA 1F40 CMP.W R10, #0x300000 0x34181BC4: BF04 ITT EQ 0x34181BC6: F003 5340 ANDEQ R3, R3, #0x30000000 0x34181BCA: F1B3 5F00 CMPEQ.W R3, #0x20000000 0x34181BCE: F000 80AC BEQ.W 46L49 ; 0x34181D2A 0x34181BD2: F1B8 5F40 CMP.W R8, #0x30000000 0x34181BD6: D112 BNE 46L36 ; 0x34181BFE 0x34181BD8: F000 5040 AND R0, R0, #0x30000000 0x34181BDC: F1B0 5F00 CMP.W R0, #0x20000000 0x34181BE0: F04F 0001 MOV.W R0, #1 0x34181BE4: BF1C ITT NE 0x34181BE6: F002 5240 ANDNE R2, R2, #0x30000000 0x34181BEA: F1B2 5F00 CMPNE.W R2, #0x20000000 0x34181BEE: F000 8182 BEQ.W 46L78 ; 0x34181EF6 0x34181BF2: F001 5140 AND R1, R1, #0x30000000 0x34181BF6: F1B1 5F00 CMP.W R1, #0x20000000 0x34181BFA: F000 817C BEQ.W 46L78 ; 0x34181EF6
.L36: 0x34181BFE: 2002 MOVS R0, #2 0x34181C00: 4649 MOV R1, R9 0x34181C02: F000 F9BF BL RCC_PLL_Config ; 0x34181F84 0x34181C06: 2800 CMP R0, #0 0x34181C08: F040 808F BNE.W 46L49 ; 0x34181D2A 0x34181C0C: E056 B 46L47 ; 0x34181CBC
.L37: 0x34181C0E: 68A0 LDR R0, [R4, #8] 0x34181C10: F248 0101 MOVW R1, #0x8001 0x34181C14: 4288 CMP R0, R1 0x34181C16: F73F AF4F BGT.W 46L28 ; 0x34181AB8 0x34181C1A: B168 CBZ R0, .L39 ; 0x34181C38 0x34181C1C: 2802 CMP R0, #2 0x34181C1E: D032 BEQ 46L43 ; 0x34181C86
.L38: 0x34181C20: 2002 MOVS R0, #2 0x34181C22: F8C5 0800 STR.W R0, [R5, #0x0800] 0x34181C26: 6BF0 LDR R0, [R6, #60] 0x34181C28: F420 4000 BIC R0, R0, #0x8000 0x34181C2C: 63F0 STR R0, [R6, #60] 0x34181C2E: 6BF0 LDR R0, [R6, #60] 0x34181C30: F420 3080 BIC R0, R0, #0x010000 0x34181C34: 63F0 STR R0, [R6, #60] 0x34181C36: E027 B 46L44 ; 0x34181C88
.L39: 0x34181C38: 2002 MOVS R0, #2 0x34181C3A: F242 21A4 MOVW R1, #0x22A4 ; 0x341822A4 = uwTick 0x34181C3E: F8C5 0800 STR.W R0, [R5, #0x0800] 0x34181C42: F241 3388 MOVW R3, #0x1388 0x34181C46: 6BF0 LDR R0, [R6, #60] 0x34181C48: F2C3 4118 MOVT R1, #0x3418 ; 0x341822A4 = uwTick 0x34181C4C: F420 3080 BIC R0, R0, #0x010000 0x34181C50: 63F0 STR R0, [R6, #60] 0x34181C52: 6BF0 LDR R0, [R6, #60] 0x34181C54: F420 4000 BIC R0, R0, #0x8000 0x34181C58: 63F0 STR R0, [R6, #60] 0x34181C5A: 680A LDR R2, [R1]
.L40: 0x34181C5C: 6830 LDR R0, [R6] 0x34181C5E: 0780 LSLS R0, R0, #30 0x34181C60: F57F AE66 BPL.W 46L12 ; 0x34181930 0x34181C64: 6808 LDR R0, [R1] 0x34181C66: 1A80 SUBS R0, R0, R2 0x34181C68: 4298 CMP R0, R3 0x34181C6A: F04F 0003 MOV.W R0, #3 0x34181C6E: D9F5 BLS 46L40 ; 0x34181C5C 0x34181C70: E8BD 8FF8 POP.W 123R3-R11, PC}
.L41: 0x34181C74: 6BF0 LDR R0, [R6, #60] 0x34181C76: F440 4000 ORR R0, R0, #0x8000 0x34181C7A: 63F0 STR R0, [R6, #60] 0x34181C7C: 6BF0 LDR R0, [R6, #60] 0x34181C7E: F420 3080 BIC R0, R0, #0x010000
.L42: 0x34181C82: 63F0 STR R0, [R6, #60] 0x34181C84: 2002 MOVS R0, #2
.L43: 0x34181C86: 6028 STR R0, [R5]
.L44: 0x34181C88: F242 20A4 MOVW R0, #0x22A4 ; 0x341822A4 = uwTick 0x34181C8C: F241 3288 MOVW R2, #0x1388 0x34181C90: F2C3 4018 MOVT R0, #0x3418 ; 0x341822A4 = uwTick 0x34181C94: 6801 LDR R1, [R0] 0x34181C96: BF00 NOP
.L45: 0x34181C98: 6833 LDR R3, [R6] 0x34181C9A: 079B LSLS R3, R3, #30 0x34181C9C: F53F AE48 BMI.W 46L12 ; 0x34181930 0x34181CA0: 6803 LDR R3, [R0] 0x34181CA2: 1A5B SUBS R3, R3, R1 0x34181CA4: 4293 CMP R3, R2 0x34181CA6: D9F7 BLS 46L45 ; 0x34181C98 0x34181CA8: 2003 MOVS R0, #3 0x34181CAA: E8BD 8FF8 POP.W 123R3-R11, PC}
.L46: 0x34181CAE: F8D9 1000 LDR.W R1, [R9] 0x34181CB2: 2902 CMP R1, #2 0x34181CB4: BF08 IT EQ 0x34181CB6: F410 6080 ANDSEQ R0, R0, #0x0400 0x34181CBA: D06A BEQ 46L56 ; 0x34181D92
.L47: 0x34181CBC: F854 0F7C LDR R0, [R4, #124]! 0x34181CC0: 2800 CMP R0, #0 0x34181CC2: F000 8118 BEQ.W 46L78 ; 0x34181EF6 0x34181CC6: 2003 MOVS R0, #3 0x34181CC8: 4621 MOV R1, R4 0x34181CCA: F000 F917 BL RCC_PLL_IsNewConfig ; 0x34181EFC 0x34181CCE: 2800 CMP R0, #0 0x34181CD0: 6830 LDR R0, [R6] 0x34181CD2: D041 BEQ 46L52 ; 0x34181D58 0x34181CD4: F8D6 30C0 LDR.W R3, [R6, #192] 0x34181CD8: F8D6 00C4 LDR.W R0, [R6, #196] 0x34181CDC: F8D6 20D4 LDR.W R2, [R6, #212] 0x34181CE0: F8D6 10E8 LDR.W R1, [R6, #232] 0x34181CE4: F5BA 1F40 CMP.W R10, #0x300000 0x34181CE8: BF04 ITT EQ 0x34181CEA: F003 5340 ANDEQ R3, R3, #0x30000000 0x34181CEE: F1B3 5F40 CMPEQ.W R3, #0x30000000 0x34181CF2: D01A BEQ 46L49 ; 0x34181D2A 0x34181CF4: F1B8 5F40 CMP.W R8, #0x30000000 0x34181CF8: D112 BNE 46L48 ; 0x34181D20 0x34181CFA: F000 5040 AND R0, R0, #0x30000000 0x34181CFE: F1B0 5F40 CMP.W R0, #0x30000000 0x34181D02: F04F 0001 MOV.W R0, #1 0x34181D06: BF1C ITT NE 0x34181D08: F002 5240 ANDNE R2, R2, #0x30000000 0x34181D0C: F1B2 5F40 CMPNE.W R2, #0x30000000 0x34181D10: F000 80F1 BEQ.W 46L78 ; 0x34181EF6 0x34181D14: F001 5140 AND R1, R1, #0x30000000 0x34181D18: F1B1 5F40 CMP.W R1, #0x30000000 0x34181D1C: F000 80EB BEQ.W 46L78 ; 0x34181EF6
.L48: 0x34181D20: 2003 MOVS R0, #3 0x34181D22: 4621 MOV R1, R4 0x34181D24: F000 F92E BL RCC_PLL_Config ; 0x34181F84 0x34181D28: B1E0 CBZ R0, .L53 ; 0x34181D64
.L49: 0x34181D2A: 2001 MOVS R0, #1 0x34181D2C: E8BD 8FF8 POP.W 123R3-R11, PC}
.L50: 0x34181D30: F44F 7080 MOV.W R0, #0x0100 0x34181D34: F242 21A4 MOVW R1, #0x22A4 ; 0x341822A4 = uwTick 0x34181D38: 6028 STR R0, [R5] 0x34181D3A: F2C3 4118 MOVT R1, #0x3418 ; 0x341822A4 = uwTick 0x34181D3E: 680A LDR R2, [R1]
.L51: 0x34181D40: 6830 LDR R0, [R6] 0x34181D42: 05C0 LSLS R0, R0, #23 0x34181D44: F53F AEE1 BMI.W 46L32 ; 0x34181B0A 0x34181D48: 6808 LDR R0, [R1] 0x34181D4A: 1A80 SUBS R0, R0, R2 0x34181D4C: 2801 CMP R0, #1 0x34181D4E: F04F 0001 MOV.W R0, #1 0x34181D52: D9F5 BLS 46L51 ; 0x34181D40 0x34181D54: E8BD 8FF8 POP.W 123R3-R11, PC}
.L52: 0x34181D58: 6821 LDR R1, [R4] 0x34181D5A: 2902 CMP R1, #2 0x34181D5C: BF08 IT EQ 0x34181D5E: F410 6000 ANDSEQ R0, R0, #0x0800 0x34181D62: D037 BEQ 46L59 ; 0x34181DD4
.L53: 0x34181D64: 2000 MOVS R0, #0 0x34181D66: E8BD 8FF8 POP.W 123R3-R11, PC}
.L54: 0x34181D6A: F44F 7000 MOV.W R0, #0x0200 0x34181D6E: F242 21A4 MOVW R1, #0x22A4 ; 0x341822A4 = uwTick 0x34181D72: 6028 STR R0, [R5] 0x34181D74: F2C3 4118 MOVT R1, #0x3418 ; 0x341822A4 = uwTick 0x34181D78: 680A LDR R2, [R1]
.L55: 0x34181D7A: 6830 LDR R0, [R6] 0x34181D7C: 0580 LSLS R0, R0, #22 0x34181D7E: F53F AF09 BMI.W 46L35 ; 0x34181B94 0x34181D82: 6808 LDR R0, [R1] 0x34181D84: 1A80 SUBS R0, R0, R2 0x34181D86: 2801 CMP R0, #1 0x34181D88: F04F 0001 MOV.W R0, #1 0x34181D8C: D9F5 BLS 46L55 ; 0x34181D7A 0x34181D8E: E8BD 8FF8 POP.W 123R3-R11, PC}
.L56: 0x34181D92: F44F 6080 MOV.W R0, #0x0400 0x34181D96: F242 21A4 MOVW R1, #0x22A4 ; 0x341822A4 = uwTick 0x34181D9A: 6028 STR R0, [R5] 0x34181D9C: F2C3 4118 MOVT R1, #0x3418 ; 0x341822A4 = uwTick 0x34181DA0: 680A LDR R2, [R1]
.L57: 0x34181DA2: 6830 LDR R0, [R6] 0x34181DA4: 0540 LSLS R0, R0, #21 0x34181DA6: F53F AF89 BMI.W 46L47 ; 0x34181CBC 0x34181DAA: 6808 LDR R0, [R1] 0x34181DAC: 1A80 SUBS R0, R0, R2 0x34181DAE: 2801 CMP R0, #1 0x34181DB0: F04F 0001 MOV.W R0, #1 0x34181DB4: D9F5 BLS 46L57 ; 0x34181DA2 0x34181DB6: E8BD 8FF8 POP.W 123R3-R11, PC}
.L58: 0x34181DBA: F248 0310 MOVW R3, #0x8010 0x34181DBE: 4298 CMP R0, R3 0x34181DC0: F000 8082 BEQ.W 46L73 ; 0x34181EC8 0x34181DC4: F503 3380 ADD.W R3, R3, #0x010000 0x34181DC8: 4298 CMP R0, R3 0x34181DCA: D15D BNE 46L70 ; 0x34181E88 0x34181DCC: 6D30 LDR R0, [R6, #80] 0x34181DCE: F440 30C0 ORR R0, R0, #0x018000 0x34181DD2: E080 B 46L74 ; 0x34181ED6
.L59: 0x34181DD4: F44F 6000 MOV.W R0, #0x0800 0x34181DD8: F242 21A4 MOVW R1, #0x22A4 ; 0x341822A4 = uwTick 0x34181DDC: 6028 STR R0, [R5] 0x34181DDE: F2C3 4118 MOVT R1, #0x3418 ; 0x341822A4 = uwTick 0x34181DE2: 680A LDR R2, [R1]
.L60: 0x34181DE4: 6830 LDR R0, [R6] 0x34181DE6: 0500 LSLS R0, R0, #20 0x34181DE8: D4BC BMI 46L53 ; 0x34181D64 0x34181DEA: 6808 LDR R0, [R1] 0x34181DEC: 1A80 SUBS R0, R0, R2 0x34181DEE: 2801 CMP R0, #1 0x34181DF0: F04F 0001 MOV.W R0, #1 0x34181DF4: D9F6 BLS 46L60 ; 0x34181DE4 0x34181DF6: E8BD 8FF8 POP.W 123R3-R11, PC}
.L61: 0x34181DFA: F8C0 3800 STR.W R3, [R0, #0x0800] 0x34181DFE: 682B LDR R3, [R5]
.L62: 0x34181E00: 6830 LDR R0, [R6] 0x34181E02: 0700 LSLS R0, R0, #28 0x34181E04: F57F AD77 BPL.W 46L7 ; 0x341818F6 0x34181E08: 6828 LDR R0, [R5] 0x34181E0A: 1AC0 SUBS R0, R0, R3 0x34181E0C: 2801 CMP R0, #1 0x34181E0E: F04F 0003 MOV.W R0, #3 0x34181E12: D9F5 BLS 46L62 ; 0x34181E00 0x34181E14: E8BD 8FF8 POP.W 123R3-R11, PC}
.L63: 0x34181E18: 2304 MOVS R3, #4 0x34181E1A: F8C0 3800 STR.W R3, [R0, #0x0800] 0x34181E1E: 6813 LDR R3, [R2]
.L64: 0x34181E20: 6830 LDR R0, [R6] 0x34181E22: 0740 LSLS R0, R0, #29 0x34181E24: F57F AD7B BPL.W 46L10 ; 0x3418191E 0x34181E28: 6810 LDR R0, [R2] 0x34181E2A: 1AC0 SUBS R0, R0, R3 0x34181E2C: 2801 CMP R0, #1 0x34181E2E: F04F 0003 MOV.W R0, #3 0x34181E32: D9F5 BLS 46L64 ; 0x34181E20 0x34181E34: E8BD 8FF8 POP.W 123R3-R11, PC}
.L65: 0x34181E38: F1B9 5F00 CMP.W R9, #0x20000000 0x34181E3C: D103 BNE 46L66 ; 0x34181E46 0x34181E3E: F412 7080 ANDS R0, R2, #0x0100 0x34181E42: F47F AD28 BNE.W 46L1 ; 0x34181896
.L66: 0x34181E46: F1BB 5F00 CMP.W R11, #0x20000000 0x34181E4A: D103 BNE 46L67 ; 0x34181E54 0x34181E4C: F412 7000 ANDS R0, R2, #0x0200 0x34181E50: F47F AD21 BNE.W 46L1 ; 0x34181896
.L67: 0x34181E54: F1BE 5F00 CMP.W LR, #0x20000000 0x34181E58: D103 BNE 46L68 ; 0x34181E62 0x34181E5A: F412 6080 ANDS R0, R2, #0x0400 0x34181E5E: F47F AD1A BNE.W 46L1 ; 0x34181896
.L68: 0x34181E62: F1BC 5F00 CMP.W R12, #0x20000000 0x34181E66: D103 BNE 46L69 ; 0x34181E70 0x34181E68: F412 6000 ANDS R0, R2, #0x0800 0x34181E6C: F47F AD13 BNE.W 46L1 ; 0x34181896
.L69: 0x34181E70: 6860 LDR R0, [R4, #4] 0x34181E72: F248 030F MOVW R3, #0x800F 0x34181E76: F242 25A4 MOVW R5, #0x22A4 ; 0x341822A4 = uwTick 0x34181E7A: 4298 CMP R0, R3 0x34181E7C: F2C3 4518 MOVT R5, #0x3418 ; 0x341822A4 = uwTick 0x34181E80: DC9B BGT 46L58 ; 0x34181DBA 0x34181E82: B158 CBZ R0, .L71 ; 0x34181E9C 0x34181E84: 2810 CMP R0, #16 0x34181E86: D027 BEQ 46L75 ; 0x34181ED8
.L70: 0x34181E88: F206 70FC ADDW R0, R6, #0x07FC 0x34181E8C: 2310 MOVS R3, #16 0x34181E8E: F8C0 3800 STR.W R3, [R0, #0x0800] 0x34181E92: 6D30 LDR R0, [R6, #80] 0x34181E94: F420 30C0 BIC R0, R0, #0x018000 0x34181E98: 6530 STR R0, [R6, #80] 0x34181E9A: E021 B 46L76 ; 0x34181EE0
.L71: 0x34181E9C: F206 70FC ADDW R0, R6, #0x07FC 0x34181EA0: 2310 MOVS R3, #16 0x34181EA2: F8C0 3800 STR.W R3, [R0, #0x0800] 0x34181EA6: 6D30 LDR R0, [R6, #80] 0x34181EA8: F420 30C0 BIC R0, R0, #0x018000 0x34181EAC: 6530 STR R0, [R6, #80] 0x34181EAE: 682B LDR R3, [R5]
.L72: 0x34181EB0: 6830 LDR R0, [R6] 0x34181EB2: 06C0 LSLS R0, R0, #27 0x34181EB4: F57F AD06 BPL.W 46L4 ; 0x341818C4 0x34181EB8: 6828 LDR R0, [R5] 0x34181EBA: 1AC0 SUBS R0, R0, R3 0x34181EBC: 2864 CMP R0, #100 0x34181EBE: F04F 0003 MOV.W R0, #3 0x34181EC2: D9F5 BLS 46L72 ; 0x34181EB0 0x34181EC4: E8BD 8FF8 POP.W 123R3-R11, PC}
.L73: 0x34181EC8: 6D30 LDR R0, [R6, #80] 0x34181ECA: F440 4000 ORR R0, R0, #0x8000 0x34181ECE: 6530 STR R0, [R6, #80] 0x34181ED0: 6D30 LDR R0, [R6, #80] 0x34181ED2: F420 3080 BIC R0, R0, #0x010000
.L74: 0x34181ED6: 6530 STR R0, [R6, #80]
.L75: 0x34181ED8: F206 70FC ADDW R0, R6, #0x07FC 0x34181EDC: 2310 MOVS R3, #16 0x34181EDE: 6003 STR R3, [R0]
.L76: 0x34181EE0: 682B LDR R3, [R5]
.L77: 0x34181EE2: 6830 LDR R0, [R6] 0x34181EE4: 06C0 LSLS R0, R0, #27 0x34181EE6: F53F ACED BMI.W 46L4 ; 0x341818C4 0x34181EEA: 6828 LDR R0, [R5] 0x34181EEC: 1AC0 SUBS R0, R0, R3 0x34181EEE: 2864 CMP R0, #100 0x34181EF0: F04F 0003 MOV.W R0, #3 0x34181EF4: D9F5 BLS 46L77 ; 0x34181EE2
.L78: 0x34181EF6: E8BD 8FF8 POP.W 123R3-R11, PC}

Section .init.RIFSC_TAMPER_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


RIFSC_TAMPER_IRQHandler: 0x34181EFA: E7FE B RIFSC_TAMPER_IRQHandler ; 0x34181EFA

Section .text.RCC_PLL_IsNewConfig from blto2_FSBL_lto.o, size=134, align=4


RCC_PLL_IsNewConfig: 0x34181EFC: B530 PUSH 123R4-R5, LR} 0x34181EFE: F248 0E04 MOVW LR, #0x8004 0x34181F02: 0102 LSLS R2, R0, #4 0x34181F04: F2C5 6E02 MOVT LR, #0x5602 0x34181F08: F10E 0C7C ADD.W R12, LR, #124 0x34181F0C: F85C 2002 LDR.W R2, [R12, R2] 0x34181F10: E9D1 3401 LDRD R3, R4, [R1, #4] 0x34181F14: F022 420C BIC R2, R2, #0x8C000000 0x34181F18: F022 02FF BIC R2, R2, #255 0x34181F1C: EA43 5304 ORR.W R3, R3, R4, LSL #20 0x34181F20: 690C LDR R4, [R1, #16] 0x34181F22: EA43 2304 ORR.W R3, R3, R4, LSL #8 0x34181F26: 429A CMP R2, R3 0x34181F28: D11E BNE 46L1 ; 0x34181F68 0x34181F2A: 0082 LSLS R2, R0, #2 0x34181F2C: EB0E 0382 ADD.W R3, LR, R2, LSL #2 0x34181F30: F8D3 3080 LDR.W R3, [R3, #128] 0x34181F34: 68CC LDR R4, [R1, #12] 0x34181F36: F023 437F BIC R3, R3, #0xFF000000 0x34181F3A: 42A3 CMP R3, R4 0x34181F3C: D114 BNE 46L1 ; 0x34181F68 0x34181F3E: F10E 0384 ADD.W R3, LR, #132 0x34181F42: F853 3022 LDR.W R3, [R3, R2, LSL #2] 0x34181F46: E9D1 4505 LDRD R4, R5, [R1, #20] 0x34181F4A: F003 537C AND R3, R3, #0x3F000000 0x34181F4E: 062D LSLS R5, R5, #24 0x34181F50: EA45 64C4 ORR.W R4, R5, R4, LSL #27 0x34181F54: 42A3 CMP R3, R4 0x34181F56: D107 BNE 46L1 ; 0x34181F68 0x34181F58: F8DE 3000 LDR.W R3, [LR] 0x34181F5C: FA23 F000 LSR.W R0, R3, R0 0x34181F60: 05C0 LSLS R0, R0, #23 0x34181F62: D503 BPL 46L2 ; 0x34181F6C 0x34181F64: 2002 MOVS R0, #2 0x34181F66: E007 B 46L3 ; 0x34181F78
.L1: 0x34181F68: 2001 MOVS R0, #1 0x34181F6A: BD30 POP 123R4-R5, PC}
.L2: 0x34181F6C: F85C 0022 LDR.W R0, [R12, R2, LSL #2] 0x34181F70: 0100 LSLS R0, R0, #4 0x34181F72: BF4C ITE MI 0x34181F74: 2003 MOVMI R0, #3 0x34181F76: 2001 MOVPL R0, #1
.L3: 0x34181F78: 6809 LDR R1, [R1] 0x34181F7A: 4288 CMP R0, R1 0x34181F7C: EA5F 900F CSET R0, NE 0x34181F80: BD30 POP 123R4-R5, PC}

Section .init.IAC_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


IAC_IRQHandler: 0x34181F82: E7FE B IAC_IRQHandler ; 0x34181F82

Section .text.RCC_PLL_Config from blto2_FSBL_lto.o, size=446, align=4


RCC_PLL_Config: 0x34181F84: E92D 41F0 PUSH.W 123R4-R8, LR} 0x34181F88: F248 0304 MOVW R3, #0x8004 0x34181F8C: 680C LDR R4, [R1] 0x34181F8E: F2C5 6302 MOVT R3, #0x5602 0x34181F92: 0082 LSLS R2, R0, #2 0x34181F94: F103 0C7C ADD.W R12, R3, #124 0x34181F98: F103 0E84 ADD.W LR, R3, #132 0x34181F9C: 2C01 CMP R4, #1 0x34181F9E: D046 BEQ 46L5 ; 0x3418202E 0x34181FA0: 2C03 CMP R4, #3 0x34181FA2: D01B BEQ 46L2 ; 0x34181FDC 0x34181FA4: 2C02 CMP R4, #2 0x34181FA6: F040 80C6 BNE.W 46L12 ; 0x34182136 0x34181FAA: F44F 7480 MOV.W R4, #0x0100 0x34181FAE: F603 78FC ADDW R8, R3, #0x0FFC 0x34181FB2: FA04 F000 LSL.W R0, R4, R0 0x34181FB6: F242 24A4 MOVW R4, #0x22A4 ; 0x341822A4 = uwTick 0x34181FBA: F8C8 0000 STR.W R0, [R8] 0x34181FBE: F103 0680 ADD.W R6, R3, #128 0x34181FC2: F2C3 4418 MOVT R4, #0x3418 ; 0x341822A4 = uwTick 0x34181FC6: 6827 LDR R7, [R4]
.L1: 0x34181FC8: 681D LDR R5, [R3] 0x34181FCA: 4205 TST R5, R0 0x34181FCC: D051 BEQ 46L8 ; 0x34182072 0x34181FCE: 6825 LDR R5, [R4] 0x34181FD0: 1BED SUBS R5, R5, R7 0x34181FD2: 2D01 CMP R5, #1 0x34181FD4: D9F8 BLS 46L1 ; 0x34181FC8 0x34181FD6: 2003 MOVS R0, #3 0x34181FD8: E8BD 81F0 POP.W 123R4-R8, PC}
.L2: 0x34181FDC: 6849 LDR R1, [R1, #4] 0x34181FDE: EA4F 7731 ROR R7, R1, #28 0x34181FE2: 2F02 CMP R7, #2 0x34181FE4: D80B BHI 46L3 ; 0x34181FFE 0x34181FE6: F241 46A0 MOVW R6, #0x14A0 ; 0x341814A0 = .rodata..Lswitch.table.RCC_PLL_Config 0x34181FEA: F2C3 4618 MOVT R6, #0x3418 ; 0x341814A0 = .rodata..Lswitch.table.RCC_PLL_Config 0x34181FEE: F856 7027 LDR.W R7, [R6, R7, LSL #2] 0x34181FF2: 681E LDR R6, [R3] 0x34181FF4: FA26 F707 LSR.W R7, R6, R7 0x34181FF8: 07FF LSLS R7, R7, #31 0x34181FFA: F000 809F BEQ.W 46L13 ; 0x3418213C
.L3: 0x34181FFE: F44F 7780 MOV.W R7, #0x0100 0x34182002: F242 26A4 MOVW R6, #0x22A4 ; 0x341822A4 = uwTick 0x34182006: FA07 F000 LSL.W R0, R7, R0 0x3418200A: F603 77FC ADDW R7, R3, #0x0FFC 0x3418200E: 6038 STR R0, [R7] 0x34182010: F2C3 4618 MOVT R6, #0x3418 ; 0x341822A4 = uwTick 0x34182014: 6837 LDR R7, [R6] 0x34182016: BF00 NOP
.L4: 0x34182018: 681D LDR R5, [R3] 0x3418201A: 4205 TST R5, R0 0x3418201C: F000 8082 BEQ.W 46L10 ; 0x34182124 0x34182020: 6835 LDR R5, [R6] 0x34182022: 1BED SUBS R5, R5, R7 0x34182024: 2D01 CMP R5, #1 0x34182026: D9F7 BLS 46L4 ; 0x34182018 0x34182028: 2003 MOVS R0, #3 0x3418202A: E8BD 81F0 POP.W 123R4-R8, PC}
.L5: 0x3418202E: F85E 1022 LDR.W R1, [LR, R2, LSL #2] 0x34182032: F021 4180 BIC R1, R1, #0x40000000 0x34182036: F84E 1022 STR.W R1, [LR, R2, LSL #2] 0x3418203A: F44F 7180 MOV.W R1, #0x0100 0x3418203E: FA01 F000 LSL.W R0, R1, R0 0x34182042: F603 71FC ADDW R1, R3, #0x0FFC 0x34182046: 6008 STR R0, [R1] 0x34182048: F242 21A4 MOVW R1, #0x22A4 ; 0x341822A4 = uwTick 0x3418204C: F2C3 4118 MOVT R1, #0x3418 ; 0x341822A4 = uwTick 0x34182050: 680F LDR R7, [R1] 0x34182052: BF00 NOP
.L6: 0x34182054: 681E LDR R6, [R3] 0x34182056: 4206 TST R6, R0 0x34182058: D006 BEQ 46L7 ; 0x34182068 0x3418205A: 680E LDR R6, [R1] 0x3418205C: 1BF6 SUBS R6, R6, R7 0x3418205E: 2E01 CMP R6, #1 0x34182060: D9F8 BLS 46L6 ; 0x34182054 0x34182062: 2003 MOVS R0, #3 0x34182064: E8BD 81F0 POP.W 123R4-R8, PC}
.L7: 0x34182068: F85C 0022 LDR.W R0, [R12, R2, LSL #2] 0x3418206C: F020 6000 BIC R0, R0, #0x08000000 0x34182070: E05F B 46L11 ; 0x34182132
.L8: 0x34182072: F85E 5022 LDR.W R5, [LR, R2, LSL #2] 0x34182076: 27FF MOVS R7, #255 0x34182078: F6C8 4700 MOVT R7, #0x8C00 0x3418207C: F045 0504 ORR R5, R5, #4 0x34182080: F84E 5022 STR.W R5, [LR, R2, LSL #2] 0x34182084: F85C 5022 LDR.W R5, [R12, R2, LSL #2] 0x34182088: F025 6500 BIC R5, R5, #0x08000000 0x3418208C: F84C 5022 STR.W R5, [R12, R2, LSL #2] 0x34182090: F85C 5022 LDR.W R5, [R12, R2, LSL #2] 0x34182094: 403D ANDS R5, R7 0x34182096: 684F LDR R7, [R1, #4] 0x34182098: 433D ORRS R5, R7 0x3418209A: 688F LDR R7, [R1, #8] 0x3418209C: EA45 5507 ORR.W R5, R5, R7, LSL #20 0x341820A0: 690F LDR R7, [R1, #16] 0x341820A2: EA45 2507 ORR.W R5, R5, R7, LSL #8 0x341820A6: F84C 5022 STR.W R5, [R12, R2, LSL #2] 0x341820AA: F85E 7022 LDR.W R7, [LR, R2, LSL #2] 0x341820AE: 694D LDR R5, [R1, #20] 0x341820B0: F027 577C BIC R7, R7, #0x3F000000 0x341820B4: EA47 67C5 ORR.W R7, R7, R5, LSL #27 0x341820B8: 698D LDR R5, [R1, #24] 0x341820BA: EA47 6705 ORR.W R7, R7, R5, LSL #24 0x341820BE: F84E 7022 STR.W R7, [LR, R2, LSL #2] 0x341820C2: F856 7022 LDR.W R7, [R6, R2, LSL #2] 0x341820C6: 68CD LDR R5, [R1, #12] 0x341820C8: F007 477F AND R7, R7, #0xFF000000 0x341820CC: 432F ORRS R7, R5 0x341820CE: F846 7022 STR.W R7, [R6, R2, LSL #2] 0x341820D2: F85E 7022 LDR.W R7, [LR, R2, LSL #2] 0x341820D6: F027 0708 BIC R7, R7, #8 0x341820DA: F84E 7022 STR.W R7, [LR, R2, LSL #2] 0x341820DE: 68C9 LDR R1, [R1, #12] 0x341820E0: 2900 CMP R1, #0 0x341820E2: BF1E ITTT NE 0x341820E4: F85E 1022 LDRNE.W R1, [LR, R2, LSL #2] 0x341820E8: F041 010A ORRNE R1, R1, #10 0x341820EC: F84E 1022 STRNE.W R1, [LR, R2, LSL #2] 0x341820F0: F85E 1022 LDR.W R1, [LR, R2, LSL #2] 0x341820F4: F041 4180 ORR R1, R1, #0x40000000 0x341820F8: F041 0101 ORR R1, R1, #1 0x341820FC: F84E 1022 STR.W R1, [LR, R2, LSL #2] 0x34182100: F64F 0100 MOVW R1, #0xF800 0x34182104: F6CF 71FF MOVT R1, #0xFFFF 0x34182108: F848 0001 STR.W R0, [R8, R1] 0x3418210C: 6821 LDR R1, [R4] 0x3418210E: BF00 NOP
.L9: 0x34182110: 681A LDR R2, [R3] 0x34182112: 4202 TST R2, R0 0x34182114: D10F BNE 46L12 ; 0x34182136 0x34182116: 6822 LDR R2, [R4] 0x34182118: 1A52 SUBS R2, R2, R1 0x3418211A: 2A01 CMP R2, #1 0x3418211C: D9F8 BLS 46L9 ; 0x34182110 0x3418211E: 2003 MOVS R0, #3 0x34182120: E8BD 81F0 POP.W 123R4-R8, PC}
.L10: 0x34182124: F85C 0022 LDR.W R0, [R12, R2, LSL #2] 0x34182128: F020 40F0 BIC R0, R0, #0x78000000 0x3418212C: 4308 ORRS R0, R1 0x3418212E: F040 6000 ORR R0, R0, #0x08000000
.L11: 0x34182132: F84C 0022 STR.W R0, [R12, R2, LSL #2]
.L12: 0x34182136: 2000 MOVS R0, #0 0x34182138: E8BD 81F0 POP.W 123R4-R8, PC}
.L13: 0x3418213C: 2001 MOVS R0, #1 0x3418213E: E8BD 81F0 POP.W 123R4-R8, PC}

Section .init.RCC_S_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


RCC_S_IRQHandler: 0x34182142: E7FE B RCC_S_IRQHandler ; 0x34182142

Section .init.RTC_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


RTC_IRQHandler: 0x34182144: E7FE B RTC_IRQHandler ; 0x34182144

Section .init.IWDG_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


IWDG_IRQHandler: 0x34182146: E7FE B IWDG_IRQHandler ; 0x34182146

Section .init.WWDG_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


WWDG_IRQHandler: 0x34182148: E7FE B WWDG_IRQHandler ; 0x34182148

Section .init.EXTI0_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI0_IRQHandler: 0x3418214A: E7FE B EXTI0_IRQHandler ; 0x3418214A

Section .init.EXTI1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI1_IRQHandler: 0x3418214C: E7FE B EXTI1_IRQHandler ; 0x3418214C

Section .init.EXTI2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI2_IRQHandler: 0x3418214E: E7FE B EXTI2_IRQHandler ; 0x3418214E

Section .init.EXTI3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI3_IRQHandler: 0x34182150: E7FE B EXTI3_IRQHandler ; 0x34182150

Section .init.EXTI4_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI4_IRQHandler: 0x34182152: E7FE B EXTI4_IRQHandler ; 0x34182152

Section .init.EXTI5_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI5_IRQHandler: 0x34182154: E7FE B EXTI5_IRQHandler ; 0x34182154

Section .init.EXTI6_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI6_IRQHandler: 0x34182156: E7FE B EXTI6_IRQHandler ; 0x34182156

Section .init.EXTI7_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI7_IRQHandler: 0x34182158: E7FE B EXTI7_IRQHandler ; 0x34182158

Section .init.EXTI8_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI8_IRQHandler: 0x3418215A: E7FE B EXTI8_IRQHandler ; 0x3418215A

Section .init.EXTI9_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI9_IRQHandler: 0x3418215C: E7FE B EXTI9_IRQHandler ; 0x3418215C

Section .init.EXTI10_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI10_IRQHandler: 0x3418215E: E7FE B EXTI10_IRQHandler ; 0x3418215E

Section .init.EXTI11_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI11_IRQHandler: 0x34182160: E7FE B EXTI11_IRQHandler ; 0x34182160

Section .init.EXTI12_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI12_IRQHandler: 0x34182162: E7FE B EXTI12_IRQHandler ; 0x34182162

Section .init.EXTI13_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI13_IRQHandler: 0x34182164: E7FE B EXTI13_IRQHandler ; 0x34182164

Section .init.EXTI14_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI14_IRQHandler: 0x34182166: E7FE B EXTI14_IRQHandler ; 0x34182166

Section .init.EXTI15_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI15_IRQHandler: 0x34182168: E7FE B EXTI15_IRQHandler ; 0x34182168

Section .init.SAES_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SAES_IRQHandler: 0x3418216A: E7FE B SAES_IRQHandler ; 0x3418216A

Section .init.CRYP_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


CRYP_IRQHandler: 0x3418216C: E7FE B CRYP_IRQHandler ; 0x3418216C

Section .init.PKA_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


PKA_IRQHandler: 0x3418216E: E7FE B PKA_IRQHandler ; 0x3418216E

Section .init.HASH_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HASH_IRQHandler: 0x34182170: E7FE B HASH_IRQHandler ; 0x34182170

Section .init.RNG_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


RNG_IRQHandler: 0x34182172: E7FE B RNG_IRQHandler ; 0x34182172

Section .init.MCE1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


MCE1_IRQHandler: 0x34182174: E7FE B MCE1_IRQHandler ; 0x34182174

Section .init.MCE2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


MCE2_IRQHandler: 0x34182176: E7FE B MCE2_IRQHandler ; 0x34182176

Section .init.MCE3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


MCE3_IRQHandler: 0x34182178: E7FE B MCE3_IRQHandler ; 0x34182178

Section .init.MCE4_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


MCE4_IRQHandler: 0x3418217A: E7FE B MCE4_IRQHandler ; 0x3418217A

Section .init.ADC1_2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


ADC1_2_IRQHandler: 0x3418217C: E7FE B ADC1_2_IRQHandler ; 0x3418217C

Section .init.CSI_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


CSI_IRQHandler: 0x3418217E: E7FE B CSI_IRQHandler ; 0x3418217E

Section .init.DCMIPP_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


DCMIPP_IRQHandler: 0x34182180: E7FE B DCMIPP_IRQHandler ; 0x34182180

Section .init.PAHB_ERR_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


PAHB_ERR_IRQHandler: 0x34182182: E7FE B PAHB_ERR_IRQHandler ; 0x34182182

Section .init.NPU0_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


NPU0_IRQHandler: 0x34182184: E7FE B NPU0_IRQHandler ; 0x34182184

Section .init.NPU1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


NPU1_IRQHandler: 0x34182186: E7FE B NPU1_IRQHandler ; 0x34182186

Section .init.NPU2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


NPU2_IRQHandler: 0x34182188: E7FE B NPU2_IRQHandler ; 0x34182188

Section .init.NPU3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


NPU3_IRQHandler: 0x3418218A: E7FE B NPU3_IRQHandler ; 0x3418218A

Section .init.CACHEAXI_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


CACHEAXI_IRQHandler: 0x3418218C: E7FE B CACHEAXI_IRQHandler ; 0x3418218C

Section .init.LTDC_LO_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


LTDC_LO_IRQHandler: 0x3418218E: E7FE B LTDC_LO_IRQHandler ; 0x3418218E

Section .init.LTDC_LO_ERR_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


LTDC_LO_ERR_IRQHandler: 0x34182190: E7FE B LTDC_LO_ERR_IRQHandler ; 0x34182190

Section .init.DMA2D_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


DMA2D_IRQHandler: 0x34182192: E7FE B DMA2D_IRQHandler ; 0x34182192

Section .init.JPEG_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


JPEG_IRQHandler: 0x34182194: E7FE B JPEG_IRQHandler ; 0x34182194

Section .init.VENC_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


VENC_IRQHandler: 0x34182196: E7FE B VENC_IRQHandler ; 0x34182196

Section .init.GFXMMU_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GFXMMU_IRQHandler: 0x34182198: E7FE B GFXMMU_IRQHandler ; 0x34182198

Section .init.GFXTIM_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GFXTIM_IRQHandler: 0x3418219A: E7FE B GFXTIM_IRQHandler ; 0x3418219A

Section .init.GPU2D_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPU2D_IRQHandler: 0x3418219C: E7FE B GPU2D_IRQHandler ; 0x3418219C

Section .init.GPU2D_ER_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPU2D_ER_IRQHandler: 0x3418219E: E7FE B GPU2D_ER_IRQHandler ; 0x3418219E

Section .init.ICACHE_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


ICACHE_IRQHandler: 0x341821A0: E7FE B ICACHE_IRQHandler ; 0x341821A0

Section .init.HPDMA1_Channel0_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel0_IRQHandler: 0x341821A2: E7FE B HPDMA1_Channel0_IRQHandler ; 0x341821A2

Section .init.HPDMA1_Channel1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel1_IRQHandler: 0x341821A4: E7FE B HPDMA1_Channel1_IRQHandler ; 0x341821A4

Section .init.HPDMA1_Channel2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel2_IRQHandler: 0x341821A6: E7FE B HPDMA1_Channel2_IRQHandler ; 0x341821A6

Section .init.HPDMA1_Channel3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel3_IRQHandler: 0x341821A8: E7FE B HPDMA1_Channel3_IRQHandler ; 0x341821A8

Section .init.HPDMA1_Channel4_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel4_IRQHandler: 0x341821AA: E7FE B HPDMA1_Channel4_IRQHandler ; 0x341821AA

Section .init.HPDMA1_Channel5_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel5_IRQHandler: 0x341821AC: E7FE B HPDMA1_Channel5_IRQHandler ; 0x341821AC

Section .init.HPDMA1_Channel6_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel6_IRQHandler: 0x341821AE: E7FE B HPDMA1_Channel6_IRQHandler ; 0x341821AE

Section .init.HPDMA1_Channel7_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel7_IRQHandler: 0x341821B0: E7FE B HPDMA1_Channel7_IRQHandler ; 0x341821B0

Section .init.HPDMA1_Channel8_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel8_IRQHandler: 0x341821B2: E7FE B HPDMA1_Channel8_IRQHandler ; 0x341821B2

Section .init.HPDMA1_Channel9_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel9_IRQHandler: 0x341821B4: E7FE B HPDMA1_Channel9_IRQHandler ; 0x341821B4

Section .init.HPDMA1_Channel10_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel10_IRQHandler: 0x341821B6: E7FE B HPDMA1_Channel10_IRQHandler ; 0x341821B6

Section .init.HPDMA1_Channel11_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel11_IRQHandler: 0x341821B8: E7FE B HPDMA1_Channel11_IRQHandler ; 0x341821B8

Section .init.HPDMA1_Channel12_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel12_IRQHandler: 0x341821BA: E7FE B HPDMA1_Channel12_IRQHandler ; 0x341821BA

Section .init.HPDMA1_Channel13_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel13_IRQHandler: 0x341821BC: E7FE B HPDMA1_Channel13_IRQHandler ; 0x341821BC

Section .init.HPDMA1_Channel14_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel14_IRQHandler: 0x341821BE: E7FE B HPDMA1_Channel14_IRQHandler ; 0x341821BE

Section .init.HPDMA1_Channel15_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel15_IRQHandler: 0x341821C0: E7FE B HPDMA1_Channel15_IRQHandler ; 0x341821C0

Section .init.GPDMA1_Channel0_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel0_IRQHandler: 0x341821C2: E7FE B GPDMA1_Channel0_IRQHandler ; 0x341821C2

Section .init.GPDMA1_Channel1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel1_IRQHandler: 0x341821C4: E7FE B GPDMA1_Channel1_IRQHandler ; 0x341821C4

Section .init.GPDMA1_Channel2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel2_IRQHandler: 0x341821C6: E7FE B GPDMA1_Channel2_IRQHandler ; 0x341821C6

Section .init.GPDMA1_Channel3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel3_IRQHandler: 0x341821C8: E7FE B GPDMA1_Channel3_IRQHandler ; 0x341821C8

Section .init.GPDMA1_Channel4_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel4_IRQHandler: 0x341821CA: E7FE B GPDMA1_Channel4_IRQHandler ; 0x341821CA

Section .init.GPDMA1_Channel5_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel5_IRQHandler: 0x341821CC: E7FE B GPDMA1_Channel5_IRQHandler ; 0x341821CC

Section .init.GPDMA1_Channel6_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel6_IRQHandler: 0x341821CE: E7FE B GPDMA1_Channel6_IRQHandler ; 0x341821CE

Section .init.GPDMA1_Channel7_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel7_IRQHandler: 0x341821D0: E7FE B GPDMA1_Channel7_IRQHandler ; 0x341821D0

Section .init.GPDMA1_Channel8_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel8_IRQHandler: 0x341821D2: E7FE B GPDMA1_Channel8_IRQHandler ; 0x341821D2

Section .init.GPDMA1_Channel9_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel9_IRQHandler: 0x341821D4: E7FE B GPDMA1_Channel9_IRQHandler ; 0x341821D4

Section .init.GPDMA1_Channel10_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel10_IRQHandler: 0x341821D6: E7FE B GPDMA1_Channel10_IRQHandler ; 0x341821D6

Section .init.GPDMA1_Channel11_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel11_IRQHandler: 0x341821D8: E7FE B GPDMA1_Channel11_IRQHandler ; 0x341821D8

Section .init.GPDMA1_Channel12_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel12_IRQHandler: 0x341821DA: E7FE B GPDMA1_Channel12_IRQHandler ; 0x341821DA

Section .init.GPDMA1_Channel13_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel13_IRQHandler: 0x341821DC: E7FE B GPDMA1_Channel13_IRQHandler ; 0x341821DC

Section .init.GPDMA1_Channel14_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel14_IRQHandler: 0x341821DE: E7FE B GPDMA1_Channel14_IRQHandler ; 0x341821DE

Section .init.GPDMA1_Channel15_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel15_IRQHandler: 0x341821E0: E7FE B GPDMA1_Channel15_IRQHandler ; 0x341821E0

Section .init.I2C1_EV_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


I2C1_EV_IRQHandler: 0x341821E2: E7FE B I2C1_EV_IRQHandler ; 0x341821E2

Section .init.I2C1_ER_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


I2C1_ER_IRQHandler: 0x341821E4: E7FE B I2C1_ER_IRQHandler ; 0x341821E4

Section .init.I2C2_EV_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


I2C2_EV_IRQHandler: 0x341821E6: E7FE B I2C2_EV_IRQHandler ; 0x341821E6

Section .init.I2C2_ER_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


I2C2_ER_IRQHandler: 0x341821E8: E7FE B I2C2_ER_IRQHandler ; 0x341821E8

Section .init.I2C3_EV_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


I2C3_EV_IRQHandler: 0x341821EA: E7FE B I2C3_EV_IRQHandler ; 0x341821EA

Section .init.I2C3_ER_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


I2C3_ER_IRQHandler: 0x341821EC: E7FE B I2C3_ER_IRQHandler ; 0x341821EC

Section .init.I2C4_EV_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


I2C4_EV_IRQHandler: 0x341821EE: E7FE B I2C4_EV_IRQHandler ; 0x341821EE

Section .init.I2C4_ER_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


I2C4_ER_IRQHandler: 0x341821F0: E7FE B I2C4_ER_IRQHandler ; 0x341821F0

Section .init.I3C1_EV_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


I3C1_EV_IRQHandler: 0x341821F2: E7FE B I3C1_EV_IRQHandler ; 0x341821F2

Section .init.I3C1_ER_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


I3C1_ER_IRQHandler: 0x341821F4: E7FE B I3C1_ER_IRQHandler ; 0x341821F4

Section .init.I3C2_EV_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


I3C2_EV_IRQHandler: 0x341821F6: E7FE B I3C2_EV_IRQHandler ; 0x341821F6

Section .init.I3C2_ER_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


I3C2_ER_IRQHandler: 0x341821F8: E7FE B I3C2_ER_IRQHandler ; 0x341821F8

Section .init.TIM1_BRK_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM1_BRK_IRQHandler: 0x341821FA: E7FE B TIM1_BRK_IRQHandler ; 0x341821FA

Section .init.TIM1_UP_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM1_UP_IRQHandler: 0x341821FC: E7FE B TIM1_UP_IRQHandler ; 0x341821FC

Section .init.TIM1_TRG_CCU_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM1_TRG_CCU_IRQHandler: 0x341821FE: E7FE B TIM1_TRG_CCU_IRQHandler ; 0x341821FE

Section .init.TIM1_CC_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM1_CC_IRQHandler: 0x34182200: E7FE B TIM1_CC_IRQHandler ; 0x34182200

Section .init.TIM2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM2_IRQHandler: 0x34182202: E7FE B TIM2_IRQHandler ; 0x34182202

Section .init.TIM3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM3_IRQHandler: 0x34182204: E7FE B TIM3_IRQHandler ; 0x34182204

Section .init.TIM4_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM4_IRQHandler: 0x34182206: E7FE B TIM4_IRQHandler ; 0x34182206

Section .init.TIM5_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM5_IRQHandler: 0x34182208: E7FE B TIM5_IRQHandler ; 0x34182208

Section .init.TIM6_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM6_IRQHandler: 0x3418220A: E7FE B TIM6_IRQHandler ; 0x3418220A

Section .init.TIM7_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM7_IRQHandler: 0x3418220C: E7FE B TIM7_IRQHandler ; 0x3418220C

Section .init.TIM8_BRK_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM8_BRK_IRQHandler: 0x3418220E: E7FE B TIM8_BRK_IRQHandler ; 0x3418220E

Section .init.TIM8_UP_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM8_UP_IRQHandler: 0x34182210: E7FE B TIM8_UP_IRQHandler ; 0x34182210

Section .init.TIM8_TRG_CCU_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM8_TRG_CCU_IRQHandler: 0x34182212: E7FE B TIM8_TRG_CCU_IRQHandler ; 0x34182212

Section .init.TIM8_CC_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM8_CC_IRQHandler: 0x34182214: E7FE B TIM8_CC_IRQHandler ; 0x34182214

Section .init.TIM9_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM9_IRQHandler: 0x34182216: E7FE B TIM9_IRQHandler ; 0x34182216

Section .init.TIM10_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM10_IRQHandler: 0x34182218: E7FE B TIM10_IRQHandler ; 0x34182218

Section .init.TIM11_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM11_IRQHandler: 0x3418221A: E7FE B TIM11_IRQHandler ; 0x3418221A

Section .init.TIM12_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM12_IRQHandler: 0x3418221C: E7FE B TIM12_IRQHandler ; 0x3418221C

Section .init.TIM13_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM13_IRQHandler: 0x3418221E: E7FE B TIM13_IRQHandler ; 0x3418221E

Section .init.TIM14_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM14_IRQHandler: 0x34182220: E7FE B TIM14_IRQHandler ; 0x34182220

Section .init.TIM15_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM15_IRQHandler: 0x34182222: E7FE B TIM15_IRQHandler ; 0x34182222

Section .init.TIM16_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM16_IRQHandler: 0x34182224: E7FE B TIM16_IRQHandler ; 0x34182224

Section .init.TIM17_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM17_IRQHandler: 0x34182226: E7FE B TIM17_IRQHandler ; 0x34182226

Section .init.TIM18_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM18_IRQHandler: 0x34182228: E7FE B TIM18_IRQHandler ; 0x34182228

Section .init.LPTIM1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


LPTIM1_IRQHandler: 0x3418222A: E7FE B LPTIM1_IRQHandler ; 0x3418222A

Section .init.LPTIM2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


LPTIM2_IRQHandler: 0x3418222C: E7FE B LPTIM2_IRQHandler ; 0x3418222C

Section .init.LPTIM3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


LPTIM3_IRQHandler: 0x3418222E: E7FE B LPTIM3_IRQHandler ; 0x3418222E

Section .init.LPTIM4_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


LPTIM4_IRQHandler: 0x34182230: E7FE B LPTIM4_IRQHandler ; 0x34182230

Section .init.LPTIM5_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


LPTIM5_IRQHandler: 0x34182232: E7FE B LPTIM5_IRQHandler ; 0x34182232

Section .init.ADF1_FLT0_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


ADF1_FLT0_IRQHandler: 0x34182234: E7FE B ADF1_FLT0_IRQHandler ; 0x34182234

Section .init.MDF1_FLT0_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


MDF1_FLT0_IRQHandler: 0x34182236: E7FE B MDF1_FLT0_IRQHandler ; 0x34182236

Section .init.MDF1_FLT1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


MDF1_FLT1_IRQHandler: 0x34182238: E7FE B MDF1_FLT1_IRQHandler ; 0x34182238

Section .init.MDF1_FLT2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


MDF1_FLT2_IRQHandler: 0x3418223A: E7FE B MDF1_FLT2_IRQHandler ; 0x3418223A

Section .init.MDF1_FLT3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


MDF1_FLT3_IRQHandler: 0x3418223C: E7FE B MDF1_FLT3_IRQHandler ; 0x3418223C

Section .init.MDF1_FLT4_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


MDF1_FLT4_IRQHandler: 0x3418223E: E7FE B MDF1_FLT4_IRQHandler ; 0x3418223E

Section .init.MDF1_FLT5_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


MDF1_FLT5_IRQHandler: 0x34182240: E7FE B MDF1_FLT5_IRQHandler ; 0x34182240

Section .init.SAI1_A_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SAI1_A_IRQHandler: 0x34182242: E7FE B SAI1_A_IRQHandler ; 0x34182242

Section .init.SAI1_B_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SAI1_B_IRQHandler: 0x34182244: E7FE B SAI1_B_IRQHandler ; 0x34182244

Section .init.SAI2_A_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SAI2_A_IRQHandler: 0x34182246: E7FE B SAI2_A_IRQHandler ; 0x34182246

Section .init.SAI2_B_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SAI2_B_IRQHandler: 0x34182248: E7FE B SAI2_B_IRQHandler ; 0x34182248

Section .init.SPDIFRX_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SPDIFRX_IRQHandler: 0x3418224A: E7FE B SPDIFRX_IRQHandler ; 0x3418224A

Section .init.SPI1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SPI1_IRQHandler: 0x3418224C: E7FE B SPI1_IRQHandler ; 0x3418224C

Section .init.SPI2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SPI2_IRQHandler: 0x3418224E: E7FE B SPI2_IRQHandler ; 0x3418224E

Section .init.SPI3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SPI3_IRQHandler: 0x34182250: E7FE B SPI3_IRQHandler ; 0x34182250

Section .init.SPI4_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SPI4_IRQHandler: 0x34182252: E7FE B SPI4_IRQHandler ; 0x34182252

Section .init.SPI5_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SPI5_IRQHandler: 0x34182254: E7FE B SPI5_IRQHandler ; 0x34182254

Section .init.SPI6_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SPI6_IRQHandler: 0x34182256: E7FE B SPI6_IRQHandler ; 0x34182256

Section .init.USART1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


USART1_IRQHandler: 0x34182258: E7FE B USART1_IRQHandler ; 0x34182258

Section .init.USART2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


USART2_IRQHandler: 0x3418225A: E7FE B USART2_IRQHandler ; 0x3418225A

Section .init.USART3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


USART3_IRQHandler: 0x3418225C: E7FE B USART3_IRQHandler ; 0x3418225C

Section .init.UART4_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


UART4_IRQHandler: 0x3418225E: E7FE B UART4_IRQHandler ; 0x3418225E

Section .init.UART5_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


UART5_IRQHandler: 0x34182260: E7FE B UART5_IRQHandler ; 0x34182260

Section .init.USART6_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


USART6_IRQHandler: 0x34182262: E7FE B USART6_IRQHandler ; 0x34182262

Section .init.UART7_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


UART7_IRQHandler: 0x34182264: E7FE B UART7_IRQHandler ; 0x34182264

Section .init.UART8_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


UART8_IRQHandler: 0x34182266: E7FE B UART8_IRQHandler ; 0x34182266

Section .init.UART9_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


UART9_IRQHandler: 0x34182268: E7FE B UART9_IRQHandler ; 0x34182268

Section .init.USART10_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


USART10_IRQHandler: 0x3418226A: E7FE B USART10_IRQHandler ; 0x3418226A

Section .init.LPUART1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


LPUART1_IRQHandler: 0x3418226C: E7FE B LPUART1_IRQHandler ; 0x3418226C

Section .init.XSPI1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


XSPI1_IRQHandler: 0x3418226E: E7FE B XSPI1_IRQHandler ; 0x3418226E

Section .init.XSPI2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


XSPI2_IRQHandler: 0x34182270: E7FE B XSPI2_IRQHandler ; 0x34182270

Section .init.XSPI3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


XSPI3_IRQHandler: 0x34182272: E7FE B XSPI3_IRQHandler ; 0x34182272

Section .init.FMC_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


FMC_IRQHandler: 0x34182274: E7FE B FMC_IRQHandler ; 0x34182274

Section .init.SDMMC1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SDMMC1_IRQHandler: 0x34182276: E7FE B SDMMC1_IRQHandler ; 0x34182276

Section .init.SDMMC2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SDMMC2_IRQHandler: 0x34182278: E7FE B SDMMC2_IRQHandler ; 0x34182278

Section .init.UCPD1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


UCPD1_IRQHandler: 0x3418227A: E7FE B UCPD1_IRQHandler ; 0x3418227A

Section .init.USB1_OTG_HS_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


USB1_OTG_HS_IRQHandler: 0x3418227C: E7FE B USB1_OTG_HS_IRQHandler ; 0x3418227C

Section .init.USB2_OTG_HS_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


USB2_OTG_HS_IRQHandler: 0x3418227E: E7FE B USB2_OTG_HS_IRQHandler ; 0x3418227E

Section .init.ETH1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


ETH1_IRQHandler: 0x34182280: E7FE B ETH1_IRQHandler ; 0x34182280

Section .init.FDCAN1_IT0_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


FDCAN1_IT0_IRQHandler: 0x34182282: E7FE B FDCAN1_IT0_IRQHandler ; 0x34182282

Section .init.FDCAN1_IT1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


FDCAN1_IT1_IRQHandler: 0x34182284: E7FE B FDCAN1_IT1_IRQHandler ; 0x34182284

Section .init.FDCAN2_IT0_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


FDCAN2_IT0_IRQHandler: 0x34182286: E7FE B FDCAN2_IT0_IRQHandler ; 0x34182286

Section .init.FDCAN2_IT1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


FDCAN2_IT1_IRQHandler: 0x34182288: E7FE B FDCAN2_IT1_IRQHandler ; 0x34182288

Section .init.FDCAN3_IT0_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


FDCAN3_IT0_IRQHandler: 0x3418228A: E7FE B FDCAN3_IT0_IRQHandler ; 0x3418228A

Section .init.FDCAN3_IT1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


FDCAN3_IT1_IRQHandler: 0x3418228C: E7FE B FDCAN3_IT1_IRQHandler ; 0x3418228C

Section .init.FDCAN_CU_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


FDCAN_CU_IRQHandler: 0x3418228E: E7FE B FDCAN_CU_IRQHandler ; 0x3418228E

Section .init.MDIOS_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


MDIOS_IRQHandler: 0x34182290: E7FE B MDIOS_IRQHandler ; 0x34182290

Section .init.DCMI_PSSI_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


DCMI_PSSI_IRQHandler: 0x34182292: E7FE B DCMI_PSSI_IRQHandler ; 0x34182292

Section .init.WAKEUP_PIN_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


WAKEUP_PIN_IRQHandler: 0x34182294: E7FE B WAKEUP_PIN_IRQHandler ; 0x34182294

Section .init.CTI_INT0_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


CTI_INT0_IRQHandler: 0x34182296: E7FE B CTI_INT0_IRQHandler ; 0x34182296

Section .init.CTI_INT1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


CTI_INT1_IRQHandler: 0x34182298: E7FE B CTI_INT1_IRQHandler ; 0x34182298

Section .init.LTDC_UP_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


LTDC_UP_IRQHandler: 0x3418229A: E7FE B LTDC_UP_IRQHandler ; 0x3418229A

Section .init.LTDC_UP_ERR_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


LTDC_UP_ERR_IRQHandler: 0x3418229C: E7FE B LTDC_UP_ERR_IRQHandler ; 0x3418229C

Section .init_array from STM32N6xx_Startup.o, size=4, align=4

  0x341822A0:  34180BFD     DC.W       SystemCoreClockUpdate

Section .bss.uwTick from blto2_FSBL_lto.o, size=4, align=4


uwTick: 0x341822A4: 00 DC.B 0x00 ; '\0' 0x341822A5: 00 DC.B 0x00 ; '\0' 0x341822A6: 00 DC.B 0x00 ; '\0' 0x341822A7: 00 DC.B 0x00 ; '\0'

Section .bss.uwTickPrio from blto2_FSBL_lto.o, size=1, align=4


uwTickPrio: 0x341822A8: 03 DC.B 0x03 ; '\x03'

Section .data.SystemCoreClock from blto2_FSBL_lto.o, size=4, align=4


SystemCoreClock: 0x341822AC: 00 DC.B 0x00 ; '\0' 0x341822AD: 90 DC.B 0x90 ; '\x90' 0x341822AE: D0 DC.B 0xD0 ; '\xD0' 0x341822AF: 03 DC.B 0x03 ; '\x03'

Section .segger.init.__SEGGER_init_ctors from SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=36, align=4


__SEGGER_init_ctors: 0x341822B0: B500 PUSH 123LR} 0x341822B2: 4806 LDR R0, =0x341822A0 ; [PC, #24] [0x341822CC] 0x341822B4: 4906 LDR R1, =uwTick ; [PC, #24] [0x341822D0] =0x341822A4
.L1: 0x341822B6: 4288 CMP R0, R1 0x341822B8: D005 BEQ 46L2 ; 0x341822C6 0x341822BA: 6802 LDR R2, [R0] 0x341822BC: 3004 ADDS R0, #4 0x341822BE: B403 PUSH 123R0-R1} 0x341822C0: 4790 BLX R2 0x341822C2: BC03 POP 123R0-R1} 0x341822C4: E7F7 B 46L1 ; 0x341822B6
.L2: 0x341822C6: BC08 POP 123R3} 0x341822C8: 4718 BX R3 0x341822CA: 0000 NOP 0x341822CC: 341822A0 DC.W 341822A0 ; R_ARM_ABS32 0x341822D0: 341822A4 DC.W uwTick

Section .segger.init.table from [ Linker created ], size=36, align=4

  0x341822D4:  341822FD     DC.W       __SEGGER_init_zero
  0x341822D8:  A4           DC.B       0xA4                     ; '\xA4'
  0x341822D9:  22           DC.B       0x22                     ; '\"'
  0x341822DA:  18           DC.B       0x18                     ; '\x18'
  0x341822DB:  34           DC.B       0x34                     ; '4'
  0x341822DC:  05           DC.B       0x05                     ; '\x05'
  0x341822DD:  00           DC.B       0x00                     ; '\0'
  0x341822DE:  00           DC.B       0x00                     ; '\0'
  0x341822DF:  00           DC.B       0x00                     ; '\0'
  0x341822E0:  3418230F     DC.W       __SEGGER_init_copy
  0x341822E4:  AC           DC.B       0xAC                     ; '\xAC'
  0x341822E5:  22           DC.B       0x22                     ; '\"'
  0x341822E6:  18           DC.B       0x18                     ; '\x18'
  0x341822E7:  34           DC.B       0x34                     ; '4'
  0x341822E8:  341822F8     DC.W       341822F8               ; R_ARM_ABS32
  0x341822EC:  04           DC.B       0x04                     ; '\x04'
  0x341822ED:  00           DC.B       0x00                     ; '\0'
  0x341822EE:  00           DC.B       0x00                     ; '\0'
  0x341822EF:  00           DC.B       0x00                     ; '\0'
  0x341822F0:  341822B1     DC.W       __SEGGER_init_ctors
  0x341822F4:  341814B7     DC.W       __SEGGER_init_done

Section .segger.init.data from [ Linker created ], size=4, align=4

  0x341822F8:  00           DC.B       0x00                     ; '\0'
  0x341822F9:  90           DC.B       0x90                     ; '\x90'
  0x341822FA:  D0           DC.B       0xD0                     ; '\xD0'
  0x341822FB:  03           DC.B       0x03                     ; '\x03'

Section .segger.init.__SEGGER_init_zero from SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=18, align=2


__SEGGER_init_zero: 0x341822FC: 6820 LDR R0, [R4] 0x341822FE: 6861 LDR R1, [R4, #4] 0x34182300: 3408 ADDS R4, #8 0x34182302: 2200 MOVS R2, #0 0x34182304: E000 B 46L2 ; 0x34182308
.L1: 0x34182306: 5442 STRB R2, [R0, R1]
.L2: 0x34182308: 1E49 SUBS R1, R1, #1 0x3418230A: D5FC BPL 46L1 ; 0x34182306 0x3418230C: 4770 BX LR

Section .segger.init.__SEGGER_init_copy from SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=20, align=2


__SEGGER_init_copy: 0x3418230E: 6820 LDR R0, [R4] 0x34182310: 6861 LDR R1, [R4, #4] 0x34182312: 68A2 LDR R2, [R4, #8] 0x34182314: 340C ADDS R4, #12 0x34182316: E001 B 46L2 ; 0x3418231C
.L1: 0x34182318: 5C8B LDRB R3, [R1, R2] 0x3418231A: 5483 STRB R3, [R0, R2]
.L2: 0x3418231C: 1E52 SUBS R2, R2, #1 0x3418231E: D5FB BPL 46L1 ; 0x34182318 0x34182320: 4770 BX LR

Section .bss.block.stack from [ Linker created ], size=8192, align=8

(341FE000-341FFFFF excluded)

LINK SUMMARY

  7 836 bytes read-only  code    + 
    116 bytes read-only  data    =   7 952 bytes read-only (total)
  8 201 bytes read-write data
Name Range Size Used Unused Alignment Loss
AXI_RAM2 34180400-341FFFFF 523 264 16 157 3.09 507 104 96.91 3 0.00
Link complete: 0 errors.