CONTENTS

LINK INFORMATION

SEGGER ARM Linker 4.44.5 compiled Aug  7 2026 18:47:09
Copyright (c) 2017-2026 SEGGER Microcontroller GmbH    www.segger.com

--add-region:ITCM_RAM=0x00010000@0x10000000
--add-region:DTCM_RAM=0x00020000@0x30000000
--add-region:FLEX_RAM=0x00064000@0x34000000
--add-region:AXI_RAM1=0x0009c000@0x34064000
--add-region:AXI_RAM2=0x0007fc00@0x34180400
--add-region:AXI_RAM3=0x00070000@0x34200000
--add-region:AXI_RAM4=0x00070000@0x34270000
--add-region:AXI_RAM5=0x00070000@0x342e0000
--add-region:AXI_RAM6=0x00070000@0x34350000
--add-region:AXI_RAM7=0x00040000@0x343c0000
--add-region:AXI_RAM8=0x00020000@0x34400000
--add-region:AHB_RAM1=0x00004000@0x38000000
--add-region:AHB_RAM2=0x00004000@0x38004000
--add-region:BKP_RAM=0x00002000@0x3c000000
--full-section-headers
--merge-sections
--merge-strings
--map-html
--map-file=Output/Debug/Exe/blto2_FSBL.htm
--map-full
--list-all-undefineds
-eReset_Handler
-EL
-mcpu=8.1-M.main
--silent
-TD:/Projekte/hadewe_blto2/trunk/firmware/FSBL/SES/STM32N6xx_RAM.icf
--defsym=__STACKSIZE__=16384
--defsym=__STACKSIZE_PROCESS__=0
--defsym=__HEAPSIZE__=256
--defsym=__SEGGER_RTL_vfprintf=__SEGGER_RTL_vfprintf_short_float_long_long
--defsym=__SEGGER_RTL_vfscanf=__SEGGER_RTL_vfscanf_int
-u_vectors
-o
D:/Projekte/hadewe_blto2/trunk/firmware/FSBL/SES/Output/Debug/Exe/blto2_FSBL.elf
D:/Projekte/hadewe_blto2/trunk/firmware/FSBL/SES/Output/Debug/Obj/blto2_FSBL_lto.o
Output/Debug/Obj/SEGGER_THUMB_Startup.o
Output/Debug/Obj/stm32n657xx_Vectors.o
Output/Debug/Obj/STM32N6xx_Startup.o
C:/Program Files/SEGGER/SEGGER Embedded Studio 8.30a/lib/libc_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a
C:/Program Files/SEGGER/SEGGER Embedded Studio 8.30a/lib/SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a
C:/Program Files/SEGGER/SEGGER Embedded Studio 8.30a/lib/prinops_rtt_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a
C:/Program Files/SEGGER/SEGGER Embedded Studio 8.30a/lib/heapops_disable_interrupts_locking_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a
C:/Program Files/SEGGER/SEGGER Embedded Studio 8.30a/lib/strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a
C:/Program Files/SEGGER/SEGGER Embedded Studio 8.30a/lib/mbops_timeops_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a

LINKER SCRIPT

Linker script 'D:/Projekte/hadewe_blto2/trunk/firmware/FSBL/SES/STM32N6xx_RAM.icf'

/*********************************************************************
*                    SEGGER Microcontroller GmbH                     *
*                        The Embedded Experts                        *
**********************************************************************
*                                                                    *
*            (c) 2014 - 2026 SEGGER Microcontroller GmbH             *
*                                                                    *
*       www.segger.com     Support: support@segger.com               *
*                                                                    *
**********************************************************************
*                                                                    *
* All rights reserved.                                               *
*                                                                    *
* Redistribution and use in source and binary forms, with or         *
* without modification, are permitted provided that the following    *
* condition is met:                                                  *
*                                                                    *
* - Redistributions of source code must retain the above copyright   *
*   notice, this condition and the following disclaimer.             *
*                                                                    *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND             *
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,        *
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF           *
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE           *
* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR           *
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT  *
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;    *
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF      *
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT          *
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE  *
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH   *
* DAMAGE.                                                            *
*                                                                    *
**********************************************************************
-------------------------- END-OF-HEADER -----------------------------

File    : STM32N6xx_RAM.icf
Purpose : STM32N6xx linker script for application placement in RAM
          (to be copied to RAM by bootloader or debugger)
          for use with the SEGGER Linker.
Maps    : STM32N645A0HxQ, STM32N645B0HxQ, STM32N645I0HxQ, STM32N645L0HxQ,
          STM32N645X0HxQ, STM32N645Z0HxQ, STM32N647A0HxQ, STM32N647B0HxQ,
          STM32N647I0HxQ, STM32N647L0HxQ, STM32N647X0HxQ, STM32N647Z0HxQ,
          STM32N655A0HxQ, STM32N655B0HxQ, STM32N655I0HxQ, STM32N655L0HxQ,
          STM32N655X0HxQ, STM32N655Z0HxQ, STM32N657A0HxQ, STM32N657B0HxQ,
          STM32N657I0HxQ, STM32N657L0HxQ, STM32N657X0HxQ, STM32N657Z0HxQ
Literature:
  [1]  SEGGER Linker User Guide (https://www.segger.com/doc/UM20005_Linker.html)
  [2]  SEGGER Linker Section Placement (https://wiki.segger.com/SEGGER_Linker_Script_Files)
*/

define memory with size = 4G;

//
// Combined regions per memory type
//
define region RAM   = AXI_RAM2;

//
// Block definitions
//
define block ctors                          { section .ctors,     section .ctors.*, block with         alphabetical order { init_array } };
define block dtors                          { section .dtors,     section .dtors.*, block with reverse alphabetical order { fini_array } };
define block exidx                          { section .ARM.exidx, section .ARM.exidx.* };
define block tbss                           { section .tbss,      section .tbss.*  };
define block tdata                          { section .tdata,     section .tdata.* };
define block tls with fixed order           { block tbss, block tdata };
define block tdata_load                     { copy of block tdata };
define block heap           with auto size = __HEAPSIZE__,  alignment = 8, readwrite access { };
define block stack          with      size = __STACKSIZE__, alignment = 8, readwrite access { };
define block stack_process  with      size = __STACKSIZE_PROCESS__, alignment = 8, /* fill =0xCD, */ readwrite access { };

//
// Explicit initialization settings for sections
// Packing options for initialize by copy: packing=auto/lzss/zpak/packbits
//
do not initialize                           { section .non_init, section .non_init.*, section .*.non_init, section .*.non_init.* };
do not initialize                           { section .no_init, section .no_init.*, section .*.no_init, section .*.no_init.* };   // Legacy sections, kept for backwards compatibility
do not initialize                           { section .noinit, section .noinit.*, section .*.noinit, section .*.noinit.* };       // Legacy sections, used by some SDKs/HALs
do not initialize                           { section .vectors_ram };
initialize by copy with packing=auto        { section .data, section .data.*, section .*.data, section .*.data.* };               // Static data sections
initialize by copy with packing=auto        { section .fast, section .fast.*, section .*.fast, section .*.fast.* };               // "RAM Code" sections

initialize by calling __SEGGER_STOP_X_InitLimits    { section .data.stop.* };

#define USES_ALLOC_FUNC                                   \
  linked symbol malloc || linked symbol aligned_alloc ||  \
  linked symbol calloc || linked symbol realloc

initialize by calling __SEGGER_init_heap if USES_ALLOC_FUNC { block heap };                        // Init the heap if one is required
initialize by calling __SEGGER_init_ctors    { block ctors };                                      // Call constructors for global objects which need to be constructed before reaching main (if any). Make sure this is done after setting up heap.

//assert with warning "free() linked into application but there are no calls to an allocation function!" {
//  linked symbol free => USES_ALLOC_FUNC
//};

assert with error "heap is too small!"              { USES_ALLOC_FUNC => size  of block heap >= 48 };
assert with error "heap size not a multiple of 8!"  { USES_ALLOC_FUNC => size  of block heap % 8 == 0 };
assert with error "heap not correctly aligned!"     { USES_ALLOC_FUNC => start of block heap % 8 == 0 };

//
// Explicit placement in RAMn
//
place in AHB_RAM1                           { section .AHB_RAM1, section .AHB_RAM1.* };
place in AHB_RAM2                           { section .AHB_RAM2, section .AHB_RAM2.* };
place in AXI_RAM1                           { section .AXI_RAM1, section .AXI_RAM1.* };  // This region may be deactivated and not accessible
place in AXI_RAM2                           { section .AXI_RAM2, section .AXI_RAM2.* };  // This region may be deactivated and not accessible
place in AXI_RAM3                           { section .AXI_RAM3, section .AXI_RAM3.* };  // This region may be deactivated and not accessible
place in AXI_RAM4                           { section .AXI_RAM4, section .AXI_RAM4.* };  // This region may be deactivated and not accessible
place in BKP_RAM                            { section .BKP_RAM,  section .BKP_RAM.*  };  // This region may be deactivated and not accessible
place in DTCM_RAM                           { section .DTCM_RAM, section .DTCM_RAM.* };  // This region may be deactivated and not accessible
place in FLEX_RAM                           { section .FLEX_RAM, section .FLEX_RAM.* };
place in ITCM_RAM                           { section .ITCM_RAM, section .ITCM_RAM.* };  // This region may be deactivated and not accessible

//
// RAM Placement
//
place at start of RAM                       { section .vectors };                                   // Vector table section
place in RAM with minimum size order        { block tdata_load,                                     // Thread-local-storage load image
                                              block exidx,                                          // ARM exception unwinding block
                                              block ctors,                                          // Constructors block
                                              block dtors,                                          // Destructors block
                                              readonly,                                             // Catch-all for readonly data (e.g. .rodata, .srodata)
                                              readexec                                              // Catch-all for (readonly) executable code (e.g. .text)
                                            };
place in RAM                                { section .fast, section .fast.* };                     // "ramfunc" section
place in RAM with auto order                { block tls,                                            // Thread-local-storage block
                                              readwrite,                                            // Catch-all for initialized/uninitialized data sections (e.g. .data, .noinit)
                                              zeroinit                                              // Catch-all for zero-initialized data sections (e.g. .bss)
                                            };
place in RAM                                { block heap };                                         // Heap reserved block
place at end of RAM                         { block stack };                                        // Stack reserved block at the end

PLACEMENT SUMMARY

place at 0x34180400

Symbol or [section] name Type Address Size Align Object File
_vectors Code 0x34180400 844 1024 stm32n657xx_Vectors.o

place at 0x34200000

Symbol or [section] name Type Address Size Align Object File
[.bss.block.stack] None 0x341FC000 16 384 8 [ Linker created ]

"<#14> at line 120, col 45": place in [0x34180400 to 0x341FFFFF] with maximum packing

Symbol or [section] name Type Address Size Align Object File
Error_Handler Code 0x3418074C 4 4 blto2_FSBL_lto.o
HAL_MspInit Code 0x34180750 8 4 blto2_FSBL_lto.o
SysTick_Handler Code 0x34180758 8 4 blto2_FSBL_lto.o
SystemCoreClockUpdate Code 0x34180760 828 4 blto2_FSBL_lto.o
HAL_Init Code 0x34180A9C 48 4 blto2_FSBL_lto.o
HAL_GetTick Code 0x34180ACC 12 4 blto2_FSBL_lto.o
__NVIC_SetPriorityGrouping Code 0x34180AD8 60 4 blto2_FSBL_lto.o
HAL_NVIC_SetPriority Code 0x34180B14 168 4 blto2_FSBL_lto.o
__NVIC_GetPriorityGrouping Code 0x34180BBC 16 4 blto2_FSBL_lto.o
NVIC_EncodePriority Code 0x34180BCC 100 4 blto2_FSBL_lto.o
HAL_SYSTICK_Config Code 0x34180C30 16 4 blto2_FSBL_lto.o
HAL_GPIO_Init Code 0x34180C40 1 928 4 blto2_FSBL_lto.o
LL_RCC_HSI_SetDivider Code 0x341813C8 28 4 blto2_FSBL_lto.o
LL_RCC_HSI_IsReady Code 0x341813E4 16 4 blto2_FSBL_lto.o
LL_RCC_GetCpuClkSource Code 0x341813F4 16 4 blto2_FSBL_lto.o
LL_RCC_GetSysClkSource Code 0x34181404 16 4 blto2_FSBL_lto.o
LL_RCC_PLL1_GetSource Code 0x34181414 16 4 blto2_FSBL_lto.o
LL_RCC_PLL2_GetSource Code 0x34181424 16 4 blto2_FSBL_lto.o
LL_RCC_PLL3_GetSource Code 0x34181434 16 4 blto2_FSBL_lto.o
LL_RCC_PLL4_GetSource Code 0x34181444 16 4 blto2_FSBL_lto.o
LL_RCC_MSI_SetFrequency Code 0x34181454 28 4 blto2_FSBL_lto.o
LL_RCC_MSI_IsReady Code 0x34181470 16 4 blto2_FSBL_lto.o
LL_RCC_LSI_IsReady Code 0x34181480 16 4 blto2_FSBL_lto.o
LL_RCC_LSE_IsReady Code 0x34181490 16 4 blto2_FSBL_lto.o
LL_RCC_PLL1_IsReady Code 0x341814A0 16 4 blto2_FSBL_lto.o
LL_RCC_IC1_GetSource Code 0x341814B0 16 4 blto2_FSBL_lto.o
LL_RCC_IC2_GetSource Code 0x341814C0 16 4 blto2_FSBL_lto.o
LL_RCC_IC6_GetSource Code 0x341814D0 16 4 blto2_FSBL_lto.o
LL_RCC_IC11_GetSource Code 0x341814E0 16 4 blto2_FSBL_lto.o
LL_RCC_PLL2_IsReady Code 0x341814F0 16 4 blto2_FSBL_lto.o
LL_RCC_PLL3_IsReady Code 0x34181500 16 4 blto2_FSBL_lto.o
LL_RCC_PLL4_IsReady Code 0x34181510 16 4 blto2_FSBL_lto.o
RCC_PLL_Source_IsReady Code 0x34181520 84 4 blto2_FSBL_lto.o
LL_RCC_HSE_IsReady Code 0x34181574 16 4 blto2_FSBL_lto.o
LL_RCC_HSI_GetDivider Code 0x34181584 16 4 blto2_FSBL_lto.o
LL_RCC_PLL1_IsEnabledBypass Code 0x34181594 16 4 blto2_FSBL_lto.o
LL_RCC_PLL2_IsEnabledBypass Code 0x341815A4 16 4 blto2_FSBL_lto.o
LL_RCC_PLL3_IsEnabledBypass Code 0x341815B4 16 4 blto2_FSBL_lto.o
LL_RCC_PLL4_IsEnabledBypass Code 0x341815C4 16 4 blto2_FSBL_lto.o
HAL_RCC_GetClockConfig Code 0x341815D4 240 4 blto2_FSBL_lto.o
LL_RCC_PLL4_IsReady.57 Code 0x341816C4 16 4 blto2_FSBL_lto.o
LL_RCC_PLL4P_IsEnabled Code 0x341816D4 16 4 blto2_FSBL_lto.o
LL_RCC_PLL4_GetSource.58 Code 0x341816E4 16 4 blto2_FSBL_lto.o
RCCEx_GetPLLSourceFreq Code 0x341816F4 140 4 blto2_FSBL_lto.o
LL_RCC_PLL4_GetM Code 0x34181780 16 4 blto2_FSBL_lto.o
LL_RCC_PLL4_GetN Code 0x34181790 16 4 blto2_FSBL_lto.o
LL_RCC_PLL4_GetFRACN Code 0x341817A0 16 4 blto2_FSBL_lto.o
LL_RCC_PLL4_GetP1 Code 0x341817B0 16 4 blto2_FSBL_lto.o
LL_RCC_PLL4_GetP2 Code 0x341817C0 16 4 blto2_FSBL_lto.o
RCCEx_CalcPLLFreq Code 0x341817D0 136 4 blto2_FSBL_lto.o
LL_RCC_PLL4_IsEnabledBypass.59 Code 0x34181858 16 4 blto2_FSBL_lto.o
LL_RCC_HSI_IsReady.60 Code 0x34181868 16 4 blto2_FSBL_lto.o
LL_RCC_HSI_GetDivider.61 Code 0x34181878 16 4 blto2_FSBL_lto.o
LL_RCC_MSI_IsReady.62 Code 0x34181888 16 4 blto2_FSBL_lto.o
LL_RCC_MSI_GetFrequency Code 0x34181898 16 4 blto2_FSBL_lto.o
LL_RCC_HSE_IsReady.63 Code 0x341818A8 16 4 blto2_FSBL_lto.o
LL_RCC_PLL3_IsReady.64 Code 0x341818B8 16 4 blto2_FSBL_lto.o
LL_RCC_PLL3P_IsEnabled Code 0x341818C8 16 4 blto2_FSBL_lto.o
LL_RCC_PLL3_GetSource.65 Code 0x341818D8 16 4 blto2_FSBL_lto.o
LL_RCC_PLL3_GetM Code 0x341818E8 16 4 blto2_FSBL_lto.o
LL_RCC_PLL3_GetN Code 0x341818F8 16 4 blto2_FSBL_lto.o
LL_RCC_PLL3_GetFRACN Code 0x34181908 16 4 blto2_FSBL_lto.o
LL_RCC_PLL3_GetP1 Code 0x34181918 16 4 blto2_FSBL_lto.o
LL_RCC_PLL3_GetP2 Code 0x34181928 16 4 blto2_FSBL_lto.o
LL_RCC_PLL3_IsEnabledBypass.66 Code 0x34181938 16 4 blto2_FSBL_lto.o
LL_RCC_PLL2_IsReady.67 Code 0x34181948 16 4 blto2_FSBL_lto.o
LL_RCC_PLL2P_IsEnabled Code 0x34181958 16 4 blto2_FSBL_lto.o
LL_RCC_PLL2_GetSource.68 Code 0x34181968 16 4 blto2_FSBL_lto.o
LL_RCC_PLL2_GetM Code 0x34181978 16 4 blto2_FSBL_lto.o
LL_RCC_PLL2_GetN Code 0x34181988 16 4 blto2_FSBL_lto.o
LL_RCC_PLL2_GetFRACN Code 0x34181998 16 4 blto2_FSBL_lto.o
LL_RCC_PLL2_GetP1 Code 0x341819A8 16 4 blto2_FSBL_lto.o
LL_RCC_PLL2_GetP2 Code 0x341819B8 16 4 blto2_FSBL_lto.o
LL_RCC_PLL2_IsEnabledBypass.69 Code 0x341819C8 16 4 blto2_FSBL_lto.o
LL_RCC_PLL1_IsReady.70 Code 0x341819D8 16 4 blto2_FSBL_lto.o
LL_RCC_PLL1P_IsEnabled Code 0x341819E8 16 4 blto2_FSBL_lto.o
LL_RCC_PLL1_GetSource.71 Code 0x341819F8 16 4 blto2_FSBL_lto.o
LL_RCC_PLL1_GetM Code 0x34181A08 16 4 blto2_FSBL_lto.o
LL_RCC_PLL1_GetN Code 0x34181A18 16 4 blto2_FSBL_lto.o
LL_RCC_PLL1_GetFRACN Code 0x34181A28 16 4 blto2_FSBL_lto.o
LL_RCC_PLL1_GetP1 Code 0x34181A38 16 4 blto2_FSBL_lto.o
LL_RCC_PLL1_GetP2 Code 0x34181A48 16 4 blto2_FSBL_lto.o
LL_RCC_PLL1_IsEnabledBypass.72 Code 0x34181A58 16 4 blto2_FSBL_lto.o
_start Code 0x34181A68 20 4 SEGGER_THUMB_Startup.o
reset_handler Code 0x34181A7C 44 4 STM32N6xx_Startup.o
__aeabi_memclr Code 0x34181AA8 104 4 strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
MX_GPIO_Init Code 0x34181B10 466 4 blto2_FSBL_lto.o
PVD_PVM_IRQHandler Code 0x34181CE2 2 2 stm32n657xx_Vectors.o
LL_AHB4_GRP1_EnableClock Code 0x34181CE4 34 4 blto2_FSBL_lto.o
DTS_IRQHandler Code 0x34181D06 2 2 stm32n657xx_Vectors.o
main Code 0x34181D08 66 4 blto2_FSBL_lto.o
RCC_IRQHandler Code 0x34181D4A 2 2 stm32n657xx_Vectors.o
SystemClock_Config Code 0x34181D4C 238 4 blto2_FSBL_lto.o
LOCKUP_IRQHandler Code 0x34181E3A 2 2 stm32n657xx_Vectors.o
assert_failed Code 0x34181E3C 10 4 blto2_FSBL_lto.o
CACHE_ECC_IRQHandler Code 0x34181E46 2 2 stm32n657xx_Vectors.o
NMI_Handler Code 0x34181E48 2 4 blto2_FSBL_lto.o
TCM_ECC_IRQHandler Code 0x34181E4A 2 2 stm32n657xx_Vectors.o
HardFault_Handler Code 0x34181E4C 2 4 blto2_FSBL_lto.o
BCK_ECC_IRQHandler Code 0x34181E4E 2 2 stm32n657xx_Vectors.o
MemManage_Handler Code 0x34181E50 2 4 blto2_FSBL_lto.o
FPU_IRQHandler Code 0x34181E52 2 2 stm32n657xx_Vectors.o
BusFault_Handler Code 0x34181E54 2 4 blto2_FSBL_lto.o
RTC_S_IRQHandler Code 0x34181E56 2 2 stm32n657xx_Vectors.o
UsageFault_Handler Code 0x34181E58 2 4 blto2_FSBL_lto.o
TAMP_IRQHandler Code 0x34181E5A 2 2 stm32n657xx_Vectors.o
SVC_Handler Code 0x34181E5C 2 4 blto2_FSBL_lto.o
RIFSC_TAMPER_IRQHandler Code 0x34181E5E 2 2 stm32n657xx_Vectors.o
DebugMon_Handler Code 0x34181E60 2 4 blto2_FSBL_lto.o
IAC_IRQHandler Code 0x34181E62 2 2 stm32n657xx_Vectors.o
PendSV_Handler Code 0x34181E64 2 4 blto2_FSBL_lto.o
RCC_S_IRQHandler Code 0x34181E66 2 2 stm32n657xx_Vectors.o
SystemInit Code 0x34181E68 510 4 blto2_FSBL_lto.o
RTC_IRQHandler Code 0x34182066 2 2 stm32n657xx_Vectors.o
HAL_InitTick Code 0x34182068 126 4 blto2_FSBL_lto.o
IWDG_IRQHandler Code 0x341820E6 2 2 stm32n657xx_Vectors.o
HAL_IncTick Code 0x341820E8 26 4 blto2_FSBL_lto.o
WWDG_IRQHandler Code 0x34182102 2 2 stm32n657xx_Vectors.o
HAL_Delay Code 0x34182104 58 4 blto2_FSBL_lto.o
EXTI0_IRQHandler Code 0x3418213E 2 2 stm32n657xx_Vectors.o
HAL_NVIC_SetPriorityGrouping Code 0x34182140 62 4 blto2_FSBL_lto.o
EXTI1_IRQHandler Code 0x3418217E 2 2 stm32n657xx_Vectors.o
__NVIC_SetPriority Code 0x34182180 62 4 blto2_FSBL_lto.o
EXTI2_IRQHandler Code 0x341821BE 2 2 stm32n657xx_Vectors.o
SysTick_Config Code 0x341821C0 78 4 blto2_FSBL_lto.o
EXTI3_IRQHandler Code 0x3418220E 2 2 stm32n657xx_Vectors.o
HAL_GPIO_WritePin Code 0x34182210 102 4 blto2_FSBL_lto.o
EXTI4_IRQHandler Code 0x34182276 2 2 stm32n657xx_Vectors.o
HAL_PWREx_ConfigSupply Code 0x34182278 114 4 blto2_FSBL_lto.o
EXTI5_IRQHandler Code 0x341822EA 2 2 stm32n657xx_Vectors.o
HAL_PWREx_ControlVoltageScaling Code 0x341822EC 114 4 blto2_FSBL_lto.o
EXTI6_IRQHandler Code 0x3418235E 2 2 stm32n657xx_Vectors.o
HAL_PWREx_EnableVddIO3 Code 0x34182360 18 4 blto2_FSBL_lto.o
EXTI7_IRQHandler Code 0x34182372 2 2 stm32n657xx_Vectors.o
LL_RCC_HSI_Enable Code 0x34182374 14 4 blto2_FSBL_lto.o
EXTI8_IRQHandler Code 0x34182382 2 2 stm32n657xx_Vectors.o
HAL_RCC_OscConfig Code 0x34182384 2 810 4 blto2_FSBL_lto.o
EXTI9_IRQHandler Code 0x34182E7E 2 2 stm32n657xx_Vectors.o
LL_RCC_HSI_SetCalibTrimming Code 0x34182E80 30 4 blto2_FSBL_lto.o
EXTI10_IRQHandler Code 0x34182E9E 2 2 stm32n657xx_Vectors.o
LL_RCC_HSI_Disable Code 0x34182EA0 14 4 blto2_FSBL_lto.o
EXTI11_IRQHandler Code 0x34182EAE 2 2 stm32n657xx_Vectors.o
LL_RCC_MSI_SetCalibTrimming Code 0x34182EB0 30 4 blto2_FSBL_lto.o
EXTI12_IRQHandler Code 0x34182ECE 2 2 stm32n657xx_Vectors.o
LL_RCC_MSI_Enable Code 0x34182ED0 14 4 blto2_FSBL_lto.o
EXTI13_IRQHandler Code 0x34182EDE 2 2 stm32n657xx_Vectors.o
LL_RCC_MSI_Disable Code 0x34182EE0 14 4 blto2_FSBL_lto.o
EXTI14_IRQHandler Code 0x34182EEE 2 2 stm32n657xx_Vectors.o
LL_RCC_LSI_Enable Code 0x34182EF0 14 4 blto2_FSBL_lto.o
EXTI15_IRQHandler Code 0x34182EFE 2 2 stm32n657xx_Vectors.o
LL_RCC_LSI_Disable Code 0x34182F00 14 4 blto2_FSBL_lto.o
SAES_IRQHandler Code 0x34182F0E 2 2 stm32n657xx_Vectors.o
RCC_PLL_IsNewConfig Code 0x34182F10 218 4 blto2_FSBL_lto.o
CRYP_IRQHandler Code 0x34182FEA 2 2 stm32n657xx_Vectors.o
RCC_PLL_Config Code 0x34182FEC 846 4 blto2_FSBL_lto.o
PKA_IRQHandler Code 0x3418333A 2 2 stm32n657xx_Vectors.o
RCC_PLL_Enable Code 0x3418333C 94 4 blto2_FSBL_lto.o
HASH_IRQHandler Code 0x3418339A 2 2 stm32n657xx_Vectors.o
HAL_RCC_ClockConfig Code 0x3418339C 2 498 4 blto2_FSBL_lto.o
RNG_IRQHandler Code 0x34183D5E 2 2 stm32n657xx_Vectors.o
RCC_IC_CheckPLLSources Code 0x34183D60 234 4 blto2_FSBL_lto.o
MCE1_IRQHandler Code 0x34183E4A 2 2 stm32n657xx_Vectors.o
LL_RCC_IC1_Enable Code 0x34183E4C 14 4 blto2_FSBL_lto.o
MCE2_IRQHandler Code 0x34183E5A 2 2 stm32n657xx_Vectors.o
HAL_RCC_GetCpuClockFreq Code 0x34183E5C 238 4 blto2_FSBL_lto.o
MCE3_IRQHandler Code 0x34183F4A 2 2 stm32n657xx_Vectors.o
LL_RCC_IC1_GetDivider Code 0x34183F4C 22 4 blto2_FSBL_lto.o
MCE4_IRQHandler Code 0x34183F62 2 2 stm32n657xx_Vectors.o
HAL_RCCEx_GetPLL1CLKFreq Code 0x34183F64 130 4 blto2_FSBL_lto.o
ADC1_2_IRQHandler Code 0x34183FE6 2 2 stm32n657xx_Vectors.o
HAL_RCCEx_GetPLL2CLKFreq Code 0x34183FE8 130 4 blto2_FSBL_lto.o
CSI_IRQHandler Code 0x3418406A 2 2 stm32n657xx_Vectors.o
HAL_RCCEx_GetPLL3CLKFreq Code 0x3418406C 130 4 blto2_FSBL_lto.o
DCMIPP_IRQHandler Code 0x341840EE 2 2 stm32n657xx_Vectors.o
HAL_RCCEx_GetPLL4CLKFreq Code 0x341840F0 130 4 blto2_FSBL_lto.o
PAHB_ERR_IRQHandler Code 0x34184172 2 2 stm32n657xx_Vectors.o
NPU0_IRQHandler Code 0x34184174 2 2 stm32n657xx_Vectors.o
NPU1_IRQHandler Code 0x34184176 2 2 stm32n657xx_Vectors.o
NPU2_IRQHandler Code 0x34184178 2 2 stm32n657xx_Vectors.o
NPU3_IRQHandler Code 0x3418417A 2 2 stm32n657xx_Vectors.o
CACHEAXI_IRQHandler Code 0x3418417C 2 2 stm32n657xx_Vectors.o
LTDC_LO_IRQHandler Code 0x3418417E 2 2 stm32n657xx_Vectors.o
LTDC_LO_ERR_IRQHandler Code 0x34184180 2 2 stm32n657xx_Vectors.o
DMA2D_IRQHandler Code 0x34184182 2 2 stm32n657xx_Vectors.o
JPEG_IRQHandler Code 0x34184184 2 2 stm32n657xx_Vectors.o
VENC_IRQHandler Code 0x34184186 2 2 stm32n657xx_Vectors.o
GFXMMU_IRQHandler Code 0x34184188 2 2 stm32n657xx_Vectors.o
GFXTIM_IRQHandler Code 0x3418418A 2 2 stm32n657xx_Vectors.o
GPU2D_IRQHandler Code 0x3418418C 2 2 stm32n657xx_Vectors.o
GPU2D_ER_IRQHandler Code 0x3418418E 2 2 stm32n657xx_Vectors.o
ICACHE_IRQHandler Code 0x34184190 2 2 stm32n657xx_Vectors.o
HPDMA1_Channel0_IRQHandler Code 0x34184192 2 2 stm32n657xx_Vectors.o
HPDMA1_Channel1_IRQHandler Code 0x34184194 2 2 stm32n657xx_Vectors.o
HPDMA1_Channel2_IRQHandler Code 0x34184196 2 2 stm32n657xx_Vectors.o
HPDMA1_Channel3_IRQHandler Code 0x34184198 2 2 stm32n657xx_Vectors.o
HPDMA1_Channel4_IRQHandler Code 0x3418419A 2 2 stm32n657xx_Vectors.o
HPDMA1_Channel5_IRQHandler Code 0x3418419C 2 2 stm32n657xx_Vectors.o
HPDMA1_Channel6_IRQHandler Code 0x3418419E 2 2 stm32n657xx_Vectors.o
HPDMA1_Channel7_IRQHandler Code 0x341841A0 2 2 stm32n657xx_Vectors.o
HPDMA1_Channel8_IRQHandler Code 0x341841A2 2 2 stm32n657xx_Vectors.o
HPDMA1_Channel9_IRQHandler Code 0x341841A4 2 2 stm32n657xx_Vectors.o
HPDMA1_Channel10_IRQHandler Code 0x341841A6 2 2 stm32n657xx_Vectors.o
HPDMA1_Channel11_IRQHandler Code 0x341841A8 2 2 stm32n657xx_Vectors.o
HPDMA1_Channel12_IRQHandler Code 0x341841AA 2 2 stm32n657xx_Vectors.o
HPDMA1_Channel13_IRQHandler Code 0x341841AC 2 2 stm32n657xx_Vectors.o
HPDMA1_Channel14_IRQHandler Code 0x341841AE 2 2 stm32n657xx_Vectors.o
HPDMA1_Channel15_IRQHandler Code 0x341841B0 2 2 stm32n657xx_Vectors.o
GPDMA1_Channel0_IRQHandler Code 0x341841B2 2 2 stm32n657xx_Vectors.o
GPDMA1_Channel1_IRQHandler Code 0x341841B4 2 2 stm32n657xx_Vectors.o
GPDMA1_Channel2_IRQHandler Code 0x341841B6 2 2 stm32n657xx_Vectors.o
GPDMA1_Channel3_IRQHandler Code 0x341841B8 2 2 stm32n657xx_Vectors.o
GPDMA1_Channel4_IRQHandler Code 0x341841BA 2 2 stm32n657xx_Vectors.o
GPDMA1_Channel5_IRQHandler Code 0x341841BC 2 2 stm32n657xx_Vectors.o
GPDMA1_Channel6_IRQHandler Code 0x341841BE 2 2 stm32n657xx_Vectors.o
GPDMA1_Channel7_IRQHandler Code 0x341841C0 2 2 stm32n657xx_Vectors.o
GPDMA1_Channel8_IRQHandler Code 0x341841C2 2 2 stm32n657xx_Vectors.o
GPDMA1_Channel9_IRQHandler Code 0x341841C4 2 2 stm32n657xx_Vectors.o
GPDMA1_Channel10_IRQHandler Code 0x341841C6 2 2 stm32n657xx_Vectors.o
GPDMA1_Channel11_IRQHandler Code 0x341841C8 2 2 stm32n657xx_Vectors.o
GPDMA1_Channel12_IRQHandler Code 0x341841CA 2 2 stm32n657xx_Vectors.o
GPDMA1_Channel13_IRQHandler Code 0x341841CC 2 2 stm32n657xx_Vectors.o
GPDMA1_Channel14_IRQHandler Code 0x341841CE 2 2 stm32n657xx_Vectors.o
GPDMA1_Channel15_IRQHandler Code 0x341841D0 2 2 stm32n657xx_Vectors.o
I2C1_EV_IRQHandler Code 0x341841D2 2 2 stm32n657xx_Vectors.o
I2C1_ER_IRQHandler Code 0x341841D4 2 2 stm32n657xx_Vectors.o
I2C2_EV_IRQHandler Code 0x341841D6 2 2 stm32n657xx_Vectors.o
I2C2_ER_IRQHandler Code 0x341841D8 2 2 stm32n657xx_Vectors.o
I2C3_EV_IRQHandler Code 0x341841DA 2 2 stm32n657xx_Vectors.o
I2C3_ER_IRQHandler Code 0x341841DC 2 2 stm32n657xx_Vectors.o
I2C4_EV_IRQHandler Code 0x341841DE 2 2 stm32n657xx_Vectors.o
I2C4_ER_IRQHandler Code 0x341841E0 2 2 stm32n657xx_Vectors.o
I3C1_EV_IRQHandler Code 0x341841E2 2 2 stm32n657xx_Vectors.o
I3C1_ER_IRQHandler Code 0x341841E4 2 2 stm32n657xx_Vectors.o
I3C2_EV_IRQHandler Code 0x341841E6 2 2 stm32n657xx_Vectors.o
I3C2_ER_IRQHandler Code 0x341841E8 2 2 stm32n657xx_Vectors.o
TIM1_BRK_IRQHandler Code 0x341841EA 2 2 stm32n657xx_Vectors.o
TIM1_UP_IRQHandler Code 0x341841EC 2 2 stm32n657xx_Vectors.o
TIM1_TRG_CCU_IRQHandler Code 0x341841EE 2 2 stm32n657xx_Vectors.o
TIM1_CC_IRQHandler Code 0x341841F0 2 2 stm32n657xx_Vectors.o
TIM2_IRQHandler Code 0x341841F2 2 2 stm32n657xx_Vectors.o
TIM3_IRQHandler Code 0x341841F4 2 2 stm32n657xx_Vectors.o
TIM4_IRQHandler Code 0x341841F6 2 2 stm32n657xx_Vectors.o
TIM5_IRQHandler Code 0x341841F8 2 2 stm32n657xx_Vectors.o
TIM6_IRQHandler Code 0x341841FA 2 2 stm32n657xx_Vectors.o
TIM7_IRQHandler Code 0x341841FC 2 2 stm32n657xx_Vectors.o
TIM8_BRK_IRQHandler Code 0x341841FE 2 2 stm32n657xx_Vectors.o
TIM8_UP_IRQHandler Code 0x34184200 2 2 stm32n657xx_Vectors.o
TIM8_TRG_CCU_IRQHandler Code 0x34184202 2 2 stm32n657xx_Vectors.o
TIM8_CC_IRQHandler Code 0x34184204 2 2 stm32n657xx_Vectors.o
TIM9_IRQHandler Code 0x34184206 2 2 stm32n657xx_Vectors.o
TIM10_IRQHandler Code 0x34184208 2 2 stm32n657xx_Vectors.o
TIM11_IRQHandler Code 0x3418420A 2 2 stm32n657xx_Vectors.o
TIM12_IRQHandler Code 0x3418420C 2 2 stm32n657xx_Vectors.o
TIM13_IRQHandler Code 0x3418420E 2 2 stm32n657xx_Vectors.o
TIM14_IRQHandler Code 0x34184210 2 2 stm32n657xx_Vectors.o
TIM15_IRQHandler Code 0x34184212 2 2 stm32n657xx_Vectors.o
TIM16_IRQHandler Code 0x34184214 2 2 stm32n657xx_Vectors.o
TIM17_IRQHandler Code 0x34184216 2 2 stm32n657xx_Vectors.o
TIM18_IRQHandler Code 0x34184218 2 2 stm32n657xx_Vectors.o
LPTIM1_IRQHandler Code 0x3418421A 2 2 stm32n657xx_Vectors.o
LPTIM2_IRQHandler Code 0x3418421C 2 2 stm32n657xx_Vectors.o
LPTIM3_IRQHandler Code 0x3418421E 2 2 stm32n657xx_Vectors.o
LPTIM4_IRQHandler Code 0x34184220 2 2 stm32n657xx_Vectors.o
LPTIM5_IRQHandler Code 0x34184222 2 2 stm32n657xx_Vectors.o
ADF1_FLT0_IRQHandler Code 0x34184224 2 2 stm32n657xx_Vectors.o
MDF1_FLT0_IRQHandler Code 0x34184226 2 2 stm32n657xx_Vectors.o
MDF1_FLT1_IRQHandler Code 0x34184228 2 2 stm32n657xx_Vectors.o
MDF1_FLT2_IRQHandler Code 0x3418422A 2 2 stm32n657xx_Vectors.o
MDF1_FLT3_IRQHandler Code 0x3418422C 2 2 stm32n657xx_Vectors.o
MDF1_FLT4_IRQHandler Code 0x3418422E 2 2 stm32n657xx_Vectors.o
MDF1_FLT5_IRQHandler Code 0x34184230 2 2 stm32n657xx_Vectors.o
SAI1_A_IRQHandler Code 0x34184232 2 2 stm32n657xx_Vectors.o
SAI1_B_IRQHandler Code 0x34184234 2 2 stm32n657xx_Vectors.o
SAI2_A_IRQHandler Code 0x34184236 2 2 stm32n657xx_Vectors.o
SAI2_B_IRQHandler Code 0x34184238 2 2 stm32n657xx_Vectors.o
SPDIFRX_IRQHandler Code 0x3418423A 2 2 stm32n657xx_Vectors.o
SPI1_IRQHandler Code 0x3418423C 2 2 stm32n657xx_Vectors.o
SPI2_IRQHandler Code 0x3418423E 2 2 stm32n657xx_Vectors.o
SPI3_IRQHandler Code 0x34184240 2 2 stm32n657xx_Vectors.o
SPI4_IRQHandler Code 0x34184242 2 2 stm32n657xx_Vectors.o
SPI5_IRQHandler Code 0x34184244 2 2 stm32n657xx_Vectors.o
SPI6_IRQHandler Code 0x34184246 2 2 stm32n657xx_Vectors.o
USART1_IRQHandler Code 0x34184248 2 2 stm32n657xx_Vectors.o
USART2_IRQHandler Code 0x3418424A 2 2 stm32n657xx_Vectors.o
USART3_IRQHandler Code 0x3418424C 2 2 stm32n657xx_Vectors.o
UART4_IRQHandler Code 0x3418424E 2 2 stm32n657xx_Vectors.o
UART5_IRQHandler Code 0x34184250 2 2 stm32n657xx_Vectors.o
USART6_IRQHandler Code 0x34184252 2 2 stm32n657xx_Vectors.o
UART7_IRQHandler Code 0x34184254 2 2 stm32n657xx_Vectors.o
UART8_IRQHandler Code 0x34184256 2 2 stm32n657xx_Vectors.o
UART9_IRQHandler Code 0x34184258 2 2 stm32n657xx_Vectors.o
USART10_IRQHandler Code 0x3418425A 2 2 stm32n657xx_Vectors.o
LPUART1_IRQHandler Code 0x3418425C 2 2 stm32n657xx_Vectors.o
XSPI1_IRQHandler Code 0x3418425E 2 2 stm32n657xx_Vectors.o
XSPI2_IRQHandler Code 0x34184260 2 2 stm32n657xx_Vectors.o
XSPI3_IRQHandler Code 0x34184262 2 2 stm32n657xx_Vectors.o
FMC_IRQHandler Code 0x34184264 2 2 stm32n657xx_Vectors.o
SDMMC1_IRQHandler Code 0x34184266 2 2 stm32n657xx_Vectors.o
SDMMC2_IRQHandler Code 0x34184268 2 2 stm32n657xx_Vectors.o
UCPD1_IRQHandler Code 0x3418426A 2 2 stm32n657xx_Vectors.o
USB1_OTG_HS_IRQHandler Code 0x3418426C 2 2 stm32n657xx_Vectors.o
USB2_OTG_HS_IRQHandler Code 0x3418426E 2 2 stm32n657xx_Vectors.o
ETH1_IRQHandler Code 0x34184270 2 2 stm32n657xx_Vectors.o
FDCAN1_IT0_IRQHandler Code 0x34184272 2 2 stm32n657xx_Vectors.o
FDCAN1_IT1_IRQHandler Code 0x34184274 2 2 stm32n657xx_Vectors.o
FDCAN2_IT0_IRQHandler Code 0x34184276 2 2 stm32n657xx_Vectors.o
FDCAN2_IT1_IRQHandler Code 0x34184278 2 2 stm32n657xx_Vectors.o
FDCAN3_IT0_IRQHandler Code 0x3418427A 2 2 stm32n657xx_Vectors.o
FDCAN3_IT1_IRQHandler Code 0x3418427C 2 2 stm32n657xx_Vectors.o
FDCAN_CU_IRQHandler Code 0x3418427E 2 2 stm32n657xx_Vectors.o
MDIOS_IRQHandler Code 0x34184280 2 2 stm32n657xx_Vectors.o
DCMI_PSSI_IRQHandler Code 0x34184282 2 2 stm32n657xx_Vectors.o
WAKEUP_PIN_IRQHandler Code 0x34184284 2 2 stm32n657xx_Vectors.o
CTI_INT0_IRQHandler Code 0x34184286 2 2 stm32n657xx_Vectors.o
CTI_INT1_IRQHandler Code 0x34184288 2 2 stm32n657xx_Vectors.o
LTDC_UP_IRQHandler Code 0x3418428A 2 2 stm32n657xx_Vectors.o
LTDC_UP_ERR_IRQHandler Code 0x3418428C 2 2 stm32n657xx_Vectors.o
[.rodata..L.str.20] Cnst 0x3418428E 106 1 blto2_FSBL_lto.o
[.rodata..L.str.35] Cnst 0x341842F8 105 1 blto2_FSBL_lto.o
[.rodata.block.tdata.copy] Cnst 0x34184361 1 [ Linker created ]
[.init_array] ---- 0x34184364 4 4 STM32N6xx_Startup.o
[.rodata..L.str.10] Cnst 0x34184368 108 1 blto2_FSBL_lto.o
[.rodata..L.str.28] Cnst 0x341843D4 108 1 blto2_FSBL_lto.o
__SEGGER_init_ctors Code 0x3418444C 36 4 SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_init_table__ Cnst 0x34184470 52 4 [ Linker created ]
__SEGGER_init_data__ Cnst 0x341844A4 12 4 [ Linker created ]
__SEGGER_init_zero Code 0x341844B0 18 2 SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_init_copy Code 0x341844C2 20 2 SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)

"<#16> at line 128, col 45": place in [0x34180400 to 0x341FFFFF] with auto order

Symbol or [section] name Type Address Size Align Object File
uwTickFreq Init 0x34184361 1 1 blto2_FSBL_lto.o
[.bss.block.heap] None 0x34184368 8 [ Linker created ]
uwTick Zero 0x34184440 4 4 blto2_FSBL_lto.o
uwTickPrio Init 0x34184444 4 4 blto2_FSBL_lto.o
SystemCoreClock Init 0x34184448 4 4 blto2_FSBL_lto.o
[.bss.block.stack] None 0x341FC000 16 384 8 [ Linker created ]

"<#17> at line 132, col 45": place in [0x34180400 to 0x341FFFFF] with auto order

Symbol or [section] name Type Address Size Align Object File
[.bss.block.heap] None 0x34184368 8 [ Linker created ]

MODULE SUMMARY

Memory use by input file

Object File RX Code RO Data RW Data ZI Data
blto2_FSBL_lto.o 14 630 427 9 4
SEGGER_THUMB_Startup.o 20
stm32n657xx_Vectors.o 1 216
STM32N6xx_Startup.o 44
Subtotal (4 objects) 15 910 427 9 4
SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a 74
strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a 104
Subtotal (2archives) 178
Linker created (shared data, fills, blocks): 64 16 384
Total: 16 088 491 9 16 388

Memory use by archive member

Archive member RX Code RO Data RW Data ZI Data
SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) 74
strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a) 104
Subtotal (2 members from 2 archives) 178
Objects (4 files) 15 910 427 9 4
Linker created (shared data, fills, blocks): 64 16 384
Total: 16 088 491 9 16 388

Memory use by linker

Description RX Code RO Data RW Data ZI Data
Initialization table 64
Memory for block 'stack' 16 384
Subtotal (linker created): 64 16 384
Objects (4 files) 15 910 427 9 4
Archives (2 files) 178
Total: 16 088 491 9 16 388

MODULE DETAIL

Module blto2_FSBL_lto.o

Symbol or [section] name Code RO Data RW Data ZI Data
HAL_RCC_OscConfig 2 810
HAL_RCC_ClockConfig 2 498
HAL_GPIO_Init 1 928
RCC_PLL_Config 846
SystemCoreClockUpdate 828
SystemInit 510
MX_GPIO_Init 466
HAL_RCC_GetClockConfig 240
SystemClock_Config 238
HAL_RCC_GetCpuClockFreq 238
RCC_IC_CheckPLLSources 234
RCC_PLL_IsNewConfig 218
HAL_NVIC_SetPriority 168
RCCEx_GetPLLSourceFreq 140
RCCEx_CalcPLLFreq 136
HAL_RCCEx_GetPLL1CLKFreq 130
HAL_RCCEx_GetPLL2CLKFreq 130
HAL_RCCEx_GetPLL3CLKFreq 130
HAL_RCCEx_GetPLL4CLKFreq 130
HAL_InitTick 126
HAL_PWREx_ConfigSupply 114
HAL_PWREx_ControlVoltageScaling 114
HAL_GPIO_WritePin 102
NVIC_EncodePriority 100
RCC_PLL_Enable 94
RCC_PLL_Source_IsReady 84
SysTick_Config 78
main 66
HAL_NVIC_SetPriorityGrouping 62
__NVIC_SetPriority 62
__NVIC_SetPriorityGrouping 60
HAL_Delay 58
HAL_Init 48
LL_AHB4_GRP1_EnableClock 34
LL_RCC_HSI_SetCalibTrimming 30
LL_RCC_MSI_SetCalibTrimming 30
LL_RCC_HSI_SetDivider 28
LL_RCC_MSI_SetFrequency 28
HAL_IncTick 26
LL_RCC_IC1_GetDivider 22
HAL_PWREx_EnableVddIO3 18
__NVIC_GetPriorityGrouping 16
HAL_SYSTICK_Config 16
LL_RCC_HSI_IsReady 16
LL_RCC_GetCpuClkSource 16
LL_RCC_GetSysClkSource 16
LL_RCC_PLL1_GetSource 16
LL_RCC_PLL2_GetSource 16
LL_RCC_PLL3_GetSource 16
LL_RCC_PLL4_GetSource 16
LL_RCC_MSI_IsReady 16
LL_RCC_LSI_IsReady 16
LL_RCC_LSE_IsReady 16
LL_RCC_PLL1_IsReady 16
LL_RCC_IC1_GetSource 16
LL_RCC_IC2_GetSource 16
LL_RCC_IC6_GetSource 16
LL_RCC_IC11_GetSource 16
LL_RCC_PLL2_IsReady 16
LL_RCC_PLL3_IsReady 16
LL_RCC_PLL4_IsReady 16
LL_RCC_HSE_IsReady 16
LL_RCC_HSI_GetDivider 16
LL_RCC_PLL1_IsEnabledBypass 16
LL_RCC_PLL2_IsEnabledBypass 16
LL_RCC_PLL3_IsEnabledBypass 16
LL_RCC_PLL4_IsEnabledBypass 16
LL_RCC_PLL4_IsReady.57 16
LL_RCC_PLL4P_IsEnabled 16
LL_RCC_PLL4_GetSource.58 16
LL_RCC_PLL4_GetM 16
LL_RCC_PLL4_GetN 16
LL_RCC_PLL4_GetFRACN 16
LL_RCC_PLL4_GetP1 16
LL_RCC_PLL4_GetP2 16
LL_RCC_PLL4_IsEnabledBypass.59 16
LL_RCC_HSI_IsReady.60 16
LL_RCC_HSI_GetDivider.61 16
LL_RCC_MSI_IsReady.62 16
LL_RCC_MSI_GetFrequency 16
LL_RCC_HSE_IsReady.63 16
LL_RCC_PLL3_IsReady.64 16
LL_RCC_PLL3P_IsEnabled 16
LL_RCC_PLL3_GetSource.65 16
LL_RCC_PLL3_GetM 16
LL_RCC_PLL3_GetN 16
LL_RCC_PLL3_GetFRACN 16
LL_RCC_PLL3_GetP1 16
LL_RCC_PLL3_GetP2 16
LL_RCC_PLL3_IsEnabledBypass.66 16
LL_RCC_PLL2_IsReady.67 16
LL_RCC_PLL2P_IsEnabled 16
LL_RCC_PLL2_GetSource.68 16
LL_RCC_PLL2_GetM 16
LL_RCC_PLL2_GetN 16
LL_RCC_PLL2_GetFRACN 16
LL_RCC_PLL2_GetP1 16
LL_RCC_PLL2_GetP2 16
LL_RCC_PLL2_IsEnabledBypass.69 16
LL_RCC_PLL1_IsReady.70 16
LL_RCC_PLL1P_IsEnabled 16
LL_RCC_PLL1_GetSource.71 16
LL_RCC_PLL1_GetM 16
LL_RCC_PLL1_GetN 16
LL_RCC_PLL1_GetFRACN 16
LL_RCC_PLL1_GetP1 16
LL_RCC_PLL1_GetP2 16
LL_RCC_PLL1_IsEnabledBypass.72 16
LL_RCC_HSI_Enable 14
LL_RCC_HSI_Disable 14
LL_RCC_MSI_Enable 14
LL_RCC_MSI_Disable 14
LL_RCC_LSI_Enable 14
LL_RCC_LSI_Disable 14
LL_RCC_IC1_Enable 14
HAL_GetTick 12
assert_failed 10
HAL_MspInit 8
SysTick_Handler 8
Error_Handler 4
NMI_Handler 2
HardFault_Handler 2
MemManage_Handler 2
BusFault_Handler 2
UsageFault_Handler 2
SVC_Handler 2
DebugMon_Handler 2
PendSV_Handler 2
[.rodata..L.str.10] 108
[.rodata..L.str.28] 108
[.rodata..L.str.20] 106
[.rodata..L.str.35] 105
SystemCoreClock 4
uwTickPrio 4
uwTickFreq 1
uwTick 4
Total: 14 630 427 9 4

Module SEGGER_THUMB_Startup.o

Symbol or [section] name Code RO Data RW Data ZI Data
_start 20
Total: 20

Module stm32n657xx_Vectors.o

Symbol or [section] name Code RO Data RW Data ZI Data
_vectors 844
PVD_PVM_IRQHandler 2
DTS_IRQHandler 2
RCC_IRQHandler 2
LOCKUP_IRQHandler 2
CACHE_ECC_IRQHandler 2
TCM_ECC_IRQHandler 2
BCK_ECC_IRQHandler 2
FPU_IRQHandler 2
RTC_S_IRQHandler 2
TAMP_IRQHandler 2
RIFSC_TAMPER_IRQHandler 2
IAC_IRQHandler 2
RCC_S_IRQHandler 2
RTC_IRQHandler 2
IWDG_IRQHandler 2
WWDG_IRQHandler 2
EXTI0_IRQHandler 2
EXTI1_IRQHandler 2
EXTI2_IRQHandler 2
EXTI3_IRQHandler 2
EXTI4_IRQHandler 2
EXTI5_IRQHandler 2
EXTI6_IRQHandler 2
EXTI7_IRQHandler 2
EXTI8_IRQHandler 2
EXTI9_IRQHandler 2
EXTI10_IRQHandler 2
EXTI11_IRQHandler 2
EXTI12_IRQHandler 2
EXTI13_IRQHandler 2
EXTI14_IRQHandler 2
EXTI15_IRQHandler 2
SAES_IRQHandler 2
CRYP_IRQHandler 2
PKA_IRQHandler 2
HASH_IRQHandler 2
RNG_IRQHandler 2
MCE1_IRQHandler 2
MCE2_IRQHandler 2
MCE3_IRQHandler 2
MCE4_IRQHandler 2
ADC1_2_IRQHandler 2
CSI_IRQHandler 2
DCMIPP_IRQHandler 2
PAHB_ERR_IRQHandler 2
NPU0_IRQHandler 2
NPU1_IRQHandler 2
NPU2_IRQHandler 2
NPU3_IRQHandler 2
CACHEAXI_IRQHandler 2
LTDC_LO_IRQHandler 2
LTDC_LO_ERR_IRQHandler 2
DMA2D_IRQHandler 2
JPEG_IRQHandler 2
VENC_IRQHandler 2
GFXMMU_IRQHandler 2
GFXTIM_IRQHandler 2
GPU2D_IRQHandler 2
GPU2D_ER_IRQHandler 2
ICACHE_IRQHandler 2
HPDMA1_Channel0_IRQHandler 2
HPDMA1_Channel1_IRQHandler 2
HPDMA1_Channel2_IRQHandler 2
HPDMA1_Channel3_IRQHandler 2
HPDMA1_Channel4_IRQHandler 2
HPDMA1_Channel5_IRQHandler 2
HPDMA1_Channel6_IRQHandler 2
HPDMA1_Channel7_IRQHandler 2
HPDMA1_Channel8_IRQHandler 2
HPDMA1_Channel9_IRQHandler 2
HPDMA1_Channel10_IRQHandler 2
HPDMA1_Channel11_IRQHandler 2
HPDMA1_Channel12_IRQHandler 2
HPDMA1_Channel13_IRQHandler 2
HPDMA1_Channel14_IRQHandler 2
HPDMA1_Channel15_IRQHandler 2
GPDMA1_Channel0_IRQHandler 2
GPDMA1_Channel1_IRQHandler 2
GPDMA1_Channel2_IRQHandler 2
GPDMA1_Channel3_IRQHandler 2
GPDMA1_Channel4_IRQHandler 2
GPDMA1_Channel5_IRQHandler 2
GPDMA1_Channel6_IRQHandler 2
GPDMA1_Channel7_IRQHandler 2
GPDMA1_Channel8_IRQHandler 2
GPDMA1_Channel9_IRQHandler 2
GPDMA1_Channel10_IRQHandler 2
GPDMA1_Channel11_IRQHandler 2
GPDMA1_Channel12_IRQHandler 2
GPDMA1_Channel13_IRQHandler 2
GPDMA1_Channel14_IRQHandler 2
GPDMA1_Channel15_IRQHandler 2
I2C1_EV_IRQHandler 2
I2C1_ER_IRQHandler 2
I2C2_EV_IRQHandler 2
I2C2_ER_IRQHandler 2
I2C3_EV_IRQHandler 2
I2C3_ER_IRQHandler 2
I2C4_EV_IRQHandler 2
I2C4_ER_IRQHandler 2
I3C1_EV_IRQHandler 2
I3C1_ER_IRQHandler 2
I3C2_EV_IRQHandler 2
I3C2_ER_IRQHandler 2
TIM1_BRK_IRQHandler 2
TIM1_UP_IRQHandler 2
TIM1_TRG_CCU_IRQHandler 2
TIM1_CC_IRQHandler 2
TIM2_IRQHandler 2
TIM3_IRQHandler 2
TIM4_IRQHandler 2
TIM5_IRQHandler 2
TIM6_IRQHandler 2
TIM7_IRQHandler 2
TIM8_BRK_IRQHandler 2
TIM8_UP_IRQHandler 2
TIM8_TRG_CCU_IRQHandler 2
TIM8_CC_IRQHandler 2
TIM9_IRQHandler 2
TIM10_IRQHandler 2
TIM11_IRQHandler 2
TIM12_IRQHandler 2
TIM13_IRQHandler 2
TIM14_IRQHandler 2
TIM15_IRQHandler 2
TIM16_IRQHandler 2
TIM17_IRQHandler 2
TIM18_IRQHandler 2
LPTIM1_IRQHandler 2
LPTIM2_IRQHandler 2
LPTIM3_IRQHandler 2
LPTIM4_IRQHandler 2
LPTIM5_IRQHandler 2
ADF1_FLT0_IRQHandler 2
MDF1_FLT0_IRQHandler 2
MDF1_FLT1_IRQHandler 2
MDF1_FLT2_IRQHandler 2
MDF1_FLT3_IRQHandler 2
MDF1_FLT4_IRQHandler 2
MDF1_FLT5_IRQHandler 2
SAI1_A_IRQHandler 2
SAI1_B_IRQHandler 2
SAI2_A_IRQHandler 2
SAI2_B_IRQHandler 2
SPDIFRX_IRQHandler 2
SPI1_IRQHandler 2
SPI2_IRQHandler 2
SPI3_IRQHandler 2
SPI4_IRQHandler 2
SPI5_IRQHandler 2
SPI6_IRQHandler 2
USART1_IRQHandler 2
USART2_IRQHandler 2
USART3_IRQHandler 2
UART4_IRQHandler 2
UART5_IRQHandler 2
USART6_IRQHandler 2
UART7_IRQHandler 2
UART8_IRQHandler 2
UART9_IRQHandler 2
USART10_IRQHandler 2
LPUART1_IRQHandler 2
XSPI1_IRQHandler 2
XSPI2_IRQHandler 2
XSPI3_IRQHandler 2
FMC_IRQHandler 2
SDMMC1_IRQHandler 2
SDMMC2_IRQHandler 2
UCPD1_IRQHandler 2
USB1_OTG_HS_IRQHandler 2
USB2_OTG_HS_IRQHandler 2
ETH1_IRQHandler 2
FDCAN1_IT0_IRQHandler 2
FDCAN1_IT1_IRQHandler 2
FDCAN2_IT0_IRQHandler 2
FDCAN2_IT1_IRQHandler 2
FDCAN3_IT0_IRQHandler 2
FDCAN3_IT1_IRQHandler 2
FDCAN_CU_IRQHandler 2
MDIOS_IRQHandler 2
DCMI_PSSI_IRQHandler 2
WAKEUP_PIN_IRQHandler 2
CTI_INT0_IRQHandler 2
CTI_INT1_IRQHandler 2
LTDC_UP_IRQHandler 2
LTDC_UP_ERR_IRQHandler 2
Total: 1 216

Module STM32N6xx_Startup.o

Symbol or [section] name Code RO Data RW Data ZI Data
reset_handler 44
Total: 44

Module SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)

Symbol or [section] name Code RO Data RW Data ZI Data
__SEGGER_init_ctors 36
__SEGGER_init_copy 20
__SEGGER_init_zero 18
Total: 74

Module strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)

Symbol or [section] name Code RO Data RW Data ZI Data
__aeabi_memclr 104
Total: 104

All modules

Code RO Data RW Data ZI Data
Grand total: 16 088 427 9 4

SECTION DETAIL

Sections by address

Range Symbol or [section] Name Size Al Init Ac Object File
34180400-3418074B _vectors 844 1024 Code RX stm32n657xx_Vectors.o
3418074C-3418074F Error_Handler 4 4 Code RX blto2_FSBL_lto.o
34180750-34180757 HAL_MspInit 8 4 Code RX blto2_FSBL_lto.o
34180758-3418075F SysTick_Handler 8 4 Code RX blto2_FSBL_lto.o
34180760-34180A9B SystemCoreClockUpdate 828 4 Code RX blto2_FSBL_lto.o
34180A9C-34180ACB HAL_Init 48 4 Code RX blto2_FSBL_lto.o
34180ACC-34180AD7 HAL_GetTick 12 4 Code RX blto2_FSBL_lto.o
34180AD8-34180B13 __NVIC_SetPriorityGrouping 60 4 Code RX blto2_FSBL_lto.o
34180B14-34180BBB HAL_NVIC_SetPriority 168 4 Code RX blto2_FSBL_lto.o
34180BBC-34180BCB __NVIC_GetPriorityGrouping 16 4 Code RX blto2_FSBL_lto.o
34180BCC-34180C2F NVIC_EncodePriority 100 4 Code RX blto2_FSBL_lto.o
34180C30-34180C3F HAL_SYSTICK_Config 16 4 Code RX blto2_FSBL_lto.o
34180C40-341813C7 HAL_GPIO_Init 1 928 4 Code RX blto2_FSBL_lto.o
341813C8-341813E3 LL_RCC_HSI_SetDivider 28 4 Code RX blto2_FSBL_lto.o
341813E4-341813F3 LL_RCC_HSI_IsReady 16 4 Code RX blto2_FSBL_lto.o
341813F4-34181403 LL_RCC_GetCpuClkSource 16 4 Code RX blto2_FSBL_lto.o
34181404-34181413 LL_RCC_GetSysClkSource 16 4 Code RX blto2_FSBL_lto.o
34181414-34181423 LL_RCC_PLL1_GetSource 16 4 Code RX blto2_FSBL_lto.o
34181424-34181433 LL_RCC_PLL2_GetSource 16 4 Code RX blto2_FSBL_lto.o
34181434-34181443 LL_RCC_PLL3_GetSource 16 4 Code RX blto2_FSBL_lto.o
34181444-34181453 LL_RCC_PLL4_GetSource 16 4 Code RX blto2_FSBL_lto.o
34181454-3418146F LL_RCC_MSI_SetFrequency 28 4 Code RX blto2_FSBL_lto.o
34181470-3418147F LL_RCC_MSI_IsReady 16 4 Code RX blto2_FSBL_lto.o
34181480-3418148F LL_RCC_LSI_IsReady 16 4 Code RX blto2_FSBL_lto.o
34181490-3418149F LL_RCC_LSE_IsReady 16 4 Code RX blto2_FSBL_lto.o
341814A0-341814AF LL_RCC_PLL1_IsReady 16 4 Code RX blto2_FSBL_lto.o
341814B0-341814BF LL_RCC_IC1_GetSource 16 4 Code RX blto2_FSBL_lto.o
341814C0-341814CF LL_RCC_IC2_GetSource 16 4 Code RX blto2_FSBL_lto.o
341814D0-341814DF LL_RCC_IC6_GetSource 16 4 Code RX blto2_FSBL_lto.o
341814E0-341814EF LL_RCC_IC11_GetSource 16 4 Code RX blto2_FSBL_lto.o
341814F0-341814FF LL_RCC_PLL2_IsReady 16 4 Code RX blto2_FSBL_lto.o
34181500-3418150F LL_RCC_PLL3_IsReady 16 4 Code RX blto2_FSBL_lto.o
34181510-3418151F LL_RCC_PLL4_IsReady 16 4 Code RX blto2_FSBL_lto.o
34181520-34181573 RCC_PLL_Source_IsReady 84 4 Code RX blto2_FSBL_lto.o
34181574-34181583 LL_RCC_HSE_IsReady 16 4 Code RX blto2_FSBL_lto.o
34181584-34181593 LL_RCC_HSI_GetDivider 16 4 Code RX blto2_FSBL_lto.o
34181594-341815A3 LL_RCC_PLL1_IsEnabledBypass 16 4 Code RX blto2_FSBL_lto.o
341815A4-341815B3 LL_RCC_PLL2_IsEnabledBypass 16 4 Code RX blto2_FSBL_lto.o
341815B4-341815C3 LL_RCC_PLL3_IsEnabledBypass 16 4 Code RX blto2_FSBL_lto.o
341815C4-341815D3 LL_RCC_PLL4_IsEnabledBypass 16 4 Code RX blto2_FSBL_lto.o
341815D4-341816C3 HAL_RCC_GetClockConfig 240 4 Code RX blto2_FSBL_lto.o
341816C4-341816D3 LL_RCC_PLL4_IsReady.57 16 4 Code RX blto2_FSBL_lto.o
341816D4-341816E3 LL_RCC_PLL4P_IsEnabled 16 4 Code RX blto2_FSBL_lto.o
341816E4-341816F3 LL_RCC_PLL4_GetSource.58 16 4 Code RX blto2_FSBL_lto.o
341816F4-3418177F RCCEx_GetPLLSourceFreq 140 4 Code RX blto2_FSBL_lto.o
34181780-3418178F LL_RCC_PLL4_GetM 16 4 Code RX blto2_FSBL_lto.o
34181790-3418179F LL_RCC_PLL4_GetN 16 4 Code RX blto2_FSBL_lto.o
341817A0-341817AF LL_RCC_PLL4_GetFRACN 16 4 Code RX blto2_FSBL_lto.o
341817B0-341817BF LL_RCC_PLL4_GetP1 16 4 Code RX blto2_FSBL_lto.o
341817C0-341817CF LL_RCC_PLL4_GetP2 16 4 Code RX blto2_FSBL_lto.o
341817D0-34181857 RCCEx_CalcPLLFreq 136 4 Code RX blto2_FSBL_lto.o
34181858-34181867 LL_RCC_PLL4_IsEnabledBypass.59 16 4 Code RX blto2_FSBL_lto.o
34181868-34181877 LL_RCC_HSI_IsReady.60 16 4 Code RX blto2_FSBL_lto.o
34181878-34181887 LL_RCC_HSI_GetDivider.61 16 4 Code RX blto2_FSBL_lto.o
34181888-34181897 LL_RCC_MSI_IsReady.62 16 4 Code RX blto2_FSBL_lto.o
34181898-341818A7 LL_RCC_MSI_GetFrequency 16 4 Code RX blto2_FSBL_lto.o
341818A8-341818B7 LL_RCC_HSE_IsReady.63 16 4 Code RX blto2_FSBL_lto.o
341818B8-341818C7 LL_RCC_PLL3_IsReady.64 16 4 Code RX blto2_FSBL_lto.o
341818C8-341818D7 LL_RCC_PLL3P_IsEnabled 16 4 Code RX blto2_FSBL_lto.o
341818D8-341818E7 LL_RCC_PLL3_GetSource.65 16 4 Code RX blto2_FSBL_lto.o
341818E8-341818F7 LL_RCC_PLL3_GetM 16 4 Code RX blto2_FSBL_lto.o
341818F8-34181907 LL_RCC_PLL3_GetN 16 4 Code RX blto2_FSBL_lto.o
34181908-34181917 LL_RCC_PLL3_GetFRACN 16 4 Code RX blto2_FSBL_lto.o
34181918-34181927 LL_RCC_PLL3_GetP1 16 4 Code RX blto2_FSBL_lto.o
34181928-34181937 LL_RCC_PLL3_GetP2 16 4 Code RX blto2_FSBL_lto.o
34181938-34181947 LL_RCC_PLL3_IsEnabledBypass.66 16 4 Code RX blto2_FSBL_lto.o
34181948-34181957 LL_RCC_PLL2_IsReady.67 16 4 Code RX blto2_FSBL_lto.o
34181958-34181967 LL_RCC_PLL2P_IsEnabled 16 4 Code RX blto2_FSBL_lto.o
34181968-34181977 LL_RCC_PLL2_GetSource.68 16 4 Code RX blto2_FSBL_lto.o
34181978-34181987 LL_RCC_PLL2_GetM 16 4 Code RX blto2_FSBL_lto.o
34181988-34181997 LL_RCC_PLL2_GetN 16 4 Code RX blto2_FSBL_lto.o
34181998-341819A7 LL_RCC_PLL2_GetFRACN 16 4 Code RX blto2_FSBL_lto.o
341819A8-341819B7 LL_RCC_PLL2_GetP1 16 4 Code RX blto2_FSBL_lto.o
341819B8-341819C7 LL_RCC_PLL2_GetP2 16 4 Code RX blto2_FSBL_lto.o
341819C8-341819D7 LL_RCC_PLL2_IsEnabledBypass.69 16 4 Code RX blto2_FSBL_lto.o
341819D8-341819E7 LL_RCC_PLL1_IsReady.70 16 4 Code RX blto2_FSBL_lto.o
341819E8-341819F7 LL_RCC_PLL1P_IsEnabled 16 4 Code RX blto2_FSBL_lto.o
341819F8-34181A07 LL_RCC_PLL1_GetSource.71 16 4 Code RX blto2_FSBL_lto.o
34181A08-34181A17 LL_RCC_PLL1_GetM 16 4 Code RX blto2_FSBL_lto.o
34181A18-34181A27 LL_RCC_PLL1_GetN 16 4 Code RX blto2_FSBL_lto.o
34181A28-34181A37 LL_RCC_PLL1_GetFRACN 16 4 Code RX blto2_FSBL_lto.o
34181A38-34181A47 LL_RCC_PLL1_GetP1 16 4 Code RX blto2_FSBL_lto.o
34181A48-34181A57 LL_RCC_PLL1_GetP2 16 4 Code RX blto2_FSBL_lto.o
34181A58-34181A67 LL_RCC_PLL1_IsEnabledBypass.72 16 4 Code RX blto2_FSBL_lto.o
34181A68-34181A7B _start 20 4 Code RX SEGGER_THUMB_Startup.o
34181A7C-34181AA7 reset_handler 44 4 Code RX STM32N6xx_Startup.o
34181AA8-34181B0F __aeabi_memclr 104 4 Code RX strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34181B10-34181CE1 MX_GPIO_Init 466 4 Code RX blto2_FSBL_lto.o
34181CE2-34181CE3 PVD_PVM_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34181CE4-34181D05 LL_AHB4_GRP1_EnableClock 34 4 Code RX blto2_FSBL_lto.o
34181D06-34181D07 DTS_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34181D08-34181D49 main 66 4 Code RX blto2_FSBL_lto.o
34181D4A-34181D4B RCC_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34181D4C-34181E39 SystemClock_Config 238 4 Code RX blto2_FSBL_lto.o
34181E3A-34181E3B LOCKUP_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34181E3C-34181E45 assert_failed 10 4 Code RX blto2_FSBL_lto.o
34181E46-34181E47 CACHE_ECC_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34181E48-34181E49 NMI_Handler 2 4 Code RX blto2_FSBL_lto.o
34181E4A-34181E4B TCM_ECC_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34181E4C-34181E4D HardFault_Handler 2 4 Code RX blto2_FSBL_lto.o
34181E4E-34181E4F BCK_ECC_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34181E50-34181E51 MemManage_Handler 2 4 Code RX blto2_FSBL_lto.o
34181E52-34181E53 FPU_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34181E54-34181E55 BusFault_Handler 2 4 Code RX blto2_FSBL_lto.o
34181E56-34181E57 RTC_S_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34181E58-34181E59 UsageFault_Handler 2 4 Code RX blto2_FSBL_lto.o
34181E5A-34181E5B TAMP_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34181E5C-34181E5D SVC_Handler 2 4 Code RX blto2_FSBL_lto.o
34181E5E-34181E5F RIFSC_TAMPER_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34181E60-34181E61 DebugMon_Handler 2 4 Code RX blto2_FSBL_lto.o
34181E62-34181E63 IAC_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34181E64-34181E65 PendSV_Handler 2 4 Code RX blto2_FSBL_lto.o
34181E66-34181E67 RCC_S_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34181E68-34182065 SystemInit 510 4 Code RX blto2_FSBL_lto.o
34182066-34182067 RTC_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182068-341820E5 HAL_InitTick 126 4 Code RX blto2_FSBL_lto.o
341820E6-341820E7 IWDG_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341820E8-34182101 HAL_IncTick 26 4 Code RX blto2_FSBL_lto.o
34182102-34182103 WWDG_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182104-3418213D HAL_Delay 58 4 Code RX blto2_FSBL_lto.o
3418213E-3418213F EXTI0_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182140-3418217D HAL_NVIC_SetPriorityGrouping 62 4 Code RX blto2_FSBL_lto.o
3418217E-3418217F EXTI1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182180-341821BD __NVIC_SetPriority 62 4 Code RX blto2_FSBL_lto.o
341821BE-341821BF EXTI2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341821C0-3418220D SysTick_Config 78 4 Code RX blto2_FSBL_lto.o
3418220E-3418220F EXTI3_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182210-34182275 HAL_GPIO_WritePin 102 4 Code RX blto2_FSBL_lto.o
34182276-34182277 EXTI4_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182278-341822E9 HAL_PWREx_ConfigSupply 114 4 Code RX blto2_FSBL_lto.o
341822EA-341822EB EXTI5_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341822EC-3418235D HAL_PWREx_ControlVoltageScaling 114 4 Code RX blto2_FSBL_lto.o
3418235E-3418235F EXTI6_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182360-34182371 HAL_PWREx_EnableVddIO3 18 4 Code RX blto2_FSBL_lto.o
34182372-34182373 EXTI7_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182374-34182381 LL_RCC_HSI_Enable 14 4 Code RX blto2_FSBL_lto.o
34182382-34182383 EXTI8_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182384-34182E7D HAL_RCC_OscConfig 2 810 4 Code RX blto2_FSBL_lto.o
34182E7E-34182E7F EXTI9_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182E80-34182E9D LL_RCC_HSI_SetCalibTrimming 30 4 Code RX blto2_FSBL_lto.o
34182E9E-34182E9F EXTI10_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182EA0-34182EAD LL_RCC_HSI_Disable 14 4 Code RX blto2_FSBL_lto.o
34182EAE-34182EAF EXTI11_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182EB0-34182ECD LL_RCC_MSI_SetCalibTrimming 30 4 Code RX blto2_FSBL_lto.o
34182ECE-34182ECF EXTI12_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182ED0-34182EDD LL_RCC_MSI_Enable 14 4 Code RX blto2_FSBL_lto.o
34182EDE-34182EDF EXTI13_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182EE0-34182EED LL_RCC_MSI_Disable 14 4 Code RX blto2_FSBL_lto.o
34182EEE-34182EEF EXTI14_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182EF0-34182EFD LL_RCC_LSI_Enable 14 4 Code RX blto2_FSBL_lto.o
34182EFE-34182EFF EXTI15_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182F00-34182F0D LL_RCC_LSI_Disable 14 4 Code RX blto2_FSBL_lto.o
34182F0E-34182F0F SAES_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182F10-34182FE9 RCC_PLL_IsNewConfig 218 4 Code RX blto2_FSBL_lto.o
34182FEA-34182FEB CRYP_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34182FEC-34183339 RCC_PLL_Config 846 4 Code RX blto2_FSBL_lto.o
3418333A-3418333B PKA_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418333C-34183399 RCC_PLL_Enable 94 4 Code RX blto2_FSBL_lto.o
3418339A-3418339B HASH_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418339C-34183D5D HAL_RCC_ClockConfig 2 498 4 Code RX blto2_FSBL_lto.o
34183D5E-34183D5F RNG_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34183D60-34183E49 RCC_IC_CheckPLLSources 234 4 Code RX blto2_FSBL_lto.o
34183E4A-34183E4B MCE1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34183E4C-34183E59 LL_RCC_IC1_Enable 14 4 Code RX blto2_FSBL_lto.o
34183E5A-34183E5B MCE2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34183E5C-34183F49 HAL_RCC_GetCpuClockFreq 238 4 Code RX blto2_FSBL_lto.o
34183F4A-34183F4B MCE3_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34183F4C-34183F61 LL_RCC_IC1_GetDivider 22 4 Code RX blto2_FSBL_lto.o
34183F62-34183F63 MCE4_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34183F64-34183FE5 HAL_RCCEx_GetPLL1CLKFreq 130 4 Code RX blto2_FSBL_lto.o
34183FE6-34183FE7 ADC1_2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34183FE8-34184069 HAL_RCCEx_GetPLL2CLKFreq 130 4 Code RX blto2_FSBL_lto.o
3418406A-3418406B CSI_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418406C-341840ED HAL_RCCEx_GetPLL3CLKFreq 130 4 Code RX blto2_FSBL_lto.o
341840EE-341840EF DCMIPP_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341840F0-34184171 HAL_RCCEx_GetPLL4CLKFreq 130 4 Code RX blto2_FSBL_lto.o
34184172-34184173 PAHB_ERR_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184174-34184175 NPU0_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184176-34184177 NPU1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184178-34184179 NPU2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418417A-3418417B NPU3_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418417C-3418417D CACHEAXI_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418417E-3418417F LTDC_LO_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184180-34184181 LTDC_LO_ERR_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184182-34184183 DMA2D_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184184-34184185 JPEG_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184186-34184187 VENC_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184188-34184189 GFXMMU_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418418A-3418418B GFXTIM_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418418C-3418418D GPU2D_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418418E-3418418F GPU2D_ER_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184190-34184191 ICACHE_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184192-34184193 HPDMA1_Channel0_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184194-34184195 HPDMA1_Channel1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184196-34184197 HPDMA1_Channel2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184198-34184199 HPDMA1_Channel3_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418419A-3418419B HPDMA1_Channel4_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418419C-3418419D HPDMA1_Channel5_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418419E-3418419F HPDMA1_Channel6_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341841A0-341841A1 HPDMA1_Channel7_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341841A2-341841A3 HPDMA1_Channel8_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341841A4-341841A5 HPDMA1_Channel9_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341841A6-341841A7 HPDMA1_Channel10_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341841A8-341841A9 HPDMA1_Channel11_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341841AA-341841AB HPDMA1_Channel12_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341841AC-341841AD HPDMA1_Channel13_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341841AE-341841AF HPDMA1_Channel14_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341841B0-341841B1 HPDMA1_Channel15_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341841B2-341841B3 GPDMA1_Channel0_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341841B4-341841B5 GPDMA1_Channel1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341841B6-341841B7 GPDMA1_Channel2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341841B8-341841B9 GPDMA1_Channel3_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341841BA-341841BB GPDMA1_Channel4_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341841BC-341841BD GPDMA1_Channel5_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341841BE-341841BF GPDMA1_Channel6_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341841C0-341841C1 GPDMA1_Channel7_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341841C2-341841C3 GPDMA1_Channel8_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341841C4-341841C5 GPDMA1_Channel9_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341841C6-341841C7 GPDMA1_Channel10_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341841C8-341841C9 GPDMA1_Channel11_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341841CA-341841CB GPDMA1_Channel12_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341841CC-341841CD GPDMA1_Channel13_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341841CE-341841CF GPDMA1_Channel14_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341841D0-341841D1 GPDMA1_Channel15_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341841D2-341841D3 I2C1_EV_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341841D4-341841D5 I2C1_ER_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341841D6-341841D7 I2C2_EV_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341841D8-341841D9 I2C2_ER_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341841DA-341841DB I2C3_EV_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341841DC-341841DD I2C3_ER_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341841DE-341841DF I2C4_EV_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341841E0-341841E1 I2C4_ER_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341841E2-341841E3 I3C1_EV_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341841E4-341841E5 I3C1_ER_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341841E6-341841E7 I3C2_EV_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341841E8-341841E9 I3C2_ER_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341841EA-341841EB TIM1_BRK_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341841EC-341841ED TIM1_UP_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341841EE-341841EF TIM1_TRG_CCU_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341841F0-341841F1 TIM1_CC_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341841F2-341841F3 TIM2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341841F4-341841F5 TIM3_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341841F6-341841F7 TIM4_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341841F8-341841F9 TIM5_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341841FA-341841FB TIM6_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341841FC-341841FD TIM7_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
341841FE-341841FF TIM8_BRK_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184200-34184201 TIM8_UP_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184202-34184203 TIM8_TRG_CCU_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184204-34184205 TIM8_CC_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184206-34184207 TIM9_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184208-34184209 TIM10_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418420A-3418420B TIM11_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418420C-3418420D TIM12_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418420E-3418420F TIM13_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184210-34184211 TIM14_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184212-34184213 TIM15_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184214-34184215 TIM16_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184216-34184217 TIM17_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184218-34184219 TIM18_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418421A-3418421B LPTIM1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418421C-3418421D LPTIM2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418421E-3418421F LPTIM3_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184220-34184221 LPTIM4_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184222-34184223 LPTIM5_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184224-34184225 ADF1_FLT0_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184226-34184227 MDF1_FLT0_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184228-34184229 MDF1_FLT1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418422A-3418422B MDF1_FLT2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418422C-3418422D MDF1_FLT3_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418422E-3418422F MDF1_FLT4_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184230-34184231 MDF1_FLT5_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184232-34184233 SAI1_A_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184234-34184235 SAI1_B_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184236-34184237 SAI2_A_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184238-34184239 SAI2_B_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418423A-3418423B SPDIFRX_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418423C-3418423D SPI1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418423E-3418423F SPI2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184240-34184241 SPI3_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184242-34184243 SPI4_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184244-34184245 SPI5_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184246-34184247 SPI6_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184248-34184249 USART1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418424A-3418424B USART2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418424C-3418424D USART3_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418424E-3418424F UART4_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184250-34184251 UART5_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184252-34184253 USART6_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184254-34184255 UART7_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184256-34184257 UART8_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184258-34184259 UART9_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418425A-3418425B USART10_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418425C-3418425D LPUART1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418425E-3418425F XSPI1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184260-34184261 XSPI2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184262-34184263 XSPI3_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184264-34184265 FMC_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184266-34184267 SDMMC1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184268-34184269 SDMMC2_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418426A-3418426B UCPD1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418426C-3418426D USB1_OTG_HS_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418426E-3418426F USB2_OTG_HS_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184270-34184271 ETH1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184272-34184273 FDCAN1_IT0_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184274-34184275 FDCAN1_IT1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184276-34184277 FDCAN2_IT0_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184278-34184279 FDCAN2_IT1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418427A-3418427B FDCAN3_IT0_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418427C-3418427D FDCAN3_IT1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418427E-3418427F FDCAN_CU_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184280-34184281 MDIOS_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184282-34184283 DCMI_PSSI_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184284-34184285 WAKEUP_PIN_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184286-34184287 CTI_INT0_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
34184288-34184289 CTI_INT1_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418428A-3418428B LTDC_UP_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418428C-3418428D LTDC_UP_ERR_IRQHandler 2 2 Code RX stm32n657xx_Vectors.o
3418428E-341842F7 [.rodata..L.str.20] 106 1 Cnst RO blto2_FSBL_lto.o
341842F8-34184360 [.rodata..L.str.35] 105 1 Cnst RO blto2_FSBL_lto.o
34184361-34184361 uwTickFreq 1 1 Init RW blto2_FSBL_lto.o
34184362-34184363 ( UNUSED .=.+2 ) 2 - ---- - -
34184364-34184367 [.init_array] 4 4 ---- -- STM32N6xx_Startup.o
34184368-341843D3 [.rodata..L.str.10] 108 1 Cnst RO blto2_FSBL_lto.o
341843D4-3418443F [.rodata..L.str.28] 108 1 Cnst RO blto2_FSBL_lto.o
34184440-34184443 uwTick 4 4 Zero ZI blto2_FSBL_lto.o
34184444-34184447 uwTickPrio 4 4 Init RW blto2_FSBL_lto.o
34184448-3418444B SystemCoreClock 4 4 Init RW blto2_FSBL_lto.o
3418444C-3418446F __SEGGER_init_ctors 36 4 Code RX SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
34184470-341844A3 __SEGGER_init_table__ 52 4 Cnst RO [ Linker created ]
341844A4-341844AF __SEGGER_init_data__ 12 4 Cnst RO [ Linker created ]
341844B0-341844C1 __SEGGER_init_zero 18 2 Code RX SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
341844C2-341844D5 __SEGGER_init_copy 20 2 Code RX SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
341844D6-341FBFFF ( UNUSED .=.+490282 ) 490 282 - ---- - -
341FC000-341FFFFF [.bss.block.stack] 16 384 8 None ZI [ Linker created ]

UNUSED MEMORY SUMMARY

Detail

Range Size Reason
34184362-34184363 2 Unused memory between sections '.data.uwTickFreq' and '.init_array'
341844D6-341FBFFF 490 282 Unused memory between sections '.segger.init.__SEGGER_init_copy' and '.bss.block.stack'

INITIALIZATION TABLE

Constructor list

Table
Address		 Called
Address		 Called
Symbol or [section] name
0x34184364 0x34180761 SystemCoreClockUpdate

Initialize by zero

Initialize by copy with packing=none

Range Size Symbol or [section] name
34184440-34184443 4 uwTick
34184440-34184443 4 Total (1 sections)

Initialize by copy with packing=none

Range Size Symbol or [section] name
34184361-34184361 1 uwTickFreq
34184361-34184361 1 Total (1 sections)

Summary

Range Size Symbol or [section] name
34184444-34184447 4 uwTickPrio
34184448-3418444B 4 SystemCoreClock
34184444-3418444B 8 Total (2 sections)
Description Size
Initialization table 52 bytes
Source image 9 bytes
Destination image 13 bytes
Saving -48 bytes

LINKER-CREATED VENEERS

Arm-Arm range extension veneers

Veneer Size Target Source
0 Total

Thumb-Thumb range extension veneers

Veneer Size Target Source
0 Total

Arm-Thumb mode switch veneers

Veneer Size Target Source
0 Total

Thumb-Arm mode switch veneers

Veneer Size Target Source
0 Total

Summary

Veneer Type Size
Thumb-Arm mode switch 0
Arm-Thumb mode switch 0
Thumb-Thumb range extension 0
Arm-Arm range extension 0
Total: 0

SYMBOL LIST

Function symbols by name

Symbol name Address Size Align Type Bd Object File
ADC1_2_IRQHandler 0x34183FE7 2 Code Wk stm32n657xx_Vectors.o
ADF1_FLT0_IRQHandler 0x34184225 2 Code Wk stm32n657xx_Vectors.o
BCK_ECC_IRQHandler 0x34181E4F 2 Code Wk stm32n657xx_Vectors.o
BusFault_Handler 0x34181E55 2 4 Code Gb blto2_FSBL_lto.o
CACHEAXI_IRQHandler 0x3418417D 2 Code Wk stm32n657xx_Vectors.o
CACHE_ECC_IRQHandler 0x34181E47 2 Code Wk stm32n657xx_Vectors.o
CRYP_IRQHandler 0x34182FEB 2 Code Wk stm32n657xx_Vectors.o
CSI_IRQHandler 0x3418406B 2 Code Wk stm32n657xx_Vectors.o
CTI_INT0_IRQHandler 0x34184287 2 Code Wk stm32n657xx_Vectors.o
CTI_INT1_IRQHandler 0x34184289 2 Code Wk stm32n657xx_Vectors.o
DCMIPP_IRQHandler 0x341840EF 2 Code Wk stm32n657xx_Vectors.o
DCMI_PSSI_IRQHandler 0x34184283 2 Code Wk stm32n657xx_Vectors.o
DMA2D_IRQHandler 0x34184183 2 Code Wk stm32n657xx_Vectors.o
DTS_IRQHandler 0x34181D07 2 Code Wk stm32n657xx_Vectors.o
DebugMon_Handler 0x34181E61 2 4 Code Gb blto2_FSBL_lto.o
ETH1_IRQHandler 0x34184271 2 Code Wk stm32n657xx_Vectors.o
EXTI0_IRQHandler 0x3418213F 2 Code Wk stm32n657xx_Vectors.o
EXTI10_IRQHandler 0x34182E9F 2 Code Wk stm32n657xx_Vectors.o
EXTI11_IRQHandler 0x34182EAF 2 Code Wk stm32n657xx_Vectors.o
EXTI12_IRQHandler 0x34182ECF 2 Code Wk stm32n657xx_Vectors.o
EXTI13_IRQHandler 0x34182EDF 2 Code Wk stm32n657xx_Vectors.o
EXTI14_IRQHandler 0x34182EEF 2 Code Wk stm32n657xx_Vectors.o
EXTI15_IRQHandler 0x34182EFF 2 Code Wk stm32n657xx_Vectors.o
EXTI1_IRQHandler 0x3418217F 2 Code Wk stm32n657xx_Vectors.o
EXTI2_IRQHandler 0x341821BF 2 Code Wk stm32n657xx_Vectors.o
EXTI3_IRQHandler 0x3418220F 2 Code Wk stm32n657xx_Vectors.o
EXTI4_IRQHandler 0x34182277 2 Code Wk stm32n657xx_Vectors.o
EXTI5_IRQHandler 0x341822EB 2 Code Wk stm32n657xx_Vectors.o
EXTI6_IRQHandler 0x3418235F 2 Code Wk stm32n657xx_Vectors.o
EXTI7_IRQHandler 0x34182373 2 Code Wk stm32n657xx_Vectors.o
EXTI8_IRQHandler 0x34182383 2 Code Wk stm32n657xx_Vectors.o
EXTI9_IRQHandler 0x34182E7F 2 Code Wk stm32n657xx_Vectors.o
Error_Handler 0x3418074D 4 4 Code Lc blto2_FSBL_lto.o
FDCAN1_IT0_IRQHandler 0x34184273 2 Code Wk stm32n657xx_Vectors.o
FDCAN1_IT1_IRQHandler 0x34184275 2 Code Wk stm32n657xx_Vectors.o
FDCAN2_IT0_IRQHandler 0x34184277 2 Code Wk stm32n657xx_Vectors.o
FDCAN2_IT1_IRQHandler 0x34184279 2 Code Wk stm32n657xx_Vectors.o
FDCAN3_IT0_IRQHandler 0x3418427B 2 Code Wk stm32n657xx_Vectors.o
FDCAN3_IT1_IRQHandler 0x3418427D 2 Code Wk stm32n657xx_Vectors.o
FDCAN_CU_IRQHandler 0x3418427F 2 Code Wk stm32n657xx_Vectors.o
FMC_IRQHandler 0x34184265 2 Code Wk stm32n657xx_Vectors.o
FPU_IRQHandler 0x34181E53 2 Code Wk stm32n657xx_Vectors.o
GFXMMU_IRQHandler 0x34184189 2 Code Wk stm32n657xx_Vectors.o
GFXTIM_IRQHandler 0x3418418B 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel0_IRQHandler 0x341841B3 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel10_IRQHandler 0x341841C7 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel11_IRQHandler 0x341841C9 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel12_IRQHandler 0x341841CB 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel13_IRQHandler 0x341841CD 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel14_IRQHandler 0x341841CF 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel15_IRQHandler 0x341841D1 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel1_IRQHandler 0x341841B5 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel2_IRQHandler 0x341841B7 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel3_IRQHandler 0x341841B9 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel4_IRQHandler 0x341841BB 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel5_IRQHandler 0x341841BD 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel6_IRQHandler 0x341841BF 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel7_IRQHandler 0x341841C1 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel8_IRQHandler 0x341841C3 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel9_IRQHandler 0x341841C5 2 Code Wk stm32n657xx_Vectors.o
GPU2D_ER_IRQHandler 0x3418418F 2 Code Wk stm32n657xx_Vectors.o
GPU2D_IRQHandler 0x3418418D 2 Code Wk stm32n657xx_Vectors.o
HAL_Delay 0x34182105 58 4 Code Lc blto2_FSBL_lto.o
HAL_GPIO_Init 0x34180C41 1 928 4 Code Lc blto2_FSBL_lto.o
HAL_GPIO_WritePin 0x34182211 102 4 Code Lc blto2_FSBL_lto.o
HAL_GetTick 0x34180ACD 12 4 Code Lc blto2_FSBL_lto.o
HAL_IncTick 0x341820E9 26 4 Code Lc blto2_FSBL_lto.o
HAL_Init 0x34180A9D 48 4 Code Lc blto2_FSBL_lto.o
HAL_InitTick 0x34182069 126 4 Code Lc blto2_FSBL_lto.o
HAL_MspInit 0x34180751 8 4 Code Lc blto2_FSBL_lto.o
HAL_NVIC_SetPriority 0x34180B15 168 4 Code Lc blto2_FSBL_lto.o
HAL_NVIC_SetPriorityGrouping 0x34182141 62 4 Code Lc blto2_FSBL_lto.o
HAL_PWREx_ConfigSupply 0x34182279 114 4 Code Lc blto2_FSBL_lto.o
HAL_PWREx_ControlVoltageScaling 0x341822ED 114 4 Code Lc blto2_FSBL_lto.o
HAL_PWREx_EnableVddIO3 0x34182361 18 4 Code Lc blto2_FSBL_lto.o
HAL_RCCEx_GetPLL1CLKFreq 0x34183F65 130 4 Code Lc blto2_FSBL_lto.o
HAL_RCCEx_GetPLL2CLKFreq 0x34183FE9 130 4 Code Lc blto2_FSBL_lto.o
HAL_RCCEx_GetPLL3CLKFreq 0x3418406D 130 4 Code Lc blto2_FSBL_lto.o
HAL_RCCEx_GetPLL4CLKFreq 0x341840F1 130 4 Code Lc blto2_FSBL_lto.o
HAL_RCC_ClockConfig 0x3418339D 2 498 4 Code Lc blto2_FSBL_lto.o
HAL_RCC_GetClockConfig 0x341815D5 240 4 Code Lc blto2_FSBL_lto.o
HAL_RCC_GetCpuClockFreq 0x34183E5D 238 4 Code Lc blto2_FSBL_lto.o
HAL_RCC_OscConfig 0x34182385 2 810 4 Code Lc blto2_FSBL_lto.o
HAL_SYSTICK_Config 0x34180C31 16 4 Code Lc blto2_FSBL_lto.o
HASH_IRQHandler 0x3418339B 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel0_IRQHandler 0x34184193 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel10_IRQHandler 0x341841A7 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel11_IRQHandler 0x341841A9 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel12_IRQHandler 0x341841AB 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel13_IRQHandler 0x341841AD 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel14_IRQHandler 0x341841AF 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel15_IRQHandler 0x341841B1 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel1_IRQHandler 0x34184195 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel2_IRQHandler 0x34184197 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel3_IRQHandler 0x34184199 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel4_IRQHandler 0x3418419B 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel5_IRQHandler 0x3418419D 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel6_IRQHandler 0x3418419F 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel7_IRQHandler 0x341841A1 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel8_IRQHandler 0x341841A3 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel9_IRQHandler 0x341841A5 2 Code Wk stm32n657xx_Vectors.o
HardFault_Handler 0x34181E4D 2 4 Code Gb blto2_FSBL_lto.o
I2C1_ER_IRQHandler 0x341841D5 2 Code Wk stm32n657xx_Vectors.o
I2C1_EV_IRQHandler 0x341841D3 2 Code Wk stm32n657xx_Vectors.o
I2C2_ER_IRQHandler 0x341841D9 2 Code Wk stm32n657xx_Vectors.o
I2C2_EV_IRQHandler 0x341841D7 2 Code Wk stm32n657xx_Vectors.o
I2C3_ER_IRQHandler 0x341841DD 2 Code Wk stm32n657xx_Vectors.o
I2C3_EV_IRQHandler 0x341841DB 2 Code Wk stm32n657xx_Vectors.o
I2C4_ER_IRQHandler 0x341841E1 2 Code Wk stm32n657xx_Vectors.o
I2C4_EV_IRQHandler 0x341841DF 2 Code Wk stm32n657xx_Vectors.o
I3C1_ER_IRQHandler 0x341841E5 2 Code Wk stm32n657xx_Vectors.o
I3C1_EV_IRQHandler 0x341841E3 2 Code Wk stm32n657xx_Vectors.o
I3C2_ER_IRQHandler 0x341841E9 2 Code Wk stm32n657xx_Vectors.o
I3C2_EV_IRQHandler 0x341841E7 2 Code Wk stm32n657xx_Vectors.o
IAC_IRQHandler 0x34181E63 2 Code Wk stm32n657xx_Vectors.o
ICACHE_IRQHandler 0x34184191 2 Code Wk stm32n657xx_Vectors.o
IWDG_IRQHandler 0x341820E7 2 Code Wk stm32n657xx_Vectors.o
JPEG_IRQHandler 0x34184185 2 Code Wk stm32n657xx_Vectors.o
LL_AHB4_GRP1_EnableClock 0x34181CE5 34 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetCpuClkSource 0x341813F5 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetSysClkSource 0x34181405 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSE_IsReady 0x34181575 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSE_IsReady.63 0x341818A9 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSI_Disable 0x34182EA1 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSI_Enable 0x34182375 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSI_GetDivider 0x34181585 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSI_GetDivider.61 0x34181879 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSI_IsReady 0x341813E5 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSI_IsReady.60 0x34181869 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSI_SetCalibTrimming 0x34182E81 30 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSI_SetDivider 0x341813C9 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC11_GetSource 0x341814E1 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC1_Enable 0x34183E4D 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC1_GetDivider 0x34183F4D 22 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC1_GetSource 0x341814B1 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC2_GetSource 0x341814C1 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC6_GetSource 0x341814D1 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_LSE_IsReady 0x34181491 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_LSI_Disable 0x34182F01 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_LSI_Enable 0x34182EF1 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_LSI_IsReady 0x34181481 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_MSI_Disable 0x34182EE1 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_MSI_Enable 0x34182ED1 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_MSI_GetFrequency 0x34181899 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_MSI_IsReady 0x34181471 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_MSI_IsReady.62 0x34181889 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_MSI_SetCalibTrimming 0x34182EB1 30 4 Code Lc blto2_FSBL_lto.o
LL_RCC_MSI_SetFrequency 0x34181455 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1P_IsEnabled 0x341819E9 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_GetFRACN 0x34181A29 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_GetM 0x34181A09 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_GetN 0x34181A19 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_GetP1 0x34181A39 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_GetP2 0x34181A49 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_GetSource 0x34181415 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_GetSource.71 0x341819F9 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_IsEnabledBypass 0x34181595 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_IsEnabledBypass.72 0x34181A59 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_IsReady 0x341814A1 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_IsReady.70 0x341819D9 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2P_IsEnabled 0x34181959 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_GetFRACN 0x34181999 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_GetM 0x34181979 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_GetN 0x34181989 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_GetP1 0x341819A9 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_GetP2 0x341819B9 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_GetSource 0x34181425 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_GetSource.68 0x34181969 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_IsEnabledBypass 0x341815A5 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_IsEnabledBypass.69 0x341819C9 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_IsReady 0x341814F1 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_IsReady.67 0x34181949 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3P_IsEnabled 0x341818C9 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_GetFRACN 0x34181909 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_GetM 0x341818E9 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_GetN 0x341818F9 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_GetP1 0x34181919 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_GetP2 0x34181929 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_GetSource 0x34181435 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_GetSource.65 0x341818D9 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_IsEnabledBypass 0x341815B5 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_IsEnabledBypass.66 0x34181939 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_IsReady 0x34181501 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_IsReady.64 0x341818B9 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4P_IsEnabled 0x341816D5 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_GetFRACN 0x341817A1 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_GetM 0x34181781 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_GetN 0x34181791 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_GetP1 0x341817B1 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_GetP2 0x341817C1 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_GetSource 0x34181445 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_GetSource.58 0x341816E5 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_IsEnabledBypass 0x341815C5 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_IsEnabledBypass.59 0x34181859 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_IsReady 0x34181511 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_IsReady.57 0x341816C5 16 4 Code Lc blto2_FSBL_lto.o
LOCKUP_IRQHandler 0x34181E3B 2 Code Wk stm32n657xx_Vectors.o
LPTIM1_IRQHandler 0x3418421B 2 Code Wk stm32n657xx_Vectors.o
LPTIM2_IRQHandler 0x3418421D 2 Code Wk stm32n657xx_Vectors.o
LPTIM3_IRQHandler 0x3418421F 2 Code Wk stm32n657xx_Vectors.o
LPTIM4_IRQHandler 0x34184221 2 Code Wk stm32n657xx_Vectors.o
LPTIM5_IRQHandler 0x34184223 2 Code Wk stm32n657xx_Vectors.o
LPUART1_IRQHandler 0x3418425D 2 Code Wk stm32n657xx_Vectors.o
LTDC_LO_ERR_IRQHandler 0x34184181 2 Code Wk stm32n657xx_Vectors.o
LTDC_LO_IRQHandler 0x3418417F 2 Code Wk stm32n657xx_Vectors.o
LTDC_UP_ERR_IRQHandler 0x3418428D 2 Code Wk stm32n657xx_Vectors.o
LTDC_UP_IRQHandler 0x3418428B 2 Code Wk stm32n657xx_Vectors.o
MCE1_IRQHandler 0x34183E4B 2 Code Wk stm32n657xx_Vectors.o
MCE2_IRQHandler 0x34183E5B 2 Code Wk stm32n657xx_Vectors.o
MCE3_IRQHandler 0x34183F4B 2 Code Wk stm32n657xx_Vectors.o
MCE4_IRQHandler 0x34183F63 2 Code Wk stm32n657xx_Vectors.o
MDF1_FLT0_IRQHandler 0x34184227 2 Code Wk stm32n657xx_Vectors.o
MDF1_FLT1_IRQHandler 0x34184229 2 Code Wk stm32n657xx_Vectors.o
MDF1_FLT2_IRQHandler 0x3418422B 2 Code Wk stm32n657xx_Vectors.o
MDF1_FLT3_IRQHandler 0x3418422D 2 Code Wk stm32n657xx_Vectors.o
MDF1_FLT4_IRQHandler 0x3418422F 2 Code Wk stm32n657xx_Vectors.o
MDF1_FLT5_IRQHandler 0x34184231 2 Code Wk stm32n657xx_Vectors.o
MDIOS_IRQHandler 0x34184281 2 Code Wk stm32n657xx_Vectors.o
MX_GPIO_Init 0x34181B11 466 4 Code Lc blto2_FSBL_lto.o
MemManage_Handler 0x34181E51 2 4 Code Gb blto2_FSBL_lto.o
NMI_Handler 0x34181E49 2 4 Code Gb blto2_FSBL_lto.o
NPU0_IRQHandler 0x34184175 2 Code Wk stm32n657xx_Vectors.o
NPU1_IRQHandler 0x34184177 2 Code Wk stm32n657xx_Vectors.o
NPU2_IRQHandler 0x34184179 2 Code Wk stm32n657xx_Vectors.o
NPU3_IRQHandler 0x3418417B 2 Code Wk stm32n657xx_Vectors.o
NVIC_EncodePriority 0x34180BCD 100 4 Code Lc blto2_FSBL_lto.o
PAHB_ERR_IRQHandler 0x34184173 2 Code Wk stm32n657xx_Vectors.o
PKA_IRQHandler 0x3418333B 2 Code Wk stm32n657xx_Vectors.o
PVD_PVM_IRQHandler 0x34181CE3 2 Code Wk stm32n657xx_Vectors.o
PendSV_Handler 0x34181E65 2 4 Code Gb blto2_FSBL_lto.o
RCCEx_CalcPLLFreq 0x341817D1 136 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetPLLSourceFreq 0x341816F5 140 4 Code Lc blto2_FSBL_lto.o
RCC_IC_CheckPLLSources 0x34183D61 234 4 Code Lc blto2_FSBL_lto.o
RCC_IRQHandler 0x34181D4B 2 Code Wk stm32n657xx_Vectors.o
RCC_PLL_Config 0x34182FED 846 4 Code Lc blto2_FSBL_lto.o
RCC_PLL_Enable 0x3418333D 94 4 Code Lc blto2_FSBL_lto.o
RCC_PLL_IsNewConfig 0x34182F11 218 4 Code Lc blto2_FSBL_lto.o
RCC_PLL_Source_IsReady 0x34181521 84 4 Code Lc blto2_FSBL_lto.o
RCC_S_IRQHandler 0x34181E67 2 Code Wk stm32n657xx_Vectors.o
RIFSC_TAMPER_IRQHandler 0x34181E5F 2 Code Wk stm32n657xx_Vectors.o
RNG_IRQHandler 0x34183D5F 2 Code Wk stm32n657xx_Vectors.o
RTC_IRQHandler 0x34182067 2 Code Wk stm32n657xx_Vectors.o
RTC_S_IRQHandler 0x34181E57 2 Code Wk stm32n657xx_Vectors.o
Reset_Handler 0x34181A7D 4 Code Gb STM32N6xx_Startup.o
SAES_IRQHandler 0x34182F0F 2 Code Wk stm32n657xx_Vectors.o
SAI1_A_IRQHandler 0x34184233 2 Code Wk stm32n657xx_Vectors.o
SAI1_B_IRQHandler 0x34184235 2 Code Wk stm32n657xx_Vectors.o
SAI2_A_IRQHandler 0x34184237 2 Code Wk stm32n657xx_Vectors.o
SAI2_B_IRQHandler 0x34184239 2 Code Wk stm32n657xx_Vectors.o
SDMMC1_IRQHandler 0x34184267 2 Code Wk stm32n657xx_Vectors.o
SDMMC2_IRQHandler 0x34184269 2 Code Wk stm32n657xx_Vectors.o
SPDIFRX_IRQHandler 0x3418423B 2 Code Wk stm32n657xx_Vectors.o
SPI1_IRQHandler 0x3418423D 2 Code Wk stm32n657xx_Vectors.o
SPI2_IRQHandler 0x3418423F 2 Code Wk stm32n657xx_Vectors.o
SPI3_IRQHandler 0x34184241 2 Code Wk stm32n657xx_Vectors.o
SPI4_IRQHandler 0x34184243 2 Code Wk stm32n657xx_Vectors.o
SPI5_IRQHandler 0x34184245 2 Code Wk stm32n657xx_Vectors.o
SPI6_IRQHandler 0x34184247 2 Code Wk stm32n657xx_Vectors.o
SVC_Handler 0x34181E5D 2 4 Code Gb blto2_FSBL_lto.o
SysTick_Config 0x341821C1 78 4 Code Lc blto2_FSBL_lto.o
SysTick_Handler 0x34180759 8 4 Code Gb blto2_FSBL_lto.o
SystemClock_Config 0x34181D4D 238 4 Code Lc blto2_FSBL_lto.o
SystemCoreClockUpdate 0x34180761 828 4 Code Gb blto2_FSBL_lto.o
SystemInit 0x34181E69 510 4 Code Gb blto2_FSBL_lto.o
TAMP_IRQHandler 0x34181E5B 2 Code Wk stm32n657xx_Vectors.o
TCM_ECC_IRQHandler 0x34181E4B 2 Code Wk stm32n657xx_Vectors.o
TIM10_IRQHandler 0x34184209 2 Code Wk stm32n657xx_Vectors.o
TIM11_IRQHandler 0x3418420B 2 Code Wk stm32n657xx_Vectors.o
TIM12_IRQHandler 0x3418420D 2 Code Wk stm32n657xx_Vectors.o
TIM13_IRQHandler 0x3418420F 2 Code Wk stm32n657xx_Vectors.o
TIM14_IRQHandler 0x34184211 2 Code Wk stm32n657xx_Vectors.o
TIM15_IRQHandler 0x34184213 2 Code Wk stm32n657xx_Vectors.o
TIM16_IRQHandler 0x34184215 2 Code Wk stm32n657xx_Vectors.o
TIM17_IRQHandler 0x34184217 2 Code Wk stm32n657xx_Vectors.o
TIM18_IRQHandler 0x34184219 2 Code Wk stm32n657xx_Vectors.o
TIM1_BRK_IRQHandler 0x341841EB 2 Code Wk stm32n657xx_Vectors.o
TIM1_CC_IRQHandler 0x341841F1 2 Code Wk stm32n657xx_Vectors.o
TIM1_TRG_CCU_IRQHandler 0x341841EF 2 Code Wk stm32n657xx_Vectors.o
TIM1_UP_IRQHandler 0x341841ED 2 Code Wk stm32n657xx_Vectors.o
TIM2_IRQHandler 0x341841F3 2 Code Wk stm32n657xx_Vectors.o
TIM3_IRQHandler 0x341841F5 2 Code Wk stm32n657xx_Vectors.o
TIM4_IRQHandler 0x341841F7 2 Code Wk stm32n657xx_Vectors.o
TIM5_IRQHandler 0x341841F9 2 Code Wk stm32n657xx_Vectors.o
TIM6_IRQHandler 0x341841FB 2 Code Wk stm32n657xx_Vectors.o
TIM7_IRQHandler 0x341841FD 2 Code Wk stm32n657xx_Vectors.o
TIM8_BRK_IRQHandler 0x341841FF 2 Code Wk stm32n657xx_Vectors.o
TIM8_CC_IRQHandler 0x34184205 2 Code Wk stm32n657xx_Vectors.o
TIM8_TRG_CCU_IRQHandler 0x34184203 2 Code Wk stm32n657xx_Vectors.o
TIM8_UP_IRQHandler 0x34184201 2 Code Wk stm32n657xx_Vectors.o
TIM9_IRQHandler 0x34184207 2 Code Wk stm32n657xx_Vectors.o
UART4_IRQHandler 0x3418424F 2 Code Wk stm32n657xx_Vectors.o
UART5_IRQHandler 0x34184251 2 Code Wk stm32n657xx_Vectors.o
UART7_IRQHandler 0x34184255 2 Code Wk stm32n657xx_Vectors.o
UART8_IRQHandler 0x34184257 2 Code Wk stm32n657xx_Vectors.o
UART9_IRQHandler 0x34184259 2 Code Wk stm32n657xx_Vectors.o
UCPD1_IRQHandler 0x3418426B 2 Code Wk stm32n657xx_Vectors.o
USART10_IRQHandler 0x3418425B 2 Code Wk stm32n657xx_Vectors.o
USART1_IRQHandler 0x34184249 2 Code Wk stm32n657xx_Vectors.o
USART2_IRQHandler 0x3418424B 2 Code Wk stm32n657xx_Vectors.o
USART3_IRQHandler 0x3418424D 2 Code Wk stm32n657xx_Vectors.o
USART6_IRQHandler 0x34184253 2 Code Wk stm32n657xx_Vectors.o
USB1_OTG_HS_IRQHandler 0x3418426D 2 Code Wk stm32n657xx_Vectors.o
USB2_OTG_HS_IRQHandler 0x3418426F 2 Code Wk stm32n657xx_Vectors.o
UsageFault_Handler 0x34181E59 2 4 Code Gb blto2_FSBL_lto.o
VENC_IRQHandler 0x34184187 2 Code Wk stm32n657xx_Vectors.o
WAKEUP_PIN_IRQHandler 0x34184285 2 Code Wk stm32n657xx_Vectors.o
WWDG_IRQHandler 0x34182103 2 Code Wk stm32n657xx_Vectors.o
XSPI1_IRQHandler 0x3418425F 2 Code Wk stm32n657xx_Vectors.o
XSPI2_IRQHandler 0x34184261 2 Code Wk stm32n657xx_Vectors.o
XSPI3_IRQHandler 0x34184263 2 Code Wk stm32n657xx_Vectors.o
__NVIC_GetPriorityGrouping 0x34180BBD 16 4 Code Lc blto2_FSBL_lto.o
__NVIC_SetPriority 0x34182181 62 4 Code Lc blto2_FSBL_lto.o
__NVIC_SetPriorityGrouping 0x34180AD9 60 4 Code Lc blto2_FSBL_lto.o
__SEGGER_init_copy 0x341844C3 20 2 Code Wk SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_init_ctors 0x3418444D 26 4 Code Wk SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__SEGGER_init_done 0x34181A73 4 Code Gb SEGGER_THUMB_Startup.o
__SEGGER_init_zero 0x341844B1 18 2 Code Wk SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__aeabi_memclr 0x34181AA9 104 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__aeabi_memclr4 0x34181AA9 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__aeabi_memclr8 0x34181AA9 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__aeabi_memset 0x34181AAB 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__aeabi_memset4 0x34181AAB 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__aeabi_memset8 0x34181AAB 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
__startup_complete 0x34181A73 4 Code Gb SEGGER_THUMB_Startup.o
_start 0x34181A69 14 4 Code Gb SEGGER_THUMB_Startup.o
assert_failed 0x34181E3D 10 4 Code Lc blto2_FSBL_lto.o
exit 0x34181A77 2 4 Code Gb SEGGER_THUMB_Startup.o
main 0x34181D09 66 4 Code Gb blto2_FSBL_lto.o
memset 0x34181AB1 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
reset_handler 0x34181A7D 4 Code Gb STM32N6xx_Startup.o

Function symbols by address

Address Symbol name Size Align Type Bd Object File
0x3418074D Error_Handler 4 4 Code Lc blto2_FSBL_lto.o
0x34180751 HAL_MspInit 8 4 Code Lc blto2_FSBL_lto.o
0x34180759 SysTick_Handler 8 4 Code Gb blto2_FSBL_lto.o
0x34180761 SystemCoreClockUpdate 828 4 Code Gb blto2_FSBL_lto.o
0x34180A9D HAL_Init 48 4 Code Lc blto2_FSBL_lto.o
0x34180ACD HAL_GetTick 12 4 Code Lc blto2_FSBL_lto.o
0x34180AD9 __NVIC_SetPriorityGrouping 60 4 Code Lc blto2_FSBL_lto.o
0x34180B15 HAL_NVIC_SetPriority 168 4 Code Lc blto2_FSBL_lto.o
0x34180BBD __NVIC_GetPriorityGrouping 16 4 Code Lc blto2_FSBL_lto.o
0x34180BCD NVIC_EncodePriority 100 4 Code Lc blto2_FSBL_lto.o
0x34180C31 HAL_SYSTICK_Config 16 4 Code Lc blto2_FSBL_lto.o
0x34180C41 HAL_GPIO_Init 1 928 4 Code Lc blto2_FSBL_lto.o
0x341813C9 LL_RCC_HSI_SetDivider 28 4 Code Lc blto2_FSBL_lto.o
0x341813E5 LL_RCC_HSI_IsReady 16 4 Code Lc blto2_FSBL_lto.o
0x341813F5 LL_RCC_GetCpuClkSource 16 4 Code Lc blto2_FSBL_lto.o
0x34181405 LL_RCC_GetSysClkSource 16 4 Code Lc blto2_FSBL_lto.o
0x34181415 LL_RCC_PLL1_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x34181425 LL_RCC_PLL2_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x34181435 LL_RCC_PLL3_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x34181445 LL_RCC_PLL4_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x34181455 LL_RCC_MSI_SetFrequency 28 4 Code Lc blto2_FSBL_lto.o
0x34181471 LL_RCC_MSI_IsReady 16 4 Code Lc blto2_FSBL_lto.o
0x34181481 LL_RCC_LSI_IsReady 16 4 Code Lc blto2_FSBL_lto.o
0x34181491 LL_RCC_LSE_IsReady 16 4 Code Lc blto2_FSBL_lto.o
0x341814A1 LL_RCC_PLL1_IsReady 16 4 Code Lc blto2_FSBL_lto.o
0x341814B1 LL_RCC_IC1_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x341814C1 LL_RCC_IC2_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x341814D1 LL_RCC_IC6_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x341814E1 LL_RCC_IC11_GetSource 16 4 Code Lc blto2_FSBL_lto.o
0x341814F1 LL_RCC_PLL2_IsReady 16 4 Code Lc blto2_FSBL_lto.o
0x34181501 LL_RCC_PLL3_IsReady 16 4 Code Lc blto2_FSBL_lto.o
0x34181511 LL_RCC_PLL4_IsReady 16 4 Code Lc blto2_FSBL_lto.o
0x34181521 RCC_PLL_Source_IsReady 84 4 Code Lc blto2_FSBL_lto.o
0x34181575 LL_RCC_HSE_IsReady 16 4 Code Lc blto2_FSBL_lto.o
0x34181585 LL_RCC_HSI_GetDivider 16 4 Code Lc blto2_FSBL_lto.o
0x34181595 LL_RCC_PLL1_IsEnabledBypass 16 4 Code Lc blto2_FSBL_lto.o
0x341815A5 LL_RCC_PLL2_IsEnabledBypass 16 4 Code Lc blto2_FSBL_lto.o
0x341815B5 LL_RCC_PLL3_IsEnabledBypass 16 4 Code Lc blto2_FSBL_lto.o
0x341815C5 LL_RCC_PLL4_IsEnabledBypass 16 4 Code Lc blto2_FSBL_lto.o
0x341815D5 HAL_RCC_GetClockConfig 240 4 Code Lc blto2_FSBL_lto.o
0x341816C5 LL_RCC_PLL4_IsReady.57 16 4 Code Lc blto2_FSBL_lto.o
0x341816D5 LL_RCC_PLL4P_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
0x341816E5 LL_RCC_PLL4_GetSource.58 16 4 Code Lc blto2_FSBL_lto.o
0x341816F5 RCCEx_GetPLLSourceFreq 140 4 Code Lc blto2_FSBL_lto.o
0x34181781 LL_RCC_PLL4_GetM 16 4 Code Lc blto2_FSBL_lto.o
0x34181791 LL_RCC_PLL4_GetN 16 4 Code Lc blto2_FSBL_lto.o
0x341817A1 LL_RCC_PLL4_GetFRACN 16 4 Code Lc blto2_FSBL_lto.o
0x341817B1 LL_RCC_PLL4_GetP1 16 4 Code Lc blto2_FSBL_lto.o
0x341817C1 LL_RCC_PLL4_GetP2 16 4 Code Lc blto2_FSBL_lto.o
0x341817D1 RCCEx_CalcPLLFreq 136 4 Code Lc blto2_FSBL_lto.o
0x34181859 LL_RCC_PLL4_IsEnabledBypass.59 16 4 Code Lc blto2_FSBL_lto.o
0x34181869 LL_RCC_HSI_IsReady.60 16 4 Code Lc blto2_FSBL_lto.o
0x34181879 LL_RCC_HSI_GetDivider.61 16 4 Code Lc blto2_FSBL_lto.o
0x34181889 LL_RCC_MSI_IsReady.62 16 4 Code Lc blto2_FSBL_lto.o
0x34181899 LL_RCC_MSI_GetFrequency 16 4 Code Lc blto2_FSBL_lto.o
0x341818A9 LL_RCC_HSE_IsReady.63 16 4 Code Lc blto2_FSBL_lto.o
0x341818B9 LL_RCC_PLL3_IsReady.64 16 4 Code Lc blto2_FSBL_lto.o
0x341818C9 LL_RCC_PLL3P_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
0x341818D9 LL_RCC_PLL3_GetSource.65 16 4 Code Lc blto2_FSBL_lto.o
0x341818E9 LL_RCC_PLL3_GetM 16 4 Code Lc blto2_FSBL_lto.o
0x341818F9 LL_RCC_PLL3_GetN 16 4 Code Lc blto2_FSBL_lto.o
0x34181909 LL_RCC_PLL3_GetFRACN 16 4 Code Lc blto2_FSBL_lto.o
0x34181919 LL_RCC_PLL3_GetP1 16 4 Code Lc blto2_FSBL_lto.o
0x34181929 LL_RCC_PLL3_GetP2 16 4 Code Lc blto2_FSBL_lto.o
0x34181939 LL_RCC_PLL3_IsEnabledBypass.66 16 4 Code Lc blto2_FSBL_lto.o
0x34181949 LL_RCC_PLL2_IsReady.67 16 4 Code Lc blto2_FSBL_lto.o
0x34181959 LL_RCC_PLL2P_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
0x34181969 LL_RCC_PLL2_GetSource.68 16 4 Code Lc blto2_FSBL_lto.o
0x34181979 LL_RCC_PLL2_GetM 16 4 Code Lc blto2_FSBL_lto.o
0x34181989 LL_RCC_PLL2_GetN 16 4 Code Lc blto2_FSBL_lto.o
0x34181999 LL_RCC_PLL2_GetFRACN 16 4 Code Lc blto2_FSBL_lto.o
0x341819A9 LL_RCC_PLL2_GetP1 16 4 Code Lc blto2_FSBL_lto.o
0x341819B9 LL_RCC_PLL2_GetP2 16 4 Code Lc blto2_FSBL_lto.o
0x341819C9 LL_RCC_PLL2_IsEnabledBypass.69 16 4 Code Lc blto2_FSBL_lto.o
0x341819D9 LL_RCC_PLL1_IsReady.70 16 4 Code Lc blto2_FSBL_lto.o
0x341819E9 LL_RCC_PLL1P_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
0x341819F9 LL_RCC_PLL1_GetSource.71 16 4 Code Lc blto2_FSBL_lto.o
0x34181A09 LL_RCC_PLL1_GetM 16 4 Code Lc blto2_FSBL_lto.o
0x34181A19 LL_RCC_PLL1_GetN 16 4 Code Lc blto2_FSBL_lto.o
0x34181A29 LL_RCC_PLL1_GetFRACN 16 4 Code Lc blto2_FSBL_lto.o
0x34181A39 LL_RCC_PLL1_GetP1 16 4 Code Lc blto2_FSBL_lto.o
0x34181A49 LL_RCC_PLL1_GetP2 16 4 Code Lc blto2_FSBL_lto.o
0x34181A59 LL_RCC_PLL1_IsEnabledBypass.72 16 4 Code Lc blto2_FSBL_lto.o
0x34181A69 _start 14 4 Code Gb SEGGER_THUMB_Startup.o
0x34181A73 __startup_complete 4 Code Gb SEGGER_THUMB_Startup.o
0x34181A73 __SEGGER_init_done 4 Code Gb SEGGER_THUMB_Startup.o
0x34181A77 exit 2 4 Code Gb SEGGER_THUMB_Startup.o
0x34181A7D reset_handler 4 Code Gb STM32N6xx_Startup.o
0x34181A7D Reset_Handler 4 Code Gb STM32N6xx_Startup.o
0x34181AA9 __aeabi_memclr8 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34181AA9 __aeabi_memclr4 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34181AA9 __aeabi_memclr 104 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34181AAB __aeabi_memset8 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34181AAB __aeabi_memset4 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34181AAB __aeabi_memset 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34181AB1 memset 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x34181B11 MX_GPIO_Init 466 4 Code Lc blto2_FSBL_lto.o
0x34181CE3 PVD_PVM_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34181CE5 LL_AHB4_GRP1_EnableClock 34 4 Code Lc blto2_FSBL_lto.o
0x34181D07 DTS_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34181D09 main 66 4 Code Gb blto2_FSBL_lto.o
0x34181D4B RCC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34181D4D SystemClock_Config 238 4 Code Lc blto2_FSBL_lto.o
0x34181E3B LOCKUP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34181E3D assert_failed 10 4 Code Lc blto2_FSBL_lto.o
0x34181E47 CACHE_ECC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34181E49 NMI_Handler 2 4 Code Gb blto2_FSBL_lto.o
0x34181E4B TCM_ECC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34181E4D HardFault_Handler 2 4 Code Gb blto2_FSBL_lto.o
0x34181E4F BCK_ECC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34181E51 MemManage_Handler 2 4 Code Gb blto2_FSBL_lto.o
0x34181E53 FPU_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34181E55 BusFault_Handler 2 4 Code Gb blto2_FSBL_lto.o
0x34181E57 RTC_S_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34181E59 UsageFault_Handler 2 4 Code Gb blto2_FSBL_lto.o
0x34181E5B TAMP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34181E5D SVC_Handler 2 4 Code Gb blto2_FSBL_lto.o
0x34181E5F RIFSC_TAMPER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34181E61 DebugMon_Handler 2 4 Code Gb blto2_FSBL_lto.o
0x34181E63 IAC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34181E65 PendSV_Handler 2 4 Code Gb blto2_FSBL_lto.o
0x34181E67 RCC_S_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34181E69 SystemInit 510 4 Code Gb blto2_FSBL_lto.o
0x34182067 RTC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182069 HAL_InitTick 126 4 Code Lc blto2_FSBL_lto.o
0x341820E7 IWDG_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341820E9 HAL_IncTick 26 4 Code Lc blto2_FSBL_lto.o
0x34182103 WWDG_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182105 HAL_Delay 58 4 Code Lc blto2_FSBL_lto.o
0x3418213F EXTI0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182141 HAL_NVIC_SetPriorityGrouping 62 4 Code Lc blto2_FSBL_lto.o
0x3418217F EXTI1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182181 __NVIC_SetPriority 62 4 Code Lc blto2_FSBL_lto.o
0x341821BF EXTI2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341821C1 SysTick_Config 78 4 Code Lc blto2_FSBL_lto.o
0x3418220F EXTI3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182211 HAL_GPIO_WritePin 102 4 Code Lc blto2_FSBL_lto.o
0x34182277 EXTI4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182279 HAL_PWREx_ConfigSupply 114 4 Code Lc blto2_FSBL_lto.o
0x341822EB EXTI5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341822ED HAL_PWREx_ControlVoltageScaling 114 4 Code Lc blto2_FSBL_lto.o
0x3418235F EXTI6_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182361 HAL_PWREx_EnableVddIO3 18 4 Code Lc blto2_FSBL_lto.o
0x34182373 EXTI7_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182375 LL_RCC_HSI_Enable 14 4 Code Lc blto2_FSBL_lto.o
0x34182383 EXTI8_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182385 HAL_RCC_OscConfig 2 810 4 Code Lc blto2_FSBL_lto.o
0x34182E7F EXTI9_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182E81 LL_RCC_HSI_SetCalibTrimming 30 4 Code Lc blto2_FSBL_lto.o
0x34182E9F EXTI10_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182EA1 LL_RCC_HSI_Disable 14 4 Code Lc blto2_FSBL_lto.o
0x34182EAF EXTI11_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182EB1 LL_RCC_MSI_SetCalibTrimming 30 4 Code Lc blto2_FSBL_lto.o
0x34182ECF EXTI12_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182ED1 LL_RCC_MSI_Enable 14 4 Code Lc blto2_FSBL_lto.o
0x34182EDF EXTI13_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182EE1 LL_RCC_MSI_Disable 14 4 Code Lc blto2_FSBL_lto.o
0x34182EEF EXTI14_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182EF1 LL_RCC_LSI_Enable 14 4 Code Lc blto2_FSBL_lto.o
0x34182EFF EXTI15_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182F01 LL_RCC_LSI_Disable 14 4 Code Lc blto2_FSBL_lto.o
0x34182F0F SAES_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182F11 RCC_PLL_IsNewConfig 218 4 Code Lc blto2_FSBL_lto.o
0x34182FEB CRYP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34182FED RCC_PLL_Config 846 4 Code Lc blto2_FSBL_lto.o
0x3418333B PKA_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418333D RCC_PLL_Enable 94 4 Code Lc blto2_FSBL_lto.o
0x3418339B HASH_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418339D HAL_RCC_ClockConfig 2 498 4 Code Lc blto2_FSBL_lto.o
0x34183D5F RNG_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34183D61 RCC_IC_CheckPLLSources 234 4 Code Lc blto2_FSBL_lto.o
0x34183E4B MCE1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34183E4D LL_RCC_IC1_Enable 14 4 Code Lc blto2_FSBL_lto.o
0x34183E5B MCE2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34183E5D HAL_RCC_GetCpuClockFreq 238 4 Code Lc blto2_FSBL_lto.o
0x34183F4B MCE3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34183F4D LL_RCC_IC1_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
0x34183F63 MCE4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34183F65 HAL_RCCEx_GetPLL1CLKFreq 130 4 Code Lc blto2_FSBL_lto.o
0x34183FE7 ADC1_2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34183FE9 HAL_RCCEx_GetPLL2CLKFreq 130 4 Code Lc blto2_FSBL_lto.o
0x3418406B CSI_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418406D HAL_RCCEx_GetPLL3CLKFreq 130 4 Code Lc blto2_FSBL_lto.o
0x341840EF DCMIPP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341840F1 HAL_RCCEx_GetPLL4CLKFreq 130 4 Code Lc blto2_FSBL_lto.o
0x34184173 PAHB_ERR_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184175 NPU0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184177 NPU1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184179 NPU2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418417B NPU3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418417D CACHEAXI_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418417F LTDC_LO_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184181 LTDC_LO_ERR_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184183 DMA2D_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184185 JPEG_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184187 VENC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184189 GFXMMU_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418418B GFXTIM_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418418D GPU2D_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418418F GPU2D_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184191 ICACHE_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184193 HPDMA1_Channel0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184195 HPDMA1_Channel1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184197 HPDMA1_Channel2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184199 HPDMA1_Channel3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418419B HPDMA1_Channel4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418419D HPDMA1_Channel5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418419F HPDMA1_Channel6_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341841A1 HPDMA1_Channel7_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341841A3 HPDMA1_Channel8_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341841A5 HPDMA1_Channel9_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341841A7 HPDMA1_Channel10_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341841A9 HPDMA1_Channel11_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341841AB HPDMA1_Channel12_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341841AD HPDMA1_Channel13_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341841AF HPDMA1_Channel14_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341841B1 HPDMA1_Channel15_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341841B3 GPDMA1_Channel0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341841B5 GPDMA1_Channel1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341841B7 GPDMA1_Channel2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341841B9 GPDMA1_Channel3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341841BB GPDMA1_Channel4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341841BD GPDMA1_Channel5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341841BF GPDMA1_Channel6_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341841C1 GPDMA1_Channel7_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341841C3 GPDMA1_Channel8_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341841C5 GPDMA1_Channel9_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341841C7 GPDMA1_Channel10_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341841C9 GPDMA1_Channel11_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341841CB GPDMA1_Channel12_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341841CD GPDMA1_Channel13_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341841CF GPDMA1_Channel14_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341841D1 GPDMA1_Channel15_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341841D3 I2C1_EV_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341841D5 I2C1_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341841D7 I2C2_EV_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341841D9 I2C2_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341841DB I2C3_EV_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341841DD I2C3_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341841DF I2C4_EV_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341841E1 I2C4_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341841E3 I3C1_EV_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341841E5 I3C1_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341841E7 I3C2_EV_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341841E9 I3C2_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341841EB TIM1_BRK_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341841ED TIM1_UP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341841EF TIM1_TRG_CCU_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341841F1 TIM1_CC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341841F3 TIM2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341841F5 TIM3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341841F7 TIM4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341841F9 TIM5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341841FB TIM6_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341841FD TIM7_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x341841FF TIM8_BRK_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184201 TIM8_UP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184203 TIM8_TRG_CCU_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184205 TIM8_CC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184207 TIM9_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184209 TIM10_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418420B TIM11_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418420D TIM12_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418420F TIM13_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184211 TIM14_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184213 TIM15_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184215 TIM16_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184217 TIM17_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184219 TIM18_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418421B LPTIM1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418421D LPTIM2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418421F LPTIM3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184221 LPTIM4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184223 LPTIM5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184225 ADF1_FLT0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184227 MDF1_FLT0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184229 MDF1_FLT1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418422B MDF1_FLT2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418422D MDF1_FLT3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418422F MDF1_FLT4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184231 MDF1_FLT5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184233 SAI1_A_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184235 SAI1_B_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184237 SAI2_A_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184239 SAI2_B_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418423B SPDIFRX_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418423D SPI1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418423F SPI2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184241 SPI3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184243 SPI4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184245 SPI5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184247 SPI6_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184249 USART1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418424B USART2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418424D USART3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418424F UART4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184251 UART5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184253 USART6_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184255 UART7_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184257 UART8_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184259 UART9_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418425B USART10_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418425D LPUART1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418425F XSPI1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184261 XSPI2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184263 XSPI3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184265 FMC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184267 SDMMC1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184269 SDMMC2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418426B UCPD1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418426D USB1_OTG_HS_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418426F USB2_OTG_HS_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184271 ETH1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184273 FDCAN1_IT0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184275 FDCAN1_IT1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184277 FDCAN2_IT0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184279 FDCAN2_IT1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418427B FDCAN3_IT0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418427D FDCAN3_IT1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418427F FDCAN_CU_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184281 MDIOS_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184283 DCMI_PSSI_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184285 WAKEUP_PIN_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184287 CTI_INT0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x34184289 CTI_INT1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418428B LTDC_UP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418428D LTDC_UP_ERR_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
0x3418444D __SEGGER_init_ctors 26 4 Code Wk SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x341844B1 __SEGGER_init_zero 18 2 Code Wk SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
0x341844C3 __SEGGER_init_copy 20 2 Code Wk SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)

Function symbols by descending size

Symbol name Size Align Type Bd Object File
HAL_RCC_OscConfig 2 810 4 Code Lc blto2_FSBL_lto.o
HAL_RCC_ClockConfig 2 498 4 Code Lc blto2_FSBL_lto.o
HAL_GPIO_Init 1 928 4 Code Lc blto2_FSBL_lto.o
RCC_PLL_Config 846 4 Code Lc blto2_FSBL_lto.o
SystemCoreClockUpdate 828 4 Code Gb blto2_FSBL_lto.o
SystemInit 510 4 Code Gb blto2_FSBL_lto.o
MX_GPIO_Init 466 4 Code Lc blto2_FSBL_lto.o
HAL_RCC_GetClockConfig 240 4 Code Lc blto2_FSBL_lto.o
HAL_RCC_GetCpuClockFreq 238 4 Code Lc blto2_FSBL_lto.o
SystemClock_Config 238 4 Code Lc blto2_FSBL_lto.o
RCC_IC_CheckPLLSources 234 4 Code Lc blto2_FSBL_lto.o
RCC_PLL_IsNewConfig 218 4 Code Lc blto2_FSBL_lto.o
HAL_NVIC_SetPriority 168 4 Code Lc blto2_FSBL_lto.o
RCCEx_GetPLLSourceFreq 140 4 Code Lc blto2_FSBL_lto.o
RCCEx_CalcPLLFreq 136 4 Code Lc blto2_FSBL_lto.o
HAL_RCCEx_GetPLL1CLKFreq 130 4 Code Lc blto2_FSBL_lto.o
HAL_RCCEx_GetPLL2CLKFreq 130 4 Code Lc blto2_FSBL_lto.o
HAL_RCCEx_GetPLL3CLKFreq 130 4 Code Lc blto2_FSBL_lto.o
HAL_RCCEx_GetPLL4CLKFreq 130 4 Code Lc blto2_FSBL_lto.o
HAL_InitTick 126 4 Code Lc blto2_FSBL_lto.o
HAL_PWREx_ConfigSupply 114 4 Code Lc blto2_FSBL_lto.o
HAL_PWREx_ControlVoltageScaling 114 4 Code Lc blto2_FSBL_lto.o
__aeabi_memclr 104 4 Code Wk strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
HAL_GPIO_WritePin 102 4 Code Lc blto2_FSBL_lto.o
NVIC_EncodePriority 100 4 Code Lc blto2_FSBL_lto.o
RCC_PLL_Enable 94 4 Code Lc blto2_FSBL_lto.o
RCC_PLL_Source_IsReady 84 4 Code Lc blto2_FSBL_lto.o
SysTick_Config 78 4 Code Lc blto2_FSBL_lto.o
main 66 4 Code Gb blto2_FSBL_lto.o
HAL_NVIC_SetPriorityGrouping 62 4 Code Lc blto2_FSBL_lto.o
__NVIC_SetPriority 62 4 Code Lc blto2_FSBL_lto.o
__NVIC_SetPriorityGrouping 60 4 Code Lc blto2_FSBL_lto.o
HAL_Delay 58 4 Code Lc blto2_FSBL_lto.o
HAL_Init 48 4 Code Lc blto2_FSBL_lto.o
LL_AHB4_GRP1_EnableClock 34 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSI_SetCalibTrimming 30 4 Code Lc blto2_FSBL_lto.o
LL_RCC_MSI_SetCalibTrimming 30 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSI_SetDivider 28 4 Code Lc blto2_FSBL_lto.o
LL_RCC_MSI_SetFrequency 28 4 Code Lc blto2_FSBL_lto.o
HAL_IncTick 26 4 Code Lc blto2_FSBL_lto.o
__SEGGER_init_ctors 26 4 Code Wk SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
LL_RCC_IC1_GetDivider 22 4 Code Lc blto2_FSBL_lto.o
__SEGGER_init_copy 20 2 Code Wk SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
HAL_PWREx_EnableVddIO3 18 4 Code Lc blto2_FSBL_lto.o
__SEGGER_init_zero 18 2 Code Wk SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a)
HAL_SYSTICK_Config 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetCpuClkSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_GetSysClkSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSE_IsReady 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSE_IsReady.63 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSI_GetDivider 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSI_GetDivider.61 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSI_IsReady 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSI_IsReady.60 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC11_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC1_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC2_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC6_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_LSE_IsReady 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_LSI_IsReady 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_MSI_GetFrequency 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_MSI_IsReady 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_MSI_IsReady.62 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1P_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_GetFRACN 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_GetM 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_GetN 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_GetP1 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_GetP2 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_GetSource.71 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_IsEnabledBypass 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_IsEnabledBypass.72 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_IsReady 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL1_IsReady.70 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2P_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_GetFRACN 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_GetM 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_GetN 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_GetP1 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_GetP2 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_GetSource.68 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_IsEnabledBypass 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_IsEnabledBypass.69 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_IsReady 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL2_IsReady.67 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3P_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_GetFRACN 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_GetM 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_GetN 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_GetP1 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_GetP2 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_GetSource.65 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_IsEnabledBypass 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_IsEnabledBypass.66 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_IsReady 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL3_IsReady.64 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4P_IsEnabled 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_GetFRACN 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_GetM 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_GetN 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_GetP1 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_GetP2 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_GetSource 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_GetSource.58 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_IsEnabledBypass 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_IsEnabledBypass.59 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_IsReady 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_PLL4_IsReady.57 16 4 Code Lc blto2_FSBL_lto.o
__NVIC_GetPriorityGrouping 16 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSI_Disable 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_HSI_Enable 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_IC1_Enable 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_LSI_Disable 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_LSI_Enable 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_MSI_Disable 14 4 Code Lc blto2_FSBL_lto.o
LL_RCC_MSI_Enable 14 4 Code Lc blto2_FSBL_lto.o
_start 14 4 Code Gb SEGGER_THUMB_Startup.o
HAL_GetTick 12 4 Code Lc blto2_FSBL_lto.o
assert_failed 10 4 Code Lc blto2_FSBL_lto.o
HAL_MspInit 8 4 Code Lc blto2_FSBL_lto.o
SysTick_Handler 8 4 Code Gb blto2_FSBL_lto.o
Error_Handler 4 4 Code Lc blto2_FSBL_lto.o
BusFault_Handler 2 4 Code Gb blto2_FSBL_lto.o
DebugMon_Handler 2 4 Code Gb blto2_FSBL_lto.o
HardFault_Handler 2 4 Code Gb blto2_FSBL_lto.o
MemManage_Handler 2 4 Code Gb blto2_FSBL_lto.o
NMI_Handler 2 4 Code Gb blto2_FSBL_lto.o
PendSV_Handler 2 4 Code Gb blto2_FSBL_lto.o
SVC_Handler 2 4 Code Gb blto2_FSBL_lto.o
UsageFault_Handler 2 4 Code Gb blto2_FSBL_lto.o
exit 2 4 Code Gb SEGGER_THUMB_Startup.o
ADC1_2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
ADF1_FLT0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
BCK_ECC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
CACHEAXI_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
CACHE_ECC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
CRYP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
CSI_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
CTI_INT0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
CTI_INT1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
DCMIPP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
DCMI_PSSI_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
DMA2D_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
DTS_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
ETH1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI10_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI11_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI12_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI13_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI14_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI15_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI6_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI7_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI8_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
EXTI9_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
FDCAN1_IT0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
FDCAN1_IT1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
FDCAN2_IT0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
FDCAN2_IT1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
FDCAN3_IT0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
FDCAN3_IT1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
FDCAN_CU_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
FMC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
FPU_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GFXMMU_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GFXTIM_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel10_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel11_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel12_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel13_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel14_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel15_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel6_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel7_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel8_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPDMA1_Channel9_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPU2D_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
GPU2D_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HASH_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel10_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel11_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel12_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel13_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel14_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel15_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel6_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel7_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel8_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
HPDMA1_Channel9_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
I2C1_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
I2C1_EV_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
I2C2_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
I2C2_EV_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
I2C3_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
I2C3_EV_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
I2C4_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
I2C4_EV_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
I3C1_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
I3C1_EV_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
I3C2_ER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
I3C2_EV_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
IAC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
ICACHE_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
IWDG_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
JPEG_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
LOCKUP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
LPTIM1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
LPTIM2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
LPTIM3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
LPTIM4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
LPTIM5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
LPUART1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
LTDC_LO_ERR_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
LTDC_LO_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
LTDC_UP_ERR_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
LTDC_UP_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
MCE1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
MCE2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
MCE3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
MCE4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
MDF1_FLT0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
MDF1_FLT1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
MDF1_FLT2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
MDF1_FLT3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
MDF1_FLT4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
MDF1_FLT5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
MDIOS_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
NPU0_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
NPU1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
NPU2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
NPU3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
PAHB_ERR_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
PKA_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
PVD_PVM_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
RCC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
RCC_S_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
RIFSC_TAMPER_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
RNG_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
RTC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
RTC_S_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
Reset_Handler 4 Code Gb STM32N6xx_Startup.o
SAES_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SAI1_A_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SAI1_B_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SAI2_A_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SAI2_B_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SDMMC1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SDMMC2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SPDIFRX_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SPI1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SPI2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SPI3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SPI4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SPI5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
SPI6_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
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TCM_ECC_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
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TIM11_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM12_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM13_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM14_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM15_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM16_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
TIM17_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
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TIM1_TRG_CCU_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
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UART4_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
UART5_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
UART7_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
UART8_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
UART9_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
UCPD1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
USART10_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
USART1_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
USART2_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
USART3_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
USART6_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
USB1_OTG_HS_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
USB2_OTG_HS_IRQHandler 2 Code Wk stm32n657xx_Vectors.o
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0x34350000 __AXI_RAM6_segment_start__ ---- Gb [ Linker created ]
0x34350000 __AXI_RAM5_segment_end__ ---- Gb [ Linker created ]
0x343C0000 __AXI_RAM7_segment_used_start__ ---- Gb [ Linker created ]
0x343C0000 __AXI_RAM7_segment_used_end__ ---- Gb [ Linker created ]
0x343C0000 __AXI_RAM7_segment_start__ ---- Gb [ Linker created ]
0x343C0000 __AXI_RAM6_segment_end__ ---- Gb [ Linker created ]
0x34400000 __AXI_RAM8_segment_used_start__ ---- Gb [ Linker created ]
0x34400000 __AXI_RAM8_segment_used_end__ ---- Gb [ Linker created ]
0x34400000 __AXI_RAM8_segment_start__ ---- Gb [ Linker created ]
0x34400000 __AXI_RAM7_segment_end__ ---- Gb [ Linker created ]
0x34420000 __AXI_RAM8_segment_end__ ---- Gb [ Linker created ]
0x38000000 __AHB_RAM1_segment_used_start__ ---- Gb [ Linker created ]
0x38000000 __AHB_RAM1_segment_used_end__ ---- Gb [ Linker created ]
0x38000000 __AHB_RAM1_segment_start__ ---- Gb [ Linker created ]
0x38004000 __AHB_RAM2_segment_used_start__ ---- Gb [ Linker created ]
0x38004000 __AHB_RAM2_segment_used_end__ ---- Gb [ Linker created ]
0x38004000 __AHB_RAM2_segment_start__ ---- Gb [ Linker created ]
0x38004000 __AHB_RAM1_segment_end__ ---- Gb [ Linker created ]
0x38008000 __AHB_RAM2_segment_end__ ---- Gb [ Linker created ]
0x3C000000 __BKP_RAM_segment_used_start__ ---- Gb [ Linker created ]
0x3C000000 __BKP_RAM_segment_used_end__ ---- Gb [ Linker created ]
0x3C000000 __BKP_RAM_segment_start__ ---- Gb [ Linker created ]
0x3C002000 __BKP_RAM_segment_end__ ---- Gb [ Linker created ]

REGION LIST

Regions by name

Name Range Size
AHB_RAM1 38000000-38003FFF 16 384
AHB_RAM2 38004000-38007FFF 16 384
AXI_RAM1 34064000-340FFFFF 638 976
AXI_RAM2 34180400-341FFFFF 523 264
AXI_RAM3 34200000-3426FFFF 458 752
AXI_RAM4 34270000-342DFFFF 458 752
AXI_RAM5 342E0000-3434FFFF 458 752
AXI_RAM6 34350000-343BFFFF 458 752
AXI_RAM7 343C0000-343FFFFF 262 144
AXI_RAM8 34400000-3441FFFF 131 072
BKP_RAM 3C000000-3C001FFF 8 192
DTCM_RAM 30000000-3001FFFF 131 072
FLEX_RAM 34000000-34063FFF 409 600
ITCM_RAM 10000000-1000FFFF 65 536
RAM 34180400-341FFFFF 523 264

Analysis

AXI_RAM2: Identical to region RAM RAM: Identical to region AXI_RAM2

BLOCK LIST

Blocks by name

Name Range Size Ordering
ctors 34184364-34184367 4 Auto
stack 341FC000-341FFFFF 16 384 Auto

Blocks by address

Range Size Name Ordering
34184364-34184367 4 ctors Auto
341FC000-341FFFFF 16 384 stack Auto

STACK SIZES

Functions by stack size

Function name Stack Object File

Functions without stack size information

MX_GPIO_Init LL_AHB4_GRP1_EnableClock HAL_GPIO_WritePin HAL_GPIO_Init HAL_Init SystemClock_Config HAL_Delay HAL_PWREx_ConfigSupply Error_Handler HAL_PWREx_ControlVoltageScaling HAL_RCC_OscConfig HAL_RCC_GetClockConfig HAL_RCC_ClockConfig assert_failed HAL_MspInit HAL_PWREx_EnableVddIO3 HAL_IncTick HAL_NVIC_SetPriorityGrouping HAL_InitTick HAL_SYSTICK_Config HAL_NVIC_SetPriority HAL_GetTick __NVIC_SetPriorityGrouping __NVIC_GetPriorityGrouping NVIC_EncodePriority __NVIC_SetPriority SysTick_Config LL_RCC_HSI_SetDivider LL_RCC_HSI_Enable LL_RCC_HSI_IsReady LL_RCC_GetCpuClkSource LL_RCC_GetSysClkSource LL_RCC_PLL1_GetSource LL_RCC_PLL2_GetSource LL_RCC_PLL3_GetSource LL_RCC_PLL4_GetSource LL_RCC_HSI_SetCalibTrimming LL_RCC_HSI_Disable LL_RCC_MSI_SetCalibTrimming LL_RCC_MSI_SetFrequency LL_RCC_MSI_Enable LL_RCC_MSI_IsReady LL_RCC_MSI_Disable LL_RCC_LSI_Enable LL_RCC_LSI_IsReady LL_RCC_LSI_Disable LL_RCC_LSE_IsReady RCC_PLL_IsNewConfig LL_RCC_PLL1_IsReady LL_RCC_IC1_GetSource LL_RCC_IC2_GetSource LL_RCC_IC6_GetSource LL_RCC_IC11_GetSource RCC_PLL_Config RCC_PLL_Enable LL_RCC_PLL2_IsReady LL_RCC_PLL3_IsReady LL_RCC_PLL4_IsReady RCC_PLL_Source_IsReady LL_RCC_HSE_IsReady RCC_IC_CheckPLLSources LL_RCC_IC1_Enable HAL_RCC_GetCpuClockFreq LL_RCC_PLL1_IsEnabledBypass LL_RCC_PLL2_IsEnabledBypass LL_RCC_PLL3_IsEnabledBypass LL_RCC_PLL4_IsEnabledBypass LL_RCC_HSI_GetDivider LL_RCC_IC1_GetDivider HAL_RCCEx_GetPLL1CLKFreq HAL_RCCEx_GetPLL2CLKFreq HAL_RCCEx_GetPLL3CLKFreq HAL_RCCEx_GetPLL4CLKFreq LL_RCC_HSI_IsReady.60 LL_RCC_HSI_GetDivider.61 LL_RCC_MSI_IsReady.62 LL_RCC_HSE_IsReady.63 LL_RCC_PLL1_IsReady.70 LL_RCC_PLL1P_IsEnabled LL_RCC_PLL1_GetSource.71 RCCEx_GetPLLSourceFreq LL_RCC_PLL1_GetM LL_RCC_PLL1_GetN LL_RCC_PLL1_GetFRACN LL_RCC_PLL1_GetP1 LL_RCC_PLL1_GetP2 RCCEx_CalcPLLFreq LL_RCC_PLL1_IsEnabledBypass.72 LL_RCC_PLL2_IsReady.67 LL_RCC_PLL2P_IsEnabled LL_RCC_PLL2_GetSource.68 LL_RCC_PLL2_GetM LL_RCC_PLL2_GetN LL_RCC_PLL2_GetFRACN LL_RCC_PLL2_GetP1 LL_RCC_PLL2_GetP2 LL_RCC_PLL2_IsEnabledBypass.69 LL_RCC_PLL3_IsReady.64 LL_RCC_PLL3P_IsEnabled LL_RCC_PLL3_GetSource.65 LL_RCC_PLL3_GetM LL_RCC_PLL3_GetN LL_RCC_PLL3_GetFRACN LL_RCC_PLL3_GetP1 LL_RCC_PLL3_GetP2 LL_RCC_PLL3_IsEnabledBypass.66 LL_RCC_PLL4_IsReady.57 LL_RCC_PLL4P_IsEnabled LL_RCC_PLL4_GetSource.58 LL_RCC_PLL4_GetM LL_RCC_PLL4_GetN LL_RCC_PLL4_GetFRACN LL_RCC_PLL4_GetP1 LL_RCC_PLL4_GetP2 LL_RCC_PLL4_IsEnabledBypass.59 LL_RCC_MSI_GetFrequency main NMI_Handler HardFault_Handler MemManage_Handler BusFault_Handler UsageFault_Handler SVC_Handler DebugMon_Handler PendSV_Handler SysTick_Handler SystemInit SystemCoreClockUpdate _start __SEGGER_init_done __startup_complete exit PVD_PVM_IRQHandler DTS_IRQHandler RCC_IRQHandler LOCKUP_IRQHandler CACHE_ECC_IRQHandler TCM_ECC_IRQHandler BCK_ECC_IRQHandler FPU_IRQHandler RTC_S_IRQHandler TAMP_IRQHandler RIFSC_TAMPER_IRQHandler IAC_IRQHandler RCC_S_IRQHandler RTC_IRQHandler IWDG_IRQHandler WWDG_IRQHandler EXTI0_IRQHandler EXTI1_IRQHandler EXTI2_IRQHandler EXTI3_IRQHandler EXTI4_IRQHandler EXTI5_IRQHandler EXTI6_IRQHandler EXTI7_IRQHandler EXTI8_IRQHandler EXTI9_IRQHandler EXTI10_IRQHandler EXTI11_IRQHandler EXTI12_IRQHandler EXTI13_IRQHandler EXTI14_IRQHandler EXTI15_IRQHandler SAES_IRQHandler CRYP_IRQHandler PKA_IRQHandler HASH_IRQHandler RNG_IRQHandler MCE1_IRQHandler MCE2_IRQHandler MCE3_IRQHandler MCE4_IRQHandler ADC1_2_IRQHandler CSI_IRQHandler DCMIPP_IRQHandler PAHB_ERR_IRQHandler NPU0_IRQHandler NPU1_IRQHandler NPU2_IRQHandler NPU3_IRQHandler CACHEAXI_IRQHandler LTDC_LO_IRQHandler LTDC_LO_ERR_IRQHandler DMA2D_IRQHandler JPEG_IRQHandler VENC_IRQHandler GFXMMU_IRQHandler GFXTIM_IRQHandler GPU2D_IRQHandler GPU2D_ER_IRQHandler ICACHE_IRQHandler HPDMA1_Channel0_IRQHandler HPDMA1_Channel1_IRQHandler HPDMA1_Channel2_IRQHandler HPDMA1_Channel3_IRQHandler HPDMA1_Channel4_IRQHandler HPDMA1_Channel5_IRQHandler HPDMA1_Channel6_IRQHandler HPDMA1_Channel7_IRQHandler HPDMA1_Channel8_IRQHandler HPDMA1_Channel9_IRQHandler HPDMA1_Channel10_IRQHandler HPDMA1_Channel11_IRQHandler HPDMA1_Channel12_IRQHandler HPDMA1_Channel13_IRQHandler HPDMA1_Channel14_IRQHandler HPDMA1_Channel15_IRQHandler GPDMA1_Channel0_IRQHandler GPDMA1_Channel1_IRQHandler GPDMA1_Channel2_IRQHandler GPDMA1_Channel3_IRQHandler GPDMA1_Channel4_IRQHandler GPDMA1_Channel5_IRQHandler GPDMA1_Channel6_IRQHandler GPDMA1_Channel7_IRQHandler GPDMA1_Channel8_IRQHandler GPDMA1_Channel9_IRQHandler GPDMA1_Channel10_IRQHandler GPDMA1_Channel11_IRQHandler GPDMA1_Channel12_IRQHandler GPDMA1_Channel13_IRQHandler GPDMA1_Channel14_IRQHandler GPDMA1_Channel15_IRQHandler I2C1_EV_IRQHandler I2C1_ER_IRQHandler I2C2_EV_IRQHandler I2C2_ER_IRQHandler I2C3_EV_IRQHandler I2C3_ER_IRQHandler I2C4_EV_IRQHandler I2C4_ER_IRQHandler I3C1_EV_IRQHandler I3C1_ER_IRQHandler I3C2_EV_IRQHandler I3C2_ER_IRQHandler TIM1_BRK_IRQHandler TIM1_UP_IRQHandler TIM1_TRG_CCU_IRQHandler TIM1_CC_IRQHandler TIM2_IRQHandler TIM3_IRQHandler TIM4_IRQHandler TIM5_IRQHandler TIM6_IRQHandler TIM7_IRQHandler TIM8_BRK_IRQHandler TIM8_UP_IRQHandler TIM8_TRG_CCU_IRQHandler TIM8_CC_IRQHandler TIM9_IRQHandler TIM10_IRQHandler TIM11_IRQHandler TIM12_IRQHandler TIM13_IRQHandler TIM14_IRQHandler TIM15_IRQHandler TIM16_IRQHandler TIM17_IRQHandler TIM18_IRQHandler LPTIM1_IRQHandler LPTIM2_IRQHandler LPTIM3_IRQHandler LPTIM4_IRQHandler LPTIM5_IRQHandler ADF1_FLT0_IRQHandler MDF1_FLT0_IRQHandler MDF1_FLT1_IRQHandler MDF1_FLT2_IRQHandler MDF1_FLT3_IRQHandler MDF1_FLT4_IRQHandler MDF1_FLT5_IRQHandler SAI1_A_IRQHandler SAI1_B_IRQHandler SAI2_A_IRQHandler SAI2_B_IRQHandler SPDIFRX_IRQHandler SPI1_IRQHandler SPI2_IRQHandler SPI3_IRQHandler SPI4_IRQHandler SPI5_IRQHandler SPI6_IRQHandler USART1_IRQHandler USART2_IRQHandler USART3_IRQHandler UART4_IRQHandler UART5_IRQHandler USART6_IRQHandler UART7_IRQHandler UART8_IRQHandler UART9_IRQHandler USART10_IRQHandler LPUART1_IRQHandler XSPI1_IRQHandler XSPI2_IRQHandler XSPI3_IRQHandler FMC_IRQHandler SDMMC1_IRQHandler SDMMC2_IRQHandler UCPD1_IRQHandler USB1_OTG_HS_IRQHandler USB2_OTG_HS_IRQHandler ETH1_IRQHandler FDCAN1_IT0_IRQHandler FDCAN1_IT1_IRQHandler FDCAN2_IT0_IRQHandler FDCAN2_IT1_IRQHandler FDCAN3_IT0_IRQHandler FDCAN3_IT1_IRQHandler FDCAN_CU_IRQHandler MDIOS_IRQHandler DCMI_PSSI_IRQHandler WAKEUP_PIN_IRQHandler CTI_INT0_IRQHandler CTI_INT1_IRQHandler LTDC_UP_IRQHandler LTDC_UP_ERR_IRQHandler reset_handler Reset_Handler __SEGGER_init_zero __SEGGER_init_copy __SEGGER_init_ctors __aeabi_memclr __aeabi_memclr8 __aeabi_memclr4 __aeabi_memset8 __aeabi_memset4 __aeabi_memset memset

UNUSED INPUTS

Unused object files

No unused object files

ABSOLUTE LISTING

Section .vectors from stm32n657xx_Vectors.o, size=844, align=1024


_vectors:
g_pfnVectors:
  0x34180400:  34200000     DC.W       34200000               ; R_ARM_ABS32
  0x34180404:  34181A7D     DC.W       reset_handler
  0x34180408:  34181E49     DC.W       NMI_Handler
  0x3418040C:  34181E4D     DC.W       HardFault_Handler
  0x34180410:  34181E51     DC.W       MemManage_Handler
  0x34180414:  34181E55     DC.W       BusFault_Handler
  0x34180418:  34181E59     DC.W       UsageFault_Handler
  0x3418041C:  00           DC.B       0x00                     ; '\0'
  0x3418041D:  00           DC.B       0x00                     ; '\0'
  0x3418041E:  00           DC.B       0x00                     ; '\0'
  0x3418041F:  00           DC.B       0x00                     ; '\0'
  0x34180420:  00           DC.B       0x00                     ; '\0'
  0x34180421:  00           DC.B       0x00                     ; '\0'
  0x34180422:  00           DC.B       0x00                     ; '\0'
  0x34180423:  00           DC.B       0x00                     ; '\0'
  0x34180424:  00           DC.B       0x00                     ; '\0'
  0x34180425:  00           DC.B       0x00                     ; '\0'
  0x34180426:  00           DC.B       0x00                     ; '\0'
  0x34180427:  00           DC.B       0x00                     ; '\0'
  0x34180428:  00           DC.B       0x00                     ; '\0'
  0x34180429:  00           DC.B       0x00                     ; '\0'
  0x3418042A:  00           DC.B       0x00                     ; '\0'
  0x3418042B:  00           DC.B       0x00                     ; '\0'
  0x3418042C:  34181E5D     DC.W       SVC_Handler
  0x34180430:  34181E61     DC.W       DebugMon_Handler
  0x34180434:  00           DC.B       0x00                     ; '\0'
  0x34180435:  00           DC.B       0x00                     ; '\0'
  0x34180436:  00           DC.B       0x00                     ; '\0'
  0x34180437:  00           DC.B       0x00                     ; '\0'
  0x34180438:  34181E65     DC.W       PendSV_Handler
  0x3418043C:  34180759     DC.W       SysTick_Handler
  0x34180440:  34181CE3     DC.W       PVD_PVM_IRQHandler
  0x34180444:  00           DC.B       0x00                     ; '\0'
  0x34180445:  00           DC.B       0x00                     ; '\0'
  0x34180446:  00           DC.B       0x00                     ; '\0'
  0x34180447:  00           DC.B       0x00                     ; '\0'
  0x34180448:  34181D07     DC.W       DTS_IRQHandler
  0x3418044C:  34181D4B     DC.W       RCC_IRQHandler
  0x34180450:  34181E3B     DC.W       LOCKUP_IRQHandler
  0x34180454:  34181E47     DC.W       CACHE_ECC_IRQHandler
  0x34180458:  34181E4B     DC.W       TCM_ECC_IRQHandler
  0x3418045C:  34181E4F     DC.W       BCK_ECC_IRQHandler
  0x34180460:  34181E53     DC.W       FPU_IRQHandler
  0x34180464:  00           DC.B       0x00                     ; '\0'
  0x34180465:  00           DC.B       0x00                     ; '\0'
  0x34180466:  00           DC.B       0x00                     ; '\0'
  0x34180467:  00           DC.B       0x00                     ; '\0'
  0x34180468:  34181E57     DC.W       RTC_S_IRQHandler
  0x3418046C:  34181E5B     DC.W       TAMP_IRQHandler
  0x34180470:  34181E5F     DC.W       RIFSC_TAMPER_IRQHandler
  0x34180474:  34181E63     DC.W       IAC_IRQHandler
  0x34180478:  34181E67     DC.W       RCC_S_IRQHandler
  0x3418047C:  00           DC.B       0x00                     ; '\0'
  0x3418047D:  00           DC.B       0x00                     ; '\0'
  0x3418047E:  00           DC.B       0x00                     ; '\0'
  0x3418047F:  00           DC.B       0x00                     ; '\0'
  0x34180480:  34182067     DC.W       RTC_IRQHandler
  0x34180484:  00           DC.B       0x00                     ; '\0'
  0x34180485:  00           DC.B       0x00                     ; '\0'
  0x34180486:  00           DC.B       0x00                     ; '\0'
  0x34180487:  00           DC.B       0x00                     ; '\0'
  0x34180488:  341820E7     DC.W       IWDG_IRQHandler
  0x3418048C:  34182103     DC.W       WWDG_IRQHandler
  0x34180490:  3418213F     DC.W       EXTI0_IRQHandler
  0x34180494:  3418217F     DC.W       EXTI1_IRQHandler
  0x34180498:  341821BF     DC.W       EXTI2_IRQHandler
  0x3418049C:  3418220F     DC.W       EXTI3_IRQHandler
  0x341804A0:  34182277     DC.W       EXTI4_IRQHandler
  0x341804A4:  341822EB     DC.W       EXTI5_IRQHandler
  0x341804A8:  3418235F     DC.W       EXTI6_IRQHandler
  0x341804AC:  34182373     DC.W       EXTI7_IRQHandler
  0x341804B0:  34182383     DC.W       EXTI8_IRQHandler
  0x341804B4:  34182E7F     DC.W       EXTI9_IRQHandler
  0x341804B8:  34182E9F     DC.W       EXTI10_IRQHandler
  0x341804BC:  34182EAF     DC.W       EXTI11_IRQHandler
  0x341804C0:  34182ECF     DC.W       EXTI12_IRQHandler
  0x341804C4:  34182EDF     DC.W       EXTI13_IRQHandler
  0x341804C8:  34182EEF     DC.W       EXTI14_IRQHandler
  0x341804CC:  34182EFF     DC.W       EXTI15_IRQHandler
  0x341804D0:  34182F0F     DC.W       SAES_IRQHandler
  0x341804D4:  34182FEB     DC.W       CRYP_IRQHandler
  0x341804D8:  3418333B     DC.W       PKA_IRQHandler
  0x341804DC:  3418339B     DC.W       HASH_IRQHandler
  0x341804E0:  34183D5F     DC.W       RNG_IRQHandler
  0x341804E4:  00           DC.B       0x00                     ; '\0'
  0x341804E5:  00           DC.B       0x00                     ; '\0'
  0x341804E6:  00           DC.B       0x00                     ; '\0'
  0x341804E7:  00           DC.B       0x00                     ; '\0'
  0x341804E8:  34183E4B     DC.W       MCE1_IRQHandler
  0x341804EC:  34183E5B     DC.W       MCE2_IRQHandler
  0x341804F0:  34183F4B     DC.W       MCE3_IRQHandler
  0x341804F4:  34183F63     DC.W       MCE4_IRQHandler
  0x341804F8:  34183FE7     DC.W       ADC1_2_IRQHandler
  0x341804FC:  3418406B     DC.W       CSI_IRQHandler
  0x34180500:  341840EF     DC.W       DCMIPP_IRQHandler
  0x34180504:  00           DC.B       0x00                     ; '\0'
  0x34180505:  00           DC.B       0x00                     ; '\0'
  0x34180506:  00           DC.B       0x00                     ; '\0'
  0x34180507:  00           DC.B       0x00                     ; '\0'
  0x34180508:  00           DC.B       0x00                     ; '\0'
  0x34180509:  00           DC.B       0x00                     ; '\0'
  0x3418050A:  00           DC.B       0x00                     ; '\0'
  0x3418050B:  00           DC.B       0x00                     ; '\0'
  0x3418050C:  00           DC.B       0x00                     ; '\0'
  0x3418050D:  00           DC.B       0x00                     ; '\0'
  0x3418050E:  00           DC.B       0x00                     ; '\0'
  0x3418050F:  00           DC.B       0x00                     ; '\0'
  0x34180510:  34184173     DC.W       PAHB_ERR_IRQHandler
  0x34180514:  34184175     DC.W       NPU0_IRQHandler
  0x34180518:  34184177     DC.W       NPU1_IRQHandler
  0x3418051C:  34184179     DC.W       NPU2_IRQHandler
  0x34180520:  3418417B     DC.W       NPU3_IRQHandler
  0x34180524:  3418417D     DC.W       CACHEAXI_IRQHandler
  0x34180528:  3418417F     DC.W       LTDC_LO_IRQHandler
  0x3418052C:  34184181     DC.W       LTDC_LO_ERR_IRQHandler
  0x34180530:  34184183     DC.W       DMA2D_IRQHandler
  0x34180534:  34184185     DC.W       JPEG_IRQHandler
  0x34180538:  34184187     DC.W       VENC_IRQHandler
  0x3418053C:  34184189     DC.W       GFXMMU_IRQHandler
  0x34180540:  3418418B     DC.W       GFXTIM_IRQHandler
  0x34180544:  3418418D     DC.W       GPU2D_IRQHandler
  0x34180548:  3418418F     DC.W       GPU2D_ER_IRQHandler
  0x3418054C:  34184191     DC.W       ICACHE_IRQHandler
  0x34180550:  34184193     DC.W       HPDMA1_Channel0_IRQHandler
  0x34180554:  34184195     DC.W       HPDMA1_Channel1_IRQHandler
  0x34180558:  34184197     DC.W       HPDMA1_Channel2_IRQHandler
  0x3418055C:  34184199     DC.W       HPDMA1_Channel3_IRQHandler
  0x34180560:  3418419B     DC.W       HPDMA1_Channel4_IRQHandler
  0x34180564:  3418419D     DC.W       HPDMA1_Channel5_IRQHandler
  0x34180568:  3418419F     DC.W       HPDMA1_Channel6_IRQHandler
  0x3418056C:  341841A1     DC.W       HPDMA1_Channel7_IRQHandler
  0x34180570:  341841A3     DC.W       HPDMA1_Channel8_IRQHandler
  0x34180574:  341841A5     DC.W       HPDMA1_Channel9_IRQHandler
  0x34180578:  341841A7     DC.W       HPDMA1_Channel10_IRQHandler
  0x3418057C:  341841A9     DC.W       HPDMA1_Channel11_IRQHandler
  0x34180580:  341841AB     DC.W       HPDMA1_Channel12_IRQHandler
  0x34180584:  341841AD     DC.W       HPDMA1_Channel13_IRQHandler
  0x34180588:  341841AF     DC.W       HPDMA1_Channel14_IRQHandler
  0x3418058C:  341841B1     DC.W       HPDMA1_Channel15_IRQHandler
  0x34180590:  341841B3     DC.W       GPDMA1_Channel0_IRQHandler
  0x34180594:  341841B5     DC.W       GPDMA1_Channel1_IRQHandler
  0x34180598:  341841B7     DC.W       GPDMA1_Channel2_IRQHandler
  0x3418059C:  341841B9     DC.W       GPDMA1_Channel3_IRQHandler
  0x341805A0:  341841BB     DC.W       GPDMA1_Channel4_IRQHandler
  0x341805A4:  341841BD     DC.W       GPDMA1_Channel5_IRQHandler
  0x341805A8:  341841BF     DC.W       GPDMA1_Channel6_IRQHandler
  0x341805AC:  341841C1     DC.W       GPDMA1_Channel7_IRQHandler
  0x341805B0:  341841C3     DC.W       GPDMA1_Channel8_IRQHandler
  0x341805B4:  341841C5     DC.W       GPDMA1_Channel9_IRQHandler
  0x341805B8:  341841C7     DC.W       GPDMA1_Channel10_IRQHandler
  0x341805BC:  341841C9     DC.W       GPDMA1_Channel11_IRQHandler
  0x341805C0:  341841CB     DC.W       GPDMA1_Channel12_IRQHandler
  0x341805C4:  341841CD     DC.W       GPDMA1_Channel13_IRQHandler
  0x341805C8:  341841CF     DC.W       GPDMA1_Channel14_IRQHandler
  0x341805CC:  341841D1     DC.W       GPDMA1_Channel15_IRQHandler
  0x341805D0:  341841D3     DC.W       I2C1_EV_IRQHandler
  0x341805D4:  341841D5     DC.W       I2C1_ER_IRQHandler
  0x341805D8:  341841D7     DC.W       I2C2_EV_IRQHandler
  0x341805DC:  341841D9     DC.W       I2C2_ER_IRQHandler
  0x341805E0:  341841DB     DC.W       I2C3_EV_IRQHandler
  0x341805E4:  341841DD     DC.W       I2C3_ER_IRQHandler
  0x341805E8:  341841DF     DC.W       I2C4_EV_IRQHandler
  0x341805EC:  341841E1     DC.W       I2C4_ER_IRQHandler
  0x341805F0:  341841E3     DC.W       I3C1_EV_IRQHandler
  0x341805F4:  341841E5     DC.W       I3C1_ER_IRQHandler
  0x341805F8:  341841E7     DC.W       I3C2_EV_IRQHandler
  0x341805FC:  341841E9     DC.W       I3C2_ER_IRQHandler
  0x34180600:  341841EB     DC.W       TIM1_BRK_IRQHandler
  0x34180604:  341841ED     DC.W       TIM1_UP_IRQHandler
  0x34180608:  341841EF     DC.W       TIM1_TRG_CCU_IRQHandler
  0x3418060C:  341841F1     DC.W       TIM1_CC_IRQHandler
  0x34180610:  341841F3     DC.W       TIM2_IRQHandler
  0x34180614:  341841F5     DC.W       TIM3_IRQHandler
  0x34180618:  341841F7     DC.W       TIM4_IRQHandler
  0x3418061C:  341841F9     DC.W       TIM5_IRQHandler
  0x34180620:  341841FB     DC.W       TIM6_IRQHandler
  0x34180624:  341841FD     DC.W       TIM7_IRQHandler
  0x34180628:  341841FF     DC.W       TIM8_BRK_IRQHandler
  0x3418062C:  34184201     DC.W       TIM8_UP_IRQHandler
  0x34180630:  34184203     DC.W       TIM8_TRG_CCU_IRQHandler
  0x34180634:  34184205     DC.W       TIM8_CC_IRQHandler
  0x34180638:  34184207     DC.W       TIM9_IRQHandler
  0x3418063C:  34184209     DC.W       TIM10_IRQHandler
  0x34180640:  3418420B     DC.W       TIM11_IRQHandler
  0x34180644:  3418420D     DC.W       TIM12_IRQHandler
  0x34180648:  3418420F     DC.W       TIM13_IRQHandler
  0x3418064C:  34184211     DC.W       TIM14_IRQHandler
  0x34180650:  34184213     DC.W       TIM15_IRQHandler
  0x34180654:  34184215     DC.W       TIM16_IRQHandler
  0x34180658:  34184217     DC.W       TIM17_IRQHandler
  0x3418065C:  34184219     DC.W       TIM18_IRQHandler
  0x34180660:  3418421B     DC.W       LPTIM1_IRQHandler
  0x34180664:  3418421D     DC.W       LPTIM2_IRQHandler
  0x34180668:  3418421F     DC.W       LPTIM3_IRQHandler
  0x3418066C:  34184221     DC.W       LPTIM4_IRQHandler
  0x34180670:  34184223     DC.W       LPTIM5_IRQHandler
  0x34180674:  34184225     DC.W       ADF1_FLT0_IRQHandler
  0x34180678:  34184227     DC.W       MDF1_FLT0_IRQHandler
  0x3418067C:  34184229     DC.W       MDF1_FLT1_IRQHandler
  0x34180680:  3418422B     DC.W       MDF1_FLT2_IRQHandler
  0x34180684:  3418422D     DC.W       MDF1_FLT3_IRQHandler
  0x34180688:  3418422F     DC.W       MDF1_FLT4_IRQHandler
  0x3418068C:  34184231     DC.W       MDF1_FLT5_IRQHandler
  0x34180690:  34184233     DC.W       SAI1_A_IRQHandler
  0x34180694:  34184235     DC.W       SAI1_B_IRQHandler
  0x34180698:  34184237     DC.W       SAI2_A_IRQHandler
  0x3418069C:  34184239     DC.W       SAI2_B_IRQHandler
  0x341806A0:  3418423B     DC.W       SPDIFRX_IRQHandler
  0x341806A4:  3418423D     DC.W       SPI1_IRQHandler
  0x341806A8:  3418423F     DC.W       SPI2_IRQHandler
  0x341806AC:  34184241     DC.W       SPI3_IRQHandler
  0x341806B0:  34184243     DC.W       SPI4_IRQHandler
  0x341806B4:  34184245     DC.W       SPI5_IRQHandler
  0x341806B8:  34184247     DC.W       SPI6_IRQHandler
  0x341806BC:  34184249     DC.W       USART1_IRQHandler
  0x341806C0:  3418424B     DC.W       USART2_IRQHandler
  0x341806C4:  3418424D     DC.W       USART3_IRQHandler
  0x341806C8:  3418424F     DC.W       UART4_IRQHandler
  0x341806CC:  34184251     DC.W       UART5_IRQHandler
  0x341806D0:  34184253     DC.W       USART6_IRQHandler
  0x341806D4:  34184255     DC.W       UART7_IRQHandler
  0x341806D8:  34184257     DC.W       UART8_IRQHandler
  0x341806DC:  34184259     DC.W       UART9_IRQHandler
  0x341806E0:  3418425B     DC.W       USART10_IRQHandler
  0x341806E4:  3418425D     DC.W       LPUART1_IRQHandler
  0x341806E8:  3418425F     DC.W       XSPI1_IRQHandler
  0x341806EC:  34184261     DC.W       XSPI2_IRQHandler
  0x341806F0:  34184263     DC.W       XSPI3_IRQHandler
  0x341806F4:  34184265     DC.W       FMC_IRQHandler
  0x341806F8:  34184267     DC.W       SDMMC1_IRQHandler
  0x341806FC:  34184269     DC.W       SDMMC2_IRQHandler
  0x34180700:  3418426B     DC.W       UCPD1_IRQHandler
  0x34180704:  3418426D     DC.W       USB1_OTG_HS_IRQHandler
  0x34180708:  3418426F     DC.W       USB2_OTG_HS_IRQHandler
  0x3418070C:  34184271     DC.W       ETH1_IRQHandler
  0x34180710:  34184273     DC.W       FDCAN1_IT0_IRQHandler
  0x34180714:  34184275     DC.W       FDCAN1_IT1_IRQHandler
  0x34180718:  34184277     DC.W       FDCAN2_IT0_IRQHandler
  0x3418071C:  34184279     DC.W       FDCAN2_IT1_IRQHandler
  0x34180720:  3418427B     DC.W       FDCAN3_IT0_IRQHandler
  0x34180724:  3418427D     DC.W       FDCAN3_IT1_IRQHandler
  0x34180728:  3418427F     DC.W       FDCAN_CU_IRQHandler
  0x3418072C:  34184281     DC.W       MDIOS_IRQHandler
  0x34180730:  34184283     DC.W       DCMI_PSSI_IRQHandler
  0x34180734:  34184285     DC.W       WAKEUP_PIN_IRQHandler
  0x34180738:  34184287     DC.W       CTI_INT0_IRQHandler
  0x3418073C:  34184289     DC.W       CTI_INT1_IRQHandler
  0x34180740:  00           DC.B       0x00                     ; '\0'
  0x34180741:  00           DC.B       0x00                     ; '\0'
  0x34180742:  00           DC.B       0x00                     ; '\0'
  0x34180743:  00           DC.B       0x00                     ; '\0'
  0x34180744:  3418428B     DC.W       LTDC_UP_IRQHandler
  0x34180748:  3418428D     DC.W       LTDC_UP_ERR_IRQHandler

Section .text.Error_Handler from blto2_FSBL_lto.o, size=4, align=4


Error_Handler:
_vectors_end:
  0x3418074C:  B672         CPSID      i

.L1:
  0x3418074E:  E7FE         B          46L1                      ; 0x3418074E

Section .text.HAL_MspInit from blto2_FSBL_lto.o, size=8, align=4


HAL_MspInit:
  0x34180750:  B580         PUSH       123R7, LR}
  0x34180752:  F001 FE05    BL         HAL_PWREx_EnableVddIO3   ; 0x34182360
  0x34180756:  BD80         POP        123R7, PC}

Section .text.SysTick_Handler from blto2_FSBL_lto.o, size=8, align=4


SysTick_Handler:
  0x34180758:  B580         PUSH       123R7, LR}
  0x3418075A:  F001 FCC5    BL         HAL_IncTick              ; 0x341820E8
  0x3418075E:  BD80         POP        123R7, PC}

Section .text.SystemCoreClockUpdate from blto2_FSBL_lto.o, size=828, align=4


SystemCoreClockUpdate:
  0x34180760:  B08E         SUB        SP, SP, #56
  0x34180762:  2000         MOVS       R0, #0
  0x34180764:  900D         STR        R0, [SP, #52]
  0x34180766:  900C         STR        R0, [SP, #48]
  0x34180768:  900B         STR        R0, [SP, #44]
  0x3418076A:  900A         STR        R0, [SP, #40]
  0x3418076C:  9009         STR        R0, [SP, #36]
  0x3418076E:  9008         STR        R0, [SP, #32]
  0x34180770:  F248 0020    MOVW       R0, #0x8020
  0x34180774:  F2C5 6002    MOVT       R0, #0x5602
  0x34180778:  6800         LDR        R0, [R0]
  0x3418077A:  F400 1040    AND        R0, R0, #0x300000
  0x3418077E:  4601         MOV        R1, R0
  0x34180780:  9102         STR        R1, [SP, #8]
  0x34180782:  B160         CBZ        R0, .L1                  ; 0x3418079E
  0x34180784:  9802         LDR        R0, [SP, #8]
  0x34180786:  F5B0 1F80    CMP.W      R0, #0x100000
  0x3418078A:  D016         BEQ        46L2                      ; 0x341807BA
  0x3418078C:  9802         LDR        R0, [SP, #8]
  0x3418078E:  F5B0 1F00    CMP.W      R0, #0x200000
  0x34180792:  D026         BEQ        46L5                      ; 0x341807E2
  0x34180794:  9802         LDR        R0, [SP, #8]
  0x34180796:  F5B0 1F40    CMP.W      R0, #0x300000
  0x3418079A:  D028         BEQ        46L6                      ; 0x341807EE
  0x3418079C:  E174         B          46L23                     ; 0x34180A88

.L1:
  0x3418079E:  F248 0048    MOVW       R0, #0x8048
  0x341807A2:  F2C5 6002    MOVT       R0, #0x5602
  0x341807A6:  6800         LDR        R0, [R0]
  0x341807A8:  F3C0 11C1    UBFX       R1, R0, #7, #2
  0x341807AC:  F249 0000    MOVW       R0, #0x9000
  0x341807B0:  F2C0 30D0    MOVT       R0, #0x03D0
  0x341807B4:  40C8         LSRS       R0, R1
  0x341807B6:  900D         STR        R0, [SP, #52]
  0x341807B8:  E166         B          46L23                     ; 0x34180A88

.L2:
  0x341807BA:  F248 0044    MOVW       R0, #0x8044
  0x341807BE:  F2C5 6002    MOVT       R0, #0x5602
  0x341807C2:  6800         LDR        R0, [R0]
  0x341807C4:  0580         LSLS       R0, R0, #22
  0x341807C6:  2800         CMP        R0, #0
  0x341807C8:  D405         BMI        46L3                      ; 0x341807D6
  0x341807CA:  F640 1000    MOVW       R0, #0x0900
  0x341807CE:  F2C0 003D    MOVT       R0, #61
  0x341807D2:  900D         STR        R0, [SP, #52]
  0x341807D4:  E004         B          46L4                      ; 0x341807E0

.L3:
  0x341807D6:  F242 4000    MOVW       R0, #0x2400
  0x341807DA:  F2C0 00F4    MOVT       R0, #244
  0x341807DE:  900D         STR        R0, [SP, #52]

.L4:
  0x341807E0:  E152         B          46L23                     ; 0x34180A88

.L5:
  0x341807E2:  F646 4000    MOVW       R0, #0x6C00
  0x341807E6:  F2C0 20DC    MOVT       R0, #0x02DC
  0x341807EA:  900D         STR        R0, [SP, #52]
  0x341807EC:  E14C         B          46L23                     ; 0x34180A88

.L6:
  0x341807EE:  F248 00C4    MOVW       R0, #0x80C4
  0x341807F2:  F2C5 6002    MOVT       R0, #0x5602
  0x341807F6:  6800         LDR        R0, [R0]
  0x341807F8:  F000 5040    AND        R0, R0, #0x30000000
  0x341807FC:  4601         MOV        R1, R0
  0x341807FE:  9101         STR        R1, [SP, #4]
  0x34180800:  B140         CBZ        R0, .L7                  ; 0x34180814
  0x34180802:  9801         LDR        R0, [SP, #4]
  0x34180804:  F1B0 5F80    CMP.W      R0, #0x10000000
  0x34180808:  D033         BEQ        46L9                      ; 0x34180872
  0x3418080A:  9801         LDR        R0, [SP, #4]
  0x3418080C:  F1B0 5F00    CMP.W      R0, #0x20000000
  0x34180810:  D05E         BEQ        46L11                     ; 0x341808D0
  0x34180812:  E08C         B          46L13                     ; 0x3418092E

.L7:
  0x34180814:  F248 0080    MOVW       R0, #0x8080
  0x34180818:  F2C5 6002    MOVT       R0, #0x5602
  0x3418081C:  6800         LDR        R0, [R0]
  0x3418081E:  9007         STR        R0, [SP, #28]
  0x34180820:  9807         LDR        R0, [SP, #28]
  0x34180822:  F000 40E0    AND        R0, R0, #0x70000000
  0x34180826:  9006         STR        R0, [SP, #24]
  0x34180828:  9807         LDR        R0, [SP, #28]
  0x3418082A:  F000 6000    AND        R0, R0, #0x08000000
  0x3418082E:  9005         STR        R0, [SP, #20]
  0x34180830:  9805         LDR        R0, [SP, #20]
  0x34180832:  B9E8         CBNZ       R0, .L8                  ; 0x34180870
  0x34180834:  9807         LDR        R0, [SP, #28]
  0x34180836:  F3C0 5005    UBFX       R0, R0, #20, #6
  0x3418083A:  900C         STR        R0, [SP, #48]
  0x3418083C:  9807         LDR        R0, [SP, #28]
  0x3418083E:  F3C0 200B    UBFX       R0, R0, #8, #12
  0x34180842:  900B         STR        R0, [SP, #44]
  0x34180844:  F248 0084    MOVW       R0, #0x8084
  0x34180848:  F2C5 6002    MOVT       R0, #0x5602
  0x3418084C:  6800         LDR        R0, [R0]
  0x3418084E:  F020 407F    BIC        R0, R0, #0xFF000000
  0x34180852:  900A         STR        R0, [SP, #40]
  0x34180854:  F248 0088    MOVW       R0, #0x8088
  0x34180858:  F2C5 6002    MOVT       R0, #0x5602
  0x3418085C:  6800         LDR        R0, [R0]
  0x3418085E:  9007         STR        R0, [SP, #28]
  0x34180860:  9807         LDR        R0, [SP, #28]
  0x34180862:  F3C0 60C2    UBFX       R0, R0, #27, #3
  0x34180866:  9009         STR        R0, [SP, #36]
  0x34180868:  9807         LDR        R0, [SP, #28]
  0x3418086A:  F3C0 6002    UBFX       R0, R0, #24, #3
  0x3418086E:  9008         STR        R0, [SP, #32]

.L8:
  0x34180870:  E08B         B          46L14                     ; 0x3418098A

.L9:
  0x34180872:  F248 0090    MOVW       R0, #0x8090
  0x34180876:  F2C5 6002    MOVT       R0, #0x5602
  0x3418087A:  6800         LDR        R0, [R0]
  0x3418087C:  9007         STR        R0, [SP, #28]
  0x3418087E:  9807         LDR        R0, [SP, #28]
  0x34180880:  F000 40E0    AND        R0, R0, #0x70000000
  0x34180884:  9006         STR        R0, [SP, #24]
  0x34180886:  9807         LDR        R0, [SP, #28]
  0x34180888:  F000 6000    AND        R0, R0, #0x08000000
  0x3418088C:  9005         STR        R0, [SP, #20]
  0x3418088E:  9805         LDR        R0, [SP, #20]
  0x34180890:  B9E8         CBNZ       R0, .L10                 ; 0x341808CE
  0x34180892:  9807         LDR        R0, [SP, #28]
  0x34180894:  F3C0 5005    UBFX       R0, R0, #20, #6
  0x34180898:  900C         STR        R0, [SP, #48]
  0x3418089A:  9807         LDR        R0, [SP, #28]
  0x3418089C:  F3C0 200B    UBFX       R0, R0, #8, #12
  0x341808A0:  900B         STR        R0, [SP, #44]
  0x341808A2:  F248 0094    MOVW       R0, #0x8094
  0x341808A6:  F2C5 6002    MOVT       R0, #0x5602
  0x341808AA:  6800         LDR        R0, [R0]
  0x341808AC:  F020 407F    BIC        R0, R0, #0xFF000000
  0x341808B0:  900A         STR        R0, [SP, #40]
  0x341808B2:  F248 0098    MOVW       R0, #0x8098
  0x341808B6:  F2C5 6002    MOVT       R0, #0x5602
  0x341808BA:  6800         LDR        R0, [R0]
  0x341808BC:  9007         STR        R0, [SP, #28]
  0x341808BE:  9807         LDR        R0, [SP, #28]
  0x341808C0:  F3C0 60C2    UBFX       R0, R0, #27, #3
  0x341808C4:  9009         STR        R0, [SP, #36]
  0x341808C6:  9807         LDR        R0, [SP, #28]
  0x341808C8:  F3C0 6002    UBFX       R0, R0, #24, #3
  0x341808CC:  9008         STR        R0, [SP, #32]

.L10:
  0x341808CE:  E05C         B          46L14                     ; 0x3418098A

.L11:
  0x341808D0:  F248 00A0    MOVW       R0, #0x80A0
  0x341808D4:  F2C5 6002    MOVT       R0, #0x5602
  0x341808D8:  6800         LDR        R0, [R0]
  0x341808DA:  9007         STR        R0, [SP, #28]
  0x341808DC:  9807         LDR        R0, [SP, #28]
  0x341808DE:  F000 40E0    AND        R0, R0, #0x70000000
  0x341808E2:  9006         STR        R0, [SP, #24]
  0x341808E4:  9807         LDR        R0, [SP, #28]
  0x341808E6:  F000 6000    AND        R0, R0, #0x08000000
  0x341808EA:  9005         STR        R0, [SP, #20]
  0x341808EC:  9805         LDR        R0, [SP, #20]
  0x341808EE:  B9E8         CBNZ       R0, .L12                 ; 0x3418092C
  0x341808F0:  9807         LDR        R0, [SP, #28]
  0x341808F2:  F3C0 5005    UBFX       R0, R0, #20, #6
  0x341808F6:  900C         STR        R0, [SP, #48]
  0x341808F8:  9807         LDR        R0, [SP, #28]
  0x341808FA:  F3C0 200B    UBFX       R0, R0, #8, #12
  0x341808FE:  900B         STR        R0, [SP, #44]
  0x34180900:  F248 00A4    MOVW       R0, #0x80A4
  0x34180904:  F2C5 6002    MOVT       R0, #0x5602
  0x34180908:  6800         LDR        R0, [R0]
  0x3418090A:  F020 407F    BIC        R0, R0, #0xFF000000
  0x3418090E:  900A         STR        R0, [SP, #40]
  0x34180910:  F248 00A8    MOVW       R0, #0x80A8
  0x34180914:  F2C5 6002    MOVT       R0, #0x5602
  0x34180918:  6800         LDR        R0, [R0]
  0x3418091A:  9007         STR        R0, [SP, #28]
  0x3418091C:  9807         LDR        R0, [SP, #28]
  0x3418091E:  F3C0 60C2    UBFX       R0, R0, #27, #3
  0x34180922:  9009         STR        R0, [SP, #36]
  0x34180924:  9807         LDR        R0, [SP, #28]
  0x34180926:  F3C0 6002    UBFX       R0, R0, #24, #3
  0x3418092A:  9008         STR        R0, [SP, #32]

.L12:
  0x3418092C:  E02D         B          46L14                     ; 0x3418098A

.L13:
  0x3418092E:  F248 00B0    MOVW       R0, #0x80B0
  0x34180932:  F2C5 6002    MOVT       R0, #0x5602
  0x34180936:  6800         LDR        R0, [R0]
  0x34180938:  9007         STR        R0, [SP, #28]
  0x3418093A:  9807         LDR        R0, [SP, #28]
  0x3418093C:  F000 40E0    AND        R0, R0, #0x70000000
  0x34180940:  9006         STR        R0, [SP, #24]
  0x34180942:  9807         LDR        R0, [SP, #28]
  0x34180944:  F000 6000    AND        R0, R0, #0x08000000
  0x34180948:  9005         STR        R0, [SP, #20]
  0x3418094A:  9805         LDR        R0, [SP, #20]
  0x3418094C:  B9E8         CBNZ       R0, .L14                 ; 0x3418098A
  0x3418094E:  9807         LDR        R0, [SP, #28]
  0x34180950:  F3C0 5005    UBFX       R0, R0, #20, #6
  0x34180954:  900C         STR        R0, [SP, #48]
  0x34180956:  9807         LDR        R0, [SP, #28]
  0x34180958:  F3C0 200B    UBFX       R0, R0, #8, #12
  0x3418095C:  900B         STR        R0, [SP, #44]
  0x3418095E:  F248 00B4    MOVW       R0, #0x80B4
  0x34180962:  F2C5 6002    MOVT       R0, #0x5602
  0x34180966:  6800         LDR        R0, [R0]
  0x34180968:  F020 407F    BIC        R0, R0, #0xFF000000
  0x3418096C:  900A         STR        R0, [SP, #40]
  0x3418096E:  F248 00B8    MOVW       R0, #0x80B8
  0x34180972:  F2C5 6002    MOVT       R0, #0x5602
  0x34180976:  6800         LDR        R0, [R0]
  0x34180978:  9007         STR        R0, [SP, #28]
  0x3418097A:  9807         LDR        R0, [SP, #28]
  0x3418097C:  F3C0 60C2    UBFX       R0, R0, #27, #3
  0x34180980:  9009         STR        R0, [SP, #36]
  0x34180982:  9807         LDR        R0, [SP, #28]
  0x34180984:  F3C0 6002    UBFX       R0, R0, #24, #3
  0x34180988:  9008         STR        R0, [SP, #32]

.L14:
  0x3418098A:  9806         LDR        R0, [SP, #24]
  0x3418098C:  9000         STR        R0, [SP, #0]
  0x3418098E:  B160         CBZ        R0, .L15                 ; 0x341809AA
  0x34180990:  9800         LDR        R0, [SP, #0]
  0x34180992:  F1B0 5F80    CMP.W      R0, #0x10000000
  0x34180996:  D016         BEQ        46L16                     ; 0x341809C6
  0x34180998:  9800         LDR        R0, [SP, #0]
  0x3418099A:  F1B0 5F00    CMP.W      R0, #0x20000000
  0x3418099E:  D026         BEQ        46L19                     ; 0x341809EE
  0x341809A0:  9800         LDR        R0, [SP, #0]
  0x341809A2:  F1B0 5F40    CMP.W      R0, #0x30000000
  0x341809A6:  D028         BEQ        46L20                     ; 0x341809FA
  0x341809A8:  E02D         B          46L21                     ; 0x34180A06

.L15:
  0x341809AA:  F248 0048    MOVW       R0, #0x8048
  0x341809AE:  F2C5 6002    MOVT       R0, #0x5602
  0x341809B2:  6800         LDR        R0, [R0]
  0x341809B4:  F3C0 11C1    UBFX       R1, R0, #7, #2
  0x341809B8:  F249 0000    MOVW       R0, #0x9000
  0x341809BC:  F2C0 30D0    MOVT       R0, #0x03D0
  0x341809C0:  40C8         LSRS       R0, R1
  0x341809C2:  900D         STR        R0, [SP, #52]
  0x341809C4:  E01F         B          46L21                     ; 0x34180A06

.L16:
  0x341809C6:  F248 0044    MOVW       R0, #0x8044
  0x341809CA:  F2C5 6002    MOVT       R0, #0x5602
  0x341809CE:  6800         LDR        R0, [R0]
  0x341809D0:  0580         LSLS       R0, R0, #22
  0x341809D2:  2800         CMP        R0, #0
  0x341809D4:  D405         BMI        46L17                     ; 0x341809E2
  0x341809D6:  F640 1000    MOVW       R0, #0x0900
  0x341809DA:  F2C0 003D    MOVT       R0, #61
  0x341809DE:  900D         STR        R0, [SP, #52]
  0x341809E0:  E004         B          46L18                     ; 0x341809EC

.L17:
  0x341809E2:  F242 4000    MOVW       R0, #0x2400
  0x341809E6:  F2C0 00F4    MOVT       R0, #244
  0x341809EA:  900D         STR        R0, [SP, #52]

.L18:
  0x341809EC:  E00B         B          46L21                     ; 0x34180A06

.L19:
  0x341809EE:  F646 4000    MOVW       R0, #0x6C00
  0x341809F2:  F2C0 20DC    MOVT       R0, #0x02DC
  0x341809F6:  900D         STR        R0, [SP, #52]
  0x341809F8:  E005         B          46L21                     ; 0x34180A06

.L20:
  0x341809FA:  F248 0000    MOVW       R0, #0x8000
  0x341809FE:  F2C0 00BB    MOVT       R0, #187
  0x34180A02:  900D         STR        R0, [SP, #52]
  0x34180A04:  E7FF         B          46L21                     ; 0x34180A06

.L21:
  0x34180A06:  9805         LDR        R0, [SP, #20]
  0x34180A08:  BB68         CBNZ       R0, .L22                 ; 0x34180A66
  0x34180A0A:  ED9D 0A0D    VLDR       S0, [SP, #52]
  0x34180A0E:  EEB8 0A40    VCVT.F32.U32 S0, S0
  0x34180A12:  ED9D 1A0B    VLDR       S2, [SP, #44]
  0x34180A16:  EEB8 1A41    VCVT.F32.U32 S2, S2
  0x34180A1A:  ED9D 2A0A    VLDR       S4, [SP, #40]
  0x34180A1E:  EEB8 2A42    VCVT.F32.U32 S4, S4
  0x34180A22:  ED9F 3A1D    VLDR       S6, =0x33800000          ; [PC, #116] [0x34180A98]
  0x34180A26:  EE22 2A03    VMUL.F32   S4, S4, S6
  0x34180A2A:  EE31 1A02    VADD.F32   S2, S2, S4
  0x34180A2E:  EE20 0A01    VMUL.F32   S0, S0, S2
  0x34180A32:  ED9D 1A0C    VLDR       S2, [SP, #48]
  0x34180A36:  EEB8 1A41    VCVT.F32.U32 S2, S2
  0x34180A3A:  EE80 0A01    VDIV.F32   S0, S0, S2
  0x34180A3E:  ED8D 0A03    VSTR       S0, [SP, #12]
  0x34180A42:  ED9D 0A03    VLDR       S0, [SP, #12]
  0x34180A46:  ED9D 1A09    VLDR       S2, [SP, #36]
  0x34180A4A:  EEB8 1A41    VCVT.F32.U32 S2, S2
  0x34180A4E:  ED9D 2A08    VLDR       S4, [SP, #32]
  0x34180A52:  EEB8 2A42    VCVT.F32.U32 S4, S4
  0x34180A56:  EE21 1A02    VMUL.F32   S2, S2, S4
  0x34180A5A:  EE80 0A01    VDIV.F32   S0, S0, S2
  0x34180A5E:  EEBC 0AC0    VCVT.U32.F32 S0, S0
  0x34180A62:  ED8D 0A0D    VSTR       S0, [SP, #52]

.L22:
  0x34180A66:  F248 00C4    MOVW       R0, #0x80C4
  0x34180A6A:  F2C5 6002    MOVT       R0, #0x5602
  0x34180A6E:  6800         LDR        R0, [R0]
  0x34180A70:  F400 017F    AND        R1, R0, #0xFF0000
  0x34180A74:  2001         MOVS       R0, #1
  0x34180A76:  EB00 4011    ADD.W      R0, R0, R1, LSR #16
  0x34180A7A:  9004         STR        R0, [SP, #16]
  0x34180A7C:  980D         LDR        R0, [SP, #52]
  0x34180A7E:  9904         LDR        R1, [SP, #16]
  0x34180A80:  FBB0 F0F1    UDIV       R0, R0, R1
  0x34180A84:  900D         STR        R0, [SP, #52]
  0x34180A86:  E7FF         B          46L23                     ; 0x34180A88

.L23:
  0x34180A88:  980D         LDR        R0, [SP, #52]
  0x34180A8A:  F244 4148    MOVW       R1, #0x4448              ; 0x34184448 = SystemCoreClock
  0x34180A8E:  F2C3 4118    MOVT       R1, #0x3418              ; 0x34184448 = SystemCoreClock
  0x34180A92:  6008         STR        R0, [R1]
  0x34180A94:  B00E         ADD        SP, SP, #56
  0x34180A96:  4770         BX         LR
  0x34180A98:  33800000     DC.W       0x33800000

Section .text.HAL_Init from blto2_FSBL_lto.o, size=48, align=4


HAL_Init:
  0x34180A9C:  B580         PUSH       123R7, LR}
  0x34180A9E:  B082         SUB        SP, SP, #8
  0x34180AA0:  2003         MOVS       R0, #3
  0x34180AA2:  F001 FB4D    BL         HAL_NVIC_SetPriorityGrouping ; 0x34182140
  0x34180AA6:  F7FF FE5B    BL         SystemCoreClockUpdate    ; 0x34180760
  0x34180AAA:  200F         MOVS       R0, #15
  0x34180AAC:  F001 FADC    BL         HAL_InitTick             ; 0x34182068
  0x34180AB0:  B118         CBZ        R0, .L1                  ; 0x34180ABA
  0x34180AB2:  2001         MOVS       R0, #1
  0x34180AB4:  F88D 0007    STRB.W     R0, [SP, #7]
  0x34180AB8:  E004         B          46L2                      ; 0x34180AC4

.L1:
  0x34180ABA:  F7FF FE49    BL         HAL_MspInit              ; 0x34180750
  0x34180ABE:  2000         MOVS       R0, #0
  0x34180AC0:  F88D 0007    STRB.W     R0, [SP, #7]

.L2:
  0x34180AC4:  F89D 0007    LDRB.W     R0, [SP, #7]
  0x34180AC8:  B002         ADD        SP, SP, #8
  0x34180ACA:  BD80         POP        123R7, PC}

Section .text.HAL_GetTick from blto2_FSBL_lto.o, size=12, align=4


HAL_GetTick:
  0x34180ACC:  F244 4040    MOVW       R0, #0x4440              ; 0x34184440 = uwTick
  0x34180AD0:  F2C3 4018    MOVT       R0, #0x3418              ; 0x34184440 = uwTick
  0x34180AD4:  6800         LDR        R0, [R0]
  0x34180AD6:  4770         BX         LR

Section .text.__NVIC_SetPriorityGrouping from blto2_FSBL_lto.o, size=60, align=4


__NVIC_SetPriorityGrouping:
  0x34180AD8:  B083         SUB        SP, SP, #12
  0x34180ADA:  9002         STR        R0, [SP, #8]
  0x34180ADC:  9802         LDR        R0, [SP, #8]
  0x34180ADE:  F000 0007    AND        R0, R0, #7
  0x34180AE2:  9000         STR        R0, [SP, #0]
  0x34180AE4:  F64E 510C    MOVW       R1, #0xED0C
  0x34180AE8:  F2CE 0100    MOVT       R1, #0xE000
  0x34180AEC:  6808         LDR        R0, [R1]
  0x34180AEE:  9001         STR        R0, [SP, #4]
  0x34180AF0:  9801         LDR        R0, [SP, #4]
  0x34180AF2:  F64F 02FF    MOVW       R2, #0xF8FF
  0x34180AF6:  4010         ANDS       R0, R2
  0x34180AF8:  9001         STR        R0, [SP, #4]
  0x34180AFA:  9801         LDR        R0, [SP, #4]
  0x34180AFC:  9A00         LDR        R2, [SP, #0]
  0x34180AFE:  EA40 2002    ORR.W      R0, R0, R2, LSL #8
  0x34180B02:  2200         MOVS       R2, #0
  0x34180B04:  F2C0 52FA    MOVT       R2, #0x05FA
  0x34180B08:  4310         ORRS       R0, R2
  0x34180B0A:  9001         STR        R0, [SP, #4]
  0x34180B0C:  9801         LDR        R0, [SP, #4]
  0x34180B0E:  6008         STR        R0, [R1]
  0x34180B10:  B003         ADD        SP, SP, #12
  0x34180B12:  4770         BX         LR

Section .text.HAL_NVIC_SetPriority from blto2_FSBL_lto.o, size=168, align=4


HAL_NVIC_SetPriority:
  0x34180B14:  B580         PUSH       123R7, LR}
  0x34180B16:  B086         SUB        SP, SP, #24
  0x34180B18:  F8AD 0016    STRH.W     R0, [SP, #22]
  0x34180B1C:  9104         STR        R1, [SP, #16]
  0x34180B1E:  9203         STR        R2, [SP, #12]
  0x34180B20:  F9BD 0016    LDRSH.W    R0, [SP, #22]
  0x34180B24:  F110 0F0C    CMN        R0, #12
  0x34180B28:  DB04         BLT        46L1                      ; 0x34180B34
  0x34180B2A:  F9BD 0016    LDRSH.W    R0, [SP, #22]
  0x34180B2E:  3004         ADDS       R0, #4
  0x34180B30:  B100         CBZ        R0, .L1                  ; 0x34180B34
  0x34180B32:  E006         B          46L2                      ; 0x34180B42

.L1:
  0x34180B34:  F244 3068    MOVW       R0, #0x4368              ; 0x34184368 = .rodata..L.str.10
  0x34180B38:  F2C3 4018    MOVT       R0, #0x3418              ; 0x34184368 = .rodata..L.str.10
  0x34180B3C:  21FF         MOVS       R1, #255
  0x34180B3E:  F001 F97D    BL         assert_failed            ; 0x34181E3C

.L2:
  0x34180B42:  F000 F83B    BL         __NVIC_GetPriorityGrouping ; 0x34180BBC
  0x34180B46:  F000 0007    AND        R0, R0, #7
  0x34180B4A:  9002         STR        R0, [SP, #8]
  0x34180B4C:  9802         LDR        R0, [SP, #8]
  0x34180B4E:  2802         CMP        R0, #2
  0x34180B50:  D802         BHI        46L3                      ; 0x34180B58
  0x34180B52:  9803         LDR        R0, [SP, #12]
  0x34180B54:  B138         CBZ        R0, .L4                  ; 0x34180B66
  0x34180B56:  E007         B          46L5                      ; 0x34180B68

.L3:
  0x34180B58:  9803         LDR        R0, [SP, #12]
  0x34180B5A:  9902         LDR        R1, [SP, #8]
  0x34180B5C:  1ECA         SUBS       R2, R1, #3
  0x34180B5E:  2101         MOVS       R1, #1
  0x34180B60:  4091         LSLS       R1, R2
  0x34180B62:  4288         CMP        R0, R1
  0x34180B64:  D200         BCS        46L5                      ; 0x34180B68

.L4:
  0x34180B66:  E007         B          46L6                      ; 0x34180B78

.L5:
  0x34180B68:  F244 3068    MOVW       R0, #0x4368              ; 0x34184368 = .rodata..L.str.10
  0x34180B6C:  F2C3 4018    MOVT       R0, #0x3418              ; 0x34184368 = .rodata..L.str.10
  0x34180B70:  F44F 7181    MOV.W      R1, #0x0102
  0x34180B74:  F001 F962    BL         assert_failed            ; 0x34181E3C

.L6:
  0x34180B78:  9804         LDR        R0, [SP, #16]
  0x34180B7A:  280F         CMP        R0, #15
  0x34180B7C:  D808         BHI        46L7                      ; 0x34180B90
  0x34180B7E:  9804         LDR        R0, [SP, #16]
  0x34180B80:  9902         LDR        R1, [SP, #8]
  0x34180B82:  F1C1 0207    RSB        R2, R1, #7
  0x34180B86:  2101         MOVS       R1, #1
  0x34180B88:  4091         LSLS       R1, R2
  0x34180B8A:  4288         CMP        R0, R1
  0x34180B8C:  D200         BCS        46L7                      ; 0x34180B90
  0x34180B8E:  E007         B          46L8                      ; 0x34180BA0

.L7:
  0x34180B90:  F244 3068    MOVW       R0, #0x4368              ; 0x34184368 = .rodata..L.str.10
  0x34180B94:  F2C3 4018    MOVT       R0, #0x3418              ; 0x34184368 = .rodata..L.str.10
  0x34180B98:  F240 1103    MOVW       R1, #0x0103
  0x34180B9C:  F001 F94E    BL         assert_failed            ; 0x34181E3C

.L8:
  0x34180BA0:  F9BD 0016    LDRSH.W    R0, [SP, #22]
  0x34180BA4:  9001         STR        R0, [SP, #4]
  0x34180BA6:  9802         LDR        R0, [SP, #8]
  0x34180BA8:  9904         LDR        R1, [SP, #16]
  0x34180BAA:  9A03         LDR        R2, [SP, #12]
  0x34180BAC:  F000 F80E    BL         NVIC_EncodePriority      ; 0x34180BCC
  0x34180BB0:  4601         MOV        R1, R0
  0x34180BB2:  9801         LDR        R0, [SP, #4]
  0x34180BB4:  F001 FAE4    BL         __NVIC_SetPriority       ; 0x34182180
  0x34180BB8:  B006         ADD        SP, SP, #24
  0x34180BBA:  BD80         POP        123R7, PC}

Section .text.__NVIC_GetPriorityGrouping from blto2_FSBL_lto.o, size=16, align=4


__NVIC_GetPriorityGrouping:
  0x34180BBC:  F64E 500C    MOVW       R0, #0xED0C
  0x34180BC0:  F2CE 0000    MOVT       R0, #0xE000
  0x34180BC4:  6800         LDR        R0, [R0]
  0x34180BC6:  F3C0 2002    UBFX       R0, R0, #8, #3
  0x34180BCA:  4770         BX         LR

Section .text.NVIC_EncodePriority from blto2_FSBL_lto.o, size=100, align=4


NVIC_EncodePriority:
  0x34180BCC:  B088         SUB        SP, SP, #32
  0x34180BCE:  9007         STR        R0, [SP, #28]
  0x34180BD0:  9106         STR        R1, [SP, #24]
  0x34180BD2:  9205         STR        R2, [SP, #20]
  0x34180BD4:  9807         LDR        R0, [SP, #28]
  0x34180BD6:  F000 0007    AND        R0, R0, #7
  0x34180BDA:  9004         STR        R0, [SP, #16]
  0x34180BDC:  9804         LDR        R0, [SP, #16]
  0x34180BDE:  F1C0 0007    RSB        R0, R0, #7
  0x34180BE2:  2805         CMP        R0, #5
  0x34180BE4:  D302         BCC        46L1                      ; 0x34180BEC
  0x34180BE6:  2004         MOVS       R0, #4
  0x34180BE8:  9001         STR        R0, [SP, #4]
  0x34180BEA:  E003         B          46L2                      ; 0x34180BF4

.L1:
  0x34180BEC:  9804         LDR        R0, [SP, #16]
  0x34180BEE:  F1C0 0007    RSB        R0, R0, #7
  0x34180BF2:  9001         STR        R0, [SP, #4]

.L2:
  0x34180BF4:  9801         LDR        R0, [SP, #4]
  0x34180BF6:  9003         STR        R0, [SP, #12]
  0x34180BF8:  9804         LDR        R0, [SP, #16]
  0x34180BFA:  3004         ADDS       R0, #4
  0x34180BFC:  2806         CMP        R0, #6
  0x34180BFE:  D802         BHI        46L3                      ; 0x34180C06
  0x34180C00:  2000         MOVS       R0, #0
  0x34180C02:  9000         STR        R0, [SP, #0]
  0x34180C04:  E002         B          46L4                      ; 0x34180C0C

.L3:
  0x34180C06:  9804         LDR        R0, [SP, #16]
  0x34180C08:  3803         SUBS       R0, #3
  0x34180C0A:  9000         STR        R0, [SP, #0]

.L4:
  0x34180C0C:  9800         LDR        R0, [SP, #0]
  0x34180C0E:  9002         STR        R0, [SP, #8]
  0x34180C10:  9806         LDR        R0, [SP, #24]
  0x34180C12:  9903         LDR        R1, [SP, #12]
  0x34180C14:  2201         MOVS       R2, #1
  0x34180C16:  FA02 F101    LSL.W      R1, R2, R1
  0x34180C1A:  3901         SUBS       R1, #1
  0x34180C1C:  4008         ANDS       R0, R1
  0x34180C1E:  9B02         LDR        R3, [SP, #8]
  0x34180C20:  4098         LSLS       R0, R3
  0x34180C22:  9905         LDR        R1, [SP, #20]
  0x34180C24:  409A         LSLS       R2, R3
  0x34180C26:  3A01         SUBS       R2, #1
  0x34180C28:  4011         ANDS       R1, R2
  0x34180C2A:  4308         ORRS       R0, R1
  0x34180C2C:  B008         ADD        SP, SP, #32
  0x34180C2E:  4770         BX         LR

Section .text.HAL_SYSTICK_Config from blto2_FSBL_lto.o, size=16, align=4


HAL_SYSTICK_Config:
  0x34180C30:  B580         PUSH       123R7, LR}
  0x34180C32:  B082         SUB        SP, SP, #8
  0x34180C34:  9001         STR        R0, [SP, #4]
  0x34180C36:  9801         LDR        R0, [SP, #4]
  0x34180C38:  F001 FAC2    BL         SysTick_Config           ; 0x341821C0
  0x34180C3C:  B002         ADD        SP, SP, #8
  0x34180C3E:  BD80         POP        123R7, PC}

Section .text.HAL_GPIO_Init from blto2_FSBL_lto.o, size=1928, align=4


HAL_GPIO_Init:
  0x34180C40:  B580         PUSH       123R7, LR}
  0x34180C42:  B090         SUB        SP, SP, #64
  0x34180C44:  900F         STR        R0, [SP, #60]
  0x34180C46:  910E         STR        R1, [SP, #56]
  0x34180C48:  2000         MOVS       R0, #0
  0x34180C4A:  900D         STR        R0, [SP, #52]
  0x34180C4C:  980F         LDR        R0, [SP, #60]
  0x34180C4E:  2100         MOVS       R1, #0
  0x34180C50:  F2C5 6102    MOVT       R1, #0x5602
  0x34180C54:  4288         CMP        R0, R1
  0x34180C56:  F000 80A4    BEQ.W      46L1                      ; 0x34180DA2
  0x34180C5A:  980F         LDR        R0, [SP, #60]
  0x34180C5C:  2100         MOVS       R1, #0
  0x34180C5E:  F2C4 6102    MOVT       R1, #0x4602
  0x34180C62:  4288         CMP        R0, R1
  0x34180C64:  F000 809D    BEQ.W      46L1                      ; 0x34180DA2
  0x34180C68:  980F         LDR        R0, [SP, #60]
  0x34180C6A:  F240 4100    MOVW       R1, #0x0400
  0x34180C6E:  F2C5 6102    MOVT       R1, #0x5602
  0x34180C72:  4288         CMP        R0, R1
  0x34180C74:  F000 8095    BEQ.W      46L1                      ; 0x34180DA2
  0x34180C78:  980F         LDR        R0, [SP, #60]
  0x34180C7A:  F240 4100    MOVW       R1, #0x0400
  0x34180C7E:  F2C4 6102    MOVT       R1, #0x4602
  0x34180C82:  4288         CMP        R0, R1
  0x34180C84:  F000 808D    BEQ.W      46L1                      ; 0x34180DA2
  0x34180C88:  980F         LDR        R0, [SP, #60]
  0x34180C8A:  F640 0100    MOVW       R1, #0x0800
  0x34180C8E:  F2C5 6102    MOVT       R1, #0x5602
  0x34180C92:  4288         CMP        R0, R1
  0x34180C94:  F000 8085    BEQ.W      46L1                      ; 0x34180DA2
  0x34180C98:  980F         LDR        R0, [SP, #60]
  0x34180C9A:  F640 0100    MOVW       R1, #0x0800
  0x34180C9E:  F2C4 6102    MOVT       R1, #0x4602
  0x34180CA2:  4288         CMP        R0, R1
  0x34180CA4:  D07D         BEQ        46L1                      ; 0x34180DA2
  0x34180CA6:  980F         LDR        R0, [SP, #60]
  0x34180CA8:  F640 4100    MOVW       R1, #0x0C00
  0x34180CAC:  F2C5 6102    MOVT       R1, #0x5602
  0x34180CB0:  4288         CMP        R0, R1
  0x34180CB2:  D076         BEQ        46L1                      ; 0x34180DA2
  0x34180CB4:  980F         LDR        R0, [SP, #60]
  0x34180CB6:  F640 4100    MOVW       R1, #0x0C00
  0x34180CBA:  F2C4 6102    MOVT       R1, #0x4602
  0x34180CBE:  4288         CMP        R0, R1
  0x34180CC0:  D06F         BEQ        46L1                      ; 0x34180DA2
  0x34180CC2:  980F         LDR        R0, [SP, #60]
  0x34180CC4:  F241 0100    MOVW       R1, #0x1000
  0x34180CC8:  F2C5 6102    MOVT       R1, #0x5602
  0x34180CCC:  4288         CMP        R0, R1
  0x34180CCE:  D068         BEQ        46L1                      ; 0x34180DA2
  0x34180CD0:  980F         LDR        R0, [SP, #60]
  0x34180CD2:  F241 0100    MOVW       R1, #0x1000
  0x34180CD6:  F2C4 6102    MOVT       R1, #0x4602
  0x34180CDA:  4288         CMP        R0, R1
  0x34180CDC:  D061         BEQ        46L1                      ; 0x34180DA2
  0x34180CDE:  980F         LDR        R0, [SP, #60]
  0x34180CE0:  F241 4100    MOVW       R1, #0x1400
  0x34180CE4:  F2C5 6102    MOVT       R1, #0x5602
  0x34180CE8:  4288         CMP        R0, R1
  0x34180CEA:  D05A         BEQ        46L1                      ; 0x34180DA2
  0x34180CEC:  980F         LDR        R0, [SP, #60]
  0x34180CEE:  F241 4100    MOVW       R1, #0x1400
  0x34180CF2:  F2C4 6102    MOVT       R1, #0x4602
  0x34180CF6:  4288         CMP        R0, R1
  0x34180CF8:  D053         BEQ        46L1                      ; 0x34180DA2
  0x34180CFA:  980F         LDR        R0, [SP, #60]
  0x34180CFC:  F641 0100    MOVW       R1, #0x1800
  0x34180D00:  F2C5 6102    MOVT       R1, #0x5602
  0x34180D04:  4288         CMP        R0, R1
  0x34180D06:  D04C         BEQ        46L1                      ; 0x34180DA2
  0x34180D08:  980F         LDR        R0, [SP, #60]
  0x34180D0A:  F641 0100    MOVW       R1, #0x1800
  0x34180D0E:  F2C4 6102    MOVT       R1, #0x4602
  0x34180D12:  4288         CMP        R0, R1
  0x34180D14:  D045         BEQ        46L1                      ; 0x34180DA2
  0x34180D16:  980F         LDR        R0, [SP, #60]
  0x34180D18:  F641 4100    MOVW       R1, #0x1C00
  0x34180D1C:  F2C5 6102    MOVT       R1, #0x5602
  0x34180D20:  4288         CMP        R0, R1
  0x34180D22:  D03E         BEQ        46L1                      ; 0x34180DA2
  0x34180D24:  980F         LDR        R0, [SP, #60]
  0x34180D26:  F641 4100    MOVW       R1, #0x1C00
  0x34180D2A:  F2C4 6102    MOVT       R1, #0x4602
  0x34180D2E:  4288         CMP        R0, R1
  0x34180D30:  D037         BEQ        46L1                      ; 0x34180DA2
  0x34180D32:  980F         LDR        R0, [SP, #60]
  0x34180D34:  F243 4100    MOVW       R1, #0x3400
  0x34180D38:  F2C5 6102    MOVT       R1, #0x5602
  0x34180D3C:  4288         CMP        R0, R1
  0x34180D3E:  D030         BEQ        46L1                      ; 0x34180DA2
  0x34180D40:  980F         LDR        R0, [SP, #60]
  0x34180D42:  F243 4100    MOVW       R1, #0x3400
  0x34180D46:  F2C4 6102    MOVT       R1, #0x4602
  0x34180D4A:  4288         CMP        R0, R1
  0x34180D4C:  D029         BEQ        46L1                      ; 0x34180DA2
  0x34180D4E:  980F         LDR        R0, [SP, #60]
  0x34180D50:  F643 0100    MOVW       R1, #0x3800
  0x34180D54:  F2C5 6102    MOVT       R1, #0x5602
  0x34180D58:  4288         CMP        R0, R1
  0x34180D5A:  D022         BEQ        46L1                      ; 0x34180DA2
  0x34180D5C:  980F         LDR        R0, [SP, #60]
  0x34180D5E:  F643 0100    MOVW       R1, #0x3800
  0x34180D62:  F2C4 6102    MOVT       R1, #0x4602
  0x34180D66:  4288         CMP        R0, R1
  0x34180D68:  D01B         BEQ        46L1                      ; 0x34180DA2
  0x34180D6A:  980F         LDR        R0, [SP, #60]
  0x34180D6C:  F643 4100    MOVW       R1, #0x3C00
  0x34180D70:  F2C5 6102    MOVT       R1, #0x5602
  0x34180D74:  4288         CMP        R0, R1
  0x34180D76:  D014         BEQ        46L1                      ; 0x34180DA2
  0x34180D78:  980F         LDR        R0, [SP, #60]
  0x34180D7A:  F643 4100    MOVW       R1, #0x3C00
  0x34180D7E:  F2C4 6102    MOVT       R1, #0x4602
  0x34180D82:  4288         CMP        R0, R1
  0x34180D84:  D00D         BEQ        46L1                      ; 0x34180DA2
  0x34180D86:  980F         LDR        R0, [SP, #60]
  0x34180D88:  F244 0100    MOVW       R1, #0x4000
  0x34180D8C:  F2C5 6102    MOVT       R1, #0x5602
  0x34180D90:  4288         CMP        R0, R1
  0x34180D92:  D006         BEQ        46L1                      ; 0x34180DA2
  0x34180D94:  980F         LDR        R0, [SP, #60]
  0x34180D96:  F244 0100    MOVW       R1, #0x4000
  0x34180D9A:  F2C4 6102    MOVT       R1, #0x4602
  0x34180D9E:  4288         CMP        R0, R1
  0x34180DA0:  D100         BNE        46L2                      ; 0x34180DA4

.L1:
  0x34180DA2:  E006         B          46L3                      ; 0x34180DB2

.L2:
  0x34180DA4:  F244 208E    MOVW       R0, #0x428E              ; 0x3418428E = .rodata..L.str.20
  0x34180DA8:  F2C3 4018    MOVT       R0, #0x3418              ; 0x3418428E = .rodata..L.str.20
  0x34180DAC:  21AD         MOVS       R1, #173
  0x34180DAE:  F001 F845    BL         assert_failed            ; 0x34181E3C

.L3:
  0x34180DB2:  980E         LDR        R0, [SP, #56]
  0x34180DB4:  8800         LDRH       R0, [R0]
  0x34180DB6:  B118         CBZ        R0, .L4                  ; 0x34180DC0
  0x34180DB8:  980E         LDR        R0, [SP, #56]
  0x34180DBA:  8840         LDRH       R0, [R0, #2]
  0x34180DBC:  B900         CBNZ       R0, .L4                  ; 0x34180DC0
  0x34180DBE:  E006         B          46L5                      ; 0x34180DCE

.L4:
  0x34180DC0:  F244 208E    MOVW       R0, #0x428E              ; 0x3418428E = .rodata..L.str.20
  0x34180DC4:  F2C3 4018    MOVT       R0, #0x3418              ; 0x3418428E = .rodata..L.str.20
  0x34180DC8:  21AE         MOVS       R1, #174
  0x34180DCA:  F001 F837    BL         assert_failed            ; 0x34181E3C

.L5:
  0x34180DCE:  980E         LDR        R0, [SP, #56]
  0x34180DD0:  6840         LDR        R0, [R0, #4]
  0x34180DD2:  B388         CBZ        R0, .L6                  ; 0x34180E38
  0x34180DD4:  980E         LDR        R0, [SP, #56]
  0x34180DD6:  6840         LDR        R0, [R0, #4]
  0x34180DD8:  2801         CMP        R0, #1
  0x34180DDA:  D02D         BEQ        46L6                      ; 0x34180E38
  0x34180DDC:  980E         LDR        R0, [SP, #56]
  0x34180DDE:  6840         LDR        R0, [R0, #4]
  0x34180DE0:  2811         CMP        R0, #17
  0x34180DE2:  D029         BEQ        46L6                      ; 0x34180E38
  0x34180DE4:  980E         LDR        R0, [SP, #56]
  0x34180DE6:  6840         LDR        R0, [R0, #4]
  0x34180DE8:  2802         CMP        R0, #2
  0x34180DEA:  D025         BEQ        46L6                      ; 0x34180E38
  0x34180DEC:  980E         LDR        R0, [SP, #56]
  0x34180DEE:  6840         LDR        R0, [R0, #4]
  0x34180DF0:  2812         CMP        R0, #18
  0x34180DF2:  D021         BEQ        46L6                      ; 0x34180E38
  0x34180DF4:  980E         LDR        R0, [SP, #56]
  0x34180DF6:  6840         LDR        R0, [R0, #4]
  0x34180DF8:  F5B0 1F88    CMP.W      R0, #0x110000
  0x34180DFC:  D01C         BEQ        46L6                      ; 0x34180E38
  0x34180DFE:  980E         LDR        R0, [SP, #56]
  0x34180E00:  6840         LDR        R0, [R0, #4]
  0x34180E02:  F5B0 1F04    CMP.W      R0, #0x210000
  0x34180E06:  D017         BEQ        46L6                      ; 0x34180E38
  0x34180E08:  980E         LDR        R0, [SP, #56]
  0x34180E0A:  6840         LDR        R0, [R0, #4]
  0x34180E0C:  F5B0 1F44    CMP.W      R0, #0x310000
  0x34180E10:  D012         BEQ        46L6                      ; 0x34180E38
  0x34180E12:  980E         LDR        R0, [SP, #56]
  0x34180E14:  6840         LDR        R0, [R0, #4]
  0x34180E16:  F5B0 1F90    CMP.W      R0, #0x120000
  0x34180E1A:  D00D         BEQ        46L6                      ; 0x34180E38
  0x34180E1C:  980E         LDR        R0, [SP, #56]
  0x34180E1E:  6840         LDR        R0, [R0, #4]
  0x34180E20:  F5B0 1F08    CMP.W      R0, #0x220000
  0x34180E24:  D008         BEQ        46L6                      ; 0x34180E38
  0x34180E26:  980E         LDR        R0, [SP, #56]
  0x34180E28:  6840         LDR        R0, [R0, #4]
  0x34180E2A:  F5B0 1F48    CMP.W      R0, #0x320000
  0x34180E2E:  D003         BEQ        46L6                      ; 0x34180E38
  0x34180E30:  980E         LDR        R0, [SP, #56]
  0x34180E32:  6840         LDR        R0, [R0, #4]
  0x34180E34:  2803         CMP        R0, #3
  0x34180E36:  D100         BNE        46L7                      ; 0x34180E3A

.L6:
  0x34180E38:  E006         B          46L8                      ; 0x34180E48

.L7:
  0x34180E3A:  F244 208E    MOVW       R0, #0x428E              ; 0x3418428E = .rodata..L.str.20
  0x34180E3E:  F2C3 4018    MOVT       R0, #0x3418              ; 0x3418428E = .rodata..L.str.20
  0x34180E42:  21AF         MOVS       R1, #175
  0x34180E44:  F000 FFFA    BL         assert_failed            ; 0x34181E3C

.L8:
  0x34180E48:  980E         LDR        R0, [SP, #56]
  0x34180E4A:  6800         LDR        R0, [R0]
  0x34180E4C:  990D         LDR        R1, [SP, #52]
  0x34180E4E:  40C8         LSRS       R0, R1
  0x34180E50:  2800         CMP        R0, #0
  0x34180E52:  F000 82B7    BEQ.W      46L52                     ; 0x341813C4
  0x34180E56:  980E         LDR        R0, [SP, #56]
  0x34180E58:  6800         LDR        R0, [R0]
  0x34180E5A:  9A0D         LDR        R2, [SP, #52]
  0x34180E5C:  2101         MOVS       R1, #1
  0x34180E5E:  4091         LSLS       R1, R2
  0x34180E60:  4008         ANDS       R0, R1
  0x34180E62:  900C         STR        R0, [SP, #48]
  0x34180E64:  980C         LDR        R0, [SP, #48]
  0x34180E66:  2800         CMP        R0, #0
  0x34180E68:  F000 82A8    BEQ.W      46L51                     ; 0x341813BC
  0x34180E6C:  980E         LDR        R0, [SP, #56]
  0x34180E6E:  6840         LDR        R0, [R0, #4]
  0x34180E70:  F000 0003    AND        R0, R0, #3
  0x34180E74:  2801         CMP        R0, #1
  0x34180E76:  D005         BEQ        46L9                      ; 0x34180E84
  0x34180E78:  980E         LDR        R0, [SP, #56]
  0x34180E7A:  6840         LDR        R0, [R0, #4]
  0x34180E7C:  F000 0003    AND        R0, R0, #3
  0x34180E80:  2802         CMP        R0, #2
  0x34180E82:  D144         BNE        46L13                     ; 0x34180F0E

.L9:
  0x34180E84:  980E         LDR        R0, [SP, #56]
  0x34180E86:  68C0         LDR        R0, [R0, #12]
  0x34180E88:  B158         CBZ        R0, .L10                 ; 0x34180EA2
  0x34180E8A:  980E         LDR        R0, [SP, #56]
  0x34180E8C:  68C0         LDR        R0, [R0, #12]
  0x34180E8E:  2801         CMP        R0, #1
  0x34180E90:  D007         BEQ        46L10                     ; 0x34180EA2
  0x34180E92:  980E         LDR        R0, [SP, #56]
  0x34180E94:  68C0         LDR        R0, [R0, #12]
  0x34180E96:  2802         CMP        R0, #2
  0x34180E98:  D003         BEQ        46L10                     ; 0x34180EA2
  0x34180E9A:  980E         LDR        R0, [SP, #56]
  0x34180E9C:  68C0         LDR        R0, [R0, #12]
  0x34180E9E:  2803         CMP        R0, #3
  0x34180EA0:  D100         BNE        46L11                     ; 0x34180EA4

.L10:
  0x34180EA2:  E006         B          46L12                     ; 0x34180EB2

.L11:
  0x34180EA4:  F244 208E    MOVW       R0, #0x428E              ; 0x3418428E = .rodata..L.str.20
  0x34180EA8:  F2C3 4018    MOVT       R0, #0x3418              ; 0x3418428E = .rodata..L.str.20
  0x34180EAC:  21BE         MOVS       R1, #190
  0x34180EAE:  F000 FFC5    BL         assert_failed            ; 0x34181E3C

.L12:
  0x34180EB2:  980F         LDR        R0, [SP, #60]
  0x34180EB4:  6880         LDR        R0, [R0, #8]
  0x34180EB6:  900B         STR        R0, [SP, #44]
  0x34180EB8:  980D         LDR        R0, [SP, #52]
  0x34180EBA:  0041         LSLS       R1, R0, #1
  0x34180EBC:  2003         MOVS       R0, #3
  0x34180EBE:  FA00 F101    LSL.W      R1, R0, R1
  0x34180EC2:  980B         LDR        R0, [SP, #44]
  0x34180EC4:  4388         BICS       R0, R1
  0x34180EC6:  900B         STR        R0, [SP, #44]
  0x34180EC8:  980E         LDR        R0, [SP, #56]
  0x34180ECA:  68C0         LDR        R0, [R0, #12]
  0x34180ECC:  990D         LDR        R1, [SP, #52]
  0x34180ECE:  0049         LSLS       R1, R1, #1
  0x34180ED0:  FA00 F101    LSL.W      R1, R0, R1
  0x34180ED4:  980B         LDR        R0, [SP, #44]
  0x34180ED6:  4308         ORRS       R0, R1
  0x34180ED8:  900B         STR        R0, [SP, #44]
  0x34180EDA:  980B         LDR        R0, [SP, #44]
  0x34180EDC:  990F         LDR        R1, [SP, #60]
  0x34180EDE:  6088         STR        R0, [R1, #8]
  0x34180EE0:  980F         LDR        R0, [SP, #60]
  0x34180EE2:  6840         LDR        R0, [R0, #4]
  0x34180EE4:  900B         STR        R0, [SP, #44]
  0x34180EE6:  990D         LDR        R1, [SP, #52]
  0x34180EE8:  2001         MOVS       R0, #1
  0x34180EEA:  FA00 F101    LSL.W      R1, R0, R1
  0x34180EEE:  980B         LDR        R0, [SP, #44]
  0x34180EF0:  4388         BICS       R0, R1
  0x34180EF2:  900B         STR        R0, [SP, #44]
  0x34180EF4:  980E         LDR        R0, [SP, #56]
  0x34180EF6:  6840         LDR        R0, [R0, #4]
  0x34180EF8:  F3C0 1000    UBFX       R0, R0, #4, #1
  0x34180EFC:  990D         LDR        R1, [SP, #52]
  0x34180EFE:  FA00 F101    LSL.W      R1, R0, R1
  0x34180F02:  980B         LDR        R0, [SP, #44]
  0x34180F04:  4308         ORRS       R0, R1
  0x34180F06:  900B         STR        R0, [SP, #44]
  0x34180F08:  980B         LDR        R0, [SP, #44]
  0x34180F0A:  990F         LDR        R1, [SP, #60]
  0x34180F0C:  6048         STR        R0, [R1, #4]

.L13:
  0x34180F0E:  980E         LDR        R0, [SP, #56]
  0x34180F10:  6840         LDR        R0, [R0, #4]
  0x34180F12:  43C0         MVNS       R0, R0
  0x34180F14:  0780         LSLS       R0, R0, #30
  0x34180F16:  B940         CBNZ       R0, .L14                 ; 0x34180F2A
  0x34180F18:  980E         LDR        R0, [SP, #56]
  0x34180F1A:  6840         LDR        R0, [R0, #4]
  0x34180F1C:  43C0         MVNS       R0, R0
  0x34180F1E:  0780         LSLS       R0, R0, #30
  0x34180F20:  BB68         CBNZ       R0, .L18                 ; 0x34180F7E
  0x34180F22:  980E         LDR        R0, [SP, #56]
  0x34180F24:  6880         LDR        R0, [R0, #8]
  0x34180F26:  2801         CMP        R0, #1
  0x34180F28:  D029         BEQ        46L18                     ; 0x34180F7E

.L14:
  0x34180F2A:  980E         LDR        R0, [SP, #56]
  0x34180F2C:  6880         LDR        R0, [R0, #8]
  0x34180F2E:  B138         CBZ        R0, .L15                 ; 0x34180F40
  0x34180F30:  980E         LDR        R0, [SP, #56]
  0x34180F32:  6880         LDR        R0, [R0, #8]
  0x34180F34:  2801         CMP        R0, #1
  0x34180F36:  D003         BEQ        46L15                     ; 0x34180F40
  0x34180F38:  980E         LDR        R0, [SP, #56]
  0x34180F3A:  6880         LDR        R0, [R0, #8]
  0x34180F3C:  2802         CMP        R0, #2
  0x34180F3E:  D100         BNE        46L16                     ; 0x34180F42

.L15:
  0x34180F40:  E006         B          46L17                     ; 0x34180F50

.L16:
  0x34180F42:  F244 208E    MOVW       R0, #0x428E              ; 0x3418428E = .rodata..L.str.20
  0x34180F46:  F2C3 4018    MOVT       R0, #0x3418              ; 0x3418428E = .rodata..L.str.20
  0x34180F4A:  21D1         MOVS       R1, #209
  0x34180F4C:  F000 FF76    BL         assert_failed            ; 0x34181E3C

.L17:
  0x34180F50:  980F         LDR        R0, [SP, #60]
  0x34180F52:  68C0         LDR        R0, [R0, #12]
  0x34180F54:  900B         STR        R0, [SP, #44]
  0x34180F56:  980D         LDR        R0, [SP, #52]
  0x34180F58:  0041         LSLS       R1, R0, #1
  0x34180F5A:  2003         MOVS       R0, #3
  0x34180F5C:  FA00 F101    LSL.W      R1, R0, R1
  0x34180F60:  980B         LDR        R0, [SP, #44]
  0x34180F62:  4388         BICS       R0, R1
  0x34180F64:  900B         STR        R0, [SP, #44]
  0x34180F66:  980E         LDR        R0, [SP, #56]
  0x34180F68:  6880         LDR        R0, [R0, #8]
  0x34180F6A:  990D         LDR        R1, [SP, #52]
  0x34180F6C:  0049         LSLS       R1, R1, #1
  0x34180F6E:  FA00 F101    LSL.W      R1, R0, R1
  0x34180F72:  980B         LDR        R0, [SP, #44]
  0x34180F74:  4308         ORRS       R0, R1
  0x34180F76:  900B         STR        R0, [SP, #44]
  0x34180F78:  980B         LDR        R0, [SP, #44]
  0x34180F7A:  990F         LDR        R1, [SP, #60]
  0x34180F7C:  60C8         STR        R0, [R1, #12]

.L18:
  0x34180F7E:  980E         LDR        R0, [SP, #56]
  0x34180F80:  6840         LDR        R0, [R0, #4]
  0x34180F82:  F000 0003    AND        R0, R0, #3
  0x34180F86:  2802         CMP        R0, #2
  0x34180F88:  F040 80E4    BNE.W      46L24                     ; 0x34181154
  0x34180F8C:  980F         LDR        R0, [SP, #60]
  0x34180F8E:  2100         MOVS       R1, #0
  0x34180F90:  F2C5 6102    MOVT       R1, #0x5602
  0x34180F94:  4288         CMP        R0, R1
  0x34180F96:  F000 80A4    BEQ.W      46L19                     ; 0x341810E2
  0x34180F9A:  980F         LDR        R0, [SP, #60]
  0x34180F9C:  2100         MOVS       R1, #0
  0x34180F9E:  F2C4 6102    MOVT       R1, #0x4602
  0x34180FA2:  4288         CMP        R0, R1
  0x34180FA4:  F000 809D    BEQ.W      46L19                     ; 0x341810E2
  0x34180FA8:  980F         LDR        R0, [SP, #60]
  0x34180FAA:  F240 4100    MOVW       R1, #0x0400
  0x34180FAE:  F2C5 6102    MOVT       R1, #0x5602
  0x34180FB2:  4288         CMP        R0, R1
  0x34180FB4:  F000 8095    BEQ.W      46L19                     ; 0x341810E2
  0x34180FB8:  980F         LDR        R0, [SP, #60]
  0x34180FBA:  F240 4100    MOVW       R1, #0x0400
  0x34180FBE:  F2C4 6102    MOVT       R1, #0x4602
  0x34180FC2:  4288         CMP        R0, R1
  0x34180FC4:  F000 808D    BEQ.W      46L19                     ; 0x341810E2
  0x34180FC8:  980F         LDR        R0, [SP, #60]
  0x34180FCA:  F640 0100    MOVW       R1, #0x0800
  0x34180FCE:  F2C5 6102    MOVT       R1, #0x5602
  0x34180FD2:  4288         CMP        R0, R1
  0x34180FD4:  F000 8085    BEQ.W      46L19                     ; 0x341810E2
  0x34180FD8:  980F         LDR        R0, [SP, #60]
  0x34180FDA:  F640 0100    MOVW       R1, #0x0800
  0x34180FDE:  F2C4 6102    MOVT       R1, #0x4602
  0x34180FE2:  4288         CMP        R0, R1
  0x34180FE4:  D07D         BEQ        46L19                     ; 0x341810E2
  0x34180FE6:  980F         LDR        R0, [SP, #60]
  0x34180FE8:  F640 4100    MOVW       R1, #0x0C00
  0x34180FEC:  F2C5 6102    MOVT       R1, #0x5602
  0x34180FF0:  4288         CMP        R0, R1
  0x34180FF2:  D076         BEQ        46L19                     ; 0x341810E2
  0x34180FF4:  980F         LDR        R0, [SP, #60]
  0x34180FF6:  F640 4100    MOVW       R1, #0x0C00
  0x34180FFA:  F2C4 6102    MOVT       R1, #0x4602
  0x34180FFE:  4288         CMP        R0, R1
  0x34181000:  D06F         BEQ        46L19                     ; 0x341810E2
  0x34181002:  980F         LDR        R0, [SP, #60]
  0x34181004:  F241 0100    MOVW       R1, #0x1000
  0x34181008:  F2C5 6102    MOVT       R1, #0x5602
  0x3418100C:  4288         CMP        R0, R1
  0x3418100E:  D068         BEQ        46L19                     ; 0x341810E2
  0x34181010:  980F         LDR        R0, [SP, #60]
  0x34181012:  F241 0100    MOVW       R1, #0x1000
  0x34181016:  F2C4 6102    MOVT       R1, #0x4602
  0x3418101A:  4288         CMP        R0, R1
  0x3418101C:  D061         BEQ        46L19                     ; 0x341810E2
  0x3418101E:  980F         LDR        R0, [SP, #60]
  0x34181020:  F241 4100    MOVW       R1, #0x1400
  0x34181024:  F2C5 6102    MOVT       R1, #0x5602
  0x34181028:  4288         CMP        R0, R1
  0x3418102A:  D05A         BEQ        46L19                     ; 0x341810E2
  0x3418102C:  980F         LDR        R0, [SP, #60]
  0x3418102E:  F241 4100    MOVW       R1, #0x1400
  0x34181032:  F2C4 6102    MOVT       R1, #0x4602
  0x34181036:  4288         CMP        R0, R1
  0x34181038:  D053         BEQ        46L19                     ; 0x341810E2
  0x3418103A:  980F         LDR        R0, [SP, #60]
  0x3418103C:  F641 0100    MOVW       R1, #0x1800
  0x34181040:  F2C5 6102    MOVT       R1, #0x5602
  0x34181044:  4288         CMP        R0, R1
  0x34181046:  D04C         BEQ        46L19                     ; 0x341810E2
  0x34181048:  980F         LDR        R0, [SP, #60]
  0x3418104A:  F641 0100    MOVW       R1, #0x1800
  0x3418104E:  F2C4 6102    MOVT       R1, #0x4602
  0x34181052:  4288         CMP        R0, R1
  0x34181054:  D045         BEQ        46L19                     ; 0x341810E2
  0x34181056:  980F         LDR        R0, [SP, #60]
  0x34181058:  F641 4100    MOVW       R1, #0x1C00
  0x3418105C:  F2C5 6102    MOVT       R1, #0x5602
  0x34181060:  4288         CMP        R0, R1
  0x34181062:  D03E         BEQ        46L19                     ; 0x341810E2
  0x34181064:  980F         LDR        R0, [SP, #60]
  0x34181066:  F641 4100    MOVW       R1, #0x1C00
  0x3418106A:  F2C4 6102    MOVT       R1, #0x4602
  0x3418106E:  4288         CMP        R0, R1
  0x34181070:  D037         BEQ        46L19                     ; 0x341810E2
  0x34181072:  980F         LDR        R0, [SP, #60]
  0x34181074:  F243 4100    MOVW       R1, #0x3400
  0x34181078:  F2C5 6102    MOVT       R1, #0x5602
  0x3418107C:  4288         CMP        R0, R1
  0x3418107E:  D030         BEQ        46L19                     ; 0x341810E2
  0x34181080:  980F         LDR        R0, [SP, #60]
  0x34181082:  F243 4100    MOVW       R1, #0x3400
  0x34181086:  F2C4 6102    MOVT       R1, #0x4602
  0x3418108A:  4288         CMP        R0, R1
  0x3418108C:  D029         BEQ        46L19                     ; 0x341810E2
  0x3418108E:  980F         LDR        R0, [SP, #60]
  0x34181090:  F643 0100    MOVW       R1, #0x3800
  0x34181094:  F2C5 6102    MOVT       R1, #0x5602
  0x34181098:  4288         CMP        R0, R1
  0x3418109A:  D022         BEQ        46L19                     ; 0x341810E2
  0x3418109C:  980F         LDR        R0, [SP, #60]
  0x3418109E:  F643 0100    MOVW       R1, #0x3800
  0x341810A2:  F2C4 6102    MOVT       R1, #0x4602
  0x341810A6:  4288         CMP        R0, R1
  0x341810A8:  D01B         BEQ        46L19                     ; 0x341810E2
  0x341810AA:  980F         LDR        R0, [SP, #60]
  0x341810AC:  F643 4100    MOVW       R1, #0x3C00
  0x341810B0:  F2C5 6102    MOVT       R1, #0x5602
  0x341810B4:  4288         CMP        R0, R1
  0x341810B6:  D014         BEQ        46L19                     ; 0x341810E2
  0x341810B8:  980F         LDR        R0, [SP, #60]
  0x341810BA:  F643 4100    MOVW       R1, #0x3C00
  0x341810BE:  F2C4 6102    MOVT       R1, #0x4602
  0x341810C2:  4288         CMP        R0, R1
  0x341810C4:  D00D         BEQ        46L19                     ; 0x341810E2
  0x341810C6:  980F         LDR        R0, [SP, #60]
  0x341810C8:  F244 0100    MOVW       R1, #0x4000
  0x341810CC:  F2C5 6102    MOVT       R1, #0x5602
  0x341810D0:  4288         CMP        R0, R1
  0x341810D2:  D006         BEQ        46L19                     ; 0x341810E2
  0x341810D4:  980F         LDR        R0, [SP, #60]
  0x341810D6:  F244 0100    MOVW       R1, #0x4000
  0x341810DA:  F2C4 6102    MOVT       R1, #0x4602
  0x341810DE:  4288         CMP        R0, R1
  0x341810E0:  D100         BNE        46L20                     ; 0x341810E4

.L19:
  0x341810E2:  E006         B          46L21                     ; 0x341810F2

.L20:
  0x341810E4:  F244 208E    MOVW       R0, #0x428E              ; 0x3418428E = .rodata..L.str.20
  0x341810E8:  F2C3 4018    MOVT       R0, #0x3418              ; 0x3418428E = .rodata..L.str.20
  0x341810EC:  21DE         MOVS       R1, #222
  0x341810EE:  F000 FEA5    BL         assert_failed            ; 0x34181E3C

.L21:
  0x341810F2:  980E         LDR        R0, [SP, #56]
  0x341810F4:  6900         LDR        R0, [R0, #16]
  0x341810F6:  280F         CMP        R0, #15
  0x341810F8:  D800         BHI        46L22                     ; 0x341810FC
  0x341810FA:  E006         B          46L23                     ; 0x3418110A

.L22:
  0x341810FC:  F244 208E    MOVW       R0, #0x428E              ; 0x3418428E = .rodata..L.str.20
  0x34181100:  F2C3 4018    MOVT       R0, #0x3418              ; 0x3418428E = .rodata..L.str.20
  0x34181104:  21DF         MOVS       R1, #223
  0x34181106:  F000 FE99    BL         assert_failed            ; 0x34181E3C

.L23:
  0x3418110A:  980F         LDR        R0, [SP, #60]
  0x3418110C:  990D         LDR        R1, [SP, #52]
  0x3418110E:  F06F 0203    MVN        R2, #3
  0x34181112:  EA02 0151    AND.W      R1, R2, R1, LSR #1
  0x34181116:  4408         ADD        R0, R1
  0x34181118:  6A00         LDR        R0, [R0, #32]
  0x3418111A:  900B         STR        R0, [SP, #44]
  0x3418111C:  980D         LDR        R0, [SP, #52]
  0x3418111E:  F000 0007    AND        R0, R0, #7
  0x34181122:  0081         LSLS       R1, R0, #2
  0x34181124:  200F         MOVS       R0, #15
  0x34181126:  FA00 F101    LSL.W      R1, R0, R1
  0x3418112A:  980B         LDR        R0, [SP, #44]
  0x3418112C:  4388         BICS       R0, R1
  0x3418112E:  900B         STR        R0, [SP, #44]
  0x34181130:  980E         LDR        R0, [SP, #56]
  0x34181132:  6900         LDR        R0, [R0, #16]
  0x34181134:  990D         LDR        R1, [SP, #52]
  0x34181136:  F001 0107    AND        R1, R1, #7
  0x3418113A:  0089         LSLS       R1, R1, #2
  0x3418113C:  FA00 F101    LSL.W      R1, R0, R1
  0x34181140:  980B         LDR        R0, [SP, #44]
  0x34181142:  4308         ORRS       R0, R1
  0x34181144:  900B         STR        R0, [SP, #44]
  0x34181146:  980B         LDR        R0, [SP, #44]
  0x34181148:  990F         LDR        R1, [SP, #60]
  0x3418114A:  9B0D         LDR        R3, [SP, #52]
  0x3418114C:  EA02 0253    AND.W      R2, R2, R3, LSR #1
  0x34181150:  4411         ADD        R1, R2
  0x34181152:  6208         STR        R0, [R1, #32]

.L24:
  0x34181154:  980F         LDR        R0, [SP, #60]
  0x34181156:  6800         LDR        R0, [R0]
  0x34181158:  900B         STR        R0, [SP, #44]
  0x3418115A:  980D         LDR        R0, [SP, #52]
  0x3418115C:  0041         LSLS       R1, R0, #1
  0x3418115E:  2003         MOVS       R0, #3
  0x34181160:  FA00 F101    LSL.W      R1, R0, R1
  0x34181164:  980B         LDR        R0, [SP, #44]
  0x34181166:  4388         BICS       R0, R1
  0x34181168:  900B         STR        R0, [SP, #44]
  0x3418116A:  980E         LDR        R0, [SP, #56]
  0x3418116C:  6840         LDR        R0, [R0, #4]
  0x3418116E:  F000 0003    AND        R0, R0, #3
  0x34181172:  990D         LDR        R1, [SP, #52]
  0x34181174:  0049         LSLS       R1, R1, #1
  0x34181176:  FA00 F101    LSL.W      R1, R0, R1
  0x3418117A:  980B         LDR        R0, [SP, #44]
  0x3418117C:  4308         ORRS       R0, R1
  0x3418117E:  900B         STR        R0, [SP, #44]
  0x34181180:  980B         LDR        R0, [SP, #44]
  0x34181182:  990F         LDR        R1, [SP, #60]
  0x34181184:  6008         STR        R0, [R1]
  0x34181186:  980E         LDR        R0, [SP, #56]
  0x34181188:  7980         LDRB       R0, [R0, #6]
  0x3418118A:  0780         LSLS       R0, R0, #30
  0x3418118C:  2800         CMP        R0, #0
  0x3418118E:  F000 8115    BEQ.W      46L51                     ; 0x341813BC
  0x34181192:  980D         LDR        R0, [SP, #52]
  0x34181194:  F020 0003    BIC        R0, R0, #3
  0x34181198:  F245 0160    MOVW       R1, #0x5060
  0x3418119C:  F2C5 6102    MOVT       R1, #0x5602
  0x341811A0:  5840         LDR        R0, [R0, R1]
  0x341811A2:  900B         STR        R0, [SP, #44]
  0x341811A4:  980D         LDR        R0, [SP, #52]
  0x341811A6:  F000 0003    AND        R0, R0, #3
  0x341811AA:  00C1         LSLS       R1, R0, #3
  0x341811AC:  200F         MOVS       R0, #15
  0x341811AE:  FA00 F101    LSL.W      R1, R0, R1
  0x341811B2:  980B         LDR        R0, [SP, #44]
  0x341811B4:  4388         BICS       R0, R1
  0x341811B6:  900B         STR        R0, [SP, #44]
  0x341811B8:  980F         LDR        R0, [SP, #60]
  0x341811BA:  2100         MOVS       R1, #0
  0x341811BC:  F2C5 6102    MOVT       R1, #0x5602
  0x341811C0:  4288         CMP        R0, R1
  0x341811C2:  D102         BNE        46L25                     ; 0x341811CA
  0x341811C4:  2000         MOVS       R0, #0
  0x341811C6:  900A         STR        R0, [SP, #40]
  0x341811C8:  E082         B          46L46                     ; 0x341812D0

.L25:
  0x341811CA:  980F         LDR        R0, [SP, #60]
  0x341811CC:  F240 4100    MOVW       R1, #0x0400
  0x341811D0:  F2C5 6102    MOVT       R1, #0x5602
  0x341811D4:  4288         CMP        R0, R1
  0x341811D6:  D102         BNE        46L26                     ; 0x341811DE
  0x341811D8:  2001         MOVS       R0, #1
  0x341811DA:  9009         STR        R0, [SP, #36]
  0x341811DC:  E076         B          46L45                     ; 0x341812CC

.L26:
  0x341811DE:  980F         LDR        R0, [SP, #60]
  0x341811E0:  F640 0100    MOVW       R1, #0x0800
  0x341811E4:  F2C5 6102    MOVT       R1, #0x5602
  0x341811E8:  4288         CMP        R0, R1
  0x341811EA:  D102         BNE        46L27                     ; 0x341811F2
  0x341811EC:  2002         MOVS       R0, #2
  0x341811EE:  9008         STR        R0, [SP, #32]
  0x341811F0:  E06A         B          46L44                     ; 0x341812C8

.L27:
  0x341811F2:  980F         LDR        R0, [SP, #60]
  0x341811F4:  F640 4100    MOVW       R1, #0x0C00
  0x341811F8:  F2C5 6102    MOVT       R1, #0x5602
  0x341811FC:  4288         CMP        R0, R1
  0x341811FE:  D102         BNE        46L28                     ; 0x34181206
  0x34181200:  2003         MOVS       R0, #3
  0x34181202:  9007         STR        R0, [SP, #28]
  0x34181204:  E05E         B          46L43                     ; 0x341812C4

.L28:
  0x34181206:  980F         LDR        R0, [SP, #60]
  0x34181208:  F241 0100    MOVW       R1, #0x1000
  0x3418120C:  F2C5 6102    MOVT       R1, #0x5602
  0x34181210:  4288         CMP        R0, R1
  0x34181212:  D102         BNE        46L29                     ; 0x3418121A
  0x34181214:  2004         MOVS       R0, #4
  0x34181216:  9006         STR        R0, [SP, #24]
  0x34181218:  E052         B          46L42                     ; 0x341812C0

.L29:
  0x3418121A:  980F         LDR        R0, [SP, #60]
  0x3418121C:  F241 4100    MOVW       R1, #0x1400
  0x34181220:  F2C5 6102    MOVT       R1, #0x5602
  0x34181224:  4288         CMP        R0, R1
  0x34181226:  D102         BNE        46L30                     ; 0x3418122E
  0x34181228:  2005         MOVS       R0, #5
  0x3418122A:  9005         STR        R0, [SP, #20]
  0x3418122C:  E046         B          46L41                     ; 0x341812BC

.L30:
  0x3418122E:  980F         LDR        R0, [SP, #60]
  0x34181230:  F641 0100    MOVW       R1, #0x1800
  0x34181234:  F2C5 6102    MOVT       R1, #0x5602
  0x34181238:  4288         CMP        R0, R1
  0x3418123A:  D102         BNE        46L31                     ; 0x34181242
  0x3418123C:  2006         MOVS       R0, #6
  0x3418123E:  9004         STR        R0, [SP, #16]
  0x34181240:  E03A         B          46L40                     ; 0x341812B8

.L31:
  0x34181242:  980F         LDR        R0, [SP, #60]
  0x34181244:  F641 4100    MOVW       R1, #0x1C00
  0x34181248:  F2C5 6102    MOVT       R1, #0x5602
  0x3418124C:  4288         CMP        R0, R1
  0x3418124E:  D102         BNE        46L32                     ; 0x34181256
  0x34181250:  2007         MOVS       R0, #7
  0x34181252:  9003         STR        R0, [SP, #12]
  0x34181254:  E02E         B          46L39                     ; 0x341812B4

.L32:
  0x34181256:  980F         LDR        R0, [SP, #60]
  0x34181258:  F243 4100    MOVW       R1, #0x3400
  0x3418125C:  F2C5 6102    MOVT       R1, #0x5602
  0x34181260:  4288         CMP        R0, R1
  0x34181262:  D102         BNE        46L33                     ; 0x3418126A
  0x34181264:  2008         MOVS       R0, #8
  0x34181266:  9002         STR        R0, [SP, #8]
  0x34181268:  E022         B          46L38                     ; 0x341812B0

.L33:
  0x3418126A:  980F         LDR        R0, [SP, #60]
  0x3418126C:  F643 0100    MOVW       R1, #0x3800
  0x34181270:  F2C5 6102    MOVT       R1, #0x5602
  0x34181274:  4288         CMP        R0, R1
  0x34181276:  D102         BNE        46L34                     ; 0x3418127E
  0x34181278:  2009         MOVS       R0, #9
  0x3418127A:  9001         STR        R0, [SP, #4]
  0x3418127C:  E016         B          46L37                     ; 0x341812AC

.L34:
  0x3418127E:  980F         LDR        R0, [SP, #60]
  0x34181280:  F643 4100    MOVW       R1, #0x3C00
  0x34181284:  F2C5 6102    MOVT       R1, #0x5602
  0x34181288:  4288         CMP        R0, R1
  0x3418128A:  D102         BNE        46L35                     ; 0x34181292
  0x3418128C:  200A         MOVS       R0, #10
  0x3418128E:  9000         STR        R0, [SP, #0]
  0x34181290:  E00A         B          46L36                     ; 0x341812A8

.L35:
  0x34181292:  980F         LDR        R0, [SP, #60]
  0x34181294:  F244 0100    MOVW       R1, #0x4000
  0x34181298:  F2C5 6102    MOVT       R1, #0x5602
  0x3418129C:  4288         CMP        R0, R1
  0x3418129E:  F04F 0010    MOV.W      R0, #16
  0x341812A2:  BF08         IT         EQ
  0x341812A4:  200B         MOVEQ      R0, #11
  0x341812A6:  9000         STR        R0, [SP, #0]

.L36:
  0x341812A8:  9800         LDR        R0, [SP, #0]
  0x341812AA:  9001         STR        R0, [SP, #4]

.L37:
  0x341812AC:  9801         LDR        R0, [SP, #4]
  0x341812AE:  9002         STR        R0, [SP, #8]

.L38:
  0x341812B0:  9802         LDR        R0, [SP, #8]
  0x341812B2:  9003         STR        R0, [SP, #12]

.L39:
  0x341812B4:  9803         LDR        R0, [SP, #12]
  0x341812B6:  9004         STR        R0, [SP, #16]

.L40:
  0x341812B8:  9804         LDR        R0, [SP, #16]
  0x341812BA:  9005         STR        R0, [SP, #20]

.L41:
  0x341812BC:  9805         LDR        R0, [SP, #20]
  0x341812BE:  9006         STR        R0, [SP, #24]

.L42:
  0x341812C0:  9806         LDR        R0, [SP, #24]
  0x341812C2:  9007         STR        R0, [SP, #28]

.L43:
  0x341812C4:  9807         LDR        R0, [SP, #28]
  0x341812C6:  9008         STR        R0, [SP, #32]

.L44:
  0x341812C8:  9808         LDR        R0, [SP, #32]
  0x341812CA:  9009         STR        R0, [SP, #36]

.L45:
  0x341812CC:  9809         LDR        R0, [SP, #36]
  0x341812CE:  900A         STR        R0, [SP, #40]

.L46:
  0x341812D0:  980A         LDR        R0, [SP, #40]
  0x341812D2:  990D         LDR        R1, [SP, #52]
  0x341812D4:  F001 0103    AND        R1, R1, #3
  0x341812D8:  00C9         LSLS       R1, R1, #3
  0x341812DA:  FA00 F101    LSL.W      R1, R0, R1
  0x341812DE:  980B         LDR        R0, [SP, #44]
  0x341812E0:  4308         ORRS       R0, R1
  0x341812E2:  900B         STR        R0, [SP, #44]
  0x341812E4:  980B         LDR        R0, [SP, #44]
  0x341812E6:  990D         LDR        R1, [SP, #52]
  0x341812E8:  F021 0103    BIC        R1, R1, #3
  0x341812EC:  F245 0260    MOVW       R2, #0x5060
  0x341812F0:  F2C5 6202    MOVT       R2, #0x5602
  0x341812F4:  5088         STR        R0, [R1, R2]
  0x341812F6:  F245 0080    MOVW       R0, #0x5080
  0x341812FA:  F2C5 6002    MOVT       R0, #0x5602
  0x341812FE:  6800         LDR        R0, [R0]
  0x34181300:  900B         STR        R0, [SP, #44]
  0x34181302:  990C         LDR        R1, [SP, #48]
  0x34181304:  980B         LDR        R0, [SP, #44]
  0x34181306:  4388         BICS       R0, R1
  0x34181308:  900B         STR        R0, [SP, #44]
  0x3418130A:  980E         LDR        R0, [SP, #56]
  0x3418130C:  7980         LDRB       R0, [R0, #6]
  0x3418130E:  07C0         LSLS       R0, R0, #31
  0x34181310:  B118         CBZ        R0, .L47                 ; 0x3418131A
  0x34181312:  990C         LDR        R1, [SP, #48]
  0x34181314:  980B         LDR        R0, [SP, #44]
  0x34181316:  4308         ORRS       R0, R1
  0x34181318:  900B         STR        R0, [SP, #44]

.L47:
  0x3418131A:  980B         LDR        R0, [SP, #44]
  0x3418131C:  F245 0180    MOVW       R1, #0x5080
  0x34181320:  F2C5 6102    MOVT       R1, #0x5602
  0x34181324:  6008         STR        R0, [R1]
  0x34181326:  F245 0084    MOVW       R0, #0x5084
  0x3418132A:  F2C5 6002    MOVT       R0, #0x5602
  0x3418132E:  6800         LDR        R0, [R0]
  0x34181330:  900B         STR        R0, [SP, #44]
  0x34181332:  990C         LDR        R1, [SP, #48]
  0x34181334:  980B         LDR        R0, [SP, #44]
  0x34181336:  4388         BICS       R0, R1
  0x34181338:  900B         STR        R0, [SP, #44]
  0x3418133A:  980E         LDR        R0, [SP, #56]
  0x3418133C:  7980         LDRB       R0, [R0, #6]
  0x3418133E:  0780         LSLS       R0, R0, #30
  0x34181340:  2800         CMP        R0, #0
  0x34181342:  D503         BPL        46L48                     ; 0x3418134C
  0x34181344:  990C         LDR        R1, [SP, #48]
  0x34181346:  980B         LDR        R0, [SP, #44]
  0x34181348:  4308         ORRS       R0, R1
  0x3418134A:  900B         STR        R0, [SP, #44]

.L48:
  0x3418134C:  980B         LDR        R0, [SP, #44]
  0x3418134E:  F245 0184    MOVW       R1, #0x5084
  0x34181352:  F2C5 6102    MOVT       R1, #0x5602
  0x34181356:  6008         STR        R0, [R1]
  0x34181358:  F245 0000    MOVW       R0, #0x5000
  0x3418135C:  F2C5 6002    MOVT       R0, #0x5602
  0x34181360:  6800         LDR        R0, [R0]
  0x34181362:  900B         STR        R0, [SP, #44]
  0x34181364:  990C         LDR        R1, [SP, #48]
  0x34181366:  980B         LDR        R0, [SP, #44]
  0x34181368:  4388         BICS       R0, R1
  0x3418136A:  900B         STR        R0, [SP, #44]
  0x3418136C:  980E         LDR        R0, [SP, #56]
  0x3418136E:  7980         LDRB       R0, [R0, #6]
  0x34181370:  06C0         LSLS       R0, R0, #27
  0x34181372:  2800         CMP        R0, #0
  0x34181374:  D503         BPL        46L49                     ; 0x3418137E
  0x34181376:  990C         LDR        R1, [SP, #48]
  0x34181378:  980B         LDR        R0, [SP, #44]
  0x3418137A:  4308         ORRS       R0, R1
  0x3418137C:  900B         STR        R0, [SP, #44]

.L49:
  0x3418137E:  980B         LDR        R0, [SP, #44]
  0x34181380:  F245 0100    MOVW       R1, #0x5000
  0x34181384:  F2C5 6102    MOVT       R1, #0x5602
  0x34181388:  6008         STR        R0, [R1]
  0x3418138A:  F245 0004    MOVW       R0, #0x5004
  0x3418138E:  F2C5 6002    MOVT       R0, #0x5602
  0x34181392:  6800         LDR        R0, [R0]
  0x34181394:  900B         STR        R0, [SP, #44]
  0x34181396:  990C         LDR        R1, [SP, #48]
  0x34181398:  980B         LDR        R0, [SP, #44]
  0x3418139A:  4388         BICS       R0, R1
  0x3418139C:  900B         STR        R0, [SP, #44]
  0x3418139E:  980E         LDR        R0, [SP, #56]
  0x341813A0:  7980         LDRB       R0, [R0, #6]
  0x341813A2:  0680         LSLS       R0, R0, #26
  0x341813A4:  2800         CMP        R0, #0
  0x341813A6:  D503         BPL        46L50                     ; 0x341813B0
  0x341813A8:  990C         LDR        R1, [SP, #48]
  0x341813AA:  980B         LDR        R0, [SP, #44]
  0x341813AC:  4308         ORRS       R0, R1
  0x341813AE:  900B         STR        R0, [SP, #44]

.L50:
  0x341813B0:  980B         LDR        R0, [SP, #44]
  0x341813B2:  F245 0104    MOVW       R1, #0x5004
  0x341813B6:  F2C5 6102    MOVT       R1, #0x5602
  0x341813BA:  6008         STR        R0, [R1]

.L51:
  0x341813BC:  980D         LDR        R0, [SP, #52]
  0x341813BE:  3001         ADDS       R0, #1
  0x341813C0:  900D         STR        R0, [SP, #52]
  0x341813C2:  E541         B          46L8                      ; 0x34180E48

.L52:
  0x341813C4:  B010         ADD        SP, SP, #64
  0x341813C6:  BD80         POP        123R7, PC}

Section .text.LL_RCC_HSI_SetDivider from blto2_FSBL_lto.o, size=28, align=4


LL_RCC_HSI_SetDivider:
  0x341813C8:  B081         SUB        SP, SP, #4
  0x341813CA:  9000         STR        R0, [SP, #0]
  0x341813CC:  F248 0148    MOVW       R1, #0x8048
  0x341813D0:  F2C5 6102    MOVT       R1, #0x5602
  0x341813D4:  6808         LDR        R0, [R1]
  0x341813D6:  F420 70C0    BIC        R0, R0, #0x0180
  0x341813DA:  9A00         LDR        R2, [SP, #0]
  0x341813DC:  4310         ORRS       R0, R2
  0x341813DE:  6008         STR        R0, [R1]
  0x341813E0:  B001         ADD        SP, SP, #4
  0x341813E2:  4770         BX         LR

Section .text.LL_RCC_HSI_IsReady from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_HSI_IsReady:
  0x341813E4:  F248 0004    MOVW       R0, #0x8004
  0x341813E8:  F2C5 6002    MOVT       R0, #0x5602
  0x341813EC:  6800         LDR        R0, [R0]
  0x341813EE:  F3C0 00C0    UBFX       R0, R0, #3, #1
  0x341813F2:  4770         BX         LR

Section .text.LL_RCC_GetCpuClkSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_GetCpuClkSource:
  0x341813F4:  F248 0020    MOVW       R0, #0x8020
  0x341813F8:  F2C5 6002    MOVT       R0, #0x5602
  0x341813FC:  6800         LDR        R0, [R0]
  0x341813FE:  F400 1040    AND        R0, R0, #0x300000
  0x34181402:  4770         BX         LR

Section .text.LL_RCC_GetSysClkSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_GetSysClkSource:
  0x34181404:  F248 0020    MOVW       R0, #0x8020
  0x34181408:  F2C5 6002    MOVT       R0, #0x5602
  0x3418140C:  6800         LDR        R0, [R0]
  0x3418140E:  F000 5040    AND        R0, R0, #0x30000000
  0x34181412:  4770         BX         LR

Section .text.LL_RCC_PLL1_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL1_GetSource:
  0x34181414:  F248 0080    MOVW       R0, #0x8080
  0x34181418:  F2C5 6002    MOVT       R0, #0x5602
  0x3418141C:  6800         LDR        R0, [R0]
  0x3418141E:  F000 40E0    AND        R0, R0, #0x70000000
  0x34181422:  4770         BX         LR

Section .text.LL_RCC_PLL2_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL2_GetSource:
  0x34181424:  F248 0090    MOVW       R0, #0x8090
  0x34181428:  F2C5 6002    MOVT       R0, #0x5602
  0x3418142C:  6800         LDR        R0, [R0]
  0x3418142E:  F000 40E0    AND        R0, R0, #0x70000000
  0x34181432:  4770         BX         LR

Section .text.LL_RCC_PLL3_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL3_GetSource:
  0x34181434:  F248 00A0    MOVW       R0, #0x80A0
  0x34181438:  F2C5 6002    MOVT       R0, #0x5602
  0x3418143C:  6800         LDR        R0, [R0]
  0x3418143E:  F000 40E0    AND        R0, R0, #0x70000000
  0x34181442:  4770         BX         LR

Section .text.LL_RCC_PLL4_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL4_GetSource:
  0x34181444:  F248 00B0    MOVW       R0, #0x80B0
  0x34181448:  F2C5 6002    MOVT       R0, #0x5602
  0x3418144C:  6800         LDR        R0, [R0]
  0x3418144E:  F000 40E0    AND        R0, R0, #0x70000000
  0x34181452:  4770         BX         LR

Section .text.LL_RCC_MSI_SetFrequency from blto2_FSBL_lto.o, size=28, align=4


LL_RCC_MSI_SetFrequency:
  0x34181454:  B081         SUB        SP, SP, #4
  0x34181456:  9000         STR        R0, [SP, #0]
  0x34181458:  F248 0144    MOVW       R1, #0x8044
  0x3418145C:  F2C5 6102    MOVT       R1, #0x5602
  0x34181460:  6808         LDR        R0, [R1]
  0x34181462:  F420 7000    BIC        R0, R0, #0x0200
  0x34181466:  9A00         LDR        R2, [SP, #0]
  0x34181468:  4310         ORRS       R0, R2
  0x3418146A:  6008         STR        R0, [R1]
  0x3418146C:  B001         ADD        SP, SP, #4
  0x3418146E:  4770         BX         LR

Section .text.LL_RCC_MSI_IsReady from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_MSI_IsReady:
  0x34181470:  F248 0004    MOVW       R0, #0x8004
  0x34181474:  F2C5 6002    MOVT       R0, #0x5602
  0x34181478:  6800         LDR        R0, [R0]
  0x3418147A:  F3C0 0080    UBFX       R0, R0, #2, #1
  0x3418147E:  4770         BX         LR

Section .text.LL_RCC_LSI_IsReady from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_LSI_IsReady:
  0x34181480:  F248 0004    MOVW       R0, #0x8004
  0x34181484:  F2C5 6002    MOVT       R0, #0x5602
  0x34181488:  6800         LDR        R0, [R0]
  0x3418148A:  F000 0001    AND        R0, R0, #1
  0x3418148E:  4770         BX         LR

Section .text.LL_RCC_LSE_IsReady from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_LSE_IsReady:
  0x34181490:  F248 0004    MOVW       R0, #0x8004
  0x34181494:  F2C5 6002    MOVT       R0, #0x5602
  0x34181498:  6800         LDR        R0, [R0]
  0x3418149A:  F3C0 0040    UBFX       R0, R0, #1, #1
  0x3418149E:  4770         BX         LR

Section .text.LL_RCC_PLL1_IsReady from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL1_IsReady:
  0x341814A0:  F248 0004    MOVW       R0, #0x8004
  0x341814A4:  F2C5 6002    MOVT       R0, #0x5602
  0x341814A8:  6800         LDR        R0, [R0]
  0x341814AA:  F3C0 2000    UBFX       R0, R0, #8, #1
  0x341814AE:  4770         BX         LR

Section .text.LL_RCC_IC1_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC1_GetSource:
  0x341814B0:  F248 00C4    MOVW       R0, #0x80C4
  0x341814B4:  F2C5 6002    MOVT       R0, #0x5602
  0x341814B8:  6800         LDR        R0, [R0]
  0x341814BA:  F000 5040    AND        R0, R0, #0x30000000
  0x341814BE:  4770         BX         LR

Section .text.LL_RCC_IC2_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC2_GetSource:
  0x341814C0:  F248 00C8    MOVW       R0, #0x80C8
  0x341814C4:  F2C5 6002    MOVT       R0, #0x5602
  0x341814C8:  6800         LDR        R0, [R0]
  0x341814CA:  F000 5040    AND        R0, R0, #0x30000000
  0x341814CE:  4770         BX         LR

Section .text.LL_RCC_IC6_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC6_GetSource:
  0x341814D0:  F248 00D8    MOVW       R0, #0x80D8
  0x341814D4:  F2C5 6002    MOVT       R0, #0x5602
  0x341814D8:  6800         LDR        R0, [R0]
  0x341814DA:  F000 5040    AND        R0, R0, #0x30000000
  0x341814DE:  4770         BX         LR

Section .text.LL_RCC_IC11_GetSource from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_IC11_GetSource:
  0x341814E0:  F248 00EC    MOVW       R0, #0x80EC
  0x341814E4:  F2C5 6002    MOVT       R0, #0x5602
  0x341814E8:  6800         LDR        R0, [R0]
  0x341814EA:  F000 5040    AND        R0, R0, #0x30000000
  0x341814EE:  4770         BX         LR

Section .text.LL_RCC_PLL2_IsReady from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL2_IsReady:
  0x341814F0:  F248 0004    MOVW       R0, #0x8004
  0x341814F4:  F2C5 6002    MOVT       R0, #0x5602
  0x341814F8:  6800         LDR        R0, [R0]
  0x341814FA:  F3C0 2040    UBFX       R0, R0, #9, #1
  0x341814FE:  4770         BX         LR

Section .text.LL_RCC_PLL3_IsReady from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL3_IsReady:
  0x34181500:  F248 0004    MOVW       R0, #0x8004
  0x34181504:  F2C5 6002    MOVT       R0, #0x5602
  0x34181508:  6800         LDR        R0, [R0]
  0x3418150A:  F3C0 2080    UBFX       R0, R0, #10, #1
  0x3418150E:  4770         BX         LR

Section .text.LL_RCC_PLL4_IsReady from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL4_IsReady:
  0x34181510:  F248 0004    MOVW       R0, #0x8004
  0x34181514:  F2C5 6002    MOVT       R0, #0x5602
  0x34181518:  6800         LDR        R0, [R0]
  0x3418151A:  F3C0 20C0    UBFX       R0, R0, #11, #1
  0x3418151E:  4770         BX         LR

Section .text.RCC_PLL_Source_IsReady from blto2_FSBL_lto.o, size=84, align=4


RCC_PLL_Source_IsReady:
  0x34181520:  B580         PUSH       123R7, LR}
  0x34181522:  B084         SUB        SP, SP, #16
  0x34181524:  9003         STR        R0, [SP, #12]
  0x34181526:  2001         MOVS       R0, #1
  0x34181528:  9002         STR        R0, [SP, #8]
  0x3418152A:  9803         LDR        R0, [SP, #12]
  0x3418152C:  9001         STR        R0, [SP, #4]
  0x3418152E:  B160         CBZ        R0, .L1                  ; 0x3418154A
  0x34181530:  9801         LDR        R0, [SP, #4]
  0x34181532:  F1B0 5F80    CMP.W      R0, #0x10000000
  0x34181536:  D00E         BEQ        46L3                      ; 0x34181556
  0x34181538:  9801         LDR        R0, [SP, #4]
  0x3418153A:  F1B0 5F00    CMP.W      R0, #0x20000000
  0x3418153E:  D010         BEQ        46L5                      ; 0x34181562
  0x34181540:  9801         LDR        R0, [SP, #4]
  0x34181542:  F1B0 5F40    CMP.W      R0, #0x30000000
  0x34181546:  D012         BEQ        46L7                      ; 0x3418156E
  0x34181548:  E011         B          46L7                      ; 0x3418156E

.L1:
  0x3418154A:  F7FF FF4B    BL         LL_RCC_HSI_IsReady       ; 0x341813E4
  0x3418154E:  B908         CBNZ       R0, .L2                  ; 0x34181554
  0x34181550:  2000         MOVS       R0, #0
  0x34181552:  9002         STR        R0, [SP, #8]

.L2:
  0x34181554:  E00B         B          46L7                      ; 0x3418156E

.L3:
  0x34181556:  F7FF FF8B    BL         LL_RCC_MSI_IsReady       ; 0x34181470
  0x3418155A:  B908         CBNZ       R0, .L4                  ; 0x34181560
  0x3418155C:  2000         MOVS       R0, #0
  0x3418155E:  9002         STR        R0, [SP, #8]

.L4:
  0x34181560:  E005         B          46L7                      ; 0x3418156E

.L5:
  0x34181562:  F000 F807    BL         LL_RCC_HSE_IsReady       ; 0x34181574
  0x34181566:  B908         CBNZ       R0, .L6                  ; 0x3418156C
  0x34181568:  2000         MOVS       R0, #0
  0x3418156A:  9002         STR        R0, [SP, #8]

.L6:
  0x3418156C:  E7FF         B          46L7                      ; 0x3418156E

.L7:
  0x3418156E:  9802         LDR        R0, [SP, #8]
  0x34181570:  B004         ADD        SP, SP, #16
  0x34181572:  BD80         POP        123R7, PC}

Section .text.LL_RCC_HSE_IsReady from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_HSE_IsReady:
  0x34181574:  F248 0004    MOVW       R0, #0x8004
  0x34181578:  F2C5 6002    MOVT       R0, #0x5602
  0x3418157C:  6800         LDR        R0, [R0]
  0x3418157E:  F3C0 1000    UBFX       R0, R0, #4, #1
  0x34181582:  4770         BX         LR

Section .text.LL_RCC_HSI_GetDivider from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_HSI_GetDivider:
  0x34181584:  F248 0048    MOVW       R0, #0x8048
  0x34181588:  F2C5 6002    MOVT       R0, #0x5602
  0x3418158C:  6800         LDR        R0, [R0]
  0x3418158E:  F400 70C0    AND        R0, R0, #0x0180
  0x34181592:  4770         BX         LR

Section .text.LL_RCC_PLL1_IsEnabledBypass from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL1_IsEnabledBypass:
  0x34181594:  F248 0080    MOVW       R0, #0x8080
  0x34181598:  F2C5 6002    MOVT       R0, #0x5602
  0x3418159C:  6800         LDR        R0, [R0]
  0x3418159E:  F3C0 60C0    UBFX       R0, R0, #27, #1
  0x341815A2:  4770         BX         LR

Section .text.LL_RCC_PLL2_IsEnabledBypass from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL2_IsEnabledBypass:
  0x341815A4:  F248 0090    MOVW       R0, #0x8090
  0x341815A8:  F2C5 6002    MOVT       R0, #0x5602
  0x341815AC:  6800         LDR        R0, [R0]
  0x341815AE:  F3C0 60C0    UBFX       R0, R0, #27, #1
  0x341815B2:  4770         BX         LR

Section .text.LL_RCC_PLL3_IsEnabledBypass from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL3_IsEnabledBypass:
  0x341815B4:  F248 00A0    MOVW       R0, #0x80A0
  0x341815B8:  F2C5 6002    MOVT       R0, #0x5602
  0x341815BC:  6800         LDR        R0, [R0]
  0x341815BE:  F3C0 60C0    UBFX       R0, R0, #27, #1
  0x341815C2:  4770         BX         LR

Section .text.LL_RCC_PLL4_IsEnabledBypass from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL4_IsEnabledBypass:
  0x341815C4:  F248 00B0    MOVW       R0, #0x80B0
  0x341815C8:  F2C5 6002    MOVT       R0, #0x5602
  0x341815CC:  6800         LDR        R0, [R0]
  0x341815CE:  F3C0 60C0    UBFX       R0, R0, #27, #1
  0x341815D2:  4770         BX         LR

Section .text.HAL_RCC_GetClockConfig from blto2_FSBL_lto.o, size=240, align=4


HAL_RCC_GetClockConfig:
  0x341815D4:  B082         SUB        SP, SP, #8
  0x341815D6:  9001         STR        R0, [SP, #4]
  0x341815D8:  9901         LDR        R1, [SP, #4]
  0x341815DA:  207F         MOVS       R0, #127
  0x341815DC:  6008         STR        R0, [R1]
  0x341815DE:  F248 0020    MOVW       R0, #0x8020
  0x341815E2:  F2C5 6002    MOVT       R0, #0x5602
  0x341815E6:  6800         LDR        R0, [R0]
  0x341815E8:  9000         STR        R0, [SP, #0]
  0x341815EA:  9800         LDR        R0, [SP, #0]
  0x341815EC:  F400 1040    AND        R0, R0, #0x300000
  0x341815F0:  0900         LSRS       R0, R0, #4
  0x341815F2:  9901         LDR        R1, [SP, #4]
  0x341815F4:  6048         STR        R0, [R1, #4]
  0x341815F6:  9800         LDR        R0, [SP, #0]
  0x341815F8:  F000 5040    AND        R0, R0, #0x30000000
  0x341815FC:  0900         LSRS       R0, R0, #4
  0x341815FE:  9901         LDR        R1, [SP, #4]
  0x34181600:  6088         STR        R0, [R1, #8]
  0x34181602:  F248 0024    MOVW       R0, #0x8024
  0x34181606:  F2C5 6002    MOVT       R0, #0x5602
  0x3418160A:  6800         LDR        R0, [R0]
  0x3418160C:  9000         STR        R0, [SP, #0]
  0x3418160E:  9800         LDR        R0, [SP, #0]
  0x34181610:  F400 00E0    AND        R0, R0, #0x700000
  0x34181614:  9901         LDR        R1, [SP, #4]
  0x34181616:  60C8         STR        R0, [R1, #12]
  0x34181618:  9800         LDR        R0, [SP, #0]
  0x3418161A:  F000 0007    AND        R0, R0, #7
  0x3418161E:  9901         LDR        R1, [SP, #4]
  0x34181620:  6108         STR        R0, [R1, #16]
  0x34181622:  9800         LDR        R0, [SP, #0]
  0x34181624:  F000 0070    AND        R0, R0, #112
  0x34181628:  9901         LDR        R1, [SP, #4]
  0x3418162A:  6148         STR        R0, [R1, #20]
  0x3418162C:  9800         LDR        R0, [SP, #0]
  0x3418162E:  F400 40E0    AND        R0, R0, #0x7000
  0x34181632:  9901         LDR        R1, [SP, #4]
  0x34181634:  6188         STR        R0, [R1, #24]
  0x34181636:  9800         LDR        R0, [SP, #0]
  0x34181638:  F400 20E0    AND        R0, R0, #0x070000
  0x3418163C:  9901         LDR        R1, [SP, #4]
  0x3418163E:  61C8         STR        R0, [R1, #28]
  0x34181640:  F248 00C4    MOVW       R0, #0x80C4
  0x34181644:  F2C5 6002    MOVT       R0, #0x5602
  0x34181648:  6800         LDR        R0, [R0]
  0x3418164A:  9000         STR        R0, [SP, #0]
  0x3418164C:  9800         LDR        R0, [SP, #0]
  0x3418164E:  F000 5040    AND        R0, R0, #0x30000000
  0x34181652:  9901         LDR        R1, [SP, #4]
  0x34181654:  6208         STR        R0, [R1, #32]
  0x34181656:  F89D 0002    LDRB.W     R0, [SP, #2]
  0x3418165A:  3001         ADDS       R0, #1
  0x3418165C:  9901         LDR        R1, [SP, #4]
  0x3418165E:  6248         STR        R0, [R1, #36]
  0x34181660:  F248 00C8    MOVW       R0, #0x80C8
  0x34181664:  F2C5 6002    MOVT       R0, #0x5602
  0x34181668:  6800         LDR        R0, [R0]
  0x3418166A:  9000         STR        R0, [SP, #0]
  0x3418166C:  9800         LDR        R0, [SP, #0]
  0x3418166E:  F000 5040    AND        R0, R0, #0x30000000
  0x34181672:  9901         LDR        R1, [SP, #4]
  0x34181674:  6288         STR        R0, [R1, #40]
  0x34181676:  F89D 0002    LDRB.W     R0, [SP, #2]
  0x3418167A:  3001         ADDS       R0, #1
  0x3418167C:  9901         LDR        R1, [SP, #4]
  0x3418167E:  62C8         STR        R0, [R1, #44]
  0x34181680:  F248 00D8    MOVW       R0, #0x80D8
  0x34181684:  F2C5 6002    MOVT       R0, #0x5602
  0x34181688:  6800         LDR        R0, [R0]
  0x3418168A:  9000         STR        R0, [SP, #0]
  0x3418168C:  9800         LDR        R0, [SP, #0]
  0x3418168E:  F000 5040    AND        R0, R0, #0x30000000
  0x34181692:  9901         LDR        R1, [SP, #4]
  0x34181694:  6308         STR        R0, [R1, #48]
  0x34181696:  F89D 0002    LDRB.W     R0, [SP, #2]
  0x3418169A:  3001         ADDS       R0, #1
  0x3418169C:  9901         LDR        R1, [SP, #4]
  0x3418169E:  6348         STR        R0, [R1, #52]
  0x341816A0:  F248 00EC    MOVW       R0, #0x80EC
  0x341816A4:  F2C5 6002    MOVT       R0, #0x5602
  0x341816A8:  6800         LDR        R0, [R0]
  0x341816AA:  9000         STR        R0, [SP, #0]
  0x341816AC:  9800         LDR        R0, [SP, #0]
  0x341816AE:  F000 5040    AND        R0, R0, #0x30000000
  0x341816B2:  9901         LDR        R1, [SP, #4]
  0x341816B4:  6388         STR        R0, [R1, #56]
  0x341816B6:  F89D 0002    LDRB.W     R0, [SP, #2]
  0x341816BA:  3001         ADDS       R0, #1
  0x341816BC:  9901         LDR        R1, [SP, #4]
  0x341816BE:  63C8         STR        R0, [R1, #60]
  0x341816C0:  B002         ADD        SP, SP, #8
  0x341816C2:  4770         BX         LR

Section .text.LL_RCC_PLL4_IsReady.57 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL4_IsReady.57:
  0x341816C4:  F248 0004    MOVW       R0, #0x8004
  0x341816C8:  F2C5 6002    MOVT       R0, #0x5602
  0x341816CC:  6800         LDR        R0, [R0]
  0x341816CE:  F3C0 20C0    UBFX       R0, R0, #11, #1
  0x341816D2:  4770         BX         LR

Section .text.LL_RCC_PLL4P_IsEnabled from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL4P_IsEnabled:
  0x341816D4:  F248 00B8    MOVW       R0, #0x80B8
  0x341816D8:  F2C5 6002    MOVT       R0, #0x5602
  0x341816DC:  6800         LDR        R0, [R0]
  0x341816DE:  F3C0 7080    UBFX       R0, R0, #30, #1
  0x341816E2:  4770         BX         LR

Section .text.LL_RCC_PLL4_GetSource.58 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL4_GetSource.58:
  0x341816E4:  F248 00B0    MOVW       R0, #0x80B0
  0x341816E8:  F2C5 6002    MOVT       R0, #0x5602
  0x341816EC:  6800         LDR        R0, [R0]
  0x341816EE:  F000 40E0    AND        R0, R0, #0x70000000
  0x341816F2:  4770         BX         LR

Section .text.RCCEx_GetPLLSourceFreq from blto2_FSBL_lto.o, size=140, align=4


RCCEx_GetPLLSourceFreq:
  0x341816F4:  B580         PUSH       123R7, LR}
  0x341816F6:  B084         SUB        SP, SP, #16
  0x341816F8:  9003         STR        R0, [SP, #12]
  0x341816FA:  2000         MOVS       R0, #0
  0x341816FC:  9002         STR        R0, [SP, #8]
  0x341816FE:  9803         LDR        R0, [SP, #12]
  0x34181700:  9001         STR        R0, [SP, #4]
  0x34181702:  B160         CBZ        R0, .L1                  ; 0x3418171E
  0x34181704:  9801         LDR        R0, [SP, #4]
  0x34181706:  F1B0 5F80    CMP.W      R0, #0x10000000
  0x3418170A:  D015         BEQ        46L3                      ; 0x34181738
  0x3418170C:  9801         LDR        R0, [SP, #4]
  0x3418170E:  F1B0 5F00    CMP.W      R0, #0x20000000
  0x34181712:  D023         BEQ        46L6                      ; 0x3418175C
  0x34181714:  9801         LDR        R0, [SP, #4]
  0x34181716:  F1B0 5F40    CMP.W      R0, #0x30000000
  0x3418171A:  D028         BEQ        46L8                      ; 0x3418176E
  0x3418171C:  E02D         B          46L9                      ; 0x3418177A

.L1:
  0x3418171E:  F000 F8A3    BL         LL_RCC_HSI_IsReady.60    ; 0x34181868
  0x34181722:  B140         CBZ        R0, .L2                  ; 0x34181736
  0x34181724:  F000 F8A8    BL         LL_RCC_HSI_GetDivider.61 ; 0x34181878
  0x34181728:  09C1         LSRS       R1, R0, #7
  0x3418172A:  F249 0000    MOVW       R0, #0x9000
  0x3418172E:  F2C0 30D0    MOVT       R0, #0x03D0
  0x34181732:  40C8         LSRS       R0, R1
  0x34181734:  9002         STR        R0, [SP, #8]

.L2:
  0x34181736:  E020         B          46L9                      ; 0x3418177A

.L3:
  0x34181738:  F000 F8A6    BL         LL_RCC_MSI_IsReady.62    ; 0x34181888
  0x3418173C:  B168         CBZ        R0, .L5                  ; 0x3418175A
  0x3418173E:  F000 F8AB    BL         LL_RCC_MSI_GetFrequency  ; 0x34181898
  0x34181742:  B928         CBNZ       R0, .L4                  ; 0x34181750
  0x34181744:  F640 1000    MOVW       R0, #0x0900
  0x34181748:  F2C0 003D    MOVT       R0, #61
  0x3418174C:  9002         STR        R0, [SP, #8]
  0x3418174E:  E004         B          46L5                      ; 0x3418175A

.L4:
  0x34181750:  F242 4000    MOVW       R0, #0x2400
  0x34181754:  F2C0 00F4    MOVT       R0, #244
  0x34181758:  9002         STR        R0, [SP, #8]

.L5:
  0x3418175A:  E00E         B          46L9                      ; 0x3418177A

.L6:
  0x3418175C:  F000 F8A4    BL         LL_RCC_HSE_IsReady.63    ; 0x341818A8
  0x34181760:  B120         CBZ        R0, .L7                  ; 0x3418176C
  0x34181762:  F646 4000    MOVW       R0, #0x6C00
  0x34181766:  F2C0 20DC    MOVT       R0, #0x02DC
  0x3418176A:  9002         STR        R0, [SP, #8]

.L7:
  0x3418176C:  E005         B          46L9                      ; 0x3418177A

.L8:
  0x3418176E:  F248 0000    MOVW       R0, #0x8000
  0x34181772:  F2C0 00BB    MOVT       R0, #187
  0x34181776:  9002         STR        R0, [SP, #8]
  0x34181778:  E7FF         B          46L9                      ; 0x3418177A

.L9:
  0x3418177A:  9802         LDR        R0, [SP, #8]
  0x3418177C:  B004         ADD        SP, SP, #16
  0x3418177E:  BD80         POP        123R7, PC}

Section .text.LL_RCC_PLL4_GetM from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL4_GetM:
  0x34181780:  F248 00B0    MOVW       R0, #0x80B0
  0x34181784:  F2C5 6002    MOVT       R0, #0x5602
  0x34181788:  6800         LDR        R0, [R0]
  0x3418178A:  F3C0 5005    UBFX       R0, R0, #20, #6
  0x3418178E:  4770         BX         LR

Section .text.LL_RCC_PLL4_GetN from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL4_GetN:
  0x34181790:  F248 00B0    MOVW       R0, #0x80B0
  0x34181794:  F2C5 6002    MOVT       R0, #0x5602
  0x34181798:  6800         LDR        R0, [R0]
  0x3418179A:  F3C0 200B    UBFX       R0, R0, #8, #12
  0x3418179E:  4770         BX         LR

Section .text.LL_RCC_PLL4_GetFRACN from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL4_GetFRACN:
  0x341817A0:  F248 00B4    MOVW       R0, #0x80B4
  0x341817A4:  F2C5 6002    MOVT       R0, #0x5602
  0x341817A8:  6800         LDR        R0, [R0]
  0x341817AA:  F020 407F    BIC        R0, R0, #0xFF000000
  0x341817AE:  4770         BX         LR

Section .text.LL_RCC_PLL4_GetP1 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL4_GetP1:
  0x341817B0:  F248 00B8    MOVW       R0, #0x80B8
  0x341817B4:  F2C5 6002    MOVT       R0, #0x5602
  0x341817B8:  6800         LDR        R0, [R0]
  0x341817BA:  F3C0 60C2    UBFX       R0, R0, #27, #3
  0x341817BE:  4770         BX         LR

Section .text.LL_RCC_PLL4_GetP2 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL4_GetP2:
  0x341817C0:  F248 00B8    MOVW       R0, #0x80B8
  0x341817C4:  F2C5 6002    MOVT       R0, #0x5602
  0x341817C8:  6800         LDR        R0, [R0]
  0x341817CA:  F3C0 6002    UBFX       R0, R0, #24, #3
  0x341817CE:  4770         BX         LR

Section .text.RCCEx_CalcPLLFreq from blto2_FSBL_lto.o, size=136, align=4


RCCEx_CalcPLLFreq:
  0x341817D0:  B085         SUB        SP, SP, #20
  0x341817D2:  F8DD C018    LDR.W      R12, [SP, #24]
  0x341817D6:  F8DD C014    LDR.W      R12, [SP, #20]
  0x341817DA:  9004         STR        R0, [SP, #16]
  0x341817DC:  9103         STR        R1, [SP, #12]
  0x341817DE:  9202         STR        R2, [SP, #8]
  0x341817E0:  9301         STR        R3, [SP, #4]
  0x341817E2:  ED9D 0A04    VLDR       S0, [SP, #16]
  0x341817E6:  EEB8 0A40    VCVT.F32.U32 S0, S0
  0x341817EA:  ED9D 1A02    VLDR       S2, [SP, #8]
  0x341817EE:  EEB8 1A41    VCVT.F32.U32 S2, S2
  0x341817F2:  ED9D 2A01    VLDR       S4, [SP, #4]
  0x341817F6:  EEB8 2A42    VCVT.F32.U32 S4, S4
  0x341817FA:  ED9F 3A16    VLDR       S6, =0x33800000          ; [PC, #88] [0x34181854]
  0x341817FE:  EE22 2A03    VMUL.F32   S4, S4, S6
  0x34181802:  EE31 1A02    VADD.F32   S2, S2, S4
  0x34181806:  EE20 0A01    VMUL.F32   S0, S0, S2
  0x3418180A:  ED9D 1A03    VLDR       S2, [SP, #12]
  0x3418180E:  EEB8 1A41    VCVT.F32.U32 S2, S2
  0x34181812:  EE80 0A01    VDIV.F32   S0, S0, S2
  0x34181816:  ED8D 0A00    VSTR       S0, [SP]
  0x3418181A:  ED9D 0A00    VLDR       S0, [SP]
  0x3418181E:  ED9D 1A05    VLDR       S2, [SP, #20]
  0x34181822:  EEB8 1A41    VCVT.F32.U32 S2, S2
  0x34181826:  EE80 0A01    VDIV.F32   S0, S0, S2
  0x3418182A:  ED8D 0A00    VSTR       S0, [SP]
  0x3418182E:  ED9D 0A00    VLDR       S0, [SP]
  0x34181832:  ED9D 1A06    VLDR       S2, [SP, #24]
  0x34181836:  EEB8 1A41    VCVT.F32.U32 S2, S2
  0x3418183A:  EE80 0A01    VDIV.F32   S0, S0, S2
  0x3418183E:  ED8D 0A00    VSTR       S0, [SP]
  0x34181842:  ED9D 0A00    VLDR       S0, [SP]
  0x34181846:  EEBC 0AC0    VCVT.U32.F32 S0, S0
  0x3418184A:  EE10 0A10    VMOV       R0, S0
  0x3418184E:  B005         ADD        SP, SP, #20
  0x34181850:  4770         BX         LR
  0x34181852:  BF00         NOP
  0x34181854:  33800000     DC.W       0x33800000

Section .text.LL_RCC_PLL4_IsEnabledBypass.59 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL4_IsEnabledBypass.59:
  0x34181858:  F248 00B0    MOVW       R0, #0x80B0
  0x3418185C:  F2C5 6002    MOVT       R0, #0x5602
  0x34181860:  6800         LDR        R0, [R0]
  0x34181862:  F3C0 60C0    UBFX       R0, R0, #27, #1
  0x34181866:  4770         BX         LR

Section .text.LL_RCC_HSI_IsReady.60 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_HSI_IsReady.60:
  0x34181868:  F248 0004    MOVW       R0, #0x8004
  0x3418186C:  F2C5 6002    MOVT       R0, #0x5602
  0x34181870:  6800         LDR        R0, [R0]
  0x34181872:  F3C0 00C0    UBFX       R0, R0, #3, #1
  0x34181876:  4770         BX         LR

Section .text.LL_RCC_HSI_GetDivider.61 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_HSI_GetDivider.61:
  0x34181878:  F248 0048    MOVW       R0, #0x8048
  0x3418187C:  F2C5 6002    MOVT       R0, #0x5602
  0x34181880:  6800         LDR        R0, [R0]
  0x34181882:  F400 70C0    AND        R0, R0, #0x0180
  0x34181886:  4770         BX         LR

Section .text.LL_RCC_MSI_IsReady.62 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_MSI_IsReady.62:
  0x34181888:  F248 0004    MOVW       R0, #0x8004
  0x3418188C:  F2C5 6002    MOVT       R0, #0x5602
  0x34181890:  6800         LDR        R0, [R0]
  0x34181892:  F3C0 0080    UBFX       R0, R0, #2, #1
  0x34181896:  4770         BX         LR

Section .text.LL_RCC_MSI_GetFrequency from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_MSI_GetFrequency:
  0x34181898:  F248 0044    MOVW       R0, #0x8044
  0x3418189C:  F2C5 6002    MOVT       R0, #0x5602
  0x341818A0:  6800         LDR        R0, [R0]
  0x341818A2:  F400 7000    AND        R0, R0, #0x0200
  0x341818A6:  4770         BX         LR

Section .text.LL_RCC_HSE_IsReady.63 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_HSE_IsReady.63:
  0x341818A8:  F248 0004    MOVW       R0, #0x8004
  0x341818AC:  F2C5 6002    MOVT       R0, #0x5602
  0x341818B0:  6800         LDR        R0, [R0]
  0x341818B2:  F3C0 1000    UBFX       R0, R0, #4, #1
  0x341818B6:  4770         BX         LR

Section .text.LL_RCC_PLL3_IsReady.64 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL3_IsReady.64:
  0x341818B8:  F248 0004    MOVW       R0, #0x8004
  0x341818BC:  F2C5 6002    MOVT       R0, #0x5602
  0x341818C0:  6800         LDR        R0, [R0]
  0x341818C2:  F3C0 2080    UBFX       R0, R0, #10, #1
  0x341818C6:  4770         BX         LR

Section .text.LL_RCC_PLL3P_IsEnabled from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL3P_IsEnabled:
  0x341818C8:  F248 00A8    MOVW       R0, #0x80A8
  0x341818CC:  F2C5 6002    MOVT       R0, #0x5602
  0x341818D0:  6800         LDR        R0, [R0]
  0x341818D2:  F3C0 7080    UBFX       R0, R0, #30, #1
  0x341818D6:  4770         BX         LR

Section .text.LL_RCC_PLL3_GetSource.65 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL3_GetSource.65:
  0x341818D8:  F248 00A0    MOVW       R0, #0x80A0
  0x341818DC:  F2C5 6002    MOVT       R0, #0x5602
  0x341818E0:  6800         LDR        R0, [R0]
  0x341818E2:  F000 40E0    AND        R0, R0, #0x70000000
  0x341818E6:  4770         BX         LR

Section .text.LL_RCC_PLL3_GetM from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL3_GetM:
  0x341818E8:  F248 00A0    MOVW       R0, #0x80A0
  0x341818EC:  F2C5 6002    MOVT       R0, #0x5602
  0x341818F0:  6800         LDR        R0, [R0]
  0x341818F2:  F3C0 5005    UBFX       R0, R0, #20, #6
  0x341818F6:  4770         BX         LR

Section .text.LL_RCC_PLL3_GetN from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL3_GetN:
  0x341818F8:  F248 00A0    MOVW       R0, #0x80A0
  0x341818FC:  F2C5 6002    MOVT       R0, #0x5602
  0x34181900:  6800         LDR        R0, [R0]
  0x34181902:  F3C0 200B    UBFX       R0, R0, #8, #12
  0x34181906:  4770         BX         LR

Section .text.LL_RCC_PLL3_GetFRACN from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL3_GetFRACN:
  0x34181908:  F248 00A4    MOVW       R0, #0x80A4
  0x3418190C:  F2C5 6002    MOVT       R0, #0x5602
  0x34181910:  6800         LDR        R0, [R0]
  0x34181912:  F020 407F    BIC        R0, R0, #0xFF000000
  0x34181916:  4770         BX         LR

Section .text.LL_RCC_PLL3_GetP1 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL3_GetP1:
  0x34181918:  F248 00A8    MOVW       R0, #0x80A8
  0x3418191C:  F2C5 6002    MOVT       R0, #0x5602
  0x34181920:  6800         LDR        R0, [R0]
  0x34181922:  F3C0 60C2    UBFX       R0, R0, #27, #3
  0x34181926:  4770         BX         LR

Section .text.LL_RCC_PLL3_GetP2 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL3_GetP2:
  0x34181928:  F248 00A8    MOVW       R0, #0x80A8
  0x3418192C:  F2C5 6002    MOVT       R0, #0x5602
  0x34181930:  6800         LDR        R0, [R0]
  0x34181932:  F3C0 6002    UBFX       R0, R0, #24, #3
  0x34181936:  4770         BX         LR

Section .text.LL_RCC_PLL3_IsEnabledBypass.66 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL3_IsEnabledBypass.66:
  0x34181938:  F248 00A0    MOVW       R0, #0x80A0
  0x3418193C:  F2C5 6002    MOVT       R0, #0x5602
  0x34181940:  6800         LDR        R0, [R0]
  0x34181942:  F3C0 60C0    UBFX       R0, R0, #27, #1
  0x34181946:  4770         BX         LR

Section .text.LL_RCC_PLL2_IsReady.67 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL2_IsReady.67:
  0x34181948:  F248 0004    MOVW       R0, #0x8004
  0x3418194C:  F2C5 6002    MOVT       R0, #0x5602
  0x34181950:  6800         LDR        R0, [R0]
  0x34181952:  F3C0 2040    UBFX       R0, R0, #9, #1
  0x34181956:  4770         BX         LR

Section .text.LL_RCC_PLL2P_IsEnabled from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL2P_IsEnabled:
  0x34181958:  F248 0098    MOVW       R0, #0x8098
  0x3418195C:  F2C5 6002    MOVT       R0, #0x5602
  0x34181960:  6800         LDR        R0, [R0]
  0x34181962:  F3C0 7080    UBFX       R0, R0, #30, #1
  0x34181966:  4770         BX         LR

Section .text.LL_RCC_PLL2_GetSource.68 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL2_GetSource.68:
  0x34181968:  F248 0090    MOVW       R0, #0x8090
  0x3418196C:  F2C5 6002    MOVT       R0, #0x5602
  0x34181970:  6800         LDR        R0, [R0]
  0x34181972:  F000 40E0    AND        R0, R0, #0x70000000
  0x34181976:  4770         BX         LR

Section .text.LL_RCC_PLL2_GetM from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL2_GetM:
  0x34181978:  F248 0090    MOVW       R0, #0x8090
  0x3418197C:  F2C5 6002    MOVT       R0, #0x5602
  0x34181980:  6800         LDR        R0, [R0]
  0x34181982:  F3C0 5005    UBFX       R0, R0, #20, #6
  0x34181986:  4770         BX         LR

Section .text.LL_RCC_PLL2_GetN from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL2_GetN:
  0x34181988:  F248 0090    MOVW       R0, #0x8090
  0x3418198C:  F2C5 6002    MOVT       R0, #0x5602
  0x34181990:  6800         LDR        R0, [R0]
  0x34181992:  F3C0 200B    UBFX       R0, R0, #8, #12
  0x34181996:  4770         BX         LR

Section .text.LL_RCC_PLL2_GetFRACN from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL2_GetFRACN:
  0x34181998:  F248 0094    MOVW       R0, #0x8094
  0x3418199C:  F2C5 6002    MOVT       R0, #0x5602
  0x341819A0:  6800         LDR        R0, [R0]
  0x341819A2:  F020 407F    BIC        R0, R0, #0xFF000000
  0x341819A6:  4770         BX         LR

Section .text.LL_RCC_PLL2_GetP1 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL2_GetP1:
  0x341819A8:  F248 0098    MOVW       R0, #0x8098
  0x341819AC:  F2C5 6002    MOVT       R0, #0x5602
  0x341819B0:  6800         LDR        R0, [R0]
  0x341819B2:  F3C0 60C2    UBFX       R0, R0, #27, #3
  0x341819B6:  4770         BX         LR

Section .text.LL_RCC_PLL2_GetP2 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL2_GetP2:
  0x341819B8:  F248 0098    MOVW       R0, #0x8098
  0x341819BC:  F2C5 6002    MOVT       R0, #0x5602
  0x341819C0:  6800         LDR        R0, [R0]
  0x341819C2:  F3C0 6002    UBFX       R0, R0, #24, #3
  0x341819C6:  4770         BX         LR

Section .text.LL_RCC_PLL2_IsEnabledBypass.69 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL2_IsEnabledBypass.69:
  0x341819C8:  F248 0090    MOVW       R0, #0x8090
  0x341819CC:  F2C5 6002    MOVT       R0, #0x5602
  0x341819D0:  6800         LDR        R0, [R0]
  0x341819D2:  F3C0 60C0    UBFX       R0, R0, #27, #1
  0x341819D6:  4770         BX         LR

Section .text.LL_RCC_PLL1_IsReady.70 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL1_IsReady.70:
  0x341819D8:  F248 0004    MOVW       R0, #0x8004
  0x341819DC:  F2C5 6002    MOVT       R0, #0x5602
  0x341819E0:  6800         LDR        R0, [R0]
  0x341819E2:  F3C0 2000    UBFX       R0, R0, #8, #1
  0x341819E6:  4770         BX         LR

Section .text.LL_RCC_PLL1P_IsEnabled from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL1P_IsEnabled:
  0x341819E8:  F248 0088    MOVW       R0, #0x8088
  0x341819EC:  F2C5 6002    MOVT       R0, #0x5602
  0x341819F0:  6800         LDR        R0, [R0]
  0x341819F2:  F3C0 7080    UBFX       R0, R0, #30, #1
  0x341819F6:  4770         BX         LR

Section .text.LL_RCC_PLL1_GetSource.71 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL1_GetSource.71:
  0x341819F8:  F248 0080    MOVW       R0, #0x8080
  0x341819FC:  F2C5 6002    MOVT       R0, #0x5602
  0x34181A00:  6800         LDR        R0, [R0]
  0x34181A02:  F000 40E0    AND        R0, R0, #0x70000000
  0x34181A06:  4770         BX         LR

Section .text.LL_RCC_PLL1_GetM from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL1_GetM:
  0x34181A08:  F248 0080    MOVW       R0, #0x8080
  0x34181A0C:  F2C5 6002    MOVT       R0, #0x5602
  0x34181A10:  6800         LDR        R0, [R0]
  0x34181A12:  F3C0 5005    UBFX       R0, R0, #20, #6
  0x34181A16:  4770         BX         LR

Section .text.LL_RCC_PLL1_GetN from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL1_GetN:
  0x34181A18:  F248 0080    MOVW       R0, #0x8080
  0x34181A1C:  F2C5 6002    MOVT       R0, #0x5602
  0x34181A20:  6800         LDR        R0, [R0]
  0x34181A22:  F3C0 200B    UBFX       R0, R0, #8, #12
  0x34181A26:  4770         BX         LR

Section .text.LL_RCC_PLL1_GetFRACN from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL1_GetFRACN:
  0x34181A28:  F248 0084    MOVW       R0, #0x8084
  0x34181A2C:  F2C5 6002    MOVT       R0, #0x5602
  0x34181A30:  6800         LDR        R0, [R0]
  0x34181A32:  F020 407F    BIC        R0, R0, #0xFF000000
  0x34181A36:  4770         BX         LR

Section .text.LL_RCC_PLL1_GetP1 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL1_GetP1:
  0x34181A38:  F248 0088    MOVW       R0, #0x8088
  0x34181A3C:  F2C5 6002    MOVT       R0, #0x5602
  0x34181A40:  6800         LDR        R0, [R0]
  0x34181A42:  F3C0 60C2    UBFX       R0, R0, #27, #3
  0x34181A46:  4770         BX         LR

Section .text.LL_RCC_PLL1_GetP2 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL1_GetP2:
  0x34181A48:  F248 0088    MOVW       R0, #0x8088
  0x34181A4C:  F2C5 6002    MOVT       R0, #0x5602
  0x34181A50:  6800         LDR        R0, [R0]
  0x34181A52:  F3C0 6002    UBFX       R0, R0, #24, #3
  0x34181A56:  4770         BX         LR

Section .text.LL_RCC_PLL1_IsEnabledBypass.72 from blto2_FSBL_lto.o, size=16, align=4


LL_RCC_PLL1_IsEnabledBypass.72:
  0x34181A58:  F248 0080    MOVW       R0, #0x8080
  0x34181A5C:  F2C5 6002    MOVT       R0, #0x5602
  0x34181A60:  6800         LDR        R0, [R0]
  0x34181A62:  F3C0 60C0    UBFX       R0, R0, #27, #1
  0x34181A66:  4770         BX         LR

Section .init._start from SEGGER_THUMB_Startup.o, size=20, align=4


_start:
  0x34181A68:  4C03         LDR        R4, =0x34184470          ; [PC, #12] [0x34181A78] 

.L1:
  0x34181A6A:  6820         LDR        R0, [R4]
  0x34181A6C:  3404         ADDS       R4, #4
  0x34181A6E:  4780         BLX        R0
  0x34181A70:  E7FB         B          46L1                      ; 0x34181A6A

__SEGGER_init_done:
__startup_complete:
  0x34181A72:  F000 F949    BL         main                     ; 0x34181D08

exit:
  0x34181A76:  E7FE         B          exit                     ; 0x34181A76
  0x34181A78:  34184470     DC.W       34184470               ; R_ARM_ABS32

Section .init.Reset_Handler from STM32N6xx_Startup.o, size=44, align=4


reset_handler:
Reset_Handler:
  0x34181A7C:  4909         LDR        R1, =0x341FC000          ; [PC, #36] [0x34181AA4] 
  0x34181A7E:  F381 880A    MSR        MSPLIM, R1
  0x34181A82:  F04F 0100    MOV.W      R1, #0
  0x34181A86:  F381 880B    MSR        PSPLIM, R1
  0x34181A8A:  F000 F9ED    BL         SystemInit               ; 0x34181E68
  0x34181A8E:  F64E 5088    MOVW       R0, #0xED88
  0x34181A92:  F2CE 0000    MOVT       R0, #0xE000
  0x34181A96:  6801         LDR        R1, [R0]
  0x34181A98:  F451 0170    ORRS       R1, R1, #0xF00000
  0x34181A9C:  6001         STR        R1, [R0]
  0x34181A9E:  F7FF FFE3    BL         _start                   ; 0x34181A68
  0x34181AA2:  00           DC.B       0x00                     ; '\0'
  0x34181AA3:  00           DC.B       0x00                     ; '\0'
  0x34181AA4:  341FC000     DC.W       341FC000               ; R_ARM_ABS32

Section .text.libc.__aeabi_memclr from strasmops_arm.o (strops_unaligned_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=104, align=4


__aeabi_memclr:
__aeabi_memclr8:
__aeabi_memclr4:
  0x34181AA8:  2200         MOVS       R2, #0

__aeabi_memset8:
__aeabi_memset4:
__aeabi_memset:
  0x34181AAA:  000B         MOVS       R3, R1
  0x34181AAC:  0011         MOVS       R1, R2
  0x34181AAE:  001A         MOVS       R2, R3

memset:
  0x34181AB0:  4684         MOV        R12, R0
  0x34181AB2:  B35A         CBZ        R2, .L7                  ; 0x34181B0C

.L1:
  0x34181AB4:  0783         LSLS       R3, R0, #30
  0x34181AB6:  D004         BEQ        46L2                      ; 0x34181AC2
  0x34181AB8:  F800 1B01    STRB       R1, [R0], #1
  0x34181ABC:  1E52         SUBS       R2, R2, #1
  0x34181ABE:  D1F9         BNE        46L1                      ; 0x34181AB4
  0x34181AC0:  E024         B          46L7                      ; 0x34181B0C

.L2:
  0x34181AC2:  B2C9         UXTB       R1, R1
  0x34181AC4:  EA41 2101    ORR.W      R1, R1, R1, LSL #8
  0x34181AC8:  EA41 4101    ORR.W      R1, R1, R1, LSL #16
  0x34181ACC:  2A20         CMP        R2, #32
  0x34181ACE:  D311         BCC        46L4                      ; 0x34181AF4
  0x34181AD0:  3A20         SUBS       R2, #32
  0x34181AD2:  E92D 03F0    PUSH.W     123R4-R9}
  0x34181AD6:  460B         MOV        R3, R1
  0x34181AD8:  460C         MOV        R4, R1
  0x34181ADA:  460D         MOV        R5, R1
  0x34181ADC:  460E         MOV        R6, R1
  0x34181ADE:  460F         MOV        R7, R1
  0x34181AE0:  4688         MOV        R8, R1
  0x34181AE2:  4689         MOV        R9, R1

.L3:
  0x34181AE4:  E8A0 03FA    STM.W      R0!, {R1, R3-R9}
  0x34181AE8:  3A20         SUBS       R2, #32
  0x34181AEA:  D2FB         BCS        46L3                      ; 0x34181AE4
  0x34181AEC:  E8BD 03F0    POP.W      123R4-R9}
  0x34181AF0:  3220         ADDS       R2, #32
  0x34181AF2:  D00B         BEQ        46L7                      ; 0x34181B0C

.L4:
  0x34181AF4:  2A04         CMP        R2, #4
  0x34181AF6:  D305         BCC        46L6                      ; 0x34181B04

.L5:
  0x34181AF8:  F840 1B04    STR        R1, [R0], #4
  0x34181AFC:  1F12         SUBS       R2, R2, #4
  0x34181AFE:  D005         BEQ        46L7                      ; 0x34181B0C
  0x34181B00:  2A04         CMP        R2, #4
  0x34181B02:  D2F9         BCS        46L5                      ; 0x34181AF8

.L6:
  0x34181B04:  F800 1B01    STRB       R1, [R0], #1
  0x34181B08:  1E52         SUBS       R2, R2, #1
  0x34181B0A:  D1FB         BNE        46L6                      ; 0x34181B04

.L7:
  0x34181B0C:  4660         MOV        R0, R12
  0x34181B0E:  4770         BX         LR

Section .text.MX_GPIO_Init from blto2_FSBL_lto.o, size=466, align=4


MX_GPIO_Init:
  0x34181B10:  B580         PUSH       123R7, LR}
  0x34181B12:  B08C         SUB        SP, SP, #48
  0x34181B14:  2000         MOVS       R0, #0
  0x34181B16:  9004         STR        R0, [SP, #16]
  0x34181B18:  900B         STR        R0, [SP, #44]
  0x34181B1A:  900A         STR        R0, [SP, #40]
  0x34181B1C:  9009         STR        R0, [SP, #36]
  0x34181B1E:  9008         STR        R0, [SP, #32]
  0x34181B20:  9007         STR        R0, [SP, #28]
  0x34181B22:  F44F 3080    MOV.W      R0, #0x010000
  0x34181B26:  F000 F8DD    BL         LL_AHB4_GRP1_EnableClock ; 0x34181CE4
  0x34181B2A:  2004         MOVS       R0, #4
  0x34181B2C:  F000 F8DA    BL         LL_AHB4_GRP1_EnableClock ; 0x34181CE4
  0x34181B30:  2010         MOVS       R0, #16
  0x34181B32:  F000 F8D7    BL         LL_AHB4_GRP1_EnableClock ; 0x34181CE4
  0x34181B36:  2008         MOVS       R0, #8
  0x34181B38:  F000 F8D4    BL         LL_AHB4_GRP1_EnableClock ; 0x34181CE4
  0x34181B3C:  2080         MOVS       R0, #128
  0x34181B3E:  F000 F8D1    BL         LL_AHB4_GRP1_EnableClock ; 0x34181CE4
  0x34181B42:  2002         MOVS       R0, #2
  0x34181B44:  F000 F8CE    BL         LL_AHB4_GRP1_EnableClock ; 0x34181CE4
  0x34181B48:  F44F 4000    MOV.W      R0, #0x8000
  0x34181B4C:  F000 F8CA    BL         LL_AHB4_GRP1_EnableClock ; 0x34181CE4
  0x34181B50:  F44F 4080    MOV.W      R0, #0x4000
  0x34181B54:  F000 F8C6    BL         LL_AHB4_GRP1_EnableClock ; 0x34181CE4
  0x34181B58:  2040         MOVS       R0, #64
  0x34181B5A:  F000 F8C3    BL         LL_AHB4_GRP1_EnableClock ; 0x34181CE4
  0x34181B5E:  2020         MOVS       R0, #32
  0x34181B60:  F000 F8C0    BL         LL_AHB4_GRP1_EnableClock ; 0x34181CE4
  0x34181B64:  F44F 5000    MOV.W      R0, #0x2000
  0x34181B68:  F000 F8BC    BL         LL_AHB4_GRP1_EnableClock ; 0x34181CE4
  0x34181B6C:  2001         MOVS       R0, #1
  0x34181B6E:  9003         STR        R0, [SP, #12]
  0x34181B70:  F000 F8B8    BL         LL_AHB4_GRP1_EnableClock ; 0x34181CE4
  0x34181B74:  9903         LDR        R1, [SP, #12]
  0x34181B76:  9A04         LDR        R2, [SP, #16]
  0x34181B78:  F641 0000    MOVW       R0, #0x1800
  0x34181B7C:  F2C5 6002    MOVT       R0, #0x5602
  0x34181B80:  9005         STR        R0, [SP, #20]
  0x34181B82:  F000 FB45    BL         HAL_GPIO_WritePin        ; 0x34182210
  0x34181B86:  9804         LDR        R0, [SP, #16]
  0x34181B88:  21FF         MOVS       R1, #255
  0x34181B8A:  9107         STR        R1, [SP, #28]
  0x34181B8C:  2103         MOVS       R1, #3
  0x34181B8E:  9102         STR        R1, [SP, #8]
  0x34181B90:  9108         STR        R1, [SP, #32]
  0x34181B92:  9009         STR        R0, [SP, #36]
  0x34181B94:  F244 0000    MOVW       R0, #0x4000
  0x34181B98:  F2C5 6002    MOVT       R0, #0x5602
  0x34181B9C:  A907         ADD        R1, SP, #28
  0x34181B9E:  9106         STR        R1, [SP, #24]
  0x34181BA0:  F7FF F84E    BL         HAL_GPIO_Init            ; 0x34180C40
  0x34181BA4:  9A02         LDR        R2, [SP, #8]
  0x34181BA6:  9804         LDR        R0, [SP, #16]
  0x34181BA8:  9906         LDR        R1, [SP, #24]
  0x34181BAA:  F643 73FF    MOVW       R3, #0x3FFF
  0x34181BAE:  9307         STR        R3, [SP, #28]
  0x34181BB0:  9208         STR        R2, [SP, #32]
  0x34181BB2:  9009         STR        R0, [SP, #36]
  0x34181BB4:  F640 0000    MOVW       R0, #0x0800
  0x34181BB8:  F2C5 6002    MOVT       R0, #0x5602
  0x34181BBC:  F7FF F840    BL         HAL_GPIO_Init            ; 0x34180C40
  0x34181BC0:  9A02         LDR        R2, [SP, #8]
  0x34181BC2:  9804         LDR        R0, [SP, #16]
  0x34181BC4:  9906         LDR        R1, [SP, #24]
  0x34181BC6:  F64F 73FF    MOVW       R3, #0xFFFF
  0x34181BCA:  9301         STR        R3, [SP, #4]
  0x34181BCC:  9307         STR        R3, [SP, #28]
  0x34181BCE:  9208         STR        R2, [SP, #32]
  0x34181BD0:  9009         STR        R0, [SP, #36]
  0x34181BD2:  F241 0000    MOVW       R0, #0x1000
  0x34181BD6:  F2C5 6002    MOVT       R0, #0x5602
  0x34181BDA:  F7FF F831    BL         HAL_GPIO_Init            ; 0x34180C40
  0x34181BDE:  9B01         LDR        R3, [SP, #4]
  0x34181BE0:  9A02         LDR        R2, [SP, #8]
  0x34181BE2:  9804         LDR        R0, [SP, #16]
  0x34181BE4:  9906         LDR        R1, [SP, #24]
  0x34181BE6:  9307         STR        R3, [SP, #28]
  0x34181BE8:  9208         STR        R2, [SP, #32]
  0x34181BEA:  9009         STR        R0, [SP, #36]
  0x34181BEC:  F640 4000    MOVW       R0, #0x0C00
  0x34181BF0:  F2C5 6002    MOVT       R0, #0x5602
  0x34181BF4:  F7FF F824    BL         HAL_GPIO_Init            ; 0x34180C40
  0x34181BF8:  9A02         LDR        R2, [SP, #8]
  0x34181BFA:  9804         LDR        R0, [SP, #16]
  0x34181BFC:  9906         LDR        R1, [SP, #24]
  0x34181BFE:  F44F 737F    MOV.W      R3, #0x03FC
  0x34181C02:  9307         STR        R3, [SP, #28]
  0x34181C04:  9208         STR        R2, [SP, #32]
  0x34181C06:  9009         STR        R0, [SP, #36]
  0x34181C08:  F641 4000    MOVW       R0, #0x1C00
  0x34181C0C:  F2C5 6002    MOVT       R0, #0x5602
  0x34181C10:  F7FF F816    BL         HAL_GPIO_Init            ; 0x34180C40
  0x34181C14:  9B01         LDR        R3, [SP, #4]
  0x34181C16:  9A02         LDR        R2, [SP, #8]
  0x34181C18:  9804         LDR        R0, [SP, #16]
  0x34181C1A:  9906         LDR        R1, [SP, #24]
  0x34181C1C:  9307         STR        R3, [SP, #28]
  0x34181C1E:  9208         STR        R2, [SP, #32]
  0x34181C20:  9009         STR        R0, [SP, #36]
  0x34181C22:  F240 4000    MOVW       R0, #0x0400
  0x34181C26:  F2C5 6002    MOVT       R0, #0x5602
  0x34181C2A:  F7FF F809    BL         HAL_GPIO_Init            ; 0x34180C40
  0x34181C2E:  9B01         LDR        R3, [SP, #4]
  0x34181C30:  9A02         LDR        R2, [SP, #8]
  0x34181C32:  9804         LDR        R0, [SP, #16]
  0x34181C34:  9906         LDR        R1, [SP, #24]
  0x34181C36:  9307         STR        R3, [SP, #28]
  0x34181C38:  9208         STR        R2, [SP, #32]
  0x34181C3A:  9009         STR        R0, [SP, #36]
  0x34181C3C:  F643 4000    MOVW       R0, #0x3C00
  0x34181C40:  F2C5 6002    MOVT       R0, #0x5602
  0x34181C44:  F7FE FFFC    BL         HAL_GPIO_Init            ; 0x34180C40
  0x34181C48:  9A02         LDR        R2, [SP, #8]
  0x34181C4A:  9804         LDR        R0, [SP, #16]
  0x34181C4C:  9906         LDR        R1, [SP, #24]
  0x34181C4E:  233F         MOVS       R3, #63
  0x34181C50:  9307         STR        R3, [SP, #28]
  0x34181C52:  9208         STR        R2, [SP, #32]
  0x34181C54:  9009         STR        R0, [SP, #36]
  0x34181C56:  F643 0000    MOVW       R0, #0x3800
  0x34181C5A:  F2C5 6002    MOVT       R0, #0x5602
  0x34181C5E:  F7FE FFEF    BL         HAL_GPIO_Init            ; 0x34180C40
  0x34181C62:  9B02         LDR        R3, [SP, #8]
  0x34181C64:  9A04         LDR        R2, [SP, #16]
  0x34181C66:  9805         LDR        R0, [SP, #20]
  0x34181C68:  9906         LDR        R1, [SP, #24]
  0x34181C6A:  F64F 3CFE    MOVW       R12, #0xFBFE
  0x34181C6E:  F8CD C01C    STR.W      R12, [SP, #28]
  0x34181C72:  9308         STR        R3, [SP, #32]
  0x34181C74:  9209         STR        R2, [SP, #36]
  0x34181C76:  F7FE FFE3    BL         HAL_GPIO_Init            ; 0x34180C40
  0x34181C7A:  9B01         LDR        R3, [SP, #4]
  0x34181C7C:  9A02         LDR        R2, [SP, #8]
  0x34181C7E:  9804         LDR        R0, [SP, #16]
  0x34181C80:  9906         LDR        R1, [SP, #24]
  0x34181C82:  9307         STR        R3, [SP, #28]
  0x34181C84:  9208         STR        R2, [SP, #32]
  0x34181C86:  9009         STR        R0, [SP, #36]
  0x34181C88:  F241 4000    MOVW       R0, #0x1400
  0x34181C8C:  F2C5 6002    MOVT       R0, #0x5602
  0x34181C90:  F7FE FFD6    BL         HAL_GPIO_Init            ; 0x34180C40
  0x34181C94:  9A02         LDR        R2, [SP, #8]
  0x34181C96:  9804         LDR        R0, [SP, #16]
  0x34181C98:  9906         LDR        R1, [SP, #24]
  0x34181C9A:  F649 73FF    MOVW       R3, #0x9FFF
  0x34181C9E:  9307         STR        R3, [SP, #28]
  0x34181CA0:  9208         STR        R2, [SP, #32]
  0x34181CA2:  9009         STR        R0, [SP, #36]
  0x34181CA4:  2000         MOVS       R0, #0
  0x34181CA6:  F2C5 6002    MOVT       R0, #0x5602
  0x34181CAA:  F7FE FFC9    BL         HAL_GPIO_Init            ; 0x34180C40
  0x34181CAE:  9A02         LDR        R2, [SP, #8]
  0x34181CB0:  9804         LDR        R0, [SP, #16]
  0x34181CB2:  9906         LDR        R1, [SP, #24]
  0x34181CB4:  F44F 5384    MOV.W      R3, #0x1080
  0x34181CB8:  9307         STR        R3, [SP, #28]
  0x34181CBA:  9208         STR        R2, [SP, #32]
  0x34181CBC:  9009         STR        R0, [SP, #36]
  0x34181CBE:  F243 4000    MOVW       R0, #0x3400
  0x34181CC2:  F2C5 6002    MOVT       R0, #0x5602
  0x34181CC6:  F7FE FFBB    BL         HAL_GPIO_Init            ; 0x34180C40
  0x34181CCA:  9B03         LDR        R3, [SP, #12]
  0x34181CCC:  9A04         LDR        R2, [SP, #16]
  0x34181CCE:  9805         LDR        R0, [SP, #20]
  0x34181CD0:  9906         LDR        R1, [SP, #24]
  0x34181CD2:  9307         STR        R3, [SP, #28]
  0x34181CD4:  9308         STR        R3, [SP, #32]
  0x34181CD6:  9209         STR        R2, [SP, #36]
  0x34181CD8:  920A         STR        R2, [SP, #40]
  0x34181CDA:  F7FE FFB1    BL         HAL_GPIO_Init            ; 0x34180C40
  0x34181CDE:  B00C         ADD        SP, SP, #48
  0x34181CE0:  BD80         POP        123R7, PC}

Section .init.PVD_PVM_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


PVD_PVM_IRQHandler:
  0x34181CE2:  E7FE         B          PVD_PVM_IRQHandler       ; 0x34181CE2

Section .text.LL_AHB4_GRP1_EnableClock from blto2_FSBL_lto.o, size=34, align=4


LL_AHB4_GRP1_EnableClock:
  0x34181CE4:  B082         SUB        SP, SP, #8
  0x34181CE6:  9001         STR        R0, [SP, #4]
  0x34181CE8:  9801         LDR        R0, [SP, #4]
  0x34181CEA:  F648 215C    MOVW       R1, #0x8A5C
  0x34181CEE:  F2C5 6102    MOVT       R1, #0x5602
  0x34181CF2:  6008         STR        R0, [R1]
  0x34181CF4:  F248 205C    MOVW       R0, #0x825C
  0x34181CF8:  F2C5 6002    MOVT       R0, #0x5602
  0x34181CFC:  6800         LDR        R0, [R0]
  0x34181CFE:  9000         STR        R0, [SP, #0]
  0x34181D00:  9800         LDR        R0, [SP, #0]
  0x34181D02:  B002         ADD        SP, SP, #8
  0x34181D04:  4770         BX         LR

Section .init.DTS_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


DTS_IRQHandler:
  0x34181D06:  E7FE         B          DTS_IRQHandler           ; 0x34181D06

Section .text.main from blto2_FSBL_lto.o, size=66, align=4


main:
  0x34181D08:  B580         PUSH       123R7, LR}
  0x34181D0A:  B084         SUB        SP, SP, #16
  0x34181D0C:  2000         MOVS       R0, #0
  0x34181D0E:  9003         STR        R0, [SP, #12]
  0x34181D10:  F7FE FEC4    BL         HAL_Init                 ; 0x34180A9C
  0x34181D14:  F000 F81A    BL         SystemClock_Config       ; 0x34181D4C
  0x34181D18:  F7FF FEFA    BL         MX_GPIO_Init             ; 0x34181B10

.L1:
  0x34181D1C:  F641 0000    MOVW       R0, #0x1800
  0x34181D20:  F2C5 6002    MOVT       R0, #0x5602
  0x34181D24:  9000         STR        R0, [SP, #0]
  0x34181D26:  2201         MOVS       R2, #1
  0x34181D28:  9201         STR        R2, [SP, #4]
  0x34181D2A:  4611         MOV        R1, R2
  0x34181D2C:  F000 FA70    BL         HAL_GPIO_WritePin        ; 0x34182210
  0x34181D30:  20FA         MOVS       R0, #250
  0x34181D32:  9002         STR        R0, [SP, #8]
  0x34181D34:  F000 F9E6    BL         HAL_Delay                ; 0x34182104
  0x34181D38:  9800         LDR        R0, [SP, #0]
  0x34181D3A:  9901         LDR        R1, [SP, #4]
  0x34181D3C:  2200         MOVS       R2, #0
  0x34181D3E:  F000 FA67    BL         HAL_GPIO_WritePin        ; 0x34182210
  0x34181D42:  9802         LDR        R0, [SP, #8]
  0x34181D44:  F000 F9DE    BL         HAL_Delay                ; 0x34182104
  0x34181D48:  E7E8         B          46L1                      ; 0x34181D1C

Section .init.RCC_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


RCC_IRQHandler:
  0x34181D4A:  E7FE         B          RCC_IRQHandler           ; 0x34181D4A

Section .text.SystemClock_Config from blto2_FSBL_lto.o, size=238, align=4


SystemClock_Config:
  0x34181D4C:  B580         PUSH       123R7, LR}
  0x34181D4E:  B0B8         SUB        SP, SP, #224
  0x34181D50:  A812         ADD        R0, SP, #72
  0x34181D52:  2198         MOVS       R1, #152
  0x34181D54:  F7FF FEA8    BL         __aeabi_memclr           ; 0x34181AA8
  0x34181D58:  A802         ADD        R0, SP, #8
  0x34181D5A:  2140         MOVS       R1, #64
  0x34181D5C:  F7FF FEA4    BL         __aeabi_memclr           ; 0x34181AA8
  0x34181D60:  2000         MOVS       R0, #0
  0x34181D62:  F000 FA89    BL         HAL_PWREx_ConfigSupply   ; 0x34182278
  0x34181D66:  B108         CBZ        R0, .L1                  ; 0x34181D6C
  0x34181D68:  F7FE FCF0    BL         Error_Handler            ; 0x3418074C

.L1:
  0x34181D6C:  2001         MOVS       R0, #1
  0x34181D6E:  F000 FABD    BL         HAL_PWREx_ControlVoltageScaling ; 0x341822EC
  0x34181D72:  B108         CBZ        R0, .L2                  ; 0x34181D78
  0x34181D74:  F7FE FCEA    BL         Error_Handler            ; 0x3418074C

.L2:
  0x34181D78:  2002         MOVS       R0, #2
  0x34181D7A:  9012         STR        R0, [SP, #72]
  0x34181D7C:  2008         MOVS       R0, #8
  0x34181D7E:  9015         STR        R0, [SP, #84]
  0x34181D80:  2000         MOVS       R0, #0
  0x34181D82:  9016         STR        R0, [SP, #88]
  0x34181D84:  9017         STR        R0, [SP, #92]
  0x34181D86:  901C         STR        R0, [SP, #112]
  0x34181D88:  9023         STR        R0, [SP, #140]
  0x34181D8A:  902A         STR        R0, [SP, #168]
  0x34181D8C:  9031         STR        R0, [SP, #196]
  0x34181D8E:  A812         ADD        R0, SP, #72
  0x34181D90:  F000 FAF8    BL         HAL_RCC_OscConfig        ; 0x34182384
  0x34181D94:  B108         CBZ        R0, .L3                  ; 0x34181D9A
  0x34181D96:  F7FE FCD9    BL         Error_Handler            ; 0x3418074C

.L3:
  0x34181D9A:  A802         ADD        R0, SP, #8
  0x34181D9C:  F7FF FC1A    BL         HAL_RCC_GetClockConfig   ; 0x341815D4
  0x34181DA0:  9803         LDR        R0, [SP, #12]
  0x34181DA2:  F5B0 3F40    CMP.W      R0, #0x030000
  0x34181DA6:  D003         BEQ        46L4                      ; 0x34181DB0
  0x34181DA8:  9804         LDR        R0, [SP, #16]
  0x34181DAA:  F1B0 7F40    CMP.W      R0, #0x03000000
  0x34181DAE:  D10A         BNE        46L5                      ; 0x34181DC6

.L4:
  0x34181DB0:  2003         MOVS       R0, #3
  0x34181DB2:  9002         STR        R0, [SP, #8]
  0x34181DB4:  2000         MOVS       R0, #0
  0x34181DB6:  9003         STR        R0, [SP, #12]
  0x34181DB8:  9004         STR        R0, [SP, #16]
  0x34181DBA:  A802         ADD        R0, SP, #8
  0x34181DBC:  F001 FAEE    BL         HAL_RCC_ClockConfig      ; 0x3418339C
  0x34181DC0:  B108         CBZ        R0, .L5                  ; 0x34181DC6
  0x34181DC2:  F7FE FCC3    BL         Error_Handler            ; 0x3418074C

.L5:
  0x34181DC6:  2000         MOVS       R0, #0
  0x34181DC8:  9012         STR        R0, [SP, #72]
  0x34181DCA:  2102         MOVS       R1, #2
  0x34181DCC:  911C         STR        R1, [SP, #112]
  0x34181DCE:  901D         STR        R0, [SP, #116]
  0x34181DD0:  2104         MOVS       R1, #4
  0x34181DD2:  911E         STR        R1, [SP, #120]
  0x34181DD4:  214B         MOVS       R1, #75
  0x34181DD6:  9120         STR        R1, [SP, #128]
  0x34181DD8:  901F         STR        R0, [SP, #124]
  0x34181DDA:  2101         MOVS       R1, #1
  0x34181DDC:  9121         STR        R1, [SP, #132]
  0x34181DDE:  9122         STR        R1, [SP, #136]
  0x34181DE0:  9023         STR        R0, [SP, #140]
  0x34181DE2:  902A         STR        R0, [SP, #168]
  0x34181DE4:  9031         STR        R0, [SP, #196]
  0x34181DE6:  A812         ADD        R0, SP, #72
  0x34181DE8:  F000 FACC    BL         HAL_RCC_OscConfig        ; 0x34182384
  0x34181DEC:  B108         CBZ        R0, .L6                  ; 0x34181DF2
  0x34181DEE:  F7FE FCAD    BL         Error_Handler            ; 0x3418074C

.L6:
  0x34181DF2:  207F         MOVS       R0, #127
  0x34181DF4:  9002         STR        R0, [SP, #8]
  0x34181DF6:  F44F 3040    MOV.W      R0, #0x030000
  0x34181DFA:  9003         STR        R0, [SP, #12]
  0x34181DFC:  F04F 7040    MOV.W      R0, #0x03000000
  0x34181E00:  9004         STR        R0, [SP, #16]
  0x34181E02:  F44F 1080    MOV.W      R0, #0x100000
  0x34181E06:  9005         STR        R0, [SP, #20]
  0x34181E08:  2100         MOVS       R1, #0
  0x34181E0A:  9101         STR        R1, [SP, #4]
  0x34181E0C:  9106         STR        R1, [SP, #24]
  0x34181E0E:  9107         STR        R1, [SP, #28]
  0x34181E10:  9108         STR        R1, [SP, #32]
  0x34181E12:  9109         STR        R1, [SP, #36]
  0x34181E14:  910A         STR        R1, [SP, #40]
  0x34181E16:  2002         MOVS       R0, #2
  0x34181E18:  900B         STR        R0, [SP, #44]
  0x34181E1A:  910C         STR        R1, [SP, #48]
  0x34181E1C:  2003         MOVS       R0, #3
  0x34181E1E:  900D         STR        R0, [SP, #52]
  0x34181E20:  910E         STR        R1, [SP, #56]
  0x34181E22:  2204         MOVS       R2, #4
  0x34181E24:  920F         STR        R2, [SP, #60]
  0x34181E26:  9110         STR        R1, [SP, #64]
  0x34181E28:  9011         STR        R0, [SP, #68]
  0x34181E2A:  A802         ADD        R0, SP, #8
  0x34181E2C:  F001 FAB6    BL         HAL_RCC_ClockConfig      ; 0x3418339C
  0x34181E30:  B108         CBZ        R0, .L7                  ; 0x34181E36
  0x34181E32:  F7FE FC8B    BL         Error_Handler            ; 0x3418074C

.L7:
  0x34181E36:  B038         ADD        SP, SP, #224
  0x34181E38:  BD80         POP        123R7, PC}

Section .init.LOCKUP_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


LOCKUP_IRQHandler:
  0x34181E3A:  E7FE         B          LOCKUP_IRQHandler        ; 0x34181E3A

Section .text.assert_failed from blto2_FSBL_lto.o, size=10, align=4


assert_failed:
  0x34181E3C:  B082         SUB        SP, SP, #8
  0x34181E3E:  9001         STR        R0, [SP, #4]
  0x34181E40:  9100         STR        R1, [SP, #0]
  0x34181E42:  B002         ADD        SP, SP, #8
  0x34181E44:  4770         BX         LR

Section .init.CACHE_ECC_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


CACHE_ECC_IRQHandler:
  0x34181E46:  E7FE         B          CACHE_ECC_IRQHandler     ; 0x34181E46

Section .text.NMI_Handler from blto2_FSBL_lto.o, size=2, align=4


NMI_Handler:
  0x34181E48:  E7FE         B          NMI_Handler              ; 0x34181E48

Section .init.TCM_ECC_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TCM_ECC_IRQHandler:
  0x34181E4A:  E7FE         B          TCM_ECC_IRQHandler       ; 0x34181E4A

Section .text.HardFault_Handler from blto2_FSBL_lto.o, size=2, align=4


HardFault_Handler:
  0x34181E4C:  E7FE         B          HardFault_Handler        ; 0x34181E4C

Section .init.BCK_ECC_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


BCK_ECC_IRQHandler:
  0x34181E4E:  E7FE         B          BCK_ECC_IRQHandler       ; 0x34181E4E

Section .text.MemManage_Handler from blto2_FSBL_lto.o, size=2, align=4


MemManage_Handler:
  0x34181E50:  E7FE         B          MemManage_Handler        ; 0x34181E50

Section .init.FPU_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


FPU_IRQHandler:
  0x34181E52:  E7FE         B          FPU_IRQHandler           ; 0x34181E52

Section .text.BusFault_Handler from blto2_FSBL_lto.o, size=2, align=4


BusFault_Handler:
  0x34181E54:  E7FE         B          BusFault_Handler         ; 0x34181E54

Section .init.RTC_S_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


RTC_S_IRQHandler:
  0x34181E56:  E7FE         B          RTC_S_IRQHandler         ; 0x34181E56

Section .text.UsageFault_Handler from blto2_FSBL_lto.o, size=2, align=4


UsageFault_Handler:
  0x34181E58:  E7FE         B          UsageFault_Handler       ; 0x34181E58

Section .init.TAMP_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TAMP_IRQHandler:
  0x34181E5A:  E7FE         B          TAMP_IRQHandler          ; 0x34181E5A

Section .text.SVC_Handler from blto2_FSBL_lto.o, size=2, align=4


SVC_Handler:
  0x34181E5C:  4770         BX         LR

Section .init.RIFSC_TAMPER_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


RIFSC_TAMPER_IRQHandler:
  0x34181E5E:  E7FE         B          RIFSC_TAMPER_IRQHandler  ; 0x34181E5E

Section .text.DebugMon_Handler from blto2_FSBL_lto.o, size=2, align=4


DebugMon_Handler:
  0x34181E60:  4770         BX         LR

Section .init.IAC_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


IAC_IRQHandler:
  0x34181E62:  E7FE         B          IAC_IRQHandler           ; 0x34181E62

Section .text.PendSV_Handler from blto2_FSBL_lto.o, size=2, align=4


PendSV_Handler:
  0x34181E64:  4770         BX         LR

Section .init.RCC_S_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


RCC_S_IRQHandler:
  0x34181E66:  E7FE         B          RCC_S_IRQHandler         ; 0x34181E66

Section .text.SystemInit from blto2_FSBL_lto.o, size=510, align=4


SystemInit:
  0x34181E68:  B510         PUSH       123R4, LR}
  0x34181E6A:  F240 4000    MOVW       R0, #0x0400              ; 0x34180400 = g_pfnVectors
  0x34181E6E:  F2C3 4018    MOVT       R0, #0x3418              ; 0x34180400 = g_pfnVectors
  0x34181E72:  F64E 5108    MOVW       R1, #0xED08
  0x34181E76:  F2CE 0100    MOVT       R1, #0xE000
  0x34181E7A:  6008         STR        R0, [R1]
  0x34181E7C:  F648 2218    MOVW       R2, #0x8A18
  0x34181E80:  F2C5 6202    MOVT       R2, #0x5602
  0x34181E84:  2001         MOVS       R0, #1
  0x34181E86:  6010         STR        R0, [R2]
  0x34181E88:  F249 2218    MOVW       R2, #0x9218
  0x34181E8C:  F2C5 6202    MOVT       R2, #0x5602
  0x34181E90:  6010         STR        R0, [R2]
  0x34181E92:  F249 2258    MOVW       R2, #0x9258
  0x34181E96:  F2C5 6202    MOVT       R2, #0x5602
  0x34181E9A:  6010         STR        R0, [R2]
  0x34181E9C:  F64E 54D8    MOVW       R4, #0xEDD8
  0x34181EA0:  F2CE 0400    MOVT       R4, #0xE000
  0x34181EA4:  2200         MOVS       R2, #0
  0x34181EA6:  6022         STR        R2, [R4]
  0x34181EA8:  F64E 5CDC    MOVW       R12, #0xEDDC
  0x34181EAC:  F2CE 0C00    MOVT       R12, #0xE000
  0x34181EB0:  F8CC 2000    STR.W      R2, [R12]
  0x34181EB4:  F64E 53E0    MOVW       R3, #0xEDE0
  0x34181EB8:  F2CE 0300    MOVT       R3, #0xE000
  0x34181EBC:  601A         STR        R2, [R3]
  0x34181EBE:  6020         STR        R0, [R4]
  0x34181EC0:  F8CC 2000    STR.W      R2, [R12]
  0x34181EC4:  601A         STR        R2, [R3]
  0x34181EC6:  F04F 0E02    MOV.W      LR, #2
  0x34181ECA:  F8C4 E000    STR.W      LR, [R4]
  0x34181ECE:  F8CC 2000    STR.W      R2, [R12]
  0x34181ED2:  601A         STR        R2, [R3]
  0x34181ED4:  F04F 0E03    MOV.W      LR, #3
  0x34181ED8:  F8C4 E000    STR.W      LR, [R4]
  0x34181EDC:  F8CC 2000    STR.W      R2, [R12]
  0x34181EE0:  601A         STR        R2, [R3]
  0x34181EE2:  F04F 0E04    MOV.W      LR, #4
  0x34181EE6:  F8C4 E000    STR.W      LR, [R4]
  0x34181EEA:  F8CC 2000    STR.W      R2, [R12]
  0x34181EEE:  601A         STR        R2, [R3]
  0x34181EF0:  F04F 0E05    MOV.W      LR, #5
  0x34181EF4:  F8C4 E000    STR.W      LR, [R4]
  0x34181EF8:  F8CC 2000    STR.W      R2, [R12]
  0x34181EFC:  601A         STR        R2, [R3]
  0x34181EFE:  F04F 0E06    MOV.W      LR, #6
  0x34181F02:  F8C4 E000    STR.W      LR, [R4]
  0x34181F06:  F8CC 2000    STR.W      R2, [R12]
  0x34181F0A:  601A         STR        R2, [R3]
  0x34181F0C:  F04F 0E07    MOV.W      LR, #7
  0x34181F10:  F8C4 E000    STR.W      LR, [R4]
  0x34181F14:  F8CC 2000    STR.W      R2, [R12]
  0x34181F18:  601A         STR        R2, [R3]
  0x34181F1A:  F648 2278    MOVW       R2, #0x8A78
  0x34181F1E:  F2C5 6202    MOVT       R2, #0x5602
  0x34181F22:  6010         STR        R0, [R2]
  0x34181F24:  F248 2378    MOVW       R3, #0x8278
  0x34181F28:  F2C5 6302    MOVT       R3, #0x5602
  0x34181F2C:  681A         LDR        R2, [R3]
  0x34181F2E:  680A         LDR        R2, [R1]
  0x34181F30:  F248 0110    MOVW       R1, #0x8010
  0x34181F34:  F2C5 6100    MOVT       R1, #0x5600
  0x34181F38:  600A         STR        R2, [R1]
  0x34181F3A:  F644 0C34    MOVW       R12, #0x4834
  0x34181F3E:  F2C5 6C02    MOVT       R12, #0x5602
  0x34181F42:  F8DC 2000    LDR.W      R2, [R12]
  0x34181F46:  F442 7280    ORR        R2, R2, #0x0100
  0x34181F4A:  F8CC 2000    STR.W      R2, [R12]
  0x34181F4E:  F644 0C38    MOVW       R12, #0x4838
  0x34181F52:  F2C5 6C02    MOVT       R12, #0x5602
  0x34181F56:  F8DC 2000    LDR.W      R2, [R12]
  0x34181F5A:  F442 7280    ORR        R2, R2, #0x0100
  0x34181F5E:  F8CC 2000    STR.W      R2, [R12]
  0x34181F62:  F644 023C    MOVW       R2, #0x483C
  0x34181F66:  F2C5 6202    MOVT       R2, #0x5602
  0x34181F6A:  F8D2 C000    LDR.W      R12, [R2]
  0x34181F6E:  F44C 7C40    ORR        R12, R12, #0x0300
  0x34181F72:  F8C2 C000    STR.W      R12, [R2]
  0x34181F76:  F248 0E54    MOVW       LR, #0x8054
  0x34181F7A:  F2C5 6E00    MOVT       LR, #0x5600
  0x34181F7E:  F240 2C87    MOVW       R12, #0x0287
  0x34181F82:  F8CE C000    STR.W      R12, [LR]
  0x34181F86:  F248 0E5C    MOVW       LR, #0x805C
  0x34181F8A:  F2C5 6E00    MOVT       LR, #0x5600
  0x34181F8E:  F8CE C000    STR.W      R12, [LR]
  0x34181F92:  F248 0E44    MOVW       LR, #0x8044
  0x34181F96:  F2C5 6E00    MOVT       LR, #0x5600
  0x34181F9A:  F8CE C000    STR.W      R12, [LR]
  0x34181F9E:  F248 0E4C    MOVW       LR, #0x804C
  0x34181FA2:  F2C5 6E00    MOVT       LR, #0x5600
  0x34181FA6:  F8CE C000    STR.W      R12, [LR]
  0x34181FAA:  F248 0E64    MOVW       LR, #0x8064
  0x34181FAE:  F2C5 6E00    MOVT       LR, #0x5600
  0x34181FB2:  F8CE C000    STR.W      R12, [LR]
  0x34181FB6:  F8D2 C000    LDR.W      R12, [R2]
  0x34181FBA:  F44C 5C80    ORR        R12, R12, #0x1000
  0x34181FBE:  F8C2 C000    STR.W      R12, [R2]
  0x34181FC2:  F8D2 C000    LDR.W      R12, [R2]
  0x34181FC6:  F04C 0C10    ORR        R12, R12, #16
  0x34181FCA:  F8C2 C000    STR.W      R12, [R2]
  0x34181FCE:  6812         LDR        R2, [R2]
  0x34181FD0:  F248 2C74    MOVW       R12, #0x8274
  0x34181FD4:  F2C5 6C02    MOVT       R12, #0x5602
  0x34181FD8:  F8DC 2000    LDR.W      R2, [R12]
  0x34181FDC:  F442 4200    ORR        R2, R2, #0x8000
  0x34181FE0:  F8CC 2000    STR.W      R2, [R12]
  0x34181FE4:  681A         LDR        R2, [R3]
  0x34181FE6:  F042 0210    ORR        R2, R2, #16
  0x34181FEA:  601A         STR        R2, [R3]
  0x34181FEC:  681A         LDR        R2, [R3]
  0x34181FEE:  681A         LDR        R2, [R3]
  0x34181FF0:  F022 0210    BIC        R2, R2, #16
  0x34181FF4:  601A         STR        R2, [R3]
  0x34181FF6:  F648 2320    MOVW       R3, #0x8A20
  0x34181FFA:  F2C5 6302    MOVT       R3, #0x5602
  0x34181FFE:  F44F 5240    MOV.W      R2, #0x3000
  0x34182002:  601A         STR        R2, [R3]
  0x34182004:  F249 2320    MOVW       R3, #0x9220
  0x34182008:  F2C5 6302    MOVT       R3, #0x5602
  0x3418200C:  601A         STR        R2, [R3]
  0x3418200E:  F648 2224    MOVW       R2, #0x8A24
  0x34182012:  F2C5 6202    MOVT       R2, #0x5602
  0x34182016:  6010         STR        R0, [R2]
  0x34182018:  F249 2224    MOVW       R2, #0x9224
  0x3418201C:  F2C5 6202    MOVT       R2, #0x5602
  0x34182020:  6010         STR        R0, [R2]
  0x34182022:  F249 2264    MOVW       R2, #0x9264
  0x34182026:  F2C5 6202    MOVT       R2, #0x5602
  0x3418202A:  6010         STR        R0, [R2]
  0x3418202C:  F249 235C    MOVW       R3, #0x925C
  0x34182030:  F2C5 6302    MOVT       R3, #0x5602
  0x34182034:  2240         MOVS       R2, #64
  0x34182036:  601A         STR        R2, [R3]
  0x34182038:  6809         LDR        R1, [R1]
  0x3418203A:  F249 2178    MOVW       R1, #0x9278
  0x3418203E:  F2C5 6102    MOVT       R1, #0x5602
  0x34182042:  6008         STR        R0, [R1]
  0x34182044:  F64E 5188    MOVW       R1, #0xED88
  0x34182048:  F2CE 0100    MOVT       R1, #0xE000
  0x3418204C:  6808         LDR        R0, [R1]
  0x3418204E:  F440 0070    ORR        R0, R0, #0xF00000
  0x34182052:  6008         STR        R0, [R1]
  0x34182054:  F64E 5188    MOVW       R1, #0xED88
  0x34182058:  F2CE 0102    MOVT       R1, #0xE002
  0x3418205C:  6808         LDR        R0, [R1]
  0x3418205E:  F440 0070    ORR        R0, R0, #0xF00000
  0x34182062:  6008         STR        R0, [R1]
  0x34182064:  BD10         POP        123R4, PC}

Section .init.RTC_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


RTC_IRQHandler:
  0x34182066:  E7FE         B          RTC_IRQHandler           ; 0x34182066

Section .text.HAL_InitTick from blto2_FSBL_lto.o, size=126, align=4


HAL_InitTick:
  0x34182068:  B580         PUSH       123R7, LR}
  0x3418206A:  B082         SUB        SP, SP, #8
  0x3418206C:  9000         STR        R0, [SP, #0]
  0x3418206E:  F244 3061    MOVW       R0, #0x4361              ; 0x34184361 = uwTickFreq
  0x34182072:  F2C3 4018    MOVT       R0, #0x3418              ; 0x34184361 = uwTickFreq
  0x34182076:  7800         LDRB       R0, [R0]
  0x34182078:  B918         CBNZ       R0, .L1                  ; 0x34182082
  0x3418207A:  2001         MOVS       R0, #1
  0x3418207C:  F88D 0007    STRB.W     R0, [SP, #7]
  0x34182080:  E02D         B          46L5                      ; 0x341820DE

.L1:
  0x34182082:  F244 4048    MOVW       R0, #0x4448              ; 0x34184448 = SystemCoreClock
  0x34182086:  F2C3 4018    MOVT       R0, #0x3418              ; 0x34184448 = SystemCoreClock
  0x3418208A:  6800         LDR        R0, [R0]
  0x3418208C:  F244 3161    MOVW       R1, #0x4361              ; 0x34184361 = uwTickFreq
  0x34182090:  F2C3 4118    MOVT       R1, #0x3418              ; 0x34184361 = uwTickFreq
  0x34182094:  780A         LDRB       R2, [R1]
  0x34182096:  F44F 717A    MOV.W      R1, #0x03E8
  0x3418209A:  FBB1 F1F2    UDIV       R1, R1, R2
  0x3418209E:  FBB0 F0F1    UDIV       R0, R0, R1
  0x341820A2:  F7FE FDC5    BL         HAL_SYSTICK_Config       ; 0x34180C30
  0x341820A6:  B118         CBZ        R0, .L2                  ; 0x341820B0
  0x341820A8:  2001         MOVS       R0, #1
  0x341820AA:  F88D 0007    STRB.W     R0, [SP, #7]
  0x341820AE:  E016         B          46L5                      ; 0x341820DE

.L2:
  0x341820B0:  9800         LDR        R0, [SP, #0]
  0x341820B2:  280F         CMP        R0, #15
  0x341820B4:  D80C         BHI        46L3                      ; 0x341820D0
  0x341820B6:  9900         LDR        R1, [SP, #0]
  0x341820B8:  F04F 30FF    MOV.W      R0, #0xFFFFFFFF
  0x341820BC:  2200         MOVS       R2, #0
  0x341820BE:  F7FE FD29    BL         HAL_NVIC_SetPriority     ; 0x34180B14
  0x341820C2:  9800         LDR        R0, [SP, #0]
  0x341820C4:  F244 4144    MOVW       R1, #0x4444              ; 0x34184444 = uwTickPrio
  0x341820C8:  F2C3 4118    MOVT       R1, #0x3418              ; 0x34184444 = uwTickPrio
  0x341820CC:  6008         STR        R0, [R1]
  0x341820CE:  E003         B          46L4                      ; 0x341820D8

.L3:
  0x341820D0:  2001         MOVS       R0, #1
  0x341820D2:  F88D 0007    STRB.W     R0, [SP, #7]
  0x341820D6:  E002         B          46L5                      ; 0x341820DE

.L4:
  0x341820D8:  2000         MOVS       R0, #0
  0x341820DA:  F88D 0007    STRB.W     R0, [SP, #7]

.L5:
  0x341820DE:  F89D 0007    LDRB.W     R0, [SP, #7]
  0x341820E2:  B002         ADD        SP, SP, #8
  0x341820E4:  BD80         POP        123R7, PC}

Section .init.IWDG_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


IWDG_IRQHandler:
  0x341820E6:  E7FE         B          IWDG_IRQHandler          ; 0x341820E6

Section .text.HAL_IncTick from blto2_FSBL_lto.o, size=26, align=4


HAL_IncTick:
  0x341820E8:  F244 3061    MOVW       R0, #0x4361              ; 0x34184361 = uwTickFreq
  0x341820EC:  F2C3 4018    MOVT       R0, #0x3418              ; 0x34184361 = uwTickFreq
  0x341820F0:  7802         LDRB       R2, [R0]
  0x341820F2:  F244 4140    MOVW       R1, #0x4440              ; 0x34184440 = uwTick
  0x341820F6:  F2C3 4118    MOVT       R1, #0x3418              ; 0x34184440 = uwTick
  0x341820FA:  6808         LDR        R0, [R1]
  0x341820FC:  4410         ADD        R0, R2
  0x341820FE:  6008         STR        R0, [R1]
  0x34182100:  4770         BX         LR

Section .init.WWDG_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


WWDG_IRQHandler:
  0x34182102:  E7FE         B          WWDG_IRQHandler          ; 0x34182102

Section .text.HAL_Delay from blto2_FSBL_lto.o, size=58, align=4


HAL_Delay:
  0x34182104:  B580         PUSH       123R7, LR}
  0x34182106:  B084         SUB        SP, SP, #16
  0x34182108:  9003         STR        R0, [SP, #12]
  0x3418210A:  F7FE FCDF    BL         HAL_GetTick              ; 0x34180ACC
  0x3418210E:  9002         STR        R0, [SP, #8]
  0x34182110:  9803         LDR        R0, [SP, #12]
  0x34182112:  9001         STR        R0, [SP, #4]
  0x34182114:  9801         LDR        R0, [SP, #4]
  0x34182116:  3001         ADDS       R0, #1
  0x34182118:  B138         CBZ        R0, .L1                  ; 0x3418212A
  0x3418211A:  F244 3061    MOVW       R0, #0x4361              ; 0x34184361 = uwTickFreq
  0x3418211E:  F2C3 4018    MOVT       R0, #0x3418              ; 0x34184361 = uwTickFreq
  0x34182122:  7801         LDRB       R1, [R0]
  0x34182124:  9801         LDR        R0, [SP, #4]
  0x34182126:  4408         ADD        R0, R1
  0x34182128:  9001         STR        R0, [SP, #4]

.L1:
  0x3418212A:  F7FE FCCF    BL         HAL_GetTick              ; 0x34180ACC
  0x3418212E:  9902         LDR        R1, [SP, #8]
  0x34182130:  1A40         SUBS       R0, R0, R1
  0x34182132:  9901         LDR        R1, [SP, #4]
  0x34182134:  4288         CMP        R0, R1
  0x34182136:  D200         BCS        46L2                      ; 0x3418213A
  0x34182138:  E7F7         B          46L1                      ; 0x3418212A

.L2:
  0x3418213A:  B004         ADD        SP, SP, #16
  0x3418213C:  BD80         POP        123R7, PC}

Section .init.EXTI0_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI0_IRQHandler:
  0x3418213E:  E7FE         B          EXTI0_IRQHandler         ; 0x3418213E

Section .text.HAL_NVIC_SetPriorityGrouping from blto2_FSBL_lto.o, size=62, align=4


HAL_NVIC_SetPriorityGrouping:
  0x34182140:  B580         PUSH       123R7, LR}
  0x34182142:  B082         SUB        SP, SP, #8
  0x34182144:  9001         STR        R0, [SP, #4]
  0x34182146:  9801         LDR        R0, [SP, #4]
  0x34182148:  2807         CMP        R0, #7
  0x3418214A:  D00B         BEQ        46L1                      ; 0x34182164
  0x3418214C:  9801         LDR        R0, [SP, #4]
  0x3418214E:  2806         CMP        R0, #6
  0x34182150:  D008         BEQ        46L1                      ; 0x34182164
  0x34182152:  9801         LDR        R0, [SP, #4]
  0x34182154:  2805         CMP        R0, #5
  0x34182156:  D005         BEQ        46L1                      ; 0x34182164
  0x34182158:  9801         LDR        R0, [SP, #4]
  0x3418215A:  2804         CMP        R0, #4
  0x3418215C:  D002         BEQ        46L1                      ; 0x34182164
  0x3418215E:  9801         LDR        R0, [SP, #4]
  0x34182160:  2803         CMP        R0, #3
  0x34182162:  D100         BNE        46L2                      ; 0x34182166

.L1:
  0x34182164:  E006         B          46L3                      ; 0x34182174

.L2:
  0x34182166:  F244 3068    MOVW       R0, #0x4368              ; 0x34184368 = .rodata..L.str.10
  0x3418216A:  F2C3 4018    MOVT       R0, #0x3418              ; 0x34184368 = .rodata..L.str.10
  0x3418216E:  21E6         MOVS       R1, #230
  0x34182170:  F7FF FE64    BL         assert_failed            ; 0x34181E3C

.L3:
  0x34182174:  9801         LDR        R0, [SP, #4]
  0x34182176:  F7FE FCAF    BL         __NVIC_SetPriorityGrouping ; 0x34180AD8
  0x3418217A:  B002         ADD        SP, SP, #8
  0x3418217C:  BD80         POP        123R7, PC}

Section .init.EXTI1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI1_IRQHandler:
  0x3418217E:  E7FE         B          EXTI1_IRQHandler         ; 0x3418217E

Section .text.__NVIC_SetPriority from blto2_FSBL_lto.o, size=62, align=4


__NVIC_SetPriority:
  0x34182180:  B082         SUB        SP, SP, #8
  0x34182182:  F8AD 0006    STRH.W     R0, [SP, #6]
  0x34182186:  9100         STR        R1, [SP, #0]
  0x34182188:  F9BD 0006    LDRSH.W    R0, [SP, #6]
  0x3418218C:  2800         CMP        R0, #0
  0x3418218E:  D409         BMI        46L1                      ; 0x341821A4
  0x34182190:  9800         LDR        R0, [SP, #0]
  0x34182192:  0100         LSLS       R0, R0, #4
  0x34182194:  F9BD 1006    LDRSH.W    R1, [SP, #6]
  0x34182198:  F24E 4200    MOVW       R2, #0xE400
  0x3418219C:  F2CE 0200    MOVT       R2, #0xE000
  0x341821A0:  5488         STRB       R0, [R1, R2]
  0x341821A2:  E00A         B          46L2                      ; 0x341821BA

.L1:
  0x341821A4:  9800         LDR        R0, [SP, #0]
  0x341821A6:  0100         LSLS       R0, R0, #4
  0x341821A8:  F8BD 1006    LDRH.W     R1, [SP, #6]
  0x341821AC:  F001 010F    AND        R1, R1, #15
  0x341821B0:  F64E 5214    MOVW       R2, #0xED14
  0x341821B4:  F2CE 0200    MOVT       R2, #0xE000
  0x341821B8:  5488         STRB       R0, [R1, R2]

.L2:
  0x341821BA:  B002         ADD        SP, SP, #8
  0x341821BC:  4770         BX         LR

Section .init.EXTI2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI2_IRQHandler:
  0x341821BE:  E7FE         B          EXTI2_IRQHandler         ; 0x341821BE

Section .text.SysTick_Config from blto2_FSBL_lto.o, size=78, align=4


SysTick_Config:
  0x341821C0:  B580         PUSH       123R7, LR}
  0x341821C2:  B082         SUB        SP, SP, #8
  0x341821C4:  9000         STR        R0, [SP, #0]
  0x341821C6:  9800         LDR        R0, [SP, #0]
  0x341821C8:  3801         SUBS       R0, #1
  0x341821CA:  F1B0 7F80    CMP.W      R0, #0x01000000
  0x341821CE:  D302         BCC        46L1                      ; 0x341821D6
  0x341821D0:  2001         MOVS       R0, #1
  0x341821D2:  9001         STR        R0, [SP, #4]
  0x341821D4:  E018         B          46L2                      ; 0x34182208

.L1:
  0x341821D6:  9800         LDR        R0, [SP, #0]
  0x341821D8:  3801         SUBS       R0, #1
  0x341821DA:  F24E 0114    MOVW       R1, #0xE014
  0x341821DE:  F2CE 0100    MOVT       R1, #0xE000
  0x341821E2:  6008         STR        R0, [R1]
  0x341821E4:  F04F 30FF    MOV.W      R0, #0xFFFFFFFF
  0x341821E8:  210F         MOVS       R1, #15
  0x341821EA:  F7FF FFC9    BL         __NVIC_SetPriority       ; 0x34182180
  0x341821EE:  F24E 0118    MOVW       R1, #0xE018
  0x341821F2:  F2CE 0100    MOVT       R1, #0xE000
  0x341821F6:  2000         MOVS       R0, #0
  0x341821F8:  6008         STR        R0, [R1]
  0x341821FA:  F24E 0210    MOVW       R2, #0xE010
  0x341821FE:  F2CE 0200    MOVT       R2, #0xE000
  0x34182202:  2107         MOVS       R1, #7
  0x34182204:  6011         STR        R1, [R2]
  0x34182206:  9001         STR        R0, [SP, #4]

.L2:
  0x34182208:  9801         LDR        R0, [SP, #4]
  0x3418220A:  B002         ADD        SP, SP, #8
  0x3418220C:  BD80         POP        123R7, PC}

Section .init.EXTI3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI3_IRQHandler:
  0x3418220E:  E7FE         B          EXTI3_IRQHandler         ; 0x3418220E

Section .text.HAL_GPIO_WritePin from blto2_FSBL_lto.o, size=102, align=4


HAL_GPIO_WritePin:
  0x34182210:  B580         PUSH       123R7, LR}
  0x34182212:  B082         SUB        SP, SP, #8
  0x34182214:  9001         STR        R0, [SP, #4]
  0x34182216:  F8AD 1002    STRH.W     R1, [SP, #2]
  0x3418221A:  F88D 2001    STRB.W     R2, [SP, #1]
  0x3418221E:  F8BD 0002    LDRH.W     R0, [SP, #2]
  0x34182222:  B110         CBZ        R0, .L1                  ; 0x3418222A
  0x34182224:  2000         MOVS       R0, #0
  0x34182226:  B900         CBNZ       R0, .L1                  ; 0x3418222A
  0x34182228:  E007         B          46L2                      ; 0x3418223A

.L1:
  0x3418222A:  F244 208E    MOVW       R0, #0x428E              ; 0x3418428E = .rodata..L.str.20
  0x3418222E:  F2C3 4018    MOVT       R0, #0x3418              ; 0x3418428E = .rodata..L.str.20
  0x34182232:  F44F 71D0    MOV.W      R1, #0x01A0
  0x34182236:  F7FF FE01    BL         assert_failed            ; 0x34181E3C

.L2:
  0x3418223A:  F89D 0001    LDRB.W     R0, [SP, #1]
  0x3418223E:  B118         CBZ        R0, .L3                  ; 0x34182248
  0x34182240:  F89D 0001    LDRB.W     R0, [SP, #1]
  0x34182244:  2801         CMP        R0, #1
  0x34182246:  D100         BNE        46L4                      ; 0x3418224A

.L3:
  0x34182248:  E007         B          46L5                      ; 0x3418225A

.L4:
  0x3418224A:  F244 208E    MOVW       R0, #0x428E              ; 0x3418428E = .rodata..L.str.20
  0x3418224E:  F2C3 4018    MOVT       R0, #0x3418              ; 0x3418428E = .rodata..L.str.20
  0x34182252:  F240 11A1    MOVW       R1, #0x01A1
  0x34182256:  F7FF FDF1    BL         assert_failed            ; 0x34181E3C

.L5:
  0x3418225A:  F89D 0001    LDRB.W     R0, [SP, #1]
  0x3418225E:  B120         CBZ        R0, .L6                  ; 0x3418226A
  0x34182260:  F8BD 0002    LDRH.W     R0, [SP, #2]
  0x34182264:  9901         LDR        R1, [SP, #4]
  0x34182266:  6188         STR        R0, [R1, #24]
  0x34182268:  E003         B          46L7                      ; 0x34182272

.L6:
  0x3418226A:  F8BD 0002    LDRH.W     R0, [SP, #2]
  0x3418226E:  9901         LDR        R1, [SP, #4]
  0x34182270:  6288         STR        R0, [R1, #40]

.L7:
  0x34182272:  B002         ADD        SP, SP, #8
  0x34182274:  BD80         POP        123R7, PC}

Section .init.EXTI4_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI4_IRQHandler:
  0x34182276:  E7FE         B          EXTI4_IRQHandler         ; 0x34182276

Section .text.HAL_PWREx_ConfigSupply from blto2_FSBL_lto.o, size=114, align=4


HAL_PWREx_ConfigSupply:
  0x34182278:  B580         PUSH       123R7, LR}
  0x3418227A:  B084         SUB        SP, SP, #16
  0x3418227C:  9002         STR        R0, [SP, #8]
  0x3418227E:  9802         LDR        R0, [SP, #8]
  0x34182280:  2804         CMP        R0, #4
  0x34182282:  D001         BEQ        46L1                      ; 0x34182288
  0x34182284:  9802         LDR        R0, [SP, #8]
  0x34182286:  B900         CBNZ       R0, .L2                  ; 0x3418228A

.L1:
  0x34182288:  E007         B          46L3                      ; 0x3418229A

.L2:
  0x3418228A:  F244 30D4    MOVW       R0, #0x43D4              ; 0x341843D4 = .rodata..L.str.28
  0x3418228E:  F2C3 4018    MOVT       R0, #0x3418              ; 0x341843D4 = .rodata..L.str.28
  0x34182292:  F44F 7187    MOV.W      R1, #0x010E
  0x34182296:  F7FF FDD1    BL         assert_failed            ; 0x34181E3C

.L3:
  0x3418229A:  F644 0100    MOVW       R1, #0x4800
  0x3418229E:  F2C5 6102    MOVT       R1, #0x5602
  0x341822A2:  6808         LDR        R0, [R1]
  0x341822A4:  F020 0004    BIC        R0, R0, #4
  0x341822A8:  9A02         LDR        R2, [SP, #8]
  0x341822AA:  4310         ORRS       R0, R2
  0x341822AC:  6008         STR        R0, [R1]
  0x341822AE:  F7FE FC0D    BL         HAL_GetTick              ; 0x34180ACC
  0x341822B2:  9001         STR        R0, [SP, #4]

.L4:
  0x341822B4:  F644 0020    MOVW       R0, #0x4820
  0x341822B8:  F2C5 6002    MOVT       R0, #0x5602
  0x341822BC:  6800         LDR        R0, [R0]
  0x341822BE:  0380         LSLS       R0, R0, #14
  0x341822C0:  2800         CMP        R0, #0
  0x341822C2:  D40B         BMI        46L6                      ; 0x341822DC
  0x341822C4:  F7FE FC02    BL         HAL_GetTick              ; 0x34180ACC
  0x341822C8:  9901         LDR        R1, [SP, #4]
  0x341822CA:  1A40         SUBS       R0, R0, R1
  0x341822CC:  F5B0 7F7A    CMP.W      R0, #0x03E8
  0x341822D0:  D903         BLS        46L5                      ; 0x341822DA
  0x341822D2:  2001         MOVS       R0, #1
  0x341822D4:  F88D 000F    STRB.W     R0, [SP, #15]
  0x341822D8:  E003         B          46L7                      ; 0x341822E2

.L5:
  0x341822DA:  E7EB         B          46L4                      ; 0x341822B4

.L6:
  0x341822DC:  2000         MOVS       R0, #0
  0x341822DE:  F88D 000F    STRB.W     R0, [SP, #15]

.L7:
  0x341822E2:  F89D 000F    LDRB.W     R0, [SP, #15]
  0x341822E6:  B004         ADD        SP, SP, #16
  0x341822E8:  BD80         POP        123R7, PC}

Section .init.EXTI5_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI5_IRQHandler:
  0x341822EA:  E7FE         B          EXTI5_IRQHandler         ; 0x341822EA

Section .text.HAL_PWREx_ControlVoltageScaling from blto2_FSBL_lto.o, size=114, align=4


HAL_PWREx_ControlVoltageScaling:
  0x341822EC:  B580         PUSH       123R7, LR}
  0x341822EE:  B084         SUB        SP, SP, #16
  0x341822F0:  9002         STR        R0, [SP, #8]
  0x341822F2:  9802         LDR        R0, [SP, #8]
  0x341822F4:  2801         CMP        R0, #1
  0x341822F6:  D001         BEQ        46L1                      ; 0x341822FC
  0x341822F8:  9802         LDR        R0, [SP, #8]
  0x341822FA:  B900         CBNZ       R0, .L2                  ; 0x341822FE

.L1:
  0x341822FC:  E007         B          46L3                      ; 0x3418230E

.L2:
  0x341822FE:  F244 30D4    MOVW       R0, #0x43D4              ; 0x341843D4 = .rodata..L.str.28
  0x34182302:  F2C3 4018    MOVT       R0, #0x3418              ; 0x341843D4 = .rodata..L.str.28
  0x34182306:  F240 1141    MOVW       R1, #0x0141
  0x3418230A:  F7FF FD97    BL         assert_failed            ; 0x34181E3C

.L3:
  0x3418230E:  F644 0120    MOVW       R1, #0x4820
  0x34182312:  F2C5 6102    MOVT       R1, #0x5602
  0x34182316:  6808         LDR        R0, [R1]
  0x34182318:  F020 0001    BIC        R0, R0, #1
  0x3418231C:  9A02         LDR        R2, [SP, #8]
  0x3418231E:  4310         ORRS       R0, R2
  0x34182320:  6008         STR        R0, [R1]
  0x34182322:  F7FE FBD3    BL         HAL_GetTick              ; 0x34180ACC
  0x34182326:  9001         STR        R0, [SP, #4]

.L4:
  0x34182328:  F644 0020    MOVW       R0, #0x4820
  0x3418232C:  F2C5 6002    MOVT       R0, #0x5602
  0x34182330:  6800         LDR        R0, [R0]
  0x34182332:  0780         LSLS       R0, R0, #30
  0x34182334:  2800         CMP        R0, #0
  0x34182336:  D40B         BMI        46L6                      ; 0x34182350
  0x34182338:  F7FE FBC8    BL         HAL_GetTick              ; 0x34180ACC
  0x3418233C:  9901         LDR        R1, [SP, #4]
  0x3418233E:  1A40         SUBS       R0, R0, R1
  0x34182340:  F5B0 7F7A    CMP.W      R0, #0x03E8
  0x34182344:  D903         BLS        46L5                      ; 0x3418234E
  0x34182346:  2001         MOVS       R0, #1
  0x34182348:  F88D 000F    STRB.W     R0, [SP, #15]
  0x3418234C:  E003         B          46L7                      ; 0x34182356

.L5:
  0x3418234E:  E7EB         B          46L4                      ; 0x34182328

.L6:
  0x34182350:  2000         MOVS       R0, #0
  0x34182352:  F88D 000F    STRB.W     R0, [SP, #15]

.L7:
  0x34182356:  F89D 000F    LDRB.W     R0, [SP, #15]
  0x3418235A:  B004         ADD        SP, SP, #16
  0x3418235C:  BD80         POP        123R7, PC}

Section .init.EXTI6_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI6_IRQHandler:
  0x3418235E:  E7FE         B          EXTI6_IRQHandler         ; 0x3418235E

Section .text.HAL_PWREx_EnableVddIO3 from blto2_FSBL_lto.o, size=18, align=4


HAL_PWREx_EnableVddIO3:
  0x34182360:  F644 013C    MOVW       R1, #0x483C
  0x34182364:  F2C5 6102    MOVT       R1, #0x5602
  0x34182368:  6808         LDR        R0, [R1]
  0x3418236A:  F440 7000    ORR        R0, R0, #0x0200
  0x3418236E:  6008         STR        R0, [R1]
  0x34182370:  4770         BX         LR

Section .init.EXTI7_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI7_IRQHandler:
  0x34182372:  E7FE         B          EXTI7_IRQHandler         ; 0x34182372

Section .text.LL_RCC_HSI_Enable from blto2_FSBL_lto.o, size=14, align=4


LL_RCC_HSI_Enable:
  0x34182374:  F648 0100    MOVW       R1, #0x8800
  0x34182378:  F2C5 6102    MOVT       R1, #0x5602
  0x3418237C:  2008         MOVS       R0, #8
  0x3418237E:  6008         STR        R0, [R1]
  0x34182380:  4770         BX         LR

Section .init.EXTI8_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI8_IRQHandler:
  0x34182382:  E7FE         B          EXTI8_IRQHandler         ; 0x34182382

Section .text.HAL_RCC_OscConfig from blto2_FSBL_lto.o, size=2810, align=4


HAL_RCC_OscConfig:
  0x34182384:  B580         PUSH       123R7, LR}
  0x34182386:  B0A2         SUB        SP, SP, #136
  0x34182388:  9020         STR        R0, [SP, #128]
  0x3418238A:  9820         LDR        R0, [SP, #128]
  0x3418238C:  B920         CBNZ       R0, .L1                  ; 0x34182398
  0x3418238E:  2001         MOVS       R0, #1
  0x34182390:  F88D 0087    STRB.W     R0, [SP, #135]
  0x34182394:  F000 BD6F    B.W        46L144                    ; 0x34182E76

.L1:
  0x34182398:  9820         LDR        R0, [SP, #128]
  0x3418239A:  6800         LDR        R0, [R0]
  0x3418239C:  B1E0         CBZ        R0, .L2                  ; 0x341823D8
  0x3418239E:  9820         LDR        R0, [SP, #128]
  0x341823A0:  6800         LDR        R0, [R0]
  0x341823A2:  F000 0001    AND        R0, R0, #1
  0x341823A6:  2801         CMP        R0, #1
  0x341823A8:  D016         BEQ        46L2                      ; 0x341823D8
  0x341823AA:  9820         LDR        R0, [SP, #128]
  0x341823AC:  6800         LDR        R0, [R0]
  0x341823AE:  F000 0002    AND        R0, R0, #2
  0x341823B2:  2802         CMP        R0, #2
  0x341823B4:  D010         BEQ        46L2                      ; 0x341823D8
  0x341823B6:  9820         LDR        R0, [SP, #128]
  0x341823B8:  6800         LDR        R0, [R0]
  0x341823BA:  F000 0010    AND        R0, R0, #16
  0x341823BE:  2810         CMP        R0, #16
  0x341823C0:  D00A         BEQ        46L2                      ; 0x341823D8
  0x341823C2:  9820         LDR        R0, [SP, #128]
  0x341823C4:  6800         LDR        R0, [R0]
  0x341823C6:  F000 0008    AND        R0, R0, #8
  0x341823CA:  2808         CMP        R0, #8
  0x341823CC:  D004         BEQ        46L2                      ; 0x341823D8
  0x341823CE:  9820         LDR        R0, [SP, #128]
  0x341823D0:  7800         LDRB       R0, [R0]
  0x341823D2:  0740         LSLS       R0, R0, #29
  0x341823D4:  2800         CMP        R0, #0
  0x341823D6:  D500         BPL        46L3                      ; 0x341823DA

.L2:
  0x341823D8:  E007         B          46L4                      ; 0x341823EA

.L3:
  0x341823DA:  F244 20F8    MOVW       R0, #0x42F8              ; 0x341842F8 = .rodata..L.str.35
  0x341823DE:  F2C3 4018    MOVT       R0, #0x3418              ; 0x341842F8 = .rodata..L.str.35
  0x341823E2:  F44F 71BB    MOV.W      R1, #0x0176
  0x341823E6:  F7FF FD29    BL         assert_failed            ; 0x34181E3C

.L4:
  0x341823EA:  F7FF F803    BL         LL_RCC_GetCpuClkSource   ; 0x341813F4
  0x341823EE:  901D         STR        R0, [SP, #116]
  0x341823F0:  F7FF F808    BL         LL_RCC_GetSysClkSource   ; 0x34181404
  0x341823F4:  901E         STR        R0, [SP, #120]
  0x341823F6:  F7FF F80D    BL         LL_RCC_PLL1_GetSource    ; 0x34181414
  0x341823FA:  901C         STR        R0, [SP, #112]
  0x341823FC:  F7FF F812    BL         LL_RCC_PLL2_GetSource    ; 0x34181424
  0x34182400:  901B         STR        R0, [SP, #108]
  0x34182402:  F7FF F817    BL         LL_RCC_PLL3_GetSource    ; 0x34181434
  0x34182406:  901A         STR        R0, [SP, #104]
  0x34182408:  F7FF F81C    BL         LL_RCC_PLL4_GetSource    ; 0x34181444
  0x3418240C:  9019         STR        R0, [SP, #100]
  0x3418240E:  F248 0004    MOVW       R0, #0x8004
  0x34182412:  F2C5 6002    MOVT       R0, #0x5602
  0x34182416:  6800         LDR        R0, [R0]
  0x34182418:  9018         STR        R0, [SP, #96]
  0x3418241A:  9820         LDR        R0, [SP, #128]
  0x3418241C:  7800         LDRB       R0, [R0]
  0x3418241E:  07C0         LSLS       R0, R0, #31
  0x34182420:  2800         CMP        R0, #0
  0x34182422:  F000 8101    BEQ.W      46L29                     ; 0x34182628
  0x34182426:  9820         LDR        R0, [SP, #128]
  0x34182428:  6840         LDR        R0, [R0, #4]
  0x3418242A:  B188         CBZ        R0, .L5                  ; 0x34182450
  0x3418242C:  9820         LDR        R0, [SP, #128]
  0x3418242E:  6840         LDR        R0, [R0, #4]
  0x34182430:  2810         CMP        R0, #16
  0x34182432:  D00D         BEQ        46L5                      ; 0x34182450
  0x34182434:  9820         LDR        R0, [SP, #128]
  0x34182436:  6840         LDR        R0, [R0, #4]
  0x34182438:  F248 0110    MOVW       R1, #0x8010
  0x3418243C:  4288         CMP        R0, R1
  0x3418243E:  D007         BEQ        46L5                      ; 0x34182450
  0x34182440:  9820         LDR        R0, [SP, #128]
  0x34182442:  6840         LDR        R0, [R0, #4]
  0x34182444:  F248 0110    MOVW       R1, #0x8010
  0x34182448:  F2C0 0101    MOVT       R1, #1
  0x3418244C:  4288         CMP        R0, R1
  0x3418244E:  D100         BNE        46L6                      ; 0x34182452

.L5:
  0x34182450:  E007         B          46L7                      ; 0x34182462

.L6:
  0x34182452:  F244 20F8    MOVW       R0, #0x42F8              ; 0x341842F8 = .rodata..L.str.35
  0x34182456:  F2C3 4018    MOVT       R0, #0x3418              ; 0x341842F8 = .rodata..L.str.35
  0x3418245A:  F44F 71C2    MOV.W      R1, #0x0184
  0x3418245E:  F7FF FCED    BL         assert_failed            ; 0x34181E3C

.L7:
  0x34182462:  981D         LDR        R0, [SP, #116]
  0x34182464:  F5B0 1F00    CMP.W      R0, #0x200000
  0x34182468:  D02A         BEQ        46L11                     ; 0x341824C0
  0x3418246A:  981E         LDR        R0, [SP, #120]
  0x3418246C:  F1B0 5F00    CMP.W      R0, #0x20000000
  0x34182470:  D026         BEQ        46L11                     ; 0x341824C0
  0x34182472:  981C         LDR        R0, [SP, #112]
  0x34182474:  F1B0 5F00    CMP.W      R0, #0x20000000
  0x34182478:  D105         BNE        46L8                      ; 0x34182486
  0x3418247A:  9818         LDR        R0, [SP, #96]
  0x3418247C:  F400 7080    AND        R0, R0, #0x0100
  0x34182480:  F5B0 7F80    CMP.W      R0, #0x0100
  0x34182484:  D01C         BEQ        46L11                     ; 0x341824C0

.L8:
  0x34182486:  981B         LDR        R0, [SP, #108]
  0x34182488:  F1B0 5F00    CMP.W      R0, #0x20000000
  0x3418248C:  D105         BNE        46L9                      ; 0x3418249A
  0x3418248E:  9818         LDR        R0, [SP, #96]
  0x34182490:  F400 7000    AND        R0, R0, #0x0200
  0x34182494:  F5B0 7F00    CMP.W      R0, #0x0200
  0x34182498:  D012         BEQ        46L11                     ; 0x341824C0

.L9:
  0x3418249A:  981A         LDR        R0, [SP, #104]
  0x3418249C:  F1B0 5F00    CMP.W      R0, #0x20000000
  0x341824A0:  D105         BNE        46L10                     ; 0x341824AE
  0x341824A2:  9818         LDR        R0, [SP, #96]
  0x341824A4:  F400 6080    AND        R0, R0, #0x0400
  0x341824A8:  F5B0 6F80    CMP.W      R0, #0x0400
  0x341824AC:  D008         BEQ        46L11                     ; 0x341824C0

.L10:
  0x341824AE:  9819         LDR        R0, [SP, #100]
  0x341824B0:  F1B0 5F00    CMP.W      R0, #0x20000000
  0x341824B4:  D12E         BNE        46L18                     ; 0x34182514
  0x341824B6:  F89D 0061    LDRB.W     R0, [SP, #97]
  0x341824BA:  0700         LSLS       R0, R0, #28
  0x341824BC:  2800         CMP        R0, #0
  0x341824BE:  D529         BPL        46L18                     ; 0x34182514

.L11:
  0x341824C0:  9820         LDR        R0, [SP, #128]
  0x341824C2:  6840         LDR        R0, [R0, #4]
  0x341824C4:  B920         CBNZ       R0, .L12                 ; 0x341824D0
  0x341824C6:  2001         MOVS       R0, #1
  0x341824C8:  F88D 0087    STRB.W     R0, [SP, #135]
  0x341824CC:  F000 BCD3    B.W        46L144                    ; 0x34182E76

.L12:
  0x341824D0:  F7FE FAFC    BL         HAL_GetTick              ; 0x34180ACC
  0x341824D4:  901F         STR        R0, [SP, #124]

.L13:
  0x341824D6:  F248 0004    MOVW       R0, #0x8004
  0x341824DA:  F2C5 6002    MOVT       R0, #0x5602
  0x341824DE:  6800         LDR        R0, [R0]
  0x341824E0:  06C0         LSLS       R0, R0, #27
  0x341824E2:  2800         CMP        R0, #0
  0x341824E4:  D40B         BMI        46L15                     ; 0x341824FE
  0x341824E6:  F7FE FAF1    BL         HAL_GetTick              ; 0x34180ACC
  0x341824EA:  991F         LDR        R1, [SP, #124]
  0x341824EC:  1A40         SUBS       R0, R0, R1
  0x341824EE:  2865         CMP        R0, #101
  0x341824F0:  D304         BCC        46L14                     ; 0x341824FC
  0x341824F2:  2003         MOVS       R0, #3
  0x341824F4:  F88D 0087    STRB.W     R0, [SP, #135]
  0x341824F8:  F000 BCBD    B.W        46L144                    ; 0x34182E76

.L14:
  0x341824FC:  E7EB         B          46L13                     ; 0x341824D6

.L15:
  0x341824FE:  F7FE FAE5    BL         HAL_GetTick              ; 0x34180ACC
  0x34182502:  901F         STR        R0, [SP, #124]

.L16:
  0x34182504:  F7FE FAE2    BL         HAL_GetTick              ; 0x34180ACC
  0x34182508:  991F         LDR        R1, [SP, #124]
  0x3418250A:  1A40         SUBS       R0, R0, R1
  0x3418250C:  2801         CMP        R0, #1
  0x3418250E:  D800         BHI        46L17                     ; 0x34182512
  0x34182510:  E7F8         B          46L16                     ; 0x34182504

.L17:
  0x34182512:  E089         B          46L29                     ; 0x34182628

.L18:
  0x34182514:  9820         LDR        R0, [SP, #128]
  0x34182516:  6840         LDR        R0, [R0, #4]
  0x34182518:  2810         CMP        R0, #16
  0x3418251A:  D106         BNE        46L19                     ; 0x3418252A
  0x3418251C:  F648 0100    MOVW       R1, #0x8800
  0x34182520:  F2C5 6102    MOVT       R1, #0x5602
  0x34182524:  2010         MOVS       R0, #16
  0x34182526:  6008         STR        R0, [R1]
  0x34182528:  E04F         B          46L23                     ; 0x341825CA

.L19:
  0x3418252A:  9820         LDR        R0, [SP, #128]
  0x3418252C:  6840         LDR        R0, [R0, #4]
  0x3418252E:  B970         CBNZ       R0, .L20                 ; 0x3418254E
  0x34182530:  F249 0100    MOVW       R1, #0x9000
  0x34182534:  F2C5 6102    MOVT       R1, #0x5602
  0x34182538:  2010         MOVS       R0, #16
  0x3418253A:  6008         STR        R0, [R1]
  0x3418253C:  F248 0154    MOVW       R1, #0x8054
  0x34182540:  F2C5 6102    MOVT       R1, #0x5602
  0x34182544:  6808         LDR        R0, [R1]
  0x34182546:  F420 30C0    BIC        R0, R0, #0x018000
  0x3418254A:  6008         STR        R0, [R1]
  0x3418254C:  E03D         B          46L23                     ; 0x341825CA

.L20:
  0x3418254E:  9820         LDR        R0, [SP, #128]
  0x34182550:  6840         LDR        R0, [R0, #4]
  0x34182552:  F248 0110    MOVW       R1, #0x8010
  0x34182556:  4288         CMP        R0, R1
  0x34182558:  D112         BNE        46L21                     ; 0x34182580
  0x3418255A:  F248 0154    MOVW       R1, #0x8054
  0x3418255E:  F2C5 6102    MOVT       R1, #0x5602
  0x34182562:  6808         LDR        R0, [R1]
  0x34182564:  F440 4000    ORR        R0, R0, #0x8000
  0x34182568:  6008         STR        R0, [R1]
  0x3418256A:  6808         LDR        R0, [R1]
  0x3418256C:  F420 3080    BIC        R0, R0, #0x010000
  0x34182570:  6008         STR        R0, [R1]
  0x34182572:  F648 0100    MOVW       R1, #0x8800
  0x34182576:  F2C5 6102    MOVT       R1, #0x5602
  0x3418257A:  2010         MOVS       R0, #16
  0x3418257C:  6008         STR        R0, [R1]
  0x3418257E:  E024         B          46L23                     ; 0x341825CA

.L21:
  0x34182580:  9820         LDR        R0, [SP, #128]
  0x34182582:  6840         LDR        R0, [R0, #4]
  0x34182584:  F248 0110    MOVW       R1, #0x8010
  0x34182588:  F2C0 0101    MOVT       R1, #1
  0x3418258C:  4288         CMP        R0, R1
  0x3418258E:  D10E         BNE        46L22                     ; 0x341825AE
  0x34182590:  F248 0154    MOVW       R1, #0x8054
  0x34182594:  F2C5 6102    MOVT       R1, #0x5602
  0x34182598:  6808         LDR        R0, [R1]
  0x3418259A:  F440 30C0    ORR        R0, R0, #0x018000
  0x3418259E:  6008         STR        R0, [R1]
  0x341825A0:  F648 0100    MOVW       R1, #0x8800
  0x341825A4:  F2C5 6102    MOVT       R1, #0x5602
  0x341825A8:  2010         MOVS       R0, #16
  0x341825AA:  6008         STR        R0, [R1]
  0x341825AC:  E00D         B          46L23                     ; 0x341825CA

.L22:
  0x341825AE:  F249 0100    MOVW       R1, #0x9000
  0x341825B2:  F2C5 6102    MOVT       R1, #0x5602
  0x341825B6:  2010         MOVS       R0, #16
  0x341825B8:  6008         STR        R0, [R1]
  0x341825BA:  F248 0154    MOVW       R1, #0x8054
  0x341825BE:  F2C5 6102    MOVT       R1, #0x5602
  0x341825C2:  6808         LDR        R0, [R1]
  0x341825C4:  F420 30C0    BIC        R0, R0, #0x018000
  0x341825C8:  6008         STR        R0, [R1]

.L23:
  0x341825CA:  F7FE FA7F    BL         HAL_GetTick              ; 0x34180ACC
  0x341825CE:  901F         STR        R0, [SP, #124]
  0x341825D0:  9820         LDR        R0, [SP, #128]
  0x341825D2:  6840         LDR        R0, [R0, #4]
  0x341825D4:  B1A0         CBZ        R0, .L27                 ; 0x34182600

.L24:
  0x341825D6:  F248 0004    MOVW       R0, #0x8004
  0x341825DA:  F2C5 6002    MOVT       R0, #0x5602
  0x341825DE:  6800         LDR        R0, [R0]
  0x341825E0:  06C0         LSLS       R0, R0, #27
  0x341825E2:  2800         CMP        R0, #0
  0x341825E4:  D40B         BMI        46L26                     ; 0x341825FE
  0x341825E6:  F7FE FA71    BL         HAL_GetTick              ; 0x34180ACC
  0x341825EA:  991F         LDR        R1, [SP, #124]
  0x341825EC:  1A40         SUBS       R0, R0, R1
  0x341825EE:  2865         CMP        R0, #101
  0x341825F0:  D304         BCC        46L25                     ; 0x341825FC
  0x341825F2:  2003         MOVS       R0, #3
  0x341825F4:  F88D 0087    STRB.W     R0, [SP, #135]
  0x341825F8:  F000 BC3D    B.W        46L144                    ; 0x34182E76

.L25:
  0x341825FC:  E7EB         B          46L24                     ; 0x341825D6

.L26:
  0x341825FE:  E013         B          46L29                     ; 0x34182628

.L27:
  0x34182600:  F248 0004    MOVW       R0, #0x8004
  0x34182604:  F2C5 6002    MOVT       R0, #0x5602
  0x34182608:  6800         LDR        R0, [R0]
  0x3418260A:  06C0         LSLS       R0, R0, #27
  0x3418260C:  2800         CMP        R0, #0
  0x3418260E:  D50B         BPL        46L29                     ; 0x34182628
  0x34182610:  F7FE FA5C    BL         HAL_GetTick              ; 0x34180ACC
  0x34182614:  991F         LDR        R1, [SP, #124]
  0x34182616:  1A40         SUBS       R0, R0, R1
  0x34182618:  2865         CMP        R0, #101
  0x3418261A:  D304         BCC        46L28                     ; 0x34182626
  0x3418261C:  2003         MOVS       R0, #3
  0x3418261E:  F88D 0087    STRB.W     R0, [SP, #135]
  0x34182622:  F000 BC28    B.W        46L144                    ; 0x34182E76

.L28:
  0x34182626:  E7EB         B          46L27                     ; 0x34182600

.L29:
  0x34182628:  9820         LDR        R0, [SP, #128]
  0x3418262A:  7800         LDRB       R0, [R0]
  0x3418262C:  0780         LSLS       R0, R0, #30
  0x3418262E:  2800         CMP        R0, #0
  0x34182630:  F140 80C4    BPL.W      46L55                     ; 0x341827BC
  0x34182634:  9820         LDR        R0, [SP, #128]
  0x34182636:  68C0         LDR        R0, [R0, #12]
  0x34182638:  B118         CBZ        R0, .L30                 ; 0x34182642
  0x3418263A:  9820         LDR        R0, [SP, #128]
  0x3418263C:  68C0         LDR        R0, [R0, #12]
  0x3418263E:  2808         CMP        R0, #8
  0x34182640:  D100         BNE        46L31                     ; 0x34182644

.L30:
  0x34182642:  E007         B          46L32                     ; 0x34182654

.L31:
  0x34182644:  F244 20F8    MOVW       R0, #0x42F8              ; 0x341842F8 = .rodata..L.str.35
  0x34182648:  F2C3 4018    MOVT       R0, #0x3418              ; 0x341842F8 = .rodata..L.str.35
  0x3418264C:  F240 11CD    MOVW       R1, #0x01CD
  0x34182650:  F7FF FBF4    BL         assert_failed            ; 0x34181E3C

.L32:
  0x34182654:  981D         LDR        R0, [SP, #116]
  0x34182656:  B300         CBZ        R0, .L36                 ; 0x3418269A
  0x34182658:  981E         LDR        R0, [SP, #120]
  0x3418265A:  B1F0         CBZ        R0, .L36                 ; 0x3418269A
  0x3418265C:  981C         LDR        R0, [SP, #112]
  0x3418265E:  B928         CBNZ       R0, .L33                 ; 0x3418266C
  0x34182660:  9818         LDR        R0, [SP, #96]
  0x34182662:  F400 7080    AND        R0, R0, #0x0100
  0x34182666:  F5B0 7F80    CMP.W      R0, #0x0100
  0x3418266A:  D016         BEQ        46L36                     ; 0x3418269A

.L33:
  0x3418266C:  981B         LDR        R0, [SP, #108]
  0x3418266E:  B928         CBNZ       R0, .L34                 ; 0x3418267C
  0x34182670:  9818         LDR        R0, [SP, #96]
  0x34182672:  F400 7000    AND        R0, R0, #0x0200
  0x34182676:  F5B0 7F00    CMP.W      R0, #0x0200
  0x3418267A:  D00E         BEQ        46L36                     ; 0x3418269A

.L34:
  0x3418267C:  981A         LDR        R0, [SP, #104]
  0x3418267E:  B928         CBNZ       R0, .L35                 ; 0x3418268C
  0x34182680:  9818         LDR        R0, [SP, #96]
  0x34182682:  F400 6080    AND        R0, R0, #0x0400
  0x34182686:  F5B0 6F80    CMP.W      R0, #0x0400
  0x3418268A:  D006         BEQ        46L36                     ; 0x3418269A

.L35:
  0x3418268C:  9819         LDR        R0, [SP, #100]
  0x3418268E:  BBD8         CBNZ       R0, .L43                 ; 0x34182708
  0x34182690:  F89D 0061    LDRB.W     R0, [SP, #97]
  0x34182694:  0700         LSLS       R0, R0, #28
  0x34182696:  2800         CMP        R0, #0
  0x34182698:  D536         BPL        46L43                     ; 0x34182708

.L36:
  0x3418269A:  9820         LDR        R0, [SP, #128]
  0x3418269C:  68C0         LDR        R0, [R0, #12]
  0x3418269E:  B918         CBNZ       R0, .L37                 ; 0x341826A8
  0x341826A0:  2001         MOVS       R0, #1
  0x341826A2:  F88D 0087    STRB.W     R0, [SP, #135]
  0x341826A6:  E3E6         B          46L144                    ; 0x34182E76

.L37:
  0x341826A8:  9820         LDR        R0, [SP, #128]
  0x341826AA:  6900         LDR        R0, [R0, #16]
  0x341826AC:  B168         CBZ        R0, .L38                 ; 0x341826CA
  0x341826AE:  9820         LDR        R0, [SP, #128]
  0x341826B0:  6900         LDR        R0, [R0, #16]
  0x341826B2:  2880         CMP        R0, #128
  0x341826B4:  D009         BEQ        46L38                     ; 0x341826CA
  0x341826B6:  9820         LDR        R0, [SP, #128]
  0x341826B8:  6900         LDR        R0, [R0, #16]
  0x341826BA:  F5B0 7F80    CMP.W      R0, #0x0100
  0x341826BE:  D004         BEQ        46L38                     ; 0x341826CA
  0x341826C0:  9820         LDR        R0, [SP, #128]
  0x341826C2:  6900         LDR        R0, [R0, #16]
  0x341826C4:  F5B0 7FC0    CMP.W      R0, #0x0180
  0x341826C8:  D100         BNE        46L39                     ; 0x341826CC

.L38:
  0x341826CA:  E007         B          46L40                     ; 0x341826DC

.L39:
  0x341826CC:  F244 20F8    MOVW       R0, #0x42F8              ; 0x341842F8 = .rodata..L.str.35
  0x341826D0:  F2C3 4018    MOVT       R0, #0x3418              ; 0x341842F8 = .rodata..L.str.35
  0x341826D4:  F240 11DF    MOVW       R1, #0x01DF
  0x341826D8:  F7FF FBB0    BL         assert_failed            ; 0x34181E3C

.L40:
  0x341826DC:  9820         LDR        R0, [SP, #128]
  0x341826DE:  6940         LDR        R0, [R0, #20]
  0x341826E0:  287F         CMP        R0, #127
  0x341826E2:  D800         BHI        46L41                     ; 0x341826E6
  0x341826E4:  E007         B          46L42                     ; 0x341826F6

.L41:
  0x341826E6:  F244 20F8    MOVW       R0, #0x42F8              ; 0x341842F8 = .rodata..L.str.35
  0x341826EA:  F2C3 4018    MOVT       R0, #0x3418              ; 0x341842F8 = .rodata..L.str.35
  0x341826EE:  F44F 71F0    MOV.W      R1, #0x01E0
  0x341826F2:  F7FF FBA3    BL         assert_failed            ; 0x34181E3C

.L42:
  0x341826F6:  9820         LDR        R0, [SP, #128]
  0x341826F8:  6900         LDR        R0, [R0, #16]
  0x341826FA:  F7FE FE65    BL         LL_RCC_HSI_SetDivider    ; 0x341813C8
  0x341826FE:  9820         LDR        R0, [SP, #128]
  0x34182700:  6940         LDR        R0, [R0, #20]
  0x34182702:  F000 FBBD    BL         LL_RCC_HSI_SetCalibTrimming ; 0x34182E80
  0x34182706:  E059         B          46L55                     ; 0x341827BC

.L43:
  0x34182708:  9820         LDR        R0, [SP, #128]
  0x3418270A:  68C0         LDR        R0, [R0, #12]
  0x3418270C:  2800         CMP        R0, #0
  0x3418270E:  D042         BEQ        46L52                     ; 0x34182796
  0x34182710:  9820         LDR        R0, [SP, #128]
  0x34182712:  6900         LDR        R0, [R0, #16]
  0x34182714:  B168         CBZ        R0, .L44                 ; 0x34182732
  0x34182716:  9820         LDR        R0, [SP, #128]
  0x34182718:  6900         LDR        R0, [R0, #16]
  0x3418271A:  2880         CMP        R0, #128
  0x3418271C:  D009         BEQ        46L44                     ; 0x34182732
  0x3418271E:  9820         LDR        R0, [SP, #128]
  0x34182720:  6900         LDR        R0, [R0, #16]
  0x34182722:  F5B0 7F80    CMP.W      R0, #0x0100
  0x34182726:  D004         BEQ        46L44                     ; 0x34182732
  0x34182728:  9820         LDR        R0, [SP, #128]
  0x3418272A:  6900         LDR        R0, [R0, #16]
  0x3418272C:  F5B0 7FC0    CMP.W      R0, #0x0180
  0x34182730:  D100         BNE        46L45                     ; 0x34182734

.L44:
  0x34182732:  E007         B          46L46                     ; 0x34182744

.L45:
  0x34182734:  F244 20F8    MOVW       R0, #0x42F8              ; 0x341842F8 = .rodata..L.str.35
  0x34182738:  F2C3 4018    MOVT       R0, #0x3418              ; 0x341842F8 = .rodata..L.str.35
  0x3418273C:  F44F 71F7    MOV.W      R1, #0x01EE
  0x34182740:  F7FF FB7C    BL         assert_failed            ; 0x34181E3C

.L46:
  0x34182744:  9820         LDR        R0, [SP, #128]
  0x34182746:  6940         LDR        R0, [R0, #20]
  0x34182748:  287F         CMP        R0, #127
  0x3418274A:  D800         BHI        46L47                     ; 0x3418274E
  0x3418274C:  E007         B          46L48                     ; 0x3418275E

.L47:
  0x3418274E:  F244 20F8    MOVW       R0, #0x42F8              ; 0x341842F8 = .rodata..L.str.35
  0x34182752:  F2C3 4018    MOVT       R0, #0x3418              ; 0x341842F8 = .rodata..L.str.35
  0x34182756:  F240 11EF    MOVW       R1, #0x01EF
  0x3418275A:  F7FF FB6F    BL         assert_failed            ; 0x34181E3C

.L48:
  0x3418275E:  F7FF FE09    BL         LL_RCC_HSI_Enable        ; 0x34182374
  0x34182762:  F7FE F9B3    BL         HAL_GetTick              ; 0x34180ACC
  0x34182766:  901F         STR        R0, [SP, #124]

.L49:
  0x34182768:  F7FE FE3C    BL         LL_RCC_HSI_IsReady       ; 0x341813E4
  0x3418276C:  B950         CBNZ       R0, .L51                 ; 0x34182784
  0x3418276E:  F7FE F9AD    BL         HAL_GetTick              ; 0x34180ACC
  0x34182772:  991F         LDR        R1, [SP, #124]
  0x34182774:  1A40         SUBS       R0, R0, R1
  0x34182776:  2802         CMP        R0, #2
  0x34182778:  D303         BCC        46L50                     ; 0x34182782
  0x3418277A:  2003         MOVS       R0, #3
  0x3418277C:  F88D 0087    STRB.W     R0, [SP, #135]
  0x34182780:  E379         B          46L144                    ; 0x34182E76

.L50:
  0x34182782:  E7F1         B          46L49                     ; 0x34182768

.L51:
  0x34182784:  9820         LDR        R0, [SP, #128]
  0x34182786:  6900         LDR        R0, [R0, #16]
  0x34182788:  F7FE FE1E    BL         LL_RCC_HSI_SetDivider    ; 0x341813C8
  0x3418278C:  9820         LDR        R0, [SP, #128]
  0x3418278E:  6940         LDR        R0, [R0, #20]
  0x34182790:  F000 FB76    BL         LL_RCC_HSI_SetCalibTrimming ; 0x34182E80
  0x34182794:  E012         B          46L55                     ; 0x341827BC

.L52:
  0x34182796:  F000 FB83    BL         LL_RCC_HSI_Disable       ; 0x34182EA0
  0x3418279A:  F7FE F997    BL         HAL_GetTick              ; 0x34180ACC
  0x3418279E:  901F         STR        R0, [SP, #124]

.L53:
  0x341827A0:  F7FE FE20    BL         LL_RCC_HSI_IsReady       ; 0x341813E4
  0x341827A4:  B150         CBZ        R0, .L55                 ; 0x341827BC
  0x341827A6:  F7FE F991    BL         HAL_GetTick              ; 0x34180ACC
  0x341827AA:  991F         LDR        R1, [SP, #124]
  0x341827AC:  1A40         SUBS       R0, R0, R1
  0x341827AE:  2802         CMP        R0, #2
  0x341827B0:  D303         BCC        46L54                     ; 0x341827BA
  0x341827B2:  2003         MOVS       R0, #3
  0x341827B4:  F88D 0087    STRB.W     R0, [SP, #135]
  0x341827B8:  E35D         B          46L144                    ; 0x34182E76

.L54:
  0x341827BA:  E7F1         B          46L53                     ; 0x341827A0

.L55:
  0x341827BC:  9820         LDR        R0, [SP, #128]
  0x341827BE:  7800         LDRB       R0, [R0]
  0x341827C0:  06C0         LSLS       R0, R0, #27
  0x341827C2:  2800         CMP        R0, #0
  0x341827C4:  F140 80A8    BPL.W      46L78                     ; 0x34182918
  0x341827C8:  9820         LDR        R0, [SP, #128]
  0x341827CA:  69C0         LDR        R0, [R0, #28]
  0x341827CC:  B118         CBZ        R0, .L56                 ; 0x341827D6
  0x341827CE:  9820         LDR        R0, [SP, #128]
  0x341827D0:  69C0         LDR        R0, [R0, #28]
  0x341827D2:  2804         CMP        R0, #4
  0x341827D4:  D100         BNE        46L57                     ; 0x341827D8

.L56:
  0x341827D6:  E007         B          46L58                     ; 0x341827E8

.L57:
  0x341827D8:  F244 20F8    MOVW       R0, #0x42F8              ; 0x341842F8 = .rodata..L.str.35
  0x341827DC:  F2C3 4018    MOVT       R0, #0x3418              ; 0x341842F8 = .rodata..L.str.35
  0x341827E0:  F240 211D    MOVW       R1, #0x021D
  0x341827E4:  F7FF FB2A    BL         assert_failed            ; 0x34181E3C

.L58:
  0x341827E8:  981D         LDR        R0, [SP, #116]
  0x341827EA:  F5B0 1F80    CMP.W      R0, #0x100000
  0x341827EE:  D02A         BEQ        46L62                     ; 0x34182846
  0x341827F0:  981E         LDR        R0, [SP, #120]
  0x341827F2:  F1B0 5F80    CMP.W      R0, #0x10000000
  0x341827F6:  D026         BEQ        46L62                     ; 0x34182846
  0x341827F8:  981C         LDR        R0, [SP, #112]
  0x341827FA:  F1B0 5F80    CMP.W      R0, #0x10000000
  0x341827FE:  D105         BNE        46L59                     ; 0x3418280C
  0x34182800:  9818         LDR        R0, [SP, #96]
  0x34182802:  F400 7080    AND        R0, R0, #0x0100
  0x34182806:  F5B0 7F80    CMP.W      R0, #0x0100
  0x3418280A:  D01C         BEQ        46L62                     ; 0x34182846

.L59:
  0x3418280C:  981B         LDR        R0, [SP, #108]
  0x3418280E:  F1B0 5F80    CMP.W      R0, #0x10000000
  0x34182812:  D105         BNE        46L60                     ; 0x34182820
  0x34182814:  9818         LDR        R0, [SP, #96]
  0x34182816:  F400 7000    AND        R0, R0, #0x0200
  0x3418281A:  F5B0 7F00    CMP.W      R0, #0x0200
  0x3418281E:  D012         BEQ        46L62                     ; 0x34182846

.L60:
  0x34182820:  981A         LDR        R0, [SP, #104]
  0x34182822:  F1B0 5F80    CMP.W      R0, #0x10000000
  0x34182826:  D105         BNE        46L61                     ; 0x34182834
  0x34182828:  9818         LDR        R0, [SP, #96]
  0x3418282A:  F400 6080    AND        R0, R0, #0x0400
  0x3418282E:  F5B0 6F80    CMP.W      R0, #0x0400
  0x34182832:  D008         BEQ        46L62                     ; 0x34182846

.L61:
  0x34182834:  9819         LDR        R0, [SP, #100]
  0x34182836:  F1B0 5F80    CMP.W      R0, #0x10000000
  0x3418283A:  D11D         BNE        46L66                     ; 0x34182878
  0x3418283C:  F89D 0061    LDRB.W     R0, [SP, #97]
  0x34182840:  0700         LSLS       R0, R0, #28
  0x34182842:  2800         CMP        R0, #0
  0x34182844:  D518         BPL        46L66                     ; 0x34182878

.L62:
  0x34182846:  9820         LDR        R0, [SP, #128]
  0x34182848:  69C0         LDR        R0, [R0, #28]
  0x3418284A:  B918         CBNZ       R0, .L63                 ; 0x34182854
  0x3418284C:  2001         MOVS       R0, #1
  0x3418284E:  F88D 0087    STRB.W     R0, [SP, #135]
  0x34182852:  E310         B          46L144                    ; 0x34182E76

.L63:
  0x34182854:  9820         LDR        R0, [SP, #128]
  0x34182856:  6A40         LDR        R0, [R0, #36]
  0x34182858:  281F         CMP        R0, #31
  0x3418285A:  D800         BHI        46L64                     ; 0x3418285E
  0x3418285C:  E007         B          46L65                     ; 0x3418286E

.L64:
  0x3418285E:  F244 20F8    MOVW       R0, #0x42F8              ; 0x341842F8 = .rodata..L.str.35
  0x34182862:  F2C3 4018    MOVT       R0, #0x3418              ; 0x341842F8 = .rodata..L.str.35
  0x34182866:  F44F 710C    MOV.W      R1, #0x0230
  0x3418286A:  F7FF FAE7    BL         assert_failed            ; 0x34181E3C

.L65:
  0x3418286E:  9820         LDR        R0, [SP, #128]
  0x34182870:  6A40         LDR        R0, [R0, #36]
  0x34182872:  F000 FB1D    BL         LL_RCC_MSI_SetCalibTrimming ; 0x34182EB0
  0x34182876:  E04F         B          46L78                     ; 0x34182918

.L66:
  0x34182878:  9820         LDR        R0, [SP, #128]
  0x3418287A:  69C0         LDR        R0, [R0, #28]
  0x3418287C:  B3C8         CBZ        R0, .L75                 ; 0x341828F2
  0x3418287E:  9820         LDR        R0, [SP, #128]
  0x34182880:  6A00         LDR        R0, [R0, #32]
  0x34182882:  B120         CBZ        R0, .L67                 ; 0x3418288E
  0x34182884:  9820         LDR        R0, [SP, #128]
  0x34182886:  6A00         LDR        R0, [R0, #32]
  0x34182888:  F5B0 7F00    CMP.W      R0, #0x0200
  0x3418288C:  D100         BNE        46L68                     ; 0x34182890

.L67:
  0x3418288E:  E007         B          46L69                     ; 0x341828A0

.L68:
  0x34182890:  F244 20F8    MOVW       R0, #0x42F8              ; 0x341842F8 = .rodata..L.str.35
  0x34182894:  F2C3 4018    MOVT       R0, #0x3418              ; 0x341842F8 = .rodata..L.str.35
  0x34182898:  F44F 710F    MOV.W      R1, #0x023C
  0x3418289C:  F7FF FACE    BL         assert_failed            ; 0x34181E3C

.L69:
  0x341828A0:  9820         LDR        R0, [SP, #128]
  0x341828A2:  6A40         LDR        R0, [R0, #36]
  0x341828A4:  281F         CMP        R0, #31
  0x341828A6:  D800         BHI        46L70                     ; 0x341828AA
  0x341828A8:  E007         B          46L71                     ; 0x341828BA

.L70:
  0x341828AA:  F244 20F8    MOVW       R0, #0x42F8              ; 0x341842F8 = .rodata..L.str.35
  0x341828AE:  F2C3 4018    MOVT       R0, #0x3418              ; 0x341842F8 = .rodata..L.str.35
  0x341828B2:  F240 213D    MOVW       R1, #0x023D
  0x341828B6:  F7FF FAC1    BL         assert_failed            ; 0x34181E3C

.L71:
  0x341828BA:  9820         LDR        R0, [SP, #128]
  0x341828BC:  6A00         LDR        R0, [R0, #32]
  0x341828BE:  F7FE FDC9    BL         LL_RCC_MSI_SetFrequency  ; 0x34181454
  0x341828C2:  F000 FB05    BL         LL_RCC_MSI_Enable        ; 0x34182ED0
  0x341828C6:  F7FE F901    BL         HAL_GetTick              ; 0x34180ACC
  0x341828CA:  901F         STR        R0, [SP, #124]

.L72:
  0x341828CC:  F7FE FDD0    BL         LL_RCC_MSI_IsReady       ; 0x34181470
  0x341828D0:  B950         CBNZ       R0, .L74                 ; 0x341828E8
  0x341828D2:  F7FE F8FB    BL         HAL_GetTick              ; 0x34180ACC
  0x341828D6:  991F         LDR        R1, [SP, #124]
  0x341828D8:  1A40         SUBS       R0, R0, R1
  0x341828DA:  2802         CMP        R0, #2
  0x341828DC:  D303         BCC        46L73                     ; 0x341828E6
  0x341828DE:  2003         MOVS       R0, #3
  0x341828E0:  F88D 0087    STRB.W     R0, [SP, #135]
  0x341828E4:  E2C7         B          46L144                    ; 0x34182E76

.L73:
  0x341828E6:  E7F1         B          46L72                     ; 0x341828CC

.L74:
  0x341828E8:  9820         LDR        R0, [SP, #128]
  0x341828EA:  6A40         LDR        R0, [R0, #36]
  0x341828EC:  F000 FAE0    BL         LL_RCC_MSI_SetCalibTrimming ; 0x34182EB0
  0x341828F0:  E012         B          46L78                     ; 0x34182918

.L75:
  0x341828F2:  F000 FAF5    BL         LL_RCC_MSI_Disable       ; 0x34182EE0
  0x341828F6:  F7FE F8E9    BL         HAL_GetTick              ; 0x34180ACC
  0x341828FA:  901F         STR        R0, [SP, #124]

.L76:
  0x341828FC:  F7FE FDB8    BL         LL_RCC_MSI_IsReady       ; 0x34181470
  0x34182900:  B150         CBZ        R0, .L78                 ; 0x34182918
  0x34182902:  F7FE F8E3    BL         HAL_GetTick              ; 0x34180ACC
  0x34182906:  991F         LDR        R1, [SP, #124]
  0x34182908:  1A40         SUBS       R0, R0, R1
  0x3418290A:  2802         CMP        R0, #2
  0x3418290C:  D303         BCC        46L77                     ; 0x34182916
  0x3418290E:  2003         MOVS       R0, #3
  0x34182910:  F88D 0087    STRB.W     R0, [SP, #135]
  0x34182914:  E2AF         B          46L144                    ; 0x34182E76

.L77:
  0x34182916:  E7F1         B          46L76                     ; 0x341828FC

.L78:
  0x34182918:  9820         LDR        R0, [SP, #128]
  0x3418291A:  7800         LDRB       R0, [R0]
  0x3418291C:  0700         LSLS       R0, R0, #28
  0x3418291E:  2800         CMP        R0, #0
  0x34182920:  D539         BPL        46L88                     ; 0x34182996
  0x34182922:  9820         LDR        R0, [SP, #128]
  0x34182924:  6980         LDR        R0, [R0, #24]
  0x34182926:  B118         CBZ        R0, .L79                 ; 0x34182930
  0x34182928:  9820         LDR        R0, [SP, #128]
  0x3418292A:  6980         LDR        R0, [R0, #24]
  0x3418292C:  2801         CMP        R0, #1
  0x3418292E:  D100         BNE        46L80                     ; 0x34182932

.L79:
  0x34182930:  E007         B          46L81                     ; 0x34182942

.L80:
  0x34182932:  F244 20F8    MOVW       R0, #0x42F8              ; 0x341842F8 = .rodata..L.str.35
  0x34182936:  F2C3 4018    MOVT       R0, #0x3418              ; 0x341842F8 = .rodata..L.str.35
  0x3418293A:  F240 216D    MOVW       R1, #0x026D
  0x3418293E:  F7FF FA7D    BL         assert_failed            ; 0x34181E3C

.L81:
  0x34182942:  9820         LDR        R0, [SP, #128]
  0x34182944:  6980         LDR        R0, [R0, #24]
  0x34182946:  B198         CBZ        R0, .L85                 ; 0x34182970
  0x34182948:  F000 FAD2    BL         LL_RCC_LSI_Enable        ; 0x34182EF0
  0x3418294C:  F7FE F8BE    BL         HAL_GetTick              ; 0x34180ACC
  0x34182950:  901F         STR        R0, [SP, #124]

.L82:
  0x34182952:  F7FE FD95    BL         LL_RCC_LSI_IsReady       ; 0x34181480
  0x34182956:  B950         CBNZ       R0, .L84                 ; 0x3418296E
  0x34182958:  F7FE F8B8    BL         HAL_GetTick              ; 0x34180ACC
  0x3418295C:  991F         LDR        R1, [SP, #124]
  0x3418295E:  1A40         SUBS       R0, R0, R1
  0x34182960:  2802         CMP        R0, #2
  0x34182962:  D303         BCC        46L83                     ; 0x3418296C
  0x34182964:  2003         MOVS       R0, #3
  0x34182966:  F88D 0087    STRB.W     R0, [SP, #135]
  0x3418296A:  E284         B          46L144                    ; 0x34182E76

.L83:
  0x3418296C:  E7F1         B          46L82                     ; 0x34182952

.L84:
  0x3418296E:  E012         B          46L88                     ; 0x34182996

.L85:
  0x34182970:  F000 FAC6    BL         LL_RCC_LSI_Disable       ; 0x34182F00
  0x34182974:  F7FE F8AA    BL         HAL_GetTick              ; 0x34180ACC
  0x34182978:  901F         STR        R0, [SP, #124]

.L86:
  0x3418297A:  F7FE FD81    BL         LL_RCC_LSI_IsReady       ; 0x34181480
  0x3418297E:  B150         CBZ        R0, .L88                 ; 0x34182996
  0x34182980:  F7FE F8A4    BL         HAL_GetTick              ; 0x34180ACC
  0x34182984:  991F         LDR        R1, [SP, #124]
  0x34182986:  1A40         SUBS       R0, R0, R1
  0x34182988:  2802         CMP        R0, #2
  0x3418298A:  D303         BCC        46L87                     ; 0x34182994
  0x3418298C:  2003         MOVS       R0, #3
  0x3418298E:  F88D 0087    STRB.W     R0, [SP, #135]
  0x34182992:  E270         B          46L144                    ; 0x34182E76

.L87:
  0x34182994:  E7F1         B          46L86                     ; 0x3418297A

.L88:
  0x34182996:  9820         LDR        R0, [SP, #128]
  0x34182998:  7800         LDRB       R0, [R0]
  0x3418299A:  0740         LSLS       R0, R0, #29
  0x3418299C:  2800         CMP        R0, #0
  0x3418299E:  F140 80AF    BPL.W      46L103                    ; 0x34182B00
  0x341829A2:  9820         LDR        R0, [SP, #128]
  0x341829A4:  6880         LDR        R0, [R0, #8]
  0x341829A6:  B188         CBZ        R0, .L89                 ; 0x341829CC
  0x341829A8:  9820         LDR        R0, [SP, #128]
  0x341829AA:  6880         LDR        R0, [R0, #8]
  0x341829AC:  2802         CMP        R0, #2
  0x341829AE:  D00D         BEQ        46L89                     ; 0x341829CC
  0x341829B0:  9820         LDR        R0, [SP, #128]
  0x341829B2:  6880         LDR        R0, [R0, #8]
  0x341829B4:  F248 0102    MOVW       R1, #0x8002
  0x341829B8:  4288         CMP        R0, R1
  0x341829BA:  D007         BEQ        46L89                     ; 0x341829CC
  0x341829BC:  9820         LDR        R0, [SP, #128]
  0x341829BE:  6880         LDR        R0, [R0, #8]
  0x341829C0:  F248 0102    MOVW       R1, #0x8002
  0x341829C4:  F2C0 0101    MOVT       R1, #1
  0x341829C8:  4288         CMP        R0, R1
  0x341829CA:  D100         BNE        46L90                     ; 0x341829CE

.L89:
  0x341829CC:  E007         B          46L91                     ; 0x341829DE

.L90:
  0x341829CE:  F244 20F8    MOVW       R0, #0x42F8              ; 0x341842F8 = .rodata..L.str.35
  0x341829D2:  F2C3 4018    MOVT       R0, #0x3418              ; 0x341842F8 = .rodata..L.str.35
  0x341829D6:  F44F 7126    MOV.W      R1, #0x0298
  0x341829DA:  F7FF FA2F    BL         assert_failed            ; 0x34181E3C

.L91:
  0x341829DE:  9820         LDR        R0, [SP, #128]
  0x341829E0:  6880         LDR        R0, [R0, #8]
  0x341829E2:  2802         CMP        R0, #2
  0x341829E4:  D106         BNE        46L92                     ; 0x341829F4
  0x341829E6:  F648 0100    MOVW       R1, #0x8800
  0x341829EA:  F2C5 6102    MOVT       R1, #0x5602
  0x341829EE:  2002         MOVS       R0, #2
  0x341829F0:  6008         STR        R0, [R1]
  0x341829F2:  E05B         B          46L96                     ; 0x34182AAC

.L92:
  0x341829F4:  9820         LDR        R0, [SP, #128]
  0x341829F6:  6880         LDR        R0, [R0, #8]
  0x341829F8:  B990         CBNZ       R0, .L93                 ; 0x34182A20
  0x341829FA:  F249 0100    MOVW       R1, #0x9000
  0x341829FE:  F2C5 6102    MOVT       R1, #0x5602
  0x34182A02:  2002         MOVS       R0, #2
  0x34182A04:  6008         STR        R0, [R1]
  0x34182A06:  F248 0140    MOVW       R1, #0x8040
  0x34182A0A:  F2C5 6102    MOVT       R1, #0x5602
  0x34182A0E:  6808         LDR        R0, [R1]
  0x34182A10:  F420 3080    BIC        R0, R0, #0x010000
  0x34182A14:  6008         STR        R0, [R1]
  0x34182A16:  6808         LDR        R0, [R1]
  0x34182A18:  F420 4000    BIC        R0, R0, #0x8000
  0x34182A1C:  6008         STR        R0, [R1]
  0x34182A1E:  E045         B          46L96                     ; 0x34182AAC

.L93:
  0x34182A20:  9820         LDR        R0, [SP, #128]
  0x34182A22:  6880         LDR        R0, [R0, #8]
  0x34182A24:  F248 0102    MOVW       R1, #0x8002
  0x34182A28:  4288         CMP        R0, R1
  0x34182A2A:  D112         BNE        46L94                     ; 0x34182A52
  0x34182A2C:  F248 0140    MOVW       R1, #0x8040
  0x34182A30:  F2C5 6102    MOVT       R1, #0x5602
  0x34182A34:  6808         LDR        R0, [R1]
  0x34182A36:  F440 4000    ORR        R0, R0, #0x8000
  0x34182A3A:  6008         STR        R0, [R1]
  0x34182A3C:  6808         LDR        R0, [R1]
  0x34182A3E:  F420 3080    BIC        R0, R0, #0x010000
  0x34182A42:  6008         STR        R0, [R1]
  0x34182A44:  F648 0100    MOVW       R1, #0x8800
  0x34182A48:  F2C5 6102    MOVT       R1, #0x5602
  0x34182A4C:  2002         MOVS       R0, #2
  0x34182A4E:  6008         STR        R0, [R1]
  0x34182A50:  E02C         B          46L96                     ; 0x34182AAC

.L94:
  0x34182A52:  9820         LDR        R0, [SP, #128]
  0x34182A54:  6880         LDR        R0, [R0, #8]
  0x34182A56:  F248 0102    MOVW       R1, #0x8002
  0x34182A5A:  F2C0 0101    MOVT       R1, #1
  0x34182A5E:  4288         CMP        R0, R1
  0x34182A60:  D112         BNE        46L95                     ; 0x34182A88
  0x34182A62:  F248 0140    MOVW       R1, #0x8040
  0x34182A66:  F2C5 6102    MOVT       R1, #0x5602
  0x34182A6A:  6808         LDR        R0, [R1]
  0x34182A6C:  F440 4000    ORR        R0, R0, #0x8000
  0x34182A70:  6008         STR        R0, [R1]
  0x34182A72:  6808         LDR        R0, [R1]
  0x34182A74:  F440 3080    ORR        R0, R0, #0x010000
  0x34182A78:  6008         STR        R0, [R1]
  0x34182A7A:  F648 0100    MOVW       R1, #0x8800
  0x34182A7E:  F2C5 6102    MOVT       R1, #0x5602
  0x34182A82:  2002         MOVS       R0, #2
  0x34182A84:  6008         STR        R0, [R1]
  0x34182A86:  E011         B          46L96                     ; 0x34182AAC

.L95:
  0x34182A88:  F249 0100    MOVW       R1, #0x9000
  0x34182A8C:  F2C5 6102    MOVT       R1, #0x5602
  0x34182A90:  2002         MOVS       R0, #2
  0x34182A92:  6008         STR        R0, [R1]
  0x34182A94:  F248 0140    MOVW       R1, #0x8040
  0x34182A98:  F2C5 6102    MOVT       R1, #0x5602
  0x34182A9C:  6808         LDR        R0, [R1]
  0x34182A9E:  F420 4000    BIC        R0, R0, #0x8000
  0x34182AA2:  6008         STR        R0, [R1]
  0x34182AA4:  6808         LDR        R0, [R1]
  0x34182AA6:  F420 3080    BIC        R0, R0, #0x010000
  0x34182AAA:  6008         STR        R0, [R1]

.L96:
  0x34182AAC:  9820         LDR        R0, [SP, #128]
  0x34182AAE:  6880         LDR        R0, [R0, #8]
  0x34182AB0:  B198         CBZ        R0, .L100                ; 0x34182ADA
  0x34182AB2:  F7FE F80B    BL         HAL_GetTick              ; 0x34180ACC
  0x34182AB6:  901F         STR        R0, [SP, #124]

.L97:
  0x34182AB8:  F7FE FCEA    BL         LL_RCC_LSE_IsReady       ; 0x34181490
  0x34182ABC:  B960         CBNZ       R0, .L99                 ; 0x34182AD8
  0x34182ABE:  F7FE F805    BL         HAL_GetTick              ; 0x34180ACC
  0x34182AC2:  991F         LDR        R1, [SP, #124]
  0x34182AC4:  1A40         SUBS       R0, R0, R1
  0x34182AC6:  F241 3189    MOVW       R1, #0x1389
  0x34182ACA:  4288         CMP        R0, R1
  0x34182ACC:  D303         BCC        46L98                     ; 0x34182AD6
  0x34182ACE:  2003         MOVS       R0, #3
  0x34182AD0:  F88D 0087    STRB.W     R0, [SP, #135]
  0x34182AD4:  E1CF         B          46L144                    ; 0x34182E76

.L98:
  0x34182AD6:  E7EF         B          46L97                     ; 0x34182AB8

.L99:
  0x34182AD8:  E012         B          46L103                    ; 0x34182B00

.L100:
  0x34182ADA:  F7FD FFF7    BL         HAL_GetTick              ; 0x34180ACC
  0x34182ADE:  901F         STR        R0, [SP, #124]

.L101:
  0x34182AE0:  F7FE FCD6    BL         LL_RCC_LSE_IsReady       ; 0x34181490
  0x34182AE4:  B160         CBZ        R0, .L103                ; 0x34182B00
  0x34182AE6:  F7FD FFF1    BL         HAL_GetTick              ; 0x34180ACC
  0x34182AEA:  991F         LDR        R1, [SP, #124]
  0x34182AEC:  1A40         SUBS       R0, R0, R1
  0x34182AEE:  F241 3189    MOVW       R1, #0x1389
  0x34182AF2:  4288         CMP        R0, R1
  0x34182AF4:  D303         BCC        46L102                    ; 0x34182AFE
  0x34182AF6:  2003         MOVS       R0, #3
  0x34182AF8:  F88D 0087    STRB.W     R0, [SP, #135]
  0x34182AFC:  E1BB         B          46L144                    ; 0x34182E76

.L102:
  0x34182AFE:  E7EF         B          46L101                    ; 0x34182AE0

.L103:
  0x34182B00:  9820         LDR        R0, [SP, #128]
  0x34182B02:  6A80         LDR        R0, [R0, #40]
  0x34182B04:  B158         CBZ        R0, .L104                ; 0x34182B1E
  0x34182B06:  9820         LDR        R0, [SP, #128]
  0x34182B08:  6A80         LDR        R0, [R0, #40]
  0x34182B0A:  2801         CMP        R0, #1
  0x34182B0C:  D007         BEQ        46L104                    ; 0x34182B1E
  0x34182B0E:  9820         LDR        R0, [SP, #128]
  0x34182B10:  6A80         LDR        R0, [R0, #40]
  0x34182B12:  2802         CMP        R0, #2
  0x34182B14:  D003         BEQ        46L104                    ; 0x34182B1E
  0x34182B16:  9820         LDR        R0, [SP, #128]
  0x34182B18:  6A80         LDR        R0, [R0, #40]
  0x34182B1A:  2803         CMP        R0, #3
  0x34182B1C:  D100         BNE        46L105                    ; 0x34182B20

.L104:
  0x34182B1E:  E007         B          46L106                    ; 0x34182B30

.L105:
  0x34182B20:  F244 20F8    MOVW       R0, #0x42F8              ; 0x341842F8 = .rodata..L.str.35
  0x34182B24:  F2C3 4018    MOVT       R0, #0x3418              ; 0x341842F8 = .rodata..L.str.35
  0x34182B28:  F240 21BD    MOVW       R1, #0x02BD
  0x34182B2C:  F7FF F986    BL         assert_failed            ; 0x34181E3C

.L106:
  0x34182B30:  9820         LDR        R0, [SP, #128]
  0x34182B32:  6A80         LDR        R0, [R0, #40]
  0x34182B34:  2800         CMP        R0, #0
  0x34182B36:  D04B         BEQ        46L113                    ; 0x34182BD0
  0x34182B38:  9820         LDR        R0, [SP, #128]
  0x34182B3A:  F100 0128    ADD.W      R1, R0, #40
  0x34182B3E:  2000         MOVS       R0, #0
  0x34182B40:  F000 F9E6    BL         RCC_PLL_IsNewConfig      ; 0x34182F10
  0x34182B44:  9017         STR        R0, [SP, #92]
  0x34182B46:  F7FE FCAB    BL         LL_RCC_PLL1_IsReady      ; 0x341814A0
  0x34182B4A:  9016         STR        R0, [SP, #88]
  0x34182B4C:  9817         LDR        R0, [SP, #92]
  0x34182B4E:  2801         CMP        R0, #1
  0x34182B50:  D12F         BNE        46L111                    ; 0x34182BB2
  0x34182B52:  F7FE FCAD    BL         LL_RCC_IC1_GetSource     ; 0x341814B0
  0x34182B56:  9015         STR        R0, [SP, #84]
  0x34182B58:  F7FE FCB2    BL         LL_RCC_IC2_GetSource     ; 0x341814C0
  0x34182B5C:  9014         STR        R0, [SP, #80]
  0x34182B5E:  F7FE FCB7    BL         LL_RCC_IC6_GetSource     ; 0x341814D0
  0x34182B62:  9013         STR        R0, [SP, #76]
  0x34182B64:  F7FE FCBC    BL         LL_RCC_IC11_GetSource    ; 0x341814E0
  0x34182B68:  9012         STR        R0, [SP, #72]
  0x34182B6A:  981D         LDR        R0, [SP, #116]
  0x34182B6C:  F5B0 1F40    CMP.W      R0, #0x300000
  0x34182B70:  D105         BNE        46L107                    ; 0x34182B7E
  0x34182B72:  9815         LDR        R0, [SP, #84]
  0x34182B74:  B918         CBNZ       R0, .L107                ; 0x34182B7E
  0x34182B76:  2001         MOVS       R0, #1
  0x34182B78:  F88D 0087    STRB.W     R0, [SP, #135]
  0x34182B7C:  E17B         B          46L144                    ; 0x34182E76

.L107:
  0x34182B7E:  981E         LDR        R0, [SP, #120]
  0x34182B80:  F1B0 5F40    CMP.W      R0, #0x30000000
  0x34182B84:  D109         BNE        46L109                    ; 0x34182B9A
  0x34182B86:  9814         LDR        R0, [SP, #80]
  0x34182B88:  B118         CBZ        R0, .L108                ; 0x34182B92
  0x34182B8A:  9813         LDR        R0, [SP, #76]
  0x34182B8C:  B108         CBZ        R0, .L108                ; 0x34182B92
  0x34182B8E:  9812         LDR        R0, [SP, #72]
  0x34182B90:  B918         CBNZ       R0, .L109                ; 0x34182B9A

.L108:
  0x34182B92:  2001         MOVS       R0, #1
  0x34182B94:  F88D 0087    STRB.W     R0, [SP, #135]
  0x34182B98:  E16D         B          46L144                    ; 0x34182E76

.L109:
  0x34182B9A:  9820         LDR        R0, [SP, #128]
  0x34182B9C:  F100 0128    ADD.W      R1, R0, #40
  0x34182BA0:  2000         MOVS       R0, #0
  0x34182BA2:  F000 FA23    BL         RCC_PLL_Config           ; 0x34182FEC
  0x34182BA6:  B118         CBZ        R0, .L110                ; 0x34182BB0
  0x34182BA8:  2001         MOVS       R0, #1
  0x34182BAA:  F88D 0087    STRB.W     R0, [SP, #135]
  0x34182BAE:  E162         B          46L144                    ; 0x34182E76

.L110:
  0x34182BB0:  E00E         B          46L113                    ; 0x34182BD0

.L111:
  0x34182BB2:  9820         LDR        R0, [SP, #128]
  0x34182BB4:  6A80         LDR        R0, [R0, #40]
  0x34182BB6:  2802         CMP        R0, #2
  0x34182BB8:  D10A         BNE        46L113                    ; 0x34182BD0
  0x34182BBA:  9816         LDR        R0, [SP, #88]
  0x34182BBC:  B940         CBNZ       R0, .L113                ; 0x34182BD0
  0x34182BBE:  2000         MOVS       R0, #0
  0x34182BC0:  F000 FBBC    BL         RCC_PLL_Enable           ; 0x3418333C
  0x34182BC4:  B118         CBZ        R0, .L112                ; 0x34182BCE
  0x34182BC6:  2001         MOVS       R0, #1
  0x34182BC8:  F88D 0087    STRB.W     R0, [SP, #135]
  0x34182BCC:  E153         B          46L144                    ; 0x34182E76

.L112:
  0x34182BCE:  E7FF         B          46L113                    ; 0x34182BD0

.L113:
  0x34182BD0:  9820         LDR        R0, [SP, #128]
  0x34182BD2:  6C40         LDR        R0, [R0, #68]
  0x34182BD4:  B158         CBZ        R0, .L114                ; 0x34182BEE
  0x34182BD6:  9820         LDR        R0, [SP, #128]
  0x34182BD8:  6C40         LDR        R0, [R0, #68]
  0x34182BDA:  2801         CMP        R0, #1
  0x34182BDC:  D007         BEQ        46L114                    ; 0x34182BEE
  0x34182BDE:  9820         LDR        R0, [SP, #128]
  0x34182BE0:  6C40         LDR        R0, [R0, #68]
  0x34182BE2:  2802         CMP        R0, #2
  0x34182BE4:  D003         BEQ        46L114                    ; 0x34182BEE
  0x34182BE6:  9820         LDR        R0, [SP, #128]
  0x34182BE8:  6C40         LDR        R0, [R0, #68]
  0x34182BEA:  2803         CMP        R0, #3
  0x34182BEC:  D100         BNE        46L115                    ; 0x34182BF0

.L114:
  0x34182BEE:  E007         B          46L116                    ; 0x34182C00

.L115:
  0x34182BF0:  F244 20F8    MOVW       R0, #0x42F8              ; 0x341842F8 = .rodata..L.str.35
  0x34182BF4:  F2C3 4018    MOVT       R0, #0x3418              ; 0x341842F8 = .rodata..L.str.35
  0x34182BF8:  F240 21EB    MOVW       R1, #0x02EB
  0x34182BFC:  F7FF F91E    BL         assert_failed            ; 0x34181E3C

.L116:
  0x34182C00:  9820         LDR        R0, [SP, #128]
  0x34182C02:  6C40         LDR        R0, [R0, #68]
  0x34182C04:  2800         CMP        R0, #0
  0x34182C06:  D053         BEQ        46L123                    ; 0x34182CB0
  0x34182C08:  9820         LDR        R0, [SP, #128]
  0x34182C0A:  F100 0144    ADD.W      R1, R0, #68
  0x34182C0E:  2001         MOVS       R0, #1
  0x34182C10:  F000 F97E    BL         RCC_PLL_IsNewConfig      ; 0x34182F10
  0x34182C14:  9011         STR        R0, [SP, #68]
  0x34182C16:  F7FE FC6B    BL         LL_RCC_PLL2_IsReady      ; 0x341814F0
  0x34182C1A:  9010         STR        R0, [SP, #64]
  0x34182C1C:  9811         LDR        R0, [SP, #68]
  0x34182C1E:  2801         CMP        R0, #1
  0x34182C20:  D137         BNE        46L121                    ; 0x34182C92
  0x34182C22:  F7FE FC45    BL         LL_RCC_IC1_GetSource     ; 0x341814B0
  0x34182C26:  900F         STR        R0, [SP, #60]
  0x34182C28:  F7FE FC4A    BL         LL_RCC_IC2_GetSource     ; 0x341814C0
  0x34182C2C:  900E         STR        R0, [SP, #56]
  0x34182C2E:  F7FE FC4F    BL         LL_RCC_IC6_GetSource     ; 0x341814D0
  0x34182C32:  900D         STR        R0, [SP, #52]
  0x34182C34:  F7FE FC54    BL         LL_RCC_IC11_GetSource    ; 0x341814E0
  0x34182C38:  900C         STR        R0, [SP, #48]
  0x34182C3A:  981D         LDR        R0, [SP, #116]
  0x34182C3C:  F5B0 1F40    CMP.W      R0, #0x300000
  0x34182C40:  D107         BNE        46L117                    ; 0x34182C52
  0x34182C42:  980F         LDR        R0, [SP, #60]
  0x34182C44:  F1B0 5F80    CMP.W      R0, #0x10000000
  0x34182C48:  D103         BNE        46L117                    ; 0x34182C52
  0x34182C4A:  2001         MOVS       R0, #1
  0x34182C4C:  F88D 0087    STRB.W     R0, [SP, #135]
  0x34182C50:  E111         B          46L144                    ; 0x34182E76

.L117:
  0x34182C52:  981E         LDR        R0, [SP, #120]
  0x34182C54:  F1B0 5F40    CMP.W      R0, #0x30000000
  0x34182C58:  D10F         BNE        46L119                    ; 0x34182C7A
  0x34182C5A:  980E         LDR        R0, [SP, #56]
  0x34182C5C:  F1B0 5F80    CMP.W      R0, #0x10000000
  0x34182C60:  D007         BEQ        46L118                    ; 0x34182C72
  0x34182C62:  980D         LDR        R0, [SP, #52]
  0x34182C64:  F1B0 5F80    CMP.W      R0, #0x10000000
  0x34182C68:  D003         BEQ        46L118                    ; 0x34182C72
  0x34182C6A:  980C         LDR        R0, [SP, #48]
  0x34182C6C:  F1B0 5F80    CMP.W      R0, #0x10000000
  0x34182C70:  D103         BNE        46L119                    ; 0x34182C7A

.L118:
  0x34182C72:  2001         MOVS       R0, #1
  0x34182C74:  F88D 0087    STRB.W     R0, [SP, #135]
  0x34182C78:  E0FD         B          46L144                    ; 0x34182E76

.L119:
  0x34182C7A:  9820         LDR        R0, [SP, #128]
  0x34182C7C:  F100 0144    ADD.W      R1, R0, #68
  0x34182C80:  2001         MOVS       R0, #1
  0x34182C82:  F000 F9B3    BL         RCC_PLL_Config           ; 0x34182FEC
  0x34182C86:  B118         CBZ        R0, .L120                ; 0x34182C90
  0x34182C88:  2001         MOVS       R0, #1
  0x34182C8A:  F88D 0087    STRB.W     R0, [SP, #135]
  0x34182C8E:  E0F2         B          46L144                    ; 0x34182E76

.L120:
  0x34182C90:  E00E         B          46L123                    ; 0x34182CB0

.L121:
  0x34182C92:  9820         LDR        R0, [SP, #128]
  0x34182C94:  6C40         LDR        R0, [R0, #68]
  0x34182C96:  2802         CMP        R0, #2
  0x34182C98:  D10A         BNE        46L123                    ; 0x34182CB0
  0x34182C9A:  9810         LDR        R0, [SP, #64]
  0x34182C9C:  B940         CBNZ       R0, .L123                ; 0x34182CB0
  0x34182C9E:  2001         MOVS       R0, #1
  0x34182CA0:  F000 FB4C    BL         RCC_PLL_Enable           ; 0x3418333C
  0x34182CA4:  B118         CBZ        R0, .L122                ; 0x34182CAE
  0x34182CA6:  2001         MOVS       R0, #1
  0x34182CA8:  F88D 0087    STRB.W     R0, [SP, #135]
  0x34182CAC:  E0E3         B          46L144                    ; 0x34182E76

.L122:
  0x34182CAE:  E7FF         B          46L123                    ; 0x34182CB0

.L123:
  0x34182CB0:  9820         LDR        R0, [SP, #128]
  0x34182CB2:  6E00         LDR        R0, [R0, #96]
  0x34182CB4:  B158         CBZ        R0, .L124                ; 0x34182CCE
  0x34182CB6:  9820         LDR        R0, [SP, #128]
  0x34182CB8:  6E00         LDR        R0, [R0, #96]
  0x34182CBA:  2801         CMP        R0, #1
  0x34182CBC:  D007         BEQ        46L124                    ; 0x34182CCE
  0x34182CBE:  9820         LDR        R0, [SP, #128]
  0x34182CC0:  6E00         LDR        R0, [R0, #96]
  0x34182CC2:  2802         CMP        R0, #2
  0x34182CC4:  D003         BEQ        46L124                    ; 0x34182CCE
  0x34182CC6:  9820         LDR        R0, [SP, #128]
  0x34182CC8:  6E00         LDR        R0, [R0, #96]
  0x34182CCA:  2803         CMP        R0, #3
  0x34182CCC:  D100         BNE        46L125                    ; 0x34182CD0

.L124:
  0x34182CCE:  E007         B          46L126                    ; 0x34182CE0

.L125:
  0x34182CD0:  F244 20F8    MOVW       R0, #0x42F8              ; 0x341842F8 = .rodata..L.str.35
  0x34182CD4:  F2C3 4018    MOVT       R0, #0x3418              ; 0x341842F8 = .rodata..L.str.35
  0x34182CD8:  F240 3119    MOVW       R1, #0x0319
  0x34182CDC:  F7FF F8AE    BL         assert_failed            ; 0x34181E3C

.L126:
  0x34182CE0:  9820         LDR        R0, [SP, #128]
  0x34182CE2:  6E00         LDR        R0, [R0, #96]
  0x34182CE4:  2800         CMP        R0, #0
  0x34182CE6:  D053         BEQ        46L133                    ; 0x34182D90
  0x34182CE8:  9820         LDR        R0, [SP, #128]
  0x34182CEA:  F100 0160    ADD.W      R1, R0, #96
  0x34182CEE:  2002         MOVS       R0, #2
  0x34182CF0:  F000 F90E    BL         RCC_PLL_IsNewConfig      ; 0x34182F10
  0x34182CF4:  900B         STR        R0, [SP, #44]
  0x34182CF6:  F7FE FC03    BL         LL_RCC_PLL3_IsReady      ; 0x34181500
  0x34182CFA:  900A         STR        R0, [SP, #40]
  0x34182CFC:  980B         LDR        R0, [SP, #44]
  0x34182CFE:  2801         CMP        R0, #1
  0x34182D00:  D137         BNE        46L131                    ; 0x34182D72
  0x34182D02:  F7FE FBD5    BL         LL_RCC_IC1_GetSource     ; 0x341814B0
  0x34182D06:  9009         STR        R0, [SP, #36]
  0x34182D08:  F7FE FBDA    BL         LL_RCC_IC2_GetSource     ; 0x341814C0
  0x34182D0C:  9008         STR        R0, [SP, #32]
  0x34182D0E:  F7FE FBDF    BL         LL_RCC_IC6_GetSource     ; 0x341814D0
  0x34182D12:  9007         STR        R0, [SP, #28]
  0x34182D14:  F7FE FBE4    BL         LL_RCC_IC11_GetSource    ; 0x341814E0
  0x34182D18:  9006         STR        R0, [SP, #24]
  0x34182D1A:  981D         LDR        R0, [SP, #116]
  0x34182D1C:  F5B0 1F40    CMP.W      R0, #0x300000
  0x34182D20:  D107         BNE        46L127                    ; 0x34182D32
  0x34182D22:  9809         LDR        R0, [SP, #36]
  0x34182D24:  F1B0 5F00    CMP.W      R0, #0x20000000
  0x34182D28:  D103         BNE        46L127                    ; 0x34182D32
  0x34182D2A:  2001         MOVS       R0, #1
  0x34182D2C:  F88D 0087    STRB.W     R0, [SP, #135]
  0x34182D30:  E0A1         B          46L144                    ; 0x34182E76

.L127:
  0x34182D32:  981E         LDR        R0, [SP, #120]
  0x34182D34:  F1B0 5F40    CMP.W      R0, #0x30000000
  0x34182D38:  D10F         BNE        46L129                    ; 0x34182D5A
  0x34182D3A:  9808         LDR        R0, [SP, #32]
  0x34182D3C:  F1B0 5F00    CMP.W      R0, #0x20000000
  0x34182D40:  D007         BEQ        46L128                    ; 0x34182D52
  0x34182D42:  9807         LDR        R0, [SP, #28]
  0x34182D44:  F1B0 5F00    CMP.W      R0, #0x20000000
  0x34182D48:  D003         BEQ        46L128                    ; 0x34182D52
  0x34182D4A:  9806         LDR        R0, [SP, #24]
  0x34182D4C:  F1B0 5F00    CMP.W      R0, #0x20000000
  0x34182D50:  D103         BNE        46L129                    ; 0x34182D5A

.L128:
  0x34182D52:  2001         MOVS       R0, #1
  0x34182D54:  F88D 0087    STRB.W     R0, [SP, #135]
  0x34182D58:  E08D         B          46L144                    ; 0x34182E76

.L129:
  0x34182D5A:  9820         LDR        R0, [SP, #128]
  0x34182D5C:  F100 0160    ADD.W      R1, R0, #96
  0x34182D60:  2002         MOVS       R0, #2
  0x34182D62:  F000 F943    BL         RCC_PLL_Config           ; 0x34182FEC
  0x34182D66:  B118         CBZ        R0, .L130                ; 0x34182D70
  0x34182D68:  2001         MOVS       R0, #1
  0x34182D6A:  F88D 0087    STRB.W     R0, [SP, #135]
  0x34182D6E:  E082         B          46L144                    ; 0x34182E76

.L130:
  0x34182D70:  E00E         B          46L133                    ; 0x34182D90

.L131:
  0x34182D72:  9820         LDR        R0, [SP, #128]
  0x34182D74:  6E00         LDR        R0, [R0, #96]
  0x34182D76:  2802         CMP        R0, #2
  0x34182D78:  D10A         BNE        46L133                    ; 0x34182D90
  0x34182D7A:  980A         LDR        R0, [SP, #40]
  0x34182D7C:  B940         CBNZ       R0, .L133                ; 0x34182D90
  0x34182D7E:  2002         MOVS       R0, #2
  0x34182D80:  F000 FADC    BL         RCC_PLL_Enable           ; 0x3418333C
  0x34182D84:  B118         CBZ        R0, .L132                ; 0x34182D8E
  0x34182D86:  2001         MOVS       R0, #1
  0x34182D88:  F88D 0087    STRB.W     R0, [SP, #135]
  0x34182D8C:  E073         B          46L144                    ; 0x34182E76

.L132:
  0x34182D8E:  E7FF         B          46L133                    ; 0x34182D90

.L133:
  0x34182D90:  9820         LDR        R0, [SP, #128]
  0x34182D92:  6FC0         LDR        R0, [R0, #124]
  0x34182D94:  B158         CBZ        R0, .L134                ; 0x34182DAE
  0x34182D96:  9820         LDR        R0, [SP, #128]
  0x34182D98:  6FC0         LDR        R0, [R0, #124]
  0x34182D9A:  2801         CMP        R0, #1
  0x34182D9C:  D007         BEQ        46L134                    ; 0x34182DAE
  0x34182D9E:  9820         LDR        R0, [SP, #128]
  0x34182DA0:  6FC0         LDR        R0, [R0, #124]
  0x34182DA2:  2802         CMP        R0, #2
  0x34182DA4:  D003         BEQ        46L134                    ; 0x34182DAE
  0x34182DA6:  9820         LDR        R0, [SP, #128]
  0x34182DA8:  6FC0         LDR        R0, [R0, #124]
  0x34182DAA:  2803         CMP        R0, #3
  0x34182DAC:  D100         BNE        46L135                    ; 0x34182DB0

.L134:
  0x34182DAE:  E007         B          46L136                    ; 0x34182DC0

.L135:
  0x34182DB0:  F244 20F8    MOVW       R0, #0x42F8              ; 0x341842F8 = .rodata..L.str.35
  0x34182DB4:  F2C3 4018    MOVT       R0, #0x3418              ; 0x341842F8 = .rodata..L.str.35
  0x34182DB8:  F240 3146    MOVW       R1, #0x0346
  0x34182DBC:  F7FF F83E    BL         assert_failed            ; 0x34181E3C

.L136:
  0x34182DC0:  9820         LDR        R0, [SP, #128]
  0x34182DC2:  6FC0         LDR        R0, [R0, #124]
  0x34182DC4:  2800         CMP        R0, #0
  0x34182DC6:  D053         BEQ        46L143                    ; 0x34182E70
  0x34182DC8:  9820         LDR        R0, [SP, #128]
  0x34182DCA:  F100 017C    ADD.W      R1, R0, #124
  0x34182DCE:  2003         MOVS       R0, #3
  0x34182DD0:  F000 F89E    BL         RCC_PLL_IsNewConfig      ; 0x34182F10
  0x34182DD4:  9005         STR        R0, [SP, #20]
  0x34182DD6:  F7FE FB9B    BL         LL_RCC_PLL4_IsReady      ; 0x34181510
  0x34182DDA:  9004         STR        R0, [SP, #16]
  0x34182DDC:  9805         LDR        R0, [SP, #20]
  0x34182DDE:  2801         CMP        R0, #1
  0x34182DE0:  D137         BNE        46L141                    ; 0x34182E52
  0x34182DE2:  F7FE FB65    BL         LL_RCC_IC1_GetSource     ; 0x341814B0
  0x34182DE6:  9003         STR        R0, [SP, #12]
  0x34182DE8:  F7FE FB6A    BL         LL_RCC_IC2_GetSource     ; 0x341814C0
  0x34182DEC:  9002         STR        R0, [SP, #8]
  0x34182DEE:  F7FE FB6F    BL         LL_RCC_IC6_GetSource     ; 0x341814D0
  0x34182DF2:  9001         STR        R0, [SP, #4]
  0x34182DF4:  F7FE FB74    BL         LL_RCC_IC11_GetSource    ; 0x341814E0
  0x34182DF8:  9000         STR        R0, [SP, #0]
  0x34182DFA:  981D         LDR        R0, [SP, #116]
  0x34182DFC:  F5B0 1F40    CMP.W      R0, #0x300000
  0x34182E00:  D107         BNE        46L137                    ; 0x34182E12
  0x34182E02:  9803         LDR        R0, [SP, #12]
  0x34182E04:  F1B0 5F40    CMP.W      R0, #0x30000000
  0x34182E08:  D103         BNE        46L137                    ; 0x34182E12
  0x34182E0A:  2001         MOVS       R0, #1
  0x34182E0C:  F88D 0087    STRB.W     R0, [SP, #135]
  0x34182E10:  E031         B          46L144                    ; 0x34182E76

.L137:
  0x34182E12:  981E         LDR        R0, [SP, #120]
  0x34182E14:  F1B0 5F40    CMP.W      R0, #0x30000000
  0x34182E18:  D10F         BNE        46L139                    ; 0x34182E3A
  0x34182E1A:  9802         LDR        R0, [SP, #8]
  0x34182E1C:  F1B0 5F40    CMP.W      R0, #0x30000000
  0x34182E20:  D007         BEQ        46L138                    ; 0x34182E32
  0x34182E22:  9801         LDR        R0, [SP, #4]
  0x34182E24:  F1B0 5F40    CMP.W      R0, #0x30000000
  0x34182E28:  D003         BEQ        46L138                    ; 0x34182E32
  0x34182E2A:  9800         LDR        R0, [SP, #0]
  0x34182E2C:  F1B0 5F40    CMP.W      R0, #0x30000000
  0x34182E30:  D103         BNE        46L139                    ; 0x34182E3A

.L138:
  0x34182E32:  2001         MOVS       R0, #1
  0x34182E34:  F88D 0087    STRB.W     R0, [SP, #135]
  0x34182E38:  E01D         B          46L144                    ; 0x34182E76

.L139:
  0x34182E3A:  9820         LDR        R0, [SP, #128]
  0x34182E3C:  F100 017C    ADD.W      R1, R0, #124
  0x34182E40:  2003         MOVS       R0, #3
  0x34182E42:  F000 F8D3    BL         RCC_PLL_Config           ; 0x34182FEC
  0x34182E46:  B118         CBZ        R0, .L140                ; 0x34182E50
  0x34182E48:  2001         MOVS       R0, #1
  0x34182E4A:  F88D 0087    STRB.W     R0, [SP, #135]
  0x34182E4E:  E012         B          46L144                    ; 0x34182E76

.L140:
  0x34182E50:  E00E         B          46L143                    ; 0x34182E70

.L141:
  0x34182E52:  9820         LDR        R0, [SP, #128]
  0x34182E54:  6FC0         LDR        R0, [R0, #124]
  0x34182E56:  2802         CMP        R0, #2
  0x34182E58:  D10A         BNE        46L143                    ; 0x34182E70
  0x34182E5A:  9804         LDR        R0, [SP, #16]
  0x34182E5C:  B940         CBNZ       R0, .L143                ; 0x34182E70
  0x34182E5E:  2003         MOVS       R0, #3
  0x34182E60:  F000 FA6C    BL         RCC_PLL_Enable           ; 0x3418333C
  0x34182E64:  B118         CBZ        R0, .L142                ; 0x34182E6E
  0x34182E66:  2001         MOVS       R0, #1
  0x34182E68:  F88D 0087    STRB.W     R0, [SP, #135]
  0x34182E6C:  E003         B          46L144                    ; 0x34182E76

.L142:
  0x34182E6E:  E7FF         B          46L143                    ; 0x34182E70

.L143:
  0x34182E70:  2000         MOVS       R0, #0
  0x34182E72:  F88D 0087    STRB.W     R0, [SP, #135]

.L144:
  0x34182E76:  F89D 0087    LDRB.W     R0, [SP, #135]
  0x34182E7A:  B022         ADD        SP, SP, #136
  0x34182E7C:  BD80         POP        123R7, PC}

Section .init.EXTI9_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI9_IRQHandler:
  0x34182E7E:  E7FE         B          EXTI9_IRQHandler         ; 0x34182E7E

Section .text.LL_RCC_HSI_SetCalibTrimming from blto2_FSBL_lto.o, size=30, align=4


LL_RCC_HSI_SetCalibTrimming:
  0x34182E80:  B081         SUB        SP, SP, #4
  0x34182E82:  9000         STR        R0, [SP, #0]
  0x34182E84:  F248 0148    MOVW       R1, #0x8048
  0x34182E88:  F2C5 6102    MOVT       R1, #0x5602
  0x34182E8C:  6808         LDR        R0, [R1]
  0x34182E8E:  F420 00FE    BIC        R0, R0, #0x7F0000
  0x34182E92:  9A00         LDR        R2, [SP, #0]
  0x34182E94:  EA40 4002    ORR.W      R0, R0, R2, LSL #16
  0x34182E98:  6008         STR        R0, [R1]
  0x34182E9A:  B001         ADD        SP, SP, #4
  0x34182E9C:  4770         BX         LR

Section .init.EXTI10_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI10_IRQHandler:
  0x34182E9E:  E7FE         B          EXTI10_IRQHandler        ; 0x34182E9E

Section .text.LL_RCC_HSI_Disable from blto2_FSBL_lto.o, size=14, align=4


LL_RCC_HSI_Disable:
  0x34182EA0:  F249 0100    MOVW       R1, #0x9000
  0x34182EA4:  F2C5 6102    MOVT       R1, #0x5602
  0x34182EA8:  2008         MOVS       R0, #8
  0x34182EAA:  6008         STR        R0, [R1]
  0x34182EAC:  4770         BX         LR

Section .init.EXTI11_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI11_IRQHandler:
  0x34182EAE:  E7FE         B          EXTI11_IRQHandler        ; 0x34182EAE

Section .text.LL_RCC_MSI_SetCalibTrimming from blto2_FSBL_lto.o, size=30, align=4


LL_RCC_MSI_SetCalibTrimming:
  0x34182EB0:  B081         SUB        SP, SP, #4
  0x34182EB2:  9000         STR        R0, [SP, #0]
  0x34182EB4:  F248 0144    MOVW       R1, #0x8044
  0x34182EB8:  F2C5 6102    MOVT       R1, #0x5602
  0x34182EBC:  6808         LDR        R0, [R1]
  0x34182EBE:  F420 10F8    BIC        R0, R0, #0x1F0000
  0x34182EC2:  9A00         LDR        R2, [SP, #0]
  0x34182EC4:  EA40 4002    ORR.W      R0, R0, R2, LSL #16
  0x34182EC8:  6008         STR        R0, [R1]
  0x34182ECA:  B001         ADD        SP, SP, #4
  0x34182ECC:  4770         BX         LR

Section .init.EXTI12_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI12_IRQHandler:
  0x34182ECE:  E7FE         B          EXTI12_IRQHandler        ; 0x34182ECE

Section .text.LL_RCC_MSI_Enable from blto2_FSBL_lto.o, size=14, align=4


LL_RCC_MSI_Enable:
  0x34182ED0:  F648 0100    MOVW       R1, #0x8800
  0x34182ED4:  F2C5 6102    MOVT       R1, #0x5602
  0x34182ED8:  2004         MOVS       R0, #4
  0x34182EDA:  6008         STR        R0, [R1]
  0x34182EDC:  4770         BX         LR

Section .init.EXTI13_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI13_IRQHandler:
  0x34182EDE:  E7FE         B          EXTI13_IRQHandler        ; 0x34182EDE

Section .text.LL_RCC_MSI_Disable from blto2_FSBL_lto.o, size=14, align=4


LL_RCC_MSI_Disable:
  0x34182EE0:  F249 0100    MOVW       R1, #0x9000
  0x34182EE4:  F2C5 6102    MOVT       R1, #0x5602
  0x34182EE8:  2004         MOVS       R0, #4
  0x34182EEA:  6008         STR        R0, [R1]
  0x34182EEC:  4770         BX         LR

Section .init.EXTI14_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI14_IRQHandler:
  0x34182EEE:  E7FE         B          EXTI14_IRQHandler        ; 0x34182EEE

Section .text.LL_RCC_LSI_Enable from blto2_FSBL_lto.o, size=14, align=4


LL_RCC_LSI_Enable:
  0x34182EF0:  F648 0100    MOVW       R1, #0x8800
  0x34182EF4:  F2C5 6102    MOVT       R1, #0x5602
  0x34182EF8:  2001         MOVS       R0, #1
  0x34182EFA:  6008         STR        R0, [R1]
  0x34182EFC:  4770         BX         LR

Section .init.EXTI15_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


EXTI15_IRQHandler:
  0x34182EFE:  E7FE         B          EXTI15_IRQHandler        ; 0x34182EFE

Section .text.LL_RCC_LSI_Disable from blto2_FSBL_lto.o, size=14, align=4


LL_RCC_LSI_Disable:
  0x34182F00:  F249 0100    MOVW       R1, #0x9000
  0x34182F04:  F2C5 6102    MOVT       R1, #0x5602
  0x34182F08:  2001         MOVS       R0, #1
  0x34182F0A:  6008         STR        R0, [R1]
  0x34182F0C:  4770         BX         LR

Section .init.SAES_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SAES_IRQHandler:
  0x34182F0E:  E7FE         B          SAES_IRQHandler          ; 0x34182F0E

Section .text.RCC_PLL_IsNewConfig from blto2_FSBL_lto.o, size=218, align=4


RCC_PLL_IsNewConfig:
  0x34182F10:  B087         SUB        SP, SP, #28
  0x34182F12:  9006         STR        R0, [SP, #24]
  0x34182F14:  9105         STR        R1, [SP, #20]
  0x34182F16:  2000         MOVS       R0, #0
  0x34182F18:  9001         STR        R0, [SP, #4]
  0x34182F1A:  9906         LDR        R1, [SP, #24]
  0x34182F1C:  F248 0080    MOVW       R0, #0x8080
  0x34182F20:  F2C5 6002    MOVT       R0, #0x5602
  0x34182F24:  EB00 1001    ADD.W      R0, R0, R1, LSL #4
  0x34182F28:  9004         STR        R0, [SP, #16]
  0x34182F2A:  9906         LDR        R1, [SP, #24]
  0x34182F2C:  F248 0084    MOVW       R0, #0x8084
  0x34182F30:  F2C5 6002    MOVT       R0, #0x5602
  0x34182F34:  EB00 1001    ADD.W      R0, R0, R1, LSL #4
  0x34182F38:  9003         STR        R0, [SP, #12]
  0x34182F3A:  9906         LDR        R1, [SP, #24]
  0x34182F3C:  F248 0088    MOVW       R0, #0x8088
  0x34182F40:  F2C5 6002    MOVT       R0, #0x5602
  0x34182F44:  EB00 1001    ADD.W      R0, R0, R1, LSL #4
  0x34182F48:  9002         STR        R0, [SP, #8]
  0x34182F4A:  9804         LDR        R0, [SP, #16]
  0x34182F4C:  6800         LDR        R0, [R0]
  0x34182F4E:  F64F 7100    MOVW       R1, #0xFF00
  0x34182F52:  F2C7 31FF    MOVT       R1, #0x73FF
  0x34182F56:  4008         ANDS       R0, R1
  0x34182F58:  9A05         LDR        R2, [SP, #20]
  0x34182F5A:  6851         LDR        R1, [R2, #4]
  0x34182F5C:  6893         LDR        R3, [R2, #8]
  0x34182F5E:  6912         LDR        R2, [R2, #16]
  0x34182F60:  EA41 5103    ORR.W      R1, R1, R3, LSL #20
  0x34182F64:  EA41 2102    ORR.W      R1, R1, R2, LSL #8
  0x34182F68:  4288         CMP        R0, R1
  0x34182F6A:  D002         BEQ        46L1                      ; 0x34182F72
  0x34182F6C:  2001         MOVS       R0, #1
  0x34182F6E:  9001         STR        R0, [SP, #4]
  0x34182F70:  E038         B          46L7                      ; 0x34182FE4

.L1:
  0x34182F72:  9803         LDR        R0, [SP, #12]
  0x34182F74:  6800         LDR        R0, [R0]
  0x34182F76:  F020 407F    BIC        R0, R0, #0xFF000000
  0x34182F7A:  9905         LDR        R1, [SP, #20]
  0x34182F7C:  68C9         LDR        R1, [R1, #12]
  0x34182F7E:  4288         CMP        R0, R1
  0x34182F80:  D002         BEQ        46L2                      ; 0x34182F88
  0x34182F82:  2001         MOVS       R0, #1
  0x34182F84:  9001         STR        R0, [SP, #4]
  0x34182F86:  E02D         B          46L7                      ; 0x34182FE4

.L2:
  0x34182F88:  9802         LDR        R0, [SP, #8]
  0x34182F8A:  6800         LDR        R0, [R0]
  0x34182F8C:  F000 507C    AND        R0, R0, #0x3F000000
  0x34182F90:  9A05         LDR        R2, [SP, #20]
  0x34182F92:  6951         LDR        R1, [R2, #20]
  0x34182F94:  6992         LDR        R2, [R2, #24]
  0x34182F96:  06C9         LSLS       R1, R1, #27
  0x34182F98:  EA41 6102    ORR.W      R1, R1, R2, LSL #24
  0x34182F9C:  4288         CMP        R0, R1
  0x34182F9E:  D002         BEQ        46L3                      ; 0x34182FA6
  0x34182FA0:  2001         MOVS       R0, #1
  0x34182FA2:  9001         STR        R0, [SP, #4]
  0x34182FA4:  E01E         B          46L7                      ; 0x34182FE4

.L3:
  0x34182FA6:  F248 0004    MOVW       R0, #0x8004
  0x34182FAA:  F2C5 6002    MOVT       R0, #0x5602
  0x34182FAE:  6800         LDR        R0, [R0]
  0x34182FB0:  43C0         MVNS       R0, R0
  0x34182FB2:  9906         LDR        R1, [SP, #24]
  0x34182FB4:  40C8         LSRS       R0, R1
  0x34182FB6:  05C0         LSLS       R0, R0, #23
  0x34182FB8:  2800         CMP        R0, #0
  0x34182FBA:  D402         BMI        46L4                      ; 0x34182FC2
  0x34182FBC:  2002         MOVS       R0, #2
  0x34182FBE:  9000         STR        R0, [SP, #0]
  0x34182FC0:  E009         B          46L6                      ; 0x34182FD6

.L4:
  0x34182FC2:  9804         LDR        R0, [SP, #16]
  0x34182FC4:  6800         LDR        R0, [R0]
  0x34182FC6:  0100         LSLS       R0, R0, #4
  0x34182FC8:  2800         CMP        R0, #0
  0x34182FCA:  D502         BPL        46L5                      ; 0x34182FD2
  0x34182FCC:  2003         MOVS       R0, #3
  0x34182FCE:  9000         STR        R0, [SP, #0]
  0x34182FD0:  E001         B          46L6                      ; 0x34182FD6

.L5:
  0x34182FD2:  2001         MOVS       R0, #1
  0x34182FD4:  9000         STR        R0, [SP, #0]

.L6:
  0x34182FD6:  9800         LDR        R0, [SP, #0]
  0x34182FD8:  9905         LDR        R1, [SP, #20]
  0x34182FDA:  6809         LDR        R1, [R1]
  0x34182FDC:  4288         CMP        R0, R1
  0x34182FDE:  D001         BEQ        46L7                      ; 0x34182FE4
  0x34182FE0:  2001         MOVS       R0, #1
  0x34182FE2:  9001         STR        R0, [SP, #4]

.L7:
  0x34182FE4:  9801         LDR        R0, [SP, #4]
  0x34182FE6:  B007         ADD        SP, SP, #28
  0x34182FE8:  4770         BX         LR

Section .init.CRYP_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


CRYP_IRQHandler:
  0x34182FEA:  E7FE         B          CRYP_IRQHandler          ; 0x34182FEA

Section .text.RCC_PLL_Config from blto2_FSBL_lto.o, size=846, align=4


RCC_PLL_Config:
  0x34182FEC:  B580         PUSH       123R7, LR}
  0x34182FEE:  B088         SUB        SP, SP, #32
  0x34182FF0:  9006         STR        R0, [SP, #24]
  0x34182FF2:  9105         STR        R1, [SP, #20]
  0x34182FF4:  2000         MOVS       R0, #0
  0x34182FF6:  F88D 0007    STRB.W     R0, [SP, #7]
  0x34182FFA:  9906         LDR        R1, [SP, #24]
  0x34182FFC:  F248 0080    MOVW       R0, #0x8080
  0x34183000:  F2C5 6002    MOVT       R0, #0x5602
  0x34183004:  EB00 1001    ADD.W      R0, R0, R1, LSL #4
  0x34183008:  9004         STR        R0, [SP, #16]
  0x3418300A:  9906         LDR        R1, [SP, #24]
  0x3418300C:  F248 0084    MOVW       R0, #0x8084
  0x34183010:  F2C5 6002    MOVT       R0, #0x5602
  0x34183014:  EB00 1001    ADD.W      R0, R0, R1, LSL #4
  0x34183018:  9003         STR        R0, [SP, #12]
  0x3418301A:  9906         LDR        R1, [SP, #24]
  0x3418301C:  F248 0088    MOVW       R0, #0x8088
  0x34183020:  F2C5 6002    MOVT       R0, #0x5602
  0x34183024:  EB00 1001    ADD.W      R0, R0, R1, LSL #4
  0x34183028:  9002         STR        R0, [SP, #8]
  0x3418302A:  9805         LDR        R0, [SP, #20]
  0x3418302C:  6800         LDR        R0, [R0]
  0x3418302E:  2802         CMP        R0, #2
  0x34183030:  F040 80F3    BNE.W      46L21                     ; 0x3418321A
  0x34183034:  9805         LDR        R0, [SP, #20]
  0x34183036:  6840         LDR        R0, [R0, #4]
  0x34183038:  B170         CBZ        R0, .L1                  ; 0x34183058
  0x3418303A:  9805         LDR        R0, [SP, #20]
  0x3418303C:  6840         LDR        R0, [R0, #4]
  0x3418303E:  F1B0 5F80    CMP.W      R0, #0x10000000
  0x34183042:  D009         BEQ        46L1                      ; 0x34183058
  0x34183044:  9805         LDR        R0, [SP, #20]
  0x34183046:  6840         LDR        R0, [R0, #4]
  0x34183048:  F1B0 5F00    CMP.W      R0, #0x20000000
  0x3418304C:  D004         BEQ        46L1                      ; 0x34183058
  0x3418304E:  9805         LDR        R0, [SP, #20]
  0x34183050:  6840         LDR        R0, [R0, #4]
  0x34183052:  F1B0 5F40    CMP.W      R0, #0x30000000
  0x34183056:  D100         BNE        46L2                      ; 0x3418305A

.L1:
  0x34183058:  E007         B          46L3                      ; 0x3418306A

.L2:
  0x3418305A:  F244 20F8    MOVW       R0, #0x42F8              ; 0x341842F8 = .rodata..L.str.35
  0x3418305E:  F2C3 4018    MOVT       R0, #0x3418              ; 0x341842F8 = .rodata..L.str.35
  0x34183062:  F640 0159    MOVW       R1, #0x0859
  0x34183066:  F7FE FEE9    BL         assert_failed            ; 0x34181E3C

.L3:
  0x3418306A:  9805         LDR        R0, [SP, #20]
  0x3418306C:  7BC0         LDRB       R0, [R0, #15]
  0x3418306E:  B900         CBNZ       R0, .L4                  ; 0x34183072
  0x34183070:  E007         B          46L5                      ; 0x34183082

.L4:
  0x34183072:  F244 20F8    MOVW       R0, #0x42F8              ; 0x341842F8 = .rodata..L.str.35
  0x34183076:  F2C3 4018    MOVT       R0, #0x3418              ; 0x341842F8 = .rodata..L.str.35
  0x3418307A:  F640 015A    MOVW       R1, #0x085A
  0x3418307E:  F7FE FEDD    BL         assert_failed            ; 0x34181E3C

.L5:
  0x34183082:  9805         LDR        R0, [SP, #20]
  0x34183084:  6880         LDR        R0, [R0, #8]
  0x34183086:  B120         CBZ        R0, .L6                  ; 0x34183092
  0x34183088:  9805         LDR        R0, [SP, #20]
  0x3418308A:  6880         LDR        R0, [R0, #8]
  0x3418308C:  283F         CMP        R0, #63
  0x3418308E:  D800         BHI        46L6                      ; 0x34183092
  0x34183090:  E007         B          46L7                      ; 0x341830A2

.L6:
  0x34183092:  F244 20F8    MOVW       R0, #0x42F8              ; 0x341842F8 = .rodata..L.str.35
  0x34183096:  F2C3 4018    MOVT       R0, #0x3418              ; 0x341842F8 = .rodata..L.str.35
  0x3418309A:  F640 015B    MOVW       R1, #0x085B
  0x3418309E:  F7FE FECD    BL         assert_failed            ; 0x34181E3C

.L7:
  0x341830A2:  9805         LDR        R0, [SP, #20]
  0x341830A4:  6900         LDR        R0, [R0, #16]
  0x341830A6:  280A         CMP        R0, #10
  0x341830A8:  D306         BCC        46L8                      ; 0x341830B8
  0x341830AA:  9805         LDR        R0, [SP, #20]
  0x341830AC:  6900         LDR        R0, [R0, #16]
  0x341830AE:  F640 11C4    MOVW       R1, #0x09C4
  0x341830B2:  4288         CMP        R0, R1
  0x341830B4:  D800         BHI        46L8                      ; 0x341830B8
  0x341830B6:  E007         B          46L9                      ; 0x341830C8

.L8:
  0x341830B8:  F244 20F8    MOVW       R0, #0x42F8              ; 0x341842F8 = .rodata..L.str.35
  0x341830BC:  F2C3 4018    MOVT       R0, #0x3418              ; 0x341842F8 = .rodata..L.str.35
  0x341830C0:  F640 015C    MOVW       R1, #0x085C
  0x341830C4:  F7FE FEBA    BL         assert_failed            ; 0x34181E3C

.L9:
  0x341830C8:  9805         LDR        R0, [SP, #20]
  0x341830CA:  6940         LDR        R0, [R0, #20]
  0x341830CC:  B120         CBZ        R0, .L10                 ; 0x341830D8
  0x341830CE:  9805         LDR        R0, [SP, #20]
  0x341830D0:  6940         LDR        R0, [R0, #20]
  0x341830D2:  2807         CMP        R0, #7
  0x341830D4:  D800         BHI        46L10                     ; 0x341830D8
  0x341830D6:  E007         B          46L11                     ; 0x341830E8

.L10:
  0x341830D8:  F244 20F8    MOVW       R0, #0x42F8              ; 0x341842F8 = .rodata..L.str.35
  0x341830DC:  F2C3 4018    MOVT       R0, #0x3418              ; 0x341842F8 = .rodata..L.str.35
  0x341830E0:  F640 015D    MOVW       R1, #0x085D
  0x341830E4:  F7FE FEAA    BL         assert_failed            ; 0x34181E3C

.L11:
  0x341830E8:  9805         LDR        R0, [SP, #20]
  0x341830EA:  6980         LDR        R0, [R0, #24]
  0x341830EC:  B120         CBZ        R0, .L12                 ; 0x341830F8
  0x341830EE:  9805         LDR        R0, [SP, #20]
  0x341830F0:  6980         LDR        R0, [R0, #24]
  0x341830F2:  2807         CMP        R0, #7
  0x341830F4:  D800         BHI        46L12                     ; 0x341830F8
  0x341830F6:  E007         B          46L13                     ; 0x34183108

.L12:
  0x341830F8:  F244 20F8    MOVW       R0, #0x42F8              ; 0x341842F8 = .rodata..L.str.35
  0x341830FC:  F2C3 4018    MOVT       R0, #0x3418              ; 0x341842F8 = .rodata..L.str.35
  0x34183100:  F640 015E    MOVW       R1, #0x085E
  0x34183104:  F7FE FE9A    BL         assert_failed            ; 0x34181E3C

.L13:
  0x34183108:  9906         LDR        R1, [SP, #24]
  0x3418310A:  F44F 7080    MOV.W      R0, #0x0100
  0x3418310E:  4088         LSLS       R0, R1
  0x34183110:  F249 0100    MOVW       R1, #0x9000
  0x34183114:  F2C5 6102    MOVT       R1, #0x5602
  0x34183118:  6008         STR        R0, [R1]
  0x3418311A:  F7FD FCD7    BL         HAL_GetTick              ; 0x34180ACC
  0x3418311E:  9000         STR        R0, [SP, #0]

.L14:
  0x34183120:  F248 0004    MOVW       R0, #0x8004
  0x34183124:  F2C5 6002    MOVT       R0, #0x5602
  0x34183128:  6800         LDR        R0, [R0]
  0x3418312A:  43C0         MVNS       R0, R0
  0x3418312C:  9906         LDR        R1, [SP, #24]
  0x3418312E:  40C8         LSRS       R0, R1
  0x34183130:  05C0         LSLS       R0, R0, #23
  0x34183132:  2800         CMP        R0, #0
  0x34183134:  D40A         BMI        46L16                     ; 0x3418314C
  0x34183136:  F7FD FCC9    BL         HAL_GetTick              ; 0x34180ACC
  0x3418313A:  9900         LDR        R1, [SP, #0]
  0x3418313C:  1A40         SUBS       R0, R0, R1
  0x3418313E:  2802         CMP        R0, #2
  0x34183140:  D303         BCC        46L15                     ; 0x3418314A
  0x34183142:  2003         MOVS       R0, #3
  0x34183144:  F88D 001F    STRB.W     R0, [SP, #31]
  0x34183148:  E0F3         B          46L35                     ; 0x34183332

.L15:
  0x3418314A:  E7E9         B          46L14                     ; 0x34183120

.L16:
  0x3418314C:  9902         LDR        R1, [SP, #8]
  0x3418314E:  6808         LDR        R0, [R1]
  0x34183150:  F040 0004    ORR        R0, R0, #4
  0x34183154:  6008         STR        R0, [R1]
  0x34183156:  9904         LDR        R1, [SP, #16]
  0x34183158:  6808         LDR        R0, [R1]
  0x3418315A:  F020 6000    BIC        R0, R0, #0x08000000
  0x3418315E:  6008         STR        R0, [R1]
  0x34183160:  9804         LDR        R0, [SP, #16]
  0x34183162:  6800         LDR        R0, [R0]
  0x34183164:  21FF         MOVS       R1, #255
  0x34183166:  F6C8 4100    MOVT       R1, #0x8C00
  0x3418316A:  4008         ANDS       R0, R1
  0x3418316C:  9A05         LDR        R2, [SP, #20]
  0x3418316E:  6851         LDR        R1, [R2, #4]
  0x34183170:  6893         LDR        R3, [R2, #8]
  0x34183172:  6912         LDR        R2, [R2, #16]
  0x34183174:  EA41 5103    ORR.W      R1, R1, R3, LSL #20
  0x34183178:  EA41 2102    ORR.W      R1, R1, R2, LSL #8
  0x3418317C:  4308         ORRS       R0, R1
  0x3418317E:  9904         LDR        R1, [SP, #16]
  0x34183180:  6008         STR        R0, [R1]
  0x34183182:  9802         LDR        R0, [SP, #8]
  0x34183184:  6800         LDR        R0, [R0]
  0x34183186:  F020 507C    BIC        R0, R0, #0x3F000000
  0x3418318A:  9A05         LDR        R2, [SP, #20]
  0x3418318C:  6951         LDR        R1, [R2, #20]
  0x3418318E:  6992         LDR        R2, [R2, #24]
  0x34183190:  06C9         LSLS       R1, R1, #27
  0x34183192:  EA41 6102    ORR.W      R1, R1, R2, LSL #24
  0x34183196:  4308         ORRS       R0, R1
  0x34183198:  9902         LDR        R1, [SP, #8]
  0x3418319A:  6008         STR        R0, [R1]
  0x3418319C:  9803         LDR        R0, [SP, #12]
  0x3418319E:  6800         LDR        R0, [R0]
  0x341831A0:  F000 407F    AND        R0, R0, #0xFF000000
  0x341831A4:  9905         LDR        R1, [SP, #20]
  0x341831A6:  68C9         LDR        R1, [R1, #12]
  0x341831A8:  4308         ORRS       R0, R1
  0x341831AA:  9903         LDR        R1, [SP, #12]
  0x341831AC:  6008         STR        R0, [R1]
  0x341831AE:  9902         LDR        R1, [SP, #8]
  0x341831B0:  6808         LDR        R0, [R1]
  0x341831B2:  F020 0008    BIC        R0, R0, #8
  0x341831B6:  6008         STR        R0, [R1]
  0x341831B8:  9805         LDR        R0, [SP, #20]
  0x341831BA:  68C0         LDR        R0, [R0, #12]
  0x341831BC:  B120         CBZ        R0, .L17                 ; 0x341831C8
  0x341831BE:  9902         LDR        R1, [SP, #8]
  0x341831C0:  6808         LDR        R0, [R1]
  0x341831C2:  F040 000A    ORR        R0, R0, #10
  0x341831C6:  6008         STR        R0, [R1]

.L17:
  0x341831C8:  9902         LDR        R1, [SP, #8]
  0x341831CA:  6808         LDR        R0, [R1]
  0x341831CC:  2201         MOVS       R2, #1
  0x341831CE:  F2C4 0200    MOVT       R2, #0x4000
  0x341831D2:  4310         ORRS       R0, R2
  0x341831D4:  6008         STR        R0, [R1]
  0x341831D6:  9906         LDR        R1, [SP, #24]
  0x341831D8:  F44F 7080    MOV.W      R0, #0x0100
  0x341831DC:  4088         LSLS       R0, R1
  0x341831DE:  F648 0100    MOVW       R1, #0x8800
  0x341831E2:  F2C5 6102    MOVT       R1, #0x5602
  0x341831E6:  6008         STR        R0, [R1]
  0x341831E8:  F7FD FC70    BL         HAL_GetTick              ; 0x34180ACC
  0x341831EC:  9000         STR        R0, [SP, #0]

.L18:
  0x341831EE:  F248 0004    MOVW       R0, #0x8004
  0x341831F2:  F2C5 6002    MOVT       R0, #0x5602
  0x341831F6:  6800         LDR        R0, [R0]
  0x341831F8:  9906         LDR        R1, [SP, #24]
  0x341831FA:  40C8         LSRS       R0, R1
  0x341831FC:  05C0         LSLS       R0, R0, #23
  0x341831FE:  2800         CMP        R0, #0
  0x34183200:  D40A         BMI        46L20                     ; 0x34183218
  0x34183202:  F7FD FC63    BL         HAL_GetTick              ; 0x34180ACC
  0x34183206:  9900         LDR        R1, [SP, #0]
  0x34183208:  1A40         SUBS       R0, R0, R1
  0x3418320A:  2802         CMP        R0, #2
  0x3418320C:  D303         BCC        46L19                     ; 0x34183216
  0x3418320E:  2003         MOVS       R0, #3
  0x34183210:  F88D 001F    STRB.W     R0, [SP, #31]
  0x34183214:  E08D         B          46L35                     ; 0x34183332

.L19:
  0x34183216:  E7EA         B          46L18                     ; 0x341831EE

.L20:
  0x34183218:  E087         B          46L34                     ; 0x3418332A

.L21:
  0x3418321A:  9805         LDR        R0, [SP, #20]
  0x3418321C:  6800         LDR        R0, [R0]
  0x3418321E:  2803         CMP        R0, #3
  0x34183220:  D152         BNE        46L30                     ; 0x341832C8
  0x34183222:  9805         LDR        R0, [SP, #20]
  0x34183224:  6840         LDR        R0, [R0, #4]
  0x34183226:  B170         CBZ        R0, .L22                 ; 0x34183246
  0x34183228:  9805         LDR        R0, [SP, #20]
  0x3418322A:  6840         LDR        R0, [R0, #4]
  0x3418322C:  F1B0 5F80    CMP.W      R0, #0x10000000
  0x34183230:  D009         BEQ        46L22                     ; 0x34183246
  0x34183232:  9805         LDR        R0, [SP, #20]
  0x34183234:  6840         LDR        R0, [R0, #4]
  0x34183236:  F1B0 5F00    CMP.W      R0, #0x20000000
  0x3418323A:  D004         BEQ        46L22                     ; 0x34183246
  0x3418323C:  9805         LDR        R0, [SP, #20]
  0x3418323E:  6840         LDR        R0, [R0, #4]
  0x34183240:  F1B0 5F40    CMP.W      R0, #0x30000000
  0x34183244:  D100         BNE        46L23                     ; 0x34183248

.L22:
  0x34183246:  E007         B          46L24                     ; 0x34183258

.L23:
  0x34183248:  F244 20F8    MOVW       R0, #0x42F8              ; 0x341842F8 = .rodata..L.str.35
  0x3418324C:  F2C3 4018    MOVT       R0, #0x3418              ; 0x341842F8 = .rodata..L.str.35
  0x34183250:  F640 019E    MOVW       R1, #0x089E
  0x34183254:  F7FE FDF2    BL         assert_failed            ; 0x34181E3C

.L24:
  0x34183258:  9805         LDR        R0, [SP, #20]
  0x3418325A:  6840         LDR        R0, [R0, #4]
  0x3418325C:  F7FE F960    BL         RCC_PLL_Source_IsReady   ; 0x34181520
  0x34183260:  2801         CMP        R0, #1
  0x34183262:  D12D         BNE        46L28                     ; 0x341832C0
  0x34183264:  9906         LDR        R1, [SP, #24]
  0x34183266:  F44F 7080    MOV.W      R0, #0x0100
  0x3418326A:  4088         LSLS       R0, R1
  0x3418326C:  F249 0100    MOVW       R1, #0x9000
  0x34183270:  F2C5 6102    MOVT       R1, #0x5602
  0x34183274:  6008         STR        R0, [R1]
  0x34183276:  F7FD FC29    BL         HAL_GetTick              ; 0x34180ACC
  0x3418327A:  9000         STR        R0, [SP, #0]

.L25:
  0x3418327C:  F248 0004    MOVW       R0, #0x8004
  0x34183280:  F2C5 6002    MOVT       R0, #0x5602
  0x34183284:  6800         LDR        R0, [R0]
  0x34183286:  43C0         MVNS       R0, R0
  0x34183288:  9906         LDR        R1, [SP, #24]
  0x3418328A:  40C8         LSRS       R0, R1
  0x3418328C:  05C0         LSLS       R0, R0, #23
  0x3418328E:  2800         CMP        R0, #0
  0x34183290:  D40A         BMI        46L27                     ; 0x341832A8
  0x34183292:  F7FD FC1B    BL         HAL_GetTick              ; 0x34180ACC
  0x34183296:  9900         LDR        R1, [SP, #0]
  0x34183298:  1A40         SUBS       R0, R0, R1
  0x3418329A:  2802         CMP        R0, #2
  0x3418329C:  D303         BCC        46L26                     ; 0x341832A6
  0x3418329E:  2003         MOVS       R0, #3
  0x341832A0:  F88D 001F    STRB.W     R0, [SP, #31]
  0x341832A4:  E045         B          46L35                     ; 0x34183332

.L26:
  0x341832A6:  E7E9         B          46L25                     ; 0x3418327C

.L27:
  0x341832A8:  9804         LDR        R0, [SP, #16]
  0x341832AA:  6800         LDR        R0, [R0]
  0x341832AC:  F020 41F0    BIC        R1, R0, #0x78000000
  0x341832B0:  9805         LDR        R0, [SP, #20]
  0x341832B2:  6840         LDR        R0, [R0, #4]
  0x341832B4:  4308         ORRS       R0, R1
  0x341832B6:  F040 6000    ORR        R0, R0, #0x08000000
  0x341832BA:  9904         LDR        R1, [SP, #16]
  0x341832BC:  6008         STR        R0, [R1]
  0x341832BE:  E002         B          46L29                     ; 0x341832C6

.L28:
  0x341832C0:  2001         MOVS       R0, #1
  0x341832C2:  F88D 0007    STRB.W     R0, [SP, #7]

.L29:
  0x341832C6:  E030         B          46L34                     ; 0x3418332A

.L30:
  0x341832C8:  9805         LDR        R0, [SP, #20]
  0x341832CA:  6800         LDR        R0, [R0]
  0x341832CC:  2801         CMP        R0, #1
  0x341832CE:  D12C         BNE        46L34                     ; 0x3418332A
  0x341832D0:  9902         LDR        R1, [SP, #8]
  0x341832D2:  6808         LDR        R0, [R1]
  0x341832D4:  F020 4080    BIC        R0, R0, #0x40000000
  0x341832D8:  6008         STR        R0, [R1]
  0x341832DA:  9906         LDR        R1, [SP, #24]
  0x341832DC:  F44F 7080    MOV.W      R0, #0x0100
  0x341832E0:  4088         LSLS       R0, R1
  0x341832E2:  F249 0100    MOVW       R1, #0x9000
  0x341832E6:  F2C5 6102    MOVT       R1, #0x5602
  0x341832EA:  6008         STR        R0, [R1]
  0x341832EC:  F7FD FBEE    BL         HAL_GetTick              ; 0x34180ACC
  0x341832F0:  9000         STR        R0, [SP, #0]

.L31:
  0x341832F2:  F248 0004    MOVW       R0, #0x8004
  0x341832F6:  F2C5 6002    MOVT       R0, #0x5602
  0x341832FA:  6800         LDR        R0, [R0]
  0x341832FC:  43C0         MVNS       R0, R0
  0x341832FE:  9906         LDR        R1, [SP, #24]
  0x34183300:  40C8         LSRS       R0, R1
  0x34183302:  05C0         LSLS       R0, R0, #23
  0x34183304:  2800         CMP        R0, #0
  0x34183306:  D40A         BMI        46L33                     ; 0x3418331E
  0x34183308:  F7FD FBE0    BL         HAL_GetTick              ; 0x34180ACC
  0x3418330C:  9900         LDR        R1, [SP, #0]
  0x3418330E:  1A40         SUBS       R0, R0, R1
  0x34183310:  2802         CMP        R0, #2
  0x34183312:  D303         BCC        46L32                     ; 0x3418331C
  0x34183314:  2003         MOVS       R0, #3
  0x34183316:  F88D 001F    STRB.W     R0, [SP, #31]
  0x3418331A:  E00A         B          46L35                     ; 0x34183332

.L32:
  0x3418331C:  E7E9         B          46L31                     ; 0x341832F2

.L33:
  0x3418331E:  9904         LDR        R1, [SP, #16]
  0x34183320:  6808         LDR        R0, [R1]
  0x34183322:  F020 6000    BIC        R0, R0, #0x08000000
  0x34183326:  6008         STR        R0, [R1]
  0x34183328:  E7FF         B          46L34                     ; 0x3418332A

.L34:
  0x3418332A:  F89D 0007    LDRB.W     R0, [SP, #7]
  0x3418332E:  F88D 001F    STRB.W     R0, [SP, #31]

.L35:
  0x34183332:  F89D 001F    LDRB.W     R0, [SP, #31]
  0x34183336:  B008         ADD        SP, SP, #32
  0x34183338:  BD80         POP        123R7, PC}

Section .init.PKA_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


PKA_IRQHandler:
  0x3418333A:  E7FE         B          PKA_IRQHandler           ; 0x3418333A

Section .text.RCC_PLL_Enable from blto2_FSBL_lto.o, size=94, align=4


RCC_PLL_Enable:
  0x3418333C:  B580         PUSH       123R7, LR}
  0x3418333E:  B084         SUB        SP, SP, #16
  0x34183340:  9002         STR        R0, [SP, #8]
  0x34183342:  2000         MOVS       R0, #0
  0x34183344:  F88D 0007    STRB.W     R0, [SP, #7]
  0x34183348:  9902         LDR        R1, [SP, #8]
  0x3418334A:  F44F 7080    MOV.W      R0, #0x0100
  0x3418334E:  4088         LSLS       R0, R1
  0x34183350:  F648 0100    MOVW       R1, #0x8800
  0x34183354:  F2C5 6102    MOVT       R1, #0x5602
  0x34183358:  6008         STR        R0, [R1]
  0x3418335A:  F7FD FBB7    BL         HAL_GetTick              ; 0x34180ACC
  0x3418335E:  9000         STR        R0, [SP, #0]

.L1:
  0x34183360:  F248 0004    MOVW       R0, #0x8004
  0x34183364:  F2C5 6002    MOVT       R0, #0x5602
  0x34183368:  6800         LDR        R0, [R0]
  0x3418336A:  9902         LDR        R1, [SP, #8]
  0x3418336C:  40C8         LSRS       R0, R1
  0x3418336E:  05C0         LSLS       R0, R0, #23
  0x34183370:  2800         CMP        R0, #0
  0x34183372:  D40A         BMI        46L3                      ; 0x3418338A
  0x34183374:  F7FD FBAA    BL         HAL_GetTick              ; 0x34180ACC
  0x34183378:  9900         LDR        R1, [SP, #0]
  0x3418337A:  1A40         SUBS       R0, R0, R1
  0x3418337C:  2802         CMP        R0, #2
  0x3418337E:  D303         BCC        46L2                      ; 0x34183388
  0x34183380:  2003         MOVS       R0, #3
  0x34183382:  F88D 000F    STRB.W     R0, [SP, #15]
  0x34183386:  E004         B          46L4                      ; 0x34183392

.L2:
  0x34183388:  E7EA         B          46L1                      ; 0x34183360

.L3:
  0x3418338A:  F89D 0007    LDRB.W     R0, [SP, #7]
  0x3418338E:  F88D 000F    STRB.W     R0, [SP, #15]

.L4:
  0x34183392:  F89D 000F    LDRB.W     R0, [SP, #15]
  0x34183396:  B004         ADD        SP, SP, #16
  0x34183398:  BD80         POP        123R7, PC}

Section .init.HASH_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HASH_IRQHandler:
  0x3418339A:  E7FE         B          HASH_IRQHandler          ; 0x3418339A

Section .text.HAL_RCC_ClockConfig from blto2_FSBL_lto.o, size=2498, align=4


HAL_RCC_ClockConfig:
  0x3418339C:  B580         PUSH       123R7, LR}
  0x3418339E:  B084         SUB        SP, SP, #16
  0x341833A0:  9002         STR        R0, [SP, #8]
  0x341833A2:  9802         LDR        R0, [SP, #8]
  0x341833A4:  B920         CBNZ       R0, .L1                  ; 0x341833B0
  0x341833A6:  2001         MOVS       R0, #1
  0x341833A8:  F88D 000F    STRB.W     R0, [SP, #15]
  0x341833AC:  F000 BCD3    B.W        46L93                     ; 0x34183D56

.L1:
  0x341833B0:  9802         LDR        R0, [SP, #8]
  0x341833B2:  6800         LDR        R0, [R0]
  0x341833B4:  287F         CMP        R0, #127
  0x341833B6:  D800         BHI        46L2                      ; 0x341833BA
  0x341833B8:  E007         B          46L3                      ; 0x341833CA

.L2:
  0x341833BA:  F244 20F8    MOVW       R0, #0x42F8              ; 0x341842F8 = .rodata..L.str.35
  0x341833BE:  F2C3 4018    MOVT       R0, #0x3418              ; 0x341842F8 = .rodata..L.str.35
  0x341833C2:  F240 3196    MOVW       R1, #0x0396
  0x341833C6:  F7FE FD39    BL         assert_failed            ; 0x34181E3C

.L3:
  0x341833CA:  9802         LDR        R0, [SP, #8]
  0x341833CC:  7800         LDRB       R0, [R0]
  0x341833CE:  0700         LSLS       R0, R0, #28
  0x341833D0:  2800         CMP        R0, #0
  0x341833D2:  D53D         BPL        46L7                      ; 0x34183450
  0x341833D4:  9802         LDR        R0, [SP, #8]
  0x341833D6:  6900         LDR        R0, [R0, #16]
  0x341833D8:  B1D8         CBZ        R0, .L4                  ; 0x34183412
  0x341833DA:  9802         LDR        R0, [SP, #8]
  0x341833DC:  6900         LDR        R0, [R0, #16]
  0x341833DE:  2801         CMP        R0, #1
  0x341833E0:  D017         BEQ        46L4                      ; 0x34183412
  0x341833E2:  9802         LDR        R0, [SP, #8]
  0x341833E4:  6900         LDR        R0, [R0, #16]
  0x341833E6:  2802         CMP        R0, #2
  0x341833E8:  D013         BEQ        46L4                      ; 0x34183412
  0x341833EA:  9802         LDR        R0, [SP, #8]
  0x341833EC:  6900         LDR        R0, [R0, #16]
  0x341833EE:  2803         CMP        R0, #3
  0x341833F0:  D00F         BEQ        46L4                      ; 0x34183412
  0x341833F2:  9802         LDR        R0, [SP, #8]
  0x341833F4:  6900         LDR        R0, [R0, #16]
  0x341833F6:  2804         CMP        R0, #4
  0x341833F8:  D00B         BEQ        46L4                      ; 0x34183412
  0x341833FA:  9802         LDR        R0, [SP, #8]
  0x341833FC:  6900         LDR        R0, [R0, #16]
  0x341833FE:  2805         CMP        R0, #5
  0x34183400:  D007         BEQ        46L4                      ; 0x34183412
  0x34183402:  9802         LDR        R0, [SP, #8]
  0x34183404:  6900         LDR        R0, [R0, #16]
  0x34183406:  2806         CMP        R0, #6
  0x34183408:  D003         BEQ        46L4                      ; 0x34183412
  0x3418340A:  9802         LDR        R0, [SP, #8]
  0x3418340C:  6900         LDR        R0, [R0, #16]
  0x3418340E:  2807         CMP        R0, #7
  0x34183410:  D100         BNE        46L5                      ; 0x34183414

.L4:
  0x34183412:  E007         B          46L6                      ; 0x34183424

.L5:
  0x34183414:  F244 20F8    MOVW       R0, #0x42F8              ; 0x341842F8 = .rodata..L.str.35
  0x34183418:  F2C3 4018    MOVT       R0, #0x3418              ; 0x341842F8 = .rodata..L.str.35
  0x3418341C:  F240 319D    MOVW       R1, #0x039D
  0x34183420:  F7FE FD0C    BL         assert_failed            ; 0x34181E3C

.L6:
  0x34183424:  9802         LDR        R0, [SP, #8]
  0x34183426:  6900         LDR        R0, [R0, #16]
  0x34183428:  F248 0124    MOVW       R1, #0x8024
  0x3418342C:  F2C5 6102    MOVT       R1, #0x5602
  0x34183430:  6809         LDR        R1, [R1]
  0x34183432:  F001 0107    AND        R1, R1, #7
  0x34183436:  4288         CMP        R0, R1
  0x34183438:  D90A         BLS        46L7                      ; 0x34183450
  0x3418343A:  F248 0124    MOVW       R1, #0x8024
  0x3418343E:  F2C5 6102    MOVT       R1, #0x5602
  0x34183442:  6808         LDR        R0, [R1]
  0x34183444:  F020 0007    BIC        R0, R0, #7
  0x34183448:  9A02         LDR        R2, [SP, #8]
  0x3418344A:  6912         LDR        R2, [R2, #16]
  0x3418344C:  4310         ORRS       R0, R2
  0x3418344E:  6008         STR        R0, [R1]

.L7:
  0x34183450:  9802         LDR        R0, [SP, #8]
  0x34183452:  7800         LDRB       R0, [R0]
  0x34183454:  06C0         LSLS       R0, R0, #27
  0x34183456:  2800         CMP        R0, #0
  0x34183458:  D53D         BPL        46L11                     ; 0x341834D6
  0x3418345A:  9802         LDR        R0, [SP, #8]
  0x3418345C:  6940         LDR        R0, [R0, #20]
  0x3418345E:  B1D8         CBZ        R0, .L8                  ; 0x34183498
  0x34183460:  9802         LDR        R0, [SP, #8]
  0x34183462:  6940         LDR        R0, [R0, #20]
  0x34183464:  2810         CMP        R0, #16
  0x34183466:  D017         BEQ        46L8                      ; 0x34183498
  0x34183468:  9802         LDR        R0, [SP, #8]
  0x3418346A:  6940         LDR        R0, [R0, #20]
  0x3418346C:  2820         CMP        R0, #32
  0x3418346E:  D013         BEQ        46L8                      ; 0x34183498
  0x34183470:  9802         LDR        R0, [SP, #8]
  0x34183472:  6940         LDR        R0, [R0, #20]
  0x34183474:  2830         CMP        R0, #48
  0x34183476:  D00F         BEQ        46L8                      ; 0x34183498
  0x34183478:  9802         LDR        R0, [SP, #8]
  0x3418347A:  6940         LDR        R0, [R0, #20]
  0x3418347C:  2840         CMP        R0, #64
  0x3418347E:  D00B         BEQ        46L8                      ; 0x34183498
  0x34183480:  9802         LDR        R0, [SP, #8]
  0x34183482:  6940         LDR        R0, [R0, #20]
  0x34183484:  2850         CMP        R0, #80
  0x34183486:  D007         BEQ        46L8                      ; 0x34183498
  0x34183488:  9802         LDR        R0, [SP, #8]
  0x3418348A:  6940         LDR        R0, [R0, #20]
  0x3418348C:  2860         CMP        R0, #96
  0x3418348E:  D003         BEQ        46L8                      ; 0x34183498
  0x34183490:  9802         LDR        R0, [SP, #8]
  0x34183492:  6940         LDR        R0, [R0, #20]
  0x34183494:  2870         CMP        R0, #112
  0x34183496:  D100         BNE        46L9                      ; 0x3418349A

.L8:
  0x34183498:  E007         B          46L10                     ; 0x341834AA

.L9:
  0x3418349A:  F244 20F8    MOVW       R0, #0x42F8              ; 0x341842F8 = .rodata..L.str.35
  0x3418349E:  F2C3 4018    MOVT       R0, #0x3418              ; 0x341842F8 = .rodata..L.str.35
  0x341834A2:  F240 31A7    MOVW       R1, #0x03A7
  0x341834A6:  F7FE FCC9    BL         assert_failed            ; 0x34181E3C

.L10:
  0x341834AA:  9802         LDR        R0, [SP, #8]
  0x341834AC:  6940         LDR        R0, [R0, #20]
  0x341834AE:  F248 0124    MOVW       R1, #0x8024
  0x341834B2:  F2C5 6102    MOVT       R1, #0x5602
  0x341834B6:  6809         LDR        R1, [R1]
  0x341834B8:  F001 0170    AND        R1, R1, #112
  0x341834BC:  4288         CMP        R0, R1
  0x341834BE:  D90A         BLS        46L11                     ; 0x341834D6
  0x341834C0:  F248 0124    MOVW       R1, #0x8024
  0x341834C4:  F2C5 6102    MOVT       R1, #0x5602
  0x341834C8:  6808         LDR        R0, [R1]
  0x341834CA:  F020 0070    BIC        R0, R0, #112
  0x341834CE:  9A02         LDR        R2, [SP, #8]
  0x341834D0:  6952         LDR        R2, [R2, #20]
  0x341834D2:  4310         ORRS       R0, R2
  0x341834D4:  6008         STR        R0, [R1]

.L11:
  0x341834D6:  9802         LDR        R0, [SP, #8]
  0x341834D8:  7800         LDRB       R0, [R0]
  0x341834DA:  0680         LSLS       R0, R0, #26
  0x341834DC:  2800         CMP        R0, #0
  0x341834DE:  D544         BPL        46L15                     ; 0x3418356A
  0x341834E0:  9802         LDR        R0, [SP, #8]
  0x341834E2:  6980         LDR        R0, [R0, #24]
  0x341834E4:  B310         CBZ        R0, .L12                 ; 0x3418352C
  0x341834E6:  9802         LDR        R0, [SP, #8]
  0x341834E8:  6980         LDR        R0, [R0, #24]
  0x341834EA:  F5B0 5F80    CMP.W      R0, #0x1000
  0x341834EE:  D01D         BEQ        46L12                     ; 0x3418352C
  0x341834F0:  9802         LDR        R0, [SP, #8]
  0x341834F2:  6980         LDR        R0, [R0, #24]
  0x341834F4:  F5B0 5F00    CMP.W      R0, #0x2000
  0x341834F8:  D018         BEQ        46L12                     ; 0x3418352C
  0x341834FA:  9802         LDR        R0, [SP, #8]
  0x341834FC:  6980         LDR        R0, [R0, #24]
  0x341834FE:  F5B0 5F40    CMP.W      R0, #0x3000
  0x34183502:  D013         BEQ        46L12                     ; 0x3418352C
  0x34183504:  9802         LDR        R0, [SP, #8]
  0x34183506:  6980         LDR        R0, [R0, #24]
  0x34183508:  F5B0 4F80    CMP.W      R0, #0x4000
  0x3418350C:  D00E         BEQ        46L12                     ; 0x3418352C
  0x3418350E:  9802         LDR        R0, [SP, #8]
  0x34183510:  6980         LDR        R0, [R0, #24]
  0x34183512:  F5B0 4FA0    CMP.W      R0, #0x5000
  0x34183516:  D009         BEQ        46L12                     ; 0x3418352C
  0x34183518:  9802         LDR        R0, [SP, #8]
  0x3418351A:  6980         LDR        R0, [R0, #24]
  0x3418351C:  F5B0 4FC0    CMP.W      R0, #0x6000
  0x34183520:  D004         BEQ        46L12                     ; 0x3418352C
  0x34183522:  9802         LDR        R0, [SP, #8]
  0x34183524:  6980         LDR        R0, [R0, #24]
  0x34183526:  F5B0 4FE0    CMP.W      R0, #0x7000
  0x3418352A:  D100         BNE        46L13                     ; 0x3418352E

.L12:
  0x3418352C:  E007         B          46L14                     ; 0x3418353E

.L13:
  0x3418352E:  F244 20F8    MOVW       R0, #0x42F8              ; 0x341842F8 = .rodata..L.str.35
  0x34183532:  F2C3 4018    MOVT       R0, #0x3418              ; 0x341842F8 = .rodata..L.str.35
  0x34183536:  F240 31B1    MOVW       R1, #0x03B1
  0x3418353A:  F7FE FC7F    BL         assert_failed            ; 0x34181E3C

.L14:
  0x3418353E:  9802         LDR        R0, [SP, #8]
  0x34183540:  6980         LDR        R0, [R0, #24]
  0x34183542:  F248 0124    MOVW       R1, #0x8024
  0x34183546:  F2C5 6102    MOVT       R1, #0x5602
  0x3418354A:  6809         LDR        R1, [R1]
  0x3418354C:  F401 41E0    AND        R1, R1, #0x7000
  0x34183550:  4288         CMP        R0, R1
  0x34183552:  D90A         BLS        46L15                     ; 0x3418356A
  0x34183554:  F248 0124    MOVW       R1, #0x8024
  0x34183558:  F2C5 6102    MOVT       R1, #0x5602
  0x3418355C:  6808         LDR        R0, [R1]
  0x3418355E:  F420 40E0    BIC        R0, R0, #0x7000
  0x34183562:  9A02         LDR        R2, [SP, #8]
  0x34183564:  6992         LDR        R2, [R2, #24]
  0x34183566:  4310         ORRS       R0, R2
  0x34183568:  6008         STR        R0, [R1]

.L15:
  0x3418356A:  9802         LDR        R0, [SP, #8]
  0x3418356C:  7800         LDRB       R0, [R0]
  0x3418356E:  0640         LSLS       R0, R0, #25
  0x34183570:  2800         CMP        R0, #0
  0x34183572:  D544         BPL        46L19                     ; 0x341835FE
  0x34183574:  9802         LDR        R0, [SP, #8]
  0x34183576:  69C0         LDR        R0, [R0, #28]
  0x34183578:  B310         CBZ        R0, .L16                 ; 0x341835C0
  0x3418357A:  9802         LDR        R0, [SP, #8]
  0x3418357C:  69C0         LDR        R0, [R0, #28]
  0x3418357E:  F5B0 3F80    CMP.W      R0, #0x010000
  0x34183582:  D01D         BEQ        46L16                     ; 0x341835C0
  0x34183584:  9802         LDR        R0, [SP, #8]
  0x34183586:  69C0         LDR        R0, [R0, #28]
  0x34183588:  F5B0 3F00    CMP.W      R0, #0x020000
  0x3418358C:  D018         BEQ        46L16                     ; 0x341835C0
  0x3418358E:  9802         LDR        R0, [SP, #8]
  0x34183590:  69C0         LDR        R0, [R0, #28]
  0x34183592:  F5B0 3F40    CMP.W      R0, #0x030000
  0x34183596:  D013         BEQ        46L16                     ; 0x341835C0
  0x34183598:  9802         LDR        R0, [SP, #8]
  0x3418359A:  69C0         LDR        R0, [R0, #28]
  0x3418359C:  F5B0 2F80    CMP.W      R0, #0x040000
  0x341835A0:  D00E         BEQ        46L16                     ; 0x341835C0
  0x341835A2:  9802         LDR        R0, [SP, #8]
  0x341835A4:  69C0         LDR        R0, [R0, #28]
  0x341835A6:  F5B0 2FA0    CMP.W      R0, #0x050000
  0x341835AA:  D009         BEQ        46L16                     ; 0x341835C0
  0x341835AC:  9802         LDR        R0, [SP, #8]
  0x341835AE:  69C0         LDR        R0, [R0, #28]
  0x341835B0:  F5B0 2FC0    CMP.W      R0, #0x060000
  0x341835B4:  D004         BEQ        46L16                     ; 0x341835C0
  0x341835B6:  9802         LDR        R0, [SP, #8]
  0x341835B8:  69C0         LDR        R0, [R0, #28]
  0x341835BA:  F5B0 2FE0    CMP.W      R0, #0x070000
  0x341835BE:  D100         BNE        46L17                     ; 0x341835C2

.L16:
  0x341835C0:  E007         B          46L18                     ; 0x341835D2

.L17:
  0x341835C2:  F244 20F8    MOVW       R0, #0x42F8              ; 0x341842F8 = .rodata..L.str.35
  0x341835C6:  F2C3 4018    MOVT       R0, #0x3418              ; 0x341842F8 = .rodata..L.str.35
  0x341835CA:  F240 31BB    MOVW       R1, #0x03BB
  0x341835CE:  F7FE FC35    BL         assert_failed            ; 0x34181E3C

.L18:
  0x341835D2:  9802         LDR        R0, [SP, #8]
  0x341835D4:  69C0         LDR        R0, [R0, #28]
  0x341835D6:  F248 0124    MOVW       R1, #0x8024
  0x341835DA:  F2C5 6102    MOVT       R1, #0x5602
  0x341835DE:  6809         LDR        R1, [R1]
  0x341835E0:  F401 21E0    AND        R1, R1, #0x070000
  0x341835E4:  4288         CMP        R0, R1
  0x341835E6:  D90A         BLS        46L19                     ; 0x341835FE
  0x341835E8:  F248 0124    MOVW       R1, #0x8024
  0x341835EC:  F2C5 6102    MOVT       R1, #0x5602
  0x341835F0:  6808         LDR        R0, [R1]
  0x341835F2:  F420 20E0    BIC        R0, R0, #0x070000
  0x341835F6:  9A02         LDR        R2, [SP, #8]
  0x341835F8:  69D2         LDR        R2, [R2, #28]
  0x341835FA:  4310         ORRS       R0, R2
  0x341835FC:  6008         STR        R0, [R1]

.L19:
  0x341835FE:  9802         LDR        R0, [SP, #8]
  0x34183600:  7800         LDRB       R0, [R0]
  0x34183602:  0740         LSLS       R0, R0, #29
  0x34183604:  2800         CMP        R0, #0
  0x34183606:  D544         BPL        46L23                     ; 0x34183692
  0x34183608:  9802         LDR        R0, [SP, #8]
  0x3418360A:  68C0         LDR        R0, [R0, #12]
  0x3418360C:  B310         CBZ        R0, .L20                 ; 0x34183654
  0x3418360E:  9802         LDR        R0, [SP, #8]
  0x34183610:  68C0         LDR        R0, [R0, #12]
  0x34183612:  F5B0 1F80    CMP.W      R0, #0x100000
  0x34183616:  D01D         BEQ        46L20                     ; 0x34183654
  0x34183618:  9802         LDR        R0, [SP, #8]
  0x3418361A:  68C0         LDR        R0, [R0, #12]
  0x3418361C:  F5B0 1F00    CMP.W      R0, #0x200000
  0x34183620:  D018         BEQ        46L20                     ; 0x34183654
  0x34183622:  9802         LDR        R0, [SP, #8]
  0x34183624:  68C0         LDR        R0, [R0, #12]
  0x34183626:  F5B0 1F40    CMP.W      R0, #0x300000
  0x3418362A:  D013         BEQ        46L20                     ; 0x34183654
  0x3418362C:  9802         LDR        R0, [SP, #8]
  0x3418362E:  68C0         LDR        R0, [R0, #12]
  0x34183630:  F5B0 0F80    CMP.W      R0, #0x400000
  0x34183634:  D00E         BEQ        46L20                     ; 0x34183654
  0x34183636:  9802         LDR        R0, [SP, #8]
  0x34183638:  68C0         LDR        R0, [R0, #12]
  0x3418363A:  F5B0 0FA0    CMP.W      R0, #0x500000
  0x3418363E:  D009         BEQ        46L20                     ; 0x34183654
  0x34183640:  9802         LDR        R0, [SP, #8]
  0x34183642:  68C0         LDR        R0, [R0, #12]
  0x34183644:  F5B0 0FC0    CMP.W      R0, #0x600000
  0x34183648:  D004         BEQ        46L20                     ; 0x34183654
  0x3418364A:  9802         LDR        R0, [SP, #8]
  0x3418364C:  68C0         LDR        R0, [R0, #12]
  0x3418364E:  F5B0 0FE0    CMP.W      R0, #0x700000
  0x34183652:  D100         BNE        46L21                     ; 0x34183656

.L20:
  0x34183654:  E007         B          46L22                     ; 0x34183666

.L21:
  0x34183656:  F244 20F8    MOVW       R0, #0x42F8              ; 0x341842F8 = .rodata..L.str.35
  0x3418365A:  F2C3 4018    MOVT       R0, #0x3418              ; 0x341842F8 = .rodata..L.str.35
  0x3418365E:  F240 31C5    MOVW       R1, #0x03C5
  0x34183662:  F7FE FBEB    BL         assert_failed            ; 0x34181E3C

.L22:
  0x34183666:  9802         LDR        R0, [SP, #8]
  0x34183668:  68C0         LDR        R0, [R0, #12]
  0x3418366A:  F248 0124    MOVW       R1, #0x8024
  0x3418366E:  F2C5 6102    MOVT       R1, #0x5602
  0x34183672:  6809         LDR        R1, [R1]
  0x34183674:  F401 01E0    AND        R1, R1, #0x700000
  0x34183678:  4288         CMP        R0, R1
  0x3418367A:  D90A         BLS        46L23                     ; 0x34183692
  0x3418367C:  F248 0124    MOVW       R1, #0x8024
  0x34183680:  F2C5 6102    MOVT       R1, #0x5602
  0x34183684:  6808         LDR        R0, [R1]
  0x34183686:  F420 00E0    BIC        R0, R0, #0x700000
  0x3418368A:  9A02         LDR        R2, [SP, #8]
  0x3418368C:  68D2         LDR        R2, [R2, #12]
  0x3418368E:  4310         ORRS       R0, R2
  0x34183690:  6008         STR        R0, [R1]

.L23:
  0x34183692:  9802         LDR        R0, [SP, #8]
  0x34183694:  7800         LDRB       R0, [R0]
  0x34183696:  07C0         LSLS       R0, R0, #31
  0x34183698:  2800         CMP        R0, #0
  0x3418369A:  F000 80B3    BEQ.W      46L42                     ; 0x34183804
  0x3418369E:  9802         LDR        R0, [SP, #8]
  0x341836A0:  6840         LDR        R0, [R0, #4]
  0x341836A2:  B170         CBZ        R0, .L24                 ; 0x341836C2
  0x341836A4:  9802         LDR        R0, [SP, #8]
  0x341836A6:  6840         LDR        R0, [R0, #4]
  0x341836A8:  F5B0 3F80    CMP.W      R0, #0x010000
  0x341836AC:  D009         BEQ        46L24                     ; 0x341836C2
  0x341836AE:  9802         LDR        R0, [SP, #8]
  0x341836B0:  6840         LDR        R0, [R0, #4]
  0x341836B2:  F5B0 3F00    CMP.W      R0, #0x020000
  0x341836B6:  D004         BEQ        46L24                     ; 0x341836C2
  0x341836B8:  9802         LDR        R0, [SP, #8]
  0x341836BA:  6840         LDR        R0, [R0, #4]
  0x341836BC:  F5B0 3F40    CMP.W      R0, #0x030000
  0x341836C0:  D100         BNE        46L25                     ; 0x341836C4

.L24:
  0x341836C2:  E007         B          46L26                     ; 0x341836D4

.L25:
  0x341836C4:  F244 20F8    MOVW       R0, #0x42F8              ; 0x341842F8 = .rodata..L.str.35
  0x341836C8:  F2C3 4018    MOVT       R0, #0x3418              ; 0x341842F8 = .rodata..L.str.35
  0x341836CC:  F44F 7174    MOV.W      R1, #0x03D0
  0x341836D0:  F7FE FBB4    BL         assert_failed            ; 0x34181E3C

.L26:
  0x341836D4:  9802         LDR        R0, [SP, #8]
  0x341836D6:  6840         LDR        R0, [R0, #4]
  0x341836D8:  F5B0 3F00    CMP.W      R0, #0x020000
  0x341836DC:  D107         BNE        46L28                     ; 0x341836EE
  0x341836DE:  F7FD FF49    BL         LL_RCC_HSE_IsReady       ; 0x34181574
  0x341836E2:  B918         CBNZ       R0, .L27                 ; 0x341836EC
  0x341836E4:  2001         MOVS       R0, #1
  0x341836E6:  F88D 000F    STRB.W     R0, [SP, #15]
  0x341836EA:  E334         B          46L93                     ; 0x34183D56

.L27:
  0x341836EC:  E061         B          46L38                     ; 0x341837B2

.L28:
  0x341836EE:  9802         LDR        R0, [SP, #8]
  0x341836F0:  6840         LDR        R0, [R0, #4]
  0x341836F2:  F5B0 3F40    CMP.W      R0, #0x030000
  0x341836F6:  D148         BNE        46L35                     ; 0x3418378A
  0x341836F8:  9802         LDR        R0, [SP, #8]
  0x341836FA:  6A00         LDR        R0, [R0, #32]
  0x341836FC:  B170         CBZ        R0, .L29                 ; 0x3418371C
  0x341836FE:  9802         LDR        R0, [SP, #8]
  0x34183700:  6A00         LDR        R0, [R0, #32]
  0x34183702:  F1B0 5F80    CMP.W      R0, #0x10000000
  0x34183706:  D009         BEQ        46L29                     ; 0x3418371C
  0x34183708:  9802         LDR        R0, [SP, #8]
  0x3418370A:  6A00         LDR        R0, [R0, #32]
  0x3418370C:  F1B0 5F00    CMP.W      R0, #0x20000000
  0x34183710:  D004         BEQ        46L29                     ; 0x3418371C
  0x34183712:  9802         LDR        R0, [SP, #8]
  0x34183714:  6A00         LDR        R0, [R0, #32]
  0x34183716:  F1B0 5F40    CMP.W      R0, #0x30000000
  0x3418371A:  D100         BNE        46L30                     ; 0x3418371E

.L29:
  0x3418371C:  E007         B          46L31                     ; 0x3418372E

.L30:
  0x3418371E:  F244 20F8    MOVW       R0, #0x42F8              ; 0x341842F8 = .rodata..L.str.35
  0x34183722:  F2C3 4018    MOVT       R0, #0x3418              ; 0x341842F8 = .rodata..L.str.35
  0x34183726:  F240 31DF    MOVW       R1, #0x03DF
  0x3418372A:  F7FE FB87    BL         assert_failed            ; 0x34181E3C

.L31:
  0x3418372E:  9802         LDR        R0, [SP, #8]
  0x34183730:  6A40         LDR        R0, [R0, #36]
  0x34183732:  B128         CBZ        R0, .L32                 ; 0x34183740
  0x34183734:  9802         LDR        R0, [SP, #8]
  0x34183736:  6A40         LDR        R0, [R0, #36]
  0x34183738:  F5B0 7F80    CMP.W      R0, #0x0100
  0x3418373C:  D800         BHI        46L32                     ; 0x34183740
  0x3418373E:  E007         B          46L33                     ; 0x34183750

.L32:
  0x34183740:  F244 20F8    MOVW       R0, #0x42F8              ; 0x341842F8 = .rodata..L.str.35
  0x34183744:  F2C3 4018    MOVT       R0, #0x3418              ; 0x341842F8 = .rodata..L.str.35
  0x34183748:  F44F 7178    MOV.W      R1, #0x03E0
  0x3418374C:  F7FE FB76    BL         assert_failed            ; 0x34181E3C

.L33:
  0x34183750:  F7FD FEAE    BL         LL_RCC_IC1_GetSource     ; 0x341814B0
  0x34183754:  9902         LDR        R1, [SP, #8]
  0x34183756:  6A09         LDR        R1, [R1, #32]
  0x34183758:  F000 FB02    BL         RCC_IC_CheckPLLSources   ; 0x34183D60
  0x3418375C:  2801         CMP        R0, #1
  0x3418375E:  D003         BEQ        46L34                     ; 0x34183768
  0x34183760:  2001         MOVS       R0, #1
  0x34183762:  F88D 000F    STRB.W     R0, [SP, #15]
  0x34183766:  E2F6         B          46L93                     ; 0x34183D56

.L34:
  0x34183768:  9902         LDR        R1, [SP, #8]
  0x3418376A:  6A08         LDR        R0, [R1, #32]
  0x3418376C:  6A4A         LDR        R2, [R1, #36]
  0x3418376E:  2100         MOVS       R1, #0
  0x34183770:  F6CF 71FF    MOVT       R1, #0xFFFF
  0x34183774:  EB01 4102    ADD.W      R1, R1, R2, LSL #16
  0x34183778:  4308         ORRS       R0, R1
  0x3418377A:  F248 01C4    MOVW       R1, #0x80C4
  0x3418377E:  F2C5 6102    MOVT       R1, #0x5602
  0x34183782:  6008         STR        R0, [R1]
  0x34183784:  F000 FB62    BL         LL_RCC_IC1_Enable        ; 0x34183E4C
  0x34183788:  E013         B          46L38                     ; 0x341837B2

.L35:
  0x3418378A:  9802         LDR        R0, [SP, #8]
  0x3418378C:  6840         LDR        R0, [R0, #4]
  0x3418378E:  F5B0 3F80    CMP.W      R0, #0x010000
  0x34183792:  D107         BNE        46L37                     ; 0x341837A4
  0x34183794:  F7FD FE6C    BL         LL_RCC_MSI_IsReady       ; 0x34181470
  0x34183798:  B918         CBNZ       R0, .L36                 ; 0x341837A2
  0x3418379A:  2001         MOVS       R0, #1
  0x3418379C:  F88D 000F    STRB.W     R0, [SP, #15]
  0x341837A0:  E2D9         B          46L93                     ; 0x34183D56

.L36:
  0x341837A2:  E006         B          46L38                     ; 0x341837B2

.L37:
  0x341837A4:  F7FD FE1E    BL         LL_RCC_HSI_IsReady       ; 0x341813E4
  0x341837A8:  B918         CBNZ       R0, .L38                 ; 0x341837B2
  0x341837AA:  2001         MOVS       R0, #1
  0x341837AC:  F88D 000F    STRB.W     R0, [SP, #15]
  0x341837B0:  E2D1         B          46L93                     ; 0x34183D56

.L38:
  0x341837B2:  F248 0120    MOVW       R1, #0x8020
  0x341837B6:  F2C5 6102    MOVT       R1, #0x5602
  0x341837BA:  6808         LDR        R0, [R1]
  0x341837BC:  F420 3040    BIC        R0, R0, #0x030000
  0x341837C0:  9A02         LDR        R2, [SP, #8]
  0x341837C2:  6852         LDR        R2, [R2, #4]
  0x341837C4:  4310         ORRS       R0, R2
  0x341837C6:  6008         STR        R0, [R1]
  0x341837C8:  F7FD F980    BL         HAL_GetTick              ; 0x34180ACC
  0x341837CC:  9001         STR        R0, [SP, #4]

.L39:
  0x341837CE:  F7FD FE11    BL         LL_RCC_GetCpuClkSource   ; 0x341813F4
  0x341837D2:  9902         LDR        R1, [SP, #8]
  0x341837D4:  6849         LDR        R1, [R1, #4]
  0x341837D6:  0109         LSLS       R1, R1, #4
  0x341837D8:  4288         CMP        R0, R1
  0x341837DA:  D00C         BEQ        46L41                     ; 0x341837F6
  0x341837DC:  F7FD F976    BL         HAL_GetTick              ; 0x34180ACC
  0x341837E0:  9901         LDR        R1, [SP, #4]
  0x341837E2:  1A40         SUBS       R0, R0, R1
  0x341837E4:  F241 3189    MOVW       R1, #0x1389
  0x341837E8:  4288         CMP        R0, R1
  0x341837EA:  D303         BCC        46L40                     ; 0x341837F4
  0x341837EC:  2003         MOVS       R0, #3
  0x341837EE:  F88D 000F    STRB.W     R0, [SP, #15]
  0x341837F2:  E2B0         B          46L93                     ; 0x34183D56

.L40:
  0x341837F4:  E7EB         B          46L39                     ; 0x341837CE

.L41:
  0x341837F6:  F000 FB31    BL         HAL_RCC_GetCpuClockFreq  ; 0x34183E5C
  0x341837FA:  F244 4148    MOVW       R1, #0x4448              ; 0x34184448 = SystemCoreClock
  0x341837FE:  F2C3 4118    MOVT       R1, #0x3418              ; 0x34184448 = SystemCoreClock
  0x34183802:  6008         STR        R0, [R1]

.L42:
  0x34183804:  9802         LDR        R0, [SP, #8]
  0x34183806:  7800         LDRB       R0, [R0]
  0x34183808:  0780         LSLS       R0, R0, #30
  0x3418380A:  2800         CMP        R0, #0
  0x3418380C:  F140 8136    BPL.W      46L72                     ; 0x34183A7C
  0x34183810:  9802         LDR        R0, [SP, #8]
  0x34183812:  6880         LDR        R0, [R0, #8]
  0x34183814:  B170         CBZ        R0, .L43                 ; 0x34183834
  0x34183816:  9802         LDR        R0, [SP, #8]
  0x34183818:  6880         LDR        R0, [R0, #8]
  0x3418381A:  F1B0 7F80    CMP.W      R0, #0x01000000
  0x3418381E:  D009         BEQ        46L43                     ; 0x34183834
  0x34183820:  9802         LDR        R0, [SP, #8]
  0x34183822:  6880         LDR        R0, [R0, #8]
  0x34183824:  F1B0 7F00    CMP.W      R0, #0x02000000
  0x34183828:  D004         BEQ        46L43                     ; 0x34183834
  0x3418382A:  9802         LDR        R0, [SP, #8]
  0x3418382C:  6880         LDR        R0, [R0, #8]
  0x3418382E:  F1B0 7F40    CMP.W      R0, #0x03000000
  0x34183832:  D100         BNE        46L44                     ; 0x34183836

.L43:
  0x34183834:  E007         B          46L45                     ; 0x34183846

.L44:
  0x34183836:  F244 20F8    MOVW       R0, #0x42F8              ; 0x341842F8 = .rodata..L.str.35
  0x3418383A:  F2C3 4018    MOVT       R0, #0x3418              ; 0x341842F8 = .rodata..L.str.35
  0x3418383E:  F240 4119    MOVW       R1, #0x0419
  0x34183842:  F7FE FAFB    BL         assert_failed            ; 0x34181E3C

.L45:
  0x34183846:  9802         LDR        R0, [SP, #8]
  0x34183848:  6880         LDR        R0, [R0, #8]
  0x3418384A:  F1B0 7F00    CMP.W      R0, #0x02000000
  0x3418384E:  D107         BNE        46L47                     ; 0x34183860
  0x34183850:  F7FD FE90    BL         LL_RCC_HSE_IsReady       ; 0x34181574
  0x34183854:  B918         CBNZ       R0, .L46                 ; 0x3418385E
  0x34183856:  2001         MOVS       R0, #1
  0x34183858:  F88D 000F    STRB.W     R0, [SP, #15]
  0x3418385C:  E27B         B          46L93                     ; 0x34183D56

.L46:
  0x3418385E:  E0EB         B          46L69                     ; 0x34183A38

.L47:
  0x34183860:  9802         LDR        R0, [SP, #8]
  0x34183862:  6880         LDR        R0, [R0, #8]
  0x34183864:  F1B0 7F40    CMP.W      R0, #0x03000000
  0x34183868:  F040 80D4    BNE.W      46L66                     ; 0x34183A14
  0x3418386C:  9802         LDR        R0, [SP, #8]
  0x3418386E:  6A80         LDR        R0, [R0, #40]
  0x34183870:  B170         CBZ        R0, .L48                 ; 0x34183890
  0x34183872:  9802         LDR        R0, [SP, #8]
  0x34183874:  6A80         LDR        R0, [R0, #40]
  0x34183876:  F1B0 5F80    CMP.W      R0, #0x10000000
  0x3418387A:  D009         BEQ        46L48                     ; 0x34183890
  0x3418387C:  9802         LDR        R0, [SP, #8]
  0x3418387E:  6A80         LDR        R0, [R0, #40]
  0x34183880:  F1B0 5F00    CMP.W      R0, #0x20000000
  0x34183884:  D004         BEQ        46L48                     ; 0x34183890
  0x34183886:  9802         LDR        R0, [SP, #8]
  0x34183888:  6A80         LDR        R0, [R0, #40]
  0x3418388A:  F1B0 5F40    CMP.W      R0, #0x30000000
  0x3418388E:  D100         BNE        46L49                     ; 0x34183892

.L48:
  0x34183890:  E007         B          46L50                     ; 0x341838A2

.L49:
  0x34183892:  F244 20F8    MOVW       R0, #0x42F8              ; 0x341842F8 = .rodata..L.str.35
  0x34183896:  F2C3 4018    MOVT       R0, #0x3418              ; 0x341842F8 = .rodata..L.str.35
  0x3418389A:  F44F 6185    MOV.W      R1, #0x0428
  0x3418389E:  F7FE FACD    BL         assert_failed            ; 0x34181E3C

.L50:
  0x341838A2:  9802         LDR        R0, [SP, #8]
  0x341838A4:  6AC0         LDR        R0, [R0, #44]
  0x341838A6:  B128         CBZ        R0, .L51                 ; 0x341838B4
  0x341838A8:  9802         LDR        R0, [SP, #8]
  0x341838AA:  6AC0         LDR        R0, [R0, #44]
  0x341838AC:  F5B0 7F80    CMP.W      R0, #0x0100
  0x341838B0:  D800         BHI        46L51                     ; 0x341838B4
  0x341838B2:  E007         B          46L52                     ; 0x341838C4

.L51:
  0x341838B4:  F244 20F8    MOVW       R0, #0x42F8              ; 0x341842F8 = .rodata..L.str.35
  0x341838B8:  F2C3 4018    MOVT       R0, #0x3418              ; 0x341842F8 = .rodata..L.str.35
  0x341838BC:  F240 4129    MOVW       R1, #0x0429
  0x341838C0:  F7FE FABC    BL         assert_failed            ; 0x34181E3C

.L52:
  0x341838C4:  9802         LDR        R0, [SP, #8]
  0x341838C6:  6B00         LDR        R0, [R0, #48]
  0x341838C8:  B170         CBZ        R0, .L53                 ; 0x341838E8
  0x341838CA:  9802         LDR        R0, [SP, #8]
  0x341838CC:  6B00         LDR        R0, [R0, #48]
  0x341838CE:  F1B0 5F80    CMP.W      R0, #0x10000000
  0x341838D2:  D009         BEQ        46L53                     ; 0x341838E8
  0x341838D4:  9802         LDR        R0, [SP, #8]
  0x341838D6:  6B00         LDR        R0, [R0, #48]
  0x341838D8:  F1B0 5F00    CMP.W      R0, #0x20000000
  0x341838DC:  D004         BEQ        46L53                     ; 0x341838E8
  0x341838DE:  9802         LDR        R0, [SP, #8]
  0x341838E0:  6B00         LDR        R0, [R0, #48]
  0x341838E2:  F1B0 5F40    CMP.W      R0, #0x30000000
  0x341838E6:  D100         BNE        46L54                     ; 0x341838EA

.L53:
  0x341838E8:  E007         B          46L55                     ; 0x341838FA

.L54:
  0x341838EA:  F244 20F8    MOVW       R0, #0x42F8              ; 0x341842F8 = .rodata..L.str.35
  0x341838EE:  F2C3 4018    MOVT       R0, #0x3418              ; 0x341842F8 = .rodata..L.str.35
  0x341838F2:  F240 412A    MOVW       R1, #0x042A
  0x341838F6:  F7FE FAA1    BL         assert_failed            ; 0x34181E3C

.L55:
  0x341838FA:  9802         LDR        R0, [SP, #8]
  0x341838FC:  6B40         LDR        R0, [R0, #52]
  0x341838FE:  B128         CBZ        R0, .L56                 ; 0x3418390C
  0x34183900:  9802         LDR        R0, [SP, #8]
  0x34183902:  6B40         LDR        R0, [R0, #52]
  0x34183904:  F5B0 7F80    CMP.W      R0, #0x0100
  0x34183908:  D800         BHI        46L56                     ; 0x3418390C
  0x3418390A:  E007         B          46L57                     ; 0x3418391C

.L56:
  0x3418390C:  F244 20F8    MOVW       R0, #0x42F8              ; 0x341842F8 = .rodata..L.str.35
  0x34183910:  F2C3 4018    MOVT       R0, #0x3418              ; 0x341842F8 = .rodata..L.str.35
  0x34183914:  F240 412B    MOVW       R1, #0x042B
  0x34183918:  F7FE FA90    BL         assert_failed            ; 0x34181E3C

.L57:
  0x3418391C:  9802         LDR        R0, [SP, #8]
  0x3418391E:  6B80         LDR        R0, [R0, #56]
  0x34183920:  B170         CBZ        R0, .L58                 ; 0x34183940
  0x34183922:  9802         LDR        R0, [SP, #8]
  0x34183924:  6B80         LDR        R0, [R0, #56]
  0x34183926:  F1B0 5F80    CMP.W      R0, #0x10000000
  0x3418392A:  D009         BEQ        46L58                     ; 0x34183940
  0x3418392C:  9802         LDR        R0, [SP, #8]
  0x3418392E:  6B80         LDR        R0, [R0, #56]
  0x34183930:  F1B0 5F00    CMP.W      R0, #0x20000000
  0x34183934:  D004         BEQ        46L58                     ; 0x34183940
  0x34183936:  9802         LDR        R0, [SP, #8]
  0x34183938:  6B80         LDR        R0, [R0, #56]
  0x3418393A:  F1B0 5F40    CMP.W      R0, #0x30000000
  0x3418393E:  D100         BNE        46L59                     ; 0x34183942

.L58:
  0x34183940:  E007         B          46L60                     ; 0x34183952

.L59:
  0x34183942:  F244 20F8    MOVW       R0, #0x42F8              ; 0x341842F8 = .rodata..L.str.35
  0x34183946:  F2C3 4018    MOVT       R0, #0x3418              ; 0x341842F8 = .rodata..L.str.35
  0x3418394A:  F240 412C    MOVW       R1, #0x042C
  0x3418394E:  F7FE FA75    BL         assert_failed            ; 0x34181E3C

.L60:
  0x34183952:  9802         LDR        R0, [SP, #8]
  0x34183954:  6BC0         LDR        R0, [R0, #60]
  0x34183956:  B128         CBZ        R0, .L61                 ; 0x34183964
  0x34183958:  9802         LDR        R0, [SP, #8]
  0x3418395A:  6BC0         LDR        R0, [R0, #60]
  0x3418395C:  F5B0 7F80    CMP.W      R0, #0x0100
  0x34183960:  D800         BHI        46L61                     ; 0x34183964
  0x34183962:  E007         B          46L62                     ; 0x34183974

.L61:
  0x34183964:  F244 20F8    MOVW       R0, #0x42F8              ; 0x341842F8 = .rodata..L.str.35
  0x34183968:  F2C3 4018    MOVT       R0, #0x3418              ; 0x341842F8 = .rodata..L.str.35
  0x3418396C:  F240 412D    MOVW       R1, #0x042D
  0x34183970:  F7FE FA64    BL         assert_failed            ; 0x34181E3C

.L62:
  0x34183974:  F7FD FDA4    BL         LL_RCC_IC2_GetSource     ; 0x341814C0
  0x34183978:  9902         LDR        R1, [SP, #8]
  0x3418397A:  6A89         LDR        R1, [R1, #40]
  0x3418397C:  F000 F9F0    BL         RCC_IC_CheckPLLSources   ; 0x34183D60
  0x34183980:  2801         CMP        R0, #1
  0x34183982:  D003         BEQ        46L63                     ; 0x3418398C
  0x34183984:  2001         MOVS       R0, #1
  0x34183986:  F88D 000F    STRB.W     R0, [SP, #15]
  0x3418398A:  E1E4         B          46L93                     ; 0x34183D56

.L63:
  0x3418398C:  F7FD FDA0    BL         LL_RCC_IC6_GetSource     ; 0x341814D0
  0x34183990:  9902         LDR        R1, [SP, #8]
  0x34183992:  6B09         LDR        R1, [R1, #48]
  0x34183994:  F000 F9E4    BL         RCC_IC_CheckPLLSources   ; 0x34183D60
  0x34183998:  2801         CMP        R0, #1
  0x3418399A:  D003         BEQ        46L64                     ; 0x341839A4
  0x3418399C:  2001         MOVS       R0, #1
  0x3418399E:  F88D 000F    STRB.W     R0, [SP, #15]
  0x341839A2:  E1D8         B          46L93                     ; 0x34183D56

.L64:
  0x341839A4:  F7FD FD9C    BL         LL_RCC_IC11_GetSource    ; 0x341814E0
  0x341839A8:  9902         LDR        R1, [SP, #8]
  0x341839AA:  6B89         LDR        R1, [R1, #56]
  0x341839AC:  F000 F9D8    BL         RCC_IC_CheckPLLSources   ; 0x34183D60
  0x341839B0:  2801         CMP        R0, #1
  0x341839B2:  D003         BEQ        46L65                     ; 0x341839BC
  0x341839B4:  2001         MOVS       R0, #1
  0x341839B6:  F88D 000F    STRB.W     R0, [SP, #15]
  0x341839BA:  E1CC         B          46L93                     ; 0x34183D56

.L65:
  0x341839BC:  9902         LDR        R1, [SP, #8]
  0x341839BE:  6A88         LDR        R0, [R1, #40]
  0x341839C0:  6ACA         LDR        R2, [R1, #44]
  0x341839C2:  2100         MOVS       R1, #0
  0x341839C4:  F6CF 71FF    MOVT       R1, #0xFFFF
  0x341839C8:  EB01 4202    ADD.W      R2, R1, R2, LSL #16
  0x341839CC:  4310         ORRS       R0, R2
  0x341839CE:  F248 02C8    MOVW       R2, #0x80C8
  0x341839D2:  F2C5 6202    MOVT       R2, #0x5602
  0x341839D6:  6010         STR        R0, [R2]
  0x341839D8:  9A02         LDR        R2, [SP, #8]
  0x341839DA:  6B10         LDR        R0, [R2, #48]
  0x341839DC:  6B52         LDR        R2, [R2, #52]
  0x341839DE:  EB01 4202    ADD.W      R2, R1, R2, LSL #16
  0x341839E2:  4310         ORRS       R0, R2
  0x341839E4:  F248 02D8    MOVW       R2, #0x80D8
  0x341839E8:  F2C5 6202    MOVT       R2, #0x5602
  0x341839EC:  6010         STR        R0, [R2]
  0x341839EE:  9A02         LDR        R2, [SP, #8]
  0x341839F0:  6B90         LDR        R0, [R2, #56]
  0x341839F2:  6BD2         LDR        R2, [R2, #60]
  0x341839F4:  EB01 4102    ADD.W      R1, R1, R2, LSL #16
  0x341839F8:  4308         ORRS       R0, R1
  0x341839FA:  F248 01EC    MOVW       R1, #0x80EC
  0x341839FE:  F2C5 6102    MOVT       R1, #0x5602
  0x34183A02:  6008         STR        R0, [R1]
  0x34183A04:  F648 2140    MOVW       R1, #0x8A40
  0x34183A08:  F2C5 6102    MOVT       R1, #0x5602
  0x34183A0C:  F240 4022    MOVW       R0, #0x0422
  0x34183A10:  6008         STR        R0, [R1]
  0x34183A12:  E011         B          46L69                     ; 0x34183A38

.L66:
  0x34183A14:  9802         LDR        R0, [SP, #8]
  0x34183A16:  6880         LDR        R0, [R0, #8]
  0x34183A18:  B938         CBNZ       R0, .L68                 ; 0x34183A2A
  0x34183A1A:  F7FD FCE3    BL         LL_RCC_HSI_IsReady       ; 0x341813E4
  0x34183A1E:  B918         CBNZ       R0, .L67                 ; 0x34183A28
  0x34183A20:  2001         MOVS       R0, #1
  0x34183A22:  F88D 000F    STRB.W     R0, [SP, #15]
  0x34183A26:  E196         B          46L93                     ; 0x34183D56

.L67:
  0x34183A28:  E006         B          46L69                     ; 0x34183A38

.L68:
  0x34183A2A:  F7FD FD21    BL         LL_RCC_MSI_IsReady       ; 0x34181470
  0x34183A2E:  B918         CBNZ       R0, .L69                 ; 0x34183A38
  0x34183A30:  2001         MOVS       R0, #1
  0x34183A32:  F88D 000F    STRB.W     R0, [SP, #15]
  0x34183A36:  E18E         B          46L93                     ; 0x34183D56

.L69:
  0x34183A38:  F248 0120    MOVW       R1, #0x8020
  0x34183A3C:  F2C5 6102    MOVT       R1, #0x5602
  0x34183A40:  6808         LDR        R0, [R1]
  0x34183A42:  F020 7040    BIC        R0, R0, #0x03000000
  0x34183A46:  9A02         LDR        R2, [SP, #8]
  0x34183A48:  6892         LDR        R2, [R2, #8]
  0x34183A4A:  4310         ORRS       R0, R2
  0x34183A4C:  6008         STR        R0, [R1]
  0x34183A4E:  F7FD F83D    BL         HAL_GetTick              ; 0x34180ACC
  0x34183A52:  9001         STR        R0, [SP, #4]

.L70:
  0x34183A54:  F7FD FCD6    BL         LL_RCC_GetSysClkSource   ; 0x34181404
  0x34183A58:  9902         LDR        R1, [SP, #8]
  0x34183A5A:  6889         LDR        R1, [R1, #8]
  0x34183A5C:  0109         LSLS       R1, R1, #4
  0x34183A5E:  4288         CMP        R0, R1
  0x34183A60:  D00C         BEQ        46L72                     ; 0x34183A7C
  0x34183A62:  F7FD F833    BL         HAL_GetTick              ; 0x34180ACC
  0x34183A66:  9901         LDR        R1, [SP, #4]
  0x34183A68:  1A40         SUBS       R0, R0, R1
  0x34183A6A:  F241 3189    MOVW       R1, #0x1389
  0x34183A6E:  4288         CMP        R0, R1
  0x34183A70:  D303         BCC        46L71                     ; 0x34183A7A
  0x34183A72:  2003         MOVS       R0, #3
  0x34183A74:  F88D 000F    STRB.W     R0, [SP, #15]
  0x34183A78:  E16D         B          46L93                     ; 0x34183D56

.L71:
  0x34183A7A:  E7EB         B          46L70                     ; 0x34183A54

.L72:
  0x34183A7C:  9802         LDR        R0, [SP, #8]
  0x34183A7E:  7800         LDRB       R0, [R0]
  0x34183A80:  0740         LSLS       R0, R0, #29
  0x34183A82:  2800         CMP        R0, #0
  0x34183A84:  D544         BPL        46L76                     ; 0x34183B10
  0x34183A86:  9802         LDR        R0, [SP, #8]
  0x34183A88:  68C0         LDR        R0, [R0, #12]
  0x34183A8A:  B310         CBZ        R0, .L73                 ; 0x34183AD2
  0x34183A8C:  9802         LDR        R0, [SP, #8]
  0x34183A8E:  68C0         LDR        R0, [R0, #12]
  0x34183A90:  F5B0 1F80    CMP.W      R0, #0x100000
  0x34183A94:  D01D         BEQ        46L73                     ; 0x34183AD2
  0x34183A96:  9802         LDR        R0, [SP, #8]
  0x34183A98:  68C0         LDR        R0, [R0, #12]
  0x34183A9A:  F5B0 1F00    CMP.W      R0, #0x200000
  0x34183A9E:  D018         BEQ        46L73                     ; 0x34183AD2
  0x34183AA0:  9802         LDR        R0, [SP, #8]
  0x34183AA2:  68C0         LDR        R0, [R0, #12]
  0x34183AA4:  F5B0 1F40    CMP.W      R0, #0x300000
  0x34183AA8:  D013         BEQ        46L73                     ; 0x34183AD2
  0x34183AAA:  9802         LDR        R0, [SP, #8]
  0x34183AAC:  68C0         LDR        R0, [R0, #12]
  0x34183AAE:  F5B0 0F80    CMP.W      R0, #0x400000
  0x34183AB2:  D00E         BEQ        46L73                     ; 0x34183AD2
  0x34183AB4:  9802         LDR        R0, [SP, #8]
  0x34183AB6:  68C0         LDR        R0, [R0, #12]
  0x34183AB8:  F5B0 0FA0    CMP.W      R0, #0x500000
  0x34183ABC:  D009         BEQ        46L73                     ; 0x34183AD2
  0x34183ABE:  9802         LDR        R0, [SP, #8]
  0x34183AC0:  68C0         LDR        R0, [R0, #12]
  0x34183AC2:  F5B0 0FC0    CMP.W      R0, #0x600000
  0x34183AC6:  D004         BEQ        46L73                     ; 0x34183AD2
  0x34183AC8:  9802         LDR        R0, [SP, #8]
  0x34183ACA:  68C0         LDR        R0, [R0, #12]
  0x34183ACC:  F5B0 0FE0    CMP.W      R0, #0x700000
  0x34183AD0:  D100         BNE        46L74                     ; 0x34183AD4

.L73:
  0x34183AD2:  E007         B          46L75                     ; 0x34183AE4

.L74:
  0x34183AD4:  F244 20F8    MOVW       R0, #0x42F8              ; 0x341842F8 = .rodata..L.str.35
  0x34183AD8:  F2C3 4018    MOVT       R0, #0x3418              ; 0x341842F8 = .rodata..L.str.35
  0x34183ADC:  F44F 618E    MOV.W      R1, #0x0470
  0x34183AE0:  F7FE F9AC    BL         assert_failed            ; 0x34181E3C

.L75:
  0x34183AE4:  9802         LDR        R0, [SP, #8]
  0x34183AE6:  68C0         LDR        R0, [R0, #12]
  0x34183AE8:  F248 0124    MOVW       R1, #0x8024
  0x34183AEC:  F2C5 6102    MOVT       R1, #0x5602
  0x34183AF0:  6809         LDR        R1, [R1]
  0x34183AF2:  F401 01E0    AND        R1, R1, #0x700000
  0x34183AF6:  4288         CMP        R0, R1
  0x34183AF8:  D20A         BCS        46L76                     ; 0x34183B10
  0x34183AFA:  F248 0124    MOVW       R1, #0x8024
  0x34183AFE:  F2C5 6102    MOVT       R1, #0x5602
  0x34183B02:  6808         LDR        R0, [R1]
  0x34183B04:  F420 00E0    BIC        R0, R0, #0x700000
  0x34183B08:  9A02         LDR        R2, [SP, #8]
  0x34183B0A:  68D2         LDR        R2, [R2, #12]
  0x34183B0C:  4310         ORRS       R0, R2
  0x34183B0E:  6008         STR        R0, [R1]

.L76:
  0x34183B10:  9802         LDR        R0, [SP, #8]
  0x34183B12:  7800         LDRB       R0, [R0]
  0x34183B14:  0700         LSLS       R0, R0, #28
  0x34183B16:  2800         CMP        R0, #0
  0x34183B18:  D53D         BPL        46L80                     ; 0x34183B96
  0x34183B1A:  9802         LDR        R0, [SP, #8]
  0x34183B1C:  6900         LDR        R0, [R0, #16]
  0x34183B1E:  B1D8         CBZ        R0, .L77                 ; 0x34183B58
  0x34183B20:  9802         LDR        R0, [SP, #8]
  0x34183B22:  6900         LDR        R0, [R0, #16]
  0x34183B24:  2801         CMP        R0, #1
  0x34183B26:  D017         BEQ        46L77                     ; 0x34183B58
  0x34183B28:  9802         LDR        R0, [SP, #8]
  0x34183B2A:  6900         LDR        R0, [R0, #16]
  0x34183B2C:  2802         CMP        R0, #2
  0x34183B2E:  D013         BEQ        46L77                     ; 0x34183B58
  0x34183B30:  9802         LDR        R0, [SP, #8]
  0x34183B32:  6900         LDR        R0, [R0, #16]
  0x34183B34:  2803         CMP        R0, #3
  0x34183B36:  D00F         BEQ        46L77                     ; 0x34183B58
  0x34183B38:  9802         LDR        R0, [SP, #8]
  0x34183B3A:  6900         LDR        R0, [R0, #16]
  0x34183B3C:  2804         CMP        R0, #4
  0x34183B3E:  D00B         BEQ        46L77                     ; 0x34183B58
  0x34183B40:  9802         LDR        R0, [SP, #8]
  0x34183B42:  6900         LDR        R0, [R0, #16]
  0x34183B44:  2805         CMP        R0, #5
  0x34183B46:  D007         BEQ        46L77                     ; 0x34183B58
  0x34183B48:  9802         LDR        R0, [SP, #8]
  0x34183B4A:  6900         LDR        R0, [R0, #16]
  0x34183B4C:  2806         CMP        R0, #6
  0x34183B4E:  D003         BEQ        46L77                     ; 0x34183B58
  0x34183B50:  9802         LDR        R0, [SP, #8]
  0x34183B52:  6900         LDR        R0, [R0, #16]
  0x34183B54:  2807         CMP        R0, #7
  0x34183B56:  D100         BNE        46L78                     ; 0x34183B5A

.L77:
  0x34183B58:  E007         B          46L79                     ; 0x34183B6A

.L78:
  0x34183B5A:  F244 20F8    MOVW       R0, #0x42F8              ; 0x341842F8 = .rodata..L.str.35
  0x34183B5E:  F2C3 4018    MOVT       R0, #0x3418              ; 0x341842F8 = .rodata..L.str.35
  0x34183B62:  F240 417B    MOVW       R1, #0x047B
  0x34183B66:  F7FE F969    BL         assert_failed            ; 0x34181E3C

.L79:
  0x34183B6A:  9802         LDR        R0, [SP, #8]
  0x34183B6C:  6900         LDR        R0, [R0, #16]
  0x34183B6E:  F248 0124    MOVW       R1, #0x8024
  0x34183B72:  F2C5 6102    MOVT       R1, #0x5602
  0x34183B76:  6809         LDR        R1, [R1]
  0x34183B78:  F001 0107    AND        R1, R1, #7
  0x34183B7C:  4288         CMP        R0, R1
  0x34183B7E:  D20A         BCS        46L80                     ; 0x34183B96
  0x34183B80:  F248 0124    MOVW       R1, #0x8024
  0x34183B84:  F2C5 6102    MOVT       R1, #0x5602
  0x34183B88:  6808         LDR        R0, [R1]
  0x34183B8A:  F020 0007    BIC        R0, R0, #7
  0x34183B8E:  9A02         LDR        R2, [SP, #8]
  0x34183B90:  6912         LDR        R2, [R2, #16]
  0x34183B92:  4310         ORRS       R0, R2
  0x34183B94:  6008         STR        R0, [R1]

.L80:
  0x34183B96:  9802         LDR        R0, [SP, #8]
  0x34183B98:  7800         LDRB       R0, [R0]
  0x34183B9A:  06C0         LSLS       R0, R0, #27
  0x34183B9C:  2800         CMP        R0, #0
  0x34183B9E:  D53D         BPL        46L84                     ; 0x34183C1C
  0x34183BA0:  9802         LDR        R0, [SP, #8]
  0x34183BA2:  6940         LDR        R0, [R0, #20]
  0x34183BA4:  B1D8         CBZ        R0, .L81                 ; 0x34183BDE
  0x34183BA6:  9802         LDR        R0, [SP, #8]
  0x34183BA8:  6940         LDR        R0, [R0, #20]
  0x34183BAA:  2810         CMP        R0, #16
  0x34183BAC:  D017         BEQ        46L81                     ; 0x34183BDE
  0x34183BAE:  9802         LDR        R0, [SP, #8]
  0x34183BB0:  6940         LDR        R0, [R0, #20]
  0x34183BB2:  2820         CMP        R0, #32
  0x34183BB4:  D013         BEQ        46L81                     ; 0x34183BDE
  0x34183BB6:  9802         LDR        R0, [SP, #8]
  0x34183BB8:  6940         LDR        R0, [R0, #20]
  0x34183BBA:  2830         CMP        R0, #48
  0x34183BBC:  D00F         BEQ        46L81                     ; 0x34183BDE
  0x34183BBE:  9802         LDR        R0, [SP, #8]
  0x34183BC0:  6940         LDR        R0, [R0, #20]
  0x34183BC2:  2840         CMP        R0, #64
  0x34183BC4:  D00B         BEQ        46L81                     ; 0x34183BDE
  0x34183BC6:  9802         LDR        R0, [SP, #8]
  0x34183BC8:  6940         LDR        R0, [R0, #20]
  0x34183BCA:  2850         CMP        R0, #80
  0x34183BCC:  D007         BEQ        46L81                     ; 0x34183BDE
  0x34183BCE:  9802         LDR        R0, [SP, #8]
  0x34183BD0:  6940         LDR        R0, [R0, #20]
  0x34183BD2:  2860         CMP        R0, #96
  0x34183BD4:  D003         BEQ        46L81                     ; 0x34183BDE
  0x34183BD6:  9802         LDR        R0, [SP, #8]
  0x34183BD8:  6940         LDR        R0, [R0, #20]
  0x34183BDA:  2870         CMP        R0, #112
  0x34183BDC:  D100         BNE        46L82                     ; 0x34183BE0

.L81:
  0x34183BDE:  E007         B          46L83                     ; 0x34183BF0

.L82:
  0x34183BE0:  F244 20F8    MOVW       R0, #0x42F8              ; 0x341842F8 = .rodata..L.str.35
  0x34183BE4:  F2C3 4018    MOVT       R0, #0x3418              ; 0x341842F8 = .rodata..L.str.35
  0x34183BE8:  F240 4185    MOVW       R1, #0x0485
  0x34183BEC:  F7FE F926    BL         assert_failed            ; 0x34181E3C

.L83:
  0x34183BF0:  9802         LDR        R0, [SP, #8]
  0x34183BF2:  6940         LDR        R0, [R0, #20]
  0x34183BF4:  F248 0124    MOVW       R1, #0x8024
  0x34183BF8:  F2C5 6102    MOVT       R1, #0x5602
  0x34183BFC:  6809         LDR        R1, [R1]
  0x34183BFE:  F001 0170    AND        R1, R1, #112
  0x34183C02:  4288         CMP        R0, R1
  0x34183C04:  D20A         BCS        46L84                     ; 0x34183C1C
  0x34183C06:  F248 0124    MOVW       R1, #0x8024
  0x34183C0A:  F2C5 6102    MOVT       R1, #0x5602
  0x34183C0E:  6808         LDR        R0, [R1]
  0x34183C10:  F020 0070    BIC        R0, R0, #112
  0x34183C14:  9A02         LDR        R2, [SP, #8]
  0x34183C16:  6952         LDR        R2, [R2, #20]
  0x34183C18:  4310         ORRS       R0, R2
  0x34183C1A:  6008         STR        R0, [R1]

.L84:
  0x34183C1C:  9802         LDR        R0, [SP, #8]
  0x34183C1E:  7800         LDRB       R0, [R0]
  0x34183C20:  0680         LSLS       R0, R0, #26
  0x34183C22:  2800         CMP        R0, #0
  0x34183C24:  D544         BPL        46L88                     ; 0x34183CB0
  0x34183C26:  9802         LDR        R0, [SP, #8]
  0x34183C28:  6980         LDR        R0, [R0, #24]
  0x34183C2A:  B310         CBZ        R0, .L85                 ; 0x34183C72
  0x34183C2C:  9802         LDR        R0, [SP, #8]
  0x34183C2E:  6980         LDR        R0, [R0, #24]
  0x34183C30:  F5B0 5F80    CMP.W      R0, #0x1000
  0x34183C34:  D01D         BEQ        46L85                     ; 0x34183C72
  0x34183C36:  9802         LDR        R0, [SP, #8]
  0x34183C38:  6980         LDR        R0, [R0, #24]
  0x34183C3A:  F5B0 5F00    CMP.W      R0, #0x2000
  0x34183C3E:  D018         BEQ        46L85                     ; 0x34183C72
  0x34183C40:  9802         LDR        R0, [SP, #8]
  0x34183C42:  6980         LDR        R0, [R0, #24]
  0x34183C44:  F5B0 5F40    CMP.W      R0, #0x3000
  0x34183C48:  D013         BEQ        46L85                     ; 0x34183C72
  0x34183C4A:  9802         LDR        R0, [SP, #8]
  0x34183C4C:  6980         LDR        R0, [R0, #24]
  0x34183C4E:  F5B0 4F80    CMP.W      R0, #0x4000
  0x34183C52:  D00E         BEQ        46L85                     ; 0x34183C72
  0x34183C54:  9802         LDR        R0, [SP, #8]
  0x34183C56:  6980         LDR        R0, [R0, #24]
  0x34183C58:  F5B0 4FA0    CMP.W      R0, #0x5000
  0x34183C5C:  D009         BEQ        46L85                     ; 0x34183C72
  0x34183C5E:  9802         LDR        R0, [SP, #8]
  0x34183C60:  6980         LDR        R0, [R0, #24]
  0x34183C62:  F5B0 4FC0    CMP.W      R0, #0x6000
  0x34183C66:  D004         BEQ        46L85                     ; 0x34183C72
  0x34183C68:  9802         LDR        R0, [SP, #8]
  0x34183C6A:  6980         LDR        R0, [R0, #24]
  0x34183C6C:  F5B0 4FE0    CMP.W      R0, #0x7000
  0x34183C70:  D100         BNE        46L86                     ; 0x34183C74

.L85:
  0x34183C72:  E007         B          46L87                     ; 0x34183C84

.L86:
  0x34183C74:  F244 20F8    MOVW       R0, #0x42F8              ; 0x341842F8 = .rodata..L.str.35
  0x34183C78:  F2C3 4018    MOVT       R0, #0x3418              ; 0x341842F8 = .rodata..L.str.35
  0x34183C7C:  F240 418F    MOVW       R1, #0x048F
  0x34183C80:  F7FE F8DC    BL         assert_failed            ; 0x34181E3C

.L87:
  0x34183C84:  9802         LDR        R0, [SP, #8]
  0x34183C86:  6980         LDR        R0, [R0, #24]
  0x34183C88:  F248 0124    MOVW       R1, #0x8024
  0x34183C8C:  F2C5 6102    MOVT       R1, #0x5602
  0x34183C90:  6809         LDR        R1, [R1]
  0x34183C92:  F401 41E0    AND        R1, R1, #0x7000
  0x34183C96:  4288         CMP        R0, R1
  0x34183C98:  D20A         BCS        46L88                     ; 0x34183CB0
  0x34183C9A:  F248 0124    MOVW       R1, #0x8024
  0x34183C9E:  F2C5 6102    MOVT       R1, #0x5602
  0x34183CA2:  6808         LDR        R0, [R1]
  0x34183CA4:  F420 40E0    BIC        R0, R0, #0x7000
  0x34183CA8:  9A02         LDR        R2, [SP, #8]
  0x34183CAA:  6992         LDR        R2, [R2, #24]
  0x34183CAC:  4310         ORRS       R0, R2
  0x34183CAE:  6008         STR        R0, [R1]

.L88:
  0x34183CB0:  9802         LDR        R0, [SP, #8]
  0x34183CB2:  7800         LDRB       R0, [R0]
  0x34183CB4:  0640         LSLS       R0, R0, #25
  0x34183CB6:  2800         CMP        R0, #0
  0x34183CB8:  D544         BPL        46L92                     ; 0x34183D44
  0x34183CBA:  9802         LDR        R0, [SP, #8]
  0x34183CBC:  69C0         LDR        R0, [R0, #28]
  0x34183CBE:  B310         CBZ        R0, .L89                 ; 0x34183D06
  0x34183CC0:  9802         LDR        R0, [SP, #8]
  0x34183CC2:  69C0         LDR        R0, [R0, #28]
  0x34183CC4:  F5B0 3F80    CMP.W      R0, #0x010000
  0x34183CC8:  D01D         BEQ        46L89                     ; 0x34183D06
  0x34183CCA:  9802         LDR        R0, [SP, #8]
  0x34183CCC:  69C0         LDR        R0, [R0, #28]
  0x34183CCE:  F5B0 3F00    CMP.W      R0, #0x020000
  0x34183CD2:  D018         BEQ        46L89                     ; 0x34183D06
  0x34183CD4:  9802         LDR        R0, [SP, #8]
  0x34183CD6:  69C0         LDR        R0, [R0, #28]
  0x34183CD8:  F5B0 3F40    CMP.W      R0, #0x030000
  0x34183CDC:  D013         BEQ        46L89                     ; 0x34183D06
  0x34183CDE:  9802         LDR        R0, [SP, #8]
  0x34183CE0:  69C0         LDR        R0, [R0, #28]
  0x34183CE2:  F5B0 2F80    CMP.W      R0, #0x040000
  0x34183CE6:  D00E         BEQ        46L89                     ; 0x34183D06
  0x34183CE8:  9802         LDR        R0, [SP, #8]
  0x34183CEA:  69C0         LDR        R0, [R0, #28]
  0x34183CEC:  F5B0 2FA0    CMP.W      R0, #0x050000
  0x34183CF0:  D009         BEQ        46L89                     ; 0x34183D06
  0x34183CF2:  9802         LDR        R0, [SP, #8]
  0x34183CF4:  69C0         LDR        R0, [R0, #28]
  0x34183CF6:  F5B0 2FC0    CMP.W      R0, #0x060000
  0x34183CFA:  D004         BEQ        46L89                     ; 0x34183D06
  0x34183CFC:  9802         LDR        R0, [SP, #8]
  0x34183CFE:  69C0         LDR        R0, [R0, #28]
  0x34183D00:  F5B0 2FE0    CMP.W      R0, #0x070000
  0x34183D04:  D100         BNE        46L90                     ; 0x34183D08

.L89:
  0x34183D06:  E007         B          46L91                     ; 0x34183D18

.L90:
  0x34183D08:  F244 20F8    MOVW       R0, #0x42F8              ; 0x341842F8 = .rodata..L.str.35
  0x34183D0C:  F2C3 4018    MOVT       R0, #0x3418              ; 0x341842F8 = .rodata..L.str.35
  0x34183D10:  F240 4199    MOVW       R1, #0x0499
  0x34183D14:  F7FE F892    BL         assert_failed            ; 0x34181E3C

.L91:
  0x34183D18:  9802         LDR        R0, [SP, #8]
  0x34183D1A:  69C0         LDR        R0, [R0, #28]
  0x34183D1C:  F248 0124    MOVW       R1, #0x8024
  0x34183D20:  F2C5 6102    MOVT       R1, #0x5602
  0x34183D24:  6809         LDR        R1, [R1]
  0x34183D26:  F401 21E0    AND        R1, R1, #0x070000
  0x34183D2A:  4288         CMP        R0, R1
  0x34183D2C:  D20A         BCS        46L92                     ; 0x34183D44
  0x34183D2E:  F248 0124    MOVW       R1, #0x8024
  0x34183D32:  F2C5 6102    MOVT       R1, #0x5602
  0x34183D36:  6808         LDR        R0, [R1]
  0x34183D38:  F420 20E0    BIC        R0, R0, #0x070000
  0x34183D3C:  9A02         LDR        R2, [SP, #8]
  0x34183D3E:  69D2         LDR        R2, [R2, #28]
  0x34183D40:  4310         ORRS       R0, R2
  0x34183D42:  6008         STR        R0, [R1]

.L92:
  0x34183D44:  F244 4044    MOVW       R0, #0x4444              ; 0x34184444 = uwTickPrio
  0x34183D48:  F2C3 4018    MOVT       R0, #0x3418              ; 0x34184444 = uwTickPrio
  0x34183D4C:  6800         LDR        R0, [R0]
  0x34183D4E:  F7FE F98B    BL         HAL_InitTick             ; 0x34182068
  0x34183D52:  F88D 000F    STRB.W     R0, [SP, #15]

.L93:
  0x34183D56:  F89D 000F    LDRB.W     R0, [SP, #15]
  0x34183D5A:  B004         ADD        SP, SP, #16
  0x34183D5C:  BD80         POP        123R7, PC}

Section .init.RNG_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


RNG_IRQHandler:
  0x34183D5E:  E7FE         B          RNG_IRQHandler           ; 0x34183D5E

Section .text.RCC_IC_CheckPLLSources from blto2_FSBL_lto.o, size=234, align=4


RCC_IC_CheckPLLSources:
  0x34183D60:  B580         PUSH       123R7, LR}
  0x34183D62:  B086         SUB        SP, SP, #24
  0x34183D64:  9005         STR        R0, [SP, #20]
  0x34183D66:  9104         STR        R1, [SP, #16]
  0x34183D68:  2001         MOVS       R0, #1
  0x34183D6A:  9003         STR        R0, [SP, #12]
  0x34183D6C:  9805         LDR        R0, [SP, #20]
  0x34183D6E:  9002         STR        R0, [SP, #8]
  0x34183D70:  B160         CBZ        R0, .L1                  ; 0x34183D8C
  0x34183D72:  9802         LDR        R0, [SP, #8]
  0x34183D74:  F1B0 5F80    CMP.W      R0, #0x10000000
  0x34183D78:  D011         BEQ        46L3                      ; 0x34183D9E
  0x34183D7A:  9802         LDR        R0, [SP, #8]
  0x34183D7C:  F1B0 5F00    CMP.W      R0, #0x20000000
  0x34183D80:  D016         BEQ        46L5                      ; 0x34183DB0
  0x34183D82:  9802         LDR        R0, [SP, #8]
  0x34183D84:  F1B0 5F40    CMP.W      R0, #0x30000000
  0x34183D88:  D01B         BEQ        46L7                      ; 0x34183DC2
  0x34183D8A:  E023         B          46L9                      ; 0x34183DD4

.L1:
  0x34183D8C:  F7FD FB88    BL         LL_RCC_PLL1_IsReady      ; 0x341814A0
  0x34183D90:  B920         CBNZ       R0, .L2                  ; 0x34183D9C
  0x34183D92:  F7FD FBFF    BL         LL_RCC_PLL1_IsEnabledBypass ; 0x34181594
  0x34183D96:  B908         CBNZ       R0, .L2                  ; 0x34183D9C
  0x34183D98:  2000         MOVS       R0, #0
  0x34183D9A:  9003         STR        R0, [SP, #12]

.L2:
  0x34183D9C:  E01C         B          46L10                     ; 0x34183DD8

.L3:
  0x34183D9E:  F7FD FBA7    BL         LL_RCC_PLL2_IsReady      ; 0x341814F0
  0x34183DA2:  B920         CBNZ       R0, .L4                  ; 0x34183DAE
  0x34183DA4:  F7FD FBFE    BL         LL_RCC_PLL2_IsEnabledBypass ; 0x341815A4
  0x34183DA8:  B908         CBNZ       R0, .L4                  ; 0x34183DAE
  0x34183DAA:  2000         MOVS       R0, #0
  0x34183DAC:  9003         STR        R0, [SP, #12]

.L4:
  0x34183DAE:  E013         B          46L10                     ; 0x34183DD8

.L5:
  0x34183DB0:  F7FD FBA6    BL         LL_RCC_PLL3_IsReady      ; 0x34181500
  0x34183DB4:  B920         CBNZ       R0, .L6                  ; 0x34183DC0
  0x34183DB6:  F7FD FBFD    BL         LL_RCC_PLL3_IsEnabledBypass ; 0x341815B4
  0x34183DBA:  B908         CBNZ       R0, .L6                  ; 0x34183DC0
  0x34183DBC:  2000         MOVS       R0, #0
  0x34183DBE:  9003         STR        R0, [SP, #12]

.L6:
  0x34183DC0:  E00A         B          46L10                     ; 0x34183DD8

.L7:
  0x34183DC2:  F7FD FBA5    BL         LL_RCC_PLL4_IsReady      ; 0x34181510
  0x34183DC6:  B920         CBNZ       R0, .L8                  ; 0x34183DD2
  0x34183DC8:  F7FD FBFC    BL         LL_RCC_PLL4_IsEnabledBypass ; 0x341815C4
  0x34183DCC:  B908         CBNZ       R0, .L8                  ; 0x34183DD2
  0x34183DCE:  2000         MOVS       R0, #0
  0x34183DD0:  9003         STR        R0, [SP, #12]

.L8:
  0x34183DD2:  E001         B          46L10                     ; 0x34183DD8

.L9:
  0x34183DD4:  2000         MOVS       R0, #0
  0x34183DD6:  9003         STR        R0, [SP, #12]

.L10:
  0x34183DD8:  9804         LDR        R0, [SP, #16]
  0x34183DDA:  9001         STR        R0, [SP, #4]
  0x34183DDC:  B160         CBZ        R0, .L11                 ; 0x34183DF8
  0x34183DDE:  9801         LDR        R0, [SP, #4]
  0x34183DE0:  F1B0 5F80    CMP.W      R0, #0x10000000
  0x34183DE4:  D011         BEQ        46L13                     ; 0x34183E0A
  0x34183DE6:  9801         LDR        R0, [SP, #4]
  0x34183DE8:  F1B0 5F00    CMP.W      R0, #0x20000000
  0x34183DEC:  D016         BEQ        46L15                     ; 0x34183E1C
  0x34183DEE:  9801         LDR        R0, [SP, #4]
  0x34183DF0:  F1B0 5F40    CMP.W      R0, #0x30000000
  0x34183DF4:  D01B         BEQ        46L17                     ; 0x34183E2E
  0x34183DF6:  E023         B          46L19                     ; 0x34183E40

.L11:
  0x34183DF8:  F7FD FB52    BL         LL_RCC_PLL1_IsReady      ; 0x341814A0
  0x34183DFC:  B920         CBNZ       R0, .L12                 ; 0x34183E08
  0x34183DFE:  F7FD FBC9    BL         LL_RCC_PLL1_IsEnabledBypass ; 0x34181594
  0x34183E02:  B908         CBNZ       R0, .L12                 ; 0x34183E08
  0x34183E04:  2000         MOVS       R0, #0
  0x34183E06:  9003         STR        R0, [SP, #12]

.L12:
  0x34183E08:  E01C         B          46L20                     ; 0x34183E44

.L13:
  0x34183E0A:  F7FD FB71    BL         LL_RCC_PLL2_IsReady      ; 0x341814F0
  0x34183E0E:  B920         CBNZ       R0, .L14                 ; 0x34183E1A
  0x34183E10:  F7FD FBC8    BL         LL_RCC_PLL2_IsEnabledBypass ; 0x341815A4
  0x34183E14:  B908         CBNZ       R0, .L14                 ; 0x34183E1A
  0x34183E16:  2000         MOVS       R0, #0
  0x34183E18:  9003         STR        R0, [SP, #12]

.L14:
  0x34183E1A:  E013         B          46L20                     ; 0x34183E44

.L15:
  0x34183E1C:  F7FD FB70    BL         LL_RCC_PLL3_IsReady      ; 0x34181500
  0x34183E20:  B920         CBNZ       R0, .L16                 ; 0x34183E2C
  0x34183E22:  F7FD FBC7    BL         LL_RCC_PLL3_IsEnabledBypass ; 0x341815B4
  0x34183E26:  B908         CBNZ       R0, .L16                 ; 0x34183E2C
  0x34183E28:  2000         MOVS       R0, #0
  0x34183E2A:  9003         STR        R0, [SP, #12]

.L16:
  0x34183E2C:  E00A         B          46L20                     ; 0x34183E44

.L17:
  0x34183E2E:  F7FD FB6F    BL         LL_RCC_PLL4_IsReady      ; 0x34181510
  0x34183E32:  B920         CBNZ       R0, .L18                 ; 0x34183E3E
  0x34183E34:  F7FD FBC6    BL         LL_RCC_PLL4_IsEnabledBypass ; 0x341815C4
  0x34183E38:  B908         CBNZ       R0, .L18                 ; 0x34183E3E
  0x34183E3A:  2000         MOVS       R0, #0
  0x34183E3C:  9003         STR        R0, [SP, #12]

.L18:
  0x34183E3E:  E001         B          46L20                     ; 0x34183E44

.L19:
  0x34183E40:  2000         MOVS       R0, #0
  0x34183E42:  9003         STR        R0, [SP, #12]

.L20:
  0x34183E44:  9803         LDR        R0, [SP, #12]
  0x34183E46:  B006         ADD        SP, SP, #24
  0x34183E48:  BD80         POP        123R7, PC}

Section .init.MCE1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


MCE1_IRQHandler:
  0x34183E4A:  E7FE         B          MCE1_IRQHandler          ; 0x34183E4A

Section .text.LL_RCC_IC1_Enable from blto2_FSBL_lto.o, size=14, align=4


LL_RCC_IC1_Enable:
  0x34183E4C:  F648 2140    MOVW       R1, #0x8A40
  0x34183E50:  F2C5 6102    MOVT       R1, #0x5602
  0x34183E54:  2001         MOVS       R0, #1
  0x34183E56:  6008         STR        R0, [R1]
  0x34183E58:  4770         BX         LR

Section .init.MCE2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


MCE2_IRQHandler:
  0x34183E5A:  E7FE         B          MCE2_IRQHandler          ; 0x34183E5A

Section .text.HAL_RCC_GetCpuClockFreq from blto2_FSBL_lto.o, size=238, align=4


HAL_RCC_GetCpuClockFreq:
  0x34183E5C:  B580         PUSH       123R7, LR}
  0x34183E5E:  B084         SUB        SP, SP, #16
  0x34183E60:  2000         MOVS       R0, #0
  0x34183E62:  9003         STR        R0, [SP, #12]
  0x34183E64:  F7FD FAC6    BL         LL_RCC_GetCpuClkSource   ; 0x341813F4
  0x34183E68:  4601         MOV        R1, R0
  0x34183E6A:  9101         STR        R1, [SP, #4]
  0x34183E6C:  B160         CBZ        R0, .L1                  ; 0x34183E88
  0x34183E6E:  9801         LDR        R0, [SP, #4]
  0x34183E70:  F5B0 1F80    CMP.W      R0, #0x100000
  0x34183E74:  D012         BEQ        46L2                      ; 0x34183E9C
  0x34183E76:  9801         LDR        R0, [SP, #4]
  0x34183E78:  F5B0 1F00    CMP.W      R0, #0x200000
  0x34183E7C:  D022         BEQ        46L3                      ; 0x34183EC4
  0x34183E7E:  9801         LDR        R0, [SP, #4]
  0x34183E80:  F5B0 1F40    CMP.W      R0, #0x300000
  0x34183E84:  D024         BEQ        46L4                      ; 0x34183ED0
  0x34183E86:  E05D         B          46L10                     ; 0x34183F44

.L1:
  0x34183E88:  F7FD FB7C    BL         LL_RCC_HSI_GetDivider    ; 0x34181584
  0x34183E8C:  09C1         LSRS       R1, R0, #7
  0x34183E8E:  F249 0000    MOVW       R0, #0x9000
  0x34183E92:  F2C0 30D0    MOVT       R0, #0x03D0
  0x34183E96:  40C8         LSRS       R0, R1
  0x34183E98:  9003         STR        R0, [SP, #12]
  0x34183E9A:  E053         B          46L10                     ; 0x34183F44

.L2:
  0x34183E9C:  F248 0044    MOVW       R0, #0x8044
  0x34183EA0:  F2C5 6002    MOVT       R0, #0x5602
  0x34183EA4:  6800         LDR        R0, [R0]
  0x34183EA6:  F400 7000    AND        R0, R0, #0x0200
  0x34183EAA:  F5B0 7F00    CMP.W      R0, #0x0200
  0x34183EAE:  F640 1000    MOVW       R0, #0x0900
  0x34183EB2:  F2C0 003D    MOVT       R0, #61
  0x34183EB6:  BF04         ITT        EQ
  0x34183EB8:  F242 4000    MOVWEQ     R0, #0x2400
  0x34183EBC:  F2C0 00F4    MOVTEQ     R0, #244
  0x34183EC0:  9003         STR        R0, [SP, #12]
  0x34183EC2:  E03F         B          46L10                     ; 0x34183F44

.L3:
  0x34183EC4:  F646 4000    MOVW       R0, #0x6C00
  0x34183EC8:  F2C0 20DC    MOVT       R0, #0x02DC
  0x34183ECC:  9003         STR        R0, [SP, #12]
  0x34183ECE:  E039         B          46L10                     ; 0x34183F44

.L4:
  0x34183ED0:  F000 F83C    BL         LL_RCC_IC1_GetDivider    ; 0x34183F4C
  0x34183ED4:  9002         STR        R0, [SP, #8]
  0x34183ED6:  F7FD FAEB    BL         LL_RCC_IC1_GetSource     ; 0x341814B0
  0x34183EDA:  4601         MOV        R1, R0
  0x34183EDC:  9100         STR        R1, [SP, #0]
  0x34183EDE:  B160         CBZ        R0, .L5                  ; 0x34183EFA
  0x34183EE0:  9800         LDR        R0, [SP, #0]
  0x34183EE2:  F1B0 5F80    CMP.W      R0, #0x10000000
  0x34183EE6:  D011         BEQ        46L6                      ; 0x34183F0C
  0x34183EE8:  9800         LDR        R0, [SP, #0]
  0x34183EEA:  F1B0 5F00    CMP.W      R0, #0x20000000
  0x34183EEE:  D016         BEQ        46L7                      ; 0x34183F1E
  0x34183EF0:  9800         LDR        R0, [SP, #0]
  0x34183EF2:  F1B0 5F40    CMP.W      R0, #0x30000000
  0x34183EF6:  D01B         BEQ        46L8                      ; 0x34183F30
  0x34183EF8:  E023         B          46L9                      ; 0x34183F42

.L5:
  0x34183EFA:  F000 F833    BL         HAL_RCCEx_GetPLL1CLKFreq ; 0x34183F64
  0x34183EFE:  9003         STR        R0, [SP, #12]
  0x34183F00:  9803         LDR        R0, [SP, #12]
  0x34183F02:  9902         LDR        R1, [SP, #8]
  0x34183F04:  FBB0 F0F1    UDIV       R0, R0, R1
  0x34183F08:  9003         STR        R0, [SP, #12]
  0x34183F0A:  E01A         B          46L9                      ; 0x34183F42

.L6:
  0x34183F0C:  F000 F86C    BL         HAL_RCCEx_GetPLL2CLKFreq ; 0x34183FE8
  0x34183F10:  9003         STR        R0, [SP, #12]
  0x34183F12:  9803         LDR        R0, [SP, #12]
  0x34183F14:  9902         LDR        R1, [SP, #8]
  0x34183F16:  FBB0 F0F1    UDIV       R0, R0, R1
  0x34183F1A:  9003         STR        R0, [SP, #12]
  0x34183F1C:  E011         B          46L9                      ; 0x34183F42

.L7:
  0x34183F1E:  F000 F8A5    BL         HAL_RCCEx_GetPLL3CLKFreq ; 0x3418406C
  0x34183F22:  9003         STR        R0, [SP, #12]
  0x34183F24:  9803         LDR        R0, [SP, #12]
  0x34183F26:  9902         LDR        R1, [SP, #8]
  0x34183F28:  FBB0 F0F1    UDIV       R0, R0, R1
  0x34183F2C:  9003         STR        R0, [SP, #12]
  0x34183F2E:  E008         B          46L9                      ; 0x34183F42

.L8:
  0x34183F30:  F000 F8DE    BL         HAL_RCCEx_GetPLL4CLKFreq ; 0x341840F0
  0x34183F34:  9003         STR        R0, [SP, #12]
  0x34183F36:  9803         LDR        R0, [SP, #12]
  0x34183F38:  9902         LDR        R1, [SP, #8]
  0x34183F3A:  FBB0 F0F1    UDIV       R0, R0, R1
  0x34183F3E:  9003         STR        R0, [SP, #12]
  0x34183F40:  E7FF         B          46L9                      ; 0x34183F42

.L9:
  0x34183F42:  E7FF         B          46L10                     ; 0x34183F44

.L10:
  0x34183F44:  9803         LDR        R0, [SP, #12]
  0x34183F46:  B004         ADD        SP, SP, #16
  0x34183F48:  BD80         POP        123R7, PC}

Section .init.MCE3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


MCE3_IRQHandler:
  0x34183F4A:  E7FE         B          MCE3_IRQHandler          ; 0x34183F4A

Section .text.LL_RCC_IC1_GetDivider from blto2_FSBL_lto.o, size=22, align=4


LL_RCC_IC1_GetDivider:
  0x34183F4C:  F248 00C4    MOVW       R0, #0x80C4
  0x34183F50:  F2C5 6002    MOVT       R0, #0x5602
  0x34183F54:  6800         LDR        R0, [R0]
  0x34183F56:  F400 017F    AND        R1, R0, #0xFF0000
  0x34183F5A:  2001         MOVS       R0, #1
  0x34183F5C:  EB00 4011    ADD.W      R0, R0, R1, LSR #16
  0x34183F60:  4770         BX         LR

Section .init.MCE4_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


MCE4_IRQHandler:
  0x34183F62:  E7FE         B          MCE4_IRQHandler          ; 0x34183F62

Section .text.HAL_RCCEx_GetPLL1CLKFreq from blto2_FSBL_lto.o, size=130, align=4


HAL_RCCEx_GetPLL1CLKFreq:
  0x34183F64:  B510         PUSH       123R4, LR}
  0x34183F66:  B08A         SUB        SP, SP, #40
  0x34183F68:  2000         MOVS       R0, #0
  0x34183F6A:  9009         STR        R0, [SP, #36]
  0x34183F6C:  F7FD FD34    BL         LL_RCC_PLL1_IsReady.70   ; 0x341819D8
  0x34183F70:  B368         CBZ        R0, .L2                  ; 0x34183FCE
  0x34183F72:  F7FD FD39    BL         LL_RCC_PLL1P_IsEnabled   ; 0x341819E8
  0x34183F76:  B348         CBZ        R0, .L1                  ; 0x34183FCC
  0x34183F78:  F7FD FD3E    BL         LL_RCC_PLL1_GetSource.71 ; 0x341819F8
  0x34183F7C:  F7FD FBBA    BL         RCCEx_GetPLLSourceFreq   ; 0x341816F4
  0x34183F80:  9007         STR        R0, [SP, #28]
  0x34183F82:  9807         LDR        R0, [SP, #28]
  0x34183F84:  B310         CBZ        R0, .L1                  ; 0x34183FCC
  0x34183F86:  F7FD FD3F    BL         LL_RCC_PLL1_GetM         ; 0x34181A08
  0x34183F8A:  9008         STR        R0, [SP, #32]
  0x34183F8C:  9808         LDR        R0, [SP, #32]
  0x34183F8E:  B1E8         CBZ        R0, .L1                  ; 0x34183FCC
  0x34183F90:  9807         LDR        R0, [SP, #28]
  0x34183F92:  9006         STR        R0, [SP, #24]
  0x34183F94:  9808         LDR        R0, [SP, #32]
  0x34183F96:  9003         STR        R0, [SP, #12]
  0x34183F98:  F7FD FD3E    BL         LL_RCC_PLL1_GetN         ; 0x34181A18
  0x34183F9C:  9004         STR        R0, [SP, #16]
  0x34183F9E:  F7FD FD43    BL         LL_RCC_PLL1_GetFRACN     ; 0x34181A28
  0x34183FA2:  9005         STR        R0, [SP, #20]
  0x34183FA4:  F7FD FD48    BL         LL_RCC_PLL1_GetP1        ; 0x34181A38
  0x34183FA8:  9002         STR        R0, [SP, #8]
  0x34183FAA:  F7FD FD4D    BL         LL_RCC_PLL1_GetP2        ; 0x34181A48
  0x34183FAE:  F8DD C008    LDR.W      R12, [SP, #8]
  0x34183FB2:  9903         LDR        R1, [SP, #12]
  0x34183FB4:  9A04         LDR        R2, [SP, #16]
  0x34183FB6:  9B05         LDR        R3, [SP, #20]
  0x34183FB8:  4604         MOV        R4, R0
  0x34183FBA:  9806         LDR        R0, [SP, #24]
  0x34183FBC:  46EE         MOV        LR, SP
  0x34183FBE:  F8CE 4004    STR.W      R4, [LR, #4]
  0x34183FC2:  F8CE C000    STR.W      R12, [LR]
  0x34183FC6:  F7FD FC03    BL         RCCEx_CalcPLLFreq        ; 0x341817D0
  0x34183FCA:  9009         STR        R0, [SP, #36]

.L1:
  0x34183FCC:  E008         B          46L3                      ; 0x34183FE0

.L2:
  0x34183FCE:  F7FD FD43    BL         LL_RCC_PLL1_IsEnabledBypass.72 ; 0x34181A58
  0x34183FD2:  B128         CBZ        R0, .L3                  ; 0x34183FE0
  0x34183FD4:  F7FD FD10    BL         LL_RCC_PLL1_GetSource.71 ; 0x341819F8
  0x34183FD8:  F7FD FB8C    BL         RCCEx_GetPLLSourceFreq   ; 0x341816F4
  0x34183FDC:  9009         STR        R0, [SP, #36]
  0x34183FDE:  E7FF         B          46L3                      ; 0x34183FE0

.L3:
  0x34183FE0:  9809         LDR        R0, [SP, #36]
  0x34183FE2:  B00A         ADD        SP, SP, #40
  0x34183FE4:  BD10         POP        123R4, PC}

Section .init.ADC1_2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


ADC1_2_IRQHandler:
  0x34183FE6:  E7FE         B          ADC1_2_IRQHandler        ; 0x34183FE6

Section .text.HAL_RCCEx_GetPLL2CLKFreq from blto2_FSBL_lto.o, size=130, align=4


HAL_RCCEx_GetPLL2CLKFreq:
  0x34183FE8:  B510         PUSH       123R4, LR}
  0x34183FEA:  B08A         SUB        SP, SP, #40
  0x34183FEC:  2000         MOVS       R0, #0
  0x34183FEE:  9009         STR        R0, [SP, #36]
  0x34183FF0:  F7FD FCAA    BL         LL_RCC_PLL2_IsReady.67   ; 0x34181948
  0x34183FF4:  B368         CBZ        R0, .L2                  ; 0x34184052
  0x34183FF6:  F7FD FCAF    BL         LL_RCC_PLL2P_IsEnabled   ; 0x34181958
  0x34183FFA:  B348         CBZ        R0, .L1                  ; 0x34184050
  0x34183FFC:  F7FD FCB4    BL         LL_RCC_PLL2_GetSource.68 ; 0x34181968
  0x34184000:  F7FD FB78    BL         RCCEx_GetPLLSourceFreq   ; 0x341816F4
  0x34184004:  9007         STR        R0, [SP, #28]
  0x34184006:  9807         LDR        R0, [SP, #28]
  0x34184008:  B310         CBZ        R0, .L1                  ; 0x34184050
  0x3418400A:  F7FD FCB5    BL         LL_RCC_PLL2_GetM         ; 0x34181978
  0x3418400E:  9008         STR        R0, [SP, #32]
  0x34184010:  9808         LDR        R0, [SP, #32]
  0x34184012:  B1E8         CBZ        R0, .L1                  ; 0x34184050
  0x34184014:  9807         LDR        R0, [SP, #28]
  0x34184016:  9006         STR        R0, [SP, #24]
  0x34184018:  9808         LDR        R0, [SP, #32]
  0x3418401A:  9003         STR        R0, [SP, #12]
  0x3418401C:  F7FD FCB4    BL         LL_RCC_PLL2_GetN         ; 0x34181988
  0x34184020:  9004         STR        R0, [SP, #16]
  0x34184022:  F7FD FCB9    BL         LL_RCC_PLL2_GetFRACN     ; 0x34181998
  0x34184026:  9005         STR        R0, [SP, #20]
  0x34184028:  F7FD FCBE    BL         LL_RCC_PLL2_GetP1        ; 0x341819A8
  0x3418402C:  9002         STR        R0, [SP, #8]
  0x3418402E:  F7FD FCC3    BL         LL_RCC_PLL2_GetP2        ; 0x341819B8
  0x34184032:  F8DD C008    LDR.W      R12, [SP, #8]
  0x34184036:  9903         LDR        R1, [SP, #12]
  0x34184038:  9A04         LDR        R2, [SP, #16]
  0x3418403A:  9B05         LDR        R3, [SP, #20]
  0x3418403C:  4604         MOV        R4, R0
  0x3418403E:  9806         LDR        R0, [SP, #24]
  0x34184040:  46EE         MOV        LR, SP
  0x34184042:  F8CE 4004    STR.W      R4, [LR, #4]
  0x34184046:  F8CE C000    STR.W      R12, [LR]
  0x3418404A:  F7FD FBC1    BL         RCCEx_CalcPLLFreq        ; 0x341817D0
  0x3418404E:  9009         STR        R0, [SP, #36]

.L1:
  0x34184050:  E008         B          46L3                      ; 0x34184064

.L2:
  0x34184052:  F7FD FCB9    BL         LL_RCC_PLL2_IsEnabledBypass.69 ; 0x341819C8
  0x34184056:  B128         CBZ        R0, .L3                  ; 0x34184064
  0x34184058:  F7FD FC86    BL         LL_RCC_PLL2_GetSource.68 ; 0x34181968
  0x3418405C:  F7FD FB4A    BL         RCCEx_GetPLLSourceFreq   ; 0x341816F4
  0x34184060:  9009         STR        R0, [SP, #36]
  0x34184062:  E7FF         B          46L3                      ; 0x34184064

.L3:
  0x34184064:  9809         LDR        R0, [SP, #36]
  0x34184066:  B00A         ADD        SP, SP, #40
  0x34184068:  BD10         POP        123R4, PC}

Section .init.CSI_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


CSI_IRQHandler:
  0x3418406A:  E7FE         B          CSI_IRQHandler           ; 0x3418406A

Section .text.HAL_RCCEx_GetPLL3CLKFreq from blto2_FSBL_lto.o, size=130, align=4


HAL_RCCEx_GetPLL3CLKFreq:
  0x3418406C:  B510         PUSH       123R4, LR}
  0x3418406E:  B08A         SUB        SP, SP, #40
  0x34184070:  2000         MOVS       R0, #0
  0x34184072:  9009         STR        R0, [SP, #36]
  0x34184074:  F7FD FC20    BL         LL_RCC_PLL3_IsReady.64   ; 0x341818B8
  0x34184078:  B368         CBZ        R0, .L2                  ; 0x341840D6
  0x3418407A:  F7FD FC25    BL         LL_RCC_PLL3P_IsEnabled   ; 0x341818C8
  0x3418407E:  B348         CBZ        R0, .L1                  ; 0x341840D4
  0x34184080:  F7FD FC2A    BL         LL_RCC_PLL3_GetSource.65 ; 0x341818D8
  0x34184084:  F7FD FB36    BL         RCCEx_GetPLLSourceFreq   ; 0x341816F4
  0x34184088:  9007         STR        R0, [SP, #28]
  0x3418408A:  9807         LDR        R0, [SP, #28]
  0x3418408C:  B310         CBZ        R0, .L1                  ; 0x341840D4
  0x3418408E:  F7FD FC2B    BL         LL_RCC_PLL3_GetM         ; 0x341818E8
  0x34184092:  9008         STR        R0, [SP, #32]
  0x34184094:  9808         LDR        R0, [SP, #32]
  0x34184096:  B1E8         CBZ        R0, .L1                  ; 0x341840D4
  0x34184098:  9807         LDR        R0, [SP, #28]
  0x3418409A:  9006         STR        R0, [SP, #24]
  0x3418409C:  9808         LDR        R0, [SP, #32]
  0x3418409E:  9003         STR        R0, [SP, #12]
  0x341840A0:  F7FD FC2A    BL         LL_RCC_PLL3_GetN         ; 0x341818F8
  0x341840A4:  9004         STR        R0, [SP, #16]
  0x341840A6:  F7FD FC2F    BL         LL_RCC_PLL3_GetFRACN     ; 0x34181908
  0x341840AA:  9005         STR        R0, [SP, #20]
  0x341840AC:  F7FD FC34    BL         LL_RCC_PLL3_GetP1        ; 0x34181918
  0x341840B0:  9002         STR        R0, [SP, #8]
  0x341840B2:  F7FD FC39    BL         LL_RCC_PLL3_GetP2        ; 0x34181928
  0x341840B6:  F8DD C008    LDR.W      R12, [SP, #8]
  0x341840BA:  9903         LDR        R1, [SP, #12]
  0x341840BC:  9A04         LDR        R2, [SP, #16]
  0x341840BE:  9B05         LDR        R3, [SP, #20]
  0x341840C0:  4604         MOV        R4, R0
  0x341840C2:  9806         LDR        R0, [SP, #24]
  0x341840C4:  46EE         MOV        LR, SP
  0x341840C6:  F8CE 4004    STR.W      R4, [LR, #4]
  0x341840CA:  F8CE C000    STR.W      R12, [LR]
  0x341840CE:  F7FD FB7F    BL         RCCEx_CalcPLLFreq        ; 0x341817D0
  0x341840D2:  9009         STR        R0, [SP, #36]

.L1:
  0x341840D4:  E008         B          46L3                      ; 0x341840E8

.L2:
  0x341840D6:  F7FD FC2F    BL         LL_RCC_PLL3_IsEnabledBypass.66 ; 0x34181938
  0x341840DA:  B128         CBZ        R0, .L3                  ; 0x341840E8
  0x341840DC:  F7FD FBFC    BL         LL_RCC_PLL3_GetSource.65 ; 0x341818D8
  0x341840E0:  F7FD FB08    BL         RCCEx_GetPLLSourceFreq   ; 0x341816F4
  0x341840E4:  9009         STR        R0, [SP, #36]
  0x341840E6:  E7FF         B          46L3                      ; 0x341840E8

.L3:
  0x341840E8:  9809         LDR        R0, [SP, #36]
  0x341840EA:  B00A         ADD        SP, SP, #40
  0x341840EC:  BD10         POP        123R4, PC}

Section .init.DCMIPP_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


DCMIPP_IRQHandler:
  0x341840EE:  E7FE         B          DCMIPP_IRQHandler        ; 0x341840EE

Section .text.HAL_RCCEx_GetPLL4CLKFreq from blto2_FSBL_lto.o, size=130, align=4


HAL_RCCEx_GetPLL4CLKFreq:
  0x341840F0:  B510         PUSH       123R4, LR}
  0x341840F2:  B08A         SUB        SP, SP, #40
  0x341840F4:  2000         MOVS       R0, #0
  0x341840F6:  9009         STR        R0, [SP, #36]
  0x341840F8:  F7FD FAE4    BL         LL_RCC_PLL4_IsReady.57   ; 0x341816C4
  0x341840FC:  B368         CBZ        R0, .L2                  ; 0x3418415A
  0x341840FE:  F7FD FAE9    BL         LL_RCC_PLL4P_IsEnabled   ; 0x341816D4
  0x34184102:  B348         CBZ        R0, .L1                  ; 0x34184158
  0x34184104:  F7FD FAEE    BL         LL_RCC_PLL4_GetSource.58 ; 0x341816E4
  0x34184108:  F7FD FAF4    BL         RCCEx_GetPLLSourceFreq   ; 0x341816F4
  0x3418410C:  9007         STR        R0, [SP, #28]
  0x3418410E:  9807         LDR        R0, [SP, #28]
  0x34184110:  B310         CBZ        R0, .L1                  ; 0x34184158
  0x34184112:  F7FD FB35    BL         LL_RCC_PLL4_GetM         ; 0x34181780
  0x34184116:  9008         STR        R0, [SP, #32]
  0x34184118:  9808         LDR        R0, [SP, #32]
  0x3418411A:  B1E8         CBZ        R0, .L1                  ; 0x34184158
  0x3418411C:  9807         LDR        R0, [SP, #28]
  0x3418411E:  9006         STR        R0, [SP, #24]
  0x34184120:  9808         LDR        R0, [SP, #32]
  0x34184122:  9003         STR        R0, [SP, #12]
  0x34184124:  F7FD FB34    BL         LL_RCC_PLL4_GetN         ; 0x34181790
  0x34184128:  9004         STR        R0, [SP, #16]
  0x3418412A:  F7FD FB39    BL         LL_RCC_PLL4_GetFRACN     ; 0x341817A0
  0x3418412E:  9005         STR        R0, [SP, #20]
  0x34184130:  F7FD FB3E    BL         LL_RCC_PLL4_GetP1        ; 0x341817B0
  0x34184134:  9002         STR        R0, [SP, #8]
  0x34184136:  F7FD FB43    BL         LL_RCC_PLL4_GetP2        ; 0x341817C0
  0x3418413A:  F8DD C008    LDR.W      R12, [SP, #8]
  0x3418413E:  9903         LDR        R1, [SP, #12]
  0x34184140:  9A04         LDR        R2, [SP, #16]
  0x34184142:  9B05         LDR        R3, [SP, #20]
  0x34184144:  4604         MOV        R4, R0
  0x34184146:  9806         LDR        R0, [SP, #24]
  0x34184148:  46EE         MOV        LR, SP
  0x3418414A:  F8CE 4004    STR.W      R4, [LR, #4]
  0x3418414E:  F8CE C000    STR.W      R12, [LR]
  0x34184152:  F7FD FB3D    BL         RCCEx_CalcPLLFreq        ; 0x341817D0
  0x34184156:  9009         STR        R0, [SP, #36]

.L1:
  0x34184158:  E008         B          46L3                      ; 0x3418416C

.L2:
  0x3418415A:  F7FD FB7D    BL         LL_RCC_PLL4_IsEnabledBypass.59 ; 0x34181858
  0x3418415E:  B128         CBZ        R0, .L3                  ; 0x3418416C
  0x34184160:  F7FD FAC0    BL         LL_RCC_PLL4_GetSource.58 ; 0x341816E4
  0x34184164:  F7FD FAC6    BL         RCCEx_GetPLLSourceFreq   ; 0x341816F4
  0x34184168:  9009         STR        R0, [SP, #36]
  0x3418416A:  E7FF         B          46L3                      ; 0x3418416C

.L3:
  0x3418416C:  9809         LDR        R0, [SP, #36]
  0x3418416E:  B00A         ADD        SP, SP, #40
  0x34184170:  BD10         POP        123R4, PC}

Section .init.PAHB_ERR_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


PAHB_ERR_IRQHandler:
  0x34184172:  E7FE         B          PAHB_ERR_IRQHandler      ; 0x34184172

Section .init.NPU0_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


NPU0_IRQHandler:
  0x34184174:  E7FE         B          NPU0_IRQHandler          ; 0x34184174

Section .init.NPU1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


NPU1_IRQHandler:
  0x34184176:  E7FE         B          NPU1_IRQHandler          ; 0x34184176

Section .init.NPU2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


NPU2_IRQHandler:
  0x34184178:  E7FE         B          NPU2_IRQHandler          ; 0x34184178

Section .init.NPU3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


NPU3_IRQHandler:
  0x3418417A:  E7FE         B          NPU3_IRQHandler          ; 0x3418417A

Section .init.CACHEAXI_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


CACHEAXI_IRQHandler:
  0x3418417C:  E7FE         B          CACHEAXI_IRQHandler      ; 0x3418417C

Section .init.LTDC_LO_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


LTDC_LO_IRQHandler:
  0x3418417E:  E7FE         B          LTDC_LO_IRQHandler       ; 0x3418417E

Section .init.LTDC_LO_ERR_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


LTDC_LO_ERR_IRQHandler:
  0x34184180:  E7FE         B          LTDC_LO_ERR_IRQHandler   ; 0x34184180

Section .init.DMA2D_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


DMA2D_IRQHandler:
  0x34184182:  E7FE         B          DMA2D_IRQHandler         ; 0x34184182

Section .init.JPEG_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


JPEG_IRQHandler:
  0x34184184:  E7FE         B          JPEG_IRQHandler          ; 0x34184184

Section .init.VENC_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


VENC_IRQHandler:
  0x34184186:  E7FE         B          VENC_IRQHandler          ; 0x34184186

Section .init.GFXMMU_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GFXMMU_IRQHandler:
  0x34184188:  E7FE         B          GFXMMU_IRQHandler        ; 0x34184188

Section .init.GFXTIM_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GFXTIM_IRQHandler:
  0x3418418A:  E7FE         B          GFXTIM_IRQHandler        ; 0x3418418A

Section .init.GPU2D_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPU2D_IRQHandler:
  0x3418418C:  E7FE         B          GPU2D_IRQHandler         ; 0x3418418C

Section .init.GPU2D_ER_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPU2D_ER_IRQHandler:
  0x3418418E:  E7FE         B          GPU2D_ER_IRQHandler      ; 0x3418418E

Section .init.ICACHE_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


ICACHE_IRQHandler:
  0x34184190:  E7FE         B          ICACHE_IRQHandler        ; 0x34184190

Section .init.HPDMA1_Channel0_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel0_IRQHandler:
  0x34184192:  E7FE         B          HPDMA1_Channel0_IRQHandler ; 0x34184192

Section .init.HPDMA1_Channel1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel1_IRQHandler:
  0x34184194:  E7FE         B          HPDMA1_Channel1_IRQHandler ; 0x34184194

Section .init.HPDMA1_Channel2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel2_IRQHandler:
  0x34184196:  E7FE         B          HPDMA1_Channel2_IRQHandler ; 0x34184196

Section .init.HPDMA1_Channel3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel3_IRQHandler:
  0x34184198:  E7FE         B          HPDMA1_Channel3_IRQHandler ; 0x34184198

Section .init.HPDMA1_Channel4_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel4_IRQHandler:
  0x3418419A:  E7FE         B          HPDMA1_Channel4_IRQHandler ; 0x3418419A

Section .init.HPDMA1_Channel5_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel5_IRQHandler:
  0x3418419C:  E7FE         B          HPDMA1_Channel5_IRQHandler ; 0x3418419C

Section .init.HPDMA1_Channel6_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel6_IRQHandler:
  0x3418419E:  E7FE         B          HPDMA1_Channel6_IRQHandler ; 0x3418419E

Section .init.HPDMA1_Channel7_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel7_IRQHandler:
  0x341841A0:  E7FE         B          HPDMA1_Channel7_IRQHandler ; 0x341841A0

Section .init.HPDMA1_Channel8_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel8_IRQHandler:
  0x341841A2:  E7FE         B          HPDMA1_Channel8_IRQHandler ; 0x341841A2

Section .init.HPDMA1_Channel9_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel9_IRQHandler:
  0x341841A4:  E7FE         B          HPDMA1_Channel9_IRQHandler ; 0x341841A4

Section .init.HPDMA1_Channel10_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel10_IRQHandler:
  0x341841A6:  E7FE         B          HPDMA1_Channel10_IRQHandler ; 0x341841A6

Section .init.HPDMA1_Channel11_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel11_IRQHandler:
  0x341841A8:  E7FE         B          HPDMA1_Channel11_IRQHandler ; 0x341841A8

Section .init.HPDMA1_Channel12_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel12_IRQHandler:
  0x341841AA:  E7FE         B          HPDMA1_Channel12_IRQHandler ; 0x341841AA

Section .init.HPDMA1_Channel13_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel13_IRQHandler:
  0x341841AC:  E7FE         B          HPDMA1_Channel13_IRQHandler ; 0x341841AC

Section .init.HPDMA1_Channel14_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel14_IRQHandler:
  0x341841AE:  E7FE         B          HPDMA1_Channel14_IRQHandler ; 0x341841AE

Section .init.HPDMA1_Channel15_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


HPDMA1_Channel15_IRQHandler:
  0x341841B0:  E7FE         B          HPDMA1_Channel15_IRQHandler ; 0x341841B0

Section .init.GPDMA1_Channel0_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel0_IRQHandler:
  0x341841B2:  E7FE         B          GPDMA1_Channel0_IRQHandler ; 0x341841B2

Section .init.GPDMA1_Channel1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel1_IRQHandler:
  0x341841B4:  E7FE         B          GPDMA1_Channel1_IRQHandler ; 0x341841B4

Section .init.GPDMA1_Channel2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel2_IRQHandler:
  0x341841B6:  E7FE         B          GPDMA1_Channel2_IRQHandler ; 0x341841B6

Section .init.GPDMA1_Channel3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel3_IRQHandler:
  0x341841B8:  E7FE         B          GPDMA1_Channel3_IRQHandler ; 0x341841B8

Section .init.GPDMA1_Channel4_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel4_IRQHandler:
  0x341841BA:  E7FE         B          GPDMA1_Channel4_IRQHandler ; 0x341841BA

Section .init.GPDMA1_Channel5_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel5_IRQHandler:
  0x341841BC:  E7FE         B          GPDMA1_Channel5_IRQHandler ; 0x341841BC

Section .init.GPDMA1_Channel6_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel6_IRQHandler:
  0x341841BE:  E7FE         B          GPDMA1_Channel6_IRQHandler ; 0x341841BE

Section .init.GPDMA1_Channel7_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel7_IRQHandler:
  0x341841C0:  E7FE         B          GPDMA1_Channel7_IRQHandler ; 0x341841C0

Section .init.GPDMA1_Channel8_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel8_IRQHandler:
  0x341841C2:  E7FE         B          GPDMA1_Channel8_IRQHandler ; 0x341841C2

Section .init.GPDMA1_Channel9_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel9_IRQHandler:
  0x341841C4:  E7FE         B          GPDMA1_Channel9_IRQHandler ; 0x341841C4

Section .init.GPDMA1_Channel10_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel10_IRQHandler:
  0x341841C6:  E7FE         B          GPDMA1_Channel10_IRQHandler ; 0x341841C6

Section .init.GPDMA1_Channel11_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel11_IRQHandler:
  0x341841C8:  E7FE         B          GPDMA1_Channel11_IRQHandler ; 0x341841C8

Section .init.GPDMA1_Channel12_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel12_IRQHandler:
  0x341841CA:  E7FE         B          GPDMA1_Channel12_IRQHandler ; 0x341841CA

Section .init.GPDMA1_Channel13_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel13_IRQHandler:
  0x341841CC:  E7FE         B          GPDMA1_Channel13_IRQHandler ; 0x341841CC

Section .init.GPDMA1_Channel14_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel14_IRQHandler:
  0x341841CE:  E7FE         B          GPDMA1_Channel14_IRQHandler ; 0x341841CE

Section .init.GPDMA1_Channel15_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


GPDMA1_Channel15_IRQHandler:
  0x341841D0:  E7FE         B          GPDMA1_Channel15_IRQHandler ; 0x341841D0

Section .init.I2C1_EV_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


I2C1_EV_IRQHandler:
  0x341841D2:  E7FE         B          I2C1_EV_IRQHandler       ; 0x341841D2

Section .init.I2C1_ER_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


I2C1_ER_IRQHandler:
  0x341841D4:  E7FE         B          I2C1_ER_IRQHandler       ; 0x341841D4

Section .init.I2C2_EV_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


I2C2_EV_IRQHandler:
  0x341841D6:  E7FE         B          I2C2_EV_IRQHandler       ; 0x341841D6

Section .init.I2C2_ER_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


I2C2_ER_IRQHandler:
  0x341841D8:  E7FE         B          I2C2_ER_IRQHandler       ; 0x341841D8

Section .init.I2C3_EV_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


I2C3_EV_IRQHandler:
  0x341841DA:  E7FE         B          I2C3_EV_IRQHandler       ; 0x341841DA

Section .init.I2C3_ER_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


I2C3_ER_IRQHandler:
  0x341841DC:  E7FE         B          I2C3_ER_IRQHandler       ; 0x341841DC

Section .init.I2C4_EV_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


I2C4_EV_IRQHandler:
  0x341841DE:  E7FE         B          I2C4_EV_IRQHandler       ; 0x341841DE

Section .init.I2C4_ER_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


I2C4_ER_IRQHandler:
  0x341841E0:  E7FE         B          I2C4_ER_IRQHandler       ; 0x341841E0

Section .init.I3C1_EV_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


I3C1_EV_IRQHandler:
  0x341841E2:  E7FE         B          I3C1_EV_IRQHandler       ; 0x341841E2

Section .init.I3C1_ER_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


I3C1_ER_IRQHandler:
  0x341841E4:  E7FE         B          I3C1_ER_IRQHandler       ; 0x341841E4

Section .init.I3C2_EV_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


I3C2_EV_IRQHandler:
  0x341841E6:  E7FE         B          I3C2_EV_IRQHandler       ; 0x341841E6

Section .init.I3C2_ER_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


I3C2_ER_IRQHandler:
  0x341841E8:  E7FE         B          I3C2_ER_IRQHandler       ; 0x341841E8

Section .init.TIM1_BRK_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM1_BRK_IRQHandler:
  0x341841EA:  E7FE         B          TIM1_BRK_IRQHandler      ; 0x341841EA

Section .init.TIM1_UP_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM1_UP_IRQHandler:
  0x341841EC:  E7FE         B          TIM1_UP_IRQHandler       ; 0x341841EC

Section .init.TIM1_TRG_CCU_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM1_TRG_CCU_IRQHandler:
  0x341841EE:  E7FE         B          TIM1_TRG_CCU_IRQHandler  ; 0x341841EE

Section .init.TIM1_CC_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM1_CC_IRQHandler:
  0x341841F0:  E7FE         B          TIM1_CC_IRQHandler       ; 0x341841F0

Section .init.TIM2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM2_IRQHandler:
  0x341841F2:  E7FE         B          TIM2_IRQHandler          ; 0x341841F2

Section .init.TIM3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM3_IRQHandler:
  0x341841F4:  E7FE         B          TIM3_IRQHandler          ; 0x341841F4

Section .init.TIM4_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM4_IRQHandler:
  0x341841F6:  E7FE         B          TIM4_IRQHandler          ; 0x341841F6

Section .init.TIM5_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM5_IRQHandler:
  0x341841F8:  E7FE         B          TIM5_IRQHandler          ; 0x341841F8

Section .init.TIM6_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM6_IRQHandler:
  0x341841FA:  E7FE         B          TIM6_IRQHandler          ; 0x341841FA

Section .init.TIM7_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM7_IRQHandler:
  0x341841FC:  E7FE         B          TIM7_IRQHandler          ; 0x341841FC

Section .init.TIM8_BRK_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM8_BRK_IRQHandler:
  0x341841FE:  E7FE         B          TIM8_BRK_IRQHandler      ; 0x341841FE

Section .init.TIM8_UP_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM8_UP_IRQHandler:
  0x34184200:  E7FE         B          TIM8_UP_IRQHandler       ; 0x34184200

Section .init.TIM8_TRG_CCU_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM8_TRG_CCU_IRQHandler:
  0x34184202:  E7FE         B          TIM8_TRG_CCU_IRQHandler  ; 0x34184202

Section .init.TIM8_CC_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM8_CC_IRQHandler:
  0x34184204:  E7FE         B          TIM8_CC_IRQHandler       ; 0x34184204

Section .init.TIM9_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM9_IRQHandler:
  0x34184206:  E7FE         B          TIM9_IRQHandler          ; 0x34184206

Section .init.TIM10_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM10_IRQHandler:
  0x34184208:  E7FE         B          TIM10_IRQHandler         ; 0x34184208

Section .init.TIM11_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM11_IRQHandler:
  0x3418420A:  E7FE         B          TIM11_IRQHandler         ; 0x3418420A

Section .init.TIM12_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM12_IRQHandler:
  0x3418420C:  E7FE         B          TIM12_IRQHandler         ; 0x3418420C

Section .init.TIM13_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM13_IRQHandler:
  0x3418420E:  E7FE         B          TIM13_IRQHandler         ; 0x3418420E

Section .init.TIM14_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM14_IRQHandler:
  0x34184210:  E7FE         B          TIM14_IRQHandler         ; 0x34184210

Section .init.TIM15_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM15_IRQHandler:
  0x34184212:  E7FE         B          TIM15_IRQHandler         ; 0x34184212

Section .init.TIM16_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM16_IRQHandler:
  0x34184214:  E7FE         B          TIM16_IRQHandler         ; 0x34184214

Section .init.TIM17_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM17_IRQHandler:
  0x34184216:  E7FE         B          TIM17_IRQHandler         ; 0x34184216

Section .init.TIM18_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


TIM18_IRQHandler:
  0x34184218:  E7FE         B          TIM18_IRQHandler         ; 0x34184218

Section .init.LPTIM1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


LPTIM1_IRQHandler:
  0x3418421A:  E7FE         B          LPTIM1_IRQHandler        ; 0x3418421A

Section .init.LPTIM2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


LPTIM2_IRQHandler:
  0x3418421C:  E7FE         B          LPTIM2_IRQHandler        ; 0x3418421C

Section .init.LPTIM3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


LPTIM3_IRQHandler:
  0x3418421E:  E7FE         B          LPTIM3_IRQHandler        ; 0x3418421E

Section .init.LPTIM4_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


LPTIM4_IRQHandler:
  0x34184220:  E7FE         B          LPTIM4_IRQHandler        ; 0x34184220

Section .init.LPTIM5_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


LPTIM5_IRQHandler:
  0x34184222:  E7FE         B          LPTIM5_IRQHandler        ; 0x34184222

Section .init.ADF1_FLT0_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


ADF1_FLT0_IRQHandler:
  0x34184224:  E7FE         B          ADF1_FLT0_IRQHandler     ; 0x34184224

Section .init.MDF1_FLT0_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


MDF1_FLT0_IRQHandler:
  0x34184226:  E7FE         B          MDF1_FLT0_IRQHandler     ; 0x34184226

Section .init.MDF1_FLT1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


MDF1_FLT1_IRQHandler:
  0x34184228:  E7FE         B          MDF1_FLT1_IRQHandler     ; 0x34184228

Section .init.MDF1_FLT2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


MDF1_FLT2_IRQHandler:
  0x3418422A:  E7FE         B          MDF1_FLT2_IRQHandler     ; 0x3418422A

Section .init.MDF1_FLT3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


MDF1_FLT3_IRQHandler:
  0x3418422C:  E7FE         B          MDF1_FLT3_IRQHandler     ; 0x3418422C

Section .init.MDF1_FLT4_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


MDF1_FLT4_IRQHandler:
  0x3418422E:  E7FE         B          MDF1_FLT4_IRQHandler     ; 0x3418422E

Section .init.MDF1_FLT5_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


MDF1_FLT5_IRQHandler:
  0x34184230:  E7FE         B          MDF1_FLT5_IRQHandler     ; 0x34184230

Section .init.SAI1_A_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SAI1_A_IRQHandler:
  0x34184232:  E7FE         B          SAI1_A_IRQHandler        ; 0x34184232

Section .init.SAI1_B_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SAI1_B_IRQHandler:
  0x34184234:  E7FE         B          SAI1_B_IRQHandler        ; 0x34184234

Section .init.SAI2_A_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SAI2_A_IRQHandler:
  0x34184236:  E7FE         B          SAI2_A_IRQHandler        ; 0x34184236

Section .init.SAI2_B_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SAI2_B_IRQHandler:
  0x34184238:  E7FE         B          SAI2_B_IRQHandler        ; 0x34184238

Section .init.SPDIFRX_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SPDIFRX_IRQHandler:
  0x3418423A:  E7FE         B          SPDIFRX_IRQHandler       ; 0x3418423A

Section .init.SPI1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SPI1_IRQHandler:
  0x3418423C:  E7FE         B          SPI1_IRQHandler          ; 0x3418423C

Section .init.SPI2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SPI2_IRQHandler:
  0x3418423E:  E7FE         B          SPI2_IRQHandler          ; 0x3418423E

Section .init.SPI3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SPI3_IRQHandler:
  0x34184240:  E7FE         B          SPI3_IRQHandler          ; 0x34184240

Section .init.SPI4_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SPI4_IRQHandler:
  0x34184242:  E7FE         B          SPI4_IRQHandler          ; 0x34184242

Section .init.SPI5_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SPI5_IRQHandler:
  0x34184244:  E7FE         B          SPI5_IRQHandler          ; 0x34184244

Section .init.SPI6_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SPI6_IRQHandler:
  0x34184246:  E7FE         B          SPI6_IRQHandler          ; 0x34184246

Section .init.USART1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


USART1_IRQHandler:
  0x34184248:  E7FE         B          USART1_IRQHandler        ; 0x34184248

Section .init.USART2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


USART2_IRQHandler:
  0x3418424A:  E7FE         B          USART2_IRQHandler        ; 0x3418424A

Section .init.USART3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


USART3_IRQHandler:
  0x3418424C:  E7FE         B          USART3_IRQHandler        ; 0x3418424C

Section .init.UART4_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


UART4_IRQHandler:
  0x3418424E:  E7FE         B          UART4_IRQHandler         ; 0x3418424E

Section .init.UART5_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


UART5_IRQHandler:
  0x34184250:  E7FE         B          UART5_IRQHandler         ; 0x34184250

Section .init.USART6_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


USART6_IRQHandler:
  0x34184252:  E7FE         B          USART6_IRQHandler        ; 0x34184252

Section .init.UART7_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


UART7_IRQHandler:
  0x34184254:  E7FE         B          UART7_IRQHandler         ; 0x34184254

Section .init.UART8_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


UART8_IRQHandler:
  0x34184256:  E7FE         B          UART8_IRQHandler         ; 0x34184256

Section .init.UART9_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


UART9_IRQHandler:
  0x34184258:  E7FE         B          UART9_IRQHandler         ; 0x34184258

Section .init.USART10_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


USART10_IRQHandler:
  0x3418425A:  E7FE         B          USART10_IRQHandler       ; 0x3418425A

Section .init.LPUART1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


LPUART1_IRQHandler:
  0x3418425C:  E7FE         B          LPUART1_IRQHandler       ; 0x3418425C

Section .init.XSPI1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


XSPI1_IRQHandler:
  0x3418425E:  E7FE         B          XSPI1_IRQHandler         ; 0x3418425E

Section .init.XSPI2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


XSPI2_IRQHandler:
  0x34184260:  E7FE         B          XSPI2_IRQHandler         ; 0x34184260

Section .init.XSPI3_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


XSPI3_IRQHandler:
  0x34184262:  E7FE         B          XSPI3_IRQHandler         ; 0x34184262

Section .init.FMC_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


FMC_IRQHandler:
  0x34184264:  E7FE         B          FMC_IRQHandler           ; 0x34184264

Section .init.SDMMC1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SDMMC1_IRQHandler:
  0x34184266:  E7FE         B          SDMMC1_IRQHandler        ; 0x34184266

Section .init.SDMMC2_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


SDMMC2_IRQHandler:
  0x34184268:  E7FE         B          SDMMC2_IRQHandler        ; 0x34184268

Section .init.UCPD1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


UCPD1_IRQHandler:
  0x3418426A:  E7FE         B          UCPD1_IRQHandler         ; 0x3418426A

Section .init.USB1_OTG_HS_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


USB1_OTG_HS_IRQHandler:
  0x3418426C:  E7FE         B          USB1_OTG_HS_IRQHandler   ; 0x3418426C

Section .init.USB2_OTG_HS_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


USB2_OTG_HS_IRQHandler:
  0x3418426E:  E7FE         B          USB2_OTG_HS_IRQHandler   ; 0x3418426E

Section .init.ETH1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


ETH1_IRQHandler:
  0x34184270:  E7FE         B          ETH1_IRQHandler          ; 0x34184270

Section .init.FDCAN1_IT0_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


FDCAN1_IT0_IRQHandler:
  0x34184272:  E7FE         B          FDCAN1_IT0_IRQHandler    ; 0x34184272

Section .init.FDCAN1_IT1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


FDCAN1_IT1_IRQHandler:
  0x34184274:  E7FE         B          FDCAN1_IT1_IRQHandler    ; 0x34184274

Section .init.FDCAN2_IT0_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


FDCAN2_IT0_IRQHandler:
  0x34184276:  E7FE         B          FDCAN2_IT0_IRQHandler    ; 0x34184276

Section .init.FDCAN2_IT1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


FDCAN2_IT1_IRQHandler:
  0x34184278:  E7FE         B          FDCAN2_IT1_IRQHandler    ; 0x34184278

Section .init.FDCAN3_IT0_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


FDCAN3_IT0_IRQHandler:
  0x3418427A:  E7FE         B          FDCAN3_IT0_IRQHandler    ; 0x3418427A

Section .init.FDCAN3_IT1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


FDCAN3_IT1_IRQHandler:
  0x3418427C:  E7FE         B          FDCAN3_IT1_IRQHandler    ; 0x3418427C

Section .init.FDCAN_CU_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


FDCAN_CU_IRQHandler:
  0x3418427E:  E7FE         B          FDCAN_CU_IRQHandler      ; 0x3418427E

Section .init.MDIOS_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


MDIOS_IRQHandler:
  0x34184280:  E7FE         B          MDIOS_IRQHandler         ; 0x34184280

Section .init.DCMI_PSSI_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


DCMI_PSSI_IRQHandler:
  0x34184282:  E7FE         B          DCMI_PSSI_IRQHandler     ; 0x34184282

Section .init.WAKEUP_PIN_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


WAKEUP_PIN_IRQHandler:
  0x34184284:  E7FE         B          WAKEUP_PIN_IRQHandler    ; 0x34184284

Section .init.CTI_INT0_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


CTI_INT0_IRQHandler:
  0x34184286:  E7FE         B          CTI_INT0_IRQHandler      ; 0x34184286

Section .init.CTI_INT1_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


CTI_INT1_IRQHandler:
  0x34184288:  E7FE         B          CTI_INT1_IRQHandler      ; 0x34184288

Section .init.LTDC_UP_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


LTDC_UP_IRQHandler:
  0x3418428A:  E7FE         B          LTDC_UP_IRQHandler       ; 0x3418428A

Section .init.LTDC_UP_ERR_IRQHandler from stm32n657xx_Vectors.o, size=2, align=2


LTDC_UP_ERR_IRQHandler:
  0x3418428C:  E7FE         B          LTDC_UP_ERR_IRQHandler   ; 0x3418428C

Section .rodata..L.str.20 from blto2_FSBL_lto.o, size=106, align=1

  0x3418428E:  44           DC.B       0x44                     ; 'D'
  0x3418428F:  3A           DC.B       0x3A                     ; ':'
  0x34184290:  5C           DC.B       0x5C                     ; '\\'
  0x34184291:  50           DC.B       0x50                     ; 'P'
  0x34184292:  72           DC.B       0x72                     ; 'r'
  0x34184293:  6F           DC.B       0x6F                     ; 'o'
  0x34184294:  6A           DC.B       0x6A                     ; 'j'
  0x34184295:  65           DC.B       0x65                     ; 'e'
  0x34184296:  6B           DC.B       0x6B                     ; 'k'
  0x34184297:  74           DC.B       0x74                     ; 't'
  0x34184298:  65           DC.B       0x65                     ; 'e'
  0x34184299:  5C           DC.B       0x5C                     ; '\\'
  0x3418429A:  68           DC.B       0x68                     ; 'h'
  0x3418429B:  61           DC.B       0x61                     ; 'a'
  0x3418429C:  64           DC.B       0x64                     ; 'd'
  0x3418429D:  65           DC.B       0x65                     ; 'e'
  0x3418429E:  77           DC.B       0x77                     ; 'w'
  0x3418429F:  65           DC.B       0x65                     ; 'e'
  0x341842A0:  5F           DC.B       0x5F                     ; '_'
  0x341842A1:  62           DC.B       0x62                     ; 'b'
  0x341842A2:  6C           DC.B       0x6C                     ; 'l'
  0x341842A3:  74           DC.B       0x74                     ; 't'
  0x341842A4:  6F           DC.B       0x6F                     ; 'o'
  0x341842A5:  32           DC.B       0x32                     ; '2'
  0x341842A6:  5C           DC.B       0x5C                     ; '\\'
  0x341842A7:  74           DC.B       0x74                     ; 't'
  0x341842A8:  72           DC.B       0x72                     ; 'r'
  0x341842A9:  75           DC.B       0x75                     ; 'u'
  0x341842AA:  6E           DC.B       0x6E                     ; 'n'
  0x341842AB:  6B           DC.B       0x6B                     ; 'k'
  0x341842AC:  5C           DC.B       0x5C                     ; '\\'
  0x341842AD:  66           DC.B       0x66                     ; 'f'
  0x341842AE:  69           DC.B       0x69                     ; 'i'
  0x341842AF:  72           DC.B       0x72                     ; 'r'
  0x341842B0:  6D           DC.B       0x6D                     ; 'm'
  0x341842B1:  77           DC.B       0x77                     ; 'w'
  0x341842B2:  61           DC.B       0x61                     ; 'a'
  0x341842B3:  72           DC.B       0x72                     ; 'r'
  0x341842B4:  65           DC.B       0x65                     ; 'e'
  0x341842B5:  5C           DC.B       0x5C                     ; '\\'
  0x341842B6:  46           DC.B       0x46                     ; 'F'
  0x341842B7:  53           DC.B       0x53                     ; 'S'
  0x341842B8:  42           DC.B       0x42                     ; 'B'
  0x341842B9:  4C           DC.B       0x4C                     ; 'L'
  0x341842BA:  5C           DC.B       0x5C                     ; '\\'
  0x341842BB:  43           DC.B       0x43                     ; 'C'
  0x341842BC:  75           DC.B       0x75                     ; 'u'
  0x341842BD:  62           DC.B       0x62                     ; 'b'
  0x341842BE:  65           DC.B       0x65                     ; 'e'
  0x341842BF:  4D           DC.B       0x4D                     ; 'M'
  0x341842C0:  58           DC.B       0x58                     ; 'X'
  0x341842C1:  5C           DC.B       0x5C                     ; '\\'
  0x341842C2:  44           DC.B       0x44                     ; 'D'
  0x341842C3:  72           DC.B       0x72                     ; 'r'
  0x341842C4:  69           DC.B       0x69                     ; 'i'
  0x341842C5:  76           DC.B       0x76                     ; 'v'
  0x341842C6:  65           DC.B       0x65                     ; 'e'
  0x341842C7:  72           DC.B       0x72                     ; 'r'
  0x341842C8:  73           DC.B       0x73                     ; 's'
  0x341842C9:  5C           DC.B       0x5C                     ; '\\'
  0x341842CA:  53           DC.B       0x53                     ; 'S'
  0x341842CB:  54           DC.B       0x54                     ; 'T'
  0x341842CC:  4D           DC.B       0x4D                     ; 'M'
  0x341842CD:  33           DC.B       0x33                     ; '3'
  0x341842CE:  32           DC.B       0x32                     ; '2'
  0x341842CF:  4E           DC.B       0x4E                     ; 'N'
  0x341842D0:  36           DC.B       0x36                     ; '6'
  0x341842D1:  78           DC.B       0x78                     ; 'x'
  0x341842D2:  78           DC.B       0x78                     ; 'x'
  0x341842D3:  5F           DC.B       0x5F                     ; '_'
  0x341842D4:  48           DC.B       0x48                     ; 'H'
  0x341842D5:  41           DC.B       0x41                     ; 'A'
  0x341842D6:  4C           DC.B       0x4C                     ; 'L'
  0x341842D7:  5F           DC.B       0x5F                     ; '_'
  0x341842D8:  44           DC.B       0x44                     ; 'D'
  0x341842D9:  72           DC.B       0x72                     ; 'r'
  0x341842DA:  69           DC.B       0x69                     ; 'i'
  0x341842DB:  76           DC.B       0x76                     ; 'v'
  0x341842DC:  65           DC.B       0x65                     ; 'e'
  0x341842DD:  72           DC.B       0x72                     ; 'r'
  0x341842DE:  5C           DC.B       0x5C                     ; '\\'
  0x341842DF:  53           DC.B       0x53                     ; 'S'
  0x341842E0:  72           DC.B       0x72                     ; 'r'
  0x341842E1:  63           DC.B       0x63                     ; 'c'
  0x341842E2:  5C           DC.B       0x5C                     ; '\\'
  0x341842E3:  73           DC.B       0x73                     ; 's'
  0x341842E4:  74           DC.B       0x74                     ; 't'
  0x341842E5:  6D           DC.B       0x6D                     ; 'm'
  0x341842E6:  33           DC.B       0x33                     ; '3'
  0x341842E7:  32           DC.B       0x32                     ; '2'
  0x341842E8:  6E           DC.B       0x6E                     ; 'n'
  0x341842E9:  36           DC.B       0x36                     ; '6'
  0x341842EA:  78           DC.B       0x78                     ; 'x'
  0x341842EB:  78           DC.B       0x78                     ; 'x'
  0x341842EC:  5F           DC.B       0x5F                     ; '_'
  0x341842ED:  68           DC.B       0x68                     ; 'h'
  0x341842EE:  61           DC.B       0x61                     ; 'a'
  0x341842EF:  6C           DC.B       0x6C                     ; 'l'
  0x341842F0:  5F           DC.B       0x5F                     ; '_'
  0x341842F1:  67           DC.B       0x67                     ; 'g'
  0x341842F2:  70           DC.B       0x70                     ; 'p'
  0x341842F3:  69           DC.B       0x69                     ; 'i'
  0x341842F4:  6F           DC.B       0x6F                     ; 'o'
  0x341842F5:  2E           DC.B       0x2E                     ; '.'
  0x341842F6:  63           DC.B       0x63                     ; 'c'
  0x341842F7:  00           DC.B       0x00                     ; '\0'

Section .rodata..L.str.35 from blto2_FSBL_lto.o, size=105, align=1

  0x341842F8:  44           DC.B       0x44                     ; 'D'
  0x341842F9:  3A           DC.B       0x3A                     ; ':'
  0x341842FA:  5C           DC.B       0x5C                     ; '\\'
  0x341842FB:  50           DC.B       0x50                     ; 'P'
  0x341842FC:  72           DC.B       0x72                     ; 'r'
  0x341842FD:  6F           DC.B       0x6F                     ; 'o'
  0x341842FE:  6A           DC.B       0x6A                     ; 'j'
  0x341842FF:  65           DC.B       0x65                     ; 'e'
  0x34184300:  6B           DC.B       0x6B                     ; 'k'
  0x34184301:  74           DC.B       0x74                     ; 't'
  0x34184302:  65           DC.B       0x65                     ; 'e'
  0x34184303:  5C           DC.B       0x5C                     ; '\\'
  0x34184304:  68           DC.B       0x68                     ; 'h'
  0x34184305:  61           DC.B       0x61                     ; 'a'
  0x34184306:  64           DC.B       0x64                     ; 'd'
  0x34184307:  65           DC.B       0x65                     ; 'e'
  0x34184308:  77           DC.B       0x77                     ; 'w'
  0x34184309:  65           DC.B       0x65                     ; 'e'
  0x3418430A:  5F           DC.B       0x5F                     ; '_'
  0x3418430B:  62           DC.B       0x62                     ; 'b'
  0x3418430C:  6C           DC.B       0x6C                     ; 'l'
  0x3418430D:  74           DC.B       0x74                     ; 't'
  0x3418430E:  6F           DC.B       0x6F                     ; 'o'
  0x3418430F:  32           DC.B       0x32                     ; '2'
  0x34184310:  5C           DC.B       0x5C                     ; '\\'
  0x34184311:  74           DC.B       0x74                     ; 't'
  0x34184312:  72           DC.B       0x72                     ; 'r'
  0x34184313:  75           DC.B       0x75                     ; 'u'
  0x34184314:  6E           DC.B       0x6E                     ; 'n'
  0x34184315:  6B           DC.B       0x6B                     ; 'k'
  0x34184316:  5C           DC.B       0x5C                     ; '\\'
  0x34184317:  66           DC.B       0x66                     ; 'f'
  0x34184318:  69           DC.B       0x69                     ; 'i'
  0x34184319:  72           DC.B       0x72                     ; 'r'
  0x3418431A:  6D           DC.B       0x6D                     ; 'm'
  0x3418431B:  77           DC.B       0x77                     ; 'w'
  0x3418431C:  61           DC.B       0x61                     ; 'a'
  0x3418431D:  72           DC.B       0x72                     ; 'r'
  0x3418431E:  65           DC.B       0x65                     ; 'e'
  0x3418431F:  5C           DC.B       0x5C                     ; '\\'
  0x34184320:  46           DC.B       0x46                     ; 'F'
  0x34184321:  53           DC.B       0x53                     ; 'S'
  0x34184322:  42           DC.B       0x42                     ; 'B'
  0x34184323:  4C           DC.B       0x4C                     ; 'L'
  0x34184324:  5C           DC.B       0x5C                     ; '\\'
  0x34184325:  43           DC.B       0x43                     ; 'C'
  0x34184326:  75           DC.B       0x75                     ; 'u'
  0x34184327:  62           DC.B       0x62                     ; 'b'
  0x34184328:  65           DC.B       0x65                     ; 'e'
  0x34184329:  4D           DC.B       0x4D                     ; 'M'
  0x3418432A:  58           DC.B       0x58                     ; 'X'
  0x3418432B:  5C           DC.B       0x5C                     ; '\\'
  0x3418432C:  44           DC.B       0x44                     ; 'D'
  0x3418432D:  72           DC.B       0x72                     ; 'r'
  0x3418432E:  69           DC.B       0x69                     ; 'i'
  0x3418432F:  76           DC.B       0x76                     ; 'v'
  0x34184330:  65           DC.B       0x65                     ; 'e'
  0x34184331:  72           DC.B       0x72                     ; 'r'
  0x34184332:  73           DC.B       0x73                     ; 's'
  0x34184333:  5C           DC.B       0x5C                     ; '\\'
  0x34184334:  53           DC.B       0x53                     ; 'S'
  0x34184335:  54           DC.B       0x54                     ; 'T'
  0x34184336:  4D           DC.B       0x4D                     ; 'M'
  0x34184337:  33           DC.B       0x33                     ; '3'
  0x34184338:  32           DC.B       0x32                     ; '2'
  0x34184339:  4E           DC.B       0x4E                     ; 'N'
  0x3418433A:  36           DC.B       0x36                     ; '6'
  0x3418433B:  78           DC.B       0x78                     ; 'x'
  0x3418433C:  78           DC.B       0x78                     ; 'x'
  0x3418433D:  5F           DC.B       0x5F                     ; '_'
  0x3418433E:  48           DC.B       0x48                     ; 'H'
  0x3418433F:  41           DC.B       0x41                     ; 'A'
  0x34184340:  4C           DC.B       0x4C                     ; 'L'
  0x34184341:  5F           DC.B       0x5F                     ; '_'
  0x34184342:  44           DC.B       0x44                     ; 'D'
  0x34184343:  72           DC.B       0x72                     ; 'r'
  0x34184344:  69           DC.B       0x69                     ; 'i'
  0x34184345:  76           DC.B       0x76                     ; 'v'
  0x34184346:  65           DC.B       0x65                     ; 'e'
  0x34184347:  72           DC.B       0x72                     ; 'r'
  0x34184348:  5C           DC.B       0x5C                     ; '\\'
  0x34184349:  53           DC.B       0x53                     ; 'S'
  0x3418434A:  72           DC.B       0x72                     ; 'r'
  0x3418434B:  63           DC.B       0x63                     ; 'c'
  0x3418434C:  5C           DC.B       0x5C                     ; '\\'
  0x3418434D:  73           DC.B       0x73                     ; 's'
  0x3418434E:  74           DC.B       0x74                     ; 't'
  0x3418434F:  6D           DC.B       0x6D                     ; 'm'
  0x34184350:  33           DC.B       0x33                     ; '3'
  0x34184351:  32           DC.B       0x32                     ; '2'
  0x34184352:  6E           DC.B       0x6E                     ; 'n'
  0x34184353:  36           DC.B       0x36                     ; '6'
  0x34184354:  78           DC.B       0x78                     ; 'x'
  0x34184355:  78           DC.B       0x78                     ; 'x'
  0x34184356:  5F           DC.B       0x5F                     ; '_'
  0x34184357:  68           DC.B       0x68                     ; 'h'
  0x34184358:  61           DC.B       0x61                     ; 'a'
  0x34184359:  6C           DC.B       0x6C                     ; 'l'
  0x3418435A:  5F           DC.B       0x5F                     ; '_'
  0x3418435B:  72           DC.B       0x72                     ; 'r'
  0x3418435C:  63           DC.B       0x63                     ; 'c'
  0x3418435D:  63           DC.B       0x63                     ; 'c'
  0x3418435E:  2E           DC.B       0x2E                     ; '.'
  0x3418435F:  63           DC.B       0x63                     ; 'c'
  0x34184360:  00           DC.B       0x00                     ; '\0'

Section .data.uwTickFreq from blto2_FSBL_lto.o, size=1, align=1


uwTickFreq:
  0x34184361:  01           DC.B       0x01                     ; '\x01'

Section .init_array from STM32N6xx_Startup.o, size=4, align=4

  0x34184364:  34180761     DC.W       SystemCoreClockUpdate

Section .rodata..L.str.10 from blto2_FSBL_lto.o, size=108, align=1

  0x34184368:  44           DC.B       0x44                     ; 'D'
  0x34184369:  3A           DC.B       0x3A                     ; ':'
  0x3418436A:  5C           DC.B       0x5C                     ; '\\'
  0x3418436B:  50           DC.B       0x50                     ; 'P'
  0x3418436C:  72           DC.B       0x72                     ; 'r'
  0x3418436D:  6F           DC.B       0x6F                     ; 'o'
  0x3418436E:  6A           DC.B       0x6A                     ; 'j'
  0x3418436F:  65           DC.B       0x65                     ; 'e'
  0x34184370:  6B           DC.B       0x6B                     ; 'k'
  0x34184371:  74           DC.B       0x74                     ; 't'
  0x34184372:  65           DC.B       0x65                     ; 'e'
  0x34184373:  5C           DC.B       0x5C                     ; '\\'
  0x34184374:  68           DC.B       0x68                     ; 'h'
  0x34184375:  61           DC.B       0x61                     ; 'a'
  0x34184376:  64           DC.B       0x64                     ; 'd'
  0x34184377:  65           DC.B       0x65                     ; 'e'
  0x34184378:  77           DC.B       0x77                     ; 'w'
  0x34184379:  65           DC.B       0x65                     ; 'e'
  0x3418437A:  5F           DC.B       0x5F                     ; '_'
  0x3418437B:  62           DC.B       0x62                     ; 'b'
  0x3418437C:  6C           DC.B       0x6C                     ; 'l'
  0x3418437D:  74           DC.B       0x74                     ; 't'
  0x3418437E:  6F           DC.B       0x6F                     ; 'o'
  0x3418437F:  32           DC.B       0x32                     ; '2'
  0x34184380:  5C           DC.B       0x5C                     ; '\\'
  0x34184381:  74           DC.B       0x74                     ; 't'
  0x34184382:  72           DC.B       0x72                     ; 'r'
  0x34184383:  75           DC.B       0x75                     ; 'u'
  0x34184384:  6E           DC.B       0x6E                     ; 'n'
  0x34184385:  6B           DC.B       0x6B                     ; 'k'
  0x34184386:  5C           DC.B       0x5C                     ; '\\'
  0x34184387:  66           DC.B       0x66                     ; 'f'
  0x34184388:  69           DC.B       0x69                     ; 'i'
  0x34184389:  72           DC.B       0x72                     ; 'r'
  0x3418438A:  6D           DC.B       0x6D                     ; 'm'
  0x3418438B:  77           DC.B       0x77                     ; 'w'
  0x3418438C:  61           DC.B       0x61                     ; 'a'
  0x3418438D:  72           DC.B       0x72                     ; 'r'
  0x3418438E:  65           DC.B       0x65                     ; 'e'
  0x3418438F:  5C           DC.B       0x5C                     ; '\\'
  0x34184390:  46           DC.B       0x46                     ; 'F'
  0x34184391:  53           DC.B       0x53                     ; 'S'
  0x34184392:  42           DC.B       0x42                     ; 'B'
  0x34184393:  4C           DC.B       0x4C                     ; 'L'
  0x34184394:  5C           DC.B       0x5C                     ; '\\'
  0x34184395:  43           DC.B       0x43                     ; 'C'
  0x34184396:  75           DC.B       0x75                     ; 'u'
  0x34184397:  62           DC.B       0x62                     ; 'b'
  0x34184398:  65           DC.B       0x65                     ; 'e'
  0x34184399:  4D           DC.B       0x4D                     ; 'M'
  0x3418439A:  58           DC.B       0x58                     ; 'X'
  0x3418439B:  5C           DC.B       0x5C                     ; '\\'
  0x3418439C:  44           DC.B       0x44                     ; 'D'
  0x3418439D:  72           DC.B       0x72                     ; 'r'
  0x3418439E:  69           DC.B       0x69                     ; 'i'
  0x3418439F:  76           DC.B       0x76                     ; 'v'
  0x341843A0:  65           DC.B       0x65                     ; 'e'
  0x341843A1:  72           DC.B       0x72                     ; 'r'
  0x341843A2:  73           DC.B       0x73                     ; 's'
  0x341843A3:  5C           DC.B       0x5C                     ; '\\'
  0x341843A4:  53           DC.B       0x53                     ; 'S'
  0x341843A5:  54           DC.B       0x54                     ; 'T'
  0x341843A6:  4D           DC.B       0x4D                     ; 'M'
  0x341843A7:  33           DC.B       0x33                     ; '3'
  0x341843A8:  32           DC.B       0x32                     ; '2'
  0x341843A9:  4E           DC.B       0x4E                     ; 'N'
  0x341843AA:  36           DC.B       0x36                     ; '6'
  0x341843AB:  78           DC.B       0x78                     ; 'x'
  0x341843AC:  78           DC.B       0x78                     ; 'x'
  0x341843AD:  5F           DC.B       0x5F                     ; '_'
  0x341843AE:  48           DC.B       0x48                     ; 'H'
  0x341843AF:  41           DC.B       0x41                     ; 'A'
  0x341843B0:  4C           DC.B       0x4C                     ; 'L'
  0x341843B1:  5F           DC.B       0x5F                     ; '_'
  0x341843B2:  44           DC.B       0x44                     ; 'D'
  0x341843B3:  72           DC.B       0x72                     ; 'r'
  0x341843B4:  69           DC.B       0x69                     ; 'i'
  0x341843B5:  76           DC.B       0x76                     ; 'v'
  0x341843B6:  65           DC.B       0x65                     ; 'e'
  0x341843B7:  72           DC.B       0x72                     ; 'r'
  0x341843B8:  5C           DC.B       0x5C                     ; '\\'
  0x341843B9:  53           DC.B       0x53                     ; 'S'
  0x341843BA:  72           DC.B       0x72                     ; 'r'
  0x341843BB:  63           DC.B       0x63                     ; 'c'
  0x341843BC:  5C           DC.B       0x5C                     ; '\\'
  0x341843BD:  73           DC.B       0x73                     ; 's'
  0x341843BE:  74           DC.B       0x74                     ; 't'
  0x341843BF:  6D           DC.B       0x6D                     ; 'm'
  0x341843C0:  33           DC.B       0x33                     ; '3'
  0x341843C1:  32           DC.B       0x32                     ; '2'
  0x341843C2:  6E           DC.B       0x6E                     ; 'n'
  0x341843C3:  36           DC.B       0x36                     ; '6'
  0x341843C4:  78           DC.B       0x78                     ; 'x'
  0x341843C5:  78           DC.B       0x78                     ; 'x'
  0x341843C6:  5F           DC.B       0x5F                     ; '_'
  0x341843C7:  68           DC.B       0x68                     ; 'h'
  0x341843C8:  61           DC.B       0x61                     ; 'a'
  0x341843C9:  6C           DC.B       0x6C                     ; 'l'
  0x341843CA:  5F           DC.B       0x5F                     ; '_'
  0x341843CB:  63           DC.B       0x63                     ; 'c'
  0x341843CC:  6F           DC.B       0x6F                     ; 'o'
  0x341843CD:  72           DC.B       0x72                     ; 'r'
  0x341843CE:  74           DC.B       0x74                     ; 't'
  0x341843CF:  65           DC.B       0x65                     ; 'e'
  0x341843D0:  78           DC.B       0x78                     ; 'x'
  0x341843D1:  2E           DC.B       0x2E                     ; '.'
  0x341843D2:  63           DC.B       0x63                     ; 'c'
  0x341843D3:  00           DC.B       0x00                     ; '\0'

Section .rodata..L.str.28 from blto2_FSBL_lto.o, size=108, align=1

  0x341843D4:  44           DC.B       0x44                     ; 'D'
  0x341843D5:  3A           DC.B       0x3A                     ; ':'
  0x341843D6:  5C           DC.B       0x5C                     ; '\\'
  0x341843D7:  50           DC.B       0x50                     ; 'P'
  0x341843D8:  72           DC.B       0x72                     ; 'r'
  0x341843D9:  6F           DC.B       0x6F                     ; 'o'
  0x341843DA:  6A           DC.B       0x6A                     ; 'j'
  0x341843DB:  65           DC.B       0x65                     ; 'e'
  0x341843DC:  6B           DC.B       0x6B                     ; 'k'
  0x341843DD:  74           DC.B       0x74                     ; 't'
  0x341843DE:  65           DC.B       0x65                     ; 'e'
  0x341843DF:  5C           DC.B       0x5C                     ; '\\'
  0x341843E0:  68           DC.B       0x68                     ; 'h'
  0x341843E1:  61           DC.B       0x61                     ; 'a'
  0x341843E2:  64           DC.B       0x64                     ; 'd'
  0x341843E3:  65           DC.B       0x65                     ; 'e'
  0x341843E4:  77           DC.B       0x77                     ; 'w'
  0x341843E5:  65           DC.B       0x65                     ; 'e'
  0x341843E6:  5F           DC.B       0x5F                     ; '_'
  0x341843E7:  62           DC.B       0x62                     ; 'b'
  0x341843E8:  6C           DC.B       0x6C                     ; 'l'
  0x341843E9:  74           DC.B       0x74                     ; 't'
  0x341843EA:  6F           DC.B       0x6F                     ; 'o'
  0x341843EB:  32           DC.B       0x32                     ; '2'
  0x341843EC:  5C           DC.B       0x5C                     ; '\\'
  0x341843ED:  74           DC.B       0x74                     ; 't'
  0x341843EE:  72           DC.B       0x72                     ; 'r'
  0x341843EF:  75           DC.B       0x75                     ; 'u'
  0x341843F0:  6E           DC.B       0x6E                     ; 'n'
  0x341843F1:  6B           DC.B       0x6B                     ; 'k'
  0x341843F2:  5C           DC.B       0x5C                     ; '\\'
  0x341843F3:  66           DC.B       0x66                     ; 'f'
  0x341843F4:  69           DC.B       0x69                     ; 'i'
  0x341843F5:  72           DC.B       0x72                     ; 'r'
  0x341843F6:  6D           DC.B       0x6D                     ; 'm'
  0x341843F7:  77           DC.B       0x77                     ; 'w'
  0x341843F8:  61           DC.B       0x61                     ; 'a'
  0x341843F9:  72           DC.B       0x72                     ; 'r'
  0x341843FA:  65           DC.B       0x65                     ; 'e'
  0x341843FB:  5C           DC.B       0x5C                     ; '\\'
  0x341843FC:  46           DC.B       0x46                     ; 'F'
  0x341843FD:  53           DC.B       0x53                     ; 'S'
  0x341843FE:  42           DC.B       0x42                     ; 'B'
  0x341843FF:  4C           DC.B       0x4C                     ; 'L'
  0x34184400:  5C           DC.B       0x5C                     ; '\\'
  0x34184401:  43           DC.B       0x43                     ; 'C'
  0x34184402:  75           DC.B       0x75                     ; 'u'
  0x34184403:  62           DC.B       0x62                     ; 'b'
  0x34184404:  65           DC.B       0x65                     ; 'e'
  0x34184405:  4D           DC.B       0x4D                     ; 'M'
  0x34184406:  58           DC.B       0x58                     ; 'X'
  0x34184407:  5C           DC.B       0x5C                     ; '\\'
  0x34184408:  44           DC.B       0x44                     ; 'D'
  0x34184409:  72           DC.B       0x72                     ; 'r'
  0x3418440A:  69           DC.B       0x69                     ; 'i'
  0x3418440B:  76           DC.B       0x76                     ; 'v'
  0x3418440C:  65           DC.B       0x65                     ; 'e'
  0x3418440D:  72           DC.B       0x72                     ; 'r'
  0x3418440E:  73           DC.B       0x73                     ; 's'
  0x3418440F:  5C           DC.B       0x5C                     ; '\\'
  0x34184410:  53           DC.B       0x53                     ; 'S'
  0x34184411:  54           DC.B       0x54                     ; 'T'
  0x34184412:  4D           DC.B       0x4D                     ; 'M'
  0x34184413:  33           DC.B       0x33                     ; '3'
  0x34184414:  32           DC.B       0x32                     ; '2'
  0x34184415:  4E           DC.B       0x4E                     ; 'N'
  0x34184416:  36           DC.B       0x36                     ; '6'
  0x34184417:  78           DC.B       0x78                     ; 'x'
  0x34184418:  78           DC.B       0x78                     ; 'x'
  0x34184419:  5F           DC.B       0x5F                     ; '_'
  0x3418441A:  48           DC.B       0x48                     ; 'H'
  0x3418441B:  41           DC.B       0x41                     ; 'A'
  0x3418441C:  4C           DC.B       0x4C                     ; 'L'
  0x3418441D:  5F           DC.B       0x5F                     ; '_'
  0x3418441E:  44           DC.B       0x44                     ; 'D'
  0x3418441F:  72           DC.B       0x72                     ; 'r'
  0x34184420:  69           DC.B       0x69                     ; 'i'
  0x34184421:  76           DC.B       0x76                     ; 'v'
  0x34184422:  65           DC.B       0x65                     ; 'e'
  0x34184423:  72           DC.B       0x72                     ; 'r'
  0x34184424:  5C           DC.B       0x5C                     ; '\\'
  0x34184425:  53           DC.B       0x53                     ; 'S'
  0x34184426:  72           DC.B       0x72                     ; 'r'
  0x34184427:  63           DC.B       0x63                     ; 'c'
  0x34184428:  5C           DC.B       0x5C                     ; '\\'
  0x34184429:  73           DC.B       0x73                     ; 's'
  0x3418442A:  74           DC.B       0x74                     ; 't'
  0x3418442B:  6D           DC.B       0x6D                     ; 'm'
  0x3418442C:  33           DC.B       0x33                     ; '3'
  0x3418442D:  32           DC.B       0x32                     ; '2'
  0x3418442E:  6E           DC.B       0x6E                     ; 'n'
  0x3418442F:  36           DC.B       0x36                     ; '6'
  0x34184430:  78           DC.B       0x78                     ; 'x'
  0x34184431:  78           DC.B       0x78                     ; 'x'
  0x34184432:  5F           DC.B       0x5F                     ; '_'
  0x34184433:  68           DC.B       0x68                     ; 'h'
  0x34184434:  61           DC.B       0x61                     ; 'a'
  0x34184435:  6C           DC.B       0x6C                     ; 'l'
  0x34184436:  5F           DC.B       0x5F                     ; '_'
  0x34184437:  70           DC.B       0x70                     ; 'p'
  0x34184438:  77           DC.B       0x77                     ; 'w'
  0x34184439:  72           DC.B       0x72                     ; 'r'
  0x3418443A:  5F           DC.B       0x5F                     ; '_'
  0x3418443B:  65           DC.B       0x65                     ; 'e'
  0x3418443C:  78           DC.B       0x78                     ; 'x'
  0x3418443D:  2E           DC.B       0x2E                     ; '.'
  0x3418443E:  63           DC.B       0x63                     ; 'c'
  0x3418443F:  00           DC.B       0x00                     ; '\0'

Section .bss.uwTick from blto2_FSBL_lto.o, size=4, align=4


uwTick:
  0x34184440:  44           DC.B       0x44                     ; 'D'
  0x34184441:  3A           DC.B       0x3A                     ; ':'
  0x34184442:  5C           DC.B       0x5C                     ; '\\'
  0x34184443:  50           DC.B       0x50                     ; 'P'

Section .data.uwTickPrio from blto2_FSBL_lto.o, size=4, align=4


uwTickPrio:
  0x34184444:  10           DC.B       0x10                     ; '\x10'
  0x34184445:  00           DC.B       0x00                     ; '\0'
  0x34184446:  00           DC.B       0x00                     ; '\0'
  0x34184447:  00           DC.B       0x00                     ; '\0'

Section .data.SystemCoreClock from blto2_FSBL_lto.o, size=4, align=4


SystemCoreClock:
  0x34184448:  00           DC.B       0x00                     ; '\0'
  0x34184449:  90           DC.B       0x90                     ; '\x90'
  0x3418444A:  D0           DC.B       0xD0                     ; '\xD0'
  0x3418444B:  03           DC.B       0x03                     ; '\x03'

Section .segger.init.__SEGGER_init_ctors from SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=36, align=4


__SEGGER_init_ctors:
  0x3418444C:  B500         PUSH       123LR}
  0x3418444E:  4806         LDR        R0, =0x34184364          ; [PC, #24] [0x34184468] 
  0x34184450:  4906         LDR        R1, =0x34184368          ; [PC, #24] [0x3418446C] 

.L1:
  0x34184452:  4288         CMP        R0, R1
  0x34184454:  D005         BEQ        46L2                      ; 0x34184462
  0x34184456:  6802         LDR        R2, [R0]
  0x34184458:  3004         ADDS       R0, #4
  0x3418445A:  B403         PUSH       123R0-R1}
  0x3418445C:  4790         BLX        R2
  0x3418445E:  BC03         POP        123R0-R1}
  0x34184460:  E7F7         B          46L1                      ; 0x34184452

.L2:
  0x34184462:  BC08         POP        123R3}
  0x34184464:  4718         BX         R3
  0x34184466:  0000         NOP
  0x34184468:  34184364     DC.W       34184364               ; R_ARM_ABS32
  0x3418446C:  34184368     DC.W       34184368               ; R_ARM_ABS32

Section .segger.init.table from [ Linker created ], size=52, align=4

  0x34184470:  341844B1     DC.W       __SEGGER_init_zero
  0x34184474:  40           DC.B       0x40                     ; '@'
  0x34184475:  44           DC.B       0x44                     ; 'D'
  0x34184476:  18           DC.B       0x18                     ; '\x18'
  0x34184477:  34           DC.B       0x34                     ; '4'
  0x34184478:  04           DC.B       0x04                     ; '\x04'
  0x34184479:  00           DC.B       0x00                     ; '\0'
  0x3418447A:  00           DC.B       0x00                     ; '\0'
  0x3418447B:  00           DC.B       0x00                     ; '\0'
  0x3418447C:  341844C3     DC.W       __SEGGER_init_copy
  0x34184480:  61           DC.B       0x61                     ; 'a'
  0x34184481:  43           DC.B       0x43                     ; 'C'
  0x34184482:  18           DC.B       0x18                     ; '\x18'
  0x34184483:  34           DC.B       0x34                     ; '4'
  0x34184484:  341844A4     DC.W       341844A4               ; R_ARM_ABS32
  0x34184488:  01           DC.B       0x01                     ; '\x01'
  0x34184489:  00           DC.B       0x00                     ; '\0'
  0x3418448A:  00           DC.B       0x00                     ; '\0'
  0x3418448B:  00           DC.B       0x00                     ; '\0'
  0x3418448C:  341844C3     DC.W       __SEGGER_init_copy
  0x34184490:  44           DC.B       0x44                     ; 'D'
  0x34184491:  44           DC.B       0x44                     ; 'D'
  0x34184492:  18           DC.B       0x18                     ; '\x18'
  0x34184493:  34           DC.B       0x34                     ; '4'
  0x34184494:  341844A5     DC.W       341844A5               ; R_ARM_ABS32
  0x34184498:  08           DC.B       0x08                     ; '\b'
  0x34184499:  00           DC.B       0x00                     ; '\0'
  0x3418449A:  00           DC.B       0x00                     ; '\0'
  0x3418449B:  00           DC.B       0x00                     ; '\0'
  0x3418449C:  3418444D     DC.W       __SEGGER_init_ctors
  0x341844A0:  34181A73     DC.W       __SEGGER_init_done

Section .segger.init.data from [ Linker created ], size=12, align=4

  0x341844A4:  01           DC.B       0x01                     ; '\x01'
  0x341844A5:  10           DC.B       0x10                     ; '\x10'
  0x341844A6:  00           DC.B       0x00                     ; '\0'
  0x341844A7:  00           DC.B       0x00                     ; '\0'
  0x341844A8:  00           DC.B       0x00                     ; '\0'
  0x341844A9:  00           DC.B       0x00                     ; '\0'
  0x341844AA:  90           DC.B       0x90                     ; '\x90'
  0x341844AB:  D0           DC.B       0xD0                     ; '\xD0'
  0x341844AC:  03           DC.B       0x03                     ; '\x03'
  0x341844AD:  00           DC.B       0x00                     ; '\0'
  0x341844AE:  00           DC.B       0x00                     ; '\0'
  0x341844AF:  00           DC.B       0x00                     ; '\0'

Section .segger.init.__SEGGER_init_zero from SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=18, align=2


__SEGGER_init_zero:
  0x341844B0:  6820         LDR        R0, [R4]
  0x341844B2:  6861         LDR        R1, [R4, #4]
  0x341844B4:  3408         ADDS       R4, #8
  0x341844B6:  2200         MOVS       R2, #0
  0x341844B8:  E000         B          46L2                      ; 0x341844BC

.L1:
  0x341844BA:  5442         STRB       R2, [R0, R1]

.L2:
  0x341844BC:  1E49         SUBS       R1, R1, #1
  0x341844BE:  D5FC         BPL        46L1                      ; 0x341844BA
  0x341844C0:  4770         BX         LR

Section .segger.init.__SEGGER_init_copy from SEGGER_crtinit.o (SEGGER_crtinit_v81mml_fpv5_d16_hard_t_le_eabi_balanced.a), size=20, align=2


__SEGGER_init_copy:
  0x341844C2:  6820         LDR        R0, [R4]
  0x341844C4:  6861         LDR        R1, [R4, #4]
  0x341844C6:  68A2         LDR        R2, [R4, #8]
  0x341844C8:  340C         ADDS       R4, #12
  0x341844CA:  E001         B          46L2                      ; 0x341844D0

.L1:
  0x341844CC:  5C8B         LDRB       R3, [R1, R2]
  0x341844CE:  5483         STRB       R3, [R0, R2]

.L2:
  0x341844D0:  1E52         SUBS       R2, R2, #1
  0x341844D2:  D5FB         BPL        46L1                      ; 0x341844CC
  0x341844D4:  4770         BX         LR

Section .bss.block.stack from [ Linker created ], size=16384, align=8

(341FC000-341FFFFF excluded)

LINK SUMMARY

 16 088 bytes read-only  code    + 
    491 bytes read-only  data    =  16 579 bytes read-only (total)
 16 397 bytes read-write data
Name Range Size Used Unused Alignment Loss
AXI_RAM2 34180400-341FFFFF 523 264 32 980 6.30 490 284 93.70 0 0.00 
Link complete: 0 errors.