source: trunk/firmware/FSBL/CubeMX/blto2_FSBL.ioc@ 24

Last change on this file since 24 was 24, checked in by Zed, 4 weeks ago

First Stage Bootloader now can be debugged and flashed directly in SES.
RTT is also working.
File size: 44.8 KB
RevLine 
[16]1#MicroXplorer Configuration settings - do not modify
2Appli.IPs=CORTEX_M55_S,GPDMA1,HPDMA1,LINKEDLIST,RCC,GPIO,NVIC1\:I,RIF,SAU
3CAD.formats=
4CAD.pinconfig=
5CAD.provider=
6CORTEX_M55_FSBL.CPU_DCache=Enabled
7CORTEX_M55_FSBL.CPU_ICache=Enabled
8CORTEX_M55_FSBL.IPParameters=CPU_ICache,CPU_DCache
9CORTEX_M55_S.AccessPermission-Cortex_Memory_Protection_Unit_Region0_Settings=MPU_REGION_ALL_RW
10CORTEX_M55_S.Attributes0=MPU_ATTRIBUTES_NUMBER0
11CORTEX_M55_S.BaseAddress-Cortex_Memory_Protection_Unit_Region0_Settings=__NON_CACHEABLE_SECTION_BEGIN
12CORTEX_M55_S.CPU_DCache=Enabled
13CORTEX_M55_S.CPU_ICache=Enabled
14CORTEX_M55_S.Enable-Cortex_Memory_Protection_Unit_Region0_Settings=MPU_REGION_ENABLE
15CORTEX_M55_S.IPParameters=CPU_ICache,CPU_DCache,MPU_Control,Enable-Cortex_Memory_Protection_Unit_Region0_Settings,Attributes0,BaseAddress-Cortex_Memory_Protection_Unit_Region0_Settings,LimitAddress-Cortex_Memory_Protection_Unit_Region0_Settings,AccessPermission-Cortex_Memory_Protection_Unit_Region0_Settings
16CORTEX_M55_S.LimitAddress-Cortex_Memory_Protection_Unit_Region0_Settings=__NON_CACHEABLE_SECTION_END
17CORTEX_M55_S.MPU_Control=MPU_HFNMI_PRIVDEF
[19]18EXTMEM_MANAGER.IPParameters=RefParam_MEMORY_1_ConfigType,RefParam_BOOT_enable,RefParam_XIP_ApplicationOffset
19EXTMEM_MANAGER.RefParam_BOOT_enable=true
[18]20EXTMEM_MANAGER.RefParam_MEMORY_1_ConfigType=EXTMEM_LINK_CONFIG_8LINES
[19]21EXTMEM_MANAGER.RefParam_XIP_ApplicationOffset=0x80000
[16]22ExtMemLoader.IPs=EXTMEM_LOADER,EXTMEM_MANAGER,RCC\:I,GPIO,TIM6
[24]23FSBL.IPs=CORTEX_M55_FSBL,GPDMA1\:I,HDP,HPDMA1\:I,LINKEDLIST,RCC,GPIO\:I,NVIC\:I,XSPIM,XSPI2,EXTMEM_MANAGER,BSEC,DEBUG
[16]24FSBL.Pins=PG0
25File.Version=6
26GPIO.groupedBy=Group By Peripherals
27KeepUserPlacement=false
28Mcu.CPN=STM32N657X0H3Q
29Mcu.Context0=FSBL
30Mcu.Context1=Appli
31Mcu.Context2=ExtMemLoader
32Mcu.ContextNb=3
33Mcu.ContextProject=FullSecure
34Mcu.Family=STM32N6
[18]35Mcu.IP0=BSEC
36Mcu.IP1=CORTEX_M55_FSBL
[24]37Mcu.IP10=XSPIM
[18]38Mcu.IP2=CORTEX_M55_S
[24]39Mcu.IP3=DEBUG
40Mcu.IP4=EXTMEM_MANAGER
41Mcu.IP5=NVIC1
42Mcu.IP6=NVIC
43Mcu.IP7=RCC
44Mcu.IP8=RIF
45Mcu.IP9=XSPI2
46Mcu.IPNb=11
[16]47Mcu.Name=STM32N657X0HxQ
48Mcu.Package=VFBGA264
49Mcu.Pin0=PN4
50Mcu.Pin1=PN6
51Mcu.Pin10=PN2
52Mcu.Pin11=PA13(JTMS/SWDIO)
[24]53Mcu.Pin12=PB5(JTDO/TRACESWO)
54Mcu.Pin13=PN10
55Mcu.Pin14=PN11
56Mcu.Pin15=VP_BSEC_VS_BSEC
57Mcu.Pin16=VP_EXTMEM_MANAGER_SIG_Activate_EXTMEM
58Mcu.Pin17=VP_RIF_VS_RIF1
59Mcu.Pin18=VP_XSPI2_VS_octo
60Mcu.Pin19=VP_XSPIM_VS_IO
[16]61Mcu.Pin2=PN8
62Mcu.Pin3=PN0
63Mcu.Pin4=PG0
64Mcu.Pin5=PN3
65Mcu.Pin6=PN5
66Mcu.Pin7=PN1
67Mcu.Pin8=PA14(JTCK/SWCLK)
68Mcu.Pin9=PN9
[24]69Mcu.PinsNb=20
[16]70Mcu.ThirdPartyNb=0
71Mcu.UserConstants=
72Mcu.UserName=STM32N657X0HxQ
73MxCube.Version=6.18.1
74MxDb.Version=DB.6.0.181
75NVIC.BFHFNMINS=0
76NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
77NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
78NVIC.ForceEnableDMAVector=true
79NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
80NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
81NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
82NVIC.PRIS=0
83NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
84NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
85NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
86NVIC.SecureFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
87NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:true\:false\:true\:false
88NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
89NVIC1.BFHFNMINS=0
90NVIC1.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
91NVIC1.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
92NVIC1.ForceEnableDMAVector=true
93NVIC1.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
94NVIC1.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
95NVIC1.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
96NVIC1.PRIS=0
97NVIC1.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
98NVIC1.PriorityGroup=NVIC_PRIORITYGROUP_4
99NVIC1.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
100NVIC1.SecureFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
101NVIC1.SysTick_IRQn=true\:15\:0\:false\:false\:true\:false\:true\:false
102NVIC1.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
[24]103PA13(JTMS/SWDIO).GPIOParameters=PinAttribute
[16]104PA13(JTMS/SWDIO).Locked=true
[24]105PA13(JTMS/SWDIO).Mode=Serial_Wire
106PA13(JTMS/SWDIO).PinAttribute=FSBL
[16]107PA13(JTMS/SWDIO).Signal=DEBUG_JTMS-SWDIO
[24]108PA14(JTCK/SWCLK).GPIOParameters=PinAttribute
[16]109PA14(JTCK/SWCLK).Locked=true
[24]110PA14(JTCK/SWCLK).Mode=Serial_Wire
111PA14(JTCK/SWCLK).PinAttribute=FSBL
[16]112PA14(JTCK/SWCLK).Signal=DEBUG_JTCK-SWCLK
[24]113PB5(JTDO/TRACESWO).GPIOParameters=PinAttribute
114PB5(JTDO/TRACESWO).Locked=true
115PB5(JTDO/TRACESWO).PinAttribute=FSBL
116PB5(JTDO/TRACESWO).Signal=DEBUG_JTDO-SWO
[16]117PCC.Bar.Display=Horizontal Bar
118PCC.Checker=false
119PCC.Display=Plot\: All Steps
120PCC.Line=STM32N6x7
121PCC.MCU=STM32N657X0HxQ
122PCC.PartNumber=STM32N657X0HxQ
123PCC.SequenceTime=1.0 ms
124PCC.SequenceTime.Unit=ms
125PCC.Series=STM32N6
126PCC.Temperature=25
127PCC.Vdd=1.8
128PG0.ContextOwner=FSBL
129PG0.GPIOParameters=GPIO_Label,PinAttribute
130PG0.GPIO_Label=GREEN_LED
131PG0.Locked=true
132PG0.PinAttribute=FSBL
133PG0.Signal=GPIO_Output
134PN0.GPIOParameters=PinAttribute
135PN0.Mode=XSPI2_Port2Octo
136PN0.PinAttribute=FSBL
137PN0.Signal=XSPIM_P2_DQS0
138PN1.GPIOParameters=PinAttribute
139PN1.Mode=XSPI2_NCS1_Port2
140PN1.PinAttribute=FSBL
141PN1.Signal=XSPIM_P2_NCS1
142PN10.GPIOParameters=PinAttribute
143PN10.Mode=XSPI2_Port2Octo
144PN10.PinAttribute=FSBL
145PN10.Signal=XSPIM_P2_IO6
146PN11.GPIOParameters=PinAttribute
147PN11.Mode=XSPI2_Port2Octo
148PN11.PinAttribute=FSBL
149PN11.Signal=XSPIM_P2_IO7
150PN2.GPIOParameters=PinAttribute
151PN2.Mode=XSPI2_Port2Octo
152PN2.PinAttribute=FSBL
153PN2.Signal=XSPIM_P2_IO0
154PN3.GPIOParameters=PinAttribute
155PN3.Mode=XSPI2_Port2Octo
156PN3.PinAttribute=FSBL
157PN3.Signal=XSPIM_P2_IO1
158PN4.GPIOParameters=PinAttribute
159PN4.Mode=XSPI2_Port2Octo
160PN4.PinAttribute=FSBL
161PN4.Signal=XSPIM_P2_IO2
162PN5.GPIOParameters=PinAttribute
163PN5.Mode=XSPI2_Port2Octo
164PN5.PinAttribute=FSBL
165PN5.Signal=XSPIM_P2_IO3
166PN6.GPIOParameters=PinAttribute
167PN6.Mode=XSPI2_Port2Octo
168PN6.PinAttribute=FSBL
169PN6.Signal=XSPIM_P2_CLK
170PN8.GPIOParameters=PinAttribute
171PN8.Mode=XSPI2_Port2Octo
172PN8.PinAttribute=FSBL
173PN8.Signal=XSPIM_P2_IO4
174PN9.GPIOParameters=PinAttribute
175PN9.Mode=XSPI2_Port2Octo
176PN9.PinAttribute=FSBL
177PN9.Signal=XSPIM_P2_IO5
178PinOutPanel.CurrentBGAView=Top
179PinOutPanel.RotationAngle=0
180ProjectManager.AskForMigrate=true
181ProjectManager.BackupPrevious=false
182ProjectManager.CompilerLinker=GCC
183ProjectManager.CompilerOptimize=6
184ProjectManager.ComputerToolchain=false
185ProjectManager.CoupleFile=true
[24]186ProjectManager.CustomerFirmwarePackage=..\\..\\..\\..\\..\\..\\STM32Cube\\Repository\\STM32Cube_FW_N6_V1.4.1
187ProjectManager.DefaultFWLocation=false
[16]188ProjectManager.DeletePrevious=true
189ProjectManager.DeviceId=STM32N657X0HxQ
190ProjectManager.Example=Template_FSBL_XIP
191ProjectManager.ExampleSource=CubeFw
192ProjectManager.FirmwarePackage=STM32Cube FW_N6 V1.4.1
[24]193ProjectManager.FreePins=false
[16]194ProjectManager.FreePinsContext=FSBL
195ProjectManager.HalAssertFull=true
196ProjectManager.HeapSize=FSBL-0x200,Appli-0x200,ExtMemLoader-0x200
197ProjectManager.KeepUserCode=true
198ProjectManager.LastFirmware=true
199ProjectManager.LibraryCopy=1
200ProjectManager.MainLocation=Src
201ProjectManager.NoMain=false
202ProjectManager.PreviousToolchain=
203ProjectManager.ProjectBuild=false
204ProjectManager.ProjectFileName=blto2_FSBL.ioc
205ProjectManager.ProjectName=blto2_FSBL
206ProjectManager.ProjectStructure=FSBL\:FSBL\:true;Appli\:Appli\:false;ExtMemLoader\:ExtMemLoader\:false;
207ProjectManager.RegisterCallBack=
208ProjectManager.StackSize=FSBL-0x800,Appli-0x800,ExtMemLoader-0x800
209ProjectManager.TargetToolchain=STM32CubeIDE
210ProjectManager.ToolChainLocation=
211ProjectManager.UAScriptAfterPath=
212ProjectManager.UAScriptBeforePath=
213ProjectManager.UnderRoot=false
[24]214ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false-FSBL,2-MX_GPIO_Init-GPIO-false-HAL-true-FSBL,3-MX_XSPI2_Init-XSPI2-false-HAL-true-FSBL,false-4-MX_XSPIM_Init-XSPIM-false-HAL-true-FSBL,5-MX_BSEC_Init-BSEC-false-HAL-true-FSBL,6-MX_EXTMEM_MANAGER_Init-EXTMEM_MANAGER-false-HAL-false-FSBL,2-SystemIsolation_Config-RIF-false-HAL-true-Appli,2-MX_GPIO_Init-GPIO-false-HAL-true-Appli,0-MX_CORTEX_M55_FSBL_Init-CORTEX_M55_FSBL-false-HAL-true-FSBL,0-MX_CORTEX_M55_S_Init-CORTEX_M55_S-false-HAL-true-Appli,2-MX_EXTMEM_MANAGER_Init-EXTMEM_MANAGER-false-HAL-false-ExtMemLoader,2-MX_GPIO_Init-GPIO-false-HAL-true-ExtMemLoader
[16]215RCC.ADC12Freq_Value=200000000
216RCC.ADFFreq_Value=200000000
217RCC.AHB1234Freq_Value=200000000
218RCC.AHBFreq_Value=75000000
219RCC.APB1Freq_Value=200000000
220RCC.APB2Freq_Value=200000000
221RCC.APB4Freq_Value=200000000
222RCC.APB5Freq_Value=200000000
223RCC.AXIClockFreq_Value=400000000
224RCC.CKPERFreq_Value=64000000
225RCC.CPUCLKSource=RCC_CPUCLKSOURCE_IC1
226RCC.CortexFreq_Value=75000000
227RCC.CpuClockFreq_Value=600000000
228RCC.DCMIPPFreq_Value=200000000
229RCC.ETH1Freq_Value=200000000
230RCC.FBDIV1=75
231RCC.FDCANFreq_Value=200000000
232RCC.FMCFreq_Value=200000000
233RCC.FOUTPOSTDIV1Freq_Value=1200000000
234RCC.FOUTPOSTDIV2Freq_Value=1600000000
235RCC.FOUTPOSTDIV3Freq_Value=1600000000
236RCC.FOUTPOSTDIV4Freq_Value=1600000000
237RCC.FREFDIV1=4
238RCC.FamilyName=M
239RCC.HSE_VALUE=48000000
240RCC.HSI_VALUE=64000000
241RCC.I2C1Freq_Value=200000000
242RCC.I2C2Freq_Value=200000000
243RCC.I2C3Freq_Value=200000000
244RCC.I2C4Freq_Value=200000000
245RCC.I3C1Freq_Value=200000000
246RCC.I3C2Freq_Value=200000000
247RCC.IC10Freq_VALUE=1600000000
248RCC.IC11Div=3
249RCC.IC11Freq_VALUE=400000000
250RCC.IC12Freq_VALUE=1600000000
251RCC.IC13Freq_VALUE=1600000000
252RCC.IC14Freq_VALUE=1600000000
253RCC.IC15Freq_VALUE=1600000000
254RCC.IC16Freq_VALUE=1600000000
255RCC.IC17Freq_VALUE=1600000000
256RCC.IC18Freq_VALUE=1600000000
257RCC.IC19Freq_VALUE=1600000000
258RCC.IC1Div=2
259RCC.IC1Freq_VALUE=600000000
260RCC.IC20Freq_VALUE=1600000000
261RCC.IC2Div=3
262RCC.IC2Freq_VALUE=400000000
263RCC.IC3Div=24
264RCC.IC3Freq_VALUE=50000000
265RCC.IC4Freq_VALUE=1200000000
266RCC.IC5Freq_VALUE=1200000000
267RCC.IC6Freq_VALUE=300000000
268RCC.IC7Freq_VALUE=1600000000
269RCC.IC8Freq_VALUE=1600000000
270RCC.IC9Freq_VALUE=1600000000
271RCC.IPParameters=ADC12Freq_Value,ADFFreq_Value,AHB1234Freq_Value,AHBFreq_Value,APB1Freq_Value,APB2Freq_Value,APB4Freq_Value,APB5Freq_Value,AXIClockFreq_Value,CKPERFreq_Value,CPUCLKSource,CortexFreq_Value,CpuClockFreq_Value,DCMIPPFreq_Value,ETH1Freq_Value,FBDIV1,FDCANFreq_Value,FMCFreq_Value,FOUTPOSTDIV1Freq_Value,FOUTPOSTDIV2Freq_Value,FOUTPOSTDIV3Freq_Value,FOUTPOSTDIV4Freq_Value,FREFDIV1,FamilyName,HSE_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I3C1Freq_Value,I3C2Freq_Value,IC10Freq_VALUE,IC11Div,IC11Freq_VALUE,IC12Freq_VALUE,IC13Freq_VALUE,IC14Freq_VALUE,IC15Freq_VALUE,IC16Freq_VALUE,IC17Freq_VALUE,IC18Freq_VALUE,IC19Freq_VALUE,IC1Div,IC1Freq_VALUE,IC20Freq_VALUE,IC2Div,IC2Freq_VALUE,IC3Div,IC3Freq_VALUE,IC4Freq_VALUE,IC5Freq_VALUE,IC6Freq_VALUE,IC7Freq_VALUE,IC8Freq_VALUE,IC9Freq_VALUE,LPTIM1Freq_Value,LPTIM2Freq_Value,LPTIM3Freq_Value,LPTIM4Freq_Value,LPTIM5Freq_Value,LPUART1Freq_Value,LSE_VALUE,LSI_VALUE,LTDCFreq_Value,MCO1PinFreq_Value,MCO2PinFreq_Value,MDFFreq_Value,MSI_VALUE,OTGHS1Freq_Value,OTGHS2Freq_Value,OTGPHY1Freq_Value,OTGPHY2Freq_Value,PSSIFreq_Value,PWR_Regulator_Voltage_Scale,RTCFreq_Value,SAI1Freq_Value,SAI2Freq_Value,SDMMC1Freq_Value,SDMMC2Freq_Value,SPDIFRX1Freq_Value,SPI1Freq_Value,SPI2Freq_Value,SPI3Freq_Value,SPI4Freq_Value,SPI5Freq_Value,SPI6Freq_Value,SYSBCLKFreq_VALUE,SYSBCLKSource,SYSCCLKFreq_VALUE,SYSDCLKFreq_VALUE,TIMGFreq_Value,UART4Freq_Value,UART5Freq_Value,UART7Freq_Value,UART8Freq_Value,UART9Freq_Value,USART10Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USART6Freq_Value,VCO1OutputFreq_Value,VCO2OutputFreq_Value,VCO3OutputFreq_Value,VCO4OutputFreq_Value,VCOInput1Freq_Value,VCOInput2Freq_Value,VCOInput3Freq_Value,VCOInput4Freq_Value,XSPI1Freq_Value,XSPI2ClockSelection,XSPI2Freq_Value,XSPI3Freq_Value
272RCC.LPTIM1Freq_Value=200000000
273RCC.LPTIM2Freq_Value=200000000
274RCC.LPTIM3Freq_Value=200000000
275RCC.LPTIM4Freq_Value=200000000
276RCC.LPTIM5Freq_Value=200000000
277RCC.LPUART1Freq_Value=200000000
278RCC.LSE_VALUE=32768
279RCC.LSI_VALUE=32000
280RCC.LTDCFreq_Value=200000000
281RCC.MCO1PinFreq_Value=64000000
282RCC.MCO2PinFreq_Value=64000000
283RCC.MDFFreq_Value=200000000
284RCC.MSI_VALUE=16000000
285RCC.OTGHS1Freq_Value=24000000
286RCC.OTGHS2Freq_Value=24000000
287RCC.OTGPHY1Freq_Value=24000000
288RCC.OTGPHY2Freq_Value=24000000
289RCC.PSSIFreq_Value=200000000
290RCC.PWR_Regulator_Voltage_Scale=PWR_REGULATOR_VOLTAGE_SCALE0
291RCC.RTCFreq_Value=32000
292RCC.SAI1Freq_Value=200000000
293RCC.SAI2Freq_Value=200000000
294RCC.SDMMC1Freq_Value=200000000
295RCC.SDMMC2Freq_Value=200000000
296RCC.SPDIFRX1Freq_Value=200000000
297RCC.SPI1Freq_Value=200000000
298RCC.SPI2Freq_Value=200000000
299RCC.SPI3Freq_Value=200000000
300RCC.SPI4Freq_Value=200000000
301RCC.SPI5Freq_Value=200000000
302RCC.SPI6Freq_Value=200000000
303RCC.SYSBCLKFreq_VALUE=400000000
304RCC.SYSBCLKSource=RCC_SYSCLKSOURCE_IC2_IC6_IC11
305RCC.SYSCCLKFreq_VALUE=300000000
306RCC.SYSDCLKFreq_VALUE=400000000
307RCC.TIMGFreq_Value=400000000
308RCC.UART4Freq_Value=200000000
309RCC.UART5Freq_Value=200000000
310RCC.UART7Freq_Value=200000000
311RCC.UART8Freq_Value=200000000
312RCC.UART9Freq_Value=200000000
313RCC.USART10Freq_Value=200000000
314RCC.USART1Freq_Value=200000000
315RCC.USART2Freq_Value=200000000
316RCC.USART3Freq_Value=200000000
317RCC.USART6Freq_Value=200000000
318RCC.VCO1OutputFreq_Value=1200000000
319RCC.VCO2OutputFreq_Value=1600000000
320RCC.VCO3OutputFreq_Value=1600000000
321RCC.VCO4OutputFreq_Value=1600000000
322RCC.VCOInput1Freq_Value=16000000
323RCC.VCOInput2Freq_Value=64000000
324RCC.VCOInput3Freq_Value=64000000
325RCC.VCOInput4Freq_Value=64000000
326RCC.XSPI1Freq_Value=200000000
327RCC.XSPI2ClockSelection=RCC_XSPI2CLKSOURCE_IC3
328RCC.XSPI2Freq_Value=50000000
329RCC.XSPI3Freq_Value=200000000
330RIF.DCMIPP_CID_RIMU=0
331RIF.DMA2D_CID_RIMU=0
332RIF.ETH1_CID_RIMU=0
333RIF.ETR_CID_RIMU=0
334RIF.GPU_CID_RIMU=0
335RIF.IPParameters=ETR_CID_RIMU,SDMMC1_CID_RIMU,SDMMC2_CID_RIMU,OTG1_CID_RIMU,OTG2_CID_RIMU,ETH1_CID_RIMU,GPU_CID_RIMU,DMA2D_CID_RIMU,DCMIPP_CID_RIMU,VENC_CID_RIMU,LTDC_L1_CID_RIMU,LTDC_L2_CID_RIMU
336RIF.LTDC_L1_CID_RIMU=0
337RIF.LTDC_L2_CID_RIMU=0
338RIF.OTG1_CID_RIMU=0
339RIF.OTG2_CID_RIMU=0
340RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 0\ Cid=-
341RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 0\ Privilege=true
342RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 0\ Secure=false
343RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 1\ Cid=-
344RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 1\ Privilege=true
345RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 1\ Secure=false
346RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 10\ Cid=-
347RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 10\ Privilege=true
348RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 10\ Secure=false
349RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 11\ Cid=-
350RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 11\ Privilege=true
351RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 11\ Secure=false
352RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 12\ Cid=-
353RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 12\ Privilege=true
354RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 12\ Secure=false
355RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 13\ Cid=-
356RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 13\ Privilege=true
357RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 13\ Secure=false
358RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 14\ Cid=-
359RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 14\ Privilege=true
360RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 14\ Secure=false
361RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 15\ Cid=-
362RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 15\ Privilege=true
363RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 15\ Secure=false
364RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 2\ Cid=-
365RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 2\ Privilege=true
366RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 2\ Secure=false
367RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 3\ Cid=-
368RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 3\ Privilege=true
369RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 3\ Secure=false
370RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 4\ Cid=-
371RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 4\ Privilege=true
372RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 4\ Secure=false
373RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 5\ Cid=-
374RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 5\ Privilege=true
375RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 5\ Secure=false
376RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 6\ Cid=-
377RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 6\ Privilege=true
378RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 6\ Secure=false
379RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 7\ Cid=-
380RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 7\ Privilege=true
381RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 7\ Secure=false
382RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 8\ Cid=-
383RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 8\ Privilege=true
384RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 8\ Secure=false
385RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 9\ Cid=-
386RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 9\ Privilege=true
387RIF.RIFAWARE.GPDMA1\ Feature\ GPDMA1\ channel\ 9\ Secure=false
388RIF.RIFAWARE.GPIO\ Feature\ PA0\ Cid=-
389RIF.RIFAWARE.GPIO\ Feature\ PA0\ Secure=false
390RIF.RIFAWARE.GPIO\ Feature\ PA1\ Cid=-
391RIF.RIFAWARE.GPIO\ Feature\ PA1\ Secure=false
392RIF.RIFAWARE.GPIO\ Feature\ PA10\ Cid=-
393RIF.RIFAWARE.GPIO\ Feature\ PA10\ Secure=false
394RIF.RIFAWARE.GPIO\ Feature\ PA11\ Cid=-
395RIF.RIFAWARE.GPIO\ Feature\ PA11\ Secure=false
396RIF.RIFAWARE.GPIO\ Feature\ PA12\ Cid=-
397RIF.RIFAWARE.GPIO\ Feature\ PA12\ Secure=false
398RIF.RIFAWARE.GPIO\ Feature\ PA2\ Cid=-
399RIF.RIFAWARE.GPIO\ Feature\ PA2\ Secure=false
400RIF.RIFAWARE.GPIO\ Feature\ PA3\ Cid=-
401RIF.RIFAWARE.GPIO\ Feature\ PA3\ Secure=false
402RIF.RIFAWARE.GPIO\ Feature\ PA4\ Cid=-
403RIF.RIFAWARE.GPIO\ Feature\ PA4\ Secure=false
404RIF.RIFAWARE.GPIO\ Feature\ PA5\ Cid=-
405RIF.RIFAWARE.GPIO\ Feature\ PA5\ Secure=false
406RIF.RIFAWARE.GPIO\ Feature\ PA6\ Cid=-
407RIF.RIFAWARE.GPIO\ Feature\ PA6\ Secure=false
408RIF.RIFAWARE.GPIO\ Feature\ PA7\ Cid=-
409RIF.RIFAWARE.GPIO\ Feature\ PA7\ Secure=false
410RIF.RIFAWARE.GPIO\ Feature\ PA8\ Cid=-
411RIF.RIFAWARE.GPIO\ Feature\ PA8\ Secure=false
412RIF.RIFAWARE.GPIO\ Feature\ PA9\ Cid=-
413RIF.RIFAWARE.GPIO\ Feature\ PA9\ Secure=false
414RIF.RIFAWARE.GPIO\ Feature\ PB0\ Cid=-
415RIF.RIFAWARE.GPIO\ Feature\ PB0\ Secure=false
416RIF.RIFAWARE.GPIO\ Feature\ PB1\ Cid=-
417RIF.RIFAWARE.GPIO\ Feature\ PB1\ Secure=false
418RIF.RIFAWARE.GPIO\ Feature\ PB10\ Cid=-
419RIF.RIFAWARE.GPIO\ Feature\ PB10\ Secure=false
420RIF.RIFAWARE.GPIO\ Feature\ PB11\ Cid=-
421RIF.RIFAWARE.GPIO\ Feature\ PB11\ Secure=false
422RIF.RIFAWARE.GPIO\ Feature\ PB12\ Cid=-
423RIF.RIFAWARE.GPIO\ Feature\ PB12\ Secure=false
424RIF.RIFAWARE.GPIO\ Feature\ PB13\ Cid=-
425RIF.RIFAWARE.GPIO\ Feature\ PB13\ Secure=false
426RIF.RIFAWARE.GPIO\ Feature\ PB14\ Cid=-
427RIF.RIFAWARE.GPIO\ Feature\ PB14\ Secure=false
428RIF.RIFAWARE.GPIO\ Feature\ PB15\ Cid=-
429RIF.RIFAWARE.GPIO\ Feature\ PB15\ Secure=false
430RIF.RIFAWARE.GPIO\ Feature\ PB2\ Cid=-
431RIF.RIFAWARE.GPIO\ Feature\ PB2\ Secure=false
432RIF.RIFAWARE.GPIO\ Feature\ PB3\ Cid=-
433RIF.RIFAWARE.GPIO\ Feature\ PB3\ Secure=false
434RIF.RIFAWARE.GPIO\ Feature\ PB6\ Cid=-
435RIF.RIFAWARE.GPIO\ Feature\ PB6\ Secure=false
436RIF.RIFAWARE.GPIO\ Feature\ PB7\ Cid=-
437RIF.RIFAWARE.GPIO\ Feature\ PB7\ Secure=false
438RIF.RIFAWARE.GPIO\ Feature\ PB8\ Cid=-
439RIF.RIFAWARE.GPIO\ Feature\ PB8\ Secure=false
440RIF.RIFAWARE.GPIO\ Feature\ PB9\ Cid=-
441RIF.RIFAWARE.GPIO\ Feature\ PB9\ Secure=false
442RIF.RIFAWARE.GPIO\ Feature\ PC0\ Cid=-
443RIF.RIFAWARE.GPIO\ Feature\ PC0\ Secure=false
444RIF.RIFAWARE.GPIO\ Feature\ PC1\ Cid=-
445RIF.RIFAWARE.GPIO\ Feature\ PC1\ Secure=false
446RIF.RIFAWARE.GPIO\ Feature\ PC10\ Cid=-
447RIF.RIFAWARE.GPIO\ Feature\ PC10\ Secure=false
448RIF.RIFAWARE.GPIO\ Feature\ PC11\ Cid=-
449RIF.RIFAWARE.GPIO\ Feature\ PC11\ Secure=false
450RIF.RIFAWARE.GPIO\ Feature\ PC12\ Cid=-
451RIF.RIFAWARE.GPIO\ Feature\ PC12\ Secure=false
452RIF.RIFAWARE.GPIO\ Feature\ PC13\ Cid=-
453RIF.RIFAWARE.GPIO\ Feature\ PC13\ Secure=false
454RIF.RIFAWARE.GPIO\ Feature\ PC2\ Cid=-
455RIF.RIFAWARE.GPIO\ Feature\ PC2\ Secure=false
456RIF.RIFAWARE.GPIO\ Feature\ PC3\ Cid=-
457RIF.RIFAWARE.GPIO\ Feature\ PC3\ Secure=false
458RIF.RIFAWARE.GPIO\ Feature\ PC4\ Cid=-
459RIF.RIFAWARE.GPIO\ Feature\ PC4\ Secure=false
460RIF.RIFAWARE.GPIO\ Feature\ PC5\ Cid=-
461RIF.RIFAWARE.GPIO\ Feature\ PC5\ Secure=false
462RIF.RIFAWARE.GPIO\ Feature\ PC6\ Cid=-
463RIF.RIFAWARE.GPIO\ Feature\ PC6\ Secure=false
464RIF.RIFAWARE.GPIO\ Feature\ PC7\ Cid=-
465RIF.RIFAWARE.GPIO\ Feature\ PC7\ Secure=false
466RIF.RIFAWARE.GPIO\ Feature\ PC8\ Cid=-
467RIF.RIFAWARE.GPIO\ Feature\ PC8\ Secure=false
468RIF.RIFAWARE.GPIO\ Feature\ PC9\ Cid=-
469RIF.RIFAWARE.GPIO\ Feature\ PC9\ Secure=false
470RIF.RIFAWARE.GPIO\ Feature\ PD0\ Cid=-
471RIF.RIFAWARE.GPIO\ Feature\ PD0\ Secure=false
472RIF.RIFAWARE.GPIO\ Feature\ PD1\ Cid=-
473RIF.RIFAWARE.GPIO\ Feature\ PD1\ Secure=false
474RIF.RIFAWARE.GPIO\ Feature\ PD10\ Cid=-
475RIF.RIFAWARE.GPIO\ Feature\ PD10\ Secure=false
476RIF.RIFAWARE.GPIO\ Feature\ PD11\ Cid=-
477RIF.RIFAWARE.GPIO\ Feature\ PD11\ Secure=false
478RIF.RIFAWARE.GPIO\ Feature\ PD12\ Cid=-
479RIF.RIFAWARE.GPIO\ Feature\ PD12\ Secure=false
480RIF.RIFAWARE.GPIO\ Feature\ PD13\ Cid=-
481RIF.RIFAWARE.GPIO\ Feature\ PD13\ Secure=false
482RIF.RIFAWARE.GPIO\ Feature\ PD14\ Cid=-
483RIF.RIFAWARE.GPIO\ Feature\ PD14\ Secure=false
484RIF.RIFAWARE.GPIO\ Feature\ PD15\ Cid=-
485RIF.RIFAWARE.GPIO\ Feature\ PD15\ Secure=false
486RIF.RIFAWARE.GPIO\ Feature\ PD2\ Cid=-
487RIF.RIFAWARE.GPIO\ Feature\ PD2\ Secure=false
488RIF.RIFAWARE.GPIO\ Feature\ PD3\ Cid=-
489RIF.RIFAWARE.GPIO\ Feature\ PD3\ Secure=false
490RIF.RIFAWARE.GPIO\ Feature\ PD4\ Cid=-
491RIF.RIFAWARE.GPIO\ Feature\ PD4\ Secure=false
492RIF.RIFAWARE.GPIO\ Feature\ PD5\ Cid=-
493RIF.RIFAWARE.GPIO\ Feature\ PD5\ Secure=false
494RIF.RIFAWARE.GPIO\ Feature\ PD6\ Cid=-
495RIF.RIFAWARE.GPIO\ Feature\ PD6\ Secure=false
496RIF.RIFAWARE.GPIO\ Feature\ PD7\ Cid=-
497RIF.RIFAWARE.GPIO\ Feature\ PD7\ Secure=false
498RIF.RIFAWARE.GPIO\ Feature\ PD8\ Cid=-
499RIF.RIFAWARE.GPIO\ Feature\ PD8\ Secure=false
500RIF.RIFAWARE.GPIO\ Feature\ PD9\ Cid=-
501RIF.RIFAWARE.GPIO\ Feature\ PD9\ Secure=false
502RIF.RIFAWARE.GPIO\ Feature\ PE0\ Cid=-
503RIF.RIFAWARE.GPIO\ Feature\ PE0\ Secure=false
504RIF.RIFAWARE.GPIO\ Feature\ PE1\ Cid=-
505RIF.RIFAWARE.GPIO\ Feature\ PE1\ Secure=false
506RIF.RIFAWARE.GPIO\ Feature\ PE10\ Cid=-
507RIF.RIFAWARE.GPIO\ Feature\ PE10\ Secure=false
508RIF.RIFAWARE.GPIO\ Feature\ PE11\ Cid=-
509RIF.RIFAWARE.GPIO\ Feature\ PE11\ Secure=false
510RIF.RIFAWARE.GPIO\ Feature\ PE12\ Cid=-
511RIF.RIFAWARE.GPIO\ Feature\ PE12\ Secure=false
512RIF.RIFAWARE.GPIO\ Feature\ PE13\ Cid=-
513RIF.RIFAWARE.GPIO\ Feature\ PE13\ Secure=false
514RIF.RIFAWARE.GPIO\ Feature\ PE14\ Cid=-
515RIF.RIFAWARE.GPIO\ Feature\ PE14\ Secure=false
516RIF.RIFAWARE.GPIO\ Feature\ PE15\ Cid=-
517RIF.RIFAWARE.GPIO\ Feature\ PE15\ Secure=false
518RIF.RIFAWARE.GPIO\ Feature\ PE2\ Cid=-
519RIF.RIFAWARE.GPIO\ Feature\ PE2\ Secure=false
520RIF.RIFAWARE.GPIO\ Feature\ PE3\ Cid=-
521RIF.RIFAWARE.GPIO\ Feature\ PE3\ Secure=false
522RIF.RIFAWARE.GPIO\ Feature\ PE4\ Cid=-
523RIF.RIFAWARE.GPIO\ Feature\ PE4\ Secure=false
524RIF.RIFAWARE.GPIO\ Feature\ PE5\ Cid=-
525RIF.RIFAWARE.GPIO\ Feature\ PE5\ Secure=false
526RIF.RIFAWARE.GPIO\ Feature\ PE6\ Cid=-
527RIF.RIFAWARE.GPIO\ Feature\ PE6\ Secure=false
528RIF.RIFAWARE.GPIO\ Feature\ PE7\ Cid=-
529RIF.RIFAWARE.GPIO\ Feature\ PE7\ Secure=false
530RIF.RIFAWARE.GPIO\ Feature\ PE8\ Cid=-
531RIF.RIFAWARE.GPIO\ Feature\ PE8\ Secure=false
532RIF.RIFAWARE.GPIO\ Feature\ PE9\ Cid=-
533RIF.RIFAWARE.GPIO\ Feature\ PE9\ Secure=false
534RIF.RIFAWARE.GPIO\ Feature\ PF0\ Cid=-
535RIF.RIFAWARE.GPIO\ Feature\ PF0\ Secure=false
536RIF.RIFAWARE.GPIO\ Feature\ PF1\ Cid=-
537RIF.RIFAWARE.GPIO\ Feature\ PF1\ Secure=false
538RIF.RIFAWARE.GPIO\ Feature\ PF10\ Cid=-
539RIF.RIFAWARE.GPIO\ Feature\ PF10\ Secure=false
540RIF.RIFAWARE.GPIO\ Feature\ PF11\ Cid=-
541RIF.RIFAWARE.GPIO\ Feature\ PF11\ Secure=false
542RIF.RIFAWARE.GPIO\ Feature\ PF12\ Cid=-
543RIF.RIFAWARE.GPIO\ Feature\ PF12\ Secure=false
544RIF.RIFAWARE.GPIO\ Feature\ PF13\ Cid=-
545RIF.RIFAWARE.GPIO\ Feature\ PF13\ Secure=false
546RIF.RIFAWARE.GPIO\ Feature\ PF14\ Cid=-
547RIF.RIFAWARE.GPIO\ Feature\ PF14\ Secure=false
548RIF.RIFAWARE.GPIO\ Feature\ PF15\ Cid=-
549RIF.RIFAWARE.GPIO\ Feature\ PF15\ Secure=false
550RIF.RIFAWARE.GPIO\ Feature\ PF2\ Cid=-
551RIF.RIFAWARE.GPIO\ Feature\ PF2\ Secure=false
552RIF.RIFAWARE.GPIO\ Feature\ PF3\ Cid=-
553RIF.RIFAWARE.GPIO\ Feature\ PF3\ Secure=false
554RIF.RIFAWARE.GPIO\ Feature\ PF4\ Cid=-
555RIF.RIFAWARE.GPIO\ Feature\ PF4\ Secure=false
556RIF.RIFAWARE.GPIO\ Feature\ PF5\ Cid=-
557RIF.RIFAWARE.GPIO\ Feature\ PF5\ Secure=false
558RIF.RIFAWARE.GPIO\ Feature\ PF6\ Cid=-
559RIF.RIFAWARE.GPIO\ Feature\ PF6\ Secure=false
560RIF.RIFAWARE.GPIO\ Feature\ PF7\ Cid=-
561RIF.RIFAWARE.GPIO\ Feature\ PF7\ Secure=false
562RIF.RIFAWARE.GPIO\ Feature\ PF8\ Cid=-
563RIF.RIFAWARE.GPIO\ Feature\ PF8\ Secure=false
564RIF.RIFAWARE.GPIO\ Feature\ PF9\ Cid=-
565RIF.RIFAWARE.GPIO\ Feature\ PF9\ Secure=false
566RIF.RIFAWARE.GPIO\ Feature\ PG0\ Cid=1
567RIF.RIFAWARE.GPIO\ Feature\ PG0\ FSBL=true
568RIF.RIFAWARE.GPIO\ Feature\ PG0\ Secure=true
569RIF.RIFAWARE.GPIO\ Feature\ PG1\ Cid=-
570RIF.RIFAWARE.GPIO\ Feature\ PG1\ Secure=false
571RIF.RIFAWARE.GPIO\ Feature\ PG10\ Cid=-
572RIF.RIFAWARE.GPIO\ Feature\ PG10\ Secure=false
573RIF.RIFAWARE.GPIO\ Feature\ PG11\ Cid=-
574RIF.RIFAWARE.GPIO\ Feature\ PG11\ Secure=false
575RIF.RIFAWARE.GPIO\ Feature\ PG12\ Cid=-
576RIF.RIFAWARE.GPIO\ Feature\ PG12\ Secure=false
577RIF.RIFAWARE.GPIO\ Feature\ PG13\ Cid=-
578RIF.RIFAWARE.GPIO\ Feature\ PG13\ Secure=false
579RIF.RIFAWARE.GPIO\ Feature\ PG14\ Cid=-
580RIF.RIFAWARE.GPIO\ Feature\ PG14\ Secure=false
581RIF.RIFAWARE.GPIO\ Feature\ PG15\ Cid=-
582RIF.RIFAWARE.GPIO\ Feature\ PG15\ Secure=false
583RIF.RIFAWARE.GPIO\ Feature\ PG2\ Cid=-
584RIF.RIFAWARE.GPIO\ Feature\ PG2\ Secure=false
585RIF.RIFAWARE.GPIO\ Feature\ PG3\ Cid=-
586RIF.RIFAWARE.GPIO\ Feature\ PG3\ Secure=false
587RIF.RIFAWARE.GPIO\ Feature\ PG4\ Cid=-
588RIF.RIFAWARE.GPIO\ Feature\ PG4\ Secure=false
589RIF.RIFAWARE.GPIO\ Feature\ PG5\ Cid=-
590RIF.RIFAWARE.GPIO\ Feature\ PG5\ Secure=false
591RIF.RIFAWARE.GPIO\ Feature\ PG6\ Cid=-
592RIF.RIFAWARE.GPIO\ Feature\ PG6\ Secure=false
593RIF.RIFAWARE.GPIO\ Feature\ PG7\ Cid=-
594RIF.RIFAWARE.GPIO\ Feature\ PG7\ Secure=false
595RIF.RIFAWARE.GPIO\ Feature\ PG8\ Cid=-
596RIF.RIFAWARE.GPIO\ Feature\ PG8\ Secure=false
597RIF.RIFAWARE.GPIO\ Feature\ PG9\ Cid=-
598RIF.RIFAWARE.GPIO\ Feature\ PG9\ Secure=false
599RIF.RIFAWARE.GPIO\ Feature\ PH2\ Cid=-
600RIF.RIFAWARE.GPIO\ Feature\ PH2\ Secure=false
601RIF.RIFAWARE.GPIO\ Feature\ PH3\ Cid=-
602RIF.RIFAWARE.GPIO\ Feature\ PH3\ Secure=false
603RIF.RIFAWARE.GPIO\ Feature\ PH4\ Cid=-
604RIF.RIFAWARE.GPIO\ Feature\ PH4\ Secure=false
605RIF.RIFAWARE.GPIO\ Feature\ PH5\ Cid=-
606RIF.RIFAWARE.GPIO\ Feature\ PH5\ Secure=false
607RIF.RIFAWARE.GPIO\ Feature\ PH6\ Cid=-
608RIF.RIFAWARE.GPIO\ Feature\ PH6\ Secure=false
609RIF.RIFAWARE.GPIO\ Feature\ PH7\ Cid=-
610RIF.RIFAWARE.GPIO\ Feature\ PH7\ Secure=false
611RIF.RIFAWARE.GPIO\ Feature\ PH8\ Cid=-
612RIF.RIFAWARE.GPIO\ Feature\ PH8\ Secure=false
613RIF.RIFAWARE.GPIO\ Feature\ PH9\ Cid=-
614RIF.RIFAWARE.GPIO\ Feature\ PH9\ Secure=false
615RIF.RIFAWARE.GPIO\ Feature\ PN0\ Cid=-
616RIF.RIFAWARE.GPIO\ Feature\ PN0\ Secure=false
617RIF.RIFAWARE.GPIO\ Feature\ PN1\ Cid=-
618RIF.RIFAWARE.GPIO\ Feature\ PN1\ Secure=false
619RIF.RIFAWARE.GPIO\ Feature\ PN10\ Cid=-
620RIF.RIFAWARE.GPIO\ Feature\ PN10\ Secure=false
621RIF.RIFAWARE.GPIO\ Feature\ PN11\ Cid=-
622RIF.RIFAWARE.GPIO\ Feature\ PN11\ Secure=false
623RIF.RIFAWARE.GPIO\ Feature\ PN12\ Cid=-
624RIF.RIFAWARE.GPIO\ Feature\ PN12\ Secure=false
625RIF.RIFAWARE.GPIO\ Feature\ PN2\ Cid=-
626RIF.RIFAWARE.GPIO\ Feature\ PN2\ Secure=false
627RIF.RIFAWARE.GPIO\ Feature\ PN3\ Cid=-
628RIF.RIFAWARE.GPIO\ Feature\ PN3\ Secure=false
629RIF.RIFAWARE.GPIO\ Feature\ PN4\ Cid=-
630RIF.RIFAWARE.GPIO\ Feature\ PN4\ Secure=false
631RIF.RIFAWARE.GPIO\ Feature\ PN5\ Cid=-
632RIF.RIFAWARE.GPIO\ Feature\ PN5\ Secure=false
633RIF.RIFAWARE.GPIO\ Feature\ PN6\ Cid=-
634RIF.RIFAWARE.GPIO\ Feature\ PN6\ Secure=false
635RIF.RIFAWARE.GPIO\ Feature\ PN7\ Cid=-
636RIF.RIFAWARE.GPIO\ Feature\ PN7\ Secure=false
637RIF.RIFAWARE.GPIO\ Feature\ PN8\ Cid=-
638RIF.RIFAWARE.GPIO\ Feature\ PN8\ Secure=false
639RIF.RIFAWARE.GPIO\ Feature\ PN9\ Cid=-
640RIF.RIFAWARE.GPIO\ Feature\ PN9\ Secure=false
641RIF.RIFAWARE.GPIO\ Feature\ PO0\ Cid=-
642RIF.RIFAWARE.GPIO\ Feature\ PO0\ Secure=false
643RIF.RIFAWARE.GPIO\ Feature\ PO1\ Cid=-
644RIF.RIFAWARE.GPIO\ Feature\ PO1\ Secure=false
645RIF.RIFAWARE.GPIO\ Feature\ PO2\ Cid=-
646RIF.RIFAWARE.GPIO\ Feature\ PO2\ Secure=false
647RIF.RIFAWARE.GPIO\ Feature\ PO3\ Cid=-
648RIF.RIFAWARE.GPIO\ Feature\ PO3\ Secure=false
649RIF.RIFAWARE.GPIO\ Feature\ PO4\ Cid=-
650RIF.RIFAWARE.GPIO\ Feature\ PO4\ Secure=false
651RIF.RIFAWARE.GPIO\ Feature\ PO5\ Cid=-
652RIF.RIFAWARE.GPIO\ Feature\ PO5\ Secure=false
653RIF.RIFAWARE.GPIO\ Feature\ PP0\ Cid=-
654RIF.RIFAWARE.GPIO\ Feature\ PP0\ Secure=false
655RIF.RIFAWARE.GPIO\ Feature\ PP1\ Cid=-
656RIF.RIFAWARE.GPIO\ Feature\ PP1\ Secure=false
657RIF.RIFAWARE.GPIO\ Feature\ PP10\ Cid=-
658RIF.RIFAWARE.GPIO\ Feature\ PP10\ Secure=false
659RIF.RIFAWARE.GPIO\ Feature\ PP11\ Cid=-
660RIF.RIFAWARE.GPIO\ Feature\ PP11\ Secure=false
661RIF.RIFAWARE.GPIO\ Feature\ PP12\ Cid=-
662RIF.RIFAWARE.GPIO\ Feature\ PP12\ Secure=false
663RIF.RIFAWARE.GPIO\ Feature\ PP13\ Cid=-
664RIF.RIFAWARE.GPIO\ Feature\ PP13\ Secure=false
665RIF.RIFAWARE.GPIO\ Feature\ PP14\ Cid=-
666RIF.RIFAWARE.GPIO\ Feature\ PP14\ Secure=false
667RIF.RIFAWARE.GPIO\ Feature\ PP15\ Cid=-
668RIF.RIFAWARE.GPIO\ Feature\ PP15\ Secure=false
669RIF.RIFAWARE.GPIO\ Feature\ PP2\ Cid=-
670RIF.RIFAWARE.GPIO\ Feature\ PP2\ Secure=false
671RIF.RIFAWARE.GPIO\ Feature\ PP3\ Cid=-
672RIF.RIFAWARE.GPIO\ Feature\ PP3\ Secure=false
673RIF.RIFAWARE.GPIO\ Feature\ PP4\ Cid=-
674RIF.RIFAWARE.GPIO\ Feature\ PP4\ Secure=false
675RIF.RIFAWARE.GPIO\ Feature\ PP5\ Cid=-
676RIF.RIFAWARE.GPIO\ Feature\ PP5\ Secure=false
677RIF.RIFAWARE.GPIO\ Feature\ PP6\ Cid=-
678RIF.RIFAWARE.GPIO\ Feature\ PP6\ Secure=false
679RIF.RIFAWARE.GPIO\ Feature\ PP7\ Cid=-
680RIF.RIFAWARE.GPIO\ Feature\ PP7\ Secure=false
681RIF.RIFAWARE.GPIO\ Feature\ PP8\ Cid=-
682RIF.RIFAWARE.GPIO\ Feature\ PP8\ Secure=false
683RIF.RIFAWARE.GPIO\ Feature\ PP9\ Cid=-
684RIF.RIFAWARE.GPIO\ Feature\ PP9\ Secure=false
685RIF.RIFAWARE.GPIO\ Feature\ PQ0\ Cid=-
686RIF.RIFAWARE.GPIO\ Feature\ PQ0\ Secure=false
687RIF.RIFAWARE.GPIO\ Feature\ PQ1\ Cid=-
688RIF.RIFAWARE.GPIO\ Feature\ PQ1\ Secure=false
689RIF.RIFAWARE.GPIO\ Feature\ PQ2\ Cid=-
690RIF.RIFAWARE.GPIO\ Feature\ PQ2\ Secure=false
691RIF.RIFAWARE.GPIO\ Feature\ PQ3\ Cid=-
692RIF.RIFAWARE.GPIO\ Feature\ PQ3\ Secure=false
693RIF.RIFAWARE.GPIO\ Feature\ PQ4\ Cid=-
694RIF.RIFAWARE.GPIO\ Feature\ PQ4\ Secure=false
695RIF.RIFAWARE.GPIO\ Feature\ PQ5\ Cid=-
696RIF.RIFAWARE.GPIO\ Feature\ PQ5\ Secure=false
697RIF.RIFAWARE.GPIO\ Feature\ PQ6\ Cid=-
698RIF.RIFAWARE.GPIO\ Feature\ PQ6\ Secure=false
699RIF.RIFAWARE.GPIO\ Feature\ PQ7\ Cid=-
700RIF.RIFAWARE.GPIO\ Feature\ PQ7\ Secure=false
701RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 0\ Cid=-
702RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 0\ Privilege=true
703RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 0\ Secure=false
704RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 1\ Cid=-
705RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 1\ Privilege=true
706RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 1\ Secure=false
707RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 10\ Cid=-
708RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 10\ Privilege=true
709RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 10\ Secure=false
710RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 11\ Cid=-
711RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 11\ Privilege=true
712RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 11\ Secure=false
713RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 12\ Cid=-
714RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 12\ Privilege=true
715RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 12\ Secure=false
716RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 13\ Cid=-
717RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 13\ Privilege=true
718RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 13\ Secure=false
719RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 14\ Cid=-
720RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 14\ Privilege=true
721RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 14\ Secure=false
722RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 15\ Cid=-
723RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 15\ Privilege=true
724RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 15\ Secure=false
725RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 2\ Cid=-
726RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 2\ Privilege=true
727RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 2\ Secure=false
728RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 3\ Cid=-
729RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 3\ Privilege=true
730RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 3\ Secure=false
731RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 4\ Cid=-
732RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 4\ Privilege=true
733RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 4\ Secure=false
734RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 5\ Cid=-
735RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 5\ Privilege=true
736RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 5\ Secure=false
737RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 6\ Cid=-
738RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 6\ Privilege=true
739RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 6\ Secure=false
740RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 7\ Cid=-
741RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 7\ Privilege=true
742RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 7\ Secure=false
743RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 8\ Cid=-
744RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 8\ Privilege=true
745RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 8\ Secure=false
746RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 9\ Cid=-
747RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 9\ Privilege=true
748RIF.RIFAWARE.HPDMA1\ Feature\ HPDMA1\ channel\ 9\ Secure=false
749RIF.RIFAWARE.LTDC\ Feature\ LTDC_L1\ Cid=-
750RIF.RIFAWARE.LTDC\ Feature\ LTDC_L1\ Secure=false
751RIF.RIFAWARE.LTDC\ Feature\ LTDC_L2\ Cid=-
752RIF.RIFAWARE.LTDC\ Feature\ LTDC_L2\ Secure=false
753RIF.RIFAWARE.PWR\ Feature\ Backup\ domain\ protection\ Cid=-
754RIF.RIFAWARE.PWR\ Feature\ Backup\ domain\ protection\ Secure=false
755RIF.RIFAWARE.PWR\ Feature\ CPU\ power\ control\ protection\ Cid=-
756RIF.RIFAWARE.PWR\ Feature\ CPU\ power\ control\ protection\ Secure=false
757RIF.RIFAWARE.PWR\ Feature\ I-TCM,\ D-TCM,\ and\ I-TCM\ FLEXMEM\ low\ power\ control\ protection\ Cid=-
758RIF.RIFAWARE.PWR\ Feature\ I-TCM,\ D-TCM,\ and\ I-TCM\ FLEXMEM\ low\ power\ control\ protection\ Secure=false
759RIF.RIFAWARE.PWR\ Feature\ Peripheral\ voltage\ monitor\ protection\ Cid=-
760RIF.RIFAWARE.PWR\ Feature\ Peripheral\ voltage\ monitor\ protection\ Secure=false
761RIF.RIFAWARE.PWR\ Feature\ Programmable\ voltage\ detector\ protection\ Cid=-
762RIF.RIFAWARE.PWR\ Feature\ Programmable\ voltage\ detector\ protection\ Secure=false
763RIF.RIFAWARE.PWR\ Feature\ System\ supply\ configuration\ protection\ Cid=-
764RIF.RIFAWARE.PWR\ Feature\ System\ supply\ configuration\ protection\ Secure=false
765RIF.RIFAWARE.PWR\ Feature\ VDDCORE\ monitor\ protection\ Cid=-
766RIF.RIFAWARE.PWR\ Feature\ VDDCORE\ monitor\ protection\ Secure=false
767RIF.RIFAWARE.PWR\ Feature\ Voltage\ scaling\ selection\ protection\ Cid=-
768RIF.RIFAWARE.PWR\ Feature\ Voltage\ scaling\ selection\ protection\ Secure=false
769RIF.RIFAWARE.PWR\ Feature\ WKUP1\ pin\ protection\ Cid=-
770RIF.RIFAWARE.PWR\ Feature\ WKUP1\ pin\ protection\ Secure=false
771RIF.RIFAWARE.PWR\ Feature\ WKUP2\ pin\ protection\ Cid=-
772RIF.RIFAWARE.PWR\ Feature\ WKUP2\ pin\ protection\ Secure=false
773RIF.RIFAWARE.PWR\ Feature\ WKUP3\ pin\ protection\ Cid=-
774RIF.RIFAWARE.PWR\ Feature\ WKUP3\ pin\ protection\ Secure=false
775RIF.RIFAWARE.PWR\ Feature\ WKUP4\ pin\ protection\ Cid=-
776RIF.RIFAWARE.PWR\ Feature\ WKUP4\ pin\ protection\ Secure=false
777RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ BUS\ system\ configuration\ bits\ Cid=-
778RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ BUS\ system\ configuration\ bits\ Secure=false
779RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ DFT\ system\ configuration\ bits\ Cid=-
780RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ DFT\ system\ configuration\ bits\ Secure=false
781RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC1\ divider\ configuration\ bits\ Cid=-
782RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC1\ divider\ configuration\ bits\ Secure=false
783RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC10\ divider\ configuration\ bits\ Cid=-
784RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC10\ divider\ configuration\ bits\ Secure=false
785RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC11\ divider\ configuration\ bits\ Cid=-
786RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC11\ divider\ configuration\ bits\ Secure=false
787RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC12\ divider\ configuration\ bits\ Cid=-
788RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC12\ divider\ configuration\ bits\ Secure=false
789RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC13\ divider\ configuration\ bits\ Cid=-
790RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC13\ divider\ configuration\ bits\ Secure=false
791RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC14\ divider\ configuration\ bits\ Cid=-
792RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC14\ divider\ configuration\ bits\ Secure=false
793RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC15\ divider\ configuration\ bits\ Cid=-
794RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC15\ divider\ configuration\ bits\ Secure=false
795RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC16\ divider\ configuration\ bits\ Cid=-
796RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC16\ divider\ configuration\ bits\ Secure=false
797RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC17\ divider\ configuration\ bits\ Cid=-
798RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC17\ divider\ configuration\ bits\ Secure=false
799RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC18\ divider\ configuration\ bits\ Cid=-
800RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC18\ divider\ configuration\ bits\ Secure=false
801RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC19\ divider\ configuration\ bits\ Cid=-
802RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC19\ divider\ configuration\ bits\ Secure=false
803RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC2\ divider\ configuration\ bits\ Cid=-
804RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC2\ divider\ configuration\ bits\ Secure=false
805RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC20\ divider\ configuration\ bits\ Cid=-
806RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC20\ divider\ configuration\ bits\ Secure=false
807RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC3\ divider\ configuration\ bits\ Cid=-
808RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC3\ divider\ configuration\ bits\ Secure=false
809RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC4\ divider\ configuration\ bits\ Cid=-
810RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC4\ divider\ configuration\ bits\ Secure=false
811RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC5\ divider\ configuration\ bits\ Cid=-
812RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC5\ divider\ configuration\ bits\ Secure=false
813RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC6\ divider\ configuration\ bits\ Cid=-
814RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC6\ divider\ configuration\ bits\ Secure=false
815RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC7\ divider\ configuration\ bits\ Cid=-
816RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC7\ divider\ configuration\ bits\ Secure=false
817RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC8\ divider\ configuration\ bits\ Cid=-
818RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC8\ divider\ configuration\ bits\ Secure=false
819RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC9\ divider\ configuration\ bits\ Cid=-
820RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ IC9\ divider\ configuration\ bits\ Secure=false
821RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ INT\ system\ configuration\ bits\ Cid=-
822RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ INT\ system\ configuration\ bits\ Secure=false
823RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ MOD\ system\ configuration\ bits\ Cid=-
824RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ MOD\ system\ configuration\ bits\ Secure=false
825RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ PER\ system\ configuration\ bits\ Cid=-
826RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ PER\ system\ configuration\ bits\ Secure=false
827RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ PLL1\ configuration\ bits\u200B\ Cid=-
828RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ PLL1\ configuration\ bits\u200B\ Secure=false
829RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ PLL2\ configuration\ bits\ Cid=-
830RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ PLL2\ configuration\ bits\ Secure=false
831RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ PLL3\ configuration\ bits\ Cid=-
832RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ PLL3\ configuration\ bits\ Secure=false
833RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ PLL4\ configuration\ bits\ Cid=-
834RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ PLL4\ configuration\ bits\ Secure=false
835RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ RST\ system\ configuration\ bits\ Cid=-
836RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ RST\ system\ configuration\ bits\ Secure=false
837RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ SYS\ system\ configuration\ bit\ Cid=-
838RIF.RIFAWARE.RCC\ Feature\ Protection\ of\ SYS\ system\ configuration\ bit\ Secure=false
839RIF.RIFAWARE.RCC\ Feature\ protection\ of\ ACLKN\ bus\ configuration\ bits\ Cid=-
840RIF.RIFAWARE.RCC\ Feature\ protection\ of\ ACLKN\ bus\ configuration\ bits\ Secure=false
841RIF.RIFAWARE.RCC\ Feature\ protection\ of\ ACLKNC\ bus\ configuration\ bits\ Cid=-
842RIF.RIFAWARE.RCC\ Feature\ protection\ of\ ACLKNC\ bus\ configuration\ bits\ Secure=false
843RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHB1\ bus\ configuration\ bits\ Cid=-
844RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHB1\ bus\ configuration\ bits\ Secure=false
845RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHB2\ bus\ configuration\ bits\ Cid=-
846RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHB2\ bus\ configuration\ bits\ Secure=false
847RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHB3\ bus\ configuration\ bits\ Cid=-
848RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHB3\ bus\ configuration\ bits\ Secure=false
849RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHB4\ bus\ configuration\ bits\ Cid=-
850RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHB4\ bus\ configuration\ bits\ Secure=false
851RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHB5\ bus\ configuration\ bits\ Cid=-
852RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHB5\ bus\ configuration\ bits\ Secure=false
853RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHBM\ bus\ configuration\ bits\ Cid=-
854RIF.RIFAWARE.RCC\ Feature\ protection\ of\ AHBM\ bus\ configuration\ bits\ Secure=false
855RIF.RIFAWARE.RCC\ Feature\ protection\ of\ APB1\ bus\ configuration\ bits\ Cid=-
856RIF.RIFAWARE.RCC\ Feature\ protection\ of\ APB1\ bus\ configuration\ bits\ Secure=false
857RIF.RIFAWARE.RCC\ Feature\ protection\ of\ APB2\ bus\ configuration\ bits\ Cid=-
858RIF.RIFAWARE.RCC\ Feature\ protection\ of\ APB2\ bus\ configuration\ bits\ Secure=false
859RIF.RIFAWARE.RCC\ Feature\ protection\ of\ APB3\ bus\ configuration\ bits\ Cid=-
860RIF.RIFAWARE.RCC\ Feature\ protection\ of\ APB3\ bus\ configuration\ bits\ Secure=false
861RIF.RIFAWARE.RCC\ Feature\ protection\ of\ APB4\ bus\ configuration\ bits\ Cid=-
862RIF.RIFAWARE.RCC\ Feature\ protection\ of\ APB4\ bus\ configuration\ bits\ Secure=false
863RIF.RIFAWARE.RCC\ Feature\ protection\ of\ APB5\ bus\ configuration\ bits\ Cid=-
864RIF.RIFAWARE.RCC\ Feature\ protection\ of\ APB5\ bus\ configuration\ bits\ Secure=false
865RIF.RIFAWARE.RCC\ Feature\ protection\ of\ NOC\ bus\ configuration\ bits\ Cid=-
866RIF.RIFAWARE.RCC\ Feature\ protection\ of\ NOC\ bus\ configuration\ bits\ Secure=false
867RIF.RIFAWARE.RTC\ Feature\ Alarm\ A\ and\ SSR\ underflow\ protection\u200B\ Cid=-
868RIF.RIFAWARE.RTC\ Feature\ Alarm\ A\ and\ SSR\ underflow\ protection\u200B\ Secure=false
869RIF.RIFAWARE.RTC\ Feature\ Alarm\ B\ protection\ Cid=-
870RIF.RIFAWARE.RTC\ Feature\ Alarm\ B\ protection\ Secure=false
871RIF.RIFAWARE.RTC\ Feature\ Initialization\ protection\ Cid=-
872RIF.RIFAWARE.RTC\ Feature\ Initialization\ protection\ Secure=false
873RIF.RIFAWARE.RTC\ Feature\ RTC\ global\ protection\ Cid=-
874RIF.RIFAWARE.RTC\ Feature\ RTC\ global\ protection\ Secure=false
875RIF.RIFAWARE.RTC\ Feature\ Shift\ register,\ daylight\ saving,\ calibration\ and\ reference\ clock\ protection\ Cid=-
876RIF.RIFAWARE.RTC\ Feature\ Shift\ register,\ daylight\ saving,\ calibration\ and\ reference\ clock\ protection\ Secure=false
877RIF.RIFAWARE.RTC\ Feature\ Timestamp\ protection\ Cid=-
878RIF.RIFAWARE.RTC\ Feature\ Timestamp\ protection\ Secure=false
879RIF.RIFAWARE.RTC\ Feature\ Wake-up\ timer\ protection\ Cid=-
880RIF.RIFAWARE.RTC\ Feature\ Wake-up\ timer\ protection\ Secure=false
881RIF.SDMMC1_CID_RIMU=0
882RIF.SDMMC2_CID_RIMU=0
883RIF.VENC_CID_RIMU=0
884RIF.default_config=false
[18]885VP_BSEC_VS_BSEC.Mode=BSEC_Activate
886VP_BSEC_VS_BSEC.Signal=BSEC_VS_BSEC
887VP_EXTMEM_MANAGER_SIG_Activate_EXTMEM.Mode=Activate_EXTMEM
888VP_EXTMEM_MANAGER_SIG_Activate_EXTMEM.Signal=EXTMEM_MANAGER_SIG_Activate_EXTMEM
[16]889VP_RIF_VS_RIF1.Mode=RISUP
890VP_RIF_VS_RIF1.Signal=RIF_VS_RIF1
891VP_XSPI2_VS_octo.Mode=octo_mode
892VP_XSPI2_VS_octo.Signal=XSPI2_VS_octo
893VP_XSPIM_VS_IO.Mode=Direct
894VP_XSPIM_VS_IO.Signal=XSPIM_VS_IO
895XSPI2.ChipSelectHighTimeCycle=2
896XSPI2.ClockPrescaler=0
897XSPI2.DelayHoldQuarterCycle=HAL_XSPI_DHQC_ENABLE
898XSPI2.FifoThresholdByte=4
899XSPI2.IPParameters=FifoThresholdByte,MemoryType,MemorySize,ClockPrescaler,DelayHoldQuarterCycle,MemoryMode,ChipSelectHighTimeCycle
900XSPI2.MemoryMode=HAL_XSPI_SINGLE_MEM
901XSPI2.MemorySize=HAL_XSPI_SIZE_512MB
902XSPI2.MemoryType=HAL_XSPI_MEMTYPE_MACRONIX
903board=custom
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