Index: /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Core/LICENSE.txt =================================================================== --- /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Core/LICENSE.txt (revision 60) +++ /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Core/LICENSE.txt (revision 60) @@ -0,0 +1,86 @@ +This software component is provided to you as part of a software package and +applicable license terms are in the Package_license file. If you received this +software component outside of a package or without applicable license terms, +the terms of the SLA0044 license shall apply and are fully reproduced below: + +SLA0044 Rev5/February 2018 + +Software license agreement + +ULTIMATE LIBERTY SOFTWARE LICENSE AGREEMENT + +BY INSTALLING, COPYING, DOWNLOADING, ACCESSING OR OTHERWISE USING THIS SOFTWARE +OR ANY PART THEREOF (AND THE RELATED DOCUMENTATION) FROM STMICROELECTRONICS +INTERNATIONAL N.V, SWISS BRANCH AND/OR ITS AFFILIATED COMPANIES +(STMICROELECTRONICS), THE RECIPIENT, ON BEHALF OF HIMSELF OR HERSELF, OR ON +BEHALF OF ANY ENTITY BY WHICH SUCH RECIPIENT IS EMPLOYED AND/OR ENGAGED AGREES +TO BE BOUND BY THIS SOFTWARE LICENSE AGREEMENT. + +Under STMicroelectronics’ intellectual property rights, the redistribution, +reproduction and use in source and binary forms of the software or any part +thereof, with or without modification, are permitted provided that the following +conditions are met: + +1. Redistribution of source code (modified or not) must retain any copyright +notice, this list of conditions and the disclaimer set forth below as items 10 +and 11. + +2. Redistributions in binary form, except as embedded into microcontroller or +microprocessor device manufactured by or for STMicroelectronics or a software +update for such device, must reproduce any copyright notice provided with the +binary code, this list of conditions, and the disclaimer set forth below as +items 10 and 11, in documentation and/or other materials provided with the +distribution. + +3. Neither the name of STMicroelectronics nor the names of other contributors to +this software may be used to endorse or promote products derived from this +software or part thereof without specific written permission. + +4. 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THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" AND +ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS, WHICH ARE +DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT SHALL +STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF +LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE +OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF +ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +11. EXCEPT AS EXPRESSLY PERMITTED HEREUNDER, NO LICENSE OR OTHER RIGHTS, WHETHER +EXPRESS OR IMPLIED, ARE GRANTED UNDER ANY PATENT OR OTHER INTELLECTUAL PROPERTY +RIGHTS OF STMICROELECTRONICS OR ANY THIRD PARTY. + Index: /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Core/inc/usbpd_core.h =================================================================== --- /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Core/inc/usbpd_core.h (revision 60) +++ /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Core/inc/usbpd_core.h (revision 60) @@ -0,0 +1,1188 @@ +/** + ****************************************************************************** + * @file usbpd_core.h + * @author MCD Application Team + * @brief This file contains the core stack API. + ****************************************************************************** + * @attention + * + * Copyright (c) 2021 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +#ifndef USBPD_CORE_H_ +#define USBPD_CORE_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "usbpd_def.h" +#if defined(USBPDCORE_TCPM_SUPPORT) +#include "tcpc.h" +#endif /* USBPDCORE_TCPM_SUPPORT */ + +/** @addtogroup STM32_USBPD_LIBRARY + * @{ + */ + +/** @addtogroup USBPD_CORE + * @{ + */ + +/** @addtogroup USBPD_CORE_CAD + * @{ + */ + +/* Exported types ------------------------------------------------------------*/ +/** @defgroup USBPD_CORE_CAD_Exported_Types USBPD CORE CAD Exported Types + * @{ + */ + +/** + * @brief function return value @ref USBPD_CORE_CAD + * @{ + */ +typedef enum +{ + USBPD_CAD_OK, /*!< USBPD CAD Status OK */ + USBPD_CAD_INVALID_PORT, /*!< USBPD CAD Status INVALID PORT */ + USBPD_CAD_ERROR, /*!< USBPD CAD Status ERROR */ + USBPD_CAD_MALLOCERROR, /*!< USBPD CAD Status ERROR MALLOC */ + USBPD_CAD_INVALIDRESISTOR /*!< USBPD CAD Status INVALID RESISTOR */ +} +USBPD_CAD_StatusTypeDef; +/** + * @} + */ + +/** + * @brief activation value @ref USBPD_CORE_CAD + * @{ + */ +typedef enum +{ + USBPD_CAD_DISABLE, /*!< USBPD CAD activation status Disable */ + USBPD_CAD_ENABLE /*!< USBPD CAD activation status Enable */ +} USBPD_CAD_activation; +/** + * @} + */ + +/** + * @brief CallBacks exposed by the @ref USBPD_CORE_CAD + */ +typedef struct +{ + /** + * @brief CallBack used to report events to DPM. + * @param PortNum The handle of the port + * @param State CAD state @ref USBPD_CAD_EVENT + * @param Cc The Communication Channel for the USBPD communication @ref CCxPin_TypeDef + * @retval None + */ + void (*USBPD_CAD_CallbackEvent)(uint8_t PortNum, USBPD_CAD_EVENT State, CCxPin_TypeDef Cc); + /** + * @brief CallBack to wakeup the CAD. + * @retval None + */ + void (*USBPD_CAD_WakeUp)(void); +} USBPD_CAD_Callbacks; + +/** + * @} + */ + +/** @defgroup USBPD_CORE_CAD_Exported_Functions_Grp1 USBPD CORE CAD Exported Functions + * @{ + */ +/** + * @brief Initialize the CAD module for a specified port. + * @param PortNum Index of current used port + * @param CallbackFunctions CAD port callback function + * @param Settings Pointer on @ref USBPD_SettingsTypeDef structure + * @param Params Pointer on @ref USBPD_ParamsTypeDef structure + * @retval USBPD_CAD status + */ +USBPD_CAD_StatusTypeDef USBPD_CAD_Init(uint8_t PortNum, const USBPD_CAD_Callbacks *CallbackFunctions, + const USBPD_SettingsTypeDef *Settings, USBPD_ParamsTypeDef *Params); + +/** + * @brief function used to process type C state machine detection. + * @retval time (in ms) after which the process must be executed + */ +uint32_t USBPD_CAD_Process(void); + +/** + * @brief Enable or Disable CAD port. + * @param PortNum Index of current used port + * @param State The new state of the port @ref USBPD_CAD_activation + * @retval None + */ +void USBPD_CAD_PortEnable(uint8_t PortNum, USBPD_CAD_activation State); + +/** + * @brief Set the resistor to present a SNK. + * @param PortNum Index of current used port + * @retval None + */ +void USBPD_CAD_AssertRd(uint8_t PortNum); + +/** + * @brief Set the resistor to present a SRC. + * @param PortNum Index of current used port + * @retval None + */ +void USBPD_CAD_AssertRp(uint8_t PortNum); + +/** + * @brief Force type C state machine to enter recovery state + * @param PortNum Index of current used port + * @retval None + */ +void USBPD_CAD_EnterErrorRecovery(uint8_t PortNum); + +#if defined(USBPDCORE_DRP) || defined(USBPDCORE_SRC) +/** + * @brief Set the default Rd resistor (valid for SRC only) + * @param PortNum Index of current used port + * @param RdValue + * @retval USBPD_CAD_OK or USBPD_CAD_INVALIDRESISTOR + */ +USBPD_CAD_StatusTypeDef USBPD_CAD_SRC_SetRpResistor(uint8_t PortNum, CAD_RP_Source_Current_Adv_Typedef RdValue); + +/** @defgroup USBPD_CORE_CAD_Exported_Functions_Legacy USBPD CORE CAD Legacy Function + * @{ + */ +/* Keep for legacy reason */ +USBPD_CAD_StatusTypeDef USBPD_CAD_SetRpResistor(uint8_t PortNum, CAD_RP_Source_Current_Adv_Typedef RdValue); +/** + * @} + */ +#endif /* USBPDCORE_DRP || USBPDCORE_SRC */ + +/** + * @} + */ + +/** + * @} + */ + +/** @addtogroup USBPD_CORE_TRACE + * @{ + */ + +/** @defgroup USBPD_CORE_TRACE_Exported_Types USBPD CORE TRACE Exported Types + * @{ + */ +typedef enum +{ + USBPD_TRACE_FORMAT_TLV = 0, + USBPD_TRACE_MESSAGE_IN = 1, + USBPD_TRACE_MESSAGE_OUT = 2, + USBPD_TRACE_CADEVENT = 3, + USBPD_TRACE_PE_STATE = 4, + USBPD_TRACE_CAD_LOW = 5, + USBPD_TRACE_DEBUG = 6, + USBPD_TRACE_SRC = 7, + USBPD_TRACE_SNK = 8, + USBPD_TRACE_NOTIF = 9, + USBPD_TRACE_POWER = 10, + USBPD_TRACE_TCPM = 11, + USBPD_TRACE_PRL_STATE = 12, + USBPD_TRACE_PRL_EVENT = 13, + USBPD_TRACE_PHY_NOTFRWD = 14, + USBPD_TRACE_CPU = 15, + USBPD_TRACE_TIMEOUT = 16, + USBPD_TRACE_UCSI = 18 +} +TRACE_EVENT; + +typedef void (*TRACE_ENTRY_POINT)(TRACE_EVENT type, uint8_t port, uint8_t sop, uint8_t *ptr, uint32_t size); + +/** + * @} + */ + +/** + * @} + */ + +/** @addtogroup USBPD_CORE_PE + * @{ + */ +/** @defgroup USBPD_CORE_PE_Private_Defines USBPD CORE PE Private Defines + * @brief These defines are used in the stack library. Just provided for information. + * Those timers values are not to be changed by user (changing values on user side, + * will not have any impacts on lib behavior). + * @{ + * + */ + +/* Policy Engine Timers */ +#ifdef USBPDCORE_PPS +#define PE_TPPSREQUEST 9000u /*!< tPPSRequest: Max value set to 10s */ +#define PE_TPPSTIMEOUT 14000u /*!< tPPSTimeout: min 12s to max 15s */ +#endif /* USBPDCORE_PPS */ +#define PE_TPSHARDRESET 27u /*!< tPSHardReset: min 25ms to max 30ms */ +#define PE_SRC_TSRCRECOVER 800u /*!< tSrcRecover for SRC: min 660 ms max 1s */ +#define PE_SNK_TSRCRECOVER 2000u /*!< tSrcRecover for SNK: 2s (less restrictive for SINK tests) */ +#define PE_SRC_TSAFE0V_T2 650u /*!< tSafe0V for SRC: 650 ms */ +#define PE_SNK_TSAFE0V_T2 1000u /*!< tSafe0V for SNK: 1000 ms */ +#define PE_TSRCTURNON_T4 275u /*!< tSrcTurnOn: 275 ms */ +#define PE_TPSSOURCEOFF 900u /*!< tPSSourceOff: min 750ms to max 920ms */ +#define PE_TPSSOURCEON 470u /*!< tPSSourceOn: min 390ms to max 480ms */ + +#define PE_TPSTRANSITION 500u /*!< tPSTransition: min 450ms to max 550ms */ + +#define PE_TSENDERRESPONSE 27u /*!< tSenderResponse: min 24ms to max 30ms */ + +#define PE_TTYPECSINKWAITCAP 500u /*!< tTypeCSinkWaitCap: min 310ms to max 620ms */ + +#define PE_TTYPECSENDSOURCECAPA 150u /*!< tTypeCSendSourceCap: min 100ms to max 200ms */ +#define PE_TSRCTRANSITION 30u /*!< tSrcTransition: min 25ms to max 35ms */ + +#define PE_TSWAPSRCSTART_MIN 20u /*!< tSwapSourceStart: 20 ms */ + +#define PE_TBISTCONTMODE 45u /*!< tBISTContMode: min 30ms to 60 ms */ +#if defined(USBPDCORE_VCONN_SUPPORT) +#define PE_TDISCOVERIDENTITY 45u /*!< tDiscoverIdentity: min 40ms to max 50ms */ +#endif /* USBPDCORE_VCONN_SUPPORT */ + +#define PE_TVDMSENDERRESPONSE 30u /*!< tVDMSenderResponse: min 24ms to max 30ms */ + +#if defined(USBPDCORE_SVDM) || defined(USBPDCORE_ANSWER_DISCOIDENT) +#define PE_TVDMRECEIVERRESPONSE 15u /*!< tVDMReceiverResponse: max 15ms */ +#endif /* USBPDCORE_SVDM || USBPDCORE_ANSWER_DISCOIDENT */ +#if defined(USBPDCORE_SVDM) +#define PE_TVDMENTERMODE 25u /*!< tVDMEnterMode: max 25ms */ +#define PE_TVDMEXITMODE 25u /*!< tVDMExitMode: max 25ms */ +#endif /* USBPDCORE_SVDM */ + +#if defined(USBPDCORE_SVDM) || defined(USBPDCORE_VCONN_SUPPORT) +#define PE_TVDMWAITMODEENTRY 50u /*!< tVDMWaitModeEntry: max 40ms to 50ms */ +#define PE_TVDMWAITMODEEXIT 50u /*!< tVDMWaitModeExit: max 40ms to 50ms */ +#endif /* USBPDCORE_SVDM || USBPDCORE_VCONN_SUPPORT */ + +#ifdef USBPDCORE_VCONN_SUPPORT +#define PE_TVCONNSOURCETIMEOUT 150u /*!< tVCONNSourceTimeout: min 100ms to max 200ms */ +#endif /* USBPDCORE_VCONN_SUPPORT */ + + +#define PE_TVCONNZERO 125u /*!< tVCONNZero :max 125ms */ +#define PE_TVCONNREAPPLIED 10u /*!< tVCONNZero :min 10 max 20ms */ +#define PE_TDATARESETFAIL 300u /*!< tDataResetFail :min 300ms */ +#define PE_TDATARESET 200u /*!< tDataReset :min 200ms 225ms max 250ms */ +/** + * @} + */ + +#if defined(USBPDCORE_SVDM) || defined(USBPDCORE_UVDM) || defined(USBPDCORE_VCONN_SUPPORT) || defined(USBPDCORE_ANSWER_DISCOIDENT) +/** @defgroup USBPD_CORE_VDM_Exported_Callback USBPD CORE VDM Exported Callback + * @{ + */ + +/** + * @brief CallBacks exposed by the @ref USBPD_CORE_PE + * */ +typedef struct +{ +#if defined(USBPDCORE_SVDM) || defined(USBPDCORE_VCONN_SUPPORT) || defined(USBPDCORE_ANSWER_DISCOIDENT) + /** + * @brief VDM Discovery identity callback + * @note Function is called to get Discovery identity information linked to the device and answer + * to SVDM Discovery identity init message sent by port partner + * @param PortNum current port number + * @param pIdentity Pointer on @ref USBPD_DiscoveryIdentity_TypeDef structure + * @retval USBPD status: @ref USBPD_ACK or @ref USBPD_BUSY + */ + USBPD_StatusTypeDef(*USBPD_VDM_DiscoverIdentity)(uint8_t PortNum, USBPD_DiscoveryIdentity_TypeDef *pIdentity); +#endif /* USBPDCORE_SVDM || USBPDCORE_VCONN_SUPPORT || USBPDCORE_ANSWER_DISCOIDENT */ + +#if defined(USBPDCORE_SVDM) || defined(USBPDCORE_VCONN_SUPPORT) + /** + * @brief VDM Discover SVID callback + * @note Function is called to retrieve SVID supported by device and answer + * to SVDM Discovery SVID init message sent by port partner + * @param PortNum current port number + * @param p_SVID_Info Pointer on @ref USBPD_SVIDInfo_TypeDef structure + * @param pNbSVID Pointer on number of SVID + * @retval USBPD status @ref USBPD_BUSY or @ref USBPD_ACK or @ref USBPD_NAK + */ + USBPD_StatusTypeDef(*USBPD_VDM_DiscoverSVIDs)(uint8_t PortNum, uint16_t **p_SVID_Info, uint8_t *pNbSVID); + + /** + * @brief VDM Discover Mode callback (report all the modes supported by SVID) + * @note Function is called to report all the modes supported by selected SVID and answer + * to SVDM Discovery Mode init message sent by port partner + * @param PortNum current port number + * @param SVID SVID value + * @param p_ModeTab Pointer on the mode value + * @param NumberOfMode Number of mode available + * @retval USBPD status + */ + USBPD_StatusTypeDef(*USBPD_VDM_DiscoverModes)(uint8_t PortNum, + uint16_t SVID, uint32_t **p_ModeTab, uint8_t *NumberOfMode); + + /** + * @brief VDM Mode enter callback + * @note Function is called to check if device can enter in the mode received for the selected SVID in the + * SVDM enter mode init message sent by port partner + * @param PortNum current port number + * @param SVID SVID value + * @param ModeIndex Index of the mode to be entered + * @retval USBPD status @ref USBPD_ACK/@ref USBPD_NAK + */ + USBPD_StatusTypeDef(*USBPD_VDM_ModeEnter)(uint8_t PortNum, uint16_t SVID, uint32_t ModeIndex); + + /** + * @brief VDM Mode exit callback + * @note Function is called to check if device can exit from the mode received for the selected SVID in the + * SVDM exit mode init message sent by port partner + * @param PortNum current port number + * @param SVID SVID value + * @param ModeIndex Index of the mode to be exited + * @retval USBPD status @ref USBPD_ACK/@ref USBPD_NAK + */ + USBPD_StatusTypeDef(*USBPD_VDM_ModeExit)(uint8_t PortNum, uint16_t SVID, uint32_t ModeIndex); + + /** + * @brief Inform identity callback + * @note Function is called to save Identity information received in Discovery identity from port partner + (answer to SVDM discovery identity sent by device) + * @param PortNum current port number + * @param SOPType SOP type + * @param CommandStatus Command status based on @ref USBPD_VDM_CommandType_Typedef + * @param pIdentity Pointer on the discovery identity information based on @ref USBPD_DiscoveryIdentity_TypeDef + * @retval None + */ + void (*USBPD_VDM_InformIdentity)(uint8_t PortNum, USBPD_SOPType_TypeDef SOPType, + USBPD_VDM_CommandType_Typedef CommandStatus, + USBPD_DiscoveryIdentity_TypeDef *pIdentity); + + /** + * @brief Inform SVID callback + * @note Function is called to save list of SVID received in Discovery SVID from port partner + (answer to SVDM discovery SVID sent by device) + * @param PortNum current port number + * @param SOPType SOP type + * @param CommandStatus Command status based on @ref USBPD_VDM_CommandType_Typedef + * @param pListSVID Pointer of list of SVID based on @ref USBPD_SVIDInfo_TypeDef + * @retval None + */ + void (*USBPD_VDM_InformSVID)(uint8_t PortNum, USBPD_SOPType_TypeDef SOPType, + USBPD_VDM_CommandType_Typedef CommandStatus, USBPD_SVIDInfo_TypeDef *pListSVID); + + /** + * @brief Inform Mode callback ( received in Discovery Modes ACK) + * @note Function is called to save list of modes linked to SVID received in Discovery mode from port partner + (answer to SVDM discovery mode sent by device) + * @param PortNum current port number + * @param SOPType SOP type + * @param CommandStatus Command status based on @ref USBPD_VDM_CommandType_Typedef + * @param pModesInfo Pointer of Modes info based on @ref USBPD_ModeInfo_TypeDef + * @retval None + */ + void (*USBPD_VDM_InformMode)(uint8_t PortNum, USBPD_SOPType_TypeDef SOPType, + USBPD_VDM_CommandType_Typedef CommandStatus, USBPD_ModeInfo_TypeDef *pModesInfo); + + /** + * @brief Inform Mode enter callback + * @note Function is called to inform if port partner accepted or not to enter in the mode + * specified in the SVDM enter mode sent by the device + * @param PortNum current port number + * @param SOPType SOP type + * @param CommandStatus Command status based on @ref USBPD_VDM_CommandType_Typedef + * @param SVID SVID ID + * @param ModeIndex Index of the mode to be entered + * @retval None + */ + void (*USBPD_VDM_InformModeEnter)(uint8_t PortNum, USBPD_SOPType_TypeDef SOPType, + USBPD_VDM_CommandType_Typedef CommandStatus, uint16_t SVID, uint32_t ModeIndex); + + /** + * @brief Inform Mode exit callback + * @note Function is called to inform if port partner accepted or not to exit from the mode + * specified in the SVDM exit mode sent by the device + * @param PortNum current port number + * @param SOPType SOP type + * @param CommandStatus Command status based on @ref USBPD_VDM_CommandType_Typedef + * @param SVID SVID ID + * @param ModeIndex Index of the mode to be exited + * @retval None + */ + void (*USBPD_VDM_InformModeExit)(uint8_t PortNum, USBPD_SOPType_TypeDef SOPType, + USBPD_VDM_CommandType_Typedef CommandStatus, uint16_t SVID, uint32_t ModeIndex); + + /** + * @brief Send VDM Attention message callback + * @note Function is called when device wants to send a SVDM attention message to port partner + * (for instance DP status can be filled through this function) + * @param PortNum current port number + * @param pNbData Pointer of number of VDO to send + * @param pVDO Pointer of VDO to send + * @retval None + */ + void (*USBPD_VDM_SendAttention)(uint8_t PortNum, uint8_t *pNbData, uint32_t *pVDO); + + /** + * @brief Receive VDM Attention callback + * @note Function is called when a SVDM attention init message has been received from port partner + * (for instance, save DP status data through this function) + * @param PortNum current port number + * @param NbData Number of received VDO + * @param VDO Received VDO + * @retval None + */ + void (*USBPD_VDM_ReceiveAttention)(uint8_t PortNum, uint8_t NbData, uint32_t VDO); + + /** + * @brief VDM Send Specific message callback + * @note Function is called when device wants to send a SVDM specific init message to port partner + * (for instance DP status or DP configure can be filled through this function) + * @param PortNum current port number + * @param SOPType SOP type + * @param VDMCommand VDM command based on @ref USBPD_VDM_Command_Typedef + * @param pNbData Pointer of number of VDO to send + * @param pVDO Pointer of VDO to send + * @retval None + */ + void (*USBPD_VDM_SendSpecific)(uint8_t PortNum, USBPD_SOPType_TypeDef SOPType, + USBPD_VDM_Command_Typedef VDMCommand, uint8_t *pNbData, uint32_t *pVDO); + + /** + * @brief VDM Receive Specific message callback + * @note Function is called to answer to a SVDM specific init message received by port partner. + * (for instance, retrieve DP status or DP configure data through this function) + * @param PortNum Current port number + * @param VDMCommand VDM command based on @ref USBPD_VDM_Command_Typedef + * @param pNbData Pointer of number of received VDO and used for the answer + * @param pVDO Pointer of received VDO and use for the answer + * @retval USBPD Status + */ + USBPD_StatusTypeDef(*USBPD_VDM_ReceiveSpecific)(uint8_t PortNum, + USBPD_VDM_Command_Typedef VDMCommand, + uint8_t *pNbData, uint32_t *pVDO); + + /** + * @brief VDM Specific message callback to inform user of reception of VDM specific message + * @note Function is called when answer from SVDM specific init message has been received by the device + * (for instance, save DP status and DP configure data through this function) + * @param PortNum current port number + * @param SOPType SOP type + * @param VDMCommand VDM command based on @ref USBPD_VDM_Command_Typedef + * @param pNbData Pointer of number of received VDO + * @param pVDO Pointer of received VDO + * @retval None + */ + void (*USBPD_VDM_InformSpecific)(uint8_t PortNum, USBPD_SOPType_TypeDef SOPType, + USBPD_VDM_Command_Typedef VDMCommand, uint8_t *pNbData, uint32_t *pVDO); + +#endif /* USBPDCORE_SVDM || USBPDCORE_VCONN_SUPPORT */ +#if defined(USBPDCORE_UVDM) + /** + * @brief VDM Send Unstructured message callback + * @param PortNum current port number + * @param pUVDM_Header Pointer on UVDM header based on @ref USBPD_UVDMHeader_TypeDef + * @param pNbData Pointer of number of VDO to send + * @param pVDO Pointer of VDO to send + * @retval None + */ + void (*USBPD_VDM_SendUVDM)(uint8_t PortNum, USBPD_UVDMHeader_TypeDef *pUVDM_Header, + uint8_t *pNbData, uint32_t *pVDO); + + /** + * @brief Unstructured VDM message callback to inform user of reception of UVDM message + * @param PortNum current port number + * @param UVDM_Header UVDM header based on @ref USBPD_UVDMHeader_TypeDef + * @param pNbData Pointer of number of received VDO + * @param pVDO Pointer of received VDO + * @retval USBPD Status + */ + USBPD_StatusTypeDef(*USBPD_VDM_ReceiveUVDM)(uint8_t PortNum, + USBPD_UVDMHeader_TypeDef UVDM_Header, uint8_t *pNbData, uint32_t *pVDO); +#endif /* USBPDCORE_UVDM */ +} USBPD_VDM_Callbacks; + +/** + * @} + */ + +#endif /* USBPDCORE_SVDM || USBPDCORE_UVDM || USBPDCORE_VCONN_SUPPORT || USBPDCORE_ANSWER_DISCOIDENT */ + +/** @defgroup USBPD_CORE_PE_Exported_TypesDefinitions USBPD CORE PE Exported Types Definitions + * @{ + */ + +/** @defgroup PE_CallBacks_structure_definition PE CallBacks structure definition + * @brief PE CallBacks exposed by the PE to the DPM + * @{ + */ +typedef struct +{ + /** + * @brief Callback used to request DPM to setup the new power level. + * @note this callback is mandatory for a SRC and DRP. + * @param PortNum Port number + * @retval Returned values are: @ref USBPD_ACCEPT, @ref USBPD_REJECT, @ref USBPD_WAIT + */ + USBPD_StatusTypeDef(*USBPD_PE_RequestSetupNewPower)(uint8_t PortNum); + + /** + * @brief Callback used to inform the DPM about the different HardReset step. + * @param PortNum Port number + * @param Role of the board @ref USBPD_PortPowerRole_TypeDef + * @param Status HR Status @ref USBPD_HR_Status_TypeDef + * @retval None + */ + void (*USBPD_PE_HardReset)(uint8_t PortNum, USBPD_PortPowerRole_TypeDef CurrentRole, USBPD_HR_Status_TypeDef Status); + + /** + * @brief Callback used to ask application the reply status for a power role swap request. + * @note if the callback is NULL, the request power role swap are automatically rejected. + * @param PortNum Port number + * @retval Returned values are: @ref USBPD_ACCEPT, @ref USBPD_WAIT, @ref USBPD_REJECT + */ + USBPD_StatusTypeDef(*USBPD_PE_EvaluatPRSwap)(uint8_t PortNum); + + /** + * @brief Callback used by the stack to notify an event. + * @note this callback is mandatory + * @param PortNum Port number + * @param EventVal @ref USBPD_NotifyEventValue_TypeDef + * @retval none + */ + void (*USBPD_PE_Notify)(uint8_t PortNum, USBPD_NotifyEventValue_TypeDef EventVal); + + /** + * @brief Callback used by the stack to inform DPM that an extended message has been received. + * @param PortNum port number value + * @param MsgId extended message id @ref USBPD_ExtendedMsg_TypeDef + * @param ptrData pointer on the data + * @param DataSize size of the data + * @retval None + */ + void (*USBPD_PE_ExtendedMessage)(uint8_t PortNum, + USBPD_ExtendedMsg_TypeDef MsgId, uint8_t *ptrData, uint16_t DataSize); + + /** + * @brief Callback used by the stack to get information from DPM or PWR_IF. + * @param PortNum Port number + * @param DataId Type of data to be read from DPM based on @ref USBPD_CORE_DataInfoType_TypeDef + * @param Ptr Pointer on address where DPM data should be written (u8 pointer) + * @param Size Pointer on nb of bytes written by DPM + * @retval None + */ + void (*USBPD_PE_GetDataInfo)(uint8_t PortNum, USBPD_CORE_DataInfoType_TypeDef DataId, uint8_t *Ptr, uint32_t *Size); + + /** + * @brief Callback used by the stack to set information inside DPM or PWR_IF. + * @param PortNum Port number + * @param DataId Type of data to be read from DPM based on @ref USBPD_CORE_DataInfoType_TypeDef + * @param Ptr Pointer on address where DPM data to be updated could be read (u8 pointer) + * @param Size Nb of byte to be updated in DPM + * @retval None + */ + void (*USBPD_PE_SetDataInfo)(uint8_t PortNum, USBPD_CORE_DataInfoType_TypeDef DataId, uint8_t *Ptr, uint32_t Size); + + /** + * @brief Callback used by a SOURCE to evaluate the SINK request + * @param PortNum Port number + * @param PtrPowerObject Pointer on the power data object + * @retval Returned values are: @ref USBPD_ACCEPT, @ref USBPD_REJECT, @ref USBPD_WAIT, @ref USBPD_GOTOMIN + */ + USBPD_StatusTypeDef(*USBPD_PE_SRC_EvaluateRequest)(uint8_t PortNum, USBPD_CORE_PDO_Type_TypeDef *PtrPowerObject); + + /** + * @brief Callback used by a sink to evaluate the Source Capabilities. + * @note the callback is used in the SNK and DRP context. + * @param PortNum Port number + * @param PtrRequestData Pointer on selected request data object + * @param PtrPowerObject Pointer on selected power data object + * @retval None + */ + void (*USBPD_PE_SNK_EvaluateCapabilities)(uint8_t PortNum, uint32_t *RequestData, + USBPD_CORE_PDO_Type_TypeDef *PtrPowerObject); + + /** + * @brief Callback used during the different step of the power role swap + * @note see MSC documentation to get more detail + * @param PortNum Port number + * @param Role of the board @ref USBPD_PortPowerRole_TypeDef + * @param Status HR Status update @ref USBPD_PRS_Status_TypeDef + * @retval None + */ + void (*USBPD_PE_PowerRoleSwap)(uint8_t PortNum, USBPD_PortPowerRole_TypeDef CurrentRole, + USBPD_PRS_Status_TypeDef Status); + + /** + * @brief Callback used to wakeup the current state machine + * @note this function is mandatory but has effect only in RTOS context + * @param PortNum Port number + * @retval None + */ + void (*USBPD_PE_WakeupCallback)(uint8_t PortNum); + + /** + * @brief Callback used to ask application the reply status for a Vconn swap request + * @param PortNum Port number + * @retval Returned values are: @ref USBPD_ACCEPT, @ref USBPD_REJECT, @ref USBPD_WAIT + */ + USBPD_StatusTypeDef(*USBPD_PE_EvaluateVconnSwap)(uint8_t PortNum); + + /** + * @brief Callback used to enable/disable the vconn power + * @note the function is mandatory to manage the VconnPower + * @param PortNum Port number + * @param State Enable or Disable VConn on CC lines + * @retval Returned values are: @ref USBPD_ACCEPT, @ref USBPD_REJECT + */ + USBPD_StatusTypeDef(*USBPD_PE_VconnPwr)(uint8_t PortNum, USBPD_FunctionalState State); + + /** + * @brief Callback used by PE to enter in error recovery state + * @param PortNum Port number + * @retval None + */ + void (*USBPD_PE_EnterErrorRecovery)(uint8_t PortNum); + + /** + * @brief Callback used to ask application the reply status for a DataRoleSwap request + * @note if the callback is not set (ie NULL) the stack will automatically reject the request + * @param PortNum Port number + * @retval Returned values are: + @ref USBPD_ACCEPT if DRS can be accepted + @ref USBPD_REJECT if DRS is not accepted in one data role (DFP or UFP) or in PD2.0 config + @ref USBPD_NOTSUPPORTED if DRS is not supported at all by the application (in both data roles) - P3.0 only + */ + USBPD_StatusTypeDef(*USBPD_PE_DataRoleSwap)(uint8_t PortNum); + + /** + * @brief Callback used to check the VBUS status + * @note this function is mandatory for a SNK port and used inside the hardreset process + * @param PortNum Port number + * @param Vsafe Vsafe status based on @ref USBPD_VSAFE_StatusTypeDef + * @retval Returned values are: @ref USBPD_DISABLE or @ref USBPD_ENABLE + */ + USBPD_FunctionalState(*USBPD_PE_IsPowerReady)(uint8_t PortNum, USBPD_VSAFE_StatusTypeDef Vsafe); + + +} USBPD_PE_Callbacks; + +/** + * @} + */ + +/** + * @} + */ + +/** @defgroup USBPD_CORE_PE_Exported_Functions USBPD CORE PE Exported Functions + * @{ + */ + +/** @defgroup USBPD_CORE_PE_Exported_Functions_Group1 USBPD CORE PE Exported Functions to DPM CORE + * @{ + */ +/** + * @brief Initialize Policy Engine layer for a Port + * @note the value pSettings and pParams shall be presistante because the stack keep there memory location + * @param PortNum Index of current used port + * @param pSettings Pointer on @ref USBPD_SettingsTypeDef structure + * @param pParams Pointer on @ref USBPD_ParamsTypeDef structure + * @param PECallbacks Callback function to be passed to PRL layer + * @retval USBPD status Possible values are + - @ref USBPD_OK + - @ref USBPD_ERROR + - @ref USPD_ERROR_CALLBACKMISSING + - @ref USBPD_INVALID_PORT_NUMBER + - @ref USBPD_MALLOCERROR + */ +USBPD_StatusTypeDef USBPD_PE_Init(uint8_t PortNum, USBPD_SettingsTypeDef *pSettings, USBPD_ParamsTypeDef *pParams, + const USBPD_PE_Callbacks *PECallbacks); + + +/** + * @brief Check coherence between lib selected and the lib include inside the project + * @note This function can be used only during development process to avoid mismatch + * @param LibId Value fix defined with the switch lib. + * @retval if the check is OK @ref USBPD_TRUE else @ref USBPD_FALSE + */ +uint32_t USBPD_PE_CheckLIB(uint32_t LibId); + +/** + * @brief Return the need of the stack in terms of dynamique allocation + * @note the value returned corresponds to the allocation need for 2 ports so if application manages + * only one port the need is be divided by 2 + * @retval Memory size + */ +uint32_t USBPD_PE_GetMemoryConsumption(void); + +/** + * @brief Set the trace pointer and the debug level + * @note the recommended value for debug trace level is 0x3 + * 0x1 : Policy engine state + * 0x2 : Notification + * 0x3 : Policy engine state + Notification + * @param Ptr function on trace + * @param Debug Trace debug level + * @retval None + */ +void USBPD_PE_SetTrace(TRACE_ENTRY_POINT Ptr, uint8_t Debug); + +/** + * @brief Notification function + * @note this function is used by DPM_CORE or the stack to inform the user DPM application + * @param PortNum Index of current used port + * @param EventVal event based on @ref USBPD_NotifyEventValue_TypeDef + * @retval None + */ +void USBPD_PE_Notification(uint8_t PortNum, USBPD_NotifyEventValue_TypeDef EventVal); + + + +#ifdef USBPDCORE_DRP +/** + * @brief Policy Engine DRP state machine + * @param PortNum Index of current used port + * @retval Timing in ms + */ +uint32_t USBPD_PE_StateMachine_DRP(uint8_t PortNum); +#endif /* USBPDCORE_DRP */ + +#if defined(USBPDCORE_VPD) && defined(USBPDCORE_SNK) +/** + * @brief Policy Engine SNK state machine supporting VPD + * @param PortNum Index of current used port + * @retval Timing in ms + */ +uint32_t USBPD_PE_StateMachine_SNKwVPD(uint8_t PortNum); +#endif /* USBPDCORE_VPD && USBPDCORE_SNK */ + +/** + * @brief Function called by DPM to before calling the state machine. + * @param PortNum Index of current used port + * @retval none + */ +void USBPD_PE_StateMachine_Reset(uint8_t PortNum); + +/** + * @brief Function called by DPM to exit the state machine. + * @param PortNum Index of current used port + * @retval none + */ +void USBPD_PE_StateMachine_Stop(uint8_t PortNum); + +/** + * @brief Function called by DPM to set the cable status connected or disconnected. + * @param PortNum Index of current used port + * @param IsConnected Cable connection status: 1 if connected and 0 is disconnected + * @retval USBPD status @ref USBPD_OK + * @note this function is obsolete the connection information are managed at cad level + */ +void USBPD_PE_IsCableConnected(uint8_t PortNum, uint8_t IsConnected); + +/** + * @brief Increment PE Timers tick + * @note This function must be called each elapsed ms + * @param PortNum Index of current used port + * @retval None + */ +void USBPD_PE_TimerCounter(uint8_t PortNum); + +/** + * @brief Update PE Timers tick + * @note This function must be called when exited the low power mode + * @param PortNum Index of current used port + * @param Tick value in ms (can't execed the value 0x.... else the value will not be take into account) + * @retval None + */ +void USBPD_PE_TimerCounteUpdate(uint8_t PortNum, uint16_t Tick); + +/** + * @} + */ + +#if defined(USBPDCORE_SRC) || defined(USBPDCORE_DRP) +/** @defgroup USBPD_CORE_SRC_Exported_Functions_Group1 USBPD CORE PE SRC Exported Functions to DPM CORE + * @{ + */ +/** + * @brief Policy Engine Source state machine + * @param PortNum Index of current used port + * @retval Timing in ms + */ +uint32_t USBPD_PE_StateMachine_SRC(uint8_t PortNum); + +/** + * @} + */ +#endif /* USBPDCORE_SRC || USBPDCORE_DRP */ + +#if defined(USBPDCORE_SNK) || defined(USBPDCORE_DRP) +/** @defgroup USBPD_CORE_PE_SNK_Exported_Functions_Group1 USBPD CORE PE SNK Exported Functions to DPM CORE + * @{ + */ +/** + * @brief Policy Engine Sink state machine + * @param PortNum Index of current used port + * @retval Timing in ms + */ +uint32_t USBPD_PE_StateMachine_SNK(uint8_t PortNum); + +/** + * @} + */ +#endif /* USBPDCORE_SNK || USBPDCORE_DRP */ + +#if defined(USBPDCORE_SVDM) || defined(USBPDCORE_UVDM) || defined(USBPDCORE_VCONN_SUPPORT) || defined(USBPDCORE_ANSWER_DISCOIDENT) +/** @defgroup USBPD_CORE_PE_Exported_Functions_Group2 USBPD CORE PE Exported Functions to VDM USER + * @{ + */ +/** + * @brief Initialize VDM callback functions in PE + * @param PortNum Index of current used port + * @param VDMCallbacks Pointer on VDM callbacks based on @ref USBPD_VDM_Callbacks + * @retval None + */ +void USBPD_PE_InitVDM_Callback(uint8_t PortNum, USBPD_VDM_Callbacks *VDMCallbacks); +/** + * @} + */ +#endif /* USBPDCORE_SVDM || USBPDCORE_UVDM || USBPDCORE_VCONN_SUPPORT || USBPDCORE_ANSWER_DISCOIDENT */ + +/** @defgroup USBPD_CORE_PE_Exported_Functions_Group3 USBPD CORE PE Exported Functions to DPM USER + * @{ + */ + +/** + * @brief This generic function to send a control message + * @param PortNum Index of current used port + * @param CtrlMsg Control message id @ref USBPD_ControlMsg_TypeDef + * @param SOPType SOP Type based on @ref USBPD_SOPType_TypeDef + * @retval status @ref USBPD_OK, @ref USBPD_BUSY, @ref USBPD_ERROR or @ref USBPD_FAIL + */ +USBPD_StatusTypeDef USBPD_PE_Request_CtrlMessage(uint8_t PortNum, USBPD_ControlMsg_TypeDef CtrlMsg, + USBPD_SOPType_TypeDef SOPType); + +/** + * @brief This generic function is used to send data message + * @note the parameter pData is used only if DataMsg is equal + to USBPD_DATAMSG_ALERT or USBPD_DATAMSG_GET_COUNTRY_INFO + * @param PortNum Index of current used port + * @param DataMsg Data message id based on @ref USBPD_DataMsg_TypeDef + * @param pData Pointer on the data to send + * @retval status @ref USBPD_OK, @ref USBPD_BUSY, @ref USBPD_ERROR or @ref USBPD_FAIL + */ +USBPD_StatusTypeDef USBPD_PE_Request_DataMessage(uint8_t PortNum, USBPD_DataMsg_TypeDef DataMsg, uint32_t *pData); + +/** + * @brief This function is used to force PE to perform an Hard Reset. + * @param PortNum Index of current used port + * @retval status @ref USBPD_OK + */ +USBPD_StatusTypeDef USBPD_PE_Request_HardReset(uint8_t PortNum); + +/** + * @brief Request the PE to send a cable reset. + * @note Only a DFP Shall generate Cable Reset Signaling. + A DFP Shall only generate Cable Reset Signaling within an Explicit Contract. + The DFP has to be supplying VCONN prior to a Cable Reset + * @param PortNum The current port number + * @retval USBPD Status + */ +USBPD_StatusTypeDef USBPD_PE_Request_CableReset(uint8_t PortNum); + +#if defined(USBPDCORE_SNK) || defined(USBPDCORE_DRP) +/** + * @brief This function request PE to send a request message + * @param PortNum Index of current used port + * @param Rdo Requested data object + * @param PWobject Power Object + * @retval status @ref USBPD_OK, @ref USBPD_BUSY, @ref USBPD_ERROR or @ref USBPD_FAIL + */ +USBPD_StatusTypeDef USBPD_PE_Send_Request(uint8_t PortNum, uint32_t Rdo, USBPD_CORE_PDO_Type_TypeDef PWobject); +#endif /* USBPDCORE_SNK || USBPDCORE_DRP */ + +#if defined(USBPD_REV30_SUPPORT) +#if defined(USBPDCORE_BATTERY) || defined(USBPDCORE_MANU_INFO) || \ + defined(USBPDCORE_SECURITY_MSG) || defined(USBPDCORE_FWUPD) +/** + * @brief This function send an extended message + * @note The management of chunk or unchunked message is manage inside the + * @param PortNum Port number value + * @param SOPType Message type based on @ref USBPD_SOPType_TypeDef + * @param MessageType Extended Msg type @ref USBPD_ExtendedMsg_TypeDef + * @param Ptrdata Data pointer to PRL layer + * @param DataSize Size of the data (<= 260) + * @retval status @ref USBPD_OK, @ref USBPD_BUSY, @ref USBPD_ERROR or @ref USBPD_FAIL + */ +USBPD_StatusTypeDef USBPD_PE_SendExtendedMessage(uint8_t PortNum, USBPD_SOPType_TypeDef SOPType, + USBPD_ExtendedMsg_TypeDef MessageType, + uint8_t *Ptrdata, uint16_t DataSize); +#endif /* USBPDCORE_BATTERY || USBPDCORE_MANU_INFO || USBPDCORE_SECURITY_MSG || USBPDCORE_FWUPD */ + +#if defined(USBPDCORE_FASTROLESWAP) +/** + * @brief this function request PE to perform an FRS signalling. + * @param PortNum + * @retval None + */ +void USBPD_PE_ExecFastRoleSwapSignalling(uint8_t PortNum); +#endif /* USBPDCORE_FASTROLESWAP */ +#endif /* USBPD_REV30_SUPPORT */ + +#if defined(USBPDCORE_SVDM) || defined(USBPDCORE_VCONN_SUPPORT) +/** + * @brief Called by DPM to request the PE to perform a VDM identity request. + * @note On PD2.0, SVDM Identity cannot be sent by UFP. + * @param PortNum Index of current used port + * @param SOPType SOP Type (Only SOP or SOP') + * @retval USBPD status + */ +USBPD_StatusTypeDef USBPD_PE_SVDM_RequestIdentity(uint8_t PortNum, USBPD_SOPType_TypeDef SOPType); + +/** + * @brief Called by DPM to request the PE to perform a VDM SVID request. + * @param PortNum Index of current used port + * @param SOPType SOP Type (only valid for SOP or SOP') + * @retval USBPD status: @ref USBPD_BUSY, @ref USBPD_OK, @ref USBPD_FAIL + */ +USBPD_StatusTypeDef USBPD_PE_SVDM_RequestSVID(uint8_t PortNum, USBPD_SOPType_TypeDef SOPType); + +/** + * @brief Called by DPM to request the PE to perform a VDM Discovery mode message on one SVID. + * @param PortNum Index of current used port + * @param SOPType SOP Type + * @param SVID SVID used for discovery mode message + * @retval USBPD status: @ref USBPD_BUSY, @ref USBPD_OK, @ref USBPD_FAIL + */ +USBPD_StatusTypeDef USBPD_PE_SVDM_RequestMode(uint8_t PortNum, USBPD_SOPType_TypeDef SOPType, uint16_t SVID); + +/** + * @brief Called by DPM to request the PE to perform a VDM Discovery mode message on one SVID. + * @param PortNum Index of current used port + * @param SOPType SOP Type + * @param SVID SVID used for discovery mode message + * @param ModeIndex Index of the mode to be entered + * @retval USBPD status: @ref USBPD_BUSY, @ref USBPD_OK, @ref USBPD_FAIL + */ +USBPD_StatusTypeDef USBPD_PE_SVDM_RequestModeEnter(uint8_t PortNum, USBPD_SOPType_TypeDef SOPType, uint16_t SVID, + uint8_t ModeIndex); + +/** + * @brief Called by DPM to request the PE to perform a VDM mode exit. + * @param PortNum Index of current used port + * @param SOPType SOP Type + * @param SVID SVID used for discovery mode message + * @param ModeIndex Index of the mode to be exit + * @retval USBPD status: @ref USBPD_BUSY, @ref USBPD_OK, @ref USBPD_FAIL + */ +USBPD_StatusTypeDef USBPD_PE_SVDM_RequestModeExit(uint8_t PortNum, USBPD_SOPType_TypeDef SOPType, uint16_t SVID, + uint8_t ModeIndex); + +/** + * @brief Called by DPM to request the PE to send a specific SVDM message. + * @param PortNum Index of current used port + * @param SOPType Received message type based on @ref USBPD_SOPType_TypeDef + * @param Command VDM command based on @ref USBPD_VDM_Command_Typedef + * @param SVID Used SVID + * @retval USBPD status: @ref USBPD_BUSY, @ref USBPD_OK, @ref USBPD_FAIL + */ +USBPD_StatusTypeDef USBPD_PE_SVDM_RequestSpecific(uint8_t PortNum, USBPD_SOPType_TypeDef SOPType, + USBPD_VDM_Command_Typedef Command, uint16_t SVID); +#endif /* USBPDCORE_SVDM || USBPDCORE_VCONN_SUPPORT */ + +#if defined(USBPDCORE_SVDM) +/** + * @brief Called by DPM to request the PE to perform a VDM Attention. + * @param PortNum Index of current used port + * @param SOPType Received message type based on @ref USBPD_SOPType_TypeDef (valid with SOP only) + * @param SVID Used SVID + * @retval USBPD status: @ref USBPD_BUSY, @ref USBPD_OK, @ref USBPD_FAIL + */ +USBPD_StatusTypeDef USBPD_PE_SVDM_RequestAttention(uint8_t PortNum, USBPD_SOPType_TypeDef SOPType, uint16_t SVID); +#endif /* USBPDCORE_SVDM */ + +#if defined(USBPDCORE_UVDM) +/** + * @brief Called by DPM to request the PE to send a UVDM message. + * @param PortNum Index of current used port + * @param SOPType Received message type based on @ref USBPD_SOPType_TypeDef + * @retval USBPD status: @ref USBPD_BUSY, @ref USBPD_OK, @ref USBPD_FAIL + */ +USBPD_StatusTypeDef USBPD_PE_UVDM_RequestMessage(uint8_t PortNum, USBPD_SOPType_TypeDef SOPType); +#endif /* USBPDCORE_UVDM */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** @addtogroup USBPD_CORE_PRL + * @{ + */ + +/** @defgroup USBPD_CORE_PRL_Exported_Functions USBPD CORE PRL Exported Functions + * @{ + */ + +/** @defgroup USBPD_CORE_PRL_Exported_Functions_Group1 USBPD CORE PRL Interface function for timer + * @{ + */ + +/** + * @brief Decrement The PRL Timers values + * @param PortNum port number value + * @retval None + */ +void USBPD_PRL_TimerCounter(uint8_t PortNum); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#if defined(USBPDCORE_TCPM_SUPPORT) +/** @addtogroup USBPD_CORE_TCPM + * @{ + */ + +/** @defgroup USBPD_CORE_TCPM_Exported_Functions USBPD CORE TCPM Exported Functions + * @{ + */ + +/** @defgroup USBPD_CORE_TCPM_Exported_Functions_Grp1 USBPD CORE TCPM Exported Functions to DPM and PWR_IF applications + * @{ + */ + +/** + * @brief Initialize TCPC devices + * @param PortNum Port number value + * @param TCPC_ToggleRole Indication if TCPC should perform a role toggle or not + * @param Params Pointer on PE parameters based on @ref USBPD_ParamsTypeDef + * @param CallbackFunctions Pointer on CAD callbacks + * @param TCPC_Driver Pointer on TCPC drivers based on @ref TCPC_DrvTypeDef + * @retval USBPD status + */ +USBPD_StatusTypeDef USBPD_TCPM_HWInit(uint8_t PortNum, uint8_t TCPC_ToggleRole, USBPD_ParamsTypeDef *Params, + USBPD_CAD_Callbacks *CallbackFunctions, TCPC_DrvTypeDef *TCPC_Driver); + +/** + * @brief Set CC line for PD connection + * @param PortNum Port number value + * @param Pull Power role can be one of the following values: + * @arg @ref TYPEC_CC_RA + * @arg @ref TYPEC_CC_RP + * @arg @ref TYPEC_CC_RD + * @arg @ref TYPEC_CC_OPEN + * @param State Activation or deactivation of connection + * @retval USBPD status + */ +USBPD_StatusTypeDef USBPD_TCPM_set_cc(uint32_t PortNum, TCPC_CC_Pull_TypeDef Pull, USBPD_FunctionalState State); + +/** + * @brief Enable or disable VCONN + * @param PortNum Port number value + * @param State Activation or deactivation of VCONN + * @retval USBPD status + */ +USBPD_StatusTypeDef USBPD_TCPM_set_vconn(uint32_t PortNum, USBPD_FunctionalState State); + +/** + * @brief Enable VBUS + * @param PortNum The port handle. + * @retval USBPD status + */ +USBPD_StatusTypeDef USBPD_TCPM_VBUS_Enable(uint32_t PortNum); + +/** + * @brief Disable VBUS + * @param PortNum The port handle. + * @retval USBPD status + */ +USBPD_StatusTypeDef USBPD_TCPM_VBUS_Disable(uint32_t PortNum); + +/** + * @brief Get VBUS voltage + * @param PortNum The port handle. + * @retval VBUS value in mV + */ +uint16_t USBPD_TCPM_VBUS_GetVoltage(uint32_t PortNum); + +/** + * @brief Retrieve the VBUS VSafe0 status for a specified port. + * @param PortNum The port handle. + * @retval USBPD_StatusTypeDef + */ +USBPD_StatusTypeDef USBPD_TCPM_VBUS_IsVsafe0V(uint32_t PortNum); + +/** + * @brief Retrieve the VBUS Vsafe5V status for a specified port. + * @param PortNum The port handle. + * @retval USBPD_StatusTypeDef + */ +USBPD_StatusTypeDef USBPD_TCPM_VBUS_IsVsafe5V(uint32_t PortNum); + +/** + * @brief Management of ALERT + * @param Event Event reported by application + * @retval USBPD status + */ +USBPD_StatusTypeDef USBPD_TCPM_alert(uint32_t Event); + +/** + * @brief Force type C state machine to enter recovery state + * @param PortNum Index of current used port + * @retval USBPD status + */ +USBPD_StatusTypeDef USBPD_TCPM_EnterErrorRecovery(uint32_t PortNum); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ +#endif /* USBPDCORE_TCPM_SUPPORT */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* USBPD_CORE_H_ */ + Index: /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Core/inc/usbpd_def.h =================================================================== --- /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Core/inc/usbpd_def.h (revision 60) +++ /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Core/inc/usbpd_def.h (revision 60) @@ -0,0 +1,3470 @@ +/** + ****************************************************************************** + * @file usbpd_def.h + * @author MCD Application Team + * @brief Global defines for USB-PD library + ****************************************************************************** + * @attention + * + * Copyright (c) 2021 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +#ifndef USBPD_DEF_H_ +#define USBPD_DEF_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "cmsis_compiler.h" + +#include +#include + +/** @addtogroup STM32_USBPD_LIBRARY + * @{ + */ + +/** @addtogroup USBPD_CORE + * @{ + */ + +/** @addtogroup USBPD_CORE_DEF + * @{ + */ + +/* Exported macro ------------------------------------------------------------*/ +/** @defgroup USBPD_CORE_DEF_Exported_Macros USBPD CORE DEF Exported Macros + * @{ + */ +/** + * @brief Compare two variables and return the smallest + * @param __VAR1__ First variable to be compared + * @param __VAR2__ Second variable to be compared + * @retval Returns the smallest variable + */ +#define USBPD_MIN(__VAR1__, __VAR2__) (((__VAR1__) > (__VAR2__))?(__VAR2__):(__VAR1__)) + +/** + * @brief Compare two variables and return the biggest + * @param __VAR1__ First variable to be compared + * @param __VAR2__ Second variable to be compared + * @retval Returns the biggest variable + */ +#define USBPD_MAX(__VAR1__, __VAR2__) (((__VAR1__) < (__VAR2__))?(__VAR2__):(__VAR1__)) + +/** + * @brief Check if the requested voltage is valid + * @param __MV__ Requested voltage in mV units + * @param __MAXMV__ Max Requested voltage in mV units + * @param __MINMV__ Min Requested voltage in mV units + * @retval 1 if valid voltage else 0 + */ +#define USBPD_IS_VALID_VOLTAGE(__MV__, __MAXMV__, __MINMV__) ((((__MV__) <= (__MAXMV__))\ + && ((__MV__) >= (__MINMV__)))? 1U: 0U) + +#define DIV_ROUND_UP(x, y) (((x) + ((y) - 1u)) / (y)) +#define MV2ADC(__X__) ( (__X__*4095) / 3300 ) +#define ADC2MV(__X__) ( (__X__*3300) / 4095 ) + +/* Macros for integer division with various rounding variants default integer + division rounds down. */ +#define MIN(a, b) (((a) < (b)) ? (a) : (b)) +#define MAX(a, b) (((a) > (b)) ? (a) : (b)) + +#define USBPD_WRITE32(addr,data) \ + do { \ + uint8_t bindex; \ + for(bindex = 0u; bindex < 4u; bindex++) \ + { \ + ((uint8_t *)addr)[bindex] = ((uint8_t)(data >> (8U * bindex)) & 0x000000FFU);\ + } \ + } while(0u); + +#define USPBPD_WRITE32 USBPD_WRITE32 /* For legacy purpose */ + +#define USBPD_LE16(addr) (((uint16_t)(*((uint8_t *)(addr))))\ + + (((uint16_t)(*(((uint8_t *)(addr)) + 1U))) << 8U)) + +#define USBPD_LE32(addr) ((((uint32_t)(*(((uint8_t *)(addr)) + 0U))) + \ + (((uint32_t)(*(((uint8_t *)(addr)) + 1U))) << 8U) + \ + (((uint32_t)(*(((uint8_t *)(addr)) + 2U))) << 16U)+ \ + (((uint32_t)(*(((uint8_t *)(addr)) + 3U))) << 24U))) + +/** + * @} + */ + +/* Exported defines --------------------------------------------------------*/ +/** @defgroup USBPD_CORE_DEF_Exported_Defines USBPD CORE DEF Exported Defines + * @{ + */ +#define USBPD_TRUE 1U +#define USBPD_FALSE 0U + +/** @defgroup USBPD_CORE_DEF_Exported_Defines_Swiches USBPD Compilations switches + * @brief List of compilation switches which can be used to reduce size of the CORE library + * @{ + */ +#if defined(USBPDCORE_LIB_PD3_CONFIG_3) +#define USBPDCORE_BIST +#define USBPDCORE_GIVESNKCAP +#define USBPDCORE_GETSRCCAP +#define USBPDCORE_ERROR_RECOVERY +#define USBPDCORE_SNK +#define USBPDCORE_SNK_CAPA_EXT +#define USBPD_REV30_SUPPORT +#define USBPDCORE_PECABLE +#define USBPDCORE_PPS +#define USBPDCORE_SVDM +#define USBPDCORE_UVDM +#elif defined(USBPDCORE_LIB_NO_PD) +#define USBPDCORE_NOPD +#else +/* Default Switch */ +#define USBPDCORE_GOTOMIN +#define USBPDCORE_BIST +#define USBPDCORE_GETSNKCAP +#define USBPDCORE_GETSRCCAP +#define USBPDCORE_GIVESNKCAP +#define USBPDCORE_ERROR_RECOVERY + +#if defined(USBPDCORE_LIB_PD3_FULL) || defined(USBPDCORE_LIB_PD3_CONFIG_1) || defined(USBPD_TCPM_LIB_PD3_FULL) || \ + defined(USBPD_TCPM_LIB_PD3_CONFIG_1) || defined(USBPDCORE_LIB_PD3_CONFIG_MINSRC) || \ + defined(USBPDCORE_LIB_PD3_CONFIG_MINSNK) || defined(USBPDCORE_LIB_PD3_CONFIG_MINDRP) + +/* + USBPDCORE_LIB_PD3_FULL + USBPDCORE_LIB_PD3_CONFIG_1 : NO VDM + USBPDCORE_LIB_PD3_CONFIG_MINSRC : ONLY SRC & VCONN and NO option + USBPDCORE_LIB_PD3_CONFIG_MINSNK : ONLY SNK, and NO option + USBPDCORE_LIB_PD3_CONFIG_MINDRP : SRC + SNK + VCONN, and NO option + USBPD_TCPM_LIB_PD3_FULL : PD3.0 TCPM FULL + USBPD_TCPM_LIB_PD3_CONFIG_1 : PD3.0 TCPM FULL without VDM +*/ +#define USBPD_REV30_SUPPORT + +#if !defined(USBPDCORE_LIB_PD3_CONFIG_MINSNK) +#define USBPDCORE_SRC +#define USBPDCORE_VCONN_SUPPORT +#define USBPDCORE_ANSWER_DISCOIDENT +#endif /* USBPDCORE_LIB_PD3_CONFIG_MINSNK */ + +#if !defined(USBPDCORE_LIB_PD3_CONFIG_MINSRC) +#define USBPDCORE_SNK +#define USBPDCORE_SNK_CAPA_EXT +#endif /* USBPDCORE_LIB_PD3_CONFIG_MINSRC */ + +#if defined(USBPDCORE_LIB_PD3_FULL) || defined(USBPD_TCPM_LIB_PD3_FULL) +#define USBPDCORE_SVDM +#endif /* USBPDCORE_LIB_PD3_FULL || USBPD_TCPM_LIB_PD3_FULL */ + +#if defined(USBPDCORE_LIB_PD3_CONFIG_MINSNK)||defined(USBPDCORE_LIB_PD3_CONFIG_MINSRC) +#else +#define USBPDCORE_DRP +#define USBPDCORE_DATA_SWAP +#if !defined(USBPDCORE_LIB_PD3_CONFIG_MINDRP) +#define USBPDCORE_UVDM +#define USBPDCORE_FASTROLESWAP +#define USBPDCORE_PPS +#define USBPDCORE_ALERT +#define USBPDCORE_SRC_CAPA_EXT +#define USBPDCORE_STATUS +#define USBPDCORE_BATTERY +#define USBPDCORE_MANU_INFO +#define USBPDCORE_SECURITY_MSG +#define USBPDCORE_FWUPD +#define USBPDCORE_COUNTRY_MSG +#define USBPDCORE_PING_SUPPORT +#endif /* !USBPDCORE_LIB_PD3_CONFIG_MINDRP */ +#endif /* USBPDCORE_LIB_PD3_CONFIG_MINSNK || USBPDCORE_LIB_PD3_CONFIG_MINSRC */ + +#if defined(USBPD_TCPM_LIB_PD3_FULL) || defined(USBPD_TCPM_LIB_PD3_CONFIG_1) +#define USBPDCORE_TCPM_SUPPORT +#endif /* TCPM */ + +#endif /* PD3.0 */ + +/* List of compilation switches which can be used to reduce size of the CORE library */ +#if defined(USBPDCORE_LIB_PD2_FULL) || defined(USBPDCORE_LIB_PD2_CONFIG_1) || \ + defined(USBPDCORE_LIB_PD2_CONFIG_MINSRC) || defined(USBPDCORE_LIB_PD2_CONFIG_MINSNK) || \ + defined(USBPD_TCPM_LIB_PD2_FULL) || defined(USBPD_TCPM_LIB_PD2_CONFIG_1) || defined(USBPD_TCPM_LIB_PD2_MINSRC) || \ + defined(USBPD_TCPM_LIB_PD2_MINSNK) +/* + USBPDCORE_LIB_PD2_FULL + USBPDCORE_LIB_PD2_CONFIG_1 : NO VDM + USBPDCORE_LIB_PD2_CONFIG_MINSRC : ONLY SRC & VCONN and NO option + USBPDCORE_LIB_PD2_CONFIG_MINSNK : ONLY SNK, and NO option + USBPD_TCPM_LIB_PD2_FULL : PD2.0 TCPM FULL + USBPD_TCPM_LIB_PD2_CONFIG_1 : PD2.0 TCPM FULL without VDM + USBPD_TCPM_LIB_PD2_MINSRC : PD2.0 TCPM Only SRC + USBPD_TCPM_LIB_PD2_MINSNK : PD2.0 TCPM Only SNK +*/ +#define USBPD_REV20_SUPPORT + +#if !defined(USBPDCORE_LIB_PD2_CONFIG_MINSNK) && !defined(USBPD_TCPM_LIB_PD2_MINSNK) +#define USBPDCORE_SRC +#define USBPDCORE_VCONN_SUPPORT +#endif /* !defined(USBPDCORE_LIB_PD2_CONFIG_MINSNK) && !defined(USBPD_TCPM_LIB_PD2_MINSNK) */ + +#if !defined(USBPDCORE_LIB_PD2_CONFIG_MINSRC) && !defined(USBPD_TCPM_LIB_PD2_MINSRC) +#define USBPDCORE_SNK +#endif /* !defined(USBPDCORE_LIB_PD2_CONFIG_MINSRC) && !defined(USBPD_TCPM_LIB_PD2_MINSRC)*/ + +#if defined(USBPDCORE_LIB_PD2_CONFIG_MINSRC) || defined(USBPDCORE_LIB_PD2_CONFIG_MINSNK) || \ + defined(USBPD_TCPM_LIB_PD2_MINSRC) || defined(USBPD_TCPM_LIB_PD2_MINSNK) +#else +#define USBPDCORE_DRP +#define USBPDCORE_DATA_SWAP +#define USBPDCORE_UVDM +#endif /* USBPDCORE_LIB_PD2_CONFIG_MINSRC || USBPDCORE_LIB_PD2_CONFIG_MINSNK || + USBPD_TCPM_LIB_PD2_MINSRC || USBPD_TCPM_LIB_PD2_MINSNK */ + +#if defined(USBPDCORE_LIB_PD2_FULL) || defined(USBPD_TCPM_LIB_PD2_FULL) +#define USBPDCORE_SVDM +#endif /* USBPDCORE_LIB_PD3_FULL || USBPD_TCPM_LIB_PD2_FULL */ + +#if defined(USBPD_TCPM_LIB_PD2_FULL) || defined(USBPD_TCPM_LIB_PD2_CONFIG_1) || defined(USBPD_TCPM_LIB_PD2_MINSRC) || \ + defined(USBPD_TCPM_LIB_PD2_MINSNK) +#define USBPDCORE_TCPM_SUPPORT +#endif /* TCPM */ + +#endif /* PD2.0 */ + +#if defined(USBPDCORE_LIB_PD3_CONFIG_2) +#undef USBPDCORE_GOTOMIN +#undef USBPDCORE_BIST +#undef USBPDCORE_GETSNKCAP +#undef USBPDCORE_GETSRCCAP +#undef USBPDCORE_GIVESNKCAP +#undef USBPDCORE_SNK_CAPA_EXT + +#define USBPDCORE_SNK +#define USBPD_REV30_SUPPORT +#define USBPDCORE_FWUPD +#define USBPDCORE_UVDM +#endif /* USBPDCORE_LIB_PD3_CONFIG_2 */ + +/* No need to enable USBPDCORE_UNCHUNCKED_MODE + if FW Update et Security messages are not supported by the configuration */ +#if defined(USBPDCORE_SECURITY_MSG) || defined(USBPDCORE_FWUPD) +#define USBPDCORE_UNCHUNCKED_MODE +#endif /* USBPDCORE_SECURITY_MSG || USBPDCORE_FWUPD */ + +#endif /* USBPDCORE_LIB_NO_PD */ + + + +/* _LIB_ID definition */ +/* + _LIB_ID constructs like this: 0xXYVVVWWW + * X: 3 (PD3.0) or 2 (PD2.0) + * Y: 0 (CORE) or 1 (TCPM) + * VVV: Stack version (ex 200 for Stack 2.0.0) + * WWW: 0 (FULL VERSION) or config_x +*/ +/* Defines for PD revision */ +#define LIB_PD_VERSION_POS 28U +#define LIB_PD_VERSION_MSK (0xFU << LIB_PD_VERSION_POS) +#define LIB_PD2 (2U << LIB_PD_VERSION_POS) +#define LIB_PD3 (3U << LIB_PD_VERSION_POS) +/* Defines for CORE or TCPM */ +#define LIB_CORE_TCPM_POS 24U +#define LIB_CORE_TCPM_MSK (0xFU << LIB_CORE_TCPM_POS) +#define LIB_CORE (0U << LIB_CORE_TCPM_POS) +#define LIB_TCPM (1U << LIB_CORE_TCPM_POS) +/* Defines for STACK version */ +#define LIB_STACK_VER_POS 12U +#define LIB_STACK_VER_MSK (0xFFFU << LIB_STACK_VER_POS) +#define LIB_STACK_VER (0x410U << LIB_STACK_VER_POS) +/* Defines for configuration */ +#define LIB_CONFIG_MSK 0xFFFU +#define LIB_FULL 0x000U +#define LIB_CONFIG_1 0x001U +#define LIB_CONFIG_MINSRC 0x002U +#define LIB_CONFIG_MINSNK 0x004U +#define LIB_CONFIG_2 0x010U +#define LIB_CONFIG_NOPD 0x100U +#define LIB_CONFIG_MINDRP 0x200U +#define LIB_CONFIG_3 0x400U + +#define _LIB_ID LIB_ID /* done for CubeMX compatibility purpose */ + +#ifdef USBPDCORE_LIB_PD3_CONFIG_3 +#define LIB_ID (LIB_PD3 | LIB_CORE | LIB_STACK_VER | LIB_CONFIG_3) +#endif /* USBPDCORE_LIB_PD3_CONFIG_3*/ +#ifdef USBPDCORE_LIB_PD3_FULL +#define LIB_ID (LIB_PD3 | LIB_CORE | LIB_STACK_VER | LIB_FULL) +#endif /* USBPDCORE_LIB_PD3_FULL */ +#ifdef USBPDCORE_LIB_PD3_CONFIG_1 +#define LIB_ID (LIB_PD3 | LIB_CORE | LIB_STACK_VER | LIB_CONFIG_1) +#endif /* USBPDCORE_LIB_PD3_CONFIG_1 */ +#ifdef USBPDCORE_LIB_PD2_FULL +#define LIB_ID (LIB_PD2 | LIB_CORE | LIB_STACK_VER | LIB_FULL) +#endif /* USBPDCORE_LIB_PD2_FULL */ +#ifdef USBPDCORE_LIB_PD2_CONFIG_1 +#define LIB_ID (LIB_PD2 | LIB_CORE | LIB_STACK_VER | LIB_CONFIG_1) +#endif /* USBPDCORE_LIB_PD2_CONFIG_1 */ +#ifdef USBPDCORE_LIB_PD2_CONFIG_MINSRC +#define LIB_ID (LIB_PD2 | LIB_CORE | LIB_STACK_VER | LIB_CONFIG_MINSRC) +#endif /* USBPDCORE_LIB_PD2_CONFIG_MINSRC */ +#ifdef USBPDCORE_LIB_PD3_CONFIG_MINSRC +#define LIB_ID (LIB_PD3 | LIB_CORE | LIB_STACK_VER | LIB_CONFIG_MINSRC) +#endif /* USBPDCORE_LIB_PD3_CONFIG_MINSRC */ +#ifdef USBPDCORE_LIB_PD3_CONFIG_MINDRP +#define LIB_ID (LIB_PD3 | LIB_CORE | LIB_STACK_VER | LIB_CONFIG_MINDRP) +#endif /* USBPDCORE_LIB_PD3_CONFIG_MINSRC */ +#ifdef USBPDCORE_LIB_PD2_CONFIG_MINSNK +#define LIB_ID (LIB_PD2 | LIB_CORE | LIB_STACK_VER | LIB_CONFIG_MINSNK) +#endif /* USBPDCORE_LIB_PD2_CONFIG_MINSNK */ +#ifdef USBPDCORE_LIB_PD3_CONFIG_MINSNK +#define LIB_ID (LIB_PD3 | LIB_CORE | LIB_STACK_VER | LIB_CONFIG_MINSNK) +#endif /* USBPDCORE_LIB_PD3_CONFIG_MINSNK */ +#ifdef USBPD_TCPM_LIB_PD2_FULL +#define LIB_ID (LIB_PD2 | LIB_TCPM | LIB_STACK_VER | LIB_FULL) +#endif /* USBPD_TCPM_LIB_PD2_FULL */ +#ifdef USBPD_TCPM_LIB_PD2_MINSRC +#define LIB_ID (LIB_PD2 | LIB_TCPM | LIB_STACK_VER | LIB_CONFIG_MINSRC) +#endif /* USBPD_TCPM_LIB_PD2_MINSRC */ +#ifdef USBPD_TCPM_LIB_PD2_MINSNK +#define LIB_ID (LIB_PD2 | LIB_TCPM | LIB_STACK_VER | LIB_CONFIG_MINSNK) +#endif /* USBPD_TCPM_LIB_PD2_MINSNK */ +#ifdef USBPD_TCPM_LIB_PD2_CONFIG_1 +#define LIB_ID (LIB_PD2 | LIB_TCPM | LIB_STACK_VER | LIB_CONFIG_1) +#endif /* USBPD_TCPM_LIB_PD2_CONFIG_1 */ +#ifdef USBPD_TCPM_LIB_PD3_CONFIG_1 +#define LIB_ID (LIB_PD3 | LIB_TCPM | LIB_STACK_VER | LIB_CONFIG_1) +#endif /* USBPD_TCPM_LIB_PD3_CONFIG_1 */ +#ifdef USBPD_TCPM_LIB_PD3_FULL +#define LIB_ID (LIB_PD3 | LIB_TCPM | LIB_STACK_VER | LIB_FULL) +#endif /* USBPD_TCPM_LIB_PD3_FULL */ +#if defined(USBPDCORE_LIB_PD3_CONFIG_2) +#define LIB_ID (LIB_PD3 | LIB_TCPM | LIB_STACK_VER | LIB_CONFIG_2) +#endif /* USBPDCORE_LIB_PD3_CONFIG_2 */ +#if defined(USBPDCORE_LIB_NO_PD) +#define LIB_ID (LIB_STACK_VER | LIB_CONFIG_NOPD) +#endif /* USBPDCORE_LIB_NO_PD */ +/** + * @} + */ + +/* Exported constants --------------------------------------------------------*/ +#define USBPD_PORT_0 (0U) /*!< Port 0 identifier */ +#define USBPD_PORT_1 (1U) /*!< Port 1 identifier */ +#define USBPD_PORT_2 (2U) /*!< Port 2 identifier */ + +#define USBPD_MAX_NB_PDO (7U) /*!< Maximum number of supported Power Data Objects: fix by the Specification */ +#define BIST_CARRIER_MODE_MS (50U) /*!< Time in ms of the BIST signal*/ + +/* + @brief Maximum size of the RX buffer allocated in the stack to receive a PD frame + @note TX buffer size is used internally in the stack (size if available in @ref USBPD_PHY_SendMessage) + */ +#if defined(USBPDCORE_UNCHUNCKED_MODE) +#define USBPD_MAX_RX_BUFFER_SIZE (264U) /*!< Maximum size of Rx buffer used when unchuncked is supported by the stack */ +#else +#define USBPD_MAX_RX_BUFFER_SIZE (30U) /*!< Maximum size of Rx buffer used when unchuncked + is NOT supported by the stack */ +#endif /* USBPDCORE_UNCHUNCKED_MODE */ + +/* + * Maximum size of a Power Delivery packet (in bits on the wire) : + * 16-bit header + 0..7 32-bit data objects (+ 4b5b encoding) + * 64-bit preamble + SOP (4x 5b) + header (16-bit) + message in 4b5b + 32-bit CRC + EOP (1x 5b) + * = 64bit + 4*5bit + 16bit * 5/4 + 7 * 32bit * 5/4 + 32bit * 5/4 + 5 + */ +#define PHY_BIT_LEN ((uint16_t)429U) +#define PHY_MAX_RAW_SIZE ((uint16_t)((PHY_BIT_LEN*2u) + 3U)) +#define PHY_MAX_RAW_BYTE_SIZE ((uint8_t)60U) /*! 70ns (>~7m) for P2.0 or 1000ns (~100m) for P3.0 */ +#if defined(USBPD_REV30_SUPPORT) + , CABLE_LATENCY_2000NS = 9U, /*!< 2000ns (~200m) */ + CABLE_LATENCY_3000NS = 10u /*!< 3000ns (~300m) */ +#endif /* USBPD_REV30_SUPPORT */ +} USBPD_CableLatency; + +/** + * @} + */ + +/** + * @brief Cable maximum VBUS voltage + * @{ + */ +#define VBUS_MAX_20V 0u +#define VBUS_MAX_30V 1u +#define VBUS_MAX_40V 2u +#define VBUS_MAX_50V 3u + +typedef uint32_t USBPD_CableMaxVoltage; + +/** + * @} + */ + +/** + * @brief Cable Termination Type in Active/Passive cable + * @{ + */ +#define CABLE_TERM_BOTH_PASSIVE_NO_VCONN 0u /*!< VCONN not required (PD2.0 only) */ +#define CABLE_TERM_BOTH_PASSIVE_VCONN 1u /*!< VCONN required (PD2.0 only) */ +#if defined(USBPD_REV30_SUPPORT) +#define CABLE_TERM_ONE_EACH_VCONN 2u /*!< One end Active, one end passive, VCONN required */ +#define CABLE_TERM_BOTH_ACTIVE_VCONN 3u /*!< Both ends Active, VCONN required */ +#endif /* USBPD_REV30_SUPPORT */ + +typedef uint32_t USBPD_CableTermType; + +/** + * @} + */ + +#if defined(USBPD_REV30_SUPPORT) +/** + * @brief Maximum Cable VBUS Voltage in Active/Passive cable + * @{ + */ +#define VBUS_20V 0u /*!< Maximum Cable VBUS Voltage 20V */ +#define VBUS_30V 1u /*!< Maximum Cable VBUS Voltage 30V */ +#define VBUS_40V 2u /*!< Maximum Cable VBUS Voltage 40V */ +#define VBUS_50V 3u /*!< Maximum Cable VBUS Voltage 50V */ + +typedef uint32_t USBPD_VBUSMaxVoltage; + +/** + * @} + */ + +/** + * @brief Active cable - SBU Supported + * @{ + */ +#define ACTIVE_CABLE_SBU_NOT_SUPPORTED 0u /*!< SBUs connections not supported */ +#define ACTIVE_CABLE_SBU_SUPPORTED 1u /*!< SBUs connections supported */ + +typedef uint32_t USBPD_ActiveCableSBUSupported; + +/** + * @} + */ + +/** + * @brief Active cable - SBU Type (valid only if SBU Connection is supported @ref ACTIVE_CABLE_SBU_SUPPORTED) + * @{ + */ +#define ACTIVE_CABLE_SBU_TYPE_PASSIVE 0u /*!< SBU is passive */ +#define ACTIVE_CABLE_SBU_TYPE_ACTIVE 1u /*!< SBU is active */ + +typedef uint32_t USBPD_ActiveCableSBUType; + +/** + * @} + */ + +/** + * @brief UFP VDO - Device capability + * @{ + */ +#define DEVICE_CAPABILITY_USB2P0 0u /*!< [USB 2.0] Device Capable */ +#define DEVICE_CAPABILITY_USB2P0_BILLBOARD 1u /*!< [USB 2.0] Device Capable (Billboard only) */ +#define DEVICE_CAPABILITY_USB3P2 2u /*!< [USB 3.2] Device Capable */ +#define DEVICE_CAPABILITY_USB4 3u /*!< [USB4] Device Capable */ + +typedef uint32_t USBPD_VDO_UFP_DeviceCapability; + +/** + * @} + */ + +/** + * @brief UFP VDO - Alternate Modes + * @{ + */ +#define ALTERNATE_MODES_TBT3 0u /*!< Supports [TBT3] Alternate Mode */ +#define ALTERNATE_MODES_RECONFIG_TYPEC_2P0 1u /*!< Supports Alternate Modes that reconfigure the signals + on the [USB Type-C 2.0] connector - except for [TBT3]. */ +#define ALTERNATE_MODES_NO_RECONFIG_TYPEC_2P0 2u /*!< Supports Alternate Modes that do not reconfigure the signals + on the [USB Type-C 2.0] connector */ + +typedef uint32_t USBPD_VDO_UFP_AlternateModes; + +/** + * @} + */ + +/** + * @brief DFP VDO - Host capability + * @{ + */ +#define HOST_CAPABILITY_USB2P0 0u /*!< [USB 2.0] Host Capable */ +#define HOST_CAPABILITY_USB3P2 1u /*!< [USB 3.2] Host Capable */ +#define HOST_CAPABILITY_USB4 2u /*!< [USB4] Host Capable */ + +typedef uint32_t USBPD_VDO_DFP_HostCapability; + +/** + * @} + */ + +#endif /* USBPD_REV30_SUPPORT */ + +/** + * @brief configurability of SS Directionality in Active/Passive cable and AMA VDO (PD2.0 only) + * @{ + */ +#define SS_DIR_FIXED 0u /*!< SSTX Directionality Support Fixed */ +#define SS_DIR_CONFIGURABLE 1u /*!< SSTX Directionality Support Configurable */ + +typedef uint32_t USBPD_SsDirectionality; + +/** + * @} + */ + +/** + * @brief SVDM commands definition + */ +#define SVDM_RESERVEDCOMMAND 0x00u +#define SVDM_DISCOVER_IDENTITY 0x01u +#define SVDM_DISCOVER_SVIDS 0x02u +#define SVDM_DISCOVER_MODES 0x03u +#define SVDM_ENTER_MODE 0x04u +#define SVDM_EXIT_MODE 0x05u +#define SVDM_ATTENTION 0x06u +#define SVDM_SPECIFIC_1 0x10u +#define SVDM_SPECIFIC_2 0x11u +#define SVDM_SPECIFIC_3 0x12u +#define SVDM_SPECIFIC_4 0x13u +#define SVDM_SPECIFIC_5 0x14u +#define SVDM_SPECIFIC_6 0x15u +#define SVDM_SPECIFIC_7 0x16u +#define SVDM_SPECIFIC_8 0x17u +#define SVDM_SPECIFIC_9 0x18u +#define SVDM_SPECIFIC_10 0x19u +#define SVDM_SPECIFIC_11 0x1Au +#define SVDM_SPECIFIC_12 0x1Bu +#define SVDM_SPECIFIC_13 0x1Cu +#define SVDM_SPECIFIC_14 0x1Du +#define SVDM_SPECIFIC_15 0x1Eu +#define SVDM_SPECIFIC_16 0x1Fu + +typedef uint32_t USBPD_VDM_Command_Typedef; + +/** + * @brief VBUS Current Handling Capability in Active/Passive cable VDO + * @{ + */ +#define VBUS_DEFAULT 0u /*!< USB Type-C Default Current */ +#define VBUS_3A 1u /*!< VBUS Current Handling Capability 3A */ +#define VBUS_5A 2u /*!< VBUS Current Handling Capability 5A */ + +typedef uint32_t USBPD_VBUSCurrentHandCap; + +/** + * @} + */ + +/** + * @brief USB Superspeed Signaling Support in Active/Passive cable VDO + * @{ + */ +#define USB2P0_ONLY 0u /*!< [USB 2.0] only, no SuperSpeed support */ +#define USB3P2_GEN1 1u /*!< [USB 3.2] Gen1 */ +#define USB3P2_USB4_GEN2 2u /*!< [USB 3.2]/[USB4] Gen2 */ +#if defined(USBPD_REV30_SUPPORT) +#define USB4_GEN3 3u /*!< [USB4] Gen3 */ +#endif /* USBPD_REV30_SUPPORT */ + +/* Used for legacy */ +#define USB3P1_GEN1 USB3P2_GEN1 /*!< USB3.1 Gen1 and USB2.0 */ +#define USB3P1_GEN1N2 USB3P2_USB4_GEN2 /*!< USB3.1 Gen1, Gen2 and USB2.0*/ + +typedef uint32_t USBPD_UsbSsSupport; +/** + * @} + */ + +/** + * @brief Power needed by adapter for full functionality in AMA VDO header + * @{ + */ +typedef enum +{ + VCONN_1W = 0U, /*!< VCONN power 1W */ + VCONN_1P5W = 1U, /*!< VCONN power 1.5W */ + VCONN_2W = 2U, /*!< VCONN power 2W */ + VCONN_3W = 3U, /*!< VCONN power 3W */ + VCONN_4W = 4U, /*!< VCONN power 4W */ + VCONN_5W = 5U, /*!< VCONN power 5W */ + VCONN_6W = 6U, /*!< VCONN power 6W */ +} USBPD_VConnPower; + +/** + * @} + */ + +/** + * @brief VCONN being required by an adapter in AMA VDO header + * @{ + */ +typedef enum +{ + VCONN_NOT_REQUIRED = 0U, /*!< VCONN not required */ + VCONN_REQUIRED = 1U, /*!< VCONN required */ +} USBPD_VConnRequirement; + +/** + * @} + */ + +/** + * @brief VBUS being required by an adapter in AMA VDO header + * @{ + */ +typedef enum +{ + VBUS_NOT_REQUIRED = 0U, /*!< VBUS not required */ + VBUS_REQUIRED = 1U, /*!< VBUS required */ +} USBPD_VBusRequirement; + +/** + * @} + */ + +#if defined(USBPD_REV30_SUPPORT) +#if defined(USBPDCORE_VPD) +/** + * @brief Vconn Powered USB Device VDO - Charge Through Current Support + * @{ + */ +#define VPD_CHARGE_THROUGH_NOT_SUPPORTED 0u /*!< the VPD does not support Charge Through */ +#define VPD_CHARGE_THROUGH_SUPPORTED 1u /*!< the VPD supports Charge Through */ + +typedef uint32_t USBPD_VDO_VPD_ChargeSupport; +/** + * @} + */ + +/** + * @brief Vconn Powered USB Device VDO - Charge Through Support + * @{ + */ +#define VPD_CHARGE_CURRENT_3A 0u /*!< 3A capable */ +#define VPD_CHARGE_CURRENT_5A 1u /*!< 5A capable */ + +typedef uint32_t USBPD_VDO_VPD_ChargeCurrent; +/** + * @} + */ +#endif /* USBPDCORE_VPD */ +#endif /* USBPD_REV30_SUPPORT */ + +#define SVDM_INITIATOR 0x00u +#define SVDM_RESPONDER_ACK 0x01u +#define SVDM_RESPONDER_NAK 0x02u +#define SVDM_RESPONDER_BUSY 0x03u +#define SVDM_CABLE_TIMEOUT 0x04u /*!< Indication that cable is PD capable but no answer to VDM Discovery identity */ +#define SVDM_CABLE_NO_PD_CAPABLE 0x05u /*!< Indication that cable is not PD capable (no goodCRC to VDM Discovery identity */ + +typedef uint32_t USBPD_VDM_CommandType_Typedef; + +/** + * @brief AMA USB Superspeed Signaling Support in AMA VDO header + * @{ + */ + +#define AMA_USB2P0_ONLY 0u /*!< [USB 2.0] only, no SuperSpeed support */ +#define AMA_USB3P2_GEN1 1u /*!< [USB 3.2] Gen1 and USB 2.0 */ +#define AMA_USB3P2_GEN1N2 2u /*!< [USB 3.2] Gen1, Gen2 and USB 2.0 */ +#define AMA_USB2P0_BILLBOARD 3u /*!< [USB 2.0] billboard only */ + +/* Keep for legacy reasons */ +#define AMA_USB3P1_GEN1 USB3P2_GEN1 /*!< USB3.1 Gen1 and USB2.0 */ +#define AMA_USB3P1_GEN1N2 AMA_USB3P2_GEN1N2 /*!< USB3.1 Gen1, Gen2 and USB2.0 */ + +typedef uint32_t USBPD_AmaUsbSsSupport; + +/** + * @} + */ + +/** + * @} + */ + +#if defined(USBPDCORE_FWUPD) +/** + * @brief USBPD Firmware Update Status Information + * @{ + */ +typedef enum +{ + USBPD_FWUPD_STATUS_OK = 0x00U, /*!< Request completed successfully or delayed */ + USBPD_FWUPD_STATUS_ERR_TARGET = 0x01U, /*!< FW not targeted for this device */ + USBPD_FWUPD_STATUS_ERR_FILE = 0x02U, /*!< Fails vendor-specific verification test */ + USBPD_FWUPD_STATUS_ERR_WRITE = 0x03U, /*!< Unable to write memory */ + USBPD_FWUPD_STATUS_ERR_ERASE = 0x04U, /*!< Memory erase function failed */ + USBPD_FWUPD_STATUS_ERR_CHECK_ERASED = 0x05U, /*!< Memory erase check failed */ + USBPD_FWUPD_STATUS_ERR_PROG = 0x06U, /*!< Program memory function failed */ + USBPD_FWUPD_STATUS_ERR_VERIFY = 0x07U, /*!< Program memory failed verification */ + USBPD_FWUPD_STATUS_ERR_ADDRESS = 0x08U, /*!< Received address is out of range */ + USBPD_FWUPD_STATUS_ERR_NOTDONE = 0x09U, /*!< Received PDFU_DATA Request with a zero length Data + Block, but the PDFU Responder expects more data */ + USBPD_FWUPD_STATUS_ERR_FIRMWARE = 0x0AU, /*!< Device's firmware is corrupt. + It cannot return to normal operations. */ + USBPD_FWUPD_STATUS_ERR_POR = 0x0DU, /*!< Unexpected power on reset */ + USBPD_FWUPD_STATUS_ERR_UNKNOWN = 0x0EU, /*!< Something went wrong */ + USBPD_FWUPD_STATUS_ERR_UNEXPECTED_HARD_RESET = 0x80U, /*!< Used when firmware update starts after a hard reset + (enumeration, etc.) that occurred in the middle + of firmware update */ + USBPD_FWUPD_STATUS_ERR_UNEXPECTED_SOFT_RESET = 0x81U, /*!< Used when firmware update starts after soft reset + (new power contract, etc.) + that occurred in the middle of firmware update */ + USBPD_FWUPD_STATUS_ERR_UNEXPECTED_REQUEST = 0x82U, /*!< PDFU Responder received a request that is not + appropriate for the current Phase */ + USBPD_FWUPD_STATUS_ERR_REJECT_PAUSE = 0x83U, /*!< PDFU Responder is unable or unwilling to pause + a firmware image transfer */ +} USBPD_FWUPD_Status_TypeDef; +/** + * @} + */ +#endif /* USBPDCORE_FWUPD */ + +/** @defgroup USBPD_CORE_DataInfoType_TypeDef USB CORE Data information type + * @brief Data Info types used in PE callbacks (USBPD_PE_GetDataInfo and USBPD_PE_SetDataInfo) + * @{ + */ +typedef enum +{ + USBPD_CORE_DATATYPE_SRC_PDO = 0x00U, /*!< Handling of port Source PDO (SRC or DRP configuration used only in USBPD_PE_GetDataInfo) */ + USBPD_CORE_DATATYPE_SNK_PDO = 0x01U, /*!< Handling of port Sink PDO, requested by get sink capa (SNK or DRP configuration used only in USBPD_PE_GetDataInfo) */ + USBPD_CORE_DATATYPE_RDO_POSITION = 0x02U, /*!< Reset the PDO position selected by the sink only (used only in USBPD_PE_SetDataInfo) */ + USBPD_CORE_DATATYPE_REQ_VOLTAGE = 0x03U, /*!< Get voltage value requested for BIST tests, expect 5V (used only in USBPD_PE_GetDataInfo) */ + USBPD_CORE_DATATYPE_RCV_SRC_PDO = 0x04U, /*!< Storage of Received Source PDO values (used only in USBPD_PE_SetDataInfo) */ + USBPD_CORE_DATATYPE_RCV_SNK_PDO = 0x05U, /*!< Storage of Received Sink PDO values (used only in USBPD_PE_SetDataInfo) */ + USBPD_CORE_DATATYPE_RCV_REQ_PDO = 0x06U, /*!< Storage of Received Sink Request PDO value (SRC or DRP configuration used in USBPD_PE_SetDataInfo) */ + USBPD_CORE_DATATYPE_REQUEST_DO = 0x07U, /*!< Not used - keep for legacy reason */ + USBPD_CORE_EXTENDED_CAPA = 0x08U, /*!< Source Extended capability message content (used in USBPD_PE_GetDataInfo and USBPD_PE_SetDataInfo) */ + USBPD_CORE_INFO_STATUS = 0x09U, /*!< Information status message content (used in USBPD_PE_GetDataInfo and USBPD_PE_SetDataInfo) */ + USBPD_CORE_PPS_STATUS = 0x0AU, /*!< PPS Status message content (used in USBPD_PE_GetDataInfo and USBPD_PE_SetDataInfo) */ + USBPD_CORE_ALERT, /*!< Storing of received Alert message content (used only in USBPD_PE_SetDataInfo) */ + USBPD_CORE_GET_MANUFACTURER_INFO, /*!< Storing of received Get Manufacturer info message content (used only in USBPD_PE_SetDataInfo) */ + USBPD_CORE_MANUFACTURER_INFO, /*!< Retrieve of Manufacturer info message content (used in USBPD_PE_GetDataInfo and USBPD_PE_SetDataInfo) */ + USBPD_CORE_GET_BATTERY_STATUS, /*!< Storing of received Get Battery status message content (used only in USBPD_PE_SetDataInfo) */ + USBPD_CORE_BATTERY_STATUS, /*!< Retrieve of Battery status message content (used in USBPD_PE_GetDataInfo and USBPD_PE_SetDataInfo) */ + USBPD_CORE_GET_BATTERY_CAPABILITY, /*!< Storing of received Get Battery capability message content (used only in USBPD_PE_SetDataInfo) */ + USBPD_CORE_BATTERY_CAPABILITY, /*!< Retrieve of Battery capability message content (used in USBPD_PE_GetDataInfo and USBPD_PE_SetDataInfo) */ + USBPD_CORE_UNSTRUCTURED_VDM, /*!< Not used - keep for legacy reason */ +#if defined(USBPDCORE_SNK_CAPA_EXT) + USBPD_CORE_SNK_EXTENDED_CAPA, /*!< Storing and retrieve of Sink Extended capability message content (used in USBPD_PE_GetDataInfo and USBPD_PE_SetDataInfo) */ +#endif /* USBPDCORE_SNK_CAPA_EXT */ +#if defined(USBPDCORE_PECABLE) + USBPD_CORE_CABLE_GETIDENTITY, /*!< get the cable identity information (used in USBPD_PE_GetDataInfo) */ + USBPD_CORE_CABLE_GETSTATUS, /*!< get the cable status information (used in USBPD_PE_GetDataInfo) */ +#endif /* USBPDCORE_PECABLE */ +#if defined(USBPDCORE_USBDATA) + USBPD_CORE_DATATYPE_ENTERUSB, /*!< get info to send an ENTER_USB message */ +#endif /* USBPDCORE_USBDATA */ + USBPD_CORE_REVISION, /*!< get/set revision info */ +} USBPD_CORE_DataInfoType_TypeDef; +/** + * @} + */ +#if defined(USBPDCORE_USBDATA) +/** @defgroup USBPD_CORE_ActionType_TypeDef USB CORE Action type + * @brief Data Info types used in PE callbacks (USBPD_PE_GetDataInfo and USBPD_PE_SetDataInfo) + * @{ + */ +typedef enum +{ + USBPD_ACTION_REPLY_ENTER_USB = 0x01U, /*!< Get DPM reply to a ENTER_USB message */ + USBPD_ACTION_REPLY_DATA_RESET = 0x02U, /*!< Get DPM reply to a DATA_RESET message */ +} USBPD_CORE_ActionType_TypeDef; +#endif /* USBPDCORE_USBDATA */ +/** + * @} + */ + +/** + * @} + */ + +/* Exported typedef ----------------------------------------------------------*/ + +/** @defgroup USBPD_CORE_DEF_Exported_TypeDef USBPD CORE DEF Exported TypeDef + * @{ + */ + +#if defined(USBPD_REV30_SUPPORT) && defined(USBPDCORE_PPS) +/** + * @brief USB PD Programmable Power Supply APDO Structure definition (same for SRC and SNK) + * + */ +typedef struct +{ + uint32_t MaxCurrentIn50mAunits : 7u; /*!< Maximum Current in 50mA increments */ + uint32_t Reserved1 : 1u; /*!< Reserved - Shall be set to zero */ + uint32_t MinVoltageIn100mV : 8u; /*!< Minimum Voltage in 100mV increments */ + uint32_t Reserved2 : 1u; /*!< Reserved - Shall be set to zero */ + uint32_t MaxVoltageIn100mV : 8u; /*!< Maximum Voltage in 100mV increments */ + uint32_t Reserved3 : 2u; /*!< Reserved - Shall be set to zero */ + uint32_t PPSPowerLimited : 1u; /*!< PPS Power Limited Bit */ + uint32_t ProgrammablePowerSupply: 2u; /*!< 00b - Programmable Power Supply */ + uint32_t PPS_APDO : 2u; /*!< 11b - Augmented Power Data Object (APDO) */ +} USBPD_ProgrammablePowerSupplyAPDO_TypeDef; + +#endif /*_USBPD_REV30_SUPPORT && PPS*/ + +/** + * @brief USB PD Source Fixed Supply Power Data Object Structure definition + * + */ +typedef struct +{ + uint32_t MaxCurrentIn10mAunits : 10u; + uint32_t VoltageIn50mVunits : 10u; + USBPD_CORE_PDO_PeakCurr_TypeDef PeakCurrent : 2u; +#if defined(USBPD_REV30_SUPPORT) + uint32_t Reserved22_23 : 2u; + uint32_t UnchunkedExtendedMessage : 1u; +#else + uint32_t Reserved22_24 : 3u; +#endif /* USBPD_REV30_SUPPORT */ + USBPD_CORE_PDO_DRDataSupport_TypeDef DataRoleSwap : 1u; + USBPD_CORE_PDO_USBCommCapable_TypeDef USBCommunicationsCapable : 1u; + USBPD_CORE_PDO_ExtPowered_TypeDef ExternallyPowered : 1u; + USBPD_CORE_PDO_USBSuspendSupport_TypeDef USBSuspendSupported : 1u; + USBPD_CORE_PDO_DRPowerSupport_TypeDef DualRolePower : 1u; + USBPD_CORE_PDO_Type_TypeDef FixedSupply : 2u; + +} USBPD_SRCFixedSupplyPDO_TypeDef; + +/** + * @brief USB PD Source Variable Supply Power Data Object Structure definition + * + */ +typedef struct +{ +uint32_t MaxCurrentIn10mAunits : + 10u; +uint32_t MinVoltageIn50mVunits : + 10u; +uint32_t MaxVoltageIn50mVunits : + 10u; +uint32_t VariableSupply : + 2u; +} USBPD_SRCVariableSupplyPDO_TypeDef; + +/** + * @brief USB PD Source Battery Supply Power Data Object Structure definition + * + */ +typedef struct +{ +uint32_t MaxAllowablePowerIn250mWunits : + 10u; +uint32_t MinVoltageIn50mVunits : + 10u; +uint32_t MaxVoltageIn50mVunits : + 10u; +uint32_t Battery : + 2u; +} USBPD_SRCBatterySupplyPDO_TypeDef; + +/** + * @brief USB PD Sink Fixed Supply Power Data Object Structure definition + * + */ +typedef struct +{ +uint32_t OperationalCurrentIn10mAunits : + 10u; +uint32_t VoltageIn50mVunits : + 10u; +#if defined(USBPD_REV30_SUPPORT) +uint32_t FastRoleSwapRequiredCurrent : + 2u; +uint32_t Reserved20_22 : + 3u; +#else +uint32_t Reserved20_24 : + 5u; +#endif /* USBPD_REV30_SUPPORT */ +uint32_t DataRoleSwap : + 1u; +uint32_t USBCommunicationsCapable : + 1; +uint32_t ExternallyPowered : + 1u; +uint32_t HigherCapability : + 1u; +uint32_t DualRolePower : + 1u; +uint32_t FixedSupply : + 2u; +} USBPD_SNKFixedSupplyPDO_TypeDef; + +/** + * @brief USB PD Sink Variable Supply Power Data Object Structure definition + * + */ +typedef struct +{ +uint32_t OperationalCurrentIn10mAunits : + 10u; +uint32_t MinVoltageIn50mVunits : + 10u; +uint32_t MaxVoltageIn50mVunits : + 10u; +uint32_t VariableSupply : + 2u; +} USBPD_SNKVariableSupplyPDO_TypeDef; + +/** + * @brief USB PD Sink Battery Supply Power Data Object Structure definition + * + */ +typedef struct +{ +uint32_t OperationalPowerIn250mWunits : + 10u; +uint32_t MinVoltageIn50mVunits : + 10u; +uint32_t MaxVoltageIn50mVunits : + 10u; +uint32_t Battery : + 2u; +} USBPD_SNKBatterySupplyPDO_TypeDef; + +/** + * @brief USB PD Sink Generic Power Data Object Structure definition + * + */ +typedef struct +{ + uint32_t Bits_0_10 : 10u; /*!< Specific Power Capabilities are described by the (A)PDOs in the following sections. */ + uint32_t VoltageIn50mVunits : 10u; /*!< Maximum Voltage in 50mV units valid for all PDO (not APDO) */ + uint32_t Bits_20_29 : 10u; /*!< Specific Power Capabilities are described by the (A)PDOs in the following sections. */ + USBPD_CORE_PDO_Type_TypeDef PowerObject : 2u; /*!< (A) Power Data Object */ +} USBPD_GenericPDO_TypeDef; + +/** + * @brief USB PD Power Data Object Structure definition + * + */ +typedef union +{ + uint32_t d32; + + USBPD_GenericPDO_TypeDef GenericPDO; /*!< Generic Power Data Object Structure */ + + USBPD_SRCFixedSupplyPDO_TypeDef SRCFixedPDO; /*!< Fixed Supply PDO - Source */ + + USBPD_SRCVariableSupplyPDO_TypeDef SRCVariablePDO; /*!< Variable Supply (non-Battery) PDO - Source */ + + USBPD_SRCBatterySupplyPDO_TypeDef SRCBatteryPDO; /*!< Battery Supply PDO - Source */ + + USBPD_SNKFixedSupplyPDO_TypeDef SNKFixedPDO; /*!< Fixed Supply PDO - Sink */ + + USBPD_SNKVariableSupplyPDO_TypeDef SNKVariablePDO; /*!< Variable Supply (non-Battery) PDO - Sink */ + + USBPD_SNKBatterySupplyPDO_TypeDef SNKBatteryPDO; /*!< Battery Supply PDO - Sink */ + +#if defined(USBPD_REV30_SUPPORT) +#ifdef USBPDCORE_PPS + USBPD_ProgrammablePowerSupplyAPDO_TypeDef SRCSNKAPDO;/*!< Programmable Power Supply APDO - Source / Sink */ +#endif /* USBPDCORE_PPS */ +#endif /* USBPD_REV30_SUPPORT */ + +} USBPD_PDO_TypeDef; + +/** + * @brief USB PD Sink Fixed and Variable Request Data Object Structure definition + * + */ +typedef struct +{ +uint32_t MaxOperatingCurrent10mAunits : /*!< Corresponding to min if GiveBackFlag = 1 */ + 10u; +uint32_t OperatingCurrentIn10mAunits : + 10u; +#if defined(USBPD_REV30_SUPPORT) +uint32_t Reserved20_22 : + 3u; +uint32_t UnchunkedExtendedMessage : + 1u; +#else +uint32_t Reserved20_23 : + 4u; +#endif /* USBPD_REV30_SUPPORT */ +uint32_t NoUSBSuspend : + 1u; +uint32_t USBCommunicationsCapable : + 1u; +uint32_t CapabilityMismatch : + 1u; +uint32_t GiveBackFlag : + 1u; +uint32_t ObjectPosition : + 3u; +uint32_t Reserved31 : + 1u; +} USBPD_SNKFixedVariableRDO_TypeDef; + +/** + * @brief USB PD Sink Battery Request Data Object Structure definition + * + */ +typedef struct +{ +uint32_t MaxOperatingPowerIn250mWunits : + 10u; +uint32_t OperatingPowerIn250mWunits : + 10u; +#if defined(USBPD_REV30_SUPPORT) +uint32_t Reserved20_22 : + 3u; +uint32_t UnchunkedExtendedMessage : + 1u; /*!< Unchunked Extended Messages Supported */ +#else +uint32_t Reserved20_23 : + 4u; +#endif /* USBPD_REV30_SUPPORT */ +uint32_t NoUSBSuspend : + 1u; +uint32_t USBCommunicationsCapable : + 1u; +uint32_t CapabilityMismatch : + 1u; +uint32_t GiveBackFlag : + 1u; +uint32_t ObjectPosition : + 3u; +uint32_t Reserved31 : + 1u; +} USBPD_SNKBatteryRDO_TypeDef; + +#if defined(USBPD_REV30_SUPPORT) +/** + * @brief USB PD Sink Programmable Request Data Object Structure definition + * + */ +typedef struct +{ + uint32_t OperatingCurrentIn50mAunits : 7u; /*!< Operating Current 50mA units */ + uint32_t Reserved1 : 2u; /*!< Reserved - Shall be set to zero */ + uint32_t OutputVoltageIn20mV : 11; /*!< Output Voltage in 20mV units */ + uint32_t Reserved2 : 3u; /*!< Reserved - Shall be set to zero */ + uint32_t UnchunkedExtendedMessage : 1u; /*!< Unchunked Extended Messages Supported */ + uint32_t NoUSBSuspend : 1u; /*!< No USB Suspend */ + uint32_t USBCommunicationsCapable : 1u; /*!< USB Communications Capable */ + uint32_t CapabilityMismatch : 1u; /*!< Capability Mismatch */ + uint32_t Reserved3 : 1u; /*!< Reserved - Shall be set to zero */ + uint32_t ObjectPosition : 3u; /*!< Object position (000b is Reserved and Shall Not be used) */ + uint32_t Reserved4 : 1u; /*!< USB Communications Capable */ +} USBPD_SNKProgrammableRDO_TypeDef; +#endif /* USBPD_REV30_SUPPORT */ + + +/** + * @brief USB PD Sink Generic Request Data Object Structure definition + * + */ +typedef struct +{ +#if defined(USBPD_REV30_SUPPORT) + uint32_t Bits_0_22 : 23u; /*!< Bits 0 to 22 of RDO */ + uint32_t UnchunkedExtendedMessage : 1u; /*!< Unchunked Extended Messages Supported */ +#else + uint32_t Bits_0_23 : 24u; /*!< Bits 0 to 23 of RDO */ +#endif /* USBPD_REV30_SUPPORT */ + uint32_t NoUSBSuspend : 1u; /*!< No USB Suspend */ + uint32_t USBCommunicationsCapable : 1u; /*!< USB Communications Capable */ + uint32_t CapabilityMismatch : 1u; /*!< Capability Mismatch */ + uint32_t Bit_27 : 1u; /*!< Reserved - Shall be set to zero */ + uint32_t ObjectPosition : 3u; /*!< Object position (000b is Reserved and Shall Not be used) */ + uint32_t Bit_31 : 1u; /*!< USB Communications Capable */ +} USBPD_SNKGenericRDO_TypeDef; + +/** + * @brief USB PD Sink Request Data Object Structure definition + * + */ +typedef union +{ + uint32_t d32; + + USBPD_SNKGenericRDO_TypeDef GenericRDO; /*!< Generic Request Data Object Structure */ + + USBPD_SNKFixedVariableRDO_TypeDef FixedVariableRDO; /*!< Fixed and Variable Request Data Object Structure */ + + USBPD_SNKBatteryRDO_TypeDef BatteryRDO; /*!< Battery Request Data Object Structure */ + +#if defined(USBPD_REV30_SUPPORT) + USBPD_SNKProgrammableRDO_TypeDef ProgRDO; /*!< Programmable Request Data Object Structure */ +#endif /* USBPD_REV30_SUPPORT */ + +} USBPD_SNKRDO_TypeDef; + +#if defined(USBPD_REV30_SUPPORT) && defined(USBPDCORE_PPS) +/** + * @brief USBPD Port APDO Structure definition + * + */ +typedef struct +{ + uint32_t *ListOfAPDO; /*!< Pointer on Augmented Power Data Objects list, defining + port capabilities */ + uint8_t NumberOfAPDO; /*!< Number of Augmented Power Data Objects defined in ListOfAPDO + This parameter must be set at max to @ref USBPD_MAX_NB_PDO value */ +} USBPD_PortAPDO_TypeDef; +#endif /* USBPD_REV30_SUPPORT && USBPDCORE_PPS */ + +/** + * @brief USB PD BIST Data Object Structure definition + * + */ +typedef union +{ + uint32_t d32; + struct + { +uint32_t BistErrorCounter : + 16u; +uint32_t Reserved16_27 : + 12u; +uint32_t BistMode : + 4u; + } + b; +} USBPD_BISTDataObject_TypeDef; + +/** @brief Sink requested power profile Structure definition + * + */ +typedef struct +{ + uint32_t MaxOperatingCurrentInmAunits; /*!< Sink board Max operating current in mA units */ + uint32_t OperatingVoltageInmVunits; /*!< Sink board operating voltage in mV units */ + uint32_t MaxOperatingVoltageInmVunits; /*!< Sink board Max operating voltage in mV units */ + uint32_t MinOperatingVoltageInmVunits; /*!< Sink board Min operating voltage in mV units */ + uint32_t OperatingPowerInmWunits; /*!< Sink board operating power in mW units */ + uint32_t MaxOperatingPowerInmWunits; /*!< Sink board Max operating power in mW units */ +} USBPD_SNKPowerRequest_TypeDef; + + +/** @defgroup USBPD_CORE_VDM_Exported_Structures USBPD CORE VDM Exported Structures + * @{ + */ + +/** @defgroup USBPD_ProductVdo_TypeDef USB PD VDM Product VDO + * @brief USB PD Product VDO Structure definition + * @{ + */ +typedef union +{ + uint32_t d32; + struct + { +uint32_t bcdDevice : /*!< Device version */ + 16u; +uint32_t USBProductId : /*!< USB Product ID */ + 16u; + } + b; +} USBPD_ProductVdo_TypeDef; + +/** + * @} + */ + +/** @defgroup USBPD_IDHeaderVDOStructure_definition USB SVDM ID header VDO Structure definition + * @brief USB SVDM ID header VDO Structure definition + * @{ + */ +typedef union +{ + uint32_t d32; + struct + { + uint32_t VID : 16u; /*!< SVDM Header's SVDM Version */ + uint32_t Reserved : 10u; /*!< Reserved */ + USBPD_ModalOp_TypeDef ModalOperation : 1u; /*!< Modal Operation Supported based on @ref USBPD_ModalOp_TypeDef */ + USBPD_ProductType_TypeDef ProductTypeUFPorCP : 3u; /*!< Product Type (UFP or Cable Plug)based on @ref USBPD_ProductType_TypeDef */ + USBPD_USBCapa_TypeDef USBDevCapability : 1u; /*!< USB Communications Capable as a USB Device based on @ref USBPD_USBCapa_TypeDef */ + USBPD_USBCapa_TypeDef USBHostCapability : 1u; /*!< USB Communications Capable as USB Host based on @ref USBPD_USBCapa_TypeDef */ + } b20; +#if defined(USBPD_REV30_SUPPORT) + struct + { + uint32_t VID : 16u; /*!< SVDM Header's SVDM Version */ + uint32_t Reserved : 5u; /*!< Reserved */ + uint32_t ConnectorType : 2u; /*!< Connector Type based on @ref USBPD_ConnectorType_TypeDef */ + uint32_t ProductTypeDFP : 3u; /*!< Product Type (DFP) based on @ref USBPD_ProductType_TypeDef */ + USBPD_ModalOp_TypeDef ModalOperation : 1u; /*!< Modal Operation Supported based on @ref USBPD_ModalOp_TypeDef */ + USBPD_ProductType_TypeDef ProductTypeUFPorCP : 3u; /*!< Product Type (UFP or Cable Plug)based on @ref USBPD_ProductType_TypeDef */ + USBPD_USBCapa_TypeDef USBDevCapability : 1u; /*!< USB Communications Capable as a USB Device based on @ref USBPD_USBCapa_TypeDef */ + USBPD_USBCapa_TypeDef USBHostCapability : 1u; /*!< USB Communications Capable as USB Host based on @ref USBPD_USBCapa_TypeDef */ + } b30; +#endif /* USBPD_REV30_SUPPORT */ +} USBPD_IDHeaderVDO_TypeDef; +/** + * @} + */ + +typedef union +{ + struct /* PD 2.0*/ + { + USBPD_SsDirectionality SSRX2_DirSupport : 1u; /*!< SSRX2 Directionality Support (PD2.0) */ + USBPD_SsDirectionality SSRX1_DirSupport : 1u; /*!< SSRX1 Directionality Support (PD2.0) */ + USBPD_SsDirectionality SSTX2_DirSupport : 1u; /*!< SSTX2 Directionality Support (PD2.0) */ + USBPD_SsDirectionality SSTX1_DirSupport : 1u; /*!< SSTX1 Directionality Support (PD2.0) */ + } + pd_v20; +#if defined(USBPD_REV30_SUPPORT) + struct /* PD 3.0*/ + { + uint8_t Reserved : 2u; /*!< Reserved */ + USBPD_VBUSMaxVoltage MaxVBUS_Voltage : 2u; /*!< Maximum Cable VBUS Voltage */ + } + pd_v30; +#endif /* USBPD_REV30_SUPPORT */ +} USBPD_CableVdo_Field1TypeDef; + +/** @defgroup USBPD_AttentionInfo_TypeDef USB PD Attention Info object Structure definition + * @brief USB PD Attention Info object Structure definition + * @{ + */ +typedef struct +{ + uint32_t VDO; + uint16_t SVID; + USBPD_VDM_Command_Typedef Command; + uint8_t ModeIndex; +} USBPD_AttentionInfo_TypeDef; + +/** + * @} + */ + +typedef union +{ + struct /* PD 2.0*/ + { + uint8_t Reserved : 4u; /*!< Reserved */ + } + pd_v20; +#if defined(USBPD_REV30_SUPPORT) + struct /* PD 3.0*/ + { + uint8_t VDOVersion : 3u; /*!< Version Number of the VDO */ + uint8_t Reserved : 1u; /*!< Reserved */ + } + pd_v30; +#endif /* USBPD_REV30_SUPPORT */ +} USBPD_CableVdo_Field2TypeDef; + +#define VDM_UNSTRUCTUREDVDM_TYPE 0x0u +#define VDM_STRUCTUREDVDM_TYPE 0x1u + +typedef uint32_t USBPD_VDM_VDMType_Typedef; + +/** @defgroup USBPD_SVDMHeaderStructure_definition USB SVDM Message header Structure definition + * @brief USB SVDM Message header Structure definition + * @{ + */ +typedef union +{ + uint32_t d32; + struct + { +USBPD_VDM_Command_Typedef Command : /*!< SVDM Header's Command */ + 5u; +uint32_t Reserved5 : /*!< Reserved */ + 1u; +USBPD_VDM_CommandType_Typedef CommandType : /*!< SVDM Header's Command Type */ + 2u; +uint32_t ObjectPosition : /*!< SVDM Header's Object Position */ + 3u; +uint32_t Reserved11 : /*!< Reserved */ + 2u; +uint32_t SVDMVersion : /*!< SVDM Header's SVDM Version */ + 2u; +USBPD_VDM_VDMType_Typedef VDMType : /*!< SVDM Header's VDM Type */ + 1u; +uint32_t SVID : /*!< SVDM Header's SVID */ + 16u; + } + b; +} USBPD_SVDMHeader_TypeDef; + +/** + * @} + */ + +#ifdef USBPDCORE_UVDM +/** @defgroup USBPD_UVDMHeaderStructure_definition USB UVDM Message header Structure definition + * @brief USB UVDM Message header Structure definition + * @{ + */ +typedef union +{ + uint32_t d32; + struct + { + uint32_t VendorUse : 15u; /*!< Content of this field is defined by the vendor. */ + USBPD_VDM_VDMType_Typedef VDMType : 1u; /*!< VDM Type */ + uint32_t VID : 16u; /*!< Vendor ID (VID) */ + } + b; +} USBPD_UVDMHeader_TypeDef; + +/** + * @} + */ +#endif /* USBPDCORE_UVDM */ + +/** @defgroup USBPD_CableVdo_TypeDef USB PD VDM Passive Cable VDO + * @brief USB PD Passive Cable VDO Structure definition + * @{ + */ +typedef union +{ + uint32_t d32; + struct + { + USBPD_UsbSsSupport USB_SS_Support : 3u; /*!< USB SuperSpeed Signaling Support */ + uint32_t reserved : 2u; + USBPD_VBUSCurrentHandCap VBUS_CurrentHandCap : 2u; /*!< VBUS Current Handling Capability */ + uint32_t Fields1 : 2u; /*!< Based on @ref USBPD_CableVdo_Field1TypeDef */ + USBPD_CableMaxVoltage CableMaxVoltage : 2u; /*!< Cable maximum voltage */ + USBPD_CableTermType CableTermType : 2u; /*!< Cable Termination Type */ + uint32_t CableLatency : 4u; /*!< Cable Latency */ + uint32_t Reserved : 1u; /*!< Reserved */ + USBPD_CableToType CableToType : 2u; /*!< USB Type-C plug to USB Type-A/B/C/Captive (PD 2.0) + USB Type-C plug to USB Type-C/Captive (PD 3.0) */ + uint32_t Fields2 : 1u; /*!< Based on @ref USBPD_CableVdo_Field2TypeDef */ + USBPD_VDM_VDO_PassiveCable_Version_TypeDef VDO_Version : 3u; /*!< Version number of the VDO */ + uint32_t CableFWVersion : 4u; /*!< Cable FW version number (vendor defined) */ + uint32_t CableHWVersion : 4u; /*!< Cable HW version number (vendor defined) */ + } + b; +} USBPD_CableVdo_TypeDef; + +#if defined(USBPD_REV30_SUPPORT) +/** @defgroup USBPD_ActiveCableVdo1_TypeDef USB PD VDM Active Cable VDO + * @brief USB PD Active Cable VDO Structure definition + * @{ + */ +typedef union +{ + uint32_t d32; + struct + { + USBPD_UsbSsSupport USB_HighestSpeed : 3u; /*!< USB Highest Speed Support */ + uint32_t SOPSecondControllerPresent : 1u; /*!< SOP'' controller present Support */ + uint32_t VBUS_ThroughCable : 1u; /*!< VBUS Through Cable Support */ + USBPD_VBUSCurrentHandCap VBUS_CurrentHandCap : 2u; /*!< VBUS Current Handling Capability */ + USBPD_ActiveCableSBUType SBUType : 1u; /*!< SBU Type */ + USBPD_ActiveCableSBUSupported SBUSupported : 1u; /*!< SBUs connections supported */ + USBPD_CableMaxVoltage CableMaxVoltage : 2u; /*!< Cable maximum voltage */ + USBPD_CableTermType CableTermType : 2u; /*!< Cable Termination Type (@ref CABLE_TERM_ONE_EACH_VCONN or @ref CABLE_TERM_BOTH_ACTIVE_VCONN */ + uint32_t CableLatency : 4u; /*!< Cable Latency */ + uint32_t : 1u; /*!< B17 Reserved bit */ + USBPD_CableToType ConnectorType : 2u; /*!< Connector Type (@ref CABLE_TO_TYPE_C or @ref CABLE_CAPTIVE) */ + uint32_t : 1u; /*!< B20 Reserved bit */ + USBPD_VDM_VDO_ActiveCable_Version_TypeDef VDO_Version : 3u; /*!< Version number of the Active Cable VDO */ + uint32_t CableFWVersion : 4u; /*!< Cable FW version number (vendor defined) */ + uint32_t CableHWVersion : 4u; /*!< Cable HW version number (vendor defined) */ + } + b; +} USBPD_ActiveCableVdo1_TypeDef; + +/** + * @} + */ +#endif /* USBPD_REV30_SUPPORT */ + +/** @defgroup USBPD_CertStatVdo_TypeDef USB PD VDM Cert stat VDO + * @brief USB PD Cert stat VDO Structure definition + * @{ + */ +typedef union +{ + uint32_t d32; + struct + { +uint32_t XID : /*!< USB-IF assigned XID */ + 32; + } + b; +} USBPD_CertStatVdo_TypeDef; + +/** + * @} + */ + +/** @defgroup USBPD_AMAVdo_TypeDef USB PD VDM Alternate Mode Adapter VDO (NO MORE USED IN PD3.0) + * @brief USB PD Alternate Mode Adapter VDO Structure definition + * @{ + */ +/* #### Keep for PD2.0 legacy reasons but should NOT more used. #### */ +typedef union +{ + uint32_t d32; + struct + { + uint32_t AMA_USB_SS_Support : 3u; /*!< AMA USB SuperSpeed Signaling Support based on + @ref USBPD_AmaUsbSsSupport */ + uint32_t VBUSRequirement : 1u; /*!< VBUS required based on + @ref USBPD_VBusRequirement */ + uint32_t VCONNRequirement : 1u; /*!< VCONN required based on + @ref USBPD_VConnRequirement */ + uint32_t VCONNPower : 3u; /*!< VCONN power based on + @ref USBPD_VConnPower */ +#if defined(USBPD_REV30_SUPPORT) + uint32_t Reserved : 13; /*!< Reserved */ + uint32_t VDO_Version : 3u; /*!< Version Number of the VDO */ +#else + uint32_t SSRX2_DirSupport : 1u; /*!< SSRX2 Directionality Support (PD2.0) based on + @ref USBPD_SsDirectionality */ + uint32_t SSRX1_DirSupport : 1u; /*!< SSRX1 Directionality Support (PD2.0) based on + @ref USBPD_SsDirectionality */ + uint32_t SSTX2_DirSupport : 1u; /*!< SSTX2 Directionality Support (PD2.0) based on + @ref USBPD_SsDirectionality */ + uint32_t SSTX1_DirSupport : 1u; /*!< SSTX1 Directionality Support (PD2.0) based on + @ref USBPD_SsDirectionality */ + uint32_t Reserved : 12u; /*!< Reserved */ +#endif /* USBPD_REV30_SUPPORT */ + uint32_t AMAFWVersion : 4u; /*!< AMA FW version number (vendor defined) */ + uint32_t AMAHWVersion : 4u; /*!< AMA HW version number (vendor defined) */ + } + b; +} USBPD_AMAVdo_TypeDef; +/* #### Keep for PD2.0 legacy reasons but should NOT more used. #### */ +/** + * @} + */ + +#if defined(USBPD_REV30_SUPPORT) +/** @defgroup USBPD_UFPVdo_TypeDef USB PD VDM UFP VDO + * @brief USB PD UFP VDO Structure definition + * @{ + */ +typedef union +{ + uint32_t d32; + struct + { + USBPD_UsbSsSupport USB_HighestSpeed : 3u; /*!< USB Highest Speed Support */ + USBPD_VDO_UFP_AlternateModes AlternateModes : 3u; /*!< Alternate Modes based */ + uint32_t : 16u; /*!< B21_6 Reserved bit */ + USBPD_ConnectorType_TypeDef ConnectorType : 2u; /*!< Connector Type */ + USBPD_VDO_UFP_DeviceCapability DeviceCapability : 4u; /*!< Device Capability */ + uint32_t : 1u; /*!< B28 Reserved bit */ + USBPD_VDM_VDO_UFP_Version_TypeDef UFPVDOVersion : 3u; /*!< Version Number of the VDO (should be set to Version1.1) */ + } + b; +} USBPD_UFPVdo_TypeDef; +/** + * @} + */ + +/** @defgroup USBPD_DFPVdo_TypeDef USB PD VDM DFP VDO + * @brief USB PD DFP VDO Structure definition + * @{ + */ +typedef union +{ + uint32_t d32; + struct + { + uint32_t PortNumber : 5u; /*!< Unique port number to identify a specific port on a multi-port device */ + uint32_t : 17u; /*!< B21-5 Reserved bits */ + USBPD_ConnectorType_TypeDef ConnectorType : 2u; /*!< Connector Type */ + USBPD_VDO_DFP_HostCapability HostCapability : 3u; /*!< Host Capability */ + uint32_t : 2u; /*!< B28-27 Reserved bits */ + USBPD_VDM_VDO_DFP_Version_TypeDef DFPVDOVersion : 3u; /*!< Version Number of the VDO (should be set to Version1.1) */ + } + b; +} USBPD_DFPVdo_TypeDef; +/** + * @} + */ + +#if defined(USBPDCORE_VPD) +/** @defgroup USBPD_VPDVdo_TypeDef USB PD VDM Vconn Powered USB Device VDO + * @brief USB PD Vconn Powered USB Device VDO Structure definition + * @{ + */ +typedef union +{ + uint32_t d32; + struct + { + USBPD_VDO_VPD_ChargeSupport ChargeThroughSupport : 1u; /*!< Charge Through Support */ + uint32_t GroundImpedance : 6u; /*!< Charge Through Support bit = 1b: Ground impedance through the VPD in 1 mOhm increments. + Values less than 10 mOhm are Reserved and Shall Not be used. + Charge Through Support bit = 0b: Reserved, Shall be set to zero */ + uint32_t VBUS_Impedance : 6u; /*!< Charge Through Support bit = 1b: Vbus impedance through the VPD in 2 mOhm increments. + Values less than 10 mOhm are Reserved and Shall Not be used. + Charge Through Support bit = 0b: Reserved, Shall be set to zero */ + uint32_t : 2u; /*!< B14-13 Reserved bit */ + USBPD_VDO_VPD_ChargeCurrent ChargeThroughCurrent : 1u; /*!< Charge Through Current Support */ + USBPD_CableMaxVoltage CableMaxVoltage : 2u; /*!< Cable maximum voltage */ + uint32_t : 4u; /*!< B20-17 Reserved bit */ + USBPD_VDM_VDO_VPD_Version_TypeDef VDO_Version : 3u; /*!< Version number of the VPD VDO */ + uint32_t FWVersion : 4u; /*!< Cable FW version number (vendor defined) */ + uint32_t HWVersion : 4u; /*!< Cable HW version number (vendor defined) */ + } + b; +} USBPD_VPDVdo_TypeDef; +/** + * @} + */ +#endif /* USBPDCORE_VPD */ +#endif /* USBPD_REV30_SUPPORT */ + +/** @defgroup USBPD_DiscoveryIdentity_TypeDef USB PD Discovery identity Structure definition + * @brief Data received from Discover Identity messages + * @{ + */ +typedef struct +{ + USBPD_IDHeaderVDO_TypeDef IDHeader; /*!< ID Header VDO */ + USBPD_CertStatVdo_TypeDef CertStatVDO; /*!< Cert Stat VDO */ + USBPD_ProductVdo_TypeDef ProductVDO; /*!< Product VDO */ +#if defined(USBPDCORE_VCONN_SUPPORT) + USBPD_CableVdo_TypeDef CableVDO; /*!< Passive Cable VDO */ +#endif /* USBPDCORE_VCONN_SUPPORT */ + USBPD_AMAVdo_TypeDef AMA_VDO; /*!< Alternate Mode Adapter VDO */ +#if defined(USBPD_REV30_SUPPORT) +#if defined(USBPDCORE_VCONN_SUPPORT) + USBPD_ActiveCableVdo1_TypeDef ActiveCableVDO1; /*!< Active Cable VDO 1 */ +#endif /* USBPDCORE_VCONN_SUPPORT */ + USBPD_UFPVdo_TypeDef UFP_VDO; /*!< UFP VDO */ + USBPD_DFPVdo_TypeDef DFP_VDO; /*!< DFP VDO */ +#if defined(USBPDCORE_VPD) + USBPD_VPDVdo_TypeDef VPD_VDO; /*!< VPD VDO */ +#endif /* USBPDCORE_VPD */ +#endif /* USBPD_REV30_SUPPORT */ +#if defined(USBPDCORE_VCONN_SUPPORT) + uint8_t CableVDO_Presence : 1U; /*!< Indicate Passive Cable VDO presence or not */ +#endif /* USBPDCORE_VCONN_SUPPORT */ + uint8_t AMA_VDO_Presence : 1U; /*!< Indicate Alternate Mode Adapter VDO presence or not */ +#if defined(USBPD_REV30_SUPPORT) +#if defined(USBPDCORE_VCONN_SUPPORT) + uint8_t ActiveCableVDO1_Presence: 1U; /*!< indicate active cable vdo 1 presence or not */ +#endif /* USBPDCORE_VCONN_SUPPORT */ + uint8_t UFP_VDO_Presence : 1U; /*!< Indicate UFP VDO presence or not */ + uint8_t DFP_VDO_Presence : 1U; /*!< Indicate DFP VDO presence or not */ +#if defined(USBPDCORE_VPD) + uint8_t VPD_VDO_Presence : 1U; /*!< Indicate VPD VDO presence or not */ +#if defined(USBPDCORE_VCONN_SUPPORT) + uint8_t Reserved : 2U; /*!< Reserved bits */ +#else + uint8_t Reserved : 3U; /*!< Reserved bits */ +#endif /* USBPDCORE_VCONN_SUPPORT */ +#else +#if defined(USBPDCORE_VCONN_SUPPORT) + uint8_t Reserved : 3U; /*!< Reserved bits */ +#else + uint8_t Reserved : 4U; /*!< Reserved bits */ +#endif /* USBPDCORE_VCONN_SUPPORT */ +#endif /* USBPDCORE_VPD */ +#else +#if defined(USBPDCORE_VCONN_SUPPORT) + uint8_t Reserved : 6U; /*!< Reserved bits */ +#else + uint8_t Reserved : 7U; /*!< Reserved bits */ +#endif /* USBPDCORE_VCONN_SUPPORT */ +#endif /* USBPD_REV30_SUPPORT */ +} USBPD_DiscoveryIdentity_TypeDef; +/** + * @} + */ + +/** @defgroup USBPD_ModeInfo_TypeDef USB PD Mode Info object Structure definition + * @brief USB PD Mode Info object Structure definition + * @{ + */ +typedef struct +{ + uint32_t NumModes; + uint32_t Modes[MAX_MODES_PER_SVID]; + uint16_t SVID; +} USBPD_ModeInfo_TypeDef; + +/** + * @} + */ + +/** @defgroup USBPD_SVID_TypeDef USB PD Discovery SVID Structure definition + * @brief Data received from Discover Identity messages + * @{ + */ +/* + * Structure to SVID supported by the devices + */ +typedef struct +{ + uint16_t SVIDs[12u]; + uint8_t NumSVIDs; + uint8_t AllSVID_Received; /*!< Flag to indicate that all the SVIDs have been received. + No need to send new SVDM Discovery SVID message */ +} USBPD_SVIDInfo_TypeDef; +/** + * @} + */ + +#if defined(USBPD_REV30_SUPPORT) +/** + * @brief USBPD Alert Data Object Structure definition + * + */ +typedef union +{ + uint32_t d32; + struct + { + uint32_t Reserved : 16u; /*!< Reserved */ + uint32_t HotSwappableBatteries: 4u; /*!< Hot Swappable Batteries is a combination of @ref USBPD_ADO_HOT_SWAP_BATT */ + uint32_t FixedBatteries : 4u; /*!< Fixed Batteries is a combination of @ref USBPD_ADO_FIXED_BATT */ + uint32_t TypeAlert : 8u; /*!< Type of Alert is a combination of @ref USBPD_ADO_TYPE_ALERT */ + } + b; +} USBPD_ADO_TypeDef; + +/** + * @brief USBPD revision Data Object Structure definition + * + */ +typedef union +{ + uint32_t d32; + struct + { + uint32_t :16u; /*!< Reserved */ + uint32_t Version_minor : 4u; /*!< Version minor */ + uint32_t Version_major : 4u; /*!< Version major */ + uint32_t Revision_minor : 4u; /*!< Revision minor */ + uint32_t Revision_major : 4u; /*!< Revision major */ + } + b; +} USBPD_RevisionDO_TypeDef; + + + +/** + * @brief USBPD Battery Status Data Object Structure definition + * + */ +typedef union +{ + uint32_t d32; + struct + { + uint32_t Reserved: 8u; + uint32_t BatteryInfo: 8u; /*!< Based on @ref USBPD_BSDO_BATT_INFO */ + uint32_t BatteryPC: 16u; + } + b; +} USBPD_BSDO_TypeDef; + +/** + * @brief USBPD Source Capabilities Extended Message Structure definition + * + */ +typedef __PACKED_STRUCT +{ + uint16_t VID; /*!< Vendor ID (assigned by the USB-IF) */ + uint16_t PID; /*!< Product ID (assigned by the manufacturer) */ + uint32_t XID; /*!< Value provided by the USB-IF assigned to the product */ + uint8_t FW_revision; /*!< Firmware version number */ + uint8_t HW_revision; /*!< Hardware version number */ + uint8_t Voltage_regulation; /*!< Voltage Regulation */ + uint8_t Holdup_time; /*!< Holdup Time */ + uint8_t Compliance; /*!< Compliance */ + uint8_t TouchCurrent; /*!< Touch Current */ + uint16_t PeakCurrent1; /*!< Peak Current1 */ + uint16_t PeakCurrent2; /*!< Peak Current2 */ + uint16_t PeakCurrent3; /*!< Peak Current3 */ + uint8_t Touchtemp; /*!< Touch Temp */ + uint8_t Source_inputs; /*!< Source Inputs */ + uint8_t NbBatteries; /*!< Number of Batteries/Battery Slots */ + uint8_t SourcePDP; /*!< SPR Source PDP rating */ + uint8_t EPRSourcePDP; /*!< EPR Source PDP rating */ +} USBPD_SCEDB_TypeDef; + +#if defined(USBPDCORE_SNK_CAPA_EXT) +/** + * @brief SKEDB - Sink Load Characteristics structure definition + * + */ +typedef union +{ + uint16_t Value; + struct + { + uint16_t PercentOverload : 5u; /*!< Percent overload in 10% increments Values higher than 25 (11001b) are clipped to 250%. + 00000b is the default. */ + uint16_t OverloadPeriod : 6u; /*!< Overload period in 20ms when bits 0-4 non-zero. */ + uint16_t DutyCycle : 4u; /*!< Duty cycle in 5% increments when bits 0-4 are non-zero. */ + uint16_t VBusVoltageDrop : 1u; /*!< Can tolerate VBUS Voltage drop. */ + } b; +} USBPD_SKEDB_SinkLoadCharac_TypeDef; +/** + * @brief USBPD Sink Capabilities Extended Message Structure definition + * + */ +typedef struct USBPD_SKEDB_TypeDef +{ + uint16_t VID; /*!< Vendor ID (assigned by the USB-IF) */ + uint16_t PID; /*!< Product ID (assigned by the manufacturer) */ + uint32_t XID; /*!< Value provided by the USB-IF assigned to the product */ + uint8_t FW_revision; /*!< Firmware version number */ + uint8_t HW_revision; /*!< Hardware version number */ + uint8_t SKEDB_Version; /*!< SKEDB Version (not the specification Version) based on + @ref USBPD_SKEDB_VERSION */ + uint8_t LoadStep; /*!< Load Step based on @ref USBPD_SKEDB_LOADSTEP */ + USBPD_SKEDB_SinkLoadCharac_TypeDef SinkLoadCharac; /*!< Sink Load Characteristics */ + uint8_t Compliance; /*!< Compliance based on combination of @ref USBPD_SKEDB_COMPLIANCE */ + uint8_t Touchtemp; /*!< Touch Temp based on @ref USBPD_SKEDB_TOUCHTEMP */ + uint8_t BatteryInfo; /*!< Battery info */ + uint8_t SinkModes; /*!< Sink Modes based on combination of @ref USBPD_SKEDB_SINKMODES */ + uint8_t SinkMinimumPDP; /*!< The Minimum PDP required by the Sink to operate without + consuming any power from its Battery(s) should it have one */ + uint8_t SinkOperationalPDP; /*!< The PDP the Sink requires to operate normally. For Sinks with + a Battery, it is the PDP Rating of the charger supplied with + it or recommended for it. */ + uint8_t SinkMaximumPDP; /*!< The Maximum PDP the Sink can consume to operate and + charge its Battery(s) should it have one. */ +} USBPD_SKEDB_TypeDef; +#endif /* USBPDCORE_SNK_CAPA_EXT */ + +/** + * @brief USBPD Source Status Extended Message Structure definition + * + */ +typedef __PACKED_STRUCT +{ + uint8_t InternalTemp; /*!< Source or Sink internal temperature in degrees centigrade */ + uint8_t PresentInput; /*!< Present Input based on @ref USBPD_SDB_PRESENT_INPUT */ + uint8_t PresentBatteryInput; /*!< Present Battery Input */ + uint8_t EventFlags; /*!< Event Flags based on @ref USBPD_SDB_EVENT_FLAGS */ + uint8_t TemperatureStatus; /*!< Temperature based on @ref USBPD_SDB_TEMP_STATUS */ + uint8_t PowerStatus; /*!< Power Status based on combination of @ref USBPD_SDB_POWER_STATUS */ + uint8_t PowerStateChange; /*!< The Power state change status byte indicates a power state change + based on @ref USBPD_SDB_PWR_STATE */ +} USBPD_SDB_TypeDef; + +/** + * @brief USBPD Get Battery Capabilities Data Block Extended Message Structure definition + * + */ +typedef __PACKED_STRUCT +{ + uint8_t BatteryCapRef; /*!< Number of the Battery indexed from zero */ +} USBPD_GBCDB_TypeDef; + +/** + * @brief USBPD Get Battery Status Data Block Extended Message Structure definition + * + */ +typedef __PACKED_STRUCT +{ + uint8_t BatteryStatusRef; /*!< Number of the Battery indexed from zero */ +} USBPD_GBSDB_TypeDef; + +/** + * @brief USBPD Battery Capability Data Block Extended Message Structure definition + * + */ +typedef __PACKED_STRUCT +{ + uint16_t VID; /*!< Vendor ID (assigned by the USB-IF) */ + uint16_t PID; /*!< Product ID (assigned by the manufacturer) */ + uint16_t BatteryDesignCapa; /*!< Battery Design Capacity */ + uint16_t BatteryLastFullChargeCapa; /*!< Battery last full charge capacity */ + uint8_t BatteryType; /*!< Battery Type */ +} USBPD_BCDB_TypeDef; + +/** + * @brief USBPD Get Manufacturer Info Info Data Block Extended Message Structure definition + * + */ +typedef __PACKED_STRUCT +{ + uint8_t ManufacturerInfoTarget; /*!< Manufacturer Info Target based on @ref USBPD_MANUFINFO_TARGET */ + uint8_t ManufacturerInfoRef; /*!< Manufacturer Info Ref between Min_Data=0 and Max_Data=7 (@ref USBPD_MANUFINFO_REF) */ +} USBPD_GMIDB_TypeDef; + +/** + * @brief USBPD Manufacturer Info Data Block Extended Message Structure definition + * + */ +typedef struct +{ + uint16_t VID; /*!< Vendor ID (assigned by the USB-IF) */ + uint16_t PID; /*!< Product ID (assigned by the manufacturer) */ + uint8_t ManuString[22]; /*!< Vendor defined byte array */ +} USBPD_MIDB_TypeDef; + +#if defined(USBPDCORE_FWUPD) +/** + * @brief USBPD Firmware Update GET_FW_ID Response Payload Structure definition + * + */ +typedef __PACKED_STRUCT +{ + USBPD_FWUPD_Status_TypeDef Status; /*!< Status Information during Firmware Update */ + uint16_t VID; /*!< USB-IF assigned Vendor ID */ + uint16_t PID; /*!< USB-IF assigned Product ID */ + uint8_t HWVersion; /*!< Hardware Version */ + uint8_t SiVersion; /*!< Silicon Version */ + uint16_t FWVersion1; /*!< Most significant component of the firmware version */ + uint16_t FWVersion2; /*!< Second-most significant component of the firmware version */ + uint16_t FWVersion3; /*!< Third-most significant component of the firmware version */ + uint16_t FWVersion4; /*!< Least significant component of the firmware version */ + uint8_t ImageBank; /*!< Image bank for which firmware is requested */ + uint8_t Flags1; /*!< Flags1 */ + uint8_t Flags2; /*!< Flags2 */ + uint8_t Flags3; /*!< Flags3 */ + uint8_t Flags4; /*!< Flags4 */ +} USBPD_FWUPD_GetFwIDRspPayload_TypeDef; + +/** + * @brief USBPD Firmware Update PDFU_INITIATE Request Payload Structure definition + * + */ +typedef __PACKED_STRUCT +{ + uint16_t FWVersion1; /*!< Most significant component of the firmware version */ + uint16_t FWVersion2; /*!< Second-most significant component of the firmware version */ + uint16_t FWVersion3; /*!< Third-most significant component of the firmware version */ + uint16_t FWVersion4; /*!< Least significant component of the firmware version */ +} USBPD_FWUPD_PdfuInitReqPayload_TypeDef; + +/** + * @brief USBPD Firmware Update PDFU_INITIATE Response Payload Structure definition + * + */ +typedef __PACKED_STRUCT +{ + USBPD_FWUPD_Status_TypeDef Status; /*!< Status Information during Firmware Update */ + uint8_t WaitTime; /*!< Wait time */ + uint8_t MaxImageSize[3u]; /*!< Max image size */ +} USBPD_FWUPD_PdfuInitRspPayload_TypeDef; + +/** + * @brief USBPD Firmware Update PDFU_DATA Response Payload Structure definition + * + */ +typedef __PACKED_STRUCT +{ + USBPD_FWUPD_Status_TypeDef Status; /*!< Status Information during Firmware Update */ + uint8_t WaitTime; /*!< Wait time */ + uint8_t NumDataNR; /*!< Number of PDFU_DATA_NR Requests */ + uint16_t DataBlockNum; /*!< Data Block Number of the next PDFU_DATA or PDFU_DATA_NR */ +} USBPD_FWUPD_PdfuDataRspPayload_TypeDef; + +/** + * @brief USBPD Firmware Update PDFU_VALIDATE Response Payload Structure definition + * + */ +typedef __PACKED_STRUCT +{ + USBPD_FWUPD_Status_TypeDef Status; /*!< Status Information during Firmware Update */ + uint8_t WaitTime; /*!< Wait time */ + uint8_t Flags; /*!< Flags */ +} USBPD_FWUPD_PdfuValidateRspPayload_TypeDef; + +/** + * @brief USBPD Firmware Update PDFU_DATA_PAUSE Response Payload Structure definition + * + */ +typedef __PACKED_STRUCT +{ + USBPD_FWUPD_Status_TypeDef Status; /*!< Status Information during Firmware Update */ +} USBPD_FWUPD_PdfuDataPauseRspPayload_TypeDef; + +/** + * @brief USBPD Firmware Update VENDOR_SPECIFIC Request Payload Structure definition + * + */ +typedef __PACKED_STRUCT +{ + uint16_t VID; /*!< USB-IF assigned Vendor ID */ + uint8_t VendorDefined[256]; /*!< Vendor defined */ +} USBPD_FWUPD_VendorSpecificReqPayload_TypeDef; + +/** + * @brief USBPD Firmware Update VENDOR_SPECIFIC Response Payload Structure definition + * + */ +typedef __PACKED_STRUCT +{ + USBPD_FWUPD_Status_TypeDef Status; /*!< Status Information during Firmware Update */ + uint16_t VID; /*!< USB-IF assigned Vendor ID */ + uint8_t VendorDefined[255]; /*!< Vendor defined */ +} USBPD_FWUPD_VendorSpecificRspPayload_TypeDef; + +/** + * @brief USBPD Firmware Update Request Data Block Extended Message Structure definition + * + */ +typedef __PACKED_STRUCT +{ + uint8_t ProtocolVersion; /*!< Protocol Version (@ref USBPD_FWUPD_PROT_VER) */ + uint8_t MessageType; /*!< Firmware Update Message type (@ref USBPD_FWUPD_MSGTYPE) */ + uint8_t Payload[258]; /*!< Payload */ +} USBPD_FRQDB_TypeDef; + +#endif /* USBPDCORE_FWUPD */ + +#ifdef USBPDCORE_PPS +/** + * @brief USBPD PPS Status Data Block Extended Message Structure definition + * + */ +typedef union +{ + uint32_t d32; + struct + { + uint16_t OutputVoltageIn20mVunits; /*!< Source output voltage in 20mV units. + When set to 0xFFFF, the Source does not support this field. */ + uint8_t OutputCurrentIn50mAunits; /*!< Source output current in 50mA units. + When set to 0xFF, the Source does not support this field. */ + uint8_t RealTimeFlags; /*!< Real Time Flags, combination of @ref USBPD_CORE_DEF_REAL_TIME_FLAGS */ + } fields; +} USBPD_PPSSDB_TypeDef; +#endif /* USBPDCORE_PPS */ + +/** + * @brief USBPD Country Code Data Block Extended Message Structure definition + * + */ +typedef struct +{ + uint32_t Length; /*!< Number of country codes in the message */ + uint16_t *PtrCountryCode; /*!< Pointer of the country codes (1 to n) */ +} USBPD_CCDB_TypeDef; + +/** + * @brief USBPD Country Info Data Block Extended Message Structure definition + * + */ +typedef struct +{ + uint16_t CountryCode; /*!< 1st and 2nd character of the Alpha-2 Country Code defined by [ISO 3166] */ + uint32_t Reserved; /*!< Reserved - Shall be set to 0. */ + uint8_t PtrCountrySpecificData; /*!< Pointer on Content defined by the country authority (0 t 256 bytes). */ +} USBPD_CIDB_TypeDef; + +#endif /* USBPD_REV30_SUPPORT */ + +/** + * @} + */ + +/** @defgroup USBPD_CORE_SETTINGS_Exported_Structures USBPD CORE Settings Exported Structures + * @brief USBPD Settings Structure definition + * @{ + */ +#if defined(USBPD_REV30_SUPPORT) +typedef union +{ + uint16_t PD3_Support; + struct + { + uint16_t PE_UnchunkSupport : 1u; /*!< Unchunked support */ + uint16_t PE_FastRoleSwapSupport : 1u; /*!< Fast role swap support (not yet implemented) */ + uint16_t Is_GetPPSStatus_Supported : 1u; /*!< Get PPS status message supported by PE */ + uint16_t Is_SrcCapaExt_Supported : 1u; /*!< Source_Capabilities_Extended message supported by PE */ + uint16_t Is_Alert_Supported : 1u; /*!< Alert message supported by PE */ + uint16_t Is_GetStatus_Supported : 1u; /*!< Get_Status message supported by PE (Is_Alert_Supported should be enabled) */ + uint16_t Is_GetManufacturerInfo_Supported : 1u; /*!< Manufacturer_Info message supported by PE */ + uint16_t Is_GetCountryCodes_Supported : 1u; /*!< Get_Country_Codes message supported by PE */ + uint16_t Is_GetCountryInfo_Supported : 1u; /*!< Get_Country_Info message supported by PE */ + uint16_t Is_SecurityRequest_Supported : 1u; /*!< Security_Response message supported by PE */ + uint16_t Is_FirmUpdateRequest_Supported : 1u; /*!< Firmware update response message supported by PE */ + uint16_t Reserved2 : 1u; /*!< Reserved bits: old Is_SnkCapaExt_Supported (SNK_CAPA_EXT msg mandatory) */ + uint16_t Is_GetBattery_Supported : 1u; /*!< Get Battery Capabitity and Status messages supported by PE */ + uint16_t reserved : 3u; /*!< Reserved bits */ + } d; +} USBPD_PD3SupportTypeDef; +#endif /* USBPD_REV30_SUPPORT */ + +typedef struct +{ +#if defined(USBPDCORE_LIB_NO_PD) + USBPD_PortPowerRole_TypeDef PE_DefaultRole: 1u; /*!< Default port role based on @ref USBPD_PortPowerRole_TypeDef */ + CAD_RP_Source_Current_Adv_Typedef CAD_DefaultResistor : 2u; /*!< Default RP resistor based on @ref CAD_RP_Source_Current_Adv_Typedef */ + uint8_t : 5u; /*!< Reserved bits */ +#else + USBPD_SupportedSOP_TypeDef PE_SupportedSOP; /*!< Corresponds to the message managed by the stack and this should be set depending if you want discuss with the cable + So if VconnSupport is enabling this field must be set to + @ref USBPD_SUPPORTED_SOP_SOP | + @ref USBPD_SUPPORTED_SOP_SOP1 | + @ref USBPD_SUPPORTED_SOP_SOP2 + else + @ref USBPD_SUPPORTED_SOP_SOP + */ + USBPD_SpecRev_TypeDef PE_SpecRevision : 2u; /*!< Spec revision value based on @ref USBPD_SpecRev_TypeDef */ + USBPD_PortPowerRole_TypeDef PE_DefaultRole: 1u; /*!< Default port role based on @ref USBPD_PortPowerRole_TypeDef */ + uint32_t PE_RoleSwap : 1u; /*!< If enabled, allows the port to have DRP behavior */ +#if defined(USBPDCORE_VPD) + uint32_t VPDSupport : 1u; /*!< support of the CTVPD device */ +#else + uint32_t _empty1 : 1u; /*!< Reserved bit */ +#endif /* USBPDCORE_VPD */ + uint32_t PE_VDMSupport : 1u; /*!< Support VDM: If not enabled any VDM message received is replied "not supported" */ + uint32_t PE_PingSupport : 1u; /*!< support Ping (only for PD3.0): If enabled allows DPM to send ping message */ + uint32_t PE_CapscounterSupport : 1u; /*!< If enabled after an amount of message source capabilities not replied, the stack stop the message send.*/ + uint32_t PE_RespondsToDiscovSOP : 1u; /*!< Can respond successfully to a Discover Identity */ + uint32_t PE_AttemptsDiscovSOP : 1u; /*!< Can send a Discover Identity */ + uint32_t CAD_TryFeature : 2u; /*!< Not yet implemented */ + uint32_t CAD_AccesorySupport : 1u; /*!< Not yet implemented */ + uint32_t CAD_RoleToggle : 1u; /*!< If enabled allows the detection state machine switch Rp/Rd means toggle the presented role between source and sink */ + CAD_RP_Source_Current_Adv_Typedef CAD_DefaultResistor : 2u; /*!< Default RP resistor based on @ref CAD_RP_Source_Current_Adv_Typedef */ + uint32_t CAD_SNKToggleTime : 8u; /*!< Sink toggle time in ms */ + uint32_t CAD_SRCToggleTime : 8u; /*!< Source toggle time in ms */ +#if defined(USBPD_REV30_SUPPORT) + USBPD_PD3SupportTypeDef PE_PD3_Support; /*!< PD3 structure support flags based on @ref USBPD_PD3SupportTypeDef */ +#else + uint16_t reserved : 16u; /*!< Reserved bits */ +#endif /* USBPD_REV30_SUPPORT */ +#endif /*USBPDCORE_LIB_NO_PD*/ +} USBPD_SettingsTypeDef; + +/** + * @} + */ + +/** @defgroup USBPD_CORE_PARAMS_Exported_Structures USBPD CORE Params Exported Structures + * @brief USBPD Params Structure definition + * @{ + */ +typedef struct +{ + USBPD_SpecRev_TypeDef PE_SpecRevision : 2u; /*!< PE Specification revision */ + USBPD_PortPowerRole_TypeDef PE_PowerRole : 1u; /*!< PE Power role */ + USBPD_PortDataRole_TypeDef PE_DataRole : 1u; /*!< PE Data role */ + uint32_t PE_SwapOngoing : 1u; /*!< Power role swap ongoing flag */ + USBPD_VDMVersion_TypeDef VDM_Version : 1u; /*!< VDM version */ + CCxPin_TypeDef ActiveCCIs : 2u; /*!< Active CC line based on @ref CCxPin_TypeDef */ + USBPD_POWER_StateTypedef PE_Power : 3u; /*!< Power status based on @ref USBPD_POWER_StateTypedef */ + uint32_t DPM_Initialized : 1u; /*!< DPM initialized flag */ + uint32_t PE_IsConnected : 1u; /*!< USB-PD PE stack is connected to CC line */ + CCxPin_TypeDef VconnCCIs : 2u; /*!< VConn CC line based on @ref CCxPin_TypeDef */ + uint32_t VconnStatus : 1u; /*!< VConnStatus USBP_TRUE = vconn on USBPD_FALSE = vconn off */ + CAD_RP_Source_Current_Adv_Typedef RpResistor : 2u; /*!< RpResistor presented */ + CAD_SNK_Source_Current_Adv_Typedef SNKExposedRP_AtAttach : 2u; /*!< Exposed resistance from source at attach */ + +#if defined(USBPDCORE_VPD) + uint32_t VPDflag : 1u; /*!< VPD detection flag */ + uint32_t CAD_VPDStatus : 2u; /*!< CAD VPD status used between CAD and PE */ + uint32_t PE_VPDStatus : 2u; /*!< CAD VPD status used between CAD and PE */ +#else + uint32_t Reserved1 : 5u; /*!< Reserved bits */ +#endif /* USBPDCORE_VPD */ + + +#if defined(USBPD_REV30_SUPPORT) && defined(USBPDCORE_UNCHUNCKED_MODE) + uint32_t PE_UnchunkSupport: 1u; /*!< Unchunked support */ +#else + uint32_t Reserved2 : 1u; /*!< Reserved bits */ +#endif /* defined(USBPD_REV30_SUPPORT) && defined(USBPDCORE_UNCHUNCKED_MODE) */ + +#if defined(USBPDCORE_VCONN_SUPPORT) + USBPD_SpecRev_TypeDef CBL_SpecRevision: 2u; /*!< Cable Specification revision */ +#else + uint32_t Reserved3 : 2u; /*!< Reserved bits */ +#endif /* USBPDCORE_VCONN_SUPPORT */ + +#if defined(USBPDCORE_PECABLE) + uint32_t IsCableConnected: 1u; /*!< Is Cable connected */ + uint32_t Reserved4 : 3u; /*!< Reserved bits */ +#else + uint32_t Reserved4 : 4u; /*!< Reserved bits */ +#endif /* USBPDCORE_PECABLE */ +} USBPD_ParamsTypeDef; + +#if defined(USBPDCORE_USBDATA) +/** + * @brief Enter USB Data object + * + */ +typedef union +{ + uint32_t d32; + struct + { + uint32_t Reserved1 :13u; /*!< Reserved - Shall be set to zero */ + uint32_t HostPresent : 1u; /*!< Connected to a Host. */ + uint32_t TBTSupport : 1u; /*!< [TBT3] is supported by the host's USB4 Connection Manager */ + uint32_t DPSupport : 1u; /*!< [USB4] DP tunneling supported by the host */ + uint32_t PCISupport : 1u; /*!< [USB4] PCIe tunneling supported by the hosts */ + uint32_t CableCurrent : 2u; /*!< 00b = VBUS is not supported 01b = Reserved 10b = 3A 11b = 5A */ + uint32_t CableType : 2u; /*!< 00b: Passive, + 01b: Active Re-timer + 10b: Active Re-driver + 11b: Optically Isolatedt */ + uint32_t CableSpeed : 3u; /*!< 000b: [USB 2.0] only, no SuperSpeed support, + 001b: [USB 3.2] Gen1, + 010b: [USB 3.2] Gen2 and [USB4] Gen2 + 011b: [USB4] Gen3 */ + uint32_t Reserved2 : 1u; /*!< Reserved - Shall be set to zero */ + uint32_t USB3DRD : 1u; /*!< 0b: Not capable of operating as a [USB 3.2] Device + 1b: Capable of operating as a [USB 3.2] Device */ + uint32_t USB4DRD : 1u; /*!< 0b: Not capable of operating as a [USB 4] Device + 1b: Capable of operating as a [USB 4] Device */ + uint32_t Reserved3 : 1u; + uint32_t USBMode : 3u; /*!< 000b: [USB 2.0], 001b: [USB 3.2] 010b: [USB4] */ + uint32_t Reserved4 : 1u; + } b; +} USBPD_EnterUSBData_TypeDef; +#endif /* USBPDCORE_USBDATA */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/* Exported variables --------------------------------------------------------*/ +/* Exported functions --------------------------------------------------------*/ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* USBPD_DEF_H_ */ + Index: /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Core/inc/usbpd_tcpm.h =================================================================== --- /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Core/inc/usbpd_tcpm.h (revision 60) +++ /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Core/inc/usbpd_tcpm.h (revision 60) @@ -0,0 +1,318 @@ +/** + ****************************************************************************** + * @file usbpd_tcpm.h + * @author MCD Application Team + * @brief Header file containing functions prototypes of USBPD TCPM library. + ****************************************************************************** + * @attention + * + * Copyright (c) 2021 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __USBPD_TCPM_H +#define __USBPD_TCPM_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#if defined(USBPDCORE_TCPM_SUPPORT) + +#include "string.h" +#include "usbpd_def.h" +#include "tcpc.h" + +/** @addtogroup STM32_USBPD_LIBRARY + * @{ + */ + +/** @addtogroup USBPD_CORE + * @{ + */ + +/** @addtogroup USBPD_CORE_TCPM + * @{ + */ + +/* Exported constants --------------------------------------------------------*/ +/* Exported types ------------------------------------------------------------*/ +/** @defgroup USBPD_CORE_TCPM_Exported_TypesDefinitions USBPD CORE TCPM Exported Types Definitions + * @{ + */ +/** + * @brief CallBacks exposed by the @ref USBPD_CORE_TCPM to the @ref USBPD_CORE_PRL + */ +typedef struct +{ + /** + * @brief Reports that a message has been received on a specified port. + * @param hport: The handle of the port + * @param Type: The type of the message received + * @retval None + * @note Received data are stored inside hport->pRxBuffPtr + */ + void (*USBPD_TCPM_MessageReceived)(uint8_t hport, USBPD_SOPType_TypeDef Type); + + /** + * @brief Reports to the PRL that a Reset received from channel. + * @param hport: The handle of the port + * @param Type: The type of reset performed + * @retval None + */ + void (*USBPD_TCPM_ResetIndication)(uint8_t hport, USBPD_SOPType_TypeDef Type); + + /** + * @brief Reports to the PRL that a Reset operation has been completed. + * @param hport: The handle of the port + * @param Type: The type of reset performed + * @retval None + */ + void (*USBPD_TCPM_ResetCompleted)(uint8_t hport, USBPD_SOPType_TypeDef Type); + + /** + * @brief Reports to the PRL that a Bist operation has been completed. + * @param hport: The handle of the port + * @param Type: The type of Bist performed + * @retval None + */ + void (*USBPD_TCPM_BistCompleted)(uint8_t hport, USBPD_BISTMsg_TypeDef bistmode); + + /** + * @brief USB-PD message sent callback from TCPC + * @param PortNum port number value + * @param Status Status of the transmission + * @retval None + */ + void (*USBPD_TCPM_MessageReceivedTC)(uint8_t PortNum, uint32_t status); + + /** + * @brief Reports to the PRL that an FRS has been detected. + * @param PortNum: The handle of the port + * @retval None + */ + void (*USBPD_PHY_FastRoleSwapReception)(uint8_t PortNum); + +} USBPD_PHY_Callbacks; + +/** + * @brief Initialization structure exposed by the @ref USBPD_CORE_TCPM to the @ref USBPD_CORE_PRL + */ +typedef struct +{ + uint8_t *pRxBuffer; /*!< Pointer to @ref USBPD_CORE_PRL RX Buffer for the current port */ + const USBPD_PHY_Callbacks *pCallbacks; /*!< TCPM Callbacks */ +} USBPD_TCPM_HandleTypeDef; +/** + * @} + */ + +/* Exported macro ------------------------------------------------------------*/ +/* Private macro -------------------------------------------------------------*/ +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup USBPD_CORE_TCPM_Exported_Functions + * @{ + */ + +/** @defgroup USBPD_CORE_TCPM_Exported_Functions_Grp2 USBPD CORE TCPM Exported Functions to PRL + * @{ + */ +/** + * @brief Initialize TCPC devices + * @param PortNum Number of the port + * @param pCallbacks TCPM callbacks + * @param pRxBuffer Pointer on the RX buffer + * @param PowerRole Power role can be one of the following values: + * @arg @ref USBPD_PORTPOWERROLE_SNK + * @arg @ref USBPD_PORTPOWERROLE_SRC + * @param SupportedSOP Supported SOP + * @retval HAL status + */ +USBPD_StatusTypeDef USBPD_PHY_Init(uint8_t PortNum, const USBPD_PHY_Callbacks *pCallbacks, uint8_t *pRxBuffer, + USBPD_PortPowerRole_TypeDef PowerRole, uint32_t SupportedSOP); + +/** + * @brief Reset the PHY of a specified port. + * @param PortNum Number of the port. + * @retval None + */ +void USBPD_PHY_Reset(uint8_t PortNum); + +/** + * @brief function to set the supported SOP + * @param PortNum Number of the port. + * @param SOPSupported List of the supported SOP + * @retval None. + */ +void USBPD_PHY_SOPSupported(uint8_t PortNum, uint32_t SOPSupported); + +/** + * @brief De-initialize TCPC devices + * @param PortNum Number of the port + * @retval None + */ +void USBPD_TCPM_DeInit(uint8_t PortNum); + +/** + * @brief Get CC line for PD connection + * @param PortNum Number of the port + * @param CC1_Level Pointer of status of the CC1 line + * @param CC2_Level Pointer of status of the CC2 line + * @retval USBPD status + */ +USBPD_StatusTypeDef USBPD_TCPM_get_cc(uint32_t PortNum, uint32_t *CC1_Level, uint32_t *CC2_Level); + +/** + * @brief Set the polarity of the CC lines + * @param PortNum Number of the port + * @param Polarity Polarity + * @retval USBPD status + */ +USBPD_StatusTypeDef USBPD_TCPM_set_polarity(uint32_t PortNum, uint32_t Polarity); + +/** + * @brief Set power and data role et PD message header + * @param PortNum Number of the port + * @param PowerRole Power role + * @param DataRole Data role + * @param Specification PD Specification version + * @retval USBPD status + */ +USBPD_StatusTypeDef USBPD_TCPM_set_msg_header(uint32_t PortNum, USBPD_PortPowerRole_TypeDef PowerRole, + USBPD_PortDataRole_TypeDef DataRole, + USBPD_SpecRev_TypeDef Specification); + +/** + * @brief Enable or disable PD reception + * @param PortNum Number of the port + * @param Pull Value of the CC pin to configure based on @ref TCPC_CC_Pull_TypeDef + * @param State Activation or deactivation of RX + * @param SupportedSOP Supported SOP by PRL + * @param HardReset Hard reset status based on @ref TCPC_hard_reset + * @retval USBPD status + */ +USBPD_StatusTypeDef USBPD_TCPM_set_rx_state(uint32_t PortNum, TCPC_CC_Pull_TypeDef Pull, USBPD_FunctionalState State, + uint32_t SupportedSOP, TCPC_hard_reset HardReset); + +/** + * @brief Retrieve the PD message + * @param PortNum Number of the port + * @param Payload Pointer on the payload + * @param Type Pointer on the message type + * @retval USBPD status + */ +USBPD_StatusTypeDef USBPD_TCPM_get_message(uint32_t PortNum, uint8_t *Payload, uint8_t *Type); + +/** + * @brief Transmit the PD message + * @param PortNum Number of the port + * @param Type Message type + * @param pData Pointer on the data message + * @param RetryNumber Number of retry + * @retval USBPD status + */ +USBPD_StatusTypeDef USBPD_TCPM_transmit(uint32_t PortNum, USBPD_SOPType_TypeDef Type, const uint8_t *pData, + uint32_t RetryNumber); + +/** + * @brief Send bist pattern. + * @param PortNum Number of the port + * @retval USBPD status + */ +USBPD_StatusTypeDef USBPD_PHY_Send_BIST_Pattern(uint32_t PortNum); + +/** + * @brief Request a Reset on a specified port. + * @param PortNum Number of the port + * @param Type The type of reset (hard or cable reset). + * @retval USBPD status + */ +USBPD_StatusTypeDef USBPD_PHY_ResetRequest(uint8_t PortNum, USBPD_SOPType_TypeDef Type); + +/** + * @brief Request TCPC to enter a specific BIST test mode. + * @param PortNum Number of the port + * @param State Enable BIST carrier mode 2 + * @retval USBPD status + */ +USBPD_StatusTypeDef USBPD_TCPM_Send_BIST_Pattern(uint8_t PortNum, USBPD_FunctionalState State); + +/** + * @brief function to set the SinkTxNg + * @param PortNum Number of the port. + * @retval none. + */ +void USBPD_PHY_SetResistor_SinkTxNG(uint8_t PortNum); + +/** + * @brief function to set the SinkTxOK + * @param PortNum Number of the port. + * @retval none. + */ +void USBPD_PHY_SetResistor_SinkTxOK(uint8_t PortNum); + +/** + * @brief function to check if SinkTxOK + * @param PortNum Number of the port. + * @retval USBPD_TRUE or USBPD_FALSE + */ +uint8_t USBPD_PHY_IsResistor_SinkTxOk(uint8_t PortNum); + +/** + * @brief Trigger in Fast role swap signalling + * @param PortNum Number of the port. + * @retval None + */ +void USBPD_PHY_FastRoleSwapSignalling(uint8_t PortNum); + +/** + * @brief Enable RX + * @param PortNum Number of the port. + * @retval None + */ +void USBPD_PHY_EnableRX(uint8_t PortNum); + +/** + * @brief Disable RX + * @param PortNum Number of the port. + * @retval None + */ +void USBPD_PHY_DisableRX(uint8_t PortNum); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#endif /* USBPDCORE_TCPM_SUPPORT */ + +#ifdef __cplusplus +} +#endif + + +#endif /* __USBPD_TCPM_H */ + Index: /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Core/inc/usbpd_trace.h =================================================================== --- /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Core/inc/usbpd_trace.h (revision 60) +++ /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Core/inc/usbpd_trace.h (revision 60) @@ -0,0 +1,152 @@ +/** + ****************************************************************************** + * @file usbpd_trace.h + * @author MCD Application Team + * @brief Header file for usbpd_trace.c + ****************************************************************************** + * @attention + * + * Copyright (c) 2021 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +#ifndef USBPD_TRACE_H_ +#define USBPD_TRACE_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "usbpd_core.h" +#ifndef _STDIO +#include "stdio.h" +#endif /* _STDIO */ + +/** @addtogroup STM32_USBPD_LIBRARY + * @{ + */ + +/** @addtogroup USBPD_CORE + * @{ + */ + +/** @addtogroup USBPD_CORE_TRACE + * @{ + */ + +/* Exported types ------------------------------------------------------------*/ +/* Exported define -----------------------------------------------------------*/ +/** @defgroup USBPD_CORE_TRACE_Exported_Defines USBPD CORE TRACE Exported Defines + * @{ + */ +typedef enum +{ + TCPM_TRACE_CORE_ALERT, /*!< ALERT_TASK */ + TCPM_TRACE_ALERT, /*!< USBPD_TCPM_alert */ + TCPM_TRACE_ALERT_CLEAR, /*!< USBPD_TCPM_alert: tcpc_clear_alert */ + TCPM_TRACE_ALERT_GET_POWER_STATUS, /*!< USBPD_TCPM_alert: get_power_status */ + TCPM_TRACE_ALERT_GET_FAULT_STATUS, /*!< USBPD_TCPM_alert: get_fault_status */ + TCPM_TRACE_ALERT_SET_FAULT_STATUS, /*!< USBPD_TCPM_alert: set_fault_status */ + TCPM_TRACE_ALERT_READ_ALERT, /*!< USBPD_TCPM_alert: set_fault_status */ + TCPM_TRACE_HW_INIT, /*!< USBPD_TCPM_HWInit */ + TCPM_TRACE_SET_CC, /*!< USBPD_TCPM_set_cc */ + TCPM_TRACE_VBUS_GET_VOLTAGE, /*!< USBPD_TCPM_VBUS_GetVoltage */ + TCPM_TRACE_VBUS_IS_VSAFE0V, /*!< USBPD_TCPM_VBUS_IsVsafe0V */ + TCPM_TRACE_VBUS_IS_VSAFEEV, /*!< USBPD_TCPM_VBUS_IsVsafe5V */ + TCPM_TRACE_VBUS_ENABLE, /*!< USBPD_TCPM_VBUS_Enable */ + TCPM_TRACE_VBUS_DISABLE, /*!< USBPD_TCPM_VBUS_Disable */ + TCPM_TRACE_INIT, /*USBPD_PHY_Init*/ + TCPM_TRACE_DEINIT, /*USBPD_PHY_Deinit*/ + TCPM_TRACE_RESET, /*USBPD_PHY_Reset*/ + TCPM_TRACE_SOP_SUPPORTED, /*USBPD_PHY_SOPSupported*/ + TCPM_TRACE_GET_CC, /*USBPD_TCPM_get_cc*/ + TCPM_TRACE_SET_POLARITY, /*USBPD_TCPM_set_polarity*/ + TCPM_TRACE_SET_VCONN, /*USBPD_TCPM_set_vconn*/ + TCPM_TRACE_SET_MSG_HEADER, /*USBPD_TCPM_set_msg_header*/ + TCPM_TRACE_SET_RX_STATE, /*USBPD_TCPM_set_rx_state*/ + TCPM_TRACE_SET_GET_MESSAGE, /*USBPD_TCPM_get_message*/ + TCPM_TRACE_TRANSMIT, /*USBPD_TCPM_transmit*/ + TCPM_TRACE_RESET_REQUEST, /*USBPD_PHY_ResetRequest*/ + TCPM_TRACE_SEND_BIST, /*USBPD_PHY_Send_BIST_Pattern*/ + TCPM_TRACE_SEND_BIST_PATTERN, /*USBPD_TCPM_Send_BIST_Pattern*/ + TCPM_TRACE_SINK_TXNG, /*USBPD_PHY_SetResistor_SinkTxNG*/ + TCPM_TRACE_SINK_TXOK, /*USBPD_PHY_SetResistor_SinkTxOK*/ + TCPM_TRACE_SINK_IF_TXOK, /*USBPD_PHY_IsResistor_SinkTxOk*/ + TCPM_TRACE_FAST_ROLE_SWAP, /*USBPD_PHY_FastRoleSwapSignalling*/ + TCPM_TRACE_ENABLE_RX, /* tcpc_EnableRx */ + TCPM_TRACE_DISABLE_RX, /* tcpc_DisableRx */ + TCPM_TRACE_SET_PIN_ROLE, /* tcpc_tcpc_set_cc */ +} USBPD_TCPM_TRACE; + +/** + * @} + */ + +/* Exported constants --------------------------------------------------------*/ +/* Exported macro ------------------------------------------------------------*/ +/* Exported variables --------------------------------------------------------*/ +/** @defgroup USBPD_CORE_TRACE_Exported_Variables USBPD CORE TRACE Exported Variables + * @{ + */ +extern TRACE_ENTRY_POINT USBPD_Trace; + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ + +/** @defgroup USBPD_CORE_TRACE_Exported_Functions USBPD CORE TRACE Exported Functions + * @{ + */ +/** + * @brief Initialize the TRACE module + * @retval None + */ +void USBPD_TRACE_Init(void); + +/** + * @brief DeInitialize the TRACE module + * @retval None + */ +void USBPD_TRACE_DeInit(void); + +/** + * @brief Add information in debug trace buffer + * @param Type Trace Type based on @ref TRACE_EVENT + * @param PortNum Port number value + * @param Sop SOP type + * @param Ptr Pointer on the data to send + * @param Size Size of the data to send + * @retval None. + */ +void USBPD_TRACE_Add(TRACE_EVENT Type, uint8_t PortNum, uint8_t Sop, uint8_t *Ptr, uint32_t Size); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* USBPD_CAD_H_ */ + Index: /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Core/src/usbpd_trace.c =================================================================== --- /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Core/src/usbpd_trace.c (revision 60) +++ /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Core/src/usbpd_trace.c (revision 60) @@ -0,0 +1,213 @@ +/** + ****************************************************************************** + * @file usbpd_trace.c + * @author MCD Application Team + * @brief This file contains trace control functions. + ****************************************************************************** + * @attention + * + * Copyright (c) 2021 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#define USBPD_TRACE_C + +#include "usbpd_def.h" +#include "usbpd_core.h" +#include "usbpd_trace.h" +#ifdef _TRACE +#include "tracer_emb.h" +#endif /* _TRACE */ + +/** @addtogroup STM32_USBPD_LIBRARY + * @{ + */ + +/** @addtogroup USBPD_CORE + * @{ + */ + +/** @addtogroup USBPD_CORE_TRACE + * @{ + */ + +/* Private enums -------------------------------------------------------------*/ +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +/** @defgroup USBPD_CORE_TRACE_Private_Defines USBPD CORE TRACE Private Defines + * @{ + */ + +#define TRACE_SIZE_HEADER_TRACE 9u /* Type + Time x 2 + PortNum + Sop + Size */ + +#define TRACE_PORT_BIT_POSITION 5u /* Bit position of port number in TAG id */ + +#define TLV_SOF (uint8_t)0xFDu +#define TLV_EOF (uint8_t)0xA5u +#define TLV_SIZE_MAX 256u +#define TLV_HEADER_SIZE 3u /* Size of TLV header (TAG(1) + LENGTH(2) */ +#define TLV_SOF_SIZE 4u /* TLV_SOF * 4 */ +#define TLV_EOF_SIZE 4u /* TLV_EOF * 4 */ + +#define DEBUG_STACK_MESSAGE 0x12u +/** + * @} + */ + +/* Private macro -------------------------------------------------------------*/ +/** @defgroup USBPD_CORE_TRACE_Private_Macros USBPD CORE TRACE Private Macros + * @{ + */ +#define TRACE_SET_TAG_ID(_PORT_, _TAG_) (((_PORT_) << TRACE_PORT_BIT_POSITION) | (_TAG_)) + +#define TRACER_EMB_WRITE_DATA(_POSITION_,_DATA_) do { \ + TRACER_EMB_WriteData((_POSITION_),(_DATA_));\ + (_POSITION_) = ((_POSITION_) + 1u); \ + } while(0) +/** + * @} + */ + +/* Private function prototypes -----------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/** @defgroup USBPD_CORE_TRACE_Private_Variables USBPD CORE TRACE Private Variables + * @{ + */ +extern uint32_t HAL_GetTick(void); +extern void USBPD_DPM_TraceWakeUp(void); +/** + * @} + */ + +/* Exported functions ---------------------------------------------------------*/ + +/** @addtogroup USBPD_CORE_TRACE_Exported_Functions + * @{ + */ +void USBPD_TRACE_Init(void) +{ +#if defined(_TRACE) + static const uint8_t OverFlow_String[] = + { + TLV_SOF, TLV_SOF, TLV_SOF, TLV_SOF, /* Buffer header */ + 0x32, /* Tag id */ + 0x0, 0x18, /* Length */ + 0x6, /* Type */ + 0x0, 0x0, 0x0, 0x0, /* Time */ + 0x0, /* PortNum */ + 0x0, /* SOP */ + 0x0, 0x0F, /* Size */ + 'T', 'R', 'A', 'C', 'E', ' ', 'O', 'V', 'E', 'R', '_', 'F', 'L', 'O', 'W', /* Data */ + TLV_EOF, TLV_EOF, TLV_EOF, TLV_EOF /* Buffer end */ + }; + + /* initialize tracer module */ + TRACER_EMB_Init(); + + /* Initialize PE trace */ + USBPD_PE_SetTrace(USBPD_TRACE_Add, 3u); + + /* Initialize the overflow detection */ + (void)TRACER_EMB_EnableOverFlow(OverFlow_String, (uint8_t)sizeof(OverFlow_String)); +#else + return; +#endif /* _TRACE */ +} + +void USBPD_TRACE_DeInit(void) +{ + /* Nothing to do */ + return; +} + +void USBPD_TRACE_Add(TRACE_EVENT Type, uint8_t PortNum, uint8_t Sop, uint8_t *Ptr, uint32_t Size) +{ +#if defined(_TRACE) + uint32_t _time; + int32_t _allocation; + uint16_t index; + + /* Get trace timing */ + _time = HAL_GetTick(); + + TRACER_EMB_Lock(); + + /* Data are encapsulate inside a TLV string*/ + /* Allocate buffer Size */ + _allocation = TRACER_EMB_AllocateBufer(Size + TRACE_SIZE_HEADER_TRACE + + TLV_HEADER_SIZE + TLV_SOF_SIZE + TLV_EOF_SIZE); + + /* Check allocation */ + if (_allocation != -1) + { + uint16_t _writepos = (uint16_t)_allocation; + + /* Copy SOF bytes */ + for (index = 0u; index < TLV_SOF_SIZE; index++) + { + TRACER_EMB_WRITE_DATA(_writepos, TLV_SOF); + } + /* Copy the TAG */ + TRACER_EMB_WRITE_DATA(_writepos, TRACE_SET_TAG_ID((PortNum + 1u), DEBUG_STACK_MESSAGE)); + /* Copy the LENGTH */ + TRACER_EMB_WRITE_DATA(_writepos, (uint8_t)((Size + TRACE_SIZE_HEADER_TRACE) >> 8u)); + TRACER_EMB_WRITE_DATA(_writepos, (uint8_t)(Size + TRACE_SIZE_HEADER_TRACE)); + + /* Trace type */ + TRACER_EMB_WRITE_DATA(_writepos, (uint8_t)Type); + + TRACER_EMB_WRITE_DATA(_writepos, (uint8_t)_time); + TRACER_EMB_WRITE_DATA(_writepos, (uint8_t)(_time >> 8u)); + TRACER_EMB_WRITE_DATA(_writepos, (uint8_t)(_time >> 16u)); + TRACER_EMB_WRITE_DATA(_writepos, (uint8_t)(_time >> 24u)); + + TRACER_EMB_WRITE_DATA(_writepos, PortNum); + TRACER_EMB_WRITE_DATA(_writepos, Sop); + + TRACER_EMB_WRITE_DATA(_writepos, (uint8_t)(Size >> 8u)); + TRACER_EMB_WRITE_DATA(_writepos, (uint8_t)Size); + + /* initialize the Ptr for Read/Write */ + for (index = 0u; index < Size; index++) + { + TRACER_EMB_WRITE_DATA(_writepos, Ptr[index]); + } + + /* Copy EOF bytes */ + for (index = 0u; index < TLV_EOF_SIZE; index++) + { + TRACER_EMB_WRITE_DATA(_writepos, TLV_EOF); + } + } + + TRACER_EMB_UnLock(); + + TRACER_EMB_SendData(); +#else + return; +#endif /* _TRACE */ +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + Index: /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/LICENSE.txt =================================================================== --- /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/LICENSE.txt (revision 60) +++ /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/LICENSE.txt (revision 60) @@ -0,0 +1,86 @@ +This software component is provided to you as part of a software package and +applicable license terms are in the Package_license file. If you received this +software component outside of a package or without applicable license terms, +the terms of the SLA0044 license shall apply and are fully reproduced below: + +SLA0044 Rev5/February 2018 + +Software license agreement + +ULTIMATE LIBERTY SOFTWARE LICENSE AGREEMENT + +BY INSTALLING, COPYING, DOWNLOADING, ACCESSING OR OTHERWISE USING THIS SOFTWARE +OR ANY PART THEREOF (AND THE RELATED DOCUMENTATION) FROM STMICROELECTRONICS +INTERNATIONAL N.V, SWISS BRANCH AND/OR ITS AFFILIATED COMPANIES +(STMICROELECTRONICS), THE RECIPIENT, ON BEHALF OF HIMSELF OR HERSELF, OR ON +BEHALF OF ANY ENTITY BY WHICH SUCH RECIPIENT IS EMPLOYED AND/OR ENGAGED AGREES +TO BE BOUND BY THIS SOFTWARE LICENSE AGREEMENT. + +Under STMicroelectronics’ intellectual property rights, the redistribution, +reproduction and use in source and binary forms of the software or any part +thereof, with or without modification, are permitted provided that the following +conditions are met: + +1. Redistribution of source code (modified or not) must retain any copyright +notice, this list of conditions and the disclaimer set forth below as items 10 +and 11. + +2. Redistributions in binary form, except as embedded into microcontroller or +microprocessor device manufactured by or for STMicroelectronics or a software +update for such device, must reproduce any copyright notice provided with the +binary code, this list of conditions, and the disclaimer set forth below as +items 10 and 11, in documentation and/or other materials provided with the +distribution. + +3. Neither the name of STMicroelectronics nor the names of other contributors to +this software may be used to endorse or promote products derived from this +software or part thereof without specific written permission. + +4. This software or any part thereof, including modifications and/or derivative +works of this software, must be used and execute solely and exclusively on or in +combination with a microcontroller or microprocessor device manufactured by or +for STMicroelectronics. + +5. No use, reproduction or redistribution of this software partially or totally +may be done in any manner that would subject this software to any Open Source +Terms. “Open Source Terms” shall mean any open source license which requires as +part of distribution of software that the source code of such software is +distributed therewith or otherwise made available, or open source license that +substantially complies with the Open Source definition specified at +www.opensource.org and any other comparable open source license such as for +example GNU General Public License (GPL), Eclipse Public License (EPL), Apache +Software License, BSD license or MIT license. + +6. STMicroelectronics has no obligation to provide any maintenance, support or +updates for the software. + +7. The software is and will remain the exclusive property of STMicroelectronics +and its licensors. The recipient will not take any action that jeopardizes +STMicroelectronics and its licensors' proprietary rights or acquire any rights +in the software, except the limited rights specified hereunder. + +8. The recipient shall comply with all applicable laws and regulations affecting +the use of the software or any part thereof including any applicable export +control law or regulation. + +9. Redistribution and use of this software or any part thereof other than as +permitted under this license is void and will automatically terminate your +rights under this license. + +10. THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" AND +ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS, WHICH ARE +DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT SHALL +STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF +LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE +OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF +ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +11. EXCEPT AS EXPRESSLY PERMITTED HEREUNDER, NO LICENSE OR OTHER RIGHTS, WHETHER +EXPRESS OR IMPLIED, ARE GRANTED UNDER ANY PATENT OR OTHER INTELLECTUAL PROPERTY +RIGHTS OF STMICROELECTRONICS OR ANY THIRD PARTY. + Index: /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/inc/usbpd_cad_hw_if.h =================================================================== --- /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/inc/usbpd_cad_hw_if.h (revision 60) +++ /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/inc/usbpd_cad_hw_if.h (revision 60) @@ -0,0 +1,90 @@ +/** + ****************************************************************************** + * @file usbpd_cad_hw_if.h + * @author MCD Application Team + * @brief This file contains the headers of usbpd_cad_hw_if.c for Cable Attach-Detach + * controls. + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +#ifndef __USBPD_CAD_HW_IF_H_ +#define __USBPD_CAD_HW_IF_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "usbpd_core.h" + +/** @addtogroup STM32_USBPD_LIBRARY + * @{ + */ + +/** @addtogroup USBPD_DEVICE + * @{ + */ + +/** @addtogroup USBPD_DEVICE_CAD_HW_IF + * @{ + */ + + +/* Exported types ------------------------------------------------------------*/ +/* Exported define -----------------------------------------------------------*/ +#if defined(_LOW_POWER) || defined(USBPDM1_VCC_FEATURE_ENABLED) +#define CAD_DELAY_READ_CC_STATUS (300U) +#endif /* _LOW_POWER || USBPDM1_VCC_FEATURE_ENABLED */ + +/* Exported constants --------------------------------------------------------*/ +/* Exported macro ------------------------------------------------------------*/ +/* Exported variables --------------------------------------------------------*/ +/* Exported functions --------------------------------------------------------*/ + +#if defined(USBPDCORE_DRP) || defined(USBPDCORE_SRC) +/* Keep for legacy */ +uint32_t CAD_Set_ResistorRp(uint8_t PortNum, CAD_RP_Source_Current_Adv_Typedef RpValue); +#endif /* USBPDCORE_DRP || USBPDCORE_SRC */ + +/** @addtogroup USBPD_DEVICE_CAD_HW_IF_Exported_Functions + * @{ + */ +void CAD_Init(uint8_t PortNum, USBPD_SettingsTypeDef *Settings, + USBPD_ParamsTypeDef *Params, void (*PtrWakeUp)(void)); +uint32_t CAD_StateMachine(uint8_t PortNum, USBPD_CAD_EVENT *Event, CCxPin_TypeDef *CCXX); +void CAD_Enter_ErrorRecovery(uint8_t PortNum); +#if defined(USBPDCORE_DRP) || defined(USBPDCORE_SRC) +uint32_t CAD_SRC_Set_ResistorRp(uint8_t PortNum, CAD_RP_Source_Current_Adv_Typedef RpValue); +#endif /* USBPDCORE_DRP || USBPDCORE_SRC */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __USBPD_CAD_HW_IF_H_ */ + Index: /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/inc/usbpd_hw.h =================================================================== --- /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/inc/usbpd_hw.h (revision 60) +++ /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/inc/usbpd_hw.h (revision 60) @@ -0,0 +1,43 @@ +/** + ****************************************************************************** + * @file usbpd_hw.h + * @author MCD Application Team + * @brief This file contains interface hw control. + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +#ifndef __USBPD_HW_H_ +#define __USBPD_HW_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +/* Private typedef -----------------------------------------------------------*/ +/* Variable containing ADC conversions results */ +/* Private function prototypes -----------------------------------------------*/ +/* Private functions ---------------------------------------------------------*/ +UCPD_TypeDef *USBPD_HW_GetUSPDInstance(uint8_t PortNum); +DMA_Channel_TypeDef *USBPD_HW_Init_DMARxInstance(uint8_t PortNum); +void USBPD_HW_DeInit_DMARxInstance(uint8_t PortNum); +DMA_Channel_TypeDef *USBPD_HW_Init_DMATxInstance(uint8_t PortNum); +void USBPD_HW_DeInit_DMATxInstance(uint8_t PortNum); +uint32_t USBPD_HW_GetRpResistorValue(uint8_t Portnum); +void USBPD_HW_SetFRSSignalling(uint8_t Portnum, uint8_t cc); + +#ifdef __cplusplus +} +#endif + +#endif /* __USBPD_HW_H_ */ Index: /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/inc/usbpd_hw_if.h =================================================================== --- /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/inc/usbpd_hw_if.h (revision 60) +++ /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/inc/usbpd_hw_if.h (revision 60) @@ -0,0 +1,380 @@ +/** + ****************************************************************************** + * @file usbpd_hw_if.h + * @author MCD Application Team + * @brief This file contains the headers of usbpd_hw_if.h for USB-PD Hardware + Interface layer. This file is specific for each device. + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +#ifndef __USBPD_HW_IF_H_ +#define __USBPD_HW_IF_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "usbpd_def.h" +#include "usbpd_devices_conf.h" + +/** @addtogroup STM32_USBPD_LIBRARY + * @{ + */ + +/** @addtogroup USBPD_DEVICE + * @{ + */ + +/** @addtogroup USBPD_DEVICE_HW_IF + * @{ + */ + +/* Exported typedef ----------------------------------------------------------*/ +/** @defgroup USBPD_DEVICE_DEVICE_HW_IF_Exported_Types USBPD DEVICE HW_IF Exported Types + * @{ + */ + +/** + * @brief Enum used to get the status of decoding + */ +typedef enum +{ + USBPD_PHY_RX_STATUS_NONE, + USBPD_PHY_RX_STATUS_OK, + USBPD_PHY_RX_STATUS_SOP_DETECTING, + USBPD_PHY_RX_STATUS_DATA, + USBPD_PHY_RX_STATUS_MESSAGE_READY, + USBPD_PHY_RX_STATUS_ERROR, + USBPD_PHY_RX_STATUS_ERROR_UNSUPPORTED_SOP, + USBPD_PHY_RX_STATUS_ERROR_INVALID_SOP, + USBPD_PHY_RX_STATUS_ERROR_INVALID_SYMBOL, + USBPD_PHY_RX_STATUS_ERROR_EOP_NOT_FOUND, + USBPD_PHY_RX_STATUS_ERROR_CRC_FAILED, +} +USBPD_PHY_RX_Status_TypeDef; + +/** + * @brief CallBacks exposed by the HW_IF to the PHY + */ +typedef struct +{ + /** + * @brief The message transfer has been completed + * @param PortNum Port number + * @param Status (0 means OK) + * @retval None + */ + void (*USBPD_HW_IF_TxCompleted)(uint8_t PortNum, uint32_t Status); + + /** + * @brief Bist data sent callback from PHY_HW_IF + * @param PortNum Port number + * @param bistmode: Bist mode + * @retval None + */ + void (*USBPD_HW_IF_BistCompleted)(uint8_t PortNum, USBPD_BISTMsg_TypeDef bistmode); + + /** + * @brief The reception phase of an hard reset is completed notify it. + * @param PortNum Port number + * @param SOPType SOP Message Type based on @ref USBPD_SOPType_TypeDef + * @retval None + */ + void (*USBPD_HW_IF_RX_ResetIndication)(uint8_t PortNum, USBPD_SOPType_TypeDef Type); + + /** + * @brief The reception phase of the current message is completed and notify it. + * @param PortNum Port number + * @param MsgType Message Type + * @retval None + */ + void (*USBPD_HW_IF_RX_Completed)(uint8_t PortNum, uint32_t MsgType); + + /** + * @brief The emission of HRST has been completed. + * @param PortNum Port number + * @retval None + */ + void (*USBPD_HW_IF_TX_HardResetCompleted)(uint8_t PortNum, USBPD_SOPType_TypeDef Type); + + /** + * @brief FRS reception. + * @param PortNum Port number + * @retval None + */ + void (*USBPD_HW_IF_TX_FRSReception)(uint8_t PortNum); + +} USBPD_HW_IF_Callbacks_TypeDef; + +/** @defgroup USBPD_PORT_HandleTypeDef USB PD handle Structure definition for USBPD_PHY_HW_IF + * @brief USBPD PORT handle Structure definition + * @{ + */ +typedef struct +{ + UCPD_TypeDef *husbpd; /*!< UCPD Handle parameters */ + DMA_Channel_TypeDef *hdmatx; /*!< Tx DMA Handle parameters */ + DMA_Channel_TypeDef *hdmarx; /*!< Rx DMA Handle parameters */ + + USBPD_SettingsTypeDef *settings; + USBPD_ParamsTypeDef *params; + USBPD_HW_IF_Callbacks_TypeDef cbs; /*!< USBPD_PHY_HW_IF callbacks */ + + void (*USBPD_CAD_WakeUp)(void); /*!< function used to wakeup cad task */ + + uint8_t *ptr_RxBuff; /*!< Pointer to Raw Rx transfer Buffer */ + + CCxPin_TypeDef CCx; /*!< CC pin used for communication */ + __IO uint8_t RXStatus; /*!< Tracks the reception of a message to forbid any new + TX transaction until message completion */ +} USBPD_PORT_HandleTypeDef; + +extern USBPD_PORT_HandleTypeDef Ports[USBPD_PORT_COUNT]; + +/** + * @} + */ + +/** + * @} + */ + +/* Exported define -----------------------------------------------------------*/ + +/** @defgroup USBPD_DEVICE_DEVICE_HW_IF_Exported_Defines USBPD DEVICE HW_IF Exported Defines + * @{ + */ + +#define SIZE_MAX_PD_TRANSACTION_CHUNK 30u +#define SIZE_MAX_PD_TRANSACTION_UNCHUNK (260u + 4u) + +/** + * @} + */ + +/* Exported variables --------------------------------------------------------*/ +/* Exported functions --------------------------------------------------------*/ + +/** @defgroup USBPD_DEVICE_DEVICE_HW_IF_Exported_Functions USBPD DEVICE HW_IF Exported Functions + * @{ + */ + +/** + * @brief Enable the interrupt for the reception. + * @param PortNum The handle of the port. + * @retval None + */ +void USBPDM1_RX_EnableInterrupt(uint8_t PortNum); + +/** + * @brief stop bist carrier mode 2. + * @param PortNum The port handle. + * @retval None + */ +void USBPD_HW_IF_StopBISTMode2(uint8_t PortNum); + +/** + * @brief Initialize specific peripheral for the APP. + * @retval None + */ +void USBPD_HW_IF_GlobalHwInit(void); + +/** + * @brief Send a Buffer . + * @note The data will be converted in bmc and send through the line + * @param PortNum The port handle. + * @param Type SOP Message Type based on @ref USBPD_SOPType_TypeDef + * @param pBuffer Data buffer to be transmitted + * @param Bitsize The number of bits to be transmitted + * @retval USBPD status + */ +USBPD_StatusTypeDef USBPD_HW_IF_SendBuffer(uint8_t PortNum, USBPD_SOPType_TypeDef Type, uint8_t *pBuffer, + uint32_t Bitsize); + +#if defined(_SRC) || defined(_DRP) +/** + * @brief Enable the VBUS on a specified port. + * @param PortNum The port handle. + * @param State ENABLE or DISABLE. + * @param Cc CC pin based on @ref CCxPin_TypeDef + * @param VconnState VCONN State activation + * @param role The role of the port. + * @retval USBPD status + */ +USBPD_StatusTypeDef HW_IF_PWR_Enable(uint8_t PortNum, USBPD_FunctionalState State, CCxPin_TypeDef Cc, + uint32_t VconnState, USBPD_PortPowerRole_TypeDef role); +#endif /* _SRC || _DRP */ + +/** + * @brief Retrieve the VBUS status for a specified port. + * @param PortNum The port handle. + * @retval FunctionalState + */ +USBPD_FunctionalState HW_IF_PWR_VBUSIsEnabled(uint8_t PortNum); + +/** + * @brief Set the VBUS voltage level on a specified port. + * @param PortNum The port handle. + * @param Voltage voltage value to be set. + * @retval USBPD status + */ +USBPD_StatusTypeDef HW_IF_PWR_SetVoltage(uint8_t PortNum, uint16_t Voltage); + +/** + * @brief Get the voltage level on a specified port. + * @param PortNum The port handle. + * @retval The voltage value + */ +uint16_t HW_IF_PWR_GetVoltage(uint8_t PortNum); + +/** + * @brief Get the current level on a specified port. + * @param PortNum The port handle. + * @retval The current value + */ +int16_t HW_IF_PWR_GetCurrent(uint8_t PortNum); + +/** + * @brief Connect the Rp resistors on the CC lines + * @param PortNum The port handle. + * @retval none + */ +void USBPDM1_AssertRp(uint8_t PortNum); + +/** + * @brief Disconnect the Rp resistors on the CC lines + * @param PortNum The port handle. + * @retval none + */ +void USBPDM1_DeAssertRp(uint8_t PortNum); + +/** + * @brief Connect the Rd resistors on the CC lines + * @param PortNum The port handle. + * @retval none + */ +void USBPDM1_AssertRd(uint8_t PortNum); + +/** + * @brief Disconnect the Rd resistors on the CC lines + * @param PortNum The port handle. + * @retval none + */ +void USBPDM1_DeAssertRd(uint8_t PortNum); + +/** + * @brief Set the CCx pin. + * @param PortNum The port handle. + * @param cc Specify the ccx to be selected. + * @retval None + */ +void USBPDM1_Set_CC(uint8_t PortNum, CCxPin_TypeDef cc); + +/** + * @brief Sends the BIST pattern + * @param PortNum The port handle. + * @retval none + */ +void USBPD_HW_IF_Send_BIST_Pattern(uint8_t PortNum); + +/** + * @brief Sends a detachemnt signal. + * @param PortNum The port handle. + * @retval none + */ +void HW_SignalDetachment(uint8_t PortNum); + +/** + * @brief Sends an Attachment signal. + * @param PortNum The port handle. + * @param cc the PD pin. + * @retval none + */ +void HW_SignalAttachement(uint8_t PortNum, CCxPin_TypeDef cc); + +/** + * @brief Set SinkTxNG resistor. + * @param PortNum The port handle. + * @retval none + */ +void USBPD_HW_IF_SetResistor_SinkTxNG(uint8_t PortNum); + +/** + * @brief Set SinkTxOk resistor. + * @param PortNum The port handle. + * @retval none + */ +void USBPD_HW_IF_SetResistor_SinkTxOK(uint8_t PortNum); + +/** + * @brief Is SinkTxOk resistor. + * @param PortNum The port handle. + * @retval TRUE FALSE + */ +uint8_t USBPD_HW_IF_IsResistor_SinkTxOk(uint8_t PortNum); + +/** + * @brief send a Fast Role swap signalling. + * @param PortNum The port handle. + * @retval None + */ +void USBPD_HW_IF_FastRoleSwapSignalling(uint8_t PortNum); + +/** + * @brief enter in error recovery state. + * @param PortNum The port handle. + * @retval None + */ +void USBPDM1_EnterErrorRecovery(uint8_t PortNum); + + +void USBPD_PORT0_IRQHandler(void); +void USBPD_PORT1_IRQHandler(void); + +/** + * @brief Enable RX + * @param PortNum The port handle. + * @retval None + */ +void USBPD_HW_IF_EnableRX(uint8_t PortNum); + +/** + * @brief Disable RX + * @param PortNum The port handle. + * @retval None + */ +void USBPD_HW_IF_DisableRX(uint8_t PortNum); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __USBPD_HW_IF_H_ */ + Index: /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/inc/usbpd_phy.h =================================================================== --- /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/inc/usbpd_phy.h (revision 60) +++ /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/inc/usbpd_phy.h (revision 60) @@ -0,0 +1,153 @@ +/** + ****************************************************************************** + * @file usbpd_phy.h + * @author MCD Application Team + * @brief This file contains the headers of usbpd_phy.h. + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +#ifndef __USBPD_PHY_H_ +#define __USBPD_PHY_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ + +/** @addtogroup STM32_USBPD_LIBRARY + * @{ + */ + +/** @addtogroup USBPD_DEVICE + * @{ + */ + +/** @addtogroup USBPD_DEVICE_PHY + * @{ + */ + +/* Exported typedef ----------------------------------------------------------*/ +/** @defgroup USBPD_DEVICE_PHY_Exported_TypeDef USBPD DEVICE PHY Exported TypeDef + * @{ + */ +/** + * @brief CallBacks exposed by the @ref USBPD_DEVICE_PHY to the USBPD_CORE_PRL + */ +typedef struct +{ + /** + * @brief Reports that a message has been received on a specified port. + * @note Received data are stored inside PortNum->pRxBuffPtr + * function called in the interrupt context + * @param PortNum The handle of the port + * @param Type The type of the message received @ref USBPD_SOPType_TypeDef + * @retval None + */ + void (*USBPD_PHY_MessageReceived)(uint8_t PortNum, USBPD_SOPType_TypeDef Type); + + /** + * @brief Reports to the PRL that a Reset received from channel. + * @param PortNum The handle of the port + * @param Type The type of reset performed @ref USBPD_SOPTYPE_HARD_RESET or @ref USBPD_SOPTYPE_CABLE_RESET + * @retval None + */ + void (*USBPD_PHY_ResetIndication)(uint8_t PortNum, USBPD_SOPType_TypeDef Type); + + /** + * @brief Reports to the PRL that a Reset operation has been completed. + * @param PortNum The handle of the port + * @param Type The type of reset performed @ref USBPD_SOPTYPE_HARD_RESET or @ref USBPD_SOPTYPE_CABLE_RESET + * @retval None + */ + void (*USBPD_PHY_ResetCompleted)(uint8_t PortNum, USBPD_SOPType_TypeDef Type); + + /** + * @brief Reports to the PRL that a Bist operation has been completed. + * @param PortNum The handle of the port + * @param Type The type of Bist performed @ref USBPD_BISTMsg_TypeDef + * @retval None + */ + void (*USBPD_PHY_BistCompleted)(uint8_t PortNum, USBPD_BISTMsg_TypeDef bistmode); + + /** + * @brief Reports to the PRL that a tx operation has been completed. + * @param PortNum: The handle of the port + * @param Status: 0 if no error else error + * @retval None + */ + void (*USBPD_PHY_TxCompleted)(uint8_t PortNum, uint32_t Status); + + /** + * @brief Reports to the PRL that an FRS has been detected. + * @param PortNum: The handle of the port + * @retval None + */ + void (*USBPD_PHY_FastRoleSwapReception)(uint8_t PortNum); + +} USBPD_PHY_Callbacks; + +/** + * @} + */ + +/* Exported define -----------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Exported macro ------------------------------------------------------------*/ +/* Exported variables --------------------------------------------------------*/ +/* Exported functions --------------------------------------------------------*/ + +/** @addtogroup USBPD_DEVICE_PHY_Exported_Functions + * @{ + */ +USBPD_StatusTypeDef USBPD_PHY_Init(uint8_t PortNum, const USBPD_PHY_Callbacks *cbs, uint8_t *pRxBuffer, + USBPD_PortPowerRole_TypeDef role, uint32_t SupportedSOP); +void USBPD_PHY_Reset(uint8_t PortNum); +uint16_t USBPD_PHY_GetRetryTimerValue(uint8_t PortNum); +uint16_t USBPD_PHY_GetMinGOODCRCTimerValue(uint8_t PortNum); + +USBPD_StatusTypeDef USBPD_PHY_ResetRequest(uint8_t PortNum, USBPD_SOPType_TypeDef Type); +USBPD_StatusTypeDef USBPD_PHY_SendMessage(uint8_t PortNum, USBPD_SOPType_TypeDef Type, uint8_t *pBuffer, uint16_t Size); +USBPD_StatusTypeDef USBPD_PHY_Send_BIST_Pattern(uint8_t PortNum); +USBPD_StatusTypeDef USBPD_PHY_ExitTransmit(uint8_t PortNum, USBPD_SOPType_TypeDef BistType); +void USBPD_PHY_SetResistor_SinkTxNG(uint8_t PortNum); +void USBPD_PHY_SetResistor_SinkTxOK(uint8_t PortNum); +uint8_t USBPD_PHY_IsResistor_SinkTxOk(uint8_t PortNum); +void USBPD_PHY_FastRoleSwapSignalling(uint8_t PortNum); +void USBPD_PHY_SOPSupported(uint8_t PortNum, uint32_t SOPSupported); + +void USBPD_PHY_EnableRX(uint8_t PortNum); +void USBPD_PHY_DisableRX(uint8_t PortNum); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __USBPD_PHY_H_ */ + Index: /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/inc/usbpd_timersserver.h =================================================================== --- /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/inc/usbpd_timersserver.h (revision 60) +++ /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/inc/usbpd_timersserver.h (revision 60) @@ -0,0 +1,77 @@ +/** + ****************************************************************************** + * @file usbpd_timersserver.h + * @author MCD Application Team + * @brief This file contains the headers of usbpd_timerserver.h. + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +#ifndef __USBPD_TIMERSSERVER_H_ +#define __USBPD_TIMERSSERVER_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +/** @addtogroup STM32_USBPD_LIBRARY + * @{ + */ + +/** @addtogroup USBPD_DEVICE + * @{ + */ + +/** @addtogroup USBPD_DEVICE_TIMESERVER + * @{ + */ + +/* Exported constants --------------------------------------------------------*/ +typedef enum +{ + TIM_PORT0_CRC, + TIM_PORT0_RETRY, + TIM_PORT1_CRC, + TIM_PORT1_RETRY, + TIM_MAX +} +TIM_identifier; + +#define TIM_MAX_TIME 10000u /*time in us, means 10 ms */ +/* Exported types ------------------------------------------------------------*/ +/* External variables --------------------------------------------------------*/ +/* Exported macros -----------------------------------------------------------*/ +/* Exported functions --------------------------------------------------------*/ +void USBPD_TIM_Init(void); +void USBPD_TIM_DeInit(void); +void USBPD_TIM_Start(TIM_identifier Id, uint32_t TimeUs); +uint32_t USBPD_TIM_IsExpired(TIM_identifier Id); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __USBPD_TIMERSSERVER_H_ */ + Index: /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_cad_hw_if.c =================================================================== --- /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_cad_hw_if.c (revision 60) +++ /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_cad_hw_if.c (revision 60) @@ -0,0 +1,1944 @@ +/** + ****************************************************************************** + * @file usbpd_cad_hw_if.c + * @author MCD Application Team + * @brief This file contains power hardware interface cad functions. + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#define USBPD_CAD_HW_IF_C +#include "usbpd_devices_conf.h" +#include "usbpd_hw.h" +#include "usbpd_def.h" +#include "usbpd_cad_hw_if.h" +#include "usbpd_hw_if.h" +#if defined(_TRACE) +#include "usbpd_trace.h" +#endif /* _TRACE*/ +#include "string.h" + +/** @addtogroup STM32_USBPD_LIBRARY + * @{ + */ + +/** @addtogroup USBPD_DEVICE + * @{ + */ + +/** @addtogroup USBPD_DEVICE_CAD_HW_IF + * @{ + */ + +/* Private typedef -----------------------------------------------------------*/ +/** + * @brief CAD State Machine function pointer + * @{ + */ +typedef uint32_t CAD_StateMachinePtr(uint8_t PortNum, USBPD_CAD_EVENT *Event, CCxPin_TypeDef *CCXX); + +/** + * @brief CAD State value @ref USBPD_DEVICE_CAD_HW_IF + * @{ + */ +typedef enum +{ + USBPD_CAD_STATE_RESET = 0U, /*!< USBPD CAD State Reset */ + USBPD_CAD_STATE_DETACHED = 1U, /*!< USBPD CAD State No cable detected */ + USBPD_CAD_STATE_ATTACHED_WAIT = 2U, /*!< USBPD CAD State Port partner detected */ + USBPD_CAD_STATE_ATTACHED = 3U, /*!< USBPD CAD State Port partner attached */ +#if defined(_DRP) || defined(_SRC) + USBPD_CAD_STATE_EMC = 4U, /*!< USBPD CAD State Electronically Marked Cable detected */ + USBPD_CAD_STATE_ATTEMC = 5U, /*!< USBPD CAD State Port Partner detected through EMC */ +#if defined(_ACCESSORY_SRC) + USBPD_CAD_STATE_DEBUG = 7U, /*!< USBPD CAD State Debug detected */ + USBPD_CAD_STATE_ACCESSORY = 6U, /*!< USBPD CAD State Accessory detected */ +#endif /* _ACCESSORY_SRC */ +#endif /* _DRP || _SRC */ + USBPD_CAD_STATE_SWITCH_TO_SRC = 8U, /*!< USBPD CAD State switch to Source */ + USBPD_CAD_STATE_SWITCH_TO_SNK = 9U, /*!< USBPD CAD State switch to Sink */ + USBPD_CAD_STATE_UNKNOW = 10U, /*!< USBPD CAD State unknown */ + USBPD_CAD_STATE_DETACH_SRC = 11U, + USBPD_CAD_STATE_ERRORRECOVERY = 12U, /*!< USBPD CAD State error recovery */ + USBPD_CAD_STATE_ERRORRECOVERY_EXIT = 13U, /*!< USBPD CAD State to exit error recovery */ +#if defined(_SNK) && defined(_ACCESSORY_SNK) + USBPD_CAD_STATE_UNATTACHED_ACCESSORY = 14U, /*!< USBPD CAD State Unattached.Accessory */ + USBPD_CAD_STATE_AUDIO_ACCESSORY = 15U, /*!< USBPD CAD State Wait detached after Accessory detection */ +#endif /* _SNK && _ACCESSORY_SNK */ + USBPD_CAD_STATE_ATTACHED_ACCESSORY_WAIT = 16U, +#if defined(USBPDCORE_VPD) + USBPD_CAD_STATE_POWERED_ACCESSORY = 17U, + USBPD_CAD_STATE_UNSUPPORTED_ACCESSORY = 18U, + USBPD_CAD_STATE_CTVPD_UNATTACHED = 19U, + USBPD_CAD_STATE_CTVPD_ATTACHED = 20U +#endif /* USBPDCORE_VPD */ +} USBPD_CAD_STATE; +/** + * @} + */ + +/** + * @brief USB PD CC lines HW condition + */ +typedef enum +{ + HW_Detachment = 0x00UL, /*!< Nothing attached */ + HW_Attachment = 0x01UL, /*!< Sink attached */ + HW_PwrCable_NoSink_Attachment = 0x02UL, /*!< Powered cable without Sink attached */ + HW_PwrCable_Sink_Attachment = 0x03UL, /*!< Powered cable with Sink or VCONN-powered Accessory attached */ + HW_Debug_Attachment = 0x04UL, /*!< Debug Accessory Mode attached */ + HW_AudioAdapter_Attachment = 0x05UL, /*!< Audio Adapter Accessory Mode attached */ +} CAD_HW_Condition_TypeDef; + +/** + * @brief CAD State value @ref USBPD_DEVICE_CAD_HW_IF + * @{ + */ +typedef struct +{ + CCxPin_TypeDef cc : 2; + CAD_HW_Condition_TypeDef CurrentHWcondition : 3; + uint32_t CAD_tDebounce_flag : 1; + uint32_t CAD_tDebounceAcc_flag : 1; + uint32_t CAD_ErrorRecoveryflag : 1; + uint32_t CAD_ResistorUpdateflag : 1; + USBPD_CAD_STATE cstate : 5; /* Current state */ + uint32_t CAD_Accessory_SRC : 1; + uint32_t CAD_Accessory_SNK : 1; + uint32_t reserved : 1; + USBPD_CAD_STATE pstate : 5; /* Previous state */ +#if defined(USBPDCORE_VPD) + uint32_t CAD_VPD_SRC : 1; + uint32_t CAD_VPD_SNK : 1; + uint32_t reserved2 : 8; +#else + uint32_t reserved2 : 10; +#endif /* USBPDCORE_VPD */ + +#if defined(_DRP) || defined(_ACCESSORY_SNK) + uint32_t CAD_tToggle_start; +#endif /* _DRP */ + uint32_t CAD_tDebounce_start; /* Variable used for attach or detach debounce timers */ + CAD_StateMachinePtr *CAD_PtrStateMachine; +} CAD_HW_HandleTypeDef; +/** + * @} + */ + +/* Private define ------------------------------------------------------------*/ +#define CAD_TPDDEBOUNCE_THRESHOLD 12u /**< tPDDebounce threshold between 10 to 20ms */ +#define CAD_TCCDEBOUNCE_THRESHOLD 120u /**< tCCDebounce threshold between 100 to 200ms */ +#define CAD_TSRCDISCONNECT_THRESHOLD 2u /**< tSRCDisconnect detach threshold between 0 to 20ms */ +#define CAD_INFINITE_TIME 0xFFFFFFFFu /**< infinite time to wait a new interrupt event */ +#define CAD_TERROR_RECOVERY_TIME 26u /**< tErrorRecovery min 25ms */ +#define CAD_DEFAULT_TIME 2u /**< default transition timing of the state machine */ +#define CAD_ACCESSORY_TOGGLE 40u /**< toggle time for snk accessory detection */ +#define CAD_TVPDDETACH 10u /**< tVPDDetach timing between 10 and 20 ms */ + +#if defined(_DRP) || defined(_SRC) +#define CAD_DETACH_POLLING 40u +#elif defined(_SNK) +#define CAD_DETACH_POLLING 100u +#endif /* _DRP || _SRC */ + +#if defined(_LOW_POWER) +#define CAD_VBUS_POLLING_TIME 38u +#else +#define CAD_VBUS_POLLING_TIME 10u +#endif /* _LOW_POWER */ + +/* Private macro -------------------------------------------------------------*/ + +/* Private variables ---------------------------------------------------------*/ +/* Handle to manage the detection state machine */ +static CAD_HW_HandleTypeDef CAD_HW_Handles[USBPD_PORT_COUNT]; + +/* Private function prototypes -----------------------------------------------*/ +/** @defgroup USBPD_DEVICE_CAD_HW_IF_Private_Functions USBPD DEVICE_CAD HW IF Private Functions + * @{ + */ +#if defined(_DRP) || defined(_SRC) +static void CAD_Check_HW_SRC(uint8_t PortNum); +#endif /* _DRP || _SRC */ + +#if defined(_DRP) || defined(_SNK) +static uint32_t ManageStateAttachedWait_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeDef *pCCXX); +static uint32_t ManageStateAttached_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeDef *pCCXX); +static uint32_t ManageStateDetached_SNK(uint8_t PortNum); +static void CAD_Check_HW_SNK(uint8_t PortNum); +#endif /* _DRP || _SNK */ + +#if defined(_DRP) +static uint32_t ManageStateAttachedWait_DRP(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeDef *pCCXX); +static uint32_t ManageStateAttached_DRP(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeDef *pCCXX); +#endif /* _DRP */ + +#if defined(_DRP) || defined(_SRC) +static uint32_t ManageStateAttachedWait_SRC(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeDef *pCCXX); +#endif /* _DRP || _SRC || (_ACCESSORY && _SNK) */ + +#if defined(_SRC) || defined(_DRP) +static uint32_t ManageStateDetached_SRC(uint8_t PortNum); +#endif /* _SRC */ + +#if defined(_DRP) || defined(_SRC) +static uint32_t ManageStateEMC(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeDef *pCCXX); +static uint32_t ManageStateAttached_SRC(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeDef *pCCXX); +#endif /* _DRP || _SRC */ + +#if defined(_DRP) +static uint32_t ManageStateDetached_DRP(uint8_t PortNum); +#endif /* _DRP */ + + +#if defined(_SNK) +static uint32_t CAD_StateMachine_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeDef *pCCXX); +#endif /* _SNK */ + +#if defined(_SRC) +static uint32_t CAD_StateMachine_SRC(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeDef *pCCXX); +#endif /* _SRC */ + +#if defined(_DRP) +static uint32_t CAD_StateMachine_DRP(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeDef *pCCXX); +#endif /* _DRP */ + + +#if defined(TCPP0203_SUPPORT) +void CAD_HW_IF_VBUSDetectCallback(uint32_t PortNum, + USBPD_PWR_VBUSConnectionStatusTypeDef VBUSConnectionStatus); +#endif /* TCPP0203_SUPPORT */ + +/** + * @} + */ + +/** @defgroup USBPD_DEVICE_CAD_HW_IF_Exported_Functions USBPD DEVICE_CAD HW IF Exported Functions + * @{ + */ + +/** + * @brief Function to initialize the cable detection state machine + * @param PortNum Port number + * @param pSettings Pointer on PD settings based on @ref USBPD_SettingsTypeDef + * @param pParams Pointer on PD parameters based on @ref USBPD_ParamsTypeDef + * @param WakeUp Wake-up callback function used for waking up CAD + * @retval None + */ +void CAD_Init(uint8_t PortNum, USBPD_SettingsTypeDef *pSettings, USBPD_ParamsTypeDef *pParams, void (*WakeUp)(void)) +{ + CAD_HW_HandleTypeDef *_handle = &CAD_HW_Handles[PortNum]; + LL_UCPD_InitTypeDef settings; + + Ports[PortNum].params = pParams; + Ports[PortNum].settings = pSettings; + Ports[PortNum].params->RpResistor = Ports[PortNum].settings->CAD_DefaultResistor; + Ports[PortNum].params->SNKExposedRP_AtAttach = vRd_Undefined; + + /* Reset handle */ + memset(_handle, 0, sizeof(CAD_HW_HandleTypeDef)); + + /* Register CAD wake up callback */ + Ports[PortNum].USBPD_CAD_WakeUp = WakeUp; + + /* Initialize the USBPD_IP */ + Ports[PortNum].husbpd = USBPD_HW_GetUSPDInstance(PortNum); + + /* Initialize UCPD */ + LL_UCPD_StructInit(&settings); + (void)LL_UCPD_Init(Ports[PortNum].husbpd, &settings); + LL_UCPD_SetRxOrderSet(Ports[PortNum].husbpd, + LL_UCPD_ORDERSET_SOP | LL_UCPD_ORDERSET_SOP1 | LL_UCPD_ORDERSET_SOP2 | + LL_UCPD_ORDERSET_CABLERST | LL_UCPD_ORDERSET_HARDRST); + /* Controls whether pull-ups and pull-downs controls related to ANAMODE and ANASUBMODE + should be applied to CC1 and CC2 analog PHYs */ + /* Should be done when UCPDEN is 1 */ + LL_UCPD_SetccEnable(Ports[PortNum].husbpd, LL_UCPD_CCENABLE_CC1CC2); + +#ifdef _LOW_POWER + LL_UCPD_WakeUpEnable(Ports[PortNum].husbpd); +#endif /* _LOW_POWER */ + + /* Disable dead battery */ + LL_PWR_DisableUCPDDeadBattery(); /* PWR->CR3 |= (1 << 14); */ + LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOB); /* GPIOB enable RCC->AHB2ENR |= 2; */ + + /* Set by default UCPD1_CC1 & UCPD1_CC2 in analog mode */ + LL_GPIO_SetPinMode(GPIOB, LL_GPIO_PIN_6, LL_GPIO_MODE_ANALOG); /* PB6 mode = GP analog => CC1 */ + LL_GPIO_SetPinMode(GPIOB, LL_GPIO_PIN_4, LL_GPIO_MODE_ANALOG); /* PB4 mode = GP analog => CC2 */ + + LL_GPIO_SetPinPull(GPIOB, LL_GPIO_PIN_6, LL_GPIO_PULL_NO); + LL_GPIO_SetPinPull(GPIOB, LL_GPIO_PIN_4, LL_GPIO_PULL_NO); + + /* Init power */ + BSP_USBPD_PWR_Init(PortNum); + +#if defined(TCPP0203_SUPPORT) + /* Register VBUS detect callback */ + BSP_USBPD_PWR_RegisterVBUSDetectCallback(PortNum, CAD_HW_IF_VBUSDetectCallback); +#endif /* TCPP0203_SUPPORT */ + + /* Enable USBPD IP */ + LL_UCPD_Enable(Ports[PortNum].husbpd); + +#if defined(_SRC) || defined(_DRP) + /* Initialize usbpd interrupt */ + if (USBPD_PORTPOWERROLE_SRC == Ports[PortNum].params->PE_PowerRole) + { + USBPDM1_AssertRp(PortNum); +#if defined(TCPP0203_SUPPORT) + /* Switch to Low Power mode */ + BSP_USBPD_PWR_SetPowerMode(PortNum, USBPD_PWR_MODE_LOWPOWER); +#endif /* TCPP0203_SUPPORT */ + } +#endif /* _SRC || _DRP */ +#if defined(_DRP) + else +#endif /* _DRP */ +#if defined(_SNK) || defined(_DRP) + { + USBPDM1_AssertRd(PortNum); +#if defined(TCPP0203_SUPPORT) + /* Switch to Low Power mode */ + BSP_USBPD_PWR_SetPowerMode(PortNum, USBPD_PWR_MODE_LOWPOWER); +#endif /* TCPP0203_SUPPORT */ + } +#endif /* _SNK || _DRP */ + + /* Set the state machine according the SW configuration */ +#if !defined(USBPDCORE_LIB_NO_PD) +#if defined(_DRP) + if (Ports[PortNum].settings->CAD_RoleToggle == USBPD_TRUE) + { + /* Set current state machine to DRP state machine */ + _handle->CAD_PtrStateMachine = CAD_StateMachine_DRP; + _handle->CAD_Accessory_SRC = Ports[PortNum].settings->CAD_AccesorySupport; +#if defined(USBPDCORE_VPD) + _handle->CAD_VPD_SRC = Ports[PortNum].settings->CAD_VPDSupport; +#endif /* USBPDCORE_VPD */ + } + else +#endif /* _DRP */ + { +#if defined(_SRC) + /* If default role is source */ + if (USBPD_PORTPOWERROLE_SRC == Ports[PortNum].settings->PE_DefaultRole) + { + /* Set current state machine to SRC state machine */ + _handle->CAD_PtrStateMachine = CAD_StateMachine_SRC; + _handle->CAD_Accessory_SRC = Ports[PortNum].settings->CAD_AccesorySupport; +#if defined(USBPDCORE_VPD) + _handle->CAD_VPD_SRC = Ports[PortNum].settings->CAD_VPDSupport; +#endif /* USBPDCORE_VPD */ + } + else +#endif /* _SRC */ + { +#if defined(_SNK) + /* Set current state machine to SNK state machine */ + _handle->CAD_PtrStateMachine = CAD_StateMachine_SNK; + _handle->CAD_Accessory_SNK = Ports[PortNum].settings->CAD_AccesorySupport; +#if defined(USBPDCORE_VPD) + _handle->CAD_VPD_SNK = Ports[PortNum].settings->VPDSupport; +#endif /* USBPDCORE_VPD */ +#endif /* _SNK */ + } + } +#else /* USBPDCORE_LIB_NO_PD */ +#if defined(_SRC) + /* If default role is source */ + if (USBPD_PORTPOWERROLE_SRC == Ports[PortNum].settings->PE_DefaultRole) + { + /* Set current state machine to SRC state machine */ + _handle->CAD_PtrStateMachine = CAD_StateMachine_SRC; +#if defined(USBPDCORE_VPD) + _handle->CAD_VPD_SRC = Ports[PortNum].settings->CAD_VPDSupport; +#endif /* USBPDCORE_VPD */ + } + else +#endif /* _SRC */ + { +#if defined(_SNK) + /* Set current state machine to SNK state machine */ + _handle->CAD_PtrStateMachine = CAD_StateMachine_SNK; +#if defined(USBPDCORE_VPD) + _handle->CAD_VPD_SNK = Ports[PortNum].settings->CAD_VPDSupport; +#endif /* USBPDCORE_VPD */ +#endif /* _SNK */ + } +#endif /* USBPDCORE_LIB_NO_PD */ +} + +/** + * @brief Function to force CAD state machine into error recovery state + * @param PortNum Index of current used port + * @retval None + */ +void CAD_Enter_ErrorRecovery(uint8_t PortNum) +{ + /* Remove the ucpd resistor */ + USBPDM1_EnterErrorRecovery(PortNum); + /* Set the error recovery flag to allow the stack to switch into errorRecovery Flag */ + CAD_HW_Handles[PortNum].CAD_ErrorRecoveryflag = USBPD_TRUE; + /* Wake up CAD task */ + Ports[PortNum].USBPD_CAD_WakeUp(); +} + +#if defined(USBPDCORE_DRP) || defined(USBPDCORE_SRC) +/** + * @brief Function to force the value of the RP resistor + * @note Must be called only if you want change the settings value + * @param PortNum Index of current used port + * @param RpValue RP value to set in devices based on @ref CAD_RP_Source_Current_Adv_Typedef + * @retval 0 success else error + */ +uint32_t CAD_SRC_Set_ResistorRp(uint8_t PortNum, CAD_RP_Source_Current_Adv_Typedef RpValue) +{ + /* Update the information about the default resistor value presented in detach mode */ + Ports[PortNum].params->RpResistor = RpValue; + + /* Inform state machine about a resistor update */ + CAD_HW_Handles[PortNum].CAD_ResistorUpdateflag = USBPD_TRUE; + /* Wake up CAD task */ + Ports[PortNum].USBPD_CAD_WakeUp(); + return 0; +} + +/* Keep for legacy */ +uint32_t CAD_Set_ResistorRp(uint8_t PortNum, CAD_RP_Source_Current_Adv_Typedef RpValue) +{ + return CAD_SRC_Set_ResistorRp(PortNum, RpValue); +} +#endif /* USBPDCORE_DRP || USBPDCORE_SRC */ + + +/** + * @brief CAD State machine for sink role + * @param PortNum Port + * @param pEvent Pointer on CAD event based on @ref USBPD_CAD_EVENT + * @param pCCXX Pointer on CC Pin based on @ref CCxPin_TypeDef + * @retval Timeout value + */ +#if defined(_SNK) +/* Function to handle SNK and SNK + ACCESSORY OPTION */ +uint32_t CAD_StateMachine_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeDef *pCCXX) +{ + CAD_HW_HandleTypeDef *_handle = &CAD_HW_Handles[PortNum]; + uint32_t _timing = CAD_DEFAULT_TIME; + +#if defined(USBPDM1_VCC_FEATURE_ENABLED) + BSP_USBPD_PWR_VCCSetState(PortNum, 1); +#endif /* USBPDM1_VCC_FEATURE_ENABLED */ + + /* Check CAD STATE */ + switch (_handle->cstate) + { + case USBPD_CAD_STATE_DETACHED: + { + _timing = ManageStateDetached_SNK(PortNum); + break; + } + + case USBPD_CAD_STATE_ATTACHED_WAIT: + _timing = ManageStateAttachedWait_SNK(PortNum, pEvent, pCCXX); + break; + + case USBPD_CAD_STATE_ATTACHED: + _timing = ManageStateAttached_SNK(PortNum, pEvent, pCCXX); + break; + +#if defined(_ACCESSORY_SNK) + case USBPD_CAD_STATE_UNATTACHED_ACCESSORY: + { + uint32_t cc; + cc = Ports[PortNum].husbpd->SR & (UCPD_SR_TYPEC_VSTATE_CC1 | UCPD_SR_TYPEC_VSTATE_CC2); + + _handle->CAD_tDebounce_flag = USBPD_FALSE; + if ((USBPD_TRUE == _handle->CAD_Accessory_SNK) && (cc == (LL_UCPD_SRC_CC1_VRA | LL_UCPD_SRC_CC2_VRA))) + { + /* Get the time of this event */ + _handle->CAD_tDebounce_start = HAL_GetTick(); + _handle->cstate = USBPD_CAD_STATE_ATTACHED_ACCESSORY_WAIT; + } +#if defined(USBPDCORE_VPD) + else if ((USBPD_TRUE == _handle->CAD_VPD_SNK) && + ((cc == (LL_UCPD_SRC_CC1_VRD | LL_UCPD_SRC_CC2_VRA) + || ((LL_UCPD_SRC_CC1_VRA | LL_UCPD_SRC_CC2_VRD) == cc))) + ) + { + _handle->CAD_tDebounce_start = HAL_GetTick(); + _handle->cstate = USBPD_CAD_STATE_ATTACHED_ACCESSORY_WAIT; + } +#endif /* USBPDCORE_VPD */ + else if ( + ((cc == (LL_UCPD_SRC_CC1_VRD | LL_UCPD_SRC_CC2_VRA) + || ((LL_UCPD_SRC_CC1_VRA | LL_UCPD_SRC_CC2_VRD) == cc))) + ) + { + if ((HAL_GetTick() - _handle->CAD_tToggle_start) > 200) + { + _handle->CAD_tToggle_start = HAL_GetTick(); + _handle->cstate = USBPD_CAD_STATE_DETACHED; + USBPDM1_AssertRd(PortNum); + } + } + else + { + /* tOnePortToggleConnect between 0 and 80ms */ + if ((HAL_GetTick() - _handle->CAD_tToggle_start) > CAD_ACCESSORY_TOGGLE) + { + _handle->CAD_tToggle_start = HAL_GetTick(); + _handle->cstate = USBPD_CAD_STATE_DETACHED; + USBPDM1_AssertRd(PortNum); + } + } + break; + } + + case USBPD_CAD_STATE_ATTACHED_ACCESSORY_WAIT : + { + uint32_t cc; + cc = Ports[PortNum].husbpd->SR & (UCPD_SR_TYPEC_VSTATE_CC1 | UCPD_SR_TYPEC_VSTATE_CC2); + _handle->CAD_tDebounce_flag = USBPD_FALSE; + switch (cc) + { + case LL_UCPD_SRC_CC1_VRA | LL_UCPD_SRC_CC2_VRA : /* Audio accessory */ + { + /* Check if the device is still connected after the debounce timing */ + if (HAL_GetTick() - _handle->CAD_tDebounce_start > CAD_TCCDEBOUNCE_THRESHOLD) + { + _handle->cstate = USBPD_CAD_STATE_AUDIO_ACCESSORY; + *pEvent = USBPD_CAD_EVENT_ACCESSORY; + } + break; + } +#if defined(USBPDCORE_VPD) + case LL_UCPD_SRC_CC1_VRD | LL_UCPD_SRC_CC2_VRA: /* VPD CC1 */ + case LL_UCPD_SRC_CC1_VRA | LL_UCPD_SRC_CC2_VRD: /* VPD CC2 */ + { + if (HAL_GetTick() - _handle->CAD_tDebounce_start > CAD_TCCDEBOUNCE_THRESHOLD) + { + _handle->cstate = USBPD_CAD_STATE_POWERED_ACCESSORY; + *pEvent = USPPD_CAD_EVENT_VPD; + Ports[PortNum].params->PE_VPDStatus = VPD_UNKNOWN; + Ports[PortNum].params->CAD_VPDStatus = VPD_NONE; + if ((LL_UCPD_SRC_CC1_VRD | LL_UCPD_SRC_CC2_VRA) == cc) + { + _handle->cc = CC1; + } + else + { + _handle->cc = CC2; + } + *pCCXX = _handle->cc; + HW_SignalAttachement(PortNum, _handle->cc); + } + break; + } +#endif /* USBPDCORE_VPD */ + default : + { + if ((HAL_GetTick() - _handle->CAD_tDebounce_start) > CAD_TCCDEBOUNCE_THRESHOLD) + { + /* Get the time of this event */ + _handle->CAD_tToggle_start = HAL_GetTick(); + _handle->cstate = USBPD_CAD_STATE_DETACHED; + USBPDM1_AssertRd(PortNum); + } + break; + } + } + break; + } + + case USBPD_CAD_STATE_AUDIO_ACCESSORY: + { + /* Check if the device is still connected after the debounce timing */ + if ((LL_UCPD_SRC_CC1_VRA != (Ports[PortNum].husbpd->SR & UCPD_SR_TYPEC_VSTATE_CC1)) + && (LL_UCPD_SRC_CC2_VRA != (Ports[PortNum].husbpd->SR & UCPD_SR_TYPEC_VSTATE_CC2))) + { + if (USBPD_FALSE == _handle->CAD_tDebounce_flag) + { + _handle->CAD_tDebounce_start = HAL_GetTick(); + _handle->CAD_tDebounce_flag = USBPD_TRUE; + _timing = CAD_TCCDEBOUNCE_THRESHOLD + 49U; + } + else + { + if ((HAL_GetTick() - _handle->CAD_tDebounce_start) > (CAD_TCCDEBOUNCE_THRESHOLD + 50U)) + { + _handle->CAD_tToggle_start = HAL_GetTick(); + _handle->CAD_tDebounce_flag = USBPD_FALSE; + _handle->cstate = USBPD_CAD_STATE_DETACHED; + _handle->cc = CCNONE; + USBPDM1_AssertRd(PortNum); + *pEvent = USBPD_CAD_EVENT_DETACHED; + *pCCXX = CCNONE; + } + } + } + else + { + _handle->CAD_tDebounce_flag = USBPD_FALSE; + _timing = CAD_INFINITE_TIME; + } + break; + } + +#if defined(USBPDCORE_VPD) + case USBPD_CAD_STATE_POWERED_ACCESSORY: + { + uint32_t cc; + cc = Ports[PortNum].husbpd->SR & (UCPD_SR_TYPEC_VSTATE_CC1 | UCPD_SR_TYPEC_VSTATE_CC2); + + /* If SRC.Open detected on the monitored PIN switch to Unattached.SNK */ + if (((CC1 == _handle->cc) && (LL_UCPD_SRC_CC1_OPEN == (cc & UCPD_SR_TYPEC_VSTATE_CC1))) || + ((CC2 == _handle->cc) && (LL_UCPD_SRC_CC2_OPEN == (cc & UCPD_SR_TYPEC_VSTATE_CC2)))) + { + _handle->CAD_tToggle_start = HAL_GetTick(); + _handle->cstate = USBPD_CAD_STATE_DETACHED; + Ports[PortNum].params->PE_VPDStatus = VPD_NONE; + *pEvent = USBPD_CAD_EVENT_DETACHED; + USBPDM1_AssertRd(PortNum); + } + else + { + /* if the port is not PD or a SRC it must switch to try.SNK */ + if (VPD_NOPD == Ports[PortNum].params->CAD_VPDStatus) + { + _handle->CAD_tToggle_start = HAL_GetTick(); + _handle->cstate = USBPD_CAD_STATE_DETACHED; + *pEvent = USBPD_CAD_EVENT_DETACHED; + USBPDM1_AssertRd(PortNum); + Ports[PortNum].params->PE_VPDStatus = VPD_NONE; + } + /* If the port is PD but doesn't enter Alternate mode within tAMETimeout switch to Unsupported.Accessory */ + else if (VPD_FAILED_ENTER_ALTERNATE == Ports[PortNum].params->CAD_VPDStatus) + { + _handle->cstate = USBPD_CAD_STATE_UNSUPPORTED_ACCESSORY; + } + /* If Powered USB DEvice confirmed transition to CTUnattached.SNK */ + else if (VPD_DETECTED == Ports[PortNum].params->CAD_VPDStatus) + { + _handle->cstate = USBPD_CAD_STATE_CTVPD_UNATTACHED; + } + } + break; + } + + case USBPD_CAD_STATE_UNSUPPORTED_ACCESSORY: + { + uint32_t cc; + cc = Ports[PortNum].husbpd->SR & (UCPD_SR_TYPEC_VSTATE_CC1 | UCPD_SR_TYPEC_VSTATE_CC2); + + /* If SRC.Open detected on the monitored PIN switch to Unattached.SNK */ + if ((LL_UCPD_SRC_CC1_OPEN == (cc | UCPD_SR_TYPEC_VSTATE_CC1)) || + (LL_UCPD_SRC_CC2_OPEN == (cc | UCPD_SR_TYPEC_VSTATE_CC2))) + { + _handle->CAD_tToggle_start = HAL_GetTick(); + _handle->cstate = USBPD_CAD_STATE_DETACHED; + *pEvent = USBPD_CAD_EVENT_DETACHED; + USBPDM1_AssertRp(PortNum); + } + break; + } + + case USBPD_CAD_STATE_CTVPD_UNATTACHED: + { + if (USBPD_TRUE == USBPD_PWR_IF_GetVBUSStatus(PortNum, USBPD_PWR_VSAFE5V)) /* Check if Vbus is on */ + { + /* The charger/SRC has been plug */ + _handle->cstate = USBPD_CAD_STATE_CTVPD_ATTACHED; + } + else + { + uint32_t cc; + cc = Ports[PortNum].husbpd->SR & (UCPD_SR_TYPEC_VSTATE_CC1 | UCPD_SR_TYPEC_VSTATE_CC2); + + /* If VBUS is VSafe0V and CC low for tVPDDetach = 10/20ms */ + if (((LL_UCPD_SRC_CC1_OPEN == (cc | UCPD_SR_TYPEC_VSTATE_CC1)) || + (LL_UCPD_SRC_CC2_OPEN == (cc | UCPD_SR_TYPEC_VSTATE_CC2))) && + (USBPD_TRUE == USBPD_PWR_IF_GetVBUSStatus(PortNum, USBPD_PWR_BELOWVSAFE0V))) + { + if (USBPD_TRUE == _handle->CAD_tDebounce_flag) + { + _handle->CAD_tDebounce_start = HAL_GetTick(); + } + else + { + if (HAL_GetTick() - _handle->CAD_tDebounce_start > CAD_TVPDDETACH) + { + _handle->CAD_tToggle_start = HAL_GetTick(); + _handle->cstate = USBPD_CAD_STATE_DETACHED; + *pEvent = USBPD_CAD_EVENT_DETACHED; + USBPDM1_AssertRp(PortNum); + } + } + } + else + { + _handle->CAD_tDebounce_flag = USBPD_FALSE; + } + } + break; + } + + case USBPD_CAD_STATE_CTVPD_ATTACHED: + { + /* If VBUS removed */ + if (USBPD_TRUE == USBPD_PWR_IF_GetVBUSStatus(PortNum, USBPD_PWR_SNKDETACH)) + { + /* The charger/SRC has been unplug */ + _handle->cstate = USBPD_CAD_STATE_CTVPD_UNATTACHED; + } + break; + } +#endif /* USBPDCORE_VPD */ +#endif /* _ACCESSORY_SNK */ + + default: + { + break; + } + } + +#if defined(USBPDM1_VCC_FEATURE_ENABLED) + switch (_handle->pstate) + { + case USBPD_CAD_STATE_ATTACHED_WAIT: + case USBPD_CAD_STATE_ATTACHED: + case USBPD_CAD_STATE_ERRORRECOVERY : + case USBPD_CAD_STATE_ERRORRECOVERY_EXIT: + /* Nothing to do, the VCC must stay high */ + break; + default : + BSP_USBPD_PWR_VCCSetState(PortNum, 0); + break; + } +#endif /* USBPDM1_VCC_FEATURE_ENABLED */ + + return _timing; +} +#endif /* _SNK */ + +#if defined(_SRC) +/** + * @brief CAD State machine for source role + * @param PortNum Port + * @param pEvent Pointer on CAD event based on @ref USBPD_CAD_EVENT + * @param pCCXX Pointer on CC Pin based on @ref CCxPin_TypeDef + * @retval Timeout value + */ +uint32_t CAD_StateMachine_SRC(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeDef *pCCXX) +{ + CAD_HW_HandleTypeDef *_handle = &CAD_HW_Handles[PortNum]; + uint32_t _timing = CAD_DEFAULT_TIME; + + /*Check CAD STATE*/ + switch (_handle->cstate) + { + case USBPD_CAD_STATE_DETACH_SRC : + { +#if defined(_VCONN_SUPPORT) + /* DeInitialize Vconn management */ + (void)BSP_USBPD_PWR_VCONNDeInit(PortNum, (Ports[PortNum].CCx == CC1) ? 1u : 2u); +#endif /* _VCONN_SUPPORT */ + /* DeInitialise VBUS power */ + (void)BSP_USBPD_PWR_VBUSDeInit(PortNum); + /* Reset the resistor */ + USBPDM1_AssertRp(PortNum); + _handle->cstate = USBPD_CAD_STATE_DETACHED; + _timing = 0; + break; + } + + case USBPD_CAD_STATE_SWITCH_TO_SNK : + case USBPD_CAD_STATE_DETACHED: + { + _timing = ManageStateDetached_SRC(PortNum); + break; + } + + case USBPD_CAD_STATE_ATTACHED_WAIT: + { + _timing = ManageStateAttachedWait_SRC(PortNum, pEvent, pCCXX); + break; + } + +#if defined(_ACCESSORY_SRC) + case USBPD_CAD_STATE_ACCESSORY: + { + _timing = CAD_INFINITE_TIME; + CAD_Check_HW_SRC(PortNum); + if ((HW_AudioAdapter_Attachment != _handle->CurrentHWcondition) + && (HW_PwrCable_Sink_Attachment != _handle->CurrentHWcondition)) + { + _handle->cstate = USBPD_CAD_STATE_DETACH_SRC; + *pCCXX = CCNONE; + _handle->cc = CCNONE; + *pEvent = USBPD_CAD_EVENT_DETACHED; + } + break; + } + + case USBPD_CAD_STATE_DEBUG: + { + _timing = CAD_INFINITE_TIME; + CAD_Check_HW_SRC(PortNum); + if (_handle->CurrentHWcondition != HW_Debug_Attachment) + { + _handle->cstate = USBPD_CAD_STATE_DETACH_SRC; + *pCCXX = CCNONE; + _handle->cc = CCNONE; + *pEvent = USBPD_CAD_EVENT_DETACHED; + } + break; + } +#endif /* _ACCESSORY_SRC */ + + case USBPD_CAD_STATE_EMC : + { + _timing = ManageStateEMC(PortNum, pEvent, pCCXX); + break; + } + + /*CAD electronic cable with Sink ATTACHED*/ + case USBPD_CAD_STATE_ATTEMC: + case USBPD_CAD_STATE_ATTACHED: + { + _timing = ManageStateAttached_SRC(PortNum, pEvent, pCCXX); + break; + } + + default : + { + break; + } + } + + return _timing; +} +#endif /* _SRC */ + +#if defined(_DRP) +/** + * @brief CAD State machine for dual role + * @param PortNum Port + * @param pEvent Pointer on CAD event based on @ref USBPD_CAD_EVENT + * @param pCCXX Pointer on CC Pin based on @ref CCxPin_TypeDef + * @retval Timeout value + */ +uint32_t CAD_StateMachine_DRP(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeDef *pCCXX) +{ + CAD_HW_HandleTypeDef *_handle = &CAD_HW_Handles[PortNum]; + uint32_t _timing = CAD_DEFAULT_TIME; + + /*Check CAD STATE*/ + switch (_handle->cstate) + { + case USBPD_CAD_STATE_DETACH_SRC : + { +#if defined(_VCONN_SUPPORT) + /* DeInitialize Vconn management */ + (void)BSP_USBPD_PWR_VCONNDeInit(PortNum, (Ports[PortNum].CCx == CC1) ? 1u : 2u); +#endif /* _VCONN_SUPPORT */ + /* DeInitialise VBUS power */ + (void)BSP_USBPD_PWR_VBUSDeInit(PortNum); + _timing = 0; + _handle->cstate = USBPD_CAD_STATE_SWITCH_TO_SNK; + break; + } + + case USBPD_CAD_STATE_SWITCH_TO_SRC: + case USBPD_CAD_STATE_SWITCH_TO_SNK: + { + LL_UCPD_RxDisable(Ports[PortNum].husbpd); + if (USBPD_CAD_STATE_SWITCH_TO_SRC == _handle->cstate) + { + USBPDM1_AssertRp(PortNum); + Ports[PortNum].params->PE_PowerRole = USBPD_PORTPOWERROLE_SRC; + Ports[PortNum].params->PE_DataRole = USBPD_PORTDATAROLE_DFP; + _timing = Ports[PortNum].settings->CAD_SRCToggleTime; + } + if (USBPD_CAD_STATE_SWITCH_TO_SNK == _handle->cstate) + { + USBPDM1_AssertRd(PortNum); + Ports[PortNum].params->PE_PowerRole = USBPD_PORTPOWERROLE_SNK; + Ports[PortNum].params->PE_DataRole = USBPD_PORTDATAROLE_UFP; + _timing = Ports[PortNum].settings->CAD_SNKToggleTime; + } + _handle->CAD_tToggle_start = HAL_GetTick(); + _handle->cstate = USBPD_CAD_STATE_DETACHED; + } + break; + + case USBPD_CAD_STATE_DETACHED: + _timing = ManageStateDetached_DRP(PortNum); + break; + + /*CAD STATE ATTACHED WAIT*/ + case USBPD_CAD_STATE_ATTACHED_WAIT: + _timing = ManageStateAttachedWait_DRP(PortNum, pEvent, pCCXX); + break; + +#if defined(_ACCESSORY_SRC) + case USBPD_CAD_STATE_ACCESSORY: + { + CAD_Check_HW_SRC(PortNum); + if ((HW_AudioAdapter_Attachment != _handle->CurrentHWcondition) + && (HW_PwrCable_Sink_Attachment != _handle->CurrentHWcondition)) + { + _handle->cstate = USBPD_CAD_STATE_DETACH_SRC; + *pCCXX = CCNONE; + _handle->cc = CCNONE; + *pEvent = USBPD_CAD_EVENT_DETACHED; + } + else + { + _timing = CAD_INFINITE_TIME; + } + break; + } + + case USBPD_CAD_STATE_DEBUG: + { + _timing = CAD_INFINITE_TIME; + CAD_Check_HW_SRC(PortNum); + if (_handle->CurrentHWcondition != HW_Debug_Attachment) + { + _handle->cstate = USBPD_CAD_STATE_DETACH_SRC; + *pCCXX = CCNONE; + _handle->cc = CCNONE; + *pEvent = USBPD_CAD_EVENT_DETACHED; + } + break; + } +#endif /* _ACCESSORY_SRC */ + + /* CAD ELECTRONIC CABLE ATTACHED */ + case USBPD_CAD_STATE_EMC : + _timing = ManageStateEMC(PortNum, pEvent, pCCXX); + break; + + /*CAD electronic cable with Sink ATTACHED*/ + case USBPD_CAD_STATE_ATTEMC: + case USBPD_CAD_STATE_ATTACHED: + _timing = ManageStateAttached_DRP(PortNum, pEvent, pCCXX); + break; + + default : + break; + } + + return _timing; +} +#endif /* _DRP */ + +#if !defined(USBPDCORE_LIB_NO_PD) +/** + * @brief Main CAD State machine + * @param PortNum Port + * @param pEvent Pointer on CAD event based on @ref USBPD_CAD_EVENT + * @param pCCXX Pointer on CC Pin based on @ref CCxPin_TypeDef + * @retval Timeout value + */ +uint32_t CAD_StateMachine(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeDef *pCCXX) +{ + CAD_HW_HandleTypeDef *_handle = &CAD_HW_Handles[PortNum]; + uint32_t _timing = CAD_DEFAULT_TIME; + + /* Set by default event to none */ + *pEvent = USBPD_CAD_EVENT_NONE; + + /* If a swap is on going, return default timing */ + if (USBPD_TRUE == Ports[PortNum].params->PE_SwapOngoing) + { + return _timing; + } + + if (_handle->CAD_ErrorRecoveryflag == USBPD_TRUE) + { + /* Force the state error recovery */ + _handle->CAD_ErrorRecoveryflag = USBPD_FALSE; + _handle->cstate = USBPD_CAD_STATE_ERRORRECOVERY; +#if defined(_TRACE) + USBPD_TRACE_Add(USBPD_TRACE_CAD_LOW, PortNum, (uint8_t)_handle->cstate, NULL, 0); +#endif /* _TRACE */ + } + + switch (_handle->cstate) + { + case USBPD_CAD_STATE_RESET: + { +#if !defined(_LOW_POWER) && !defined(USBPDM1_VCC_FEATURE_ENABLED) + /* Enable TypeCEvents Interrupts */ + LL_UCPD_EnableIT_TypeCEventCC2(Ports[PortNum].husbpd); + LL_UCPD_EnableIT_TypeCEventCC1(Ports[PortNum].husbpd); +#elif defined(_LOW_POWER) + /* If port role is source */ + if (USBPD_PORTPOWERROLE_SRC == Ports[PortNum].params->PE_PowerRole) + { + /* Enable TypeCEvents Interrupts */ + LL_UCPD_EnableIT_TypeCEventCC2(Ports[PortNum].husbpd); + LL_UCPD_EnableIT_TypeCEventCC1(Ports[PortNum].husbpd); + } +#endif /* !_LOW_POWER && !USBPDM1_VCC_FEATURE_ENABLED */ + + /* Enable IRQ */ + UCPD_INSTANCE0_ENABLEIRQ; +#if defined(_DRP) || defined(_ACCESSORY_SNK) + _handle->CAD_tToggle_start = HAL_GetTick(); +#endif /* _DRP || _ACCESSORY_SNK */ + _handle->cstate = USBPD_CAD_STATE_DETACHED; + break; + } + + case USBPD_CAD_STATE_ERRORRECOVERY : + { + /* Remove the resistor */ + /* Enter recovery = Switch to SRC with no resistor */ + USBPDM1_EnterErrorRecovery(PortNum); + + /* Forward detach event to DPM */ + Ports[PortNum].CCx = CCNONE; + *pCCXX = CCNONE; + _handle->cc = CCNONE; + *pEvent = USBPD_CAD_EVENT_DETACHED; + + /* Start tErrorRecovery timeout */ + _handle->CAD_tDebounce_start = HAL_GetTick(); + _timing = CAD_TERROR_RECOVERY_TIME; + _handle->cstate = USBPD_CAD_STATE_ERRORRECOVERY_EXIT; + break; + } + + case USBPD_CAD_STATE_ERRORRECOVERY_EXIT : + { + if ((HAL_GetTick() - _handle->CAD_tDebounce_start) > CAD_TERROR_RECOVERY_TIME) + { + /* Reconfigure the port + port source to src + port snk to snk + port drp to src */ + +#if defined(_SRC) || defined(_DRP) + if (USBPD_PORTPOWERROLE_SRC == Ports[PortNum].params->PE_PowerRole) + { + USBPDM1_AssertRp(PortNum); + } +#endif /* _SRC || _DRP */ +#if defined(_DRP) + else +#endif /* _DRP */ +#if defined(_SNK) || defined(_DRP) + { + USBPDM1_AssertRd(PortNum); + } +#endif /* _SNK || _DRP */ + /* Switch to state detach */ +#if defined(_DRP) || defined(_ACCESSORY_SNK) + _handle->CAD_tToggle_start = HAL_GetTick(); +#endif /* _DRP || _ACCESSORY_SNK */ + _handle->cstate = USBPD_CAD_STATE_DETACHED; + } + break; + } + + default: + { + /* Call the state machine corresponding to the port SNK or SRC or DRP */ + _timing = _handle->CAD_PtrStateMachine(PortNum, pEvent, pCCXX); + break; + } + } + +#if defined(_TRACE) + if (_handle->cstate != _handle->pstate) + { + _handle->pstate = _handle->cstate; + USBPD_TRACE_Add(USBPD_TRACE_CAD_LOW, PortNum, (uint8_t)_handle->cstate, NULL, 0); +#if defined(CAD_DEBUG_TRACE) + if (USBPD_PORTPOWERROLE_SRC == Ports[PortNum].params->PE_PowerRole) + { + USBPD_TRACE_Add(USBPD_TRACE_CAD_LOW, PortNum, (uint8_t)(0xC0 | _handle->CurrentHWcondition), NULL, 0); + } + else + { + USBPD_TRACE_Add(USBPD_TRACE_CAD_LOW, PortNum, + (uint8_t)(0x80 | (Ports[PortNum].params->SNKExposedRP_AtAttach << 4) | + _handle->CurrentHWcondition), NULL, 0); + } +#endif /* CAD_DEBUG_TRACE */ + } +#endif /* _TRACE */ + + return _timing; +} + +#else +/* USBPDCORE_LIB_NO_PD */ +/** + * @brief Main CAD State machine + * @param PortNum Port + * @param pEvent Pointer on CAD event based on @ref USBPD_CAD_EVENT + * @param pCCXX Pointer on CC Pin based on @ref CCxPin_TypeDef + * @retval Timeout value + */ +uint32_t CAD_StateMachine(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeDef *pCCXX) +{ + CAD_HW_HandleTypeDef *_handle = &CAD_HW_Handles[PortNum]; + uint32_t _timing = CAD_DEFAULT_TIME; + + /* Set by default event to none */ + *pEvent = USBPD_CAD_EVENT_NONE; + + switch (_handle->cstate) + { + case USBPD_CAD_STATE_RESET: + { +#ifndef _LOW_POWER + /* Enable TypeCEvents Interrupts */ + LL_UCPD_EnableIT_TypeCEventCC2(Ports[PortNum].husbpd); + LL_UCPD_EnableIT_TypeCEventCC1(Ports[PortNum].husbpd); +#else + /* If port role is source */ + if (USBPD_PORTPOWERROLE_SRC == Ports[PortNum].params->PE_PowerRole) + { + /* Enable TypeCEvents Interrupts */ + LL_UCPD_EnableIT_TypeCEventCC2(Ports[PortNum].husbpd); + LL_UCPD_EnableIT_TypeCEventCC1(Ports[PortNum].husbpd); + } +#endif /* !_LOW_POWER */ + + /* Enable IRQ */ + UCPD_INSTANCE0_ENABLEIRQ; +#if defined(_DRP) || defined(_ACCESSORY_SNK) + _handle->CAD_tToggle_start = HAL_GetTick(); +#endif /* _DRP || _ACCESSORY_SNK */ + _handle->cstate = USBPD_CAD_STATE_DETACHED; + break; + } + + default: + { + /* Call the state machine corresponding to the port SNK or SRC or DRP */ + _timing = _handle->CAD_PtrStateMachine(PortNum, pEvent, pCCXX); + break; + } + } + +#if defined(_TRACE) + if (_handle->cstate != _handle->pstate) + { + _handle->pstate = _handle->cstate; + USBPD_TRACE_Add(USBPD_TRACE_CAD_LOW, PortNum, (uint8_t)_handle->cstate, NULL, 0); +#if defined(CAD_DEBUG_TRACE) + if (USBPD_PORTPOWERROLE_SRC == Ports[PortNum].params->PE_PowerRole) + { + USBPD_TRACE_Add(USBPD_TRACE_CAD_LOW, PortNum, (uint8_t)(0xC0 | _handle->CurrentHWcondition), NULL, 0); + } + else + { + USBPD_TRACE_Add(USBPD_TRACE_CAD_LOW, PortNum, (uint8_t)(0x80 | + (Ports[PortNum].params->SNKExposedRP_AtAttach << 4) | + _handle->CurrentHWcondition), NULL, 0); + } +#endif /* CAD_DEBUG_TRACE */ + } +#endif /* _TRACE */ + + return _timing; +} +#endif /* !USBPDCORE_LIB_NO_PD */ + +/** + * @} + */ + +/** @addtogroup USBPD_DEVICE_CAD_HW_IF_Private_Functions + * @{ + */ + +#if defined(_DRP) || defined(_SNK) +/** + * @brief Check CCx HW condition + * @param PortNum Port + * @retval none + */ +void CAD_Check_HW_SNK(uint8_t PortNum) +{ + CAD_HW_HandleTypeDef *_handle = &CAD_HW_Handles[PortNum]; + /* Done to prevent code optimization issue with GCC */ + uint32_t CC1_value; + uint32_t CC2_value; + + /* + ---------------------------------------------------------------------------- + | ANAMODE | ANASUBMODE[1:0] | Notes | TYPEC_VSTATE_CCx[1:0] | + | | | | 00 | 01 | 10 | 11 | + ---------------------------------------------------------------------------- + | 0: Source | 00: Disabled |Disabled N/A | NA | + | | 01: Default USB Rp| |vRaDef|vRdDef|vOPENDef| | + | | 10: 1.5A Rp | |vRa1.5|vRd1.5|vOPEN1.5| NA | + | | 11: 3.0A Rp | |vRa3.0|vRd3.0|vOPEN3.0| NA | + ----------------------------------------------------------------------------- + | 1: Sink | | |xx vRa|vRdUSB| vRd1.5 |vRd3.0| + ----------------------------------------------------------------------------- + */ + +#if defined(_LOW_POWER) || defined(USBPDM1_VCC_FEATURE_ENABLED) + /* Enable type C state machine */ + CLEAR_BIT(Ports[PortNum].husbpd->CR, UCPD_CR_CC1TCDIS | UCPD_CR_CC2TCDIS); + + for (int32_t index = 0; index < CAD_DELAY_READ_CC_STATUS; index++) + { + __DSB(); + }; + + /* Read the CC line */ + CC1_value = Ports[PortNum].husbpd->SR & UCPD_SR_TYPEC_VSTATE_CC1; + CC2_value = Ports[PortNum].husbpd->SR & UCPD_SR_TYPEC_VSTATE_CC2; + + /* Disable the C state machine */ + SET_BIT(Ports[PortNum].husbpd->CR, UCPD_CR_CC1TCDIS | UCPD_CR_CC2TCDIS); +#else + CC1_value = Ports[PortNum].husbpd->SR & UCPD_SR_TYPEC_VSTATE_CC1; + CC2_value = Ports[PortNum].husbpd->SR & UCPD_SR_TYPEC_VSTATE_CC2; +#endif /* _LOW_POWER || USBPDM1_VCC_FEATURE_ENABLED */ + + _handle->cc = CCNONE; + _handle->CurrentHWcondition = HW_Detachment; + + if ((CC1_value != LL_UCPD_SNK_CC1_VOPEN) && (CC2_value == LL_UCPD_SNK_CC2_VOPEN)) + { + _handle->CurrentHWcondition = HW_Attachment; + _handle->cc = CC1; + Ports[PortNum].params->SNKExposedRP_AtAttach = CC1_value >> UCPD_SR_TYPEC_VSTATE_CC1_Pos; + } + + if ((CC1_value == LL_UCPD_SNK_CC1_VOPEN) && (CC2_value != LL_UCPD_SNK_CC2_VOPEN)) + { + _handle->CurrentHWcondition = HW_Attachment; + _handle->cc = CC2; + Ports[PortNum].params->SNKExposedRP_AtAttach = CC2_value >> UCPD_SR_TYPEC_VSTATE_CC2_Pos;; + } +} +#endif /* _DRP || _SNK */ + +#if defined(_DRP) || defined(_SRC) +/** + * @brief Check CCx HW condition + * @param PortNum Port + * @retval none + */ +void CAD_Check_HW_SRC(uint8_t PortNum) +{ +#if !defined(_RTOS) + uint32_t CC1_value_temp; + uint32_t CC2_value_temp; +#endif /* !_RTOS */ + CAD_HW_HandleTypeDef *_handle = &CAD_HW_Handles[PortNum]; + /* Done to prevent code optimization issue with GCC */ + uint32_t CC1_value; + uint32_t CC2_value; + + /* + ---------------------------------------------------------------------------- + | ANAMODE | ANASUBMODE[1:0] | Notes | TYPEC_VSTATE_CCx[1:0] | + | | | | 00 | 01 | 10 | 11 | + ---------------------------------------------------------------------------- + | 0: Source | 00: Disabled |Disabled N/A | NA | + | | 01: Default USB Rp| |vRaDef|vRdDef|vOPENDef| | + | | 10: 1.5A Rp | |vRa1.5|vRd1.5|vOPEN1.5| NA | + | | 11: 3.0A Rp | |vRa3.0|vRd3.0|vOPEN3.0| NA | + ----------------------------------------------------------------------------- + | 1: Sink | | |xx vRa|vRdUSB| vRd1.5 |vRd3.0| + ----------------------------------------------------------------------------- + */ +#if defined(_LOW_POWER) || defined(USBPDM1_VCC_FEATURE_ENABLED) + /* Enable type C state machine */ + CLEAR_BIT(Ports[PortNum].husbpd->CR, UCPD_CR_CC1TCDIS | UCPD_CR_CC2TCDIS); + + for (int32_t index = 0; index < CAD_DELAY_READ_CC_STATUS; index++) + { + __DSB(); + }; + + /* Read the CC line */ + CC1_value = (Ports[PortNum].husbpd->SR & UCPD_SR_TYPEC_VSTATE_CC1) >> UCPD_SR_TYPEC_VSTATE_CC1_Pos; + CC2_value = (Ports[PortNum].husbpd->SR & UCPD_SR_TYPEC_VSTATE_CC2) >> UCPD_SR_TYPEC_VSTATE_CC2_Pos; + + /* Disable the C state machine */ + SET_BIT(Ports[PortNum].husbpd->CR, UCPD_CR_CC1TCDIS | UCPD_CR_CC2TCDIS); +#else + CC1_value = (Ports[PortNum].husbpd->SR & UCPD_SR_TYPEC_VSTATE_CC1) >> UCPD_SR_TYPEC_VSTATE_CC1_Pos; + CC2_value = (Ports[PortNum].husbpd->SR & UCPD_SR_TYPEC_VSTATE_CC2) >> UCPD_SR_TYPEC_VSTATE_CC2_Pos; +#endif /* _LOW_POWER || USBPDM1_VCC_FEATURE_ENABLED */ + +#if !defined(_RTOS) + /* Workaround linked to issue with Ellisys test TD.PC.E5 + - it seems that in NRTOS version, we detect a glitch during DRP transition SNK to SRC */ + CC1_value_temp = (Ports[PortNum].husbpd->SR & UCPD_SR_TYPEC_VSTATE_CC1) >> UCPD_SR_TYPEC_VSTATE_CC1_Pos; + CC2_value_temp = (Ports[PortNum].husbpd->SR & UCPD_SR_TYPEC_VSTATE_CC2) >> UCPD_SR_TYPEC_VSTATE_CC2_Pos; + if ((CC1_value_temp != CC1_value) || (CC2_value_temp != CC2_value)) + { + return; + } +#endif /* !_RTOS */ + + const CCxPin_TypeDef table_cc[] = + { + CCNONE, CC2, CC2, + CC1, CCNONE, CC1, + CC1, CC2, CCNONE + }; + + const CAD_HW_Condition_TypeDef table_CurrentHWcondition[] = + { + HW_AudioAdapter_Attachment, HW_PwrCable_Sink_Attachment, HW_PwrCable_NoSink_Attachment, + HW_PwrCable_Sink_Attachment, HW_Debug_Attachment, HW_Attachment, + HW_PwrCable_NoSink_Attachment, HW_Attachment, HW_Detachment + }; + + if (CC1_value * 3 + CC2_value < 9) + { + _handle->cc = table_cc[CC1_value * 3 + CC2_value]; + _handle->CurrentHWcondition = table_CurrentHWcondition[CC1_value * 3 + CC2_value]; + } +} +#endif /* _DRP || _SRC */ + +#if defined(_DRP) || defined(_SNK) +/** + * @brief Manage the detached state for sink role + * @param PortNum Port + * @retval Timeout value + */ +static uint32_t ManageStateDetached_SNK(uint8_t PortNum) +{ + CAD_HW_HandleTypeDef *_handle = &CAD_HW_Handles[PortNum]; + uint32_t _timing = CAD_DEFAULT_TIME; + + CAD_Check_HW_SNK(PortNum); + /* Change the status on the basis of the HW event given by CAD_Check_HW() */ + if (_handle->CurrentHWcondition == HW_Detachment) + { +#if defined(_LOW_POWER) + /* Value returned by a SRC or a SINK */ + _timing = CAD_DETACH_POLLING; /* 100ms in the sink cases */ +#elif defined(USBPDM1_VCC_FEATURE_ENABLED) + _timing = CAD_DEFAULT_TIME; +#else + _timing = CAD_INFINITE_TIME; +#endif /* _LOW_POWER */ + +#if defined(_ACCESSORY_SNK) + if ((USBPD_TRUE == _handle->CAD_Accessory_SNK) +#if defined(USBPDCORE_VPD) + || (USBPD_TRUE == _handle->CAD_VPD_SNK) +#endif /* USBPDCORE_VPD */ + ) + { + /* A Sink with Accessory support shall transition to Unattached.Accessory within tDRPTransition + after the state of both the CC1 and CC2 pins is SNK.Open for tDRP - dcSRC.DRP * tDRP, or if directed.*/ + if ((HAL_GetTick() - _handle->CAD_tToggle_start) > CAD_ACCESSORY_TOGGLE) + { + _handle->cstate = USBPD_CAD_STATE_UNATTACHED_ACCESSORY; + _handle->CAD_tToggle_start = HAL_GetTick(); + USBPDM1_AssertRp(PortNum); + } + _timing = CAD_DEFAULT_TIME; + } +#endif /* _ACCESSORY_SNK */ + } + else + { + /* Get the time of this event */ + _handle->CAD_tDebounce_start = HAL_GetTick(); + _handle->cstate = USBPD_CAD_STATE_ATTACHED_WAIT; + + /* Temporary patch for test TD.PD 4.5.2 + rework for Patch TP.PD.C.E5 */ + HAL_Delay(1); + CAD_Check_HW_SNK(PortNum); + + if (_handle->CurrentHWcondition == HW_Detachment) + { + _handle->cstate = USBPD_CAD_STATE_DETACHED; + } + else + { + BSP_USBPD_PWR_VBUSInit(PortNum); + } + } + return _timing; +} +#endif /* _DRP || _SNK */ + +#if defined(_SRC) || defined(_DRP) +/** + * @brief Manage the detached state for source role + * @param PortNum Port + * @retval Timeout value + */ +static uint32_t ManageStateDetached_SRC(uint8_t PortNum) +{ + CAD_HW_HandleTypeDef *_handle = &CAD_HW_Handles[PortNum]; + uint32_t _timing = CAD_DEFAULT_TIME; + + if (_handle->CAD_ResistorUpdateflag == USBPD_TRUE) + { + /* Update the resistor value */ + USBPDM1_AssertRp(PortNum); + _handle->CAD_ResistorUpdateflag = USBPD_FALSE; + + /* Let time to internal state machine update */ + HAL_Delay(1); + } + + CAD_Check_HW_SRC(PortNum); + /* Change the status on the basis of the HW event given by CAD_Check_HW() */ + if (_handle->CurrentHWcondition == HW_Detachment) + { +#if defined(_LOW_POWER) + /* Value returned for a SRC */ + _timing = CAD_DETACH_POLLING; +#else + _timing = CAD_INFINITE_TIME; +#endif /* _LOW_POWER */ + } + else + { + if (_handle->CurrentHWcondition == HW_PwrCable_NoSink_Attachment) + { + _handle->cstate = USBPD_CAD_STATE_EMC; + } + else + { + /* Get the time of this event */ + _handle->CAD_tDebounce_start = HAL_GetTick(); + _handle->cstate = USBPD_CAD_STATE_ATTACHED_WAIT; + + BSP_USBPD_PWR_VBUSInit(PortNum); + } + } + return _timing; +} +#endif /* _SRC || _DRP */ + +#if defined(_DRP) +/** + * @brief Manage the detached state for dual role + * @param PortNum Port + * @retval Timeout value + */ +static uint32_t ManageStateDetached_DRP(uint8_t PortNum) +{ + CAD_HW_HandleTypeDef *_handle = &CAD_HW_Handles[PortNum]; + uint32_t _timing = CAD_DEFAULT_TIME; + + if (USBPD_PORTPOWERROLE_SRC == Ports[PortNum].params->PE_PowerRole) + { + ManageStateDetached_SRC(PortNum); + } + else + { + ManageStateDetached_SNK(PortNum); + } + + /* Manage the toggle */ + if (_handle->CurrentHWcondition == HW_Detachment) + { + switch (Ports[PortNum].params->PE_PowerRole) + { + case USBPD_PORTPOWERROLE_SRC : + if ((HAL_GetTick() - _handle->CAD_tToggle_start) > Ports[PortNum].settings->CAD_SRCToggleTime) + { + _handle->CAD_tToggle_start = HAL_GetTick(); + Ports[PortNum].params->PE_PowerRole = USBPD_PORTPOWERROLE_SNK; + Ports[PortNum].params->PE_DataRole = USBPD_PORTDATAROLE_UFP; + _timing = Ports[PortNum].settings->CAD_SNKToggleTime; + USBPDM1_AssertRd(PortNum); + } + break; + case USBPD_PORTPOWERROLE_SNK : + if ((HAL_GetTick() - _handle->CAD_tToggle_start) > Ports[PortNum].settings->CAD_SNKToggleTime) + { + _handle->CAD_tToggle_start = HAL_GetTick(); + Ports[PortNum].params->PE_PowerRole = USBPD_PORTPOWERROLE_SRC; + Ports[PortNum].params->PE_DataRole = USBPD_PORTDATAROLE_DFP; + _timing = Ports[PortNum].settings->CAD_SRCToggleTime; + USBPDM1_AssertRp(PortNum); + } + break; + default: + break; + } + } + + return _timing; +} +#endif /* _DRP */ + +#if defined(_DRP) || defined(_SRC) +/** + * @brief Manage the attached wait state for source role + * @param PortNum Port + * @param pEvent Pointer on CAD event based on @ref USBPD_CAD_EVENT + * @param pCCXX Pointer on CC Pin based on @ref CCxPin_TypeDef + * @retval Timeout value + */ +static uint32_t ManageStateAttachedWait_SRC(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeDef *pCCXX) +{ + CAD_HW_HandleTypeDef *_handle = &CAD_HW_Handles[PortNum]; + uint32_t _timing = CAD_DEFAULT_TIME; + + /* Evaluate elapsed time in Attach_Wait state */ + uint32_t CAD_tDebounce = HAL_GetTick() - _handle->CAD_tDebounce_start; + CAD_Check_HW_SRC(PortNum); + + if ((_handle->CurrentHWcondition != HW_Detachment) && (_handle->CurrentHWcondition != HW_PwrCable_NoSink_Attachment)) + { + if (USBPD_FALSE == USBPD_PWR_IF_GetVBUSStatus(PortNum, USBPD_PWR_BELOWVSAFE0V)) + { + /* Reset the timing because VBUS threshold not yet reach */ + _handle->CAD_tDebounce_start = HAL_GetTick(); + return CAD_TCCDEBOUNCE_THRESHOLD; + } + + /* Check tCCDebounce */ + if (CAD_tDebounce > CAD_TCCDEBOUNCE_THRESHOLD) + { + switch (_handle->CurrentHWcondition) + { + case HW_Attachment: + HW_SignalAttachement(PortNum, _handle->cc); + _handle->cstate = USBPD_CAD_STATE_ATTACHED; + *pEvent = USBPD_CAD_EVENT_ATTACHED; + *pCCXX = _handle->cc; + break; + + case HW_PwrCable_Sink_Attachment: + HW_SignalAttachement(PortNum, _handle->cc); + _handle->cstate = USBPD_CAD_STATE_ATTEMC; + *pEvent = USBPD_CAD_EVENT_ATTEMC; + break; + + case HW_PwrCable_NoSink_Attachment: + BSP_USBPD_PWR_VBUSDeInit(PortNum); + _handle->cstate = USBPD_CAD_STATE_EMC; + *pEvent = USBPD_CAD_EVENT_EMC; + *pCCXX = _handle->cc; + break; + +#if defined(_ACCESSORY_SRC) + case HW_Debug_Attachment: + _handle->cstate = USBPD_CAD_STATE_DEBUG; + *pEvent = USBPD_CAD_EVENT_DEBUG; + break; + + case HW_AudioAdapter_Attachment: + _handle->cstate = USBPD_CAD_STATE_ACCESSORY; + *pEvent = USBPD_CAD_EVENT_ACCESSORY; + break; +#endif /* _ACCESSORY_SRC */ + + case HW_Detachment: + default: +#if !defined(_ACCESSORY_SRC) + _handle->cstate = USBPD_CAD_STATE_DETACH_SRC; +#endif /* _ACCESSORY_SRC */ + break; + } /* End of switch */ + *pCCXX = _handle->cc; + _timing = CAD_DEFAULT_TIME; + } + /* Reset the flag for CAD_tDebounce */ + _handle->CAD_tDebounce_flag = USBPD_FALSE; + } + else /* CAD_HW_Condition[PortNum] = HW_Detachment */ + { + /* Start counting of CAD_tDebounce */ + if (USBPD_FALSE == _handle->CAD_tDebounce_flag) + { + _handle->CAD_tDebounce_start = HAL_GetTick(); + _handle->CAD_tDebounce_flag = USBPD_TRUE; + _timing = CAD_TSRCDISCONNECT_THRESHOLD; + } + else /* CAD_tDebounce already running */ + { + /* Evaluate CAD_tDebounce */ + CAD_tDebounce = HAL_GetTick() - _handle->CAD_tDebounce_start; + if (CAD_tDebounce > CAD_TSRCDISCONNECT_THRESHOLD) + { + _handle->CAD_tDebounce_flag = USBPD_FALSE; + _handle->cstate = USBPD_CAD_STATE_DETACH_SRC; + _timing = 0; + } + } + } + return _timing; +} +#endif /* _DRP || _SRC || (_ACCESSORY && _SNK) */ + +#if defined(_DRP) || defined(_SRC) +static uint32_t ManageStateEMC(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeDef *pCCXX) +{ + uint32_t _timing = CAD_INFINITE_TIME; + CAD_HW_HandleTypeDef *_handle = &CAD_HW_Handles[PortNum]; + + CAD_Check_HW_SRC(PortNum); + /* Change the status on the basis of the HW event given by CAD_Check_HW() */ + switch (_handle->CurrentHWcondition) + { + case HW_Detachment : + _handle->cstate = USBPD_CAD_STATE_SWITCH_TO_SNK; + _timing = 1; + break; + case HW_PwrCable_Sink_Attachment: + case HW_Attachment : + _handle->cstate = USBPD_CAD_STATE_ATTACHED_WAIT; + _handle->CAD_tDebounce_start = HAL_GetTick() - 5u; /* This is only to check cable presence */ + BSP_USBPD_PWR_VBUSInit(PortNum); + _timing = CAD_DEFAULT_TIME; + break; + case HW_PwrCable_NoSink_Attachment: + default : + /* Nothing to do still the same status */ +#if defined(_DRP) + if (USBPD_TRUE == Ports[PortNum].settings->CAD_RoleToggle) + { + if ((HAL_GetTick() - _handle->CAD_tToggle_start) > Ports[PortNum].settings->CAD_SRCToggleTime) + { + _handle->cstate = USBPD_CAD_STATE_SWITCH_TO_SNK; + } + _timing = 0; + } +#else + _timing = CAD_DEFAULT_TIME; +#endif /* _DRP */ + break; + } + return _timing; +} +#endif /* _DRP || _SRC */ + +#if defined(_DRP) +/** + * @brief Manage the attached state for dual role + * @param PortNum Port + * @param pEvent Pointer on CAD event based on @ref USBPD_CAD_EVENT + * @param pCCXX Pointer on CC Pin based on @ref CCxPin_TypeDef + * @retval Timeout value + */ +static uint32_t ManageStateAttached_DRP(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeDef *pCCXX) +{ + if (USBPD_PORTPOWERROLE_SRC == Ports[PortNum].params->PE_PowerRole) + { + return ManageStateAttached_SRC(PortNum, pEvent, pCCXX); + } + CAD_HW_HandleTypeDef *_handle = &CAD_HW_Handles[PortNum]; + uint32_t _timing = ManageStateAttached_SNK(PortNum, pEvent, pCCXX); + + /* Toggle management */ + if (_handle->CurrentHWcondition == HW_Detachment) + { + _handle->cstate = USBPD_CAD_STATE_SWITCH_TO_SRC; + _timing = 0; + } + return _timing; +} +#endif /* _DRP */ + +#if defined(_DRP) || (defined(_ACCESSORY) && defined(_SNK)) +/** + * @brief Manage the attached wait state for dual role + * @param PortNum Port + * @param pEvent Pointer on CAD event based on @ref USBPD_CAD_EVENT + * @param pCCXX Pointer on CC Pin based on @ref CCxPin_TypeDef + * @retval Timeout value + */ +static uint32_t ManageStateAttachedWait_DRP(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeDef *pCCXX) +{ + if (USBPD_PORTPOWERROLE_SRC == Ports[PortNum].params->PE_PowerRole) + { + return ManageStateAttachedWait_SRC(PortNum, pEvent, pCCXX); + } + return ManageStateAttachedWait_SNK(PortNum, pEvent, pCCXX); +} +#endif /* _DRP || (_ACCESSORY && _SNK) */ + +#if defined(_SRC) || defined(_DRP) +/** + * @brief Manage the attached state for source role + * @param PortNum Port + * @param pEvent Pointer on CAD event based on @ref USBPD_CAD_EVENT + * @param pCCXX Pointer on CC Pin based on @ref CCxPin_TypeDef + * @retval Timeout value + */ +static uint32_t ManageStateAttached_SRC(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeDef *pCCXX) +{ +#if defined(_LOW_POWER) || defined(USBPDM1_VCC_FEATURE_ENABLED) + /* Enable type C state machine */ + CLEAR_BIT(Ports[PortNum].husbpd->CR, UCPD_CR_CC1TCDIS | UCPD_CR_CC2TCDIS); + + for (int32_t index = 0; index < CAD_DELAY_READ_CC_STATUS; index++) + { + __DSB(); + }; +#endif /* _LOW_POWER || USBPDM1_VCC_FEATURE_ENABLED */ + CAD_HW_HandleTypeDef *_handle = &CAD_HW_Handles[PortNum]; + uint32_t _timing = CAD_DEFAULT_TIME; + + uint32_t ccx = (Ports[PortNum].CCx == CC1) ? (Ports[PortNum].husbpd->SR & UCPD_SR_TYPEC_VSTATE_CC1) : + (Ports[PortNum].husbpd->SR & UCPD_SR_TYPEC_VSTATE_CC2); + uint32_t comp = (Ports[PortNum].CCx == CC1) ? LL_UCPD_SRC_CC1_VRD : LL_UCPD_SRC_CC2_VRD; + + /* Check if CC lines is opened or switch to debug accessory */ + if (comp != ccx) + { + /* Start counting of CAD_tDebounce */ + if (USBPD_FALSE == _handle->CAD_tDebounce_flag) + { + _handle->CAD_tDebounce_flag = USBPD_TRUE; + _handle->CAD_tDebounce_start = HAL_GetTick(); + _timing = CAD_TSRCDISCONNECT_THRESHOLD; + } + else /* CAD_tDebounce already running */ + { + /* Evaluate CAD_tDebounce */ + uint32_t CAD_tDebounce = HAL_GetTick() - _handle->CAD_tDebounce_start; + if (CAD_tDebounce > CAD_TSRCDISCONNECT_THRESHOLD) + { + HW_SignalDetachment(PortNum); +#ifdef _DRP + if (USBPD_TRUE == Ports[PortNum].settings->CAD_RoleToggle) + { + USBPDM1_AssertRd(PortNum); + } +#endif /* _DRP */ + _handle->CAD_tDebounce_flag = USBPD_FALSE; + /* Move inside state DETACH to avoid wrong VCONN level*/ + _handle->cstate = USBPD_CAD_STATE_DETACH_SRC; + *pEvent = USBPD_CAD_EVENT_DETACHED; + *pCCXX = CCNONE; + _timing = 0; + } + } + } + else + { + /* Reset tPDDebounce flag*/ + _handle->CAD_tDebounce_flag = USBPD_FALSE; +#if defined(_LOW_POWER) + _timing = CAD_VBUS_POLLING_TIME; +#else + _timing = CAD_INFINITE_TIME; +#endif /* _LOW_POWER */ + } + + return _timing; +} +#endif /* _SRC || _DRP */ + +#if defined(_SNK) || defined(_DRP) +/** + * @brief Manage the attached wait state for sink role + * @param PortNum Port + * @param pEvent Pointer on CAD event based on @ref USBPD_CAD_EVENT + * @param pCCXX Pointer on CC Pin based on @ref CCxPin_TypeDef + * @retval Timeout value + */ +static uint32_t ManageStateAttachedWait_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeDef *pCCXX) +{ + CAD_HW_HandleTypeDef *_handle = &CAD_HW_Handles[PortNum]; + uint32_t _timing = CAD_DEFAULT_TIME; + + uint32_t CAD_tDebounce = HAL_GetTick() - _handle->CAD_tDebounce_start; + CAD_Check_HW_SNK(PortNum); + if (_handle->CurrentHWcondition == HW_Attachment) + { + if (CAD_tDebounce > CAD_TCCDEBOUNCE_THRESHOLD) + { + if (USBPD_TRUE == USBPD_PWR_IF_GetVBUSStatus(PortNum, USBPD_PWR_VSAFE5V)) /* Check if Vbus is on */ + { + HW_SignalAttachement(PortNum, _handle->cc); + /* Go to attached state */ + _handle->cstate = USBPD_CAD_STATE_ATTACHED; + *pEvent = USBPD_CAD_EVENT_ATTACHED; + *pCCXX = _handle->cc; + } + } + _handle->CAD_tDebounce_flag = USBPD_FALSE; + } + else + { + /* Start counting of CAD_tDebounce */ + if (USBPD_FALSE == _handle->CAD_tDebounce_flag) + { + _handle->CAD_tDebounce_start = HAL_GetTick(); + _handle->CAD_tDebounce_flag = USBPD_TRUE; + _timing = CAD_TPDDEBOUNCE_THRESHOLD; + } + else /* CAD_tDebounce already running */ + { + /* Evaluate CAD_tDebounce */ + if ((HAL_GetTick() - _handle->CAD_tDebounce_start > CAD_TPDDEBOUNCE_THRESHOLD)) + { + _handle->CAD_tDebounce_flag = USBPD_FALSE; + _handle->cstate = USBPD_CAD_STATE_DETACHED; + BSP_USBPD_PWR_VBUSDeInit(PortNum); +#if defined(_ACCESSORY_SNK) + if (USBPD_TRUE == _handle->CAD_Accessory_SNK) + { + _handle->CAD_tToggle_start = HAL_GetTick(); + } +#endif /* _ACCESSORY_SNK */ + } + } + } + return _timing; +} + +/** + * @brief Manage the attached state for sink role + * @param PortNum Port + * @param pEvent Pointer on CAD event based on @ref USBPD_CAD_EVENT + * @param pCCXX Pointer on CC Pin based on @ref CCxPin_TypeDef + * @retval Timeout value + */ +static uint32_t ManageStateAttached_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeDef *pCCXX) +{ + CAD_HW_HandleTypeDef *_handle = &CAD_HW_Handles[PortNum]; + uint32_t _timing = CAD_DEFAULT_TIME; + + uint32_t ccx; + uint32_t comp = (Ports[PortNum].CCx == CC1) ? LL_UCPD_SNK_CC1_VOPEN : LL_UCPD_SNK_CC2_VOPEN; + +#if defined(_LOW_POWER) || defined(USBPDM1_VCC_FEATURE_ENABLED) + /* Enable type C state machine */ + CLEAR_BIT(Ports[PortNum].husbpd->CR, UCPD_CR_CC1TCDIS | UCPD_CR_CC2TCDIS); + + for (int32_t index = 0; index < CAD_DELAY_READ_CC_STATUS; index++) + { + __DSB(); + }; +#endif /* _LOW_POWER || USBPDM1_VCC_FEATURE_ENABLED */ + + ccx = (Ports[PortNum].CCx == CC1) ? (Ports[PortNum].husbpd->SR & UCPD_SR_TYPEC_VSTATE_CC1) + : (Ports[PortNum].husbpd->SR & UCPD_SR_TYPEC_VSTATE_CC2); + if ((USBPD_TRUE == USBPD_PWR_IF_GetVBUSStatus(PortNum, + USBPD_PWR_SNKDETACH)) /* Check if Vbus is below disconnect threshold */ + && + (comp == ccx) /* Confirm that there is no RP */ + ) + { + HW_SignalDetachment(PortNum); + /* Restart the toggle time */ + _handle->CurrentHWcondition = HW_Detachment; + _handle->cstate = USBPD_CAD_STATE_DETACHED; +#if defined(_ACCESSORY_SNK) + if (USBPD_TRUE == _handle->CAD_Accessory_SNK) + { + _handle->CAD_tToggle_start = HAL_GetTick(); + } +#endif /* _ACCESSORY_SNK */ + *pEvent = USBPD_CAD_EVENT_DETACHED; + *pCCXX = CCNONE; + _timing = 0; + } + else + { + _timing = CAD_VBUS_POLLING_TIME; + } + +#if defined(_LOW_POWER) || defined(USBPDM1_VCC_FEATURE_ENABLED) + /* Disable type C state machine */ + SET_BIT(Ports[PortNum].husbpd->CR, UCPD_CR_CC1TCDIS | UCPD_CR_CC2TCDIS); +#endif /* _LOW_POWER || USBPDM1_VCC_FEATURE_ENABLED */ + + return _timing; +} +#endif /* _SNK || _DRP */ + +#if defined(TCPP0203_SUPPORT) +/** + * @brief VBUS detect callback + * @param PortNum Port + * @param VBUSConnectionStatus VBUS connection status, based on @ref USBPD_PWR_VBUSConnectionStatusTypeDef + * @retval None + */ +void CAD_HW_IF_VBUSDetectCallback(uint32_t PortNum, + USBPD_PWR_VBUSConnectionStatusTypeDef VBUSConnectionStatus) +{ + /* If VBUS is connected */ + if (VBUSConnectionStatus == VBUS_CONNECTED) + { +#if defined(_TRACE) + USBPD_TRACE_Add(USBPD_TRACE_DEBUG, PortNum, 0, + (uint8_t *)"-- USBPD_PWR_VBUSDetectCallback : VBUS_CONNECTED --", 51); +#endif /* _TRACE */ + } + else + { +#if defined(_TRACE) + USBPD_TRACE_Add(USBPD_TRACE_DEBUG, PortNum, 0, + (uint8_t *)"-- USBPD_PWR_VBUSDetectCallback : VBUS_NOT_CONNECTED --", 55); +#endif /* _TRACE */ + + /* VBUS_NOT_CONNECTED indications could be caused by false OCP/OVP errors detected at BSP level. + If reported here, it is assumed that it might be possible to recover from error. + If error could not be recovered, or is assumed to be related to a true safety issue, it will not be notified + by BSP */ +#if defined(USBPDCORE_LIB_NO_PD) + CAD_HW_HandleTypeDef *_handle = &CAD_HW_Handles[PortNum]; + + /* VBUS_NOT_CONNECTED indication management in case of NO_PD configuration */ + if (Ports[PortNum].params->PE_PowerRole == USBPD_PORTPOWERROLE_SRC) + { + /* Current role is SRC when VBUS_NOT_CONNECTED signal is received */ + HW_SignalDetachment(PortNum); + _handle->CAD_tDebounce_flag = USBPD_FALSE; + _handle->cstate = USBPD_CAD_STATE_DETACH_SRC; + } + else + { + /* Current role is SNK when VBUS_NOT_CONNECTED signal is received */ + HW_SignalDetachment(PortNum); + _handle->CurrentHWcondition = HW_Detachment; + _handle->cstate = USBPD_CAD_STATE_DETACHED; + } +#else + /* VBUS_NOT_CONNECTED indication management : Error has to be handled through a Detach/Attach procedure. + Handled using ErrorRecovery mechanism */ + CAD_Enter_ErrorRecovery(PortNum); +#endif /* USBPDCORE_LIB_NO_PD */ + } +} +#endif /* TCPP0203_SUPPORT */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + Index: /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_hw.c =================================================================== --- /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_hw.c (revision 60) +++ /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_hw.c (revision 60) @@ -0,0 +1,120 @@ +/** + ****************************************************************************** + * @file usbpd_phy_hw_if.c + * @author MCD Application Team + * @brief This file contains phy interface control functions. + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +#define USBPD_HW_C +/* Includes ------------------------------------------------------------------*/ +#include "usbpd_devices_conf.h" +#include "usbpd_hw.h" + +/* Private typedef -----------------------------------------------------------*/ +/* Variable containing ADC conversions results */ +/* Private function prototypes -----------------------------------------------*/ +/* Private functions ---------------------------------------------------------*/ + +UCPD_TypeDef *USBPD_HW_GetUSPDInstance(uint8_t PortNum) +{ + return UCPD_INSTANCE0; +} + +#if !defined(USBPDCORE_LIB_NO_PD) +DMA_Channel_TypeDef *USBPD_HW_Init_DMARxInstance(uint8_t PortNum) +{ + LL_DMA_InitTypeDef DMA_InitStruct; + + /* Initialise the DMA */ + LL_DMA_StructInit(&DMA_InitStruct); + DMA_InitStruct.Direction = LL_DMA_DIRECTION_PERIPH_TO_MEMORY; + DMA_InitStruct.Mode = LL_DMA_MODE_NORMAL; + DMA_InitStruct.PeriphOrM2MSrcIncMode = LL_DMA_PERIPH_NOINCREMENT; + DMA_InitStruct.MemoryOrM2MDstIncMode = LL_DMA_MEMORY_INCREMENT; + DMA_InitStruct.PeriphOrM2MSrcDataSize = LL_DMA_PDATAALIGN_BYTE; + DMA_InitStruct.MemoryOrM2MDstDataSize = LL_DMA_MDATAALIGN_BYTE; + DMA_InitStruct.NbData = 0; + DMA_InitStruct.MemoryOrM2MDstAddress = 0x0; + DMA_InitStruct.PeriphOrM2MSrcAddress = 0x0; + DMA_InitStruct.Priority = LL_DMA_PRIORITY_HIGH; + + /* Enable the clock */ + UCPDDMA_INSTANCE0_CLOCKENABLE_RX; + + /* Initialise the DMA */ + DMA_InitStruct.PeriphRequest = UCPDDMA_INSTANCE0_REQUEST_RX; + + (void)LL_DMA_Init(UCPDDMA_INSTANCE0_DMA_RX, UCPDDMA_INSTANCE0_LL_CHANNEL_RX, &DMA_InitStruct); + return UCPDDMA_INSTANCE0_CHANNEL_RX; +} + +void USBPD_HW_DeInit_DMARxInstance(uint8_t PortNum) +{ + (void)PortNum; +} + +DMA_Channel_TypeDef *USBPD_HW_Init_DMATxInstance(uint8_t PortNum) +{ + LL_DMA_InitTypeDef DMA_InitStruct; + + /* Initialise the DMA */ + LL_DMA_StructInit(&DMA_InitStruct); + DMA_InitStruct.Direction = LL_DMA_DIRECTION_MEMORY_TO_PERIPH; + DMA_InitStruct.Mode = LL_DMA_MODE_NORMAL; + DMA_InitStruct.PeriphOrM2MSrcIncMode = LL_DMA_PERIPH_NOINCREMENT; + DMA_InitStruct.MemoryOrM2MDstIncMode = LL_DMA_MEMORY_INCREMENT; + DMA_InitStruct.PeriphOrM2MSrcDataSize = LL_DMA_PDATAALIGN_BYTE; + DMA_InitStruct.MemoryOrM2MDstDataSize = LL_DMA_MDATAALIGN_BYTE; + DMA_InitStruct.NbData = 0; + DMA_InitStruct.MemoryOrM2MDstAddress = 0x0; + DMA_InitStruct.PeriphOrM2MSrcAddress = 0x0; + + /* Enable the clock */ + UCPDDMA_INSTANCE0_CLOCKENABLE_TX; + + DMA_InitStruct.PeriphRequest = UCPDDMA_INSTANCE0_REQUEST_TX; + DMA_InitStruct.Priority = LL_DMA_PRIORITY_MEDIUM; + (void)LL_DMA_Init(UCPDDMA_INSTANCE0_DMA_TX, UCPDDMA_INSTANCE0_LL_CHANNEL_TX, &DMA_InitStruct); + return UCPDDMA_INSTANCE0_CHANNEL_TX; +} + +void USBPD_HW_DeInit_DMATxInstance(uint8_t PortNum) +{ + (void)PortNum; +} +#endif /* !USBPDCORE_LIB_NO_PD */ + +uint32_t USBPD_HW_GetRpResistorValue(uint8_t PortNum) +{ + (void)PortNum; + return LL_UCPD_RESISTOR_3_0A; +} + +void USBPD_HW_SetFRSSignalling(uint8_t PortNum, uint8_t cc) +{ + (void)PortNum; + + /* Configure FRSTX GPIO */ + if (1u == cc) + { + /* FRS_TX common */ + UCPDFRS_INSTANCE0_FRSCC1; + } + else + { + /* FRS_TX common */ + UCPDFRS_INSTANCE0_FRSCC2; + } +} + Index: /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_hw_if_it.c =================================================================== --- /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_hw_if_it.c (revision 60) +++ /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_hw_if_it.c (revision 60) @@ -0,0 +1,219 @@ +/** + ****************************************************************************** + * @file usbpd_hw_if_it.c + * @author MCD Application Team + * @brief This file contains HW interface interrupt routines. + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "usbpd_devices_conf.h" +#include "usbpd_core.h" +#include "usbpd_hw_if.h" +#include "usbpd_trace.h" +#if defined(_LOW_POWER) +#include "usbpd_lowpower.h" +#endif /* _LOW_POWER */ +#if defined(_FRS) +#include "usbpd_timersserver.h" +#endif /* _FRS */ + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +/* Private macro -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/* Private function prototypes -----------------------------------------------*/ +/* Private functions ---------------------------------------------------------*/ +void PORTx_IRQHandler(uint8_t PortNum); + +void USBPD_PORT0_IRQHandler(void) +{ + PORTx_IRQHandler(USBPD_PORT_0); +} + +void PORTx_IRQHandler(uint8_t PortNum) +{ + UCPD_TypeDef *hucpd = Ports[PortNum].husbpd; + uint32_t _interrupt = LL_UCPD_ReadReg(hucpd, SR); + static uint8_t ovrflag = 0; + + if ((hucpd->IMR & _interrupt) != 0u) + { + /* TXIS no need to enable it all the transfer are done by DMA */ + if (UCPD_SR_TXMSGDISC == (_interrupt & UCPD_SR_TXMSGDISC)) + { + /* Message has been discarded */ + LL_UCPD_ClearFlag_TxMSGDISC(hucpd); + CLEAR_BIT(Ports[PortNum].hdmatx->CCR, DMA_CCR_EN); + while ((Ports[PortNum].hdmatx->CCR & DMA_CCR_EN) == DMA_CCR_EN); + Ports[PortNum].cbs.USBPD_HW_IF_TxCompleted(PortNum, 1); + return; + } + + if (UCPD_SR_TXMSGSENT == (_interrupt & UCPD_SR_TXMSGSENT)) + { + /* Message has been fully transferred */ + LL_UCPD_ClearFlag_TxMSGSENT(hucpd); + CLEAR_BIT(Ports[PortNum].hdmatx->CCR, DMA_CCR_EN); + while ((Ports[PortNum].hdmatx->CCR & DMA_CCR_EN) == DMA_CCR_EN); + Ports[PortNum].cbs.USBPD_HW_IF_TxCompleted(PortNum, 0); + +#if defined(_LOW_POWER) + UTIL_LPM_SetStopMode(0 == PortNum ? LPM_PE_0 : LPM_PE_1, UTIL_LPM_ENABLE); +#endif /* _LOW_POWER */ + return; + } + + if (UCPD_SR_TXMSGABT == (_interrupt & UCPD_SR_TXMSGABT)) + { + LL_UCPD_ClearFlag_TxMSGABT(hucpd); + CLEAR_BIT(Ports[PortNum].hdmatx->CCR, DMA_CCR_EN); + while ((Ports[PortNum].hdmatx->CCR & DMA_CCR_EN) == DMA_CCR_EN); + Ports[PortNum].cbs.USBPD_HW_IF_TxCompleted(PortNum, 2); + return; + } + + /* HRSTDISC : hard reset sending has been discarded */ + if (UCPD_SR_HRSTDISC == (_interrupt & UCPD_SR_HRSTDISC)) + { + LL_UCPD_ClearFlag_TxHRSTDISC(hucpd); + return; + } + + /* TXUND : tx underrun detected */ + if (UCPD_SR_HRSTSENT == (_interrupt & UCPD_SR_HRSTSENT)) + { + /* Answer not expected by the stack */ + LL_UCPD_ClearFlag_TxHRSTSENT(hucpd); + Ports[PortNum].cbs.USBPD_HW_IF_TX_HardResetCompleted(PortNum, USBPD_SOPTYPE_HARD_RESET); + return; + } + + /* TXUND : tx underrun detected */ + if (UCPD_SR_TXUND == (_interrupt & UCPD_SR_TXUND)) + { + /* Nothing to do. + The port partner checks the message integrity with CRC, so PRL will repeat the sending. + Can be used for debugging purpose */ + LL_UCPD_ClearFlag_TxUND(hucpd); + return; + } + + /* RXNE : not needed the stack only perform transfer by DMA */ + /* RXORDDET: not needed so stack will not enabled this interrupt */ + if (UCPD_SR_RXORDDET == (_interrupt & UCPD_SR_RXORDDET)) + { + if (LL_UCPD_RXORDSET_CABLE_RESET == hucpd->RX_ORDSET) + { + /* Cable reset detected */ + Ports[PortNum].cbs.USBPD_HW_IF_RX_ResetIndication(PortNum, USBPD_SOPTYPE_CABLE_RESET); + } + LL_UCPD_ClearFlag_RxOrderSet(hucpd); +#if defined(_LOW_POWER) + UTIL_LPM_SetStopMode(0 == PortNum ? LPM_PE_0 : LPM_PE_1, UTIL_LPM_DISABLE); +#endif /* _LOW_POWER */ + + /* Forbid message sending */ + Ports[PortNum].RXStatus = USBPD_TRUE; + return; + } + + /* Check RXHRSTDET */ + if (UCPD_SR_RXHRSTDET == (_interrupt & UCPD_SR_RXHRSTDET)) + { + Ports[PortNum].cbs.USBPD_HW_IF_RX_ResetIndication(PortNum, USBPD_SOPTYPE_HARD_RESET); + LL_UCPD_ClearFlag_RxHRST(hucpd); + return; + } + + /* Check RXOVR */ + if (UCPD_SR_RXOVR == (_interrupt & UCPD_SR_RXOVR)) + { + /* Nothing to do, the message will be discarded and port Partner will try sending again. */ + ovrflag = 1; + LL_UCPD_ClearFlag_RxOvr(hucpd); + return; + } + + /* Check RXMSGEND an Rx message has been received */ + if (UCPD_SR_RXMSGEND == (_interrupt & UCPD_SR_RXMSGEND)) + { + Ports[PortNum].RXStatus = USBPD_FALSE; + + /* For DMA mode, add a check to ensure the number of data received matches + the number of data received by UCPD */ + LL_UCPD_ClearFlag_RxMsgEnd(hucpd); + + /* Disable DMA */ + CLEAR_BIT(Ports[PortNum].hdmarx->CCR, DMA_CCR_EN); + while ((Ports[PortNum].hdmarx->CCR & DMA_CCR_EN) == DMA_CCR_EN); + + /* Ready for next transaction */ + WRITE_REG(Ports[PortNum].hdmarx->CMAR, (uint32_t)Ports[PortNum].ptr_RxBuff); + WRITE_REG(Ports[PortNum].hdmarx->CNDTR, SIZE_MAX_PD_TRANSACTION_UNCHUNK); + + /* Enable the DMA */ + SET_BIT(Ports[PortNum].hdmarx->CCR, DMA_CCR_EN); +#if defined(_LOW_POWER) + UTIL_LPM_SetStopMode(0 == PortNum ? LPM_PE_0 : LPM_PE_1, UTIL_LPM_ENABLE); +#endif /* _LOW_POWER */ + + if (((_interrupt & UCPD_SR_RXERR) == 0u) && (ovrflag == 0u)) + { + /* Rx message has been received without error */ + Ports[PortNum].cbs.USBPD_HW_IF_RX_Completed(PortNum, hucpd->RX_ORDSET & UCPD_RX_ORDSET_RXORDSET); + } + ovrflag = 0; + return; + } + + /* Check TYPECEVT1IE/TYPECEVT1IE || check TYPECEVT2IE/TYPECEVT2IE */ + if ((UCPD_SR_TYPECEVT1 == (_interrupt & UCPD_SR_TYPECEVT1)) + || (UCPD_SR_TYPECEVT2 == (_interrupt & UCPD_SR_TYPECEVT2))) + { + /* Clear both interrupt */ + LL_UCPD_ClearFlag_TypeCEventCC1(hucpd); + LL_UCPD_ClearFlag_TypeCEventCC2(hucpd); + Ports[PortNum].USBPD_CAD_WakeUp(); + /* Wakeup CAD to check the detection event */ + return; + } + +#if defined(_FRS) + /* Check FRSEVTIE */ + if (UCPD_SR_FRSEVT == (_interrupt & UCPD_SR_FRSEVT)) + { + LL_UCPD_ClearFlag_FRS(hucpd); + if ((USBPD_PORTPOWERROLE_SNK == Ports[PortNum].params->PE_PowerRole) + && (Ports[PortNum].params->PE_SwapOngoing == USBPD_FALSE)) + { + /* Confirm the FRS by checking if an RP is always present on the current CC line. + We should wait for maximum FRS timing */ + USBPD_TIM_Start((TIM_identifier)(2 * PortNum), 150); + while ((USBPD_TIM_IsExpired((TIM_identifier)(2u * PortNum)) == 0u)); + + if ((0 != (hucpd->SR & (UCPD_SR_TYPEC_VSTATE_CC1 | UCPD_SR_TYPEC_VSTATE_CC2))) && + (USBPD_POWER_EXPLICITCONTRACT == Ports[PortNum].params->PE_Power)) + { + /* Switch the power to take the control of VBUS. + When VBUS go under VSAFE5V the sink shall switch ON VBUS in timing < tSrcFRSwap */ + BSP_USBPD_PWR_FRSVBUSEnable(PortNum); + USBPD_TRACE_Add(USBPD_TRACE_DEBUG, PortNum, 0, "FRS received", 12u); + Ports[PortNum].cbs.USBPD_HW_IF_TX_FRSReception(PortNum); + } + } + } +#endif /* _FRS */ + } +} + Index: /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_phy.c =================================================================== --- /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_phy.c (revision 60) +++ /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_phy.c (revision 60) @@ -0,0 +1,390 @@ +/** + ****************************************************************************** + * @file usbpd_phy.c + * @author MCD Application Team + * @brief This file contains PHY layer functions. + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "usbpd_def.h" +#include "usbpd_phy.h" +#include "usbpd_hw_if.h" +#include "usbpd_pwr_if.h" + +/** @addtogroup STM32_USBPD_LIBRARY + * @{ + */ + +/** @addtogroup USBPD_DEVICE + * @{ + */ + +/** @addtogroup USBPD_DEVICE_PHY + * @brief This file contains PHY layer functions. + * @details Receive from PRL a message and create a structured packet (according to the USBPD specifications): + * |SOP|DATA:[HEADER|DATAOBJECTS]|CRC|EOP| + * @{ + */ + +/* Private defines -----------------------------------------------------------*/ +/* Private typedef -----------------------------------------------------------*/ +/** @defgroup USBPD_DEVICE_PHY_Private_typedef USBPD DEVICE PHY Private typedef + * @brief Structures and enums internally used by the PHY layer + * @{ + */ + + +/** + * @brief Handle to support the data of the layer + */ +typedef struct +{ + /** + * @brief Reports that a message has been received on a specified port. + * @note Received data are stored inside PortNum->pRxBuffPtr + * function called in the interrupt context + * @param PortNum The handle of the port + * @param Type The type of the message received @ref USBPD_SOPType_TypeDef + * @retval None + */ + void (*USBPD_PHY_MessageReceived)(uint8_t PortNum, USBPD_SOPType_TypeDef Type); + + uint32_t SupportedSOP; /*!USBPD_PHY_TxCompleted; + Ports[PortNum].cbs.USBPD_HW_IF_BistCompleted = pCallbacks->USBPD_PHY_BistCompleted; + Ports[PortNum].cbs.USBPD_HW_IF_RX_ResetIndication = pCallbacks->USBPD_PHY_ResetIndication; + Ports[PortNum].cbs.USBPD_HW_IF_RX_Completed = PHY_Rx_Completed; + Ports[PortNum].cbs.USBPD_HW_IF_TX_HardResetCompleted = pCallbacks->USBPD_PHY_ResetCompleted; + Ports[PortNum].cbs.USBPD_HW_IF_TX_FRSReception = pCallbacks->USBPD_PHY_FastRoleSwapReception; + /* Initialize the hardware for the port */ + Ports[PortNum].ptr_RxBuff = pRxBuffer; + + /* Initialize port related functionalities inside this layer */ + PHY_Ports[PortNum].SupportedSOP = SupportedSOP; + PHY_Ports[PortNum].USBPD_PHY_MessageReceived = pCallbacks->USBPD_PHY_MessageReceived; + + return USBPD_OK; +} + +/** + * @brief this function return the retry counter value in us. + * @note time used to determine when the protocol layer must re-send a message not acknowledged by a goodCRC + * @param PortNum Number of the port. + * @retval retry counter value in us. + */ +uint16_t USBPD_PHY_GetRetryTimerValue(uint8_t PortNum) +{ + (void)PortNum; + return 905u; +} + +/** + * @brief this function return the min time to wait before sending a goodCRC to ack a message (in us). + * @note time used to guarantee the min time of 26us between two PD message. + * @param PortNum Number of the port. + * @retval value in us. + */ +uint16_t USBPD_PHY_GetMinGOODCRCTimerValue(uint8_t PortNum) +{ + return 30u; +} + +/** + * @brief Reset the PHY of a specified port. + * @param PortNum Number of the port. + * @retval None + */ +void USBPD_PHY_Reset(uint8_t PortNum) +{ + (void)PortNum; + /* Reset PHY layer */ + /* Reset HW_IF layer */ +} + +/** + * @brief Request to send a reset on a port. + * @param PortNum Number of the port + * @param Type Type of reset (hard or cable reset) @ref USBPD_SOPTYPE_HARD_RESET or @ref USBPD_SOPTYPE_CABLE_RESET + * @retval status @ref USBPD_OK + */ +USBPD_StatusTypeDef USBPD_PHY_ResetRequest(uint8_t PortNum, USBPD_SOPType_TypeDef Type) +{ + /* Send the requested reset */ + return USBPD_PHY_SendMessage(PortNum, Type, NULL, 0); +} + +/** + * @brief Send a Message. + * @param PortNum Number of the port + * @param Type Type of the message + * @param pBuffer Pointer to the buffer to be transmitted + * @param Size Size of the buffer (bytes) + * @retval status @ref USBPD_OK + */ +USBPD_StatusTypeDef USBPD_PHY_SendMessage(uint8_t PortNum, USBPD_SOPType_TypeDef Type, uint8_t *pBuffer, uint16_t Size) +{ + /* Trace to track message */ + return USBPD_HW_IF_SendBuffer(PortNum, Type, pBuffer, Size); +} + +/** + * @brief Send BIST pattern. + * @param PortNum Number of the port + * @retval status @ref USBPD_OK + */ +USBPD_StatusTypeDef USBPD_PHY_Send_BIST_Pattern(uint8_t PortNum) +{ + /* Call the low-level function (HW_IF) to accomplish the BIST Carrier Mode Transmission */ + USBPD_HW_IF_Send_BIST_Pattern(PortNum); + return USBPD_OK; +} + +/** + * @brief Request PHY to exit of BIST mode 2 + * @param PortNum port number value + * @param mode SOP BIST MODE 2 + * @retval USBPD status + */ +USBPD_StatusTypeDef USBPD_PHY_ExitTransmit(uint8_t PortNum, USBPD_SOPType_TypeDef mode) +{ + if (USBPD_SOPTYPE_BIST_MODE_2 == mode) + { + USBPD_HW_IF_StopBISTMode2(PortNum); + } + return USBPD_OK; +} + +/** + * @brief Set the SinkTxNg value of the resistor, + * @note used to manage the collision avoidance + * @param PortNum Number of the port + * @retval None + */ +void USBPD_PHY_SetResistor_SinkTxNG(uint8_t PortNum) +{ + USBPD_HW_IF_SetResistor_SinkTxNG(PortNum); +} + +/** + * @brief function to set the SinkTxOK + * @note used to manage the collision avoidance + * @param PortNum Number of the port. + * @retval none. + */ +void USBPD_PHY_SetResistor_SinkTxOK(uint8_t PortNum) +{ + USBPD_HW_IF_SetResistor_SinkTxOK(PortNum); +} + +/** + * @brief function to set the supported SOP + * @param PortNum Number of the port. + * @param SOPSupported List of the supported SOP + * @retval None. + */ +void USBPD_PHY_SOPSupported(uint8_t PortNum, uint32_t SOPSupported) +{ + PHY_Ports[PortNum].SupportedSOP = SOPSupported; +} + +/** + * @brief Check if SinkTxOK is set or not + * @note used to manage the collision avoidance + * @param PortNum Number of the port. + * @retval USBPD_TRUE or USBPD_FALSE + */ +uint8_t USBPD_PHY_IsResistor_SinkTxOk(uint8_t PortNum) +{ + return USBPD_HW_IF_IsResistor_SinkTxOk(PortNum); +} + +/** + * @brief function to generate an FRS signalling + * @param PortNum Number of the port. + * @retval None. + */ +void USBPD_PHY_FastRoleSwapSignalling(uint8_t PortNum) +{ + USBPD_HW_IF_FastRoleSwapSignalling(PortNum); +} + +/** + * @brief function used to enable RX + * @param PortNum Number of the port. + * @retval None + */ +void USBPD_PHY_EnableRX(uint8_t PortNum) +{ + USBPD_HW_IF_EnableRX(PortNum); +} + +/** + * @brief function used to disable RX + * @param PortNum Number of the port. + * @retval None + */ +void USBPD_PHY_DisableRX(uint8_t PortNum) +{ + USBPD_HW_IF_DisableRX(PortNum); +} + +/** + * @} + */ + +/** @addtogroup USBPD_DEVICE_PHY_Private_functions + * @brief PHY internally used functions + * @{ + */ + +/** + * @brief Callback to notify the end of the current reception + * @param PortNum Number of the port. + * @param MsgType SOP Message Type + * @retval None. + */ +void PHY_Rx_Completed(uint8_t PortNum, uint32_t MsgType) +{ + const USBPD_SOPType_TypeDef tab_sop_value[] = + { + USBPD_SOPTYPE_SOP, USBPD_SOPTYPE_SOP1, USBPD_SOPTYPE_SOP2, + USBPD_SOPTYPE_SOP1_DEBUG, USBPD_SOPTYPE_SOP2_DEBUG, USBPD_SOPTYPE_CABLE_RESET + }; + USBPD_SOPType_TypeDef _msgtype; + + _msgtype = tab_sop_value[MsgType]; + + /* Check if the message must be forwarded to usbpd stack */ + switch (_msgtype) + { + case USBPD_SOPTYPE_CABLE_RESET : + if (0x1Eu == (PHY_Ports[PortNum].SupportedSOP & 0x1Eu)) + { + /* Nothing to do the message will be discarded and the port partner retry the send */ + Ports[PortNum].cbs.USBPD_HW_IF_RX_ResetIndication(PortNum, USBPD_SOPTYPE_CABLE_RESET); + } + break; + case USBPD_SOPTYPE_SOP : + case USBPD_SOPTYPE_SOP1 : + case USBPD_SOPTYPE_SOP2 : + case USBPD_SOPTYPE_SOP1_DEBUG : + case USBPD_SOPTYPE_SOP2_DEBUG : + if (!((uint8_t)(0x1u << _msgtype) != (PHY_Ports[PortNum].SupportedSOP & (uint8_t)(0x1u << _msgtype)))) + { + PHY_Ports[PortNum].USBPD_PHY_MessageReceived(PortNum, _msgtype); + } +#if defined(DEBUG_NOTFWD) + else + { + typedef union + { + uint16_t d16; + struct + { + uint16_t MessageType :5; /*!< Message Header's message Type */ + uint16_t PortDataRole :1; /*!< Message Header's Port Data Role */ + uint16_t SpecificationRevision :2; /*!< Message Header's Spec Revision */ + uint16_t PortPowerRole_CablePlug:1; /*!< Message Header's Port Power Role/Cable Plug field */ + uint16_t MessageID :3; /*!< Message Header's message ID */ + uint16_t NumberOfDataObjects :3; /*!< Message Header's Number of data object */ + uint16_t Extended :1; /*!< Reserved */ + } + b; + } USBPD_MsgHeader_TypeDef; + + USBPD_MsgHeader_TypeDef header_rx; + header_rx.d16 = USBPD_LE16(Ports[PortNum].ptr_RxBuff); + USBPD_TRACE_Add(USBPD_TRACE_PHY_NOTFRWD, PortNum, _msgtype, Ports[PortNum].ptr_RxBuff, + 2u + (header_rx.b.NumberOfDataObjects * 4u)); + } +#endif /* DEBUG_NOTFWD */ + break; + default : + break; + } +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + Index: /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_phy_hw_if.c =================================================================== --- /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_phy_hw_if.c (revision 60) +++ /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_phy_hw_if.c (revision 60) @@ -0,0 +1,509 @@ +/** + ****************************************************************************** + * @file usbpd_phy_hw_if.c + * @author MCD Application Team + * @brief This file contains phy interface control functions. + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#define USBPD_PHY_HW_IF_C + +#include "usbpd_devices_conf.h" +#include "usbpd_hw.h" +#include "usbpd_core.h" +#include "usbpd_hw_if.h" +#if !defined(USBPDCORE_LIB_NO_PD) +#include "usbpd_timersserver.h" +#endif /* !USBPDCORE_LIB_NO_PD */ +#if defined(_LOW_POWER) +#include "usbpd_lowpower.h" +#include "usbpd_cad_hw_if.h" +#endif /* _LOW_POWER */ + +/* Private typedef -----------------------------------------------------------*/ +#define PHY_ENTER_CRITICAL_SECTION() uint32_t primask = __get_PRIMASK(); \ + __disable_irq(); + +#define PHY_LEAVE_CRITICAL_SECTION() __set_PRIMASK(primask); + +/* Private function prototypes -----------------------------------------------*/ +USBPD_PORT_HandleTypeDef Ports[USBPD_PORT_COUNT]; + + +/* Private functions ---------------------------------------------------------*/ + + +void USBPD_HW_IF_GlobalHwInit(void) +{ + /* PWR register access (for disabling dead battery feature) */ + LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR); + LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_CRC); + +} + +#if !defined(USBPDCORE_LIB_NO_PD) +void USBPD_HW_IF_StopBISTMode2(uint8_t PortNum) +{ + uint32_t _cr = READ_REG(Ports[PortNum].husbpd->CR) & ~(UCPD_CR_TXMODE | UCPD_CR_TXSEND); + + LL_UCPD_Disable(Ports[PortNum].husbpd); + LL_UCPD_Enable(Ports[PortNum].husbpd); + + Ports[PortNum].husbpd->CR = _cr; +} + +USBPD_StatusTypeDef USBPD_HW_IF_SendBuffer(uint8_t PortNum, USBPD_SOPType_TypeDef Type, uint8_t *pBuffer, uint32_t Size) +{ + USBPD_StatusTypeDef _status = USBPD_OK; + + if (USBPD_SOPTYPE_HARD_RESET == Type) + { + LL_UCPD_SendHardReset(Ports[PortNum].husbpd); + } + else + { + PHY_ENTER_CRITICAL_SECTION() + + /* If RX is ongoing or if a DMA transfer is active then discard the buffer sending */ + if ((Ports[PortNum].RXStatus == USBPD_TRUE) || ((Ports[PortNum].hdmatx->CCR & DMA_CCR_EN) == DMA_CCR_EN)) + { + PHY_LEAVE_CRITICAL_SECTION() + _status = USBPD_ERROR; + } + else + { + PHY_LEAVE_CRITICAL_SECTION() + + switch (Type) + { + case USBPD_SOPTYPE_SOP : + { + LL_UCPD_WriteTxOrderSet(Ports[PortNum].husbpd, LL_UCPD_ORDERED_SET_SOP); + LL_UCPD_SetTxMode(Ports[PortNum].husbpd, LL_UCPD_TXMODE_NORMAL); + break; + } + case USBPD_SOPTYPE_SOP1 : + { + LL_UCPD_WriteTxOrderSet(Ports[PortNum].husbpd, LL_UCPD_ORDERED_SET_SOP1); + LL_UCPD_SetTxMode(Ports[PortNum].husbpd, LL_UCPD_TXMODE_NORMAL); + break; + } + case USBPD_SOPTYPE_SOP2 : + { + LL_UCPD_WriteTxOrderSet(Ports[PortNum].husbpd, LL_UCPD_ORDERED_SET_SOP2); + LL_UCPD_SetTxMode(Ports[PortNum].husbpd, LL_UCPD_TXMODE_NORMAL); + break; + } + case USBPD_SOPTYPE_CABLE_RESET : + { + LL_UCPD_SetTxMode(Ports[PortNum].husbpd, LL_UCPD_TXMODE_CABLE_RESET); + break; + } + case USBPD_SOPTYPE_BIST_MODE_2 : + { + LL_UCPD_SetTxMode(Ports[PortNum].husbpd, LL_UCPD_TXMODE_BIST_CARRIER2); + break; + } + default : + _status = USBPD_ERROR; + break; + } + + if (USBPD_OK == _status) + { +#if defined(_LOW_POWER) + UTIL_LPM_SetStopMode(0 == PortNum ? LPM_PE_0 : LPM_PE_1, UTIL_LPM_DISABLE); +#endif /* _LOW_POWER */ + CLEAR_BIT(Ports[PortNum].hdmatx->CCR, DMA_CCR_EN); + while ((Ports[PortNum].hdmatx->CCR & DMA_CCR_EN) == DMA_CCR_EN); + + WRITE_REG(Ports[PortNum].hdmatx->CMAR, (uint32_t)pBuffer); + WRITE_REG(Ports[PortNum].hdmatx->CNDTR, Size); + SET_BIT(Ports[PortNum].hdmatx->CCR, DMA_CCR_EN); + + LL_UCPD_WriteTxPaySize(Ports[PortNum].husbpd, Size); + LL_UCPD_SendMessage(Ports[PortNum].husbpd); + } + } + } + return _status; +} + +void USBPD_HW_IF_Send_BIST_Pattern(uint8_t PortNum) +{ + LL_UCPD_SetTxMode(Ports[PortNum].husbpd, LL_UCPD_TXMODE_BIST_CARRIER2); + LL_UCPD_SendMessage(Ports[PortNum].husbpd); +} +#endif /* !USBPDCORE_LIB_NO_PD */ + +/** + * @brief Assert Rp resistors + * @param PortNum Port + * @retval None + */ +void USBPDM1_AssertRp(uint8_t PortNum) +{ + switch (Ports[PortNum].params->RpResistor) + { + case vRp_Default : + LL_UCPD_SetRpResistor(Ports[PortNum].husbpd, LL_UCPD_RESISTOR_DEFAULT); + break; + case vRp_1_5A: + LL_UCPD_SetRpResistor(Ports[PortNum].husbpd, LL_UCPD_RESISTOR_1_5A); + break; + case vRp_3_0A: + LL_UCPD_SetRpResistor(Ports[PortNum].husbpd, LL_UCPD_RESISTOR_3_0A); + break; + default: + break; + } + LL_UCPD_SetccEnable(Ports[PortNum].husbpd, LL_UCPD_CCENABLE_NONE); + LL_UCPD_SetSRCRole(Ports[PortNum].husbpd); + if (CCNONE == Ports[PortNum].CCx) + { + LL_UCPD_SetccEnable(Ports[PortNum].husbpd, LL_UCPD_CCENABLE_CC1CC2); + } + else + { + LL_UCPD_SetccEnable(Ports[PortNum].husbpd, + (Ports[PortNum].CCx == CC1) ? LL_UCPD_CCENABLE_CC1 : LL_UCPD_CCENABLE_CC2); + } + +#if defined(TCPP0203_SUPPORT) + BSP_USBPD_PWR_SetRole(PortNum, POWER_ROLE_SOURCE); +#endif /* TCPP0203_SUPPORT */ +} +/** + * @brief De-assert Rp resistors + * @param PortNum Port + * @retval None + */ +void USBPDM1_DeAssertRp(uint8_t PortNum) +{ + /* Not needed on STM32G4xx, so nothing to do, keep only for compatibility */ + UNUSED(PortNum); +} + +/** + * @brief Assert Rd resistors + * @param PortNum Port + * @retval None + */ +void USBPDM1_AssertRd(uint8_t PortNum) +{ + LL_UCPD_TypeCDetectionCC2Disable(Ports[PortNum].husbpd); + LL_UCPD_TypeCDetectionCC1Disable(Ports[PortNum].husbpd); + + LL_UCPD_SetccEnable(Ports[PortNum].husbpd, LL_UCPD_CCENABLE_NONE); + LL_UCPD_SetSNKRole(Ports[PortNum].husbpd); + if (CCNONE == Ports[PortNum].CCx) + { + LL_UCPD_SetccEnable(Ports[PortNum].husbpd, LL_UCPD_CCENABLE_CC1CC2); + } + else + { + LL_UCPD_SetccEnable(Ports[PortNum].husbpd, + (Ports[PortNum].CCx == CC1) ? LL_UCPD_CCENABLE_CC1 : LL_UCPD_CCENABLE_CC2); + } + + HAL_Delay(1); + +#ifndef _LOW_POWER + LL_UCPD_TypeCDetectionCC2Enable(Ports[PortNum].husbpd); + LL_UCPD_TypeCDetectionCC1Enable(Ports[PortNum].husbpd); +#endif /* _LOW_POWER */ + +#if defined(TCPP0203_SUPPORT) + BSP_USBPD_PWR_SetRole(PortNum, POWER_ROLE_SINK); +#endif /* TCPP0203_SUPPORT */ +} + +/** + * @brief Assert Rd resistors + * @param PortNum Port + * @retval none + */ +void USBPDM1_DeAssertRd(uint8_t PortNum) +{ + /* Not needed on STM32G4xx, so nothing to do, keep only for compatibility */ + UNUSED(PortNum); +} + +/** + * @brief Enter error recovery + * @param PortNum Port + * @retval None + */ +void USBPDM1_EnterErrorRecovery(uint8_t PortNum) +{ + LL_UCPD_SetSRCRole(Ports[PortNum].husbpd); + LL_UCPD_SetRpResistor(Ports[PortNum].husbpd, LL_UCPD_RESISTOR_NONE); + LL_UCPD_RxDisable(Ports[PortNum].husbpd); + +#if !defined(USBPDCORE_LIB_NO_PD) + if (Ports[PortNum].settings->PE_PD3_Support.d.PE_FastRoleSwapSupport == USBPD_TRUE) + { + /* Set GPIO to disallow the FRS RX handling */ + LL_UCPD_FRSDetectionDisable(Ports[PortNum].husbpd); + } +#endif /* USBPDCORE_LIB_NO_PD */ +} + +/** + * @brief Set the correct CC pin on the comparator + * @param PortNum Port + * @param cc CC pin based on @ref CCxPin_TypeDef + * @retval None + */ +void USBPDM1_Set_CC(uint8_t PortNum, CCxPin_TypeDef cc) +{ + /* Set the correct pin on the comparator */ + Ports[PortNum].CCx = cc; + LL_UCPD_SetCCPin(Ports[PortNum].husbpd, (cc == CC1) ? LL_UCPD_CCPIN_CC1 : LL_UCPD_CCPIN_CC2); +} + +/** + * @brief Enable RX interrupt + * @param PortNum Port + * @retval None + */ +void USBPDM1_RX_EnableInterrupt(uint8_t PortNum) +{ + /* Enable the RX interrupt process */ + MODIFY_REG(Ports[PortNum].husbpd->IMR, + UCPD_IMR_RXORDDETIE | UCPD_IMR_RXHRSTDETIE | UCPD_IMR_RXOVRIE | UCPD_IMR_RXMSGENDIE, + UCPD_IMR_RXORDDETIE | UCPD_IMR_RXHRSTDETIE | UCPD_IMR_RXOVRIE | UCPD_IMR_RXMSGENDIE); + LL_UCPD_RxDMAEnable(Ports[PortNum].husbpd); +} + +/** + * @brief Enable RX + * @param PortNum Port + * @retval None + */ +void USBPD_HW_IF_EnableRX(uint8_t PortNum) +{ + LL_UCPD_RxEnable(Ports[PortNum].husbpd); +} + +/** + * @brief Disable RX + * @param PortNum Port + * @retval None + */ +void USBPD_HW_IF_DisableRX(uint8_t PortNum) +{ + LL_UCPD_RxDisable(Ports[PortNum].husbpd); +} + +void HW_SignalAttachement(uint8_t PortNum, CCxPin_TypeDef cc) +{ +#if !defined(USBPDCORE_LIB_NO_PD) + uint32_t _temp; + + /* Init timer to detect the reception of goodCRC */ + USBPD_TIM_Init(); + + /* Prepare ucpd to handle PD message + RX message start listen + TX prepare the DMA to be transfer ready + Detection listen only the line corresponding CC=Rd for SRC/SNK */ + Ports[PortNum].hdmatx = USBPD_HW_Init_DMATxInstance(PortNum); + Ports[PortNum].hdmarx = USBPD_HW_Init_DMARxInstance(PortNum); + + /* Set the RX dma to allow reception */ + _temp = (uint32_t)&Ports[PortNum].husbpd->RXDR; + WRITE_REG(Ports[PortNum].hdmarx->CPAR, _temp); + WRITE_REG(Ports[PortNum].hdmarx->CMAR, (uint32_t)Ports[PortNum].ptr_RxBuff); + Ports[PortNum].hdmarx->CNDTR = SIZE_MAX_PD_TRANSACTION_UNCHUNK; + Ports[PortNum].hdmarx->CCR |= DMA_CCR_EN; + + /* Set the TX dma only UCPD address */ + _temp = (uint32_t)&Ports[PortNum].husbpd->TXDR; + Ports[PortNum].hdmatx->CPAR = _temp; + + /* Disabled non Rd line set CC line enable */ +#define INTERRUPT_MASK UCPD_IMR_TXMSGDISCIE | UCPD_IMR_TXMSGSENTIE | UCPD_IMR_HRSTDISCIE | UCPD_IMR_HRSTSENTIE | \ + UCPD_IMR_TXMSGABTIE | UCPD_IMR_TXUNDIE | UCPD_IMR_RXORDDETIE | UCPD_IMR_RXHRSTDETIE | \ + UCPD_IMR_RXOVRIE | UCPD_IMR_RXMSGENDIE + + MODIFY_REG(Ports[PortNum].husbpd->IMR, INTERRUPT_MASK, INTERRUPT_MASK); +#endif /* !USBPDCORE_LIB_NO_PD */ + + /* Handle CC enable */ + Ports[PortNum].CCx = cc; + +#if !defined(USBPDCORE_LIB_NO_PD) + /* Set CC pin for PD message */ + LL_UCPD_SetCCPin(Ports[PortNum].husbpd, (Ports[PortNum].CCx == CC1) ? LL_UCPD_CCPIN_CC1 : LL_UCPD_CCPIN_CC2); + + +#if defined(_VCONN_SUPPORT) + /* Initialize Vconn management */ + (void)BSP_USBPD_PWR_VCONNInit(PortNum, (Ports[PortNum].CCx == CC1) ? 1u : 2u); +#endif /* _VCONN_SUPPORT */ + + if (Ports[PortNum].settings->PE_PD3_Support.d.PE_FastRoleSwapSupport == USBPD_TRUE) + { + /* Set GPIO to allow the FRS TX handling */ + USBPD_HW_SetFRSSignalling(PortNum, (Ports[PortNum].CCx == CC1) ? 1u : 2u); + /* Enable FRS RX */ + LL_UCPD_FRSDetectionEnable(Ports[PortNum].husbpd); + Ports[PortNum].husbpd->IMR |= UCPD_IMR_FRSEVTIE; + } + + /* Disable the Resistor on Vconn PIN */ + if (Ports[PortNum].CCx == CC1) + { + LL_UCPD_SetccEnable(Ports[PortNum].husbpd, LL_UCPD_CCENABLE_CC1); + } + else + { + LL_UCPD_SetccEnable(Ports[PortNum].husbpd, LL_UCPD_CCENABLE_CC2); + } + + /* Prepare the rx processing */ + LL_UCPD_SetRxMode(Ports[PortNum].husbpd, LL_UCPD_RXMODE_NORMAL); + LL_UCPD_RxDMAEnable(Ports[PortNum].husbpd); + LL_UCPD_TxDMAEnable(Ports[PortNum].husbpd); +#endif /* !USBPDCORE_LIB_NO_PD */ +} + + +void HW_SignalDetachment(uint8_t PortNum) +{ +#if !defined(USBPDCORE_LIB_NO_PD) + /* Stop DMA RX/TX */ + LL_UCPD_RxDMADisable(Ports[PortNum].husbpd); + LL_UCPD_TxDMADisable(Ports[PortNum].husbpd); + LL_UCPD_RxDisable(Ports[PortNum].husbpd); + +#if !defined(_LOW_POWER) && !defined(USBPDM1_VCC_FEATURE_ENABLED) + /* Enable only detection interrupt */ + WRITE_REG(Ports[PortNum].husbpd->IMR, UCPD_IMR_TYPECEVT1IE | UCPD_IMR_TYPECEVT2IE); +#elif defined(_LOW_POWER) +#if !defined(_DRP) + if (USBPD_PORTPOWERROLE_SRC == Ports[PortNum].params->PE_PowerRole) + { + /* Enable detection interrupt */ + WRITE_REG(Ports[PortNum].husbpd->IMR, UCPD_IMR_TYPECEVT1IE | UCPD_IMR_TYPECEVT2IE); + } +#endif /* !_DRP */ +#endif /* !_LOW_POWER && !USBPDM1_VCC_FEATURE_ENABLED */ + + USBPD_HW_DeInit_DMATxInstance(PortNum); + USBPD_HW_DeInit_DMARxInstance(PortNum); + + LL_UCPD_SetccEnable(Ports[PortNum].husbpd, LL_UCPD_CCENABLE_CC1CC2); + + if (USBPD_PORTPOWERROLE_SNK == Ports[PortNum].params->PE_PowerRole) + { +#if defined(_VCONN_SUPPORT) + /* DeInitialize Vconn management */ + (void)BSP_USBPD_PWR_VCONNDeInit(PortNum, (Ports[PortNum].CCx == CC1) ? 1u : 2u); +#endif /* _VCONN_SUPPORT */ + /* DeInitialise VBUS power */ + (void)BSP_USBPD_PWR_VBUSDeInit(PortNum); + } + + if (Ports[PortNum].settings->PE_PD3_Support.d.PE_FastRoleSwapSupport == USBPD_TRUE) + { + /* Set GPIO to disallow the FRS RX handling */ + LL_UCPD_FRSDetectionDisable(Ports[PortNum].husbpd); + } + +#endif /* !USBPDCORE_LIB_NO_PD */ + Ports[PortNum].CCx = CCNONE; +#if !defined(USBPDCORE_LIB_NO_PD) + /* DeInit timer to detect the reception of goodCRC */ + USBPD_TIM_DeInit(); +#endif /* !USBPDCORE_LIB_NO_PD */ +} + +/** + * @brief Set resistors to SinkTxNG + * @param PortNum Port + * @retval None + */ +void USBPD_HW_IF_SetResistor_SinkTxNG(uint8_t PortNum) +{ + /* Set the resistor SinkTxNG 1.5A5V */ + LL_UCPD_SetRpResistor(Ports[PortNum].husbpd, LL_UCPD_RESISTOR_1_5A); +} + +/** + * @brief Set resistors to SinkTxOk + * @param PortNum Port + * @retval None + */ +void USBPD_HW_IF_SetResistor_SinkTxOK(uint8_t PortNum) +{ + /* Set the resistor SinkTxNG 3.0A5V */ + LL_UCPD_SetRpResistor(Ports[PortNum].husbpd, LL_UCPD_RESISTOR_3_0A); +} + +/** + * @brief Check if resistors are set to SinkTxOk + * @param PortNum Port + * @retval USBPD_TRUE if resistor is set to SinkTxOk, else USBPD_FALSE + */ +uint8_t USBPD_HW_IF_IsResistor_SinkTxOk(uint8_t PortNum) +{ +#if defined(_LOW_POWER) + /* When in low power mode, the type C state machine is turned off. + To retrieve any potential updates of the SR register, the state machine needs to be re-enabled briefly. */ + + /* Enable type C state machine */ + CLEAR_BIT(Ports[PortNum].husbpd->CR, (UCPD_CR_CC1TCDIS | UCPD_CR_CC2TCDIS)); + + /* Let time for internal state machine to refresh his state */ + for (uint32_t index = 0; index < CAD_DELAY_READ_CC_STATUS; index++) + { + __DSB(); + } + + /* Disable type C state machine */ + SET_BIT(Ports[PortNum].husbpd->CR, (UCPD_CR_CC1TCDIS | UCPD_CR_CC2TCDIS)); +#endif /* _LOW_POWER */ + + switch (Ports[PortNum].CCx) + { + case CC1 : + if ((Ports[PortNum].husbpd->SR & UCPD_SR_TYPEC_VSTATE_CC1) == LL_UCPD_SNK_CC1_VRP30A) + { + return USBPD_TRUE; + } + break; + case CC2 : + if ((Ports[PortNum].husbpd->SR & UCPD_SR_TYPEC_VSTATE_CC2) == LL_UCPD_SNK_CC2_VRP30A) + { + return USBPD_TRUE; + } + break; + default: + break; + } + + return USBPD_FALSE; +} + +/** + * @brief Signal a Fast Role Swap + * @param PortNum Port + * @retval None + */ +void USBPD_HW_IF_FastRoleSwapSignalling(uint8_t PortNum) +{ + LL_UCPD_SignalFRSTX(Ports[PortNum].husbpd); +} Index: /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_pwr_hw_if.c =================================================================== --- /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_pwr_hw_if.c (revision 60) +++ /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_pwr_hw_if.c (revision 60) @@ -0,0 +1,106 @@ +/** + ****************************************************************************** + * @file usbpd_pwr_hw_if.c + * @author MCD Application Team + * @brief This file contains power hardware interface functions. + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "usbpd_hw_if.h" + + +#define _USBPD_POWER_DEBUG +#if defined(_TRACE) +#include "usbpd_core.h" +#include "usbpd_trace.h" +#endif /* _TRACE */ + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +#if defined(_TRACE) +#define POWER_DEBUG(__MSG__,__SIZE__) USBPD_TRACE_Add(USBPD_TRACE_DEBUG, PortNum, 0,__MSG__,__SIZE__); +#else +#define POWER_DEBUG(__MSG__,__SIZE__) +#endif /* _TRACE */ + +/* Private macro -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/* Private function prototypes -----------------------------------------------*/ +/* Private functions ---------------------------------------------------------*/ +USBPD_StatusTypeDef HW_IF_PWR_SetVoltage(uint8_t PortNum, uint16_t voltage) +{ + UNUSED(PortNum); + UNUSED(voltage); + return USBPD_OK; +} + +uint16_t HW_IF_PWR_GetVoltage(uint8_t PortNum) +{ + uint32_t _voltage; + BSP_USBPD_PWR_VBUSGetVoltage(PortNum, &_voltage); + return (uint16_t)_voltage; +} + +int16_t HW_IF_PWR_GetCurrent(uint8_t PortNum) +{ + int32_t _current; + BSP_USBPD_PWR_VBUSGetCurrent(PortNum, &_current); + return (int16_t)_current; +} + +#if defined(_SRC) || defined(_DRP) +USBPD_StatusTypeDef HW_IF_PWR_Enable(uint8_t PortNum, USBPD_FunctionalState state, CCxPin_TypeDef Cc, + uint32_t VconnState, USBPD_PortPowerRole_TypeDef role) +{ + UNUSED(role); + int32_t status; + if (USBPD_ENABLE == state) + { +#if defined(_VCONN_SUPPORT) + if (USBPD_TRUE == VconnState) + { + POWER_DEBUG((uint8_t *)"VCONN ON", 8); + (void)BSP_USBPD_PWR_VCONNOn(PortNum, Cc); + } +#endif /* _VCONN_SUPPORT */ + POWER_DEBUG((uint8_t *)"VBUS ON", 7); + status = BSP_USBPD_PWR_VBUSOn(PortNum); + } + else + { +#if defined(_VCONN_SUPPORT) + if (VconnState == USBPD_TRUE) + { + POWER_DEBUG((uint8_t *)"VCONN OFF", 9); + (void)BSP_USBPD_PWR_VCONNOff(PortNum, Cc); + } +#endif /* _VCONN_SUPPORT */ + POWER_DEBUG((uint8_t *)"VBUS OFF", 8); + status = BSP_USBPD_PWR_VBUSOff(PortNum); + } + return (status == BSP_ERROR_NONE) ? USBPD_OK : USBPD_FAIL; +} +#endif /* _SRC || _DRP */ + +USBPD_FunctionalState HW_IF_PWR_VBUSIsEnabled(uint8_t PortNum) +{ +#if defined(_SRC)||defined(_DRP) + uint8_t _state; + BSP_USBPD_PWR_VBUSIsOn(PortNum, &_state); + return (_state == BSP_ERROR_NONE) ? USBPD_DISABLE : USBPD_ENABLE; +#else + return USBPD_DISABLE; +#endif /* _SRC || _DRP */ +} + Index: /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_timersserver.c =================================================================== --- /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_timersserver.c (revision 60) +++ /trunk/fw_g473rct/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_timersserver.c (revision 60) @@ -0,0 +1,175 @@ +/** + ****************************************************************************** + * @file usbpd_timersserver.c + * @author MCD Application Team + * @brief This file contains timer server functions. + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "usbpd_devices_conf.h" +#include "usbpd_timersserver.h" + +/** @addtogroup STM32_USBPD_LIBRARY + * @{ + */ + +/** @addtogroup USBPD_DEVICE + * @{ + */ + +/** @addtogroup USBPD_DEVICE_TIMESERVER + * @{ + */ + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +/* Private macro -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +int8_t timer_initcounter = 0; +/* Private function prototypes -----------------------------------------------*/ +/* Private functions ---------------------------------------------------------*/ + +/** + * @brief Initialize a timer to manage timing in us + * @retval None + */ +void USBPD_TIM_Init(void) +{ + if (0 == timer_initcounter) + { + TIMX_CLK_ENABLE; + /***************************/ + /* Time base configuration */ + /***************************/ + /* Counter mode: select up-counting mode */ + LL_TIM_SetCounterMode(TIMX, LL_TIM_COUNTERMODE_UP); + +#if defined(TIMX_CLK_FREQ) + /* Set the pre-scaler value to have TIMx counter clock equal to 1 MHz */ + LL_TIM_SetPrescaler(TIMX, __LL_TIM_CALC_PSC(TIMX_CLK_FREQ, 1000000u)); + + /* Set the auto-reload value to have a counter frequency of 100Hz */ + LL_TIM_SetAutoReload(TIMX, __LL_TIM_CALC_ARR(TIMX_CLK_FREQ, LL_TIM_GetPrescaler(TIMX), 100u)); +#else + /* Set the pre-scaler value to have TIMx counter clock equal to 1 MHz */ + LL_TIM_SetPrescaler(TIMX, __LL_TIM_CALC_PSC(SystemCoreClock, 1000000u)); + + /* Set the auto-reload value to have a counter frequency of 100Hz */ + LL_TIM_SetAutoReload(TIMX, __LL_TIM_CALC_ARR(SystemCoreClock, LL_TIM_GetPrescaler(TIMX), 100u)); +#endif /* TIMX_CLK_FREQ */ + + /*********************************/ + /* Output waveform configuration */ + /*********************************/ + /* Set output compare mode: TOGGLE */ + LL_TIM_OC_SetMode(TIMX, TIMX_CHANNEL_CH1, LL_TIM_OCMODE_TOGGLE); + LL_TIM_OC_SetMode(TIMX, TIMX_CHANNEL_CH2, LL_TIM_OCMODE_TOGGLE); + LL_TIM_OC_SetMode(TIMX, TIMX_CHANNEL_CH3, LL_TIM_OCMODE_TOGGLE); + LL_TIM_OC_SetMode(TIMX, TIMX_CHANNEL_CH4, LL_TIM_OCMODE_TOGGLE); + + /* Set output channel polarity: OC is active high */ + LL_TIM_OC_SetPolarity(TIMX, TIMX_CHANNEL_CH1, LL_TIM_OCPOLARITY_HIGH); + LL_TIM_OC_SetPolarity(TIMX, TIMX_CHANNEL_CH2, LL_TIM_OCPOLARITY_HIGH); + LL_TIM_OC_SetPolarity(TIMX, TIMX_CHANNEL_CH3, LL_TIM_OCPOLARITY_HIGH); + LL_TIM_OC_SetPolarity(TIMX, TIMX_CHANNEL_CH4, LL_TIM_OCPOLARITY_HIGH); + + /* Enable counter */ + LL_TIM_EnableCounter(TIMX); + } + + /* Enable the timer counter */ + timer_initcounter++; +} + +/** + * @brief UnInitialize a timer to manage timing in us + * @retval None + */ +void USBPD_TIM_DeInit(void) +{ + timer_initcounter--; + if (0 == timer_initcounter) + { + TIMX_CLK_DISABLE; + } +} + +/** + * @brief start the timer counting + * @param timer id @TIM_identifier + * @param time in us + * @retval None + */ +void USBPD_TIM_Start(TIM_identifier Id, uint32_t TimeUs) +{ + /* Positionne l'evenement pour sa detection */ + switch (Id) + { + case TIM_PORT0_CRC: + TIMX_CHANNEL1_SETEVENT; + break; + case TIM_PORT0_RETRY: + TIMX_CHANNEL2_SETEVENT; + break; + case TIM_PORT1_CRC: + TIMX_CHANNEL3_SETEVENT; + break; + case TIM_PORT1_RETRY: + TIMX_CHANNEL4_SETEVENT; + break; + default: + break; + } +} + +/** + * @brief check timer expiration + * @param timer id @TIM_identifier + * @retval None + */ +uint32_t USBPD_TIM_IsExpired(TIM_identifier Id) +{ + uint32_t _expired = 1u; + switch (Id) + { + case TIM_PORT0_CRC: + _expired = TIMX_CHANNEL1_GETFLAG(TIMX); + break; + case TIM_PORT0_RETRY: + _expired = TIMX_CHANNEL2_GETFLAG(TIMX); + break; + case TIM_PORT1_CRC: + _expired = TIMX_CHANNEL3_GETFLAG(TIMX); + break; + case TIM_PORT1_RETRY: + _expired = TIMX_CHANNEL4_GETFLAG(TIMX); + break; + default: + break; + } + return _expired; +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ +