Index: trunk/fw_g473rct/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g473xx.h
===================================================================
--- trunk/fw_g473rct/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g473xx.h	(revision 40)
+++ trunk/fw_g473rct/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g473xx.h	(revision 55)
@@ -3350,5 +3350,5 @@
 /********************  Bits definition for DMAMUX_CxCR register  **************/
 #define DMAMUX_CxCR_DMAREQ_ID_Pos                    (0U)
-#define DMAMUX_CxCR_DMAREQ_ID_Msk                    (0xFFUL << DMAMUX_CxCR_DMAREQ_ID_Pos)/*!< 0x000000FF */
+#define DMAMUX_CxCR_DMAREQ_ID_Msk                    (0x7FUL << DMAMUX_CxCR_DMAREQ_ID_Pos)/*!< 0x0000007F */
 #define DMAMUX_CxCR_DMAREQ_ID                        DMAMUX_CxCR_DMAREQ_ID_Msk
 #define DMAMUX_CxCR_DMAREQ_ID_0                      (0x01UL << DMAMUX_CxCR_DMAREQ_ID_Pos)/*!< 0x00000001 */
@@ -3359,4 +3359,6 @@
 #define DMAMUX_CxCR_DMAREQ_ID_5                      (0x20UL << DMAMUX_CxCR_DMAREQ_ID_Pos)/*!< 0x00000020 */
 #define DMAMUX_CxCR_DMAREQ_ID_6                      (0x40UL << DMAMUX_CxCR_DMAREQ_ID_Pos)/*!< 0x00000040 */
+
+/* Legacy defines */
 #define DMAMUX_CxCR_DMAREQ_ID_7                      (0x80UL << DMAMUX_CxCR_DMAREQ_ID_Pos)/*!< 0x00000080 */
 
@@ -9345,6 +9347,6 @@
 #define RNG_CR_IE           RNG_CR_IE_Msk
 #define RNG_CR_CED_Pos      (5U)
-#define RNG_CR_CED_Msk      (0x1UL << RNG_CR_IE_Pos)                           /*!< 0x00000020 */
-#define RNG_CR_CED          RNG_CR_IE_Msk
+#define RNG_CR_CED_Msk      (0x1UL << RNG_CR_CED_Pos)                           /*!< 0x00000020 */
+#define RNG_CR_CED          RNG_CR_CED_Msk
 
 /********************  Bits definition for RNG_SR register  *******************/
@@ -11823,25 +11825,25 @@
 /*******************  Bit definition for TIM_CCR1 register  *******************/
 #define TIM_CCR1_CCR1_Pos         (0U)
-#define TIM_CCR1_CCR1_Msk         (0xFFFFUL << TIM_CCR1_CCR1_Pos)              /*!< 0x0000FFFF */
+#define TIM_CCR1_CCR1_Msk         (0xFFFFFFFFUL << TIM_CCR1_CCR1_Pos)          /*!< 0xFFFFFFFF */
 #define TIM_CCR1_CCR1             TIM_CCR1_CCR1_Msk                            /*!<Capture/Compare 1 Value */
 
 /*******************  Bit definition for TIM_CCR2 register  *******************/
 #define TIM_CCR2_CCR2_Pos         (0U)
-#define TIM_CCR2_CCR2_Msk         (0xFFFFUL << TIM_CCR2_CCR2_Pos)              /*!< 0x0000FFFF */
+#define TIM_CCR2_CCR2_Msk         (0xFFFFFFFFUL << TIM_CCR2_CCR2_Pos)          /*!< 0xFFFFFFFF */
 #define TIM_CCR2_CCR2             TIM_CCR2_CCR2_Msk                            /*!<Capture/Compare 2 Value */
 
 /*******************  Bit definition for TIM_CCR3 register  *******************/
 #define TIM_CCR3_CCR3_Pos         (0U)
-#define TIM_CCR3_CCR3_Msk         (0xFFFFUL << TIM_CCR3_CCR3_Pos)              /*!< 0x0000FFFF */
+#define TIM_CCR3_CCR3_Msk         (0xFFFFFFFFUL << TIM_CCR3_CCR3_Pos)          /*!< 0xFFFFFFFF */
 #define TIM_CCR3_CCR3             TIM_CCR3_CCR3_Msk                            /*!<Capture/Compare 3 Value */
 
 /*******************  Bit definition for TIM_CCR4 register  *******************/
 #define TIM_CCR4_CCR4_Pos         (0U)
-#define TIM_CCR4_CCR4_Msk         (0xFFFFUL << TIM_CCR4_CCR4_Pos)              /*!< 0x0000FFFF */
+#define TIM_CCR4_CCR4_Msk         (0xFFFFFFFFUL << TIM_CCR4_CCR4_Pos)          /*!< 0xFFFFFFFF */
 #define TIM_CCR4_CCR4             TIM_CCR4_CCR4_Msk                            /*!<Capture/Compare 4 Value */
 
 /*******************  Bit definition for TIM_CCR5 register  *******************/
 #define TIM_CCR5_CCR5_Pos         (0U)
-#define TIM_CCR5_CCR5_Msk         (0xFFFFFFFFUL << TIM_CCR5_CCR5_Pos)          /*!< 0xFFFFFFFF */
+#define TIM_CCR5_CCR5_Msk         (0xFFFFFUL << TIM_CCR5_CCR5_Pos)             /*!< 0x000FFFFF */
 #define TIM_CCR5_CCR5             TIM_CCR5_CCR5_Msk                            /*!<Capture/Compare 5 Value */
 #define TIM_CCR5_GC5C1_Pos        (29U)
@@ -11857,5 +11859,5 @@
 /*******************  Bit definition for TIM_CCR6 register  *******************/
 #define TIM_CCR6_CCR6_Pos         (0U)
-#define TIM_CCR6_CCR6_Msk         (0xFFFFUL << TIM_CCR6_CCR6_Pos)              /*!< 0x0000FFFF */
+#define TIM_CCR6_CCR6_Msk         (0xFFFFFUL << TIM_CCR6_CCR6_Pos)             /*!< 0x000FFFFF */
 #define TIM_CCR6_CCR6             TIM_CCR6_CCR6_Msk                            /*!<Capture/Compare 6 Value */
 
Index: trunk/fw_g473rct/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h
===================================================================
--- trunk/fw_g473rct/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h	(revision 40)
+++ trunk/fw_g473rct/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h	(revision 55)
@@ -89,9 +89,9 @@
 
 /**
-  * @brief CMSIS Device version number V1.2.5
+  * @brief CMSIS Device version number V1.2.6
   */
 #define __STM32G4_CMSIS_VERSION_MAIN   (0x01U) /*!< [31:24] main version */
 #define __STM32G4_CMSIS_VERSION_SUB1   (0x02U) /*!< [23:16] sub1 version */
-#define __STM32G4_CMSIS_VERSION_SUB2   (0x05U) /*!< [15:8]  sub2 version */
+#define __STM32G4_CMSIS_VERSION_SUB2   (0x06U) /*!< [15:8]  sub2 version */
 #define __STM32G4_CMSIS_VERSION_RC     (0x00U) /*!< [7:0]  release candidate */
 #define __STM32G4_CMSIS_VERSION        ((__STM32G4_CMSIS_VERSION_MAIN << 24)\
Index: trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h
===================================================================
--- trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h	(revision 40)
+++ trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h	(revision 55)
@@ -1280,8 +1280,8 @@
 #define RTC_TAMPERPIN_PI8  RTC_TAMPERPIN_POS1
 
-#if defined(STM32H5) || defined(STM32H7RS)
+#if defined(STM32H5) || defined(STM32H7RS) || defined(STM32N6)
 #define TAMP_SECRETDEVICE_ERASE_NONE        TAMP_DEVICESECRETS_ERASE_NONE
 #define TAMP_SECRETDEVICE_ERASE_BKP_SRAM    TAMP_DEVICESECRETS_ERASE_BKPSRAM
-#endif /* STM32H5 || STM32H7RS */
+#endif /* STM32H5 || STM32H7RS || STM32N6 */
 
 #if defined(STM32WBA)
@@ -1295,8 +1295,8 @@
 #endif /* STM32WBA */
 
-#if defined(STM32H5) || defined(STM32WBA) || defined(STM32H7RS)
+#if defined(STM32H5) || defined(STM32WBA) || defined(STM32H7RS) || defined(STM32N6)
 #define TAMP_SECRETDEVICE_ERASE_DISABLE     TAMP_DEVICESECRETS_ERASE_NONE
 #define TAMP_SECRETDEVICE_ERASE_ENABLE      TAMP_SECRETDEVICE_ERASE_ALL
-#endif /* STM32H5 || STM32WBA || STM32H7RS */
+#endif /* STM32H5 || STM32WBA || STM32H7RS ||  STM32N6 */
 
 #if defined(STM32F7)
@@ -1482,5 +1482,5 @@
 #endif
 
-#if defined(STM32U5)
+#if defined(STM32U5) || defined(STM32MP2)
 #define OCREF_CLEAR_SELECT_Pos       OCREF_CLEAR_SELECT_POS
 #define OCREF_CLEAR_SELECT_Msk       OCREF_CLEAR_SELECT_MSK
@@ -2030,10 +2030,10 @@
   * @{
   */
-#if defined(STM32H5) || defined(STM32WBA) || defined(STM32H7RS)
+#if defined(STM32H5) || defined(STM32WBA) || defined(STM32H7RS) || defined(STM32N6)
 #define HAL_RTCEx_SetBoothardwareKey            HAL_RTCEx_LockBootHardwareKey
 #define HAL_RTCEx_BKUPBlock_Enable              HAL_RTCEx_BKUPBlock
 #define HAL_RTCEx_BKUPBlock_Disable             HAL_RTCEx_BKUPUnblock
 #define HAL_RTCEx_Erase_SecretDev_Conf          HAL_RTCEx_ConfigEraseDeviceSecrets
-#endif /* STM32H5 || STM32WBA || STM32H7RS */
+#endif /* STM32H5 || STM32WBA || STM32H7RS || STM32N6 */
 
 /**
@@ -3696,5 +3696,5 @@
 
 #if defined(STM32L4) || defined(STM32WB) || defined(STM32G0) || defined(STM32G4) || defined(STM32L5) || \
-    defined(STM32WL) || defined(STM32C0) || defined(STM32H7RS) || defined(STM32U0)
+      defined(STM32WL) || defined(STM32C0) || defined(STM32N6) || defined(STM32H7RS) || defined(STM32U0)
 #define RCC_RTCCLKSOURCE_NO_CLK     RCC_RTCCLKSOURCE_NONE
 #else
@@ -3947,5 +3947,6 @@
 #if defined (STM32G0) || defined (STM32L5) || defined (STM32L412xx) || defined (STM32L422xx) || \
     defined (STM32L4P5xx)|| defined (STM32L4Q5xx) || defined (STM32G4) || defined (STM32WL) || defined (STM32U5) || \
-    defined (STM32WBA) || defined (STM32H5) || defined (STM32C0) || defined (STM32H7RS) ||  defined (STM32U0)
+    defined (STM32WBA) || defined (STM32H5) || defined (STM32C0) || defined (STM32N6) || defined (STM32H7RS) ||  \
+    defined (STM32U0) || defined (STM32U3)
 #else
 #define __HAL_RTC_CLEAR_FLAG                      __HAL_RTC_EXTI_CLEAR_FLAG
Index: trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h
===================================================================
--- trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h	(revision 40)
+++ trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h	(revision 55)
@@ -828,5 +828,5 @@
 #if defined(STM32G474xx) || defined(STM32G484xx) || defined(STM32G473xx) || defined(STM32G483xx)
 #define ADC_BATTERY_VOLTAGE_INSTANCE(__HANDLE__) \
-  ((((__HANDLE__)->Instance) != ADC2) || (((__HANDLE__)->Instance) != ADC4))
+  ((((__HANDLE__)->Instance) != ADC2) && (((__HANDLE__)->Instance) != ADC4))
 #elif defined(STM32G411xB) || defined(STM32G411xC) || defined(STM32G414xx) || defined(STM32GBK1CB) || defined(STM32G431xx) || defined(STM32G441xx) || defined(STM32G471xx)
 #define ADC_BATTERY_VOLTAGE_INSTANCE(__HANDLE__)  (((__HANDLE__)->Instance) != ADC2)
Index: trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_crc.h
===================================================================
--- trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_crc.h	(revision 40)
+++ trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_crc.h	(revision 55)
@@ -309,6 +309,6 @@
   * @{
   */
-uint32_t HAL_CRC_Accumulate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength);
-uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength);
+uint32_t HAL_CRC_Accumulate(CRC_HandleTypeDef *hcrc, const uint32_t pBuffer[], uint32_t BufferLength);
+uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, const uint32_t pBuffer[], uint32_t BufferLength);
 /**
   * @}
Index: trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h
===================================================================
--- trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h	(revision 40)
+++ trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h	(revision 55)
@@ -196,5 +196,5 @@
 /* ------------------------- REQUEST -----------------------------------------*/
 HAL_StatusTypeDef HAL_DMAEx_ConfigMuxRequestGenerator(DMA_HandleTypeDef *hdma,
-                                                      HAL_DMA_MuxRequestGeneratorConfigTypeDef *pRequestGeneratorConfig);
+                                                      const HAL_DMA_MuxRequestGeneratorConfigTypeDef *pRequestGeneratorConfig);
 HAL_StatusTypeDef HAL_DMAEx_EnableMuxRequestGenerator(DMA_HandleTypeDef *hdma);
 HAL_StatusTypeDef HAL_DMAEx_DisableMuxRequestGenerator(DMA_HandleTypeDef *hdma);
@@ -202,5 +202,5 @@
 
 /* ------------------------- SYNCHRO -----------------------------------------*/
-HAL_StatusTypeDef HAL_DMAEx_ConfigMuxSync(DMA_HandleTypeDef *hdma, HAL_DMA_MuxSyncConfigTypeDef *pSyncConfig);
+HAL_StatusTypeDef HAL_DMAEx_ConfigMuxSync(DMA_HandleTypeDef *hdma, const HAL_DMA_MuxSyncConfigTypeDef *pSyncConfig);
 /* -------------------------------------------------------------------------- */
 
Index: trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h
===================================================================
--- trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h	(revision 40)
+++ trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h	(revision 55)
@@ -273,7 +273,7 @@
   */
 /* Configuration functions ****************************************************/
-HAL_StatusTypeDef HAL_EXTI_SetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig);
-HAL_StatusTypeDef HAL_EXTI_GetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig);
-HAL_StatusTypeDef HAL_EXTI_ClearConfigLine(EXTI_HandleTypeDef *hexti);
+HAL_StatusTypeDef HAL_EXTI_SetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef const *pExtiConfig);
+HAL_StatusTypeDef HAL_EXTI_GetConfigLine(EXTI_HandleTypeDef const *hexti, EXTI_ConfigTypeDef *pExtiConfig);
+HAL_StatusTypeDef HAL_EXTI_ClearConfigLine(EXTI_HandleTypeDef const *hexti);
 HAL_StatusTypeDef HAL_EXTI_RegisterCallback(EXTI_HandleTypeDef *hexti, EXTI_CallbackIDTypeDef CallbackID, void (*pPendingCbfn)(void));
 HAL_StatusTypeDef HAL_EXTI_GetHandle(EXTI_HandleTypeDef *hexti, uint32_t ExtiLine);
@@ -287,8 +287,8 @@
   */
 /* IO operation functions *****************************************************/
-void              HAL_EXTI_IRQHandler(EXTI_HandleTypeDef *hexti);
-uint32_t          HAL_EXTI_GetPending(EXTI_HandleTypeDef *hexti, uint32_t Edge);
-void              HAL_EXTI_ClearPending(EXTI_HandleTypeDef *hexti, uint32_t Edge);
-void              HAL_EXTI_GenerateSWI(EXTI_HandleTypeDef *hexti);
+void              HAL_EXTI_IRQHandler(EXTI_HandleTypeDef const *hexti);
+uint32_t          HAL_EXTI_GetPending(EXTI_HandleTypeDef const *hexti, uint32_t Edge);
+void              HAL_EXTI_ClearPending(EXTI_HandleTypeDef const *hexti, uint32_t Edge);
+void              HAL_EXTI_GenerateSWI(EXTI_HandleTypeDef const *hexti);
 
 /**
Index: trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h
===================================================================
--- trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h	(revision 40)
+++ trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h	(revision 55)
@@ -283,5 +283,5 @@
 
 /* Initialization and de-initialization functions *****************************/
-void              HAL_GPIO_Init(GPIO_TypeDef  *GPIOx, GPIO_InitTypeDef *GPIO_Init);
+void              HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef const *GPIO_Init);
 void              HAL_GPIO_DeInit(GPIO_TypeDef  *GPIOx, uint32_t GPIO_Pin);
 
@@ -296,5 +296,5 @@
 
 /* IO operation functions *****************************************************/
-GPIO_PinState     HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin);
+GPIO_PinState     HAL_GPIO_ReadPin(GPIO_TypeDef const *GPIOx, uint16_t GPIO_Pin);
 void              HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState);
 void              HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin);
Index: trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd.h
===================================================================
--- trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd.h	(revision 40)
+++ trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd.h	(revision 55)
@@ -165,4 +165,5 @@
 #define PCD_PHY_ULPI                 1U
 #define PCD_PHY_EMBEDDED             2U
+#define PCD_HS_PHY_EMBEDDED          3U
 #define PCD_PHY_UTMI                 3U
 /**
@@ -367,5 +368,5 @@
 
 
-#define USB_WAKEUP_EXTI_LINE                                          (0x1U << 18)  /*!< USB FS EXTI Line WakeUp Interrupt */
+#define USB_WAKEUP_EXTI_LINE                                          (0x1UL << 18)  /*!< USB FS EXTI Line WakeUp Interrupt */
 
 
@@ -419,6 +420,6 @@
 
 /********************  Bit definition for USB_COUNTn_RX register  *************/
-#define USB_CNTRX_NBLK_MSK                    (0x1FU << 10)
-#define USB_CNTRX_BLSIZE                      (0x1U << 15)
+#define USB_CNTRX_NBLK_MSK                    (0x1FUL << 10)
+#define USB_CNTRX_BLSIZE                      (0x1UL << 15)
 
 /* SetENDPOINT */
@@ -809,5 +810,5 @@
     if ((wCount) == 0U) \
     { \
-      *(pdwReg) |= USB_CNTRX_BLSIZE; \
+      *(pdwReg) |= (uint16_t)USB_CNTRX_BLSIZE; \
     } \
     else if ((wCount) <= 62U) \
Index: trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h
===================================================================
--- trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h	(revision 40)
+++ trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h	(revision 55)
@@ -365,5 +365,5 @@
 
 /* Peripheral Control functions  ************************************************/
-HAL_StatusTypeDef HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD);
+HAL_StatusTypeDef HAL_PWR_ConfigPVD(PWR_PVDTypeDef const *sConfigPVD);
 void HAL_PWR_EnablePVD(void);
 void HAL_PWR_DisablePVD(void);
Index: trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h
===================================================================
--- trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h	(revision 40)
+++ trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h	(revision 55)
@@ -765,5 +765,5 @@
 void HAL_PWREx_EnablePVM4(void);
 void HAL_PWREx_DisablePVM4(void);
-HAL_StatusTypeDef HAL_PWREx_ConfigPVM(PWR_PVMTypeDef *sConfigPVM);
+HAL_StatusTypeDef HAL_PWREx_ConfigPVM(PWR_PVMTypeDef const *sConfigPVM);
 
 /* Low Power modes configuration functions ************************************/
Index: trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h
===================================================================
--- trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h	(revision 40)
+++ trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h	(revision 55)
@@ -3356,6 +3356,6 @@
 /* Initialization and de-initialization functions  ******************************/
 HAL_StatusTypeDef HAL_RCC_DeInit(void);
-HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct);
-HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency);
+HAL_StatusTypeDef HAL_RCC_OscConfig(const RCC_OscInitTypeDef *RCC_OscInitStruct);
+HAL_StatusTypeDef HAL_RCC_ClockConfig(const RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency);
 
 /**
Index: trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h
===================================================================
--- trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h	(revision 40)
+++ trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h	(revision 55)
@@ -1269,5 +1269,5 @@
   */
 
-HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef  *PeriphClkInit);
+HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef const *PeriphClkInit);
 void              HAL_RCCEx_GetPeriphCLKConfig(RCC_PeriphCLKInitTypeDef  *PeriphClkInit);
 uint32_t          HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk);
@@ -1297,5 +1297,5 @@
   */
 
-void              HAL_RCCEx_CRSConfig(RCC_CRSInitTypeDef *pInit);
+void              HAL_RCCEx_CRSConfig(RCC_CRSInitTypeDef const *pInit);
 void              HAL_RCCEx_CRSSoftwareSynchronizationGenerate(void);
 void              HAL_RCCEx_CRSGetSynchronizationInfo(RCC_CRSSynchroInfoTypeDef *pSynchroInfo);
Index: trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rtc.h
===================================================================
--- trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rtc.h	(revision 40)
+++ trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rtc.h	(revision 55)
@@ -823,12 +823,12 @@
 /* RTC Time and Date functions ************************************************/
 HAL_StatusTypeDef HAL_RTC_SetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTime, uint32_t Format);
-HAL_StatusTypeDef HAL_RTC_GetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTime, uint32_t Format);
+HAL_StatusTypeDef HAL_RTC_GetTime(RTC_HandleTypeDef const *hrtc, RTC_TimeTypeDef *sTime, uint32_t Format);
 HAL_StatusTypeDef HAL_RTC_SetDate(RTC_HandleTypeDef *hrtc, RTC_DateTypeDef *sDate, uint32_t Format);
-HAL_StatusTypeDef HAL_RTC_GetDate(RTC_HandleTypeDef *hrtc, RTC_DateTypeDef *sDate, uint32_t Format);
+HAL_StatusTypeDef HAL_RTC_GetDate(RTC_HandleTypeDef const *hrtc, RTC_DateTypeDef *sDate, uint32_t Format);
 void              HAL_RTC_DST_Add1Hour(RTC_HandleTypeDef *hrtc);
 void              HAL_RTC_DST_Sub1Hour(RTC_HandleTypeDef *hrtc);
 void              HAL_RTC_DST_SetStoreOperation(RTC_HandleTypeDef *hrtc);
 void              HAL_RTC_DST_ClearStoreOperation(RTC_HandleTypeDef *hrtc);
-uint32_t          HAL_RTC_DST_ReadStoreOperation(RTC_HandleTypeDef *hrtc);
+uint32_t          HAL_RTC_DST_ReadStoreOperation(RTC_HandleTypeDef const *hrtc);
 /**
   * @}
@@ -842,5 +842,5 @@
 HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Format);
 HAL_StatusTypeDef HAL_RTC_DeactivateAlarm(RTC_HandleTypeDef *hrtc, uint32_t Alarm);
-HAL_StatusTypeDef HAL_RTC_GetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Alarm, uint32_t Format);
+HAL_StatusTypeDef HAL_RTC_GetAlarm(RTC_HandleTypeDef const *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Alarm, uint32_t Format);
 void              HAL_RTC_AlarmIRQHandler(RTC_HandleTypeDef *hrtc);
 HAL_StatusTypeDef HAL_RTC_PollForAlarmAEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout);
@@ -863,5 +863,5 @@
   */
 /* Peripheral State functions *************************************************/
-HAL_RTCStateTypeDef HAL_RTC_GetState(RTC_HandleTypeDef *hrtc);
+HAL_RTCStateTypeDef HAL_RTC_GetState(RTC_HandleTypeDef const *hrtc);
 /**
   * @}
Index: trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h
===================================================================
--- trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h	(revision 40)
+++ trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h	(revision 55)
@@ -48,10 +48,8 @@
   uint32_t BaudRate;                /*!< This member configures the UART communication baud rate.
                                          The baud rate register is computed using the following formula:
-                                         LPUART:
-                                         =======
+                                         @note For LPUART :
                                          Baud Rate Register = ((256 * lpuart_ker_ckpres) / ((huart->Init.BaudRate)))
-                                         where lpuart_ker_ck_pres is the UART input clock divided by a prescaler
-                                         UART:
-                                         =====
+                                         where lpuart_ker_ck_pres is the UART input clock divided by a prescaler.
+                                         @note For UART :
                                          - If oversampling is 16 or in LIN mode,
                                             Baud Rate Register = ((uart_ker_ckpres) / ((huart->Init.BaudRate)))
@@ -1289,5 +1287,5 @@
   * @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid)
   */
-#define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 18750001U)
+#define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 18750000U)
 
 /** @brief  Check UART assertion time.
Index: trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h
===================================================================
--- trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h	(revision 40)
+++ trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h	(revision 55)
@@ -82,6 +82,4 @@
 #define ADC_REG_RANK_16_SQRX_BITOFFSET_POS (ADC_SQR4_SQ16_Pos)
 
-
-
 /* Internal mask for ADC group injected sequencer:                            */
 /* To select into literal LL_ADC_INJ_RANK_x the relevant bits for:            */
@@ -107,6 +105,4 @@
 #define ADC_INJ_RANK_3_JSQR_BITOFFSET_POS  (ADC_JSQR_JSQ3_Pos)
 #define ADC_INJ_RANK_4_JSQR_BITOFFSET_POS  (ADC_JSQR_JSQ4_Pos)
-
-
 
 /* Internal mask for ADC group regular trigger:                               */
@@ -138,6 +134,4 @@
 #define ADC_REG_TRIG_EXTEN_BITOFFSET_POS   (ADC_CFGR_EXTEN_Pos)
 
-
-
 /* Internal mask for ADC group injected trigger:                              */
 /* To select into literal LL_ADC_INJ_TRIG_x the relevant bits for:            */
@@ -167,9 +161,4 @@
 #define ADC_INJ_TRIG_EXTSEL_BITOFFSET_POS  (ADC_JSQR_JEXTSEL_Pos)
 #define ADC_INJ_TRIG_EXTEN_BITOFFSET_POS   (ADC_JSQR_JEXTEN_Pos)
-
-
-
-
-
 
 /* Internal mask for ADC channel:                                             */
@@ -368,5 +357,5 @@
 /* ADC internal channels related definitions */
 /* Internal voltage reference VrefInt */
-#define VREFINT_CAL_ADDR                   ((uint16_t*) (0x1FFF75AAUL)) /* Internal voltage reference, address of
+#define VREFINT_CAL_ADDR                   ((const uint16_t*) (0x1FFF75AAUL)) /* Internal voltage reference, address of
                                            parameter VREFINT_CAL: VrefInt ADC raw data acquired at temperature 30 DegC
                                            (tolerance: +-5 DegC), Vref+ = 3.0 V (tolerance: +-10 mV). */
@@ -375,14 +364,14 @@
                                            (tolerance: +-10 mV) (unit: mV). */
 /* Temperature sensor */
-#define TEMPSENSOR_CAL1_ADDR               ((uint16_t*) (0x1FFF75A8UL)) /* Address of parameter TS_CAL1: On STM32G4,
+#define TEMPSENSOR_CAL1_ADDR               ((const uint16_t*) (0x1FFF75A8UL)) /* Address of parameter TS_CAL1:
                                            temperature sensor ADC raw data acquired at temperature  30 DegC
                                            (tolerance: +-5 DegC), Vref+ = 3.0 V (tolerance: +-10 mV). */
-#define TEMPSENSOR_CAL2_ADDR               ((uint16_t*) (0x1FFF75CAUL)) /* Address of parameter TS_CAL2: On STM32G4,
-                                           temperature sensor ADC raw data acquired at temperature 110 DegC
+#define TEMPSENSOR_CAL2_ADDR               ((const uint16_t*) (0x1FFF75CAUL)) /* Address of parameter TS_CAL2:
+                                           temperature sensor ADC raw data acquired at temperature 130 DegC
                                            (tolerance: +-5 DegC), Vref+ = 3.0 V (tolerance: +-10 mV). */
 #define TEMPSENSOR_CAL1_TEMP               (30L)                        /* Temperature at which temperature sensor
                                            has been calibrated in production for data into TEMPSENSOR_CAL1_ADDR
                                            (tolerance: +-5 DegC) (unit: DegC). */
-#define TEMPSENSOR_CAL2_TEMP               (110L)                       /* Temperature at which temperature sensor
+#define TEMPSENSOR_CAL2_TEMP               (130L)                       /* Temperature at which temperature sensor
                                            has been calibrated in production for data into TEMPSENSOR_CAL2_ADDR
                                            (tolerance: +-5 DegC) (unit: DegC). */
@@ -394,5 +383,4 @@
   * @}
   */
-
 
 /* Private macros ------------------------------------------------------------*/
@@ -415,5 +403,4 @@
   * @}
   */
-
 
 /* Exported types ------------------------------------------------------------*/
Index: trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_crs.h
===================================================================
--- trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_crs.h	(revision 40)
+++ trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_crs.h	(revision 55)
@@ -7,5 +7,5 @@
   * @attention
   *
-  * Copyright (c) 2018 STMicroelectronics.
+  * Copyright (c) 2019 STMicroelectronics.
   * All rights reserved.
   *
@@ -18,6 +18,6 @@
 
 /* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32G4xx_LL_CRS_H
-#define __STM32G4xx_LL_CRS_H
+#ifndef STM32G4xx_LL_CRS_H
+#define STM32G4xx_LL_CRS_H
 
 #ifdef __cplusplus
@@ -42,5 +42,4 @@
 /* Private constants ---------------------------------------------------------*/
 /* Private macros ------------------------------------------------------------*/
-
 /* Exported types ------------------------------------------------------------*/
 /* Exported constants --------------------------------------------------------*/
@@ -79,5 +78,5 @@
   * @{
   */
-#define LL_CRS_SYNC_DIV_1                  ((uint32_t)0x00U)                         /*!< Synchro Signal not divided (default) */
+#define LL_CRS_SYNC_DIV_1                  0x00000000U                               /*!< Synchro Signal not divided (default) */
 #define LL_CRS_SYNC_DIV_2                  CRS_CFGR_SYNCDIV_0                        /*!< Synchro Signal divided by 2 */
 #define LL_CRS_SYNC_DIV_4                  CRS_CFGR_SYNCDIV_1                        /*!< Synchro Signal divided by 4 */
@@ -94,5 +93,5 @@
   * @{
   */
-#define LL_CRS_SYNC_SOURCE_GPIO            ((uint32_t)0x00U)       /*!< Synchro Signal source GPIO */
+#define LL_CRS_SYNC_SOURCE_GPIO            0x00000000U             /*!< Synchro Signal source GPIO */
 #define LL_CRS_SYNC_SOURCE_LSE             CRS_CFGR_SYNCSRC_0      /*!< Synchro Signal source LSE */
 #define LL_CRS_SYNC_SOURCE_USB             CRS_CFGR_SYNCSRC_1      /*!< Synchro Signal source USB SOF (default)*/
@@ -104,5 +103,5 @@
   * @{
   */
-#define LL_CRS_SYNC_POLARITY_RISING        ((uint32_t)0x00U)     /*!< Synchro Active on rising edge (default) */
+#define LL_CRS_SYNC_POLARITY_RISING        0x00000000U           /*!< Synchro Active on rising edge (default) */
 #define LL_CRS_SYNC_POLARITY_FALLING       CRS_CFGR_SYNCPOL      /*!< Synchro Active on falling edge */
 /**
@@ -113,6 +112,6 @@
   * @{
   */
-#define LL_CRS_FREQ_ERROR_DIR_UP             ((uint32_t)0x00U)         /*!< Upcounting direction, the actual frequency is above the target */
-#define LL_CRS_FREQ_ERROR_DIR_DOWN           ((uint32_t)CRS_ISR_FEDIR) /*!< Downcounting direction, the actual frequency is below the target */
+#define LL_CRS_FREQ_ERROR_DIR_UP           0x00000000U         /*!< Upcounting direction, the actual frequency is above the target */
+#define LL_CRS_FREQ_ERROR_DIR_DOWN         CRS_ISR_FEDIR       /*!< Downcounting direction, the actual frequency is below the target */
 /**
   * @}
@@ -127,21 +126,23 @@
   *       and a synchronization signal frequency of 1 kHz (SOF signal from USB)
   */
-#define LL_CRS_RELOADVALUE_DEFAULT         ((uint32_t)0xBB7FU)
+#define LL_CRS_RELOADVALUE_DEFAULT         0x0000BB7FU
 
 /**
   * @brief Reset value of Frequency error limit.
   */
-#define LL_CRS_ERRORLIMIT_DEFAULT          ((uint32_t)0x22U)
+#define LL_CRS_ERRORLIMIT_DEFAULT          0x00000022U
 
 /**
   * @brief Reset value of the HSI48 Calibration field
-  * @note The default value is 64, which corresponds to the middle of the trimming interval.
+  * @note The default value is 64,
+  *       which corresponds to the middle of the trimming interval.
   *       The trimming step is specified in the product datasheet.
-  *       A higher TRIM value corresponds to a higher output frequency
-  */
-#define LL_CRS_HSI48CALIBRATION_DEFAULT    ((uint32_t)0x40U)
-/**
-  * @}
-  */
+  *       A higher TRIM value corresponds to a higher output frequency.
+  */
+#define LL_CRS_HSI48CALIBRATION_DEFAULT     0x00000040U
+/**
+  * @}
+  */
+
 /**
   * @}
@@ -441,6 +442,7 @@
   * @param  ReloadValue a number between Min_Data = 0 and Max_Data = 255
   * @param  Settings This parameter can be a combination of the following values:
-  *         @arg @ref LL_CRS_SYNC_DIV_1 or @ref LL_CRS_SYNC_DIV_2 or @ref LL_CRS_SYNC_DIV_4 or @ref LL_CRS_SYNC_DIV_8
-  *              or @ref LL_CRS_SYNC_DIV_16 or @ref LL_CRS_SYNC_DIV_32 or @ref LL_CRS_SYNC_DIV_64 or @ref LL_CRS_SYNC_DIV_128
+  *         @arg @ref LL_CRS_SYNC_DIV_1 or @ref LL_CRS_SYNC_DIV_2 or @ref LL_CRS_SYNC_DIV_4 
+  *              or @ref LL_CRS_SYNC_DIV_8 or @ref LL_CRS_SYNC_DIV_16 or @ref LL_CRS_SYNC_DIV_32
+  *              or @ref LL_CRS_SYNC_DIV_64 or @ref LL_CRS_SYNC_DIV_128
   *         @arg @ref LL_CRS_SYNC_SOURCE_GPIO or @ref LL_CRS_SYNC_SOURCE_LSE or @ref LL_CRS_SYNC_SOURCE_USB
   *         @arg @ref LL_CRS_SYNC_POLARITY_RISING or @ref LL_CRS_SYNC_POLARITY_FALLING
@@ -450,5 +452,6 @@
                                                   uint32_t ReloadValue, uint32_t Settings)
 {
-  MODIFY_REG(CRS->CR, CRS_CR_TRIM, HSI48CalibrationValue);
+  MODIFY_REG(CRS->CR, CRS_CR_TRIM, HSI48CalibrationValue << CRS_CR_TRIM_Pos);
+
   MODIFY_REG(CRS->CFGR,
              CRS_CFGR_RELOAD | CRS_CFGR_FELIM | CRS_CFGR_SYNCDIV | CRS_CFGR_SYNCSRC | CRS_CFGR_SYNCPOL,
@@ -778,4 +781,3 @@
 #endif
 
-#endif /* __STM32G4xx_LL_CRS_H */
-
+#endif /* STM32G4xx_LL_CRS_H */
Index: trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_dmamux.h
===================================================================
--- trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_dmamux.h	(revision 40)
+++ trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_dmamux.h	(revision 55)
@@ -555,5 +555,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_DMAMUX_SetRequestID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t Request)
+__STATIC_INLINE void LL_DMAMUX_SetRequestID(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t Request)
 {
   (void)(DMAMUXx);
@@ -705,5 +705,5 @@
   *         (*) Not on all G4 devices
   */
-__STATIC_INLINE uint32_t LL_DMAMUX_GetRequestID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
+__STATIC_INLINE uint32_t LL_DMAMUX_GetRequestID(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
 {
   (void)(DMAMUXx);
@@ -735,5 +735,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_DMAMUX_SetSyncRequestNb(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t RequestNb)
+__STATIC_INLINE void LL_DMAMUX_SetSyncRequestNb(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t RequestNb)
 {
   (void)(DMAMUXx);
@@ -764,5 +764,5 @@
   * @retval Between Min_Data = 1 and Max_Data = 32
   */
-__STATIC_INLINE uint32_t LL_DMAMUX_GetSyncRequestNb(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
+__STATIC_INLINE uint32_t LL_DMAMUX_GetSyncRequestNb(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
 {
   (void)(DMAMUXx);
@@ -798,5 +798,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_DMAMUX_SetSyncPolarity(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t Polarity)
+__STATIC_INLINE void LL_DMAMUX_SetSyncPolarity(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t Polarity)
 {
   (void)(DMAMUXx);
@@ -831,5 +831,5 @@
   *         @arg @ref LL_DMAMUX_SYNC_POL_RISING_FALLING
   */
-__STATIC_INLINE uint32_t LL_DMAMUX_GetSyncPolarity(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
+__STATIC_INLINE uint32_t LL_DMAMUX_GetSyncPolarity(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
 {
   (void)(DMAMUXx);
@@ -860,5 +860,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_DMAMUX_EnableEventGeneration(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
+__STATIC_INLINE void LL_DMAMUX_EnableEventGeneration(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
 {
   (void)(DMAMUXx);
@@ -889,5 +889,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_DMAMUX_DisableEventGeneration(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
+__STATIC_INLINE void LL_DMAMUX_DisableEventGeneration(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
 {
   (void)(DMAMUXx);
@@ -918,5 +918,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledEventGeneration(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
+__STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledEventGeneration(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
 {
   (void)(DMAMUXx);
@@ -947,5 +947,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_DMAMUX_EnableSync(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
+__STATIC_INLINE void LL_DMAMUX_EnableSync(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
 {
   (void)(DMAMUXx);
@@ -976,5 +976,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_DMAMUX_DisableSync(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
+__STATIC_INLINE void LL_DMAMUX_DisableSync(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
 {
   (void)(DMAMUXx);
@@ -1005,5 +1005,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledSync(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
+__STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledSync(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
 {
   (void)(DMAMUXx);
@@ -1056,5 +1056,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_DMAMUX_SetSyncID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t SyncID)
+__STATIC_INLINE void LL_DMAMUX_SetSyncID(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t SyncID)
 {
   (void)(DMAMUXx);
@@ -1106,5 +1106,5 @@
   *         @arg @ref LL_DMAMUX_SYNC_LPTIM1_OUT
   */
-__STATIC_INLINE uint32_t LL_DMAMUX_GetSyncID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
+__STATIC_INLINE uint32_t LL_DMAMUX_GetSyncID(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
 {
   (void)(DMAMUXx);
@@ -1123,5 +1123,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_DMAMUX_EnableRequestGen(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
+__STATIC_INLINE void LL_DMAMUX_EnableRequestGen(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
 {
   (void)(DMAMUXx);
@@ -1140,5 +1140,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_DMAMUX_DisableRequestGen(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
+__STATIC_INLINE void LL_DMAMUX_DisableRequestGen(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
 {
   (void)(DMAMUXx);
@@ -1157,5 +1157,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledRequestGen(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
+__STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledRequestGen(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
 {
   (void)(DMAMUXx);
@@ -1179,5 +1179,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_DMAMUX_SetRequestGenPolarity(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel,
+__STATIC_INLINE void LL_DMAMUX_SetRequestGenPolarity(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel,
                                                      uint32_t Polarity)
 {
@@ -1202,5 +1202,5 @@
   *         @arg @ref LL_DMAMUX_REQ_GEN_POL_RISING_FALLING
   */
-__STATIC_INLINE uint32_t LL_DMAMUX_GetRequestGenPolarity(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
+__STATIC_INLINE uint32_t LL_DMAMUX_GetRequestGenPolarity(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
 {
   UNUSED(DMAMUXx);
@@ -1222,5 +1222,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_DMAMUX_SetGenRequestNb(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel,
+__STATIC_INLINE void LL_DMAMUX_SetGenRequestNb(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel,
                                                uint32_t RequestNb)
 {
@@ -1241,5 +1241,5 @@
   * @retval Between Min_Data = 1 and Max_Data = 32
   */
-__STATIC_INLINE uint32_t LL_DMAMUX_GetGenRequestNb(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
+__STATIC_INLINE uint32_t LL_DMAMUX_GetGenRequestNb(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
 {
   UNUSED(DMAMUXx);
@@ -1281,5 +1281,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_DMAMUX_SetRequestSignalID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel,
+__STATIC_INLINE void LL_DMAMUX_SetRequestSignalID(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel,
                                                   uint32_t RequestSignalID)
 {
@@ -1321,5 +1321,5 @@
   *         @arg @ref LL_DMAMUX_REQ_GEN_LPTIM1_OUT
   */
-__STATIC_INLINE uint32_t LL_DMAMUX_GetRequestSignalID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
+__STATIC_INLINE uint32_t LL_DMAMUX_GetRequestSignalID(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
 {
   UNUSED(DMAMUXx);
@@ -1342,5 +1342,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO0(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO0(const DMAMUX_Channel_TypeDef *DMAMUXx)
 {
   UNUSED(DMAMUXx);
@@ -1354,5 +1354,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO1(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO1(const DMAMUX_Channel_TypeDef *DMAMUXx)
 {
   UNUSED(DMAMUXx);
@@ -1366,5 +1366,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO2(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO2(const DMAMUX_Channel_TypeDef *DMAMUXx)
 {
   UNUSED(DMAMUXx);
@@ -1378,5 +1378,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO3(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO3(const DMAMUX_Channel_TypeDef *DMAMUXx)
 {
   UNUSED(DMAMUXx);
@@ -1390,5 +1390,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO4(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO4(const DMAMUX_Channel_TypeDef *DMAMUXx)
 {
   UNUSED(DMAMUXx);
@@ -1402,5 +1402,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO5(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO5(const DMAMUX_Channel_TypeDef *DMAMUXx)
 {
   UNUSED(DMAMUXx);
@@ -1414,5 +1414,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO6(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO6(const DMAMUX_Channel_TypeDef *DMAMUXx)
 {
   UNUSED(DMAMUXx);
@@ -1426,5 +1426,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO7(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO7(const DMAMUX_Channel_TypeDef *DMAMUXx)
 {
   UNUSED(DMAMUXx);
@@ -1438,5 +1438,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO8(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO8(const DMAMUX_Channel_TypeDef *DMAMUXx)
 {
   UNUSED(DMAMUXx);
@@ -1450,5 +1450,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO9(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO9(const DMAMUX_Channel_TypeDef *DMAMUXx)
 {
   UNUSED(DMAMUXx);
@@ -1462,5 +1462,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO10(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO10(const DMAMUX_Channel_TypeDef *DMAMUXx)
 {
   UNUSED(DMAMUXx);
@@ -1474,5 +1474,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO11(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO11(const DMAMUX_Channel_TypeDef *DMAMUXx)
 {
   UNUSED(DMAMUXx);
@@ -1487,5 +1487,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO12(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO12(const DMAMUX_Channel_TypeDef *DMAMUXx)
 {
   UNUSED(DMAMUXx);
@@ -1501,5 +1501,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO13(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO13(const DMAMUX_Channel_TypeDef *DMAMUXx)
 {
   UNUSED(DMAMUXx);
@@ -1515,5 +1515,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO14(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO14(const DMAMUX_Channel_TypeDef *DMAMUXx)
 {
   UNUSED(DMAMUXx);
@@ -1529,5 +1529,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO15(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO15(const DMAMUX_Channel_TypeDef *DMAMUXx)
 {
   UNUSED(DMAMUXx);
@@ -1542,5 +1542,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO0(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO0(const DMAMUX_Channel_TypeDef *DMAMUXx)
 {
   UNUSED(DMAMUXx);
@@ -1554,5 +1554,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO1(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO1(const DMAMUX_Channel_TypeDef *DMAMUXx)
 {
   UNUSED(DMAMUXx);
@@ -1566,5 +1566,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO2(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO2(const DMAMUX_Channel_TypeDef *DMAMUXx)
 {
   UNUSED(DMAMUXx);
@@ -1578,5 +1578,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO3(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO3(const DMAMUX_Channel_TypeDef *DMAMUXx)
 {
   UNUSED(DMAMUXx);
@@ -1590,5 +1590,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO0(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO0(const DMAMUX_Channel_TypeDef *DMAMUXx)
 {
   UNUSED(DMAMUXx);
@@ -1602,5 +1602,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO1(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO1(const DMAMUX_Channel_TypeDef *DMAMUXx)
 {
   UNUSED(DMAMUXx);
@@ -1614,5 +1614,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO2(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO2(const DMAMUX_Channel_TypeDef *DMAMUXx)
 {
   UNUSED(DMAMUXx);
@@ -1626,5 +1626,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO3(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO3(const DMAMUX_Channel_TypeDef *DMAMUXx)
 {
   UNUSED(DMAMUXx);
@@ -1638,5 +1638,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO4(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO4(const DMAMUX_Channel_TypeDef *DMAMUXx)
 {
   UNUSED(DMAMUXx);
@@ -1650,5 +1650,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO5(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO5(const DMAMUX_Channel_TypeDef *DMAMUXx)
 {
   UNUSED(DMAMUXx);
@@ -1662,5 +1662,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO6(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO6(const DMAMUX_Channel_TypeDef *DMAMUXx)
 {
   UNUSED(DMAMUXx);
@@ -1674,5 +1674,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO7(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO7(const DMAMUX_Channel_TypeDef *DMAMUXx)
 {
   UNUSED(DMAMUXx);
@@ -1686,5 +1686,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO8(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO8(const DMAMUX_Channel_TypeDef *DMAMUXx)
 {
   UNUSED(DMAMUXx);
@@ -1698,5 +1698,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO9(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO9(const DMAMUX_Channel_TypeDef *DMAMUXx)
 {
   UNUSED(DMAMUXx);
@@ -1710,5 +1710,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO10(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO10(const DMAMUX_Channel_TypeDef *DMAMUXx)
 {
   UNUSED(DMAMUXx);
@@ -1722,5 +1722,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO11(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO11(const DMAMUX_Channel_TypeDef *DMAMUXx)
 {
   UNUSED(DMAMUXx);
@@ -1735,5 +1735,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO12(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO12(const DMAMUX_Channel_TypeDef *DMAMUXx)
 {
   UNUSED(DMAMUXx);
@@ -1749,5 +1749,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO13(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO13(const DMAMUX_Channel_TypeDef *DMAMUXx)
 {
   UNUSED(DMAMUXx);
@@ -1763,5 +1763,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO14(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO14(const DMAMUX_Channel_TypeDef *DMAMUXx)
 {
   UNUSED(DMAMUXx);
@@ -1777,5 +1777,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO15(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO15(const DMAMUX_Channel_TypeDef *DMAMUXx)
 {
   UNUSED(DMAMUXx);
@@ -1790,5 +1790,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO0(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO0(const DMAMUX_Channel_TypeDef *DMAMUXx)
 {
   UNUSED(DMAMUXx);
@@ -1802,5 +1802,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO1(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO1(const DMAMUX_Channel_TypeDef *DMAMUXx)
 {
   UNUSED(DMAMUXx);
@@ -1814,5 +1814,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO2(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO2(const DMAMUX_Channel_TypeDef *DMAMUXx)
 {
   UNUSED(DMAMUXx);
@@ -1826,5 +1826,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO3(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO3(const DMAMUX_Channel_TypeDef *DMAMUXx)
 {
   UNUSED(DMAMUXx);
@@ -1863,5 +1863,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_DMAMUX_EnableIT_SO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
+__STATIC_INLINE void LL_DMAMUX_EnableIT_SO(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
 {
   (void)(DMAMUXx);
@@ -1892,5 +1892,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_DMAMUX_DisableIT_SO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
+__STATIC_INLINE void LL_DMAMUX_DisableIT_SO(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
 {
   (void)(DMAMUXx);
@@ -1921,5 +1921,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledIT_SO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
+__STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledIT_SO(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
 {
   (void)(DMAMUXx);
@@ -1938,5 +1938,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_DMAMUX_EnableIT_RGO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
+__STATIC_INLINE void LL_DMAMUX_EnableIT_RGO(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
 {
   UNUSED(DMAMUXx);
@@ -1956,5 +1956,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_DMAMUX_DisableIT_RGO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
+__STATIC_INLINE void LL_DMAMUX_DisableIT_RGO(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
 {
   UNUSED(DMAMUXx);
@@ -1974,5 +1974,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledIT_RGO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
+__STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledIT_RGO(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
 {
   UNUSED(DMAMUXx);
Index: trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_gpio.h
===================================================================
--- trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_gpio.h	(revision 40)
+++ trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_gpio.h	(revision 55)
@@ -317,5 +317,5 @@
   *         @arg @ref LL_GPIO_MODE_ANALOG
   */
-__STATIC_INLINE uint32_t LL_GPIO_GetPinMode(GPIO_TypeDef *GPIOx, uint32_t Pin)
+__STATIC_INLINE uint32_t LL_GPIO_GetPinMode(GPIO_TypeDef const *GPIOx, uint32_t Pin)
 {
   return (uint32_t)(READ_BIT(GPIOx->MODER,
@@ -386,5 +386,5 @@
   *         @arg @ref LL_GPIO_OUTPUT_OPENDRAIN
   */
-__STATIC_INLINE uint32_t LL_GPIO_GetPinOutputType(GPIO_TypeDef *GPIOx, uint32_t Pin)
+__STATIC_INLINE uint32_t LL_GPIO_GetPinOutputType(GPIO_TypeDef const *GPIOx, uint32_t Pin)
 {
   return (uint32_t)(READ_BIT(GPIOx->OTYPER, Pin) >> POSITION_VAL(Pin));
@@ -460,5 +460,5 @@
   *         @arg @ref LL_GPIO_SPEED_FREQ_VERY_HIGH
   */
-__STATIC_INLINE uint32_t LL_GPIO_GetPinSpeed(GPIO_TypeDef *GPIOx, uint32_t Pin)
+__STATIC_INLINE uint32_t LL_GPIO_GetPinSpeed(GPIO_TypeDef const *GPIOx, uint32_t Pin)
 {
   return (uint32_t)(READ_BIT(GPIOx->OSPEEDR,
@@ -526,5 +526,5 @@
   *         @arg @ref LL_GPIO_PULL_DOWN
   */
-__STATIC_INLINE uint32_t LL_GPIO_GetPinPull(GPIO_TypeDef *GPIOx, uint32_t Pin)
+__STATIC_INLINE uint32_t LL_GPIO_GetPinPull(GPIO_TypeDef const *GPIOx, uint32_t Pin)
 {
   return (uint32_t)(READ_BIT(GPIOx->PUPDR,
@@ -603,5 +603,5 @@
   *         @arg @ref LL_GPIO_AF_15
   */
-__STATIC_INLINE uint32_t LL_GPIO_GetAFPin_0_7(GPIO_TypeDef *GPIOx, uint32_t Pin)
+__STATIC_INLINE uint32_t LL_GPIO_GetAFPin_0_7(GPIO_TypeDef const *GPIOx, uint32_t Pin)
 {
   return (uint32_t)(READ_BIT(GPIOx->AFR[0],
@@ -681,5 +681,5 @@
   *         @arg @ref LL_GPIO_AF_15
   */
-__STATIC_INLINE uint32_t LL_GPIO_GetAFPin_8_15(GPIO_TypeDef *GPIOx, uint32_t Pin)
+__STATIC_INLINE uint32_t LL_GPIO_GetAFPin_8_15(GPIO_TypeDef const *GPIOx, uint32_t Pin)
 {
   return (uint32_t)(READ_BIT(GPIOx->AFR[1],
@@ -752,5 +752,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_GPIO_IsPinLocked(GPIO_TypeDef *GPIOx, uint32_t PinMask)
+__STATIC_INLINE uint32_t LL_GPIO_IsPinLocked(GPIO_TypeDef const *GPIOx, uint32_t PinMask)
 {
   return ((READ_BIT(GPIOx->LCKR, PinMask) == (PinMask)) ? 1UL : 0UL);
@@ -763,5 +763,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_GPIO_IsAnyPinLocked(GPIO_TypeDef *GPIOx)
+__STATIC_INLINE uint32_t LL_GPIO_IsAnyPinLocked(GPIO_TypeDef const *GPIOx)
 {
   return ((READ_BIT(GPIOx->LCKR, GPIO_LCKR_LCKK) == (GPIO_LCKR_LCKK)) ? 1UL : 0UL);
@@ -782,5 +782,5 @@
   * @retval Input data register value of port
   */
-__STATIC_INLINE uint32_t LL_GPIO_ReadInputPort(GPIO_TypeDef *GPIOx)
+__STATIC_INLINE uint32_t LL_GPIO_ReadInputPort(GPIO_TypeDef const *GPIOx)
 {
   return (uint32_t)(READ_REG(GPIOx->IDR));
@@ -811,5 +811,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_GPIO_IsInputPinSet(GPIO_TypeDef *GPIOx, uint32_t PinMask)
+__STATIC_INLINE uint32_t LL_GPIO_IsInputPinSet(GPIO_TypeDef const *GPIOx, uint32_t PinMask)
 {
   return ((READ_BIT(GPIOx->IDR, PinMask) == (PinMask)) ? 1UL : 0UL);
@@ -834,5 +834,5 @@
   * @retval Output data register value of port
   */
-__STATIC_INLINE uint32_t LL_GPIO_ReadOutputPort(GPIO_TypeDef *GPIOx)
+__STATIC_INLINE uint32_t LL_GPIO_ReadOutputPort(GPIO_TypeDef const *GPIOx)
 {
   return (uint32_t)(READ_REG(GPIOx->ODR));
@@ -863,5 +863,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_GPIO_IsOutputPinSet(GPIO_TypeDef *GPIOx, uint32_t PinMask)
+__STATIC_INLINE uint32_t LL_GPIO_IsOutputPinSet(GPIO_TypeDef const *GPIOx, uint32_t PinMask)
 {
   return ((READ_BIT(GPIOx->ODR, PinMask) == (PinMask)) ? 1UL : 0UL);
@@ -965,5 +965,5 @@
   */
 
-ErrorStatus LL_GPIO_DeInit(GPIO_TypeDef *GPIOx);
+ErrorStatus LL_GPIO_DeInit(GPIO_TypeDef const *GPIOx);
 ErrorStatus LL_GPIO_Init(GPIO_TypeDef *GPIOx, LL_GPIO_InitTypeDef *GPIO_InitStruct);
 void        LL_GPIO_StructInit(LL_GPIO_InitTypeDef *GPIO_InitStruct);
Index: trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_iwdg.h
===================================================================
--- trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_iwdg.h	(revision 40)
+++ trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_iwdg.h	(revision 55)
@@ -309,5 +309,5 @@
   * @retval State of bits (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_IWDG_IsReady(IWDG_TypeDef *IWDGx)
+__STATIC_INLINE uint32_t LL_IWDG_IsReady(const IWDG_TypeDef *IWDGx)
 {
   return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU | IWDG_SR_WVU) == 0U) ? 1UL : 0UL);
Index: trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_lpuart.h
===================================================================
--- trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_lpuart.h	(revision 40)
+++ trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_lpuart.h	(revision 55)
@@ -57,4 +57,8 @@
   (uint16_t)64,
   (uint16_t)128,
+  (uint16_t)256,
+  (uint16_t)256,
+  (uint16_t)256,
+  (uint16_t)256,
   (uint16_t)256
 };
Index: trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_rtc.h
===================================================================
--- trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_rtc.h	(revision 40)
+++ trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_rtc.h	(revision 55)
@@ -824,5 +824,5 @@
   *         @arg @ref LL_RTC_HOURFORMAT_AMPM
   */
-__STATIC_INLINE uint32_t LL_RTC_GetHourFormat(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_GetHourFormat(RTC_TypeDef const *RTCx)
 {
   return (uint32_t)(READ_BIT(RTCx->CR, RTC_CR_FMT));
@@ -856,5 +856,5 @@
   *         @arg @ref LL_RTC_ALARMOUT_WAKEUP
   */
-__STATIC_INLINE uint32_t LL_RTC_GetAlarmOutEvent(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_GetAlarmOutEvent(RTC_TypeDef const *RTCx)
 {
   return (uint32_t)(READ_BIT(RTCx->CR, RTC_CR_OSEL));
@@ -883,5 +883,5 @@
   *         @arg @ref LL_RTC_ALARM_OUTPUTTYPE_PUSHPULL
   */
-__STATIC_INLINE uint32_t LL_RTC_GetAlarmOutputType(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_GetAlarmOutputType(RTC_TypeDef const *RTCx)
 {
   return (uint32_t)(READ_BIT(RTCx->CR, RTC_CR_TAMPALRM_TYPE));
@@ -939,5 +939,5 @@
   *         @arg @ref LL_RTC_OUTPUTPOLARITY_PIN_LOW
   */
-__STATIC_INLINE uint32_t LL_RTC_GetOutputPolarity(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_GetOutputPolarity(RTC_TypeDef const *RTCx)
 {
   return (uint32_t)(READ_BIT(RTCx->CR, RTC_CR_POL));
@@ -973,5 +973,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsShadowRegBypassEnabled(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsShadowRegBypassEnabled(RTC_TypeDef const *RTCx)
 {
   return ((READ_BIT(RTCx->CR, RTC_CR_BYPSHAD) == (RTC_CR_BYPSHAD)) ? 1U : 0U);
@@ -1034,5 +1034,5 @@
   * @retval Value between Min_Data = 0 and Max_Data = 0x7F
   */
-__STATIC_INLINE uint32_t LL_RTC_GetAsynchPrescaler(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_GetAsynchPrescaler(RTC_TypeDef const *RTCx)
 {
   return (uint32_t)(READ_BIT(RTCx->PRER, RTC_PRER_PREDIV_A) >> RTC_PRER_PREDIV_A_Pos);
@@ -1045,5 +1045,5 @@
   * @retval Value between Min_Data = 0 and Max_Data = 0x7FFF
   */
-__STATIC_INLINE uint32_t LL_RTC_GetSynchPrescaler(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_GetSynchPrescaler(RTC_TypeDef const *RTCx)
 {
   return (uint32_t)(READ_BIT(RTCx->PRER, RTC_PRER_PREDIV_S));
@@ -1103,5 +1103,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsTamperOutputEnabled(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsTamperOutputEnabled(RTC_TypeDef const *RTCx)
 {
   return ((READ_BIT(RTCx->CR, RTC_CR_TAMPOE) == (RTC_CR_TAMPOE)) ? 1U : 0U);
@@ -1136,5 +1136,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsAlarmPullUpEnabled(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsAlarmPullUpEnabled(RTC_TypeDef const *RTCx)
 {
   return ((READ_BIT(RTCx->CR, RTC_CR_TAMPALRM_PU) == (RTC_CR_TAMPALRM_PU)) ? 1U : 0U);
@@ -1172,5 +1172,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsOutput2Enabled(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsOutput2Enabled(RTC_TypeDef const *RTCx)
 {
   return ((READ_BIT(RTCx->CR, RTC_CR_OUT2EN) == (RTC_CR_OUT2EN)) ? 1U : 0U);
@@ -1213,5 +1213,5 @@
   *         @arg @ref LL_RTC_TIME_FORMAT_PM
   */
-__STATIC_INLINE uint32_t LL_RTC_TIME_GetFormat(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_TIME_GetFormat(RTC_TypeDef const *RTCx)
 {
   return (uint32_t)(READ_BIT(RTCx->TR, RTC_TR_PM));
@@ -1248,5 +1248,5 @@
   * @retval Value between Min_Data=0x01 and Max_Data=0x12 or between Min_Data=0x00 and Max_Data=0x23
   */
-__STATIC_INLINE uint32_t LL_RTC_TIME_GetHour(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_TIME_GetHour(RTC_TypeDef const *RTCx)
 {
   return (uint32_t)((READ_BIT(RTCx->TR, (RTC_TR_HT | RTC_TR_HU))) >> RTC_TR_HU_Pos);
@@ -1283,5 +1283,5 @@
   * @retval Value between Min_Data=0x00 and Max_Data=0x59
   */
-__STATIC_INLINE uint32_t LL_RTC_TIME_GetMinute(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_TIME_GetMinute(RTC_TypeDef const *RTCx)
 {
   return (uint32_t)(READ_BIT(RTCx->TR, (RTC_TR_MNT | RTC_TR_MNU)) >> RTC_TR_MNU_Pos);
@@ -1318,5 +1318,5 @@
   * @retval Value between Min_Data=0x00 and Max_Data=0x59
   */
-__STATIC_INLINE uint32_t LL_RTC_TIME_GetSecond(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_TIME_GetSecond(RTC_TypeDef const *RTCx)
 {
   return (uint32_t)(READ_BIT(RTCx->TR, (RTC_TR_ST | RTC_TR_SU)) >> RTC_TR_SU_Pos);
@@ -1373,5 +1373,5 @@
   * @retval Combination of hours, minutes and seconds (Format: 0x00HHMMSS).
   */
-__STATIC_INLINE uint32_t LL_RTC_TIME_Get(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_TIME_Get(RTC_TypeDef const *RTCx)
 {
   uint32_t temp;
@@ -1413,5 +1413,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_TIME_IsDayLightStoreEnabled(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_TIME_IsDayLightStoreEnabled(RTC_TypeDef const *RTCx)
 {
   return ((READ_BIT(RTCx->CR, RTC_CR_BKP) == (RTC_CR_BKP)) ? 1U : 0U);
@@ -1455,5 +1455,5 @@
   * @retval Sub second value (number between 0 and 65535)
   */
-__STATIC_INLINE uint32_t LL_RTC_TIME_GetSubSecond(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_TIME_GetSubSecond(RTC_TypeDef const *RTCx)
 {
   return (uint32_t)(READ_BIT(RTCx->SSR, RTC_SSR_SS));
@@ -1512,5 +1512,5 @@
   * @retval Value between Min_Data=0x00 and Max_Data=0x99
   */
-__STATIC_INLINE uint32_t LL_RTC_DATE_GetYear(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_DATE_GetYear(RTC_TypeDef const *RTCx)
 {
   return (uint32_t)((READ_BIT(RTCx->DR, (RTC_DR_YT | RTC_DR_YU))) >> RTC_DR_YU_Pos);
@@ -1551,5 +1551,5 @@
   *         @arg @ref LL_RTC_WEEKDAY_SUNDAY
   */
-__STATIC_INLINE uint32_t LL_RTC_DATE_GetWeekDay(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_DATE_GetWeekDay(RTC_TypeDef const *RTCx)
 {
   return (uint32_t)(READ_BIT(RTCx->DR, RTC_DR_WDU) >> RTC_DR_WDU_Pos);
@@ -1605,5 +1605,5 @@
   *         @arg @ref LL_RTC_MONTH_DECEMBER
   */
-__STATIC_INLINE uint32_t LL_RTC_DATE_GetMonth(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_DATE_GetMonth(RTC_TypeDef const *RTCx)
 {
   return (uint32_t)((READ_BIT(RTCx->DR, (RTC_DR_MT | RTC_DR_MU))) >> RTC_DR_MU_Pos);
@@ -1635,5 +1635,5 @@
   * @retval Value between Min_Data=0x01 and Max_Data=0x31
   */
-__STATIC_INLINE uint32_t LL_RTC_DATE_GetDay(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_DATE_GetDay(RTC_TypeDef const *RTCx)
 {
   return (uint32_t)((READ_BIT(RTCx->DR, (RTC_DR_DT | RTC_DR_DU))) >> RTC_DR_DU_Pos);
@@ -1704,5 +1704,5 @@
   * @retval Combination of WeekDay, Day, Month and Year (Format: 0xWWDDMMYY).
   */
-__STATIC_INLINE uint32_t LL_RTC_DATE_Get(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_DATE_Get(RTC_TypeDef const *RTCx)
 {
   uint32_t temp;
@@ -1783,5 +1783,5 @@
   *         @arg @ref LL_RTC_ALMA_MASK_ALL
   */
-__STATIC_INLINE uint32_t LL_RTC_ALMA_GetMask(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_ALMA_GetMask(RTC_TypeDef const *RTCx)
 {
   return (uint32_t)(READ_BIT(RTCx->ALRMAR, RTC_ALRMAR_MSK4 | RTC_ALRMAR_MSK3 | RTC_ALRMAR_MSK2 | RTC_ALRMAR_MSK1));
@@ -1833,5 +1833,5 @@
   * @retval Value between Min_Data=0x01 and Max_Data=0x31
   */
-__STATIC_INLINE uint32_t LL_RTC_ALMA_GetDay(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_ALMA_GetDay(RTC_TypeDef const *RTCx)
 {
   return (uint32_t)((READ_BIT(RTCx->ALRMAR, (RTC_ALRMAR_DT | RTC_ALRMAR_DU))) >> RTC_ALRMAR_DU_Pos);
@@ -1870,5 +1870,5 @@
   *         @arg @ref LL_RTC_WEEKDAY_SUNDAY
   */
-__STATIC_INLINE uint32_t LL_RTC_ALMA_GetWeekDay(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_ALMA_GetWeekDay(RTC_TypeDef const *RTCx)
 {
   return (uint32_t)(READ_BIT(RTCx->ALRMAR, RTC_ALRMAR_DU) >> RTC_ALRMAR_DU_Pos);
@@ -1897,5 +1897,5 @@
   *         @arg @ref LL_RTC_ALMA_TIME_FORMAT_PM
   */
-__STATIC_INLINE uint32_t LL_RTC_ALMA_GetTimeFormat(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_ALMA_GetTimeFormat(RTC_TypeDef const *RTCx)
 {
   return (uint32_t)(READ_BIT(RTCx->ALRMAR, RTC_ALRMAR_PM));
@@ -1925,5 +1925,5 @@
   * @retval Value between Min_Data=0x01 and Max_Data=0x12 or between Min_Data=0x00 and Max_Data=0x23
   */
-__STATIC_INLINE uint32_t LL_RTC_ALMA_GetHour(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_ALMA_GetHour(RTC_TypeDef const *RTCx)
 {
   return (uint32_t)((READ_BIT(RTCx->ALRMAR, (RTC_ALRMAR_HT | RTC_ALRMAR_HU))) >> RTC_ALRMAR_HU_Pos);
@@ -1953,5 +1953,5 @@
   * @retval Value between Min_Data=0x00 and Max_Data=0x59
   */
-__STATIC_INLINE uint32_t LL_RTC_ALMA_GetMinute(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_ALMA_GetMinute(RTC_TypeDef const *RTCx)
 {
   return (uint32_t)((READ_BIT(RTCx->ALRMAR, (RTC_ALRMAR_MNT | RTC_ALRMAR_MNU))) >> RTC_ALRMAR_MNU_Pos);
@@ -1981,5 +1981,5 @@
   * @retval Value between Min_Data=0x00 and Max_Data=0x59
   */
-__STATIC_INLINE uint32_t LL_RTC_ALMA_GetSecond(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_ALMA_GetSecond(RTC_TypeDef const *RTCx)
 {
   return (uint32_t)((READ_BIT(RTCx->ALRMAR, (RTC_ALRMAR_ST | RTC_ALRMAR_SU))) >> RTC_ALRMAR_SU_Pos);
@@ -2030,5 +2030,5 @@
   * @retval Combination of hours, minutes and seconds.
   */
-__STATIC_INLINE uint32_t LL_RTC_ALMA_GetTime(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_ALMA_GetTime(RTC_TypeDef const *RTCx)
 {
   return (uint32_t)((LL_RTC_ALMA_GetHour(RTCx) << RTC_OFFSET_HOUR) | (LL_RTC_ALMA_GetMinute(RTCx) << RTC_OFFSET_MINUTE) | LL_RTC_ALMA_GetSecond(RTCx));
@@ -2055,5 +2055,5 @@
   * @retval Value between Min_Data=0x00 and Max_Data=0xF
   */
-__STATIC_INLINE uint32_t LL_RTC_ALMA_GetSubSecondMask(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_ALMA_GetSubSecondMask(RTC_TypeDef const *RTCx)
 {
   return (uint32_t)(READ_BIT(RTCx->ALRMASSR, RTC_ALRMASSR_MASKSS) >> RTC_ALRMASSR_MASKSS_Pos);
@@ -2078,5 +2078,5 @@
   * @retval Value between Min_Data=0x00 and Max_Data=0x7FFF
   */
-__STATIC_INLINE uint32_t LL_RTC_ALMA_GetSubSecond(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_ALMA_GetSubSecond(RTC_TypeDef const *RTCx)
 {
   return (uint32_t)(READ_BIT(RTCx->ALRMASSR, RTC_ALRMASSR_SS));
@@ -2151,5 +2151,5 @@
   *         @arg @ref LL_RTC_ALMB_MASK_ALL
   */
-__STATIC_INLINE uint32_t LL_RTC_ALMB_GetMask(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_ALMB_GetMask(RTC_TypeDef const *RTCx)
 {
   return (uint32_t)(READ_BIT(RTCx->ALRMBR, RTC_ALRMBR_MSK4 | RTC_ALRMBR_MSK3 | RTC_ALRMBR_MSK2 | RTC_ALRMBR_MSK1));
@@ -2201,5 +2201,5 @@
   * @retval Value between Min_Data=0x01 and Max_Data=0x31
   */
-__STATIC_INLINE uint32_t LL_RTC_ALMB_GetDay(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_ALMB_GetDay(RTC_TypeDef const *RTCx)
 {
   return (uint32_t)((READ_BIT(RTCx->ALRMBR, (RTC_ALRMBR_DT | RTC_ALRMBR_DU))) >> RTC_ALRMBR_DU_Pos);
@@ -2238,5 +2238,5 @@
   *         @arg @ref LL_RTC_WEEKDAY_SUNDAY
   */
-__STATIC_INLINE uint32_t LL_RTC_ALMB_GetWeekDay(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_ALMB_GetWeekDay(RTC_TypeDef const *RTCx)
 {
   return (uint32_t)(READ_BIT(RTCx->ALRMBR, RTC_ALRMBR_DU) >> RTC_ALRMBR_DU_Pos);
@@ -2265,5 +2265,5 @@
   *         @arg @ref LL_RTC_ALMB_TIME_FORMAT_PM
   */
-__STATIC_INLINE uint32_t LL_RTC_ALMB_GetTimeFormat(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_ALMB_GetTimeFormat(RTC_TypeDef const *RTCx)
 {
   return (uint32_t)(READ_BIT(RTCx->ALRMBR, RTC_ALRMBR_PM));
@@ -2293,5 +2293,5 @@
   * @retval Value between Min_Data=0x01 and Max_Data=0x12 or between Min_Data=0x00 and Max_Data=0x23
   */
-__STATIC_INLINE uint32_t LL_RTC_ALMB_GetHour(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_ALMB_GetHour(RTC_TypeDef const *RTCx)
 {
   return (uint32_t)((READ_BIT(RTCx->ALRMBR, (RTC_ALRMBR_HT | RTC_ALRMBR_HU))) >> RTC_ALRMBR_HU_Pos);
@@ -2321,5 +2321,5 @@
   * @retval Value between Min_Data=0x00 and Max_Data=0x59
   */
-__STATIC_INLINE uint32_t LL_RTC_ALMB_GetMinute(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_ALMB_GetMinute(RTC_TypeDef const *RTCx)
 {
   return (uint32_t)((READ_BIT(RTCx->ALRMBR, (RTC_ALRMBR_MNT | RTC_ALRMBR_MNU))) >> RTC_ALRMBR_MNU_Pos);
@@ -2349,5 +2349,5 @@
   * @retval Value between Min_Data=0x00 and Max_Data=0x59
   */
-__STATIC_INLINE uint32_t LL_RTC_ALMB_GetSecond(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_ALMB_GetSecond(RTC_TypeDef const *RTCx)
 {
   return (uint32_t)((READ_BIT(RTCx->ALRMBR, (RTC_ALRMBR_ST | RTC_ALRMBR_SU))) >> RTC_ALRMBR_SU_Pos);
@@ -2423,5 +2423,5 @@
   * @retval Value between Min_Data=0x00 and Max_Data=0xF
   */
-__STATIC_INLINE uint32_t LL_RTC_ALMB_GetSubSecondMask(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_ALMB_GetSubSecondMask(RTC_TypeDef const *RTCx)
 {
   return (uint32_t)(READ_BIT(RTCx->ALRMBSSR, RTC_ALRMBSSR_MASKSS)  >> RTC_ALRMBSSR_MASKSS_Pos);
@@ -2446,5 +2446,5 @@
   * @retval Value between Min_Data=0x00 and Max_Data=0x7FFF
   */
-__STATIC_INLINE uint32_t LL_RTC_ALMB_GetSubSecond(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_ALMB_GetSubSecond(RTC_TypeDef const *RTCx)
 {
   return (uint32_t)(READ_BIT(RTCx->ALRMBSSR, RTC_ALRMBSSR_SS));
@@ -2532,5 +2532,5 @@
   *         @arg @ref LL_RTC_TIMESTAMP_EDGE_FALLING
   */
-__STATIC_INLINE uint32_t LL_RTC_TS_GetActiveEdge(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_TS_GetActiveEdge(RTC_TypeDef const *RTCx)
 {
   return (uint32_t)(READ_BIT(RTCx->CR, RTC_CR_TSEDGE));
@@ -2545,5 +2545,5 @@
   *         @arg @ref LL_RTC_TS_TIME_FORMAT_PM
   */
-__STATIC_INLINE uint32_t LL_RTC_TS_GetTimeFormat(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_TS_GetTimeFormat(RTC_TypeDef const *RTCx)
 {
   return (uint32_t)(READ_BIT(RTCx->TSTR, RTC_TSTR_PM));
@@ -2558,5 +2558,5 @@
   * @retval Value between Min_Data=0x01 and Max_Data=0x12 or between Min_Data=0x00 and Max_Data=0x23
   */
-__STATIC_INLINE uint32_t LL_RTC_TS_GetHour(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_TS_GetHour(RTC_TypeDef const *RTCx)
 {
   return (uint32_t)(READ_BIT(RTCx->TSTR, RTC_TSTR_HT | RTC_TSTR_HU) >> RTC_TSTR_HU_Pos);
@@ -2571,5 +2571,5 @@
   * @retval Value between Min_Data=0x00 and Max_Data=0x59
   */
-__STATIC_INLINE uint32_t LL_RTC_TS_GetMinute(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_TS_GetMinute(RTC_TypeDef const *RTCx)
 {
   return (uint32_t)(READ_BIT(RTCx->TSTR, RTC_TSTR_MNT | RTC_TSTR_MNU) >> RTC_TSTR_MNU_Pos);
@@ -2584,5 +2584,5 @@
   * @retval Value between Min_Data=0x00 and Max_Data=0x59
   */
-__STATIC_INLINE uint32_t LL_RTC_TS_GetSecond(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_TS_GetSecond(RTC_TypeDef const *RTCx)
 {
   return (uint32_t)(READ_BIT(RTCx->TSTR, RTC_TSTR_ST | RTC_TSTR_SU));
@@ -2602,5 +2602,5 @@
   * @retval Combination of hours, minutes and seconds.
   */
-__STATIC_INLINE uint32_t LL_RTC_TS_GetTime(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_TS_GetTime(RTC_TypeDef const *RTCx)
 {
   return (uint32_t)(READ_BIT(RTCx->TSTR,
@@ -2621,5 +2621,5 @@
   *         @arg @ref LL_RTC_WEEKDAY_SUNDAY
   */
-__STATIC_INLINE uint32_t LL_RTC_TS_GetWeekDay(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_TS_GetWeekDay(RTC_TypeDef const *RTCx)
 {
   return (uint32_t)(READ_BIT(RTCx->TSDR, RTC_TSDR_WDU) >> RTC_TSDR_WDU_Pos);
@@ -2646,5 +2646,5 @@
   *         @arg @ref LL_RTC_MONTH_DECEMBER
   */
-__STATIC_INLINE uint32_t LL_RTC_TS_GetMonth(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_TS_GetMonth(RTC_TypeDef const *RTCx)
 {
   return (uint32_t)(READ_BIT(RTCx->TSDR, RTC_TSDR_MT | RTC_TSDR_MU) >> RTC_TSDR_MU_Pos);
@@ -2659,5 +2659,5 @@
   * @retval Value between Min_Data=0x01 and Max_Data=0x31
   */
-__STATIC_INLINE uint32_t LL_RTC_TS_GetDay(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_TS_GetDay(RTC_TypeDef const *RTCx)
 {
   return (uint32_t)(READ_BIT(RTCx->TSDR, RTC_TSDR_DT | RTC_TSDR_DU));
@@ -2676,5 +2676,5 @@
   * @retval Combination of Weekday, Day and Month
   */
-__STATIC_INLINE uint32_t LL_RTC_TS_GetDate(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_TS_GetDate(RTC_TypeDef const *RTCx)
 {
   return (uint32_t)(READ_BIT(RTCx->TSDR, RTC_TSDR_WDU | RTC_TSDR_MT | RTC_TSDR_MU | RTC_TSDR_DT | RTC_TSDR_DU));
@@ -2687,5 +2687,5 @@
   * @retval Value between Min_Data=0x00 and Max_Data=0xFFFF
   */
-__STATIC_INLINE uint32_t LL_RTC_TS_GetSubSecond(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_TS_GetSubSecond(RTC_TypeDef const *RTCx)
 {
   return (uint32_t)(READ_BIT(RTCx->TSSSR, RTC_TSSSR_SS));
@@ -2734,5 +2734,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_TAMPER_Enable(RTC_TypeDef *RTCx, uint32_t Tamper)
+__STATIC_INLINE void LL_RTC_TAMPER_Enable(RTC_TypeDef const *RTCx, uint32_t Tamper)
 {
   UNUSED(RTCx);
@@ -2751,5 +2751,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_TAMPER_Disable(RTC_TypeDef *RTCx, uint32_t Tamper)
+__STATIC_INLINE void LL_RTC_TAMPER_Disable(RTC_TypeDef const *RTCx, uint32_t Tamper)
 {
   UNUSED(RTCx);
@@ -2769,5 +2769,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_TAMPER_EnableMask(RTC_TypeDef *RTCx, uint32_t Mask)
+__STATIC_INLINE void LL_RTC_TAMPER_EnableMask(RTC_TypeDef const *RTCx, uint32_t Mask)
 {
   UNUSED(RTCx);
@@ -2786,5 +2786,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_TAMPER_DisableMask(RTC_TypeDef *RTCx, uint32_t Mask)
+__STATIC_INLINE void LL_RTC_TAMPER_DisableMask(RTC_TypeDef const *RTCx, uint32_t Mask)
 {
   UNUSED(RTCx);
@@ -2803,5 +2803,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_TAMPER_EnableEraseBKP(RTC_TypeDef *RTCx, uint32_t Tamper)
+__STATIC_INLINE void LL_RTC_TAMPER_EnableEraseBKP(RTC_TypeDef const *RTCx, uint32_t Tamper)
 {
   UNUSED(RTCx);
@@ -2820,5 +2820,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_TAMPER_DisableEraseBKP(RTC_TypeDef *RTCx, uint32_t Tamper)
+__STATIC_INLINE void LL_RTC_TAMPER_DisableEraseBKP(RTC_TypeDef const *RTCx, uint32_t Tamper)
 {
   UNUSED(RTCx);
@@ -2832,5 +2832,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_TAMPER_DisablePullUp(RTC_TypeDef *RTCx)
+__STATIC_INLINE void LL_RTC_TAMPER_DisablePullUp(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -2844,5 +2844,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_TAMPER_EnablePullUp(RTC_TypeDef *RTCx)
+__STATIC_INLINE void LL_RTC_TAMPER_EnablePullUp(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -2861,5 +2861,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_TAMPER_SetPrecharge(RTC_TypeDef *RTCx, uint32_t Duration)
+__STATIC_INLINE void LL_RTC_TAMPER_SetPrecharge(RTC_TypeDef const *RTCx, uint32_t Duration)
 {
   UNUSED(RTCx);
@@ -2877,5 +2877,5 @@
   *         @arg @ref LL_RTC_TAMPER_DURATION_8RTCCLK
   */
-__STATIC_INLINE uint32_t LL_RTC_TAMPER_GetPrecharge(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_TAMPER_GetPrecharge(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -2894,5 +2894,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_TAMPER_SetFilterCount(RTC_TypeDef *RTCx, uint32_t FilterCount)
+__STATIC_INLINE void LL_RTC_TAMPER_SetFilterCount(RTC_TypeDef const *RTCx, uint32_t FilterCount)
 {
   UNUSED(RTCx);
@@ -2910,5 +2910,5 @@
   *         @arg @ref LL_RTC_TAMPER_FILTER_8SAMPLE
   */
-__STATIC_INLINE uint32_t LL_RTC_TAMPER_GetFilterCount(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_TAMPER_GetFilterCount(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -2931,5 +2931,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_TAMPER_SetSamplingFreq(RTC_TypeDef *RTCx, uint32_t SamplingFreq)
+__STATIC_INLINE void LL_RTC_TAMPER_SetSamplingFreq(RTC_TypeDef const *RTCx, uint32_t SamplingFreq)
 {
   UNUSED(RTCx);
@@ -2951,5 +2951,5 @@
   *         @arg @ref LL_RTC_TAMPER_SAMPLFREQDIV_256
   */
-__STATIC_INLINE uint32_t LL_RTC_TAMPER_GetSamplingFreq(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_TAMPER_GetSamplingFreq(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -2968,5 +2968,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_TAMPER_EnableActiveLevel(RTC_TypeDef *RTCx, uint32_t Tamper)
+__STATIC_INLINE void LL_RTC_TAMPER_EnableActiveLevel(RTC_TypeDef const *RTCx, uint32_t Tamper)
 {
   UNUSED(RTCx);
@@ -2985,5 +2985,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_TAMPER_DisableActiveLevel(RTC_TypeDef *RTCx, uint32_t Tamper)
+__STATIC_INLINE void LL_RTC_TAMPER_DisableActiveLevel(RTC_TypeDef const *RTCx, uint32_t Tamper)
 {
   UNUSED(RTCx);
@@ -3020,5 +3020,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_TAMPER_ITAMP_Enable(RTC_TypeDef *RTCx, uint32_t InternalTamper)
+__STATIC_INLINE void LL_RTC_TAMPER_ITAMP_Enable(RTC_TypeDef const *RTCx, uint32_t InternalTamper)
 {
   UNUSED(RTCx);
@@ -3047,5 +3047,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_TAMPER_ITAMP_Disable(RTC_TypeDef *RTCx, uint32_t InternalTamper)
+__STATIC_INLINE void LL_RTC_TAMPER_ITAMP_Disable(RTC_TypeDef const *RTCx, uint32_t InternalTamper)
 {
   UNUSED(RTCx);
@@ -3092,5 +3092,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_WAKEUP_IsEnabled(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_WAKEUP_IsEnabled(RTC_TypeDef const *RTCx)
 {
   return ((READ_BIT(RTCx->CR, RTC_CR_WUTE) == (RTC_CR_WUTE)) ? 1U : 0U);
@@ -3129,5 +3129,5 @@
   *         @arg @ref LL_RTC_WAKEUPCLOCK_CKSPRE_WUT
   */
-__STATIC_INLINE uint32_t LL_RTC_WAKEUP_GetClock(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_WAKEUP_GetClock(RTC_TypeDef const *RTCx)
 {
   return (uint32_t)(READ_BIT(RTCx->CR, RTC_CR_WUCKSEL));
@@ -3153,5 +3153,5 @@
   * @retval Value between Min_Data=0x00 and Max_Data=0xFFFF
   */
-__STATIC_INLINE uint32_t LL_RTC_WAKEUP_GetAutoReload(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_WAKEUP_GetAutoReload(RTC_TypeDef const *RTCx)
 {
   return (uint32_t)(READ_BIT(RTCx->WUTR, RTC_WUTR_WUT));
@@ -3179,5 +3179,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_BKP_SetRegister(RTC_TypeDef *RTCx, uint32_t BackupRegister, uint32_t Data)
+__STATIC_INLINE void LL_RTC_BKP_SetRegister(RTC_TypeDef const *RTCx, uint32_t BackupRegister, uint32_t Data)
 {
   __IO uint32_t *tmp;
@@ -3203,5 +3203,5 @@
   * @retval Value between Min_Data=0x00 and Max_Data=0xFFFFFFFF
   */
-__STATIC_INLINE uint32_t LL_RTC_BKP_GetRegister(RTC_TypeDef *RTCx, uint32_t BackupRegister)
+__STATIC_INLINE uint32_t LL_RTC_BKP_GetRegister(RTC_TypeDef const *RTCx, uint32_t BackupRegister)
 {
   const __IO uint32_t *tmp;
@@ -3250,5 +3250,5 @@
   *         @arg @ref LL_RTC_CALIB_OUTPUT_512HZ
   */
-__STATIC_INLINE uint32_t LL_RTC_CAL_GetOutputFreq(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_CAL_GetOutputFreq(RTC_TypeDef const *RTCx)
 {
   return (uint32_t)(READ_BIT(RTCx->CR, RTC_CR_COE | RTC_CR_COSEL));
@@ -3277,5 +3277,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_CAL_IsPulseInserted(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_CAL_IsPulseInserted(RTC_TypeDef const *RTCx)
 {
   return ((READ_BIT(RTCx->CALR, RTC_CALR_CALP) == (RTC_CALR_CALP)) ? 1U : 0U);
@@ -3310,5 +3310,5 @@
   *         @arg @ref LL_RTC_CALIB_PERIOD_8SEC
   */
-__STATIC_INLINE uint32_t LL_RTC_CAL_GetPeriod(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_CAL_GetPeriod(RTC_TypeDef const *RTCx)
 {
   return (uint32_t)(READ_BIT(RTCx->CALR, RTC_CALR_CALW8 | RTC_CALR_CALW16));
@@ -3335,5 +3335,5 @@
   * @retval Value between Min_Data=0x00 and Max_Data= 0x1FF
   */
-__STATIC_INLINE uint32_t LL_RTC_CAL_GetMinus(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_CAL_GetMinus(RTC_TypeDef const *RTCx)
 {
   return (uint32_t)(READ_BIT(RTCx->CALR, RTC_CALR_CALM));
@@ -3354,5 +3354,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ITS(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ITS(RTC_TypeDef const *RTCx)
 {
   return ((READ_BIT(RTCx->SR, RTC_SR_ITSF) == (RTC_SR_ITSF)) ? 1U : 0U);
@@ -3365,5 +3365,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_RECALP(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_RECALP(RTC_TypeDef const *RTCx)
 {
   return ((READ_BIT(RTCx->ICSR, RTC_ICSR_RECALPF) == (RTC_ICSR_RECALPF)) ? 1U : 0U);
@@ -3376,5 +3376,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TSOV(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TSOV(RTC_TypeDef const *RTCx)
 {
   return ((READ_BIT(RTCx->SR, RTC_SR_TSOVF) == (RTC_SR_TSOVF)) ? 1U : 0U);
@@ -3387,5 +3387,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TS(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TS(RTC_TypeDef const *RTCx)
 {
   return ((READ_BIT(RTCx->SR, RTC_SR_TSF) == (RTC_SR_TSF)) ? 1U : 0U);
@@ -3398,5 +3398,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_WUT(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_WUT(RTC_TypeDef const *RTCx)
 {
   return ((READ_BIT(RTCx->SR, RTC_SR_WUTF) == (RTC_SR_WUTF)) ? 1U : 0U);
@@ -3409,5 +3409,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ALRB(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ALRB(RTC_TypeDef const *RTCx)
 {
   return ((READ_BIT(RTCx->SR, RTC_SR_ALRBF) == (RTC_SR_ALRBF)) ? 1U : 0U);
@@ -3420,5 +3420,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ALRA(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ALRA(RTC_TypeDef const *RTCx)
 {
   return ((READ_BIT(RTCx->SR, RTC_SR_ALRAF) == (RTC_SR_ALRAF)) ? 1U : 0U);
@@ -3497,5 +3497,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_INIT(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_INIT(RTC_TypeDef const *RTCx)
 {
   return ((READ_BIT(RTCx->ICSR, RTC_ICSR_INITF) == (RTC_ICSR_INITF)) ? 1U : 0U);
@@ -3508,5 +3508,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_RS(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_RS(RTC_TypeDef const *RTCx)
 {
   return ((READ_BIT(RTCx->ICSR, RTC_ICSR_RSF) == (RTC_ICSR_RSF)) ? 1U : 0U);
@@ -3530,5 +3530,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_INITS(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_INITS(RTC_TypeDef const *RTCx)
 {
   return ((READ_BIT(RTCx->ICSR, RTC_ICSR_INITS) == (RTC_ICSR_INITS)) ? 1U : 0U);
@@ -3541,5 +3541,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_SHP(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_SHP(RTC_TypeDef const *RTCx)
 {
   return ((READ_BIT(RTCx->ICSR, RTC_ICSR_SHPF) == (RTC_ICSR_SHPF)) ? 1U : 0U);
@@ -3552,5 +3552,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_WUTW(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_WUTW(RTC_TypeDef const *RTCx)
 {
   return ((READ_BIT(RTCx->ICSR, RTC_ICSR_WUTWF) == (RTC_ICSR_WUTWF)) ? 1U : 0U);
@@ -3563,5 +3563,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ALRBW(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ALRBW(RTC_TypeDef const *RTCx)
 {
   return ((READ_BIT(RTCx->ICSR, RTC_ICSR_ALRBWF) == (RTC_ICSR_ALRBWF)) ? 1U : 0U);
@@ -3574,5 +3574,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ALRAW(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ALRAW(RTC_TypeDef const *RTCx)
 {
   return ((READ_BIT(RTCx->ICSR, RTC_ICSR_ALRAWF) == (RTC_ICSR_ALRAWF)) ? 1U : 0U);
@@ -3585,5 +3585,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ALRAM(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ALRAM(RTC_TypeDef const *RTCx)
 {
   return ((READ_BIT(RTCx->MISR, RTC_MISR_ALRAMF) == (RTC_MISR_ALRAMF)) ? 1U : 0U);
@@ -3596,5 +3596,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ALRBM(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ALRBM(RTC_TypeDef const *RTCx)
 {
   return ((READ_BIT(RTCx->MISR, RTC_MISR_ALRBMF) == (RTC_MISR_ALRBMF)) ? 1U : 0U);
@@ -3607,5 +3607,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_WUTM(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_WUTM(RTC_TypeDef const *RTCx)
 {
   return ((READ_BIT(RTCx->MISR, RTC_MISR_WUTMF) == (RTC_MISR_WUTMF)) ? 1U : 0U);
@@ -3618,5 +3618,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TSM(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TSM(RTC_TypeDef const *RTCx)
 {
   return ((READ_BIT(RTCx->MISR, RTC_MISR_TSMF) == (RTC_MISR_TSMF)) ? 1U : 0U);
@@ -3629,5 +3629,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TSOVM(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TSOVM(RTC_TypeDef const *RTCx)
 {
   return ((READ_BIT(RTCx->MISR, RTC_MISR_TSOVMF) == (RTC_MISR_TSOVMF)) ? 1U : 0U);
@@ -3640,5 +3640,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ITSM(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ITSM(RTC_TypeDef const *RTCx)
 {
   return ((READ_BIT(RTCx->MISR, RTC_MISR_ITSMF) == (RTC_MISR_ITSMF)) ? 1U : 0U);
@@ -3651,5 +3651,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TAMP1(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TAMP1(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -3663,5 +3663,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TAMP2(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TAMP2(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -3676,5 +3676,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TAMP3(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TAMP3(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -3700,5 +3700,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TAMP4(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TAMP4(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -3711,5 +3711,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TAMP5(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TAMP5(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -3722,5 +3722,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TAMP6(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TAMP6(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -3733,5 +3733,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TAMP7(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TAMP7(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -3744,5 +3744,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TAMP8(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TAMP8(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -3758,5 +3758,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ITAMP1(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ITAMP1(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -3772,5 +3772,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ITAMP2(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ITAMP2(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -3785,5 +3785,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ITAMP3(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ITAMP3(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -3797,5 +3797,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ITAMP4(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ITAMP4(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -3808,5 +3808,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ITAMP5(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ITAMP5(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -3821,5 +3821,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ITAMP6(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ITAMP6(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -3849,5 +3849,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ITAMP8(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ITAMP8(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -3960,5 +3960,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TAMP1M(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TAMP1M(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -3972,5 +3972,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TAMP2M(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TAMP2M(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -3985,5 +3985,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TAMP3M(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TAMP3M(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -4008,5 +4008,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TAMP4M(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TAMP4M(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -4019,5 +4019,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TAMP5M(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TAMP5M(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -4030,5 +4030,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TAMP6M(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TAMP6M(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -4041,5 +4041,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TAMP7M(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TAMP7M(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -4052,5 +4052,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TAMP8M(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TAMP8M(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -4066,5 +4066,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ITAMP1M(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ITAMP1M(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -4080,5 +4080,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ITAMP2M(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ITAMP2M(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -4093,5 +4093,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ITAMP3M(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ITAMP3M(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -4105,5 +4105,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ITAMP4M(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ITAMP4M(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -4117,5 +4117,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ITAMP5M(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ITAMP5M(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -4130,5 +4130,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ITAMP6M(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ITAMP6M(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -4158,5 +4158,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ITAMP8M(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ITAMP8M(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -4171,5 +4171,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_ClearFlag_TAMP1(RTC_TypeDef *RTCx)
+__STATIC_INLINE void LL_RTC_ClearFlag_TAMP1(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -4183,5 +4183,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_ClearFlag_TAMP2(RTC_TypeDef *RTCx)
+__STATIC_INLINE void LL_RTC_ClearFlag_TAMP2(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -4196,5 +4196,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_ClearFlag_TAMP3(RTC_TypeDef *RTCx)
+__STATIC_INLINE void LL_RTC_ClearFlag_TAMP3(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -4219,5 +4219,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_ClearFlag_TAMP4(RTC_TypeDef *RTCx)
+__STATIC_INLINE void LL_RTC_ClearFlag_TAMP4(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -4230,5 +4230,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_ClearFlag_TAMP5(RTC_TypeDef *RTCx)
+__STATIC_INLINE void LL_RTC_ClearFlag_TAMP5(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -4241,5 +4241,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_ClearFlag_TAMP6(RTC_TypeDef *RTCx)
+__STATIC_INLINE void LL_RTC_ClearFlag_TAMP6(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -4252,5 +4252,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_ClearFlag_TAMP7(RTC_TypeDef *RTCx)
+__STATIC_INLINE void LL_RTC_ClearFlag_TAMP7(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -4263,5 +4263,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_ClearFlag_TAMP8(RTC_TypeDef *RTCx)
+__STATIC_INLINE void LL_RTC_ClearFlag_TAMP8(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -4278,5 +4278,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_ClearFlag_ITAMP1(RTC_TypeDef *RTCx)
+__STATIC_INLINE void LL_RTC_ClearFlag_ITAMP1(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -4292,5 +4292,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_ClearFlag_ITAMP2(RTC_TypeDef *RTCx)
+__STATIC_INLINE void LL_RTC_ClearFlag_ITAMP2(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -4305,5 +4305,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_ClearFlag_ITAMP3(RTC_TypeDef *RTCx)
+__STATIC_INLINE void LL_RTC_ClearFlag_ITAMP3(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -4317,5 +4317,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_ClearFlag_ITAMP4(RTC_TypeDef *RTCx)
+__STATIC_INLINE void LL_RTC_ClearFlag_ITAMP4(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -4329,5 +4329,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_ClearFlag_ITAMP5(RTC_TypeDef *RTCx)
+__STATIC_INLINE void LL_RTC_ClearFlag_ITAMP5(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -4342,5 +4342,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_ClearFlag_ITAMP6(RTC_TypeDef *RTCx)
+__STATIC_INLINE void LL_RTC_ClearFlag_ITAMP6(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -4487,5 +4487,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_TS(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_TS(RTC_TypeDef const *RTCx)
 {
   return ((READ_BIT(RTCx->CR, RTC_CR_TSIE) == (RTC_CR_TSIE)) ? 1U : 0U);
@@ -4498,5 +4498,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_WUT(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_WUT(RTC_TypeDef const *RTCx)
 {
   return ((READ_BIT(RTCx->CR, RTC_CR_WUTIE) == (RTC_CR_WUTIE)) ? 1U : 0U);
@@ -4509,5 +4509,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_ALRB(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_ALRB(RTC_TypeDef const *RTCx)
 {
   return ((READ_BIT(RTCx->CR, RTC_CR_ALRBIE) == (RTC_CR_ALRBIE)) ? 1U : 0U);
@@ -4520,5 +4520,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_ALRA(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_ALRA(RTC_TypeDef const *RTCx)
 {
   return ((READ_BIT(RTCx->CR, RTC_CR_ALRAIE) == (RTC_CR_ALRAIE)) ? 1U : 0U);
@@ -4531,5 +4531,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_EnableIT_TAMP1(RTC_TypeDef *RTCx)
+__STATIC_INLINE void LL_RTC_EnableIT_TAMP1(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -4543,5 +4543,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_DisableIT_TAMP1(RTC_TypeDef *RTCx)
+__STATIC_INLINE void LL_RTC_DisableIT_TAMP1(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -4555,5 +4555,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_EnableIT_TAMP2(RTC_TypeDef *RTCx)
+__STATIC_INLINE void LL_RTC_EnableIT_TAMP2(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -4567,5 +4567,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_DisableIT_TAMP2(RTC_TypeDef *RTCx)
+__STATIC_INLINE void LL_RTC_DisableIT_TAMP2(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -4580,5 +4580,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_EnableIT_TAMP3(RTC_TypeDef *RTCx)
+__STATIC_INLINE void LL_RTC_EnableIT_TAMP3(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -4591,5 +4591,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_DisableIT_TAMP3(RTC_TypeDef *RTCx)
+__STATIC_INLINE void LL_RTC_DisableIT_TAMP3(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -4625,5 +4625,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_EnableIT_TAMP4(RTC_TypeDef *RTCx)
+__STATIC_INLINE void LL_RTC_EnableIT_TAMP4(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -4636,5 +4636,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_DisableIT_TAMP4(RTC_TypeDef *RTCx)
+__STATIC_INLINE void LL_RTC_DisableIT_TAMP4(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -4648,5 +4648,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_EnableIT_TAMP5(RTC_TypeDef *RTCx)
+__STATIC_INLINE void LL_RTC_EnableIT_TAMP5(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -4659,5 +4659,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_DisableIT_TAMP5(RTC_TypeDef *RTCx)
+__STATIC_INLINE void LL_RTC_DisableIT_TAMP5(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -4671,5 +4671,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_EnableIT_TAMP6(RTC_TypeDef *RTCx)
+__STATIC_INLINE void LL_RTC_EnableIT_TAMP6(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -4682,5 +4682,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_DisableIT_TAMP6(RTC_TypeDef *RTCx)
+__STATIC_INLINE void LL_RTC_DisableIT_TAMP6(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -4694,5 +4694,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_EnableIT_TAMP7(RTC_TypeDef *RTCx)
+__STATIC_INLINE void LL_RTC_EnableIT_TAMP7(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -4705,5 +4705,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_DisableIT_TAMP7(RTC_TypeDef *RTCx)
+__STATIC_INLINE void LL_RTC_DisableIT_TAMP7(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -4717,5 +4717,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_EnableIT_TAMP8(RTC_TypeDef *RTCx)
+__STATIC_INLINE void LL_RTC_EnableIT_TAMP8(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -4728,5 +4728,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_DisableIT_TAMP8(RTC_TypeDef *RTCx)
+__STATIC_INLINE void LL_RTC_DisableIT_TAMP8(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -4929,5 +4929,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_EnableIT_ITAMP1(RTC_TypeDef *RTCx)
+__STATIC_INLINE void LL_RTC_EnableIT_ITAMP1(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -4940,5 +4940,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_DisableIT_ITAMP1(RTC_TypeDef *RTCx)
+__STATIC_INLINE void LL_RTC_DisableIT_ITAMP1(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -4954,5 +4954,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_EnableIT_ITAMP2(RTC_TypeDef *RTCx)
+__STATIC_INLINE void LL_RTC_EnableIT_ITAMP2(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -4965,5 +4965,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_DisableIT_ITAMP2(RTC_TypeDef *RTCx)
+__STATIC_INLINE void LL_RTC_DisableIT_ITAMP2(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -4978,5 +4978,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_EnableIT_ITAMP3(RTC_TypeDef *RTCx)
+__STATIC_INLINE void LL_RTC_EnableIT_ITAMP3(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -4989,5 +4989,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_DisableIT_ITAMP3(RTC_TypeDef *RTCx)
+__STATIC_INLINE void LL_RTC_DisableIT_ITAMP3(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -5001,5 +5001,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_EnableIT_ITAMP4(RTC_TypeDef *RTCx)
+__STATIC_INLINE void LL_RTC_EnableIT_ITAMP4(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -5012,5 +5012,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_DisableIT_ITAMP4(RTC_TypeDef *RTCx)
+__STATIC_INLINE void LL_RTC_DisableIT_ITAMP4(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -5024,5 +5024,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_EnableIT_ITAMP5(RTC_TypeDef *RTCx)
+__STATIC_INLINE void LL_RTC_EnableIT_ITAMP5(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -5035,5 +5035,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_DisableIT_ITAMP5(RTC_TypeDef *RTCx)
+__STATIC_INLINE void LL_RTC_DisableIT_ITAMP5(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -5048,5 +5048,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_EnableIT_ITAMP6(RTC_TypeDef *RTCx)
+__STATIC_INLINE void LL_RTC_EnableIT_ITAMP6(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -5059,5 +5059,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_DisableIT_ITAMP6(RTC_TypeDef *RTCx)
+__STATIC_INLINE void LL_RTC_DisableIT_ITAMP6(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -5100,5 +5100,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_EnableIT_ITAMP8(RTC_TypeDef *RTCx)
+__STATIC_INLINE void LL_RTC_EnableIT_ITAMP8(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -5111,5 +5111,5 @@
   * @retval None
   */
-__STATIC_INLINE void LL_RTC_DisableIT_ITAMP8(RTC_TypeDef *RTCx)
+__STATIC_INLINE void LL_RTC_DisableIT_ITAMP8(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -5310,5 +5310,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_TAMP1(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_TAMP1(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -5322,5 +5322,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_TAMP2(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_TAMP2(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -5336,5 +5336,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_TAMP3(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_TAMP3(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -5360,5 +5360,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_TAMP4(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_TAMP4(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -5371,5 +5371,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_TAMP5(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_TAMP5(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -5382,5 +5382,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_TAMP6(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_TAMP6(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -5393,5 +5393,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_TAMP7(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_TAMP7(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -5404,5 +5404,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_TAMP8(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_TAMP8(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -5420,5 +5420,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_ITAMP1(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_ITAMP1(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -5434,5 +5434,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_ITAMP2(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_ITAMP2(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -5447,5 +5447,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_ITAMP3(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_ITAMP3(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -5458,5 +5458,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_ITAMP4(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_ITAMP4(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -5470,5 +5470,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_ITAMP5(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_ITAMP5(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
@@ -5483,5 +5483,5 @@
   * @retval State of bit (1 or 0).
   */
-__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_ITAMP6(RTC_TypeDef *RTCx)
+__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_ITAMP6(RTC_TypeDef const *RTCx)
 {
   UNUSED(RTCx);
Index: trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_spi.h
===================================================================
--- trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_spi.h	(revision 40)
+++ trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_spi.h	(revision 55)
@@ -2268,5 +2268,5 @@
 
 ErrorStatus LL_I2S_DeInit(const SPI_TypeDef *SPIx);
-ErrorStatus LL_I2S_Init(SPI_TypeDef *SPIx, LL_I2S_InitTypeDef *I2S_InitStruct);
+ErrorStatus LL_I2S_Init(SPI_TypeDef *SPIx,const LL_I2S_InitTypeDef *I2S_InitStruct);
 void        LL_I2S_StructInit(LL_I2S_InitTypeDef *I2S_InitStruct);
 void        LL_I2S_ConfigPrescaler(SPI_TypeDef *SPIx, uint32_t PrescalerLinear, uint32_t PrescalerParity);
Index: trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usart.h
===================================================================
--- trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usart.h	(revision 40)
+++ trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usart.h	(revision 55)
@@ -57,4 +57,8 @@
   64UL,
   128UL,
+  256UL,
+  256UL,
+  256UL,
+  256UL,
   256UL
 };
Index: trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usb.h
===================================================================
--- trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usb.h	(revision 40)
+++ trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usb.h	(revision 55)
@@ -76,4 +76,5 @@
 } USB_CfgTypeDef;
 
+#if defined (HAL_PCD_MODULE_ENABLED)
 typedef struct
 {
@@ -120,4 +121,5 @@
   uint8_t   xfer_fill_db;         /*!< double buffer Need to Fill new buffer  used with bulk_in                 */
 } USB_EPTypeDef;
+#endif /* defined (HAL_PCD_MODULE_ENABLED) */
 
 /* Exported constants --------------------------------------------------------*/
@@ -162,5 +164,5 @@
 
 #ifndef USB_EP_RX_STRX
-#define USB_EP_RX_STRX                         (0x3U << 12)
+#define USB_EP_RX_STRX                         (0x3UL << 12)
 #endif /* USB_EP_RX_STRX */
 
@@ -187,9 +189,9 @@
 
 
-HAL_StatusTypeDef USB_CoreInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg);
+HAL_StatusTypeDef USB_CoreInit(USB_TypeDef const *USBx, USB_CfgTypeDef cfg);
 HAL_StatusTypeDef USB_DevInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg);
 HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx);
 HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx);
-HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx, USB_ModeTypeDef mode);
+HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef const *USBx, USB_ModeTypeDef mode);
 
 HAL_StatusTypeDef USB_FlushRxFifo(USB_TypeDef const *USBx);
@@ -240,4 +242,3 @@
 #endif /* __cplusplus */
 
-
 #endif /* STM32G4xx_LL_USB_H */
Index: trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
===================================================================
--- trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c	(revision 40)
+++ trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c	(revision 55)
@@ -49,9 +49,9 @@
 /* Private define ------------------------------------------------------------*/
 /**
-  * @brief STM32G4xx HAL Driver version number V1.2.5
+  * @brief STM32G4xx HAL Driver version number V1.2.6
   */
 #define __STM32G4xx_HAL_VERSION_MAIN   (0x01U) /*!< [31:24] main version */
 #define __STM32G4xx_HAL_VERSION_SUB1   (0x02U) /*!< [23:16] sub1 version */
-#define __STM32G4xx_HAL_VERSION_SUB2   (0x05U) /*!< [15:8]  sub2 version */
+#define __STM32G4xx_HAL_VERSION_SUB2   (0x06U) /*!< [15:8]  sub2 version */
 #define __STM32G4xx_HAL_VERSION_RC     (0x00U) /*!< [7:0]  release candidate */
 #define __STM32G4xx_HAL_VERSION         ((__STM32G4xx_HAL_VERSION_MAIN << 24U)\
Index: trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c
===================================================================
--- trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c	(revision 40)
+++ trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c	(revision 55)
@@ -2775,8 +2775,4 @@
   assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), pConfig->Offset));
 
-  /* if ROVSE is set, the value of the OFFSETy_EN bit in ADCx_OFRy register is
-     ignored (considered as reset) */
-  assert_param(!((pConfig->OffsetNumber != ADC_OFFSET_NONE) && (hadc->Init.OversamplingMode == ENABLE)));
-
   /* Verification of channel number */
   if (pConfig->SingleDiff != ADC_DIFFERENTIAL_ENDED)
Index: trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c
===================================================================
--- trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c	(revision 40)
+++ trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c	(revision 55)
@@ -857,5 +857,5 @@
   * @param hadc ADC handle of ADC master (handle of ADC slave must not be used)
   * @param pData Destination Buffer address.
-  * @param Length Length of data to be transferred from ADC peripheral to memory (in bytes).
+  * @param Length Length of data to be transferred from ADC peripheral to memory.
   * @retval HAL status
   */
@@ -1053,11 +1053,14 @@
     /* Note: DMA channel of ADC slave should be stopped after this function   */
     /*       with HAL_ADC_Stop_DMA() API.                                     */
-    tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
-
-    /* Check if DMA channel effectively disabled */
-    if (tmp_hal_status == HAL_ERROR)
-    {
-      /* Update ADC state machine to error */
-      SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
+    if (hadc->DMA_Handle->State == HAL_DMA_STATE_BUSY)
+    {
+      tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
+
+      /* Check if DMA channel effectively disabled */
+      if (tmp_hal_status == HAL_ERROR)
+      {
+        /* Update ADC state machine to error */
+        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
+      }
     }
 
@@ -1409,11 +1412,14 @@
     /* Disable the DMA channel (in case of DMA in circular mode or stop while */
     /* while DMA transfer is on going)                                        */
-    tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
-
-    /* Check if DMA channel effectively disabled */
-    if (tmp_hal_status != HAL_OK)
-    {
-      /* Update ADC state machine to error */
-      SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
+    if (hadc->DMA_Handle->State == HAL_DMA_STATE_BUSY)
+    {
+      tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
+
+      /* Check if DMA channel effectively disabled */
+      if (tmp_hal_status == HAL_ERROR)
+      {
+        /* Update ADC state machine to error */
+        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
+      }
     }
 
@@ -1549,11 +1555,14 @@
     /* Note: DMA channel of ADC slave should be stopped after this function   */
     /* with HAL_ADCEx_RegularStop_DMA() API.                                  */
-    tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
-
-    /* Check if DMA channel effectively disabled */
-    if (tmp_hal_status != HAL_OK)
-    {
-      /* Update ADC state machine to error */
-      SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
+    if (hadc->DMA_Handle->State == HAL_DMA_STATE_BUSY)
+    {
+      tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
+
+      /* Check if DMA channel effectively disabled */
+      if (tmp_hal_status == HAL_ERROR)
+      {
+        /* Update ADC state machine to error */
+        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
+      }
     }
 
Index: trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_crc.c
===================================================================
--- trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_crc.c	(revision 40)
+++ trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_crc.c	(revision 55)
@@ -65,6 +65,6 @@
   * @{
   */
-static uint32_t CRC_Handle_8(CRC_HandleTypeDef *hcrc, uint8_t pBuffer[], uint32_t BufferLength);
-static uint32_t CRC_Handle_16(CRC_HandleTypeDef *hcrc, uint16_t pBuffer[], uint32_t BufferLength);
+static uint32_t CRC_Handle_8(CRC_HandleTypeDef *hcrc, uint8_t const pBuffer[], uint32_t BufferLength);
+static uint32_t CRC_Handle_16(CRC_HandleTypeDef *hcrc, uint16_t const pBuffer[], uint32_t BufferLength);
 /**
   * @}
@@ -285,5 +285,5 @@
   * @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits)
   */
-uint32_t HAL_CRC_Accumulate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength)
+uint32_t HAL_CRC_Accumulate(CRC_HandleTypeDef *hcrc, const uint32_t pBuffer[], uint32_t BufferLength)
 {
   uint32_t index;      /* CRC input data buffer index */
@@ -305,9 +305,10 @@
 
     case CRC_INPUTDATA_FORMAT_BYTES:
-      temp = CRC_Handle_8(hcrc, (uint8_t *)pBuffer, BufferLength);
+      temp = CRC_Handle_8(hcrc, (uint8_t const *)pBuffer, BufferLength);
       break;
 
     case CRC_INPUTDATA_FORMAT_HALFWORDS:
-      temp = CRC_Handle_16(hcrc, (uint16_t *)(void *)pBuffer, BufferLength);    /* Derogation MisraC2012 R.11.5 */
+      temp =
+        CRC_Handle_16(hcrc, (uint16_t const *)(void const *)pBuffer, BufferLength);  /* Derogation MisraC2012 R.11.5 */
       break;
     default:
@@ -337,5 +338,5 @@
   * @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits)
   */
-uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength)
+uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, const uint32_t pBuffer[], uint32_t BufferLength)
 {
   uint32_t index;      /* CRC input data buffer index */
@@ -362,10 +363,11 @@
     case CRC_INPUTDATA_FORMAT_BYTES:
       /* Specific 8-bit input data handling  */
-      temp = CRC_Handle_8(hcrc, (uint8_t *)pBuffer, BufferLength);
+      temp = CRC_Handle_8(hcrc, (uint8_t const *)pBuffer, BufferLength);
       break;
 
     case CRC_INPUTDATA_FORMAT_HALFWORDS:
       /* Specific 16-bit input data handling  */
-      temp = CRC_Handle_16(hcrc, (uint16_t *)(void *)pBuffer, BufferLength);    /* Derogation MisraC2012 R.11.5 */
+      temp =
+        CRC_Handle_16(hcrc, (uint16_t const *)(void const *)pBuffer, BufferLength);  /* Derogation MisraC2012 R.11.5 */
       break;
 
@@ -430,5 +432,5 @@
   * @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits)
   */
-static uint32_t CRC_Handle_8(CRC_HandleTypeDef *hcrc, uint8_t pBuffer[], uint32_t BufferLength)
+static uint32_t CRC_Handle_8(CRC_HandleTypeDef *hcrc, uint8_t const pBuffer[], uint32_t BufferLength)
 {
   uint32_t i; /* input data buffer index */
@@ -453,5 +455,5 @@
       *(__IO uint8_t *)(__IO void *)(&hcrc->Instance->DR) = pBuffer[4U * i];         /* Derogation MisraC2012 R.11.5 */
     }
-    if ((BufferLength % 4U) == 2U)
+    else if ((BufferLength % 4U) == 2U)
     {
       data = ((uint16_t)(pBuffer[4U * i]) << 8U) | (uint16_t)pBuffer[(4U * i) + 1U];
@@ -459,5 +461,5 @@
       *pReg = data;
     }
-    if ((BufferLength % 4U) == 3U)
+    else if ((BufferLength % 4U) == 3U)
     {
       data = ((uint16_t)(pBuffer[4U * i]) << 8U) | (uint16_t)pBuffer[(4U * i) + 1U];
@@ -467,4 +469,8 @@
       *(__IO uint8_t *)(__IO void *)(&hcrc->Instance->DR) = pBuffer[(4U * i) + 2U];  /* Derogation MisraC2012 R.11.5 */
     }
+    else
+    {
+      /* Nothing to do */
+    }
   }
 
@@ -481,5 +487,5 @@
   * @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits)
   */
-static uint32_t CRC_Handle_16(CRC_HandleTypeDef *hcrc, uint16_t pBuffer[], uint32_t BufferLength)
+static uint32_t CRC_Handle_16(CRC_HandleTypeDef *hcrc, uint16_t const pBuffer[], uint32_t BufferLength)
 {
   uint32_t i;  /* input data buffer index */
Index: trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
===================================================================
--- trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c	(revision 40)
+++ trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c	(revision 55)
@@ -493,5 +493,11 @@
   HAL_StatusTypeDef status = HAL_OK;
 
-  if(hdma->State != HAL_DMA_STATE_BUSY)
+  /* Check the DMA peripheral handle parameter */
+  if (hdma == NULL)
+  {
+    return HAL_ERROR;
+  }
+
+  if (hdma->State != HAL_DMA_STATE_BUSY)
   {
     /* no transfer ongoing */
@@ -502,29 +508,29 @@
   else
   {
-     /* Disable DMA IT */
-     __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
-     
-     /* disable the DMAMUX sync overrun IT*/
-     hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE;
-     
-     /* Disable the channel */
-     __HAL_DMA_DISABLE(hdma);
-     
-     /* Clear all flags */
-     hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1FU));
-     
-     /* Clear the DMAMUX synchro overrun flag */
-     hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
-     
-     if (hdma->DMAmuxRequestGen != 0U)
-     {
-       /* if using DMAMUX request generator, disable the DMAMUX request generator overrun IT*/
-       /* disable the request gen overrun IT*/
-       hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE;
-     
-       /* Clear the DMAMUX request generator overrun flag */
-       hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;
-     }
-  }  
+    /* Disable the channel */
+    __HAL_DMA_DISABLE(hdma);
+
+    /* Disable DMA IT */
+    __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
+
+    /* disable the DMAMUX sync overrun IT*/
+    hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE;
+
+    /* Clear all flags */
+    hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1FU));
+
+    /* Clear the DMAMUX synchro overrun flag */
+    hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
+
+    if (hdma->DMAmuxRequestGen != 0U)
+    {
+      /* if using DMAMUX request generator, disable the DMAMUX request generator overrun IT*/
+      /* disable the request gen overrun IT*/
+      hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE;
+
+      /* Clear the DMAMUX request generator overrun flag */
+      hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;
+    }
+  }
   /* Change the DMA state */
   hdma->State = HAL_DMA_STATE_READY;
@@ -561,9 +567,10 @@
   else
   {
+
+    /* Disable the channel */
+    __HAL_DMA_DISABLE(hdma);
+
     /* Disable DMA IT */
     __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
-
-    /* Disable the channel */
-    __HAL_DMA_DISABLE(hdma);
 
     /* disable the DMAMUX sync overrun IT*/
@@ -937,5 +944,4 @@
   * @}
   */
-
 
 
@@ -1054,4 +1060,5 @@
     /* DMA1 */
     DMAMUX1_ChannelBase = DMAMUX1_Channel0;
+    channel_number = (((uint32_t)hdma->Instance & 0xFFU) - 8U) / 20U;
   }
   else
@@ -1060,12 +1067,15 @@
 #if defined (STM32G471xx) || defined (STM32G473xx) || defined (STM32G474xx) || defined (STM32G414xx) || defined (STM32G483xx) || defined (STM32G484xx) || defined (STM32G491xx) || defined (STM32G4A1xx) || defined (STM32G411xC)
     DMAMUX1_ChannelBase = DMAMUX1_Channel8;
+    channel_number = ((((uint32_t)hdma->Instance & 0xFFU) - 8U) / 20U) + 8U;
 #elif defined (STM32G411xB) || defined (STM32G431xx) || defined (STM32G441xx) || defined (STM32GBK1CB)
     DMAMUX1_ChannelBase = DMAMUX1_Channel6;
+    channel_number = ((((uint32_t)hdma->Instance & 0xFFU) - 8U) / 20U) + 6U;
 #else
     DMAMUX1_ChannelBase = DMAMUX1_Channel7;
+    channel_number = ((((uint32_t)hdma->Instance & 0xFFU) - 8U) / 20U) + 7U;
 #endif /* STM32G4x1xx) */
   }
+
   dmamux_base_addr = (uint32_t)DMAMUX1_ChannelBase;
-  channel_number = (((uint32_t)hdma->Instance & 0xFFU) - 8U) / 20U;
   hdma->DMAmuxChannel = (DMAMUX_Channel_TypeDef *)(uint32_t)(dmamux_base_addr + ((hdma->ChannelIndex >> 2U) * ((uint32_t)DMAMUX1_Channel1 - (uint32_t)DMAMUX1_Channel0)));
   hdma->DMAmuxChannelStatus = DMAMUX1_ChannelStatus;
Index: trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
===================================================================
--- trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c	(revision 40)
+++ trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c	(revision 55)
@@ -93,5 +93,5 @@
   * @retval HAL status
   */
-HAL_StatusTypeDef HAL_DMAEx_ConfigMuxSync(DMA_HandleTypeDef *hdma, HAL_DMA_MuxSyncConfigTypeDef *pSyncConfig)
+HAL_StatusTypeDef HAL_DMAEx_ConfigMuxSync(DMA_HandleTypeDef *hdma, const HAL_DMA_MuxSyncConfigTypeDef *pSyncConfig)
 {
   /* Check the parameters */
@@ -140,5 +140,5 @@
   */
 HAL_StatusTypeDef HAL_DMAEx_ConfigMuxRequestGenerator(DMA_HandleTypeDef *hdma,
-                                                      HAL_DMA_MuxRequestGeneratorConfigTypeDef *pRequestGeneratorConfig)
+                                                      const HAL_DMA_MuxRequestGeneratorConfigTypeDef *pRequestGeneratorConfig)
 {
   /* Check the parameters */
Index: trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
===================================================================
--- trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c	(revision 40)
+++ trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c	(revision 55)
@@ -142,5 +142,5 @@
   * @retval HAL Status.
   */
-HAL_StatusTypeDef HAL_EXTI_SetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig)
+HAL_StatusTypeDef HAL_EXTI_SetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef const *pExtiConfig)
 {
   __IO uint32_t *regaddr;
@@ -266,7 +266,7 @@
   * @retval HAL Status.
   */
-HAL_StatusTypeDef HAL_EXTI_GetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig)
-{
-  __IO uint32_t *regaddr;
+HAL_StatusTypeDef HAL_EXTI_GetConfigLine(EXTI_HandleTypeDef const *hexti, EXTI_ConfigTypeDef *pExtiConfig)
+{
+  const __IO uint32_t *regaddr;
   uint32_t regval;
   uint32_t linepos;
@@ -362,5 +362,5 @@
   * @retval HAL Status.
   */
-HAL_StatusTypeDef HAL_EXTI_ClearConfigLine(EXTI_HandleTypeDef *hexti)
+HAL_StatusTypeDef HAL_EXTI_ClearConfigLine(EXTI_HandleTypeDef const *hexti)
 {
   __IO uint32_t *regaddr;
@@ -502,5 +502,5 @@
   * @retval none.
   */
-void HAL_EXTI_IRQHandler(EXTI_HandleTypeDef *hexti)
+void HAL_EXTI_IRQHandler(EXTI_HandleTypeDef const *hexti)
 {
   __IO uint32_t *regaddr;
@@ -537,7 +537,7 @@
   * @retval 1 if interrupt is pending else 0.
   */
-uint32_t HAL_EXTI_GetPending(EXTI_HandleTypeDef *hexti, uint32_t Edge)
-{
-  __IO uint32_t *regaddr;
+uint32_t HAL_EXTI_GetPending(EXTI_HandleTypeDef const *hexti, uint32_t Edge)
+{
+  const __IO uint32_t *regaddr;
   uint32_t regval;
   uint32_t linepos;
@@ -572,5 +572,5 @@
   * @retval None.
   */
-void HAL_EXTI_ClearPending(EXTI_HandleTypeDef *hexti, uint32_t Edge)
+void HAL_EXTI_ClearPending(EXTI_HandleTypeDef const *hexti, uint32_t Edge)
 {
   __IO uint32_t *regaddr;
@@ -601,5 +601,5 @@
   * @retval None.
   */
-void HAL_EXTI_GenerateSWI(EXTI_HandleTypeDef *hexti)
+void HAL_EXTI_GenerateSWI(EXTI_HandleTypeDef const *hexti)
 {
   __IO uint32_t *regaddr;
Index: trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
===================================================================
--- trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c	(revision 40)
+++ trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c	(revision 55)
@@ -160,5 +160,5 @@
   * @retval None
   */
-void HAL_GPIO_Init(GPIO_TypeDef  *GPIOx, GPIO_InitTypeDef *GPIO_Init)
+void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef const *GPIO_Init)
 {
   uint32_t position = 0x00U;
@@ -199,5 +199,6 @@
       }
 
-      if ((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG)
+      if (((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG) ||
+          (((GPIO_Init->Mode & GPIO_MODE) == MODE_ANALOG) && (GPIO_Init->Pull != GPIO_PULLUP)))
       {
         /* Check the Pull parameter */
@@ -371,5 +372,5 @@
   * @retval The input port pin value.
   */
-GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
+GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef const *GPIOx, uint16_t GPIO_Pin)
 {
   GPIO_PinState bitstatus;
Index: trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
===================================================================
--- trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c	(revision 40)
+++ trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c	(revision 55)
@@ -3325,31 +3325,44 @@
         if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout, tickstart) != HAL_OK)
         {
-          return HAL_ERROR;
+          /* A non acknowledge appear during STOP Flag waiting process, a new trial must be performed */
+          if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
+          {
+            /* Clear STOP Flag */
+            __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
+
+            /* Reset the error code for next trial */
+            hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
+          }
         }
-
-        /* Clear STOP Flag */
-        __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
-
-        /* Device is ready */
-        hi2c->State = HAL_I2C_STATE_READY;
-
-        /* Process Unlocked */
-        __HAL_UNLOCK(hi2c);
-
-        return HAL_OK;
+        else
+        {
+          /* A acknowledge appear during STOP Flag waiting process, this mean that device respond to its address */
+
+          /* Clear STOP Flag */
+          __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
+
+          /* Device is ready */
+          hi2c->State = HAL_I2C_STATE_READY;
+
+          /* Process Unlocked */
+          __HAL_UNLOCK(hi2c);
+
+          return HAL_OK;
+        }
       }
       else
       {
-        /* Wait until STOPF flag is reset */
-        if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout, tickstart) != HAL_OK)
-        {
-          return HAL_ERROR;
-        }
+        /* A non acknowledge is detected, this mean that device not respond to its address,
+           a new trial must be performed */
 
         /* Clear NACK Flag */
         __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
 
-        /* Clear STOP Flag, auto generated with autoend*/
-        __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
+        /* Wait until STOPF flag is reset */
+        if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout, tickstart) == HAL_OK)
+        {
+          /* Clear STOP Flag, auto generated with autoend*/
+          __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
+        }
       }
 
@@ -6350,5 +6363,5 @@
     hi2c->pBuffPtr++;
 
-    if ((hi2c->XferSize > 0U))
+    if (hi2c->XferSize > 0U)
     {
       hi2c->XferSize--;
@@ -6506,5 +6519,5 @@
     hi2c->pBuffPtr++;
 
-    if ((hi2c->XferSize > 0U))
+    if (hi2c->XferSize > 0U)
     {
       hi2c->XferSize--;
@@ -6954,5 +6967,5 @@
       if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
       {
-        if ((__HAL_I2C_GET_FLAG(hi2c, Flag) == Status))
+        if (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)
         {
           hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
@@ -6994,5 +7007,5 @@
       if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
       {
-        if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET))
+        if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET)
         {
           hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
@@ -7033,5 +7046,5 @@
     if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
     {
-      if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET))
+      if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
       {
         hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
@@ -7111,5 +7124,5 @@
     if ((((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) && (status == HAL_OK))
     {
-      if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET))
+      if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
       {
         hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
@@ -7278,4 +7291,6 @@
                                uint32_t Request)
 {
+  uint32_t tmp;
+
   /* Check the parameters */
   assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
@@ -7284,7 +7299,7 @@
 
   /* Declaration of tmp to prevent undefined behavior of volatile usage */
-  uint32_t tmp = ((uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | \
-                             (((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | \
-                             (uint32_t)Mode | (uint32_t)Request) & (~0x80000000U));
+  tmp = ((uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | \
+                    (((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | \
+                    (uint32_t)Mode | (uint32_t)Request) & (~0x80000000U));
 
   /* update CR2 register */
Index: trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_iwdg.c
===================================================================
--- trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_iwdg.c	(revision 40)
+++ trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_iwdg.c	(revision 55)
@@ -127,5 +127,6 @@
    LSI startup time is also considered here by adding LSI_STARTUP_TIME
    converted in milliseconds. */
-#define HAL_IWDG_DEFAULT_TIMEOUT        (((6UL * 256UL * 1000UL) / LSI_VALUE) + ((LSI_STARTUP_TIME / 1000UL) + 1UL))
+#define HAL_IWDG_DEFAULT_TIMEOUT        (((6UL * 256UL * 1000UL) / (LSI_VALUE / 128U)) + \
+                                         ((LSI_STARTUP_TIME / 1000UL) + 1UL))
 #define IWDG_KERNEL_UPDATE_FLAGS        (IWDG_SR_WVU | IWDG_SR_RVU | IWDG_SR_PVU)
 /**
Index: trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd.c
===================================================================
--- trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd.c	(revision 40)
+++ trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd.c	(revision 55)
@@ -50,4 +50,7 @@
          (##) HAL_PCD_Start();
 
+     (#)NOTE: For applications not using double buffer mode, define the symbol
+               'USE_USB_DOUBLE_BUFFER' as 0 to reduce the driver's memory footprint.
+
   @endverbatim
   ******************************************************************************
@@ -312,6 +315,4 @@
     return HAL_ERROR;
   }
-  /* Process locked */
-  __HAL_LOCK(hpcd);
 
   if (hpcd->State == HAL_PCD_STATE_READY)
@@ -391,6 +392,4 @@
   }
 
-  /* Release Lock */
-  __HAL_UNLOCK(hpcd);
   return status;
 }
@@ -417,7 +416,4 @@
   HAL_StatusTypeDef status = HAL_OK;
 
-  /* Process locked */
-  __HAL_LOCK(hpcd);
-
   /* Setup Legacy weak Callbacks  */
   if (hpcd->State == HAL_PCD_STATE_READY)
@@ -500,6 +496,4 @@
   }
 
-  /* Release Lock */
-  __HAL_UNLOCK(hpcd);
   return status;
 }
@@ -525,7 +519,4 @@
   }
 
-  /* Process locked */
-  __HAL_LOCK(hpcd);
-
   if (hpcd->State == HAL_PCD_STATE_READY)
   {
@@ -541,7 +532,4 @@
   }
 
-  /* Release Lock */
-  __HAL_UNLOCK(hpcd);
-
   return status;
 }
@@ -557,7 +545,4 @@
   HAL_StatusTypeDef status = HAL_OK;
 
-  /* Process locked */
-  __HAL_LOCK(hpcd);
-
   if (hpcd->State == HAL_PCD_STATE_READY)
   {
@@ -573,7 +558,4 @@
   }
 
-  /* Release Lock */
-  __HAL_UNLOCK(hpcd);
-
   return status;
 }
@@ -599,7 +581,4 @@
   }
 
-  /* Process locked */
-  __HAL_LOCK(hpcd);
-
   if (hpcd->State == HAL_PCD_STATE_READY)
   {
@@ -615,7 +594,4 @@
   }
 
-  /* Release Lock */
-  __HAL_UNLOCK(hpcd);
-
   return status;
 }
@@ -631,7 +607,4 @@
   HAL_StatusTypeDef status = HAL_OK;
 
-  /* Process locked */
-  __HAL_LOCK(hpcd);
-
   if (hpcd->State == HAL_PCD_STATE_READY)
   {
@@ -647,7 +620,4 @@
   }
 
-  /* Release Lock */
-  __HAL_UNLOCK(hpcd);
-
   return status;
 }
@@ -673,7 +643,4 @@
   }
 
-  /* Process locked */
-  __HAL_LOCK(hpcd);
-
   if (hpcd->State == HAL_PCD_STATE_READY)
   {
@@ -688,7 +655,4 @@
     status =  HAL_ERROR;
   }
-
-  /* Release Lock */
-  __HAL_UNLOCK(hpcd);
 
   return status;
@@ -706,7 +670,4 @@
   HAL_StatusTypeDef status = HAL_OK;
 
-  /* Process locked */
-  __HAL_LOCK(hpcd);
-
   if (hpcd->State == HAL_PCD_STATE_READY)
   {
@@ -722,7 +683,4 @@
   }
 
-  /* Release Lock */
-  __HAL_UNLOCK(hpcd);
-
   return status;
 }
@@ -748,7 +706,4 @@
   }
 
-  /* Process locked */
-  __HAL_LOCK(hpcd);
-
   if (hpcd->State == HAL_PCD_STATE_READY)
   {
@@ -763,7 +718,4 @@
     status =  HAL_ERROR;
   }
-
-  /* Release Lock */
-  __HAL_UNLOCK(hpcd);
 
   return status;
@@ -781,7 +733,4 @@
   HAL_StatusTypeDef status = HAL_OK;
 
-  /* Process locked */
-  __HAL_LOCK(hpcd);
-
   if (hpcd->State == HAL_PCD_STATE_READY)
   {
@@ -797,8 +746,5 @@
   }
 
-  /* Release Lock */
-  __HAL_UNLOCK(hpcd);
-
-  return status;
+   return status;
 }
 
@@ -822,7 +768,4 @@
   }
 
-  /* Process locked */
-  __HAL_LOCK(hpcd);
-
   if (hpcd->State == HAL_PCD_STATE_READY)
   {
@@ -838,7 +781,4 @@
   }
 
-  /* Release Lock */
-  __HAL_UNLOCK(hpcd);
-
   return status;
 }
@@ -854,7 +794,4 @@
   HAL_StatusTypeDef status = HAL_OK;
 
-  /* Process locked */
-  __HAL_LOCK(hpcd);
-
   if (hpcd->State == HAL_PCD_STATE_READY)
   {
@@ -870,7 +807,4 @@
   }
 
-  /* Release Lock */
-  __HAL_UNLOCK(hpcd);
-
   return status;
 }
@@ -895,7 +829,4 @@
   }
 
-  /* Process locked */
-  __HAL_LOCK(hpcd);
-
   if (hpcd->State == HAL_PCD_STATE_READY)
   {
@@ -911,7 +842,4 @@
   }
 
-  /* Release Lock */
-  __HAL_UNLOCK(hpcd);
-
   return status;
 }
@@ -927,7 +855,4 @@
   HAL_StatusTypeDef status = HAL_OK;
 
-  /* Process locked */
-  __HAL_LOCK(hpcd);
-
   if (hpcd->State == HAL_PCD_STATE_READY)
   {
@@ -942,7 +867,4 @@
     status =  HAL_ERROR;
   }
-
-  /* Release Lock */
-  __HAL_UNLOCK(hpcd);
 
   return status;
@@ -1727,4 +1649,9 @@
     epindex = (uint8_t)(wIstr & USB_ISTR_EP_ID);
 
+    if (epindex >= 8U)
+    {
+      return HAL_ERROR;
+    }
+
     if (epindex == 0U)
     {
@@ -1770,4 +1697,16 @@
           /* Get SETUP Packet */
           ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
+
+          if (ep->xfer_count != 8U)
+          {
+            /* Set Stall condition for EP0 IN/OUT */
+            PCD_SET_EP_RX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_RX_STALL);
+            PCD_SET_EP_TX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_TX_STALL);
+
+            /* SETUP bit kept frozen while CTR_RX = 1 */
+            PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0);
+
+            return HAL_OK;
+          }
 
           USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup,
@@ -1791,24 +1730,25 @@
           ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
 
-          if ((ep->xfer_count != 0U) && (ep->xfer_buff != 0U))
+          if (ep->xfer_count == 0U)
           {
-            USB_ReadPMA(hpcd->Instance, ep->xfer_buff,
-                        ep->pmaadress, (uint16_t)ep->xfer_count);
-
-            ep->xfer_buff += ep->xfer_count;
-
-            /* Process Control Data OUT Packet */
+            /* Status phase re-arm for next setup */
+            PCD_SET_EP_RX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_RX_VALID);
+          }
+          else
+          {
+            if (ep->xfer_buff != 0U)
+            {
+              USB_ReadPMA(hpcd->Instance, ep->xfer_buff,
+                          ep->pmaadress, (uint16_t)ep->xfer_count);  /* max 64bytes */
+
+              ep->xfer_buff += ep->xfer_count;
+
+              /* Process Control Data OUT Packet */
 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
-            hpcd->DataOutStageCallback(hpcd, 0U);
+              hpcd->DataOutStageCallback(hpcd, 0U);
 #else
-            HAL_PCD_DataOutStageCallback(hpcd, 0U);
+              HAL_PCD_DataOutStageCallback(hpcd, 0U);
 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
-          }
-
-          wEPVal = (uint16_t)PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0);
-
-          if (((wEPVal & USB_EP_SETUP) == 0U) && ((wEPVal & USB_EP_RX_STRX) != USB_EP_RX_VALID))
-          {
-            PCD_SET_EP_RX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_RX_VALID);
+            }
           }
         }
@@ -1876,5 +1816,4 @@
         /* multi-packet on the NON control OUT endpoint */
         ep->xfer_count += count;
-        ep->xfer_buff += count;
 
         if ((ep->xfer_len == 0U) || (count < ep->maxpacket))
@@ -1889,4 +1828,5 @@
         else
         {
+          ep->xfer_buff += count;
           (void)USB_EPStartXfer(hpcd->Instance, ep);
         }
Index: trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd_ex.c
===================================================================
--- trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd_ex.c	(revision 40)
+++ trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd_ex.c	(revision 55)
@@ -83,5 +83,5 @@
   PCD_EPTypeDef *ep;
 
-  /* initialize ep structure*/
+  /* Initialize ep structure */
   if ((0x80U & ep_addr) == 0x80U)
   {
@@ -98,4 +98,5 @@
     /* Single Buffer */
     ep->doublebuffer = 0U;
+
     /* Configure the PMA */
     ep->pmaadress = (uint16_t)pmaadress;
@@ -106,4 +107,5 @@
     /* Double Buffer Endpoint */
     ep->doublebuffer = 1U;
+
     /* Configure the PMA */
     ep->pmaaddr0 = (uint16_t)(pmaadress & 0xFFFFU);
@@ -125,12 +127,10 @@
   hpcd->battery_charging_active = 1U;
 
+  USBx->BCDR &= ~(USB_BCDR_PDEN);
+  USBx->BCDR &= ~(USB_BCDR_SDEN);
+
   /* Enable BCD feature */
   USBx->BCDR |= USB_BCDR_BCDEN;
 
-  /* Enable DCD : Data Contact Detect */
-  USBx->BCDR &= ~(USB_BCDR_PDEN);
-  USBx->BCDR &= ~(USB_BCDR_SDEN);
-  USBx->BCDR |= USB_BCDR_DCDEN;
-
   return HAL_OK;
 }
@@ -163,19 +163,8 @@
 
   /* Wait for Min DCD Timeout */
-  HAL_Delay(300U);
-
-  /* Data Pin Contact ? Check Detect flag */
-  if ((USBx->BCDR & USB_BCDR_DCDET) == USB_BCDR_DCDET)
-  {
-#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
-    hpcd->BCDCallback(hpcd, PCD_BCD_CONTACT_DETECTION);
-#else
-    HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_CONTACT_DETECTION);
-#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
-  }
+  HAL_Delay(350U);
+
   /* Primary detection: checks if connected to Standard Downstream Port
   (without charging capability) */
-  USBx->BCDR &= ~(USB_BCDR_DCDEN);
-  HAL_Delay(50U);
   USBx->BCDR |= (USB_BCDR_PDEN);
   HAL_Delay(50U);
Index: trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
===================================================================
--- trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c	(revision 40)
+++ trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c	(revision 55)
@@ -306,5 +306,5 @@
   * @retval None
   */
-HAL_StatusTypeDef HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD)
+HAL_StatusTypeDef HAL_PWR_ConfigPVD(PWR_PVDTypeDef const *sConfigPVD)
 {
   /* Check the parameters */
Index: trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
===================================================================
--- trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c	(revision 40)
+++ trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c	(revision 55)
@@ -672,5 +672,5 @@
   * @retval HAL status
   */
-HAL_StatusTypeDef HAL_PWREx_ConfigPVM(PWR_PVMTypeDef *sConfigPVM)
+HAL_StatusTypeDef HAL_PWREx_ConfigPVM(PWR_PVMTypeDef const *sConfigPVM)
 {
   HAL_StatusTypeDef status = HAL_OK;
Index: trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
===================================================================
--- trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c	(revision 40)
+++ trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c	(revision 55)
@@ -310,5 +310,5 @@
   * @retval HAL status
   */
-HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
+HAL_StatusTypeDef HAL_RCC_OscConfig(const RCC_OscInitTypeDef  *RCC_OscInitStruct)
 {
   uint32_t tickstart;
@@ -764,5 +764,5 @@
   * @retval None
   */
-HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef  *RCC_ClkInitStruct, uint32_t FLatency)
+HAL_StatusTypeDef HAL_RCC_ClockConfig(const RCC_ClkInitTypeDef  *RCC_ClkInitStruct, uint32_t FLatency)
 {
   uint32_t tickstart;
Index: trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
===================================================================
--- trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c	(revision 40)
+++ trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c	(revision 55)
@@ -121,5 +121,5 @@
   * @retval HAL status
   */
-HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef  *PeriphClkInit)
+HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef const *PeriphClkInit)
 {
   uint32_t tmpregister;
@@ -1406,5 +1406,5 @@
 void HAL_RCCEx_EnableLSCO(uint32_t LSCOSource)
 {
-  GPIO_InitTypeDef GPIO_InitStruct;
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
   FlagStatus       pwrclkchanged = RESET;
   FlagStatus       backupchanged = RESET;
@@ -1559,5 +1559,5 @@
   * @retval None
   */
-void HAL_RCCEx_CRSConfig(RCC_CRSInitTypeDef *pInit)
+void HAL_RCCEx_CRSConfig(RCC_CRSInitTypeDef const *pInit)
 {
   uint32_t value;
Index: trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rtc.c
===================================================================
--- trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rtc.c	(revision 40)
+++ trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rtc.c	(revision 55)
@@ -971,5 +971,5 @@
   * @retval HAL status
   */
-HAL_StatusTypeDef HAL_RTC_GetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTime, uint32_t Format)
+HAL_StatusTypeDef HAL_RTC_GetTime(RTC_HandleTypeDef const *hrtc, RTC_TimeTypeDef *sTime, uint32_t Format)
 {
   uint32_t tmpreg;
@@ -1099,5 +1099,5 @@
   * @retval HAL status
   */
-HAL_StatusTypeDef HAL_RTC_GetDate(RTC_HandleTypeDef *hrtc, RTC_DateTypeDef *sDate, uint32_t Format)
+HAL_StatusTypeDef HAL_RTC_GetDate(RTC_HandleTypeDef const *hrtc, RTC_DateTypeDef *sDate, uint32_t Format)
 {
   uint32_t datetmpreg;
@@ -1619,5 +1619,5 @@
   * @retval HAL status
   */
-HAL_StatusTypeDef HAL_RTC_GetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Alarm, uint32_t Format)
+HAL_StatusTypeDef HAL_RTC_GetAlarm(RTC_HandleTypeDef const *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Alarm, uint32_t Format)
 {
   uint32_t tmpreg, subsecondtmpreg;
@@ -1844,5 +1844,5 @@
   * @retval HAL state
   */
-HAL_RTCStateTypeDef HAL_RTC_GetState(RTC_HandleTypeDef *hrtc)
+HAL_RTCStateTypeDef HAL_RTC_GetState(RTC_HandleTypeDef const *hrtc)
 {
   /* Return RTC handle state */
@@ -2020,5 +2020,5 @@
   * @retval operation see RTC_StoreOperation_Definitions
   */
-uint32_t HAL_RTC_DST_ReadStoreOperation(RTC_HandleTypeDef *hrtc)
+uint32_t HAL_RTC_DST_ReadStoreOperation(RTC_HandleTypeDef const *hrtc)
 {
   return READ_BIT(hrtc->Instance->CR, RTC_CR_BKP);
Index: trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rtc_ex.c
===================================================================
--- trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rtc_ex.c	(revision 40)
+++ trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rtc_ex.c	(revision 55)
@@ -1426,5 +1426,5 @@
   tmpreg &= ~((sTamper->Tamper << TAMP_CR2_TAMP1TRG_Pos) | (sTamper->Tamper << TAMP_CR2_TAMP1MSK_Pos) | (sTamper->Tamper << TAMP_CR2_TAMP1NOERASE_Pos));
 
-  if (sTamper->Trigger != RTC_TAMPERTRIGGER_RISINGEDGE)
+  if ((sTamper->Trigger == RTC_TAMPERTRIGGER_HIGHLEVEL) || (sTamper->Trigger == RTC_TAMPERTRIGGER_FALLINGEDGE))
   {
     tmpreg |= (sTamper->Tamper << TAMP_CR2_TAMP1TRG_Pos);
Index: trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
===================================================================
--- trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c	(revision 40)
+++ trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c	(revision 55)
@@ -816,7 +816,7 @@
   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
   *               the configuration information for SPI module.
-  * @param  pData pointer to data buffer
-  * @param  Size amount of data to be sent
-  * @param  Timeout Timeout duration
+  * @param  pData pointer to data buffer (u8 or u16 data elements)
+  * @param  Size amount of data elements (u8 or u16) to be sent
+  * @param  Timeout Timeout duration in ms
   * @retval HAL status
   */
@@ -1002,8 +1002,11 @@
   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
   *               the configuration information for SPI module.
-  * @param  pData pointer to data buffer
-  * @param  Size amount of data to be received
-  * @param  Timeout Timeout duration
+  * @param  pData pointer to data buffer (u8 or u16 data elements)
+  * @param  Size amount of data elements (u8 or u16) to be received
+  * @param  Timeout Timeout duration in ms
   * @retval HAL status
+  * @note   In master mode, if the direction is set to SPI_DIRECTION_2LINES
+  *         the receive buffer is written to data register (DR) to generate
+  *         clock pulses and receive data
   */
 HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
@@ -1244,8 +1247,8 @@
   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
   *               the configuration information for SPI module.
-  * @param  pTxData pointer to transmission data buffer
-  * @param  pRxData pointer to reception data buffer
-  * @param  Size amount of data to be sent and received
-  * @param  Timeout Timeout duration
+  * @param  pTxData pointer to transmission data buffer (u8 or u16 data elements)
+  * @param  pRxData pointer to reception data buffer (u8 or u16 data elements)
+  * @param  Size amount of data elements (u8 or u16) to be sent and received
+  * @param  Timeout Timeout duration in ms
   * @retval HAL status
   */
@@ -1594,6 +1597,6 @@
   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
   *               the configuration information for SPI module.
-  * @param  pData pointer to data buffer
-  * @param  Size amount of data to be sent
+  * @param  pData pointer to data buffer (u8 or u16 data elements)
+  * @param  Size amount of data elements (u8 or u16) to be sent
   * @retval HAL status
   */
@@ -1676,6 +1679,6 @@
   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
   *               the configuration information for SPI module.
-  * @param  pData pointer to data buffer
-  * @param  Size amount of data to be sent
+  * @param  pData pointer to data buffer (u8 or u16 data elements)
+  * @param  Size amount of data elements (u8 or u16) to be received
   * @retval HAL status
   */
@@ -1779,7 +1782,7 @@
   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
   *               the configuration information for SPI module.
-  * @param  pTxData pointer to transmission data buffer
-  * @param  pRxData pointer to reception data buffer
-  * @param  Size amount of data to be sent and received
+  * @param  pTxData pointer to transmission data buffer (u8 or u16 data elements)
+  * @param  pRxData pointer to reception data buffer (u8 or u16 data elements)
+  * @param  Size amount of data elements (u8 or u16) to be sent and received
   * @retval HAL status
   */
@@ -1888,6 +1891,6 @@
   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
   *               the configuration information for SPI module.
-  * @param  pData pointer to data buffer
-  * @param  Size amount of data to be sent
+  * @param  pData pointer to data buffer  (u8 or u16 data elements)
+  * @param  Size amount of data elements (u8 or u16) to be sent
   * @retval HAL status
   */
@@ -2008,7 +2011,7 @@
   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
   *               the configuration information for SPI module.
-  * @param  pData pointer to data buffer
+  * @param  pData pointer to data buffer (u8 or u16 data elements)
   * @note   When the CRC feature is enabled the pData Length must be Size + 1.
-  * @param  Size amount of data to be sent
+  * @param  Size amount of data elements (u8 or u16) to be received
   * @retval HAL status
   */
@@ -2147,8 +2150,8 @@
   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
   *               the configuration information for SPI module.
-  * @param  pTxData pointer to transmission data buffer
-  * @param  pRxData pointer to reception data buffer
+  * @param  pTxData pointer to transmission data buffer (u8 or u16 data elements)
+  * @param  pRxData pointer to reception data buffer (u8 or u16 data elements)
   * @note   When the CRC feature is enabled the pRxData Length must be Size + 1
-  * @param  Size amount of data to be sent
+  * @param  Size amount of data elements (u8 or u16) to be sent and received
   * @retval HAL status
   */
@@ -3996,5 +3999,8 @@
         tmp_timeout = 0U;
       }
-      count--;
+      else
+      {
+        count--;
+      }
     }
   }
@@ -4078,5 +4084,8 @@
         tmp_timeout = 0U;
       }
-      count--;
+      else
+      {
+        count--;
+      }
     }
   }
Index: trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart.c
===================================================================
--- trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart.c	(revision 40)
+++ trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart.c	(revision 55)
@@ -1023,73 +1023,77 @@
                       ##### IO operation functions #####
  ===============================================================================
+    [..]
     This subsection provides a set of functions allowing to manage the UART asynchronous
     and Half duplex data transfers.
 
-    (#) There are two mode of transfer:
-       (+) Blocking mode: The communication is performed in polling mode.
-           The HAL status of all data processing is returned by the same function
-           after finishing transfer.
-       (+) Non-Blocking mode: The communication is performed using Interrupts
-           or DMA, These API's return the HAL status.
-           The end of the data processing will be indicated through the
-           dedicated UART IRQ when using Interrupt mode or the DMA IRQ when
-           using DMA mode.
-           The HAL_UART_TxCpltCallback(), HAL_UART_RxCpltCallback() user callbacks
-           will be executed respectively at the end of the transmit or Receive process
-           The HAL_UART_ErrorCallback()user callback will be executed when a communication error is detected
+    (#) There are two modes of transfer:
+       (++) Blocking mode: The communication is performed in polling mode.
+            The HAL status of all data processing is returned by the same function
+            after finishing transfer.
+       (++) Non-Blocking mode: The communication is performed using Interrupts
+            or DMA, These API's return the HAL status.
+            The end of the data processing will be indicated through the
+            dedicated UART IRQ when using Interrupt mode or the DMA IRQ when
+            using DMA mode.
+            The HAL_UART_TxCpltCallback(), HAL_UART_RxCpltCallback() user callbacks
+            will be executed respectively at the end of the transmit or Receive process
+            The HAL_UART_ErrorCallback()user callback will be executed when a communication error is detected
 
     (#) Blocking mode API's are :
-        (+) HAL_UART_Transmit()
-        (+) HAL_UART_Receive()
+        (++) HAL_UART_Transmit()
+        (++) HAL_UART_Receive()
 
     (#) Non-Blocking mode API's with Interrupt are :
-        (+) HAL_UART_Transmit_IT()
-        (+) HAL_UART_Receive_IT()
-        (+) HAL_UART_IRQHandler()
+        (++) HAL_UART_Transmit_IT()
+        (++) HAL_UART_Receive_IT()
+        (++) HAL_UART_IRQHandler()
 
     (#) Non-Blocking mode API's with DMA are :
-        (+) HAL_UART_Transmit_DMA()
-        (+) HAL_UART_Receive_DMA()
-        (+) HAL_UART_DMAPause()
-        (+) HAL_UART_DMAResume()
-        (+) HAL_UART_DMAStop()
+        (++) HAL_UART_Transmit_DMA()
+        (++) HAL_UART_Receive_DMA()
+        (++) HAL_UART_DMAPause()
+        (++) HAL_UART_DMAResume()
+        (++) HAL_UART_DMAStop()
 
     (#) A set of Transfer Complete Callbacks are provided in Non_Blocking mode:
-        (+) HAL_UART_TxHalfCpltCallback()
-        (+) HAL_UART_TxCpltCallback()
-        (+) HAL_UART_RxHalfCpltCallback()
-        (+) HAL_UART_RxCpltCallback()
-        (+) HAL_UART_ErrorCallback()
+        (++) HAL_UART_TxHalfCpltCallback()
+        (++) HAL_UART_TxCpltCallback()
+        (++) HAL_UART_RxHalfCpltCallback()
+        (++) HAL_UART_RxCpltCallback()
+        (++) HAL_UART_ErrorCallback()
 
     (#) Non-Blocking mode transfers could be aborted using Abort API's :
-        (+) HAL_UART_Abort()
-        (+) HAL_UART_AbortTransmit()
-        (+) HAL_UART_AbortReceive()
-        (+) HAL_UART_Abort_IT()
-        (+) HAL_UART_AbortTransmit_IT()
-        (+) HAL_UART_AbortReceive_IT()
+        (++) HAL_UART_Abort()
+        (++) HAL_UART_AbortTransmit()
+        (++) HAL_UART_AbortReceive()
+        (++) HAL_UART_Abort_IT()
+        (++) HAL_UART_AbortTransmit_IT()
+        (++) HAL_UART_AbortReceive_IT()
 
     (#) For Abort services based on interrupts (HAL_UART_Abortxxx_IT), a set of Abort Complete Callbacks are provided:
-        (+) HAL_UART_AbortCpltCallback()
-        (+) HAL_UART_AbortTransmitCpltCallback()
-        (+) HAL_UART_AbortReceiveCpltCallback()
+        (++) HAL_UART_AbortCpltCallback()
+        (++) HAL_UART_AbortTransmitCpltCallback()
+        (++) HAL_UART_AbortReceiveCpltCallback()
 
     (#) A Rx Event Reception Callback (Rx event notification) is available for Non_Blocking modes of enhanced
         reception services:
-        (+) HAL_UARTEx_RxEventCallback()
+        (++) HAL_UARTEx_RxEventCallback()
+
+    (#) Wakeup from Stop mode Callback:
+        (++) HAL_UARTEx_WakeupCallback()
 
     (#) In Non-Blocking mode transfers, possible errors are split into 2 categories.
         Errors are handled as follows :
-       (+) Error is considered as Recoverable and non blocking : Transfer could go till end, but error severity is
-           to be evaluated by user : this concerns Frame Error, Parity Error or Noise Error
-           in Interrupt mode reception .
-           Received character is then retrieved and stored in Rx buffer, Error code is set to allow user
-           to identify error type, and HAL_UART_ErrorCallback() user callback is executed.
-           Transfer is kept ongoing on UART side.
-           If user wants to abort it, Abort services should be called by user.
-       (+) Error is considered as Blocking : Transfer could not be completed properly and is aborted.
-           This concerns Overrun Error In Interrupt mode reception and all errors in DMA mode.
-           Error code is set to allow user to identify error type, and HAL_UART_ErrorCallback()
-           user callback is executed.
+       (++) Error is considered as Recoverable and non blocking : Transfer could go till end, but error severity is
+            to be evaluated by user : this concerns Frame Error, Parity Error or Noise Error
+            in Interrupt mode reception .
+            Received character is then retrieved and stored in Rx buffer, Error code is set to allow user
+            to identify error type, and HAL_UART_ErrorCallback() user callback is executed.
+            Transfer is kept ongoing on UART side.
+            If user wants to abort it, Abort services should be called by user.
+       (++) Error is considered as Blocking : Transfer could not be completed properly and is aborted.
+            This concerns Overrun Error In Interrupt mode reception and all errors in DMA mode.
+            Error code is set to allow user to identify error type, and HAL_UART_ErrorCallback()
+            user callback is executed.
 
     -@- In the Half duplex communication, it is forbidden to run the transmit
@@ -1169,5 +1173,13 @@
         pdata8bits++;
       }
-      huart->TxXferCount--;
+      if ((huart->gState & HAL_UART_STATE_BUSY_TX) == HAL_UART_STATE_BUSY_TX)
+      {
+        huart->TxXferCount--;
+      }
+      else
+      {
+        /* Process was aborted during the transmission */
+        return HAL_ERROR;
+      }
     }
 
@@ -1265,5 +1277,13 @@
         pdata8bits++;
       }
-      huart->RxXferCount--;
+      if (huart->RxState == HAL_UART_STATE_BUSY_RX)
+      {
+        huart->RxXferCount--;
+      }
+      else
+      {
+        /* Process was aborted during the reception */
+        return HAL_ERROR;
+      }
     }
 
@@ -1705,8 +1725,4 @@
   }
 
-  /* Reset Tx and Rx transfer counters */
-  huart->TxXferCount = 0U;
-  huart->RxXferCount = 0U;
-
   /* Clear the Error flags in the ICR register */
   __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
@@ -1775,7 +1791,4 @@
   }
 
-  /* Reset Tx transfer counter */
-  huart->TxXferCount = 0U;
-
   /* Flush the whole TX FIFO (if needed) */
   if (huart->FifoMode == UART_FIFOMODE_ENABLE)
@@ -1839,7 +1852,4 @@
     }
   }
-
-  /* Reset Rx transfer counter */
-  huart->RxXferCount = 0U;
 
   /* Clear the Error flags in the ICR register */
@@ -1968,8 +1978,4 @@
   if (abortcplt == 1U)
   {
-    /* Reset Tx and Rx transfer counters */
-    huart->TxXferCount = 0U;
-    huart->RxXferCount = 0U;
-
     /* Clear ISR function pointers */
     huart->RxISR = NULL;
@@ -2051,6 +2057,4 @@
     else
     {
-      /* Reset Tx transfer counter */
-      huart->TxXferCount = 0U;
 
       /* Clear TxISR function pointers */
@@ -2072,7 +2076,4 @@
   else
   {
-    /* Reset Tx transfer counter */
-    huart->TxXferCount = 0U;
-
     /* Clear TxISR function pointers */
     huart->TxISR = NULL;
@@ -2148,7 +2149,4 @@
     else
     {
-      /* Reset Rx transfer counter */
-      huart->RxXferCount = 0U;
-
       /* Clear RxISR function pointer */
       huart->pRxBuffPtr = NULL;
@@ -2176,7 +2174,4 @@
   else
   {
-    /* Reset Rx transfer counter */
-    huart->RxXferCount = 0U;
-
     /* Clear RxISR function pointer */
     huart->pRxBuffPtr = NULL;
@@ -3710,10 +3705,22 @@
   if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
   {
+    huart->RxXferCount = 0;
+
+    /* Check current nb of data still to be received on DMA side.
+       DMA Normal mode, remaining nb of data will be 0
+       DMA Circular mode, remaining nb of data is reset to RxXferSize */
+    uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(hdma);
+    if (nb_remaining_rx_data < huart->RxXferSize)
+    {
+      /* Update nb of remaining data */
+      huart->RxXferCount = nb_remaining_rx_data;
+    }
+
 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
     /*Call registered Rx Event callback*/
-    huart->RxEventCallback(huart, huart->RxXferSize);
+    huart->RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount));
 #else
     /*Call legacy weak Rx Event callback*/
-    HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
+    HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount));
 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
   }
@@ -3748,10 +3755,20 @@
   if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
   {
+    huart->RxXferCount = huart->RxXferSize / 2U;
+
+    /* Check current nb of data still to be received on DMA side. */
+    uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(hdma);
+    if (nb_remaining_rx_data <= huart->RxXferSize)
+    {
+      /* Update nb of remaining data */
+      huart->RxXferCount = nb_remaining_rx_data;
+    }
+
 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
     /*Call registered Rx Event callback*/
-    huart->RxEventCallback(huart, huart->RxXferSize / 2U);
+    huart->RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount));
 #else
     /*Call legacy weak Rx Event callback*/
-    HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize / 2U);
+    HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount));
 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
   }
@@ -3785,5 +3802,4 @@
       (gstate == HAL_UART_STATE_BUSY_TX))
   {
-    huart->TxXferCount = 0U;
     UART_EndTxTransfer(huart);
   }
@@ -3793,5 +3809,4 @@
       (rxstate == HAL_UART_STATE_BUSY_RX))
   {
-    huart->RxXferCount = 0U;
     UART_EndRxTransfer(huart);
   }
@@ -3817,5 +3832,4 @@
 {
   UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
-  huart->RxXferCount = 0U;
 
 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
@@ -3850,8 +3864,4 @@
     }
   }
-
-  /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
-  huart->TxXferCount = 0U;
-  huart->RxXferCount = 0U;
 
   /* Reset errorCode */
@@ -3906,8 +3916,4 @@
   }
 
-  /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
-  huart->TxXferCount = 0U;
-  huart->RxXferCount = 0U;
-
   /* Reset errorCode */
   huart->ErrorCode = HAL_UART_ERROR_NONE;
@@ -3947,6 +3953,4 @@
   UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
 
-  huart->TxXferCount = 0U;
-
   /* Flush the whole TX FIFO (if needed) */
   if (huart->FifoMode == UART_FIFOMODE_ENABLE)
@@ -3979,6 +3983,4 @@
 {
   UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
-
-  huart->RxXferCount = 0U;
 
   /* Clear the Error flags in the ICR register */
Index: trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart_ex.c
===================================================================
--- trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart_ex.c	(revision 40)
+++ trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart_ex.c	(revision 55)
@@ -25,5 +25,5 @@
                ##### UART peripheral extended features  #####
   ==============================================================================
-
+  [..]
     (#) Declare a UART_HandleTypeDef handle structure.
 
@@ -254,13 +254,11 @@
                       ##### IO operation functions #####
  ===============================================================================
+    [..]
     This subsection provides a set of Wakeup and FIFO mode related callback functions.
-
     (#) Wakeup from Stop mode Callback:
-        (+) HAL_UARTEx_WakeupCallback()
-
+        (++) HAL_UARTEx_WakeupCallback()
     (#) TX/RX Fifos Callbacks:
-        (+) HAL_UARTEx_RxFifoFullCallback()
-        (+) HAL_UARTEx_TxFifoEmptyCallback()
-
+        (++) HAL_UARTEx_RxFifoFullCallback()
+        (++) HAL_UARTEx_TxFifoEmptyCallback()
 @endverbatim
   * @{
@@ -342,17 +340,17 @@
         data elements as reception completion criteria, these functions also consider additional events
         as triggers for updating reception status to caller :
-       (+) Detection of inactivity period (RX line has not been active for a given period).
-          (++) RX inactivity detected by IDLE event, i.e. RX line has been in idle state (normally high state)
+       (++) Detection of inactivity period (RX line has not been active for a given period).
+          (+++) RX inactivity detected by IDLE event, i.e. RX line has been in idle state (normally high state)
                for 1 frame time, after last received byte.
-          (++) RX inactivity detected by RTO, i.e. line has been in idle state
+          (+++) RX inactivity detected by RTO, i.e. line has been in idle state
                for a programmable time, after last received byte.
-       (+) Detection that a specific character has been received.
-
-    (#) There are two mode of transfer:
-       (+) Blocking mode: The reception is performed in polling mode, until either expected number of data is received,
+       (++) Detection that a specific character has been received.
+
+    (#) There are two modes of transfer:
+       (++) Blocking mode: The reception is performed in polling mode, until either expected number of data is received,
            or till IDLE event occurs. Reception is handled only during function execution.
            When function exits, no data reception could occur. HAL status and number of actually received data elements,
            are returned by function after finishing transfer.
-       (+) Non-Blocking mode: The reception is performed using Interrupts or DMA.
+       (++) Non-Blocking mode: The reception is performed using Interrupts or DMA.
            These API's return the HAL status.
            The end of the data processing will be indicated through the
@@ -362,11 +360,11 @@
 
     (#) Blocking mode API:
-        (+) HAL_UARTEx_ReceiveToIdle()
+        (++) HAL_UARTEx_ReceiveToIdle()
 
     (#) Non-Blocking mode API with Interrupt:
-        (+) HAL_UARTEx_ReceiveToIdle_IT()
+        (++) HAL_UARTEx_ReceiveToIdle_IT()
 
     (#) Non-Blocking mode API with DMA:
-        (+) HAL_UARTEx_ReceiveToIdle_DMA()
+        (++) HAL_UARTEx_ReceiveToIdle_DMA()
 
 @endverbatim
@@ -943,15 +941,13 @@
   *        to Rx Event callback execution.
   * @note  This function is expected to be called within the user implementation of Rx Event Callback,
-  *        in order to provide the accurate value :
-  *        In Interrupt Mode :
-  *           - HAL_UART_RXEVENT_TC : when Reception has been completed (expected nb of data has been received)
-  *           - HAL_UART_RXEVENT_IDLE : when Idle event occurred prior reception has been completed (nb of
-  *             received data is lower than expected one)
-  *        In DMA Mode :
-  *           - HAL_UART_RXEVENT_TC : when Reception has been completed (expected nb of data has been received)
-  *           - HAL_UART_RXEVENT_HT : when half of expected nb of data has been received
-  *           - HAL_UART_RXEVENT_IDLE : when Idle event occurred prior reception has been completed (nb of
-  *             received data is lower than expected one).
-  *        In DMA mode, RxEvent callback could be called several times;
+  *        in order to provide the accurate value.
+  * @note  In Interrupt Mode:
+  *        - HAL_UART_RXEVENT_TC : when Reception has been completed (expected nb of data has been received).
+  *        - HAL_UART_RXEVENT_IDLE : when Idle event occurred prior reception has been completed.
+  * @note  In DMA Mode:
+  *        - HAL_UART_RXEVENT_TC : when Reception has been completed (expected nb of data has been received).
+  *        - HAL_UART_RXEVENT_HT : when half of expected nb of data has been received.
+  *        - HAL_UART_RXEVENT_IDLE : when Idle event occurred prior reception has been completed.
+  * @note  In DMA mode, RxEvent callback could be called several times;
   *        When DMA is configured in Normal Mode, HT event does not stop Reception process;
   *        When DMA is configured in Circular Mode, HT, TC or IDLE events don't stop Reception process;
Index: trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_usb.c
===================================================================
--- trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_usb.c	(revision 40)
+++ trunk/fw_g473rct/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_usb.c	(revision 55)
@@ -34,4 +34,7 @@
       (#) The upper HAL HCD/PCD driver will call the right routines for its internal processes.
 
+      (#)NOTE: For applications not using double buffer mode, define the symbol
+                'USE_USB_DOUBLE_BUFFER' as 0 to reduce the driver's memory footprint.
+
   @endverbatim
 
@@ -62,5 +65,5 @@
   * @retval HAL status
   */
-HAL_StatusTypeDef USB_CoreInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg)
+HAL_StatusTypeDef USB_CoreInit(USB_TypeDef const *USBx, USB_CfgTypeDef cfg)
 {
   /* Prevent unused argument(s) compilation warning */
@@ -131,5 +134,5 @@
   * @retval HAL status
   */
-HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx, USB_ModeTypeDef mode)
+HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef const *USBx, USB_ModeTypeDef mode)
 {
   /* Prevent unused argument(s) compilation warning */
