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Last change
on this file since 42 was 42, checked in by f.jahn, 4 weeks ago |
- Nur noch einmal + und - als Bolzen am Ausgang
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File size:
2.5 KB
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| 1 | {
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| 2 | "board": {
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| 3 | "active_layer": 5,
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| 4 | "active_layer_preset": "",
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| 5 | "auto_track_width": true,
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| 6 | "hidden_netclasses": [],
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| 7 | "hidden_nets": [],
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| 8 | "high_contrast_mode": 0,
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| 9 | "net_color_mode": 1,
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| 10 | "opacity": {
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| 11 | "images": 0.6,
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| 12 | "pads": 1.0,
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| 13 | "shapes": 1.0,
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| 14 | "tracks": 1.0,
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| 15 | "vias": 1.0,
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| 16 | "zones": 0.6
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| 17 | },
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| 18 | "selection_filter": {
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| 19 | "dimensions": true,
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| 20 | "footprints": true,
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| 21 | "graphics": true,
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| 22 | "keepouts": true,
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| 23 | "lockedItems": true,
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| 24 | "otherItems": true,
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| 25 | "pads": true,
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| 26 | "text": true,
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| 27 | "tracks": true,
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| 28 | "vias": true,
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| 29 | "zones": true
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| 30 | },
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| 31 | "visible_items": [
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| 32 | "vias",
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| 33 | "footprint_text",
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| 34 | "footprint_anchors",
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| 35 | "ratsnest",
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| 36 | "grid",
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| 37 | "footprints_front",
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| 38 | "footprints_back",
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| 39 | "footprint_values",
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| 40 | "footprint_references",
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| 41 | "tracks",
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| 42 | "drc_errors",
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| 43 | "drawing_sheet",
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| 44 | "bitmaps",
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| 45 | "pads",
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| 46 | "zones",
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| 47 | "drc_warnings",
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| 48 | "locked_item_shadows",
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| 49 | "conflict_shadows",
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| 50 | "shapes"
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| 51 | ],
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| 52 | "visible_layers": "00000000_00000000_55555f5d_f7557ff7",
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| 53 | "zone_display_mode": 0
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| 54 | },
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| 55 | "git": {
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| 56 | "repo_type": "",
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| 57 | "repo_username": "",
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| 58 | "ssh_key": ""
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| 59 | },
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| 60 | "meta": {
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| 61 | "filename": "smartPro.kicad_prl",
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| 62 | "version": 5
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| 63 | },
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| 64 | "net_inspector_panel": {
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| 65 | "col_hidden": [
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| 66 | false,
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| 67 | false,
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| 68 | false,
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| 69 | false,
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| 70 | false,
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| 71 | false,
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| 72 | false,
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| 73 | false,
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| 74 | false,
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| 75 | false,
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| 76 | false,
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| 77 | false,
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| 78 | false,
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| 79 | false
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| 80 | ],
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| 81 | "col_order": [
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| 82 | 0,
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| 83 | 1,
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| 84 | 2,
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| 85 | 3,
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| 86 | 4,
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| 87 | 5,
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| 88 | 6,
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| 89 | 7,
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| 90 | 8,
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| 91 | 9,
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| 92 | 10,
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| 93 | 11,
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| 94 | 12,
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| 95 | 13
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| 96 | ],
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| 97 | "col_widths": [
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| 98 | 162,
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| 99 | 147,
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| 100 | 91,
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| 101 | 72,
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| 102 | 91,
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| 103 | 100,
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| 104 | 91,
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| 105 | 76,
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| 106 | 91,
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| 107 | 91,
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| 108 | 91,
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| 109 | 91,
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| 110 | 91,
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| 111 | 91
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| 112 | ],
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| 113 | "custom_group_rules": [],
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| 114 | "expanded_rows": [],
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| 115 | "filter_by_net_name": true,
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| 116 | "filter_by_netclass": true,
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| 117 | "filter_text": "",
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| 118 | "group_by_constraint": false,
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| 119 | "group_by_netclass": false,
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| 120 | "show_unconnected_nets": false,
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| 121 | "show_zero_pad_nets": false,
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| 122 | "sort_ascending": true,
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| 123 | "sorting_column": 0
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| 124 | },
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| 125 | "open_jobsets": [],
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| 126 | "project": {
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| 127 | "files": []
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| 128 | },
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| 129 | "schematic": {
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| 130 | "selection_filter": {
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| 131 | "graphics": true,
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| 132 | "images": true,
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| 133 | "labels": true,
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| 134 | "lockedItems": false,
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| 135 | "otherItems": true,
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| 136 | "pins": true,
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| 137 | "symbols": true,
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| 138 | "text": true,
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| 139 | "wires": true
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| 140 | }
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| 141 | }
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| 142 | }
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