source: trunk/fw_g473rct/startup_stm32g473xx.s@ 20

Last change on this file since 20 was 20, checked in by f.jahn, 4 months ago

adc dma funktioniert und modbus funktioniert

File size: 14.4 KB
Line 
1/**
2 ******************************************************************************
3 * @file startup_stm32g473xx.s
4 * @author MCD Application Team
5 * @brief STM32G473xx devices vector table GCC toolchain.
6 * This module performs:
7 * - Set the initial SP
8 * - Set the initial PC == Reset_Handler,
9 * - Set the vector table entries with the exceptions ISR address,
10 * - Configure the clock system
11 * - Branches to main in the C library (which eventually
12 * calls main()).
13 * After Reset the Cortex-M4 processor is in Thread mode,
14 * priority is Privileged, and the Stack is set to Main.
15 ******************************************************************************
16 * @attention
17 *
18 * Copyright (c) 2019 STMicroelectronics.
19 * All rights reserved.
20 *
21 * This software is licensed under terms that can be found in the LICENSE file
22 * in the root directory of this software component.
23 * If no LICENSE file comes with this software, it is provided AS-IS.
24 *
25 ******************************************************************************
26 */
27
28 .syntax unified
29 .cpu cortex-m4
30 .fpu softvfp
31 .thumb
32
33.global g_pfnVectors
34.global Default_Handler
35
36/* start address for the initialization values of the .data section.
37defined in linker script */
38.word _sidata
39/* start address for the .data section. defined in linker script */
40.word _sdata
41/* end address for the .data section. defined in linker script */
42.word _edata
43/* start address for the .bss section. defined in linker script */
44.word _sbss
45/* end address for the .bss section. defined in linker script */
46.word _ebss
47
48.equ BootRAM, 0xF1E0F85F
49/**
50 * @brief This is the code that gets called when the processor first
51 * starts execution following a reset event. Only the absolutely
52 * necessary set is performed, after which the application
53 * supplied main() routine is called.
54 * @param None
55 * @retval : None
56*/
57
58 .section .text.Reset_Handler
59 .weak Reset_Handler
60 .type Reset_Handler, %function
61Reset_Handler:
62 ldr r0, =_estack
63 mov sp, r0 /* set stack pointer */
64
65/* Call the clock system initialization function.*/
66 bl SystemInit
67
68/* Copy the data segment initializers from flash to SRAM */
69 ldr r0, =_sdata
70 ldr r1, =_edata
71 ldr r2, =_sidata
72 movs r3, #0
73 b LoopCopyDataInit
74
75CopyDataInit:
76 ldr r4, [r2, r3]
77 str r4, [r0, r3]
78 adds r3, r3, #4
79
80LoopCopyDataInit:
81 adds r4, r0, r3
82 cmp r4, r1
83 bcc CopyDataInit
84
85/* Zero fill the bss segment. */
86 ldr r2, =_sbss
87 ldr r4, =_ebss
88 movs r3, #0
89 b LoopFillZerobss
90
91FillZerobss:
92 str r3, [r2]
93 adds r2, r2, #4
94
95LoopFillZerobss:
96 cmp r2, r4
97 bcc FillZerobss
98
99/* Call static constructors */
100 bl __libc_init_array
101/* Call the application's entry point.*/
102 bl main
103
104LoopForever:
105 b LoopForever
106
107.size Reset_Handler, .-Reset_Handler
108
109/**
110 * @brief This is the code that gets called when the processor receives an
111 * unexpected interrupt. This simply enters an infinite loop, preserving
112 * the system state for examination by a debugger.
113 *
114 * @param None
115 * @retval : None
116*/
117 .section .text.Default_Handler,"ax",%progbits
118Default_Handler:
119Infinite_Loop:
120 b Infinite_Loop
121 .size Default_Handler, .-Default_Handler
122/******************************************************************************
123*
124* The minimal vector table for a Cortex-M4. Note that the proper constructs
125* must be placed on this to ensure that it ends up at physical address
126* 0x0000.0000.
127*
128******************************************************************************/
129 .section .isr_vector,"a",%progbits
130 .type g_pfnVectors, %object
131
132
133g_pfnVectors:
134 .word _estack
135 .word Reset_Handler
136 .word NMI_Handler
137 .word HardFault_Handler
138 .word MemManage_Handler
139 .word BusFault_Handler
140 .word UsageFault_Handler
141 .word 0
142 .word 0
143 .word 0
144 .word 0
145 .word SVC_Handler
146 .word DebugMon_Handler
147 .word 0
148 .word PendSV_Handler
149 .word SysTick_Handler
150 .word WWDG_IRQHandler
151 .word PVD_PVM_IRQHandler
152 .word RTC_TAMP_LSECSS_IRQHandler
153 .word RTC_WKUP_IRQHandler
154 .word FLASH_IRQHandler
155 .word RCC_IRQHandler
156 .word EXTI0_IRQHandler
157 .word EXTI1_IRQHandler
158 .word EXTI2_IRQHandler
159 .word EXTI3_IRQHandler
160 .word EXTI4_IRQHandler
161 .word DMA1_Channel1_IRQHandler
162 .word DMA1_Channel2_IRQHandler
163 .word DMA1_Channel3_IRQHandler
164 .word DMA1_Channel4_IRQHandler
165 .word DMA1_Channel5_IRQHandler
166 .word DMA1_Channel6_IRQHandler
167 .word DMA1_Channel7_IRQHandler
168 .word ADC1_2_IRQHandler
169 .word USB_HP_IRQHandler
170 .word USB_LP_IRQHandler
171 .word FDCAN1_IT0_IRQHandler
172 .word FDCAN1_IT1_IRQHandler
173 .word EXTI9_5_IRQHandler
174 .word TIM1_BRK_TIM15_IRQHandler
175 .word TIM1_UP_TIM16_IRQHandler
176 .word TIM1_TRG_COM_TIM17_IRQHandler
177 .word TIM1_CC_IRQHandler
178 .word TIM2_IRQHandler
179 .word TIM3_IRQHandler
180 .word TIM4_IRQHandler
181 .word I2C1_EV_IRQHandler
182 .word I2C1_ER_IRQHandler
183 .word I2C2_EV_IRQHandler
184 .word I2C2_ER_IRQHandler
185 .word SPI1_IRQHandler
186 .word SPI2_IRQHandler
187 .word USART1_IRQHandler
188 .word USART2_IRQHandler
189 .word USART3_IRQHandler
190 .word EXTI15_10_IRQHandler
191 .word RTC_Alarm_IRQHandler
192 .word USBWakeUp_IRQHandler
193 .word TIM8_BRK_IRQHandler
194 .word TIM8_UP_IRQHandler
195 .word TIM8_TRG_COM_IRQHandler
196 .word TIM8_CC_IRQHandler
197 .word ADC3_IRQHandler
198 .word FMC_IRQHandler
199 .word LPTIM1_IRQHandler
200 .word TIM5_IRQHandler
201 .word SPI3_IRQHandler
202 .word UART4_IRQHandler
203 .word UART5_IRQHandler
204 .word TIM6_DAC_IRQHandler
205 .word TIM7_DAC_IRQHandler
206 .word DMA2_Channel1_IRQHandler
207 .word DMA2_Channel2_IRQHandler
208 .word DMA2_Channel3_IRQHandler
209 .word DMA2_Channel4_IRQHandler
210 .word DMA2_Channel5_IRQHandler
211 .word ADC4_IRQHandler
212 .word ADC5_IRQHandler
213 .word UCPD1_IRQHandler
214 .word COMP1_2_3_IRQHandler
215 .word COMP4_5_6_IRQHandler
216 .word COMP7_IRQHandler
217 .word 0
218 .word 0
219 .word 0
220 .word 0
221 .word 0
222 .word 0
223 .word 0
224 .word 0
225 .word CRS_IRQHandler
226 .word SAI1_IRQHandler
227 .word TIM20_BRK_IRQHandler
228 .word TIM20_UP_IRQHandler
229 .word TIM20_TRG_COM_IRQHandler
230 .word TIM20_CC_IRQHandler
231 .word FPU_IRQHandler
232 .word I2C4_EV_IRQHandler
233 .word I2C4_ER_IRQHandler
234 .word SPI4_IRQHandler
235 .word 0
236 .word FDCAN2_IT0_IRQHandler
237 .word FDCAN2_IT1_IRQHandler
238 .word FDCAN3_IT0_IRQHandler
239 .word FDCAN3_IT1_IRQHandler
240 .word RNG_IRQHandler
241 .word LPUART1_IRQHandler
242 .word I2C3_EV_IRQHandler
243 .word I2C3_ER_IRQHandler
244 .word DMAMUX_OVR_IRQHandler
245 .word QUADSPI_IRQHandler
246 .word DMA1_Channel8_IRQHandler
247 .word DMA2_Channel6_IRQHandler
248 .word DMA2_Channel7_IRQHandler
249 .word DMA2_Channel8_IRQHandler
250 .word CORDIC_IRQHandler
251 .word FMAC_IRQHandler
252
253 .size g_pfnVectors, .-g_pfnVectors
254
255/*******************************************************************************
256*
257* Provide weak aliases for each Exception handler to the Default_Handler.
258* As they are weak aliases, any function with the same name will override
259* this definition.
260*
261*******************************************************************************/
262
263 .weak NMI_Handler
264 .thumb_set NMI_Handler,Default_Handler
265
266 .weak HardFault_Handler
267 .thumb_set HardFault_Handler,Default_Handler
268
269 .weak MemManage_Handler
270 .thumb_set MemManage_Handler,Default_Handler
271
272 .weak BusFault_Handler
273 .thumb_set BusFault_Handler,Default_Handler
274
275 .weak UsageFault_Handler
276 .thumb_set UsageFault_Handler,Default_Handler
277
278 .weak SVC_Handler
279 .thumb_set SVC_Handler,Default_Handler
280
281 .weak DebugMon_Handler
282 .thumb_set DebugMon_Handler,Default_Handler
283
284 .weak PendSV_Handler
285 .thumb_set PendSV_Handler,Default_Handler
286
287 .weak SysTick_Handler
288 .thumb_set SysTick_Handler,Default_Handler
289
290 .weak WWDG_IRQHandler
291 .thumb_set WWDG_IRQHandler,Default_Handler
292
293 .weak PVD_PVM_IRQHandler
294 .thumb_set PVD_PVM_IRQHandler,Default_Handler
295
296 .weak RTC_TAMP_LSECSS_IRQHandler
297 .thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
298
299 .weak RTC_WKUP_IRQHandler
300 .thumb_set RTC_WKUP_IRQHandler,Default_Handler
301
302 .weak FLASH_IRQHandler
303 .thumb_set FLASH_IRQHandler,Default_Handler
304
305 .weak RCC_IRQHandler
306 .thumb_set RCC_IRQHandler,Default_Handler
307
308 .weak EXTI0_IRQHandler
309 .thumb_set EXTI0_IRQHandler,Default_Handler
310
311 .weak EXTI1_IRQHandler
312 .thumb_set EXTI1_IRQHandler,Default_Handler
313
314 .weak EXTI2_IRQHandler
315 .thumb_set EXTI2_IRQHandler,Default_Handler
316
317 .weak EXTI3_IRQHandler
318 .thumb_set EXTI3_IRQHandler,Default_Handler
319
320 .weak EXTI4_IRQHandler
321 .thumb_set EXTI4_IRQHandler,Default_Handler
322
323 .weak DMA1_Channel1_IRQHandler
324 .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
325
326 .weak DMA1_Channel2_IRQHandler
327 .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
328
329 .weak DMA1_Channel3_IRQHandler
330 .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
331
332 .weak DMA1_Channel4_IRQHandler
333 .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
334
335 .weak DMA1_Channel5_IRQHandler
336 .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
337
338 .weak DMA1_Channel6_IRQHandler
339 .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
340
341 .weak DMA1_Channel7_IRQHandler
342 .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
343
344 .weak ADC1_2_IRQHandler
345 .thumb_set ADC1_2_IRQHandler,Default_Handler
346
347 .weak USB_HP_IRQHandler
348 .thumb_set USB_HP_IRQHandler,Default_Handler
349
350 .weak USB_LP_IRQHandler
351 .thumb_set USB_LP_IRQHandler,Default_Handler
352
353 .weak FDCAN1_IT0_IRQHandler
354 .thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
355
356 .weak FDCAN1_IT1_IRQHandler
357 .thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
358
359 .weak EXTI9_5_IRQHandler
360 .thumb_set EXTI9_5_IRQHandler,Default_Handler
361
362 .weak TIM1_BRK_TIM15_IRQHandler
363 .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
364
365 .weak TIM1_UP_TIM16_IRQHandler
366 .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
367
368 .weak TIM1_TRG_COM_TIM17_IRQHandler
369 .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
370
371 .weak TIM1_CC_IRQHandler
372 .thumb_set TIM1_CC_IRQHandler,Default_Handler
373
374 .weak TIM2_IRQHandler
375 .thumb_set TIM2_IRQHandler,Default_Handler
376
377 .weak TIM3_IRQHandler
378 .thumb_set TIM3_IRQHandler,Default_Handler
379
380 .weak TIM4_IRQHandler
381 .thumb_set TIM4_IRQHandler,Default_Handler
382
383 .weak I2C1_EV_IRQHandler
384 .thumb_set I2C1_EV_IRQHandler,Default_Handler
385
386 .weak I2C1_ER_IRQHandler
387 .thumb_set I2C1_ER_IRQHandler,Default_Handler
388
389 .weak I2C2_EV_IRQHandler
390 .thumb_set I2C2_EV_IRQHandler,Default_Handler
391
392 .weak I2C2_ER_IRQHandler
393 .thumb_set I2C2_ER_IRQHandler,Default_Handler
394
395 .weak SPI1_IRQHandler
396 .thumb_set SPI1_IRQHandler,Default_Handler
397
398 .weak SPI2_IRQHandler
399 .thumb_set SPI2_IRQHandler,Default_Handler
400
401 .weak USART1_IRQHandler
402 .thumb_set USART1_IRQHandler,Default_Handler
403
404 .weak USART2_IRQHandler
405 .thumb_set USART2_IRQHandler,Default_Handler
406
407 .weak USART3_IRQHandler
408 .thumb_set USART3_IRQHandler,Default_Handler
409
410 .weak EXTI15_10_IRQHandler
411 .thumb_set EXTI15_10_IRQHandler,Default_Handler
412
413 .weak RTC_Alarm_IRQHandler
414 .thumb_set RTC_Alarm_IRQHandler,Default_Handler
415
416 .weak USBWakeUp_IRQHandler
417 .thumb_set USBWakeUp_IRQHandler,Default_Handler
418
419 .weak TIM8_BRK_IRQHandler
420 .thumb_set TIM8_BRK_IRQHandler,Default_Handler
421
422 .weak TIM8_UP_IRQHandler
423 .thumb_set TIM8_UP_IRQHandler,Default_Handler
424
425 .weak TIM8_TRG_COM_IRQHandler
426 .thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
427
428 .weak TIM8_CC_IRQHandler
429 .thumb_set TIM8_CC_IRQHandler,Default_Handler
430
431 .weak ADC3_IRQHandler
432 .thumb_set ADC3_IRQHandler,Default_Handler
433
434 .weak FMC_IRQHandler
435 .thumb_set FMC_IRQHandler,Default_Handler
436
437 .weak LPTIM1_IRQHandler
438 .thumb_set LPTIM1_IRQHandler,Default_Handler
439
440 .weak TIM5_IRQHandler
441 .thumb_set TIM5_IRQHandler,Default_Handler
442
443 .weak SPI3_IRQHandler
444 .thumb_set SPI3_IRQHandler,Default_Handler
445
446 .weak UART4_IRQHandler
447 .thumb_set UART4_IRQHandler,Default_Handler
448
449 .weak UART5_IRQHandler
450 .thumb_set UART5_IRQHandler,Default_Handler
451
452 .weak TIM6_DAC_IRQHandler
453 .thumb_set TIM6_DAC_IRQHandler,Default_Handler
454
455 .weak TIM7_DAC_IRQHandler
456 .thumb_set TIM7_DAC_IRQHandler,Default_Handler
457
458 .weak DMA2_Channel1_IRQHandler
459 .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
460
461 .weak DMA2_Channel2_IRQHandler
462 .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
463
464 .weak DMA2_Channel3_IRQHandler
465 .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
466
467 .weak DMA2_Channel4_IRQHandler
468 .thumb_set DMA2_Channel4_IRQHandler,Default_Handler
469
470 .weak DMA2_Channel5_IRQHandler
471 .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
472
473 .weak ADC4_IRQHandler
474 .thumb_set ADC4_IRQHandler,Default_Handler
475
476 .weak ADC5_IRQHandler
477 .thumb_set ADC5_IRQHandler,Default_Handler
478
479 .weak UCPD1_IRQHandler
480 .thumb_set UCPD1_IRQHandler,Default_Handler
481
482 .weak COMP1_2_3_IRQHandler
483 .thumb_set COMP1_2_3_IRQHandler,Default_Handler
484
485 .weak COMP4_5_6_IRQHandler
486 .thumb_set COMP4_5_6_IRQHandler,Default_Handler
487
488 .weak COMP7_IRQHandler
489 .thumb_set COMP7_IRQHandler,Default_Handler
490
491 .weak CRS_IRQHandler
492 .thumb_set CRS_IRQHandler,Default_Handler
493
494 .weak SAI1_IRQHandler
495 .thumb_set SAI1_IRQHandler,Default_Handler
496
497 .weak TIM20_BRK_IRQHandler
498 .thumb_set TIM20_BRK_IRQHandler,Default_Handler
499
500 .weak TIM20_UP_IRQHandler
501 .thumb_set TIM20_UP_IRQHandler,Default_Handler
502
503 .weak TIM20_TRG_COM_IRQHandler
504 .thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
505
506 .weak TIM20_CC_IRQHandler
507 .thumb_set TIM20_CC_IRQHandler,Default_Handler
508
509 .weak FPU_IRQHandler
510 .thumb_set FPU_IRQHandler,Default_Handler
511
512 .weak I2C4_EV_IRQHandler
513 .thumb_set I2C4_EV_IRQHandler,Default_Handler
514
515 .weak I2C4_ER_IRQHandler
516 .thumb_set I2C4_ER_IRQHandler,Default_Handler
517
518 .weak SPI4_IRQHandler
519 .thumb_set SPI4_IRQHandler,Default_Handler
520
521 .weak FDCAN2_IT0_IRQHandler
522 .thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
523
524 .weak FDCAN2_IT1_IRQHandler
525 .thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
526
527 .weak FDCAN3_IT0_IRQHandler
528 .thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
529
530 .weak FDCAN3_IT1_IRQHandler
531 .thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
532
533 .weak RNG_IRQHandler
534 .thumb_set RNG_IRQHandler,Default_Handler
535
536 .weak LPUART1_IRQHandler
537 .thumb_set LPUART1_IRQHandler,Default_Handler
538
539 .weak I2C3_EV_IRQHandler
540 .thumb_set I2C3_EV_IRQHandler,Default_Handler
541
542 .weak I2C3_ER_IRQHandler
543 .thumb_set I2C3_ER_IRQHandler,Default_Handler
544
545 .weak DMAMUX_OVR_IRQHandler
546 .thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
547
548 .weak QUADSPI_IRQHandler
549 .thumb_set QUADSPI_IRQHandler,Default_Handler
550
551 .weak DMA1_Channel8_IRQHandler
552 .thumb_set DMA1_Channel8_IRQHandler,Default_Handler
553
554 .weak DMA2_Channel6_IRQHandler
555 .thumb_set DMA2_Channel6_IRQHandler,Default_Handler
556
557 .weak DMA2_Channel7_IRQHandler
558 .thumb_set DMA2_Channel7_IRQHandler,Default_Handler
559
560 .weak DMA2_Channel8_IRQHandler
561 .thumb_set DMA2_Channel8_IRQHandler,Default_Handler
562
563 .weak CORDIC_IRQHandler
564 .thumb_set CORDIC_IRQHandler,Default_Handler
565
566 .weak FMAC_IRQHandler
567 .thumb_set FMAC_IRQHandler,Default_Handler
568
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