source: trunk/fw_g473rct/SES/STM32G4xx/Source/stm32g473xx_Vectors.s

Last change on this file was 20, checked in by f.jahn, 4 months ago

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1/*********************************************************************
2* SEGGER Microcontroller GmbH *
3* The Embedded Experts *
4**********************************************************************
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6* (c) 2014 - 2024 SEGGER Microcontroller GmbH *
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8* www.segger.com Support: support@segger.com *
9* *
10**********************************************************************
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12* All rights reserved. *
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15* without modification, are permitted provided that the following *
16* condition is met: *
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21* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
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28* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
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35**********************************************************************
36
37-------------------------- END-OF-HEADER -----------------------------
38
39File : stm32g473xx_Vectors.s
40Purpose : Exception and interrupt vectors for stm32g473xx devices.
41
42Additional information:
43 Preprocessor Definitions
44 __NO_EXTERNAL_INTERRUPTS
45 If defined,
46 the vector table will contain only the internal exceptions
47 and interrupts.
48 __VECTORS_IN_RAM
49 If defined,
50 an area of RAM, large enough to store the vector table,
51 will be reserved.
52
53 __OPTIMIZATION_SMALL
54 If defined,
55 all weak definitions of interrupt handlers will share the
56 same implementation.
57 If not defined,
58 all weak definitions of interrupt handlers will be defined
59 with their own implementation.
60*/
61 .syntax unified
62
63/*********************************************************************
64*
65* Macros
66*
67**********************************************************************
68*/
69
70//
71// Directly place a vector (word) in the vector table
72//
73.macro VECTOR Name=
74 .section .vectors, "ax"
75 .code 16
76 .word \Name
77.endm
78
79//
80// Declare an exception handler with a weak definition
81//
82.macro EXC_HANDLER Name=
83 //
84 // Insert vector in vector table
85 //
86 .section .vectors, "ax"
87 .word \Name
88 //
89 // Insert dummy handler in init section
90 //
91 .section .init.\Name, "ax"
92 .thumb_func
93 .weak \Name
94 .balign 2
95\Name:
96 1: b 1b // Endless loop
97.endm
98
99//
100// Declare an interrupt handler with a weak definition
101//
102.macro ISR_HANDLER Name=
103 //
104 // Insert vector in vector table
105 //
106 .section .vectors, "ax"
107 .word \Name
108 //
109 // Insert dummy handler in init section
110 //
111#if defined(__OPTIMIZATION_SMALL)
112 .section .init, "ax"
113 .weak \Name
114 .thumb_set \Name,Dummy_Handler
115#else
116 .section .init.\Name, "ax"
117 .thumb_func
118 .weak \Name
119 .balign 2
120\Name:
121 1: b 1b // Endless loop
122#endif
123.endm
124
125//
126// Place a reserved vector in vector table
127//
128.macro ISR_RESERVED
129 .section .vectors, "ax"
130 .word 0
131.endm
132
133//
134// Place a reserved vector in vector table
135//
136.macro ISR_RESERVED_DUMMY
137 .section .vectors, "ax"
138 .word Dummy_Handler
139.endm
140
141/*********************************************************************
142*
143* Externals
144*
145**********************************************************************
146*/
147 .extern __stack_end__
148 .extern Reset_Handler
149 .extern HardFault_Handler
150
151/*********************************************************************
152*
153* Global functions
154*
155**********************************************************************
156*/
157
158/*********************************************************************
159*
160* Setup of the vector table and weak definition of interrupt handlers
161*
162*/
163 .section .vectors, "ax"
164 .code 16
165 .balign 512
166 .global _vectors
167_vectors:
168 //
169 // Internal exceptions and interrupts
170 //
171 VECTOR __stack_end__
172 VECTOR Reset_Handler
173 EXC_HANDLER NMI_Handler
174 VECTOR HardFault_Handler
175#ifdef __ARM_ARCH_6M__
176 ISR_RESERVED
177 ISR_RESERVED
178 ISR_RESERVED
179#else
180 EXC_HANDLER MemManage_Handler
181 EXC_HANDLER BusFault_Handler
182 EXC_HANDLER UsageFault_Handler
183#endif
184 ISR_RESERVED
185 ISR_RESERVED
186 ISR_RESERVED
187 ISR_RESERVED
188 EXC_HANDLER SVC_Handler
189#ifdef __ARM_ARCH_6M__
190 ISR_RESERVED
191#else
192 EXC_HANDLER DebugMon_Handler
193#endif
194 ISR_RESERVED
195 EXC_HANDLER PendSV_Handler
196 EXC_HANDLER SysTick_Handler
197 //
198 // External interrupts
199 //
200#ifndef __NO_EXTERNAL_INTERRUPTS
201 ISR_HANDLER WWDG_IRQHandler
202 ISR_HANDLER PVD_PVM_IRQHandler
203 ISR_HANDLER RTC_TAMP_LSECSS_IRQHandler
204 ISR_HANDLER RTC_WKUP_IRQHandler
205 ISR_HANDLER FLASH_IRQHandler
206 ISR_HANDLER RCC_IRQHandler
207 ISR_HANDLER EXTI0_IRQHandler
208 ISR_HANDLER EXTI1_IRQHandler
209 ISR_HANDLER EXTI2_IRQHandler
210 ISR_HANDLER EXTI3_IRQHandler
211 ISR_HANDLER EXTI4_IRQHandler
212 ISR_HANDLER DMA1_Channel1_IRQHandler
213 ISR_HANDLER DMA1_Channel2_IRQHandler
214 ISR_HANDLER DMA1_Channel3_IRQHandler
215 ISR_HANDLER DMA1_Channel4_IRQHandler
216 ISR_HANDLER DMA1_Channel5_IRQHandler
217 ISR_HANDLER DMA1_Channel6_IRQHandler
218 ISR_HANDLER DMA1_Channel7_IRQHandler
219 ISR_HANDLER ADC1_2_IRQHandler
220 ISR_HANDLER USB_HP_IRQHandler
221 ISR_HANDLER USB_LP_IRQHandler
222 ISR_HANDLER FDCAN1_IT0_IRQHandler
223 ISR_HANDLER FDCAN1_IT1_IRQHandler
224 ISR_HANDLER EXTI9_5_IRQHandler
225 ISR_HANDLER TIM1_BRK_TIM15_IRQHandler
226 ISR_HANDLER TIM1_UP_TIM16_IRQHandler
227 ISR_HANDLER TIM1_TRG_COM_TIM17_IRQHandler
228 ISR_HANDLER TIM1_CC_IRQHandler
229 ISR_HANDLER TIM2_IRQHandler
230 ISR_HANDLER TIM3_IRQHandler
231 ISR_HANDLER TIM4_IRQHandler
232 ISR_HANDLER I2C1_EV_IRQHandler
233 ISR_HANDLER I2C1_ER_IRQHandler
234 ISR_HANDLER I2C2_EV_IRQHandler
235 ISR_HANDLER I2C2_ER_IRQHandler
236 ISR_HANDLER SPI1_IRQHandler
237 ISR_HANDLER SPI2_IRQHandler
238 ISR_HANDLER USART1_IRQHandler
239 ISR_HANDLER USART2_IRQHandler
240 ISR_HANDLER USART3_IRQHandler
241 ISR_HANDLER EXTI15_10_IRQHandler
242 ISR_HANDLER RTC_Alarm_IRQHandler
243 ISR_HANDLER USBWakeUp_IRQHandler
244 ISR_HANDLER TIM8_BRK_IRQHandler
245 ISR_HANDLER TIM8_UP_IRQHandler
246 ISR_HANDLER TIM8_TRG_COM_IRQHandler
247 ISR_HANDLER TIM8_CC_IRQHandler
248 ISR_HANDLER ADC3_IRQHandler
249 ISR_HANDLER FMC_IRQHandler
250 ISR_HANDLER LPTIM1_IRQHandler
251 ISR_HANDLER TIM5_IRQHandler
252 ISR_HANDLER SPI3_IRQHandler
253 ISR_HANDLER UART4_IRQHandler
254 ISR_HANDLER UART5_IRQHandler
255 ISR_HANDLER TIM6_DAC_IRQHandler
256 ISR_HANDLER TIM7_DAC_IRQHandler
257 ISR_HANDLER DMA2_Channel1_IRQHandler
258 ISR_HANDLER DMA2_Channel2_IRQHandler
259 ISR_HANDLER DMA2_Channel3_IRQHandler
260 ISR_HANDLER DMA2_Channel4_IRQHandler
261 ISR_HANDLER DMA2_Channel5_IRQHandler
262 ISR_HANDLER ADC4_IRQHandler
263 ISR_HANDLER ADC5_IRQHandler
264 ISR_HANDLER UCPD1_IRQHandler
265 ISR_HANDLER COMP1_2_3_IRQHandler
266 ISR_HANDLER COMP4_5_6_IRQHandler
267 ISR_HANDLER COMP7_IRQHandler
268 ISR_RESERVED
269 ISR_RESERVED
270 ISR_RESERVED
271 ISR_RESERVED
272 ISR_RESERVED
273 ISR_RESERVED
274 ISR_RESERVED
275 ISR_RESERVED
276 ISR_HANDLER CRS_IRQHandler
277 ISR_HANDLER SAI1_IRQHandler
278 ISR_HANDLER TIM20_BRK_IRQHandler
279 ISR_HANDLER TIM20_UP_IRQHandler
280 ISR_HANDLER TIM20_TRG_COM_IRQHandler
281 ISR_HANDLER TIM20_CC_IRQHandler
282 ISR_HANDLER FPU_IRQHandler
283 ISR_HANDLER I2C4_EV_IRQHandler
284 ISR_HANDLER I2C4_ER_IRQHandler
285 ISR_HANDLER SPI4_IRQHandler
286 ISR_RESERVED
287 ISR_HANDLER FDCAN2_IT0_IRQHandler
288 ISR_HANDLER FDCAN2_IT1_IRQHandler
289 ISR_HANDLER FDCAN3_IT0_IRQHandler
290 ISR_HANDLER FDCAN3_IT1_IRQHandler
291 ISR_HANDLER RNG_IRQHandler
292 ISR_HANDLER LPUART1_IRQHandler
293 ISR_HANDLER I2C3_EV_IRQHandler
294 ISR_HANDLER I2C3_ER_IRQHandler
295 ISR_HANDLER DMAMUX_OVR_IRQHandler
296 ISR_HANDLER QUADSPI_IRQHandler
297 ISR_HANDLER DMA1_Channel8_IRQHandler
298 ISR_HANDLER DMA2_Channel6_IRQHandler
299 ISR_HANDLER DMA2_Channel7_IRQHandler
300 ISR_HANDLER DMA2_Channel8_IRQHandler
301 ISR_HANDLER CORDIC_IRQHandler
302 ISR_HANDLER FMAC_IRQHandler
303#endif
304 //
305 .section .vectors, "ax"
306_vectors_end:
307
308#ifdef __VECTORS_IN_RAM
309 //
310 // Reserve space with the size of the vector table
311 // in the designated RAM section.
312 //
313 .section .vectors_ram, "ax"
314 .balign 512
315 .global _vectors_ram
316
317_vectors_ram:
318 .space _vectors_end - _vectors, 0
319#endif
320
321/*********************************************************************
322*
323* Dummy handler to be used for reserved interrupt vectors
324* and weak implementation of interrupts.
325*
326*/
327 .section .init.Dummy_Handler, "ax"
328 .thumb_func
329 .weak Dummy_Handler
330 .balign 2
331Dummy_Handler:
332 1: b 1b // Endless loop
333
334
335/*************************** End of file ****************************/
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