| 1 | /* USER CODE BEGIN Header */
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| 2 | /**
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| 3 | ******************************************************************************
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| 4 | * @file dma.c
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| 5 | * @brief This file provides code for the configuration
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| 6 | * of all the requested memory to memory DMA transfers.
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| 7 | ******************************************************************************
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| 8 | * @attention
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| 9 | *
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| 10 | * Copyright (c) 2025 STMicroelectronics.
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| 11 | * All rights reserved.
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| 12 | *
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| 13 | * This software is licensed under terms that can be found in the LICENSE file
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| 14 | * in the root directory of this software component.
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| 15 | * If no LICENSE file comes with this software, it is provided AS-IS.
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| 16 | *
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| 17 | ******************************************************************************
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| 18 | */
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| 19 | /* USER CODE END Header */
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| 20 |
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| 21 | /* Includes ------------------------------------------------------------------*/
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| 22 | #include "dma.h"
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| 23 |
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| 24 | /* USER CODE BEGIN 0 */
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| 25 |
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| 26 | /* USER CODE END 0 */
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| 27 |
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| 28 | /*----------------------------------------------------------------------------*/
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| 29 | /* Configure DMA */
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| 30 | /*----------------------------------------------------------------------------*/
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| 31 |
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| 32 | /* USER CODE BEGIN 1 */
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| 33 |
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| 34 | /* USER CODE END 1 */
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| 35 |
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| 36 | /**
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| 37 | * Enable DMA controller clock
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| 38 | */
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| 39 | void MX_DMA_Init(void)
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| 40 | {
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| 41 |
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| 42 | /* DMA controller clock enable */
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| 43 | __HAL_RCC_DMAMUX1_CLK_ENABLE();
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| 44 | __HAL_RCC_DMA1_CLK_ENABLE();
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| 45 |
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| 46 | /* DMA interrupt init */
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| 47 | /* DMA1_Channel1_IRQn interrupt configuration */
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| 48 | HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
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| 49 | HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
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| 50 | /* DMA1_Channel2_IRQn interrupt configuration */
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| 51 | HAL_NVIC_SetPriority(DMA1_Channel2_IRQn, 0, 0);
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| 52 | HAL_NVIC_EnableIRQ(DMA1_Channel2_IRQn);
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| 53 | /* DMA1_Channel3_IRQn interrupt configuration */
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| 54 | HAL_NVIC_SetPriority(DMA1_Channel3_IRQn, 0, 0);
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| 55 | HAL_NVIC_EnableIRQ(DMA1_Channel3_IRQn);
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| 56 | /* DMA1_Channel4_IRQn interrupt configuration */
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| 57 | HAL_NVIC_SetPriority(DMA1_Channel4_IRQn, 0, 0);
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| 58 | HAL_NVIC_EnableIRQ(DMA1_Channel4_IRQn);
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| 59 | /* DMA1_Channel5_IRQn interrupt configuration */
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| 60 | HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 0, 0);
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| 61 | HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn);
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| 62 | /* DMA1_Channel6_IRQn interrupt configuration */
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| 63 | HAL_NVIC_SetPriority(DMA1_Channel6_IRQn, 0, 0);
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| 64 | HAL_NVIC_EnableIRQ(DMA1_Channel6_IRQn);
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| 65 | /* DMA1_Channel7_IRQn interrupt configuration */
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| 66 | HAL_NVIC_SetPriority(DMA1_Channel7_IRQn, 0, 0);
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| 67 | HAL_NVIC_EnableIRQ(DMA1_Channel7_IRQn);
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| 68 |
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| 69 | }
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| 70 |
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| 71 | /* USER CODE BEGIN 2 */
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| 72 |
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| 73 | /* USER CODE END 2 */
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| 74 |
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