source: trunk/firmware/startup/startup_stm32g070xx.s@ 26

Last change on this file since 26 was 6, checked in by f.jahn, 8 months ago
File size: 9.2 KB
RevLine 
[6]1/**
2 ******************************************************************************
3 * @file startup_stm32g070xx.s
4 * @author MCD Application Team
5 * @brief STM32G070xx devices vector table for SW4STM32 toolchain.
6 * This module performs:
7 * - Set the initial SP
8 * - Set the initial PC == Reset_Handler,
9 * - Set the vector table entries with the exceptions ISR address
10 * - Branches to main in the C library (which eventually
11 * calls main()).
12 * After Reset the Cortex-M0+ processor is in Thread mode,
13 * priority is Privileged, and the Stack is set to Main.
14 ******************************************************************************
15 * @attention
16 *
17 * Copyright (c) 2018 STMicroelectronics. All rights reserved.
18 *
19 * This software component is licensed by ST under BSD 3-Clause license,
20 * the "License"; You may not use this file except in compliance with the
21 * License. You may obtain a copy of the License at:
22 * opensource.org/licenses/BSD-3-Clause
23 *
24 ******************************************************************************
25 */
26
27 .syntax unified
28 .cpu cortex-m0
29 .fpu softvfp
30 .thumb
31
32.global g_pfnVectors
33.global Default_Handler
34
35/* start address for the initialization values of the .data section.
36defined in linker script */
37.word _sidata
38/* start address for the .data section. defined in linker script */
39.word _sdata
40/* end address for the .data section. defined in linker script */
41.word _edata
42/* start address for the .bss section. defined in linker script */
43.word _sbss
44/* end address for the .bss section. defined in linker script */
45.word _ebss
46
47 .section .text.Reset_Handler
48 .weak Reset_Handler
49 .type Reset_Handler, %function
50Reset_Handler:
51 ldr r0, =_estack
52 mov sp, r0 /* set stack pointer */
53
54/* Copy the data segment initializers from flash to SRAM */
55 movs r1, #0
56 b LoopCopyDataInit
57
58CopyDataInit:
59 ldr r3, =_sidata
60 ldr r3, [r3, r1]
61 str r3, [r0, r1]
62 adds r1, r1, #4
63
64LoopCopyDataInit:
65 ldr r0, =_sdata
66 ldr r3, =_edata
67 adds r2, r0, r1
68 cmp r2, r3
69 bcc CopyDataInit
70 ldr r2, =_sbss
71 b LoopFillZerobss
72/* Zero fill the bss segment. */
73FillZerobss:
74 movs r3, #0
75 str r3, [r2]
76 adds r2, r2, #4
77
78
79LoopFillZerobss:
80 ldr r3, = _ebss
81 cmp r2, r3
82 bcc FillZerobss
83
84/* Call the clock system intitialization function.*/
85 bl SystemInit
86/* Call static constructors */
87 bl __libc_init_array
88/* Call the application's entry point.*/
89 bl main
90
91LoopForever:
92 b LoopForever
93
94
95.size Reset_Handler, .-Reset_Handler
96
97/**
98 * @brief This is the code that gets called when the processor receives an
99 * unexpected interrupt. This simply enters an infinite loop, preserving
100 * the system state for examination by a debugger.
101 *
102 * @param None
103 * @retval : None
104*/
105 .section .text.Default_Handler,"ax",%progbits
106Default_Handler:
107Infinite_Loop:
108 b Infinite_Loop
109 .size Default_Handler, .-Default_Handler
110/******************************************************************************
111*
112* The minimal vector table for a Cortex M0. Note that the proper constructs
113* must be placed on this to ensure that it ends up at physical address
114* 0x0000.0000.
115*
116******************************************************************************/
117 .section .isr_vector,"a",%progbits
118 .type g_pfnVectors, %object
119 .size g_pfnVectors, .-g_pfnVectors
120
121
122g_pfnVectors:
123 .word _estack
124 .word Reset_Handler
125 .word NMI_Handler
126 .word HardFault_Handler
127 .word 0
128 .word 0
129 .word 0
130 .word 0
131 .word 0
132 .word 0
133 .word 0
134 .word SVC_Handler
135 .word 0
136 .word 0
137 .word PendSV_Handler
138 .word SysTick_Handler
139 .word WWDG_IRQHandler /* Window WatchDog */
140 .word 0 /* reserved */
141 .word RTC_TAMP_IRQHandler /* RTC through the EXTI line */
142 .word FLASH_IRQHandler /* FLASH */
143 .word RCC_IRQHandler /* RCC */
144 .word EXTI0_1_IRQHandler /* EXTI Line 0 and 1 */
145 .word EXTI2_3_IRQHandler /* EXTI Line 2 and 3 */
146 .word EXTI4_15_IRQHandler /* EXTI Line 4 to 15 */
147 .word 0 /* reserved */
148 .word DMA1_Channel1_IRQHandler /* DMA1 Channel 1 */
149 .word DMA1_Channel2_3_IRQHandler /* DMA1 Channel 2 and Channel 3 */
150 .word DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler /* DMA1 Channel 4 to Channel 7, DMAMUX1 overrun */
151 .word ADC1_IRQHandler /* ADC1 */
152 .word TIM1_BRK_UP_TRG_COM_IRQHandler /* TIM1 Break, Update, Trigger and Commutation */
153 .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
154 .word 0 /* reserved */
155 .word TIM3_IRQHandler /* TIM3 */
156 .word TIM6_IRQHandler /* TIM6 */
157 .word TIM7_IRQHandler /* TIM7 */
158 .word TIM14_IRQHandler /* TIM14 */
159 .word TIM15_IRQHandler /* TIM15 */
160 .word TIM16_IRQHandler /* TIM16 */
161 .word TIM17_IRQHandler /* TIM17 */
162 .word I2C1_IRQHandler /* I2C1 */
163 .word I2C2_IRQHandler /* I2C2 */
164 .word SPI1_IRQHandler /* SPI1 */
165 .word SPI2_IRQHandler /* SPI2 */
166 .word USART1_IRQHandler /* USART1 */
167 .word USART2_IRQHandler /* USART2 */
168 .word USART3_4_IRQHandler /* USART3, USART4 */
169
170/*******************************************************************************
171*
172* Provide weak aliases for each Exception handler to the Default_Handler.
173* As they are weak aliases, any function with the same name will override
174* this definition.
175*
176*******************************************************************************/
177
178 .weak NMI_Handler
179 .thumb_set NMI_Handler,Default_Handler
180
181 .weak HardFault_Handler
182 .thumb_set HardFault_Handler,Default_Handler
183
184 .weak SVC_Handler
185 .thumb_set SVC_Handler,Default_Handler
186
187 .weak PendSV_Handler
188 .thumb_set PendSV_Handler,Default_Handler
189
190 .weak SysTick_Handler
191 .thumb_set SysTick_Handler,Default_Handler
192
193 .weak WWDG_IRQHandler
194 .thumb_set WWDG_IRQHandler,Default_Handler
195
196 .weak RTC_TAMP_IRQHandler
197 .thumb_set RTC_TAMP_IRQHandler,Default_Handler
198
199 .weak FLASH_IRQHandler
200 .thumb_set FLASH_IRQHandler,Default_Handler
201
202 .weak RCC_IRQHandler
203 .thumb_set RCC_IRQHandler,Default_Handler
204
205 .weak EXTI0_1_IRQHandler
206 .thumb_set EXTI0_1_IRQHandler,Default_Handler
207
208 .weak EXTI2_3_IRQHandler
209 .thumb_set EXTI2_3_IRQHandler,Default_Handler
210
211 .weak EXTI4_15_IRQHandler
212 .thumb_set EXTI4_15_IRQHandler,Default_Handler
213
214 .weak DMA1_Channel1_IRQHandler
215 .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
216
217 .weak DMA1_Channel2_3_IRQHandler
218 .thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler
219
220 .weak DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler
221 .thumb_set DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler,Default_Handler
222
223 .weak ADC1_IRQHandler
224 .thumb_set ADC1_IRQHandler,Default_Handler
225
226 .weak TIM1_BRK_UP_TRG_COM_IRQHandler
227 .thumb_set TIM1_BRK_UP_TRG_COM_IRQHandler,Default_Handler
228
229 .weak TIM1_CC_IRQHandler
230 .thumb_set TIM1_CC_IRQHandler,Default_Handler
231
232 .weak TIM3_IRQHandler
233 .thumb_set TIM3_IRQHandler,Default_Handler
234
235 .weak TIM6_IRQHandler
236 .thumb_set TIM6_IRQHandler,Default_Handler
237
238 .weak TIM7_IRQHandler
239 .thumb_set TIM7_IRQHandler,Default_Handler
240
241 .weak TIM14_IRQHandler
242 .thumb_set TIM14_IRQHandler,Default_Handler
243
244 .weak TIM15_IRQHandler
245 .thumb_set TIM15_IRQHandler,Default_Handler
246
247 .weak TIM16_IRQHandler
248 .thumb_set TIM16_IRQHandler,Default_Handler
249
250 .weak TIM17_IRQHandler
251 .thumb_set TIM17_IRQHandler,Default_Handler
252
253 .weak I2C1_IRQHandler
254 .thumb_set I2C1_IRQHandler,Default_Handler
255
256 .weak I2C2_IRQHandler
257 .thumb_set I2C2_IRQHandler,Default_Handler
258
259 .weak SPI1_IRQHandler
260 .thumb_set SPI1_IRQHandler,Default_Handler
261
262 .weak SPI2_IRQHandler
263 .thumb_set SPI2_IRQHandler,Default_Handler
264
265 .weak USART1_IRQHandler
266 .thumb_set USART1_IRQHandler,Default_Handler
267
268 .weak USART2_IRQHandler
269 .thumb_set USART2_IRQHandler,Default_Handler
270
271 .weak USART3_4_IRQHandler
272 .thumb_set USART3_4_IRQHandler,Default_Handler
273
274/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
275
Note: See TracBrowser for help on using the repository browser.