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stm32g0xx_ll_usart.c

Last change on this file was 6, checked in by f.jahn, 8 months ago

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1	/**
2	******************************************************************************
3	* @file stm32g0xx_ll_usart.c
4	* @author MCD Application Team
5	* @brief USART LL module driver.
6	******************************************************************************
7	* @attention
8	*
9	* <h2><center>© Copyright (c) 2018 STMicroelectronics.
10	* All rights reserved.</center></h2>
11	*
12	* This software component is licensed by ST under BSD 3-Clause license,
13	* the "License"; You may not use this file except in compliance with the
14	* License. You may obtain a copy of the License at:
15	* opensource.org/licenses/BSD-3-Clause
16	*
17	******************************************************************************
18	*/
19	#if defined(USE_FULL_LL_DRIVER)
20
21	/* Includes ------------------------------------------------------------------*/
22	#include "stm32g0xx_ll_usart.h"
23	#include "stm32g0xx_ll_rcc.h"
24	#include "stm32g0xx_ll_bus.h"
25	#ifdef USE_FULL_ASSERT
26	#include "stm32_assert.h"
27	#else
28	#define assert_param(expr) ((void)0U)
29	#endif
30
31	/** @addtogroup STM32G0xx_LL_Driver
32	* @{
33	*/
34
35	#if defined (USART1) \|\| defined (USART2) \|\| defined (USART3) \|\| defined (USART4)
36
37	/** @addtogroup USART_LL
38	* @{
39	*/
40
41	/* Private types -------------------------------------------------------------*/
42	/* Private variables ---------------------------------------------------------*/
43	/* Private constants ---------------------------------------------------------*/
44	/** @addtogroup USART_LL_Private_Constants
45	* @{
46	*/
47
48	/**
49	* @}
50	*/
51
52	/* Private macros ------------------------------------------------------------*/
53	/** @addtogroup USART_LL_Private_Macros
54	* @{
55	*/
56
57	#define IS_LL_USART_PRESCALER(__VALUE__) (((__VALUE__) == LL_USART_PRESCALER_DIV1) \
58	\|\| ((__VALUE__) == LL_USART_PRESCALER_DIV2) \
59	\|\| ((__VALUE__) == LL_USART_PRESCALER_DIV4) \
60	\|\| ((__VALUE__) == LL_USART_PRESCALER_DIV6) \
61	\|\| ((__VALUE__) == LL_USART_PRESCALER_DIV8) \
62	\|\| ((__VALUE__) == LL_USART_PRESCALER_DIV10) \
63	\|\| ((__VALUE__) == LL_USART_PRESCALER_DIV12) \
64	\|\| ((__VALUE__) == LL_USART_PRESCALER_DIV16) \
65	\|\| ((__VALUE__) == LL_USART_PRESCALER_DIV32) \
66	\|\| ((__VALUE__) == LL_USART_PRESCALER_DIV64) \
67	\|\| ((__VALUE__) == LL_USART_PRESCALER_DIV128) \
68	\|\| ((__VALUE__) == LL_USART_PRESCALER_DIV256))
69
70	/* __BAUDRATE__ The maximum Baud Rate is derived from the maximum clock available
71	* divided by the smallest oversampling used on the USART (i.e. 8) */
72	#define IS_LL_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 8000000U)
73
74	/* __VALUE__ In case of oversampling by 16 and 8, BRR content must be greater than or equal to 16d. */
75	#define IS_LL_USART_BRR_MIN(__VALUE__) ((__VALUE__) >= 16U)
76
77	/* __VALUE__ BRR content must be lower than or equal to 0xFFFF. */
78	#define IS_LL_USART_BRR_MAX(__VALUE__) ((__VALUE__) <= 0x0000FFFFU)
79
80	#define IS_LL_USART_DIRECTION(__VALUE__) (((__VALUE__) == LL_USART_DIRECTION_NONE) \
81	\|\| ((__VALUE__) == LL_USART_DIRECTION_RX) \
82	\|\| ((__VALUE__) == LL_USART_DIRECTION_TX) \
83	\|\| ((__VALUE__) == LL_USART_DIRECTION_TX_RX))
84
85	#define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \
86	\|\| ((__VALUE__) == LL_USART_PARITY_EVEN) \
87	\|\| ((__VALUE__) == LL_USART_PARITY_ODD))
88
89	#define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_7B) \
90	\|\| ((__VALUE__) == LL_USART_DATAWIDTH_8B) \
91	\|\| ((__VALUE__) == LL_USART_DATAWIDTH_9B))
92
93	#define IS_LL_USART_OVERSAMPLING(__VALUE__) (((__VALUE__) == LL_USART_OVERSAMPLING_16) \
94	\|\| ((__VALUE__) == LL_USART_OVERSAMPLING_8))
95
96	#define IS_LL_USART_LASTBITCLKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_LASTCLKPULSE_NO_OUTPUT) \
97	\|\| ((__VALUE__) == LL_USART_LASTCLKPULSE_OUTPUT))
98
99	#define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
100	\|\| ((__VALUE__) == LL_USART_PHASE_2EDGE))
101
102	#define IS_LL_USART_CLOCKPOLARITY(__VALUE__) (((__VALUE__) == LL_USART_POLARITY_LOW) \
103	\|\| ((__VALUE__) == LL_USART_POLARITY_HIGH))
104
105	#define IS_LL_USART_CLOCKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_CLOCK_DISABLE) \
106	\|\| ((__VALUE__) == LL_USART_CLOCK_ENABLE))
107
108	#define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_0_5) \
109	\|\| ((__VALUE__) == LL_USART_STOPBITS_1) \
110	\|\| ((__VALUE__) == LL_USART_STOPBITS_1_5) \
111	\|\| ((__VALUE__) == LL_USART_STOPBITS_2))
112
113	#define IS_LL_USART_HWCONTROL(__VALUE__) (((__VALUE__) == LL_USART_HWCONTROL_NONE) \
114	\|\| ((__VALUE__) == LL_USART_HWCONTROL_RTS) \
115	\|\| ((__VALUE__) == LL_USART_HWCONTROL_CTS) \
116	\|\| ((__VALUE__) == LL_USART_HWCONTROL_RTS_CTS))
117
118	/**
119	* @}
120	*/
121
122	/* Private function prototypes -----------------------------------------------*/
123
124	/* Exported functions --------------------------------------------------------*/
125	/** @addtogroup USART_LL_Exported_Functions
126	* @{
127	*/
128
129	/** @addtogroup USART_LL_EF_Init
130	* @{
131	*/
132
133	/**
134	* @brief De-initialize USART registers (Registers restored to their default values).
135	* @param USARTx USART Instance
136	* @retval An ErrorStatus enumeration value:
137	* - SUCCESS: USART registers are de-initialized
138	* - ERROR: USART registers are not de-initialized
139	*/
140	ErrorStatus LL_USART_DeInit(USART_TypeDef *USARTx)
141	{
142	ErrorStatus status = SUCCESS;
143
144	/* Check the parameters */
145	assert_param(IS_UART_INSTANCE(USARTx));
146
147	if (USARTx == USART1)
148	{
149	/* Force reset of USART clock */
150	LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART1);
151
152	/* Release reset of USART clock */
153	LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART1);
154	}
155	else if (USARTx == USART2)
156	{
157	/* Force reset of USART clock */
158	LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART2);
159
160	/* Release reset of USART clock */
161	LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART2);
162	}
163	#if defined(USART3)
164	else if (USARTx == USART3)
165	{
166	/* Force reset of USART clock */
167	LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART3);
168
169	/* Release reset of USART clock */
170	LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART3);
171	}
172	#endif /* USART3 */
173	#if defined(USART4)
174	else if (USARTx == USART4)
175	{
176	/* Force reset of USART clock */
177	LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART4);
178
179	/* Release reset of USART clock */
180	LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART4);
181	}
182	#endif /* USART4 */
183	else
184	{
185	status = ERROR;
186	}
187
188	return (status);
189	}
190
191	/**
192	* @brief Initialize USART registers according to the specified
193	* parameters in USART_InitStruct.
194	* @note As some bits in USART configuration registers can only be written when the USART is disabled (USART_CR1_UE bit =0),
195	* USART Peripheral should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
196	* @note Baud rate value stored in USART_InitStruct BaudRate field, should be valid (different from 0).
197	* @param USARTx USART Instance
198	* @param USART_InitStruct pointer to a LL_USART_InitTypeDef structure
199	* that contains the configuration information for the specified USART peripheral.
200	* @retval An ErrorStatus enumeration value:
201	* - SUCCESS: USART registers are initialized according to USART_InitStruct content
202	* - ERROR: Problem occurred during USART Registers initialization
203	*/
204	ErrorStatus LL_USART_Init(USART_TypeDef USARTx, LL_USART_InitTypeDef USART_InitStruct)
205	{
206	ErrorStatus status = ERROR;
207	uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO;
208	#if !defined(RCC_CCIPR_USART3SEL)&&!defined(RCC_CCIPR_USART4SEL)\|\|!defined(RCC_CCIPR_USART2SEL)
209	LL_RCC_ClocksTypeDef RCC_Clocks;
210	#endif
211
212	/* Check the parameters */
213	assert_param(IS_UART_INSTANCE(USARTx));
214	assert_param(IS_LL_USART_PRESCALER(USART_InitStruct->PrescalerValue));
215	assert_param(IS_LL_USART_BAUDRATE(USART_InitStruct->BaudRate));
216	assert_param(IS_LL_USART_DATAWIDTH(USART_InitStruct->DataWidth));
217	assert_param(IS_LL_USART_STOPBITS(USART_InitStruct->StopBits));
218	assert_param(IS_LL_USART_PARITY(USART_InitStruct->Parity));
219	assert_param(IS_LL_USART_DIRECTION(USART_InitStruct->TransferDirection));
220	assert_param(IS_LL_USART_HWCONTROL(USART_InitStruct->HardwareFlowControl));
221	assert_param(IS_LL_USART_OVERSAMPLING(USART_InitStruct->OverSampling));
222
223	/* USART needs to be in disabled state, in order to be able to configure some bits in
224	CRx registers */
225	if (LL_USART_IsEnabled(USARTx) == 0U)
226	{
227	/*---------------------------- USART CR1 Configuration ---------------------
228	* Configure USARTx CR1 (USART Word Length, Parity, Mode and Oversampling bits) with parameters:
229	* - DataWidth: USART_CR1_M bits according to USART_InitStruct->DataWidth value
230	* - Parity: USART_CR1_PCE, USART_CR1_PS bits according to USART_InitStruct->Parity value
231	* - TransferDirection: USART_CR1_TE, USART_CR1_RE bits according to USART_InitStruct->TransferDirection value
232	* - Oversampling: USART_CR1_OVER8 bit according to USART_InitStruct->OverSampling value.
233	*/
234	MODIFY_REG(USARTx->CR1,
235	(USART_CR1_M \| USART_CR1_PCE \| USART_CR1_PS \|
236	USART_CR1_TE \| USART_CR1_RE \| USART_CR1_OVER8),
237	(USART_InitStruct->DataWidth \| USART_InitStruct->Parity \|
238	USART_InitStruct->TransferDirection \| USART_InitStruct->OverSampling));
239
240	/*---------------------------- USART CR2 Configuration ---------------------
241	* Configure USARTx CR2 (Stop bits) with parameters:
242	* - Stop Bits: USART_CR2_STOP bits according to USART_InitStruct->StopBits value.
243	* - CLKEN, CPOL, CPHA and LBCL bits are to be configured using LL_USART_ClockInit().
244	*/
245	LL_USART_SetStopBitsLength(USARTx, USART_InitStruct->StopBits);
246
247	/*---------------------------- USART CR3 Configuration ---------------------
248	* Configure USARTx CR3 (Hardware Flow Control) with parameters:
249	* - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according to USART_InitStruct->HardwareFlowControl value.
250	*/
251	LL_USART_SetHWFlowCtrl(USARTx, USART_InitStruct->HardwareFlowControl);
252
253	/*---------------------------- USART BRR Configuration ---------------------
254	* Retrieve Clock frequency used for USART Peripheral
255	*/
256	if (USARTx == USART1)
257	{
258	periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART1_CLKSOURCE);
259	}
260	else if (USARTx == USART2)
261	{
262	#if defined(RCC_CCIPR_USART2SEL)
263	periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART2_CLKSOURCE);
264	#else
265	/* USART2 clock is PCLK */
266	LL_RCC_GetSystemClocksFreq(&RCC_Clocks);
267	periphclk = RCC_Clocks.PCLK1_Frequency;
268	#endif
269	}
270	#if defined(USART3)
271	else if (USARTx == USART3)
272	{
273	#if defined(RCC_CCIPR_USART3SEL)
274	periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART3_CLKSOURCE);
275	#else
276	/* USART3 clock is PCLK */
277	LL_RCC_GetSystemClocksFreq(&RCC_Clocks);
278	periphclk = RCC_Clocks.PCLK1_Frequency;
279	#endif
280	}
281	#endif /* USART3 */
282	#if defined(USART4)
283	else if (USARTx == USART4)
284	{
285	#if defined(RCC_CCIPR_USART4SEL)
286	periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART4_CLKSOURCE);
287	#else
288	/* USART4 clock is PCLK1 */
289	LL_RCC_GetSystemClocksFreq(&RCC_Clocks);
290	periphclk = RCC_Clocks.PCLK1_Frequency;
291	#endif
292	}
293	#endif /* USART4 */
294	else
295	{
296	/* Nothing to do, as error code is already assigned to ERROR value */
297	}
298
299	/* Configure the USART Baud Rate :
300	- prescaler value is required
301	- valid baud rate value (different from 0) is required
302	- Peripheral clock as returned by RCC service, should be valid (different from 0).
303	*/
304	if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO)
305	&& (USART_InitStruct->BaudRate != 0U))
306	{
307	status = SUCCESS;
308	LL_USART_SetBaudRate(USARTx,
309	periphclk,
310	USART_InitStruct->PrescalerValue,
311	USART_InitStruct->OverSampling,
312	USART_InitStruct->BaudRate);
313
314	/* Check BRR is greater than or equal to 16d */
315	assert_param(IS_LL_USART_BRR_MIN(USARTx->BRR));
316
317	/* Check BRR is lower than or equal to 0xFFFF */
318	assert_param(IS_LL_USART_BRR_MAX(USARTx->BRR));
319	}
320
321	/*---------------------------- USART PRESC Configuration -----------------------
322	* Configure USARTx PRESC (Prescaler) with parameters:
323	* - PrescalerValue: USART_PRESC_PRESCALER bits according to USART_InitStruct->PrescalerValue value.
324	*/
325	LL_USART_SetPrescaler(USARTx, USART_InitStruct->PrescalerValue);
326	}
327	/* Endif (=> USART not in Disabled state => return ERROR) */
328
329	return (status);
330	}
331
332	/**
333	* @brief Set each @ref LL_USART_InitTypeDef field to default value.
334	* @param USART_InitStruct pointer to a @ref LL_USART_InitTypeDef structure
335	* whose fields will be set to default values.
336	* @retval None
337	*/
338
339	void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct)
340	{
341	/* Set USART_InitStruct fields to default values */
342	USART_InitStruct->PrescalerValue = LL_USART_PRESCALER_DIV1;
343	USART_InitStruct->BaudRate = 9600U;
344	USART_InitStruct->DataWidth = LL_USART_DATAWIDTH_8B;
345	USART_InitStruct->StopBits = LL_USART_STOPBITS_1;
346	USART_InitStruct->Parity = LL_USART_PARITY_NONE ;
347	USART_InitStruct->TransferDirection = LL_USART_DIRECTION_TX_RX;
348	USART_InitStruct->HardwareFlowControl = LL_USART_HWCONTROL_NONE;
349	USART_InitStruct->OverSampling = LL_USART_OVERSAMPLING_16;
350	}
351
352	/**
353	* @brief Initialize USART Clock related settings according to the
354	* specified parameters in the USART_ClockInitStruct.
355	* @note As some bits in USART configuration registers can only be written when the USART is disabled (USART_CR1_UE bit =0),
356	* USART Peripheral should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
357	* @param USARTx USART Instance
358	* @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
359	* that contains the Clock configuration information for the specified USART peripheral.
360	* @retval An ErrorStatus enumeration value:
361	* - SUCCESS: USART registers related to Clock settings are initialized according to USART_ClockInitStruct content
362	* - ERROR: Problem occurred during USART Registers initialization
363	*/
364	ErrorStatus LL_USART_ClockInit(USART_TypeDef USARTx, LL_USART_ClockInitTypeDef USART_ClockInitStruct)
365	{
366	ErrorStatus status = SUCCESS;
367
368	/* Check USART Instance and Clock signal output parameters */
369	assert_param(IS_UART_INSTANCE(USARTx));
370	assert_param(IS_LL_USART_CLOCKOUTPUT(USART_ClockInitStruct->ClockOutput));
371
372	/* USART needs to be in disabled state, in order to be able to configure some bits in
373	CRx registers */
374	if (LL_USART_IsEnabled(USARTx) == 0U)
375	{
376	/---------------------------- USART CR2 Configuration -----------------------/
377	/* If Clock signal has to be output */
378	if (USART_ClockInitStruct->ClockOutput == LL_USART_CLOCK_DISABLE)
379	{
380	/* Deactivate Clock signal delivery :
381	* - Disable Clock Output: USART_CR2_CLKEN cleared
382	*/
383	LL_USART_DisableSCLKOutput(USARTx);
384	}
385	else
386	{
387	/* Ensure USART instance is USART capable */
388	assert_param(IS_USART_INSTANCE(USARTx));
389
390	/* Check clock related parameters */
391	assert_param(IS_LL_USART_CLOCKPOLARITY(USART_ClockInitStruct->ClockPolarity));
392	assert_param(IS_LL_USART_CLOCKPHASE(USART_ClockInitStruct->ClockPhase));
393	assert_param(IS_LL_USART_LASTBITCLKOUTPUT(USART_ClockInitStruct->LastBitClockPulse));
394
395	/*---------------------------- USART CR2 Configuration -----------------------
396	* Configure USARTx CR2 (Clock signal related bits) with parameters:
397	* - Enable Clock Output: USART_CR2_CLKEN set
398	* - Clock Polarity: USART_CR2_CPOL bit according to USART_ClockInitStruct->ClockPolarity value
399	* - Clock Phase: USART_CR2_CPHA bit according to USART_ClockInitStruct->ClockPhase value
400	* - Last Bit Clock Pulse Output: USART_CR2_LBCL bit according to USART_ClockInitStruct->LastBitClockPulse value.
401	*/
402	MODIFY_REG(USARTx->CR2,
403	USART_CR2_CLKEN \| USART_CR2_CPHA \| USART_CR2_CPOL \| USART_CR2_LBCL,
404	USART_CR2_CLKEN \| USART_ClockInitStruct->ClockPolarity \|
405	USART_ClockInitStruct->ClockPhase \| USART_ClockInitStruct->LastBitClockPulse);
406	}
407	}
408	/* Else (USART not in Disabled state => return ERROR */
409	else
410	{
411	status = ERROR;
412	}
413
414	return (status);
415	}
416
417	/**
418	* @brief Set each field of a @ref LL_USART_ClockInitTypeDef type structure to default value.
419	* @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
420	* whose fields will be set to default values.
421	* @retval None
422	*/
423	void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
424	{
425	/* Set LL_USART_ClockInitStruct fields with default values */
426	USART_ClockInitStruct->ClockOutput = LL_USART_CLOCK_DISABLE;
427	USART_ClockInitStruct->ClockPolarity = LL_USART_POLARITY_LOW; /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
428	USART_ClockInitStruct->ClockPhase = LL_USART_PHASE_1EDGE; /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
429	USART_ClockInitStruct->LastBitClockPulse = LL_USART_LASTCLKPULSE_NO_OUTPUT; /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
430	}
431
432	/**
433	* @}
434	*/
435
436	/**
437	* @}
438	*/
439
440	/**
441	* @}
442	*/
443
444	#endif /* USART1 \|\| USART2 \|\| USART3 \|\| USART4 */
445
446	/**
447	* @}
448	*/
449
450	#endif /* USE_FULL_LL_DRIVER */
451
452	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/
453

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source: trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_usart.c

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