source: trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart.c

Last change on this file was 6, checked in by f.jahn, 8 months ago
File size: 137.2 KB
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1/**
2 ******************************************************************************
3 * @file stm32g0xx_hal_uart.c
4 * @author MCD Application Team
5 * @brief UART HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the Universal Asynchronous Receiver Transmitter Peripheral (UART).
8 * + Initialization and de-initialization functions
9 * + IO operation functions
10 * + Peripheral Control functions
11 *
12 *
13 @verbatim
14 ===============================================================================
15 ##### How to use this driver #####
16 ===============================================================================
17 [..]
18 The UART HAL driver can be used as follows:
19
20 (#) Declare a UART_HandleTypeDef handle structure (eg. UART_HandleTypeDef huart).
21 (#) Initialize the UART low level resources by implementing the HAL_UART_MspInit() API:
22 (++) Enable the USARTx interface clock.
23 (++) UART pins configuration:
24 (+++) Enable the clock for the UART GPIOs.
25 (+++) Configure these UART pins as alternate function pull-up.
26 (++) NVIC configuration if you need to use interrupt process (HAL_UART_Transmit_IT()
27 and HAL_UART_Receive_IT() APIs):
28 (+++) Configure the USARTx interrupt priority.
29 (+++) Enable the NVIC USART IRQ handle.
30 (++) UART interrupts handling:
31 -@@- The specific UART interrupts (Transmission complete interrupt,
32 RXNE interrupt, RX/TX FIFOs related interrupts and Error Interrupts)
33 are managed using the macros __HAL_UART_ENABLE_IT() and __HAL_UART_DISABLE_IT()
34 inside the transmit and receive processes.
35 (++) DMA Configuration if you need to use DMA process (HAL_UART_Transmit_DMA()
36 and HAL_UART_Receive_DMA() APIs):
37 (+++) Declare a DMA handle structure for the Tx/Rx channel.
38 (+++) Enable the DMAx interface clock.
39 (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters.
40 (+++) Configure the DMA Tx/Rx channel.
41 (+++) Associate the initialized DMA handle to the UART DMA Tx/Rx handle.
42 (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx/Rx channel.
43
44 (#) Program the Baud Rate, Word Length, Stop Bit, Parity, Prescaler value , Hardware
45 flow control and Mode (Receiver/Transmitter) in the huart handle Init structure.
46
47 (#) If required, program UART advanced features (TX/RX pins swap, auto Baud rate detection,...)
48 in the huart handle AdvancedInit structure.
49
50 (#) For the UART asynchronous mode, initialize the UART registers by calling
51 the HAL_UART_Init() API.
52
53 (#) For the UART Half duplex mode, initialize the UART registers by calling
54 the HAL_HalfDuplex_Init() API.
55
56 (#) For the UART LIN (Local Interconnection Network) mode, initialize the UART registers
57 by calling the HAL_LIN_Init() API.
58
59 (#) For the UART Multiprocessor mode, initialize the UART registers
60 by calling the HAL_MultiProcessor_Init() API.
61
62 (#) For the UART RS485 Driver Enabled mode, initialize the UART registers
63 by calling the HAL_RS485Ex_Init() API.
64
65 [..]
66 (@) These API's (HAL_UART_Init(), HAL_HalfDuplex_Init(), HAL_LIN_Init(), HAL_MultiProcessor_Init(),
67 also configure the low level Hardware GPIO, CLOCK, CORTEX...etc) by
68 calling the customized HAL_UART_MspInit() API.
69
70 ##### Callback registration #####
71 ==================================
72
73 [..]
74 The compilation define USE_HAL_UART_REGISTER_CALLBACKS when set to 1
75 allows the user to configure dynamically the driver callbacks.
76
77 [..]
78 Use Function @ref HAL_UART_RegisterCallback() to register a user callback.
79 Function @ref HAL_UART_RegisterCallback() allows to register following callbacks:
80 (+) TxHalfCpltCallback : Tx Half Complete Callback.
81 (+) TxCpltCallback : Tx Complete Callback.
82 (+) RxHalfCpltCallback : Rx Half Complete Callback.
83 (+) RxCpltCallback : Rx Complete Callback.
84 (+) ErrorCallback : Error Callback.
85 (+) AbortCpltCallback : Abort Complete Callback.
86 (+) AbortTransmitCpltCallback : Abort Transmit Complete Callback.
87 (+) AbortReceiveCpltCallback : Abort Receive Complete Callback.
88 (+) WakeupCallback : Wakeup Callback.
89 (+) RxFifoFullCallback : Rx Fifo Full Callback.
90 (+) TxFifoEmptyCallback : Tx Fifo Empty Callback.
91 (+) MspInitCallback : UART MspInit.
92 (+) MspDeInitCallback : UART MspDeInit.
93 This function takes as parameters the HAL peripheral handle, the Callback ID
94 and a pointer to the user callback function.
95
96 [..]
97 Use function @ref HAL_UART_UnRegisterCallback() to reset a callback to the default
98 weak (surcharged) function.
99 @ref HAL_UART_UnRegisterCallback() takes as parameters the HAL peripheral handle,
100 and the Callback ID.
101 This function allows to reset following callbacks:
102 (+) TxHalfCpltCallback : Tx Half Complete Callback.
103 (+) TxCpltCallback : Tx Complete Callback.
104 (+) RxHalfCpltCallback : Rx Half Complete Callback.
105 (+) RxCpltCallback : Rx Complete Callback.
106 (+) ErrorCallback : Error Callback.
107 (+) AbortCpltCallback : Abort Complete Callback.
108 (+) AbortTransmitCpltCallback : Abort Transmit Complete Callback.
109 (+) AbortReceiveCpltCallback : Abort Receive Complete Callback.
110 (+) WakeupCallback : Wakeup Callback.
111 (+) RxFifoFullCallback : Rx Fifo Full Callback.
112 (+) TxFifoEmptyCallback : Tx Fifo Empty Callback.
113 (+) MspInitCallback : UART MspInit.
114 (+) MspDeInitCallback : UART MspDeInit.
115
116 [..]
117 By default, after the @ref HAL_UART_Init() and when the state is HAL_UART_STATE_RESET
118 all callbacks are set to the corresponding weak (surcharged) functions:
119 examples @ref HAL_UART_TxCpltCallback(), @ref HAL_UART_RxHalfCpltCallback().
120 Exception done for MspInit and MspDeInit functions that are respectively
121 reset to the legacy weak (surcharged) functions in the @ref HAL_UART_Init()
122 and @ref HAL_UART_DeInit() only when these callbacks are null (not registered beforehand).
123 If not, MspInit or MspDeInit are not null, the @ref HAL_UART_Init() and @ref HAL_UART_DeInit()
124 keep and use the user MspInit/MspDeInit callbacks (registered beforehand).
125
126 [..]
127 Callbacks can be registered/unregistered in HAL_UART_STATE_READY state only.
128 Exception done MspInit/MspDeInit that can be registered/unregistered
129 in HAL_UART_STATE_READY or HAL_UART_STATE_RESET state, thus registered (user)
130 MspInit/DeInit callbacks can be used during the Init/DeInit.
131 In that case first register the MspInit/MspDeInit user callbacks
132 using @ref HAL_UART_RegisterCallback() before calling @ref HAL_UART_DeInit()
133 or @ref HAL_UART_Init() function.
134
135 [..]
136 When The compilation define USE_HAL_UART_REGISTER_CALLBACKS is set to 0 or
137 not defined, the callback registration feature is not available
138 and weak (surcharged) callbacks are used.
139
140
141 @endverbatim
142 ******************************************************************************
143 * @attention
144 *
145 * <h2><center>&copy; Copyright (c) 2018 STMicroelectronics.
146 * All rights reserved.</center></h2>
147 *
148 * This software component is licensed by ST under BSD 3-Clause license,
149 * the "License"; You may not use this file except in compliance with the
150 * License. You may obtain a copy of the License at:
151 * opensource.org/licenses/BSD-3-Clause
152 *
153 ******************************************************************************
154 */
155
156/* Includes ------------------------------------------------------------------*/
157#include "stm32g0xx_hal.h"
158
159/** @addtogroup STM32G0xx_HAL_Driver
160 * @{
161 */
162
163/** @defgroup UART UART
164 * @brief HAL UART module driver
165 * @{
166 */
167
168#ifdef HAL_UART_MODULE_ENABLED
169
170/* Private typedef -----------------------------------------------------------*/
171/* Private define ------------------------------------------------------------*/
172/** @defgroup UART_Private_Constants UART Private Constants
173 * @{
174 */
175#define USART_CR1_FIELDS ((uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | \
176 USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8| \
177 USART_CR1_FIFOEN )) /*!< UART or USART CR1 fields of parameters set by UART_SetConfig API */
178
179#define USART_CR3_FIELDS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE | USART_CR3_ONEBIT| \
180 USART_CR3_TXFTCFG | USART_CR3_RXFTCFG )) /*!< UART or USART CR3 fields of parameters set by UART_SetConfig API */
181
182#define LPUART_BRR_MIN 0x00000300U /* LPUART BRR minimum authorized value */
183#define LPUART_BRR_MAX 0x000FFFFFU /* LPUART BRR maximum authorized value */
184
185#define UART_BRR_MIN 0x10U /* UART BRR minimum authorized value */
186#define UART_BRR_MAX 0x0000FFFFU /* UART BRR maximum authorized value */
187
188/**
189 * @}
190 */
191
192/* Private macros ------------------------------------------------------------*/
193/* Private variables ---------------------------------------------------------*/
194/* Private function prototypes -----------------------------------------------*/
195/** @addtogroup UART_Private_Functions
196 * @{
197 */
198static void UART_EndTxTransfer(UART_HandleTypeDef *huart);
199static void UART_EndRxTransfer(UART_HandleTypeDef *huart);
200static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma);
201static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
202static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
203static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
204static void UART_DMAError(DMA_HandleTypeDef *hdma);
205static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma);
206static void UART_DMATxAbortCallback(DMA_HandleTypeDef *hdma);
207static void UART_DMARxAbortCallback(DMA_HandleTypeDef *hdma);
208static void UART_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma);
209static void UART_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma);
210static void UART_TxISR_8BIT(UART_HandleTypeDef *huart);
211static void UART_TxISR_16BIT(UART_HandleTypeDef *huart);
212static void UART_TxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart);
213static void UART_TxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart);
214static void UART_EndTransmit_IT(UART_HandleTypeDef *huart);
215static void UART_RxISR_8BIT(UART_HandleTypeDef *huart);
216static void UART_RxISR_16BIT(UART_HandleTypeDef *huart);
217static void UART_RxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart);
218static void UART_RxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart);
219/**
220 * @}
221 */
222
223/* Exported functions --------------------------------------------------------*/
224
225/** @defgroup UART_Exported_Functions UART Exported Functions
226 * @{
227 */
228
229/** @defgroup UART_Exported_Functions_Group1 Initialization and de-initialization functions
230 * @brief Initialization and Configuration functions
231 *
232@verbatim
233===============================================================================
234 ##### Initialization and Configuration functions #####
235 ===============================================================================
236 [..]
237 This subsection provides a set of functions allowing to initialize the USARTx or the UARTy
238 in asynchronous mode.
239 (+) For the asynchronous mode the parameters below can be configured:
240 (++) Baud Rate
241 (++) Word Length
242 (++) Stop Bit
243 (++) Parity: If the parity is enabled, then the MSB bit of the data written
244 in the data register is transmitted but is changed by the parity bit.
245 (++) Hardware flow control
246 (++) Receiver/transmitter modes
247 (++) Over Sampling Method
248 (++) One-Bit Sampling Method
249 (+) For the asynchronous mode, the following advanced features can be configured as well:
250 (++) TX and/or RX pin level inversion
251 (++) data logical level inversion
252 (++) RX and TX pins swap
253 (++) RX overrun detection disabling
254 (++) DMA disabling on RX error
255 (++) MSB first on communication line
256 (++) auto Baud rate detection
257 [..]
258 The HAL_UART_Init(), HAL_HalfDuplex_Init(), HAL_LIN_Init()and HAL_MultiProcessor_Init()API
259 follow respectively the UART asynchronous, UART Half duplex, UART LIN mode
260 and UART multiprocessor mode configuration procedures (details for the procedures
261 are available in reference manual).
262
263@endverbatim
264
265 Depending on the frame length defined by the M1 and M0 bits (7-bit,
266 8-bit or 9-bit), the possible UART formats are listed in the
267 following table.
268
269 Table 1. UART frame format.
270 +-----------------------------------------------------------------------+
271 | M1 bit | M0 bit | PCE bit | UART frame |
272 |---------|---------|-----------|---------------------------------------|
273 | 0 | 0 | 0 | | SB | 8 bit data | STB | |
274 |---------|---------|-----------|---------------------------------------|
275 | 0 | 0 | 1 | | SB | 7 bit data | PB | STB | |
276 |---------|---------|-----------|---------------------------------------|
277 | 0 | 1 | 0 | | SB | 9 bit data | STB | |
278 |---------|---------|-----------|---------------------------------------|
279 | 0 | 1 | 1 | | SB | 8 bit data | PB | STB | |
280 |---------|---------|-----------|---------------------------------------|
281 | 1 | 0 | 0 | | SB | 7 bit data | STB | |
282 |---------|---------|-----------|---------------------------------------|
283 | 1 | 0 | 1 | | SB | 6 bit data | PB | STB | |
284 +-----------------------------------------------------------------------+
285
286 * @{
287 */
288
289/**
290 * @brief Initialize the UART mode according to the specified
291 * parameters in the UART_InitTypeDef and initialize the associated handle.
292 * @param huart UART handle.
293 * @retval HAL status
294 */
295HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
296{
297 /* Check the UART handle allocation */
298 if (huart == NULL)
299 {
300 return HAL_ERROR;
301 }
302
303 if (huart->Init.HwFlowCtl != UART_HWCONTROL_NONE)
304 {
305 /* Check the parameters */
306 assert_param(IS_UART_HWFLOW_INSTANCE(huart->Instance));
307 }
308 else
309 {
310 /* Check the parameters */
311 assert_param((IS_UART_INSTANCE(huart->Instance)) || (IS_LPUART_INSTANCE(huart->Instance)));
312 }
313
314 if (huart->gState == HAL_UART_STATE_RESET)
315 {
316 /* Allocate lock resource and initialize it */
317 huart->Lock = HAL_UNLOCKED;
318
319#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
320 UART_InitCallbacksToDefault(huart);
321
322 if (huart->MspInitCallback == NULL)
323 {
324 huart->MspInitCallback = HAL_UART_MspInit;
325 }
326
327 /* Init the low level hardware */
328 huart->MspInitCallback(huart);
329#else
330 /* Init the low level hardware : GPIO, CLOCK */
331 HAL_UART_MspInit(huart);
332#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
333 }
334
335 huart->gState = HAL_UART_STATE_BUSY;
336
337 /* Disable the Peripheral */
338 __HAL_UART_DISABLE(huart);
339
340 /* Set the UART Communication parameters */
341 if (UART_SetConfig(huart) == HAL_ERROR)
342 {
343 return HAL_ERROR;
344 }
345
346 if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
347 {
348 UART_AdvFeatureConfig(huart);
349 }
350
351 /* In asynchronous mode, the following bits must be kept cleared:
352 - LINEN and CLKEN bits in the USART_CR2 register,
353 - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/
354 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
355 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
356
357 /* Enable the Peripheral */
358 __HAL_UART_ENABLE(huart);
359
360 /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
361 return (UART_CheckIdleState(huart));
362}
363
364/**
365 * @brief Initialize the half-duplex mode according to the specified
366 * parameters in the UART_InitTypeDef and creates the associated handle.
367 * @param huart UART handle.
368 * @retval HAL status
369 */
370HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart)
371{
372 /* Check the UART handle allocation */
373 if (huart == NULL)
374 {
375 return HAL_ERROR;
376 }
377
378 /* Check UART instance */
379 assert_param(IS_UART_HALFDUPLEX_INSTANCE(huart->Instance));
380
381 if (huart->gState == HAL_UART_STATE_RESET)
382 {
383 /* Allocate lock resource and initialize it */
384 huart->Lock = HAL_UNLOCKED;
385
386#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
387 UART_InitCallbacksToDefault(huart);
388
389 if (huart->MspInitCallback == NULL)
390 {
391 huart->MspInitCallback = HAL_UART_MspInit;
392 }
393
394 /* Init the low level hardware */
395 huart->MspInitCallback(huart);
396#else
397 /* Init the low level hardware : GPIO, CLOCK */
398 HAL_UART_MspInit(huart);
399#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
400 }
401
402 huart->gState = HAL_UART_STATE_BUSY;
403
404 /* Disable the Peripheral */
405 __HAL_UART_DISABLE(huart);
406
407 /* Set the UART Communication parameters */
408 if (UART_SetConfig(huart) == HAL_ERROR)
409 {
410 return HAL_ERROR;
411 }
412
413 if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
414 {
415 UART_AdvFeatureConfig(huart);
416 }
417
418 /* In half-duplex mode, the following bits must be kept cleared:
419 - LINEN and CLKEN bits in the USART_CR2 register,
420 - SCEN and IREN bits in the USART_CR3 register.*/
421 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
422 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_IREN | USART_CR3_SCEN));
423
424 /* Enable the Half-Duplex mode by setting the HDSEL bit in the CR3 register */
425 SET_BIT(huart->Instance->CR3, USART_CR3_HDSEL);
426
427 /* Enable the Peripheral */
428 __HAL_UART_ENABLE(huart);
429
430 /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
431 return (UART_CheckIdleState(huart));
432}
433
434
435/**
436 * @brief Initialize the LIN mode according to the specified
437 * parameters in the UART_InitTypeDef and creates the associated handle.
438 * @param huart UART handle.
439 * @param BreakDetectLength Specifies the LIN break detection length.
440 * This parameter can be one of the following values:
441 * @arg @ref UART_LINBREAKDETECTLENGTH_10B 10-bit break detection
442 * @arg @ref UART_LINBREAKDETECTLENGTH_11B 11-bit break detection
443 * @retval HAL status
444 */
445HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength)
446{
447 /* Check the UART handle allocation */
448 if (huart == NULL)
449 {
450 return HAL_ERROR;
451 }
452
453 /* Check the LIN UART instance */
454 assert_param(IS_UART_LIN_INSTANCE(huart->Instance));
455 /* Check the Break detection length parameter */
456 assert_param(IS_UART_LIN_BREAK_DETECT_LENGTH(BreakDetectLength));
457
458 /* LIN mode limited to 16-bit oversampling only */
459 if (huart->Init.OverSampling == UART_OVERSAMPLING_8)
460 {
461 return HAL_ERROR;
462 }
463 /* LIN mode limited to 8-bit data length */
464 if (huart->Init.WordLength != UART_WORDLENGTH_8B)
465 {
466 return HAL_ERROR;
467 }
468
469 if (huart->gState == HAL_UART_STATE_RESET)
470 {
471 /* Allocate lock resource and initialize it */
472 huart->Lock = HAL_UNLOCKED;
473
474#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
475 UART_InitCallbacksToDefault(huart);
476
477 if (huart->MspInitCallback == NULL)
478 {
479 huart->MspInitCallback = HAL_UART_MspInit;
480 }
481
482 /* Init the low level hardware */
483 huart->MspInitCallback(huart);
484#else
485 /* Init the low level hardware : GPIO, CLOCK */
486 HAL_UART_MspInit(huart);
487#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
488 }
489
490 huart->gState = HAL_UART_STATE_BUSY;
491
492 /* Disable the Peripheral */
493 __HAL_UART_DISABLE(huart);
494
495 /* Set the UART Communication parameters */
496 if (UART_SetConfig(huart) == HAL_ERROR)
497 {
498 return HAL_ERROR;
499 }
500
501 if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
502 {
503 UART_AdvFeatureConfig(huart);
504 }
505
506 /* In LIN mode, the following bits must be kept cleared:
507 - LINEN and CLKEN bits in the USART_CR2 register,
508 - SCEN and IREN bits in the USART_CR3 register.*/
509 CLEAR_BIT(huart->Instance->CR2, USART_CR2_CLKEN);
510 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_HDSEL | USART_CR3_IREN | USART_CR3_SCEN));
511
512 /* Enable the LIN mode by setting the LINEN bit in the CR2 register */
513 SET_BIT(huart->Instance->CR2, USART_CR2_LINEN);
514
515 /* Set the USART LIN Break detection length. */
516 MODIFY_REG(huart->Instance->CR2, USART_CR2_LBDL, BreakDetectLength);
517
518 /* Enable the Peripheral */
519 __HAL_UART_ENABLE(huart);
520
521 /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
522 return (UART_CheckIdleState(huart));
523}
524
525
526/**
527 * @brief Initialize the multiprocessor mode according to the specified
528 * parameters in the UART_InitTypeDef and initialize the associated handle.
529 * @param huart UART handle.
530 * @param Address UART node address (4-, 6-, 7- or 8-bit long).
531 * @param WakeUpMethod Specifies the UART wakeup method.
532 * This parameter can be one of the following values:
533 * @arg @ref UART_WAKEUPMETHOD_IDLELINE WakeUp by an idle line detection
534 * @arg @ref UART_WAKEUPMETHOD_ADDRESSMARK WakeUp by an address mark
535 * @note If the user resorts to idle line detection wake up, the Address parameter
536 * is useless and ignored by the initialization function.
537 * @note If the user resorts to address mark wake up, the address length detection
538 * is configured by default to 4 bits only. For the UART to be able to
539 * manage 6-, 7- or 8-bit long addresses detection, the API
540 * HAL_MultiProcessorEx_AddressLength_Set() must be called after
541 * HAL_MultiProcessor_Init().
542 * @retval HAL status
543 */
544HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod)
545{
546 /* Check the UART handle allocation */
547 if (huart == NULL)
548 {
549 return HAL_ERROR;
550 }
551
552 /* Check the wake up method parameter */
553 assert_param(IS_UART_WAKEUPMETHOD(WakeUpMethod));
554
555 if (huart->gState == HAL_UART_STATE_RESET)
556 {
557 /* Allocate lock resource and initialize it */
558 huart->Lock = HAL_UNLOCKED;
559
560#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
561 UART_InitCallbacksToDefault(huart);
562
563 if (huart->MspInitCallback == NULL)
564 {
565 huart->MspInitCallback = HAL_UART_MspInit;
566 }
567
568 /* Init the low level hardware */
569 huart->MspInitCallback(huart);
570#else
571 /* Init the low level hardware : GPIO, CLOCK */
572 HAL_UART_MspInit(huart);
573#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
574 }
575
576 huart->gState = HAL_UART_STATE_BUSY;
577
578 /* Disable the Peripheral */
579 __HAL_UART_DISABLE(huart);
580
581 /* Set the UART Communication parameters */
582 if (UART_SetConfig(huart) == HAL_ERROR)
583 {
584 return HAL_ERROR;
585 }
586
587 if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
588 {
589 UART_AdvFeatureConfig(huart);
590 }
591
592 /* In multiprocessor mode, the following bits must be kept cleared:
593 - LINEN and CLKEN bits in the USART_CR2 register,
594 - SCEN, HDSEL and IREN bits in the USART_CR3 register. */
595 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
596 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
597
598 if (WakeUpMethod == UART_WAKEUPMETHOD_ADDRESSMARK)
599 {
600 /* If address mark wake up method is chosen, set the USART address node */
601 MODIFY_REG(huart->Instance->CR2, USART_CR2_ADD, ((uint32_t)Address << UART_CR2_ADDRESS_LSB_POS));
602 }
603
604 /* Set the wake up method by setting the WAKE bit in the CR1 register */
605 MODIFY_REG(huart->Instance->CR1, USART_CR1_WAKE, WakeUpMethod);
606
607 /* Enable the Peripheral */
608 __HAL_UART_ENABLE(huart);
609
610 /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
611 return (UART_CheckIdleState(huart));
612}
613
614
615/**
616 * @brief DeInitialize the UART peripheral.
617 * @param huart UART handle.
618 * @retval HAL status
619 */
620HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart)
621{
622 /* Check the UART handle allocation */
623 if (huart == NULL)
624 {
625 return HAL_ERROR;
626 }
627
628 /* Check the parameters */
629 assert_param((IS_UART_INSTANCE(huart->Instance)) || (IS_LPUART_INSTANCE(huart->Instance)));
630
631 huart->gState = HAL_UART_STATE_BUSY;
632
633 /* Disable the Peripheral */
634 __HAL_UART_DISABLE(huart);
635
636 huart->Instance->CR1 = 0x0U;
637 huart->Instance->CR2 = 0x0U;
638 huart->Instance->CR3 = 0x0U;
639
640#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
641 if (huart->MspDeInitCallback == NULL)
642 {
643 huart->MspDeInitCallback = HAL_UART_MspDeInit;
644 }
645 /* DeInit the low level hardware */
646 huart->MspDeInitCallback(huart);
647#else
648 /* DeInit the low level hardware */
649 HAL_UART_MspDeInit(huart);
650#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
651
652 huart->ErrorCode = HAL_UART_ERROR_NONE;
653 huart->gState = HAL_UART_STATE_RESET;
654 huart->RxState = HAL_UART_STATE_RESET;
655
656 /* Process Unlock */
657 __HAL_UNLOCK(huart);
658
659 return HAL_OK;
660}
661
662/**
663 * @brief Initialize the UART MSP.
664 * @param huart UART handle.
665 * @retval None
666 */
667__weak void HAL_UART_MspInit(UART_HandleTypeDef *huart)
668{
669 /* Prevent unused argument(s) compilation warning */
670 UNUSED(huart);
671
672 /* NOTE : This function should not be modified, when the callback is needed,
673 the HAL_UART_MspInit can be implemented in the user file
674 */
675}
676
677/**
678 * @brief DeInitialize the UART MSP.
679 * @param huart UART handle.
680 * @retval None
681 */
682__weak void HAL_UART_MspDeInit(UART_HandleTypeDef *huart)
683{
684 /* Prevent unused argument(s) compilation warning */
685 UNUSED(huart);
686
687 /* NOTE : This function should not be modified, when the callback is needed,
688 the HAL_UART_MspDeInit can be implemented in the user file
689 */
690}
691
692#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
693/**
694 * @brief Register a User UART Callback
695 * To be used instead of the weak predefined callback
696 * @param huart uart handle
697 * @param CallbackID ID of the callback to be registered
698 * This parameter can be one of the following values:
699 * @arg @ref HAL_UART_TX_HALFCOMPLETE_CB_ID Tx Half Complete Callback ID
700 * @arg @ref HAL_UART_TX_COMPLETE_CB_ID Tx Complete Callback ID
701 * @arg @ref HAL_UART_RX_HALFCOMPLETE_CB_ID Rx Half Complete Callback ID
702 * @arg @ref HAL_UART_RX_COMPLETE_CB_ID Rx Complete Callback ID
703 * @arg @ref HAL_UART_ERROR_CB_ID Error Callback ID
704 * @arg @ref HAL_UART_ABORT_COMPLETE_CB_ID Abort Complete Callback ID
705 * @arg @ref HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID Abort Transmit Complete Callback ID
706 * @arg @ref HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID Abort Receive Complete Callback ID
707 * @arg @ref HAL_UART_WAKEUP_CB_ID Wakeup Callback ID
708 * @arg @ref HAL_UART_RX_FIFO_FULL_CB_ID Rx Fifo Full Callback ID
709 * @arg @ref HAL_UART_TX_FIFO_EMPTY_CB_ID Tx Fifo Empty Callback ID
710 * @arg @ref HAL_UART_MSPINIT_CB_ID MspInit Callback ID
711 * @arg @ref HAL_UART_MSPDEINIT_CB_ID MspDeInit Callback ID
712 * @param pCallback pointer to the Callback function
713 * @retval HAL status
714 */
715HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID, pUART_CallbackTypeDef pCallback)
716{
717 HAL_StatusTypeDef status = HAL_OK;
718
719 if (pCallback == NULL)
720 {
721 /* Update the error code */
722 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
723
724 return HAL_ERROR;
725 }
726 /* Process locked */
727 __HAL_LOCK(huart);
728
729 if (huart->gState == HAL_UART_STATE_READY)
730 {
731 switch (CallbackID)
732 {
733 case HAL_UART_TX_HALFCOMPLETE_CB_ID :
734 huart->TxHalfCpltCallback = pCallback;
735 break;
736
737 case HAL_UART_TX_COMPLETE_CB_ID :
738 huart->TxCpltCallback = pCallback;
739 break;
740
741 case HAL_UART_RX_HALFCOMPLETE_CB_ID :
742 huart->RxHalfCpltCallback = pCallback;
743 break;
744
745 case HAL_UART_RX_COMPLETE_CB_ID :
746 huart->RxCpltCallback = pCallback;
747 break;
748
749 case HAL_UART_ERROR_CB_ID :
750 huart->ErrorCallback = pCallback;
751 break;
752
753 case HAL_UART_ABORT_COMPLETE_CB_ID :
754 huart->AbortCpltCallback = pCallback;
755 break;
756
757 case HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID :
758 huart->AbortTransmitCpltCallback = pCallback;
759 break;
760
761 case HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID :
762 huart->AbortReceiveCpltCallback = pCallback;
763 break;
764
765 case HAL_UART_WAKEUP_CB_ID :
766 huart->WakeupCallback = pCallback;
767 break;
768
769 case HAL_UART_RX_FIFO_FULL_CB_ID :
770 huart->RxFifoFullCallback = pCallback;
771 break;
772
773 case HAL_UART_TX_FIFO_EMPTY_CB_ID :
774 huart->TxFifoEmptyCallback = pCallback;
775 break;
776
777 case HAL_UART_MSPINIT_CB_ID :
778 huart->MspInitCallback = pCallback;
779 break;
780
781 case HAL_UART_MSPDEINIT_CB_ID :
782 huart->MspDeInitCallback = pCallback;
783 break;
784
785 default :
786 /* Update the error code */
787 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
788
789 /* Return error status */
790 status = HAL_ERROR;
791 break;
792 }
793 }
794 else if (huart->gState == HAL_UART_STATE_RESET)
795 {
796 switch (CallbackID)
797 {
798 case HAL_UART_MSPINIT_CB_ID :
799 huart->MspInitCallback = pCallback;
800 break;
801
802 case HAL_UART_MSPDEINIT_CB_ID :
803 huart->MspDeInitCallback = pCallback;
804 break;
805
806 default :
807 /* Update the error code */
808 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
809
810 /* Return error status */
811 status = HAL_ERROR;
812 break;
813 }
814 }
815 else
816 {
817 /* Update the error code */
818 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
819
820 /* Return error status */
821 status = HAL_ERROR;
822 }
823
824 /* Release Lock */
825 __HAL_UNLOCK(huart);
826
827 return status;
828}
829
830/**
831 * @brief Unregister an UART Callback
832 * UART callaback is redirected to the weak predefined callback
833 * @param huart uart handle
834 * @param CallbackID ID of the callback to be unregistered
835 * This parameter can be one of the following values:
836 * @arg @ref HAL_UART_TX_HALFCOMPLETE_CB_ID Tx Half Complete Callback ID
837 * @arg @ref HAL_UART_TX_COMPLETE_CB_ID Tx Complete Callback ID
838 * @arg @ref HAL_UART_RX_HALFCOMPLETE_CB_ID Rx Half Complete Callback ID
839 * @arg @ref HAL_UART_RX_COMPLETE_CB_ID Rx Complete Callback ID
840 * @arg @ref HAL_UART_ERROR_CB_ID Error Callback ID
841 * @arg @ref HAL_UART_ABORT_COMPLETE_CB_ID Abort Complete Callback ID
842 * @arg @ref HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID Abort Transmit Complete Callback ID
843 * @arg @ref HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID Abort Receive Complete Callback ID
844 * @arg @ref HAL_UART_WAKEUP_CB_ID Wakeup Callback ID
845 * @arg @ref HAL_UART_RX_FIFO_FULL_CB_ID Rx Fifo Full Callback ID
846 * @arg @ref HAL_UART_TX_FIFO_EMPTY_CB_ID Tx Fifo Empty Callback ID
847 * @arg @ref HAL_UART_MSPINIT_CB_ID MspInit Callback ID
848 * @arg @ref HAL_UART_MSPDEINIT_CB_ID MspDeInit Callback ID
849 * @retval HAL status
850 */
851HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID)
852{
853 HAL_StatusTypeDef status = HAL_OK;
854
855 /* Process locked */
856 __HAL_LOCK(huart);
857
858 if (HAL_UART_STATE_READY == huart->gState)
859 {
860 switch (CallbackID)
861 {
862 case HAL_UART_TX_HALFCOMPLETE_CB_ID :
863 huart->TxHalfCpltCallback = HAL_UART_TxHalfCpltCallback; /* Legacy weak TxHalfCpltCallback */
864 break;
865
866 case HAL_UART_TX_COMPLETE_CB_ID :
867 huart->TxCpltCallback = HAL_UART_TxCpltCallback; /* Legacy weak TxCpltCallback */
868 break;
869
870 case HAL_UART_RX_HALFCOMPLETE_CB_ID :
871 huart->RxHalfCpltCallback = HAL_UART_RxHalfCpltCallback; /* Legacy weak RxHalfCpltCallback */
872 break;
873
874 case HAL_UART_RX_COMPLETE_CB_ID :
875 huart->RxCpltCallback = HAL_UART_RxCpltCallback; /* Legacy weak RxCpltCallback */
876 break;
877
878 case HAL_UART_ERROR_CB_ID :
879 huart->ErrorCallback = HAL_UART_ErrorCallback; /* Legacy weak ErrorCallback */
880 break;
881
882 case HAL_UART_ABORT_COMPLETE_CB_ID :
883 huart->AbortCpltCallback = HAL_UART_AbortCpltCallback; /* Legacy weak AbortCpltCallback */
884 break;
885
886 case HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID :
887 huart->AbortTransmitCpltCallback = HAL_UART_AbortTransmitCpltCallback; /* Legacy weak AbortTransmitCpltCallback */
888 break;
889
890 case HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID :
891 huart->AbortReceiveCpltCallback = HAL_UART_AbortReceiveCpltCallback; /* Legacy weak AbortReceiveCpltCallback */
892 break;
893
894 case HAL_UART_WAKEUP_CB_ID :
895 huart->WakeupCallback = HAL_UARTEx_WakeupCallback; /* Legacy weak WakeupCallback */
896 break;
897
898 case HAL_UART_RX_FIFO_FULL_CB_ID :
899 huart->RxFifoFullCallback = HAL_UARTEx_RxFifoFullCallback; /* Legacy weak RxFifoFullCallback */
900 break;
901
902 case HAL_UART_TX_FIFO_EMPTY_CB_ID :
903 huart->TxFifoEmptyCallback = HAL_UARTEx_TxFifoEmptyCallback; /* Legacy weak TxFifoEmptyCallback */
904 break;
905
906 case HAL_UART_MSPINIT_CB_ID :
907 huart->MspInitCallback = HAL_UART_MspInit; /* Legacy weak MspInitCallback */
908 break;
909
910 case HAL_UART_MSPDEINIT_CB_ID :
911 huart->MspDeInitCallback = HAL_UART_MspDeInit; /* Legacy weak MspDeInitCallback */
912 break;
913
914 default :
915 /* Update the error code */
916 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
917
918 /* Return error status */
919 status = HAL_ERROR;
920 break;
921 }
922 }
923 else if (HAL_UART_STATE_RESET == huart->gState)
924 {
925 switch (CallbackID)
926 {
927 case HAL_UART_MSPINIT_CB_ID :
928 huart->MspInitCallback = HAL_UART_MspInit;
929 break;
930
931 case HAL_UART_MSPDEINIT_CB_ID :
932 huart->MspDeInitCallback = HAL_UART_MspDeInit;
933 break;
934
935 default :
936 /* Update the error code */
937 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
938
939 /* Return error status */
940 status = HAL_ERROR;
941 break;
942 }
943 }
944 else
945 {
946 /* Update the error code */
947 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
948
949 /* Return error status */
950 status = HAL_ERROR;
951 }
952
953 /* Release Lock */
954 __HAL_UNLOCK(huart);
955
956 return status;
957}
958#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
959
960/**
961 * @}
962 */
963
964/** @defgroup UART_Exported_Functions_Group2 IO operation functions
965 * @brief UART Transmit/Receive functions
966 *
967@verbatim
968 ===============================================================================
969 ##### IO operation functions #####
970 ===============================================================================
971 This subsection provides a set of functions allowing to manage the UART asynchronous
972 and Half duplex data transfers.
973
974 (#) There are two mode of transfer:
975 (+) Blocking mode: The communication is performed in polling mode.
976 The HAL status of all data processing is returned by the same function
977 after finishing transfer.
978 (+) Non-Blocking mode: The communication is performed using Interrupts
979 or DMA, These API's return the HAL status.
980 The end of the data processing will be indicated through the
981 dedicated UART IRQ when using Interrupt mode or the DMA IRQ when
982 using DMA mode.
983 The HAL_UART_TxCpltCallback(), HAL_UART_RxCpltCallback() user callbacks
984 will be executed respectively at the end of the transmit or Receive process
985 The HAL_UART_ErrorCallback()user callback will be executed when a communication error is detected
986
987 (#) Blocking mode API's are :
988 (+) HAL_UART_Transmit()
989 (+) HAL_UART_Receive()
990
991 (#) Non-Blocking mode API's with Interrupt are :
992 (+) HAL_UART_Transmit_IT()
993 (+) HAL_UART_Receive_IT()
994 (+) HAL_UART_IRQHandler()
995
996 (#) Non-Blocking mode API's with DMA are :
997 (+) HAL_UART_Transmit_DMA()
998 (+) HAL_UART_Receive_DMA()
999 (+) HAL_UART_DMAPause()
1000 (+) HAL_UART_DMAResume()
1001 (+) HAL_UART_DMAStop()
1002
1003 (#) A set of Transfer Complete Callbacks are provided in Non_Blocking mode:
1004 (+) HAL_UART_TxHalfCpltCallback()
1005 (+) HAL_UART_TxCpltCallback()
1006 (+) HAL_UART_RxHalfCpltCallback()
1007 (+) HAL_UART_RxCpltCallback()
1008 (+) HAL_UART_ErrorCallback()
1009
1010 (#) Non-Blocking mode transfers could be aborted using Abort API's :
1011 (+) HAL_UART_Abort()
1012 (+) HAL_UART_AbortTransmit()
1013 (+) HAL_UART_AbortReceive()
1014 (+) HAL_UART_Abort_IT()
1015 (+) HAL_UART_AbortTransmit_IT()
1016 (+) HAL_UART_AbortReceive_IT()
1017
1018 (#) For Abort services based on interrupts (HAL_UART_Abortxxx_IT), a set of Abort Complete Callbacks are provided:
1019 (+) HAL_UART_AbortCpltCallback()
1020 (+) HAL_UART_AbortTransmitCpltCallback()
1021 (+) HAL_UART_AbortReceiveCpltCallback()
1022
1023 (#) In Non-Blocking mode transfers, possible errors are split into 2 categories.
1024 Errors are handled as follows :
1025 (+) Error is considered as Recoverable and non blocking : Transfer could go till end, but error severity is
1026 to be evaluated by user : this concerns Frame Error, Parity Error or Noise Error in Interrupt mode reception .
1027 Received character is then retrieved and stored in Rx buffer, Error code is set to allow user to identify error type,
1028 and HAL_UART_ErrorCallback() user callback is executed. Transfer is kept ongoing on UART side.
1029 If user wants to abort it, Abort services should be called by user.
1030 (+) Error is considered as Blocking : Transfer could not be completed properly and is aborted.
1031 This concerns Overrun Error In Interrupt mode reception and all errors in DMA mode.
1032 Error code is set to allow user to identify error type, and HAL_UART_ErrorCallback() user callback is executed.
1033
1034 -@- In the Half duplex communication, it is forbidden to run the transmit
1035 and receive process in parallel, the UART state HAL_UART_STATE_BUSY_TX_RX can't be useful.
1036
1037@endverbatim
1038 * @{
1039 */
1040
1041/**
1042 * @brief Send an amount of data in blocking mode.
1043 * @note When FIFO mode is enabled, writing a data in the TDR register adds one
1044 * data to the TXFIFO. Write operations to the TDR register are performed
1045 * when TXFNF flag is set. From hardware perspective, TXFNF flag and
1046 * TXE are mapped on the same bit-field.
1047 * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
1048 * address of user data buffer containing data to be sent, should be aligned on a half word frontier (16 bits)
1049 * (as sent data will be handled using u16 pointer cast). Depending on compilation chain,
1050 * use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pData.
1051 * @param huart UART handle.
1052 * @param pData Pointer to data buffer.
1053 * @param Size Amount of data to be sent.
1054 * @param Timeout Timeout duration.
1055 * @retval HAL status
1056 */
1057HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout)
1058{
1059 uint8_t *pdata8bits;
1060 uint16_t *pdata16bits;
1061 uint32_t tickstart;
1062
1063 /* Check that a Tx process is not already ongoing */
1064 if (huart->gState == HAL_UART_STATE_READY)
1065 {
1066 if ((pData == NULL) || (Size == 0U))
1067 {
1068 return HAL_ERROR;
1069 }
1070
1071 /* In case of 9bits/No Parity transfer, pData buffer provided as input parameter
1072 should be aligned on a u16 frontier, as data to be filled into TDR will be
1073 handled through a u16 cast. */
1074 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
1075 {
1076 if ((((uint32_t)pData) & 1U) != 0U)
1077 {
1078 return HAL_ERROR;
1079 }
1080 }
1081
1082 /* Process Locked */
1083 __HAL_LOCK(huart);
1084
1085 huart->ErrorCode = HAL_UART_ERROR_NONE;
1086 huart->gState = HAL_UART_STATE_BUSY_TX;
1087
1088 /* Init tickstart for timeout managment*/
1089 tickstart = HAL_GetTick();
1090
1091 huart->TxXferSize = Size;
1092 huart->TxXferCount = Size;
1093
1094 /* In case of 9bits/No Parity transfer, pData needs to be handled as a uint16_t pointer */
1095 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
1096 {
1097 pdata8bits = NULL;
1098 pdata16bits = (uint16_t *) pData;
1099 }
1100 else
1101 {
1102 pdata8bits = pData;
1103 pdata16bits = NULL;
1104 }
1105
1106 while (huart->TxXferCount > 0U)
1107 {
1108 if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
1109 {
1110 return HAL_TIMEOUT;
1111 }
1112 if (pdata8bits == NULL)
1113 {
1114 huart->Instance->TDR = (uint16_t)(*pdata16bits & 0x01FFU);
1115 pdata16bits++;
1116 }
1117 else
1118 {
1119 huart->Instance->TDR = (uint8_t)(*pdata8bits & 0xFFU);
1120 pdata8bits++;
1121 }
1122 huart->TxXferCount--;
1123 }
1124
1125 if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
1126 {
1127 return HAL_TIMEOUT;
1128 }
1129
1130 /* At end of Tx process, restore huart->gState to Ready */
1131 huart->gState = HAL_UART_STATE_READY;
1132
1133 /* Process Unlocked */
1134 __HAL_UNLOCK(huart);
1135
1136 return HAL_OK;
1137 }
1138 else
1139 {
1140 return HAL_BUSY;
1141 }
1142}
1143
1144/**
1145 * @brief Receive an amount of data in blocking mode.
1146 * @note When FIFO mode is enabled, the RXFNE flag is set as long as the RXFIFO
1147 * is not empty. Read operations from the RDR register are performed when
1148 * RXFNE flag is set. From hardware perspective, RXFNE flag and
1149 * RXNE are mapped on the same bit-field.
1150 * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
1151 * address of user data buffer for storing data to be received, should be aligned on a half word frontier (16 bits)
1152 * (as received data will be handled using u16 pointer cast). Depending on compilation chain,
1153 * use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pData.
1154 * @param huart UART handle.
1155 * @param pData Pointer to data buffer.
1156 * @param Size Amount of data to be received.
1157 * @param Timeout Timeout duration.
1158 * @retval HAL status
1159 */
1160HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout)
1161{
1162 uint8_t *pdata8bits;
1163 uint16_t *pdata16bits;
1164 uint16_t uhMask;
1165 uint32_t tickstart;
1166
1167 /* Check that a Rx process is not already ongoing */
1168 if (huart->RxState == HAL_UART_STATE_READY)
1169 {
1170 if ((pData == NULL) || (Size == 0U))
1171 {
1172 return HAL_ERROR;
1173 }
1174
1175 /* In case of 9bits/No Parity transfer, pData buffer provided as input parameter
1176 should be aligned on a u16 frontier, as data to be received from RDR will be
1177 handled through a u16 cast. */
1178 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
1179 {
1180 if ((((uint32_t)pData) & 1U) != 0U)
1181 {
1182 return HAL_ERROR;
1183 }
1184 }
1185
1186 /* Process Locked */
1187 __HAL_LOCK(huart);
1188
1189 huart->ErrorCode = HAL_UART_ERROR_NONE;
1190 huart->RxState = HAL_UART_STATE_BUSY_RX;
1191
1192 /* Init tickstart for timeout managment*/
1193 tickstart = HAL_GetTick();
1194
1195 huart->RxXferSize = Size;
1196 huart->RxXferCount = Size;
1197
1198 /* Computation of UART mask to apply to RDR register */
1199 UART_MASK_COMPUTATION(huart);
1200 uhMask = huart->Mask;
1201
1202 /* In case of 9bits/No Parity transfer, pRxData needs to be handled as a uint16_t pointer */
1203 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
1204 {
1205 pdata8bits = NULL;
1206 pdata16bits = (uint16_t *) pData;
1207 }
1208 else
1209 {
1210 pdata8bits = pData;
1211 pdata16bits = NULL;
1212 }
1213
1214 /* as long as data have to be received */
1215 while (huart->RxXferCount > 0U)
1216 {
1217 if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
1218 {
1219 return HAL_TIMEOUT;
1220 }
1221 if (pdata8bits == NULL)
1222 {
1223 *pdata16bits = (uint16_t)(huart->Instance->RDR & uhMask);
1224 pdata16bits++;
1225 }
1226 else
1227 {
1228 *pdata8bits = (uint8_t)(huart->Instance->RDR & (uint8_t)uhMask);
1229 pdata8bits++;
1230 }
1231 huart->RxXferCount--;
1232 }
1233
1234 /* At end of Rx process, restore huart->RxState to Ready */
1235 huart->RxState = HAL_UART_STATE_READY;
1236
1237 /* Process Unlocked */
1238 __HAL_UNLOCK(huart);
1239
1240 return HAL_OK;
1241 }
1242 else
1243 {
1244 return HAL_BUSY;
1245 }
1246}
1247
1248/**
1249 * @brief Send an amount of data in interrupt mode.
1250 * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
1251 * address of user data buffer containing data to be sent, should be aligned on a half word frontier (16 bits)
1252 * (as sent data will be handled using u16 pointer cast). Depending on compilation chain,
1253 * use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pData.
1254 * @param huart UART handle.
1255 * @param pData Pointer to data buffer.
1256 * @param Size Amount of data to be sent.
1257 * @retval HAL status
1258 */
1259HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
1260{
1261 /* Check that a Tx process is not already ongoing */
1262 if (huart->gState == HAL_UART_STATE_READY)
1263 {
1264 if ((pData == NULL) || (Size == 0U))
1265 {
1266 return HAL_ERROR;
1267 }
1268
1269 /* In case of 9bits/No Parity transfer, pData buffer provided as input parameter
1270 should be aligned on a u16 frontier, as data to be filled into TDR will be
1271 handled through a u16 cast. */
1272 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
1273 {
1274 if ((((uint32_t)pData) & 1U) != 0U)
1275 {
1276 return HAL_ERROR;
1277 }
1278 }
1279
1280 /* Process Locked */
1281 __HAL_LOCK(huart);
1282
1283 huart->pTxBuffPtr = pData;
1284 huart->TxXferSize = Size;
1285 huart->TxXferCount = Size;
1286 huart->TxISR = NULL;
1287
1288 huart->ErrorCode = HAL_UART_ERROR_NONE;
1289 huart->gState = HAL_UART_STATE_BUSY_TX;
1290
1291 /* Configure Tx interrupt processing */
1292 if (huart->FifoMode == UART_FIFOMODE_ENABLE)
1293 {
1294 /* Set the Tx ISR function pointer according to the data word length */
1295 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
1296 {
1297 huart->TxISR = UART_TxISR_16BIT_FIFOEN;
1298 }
1299 else
1300 {
1301 huart->TxISR = UART_TxISR_8BIT_FIFOEN;
1302 }
1303
1304 /* Process Unlocked */
1305 __HAL_UNLOCK(huart);
1306
1307 /* Enable the TX FIFO threshold interrupt */
1308 SET_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
1309 }
1310 else
1311 {
1312 /* Set the Tx ISR function pointer according to the data word length */
1313 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
1314 {
1315 huart->TxISR = UART_TxISR_16BIT;
1316 }
1317 else
1318 {
1319 huart->TxISR = UART_TxISR_8BIT;
1320 }
1321
1322 /* Process Unlocked */
1323 __HAL_UNLOCK(huart);
1324
1325 /* Enable the Transmit Data Register Empty interrupt */
1326 SET_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE);
1327 }
1328
1329 return HAL_OK;
1330 }
1331 else
1332 {
1333 return HAL_BUSY;
1334 }
1335}
1336
1337/**
1338 * @brief Receive an amount of data in interrupt mode.
1339 * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
1340 * address of user data buffer for storing data to be received, should be aligned on a half word frontier (16 bits)
1341 * (as received data will be handled using u16 pointer cast). Depending on compilation chain,
1342 * use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pData.
1343 * @param huart UART handle.
1344 * @param pData Pointer to data buffer.
1345 * @param Size Amount of data to be received.
1346 * @retval HAL status
1347 */
1348HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
1349{
1350 /* Check that a Rx process is not already ongoing */
1351 if (huart->RxState == HAL_UART_STATE_READY)
1352 {
1353 if ((pData == NULL) || (Size == 0U))
1354 {
1355 return HAL_ERROR;
1356 }
1357
1358 /* In case of 9bits/No Parity transfer, pData buffer provided as input parameter
1359 should be aligned on a u16 frontier, as data to be received from RDR will be
1360 handled through a u16 cast. */
1361 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
1362 {
1363 if ((((uint32_t)pData) & 1U) != 0U)
1364 {
1365 return HAL_ERROR;
1366 }
1367 }
1368
1369 /* Process Locked */
1370 __HAL_LOCK(huart);
1371
1372 huart->pRxBuffPtr = pData;
1373 huart->RxXferSize = Size;
1374 huart->RxXferCount = Size;
1375 huart->RxISR = NULL;
1376
1377 /* Computation of UART mask to apply to RDR register */
1378 UART_MASK_COMPUTATION(huart);
1379
1380 huart->ErrorCode = HAL_UART_ERROR_NONE;
1381 huart->RxState = HAL_UART_STATE_BUSY_RX;
1382
1383 /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
1384 SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
1385
1386 /* Configure Rx interrupt processing*/
1387 if ((huart->FifoMode == UART_FIFOMODE_ENABLE) && (Size >= huart->NbRxDataToProcess))
1388 {
1389 /* Set the Rx ISR function pointer according to the data word length */
1390 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
1391 {
1392 huart->RxISR = UART_RxISR_16BIT_FIFOEN;
1393 }
1394 else
1395 {
1396 huart->RxISR = UART_RxISR_8BIT_FIFOEN;
1397 }
1398
1399 /* Process Unlocked */
1400 __HAL_UNLOCK(huart);
1401
1402 /* Enable the UART Parity Error interrupt and RX FIFO Threshold interrupt */
1403 SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
1404 SET_BIT(huart->Instance->CR3, USART_CR3_RXFTIE);
1405 }
1406 else
1407 {
1408 /* Set the Rx ISR function pointer according to the data word length */
1409 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
1410 {
1411 huart->RxISR = UART_RxISR_16BIT;
1412 }
1413 else
1414 {
1415 huart->RxISR = UART_RxISR_8BIT;
1416 }
1417
1418 /* Process Unlocked */
1419 __HAL_UNLOCK(huart);
1420
1421 /* Enable the UART Parity Error interrupt and Data Register Not Empty interrupt */
1422 SET_BIT(huart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE);
1423 }
1424
1425 return HAL_OK;
1426 }
1427 else
1428 {
1429 return HAL_BUSY;
1430 }
1431}
1432
1433/**
1434 * @brief Send an amount of data in DMA mode.
1435 * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
1436 * address of user data buffer containing data to be sent, should be aligned on a half word frontier (16 bits)
1437 * (as sent data will be handled by DMA from halfword frontier). Depending on compilation chain,
1438 * use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pData.
1439 * @param huart UART handle.
1440 * @param pData Pointer to data buffer.
1441 * @param Size Amount of data to be sent.
1442 * @retval HAL status
1443 */
1444HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
1445{
1446 /* Check that a Tx process is not already ongoing */
1447 if (huart->gState == HAL_UART_STATE_READY)
1448 {
1449 if ((pData == NULL) || (Size == 0U))
1450 {
1451 return HAL_ERROR;
1452 }
1453
1454 /* In case of 9bits/No Parity transfer, pData buffer provided as input parameter
1455 should be aligned on a u16 frontier, as data copy into TDR will be
1456 handled by DMA from a u16 frontier. */
1457 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
1458 {
1459 if ((((uint32_t)pData) & 1U) != 0U)
1460 {
1461 return HAL_ERROR;
1462 }
1463 }
1464
1465 /* Process Locked */
1466 __HAL_LOCK(huart);
1467
1468 huart->pTxBuffPtr = pData;
1469 huart->TxXferSize = Size;
1470 huart->TxXferCount = Size;
1471
1472 huart->ErrorCode = HAL_UART_ERROR_NONE;
1473 huart->gState = HAL_UART_STATE_BUSY_TX;
1474
1475 if (huart->hdmatx != NULL)
1476 {
1477 /* Set the UART DMA transfer complete callback */
1478 huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt;
1479
1480 /* Set the UART DMA Half transfer complete callback */
1481 huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt;
1482
1483 /* Set the DMA error callback */
1484 huart->hdmatx->XferErrorCallback = UART_DMAError;
1485
1486 /* Set the DMA abort callback */
1487 huart->hdmatx->XferAbortCallback = NULL;
1488
1489 /* Enable the UART transmit DMA channel */
1490 if (HAL_DMA_Start_IT(huart->hdmatx, (uint32_t)huart->pTxBuffPtr, (uint32_t)&huart->Instance->TDR, Size) != HAL_OK)
1491 {
1492 /* Set error code to DMA */
1493 huart->ErrorCode = HAL_UART_ERROR_DMA;
1494
1495 /* Process Unlocked */
1496 __HAL_UNLOCK(huart);
1497
1498 /* Restore huart->gState to ready */
1499 huart->gState = HAL_UART_STATE_READY;
1500
1501 return HAL_ERROR;
1502 }
1503 }
1504 /* Clear the TC flag in the ICR register */
1505 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_TCF);
1506
1507 /* Process Unlocked */
1508 __HAL_UNLOCK(huart);
1509
1510 /* Enable the DMA transfer for transmit request by setting the DMAT bit
1511 in the UART CR3 register */
1512 SET_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1513
1514 return HAL_OK;
1515 }
1516 else
1517 {
1518 return HAL_BUSY;
1519 }
1520}
1521
1522/**
1523 * @brief Receive an amount of data in DMA mode.
1524 * @note When the UART parity is enabled (PCE = 1), the received data contain
1525 * the parity bit (MSB position).
1526 * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
1527 * address of user data buffer for storing data to be received, should be aligned on a half word frontier (16 bits)
1528 * (as received data will be handled by DMA from halfword frontier). Depending on compilation chain,
1529 * use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pData.
1530 * @param huart UART handle.
1531 * @param pData Pointer to data buffer.
1532 * @param Size Amount of data to be received.
1533 * @retval HAL status
1534 */
1535HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
1536{
1537 /* Check that a Rx process is not already ongoing */
1538 if (huart->RxState == HAL_UART_STATE_READY)
1539 {
1540 if ((pData == NULL) || (Size == 0U))
1541 {
1542 return HAL_ERROR;
1543 }
1544
1545 /* In case of 9bits/No Parity transfer, pData buffer provided as input parameter
1546 should be aligned on a u16 frontier, as data copy from RDR will be
1547 handled by DMA from a u16 frontier. */
1548 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
1549 {
1550 if ((((uint32_t)pData) & 1U) != 0U)
1551 {
1552 return HAL_ERROR;
1553 }
1554 }
1555
1556 /* Process Locked */
1557 __HAL_LOCK(huart);
1558
1559 huart->pRxBuffPtr = pData;
1560 huart->RxXferSize = Size;
1561
1562 huart->ErrorCode = HAL_UART_ERROR_NONE;
1563 huart->RxState = HAL_UART_STATE_BUSY_RX;
1564
1565 if (huart->hdmarx != NULL)
1566 {
1567 /* Set the UART DMA transfer complete callback */
1568 huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt;
1569
1570 /* Set the UART DMA Half transfer complete callback */
1571 huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt;
1572
1573 /* Set the DMA error callback */
1574 huart->hdmarx->XferErrorCallback = UART_DMAError;
1575
1576 /* Set the DMA abort callback */
1577 huart->hdmarx->XferAbortCallback = NULL;
1578
1579 /* Enable the DMA channel */
1580 if (HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->RDR, (uint32_t)huart->pRxBuffPtr, Size) != HAL_OK)
1581 {
1582 /* Set error code to DMA */
1583 huart->ErrorCode = HAL_UART_ERROR_DMA;
1584
1585 /* Process Unlocked */
1586 __HAL_UNLOCK(huart);
1587
1588 /* Restore huart->gState to ready */
1589 huart->gState = HAL_UART_STATE_READY;
1590
1591 return HAL_ERROR;
1592 }
1593 }
1594 /* Process Unlocked */
1595 __HAL_UNLOCK(huart);
1596
1597 /* Enable the UART Parity Error Interrupt */
1598 SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
1599
1600 /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
1601 SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
1602
1603 /* Enable the DMA transfer for the receiver request by setting the DMAR bit
1604 in the UART CR3 register */
1605 SET_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1606
1607 return HAL_OK;
1608 }
1609 else
1610 {
1611 return HAL_BUSY;
1612 }
1613}
1614
1615/**
1616 * @brief Pause the DMA Transfer.
1617 * @param huart UART handle.
1618 * @retval HAL status
1619 */
1620HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart)
1621{
1622 const HAL_UART_StateTypeDef gstate = huart->gState;
1623 const HAL_UART_StateTypeDef rxstate = huart->RxState;
1624
1625 /* Process Locked */
1626 __HAL_LOCK(huart);
1627
1628 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) &&
1629 (gstate == HAL_UART_STATE_BUSY_TX))
1630 {
1631 /* Disable the UART DMA Tx request */
1632 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1633 }
1634 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) &&
1635 (rxstate == HAL_UART_STATE_BUSY_RX))
1636 {
1637 /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
1638 CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
1639 CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
1640
1641 /* Disable the UART DMA Rx request */
1642 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1643 }
1644
1645 /* Process Unlocked */
1646 __HAL_UNLOCK(huart);
1647
1648 return HAL_OK;
1649}
1650
1651/**
1652 * @brief Resume the DMA Transfer.
1653 * @param huart UART handle.
1654 * @retval HAL status
1655 */
1656HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart)
1657{
1658 /* Process Locked */
1659 __HAL_LOCK(huart);
1660
1661 if (huart->gState == HAL_UART_STATE_BUSY_TX)
1662 {
1663 /* Enable the UART DMA Tx request */
1664 SET_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1665 }
1666 if (huart->RxState == HAL_UART_STATE_BUSY_RX)
1667 {
1668 /* Clear the Overrun flag before resuming the Rx transfer */
1669 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF);
1670
1671 /* Reenable PE and ERR (Frame error, noise error, overrun error) interrupts */
1672 SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
1673 SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
1674
1675 /* Enable the UART DMA Rx request */
1676 SET_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1677 }
1678
1679 /* Process Unlocked */
1680 __HAL_UNLOCK(huart);
1681
1682 return HAL_OK;
1683}
1684
1685/**
1686 * @brief Stop the DMA Transfer.
1687 * @param huart UART handle.
1688 * @retval HAL status
1689 */
1690HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart)
1691{
1692 /* The Lock is not implemented on this API to allow the user application
1693 to call the HAL UART API under callbacks HAL_UART_TxCpltCallback() / HAL_UART_RxCpltCallback() /
1694 HAL_UART_TxHalfCpltCallback / HAL_UART_RxHalfCpltCallback:
1695 indeed, when HAL_DMA_Abort() API is called, the DMA TX/RX Transfer or Half Transfer complete
1696 interrupt is generated if the DMA transfer interruption occurs at the middle or at the end of
1697 the stream and the corresponding call back is executed. */
1698
1699 const HAL_UART_StateTypeDef gstate = huart->gState;
1700 const HAL_UART_StateTypeDef rxstate = huart->RxState;
1701
1702 /* Stop UART DMA Tx request if ongoing */
1703 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) &&
1704 (gstate == HAL_UART_STATE_BUSY_TX))
1705 {
1706 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1707
1708 /* Abort the UART DMA Tx channel */
1709 if (huart->hdmatx != NULL)
1710 {
1711 if (HAL_DMA_Abort(huart->hdmatx) != HAL_OK)
1712 {
1713 if (HAL_DMA_GetError(huart->hdmatx) == HAL_DMA_ERROR_TIMEOUT)
1714 {
1715 /* Set error code to DMA */
1716 huart->ErrorCode = HAL_UART_ERROR_DMA;
1717
1718 return HAL_TIMEOUT;
1719 }
1720 }
1721 }
1722
1723 UART_EndTxTransfer(huart);
1724 }
1725
1726 /* Stop UART DMA Rx request if ongoing */
1727 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) &&
1728 (rxstate == HAL_UART_STATE_BUSY_RX))
1729 {
1730 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1731
1732 /* Abort the UART DMA Rx channel */
1733 if (huart->hdmarx != NULL)
1734 {
1735 if (HAL_DMA_Abort(huart->hdmarx) != HAL_OK)
1736 {
1737 if (HAL_DMA_GetError(huart->hdmarx) == HAL_DMA_ERROR_TIMEOUT)
1738 {
1739 /* Set error code to DMA */
1740 huart->ErrorCode = HAL_UART_ERROR_DMA;
1741
1742 return HAL_TIMEOUT;
1743 }
1744 }
1745 }
1746
1747 UART_EndRxTransfer(huart);
1748 }
1749
1750 return HAL_OK;
1751}
1752
1753/**
1754 * @brief Abort ongoing transfers (blocking mode).
1755 * @param huart UART handle.
1756 * @note This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode.
1757 * This procedure performs following operations :
1758 * - Disable UART Interrupts (Tx and Rx)
1759 * - Disable the DMA transfer in the peripheral register (if enabled)
1760 * - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
1761 * - Set handle State to READY
1762 * @note This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
1763 * @retval HAL status
1764*/
1765HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart)
1766{
1767 /* Disable TXE, TC, RXNE, PE, RXFT, TXFT and ERR (Frame error, noise error, overrun error) interrupts */
1768 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | USART_CR1_TXEIE_TXFNFIE | USART_CR1_TCIE));
1769 CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE | USART_CR3_RXFTIE | USART_CR3_TXFTIE);
1770
1771 /* Disable the UART DMA Tx request if enabled */
1772 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
1773 {
1774 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1775
1776 /* Abort the UART DMA Tx channel : use blocking DMA Abort API (no callback) */
1777 if (huart->hdmatx != NULL)
1778 {
1779 /* Set the UART DMA Abort callback to Null.
1780 No call back execution at end of DMA abort procedure */
1781 huart->hdmatx->XferAbortCallback = NULL;
1782
1783 if (HAL_DMA_Abort(huart->hdmatx) != HAL_OK)
1784 {
1785 if (HAL_DMA_GetError(huart->hdmatx) == HAL_DMA_ERROR_TIMEOUT)
1786 {
1787 /* Set error code to DMA */
1788 huart->ErrorCode = HAL_UART_ERROR_DMA;
1789
1790 return HAL_TIMEOUT;
1791 }
1792 }
1793 }
1794 }
1795
1796 /* Disable the UART DMA Rx request if enabled */
1797 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
1798 {
1799 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1800
1801 /* Abort the UART DMA Rx channel : use blocking DMA Abort API (no callback) */
1802 if (huart->hdmarx != NULL)
1803 {
1804 /* Set the UART DMA Abort callback to Null.
1805 No call back execution at end of DMA abort procedure */
1806 huart->hdmarx->XferAbortCallback = NULL;
1807
1808 if (HAL_DMA_Abort(huart->hdmarx) != HAL_OK)
1809 {
1810 if (HAL_DMA_GetError(huart->hdmarx) == HAL_DMA_ERROR_TIMEOUT)
1811 {
1812 /* Set error code to DMA */
1813 huart->ErrorCode = HAL_UART_ERROR_DMA;
1814
1815 return HAL_TIMEOUT;
1816 }
1817 }
1818 }
1819 }
1820
1821 /* Reset Tx and Rx transfer counters */
1822 huart->TxXferCount = 0U;
1823 huart->RxXferCount = 0U;
1824
1825 /* Clear the Error flags in the ICR register */
1826 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
1827
1828 /* Flush the whole TX FIFO (if needed) */
1829 if (huart->FifoMode == UART_FIFOMODE_ENABLE)
1830 {
1831 __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST);
1832 }
1833
1834 /* Discard the received data */
1835 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
1836
1837 /* Restore huart->gState and huart->RxState to Ready */
1838 huart->gState = HAL_UART_STATE_READY;
1839 huart->RxState = HAL_UART_STATE_READY;
1840
1841 /* Reset Handle ErrorCode to No Error */
1842 huart->ErrorCode = HAL_UART_ERROR_NONE;
1843
1844 return HAL_OK;
1845}
1846
1847/**
1848 * @brief Abort ongoing Transmit transfer (blocking mode).
1849 * @param huart UART handle.
1850 * @note This procedure could be used for aborting any ongoing Tx transfer started in Interrupt or DMA mode.
1851 * This procedure performs following operations :
1852 * - Disable UART Interrupts (Tx)
1853 * - Disable the DMA transfer in the peripheral register (if enabled)
1854 * - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
1855 * - Set handle State to READY
1856 * @note This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
1857 * @retval HAL status
1858*/
1859HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart)
1860{
1861 /* Disable TCIE, TXEIE and TXFTIE interrupts */
1862 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TCIE | USART_CR1_TXEIE_TXFNFIE));
1863 CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
1864
1865 /* Disable the UART DMA Tx request if enabled */
1866 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
1867 {
1868 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1869
1870 /* Abort the UART DMA Tx channel : use blocking DMA Abort API (no callback) */
1871 if (huart->hdmatx != NULL)
1872 {
1873 /* Set the UART DMA Abort callback to Null.
1874 No call back execution at end of DMA abort procedure */
1875 huart->hdmatx->XferAbortCallback = NULL;
1876
1877 if (HAL_DMA_Abort(huart->hdmatx) != HAL_OK)
1878 {
1879 if (HAL_DMA_GetError(huart->hdmatx) == HAL_DMA_ERROR_TIMEOUT)
1880 {
1881 /* Set error code to DMA */
1882 huart->ErrorCode = HAL_UART_ERROR_DMA;
1883
1884 return HAL_TIMEOUT;
1885 }
1886 }
1887 }
1888 }
1889
1890 /* Reset Tx transfer counter */
1891 huart->TxXferCount = 0U;
1892
1893 /* Flush the whole TX FIFO (if needed) */
1894 if (huart->FifoMode == UART_FIFOMODE_ENABLE)
1895 {
1896 __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST);
1897 }
1898
1899 /* Restore huart->gState to Ready */
1900 huart->gState = HAL_UART_STATE_READY;
1901
1902 return HAL_OK;
1903}
1904
1905/**
1906 * @brief Abort ongoing Receive transfer (blocking mode).
1907 * @param huart UART handle.
1908 * @note This procedure could be used for aborting any ongoing Rx transfer started in Interrupt or DMA mode.
1909 * This procedure performs following operations :
1910 * - Disable UART Interrupts (Rx)
1911 * - Disable the DMA transfer in the peripheral register (if enabled)
1912 * - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
1913 * - Set handle State to READY
1914 * @note This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
1915 * @retval HAL status
1916*/
1917HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart)
1918{
1919 /* Disable PEIE, EIE, RXNEIE and RXFTIE interrupts */
1920 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE));
1921 CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE | USART_CR3_RXFTIE);
1922
1923 /* Disable the UART DMA Rx request if enabled */
1924 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
1925 {
1926 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1927
1928 /* Abort the UART DMA Rx channel : use blocking DMA Abort API (no callback) */
1929 if (huart->hdmarx != NULL)
1930 {
1931 /* Set the UART DMA Abort callback to Null.
1932 No call back execution at end of DMA abort procedure */
1933 huart->hdmarx->XferAbortCallback = NULL;
1934
1935 if (HAL_DMA_Abort(huart->hdmarx) != HAL_OK)
1936 {
1937 if (HAL_DMA_GetError(huart->hdmarx) == HAL_DMA_ERROR_TIMEOUT)
1938 {
1939 /* Set error code to DMA */
1940 huart->ErrorCode = HAL_UART_ERROR_DMA;
1941
1942 return HAL_TIMEOUT;
1943 }
1944 }
1945 }
1946 }
1947
1948 /* Reset Rx transfer counter */
1949 huart->RxXferCount = 0U;
1950
1951 /* Clear the Error flags in the ICR register */
1952 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
1953
1954 /* Discard the received data */
1955 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
1956
1957 /* Restore huart->RxState to Ready */
1958 huart->RxState = HAL_UART_STATE_READY;
1959
1960 return HAL_OK;
1961}
1962
1963/**
1964 * @brief Abort ongoing transfers (Interrupt mode).
1965 * @param huart UART handle.
1966 * @note This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode.
1967 * This procedure performs following operations :
1968 * - Disable UART Interrupts (Tx and Rx)
1969 * - Disable the DMA transfer in the peripheral register (if enabled)
1970 * - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
1971 * - Set handle State to READY
1972 * - At abort completion, call user abort complete callback
1973 * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be
1974 * considered as completed only when user abort complete callback is executed (not when exiting function).
1975 * @retval HAL status
1976*/
1977HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart)
1978{
1979 uint32_t abortcplt = 1U;
1980
1981 /* Disable interrupts */
1982 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_PEIE | USART_CR1_TCIE | USART_CR1_RXNEIE_RXFNEIE | USART_CR1_TXEIE_TXFNFIE));
1983 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE | USART_CR3_TXFTIE));
1984
1985 /* If DMA Tx and/or DMA Rx Handles are associated to UART Handle, DMA Abort complete callbacks should be initialised
1986 before any call to DMA Abort functions */
1987 /* DMA Tx Handle is valid */
1988 if (huart->hdmatx != NULL)
1989 {
1990 /* Set DMA Abort Complete callback if UART DMA Tx request if enabled.
1991 Otherwise, set it to NULL */
1992 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
1993 {
1994 huart->hdmatx->XferAbortCallback = UART_DMATxAbortCallback;
1995 }
1996 else
1997 {
1998 huart->hdmatx->XferAbortCallback = NULL;
1999 }
2000 }
2001 /* DMA Rx Handle is valid */
2002 if (huart->hdmarx != NULL)
2003 {
2004 /* Set DMA Abort Complete callback if UART DMA Rx request if enabled.
2005 Otherwise, set it to NULL */
2006 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
2007 {
2008 huart->hdmarx->XferAbortCallback = UART_DMARxAbortCallback;
2009 }
2010 else
2011 {
2012 huart->hdmarx->XferAbortCallback = NULL;
2013 }
2014 }
2015
2016 /* Disable the UART DMA Tx request if enabled */
2017 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
2018 {
2019 /* Disable DMA Tx at UART level */
2020 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
2021
2022 /* Abort the UART DMA Tx channel : use non blocking DMA Abort API (callback) */
2023 if (huart->hdmatx != NULL)
2024 {
2025 /* UART Tx DMA Abort callback has already been initialised :
2026 will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */
2027
2028 /* Abort DMA TX */
2029 if (HAL_DMA_Abort_IT(huart->hdmatx) != HAL_OK)
2030 {
2031 huart->hdmatx->XferAbortCallback = NULL;
2032 }
2033 else
2034 {
2035 abortcplt = 0U;
2036 }
2037 }
2038 }
2039
2040 /* Disable the UART DMA Rx request if enabled */
2041 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
2042 {
2043 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
2044
2045 /* Abort the UART DMA Rx channel : use non blocking DMA Abort API (callback) */
2046 if (huart->hdmarx != NULL)
2047 {
2048 /* UART Rx DMA Abort callback has already been initialised :
2049 will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */
2050
2051 /* Abort DMA RX */
2052 if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
2053 {
2054 huart->hdmarx->XferAbortCallback = NULL;
2055 abortcplt = 1U;
2056 }
2057 else
2058 {
2059 abortcplt = 0U;
2060 }
2061 }
2062 }
2063
2064 /* if no DMA abort complete callback execution is required => call user Abort Complete callback */
2065 if (abortcplt == 1U)
2066 {
2067 /* Reset Tx and Rx transfer counters */
2068 huart->TxXferCount = 0U;
2069 huart->RxXferCount = 0U;
2070
2071 /* Clear ISR function pointers */
2072 huart->RxISR = NULL;
2073 huart->TxISR = NULL;
2074
2075 /* Reset errorCode */
2076 huart->ErrorCode = HAL_UART_ERROR_NONE;
2077
2078 /* Clear the Error flags in the ICR register */
2079 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
2080
2081 /* Flush the whole TX FIFO (if needed) */
2082 if (huart->FifoMode == UART_FIFOMODE_ENABLE)
2083 {
2084 __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST);
2085 }
2086
2087 /* Discard the received data */
2088 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
2089
2090 /* Restore huart->gState and huart->RxState to Ready */
2091 huart->gState = HAL_UART_STATE_READY;
2092 huart->RxState = HAL_UART_STATE_READY;
2093
2094 /* As no DMA to be aborted, call directly user Abort complete callback */
2095#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2096 /* Call registered Abort complete callback */
2097 huart->AbortCpltCallback(huart);
2098#else
2099 /* Call legacy weak Abort complete callback */
2100 HAL_UART_AbortCpltCallback(huart);
2101#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2102 }
2103
2104 return HAL_OK;
2105}
2106
2107/**
2108 * @brief Abort ongoing Transmit transfer (Interrupt mode).
2109 * @param huart UART handle.
2110 * @note This procedure could be used for aborting any ongoing Tx transfer started in Interrupt or DMA mode.
2111 * This procedure performs following operations :
2112 * - Disable UART Interrupts (Tx)
2113 * - Disable the DMA transfer in the peripheral register (if enabled)
2114 * - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
2115 * - Set handle State to READY
2116 * - At abort completion, call user abort complete callback
2117 * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be
2118 * considered as completed only when user abort complete callback is executed (not when exiting function).
2119 * @retval HAL status
2120*/
2121HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart)
2122{
2123 /* Disable interrupts */
2124 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TCIE | USART_CR1_TXEIE_TXFNFIE));
2125 CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
2126
2127 /* Disable the UART DMA Tx request if enabled */
2128 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
2129 {
2130 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
2131
2132 /* Abort the UART DMA Tx channel : use non blocking DMA Abort API (callback) */
2133 if (huart->hdmatx != NULL)
2134 {
2135 /* Set the UART DMA Abort callback :
2136 will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */
2137 huart->hdmatx->XferAbortCallback = UART_DMATxOnlyAbortCallback;
2138
2139 /* Abort DMA TX */
2140 if (HAL_DMA_Abort_IT(huart->hdmatx) != HAL_OK)
2141 {
2142 /* Call Directly huart->hdmatx->XferAbortCallback function in case of error */
2143 huart->hdmatx->XferAbortCallback(huart->hdmatx);
2144 }
2145 }
2146 else
2147 {
2148 /* Reset Tx transfer counter */
2149 huart->TxXferCount = 0U;
2150
2151 /* Clear TxISR function pointers */
2152 huart->TxISR = NULL;
2153
2154 /* Restore huart->gState to Ready */
2155 huart->gState = HAL_UART_STATE_READY;
2156
2157 /* As no DMA to be aborted, call directly user Abort complete callback */
2158#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2159 /* Call registered Abort Transmit Complete Callback */
2160 huart->AbortTransmitCpltCallback(huart);
2161#else
2162 /* Call legacy weak Abort Transmit Complete Callback */
2163 HAL_UART_AbortTransmitCpltCallback(huart);
2164#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2165 }
2166 }
2167 else
2168 {
2169 /* Reset Tx transfer counter */
2170 huart->TxXferCount = 0U;
2171
2172 /* Clear TxISR function pointers */
2173 huart->TxISR = NULL;
2174
2175 /* Flush the whole TX FIFO (if needed) */
2176 if (huart->FifoMode == UART_FIFOMODE_ENABLE)
2177 {
2178 __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST);
2179 }
2180
2181 /* Restore huart->gState to Ready */
2182 huart->gState = HAL_UART_STATE_READY;
2183
2184 /* As no DMA to be aborted, call directly user Abort complete callback */
2185#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2186 /* Call registered Abort Transmit Complete Callback */
2187 huart->AbortTransmitCpltCallback(huart);
2188#else
2189 /* Call legacy weak Abort Transmit Complete Callback */
2190 HAL_UART_AbortTransmitCpltCallback(huart);
2191#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2192 }
2193
2194 return HAL_OK;
2195}
2196
2197/**
2198 * @brief Abort ongoing Receive transfer (Interrupt mode).
2199 * @param huart UART handle.
2200 * @note This procedure could be used for aborting any ongoing Rx transfer started in Interrupt or DMA mode.
2201 * This procedure performs following operations :
2202 * - Disable UART Interrupts (Rx)
2203 * - Disable the DMA transfer in the peripheral register (if enabled)
2204 * - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
2205 * - Set handle State to READY
2206 * - At abort completion, call user abort complete callback
2207 * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be
2208 * considered as completed only when user abort complete callback is executed (not when exiting function).
2209 * @retval HAL status
2210*/
2211HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart)
2212{
2213 /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
2214 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE));
2215 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
2216
2217 /* Disable the UART DMA Rx request if enabled */
2218 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
2219 {
2220 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
2221
2222 /* Abort the UART DMA Rx channel : use non blocking DMA Abort API (callback) */
2223 if (huart->hdmarx != NULL)
2224 {
2225 /* Set the UART DMA Abort callback :
2226 will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */
2227 huart->hdmarx->XferAbortCallback = UART_DMARxOnlyAbortCallback;
2228
2229 /* Abort DMA RX */
2230 if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
2231 {
2232 /* Call Directly huart->hdmarx->XferAbortCallback function in case of error */
2233 huart->hdmarx->XferAbortCallback(huart->hdmarx);
2234 }
2235 }
2236 else
2237 {
2238 /* Reset Rx transfer counter */
2239 huart->RxXferCount = 0U;
2240
2241 /* Clear RxISR function pointer */
2242 huart->pRxBuffPtr = NULL;
2243
2244 /* Clear the Error flags in the ICR register */
2245 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
2246
2247 /* Discard the received data */
2248 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
2249
2250 /* Restore huart->RxState to Ready */
2251 huart->RxState = HAL_UART_STATE_READY;
2252
2253 /* As no DMA to be aborted, call directly user Abort complete callback */
2254#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2255 /* Call registered Abort Receive Complete Callback */
2256 huart->AbortReceiveCpltCallback(huart);
2257#else
2258 /* Call legacy weak Abort Receive Complete Callback */
2259 HAL_UART_AbortReceiveCpltCallback(huart);
2260#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2261 }
2262 }
2263 else
2264 {
2265 /* Reset Rx transfer counter */
2266 huart->RxXferCount = 0U;
2267
2268 /* Clear RxISR function pointer */
2269 huart->pRxBuffPtr = NULL;
2270
2271 /* Clear the Error flags in the ICR register */
2272 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
2273
2274 /* Restore huart->RxState to Ready */
2275 huart->RxState = HAL_UART_STATE_READY;
2276
2277 /* As no DMA to be aborted, call directly user Abort complete callback */
2278#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2279 /* Call registered Abort Receive Complete Callback */
2280 huart->AbortReceiveCpltCallback(huart);
2281#else
2282 /* Call legacy weak Abort Receive Complete Callback */
2283 HAL_UART_AbortReceiveCpltCallback(huart);
2284#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2285 }
2286
2287 return HAL_OK;
2288}
2289
2290/**
2291 * @brief Handle UART interrupt request.
2292 * @param huart UART handle.
2293 * @retval None
2294 */
2295void HAL_UART_IRQHandler(UART_HandleTypeDef *huart)
2296{
2297 uint32_t isrflags = READ_REG(huart->Instance->ISR);
2298 uint32_t cr1its = READ_REG(huart->Instance->CR1);
2299 uint32_t cr3its = READ_REG(huart->Instance->CR3);
2300
2301 uint32_t errorflags;
2302 uint32_t errorcode;
2303
2304 /* If no error occurs */
2305 errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE));
2306 if (errorflags == 0U)
2307 {
2308 /* UART in mode Receiver ---------------------------------------------------*/
2309 if (((isrflags & USART_ISR_RXNE_RXFNE) != 0U)
2310 && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U)
2311 || ((cr3its & USART_CR3_RXFTIE) != 0U)))
2312 {
2313 if (huart->RxISR != NULL)
2314 {
2315 huart->RxISR(huart);
2316 }
2317 return;
2318 }
2319 }
2320
2321 /* If some errors occur */
2322 if ((errorflags != 0U)
2323 && ((((cr3its & (USART_CR3_RXFTIE | USART_CR3_EIE)) != 0U)
2324 || ((cr1its & (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE)) != 0U))))
2325 {
2326 /* UART parity error interrupt occurred -------------------------------------*/
2327 if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U))
2328 {
2329 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF);
2330
2331 huart->ErrorCode |= HAL_UART_ERROR_PE;
2332 }
2333
2334 /* UART frame error interrupt occurred --------------------------------------*/
2335 if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
2336 {
2337 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF);
2338
2339 huart->ErrorCode |= HAL_UART_ERROR_FE;
2340 }
2341
2342 /* UART noise error interrupt occurred --------------------------------------*/
2343 if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
2344 {
2345 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF);
2346
2347 huart->ErrorCode |= HAL_UART_ERROR_NE;
2348 }
2349
2350 /* UART Over-Run interrupt occurred -----------------------------------------*/
2351 if (((isrflags & USART_ISR_ORE) != 0U)
2352 && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U) ||
2353 ((cr3its & (USART_CR3_RXFTIE | USART_CR3_EIE)) != 0U)))
2354 {
2355 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF);
2356
2357 huart->ErrorCode |= HAL_UART_ERROR_ORE;
2358 }
2359
2360 /* Call UART Error Call back function if need be --------------------------*/
2361 if (huart->ErrorCode != HAL_UART_ERROR_NONE)
2362 {
2363 /* UART in mode Receiver ---------------------------------------------------*/
2364 if (((isrflags & USART_ISR_RXNE_RXFNE) != 0U)
2365 && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U)
2366 || ((cr3its & USART_CR3_RXFTIE) != 0U)))
2367 {
2368 if (huart->RxISR != NULL)
2369 {
2370 huart->RxISR(huart);
2371 }
2372 }
2373
2374 /* If Overrun error occurs, or if any error occurs in DMA mode reception,
2375 consider error as blocking */
2376 errorcode = huart->ErrorCode;
2377 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) ||
2378 ((errorcode & HAL_UART_ERROR_ORE) != 0U))
2379 {
2380 /* Blocking error : transfer is aborted
2381 Set the UART state ready to be able to start again the process,
2382 Disable Rx Interrupts, and disable Rx DMA request, if ongoing */
2383 UART_EndRxTransfer(huart);
2384
2385 /* Disable the UART DMA Rx request if enabled */
2386 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
2387 {
2388 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
2389
2390 /* Abort the UART DMA Rx channel */
2391 if (huart->hdmarx != NULL)
2392 {
2393 /* Set the UART DMA Abort callback :
2394 will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */
2395 huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError;
2396
2397 /* Abort DMA RX */
2398 if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
2399 {
2400 /* Call Directly huart->hdmarx->XferAbortCallback function in case of error */
2401 huart->hdmarx->XferAbortCallback(huart->hdmarx);
2402 }
2403 }
2404 else
2405 {
2406 /* Call user error callback */
2407#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2408 /*Call registered error callback*/
2409 huart->ErrorCallback(huart);
2410#else
2411 /*Call legacy weak error callback*/
2412 HAL_UART_ErrorCallback(huart);
2413#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2414
2415 }
2416 }
2417 else
2418 {
2419 /* Call user error callback */
2420#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2421 /*Call registered error callback*/
2422 huart->ErrorCallback(huart);
2423#else
2424 /*Call legacy weak error callback*/
2425 HAL_UART_ErrorCallback(huart);
2426#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2427 }
2428 }
2429 else
2430 {
2431 /* Non Blocking error : transfer could go on.
2432 Error is notified to user through user error callback */
2433#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2434 /*Call registered error callback*/
2435 huart->ErrorCallback(huart);
2436#else
2437 /*Call legacy weak error callback*/
2438 HAL_UART_ErrorCallback(huart);
2439#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2440 huart->ErrorCode = HAL_UART_ERROR_NONE;
2441 }
2442 }
2443 return;
2444
2445 } /* End if some error occurs */
2446
2447 /* UART wakeup from Stop mode interrupt occurred ---------------------------*/
2448 if (((isrflags & USART_ISR_WUF) != 0U) && ((cr3its & USART_CR3_WUFIE) != 0U))
2449 {
2450 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_WUF);
2451
2452 /* UART Rx state is not reset as a reception process might be ongoing.
2453 If UART handle state fields need to be reset to READY, this could be done in Wakeup callback */
2454
2455#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2456 /* Call registered Wakeup Callback */
2457 huart->WakeupCallback(huart);
2458#else
2459 /* Call legacy weak Wakeup Callback */
2460 HAL_UARTEx_WakeupCallback(huart);
2461#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2462 return;
2463 }
2464
2465 /* UART in mode Transmitter ------------------------------------------------*/
2466 if (((isrflags & USART_ISR_TXE_TXFNF) != 0U)
2467 && (((cr1its & USART_CR1_TXEIE_TXFNFIE) != 0U)
2468 || ((cr3its & USART_CR3_TXFTIE) != 0U)))
2469 {
2470 if (huart->TxISR != NULL)
2471 {
2472 huart->TxISR(huart);
2473 }
2474 return;
2475 }
2476
2477 /* UART in mode Transmitter (transmission end) -----------------------------*/
2478 if (((isrflags & USART_ISR_TC) != 0U) && ((cr1its & USART_CR1_TCIE) != 0U))
2479 {
2480 UART_EndTransmit_IT(huart);
2481 return;
2482 }
2483
2484 /* UART TX Fifo Empty occurred ----------------------------------------------*/
2485 if (((isrflags & USART_ISR_TXFE) != 0U) && ((cr1its & USART_CR1_TXFEIE) != 0U))
2486 {
2487#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2488 /* Call registered Tx Fifo Empty Callback */
2489 huart->TxFifoEmptyCallback(huart);
2490#else
2491 /* Call legacy weak Tx Fifo Empty Callback */
2492 HAL_UARTEx_TxFifoEmptyCallback(huart);
2493#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2494 return;
2495 }
2496
2497 /* UART RX Fifo Full occurred ----------------------------------------------*/
2498 if (((isrflags & USART_ISR_RXFF) != 0U) && ((cr1its & USART_CR1_RXFFIE) != 0U))
2499 {
2500#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2501 /* Call registered Rx Fifo Full Callback */
2502 huart->RxFifoFullCallback(huart);
2503#else
2504 /* Call legacy weak Rx Fifo Full Callback */
2505 HAL_UARTEx_RxFifoFullCallback(huart);
2506#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2507 return;
2508 }
2509}
2510
2511/**
2512 * @brief Tx Transfer completed callback.
2513 * @param huart UART handle.
2514 * @retval None
2515 */
2516__weak void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
2517{
2518 /* Prevent unused argument(s) compilation warning */
2519 UNUSED(huart);
2520
2521 /* NOTE : This function should not be modified, when the callback is needed,
2522 the HAL_UART_TxCpltCallback can be implemented in the user file.
2523 */
2524}
2525
2526/**
2527 * @brief Tx Half Transfer completed callback.
2528 * @param huart UART handle.
2529 * @retval None
2530 */
2531__weak void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart)
2532{
2533 /* Prevent unused argument(s) compilation warning */
2534 UNUSED(huart);
2535
2536 /* NOTE: This function should not be modified, when the callback is needed,
2537 the HAL_UART_TxHalfCpltCallback can be implemented in the user file.
2538 */
2539}
2540
2541/**
2542 * @brief Rx Transfer completed callback.
2543 * @param huart UART handle.
2544 * @retval None
2545 */
2546__weak void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
2547{
2548 /* Prevent unused argument(s) compilation warning */
2549 UNUSED(huart);
2550
2551 /* NOTE : This function should not be modified, when the callback is needed,
2552 the HAL_UART_RxCpltCallback can be implemented in the user file.
2553 */
2554}
2555
2556/**
2557 * @brief Rx Half Transfer completed callback.
2558 * @param huart UART handle.
2559 * @retval None
2560 */
2561__weak void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart)
2562{
2563 /* Prevent unused argument(s) compilation warning */
2564 UNUSED(huart);
2565
2566 /* NOTE: This function should not be modified, when the callback is needed,
2567 the HAL_UART_RxHalfCpltCallback can be implemented in the user file.
2568 */
2569}
2570
2571/**
2572 * @brief UART error callback.
2573 * @param huart UART handle.
2574 * @retval None
2575 */
2576__weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
2577{
2578 /* Prevent unused argument(s) compilation warning */
2579 UNUSED(huart);
2580
2581 /* NOTE : This function should not be modified, when the callback is needed,
2582 the HAL_UART_ErrorCallback can be implemented in the user file.
2583 */
2584}
2585
2586/**
2587 * @brief UART Abort Complete callback.
2588 * @param huart UART handle.
2589 * @retval None
2590 */
2591__weak void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart)
2592{
2593 /* Prevent unused argument(s) compilation warning */
2594 UNUSED(huart);
2595
2596 /* NOTE : This function should not be modified, when the callback is needed,
2597 the HAL_UART_AbortCpltCallback can be implemented in the user file.
2598 */
2599}
2600
2601/**
2602 * @brief UART Abort Complete callback.
2603 * @param huart UART handle.
2604 * @retval None
2605 */
2606__weak void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart)
2607{
2608 /* Prevent unused argument(s) compilation warning */
2609 UNUSED(huart);
2610
2611 /* NOTE : This function should not be modified, when the callback is needed,
2612 the HAL_UART_AbortTransmitCpltCallback can be implemented in the user file.
2613 */
2614}
2615
2616/**
2617 * @brief UART Abort Receive Complete callback.
2618 * @param huart UART handle.
2619 * @retval None
2620 */
2621__weak void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart)
2622{
2623 /* Prevent unused argument(s) compilation warning */
2624 UNUSED(huart);
2625
2626 /* NOTE : This function should not be modified, when the callback is needed,
2627 the HAL_UART_AbortReceiveCpltCallback can be implemented in the user file.
2628 */
2629}
2630
2631/**
2632 * @}
2633 */
2634
2635/** @defgroup UART_Exported_Functions_Group3 Peripheral Control functions
2636 * @brief UART control functions
2637 *
2638@verbatim
2639 ===============================================================================
2640 ##### Peripheral Control functions #####
2641 ===============================================================================
2642 [..]
2643 This subsection provides a set of functions allowing to control the UART.
2644 (+) HAL_MultiProcessor_EnableMuteMode() API enables mute mode
2645 (+) HAL_MultiProcessor_DisableMuteMode() API disables mute mode
2646 (+) HAL_MultiProcessor_EnterMuteMode() API enters mute mode
2647 (+) UART_SetConfig() API configures the UART peripheral
2648 (+) UART_AdvFeatureConfig() API optionally configures the UART advanced features
2649 (+) UART_CheckIdleState() API ensures that TEACK and/or REACK are set after initialization
2650 (+) HAL_HalfDuplex_EnableTransmitter() API disables receiver and enables transmitter
2651 (+) HAL_HalfDuplex_EnableReceiver() API disables transmitter and enables receiver
2652 (+) HAL_LIN_SendBreak() API transmits the break characters
2653@endverbatim
2654 * @{
2655 */
2656
2657/**
2658 * @brief Enable UART in mute mode (does not mean UART enters mute mode;
2659 * to enter mute mode, HAL_MultiProcessor_EnterMuteMode() API must be called).
2660 * @param huart UART handle.
2661 * @retval HAL status
2662 */
2663HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart)
2664{
2665 /* Process Locked */
2666 __HAL_LOCK(huart);
2667
2668 huart->gState = HAL_UART_STATE_BUSY;
2669
2670 /* Enable USART mute mode by setting the MME bit in the CR1 register */
2671 SET_BIT(huart->Instance->CR1, USART_CR1_MME);
2672
2673 huart->gState = HAL_UART_STATE_READY;
2674
2675 return (UART_CheckIdleState(huart));
2676}
2677
2678/**
2679 * @brief Disable UART mute mode (does not mean the UART actually exits mute mode
2680 * as it may not have been in mute mode at this very moment).
2681 * @param huart UART handle.
2682 * @retval HAL status
2683 */
2684HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart)
2685{
2686 /* Process Locked */
2687 __HAL_LOCK(huart);
2688
2689 huart->gState = HAL_UART_STATE_BUSY;
2690
2691 /* Disable USART mute mode by clearing the MME bit in the CR1 register */
2692 CLEAR_BIT(huart->Instance->CR1, USART_CR1_MME);
2693
2694 huart->gState = HAL_UART_STATE_READY;
2695
2696 return (UART_CheckIdleState(huart));
2697}
2698
2699/**
2700 * @brief Enter UART mute mode (means UART actually enters mute mode).
2701 * @note To exit from mute mode, HAL_MultiProcessor_DisableMuteMode() API must be called.
2702 * @param huart UART handle.
2703 * @retval None
2704 */
2705void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart)
2706{
2707 __HAL_UART_SEND_REQ(huart, UART_MUTE_MODE_REQUEST);
2708}
2709
2710/**
2711 * @brief Enable the UART transmitter and disable the UART receiver.
2712 * @param huart UART handle.
2713 * @retval HAL status
2714 */
2715HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart)
2716{
2717 /* Process Locked */
2718 __HAL_LOCK(huart);
2719 huart->gState = HAL_UART_STATE_BUSY;
2720
2721 /* Clear TE and RE bits */
2722 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TE | USART_CR1_RE));
2723
2724 /* Enable the USART's transmit interface by setting the TE bit in the USART CR1 register */
2725 SET_BIT(huart->Instance->CR1, USART_CR1_TE);
2726
2727 huart->gState = HAL_UART_STATE_READY;
2728
2729 /* Process Unlocked */
2730 __HAL_UNLOCK(huart);
2731
2732 return HAL_OK;
2733}
2734
2735/**
2736 * @brief Enable the UART receiver and disable the UART transmitter.
2737 * @param huart UART handle.
2738 * @retval HAL status.
2739 */
2740HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart)
2741{
2742 /* Process Locked */
2743 __HAL_LOCK(huart);
2744 huart->gState = HAL_UART_STATE_BUSY;
2745
2746 /* Clear TE and RE bits */
2747 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TE | USART_CR1_RE));
2748
2749 /* Enable the USART's receive interface by setting the RE bit in the USART CR1 register */
2750 SET_BIT(huart->Instance->CR1, USART_CR1_RE);
2751
2752 huart->gState = HAL_UART_STATE_READY;
2753
2754 /* Process Unlocked */
2755 __HAL_UNLOCK(huart);
2756
2757 return HAL_OK;
2758}
2759
2760
2761/**
2762 * @brief Transmit break characters.
2763 * @param huart UART handle.
2764 * @retval HAL status
2765 */
2766HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart)
2767{
2768 /* Check the parameters */
2769 assert_param(IS_UART_LIN_INSTANCE(huart->Instance));
2770
2771 /* Process Locked */
2772 __HAL_LOCK(huart);
2773
2774 huart->gState = HAL_UART_STATE_BUSY;
2775
2776 /* Send break characters */
2777 __HAL_UART_SEND_REQ(huart, UART_SENDBREAK_REQUEST);
2778
2779 huart->gState = HAL_UART_STATE_READY;
2780
2781 /* Process Unlocked */
2782 __HAL_UNLOCK(huart);
2783
2784 return HAL_OK;
2785}
2786
2787/**
2788 * @}
2789 */
2790
2791/** @defgroup UART_Exported_Functions_Group4 Peripheral State and Error functions
2792 * @brief UART Peripheral State functions
2793 *
2794@verbatim
2795 ==============================================================================
2796 ##### Peripheral State and Error functions #####
2797 ==============================================================================
2798 [..]
2799 This subsection provides functions allowing to :
2800 (+) Return the UART handle state.
2801 (+) Return the UART handle error code
2802
2803@endverbatim
2804 * @{
2805 */
2806
2807/**
2808 * @brief Return the UART handle state.
2809 * @param huart Pointer to a UART_HandleTypeDef structure that contains
2810 * the configuration information for the specified UART.
2811 * @retval HAL state
2812 */
2813HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart)
2814{
2815 uint32_t temp1, temp2;
2816 temp1 = huart->gState;
2817 temp2 = huart->RxState;
2818
2819 return (HAL_UART_StateTypeDef)(temp1 | temp2);
2820}
2821
2822/**
2823 * @brief Return the UART handle error code.
2824 * @param huart Pointer to a UART_HandleTypeDef structure that contains
2825 * the configuration information for the specified UART.
2826 * @retval UART Error Code
2827*/
2828uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart)
2829{
2830 return huart->ErrorCode;
2831}
2832/**
2833 * @}
2834 */
2835
2836/**
2837 * @}
2838 */
2839
2840/** @defgroup UART_Private_Functions UART Private Functions
2841 * @{
2842 */
2843
2844/**
2845 * @brief Initialize the callbacks to their default values.
2846 * @param huart UART handle.
2847 * @retval none
2848 */
2849#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2850void UART_InitCallbacksToDefault(UART_HandleTypeDef *huart)
2851{
2852 /* Init the UART Callback settings */
2853 huart->TxHalfCpltCallback = HAL_UART_TxHalfCpltCallback; /* Legacy weak TxHalfCpltCallback */
2854 huart->TxCpltCallback = HAL_UART_TxCpltCallback; /* Legacy weak TxCpltCallback */
2855 huart->RxHalfCpltCallback = HAL_UART_RxHalfCpltCallback; /* Legacy weak RxHalfCpltCallback */
2856 huart->RxCpltCallback = HAL_UART_RxCpltCallback; /* Legacy weak RxCpltCallback */
2857 huart->ErrorCallback = HAL_UART_ErrorCallback; /* Legacy weak ErrorCallback */
2858 huart->AbortCpltCallback = HAL_UART_AbortCpltCallback; /* Legacy weak AbortCpltCallback */
2859 huart->AbortTransmitCpltCallback = HAL_UART_AbortTransmitCpltCallback; /* Legacy weak AbortTransmitCpltCallback */
2860 huart->AbortReceiveCpltCallback = HAL_UART_AbortReceiveCpltCallback; /* Legacy weak AbortReceiveCpltCallback */
2861 huart->WakeupCallback = HAL_UARTEx_WakeupCallback; /* Legacy weak WakeupCallback */
2862 huart->RxFifoFullCallback = HAL_UARTEx_RxFifoFullCallback; /* Legacy weak RxFifoFullCallback */
2863 huart->TxFifoEmptyCallback = HAL_UARTEx_TxFifoEmptyCallback; /* Legacy weak TxFifoEmptyCallback */
2864
2865}
2866#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2867
2868/**
2869 * @brief Configure the UART peripheral.
2870 * @param huart UART handle.
2871 * @retval HAL status
2872 */
2873HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart)
2874{
2875 uint32_t tmpreg;
2876 uint16_t brrtemp;
2877 UART_ClockSourceTypeDef clocksource;
2878 uint32_t usartdiv = 0x00000000U;
2879 HAL_StatusTypeDef ret = HAL_OK;
2880 uint32_t lpuart_ker_ck_pres = 0x00000000U;
2881
2882 /* Check the parameters */
2883 assert_param(IS_UART_BAUDRATE(huart->Init.BaudRate));
2884 assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
2885 if (UART_INSTANCE_LOWPOWER(huart))
2886 {
2887 assert_param(IS_LPUART_STOPBITS(huart->Init.StopBits));
2888 }
2889 else
2890 {
2891 assert_param(IS_UART_STOPBITS(huart->Init.StopBits));
2892 assert_param(IS_UART_ONE_BIT_SAMPLE(huart->Init.OneBitSampling));
2893 }
2894
2895 assert_param(IS_UART_PARITY(huart->Init.Parity));
2896 assert_param(IS_UART_MODE(huart->Init.Mode));
2897 assert_param(IS_UART_HARDWARE_FLOW_CONTROL(huart->Init.HwFlowCtl));
2898 assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
2899 assert_param(IS_UART_PRESCALER(huart->Init.ClockPrescaler));
2900
2901 /*-------------------------- USART CR1 Configuration -----------------------*/
2902 /* Clear M, PCE, PS, TE, RE and OVER8 bits and configure
2903 * the UART Word Length, Parity, Mode and oversampling:
2904 * set the M bits according to huart->Init.WordLength value
2905 * set PCE and PS bits according to huart->Init.Parity value
2906 * set TE and RE bits according to huart->Init.Mode value
2907 * set OVER8 bit according to huart->Init.OverSampling value */
2908 tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling ;
2909 tmpreg |= (uint32_t)huart->FifoMode;
2910 MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg);
2911
2912 /*-------------------------- USART CR2 Configuration -----------------------*/
2913 /* Configure the UART Stop Bits: Set STOP[13:12] bits according
2914 * to huart->Init.StopBits value */
2915 MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
2916
2917 /*-------------------------- USART CR3 Configuration -----------------------*/
2918 /* Configure
2919 * - UART HardWare Flow Control: set CTSE and RTSE bits according
2920 * to huart->Init.HwFlowCtl value
2921 * - one-bit sampling method versus three samples' majority rule according
2922 * to huart->Init.OneBitSampling (not applicable to LPUART) */
2923 tmpreg = (uint32_t)huart->Init.HwFlowCtl;
2924
2925 if (!(UART_INSTANCE_LOWPOWER(huart)))
2926 {
2927 tmpreg |= huart->Init.OneBitSampling;
2928 }
2929 MODIFY_REG(huart->Instance->CR3, USART_CR3_FIELDS, tmpreg);
2930
2931 /*-------------------------- USART PRESC Configuration -----------------------*/
2932 /* Configure
2933 * - UART Clock Prescaler : set PRESCALER according to huart->Init.ClockPrescaler value */
2934 MODIFY_REG(huart->Instance->PRESC, USART_PRESC_PRESCALER, huart->Init.ClockPrescaler);
2935
2936 /*-------------------------- USART BRR Configuration -----------------------*/
2937 UART_GETCLOCKSOURCE(huart, clocksource);
2938
2939 /* Check LPUART instance */
2940 if (UART_INSTANCE_LOWPOWER(huart))
2941 {
2942 /* Retrieve frequency clock */
2943 switch (clocksource)
2944 {
2945 case UART_CLOCKSOURCE_PCLK1:
2946 lpuart_ker_ck_pres = (HAL_RCC_GetPCLK1Freq() / UART_GET_DIV_FACTOR(huart->Init.ClockPrescaler));
2947 break;
2948 case UART_CLOCKSOURCE_HSI:
2949 lpuart_ker_ck_pres = ((uint32_t)HSI_VALUE / UART_GET_DIV_FACTOR(huart->Init.ClockPrescaler));
2950 break;
2951 case UART_CLOCKSOURCE_SYSCLK:
2952 lpuart_ker_ck_pres = (HAL_RCC_GetSysClockFreq() / UART_GET_DIV_FACTOR(huart->Init.ClockPrescaler));
2953 break;
2954 case UART_CLOCKSOURCE_LSE:
2955 lpuart_ker_ck_pres = ((uint32_t)LSE_VALUE / UART_GET_DIV_FACTOR(huart->Init.ClockPrescaler));
2956 break;
2957 default:
2958 ret = HAL_ERROR;
2959 break;
2960 }
2961
2962 /* if proper clock source reported */
2963 if (lpuart_ker_ck_pres != 0U)
2964 {
2965 /* ensure that Frequency clock is in the range [3 * baudrate, 4096 * baudrate] */
2966 if ((lpuart_ker_ck_pres < (3U * huart->Init.BaudRate)) ||
2967 (lpuart_ker_ck_pres > (4096U * huart->Init.BaudRate)))
2968 {
2969 ret = HAL_ERROR;
2970 }
2971 else
2972 {
2973 switch (clocksource)
2974 {
2975 case UART_CLOCKSOURCE_PCLK1:
2976 usartdiv = (uint32_t)(UART_DIV_LPUART(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate, huart->Init.ClockPrescaler));
2977 break;
2978 case UART_CLOCKSOURCE_HSI:
2979 usartdiv = (uint32_t)(UART_DIV_LPUART(HSI_VALUE, huart->Init.BaudRate, huart->Init.ClockPrescaler));
2980 break;
2981 case UART_CLOCKSOURCE_SYSCLK:
2982 usartdiv = (uint32_t)(UART_DIV_LPUART(HAL_RCC_GetSysClockFreq(), huart->Init.BaudRate, huart->Init.ClockPrescaler));
2983 break;
2984 case UART_CLOCKSOURCE_LSE:
2985 usartdiv = (uint32_t)(UART_DIV_LPUART(LSE_VALUE, huart->Init.BaudRate, huart->Init.ClockPrescaler));
2986 break;
2987 default:
2988 ret = HAL_ERROR;
2989 break;
2990 }
2991
2992 /* It is forbidden to write values lower than 0x300 in the LPUART_BRR register */
2993 if ((usartdiv >= LPUART_BRR_MIN) && (usartdiv <= LPUART_BRR_MAX))
2994 {
2995 huart->Instance->BRR = usartdiv;
2996 }
2997 else
2998 {
2999 ret = HAL_ERROR;
3000 }
3001 } /* if ( (lpuart_ker_ck_pres < (3 * huart->Init.BaudRate) ) || (lpuart_ker_ck_pres > (4096 * huart->Init.BaudRate) )) */
3002 } /* if (lpuart_ker_ck_pres != 0) */
3003 }
3004 /* Check UART Over Sampling to set Baud Rate Register */
3005 else if (huart->Init.OverSampling == UART_OVERSAMPLING_8)
3006 {
3007 switch (clocksource)
3008 {
3009 case UART_CLOCKSOURCE_PCLK1:
3010 usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate, huart->Init.ClockPrescaler));
3011 break;
3012 case UART_CLOCKSOURCE_HSI:
3013 usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HSI_VALUE, huart->Init.BaudRate, huart->Init.ClockPrescaler));
3014 break;
3015 case UART_CLOCKSOURCE_SYSCLK:
3016 usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetSysClockFreq(), huart->Init.BaudRate, huart->Init.ClockPrescaler));
3017 break;
3018 case UART_CLOCKSOURCE_LSE:
3019 usartdiv = (uint16_t)(UART_DIV_SAMPLING8((uint32_t)LSE_VALUE, huart->Init.BaudRate, huart->Init.ClockPrescaler));
3020 break;
3021 default:
3022 ret = HAL_ERROR;
3023 break;
3024 }
3025
3026 /* USARTDIV must be greater than or equal to 0d16 */
3027 if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
3028 {
3029 brrtemp = (uint16_t)(usartdiv & 0xFFF0U);
3030 brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U);
3031 huart->Instance->BRR = brrtemp;
3032 }
3033 else
3034 {
3035 ret = HAL_ERROR;
3036 }
3037 }
3038 else
3039 {
3040 switch (clocksource)
3041 {
3042 case UART_CLOCKSOURCE_PCLK1:
3043 usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate, huart->Init.ClockPrescaler));
3044 break;
3045 case UART_CLOCKSOURCE_HSI:
3046 usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HSI_VALUE, huart->Init.BaudRate, huart->Init.ClockPrescaler));
3047 break;
3048 case UART_CLOCKSOURCE_SYSCLK:
3049 usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetSysClockFreq(), huart->Init.BaudRate, huart->Init.ClockPrescaler));
3050 break;
3051 case UART_CLOCKSOURCE_LSE:
3052 usartdiv = (uint16_t)(UART_DIV_SAMPLING16((uint32_t)LSE_VALUE, huart->Init.BaudRate, huart->Init.ClockPrescaler));
3053 break;
3054 default:
3055 ret = HAL_ERROR;
3056 break;
3057 }
3058
3059 /* USARTDIV must be greater than or equal to 0d16 */
3060 if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
3061 {
3062 huart->Instance->BRR = usartdiv;
3063 }
3064 else
3065 {
3066 ret = HAL_ERROR;
3067 }
3068 }
3069
3070 /* Initialize the number of data to process during RX/TX ISR execution */
3071 huart->NbTxDataToProcess = 1;
3072 huart->NbRxDataToProcess = 1;
3073
3074 /* Clear ISR function pointers */
3075 huart->RxISR = NULL;
3076 huart->TxISR = NULL;
3077
3078 return ret;
3079}
3080
3081/**
3082 * @brief Configure the UART peripheral advanced features.
3083 * @param huart UART handle.
3084 * @retval None
3085 */
3086void UART_AdvFeatureConfig(UART_HandleTypeDef *huart)
3087{
3088 /* Check whether the set of advanced features to configure is properly set */
3089 assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit));
3090
3091 /* if required, configure TX pin active level inversion */
3092 if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT))
3093 {
3094 assert_param(IS_UART_ADVFEATURE_TXINV(huart->AdvancedInit.TxPinLevelInvert));
3095 MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert);
3096 }
3097
3098 /* if required, configure RX pin active level inversion */
3099 if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXINVERT_INIT))
3100 {
3101 assert_param(IS_UART_ADVFEATURE_RXINV(huart->AdvancedInit.RxPinLevelInvert));
3102 MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert);
3103 }
3104
3105 /* if required, configure data inversion */
3106 if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DATAINVERT_INIT))
3107 {
3108 assert_param(IS_UART_ADVFEATURE_DATAINV(huart->AdvancedInit.DataInvert));
3109 MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert);
3110 }
3111
3112 /* if required, configure RX/TX pins swap */
3113 if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT))
3114 {
3115 assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap));
3116 MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap);
3117 }
3118
3119 /* if required, configure RX overrun detection disabling */
3120 if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT))
3121 {
3122 assert_param(IS_UART_OVERRUN(huart->AdvancedInit.OverrunDisable));
3123 MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable);
3124 }
3125
3126 /* if required, configure DMA disabling on reception error */
3127 if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DMADISABLEONERROR_INIT))
3128 {
3129 assert_param(IS_UART_ADVFEATURE_DMAONRXERROR(huart->AdvancedInit.DMADisableonRxError));
3130 MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError);
3131 }
3132
3133 /* if required, configure auto Baud rate detection scheme */
3134 if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_AUTOBAUDRATE_INIT))
3135 {
3136 assert_param(IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(huart->Instance));
3137 assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATE(huart->AdvancedInit.AutoBaudRateEnable));
3138 MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable);
3139 /* set auto Baudrate detection parameters if detection is enabled */
3140 if (huart->AdvancedInit.AutoBaudRateEnable == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)
3141 {
3142 assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(huart->AdvancedInit.AutoBaudRateMode));
3143 MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode);
3144 }
3145 }
3146
3147 /* if required, configure MSB first on communication line */
3148 if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_MSBFIRST_INIT))
3149 {
3150 assert_param(IS_UART_ADVFEATURE_MSBFIRST(huart->AdvancedInit.MSBFirst));
3151 MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst);
3152 }
3153}
3154
3155/**
3156 * @brief Check the UART Idle State.
3157 * @param huart UART handle.
3158 * @retval HAL status
3159 */
3160HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart)
3161{
3162 uint32_t tickstart;
3163
3164 /* Initialize the UART ErrorCode */
3165 huart->ErrorCode = HAL_UART_ERROR_NONE;
3166
3167 /* Init tickstart for timeout managment*/
3168 tickstart = HAL_GetTick();
3169
3170 /* Check if the Transmitter is enabled */
3171 if ((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE)
3172 {
3173 /* Wait until TEACK flag is set */
3174 if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
3175 {
3176 /* Timeout occurred */
3177 return HAL_TIMEOUT;
3178 }
3179 }
3180
3181 /* Check if the Receiver is enabled */
3182 if ((huart->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE)
3183 {
3184 /* Wait until REACK flag is set */
3185 if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
3186 {
3187 /* Timeout occurred */
3188 return HAL_TIMEOUT;
3189 }
3190 }
3191
3192 /* Initialize the UART State */
3193 huart->gState = HAL_UART_STATE_READY;
3194 huart->RxState = HAL_UART_STATE_READY;
3195
3196 /* Process Unlocked */
3197 __HAL_UNLOCK(huart);
3198
3199 return HAL_OK;
3200}
3201
3202/**
3203 * @brief Handle UART Communication Timeout.
3204 * @param huart UART handle.
3205 * @param Flag Specifies the UART flag to check
3206 * @param Status Flag status (SET or RESET)
3207 * @param Tickstart Tick start value
3208 * @param Timeout Timeout duration
3209 * @retval HAL status
3210 */
3211HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout)
3212{
3213 /* Wait until flag is set */
3214 while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
3215 {
3216 /* Check for the Timeout */
3217 if (Timeout != HAL_MAX_DELAY)
3218 {
3219 if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
3220 {
3221 /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
3222 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | USART_CR1_TXEIE_TXFNFIE));
3223 CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
3224
3225 huart->gState = HAL_UART_STATE_READY;
3226 huart->RxState = HAL_UART_STATE_READY;
3227
3228 /* Process Unlocked */
3229 __HAL_UNLOCK(huart);
3230
3231 return HAL_TIMEOUT;
3232 }
3233 }
3234 }
3235 return HAL_OK;
3236}
3237
3238
3239/**
3240 * @brief End ongoing Tx transfer on UART peripheral (following error detection or Transmit completion).
3241 * @param huart UART handle.
3242 * @retval None
3243 */
3244static void UART_EndTxTransfer(UART_HandleTypeDef *huart)
3245{
3246 /* Disable TXEIE, TCIE, TXFT interrupts */
3247 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE_TXFNFIE | USART_CR1_TCIE));
3248 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_TXFTIE));
3249
3250 /* At end of Tx process, restore huart->gState to Ready */
3251 huart->gState = HAL_UART_STATE_READY;
3252}
3253
3254
3255/**
3256 * @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion).
3257 * @param huart UART handle.
3258 * @retval None
3259 */
3260static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
3261{
3262 /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
3263 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
3264 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
3265
3266 /* At end of Rx process, restore huart->RxState to Ready */
3267 huart->RxState = HAL_UART_STATE_READY;
3268
3269 /* Reset RxIsr function pointer */
3270 huart->RxISR = NULL;
3271}
3272
3273
3274/**
3275 * @brief DMA UART transmit process complete callback.
3276 * @param hdma DMA handle.
3277 * @retval None
3278 */
3279static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma)
3280{
3281 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3282
3283 /* DMA Normal mode */
3284 if (HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC))
3285 {
3286 huart->TxXferCount = 0U;
3287
3288 /* Disable the DMA transfer for transmit request by resetting the DMAT bit
3289 in the UART CR3 register */
3290 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
3291
3292 /* Enable the UART Transmit Complete Interrupt */
3293 SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
3294 }
3295 /* DMA Circular mode */
3296 else
3297 {
3298#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3299 /*Call registered Tx complete callback*/
3300 huart->TxCpltCallback(huart);
3301#else
3302 /*Call legacy weak Tx complete callback*/
3303 HAL_UART_TxCpltCallback(huart);
3304#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3305 }
3306}
3307
3308/**
3309 * @brief DMA UART transmit process half complete callback.
3310 * @param hdma DMA handle.
3311 * @retval None
3312 */
3313static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
3314{
3315 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3316
3317#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3318 /*Call registered Tx Half complete callback*/
3319 huart->TxHalfCpltCallback(huart);
3320#else
3321 /*Call legacy weak Tx Half complete callback*/
3322 HAL_UART_TxHalfCpltCallback(huart);
3323#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3324}
3325
3326/**
3327 * @brief DMA UART receive process complete callback.
3328 * @param hdma DMA handle.
3329 * @retval None
3330 */
3331static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
3332{
3333 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3334
3335 /* DMA Normal mode */
3336 if (HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC))
3337 {
3338 huart->RxXferCount = 0U;
3339
3340 /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
3341 CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
3342 CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
3343
3344 /* Disable the DMA transfer for the receiver request by resetting the DMAR bit
3345 in the UART CR3 register */
3346 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
3347
3348 /* At end of Rx process, restore huart->RxState to Ready */
3349 huart->RxState = HAL_UART_STATE_READY;
3350 }
3351
3352#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3353 /*Call registered Rx complete callback*/
3354 huart->RxCpltCallback(huart);
3355#else
3356 /*Call legacy weak Rx complete callback*/
3357 HAL_UART_RxCpltCallback(huart);
3358#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3359}
3360
3361/**
3362 * @brief DMA UART receive process half complete callback.
3363 * @param hdma DMA handle.
3364 * @retval None
3365 */
3366static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
3367{
3368 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3369
3370#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3371 /*Call registered Rx Half complete callback*/
3372 huart->RxHalfCpltCallback(huart);
3373#else
3374 /*Call legacy weak Rx Half complete callback*/
3375 HAL_UART_RxHalfCpltCallback(huart);
3376#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3377}
3378
3379/**
3380 * @brief DMA UART communication error callback.
3381 * @param hdma DMA handle.
3382 * @retval None
3383 */
3384static void UART_DMAError(DMA_HandleTypeDef *hdma)
3385{
3386 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3387
3388 const HAL_UART_StateTypeDef gstate = huart->gState;
3389 const HAL_UART_StateTypeDef rxstate = huart->RxState;
3390
3391 /* Stop UART DMA Tx request if ongoing */
3392 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) &&
3393 (gstate == HAL_UART_STATE_BUSY_TX))
3394 {
3395 huart->TxXferCount = 0U;
3396 UART_EndTxTransfer(huart);
3397 }
3398
3399 /* Stop UART DMA Rx request if ongoing */
3400 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) &&
3401 (rxstate == HAL_UART_STATE_BUSY_RX))
3402 {
3403 huart->RxXferCount = 0U;
3404 UART_EndRxTransfer(huart);
3405 }
3406
3407 huart->ErrorCode |= HAL_UART_ERROR_DMA;
3408
3409#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3410 /*Call registered error callback*/
3411 huart->ErrorCallback(huart);
3412#else
3413 /*Call legacy weak error callback*/
3414 HAL_UART_ErrorCallback(huart);
3415#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3416}
3417
3418/**
3419 * @brief DMA UART communication abort callback, when initiated by HAL services on Error
3420 * (To be called at end of DMA Abort procedure following error occurrence).
3421 * @param hdma DMA handle.
3422 * @retval None
3423 */
3424static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma)
3425{
3426 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3427 huart->RxXferCount = 0U;
3428 huart->TxXferCount = 0U;
3429
3430#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3431 /*Call registered error callback*/
3432 huart->ErrorCallback(huart);
3433#else
3434 /*Call legacy weak error callback*/
3435 HAL_UART_ErrorCallback(huart);
3436#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3437}
3438
3439/**
3440 * @brief DMA UART Tx communication abort callback, when initiated by user
3441 * (To be called at end of DMA Tx Abort procedure following user abort request).
3442 * @note When this callback is executed, User Abort complete call back is called only if no
3443 * Abort still ongoing for Rx DMA Handle.
3444 * @param hdma DMA handle.
3445 * @retval None
3446 */
3447static void UART_DMATxAbortCallback(DMA_HandleTypeDef *hdma)
3448{
3449 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3450
3451 huart->hdmatx->XferAbortCallback = NULL;
3452
3453 /* Check if an Abort process is still ongoing */
3454 if (huart->hdmarx != NULL)
3455 {
3456 if (huart->hdmarx->XferAbortCallback != NULL)
3457 {
3458 return;
3459 }
3460 }
3461
3462 /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
3463 huart->TxXferCount = 0U;
3464 huart->RxXferCount = 0U;
3465
3466 /* Reset errorCode */
3467 huart->ErrorCode = HAL_UART_ERROR_NONE;
3468
3469 /* Clear the Error flags in the ICR register */
3470 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
3471
3472 /* Flush the whole TX FIFO (if needed) */
3473 if (huart->FifoMode == UART_FIFOMODE_ENABLE)
3474 {
3475 __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST);
3476 }
3477
3478 /* Restore huart->gState and huart->RxState to Ready */
3479 huart->gState = HAL_UART_STATE_READY;
3480 huart->RxState = HAL_UART_STATE_READY;
3481
3482 /* Call user Abort complete callback */
3483#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3484 /* Call registered Abort complete callback */
3485 huart->AbortCpltCallback(huart);
3486#else
3487 /* Call legacy weak Abort complete callback */
3488 HAL_UART_AbortCpltCallback(huart);
3489#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3490}
3491
3492
3493/**
3494 * @brief DMA UART Rx communication abort callback, when initiated by user
3495 * (To be called at end of DMA Rx Abort procedure following user abort request).
3496 * @note When this callback is executed, User Abort complete call back is called only if no
3497 * Abort still ongoing for Tx DMA Handle.
3498 * @param hdma DMA handle.
3499 * @retval None
3500 */
3501static void UART_DMARxAbortCallback(DMA_HandleTypeDef *hdma)
3502{
3503 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3504
3505 huart->hdmarx->XferAbortCallback = NULL;
3506
3507 /* Check if an Abort process is still ongoing */
3508 if (huart->hdmatx != NULL)
3509 {
3510 if (huart->hdmatx->XferAbortCallback != NULL)
3511 {
3512 return;
3513 }
3514 }
3515
3516 /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
3517 huart->TxXferCount = 0U;
3518 huart->RxXferCount = 0U;
3519
3520 /* Reset errorCode */
3521 huart->ErrorCode = HAL_UART_ERROR_NONE;
3522
3523 /* Clear the Error flags in the ICR register */
3524 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
3525
3526 /* Discard the received data */
3527 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
3528
3529 /* Restore huart->gState and huart->RxState to Ready */
3530 huart->gState = HAL_UART_STATE_READY;
3531 huart->RxState = HAL_UART_STATE_READY;
3532
3533 /* Call user Abort complete callback */
3534#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3535 /* Call registered Abort complete callback */
3536 huart->AbortCpltCallback(huart);
3537#else
3538 /* Call legacy weak Abort complete callback */
3539 HAL_UART_AbortCpltCallback(huart);
3540#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3541}
3542
3543
3544/**
3545 * @brief DMA UART Tx communication abort callback, when initiated by user by a call to
3546 * HAL_UART_AbortTransmit_IT API (Abort only Tx transfer)
3547 * (This callback is executed at end of DMA Tx Abort procedure following user abort request,
3548 * and leads to user Tx Abort Complete callback execution).
3549 * @param hdma DMA handle.
3550 * @retval None
3551 */
3552static void UART_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma)
3553{
3554 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3555
3556 huart->TxXferCount = 0U;
3557
3558 /* Flush the whole TX FIFO (if needed) */
3559 if (huart->FifoMode == UART_FIFOMODE_ENABLE)
3560 {
3561 __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST);
3562 }
3563
3564 /* Restore huart->gState to Ready */
3565 huart->gState = HAL_UART_STATE_READY;
3566
3567 /* Call user Abort complete callback */
3568#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3569 /* Call registered Abort Transmit Complete Callback */
3570 huart->AbortTransmitCpltCallback(huart);
3571#else
3572 /* Call legacy weak Abort Transmit Complete Callback */
3573 HAL_UART_AbortTransmitCpltCallback(huart);
3574#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3575}
3576
3577/**
3578 * @brief DMA UART Rx communication abort callback, when initiated by user by a call to
3579 * HAL_UART_AbortReceive_IT API (Abort only Rx transfer)
3580 * (This callback is executed at end of DMA Rx Abort procedure following user abort request,
3581 * and leads to user Rx Abort Complete callback execution).
3582 * @param hdma DMA handle.
3583 * @retval None
3584 */
3585static void UART_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma)
3586{
3587 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
3588
3589 huart->RxXferCount = 0U;
3590
3591 /* Clear the Error flags in the ICR register */
3592 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
3593
3594 /* Discard the received data */
3595 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
3596
3597 /* Restore huart->RxState to Ready */
3598 huart->RxState = HAL_UART_STATE_READY;
3599
3600 /* Call user Abort complete callback */
3601#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3602 /* Call registered Abort Receive Complete Callback */
3603 huart->AbortReceiveCpltCallback(huart);
3604#else
3605 /* Call legacy weak Abort Receive Complete Callback */
3606 HAL_UART_AbortReceiveCpltCallback(huart);
3607#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3608}
3609
3610/**
3611 * @brief TX interrrupt handler for 7 or 8 bits data word length .
3612 * @note Function is called under interruption only, once
3613 * interruptions have been enabled by HAL_UART_Transmit_IT().
3614 * @param huart UART handle.
3615 * @retval None
3616 */
3617static void UART_TxISR_8BIT(UART_HandleTypeDef *huart)
3618{
3619 /* Check that a Tx process is ongoing */
3620 if (huart->gState == HAL_UART_STATE_BUSY_TX)
3621 {
3622 if (huart->TxXferCount == 0U)
3623 {
3624 /* Disable the UART Transmit Data Register Empty Interrupt */
3625 CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE);
3626
3627 /* Enable the UART Transmit Complete Interrupt */
3628 SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
3629 }
3630 else
3631 {
3632 huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr & (uint8_t)0xFF);
3633 huart->pTxBuffPtr++;
3634 huart->TxXferCount--;
3635 }
3636 }
3637}
3638
3639/**
3640 * @brief TX interrrupt handler for 9 bits data word length.
3641 * @note Function is called under interruption only, once
3642 * interruptions have been enabled by HAL_UART_Transmit_IT().
3643 * @param huart UART handle.
3644 * @retval None
3645 */
3646static void UART_TxISR_16BIT(UART_HandleTypeDef *huart)
3647{
3648 uint16_t *tmp;
3649
3650 /* Check that a Tx process is ongoing */
3651 if (huart->gState == HAL_UART_STATE_BUSY_TX)
3652 {
3653 if (huart->TxXferCount == 0U)
3654 {
3655 /* Disable the UART Transmit Data Register Empty Interrupt */
3656 CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE);
3657
3658 /* Enable the UART Transmit Complete Interrupt */
3659 SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
3660 }
3661 else
3662 {
3663 tmp = (uint16_t *) huart->pTxBuffPtr;
3664 huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL);
3665 huart->pTxBuffPtr += 2U;
3666 huart->TxXferCount--;
3667 }
3668 }
3669}
3670
3671/**
3672 * @brief TX interrrupt handler for 7 or 8 bits data word length and FIFO mode is enabled.
3673 * @note Function is called under interruption only, once
3674 * interruptions have been enabled by HAL_UART_Transmit_IT().
3675 * @param huart UART handle.
3676 * @retval None
3677 */
3678static void UART_TxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart)
3679{
3680 uint16_t nb_tx_data;
3681
3682 /* Check that a Tx process is ongoing */
3683 if (huart->gState == HAL_UART_STATE_BUSY_TX)
3684 {
3685 for (nb_tx_data = huart->NbTxDataToProcess ; nb_tx_data > 0U ; nb_tx_data--)
3686 {
3687 if (huart->TxXferCount == 0U)
3688 {
3689 /* Disable the TX FIFO threshold interrupt */
3690 CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
3691
3692 /* Enable the UART Transmit Complete Interrupt */
3693 SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
3694
3695 break; /* force exit loop */
3696 }
3697 else if (READ_BIT(huart->Instance->ISR, USART_ISR_TXE_TXFNF) != 0U)
3698 {
3699 huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr & (uint8_t)0xFF);
3700 huart->pTxBuffPtr++;
3701 huart->TxXferCount--;
3702 }
3703 else
3704 {
3705 /* Nothing to do */
3706 }
3707 }
3708 }
3709}
3710
3711/**
3712 * @brief TX interrrupt handler for 9 bits data word length and FIFO mode is enabled.
3713 * @note Function is called under interruption only, once
3714 * interruptions have been enabled by HAL_UART_Transmit_IT().
3715 * @param huart UART handle.
3716 * @retval None
3717 */
3718static void UART_TxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart)
3719{
3720 uint16_t *tmp;
3721 uint16_t nb_tx_data;
3722
3723 /* Check that a Tx process is ongoing */
3724 if (huart->gState == HAL_UART_STATE_BUSY_TX)
3725 {
3726 for (nb_tx_data = huart->NbTxDataToProcess ; nb_tx_data > 0U ; nb_tx_data--)
3727 {
3728 if (huart->TxXferCount == 0U)
3729 {
3730 /* Disable the TX FIFO threshold interrupt */
3731 CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
3732
3733 /* Enable the UART Transmit Complete Interrupt */
3734 SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
3735
3736 break; /* force exit loop */
3737 }
3738 else if (READ_BIT(huart->Instance->ISR, USART_ISR_TXE_TXFNF) != 0U)
3739 {
3740 tmp = (uint16_t *) huart->pTxBuffPtr;
3741 huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL);
3742 huart->pTxBuffPtr += 2U;
3743 huart->TxXferCount--;
3744 }
3745 else
3746 {
3747 /* Nothing to do */
3748 }
3749 }
3750 }
3751}
3752
3753/**
3754 * @brief Wrap up transmission in non-blocking mode.
3755 * @param huart pointer to a UART_HandleTypeDef structure that contains
3756 * the configuration information for the specified UART module.
3757 * @retval None
3758 */
3759static void UART_EndTransmit_IT(UART_HandleTypeDef *huart)
3760{
3761 /* Disable the UART Transmit Complete Interrupt */
3762 CLEAR_BIT(huart->Instance->CR1, USART_CR1_TCIE);
3763
3764 /* Tx process is ended, restore huart->gState to Ready */
3765 huart->gState = HAL_UART_STATE_READY;
3766
3767 /* Cleat TxISR function pointer */
3768 huart->TxISR = NULL;
3769
3770#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3771 /*Call registered Tx complete callback*/
3772 huart->TxCpltCallback(huart);
3773#else
3774 /*Call legacy weak Tx complete callback*/
3775 HAL_UART_TxCpltCallback(huart);
3776#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3777}
3778
3779/**
3780 * @brief RX interrrupt handler for 7 or 8 bits data word length .
3781 * @param huart UART handle.
3782 * @retval None
3783 */
3784static void UART_RxISR_8BIT(UART_HandleTypeDef *huart)
3785{
3786 uint16_t uhMask = huart->Mask;
3787 uint16_t uhdata;
3788
3789 /* Check that a Rx process is ongoing */
3790 if (huart->RxState == HAL_UART_STATE_BUSY_RX)
3791 {
3792 uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
3793 *huart->pRxBuffPtr = (uint8_t)(uhdata & (uint8_t)uhMask);
3794 huart->pRxBuffPtr++;
3795 huart->RxXferCount--;
3796
3797 if (huart->RxXferCount == 0U)
3798 {
3799 /* Disable the UART Parity Error Interrupt and RXNE interrupts */
3800 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
3801
3802 /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
3803 CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
3804
3805 /* Rx process is completed, restore huart->RxState to Ready */
3806 huart->RxState = HAL_UART_STATE_READY;
3807
3808 /* Clear RxISR function pointer */
3809 huart->RxISR = NULL;
3810
3811#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3812 /*Call registered Rx complete callback*/
3813 huart->RxCpltCallback(huart);
3814#else
3815 /*Call legacy weak Rx complete callback*/
3816 HAL_UART_RxCpltCallback(huart);
3817#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3818 }
3819 }
3820 else
3821 {
3822 /* Clear RXNE interrupt flag */
3823 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
3824 }
3825}
3826
3827/**
3828 * @brief RX interrrupt handler for 9 bits data word length .
3829 * @note Function is called under interruption only, once
3830 * interruptions have been enabled by HAL_UART_Receive_IT()
3831 * @param huart UART handle.
3832 * @retval None
3833 */
3834static void UART_RxISR_16BIT(UART_HandleTypeDef *huart)
3835{
3836 uint16_t *tmp;
3837 uint16_t uhMask = huart->Mask;
3838 uint16_t uhdata;
3839
3840 /* Check that a Rx process is ongoing */
3841 if (huart->RxState == HAL_UART_STATE_BUSY_RX)
3842 {
3843 uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
3844 tmp = (uint16_t *) huart->pRxBuffPtr ;
3845 *tmp = (uint16_t)(uhdata & uhMask);
3846 huart->pRxBuffPtr += 2U;
3847 huart->RxXferCount--;
3848
3849 if (huart->RxXferCount == 0U)
3850 {
3851 /* Disable the UART Parity Error Interrupt and RXNE interrupt*/
3852 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
3853
3854 /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
3855 CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
3856
3857 /* Rx process is completed, restore huart->RxState to Ready */
3858 huart->RxState = HAL_UART_STATE_READY;
3859
3860 /* Clear RxISR function pointer */
3861 huart->RxISR = NULL;
3862
3863#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3864 /*Call registered Rx complete callback*/
3865 huart->RxCpltCallback(huart);
3866#else
3867 /*Call legacy weak Rx complete callback*/
3868 HAL_UART_RxCpltCallback(huart);
3869#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3870 }
3871 }
3872 else
3873 {
3874 /* Clear RXNE interrupt flag */
3875 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
3876 }
3877}
3878
3879/**
3880 * @brief RX interrrupt handler for 7 or 8 bits data word length and FIFO mode is enabled.
3881 * @note Function is called under interruption only, once
3882 * interruptions have been enabled by HAL_UART_Receive_IT()
3883 * @param huart UART handle.
3884 * @retval None
3885 */
3886static void UART_RxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart)
3887{
3888 uint16_t uhMask = huart->Mask;
3889 uint16_t uhdata;
3890 uint16_t nb_rx_data;
3891 uint16_t rxdatacount;
3892
3893 /* Check that a Rx process is ongoing */
3894 if (huart->RxState == HAL_UART_STATE_BUSY_RX)
3895 {
3896 for (nb_rx_data = huart->NbRxDataToProcess ; nb_rx_data > 0U ; nb_rx_data--)
3897 {
3898 uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
3899 *huart->pRxBuffPtr = (uint8_t)(uhdata & (uint8_t)uhMask);
3900 huart->pRxBuffPtr++;
3901 huart->RxXferCount--;
3902
3903 if (huart->RxXferCount == 0U)
3904 {
3905 /* Disable the UART Parity Error Interrupt and RXFT interrupt*/
3906 CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
3907
3908 /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) and RX FIFO Threshold interrupt */
3909 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
3910
3911 /* Rx process is completed, restore huart->RxState to Ready */
3912 huart->RxState = HAL_UART_STATE_READY;
3913
3914 /* Clear RxISR function pointer */
3915 huart->RxISR = NULL;
3916
3917#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3918 /*Call registered Rx complete callback*/
3919 huart->RxCpltCallback(huart);
3920#else
3921 /*Call legacy weak Rx complete callback*/
3922 HAL_UART_RxCpltCallback(huart);
3923#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3924 }
3925 }
3926
3927 /* When remaining number of bytes to receive is less than the RX FIFO
3928 threshold, next incoming frames are processed as if FIFO mode was
3929 disabled (i.e. one interrupt per received frame).
3930 */
3931 rxdatacount = huart->RxXferCount;
3932 if ((rxdatacount != 0U) && (rxdatacount < huart->NbRxDataToProcess))
3933 {
3934 /* Disable the UART RXFT interrupt*/
3935 CLEAR_BIT(huart->Instance->CR3, USART_CR3_RXFTIE);
3936
3937 /* Update the RxISR function pointer */
3938 huart->RxISR = UART_RxISR_8BIT;
3939
3940 /* Enable the UART Data Register Not Empty interrupt */
3941 SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE);
3942 }
3943 }
3944 else
3945 {
3946 /* Clear RXNE interrupt flag */
3947 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
3948 }
3949}
3950
3951/**
3952 * @brief RX interrrupt handler for 9 bits data word length and FIFO mode is enabled.
3953 * @note Function is called under interruption only, once
3954 * interruptions have been enabled by HAL_UART_Receive_IT()
3955 * @param huart UART handle.
3956 * @retval None
3957 */
3958static void UART_RxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart)
3959{
3960 uint16_t *tmp;
3961 uint16_t uhMask = huart->Mask;
3962 uint16_t uhdata;
3963 uint16_t nb_rx_data;
3964 uint16_t rxdatacount;
3965
3966 /* Check that a Rx process is ongoing */
3967 if (huart->RxState == HAL_UART_STATE_BUSY_RX)
3968 {
3969 for (nb_rx_data = huart->NbRxDataToProcess ; nb_rx_data > 0U ; nb_rx_data--)
3970 {
3971 uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
3972 tmp = (uint16_t *) huart->pRxBuffPtr ;
3973 *tmp = (uint16_t)(uhdata & uhMask);
3974 huart->pRxBuffPtr += 2U;
3975 huart->RxXferCount--;
3976
3977 if (huart->RxXferCount == 0U)
3978 {
3979 /* Disable the UART Parity Error Interrupt and RXFT interrupt*/
3980 CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
3981
3982 /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) and RX FIFO Threshold interrupt */
3983 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
3984
3985 /* Rx process is completed, restore huart->RxState to Ready */
3986 huart->RxState = HAL_UART_STATE_READY;
3987
3988 /* Clear RxISR function pointer */
3989 huart->RxISR = NULL;
3990
3991#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3992 /*Call registered Rx complete callback*/
3993 huart->RxCpltCallback(huart);
3994#else
3995 /*Call legacy weak Rx complete callback*/
3996 HAL_UART_RxCpltCallback(huart);
3997#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3998 }
3999 }
4000
4001 /* When remaining number of bytes to receive is less than the RX FIFO
4002 threshold, next incoming frames are processed as if FIFO mode was
4003 disabled (i.e. one interrupt per received frame).
4004 */
4005 rxdatacount = huart->RxXferCount;
4006 if ((rxdatacount != 0U) && (rxdatacount < huart->NbRxDataToProcess))
4007 {
4008 /* Disable the UART RXFT interrupt*/
4009 CLEAR_BIT(huart->Instance->CR3, USART_CR3_RXFTIE);
4010
4011 /* Update the RxISR function pointer */
4012 huart->RxISR = UART_RxISR_16BIT;
4013
4014 /* Enable the UART Data Register Not Empty interrupt */
4015 SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE);
4016 }
4017 }
4018 else
4019 {
4020 /* Clear RXNE interrupt flag */
4021 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
4022 }
4023}
4024
4025/**
4026 * @}
4027 */
4028
4029#endif /* HAL_UART_MODULE_ENABLED */
4030/**
4031 * @}
4032 */
4033
4034/**
4035 * @}
4036 */
4037
4038/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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