| 1 | /**
|
|---|
| 2 | ******************************************************************************
|
|---|
| 3 | * @file stm32g0xx_hal_i2s.c
|
|---|
| 4 | * @author MCD Application Team
|
|---|
| 5 | * @brief I2S HAL module driver.
|
|---|
| 6 | * This file provides firmware functions to manage the following
|
|---|
| 7 | * functionalities of the Integrated Interchip Sound (I2S) peripheral:
|
|---|
| 8 | * + Initialization and de-initialization functions
|
|---|
| 9 | * + IO operation functions
|
|---|
| 10 | * + Peripheral State and Errors functions
|
|---|
| 11 | @verbatim
|
|---|
| 12 | ===============================================================================
|
|---|
| 13 | ##### How to use this driver #####
|
|---|
| 14 | ===============================================================================
|
|---|
| 15 | [..]
|
|---|
| 16 | The I2S HAL driver can be used as follow:
|
|---|
| 17 |
|
|---|
| 18 | (#) Declare a I2S_HandleTypeDef handle structure.
|
|---|
| 19 | (#) Initialize the I2S low level resources by implement the HAL_I2S_MspInit() API:
|
|---|
| 20 | (##) Enable the SPIx interface clock.
|
|---|
| 21 | (##) I2S pins configuration:
|
|---|
| 22 | (+++) Enable the clock for the I2S GPIOs.
|
|---|
| 23 | (+++) Configure these I2S pins as alternate function pull-up.
|
|---|
| 24 | (##) NVIC configuration if you need to use interrupt process (HAL_I2S_Transmit_IT()
|
|---|
| 25 | and HAL_I2S_Receive_IT() APIs).
|
|---|
| 26 | (+++) Configure the I2Sx interrupt priority.
|
|---|
| 27 | (+++) Enable the NVIC I2S IRQ handle.
|
|---|
| 28 | (##) DMA Configuration if you need to use DMA process (HAL_I2S_Transmit_DMA()
|
|---|
| 29 | and HAL_I2S_Receive_DMA() APIs:
|
|---|
| 30 | (+++) Declare a DMA handle structure for the Tx/Rx Stream/Channel.
|
|---|
| 31 | (+++) Enable the DMAx interface clock.
|
|---|
| 32 | (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters.
|
|---|
| 33 | (+++) Configure the DMA Tx/Rx Stream/Channel.
|
|---|
| 34 | (+++) Associate the initialized DMA handle to the I2S DMA Tx/Rx handle.
|
|---|
| 35 | (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the
|
|---|
| 36 | DMA Tx/Rx Stream/Channel.
|
|---|
| 37 |
|
|---|
| 38 | (#) Program the Mode, Standard, Data Format, MCLK Output, Audio frequency and Polarity
|
|---|
| 39 | using HAL_I2S_Init() function.
|
|---|
| 40 |
|
|---|
| 41 | -@- The specific I2S interrupts (Transmission complete interrupt,
|
|---|
| 42 | RXNE interrupt and Error Interrupts) will be managed using the macros
|
|---|
| 43 | __HAL_I2S_ENABLE_IT() and __HAL_I2S_DISABLE_IT() inside the transmit and receive process.
|
|---|
| 44 | -@- Make sure that either:
|
|---|
| 45 | (+@) SYSCLK is configured or
|
|---|
| 46 | (+@) PLLPCLK output is configured or
|
|---|
| 47 | (+@) HSI is enabled or
|
|---|
| 48 | (+@) External clock source is configured after setting correctly
|
|---|
| 49 | the define constant EXTERNAL_I2S1_CLOCK_VALUE in the stm32g0xx_hal_conf.h file.
|
|---|
| 50 |
|
|---|
| 51 | (#) Three mode of operations are available within this driver :
|
|---|
| 52 |
|
|---|
| 53 | *** Polling mode IO operation ***
|
|---|
| 54 | =================================
|
|---|
| 55 | [..]
|
|---|
| 56 | (+) Send an amount of data in blocking mode using HAL_I2S_Transmit()
|
|---|
| 57 | (+) Receive an amount of data in blocking mode using HAL_I2S_Receive()
|
|---|
| 58 |
|
|---|
| 59 | *** Interrupt mode IO operation ***
|
|---|
| 60 | ===================================
|
|---|
| 61 | [..]
|
|---|
| 62 | (+) Send an amount of data in non blocking mode using HAL_I2S_Transmit_IT()
|
|---|
| 63 | (+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can
|
|---|
| 64 | add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback
|
|---|
| 65 | (+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can
|
|---|
| 66 | add his own code by customization of function pointer HAL_I2S_TxCpltCallback
|
|---|
| 67 | (+) Receive an amount of data in non blocking mode using HAL_I2S_Receive_IT()
|
|---|
| 68 | (+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can
|
|---|
| 69 | add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback
|
|---|
| 70 | (+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can
|
|---|
| 71 | add his own code by customization of function pointer HAL_I2S_RxCpltCallback
|
|---|
| 72 | (+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can
|
|---|
| 73 | add his own code by customization of function pointer HAL_I2S_ErrorCallback
|
|---|
| 74 |
|
|---|
| 75 | *** DMA mode IO operation ***
|
|---|
| 76 | ==============================
|
|---|
| 77 | [..]
|
|---|
| 78 | (+) Send an amount of data in non blocking mode (DMA) using HAL_I2S_Transmit_DMA()
|
|---|
| 79 | (+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can
|
|---|
| 80 | add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback
|
|---|
| 81 | (+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can
|
|---|
| 82 | add his own code by customization of function pointer HAL_I2S_TxCpltCallback
|
|---|
| 83 | (+) Receive an amount of data in non blocking mode (DMA) using HAL_I2S_Receive_DMA()
|
|---|
| 84 | (+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can
|
|---|
| 85 | add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback
|
|---|
| 86 | (+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can
|
|---|
| 87 | add his own code by customization of function pointer HAL_I2S_RxCpltCallback
|
|---|
| 88 | (+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can
|
|---|
| 89 | add his own code by customization of function pointer HAL_I2S_ErrorCallback
|
|---|
| 90 | (+) Pause the DMA Transfer using HAL_I2S_DMAPause()
|
|---|
| 91 | (+) Resume the DMA Transfer using HAL_I2S_DMAResume()
|
|---|
| 92 | (+) Stop the DMA Transfer using HAL_I2S_DMAStop()
|
|---|
| 93 |
|
|---|
| 94 | *** I2S HAL driver macros list ***
|
|---|
| 95 | ===================================
|
|---|
| 96 | [..]
|
|---|
| 97 | Below the list of most used macros in I2S HAL driver.
|
|---|
| 98 |
|
|---|
| 99 | (+) __HAL_I2S_ENABLE: Enable the specified SPI peripheral (in I2S mode)
|
|---|
| 100 | (+) __HAL_I2S_DISABLE: Disable the specified SPI peripheral (in I2S mode)
|
|---|
| 101 | (+) __HAL_I2S_ENABLE_IT : Enable the specified I2S interrupts
|
|---|
| 102 | (+) __HAL_I2S_DISABLE_IT : Disable the specified I2S interrupts
|
|---|
| 103 | (+) __HAL_I2S_GET_FLAG: Check whether the specified I2S flag is set or not
|
|---|
| 104 |
|
|---|
| 105 | [..]
|
|---|
| 106 | (@) You can refer to the I2S HAL driver header file for more useful macros
|
|---|
| 107 |
|
|---|
| 108 | *** I2S HAL driver macros list ***
|
|---|
| 109 | ===================================
|
|---|
| 110 | [..]
|
|---|
| 111 | Callback registration:
|
|---|
| 112 |
|
|---|
| 113 | (#) The compilation flag USE_HAL_I2S_REGISTER_CALLBACKS when set to 1U
|
|---|
| 114 | allows the user to configure dynamically the driver callbacks.
|
|---|
| 115 | Use Functions HAL_I2S_RegisterCallback() to register an interrupt callback.
|
|---|
| 116 |
|
|---|
| 117 | Function HAL_I2S_RegisterCallback() allows to register following callbacks:
|
|---|
| 118 | (+) TxCpltCallback : I2S Tx Completed callback
|
|---|
| 119 | (+) RxCpltCallback : I2S Rx Completed callback
|
|---|
| 120 | (+) TxHalfCpltCallback : I2S Tx Half Completed callback
|
|---|
| 121 | (+) RxHalfCpltCallback : I2S Rx Half Completed callback
|
|---|
| 122 | (+) ErrorCallback : I2S Error callback
|
|---|
| 123 | (+) MspInitCallback : I2S Msp Init callback
|
|---|
| 124 | (+) MspDeInitCallback : I2S Msp DeInit callback
|
|---|
| 125 | This function takes as parameters the HAL peripheral handle, the Callback ID
|
|---|
| 126 | and a pointer to the user callback function.
|
|---|
| 127 |
|
|---|
| 128 |
|
|---|
| 129 | (#) Use function HAL_I2S_UnRegisterCallback to reset a callback to the default
|
|---|
| 130 | weak function.
|
|---|
| 131 | HAL_I2S_UnRegisterCallback takes as parameters the HAL peripheral handle,
|
|---|
| 132 | and the Callback ID.
|
|---|
| 133 | This function allows to reset following callbacks:
|
|---|
| 134 | (+) TxCpltCallback : I2S Tx Completed callback
|
|---|
| 135 | (+) RxCpltCallback : I2S Rx Completed callback
|
|---|
| 136 | (+) TxHalfCpltCallback : I2S Tx Half Completed callback
|
|---|
| 137 | (+) RxHalfCpltCallback : I2S Rx Half Completed callback
|
|---|
| 138 | (+) ErrorCallback : I2S Error callback
|
|---|
| 139 | (+) MspInitCallback : I2S Msp Init callback
|
|---|
| 140 | (+) MspDeInitCallback : I2S Msp DeInit callback
|
|---|
| 141 |
|
|---|
| 142 | By default, after the HAL_I2S_Init() and when the state is HAL_I2S_STATE_RESET
|
|---|
| 143 | all callbacks are set to the corresponding weak functions:
|
|---|
| 144 | examples HAL_I2S_MasterTxCpltCallback(), HAL_I2S_MasterRxCpltCallback().
|
|---|
| 145 | Exception done for MspInit and MspDeInit functions that are
|
|---|
| 146 | reset to the legacy weak functions in the HAL_I2S_Init()/ HAL_I2S_DeInit() only when
|
|---|
| 147 | these callbacks are null (not registered beforehand).
|
|---|
| 148 | If MspInit or MspDeInit are not null, the HAL_I2S_Init()/ HAL_I2S_DeInit()
|
|---|
| 149 | keep and use the user MspInit/MspDeInit callbacks (registered beforehand) whatever the state.
|
|---|
| 150 |
|
|---|
| 151 | Callbacks can be registered/unregistered in HAL_I2S_STATE_READY state only.
|
|---|
| 152 | Exception done MspInit/MspDeInit functions that can be registered/unregistered
|
|---|
| 153 | in HAL_I2S_STATE_READY or HAL_I2S_STATE_RESET state,
|
|---|
| 154 | thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
|
|---|
| 155 | Then, the user first registers the MspInit/MspDeInit user callbacks
|
|---|
| 156 | using HAL_I2S_RegisterCallback() before calling HAL_I2S_DeInit()
|
|---|
| 157 | or HAL_I2S_Init() function.
|
|---|
| 158 |
|
|---|
| 159 | When The compilation define USE_HAL_I2S_REGISTER_CALLBACKS is set to 0 or
|
|---|
| 160 | not defined, the callback registering feature is not available
|
|---|
| 161 | and weak (surcharged) callbacks are used.
|
|---|
| 162 |
|
|---|
| 163 | @endverbatim
|
|---|
| 164 | ******************************************************************************
|
|---|
| 165 | * @attention
|
|---|
| 166 | *
|
|---|
| 167 | * <h2><center>© Copyright (c) 2018 STMicroelectronics.
|
|---|
| 168 | * All rights reserved.</center></h2>
|
|---|
| 169 | *
|
|---|
| 170 | * This software component is licensed by ST under BSD 3-Clause license,
|
|---|
| 171 | * the "License"; You may not use this file except in compliance with the
|
|---|
| 172 | * License. You may obtain a copy of the License at:
|
|---|
| 173 | * opensource.org/licenses/BSD-3-Clause
|
|---|
| 174 | *
|
|---|
| 175 | ******************************************************************************
|
|---|
| 176 | */
|
|---|
| 177 |
|
|---|
| 178 | /* Includes ------------------------------------------------------------------*/
|
|---|
| 179 | #include "stm32g0xx_hal.h"
|
|---|
| 180 |
|
|---|
| 181 | #ifdef HAL_I2S_MODULE_ENABLED
|
|---|
| 182 |
|
|---|
| 183 | #if defined(SPI_I2S_SUPPORT)
|
|---|
| 184 | /** @addtogroup STM32G0xx_HAL_Driver
|
|---|
| 185 | * @{
|
|---|
| 186 | */
|
|---|
| 187 |
|
|---|
| 188 | /** @defgroup I2S I2S
|
|---|
| 189 | * @brief I2S HAL module driver
|
|---|
| 190 | * @{
|
|---|
| 191 | */
|
|---|
| 192 |
|
|---|
| 193 | /* Private typedef -----------------------------------------------------------*/
|
|---|
| 194 | /* Private define ------------------------------------------------------------*/
|
|---|
| 195 | /* Private macro -------------------------------------------------------------*/
|
|---|
| 196 | /* Private variables ---------------------------------------------------------*/
|
|---|
| 197 | /* Private function prototypes -----------------------------------------------*/
|
|---|
| 198 | /** @defgroup I2S_Private_Functions I2S Private Functions
|
|---|
| 199 | * @{
|
|---|
| 200 | */
|
|---|
| 201 | static void I2S_DMATxCplt(DMA_HandleTypeDef *hdma);
|
|---|
| 202 | static void I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
|
|---|
| 203 | static void I2S_DMARxCplt(DMA_HandleTypeDef *hdma);
|
|---|
| 204 | static void I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
|
|---|
| 205 | static void I2S_DMAError(DMA_HandleTypeDef *hdma);
|
|---|
| 206 | static void I2S_Transmit_IT(I2S_HandleTypeDef *hi2s);
|
|---|
| 207 | static void I2S_Receive_IT(I2S_HandleTypeDef *hi2s);
|
|---|
| 208 | static HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, FlagStatus State,
|
|---|
| 209 | uint32_t Timeout);
|
|---|
| 210 | /**
|
|---|
| 211 | * @}
|
|---|
| 212 | */
|
|---|
| 213 |
|
|---|
| 214 | /* Exported functions ---------------------------------------------------------*/
|
|---|
| 215 |
|
|---|
| 216 | /** @defgroup I2S_Exported_Functions I2S Exported Functions
|
|---|
| 217 | * @{
|
|---|
| 218 | */
|
|---|
| 219 |
|
|---|
| 220 | /** @defgroup I2S_Exported_Functions_Group1 Initialization and de-initialization functions
|
|---|
| 221 | * @brief Initialization and Configuration functions
|
|---|
| 222 | *
|
|---|
| 223 | @verbatim
|
|---|
| 224 | ===============================================================================
|
|---|
| 225 | ##### Initialization and de-initialization functions #####
|
|---|
| 226 | ===============================================================================
|
|---|
| 227 | [..] This subsection provides a set of functions allowing to initialize and
|
|---|
| 228 | de-initialize the I2Sx peripheral in simplex mode:
|
|---|
| 229 |
|
|---|
| 230 | (+) User must Implement HAL_I2S_MspInit() function in which he configures
|
|---|
| 231 | all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
|
|---|
| 232 |
|
|---|
| 233 | (+) Call the function HAL_I2S_Init() to configure the selected device with
|
|---|
| 234 | the selected configuration:
|
|---|
| 235 | (++) Mode
|
|---|
| 236 | (++) Standard
|
|---|
| 237 | (++) Data Format
|
|---|
| 238 | (++) MCLK Output
|
|---|
| 239 | (++) Audio frequency
|
|---|
| 240 | (++) Polarity
|
|---|
| 241 |
|
|---|
| 242 | (+) Call the function HAL_I2S_DeInit() to restore the default configuration
|
|---|
| 243 | of the selected I2Sx peripheral.
|
|---|
| 244 | @endverbatim
|
|---|
| 245 | * @{
|
|---|
| 246 | */
|
|---|
| 247 |
|
|---|
| 248 | /**
|
|---|
| 249 | * @brief Initializes the I2S according to the specified parameters
|
|---|
| 250 | * in the I2S_InitTypeDef and create the associated handle.
|
|---|
| 251 | * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
|
|---|
| 252 | * the configuration information for I2S module
|
|---|
| 253 | * @retval HAL status
|
|---|
| 254 | */
|
|---|
| 255 | HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s)
|
|---|
| 256 | {
|
|---|
| 257 | uint32_t i2sdiv;
|
|---|
| 258 | uint32_t i2sodd;
|
|---|
| 259 | uint32_t packetlength;
|
|---|
| 260 | uint32_t tmp;
|
|---|
| 261 | uint32_t i2sclk;
|
|---|
| 262 |
|
|---|
| 263 | /* Check the I2S handle allocation */
|
|---|
| 264 | if (hi2s == NULL)
|
|---|
| 265 | {
|
|---|
| 266 | return HAL_ERROR;
|
|---|
| 267 | }
|
|---|
| 268 |
|
|---|
| 269 | /* Check the I2S parameters */
|
|---|
| 270 | assert_param(IS_I2S_ALL_INSTANCE(hi2s->Instance));
|
|---|
| 271 | assert_param(IS_I2S_MODE(hi2s->Init.Mode));
|
|---|
| 272 | assert_param(IS_I2S_STANDARD(hi2s->Init.Standard));
|
|---|
| 273 | assert_param(IS_I2S_DATA_FORMAT(hi2s->Init.DataFormat));
|
|---|
| 274 | assert_param(IS_I2S_MCLK_OUTPUT(hi2s->Init.MCLKOutput));
|
|---|
| 275 | assert_param(IS_I2S_AUDIO_FREQ(hi2s->Init.AudioFreq));
|
|---|
| 276 | assert_param(IS_I2S_CPOL(hi2s->Init.CPOL));
|
|---|
| 277 |
|
|---|
| 278 | if (hi2s->State == HAL_I2S_STATE_RESET)
|
|---|
| 279 | {
|
|---|
| 280 | /* Allocate lock resource and initialize it */
|
|---|
| 281 | hi2s->Lock = HAL_UNLOCKED;
|
|---|
| 282 |
|
|---|
| 283 | #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
|
|---|
| 284 | /* Init the I2S Callback settings */
|
|---|
| 285 | hi2s->TxCpltCallback = HAL_I2S_TxCpltCallback; /* Legacy weak TxCpltCallback */
|
|---|
| 286 | hi2s->RxCpltCallback = HAL_I2S_RxCpltCallback; /* Legacy weak RxCpltCallback */
|
|---|
| 287 | hi2s->TxHalfCpltCallback = HAL_I2S_TxHalfCpltCallback; /* Legacy weak TxHalfCpltCallback */
|
|---|
| 288 | hi2s->RxHalfCpltCallback = HAL_I2S_RxHalfCpltCallback; /* Legacy weak RxHalfCpltCallback */
|
|---|
| 289 | hi2s->ErrorCallback = HAL_I2S_ErrorCallback; /* Legacy weak ErrorCallback */
|
|---|
| 290 |
|
|---|
| 291 | if (hi2s->MspInitCallback == NULL)
|
|---|
| 292 | {
|
|---|
| 293 | hi2s->MspInitCallback = HAL_I2S_MspInit; /* Legacy weak MspInit */
|
|---|
| 294 | }
|
|---|
| 295 |
|
|---|
| 296 | /* Init the low level hardware : GPIO, CLOCK, NVIC... */
|
|---|
| 297 | hi2s->MspInitCallback(hi2s);
|
|---|
| 298 | #else
|
|---|
| 299 | /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
|
|---|
| 300 | HAL_I2S_MspInit(hi2s);
|
|---|
| 301 | #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
|
|---|
| 302 | }
|
|---|
| 303 |
|
|---|
| 304 | hi2s->State = HAL_I2S_STATE_BUSY;
|
|---|
| 305 |
|
|---|
| 306 | /*----------------------- SPIx I2SCFGR & I2SPR Configuration ----------------*/
|
|---|
| 307 | /* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */
|
|---|
| 308 | CLEAR_BIT(hi2s->Instance->I2SCFGR, (SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CKPOL | \
|
|---|
| 309 | SPI_I2SCFGR_I2SSTD | SPI_I2SCFGR_PCMSYNC | SPI_I2SCFGR_I2SCFG | \
|
|---|
| 310 | SPI_I2SCFGR_I2SE | SPI_I2SCFGR_I2SMOD));
|
|---|
| 311 | hi2s->Instance->I2SPR = 0x0002U;
|
|---|
| 312 |
|
|---|
| 313 | /*----------------------- I2SPR: I2SDIV and ODD Calculation -----------------*/
|
|---|
| 314 | /* If the requested audio frequency is not the default, compute the prescaler */
|
|---|
| 315 | if (hi2s->Init.AudioFreq != I2S_AUDIOFREQ_DEFAULT)
|
|---|
| 316 | {
|
|---|
| 317 | /* Check the frame length (For the Prescaler computing) ********************/
|
|---|
| 318 | if (hi2s->Init.DataFormat == I2S_DATAFORMAT_16B)
|
|---|
| 319 | {
|
|---|
| 320 | /* Packet length is 16 bits */
|
|---|
| 321 | packetlength = 16U;
|
|---|
| 322 | }
|
|---|
| 323 | else
|
|---|
| 324 | {
|
|---|
| 325 | /* Packet length is 32 bits */
|
|---|
| 326 | packetlength = 32U;
|
|---|
| 327 | }
|
|---|
| 328 |
|
|---|
| 329 | /* I2S standard */
|
|---|
| 330 | if (hi2s->Init.Standard <= I2S_STANDARD_LSB)
|
|---|
| 331 | {
|
|---|
| 332 | /* In I2S standard packet lenght is multiplied by 2 */
|
|---|
| 333 | packetlength = packetlength * 2U;
|
|---|
| 334 | }
|
|---|
| 335 |
|
|---|
| 336 | /* Get the source clock value: based on System Clock value */
|
|---|
| 337 | i2sclk = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_I2S1);
|
|---|
| 338 |
|
|---|
| 339 | /* Compute the Real divider depending on the MCLK output state, with a floating point */
|
|---|
| 340 | if (hi2s->Init.MCLKOutput == I2S_MCLKOUTPUT_ENABLE)
|
|---|
| 341 | {
|
|---|
| 342 | /* MCLK output is enabled */
|
|---|
| 343 | if (hi2s->Init.DataFormat != I2S_DATAFORMAT_16B)
|
|---|
| 344 | {
|
|---|
| 345 | tmp = (uint32_t)(((((i2sclk / (packetlength * 4U)) * 10U) / hi2s->Init.AudioFreq)) + 5U);
|
|---|
| 346 | }
|
|---|
| 347 | else
|
|---|
| 348 | {
|
|---|
| 349 | tmp = (uint32_t)(((((i2sclk / (packetlength * 8U)) * 10U) / hi2s->Init.AudioFreq)) + 5U);
|
|---|
| 350 | }
|
|---|
| 351 | }
|
|---|
| 352 | else
|
|---|
| 353 | {
|
|---|
| 354 | /* MCLK output is disabled */
|
|---|
| 355 | tmp = (uint32_t)(((((i2sclk / packetlength) * 10U) / hi2s->Init.AudioFreq)) + 5U);
|
|---|
| 356 | }
|
|---|
| 357 |
|
|---|
| 358 | /* Remove the flatting point */
|
|---|
| 359 | tmp = tmp / 10U;
|
|---|
| 360 |
|
|---|
| 361 | /* Check the parity of the divider */
|
|---|
| 362 | i2sodd = (uint32_t)(tmp & (uint32_t)1U);
|
|---|
| 363 |
|
|---|
| 364 | /* Compute the i2sdiv prescaler */
|
|---|
| 365 | i2sdiv = (uint32_t)((tmp - i2sodd) / 2U);
|
|---|
| 366 |
|
|---|
| 367 | /* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */
|
|---|
| 368 | i2sodd = (uint32_t)(i2sodd << 8U);
|
|---|
| 369 | }
|
|---|
| 370 | else
|
|---|
| 371 | {
|
|---|
| 372 | /* Set the default values */
|
|---|
| 373 | i2sdiv = 2U;
|
|---|
| 374 | i2sodd = 0U;
|
|---|
| 375 | }
|
|---|
| 376 |
|
|---|
| 377 | /* Test if the divider is 1 or 0 or greater than 0xFF */
|
|---|
| 378 | if ((i2sdiv < 2U) || (i2sdiv > 0xFFU))
|
|---|
| 379 | {
|
|---|
| 380 | /* Set the error code and execute error callback*/
|
|---|
| 381 | SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_PRESCALER);
|
|---|
| 382 | return HAL_ERROR;
|
|---|
| 383 | }
|
|---|
| 384 |
|
|---|
| 385 | /*----------------------- SPIx I2SCFGR & I2SPR Configuration ----------------*/
|
|---|
| 386 |
|
|---|
| 387 | /* Write to SPIx I2SPR register the computed value */
|
|---|
| 388 | hi2s->Instance->I2SPR = (uint32_t)((uint32_t)i2sdiv | (uint32_t)(i2sodd | (uint32_t)hi2s->Init.MCLKOutput));
|
|---|
| 389 |
|
|---|
| 390 | /* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */
|
|---|
| 391 | /* And configure the I2S with the I2S_InitStruct values */
|
|---|
| 392 | MODIFY_REG(hi2s->Instance->I2SCFGR, (SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN | \
|
|---|
| 393 | SPI_I2SCFGR_CKPOL | SPI_I2SCFGR_I2SSTD | \
|
|---|
| 394 | SPI_I2SCFGR_PCMSYNC | SPI_I2SCFGR_I2SCFG | \
|
|---|
| 395 | SPI_I2SCFGR_I2SE | SPI_I2SCFGR_I2SMOD), \
|
|---|
| 396 | (SPI_I2SCFGR_I2SMOD | hi2s->Init.Mode | \
|
|---|
| 397 | hi2s->Init.Standard | hi2s->Init.DataFormat | \
|
|---|
| 398 | hi2s->Init.CPOL));
|
|---|
| 399 |
|
|---|
| 400 | #if defined(SPI_I2SCFGR_ASTRTEN)
|
|---|
| 401 | if ((hi2s->Init.Standard == I2S_STANDARD_PCM_SHORT) || ((hi2s->Init.Standard == I2S_STANDARD_PCM_LONG)))
|
|---|
| 402 | {
|
|---|
| 403 | /* Write to SPIx I2SCFGR */
|
|---|
| 404 | SET_BIT(hi2s->Instance->I2SCFGR, SPI_I2SCFGR_ASTRTEN);
|
|---|
| 405 | }
|
|---|
| 406 | #endif
|
|---|
| 407 |
|
|---|
| 408 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
|
|---|
| 409 | hi2s->State = HAL_I2S_STATE_READY;
|
|---|
| 410 |
|
|---|
| 411 | return HAL_OK;
|
|---|
| 412 | }
|
|---|
| 413 |
|
|---|
| 414 | /**
|
|---|
| 415 | * @brief DeInitializes the I2S peripheral
|
|---|
| 416 | * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
|
|---|
| 417 | * the configuration information for I2S module
|
|---|
| 418 | * @retval HAL status
|
|---|
| 419 | */
|
|---|
| 420 | HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s)
|
|---|
| 421 | {
|
|---|
| 422 | /* Check the I2S handle allocation */
|
|---|
| 423 | if (hi2s == NULL)
|
|---|
| 424 | {
|
|---|
| 425 | return HAL_ERROR;
|
|---|
| 426 | }
|
|---|
| 427 |
|
|---|
| 428 | /* Check the parameters */
|
|---|
| 429 | assert_param(IS_I2S_ALL_INSTANCE(hi2s->Instance));
|
|---|
| 430 |
|
|---|
| 431 | hi2s->State = HAL_I2S_STATE_BUSY;
|
|---|
| 432 |
|
|---|
| 433 | /* Disable the I2S Peripheral Clock */
|
|---|
| 434 | __HAL_I2S_DISABLE(hi2s);
|
|---|
| 435 |
|
|---|
| 436 | #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
|
|---|
| 437 | if (hi2s->MspDeInitCallback == NULL)
|
|---|
| 438 | {
|
|---|
| 439 | hi2s->MspDeInitCallback = HAL_I2S_MspDeInit; /* Legacy weak MspDeInit */
|
|---|
| 440 | }
|
|---|
| 441 |
|
|---|
| 442 | /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
|
|---|
| 443 | hi2s->MspDeInitCallback(hi2s);
|
|---|
| 444 | #else
|
|---|
| 445 | /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
|
|---|
| 446 | HAL_I2S_MspDeInit(hi2s);
|
|---|
| 447 | #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
|
|---|
| 448 |
|
|---|
| 449 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
|
|---|
| 450 | hi2s->State = HAL_I2S_STATE_RESET;
|
|---|
| 451 |
|
|---|
| 452 | /* Release Lock */
|
|---|
| 453 | __HAL_UNLOCK(hi2s);
|
|---|
| 454 |
|
|---|
| 455 | return HAL_OK;
|
|---|
| 456 | }
|
|---|
| 457 |
|
|---|
| 458 | /**
|
|---|
| 459 | * @brief I2S MSP Init
|
|---|
| 460 | * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
|
|---|
| 461 | * the configuration information for I2S module
|
|---|
| 462 | * @retval None
|
|---|
| 463 | */
|
|---|
| 464 | __weak void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s)
|
|---|
| 465 | {
|
|---|
| 466 | /* Prevent unused argument(s) compilation warning */
|
|---|
| 467 | UNUSED(hi2s);
|
|---|
| 468 |
|
|---|
| 469 | /* NOTE : This function Should not be modified, when the callback is needed,
|
|---|
| 470 | the HAL_I2S_MspInit could be implemented in the user file
|
|---|
| 471 | */
|
|---|
| 472 | }
|
|---|
| 473 |
|
|---|
| 474 | /**
|
|---|
| 475 | * @brief I2S MSP DeInit
|
|---|
| 476 | * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
|
|---|
| 477 | * the configuration information for I2S module
|
|---|
| 478 | * @retval None
|
|---|
| 479 | */
|
|---|
| 480 | __weak void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s)
|
|---|
| 481 | {
|
|---|
| 482 | /* Prevent unused argument(s) compilation warning */
|
|---|
| 483 | UNUSED(hi2s);
|
|---|
| 484 |
|
|---|
| 485 | /* NOTE : This function Should not be modified, when the callback is needed,
|
|---|
| 486 | the HAL_I2S_MspDeInit could be implemented in the user file
|
|---|
| 487 | */
|
|---|
| 488 | }
|
|---|
| 489 |
|
|---|
| 490 | #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
|
|---|
| 491 | /**
|
|---|
| 492 | * @brief Register a User I2S Callback
|
|---|
| 493 | * To be used instead of the weak predefined callback
|
|---|
| 494 | * @param hi2s Pointer to a I2S_HandleTypeDef structure that contains
|
|---|
| 495 | * the configuration information for the specified I2S.
|
|---|
| 496 | * @param CallbackID ID of the callback to be registered
|
|---|
| 497 | * @param pCallback pointer to the Callback function
|
|---|
| 498 | * @retval HAL status
|
|---|
| 499 | */
|
|---|
| 500 | HAL_StatusTypeDef HAL_I2S_RegisterCallback(I2S_HandleTypeDef *hi2s, HAL_I2S_CallbackIDTypeDef CallbackID, pI2S_CallbackTypeDef pCallback)
|
|---|
| 501 | {
|
|---|
| 502 | HAL_StatusTypeDef status = HAL_OK;
|
|---|
| 503 |
|
|---|
| 504 | if (pCallback == NULL)
|
|---|
| 505 | {
|
|---|
| 506 | /* Update the error code */
|
|---|
| 507 | hi2s->ErrorCode |= HAL_I2S_ERROR_INVALID_CALLBACK;
|
|---|
| 508 |
|
|---|
| 509 | return HAL_ERROR;
|
|---|
| 510 | }
|
|---|
| 511 | /* Process locked */
|
|---|
| 512 | __HAL_LOCK(hi2s);
|
|---|
| 513 |
|
|---|
| 514 | if (HAL_I2S_STATE_READY == hi2s->State)
|
|---|
| 515 | {
|
|---|
| 516 | switch (CallbackID)
|
|---|
| 517 | {
|
|---|
| 518 | case HAL_I2S_TX_COMPLETE_CB_ID :
|
|---|
| 519 | hi2s->TxCpltCallback = pCallback;
|
|---|
| 520 | break;
|
|---|
| 521 |
|
|---|
| 522 | case HAL_I2S_RX_COMPLETE_CB_ID :
|
|---|
| 523 | hi2s->RxCpltCallback = pCallback;
|
|---|
| 524 | break;
|
|---|
| 525 |
|
|---|
| 526 | case HAL_I2S_TX_HALF_COMPLETE_CB_ID :
|
|---|
| 527 | hi2s->TxHalfCpltCallback = pCallback;
|
|---|
| 528 | break;
|
|---|
| 529 |
|
|---|
| 530 | case HAL_I2S_RX_HALF_COMPLETE_CB_ID :
|
|---|
| 531 | hi2s->RxHalfCpltCallback = pCallback;
|
|---|
| 532 | break;
|
|---|
| 533 |
|
|---|
| 534 | case HAL_I2S_ERROR_CB_ID :
|
|---|
| 535 | hi2s->ErrorCallback = pCallback;
|
|---|
| 536 | break;
|
|---|
| 537 |
|
|---|
| 538 | case HAL_I2S_MSPINIT_CB_ID :
|
|---|
| 539 | hi2s->MspInitCallback = pCallback;
|
|---|
| 540 | break;
|
|---|
| 541 |
|
|---|
| 542 | case HAL_I2S_MSPDEINIT_CB_ID :
|
|---|
| 543 | hi2s->MspDeInitCallback = pCallback;
|
|---|
| 544 | break;
|
|---|
| 545 |
|
|---|
| 546 | default :
|
|---|
| 547 | /* Update the error code */
|
|---|
| 548 | SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_INVALID_CALLBACK);
|
|---|
| 549 |
|
|---|
| 550 | /* Return error status */
|
|---|
| 551 | status = HAL_ERROR;
|
|---|
| 552 | break;
|
|---|
| 553 | }
|
|---|
| 554 | }
|
|---|
| 555 | else if (HAL_I2S_STATE_RESET == hi2s->State)
|
|---|
| 556 | {
|
|---|
| 557 | switch (CallbackID)
|
|---|
| 558 | {
|
|---|
| 559 | case HAL_I2S_MSPINIT_CB_ID :
|
|---|
| 560 | hi2s->MspInitCallback = pCallback;
|
|---|
| 561 | break;
|
|---|
| 562 |
|
|---|
| 563 | case HAL_I2S_MSPDEINIT_CB_ID :
|
|---|
| 564 | hi2s->MspDeInitCallback = pCallback;
|
|---|
| 565 | break;
|
|---|
| 566 |
|
|---|
| 567 | default :
|
|---|
| 568 | /* Update the error code */
|
|---|
| 569 | SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_INVALID_CALLBACK);
|
|---|
| 570 |
|
|---|
| 571 | /* Return error status */
|
|---|
| 572 | status = HAL_ERROR;
|
|---|
| 573 | break;
|
|---|
| 574 | }
|
|---|
| 575 | }
|
|---|
| 576 | else
|
|---|
| 577 | {
|
|---|
| 578 | /* Update the error code */
|
|---|
| 579 | SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_INVALID_CALLBACK);
|
|---|
| 580 |
|
|---|
| 581 | /* Return error status */
|
|---|
| 582 | status = HAL_ERROR;
|
|---|
| 583 | }
|
|---|
| 584 |
|
|---|
| 585 | /* Release Lock */
|
|---|
| 586 | __HAL_UNLOCK(hi2s);
|
|---|
| 587 | return status;
|
|---|
| 588 | }
|
|---|
| 589 |
|
|---|
| 590 | /**
|
|---|
| 591 | * @brief Unregister an I2S Callback
|
|---|
| 592 | * I2S callback is redirected to the weak predefined callback
|
|---|
| 593 | * @param hi2s Pointer to a I2S_HandleTypeDef structure that contains
|
|---|
| 594 | * the configuration information for the specified I2S.
|
|---|
| 595 | * @param CallbackID ID of the callback to be unregistered
|
|---|
| 596 | * @retval HAL status
|
|---|
| 597 | */
|
|---|
| 598 | HAL_StatusTypeDef HAL_I2S_UnRegisterCallback(I2S_HandleTypeDef *hi2s, HAL_I2S_CallbackIDTypeDef CallbackID)
|
|---|
| 599 | {
|
|---|
| 600 | HAL_StatusTypeDef status = HAL_OK;
|
|---|
| 601 |
|
|---|
| 602 | /* Process locked */
|
|---|
| 603 | __HAL_LOCK(hi2s);
|
|---|
| 604 |
|
|---|
| 605 | if (HAL_I2S_STATE_READY == hi2s->State)
|
|---|
| 606 | {
|
|---|
| 607 | switch (CallbackID)
|
|---|
| 608 | {
|
|---|
| 609 | case HAL_I2S_TX_COMPLETE_CB_ID :
|
|---|
| 610 | hi2s->TxCpltCallback = HAL_I2S_TxCpltCallback; /* Legacy weak TxCpltCallback */
|
|---|
| 611 | break;
|
|---|
| 612 |
|
|---|
| 613 | case HAL_I2S_RX_COMPLETE_CB_ID :
|
|---|
| 614 | hi2s->RxCpltCallback = HAL_I2S_RxCpltCallback; /* Legacy weak RxCpltCallback */
|
|---|
| 615 | break;
|
|---|
| 616 |
|
|---|
| 617 | case HAL_I2S_TX_HALF_COMPLETE_CB_ID :
|
|---|
| 618 | hi2s->TxHalfCpltCallback = HAL_I2S_TxHalfCpltCallback; /* Legacy weak TxHalfCpltCallback */
|
|---|
| 619 | break;
|
|---|
| 620 |
|
|---|
| 621 | case HAL_I2S_RX_HALF_COMPLETE_CB_ID :
|
|---|
| 622 | hi2s->RxHalfCpltCallback = HAL_I2S_RxHalfCpltCallback; /* Legacy weak RxHalfCpltCallback */
|
|---|
| 623 | break;
|
|---|
| 624 |
|
|---|
| 625 | case HAL_I2S_ERROR_CB_ID :
|
|---|
| 626 | hi2s->ErrorCallback = HAL_I2S_ErrorCallback; /* Legacy weak ErrorCallback */
|
|---|
| 627 | break;
|
|---|
| 628 |
|
|---|
| 629 | case HAL_I2S_MSPINIT_CB_ID :
|
|---|
| 630 | hi2s->MspInitCallback = HAL_I2S_MspInit; /* Legacy weak MspInit */
|
|---|
| 631 | break;
|
|---|
| 632 |
|
|---|
| 633 | case HAL_I2S_MSPDEINIT_CB_ID :
|
|---|
| 634 | hi2s->MspDeInitCallback = HAL_I2S_MspDeInit; /* Legacy weak MspDeInit */
|
|---|
| 635 | break;
|
|---|
| 636 |
|
|---|
| 637 | default :
|
|---|
| 638 | /* Update the error code */
|
|---|
| 639 | SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_INVALID_CALLBACK);
|
|---|
| 640 |
|
|---|
| 641 | /* Return error status */
|
|---|
| 642 | status = HAL_ERROR;
|
|---|
| 643 | break;
|
|---|
| 644 | }
|
|---|
| 645 | }
|
|---|
| 646 | else if (HAL_I2S_STATE_RESET == hi2s->State)
|
|---|
| 647 | {
|
|---|
| 648 | switch (CallbackID)
|
|---|
| 649 | {
|
|---|
| 650 | case HAL_I2S_MSPINIT_CB_ID :
|
|---|
| 651 | hi2s->MspInitCallback = HAL_I2S_MspInit; /* Legacy weak MspInit */
|
|---|
| 652 | break;
|
|---|
| 653 |
|
|---|
| 654 | case HAL_I2S_MSPDEINIT_CB_ID :
|
|---|
| 655 | hi2s->MspDeInitCallback = HAL_I2S_MspDeInit; /* Legacy weak MspDeInit */
|
|---|
| 656 | break;
|
|---|
| 657 |
|
|---|
| 658 | default :
|
|---|
| 659 | /* Update the error code */
|
|---|
| 660 | SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_INVALID_CALLBACK);
|
|---|
| 661 |
|
|---|
| 662 | /* Return error status */
|
|---|
| 663 | status = HAL_ERROR;
|
|---|
| 664 | break;
|
|---|
| 665 | }
|
|---|
| 666 | }
|
|---|
| 667 | else
|
|---|
| 668 | {
|
|---|
| 669 | /* Update the error code */
|
|---|
| 670 | SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_INVALID_CALLBACK);
|
|---|
| 671 |
|
|---|
| 672 | /* Return error status */
|
|---|
| 673 | status = HAL_ERROR;
|
|---|
| 674 | }
|
|---|
| 675 |
|
|---|
| 676 | /* Release Lock */
|
|---|
| 677 | __HAL_UNLOCK(hi2s);
|
|---|
| 678 | return status;
|
|---|
| 679 | }
|
|---|
| 680 | #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
|
|---|
| 681 | /**
|
|---|
| 682 | * @}
|
|---|
| 683 | */
|
|---|
| 684 |
|
|---|
| 685 | /** @defgroup I2S_Exported_Functions_Group2 IO operation functions
|
|---|
| 686 | * @brief Data transfers functions
|
|---|
| 687 | *
|
|---|
| 688 | @verbatim
|
|---|
| 689 | ===============================================================================
|
|---|
| 690 | ##### IO operation functions #####
|
|---|
| 691 | ===============================================================================
|
|---|
| 692 | [..]
|
|---|
| 693 | This subsection provides a set of functions allowing to manage the I2S data
|
|---|
| 694 | transfers.
|
|---|
| 695 |
|
|---|
| 696 | (#) There are two modes of transfer:
|
|---|
| 697 | (++) Blocking mode : The communication is performed in the polling mode.
|
|---|
| 698 | The status of all data processing is returned by the same function
|
|---|
| 699 | after finishing transfer.
|
|---|
| 700 | (++) No-Blocking mode : The communication is performed using Interrupts
|
|---|
| 701 | or DMA. These functions return the status of the transfer startup.
|
|---|
| 702 | The end of the data processing will be indicated through the
|
|---|
| 703 | dedicated I2S IRQ when using Interrupt mode or the DMA IRQ when
|
|---|
| 704 | using DMA mode.
|
|---|
| 705 |
|
|---|
| 706 | (#) Blocking mode functions are :
|
|---|
| 707 | (++) HAL_I2S_Transmit()
|
|---|
| 708 | (++) HAL_I2S_Receive()
|
|---|
| 709 |
|
|---|
| 710 | (#) No-Blocking mode functions with Interrupt are :
|
|---|
| 711 | (++) HAL_I2S_Transmit_IT()
|
|---|
| 712 | (++) HAL_I2S_Receive_IT()
|
|---|
| 713 |
|
|---|
| 714 | (#) No-Blocking mode functions with DMA are :
|
|---|
| 715 | (++) HAL_I2S_Transmit_DMA()
|
|---|
| 716 | (++) HAL_I2S_Receive_DMA()
|
|---|
| 717 |
|
|---|
| 718 | (#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
|
|---|
| 719 | (++) HAL_I2S_TxCpltCallback()
|
|---|
| 720 | (++) HAL_I2S_RxCpltCallback()
|
|---|
| 721 | (++) HAL_I2S_ErrorCallback()
|
|---|
| 722 |
|
|---|
| 723 | @endverbatim
|
|---|
| 724 | * @{
|
|---|
| 725 | */
|
|---|
| 726 |
|
|---|
| 727 | /**
|
|---|
| 728 | * @brief Transmit an amount of data in blocking mode
|
|---|
| 729 | * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
|
|---|
| 730 | * the configuration information for I2S module
|
|---|
| 731 | * @param pData a 16-bit pointer to data buffer.
|
|---|
| 732 | * @param Size number of data sample to be sent:
|
|---|
| 733 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
|
|---|
| 734 | * configuration phase, the Size parameter means the number of 16-bit data length
|
|---|
| 735 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
|
|---|
| 736 | * the Size parameter means the number of 16-bit data length.
|
|---|
| 737 | * @param Timeout Timeout duration
|
|---|
| 738 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
|
|---|
| 739 | * between Master and Slave(example: audio streaming).
|
|---|
| 740 | * @retval HAL status
|
|---|
| 741 | */
|
|---|
| 742 | HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout)
|
|---|
| 743 | {
|
|---|
| 744 | uint32_t tmpreg_cfgr;
|
|---|
| 745 |
|
|---|
| 746 | if ((pData == NULL) || (Size == 0U))
|
|---|
| 747 | {
|
|---|
| 748 | return HAL_ERROR;
|
|---|
| 749 | }
|
|---|
| 750 |
|
|---|
| 751 | /* Process Locked */
|
|---|
| 752 | __HAL_LOCK(hi2s);
|
|---|
| 753 |
|
|---|
| 754 | if (hi2s->State != HAL_I2S_STATE_READY)
|
|---|
| 755 | {
|
|---|
| 756 | __HAL_UNLOCK(hi2s);
|
|---|
| 757 | return HAL_BUSY;
|
|---|
| 758 | }
|
|---|
| 759 |
|
|---|
| 760 | /* Set state and reset error code */
|
|---|
| 761 | hi2s->State = HAL_I2S_STATE_BUSY_TX;
|
|---|
| 762 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
|
|---|
| 763 | hi2s->pTxBuffPtr = pData;
|
|---|
| 764 |
|
|---|
| 765 | tmpreg_cfgr = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN);
|
|---|
| 766 |
|
|---|
| 767 | if ((tmpreg_cfgr == I2S_DATAFORMAT_24B) || (tmpreg_cfgr == I2S_DATAFORMAT_32B))
|
|---|
| 768 | {
|
|---|
| 769 | hi2s->TxXferSize = (Size << 1U);
|
|---|
| 770 | hi2s->TxXferCount = (Size << 1U);
|
|---|
| 771 | }
|
|---|
| 772 | else
|
|---|
| 773 | {
|
|---|
| 774 | hi2s->TxXferSize = Size;
|
|---|
| 775 | hi2s->TxXferCount = Size;
|
|---|
| 776 | }
|
|---|
| 777 |
|
|---|
| 778 | tmpreg_cfgr = hi2s->Instance->I2SCFGR;
|
|---|
| 779 |
|
|---|
| 780 | /* Check if the I2S is already enabled */
|
|---|
| 781 | if ((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
|
|---|
| 782 | {
|
|---|
| 783 | /* Enable I2S peripheral */
|
|---|
| 784 | __HAL_I2S_ENABLE(hi2s);
|
|---|
| 785 | }
|
|---|
| 786 |
|
|---|
| 787 | /* Wait until TXE flag is set */
|
|---|
| 788 | if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_TXE, SET, Timeout) != HAL_OK)
|
|---|
| 789 | {
|
|---|
| 790 | /* Set the error code */
|
|---|
| 791 | SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_TIMEOUT);
|
|---|
| 792 | hi2s->State = HAL_I2S_STATE_READY;
|
|---|
| 793 | __HAL_UNLOCK(hi2s);
|
|---|
| 794 | return HAL_ERROR;
|
|---|
| 795 | }
|
|---|
| 796 |
|
|---|
| 797 | while (hi2s->TxXferCount > 0U)
|
|---|
| 798 | {
|
|---|
| 799 | hi2s->Instance->DR = (*hi2s->pTxBuffPtr);
|
|---|
| 800 | hi2s->pTxBuffPtr++;
|
|---|
| 801 | hi2s->TxXferCount--;
|
|---|
| 802 |
|
|---|
| 803 | /* Wait until TXE flag is set */
|
|---|
| 804 | if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_TXE, SET, Timeout) != HAL_OK)
|
|---|
| 805 | {
|
|---|
| 806 | /* Set the error code */
|
|---|
| 807 | SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_TIMEOUT);
|
|---|
| 808 | hi2s->State = HAL_I2S_STATE_READY;
|
|---|
| 809 | __HAL_UNLOCK(hi2s);
|
|---|
| 810 | return HAL_ERROR;
|
|---|
| 811 | }
|
|---|
| 812 |
|
|---|
| 813 | /* Check if an underrun occurs */
|
|---|
| 814 | if (__HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_UDR) == SET)
|
|---|
| 815 | {
|
|---|
| 816 | /* Clear underrun flag */
|
|---|
| 817 | __HAL_I2S_CLEAR_UDRFLAG(hi2s);
|
|---|
| 818 |
|
|---|
| 819 | /* Set the error code */
|
|---|
| 820 | SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_UDR);
|
|---|
| 821 | }
|
|---|
| 822 | }
|
|---|
| 823 |
|
|---|
| 824 | /* Check if Slave mode is selected */
|
|---|
| 825 | if (((tmpreg_cfgr & SPI_I2SCFGR_I2SCFG) == I2S_MODE_SLAVE_TX) || ((tmpreg_cfgr & SPI_I2SCFGR_I2SCFG) == I2S_MODE_SLAVE_RX))
|
|---|
| 826 | {
|
|---|
| 827 | /* Wait until Busy flag is reset */
|
|---|
| 828 | if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_BSY, RESET, Timeout) != HAL_OK)
|
|---|
| 829 | {
|
|---|
| 830 | /* Set the error code */
|
|---|
| 831 | SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_TIMEOUT);
|
|---|
| 832 | hi2s->State = HAL_I2S_STATE_READY;
|
|---|
| 833 | __HAL_UNLOCK(hi2s);
|
|---|
| 834 | return HAL_ERROR;
|
|---|
| 835 | }
|
|---|
| 836 | }
|
|---|
| 837 |
|
|---|
| 838 | hi2s->State = HAL_I2S_STATE_READY;
|
|---|
| 839 | __HAL_UNLOCK(hi2s);
|
|---|
| 840 | return HAL_OK;
|
|---|
| 841 | }
|
|---|
| 842 |
|
|---|
| 843 | /**
|
|---|
| 844 | * @brief Receive an amount of data in blocking mode
|
|---|
| 845 | * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
|
|---|
| 846 | * the configuration information for I2S module
|
|---|
| 847 | * @param pData a 16-bit pointer to data buffer.
|
|---|
| 848 | * @param Size number of data sample to be sent:
|
|---|
| 849 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
|
|---|
| 850 | * configuration phase, the Size parameter means the number of 16-bit data length
|
|---|
| 851 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
|
|---|
| 852 | * the Size parameter means the number of 16-bit data length.
|
|---|
| 853 | * @param Timeout Timeout duration
|
|---|
| 854 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
|
|---|
| 855 | * between Master and Slave(example: audio streaming).
|
|---|
| 856 | * @note In I2S Master Receiver mode, just after enabling the peripheral the clock will be generate
|
|---|
| 857 | * in continuous way and as the I2S is not disabled at the end of the I2S transaction.
|
|---|
| 858 | * @retval HAL status
|
|---|
| 859 | */
|
|---|
| 860 | HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout)
|
|---|
| 861 | {
|
|---|
| 862 | uint32_t tmpreg_cfgr;
|
|---|
| 863 |
|
|---|
| 864 | if ((pData == NULL) || (Size == 0U))
|
|---|
| 865 | {
|
|---|
| 866 | return HAL_ERROR;
|
|---|
| 867 | }
|
|---|
| 868 |
|
|---|
| 869 | /* Process Locked */
|
|---|
| 870 | __HAL_LOCK(hi2s);
|
|---|
| 871 |
|
|---|
| 872 | if (hi2s->State != HAL_I2S_STATE_READY)
|
|---|
| 873 | {
|
|---|
| 874 | __HAL_UNLOCK(hi2s);
|
|---|
| 875 | return HAL_BUSY;
|
|---|
| 876 | }
|
|---|
| 877 |
|
|---|
| 878 | /* Set state and reset error code */
|
|---|
| 879 | hi2s->State = HAL_I2S_STATE_BUSY_RX;
|
|---|
| 880 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
|
|---|
| 881 | hi2s->pRxBuffPtr = pData;
|
|---|
| 882 |
|
|---|
| 883 | tmpreg_cfgr = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN);
|
|---|
| 884 |
|
|---|
| 885 | if ((tmpreg_cfgr == I2S_DATAFORMAT_24B) || (tmpreg_cfgr == I2S_DATAFORMAT_32B))
|
|---|
| 886 | {
|
|---|
| 887 | hi2s->RxXferSize = (Size << 1U);
|
|---|
| 888 | hi2s->RxXferCount = (Size << 1U);
|
|---|
| 889 | }
|
|---|
| 890 | else
|
|---|
| 891 | {
|
|---|
| 892 | hi2s->RxXferSize = Size;
|
|---|
| 893 | hi2s->RxXferCount = Size;
|
|---|
| 894 | }
|
|---|
| 895 |
|
|---|
| 896 | /* Check if the I2S is already enabled */
|
|---|
| 897 | if ((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
|
|---|
| 898 | {
|
|---|
| 899 | /* Enable I2S peripheral */
|
|---|
| 900 | __HAL_I2S_ENABLE(hi2s);
|
|---|
| 901 | }
|
|---|
| 902 |
|
|---|
| 903 | /* Check if Master Receiver mode is selected */
|
|---|
| 904 | if ((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_RX)
|
|---|
| 905 | {
|
|---|
| 906 | /* Clear the Overrun Flag by a read operation on the SPI_DR register followed by a read
|
|---|
| 907 | access to the SPI_SR register. */
|
|---|
| 908 | __HAL_I2S_CLEAR_OVRFLAG(hi2s);
|
|---|
| 909 | }
|
|---|
| 910 |
|
|---|
| 911 | /* Receive data */
|
|---|
| 912 | while (hi2s->RxXferCount > 0U)
|
|---|
| 913 | {
|
|---|
| 914 | /* Wait until RXNE flag is set */
|
|---|
| 915 | if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_RXNE, SET, Timeout) != HAL_OK)
|
|---|
| 916 | {
|
|---|
| 917 | /* Set the error code */
|
|---|
| 918 | SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_TIMEOUT);
|
|---|
| 919 | hi2s->State = HAL_I2S_STATE_READY;
|
|---|
| 920 | __HAL_UNLOCK(hi2s);
|
|---|
| 921 | return HAL_ERROR;
|
|---|
| 922 | }
|
|---|
| 923 |
|
|---|
| 924 | (*hi2s->pRxBuffPtr) = (uint16_t)hi2s->Instance->DR;
|
|---|
| 925 | hi2s->pRxBuffPtr++;
|
|---|
| 926 | hi2s->RxXferCount--;
|
|---|
| 927 |
|
|---|
| 928 | /* Check if an overrun occurs */
|
|---|
| 929 | if (__HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_OVR) == SET)
|
|---|
| 930 | {
|
|---|
| 931 | /* Clear overrun flag */
|
|---|
| 932 | __HAL_I2S_CLEAR_OVRFLAG(hi2s);
|
|---|
| 933 |
|
|---|
| 934 | /* Set the error code */
|
|---|
| 935 | SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_OVR);
|
|---|
| 936 | }
|
|---|
| 937 | }
|
|---|
| 938 |
|
|---|
| 939 | hi2s->State = HAL_I2S_STATE_READY;
|
|---|
| 940 | __HAL_UNLOCK(hi2s);
|
|---|
| 941 | return HAL_OK;
|
|---|
| 942 | }
|
|---|
| 943 |
|
|---|
| 944 | /**
|
|---|
| 945 | * @brief Transmit an amount of data in non-blocking mode with Interrupt
|
|---|
| 946 | * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
|
|---|
| 947 | * the configuration information for I2S module
|
|---|
| 948 | * @param pData a 16-bit pointer to data buffer.
|
|---|
| 949 | * @param Size number of data sample to be sent:
|
|---|
| 950 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
|
|---|
| 951 | * configuration phase, the Size parameter means the number of 16-bit data length
|
|---|
| 952 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
|
|---|
| 953 | * the Size parameter means the number of 16-bit data length.
|
|---|
| 954 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
|
|---|
| 955 | * between Master and Slave(example: audio streaming).
|
|---|
| 956 | * @retval HAL status
|
|---|
| 957 | */
|
|---|
| 958 | HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
|
|---|
| 959 | {
|
|---|
| 960 | uint32_t tmpreg_cfgr;
|
|---|
| 961 |
|
|---|
| 962 | if ((pData == NULL) || (Size == 0U))
|
|---|
| 963 | {
|
|---|
| 964 | return HAL_ERROR;
|
|---|
| 965 | }
|
|---|
| 966 |
|
|---|
| 967 | /* Process Locked */
|
|---|
| 968 | __HAL_LOCK(hi2s);
|
|---|
| 969 |
|
|---|
| 970 | if (hi2s->State != HAL_I2S_STATE_READY)
|
|---|
| 971 | {
|
|---|
| 972 | __HAL_UNLOCK(hi2s);
|
|---|
| 973 | return HAL_BUSY;
|
|---|
| 974 | }
|
|---|
| 975 |
|
|---|
| 976 | /* Set state and reset error code */
|
|---|
| 977 | hi2s->State = HAL_I2S_STATE_BUSY_TX;
|
|---|
| 978 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
|
|---|
| 979 | hi2s->pTxBuffPtr = pData;
|
|---|
| 980 |
|
|---|
| 981 | tmpreg_cfgr = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN);
|
|---|
| 982 |
|
|---|
| 983 | if ((tmpreg_cfgr == I2S_DATAFORMAT_24B) || (tmpreg_cfgr == I2S_DATAFORMAT_32B))
|
|---|
| 984 | {
|
|---|
| 985 | hi2s->TxXferSize = (Size << 1U);
|
|---|
| 986 | hi2s->TxXferCount = (Size << 1U);
|
|---|
| 987 | }
|
|---|
| 988 | else
|
|---|
| 989 | {
|
|---|
| 990 | hi2s->TxXferSize = Size;
|
|---|
| 991 | hi2s->TxXferCount = Size;
|
|---|
| 992 | }
|
|---|
| 993 |
|
|---|
| 994 | /* Enable TXE and ERR interrupt */
|
|---|
| 995 | __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
|
|---|
| 996 |
|
|---|
| 997 | /* Check if the I2S is already enabled */
|
|---|
| 998 | if ((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
|
|---|
| 999 | {
|
|---|
| 1000 | /* Enable I2S peripheral */
|
|---|
| 1001 | __HAL_I2S_ENABLE(hi2s);
|
|---|
| 1002 | }
|
|---|
| 1003 |
|
|---|
| 1004 | __HAL_UNLOCK(hi2s);
|
|---|
| 1005 | return HAL_OK;
|
|---|
| 1006 | }
|
|---|
| 1007 |
|
|---|
| 1008 | /**
|
|---|
| 1009 | * @brief Receive an amount of data in non-blocking mode with Interrupt
|
|---|
| 1010 | * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
|
|---|
| 1011 | * the configuration information for I2S module
|
|---|
| 1012 | * @param pData a 16-bit pointer to the Receive data buffer.
|
|---|
| 1013 | * @param Size number of data sample to be sent:
|
|---|
| 1014 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
|
|---|
| 1015 | * configuration phase, the Size parameter means the number of 16-bit data length
|
|---|
| 1016 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
|
|---|
| 1017 | * the Size parameter means the number of 16-bit data length.
|
|---|
| 1018 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
|
|---|
| 1019 | * between Master and Slave(example: audio streaming).
|
|---|
| 1020 | * @note It is recommended to use DMA for the I2S receiver to avoid de-synchronization
|
|---|
| 1021 | * between Master and Slave otherwise the I2S interrupt should be optimized.
|
|---|
| 1022 | * @retval HAL status
|
|---|
| 1023 | */
|
|---|
| 1024 | HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
|
|---|
| 1025 | {
|
|---|
| 1026 | uint32_t tmpreg_cfgr;
|
|---|
| 1027 |
|
|---|
| 1028 | if ((pData == NULL) || (Size == 0U))
|
|---|
| 1029 | {
|
|---|
| 1030 | return HAL_ERROR;
|
|---|
| 1031 | }
|
|---|
| 1032 |
|
|---|
| 1033 | /* Process Locked */
|
|---|
| 1034 | __HAL_LOCK(hi2s);
|
|---|
| 1035 |
|
|---|
| 1036 | if (hi2s->State != HAL_I2S_STATE_READY)
|
|---|
| 1037 | {
|
|---|
| 1038 | __HAL_UNLOCK(hi2s);
|
|---|
| 1039 | return HAL_BUSY;
|
|---|
| 1040 | }
|
|---|
| 1041 |
|
|---|
| 1042 | /* Set state and reset error code */
|
|---|
| 1043 | hi2s->State = HAL_I2S_STATE_BUSY_RX;
|
|---|
| 1044 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
|
|---|
| 1045 | hi2s->pRxBuffPtr = pData;
|
|---|
| 1046 |
|
|---|
| 1047 | tmpreg_cfgr = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN);
|
|---|
| 1048 |
|
|---|
| 1049 | if ((tmpreg_cfgr == I2S_DATAFORMAT_24B) || (tmpreg_cfgr == I2S_DATAFORMAT_32B))
|
|---|
| 1050 | {
|
|---|
| 1051 | hi2s->RxXferSize = (Size << 1U);
|
|---|
| 1052 | hi2s->RxXferCount = (Size << 1U);
|
|---|
| 1053 | }
|
|---|
| 1054 | else
|
|---|
| 1055 | {
|
|---|
| 1056 | hi2s->RxXferSize = Size;
|
|---|
| 1057 | hi2s->RxXferCount = Size;
|
|---|
| 1058 | }
|
|---|
| 1059 |
|
|---|
| 1060 | /* Enable RXNE and ERR interrupt */
|
|---|
| 1061 | __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
|
|---|
| 1062 |
|
|---|
| 1063 | /* Check if the I2S is already enabled */
|
|---|
| 1064 | if ((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
|
|---|
| 1065 | {
|
|---|
| 1066 | /* Enable I2S peripheral */
|
|---|
| 1067 | __HAL_I2S_ENABLE(hi2s);
|
|---|
| 1068 | }
|
|---|
| 1069 |
|
|---|
| 1070 | __HAL_UNLOCK(hi2s);
|
|---|
| 1071 | return HAL_OK;
|
|---|
| 1072 | }
|
|---|
| 1073 |
|
|---|
| 1074 | /**
|
|---|
| 1075 | * @brief Transmit an amount of data in non-blocking mode with DMA
|
|---|
| 1076 | * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
|
|---|
| 1077 | * the configuration information for I2S module
|
|---|
| 1078 | * @param pData a 16-bit pointer to the Transmit data buffer.
|
|---|
| 1079 | * @param Size number of data sample to be sent:
|
|---|
| 1080 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
|
|---|
| 1081 | * configuration phase, the Size parameter means the number of 16-bit data length
|
|---|
| 1082 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
|
|---|
| 1083 | * the Size parameter means the number of 16-bit data length.
|
|---|
| 1084 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
|
|---|
| 1085 | * between Master and Slave(example: audio streaming).
|
|---|
| 1086 | * @retval HAL status
|
|---|
| 1087 | */
|
|---|
| 1088 | HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
|
|---|
| 1089 | {
|
|---|
| 1090 | uint32_t tmpreg_cfgr;
|
|---|
| 1091 |
|
|---|
| 1092 | if ((pData == NULL) || (Size == 0U))
|
|---|
| 1093 | {
|
|---|
| 1094 | return HAL_ERROR;
|
|---|
| 1095 | }
|
|---|
| 1096 |
|
|---|
| 1097 | /* Process Locked */
|
|---|
| 1098 | __HAL_LOCK(hi2s);
|
|---|
| 1099 |
|
|---|
| 1100 | if (hi2s->State != HAL_I2S_STATE_READY)
|
|---|
| 1101 | {
|
|---|
| 1102 | __HAL_UNLOCK(hi2s);
|
|---|
| 1103 | return HAL_BUSY;
|
|---|
| 1104 | }
|
|---|
| 1105 |
|
|---|
| 1106 | /* Set state and reset error code */
|
|---|
| 1107 | hi2s->State = HAL_I2S_STATE_BUSY_TX;
|
|---|
| 1108 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
|
|---|
| 1109 | hi2s->pTxBuffPtr = pData;
|
|---|
| 1110 |
|
|---|
| 1111 | tmpreg_cfgr = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN);
|
|---|
| 1112 |
|
|---|
| 1113 | if ((tmpreg_cfgr == I2S_DATAFORMAT_24B) || (tmpreg_cfgr == I2S_DATAFORMAT_32B))
|
|---|
| 1114 | {
|
|---|
| 1115 | hi2s->TxXferSize = (Size << 1U);
|
|---|
| 1116 | hi2s->TxXferCount = (Size << 1U);
|
|---|
| 1117 | }
|
|---|
| 1118 | else
|
|---|
| 1119 | {
|
|---|
| 1120 | hi2s->TxXferSize = Size;
|
|---|
| 1121 | hi2s->TxXferCount = Size;
|
|---|
| 1122 | }
|
|---|
| 1123 |
|
|---|
| 1124 | /* Set the I2S Tx DMA Half transfer complete callback */
|
|---|
| 1125 | hi2s->hdmatx->XferHalfCpltCallback = I2S_DMATxHalfCplt;
|
|---|
| 1126 |
|
|---|
| 1127 | /* Set the I2S Tx DMA transfer complete callback */
|
|---|
| 1128 | hi2s->hdmatx->XferCpltCallback = I2S_DMATxCplt;
|
|---|
| 1129 |
|
|---|
| 1130 | /* Set the DMA error callback */
|
|---|
| 1131 | hi2s->hdmatx->XferErrorCallback = I2S_DMAError;
|
|---|
| 1132 |
|
|---|
| 1133 | /* Enable the Tx DMA Stream/Channel */
|
|---|
| 1134 | if (HAL_OK != HAL_DMA_Start_IT(hi2s->hdmatx, (uint32_t)hi2s->pTxBuffPtr, (uint32_t)&hi2s->Instance->DR, hi2s->TxXferSize))
|
|---|
| 1135 | {
|
|---|
| 1136 | /* Update SPI error code */
|
|---|
| 1137 | SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_DMA);
|
|---|
| 1138 | hi2s->State = HAL_I2S_STATE_READY;
|
|---|
| 1139 |
|
|---|
| 1140 | __HAL_UNLOCK(hi2s);
|
|---|
| 1141 | return HAL_ERROR;
|
|---|
| 1142 | }
|
|---|
| 1143 |
|
|---|
| 1144 | /* Check if the I2S is already enabled */
|
|---|
| 1145 | if (HAL_IS_BIT_CLR(hi2s->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
|
|---|
| 1146 | {
|
|---|
| 1147 | /* Enable I2S peripheral */
|
|---|
| 1148 | __HAL_I2S_ENABLE(hi2s);
|
|---|
| 1149 | }
|
|---|
| 1150 |
|
|---|
| 1151 | /* Check if the I2S Tx request is already enabled */
|
|---|
| 1152 | if (HAL_IS_BIT_CLR(hi2s->Instance->CR2, SPI_CR2_TXDMAEN))
|
|---|
| 1153 | {
|
|---|
| 1154 | /* Enable Tx DMA Request */
|
|---|
| 1155 | SET_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN);
|
|---|
| 1156 | }
|
|---|
| 1157 |
|
|---|
| 1158 | __HAL_UNLOCK(hi2s);
|
|---|
| 1159 | return HAL_OK;
|
|---|
| 1160 | }
|
|---|
| 1161 |
|
|---|
| 1162 | /**
|
|---|
| 1163 | * @brief Receive an amount of data in non-blocking mode with DMA
|
|---|
| 1164 | * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
|
|---|
| 1165 | * the configuration information for I2S module
|
|---|
| 1166 | * @param pData a 16-bit pointer to the Receive data buffer.
|
|---|
| 1167 | * @param Size number of data sample to be sent:
|
|---|
| 1168 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
|
|---|
| 1169 | * configuration phase, the Size parameter means the number of 16-bit data length
|
|---|
| 1170 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
|
|---|
| 1171 | * the Size parameter means the number of 16-bit data length.
|
|---|
| 1172 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
|
|---|
| 1173 | * between Master and Slave(example: audio streaming).
|
|---|
| 1174 | * @retval HAL status
|
|---|
| 1175 | */
|
|---|
| 1176 | HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
|
|---|
| 1177 | {
|
|---|
| 1178 | uint32_t tmpreg_cfgr;
|
|---|
| 1179 |
|
|---|
| 1180 | if ((pData == NULL) || (Size == 0U))
|
|---|
| 1181 | {
|
|---|
| 1182 | return HAL_ERROR;
|
|---|
| 1183 | }
|
|---|
| 1184 |
|
|---|
| 1185 | /* Process Locked */
|
|---|
| 1186 | __HAL_LOCK(hi2s);
|
|---|
| 1187 |
|
|---|
| 1188 | if (hi2s->State != HAL_I2S_STATE_READY)
|
|---|
| 1189 | {
|
|---|
| 1190 | __HAL_UNLOCK(hi2s);
|
|---|
| 1191 | return HAL_BUSY;
|
|---|
| 1192 | }
|
|---|
| 1193 |
|
|---|
| 1194 | /* Set state and reset error code */
|
|---|
| 1195 | hi2s->State = HAL_I2S_STATE_BUSY_RX;
|
|---|
| 1196 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
|
|---|
| 1197 | hi2s->pRxBuffPtr = pData;
|
|---|
| 1198 |
|
|---|
| 1199 | tmpreg_cfgr = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN);
|
|---|
| 1200 |
|
|---|
| 1201 | if ((tmpreg_cfgr == I2S_DATAFORMAT_24B) || (tmpreg_cfgr == I2S_DATAFORMAT_32B))
|
|---|
| 1202 | {
|
|---|
| 1203 | hi2s->RxXferSize = (Size << 1U);
|
|---|
| 1204 | hi2s->RxXferCount = (Size << 1U);
|
|---|
| 1205 | }
|
|---|
| 1206 | else
|
|---|
| 1207 | {
|
|---|
| 1208 | hi2s->RxXferSize = Size;
|
|---|
| 1209 | hi2s->RxXferCount = Size;
|
|---|
| 1210 | }
|
|---|
| 1211 |
|
|---|
| 1212 | /* Set the I2S Rx DMA Half transfer complete callback */
|
|---|
| 1213 | hi2s->hdmarx->XferHalfCpltCallback = I2S_DMARxHalfCplt;
|
|---|
| 1214 |
|
|---|
| 1215 | /* Set the I2S Rx DMA transfer complete callback */
|
|---|
| 1216 | hi2s->hdmarx->XferCpltCallback = I2S_DMARxCplt;
|
|---|
| 1217 |
|
|---|
| 1218 | /* Set the DMA error callback */
|
|---|
| 1219 | hi2s->hdmarx->XferErrorCallback = I2S_DMAError;
|
|---|
| 1220 |
|
|---|
| 1221 | /* Check if Master Receiver mode is selected */
|
|---|
| 1222 | if ((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_RX)
|
|---|
| 1223 | {
|
|---|
| 1224 | /* Clear the Overrun Flag by a read operation to the SPI_DR register followed by a read
|
|---|
| 1225 | access to the SPI_SR register. */
|
|---|
| 1226 | __HAL_I2S_CLEAR_OVRFLAG(hi2s);
|
|---|
| 1227 | }
|
|---|
| 1228 |
|
|---|
| 1229 | /* Enable the Rx DMA Stream/Channel */
|
|---|
| 1230 | if (HAL_OK != HAL_DMA_Start_IT(hi2s->hdmarx, (uint32_t)&hi2s->Instance->DR, (uint32_t)hi2s->pRxBuffPtr, hi2s->RxXferSize))
|
|---|
| 1231 | {
|
|---|
| 1232 | /* Update SPI error code */
|
|---|
| 1233 | SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_DMA);
|
|---|
| 1234 | hi2s->State = HAL_I2S_STATE_READY;
|
|---|
| 1235 |
|
|---|
| 1236 | __HAL_UNLOCK(hi2s);
|
|---|
| 1237 | return HAL_ERROR;
|
|---|
| 1238 | }
|
|---|
| 1239 |
|
|---|
| 1240 | /* Check if the I2S is already enabled */
|
|---|
| 1241 | if (HAL_IS_BIT_CLR(hi2s->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
|
|---|
| 1242 | {
|
|---|
| 1243 | /* Enable I2S peripheral */
|
|---|
| 1244 | __HAL_I2S_ENABLE(hi2s);
|
|---|
| 1245 | }
|
|---|
| 1246 |
|
|---|
| 1247 | /* Check if the I2S Rx request is already enabled */
|
|---|
| 1248 | if (HAL_IS_BIT_CLR(hi2s->Instance->CR2, SPI_CR2_RXDMAEN))
|
|---|
| 1249 | {
|
|---|
| 1250 | /* Enable Rx DMA Request */
|
|---|
| 1251 | SET_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN);
|
|---|
| 1252 | }
|
|---|
| 1253 |
|
|---|
| 1254 | __HAL_UNLOCK(hi2s);
|
|---|
| 1255 | return HAL_OK;
|
|---|
| 1256 | }
|
|---|
| 1257 |
|
|---|
| 1258 | /**
|
|---|
| 1259 | * @brief Pauses the audio DMA Stream/Channel playing from the Media.
|
|---|
| 1260 | * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
|
|---|
| 1261 | * the configuration information for I2S module
|
|---|
| 1262 | * @retval HAL status
|
|---|
| 1263 | */
|
|---|
| 1264 | HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s)
|
|---|
| 1265 | {
|
|---|
| 1266 | /* Process Locked */
|
|---|
| 1267 | __HAL_LOCK(hi2s);
|
|---|
| 1268 |
|
|---|
| 1269 | if (hi2s->State == HAL_I2S_STATE_BUSY_TX)
|
|---|
| 1270 | {
|
|---|
| 1271 | /* Disable the I2S DMA Tx request */
|
|---|
| 1272 | CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN);
|
|---|
| 1273 | }
|
|---|
| 1274 | else if (hi2s->State == HAL_I2S_STATE_BUSY_RX)
|
|---|
| 1275 | {
|
|---|
| 1276 | /* Disable the I2S DMA Rx request */
|
|---|
| 1277 | CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN);
|
|---|
| 1278 | }
|
|---|
| 1279 | else
|
|---|
| 1280 | {
|
|---|
| 1281 | /* nothing to do */
|
|---|
| 1282 | }
|
|---|
| 1283 |
|
|---|
| 1284 | /* Process Unlocked */
|
|---|
| 1285 | __HAL_UNLOCK(hi2s);
|
|---|
| 1286 |
|
|---|
| 1287 | return HAL_OK;
|
|---|
| 1288 | }
|
|---|
| 1289 |
|
|---|
| 1290 | /**
|
|---|
| 1291 | * @brief Resumes the audio DMA Stream/Channel playing from the Media.
|
|---|
| 1292 | * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
|
|---|
| 1293 | * the configuration information for I2S module
|
|---|
| 1294 | * @retval HAL status
|
|---|
| 1295 | */
|
|---|
| 1296 | HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s)
|
|---|
| 1297 | {
|
|---|
| 1298 | /* Process Locked */
|
|---|
| 1299 | __HAL_LOCK(hi2s);
|
|---|
| 1300 |
|
|---|
| 1301 | if (hi2s->State == HAL_I2S_STATE_BUSY_TX)
|
|---|
| 1302 | {
|
|---|
| 1303 | /* Enable the I2S DMA Tx request */
|
|---|
| 1304 | SET_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN);
|
|---|
| 1305 | }
|
|---|
| 1306 | else if (hi2s->State == HAL_I2S_STATE_BUSY_RX)
|
|---|
| 1307 | {
|
|---|
| 1308 | /* Enable the I2S DMA Rx request */
|
|---|
| 1309 | SET_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN);
|
|---|
| 1310 | }
|
|---|
| 1311 | else
|
|---|
| 1312 | {
|
|---|
| 1313 | /* nothing to do */
|
|---|
| 1314 | }
|
|---|
| 1315 |
|
|---|
| 1316 | /* If the I2S peripheral is still not enabled, enable it */
|
|---|
| 1317 | if (HAL_IS_BIT_CLR(hi2s->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
|
|---|
| 1318 | {
|
|---|
| 1319 | /* Enable I2S peripheral */
|
|---|
| 1320 | __HAL_I2S_ENABLE(hi2s);
|
|---|
| 1321 | }
|
|---|
| 1322 |
|
|---|
| 1323 | /* Process Unlocked */
|
|---|
| 1324 | __HAL_UNLOCK(hi2s);
|
|---|
| 1325 |
|
|---|
| 1326 | return HAL_OK;
|
|---|
| 1327 | }
|
|---|
| 1328 |
|
|---|
| 1329 | /**
|
|---|
| 1330 | * @brief Stops the audio DMA Stream/Channel playing from the Media.
|
|---|
| 1331 | * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
|
|---|
| 1332 | * the configuration information for I2S module
|
|---|
| 1333 | * @retval HAL status
|
|---|
| 1334 | */
|
|---|
| 1335 | HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s)
|
|---|
| 1336 | {
|
|---|
| 1337 | HAL_StatusTypeDef errorcode = HAL_OK;
|
|---|
| 1338 | /* The Lock is not implemented on this API to allow the user application
|
|---|
| 1339 | to call the HAL SPI API under callbacks HAL_I2S_TxCpltCallback() or HAL_I2S_RxCpltCallback()
|
|---|
| 1340 | when calling HAL_DMA_Abort() API the DMA TX or RX Transfer complete interrupt is generated
|
|---|
| 1341 | and the correspond call back is executed HAL_I2S_TxCpltCallback() or HAL_I2S_RxCpltCallback()
|
|---|
| 1342 | */
|
|---|
| 1343 |
|
|---|
| 1344 | /* Disable the I2S Tx/Rx DMA requests */
|
|---|
| 1345 | CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN);
|
|---|
| 1346 | CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN);
|
|---|
| 1347 |
|
|---|
| 1348 | /* Abort the I2S DMA tx Stream/Channel */
|
|---|
| 1349 | if (hi2s->hdmatx != NULL)
|
|---|
| 1350 | {
|
|---|
| 1351 | /* Disable the I2S DMA tx Stream/Channel */
|
|---|
| 1352 | if (HAL_OK != HAL_DMA_Abort(hi2s->hdmatx))
|
|---|
| 1353 | {
|
|---|
| 1354 | SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_DMA);
|
|---|
| 1355 | errorcode = HAL_ERROR;
|
|---|
| 1356 | }
|
|---|
| 1357 | }
|
|---|
| 1358 |
|
|---|
| 1359 | /* Abort the I2S DMA rx Stream/Channel */
|
|---|
| 1360 | if (hi2s->hdmarx != NULL)
|
|---|
| 1361 | {
|
|---|
| 1362 | /* Disable the I2S DMA rx Stream/Channel */
|
|---|
| 1363 | if (HAL_OK != HAL_DMA_Abort(hi2s->hdmarx))
|
|---|
| 1364 | {
|
|---|
| 1365 | SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_DMA);
|
|---|
| 1366 | errorcode = HAL_ERROR;
|
|---|
| 1367 | }
|
|---|
| 1368 | }
|
|---|
| 1369 |
|
|---|
| 1370 | /* Disable I2S peripheral */
|
|---|
| 1371 | __HAL_I2S_DISABLE(hi2s);
|
|---|
| 1372 |
|
|---|
| 1373 | hi2s->State = HAL_I2S_STATE_READY;
|
|---|
| 1374 |
|
|---|
| 1375 | return errorcode;
|
|---|
| 1376 | }
|
|---|
| 1377 |
|
|---|
| 1378 | /**
|
|---|
| 1379 | * @brief This function handles I2S interrupt request.
|
|---|
| 1380 | * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
|
|---|
| 1381 | * the configuration information for I2S module
|
|---|
| 1382 | * @retval None
|
|---|
| 1383 | */
|
|---|
| 1384 | void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s)
|
|---|
| 1385 | {
|
|---|
| 1386 | uint32_t itsource = hi2s->Instance->CR2;
|
|---|
| 1387 | uint32_t itflag = hi2s->Instance->SR;
|
|---|
| 1388 |
|
|---|
| 1389 | /* I2S in mode Receiver ------------------------------------------------*/
|
|---|
| 1390 | if ((I2S_CHECK_FLAG(itflag, I2S_FLAG_OVR) == RESET) &&
|
|---|
| 1391 | (I2S_CHECK_FLAG(itflag, I2S_FLAG_RXNE) != RESET) && (I2S_CHECK_IT_SOURCE(itsource, I2S_IT_RXNE) != RESET))
|
|---|
| 1392 | {
|
|---|
| 1393 | I2S_Receive_IT(hi2s);
|
|---|
| 1394 | return;
|
|---|
| 1395 | }
|
|---|
| 1396 |
|
|---|
| 1397 | /* I2S in mode Tramitter -----------------------------------------------*/
|
|---|
| 1398 | if ((I2S_CHECK_FLAG(itflag, I2S_FLAG_TXE) != RESET) && (I2S_CHECK_IT_SOURCE(itsource, I2S_IT_TXE) != RESET))
|
|---|
| 1399 | {
|
|---|
| 1400 | I2S_Transmit_IT(hi2s);
|
|---|
| 1401 | return;
|
|---|
| 1402 | }
|
|---|
| 1403 |
|
|---|
| 1404 | /* I2S interrupt error -------------------------------------------------*/
|
|---|
| 1405 | if (I2S_CHECK_IT_SOURCE(itsource, I2S_IT_ERR) != RESET)
|
|---|
| 1406 | {
|
|---|
| 1407 | /* I2S Overrun error interrupt occurred ---------------------------------*/
|
|---|
| 1408 | if (I2S_CHECK_FLAG(itflag, I2S_FLAG_OVR) != RESET)
|
|---|
| 1409 | {
|
|---|
| 1410 | /* Disable RXNE and ERR interrupt */
|
|---|
| 1411 | __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
|
|---|
| 1412 |
|
|---|
| 1413 | /* Set the error code and execute error callback*/
|
|---|
| 1414 | SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_OVR);
|
|---|
| 1415 | }
|
|---|
| 1416 |
|
|---|
| 1417 | /* I2S Underrun error interrupt occurred --------------------------------*/
|
|---|
| 1418 | if (I2S_CHECK_FLAG(itflag, I2S_FLAG_UDR) != RESET)
|
|---|
| 1419 | {
|
|---|
| 1420 | /* Disable TXE and ERR interrupt */
|
|---|
| 1421 | __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
|
|---|
| 1422 |
|
|---|
| 1423 | /* Set the error code and execute error callback*/
|
|---|
| 1424 | SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_UDR);
|
|---|
| 1425 | }
|
|---|
| 1426 |
|
|---|
| 1427 | /* Set the I2S State ready */
|
|---|
| 1428 | hi2s->State = HAL_I2S_STATE_READY;
|
|---|
| 1429 |
|
|---|
| 1430 | /* Call user error callback */
|
|---|
| 1431 | #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
|
|---|
| 1432 | hi2s->ErrorCallback(hi2s);
|
|---|
| 1433 | #else
|
|---|
| 1434 | HAL_I2S_ErrorCallback(hi2s);
|
|---|
| 1435 | #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
|
|---|
| 1436 | }
|
|---|
| 1437 | }
|
|---|
| 1438 |
|
|---|
| 1439 | /**
|
|---|
| 1440 | * @brief Tx Transfer Half completed callbacks
|
|---|
| 1441 | * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
|
|---|
| 1442 | * the configuration information for I2S module
|
|---|
| 1443 | * @retval None
|
|---|
| 1444 | */
|
|---|
| 1445 | __weak void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s)
|
|---|
| 1446 | {
|
|---|
| 1447 | /* Prevent unused argument(s) compilation warning */
|
|---|
| 1448 | UNUSED(hi2s);
|
|---|
| 1449 |
|
|---|
| 1450 | /* NOTE : This function Should not be modified, when the callback is needed,
|
|---|
| 1451 | the HAL_I2S_TxHalfCpltCallback could be implemented in the user file
|
|---|
| 1452 | */
|
|---|
| 1453 | }
|
|---|
| 1454 |
|
|---|
| 1455 | /**
|
|---|
| 1456 | * @brief Tx Transfer completed callbacks
|
|---|
| 1457 | * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
|
|---|
| 1458 | * the configuration information for I2S module
|
|---|
| 1459 | * @retval None
|
|---|
| 1460 | */
|
|---|
| 1461 | __weak void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s)
|
|---|
| 1462 | {
|
|---|
| 1463 | /* Prevent unused argument(s) compilation warning */
|
|---|
| 1464 | UNUSED(hi2s);
|
|---|
| 1465 |
|
|---|
| 1466 | /* NOTE : This function Should not be modified, when the callback is needed,
|
|---|
| 1467 | the HAL_I2S_TxCpltCallback could be implemented in the user file
|
|---|
| 1468 | */
|
|---|
| 1469 | }
|
|---|
| 1470 |
|
|---|
| 1471 | /**
|
|---|
| 1472 | * @brief Rx Transfer half completed callbacks
|
|---|
| 1473 | * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
|
|---|
| 1474 | * the configuration information for I2S module
|
|---|
| 1475 | * @retval None
|
|---|
| 1476 | */
|
|---|
| 1477 | __weak void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s)
|
|---|
| 1478 | {
|
|---|
| 1479 | /* Prevent unused argument(s) compilation warning */
|
|---|
| 1480 | UNUSED(hi2s);
|
|---|
| 1481 |
|
|---|
| 1482 | /* NOTE : This function Should not be modified, when the callback is needed,
|
|---|
| 1483 | the HAL_I2S_RxHalfCpltCallback could be implemented in the user file
|
|---|
| 1484 | */
|
|---|
| 1485 | }
|
|---|
| 1486 |
|
|---|
| 1487 | /**
|
|---|
| 1488 | * @brief Rx Transfer completed callbacks
|
|---|
| 1489 | * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
|
|---|
| 1490 | * the configuration information for I2S module
|
|---|
| 1491 | * @retval None
|
|---|
| 1492 | */
|
|---|
| 1493 | __weak void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s)
|
|---|
| 1494 | {
|
|---|
| 1495 | /* Prevent unused argument(s) compilation warning */
|
|---|
| 1496 | UNUSED(hi2s);
|
|---|
| 1497 |
|
|---|
| 1498 | /* NOTE : This function Should not be modified, when the callback is needed,
|
|---|
| 1499 | the HAL_I2S_RxCpltCallback could be implemented in the user file
|
|---|
| 1500 | */
|
|---|
| 1501 | }
|
|---|
| 1502 |
|
|---|
| 1503 | /**
|
|---|
| 1504 | * @brief I2S error callbacks
|
|---|
| 1505 | * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
|
|---|
| 1506 | * the configuration information for I2S module
|
|---|
| 1507 | * @retval None
|
|---|
| 1508 | */
|
|---|
| 1509 | __weak void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s)
|
|---|
| 1510 | {
|
|---|
| 1511 | /* Prevent unused argument(s) compilation warning */
|
|---|
| 1512 | UNUSED(hi2s);
|
|---|
| 1513 |
|
|---|
| 1514 | /* NOTE : This function Should not be modified, when the callback is needed,
|
|---|
| 1515 | the HAL_I2S_ErrorCallback could be implemented in the user file
|
|---|
| 1516 | */
|
|---|
| 1517 | }
|
|---|
| 1518 |
|
|---|
| 1519 | /**
|
|---|
| 1520 | * @}
|
|---|
| 1521 | */
|
|---|
| 1522 |
|
|---|
| 1523 | /** @defgroup I2S_Exported_Functions_Group3 Peripheral State and Errors functions
|
|---|
| 1524 | * @brief Peripheral State functions
|
|---|
| 1525 | *
|
|---|
| 1526 | @verbatim
|
|---|
| 1527 | ===============================================================================
|
|---|
| 1528 | ##### Peripheral State and Errors functions #####
|
|---|
| 1529 | ===============================================================================
|
|---|
| 1530 | [..]
|
|---|
| 1531 | This subsection permits to get in run-time the status of the peripheral
|
|---|
| 1532 | and the data flow.
|
|---|
| 1533 |
|
|---|
| 1534 | @endverbatim
|
|---|
| 1535 | * @{
|
|---|
| 1536 | */
|
|---|
| 1537 |
|
|---|
| 1538 | /**
|
|---|
| 1539 | * @brief Return the I2S state
|
|---|
| 1540 | * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
|
|---|
| 1541 | * the configuration information for I2S module
|
|---|
| 1542 | * @retval HAL state
|
|---|
| 1543 | */
|
|---|
| 1544 | HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s)
|
|---|
| 1545 | {
|
|---|
| 1546 | return hi2s->State;
|
|---|
| 1547 | }
|
|---|
| 1548 |
|
|---|
| 1549 | /**
|
|---|
| 1550 | * @brief Return the I2S error code
|
|---|
| 1551 | * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
|
|---|
| 1552 | * the configuration information for I2S module
|
|---|
| 1553 | * @retval I2S Error Code
|
|---|
| 1554 | */
|
|---|
| 1555 | uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s)
|
|---|
| 1556 | {
|
|---|
| 1557 | return hi2s->ErrorCode;
|
|---|
| 1558 | }
|
|---|
| 1559 | /**
|
|---|
| 1560 | * @}
|
|---|
| 1561 | */
|
|---|
| 1562 |
|
|---|
| 1563 | /**
|
|---|
| 1564 | * @}
|
|---|
| 1565 | */
|
|---|
| 1566 |
|
|---|
| 1567 | /** @addtogroup I2S_Private_Functions I2S Private Functions
|
|---|
| 1568 | * @{
|
|---|
| 1569 | */
|
|---|
| 1570 | /**
|
|---|
| 1571 | * @brief DMA I2S transmit process complete callback
|
|---|
| 1572 | * @param hdma pointer to a DMA_HandleTypeDef structure that contains
|
|---|
| 1573 | * the configuration information for the specified DMA module.
|
|---|
| 1574 | * @retval None
|
|---|
| 1575 | */
|
|---|
| 1576 | static void I2S_DMATxCplt(DMA_HandleTypeDef *hdma)
|
|---|
| 1577 | {
|
|---|
| 1578 | I2S_HandleTypeDef *hi2s = (I2S_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; /* Derogation MISRAC2012-Rule-11.5 */
|
|---|
| 1579 |
|
|---|
| 1580 | /* if DMA is configured in DMA_NORMAL Mode */
|
|---|
| 1581 | if (hdma->Init.Mode == DMA_NORMAL)
|
|---|
| 1582 | {
|
|---|
| 1583 | /* Disable Tx DMA Request */
|
|---|
| 1584 | CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN);
|
|---|
| 1585 |
|
|---|
| 1586 | hi2s->TxXferCount = 0U;
|
|---|
| 1587 | hi2s->State = HAL_I2S_STATE_READY;
|
|---|
| 1588 | }
|
|---|
| 1589 | /* Call user Tx complete callback */
|
|---|
| 1590 | #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
|
|---|
| 1591 | hi2s->TxCpltCallback(hi2s);
|
|---|
| 1592 | #else
|
|---|
| 1593 | HAL_I2S_TxCpltCallback(hi2s);
|
|---|
| 1594 | #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
|
|---|
| 1595 | }
|
|---|
| 1596 |
|
|---|
| 1597 | /**
|
|---|
| 1598 | * @brief DMA I2S transmit process half complete callback
|
|---|
| 1599 | * @param hdma pointer to a DMA_HandleTypeDef structure that contains
|
|---|
| 1600 | * the configuration information for the specified DMA module.
|
|---|
| 1601 | * @retval None
|
|---|
| 1602 | */
|
|---|
| 1603 | static void I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
|
|---|
| 1604 | {
|
|---|
| 1605 | I2S_HandleTypeDef *hi2s = (I2S_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; /* Derogation MISRAC2012-Rule-11.5 */
|
|---|
| 1606 |
|
|---|
| 1607 | /* Call user Tx half complete callback */
|
|---|
| 1608 | #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
|
|---|
| 1609 | hi2s->TxHalfCpltCallback(hi2s);
|
|---|
| 1610 | #else
|
|---|
| 1611 | HAL_I2S_TxHalfCpltCallback(hi2s);
|
|---|
| 1612 | #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
|
|---|
| 1613 | }
|
|---|
| 1614 |
|
|---|
| 1615 | /**
|
|---|
| 1616 | * @brief DMA I2S receive process complete callback
|
|---|
| 1617 | * @param hdma pointer to a DMA_HandleTypeDef structure that contains
|
|---|
| 1618 | * the configuration information for the specified DMA module.
|
|---|
| 1619 | * @retval None
|
|---|
| 1620 | */
|
|---|
| 1621 | static void I2S_DMARxCplt(DMA_HandleTypeDef *hdma)
|
|---|
| 1622 | {
|
|---|
| 1623 | I2S_HandleTypeDef *hi2s = (I2S_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; /* Derogation MISRAC2012-Rule-11.5 */
|
|---|
| 1624 |
|
|---|
| 1625 | /* if DMA is configured in DMA_NORMAL Mode */
|
|---|
| 1626 | if (hdma->Init.Mode == DMA_NORMAL)
|
|---|
| 1627 | {
|
|---|
| 1628 | /* Disable Rx DMA Request */
|
|---|
| 1629 | CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN);
|
|---|
| 1630 | hi2s->RxXferCount = 0U;
|
|---|
| 1631 | hi2s->State = HAL_I2S_STATE_READY;
|
|---|
| 1632 | }
|
|---|
| 1633 | /* Call user Rx complete callback */
|
|---|
| 1634 | #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
|
|---|
| 1635 | hi2s->RxCpltCallback(hi2s);
|
|---|
| 1636 | #else
|
|---|
| 1637 | HAL_I2S_RxCpltCallback(hi2s);
|
|---|
| 1638 | #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
|
|---|
| 1639 | }
|
|---|
| 1640 |
|
|---|
| 1641 | /**
|
|---|
| 1642 | * @brief DMA I2S receive process half complete callback
|
|---|
| 1643 | * @param hdma pointer to a DMA_HandleTypeDef structure that contains
|
|---|
| 1644 | * the configuration information for the specified DMA module.
|
|---|
| 1645 | * @retval None
|
|---|
| 1646 | */
|
|---|
| 1647 | static void I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
|
|---|
| 1648 | {
|
|---|
| 1649 | I2S_HandleTypeDef *hi2s = (I2S_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; /* Derogation MISRAC2012-Rule-11.5 */
|
|---|
| 1650 |
|
|---|
| 1651 | /* Call user Rx half complete callback */
|
|---|
| 1652 | #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
|
|---|
| 1653 | hi2s->RxHalfCpltCallback(hi2s);
|
|---|
| 1654 | #else
|
|---|
| 1655 | HAL_I2S_RxHalfCpltCallback(hi2s);
|
|---|
| 1656 | #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
|
|---|
| 1657 | }
|
|---|
| 1658 |
|
|---|
| 1659 | /**
|
|---|
| 1660 | * @brief DMA I2S communication error callback
|
|---|
| 1661 | * @param hdma pointer to a DMA_HandleTypeDef structure that contains
|
|---|
| 1662 | * the configuration information for the specified DMA module.
|
|---|
| 1663 | * @retval None
|
|---|
| 1664 | */
|
|---|
| 1665 | static void I2S_DMAError(DMA_HandleTypeDef *hdma)
|
|---|
| 1666 | {
|
|---|
| 1667 | I2S_HandleTypeDef *hi2s = (I2S_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; /* Derogation MISRAC2012-Rule-11.5 */
|
|---|
| 1668 |
|
|---|
| 1669 | /* Disable Rx and Tx DMA Request */
|
|---|
| 1670 | CLEAR_BIT(hi2s->Instance->CR2, (SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN));
|
|---|
| 1671 | hi2s->TxXferCount = 0U;
|
|---|
| 1672 | hi2s->RxXferCount = 0U;
|
|---|
| 1673 |
|
|---|
| 1674 | hi2s->State = HAL_I2S_STATE_READY;
|
|---|
| 1675 |
|
|---|
| 1676 | /* Set the error code and execute error callback*/
|
|---|
| 1677 | SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_DMA);
|
|---|
| 1678 | /* Call user error callback */
|
|---|
| 1679 | #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
|
|---|
| 1680 | hi2s->ErrorCallback(hi2s);
|
|---|
| 1681 | #else
|
|---|
| 1682 | HAL_I2S_ErrorCallback(hi2s);
|
|---|
| 1683 | #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
|
|---|
| 1684 | }
|
|---|
| 1685 |
|
|---|
| 1686 | /**
|
|---|
| 1687 | * @brief Transmit an amount of data in non-blocking mode with Interrupt
|
|---|
| 1688 | * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
|
|---|
| 1689 | * the configuration information for I2S module
|
|---|
| 1690 | * @retval None
|
|---|
| 1691 | */
|
|---|
| 1692 | static void I2S_Transmit_IT(I2S_HandleTypeDef *hi2s)
|
|---|
| 1693 | {
|
|---|
| 1694 | /* Transmit data */
|
|---|
| 1695 | hi2s->Instance->DR = (*hi2s->pTxBuffPtr);
|
|---|
| 1696 | hi2s->pTxBuffPtr++;
|
|---|
| 1697 | hi2s->TxXferCount--;
|
|---|
| 1698 |
|
|---|
| 1699 | if (hi2s->TxXferCount == 0U)
|
|---|
| 1700 | {
|
|---|
| 1701 | /* Disable TXE and ERR interrupt */
|
|---|
| 1702 | __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
|
|---|
| 1703 |
|
|---|
| 1704 | hi2s->State = HAL_I2S_STATE_READY;
|
|---|
| 1705 | /* Call user Tx complete callback */
|
|---|
| 1706 | #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
|
|---|
| 1707 | hi2s->TxCpltCallback(hi2s);
|
|---|
| 1708 | #else
|
|---|
| 1709 | HAL_I2S_TxCpltCallback(hi2s);
|
|---|
| 1710 | #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
|
|---|
| 1711 | }
|
|---|
| 1712 | }
|
|---|
| 1713 |
|
|---|
| 1714 | /**
|
|---|
| 1715 | * @brief Receive an amount of data in non-blocking mode with Interrupt
|
|---|
| 1716 | * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
|
|---|
| 1717 | * the configuration information for I2S module
|
|---|
| 1718 | * @retval None
|
|---|
| 1719 | */
|
|---|
| 1720 | static void I2S_Receive_IT(I2S_HandleTypeDef *hi2s)
|
|---|
| 1721 | {
|
|---|
| 1722 | /* Receive data */
|
|---|
| 1723 | (*hi2s->pRxBuffPtr) = (uint16_t)hi2s->Instance->DR;
|
|---|
| 1724 | hi2s->pRxBuffPtr++;
|
|---|
| 1725 | hi2s->RxXferCount--;
|
|---|
| 1726 |
|
|---|
| 1727 | if (hi2s->RxXferCount == 0U)
|
|---|
| 1728 | {
|
|---|
| 1729 | /* Disable RXNE and ERR interrupt */
|
|---|
| 1730 | __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
|
|---|
| 1731 |
|
|---|
| 1732 | hi2s->State = HAL_I2S_STATE_READY;
|
|---|
| 1733 | /* Call user Rx complete callback */
|
|---|
| 1734 | #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
|
|---|
| 1735 | hi2s->RxCpltCallback(hi2s);
|
|---|
| 1736 | #else
|
|---|
| 1737 | HAL_I2S_RxCpltCallback(hi2s);
|
|---|
| 1738 | #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
|
|---|
| 1739 | }
|
|---|
| 1740 | }
|
|---|
| 1741 |
|
|---|
| 1742 | /**
|
|---|
| 1743 | * @brief This function handles I2S Communication Timeout.
|
|---|
| 1744 | * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
|
|---|
| 1745 | * the configuration information for I2S module
|
|---|
| 1746 | * @param Flag Flag checked
|
|---|
| 1747 | * @param State Value of the flag expected
|
|---|
| 1748 | * @param Timeout Duration of the timeout
|
|---|
| 1749 | * @retval HAL status
|
|---|
| 1750 | */
|
|---|
| 1751 | static HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, FlagStatus State, uint32_t Timeout)
|
|---|
| 1752 | {
|
|---|
| 1753 | uint32_t tickstart;
|
|---|
| 1754 |
|
|---|
| 1755 | /* Get tick */
|
|---|
| 1756 | tickstart = HAL_GetTick();
|
|---|
| 1757 |
|
|---|
| 1758 | /* Wait until flag is set to status*/
|
|---|
| 1759 | while (((__HAL_I2S_GET_FLAG(hi2s, Flag)) ? SET : RESET) != State)
|
|---|
| 1760 | {
|
|---|
| 1761 | if (Timeout != HAL_MAX_DELAY)
|
|---|
| 1762 | {
|
|---|
| 1763 | if (((HAL_GetTick() - tickstart) >= Timeout) || (Timeout == 0U))
|
|---|
| 1764 | {
|
|---|
| 1765 | /* Set the I2S State ready */
|
|---|
| 1766 | hi2s->State = HAL_I2S_STATE_READY;
|
|---|
| 1767 |
|
|---|
| 1768 | /* Process Unlocked */
|
|---|
| 1769 | __HAL_UNLOCK(hi2s);
|
|---|
| 1770 |
|
|---|
| 1771 | return HAL_TIMEOUT;
|
|---|
| 1772 | }
|
|---|
| 1773 | }
|
|---|
| 1774 | }
|
|---|
| 1775 | return HAL_OK;
|
|---|
| 1776 | }
|
|---|
| 1777 |
|
|---|
| 1778 | /**
|
|---|
| 1779 | * @}
|
|---|
| 1780 | */
|
|---|
| 1781 |
|
|---|
| 1782 | /**
|
|---|
| 1783 | * @}
|
|---|
| 1784 | */
|
|---|
| 1785 |
|
|---|
| 1786 | /**
|
|---|
| 1787 | * @}
|
|---|
| 1788 | */
|
|---|
| 1789 | #endif /* SPI_I2S_SUPPORT */
|
|---|
| 1790 |
|
|---|
| 1791 | #endif /* HAL_I2S_MODULE_ENABLED */
|
|---|
| 1792 |
|
|---|
| 1793 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
|---|