source: trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_uart.h

Last change on this file was 6, checked in by f.jahn, 8 months ago
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1/**
2 ******************************************************************************
3 * @file stm32g0xx_hal_uart.h
4 * @author MCD Application Team
5 * @brief Header file of UART HAL module.
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>&copy; Copyright (c) 2018 STMicroelectronics.
10 * All rights reserved.</center></h2>
11 *
12 * This software component is licensed by ST under BSD 3-Clause license,
13 * the "License"; You may not use this file except in compliance with the
14 * License. You may obtain a copy of the License at:
15 * opensource.org/licenses/BSD-3-Clause
16 *
17 ******************************************************************************
18 */
19
20/* Define to prevent recursive inclusion -------------------------------------*/
21#ifndef STM32G0xx_HAL_UART_H
22#define STM32G0xx_HAL_UART_H
23
24#ifdef __cplusplus
25extern "C" {
26#endif
27
28/* Includes ------------------------------------------------------------------*/
29#include "stm32g0xx_hal_def.h"
30
31/** @addtogroup STM32G0xx_HAL_Driver
32 * @{
33 */
34
35/** @addtogroup UART
36 * @{
37 */
38
39/* Exported types ------------------------------------------------------------*/
40/** @defgroup UART_Exported_Types UART Exported Types
41 * @{
42 */
43
44/**
45 * @brief UART Init Structure definition
46 */
47typedef struct
48{
49 uint32_t BaudRate; /*!< This member configures the UART communication baud rate.
50 The baud rate register is computed using the following formula:
51 LPUART:
52 =======
53 Baud Rate Register = ((256 * lpuart_ker_ckpres) / ((huart->Init.BaudRate)))
54 where lpuart_ker_ck_pres is the UART input clock divided by a prescaler
55 UART:
56 =====
57 - If oversampling is 16 or in LIN mode,
58 Baud Rate Register = ((uart_ker_ckpres) / ((huart->Init.BaudRate)))
59 - If oversampling is 8,
60 Baud Rate Register[15:4] = ((2 * uart_ker_ckpres) / ((huart->Init.BaudRate)))[15:4]
61 Baud Rate Register[3] = 0
62 Baud Rate Register[2:0] = (((2 * uart_ker_ckpres) / ((huart->Init.BaudRate)))[3:0]) >> 1
63 where uart_ker_ck_pres is the UART input clock divided by a prescaler */
64
65 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
66 This parameter can be a value of @ref UARTEx_Word_Length. */
67
68 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
69 This parameter can be a value of @ref UART_Stop_Bits. */
70
71 uint32_t Parity; /*!< Specifies the parity mode.
72 This parameter can be a value of @ref UART_Parity
73 @note When parity is enabled, the computed parity is inserted
74 at the MSB position of the transmitted data (9th bit when
75 the word length is set to 9 data bits; 8th bit when the
76 word length is set to 8 data bits). */
77
78 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
79 This parameter can be a value of @ref UART_Mode. */
80
81 uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled
82 or disabled.
83 This parameter can be a value of @ref UART_Hardware_Flow_Control. */
84
85 uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to f_PCLK/8).
86 This parameter can be a value of @ref UART_Over_Sampling. */
87
88 uint32_t OneBitSampling; /*!< Specifies whether a single sample or three samples' majority vote is selected.
89 Selecting the single sample method increases the receiver tolerance to clock
90 deviations. This parameter can be a value of @ref UART_OneBit_Sampling. */
91
92 uint32_t ClockPrescaler; /*!< Specifies the prescaler value used to divide the UART clock source.
93 This parameter can be a value of @ref UART_ClockPrescaler. */
94
95} UART_InitTypeDef;
96
97/**
98 * @brief UART Advanced Features initialization structure definition
99 */
100typedef struct
101{
102 uint32_t AdvFeatureInit; /*!< Specifies which advanced UART features is initialized. Several
103 Advanced Features may be initialized at the same time .
104 This parameter can be a value of @ref UART_Advanced_Features_Initialization_Type. */
105
106 uint32_t TxPinLevelInvert; /*!< Specifies whether the TX pin active level is inverted.
107 This parameter can be a value of @ref UART_Tx_Inv. */
108
109 uint32_t RxPinLevelInvert; /*!< Specifies whether the RX pin active level is inverted.
110 This parameter can be a value of @ref UART_Rx_Inv. */
111
112 uint32_t DataInvert; /*!< Specifies whether data are inverted (positive/direct logic
113 vs negative/inverted logic).
114 This parameter can be a value of @ref UART_Data_Inv. */
115
116 uint32_t Swap; /*!< Specifies whether TX and RX pins are swapped.
117 This parameter can be a value of @ref UART_Rx_Tx_Swap. */
118
119 uint32_t OverrunDisable; /*!< Specifies whether the reception overrun detection is disabled.
120 This parameter can be a value of @ref UART_Overrun_Disable. */
121
122 uint32_t DMADisableonRxError; /*!< Specifies whether the DMA is disabled in case of reception error.
123 This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error. */
124
125 uint32_t AutoBaudRateEnable; /*!< Specifies whether auto Baud rate detection is enabled.
126 This parameter can be a value of @ref UART_AutoBaudRate_Enable. */
127
128 uint32_t AutoBaudRateMode; /*!< If auto Baud rate detection is enabled, specifies how the rate
129 detection is carried out.
130 This parameter can be a value of @ref UART_AutoBaud_Rate_Mode. */
131
132 uint32_t MSBFirst; /*!< Specifies whether MSB is sent first on UART line.
133 This parameter can be a value of @ref UART_MSB_First. */
134} UART_AdvFeatureInitTypeDef;
135
136
137
138/**
139 * @brief HAL UART State definition
140 * @note HAL UART State value is a combination of 2 different substates: gState and RxState (see @ref UART_State_Definition).
141 * - gState contains UART state information related to global Handle management
142 * and also information related to Tx operations.
143 * gState value coding follow below described bitmap :
144 * b7-b6 Error information
145 * 00 : No Error
146 * 01 : (Not Used)
147 * 10 : Timeout
148 * 11 : Error
149 * b5 Peripheral initialization status
150 * 0 : Reset (Peripheral not initialized)
151 * 1 : Init done (Peripheral not initialized. HAL UART Init function already called)
152 * b4-b3 (not used)
153 * xx : Should be set to 00
154 * b2 Intrinsic process state
155 * 0 : Ready
156 * 1 : Busy (Peripheral busy with some configuration or internal operations)
157 * b1 (not used)
158 * x : Should be set to 0
159 * b0 Tx state
160 * 0 : Ready (no Tx operation ongoing)
161 * 1 : Busy (Tx operation ongoing)
162 * - RxState contains information related to Rx operations.
163 * RxState value coding follow below described bitmap :
164 * b7-b6 (not used)
165 * xx : Should be set to 00
166 * b5 Peripheral initialization status
167 * 0 : Reset (Peripheral not initialized)
168 * 1 : Init done (Peripheral not initialized)
169 * b4-b2 (not used)
170 * xxx : Should be set to 000
171 * b1 Rx state
172 * 0 : Ready (no Rx operation ongoing)
173 * 1 : Busy (Rx operation ongoing)
174 * b0 (not used)
175 * x : Should be set to 0.
176 */
177typedef uint32_t HAL_UART_StateTypeDef;
178
179/**
180 * @brief UART clock sources definition
181 */
182typedef enum
183{
184 UART_CLOCKSOURCE_PCLK1 = 0x00U, /*!< PCLK1 clock source */
185 UART_CLOCKSOURCE_HSI = 0x02U, /*!< HSI clock source */
186 UART_CLOCKSOURCE_SYSCLK = 0x04U, /*!< SYSCLK clock source */
187 UART_CLOCKSOURCE_LSE = 0x08U, /*!< LSE clock source */
188 UART_CLOCKSOURCE_UNDEFINED = 0x10U /*!< Undefined clock source */
189} UART_ClockSourceTypeDef;
190
191/**
192 * @brief UART handle Structure definition
193 */
194typedef struct __UART_HandleTypeDef
195{
196 USART_TypeDef *Instance; /*!< UART registers base address */
197
198 UART_InitTypeDef Init; /*!< UART communication parameters */
199
200 UART_AdvFeatureInitTypeDef AdvancedInit; /*!< UART Advanced Features initialization parameters */
201
202 uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */
203
204 uint16_t TxXferSize; /*!< UART Tx Transfer size */
205
206 __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */
207
208 uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */
209
210 uint16_t RxXferSize; /*!< UART Rx Transfer size */
211
212 __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */
213
214 uint16_t Mask; /*!< UART Rx RDR register mask */
215
216 uint32_t FifoMode; /*!< Specifies if the FIFO mode is being used.
217 This parameter can be a value of @ref UARTEx_FIFO_mode. */
218
219 uint16_t NbRxDataToProcess; /*!< Number of data to process during RX ISR execution */
220
221 uint16_t NbTxDataToProcess; /*!< Number of data to process during TX ISR execution */
222
223 void (*RxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Rx IRQ handler */
224
225 void (*TxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Tx IRQ handler */
226
227 DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */
228
229 DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */
230
231 HAL_LockTypeDef Lock; /*!< Locking object */
232
233 __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management
234 and also related to Tx operations.
235 This parameter can be a value of @ref HAL_UART_StateTypeDef */
236
237 __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations.
238 This parameter can be a value of @ref HAL_UART_StateTypeDef */
239
240 __IO uint32_t ErrorCode; /*!< UART Error code */
241
242#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
243 void (* TxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Half Complete Callback */
244 void (* TxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Complete Callback */
245 void (* RxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Half Complete Callback */
246 void (* RxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Complete Callback */
247 void (* ErrorCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Error Callback */
248 void (* AbortCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Complete Callback */
249 void (* AbortTransmitCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Transmit Complete Callback */
250 void (* AbortReceiveCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Receive Complete Callback */
251 void (* WakeupCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Wakeup Callback */
252 void (* RxFifoFullCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Fifo Full Callback */
253 void (* TxFifoEmptyCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Fifo Empty Callback */
254
255 void (* MspInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp Init callback */
256 void (* MspDeInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp DeInit callback */
257#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
258
259} UART_HandleTypeDef;
260
261#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
262/**
263 * @brief HAL UART Callback ID enumeration definition
264 */
265typedef enum
266{
267 HAL_UART_TX_HALFCOMPLETE_CB_ID = 0x00U, /*!< UART Tx Half Complete Callback ID */
268 HAL_UART_TX_COMPLETE_CB_ID = 0x01U, /*!< UART Tx Complete Callback ID */
269 HAL_UART_RX_HALFCOMPLETE_CB_ID = 0x02U, /*!< UART Rx Half Complete Callback ID */
270 HAL_UART_RX_COMPLETE_CB_ID = 0x03U, /*!< UART Rx Complete Callback ID */
271 HAL_UART_ERROR_CB_ID = 0x04U, /*!< UART Error Callback ID */
272 HAL_UART_ABORT_COMPLETE_CB_ID = 0x05U, /*!< UART Abort Complete Callback ID */
273 HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID = 0x06U, /*!< UART Abort Transmit Complete Callback ID */
274 HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID = 0x07U, /*!< UART Abort Receive Complete Callback ID */
275 HAL_UART_WAKEUP_CB_ID = 0x08U, /*!< UART Wakeup Callback ID */
276 HAL_UART_RX_FIFO_FULL_CB_ID = 0x09U, /*!< UART Rx Fifo Full Callback ID */
277 HAL_UART_TX_FIFO_EMPTY_CB_ID = 0x0AU, /*!< UART Tx Fifo Empty Callback ID */
278
279 HAL_UART_MSPINIT_CB_ID = 0x0BU, /*!< UART MspInit callback ID */
280 HAL_UART_MSPDEINIT_CB_ID = 0x0CU /*!< UART MspDeInit callback ID */
281
282} HAL_UART_CallbackIDTypeDef;
283
284/**
285 * @brief HAL UART Callback pointer definition
286 */
287typedef void (*pUART_CallbackTypeDef)(UART_HandleTypeDef *huart); /*!< pointer to an UART callback function */
288
289#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
290
291/**
292 * @}
293 */
294
295/* Exported constants --------------------------------------------------------*/
296/** @defgroup UART_Exported_Constants UART Exported Constants
297 * @{
298 */
299
300/** @defgroup UART_State_Definition UART State Code Definition
301 * @{
302 */
303#define HAL_UART_STATE_RESET 0x00000000U /*!< Peripheral is not initialized
304 Value is allowed for gState and RxState */
305#define HAL_UART_STATE_READY 0x00000020U /*!< Peripheral Initialized and ready for use
306 Value is allowed for gState and RxState */
307#define HAL_UART_STATE_BUSY 0x00000024U /*!< an internal process is ongoing
308 Value is allowed for gState only */
309#define HAL_UART_STATE_BUSY_TX 0x00000021U /*!< Data Transmission process is ongoing
310 Value is allowed for gState only */
311#define HAL_UART_STATE_BUSY_RX 0x00000022U /*!< Data Reception process is ongoing
312 Value is allowed for RxState only */
313#define HAL_UART_STATE_BUSY_TX_RX 0x00000023U /*!< Data Transmission and Reception process is ongoing
314 Not to be used for neither gState nor RxState.
315 Value is result of combination (Or) between gState and RxState values */
316#define HAL_UART_STATE_TIMEOUT 0x000000A0U /*!< Timeout state
317 Value is allowed for gState only */
318#define HAL_UART_STATE_ERROR 0x000000E0U /*!< Error
319 Value is allowed for gState only */
320/**
321 * @}
322 */
323
324/** @defgroup UART_Error_Definition UART Error Definition
325 * @{
326 */
327#define HAL_UART_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */
328#define HAL_UART_ERROR_PE ((uint32_t)0x00000001U) /*!< Parity error */
329#define HAL_UART_ERROR_NE ((uint32_t)0x00000002U) /*!< Noise error */
330#define HAL_UART_ERROR_FE ((uint32_t)0x00000004U) /*!< Frame error */
331#define HAL_UART_ERROR_ORE ((uint32_t)0x00000008U) /*!< Overrun error */
332#define HAL_UART_ERROR_DMA ((uint32_t)0x00000010U) /*!< DMA transfer error */
333#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
334#define HAL_UART_ERROR_INVALID_CALLBACK ((uint32_t)0x00000020U) /*!< Invalid Callback error */
335#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
336/**
337 * @}
338 */
339
340/** @defgroup UART_Stop_Bits UART Number of Stop Bits
341 * @{
342 */
343#define UART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< UART frame with 0.5 stop bit */
344#define UART_STOPBITS_1 0x00000000U /*!< UART frame with 1 stop bit */
345#define UART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< UART frame with 1.5 stop bits */
346#define UART_STOPBITS_2 USART_CR2_STOP_1 /*!< UART frame with 2 stop bits */
347/**
348 * @}
349 */
350
351/** @defgroup UART_Parity UART Parity
352 * @{
353 */
354#define UART_PARITY_NONE 0x00000000U /*!< No parity */
355#define UART_PARITY_EVEN USART_CR1_PCE /*!< Even parity */
356#define UART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Odd parity */
357/**
358 * @}
359 */
360
361/** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control
362 * @{
363 */
364#define UART_HWCONTROL_NONE 0x00000000U /*!< No hardware control */
365#define UART_HWCONTROL_RTS USART_CR3_RTSE /*!< Request To Send */
366#define UART_HWCONTROL_CTS USART_CR3_CTSE /*!< Clear To Send */
367#define UART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< Request and Clear To Send */
368/**
369 * @}
370 */
371
372/** @defgroup UART_Mode UART Transfer Mode
373 * @{
374 */
375#define UART_MODE_RX USART_CR1_RE /*!< RX mode */
376#define UART_MODE_TX USART_CR1_TE /*!< TX mode */
377#define UART_MODE_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< RX and TX mode */
378/**
379 * @}
380 */
381
382/** @defgroup UART_State UART State
383 * @{
384 */
385#define UART_STATE_DISABLE 0x00000000U /*!< UART disabled */
386#define UART_STATE_ENABLE USART_CR1_UE /*!< UART enabled */
387/**
388 * @}
389 */
390
391/** @defgroup UART_Over_Sampling UART Over Sampling
392 * @{
393 */
394#define UART_OVERSAMPLING_16 0x00000000U /*!< Oversampling by 16 */
395#define UART_OVERSAMPLING_8 USART_CR1_OVER8 /*!< Oversampling by 8 */
396/**
397 * @}
398 */
399
400/** @defgroup UART_OneBit_Sampling UART One Bit Sampling Method
401 * @{
402 */
403#define UART_ONE_BIT_SAMPLE_DISABLE 0x00000000U /*!< One-bit sampling disable */
404#define UART_ONE_BIT_SAMPLE_ENABLE USART_CR3_ONEBIT /*!< One-bit sampling enable */
405/**
406 * @}
407 */
408
409/** @defgroup UART_ClockPrescaler UART Clock Prescaler
410 * @{
411 */
412#define UART_PRESCALER_DIV1 0x00000000U /*!< fclk_pres = fclk */
413#define UART_PRESCALER_DIV2 0x00000001U /*!< fclk_pres = fclk/2 */
414#define UART_PRESCALER_DIV4 0x00000002U /*!< fclk_pres = fclk/4 */
415#define UART_PRESCALER_DIV6 0x00000003U /*!< fclk_pres = fclk/6 */
416#define UART_PRESCALER_DIV8 0x00000004U /*!< fclk_pres = fclk/8 */
417#define UART_PRESCALER_DIV10 0x00000005U /*!< fclk_pres = fclk/10 */
418#define UART_PRESCALER_DIV12 0x00000006U /*!< fclk_pres = fclk/12 */
419#define UART_PRESCALER_DIV16 0x00000007U /*!< fclk_pres = fclk/16 */
420#define UART_PRESCALER_DIV32 0x00000008U /*!< fclk_pres = fclk/32 */
421#define UART_PRESCALER_DIV64 0x00000009U /*!< fclk_pres = fclk/64 */
422#define UART_PRESCALER_DIV128 0x0000000AU /*!< fclk_pres = fclk/128 */
423#define UART_PRESCALER_DIV256 0x0000000BU /*!< fclk_pres = fclk/256 */
424/**
425 * @}
426 */
427
428/** @defgroup UART_AutoBaud_Rate_Mode UART Advanced Feature AutoBaud Rate Mode
429 * @{
430 */
431#define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT 0x00000000U /*!< Auto Baud rate detection on start bit */
432#define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE USART_CR2_ABRMODE_0 /*!< Auto Baud rate detection on falling edge */
433#define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME USART_CR2_ABRMODE_1 /*!< Auto Baud rate detection on 0x7F frame detection */
434#define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME USART_CR2_ABRMODE /*!< Auto Baud rate detection on 0x55 frame detection */
435/**
436 * @}
437 */
438
439/** @defgroup UART_Receiver_TimeOut UART Receiver TimeOut
440 * @{
441 */
442#define UART_RECEIVER_TIMEOUT_DISABLE 0x00000000U /*!< UART receiver timeout disable */
443#define UART_RECEIVER_TIMEOUT_ENABLE USART_CR2_RTOEN /*!< UART receiver timeout enable */
444/**
445 * @}
446 */
447
448/** @defgroup UART_LIN UART Local Interconnection Network mode
449 * @{
450 */
451#define UART_LIN_DISABLE 0x00000000U /*!< Local Interconnect Network disable */
452#define UART_LIN_ENABLE USART_CR2_LINEN /*!< Local Interconnect Network enable */
453/**
454 * @}
455 */
456
457/** @defgroup UART_LIN_Break_Detection UART LIN Break Detection
458 * @{
459 */
460#define UART_LINBREAKDETECTLENGTH_10B 0x00000000U /*!< LIN 10-bit break detection length */
461#define UART_LINBREAKDETECTLENGTH_11B USART_CR2_LBDL /*!< LIN 11-bit break detection length */
462/**
463 * @}
464 */
465
466/** @defgroup UART_DMA_Tx UART DMA Tx
467 * @{
468 */
469#define UART_DMA_TX_DISABLE 0x00000000U /*!< UART DMA TX disabled */
470#define UART_DMA_TX_ENABLE USART_CR3_DMAT /*!< UART DMA TX enabled */
471/**
472 * @}
473 */
474
475/** @defgroup UART_DMA_Rx UART DMA Rx
476 * @{
477 */
478#define UART_DMA_RX_DISABLE 0x00000000U /*!< UART DMA RX disabled */
479#define UART_DMA_RX_ENABLE USART_CR3_DMAR /*!< UART DMA RX enabled */
480/**
481 * @}
482 */
483
484/** @defgroup UART_Half_Duplex_Selection UART Half Duplex Selection
485 * @{
486 */
487#define UART_HALF_DUPLEX_DISABLE 0x00000000U /*!< UART half-duplex disabled */
488#define UART_HALF_DUPLEX_ENABLE USART_CR3_HDSEL /*!< UART half-duplex enabled */
489/**
490 * @}
491 */
492
493/** @defgroup UART_WakeUp_Methods UART WakeUp Methods
494 * @{
495 */
496#define UART_WAKEUPMETHOD_IDLELINE 0x00000000U /*!< UART wake-up on idle line */
497#define UART_WAKEUPMETHOD_ADDRESSMARK USART_CR1_WAKE /*!< UART wake-up on address mark */
498/**
499 * @}
500 */
501
502/** @defgroup UART_Request_Parameters UART Request Parameters
503 * @{
504 */
505#define UART_AUTOBAUD_REQUEST USART_RQR_ABRRQ /*!< Auto-Baud Rate Request */
506#define UART_SENDBREAK_REQUEST USART_RQR_SBKRQ /*!< Send Break Request */
507#define UART_MUTE_MODE_REQUEST USART_RQR_MMRQ /*!< Mute Mode Request */
508#define UART_RXDATA_FLUSH_REQUEST USART_RQR_RXFRQ /*!< Receive Data flush Request */
509#define UART_TXDATA_FLUSH_REQUEST USART_RQR_TXFRQ /*!< Transmit data flush Request */
510/**
511 * @}
512 */
513
514/** @defgroup UART_Advanced_Features_Initialization_Type UART Advanced Feature Initialization Type
515 * @{
516 */
517#define UART_ADVFEATURE_NO_INIT 0x00000000U /*!< No advanced feature initialization */
518#define UART_ADVFEATURE_TXINVERT_INIT 0x00000001U /*!< TX pin active level inversion */
519#define UART_ADVFEATURE_RXINVERT_INIT 0x00000002U /*!< RX pin active level inversion */
520#define UART_ADVFEATURE_DATAINVERT_INIT 0x00000004U /*!< Binary data inversion */
521#define UART_ADVFEATURE_SWAP_INIT 0x00000008U /*!< TX/RX pins swap */
522#define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT 0x00000010U /*!< RX overrun disable */
523#define UART_ADVFEATURE_DMADISABLEONERROR_INIT 0x00000020U /*!< DMA disable on Reception Error */
524#define UART_ADVFEATURE_AUTOBAUDRATE_INIT 0x00000040U /*!< Auto Baud rate detection initialization */
525#define UART_ADVFEATURE_MSBFIRST_INIT 0x00000080U /*!< Most significant bit sent/received first */
526/**
527 * @}
528 */
529
530/** @defgroup UART_Tx_Inv UART Advanced Feature TX Pin Active Level Inversion
531 * @{
532 */
533#define UART_ADVFEATURE_TXINV_DISABLE 0x00000000U /*!< TX pin active level inversion disable */
534#define UART_ADVFEATURE_TXINV_ENABLE USART_CR2_TXINV /*!< TX pin active level inversion enable */
535/**
536 * @}
537 */
538
539/** @defgroup UART_Rx_Inv UART Advanced Feature RX Pin Active Level Inversion
540 * @{
541 */
542#define UART_ADVFEATURE_RXINV_DISABLE 0x00000000U /*!< RX pin active level inversion disable */
543#define UART_ADVFEATURE_RXINV_ENABLE USART_CR2_RXINV /*!< RX pin active level inversion enable */
544/**
545 * @}
546 */
547
548/** @defgroup UART_Data_Inv UART Advanced Feature Binary Data Inversion
549 * @{
550 */
551#define UART_ADVFEATURE_DATAINV_DISABLE 0x00000000U /*!< Binary data inversion disable */
552#define UART_ADVFEATURE_DATAINV_ENABLE USART_CR2_DATAINV /*!< Binary data inversion enable */
553/**
554 * @}
555 */
556
557/** @defgroup UART_Rx_Tx_Swap UART Advanced Feature RX TX Pins Swap
558 * @{
559 */
560#define UART_ADVFEATURE_SWAP_DISABLE 0x00000000U /*!< TX/RX pins swap disable */
561#define UART_ADVFEATURE_SWAP_ENABLE USART_CR2_SWAP /*!< TX/RX pins swap enable */
562/**
563 * @}
564 */
565
566/** @defgroup UART_Overrun_Disable UART Advanced Feature Overrun Disable
567 * @{
568 */
569#define UART_ADVFEATURE_OVERRUN_ENABLE 0x00000000U /*!< RX overrun enable */
570#define UART_ADVFEATURE_OVERRUN_DISABLE USART_CR3_OVRDIS /*!< RX overrun disable */
571/**
572 * @}
573 */
574
575/** @defgroup UART_AutoBaudRate_Enable UART Advanced Feature Auto BaudRate Enable
576 * @{
577 */
578#define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE 0x00000000U /*!< RX Auto Baud rate detection enable */
579#define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE USART_CR2_ABREN /*!< RX Auto Baud rate detection disable */
580/**
581 * @}
582 */
583
584/** @defgroup UART_DMA_Disable_on_Rx_Error UART Advanced Feature DMA Disable On Rx Error
585 * @{
586 */
587#define UART_ADVFEATURE_DMA_ENABLEONRXERROR 0x00000000U /*!< DMA enable on Reception Error */
588#define UART_ADVFEATURE_DMA_DISABLEONRXERROR USART_CR3_DDRE /*!< DMA disable on Reception Error */
589/**
590 * @}
591 */
592
593/** @defgroup UART_MSB_First UART Advanced Feature MSB First
594 * @{
595 */
596#define UART_ADVFEATURE_MSBFIRST_DISABLE 0x00000000U /*!< Most significant bit sent/received first disable */
597#define UART_ADVFEATURE_MSBFIRST_ENABLE USART_CR2_MSBFIRST /*!< Most significant bit sent/received first enable */
598/**
599 * @}
600 */
601
602/** @defgroup UART_Stop_Mode_Enable UART Advanced Feature Stop Mode Enable
603 * @{
604 */
605#define UART_ADVFEATURE_STOPMODE_DISABLE 0x00000000U /*!< UART stop mode disable */
606#define UART_ADVFEATURE_STOPMODE_ENABLE USART_CR1_UESM /*!< UART stop mode enable */
607/**
608 * @}
609 */
610
611/** @defgroup UART_Mute_Mode UART Advanced Feature Mute Mode Enable
612 * @{
613 */
614#define UART_ADVFEATURE_MUTEMODE_DISABLE 0x00000000U /*!< UART mute mode disable */
615#define UART_ADVFEATURE_MUTEMODE_ENABLE USART_CR1_MME /*!< UART mute mode enable */
616/**
617 * @}
618 */
619
620/** @defgroup UART_CR2_ADDRESS_LSB_POS UART Address-matching LSB Position In CR2 Register
621 * @{
622 */
623#define UART_CR2_ADDRESS_LSB_POS 24U /*!< UART address-matching LSB position in CR2 register */
624/**
625 * @}
626 */
627
628/** @defgroup UART_WakeUp_from_Stop_Selection UART WakeUp From Stop Selection
629 * @{
630 */
631#define UART_WAKEUP_ON_ADDRESS 0x00000000U /*!< UART wake-up on address */
632#define UART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1 /*!< UART wake-up on start bit */
633#define UART_WAKEUP_ON_READDATA_NONEMPTY USART_CR3_WUS /*!< UART wake-up on receive data register not empty or RXFIFO is not empty */
634/**
635 * @}
636 */
637
638/** @defgroup UART_DriverEnable_Polarity UART DriverEnable Polarity
639 * @{
640 */
641#define UART_DE_POLARITY_HIGH 0x00000000U /*!< Driver enable signal is active high */
642#define UART_DE_POLARITY_LOW USART_CR3_DEP /*!< Driver enable signal is active low */
643/**
644 * @}
645 */
646
647/** @defgroup UART_CR1_DEAT_ADDRESS_LSB_POS UART Driver Enable Assertion Time LSB Position In CR1 Register
648 * @{
649 */
650#define UART_CR1_DEAT_ADDRESS_LSB_POS 21U /*!< UART Driver Enable assertion time LSB position in CR1 register */
651/**
652 * @}
653 */
654
655/** @defgroup UART_CR1_DEDT_ADDRESS_LSB_POS UART Driver Enable DeAssertion Time LSB Position In CR1 Register
656 * @{
657 */
658#define UART_CR1_DEDT_ADDRESS_LSB_POS 16U /*!< UART Driver Enable de-assertion time LSB position in CR1 register */
659/**
660 * @}
661 */
662
663/** @defgroup UART_Interruption_Mask UART Interruptions Flag Mask
664 * @{
665 */
666#define UART_IT_MASK 0x001FU /*!< UART interruptions flags mask */
667/**
668 * @}
669 */
670
671/** @defgroup UART_TimeOut_Value UART polling-based communications time-out value
672 * @{
673 */
674#define HAL_UART_TIMEOUT_VALUE 0x1FFFFFFU /*!< UART polling-based communications time-out value */
675/**
676 * @}
677 */
678
679/** @defgroup UART_Flags UART Status Flags
680 * Elements values convention: 0xXXXX
681 * - 0xXXXX : Flag mask in the ISR register
682 * @{
683 */
684#define UART_FLAG_TXFT USART_ISR_TXFT /*!< UART TXFIFO threshold flag */
685#define UART_FLAG_RXFT USART_ISR_RXFT /*!< UART RXFIFO threshold flag */
686#define UART_FLAG_RXFF USART_ISR_RXFF /*!< UART RXFIFO Full flag */
687#define UART_FLAG_TXFE USART_ISR_TXFE /*!< UART TXFIFO Empty flag */
688#define UART_FLAG_REACK USART_ISR_REACK /*!< UART receive enable acknowledge flag */
689#define UART_FLAG_TEACK USART_ISR_TEACK /*!< UART transmit enable acknowledge flag */
690#define UART_FLAG_WUF USART_ISR_WUF /*!< UART wake-up from stop mode flag */
691#define UART_FLAG_RWU USART_ISR_RWU /*!< UART receiver wake-up from mute mode flag */
692#define UART_FLAG_SBKF USART_ISR_SBKF /*!< UART send break flag */
693#define UART_FLAG_CMF USART_ISR_CMF /*!< UART character match flag */
694#define UART_FLAG_BUSY USART_ISR_BUSY /*!< UART busy flag */
695#define UART_FLAG_ABRF USART_ISR_ABRF /*!< UART auto Baud rate flag */
696#define UART_FLAG_ABRE USART_ISR_ABRE /*!< UART auto Baud rate error */
697#define UART_FLAG_CTS USART_ISR_CTS /*!< UART clear to send flag */
698#define UART_FLAG_CTSIF USART_ISR_CTSIF /*!< UART clear to send interrupt flag */
699#define UART_FLAG_LBDF USART_ISR_LBDF /*!< UART LIN break detection flag */
700#define UART_FLAG_TXE USART_ISR_TXE_TXFNF /*!< UART transmit data register empty */
701#define UART_FLAG_TXFNF USART_ISR_TXE_TXFNF /*!< UART TXFIFO not full */
702#define UART_FLAG_TC USART_ISR_TC /*!< UART transmission complete */
703#define UART_FLAG_RXNE USART_ISR_RXNE_RXFNE /*!< UART read data register not empty */
704#define UART_FLAG_RXFNE USART_ISR_RXNE_RXFNE /*!< UART RXFIFO not empty */
705#define UART_FLAG_IDLE USART_ISR_IDLE /*!< UART idle flag */
706#define UART_FLAG_ORE USART_ISR_ORE /*!< UART overrun error */
707#define UART_FLAG_NE USART_ISR_NE /*!< UART noise error */
708#define UART_FLAG_FE USART_ISR_FE /*!< UART frame error */
709#define UART_FLAG_PE USART_ISR_PE /*!< UART parity error */
710/**
711 * @}
712 */
713
714/** @defgroup UART_Interrupt_definition UART Interrupts Definition
715 * Elements values convention: 000ZZZZZ0XXYYYYYb
716 * - YYYYY : Interrupt source position in the XX register (5bits)
717 * - XX : Interrupt source register (2bits)
718 * - 01: CR1 register
719 * - 10: CR2 register
720 * - 11: CR3 register
721 * - ZZZZZ : Flag position in the ISR register(5bits)
722 * Elements values convention: 000000000XXYYYYYb
723 * - YYYYY : Interrupt source position in the XX register (5bits)
724 * - XX : Interrupt source register (2bits)
725 * - 01: CR1 register
726 * - 10: CR2 register
727 * - 11: CR3 register
728 * Elements values convention: 0000ZZZZ00000000b
729 * - ZZZZ : Flag position in the ISR register(4bits)
730 * @{
731 */
732#define UART_IT_PE 0x0028U /*!< UART parity error interruption */
733#define UART_IT_TXE 0x0727U /*!< UART transmit data register empty interruption */
734#define UART_IT_TXFNF 0x0727U /*!< UART TX FIFO not full interruption */
735#define UART_IT_TC 0x0626U /*!< UART transmission complete interruption */
736#define UART_IT_RXNE 0x0525U /*!< UART read data register not empty interruption */
737#define UART_IT_RXFNE 0x0525U /*!< UART RXFIFO not empty interruption */
738#define UART_IT_IDLE 0x0424U /*!< UART idle interruption */
739#define UART_IT_LBD 0x0846U /*!< UART LIN break detection interruption */
740#define UART_IT_CTS 0x096AU /*!< UART CTS interruption */
741#define UART_IT_CM 0x112EU /*!< UART character match interruption */
742#define UART_IT_WUF 0x1476U /*!< UART wake-up from stop mode interruption */
743#define UART_IT_RXFF 0x183FU /*!< UART RXFIFO full interruption */
744#define UART_IT_TXFE 0x173EU /*!< UART TXFIFO empty interruption */
745#define UART_IT_RXFT 0x1A7CU /*!< UART RXFIFO threshold reached interruption */
746#define UART_IT_TXFT 0x1B77U /*!< UART TXFIFO threshold reached interruption */
747
748#define UART_IT_ERR 0x0060U /*!< UART error interruption */
749
750#define UART_IT_ORE 0x0300U /*!< UART overrun error interruption */
751#define UART_IT_NE 0x0200U /*!< UART noise error interruption */
752#define UART_IT_FE 0x0100U /*!< UART frame error interruption */
753/**
754 * @}
755 */
756
757/** @defgroup UART_IT_CLEAR_Flags UART Interruption Clear Flags
758 * @{
759 */
760#define UART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */
761#define UART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */
762#define UART_CLEAR_NEF USART_ICR_NECF /*!< Noise Error detected Clear Flag */
763#define UART_CLEAR_OREF USART_ICR_ORECF /*!< Overrun Error Clear Flag */
764#define UART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */
765#define UART_CLEAR_TXFECF USART_ICR_TXFECF /*!< TXFIFO empty clear flag */
766#define UART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */
767#define UART_CLEAR_LBDF USART_ICR_LBDCF /*!< LIN Break Detection Clear Flag */
768#define UART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */
769#define UART_CLEAR_CMF USART_ICR_CMCF /*!< Character Match Clear Flag */
770#define UART_CLEAR_WUF USART_ICR_WUCF /*!< Wake Up from stop mode Clear Flag */
771/**
772 * @}
773 */
774
775
776/**
777 * @}
778 */
779
780/* Exported macros -----------------------------------------------------------*/
781/** @defgroup UART_Exported_Macros UART Exported Macros
782 * @{
783 */
784
785/** @brief Reset UART handle states.
786 * @param __HANDLE__ UART handle.
787 * @retval None
788 */
789#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
790#define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \
791 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \
792 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \
793 (__HANDLE__)->MspInitCallback = NULL; \
794 (__HANDLE__)->MspDeInitCallback = NULL; \
795 } while(0U)
796#else
797#define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \
798 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \
799 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \
800 } while(0U)
801#endif /*USE_HAL_UART_REGISTER_CALLBACKS */
802
803/** @brief Flush the UART Data registers.
804 * @param __HANDLE__ specifies the UART Handle.
805 * @retval None
806 */
807#define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \
808 do{ \
809 SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \
810 SET_BIT((__HANDLE__)->Instance->RQR, UART_TXDATA_FLUSH_REQUEST); \
811 } while(0U)
812
813/** @brief Clear the specified UART pending flag.
814 * @param __HANDLE__ specifies the UART Handle.
815 * @param __FLAG__ specifies the flag to check.
816 * This parameter can be any combination of the following values:
817 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag
818 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag
819 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag
820 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag
821 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag
822 * @arg @ref UART_CLEAR_TXFECF TXFIFO empty clear Flag
823 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag
824 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag
825 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag
826 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag
827 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag
828 * @retval None
829 */
830#define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
831
832/** @brief Clear the UART PE pending flag.
833 * @param __HANDLE__ specifies the UART Handle.
834 * @retval None
835 */
836#define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_PEF)
837
838/** @brief Clear the UART FE pending flag.
839 * @param __HANDLE__ specifies the UART Handle.
840 * @retval None
841 */
842#define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_FEF)
843
844/** @brief Clear the UART NE pending flag.
845 * @param __HANDLE__ specifies the UART Handle.
846 * @retval None
847 */
848#define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_NEF)
849
850/** @brief Clear the UART ORE pending flag.
851 * @param __HANDLE__ specifies the UART Handle.
852 * @retval None
853 */
854#define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_OREF)
855
856/** @brief Clear the UART IDLE pending flag.
857 * @param __HANDLE__ specifies the UART Handle.
858 * @retval None
859 */
860#define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_IDLEF)
861
862/** @brief Clear the UART TX FIFO empty clear flag.
863 * @param __HANDLE__ specifies the UART Handle.
864 * @retval None
865 */
866#define __HAL_UART_CLEAR_TXFECF(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_TXFECF)
867
868/** @brief Check whether the specified UART flag is set or not.
869 * @param __HANDLE__ specifies the UART Handle.
870 * @param __FLAG__ specifies the flag to check.
871 * This parameter can be one of the following values:
872 * @arg @ref UART_FLAG_TXFT TXFIFO threshold flag
873 * @arg @ref UART_FLAG_RXFT RXFIFO threshold flag
874 * @arg @ref UART_FLAG_RXFF RXFIFO Full flag
875 * @arg @ref UART_FLAG_TXFE TXFIFO Empty flag
876 * @arg @ref UART_FLAG_REACK Receive enable acknowledge flag
877 * @arg @ref UART_FLAG_TEACK Transmit enable acknowledge flag
878 * @arg @ref UART_FLAG_WUF Wake up from stop mode flag
879 * @arg @ref UART_FLAG_RWU Receiver wake up flag (if the UART in mute mode)
880 * @arg @ref UART_FLAG_SBKF Send Break flag
881 * @arg @ref UART_FLAG_CMF Character match flag
882 * @arg @ref UART_FLAG_BUSY Busy flag
883 * @arg @ref UART_FLAG_ABRF Auto Baud rate detection flag
884 * @arg @ref UART_FLAG_ABRE Auto Baud rate detection error flag
885 * @arg @ref UART_FLAG_CTS CTS Change flag
886 * @arg @ref UART_FLAG_LBDF LIN Break detection flag
887 * @arg @ref UART_FLAG_TXE Transmit data register empty flag
888 * @arg @ref UART_FLAG_TXFNF UART TXFIFO not full flag
889 * @arg @ref UART_FLAG_TC Transmission Complete flag
890 * @arg @ref UART_FLAG_RXNE Receive data register not empty flag
891 * @arg @ref UART_FLAG_RXFNE UART RXFIFO not empty flag
892 * @arg @ref UART_FLAG_IDLE Idle Line detection flag
893 * @arg @ref UART_FLAG_ORE Overrun Error flag
894 * @arg @ref UART_FLAG_NE Noise Error flag
895 * @arg @ref UART_FLAG_FE Framing Error flag
896 * @arg @ref UART_FLAG_PE Parity Error flag
897 * @retval The new state of __FLAG__ (TRUE or FALSE).
898 */
899#define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__))
900
901/** @brief Enable the specified UART interrupt.
902 * @param __HANDLE__ specifies the UART Handle.
903 * @param __INTERRUPT__ specifies the UART interrupt source to enable.
904 * This parameter can be one of the following values:
905 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt
906 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt
907 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt
908 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt
909 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt
910 * @arg @ref UART_IT_CM Character match interrupt
911 * @arg @ref UART_IT_CTS CTS change interrupt
912 * @arg @ref UART_IT_LBD LIN Break detection interrupt
913 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
914 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt
915 * @arg @ref UART_IT_TC Transmission complete interrupt
916 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
917 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt
918 * @arg @ref UART_IT_IDLE Idle line detection interrupt
919 * @arg @ref UART_IT_PE Parity Error interrupt
920 * @arg @ref UART_IT_ERR Error interrupt (frame error, noise error, overrun error)
921 * @retval None
922 */
923#define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
924 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
925 ((__HANDLE__)->Instance->CR3 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))))
926
927
928/** @brief Disable the specified UART interrupt.
929 * @param __HANDLE__ specifies the UART Handle.
930 * @param __INTERRUPT__ specifies the UART interrupt source to disable.
931 * This parameter can be one of the following values:
932 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt
933 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt
934 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt
935 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt
936 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt
937 * @arg @ref UART_IT_CM Character match interrupt
938 * @arg @ref UART_IT_CTS CTS change interrupt
939 * @arg @ref UART_IT_LBD LIN Break detection interrupt
940 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
941 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt
942 * @arg @ref UART_IT_TC Transmission complete interrupt
943 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
944 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt
945 * @arg @ref UART_IT_IDLE Idle line detection interrupt
946 * @arg @ref UART_IT_PE Parity Error interrupt
947 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error)
948 * @retval None
949 */
950#define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
951 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
952 ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))))
953
954/** @brief Check whether the specified UART interrupt has occurred or not.
955 * @param __HANDLE__ specifies the UART Handle.
956 * @param __INTERRUPT__ specifies the UART interrupt to check.
957 * This parameter can be one of the following values:
958 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt
959 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt
960 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt
961 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt
962 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt
963 * @arg @ref UART_IT_CM Character match interrupt
964 * @arg @ref UART_IT_CTS CTS change interrupt
965 * @arg @ref UART_IT_LBD LIN Break detection interrupt
966 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
967 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt
968 * @arg @ref UART_IT_TC Transmission complete interrupt
969 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
970 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt
971 * @arg @ref UART_IT_IDLE Idle line detection interrupt
972 * @arg @ref UART_IT_PE Parity Error interrupt
973 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error)
974 * @retval The new state of __INTERRUPT__ (SET or RESET).
975 */
976#define __HAL_UART_GET_IT(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISR & (1U << ((__INTERRUPT__)>> 8U))) != RESET) ? SET : RESET)
977
978/** @brief Check whether the specified UART interrupt source is enabled or not.
979 * @param __HANDLE__ specifies the UART Handle.
980 * @param __INTERRUPT__ specifies the UART interrupt source to check.
981 * This parameter can be one of the following values:
982 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt
983 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt
984 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt
985 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt
986 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt
987 * @arg @ref UART_IT_CM Character match interrupt
988 * @arg @ref UART_IT_CTS CTS change interrupt
989 * @arg @ref UART_IT_LBD LIN Break detection interrupt
990 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
991 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt
992 * @arg @ref UART_IT_TC Transmission complete interrupt
993 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
994 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt
995 * @arg @ref UART_IT_IDLE Idle line detection interrupt
996 * @arg @ref UART_IT_PE Parity Error interrupt
997 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error)
998 * @retval The new state of __INTERRUPT__ (SET or RESET).
999 */
1000#define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U) ? (__HANDLE__)->Instance->CR1 : \
1001 (((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U) ? (__HANDLE__)->Instance->CR2 : \
1002 (__HANDLE__)->Instance->CR3)) & (1U << (((uint16_t)(__INTERRUPT__)) & UART_IT_MASK))) != RESET) ? SET : RESET)
1003
1004/** @brief Clear the specified UART ISR flag, in setting the proper ICR register flag.
1005 * @param __HANDLE__ specifies the UART Handle.
1006 * @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set
1007 * to clear the corresponding interrupt
1008 * This parameter can be one of the following values:
1009 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag
1010 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag
1011 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag
1012 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag
1013 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag
1014 * @arg @ref UART_CLEAR_TXFECF TXFIFO empty Clear Flag
1015 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag
1016 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag
1017 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag
1018 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag
1019 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag
1020 * @retval None
1021 */
1022#define __HAL_UART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__))
1023
1024/** @brief Set a specific UART request flag.
1025 * @param __HANDLE__ specifies the UART Handle.
1026 * @param __REQ__ specifies the request flag to set
1027 * This parameter can be one of the following values:
1028 * @arg @ref UART_AUTOBAUD_REQUEST Auto-Baud Rate Request
1029 * @arg @ref UART_SENDBREAK_REQUEST Send Break Request
1030 * @arg @ref UART_MUTE_MODE_REQUEST Mute Mode Request
1031 * @arg @ref UART_RXDATA_FLUSH_REQUEST Receive Data flush Request
1032 * @arg @ref UART_TXDATA_FLUSH_REQUEST Transmit data flush Request
1033 * @retval None
1034 */
1035#define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__))
1036
1037/** @brief Enable the UART one bit sample method.
1038 * @param __HANDLE__ specifies the UART Handle.
1039 * @retval None
1040 */
1041#define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT)
1042
1043/** @brief Disable the UART one bit sample method.
1044 * @param __HANDLE__ specifies the UART Handle.
1045 * @retval None
1046 */
1047#define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= ~USART_CR3_ONEBIT)
1048
1049/** @brief Enable UART.
1050 * @param __HANDLE__ specifies the UART Handle.
1051 * @retval None
1052 */
1053#define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
1054
1055/** @brief Disable UART.
1056 * @param __HANDLE__ specifies the UART Handle.
1057 * @retval None
1058 */
1059#define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
1060
1061/** @brief Enable CTS flow control.
1062 * @note This macro allows to enable CTS hardware flow control for a given UART instance,
1063 * without need to call HAL_UART_Init() function.
1064 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
1065 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
1066 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
1067 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
1068 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__))
1069 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
1070 * @param __HANDLE__ specifies the UART Handle.
1071 * @retval None
1072 */
1073#define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \
1074 do{ \
1075 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
1076 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \
1077 } while(0U)
1078
1079/** @brief Disable CTS flow control.
1080 * @note This macro allows to disable CTS hardware flow control for a given UART instance,
1081 * without need to call HAL_UART_Init() function.
1082 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
1083 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
1084 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
1085 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
1086 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__))
1087 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
1088 * @param __HANDLE__ specifies the UART Handle.
1089 * @retval None
1090 */
1091#define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \
1092 do{ \
1093 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
1094 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \
1095 } while(0U)
1096
1097/** @brief Enable RTS flow control.
1098 * @note This macro allows to enable RTS hardware flow control for a given UART instance,
1099 * without need to call HAL_UART_Init() function.
1100 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
1101 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
1102 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
1103 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
1104 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__))
1105 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
1106 * @param __HANDLE__ specifies the UART Handle.
1107 * @retval None
1108 */
1109#define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \
1110 do{ \
1111 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \
1112 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \
1113 } while(0U)
1114
1115/** @brief Disable RTS flow control.
1116 * @note This macro allows to disable RTS hardware flow control for a given UART instance,
1117 * without need to call HAL_UART_Init() function.
1118 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
1119 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
1120 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
1121 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
1122 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__))
1123 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
1124 * @param __HANDLE__ specifies the UART Handle.
1125 * @retval None
1126 */
1127#define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \
1128 do{ \
1129 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\
1130 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \
1131 } while(0U)
1132/**
1133 * @}
1134 */
1135
1136/* Private macros --------------------------------------------------------*/
1137/** @defgroup UART_Private_Macros UART Private Macros
1138 * @{
1139 */
1140/** @brief Get UART clok division factor from clock prescaler value.
1141 * @param __CLOCKPRESCALER__ UART prescaler value.
1142 * @retval UART clock division factor
1143 */
1144#define UART_GET_DIV_FACTOR(__CLOCKPRESCALER__) \
1145 (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) ? 1U : \
1146 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) ? 2U : \
1147 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) ? 4U : \
1148 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) ? 6U : \
1149 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) ? 8U : \
1150 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) ? 10U : \
1151 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) ? 12U : \
1152 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) ? 16U : \
1153 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) ? 32U : \
1154 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) ? 64U : \
1155 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) ? 128U : \
1156 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV256) ? 256U : 1U)
1157
1158/** @brief BRR division operation to set BRR register with LPUART.
1159 * @param __PCLK__ LPUART clock.
1160 * @param __BAUD__ Baud rate set by the user.
1161 * @param __CLOCKPRESCALER__ UART prescaler value.
1162 * @retval Division result
1163 */
1164#define UART_DIV_LPUART(__PCLK__, __BAUD__, __CLOCKPRESCALER__) ((uint32_t)(((((uint64_t)(__PCLK__)/UART_GET_DIV_FACTOR((__CLOCKPRESCALER__)))*256U) + (uint32_t)((__BAUD__)/2U)) / (__BAUD__)))
1165
1166/** @brief BRR division operation to set BRR register in 8-bit oversampling mode.
1167 * @param __PCLK__ UART clock.
1168 * @param __BAUD__ Baud rate set by the user.
1169 * @param __CLOCKPRESCALER__ UART prescaler value.
1170 * @retval Division result
1171 */
1172#define UART_DIV_SAMPLING8(__PCLK__, __BAUD__, __CLOCKPRESCALER__) (((((__PCLK__)/UART_GET_DIV_FACTOR((__CLOCKPRESCALER__)))*2U) + ((__BAUD__)/2U)) / (__BAUD__))
1173
1174/** @brief BRR division operation to set BRR register in 16-bit oversampling mode.
1175 * @param __PCLK__ UART clock.
1176 * @param __BAUD__ Baud rate set by the user.
1177 * @param __CLOCKPRESCALER__ UART prescaler value.
1178 * @retval Division result
1179 */
1180#define UART_DIV_SAMPLING16(__PCLK__, __BAUD__, __CLOCKPRESCALER__) ((((__PCLK__)/UART_GET_DIV_FACTOR((__CLOCKPRESCALER__))) + ((__BAUD__)/2U)) / (__BAUD__))
1181
1182/** @brief Check whether or not UART instance is Low Power UART.
1183 * @param __HANDLE__ specifies the UART Handle.
1184 * @retval SET (instance is LPUART) or RESET (instance isn't LPUART)
1185 */
1186#define UART_INSTANCE_LOWPOWER(__HANDLE__) (IS_LPUART_INSTANCE((__HANDLE__)->Instance))
1187
1188/** @brief Check UART Baud rate.
1189 * @param __BAUDRATE__ Baudrate specified by the user.
1190 * The maximum Baud Rate is derived from the maximum clock on G0 (i.e. 64 MHz)
1191 * divided by the smallest oversampling used on the USART (i.e. 8)
1192 * @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid)
1193 */
1194#define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 8000001U)
1195
1196/** @brief Check UART assertion time.
1197 * @param __TIME__ 5-bit value assertion time.
1198 * @retval Test result (TRUE or FALSE).
1199 */
1200#define IS_UART_ASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU)
1201
1202/** @brief Check UART deassertion time.
1203 * @param __TIME__ 5-bit value deassertion time.
1204 * @retval Test result (TRUE or FALSE).
1205 */
1206#define IS_UART_DEASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU)
1207
1208/**
1209 * @brief Ensure that UART frame number of stop bits is valid.
1210 * @param __STOPBITS__ UART frame number of stop bits.
1211 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid)
1212 */
1213#define IS_UART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_0_5) || \
1214 ((__STOPBITS__) == UART_STOPBITS_1) || \
1215 ((__STOPBITS__) == UART_STOPBITS_1_5) || \
1216 ((__STOPBITS__) == UART_STOPBITS_2))
1217
1218/**
1219 * @brief Ensure that LPUART frame number of stop bits is valid.
1220 * @param __STOPBITS__ LPUART frame number of stop bits.
1221 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid)
1222 */
1223#define IS_LPUART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_1) || \
1224 ((__STOPBITS__) == UART_STOPBITS_2))
1225
1226/**
1227 * @brief Ensure that UART frame parity is valid.
1228 * @param __PARITY__ UART frame parity.
1229 * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid)
1230 */
1231#define IS_UART_PARITY(__PARITY__) (((__PARITY__) == UART_PARITY_NONE) || \
1232 ((__PARITY__) == UART_PARITY_EVEN) || \
1233 ((__PARITY__) == UART_PARITY_ODD))
1234
1235/**
1236 * @brief Ensure that UART hardware flow control is valid.
1237 * @param __CONTROL__ UART hardware flow control.
1238 * @retval SET (__CONTROL__ is valid) or RESET (__CONTROL__ is invalid)
1239 */
1240#define IS_UART_HARDWARE_FLOW_CONTROL(__CONTROL__)\
1241 (((__CONTROL__) == UART_HWCONTROL_NONE) || \
1242 ((__CONTROL__) == UART_HWCONTROL_RTS) || \
1243 ((__CONTROL__) == UART_HWCONTROL_CTS) || \
1244 ((__CONTROL__) == UART_HWCONTROL_RTS_CTS))
1245
1246/**
1247 * @brief Ensure that UART communication mode is valid.
1248 * @param __MODE__ UART communication mode.
1249 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
1250 */
1251#define IS_UART_MODE(__MODE__) ((((__MODE__) & (~((uint32_t)(UART_MODE_TX_RX)))) == 0x00U) && ((__MODE__) != 0x00U))
1252
1253/**
1254 * @brief Ensure that UART state is valid.
1255 * @param __STATE__ UART state.
1256 * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid)
1257 */
1258#define IS_UART_STATE(__STATE__) (((__STATE__) == UART_STATE_DISABLE) || \
1259 ((__STATE__) == UART_STATE_ENABLE))
1260
1261/**
1262 * @brief Ensure that UART oversampling is valid.
1263 * @param __SAMPLING__ UART oversampling.
1264 * @retval SET (__SAMPLING__ is valid) or RESET (__SAMPLING__ is invalid)
1265 */
1266#define IS_UART_OVERSAMPLING(__SAMPLING__) (((__SAMPLING__) == UART_OVERSAMPLING_16) || \
1267 ((__SAMPLING__) == UART_OVERSAMPLING_8))
1268
1269/**
1270 * @brief Ensure that UART frame sampling is valid.
1271 * @param __ONEBIT__ UART frame sampling.
1272 * @retval SET (__ONEBIT__ is valid) or RESET (__ONEBIT__ is invalid)
1273 */
1274#define IS_UART_ONE_BIT_SAMPLE(__ONEBIT__) (((__ONEBIT__) == UART_ONE_BIT_SAMPLE_DISABLE) || \
1275 ((__ONEBIT__) == UART_ONE_BIT_SAMPLE_ENABLE))
1276
1277/**
1278 * @brief Ensure that UART auto Baud rate detection mode is valid.
1279 * @param __MODE__ UART auto Baud rate detection mode.
1280 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
1281 */
1282#define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__) (((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) || \
1283 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) || \
1284 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME) || \
1285 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME))
1286
1287/**
1288 * @brief Ensure that UART receiver timeout setting is valid.
1289 * @param __TIMEOUT__ UART receiver timeout setting.
1290 * @retval SET (__TIMEOUT__ is valid) or RESET (__TIMEOUT__ is invalid)
1291 */
1292#define IS_UART_RECEIVER_TIMEOUT(__TIMEOUT__) (((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_DISABLE) || \
1293 ((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_ENABLE))
1294
1295/**
1296 * @brief Ensure that UART LIN state is valid.
1297 * @param __LIN__ UART LIN state.
1298 * @retval SET (__LIN__ is valid) or RESET (__LIN__ is invalid)
1299 */
1300#define IS_UART_LIN(__LIN__) (((__LIN__) == UART_LIN_DISABLE) || \
1301 ((__LIN__) == UART_LIN_ENABLE))
1302
1303/**
1304 * @brief Ensure that UART LIN break detection length is valid.
1305 * @param __LENGTH__ UART LIN break detection length.
1306 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid)
1307 */
1308#define IS_UART_LIN_BREAK_DETECT_LENGTH(__LENGTH__) (((__LENGTH__) == UART_LINBREAKDETECTLENGTH_10B) || \
1309 ((__LENGTH__) == UART_LINBREAKDETECTLENGTH_11B))
1310
1311/**
1312 * @brief Ensure that UART DMA TX state is valid.
1313 * @param __DMATX__ UART DMA TX state.
1314 * @retval SET (__DMATX__ is valid) or RESET (__DMATX__ is invalid)
1315 */
1316#define IS_UART_DMA_TX(__DMATX__) (((__DMATX__) == UART_DMA_TX_DISABLE) || \
1317 ((__DMATX__) == UART_DMA_TX_ENABLE))
1318
1319/**
1320 * @brief Ensure that UART DMA RX state is valid.
1321 * @param __DMARX__ UART DMA RX state.
1322 * @retval SET (__DMARX__ is valid) or RESET (__DMARX__ is invalid)
1323 */
1324#define IS_UART_DMA_RX(__DMARX__) (((__DMARX__) == UART_DMA_RX_DISABLE) || \
1325 ((__DMARX__) == UART_DMA_RX_ENABLE))
1326
1327/**
1328 * @brief Ensure that UART half-duplex state is valid.
1329 * @param __HDSEL__ UART half-duplex state.
1330 * @retval SET (__HDSEL__ is valid) or RESET (__HDSEL__ is invalid)
1331 */
1332#define IS_UART_HALF_DUPLEX(__HDSEL__) (((__HDSEL__) == UART_HALF_DUPLEX_DISABLE) || \
1333 ((__HDSEL__) == UART_HALF_DUPLEX_ENABLE))
1334
1335/**
1336 * @brief Ensure that UART wake-up method is valid.
1337 * @param __WAKEUP__ UART wake-up method .
1338 * @retval SET (__WAKEUP__ is valid) or RESET (__WAKEUP__ is invalid)
1339 */
1340#define IS_UART_WAKEUPMETHOD(__WAKEUP__) (((__WAKEUP__) == UART_WAKEUPMETHOD_IDLELINE) || \
1341 ((__WAKEUP__) == UART_WAKEUPMETHOD_ADDRESSMARK))
1342
1343/**
1344 * @brief Ensure that UART request parameter is valid.
1345 * @param __PARAM__ UART request parameter.
1346 * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid)
1347 */
1348#define IS_UART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == UART_AUTOBAUD_REQUEST) || \
1349 ((__PARAM__) == UART_SENDBREAK_REQUEST) || \
1350 ((__PARAM__) == UART_MUTE_MODE_REQUEST) || \
1351 ((__PARAM__) == UART_RXDATA_FLUSH_REQUEST) || \
1352 ((__PARAM__) == UART_TXDATA_FLUSH_REQUEST))
1353
1354/**
1355 * @brief Ensure that UART advanced features initialization is valid.
1356 * @param __INIT__ UART advanced features initialization.
1357 * @retval SET (__INIT__ is valid) or RESET (__INIT__ is invalid)
1358 */
1359#define IS_UART_ADVFEATURE_INIT(__INIT__) ((__INIT__) <= (UART_ADVFEATURE_NO_INIT | \
1360 UART_ADVFEATURE_TXINVERT_INIT | \
1361 UART_ADVFEATURE_RXINVERT_INIT | \
1362 UART_ADVFEATURE_DATAINVERT_INIT | \
1363 UART_ADVFEATURE_SWAP_INIT | \
1364 UART_ADVFEATURE_RXOVERRUNDISABLE_INIT | \
1365 UART_ADVFEATURE_DMADISABLEONERROR_INIT | \
1366 UART_ADVFEATURE_AUTOBAUDRATE_INIT | \
1367 UART_ADVFEATURE_MSBFIRST_INIT))
1368
1369/**
1370 * @brief Ensure that UART frame TX inversion setting is valid.
1371 * @param __TXINV__ UART frame TX inversion setting.
1372 * @retval SET (__TXINV__ is valid) or RESET (__TXINV__ is invalid)
1373 */
1374#define IS_UART_ADVFEATURE_TXINV(__TXINV__) (((__TXINV__) == UART_ADVFEATURE_TXINV_DISABLE) || \
1375 ((__TXINV__) == UART_ADVFEATURE_TXINV_ENABLE))
1376
1377/**
1378 * @brief Ensure that UART frame RX inversion setting is valid.
1379 * @param __RXINV__ UART frame RX inversion setting.
1380 * @retval SET (__RXINV__ is valid) or RESET (__RXINV__ is invalid)
1381 */
1382#define IS_UART_ADVFEATURE_RXINV(__RXINV__) (((__RXINV__) == UART_ADVFEATURE_RXINV_DISABLE) || \
1383 ((__RXINV__) == UART_ADVFEATURE_RXINV_ENABLE))
1384
1385/**
1386 * @brief Ensure that UART frame data inversion setting is valid.
1387 * @param __DATAINV__ UART frame data inversion setting.
1388 * @retval SET (__DATAINV__ is valid) or RESET (__DATAINV__ is invalid)
1389 */
1390#define IS_UART_ADVFEATURE_DATAINV(__DATAINV__) (((__DATAINV__) == UART_ADVFEATURE_DATAINV_DISABLE) || \
1391 ((__DATAINV__) == UART_ADVFEATURE_DATAINV_ENABLE))
1392
1393/**
1394 * @brief Ensure that UART frame RX/TX pins swap setting is valid.
1395 * @param __SWAP__ UART frame RX/TX pins swap setting.
1396 * @retval SET (__SWAP__ is valid) or RESET (__SWAP__ is invalid)
1397 */
1398#define IS_UART_ADVFEATURE_SWAP(__SWAP__) (((__SWAP__) == UART_ADVFEATURE_SWAP_DISABLE) || \
1399 ((__SWAP__) == UART_ADVFEATURE_SWAP_ENABLE))
1400
1401/**
1402 * @brief Ensure that UART frame overrun setting is valid.
1403 * @param __OVERRUN__ UART frame overrun setting.
1404 * @retval SET (__OVERRUN__ is valid) or RESET (__OVERRUN__ is invalid)
1405 */
1406#define IS_UART_OVERRUN(__OVERRUN__) (((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_ENABLE) || \
1407 ((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_DISABLE))
1408
1409/**
1410 * @brief Ensure that UART auto Baud rate state is valid.
1411 * @param __AUTOBAUDRATE__ UART auto Baud rate state.
1412 * @retval SET (__AUTOBAUDRATE__ is valid) or RESET (__AUTOBAUDRATE__ is invalid)
1413 */
1414#define IS_UART_ADVFEATURE_AUTOBAUDRATE(__AUTOBAUDRATE__) (((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) || \
1415 ((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE))
1416
1417/**
1418 * @brief Ensure that UART DMA enabling or disabling on error setting is valid.
1419 * @param __DMA__ UART DMA enabling or disabling on error setting.
1420 * @retval SET (__DMA__ is valid) or RESET (__DMA__ is invalid)
1421 */
1422#define IS_UART_ADVFEATURE_DMAONRXERROR(__DMA__) (((__DMA__) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) || \
1423 ((__DMA__) == UART_ADVFEATURE_DMA_DISABLEONRXERROR))
1424
1425/**
1426 * @brief Ensure that UART frame MSB first setting is valid.
1427 * @param __MSBFIRST__ UART frame MSB first setting.
1428 * @retval SET (__MSBFIRST__ is valid) or RESET (__MSBFIRST__ is invalid)
1429 */
1430#define IS_UART_ADVFEATURE_MSBFIRST(__MSBFIRST__) (((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_DISABLE) || \
1431 ((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_ENABLE))
1432
1433/**
1434 * @brief Ensure that UART stop mode state is valid.
1435 * @param __STOPMODE__ UART stop mode state.
1436 * @retval SET (__STOPMODE__ is valid) or RESET (__STOPMODE__ is invalid)
1437 */
1438#define IS_UART_ADVFEATURE_STOPMODE(__STOPMODE__) (((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_DISABLE) || \
1439 ((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_ENABLE))
1440
1441/**
1442 * @brief Ensure that UART mute mode state is valid.
1443 * @param __MUTE__ UART mute mode state.
1444 * @retval SET (__MUTE__ is valid) or RESET (__MUTE__ is invalid)
1445 */
1446#define IS_UART_MUTE_MODE(__MUTE__) (((__MUTE__) == UART_ADVFEATURE_MUTEMODE_DISABLE) || \
1447 ((__MUTE__) == UART_ADVFEATURE_MUTEMODE_ENABLE))
1448
1449/**
1450 * @brief Ensure that UART wake-up selection is valid.
1451 * @param __WAKE__ UART wake-up selection.
1452 * @retval SET (__WAKE__ is valid) or RESET (__WAKE__ is invalid)
1453 */
1454#define IS_UART_WAKEUP_SELECTION(__WAKE__) (((__WAKE__) == UART_WAKEUP_ON_ADDRESS) || \
1455 ((__WAKE__) == UART_WAKEUP_ON_STARTBIT) || \
1456 ((__WAKE__) == UART_WAKEUP_ON_READDATA_NONEMPTY))
1457
1458/**
1459 * @brief Ensure that UART driver enable polarity is valid.
1460 * @param __POLARITY__ UART driver enable polarity.
1461 * @retval SET (__POLARITY__ is valid) or RESET (__POLARITY__ is invalid)
1462 */
1463#define IS_UART_DE_POLARITY(__POLARITY__) (((__POLARITY__) == UART_DE_POLARITY_HIGH) || \
1464 ((__POLARITY__) == UART_DE_POLARITY_LOW))
1465
1466/**
1467 * @brief Ensure that UART Prescaler is valid.
1468 * @param __CLOCKPRESCALER__ UART Prescaler value.
1469 * @retval SET (__CLOCKPRESCALER__ is valid) or RESET (__CLOCKPRESCALER__ is invalid)
1470 */
1471#define IS_UART_PRESCALER(__CLOCKPRESCALER__) (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) || \
1472 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) || \
1473 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) || \
1474 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) || \
1475 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) || \
1476 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) || \
1477 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) || \
1478 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) || \
1479 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) || \
1480 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) || \
1481 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) || \
1482 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV256))
1483
1484/**
1485 * @}
1486 */
1487
1488/* Include UART HAL Extended module */
1489#include "stm32g0xx_hal_uart_ex.h"
1490
1491
1492/* Exported functions --------------------------------------------------------*/
1493/** @addtogroup UART_Exported_Functions UART Exported Functions
1494 * @{
1495 */
1496
1497/** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions
1498 * @{
1499 */
1500
1501/* Initialization and de-initialization functions ****************************/
1502HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart);
1503HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart);
1504HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength);
1505HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod);
1506HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart);
1507void HAL_UART_MspInit(UART_HandleTypeDef *huart);
1508void HAL_UART_MspDeInit(UART_HandleTypeDef *huart);
1509
1510/* Callbacks Register/UnRegister functions ***********************************/
1511#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
1512HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID, pUART_CallbackTypeDef pCallback);
1513HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID);
1514#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
1515
1516/**
1517 * @}
1518 */
1519
1520/** @addtogroup UART_Exported_Functions_Group2 IO operation functions
1521 * @{
1522 */
1523
1524/* IO operation functions *****************************************************/
1525HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
1526HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
1527HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
1528HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
1529HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
1530HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
1531HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart);
1532HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart);
1533HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart);
1534/* Transfer Abort functions */
1535HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart);
1536HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart);
1537HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart);
1538HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart);
1539HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart);
1540HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart);
1541
1542void HAL_UART_IRQHandler(UART_HandleTypeDef *huart);
1543void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart);
1544void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart);
1545void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart);
1546void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart);
1547void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart);
1548void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart);
1549void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart);
1550void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart);
1551
1552/**
1553 * @}
1554 */
1555
1556/** @addtogroup UART_Exported_Functions_Group3 Peripheral Control functions
1557 * @{
1558 */
1559
1560/* Peripheral Control functions ************************************************/
1561HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart);
1562HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart);
1563HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart);
1564void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart);
1565HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart);
1566HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart);
1567
1568/**
1569 * @}
1570 */
1571
1572/** @addtogroup UART_Exported_Functions_Group4 Peripheral State and Error functions
1573 * @{
1574 */
1575
1576/* Peripheral State and Errors functions **************************************************/
1577HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart);
1578uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart);
1579
1580/**
1581 * @}
1582 */
1583
1584/**
1585 * @}
1586 */
1587
1588/* Private functions -----------------------------------------------------------*/
1589/** @addtogroup UART_Private_Functions UART Private Functions
1590 * @{
1591 */
1592#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
1593void UART_InitCallbacksToDefault(UART_HandleTypeDef *huart);
1594#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
1595HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart);
1596HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart);
1597HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout);
1598void UART_AdvFeatureConfig(UART_HandleTypeDef *huart);
1599
1600/**
1601 * @}
1602 */
1603
1604/**
1605 * @}
1606 */
1607
1608/**
1609 * @}
1610 */
1611
1612#ifdef __cplusplus
1613}
1614#endif
1615
1616#endif /* STM32G0xx_HAL_UART_H */
1617
1618/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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