source: trunk/firmware/Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_i2s.h

Last change on this file was 6, checked in by f.jahn, 8 months ago
File size: 22.6 KB
Line 
1/**
2 ******************************************************************************
3 * @file stm32g0xx_hal_i2s.h
4 * @author MCD Application Team
5 * @brief Header file of I2S HAL module.
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>&copy; Copyright (c) 2018 STMicroelectronics.
10 * All rights reserved.</center></h2>
11 *
12 * This software component is licensed by ST under BSD 3-Clause license,
13 * the "License"; You may not use this file except in compliance with the
14 * License. You may obtain a copy of the License at:
15 * opensource.org/licenses/BSD-3-Clause
16 *
17 ******************************************************************************
18 */
19
20/* Define to prevent recursive inclusion -------------------------------------*/
21#ifndef STM32G0xx_HAL_I2S_H
22#define STM32G0xx_HAL_I2S_H
23
24#ifdef __cplusplus
25extern "C" {
26#endif
27
28#if defined(SPI_I2S_SUPPORT)
29/* Includes ------------------------------------------------------------------*/
30#include "stm32g0xx_hal_def.h"
31
32/** @addtogroup STM32G0xx_HAL_Driver
33 * @{
34 */
35
36/** @addtogroup I2S
37 * @{
38 */
39
40/* Exported types ------------------------------------------------------------*/
41/** @defgroup I2S_Exported_Types I2S Exported Types
42 * @{
43 */
44
45/**
46 * @brief I2S Init structure definition
47 */
48typedef struct
49{
50 uint32_t Mode; /*!< Specifies the I2S operating mode.
51 This parameter can be a value of @ref I2S_Mode */
52
53 uint32_t Standard; /*!< Specifies the standard used for the I2S communication.
54 This parameter can be a value of @ref I2S_Standard */
55
56 uint32_t DataFormat; /*!< Specifies the data format for the I2S communication.
57 This parameter can be a value of @ref I2S_Data_Format */
58
59 uint32_t MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not.
60 This parameter can be a value of @ref I2S_MCLK_Output */
61
62 uint32_t AudioFreq; /*!< Specifies the frequency selected for the I2S communication.
63 This parameter can be a value of @ref I2S_Audio_Frequency */
64
65 uint32_t CPOL; /*!< Specifies the idle state of the I2S clock.
66 This parameter can be a value of @ref I2S_Clock_Polarity */
67} I2S_InitTypeDef;
68
69/**
70 * @brief HAL State structures definition
71 */
72typedef enum
73{
74 HAL_I2S_STATE_RESET = 0x00U, /*!< I2S not yet initialized or disabled */
75 HAL_I2S_STATE_READY = 0x01U, /*!< I2S initialized and ready for use */
76 HAL_I2S_STATE_BUSY = 0x02U, /*!< I2S internal process is ongoing */
77 HAL_I2S_STATE_BUSY_TX = 0x03U, /*!< Data Transmission process is ongoing */
78 HAL_I2S_STATE_BUSY_RX = 0x04U, /*!< Data Reception process is ongoing */
79 HAL_I2S_STATE_TIMEOUT = 0x06U, /*!< I2S timeout state */
80 HAL_I2S_STATE_ERROR = 0x07U /*!< I2S error state */
81} HAL_I2S_StateTypeDef;
82
83/**
84 * @brief I2S handle Structure definition
85 */
86#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1)
87typedef struct __I2S_HandleTypeDef
88#else
89typedef struct
90#endif
91{
92 SPI_TypeDef *Instance; /*!< I2S registers base address */
93
94 I2S_InitTypeDef Init; /*!< I2S communication parameters */
95
96 uint16_t *pTxBuffPtr; /*!< Pointer to I2S Tx transfer buffer */
97
98 __IO uint16_t TxXferSize; /*!< I2S Tx transfer size */
99
100 __IO uint16_t TxXferCount; /*!< I2S Tx transfer Counter */
101
102 uint16_t *pRxBuffPtr; /*!< Pointer to I2S Rx transfer buffer */
103
104 __IO uint16_t RxXferSize; /*!< I2S Rx transfer size */
105
106 __IO uint16_t RxXferCount; /*!< I2S Rx transfer counter
107 (This field is initialized at the
108 same value as transfer size at the
109 beginning of the transfer and
110 decremented when a sample is received
111 NbSamplesReceived = RxBufferSize-RxBufferCount) */
112 DMA_HandleTypeDef *hdmatx; /*!< I2S Tx DMA handle parameters */
113
114 DMA_HandleTypeDef *hdmarx; /*!< I2S Rx DMA handle parameters */
115
116 __IO HAL_LockTypeDef Lock; /*!< I2S locking object */
117
118 __IO HAL_I2S_StateTypeDef State; /*!< I2S communication state */
119
120 __IO uint32_t ErrorCode; /*!< I2S Error code
121 This parameter can be a value of @ref I2S_Error */
122
123#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
124 void (* TxCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Tx Completed callback */
125 void (* RxCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Rx Completed callback */
126 void (* TxHalfCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Tx Half Completed callback */
127 void (* RxHalfCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Rx Half Completed callback */
128 void (* ErrorCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Error callback */
129 void (* MspInitCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Msp Init callback */
130 void (* MspDeInitCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Msp DeInit callback */
131
132#endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
133} I2S_HandleTypeDef;
134
135#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
136/**
137 * @brief HAL I2S Callback ID enumeration definition
138 */
139typedef enum
140{
141 HAL_I2S_TX_COMPLETE_CB_ID = 0x00U, /*!< I2S Tx Completed callback ID */
142 HAL_I2S_RX_COMPLETE_CB_ID = 0x01U, /*!< I2S Rx Completed callback ID */
143 HAL_I2S_TX_HALF_COMPLETE_CB_ID = 0x03U, /*!< I2S Tx Half Completed callback ID */
144 HAL_I2S_RX_HALF_COMPLETE_CB_ID = 0x04U, /*!< I2S Rx Half Completed callback ID */
145 HAL_I2S_ERROR_CB_ID = 0x06U, /*!< I2S Error callback ID */
146 HAL_I2S_MSPINIT_CB_ID = 0x07U, /*!< I2S Msp Init callback ID */
147 HAL_I2S_MSPDEINIT_CB_ID = 0x08U /*!< I2S Msp DeInit callback ID */
148
149} HAL_I2S_CallbackIDTypeDef;
150
151/**
152 * @brief HAL I2S Callback pointer definition
153 */
154typedef void (*pI2S_CallbackTypeDef)(I2S_HandleTypeDef *hi2s); /*!< pointer to an I2S callback function */
155
156#endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
157/**
158 * @}
159 */
160
161/* Exported constants --------------------------------------------------------*/
162/** @defgroup I2S_Exported_Constants I2S Exported Constants
163 * @{
164 */
165/** @defgroup I2S_Error I2S Error
166 * @{
167 */
168#define HAL_I2S_ERROR_NONE (0x00000000U) /*!< No error */
169#define HAL_I2S_ERROR_TIMEOUT (0x00000001U) /*!< Timeout error */
170#define HAL_I2S_ERROR_OVR (0x00000002U) /*!< OVR error */
171#define HAL_I2S_ERROR_UDR (0x00000004U) /*!< UDR error */
172#define HAL_I2S_ERROR_DMA (0x00000008U) /*!< DMA transfer error */
173#define HAL_I2S_ERROR_PRESCALER (0x00000010U) /*!< Prescaler Calculation error */
174#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
175#define HAL_I2S_ERROR_INVALID_CALLBACK (0x00000020U) /*!< Invalid Callback error */
176#endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
177/**
178 * @}
179 */
180
181/** @defgroup I2S_Mode I2S Mode
182 * @{
183 */
184#define I2S_MODE_SLAVE_TX (0x00000000U)
185#define I2S_MODE_SLAVE_RX (SPI_I2SCFGR_I2SCFG_0)
186#define I2S_MODE_MASTER_TX (SPI_I2SCFGR_I2SCFG_1)
187#define I2S_MODE_MASTER_RX ((SPI_I2SCFGR_I2SCFG_0 | SPI_I2SCFGR_I2SCFG_1))
188/**
189 * @}
190 */
191
192/** @defgroup I2S_Standard I2S Standard
193 * @{
194 */
195#define I2S_STANDARD_PHILIPS (0x00000000U)
196#define I2S_STANDARD_MSB (SPI_I2SCFGR_I2SSTD_0)
197#define I2S_STANDARD_LSB (SPI_I2SCFGR_I2SSTD_1)
198#define I2S_STANDARD_PCM_SHORT ((SPI_I2SCFGR_I2SSTD_0 | SPI_I2SCFGR_I2SSTD_1))
199#define I2S_STANDARD_PCM_LONG ((SPI_I2SCFGR_I2SSTD_0 | SPI_I2SCFGR_I2SSTD_1 | SPI_I2SCFGR_PCMSYNC))
200/**
201 * @}
202 */
203
204/** @defgroup I2S_Data_Format I2S Data Format
205 * @{
206 */
207#define I2S_DATAFORMAT_16B (0x00000000U)
208#define I2S_DATAFORMAT_16B_EXTENDED (SPI_I2SCFGR_CHLEN)
209#define I2S_DATAFORMAT_24B ((SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN_0))
210#define I2S_DATAFORMAT_32B ((SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN_1))
211/**
212 * @}
213 */
214
215/** @defgroup I2S_MCLK_Output I2S MCLK Output
216 * @{
217 */
218#define I2S_MCLKOUTPUT_ENABLE (SPI_I2SPR_MCKOE)
219#define I2S_MCLKOUTPUT_DISABLE (0x00000000U)
220/**
221 * @}
222 */
223
224/** @defgroup I2S_Audio_Frequency I2S Audio Frequency
225 * @{
226 */
227#define I2S_AUDIOFREQ_192K (192000U)
228#define I2S_AUDIOFREQ_96K (96000U)
229#define I2S_AUDIOFREQ_48K (48000U)
230#define I2S_AUDIOFREQ_44K (44100U)
231#define I2S_AUDIOFREQ_32K (32000U)
232#define I2S_AUDIOFREQ_22K (22050U)
233#define I2S_AUDIOFREQ_16K (16000U)
234#define I2S_AUDIOFREQ_11K (11025U)
235#define I2S_AUDIOFREQ_8K (8000U)
236#define I2S_AUDIOFREQ_DEFAULT (2U)
237/**
238 * @}
239 */
240
241/** @defgroup I2S_Clock_Polarity I2S Clock Polarity
242 * @{
243 */
244#define I2S_CPOL_LOW (0x00000000U)
245#define I2S_CPOL_HIGH (SPI_I2SCFGR_CKPOL)
246/**
247 * @}
248 */
249
250/** @defgroup I2S_Interrupts_Definition I2S Interrupts Definition
251 * @{
252 */
253#define I2S_IT_TXE SPI_CR2_TXEIE
254#define I2S_IT_RXNE SPI_CR2_RXNEIE
255#define I2S_IT_ERR SPI_CR2_ERRIE
256/**
257 * @}
258 */
259
260/** @defgroup I2S_Flags_Definition I2S Flags Definition
261 * @{
262 */
263#define I2S_FLAG_TXE SPI_SR_TXE
264#define I2S_FLAG_RXNE SPI_SR_RXNE
265
266#define I2S_FLAG_UDR SPI_SR_UDR
267#define I2S_FLAG_OVR SPI_SR_OVR
268#define I2S_FLAG_FRE SPI_SR_FRE
269
270#define I2S_FLAG_CHSIDE SPI_SR_CHSIDE
271#define I2S_FLAG_BSY SPI_SR_BSY
272
273#define I2S_FLAG_MASK (SPI_SR_RXNE | SPI_SR_TXE | SPI_SR_UDR | SPI_SR_OVR | SPI_SR_FRE | SPI_SR_CHSIDE | SPI_SR_BSY)
274/**
275 * @}
276 */
277
278/**
279 * @}
280 */
281
282/* Exported macros -----------------------------------------------------------*/
283/** @defgroup I2S_Exported_macros I2S Exported Macros
284 * @{
285 */
286
287/** @brief Reset I2S handle state
288 * @param __HANDLE__ specifies the I2S Handle.
289 * @retval None
290 */
291#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
292#define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) do{ \
293 (__HANDLE__)->State = HAL_I2S_STATE_RESET; \
294 (__HANDLE__)->MspInitCallback = NULL; \
295 (__HANDLE__)->MspDeInitCallback = NULL; \
296 } while(0)
297#else
298#define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET)
299#endif
300
301/** @brief Enable the specified SPI peripheral (in I2S mode).
302 * @param __HANDLE__ specifies the I2S Handle.
303 * @retval None
304 */
305#define __HAL_I2S_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
306
307/** @brief Disable the specified SPI peripheral (in I2S mode).
308 * @param __HANDLE__ specifies the I2S Handle.
309 * @retval None
310 */
311#define __HAL_I2S_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
312
313/** @brief Enable the specified I2S interrupts.
314 * @param __HANDLE__ specifies the I2S Handle.
315 * @param __INTERRUPT__ specifies the interrupt source to enable or disable.
316 * This parameter can be one of the following values:
317 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable
318 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
319 * @arg I2S_IT_ERR: Error interrupt enable
320 * @retval None
321 */
322#define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__) (SET_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__)))
323
324/** @brief Disable the specified I2S interrupts.
325 * @param __HANDLE__ specifies the I2S Handle.
326 * @param __INTERRUPT__ specifies the interrupt source to enable or disable.
327 * This parameter can be one of the following values:
328 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable
329 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
330 * @arg I2S_IT_ERR: Error interrupt enable
331 * @retval None
332 */
333#define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) (CLEAR_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__)))
334
335/** @brief Checks if the specified I2S interrupt source is enabled or disabled.
336 * @param __HANDLE__ specifies the I2S Handle.
337 * This parameter can be I2S where x: 1, 2, or 3 to select the I2S peripheral.
338 * @param __INTERRUPT__ specifies the I2S interrupt source to check.
339 * This parameter can be one of the following values:
340 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable
341 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
342 * @arg I2S_IT_ERR: Error interrupt enable
343 * @retval The new state of __IT__ (TRUE or FALSE).
344 */
345#define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
346
347/** @brief Checks whether the specified I2S flag is set or not.
348 * @param __HANDLE__ specifies the I2S Handle.
349 * @param __FLAG__ specifies the flag to check.
350 * This parameter can be one of the following values:
351 * @arg I2S_FLAG_RXNE: Receive buffer not empty flag
352 * @arg I2S_FLAG_TXE: Transmit buffer empty flag
353 * @arg I2S_FLAG_UDR: Underrun flag
354 * @arg I2S_FLAG_OVR: Overrun flag
355 * @arg I2S_FLAG_FRE: Frame error flag
356 * @arg I2S_FLAG_CHSIDE: Channel Side flag
357 * @arg I2S_FLAG_BSY: Busy flag
358 * @retval The new state of __FLAG__ (TRUE or FALSE).
359 */
360#define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
361
362/** @brief Clears the I2S OVR pending flag.
363 * @param __HANDLE__ specifies the I2S Handle.
364 * @retval None
365 */
366#define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) do{ \
367 __IO uint32_t tmpreg_ovr = 0x00U; \
368 tmpreg_ovr = (__HANDLE__)->Instance->DR; \
369 tmpreg_ovr = (__HANDLE__)->Instance->SR; \
370 UNUSED(tmpreg_ovr); \
371 }while(0U)
372/** @brief Clears the I2S UDR pending flag.
373 * @param __HANDLE__ specifies the I2S Handle.
374 * @retval None
375 */
376#define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__) do{\
377 __IO uint32_t tmpreg_udr = 0x00U;\
378 tmpreg_udr = ((__HANDLE__)->Instance->SR);\
379 UNUSED(tmpreg_udr); \
380 }while(0U)
381/**
382 * @}
383 */
384
385/* Exported functions --------------------------------------------------------*/
386/** @addtogroup I2S_Exported_Functions
387 * @{
388 */
389
390/** @addtogroup I2S_Exported_Functions_Group1
391 * @{
392 */
393/* Initialization/de-initialization functions ********************************/
394HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s);
395HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s);
396void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s);
397void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s);
398
399/* Callbacks Register/UnRegister functions ***********************************/
400#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
401HAL_StatusTypeDef HAL_I2S_RegisterCallback(I2S_HandleTypeDef *hi2s, HAL_I2S_CallbackIDTypeDef CallbackID, pI2S_CallbackTypeDef pCallback);
402HAL_StatusTypeDef HAL_I2S_UnRegisterCallback(I2S_HandleTypeDef *hi2s, HAL_I2S_CallbackIDTypeDef CallbackID);
403#endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
404/**
405 * @}
406 */
407
408/** @addtogroup I2S_Exported_Functions_Group2
409 * @{
410 */
411/* I/O operation functions ***************************************************/
412/* Blocking mode: Polling */
413HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
414HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
415
416/* Non-Blocking mode: Interrupt */
417HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
418HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
419void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s);
420
421/* Non-Blocking mode: DMA */
422HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
423HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
424
425HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s);
426HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s);
427HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s);
428
429/* Callbacks used in non blocking modes (Interrupt and DMA) *******************/
430void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
431void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s);
432void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
433void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s);
434void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s);
435/**
436 * @}
437 */
438
439/** @addtogroup I2S_Exported_Functions_Group3
440 * @{
441 */
442/* Peripheral Control and State functions ************************************/
443HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s);
444uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s);
445/**
446 * @}
447 */
448
449/**
450 * @}
451 */
452
453/* Private types -------------------------------------------------------------*/
454/* Private variables ---------------------------------------------------------*/
455/* Private constants ---------------------------------------------------------*/
456/** @defgroup I2S_Private_Constants I2S Private Constants
457 * @{
458 */
459
460/**
461 * @}
462 */
463
464/* Private macros ------------------------------------------------------------*/
465/** @defgroup I2S_Private_Macros I2S Private Macros
466 * @{
467 */
468
469/** @brief Check whether the specified SPI flag is set or not.
470 * @param __SR__ copy of I2S SR regsiter.
471 * @param __FLAG__ specifies the flag to check.
472 * This parameter can be one of the following values:
473 * @arg I2S_FLAG_RXNE: Receive buffer not empty flag
474 * @arg I2S_FLAG_TXE: Transmit buffer empty flag
475 * @arg I2S_FLAG_UDR: Underrun error flag
476 * @arg I2S_FLAG_OVR: Overrun flag
477 * @arg I2S_FLAG_CHSIDE: Channel side flag
478 * @arg I2S_FLAG_BSY: Busy flag
479 * @retval SET or RESET.
480 */
481#define I2S_CHECK_FLAG(__SR__, __FLAG__) ((((__SR__) & ((__FLAG__) & I2S_FLAG_MASK)) == ((__FLAG__) & I2S_FLAG_MASK)) ? SET : RESET)
482
483/** @brief Check whether the specified SPI Interrupt is set or not.
484 * @param __CR2__ copy of I2S CR2 regsiter.
485 * @param __INTERRUPT__ specifies the SPI interrupt source to check.
486 * This parameter can be one of the following values:
487 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable
488 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
489 * @arg I2S_IT_ERR: Error interrupt enable
490 * @retval SET or RESET.
491 */
492#define I2S_CHECK_IT_SOURCE(__CR2__, __INTERRUPT__) ((((__CR2__) & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
493
494/** @brief Checks if I2S Mode parameter is in allowed range.
495 * @param __MODE__ specifies the I2S Mode.
496 * This parameter can be a value of @ref I2S_Mode
497 * @retval None
498 */
499#define IS_I2S_MODE(__MODE__) (((__MODE__) == I2S_MODE_SLAVE_TX) || \
500 ((__MODE__) == I2S_MODE_SLAVE_RX) || \
501 ((__MODE__) == I2S_MODE_MASTER_TX) || \
502 ((__MODE__) == I2S_MODE_MASTER_RX))
503
504#define IS_I2S_STANDARD(__STANDARD__) (((__STANDARD__) == I2S_STANDARD_PHILIPS) || \
505 ((__STANDARD__) == I2S_STANDARD_MSB) || \
506 ((__STANDARD__) == I2S_STANDARD_LSB) || \
507 ((__STANDARD__) == I2S_STANDARD_PCM_SHORT) || \
508 ((__STANDARD__) == I2S_STANDARD_PCM_LONG))
509
510#define IS_I2S_DATA_FORMAT(__FORMAT__) (((__FORMAT__) == I2S_DATAFORMAT_16B) || \
511 ((__FORMAT__) == I2S_DATAFORMAT_16B_EXTENDED) || \
512 ((__FORMAT__) == I2S_DATAFORMAT_24B) || \
513 ((__FORMAT__) == I2S_DATAFORMAT_32B))
514
515#define IS_I2S_MCLK_OUTPUT(__OUTPUT__) (((__OUTPUT__) == I2S_MCLKOUTPUT_ENABLE) || \
516 ((__OUTPUT__) == I2S_MCLKOUTPUT_DISABLE))
517
518#define IS_I2S_AUDIO_FREQ(__FREQ__) ((((__FREQ__) >= I2S_AUDIOFREQ_8K) && \
519 ((__FREQ__) <= I2S_AUDIOFREQ_192K)) || \
520 ((__FREQ__) == I2S_AUDIOFREQ_DEFAULT))
521
522/** @brief Checks if I2S Serial clock steady state parameter is in allowed range.
523 * @param __CPOL__ specifies the I2S serial clock steady state.
524 * This parameter can be a value of @ref I2S_Clock_Polarity
525 * @retval None
526 */
527#define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_LOW) || \
528 ((CPOL) == I2S_CPOL_HIGH))
529
530/**
531 * @}
532 */
533
534/**
535 * @}
536 */
537
538/**
539 * @}
540 */
541#endif /* SPI_I2S_SUPPORT */
542
543#ifdef __cplusplus
544}
545#endif
546
547#endif /* STM32G0xx_HAL_I2S_H */
548
549/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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