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stm32g0xx_hal_dac.h

Last change on this file was 6, checked in by f.jahn, 8 months ago

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1	/**
2	******************************************************************************
3	* @file stm32g0xx_hal_dac.h
4	* @author MCD Application Team
5	* @brief Header file of DAC HAL module.
6	******************************************************************************
7	* @attention
8	*
9	* <h2><center>© Copyright (c) 2018 STMicroelectronics.
10	* All rights reserved.</center></h2>
11	*
12	* This software component is licensed by ST under BSD 3-Clause license,
13	* the "License"; You may not use this file except in compliance with the
14	* License. You may obtain a copy of the License at:
15	* opensource.org/licenses/BSD-3-Clause
16	*
17	******************************************************************************
18	*/
19
20	/* Define to prevent recursive inclusion -------------------------------------*/
21	#ifndef STM32G0xx_HAL_DAC_H
22	#define STM32G0xx_HAL_DAC_H
23
24	#ifdef __cplusplus
25	extern "C" {
26	#endif
27
28	/** @addtogroup STM32G0xx_HAL_Driver
29	* @{
30	*/
31
32	/* Includes ------------------------------------------------------------------*/
33	#include "stm32g0xx_hal_def.h"
34
35	#if defined(DAC1)
36
37	/** @addtogroup DAC
38	* @{
39	*/
40
41	/* Exported types ------------------------------------------------------------*/
42
43	/** @defgroup DAC_Exported_Types DAC Exported Types
44	* @{
45	*/
46
47	/**
48	* @brief HAL State structures definition
49	*/
50	typedef enum
51	{
52	HAL_DAC_STATE_RESET = 0x00U, /!< DAC not yet initialized or disabled /
53	HAL_DAC_STATE_READY = 0x01U, /!< DAC initialized and ready for use /
54	HAL_DAC_STATE_BUSY = 0x02U, /!< DAC internal processing is ongoing /
55	HAL_DAC_STATE_TIMEOUT = 0x03U, /!< DAC timeout state /
56	HAL_DAC_STATE_ERROR = 0x04U /!< DAC error state /
57
58	} HAL_DAC_StateTypeDef;
59
60	/**
61	* @brief DAC handle Structure definition
62	*/
63	#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
64	typedef struct __DAC_HandleTypeDef
65	#else
66	typedef struct
67	#endif
68	{
69	DAC_TypeDef Instance; /!< Register base address */
70
71	__IO HAL_DAC_StateTypeDef State; /!< DAC communication state /
72
73	HAL_LockTypeDef Lock; /!< DAC locking object /
74
75	DMA_HandleTypeDef DMA_Handle1; /!< Pointer DMA handler for channel 1 */
76
77	DMA_HandleTypeDef DMA_Handle2; /!< Pointer DMA handler for channel 2 */
78
79	__IO uint32_t ErrorCode; /!< DAC Error code /
80
81	#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
82	void (* ConvCpltCallbackCh1)(struct __DAC_HandleTypeDef *hdac);
83	void (* ConvHalfCpltCallbackCh1)(struct __DAC_HandleTypeDef *hdac);
84	void (* ErrorCallbackCh1)(struct __DAC_HandleTypeDef *hdac);
85	void (* DMAUnderrunCallbackCh1)(struct __DAC_HandleTypeDef *hdac);
86	void (* ConvCpltCallbackCh2)(struct __DAC_HandleTypeDef *hdac);
87	void (* ConvHalfCpltCallbackCh2)(struct __DAC_HandleTypeDef *hdac);
88	void (* ErrorCallbackCh2)(struct __DAC_HandleTypeDef *hdac);
89	void (* DMAUnderrunCallbackCh2)(struct __DAC_HandleTypeDef *hdac);
90
91	void (* MspInitCallback)(struct __DAC_HandleTypeDef *hdac);
92	void (* MspDeInitCallback)(struct __DAC_HandleTypeDef *hdac);
93	#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
94
95	} DAC_HandleTypeDef;
96
97	/**
98	* @brief DAC Configuration sample and hold Channel structure definition
99	*/
100	typedef struct
101	{
102	uint32_t DAC_SampleTime ; /*!< Specifies the Sample time for the selected channel.
103	This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE.
104	This parameter must be a number between Min_Data = 0 and Max_Data = 1023 */
105
106	uint32_t DAC_HoldTime ; /*!< Specifies the hold time for the selected channel
107	This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE.
108	This parameter must be a number between Min_Data = 0 and Max_Data = 1023 */
109
110	uint32_t DAC_RefreshTime ; /*!< Specifies the refresh time for the selected channel
111	This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE.
112	This parameter must be a number between Min_Data = 0 and Max_Data = 255 */
113	} DAC_SampleAndHoldConfTypeDef;
114
115	/**
116	* @brief DAC Configuration regular Channel structure definition
117	*/
118	typedef struct
119	{
120	uint32_t DAC_SampleAndHold; /*!< Specifies whether the DAC mode.
121	This parameter can be a value of @ref DAC_SampleAndHold */
122
123	uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel.
124	This parameter can be a value of @ref DAC_trigger_selection */
125
126	uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled.
127	This parameter can be a value of @ref DAC_output_buffer */
128
129	uint32_t DAC_ConnectOnChipPeripheral ; /*!< Specifies whether the DAC output is connected or not to on chip peripheral .
130	This parameter can be a value of @ref DAC_ConnectOnChipPeripheral */
131
132	uint32_t DAC_UserTrimming; /*!< Specifies the trimming mode
133	This parameter must be a value of @ref DAC_UserTrimming
134	DAC_UserTrimming is either factory or user trimming */
135
136	uint32_t DAC_TrimmingValue; /*!< Specifies the offset trimming value
137	i.e. when DAC_SampleAndHold is DAC_TRIMMING_USER.
138	This parameter must be a number between Min_Data = 1 and Max_Data = 31 */
139
140	DAC_SampleAndHoldConfTypeDef DAC_SampleAndHoldConfig; /!< Sample and Hold settings /
141
142	} DAC_ChannelConfTypeDef;
143
144	#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
145	/**
146	* @brief HAL DAC Callback ID enumeration definition
147	*/
148	typedef enum
149	{
150	HAL_DAC_CH1_COMPLETE_CB_ID = 0x00U, /!< DAC CH1 Complete Callback ID /
151	HAL_DAC_CH1_HALF_COMPLETE_CB_ID = 0x01U, /!< DAC CH1 half Complete Callback ID /
152	HAL_DAC_CH1_ERROR_ID = 0x02U, /!< DAC CH1 error Callback ID /
153	HAL_DAC_CH1_UNDERRUN_CB_ID = 0x03U, /!< DAC CH1 underrun Callback ID /
154	HAL_DAC_CH2_COMPLETE_CB_ID = 0x04U, /!< DAC CH2 Complete Callback ID /
155	HAL_DAC_CH2_HALF_COMPLETE_CB_ID = 0x05U, /!< DAC CH2 half Complete Callback ID /
156	HAL_DAC_CH2_ERROR_ID = 0x06U, /!< DAC CH2 error Callback ID /
157	HAL_DAC_CH2_UNDERRUN_CB_ID = 0x07U, /!< DAC CH2 underrun Callback ID /
158	HAL_DAC_MSPINIT_CB_ID = 0x08U, /!< DAC MspInit Callback ID /
159	HAL_DAC_MSPDEINIT_CB_ID = 0x09U, /!< DAC MspDeInit Callback ID /
160	HAL_DAC_ALL_CB_ID = 0x0AU /!< DAC All ID /
161	} HAL_DAC_CallbackIDTypeDef;
162
163	/**
164	* @brief HAL DAC Callback pointer definition
165	*/
166	typedef void (pDAC_CallbackTypeDef)(DAC_HandleTypeDef hdac);
167	#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
168
169	/**
170	* @}
171	*/
172
173	/* Exported constants --------------------------------------------------------*/
174
175	/** @defgroup DAC_Exported_Constants DAC Exported Constants
176	* @{
177	*/
178
179	/** @defgroup DAC_Error_Code DAC Error Code
180	* @{
181	*/
182	#define HAL_DAC_ERROR_NONE 0x00U /!< No error /
183	#define HAL_DAC_ERROR_DMAUNDERRUNCH1 0x01U /!< DAC channel1 DMA underrun error /
184	#define HAL_DAC_ERROR_DMAUNDERRUNCH2 0x02U /!< DAC channel2 DMA underrun error /
185	#define HAL_DAC_ERROR_DMA 0x04U /!< DMA error /
186	#define HAL_DAC_ERROR_TIMEOUT 0x08U /!< Timeout error /
187	#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
188	#define HAL_DAC_ERROR_INVALID_CALLBACK 0x10U /!< Invalid callback error /
189	#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
190
191	/**
192	* @}
193	*/
194
195	/** @defgroup DAC_trigger_selection DAC trigger selection
196	* @{
197	*/
198	#define DAC_TRIGGER_NONE 0x00000000U /!< Conversion is automatic once the DAC_DHRxxxx register has been loaded, and not by external trigger /
199	#define DAC_TRIGGER_SOFTWARE (DAC_CR_TEN1) /!< Conversion started by software trigger for DAC channel /
200	#define DAC_TRIGGER_T1_TRGO (DAC_CR_TSEL1_0 \| DAC_CR_TEN1) /!< TIM1 TRGO selected as external conversion trigger for DAC channel /
201	#define DAC_TRIGGER_T2_TRGO (DAC_CR_TSEL1_1 \| DAC_CR_TEN1) /!< TIM2 TRGO selected as external conversion trigger for DAC channel /
202	#define DAC_TRIGGER_T3_TRGO (DAC_CR_TSEL1_1 \| DAC_CR_TSEL1_0 \| DAC_CR_TEN1) /!< TIM3 TRGO selected as external conversion trigger for DAC channel /
203	#define DAC_TRIGGER_T6_TRGO (DAC_CR_TSEL1_2 \| DAC_CR_TSEL1_0 \| DAC_CR_TEN1) /!< TIM6 TRGO selected as external conversion trigger for DAC channel /
204	#define DAC_TRIGGER_T7_TRGO (DAC_CR_TSEL1_2 \| DAC_CR_TSEL1_1 \| DAC_CR_TEN1) /!< TIM7 TRGO selected as external conversion trigger for DAC channel /
205	#define DAC_TRIGGER_T15_TRGO (DAC_CR_TSEL1_3 \| DAC_CR_TEN1) /!< TIM15 TRGO selected as external conversion trigger for DAC channel /
206	#define DAC_TRIGGER_LPTIM1_OUT (DAC_CR_TSEL1_3 \| DAC_CR_TSEL1_1 \| DAC_CR_TSEL1_0 \| DAC_CR_TEN1) /!< LPTIM1_OUT selected as external conversion trigger for DAC channel /
207	#define DAC_TRIGGER_LPTIM2_OUT (DAC_CR_TSEL1_3 \| DAC_CR_TSEL1_2 \| DAC_CR_TEN1) /!< LPTIM2_OUT selected as external conversion trigger for DAC channel /
208	#define DAC_TRIGGER_EXT_IT9 (DAC_CR_TSEL1_3 \| DAC_CR_TSEL1_2 \| DAC_CR_TSEL1_0 \| DAC_CR_TEN1) /!< EXTI Line9 event selected as external conversion trigger for DAC channel /
209
210	/**
211	* @}
212	*/
213
214	/** @defgroup DAC_output_buffer DAC output buffer
215	* @{
216	*/
217	#define DAC_OUTPUTBUFFER_ENABLE 0x00000000U
218	#define DAC_OUTPUTBUFFER_DISABLE (DAC_MCR_MODE1_1)
219
220	/**
221	* @}
222	*/
223
224	/** @defgroup DAC_Channel_selection DAC Channel selection
225	* @{
226	*/
227	#define DAC_CHANNEL_1 0x00000000U
228	#define DAC_CHANNEL_2 0x00000010U
229	/**
230	* @}
231	*/
232
233	/** @defgroup DAC_data_alignment DAC data alignment
234	* @{
235	*/
236	#define DAC_ALIGN_12B_R 0x00000000U
237	#define DAC_ALIGN_12B_L 0x00000004U
238	#define DAC_ALIGN_8B_R 0x00000008U
239
240	/**
241	* @}
242	*/
243
244	/** @defgroup DAC_flags_definition DAC flags definition
245	* @{
246	*/
247	#define DAC_FLAG_DMAUDR1 (DAC_SR_DMAUDR1)
248	#define DAC_FLAG_DMAUDR2 (DAC_SR_DMAUDR2)
249
250	/**
251	* @}
252	*/
253
254	/** @defgroup DAC_IT_definition DAC IT definition
255	* @{
256	*/
257	#define DAC_IT_DMAUDR1 (DAC_SR_DMAUDR1)
258	#define DAC_IT_DMAUDR2 (DAC_SR_DMAUDR2)
259
260	/**
261	* @}
262	*/
263
264	/** @defgroup DAC_ConnectOnChipPeripheral DAC ConnectOnChipPeripheral
265	* @{
266	*/
267	#define DAC_CHIPCONNECT_DISABLE 0x00000000U
268	#define DAC_CHIPCONNECT_ENABLE (DAC_MCR_MODE1_0)
269
270	/**
271	* @}
272	*/
273
274	/** @defgroup DAC_UserTrimming DAC User Trimming
275	* @{
276	*/
277	#define DAC_TRIMMING_FACTORY 0x00000000U /!< Factory trimming /
278	#define DAC_TRIMMING_USER 0x00000001U /!< User trimming /
279
280	/**
281	* @}
282	*/
283	/** @defgroup DAC_SampleAndHold DAC power mode
284	* @{
285	*/
286	#define DAC_SAMPLEANDHOLD_DISABLE 0x00000000U
287	#define DAC_SAMPLEANDHOLD_ENABLE (DAC_MCR_MODE1_2)
288
289	/**
290	* @}
291	*/
292	/**
293	* @}
294	*/
295
296	/* Exported macro ------------------------------------------------------------*/
297
298	/** @defgroup DAC_Exported_Macros DAC Exported Macros
299	* @{
300	*/
301
302	/** @brief Reset DAC handle state.
303	* @param __HANDLE__ specifies the DAC handle.
304	* @retval None
305	*/
306	#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
307	#define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) do { \
308	(__HANDLE__)->State = HAL_DAC_STATE_RESET; \
309	(__HANDLE__)->MspInitCallback = NULL; \
310	(__HANDLE__)->MspDeInitCallback = NULL; \
311	} while(0)
312	#else
313	#define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET)
314	#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
315
316	/** @brief Enable the DAC channel.
317	* @param __HANDLE__ specifies the DAC handle.
318	* @param __DAC_Channel__ specifies the DAC channel
319	* @retval None
320	*/
321	#define __HAL_DAC_ENABLE(__HANDLE__, __DAC_Channel__) \
322	((__HANDLE__)->Instance->CR \|= (DAC_CR_EN1 << ((__DAC_Channel__) & 0x10UL)))
323
324	/** @brief Disable the DAC channel.
325	* @param __HANDLE__ specifies the DAC handle
326	* @param __DAC_Channel__ specifies the DAC channel.
327	* @retval None
328	*/
329	#define __HAL_DAC_DISABLE(__HANDLE__, __DAC_Channel__) \
330	((__HANDLE__)->Instance->CR &= ~(DAC_CR_EN1 << ((__DAC_Channel__) & 0x10UL)))
331
332	/** @brief Set DHR12R1 alignment.
333	* @param __ALIGNMENT__ specifies the DAC alignment
334	* @retval None
335	*/
336	#define DAC_DHR12R1_ALIGNMENT(__ALIGNMENT__) (0x00000008U + (__ALIGNMENT__))
337
338	/** @brief Set DHR12R2 alignment.
339	* @param __ALIGNMENT__ specifies the DAC alignment
340	* @retval None
341	*/
342	#define DAC_DHR12R2_ALIGNMENT(__ALIGNMENT__) (0x00000014U + (__ALIGNMENT__))
343
344	/** @brief Set DHR12RD alignment.
345	* @param __ALIGNMENT__ specifies the DAC alignment
346	* @retval None
347	*/
348	#define DAC_DHR12RD_ALIGNMENT(__ALIGNMENT__) (0x00000020U + (__ALIGNMENT__))
349
350	/** @brief Enable the DAC interrupt.
351	* @param __HANDLE__ specifies the DAC handle
352	* @param __INTERRUPT__ specifies the DAC interrupt.
353	* This parameter can be any combination of the following values:
354	* @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt
355	* @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt
356	* @retval None
357	*/
358	#define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) \|= (__INTERRUPT__))
359
360	/** @brief Disable the DAC interrupt.
361	* @param __HANDLE__ specifies the DAC handle
362	* @param __INTERRUPT__ specifies the DAC interrupt.
363	* This parameter can be any combination of the following values:
364	* @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt
365	* @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt
366	* @retval None
367	*/
368	#define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__))
369
370	/** @brief Check whether the specified DAC interrupt source is enabled or not.
371	* @param __HANDLE__ DAC handle
372	* @param __INTERRUPT__ DAC interrupt source to check
373	* This parameter can be any combination of the following values:
374	* @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt
375	* @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt
376	* @retval State of interruption (SET or RESET)
377	*/
378	#define __HAL_DAC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR & (__INTERRUPT__)) == (__INTERRUPT__))
379
380	/** @brief Get the selected DAC's flag status.
381	* @param __HANDLE__ specifies the DAC handle.
382	* @param __FLAG__ specifies the DAC flag to get.
383	* This parameter can be any combination of the following values:
384	* @arg DAC_FLAG_DMAUDR1: DAC channel 1 DMA underrun flag
385	* @arg DAC_FLAG_DMAUDR2: DAC channel 2 DMA underrun flag
386	* @retval None
387	*/
388	#define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
389
390	/** @brief Clear the DAC's flag.
391	* @param __HANDLE__ specifies the DAC handle.
392	* @param __FLAG__ specifies the DAC flag to clear.
393	* This parameter can be any combination of the following values:
394	* @arg DAC_FLAG_DMAUDR1: DAC channel 1 DMA underrun flag
395	* @arg DAC_FLAG_DMAUDR2: DAC channel 2 DMA underrun flag
396	* @retval None
397	*/
398	#define __HAL_DAC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) = (__FLAG__))
399
400	/**
401	* @}
402	*/
403
404	/* Private macro -------------------------------------------------------------*/
405
406	/** @defgroup DAC_Private_Macros DAC Private Macros
407	* @{
408	*/
409	#define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) \|\| \
410	((STATE) == DAC_OUTPUTBUFFER_DISABLE))
411
412	#define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_CHANNEL_1) \|\| \
413	((CHANNEL) == DAC_CHANNEL_2))
414
415	#define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) \|\| \
416	((ALIGN) == DAC_ALIGN_12B_L) \|\| \
417	((ALIGN) == DAC_ALIGN_8B_R))
418
419	#define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0U)
420
421	#define IS_DAC_REFRESHTIME(TIME) ((TIME) <= 0x000000FFU)
422
423	/**
424	* @}
425	*/
426
427	/* Include DAC HAL Extended module */
428	#include "stm32g0xx_hal_dac_ex.h"
429
430	/* Exported functions --------------------------------------------------------*/
431
432	/** @addtogroup DAC_Exported_Functions
433	* @{
434	*/
435
436	/** @addtogroup DAC_Exported_Functions_Group1
437	* @{
438	*/
439	/* Initialization and de-initialization functions *****************************/
440	HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef *hdac);
441	HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef *hdac);
442	void HAL_DAC_MspInit(DAC_HandleTypeDef *hdac);
443	void HAL_DAC_MspDeInit(DAC_HandleTypeDef *hdac);
444
445	/**
446	* @}
447	*/
448
449	/** @addtogroup DAC_Exported_Functions_Group2
450	* @{
451	*/
452	/* IO operation functions *****************************************************/
453	HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef *hdac, uint32_t Channel);
454	HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef *hdac, uint32_t Channel);
455	HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef hdac, uint32_t Channel, uint32_t pData, uint32_t Length,
456	uint32_t Alignment);
457	HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel);
458
459	void HAL_DAC_IRQHandler(DAC_HandleTypeDef *hdac);
460
461	HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data);
462
463	void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef *hdac);
464	void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef *hdac);
465	void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac);
466	void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac);
467
468	#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
469	/* DAC callback registering/unregistering */
470	HAL_StatusTypeDef HAL_DAC_RegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID,
471	pDAC_CallbackTypeDef pCallback);
472	HAL_StatusTypeDef HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID);
473	#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
474
475	/**
476	* @}
477	*/
478
479	/** @addtogroup DAC_Exported_Functions_Group3
480	* @{
481	*/
482	/* Peripheral Control functions ***********************************************/
483	uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef *hdac, uint32_t Channel);
484
485	HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef hdac, DAC_ChannelConfTypeDef sConfig, uint32_t Channel);
486	/**
487	* @}
488	*/
489
490	/** @addtogroup DAC_Exported_Functions_Group4
491	* @{
492	*/
493	/* Peripheral State and Error functions ***************************************/
494	HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef *hdac);
495	uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac);
496
497	/**
498	* @}
499	*/
500
501	/**
502	* @}
503	*/
504
505	/** @defgroup DAC_Private_Functions DAC Private Functions
506	* @{
507	*/
508	void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma);
509	void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma);
510	void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma);
511	/**
512	* @}
513	*/
514
515	/**
516	* @}
517	*/
518
519	#endif /* DAC1 */
520
521	/**
522	* @}
523	*/
524
525	#ifdef __cplusplus
526	}
527	#endif
528
529
530	#endif /STM32G0xx_HAL_DAC_H /
531
532	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/
533

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