source: trunk/firmware_v4/Drivers/CMSIS/DAP/Firmware/Include/DAP.h

Last change on this file was 42, checked in by f.jahn, 5 days ago
File size: 13.9 KB
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1/*
2 * Copyright (c) 2013-2022 ARM Limited. All rights reserved.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 *
6 * Licensed under the Apache License, Version 2.0 (the License); you may
7 * not use this file except in compliance with the License.
8 * You may obtain a copy of the License at
9 *
10 * www.apache.org/licenses/LICENSE-2.0
11 *
12 * Unless required by applicable law or agreed to in writing, software
13 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
14 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
15 * See the License for the specific language governing permissions and
16 * limitations under the License.
17 *
18 * ----------------------------------------------------------------------
19 *
20 * $Date: 26. April 2022
21 * $Revision: V2.1.1
22 *
23 * Project: CMSIS-DAP Include
24 * Title: DAP.h Definitions
25 *
26 *---------------------------------------------------------------------------*/
27
28#ifndef __DAP_H__
29#define __DAP_H__
30
31
32// DAP Firmware Version
33#ifdef DAP_FW_V1
34#define DAP_FW_VER "1.3.0"
35#else
36#define DAP_FW_VER "2.1.1"
37#endif
38
39// DAP Command IDs
40#define ID_DAP_Info 0x00U
41#define ID_DAP_HostStatus 0x01U
42#define ID_DAP_Connect 0x02U
43#define ID_DAP_Disconnect 0x03U
44#define ID_DAP_TransferConfigure 0x04U
45#define ID_DAP_Transfer 0x05U
46#define ID_DAP_TransferBlock 0x06U
47#define ID_DAP_TransferAbort 0x07U
48#define ID_DAP_WriteABORT 0x08U
49#define ID_DAP_Delay 0x09U
50#define ID_DAP_ResetTarget 0x0AU
51#define ID_DAP_SWJ_Pins 0x10U
52#define ID_DAP_SWJ_Clock 0x11U
53#define ID_DAP_SWJ_Sequence 0x12U
54#define ID_DAP_SWD_Configure 0x13U
55#define ID_DAP_SWD_Sequence 0x1DU
56#define ID_DAP_JTAG_Sequence 0x14U
57#define ID_DAP_JTAG_Configure 0x15U
58#define ID_DAP_JTAG_IDCODE 0x16U
59#define ID_DAP_SWO_Transport 0x17U
60#define ID_DAP_SWO_Mode 0x18U
61#define ID_DAP_SWO_Baudrate 0x19U
62#define ID_DAP_SWO_Control 0x1AU
63#define ID_DAP_SWO_Status 0x1BU
64#define ID_DAP_SWO_ExtendedStatus 0x1EU
65#define ID_DAP_SWO_Data 0x1CU
66#define ID_DAP_UART_Transport 0x1FU
67#define ID_DAP_UART_Configure 0x20U
68#define ID_DAP_UART_Control 0x22U
69#define ID_DAP_UART_Status 0x23U
70#define ID_DAP_UART_Transfer 0x21U
71
72#define ID_DAP_QueueCommands 0x7EU
73#define ID_DAP_ExecuteCommands 0x7FU
74
75// DAP Vendor Command IDs
76#define ID_DAP_Vendor0 0x80U
77#define ID_DAP_Vendor1 0x81U
78#define ID_DAP_Vendor2 0x82U
79#define ID_DAP_Vendor3 0x83U
80#define ID_DAP_Vendor4 0x84U
81#define ID_DAP_Vendor5 0x85U
82#define ID_DAP_Vendor6 0x86U
83#define ID_DAP_Vendor7 0x87U
84#define ID_DAP_Vendor8 0x88U
85#define ID_DAP_Vendor9 0x89U
86#define ID_DAP_Vendor10 0x8AU
87#define ID_DAP_Vendor11 0x8BU
88#define ID_DAP_Vendor12 0x8CU
89#define ID_DAP_Vendor13 0x8DU
90#define ID_DAP_Vendor14 0x8EU
91#define ID_DAP_Vendor15 0x8FU
92#define ID_DAP_Vendor16 0x90U
93#define ID_DAP_Vendor17 0x91U
94#define ID_DAP_Vendor18 0x92U
95#define ID_DAP_Vendor19 0x93U
96#define ID_DAP_Vendor20 0x94U
97#define ID_DAP_Vendor21 0x95U
98#define ID_DAP_Vendor22 0x96U
99#define ID_DAP_Vendor23 0x97U
100#define ID_DAP_Vendor24 0x98U
101#define ID_DAP_Vendor25 0x99U
102#define ID_DAP_Vendor26 0x9AU
103#define ID_DAP_Vendor27 0x9BU
104#define ID_DAP_Vendor28 0x9CU
105#define ID_DAP_Vendor29 0x9DU
106#define ID_DAP_Vendor30 0x9EU
107#define ID_DAP_Vendor31 0x9FU
108
109#define ID_DAP_Invalid 0xFFU
110
111// DAP Status Code
112#define DAP_OK 0U
113#define DAP_ERROR 0xFFU
114
115// DAP ID
116#define DAP_ID_VENDOR 1U
117#define DAP_ID_PRODUCT 2U
118#define DAP_ID_SER_NUM 3U
119#define DAP_ID_DAP_FW_VER 4U
120#define DAP_ID_DEVICE_VENDOR 5U
121#define DAP_ID_DEVICE_NAME 6U
122#define DAP_ID_BOARD_VENDOR 7U
123#define DAP_ID_BOARD_NAME 8U
124#define DAP_ID_PRODUCT_FW_VER 9U
125#define DAP_ID_CAPABILITIES 0xF0U
126#define DAP_ID_TIMESTAMP_CLOCK 0xF1U
127#define DAP_ID_UART_RX_BUFFER_SIZE 0xFBU
128#define DAP_ID_UART_TX_BUFFER_SIZE 0xFCU
129#define DAP_ID_SWO_BUFFER_SIZE 0xFDU
130#define DAP_ID_PACKET_COUNT 0xFEU
131#define DAP_ID_PACKET_SIZE 0xFFU
132
133// DAP Host Status
134#define DAP_DEBUGGER_CONNECTED 0U
135#define DAP_TARGET_RUNNING 1U
136
137// DAP Port
138#define DAP_PORT_AUTODETECT 0U // Autodetect Port
139#define DAP_PORT_DISABLED 0U // Port Disabled (I/O pins in High-Z)
140#define DAP_PORT_SWD 1U // SWD Port (SWCLK, SWDIO) + nRESET
141#define DAP_PORT_JTAG 2U // JTAG Port (TCK, TMS, TDI, TDO, nTRST) + nRESET
142
143// DAP SWJ Pins
144#define DAP_SWJ_SWCLK_TCK 0 // SWCLK/TCK
145#define DAP_SWJ_SWDIO_TMS 1 // SWDIO/TMS
146#define DAP_SWJ_TDI 2 // TDI
147#define DAP_SWJ_TDO 3 // TDO
148#define DAP_SWJ_nTRST 5 // nTRST
149#define DAP_SWJ_nRESET 7 // nRESET
150
151// DAP Transfer Request
152#define DAP_TRANSFER_APnDP (1U<<0)
153#define DAP_TRANSFER_RnW (1U<<1)
154#define DAP_TRANSFER_A2 (1U<<2)
155#define DAP_TRANSFER_A3 (1U<<3)
156#define DAP_TRANSFER_MATCH_VALUE (1U<<4)
157#define DAP_TRANSFER_MATCH_MASK (1U<<5)
158#define DAP_TRANSFER_TIMESTAMP (1U<<7)
159
160// DAP Transfer Response
161#define DAP_TRANSFER_OK (1U<<0)
162#define DAP_TRANSFER_WAIT (1U<<1)
163#define DAP_TRANSFER_FAULT (1U<<2)
164#define DAP_TRANSFER_ERROR (1U<<3)
165#define DAP_TRANSFER_MISMATCH (1U<<4)
166
167// DAP SWO Trace Mode
168#define DAP_SWO_OFF 0U
169#define DAP_SWO_UART 1U
170#define DAP_SWO_MANCHESTER 2U
171
172// DAP SWO Trace Status
173#define DAP_SWO_CAPTURE_ACTIVE (1U<<0)
174#define DAP_SWO_CAPTURE_PAUSED (1U<<1)
175#define DAP_SWO_STREAM_ERROR (1U<<6)
176#define DAP_SWO_BUFFER_OVERRUN (1U<<7)
177
178// DAP UART Transport
179#define DAP_UART_TRANSPORT_NONE 0U
180#define DAP_UART_TRANSPORT_USB_COM_PORT 1U
181#define DAP_UART_TRANSPORT_DAP_COMMAND 2U
182
183// DAP UART Control
184#define DAP_UART_CONTROL_RX_ENABLE (1U<<0)
185#define DAP_UART_CONTROL_RX_DISABLE (1U<<1)
186#define DAP_UART_CONTROL_RX_BUF_FLUSH (1U<<2)
187#define DAP_UART_CONTROL_TX_ENABLE (1U<<4)
188#define DAP_UART_CONTROL_TX_DISABLE (1U<<5)
189#define DAP_UART_CONTROL_TX_BUF_FLUSH (1U<<6)
190
191// DAP UART Status
192#define DAP_UART_STATUS_RX_ENABLED (1U<<0)
193#define DAP_UART_STATUS_RX_DATA_LOST (1U<<1)
194#define DAP_UART_STATUS_FRAMING_ERROR (1U<<2)
195#define DAP_UART_STATUS_PARITY_ERROR (1U<<3)
196#define DAP_UART_STATUS_TX_ENABLED (1U<<4)
197
198// DAP UART Configure Error
199#define DAP_UART_CFG_ERROR_DATA_BITS (1U<<0)
200#define DAP_UART_CFG_ERROR_PARITY (1U<<1)
201#define DAP_UART_CFG_ERROR_STOP_BITS (1U<<2)
202
203// Debug Port Register Addresses
204#define DP_IDCODE 0x00U // IDCODE Register (SW Read only)
205#define DP_ABORT 0x00U // Abort Register (SW Write only)
206#define DP_CTRL_STAT 0x04U // Control & Status
207#define DP_WCR 0x04U // Wire Control Register (SW Only)
208#define DP_SELECT 0x08U // Select Register (JTAG R/W & SW W)
209#define DP_RESEND 0x08U // Resend (SW Read Only)
210#define DP_RDBUFF 0x0CU // Read Buffer (Read Only)
211
212// JTAG IR Codes
213#define JTAG_ABORT 0x08U
214#define JTAG_DPACC 0x0AU
215#define JTAG_APACC 0x0BU
216#define JTAG_IDCODE 0x0EU
217#define JTAG_BYPASS 0x0FU
218
219// JTAG Sequence Info
220#define JTAG_SEQUENCE_TCK 0x3FU // TCK count
221#define JTAG_SEQUENCE_TMS 0x40U // TMS value
222#define JTAG_SEQUENCE_TDO 0x80U // TDO capture
223
224// SWD Sequence Info
225#define SWD_SEQUENCE_CLK 0x3FU // SWCLK count
226#define SWD_SEQUENCE_DIN 0x80U // SWDIO capture
227
228
229#include <stddef.h>
230#include <stdint.h>
231#include "cmsis_compiler.h"
232
233// DAP Data structure
234typedef struct {
235 uint8_t debug_port; // Debug Port
236 uint8_t fast_clock; // Fast Clock Flag
237 uint8_t padding[2];
238 uint32_t clock_delay; // Clock Delay
239 uint32_t timestamp; // Last captured Timestamp
240 struct { // Transfer Configuration
241 uint8_t idle_cycles; // Idle cycles after transfer
242 uint8_t padding[3];
243 uint16_t retry_count; // Number of retries after WAIT response
244 uint16_t match_retry; // Number of retries if read value does not match
245 uint32_t match_mask; // Match Mask
246 } transfer;
247#if (DAP_SWD != 0)
248 struct { // SWD Configuration
249 uint8_t turnaround; // Turnaround period
250 uint8_t data_phase; // Always generate Data Phase
251 } swd_conf;
252#endif
253#if (DAP_JTAG != 0)
254 struct { // JTAG Device Chain
255 uint8_t count; // Number of devices
256 uint8_t index; // Device index (device at TDO has index 0)
257#if (DAP_JTAG_DEV_CNT != 0)
258 uint8_t ir_length[DAP_JTAG_DEV_CNT]; // IR Length in bits
259 uint16_t ir_before[DAP_JTAG_DEV_CNT]; // Bits before IR
260 uint16_t ir_after [DAP_JTAG_DEV_CNT]; // Bits after IR
261#endif
262 } jtag_dev;
263#endif
264} DAP_Data_t;
265
266extern DAP_Data_t DAP_Data; // DAP Data
267extern volatile uint8_t DAP_TransferAbort; // Transfer Abort Flag
268
269
270#ifdef __cplusplus
271extern "C"
272{
273#endif
274
275// Functions
276extern void SWJ_Sequence (uint32_t count, const uint8_t *data);
277extern void SWD_Sequence (uint32_t info, const uint8_t *swdo, uint8_t *swdi);
278extern void JTAG_Sequence (uint32_t info, const uint8_t *tdi, uint8_t *tdo);
279extern void JTAG_IR (uint32_t ir);
280extern uint32_t JTAG_ReadIDCode (void);
281extern void JTAG_WriteAbort (uint32_t data);
282extern uint8_t JTAG_Transfer (uint32_t request, uint32_t *data);
283extern uint8_t SWD_Transfer (uint32_t request, uint32_t *data);
284
285extern void Delayms (uint32_t delay);
286
287extern uint32_t SWO_Transport (const uint8_t *request, uint8_t *response);
288extern uint32_t SWO_Mode (const uint8_t *request, uint8_t *response);
289extern uint32_t SWO_Baudrate (const uint8_t *request, uint8_t *response);
290extern uint32_t SWO_Control (const uint8_t *request, uint8_t *response);
291extern uint32_t SWO_Status (uint8_t *response);
292extern uint32_t SWO_ExtendedStatus (const uint8_t *request, uint8_t *response);
293extern uint32_t SWO_Data (const uint8_t *request, uint8_t *response);
294
295extern void SWO_QueueTransfer (uint8_t *buf, uint32_t num);
296extern void SWO_AbortTransfer (void);
297extern void SWO_TransferComplete (void);
298
299extern uint32_t SWO_Mode_UART (uint32_t enable);
300extern uint32_t SWO_Baudrate_UART (uint32_t baudrate);
301extern uint32_t SWO_Control_UART (uint32_t active);
302extern void SWO_Capture_UART (uint8_t *buf, uint32_t num);
303extern uint32_t SWO_GetCount_UART (void);
304
305extern uint32_t SWO_Mode_Manchester (uint32_t enable);
306extern uint32_t SWO_Baudrate_Manchester (uint32_t baudrate);
307extern uint32_t SWO_Control_Manchester (uint32_t active);
308extern void SWO_Capture_Manchester (uint8_t *buf, uint32_t num);
309extern uint32_t SWO_GetCount_Manchester (void);
310
311extern uint32_t UART_Transport (const uint8_t *request, uint8_t *response);
312extern uint32_t UART_Configure (const uint8_t *request, uint8_t *response);
313extern uint32_t UART_Control (const uint8_t *request, uint8_t *response);
314extern uint32_t UART_Status (uint8_t *response);
315extern uint32_t UART_Transfer (const uint8_t *request, uint8_t *response);
316
317extern uint8_t USB_COM_PORT_Activate (uint32_t cmd);
318
319extern uint32_t DAP_ProcessVendorCommand (const uint8_t *request, uint8_t *response);
320extern uint32_t DAP_ProcessCommand (const uint8_t *request, uint8_t *response);
321extern uint32_t DAP_ExecuteCommand (const uint8_t *request, uint8_t *response);
322
323extern void DAP_Setup (void);
324
325// Configurable delay for clock generation
326#ifndef DELAY_SLOW_CYCLES
327#define DELAY_SLOW_CYCLES 3U // Number of cycles for one iteration
328#endif
329#if defined(__CC_ARM)
330__STATIC_FORCEINLINE void PIN_DELAY_SLOW (uint32_t delay) {
331 uint32_t count = delay;
332 while (--count);
333}
334#else
335__STATIC_FORCEINLINE void PIN_DELAY_SLOW (uint32_t delay) {
336 __ASM volatile (
337 ".syntax unified\n"
338 "0:\n\t"
339 "subs %0,%0,#1\n\t"
340 "bne 0b\n"
341 : "+l" (delay) : : "cc"
342 );
343}
344#endif
345
346// Fixed delay for fast clock generation
347#ifndef DELAY_FAST_CYCLES
348#define DELAY_FAST_CYCLES 0U // Number of cycles: 0..3
349#endif
350__STATIC_FORCEINLINE void PIN_DELAY_FAST (void) {
351#if (DELAY_FAST_CYCLES >= 1U)
352 __NOP();
353#endif
354#if (DELAY_FAST_CYCLES >= 2U)
355 __NOP();
356#endif
357#if (DELAY_FAST_CYCLES >= 3U)
358 __NOP();
359#endif
360}
361
362#ifdef __cplusplus
363}
364#endif
365
366
367#endif /* __DAP_H__ */
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