Context Navigation

LM74800-Q1_TRANS.LIB

Last change on this file was 1, checked in by f.jahn, 3 years ago

File size: 15.9 KB

Rev	Line
[1]	1	*$
	2	* LM74800-Q1
	3	*****************************************************************************
	4	* (C) Copyright 2020 Texas Instruments Incorporated. All rights reserved.
	5	*****************************************************************************
	6	** This model is designed as an aid for customers of Texas Instruments.
	7	** TI and its licensors and suppliers make no warranties, either expressed
	8	** or implied, with respect to this model, including the warranties of
	9	** merchantability or fitness for a particular purpose. The model is
	10	** provided solely on an "as is" basis. The entire risk as to its quality
	11	** and performance is with the customer
	12	*****************************************************************************
	13	*
	14	* This model is subject to change without notice. Texas Instruments
	15	* Incorporated is not responsible for updating this model.
	16	*
	17	*****************************************************************************
	18	*
	19	** Released by: Texas Instruments Inc.
	20	* Part: LM74800-Q1
	21	* Date: 28APR2020
	22	* Model Type: TRANSIENT
	23	* Simulator: PSPICE
	24	* Simulator Version: 17.2-2016 S064
	25	* EVM Order Number: LM74700EVM, LM74800EVM-CS
	26	* EVM Users Guide: PSIL106, PSIL107
	27	* Datasheet: SNOSD95 –FEBRUARY 2020
	28	*
	29	* Model Version:1.00
	30	* * TI Confidential – NDA Restrictions per NDA with ECS
	31	*****************************************************************************
	32	*
	33	* Updates:
	34	*
	35	* Final 1.00
	36	* Release to Web.
	37	*
	38	*****************************************************************************
	39	*
	40	* Model Usage Notes:
	41	* 1. The following features have been modeled
	42	* a. Switched output(in Common Drain) and Load Dump Protection(in commom source)
	43	* b. Charge pump behaviour as function of ANODE and DGATE
	44	* c. VS POR, EN_UVLO thresholds, Charge pump shutdown, charge pump POR, Anode POR
	45	* d. Reverse input protection
	46	* e. Over voltage potection
	47	* 2. Temperature effects are not modeled.
	48	*
	49	*****************************************************************************
	50	.SUBCKT LM74800-Q1_TRANS A C CAP DGATE EN_UVLO GND HGATE OUT OV PAD SW VS VSNS
	51	V_U4_V14 U4_N166036923 0 150m
	52	X_U4_U868 N13182 U4_N71968 U4_N71906 COMP_BASIC_GEN PARAMS: VDD=1 VSS=0
	53	+ VTHRESH=0.5
	54	X_U4_U864 U4_N16600867 U4_N16623166 ASYMMETRIC_DELAY PARAMS:
	55	+ RISING_EDGE_DELAY=0.6u VTHRESH=0.5 FALLING_EDGE_DELAY=100n VDD=1 VSS=0
	56	X_U4_U869 N10103 N51846 U4_N16602359 NOR2_BASIC_GEN PARAMS: VDD=1 VSS=0
	57	+ VTHRESH=500E-3
	58	X_U4_U852 U4_N71906 EN_DGATEDRV U4_N16605337 AND2_BASIC_GEN PARAMS:
	59	+ VDD=1 VSS=0 VTHRESH=500E-3
	60	X_U4_U853 U4_N16602359 EN_DGATEDRV N13056 AND2_BASIC_GEN PARAMS: VDD=1
	61	+ VSS=0 VTHRESH=500E-3
	62	E_U4_ABM2 N13182 0 VALUE { V(ANODE_INT)
	63	+ -V(CATHOD_INT) }
	64	X_U4_U863 U4_REVERSE U4_N16600773 U4_N16600867 AND2_BASIC_GEN PARAMS:
	65	+ VDD=1 VSS=0 VTHRESH=500E-3
	66	V_U4_V13 U4_N16600773 0 1
	67	X_U4_U871 U4_N16605337 N51846 BUF_DELAY_BASIC_GEN PARAMS: VDD=1 VSS=0
	68	+ VTHRESH=0.5 DELAY=100n
	69	V_U4_V10 U4_N71968 0 150m
	70	X_U4_U870 U4_N72162 N13182 U4_N166036923 U4_REVERSE COMPHYS_BASIC_GEN
	71	+ PARAMS: VDD=1 VSS=0 VTHRESH=0.5
	72	V_U4_V12 U4_N72162 0 -4.5m
	73	X_U4_U873 EN_DGATEDRV U4_N16623102 INV_BASIC_GEN PARAMS: VDD=1 VSS=0
	74	+ VTHRESH=500E-3
	75	X_U4_U874 U4_N16623166 U4_N16623102 N10103 OR2_BASIC_GEN PARAMS: VDD=1
	76	+ VSS=0 VTHRESH=500E-3
	77	V_U6_V1 U6_N42514 0 1.233
	78	E_U6_E6 U6_OV_INT 0 OV GND 1
	79	V_U6_V2 U6_N42500 0 110m
	80	X_U6_U842 U6_OV_INT U6_N42514 U6_N42500 OVP COMPHYS_BASIC_GEN PARAMS:
	81	+ VDD=1 VSS=0 VTHRESH=0.5
	82	X_U6_S1 EN_OK 0 VSNS SW OVP_VSNS_U6_S1
	83	V_U5_V4 U5_N16549192 0 -1m
	84	E_U5_E1 U5_OUT_INT 0 OUT GND 1
	85	X_U5_U5 HGATE CAP d_lm74700
	86	X_U5_U2 EN_DRV U5_OVP_B U5_N16551783 AND2_BASIC_GEN PARAMS: VDD=1 VSS=0
	87	+ VTHRESH=500E-3
	88	X_U5_S9 U5_N16562144 0 OUT 0 HGATE_DRIVER_U5_S9
	89	X_U5_U11 OVP U5_N16543509 INV_DELAY_BASIC_GEN PARAMS: VDD=1 VSS=0
	90	+ VTHRESH=0.5 DELAY=1u
	91	G_U5_G1 CAP HGATE U5_HGATE_EN 0 53u
	92	X_U5_U843 OUT U5_N16549192 U5_N16549172 U5_N16577297 COMPHYS_BASIC_GEN
	93	+ PARAMS: VDD=1 VSS=0 VTHRESH=0.5
	94	X_U5_U6 OUT HGATE d_lm74700
	95	X_U5_U10 U5_HGATE_EN U5_N16552507 INV_BASIC_GEN PARAMS: VDD=1 VSS=0
	96	+ VTHRESH=500E-3
	97	X_U5_U3 U5_N16551783 U5_OUT_SHORT U5_HGATE_EN AND2_BASIC_GEN PARAMS:
	98	+ VDD=1 VSS=0 VTHRESH=500E-3
	99	V_U5_V3 U5_N16549172 0 0.1m
	100	X_U5_U8 U5_N16543509 U5_OVP_B asymmetric_delay PARAMS:
	101	+ RISING_EDGE_DELAY=5u VTHRESH=0.5 FALLING_EDGE_DELAY=2u VDD=1 VSS=0
	102	X_U5_U12 U5_OUT_SHORT U5_N16562144 INV_BASIC_GEN PARAMS: VDD=1 VSS=0
	103	+ VTHRESH=500E-3
	104	R_U5_R5 U5_N16566538 U5_OUT_SHORT 1
	105	C_U5_C5 0 U5_OUT_SHORT 1n
	106	X_U5_U844 HGATE U5_N16571579 d_lm74700
	107	G_U5_G2 HGATE OUT U5_N16552507 0 260m
	108	X_U5_U845 U5_N16577297 U5_N16566538 BUF_DELAY_BASIC_GEN PARAMS: VDD=1
	109	+ VSS=0 VTHRESH=0.5 DELAY=500n
	110	V_U5_V5 U5_N16571579 U5_N16573039 11
	111	R_U5_R2 U5_N16573039 U5_OUT_INT 1
	112	C_U5_C1 0 U5_N16573039 1n
	113	V_U1_V20 U1_N38512 0 2.38
	114	V_U1_V2 U1_N38424 0 109m
	115	E_U1_E8 CATHOD_INT 0 C GND 1
	116	X_U1_U842 U1_EN_INT U1_V2V U1_N38424 EN_OK COMPHYS_BASIC_GEN PARAMS:
	117	+ VDD=1 VSS=0 VTHRESH=0.5
	118	X_U1_U851 EN_SYS EN_SYSB INV_BASIC_GEN PARAMS: VDD=1 VSS=0
	119	+ VTHRESH=500E-3
	120	E_U1_E7 U1_VCAP_INT 0 CAP GND 1
	121	V_U1_V5 U1_N16793140 0 0.736
	122	X_U1_U859 U1_ANODE_REV U1_ANODE_POS INV_BASIC_GEN PARAMS: VDD=1 VSS=0
	123	+ VTHRESH=500E-3
	124	V_U1_V7 U1_N379060 0 1.2
	125	G_U1_ABM3I1 VS GND VALUE { IF(V(U1_CP_OK)>0.5,
	126	+ if(V(U1_ANODE_REV)>0.5,110u,V(U1_IQCP)),3u) }
	127	V_U1_V6 U1_N16793130 0 66m
	128	X_U1_U830 U1_EN_DGATE_DLY U1_POR U1_CP_POR U1_N38418 AND3_BASIC_GEN
	129	+ PARAMS: VDD=1 VSS=0 VTHRESH=500E-3
	130	E_U1_E5 U1_VS_INT 0 VS GND 1
	131	V_U1_V4 U1_N37784 0 2.72
	132	X_U1_U846 U1_EN_INT U1_N16793140 U1_N16793130 U1_CP_OK
	133	+ COMPHYS_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=0.5
	134	X_U1_U856 U1_N50226 ANODE_INT U1_ANODE_REV COMP_BASIC_GEN PARAMS: VDD=1
	135	+ VSS=0 VTHRESH=0.5
	136	X_U1_U835 VCP U1_N38620 U1_N379060 U1_CP_POR COMPHYS_BASIC_GEN PARAMS:
	137	+ VDD=1 VSS=0 VTHRESH=0.5
	138	X_U1_U854 ANODE_INT U1_N38512 U1_N38492 U1_VA_POR COMPHYS_BASIC_GEN
	139	+ PARAMS: VDD=1 VSS=0 VTHRESH=0.5
	140	X_U1_U843 U1_VS_INT U1_N37784 U1_N37764 U1_POR COMPHYS_BASIC_GEN
	141	+ PARAMS: VDD=1 VSS=0 VTHRESH=0.5
	142	E_U1_E6 U1_EN_INT 0 EN_UVLO GND 1
	143	V_U1_V3 U1_N37764 0 640m
	144	V_U1_V15 U1_N38492 0 380m
	145	V_U1_V1 U1_V2V 0 1.237
	146	X_U1_U858 U1_N38418 U1_VA_POR EN_DGATEDRV AND2_BASIC_GEN PARAMS: VDD=1
	147	+ VSS=0 VTHRESH=500E-3
	148	V_U1_V9 U1_N38620 0 6.7
	149	G_U1_G1 C 0 U1_ANODE_REV 0 15u
	150	E_U1_E9 ANODE_INT 0 A GND 1
	151	R_U1_R1 U1_CP_OK U1_N16836740 1
	152	X_U1_U861 U1_N16836740 U1_N16836190 asymmetric_delay PARAMS:
	153	+ RISING_EDGE_DELAY=185u VTHRESH=0.5 FALLING_EDGE_DELAY=5.8u VDD=1 VSS=0
	154	V_U1_V21 U1_N50226 0 -1m
	155	R_U1_R4 U1_N16836190 U1_EN_DGATE_DLY 1
	156	C_U1_C4 0 U1_EN_DGATE_DLY 1n
	157	X_U1_U864 U1_CP_OK U1_POR EN_SYS AND2_BASIC_GEN PARAMS: VDD=1 VSS=0
	158	+ VTHRESH=500E-3
	159	C_U1_C1 0 U1_N16836740 1n
	160	C_U1_C6 0 U1_N16855278 1n
	161	G_U1_G2 VS 0 U1_N16848208 0 2.5m
	162	C_U1_C7 0 U1_N16855391 1n
	163	C_U1_C8 GND VS 1p IC=0
	164	V_U1_V22 U1_N16851556 0 5
	165	E_U1_ABM2 U1_N16854741 0 VALUE { if(V(U1_VS_INT)>2.72,428u,110u) }
	166	X_U1_U866 CP_SAMPLE_HOLD U1_N16848195 INV_BASIC_GEN PARAMS: VDD=1 VSS=0
	167	+ VTHRESH=500E-3
	168	R_U1_R8 U1_N16854741 U1_IQCP 1
	169	X_U1_U869 U1_VS_INT U1_N16851724 U1_N16851727 U1_VS_POR_CS
	170	+ COMPHYS_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=0.5
	171	X_U1_U868 VCP U1_N16851556 CP_SAMPLE_HOLD COMP_BASIC_GEN PARAMS: VDD=1
	172	+ VSS=0 VTHRESH=0.5
	173	X_U1_U870 U1_N16855278 U1_N16855287 asymmetric_delay PARAMS:
	174	+ RISING_EDGE_DELAY=100n VTHRESH=0.5 FALLING_EDGE_DELAY=5.6u VDD=1 VSS=0
	175	X_U1_U865 U1_N16855391 U1_CP_POR U1_POR EN_DRV AND3_BASIC_GEN PARAMS:
	176	+ VDD=1 VSS=0 VTHRESH=500E-3
	177	V_U1_V23 U1_N16851724 0 2.72
	178	X_U1_U867 U1_N16848195 U1_VS_POR_CS U1_N16848208 AND2_BASIC_GEN PARAMS:
	179	+ VDD=1 VSS=0 VTHRESH=500E-3
	180	R_U1_R9 EN_OK U1_N16855278 1
	181	C_U1_C5 0 U1_IQCP 1n
	182	R_U1_R10 U1_N16855287 U1_N16855391 1
	183	V_U1_V24 U1_N16851727 0 200m
	184	V_U2_V8 U2_N16606029 0 1
	185	X_U2_U851 U2_VS_CP_ON U2_VS_CP_OFF INV_BASIC_GEN PARAMS: VDD=1 VSS=0
	186	+ VTHRESH=500E-3
	187	X_U2_U848 EN_SYS U2_DISCHG U2_EN_DISCHG AND2_BASIC_GEN PARAMS: VDD=1
	188	+ VSS=0 VTHRESH=500E-3
	189	X_U2_U847 U2_DISCHG U2_CHG INV_BASIC_GEN PARAMS: VDD=1 VSS=0
	190	+ VTHRESH=500E-3
	191	E_U2_ABM1 VCP 0 VALUE { V(CAP)
	192	+ -V(VS) }
	193	V_U2_V15 U2_N16606813 0 13.257
	194	G_U2_G1 CAP GND U2_EN_DISCHG 0 33u
	195	X_U2_U846 EN_SYS U2_CHG U2_N16606091 AND2_BASIC_GEN PARAMS: VDD=1 VSS=0
	196	+ VTHRESH=500E-3
	197	V_U2_V9 U2_N16606767 0 1
	198	X_U2_U850 U2_N16606029 U2_N16606091 U2_EN_CHG AND2_BASIC_GEN PARAMS:
	199	+ VDD=1 VSS=0 VTHRESH=500E-3
	200	X_U2_U852 0 EN_SYSB U2_N16606391 OR2_BASIC_GEN PARAMS: VDD=1 VSS=0
	201	+ VTHRESH=500E-3
	202	V_U2_V7 U2_N16607087 0 4
	203	E_U2_ABM4 U2_ICP_HIGH 0 VALUE {
	204	+ LIMIT((-5uV(ANODE_INT)-98.77uV(DGATE)+1570u),V(U2_ICP_MIN),1350u) }
	205	G_U2_ABMII5 VS CAP VALUE { if(
	206	+ V(U2_EN_CHG)<0.5,0u,if(V(ANODE_INT)>5.9,V(U2_ICP_HIGH),120u)) }
	207	V_U2_V16 U2_N16606887 0 1.041
	208	X_U2_U849 VS U2_N16607087 U2_VS_CP_ON COMP_BASIC_GEN PARAMS: VDD=1
	209	+ VSS=0 VTHRESH=0.5
	210	X_U2_U836 VCP U2_N16606813 U2_N16606887 U2_DISCHG COMPHYS_BASIC_GEN
	211	+ PARAMS: VDD=1 VSS=0 VTHRESH=0.5
	212	E_U2_TABLE1 U2_ICP_MIN 0 TABLE {V(ANODE_INT)} 3V 57uV
	213	+ 6V 548uV
	214	+ 12V 525uV
	215	+ 24V 466uV
	216	+ 65V 262uV
	217	X_U2_S8 U2_N16606391 0 CAP GND Charge_pump_U2_S8
	218	X_U3_U5 U3_N16859196 CAP d_lm74700
	219	V_U3_V19 U3_N16846596 0 8.9m
	220	X_U3_U6 A DGATE d_lm74700
	221	G_U3_ABM2I8 DGATE A VALUE { IF(V(N13056)<0.5, 0,
	222	+ LIMIT((V(U3_N16846596)-V(N13182))*1.432m, -10u,20m)) }
	223	G_U3_ABMII6 DGATE A VALUE { IF(V(N10103)>0.5, 1500m,0) }
	224	X_U3_U844 U3_N16859196 U3_N16863874 d_lm74700
	225	G_U3_ABMII5 CAP U3_N16859196 VALUE { IF(V(N51846)>0.5, 20m,0) }
	226	R_U3_R1 DGATE U3_N16859196 100n
	227	R_U3_R2 U3_N16865832 ANODE_INT 1
	228	C_U3_C1 0 U3_N16865832 1n
	229	V_U3_V20 U3_N16863874 U3_N16865832 11Vdc
	230	.ENDS LM74800-Q1_TRANS
	231	*$
	232	.subckt OVP_VSNS_U6_S1 1 2 3 4
	233	S_U6_S1 3 4 1 2 _U6_S1
	234	RS_U6_S1 1 2 1G
	235	.MODEL _U6_S1 VSWITCH Roff=1e6 Ron=24 Voff=0.2V Von=0.8V
	236	.ends OVP_VSNS_U6_S1
	237	*$
	238	.subckt HGATE_DRIVER_U5_S9 1 2 3 4
	239	S_U5_S9 3 4 1 2 _U5_S9
	240	RS_U5_S9 1 2 1G
	241	.MODEL _U5_S9 VSWITCH Roff=1e9 Ron=350k Voff=0.2 Von=0.8
	242	.ends HGATE_DRIVER_U5_S9
	243	*$
	244	.subckt Charge_pump_U2_S8 1 2 3 4
	245	S_U2_S8 3 4 1 2 _U2_S8
	246	RS_U2_S8 1 2 1G
	247	.MODEL _U2_S8 VSWITCH Roff=1e12 Ron=1e9 Voff=0.2 Von=0.8
	248	.ends Charge_pump_U2_S8
	249	*$
	250	.subckt asymmetric_delay inp out params: rising_edge_delay=1 vthresh=0.5
	251	+ falling_edge_delay=1 vdd=1 vss=0
	252	e_abm3 inp1 0 value { if(v(inp) > {vthresh}, {vdd} , {vss}) }
	253	e_abm1 yin4 0 value { if(v(yin3) > {vthresh}, {vdd} , {vss}) }
	254	e_abm2 yin2 0 value { if(v(yin1) > {vthresh}, {vdd} , {vss}) }
	255	r_rint inp1 yin1 1
	256	c_cint yin1 0 {1.443*rising_edge_delay}
	257	d_d10 yin1 inp1 d_d1
	258	r_r1 yin4 out 1
	259	r_rout yin2 yin3 1
	260	c_cout yin3 0 {1.443*falling_edge_delay}
	261	c_c1 0 out 1n
	262	d_d11 yin2 yin3 d_d1
	263	*$
	264	.model d_d1 d
	265	+ is=1e-015
	266	+ tt=1e-011
	267	+ rs=0.005
	268	+ n=0.1
	269	*$
	270	.ends asymmetric_delay
	271	*$
	272	.SUBCKT CESR IN OUT
	273	+ PARAMS: C=100u ESR=0.01 X=1 IC=0
	274	C IN 1 {C*X} IC={IC}
	275	RESR 1 OUT {ESR/X}
	276	.ENDS CESR
	277	*$
	278	.SUBCKT COMP_BASIC_GEN INP INM Y PARAMS: VDD=1 VSS=0 VTHRESH=0.5
	279	E_ABM Yint 0 VALUE {IF (V(INP) >
	280	+ V(INM), {VDD},{VSS})}
	281	R1 Yint Y 1
	282	C1 Y 0 1n
	283	.ENDS COMP_BASIC_GEN
	284	*$
	285	.SUBCKT NOR2_BASIC_GEN A B Y PARAMS: VDD=1 VSS=0 VTHRESH=0.5
	286	E_ABMGATE YINT 0 VALUE {{IF(V(A) > {VTHRESH} \|
	287	+ V(B) > {VTHRESH},{VSS},{VDD})}}
	288	RINT YINT Y 1
	289	CINT Y 0 1n
	290	.ENDS NOR2_BASIC_GEN
	291	*$
	292	.SUBCKT AND2_BASIC_GEN A B Y PARAMS: VDD=1 VSS=0 VTHRESH=0.5
	293	E_ABMGATE YINT 0 VALUE {{IF(V(A) > {VTHRESH} &
	294	+ V(B) > {VTHRESH},{VDD},{VSS})}}
	295	RINT YINT Y 1
	296	CINT Y 0 1n
	297	.ENDS AND2_BASIC_GEN
	298	*$
	299	.SUBCKT BUF_DELAY_BASIC_GEN A Y PARAMS: VDD=1 VSS=0 VTHRESH=0.5 DELAY = 10n
	300	E_ABMGATE1 YINT1 0 VALUE {{IF(V(A) > {VTHRESH} ,
	301	+ {VDD},{VSS})}}
	302	RINT YINT1 YINT2 1
	303	CINT YINT2 0 {DELAY*1.3}
	304	E_ABMGATE2 YINT3 0 VALUE {{IF(V(YINT2) > {VTHRESH} ,
	305	+ {VDD},{VSS})}}
	306	RINT2 YINT3 Y 1
	307	CINT2 Y 0 1n
	308	.ENDS BUF_DELAY_BASIC_GEN
	309	*$
	310	.SUBCKT COMPHYS_BASIC_GEN INP INM HYS OUT PARAMS: VDD=1 VSS=0 VTHRESH=0.5
	311	EIN INP1 INM1 INP INM 1
	312	EHYS INP1 INP2 VALUE { IF( V(1) > {VTHRESH},-V(HYS),0) }
	313	EOUT OUT 0 VALUE { IF( V(INP2)>V(INM1), {VDD} ,{VSS}) }
	314	R1 OUT 1 1
	315	C1 1 0 5n
	316	RINP1 INP1 0 1K
	317	.ENDS COMPHYS_BASIC_GEN
	318	*$
	319	.SUBCKT INV_DELAY_BASIC_GEN A Y PARAMS: VDD=1 VSS=0 VTHRESH=0.5 DELAY = 10n
	320	E_ABMGATE1 YINT1 0 VALUE {{IF(V(A) > {VTHRESH} ,
	321	+ {VDD},{VSS})}}
	322	RINT YINT1 YINT2 1
	323	CINT YINT2 0 {DELAY*1.3}
	324	E_ABMGATE2 YINT3 0 VALUE {{IF(V(YINT2) > {VTHRESH} ,
	325	+ {VSS},{VDD})}}
	326	RINT2 YINT3 Y 1
	327	CINT2 Y 0 1n
	328	.ENDS INV_DELAY_BASIC_GEN
	329	*$
	330	.SUBCKT INV_BASIC_GEN A Y PARAMS: VDD=1 VSS=0 VTHRESH=0.5
	331	E_ABMGATE YINT 0 VALUE {{IF(V(A) > {VTHRESH} ,
	332	+ {VSS},{VDD})}}
	333	RINT YINT Y 1
	334	CINT Y 0 1n
	335	.ENDS INV_BASIC_GEN
	336	*$
	337	.SUBCKT AND3_BASIC_GEN A B C Y PARAMS: VDD=1 VSS=0 VTHRESH=0.5
	338	E_ABMGATE YINT 0 VALUE {{IF(V(A) > {VTHRESH} &
	339	+ V(B) > {VTHRESH} &
	340	+ V(C) > {VTHRESH},{VDD},{VSS})}}
	341	RINT YINT Y 1
	342	CINT Y 0 1n
	343	.ENDS AND3_BASIC_GEN
	344	*$
	345	.SUBCKT OR2_BASIC_GEN A B Y PARAMS: VDD=1 VSS=0 VTHRESH=0.5
	346	E_ABMGATE YINT 0 VALUE {{IF(V(A) > {VTHRESH} \|
	347	+ V(B) > {VTHRESH},{VDD},{VSS})}}
	348	RINT YINT Y 1
	349	CINT Y 0 1n
	350	.ENDS OR2_BASIC_GEN
	351	*$
	352	.subckt D_LM74700 1 2
	353	d1 1 2 dd
	354	.model dd d
	355	+ is=1e-012
	356	+ n=0.0001
	357	+ tt=1e-011
	358	+ bv=100
	359	.ends D_LM74700
	360	*$
	361	.SUBCKT BUK7Y4R8_60E D G S
	362	C_Cgs S G 3832p TC=0,0
	363	C_Cds S D 191p TC=0,0
	364	M_M1 D G S S Q1
	365	C_Cgd G D 308p TC=0,0
	366	D_D1 S D BD_Q1
	367	.ENDS BUK7Y4R8_60E
	368	*$
	369	.model BD_Q1 d
	370	+ is=1e-015
	371	+ tt=1e-011
	372	+ rs=0.05
	373	+ n=1
	374	*$
	375	.model Q1 nmos
	376	+ vto=3
	377	+ kp=50
	378	*$
	379	.SUBCKT 1SMB5944BT3G 1 2
	380	D1 1 2 DF
	381	DZ 3 1 DR
	382	VZ 2 3 62
	383	.MODEL DF D ( IS=3.68p RS=28.1 N=1.10
	384	+ CJO=11.6p VJ=1.00 M=0.330 TT=50.1n )
	385	.MODEL DR D ( IS=7.36e-016 RS=115 N=3.00 )
	386	.ENDS
	387	*$
	388	.SUBCKT DI_BZT52C51 1 2
	389	D1 1 2 DF
	390	DZ 3 1 DR
	391	VZ 2 3 48.3
	392	.MODEL DF D ( IS=3.31p RS=1.45 N=1.10
	393	+ CJO=24.1p VJ=1.00 M=0.330 TT=50.1n )
	394	.MODEL DR D ( IS=6.62e-016 RS=84.5 N=3.00 )
	395	.ENDS
	396	*$
	397	.SUBCKT IPB320N20N3_L0 drain gate source
	398	Lg gate g1 4n
	399	Ld drain d1 1n
	400	Ls source s1 2n
	401	Rs s1 s2 1.05m
	402	Rg g1 g2 2.4
	403	M1 d2 g2 s2 s2 DMOS L=1u W=1u
	404	.MODEL DMOS NMOS ( KP= 109.7 VTO=3.9 THETA=0 VMAX=1.5e5 ETA=0.004 LEVEL=3)
	405	Rd d1a d2 17m TC=17m
	406	.MODEL MVDR NMOS (KP=126.56 VTO=-1 LAMBDA=0.25)
	407	Mr d1 d2a d1a d1a MVDR W=1u L=1u
	408	Rx d2a d1a 1m
	409	Dbd s2 d2 Dbt
	410	.MODEL Dbt D(BV=217 M=0.45 CJO=0.89n VJ=0.9V)
	411	Rsp s2 s3 0.7
	412	Dbd1 s3 d2 Dbt1
	413	.MODEL Dbt1 D(BV=1000 M=0.45 CJO=1.77n VJ=0.9V)
	414	Dbody s2 21 DBODY
	415	.MODEL DBODY D(IS=16.8p N=1.12 RS=0.06u EG=1.12 TT=120n)
	416	Rdiode d1 21 3.39m TC=3m
	417	.MODEL sw NMOS(VTO=0 KP=10 LEVEL=1)
	418	Maux g2 c a a sw
	419	Maux2 b d g2 g2 sw
	420	Eaux c a d2 g2 1
	421	Eaux2 d g2 d2 g2 -1
	422	Cox b d2 0.27n
	423	.MODEL DGD D(M=0.8 CJO=0.27n VJ=0.5)
	424	Rpar b d2 1Meg
	425	Dgd a d2 DGD
	426	Rpar2 d2 a 10Meg
	427	Cgs g2 s2 1.77n
	428	.ENDS IPB320N20N3_L0
	429	*$
	430	.MODEL 1N4148WS D ( IS=10.4n RS=51.5m BV=75.0 IBV=1.00u
	431	+ CJO=2.00p M=0.333 N=2.07 TT=5.76n )
	432	*$
	433	.model SMBJ33A D(IS=.1u RS=0.3 CJO=80000p M=1.3 VJ=0.4 ISR=.008u N=1.05
	434	+ IKF=1m BV=34.3 NBV=20 IBV=10u TT=4n EG=.84 TRS1=.1m)
	435	*$

Note: See TracBrowser for help on using the repository browser.

Download in other formats:

Original Format