Changeset 10 for ecs_cellMon/firmware
- Timestamp:
- Jun 12, 2023, 12:09:16 PM (19 months ago)
- Location:
- ecs_cellMon/firmware
- Files:
-
- 16 edited
Legend:
- Unmodified
- Added
- Removed
-
ecs_cellMon/firmware/Core/Src/main.c
r9 r10 77 77 void resetMinMaxValues(void); 78 78 void mb_save_lock_key(void); 79 static void MX_IWDG_Init(void); 79 80 /* USER CODE END PFP */ 80 81 … … 171 172 172 173 174 MX_IWDG_Init(); 173 175 /* USER CODE END 2 */ 174 176 … … 367 369 368 370 /* USER CODE BEGIN 4 */ 371 372 /** 373 * @brief IWDG Initialization Function 374 * @param None 375 * @retval None 376 */ 377 static void MX_IWDG_Init(void) 378 { 379 380 /* USER CODE BEGIN IWDG_Init 0 */ 381 382 /* USER CODE END IWDG_Init 0 */ 383 384 /* USER CODE BEGIN IWDG_Init 1 */ 385 386 /* USER CODE END IWDG_Init 1 */ 387 hiwdg.Instance = IWDG; 388 hiwdg.Init.Prescaler = IWDG_PRESCALER_4; 389 hiwdg.Init.Window = 4095; 390 hiwdg.Init.Reload = 4095; 391 if (HAL_IWDG_Init(&hiwdg) != HAL_OK) 392 { 393 Error_Handler(); 394 } 395 /* USER CODE BEGIN IWDG_Init 2 */ 396 397 /* USER CODE END IWDG_Init 2 */ 398 399 } 400 401 369 402 void mb_save_lock_key() 370 403 { -
ecs_cellMon/firmware/Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_iwdg.h
r9 r10 7 7 * @attention 8 8 * 9 * Copyright (c) 2018 STMicroelectronics.10 * All rights reserved. 9 * <h2><center>© Copyright (c) 2018 STMicroelectronics. 10 * All rights reserved.</center></h2> 11 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 12 * This software component is licensed by ST under BSD 3-Clause license, 13 * the "License"; You may not use this file except in compliance with the 14 * License. You may obtain a copy of the License at: 15 * opensource.org/licenses/BSD-3-Clause 15 16 * 16 17 ****************************************************************************** … … 87 88 #define IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 128 */ 88 89 #define IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< IWDG prescaler set to 256 */ 90 89 91 /** 90 92 * @} … … 98 100 * @} 99 101 */ 102 100 103 101 104 /** … … 136 139 */ 137 140 /* Initialization/Start functions ********************************************/ 138 HAL_StatusTypeDef 141 HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg); 139 142 /** 140 143 * @} … … 145 148 */ 146 149 /* I/O operation functions ****************************************************/ 147 HAL_StatusTypeDef 150 HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg); 148 151 /** 149 152 * @} … … 236 239 237 240 #endif /* STM32G0xx_HAL_IWDG_H */ 241 242 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
ecs_cellMon/firmware/Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_iwdg.c
r9 r10 9 9 * + IO operation functions 10 10 * 11 ******************************************************************************12 * @attention13 *14 * Copyright (c) 2018 STMicroelectronics.15 * All rights reserved.16 *17 * This software is licensed under terms that can be found in the LICENSE file18 * in the root directory of this software component.19 * If no LICENSE file comes with this software, it is provided AS-IS.20 *21 ******************************************************************************22 11 @verbatim 23 12 ============================================================================== … … 77 66 value will be loaded in the IWDG counter each time the watchdog is 78 67 reloaded, then the IWDG will start counting down from this value. 68 (++) Wait for status flags to be reset. 79 69 (++) Depending on window parameter: 80 70 (+++) If Window Init parameter is same as Window register value, … … 83 73 (+++) Else modify Window register. This will automatically reload 84 74 watchdog counter. 85 (++) Wait for status flags to be reset.86 75 87 76 (#) Then the application program must refresh the IWDG counter at regular … … 98 87 99 88 @endverbatim 89 ****************************************************************************** 90 * @attention 91 * 92 * <h2><center>© Copyright (c) 2018 STMicroelectronics. 93 * All rights reserved.</center></h2> 94 * 95 * This software component is licensed by ST under BSD 3-Clause license, 96 * the "License"; You may not use this file except in compliance with the 97 * License. You may obtain a copy of the License at: 98 * opensource.org/licenses/BSD-3-Clause 99 * 100 ****************************************************************************** 100 101 */ 101 102 … … 121 122 prescaler to be updated. The number of LSI clock periods is upper-rounded to 122 123 6 for the timeout value calculation. 123 The timeout value is calculated using the highest prescaler (256) and124 The timeout value is also calculated using the highest prescaler (256) and 124 125 the LSI_VALUE constant. The value of this constant can be changed by the user 125 126 to take into account possible LSI clock period variations. 126 The timeout value is multiplied by 1000 to be converted in milliseconds. 127 LSI startup time is also considered here by adding LSI_STARTUP_TIME 128 converted in milliseconds. */ 129 #define HAL_IWDG_DEFAULT_TIMEOUT (((6UL * 256UL * 1000UL) / LSI_VALUE) + ((LSI_STARTUP_TIME / 1000UL) + 1UL)) 130 #define IWDG_KERNEL_UPDATE_FLAGS (IWDG_SR_WVU | IWDG_SR_RVU | IWDG_SR_PVU) 127 The timeout value is multiplied by 1000 to be converted in milliseconds. */ 128 #define HAL_IWDG_DEFAULT_TIMEOUT ((6UL * 256UL * 1000UL) / LSI_VALUE) 131 129 /** 132 130 * @} … … 199 197 200 198 /* Wait for register to be updated */ 201 while ( (hiwdg->Instance->SR & IWDG_KERNEL_UPDATE_FLAGS)!= 0x00u)199 while (hiwdg->Instance->SR != 0x00u) 202 200 { 203 201 if ((HAL_GetTick() - tickstart) > HAL_IWDG_DEFAULT_TIMEOUT) 204 202 { 205 if ((hiwdg->Instance->SR & IWDG_KERNEL_UPDATE_FLAGS) != 0x00u) 206 { 207 return HAL_TIMEOUT; 208 } 203 return HAL_TIMEOUT; 209 204 } 210 205 } … … 229 224 } 230 225 231 232 226 /** 233 227 * @} … … 248 242 * @{ 249 243 */ 244 250 245 251 246 /** … … 264 259 } 265 260 266 267 261 /** 268 262 * @} … … 281 275 * @} 282 276 */ 277 278 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
ecs_cellMon/firmware/Output/Release/Exe/cellMon.hex
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ecs_cellMon/firmware/Output/Release/Exe/cellMon.ind
r3 r10 25 25 "Output/Release/Obj/cellMon/stm32g0xx_ll_dma.bc" 26 26 "Output/Release/Obj/cellMon/stm32g0xx_ll_rcc.bc" 27 "Output/Release/Obj/cellMon/stm32g0xx_hal_iwdg.bc" 27 28 "Output/Release/Obj/cellMon/adc.bc" 28 29 "Output/Release/Obj/cellMon/comp.bc" -
ecs_cellMon/firmware/Output/Release/Exe/cellMon.map
r3 r10 21 21 Object File RX Code RO Data RW Data ZI Data 22 22 --------------------------------------------- ---------- ---------- ---------- ---------- 23 cellMon_lto.o 26 7882 818 164 1 66023 cellMon_lto.o 26 920 2 818 164 1 660 24 24 SEGGER_THUMB_Startup.o 20 25 25 STM32G07x_Vectors.o 248 26 26 STM32G0xx_Startup.o 8 27 27 --------------------------------------------- ---------- ---------- ---------- ---------- 28 Subtotal (4 objects) 27 0642 818 164 1 66028 Subtotal (4 objects) 27 196 2 818 164 1 660 29 29 --------------------------------------------- ---------- ---------- ---------- ---------- 30 30 heapops_basic_v6m_t_le_eabi_balanced.a 20 4 … … 35 35 Subtotal (4 archives) 7 428 818 32 1 228 36 36 --------------------------------------------- ---------- ---------- ---------- ---------- 37 Linker created (shared data, fills, blocks): 76 5563 07237 Linker created (shared data, fills, blocks): 76 424 3 072 38 38 ============================================= ========== ========== ========== ========== 39 Total: 34 492 80 192196 5 96039 Total: 34 624 80 060 196 5 960 40 40 ============================================= ========== ========== ========== ========== 41 41 … … 69 69 --------------------------------------------- ---------- ---------- ---------- ---------- 70 70 Subtotal (15 members from 4 archives) 7 428 818 32 1 228 71 Objects (4 files) 27 0642 818 164 1 66072 Linker created (shared data, fills, blocks): 76 5563 07271 Objects (4 files) 27 196 2 818 164 1 660 72 Linker created (shared data, fills, blocks): 76 424 3 072 73 73 ============================================= ========== ========== ========== ========== 74 Total: 34 492 80 192196 5 96074 Total: 34 624 80 060 196 5 960 75 75 ============================================= ========== ========== ========== ========== 76 76 … … 79 79 Description RX Code RO Data RW Data ZI Data 80 80 --------------------------------------------- ---------- ---------- ---------- ---------- 81 Filling 76 44881 Filling 76 316 82 82 Initialization table 104 83 83 Integrity check 4 … … 85 85 Memory for block 'stack' 2 048 86 86 --------------------------------------------- ---------- ---------- ---------- ---------- 87 Subtotal (linker created): 76 5563 07287 Subtotal (linker created): 76 424 3 072 88 88 --------------------------------------------- ---------- ---------- ---------- ---------- 89 Objects (4 files) 27 0642 818 164 1 66089 Objects (4 files) 27 196 2 818 164 1 660 90 90 Archives (4 files) 7 428 818 32 1 228 91 91 ============================================= ========== ========== ========== ========== 92 Total: 34 492 80 192196 5 96092 Total: 34 624 80 060 196 5 960 93 93 ============================================= ========== ========== ========== ========== 94 94 … … 126 126 08004e6c-08004fa7 UART_RxISR_8BIT_FIFOEN 316 4 Code RX cellMon_lto.o 127 127 08004fa8-080050eb UART_RxISR_16BIT_FIFOEN 324 4 Code RX cellMon_lto.o 128 080050ec-08008 7c7 main 14 0444 Code RX cellMon_lto.o129 08008 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0800b394-0800b395 WWDG_IRQHandler 2 2 Code RX STM32G07x_Vectors.o 207 0800b396-0800b397 PVD_IRQHandler 2 2 Code RX STM32G07x_Vectors.o 208 0800b398-0800b399 RTC_STAMP_IRQHandler 2 2 Code RX STM32G07x_Vectors.o 209 0800b39a-0800b39b FLASH_IRQHandler 2 2 Code RX STM32G07x_Vectors.o 210 0800b39c-0800b39d RCC_IRQHandler 2 2 Code RX STM32G07x_Vectors.o 211 0800b39e-0800b39f EXTI0_1_IRQHandler 2 2 Code RX STM32G07x_Vectors.o 212 0800b3a0-0800b3a1 EXTI2_3_IRQHandler 2 2 Code RX STM32G07x_Vectors.o 213 0800b3a2-0800b3a3 EXTI4_15_IRQHandler 2 2 Code RX STM32G07x_Vectors.o 214 0800b3a4-0800b3a5 UCPD1_UCPD2_IRQHandler 2 2 Code RX STM32G07x_Vectors.o 215 0800b3a6-0800b3a7 DMA_Channel2_3_IRQHandler 2 2 Code RX STM32G07x_Vectors.o 216 0800b3a8-0800b3a9 DMA_Channel4_5_6_7_IRQHandler 217 217 2 2 Code RX STM32G07x_Vectors.o 218 0800b3 26-0800b327TIM1_BRK_UP_TRG_COMP_IRQHandler218 0800b3aa-0800b3ab TIM1_BRK_UP_TRG_COMP_IRQHandler 219 219 2 2 Code RX STM32G07x_Vectors.o 220 0800b3 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------------------------- ---------- ---------- ----- ---- -- ----------- 432 ADC_COMP_IRQHandler 0x08008 8C9472 4 Code Gb cellMon_lto.o432 ADC_COMP_IRQHandler 0x0800894D 472 4 Code Gb cellMon_lto.o 433 433 ADC_DMAConvCplt 0x08003215 116 4 Code Lc cellMon_lto.o 434 ADC_DMAError 0x0800B 6FB20 2 Code Lc cellMon_lto.o435 ADC_DMAHalfConvCplt 0x0800B3 492 2 Code Lc cellMon_lto.o436 AES_RNG_IRQHandler 0x0800B3 472 Code Wk STM32G07x_Vectors.o437 CEC_IRQHandler 0x0800B3 452 Code Wk STM32G07x_Vectors.o438 DMA_Channel1_IRQHandler 0x08008 7D9240 4 Code Gb cellMon_lto.o439 DMA_Channel2_3_IRQHandler 0x0800B3 232 Code Wk STM32G07x_Vectors.o434 ADC_DMAError 0x0800B77F 20 2 Code Lc cellMon_lto.o 435 ADC_DMAHalfConvCplt 0x0800B3CD 2 2 Code Lc cellMon_lto.o 436 AES_RNG_IRQHandler 0x0800B3CB 2 Code Wk STM32G07x_Vectors.o 437 CEC_IRQHandler 0x0800B3C9 2 Code Wk STM32G07x_Vectors.o 438 DMA_Channel1_IRQHandler 0x0800885D 240 4 Code Gb cellMon_lto.o 439 DMA_Channel2_3_IRQHandler 0x0800B3A7 2 Code Wk STM32G07x_Vectors.o 440 440 DMA_Channel4_5_6_7_IRQHandler 441 0x0800B3 252 Code Wk STM32G07x_Vectors.o442 EEPROM_fullRestore 0x08008 AA1468 4 Code Lc cellMon_lto.o443 EEPROM_readConfig 0x08008C 75684 4 Code Lc cellMon_lto.o444 EEPROM_storeConfig 0x08008F 21632 4 Code Lc cellMon_lto.o445 EEPROM_storeLogData 0x08009 199388 4 Code Lc cellMon_lto.o446 EXTI0_1_IRQHandler 0x0800B3 1B2 Code Wk STM32G07x_Vectors.o447 EXTI2_3_IRQHandler 0x0800B3 1D2 Code Wk STM32G07x_Vectors.o448 EXTI4_15_IRQHandler 0x0800B3 1F2 Code Wk STM32G07x_Vectors.o449 FLASH_IRQHandler 0x0800B3 172 Code Wk STM32G07x_Vectors.o441 0x0800B3A9 2 Code Wk STM32G07x_Vectors.o 442 EEPROM_fullRestore 0x08008B25 468 4 Code Lc cellMon_lto.o 443 EEPROM_readConfig 0x08008CF9 684 4 Code Lc cellMon_lto.o 444 EEPROM_storeConfig 0x08008FA5 632 4 Code Lc cellMon_lto.o 445 EEPROM_storeLogData 0x0800921D 388 4 Code Lc cellMon_lto.o 446 EXTI0_1_IRQHandler 0x0800B39F 2 Code Wk STM32G07x_Vectors.o 447 EXTI2_3_IRQHandler 0x0800B3A1 2 Code Wk STM32G07x_Vectors.o 448 EXTI4_15_IRQHandler 0x0800B3A3 2 Code Wk STM32G07x_Vectors.o 449 FLASH_IRQHandler 0x0800B39B 2 Code Wk STM32G07x_Vectors.o 450 450 HAL_ADC_ConfigChannel 0x08003289 1 108 4 Code Lc cellMon_lto.o 451 451 HAL_COMP_Init 0x080036DD 1 012 4 Code Lc cellMon_lto.o … … 456 456 HAL_TIM_IC_ConfigChannel 0x08004399 600 4 Code Lc cellMon_lto.o 457 457 HAL_TIM_IC_Start 0x08004181 536 4 Code Lc cellMon_lto.o 458 HardFault_Handler 0x0800B4 6F2 2 Code Gb cellMon_lto.o459 I2C1_IRQHandler 0x0800B3 3B2 Code Wk STM32G07x_Vectors.o460 I2C2_IRQHandler 0x0800B3 3D2 Code Wk STM32G07x_Vectors.o461 MODBUS_UART_IRQHandler 0x080096 15632 4 Code Lc cellMon_lto.o462 NMI_Handler 0x0800B4 6D2 2 Code Gb cellMon_lto.o463 PVD_IRQHandler 0x0800B3 132 Code Wk STM32G07x_Vectors.o464 PendSV_Handler 0x0800B4 732 2 Code Gb cellMon_lto.o465 RCC_IRQHandler 0x0800B3 192 Code Wk STM32G07x_Vectors.o466 RTC_STAMP_IRQHandler 0x0800B3 152 Code Wk STM32G07x_Vectors.o467 Reset_Handler 0x0800B 6F32 Code Gb STM32G0xx_Startup.o468 SEGGER_RTT_Write 0x0800B1 1552 4 Code Gb SEGGER_RTT.o (prinops_rtt_v6m_t_le_eabi_balanced.a)469 SEGGER_RTT_WriteNoLock 0x0800B 091132 4 Code Gb SEGGER_RTT.o (prinops_rtt_v6m_t_le_eabi_balanced.a)470 SPI1_IRQHandler 0x0800B3 3F2 Code Wk STM32G07x_Vectors.o471 SPI2_IRQHandler 0x0800B3 412 Code Wk STM32G07x_Vectors.o472 SVC_Handler 0x0800B4 712 2 Code Gb cellMon_lto.o473 SysTick_Handler 0x08008 7C916 4 Code Gb cellMon_lto.o458 HardFault_Handler 0x0800B4F3 2 2 Code Gb cellMon_lto.o 459 I2C1_IRQHandler 0x0800B3BF 2 Code Wk STM32G07x_Vectors.o 460 I2C2_IRQHandler 0x0800B3C1 2 Code Wk STM32G07x_Vectors.o 461 MODBUS_UART_IRQHandler 0x08009699 632 4 Code Lc cellMon_lto.o 462 NMI_Handler 0x0800B4F1 2 2 Code Gb cellMon_lto.o 463 PVD_IRQHandler 0x0800B397 2 Code Wk STM32G07x_Vectors.o 464 PendSV_Handler 0x0800B4F7 2 2 Code Gb cellMon_lto.o 465 RCC_IRQHandler 0x0800B39D 2 Code Wk STM32G07x_Vectors.o 466 RTC_STAMP_IRQHandler 0x0800B399 2 Code Wk STM32G07x_Vectors.o 467 Reset_Handler 0x0800B777 2 Code Gb STM32G0xx_Startup.o 468 SEGGER_RTT_Write 0x0800B199 52 4 Code Gb SEGGER_RTT.o (prinops_rtt_v6m_t_le_eabi_balanced.a) 469 SEGGER_RTT_WriteNoLock 0x0800B115 132 4 Code Gb SEGGER_RTT.o (prinops_rtt_v6m_t_le_eabi_balanced.a) 470 SPI1_IRQHandler 0x0800B3C3 2 Code Wk STM32G07x_Vectors.o 471 SPI2_IRQHandler 0x0800B3C5 2 Code Wk STM32G07x_Vectors.o 472 SVC_Handler 0x0800B4F5 2 2 Code Gb cellMon_lto.o 473 SysTick_Handler 0x0800884D 16 4 Code Gb cellMon_lto.o 474 474 SystemCoreClockUpdate 0x08003185 144 4 Code Gb cellMon_lto.o 475 475 SystemInit 0x08003175 16 4 Code Gb cellMon_lto.o 476 TIM14_IRQHandler 0x0800B3 332 Code Wk STM32G07x_Vectors.o477 TIM15_IRQHandler 0x0800B3 352 Code Wk STM32G07x_Vectors.o478 TIM16_IRQHandler 0x0800B3 372 Code Wk STM32G07x_Vectors.o479 TIM17_IRQHandler 0x0800B3 392 Code Wk STM32G07x_Vectors.o476 TIM14_IRQHandler 0x0800B3B7 2 Code Wk STM32G07x_Vectors.o 477 TIM15_IRQHandler 0x0800B3B9 2 Code Wk STM32G07x_Vectors.o 478 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9C1__aeabi_fsub 10 4 Code Wk floatasmops_arm.o (libc_v6m_t_le_eabi_balanced.a)639 0x08009 9D1__aeabi_fmul 182 4 Code Wk floatasmops_arm.o (libc_v6m_t_le_eabi_balanced.a)640 0x08009 A89__aeabi_fdiv 148 4 Code Wk floatasmops_arm.o (libc_v6m_t_le_eabi_balanced.a)641 0x08009B 1D__aeabi_fcmpeq 30 4 Code Wk floatasmops_arm.o (libc_v6m_t_le_eabi_balanced.a)642 0x08009B 3D__aeabi_fcmpge 50 4 Code Wk floatasmops_arm.o (libc_v6m_t_le_eabi_balanced.a)643 0x08009B 71__aeabi_fcmpgt 46 4 Code Wk floatasmops_arm.o (libc_v6m_t_le_eabi_balanced.a)644 0x08009 BA1__aeabi_fcmplt 46 4 Code Wk floatasmops_arm.o (libc_v6m_t_le_eabi_balanced.a)645 0x08009 BD1__aeabi_f2uiz 36 4 Code Wk floatasmops_arm.o (libc_v6m_t_le_eabi_balanced.a)646 0x08009 BF5__aeabi_d2uiz 46 4 Code Wk floatasmops_arm.o (libc_v6m_t_le_eabi_balanced.a)647 0x08009C 25__aeabi_f2ulz 64 4 Code Wk floatasmops_arm.o (libc_v6m_t_le_eabi_balanced.a)648 0x08009C 65__aeabi_ui2f 30 4 Code Wk floatasmops_arm.o (libc_v6m_t_le_eabi_balanced.a)649 0x08009 C85__aeabi_ui2d 28 4 Code Wk floatasmops_arm.o (libc_v6m_t_le_eabi_balanced.a)650 0x08009 CA1__aeabi_ul2f 44 4 Code Wk floatasmops_arm.o (libc_v6m_t_le_eabi_balanced.a)651 0x08009 CD1__aeabi_d2f 98 4 Code Wk floatasmops_arm.o (libc_v6m_t_le_eabi_balanced.a)652 0x08009D 35fmodf 280 4 Code Wk floatops.o (libc_v6m_t_le_eabi_balanced.a)653 0x08009E 4Dfloorf 88 4 Code Wk floatops.o (libc_v6m_t_le_eabi_balanced.a)654 0x08009 EA5__aeabi_lmul 46 4 Code Wk intasmops_arm.o (libc_v6m_t_le_eabi_balanced.a)655 0x08009 ED5__aeabi_idiv 64 4 Code Wk intasmops_arm.o (libc_v6m_t_le_eabi_balanced.a)656 0x08009F 15__aeabi_idivmod 14 4 Code Wk intasmops_arm.o (libc_v6m_t_le_eabi_balanced.a)657 0x08009F 25__aeabi_uidiv 56 4 Code Wk intasmops_arm.o (libc_v6m_t_le_eabi_balanced.a)658 0x08009F 5D__aeabi_uidivmod 16 4 Code Wk intasmops_arm.o (libc_v6m_t_le_eabi_balanced.a)659 0x08009F 6D__aeabi_uldivmod 160 4 Code Wk intasmops_arm.o (libc_v6m_t_le_eabi_balanced.a)660 0x0800A0 0D__aeabi_idiv0 6 4 Code Wk intasmops_arm.o (libc_v6m_t_le_eabi_balanced.a)661 0x0800A0 15__SEGGER_RTL_current_locale627 0x080050ED main 14 176 4 Code Gb cellMon_lto.o 628 0x0800884D SysTick_Handler 16 4 Code Gb cellMon_lto.o 629 0x0800885D DMA_Channel1_IRQHandler 240 4 Code Gb cellMon_lto.o 630 0x0800894D ADC_COMP_IRQHandler 472 4 Code Gb cellMon_lto.o 631 0x08008B25 EEPROM_fullRestore 468 4 Code Lc cellMon_lto.o 632 0x08008CF9 EEPROM_readConfig 684 4 Code Lc cellMon_lto.o 633 0x08008FA5 EEPROM_storeConfig 632 4 Code Lc cellMon_lto.o 634 0x0800921D EEPROM_storeLogData 388 4 Code Lc cellMon_lto.o 635 0x080093A1 mbInit 760 4 Code Lc cellMon_lto.o 636 0x08009699 MODBUS_UART_IRQHandler 632 4 Code Lc cellMon_lto.o 637 0x08009911 __aeabi_fadd 308 4 Code Wk floatasmops_arm.o (libc_v6m_t_le_eabi_balanced.a) 638 0x08009A45 __aeabi_fsub 10 4 Code Wk floatasmops_arm.o (libc_v6m_t_le_eabi_balanced.a) 639 0x08009A55 __aeabi_fmul 182 4 Code Wk floatasmops_arm.o (libc_v6m_t_le_eabi_balanced.a) 640 0x08009B0D __aeabi_fdiv 148 4 Code Wk floatasmops_arm.o (libc_v6m_t_le_eabi_balanced.a) 641 0x08009BA1 __aeabi_fcmpeq 30 4 Code Wk floatasmops_arm.o (libc_v6m_t_le_eabi_balanced.a) 642 0x08009BC1 __aeabi_fcmpge 50 4 Code Wk floatasmops_arm.o (libc_v6m_t_le_eabi_balanced.a) 643 0x08009BF5 __aeabi_fcmpgt 46 4 Code Wk floatasmops_arm.o (libc_v6m_t_le_eabi_balanced.a) 644 0x08009C25 __aeabi_fcmplt 46 4 Code Wk floatasmops_arm.o (libc_v6m_t_le_eabi_balanced.a) 645 0x08009C55 __aeabi_f2uiz 36 4 Code Wk floatasmops_arm.o (libc_v6m_t_le_eabi_balanced.a) 646 0x08009C79 __aeabi_d2uiz 46 4 Code Wk floatasmops_arm.o (libc_v6m_t_le_eabi_balanced.a) 647 0x08009CA9 __aeabi_f2ulz 64 4 Code Wk floatasmops_arm.o (libc_v6m_t_le_eabi_balanced.a) 648 0x08009CE9 __aeabi_ui2f 30 4 Code Wk floatasmops_arm.o (libc_v6m_t_le_eabi_balanced.a) 649 0x08009D09 __aeabi_ui2d 28 4 Code Wk floatasmops_arm.o (libc_v6m_t_le_eabi_balanced.a) 650 0x08009D25 __aeabi_ul2f 44 4 Code Wk floatasmops_arm.o (libc_v6m_t_le_eabi_balanced.a) 651 0x08009D55 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(libc_v6m_t_le_eabi_balanced.a) 671 0x0800A0F9 __aeabi_memcpy 4 Code Wk strasmops_arm.o (libc_v6m_t_le_eabi_balanced.a) 672 0x0800A109 __aeabi_memclr8 4 Code Wk strasmops_arm.o (libc_v6m_t_le_eabi_balanced.a) 673 0x0800A109 __aeabi_memclr4 4 Code Wk strasmops_arm.o (libc_v6m_t_le_eabi_balanced.a) 674 0x0800A109 __aeabi_memclr 20 4 Code Wk strasmops_arm.o (libc_v6m_t_le_eabi_balanced.a) 675 0x0800A10B __aeabi_memset8 4 Code Wk strasmops_arm.o (libc_v6m_t_le_eabi_balanced.a) 676 0x0800A10B __aeabi_memset4 4 Code Wk strasmops_arm.o (libc_v6m_t_le_eabi_balanced.a) 677 0x0800A10B __aeabi_memset 4 Code Wk strasmops_arm.o (libc_v6m_t_le_eabi_balanced.a) 678 0x0800A111 memset 4 Code Wk strasmops_arm.o (libc_v6m_t_le_eabi_balanced.a) 679 0x0800A11D strnlen 128 4 Code Wk strops.o (libc_v6m_t_le_eabi_balanced.a) 680 0x0800A19D __SEGGER_RTL_pow10f 72 4 Code Gb utilops.o (libc_v6m_t_le_eabi_balanced.a) 681 0x0800A1E5 vfprintf_l 120 4 Code Gb prinops.o (libc_v6m_t_le_eabi_balanced.a) 682 0x0800A25D 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STM32G07x_Vectors.o 711 0x0800B3 29TIM1_CC_IRQHandler 2 Code Wk STM32G07x_Vectors.o712 0x0800B3 2BTIM2_IRQHandler 2 Code Wk STM32G07x_Vectors.o713 0x0800B3 2DTIM3_IRQHandler 2 Code Wk STM32G07x_Vectors.o714 0x0800B3 2FTIM6_DAC_LPTIM1_IRQHandler711 0x0800B3AD TIM1_CC_IRQHandler 2 Code Wk STM32G07x_Vectors.o 712 0x0800B3AF TIM2_IRQHandler 2 Code Wk STM32G07x_Vectors.o 713 0x0800B3B1 TIM3_IRQHandler 2 Code Wk STM32G07x_Vectors.o 714 0x0800B3B3 TIM6_DAC_LPTIM1_IRQHandler 715 715 2 Code Wk STM32G07x_Vectors.o 716 0x0800B3 31TIM7_LPTIM2_IRQHandler 2 Code Wk STM32G07x_Vectors.o717 0x0800B3 33TIM14_IRQHandler 2 Code Wk STM32G07x_Vectors.o718 0x0800B3 35TIM15_IRQHandler 2 Code Wk STM32G07x_Vectors.o719 0x0800B3 37TIM16_IRQHandler 2 Code Wk STM32G07x_Vectors.o720 0x0800B3 39TIM17_IRQHandler 2 Code Wk STM32G07x_Vectors.o721 0x0800B3 3BI2C1_IRQHandler 2 Code Wk STM32G07x_Vectors.o722 0x0800B3 3DI2C2_IRQHandler 2 Code Wk STM32G07x_Vectors.o723 0x0800B3 3FSPI1_IRQHandler 2 Code Wk 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STM32G07x_Vectors.o 717 0x0800B3B7 TIM14_IRQHandler 2 Code Wk STM32G07x_Vectors.o 718 0x0800B3B9 TIM15_IRQHandler 2 Code Wk STM32G07x_Vectors.o 719 0x0800B3BB TIM16_IRQHandler 2 Code Wk STM32G07x_Vectors.o 720 0x0800B3BD TIM17_IRQHandler 2 Code Wk STM32G07x_Vectors.o 721 0x0800B3BF I2C1_IRQHandler 2 Code Wk STM32G07x_Vectors.o 722 0x0800B3C1 I2C2_IRQHandler 2 Code Wk STM32G07x_Vectors.o 723 0x0800B3C3 SPI1_IRQHandler 2 Code Wk STM32G07x_Vectors.o 724 0x0800B3C5 SPI2_IRQHandler 2 Code Wk STM32G07x_Vectors.o 725 0x0800B3C7 USART2_IRQHandler 2 Code Wk STM32G07x_Vectors.o 726 0x0800B3C9 CEC_IRQHandler 2 Code Wk STM32G07x_Vectors.o 727 0x0800B3CB AES_RNG_IRQHandler 2 Code Wk STM32G07x_Vectors.o 728 0x0800B3CD ADC_DMAHalfConvCplt 2 2 Code Lc cellMon_lto.o 729 0x0800B3CF UART_TxISR_8BIT_FIFOEN 82 2 Code Lc cellMon_lto.o 730 0x0800B421 UART_RxISR_8BIT 106 2 Code Lc cellMon_lto.o 731 0x0800B48B UART_RxISR_16BIT 102 2 Code Lc cellMon_lto.o 732 0x0800B4F1 NMI_Handler 2 2 Code Gb cellMon_lto.o 733 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ecs_cellMon/firmware/main.emProject
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ecs_cellMon/firmware/main.emSession
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ecs_cellMon/firmware/src/sysdata.c
r3 r10 100 100 sysData.s.fwMajor = 1; 101 101 sysData.s.fwMinor = 0; 102 sysData.s.fwRevision = 2;102 sysData.s.fwRevision = 3; 103 103 sysData.s.minVoltage = MIN_VOLTAGE_DEFAULT; 104 104 sysData.s.maxVoltage = MAX_VOLTAGE_DEFAULT;
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