Index: ctrl/firmware/Main/CubeMX/Core/Inc/adc.h
===================================================================
--- ctrl/firmware/Main/CubeMX/Core/Inc/adc.h	(revision 91)
+++ ctrl/firmware/Main/CubeMX/Core/Inc/adc.h	(revision 92)
@@ -35,22 +35,25 @@
 /* USER CODE END Includes */
 
-extern ADC_HandleTypeDef hadc1;
+extern ADC_HandleTypeDef hadc3;
 
 /* USER CODE BEGIN Private defines */
 
-#define ADC1_CHANNELS	(1U)
+#define ADC3_CHANNELS	(4U)
 
-typedef union ADC1_data_t
+typedef union ADC3_data_t
 {
-	uint16_t Data[ADC1_CHANNELS];
-	struct Raw
+	uint16_t Raw[ADC3_CHANNELS];
+	struct
 	{
-		uint16_t U_Bat;
-	}Raw;
-}ADC1_data_t __attribute__((packed, aligned(32)));
+		uint16_t Vbat;
+		uint16_t Vref;
+		uint16_t CPUTemp;
+		uint16_t UBat;
+	};
+} __attribute__((packed, aligned(32))) ADC3_data_t;
 
 /* USER CODE END Private defines */
 
-void MX_ADC1_Init(void);
+void MX_ADC3_Init(void);
 
 /* USER CODE BEGIN Prototypes */
Index: ctrl/firmware/Main/CubeMX/Core/Inc/bdma.h
===================================================================
--- ctrl/firmware/Main/CubeMX/Core/Inc/bdma.h	(revision 92)
+++ ctrl/firmware/Main/CubeMX/Core/Inc/bdma.h	(revision 92)
@@ -0,0 +1,52 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    bdma.h
+  * @brief   This file contains all the function prototypes for
+  *          the bdma.c file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2025 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __BDMA_H__
+#define __BDMA_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* DMA memory to memory transfer handles -------------------------------------*/
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+void MX_BDMA_Init(void);
+
+/* USER CODE BEGIN Prototypes */
+
+/* USER CODE END Prototypes */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __BDMA_H__ */
+
Index: ctrl/firmware/Main/CubeMX/Core/Inc/main.h
===================================================================
--- ctrl/firmware/Main/CubeMX/Core/Inc/main.h	(revision 91)
+++ ctrl/firmware/Main/CubeMX/Core/Inc/main.h	(revision 92)
@@ -68,4 +68,6 @@
 #define EEPROM_I2C_SCL_Pin GPIO_PIN_1
 #define EEPROM_I2C_SCL_GPIO_Port GPIOF
+#define U_BAT_Pin GPIO_PIN_0
+#define U_BAT_GPIO_Port GPIOC
 #define POWER_4V_EN_Pin GPIO_PIN_15
 #define POWER_4V_EN_GPIO_Port GPIOF
Index: ctrl/firmware/Main/CubeMX/Core/Inc/stm32h7xx_it.h
===================================================================
--- ctrl/firmware/Main/CubeMX/Core/Inc/stm32h7xx_it.h	(revision 91)
+++ ctrl/firmware/Main/CubeMX/Core/Inc/stm32h7xx_it.h	(revision 92)
@@ -58,5 +58,4 @@
 void DMA1_Stream3_IRQHandler(void);
 void DMA1_Stream4_IRQHandler(void);
-void DMA1_Stream5_IRQHandler(void);
 void EXTI9_5_IRQHandler(void);
 void TIM3_IRQHandler(void);
@@ -69,4 +68,5 @@
 void SPI4_IRQHandler(void);
 void MDMA_IRQHandler(void);
+void BDMA_Channel0_IRQHandler(void);
 void USART10_IRQHandler(void);
 /* USER CODE BEGIN EFP */
Index: ctrl/firmware/Main/CubeMX/Core/Src/adc.c
===================================================================
--- ctrl/firmware/Main/CubeMX/Core/Src/adc.c	(revision 91)
+++ ctrl/firmware/Main/CubeMX/Core/Src/adc.c	(revision 92)
@@ -23,80 +23,105 @@
 /* USER CODE BEGIN 0 */
 
-ADC1_data_t ADC1_Data;
+ADC3_data_t ADC3_values		__attribute__((section(".BKP_RAM_4_DMA")));
 
 /* USER CODE END 0 */
 
-ADC_HandleTypeDef hadc1;
-DMA_HandleTypeDef hdma_adc1;
-
-/* ADC1 init function */
-void MX_ADC1_Init(void)
+ADC_HandleTypeDef hadc3;
+DMA_HandleTypeDef hdma_adc3;
+
+/* ADC3 init function */
+void MX_ADC3_Init(void)
 {
 
-  /* USER CODE BEGIN ADC1_Init 0 */
-
-  /* USER CODE END ADC1_Init 0 */
-
-  ADC_MultiModeTypeDef multimode = {0};
+  /* USER CODE BEGIN ADC3_Init 0 */
+
+  /* USER CODE END ADC3_Init 0 */
+
   ADC_ChannelConfTypeDef sConfig = {0};
 
-  /* USER CODE BEGIN ADC1_Init 1 */
-
-  /* USER CODE END ADC1_Init 1 */
+  /* USER CODE BEGIN ADC3_Init 1 */
+
+  /* USER CODE END ADC3_Init 1 */
 
   /** Common config
   */
-  hadc1.Instance = ADC1;
-  hadc1.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV256;
-  hadc1.Init.Resolution = ADC_RESOLUTION_16B;
-  hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE;
-  hadc1.Init.EOCSelection = ADC_EOC_SEQ_CONV;
-  hadc1.Init.LowPowerAutoWait = DISABLE;
-  hadc1.Init.ContinuousConvMode = ENABLE;
-  hadc1.Init.NbrOfConversion = 1;
-  hadc1.Init.DiscontinuousConvMode = DISABLE;
-  hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
-  hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
-  hadc1.Init.ConversionDataManagement = ADC_CONVERSIONDATA_DR;
-  hadc1.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN;
-  hadc1.Init.LeftBitShift = ADC_LEFTBITSHIFT_NONE;
-  hadc1.Init.OversamplingMode = ENABLE;
-  hadc1.Init.Oversampling.Ratio = 1024;
-  hadc1.Init.Oversampling.RightBitShift = ADC_RIGHTBITSHIFT_11;
-  hadc1.Init.Oversampling.TriggeredMode = ADC_TRIGGEREDMODE_SINGLE_TRIGGER;
-  hadc1.Init.Oversampling.OversamplingStopReset = ADC_REGOVERSAMPLING_CONTINUED_MODE;
-  if (HAL_ADC_Init(&hadc1) != HAL_OK)
-  {
-    Error_Handler();
-  }
-
-  /** Configure the ADC multi-mode
-  */
-  multimode.Mode = ADC_MODE_INDEPENDENT;
-  if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK)
-  {
-    Error_Handler();
-  }
-
-  /** Configure Regular Channel
-  */
-  sConfig.Channel = ADC_CHANNEL_10;
+  hadc3.Instance = ADC3;
+  hadc3.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV256;
+  hadc3.Init.Resolution = ADC_RESOLUTION_12B;
+  hadc3.Init.DataAlign = ADC3_DATAALIGN_RIGHT;
+  hadc3.Init.ScanConvMode = ADC_SCAN_ENABLE;
+  hadc3.Init.EOCSelection = ADC_EOC_SEQ_CONV;
+  hadc3.Init.LowPowerAutoWait = DISABLE;
+  hadc3.Init.ContinuousConvMode = ENABLE;
+  hadc3.Init.NbrOfConversion = 4;
+  hadc3.Init.DiscontinuousConvMode = DISABLE;
+  hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START;
+  hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
+  hadc3.Init.DMAContinuousRequests = ENABLE;
+  hadc3.Init.SamplingMode = ADC_SAMPLING_MODE_NORMAL;
+  hadc3.Init.ConversionDataManagement = ADC_CONVERSIONDATA_DR;
+  hadc3.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN;
+  hadc3.Init.LeftBitShift = ADC_LEFTBITSHIFT_NONE;
+  hadc3.Init.OversamplingMode = ENABLE;
+  hadc3.Init.Oversampling.Ratio = ADC3_OVERSAMPLING_RATIO_256;
+  hadc3.Init.Oversampling.RightBitShift = ADC_RIGHTBITSHIFT_11;
+  hadc3.Init.Oversampling.TriggeredMode = ADC_TRIGGEREDMODE_SINGLE_TRIGGER;
+  hadc3.Init.Oversampling.OversamplingStopReset = ADC_REGOVERSAMPLING_CONTINUED_MODE;
+  if (HAL_ADC_Init(&hadc3) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Configure Regular Channel
+  */
+  sConfig.Channel = ADC_CHANNEL_VBAT;
   sConfig.Rank = ADC_REGULAR_RANK_1;
-  sConfig.SamplingTime = ADC_SAMPLETIME_810CYCLES_5;
+  sConfig.SamplingTime = ADC3_SAMPLETIME_640CYCLES_5;
   sConfig.SingleDiff = ADC_SINGLE_ENDED;
   sConfig.OffsetNumber = ADC_OFFSET_NONE;
   sConfig.Offset = 0;
-  sConfig.OffsetSignedSaturation = DISABLE;
-  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
-  {
-    Error_Handler();
-  }
-  /* USER CODE BEGIN ADC1_Init 2 */
-
-  HAL_StatusTypeDef r = HAL_ADC_Start_DMA(&hadc1, (uint32_t*)&ADC1_Data, ADC1_CHANNELS);
-  if (r != HAL_OK) printf("Cannot initialize ADC1!\n");
-  __HAL_DMA_DISABLE_IT(&hdma_adc1, DMA_IT_HT);
-
-  /* USER CODE END ADC1_Init 2 */
+  sConfig.OffsetSign = ADC3_OFFSET_SIGN_NEGATIVE;
+  if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Configure Regular Channel
+  */
+  sConfig.Channel = ADC_CHANNEL_VREFINT;
+  sConfig.Rank = ADC_REGULAR_RANK_2;
+  if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Configure Regular Channel
+  */
+  sConfig.Channel = ADC_CHANNEL_TEMPSENSOR;
+  sConfig.Rank = ADC_REGULAR_RANK_3;
+  if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Configure Regular Channel
+  */
+  sConfig.Channel = ADC_CHANNEL_10;
+  sConfig.Rank = ADC_REGULAR_RANK_4;
+  sConfig.SamplingTime = ADC3_SAMPLETIME_2CYCLES_5;
+  if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN ADC3_Init 2 */
+
+  if (HAL_OK != HAL_ADCEx_Calibration_Start(&hadc3, ADC_CALIB_OFFSET, ADC_SINGLE_ENDED)) Error_Handler();
+  if (HAL_OK != HAL_ADCEx_Calibration_Start(&hadc3, ADC_CALIB_OFFSET_LINEARITY, ADC_SINGLE_ENDED)) Error_Handler();
+
+  if (HAL_OK != HAL_ADC_Start_DMA(&hadc3, (uint32_t*)&ADC3_values, 2)) Error_Handler();
+  __HAL_DMA_DISABLE_IT(&hdma_adc3, DMA_IT_HT);
+
+
+  /* USER CODE END ADC3_Init 2 */
 
 }
@@ -106,43 +131,42 @@
 
   GPIO_InitTypeDef GPIO_InitStruct = {0};
-  if(adcHandle->Instance==ADC1)
-  {
-  /* USER CODE BEGIN ADC1_MspInit 0 */
-
-  /* USER CODE END ADC1_MspInit 0 */
-    /* ADC1 clock enable */
-    __HAL_RCC_ADC12_CLK_ENABLE();
+  if(adcHandle->Instance==ADC3)
+  {
+  /* USER CODE BEGIN ADC3_MspInit 0 */
+
+  /* USER CODE END ADC3_MspInit 0 */
+    /* ADC3 clock enable */
+    __HAL_RCC_ADC3_CLK_ENABLE();
 
     __HAL_RCC_GPIOC_CLK_ENABLE();
-    /**ADC1 GPIO Configuration
-    PC0     ------> ADC1_INP10
+    /**ADC3 GPIO Configuration
+    PC0     ------> ADC3_INP10
     */
-    GPIO_InitStruct.Pin = GPIO_PIN_0;
+    GPIO_InitStruct.Pin = U_BAT_Pin;
     GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
     GPIO_InitStruct.Pull = GPIO_NOPULL;
-    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
-
-    /* ADC1 DMA Init */
-    /* ADC1 Init */
-    hdma_adc1.Instance = DMA1_Stream5;
-    hdma_adc1.Init.Request = DMA_REQUEST_ADC1;
-    hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
-    hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
-    hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
-    hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
-    hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
-    hdma_adc1.Init.Mode = DMA_CIRCULAR;
-    hdma_adc1.Init.Priority = DMA_PRIORITY_LOW;
-    hdma_adc1.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
-    if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)
+    HAL_GPIO_Init(U_BAT_GPIO_Port, &GPIO_InitStruct);
+
+    /* ADC3 DMA Init */
+    /* ADC3 Init */
+    hdma_adc3.Instance = BDMA_Channel0;
+    hdma_adc3.Init.Request = BDMA_REQUEST_ADC3;
+    hdma_adc3.Init.Direction = DMA_PERIPH_TO_MEMORY;
+    hdma_adc3.Init.PeriphInc = DMA_PINC_DISABLE;
+    hdma_adc3.Init.MemInc = DMA_MINC_ENABLE;
+    hdma_adc3.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
+    hdma_adc3.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
+    hdma_adc3.Init.Mode = DMA_CIRCULAR;
+    hdma_adc3.Init.Priority = DMA_PRIORITY_LOW;
+    if (HAL_DMA_Init(&hdma_adc3) != HAL_OK)
     {
       Error_Handler();
     }
 
-    __HAL_LINKDMA(adcHandle,DMA_Handle,hdma_adc1);
-
-  /* USER CODE BEGIN ADC1_MspInit 1 */
-
-  /* USER CODE END ADC1_MspInit 1 */
+    __HAL_LINKDMA(adcHandle,DMA_Handle,hdma_adc3);
+
+  /* USER CODE BEGIN ADC3_MspInit 1 */
+
+  /* USER CODE END ADC3_MspInit 1 */
   }
 }
@@ -151,22 +175,22 @@
 {
 
-  if(adcHandle->Instance==ADC1)
-  {
-  /* USER CODE BEGIN ADC1_MspDeInit 0 */
-
-  /* USER CODE END ADC1_MspDeInit 0 */
+  if(adcHandle->Instance==ADC3)
+  {
+  /* USER CODE BEGIN ADC3_MspDeInit 0 */
+
+  /* USER CODE END ADC3_MspDeInit 0 */
     /* Peripheral clock disable */
-    __HAL_RCC_ADC12_CLK_DISABLE();
-
-    /**ADC1 GPIO Configuration
-    PC0     ------> ADC1_INP10
+    __HAL_RCC_ADC3_CLK_DISABLE();
+
+    /**ADC3 GPIO Configuration
+    PC0     ------> ADC3_INP10
     */
-    HAL_GPIO_DeInit(GPIOC, GPIO_PIN_0);
-
-    /* ADC1 DMA DeInit */
+    HAL_GPIO_DeInit(U_BAT_GPIO_Port, U_BAT_Pin);
+
+    /* ADC3 DMA DeInit */
     HAL_DMA_DeInit(adcHandle->DMA_Handle);
-  /* USER CODE BEGIN ADC1_MspDeInit 1 */
-
-  /* USER CODE END ADC1_MspDeInit 1 */
+  /* USER CODE BEGIN ADC3_MspDeInit 1 */
+
+  /* USER CODE END ADC3_MspDeInit 1 */
   }
 }
Index: ctrl/firmware/Main/CubeMX/Core/Src/bdma.c
===================================================================
--- ctrl/firmware/Main/CubeMX/Core/Src/bdma.c	(revision 92)
+++ ctrl/firmware/Main/CubeMX/Core/Src/bdma.c	(revision 92)
@@ -0,0 +1,55 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    bdma.c
+  * @brief   This file provides code for the configuration
+  *          of all the requested memory to memory DMA transfers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2025 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "bdma.h"
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/*----------------------------------------------------------------------------*/
+/* Configure DMA                                                              */
+/*----------------------------------------------------------------------------*/
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
+
+/**
+  * Enable DMA controller clock
+  */
+void MX_BDMA_Init(void)
+{
+
+  /* DMA controller clock enable */
+  __HAL_RCC_BDMA_CLK_ENABLE();
+
+  /* DMA interrupt init */
+  /* BDMA_Channel0_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(BDMA_Channel0_IRQn, 5, 0);
+  HAL_NVIC_EnableIRQ(BDMA_Channel0_IRQn);
+
+}
+
+/* USER CODE BEGIN 2 */
+
+/* USER CODE END 2 */
+
Index: ctrl/firmware/Main/CubeMX/Core/Src/dma.c
===================================================================
--- ctrl/firmware/Main/CubeMX/Core/Src/dma.c	(revision 91)
+++ ctrl/firmware/Main/CubeMX/Core/Src/dma.c	(revision 92)
@@ -59,7 +59,4 @@
   HAL_NVIC_SetPriority(DMA1_Stream4_IRQn, 5, 0);
   HAL_NVIC_EnableIRQ(DMA1_Stream4_IRQn);
-  /* DMA1_Stream5_IRQn interrupt configuration */
-  HAL_NVIC_SetPriority(DMA1_Stream5_IRQn, 5, 0);
-  HAL_NVIC_EnableIRQ(DMA1_Stream5_IRQn);
 
 }
Index: ctrl/firmware/Main/CubeMX/Core/Src/main.c
===================================================================
--- ctrl/firmware/Main/CubeMX/Core/Src/main.c	(revision 91)
+++ ctrl/firmware/Main/CubeMX/Core/Src/main.c	(revision 92)
@@ -21,4 +21,5 @@
 #include "cmsis_os.h"
 #include "adc.h"
+#include "bdma.h"
 #include "dma.h"
 #include "fatfs.h"
@@ -131,9 +132,9 @@
   MX_DMA_Init();
   //MX_MDMA_Init();
+  MX_BDMA_Init();
   MX_RTC_Init();
   MX_SPI4_Init();
   MX_SDMMC1_SD_Init();
   MX_USART3_UART_Init();
-  MX_TIM3_Init();
   MX_FATFS_Init();
   MX_TIM8_Init();
@@ -142,7 +143,8 @@
   MX_USART10_UART_Init();
   MX_TIM6_Init();
+  MX_I2C2_Init();
+  MX_ADC3_Init();
   MX_I2C1_Init();
-  MX_I2C2_Init();
-  MX_ADC1_Init();
+  MX_TIM3_Init();
   /* USER CODE BEGIN 2 */
 
@@ -300,5 +302,5 @@
   MPU_InitStruct.Number = MPU_REGION_NUMBER1;
   MPU_InitStruct.BaseAddress = 0x24000000;
-  MPU_InitStruct.Size = MPU_REGION_SIZE_128KB;
+  MPU_InitStruct.Size = MPU_REGION_SIZE_8KB;
   MPU_InitStruct.SubRegionDisable = 0x0;
   MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL1;
@@ -371,4 +373,6 @@
      ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
 
+  printf("Wrong parameters value: file %s on line %d\r\n", file, line);
+
   /* USER CODE END 6 */
 }
Index: ctrl/firmware/Main/CubeMX/Core/Src/stm32h7xx_it.c
===================================================================
--- ctrl/firmware/Main/CubeMX/Core/Src/stm32h7xx_it.c	(revision 91)
+++ ctrl/firmware/Main/CubeMX/Core/Src/stm32h7xx_it.c	(revision 92)
@@ -61,5 +61,5 @@
 
 /* External variables --------------------------------------------------------*/
-extern DMA_HandleTypeDef hdma_adc1;
+extern DMA_HandleTypeDef hdma_adc3;
 extern MDMA_HandleTypeDef hmdma_mdma_channel0_sdmmc1_end_data_0;
 extern SD_HandleTypeDef hsd1;
@@ -251,18 +251,4 @@
 
 /**
-  * @brief This function handles DMA1 stream5 global interrupt.
-  */
-void DMA1_Stream5_IRQHandler(void)
-{
-  /* USER CODE BEGIN DMA1_Stream5_IRQn 0 */
-
-  /* USER CODE END DMA1_Stream5_IRQn 0 */
-  HAL_DMA_IRQHandler(&hdma_adc1);
-  /* USER CODE BEGIN DMA1_Stream5_IRQn 1 */
-
-  /* USER CODE END DMA1_Stream5_IRQn 1 */
-}
-
-/**
   * @brief This function handles EXTI line[9:5] interrupts.
   */
@@ -406,4 +392,18 @@
 
   /* USER CODE END MDMA_IRQn 1 */
+}
+
+/**
+  * @brief This function handles BDMA channel0 global interrupt.
+  */
+void BDMA_Channel0_IRQHandler(void)
+{
+  /* USER CODE BEGIN BDMA_Channel0_IRQn 0 */
+
+  /* USER CODE END BDMA_Channel0_IRQn 0 */
+  HAL_DMA_IRQHandler(&hdma_adc3);
+  /* USER CODE BEGIN BDMA_Channel0_IRQn 1 */
+
+  /* USER CODE END BDMA_Channel0_IRQn 1 */
 }
 
Index: ctrl/firmware/Main/CubeMX/FATFS/App/fatfs.c
===================================================================
--- ctrl/firmware/Main/CubeMX/FATFS/App/fatfs.c	(revision 91)
+++ ctrl/firmware/Main/CubeMX/FATFS/App/fatfs.c	(revision 92)
@@ -21,6 +21,6 @@
 uint8_t retSD;																	/* Return value for SD */
 char SDPath[4];																	/* SD logical drive path */
-FATFS SDFatFS	  __attribute__((section(".AXI_RAM")));							/* File system object for SD logical drive */
-FIL SDFile;																		/* File object for SD */
+FATFS SDFatFS	  __attribute__((section(".RAM_4_DMA")));						/* File system object for SD logical drive */
+FIL SDFile		  __attribute__((section(".RAM_4_DMA")));						/* File object for SD */
 
 /* USER CODE BEGIN Variables */
Index: ctrl/firmware/Main/CubeMX/charger.ioc
===================================================================
--- ctrl/firmware/Main/CubeMX/charger.ioc	(revision 91)
+++ ctrl/firmware/Main/CubeMX/charger.ioc	(revision 92)
@@ -1,19 +1,53 @@
 #MicroXplorer Configuration settings - do not modify
-ADC1.Channel-0\#ChannelRegularConversion=ADC_CHANNEL_10
-ADC1.ClockPrescaler=ADC_CLOCK_ASYNC_DIV256
-ADC1.ContinuousConvMode=ENABLE
-ADC1.EOCSelection=ADC_EOC_SEQ_CONV
-ADC1.IPParameters=Rank-0\#ChannelRegularConversion,master,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,OffsetNumber-0\#ChannelRegularConversion,OffsetSignedSaturation-0\#ChannelRegularConversion,NbrOfConversionFlag,ContinuousConvMode,EOCSelection,Overrun,OversamplingMode,RightBitShift,Ratio,NbrOfConversion,ClockPrescaler
-ADC1.NbrOfConversion=1
-ADC1.NbrOfConversionFlag=1
-ADC1.OffsetNumber-0\#ChannelRegularConversion=ADC_OFFSET_NONE
-ADC1.OffsetSignedSaturation-0\#ChannelRegularConversion=DISABLE
-ADC1.Overrun=ADC_OVR_DATA_OVERWRITTEN
-ADC1.OversamplingMode=ENABLE
-ADC1.Rank-0\#ChannelRegularConversion=1
-ADC1.Ratio=1024
-ADC1.RightBitShift=ADC_RIGHTBITSHIFT_11
-ADC1.SamplingTime-0\#ChannelRegularConversion=ADC_SAMPLETIME_810CYCLES_5
-ADC1.master=1
+ADC3.Channel-0\#ChannelRegularConversion=ADC_CHANNEL_VBAT
+ADC3.Channel-1\#ChannelRegularConversion=ADC_CHANNEL_VREFINT
+ADC3.Channel-2\#ChannelRegularConversion=ADC_CHANNEL_TEMPSENSOR
+ADC3.Channel-3\#ChannelRegularConversion=ADC_CHANNEL_10
+ADC3.ClockPrescalerADC3=ADC_CLOCK_ASYNC_DIV256
+ADC3.ContinuousConvMode=ENABLE
+ADC3.DMAContinuousRequests=ENABLE
+ADC3.EOCSelection=ADC_EOC_SEQ_CONV
+ADC3.IPParameters=Rank-0\#ChannelRegularConversion,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,OffsetNumber-0\#ChannelRegularConversion,OffsetSign-0\#ChannelRegularConversion,NbrOfConversionFlag,ContinuousConvMode,DMAContinuousRequests,EOCSelection,Overrun,OversamplingMode,RightBitShift,ClockPrescalerADC3,Ratio,Rank-1\#ChannelRegularConversion,Channel-1\#ChannelRegularConversion,SamplingTime-1\#ChannelRegularConversion,OffsetNumber-1\#ChannelRegularConversion,OffsetSign-1\#ChannelRegularConversion,Rank-2\#ChannelRegularConversion,Channel-2\#ChannelRegularConversion,SamplingTime-2\#ChannelRegularConversion,OffsetNumber-2\#ChannelRegularConversion,OffsetSign-2\#ChannelRegularConversion,Rank-3\#ChannelRegularConversion,Channel-3\#ChannelRegularConversion,SamplingTime-3\#ChannelRegularConversion,OffsetNumber-3\#ChannelRegularConversion,OffsetSign-3\#ChannelRegularConversion,NbrOfConversion
+ADC3.NbrOfConversion=4
+ADC3.NbrOfConversionFlag=1
+ADC3.OffsetNumber-0\#ChannelRegularConversion=ADC_OFFSET_NONE
+ADC3.OffsetNumber-1\#ChannelRegularConversion=ADC_OFFSET_NONE
+ADC3.OffsetNumber-2\#ChannelRegularConversion=ADC_OFFSET_NONE
+ADC3.OffsetNumber-3\#ChannelRegularConversion=ADC_OFFSET_NONE
+ADC3.OffsetSign-0\#ChannelRegularConversion=ADC3_OFFSET_SIGN_NEGATIVE
+ADC3.OffsetSign-1\#ChannelRegularConversion=ADC3_OFFSET_SIGN_NEGATIVE
+ADC3.OffsetSign-2\#ChannelRegularConversion=ADC3_OFFSET_SIGN_NEGATIVE
+ADC3.OffsetSign-3\#ChannelRegularConversion=ADC3_OFFSET_SIGN_NEGATIVE
+ADC3.Overrun=ADC_OVR_DATA_OVERWRITTEN
+ADC3.OversamplingMode=ENABLE
+ADC3.Rank-0\#ChannelRegularConversion=1
+ADC3.Rank-1\#ChannelRegularConversion=2
+ADC3.Rank-2\#ChannelRegularConversion=3
+ADC3.Rank-3\#ChannelRegularConversion=4
+ADC3.Ratio=ADC3_OVERSAMPLING_RATIO_256
+ADC3.RightBitShift=ADC_RIGHTBITSHIFT_11
+ADC3.SamplingTime-0\#ChannelRegularConversion=ADC3_SAMPLETIME_640CYCLES_5
+ADC3.SamplingTime-1\#ChannelRegularConversion=ADC3_SAMPLETIME_640CYCLES_5
+ADC3.SamplingTime-2\#ChannelRegularConversion=ADC3_SAMPLETIME_640CYCLES_5
+ADC3.SamplingTime-3\#ChannelRegularConversion=ADC3_SAMPLETIME_2CYCLES_5
+Bdma.ADC3.0.Direction=DMA_PERIPH_TO_MEMORY
+Bdma.ADC3.0.EventEnable=DISABLE
+Bdma.ADC3.0.Instance=BDMA_Channel0
+Bdma.ADC3.0.MemDataAlignment=DMA_MDATAALIGN_HALFWORD
+Bdma.ADC3.0.MemInc=DMA_MINC_ENABLE
+Bdma.ADC3.0.Mode=DMA_CIRCULAR
+Bdma.ADC3.0.PeriphDataAlignment=DMA_PDATAALIGN_HALFWORD
+Bdma.ADC3.0.PeriphInc=DMA_PINC_DISABLE
+Bdma.ADC3.0.Polarity=HAL_DMAMUX_REQ_GEN_RISING
+Bdma.ADC3.0.Priority=DMA_PRIORITY_LOW
+Bdma.ADC3.0.RequestNumber=1
+Bdma.ADC3.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
+Bdma.ADC3.0.SignalID=NONE
+Bdma.ADC3.0.SyncEnable=DISABLE
+Bdma.ADC3.0.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
+Bdma.ADC3.0.SyncRequestNumber=1
+Bdma.ADC3.0.SyncSignalID=NONE
+Bdma.Request0=ADC3
+Bdma.RequestsNb=1
 CAD.formats=[]
 CAD.pinconfig=Dual
@@ -26,25 +60,7 @@
 CORTEX_M7.Enable_S-Cortex_Memory_Protection_Unit_Region1_Settings_S=MPU_REGION_ENABLE
 CORTEX_M7.IPParameters=default_mode_Activation,CPU_ICache,CPU_DCache,Enable_S-Cortex_Memory_Protection_Unit_Region1_Settings_S,BaseAddress_S-Cortex_Memory_Protection_Unit_Region1_Settings_S,Size_S-Cortex_Memory_Protection_Unit_Region1_Settings_S,TypeExtField_S-Cortex_Memory_Protection_Unit_Region1_Settings_S,AccessPermission_S-Cortex_Memory_Protection_Unit_Region1_Settings_S,DisableExec_S-Cortex_Memory_Protection_Unit_Region1_Settings_S
-CORTEX_M7.Size_S-Cortex_Memory_Protection_Unit_Region1_Settings_S=MPU_REGION_SIZE_128KB
+CORTEX_M7.Size_S-Cortex_Memory_Protection_Unit_Region1_Settings_S=MPU_REGION_SIZE_8KB
 CORTEX_M7.TypeExtField_S-Cortex_Memory_Protection_Unit_Region1_Settings_S=MPU_TEX_LEVEL1
 CORTEX_M7.default_mode_Activation=1
-Dma.ADC1.5.Direction=DMA_PERIPH_TO_MEMORY
-Dma.ADC1.5.EventEnable=DISABLE
-Dma.ADC1.5.FIFOMode=DMA_FIFOMODE_DISABLE
-Dma.ADC1.5.Instance=DMA1_Stream5
-Dma.ADC1.5.MemDataAlignment=DMA_MDATAALIGN_HALFWORD
-Dma.ADC1.5.MemInc=DMA_MINC_ENABLE
-Dma.ADC1.5.Mode=DMA_CIRCULAR
-Dma.ADC1.5.PeriphDataAlignment=DMA_PDATAALIGN_HALFWORD
-Dma.ADC1.5.PeriphInc=DMA_PINC_DISABLE
-Dma.ADC1.5.Polarity=HAL_DMAMUX_REQ_GEN_RISING
-Dma.ADC1.5.Priority=DMA_PRIORITY_LOW
-Dma.ADC1.5.RequestNumber=1
-Dma.ADC1.5.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
-Dma.ADC1.5.SignalID=NONE
-Dma.ADC1.5.SyncEnable=DISABLE
-Dma.ADC1.5.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
-Dma.ADC1.5.SyncRequestNumber=1
-Dma.ADC1.5.SyncSignalID=NONE
 Dma.Request0=SPI4_TX
 Dma.Request1=USART3_RX
@@ -52,6 +68,5 @@
 Dma.Request3=SPI2_RX
 Dma.Request4=SPI2_TX
-Dma.Request5=ADC1
-Dma.RequestsNb=6
+Dma.RequestsNb=5
 Dma.SPI2_RX.3.Direction=DMA_PERIPH_TO_MEMORY
 Dma.SPI2_RX.3.EventEnable=DISABLE
@@ -247,28 +262,29 @@
 Mcu.CPN=STM32H723ZET6
 Mcu.Family=STM32H7
-Mcu.IP0=ADC1
-Mcu.IP1=CORTEX_M7
-Mcu.IP10=NVIC
-Mcu.IP11=RCC
-Mcu.IP12=RTC
-Mcu.IP13=SDMMC1
-Mcu.IP14=SPI2
-Mcu.IP15=SPI4
-Mcu.IP16=SYS
-Mcu.IP17=TIM3
-Mcu.IP18=TIM6
-Mcu.IP19=TIM8
-Mcu.IP2=DEBUG
-Mcu.IP20=USART2
-Mcu.IP21=USART3
-Mcu.IP22=USART10
-Mcu.IP3=DMA
-Mcu.IP4=FATFS
-Mcu.IP5=FREERTOS
-Mcu.IP6=I2C1
-Mcu.IP7=I2C2
-Mcu.IP8=MDMA
-Mcu.IP9=MEMORYMAP
-Mcu.IPNb=23
+Mcu.IP0=ADC3
+Mcu.IP1=BDMA
+Mcu.IP10=MEMORYMAP
+Mcu.IP11=NVIC
+Mcu.IP12=RCC
+Mcu.IP13=RTC
+Mcu.IP14=SDMMC1
+Mcu.IP15=SPI2
+Mcu.IP16=SPI4
+Mcu.IP17=SYS
+Mcu.IP18=TIM3
+Mcu.IP19=TIM6
+Mcu.IP2=CORTEX_M7
+Mcu.IP20=TIM8
+Mcu.IP21=USART2
+Mcu.IP22=USART3
+Mcu.IP23=USART10
+Mcu.IP3=DEBUG
+Mcu.IP4=DMA
+Mcu.IP5=FATFS
+Mcu.IP6=FREERTOS
+Mcu.IP7=I2C1
+Mcu.IP8=I2C2
+Mcu.IP9=MDMA
+Mcu.IPNb=24
 Mcu.Name=STM32H723ZETx
 Mcu.Package=LQFP144
@@ -326,20 +342,23 @@
 Mcu.Pin55=PB8
 Mcu.Pin56=PB9
-Mcu.Pin57=VP_FATFS_VS_SDIO
-Mcu.Pin58=VP_FREERTOS_VS_CMSIS_V2
-Mcu.Pin59=VP_RTC_VS_RTC_Activate
+Mcu.Pin57=VP_ADC3_TempSens_Input
+Mcu.Pin58=VP_ADC3_Vref_Input
+Mcu.Pin59=VP_ADC3_Vbat_Input
 Mcu.Pin6=PF1
-Mcu.Pin60=VP_RTC_VS_RTC_Calendar
-Mcu.Pin61=VP_SYS_VS_tim7
-Mcu.Pin62=VP_TIM3_VS_ClockSourceINT
-Mcu.Pin63=VP_TIM6_VS_ClockSourceINT
-Mcu.Pin64=VP_TIM8_VS_ControllerModeReset
-Mcu.Pin65=VP_TIM8_VS_ClockSourceINT
-Mcu.Pin66=VP_MEMORYMAP_VS_MEMORYMAP
-Mcu.Pin67=VP_STMicroelectronics.X-CUBE-EEPRMA1_VS_BoardOoPartJjEEPROM_5.1.0_5.1.0
+Mcu.Pin60=VP_FATFS_VS_SDIO
+Mcu.Pin61=VP_FREERTOS_VS_CMSIS_V2
+Mcu.Pin62=VP_RTC_VS_RTC_Activate
+Mcu.Pin63=VP_RTC_VS_RTC_Calendar
+Mcu.Pin64=VP_SYS_VS_tim7
+Mcu.Pin65=VP_TIM3_VS_ClockSourceINT
+Mcu.Pin66=VP_TIM6_VS_ClockSourceINT
+Mcu.Pin67=VP_TIM8_VS_ControllerModeReset
+Mcu.Pin68=VP_TIM8_VS_ClockSourceINT
+Mcu.Pin69=VP_MEMORYMAP_VS_MEMORYMAP
 Mcu.Pin7=PH0-OSC_IN
+Mcu.Pin70=VP_STMicroelectronics.X-CUBE-EEPRMA1_VS_BoardOoPartJjEEPROM_5.1.0_5.1.0
 Mcu.Pin8=PH1-OSC_OUT
 Mcu.Pin9=PC0
-Mcu.PinsNb=68
+Mcu.PinsNb=71
 Mcu.ThirdParty0=STMicroelectronics.X-CUBE-AZRTOS-H7.3.3.0
 Mcu.ThirdParty1=STMicroelectronics.X-CUBE-EEPRMA1.5.1.0
@@ -376,4 +395,5 @@
 MxCube.Version=6.13.0
 MxDb.Version=DB.6.0.130
+NVIC.BDMA_Channel0_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
 NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
 NVIC.DMA1_Stream0_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
@@ -382,5 +402,4 @@
 NVIC.DMA1_Stream3_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
 NVIC.DMA1_Stream4_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
-NVIC.DMA1_Stream5_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
 NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
 NVIC.EXTI9_5_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
@@ -464,4 +483,6 @@
 PB9.Locked=true
 PB9.Signal=GPIO_Output
+PC0.GPIOParameters=GPIO_Label
+PC0.GPIO_Label=U_BAT
 PC0.Locked=true
 PC0.Signal=ADCx_INP10
@@ -659,5 +680,5 @@
 ProjectManager.UAScriptBeforePath=
 ProjectManager.UnderRoot=true
-ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-MX_DMA_Init-DMA-false-HAL-true,3-MX_MDMA_Init-MDMA-false-HAL-true,4-MX_RTC_Init-RTC-false-HAL-true,5-MX_SPI4_Init-SPI4-false-HAL-true,6-MX_SDMMC1_SD_Init-SDMMC1-false-HAL-true,7-MX_USART3_UART_Init-USART3-false-HAL-true,8-MX_TIM3_Init-TIM3-false-HAL-true,9-SystemClock_Config-RCC-false-HAL-false,10-MX_FATFS_Init-FATFS-false-HAL-false,11-MX_TIM8_Init-TIM8-false-HAL-true,12-MX_SPI2_Init-SPI2-false-HAL-true,13-MX_USART2_UART_Init-USART2-false-HAL-true,14-MX_USART10_UART_Init-USART10-false-HAL-true,15-MX_TIM6_Init-TIM6-false-HAL-true,16-MX_I2C1_Init-I2C1-false-HAL-true,17-MX_I2C2_Init-I2C2-false-HAL-true,18-MX_ADC1_Init-ADC1-false-HAL-true,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-MX_DMA_Init-DMA-false-HAL-true,3-MX_MDMA_Init-MDMA-false-HAL-true,4-MX_BDMA_Init-BDMA-false-HAL-true,5-MX_RTC_Init-RTC-false-HAL-true,6-MX_SPI4_Init-SPI4-false-HAL-true,7-MX_SDMMC1_SD_Init-SDMMC1-false-HAL-true,8-MX_USART3_UART_Init-USART3-false-HAL-true,9-SystemClock_Config-RCC-false-HAL-false,10-MX_FATFS_Init-FATFS-false-HAL-false,11-MX_TIM8_Init-TIM8-false-HAL-true,12-MX_SPI2_Init-SPI2-false-HAL-true,13-MX_USART2_UART_Init-USART2-false-HAL-true,14-MX_USART10_UART_Init-USART10-false-HAL-true,15-MX_TIM6_Init-TIM6-false-HAL-true,16-MX_I2C2_Init-I2C2-false-HAL-true,17-MX_ADC3_Init-ADC3-false-HAL-true,18-MX_I2C1_Init-I2C1-false-HAL-true,19-MX_TIM3_Init-TIM3-false-HAL-true,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true
 RCC.ADCCLockSelection=RCC_ADCCLKSOURCE_PLL3
 RCC.ADCFreq_Value=60000000
@@ -754,5 +775,5 @@
 SDMMC1.HardwareFlowControl=SDMMC_HARDWARE_FLOW_CONTROL_ENABLE
 SDMMC1.IPParameters=ClockPowerSave,HardwareFlowControl,ClockDiv
-SH.ADCx_INP10.0=ADC1_INP10,IN10-Single-Ended
+SH.ADCx_INP10.0=ADC3_INP10,IN10-Single-Ended
 SH.ADCx_INP10.ConfNb=1
 SH.GPXTI8.0=GPIO_EXTI8
@@ -834,4 +855,10 @@
 USART3.SwapParam=ADVFEATURE_SWAP_ENABLE
 USART3.VirtualMode-Asynchronous=VM_ASYNC
+VP_ADC3_TempSens_Input.Mode=IN-TempSens
+VP_ADC3_TempSens_Input.Signal=ADC3_TempSens_Input
+VP_ADC3_Vbat_Input.Mode=IN-Vbat
+VP_ADC3_Vbat_Input.Signal=ADC3_Vbat_Input
+VP_ADC3_Vref_Input.Mode=IN-Vrefint
+VP_ADC3_Vref_Input.Signal=ADC3_Vref_Input
 VP_FATFS_VS_SDIO.Mode=SDIO
 VP_FATFS_VS_SDIO.Signal=FATFS_VS_SDIO