Index: ctrl/firmware/Main/CubeMX/Core/Inc/stm32h7xx_it.h
===================================================================
--- ctrl/firmware/Main/CubeMX/Core/Inc/stm32h7xx_it.h	(revision 78)
+++ ctrl/firmware/Main/CubeMX/Core/Inc/stm32h7xx_it.h	(revision 79)
@@ -56,4 +56,6 @@
 void DMA1_Stream1_IRQHandler(void);
 void DMA1_Stream2_IRQHandler(void);
+void DMA1_Stream3_IRQHandler(void);
+void DMA1_Stream4_IRQHandler(void);
 void EXTI9_5_IRQHandler(void);
 void TIM3_IRQHandler(void);
Index: ctrl/firmware/Main/CubeMX/Core/Src/dma.c
===================================================================
--- ctrl/firmware/Main/CubeMX/Core/Src/dma.c	(revision 78)
+++ ctrl/firmware/Main/CubeMX/Core/Src/dma.c	(revision 79)
@@ -53,4 +53,10 @@
   HAL_NVIC_SetPriority(DMA1_Stream2_IRQn, 5, 0);
   HAL_NVIC_EnableIRQ(DMA1_Stream2_IRQn);
+  /* DMA1_Stream3_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(DMA1_Stream3_IRQn, 5, 0);
+  HAL_NVIC_EnableIRQ(DMA1_Stream3_IRQn);
+  /* DMA1_Stream4_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(DMA1_Stream4_IRQn, 5, 0);
+  HAL_NVIC_EnableIRQ(DMA1_Stream4_IRQn);
 
 }
Index: ctrl/firmware/Main/CubeMX/Core/Src/freertos.c
===================================================================
--- ctrl/firmware/Main/CubeMX/Core/Src/freertos.c	(revision 78)
+++ ctrl/firmware/Main/CubeMX/Core/Src/freertos.c	(revision 79)
@@ -30,4 +30,5 @@
 
 #include "keys_task.h"
+#include "eth_task.h"
 
 /* USER CODE END Includes */
@@ -43,4 +44,5 @@
 
 #define KEYS_TASK_STACK_DEPTH_WORDS				  (128U)
+#define ETH_TASK_STACK_DEPTH_WORDS				  (2048U)
 
 /* USER CODE END PD */
@@ -55,6 +57,9 @@
 
 static StackType_t keysTaskStackBuffer[KEYS_TASK_STACK_DEPTH_WORDS]				__attribute__((section(".DTCM_RAM")));
+static StackType_t ethTaskStackBuffer[ETH_TASK_STACK_DEPTH_WORDS]				__attribute__((section(".DTCM_RAM")));
 static StaticTask_t keysTaskBuffer;
+static StaticTask_t ethTaskBuffer;
 static const char* const keysTaskName = "ScanKeysTask";
+static const char* const ethTaskName = "EthTask";
 
 /* USER CODE END Variables */
@@ -141,4 +146,7 @@
   if (r == NULL) printf("Cannot create %s!\n", keysTaskName);
 
+  r = xTaskCreateStatic(ethTaskStart, ethTaskName, ETH_TASK_STACK_DEPTH_WORDS, NULL, 25, ethTaskStackBuffer, &ethTaskBuffer);
+  if (r == NULL) printf("Cannot create %s!\n", ethTaskName);
+
   /* USER CODE END RTOS_THREADS */
 
Index: ctrl/firmware/Main/CubeMX/Core/Src/spi.c
===================================================================
--- ctrl/firmware/Main/CubeMX/Core/Src/spi.c	(revision 78)
+++ ctrl/firmware/Main/CubeMX/Core/Src/spi.c	(revision 79)
@@ -27,4 +27,6 @@
 SPI_HandleTypeDef hspi2;
 SPI_HandleTypeDef hspi4;
+DMA_HandleTypeDef hdma_spi2_rx;
+DMA_HandleTypeDef hdma_spi2_tx;
 DMA_HandleTypeDef hdma_spi4_tx;
 
@@ -44,6 +46,6 @@
   hspi2.Init.Direction = SPI_DIRECTION_2LINES;
   hspi2.Init.DataSize = SPI_DATASIZE_8BIT;
-  hspi2.Init.CLKPolarity = SPI_POLARITY_HIGH;
-  hspi2.Init.CLKPhase = SPI_PHASE_2EDGE;
+  hspi2.Init.CLKPolarity = SPI_POLARITY_LOW;
+  hspi2.Init.CLKPhase = SPI_PHASE_1EDGE;
   hspi2.Init.NSS = SPI_NSS_SOFT;
   hspi2.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_256;
@@ -158,4 +160,41 @@
     HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 
+    /* SPI2 DMA Init */
+    /* SPI2_RX Init */
+    hdma_spi2_rx.Instance = DMA1_Stream3;
+    hdma_spi2_rx.Init.Request = DMA_REQUEST_SPI2_RX;
+    hdma_spi2_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
+    hdma_spi2_rx.Init.PeriphInc = DMA_PINC_DISABLE;
+    hdma_spi2_rx.Init.MemInc = DMA_MINC_ENABLE;
+    hdma_spi2_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
+    hdma_spi2_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
+    hdma_spi2_rx.Init.Mode = DMA_NORMAL;
+    hdma_spi2_rx.Init.Priority = DMA_PRIORITY_HIGH;
+    hdma_spi2_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
+    if (HAL_DMA_Init(&hdma_spi2_rx) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    __HAL_LINKDMA(spiHandle,hdmarx,hdma_spi2_rx);
+
+    /* SPI2_TX Init */
+    hdma_spi2_tx.Instance = DMA1_Stream4;
+    hdma_spi2_tx.Init.Request = DMA_REQUEST_SPI2_TX;
+    hdma_spi2_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
+    hdma_spi2_tx.Init.PeriphInc = DMA_PINC_DISABLE;
+    hdma_spi2_tx.Init.MemInc = DMA_MINC_ENABLE;
+    hdma_spi2_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
+    hdma_spi2_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
+    hdma_spi2_tx.Init.Mode = DMA_NORMAL;
+    hdma_spi2_tx.Init.Priority = DMA_PRIORITY_HIGH;
+    hdma_spi2_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
+    if (HAL_DMA_Init(&hdma_spi2_tx) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    __HAL_LINKDMA(spiHandle,hdmatx,hdma_spi2_tx);
+
     /* SPI2 interrupt Init */
     HAL_NVIC_SetPriority(SPI2_IRQn, 5, 0);
@@ -242,4 +281,8 @@
     HAL_GPIO_DeInit(GPIOB, ETH_SPI_SCK_Pin|ETH_SPI_MISO_Pin|ETH_SPI_MOSI_Pin);
 
+    /* SPI2 DMA DeInit */
+    HAL_DMA_DeInit(spiHandle->hdmarx);
+    HAL_DMA_DeInit(spiHandle->hdmatx);
+
     /* SPI2 interrupt Deinit */
     HAL_NVIC_DisableIRQ(SPI2_IRQn);
Index: ctrl/firmware/Main/CubeMX/Core/Src/stm32h7xx_it.c
===================================================================
--- ctrl/firmware/Main/CubeMX/Core/Src/stm32h7xx_it.c	(revision 78)
+++ ctrl/firmware/Main/CubeMX/Core/Src/stm32h7xx_it.c	(revision 79)
@@ -61,4 +61,6 @@
 /* External variables --------------------------------------------------------*/
 extern SD_HandleTypeDef hsd1;
+extern DMA_HandleTypeDef hdma_spi2_rx;
+extern DMA_HandleTypeDef hdma_spi2_tx;
 extern DMA_HandleTypeDef hdma_spi4_tx;
 extern SPI_HandleTypeDef hspi2;
@@ -216,4 +218,32 @@
 
 /**
+  * @brief This function handles DMA1 stream3 global interrupt.
+  */
+void DMA1_Stream3_IRQHandler(void)
+{
+  /* USER CODE BEGIN DMA1_Stream3_IRQn 0 */
+
+  /* USER CODE END DMA1_Stream3_IRQn 0 */
+  HAL_DMA_IRQHandler(&hdma_spi2_rx);
+  /* USER CODE BEGIN DMA1_Stream3_IRQn 1 */
+
+  /* USER CODE END DMA1_Stream3_IRQn 1 */
+}
+
+/**
+  * @brief This function handles DMA1 stream4 global interrupt.
+  */
+void DMA1_Stream4_IRQHandler(void)
+{
+  /* USER CODE BEGIN DMA1_Stream4_IRQn 0 */
+
+  /* USER CODE END DMA1_Stream4_IRQn 0 */
+  HAL_DMA_IRQHandler(&hdma_spi2_tx);
+  /* USER CODE BEGIN DMA1_Stream4_IRQn 1 */
+
+  /* USER CODE END DMA1_Stream4_IRQn 1 */
+}
+
+/**
   * @brief This function handles EXTI line[9:5] interrupts.
   */
Index: ctrl/firmware/Main/CubeMX/charger.ioc
===================================================================
--- ctrl/firmware/Main/CubeMX/charger.ioc	(revision 78)
+++ ctrl/firmware/Main/CubeMX/charger.ioc	(revision 79)
@@ -11,5 +11,43 @@
 Dma.Request1=USART3_RX
 Dma.Request2=USART3_TX
-Dma.RequestsNb=3
+Dma.Request3=SPI2_RX
+Dma.Request4=SPI2_TX
+Dma.RequestsNb=5
+Dma.SPI2_RX.3.Direction=DMA_PERIPH_TO_MEMORY
+Dma.SPI2_RX.3.EventEnable=DISABLE
+Dma.SPI2_RX.3.FIFOMode=DMA_FIFOMODE_DISABLE
+Dma.SPI2_RX.3.Instance=DMA1_Stream3
+Dma.SPI2_RX.3.MemDataAlignment=DMA_MDATAALIGN_BYTE
+Dma.SPI2_RX.3.MemInc=DMA_MINC_ENABLE
+Dma.SPI2_RX.3.Mode=DMA_NORMAL
+Dma.SPI2_RX.3.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
+Dma.SPI2_RX.3.PeriphInc=DMA_PINC_DISABLE
+Dma.SPI2_RX.3.Polarity=HAL_DMAMUX_REQ_GEN_RISING
+Dma.SPI2_RX.3.Priority=DMA_PRIORITY_HIGH
+Dma.SPI2_RX.3.RequestNumber=1
+Dma.SPI2_RX.3.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
+Dma.SPI2_RX.3.SignalID=NONE
+Dma.SPI2_RX.3.SyncEnable=DISABLE
+Dma.SPI2_RX.3.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
+Dma.SPI2_RX.3.SyncRequestNumber=1
+Dma.SPI2_RX.3.SyncSignalID=NONE
+Dma.SPI2_TX.4.Direction=DMA_MEMORY_TO_PERIPH
+Dma.SPI2_TX.4.EventEnable=DISABLE
+Dma.SPI2_TX.4.FIFOMode=DMA_FIFOMODE_DISABLE
+Dma.SPI2_TX.4.Instance=DMA1_Stream4
+Dma.SPI2_TX.4.MemDataAlignment=DMA_MDATAALIGN_BYTE
+Dma.SPI2_TX.4.MemInc=DMA_MINC_ENABLE
+Dma.SPI2_TX.4.Mode=DMA_NORMAL
+Dma.SPI2_TX.4.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
+Dma.SPI2_TX.4.PeriphInc=DMA_PINC_DISABLE
+Dma.SPI2_TX.4.Polarity=HAL_DMAMUX_REQ_GEN_RISING
+Dma.SPI2_TX.4.Priority=DMA_PRIORITY_HIGH
+Dma.SPI2_TX.4.RequestNumber=1
+Dma.SPI2_TX.4.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
+Dma.SPI2_TX.4.SignalID=NONE
+Dma.SPI2_TX.4.SyncEnable=DISABLE
+Dma.SPI2_TX.4.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
+Dma.SPI2_TX.4.SyncRequestNumber=1
+Dma.SPI2_TX.4.SyncSignalID=NONE
 Dma.SPI4_TX.0.Direction=DMA_MEMORY_TO_PERIPH
 Dma.SPI4_TX.0.EventEnable=DISABLE
@@ -248,4 +286,6 @@
 NVIC.DMA1_Stream1_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
 NVIC.DMA1_Stream2_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
+NVIC.DMA1_Stream3_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
+NVIC.DMA1_Stream4_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
 NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
 NVIC.EXTI9_5_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true