Index: ctrl/firmware/Main/SES/Output/Debug/Exe/charger.hex
===================================================================
--- ctrl/firmware/Main/SES/Output/Debug/Exe/charger.hex (revision 71)
+++ ctrl/firmware/Main/SES/Output/Debug/Exe/charger.hex (revision 72)
@@ -4382,5 +4382,5 @@
:100C880050726F6772616D207374617274202825C9
:090C9800732C202573292E0A009B
-:090CA10031363A31303A313900A4
+:090CA10031363A31333A323700A2
:050CAA002D494E46003B
:050CAF002D696E6600D6
Index: ctrl/firmware/Main/SES/Output/Debug/Exe/charger.htm
===================================================================
--- ctrl/firmware/Main/SES/Output/Debug/Exe/charger.htm (revision 71)
+++ ctrl/firmware/Main/SES/Output/Debug/Exe/charger.htm (revision 72)
@@ -19974,18 +19974,12 @@
Section .vectors from stm32h723xx_Vectors.o, size=716, align=1024
-
_vectors:
+
_vectors:
0x08000000: 20020000 DC.W 0x20020000 ; R_ARM_ABS32
- 0x08000004: 08010449 DC.W Reset_Handler
- 0x08000008: 080002CF DC.W NMI_Handler
- 0x0800000C: 080002CF DC.W NMI_Handler
- 0x08000010: 080002CF DC.W NMI_Handler
- 0x08000014: 080002CF DC.W NMI_Handler
- 0x08000018: 080002CF DC.W NMI_Handler
+ 0x08000004: 08010449 DC.W Reset_Handler
+ 0x08000008: 080002CF DC.W NMI_Handler
+ 0x0800000C: 080002CF DC.W NMI_Handler
+ 0x08000010: 080002CF DC.W NMI_Handler
+ 0x08000014: 080002CF DC.W NMI_Handler
+ 0x08000018: 080002CF DC.W NMI_Handler
0x0800001C: 00 DC.B 0x00 ; '\0'
0x0800001D: 00 DC.B 0x00 ; '\0'
@@ -20012,128 +20006,77 @@
0x08000038: 080002CD DC.W DoNothing()
0x0800003C: 080002CD DC.W DoNothing()
- 0x08000040: 080002CF DC.W NMI_Handler
- 0x08000044: 080002CF DC.W NMI_Handler
- 0x08000048: 080002CF DC.W NMI_Handler
- 0x0800004C: 080002CF DC.W NMI_Handler
- 0x08000050: 080002CF DC.W NMI_Handler
- 0x08000054: 080002CF DC.W NMI_Handler
- 0x08000058: 080002CF DC.W NMI_Handler
- 0x0800005C: 080002CF DC.W NMI_Handler
- 0x08000060: 080002CF DC.W NMI_Handler
- 0x08000064: 080002CF DC.W NMI_Handler
- 0x08000068: 080002CF DC.W NMI_Handler
- 0x0800006C: 0800D4F1 DC.W DMA1_Stream0_IRQHandler
- 0x08000070: 0800D501 DC.W DMA1_Stream1_IRQHandler
- 0x08000074: 0800D511 DC.W DMA1_Stream2_IRQHandler
- 0x08000078: 080002CF DC.W NMI_Handler
- 0x0800007C: 080002CF DC.W NMI_Handler
- 0x08000080: 080002CF DC.W NMI_Handler
- 0x08000084: 080002CF DC.W NMI_Handler
- 0x08000088: 080002CF DC.W NMI_Handler
- 0x0800008C: 080002CF DC.W NMI_Handler
- 0x08000090: 080002CF DC.W NMI_Handler
- 0x08000094: 080002CF DC.W NMI_Handler
- 0x08000098: 080002CF DC.W NMI_Handler
- 0x0800009C: 080002CF DC.W NMI_Handler
- 0x080000A0: 080002CF DC.W NMI_Handler
- 0x080000A4: 080002CF DC.W NMI_Handler
- 0x080000A8: 080002CF DC.W NMI_Handler
- 0x080000AC: 080002CF DC.W NMI_Handler
- 0x080000B0: 080002CF DC.W NMI_Handler
- 0x080000B4: 0800D521 DC.W TIM3_IRQHandler
- 0x080000B8: 080002CF DC.W NMI_Handler
- 0x080000BC: 080002CF DC.W NMI_Handler
- 0x080000C0: 080002CF DC.W NMI_Handler
- 0x080000C4: 080002CF DC.W NMI_Handler
- 0x080000C8: 080002CF DC.W NMI_Handler
- 0x080000CC: 080002CF DC.W NMI_Handler
- 0x080000D0: 080002CF DC.W NMI_Handler
- 0x080000D4: 080002CF DC.W NMI_Handler
- 0x080000D8: 080002CF DC.W NMI_Handler
- 0x080000DC: 0800D531 DC.W USART3_IRQHandler
- 0x080000E0: 080002CF DC.W NMI_Handler
- 0x080000E4: 080002CF DC.W NMI_Handler
+ 0x08000040: 080002CF DC.W NMI_Handler
+ 0x08000044: 080002CF DC.W NMI_Handler
+ 0x08000048: 080002CF DC.W NMI_Handler
+ 0x0800004C: 080002CF DC.W NMI_Handler
+ 0x08000050: 080002CF DC.W NMI_Handler
+ 0x08000054: 080002CF DC.W NMI_Handler
+ 0x08000058: 080002CF DC.W NMI_Handler
+ 0x0800005C: 080002CF DC.W NMI_Handler
+ 0x08000060: 080002CF DC.W NMI_Handler
+ 0x08000064: 080002CF DC.W NMI_Handler
+ 0x08000068: 080002CF DC.W NMI_Handler
+ 0x0800006C: 0800D4F1 DC.W DMA1_Stream0_IRQHandler
+ 0x08000070: 0800D501 DC.W DMA1_Stream1_IRQHandler
+ 0x08000074: 0800D511 DC.W DMA1_Stream2_IRQHandler
+ 0x08000078: 080002CF DC.W NMI_Handler
+ 0x0800007C: 080002CF DC.W NMI_Handler
+ 0x08000080: 080002CF DC.W NMI_Handler
+ 0x08000084: 080002CF DC.W NMI_Handler
+ 0x08000088: 080002CF DC.W NMI_Handler
+ 0x0800008C: 080002CF DC.W NMI_Handler
+ 0x08000090: 080002CF DC.W NMI_Handler
+ 0x08000094: 080002CF DC.W NMI_Handler
+ 0x08000098: 080002CF DC.W NMI_Handler
+ 0x0800009C: 080002CF DC.W NMI_Handler
+ 0x080000A0: 080002CF DC.W NMI_Handler
+ 0x080000A4: 080002CF DC.W NMI_Handler
+ 0x080000A8: 080002CF DC.W NMI_Handler
+ 0x080000AC: 080002CF DC.W NMI_Handler
+ 0x080000B0: 080002CF DC.W NMI_Handler
+ 0x080000B4: 0800D521 DC.W TIM3_IRQHandler
+ 0x080000B8: 080002CF DC.W NMI_Handler
+ 0x080000BC: 080002CF DC.W NMI_Handler
+ 0x080000C0: 080002CF DC.W NMI_Handler
+ 0x080000C4: 080002CF DC.W NMI_Handler
+ 0x080000C8: 080002CF DC.W NMI_Handler
+ 0x080000CC: 080002CF DC.W NMI_Handler
+ 0x080000D0: 080002CF DC.W NMI_Handler
+ 0x080000D4: 080002CF DC.W NMI_Handler
+ 0x080000D8: 080002CF DC.W NMI_Handler
+ 0x080000DC: 0800D531 DC.W USART3_IRQHandler
+ 0x080000E0: 080002CF DC.W NMI_Handler
+ 0x080000E4: 080002CF DC.W NMI_Handler
0x080000E8: 00 DC.B 0x00 ; '\0'
0x080000E9: 00 DC.B 0x00 ; '\0'
0x080000EA: 00 DC.B 0x00 ; '\0'
0x080000EB: 00 DC.B 0x00 ; '\0'
- 0x080000EC: 080002CF DC.W NMI_Handler
- 0x080000F0: 080002CF DC.W NMI_Handler
- 0x080000F4: 080002CF DC.W NMI_Handler
- 0x080000F8: 0800D541 DC.W TIM8_CC_IRQHandler
- 0x080000FC: 080002CF DC.W NMI_Handler
- 0x08000100: 080002CF DC.W NMI_Handler
- 0x08000104: 0800D551 DC.W SDMMC1_IRQHandler
- 0x08000108: 080002CF DC.W NMI_Handler
- 0x0800010C: 080002CF DC.W NMI_Handler
- 0x08000110: 080002CF DC.W NMI_Handler
- 0x08000114: 080002CF DC.W NMI_Handler
- 0x08000118: 080002CF DC.W NMI_Handler
- 0x0800011C: 0800D561 DC.W TIM7_IRQHandler
- 0x08000120: 080002CF DC.W NMI_Handler
- 0x08000124: 080002CF DC.W NMI_Handler
- 0x08000128: 080002CF DC.W NMI_Handler
- 0x0800012C: 080002CF DC.W NMI_Handler
- 0x08000130: 080002CF DC.W NMI_Handler
- 0x08000134: 080002CF DC.W NMI_Handler
- 0x08000138: 080002CF DC.W NMI_Handler
- 0x0800013C: 080002CF DC.W NMI_Handler
+ 0x080000EC: 080002CF DC.W NMI_Handler
+ 0x080000F0: 080002CF DC.W NMI_Handler
+ 0x080000F4: 080002CF DC.W NMI_Handler
+ 0x080000F8: 0800D541 DC.W TIM8_CC_IRQHandler
+ 0x080000FC: 080002CF DC.W NMI_Handler
+ 0x08000100: 080002CF DC.W NMI_Handler
+ 0x08000104: 0800D551 DC.W SDMMC1_IRQHandler
+ 0x08000108: 080002CF DC.W NMI_Handler
+ 0x0800010C: 080002CF DC.W NMI_Handler
+ 0x08000110: 080002CF DC.W NMI_Handler
+ 0x08000114: 080002CF DC.W NMI_Handler
+ 0x08000118: 080002CF DC.W NMI_Handler
+ 0x0800011C: 0800D561 DC.W TIM7_IRQHandler
+ 0x08000120: 080002CF DC.W NMI_Handler
+ 0x08000124: 080002CF DC.W NMI_Handler
+ 0x08000128: 080002CF DC.W NMI_Handler
+ 0x0800012C: 080002CF DC.W NMI_Handler
+ 0x08000130: 080002CF DC.W NMI_Handler
+ 0x08000134: 080002CF DC.W NMI_Handler
+ 0x08000138: 080002CF DC.W NMI_Handler
+ 0x0800013C: 080002CF DC.W NMI_Handler
0x08000140: 00 DC.B 0x00 ; '\0'
0x08000141: 00 DC.B 0x00 ; '\0'
@@ -20152,68 +20095,40 @@
0x0800014E: 00 DC.B 0x00 ; '\0'
0x0800014F: 00 DC.B 0x00 ; '\0'
- 0x08000150: 080002CF DC.W NMI_Handler
- 0x08000154: 080002CF DC.W NMI_Handler
- 0x08000158: 080002CF DC.W NMI_Handler
- 0x0800015C: 080002CF DC.W NMI_Handler
- 0x08000160: 080002CF DC.W NMI_Handler
- 0x08000164: 080002CF DC.W NMI_Handler
- 0x08000168: 080002CF DC.W NMI_Handler
- 0x0800016C: 080002CF DC.W NMI_Handler
- 0x08000170: 080002CF DC.W NMI_Handler
- 0x08000174: 080002CF DC.W NMI_Handler
- 0x08000178: 080002CF DC.W NMI_Handler
+ 0x08000150: 080002CF DC.W NMI_Handler
+ 0x08000154: 080002CF DC.W NMI_Handler
+ 0x08000158: 080002CF DC.W NMI_Handler
+ 0x0800015C: 080002CF DC.W NMI_Handler
+ 0x08000160: 080002CF DC.W NMI_Handler
+ 0x08000164: 080002CF DC.W NMI_Handler
+ 0x08000168: 080002CF DC.W NMI_Handler
+ 0x0800016C: 080002CF DC.W NMI_Handler
+ 0x08000170: 080002CF DC.W NMI_Handler
+ 0x08000174: 080002CF DC.W NMI_Handler
+ 0x08000178: 080002CF DC.W NMI_Handler
0x0800017C: 00 DC.B 0x00 ; '\0'
0x0800017D: 00 DC.B 0x00 ; '\0'
0x0800017E: 00 DC.B 0x00 ; '\0'
0x0800017F: 00 DC.B 0x00 ; '\0'
- 0x08000180: 080002CF DC.W NMI_Handler
- 0x08000184: 080002CF DC.W NMI_Handler
- 0x08000188: 080002CF DC.W NMI_Handler
- 0x0800018C: 080002CF DC.W NMI_Handler
- 0x08000190: 0800D571 DC.W SPI4_IRQHandler
- 0x08000194: 080002CF DC.W NMI_Handler
- 0x08000198: 080002CF DC.W NMI_Handler
- 0x0800019C: 080002CF DC.W NMI_Handler
- 0x080001A0: 080002CF DC.W NMI_Handler
- 0x080001A4: 080002CF DC.W NMI_Handler
- 0x080001A8: 080002CF DC.W NMI_Handler
+ 0x08000180: 080002CF DC.W NMI_Handler
+ 0x08000184: 080002CF DC.W NMI_Handler
+ 0x08000188: 080002CF DC.W NMI_Handler
+ 0x0800018C: 080002CF DC.W NMI_Handler
+ 0x08000190: 0800D571 DC.W SPI4_IRQHandler
+ 0x08000194: 080002CF DC.W NMI_Handler
+ 0x08000198: 080002CF DC.W NMI_Handler
+ 0x0800019C: 080002CF DC.W NMI_Handler
+ 0x080001A0: 080002CF DC.W NMI_Handler
+ 0x080001A4: 080002CF DC.W NMI_Handler
+ 0x080001A8: 080002CF DC.W NMI_Handler
0x080001AC: 00 DC.B 0x00 ; '\0'
0x080001AD: 00 DC.B 0x00 ; '\0'
0x080001AE: 00 DC.B 0x00 ; '\0'
0x080001AF: 00 DC.B 0x00 ; '\0'
- 0x080001B0: 080002CF DC.W NMI_Handler
- 0x080001B4: 080002CF DC.W NMI_Handler
- 0x080001B8: 080002CF DC.W NMI_Handler
- 0x080001BC: 080002CF DC.W NMI_Handler
- 0x080001C0: 080002CF DC.W NMI_Handler
- 0x080001C4: 080002CF DC.W NMI_Handler
+ 0x080001B0: 080002CF DC.W NMI_Handler
+ 0x080001B4: 080002CF DC.W NMI_Handler
+ 0x080001B8: 080002CF DC.W NMI_Handler
+ 0x080001BC: 080002CF DC.W NMI_Handler
+ 0x080001C0: 080002CF DC.W NMI_Handler
+ 0x080001C4: 080002CF DC.W NMI_Handler
0x080001C8: 00 DC.B 0x00 ; '\0'
0x080001C9: 00 DC.B 0x00 ; '\0'
@@ -20232,6 +20147,5 @@
0x080001D6: 00 DC.B 0x00 ; '\0'
0x080001D7: 00 DC.B 0x00 ; '\0'
- 0x080001D8: 080002CF DC.W NMI_Handler
+ 0x080001D8: 080002CF DC.W NMI_Handler
0x080001DC: 00 DC.B 0x00 ; '\0'
0x080001DD: 00 DC.B 0x00 ; '\0'
@@ -20262,98 +20176,63 @@
0x080001F6: 00 DC.B 0x00 ; '\0'
0x080001F7: 00 DC.B 0x00 ; '\0'
- 0x080001F8: 080002CF DC.W NMI_Handler
- 0x080001FC: 080002CF DC.W NMI_Handler
- 0x08000200: 080002CF DC.W NMI_Handler
- 0x08000204: 080002CF DC.W NMI_Handler
+ 0x080001F8: 080002CF DC.W NMI_Handler
+ 0x080001FC: 080002CF DC.W NMI_Handler
+ 0x08000200: 080002CF DC.W NMI_Handler
+ 0x08000204: 080002CF DC.W NMI_Handler
0x08000208: 00 DC.B 0x00 ; '\0'
0x08000209: 00 DC.B 0x00 ; '\0'
0x0800020A: 00 DC.B 0x00 ; '\0'
0x0800020B: 00 DC.B 0x00 ; '\0'
- 0x0800020C: 080002CF DC.W NMI_Handler
- 0x08000210: 080002CF DC.W NMI_Handler
- 0x08000214: 080002CF DC.W NMI_Handler
- 0x08000218: 080002CF DC.W NMI_Handler
- 0x0800021C: 080002CF DC.W NMI_Handler
- 0x08000220: 080002CF DC.W NMI_Handler
+ 0x0800020C: 080002CF DC.W NMI_Handler
+ 0x08000210: 080002CF DC.W NMI_Handler
+ 0x08000214: 080002CF DC.W NMI_Handler
+ 0x08000218: 080002CF DC.W NMI_Handler
+ 0x0800021C: 080002CF DC.W NMI_Handler
+ 0x08000220: 080002CF DC.W NMI_Handler
0x08000224: 00 DC.B 0x00 ; '\0'
0x08000225: 00 DC.B 0x00 ; '\0'
0x08000226: 00 DC.B 0x00 ; '\0'
0x08000227: 00 DC.B 0x00 ; '\0'
- 0x08000228: 080002CF DC.W NMI_Handler
+ 0x08000228: 080002CF DC.W NMI_Handler
0x0800022C: 00 DC.B 0x00 ; '\0'
0x0800022D: 00 DC.B 0x00 ; '\0'
0x0800022E: 00 DC.B 0x00 ; '\0'
0x0800022F: 00 DC.B 0x00 ; '\0'
- 0x08000230: 080002CF DC.W NMI_Handler
- 0x08000234: 080002CF DC.W NMI_Handler
+ 0x08000230: 080002CF DC.W NMI_Handler
+ 0x08000234: 080002CF DC.W NMI_Handler
0x08000238: 00 DC.B 0x00 ; '\0'
0x08000239: 00 DC.B 0x00 ; '\0'
0x0800023A: 00 DC.B 0x00 ; '\0'
0x0800023B: 00 DC.B 0x00 ; '\0'
- 0x0800023C: 080002CF DC.W NMI_Handler
- 0x08000240: 080002CF DC.W NMI_Handler
- 0x08000244: 080002CF DC.W NMI_Handler
- 0x08000248: 080002CF DC.W NMI_Handler
- 0x0800024C: 080002CF DC.W NMI_Handler
- 0x08000250: 080002CF DC.W NMI_Handler
- 0x08000254: 080002CF DC.W NMI_Handler
- 0x08000258: 080002CF DC.W NMI_Handler
- 0x0800025C: 080002CF DC.W NMI_Handler
- 0x08000260: 080002CF DC.W NMI_Handler
- 0x08000264: 080002CF DC.W NMI_Handler
- 0x08000268: 080002CF DC.W NMI_Handler
- 0x0800026C: 080002CF DC.W NMI_Handler
- 0x08000270: 080002CF DC.W NMI_Handler
- 0x08000274: 080002CF DC.W NMI_Handler
- 0x08000278: 080002CF DC.W NMI_Handler
+ 0x0800023C: 080002CF DC.W NMI_Handler
+ 0x08000240: 080002CF DC.W NMI_Handler
+ 0x08000244: 080002CF DC.W NMI_Handler
+ 0x08000248: 080002CF DC.W NMI_Handler
+ 0x0800024C: 080002CF DC.W NMI_Handler
+ 0x08000250: 080002CF DC.W NMI_Handler
+ 0x08000254: 080002CF DC.W NMI_Handler
+ 0x08000258: 080002CF DC.W NMI_Handler
+ 0x0800025C: 080002CF DC.W NMI_Handler
+ 0x08000260: 080002CF DC.W NMI_Handler
+ 0x08000264: 080002CF DC.W NMI_Handler
+ 0x08000268: 080002CF DC.W NMI_Handler
+ 0x0800026C: 080002CF DC.W NMI_Handler
+ 0x08000270: 080002CF DC.W NMI_Handler
+ 0x08000274: 080002CF DC.W NMI_Handler
+ 0x08000278: 080002CF DC.W NMI_Handler
0x0800027C: 00 DC.B 0x00 ; '\0'
0x0800027D: 00 DC.B 0x00 ; '\0'
0x0800027E: 00 DC.B 0x00 ; '\0'
0x0800027F: 00 DC.B 0x00 ; '\0'
- 0x08000280: 080002CF DC.W NMI_Handler
- 0x08000284: 080002CF DC.W NMI_Handler
- 0x08000288: 080002CF DC.W NMI_Handler
- 0x0800028C: 080002CF DC.W NMI_Handler
+ 0x08000280: 080002CF DC.W NMI_Handler
+ 0x08000284: 080002CF DC.W NMI_Handler
+ 0x08000288: 080002CF DC.W NMI_Handler
+ 0x0800028C: 080002CF DC.W NMI_Handler
0x08000290: 00 DC.B 0x00 ; '\0'
0x08000291: 00 DC.B 0x00 ; '\0'
0x08000292: 00 DC.B 0x00 ; '\0'
0x08000293: 00 DC.B 0x00 ; '\0'
- 0x08000294: 080002CF DC.W NMI_Handler
- 0x08000298: 080002CF DC.W NMI_Handler
+ 0x08000294: 080002CF DC.W NMI_Handler
+ 0x08000298: 080002CF DC.W NMI_Handler
0x0800029C: 00 DC.B 0x00 ; '\0'
0x0800029D: 00 DC.B 0x00 ; '\0'
@@ -20364,179 +20243,171 @@
0x080002A2: 00 DC.B 0x00 ; '\0'
0x080002A3: 00 DC.B 0x00 ; '\0'
- 0x080002A4: 080002CF DC.W NMI_Handler
- 0x080002A8: 080002CF DC.W NMI_Handler
- 0x080002AC: 080002CF DC.W NMI_Handler
- 0x080002B0: 080002CF DC.W NMI_Handler
- 0x080002B4: 080002CF DC.W NMI_Handler
- 0x080002B8: 080002CF DC.W NMI_Handler
- 0x080002BC: 080002CF DC.W NMI_Handler
- 0x080002C0: 080002CF DC.W NMI_Handler
- 0x080002C4: 080002CF DC.W NMI_Handler
- 0x080002C8: 080002CF DC.W NMI_Handler
+ 0x080002A4: 080002CF DC.W NMI_Handler
+ 0x080002A8: 080002CF DC.W NMI_Handler
+ 0x080002AC: 080002CF DC.W NMI_Handler
+ 0x080002B0: 080002CF DC.W NMI_Handler
+ 0x080002B4: 080002CF DC.W NMI_Handler
+ 0x080002B8: 080002CF DC.W NMI_Handler
+ 0x080002BC: 080002CF DC.W NMI_Handler
+ 0x080002C0: 080002CF DC.W NMI_Handler
+ 0x080002C4: 080002CF DC.W NMI_Handler
+ 0x080002C8: 080002CF DC.W NMI_Handler
Section .text.DoNothing() from charger_lto.o, size=2, align=2
-
DoNothing():
-SVC_Handler:
-DebugMon_Handler:
-PendSV_Handler:
-SysTick_Handler:
-_vectors_end:
+
DoNothing():
+SVC_Handler:
+DebugMon_Handler:
+PendSV_Handler:
+SysTick_Handler:
+_vectors_end:
0x080002CC: 4770 BX LR ; Dedupe identical section .text.SysTick_Handler
Section .text.NMI_Handler from charger_lto.o, size=2, align=2
-
NMI_Handler:
-HardFault_Handler:
+
NMI_Handler:
+HardFault_Handler:
MemManage_Handler:
-BusFault_Handler:
-UsageFault_Handler:
-WWDG_IRQHandler:
-PVD_AVD_IRQHandler:
-TAMP_STAMP_IRQHandler:
-RTC_WKUP_IRQHandler:
-FLASH_IRQHandler:
-RCC_IRQHandler:
-EXTI0_IRQHandler:
-EXTI1_IRQHandler:
-EXTI2_IRQHandler:
-EXTI3_IRQHandler:
-EXTI4_IRQHandler:
-DMA1_Stream3_IRQHandler:
-DMA1_Stream4_IRQHandler:
-DMA1_Stream5_IRQHandler:
-DMA1_Stream6_IRQHandler:
-ADC_IRQHandler:
-FDCAN1_IT0_IRQHandler:
-FDCAN2_IT0_IRQHandler:
-FDCAN1_IT1_IRQHandler:
-FDCAN2_IT1_IRQHandler:
-EXTI9_5_IRQHandler:
-TIM1_BRK_IRQHandler:
-TIM1_UP_IRQHandler:
-TIM1_TRG_COM_IRQHandler:
-TIM1_CC_IRQHandler:
-TIM2_IRQHandler:
-TIM4_IRQHandler:
-I2C1_EV_IRQHandler:
-I2C1_ER_IRQHandler:
-I2C2_EV_IRQHandler:
-I2C2_ER_IRQHandler:
-SPI1_IRQHandler:
-SPI2_IRQHandler:
-USART1_IRQHandler:
-USART2_IRQHandler:
-EXTI15_10_IRQHandler:
-RTC_Alarm_IRQHandler:
-TIM8_BRK_TIM12_IRQHandler:
-TIM8_UP_TIM13_IRQHandler:
+BusFault_Handler:
+UsageFault_Handler:
+WWDG_IRQHandler:
+PVD_AVD_IRQHandler:
+TAMP_STAMP_IRQHandler:
+RTC_WKUP_IRQHandler:
+FLASH_IRQHandler:
+RCC_IRQHandler:
+EXTI0_IRQHandler:
+EXTI1_IRQHandler:
+EXTI2_IRQHandler:
+EXTI3_IRQHandler:
+EXTI4_IRQHandler:
+DMA1_Stream3_IRQHandler:
+DMA1_Stream4_IRQHandler:
+DMA1_Stream5_IRQHandler:
+DMA1_Stream6_IRQHandler:
+ADC_IRQHandler:
+FDCAN1_IT0_IRQHandler:
+FDCAN2_IT0_IRQHandler:
+FDCAN1_IT1_IRQHandler:
+FDCAN2_IT1_IRQHandler:
+EXTI9_5_IRQHandler:
+TIM1_BRK_IRQHandler:
+TIM1_UP_IRQHandler:
+TIM1_TRG_COM_IRQHandler:
+TIM1_CC_IRQHandler:
+TIM2_IRQHandler:
+TIM4_IRQHandler:
+I2C1_EV_IRQHandler:
+I2C1_ER_IRQHandler:
+I2C2_EV_IRQHandler:
+I2C2_ER_IRQHandler:
+SPI1_IRQHandler:
+SPI2_IRQHandler:
+USART1_IRQHandler:
+USART2_IRQHandler:
+EXTI15_10_IRQHandler:
+RTC_Alarm_IRQHandler:
+TIM8_BRK_TIM12_IRQHandler:
+TIM8_UP_TIM13_IRQHandler:
+TIM8_TRG_COM_TIM14_IRQHandler:
+DMA1_Stream7_IRQHandler:
+FMC_IRQHandler:
+TIM5_IRQHandler:
+SPI3_IRQHandler:
+UART4_IRQHandler:
+UART5_IRQHandler:
+TIM6_DAC_IRQHandler:
+DMA2_Stream0_IRQHandler:
+DMA2_Stream1_IRQHandler:
TIM8_TRG_COM_TIM14_IRQHandler:
-DMA1_Stream7_IRQHandler:
-FMC_IRQHandler:
-TIM5_IRQHandler:
-SPI3_IRQHandler:
-UART4_IRQHandler:
-UART5_IRQHandler:
-TIM6_DAC_IRQHandler:
-DMA2_Stream0_IRQHandler:
-DMA2_Stream1_IRQHandler:
-DMA2_Stream2_IRQHandler:
-DMA2_Stream3_IRQHandler:
-DMA2_Stream4_IRQHandler:
-ETH_IRQHandler:
-ETH_WKUP_IRQHandler:
-FDCAN_CAL_IRQHandler:
-DMA2_Stream5_IRQHandler:
-DMA2_Stream6_IRQHandler:
-DMA2_Stream7_IRQHandler:
-USART6_IRQHandler:
-I2C3_EV_IRQHandler:
-I2C3_ER_IRQHandler:
-OTG_HS_EP1_OUT_IRQHandler:
-OTG_HS_EP1_IN_IRQHandler:
-OTG_HS_WKUP_IRQHandler:
-OTG_HS_IRQHandler:
-DCMI_PSSI_IRQHandler:
-RNG_IRQHandler:
-FPU_IRQHandler:
-UART7_IRQHandler:
-UART8_IRQHandler:
-SPI5_IRQHandler:
-SPI6_IRQHandler:
-SAI1_IRQHandler:
-LTDC_IRQHandler:
-LTDC_ER_IRQHandler:
-DMA2D_IRQHandler:
-OCTOSPI1_IRQHandler:
-LPTIM1_IRQHandler:
-CEC_IRQHandler:
-I2C4_EV_IRQHandler:
-I2C4_ER_IRQHandler:
-SPDIF_RX_IRQHandler:
-DMAMUX1_OVR_IRQHandler:
-DFSDM1_FLT0_IRQHandler:
-DFSDM1_FLT1_IRQHandler:
-DFSDM1_FLT2_IRQHandler:
-DFSDM1_FLT3_IRQHandler:
-SWPMI1_IRQHandler:
-TIM15_IRQHandler:
-TIM16_IRQHandler:
-TIM17_IRQHandler:
-MDIOS_WKUP_IRQHandler:
-MDIOS_IRQHandler:
-MDMA_IRQHandler:
-SDMMC2_IRQHandler:
-HSEM1_IRQHandler:
-ADC3_IRQHandler:
-DMAMUX2_OVR_IRQHandler:
-BDMA_Channel0_IRQHandler:
-BDMA_Channel1_IRQHandler:
+Ôæ$">DMA2_Stream2_IRQHandler:
+DMA2_Stream3_IRQHandler:
+DMA2_Stream4_IRQHandler:
+ETH_IRQHandler:
+ETH_WKUP_IRQHandler:
+FDCAN_CAL_IRQHandler:
+DMA2_Stream5_IRQHandler:
+DMA2_Stream6_IRQHandler:
+DMA2_Stream7_IRQHandler:
+USART6_IRQHandler:
+I2C3_EV_IRQHandler:
BDMA_Channel2_IRQHandler:
-BDMA_Channel3_IRQHandler:
-BDMA_Channel4_IRQHandler:
-BDMA_Channel5_IRQHandler:
-BDMA_Channel6_IRQHandler:
-BDMA_Channel7_IRQHandler:
-COMP1_IRQHandler:
-LPTIM2_IRQHandler:
-LPTIM3_IRQHandler:
-LPTIM4_IRQHandler:
-LPTIM5_IRQHandler:
-LPUART1_IRQHandler:
-CRS_IRQHandler:
+Õæ$">I2C3_ER_IRQHandler:
ECC_IRQHandler:
-SAI4_IRQHandler:
-DTS_IRQHandler:
-WAKEUP_PIN_IRQHandler:
-OCTOSPI2_IRQHandler:
-FMAC_IRQHandler:
-CORDIC_IRQHandler:
-UART9_IRQHandler:
-USART10_IRQHandler:
-I2C5_EV_IRQHandler:
-I2C5_ER_IRQHandler:
-FDCAN3_IT0_IRQHandler:
-FDCAN3_IT1_IRQHandler:
-TIM23_IRQHandler:
-TIM24_IRQHandler:
- 0x080002CE: E7FE B NMI_Handler ; Dedupe identical section .init.TIM24_IRQHandler
+Õæ$">OTG_HS_EP1_OUT_IRQHandler:
+OTG_HS_EP1_IN_IRQHandler:
+OTG_HS_WKUP_IRQHandler:
+OTG_HS_IRQHandler:
+DCMI_PSSI_IRQHandler:
+RNG_IRQHandler:
+FPU_IRQHandler:
+UART7_IRQHandler:
+UART8_IRQHandler:
+SPI5_IRQHandler:
+SPI6_IRQHandler:
+SAI1_IRQHandler:
+LTDC_IRQHandler:
+LTDC_ER_IRQHandler:
+DMA2D_IRQHandler:
+OCTOSPI1_IRQHandler:
+LPTIM1_IRQHandler:
+CEC_IRQHandler:
+I2C4_EV_IRQHandler:
+I2C4_ER_IRQHandler:
+SPDIF_RX_IRQHandler:
+DMAMUX1_OVR_IRQHandler:
+DFSDM1_FLT0_IRQHandler:
+DFSDM1_FLT1_IRQHandler:
+DFSDM1_FLT2_IRQHandler:
+DFSDM1_FLT3_IRQHandler:
+SWPMI1_IRQHandler:
+TIM15_IRQHandler:
+TIM16_IRQHandler:
+TIM17_IRQHandler:
+MDIOS_WKUP_IRQHandler:
+MDIOS_IRQHandler:
+MDMA_IRQHandler:
+SDMMC2_IRQHandler:
+HSEM1_IRQHandler:
+ADC3_IRQHandler:
+DMAMUX2_OVR_IRQHandler:
+BDMA_Channel0_IRQHandler:
+BDMA_Channel1_IRQHandler:
+BDMA_Channel2_IRQHandler:
+BDMA_Channel3_IRQHandler:
+BDMA_Channel4_IRQHandler:
+BDMA_Channel5_IRQHandler:
+BDMA_Channel6_IRQHandler:
+BDMA_Channel7_IRQHandler:
+COMP1_IRQHandler:
+LPTIM2_IRQHandler:
+LPTIM3_IRQHandler:
+LPTIM4_IRQHandler:
+LPTIM5_IRQHandler:
+LPUART1_IRQHandler:
+CRS_IRQHandler:
+ECC_IRQHandler:
+SAI4_IRQHandler:
+DTS_IRQHandler:
+WAKEUP_PIN_IRQHandler:
+OCTOSPI2_IRQHandler:
+FMAC_IRQHandler:
+CORDIC_IRQHandler:
+UART9_IRQHandler:
+USART10_IRQHandler:
+I2C5_EV_IRQHandler:
+I2C5_ER_IRQHandler:
+FDCAN3_IT0_IRQHandler:
+FDCAN3_IT1_IRQHandler:
+TIM23_IRQHandler:
+TIM24_IRQHandler:
+ 0x080002CE: E7FE B NMI_Handler ; Dedupe identical section .init.TIM24_IRQHandler
Section .text.libc.fmod from floatops.o (libc_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=328, align=8
-
fmod:
+
fmod:
0x080002D0: E92D 4FF8 PUSH.W {R3-R11, LR}
0x080002D4: ED2D 8B06 VSTMDB SP!, {D8-D10}
@@ -20573,5 +20444,5 @@
0x08000338: A802 ADD R0, SP, #8
0x0800033A: EEB0 0B4A VMOV.F64 D0, D10
- 0x0800033E: F010 F89D BL __SEGGER_RTL_float64_frexp_inline ; 0x0801047C
+ 0x0800033E: F010 F89D BL __SEGGER_RTL_float64_frexp_inline ; 0x0801047C
0x08000342: EEB4 9B4A VCMP.F64 D9, D10
0x08000346: EEF1 FA10 VMRS APSR_nzcv, FPSCR
@@ -20589,5 +20460,5 @@
0x0800036C: EEB0 0B49 VMOV.F64 D0, D9
0x08000370: A803 ADD R0, SP, #12
- 0x08000372: F010 F883 BL __SEGGER_RTL_float64_frexp_inline ; 0x0801047C
+ 0x08000372: F010 F883 BL __SEGGER_RTL_float64_frexp_inline ; 0x0801047C
0x08000376: 9803 LDR R0, [SP, #12]
0x08000378: 1BC0 SUBS R0, R0, R7
@@ -20657,5 +20528,5 @@
Section .text.libc.floor from floatops.o (libc_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=208, align=8
-
floor:
+
floor:
0x08000418: EC50 CB10 VMOV R12, R0, D0
0x0800041C: F3C0 520A UBFX R2, R0, #20, #11
@@ -20732,5 +20603,5 @@
Section .rodata.libc.__SEGGER_RTL_aPower2 from utilops.o (libc_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=72, align=8
-
__SEGGER_RTL_aPower2:
+
__SEGGER_RTL_aPower2:
0x080004E8: 00 DC.B 0x00 ; '\0'
0x080004E9: 00 DC.B 0x00 ; '\0'
@@ -20808,5 +20679,5 @@
Section .rodata.libc.__SEGGER_RTL_ipow10 from prinops.o (libc_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=160, align=8
-
__SEGGER_RTL_ipow10:
+
__SEGGER_RTL_ipow10:
0x08000530: 01 DC.B 0x01 ; '\x01'
0x08000531: 00 DC.B 0x00 ; '\0'
@@ -20972,6 +20843,6 @@
Section .text.libc.__SEGGER_RTL_vfprintf_float_long_long from __SEGGER_RTL_vfprintf_float_long_long.o (libc_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=3104, align=8
-
__SEGGER_RTL_vfprintf_float_long_long:
-__SEGGER_RTL_vfprintf:
+
__SEGGER_RTL_vfprintf_float_long_long:
+__SEGGER_RTL_vfprintf:
0x080005D0: E92D 4FF8 PUSH.W {R3-R11, LR}
0x080005D4: ED2D 8B0A VSTMDB SP!, {D8-D12}
@@ -20995,5 +20866,6 @@
0x08000606: F000 85DA BEQ.W .L123 ; 0x080011BE
0x0800060A: 4640 MOV R0, R8
- 0x0800060C: F00F FF6E BL __SEGGER_RTL_putc ; 0x080104EC
+ 0x0800060C: F00F FF6E BL __SEGGER_RTL_putc ; 0x080104EC
0x08000610: E7F4 B .L1 ; 0x080005FC
.L2:
@@ -21225,5 +21097,6 @@
0x080007CE: 4640 MOV R0, R8
0x080007D0: 2125 MOVS R1, #37
- 0x080007D2: F00F FE8B BL __SEGGER_RTL_putc ; 0x080104EC
+ 0x080007D2: F00F FE8B BL __SEGGER_RTL_putc ; 0x080104EC
0x080007D6: E711 B .L1 ; 0x080005FC
.L26:
@@ -21271,8 +21144,10 @@
0x0800084A: 4631 MOV R1, R6
0x0800084C: 4652 MOV R2, R10
- 0x0800084E: F00C FC6E BL __SEGGER_RTL_pre_padding ; 0x0800D12E
+ 0x0800084E: F00C FC6E BL __SEGGER_RTL_pre_padding ; 0x0800D12E
0x08000852: 4640 MOV R0, R8
0x08000854: 4621 MOV R1, R4
- 0x08000856: F00F FE49 BL __SEGGER_RTL_putc ; 0x080104EC
+ 0x08000856: F00F FE49 BL __SEGGER_RTL_putc ; 0x080104EC
0x0800085A: E1AE B .L67 ; 0x08000BBA
0x0800085C: 9906 LDR R1, [SP, #24]
@@ -21450,5 +21325,6 @@
0x080009D4: 220A MOVS R2, #10
0x080009D6: 2300 MOVS R3, #0
- 0x080009D8: F002 FDAA BL __aeabi_uldivmod ; 0x08003530
+ 0x080009D8: F002 FDAA BL __aeabi_uldivmod ; 0x08003530
0x080009DC: EB00 0280 ADD.W R2, R0, R0, LSL #2
0x080009E0: EBA5 0242 SUB.W R2, R5, R2, LSL #1
@@ -21504,5 +21380,6 @@
0x08000A64: 4631 MOV R1, R6
0x08000A66: 4622 MOV R2, R4
- 0x08000A68: F00C FB61 BL __SEGGER_RTL_pre_padding ; 0x0800D12E
+ 0x08000A68: F00C FB61 BL __SEGGER_RTL_pre_padding ; 0x0800D12E
0x08000A6C: 9905 LDR R1, [SP, #20]
0x08000A6E: 2400 MOVS R4, #0
@@ -21513,5 +21390,6 @@
0x08000A76: 0A09 LSRS R1, R1, #8
0x08000A78: 4640 MOV R0, R8
- 0x08000A7A: F00F FD37 BL __SEGGER_RTL_putc ; 0x080104EC
+ 0x08000A7A: F00F FD37 BL __SEGGER_RTL_putc ; 0x080104EC
0x08000A7E: 9905 LDR R1, [SP, #20]
0x08000A80: E000 B .L53 ; 0x08000A84
@@ -21520,14 +21398,17 @@
.L53:
0x08000A84: 4640 MOV R0, R8
- 0x08000A86: F00F FD31 BL __SEGGER_RTL_putc ; 0x080104EC
+ 0x08000A86: F00F FD31 BL __SEGGER_RTL_putc ; 0x080104EC
.L54:
0x08000A8A: 4640 MOV R0, R8
0x08000A8C: 4631 MOV R1, R6
0x08000A8E: 4622 MOV R2, R4
- 0x08000A90: F00C FB4D BL __SEGGER_RTL_pre_padding ; 0x0800D12E
+ 0x08000A90: F00C FB4D BL __SEGGER_RTL_pre_padding ; 0x0800D12E
0x08000A94: 4640 MOV R0, R8
0x08000A96: 2130 MOVS R1, #48
0x08000A98: 4652 MOV R2, R10
- 0x08000A9A: F00F FD77 BL __SEGGER_RTL_print_padding ; 0x0801058C
+ 0x08000A9A: F00F FD77 BL __SEGGER_RTL_print_padding ; 0x0801058C
0x08000A9E: 2F01 CMP R7, #1
0x08000AA0: DB05 BLT .L56 ; 0x08000AAE
@@ -21535,5 +21416,6 @@
0x08000AA2: 5DE9 LDRB R1, [R5, R7]
0x08000AA4: 4640 MOV R0, R8
- 0x08000AA6: F00F FD21 BL __SEGGER_RTL_putc ; 0x080104EC
+ 0x08000AA6: F00F FD21 BL __SEGGER_RTL_putc ; 0x080104EC
0x08000AAA: 3F01 SUBS R7, #1
0x08000AAC: D8F9 BHI .L55 ; 0x08000AA2
@@ -21544,5 +21426,6 @@
0x08000AB6: 2120 MOVS R1, #32
0x08000AB8: 4622 MOV R2, R4
- 0x08000ABA: F00F FD67 BL __SEGGER_RTL_print_padding ; 0x0801058C
+ 0x08000ABA: F00F FD67 BL __SEGGER_RTL_print_padding ; 0x0801058C
0x08000ABE: E59D B .L1 ; 0x080005FC
.L57:
@@ -21567,5 +21450,6 @@
0x08000AFC: 9006 STR R0, [SP, #24]
0x08000AFE: EEB0 0B49 VMOV.F64 D0, D9
- 0x08000B02: F00C FAD5 BL __SEGGER_RTL_float64_isinf ; 0x0800D0B0
+ 0x08000B02: F00C FAD5 BL __SEGGER_RTL_float64_isinf ; 0x0800D0B0
0x08000B06: B180 CBZ R0, .L60 ; 0x08000B2A
.L59:
@@ -21582,5 +21466,6 @@
.L60:
0x08000B2A: EEB0 0B49 VMOV.F64 D0, D9
- 0x08000B2E: F00F FC97 BL __SEGGER_RTL_float64_isnan ; 0x08010460
+ 0x08000B2E: F00F FC97 BL __SEGGER_RTL_float64_isnan ; 0x08010460
0x08000B32: 2800 CMP R0, #0
0x08000B34: D04A BEQ .L68 ; 0x08000BCC
@@ -21616,11 +21501,9 @@
0x08000B86: 4620 MOV R0, R4
0x08000B88: D402 BMI .L64 ; 0x08000B90
- 0x08000B8A: F00F FD91 BL strlen ; 0x080106B0
+ 0x08000B8A: F00F FD91 BL strlen ; 0x080106B0
0x08000B8E: E002 B .L65 ; 0x08000B96
.L64:
0x08000B90: 4651 MOV R1, R10
- 0x08000B92: F00F FDA3 BL strnlen ; 0x080106DC
+ 0x08000B92: F00F FDA3 BL strnlen ; 0x080106DC
.L65:
0x08000B96: 4605 MOV R5, R0
@@ -21630,10 +21513,12 @@
0x08000BA2: 4631 MOV R1, R6
0x08000BA4: 4652 MOV R2, R10
- 0x08000BA6: F00C FAC2 BL __SEGGER_RTL_pre_padding ; 0x0800D12E
+ 0x08000BA6: F00C FAC2 BL __SEGGER_RTL_pre_padding ; 0x0800D12E
0x08000BAA: B135 CBZ R5, .L67 ; 0x08000BBA
.L66:
0x08000BAC: F814 1B01 LDRB R1, [R4], #1
0x08000BB0: 4640 MOV R0, R8
- 0x08000BB2: F00F FC9B BL __SEGGER_RTL_putc ; 0x080104EC
+ 0x08000BB2: F00F FC9B BL __SEGGER_RTL_putc ; 0x080104EC
0x08000BB6: 3D01 SUBS R5, #1
0x08000BB8: D1F8 BNE .L66 ; 0x08000BAC
@@ -21644,9 +21529,11 @@
0x08000BC2: 2120 MOVS R1, #32
0x08000BC4: 4652 MOV R2, R10
- 0x08000BC6: F00F FCE1 BL __SEGGER_RTL_print_padding ; 0x0801058C
+ 0x08000BC6: F00F FCE1 BL __SEGGER_RTL_print_padding ; 0x0801058C
0x08000BCA: E517 B .L1 ; 0x080005FC
.L68:
0x08000BCC: EEB0 0B49 VMOV.F64 D0, D9
- 0x08000BD0: F00C FA7B BL __SEGGER_RTL_float64_isnormal ; 0x0800D0CA
+ 0x08000BD0: F00C FA7B BL __SEGGER_RTL_float64_isnormal ; 0x0800D0CA
0x08000BD4: 2800 CMP R0, #0
0x08000BD6: BF04 ITT EQ
@@ -21655,5 +21542,6 @@
0x08000BDC: EC46 5B19 VMOV D9, R5, R6
0x08000BE0: EEB0 0B49 VMOV.F64 D0, D9
- 0x08000BE4: F00F FC44 BL __SEGGER_RTL_float64_signbit ; 0x08010470
+ 0x08000BE4: F00F FC44 BL __SEGGER_RTL_float64_signbit ; 0x08010470
0x08000BE8: 4604 MOV R4, R0
0x08000BEA: F086 4000 EOR R0, R6, #0x80000000
@@ -21663,6 +21551,5 @@
0x08000BF8: EEB0 0B49 VMOV.F64 D0, D9
0x08000BFC: A80D ADD R0, SP, #52
- 0x08000BFE: F00F FC3B BL frexp ; 0x08010478
+ 0x08000BFE: F00F FC3B BL frexp ; 0x08010478
0x08000C02: 980D LDR R0, [SP, #52]
0x08000C04: EB00 0040 ADD.W R0, R0, R0, LSL #1
@@ -21681,5 +21568,6 @@
0x08000C2E: 3001 ADDS R0, #1
.L69:
- 0x08000C30: F00F FC3E BL __SEGGER_RTL_pow10 ; 0x080104B0
+ 0x08000C30: F00F FC3E BL __SEGGER_RTL_pow10 ; 0x080104B0
0x08000C34: EEB4 0B49 VCMP.F64 D0, D9
0x08000C38: EEF1 FA10 VMRS APSR_nzcv, FPSCR
@@ -21695,5 +21583,6 @@
0x08000C4C: 900D STR R0, [SP, #52]
.L71:
- 0x08000C4E: F00F FC2F BL __SEGGER_RTL_pow10 ; 0x080104B0
+ 0x08000C4E: F00F FC2F BL __SEGGER_RTL_pow10 ; 0x080104B0
0x08000C52: EEB4 0B49 VCMP.F64 D0, D9
0x08000C56: EEF1 FA10 VMRS APSR_nzcv, FPSCR
@@ -21731,5 +21620,6 @@
.L77:
0x08000CA6: 4248 RSBS R0, R1, #0
- 0x08000CA8: F00F FC02 BL __SEGGER_RTL_pow10 ; 0x080104B0
+ 0x08000CA8: F00F FC02 BL __SEGGER_RTL_pow10 ; 0x080104B0
0x08000CAC: EE20 9B09 VMUL.F64 D9, D0, D9
.L78:
@@ -21738,5 +21628,6 @@
0x08000CB8: D023 BEQ .L82 ; 0x08000D02
0x08000CBA: EEB0 0B49 VMOV.F64 D0, D9
- 0x08000CBE: F00C F9F7 BL __SEGGER_RTL_float64_isinf ; 0x0800D0B0
+ 0x08000CBE: F00C F9F7 BL __SEGGER_RTL_float64_isinf ; 0x0800D0B0
0x08000CC2: 2800 CMP R0, #0
0x08000CC4: F47F AF20 BNE.W .L59 ; 0x08000B08
@@ -21772,8 +21663,8 @@
0x08000D12: 46A2 MOVNE R10, R4
0x08000D14: F1CA 0000 RSB R0, R10, #0
- 0x08000D18: F00F FBCA BL __SEGGER_RTL_pow10 ; 0x080104B0
+ 0x08000D18: F00F FBCA BL __SEGGER_RTL_pow10 ; 0x080104B0
0x08000D1C: F04F 30FF MOV.W R0, #0xFFFFFFFF
- 0x08000D20: F00C F9E4 BL ldexp ; 0x0800D0EC
+ 0x08000D20: F00C F9E4 BL ldexp ; 0x0800D0EC
0x08000D24: EE30 0B09 VADD.F64 D0, D0, D9
0x08000D28: EEB4 0B48 VCMP.F64 D0, D8
@@ -21798,9 +21689,9 @@
0x08000D60: EC40 6B19 VMOV D9, R6, R0
0x08000D64: 4650 MOV R0, R10
- 0x08000D66: F00F FBA3 BL __SEGGER_RTL_pow10 ; 0x080104B0
+ 0x08000D66: F00F FBA3 BL __SEGGER_RTL_pow10 ; 0x080104B0
0x08000D6A: EE20 0B09 VMUL.F64 D0, D0, D9
0x08000D6E: EC51 0B10 VMOV R0, R1, D0
- 0x08000D72: F002 FB8F BL __aeabi_d2ulz ; 0x08003494
+ 0x08000D72: F002 FB8F BL __aeabi_d2ulz ; 0x08003494
0x08000D76: 4604 MOV R4, R0
0x08000D78: 4308 ORRS R0, R1
@@ -21875,13 +21766,11 @@
.L87:
0x08000E2A: 4650 MOV R0, R10
- 0x08000E2C: F00F FB40 BL __SEGGER_RTL_pow10 ; 0x080104B0
+ 0x08000E2C: F00F FB40 BL __SEGGER_RTL_pow10 ; 0x080104B0
0x08000E30: EEB6 1B00 VMOV.F64 D1, #0.5
0x08000E34: EE00 1B09 VMLA.F64 D1, D0, D9
0x08000E38: EEB0 0B41 VMOV.F64 D0, D1
- 0x08000E3C: F7FF FAEC BL floor ; 0x08000418
+ 0x08000E3C: F7FF FAEC BL floor ; 0x08000418
0x08000E40: EEB0 1B48 VMOV.F64 D1, D8
- 0x08000E44: F7FF FA44 BL fmod ; 0x080002D0
+ 0x08000E44: F7FF FA44 BL fmod ; 0x080002D0
0x08000E48: EEB5 0B40 VCMP.F64 D0, #0.0
0x08000E4C: EEF1 FA10 VMRS APSR_nzcv, FPSCR
@@ -21898,12 +21787,13 @@
0x08000E66: BFC8 IT GT
0x08000E68: 4608 MOVGT R0, R1
- 0x08000E6A: F00F FB21 BL __SEGGER_RTL_pow10 ; 0x080104B0
+ 0x08000E6A: F00F FB21 BL __SEGGER_RTL_pow10 ; 0x080104B0
0x08000E6E: F04F 30FF MOV.W R0, #0xFFFFFFFF
- 0x08000E72: F00C F93B BL ldexp ; 0x0800D0EC
+ 0x08000E72: F00C F93B BL ldexp ; 0x0800D0EC
0x08000E76: EE30 9B09 VADD.F64 D9, D0, D9
0x08000E7A: 980D LDR R0, [SP, #52]
0x08000E7C: 3001 ADDS R0, #1
- 0x08000E7E: F00F FB17 BL __SEGGER_RTL_pow10 ; 0x080104B0
+ 0x08000E7E: F00F FB17 BL __SEGGER_RTL_pow10 ; 0x080104B0
0x08000E82: EEB4 0B49 VCMP.F64 D0, D9
0x08000E86: EEF1 FA10 VMRS APSR_nzcv, FPSCR
@@ -21918,9 +21808,9 @@
0x08000E9C: 910D STR R1, [SP, #52]
0x08000E9E: F1C0 0010 RSB R0, R0, #16
- 0x08000EA2: F00F FB05 BL __SEGGER_RTL_pow10 ; 0x080104B0
+ 0x08000EA2: F00F FB05 BL __SEGGER_RTL_pow10 ; 0x080104B0
0x08000EA6: EE20 0B09 VMUL.F64 D0, D0, D9
0x08000EAA: EC51 0B10 VMOV R0, R1, D0
- 0x08000EAE: F002 FAF1 BL __aeabi_d2ulz ; 0x08003494
+ 0x08000EAE: F002 FAF1 BL __aeabi_d2ulz ; 0x08003494
0x08000EB2: 4605 MOV R5, R0
0x08000EB4: 460E MOV R6, R1
@@ -21937,10 +21827,8 @@
.L91:
0x08000ECE: EC51 0B19 VMOV R0, R1, D9
- 0x08000ED2: F002 FADF BL __aeabi_d2ulz ; 0x08003494
+ 0x08000ED2: F002 FADF BL __aeabi_d2ulz ; 0x08003494
0x08000ED6: 4605 MOV R5, R0
0x08000ED8: 460E MOV R6, R1
- 0x08000EDA: F002 FAFB BL __aeabi_ul2d ; 0x080034D4
+ 0x08000EDA: F002 FAFB BL __aeabi_ul2d ; 0x080034D4
0x08000EDE: EC41 0B10 VMOV D0, R0, R1
0x08000EE2: EE39 0B40 VSUB.F64 D0, D9, D0
@@ -21993,10 +21881,8 @@
0x08000F5A: EC41 6B19 VMOV D9, R6, R1
0x08000F5E: 4630 MOV R0, R6
- 0x08000F60: F002 FA98 BL __aeabi_d2ulz ; 0x08003494
+ 0x08000F60: F002 FA98 BL __aeabi_d2ulz ; 0x08003494
0x08000F64: 4605 MOV R5, R0
0x08000F66: 460E MOV R6, R1
- 0x08000F68: F002 FAB4 BL __aeabi_ul2d ; 0x080034D4
+ 0x08000F68: F002 FAB4 BL __aeabi_ul2d ; 0x080034D4
0x08000F6C: EC41 0B10 VMOV D0, R0, R1
0x08000F70: EE39 0B40 VSUB.F64 D0, D9, D0
@@ -22007,6 +21893,5 @@
0x08000F82: 3F01 SUBNE R7, #1
0x08000F84: 9804 LDR R0, [SP, #16]
- 0x08000F86: F00F FA8F BL abs ; 0x080104A8
+ 0x08000F86: F00F FA8F BL abs ; 0x080104A8
0x08000F8A: 2863 CMP R0, #99
0x08000F8C: BFC8 IT GT
@@ -22023,5 +21908,6 @@
0x08000FA6: 4640 MOV R0, R8
0x08000FA8: 2120 MOVS R1, #32
- 0x08000FAA: F00F FA9F BL __SEGGER_RTL_putc ; 0x080104EC
+ 0x08000FAA: F00F FA9F BL __SEGGER_RTL_putc ; 0x080104EC
0x08000FAE: F1BB 0B01 SUBS.W R11, R11, #1
0x08000FB2: D1F8 BNE .L97 ; 0x08000FA6
@@ -22045,5 +21931,6 @@
.L101:
0x08000FD8: 4640 MOV R0, R8
- 0x08000FDA: F00F FA87 BL __SEGGER_RTL_putc ; 0x080104EC
+ 0x08000FDA: F00F FA87 BL __SEGGER_RTL_putc ; 0x080104EC
.L102:
0x08000FDE: EA5F 60CA LSLS.W R0, R10, #27
@@ -22054,5 +21941,6 @@
0x08000FEA: 4640 MOV R0, R8
0x08000FEC: 2130 MOVS R1, #48
- 0x08000FEE: F00F FA7D BL __SEGGER_RTL_putc ; 0x080104EC
+ 0x08000FEE: F00F FA7D BL __SEGGER_RTL_putc ; 0x080104EC
0x08000FF2: F1BB 0B01 SUBS.W R11, R11, #1
0x08000FF6: D1F8 BNE .L103 ; 0x08000FEA
@@ -22075,5 +21963,6 @@
0x08001018: B2C1 UXTB R1, R0
0x0800101A: 4640 MOV R0, R8
- 0x0800101C: F00F FA66 BL __SEGGER_RTL_putc ; 0x080104EC
+ 0x0800101C: F00F FA66 BL __SEGGER_RTL_putc ; 0x080104EC
0x08001020: 2C00 CMP R4, #0
0x08001022: D1E9 BNE .L104 ; 0x08000FF8
@@ -22088,5 +21977,6 @@
0x08001034: 4640 MOV R0, R8
0x08001036: 2130 MOVS R1, #48
- 0x08001038: F00F FA58 BL __SEGGER_RTL_putc ; 0x080104EC
+ 0x08001038: F00F FA58 BL __SEGGER_RTL_putc ; 0x080104EC
0x0800103C: 980D LDR R0, [SP, #52]
0x0800103E: 2800 CMP R0, #0
@@ -22099,5 +21989,6 @@
0x0800104C: 4640 MOV R0, R8
0x0800104E: 212E MOVS R1, #46
- 0x08001050: F00F FA4C BL __SEGGER_RTL_putc ; 0x080104EC
+ 0x08001050: F00F FA4C BL __SEGGER_RTL_putc ; 0x080104EC
0x08001054: 2010 MOVS R0, #16
0x08001056: 2D10 CMP R5, #16
@@ -22110,5 +22001,6 @@
0x08001066: BF48 IT MI
0x08001068: 1A40 SUBMI R0, R0, R1
- 0x0800106A: F00F FA21 BL __SEGGER_RTL_pow10 ; 0x080104B0
+ 0x0800106A: F00F FA21 BL __SEGGER_RTL_pow10 ; 0x080104B0
0x0800106E: 2D01 CMP R5, #1
0x08001070: DB26 BLT .L112 ; 0x080010C0
@@ -22117,6 +22009,5 @@
0x0800107A: EE20 0B01 VMUL.F64 D0, D0, D1
0x0800107E: EC51 0B10 VMOV R0, R1, D0
- 0x08001082: F002 FA07 BL __aeabi_d2ulz ; 0x08003494
+ 0x08001082: F002 FA07 BL __aeabi_d2ulz ; 0x08003494
0x08001086: 4604 MOV R4, R0
0x08001088: 460D MOV R5, R1
@@ -22142,5 +22033,6 @@
0x080010B4: B2C1 UXTB R1, R0
0x080010B6: 4640 MOV R0, R8
- 0x080010B8: F00F FA18 BL __SEGGER_RTL_putc ; 0x080104EC
+ 0x080010B8: F00F FA18 BL __SEGGER_RTL_putc ; 0x080104EC
0x080010BC: 2E00 CMP R6, #0
0x080010BE: D1E5 BNE .L109 ; 0x0800108C
@@ -22153,5 +22045,6 @@
0x080010C8: 4640 MOV R0, R8
0x080010CA: 2130 MOVS R1, #48
- 0x080010CC: F00F FA0E BL __SEGGER_RTL_putc ; 0x080104EC
+ 0x080010CC: F00F FA0E BL __SEGGER_RTL_putc ; 0x080104EC
0x080010D0: 3401 ADDS R4, #1
0x080010D2: D3F9 BCC .L113 ; 0x080010C8
@@ -22164,5 +22057,6 @@
0x080010E2: 2165 MOVPL R1, #101
0x080010E4: 4640 MOV R0, R8
- 0x080010E6: F00F FA01 BL __SEGGER_RTL_putc ; 0x080104EC
+ 0x080010E6: F00F FA01 BL __SEGGER_RTL_putc ; 0x080104EC
0x080010EA: 980D LDR R0, [SP, #52]
0x080010EC: 2800 CMP R0, #0
@@ -22170,10 +22064,12 @@
0x080010F0: DB04 BLT .L115 ; 0x080010FC
0x080010F2: 212B MOVS R1, #43
- 0x080010F4: F00F F9FA BL __SEGGER_RTL_putc ; 0x080104EC
+ 0x080010F4: F00F F9FA BL __SEGGER_RTL_putc ; 0x080104EC
0x080010F8: 980D LDR R0, [SP, #52]
0x080010FA: E005 B .L116 ; 0x08001108
.L115:
0x080010FC: 212D MOVS R1, #45
- 0x080010FE: F00F F9F5 BL __SEGGER_RTL_putc ; 0x080104EC
+ 0x080010FE: F00F F9F5 BL __SEGGER_RTL_putc ; 0x080104EC
0x08001102: 980D LDR R0, [SP, #52]
0x08001104: 4240 RSBS R0, R0, #0
@@ -22188,5 +22084,6 @@
0x0800111A: EB00 1151 ADD.W R1, R0, R1, LSR #5
0x0800111E: 4640 MOV R0, R8
- 0x08001120: F00F F9E4 BL __SEGGER_RTL_putc ; 0x080104EC
+ 0x08001120: F00F F9E4 BL __SEGGER_RTL_putc ; 0x080104EC
0x08001124: 980D LDR R0, [SP, #52]
0x08001126: FB50 F104 SMMUL R1, R0, R4
@@ -22204,5 +22101,6 @@
0x0800114A: F100 0130 ADD.W R1, R0, #48
0x0800114E: 4640 MOV R0, R8
- 0x08001150: F00F F9CC BL __SEGGER_RTL_putc ; 0x080104EC
+ 0x08001150: F00F F9CC BL __SEGGER_RTL_putc ; 0x080104EC
0x08001154: 980D LDR R0, [SP, #52]
0x08001156: FB50 F104 SMMUL R1, R0, R4
@@ -22213,5 +22111,6 @@
0x08001168: F100 0130 ADD.W R1, R0, #48
0x0800116C: 4640 MOV R0, R8
- 0x0800116E: F00F F9BD BL __SEGGER_RTL_putc ; 0x080104EC
+ 0x0800116E: F00F F9BD BL __SEGGER_RTL_putc ; 0x080104EC
.L118:
0x08001172: F1BB 0F00 CMP.W R11, #0
@@ -22220,5 +22119,5 @@
0x0800117A: 4640 MOV R0, R8
0x0800117C: 2120 MOVS R1, #32
- 0x0800117E: F00F F9B5 BL __SEGGER_RTL_putc ; 0x080104EC
+ 0x0800117E: F00F F9B5 BL __SEGGER_RTL_putc ; 0x080104EC
0x08001182: F1BB 0B01 SUBS.W R11, R11, #1
0x08001186: D1F8 BNE .L119 ; 0x0800117A
@@ -22234,10 +22133,12 @@
0x08001198: 220A MOVS R2, #10
0x0800119A: 2300 MOVS R3, #0
- 0x0800119C: F002 F9C8 BL __aeabi_uldivmod ; 0x08003530
+ 0x0800119C: F002 F9C8 BL __aeabi_uldivmod ; 0x08003530
0x080011A0: 4604 MOV R4, R0
0x080011A2: 460D MOV R5, R1
0x080011A4: 220A MOVS R2, #10
0x080011A6: 2300 MOVS R3, #0
- 0x080011A8: F002 F9C2 BL __aeabi_uldivmod ; 0x08003530
+ 0x080011A8: F002 F9C2 BL __aeabi_uldivmod ; 0x08003530
0x080011AC: 9805 LDR R0, [SP, #20]
0x080011AE: 3801 SUBS R0, #1
@@ -22257,5 +22158,6 @@
.L124:
0x080011D0: 4640 MOV R0, R8
- 0x080011D2: F00F F9CD BL __SEGGER_RTL_prin_flush ; 0x08010570
+ 0x080011D2: F00F F9CD BL __SEGGER_RTL_prin_flush ; 0x08010570
0x080011D6: F8D8 0000 LDR.W R0, [R8]
.L125:
@@ -22265,5 +22167,6 @@
.L126:
0x080011E4: 4640 MOV R0, R8
- 0x080011E6: F00F F9C3 BL __SEGGER_RTL_prin_flush ; 0x08010570
+ 0x080011E6: F00F F9C3 BL __SEGGER_RTL_prin_flush ; 0x08010570
0x080011EA: F04F 30FF MOV.W R0, #0xFFFFFFFF
0x080011EE: E7F4 B .L125 ; 0x080011DA
@@ -22271,5 +22174,5 @@
Section .text.DMA_CheckFifoParam from charger_lto.o, size=204, align=4
-
DMA_CheckFifoParam:
+
DMA_CheckFifoParam:
0x080011F0: B085 SUB SP, SP, #20
0x080011F2: 9004 STR R0, [SP, #16]
@@ -22376,5 +22279,5 @@
Section .text.HAL_RCC_GetSysClockFreq from charger_lto.o, size=752, align=4
-
HAL_RCC_GetSysClockFreq:
+
HAL_RCC_GetSysClockFreq:
0x080012BC: B08A SUB SP, SP, #40
0x080012BE: F244 4010 MOVW R0, #0x4410
@@ -22652,5 +22555,5 @@
Section .text.HAL_RCCEx_PeriphCLKConfig from charger_lto.o, size=5140, align=4
-
HAL_RCCEx_PeriphCLKConfig:
+
HAL_RCCEx_PeriphCLKConfig:
0x080015AC: B580 PUSH {R7, LR}
0x080015AE: B09A SUB SP, SP, #104
@@ -22689,5 +22592,6 @@
0x080015FC: 3008 ADDS R0, #8
0x080015FE: 2102 MOVS R1, #2
- 0x08001600: F006 FD1F BL RCCEx_PLL2_Config ; 0x08008042
+ 0x08001600: F006 FD1F BL RCCEx_PLL2_Config ; 0x08008042
0x08001604: F88D 0057 STRB.W R0, [SP, #87]
0x08001608: E00B B .L6 ; 0x08001622
@@ -22696,5 +22600,6 @@
0x0800160C: 3028 ADDS R0, #40
0x0800160E: 2102 MOVS R1, #2
- 0x08001610: F006 FE6E BL RCCEx_PLL3_Config ; 0x080082F0
+ 0x08001610: F006 FE6E BL RCCEx_PLL3_Config ; 0x080082F0
0x08001614: F88D 0057 STRB.W R0, [SP, #87]
0x08001618: E003 B .L6 ; 0x08001622
@@ -22747,5 +22652,5 @@
0x0800167C: 3008 ADDS R0, #8
0x0800167E: 2100 MOVS R1, #0
- 0x08001680: F006 FCDF BL RCCEx_PLL2_Config ; 0x08008042
+ 0x08001680: F006 FCDF BL RCCEx_PLL2_Config ; 0x08008042
0x08001684: F88D 0057 STRB.W R0, [SP, #87]
0x08001688: E00C B .L10 ; 0x080016A4
@@ -22753,5 +22658,6 @@
0x0800168C: 3028 ADDS R0, #40
0x0800168E: 2100 MOVS R1, #0
- 0x08001690: F006 FE2E BL RCCEx_PLL3_Config ; 0x080082F0
+ 0x08001690: F006 FE2E BL RCCEx_PLL3_Config ; 0x080082F0
0x08001694: F88D 0057 STRB.W R0, [SP, #87]
0x08001698: E004 B .L10 ; 0x080016A4
@@ -22813,5 +22719,6 @@
0x0800171C: 3008 ADDS R0, #8
0x0800171E: 2100 MOVS R1, #0
- 0x08001720: F006 FC8F BL RCCEx_PLL2_Config ; 0x08008042
+ 0x08001720: F006 FC8F BL RCCEx_PLL2_Config ; 0x08008042
0x08001724: F88D 0057 STRB.W R0, [SP, #87]
0x08001728: E00D B .L20 ; 0x08001746
@@ -22820,5 +22727,6 @@
0x0800172C: 3028 ADDS R0, #40
0x0800172E: 2100 MOVS R1, #0
- 0x08001730: F006 FDDE BL RCCEx_PLL3_Config ; 0x080082F0
+ 0x08001730: F006 FDDE BL RCCEx_PLL3_Config ; 0x080082F0
0x08001734: F88D 0057 STRB.W R0, [SP, #87]
0x08001738: E005 B .L20 ; 0x08001746
@@ -22884,5 +22792,6 @@
0x080017C0: 3008 ADDS R0, #8
0x080017C2: 2100 MOVS R1, #0
- 0x080017C4: F006 FC3D BL RCCEx_PLL2_Config ; 0x08008042
+ 0x080017C4: F006 FC3D BL RCCEx_PLL2_Config ; 0x08008042
0x080017C8: F88D 0057 STRB.W R0, [SP, #87]
0x080017CC: E00D B .L30 ; 0x080017EA
@@ -22891,5 +22800,6 @@
0x080017D0: 3028 ADDS R0, #40
0x080017D2: 2100 MOVS R1, #0
- 0x080017D4: F006 FD8C BL RCCEx_PLL3_Config ; 0x080082F0
+ 0x080017D4: F006 FD8C BL RCCEx_PLL3_Config ; 0x080082F0
0x080017D8: F88D 0057 STRB.W R0, [SP, #87]
0x080017DC: E005 B .L30 ; 0x080017EA
@@ -22949,5 +22859,6 @@
0x0800184C: 3008 ADDS R0, #8
0x0800184E: 2102 MOVS R1, #2
- 0x08001850: F006 FBF7 BL RCCEx_PLL2_Config ; 0x08008042
+ 0x08001850: F006 FBF7 BL RCCEx_PLL2_Config ; 0x08008042
0x08001854: F88D 0057 STRB.W R0, [SP, #87]
0x08001858: E004 B .L38 ; 0x08001864
@@ -23008,5 +22919,6 @@
0x080018D2: 3008 ADDS R0, #8
0x080018D4: 2100 MOVS R1, #0
- 0x080018D6: F006 FBB4 BL RCCEx_PLL2_Config ; 0x08008042
+ 0x080018D6: F006 FBB4 BL RCCEx_PLL2_Config ; 0x08008042
0x080018DA: F88D 0057 STRB.W R0, [SP, #87]
0x080018DE: E00C B .L47 ; 0x080018FA
@@ -23015,5 +22927,6 @@
0x080018E2: 3028 ADDS R0, #40
0x080018E4: 2100 MOVS R1, #0
- 0x080018E6: F006 FD03 BL RCCEx_PLL3_Config ; 0x080082F0
+ 0x080018E6: F006 FD03 BL RCCEx_PLL3_Config ; 0x080082F0
0x080018EA: F88D 0057 STRB.W R0, [SP, #87]
0x080018EE: E004 B .L47 ; 0x080018FA
@@ -23072,5 +22985,6 @@
0x08001960: 3008 ADDS R0, #8
0x08001962: 2101 MOVS R1, #1
- 0x08001964: F006 FB6D BL RCCEx_PLL2_Config ; 0x08008042
+ 0x08001964: F006 FB6D BL RCCEx_PLL2_Config ; 0x08008042
0x08001968: F88D 0057 STRB.W R0, [SP, #87]
0x0800196C: E00D B .L57 ; 0x0800198A
@@ -23079,5 +22993,5 @@
0x08001970: 3028 ADDS R0, #40
0x08001972: 2101 MOVS R1, #1
- 0x08001974: F006 FCBC BL RCCEx_PLL3_Config ; 0x080082F0
+ 0x08001974: F006 FCBC BL RCCEx_PLL3_Config ; 0x080082F0
0x08001978: F88D 0057 STRB.W R0, [SP, #87]
0x0800197C: E005 B .L57 ; 0x0800198A
@@ -23138,5 +23052,6 @@
0x080019F2: 3008 ADDS R0, #8
0x080019F4: 2101 MOVS R1, #1
- 0x080019F6: F006 FB24 BL RCCEx_PLL2_Config ; 0x08008042
+ 0x080019F6: F006 FB24 BL RCCEx_PLL2_Config ; 0x08008042
0x080019FA: F88D 0057 STRB.W R0, [SP, #87]
0x080019FE: E00D B .L67 ; 0x08001A1C
@@ -23145,5 +23060,6 @@
0x08001A02: 3028 ADDS R0, #40
0x08001A04: 2101 MOVS R1, #1
- 0x08001A06: F006 FC73 BL RCCEx_PLL3_Config ; 0x080082F0
+ 0x08001A06: F006 FC73 BL RCCEx_PLL3_Config ; 0x080082F0
0x08001A0A: F88D 0057 STRB.W R0, [SP, #87]
0x08001A0E: E005 B .L67 ; 0x08001A1C
@@ -23200,5 +23116,6 @@
0x08001A7C: 3008 ADDS R0, #8
0x08001A7E: 2101 MOVS R1, #1
- 0x08001A80: F006 FADF BL RCCEx_PLL2_Config ; 0x08008042
+ 0x08001A80: F006 FADF BL RCCEx_PLL2_Config ; 0x08008042
0x08001A84: F88D 0057 STRB.W R0, [SP, #87]
0x08001A88: E003 B .L74 ; 0x08001A92
@@ -23248,5 +23165,6 @@
0x08001AE8: 3008 ADDS R0, #8
0x08001AEA: 2102 MOVS R1, #2
- 0x08001AEC: F006 FAA9 BL RCCEx_PLL2_Config ; 0x08008042
+ 0x08001AEC: F006 FAA9 BL RCCEx_PLL2_Config ; 0x08008042
0x08001AF0: F88D 0057 STRB.W R0, [SP, #87]
0x08001AF4: E004 B .L78 ; 0x08001B00
@@ -23635,6 +23553,5 @@
0x08001FBA: F6C0 0001 MOVT R0, #0x0801 ; 0x08010B76 = .rodata..L.str.78
0x08001FBE: F240 317D MOVW R1, #0x037D
- 0x08001FC2: F002 FBE9 BL assert_failed ; 0x08004798
+ 0x08001FC2: F002 FBE9 BL assert_failed ; 0x08004798
.L83:
0x08001FC6: F644 0100 MOVW R1, #0x4800
@@ -23643,6 +23560,5 @@
0x08001FD0: F440 7080 ORR R0, R0, #0x0100
0x08001FD4: 6008 STR R0, [R1]
- 0x08001FD6: F00B FBC5 BL HAL_GetTick ; 0x0800D764
+ 0x08001FD6: F00B FBC5 BL HAL_GetTick ; 0x0800D764
0x08001FDA: 9016 STR R0, [SP, #88]
.L84:
@@ -23653,6 +23569,5 @@
0x08001FE8: 2800 CMP R0, #0
0x08001FEA: D40A BMI .L86 ; 0x08002002
- 0x08001FEC: F00B FBBA BL HAL_GetTick ; 0x0800D764
+ 0x08001FEC: F00B FBBA BL HAL_GetTick ; 0x0800D764
0x08001FF0: 9916 LDR R1, [SP, #88]
0x08001FF2: 1A40 SUBS R0, R0, R1
@@ -23695,6 +23610,5 @@
0x08002050: F5B0 7F80 CMP.W R0, #0x0100
0x08002054: D117 BNE .L90 ; 0x08002086
- 0x08002056: F00B FB85 BL HAL_GetTick ; 0x0800D764
+ 0x08002056: F00B FB85 BL HAL_GetTick ; 0x0800D764
0x0800205A: 9016 STR R0, [SP, #88]
.L88:
@@ -23704,6 +23618,5 @@
0x08002066: F3C0 0040 UBFX R0, R0, #1, #1
0x0800206A: B960 CBNZ R0, .L90 ; 0x08002086
- 0x0800206C: F00B FB7A BL HAL_GetTick ; 0x0800D764
+ 0x0800206C: F00B FB7A BL HAL_GetTick ; 0x0800D764
0x08002070: 9916 LDR R1, [SP, #88]
0x08002072: 1A40 SUBS R0, R0, R1
@@ -23819,5 +23732,6 @@
0x08002148: 3008 ADDS R0, #8
0x0800214A: 2101 MOVS R1, #1
- 0x0800214C: F005 FF79 BL RCCEx_PLL2_Config ; 0x08008042
+ 0x0800214C: F005 FF79 BL RCCEx_PLL2_Config ; 0x08008042
0x08002150: F88D 0057 STRB.W R0, [SP, #87]
0x08002154: E00D B .L98 ; 0x08002172
@@ -23825,5 +23739,6 @@
0x08002158: 3028 ADDS R0, #40
0x0800215A: 2101 MOVS R1, #1
- 0x0800215C: F006 F8C8 BL RCCEx_PLL3_Config ; 0x080082F0
+ 0x0800215C: F006 F8C8 BL RCCEx_PLL3_Config ; 0x080082F0
0x08002160: F88D 0057 STRB.W R0, [SP, #87]
0x08002164: E005 B .L98 ; 0x08002172
@@ -23872,5 +23787,6 @@
0x080021BC: 3008 ADDS R0, #8
0x080021BE: 2101 MOVS R1, #1
- 0x080021C0: F005 FF3F BL RCCEx_PLL2_Config ; 0x08008042
+ 0x080021C0: F005 FF3F BL RCCEx_PLL2_Config ; 0x08008042
0x080021C4: F88D 0057 STRB.W R0, [SP, #87]
0x080021C8: E00D B .L102 ; 0x080021E6
@@ -23878,5 +23794,6 @@
0x080021CC: 3028 ADDS R0, #40
0x080021CE: 2101 MOVS R1, #1
- 0x080021D0: F006 F88E BL RCCEx_PLL3_Config ; 0x080082F0
+ 0x080021D0: F006 F88E BL RCCEx_PLL3_Config ; 0x080082F0
0x080021D4: F88D 0057 STRB.W R0, [SP, #87]
0x080021D8: E005 B .L102 ; 0x080021E6
@@ -23925,5 +23842,6 @@
0x08002232: 3008 ADDS R0, #8
0x08002234: 2101 MOVS R1, #1
- 0x08002236: F005 FF04 BL RCCEx_PLL2_Config ; 0x08008042
+ 0x08002236: F005 FF04 BL RCCEx_PLL2_Config ; 0x08008042
0x0800223A: F88D 0057 STRB.W R0, [SP, #87]
0x0800223E: E00D B .L106 ; 0x0800225C
@@ -23931,5 +23849,6 @@
0x08002242: 3028 ADDS R0, #40
0x08002244: 2101 MOVS R1, #1
- 0x08002246: F006 F853 BL RCCEx_PLL3_Config ; 0x080082F0
+ 0x08002246: F006 F853 BL RCCEx_PLL3_Config ; 0x080082F0
0x0800224A: F88D 0057 STRB.W R0, [SP, #87]
0x0800224E: E005 B .L106 ; 0x0800225C
@@ -23987,5 +23906,6 @@
0x080022C6: 3008 ADDS R0, #8
0x080022C8: 2100 MOVS R1, #0
- 0x080022CA: F005 FEBA BL RCCEx_PLL2_Config ; 0x08008042
+ 0x080022CA: F005 FEBA BL RCCEx_PLL2_Config ; 0x08008042
0x080022CE: F88D 0057 STRB.W R0, [SP, #87]
0x080022D2: E00D B .L116 ; 0x080022F0
@@ -23994,5 +23914,6 @@
0x080022D6: 3028 ADDS R0, #40
0x080022D8: 2102 MOVS R1, #2
- 0x080022DA: F006 F809 BL RCCEx_PLL3_Config ; 0x080082F0
+ 0x080022DA: F006 F809 BL RCCEx_PLL3_Config ; 0x080082F0
0x080022DE: F88D 0057 STRB.W R0, [SP, #87]
0x080022E2: E005 B .L116 ; 0x080022F0
@@ -24053,5 +23974,6 @@
0x0800235A: 3008 ADDS R0, #8
0x0800235C: 2100 MOVS R1, #0
- 0x0800235E: F005 FE70 BL RCCEx_PLL2_Config ; 0x08008042
+ 0x0800235E: F005 FE70 BL RCCEx_PLL2_Config ; 0x08008042
0x08002362: F88D 0057 STRB.W R0, [SP, #87]
0x08002366: E00D B .L126 ; 0x08002384
@@ -24060,5 +23982,6 @@
0x0800236A: 3028 ADDS R0, #40
0x0800236C: 2102 MOVS R1, #2
- 0x0800236E: F005 FFBF BL RCCEx_PLL3_Config ; 0x080082F0
+ 0x0800236E: F005 FFBF BL RCCEx_PLL3_Config ; 0x080082F0
0x08002372: F88D 0057 STRB.W R0, [SP, #87]
0x08002376: E005 B .L126 ; 0x08002384
@@ -24119,5 +24042,6 @@
0x080023EE: 3008 ADDS R0, #8
0x080023F0: 2100 MOVS R1, #0
- 0x080023F2: F005 FE26 BL RCCEx_PLL2_Config ; 0x08008042
+ 0x080023F2: F005 FE26 BL RCCEx_PLL2_Config ; 0x08008042
0x080023F6: F88D 0057 STRB.W R0, [SP, #87]
0x080023FA: E00D B .L136 ; 0x08002418
@@ -24126,5 +24050,6 @@
0x080023FE: 3028 ADDS R0, #40
0x08002400: 2102 MOVS R1, #2
- 0x08002402: F005 FF75 BL RCCEx_PLL3_Config ; 0x080082F0
+ 0x08002402: F005 FF75 BL RCCEx_PLL3_Config ; 0x080082F0
0x08002406: F88D 0057 STRB.W R0, [SP, #87]
0x0800240A: E005 B .L136 ; 0x08002418
@@ -24180,6 +24105,5 @@
0x0800247C: F6C0 0001 MOVT R0, #0x0801 ; 0x08010B76 = .rodata..L.str.78
0x08002480: F240 41FC MOVW R1, #0x04FC
- 0x08002484: F002 F988 BL assert_failed ; 0x08004798
+ 0x08002484: F002 F988 BL assert_failed ; 0x08004798
.L141:
0x08002488: 9818 LDR R0, [SP, #96]
@@ -24190,5 +24114,6 @@
0x08002496: 3028 ADDS R0, #40
0x08002498: 2102 MOVS R1, #2
- 0x0800249A: F005 FF29 BL RCCEx_PLL3_Config ; 0x080082F0
+ 0x0800249A: F005 FF29 BL RCCEx_PLL3_Config ; 0x080082F0
0x0800249E: B110 CBZ R0, .L142 ; 0x080024A6
0x080024A0: 2001 MOVS R0, #1
@@ -24230,6 +24155,5 @@
0x080024FA: F6C0 0001 MOVT R0, #0x0801 ; 0x08010B76 = .rodata..L.str.78
0x080024FE: F44F 61A4 MOV.W R1, #0x0520
- 0x08002502: F002 F949 BL assert_failed ; 0x08004798
+ 0x08002502: F002 F949 BL assert_failed ; 0x08004798
.L146:
0x08002506: 9818 LDR R0, [SP, #96]
@@ -24240,5 +24164,6 @@
0x08002514: 3028 ADDS R0, #40
0x08002516: 2102 MOVS R1, #2
- 0x08002518: F005 FEEA BL RCCEx_PLL3_Config ; 0x080082F0
+ 0x08002518: F005 FEEA BL RCCEx_PLL3_Config ; 0x080082F0
0x0800251C: B110 CBZ R0, .L147 ; 0x08002524
0x0800251E: 2001 MOVS R0, #1
@@ -24274,5 +24199,6 @@
0x08002564: 3008 ADDS R0, #8
0x08002566: 2100 MOVS R1, #0
- 0x08002568: F005 FD6B BL RCCEx_PLL2_Config ; 0x08008042
+ 0x08002568: F005 FD6B BL RCCEx_PLL2_Config ; 0x08008042
0x0800256C: F88D 0057 STRB.W R0, [SP, #87]
0x08002570: E00B B .L153 ; 0x0800258A
@@ -24281,5 +24207,6 @@
0x08002574: 3028 ADDS R0, #40
0x08002576: 2102 MOVS R1, #2
- 0x08002578: F005 FEBA BL RCCEx_PLL3_Config ; 0x080082F0
+ 0x08002578: F005 FEBA BL RCCEx_PLL3_Config ; 0x080082F0
0x0800257C: F88D 0057 STRB.W R0, [SP, #87]
0x08002580: E003 B .L153 ; 0x0800258A
@@ -24333,5 +24260,6 @@
0x080025F0: 3028 ADDS R0, #40
0x080025F2: 2101 MOVS R1, #1
- 0x080025F4: F005 FE7C BL RCCEx_PLL3_Config ; 0x080082F0
+ 0x080025F4: F005 FE7C BL RCCEx_PLL3_Config ; 0x080082F0
0x080025F8: F88D 0057 STRB.W R0, [SP, #87]
0x080025FC: E003 B .L160 ; 0x08002606
@@ -24375,6 +24303,5 @@
0x0800264E: F6C0 0001 MOVT R0, #0x0801 ; 0x08010B76 = .rodata..L.str.78
0x08002652: F240 5186 MOVW R1, #0x0586
- 0x08002656: F002 F89F BL assert_failed ; 0x08004798
+ 0x08002656: F002 F89F BL assert_failed ; 0x08004798
.L165:
0x0800265A: 9818 LDR R0, [SP, #96]
@@ -24397,5 +24324,6 @@
0x08002680: 3008 ADDS R0, #8
0x08002682: 2102 MOVS R1, #2
- 0x08002684: F005 FCDD BL RCCEx_PLL2_Config ; 0x08008042
+ 0x08002684: F005 FCDD BL RCCEx_PLL2_Config ; 0x08008042
0x08002688: F88D 0057 STRB.W R0, [SP, #87]
0x0800268C: E002 B .L169 ; 0x08002694
@@ -24427,5 +24355,5 @@
0x080026C6: 3028 ADDS R0, #40
0x080026C8: 2102 MOVS R1, #2
- 0x080026CA: F005 FE11 BL RCCEx_PLL3_Config ; 0x080082F0
+ 0x080026CA: F005 FE11 BL RCCEx_PLL3_Config ; 0x080082F0
0x080026CE: B110 CBZ R0, .L172 ; 0x080026D6
0x080026D0: 2001 MOVS R0, #1
@@ -24501,6 +24429,5 @@
0x08002766: F6C0 0001 MOVT R0, #0x0801 ; 0x08010B76 = .rodata..L.str.78
0x0800276A: F240 51E5 MOVW R1, #0x05E5
- 0x0800276E: F002 F813 BL assert_failed ; 0x08004798
+ 0x0800276E: F002 F813 BL assert_failed ; 0x08004798
.L183:
0x08002772: F244 4150 MOVW R1, #0x4450
@@ -24531,6 +24458,5 @@
0x080027A8: F6C0 0001 MOVT R0, #0x0801 ; 0x08010B76 = .rodata..L.str.78
0x080027AC: F240 51F9 MOVW R1, #0x05F9
- 0x080027B0: F001 FFF2 BL assert_failed ; 0x08004798
+ 0x080027B0: F001 FFF2 BL assert_failed ; 0x08004798
.L187:
0x080027B4: F244 4150 MOVW R1, #0x4450
@@ -24561,6 +24487,5 @@
0x080027EE: F6C0 0001 MOVT R0, #0x0801 ; 0x08010B76 = .rodata..L.str.78
0x080027F2: F240 610F MOVW R1, #0x060F
- 0x080027F6: F001 FFCF BL assert_failed ; 0x08004798
+ 0x080027F6: F001 FFCF BL assert_failed ; 0x08004798
.L191:
0x080027FA: F244 4110 MOVW R1, #0x4410
@@ -24597,6 +24522,5 @@
0x08002840: F6C0 0001 MOVT R0, #0x0801 ; 0x08010B76 = .rodata..L.str.78
0x08002844: F240 6119 MOVW R1, #0x0619
- 0x08002848: F001 FFA6 BL assert_failed ; 0x08004798
+ 0x08002848: F001 FFA6 BL assert_failed ; 0x08004798
.L195:
0x0800284C: F244 414C MOVW R1, #0x444C
@@ -24631,6 +24555,5 @@
0x08002892: F6C0 0001 MOVT R0, #0x0801 ; 0x08010B76 = .rodata..L.str.78
0x08002896: F240 6123 MOVW R1, #0x0623
- 0x0800289A: F001 FF7D BL assert_failed ; 0x08004798
+ 0x0800289A: F001 FF7D BL assert_failed ; 0x08004798
.L199:
0x0800289E: F244 4154 MOVW R1, #0x4454
@@ -24650,5 +24573,6 @@
0x080028C0: 3008 ADDS R0, #8
0x080028C2: 2100 MOVS R1, #0
- 0x080028C4: F005 FBBD BL RCCEx_PLL2_Config ; 0x08008042
+ 0x080028C4: F005 FBBD BL RCCEx_PLL2_Config ; 0x08008042
0x080028C8: F88D 0057 STRB.W R0, [SP, #87]
0x080028CC: F89D 0057 LDRB.W R0, [SP, #87]
@@ -24667,5 +24591,6 @@
0x080028E8: 3008 ADDS R0, #8
0x080028EA: 2101 MOVS R1, #1
- 0x080028EC: F005 FBA9 BL RCCEx_PLL2_Config ; 0x08008042
+ 0x080028EC: F005 FBA9 BL RCCEx_PLL2_Config ; 0x08008042
0x080028F0: F88D 0057 STRB.W R0, [SP, #87]
0x080028F4: F89D 0057 LDRB.W R0, [SP, #87]
@@ -24684,5 +24609,6 @@
0x08002910: 3008 ADDS R0, #8
0x08002912: 2102 MOVS R1, #2
- 0x08002914: F005 FB95 BL RCCEx_PLL2_Config ; 0x08008042
+ 0x08002914: F005 FB95 BL RCCEx_PLL2_Config ; 0x08008042
0x08002918: F88D 0057 STRB.W R0, [SP, #87]
0x0800291C: F89D 0057 LDRB.W R0, [SP, #87]
@@ -24701,5 +24627,6 @@
0x08002938: 3028 ADDS R0, #40
0x0800293A: 2100 MOVS R1, #0
- 0x0800293C: F005 FCD8 BL RCCEx_PLL3_Config ; 0x080082F0
+ 0x0800293C: F005 FCD8 BL RCCEx_PLL3_Config ; 0x080082F0
0x08002940: F88D 0057 STRB.W R0, [SP, #87]
0x08002944: F89D 0057 LDRB.W R0, [SP, #87]
@@ -24718,5 +24645,6 @@
0x08002960: 3028 ADDS R0, #40
0x08002962: 2101 MOVS R1, #1
- 0x08002964: F005 FCC4 BL RCCEx_PLL3_Config ; 0x080082F0
+ 0x08002964: F005 FCC4 BL RCCEx_PLL3_Config ; 0x080082F0
0x08002968: F88D 0057 STRB.W R0, [SP, #87]
0x0800296C: F89D 0057 LDRB.W R0, [SP, #87]
@@ -24735,5 +24663,5 @@
0x08002988: 3028 ADDS R0, #40
0x0800298A: 2102 MOVS R1, #2
- 0x0800298C: F005 FCB0 BL RCCEx_PLL3_Config ; 0x080082F0
+ 0x0800298C: F005 FCB0 BL RCCEx_PLL3_Config ; 0x080082F0
0x08002990: F88D 0057 STRB.W R0, [SP, #87]
0x08002994: F89D 0057 LDRB.W R0, [SP, #87]
@@ -24759,5 +24687,5 @@
Section .text.HAL_RCCEx_GetPLL2ClockFreq from charger_lto.o, size=664, align=4
-
HAL_RCCEx_GetPLL2ClockFreq:
+
HAL_RCCEx_GetPLL2ClockFreq:
0x080029C0: B088 SUB SP, SP, #32
0x080029C2: 9007 STR R0, [SP, #28]
@@ -24966,5 +24894,5 @@
Section .text.HAL_RCCEx_GetPLL3ClockFreq from charger_lto.o, size=664, align=4
-
HAL_RCCEx_GetPLL3ClockFreq:
+
HAL_RCCEx_GetPLL3ClockFreq:
0x08002C58: B088 SUB SP, SP, #32
0x08002C5A: 9007 STR R0, [SP, #28]
@@ -25173,5 +25101,5 @@
Section .text.HAL_TIM_PWM_ConfigChannel from charger_lto.o, size=1424, align=4
-
HAL_TIM_PWM_ConfigChannel:
+
HAL_TIM_PWM_ConfigChannel:
0x08002EF0: B580 PUSH {R7, LR}
0x08002EF2: B086 SUB SP, SP, #24
@@ -25207,6 +25135,5 @@
0x08002F2E: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x08002F32: F241 01B3 MOVW R1, #0x10B3
- 0x08002F36: F001 FC2F BL assert_failed ; 0x08004798
+ 0x08002F36: F001 FC2F BL assert_failed ; 0x08004798
.L3:
0x08002F3A: 9803 LDR R0, [SP, #12]
@@ -25248,6 +25175,5 @@
0x08002F88: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x08002F8C: F241 01B4 MOVW R1, #0x10B4
- 0x08002F90: F001 FC02 BL assert_failed ; 0x08004798
+ 0x08002F90: F001 FC02 BL assert_failed ; 0x08004798
.L6:
0x08002F94: 9803 LDR R0, [SP, #12]
@@ -25264,6 +25190,5 @@
0x08002FA8: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x08002FAC: F241 01B5 MOVW R1, #0x10B5
- 0x08002FB0: F001 FBF2 BL assert_failed ; 0x08004798
+ 0x08002FB0: F001 FBF2 BL assert_failed ; 0x08004798
.L9:
0x08002FB4: 9803 LDR R0, [SP, #12]
@@ -25280,6 +25205,5 @@
0x08002FC8: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x08002FCC: F241 01B6 MOVW R1, #0x10B6
- 0x08002FD0: F001 FBE2 BL assert_failed ; 0x08004798
+ 0x08002FD0: F001 FBE2 BL assert_failed ; 0x08004798
.L12:
0x08002FD4: 9804 LDR R0, [SP, #16]
@@ -25430,11 +25354,11 @@
0x08003106: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800310A: F44F 5186 MOV.W R1, #0x10C0
- 0x0800310E: F001 FB43 BL assert_failed ; 0x08004798
+ 0x0800310E: F001 FB43 BL assert_failed ; 0x08004798
.L16:
0x08003112: 9804 LDR R0, [SP, #16]
0x08003114: 6800 LDR R0, [R0]
0x08003116: 9903 LDR R1, [SP, #12]
- 0x08003118: F006 FE92 BL TIM_OC1_SetConfig ; 0x08009E40
+ 0x08003118: F006 FE92 BL TIM_OC1_SetConfig ; 0x08009E40
0x0800311C: 9804 LDR R0, [SP, #16]
0x0800311E: 6801 LDR R1, [R0]
@@ -25519,11 +25443,11 @@
0x080031E2: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x080031E6: F241 01D1 MOVW R1, #0x10D1
- 0x080031EA: F001 FAD5 BL assert_failed ; 0x08004798
+ 0x080031EA: F001 FAD5 BL assert_failed ; 0x08004798
.L19:
0x080031EE: 9804 LDR R0, [SP, #16]
0x080031F0: 6800 LDR R0, [R0]
0x080031F2: 9903 LDR R1, [SP, #12]
- 0x080031F4: F00C FC3C BL TIM_OC2_SetConfig ; 0x0800FA70
+ 0x080031F4: F00C FC3C BL TIM_OC2_SetConfig ; 0x0800FA70
0x080031F8: 9804 LDR R0, [SP, #16]
0x080031FA: 6801 LDR R1, [R0]
@@ -25596,11 +25520,11 @@
0x080032A0: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x080032A4: F241 01E2 MOVW R1, #0x10E2
- 0x080032A8: F001 FA76 BL assert_failed ; 0x08004798
+ 0x080032A8: F001 FA76 BL assert_failed ; 0x08004798
.L22:
0x080032AC: 9804 LDR R0, [SP, #16]
0x080032AE: 6800 LDR R0, [R0]
0x080032B0: 9903 LDR R1, [SP, #12]
- 0x080032B2: F006 FE94 BL TIM_OC3_SetConfig ; 0x08009FDE
+ 0x080032B2: F006 FE94 BL TIM_OC3_SetConfig ; 0x08009FDE
0x080032B6: 9804 LDR R0, [SP, #16]
0x080032B8: 6801 LDR R1, [R0]
@@ -25673,11 +25597,10 @@
0x0800335C: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x08003360: F241 01F3 MOVW R1, #0x10F3
- 0x08003364: F001 FA18 BL assert_failed ; 0x08004798
+ 0x08003364: F001 FA18 BL assert_failed ; 0x08004798
.L25:
0x08003368: 9804 LDR R0, [SP, #16]
0x0800336A: 6800 LDR R0, [R0]
0x0800336C: 9903 LDR R1, [SP, #12]
- 0x0800336E: F006 FF0F BL TIM_OC4_SetConfig ; 0x0800A190
+ 0x0800336E: F006 FF0F BL TIM_OC4_SetConfig ; 0x0800A190
0x08003372: 9804 LDR R0, [SP, #16]
0x08003374: 6801 LDR R1, [R0]
@@ -25716,11 +25639,11 @@
0x080033C0: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x080033C4: F241 1104 MOVW R1, #0x1104
- 0x080033C8: F001 F9E6 BL assert_failed ; 0x08004798
+ 0x080033C8: F001 F9E6 BL assert_failed ; 0x08004798
.L28:
0x080033CC: 9804 LDR R0, [SP, #16]
0x080033CE: 6800 LDR R0, [R0]
0x080033D0: 9903 LDR R1, [SP, #12]
- 0x080033D2: F00C FC27 BL TIM_OC5_SetConfig ; 0x0800FC24
+ 0x080033D2: F00C FC27 BL TIM_OC5_SetConfig ; 0x0800FC24
0x080033D6: 9804 LDR R0, [SP, #16]
0x080033D8: 6801 LDR R1, [R0]
@@ -25759,11 +25682,10 @@
0x08003422: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x08003426: F241 1115 MOVW R1, #0x1115
- 0x0800342A: F001 F9B5 BL assert_failed ; 0x08004798
+ 0x0800342A: F001 F9B5 BL assert_failed ; 0x08004798
.L31:
0x0800342E: 9804 LDR R0, [SP, #16]
0x08003430: 6800 LDR R0, [R0]
0x08003432: 9903 LDR R1, [SP, #12]
- 0x08003434: F006 FF25 BL TIM_OC6_SetConfig ; 0x0800A282
+ 0x08003434: F006 FF25 BL TIM_OC6_SetConfig ; 0x0800A282
0x08003438: 9804 LDR R0, [SP, #16]
0x0800343A: 6801 LDR R1, [R0]
@@ -25800,5 +25722,5 @@
Section .init._start from SEGGER_THUMB_Startup.o, size=20, align=4
-
_start:
+
_start:
0x08003480: 4C03 LDR R4, =0x08010F5C ; [PC, #12] [0x08003490]
.L1:
@@ -25807,16 +25729,14 @@
0x08003486: 4780 BLX R0
0x08003488: E7FB B .L1 ; 0x08003482
-
__SEGGER_init_done:
-__startup_complete:
- 0x0800348A: F001 F8BE BL main ; 0x0800460A
-
exit:
- 0x0800348E: E7FE B exit ; 0x0800348E
+
__SEGGER_init_done:
+__startup_complete:
+ 0x0800348A: F001 F8BE BL main ; 0x0800460A
+
exit:
+ 0x0800348E: E7FE B exit ; 0x0800348E
0x08003490: 08010F5C DC.W 0x08010F5C ; R_ARM_ABS32
Section .text.libc.__aeabi_d2ulz from floatasmops_arm.o (libc_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=64, align=4
-
__aeabi_d2ulz:
+
__aeabi_d2ulz:
0x08003494: 150A ASRS R2, R1, #20
0x08003496: 02C9 LSLS R1, R1, #11
@@ -25851,5 +25771,5 @@
Section .text.libc.__aeabi_ul2d from floatasmops_arm.o (libc_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=92, align=4
-
__aeabi_ul2d:
+
__aeabi_ul2d:
0x080034D4: B1F9 CBZ R1, .L1 ; 0x08003516
0x080034D6: F240 423D MOVW R2, #0x043D
@@ -25889,5 +25809,5 @@
Section .text.libc.__aeabi_uldivmod from intasmops_arm.o (libc_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=304, align=4
-
__aeabi_uldivmod:
+
__aeabi_uldivmod:
0x08003530: 2B00 CMP R3, #0
0x08003532: D135 BNE .L3 ; 0x080035A0
@@ -26010,6 +25930,6 @@
Section .text.libc.memcpy from strasmops_arm.o (strops_unaligned_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=92, align=4
-
memcpy:
-__aeabi_memcpy:
+
memcpy:
+__aeabi_memcpy:
0x08003660: B35A CBZ R2, .L9 ; 0x080036BA
0x08003662: 4684 MOV R12, R0
@@ -26026,5 +25946,5 @@
0x0800367C: E01C B .L8 ; 0x080036B8
__aeabi_memcpy4:
-__aeabi_memcpy8:
+__aeabi_memcpy8:
0x0800367E: 4684 MOV R12, R0
.L2:
@@ -26061,15 +25981,15 @@
Section .text.libc.__aeabi_memclr from strasmops_arm.o (strops_unaligned_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=104, align=4
-
__aeabi_memclr:
-__aeabi_memclr8:
-__aeabi_memclr4:
+
__aeabi_memclr:
+__aeabi_memclr8:
+__aeabi_memclr4:
0x080036BC: 2200 MOVS R2, #0
-
__aeabi_memset8:
-__aeabi_memset4:
-__aeabi_memset:
+
__aeabi_memset8:
+__aeabi_memset4:
+__aeabi_memset:
0x080036BE: 000B MOVS R3, R1
0x080036C0: 0011 MOVS R1, R2
0x080036C2: 001A MOVS R2, R3
-
memset:
+
memset:
0x080036C4: 4684 MOV R12, R0
0x080036C6: B35A CBZ R2, .L7 ; 0x08003720
@@ -26122,34 +26042,53 @@
Section .rodata.libc.__SEGGER_RTL_c_locale from mbops.o (mbops_timeops_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=12, align=4
-
__SEGGER_RTL_c_locale:
+
__SEGGER_RTL_c_locale:
0x08003724: 08010C84 DC.W 0x08010C84 ; R_ARM_ABS32
- 0x08003728: 08003750 DC.W __SEGGER_RTL_c_locale_data
- 0x0800372C: 08003730 DC.W __SEGGER_RTL_codeset_ascii
+ 0x08003728: 08003750 DC.W __SEGGER_RTL_c_locale_data
+ 0x0800372C: 08003730 DC.W __SEGGER_RTL_codeset_ascii
Section .rodata.libc.__SEGGER_RTL_codeset_ascii from mbops.o (mbops_timeops_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=32, align=4
-
__SEGGER_RTL_codeset_ascii:
- 0x08003730: 08010775 DC.W __SEGGER_RTL_ascii_isctype
- 0x08003734: 08010795 DC.W __SEGGER_RTL_ascii_toupper
- 0x08003738: 0800D2EB DC.W __SEGGER_RTL_ascii_tolower
- 0x0800373C: 080107A1 DC.W __SEGGER_RTL_ascii_iswctype
- 0x08003740: 08010795 DC.W __SEGGER_RTL_ascii_toupper
- 0x08003744: 0800D2EB DC.W __SEGGER_RTL_ascii_tolower
- 0x08003748: 0800D2DD DC.W __SEGGER_RTL_ascii_wctomb
- 0x0800374C: 08010741 DC.W __SEGGER_RTL_ascii_mbtowc
+
__SEGGER_RTL_codeset_ascii:
+ 0x08003730: 08010775 DC.W __SEGGER_RTL_ascii_isctype
+ 0x08003734: 08010795 DC.W __SEGGER_RTL_ascii_toupper
+ 0x08003738: 0800D2EB DC.W __SEGGER_RTL_ascii_tolower
+ 0x0800373C: 080107A1 DC.W __SEGGER_RTL_ascii_iswctype
+ 0x08003740: 08010795 DC.W __SEGGER_RTL_ascii_toupper
+ 0x08003744: 0800D2EB DC.W __SEGGER_RTL_ascii_tolower
+ 0x08003748: 0800D2DD DC.W __SEGGER_RTL_ascii_wctomb
+ 0x0800374C: 08010741 DC.W __SEGGER_RTL_ascii_mbtowc
Section .rodata.libc.__SEGGER_RTL_c_locale_data from mbops.o (mbops_timeops_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=88, align=4
-
__SEGGER_RTL_c_locale_data:
- 0x08003750: 08010C86 DC.W __SEGGER_RTL_data_utf8_period
- 0x08003754: 08010D38 DC.W __SEGGER_RTL_data_empty_string
- 0x08003758: 08010D38 DC.W __SEGGER_RTL_data_empty_string
- 0x0800375C: 08010D38 DC.W __SEGGER_RTL_data_empty_string
- 0x08003760: 08010D38 DC.W __SEGGER_RTL_data_empty_string
- 0x08003764: 08010D38 DC.W __SEGGER_RTL_data_empty_string
- 0x08003768: 08010D38 DC.W __SEGGER_RTL_data_empty_string
- 0x0800376C: 08010D38 DC.W __SEGGER_RTL_data_empty_string
- 0x08003770: 08010D38 DC.W __SEGGER_RTL_data_empty_string
- 0x08003774: 08010D38 DC.W __SEGGER_RTL_data_empty_string
+
__SEGGER_RTL_c_locale_data:
+ 0x08003750: 08010C86 DC.W __SEGGER_RTL_data_utf8_period
+ 0x08003754: 08010D38 DC.W __SEGGER_RTL_data_empty_string
+ 0x08003758: 08010D38 DC.W __SEGGER_RTL_data_empty_string
+ 0x0800375C: 08010D38 DC.W __SEGGER_RTL_data_empty_string
+ 0x08003760: 08010D38 DC.W __SEGGER_RTL_data_empty_string
+ 0x08003764: 08010D38 DC.W __SEGGER_RTL_data_empty_string
+ 0x08003768: 08010D38 DC.W __SEGGER_RTL_data_empty_string
+ 0x0800376C: 08010D38 DC.W __SEGGER_RTL_data_empty_string
+ 0x08003770: 08010D38 DC.W __SEGGER_RTL_data_empty_string
+ 0x08003774: 08010D38 DC.W __SEGGER_RTL_data_empty_string
0x08003778: FF DC.B 0xFF ; '\xFF'
0x08003779: FF DC.B 0xFF ; '\xFF'
@@ -26168,18 +26107,16 @@
0x08003786: 00 DC.B 0x00 ; '\0'
0x08003787: 00 DC.B 0x00 ; '\0'
- 0x08003788: 08010C4A DC.W __SEGGER_RTL_c_locale_day_names
- 0x0800378C: 08010CEA DC.W __SEGGER_RTL_c_locale_abbrev_day_names
- 0x08003790: 08010A35 DC.W __SEGGER_RTL_c_locale_month_names
- 0x08003794: 08010D07 DC.W __SEGGER_RTL_c_locale_abbrev_month_names
- 0x08003798: 08010A8C DC.W __SEGGER_RTL_c_locale_am_pm_indicator
- 0x0800379C: 08010CD8 DC.W __SEGGER_RTL_c_locale_date_format
- 0x080037A0: 08010CE1 DC.W __SEGGER_RTL_c_locale_time_format
- 0x080037A4: 08010A93 DC.W __SEGGER_RTL_c_locale_date_time_format
+ 0x08003788: 08010C4A DC.W __SEGGER_RTL_c_locale_day_names
+ 0x0800378C: 08010CEA DC.W __SEGGER_RTL_c_locale_abbrev_day_names
+ 0x08003790: 08010A35 DC.W __SEGGER_RTL_c_locale_month_names
+ 0x08003794: 08010D07 DC.W __SEGGER_RTL_c_locale_abbrev_month_names
+ 0x08003798: 08010A8C DC.W __SEGGER_RTL_c_locale_am_pm_indicator
+ 0x0800379C: 08010CD8 DC.W __SEGGER_RTL_c_locale_date_format
+ 0x080037A0: 08010CE1 DC.W __SEGGER_RTL_c_locale_time_format
+ 0x080037A4: 08010A93 DC.W __SEGGER_RTL_c_locale_date_time_format
Section .text.UART_SetConfig from charger_lto.o, size=2946, align=4
-
UART_SetConfig:
+
UART_SetConfig:
0x080037A8: B580 PUSH {R7, LR}
0x080037AA: B09E SUB SP, SP, #120
@@ -26198,6 +26135,5 @@
0x080037CA: F6C0 0001 MOVT R0, #0x0801 ; 0x08010DD2 = .rodata..L.str.128
0x080037CE: F640 31E2 MOVW R1, #0x0BE2
- 0x080037D2: F000 FFE1 BL assert_failed ; 0x08004798
+ 0x080037D2: F000 FFE1 BL assert_failed ; 0x08004798
.L2:
0x080037D6: 981D LDR R0, [SP, #116]
@@ -26218,6 +26154,5 @@
0x080037F6: F6C0 0001 MOVT R0, #0x0801 ; 0x08010DD2 = .rodata..L.str.128
0x080037FA: F640 31E3 MOVW R1, #0x0BE3
- 0x080037FE: F000 FFCB BL assert_failed ; 0x08004798
+ 0x080037FE: F000 FFCB BL assert_failed ; 0x08004798
.L5:
0x08003802: 981D LDR R0, [SP, #116]
@@ -26240,6 +26175,5 @@
0x08003828: F6C0 0001 MOVT R0, #0x0801 ; 0x08010DD2 = .rodata..L.str.128
0x0800382C: F640 31E6 MOVW R1, #0x0BE6
- 0x08003830: F000 FFB2 BL assert_failed ; 0x08004798
+ 0x08003830: F000 FFB2 BL assert_failed ; 0x08004798
.L8:
0x08003834: E02B B .L15 ; 0x0800388E
@@ -26266,6 +26200,5 @@
0x08003860: F6C0 0001 MOVT R0, #0x0801 ; 0x08010DD2 = .rodata..L.str.128
0x08003864: F640 31EA MOVW R1, #0x0BEA
- 0x08003868: F000 FF96 BL assert_failed ; 0x08004798
+ 0x08003868: F000 FF96 BL assert_failed ; 0x08004798
.L12:
0x0800386C: 981D LDR R0, [SP, #116]
@@ -26282,6 +26215,5 @@
0x08003882: F6C0 0001 MOVT R0, #0x0801 ; 0x08010DD2 = .rodata..L.str.128
0x08003886: F640 31EB MOVW R1, #0x0BEB
- 0x0800388A: F000 FF85 BL assert_failed ; 0x08004798
+ 0x0800388A: F000 FF85 BL assert_failed ; 0x08004798
.L15:
0x0800388E: 981D LDR R0, [SP, #116]
@@ -26302,6 +26234,5 @@
0x080038AE: F6C0 0001 MOVT R0, #0x0801 ; 0x08010DD2 = .rodata..L.str.128
0x080038B2: F640 31EE MOVW R1, #0x0BEE
- 0x080038B6: F000 FF6F BL assert_failed ; 0x08004798
+ 0x080038B6: F000 FF6F BL assert_failed ; 0x08004798
.L18:
0x080038BA: 981D LDR R0, [SP, #116]
@@ -26318,6 +26249,5 @@
0x080038D2: F6C0 0001 MOVT R0, #0x0801 ; 0x08010DD2 = .rodata..L.str.128
0x080038D6: F640 31EF MOVW R1, #0x0BEF
- 0x080038DA: F000 FF5D BL assert_failed ; 0x08004798
+ 0x080038DA: F000 FF5D BL assert_failed ; 0x08004798
.L20:
0x080038DE: 981D LDR R0, [SP, #116]
@@ -26342,6 +26272,5 @@
0x08003908: F6C0 0001 MOVT R0, #0x0801 ; 0x08010DD2 = .rodata..L.str.128
0x0800390C: F44F 613F MOV.W R1, #0x0BF0
- 0x08003910: F000 FF42 BL assert_failed ; 0x08004798
+ 0x08003910: F000 FF42 BL assert_failed ; 0x08004798
.L23:
0x08003914: 981D LDR R0, [SP, #116]
@@ -26358,6 +26287,5 @@
0x0800392A: F6C0 0001 MOVT R0, #0x0801 ; 0x08010DD2 = .rodata..L.str.128
0x0800392E: F640 31F1 MOVW R1, #0x0BF1
- 0x08003932: F000 FF31 BL assert_failed ; 0x08004798
+ 0x08003932: F000 FF31 BL assert_failed ; 0x08004798
.L26:
0x08003936: 981D LDR R0, [SP, #116]
@@ -26414,6 +26342,5 @@
0x0800399A: F6C0 0001 MOVT R0, #0x0801 ; 0x08010DD2 = .rodata..L.str.128
0x0800399E: F640 31F2 MOVW R1, #0x0BF2
- 0x080039A2: F000 FEF9 BL assert_failed ; 0x08004798
+ 0x080039A2: F000 FEF9 BL assert_failed ; 0x08004798
.L29:
0x080039A6: 991D LDR R1, [SP, #116]
@@ -27162,10 +27089,12 @@
0x08003F9C: E035 B .L73 ; 0x0800400A
.L65:
- 0x08003F9E: F004 FB02 BL HAL_RCCEx_GetD3PCLK1Freq ; 0x080085A6
+ 0x08003F9E: F004 FB02 BL HAL_RCCEx_GetD3PCLK1Freq ; 0x080085A6
0x08003FA2: 9011 STR R0, [SP, #68]
0x08003FA4: E036 B .L74 ; 0x08004014
.L66:
0x08003FA6: A815 ADD R0, SP, #84
- 0x08003FA8: F7FE FD0A BL HAL_RCCEx_GetPLL2ClockFreq ; 0x080029C0
+ 0x08003FA8: F7FE FD0A BL HAL_RCCEx_GetPLL2ClockFreq ; 0x080029C0
0x08003FAC: 9816 LDR R0, [SP, #88]
0x08003FAE: 9011 STR R0, [SP, #68]
@@ -27173,5 +27102,6 @@
.L67:
0x08003FB2: A812 ADD R0, SP, #72
- 0x08003FB4: F7FE FE50 BL HAL_RCCEx_GetPLL3ClockFreq ; 0x08002C58
+ 0x08003FB4: F7FE FE50 BL HAL_RCCEx_GetPLL3ClockFreq ; 0x08002C58
0x08003FB8: 9813 LDR R0, [SP, #76]
0x08003FBA: 9011 STR R0, [SP, #68]
@@ -27251,5 +27181,6 @@
0x0800406C: 9304 STR R3, [SP, #16]
0x0800406E: 4619 MOV R1, R3
- 0x08004070: F7FF FA5E BL __aeabi_uldivmod ; 0x08003530
+ 0x08004070: F7FF FA5E BL __aeabi_uldivmod ; 0x08003530
0x08004074: 9A03 LDR R2, [SP, #12]
0x08004076: 9B04 LDR R3, [SP, #16]
@@ -27259,5 +27190,6 @@
0x08004080: EB10 0052 ADDS.W R0, R0, R2, LSR #1
0x08004084: F141 0100 ADC R1, R1, #0
- 0x08004088: F7FF FA52 BL __aeabi_uldivmod ; 0x08003530
+ 0x08004088: F7FF FA52 BL __aeabi_uldivmod ; 0x08003530
0x0800408C: 901A STR R0, [SP, #104]
0x0800408E: 981A LDR R0, [SP, #104]
@@ -27355,17 +27287,21 @@
0x0800410E: 57 DC.B 0x57 ; 'W'
0x0800410F: 00 DC.B 0x00 ; '\0'
- 0x08004110: F003 FF71 BL HAL_RCC_GetPCLK1Freq ; 0x08007FF6
+ 0x08004110: F003 FF71 BL HAL_RCC_GetPCLK1Freq ; 0x08007FF6
0x08004114: 9011 STR R0, [SP, #68]
0x08004116: E03A B .L83 ; 0x0800418E
- 0x08004118: F003 FF80 BL HAL_RCC_GetPCLK2Freq ; 0x0800801C
+ 0x08004118: F003 FF80 BL HAL_RCC_GetPCLK2Freq ; 0x0800801C
0x0800411C: 9011 STR R0, [SP, #68]
0x0800411E: E036 B .L83 ; 0x0800418E
0x08004120: A815 ADD R0, SP, #84
- 0x08004122: F7FE FC4D BL HAL_RCCEx_GetPLL2ClockFreq ; 0x080029C0
+ 0x08004122: F7FE FC4D BL HAL_RCCEx_GetPLL2ClockFreq ; 0x080029C0
0x08004126: 9816 LDR R0, [SP, #88]
0x08004128: 9011 STR R0, [SP, #68]
0x0800412A: E030 B .L83 ; 0x0800418E
0x0800412C: A812 ADD R0, SP, #72
- 0x0800412E: F7FE FD93 BL HAL_RCCEx_GetPLL3ClockFreq ; 0x08002C58
+ 0x0800412E: F7FE FD93 BL HAL_RCCEx_GetPLL3ClockFreq ; 0x08002C58
0x08004132: 9813 LDR R0, [SP, #76]
0x08004134: 9011 STR R0, [SP, #68]
@@ -27515,17 +27451,21 @@
0x08004246: 57 DC.B 0x57 ; 'W'
0x08004247: 00 DC.B 0x00 ; '\0'
- 0x08004248: F003 FED5 BL HAL_RCC_GetPCLK1Freq ; 0x08007FF6
+ 0x08004248: F003 FED5 BL HAL_RCC_GetPCLK1Freq ; 0x08007FF6
0x0800424C: 9011 STR R0, [SP, #68]
0x0800424E: E03A B .L90 ; 0x080042C6
- 0x08004250: F003 FEE4 BL HAL_RCC_GetPCLK2Freq ; 0x0800801C
+ 0x08004250: F003 FEE4 BL HAL_RCC_GetPCLK2Freq ; 0x0800801C
0x08004254: 9011 STR R0, [SP, #68]
0x08004256: E036 B .L90 ; 0x080042C6
0x08004258: A815 ADD R0, SP, #84
- 0x0800425A: F7FE FBB1 BL HAL_RCCEx_GetPLL2ClockFreq ; 0x080029C0
+ 0x0800425A: F7FE FBB1 BL HAL_RCCEx_GetPLL2ClockFreq ; 0x080029C0
0x0800425E: 9816 LDR R0, [SP, #88]
0x08004260: 9011 STR R0, [SP, #68]
0x08004262: E030 B .L90 ; 0x080042C6
0x08004264: A812 ADD R0, SP, #72
- 0x08004266: F7FE FCF7 BL HAL_RCCEx_GetPLL3ClockFreq ; 0x08002C58
+ 0x08004266: F7FE FCF7 BL HAL_RCCEx_GetPLL3ClockFreq ; 0x08002C58
0x0800426A: 9813 LDR R0, [SP, #76]
0x0800426C: 9011 STR R0, [SP, #68]
@@ -27607,5 +27547,5 @@
Section .text.MX_DMA_Init from charger_lto.o, size=90, align=2
-
MX_DMA_Init:
+
MX_DMA_Init:
0x0800432A: B580 PUSH {R7, LR}
0x0800432C: B086 SUB SP, SP, #24
@@ -27624,21 +27564,26 @@
0x0800434E: 9203 STR R2, [SP, #12]
0x08004350: 4611 MOV R1, R2
- 0x08004352: F000 FD90 BL HAL_NVIC_SetPriority ; 0x08004E76
+ 0x08004352: F000 FD90 BL HAL_NVIC_SetPriority ; 0x08004E76
0x08004356: 9801 LDR R0, [SP, #4]
- 0x08004358: F009 FA62 BL HAL_NVIC_EnableIRQ ; 0x0800D820
+ 0x08004358: F009 FA62 BL HAL_NVIC_EnableIRQ ; 0x0800D820
0x0800435C: 9A03 LDR R2, [SP, #12]
0x0800435E: 200C MOVS R0, #12
0x08004360: 9002 STR R0, [SP, #8]
0x08004362: 4611 MOV R1, R2
- 0x08004364: F000 FD87 BL HAL_NVIC_SetPriority ; 0x08004E76
+ 0x08004364: F000 FD87 BL HAL_NVIC_SetPriority ; 0x08004E76
0x08004368: 9802 LDR R0, [SP, #8]
- 0x0800436A: F009 FA59 BL HAL_NVIC_EnableIRQ ; 0x0800D820
+ 0x0800436A: F009 FA59 BL HAL_NVIC_EnableIRQ ; 0x0800D820
0x0800436E: 9A03 LDR R2, [SP, #12]
0x08004370: 200D MOVS R0, #13
0x08004372: 9004 STR R0, [SP, #16]
0x08004374: 4611 MOV R1, R2
- 0x08004376: F000 FD7E BL HAL_NVIC_SetPriority ; 0x08004E76
+ 0x08004376: F000 FD7E BL HAL_NVIC_SetPriority ; 0x08004E76
0x0800437A: 9804 LDR R0, [SP, #16]
- 0x0800437C: F009 FA50 BL HAL_NVIC_EnableIRQ ; 0x0800D820
+ 0x0800437C: F009 FA50 BL HAL_NVIC_EnableIRQ ; 0x0800D820
0x08004380: B006 ADD SP, SP, #24
0x08004382: BD80 POP {R7, PC}
@@ -27646,5 +27591,5 @@
Section .text.MX_GPIO_Init from charger_lto.o, size=646, align=2
-
MX_GPIO_Init:
+
MX_GPIO_Init:
0x08004384: B580 PUSH {R7, LR}
0x08004386: B09A SUB SP, SP, #104
@@ -27734,5 +27679,6 @@
0x08004474: 2200 MOVS R2, #0
0x08004476: 9209 STR R2, [SP, #36]
- 0x08004478: F00A FED8 BL HAL_GPIO_WritePin ; 0x0800F22C
+ 0x08004478: F00A FED8 BL HAL_GPIO_WritePin ; 0x0800F22C
0x0800447C: 9A09 LDR R2, [SP, #36]
0x0800447E: F241 4000 MOVW R0, #0x1400
@@ -27741,5 +27687,6 @@
0x08004488: F44F 4100 MOV.W R1, #0x8000
0x0800448C: 9102 STR R1, [SP, #8]
- 0x0800448E: F00A FECD BL HAL_GPIO_WritePin ; 0x0800F22C
+ 0x0800448E: F00A FECD BL HAL_GPIO_WritePin ; 0x0800F22C
0x08004492: 9A09 LDR R2, [SP, #36]
0x08004494: F641 0000 MOVW R0, #0x1800
@@ -27748,5 +27695,6 @@
0x0800449E: F64B 6103 MOVW R1, #0xBE03
0x080044A2: 9104 STR R1, [SP, #16]
- 0x080044A4: F00A FEC2 BL HAL_GPIO_WritePin ; 0x0800F22C
+ 0x080044A4: F00A FEC2 BL HAL_GPIO_WritePin ; 0x0800F22C
0x080044A8: 9A09 LDR R2, [SP, #36]
0x080044AA: F640 4000 MOVW R0, #0x0C00
@@ -27755,5 +27703,5 @@
0x080044B4: F44F 6190 MOV.W R1, #0x0480
0x080044B8: 9105 STR R1, [SP, #20]
- 0x080044BA: F00A FEB7 BL HAL_GPIO_WritePin ; 0x0800F22C
+ 0x080044BA: F00A FEB7 BL HAL_GPIO_WritePin ; 0x0800F22C
0x080044BE: 9801 LDR R0, [SP, #4]
0x080044C0: 9909 LDR R1, [SP, #36]
@@ -27766,6 +27714,5 @@
0x080044D0: A915 ADD R1, SP, #84
0x080044D2: 910C STR R1, [SP, #48]
- 0x080044D4: F002 F8EE BL HAL_GPIO_Init ; 0x080066B4
+ 0x080044D4: F002 F8EE BL HAL_GPIO_Init ; 0x080066B4
0x080044D8: 9B00 LDR R3, [SP, #0]
0x080044DA: 9801 LDR R0, [SP, #4]
@@ -27778,6 +27725,5 @@
0x080044E8: 9217 STR R2, [SP, #92]
0x080044EA: 9218 STR R2, [SP, #96]
- 0x080044EC: F002 F8E2 BL HAL_GPIO_Init ; 0x080066B4
+ 0x080044EC: F002 F8E2 BL HAL_GPIO_Init ; 0x080066B4
0x080044F0: 9A07 LDR R2, [SP, #28]
0x080044F2: 9809 LDR R0, [SP, #36]
@@ -27789,6 +27735,5 @@
0x08004500: F640 0000 MOVW R0, #0x0800
0x08004504: F6C5 0002 MOVT R0, #0x5802
- 0x08004508: F002 F8D4 BL HAL_GPIO_Init ; 0x080066B4
+ 0x08004508: F002 F8D4 BL HAL_GPIO_Init ; 0x080066B4
0x0800450C: 9803 LDR R0, [SP, #12]
0x0800450E: 9B07 LDR R3, [SP, #28]
@@ -27799,6 +27744,5 @@
0x0800451C: 9316 STR R3, [SP, #88]
0x0800451E: 9217 STR R2, [SP, #92]
- 0x08004520: F002 F8C8 BL HAL_GPIO_Init ; 0x080066B4
+ 0x08004520: F002 F8C8 BL HAL_GPIO_Init ; 0x080066B4
0x08004524: 9A07 LDR R2, [SP, #28]
0x08004526: 9809 LDR R0, [SP, #36]
@@ -27811,6 +27755,5 @@
0x08004536: F6C5 0002 MOVT R0, #0x5802
0x0800453A: 900B STR R0, [SP, #44]
- 0x0800453C: F002 F8BA BL HAL_GPIO_Init ; 0x080066B4
+ 0x0800453C: F002 F8BA BL HAL_GPIO_Init ; 0x080066B4
0x08004540: 9A07 LDR R2, [SP, #28]
0x08004542: 9809 LDR R0, [SP, #36]
@@ -27822,6 +27765,5 @@
0x08004550: F240 4000 MOVW R0, #0x0400
0x08004554: F6C5 0002 MOVT R0, #0x5802
- 0x08004558: F002 F8AC BL HAL_GPIO_Init ; 0x080066B4
+ 0x08004558: F002 F8AC BL HAL_GPIO_Init ; 0x080066B4
0x0800455C: F8DD C008 LDR.W R12, [SP, #8]
0x08004560: 9803 LDR R0, [SP, #12]
@@ -27833,6 +27775,5 @@
0x0800456E: 9217 STR R2, [SP, #92]
0x08004570: 9218 STR R2, [SP, #96]
- 0x08004572: F002 F89F BL HAL_GPIO_Init ; 0x080066B4
+ 0x08004572: F002 F89F BL HAL_GPIO_Init ; 0x080066B4
0x08004576: F8DD C010 LDR.W R12, [SP, #16]
0x0800457A: 9808 LDR R0, [SP, #32]
@@ -27844,6 +27785,5 @@
0x08004588: 9217 STR R2, [SP, #92]
0x0800458A: 9218 STR R2, [SP, #96]
- 0x0800458C: F002 F892 BL HAL_GPIO_Init ; 0x080066B4
+ 0x0800458C: F002 F892 BL HAL_GPIO_Init ; 0x080066B4
0x08004590: F8DD C014 LDR.W R12, [SP, #20]
0x08004594: 9806 LDR R0, [SP, #24]
@@ -27855,6 +27795,5 @@
0x080045A2: 9217 STR R2, [SP, #92]
0x080045A4: 9218 STR R2, [SP, #96]
- 0x080045A6: F002 F885 BL HAL_GPIO_Init ; 0x080066B4
+ 0x080045A6: F002 F885 BL HAL_GPIO_Init ; 0x080066B4
0x080045AA: 9806 LDR R0, [SP, #24]
0x080045AC: 9A09 LDR R2, [SP, #36]
@@ -27864,6 +27803,5 @@
0x080045B6: 9216 STR R2, [SP, #88]
0x080045B8: 9217 STR R2, [SP, #92]
- 0x080045BA: F002 F87B BL HAL_GPIO_Init ; 0x080066B4
+ 0x080045BA: F002 F87B BL HAL_GPIO_Init ; 0x080066B4
0x080045BE: 9806 LDR R0, [SP, #24]
0x080045C0: 9B07 LDR R3, [SP, #28]
@@ -27874,6 +27812,5 @@
0x080045CE: 9316 STR R3, [SP, #88]
0x080045D0: 9217 STR R2, [SP, #92]
- 0x080045D2: F002 F86F BL HAL_GPIO_Init ; 0x080066B4
+ 0x080045D2: F002 F86F BL HAL_GPIO_Init ; 0x080066B4
0x080045D6: 9B07 LDR R3, [SP, #28]
0x080045D8: 9808 LDR R0, [SP, #32]
@@ -27884,6 +27821,5 @@
0x080045E6: 9316 STR R3, [SP, #88]
0x080045E8: 9217 STR R2, [SP, #92]
- 0x080045EA: F002 F863 BL HAL_GPIO_Init ; 0x080066B4
+ 0x080045EA: F002 F863 BL HAL_GPIO_Init ; 0x080066B4
0x080045EE: 9B09 LDR R3, [SP, #36]
0x080045F0: 9A0A LDR R2, [SP, #40]
@@ -27894,6 +27830,5 @@
0x080045FE: 9316 STR R3, [SP, #88]
0x08004600: 9217 STR R2, [SP, #92]
- 0x08004602: F002 F857 BL HAL_GPIO_Init ; 0x080066B4
+ 0x08004602: F002 F857 BL HAL_GPIO_Init ; 0x080066B4
0x08004606: B01A ADD SP, SP, #104
0x08004608: BD80 POP {R7, PC}
@@ -27901,5 +27836,5 @@
Section .text.main from charger_lto.o, size=282, align=2
-
main:
+
main:
0x0800460A: B580 PUSH {R7, LR}
0x0800460C: B084 SUB SP, SP, #16
@@ -27912,6 +27847,5 @@
0x08004622: F640 5246 MOVW R2, #0x0D46 ; 0x08010D46 = .rodata..L.str.2
0x08004626: F6C0 0201 MOVT R2, #0x0801 ; 0x08010D46 = .rodata..L.str.2
- 0x0800462A: F008 FD8E BL printf ; 0x0800D14A
+ 0x0800462A: F008 FD8E BL printf ; 0x0800D14A
0x0800462E: F000 F879 BL MPU_Config() ; 0x08004724
0x08004632: F64E 5014 MOVW R0, #0xED14
@@ -27990,21 +27924,15 @@
0x080046F6: F3BF 8F6F ISB SY
.L6:
- 0x080046FA: F000 FB55 BL HAL_Init ; 0x08004DA8
+ 0x080046FA: F000 FB55 BL HAL_Init ; 0x08004DA8
0x080046FE: F008 FDFB BL SystemClock_Config() ; 0x0800D2F8
- 0x08004702: F7FF FE3F BL MX_GPIO_Init ; 0x08004384
- 0x08004706: F7FF FE10 BL MX_DMA_Init ; 0x0800432A
- 0x0800470A: F000 F84A BL MX_RTC_Init ; 0x080047A2
- 0x0800470E: F000 F88C BL MX_SPI4_Init ; 0x0800482A
+ 0x08004702: F7FF FE3F BL MX_GPIO_Init ; 0x08004384
+ 0x08004706: F7FF FE10 BL MX_DMA_Init ; 0x0800432A
+ 0x0800470A: F000 F84A BL MX_RTC_Init ; 0x080047A2
+ 0x0800470E: F000 F88C BL MX_SPI4_Init ; 0x0800482A
0x08004712: F7FB FDDB BL DoNothing() ; 0x080002CC
- 0x08004716: F000 FA53 BL MX_USART3_UART_Init ; 0x08004BC0
- 0x0800471A: F000 F9BB BL MX_TIM3_Init ; 0x08004A94
- 0x0800471E: F008 FF39 BL MX_TIM8_Init ; 0x0800D594
+ 0x08004716: F000 FA53 BL MX_USART3_UART_Init ; 0x08004BC0
+ 0x0800471A: F000 F9BB BL MX_TIM3_Init ; 0x08004A94
+ 0x0800471E: F008 FF39 BL MX_TIM8_Init ; 0x0800D594
.L7:
0x08004722: E7FE B .L7 ; 0x08004722
@@ -28012,5 +27940,5 @@
Section .text.MPU_Config() from charger_lto.o, size=86, align=2
-
MPU_Config():
+
MPU_Config():
0x08004724: B580 PUSH {R7, LR}
0x08004726: B086 SUB SP, SP, #24
@@ -28021,6 +27949,5 @@
0x08004730: 9003 STR R0, [SP, #12]
0x08004732: 9002 STR R0, [SP, #8]
- 0x08004734: F000 FBEB BL HAL_MPU_Disable ; 0x08004F0E
+ 0x08004734: F000 FBEB BL HAL_MPU_Disable ; 0x08004F0E
0x08004738: 9801 LDR R0, [SP, #4]
0x0800473A: 2101 MOVS R1, #1
@@ -28039,8 +27966,8 @@
0x08004766: F88D 0017 STRB.W R0, [SP, #23]
0x0800476A: A802 ADD R0, SP, #8
- 0x0800476C: F009 F89C BL HAL_MPU_ConfigRegion ; 0x0800D8A8
+ 0x0800476C: F009 F89C BL HAL_MPU_ConfigRegion ; 0x0800D8A8
0x08004770: 2004 MOVS R0, #4
- 0x08004772: F009 F881 BL HAL_MPU_Enable ; 0x0800D878
+ 0x08004772: F009 F881 BL HAL_MPU_Enable ; 0x0800D878
0x08004776: B006 ADD SP, SP, #24
0x08004778: BD80 POP {R7, PC}
@@ -28048,5 +27975,5 @@
Section .text.HAL_TIM_PeriodElapsedCallback from charger_lto.o, size=30, align=2
-
HAL_TIM_PeriodElapsedCallback:
+
HAL_TIM_PeriodElapsedCallback:
0x0800477A: B580 PUSH {R7, LR}
0x0800477C: B082 SUB SP, SP, #8
@@ -28058,6 +27985,5 @@
0x0800478C: 4288 CMP R0, R1
0x0800478E: D101 BNE .L1 ; 0x08004794
- 0x08004790: F000 FB45 BL HAL_IncTick ; 0x08004E1E
+ 0x08004790: F000 FB45 BL HAL_IncTick ; 0x08004E1E
.L1:
0x08004794: B002 ADD SP, SP, #8
@@ -28066,5 +27992,5 @@
Section .text.assert_failed from charger_lto.o, size=10, align=2
-
assert_failed:
+
assert_failed:
0x08004798: B082 SUB SP, SP, #8
0x0800479A: 9001 STR R0, [SP, #4]
@@ -28075,5 +28001,5 @@
Section .text.MX_RTC_Init from charger_lto.o, size=58, align=2
-
MX_RTC_Init:
+
MX_RTC_Init:
0x080047A2: B580 PUSH {R7, LR}
0x080047A4: B082 SUB SP, SP, #8
@@ -28094,9 +28020,7 @@
0x080047CA: 61C1 STR R1, [R0, #28]
0x080047CC: 6141 STR R1, [R0, #20]
- 0x080047CE: F003 FEFD BL HAL_RTC_Init ; 0x080085CC
+ 0x080047CE: F003 FEFD BL HAL_RTC_Init ; 0x080085CC
0x080047D2: B108 CBZ R0, .L1 ; 0x080047D8
- 0x080047D4: F008 FDF8 BL Error_Handler ; 0x0800D3C8
+ 0x080047D4: F008 FDF8 BL Error_Handler ; 0x0800D3C8
.L1:
0x080047D8: B002 ADD SP, SP, #8
@@ -28105,5 +28029,5 @@
Section .text.HAL_RTC_MspInit from charger_lto.o, size=78, align=2
-
HAL_RTC_MspInit:
+
HAL_RTC_MspInit:
0x080047DC: B580 PUSH {R7, LR}
0x080047DE: B0B0 SUB SP, SP, #192
@@ -28111,6 +28035,5 @@
0x080047E2: 4668 MOV R0, SP
0x080047E4: 21B8 MOVS R1, #184
- 0x080047E6: F7FE FF69 BL __aeabi_memclr ; 0x080036BC
+ 0x080047E6: F7FE FF69 BL __aeabi_memclr ; 0x080036BC
0x080047EA: 982F LDR R0, [SP, #188]
0x080047EC: 6800 LDR R0, [R0]
@@ -28126,8 +28049,8 @@
0x08004808: 902C STR R0, [SP, #176]
0x0800480A: 4668 MOV R0, SP
- 0x0800480C: F7FC FECE BL HAL_RCCEx_PeriphCLKConfig ; 0x080015AC
+ 0x0800480C: F7FC FECE BL HAL_RCCEx_PeriphCLKConfig ; 0x080015AC
0x08004810: B108 CBZ R0, .L1 ; 0x08004816
- 0x08004812: F008 FDD9 BL Error_Handler ; 0x0800D3C8
+ 0x08004812: F008 FDD9 BL Error_Handler ; 0x0800D3C8
.L1:
0x08004816: F244 4170 MOVW R1, #0x4470
@@ -28142,5 +28065,5 @@
Section .text.MX_SPI4_Init from charger_lto.o, size=106, align=2
-
MX_SPI4_Init:
+
MX_SPI4_Init:
0x0800482A: B580 PUSH {R7, LR}
0x0800482C: B082 SUB SP, SP, #8
@@ -28180,9 +28103,7 @@
0x08004882: 6541 STR R1, [R0, #84]
0x08004884: 6581 STR R1, [R0, #88]
- 0x08004886: F004 F997 BL HAL_SPI_Init ; 0x08008BB8
+ 0x08004886: F004 F997 BL HAL_SPI_Init ; 0x08008BB8
0x0800488A: B108 CBZ R0, .L1 ; 0x08004890
- 0x0800488C: F008 FD9C BL Error_Handler ; 0x0800D3C8
+ 0x0800488C: F008 FD9C BL Error_Handler ; 0x0800D3C8
.L1:
0x08004890: B002 ADD SP, SP, #8
@@ -28191,5 +28112,6 @@
Section .text.HAL_InitTick from charger_lto.o, size=206, align=2
-
HAL_InitTick:
+
HAL_InitTick:
0x08004894: B580 PUSH {R7, LR}
0x08004896: B090 SUB SP, SP, #64
@@ -28202,7 +28124,9 @@
0x080048A4: 9000 STR R0, [SP, #0]
0x080048A6: 2200 MOVS R2, #0
- 0x080048A8: F000 FAE5 BL HAL_NVIC_SetPriority ; 0x08004E76
+ 0x080048A8: F000 FAE5 BL HAL_NVIC_SetPriority ; 0x08004E76
0x080048AC: 9800 LDR R0, [SP, #0]
- 0x080048AE: F008 FFB7 BL HAL_NVIC_EnableIRQ ; 0x0800D820
+ 0x080048AE: F008 FFB7 BL HAL_NVIC_EnableIRQ ; 0x0800D820
0x080048B2: 980E LDR R0, [SP, #56]
0x080048B4: F640 01E8 MOVW R1, #0x08E8 ; 0x240008E8 = uwTickPrio
@@ -28226,14 +28150,16 @@
0x080048E2: A806 ADD R0, SP, #24
0x080048E4: A902 ADD R1, SP, #8
- 0x080048E6: F00A FD29 BL HAL_RCC_GetClockConfig ; 0x0800F33C
+ 0x080048E6: F00A FD29 BL HAL_RCC_GetClockConfig ; 0x0800F33C
0x080048EA: 980B LDR R0, [SP, #44]
0x080048EC: 9004 STR R0, [SP, #16]
0x080048EE: 9804 LDR R0, [SP, #16]
0x080048F0: B918 CBNZ R0, .L3 ; 0x080048FA
- 0x080048F2: F003 FB80 BL HAL_RCC_GetPCLK1Freq ; 0x08007FF6
+ 0x080048F2: F003 FB80 BL HAL_RCC_GetPCLK1Freq ; 0x08007FF6
0x080048F6: 9005 STR R0, [SP, #20]
0x080048F8: E003 B .L4 ; 0x08004902
.L3:
- 0x080048FA: F003 FB7C BL HAL_RCC_GetPCLK1Freq ; 0x08007FF6
+ 0x080048FA: F003 FB7C BL HAL_RCC_GetPCLK1Freq ; 0x08007FF6
0x080048FE: 0040 LSLS R0, R0, #1
0x08004900: 9005 STR R0, [SP, #20]
@@ -28258,9 +28184,11 @@
0x08004938: 6101 STR R1, [R0, #16]
0x0800493A: 6081 STR R1, [R0, #8]
- 0x0800493C: F004 FCC9 BL HAL_TIM_Base_Init ; 0x080092D2
+ 0x0800493C: F004 FCC9 BL HAL_TIM_Base_Init ; 0x080092D2
0x08004940: B940 CBNZ R0, .L5 ; 0x08004954
0x08004942: F240 30F4 MOVW R0, #0x03F4 ; 0x240003F4 = htim7
0x08004946: F2C2 4000 MOVT R0, #0x2400 ; 0x240003F4 = htim7
- 0x0800494A: F00A FF87 BL HAL_TIM_Base_Start_IT ; 0x0800F85C
+ 0x0800494A: F00A FF87 BL HAL_TIM_Base_Start_IT ; 0x0800F85C
0x0800494E: F88D 003F STRB.W R0, [SP, #63]
0x08004952: E002 B .L6 ; 0x0800495A
@@ -28275,5 +28203,5 @@
Section .text.SystemInit from charger_lto.o, size=306, align=2
-
SystemInit:
+
SystemInit:
0x08004962: F64E 5188 MOVW R1, #0xED88
0x08004966: F2CE 0100 MOVT R1, #0xE000
@@ -28377,5 +28305,5 @@
Section .text.MX_TIM3_Init from charger_lto.o, size=206, align=2
-
MX_TIM3_Init:
+
MX_TIM3_Init:
0x08004A94: B580 PUSH {R7, LR}
0x08004A96: B090 SUB SP, SP, #64
@@ -28409,8 +28337,7 @@
0x08004AD8: 2180 MOVS R1, #128
0x08004ADA: 6181 STR R1, [R0, #24]
- 0x08004ADC: F004 FBF9 BL HAL_TIM_Base_Init ; 0x080092D2
+ 0x08004ADC: F004 FBF9 BL HAL_TIM_Base_Init ; 0x080092D2
0x08004AE0: B108 CBZ R0, .L1 ; 0x08004AE6
- 0x08004AE2: F008 FC71 BL Error_Handler ; 0x0800D3C8
+ 0x08004AE2: F008 FC71 BL Error_Handler ; 0x0800D3C8
.L1:
0x08004AE6: F44F 5080 MOV.W R0, #0x1000
@@ -28419,15 +28346,15 @@
0x08004AF0: F2C2 4000 MOVT R0, #0x2400 ; 0x24000440 = htim3
0x08004AF4: A90C ADD R1, SP, #48
- 0x08004AF6: F005 FF1A BL HAL_TIM_ConfigClockSource ; 0x0800A92E
+ 0x08004AF6: F005 FF1A BL HAL_TIM_ConfigClockSource ; 0x0800A92E
0x08004AFA: B108 CBZ R0, .L2 ; 0x08004B00
- 0x08004AFC: F008 FC64 BL Error_Handler ; 0x0800D3C8
+ 0x08004AFC: F008 FC64 BL Error_Handler ; 0x0800D3C8
.L2:
0x08004B00: F240 4040 MOVW R0, #0x0440 ; 0x24000440 = htim3
0x08004B04: F2C2 4000 MOVT R0, #0x2400 ; 0x24000440 = htim3
- 0x08004B08: F004 FDFD BL HAL_TIM_PWM_Init ; 0x08009706
+ 0x08004B08: F004 FDFD BL HAL_TIM_PWM_Init ; 0x08009706
0x08004B0C: B108 CBZ R0, .L3 ; 0x08004B12
- 0x08004B0E: F008 FC5B BL Error_Handler ; 0x0800D3C8
+ 0x08004B0E: F008 FC5B BL Error_Handler ; 0x0800D3C8
.L3:
0x08004B12: 2000 MOVS R0, #0
@@ -28437,8 +28364,7 @@
0x08004B1C: F2C2 4000 MOVT R0, #0x2400 ; 0x24000440 = htim3
0x08004B20: A909 ADD R1, SP, #36
- 0x08004B22: F00B F9A7 BL HAL_TIMEx_MasterConfigSynchronization ; 0x0800FE74
+ 0x08004B22: F00B F9A7 BL HAL_TIMEx_MasterConfigSynchronization ; 0x0800FE74
0x08004B26: B108 CBZ R0, .L4 ; 0x08004B2C
- 0x08004B28: F008 FC4E BL Error_Handler ; 0x0800D3C8
+ 0x08004B28: F008 FC4E BL Error_Handler ; 0x0800D3C8
.L4:
0x08004B2C: 2060 MOVS R0, #96
@@ -28454,12 +28380,12 @@
0x08004B44: A902 ADD R1, SP, #8
0x08004B46: 2204 MOVS R2, #4
- 0x08004B48: F7FE F9D2 BL HAL_TIM_PWM_ConfigChannel ; 0x08002EF0
+ 0x08004B48: F7FE F9D2 BL HAL_TIM_PWM_ConfigChannel ; 0x08002EF0
0x08004B4C: B108 CBZ R0, .L5 ; 0x08004B52
- 0x08004B4E: F008 FC3B BL Error_Handler ; 0x0800D3C8
+ 0x08004B4E: F008 FC3B BL Error_Handler ; 0x0800D3C8
.L5:
0x08004B52: F240 4040 MOVW R0, #0x0440 ; 0x24000440 = htim3
0x08004B56: F2C2 4000 MOVT R0, #0x2400 ; 0x24000440 = htim3
- 0x08004B5A: F000 F802 BL HAL_TIM_MspPostInit ; 0x08004B62
+ 0x08004B5A: F000 F802 BL HAL_TIM_MspPostInit ; 0x08004B62
0x08004B5E: B010 ADD SP, SP, #64
0x08004B60: BD80 POP {R7, PC}
@@ -28467,5 +28393,5 @@
Section .text.HAL_TIM_MspPostInit from charger_lto.o, size=94, align=2
-
HAL_TIM_MspPostInit:
+
HAL_TIM_MspPostInit:
0x08004B62: B580 PUSH {R7, LR}
0x08004B64: B088 SUB SP, SP, #32
@@ -28503,6 +28429,5 @@
0x08004BB2: F6C5 0002 MOVT R0, #0x5802
0x08004BB6: A902 ADD R1, SP, #8
- 0x08004BB8: F001 FD7C BL HAL_GPIO_Init ; 0x080066B4
+ 0x08004BB8: F001 FD7C BL HAL_GPIO_Init ; 0x080066B4
.L1:
0x08004BBC: B008 ADD SP, SP, #32
@@ -28511,5 +28436,5 @@
Section .text.MX_USART3_UART_Init from charger_lto.o, size=138, align=2
-
MX_USART3_UART_Init:
+
MX_USART3_UART_Init:
0x08004BC0: B580 PUSH {R7, LR}
0x08004BC2: B082 SUB SP, SP, #8
@@ -28538,32 +28463,30 @@
0x08004BFC: F44F 5100 MOV.W R1, #0x2000
0x08004C00: 6401 STR R1, [R0, #64]
- 0x08004C02: F006 FF90 BL HAL_UART_Init ; 0x0800BB26
+ 0x08004C02: F006 FF90 BL HAL_UART_Init ; 0x0800BB26
0x08004C06: B108 CBZ R0, .L1 ; 0x08004C0C
- 0x08004C08: F008 FBDE BL Error_Handler ; 0x0800D3C8
+ 0x08004C08: F008 FBDE BL Error_Handler ; 0x0800D3C8
.L1:
0x08004C0C: F240 00A8 MOVW R0, #168 ; 0x240000A8 = huart3
0x08004C10: F2C2 4000 MOVT R0, #0x2400 ; 0x240000A8 = huart3
0x08004C14: 2100 MOVS R1, #0
- 0x08004C16: F007 FF08 BL HAL_UARTEx_SetTxFifoThreshold ; 0x0800CA2A
+ 0x08004C16: F007 FF08 BL HAL_UARTEx_SetTxFifoThreshold ; 0x0800CA2A
0x08004C1A: B108 CBZ R0, .L2 ; 0x08004C20
- 0x08004C1C: F008 FBD4 BL Error_Handler ; 0x0800D3C8
+ 0x08004C1C: F008 FBD4 BL Error_Handler ; 0x0800D3C8
.L2:
0x08004C20: F240 00A8 MOVW R0, #168 ; 0x240000A8 = huart3
0x08004C24: F2C2 4000 MOVT R0, #0x2400 ; 0x240000A8 = huart3
0x08004C28: 2100 MOVS R1, #0
- 0x08004C2A: F007 FFBD BL HAL_UARTEx_SetRxFifoThreshold ; 0x0800CBA8
+ 0x08004C2A: F007 FFBD BL HAL_UARTEx_SetRxFifoThreshold ; 0x0800CBA8
0x08004C2E: B108 CBZ R0, .L3 ; 0x08004C34
- 0x08004C30: F008 FBCA BL Error_Handler ; 0x0800D3C8
+ 0x08004C30: F008 FBCA BL Error_Handler ; 0x0800D3C8
.L3:
0x08004C34: F240 00A8 MOVW R0, #168 ; 0x240000A8 = huart3
0x08004C38: F2C2 4000 MOVT R0, #0x2400 ; 0x240000A8 = huart3
- 0x08004C3C: F007 FE5C BL HAL_UARTEx_DisableFifoMode ; 0x0800C8F8
+ 0x08004C3C: F007 FE5C BL HAL_UARTEx_DisableFifoMode ; 0x0800C8F8
0x08004C40: B108 CBZ R0, .L4 ; 0x08004C46
- 0x08004C42: F008 FBC1 BL Error_Handler ; 0x0800D3C8
+ 0x08004C42: F008 FBC1 BL Error_Handler ; 0x0800D3C8
.L4:
0x08004C46: B002 ADD SP, SP, #8
@@ -28572,5 +28495,5 @@
Section .text.HAL_UART_MspInit from charger_lto.o, size=350, align=2
-
HAL_UART_MspInit:
+
HAL_UART_MspInit:
0x08004C4A: B580 PUSH {R7, LR}
0x08004C4C: B0BA SUB SP, SP, #232
@@ -28584,6 +28507,5 @@
0x08004C5C: A806 ADD R0, SP, #24
0x08004C5E: 21B8 MOVS R1, #184
- 0x08004C60: F7FE FD2C BL __aeabi_memclr ; 0x080036BC
+ 0x08004C60: F7FE FD2C BL __aeabi_memclr ; 0x080036BC
0x08004C64: 9839 LDR R0, [SP, #228]
0x08004C66: 6800 LDR R0, [R0]
@@ -28610,8 +28532,8 @@
0x08004C98: 9023 STR R0, [SP, #140]
0x08004C9A: A806 ADD R0, SP, #24
- 0x08004C9C: F7FC FC86 BL HAL_RCCEx_PeriphCLKConfig ; 0x080015AC
+ 0x08004C9C: F7FC FC86 BL HAL_RCCEx_PeriphCLKConfig ; 0x080015AC
0x08004CA0: B108 CBZ R0, .L1 ; 0x08004CA6
- 0x08004CA2: F008 FB91 BL Error_Handler ; 0x0800D3C8
+ 0x08004CA2: F008 FB91 BL Error_Handler ; 0x0800D3C8
.L1:
0x08004CA6: F244 40E8 MOVW R0, #0x44E8
@@ -28646,6 +28568,5 @@
0x08004CF4: F6C5 0002 MOVT R0, #0x5802
0x08004CF8: A934 ADD R1, SP, #208
- 0x08004CFA: F001 FCDB BL HAL_GPIO_Init ; 0x080066B4
+ 0x08004CFA: F001 FCDB BL HAL_GPIO_Init ; 0x080066B4
0x08004CFE: 9902 LDR R1, [SP, #8]
0x08004D00: F240 20B8 MOVW R0, #0x02B8 ; 0x240002B8 = hdma_usart3_rx
@@ -28666,9 +28587,7 @@
0x08004D26: 6201 STR R1, [R0, #32]
0x08004D28: 6241 STR R1, [R0, #36]
- 0x08004D2A: F000 F901 BL HAL_DMA_Init ; 0x08004F30
+ 0x08004D2A: F000 F901 BL HAL_DMA_Init ; 0x08004F30
0x08004D2E: B108 CBZ R0, .L2 ; 0x08004D34
- 0x08004D30: F008 FB4A BL Error_Handler ; 0x0800D3C8
+ 0x08004D30: F008 FB4A BL Error_Handler ; 0x0800D3C8
.L2:
0x08004D34: 9839 LDR R0, [SP, #228]
@@ -28698,9 +28617,7 @@
0x08004D74: 6202 STR R2, [R0, #32]
0x08004D76: 6241 STR R1, [R0, #36]
- 0x08004D78: F000 F8DA BL HAL_DMA_Init ; 0x08004F30
+ 0x08004D78: F000 F8DA BL HAL_DMA_Init ; 0x08004F30
0x08004D7C: B108 CBZ R0, .L3 ; 0x08004D82
- 0x08004D7E: F008 FB23 BL Error_Handler ; 0x0800D3C8
+ 0x08004D7E: F008 FB23 BL Error_Handler ; 0x0800D3C8
.L3:
0x08004D82: 9839 LDR R0, [SP, #228]
@@ -28714,7 +28631,9 @@
0x08004D96: 2200 MOVS R2, #0
0x08004D98: 4611 MOV R1, R2
- 0x08004D9A: F000 F86C BL HAL_NVIC_SetPriority ; 0x08004E76
+ 0x08004D9A: F000 F86C BL HAL_NVIC_SetPriority ; 0x08004E76
0x08004D9E: 9800 LDR R0, [SP, #0]
- 0x08004DA0: F008 FD3E BL HAL_NVIC_EnableIRQ ; 0x0800D820
+ 0x08004DA0: F008 FD3E BL HAL_NVIC_EnableIRQ ; 0x0800D820
.L4:
0x08004DA4: B03A ADD SP, SP, #232
@@ -28723,10 +28642,12 @@
Section .text.HAL_Init from charger_lto.o, size=118, align=2
-
HAL_Init:
+
HAL_Init:
0x08004DA8: B580 PUSH {R7, LR}
0x08004DAA: B082 SUB SP, SP, #8
0x08004DAC: 2003 MOVS R0, #3
- 0x08004DAE: F000 F843 BL HAL_NVIC_SetPriorityGrouping ; 0x08004E38
- 0x08004DB2: F7FC FA83 BL HAL_RCC_GetSysClockFreq ; 0x080012BC
+ 0x08004DAE: F000 F843 BL HAL_NVIC_SetPriorityGrouping ; 0x08004E38
+ 0x08004DB2: F7FC FA83 BL HAL_RCC_GetSysClockFreq ; 0x080012BC
0x08004DB6: F244 4218 MOVW R2, #0x4418
0x08004DBA: F6C5 0202 MOVT R2, #0x5802
@@ -28753,6 +28674,5 @@
0x08004DFA: 6008 STR R0, [R1]
0x08004DFC: 200F MOVS R0, #15
- 0x08004DFE: F7FF FD49 BL HAL_InitTick ; 0x08004894
+ 0x08004DFE: F7FF FD49 BL HAL_InitTick ; 0x08004894
0x08004E02: B118 CBZ R0, .L1 ; 0x08004E0C
0x08004E04: 2001 MOVS R0, #1
@@ -28760,6 +28680,5 @@
0x08004E0A: E004 B .L2 ; 0x08004E16
.L1:
- 0x08004E0C: F008 FB60 BL HAL_MspInit ; 0x0800D4D0
+ 0x08004E0C: F008 FB60 BL HAL_MspInit ; 0x0800D4D0
0x08004E10: 2000 MOVS R0, #0
0x08004E12: F88D 0007 STRB.W R0, [SP, #7]
@@ -28771,5 +28690,6 @@
Section .text.HAL_IncTick from charger_lto.o, size=26, align=2
-
HAL_IncTick:
+
HAL_IncTick:
0x08004E1E: F640 1000 MOVW R0, #0x0900 ; 0x24000900 = uwTickFreq
0x08004E22: F2C2 4000 MOVT R0, #0x2400 ; 0x24000900 = uwTickFreq
@@ -28784,5 +28704,5 @@
Section .text.HAL_NVIC_SetPriorityGrouping from charger_lto.o, size=62, align=2
-
HAL_NVIC_SetPriorityGrouping:
+
HAL_NVIC_SetPriorityGrouping:
0x08004E38: B580 PUSH {R7, LR}
0x08004E3A: B082 SUB SP, SP, #8
@@ -28809,9 +28729,9 @@
0x08004E62: F6C0 0001 MOVT R0, #0x0801 ; 0x08010AA2 = .rodata..L.str.32
0x08004E66: 2191 MOVS R1, #145
- 0x08004E68: F7FF FC96 BL assert_failed ; 0x08004798
+ 0x08004E68: F7FF FC96 BL assert_failed ; 0x08004798
.L3:
0x08004E6C: 9801 LDR R0, [SP, #4]
- 0x08004E6E: F008 FC7F BL __NVIC_SetPriorityGrouping ; 0x0800D770
+ 0x08004E6E: F008 FC7F BL __NVIC_SetPriorityGrouping ; 0x0800D770
0x08004E72: B002 ADD SP, SP, #8
0x08004E74: BD80 POP {R7, PC}
@@ -28819,5 +28739,5 @@
Section .text.HAL_NVIC_SetPriority from charger_lto.o, size=90, align=2
-
HAL_NVIC_SetPriority:
+
HAL_NVIC_SetPriority:
0x08004E76: B580 PUSH {R7, LR}
0x08004E78: B086 SUB SP, SP, #24
@@ -28833,6 +28753,5 @@
0x08004E8E: F6C0 0001 MOVT R0, #0x0801 ; 0x08010AA2 = .rodata..L.str.32
0x08004E92: 21A9 MOVS R1, #169
- 0x08004E94: F7FF FC80 BL assert_failed ; 0x08004798
+ 0x08004E94: F7FF FC80 BL assert_failed ; 0x08004798
.L2:
0x08004E98: 9804 LDR R0, [SP, #16]
@@ -28844,8 +28763,8 @@
0x08004EA4: F6C0 0001 MOVT R0, #0x0801 ; 0x08010AA2 = .rodata..L.str.32
0x08004EA8: 21AA MOVS R1, #170
- 0x08004EAA: F7FF FC75 BL assert_failed ; 0x08004798
+ 0x08004EAA: F7FF FC75 BL assert_failed ; 0x08004798
.L4:
- 0x08004EAE: F008 FC7D BL __NVIC_GetPriorityGrouping ; 0x0800D7AC
+ 0x08004EAE: F008 FC7D BL __NVIC_GetPriorityGrouping ; 0x0800D7AC
0x08004EB2: 9002 STR R0, [SP, #8]
0x08004EB4: F9BD 0016 LDRSH.W R0, [SP, #22]
@@ -28854,8 +28773,10 @@
0x08004EBC: 9904 LDR R1, [SP, #16]
0x08004EBE: 9A03 LDR R2, [SP, #12]
- 0x08004EC0: F008 FC7C BL NVIC_EncodePriority ; 0x0800D7BC
+ 0x08004EC0: F008 FC7C BL NVIC_EncodePriority ; 0x0800D7BC
0x08004EC4: 4601 MOV R1, R0
0x08004EC6: 9801 LDR R0, [SP, #4]
- 0x08004EC8: F000 F802 BL __NVIC_SetPriority ; 0x08004ED0
+ 0x08004EC8: F000 F802 BL __NVIC_SetPriority ; 0x08004ED0
0x08004ECC: B006 ADD SP, SP, #24
0x08004ECE: BD80 POP {R7, PC}
@@ -28863,5 +28784,5 @@
Section .text.__NVIC_SetPriority from charger_lto.o, size=62, align=2
-
__NVIC_SetPriority:
+
__NVIC_SetPriority:
0x08004ED0: B082 SUB SP, SP, #8
0x08004ED2: F8AD 0006 STRH.W R0, [SP, #6]
@@ -28891,5 +28812,5 @@
Section .text.HAL_MPU_Disable from charger_lto.o, size=34, align=2
-
HAL_MPU_Disable:
+
HAL_MPU_Disable:
0x08004F0E: F3BF 8F5F DMB SY
0x08004F12: F64E 5124 MOVW R1, #0xED24
@@ -28906,10 +28827,9 @@
Section .text.HAL_DMA_Init from charger_lto.o, size=3086, align=2
-
HAL_DMA_Init:
+
HAL_DMA_Init:
0x08004F30: B510 PUSH {R4, LR}
0x08004F32: B08E SUB SP, SP, #56
0x08004F34: 900C STR R0, [SP, #48]
- 0x08004F36: F008 FC15 BL HAL_GetTick ; 0x0800D764
+ 0x08004F36: F008 FC15 BL HAL_GetTick ; 0x0800D764
0x08004F3A: 900A STR R0, [SP, #40]
0x08004F3C: 980C LDR R0, [SP, #48]
@@ -29069,6 +28989,5 @@
0x080050D0: F6C0 0001 MOVT R0, #0x0801 ; 0x080107C0 = .rodata..L.str.47
0x080050D4: 21E6 MOVS R1, #230
- 0x080050D6: F7FF FB5F BL assert_failed ; 0x08004798
+ 0x080050D6: F7FF FB5F BL assert_failed ; 0x08004798
.L4:
0x080050DA: 980C LDR R0, [SP, #48]
@@ -29089,6 +29008,5 @@
0x080050F6: F6C0 0001 MOVT R0, #0x0801 ; 0x080107C0 = .rodata..L.str.47
0x080050FA: 21E7 MOVS R1, #231
- 0x080050FC: F7FF FB4C BL assert_failed ; 0x08004798
+ 0x080050FC: F7FF FB4C BL assert_failed ; 0x08004798
.L7:
0x08005100: 980C LDR R0, [SP, #48]
@@ -29105,6 +29023,5 @@
0x08005116: F6C0 0001 MOVT R0, #0x0801 ; 0x080107C0 = .rodata..L.str.47
0x0800511A: 21E8 MOVS R1, #232
- 0x0800511C: F7FF FB3C BL assert_failed ; 0x08004798
+ 0x0800511C: F7FF FB3C BL assert_failed ; 0x08004798
.L10:
0x08005120: 980C LDR R0, [SP, #48]
@@ -29121,6 +29038,5 @@
0x08005136: F6C0 0001 MOVT R0, #0x0801 ; 0x080107C0 = .rodata..L.str.47
0x0800513A: 21E9 MOVS R1, #233
- 0x0800513C: F7FF FB2C BL assert_failed ; 0x08004798
+ 0x0800513C: F7FF FB2C BL assert_failed ; 0x08004798
.L13:
0x08005140: 980C LDR R0, [SP, #48]
@@ -29141,6 +29057,5 @@
0x08005160: F6C0 0001 MOVT R0, #0x0801 ; 0x080107C0 = .rodata..L.str.47
0x08005164: 21EA MOVS R1, #234
- 0x08005166: F7FF FB17 BL assert_failed ; 0x08004798
+ 0x08005166: F7FF FB17 BL assert_failed ; 0x08004798
.L16:
0x0800516A: 980C LDR R0, [SP, #48]
@@ -29161,6 +29076,5 @@
0x0800518A: F6C0 0001 MOVT R0, #0x0801 ; 0x080107C0 = .rodata..L.str.47
0x0800518E: 21EB MOVS R1, #235
- 0x08005190: F7FF FB02 BL assert_failed ; 0x08004798
+ 0x08005190: F7FF FB02 BL assert_failed ; 0x08004798
.L19:
0x08005194: 980C LDR R0, [SP, #48]
@@ -29189,6 +29103,5 @@
0x080051C6: F6C0 0001 MOVT R0, #0x0801 ; 0x080107C0 = .rodata..L.str.47
0x080051CA: 21EC MOVS R1, #236
- 0x080051CC: F7FF FAE4 BL assert_failed ; 0x08004798
+ 0x080051CC: F7FF FAE4 BL assert_failed ; 0x08004798
.L22:
0x080051D0: 980C LDR R0, [SP, #48]
@@ -29213,6 +29126,5 @@
0x080051FA: F6C0 0001 MOVT R0, #0x0801 ; 0x080107C0 = .rodata..L.str.47
0x080051FE: 21ED MOVS R1, #237
- 0x08005200: F7FF FACA BL assert_failed ; 0x08004798
+ 0x08005200: F7FF FACA BL assert_failed ; 0x08004798
.L25:
0x08005204: 980C LDR R0, [SP, #48]
@@ -29358,6 +29270,5 @@
0x08005352: F6C0 0001 MOVT R0, #0x0801 ; 0x080107C0 = .rodata..L.str.47
0x08005356: 21F1 MOVS R1, #241
- 0x08005358: F7FF FA1E BL assert_failed ; 0x08004798
+ 0x08005358: F7FF FA1E BL assert_failed ; 0x08004798
.L28:
0x0800535C: 980C LDR R0, [SP, #48]
@@ -29374,6 +29285,5 @@
0x08005370: F6C0 0001 MOVT R0, #0x0801 ; 0x080107C0 = .rodata..L.str.47
0x08005374: 21F2 MOVS R1, #242
- 0x08005376: F7FF FA0F BL assert_failed ; 0x08004798
+ 0x08005376: F7FF FA0F BL assert_failed ; 0x08004798
.L31:
0x0800537A: 980C LDR R0, [SP, #48]
@@ -29402,6 +29312,5 @@
0x080053A6: F6C0 0001 MOVT R0, #0x0801 ; 0x080107C0 = .rodata..L.str.47
0x080053AA: 21F7 MOVS R1, #247
- 0x080053AC: F7FF F9F4 BL assert_failed ; 0x08004798
+ 0x080053AC: F7FF F9F4 BL assert_failed ; 0x08004798
.L34:
0x080053B0: 980C LDR R0, [SP, #48]
@@ -29426,6 +29335,5 @@
0x080053DA: F6C0 0001 MOVT R0, #0x0801 ; 0x080107C0 = .rodata..L.str.47
0x080053DE: 21F8 MOVS R1, #248
- 0x080053E0: F7FF F9DA BL assert_failed ; 0x08004798
+ 0x080053E0: F7FF F9DA BL assert_failed ; 0x08004798
.L37:
0x080053E4: 980C LDR R0, [SP, #48]
@@ -29450,6 +29358,5 @@
0x0800540E: F6C0 0001 MOVT R0, #0x0801 ; 0x080107C0 = .rodata..L.str.47
0x08005412: 21F9 MOVS R1, #249
- 0x08005414: F7FF F9C0 BL assert_failed ; 0x08004798
+ 0x08005414: F7FF F9C0 BL assert_failed ; 0x08004798
.L40:
0x08005418: 990C LDR R1, [SP, #48]
@@ -29574,6 +29481,5 @@
0x08005538: 07C0 LSLS R0, R0, #31
0x0800553A: B188 CBZ R0, .L45 ; 0x08005560
- 0x0800553C: F008 F912 BL HAL_GetTick ; 0x0800D764
+ 0x0800553C: F008 F912 BL HAL_GetTick ; 0x0800D764
0x08005540: 990A LDR R1, [SP, #40]
0x08005542: 1A40 SUBS R0, R0, R1
@@ -29727,5 +29633,6 @@
0x08005666: B168 CBZ R0, .L54 ; 0x08005684
0x08005668: 980C LDR R0, [SP, #48]
- 0x0800566A: F7FB FDC1 BL DMA_CheckFifoParam ; 0x080011F0
+ 0x0800566A: F7FB FDC1 BL DMA_CheckFifoParam ; 0x080011F0
0x0800566E: B148 CBZ R0, .L54 ; 0x08005684
0x08005670: 990C LDR R1, [SP, #48]
@@ -29743,5 +29650,6 @@
0x0800568A: 6148 STR R0, [R1, #20]
0x0800568C: 980C LDR R0, [SP, #48]
- 0x0800568E: F000 FA56 BL DMA_CalcBaseAndBitshift ; 0x08005B3E
+ 0x0800568E: F000 FA56 BL DMA_CalcBaseAndBitshift ; 0x08005B3E
0x08005692: 9009 STR R0, [SP, #36]
0x08005694: 980C LDR R0, [SP, #48]
@@ -29900,6 +29808,5 @@
0x08005808: F6C0 0001 MOVT R0, #0x0801 ; 0x080107C0 = .rodata..L.str.47
0x0800580C: F240 116B MOVW R1, #0x016B
- 0x08005810: F7FE FFC2 BL assert_failed ; 0x08004798
+ 0x08005810: F7FE FFC2 BL assert_failed ; 0x08004798
.L59:
0x08005814: 990C LDR R1, [SP, #48]
@@ -29965,5 +29872,6 @@
0x080058AC: 65C8 STR R0, [R1, #92]
0x080058AE: 980C LDR R0, [SP, #48]
- 0x080058B0: F000 F945 BL DMA_CalcBaseAndBitshift ; 0x08005B3E
+ 0x080058B0: F000 F945 BL DMA_CalcBaseAndBitshift ; 0x08005B3E
0x080058B4: 9008 STR R0, [SP, #32]
0x080058B6: 980C LDR R0, [SP, #48]
@@ -30183,5 +30091,5 @@
0x08005ACA: B358 CBZ R0, .L67 ; 0x08005B24
0x08005ACC: 980C LDR R0, [SP, #48]
- 0x08005ACE: F000 F905 BL DMA_CalcDMAMUXChannelBaseAndMask ; 0x08005CDC
+ 0x08005ACE: F000 F905 BL DMA_CalcDMAMUXChannelBaseAndMask ; 0x08005CDC
0x08005AD2: 980C LDR R0, [SP, #48]
0x08005AD4: 6880 LDR R0, [R0, #8]
@@ -30208,5 +30116,5 @@
0x08005AFC: D80B BHI .L66 ; 0x08005B16
0x08005AFE: 980C LDR R0, [SP, #48]
- 0x08005B00: F008 F864 BL DMA_CalcDMAMUXRequestGenBaseAndMask ; 0x0800DBCC
+ 0x08005B00: F008 F864 BL DMA_CalcDMAMUXRequestGenBaseAndMask ; 0x0800DBCC
0x08005B04: 980C LDR R0, [SP, #48]
0x08005B06: 6EC1 LDR R1, [R0, #108]
@@ -30241,5 +30149,5 @@
Section .text.DMA_CalcBaseAndBitshift from charger_lto.o, size=414, align=2
-
DMA_CalcBaseAndBitshift:
+
DMA_CalcBaseAndBitshift:
0x08005B3E: B083 SUB SP, SP, #12
0x08005B40: 9002 STR R0, [SP, #8]
@@ -30421,5 +30329,5 @@
Section .text.DMA_CalcDMAMUXChannelBaseAndMask from charger_lto.o, size=350, align=2
-
DMA_CalcDMAMUXChannelBaseAndMask:
+
DMA_CalcDMAMUXChannelBaseAndMask:
0x08005CDC: B084 SUB SP, SP, #16
0x08005CDE: 9003 STR R0, [SP, #12]
@@ -30565,10 +30473,9 @@
Section .text.HAL_DMA_Abort from charger_lto.o, size=2170, align=2
-
HAL_DMA_Abort:
+
HAL_DMA_Abort:
0x08005E3A: B580 PUSH {R7, LR}
0x08005E3C: B08A SUB SP, SP, #40
0x08005E3E: 9008 STR R0, [SP, #32]
- 0x08005E40: F007 FC90 BL HAL_GetTick ; 0x0800D764
+ 0x08005E40: F007 FC90 BL HAL_GetTick ; 0x0800D764
0x08005E44: 9004 STR R0, [SP, #16]
0x08005E46: 9808 LDR R0, [SP, #32]
@@ -31064,6 +30971,5 @@
0x080062EC: 07C0 LSLS R0, R0, #31
0x080062EE: B1A8 CBZ R0, .L12 ; 0x0800631C
- 0x080062F0: F007 FA38 BL HAL_GetTick ; 0x0800D764
+ 0x080062F0: F007 FA38 BL HAL_GetTick ; 0x0800D764
0x080062F4: 9904 LDR R1, [SP, #16]
0x080062F6: 1A40 SUBS R0, R0, R1
@@ -31468,5 +31374,5 @@
Section .text.HAL_GPIO_Init from charger_lto.o, size=1426, align=2
-
HAL_GPIO_Init:
+
HAL_GPIO_Init:
0x080066B4: B580 PUSH {R7, LR}
0x080066B6: B090 SUB SP, SP, #64
@@ -31534,6 +31440,5 @@
0x08006758: F6C0 0001 MOVT R0, #0x0801 ; 0x08010D5A = .rodata..L.str.54
0x0800675C: 21B3 MOVS R1, #179
- 0x0800675E: F7FE F81B BL assert_failed ; 0x08004798
+ 0x0800675E: F7FE F81B BL assert_failed ; 0x08004798
.L3:
0x08006762: 980E LDR R0, [SP, #56]
@@ -31548,6 +31453,5 @@
0x08006774: F6C0 0001 MOVT R0, #0x0801 ; 0x08010D5A = .rodata..L.str.54
0x08006778: 21B4 MOVS R1, #180
- 0x0800677A: F7FE F80D BL assert_failed ; 0x08004798
+ 0x0800677A: F7FE F80D BL assert_failed ; 0x08004798
.L5:
0x0800677E: 980E LDR R0, [SP, #56]
@@ -31604,6 +31508,5 @@
0x080067EE: F6C0 0001 MOVT R0, #0x0801 ; 0x08010D5A = .rodata..L.str.54
0x080067F2: 21B5 MOVS R1, #181
- 0x080067F4: F7FD FFD0 BL assert_failed ; 0x08004798
+ 0x080067F4: F7FD FFD0 BL assert_failed ; 0x08004798
.L8:
0x080067F8: 980E LDR R0, [SP, #56]
@@ -31655,6 +31558,5 @@
0x08006858: F6C0 0001 MOVT R0, #0x0801 ; 0x08010D5A = .rodata..L.str.54
0x0800685C: 21C4 MOVS R1, #196
- 0x0800685E: F7FD FF9B BL assert_failed ; 0x08004798
+ 0x0800685E: F7FD FF9B BL assert_failed ; 0x08004798
.L12:
0x08006862: 980F LDR R0, [SP, #60]
@@ -31722,6 +31624,5 @@
0x080068E6: F6C0 0001 MOVT R0, #0x0801 ; 0x08010D5A = .rodata..L.str.54
0x080068EA: 21D6 MOVS R1, #214
- 0x080068EC: F7FD FF54 BL assert_failed ; 0x08004798
+ 0x080068EC: F7FD FF54 BL assert_failed ; 0x08004798
.L16:
0x080068F0: 980F LDR R0, [SP, #60]
@@ -31808,6 +31709,5 @@
0x080069BA: F6C0 0001 MOVT R0, #0x0801 ; 0x08010D5A = .rodata..L.str.54
0x080069BE: 21E3 MOVS R1, #227
- 0x080069C0: F7FD FEEA BL assert_failed ; 0x08004798
+ 0x080069C0: F7FD FEEA BL assert_failed ; 0x08004798
.L20:
0x080069C4: 980E LDR R0, [SP, #56]
@@ -31820,6 +31720,5 @@
0x080069D2: F6C0 0001 MOVT R0, #0x0801 ; 0x08010D5A = .rodata..L.str.54
0x080069D6: 21E4 MOVS R1, #228
- 0x080069D8: F7FD FEDE BL assert_failed ; 0x08004798
+ 0x080069D8: F7FD FEDE BL assert_failed ; 0x08004798
.L22:
0x080069DC: 980F LDR R0, [SP, #60]
@@ -32112,5 +32011,5 @@
Section .text.HAL_PWR_EnableBkUpAccess from charger_lto.o, size=18, align=2
-
HAL_PWR_EnableBkUpAccess:
+
HAL_PWR_EnableBkUpAccess:
0x08006C46: F644 0100 MOVW R1, #0x4800
0x08006C4A: F6C5 0102 MOVT R1, #0x5802
@@ -32122,5 +32021,5 @@
Section .text.HAL_RCC_OscConfig from charger_lto.o, size=2974, align=2
-
HAL_RCC_OscConfig:
+
HAL_RCC_OscConfig:
0x08006C58: B580 PUSH {R7, LR}
0x08006C5A: B08C SUB SP, SP, #48
@@ -32170,6 +32069,5 @@
0x08006CBA: F6C0 0001 MOVT R0, #0x0801 ; 0x08010827 = .rodata..L.str.67
0x08006CBE: F240 11A1 MOVW R1, #0x01A1
- 0x08006CC2: F7FD FD69 BL assert_failed ; 0x08004798
+ 0x08006CC2: F7FD FD69 BL assert_failed ; 0x08004798
.L4:
0x08006CC6: 980A LDR R0, [SP, #40]
@@ -32195,6 +32093,5 @@
0x08006CF2: F6C0 0001 MOVT R0, #0x0801 ; 0x08010827 = .rodata..L.str.67
0x08006CF6: F44F 71D3 MOV.W R1, #0x01A6
- 0x08006CFA: F7FD FD4D BL assert_failed ; 0x08004798
+ 0x08006CFA: F7FD FD4D BL assert_failed ; 0x08004798
.L7:
0x08006CFE: F244 4010 MOVW R0, #0x4410
@@ -32282,6 +32179,5 @@
0x08006DCC: 6840 LDR R0, [R0, #4]
0x08006DCE: B1B8 CBZ R0, .L18 ; 0x08006E00
- 0x08006DD0: F006 FCC8 BL HAL_GetTick ; 0x0800D764
+ 0x08006DD0: F006 FCC8 BL HAL_GetTick ; 0x0800D764
0x08006DD4: 9009 STR R0, [SP, #36]
.L15:
@@ -32291,6 +32187,5 @@
0x08006DE0: F3C0 4040 UBFX R0, R0, #17, #1
0x08006DE4: B958 CBNZ R0, .L17 ; 0x08006DFE
- 0x08006DE6: F006 FCBD BL HAL_GetTick ; 0x0800D764
+ 0x08006DE6: F006 FCBD BL HAL_GetTick ; 0x0800D764
0x08006DEA: 9909 LDR R1, [SP, #36]
0x08006DEC: 1A40 SUBS R0, R0, R1
@@ -32305,6 +32200,5 @@
0x08006DFE: E016 B .L21 ; 0x08006E2E
.L18:
- 0x08006E00: F006 FCB0 BL HAL_GetTick ; 0x0800D764
+ 0x08006E00: F006 FCB0 BL HAL_GetTick ; 0x0800D764
0x08006E04: 9009 STR R0, [SP, #36]
.L19:
@@ -32314,6 +32208,5 @@
0x08006E10: F3C0 4040 UBFX R0, R0, #17, #1
0x08006E14: B158 CBZ R0, .L21 ; 0x08006E2E
- 0x08006E16: F006 FCA5 BL HAL_GetTick ; 0x0800D764
+ 0x08006E16: F006 FCA5 BL HAL_GetTick ; 0x0800D764
0x08006E1A: 9909 LDR R1, [SP, #36]
0x08006E1C: 1A40 SUBS R0, R0, R1
@@ -32360,6 +32253,5 @@
0x08006E6E: F6C0 0001 MOVT R0, #0x0801 ; 0x08010827 = .rodata..L.str.67
0x08006E72: F44F 71ED MOV.W R1, #0x01DA
- 0x08006E76: F7FD FC8F BL assert_failed ; 0x08004798
+ 0x08006E76: F7FD FC8F BL assert_failed ; 0x08004798
.L24:
0x08006E7A: 980A LDR R0, [SP, #40]
@@ -32372,6 +32264,5 @@
0x08006E88: F6C0 0001 MOVT R0, #0x0801 ; 0x08010827 = .rodata..L.str.67
0x08006E8C: F240 11DB MOVW R1, #0x01DB
- 0x08006E90: F7FD FC82 BL assert_failed ; 0x08004798
+ 0x08006E90: F7FD FC82 BL assert_failed ; 0x08004798
.L26:
0x08006E94: F244 4010 MOVW R0, #0x4410
@@ -32414,6 +32305,5 @@
0x08006EF6: 4310 ORRS R0, R2
0x08006EF8: 6008 STR R0, [R1]
- 0x08006EFA: F006 FC33 BL HAL_GetTick ; 0x0800D764
+ 0x08006EFA: F006 FC33 BL HAL_GetTick ; 0x0800D764
0x08006EFE: 9009 STR R0, [SP, #36]
.L29:
@@ -32423,6 +32313,5 @@
0x08006F0A: F3C0 0080 UBFX R0, R0, #2, #1
0x08006F0E: B958 CBNZ R0, .L31 ; 0x08006F28
- 0x08006F10: F006 FC28 BL HAL_GetTick ; 0x0800D764
+ 0x08006F10: F006 FC28 BL HAL_GetTick ; 0x0800D764
0x08006F14: 9909 LDR R1, [SP, #36]
0x08006F16: 1A40 SUBS R0, R0, R1
@@ -32456,6 +32345,5 @@
0x08006F5A: 4310 ORRS R0, R2
0x08006F5C: 6008 STR R0, [R1]
- 0x08006F5E: F006 FC01 BL HAL_GetTick ; 0x0800D764
+ 0x08006F5E: F006 FC01 BL HAL_GetTick ; 0x0800D764
0x08006F62: 9009 STR R0, [SP, #36]
.L33:
@@ -32465,6 +32353,5 @@
0x08006F6E: F3C0 0080 UBFX R0, R0, #2, #1
0x08006F72: B958 CBNZ R0, .L35 ; 0x08006F8C
- 0x08006F74: F006 FBF6 BL HAL_GetTick ; 0x0800D764
+ 0x08006F74: F006 FBF6 BL HAL_GetTick ; 0x0800D764
0x08006F78: 9909 LDR R1, [SP, #36]
0x08006F7A: 1A40 SUBS R0, R0, R1
@@ -32492,6 +32379,5 @@
0x08006FB0: F020 0001 BIC R0, R0, #1
0x08006FB4: 6008 STR R0, [R1]
- 0x08006FB6: F006 FBD5 BL HAL_GetTick ; 0x0800D764
+ 0x08006FB6: F006 FBD5 BL HAL_GetTick ; 0x0800D764
0x08006FBA: 9009 STR R0, [SP, #36]
.L37:
@@ -32501,6 +32387,5 @@
0x08006FC6: F3C0 0080 UBFX R0, R0, #2, #1
0x08006FCA: B158 CBZ R0, .L39 ; 0x08006FE4
- 0x08006FCC: F006 FBCA BL HAL_GetTick ; 0x0800D764
+ 0x08006FCC: F006 FBCA BL HAL_GetTick ; 0x0800D764
0x08006FD0: 9909 LDR R1, [SP, #36]
0x08006FD2: 1A40 SUBS R0, R0, R1
@@ -32531,6 +32416,5 @@
0x08007004: F6C0 0001 MOVT R0, #0x0801 ; 0x08010827 = .rodata..L.str.67
0x08007008: F240 212B MOVW R1, #0x022B
- 0x0800700C: F7FD FBC4 BL assert_failed ; 0x08004798
+ 0x0800700C: F7FD FBC4 BL assert_failed ; 0x08004798
.L42:
0x08007010: 980A LDR R0, [SP, #40]
@@ -32543,6 +32427,5 @@
0x0800701E: F6C0 0001 MOVT R0, #0x0801 ; 0x08010827 = .rodata..L.str.67
0x08007022: F44F 710B MOV.W R1, #0x022C
- 0x08007026: F7FD FBB7 BL assert_failed ; 0x08004798
+ 0x08007026: F7FD FBB7 BL assert_failed ; 0x08004798
.L44:
0x0800702A: F244 4010 MOVW R0, #0x4410
@@ -32597,6 +32480,5 @@
0x080070A6: F040 0080 ORR R0, R0, #128
0x080070AA: 6008 STR R0, [R1]
- 0x080070AC: F006 FB5A BL HAL_GetTick ; 0x0800D764
+ 0x080070AC: F006 FB5A BL HAL_GetTick ; 0x0800D764
0x080070B0: 9009 STR R0, [SP, #36]
.L48:
@@ -32606,6 +32488,5 @@
0x080070BC: F3C0 2000 UBFX R0, R0, #8, #1
0x080070C0: B950 CBNZ R0, .L50 ; 0x080070D8
- 0x080070C2: F006 FB4F BL HAL_GetTick ; 0x0800D764
+ 0x080070C2: F006 FB4F BL HAL_GetTick ; 0x0800D764
0x080070C6: 9909 LDR R1, [SP, #36]
0x080070C8: 1A40 SUBS R0, R0, R1
@@ -32633,6 +32514,5 @@
0x080070FC: F020 0080 BIC R0, R0, #128
0x08007100: 6008 STR R0, [R1]
- 0x08007102: F006 FB2F BL HAL_GetTick ; 0x0800D764
+ 0x08007102: F006 FB2F BL HAL_GetTick ; 0x0800D764
0x08007106: 9009 STR R0, [SP, #36]
.L52:
@@ -32642,6 +32522,5 @@
0x08007112: F3C0 2000 UBFX R0, R0, #8, #1
0x08007116: B150 CBZ R0, .L54 ; 0x0800712E
- 0x08007118: F006 FB24 BL HAL_GetTick ; 0x0800D764
+ 0x08007118: F006 FB24 BL HAL_GetTick ; 0x0800D764
0x0800711C: 9909 LDR R1, [SP, #36]
0x0800711E: 1A40 SUBS R0, R0, R1
@@ -32672,6 +32551,5 @@
0x0800714C: F6C0 0001 MOVT R0, #0x0801 ; 0x08010827 = .rodata..L.str.67
0x08007150: F240 216D MOVW R1, #0x026D
- 0x08007154: F7FD FB20 BL assert_failed ; 0x08004798
+ 0x08007154: F7FD FB20 BL assert_failed ; 0x08004798
.L57:
0x08007158: 980A LDR R0, [SP, #40]
@@ -32683,6 +32561,5 @@
0x08007168: F040 0001 ORR R0, R0, #1
0x0800716C: 6008 STR R0, [R1]
- 0x0800716E: F006 FAF9 BL HAL_GetTick ; 0x0800D764
+ 0x0800716E: F006 FAF9 BL HAL_GetTick ; 0x0800D764
0x08007172: 9009 STR R0, [SP, #36]
.L58:
@@ -32692,6 +32569,5 @@
0x0800717E: F3C0 0040 UBFX R0, R0, #1, #1
0x08007182: B950 CBNZ R0, .L60 ; 0x0800719A
- 0x08007184: F006 FAEE BL HAL_GetTick ; 0x0800D764
+ 0x08007184: F006 FAEE BL HAL_GetTick ; 0x0800D764
0x08007188: 9909 LDR R1, [SP, #36]
0x0800718A: 1A40 SUBS R0, R0, R1
@@ -32711,6 +32587,5 @@
0x080071A6: F020 0001 BIC R0, R0, #1
0x080071AA: 6008 STR R0, [R1]
- 0x080071AC: F006 FADA BL HAL_GetTick ; 0x0800D764
+ 0x080071AC: F006 FADA BL HAL_GetTick ; 0x0800D764
0x080071B0: 9009 STR R0, [SP, #36]
.L62:
@@ -32720,6 +32595,5 @@
0x080071BC: F3C0 0040 UBFX R0, R0, #1, #1
0x080071C0: B150 CBZ R0, .L64 ; 0x080071D8
- 0x080071C2: F006 FACF BL HAL_GetTick ; 0x0800D764
+ 0x080071C2: F006 FACF BL HAL_GetTick ; 0x0800D764
0x080071C6: 9909 LDR R1, [SP, #36]
0x080071C8: 1A40 SUBS R0, R0, R1
@@ -32750,6 +32624,5 @@
0x080071F6: F6C0 0001 MOVT R0, #0x0801 ; 0x08010827 = .rodata..L.str.67
0x080071FA: F44F 7126 MOV.W R1, #0x0298
- 0x080071FE: F7FD FACB BL assert_failed ; 0x08004798
+ 0x080071FE: F7FD FACB BL assert_failed ; 0x08004798
.L67:
0x08007202: 980A LDR R0, [SP, #40]
@@ -32761,6 +32634,5 @@
0x08007212: F440 5080 ORR R0, R0, #0x1000
0x08007216: 6008 STR R0, [R1]
- 0x08007218: F006 FAA4 BL HAL_GetTick ; 0x0800D764
+ 0x08007218: F006 FAA4 BL HAL_GetTick ; 0x0800D764
0x0800721C: 9009 STR R0, [SP, #36]
.L68:
@@ -32770,6 +32642,5 @@
0x08007228: F3C0 3040 UBFX R0, R0, #13, #1
0x0800722C: B950 CBNZ R0, .L70 ; 0x08007244
- 0x0800722E: F006 FA99 BL HAL_GetTick ; 0x0800D764
+ 0x0800722E: F006 FA99 BL HAL_GetTick ; 0x0800D764
0x08007232: 9909 LDR R1, [SP, #36]
0x08007234: 1A40 SUBS R0, R0, R1
@@ -32789,6 +32660,5 @@
0x08007250: F420 5080 BIC R0, R0, #0x1000
0x08007254: 6008 STR R0, [R1]
- 0x08007256: F006 FA85 BL HAL_GetTick ; 0x0800D764
+ 0x08007256: F006 FA85 BL HAL_GetTick ; 0x0800D764
0x0800725A: 9009 STR R0, [SP, #36]
.L72:
@@ -32798,6 +32668,5 @@
0x08007266: F3C0 3040 UBFX R0, R0, #13, #1
0x0800726A: B150 CBZ R0, .L74 ; 0x08007282
- 0x0800726C: F006 FA7A BL HAL_GetTick ; 0x0800D764
+ 0x0800726C: F006 FA7A BL HAL_GetTick ; 0x0800D764
0x08007270: 9909 LDR R1, [SP, #36]
0x08007272: 1A40 SUBS R0, R0, R1
@@ -32832,6 +32701,5 @@
0x080072AA: F6C0 0001 MOVT R0, #0x0801 ; 0x08010827 = .rodata..L.str.67
0x080072AE: F240 21C2 MOVW R1, #0x02C2
- 0x080072B2: F7FD FA71 BL assert_failed ; 0x08004798
+ 0x080072B2: F7FD FA71 BL assert_failed ; 0x08004798
.L77:
0x080072B6: F644 0100 MOVW R1, #0x4800
@@ -32840,6 +32708,5 @@
0x080072C0: F440 7080 ORR R0, R0, #0x0100
0x080072C4: 6008 STR R0, [R1]
- 0x080072C6: F006 FA4D BL HAL_GetTick ; 0x0800D764
+ 0x080072C6: F006 FA4D BL HAL_GetTick ; 0x0800D764
0x080072CA: 9009 STR R0, [SP, #36]
.L78:
@@ -32850,6 +32717,5 @@
0x080072D8: 2800 CMP R0, #0
0x080072DA: D40A BMI .L80 ; 0x080072F2
- 0x080072DC: F006 FA42 BL HAL_GetTick ; 0x0800D764
+ 0x080072DC: F006 FA42 BL HAL_GetTick ; 0x0800D764
0x080072E0: 9909 LDR R1, [SP, #36]
0x080072E2: 1A40 SUBS R0, R0, R1
@@ -32912,6 +32778,5 @@
0x08007368: 6880 LDR R0, [R0, #8]
0x0800736A: B1C0 CBZ R0, .L88 ; 0x0800739E
- 0x0800736C: F006 F9FA BL HAL_GetTick ; 0x0800D764
+ 0x0800736C: F006 F9FA BL HAL_GetTick ; 0x0800D764
0x08007370: 9009 STR R0, [SP, #36]
.L85:
@@ -32921,6 +32786,5 @@
0x0800737C: F3C0 0040 UBFX R0, R0, #1, #1
0x08007380: B960 CBNZ R0, .L87 ; 0x0800739C
- 0x08007382: F006 F9EF BL HAL_GetTick ; 0x0800D764
+ 0x08007382: F006 F9EF BL HAL_GetTick ; 0x0800D764
0x08007386: 9909 LDR R1, [SP, #36]
0x08007388: 1A40 SUBS R0, R0, R1
@@ -32936,6 +32800,5 @@
0x0800739C: E017 B .L91 ; 0x080073CE
.L88:
- 0x0800739E: F006 F9E1 BL HAL_GetTick ; 0x0800D764
+ 0x0800739E: F006 F9E1 BL HAL_GetTick ; 0x0800D764
0x080073A2: 9009 STR R0, [SP, #36]
.L89:
@@ -32945,6 +32808,5 @@
0x080073AE: F3C0 0040 UBFX R0, R0, #1, #1
0x080073B2: B160 CBZ R0, .L91 ; 0x080073CE
- 0x080073B4: F006 F9D6 BL HAL_GetTick ; 0x0800D764
+ 0x080073B4: F006 F9D6 BL HAL_GetTick ; 0x0800D764
0x080073B8: 9909 LDR R1, [SP, #36]
0x080073BA: 1A40 SUBS R0, R0, R1
@@ -32975,6 +32837,5 @@
0x080073EA: F6C0 0001 MOVT R0, #0x0801 ; 0x08010827 = .rodata..L.str.67
0x080073EE: F44F 713D MOV.W R1, #0x02F4
- 0x080073F2: F7FD F9D1 BL assert_failed ; 0x08004798
+ 0x080073F2: F7FD F9D1 BL assert_failed ; 0x08004798
.L94:
0x080073F6: 980A LDR R0, [SP, #40]
@@ -33013,6 +32874,5 @@
0x08007442: F6C0 0001 MOVT R0, #0x0801 ; 0x08010827 = .rodata..L.str.67
0x08007446: F240 21FD MOVW R1, #0x02FD
- 0x0800744A: F7FD F9A5 BL assert_failed ; 0x08004798
+ 0x0800744A: F7FD F9A5 BL assert_failed ; 0x08004798
.L97:
0x0800744E: 980A LDR R0, [SP, #40]
@@ -33037,6 +32897,5 @@
0x08007472: F6C0 0001 MOVT R0, #0x0801 ; 0x08010827 = .rodata..L.str.67
0x08007476: F240 21FE MOVW R1, #0x02FE
- 0x0800747A: F7FD F98D BL assert_failed ; 0x08004798
+ 0x0800747A: F7FD F98D BL assert_failed ; 0x08004798
.L100:
0x0800747E: 980A LDR R0, [SP, #40]
@@ -33053,6 +32912,5 @@
0x08007492: F6C0 0001 MOVT R0, #0x0801 ; 0x08010827 = .rodata..L.str.67
0x08007496: F240 21FF MOVW R1, #0x02FF
- 0x0800749A: F7FD F97D BL assert_failed ; 0x08004798
+ 0x0800749A: F7FD F97D BL assert_failed ; 0x08004798
.L103:
0x0800749E: 980A LDR R0, [SP, #40]
@@ -33068,6 +32926,5 @@
0x080074B2: F6C0 0001 MOVT R0, #0x0801 ; 0x08010827 = .rodata..L.str.67
0x080074B6: F44F 7140 MOV.W R1, #0x0300
- 0x080074BA: F7FD F96D BL assert_failed ; 0x08004798
+ 0x080074BA: F7FD F96D BL assert_failed ; 0x08004798
.L105:
0x080074BE: 980A LDR R0, [SP, #40]
@@ -33084,6 +32941,5 @@
0x080074D6: F6C0 0001 MOVT R0, #0x0801 ; 0x08010827 = .rodata..L.str.67
0x080074DA: F240 3101 MOVW R1, #0x0301
- 0x080074DE: F7FD F95B BL assert_failed ; 0x08004798
+ 0x080074DE: F7FD F95B BL assert_failed ; 0x08004798
.L107:
0x080074E2: 980A LDR R0, [SP, #40]
@@ -33099,6 +32955,5 @@
0x080074F6: F6C0 0001 MOVT R0, #0x0801 ; 0x08010827 = .rodata..L.str.67
0x080074FA: F240 3102 MOVW R1, #0x0302
- 0x080074FE: F7FD F94B BL assert_failed ; 0x08004798
+ 0x080074FE: F7FD F94B BL assert_failed ; 0x08004798
.L109:
0x08007502: 980A LDR R0, [SP, #40]
@@ -33114,6 +32969,5 @@
0x08007516: F6C0 0001 MOVT R0, #0x0801 ; 0x08010827 = .rodata..L.str.67
0x0800751A: F240 3103 MOVW R1, #0x0303
- 0x0800751E: F7FD F93B BL assert_failed ; 0x08004798
+ 0x0800751E: F7FD F93B BL assert_failed ; 0x08004798
.L111:
0x08007522: 980A LDR R0, [SP, #40]
@@ -33129,6 +32983,5 @@
0x08007536: F6C0 0001 MOVT R0, #0x0801 ; 0x08010827 = .rodata..L.str.67
0x0800753A: F44F 7141 MOV.W R1, #0x0304
- 0x0800753E: F7FD F92B BL assert_failed ; 0x08004798
+ 0x0800753E: F7FD F92B BL assert_failed ; 0x08004798
.L113:
0x08007542: 980A LDR R0, [SP, #40]
@@ -33141,6 +32994,5 @@
0x08007550: F6C0 0001 MOVT R0, #0x0801 ; 0x08010827 = .rodata..L.str.67
0x08007554: F240 3105 MOVW R1, #0x0305
- 0x08007558: F7FD F91E BL assert_failed ; 0x08004798
+ 0x08007558: F7FD F91E BL assert_failed ; 0x08004798
.L115:
0x0800755C: F244 4100 MOVW R1, #0x4400
@@ -33149,6 +33001,5 @@
0x08007566: F020 7080 BIC R0, R0, #0x01000000
0x0800756A: 6008 STR R0, [R1]
- 0x0800756C: F006 F8FA BL HAL_GetTick ; 0x0800D764
+ 0x0800756C: F006 F8FA BL HAL_GetTick ; 0x0800D764
0x08007570: 9009 STR R0, [SP, #36]
.L116:
@@ -33158,6 +33009,5 @@
0x0800757C: F3C0 6040 UBFX R0, R0, #25, #1
0x08007580: B150 CBZ R0, .L118 ; 0x08007598
- 0x08007582: F006 F8EF BL HAL_GetTick ; 0x0800D764
+ 0x08007582: F006 F8EF BL HAL_GetTick ; 0x0800D764
0x08007586: 9909 LDR R1, [SP, #36]
0x08007588: 1A40 SUBS R0, R0, R1
@@ -33249,6 +33099,5 @@
0x08007672: F040 7080 ORR R0, R0, #0x01000000
0x08007676: 6008 STR R0, [R1]
- 0x08007678: F006 F874 BL HAL_GetTick ; 0x0800D764
+ 0x08007678: F006 F874 BL HAL_GetTick ; 0x0800D764
0x0800767C: 9009 STR R0, [SP, #36]
.L119:
@@ -33258,6 +33107,5 @@
0x08007688: F3C0 6040 UBFX R0, R0, #25, #1
0x0800768C: B950 CBNZ R0, .L121 ; 0x080076A4
- 0x0800768E: F006 F869 BL HAL_GetTick ; 0x0800D764
+ 0x0800768E: F006 F869 BL HAL_GetTick ; 0x0800D764
0x08007692: 9909 LDR R1, [SP, #36]
0x08007694: 1A40 SUBS R0, R0, R1
@@ -33277,6 +33125,5 @@
0x080076B0: F020 7080 BIC R0, R0, #0x01000000
0x080076B4: 6008 STR R0, [R1]
- 0x080076B6: F006 F855 BL HAL_GetTick ; 0x0800D764
+ 0x080076B6: F006 F855 BL HAL_GetTick ; 0x0800D764
0x080076BA: 9009 STR R0, [SP, #36]
.L123:
@@ -33286,6 +33133,5 @@
0x080076C6: F3C0 6040 UBFX R0, R0, #25, #1
0x080076CA: B150 CBZ R0, .L125 ; 0x080076E2
- 0x080076CC: F006 F84A BL HAL_GetTick ; 0x0800D764
+ 0x080076CC: F006 F84A BL HAL_GetTick ; 0x0800D764
0x080076D0: 9909 LDR R1, [SP, #36]
0x080076D2: 1A40 SUBS R0, R0, R1
@@ -33377,6 +33223,5 @@
0x08007790: F6C0 0001 MOVT R0, #0x0801 ; 0x08010827 = .rodata..L.str.67
0x08007794: F44F 715B MOV.W R1, #0x036C
- 0x08007798: F7FC FFFE BL assert_failed ; 0x08004798
+ 0x08007798: F7FC FFFE BL assert_failed ; 0x08004798
.L130:
0x0800779C: F244 412C MOVW R1, #0x442C
@@ -33385,10 +33230,8 @@
0x080077A6: F020 0001 BIC R0, R0, #1
0x080077AA: 6008 STR R0, [R1]
- 0x080077AC: F005 FFDA BL HAL_GetTick ; 0x0800D764
+ 0x080077AC: F005 FFDA BL HAL_GetTick ; 0x0800D764
0x080077B0: 9009 STR R0, [SP, #36]
.L131:
- 0x080077B2: F005 FFD7 BL HAL_GetTick ; 0x0800D764
+ 0x080077B2: F005 FFD7 BL HAL_GetTick ; 0x0800D764
0x080077B6: 9909 LDR R1, [SP, #36]
0x080077B8: 1A40 SUBS R0, R0, R1
@@ -33420,5 +33263,5 @@
Section .text.HAL_RCC_ClockConfig from charger_lto.o, size=1962, align=2
-
HAL_RCC_ClockConfig:
+
HAL_RCC_ClockConfig:
0x080077F6: B580 PUSH {R7, LR}
0x080077F8: B086 SUB SP, SP, #24
@@ -33443,6 +33286,5 @@
0x0800781E: F6C0 0001 MOVT R0, #0x0801 ; 0x08010827 = .rodata..L.str.67
0x08007822: F240 31A7 MOVW R1, #0x03A7
- 0x08007826: F7FC FFB7 BL assert_failed ; 0x08004798
+ 0x08007826: F7FC FFB7 BL assert_failed ; 0x08004798
.L3:
0x0800782A: 9803 LDR R0, [SP, #12]
@@ -33499,6 +33341,5 @@
0x0800788E: F6C0 0001 MOVT R0, #0x0801 ; 0x08010827 = .rodata..L.str.67
0x08007892: F44F 716A MOV.W R1, #0x03A8
- 0x08007896: F7FC FF7F BL assert_failed ; 0x08004798
+ 0x08007896: F7FC FF7F BL assert_failed ; 0x08004798
.L6:
0x0800789A: 9803 LDR R0, [SP, #12]
@@ -33563,6 +33404,5 @@
0x08007922: F6C0 0001 MOVT R0, #0x0801 ; 0x08010827 = .rodata..L.str.67
0x08007926: F44F 7171 MOV.W R1, #0x03C4
- 0x0800792A: F7FC FF35 BL assert_failed ; 0x08004798
+ 0x0800792A: F7FC FF35 BL assert_failed ; 0x08004798
.L10:
0x0800792E: F244 4118 MOVW R1, #0x4418
@@ -33613,6 +33453,5 @@
0x08007990: F6C0 0001 MOVT R0, #0x0801 ; 0x08010827 = .rodata..L.str.67
0x08007994: F240 31D6 MOVW R1, #0x03D6
- 0x08007998: F7FC FEFE BL assert_failed ; 0x08004798
+ 0x08007998: F7FC FEFE BL assert_failed ; 0x08004798
.L14:
0x0800799C: F244 411C MOVW R1, #0x441C
@@ -33663,6 +33502,5 @@
0x08007A06: F6C0 0001 MOVT R0, #0x0801 ; 0x08010827 = .rodata..L.str.67
0x08007A0A: F240 31E7 MOVW R1, #0x03E7
- 0x08007A0E: F7FC FEC3 BL assert_failed ; 0x08004798
+ 0x08007A0E: F7FC FEC3 BL assert_failed ; 0x08004798
.L18:
0x08007A12: F244 411C MOVW R1, #0x441C
@@ -33713,6 +33551,5 @@
0x08007A74: F6C0 0001 MOVT R0, #0x0801 ; 0x08010827 = .rodata..L.str.67
0x08007A78: F240 31F9 MOVW R1, #0x03F9
- 0x08007A7C: F7FC FE8C BL assert_failed ; 0x08004798
+ 0x08007A7C: F7FC FE8C BL assert_failed ; 0x08004798
.L22:
0x08007A80: F244 4120 MOVW R1, #0x4420
@@ -33779,6 +33616,5 @@
0x08007B02: F6C0 0001 MOVT R0, #0x0801 ; 0x08010827 = .rodata..L.str.67
0x08007B06: F240 410C MOVW R1, #0x040C
- 0x08007B0A: F7FC FE45 BL assert_failed ; 0x08004798
+ 0x08007B0A: F7FC FE45 BL assert_failed ; 0x08004798
.L26:
0x08007B0E: F244 4118 MOVW R1, #0x4418
@@ -33837,6 +33673,5 @@
0x08007B8C: F6C0 0001 MOVT R0, #0x0801 ; 0x08010827 = .rodata..L.str.67
0x08007B90: F240 411C MOVW R1, #0x041C
- 0x08007B94: F7FC FE00 BL assert_failed ; 0x08004798
+ 0x08007B94: F7FC FE00 BL assert_failed ; 0x08004798
.L30:
0x08007B98: 9804 LDR R0, [SP, #16]
@@ -33861,6 +33696,5 @@
0x08007BBC: F6C0 0001 MOVT R0, #0x0801 ; 0x08010827 = .rodata..L.str.67
0x08007BC0: F240 411D MOVW R1, #0x041D
- 0x08007BC4: F7FC FDE8 BL assert_failed ; 0x08004798
+ 0x08007BC4: F7FC FDE8 BL assert_failed ; 0x08004798
.L33:
0x08007BC8: F244 4118 MOVW R1, #0x4418
@@ -33934,6 +33768,5 @@
0x08007C6E: 4310 ORRS R0, R2
0x08007C70: 6008 STR R0, [R1]
- 0x08007C72: F005 FD77 BL HAL_GetTick ; 0x0800D764
+ 0x08007C72: F005 FD77 BL HAL_GetTick ; 0x0800D764
0x08007C76: 9001 STR R0, [SP, #4]
.L41:
@@ -33947,6 +33780,5 @@
0x08007C8C: 4288 CMP R0, R1
0x08007C8E: D00C BEQ .L43 ; 0x08007CAA
- 0x08007C90: F005 FD68 BL HAL_GetTick ; 0x0800D764
+ 0x08007C90: F005 FD68 BL HAL_GetTick ; 0x0800D764
0x08007C94: 9901 LDR R1, [SP, #4]
0x08007C96: 1A40 SUBS R0, R0, R1
@@ -34014,6 +33846,5 @@
0x08007D16: F6C0 0001 MOVT R0, #0x0801 ; 0x08010827 = .rodata..L.str.67
0x08007D1A: F240 415E MOVW R1, #0x045E
- 0x08007D1E: F7FC FD3B BL assert_failed ; 0x08004798
+ 0x08007D1E: F7FC FD3B BL assert_failed ; 0x08004798
.L46:
0x08007D22: F244 4118 MOVW R1, #0x4418
@@ -34087,6 +33918,5 @@
0x08007DC0: F6C0 0001 MOVT R0, #0x0801 ; 0x08010827 = .rodata..L.str.67
0x08007DC4: F240 417F MOVW R1, #0x047F
- 0x08007DC8: F7FC FCE6 BL assert_failed ; 0x08004798
+ 0x08007DC8: F7FC FCE6 BL assert_failed ; 0x08004798
.L51:
0x08007DCC: F244 4118 MOVW R1, #0x4418
@@ -34137,6 +33967,5 @@
0x08007E2E: F6C0 0001 MOVT R0, #0x0801 ; 0x08010827 = .rodata..L.str.67
0x08007E32: F240 4191 MOVW R1, #0x0491
- 0x08007E36: F7FC FCAF BL assert_failed ; 0x08004798
+ 0x08007E36: F7FC FCAF BL assert_failed ; 0x08004798
.L55:
0x08007E3A: F244 411C MOVW R1, #0x441C
@@ -34187,6 +34016,5 @@
0x08007EA4: F6C0 0001 MOVT R0, #0x0801 ; 0x08010827 = .rodata..L.str.67
0x08007EA8: F240 41A3 MOVW R1, #0x04A3
- 0x08007EAC: F7FC FC74 BL assert_failed ; 0x08004798
+ 0x08007EAC: F7FC FC74 BL assert_failed ; 0x08004798
.L59:
0x08007EB0: F244 411C MOVW R1, #0x441C
@@ -34237,6 +34065,5 @@
0x08007F12: F6C0 0001 MOVT R0, #0x0801 ; 0x08010827 = .rodata..L.str.67
0x08007F16: F240 41B5 MOVW R1, #0x04B5
- 0x08007F1A: F7FC FC3D BL assert_failed ; 0x08004798
+ 0x08007F1A: F7FC FC3D BL assert_failed ; 0x08004798
.L63:
0x08007F1E: F244 4120 MOVW R1, #0x4420
@@ -34249,5 +34076,6 @@
0x08007F32: 6008 STR R0, [R1]
.L64:
- 0x08007F34: F7F9 F9C2 BL HAL_RCC_GetSysClockFreq ; 0x080012BC
+ 0x08007F34: F7F9 F9C2 BL HAL_RCC_GetSysClockFreq ; 0x080012BC
0x08007F38: F244 4218 MOVW R2, #0x4418
0x08007F3C: F6C5 0202 MOVT R2, #0x5802
@@ -34276,6 +34104,5 @@
0x08007F82: F2C2 4000 MOVT R0, #0x2400 ; 0x240008E8 = uwTickPrio
0x08007F86: 6800 LDR R0, [R0]
- 0x08007F88: F7FC FC84 BL HAL_InitTick ; 0x08004894
+ 0x08007F88: F7FC FC84 BL HAL_InitTick ; 0x08004894
0x08007F8C: F88D 000B STRB.W R0, [SP, #11]
0x08007F90: F89D 000B LDRB.W R0, [SP, #11]
@@ -34288,8 +34115,9 @@
Section .text.HAL_RCC_GetHCLKFreq from charger_lto.o, size=86, align=2
-
HAL_RCC_GetHCLKFreq:
+
HAL_RCC_GetHCLKFreq:
0x08007FA0: B580 PUSH {R7, LR}
0x08007FA2: B082 SUB SP, SP, #8
- 0x08007FA4: F7F9 F98A BL HAL_RCC_GetSysClockFreq ; 0x080012BC
+ 0x08007FA4: F7F9 F98A BL HAL_RCC_GetSysClockFreq ; 0x080012BC
0x08007FA8: F244 4218 MOVW R2, #0x4418
0x08007FAC: F6C5 0202 MOVT R2, #0x5802
@@ -34321,7 +34149,7 @@
Section .text.HAL_RCC_GetPCLK1Freq from charger_lto.o, size=38, align=2
-
HAL_RCC_GetPCLK1Freq:
+
HAL_RCC_GetPCLK1Freq:
0x08007FF6: B580 PUSH {R7, LR}
- 0x08007FF8: F7FF FFD2 BL HAL_RCC_GetHCLKFreq ; 0x08007FA0
+ 0x08007FF8: F7FF FFD2 BL HAL_RCC_GetHCLKFreq ; 0x08007FA0
0x08007FFC: F244 411C MOVW R1, #0x441C
0x08008000: F6C5 0102 MOVT R1, #0x5802
@@ -34337,7 +34165,8 @@
Section .text.HAL_RCC_GetPCLK2Freq from charger_lto.o, size=38, align=2
-
HAL_RCC_GetPCLK2Freq:
+
HAL_RCC_GetPCLK2Freq:
0x0800801C: B580 PUSH {R7, LR}
- 0x0800801E: F7FF FFBF BL HAL_RCC_GetHCLKFreq ; 0x08007FA0
+ 0x0800801E: F7FF FFBF BL HAL_RCC_GetHCLKFreq ; 0x08007FA0
0x08008022: F244 411C MOVW R1, #0x441C
0x08008026: F6C5 0102 MOVT R1, #0x5802
@@ -34353,5 +34182,5 @@
Section .text.RCCEx_PLL2_Config from charger_lto.o, size=686, align=2
-
RCCEx_PLL2_Config:
+
RCCEx_PLL2_Config:
0x08008042: B580 PUSH {R7, LR}
0x08008044: B086 SUB SP, SP, #24
@@ -34372,6 +34201,5 @@
0x08008064: F6C0 0001 MOVT R0, #0x0801 ; 0x08010B76 = .rodata..L.str.78
0x08008068: F640 6172 MOVW R1, #0x0E72
- 0x0800806C: F7FC FB94 BL assert_failed ; 0x08004798
+ 0x0800806C: F7FC FB94 BL assert_failed ; 0x08004798
.L2:
0x08008070: 9804 LDR R0, [SP, #16]
@@ -34388,6 +34216,5 @@
0x08008088: F6C0 0001 MOVT R0, #0x0801 ; 0x08010B76 = .rodata..L.str.78
0x0800808C: F640 6173 MOVW R1, #0x0E73
- 0x08008090: F7FC FB82 BL assert_failed ; 0x08004798
+ 0x08008090: F7FC FB82 BL assert_failed ; 0x08004798
.L4:
0x08008094: 9804 LDR R0, [SP, #16]
@@ -34403,6 +34230,5 @@
0x080080A8: F6C0 0001 MOVT R0, #0x0801 ; 0x08010B76 = .rodata..L.str.78
0x080080AC: F640 6174 MOVW R1, #0x0E74
- 0x080080B0: F7FC FB72 BL assert_failed ; 0x08004798
+ 0x080080B0: F7FC FB72 BL assert_failed ; 0x08004798
.L6:
0x080080B4: 9804 LDR R0, [SP, #16]
@@ -34418,6 +34244,5 @@
0x080080C8: F6C0 0001 MOVT R0, #0x0801 ; 0x08010B76 = .rodata..L.str.78
0x080080CC: F640 6175 MOVW R1, #0x0E75
- 0x080080D0: F7FC FB62 BL assert_failed ; 0x08004798
+ 0x080080D0: F7FC FB62 BL assert_failed ; 0x08004798
.L8:
0x080080D4: 9804 LDR R0, [SP, #16]
@@ -34433,6 +34258,5 @@
0x080080E8: F6C0 0001 MOVT R0, #0x0801 ; 0x08010B76 = .rodata..L.str.78
0x080080EC: F640 6176 MOVW R1, #0x0E76
- 0x080080F0: F7FC FB52 BL assert_failed ; 0x08004798
+ 0x080080F0: F7FC FB52 BL assert_failed ; 0x08004798
.L10:
0x080080F4: 9804 LDR R0, [SP, #16]
@@ -34457,6 +34281,5 @@
0x08008118: F6C0 0001 MOVT R0, #0x0801 ; 0x08010B76 = .rodata..L.str.78
0x0800811C: F640 6177 MOVW R1, #0x0E77
- 0x08008120: F7FC FB3A BL assert_failed ; 0x08004798
+ 0x08008120: F7FC FB3A BL assert_failed ; 0x08004798
.L13:
0x08008124: 9804 LDR R0, [SP, #16]
@@ -34473,6 +34296,5 @@
0x08008138: F6C0 0001 MOVT R0, #0x0801 ; 0x08010B76 = .rodata..L.str.78
0x0800813C: F640 6178 MOVW R1, #0x0E78
- 0x08008140: F7FC FB2A BL assert_failed ; 0x08004798
+ 0x08008140: F7FC FB2A BL assert_failed ; 0x08004798
.L16:
0x08008144: 9804 LDR R0, [SP, #16]
@@ -34485,6 +34307,5 @@
0x08008152: F6C0 0001 MOVT R0, #0x0801 ; 0x08010B76 = .rodata..L.str.78
0x08008156: F640 6179 MOVW R1, #0x0E79
- 0x0800815A: F7FC FB1D BL assert_failed ; 0x08004798
+ 0x0800815A: F7FC FB1D BL assert_failed ; 0x08004798
.L18:
0x0800815E: F244 4028 MOVW R0, #0x4428
@@ -34503,6 +34324,5 @@
0x08008182: F020 6080 BIC R0, R0, #0x04000000
0x08008186: 6008 STR R0, [R1]
- 0x08008188: F005 FAEC BL HAL_GetTick ; 0x0800D764
+ 0x08008188: F005 FAEC BL HAL_GetTick ; 0x0800D764
0x0800818C: 9002 STR R0, [SP, #8]
.L20:
@@ -34512,6 +34332,5 @@
0x08008198: F3C0 60C0 UBFX R0, R0, #27, #1
0x0800819C: B150 CBZ R0, .L22 ; 0x080081B4
- 0x0800819E: F005 FAE1 BL HAL_GetTick ; 0x0800D764
+ 0x0800819E: F005 FAE1 BL HAL_GetTick ; 0x0800D764
0x080081A2: 9902 LDR R1, [SP, #8]
0x080081A4: 1A40 SUBS R0, R0, R1
@@ -34616,6 +34435,5 @@
0x080082AE: F040 6080 ORR R0, R0, #0x04000000
0x080082B2: 6008 STR R0, [R1]
- 0x080082B4: F005 FA56 BL HAL_GetTick ; 0x0800D764
+ 0x080082B4: F005 FA56 BL HAL_GetTick ; 0x0800D764
0x080082B8: 9002 STR R0, [SP, #8]
.L26:
@@ -34625,6 +34443,5 @@
0x080082C4: F3C0 60C0 UBFX R0, R0, #27, #1
0x080082C8: B950 CBNZ R0, .L28 ; 0x080082E0
- 0x080082CA: F005 FA4B BL HAL_GetTick ; 0x0800D764
+ 0x080082CA: F005 FA4B BL HAL_GetTick ; 0x0800D764
0x080082CE: 9902 LDR R1, [SP, #8]
0x080082D0: 1A40 SUBS R0, R0, R1
@@ -34646,5 +34463,5 @@
Section .text.RCCEx_PLL3_Config from charger_lto.o, size=694, align=2
-
RCCEx_PLL3_Config:
+
RCCEx_PLL3_Config:
0x080082F0: B580 PUSH {R7, LR}
0x080082F2: B086 SUB SP, SP, #24
@@ -34665,6 +34482,5 @@
0x08008312: F6C0 0001 MOVT R0, #0x0801 ; 0x08010B76 = .rodata..L.str.78
0x08008316: F640 61DA MOVW R1, #0x0EDA
- 0x0800831A: F7FC FA3D BL assert_failed ; 0x08004798
+ 0x0800831A: F7FC FA3D BL assert_failed ; 0x08004798
.L2:
0x0800831E: 9804 LDR R0, [SP, #16]
@@ -34681,6 +34497,5 @@
0x08008336: F6C0 0001 MOVT R0, #0x0801 ; 0x08010B76 = .rodata..L.str.78
0x0800833A: F640 61DB MOVW R1, #0x0EDB
- 0x0800833E: F7FC FA2B BL assert_failed ; 0x08004798
+ 0x0800833E: F7FC FA2B BL assert_failed ; 0x08004798
.L4:
0x08008342: 9804 LDR R0, [SP, #16]
@@ -34696,6 +34511,5 @@
0x08008356: F6C0 0001 MOVT R0, #0x0801 ; 0x08010B76 = .rodata..L.str.78
0x0800835A: F640 61DC MOVW R1, #0x0EDC
- 0x0800835E: F7FC FA1B BL assert_failed ; 0x08004798
+ 0x0800835E: F7FC FA1B BL assert_failed ; 0x08004798
.L6:
0x08008362: 9804 LDR R0, [SP, #16]
@@ -34711,6 +34525,5 @@
0x08008376: F6C0 0001 MOVT R0, #0x0801 ; 0x08010B76 = .rodata..L.str.78
0x0800837A: F640 61DD MOVW R1, #0x0EDD
- 0x0800837E: F7FC FA0B BL assert_failed ; 0x08004798
+ 0x0800837E: F7FC FA0B BL assert_failed ; 0x08004798
.L8:
0x08008382: 9804 LDR R0, [SP, #16]
@@ -34726,6 +34539,5 @@
0x08008396: F6C0 0001 MOVT R0, #0x0801 ; 0x08010B76 = .rodata..L.str.78
0x0800839A: F640 61DE MOVW R1, #0x0EDE
- 0x0800839E: F7FC F9FB BL assert_failed ; 0x08004798
+ 0x0800839E: F7FC F9FB BL assert_failed ; 0x08004798
.L10:
0x080083A2: 9804 LDR R0, [SP, #16]
@@ -34750,6 +34562,5 @@
0x080083CC: F6C0 0001 MOVT R0, #0x0801 ; 0x08010B76 = .rodata..L.str.78
0x080083D0: F640 61DF MOVW R1, #0x0EDF
- 0x080083D4: F7FC F9E0 BL assert_failed ; 0x08004798
+ 0x080083D4: F7FC F9E0 BL assert_failed ; 0x08004798
.L13:
0x080083D8: 9804 LDR R0, [SP, #16]
@@ -34766,6 +34577,5 @@
0x080083EE: F6C0 0001 MOVT R0, #0x0801 ; 0x08010B76 = .rodata..L.str.78
0x080083F2: F44F 616E MOV.W R1, #0x0EE0
- 0x080083F6: F7FC F9CF BL assert_failed ; 0x08004798
+ 0x080083F6: F7FC F9CF BL assert_failed ; 0x08004798
.L16:
0x080083FA: 9804 LDR R0, [SP, #16]
@@ -34778,6 +34588,5 @@
0x08008408: F6C0 0001 MOVT R0, #0x0801 ; 0x08010B76 = .rodata..L.str.78
0x0800840C: F640 61E1 MOVW R1, #0x0EE1
- 0x08008410: F7FC F9C2 BL assert_failed ; 0x08004798
+ 0x08008410: F7FC F9C2 BL assert_failed ; 0x08004798
.L18:
0x08008414: F244 4028 MOVW R0, #0x4428
@@ -34796,6 +34605,5 @@
0x08008438: F020 5080 BIC R0, R0, #0x10000000
0x0800843C: 6008 STR R0, [R1]
- 0x0800843E: F005 F991 BL HAL_GetTick ; 0x0800D764
+ 0x0800843E: F005 F991 BL HAL_GetTick ; 0x0800D764
0x08008442: 9002 STR R0, [SP, #8]
.L20:
@@ -34805,6 +34613,5 @@
0x0800844E: F3C0 7040 UBFX R0, R0, #29, #1
0x08008452: B150 CBZ R0, .L22 ; 0x0800846A
- 0x08008454: F005 F986 BL HAL_GetTick ; 0x0800D764
+ 0x08008454: F005 F986 BL HAL_GetTick ; 0x0800D764
0x08008458: 9902 LDR R1, [SP, #8]
0x0800845A: 1A40 SUBS R0, R0, R1
@@ -34909,6 +34716,5 @@
0x08008564: F040 5080 ORR R0, R0, #0x10000000
0x08008568: 6008 STR R0, [R1]
- 0x0800856A: F005 F8FB BL HAL_GetTick ; 0x0800D764
+ 0x0800856A: F005 F8FB BL HAL_GetTick ; 0x0800D764
0x0800856E: 9002 STR R0, [SP, #8]
.L26:
@@ -34918,6 +34724,5 @@
0x0800857A: F3C0 7040 UBFX R0, R0, #29, #1
0x0800857E: B950 CBNZ R0, .L28 ; 0x08008596
- 0x08008580: F005 F8F0 BL HAL_GetTick ; 0x0800D764
+ 0x08008580: F005 F8F0 BL HAL_GetTick ; 0x0800D764
0x08008584: 9902 LDR R1, [SP, #8]
0x08008586: 1A40 SUBS R0, R0, R1
@@ -34939,7 +34744,8 @@
Section .text.HAL_RCCEx_GetD3PCLK1Freq from charger_lto.o, size=38, align=2
-
HAL_RCCEx_GetD3PCLK1Freq:
+
HAL_RCCEx_GetD3PCLK1Freq:
0x080085A6: B580 PUSH {R7, LR}
- 0x080085A8: F7FF FCFA BL HAL_RCC_GetHCLKFreq ; 0x08007FA0
+ 0x080085A8: F7FF FCFA BL HAL_RCC_GetHCLKFreq ; 0x08007FA0
0x080085AC: F244 4120 MOVW R1, #0x4420
0x080085B0: F6C5 0102 MOVT R1, #0x5802
@@ -34955,5 +34761,5 @@
Section .text.HAL_RTC_Init from charger_lto.o, size=494, align=2
-
HAL_RTC_Init:
+
HAL_RTC_Init:
0x080085CC: B580 PUSH {R7, LR}
0x080085CE: B082 SUB SP, SP, #8
@@ -34975,6 +34781,5 @@
0x080085F6: F6C0 0001 MOVT R0, #0x0801 ; 0x0801088E = .rodata..L.str.81
0x080085FA: 21FD MOVS R1, #253
- 0x080085FC: F7FC F8CC BL assert_failed ; 0x08004798
+ 0x080085FC: F7FC F8CC BL assert_failed ; 0x08004798
.L2:
0x08008600: 9801 LDR R0, [SP, #4]
@@ -34991,6 +34796,5 @@
0x08008614: F6C0 0001 MOVT R0, #0x0801 ; 0x0801088E = .rodata..L.str.81
0x08008618: 21FE MOVS R1, #254
- 0x0800861A: F7FC F8BD BL assert_failed ; 0x08004798
+ 0x0800861A: F7FC F8BD BL assert_failed ; 0x08004798
.L5:
0x0800861E: 9801 LDR R0, [SP, #4]
@@ -35003,6 +34807,5 @@
0x0800862C: F6C0 0001 MOVT R0, #0x0801 ; 0x0801088E = .rodata..L.str.81
0x08008630: 21FF MOVS R1, #255
- 0x08008632: F7FC F8B1 BL assert_failed ; 0x08004798
+ 0x08008632: F7FC F8B1 BL assert_failed ; 0x08004798
.L7:
0x08008636: 9801 LDR R0, [SP, #4]
@@ -35015,6 +34818,5 @@
0x08008644: F6C0 0001 MOVT R0, #0x0801 ; 0x0801088E = .rodata..L.str.81
0x08008648: F44F 7180 MOV.W R1, #0x0100
- 0x0800864C: F7FC F8A4 BL assert_failed ; 0x08004798
+ 0x0800864C: F7FC F8A4 BL assert_failed ; 0x08004798
.L9:
0x08008650: 9801 LDR R0, [SP, #4]
@@ -35039,6 +34841,5 @@
0x0800867A: F6C0 0001 MOVT R0, #0x0801 ; 0x0801088E = .rodata..L.str.81
0x0800867E: F240 1101 MOVW R1, #0x0101
- 0x08008682: F7FC F889 BL assert_failed ; 0x08004798
+ 0x08008682: F7FC F889 BL assert_failed ; 0x08004798
.L12:
0x08008686: 9801 LDR R0, [SP, #4]
@@ -35055,6 +34856,5 @@
0x0800869A: F6C0 0001 MOVT R0, #0x0801 ; 0x0801088E = .rodata..L.str.81
0x0800869E: F44F 7181 MOV.W R1, #0x0102
- 0x080086A2: F7FC F879 BL assert_failed ; 0x08004798
+ 0x080086A2: F7FC F879 BL assert_failed ; 0x08004798
.L15:
0x080086A6: 9801 LDR R0, [SP, #4]
@@ -35071,6 +34871,5 @@
0x080086BC: F6C0 0001 MOVT R0, #0x0801 ; 0x0801088E = .rodata..L.str.81
0x080086C0: F240 1103 MOVW R1, #0x0103
- 0x080086C4: F7FC F868 BL assert_failed ; 0x08004798
+ 0x080086C4: F7FC F868 BL assert_failed ; 0x08004798
.L18:
0x080086C8: 9801 LDR R0, [SP, #4]
@@ -35087,6 +34886,5 @@
0x080086DC: F6C0 0001 MOVT R0, #0x0801 ; 0x0801088E = .rodata..L.str.81
0x080086E0: F44F 7182 MOV.W R1, #0x0104
- 0x080086E4: F7FC F858 BL assert_failed ; 0x08004798
+ 0x080086E4: F7FC F858 BL assert_failed ; 0x08004798
.L21:
0x080086E8: 9801 LDR R0, [SP, #4]
@@ -35097,6 +34895,5 @@
0x080086F4: F881 0020 STRB.W R0, [R1, #32]
0x080086F8: 9801 LDR R0, [SP, #4]
- 0x080086FA: F7FC F86F BL HAL_RTC_MspInit ; 0x080047DC
+ 0x080086FA: F7FC F86F BL HAL_RTC_MspInit ; 0x080047DC
.L22:
0x080086FE: 9901 LDR R1, [SP, #4]
@@ -35118,5 +34915,6 @@
0x08008722: 6248 STR R0, [R1, #36]
0x08008724: 9801 LDR R0, [SP, #4]
- 0x08008726: F000 F848 BL RTC_EnterInitMode ; 0x080087BA
+ 0x08008726: F000 F848 BL RTC_EnterInitMode ; 0x080087BA
0x0800872A: F88D 0003 STRB.W R0, [SP, #3]
0x0800872E: F89D 0003 LDRB.W R0, [SP, #3]
@@ -35146,5 +34944,6 @@
0x08008766: 6108 STR R0, [R1, #16]
0x08008768: 9801 LDR R0, [SP, #4]
- 0x0800876A: F000 F85D BL RTC_ExitInitMode ; 0x08008828
+ 0x0800876A: F000 F85D BL RTC_ExitInitMode ; 0x08008828
0x0800876E: F88D 0003 STRB.W R0, [SP, #3]
.L23:
@@ -35186,5 +34985,5 @@
Section .text.RTC_EnterInitMode from charger_lto.o, size=110, align=2
-
RTC_EnterInitMode:
+
RTC_EnterInitMode:
0x080087BA: B580 PUSH {R7, LR}
0x080087BC: B084 SUB SP, SP, #16
@@ -35202,6 +35001,5 @@
0x080087D6: F04F 30FF MOV.W R0, #0xFFFFFFFF
0x080087DA: 60C8 STR R0, [R1, #12]
- 0x080087DC: F004 FFC2 BL HAL_GetTick ; 0x0800D764
+ 0x080087DC: F004 FFC2 BL HAL_GetTick ; 0x0800D764
0x080087E0: 9002 STR R0, [SP, #8]
.L1:
@@ -35223,6 +35021,5 @@
0x08008800: 07C0 LSLS R0, R0, #31
0x08008802: B168 CBZ R0, .L4 ; 0x08008820
- 0x08008804: F004 FFAE BL HAL_GetTick ; 0x0800D764
+ 0x08008804: F004 FFAE BL HAL_GetTick ; 0x0800D764
0x08008808: 9902 LDR R1, [SP, #8]
0x0800880A: 1A40 SUBS R0, R0, R1
@@ -35242,5 +35039,5 @@
Section .text.RTC_ExitInitMode from charger_lto.o, size=126, align=2
-
RTC_ExitInitMode:
+
RTC_ExitInitMode:
0x08008828: B580 PUSH {R7, LR}
0x0800882A: B082 SUB SP, SP, #8
@@ -35260,5 +35057,6 @@
0x08008852: D40A BMI .L2 ; 0x0800886A
0x08008854: 9801 LDR R0, [SP, #4]
- 0x08008856: F006 FDB5 BL HAL_RTC_WaitForSynchro ; 0x0800F3C4
+ 0x08008856: F006 FDB5 BL HAL_RTC_WaitForSynchro ; 0x0800F3C4
0x0800885A: B128 CBZ R0, .L1 ; 0x08008868
0x0800885C: 9901 LDR R1, [SP, #4]
@@ -35275,5 +35073,6 @@
0x08008878: 6008 STR R0, [R1]
0x0800887A: 9801 LDR R0, [SP, #4]
- 0x0800887C: F006 FDA2 BL HAL_RTC_WaitForSynchro ; 0x0800F3C4
+ 0x0800887C: F006 FDA2 BL HAL_RTC_WaitForSynchro ; 0x0800F3C4
0x08008880: B128 CBZ R0, .L3 ; 0x0800888E
0x08008882: 9901 LDR R1, [SP, #4]
@@ -35294,5 +35093,5 @@
Section .text.HAL_SD_IRQHandler from charger_lto.o, size=786, align=2
-
HAL_SD_IRQHandler:
+
HAL_SD_IRQHandler:
0x080088A6: B580 PUSH {R7, LR}
0x080088A8: B084 SUB SP, SP, #16
@@ -35312,6 +35111,5 @@
0x080088C6: D503 BPL .L1 ; 0x080088D0
0x080088C8: 9803 LDR R0, [SP, #12]
- 0x080088CA: F006 FDA1 BL SD_Read_IT ; 0x0800F410
+ 0x080088CA: F006 FDA1 BL SD_Read_IT ; 0x0800F410
0x080088CE: E171 B .L30 ; 0x08008BB4
.L1:
@@ -35357,5 +35155,6 @@
0x0800892E: 9803 LDR R0, [SP, #12]
0x08008930: 6800 LDR R0, [R0]
- 0x08008932: F007 FD49 BL SDMMC_CmdStopTransfer ; 0x080103C8
+ 0x08008932: F007 FD49 BL SDMMC_CmdStopTransfer ; 0x080103C8
0x08008936: 9002 STR R0, [SP, #8]
0x08008938: 9802 LDR R0, [SP, #8]
@@ -35367,5 +35166,6 @@
0x08008944: 6348 STR R0, [R1, #52]
0x08008946: 9803 LDR R0, [SP, #12]
- 0x08008948: F004 FE20 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
+ 0x08008948: F004 FE20 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
.L3:
0x0800894C: 9803 LDR R0, [SP, #12]
@@ -35389,9 +35189,11 @@
.L4:
0x0800897A: 9803 LDR R0, [SP, #12]
- 0x0800897C: F004 FE06 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
+ 0x0800897C: F004 FE06 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
0x08008980: E002 B .L6 ; 0x08008988
.L5:
0x08008982: 9803 LDR R0, [SP, #12]
- 0x08008984: F004 FE02 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
+ 0x08008984: F004 FE02 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
.L6:
0x08008988: E048 B .L14 ; 0x08008A1C
@@ -35422,5 +35224,6 @@
0x080089BC: 9803 LDR R0, [SP, #12]
0x080089BE: 6800 LDR R0, [R0]
- 0x080089C0: F007 FD02 BL SDMMC_CmdStopTransfer ; 0x080103C8
+ 0x080089C0: F007 FD02 BL SDMMC_CmdStopTransfer ; 0x080103C8
0x080089C4: 9002 STR R0, [SP, #8]
0x080089C6: 9802 LDR R0, [SP, #8]
@@ -35432,5 +35235,6 @@
0x080089D2: 6348 STR R0, [R1, #52]
0x080089D4: 9803 LDR R0, [SP, #12]
- 0x080089D6: F004 FDD9 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
+ 0x080089D6: F004 FDD9 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
.L9:
0x080089DA: 9903 LDR R1, [SP, #12]
@@ -35450,5 +35254,6 @@
.L10:
0x080089FC: 9803 LDR R0, [SP, #12]
- 0x080089FE: F004 FDC5 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
+ 0x080089FE: F004 FDC5 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
.L11:
0x08008A02: F89D 0004 LDRB.W R0, [SP, #4]
@@ -35461,5 +35266,6 @@
.L12:
0x08008A14: 9803 LDR R0, [SP, #12]
- 0x08008A16: F004 FDB9 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
+ 0x08008A16: F004 FDB9 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
.L13:
0x08008A1A: E7FF B .L14 ; 0x08008A1C
@@ -35477,6 +35283,5 @@
0x08008A32: D503 BPL .L16 ; 0x08008A3C
0x08008A34: 9803 LDR R0, [SP, #12]
- 0x08008A36: F006 FD27 BL SD_Write_IT ; 0x0800F488
+ 0x08008A36: F006 FD27 BL SD_Write_IT ; 0x0800F488
0x08008A3A: E0BB B .L30 ; 0x08008BB4
.L16:
@@ -35553,5 +35358,6 @@
0x08008AE0: 9803 LDR R0, [SP, #12]
0x08008AE2: 6800 LDR R0, [R0]
- 0x08008AE4: F007 FC70 BL SDMMC_CmdStopTransfer ; 0x080103C8
+ 0x08008AE4: F007 FC70 BL SDMMC_CmdStopTransfer ; 0x080103C8
0x08008AE8: 4602 MOV R2, R0
0x08008AEA: 9903 LDR R1, [SP, #12]
@@ -35579,5 +35385,6 @@
0x08008B1E: 62C8 STR R0, [R1, #44]
0x08008B20: 9803 LDR R0, [SP, #12]
- 0x08008B22: F004 FD33 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
+ 0x08008B22: F004 FD33 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
0x08008B26: E019 B .L23 ; 0x08008B5C
.L21:
@@ -35602,5 +35409,6 @@
0x08008B50: F881 0030 STRB.W R0, [R1, #48]
0x08008B54: 9803 LDR R0, [SP, #12]
- 0x08008B56: F004 FD19 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
+ 0x08008B56: F004 FD19 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
.L22:
0x08008B5A: E7FF B .L23 ; 0x08008B5C
@@ -35628,9 +35436,11 @@
0x08008B88: D503 BPL .L25 ; 0x08008B92
0x08008B8A: 9803 LDR R0, [SP, #12]
- 0x08008B8C: F004 FCFE BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
+ 0x08008B8C: F004 FCFE BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
0x08008B90: E002 B .L26 ; 0x08008B98
.L25:
0x08008B92: 9803 LDR R0, [SP, #12]
- 0x08008B94: F004 FCFA BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
+ 0x08008B94: F004 FCFA BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
.L26:
0x08008B98: E00B B .L29 ; 0x08008BB2
@@ -35641,9 +35451,11 @@
0x08008BA2: D503 BPL .L28 ; 0x08008BAC
0x08008BA4: 9803 LDR R0, [SP, #12]
- 0x08008BA6: F004 FCF1 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
+ 0x08008BA6: F004 FCF1 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
0x08008BAA: E002 B .L29 ; 0x08008BB2
.L28:
0x08008BAC: 9803 LDR R0, [SP, #12]
- 0x08008BAE: F004 FCED BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
+ 0x08008BAE: F004 FCED BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
.L29:
0x08008BB2: E7FF B .L30 ; 0x08008BB4
@@ -35654,5 +35466,5 @@
Section .text.HAL_SPI_Init from charger_lto.o, size=1522, align=2
-
HAL_SPI_Init:
+
HAL_SPI_Init:
0x08008BB8: B580 PUSH {R7, LR}
0x08008BBA: B086 SUB SP, SP, #24
@@ -35706,6 +35518,5 @@
0x08008C30: F6C0 0001 MOVT R0, #0x0801 ; 0x080108F5 = .rodata..L.str.89
0x08008C34: 21FE MOVS R1, #254
- 0x08008C36: F7FB FDAF BL assert_failed ; 0x08004798
+ 0x08008C36: F7FB FDAF BL assert_failed ; 0x08004798
.L4:
0x08008C3A: 9804 LDR R0, [SP, #16]
@@ -35722,6 +35533,5 @@
0x08008C50: F6C0 0001 MOVT R0, #0x0801 ; 0x080108F5 = .rodata..L.str.89
0x08008C54: 21FF MOVS R1, #255
- 0x08008C56: F7FB FD9F BL assert_failed ; 0x08004798
+ 0x08008C56: F7FB FD9F BL assert_failed ; 0x08004798
.L7:
0x08008C5A: 9804 LDR R0, [SP, #16]
@@ -35746,6 +35556,5 @@
0x08008C84: F6C0 0001 MOVT R0, #0x0801 ; 0x080108F5 = .rodata..L.str.89
0x08008C88: F44F 7180 MOV.W R1, #0x0100
- 0x08008C8C: F7FB FD84 BL assert_failed ; 0x08004798
+ 0x08008C8C: F7FB FD84 BL assert_failed ; 0x08004798
.L10:
0x08008C90: 9804 LDR R0, [SP, #16]
@@ -35875,6 +35684,5 @@
0x08008D86: F6C0 0001 MOVT R0, #0x0801 ; 0x080108F5 = .rodata..L.str.89
0x08008D8A: F240 1101 MOVW R1, #0x0101
- 0x08008D8E: F7FB FD03 BL assert_failed ; 0x08004798
+ 0x08008D8E: F7FB FD03 BL assert_failed ; 0x08004798
.L13:
0x08008D92: 9804 LDR R0, [SP, #16]
@@ -35948,6 +35756,5 @@
0x08008E28: F6C0 0001 MOVT R0, #0x0801 ; 0x080108F5 = .rodata..L.str.89
0x08008E2C: F44F 7181 MOV.W R1, #0x0102
- 0x08008E30: F7FB FCB2 BL assert_failed ; 0x08004798
+ 0x08008E30: F7FB FCB2 BL assert_failed ; 0x08004798
.L16:
0x08008E34: 9804 LDR R0, [SP, #16]
@@ -35968,6 +35775,5 @@
0x08008E54: F6C0 0001 MOVT R0, #0x0801 ; 0x080108F5 = .rodata..L.str.89
0x08008E58: F240 1103 MOVW R1, #0x0103
- 0x08008E5C: F7FB FC9C BL assert_failed ; 0x08004798
+ 0x08008E5C: F7FB FC9C BL assert_failed ; 0x08004798
.L19:
0x08008E60: 9804 LDR R0, [SP, #16]
@@ -35984,6 +35790,5 @@
0x08008E76: F6C0 0001 MOVT R0, #0x0801 ; 0x080108F5 = .rodata..L.str.89
0x08008E7A: F44F 7182 MOV.W R1, #0x0104
- 0x08008E7E: F7FB FC8B BL assert_failed ; 0x08004798
+ 0x08008E7E: F7FB FC8B BL assert_failed ; 0x08004798
.L22:
0x08008E82: 9804 LDR R0, [SP, #16]
@@ -36024,6 +35829,5 @@
0x08008ED4: F6C0 0001 MOVT R0, #0x0801 ; 0x080108F5 = .rodata..L.str.89
0x08008ED8: F240 1105 MOVW R1, #0x0105
- 0x08008EDC: F7FB FC5C BL assert_failed ; 0x08004798
+ 0x08008EDC: F7FB FC5C BL assert_failed ; 0x08004798
.L25:
0x08008EE0: 9804 LDR R0, [SP, #16]
@@ -36040,6 +35844,5 @@
0x08008EF6: F6C0 0001 MOVT R0, #0x0801 ; 0x080108F5 = .rodata..L.str.89
0x08008EFA: F44F 7183 MOV.W R1, #0x0106
- 0x08008EFE: F7FB FC4B BL assert_failed ; 0x08004798
+ 0x08008EFE: F7FB FC4B BL assert_failed ; 0x08004798
.L28:
0x08008F02: 9804 LDR R0, [SP, #16]
@@ -36056,6 +35859,5 @@
0x08008F18: F6C0 0001 MOVT R0, #0x0801 ; 0x080108F5 = .rodata..L.str.89
0x08008F1C: F240 1107 MOVW R1, #0x0107
- 0x08008F20: F7FB FC3A BL assert_failed ; 0x08004798
+ 0x08008F20: F7FB FC3A BL assert_failed ; 0x08004798
.L31:
0x08008F24: 9804 LDR R0, [SP, #16]
@@ -36075,6 +35877,5 @@
0x08008F40: F6C0 0001 MOVT R0, #0x0801 ; 0x080108F5 = .rodata..L.str.89
0x08008F44: F44F 7185 MOV.W R1, #0x010A
- 0x08008F48: F7FB FC26 BL assert_failed ; 0x08004798
+ 0x08008F48: F7FB FC26 BL assert_failed ; 0x08004798
.L34:
0x08008F4C: 9804 LDR R0, [SP, #16]
@@ -36091,6 +35892,5 @@
0x08008F62: F6C0 0001 MOVT R0, #0x0801 ; 0x080108F5 = .rodata..L.str.89
0x08008F66: F240 110B MOVW R1, #0x010B
- 0x08008F6A: F7FB FC15 BL assert_failed ; 0x08004798
+ 0x08008F6A: F7FB FC15 BL assert_failed ; 0x08004798
.L37:
0x08008F6E: 9904 LDR R1, [SP, #16]
@@ -36124,5 +35924,6 @@
.L38:
0x08008FB4: 9804 LDR R0, [SP, #16]
- 0x08008FB6: F000 F8F8 BL SPI_GetPacketSize ; 0x080091AA
+ 0x08008FB6: F000 F8F8 BL SPI_GetPacketSize ; 0x080091AA
0x08008FBA: 9002 STR R0, [SP, #8]
0x08008FBC: 9804 LDR R0, [SP, #16]
@@ -36182,6 +35983,5 @@
0x0800903C: F881 0080 STRB.W R0, [R1, #128]
0x08009040: 9804 LDR R0, [SP, #16]
- 0x08009042: F004 F9C3 BL HAL_SPI_MspInit ; 0x0800D3CC
+ 0x08009042: F004 F9C3 BL HAL_SPI_MspInit ; 0x0800D3CC
.L43:
0x08009046: 9904 LDR R1, [SP, #16]
@@ -36343,5 +36143,5 @@
Section .text.SPI_GetPacketSize from charger_lto.o, size=42, align=2
-
SPI_GetPacketSize:
+
SPI_GetPacketSize:
0x080091AA: B083 SUB SP, SP, #12
0x080091AC: 9002 STR R0, [SP, #8]
@@ -36367,5 +36167,5 @@
Section .text.SPI_CloseTransfer from charger_lto.o, size=254, align=2
-
SPI_CloseTransfer:
+
SPI_CloseTransfer:
0x080091D4: B082 SUB SP, SP, #8
0x080091D6: 9001 STR R0, [SP, #4]
@@ -36473,5 +36273,5 @@
Section .text.HAL_TIM_Base_Init from charger_lto.o, size=674, align=2
-
HAL_TIM_Base_Init:
+
HAL_TIM_Base_Init:
0x080092D2: B580 PUSH {R7, LR}
0x080092D4: B084 SUB SP, SP, #16
@@ -36583,6 +36383,5 @@
0x080093E2: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x080093E6: F44F 718B MOV.W R1, #0x0116
- 0x080093EA: F7FB F9D5 BL assert_failed ; 0x08004798
+ 0x080093EA: F7FB F9D5 BL assert_failed ; 0x08004798
.L4:
0x080093EE: 9802 LDR R0, [SP, #8]
@@ -36611,6 +36410,5 @@
0x0800941A: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800941E: F240 1117 MOVW R1, #0x0117
- 0x08009422: F7FB F9B9 BL assert_failed ; 0x08004798
+ 0x08009422: F7FB F9B9 BL assert_failed ; 0x08004798
.L7:
0x08009426: 9802 LDR R0, [SP, #8]
@@ -36631,6 +36429,5 @@
0x08009446: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800944A: F44F 718C MOV.W R1, #0x0118
- 0x0800944E: F7FB F9A3 BL assert_failed ; 0x08004798
+ 0x0800944E: F7FB F9A3 BL assert_failed ; 0x08004798
.L10:
0x08009452: 9802 LDR R0, [SP, #8]
@@ -36686,6 +36483,5 @@
0x080094C2: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x080094C6: F240 1119 MOVW R1, #0x0119
- 0x080094CA: F7FB F965 BL assert_failed ; 0x08004798
+ 0x080094CA: F7FB F965 BL assert_failed ; 0x08004798
.L15:
0x080094CE: 9802 LDR R0, [SP, #8]
@@ -36702,6 +36498,5 @@
0x080094E2: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x080094E6: F44F 718D MOV.W R1, #0x011A
- 0x080094EA: F7FB F955 BL assert_failed ; 0x08004798
+ 0x080094EA: F7FB F955 BL assert_failed ; 0x08004798
.L18:
0x080094EE: 9802 LDR R0, [SP, #8]
@@ -36712,5 +36507,6 @@
0x080094FA: F881 003C STRB.W R0, [R1, #60]
0x080094FE: 9802 LDR R0, [SP, #8]
- 0x08009500: F004 F8BE BL HAL_TIM_Base_MspInit ; 0x0800D680
+ 0x08009500: F004 F8BE BL HAL_TIM_Base_MspInit ; 0x0800D680
.L19:
0x08009504: 9902 LDR R1, [SP, #8]
@@ -36719,5 +36515,6 @@
0x0800950C: 9902 LDR R1, [SP, #8]
0x0800950E: F851 0B04 LDR R0, [R1], #4
- 0x08009512: F000 F82F BL TIM_Base_SetConfig ; 0x08009574
+ 0x08009512: F000 F82F BL TIM_Base_SetConfig ; 0x08009574
0x08009516: 9902 LDR R1, [SP, #8]
0x08009518: 2001 MOVS R0, #1
@@ -36757,5 +36554,5 @@
Section .text.TIM_Base_SetConfig from charger_lto.o, size=402, align=2
-
TIM_Base_SetConfig:
+
TIM_Base_SetConfig:
0x08009574: B083 SUB SP, SP, #12
0x08009576: 9002 STR R0, [SP, #8]
@@ -36925,5 +36722,5 @@
Section .text.HAL_TIM_PWM_Init from charger_lto.o, size=674, align=2
-
HAL_TIM_PWM_Init:
+
HAL_TIM_PWM_Init:
0x08009706: B580 PUSH {R7, LR}
0x08009708: B084 SUB SP, SP, #16
@@ -37035,6 +36832,5 @@
0x08009816: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800981A: F240 5133 MOVW R1, #0x0533
- 0x0800981E: F7FA FFBB BL assert_failed ; 0x08004798
+ 0x0800981E: F7FA FFBB BL assert_failed ; 0x08004798
.L4:
0x08009822: 9802 LDR R0, [SP, #8]
@@ -37063,6 +36859,5 @@
0x0800984E: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x08009852: F240 5134 MOVW R1, #0x0534
- 0x08009856: F7FA FF9F BL assert_failed ; 0x08004798
+ 0x08009856: F7FA FF9F BL assert_failed ; 0x08004798
.L7:
0x0800985A: 9802 LDR R0, [SP, #8]
@@ -37083,6 +36878,5 @@
0x0800987A: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800987E: F240 5135 MOVW R1, #0x0535
- 0x08009882: F7FA FF89 BL assert_failed ; 0x08004798
+ 0x08009882: F7FA FF89 BL assert_failed ; 0x08004798
.L10:
0x08009886: 9802 LDR R0, [SP, #8]
@@ -37138,6 +36932,5 @@
0x080098F6: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x080098FA: F240 5136 MOVW R1, #0x0536
- 0x080098FE: F7FA FF4B BL assert_failed ; 0x08004798
+ 0x080098FE: F7FA FF4B BL assert_failed ; 0x08004798
.L15:
0x08009902: 9802 LDR R0, [SP, #8]
@@ -37154,6 +36947,5 @@
0x08009916: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800991A: F240 5137 MOVW R1, #0x0537
- 0x0800991E: F7FA FF3B BL assert_failed ; 0x08004798
+ 0x0800991E: F7FA FF3B BL assert_failed ; 0x08004798
.L18:
0x08009922: 9802 LDR R0, [SP, #8]
@@ -37164,5 +36956,6 @@
0x0800992E: F881 003C STRB.W R0, [R1, #60]
0x08009932: 9802 LDR R0, [SP, #8]
- 0x08009934: F003 FE2A BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
+ 0x08009934: F003 FE2A BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
.L19:
0x08009938: 9902 LDR R1, [SP, #8]
@@ -37171,5 +36964,6 @@
0x08009940: 9902 LDR R1, [SP, #8]
0x08009942: F851 0B04 LDR R0, [R1], #4
- 0x08009946: F7FF FE15 BL TIM_Base_SetConfig ; 0x08009574
+ 0x08009946: F7FF FE15 BL TIM_Base_SetConfig ; 0x08009574
0x0800994A: 9902 LDR R1, [SP, #8]
0x0800994C: 2001 MOVS R0, #1
@@ -37209,5 +37003,5 @@
Section .text.HAL_TIM_IC_Init from charger_lto.o, size=674, align=2
-
HAL_TIM_IC_Init:
+
HAL_TIM_IC_Init:
0x080099A8: B580 PUSH {R7, LR}
0x080099AA: B084 SUB SP, SP, #16
@@ -37319,6 +37113,5 @@
0x08009AB8: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x08009ABC: F240 71CF MOVW R1, #0x07CF
- 0x08009AC0: F7FA FE6A BL assert_failed ; 0x08004798
+ 0x08009AC0: F7FA FE6A BL assert_failed ; 0x08004798
.L4:
0x08009AC4: 9802 LDR R0, [SP, #8]
@@ -37347,6 +37140,5 @@
0x08009AF0: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x08009AF4: F44F 61FA MOV.W R1, #0x07D0
- 0x08009AF8: F7FA FE4E BL assert_failed ; 0x08004798
+ 0x08009AF8: F7FA FE4E BL assert_failed ; 0x08004798
.L7:
0x08009AFC: 9802 LDR R0, [SP, #8]
@@ -37367,6 +37159,5 @@
0x08009B1C: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x08009B20: F240 71D1 MOVW R1, #0x07D1
- 0x08009B24: F7FA FE38 BL assert_failed ; 0x08004798
+ 0x08009B24: F7FA FE38 BL assert_failed ; 0x08004798
.L10:
0x08009B28: 9802 LDR R0, [SP, #8]
@@ -37422,6 +37213,5 @@
0x08009B98: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x08009B9C: F240 71D2 MOVW R1, #0x07D2
- 0x08009BA0: F7FA FDFA BL assert_failed ; 0x08004798
+ 0x08009BA0: F7FA FDFA BL assert_failed ; 0x08004798
.L15:
0x08009BA4: 9802 LDR R0, [SP, #8]
@@ -37438,6 +37228,5 @@
0x08009BB8: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x08009BBC: F240 71D3 MOVW R1, #0x07D3
- 0x08009BC0: F7FA FDEA BL assert_failed ; 0x08004798
+ 0x08009BC0: F7FA FDEA BL assert_failed ; 0x08004798
.L18:
0x08009BC4: 9802 LDR R0, [SP, #8]
@@ -37448,5 +37237,6 @@
0x08009BD0: F881 003C STRB.W R0, [R1, #60]
0x08009BD4: 9802 LDR R0, [SP, #8]
- 0x08009BD6: F003 FCD9 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
+ 0x08009BD6: F003 FCD9 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
.L19:
0x08009BDA: 9902 LDR R1, [SP, #8]
@@ -37455,5 +37245,6 @@
0x08009BE2: 9902 LDR R1, [SP, #8]
0x08009BE4: F851 0B04 LDR R0, [R1], #4
- 0x08009BE8: F7FF FCC4 BL TIM_Base_SetConfig ; 0x08009574
+ 0x08009BE8: F7FF FCC4 BL TIM_Base_SetConfig ; 0x08009574
0x08009BEC: 9902 LDR R1, [SP, #8]
0x08009BEE: 2001 MOVS R0, #1
@@ -37493,5 +37284,5 @@
Section .text.HAL_TIM_IRQHandler from charger_lto.o, size=502, align=2
-
HAL_TIM_IRQHandler:
+
HAL_TIM_IRQHandler:
0x08009C4A: B580 PUSH {R7, LR}
0x08009C4C: B084 SUB SP, SP, #16
@@ -37526,11 +37317,14 @@
0x08009C8C: B118 CBZ R0, .L1 ; 0x08009C96
0x08009C8E: 9803 LDR R0, [SP, #12]
- 0x08009C90: F003 FC7C BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
+ 0x08009C90: F003 FC7C BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
0x08009C94: E005 B .L2 ; 0x08009CA2
.L1:
0x08009C96: 9803 LDR R0, [SP, #12]
- 0x08009C98: F003 FC78 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
+ 0x08009C98: F003 FC78 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
0x08009C9C: 9803 LDR R0, [SP, #12]
- 0x08009C9E: F003 FC75 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
+ 0x08009C9E: F003 FC75 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
.L2:
0x08009CA2: 9903 LDR R1, [SP, #12]
@@ -37559,11 +37353,14 @@
0x08009CD6: D003 BEQ .L4 ; 0x08009CE0
0x08009CD8: 9803 LDR R0, [SP, #12]
- 0x08009CDA: F003 FC57 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
+ 0x08009CDA: F003 FC57 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
0x08009CDE: E005 B .L5 ; 0x08009CEC
.L4:
0x08009CE0: 9803 LDR R0, [SP, #12]
- 0x08009CE2: F003 FC53 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
+ 0x08009CE2: F003 FC53 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
0x08009CE6: 9803 LDR R0, [SP, #12]
- 0x08009CE8: F003 FC50 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
+ 0x08009CE8: F003 FC50 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
.L5:
0x08009CEC: 9903 LDR R1, [SP, #12]
@@ -37592,11 +37389,14 @@
0x08009D1E: B118 CBZ R0, .L7 ; 0x08009D28
0x08009D20: 9803 LDR R0, [SP, #12]
- 0x08009D22: F003 FC33 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
+ 0x08009D22: F003 FC33 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
0x08009D26: E005 B .L8 ; 0x08009D34
.L7:
0x08009D28: 9803 LDR R0, [SP, #12]
- 0x08009D2A: F003 FC2F BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
+ 0x08009D2A: F003 FC2F BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
0x08009D2E: 9803 LDR R0, [SP, #12]
- 0x08009D30: F003 FC2C BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
+ 0x08009D30: F003 FC2C BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
.L8:
0x08009D34: 9903 LDR R1, [SP, #12]
@@ -37625,11 +37425,14 @@
0x08009D68: D003 BEQ .L10 ; 0x08009D72
0x08009D6A: 9803 LDR R0, [SP, #12]
- 0x08009D6C: F003 FC0E BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
+ 0x08009D6C: F003 FC0E BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
0x08009D70: E005 B .L11 ; 0x08009D7E
.L10:
0x08009D72: 9803 LDR R0, [SP, #12]
- 0x08009D74: F003 FC0A BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
+ 0x08009D74: F003 FC0A BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
0x08009D78: 9803 LDR R0, [SP, #12]
- 0x08009D7A: F003 FC07 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
+ 0x08009D7A: F003 FC07 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
.L11:
0x08009D7E: 9903 LDR R1, [SP, #12]
@@ -37648,5 +37451,6 @@
0x08009D9C: 6108 STR R0, [R1, #16]
0x08009D9E: 9803 LDR R0, [SP, #12]
- 0x08009DA0: F7FA FCEB BL HAL_TIM_PeriodElapsedCallback ; 0x0800477A
+ 0x08009DA0: F7FA FCEB BL HAL_TIM_PeriodElapsedCallback ; 0x0800477A
.L13:
0x08009DA4: 9801 LDR R0, [SP, #4]
@@ -37668,5 +37472,6 @@
0x08009DCA: 6108 STR R0, [R1, #16]
0x08009DCC: 9803 LDR R0, [SP, #12]
- 0x08009DCE: F003 FBDD BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
+ 0x08009DCE: F003 FBDD BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
.L15:
0x08009DD2: F89D 0005 LDRB.W R0, [SP, #5]
@@ -37682,5 +37487,6 @@
0x08009DEC: 6108 STR R0, [R1, #16]
0x08009DEE: 9803 LDR R0, [SP, #12]
- 0x08009DF0: F003 FBCC BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
+ 0x08009DF0: F003 FBCC BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
.L16:
0x08009DF4: F89D 0004 LDRB.W R0, [SP, #4]
@@ -37697,5 +37503,6 @@
0x08009E10: 6108 STR R0, [R1, #16]
0x08009E12: 9803 LDR R0, [SP, #12]
- 0x08009E14: F003 FBBA BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
+ 0x08009E14: F003 FBBA BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
.L17:
0x08009E18: F89D 0004 LDRB.W R0, [SP, #4]
@@ -37712,5 +37519,6 @@
0x08009E34: 6108 STR R0, [R1, #16]
0x08009E36: 9803 LDR R0, [SP, #12]
- 0x08009E38: F003 FBA8 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
+ 0x08009E38: F003 FBA8 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
.L18:
0x08009E3C: B004 ADD SP, SP, #16
@@ -37719,5 +37527,5 @@
Section .text.TIM_OC1_SetConfig from charger_lto.o, size=414, align=2
-
TIM_OC1_SetConfig:
+
TIM_OC1_SetConfig:
0x08009E40: B580 PUSH {R7, LR}
0x08009E42: B086 SUB SP, SP, #24
@@ -37797,6 +37605,5 @@
0x08009EEE: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x08009EF2: F641 316B MOVW R1, #0x1B6B
- 0x08009EF6: F7FA FC4F BL assert_failed ; 0x08004798
+ 0x08009EF6: F7FA FC4F BL assert_failed ; 0x08004798
.L4:
0x08009EFA: 9802 LDR R0, [SP, #8]
@@ -37851,6 +37658,5 @@
0x08009F6E: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x08009F72: F641 3178 MOVW R1, #0x1B78
- 0x08009F76: F7FA FC0F BL assert_failed ; 0x08004798
+ 0x08009F76: F7FA FC0F BL assert_failed ; 0x08004798
.L9:
0x08009F7A: 9804 LDR R0, [SP, #16]
@@ -37867,6 +37673,5 @@
0x08009F90: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x08009F94: F641 3179 MOVW R1, #0x1B79
- 0x08009F98: F7FA FBFE BL assert_failed ; 0x08004798
+ 0x08009F98: F7FA FBFE BL assert_failed ; 0x08004798
.L12:
0x08009F9C: 9801 LDR R0, [SP, #4]
@@ -37905,5 +37710,5 @@
Section .text.TIM_OC3_SetConfig from charger_lto.o, size=434, align=2
-
TIM_OC3_SetConfig:
+
TIM_OC3_SetConfig:
0x08009FDE: B580 PUSH {R7, LR}
0x08009FE0: B086 SUB SP, SP, #24
@@ -37991,6 +37796,5 @@
0x0800A09A: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800A09E: F641 4102 MOVW R1, #0x1C02
- 0x0800A0A2: F7FA FB79 BL assert_failed ; 0x08004798
+ 0x0800A0A2: F7FA FB79 BL assert_failed ; 0x08004798
.L6:
0x0800A0A6: 9802 LDR R0, [SP, #8]
@@ -38045,6 +37849,5 @@
0x0800A11C: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800A120: F641 410F MOVW R1, #0x1C0F
- 0x0800A124: F7FA FB38 BL assert_failed ; 0x08004798
+ 0x0800A124: F7FA FB38 BL assert_failed ; 0x08004798
.L11:
0x0800A128: 9804 LDR R0, [SP, #16]
@@ -38061,6 +37864,5 @@
0x0800A13E: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800A142: F641 4110 MOVW R1, #0x1C10
- 0x0800A146: F7FA FB27 BL assert_failed ; 0x08004798
+ 0x0800A146: F7FA FB27 BL assert_failed ; 0x08004798
.L14:
0x0800A14A: 9801 LDR R0, [SP, #4]
@@ -38099,5 +37901,5 @@
Section .text.TIM_OC4_SetConfig from charger_lto.o, size=242, align=2
-
TIM_OC4_SetConfig:
+
TIM_OC4_SetConfig:
0x0800A190: B580 PUSH {R7, LR}
0x0800A192: B086 SUB SP, SP, #24
@@ -38177,6 +37979,5 @@
0x0800A244: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800A248: F641 414F MOVW R1, #0x1C4F
- 0x0800A24C: F7FA FAA4 BL assert_failed ; 0x08004798
+ 0x0800A24C: F7FA FAA4 BL assert_failed ; 0x08004798
.L4:
0x0800A250: 9801 LDR R0, [SP, #4]
@@ -38207,5 +38008,5 @@
Section .text.TIM_OC6_SetConfig from charger_lto.o, size=198, align=2
-
TIM_OC6_SetConfig:
+
TIM_OC6_SetConfig:
0x0800A282: B085 SUB SP, SP, #20
0x0800A284: 9004 STR R0, [SP, #16]
@@ -38295,5 +38096,5 @@
Section .text.HAL_TIM_IC_ConfigChannel from charger_lto.o, size=1110, align=2
-
HAL_TIM_IC_ConfigChannel:
+
HAL_TIM_IC_ConfigChannel:
0x0800A348: B580 PUSH {R7, LR}
0x0800A34A: B086 SUB SP, SP, #24
@@ -38391,6 +38192,5 @@
0x0800A436: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800A43A: F241 014C MOVW R1, #0x104C
- 0x0800A43E: F7FA F9AB BL assert_failed ; 0x08004798
+ 0x0800A43E: F7FA F9AB BL assert_failed ; 0x08004798
.L3:
0x0800A442: 9803 LDR R0, [SP, #12]
@@ -38411,6 +38211,5 @@
0x0800A45E: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800A462: F241 014D MOVW R1, #0x104D
- 0x0800A466: F7FA F997 BL assert_failed ; 0x08004798
+ 0x0800A466: F7FA F997 BL assert_failed ; 0x08004798
.L6:
0x0800A46A: 9803 LDR R0, [SP, #12]
@@ -38432,6 +38231,5 @@
0x0800A488: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800A48C: F241 014E MOVW R1, #0x104E
- 0x0800A490: F7FA F982 BL assert_failed ; 0x08004798
+ 0x0800A490: F7FA F982 BL assert_failed ; 0x08004798
.L9:
0x0800A494: 9803 LDR R0, [SP, #12]
@@ -38456,6 +38254,5 @@
0x0800A4B8: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800A4BC: F241 014F MOVW R1, #0x104F
- 0x0800A4C0: F7FA F96A BL assert_failed ; 0x08004798
+ 0x0800A4C0: F7FA F96A BL assert_failed ; 0x08004798
.L12:
0x0800A4C4: 9803 LDR R0, [SP, #12]
@@ -38468,6 +38265,5 @@
0x0800A4D2: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800A4D6: F241 0150 MOVW R1, #0x1050
- 0x0800A4DA: F7FA F95D BL assert_failed ; 0x08004798
+ 0x0800A4DA: F7FA F95D BL assert_failed ; 0x08004798
.L14:
0x0800A4DE: 9804 LDR R0, [SP, #16]
@@ -38490,5 +38286,6 @@
0x0800A504: 685A LDR R2, [R3, #4]
0x0800A506: 68DB LDR R3, [R3, #12]
- 0x0800A508: F000 F949 BL TIM_TI1_SetConfig ; 0x0800A79E
+ 0x0800A508: F000 F949 BL TIM_TI1_SetConfig ; 0x0800A79E
0x0800A50C: 9804 LDR R0, [SP, #16]
0x0800A50E: 6801 LDR R1, [R0]
@@ -38572,6 +38369,5 @@
0x0800A5CC: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800A5D0: F241 0166 MOVW R1, #0x1066
- 0x0800A5D4: F7FA F8E0 BL assert_failed ; 0x08004798
+ 0x0800A5D4: F7FA F8E0 BL assert_failed ; 0x08004798
.L19:
0x0800A5D8: 9804 LDR R0, [SP, #16]
@@ -38581,5 +38377,6 @@
0x0800A5E0: 685A LDR R2, [R3, #4]
0x0800A5E2: 68DB LDR R3, [R3, #12]
- 0x0800A5E4: F005 FB80 BL TIM_TI2_SetConfig ; 0x0800FCE8
+ 0x0800A5E4: F005 FB80 BL TIM_TI2_SetConfig ; 0x0800FCE8
0x0800A5E8: 9804 LDR R0, [SP, #16]
0x0800A5EA: 6801 LDR R1, [R0]
@@ -38651,6 +38448,5 @@
0x0800A68A: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800A68E: F241 0176 MOVW R1, #0x1076
- 0x0800A692: F7FA F881 BL assert_failed ; 0x08004798
+ 0x0800A692: F7FA F881 BL assert_failed ; 0x08004798
.L23:
0x0800A696: 9804 LDR R0, [SP, #16]
@@ -38660,5 +38456,6 @@
0x0800A69E: 685A LDR R2, [R3, #4]
0x0800A6A0: 68DB LDR R3, [R3, #12]
- 0x0800A6A2: F000 F90F BL TIM_TI3_SetConfig ; 0x0800A8C4
+ 0x0800A6A2: F000 F90F BL TIM_TI3_SetConfig ; 0x0800A8C4
0x0800A6A6: 9804 LDR R0, [SP, #16]
0x0800A6A8: 6801 LDR R1, [R0]
@@ -38730,6 +38527,5 @@
0x0800A746: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800A74A: F241 0186 MOVW R1, #0x1086
- 0x0800A74E: F7FA F823 BL assert_failed ; 0x08004798
+ 0x0800A74E: F7FA F823 BL assert_failed ; 0x08004798
.L27:
0x0800A752: 9804 LDR R0, [SP, #16]
@@ -38739,5 +38535,5 @@
0x0800A75A: 685A LDR R2, [R3, #4]
0x0800A75C: 68DB LDR R3, [R3, #12]
- 0x0800A75E: F005 FAF9 BL TIM_TI4_SetConfig ; 0x0800FD54
+ 0x0800A75E: F005 FAF9 BL TIM_TI4_SetConfig ; 0x0800FD54
0x0800A762: 9804 LDR R0, [SP, #16]
0x0800A764: 6801 LDR R1, [R0]
@@ -38769,5 +38565,5 @@
Section .text.TIM_TI1_SetConfig from charger_lto.o, size=294, align=2
-
TIM_TI1_SetConfig:
+
TIM_TI1_SetConfig:
0x0800A79E: B087 SUB SP, SP, #28
0x0800A7A0: 9006 STR R0, [SP, #24]
@@ -38898,5 +38694,5 @@
Section .text.TIM_TI3_SetConfig from charger_lto.o, size=106, align=2
-
TIM_TI3_SetConfig:
+
TIM_TI3_SetConfig:
0x0800A8C4: B086 SUB SP, SP, #24
0x0800A8C6: 9005 STR R0, [SP, #20]
@@ -38949,5 +38745,5 @@
Section .text.HAL_TIM_ConfigClockSource from charger_lto.o, size=2282, align=2
-
HAL_TIM_ConfigClockSource:
+
HAL_TIM_ConfigClockSource:
0x0800A92E: B580 PUSH {R7, LR}
0x0800A930: B086 SUB SP, SP, #24
@@ -39015,6 +38811,5 @@
0x0800A9B8: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800A9BC: F241 5151 MOVW R1, #0x1551
- 0x0800A9C0: F7F9 FEEA BL assert_failed ; 0x08004798
+ 0x0800A9C0: F7F9 FEEA BL assert_failed ; 0x08004798
.L4:
0x0800A9C4: 9804 LDR R0, [SP, #16]
@@ -39189,6 +38984,5 @@
0x0800AB7E: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800AB82: F241 515D MOVW R1, #0x155D
- 0x0800AB86: F7F9 FE07 BL assert_failed ; 0x08004798
+ 0x0800AB86: F7F9 FE07 BL assert_failed ; 0x08004798
.L8:
0x0800AB8A: E335 B .L65 ; 0x0800B1F8
@@ -39246,6 +39040,5 @@
0x0800AC0A: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800AC0E: F241 5164 MOVW R1, #0x1564
- 0x0800AC12: F7F9 FDC1 BL assert_failed ; 0x08004798
+ 0x0800AC12: F7F9 FDC1 BL assert_failed ; 0x08004798
.L12:
0x0800AC16: 9803 LDR R0, [SP, #12]
@@ -39270,6 +39063,5 @@
0x0800AC40: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800AC44: F241 5167 MOVW R1, #0x1567
- 0x0800AC48: F7F9 FDA6 BL assert_failed ; 0x08004798
+ 0x0800AC48: F7F9 FDA6 BL assert_failed ; 0x08004798
.L15:
0x0800AC4C: 9803 LDR R0, [SP, #12]
@@ -39297,6 +39089,5 @@
0x0800AC78: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800AC7C: F241 5168 MOVW R1, #0x1568
- 0x0800AC80: F7F9 FD8A BL assert_failed ; 0x08004798
+ 0x0800AC80: F7F9 FD8A BL assert_failed ; 0x08004798
.L18:
0x0800AC84: 9803 LDR R0, [SP, #12]
@@ -39309,6 +39100,5 @@
0x0800AC92: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800AC96: F241 5169 MOVW R1, #0x1569
- 0x0800AC9A: F7F9 FD7D BL assert_failed ; 0x08004798
+ 0x0800AC9A: F7F9 FD7D BL assert_failed ; 0x08004798
.L20:
0x0800AC9E: 9804 LDR R0, [SP, #16]
@@ -39318,5 +39108,6 @@
0x0800ACA6: 6899 LDR R1, [R3, #8]
0x0800ACA8: 68DB LDR R3, [R3, #12]
- 0x0800ACAA: F005 F889 BL TIM_ETR_SetConfig ; 0x0800FDC0
+ 0x0800ACAA: F005 F889 BL TIM_ETR_SetConfig ; 0x0800FDC0
0x0800ACAE: 9804 LDR R0, [SP, #16]
0x0800ACB0: 6800 LDR R0, [R0]
@@ -39384,6 +39175,5 @@
0x0800AD46: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800AD4A: F241 517C MOVW R1, #0x157C
- 0x0800AD4E: F7F9 FD23 BL assert_failed ; 0x08004798
+ 0x0800AD4E: F7F9 FD23 BL assert_failed ; 0x08004798
.L24:
0x0800AD52: 9803 LDR R0, [SP, #12]
@@ -39408,6 +39198,5 @@
0x0800AD7C: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800AD80: F241 517F MOVW R1, #0x157F
- 0x0800AD84: F7F9 FD08 BL assert_failed ; 0x08004798
+ 0x0800AD84: F7F9 FD08 BL assert_failed ; 0x08004798
.L27:
0x0800AD88: 9803 LDR R0, [SP, #12]
@@ -39435,6 +39224,5 @@
0x0800ADB4: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800ADB8: F44F 51AC MOV.W R1, #0x1580
- 0x0800ADBC: F7F9 FCEC BL assert_failed ; 0x08004798
+ 0x0800ADBC: F7F9 FCEC BL assert_failed ; 0x08004798
.L30:
0x0800ADC0: 9803 LDR R0, [SP, #12]
@@ -39447,6 +39235,5 @@
0x0800ADCE: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800ADD2: F241 5181 MOVW R1, #0x1581
- 0x0800ADD6: F7F9 FCDF BL assert_failed ; 0x08004798
+ 0x0800ADD6: F7F9 FCDF BL assert_failed ; 0x08004798
.L32:
0x0800ADDA: 9804 LDR R0, [SP, #16]
@@ -39456,5 +39243,5 @@
0x0800ADE2: 6899 LDR R1, [R3, #8]
0x0800ADE4: 68DB LDR R3, [R3, #12]
- 0x0800ADE6: F004 FFEB BL TIM_ETR_SetConfig ; 0x0800FDC0
+ 0x0800ADE6: F004 FFEB BL TIM_ETR_SetConfig ; 0x0800FDC0
0x0800ADEA: 9804 LDR R0, [SP, #16]
0x0800ADEC: 6801 LDR R1, [R0]
@@ -39528,6 +39315,5 @@
0x0800AE96: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800AE9A: F241 5190 MOVW R1, #0x1590
- 0x0800AE9E: F7F9 FC7B BL assert_failed ; 0x08004798
+ 0x0800AE9E: F7F9 FC7B BL assert_failed ; 0x08004798
.L36:
0x0800AEA2: 9803 LDR R0, [SP, #12]
@@ -39555,6 +39341,5 @@
0x0800AECE: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800AED2: F241 5193 MOVW R1, #0x1593
- 0x0800AED6: F7F9 FC5F BL assert_failed ; 0x08004798
+ 0x0800AED6: F7F9 FC5F BL assert_failed ; 0x08004798
.L39:
0x0800AEDA: 9803 LDR R0, [SP, #12]
@@ -39567,6 +39352,5 @@
0x0800AEE8: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800AEEC: F241 5194 MOVW R1, #0x1594
- 0x0800AEF0: F7F9 FC52 BL assert_failed ; 0x08004798
+ 0x0800AEF0: F7F9 FC52 BL assert_failed ; 0x08004798
.L41:
0x0800AEF4: 9804 LDR R0, [SP, #16]
@@ -39575,9 +39359,11 @@
0x0800AEFA: 6851 LDR R1, [R2, #4]
0x0800AEFC: 68D2 LDR R2, [R2, #12]
- 0x0800AEFE: F004 FF79 BL TIM_TI1_ConfigInputStage ; 0x0800FDF4
+ 0x0800AEFE: F004 FF79 BL TIM_TI1_ConfigInputStage ; 0x0800FDF4
0x0800AF02: 9804 LDR R0, [SP, #16]
0x0800AF04: 6800 LDR R0, [R0]
0x0800AF06: 2150 MOVS R1, #80
- 0x0800AF08: F004 FF9C BL TIM_ITRx_SetConfig ; 0x0800FE44
+ 0x0800AF08: F004 FF9C BL TIM_ITRx_SetConfig ; 0x0800FE44
0x0800AF0C: E174 B .L65 ; 0x0800B1F8
.L42:
@@ -39646,6 +39432,5 @@
0x0800AFAC: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800AFB0: F44F 51AD MOV.W R1, #0x15A0
- 0x0800AFB4: F7F9 FBF0 BL assert_failed ; 0x08004798
+ 0x0800AFB4: F7F9 FBF0 BL assert_failed ; 0x08004798
.L45:
0x0800AFB8: 9803 LDR R0, [SP, #12]
@@ -39673,6 +39458,5 @@
0x0800AFE4: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800AFE8: F241 51A3 MOVW R1, #0x15A3
- 0x0800AFEC: F7F9 FBD4 BL assert_failed ; 0x08004798
+ 0x0800AFEC: F7F9 FBD4 BL assert_failed ; 0x08004798
.L48:
0x0800AFF0: 9803 LDR R0, [SP, #12]
@@ -39685,6 +39469,5 @@
0x0800AFFE: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800B002: F241 51A4 MOVW R1, #0x15A4
- 0x0800B006: F7F9 FBC7 BL assert_failed ; 0x08004798
+ 0x0800B006: F7F9 FBC7 BL assert_failed ; 0x08004798
.L50:
0x0800B00A: 9804 LDR R0, [SP, #16]
@@ -39693,9 +39476,11 @@
0x0800B010: 6851 LDR R1, [R2, #4]
0x0800B012: 68D2 LDR R2, [R2, #12]
- 0x0800B014: F000 F900 BL TIM_TI2_ConfigInputStage ; 0x0800B218
+ 0x0800B014: F000 F900 BL TIM_TI2_ConfigInputStage ; 0x0800B218
0x0800B018: 9804 LDR R0, [SP, #16]
0x0800B01A: 6800 LDR R0, [R0]
0x0800B01C: 2160 MOVS R1, #96
- 0x0800B01E: F004 FF11 BL TIM_ITRx_SetConfig ; 0x0800FE44
+ 0x0800B01E: F004 FF11 BL TIM_ITRx_SetConfig ; 0x0800FE44
0x0800B022: E0E9 B .L65 ; 0x0800B1F8
.L51:
@@ -39764,6 +39549,5 @@
0x0800B0C2: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800B0C6: F241 51B0 MOVW R1, #0x15B0
- 0x0800B0CA: F7F9 FB65 BL assert_failed ; 0x08004798
+ 0x0800B0CA: F7F9 FB65 BL assert_failed ; 0x08004798
.L54:
0x0800B0CE: 9803 LDR R0, [SP, #12]
@@ -39791,6 +39575,5 @@
0x0800B0FA: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800B0FE: F241 51B3 MOVW R1, #0x15B3
- 0x0800B102: F7F9 FB49 BL assert_failed ; 0x08004798
+ 0x0800B102: F7F9 FB49 BL assert_failed ; 0x08004798
.L57:
0x0800B106: 9803 LDR R0, [SP, #12]
@@ -39803,6 +39586,5 @@
0x0800B114: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800B118: F241 51B4 MOVW R1, #0x15B4
- 0x0800B11C: F7F9 FB3C BL assert_failed ; 0x08004798
+ 0x0800B11C: F7F9 FB3C BL assert_failed ; 0x08004798
.L59:
0x0800B120: 9804 LDR R0, [SP, #16]
@@ -39811,9 +39593,10 @@
0x0800B126: 6851 LDR R1, [R2, #4]
0x0800B128: 68D2 LDR R2, [R2, #12]
- 0x0800B12A: F004 FE63 BL TIM_TI1_ConfigInputStage ; 0x0800FDF4
+ 0x0800B12A: F004 FE63 BL TIM_TI1_ConfigInputStage ; 0x0800FDF4
0x0800B12E: 9804 LDR R0, [SP, #16]
0x0800B130: 6800 LDR R0, [R0]
0x0800B132: 2140 MOVS R1, #64
- 0x0800B134: F004 FE86 BL TIM_ITRx_SetConfig ; 0x0800FE44
+ 0x0800B134: F004 FE86 BL TIM_ITRx_SetConfig ; 0x0800FE44
0x0800B138: E05E B .L65 ; 0x0800B1F8
.L60:
@@ -39882,6 +39665,5 @@
0x0800B1D8: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800B1DC: F241 51C8 MOVW R1, #0x15C8
- 0x0800B1E0: F7F9 FADA BL assert_failed ; 0x08004798
+ 0x0800B1E0: F7F9 FADA BL assert_failed ; 0x08004798
.L63:
0x0800B1E4: 9804 LDR R0, [SP, #16]
@@ -39889,5 +39671,6 @@
0x0800B1E8: 9903 LDR R1, [SP, #12]
0x0800B1EA: 6809 LDR R1, [R1]
- 0x0800B1EC: F004 FE2A BL TIM_ITRx_SetConfig ; 0x0800FE44
+ 0x0800B1EC: F004 FE2A BL TIM_ITRx_SetConfig ; 0x0800FE44
0x0800B1F0: E002 B .L65 ; 0x0800B1F8
.L64:
@@ -39910,5 +39693,5 @@
Section .text.TIM_TI2_ConfigInputStage from charger_lto.o, size=82, align=2
-
TIM_TI2_ConfigInputStage:
+
TIM_TI2_ConfigInputStage:
0x0800B218: B085 SUB SP, SP, #20
0x0800B21A: 9004 STR R0, [SP, #16]
@@ -39950,5 +39733,5 @@
Section .text.HAL_TIM_SlaveConfigSynchro from charger_lto.o, size=534, align=2
-
HAL_TIM_SlaveConfigSynchro:
+
HAL_TIM_SlaveConfigSynchro:
0x0800B26A: B580 PUSH {R7, LR}
0x0800B26C: B084 SUB SP, SP, #16
@@ -40019,6 +39802,5 @@
0x0800B310: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800B314: F241 6108 MOVW R1, #0x1608
- 0x0800B318: F7F9 FA3E BL assert_failed ; 0x08004798
+ 0x0800B318: F7F9 FA3E BL assert_failed ; 0x08004798
.L3:
0x0800B31C: 9801 LDR R0, [SP, #4]
@@ -40051,6 +39833,5 @@
0x0800B352: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800B356: F241 6109 MOVW R1, #0x1609
- 0x0800B35A: F7F9 FA1D BL assert_failed ; 0x08004798
+ 0x0800B35A: F7F9 FA1D BL assert_failed ; 0x08004798
.L6:
0x0800B35E: 9801 LDR R0, [SP, #4]
@@ -40128,6 +39909,5 @@
0x0800B3FA: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800B3FE: F241 610A MOVW R1, #0x160A
- 0x0800B402: F7F9 F9C9 BL assert_failed ; 0x08004798
+ 0x0800B402: F7F9 F9C9 BL assert_failed ; 0x08004798
.L9:
0x0800B406: 9802 LDR R0, [SP, #8]
@@ -40147,5 +39927,6 @@
0x0800B428: 9802 LDR R0, [SP, #8]
0x0800B42A: 9901 LDR R1, [SP, #4]
- 0x0800B42C: F000 F828 BL TIM_SlaveTimer_SetConfig ; 0x0800B480
+ 0x0800B42C: F000 F828 BL TIM_SlaveTimer_SetConfig ; 0x0800B480
0x0800B430: B158 CBZ R0, .L11 ; 0x0800B44A
0x0800B432: 9902 LDR R1, [SP, #8]
@@ -40184,5 +39965,5 @@
Section .text.TIM_SlaveTimer_SetConfig from charger_lto.o, size=1702, align=2
-
TIM_SlaveTimer_SetConfig:
+
TIM_SlaveTimer_SetConfig:
0x0800B480: B580 PUSH {R7, LR}
0x0800B482: B088 SUB SP, SP, #32
@@ -40343,6 +40124,5 @@
0x0800B610: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800B614: F641 41F6 MOVW R1, #0x1CF6
- 0x0800B618: F7F9 F8BE BL assert_failed ; 0x08004798
+ 0x0800B618: F7F9 F8BE BL assert_failed ; 0x08004798
.L4:
0x0800B61C: 9805 LDR R0, [SP, #20]
@@ -40367,6 +40147,5 @@
0x0800B646: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800B64A: F641 41F7 MOVW R1, #0x1CF7
- 0x0800B64E: F7F9 F8A3 BL assert_failed ; 0x08004798
+ 0x0800B64E: F7F9 F8A3 BL assert_failed ; 0x08004798
.L7:
0x0800B652: 9805 LDR R0, [SP, #20]
@@ -40394,6 +40173,5 @@
0x0800B67E: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800B682: F641 41F8 MOVW R1, #0x1CF8
- 0x0800B686: F7F9 F887 BL assert_failed ; 0x08004798
+ 0x0800B686: F7F9 F887 BL assert_failed ; 0x08004798
.L10:
0x0800B68A: 9805 LDR R0, [SP, #20]
@@ -40406,6 +40184,5 @@
0x0800B698: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800B69C: F641 41F9 MOVW R1, #0x1CF9
- 0x0800B6A0: F7F9 F87A BL assert_failed ; 0x08004798
+ 0x0800B6A0: F7F9 F87A BL assert_failed ; 0x08004798
.L12:
0x0800B6A4: 9806 LDR R0, [SP, #24]
@@ -40415,5 +40192,6 @@
0x0800B6AC: 68D9 LDR R1, [R3, #12]
0x0800B6AE: 691B LDR R3, [R3, #16]
- 0x0800B6B0: F004 FB86 BL TIM_ETR_SetConfig ; 0x0800FDC0
+ 0x0800B6B0: F004 FB86 BL TIM_ETR_SetConfig ; 0x0800FDC0
0x0800B6B4: E22F B .L43 ; 0x0800BB16
.L13:
@@ -40506,6 +40284,5 @@
0x0800B794: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800B798: F641 5105 MOVW R1, #0x1D05
- 0x0800B79C: F7F8 FFFC BL assert_failed ; 0x08004798
+ 0x0800B79C: F7F8 FFFC BL assert_failed ; 0x08004798
.L16:
0x0800B7A0: 9805 LDR R0, [SP, #20]
@@ -40518,6 +40295,5 @@
0x0800B7AE: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800B7B2: F641 5106 MOVW R1, #0x1D06
- 0x0800B7B6: F7F8 FFEF BL assert_failed ; 0x08004798
+ 0x0800B7B6: F7F8 FFEF BL assert_failed ; 0x08004798
.L18:
0x0800B7BA: 9805 LDR R0, [SP, #20]
@@ -40648,6 +40424,5 @@
0x0800B8EA: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800B8EE: F641 511F MOVW R1, #0x1D1F
- 0x0800B8F2: F7F8 FF51 BL assert_failed ; 0x08004798
+ 0x0800B8F2: F7F8 FF51 BL assert_failed ; 0x08004798
.L23:
0x0800B8F6: 9805 LDR R0, [SP, #20]
@@ -40675,6 +40450,5 @@
0x0800B922: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800B926: F44F 51E9 MOV.W R1, #0x1D20
- 0x0800B92A: F7F8 FF35 BL assert_failed ; 0x08004798
+ 0x0800B92A: F7F8 FF35 BL assert_failed ; 0x08004798
.L26:
0x0800B92E: 9805 LDR R0, [SP, #20]
@@ -40687,6 +40461,5 @@
0x0800B93C: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800B940: F641 5121 MOVW R1, #0x1D21
- 0x0800B944: F7F8 FF28 BL assert_failed ; 0x08004798
+ 0x0800B944: F7F8 FF28 BL assert_failed ; 0x08004798
.L28:
0x0800B948: 9806 LDR R0, [SP, #24]
@@ -40695,5 +40468,6 @@
0x0800B94E: 6891 LDR R1, [R2, #8]
0x0800B950: 6912 LDR R2, [R2, #16]
- 0x0800B952: F004 FA4F BL TIM_TI1_ConfigInputStage ; 0x0800FDF4
+ 0x0800B952: F004 FA4F BL TIM_TI1_ConfigInputStage ; 0x0800FDF4
0x0800B956: E0DE B .L43 ; 0x0800BB16
.L29:
@@ -40762,6 +40536,5 @@
0x0800B9F6: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800B9FA: F641 512D MOVW R1, #0x1D2D
- 0x0800B9FE: F7F8 FECB BL assert_failed ; 0x08004798
+ 0x0800B9FE: F7F8 FECB BL assert_failed ; 0x08004798
.L32:
0x0800BA02: 9805 LDR R0, [SP, #20]
@@ -40789,6 +40562,5 @@
0x0800BA2E: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800BA32: F641 512E MOVW R1, #0x1D2E
- 0x0800BA36: F7F8 FEAF BL assert_failed ; 0x08004798
+ 0x0800BA36: F7F8 FEAF BL assert_failed ; 0x08004798
.L35:
0x0800BA3A: 9805 LDR R0, [SP, #20]
@@ -40801,6 +40573,5 @@
0x0800BA48: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800BA4C: F641 512F MOVW R1, #0x1D2F
- 0x0800BA50: F7F8 FEA2 BL assert_failed ; 0x08004798
+ 0x0800BA50: F7F8 FEA2 BL assert_failed ; 0x08004798
.L37:
0x0800BA54: 9806 LDR R0, [SP, #24]
@@ -40809,5 +40580,6 @@
0x0800BA5A: 6891 LDR R1, [R2, #8]
0x0800BA5C: 6912 LDR R2, [R2, #16]
- 0x0800BA5E: F7FF FBDB BL TIM_TI2_ConfigInputStage ; 0x0800B218
+ 0x0800BA5E: F7FF FBDB BL TIM_TI2_ConfigInputStage ; 0x0800B218
0x0800BA62: E058 B .L43 ; 0x0800BB16
.L38:
@@ -40876,6 +40648,5 @@
0x0800BB02: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800BB06: F641 5148 MOVW R1, #0x1D48
- 0x0800BB0A: F7F8 FE45 BL assert_failed ; 0x08004798
+ 0x0800BB0A: F7F8 FE45 BL assert_failed ; 0x08004798
.L41:
0x0800BB0E: E002 B .L43 ; 0x0800BB16
@@ -40893,5 +40664,5 @@
Section .text.HAL_UART_Init from charger_lto.o, size=542, align=2
-
HAL_UART_Init:
+
HAL_UART_Init:
0x0800BB26: B580 PUSH {R7, LR}
0x0800BB28: B082 SUB SP, SP, #8
@@ -40979,6 +40750,5 @@
0x0800BBF6: F6C0 0001 MOVT R0, #0x0801 ; 0x08010DD2 = .rodata..L.str.128
0x0800BBFA: F44F 719F MOV.W R1, #0x013E
- 0x0800BBFE: F7F8 FDCB BL assert_failed ; 0x08004798
+ 0x0800BBFE: F7F8 FDCB BL assert_failed ; 0x08004798
.L4:
0x0800BC02: E060 B .L8 ; 0x0800BCC6
@@ -41056,6 +40826,5 @@
0x0800BCBA: F6C0 0001 MOVT R0, #0x0801 ; 0x08010DD2 = .rodata..L.str.128
0x0800BCBE: F240 1143 MOVW R1, #0x0143
- 0x0800BCC2: F7F8 FD69 BL assert_failed ; 0x08004798
+ 0x0800BCC2: F7F8 FD69 BL assert_failed ; 0x08004798
.L8:
0x0800BCC6: 9800 LDR R0, [SP, #0]
@@ -41066,5 +40835,6 @@
0x0800BCD2: F881 0084 STRB.W R0, [R1, #132]
0x0800BCD6: 9800 LDR R0, [SP, #0]
- 0x0800BCD8: F7F8 FFB7 BL HAL_UART_MspInit ; 0x08004C4A
+ 0x0800BCD8: F7F8 FFB7 BL HAL_UART_MspInit ; 0x08004C4A
.L9:
0x0800BCDC: 9900 LDR R1, [SP, #0]
@@ -41080,9 +40850,8 @@
0x0800BCF4: B110 CBZ R0, .L10 ; 0x0800BCFC
0x0800BCF6: 9800 LDR R0, [SP, #0]
- 0x0800BCF8: F000 F824 BL UART_AdvFeatureConfig ; 0x0800BD44
+ 0x0800BCF8: F000 F824 BL UART_AdvFeatureConfig ; 0x0800BD44
.L10:
0x0800BCFC: 9800 LDR R0, [SP, #0]
- 0x0800BCFE: F7F7 FD53 BL UART_SetConfig ; 0x080037A8
+ 0x0800BCFE: F7F7 FD53 BL UART_SetConfig ; 0x080037A8
0x0800BD02: 2801 CMP R0, #1
0x0800BD04: D103 BNE .L11 ; 0x0800BD0E
@@ -41107,5 +40876,5 @@
0x0800BD30: 6008 STR R0, [R1]
0x0800BD32: 9800 LDR R0, [SP, #0]
- 0x0800BD34: F004 FA42 BL UART_CheckIdleState ; 0x080101BC
+ 0x0800BD34: F004 FA42 BL UART_CheckIdleState ; 0x080101BC
0x0800BD38: F88D 0007 STRB.W R0, [SP, #7]
.L12:
@@ -41116,5 +40885,5 @@
Section .text.UART_AdvFeatureConfig from charger_lto.o, size=826, align=2
-
UART_AdvFeatureConfig:
+
UART_AdvFeatureConfig:
0x0800BD44: B580 PUSH {R7, LR}
0x0800BD46: B082 SUB SP, SP, #8
@@ -41129,6 +40898,5 @@
0x0800BD58: F6C0 0001 MOVT R0, #0x0801 ; 0x08010DD2 = .rodata..L.str.128
0x0800BD5C: F44F 614E MOV.W R1, #0x0CE0
- 0x0800BD60: F7F8 FD1A BL assert_failed ; 0x08004798
+ 0x0800BD60: F7F8 FD1A BL assert_failed ; 0x08004798
.L2:
0x0800BD64: 9801 LDR R0, [SP, #4]
@@ -41150,6 +40918,5 @@
0x0800BD86: F6C0 0001 MOVT R0, #0x0801 ; 0x08010DD2 = .rodata..L.str.128
0x0800BD8A: F640 41E5 MOVW R1, #0x0CE5
- 0x0800BD8E: F7F8 FD03 BL assert_failed ; 0x08004798
+ 0x0800BD8E: F7F8 FD03 BL assert_failed ; 0x08004798
.L5:
0x0800BD92: 9801 LDR R0, [SP, #4]
@@ -41180,6 +40947,5 @@
0x0800BDC6: F6C0 0001 MOVT R0, #0x0801 ; 0x08010DD2 = .rodata..L.str.128
0x0800BDCA: F640 41EC MOVW R1, #0x0CEC
- 0x0800BDCE: F7F8 FCE3 BL assert_failed ; 0x08004798
+ 0x0800BDCE: F7F8 FCE3 BL assert_failed ; 0x08004798
.L9:
0x0800BDD2: 9801 LDR R0, [SP, #4]
@@ -41211,6 +40977,5 @@
0x0800BE08: F6C0 0001 MOVT R0, #0x0801 ; 0x08010DD2 = .rodata..L.str.128
0x0800BE0C: F640 41F3 MOVW R1, #0x0CF3
- 0x0800BE10: F7F8 FCC2 BL assert_failed ; 0x08004798
+ 0x0800BE10: F7F8 FCC2 BL assert_failed ; 0x08004798
.L13:
0x0800BE14: 9801 LDR R0, [SP, #4]
@@ -41242,6 +41007,5 @@
0x0800BE4A: F6C0 0001 MOVT R0, #0x0801 ; 0x08010DD2 = .rodata..L.str.128
0x0800BE4E: F640 41FA MOVW R1, #0x0CFA
- 0x0800BE52: F7F8 FCA1 BL assert_failed ; 0x08004798
+ 0x0800BE52: F7F8 FCA1 BL assert_failed ; 0x08004798
.L17:
0x0800BE56: 9801 LDR R0, [SP, #4]
@@ -41273,6 +41037,5 @@
0x0800BE8C: F6C0 0001 MOVT R0, #0x0801 ; 0x08010DD2 = .rodata..L.str.128
0x0800BE90: F640 5101 MOVW R1, #0x0D01
- 0x0800BE94: F7F8 FC80 BL assert_failed ; 0x08004798
+ 0x0800BE94: F7F8 FC80 BL assert_failed ; 0x08004798
.L21:
0x0800BE98: 9801 LDR R0, [SP, #4]
@@ -41304,6 +41067,5 @@
0x0800BECE: F6C0 0001 MOVT R0, #0x0801 ; 0x08010DD2 = .rodata..L.str.128
0x0800BED2: F640 5108 MOVW R1, #0x0D08
- 0x0800BED6: F7F8 FC5F BL assert_failed ; 0x08004798
+ 0x0800BED6: F7F8 FC5F BL assert_failed ; 0x08004798
.L25:
0x0800BEDA: 9801 LDR R0, [SP, #4]
@@ -41388,6 +41150,5 @@
0x0800BFA2: F6C0 0001 MOVT R0, #0x0801 ; 0x08010DD2 = .rodata..L.str.128
0x0800BFA6: F640 510F MOVW R1, #0x0D0F
- 0x0800BFAA: F7F8 FBF5 BL assert_failed ; 0x08004798
+ 0x0800BFAA: F7F8 FBF5 BL assert_failed ; 0x08004798
.L29:
0x0800BFAE: 9801 LDR R0, [SP, #4]
@@ -41404,6 +41165,5 @@
0x0800BFC4: F6C0 0001 MOVT R0, #0x0801 ; 0x08010DD2 = .rodata..L.str.128
0x0800BFC8: F44F 6151 MOV.W R1, #0x0D10
- 0x0800BFCC: F7F8 FBE4 BL assert_failed ; 0x08004798
+ 0x0800BFCC: F7F8 FBE4 BL assert_failed ; 0x08004798
.L32:
0x0800BFD0: 9801 LDR R0, [SP, #4]
@@ -41441,6 +41201,5 @@
0x0800C018: F6C0 0001 MOVT R0, #0x0801 ; 0x08010DD2 = .rodata..L.str.128
0x0800C01C: F640 5115 MOVW R1, #0x0D15
- 0x0800C020: F7F8 FBBA BL assert_failed ; 0x08004798
+ 0x0800C020: F7F8 FBBA BL assert_failed ; 0x08004798
.L35:
0x0800C024: 9801 LDR R0, [SP, #4]
@@ -41472,6 +41231,5 @@
0x0800C05A: F6C0 0001 MOVT R0, #0x0801 ; 0x08010DD2 = .rodata..L.str.128
0x0800C05E: F640 511D MOVW R1, #0x0D1D
- 0x0800C062: F7F8 FB99 BL assert_failed ; 0x08004798
+ 0x0800C062: F7F8 FB99 BL assert_failed ; 0x08004798
.L39:
0x0800C066: 9801 LDR R0, [SP, #4]
@@ -41490,5 +41248,5 @@
Section .text.UART_WaitOnFlagUntilTimeout from charger_lto.o, size=226, align=2
-
UART_WaitOnFlagUntilTimeout:
+
UART_WaitOnFlagUntilTimeout:
0x0800C07E: B580 PUSH {R7, LR}
0x0800C080: B086 SUB SP, SP, #24
@@ -41514,6 +41272,5 @@
0x0800C0AE: 2800 CMP R0, #0
0x0800C0B0: D04E BEQ .L5 ; 0x0800C150
- 0x0800C0B2: F001 FB57 BL HAL_GetTick ; 0x0800D764
+ 0x0800C0B2: F001 FB57 BL HAL_GetTick ; 0x0800D764
0x0800C0B6: 9901 LDR R1, [SP, #4]
0x0800C0B8: 1A40 SUBS R0, R0, R1
@@ -41552,5 +41309,6 @@
0x0800C0FA: 6208 STR R0, [R1, #32]
0x0800C0FC: 9804 LDR R0, [SP, #16]
- 0x0800C0FE: F004 F905 BL UART_EndRxTransfer ; 0x0801030C
+ 0x0800C0FE: F004 F905 BL UART_EndRxTransfer ; 0x0801030C
0x0800C102: 9800 LDR R0, [SP, #0]
0x0800C104: 9904 LDR R1, [SP, #16]
@@ -41574,5 +41332,6 @@
0x0800C130: 6208 STR R0, [R1, #32]
0x0800C132: 9804 LDR R0, [SP, #16]
- 0x0800C134: F004 F8EA BL UART_EndRxTransfer ; 0x0801030C
+ 0x0800C134: F004 F8EA BL UART_EndRxTransfer ; 0x0801030C
0x0800C138: 9904 LDR R1, [SP, #16]
0x0800C13A: 2020 MOVS R0, #32
@@ -41596,5 +41355,5 @@
Section .text.HAL_UART_IRQHandler from charger_lto.o, size=1706, align=2
-
HAL_UART_IRQHandler:
+
HAL_UART_IRQHandler:
0x0800C160: B580 PUSH {R7, LR}
0x0800C162: B0BA SUB SP, SP, #232
@@ -41779,5 +41538,6 @@
.L13:
0x0800C308: 9811 LDR R0, [SP, #68]
- 0x0800C30A: F003 FFFF BL UART_EndRxTransfer ; 0x0801030C
+ 0x0800C30A: F003 FFFF BL UART_EndRxTransfer ; 0x0801030C
0x0800C30E: 9811 LDR R0, [SP, #68]
0x0800C310: 6800 LDR R0, [R0]
@@ -41820,5 +41580,6 @@
0x0800C366: 9811 LDR R0, [SP, #68]
0x0800C368: F8D0 0080 LDR.W R0, [R0, #128]
- 0x0800C36C: F001 FCB4 BL HAL_DMA_Abort_IT ; 0x0800DCD8
+ 0x0800C36C: F001 FCB4 BL HAL_DMA_Abort_IT ; 0x0800DCD8
0x0800C370: B120 CBZ R0, .L15 ; 0x0800C37C
0x0800C372: 9811 LDR R0, [SP, #68]
@@ -41830,15 +41591,18 @@
.L16:
0x0800C37E: 9811 LDR R0, [SP, #68]
- 0x0800C380: F001 F904 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
+ 0x0800C380: F001 F904 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
.L17:
0x0800C384: E002 B .L19 ; 0x0800C38C
.L18:
0x0800C386: 9811 LDR R0, [SP, #68]
- 0x0800C388: F001 F900 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
+ 0x0800C388: F001 F900 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
.L19:
0x0800C38C: E006 B .L21 ; 0x0800C39C
.L20:
0x0800C38E: 9811 LDR R0, [SP, #68]
- 0x0800C390: F001 F8FC BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
+ 0x0800C390: F001 F8FC BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
0x0800C394: 9911 LDR R1, [SP, #68]
0x0800C396: 2000 MOVS R0, #0
@@ -42113,6 +41877,5 @@
0x0800C632: 9811 LDR R0, [SP, #68]
0x0800C634: F8D0 0080 LDR.W R0, [R0, #128]
- 0x0800C638: F7F9 FBFF BL HAL_DMA_Abort ; 0x08005E3A
+ 0x0800C638: F7F9 FBFF BL HAL_DMA_Abort ; 0x08005E3A
.L30:
0x0800C63C: 9911 LDR R1, [SP, #68]
@@ -42124,5 +41887,6 @@
0x0800C64C: 1A89 SUBS R1, R1, R2
0x0800C64E: B289 UXTH R1, R1
- 0x0800C650: F000 FF96 BL HAL_UARTEx_RxEventCallback ; 0x0800D580
+ 0x0800C650: F000 FF96 BL HAL_UARTEx_RxEventCallback ; 0x0800D580
0x0800C654: E015 B .L32 ; 0x0800C682
.L31:
@@ -42142,5 +41906,6 @@
0x0800C678: 9811 LDR R0, [SP, #68]
0x0800C67A: F8B0 105C LDRH.W R1, [R0, #92]
- 0x0800C67E: F000 FF7F BL HAL_UARTEx_RxEventCallback ; 0x0800D580
+ 0x0800C67E: F000 FF7F BL HAL_UARTEx_RxEventCallback ; 0x0800D580
.L32:
0x0800C682: E0C0 B .L45 ; 0x0800C806
@@ -42241,5 +42006,5 @@
0x0800C758: 9811 LDR R0, [SP, #68]
0x0800C75A: F8BD 1016 LDRH.W R1, [SP, #22]
- 0x0800C75E: F000 FF0F BL HAL_UARTEx_RxEventCallback ; 0x0800D580
+ 0x0800C75E: F000 FF0F BL HAL_UARTEx_RxEventCallback ; 0x0800D580
.L37:
0x0800C762: E050 B .L45 ; 0x0800C806
@@ -42258,5 +42023,6 @@
0x0800C780: 6208 STR R0, [R1, #32]
0x0800C782: 9811 LDR R0, [SP, #68]
- 0x0800C784: F000 FF02 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
+ 0x0800C784: F000 FF02 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
0x0800C788: E03D B .L45 ; 0x0800C806
.L39:
@@ -42292,5 +42058,5 @@
0x0800C7C8: D503 BPL .L43 ; 0x0800C7D2
0x0800C7CA: 9811 LDR R0, [SP, #68]
- 0x0800C7CC: F000 F82C BL UART_EndTransmit_IT ; 0x0800C828
+ 0x0800C7CC: F000 F82C BL UART_EndTransmit_IT ; 0x0800C828
0x0800C7D0: E019 B .L45 ; 0x0800C806
.L43:
@@ -42304,5 +42070,6 @@
0x0800C7E4: D503 BPL .L44 ; 0x0800C7EE
0x0800C7E6: 9811 LDR R0, [SP, #68]
- 0x0800C7E8: F000 FED0 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
+ 0x0800C7E8: F000 FED0 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
0x0800C7EC: E00B B .L45 ; 0x0800C806
.L44:
@@ -42315,5 +42082,6 @@
0x0800C7FE: D502 BPL .L45 ; 0x0800C806
0x0800C800: 9811 LDR R0, [SP, #68]
- 0x0800C802: F000 FEC3 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
+ 0x0800C802: F000 FEC3 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
.L45:
0x0800C806: B03A ADD SP, SP, #232
@@ -42322,5 +42090,5 @@
Section .text.UART_DMAAbortOnError from charger_lto.o, size=30, align=2
-
UART_DMAAbortOnError:
+
UART_DMAAbortOnError:
0x0800C80A: B580 PUSH {R7, LR}
0x0800C80C: B082 SUB SP, SP, #8
@@ -42333,5 +42101,6 @@
0x0800C81A: F8A1 005E STRH.W R0, [R1, #94]
0x0800C81E: 9800 LDR R0, [SP, #0]
- 0x0800C820: F000 FEB4 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
+ 0x0800C820: F000 FEB4 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
0x0800C824: B002 ADD SP, SP, #8
0x0800C826: BD80 POP {R7, PC}
@@ -42339,5 +42108,5 @@
Section .text.UART_EndTransmit_IT from charger_lto.o, size=78, align=2
-
UART_EndTransmit_IT:
+
UART_EndTransmit_IT:
0x0800C828: B580 PUSH {R7, LR}
0x0800C82A: B088 SUB SP, SP, #32
@@ -42372,5 +42141,6 @@
0x0800C86A: 6788 STR R0, [R1, #120]
0x0800C86C: 9802 LDR R0, [SP, #8]
- 0x0800C86E: F000 FE8D BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
+ 0x0800C86E: F000 FE8D BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
0x0800C872: B008 ADD SP, SP, #32
0x0800C874: BD80 POP {R7, PC}
@@ -42378,5 +42148,5 @@
Section .text.UARTEx_SetNbDataToProcess from charger_lto.o, size=130, align=2
-
UARTEx_SetNbDataToProcess:
+
UARTEx_SetNbDataToProcess:
0x0800C876: B082 SUB SP, SP, #8
0x0800C878: 9001 STR R0, [SP, #4]
@@ -42430,5 +42200,5 @@
Section .text.HAL_UARTEx_DisableFifoMode from charger_lto.o, size=306, align=2
-
HAL_UARTEx_DisableFifoMode:
+
HAL_UARTEx_DisableFifoMode:
0x0800C8F8: B580 PUSH {R7, LR}
0x0800C8FA: B084 SUB SP, SP, #16
@@ -42506,6 +42276,5 @@
0x0800C9B4: F6C0 0001 MOVT R0, #0x0801 ; 0x080109C3 = .rodata..L.str.131
0x0800C9B8: F240 2136 MOVW R1, #0x0236
- 0x0800C9BC: F7F7 FEEC BL assert_failed ; 0x08004798
+ 0x0800C9BC: F7F7 FEEC BL assert_failed ; 0x08004798
.L3:
0x0800C9C0: 9802 LDR R0, [SP, #8]
@@ -42557,5 +42326,5 @@
Section .text.HAL_UARTEx_SetTxFifoThreshold from charger_lto.o, size=382, align=2
-
HAL_UARTEx_SetTxFifoThreshold:
+
HAL_UARTEx_SetTxFifoThreshold:
0x0800CA2A: B580 PUSH {R7, LR}
0x0800CA2C: B084 SUB SP, SP, #16
@@ -42634,6 +42403,5 @@
0x0800CAE8: F6C0 0001 MOVT R0, #0x0801 ; 0x080109C3 = .rodata..L.str.131
0x0800CAEC: F44F 7119 MOV.W R1, #0x0264
- 0x0800CAF0: F7F7 FE52 BL assert_failed ; 0x08004798
+ 0x0800CAF0: F7F7 FE52 BL assert_failed ; 0x08004798
.L3:
0x0800CAF4: 9801 LDR R0, [SP, #4]
@@ -42660,6 +42428,5 @@
0x0800CB26: F6C0 0001 MOVT R0, #0x0801 ; 0x080109C3 = .rodata..L.str.131
0x0800CB2A: F240 2165 MOVW R1, #0x0265
- 0x0800CB2E: F7F7 FE33 BL assert_failed ; 0x08004798
+ 0x0800CB2E: F7F7 FE33 BL assert_failed ; 0x08004798
.L6:
0x0800CB32: 9802 LDR R0, [SP, #8]
@@ -42696,5 +42463,6 @@
0x0800CB7A: 6088 STR R0, [R1, #8]
0x0800CB7C: 9802 LDR R0, [SP, #8]
- 0x0800CB7E: F7FF FE7A BL UARTEx_SetNbDataToProcess ; 0x0800C876
+ 0x0800CB7E: F7FF FE7A BL UARTEx_SetNbDataToProcess ; 0x0800C876
0x0800CB82: 9800 LDR R0, [SP, #0]
0x0800CB84: 9902 LDR R1, [SP, #8]
@@ -42716,5 +42484,5 @@
Section .text.HAL_UARTEx_SetRxFifoThreshold from charger_lto.o, size=382, align=2
-
HAL_UARTEx_SetRxFifoThreshold:
+
HAL_UARTEx_SetRxFifoThreshold:
0x0800CBA8: B580 PUSH {R7, LR}
0x0800CBAA: B084 SUB SP, SP, #16
@@ -42793,6 +42561,5 @@
0x0800CC66: F6C0 0001 MOVT R0, #0x0801 ; 0x080109C3 = .rodata..L.str.131
0x0800CC6A: F240 2195 MOVW R1, #0x0295
- 0x0800CC6E: F7F7 FD93 BL assert_failed ; 0x08004798
+ 0x0800CC6E: F7F7 FD93 BL assert_failed ; 0x08004798
.L3:
0x0800CC72: 9801 LDR R0, [SP, #4]
@@ -42819,6 +42586,5 @@
0x0800CCA4: F6C0 0001 MOVT R0, #0x0801 ; 0x080109C3 = .rodata..L.str.131
0x0800CCA8: F240 2196 MOVW R1, #0x0296
- 0x0800CCAC: F7F7 FD74 BL assert_failed ; 0x08004798
+ 0x0800CCAC: F7F7 FD74 BL assert_failed ; 0x08004798
.L6:
0x0800CCB0: 9802 LDR R0, [SP, #8]
@@ -42855,5 +42621,6 @@
0x0800CCF8: 6088 STR R0, [R1, #8]
0x0800CCFA: 9802 LDR R0, [SP, #8]
- 0x0800CCFC: F7FF FDBB BL UARTEx_SetNbDataToProcess ; 0x0800C876
+ 0x0800CCFC: F7FF FDBB BL UARTEx_SetNbDataToProcess ; 0x0800C876
0x0800CD00: 9800 LDR R0, [SP, #0]
0x0800CD02: 9902 LDR R1, [SP, #8]
@@ -42875,5 +42642,5 @@
Section .text.SDMMC_ReadFIFO from charger_lto.o, size=14, align=2
-
SDMMC_ReadFIFO:
+
SDMMC_ReadFIFO:
0x0800CD26: B081 SUB SP, SP, #4
0x0800CD28: 9000 STR R0, [SP, #0]
@@ -42885,5 +42652,5 @@
Section .text.SDMMC_WriteFIFO from charger_lto.o, size=22, align=2
-
SDMMC_WriteFIFO:
+
SDMMC_WriteFIFO:
0x0800CD34: B082 SUB SP, SP, #8
0x0800CD36: 9001 STR R0, [SP, #4]
@@ -42899,5 +42666,5 @@
Section .text.SDMMC_SendCommand from charger_lto.o, size=218, align=2
-
SDMMC_SendCommand:
+
SDMMC_SendCommand:
0x0800CD4A: B580 PUSH {R7, LR}
0x0800CD4C: B084 SUB SP, SP, #16
@@ -42915,6 +42682,5 @@
0x0800CD64: F6C0 0001 MOVT R0, #0x0801 ; 0x08010E4A = .rodata..L.str.146
0x0800CD68: F240 1165 MOVW R1, #0x0165
- 0x0800CD6C: F7F7 FD14 BL assert_failed ; 0x08004798
+ 0x0800CD6C: F7F7 FD14 BL assert_failed ; 0x08004798
.L2:
0x0800CD70: 9802 LDR R0, [SP, #8]
@@ -42935,6 +42701,5 @@
0x0800CD90: F6C0 0001 MOVT R0, #0x0801 ; 0x08010E4A = .rodata..L.str.146
0x0800CD94: F44F 71B3 MOV.W R1, #0x0166
- 0x0800CD98: F7F7 FCFE BL assert_failed ; 0x08004798
+ 0x0800CD98: F7F7 FCFE BL assert_failed ; 0x08004798
.L5:
0x0800CD9C: 9802 LDR R0, [SP, #8]
@@ -42955,6 +42720,5 @@
0x0800CDBC: F6C0 0001 MOVT R0, #0x0801 ; 0x08010E4A = .rodata..L.str.146
0x0800CDC0: F240 1167 MOVW R1, #0x0167
- 0x0800CDC4: F7F7 FCE8 BL assert_failed ; 0x08004798
+ 0x0800CDC4: F7F7 FCE8 BL assert_failed ; 0x08004798
.L8:
0x0800CDC8: 9802 LDR R0, [SP, #8]
@@ -42971,6 +42735,5 @@
0x0800CDDE: F6C0 0001 MOVT R0, #0x0801 ; 0x08010E4A = .rodata..L.str.146
0x0800CDE2: F44F 71B4 MOV.W R1, #0x0168
- 0x0800CDE6: F7F7 FCD7 BL assert_failed ; 0x08004798
+ 0x0800CDE6: F7F7 FCD7 BL assert_failed ; 0x08004798
.L11:
0x0800CDEA: 9802 LDR R0, [SP, #8]
@@ -43004,5 +42767,5 @@
Section .text.SDMMC_GetCommandResponse from charger_lto.o, size=14, align=2
-
SDMMC_GetCommandResponse:
+
SDMMC_GetCommandResponse:
0x0800CE24: B081 SUB SP, SP, #4
0x0800CE26: 9000 STR R0, [SP, #0]
@@ -43015,5 +42778,5 @@
Section .text.SDMMC_GetResponse from charger_lto.o, size=66, align=2
-
SDMMC_GetResponse:
+
SDMMC_GetResponse:
0x0800CE32: B580 PUSH {R7, LR}
0x0800CE34: B084 SUB SP, SP, #16
@@ -43037,6 +42800,5 @@
0x0800CE56: F6C0 0001 MOVT R0, #0x0801 ; 0x08010E4A = .rodata..L.str.146
0x0800CE5A: F44F 71CA MOV.W R1, #0x0194
- 0x0800CE5E: F7F7 FC9B BL assert_failed ; 0x08004798
+ 0x0800CE5E: F7F7 FC9B BL assert_failed ; 0x08004798
.L3:
0x0800CE62: 9803 LDR R0, [SP, #12]
@@ -43052,5 +42814,5 @@
Section .text.SDMMC_GetCmdResp1 from charger_lto.o, size=526, align=2
-
SDMMC_GetCmdResp1:
+
SDMMC_GetCmdResp1:
0x0800CE74: B580 PUSH {R7, LR}
0x0800CE76: B088 SUB SP, SP, #32
@@ -43122,5 +42884,6 @@
0x0800CF06: 6388 STR R0, [R1, #56]
0x0800CF08: 9806 LDR R0, [SP, #24]
- 0x0800CF0A: F7FF FF8B BL SDMMC_GetCommandResponse ; 0x0800CE24
+ 0x0800CF0A: F7FF FF8B BL SDMMC_GetCommandResponse ; 0x0800CE24
0x0800CF0E: F89D 1017 LDRB.W R1, [SP, #23]
0x0800CF12: 4288 CMP R0, R1
@@ -43132,5 +42895,6 @@
0x0800CF1C: 9806 LDR R0, [SP, #24]
0x0800CF1E: 2100 MOVS R1, #0
- 0x0800CF20: F7FF FF87 BL SDMMC_GetResponse ; 0x0800CE32
+ 0x0800CF20: F7FF FF87 BL SDMMC_GetResponse ; 0x0800CE32
0x0800CF24: 9003 STR R0, [SP, #12]
0x0800CF26: 9803 LDR R0, [SP, #12]
@@ -43294,5 +43058,5 @@
Section .text.libc.fwrite from fileops.o (libc_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=46, align=2
-
fwrite:
+
fwrite:
0x0800D082: B5F8 PUSH {R3-R7, LR}
0x0800D084: 461D MOV R5, R3
@@ -43301,5 +43065,5 @@
0x0800D08A: 4606 MOV R6, R0
0x0800D08C: 4618 MOV R0, R3
- 0x0800D08E: F003 FACF BL __SEGGER_RTL_X_file_stat ; 0x08010630
+ 0x0800D08E: F003 FACF BL __SEGGER_RTL_X_file_stat ; 0x08010630
0x0800D092: 2800 CMP R0, #0
0x0800D094: D403 BMI .L1 ; 0x0800D09E
@@ -43313,5 +43077,5 @@
0x0800D0A2: 4628 MOV R0, R5
0x0800D0A4: 4631 MOV R1, R6
- 0x0800D0A6: F000 F865 BL __SEGGER_RTL_X_file_write ; 0x0800D174
+ 0x0800D0A6: F000 F865 BL __SEGGER_RTL_X_file_write ; 0x0800D174
0x0800D0AA: FBB0 F0F4 UDIV R0, R0, R4
0x0800D0AE: BDF8 POP {R3-R7, PC}
@@ -43319,5 +43083,6 @@
Section .text.libc.__SEGGER_RTL_float64_isinf from floatops.o (libc_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=26, align=2
-
__SEGGER_RTL_float64_isinf:
+
__SEGGER_RTL_float64_isinf:
0x0800D0B0: EC51 0B10 VMOV R0, R1, D0
0x0800D0B4: F021 4100 BIC R1, R1, #0x80000000
@@ -43331,5 +43096,5 @@
Section .text.libc.__SEGGER_RTL_float64_isnormal from floatops.o (libc_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=34, align=2
-
__SEGGER_RTL_float64_isnormal:
+
__SEGGER_RTL_float64_isnormal:
0x0800D0CA: EC51 0B10 VMOV R0, R1, D0
0x0800D0CE: 004A LSLS R2, R1, #1
@@ -43348,5 +43113,5 @@
Section .text.libc.ldexp from floatops.o (libc_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=66, align=2
-
ldexp:
+
ldexp:
0x0800D0EC: EC51 2B10 VMOV R2, R1, D0
0x0800D0F0: F3C1 530A UBFX R3, R1, #20, #11
@@ -43379,5 +43144,5 @@
Section .text.libc.__SEGGER_RTL_pre_padding from prinops.o (libc_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=18, align=2
-
__SEGGER_RTL_pre_padding:
+
__SEGGER_RTL_pre_padding:
0x0800D12E: 06CB LSLS R3, R1, #27
0x0800D130: BF48 IT MI
@@ -43387,18 +43152,18 @@
0x0800D138: 2130 MOVMI R1, #48
0x0800D13A: 2120 MOVPL R1, #32
- 0x0800D13C: F003 BA26 B.W __SEGGER_RTL_print_padding ; 0x0801058C
+ 0x0800D13C: F003 BA26 B.W __SEGGER_RTL_print_padding ; 0x0801058C
Section .text.libc.__SEGGER_RTL_stream_write from prinops.o (libc_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=10, align=2
-
__SEGGER_RTL_stream_write:
+
__SEGGER_RTL_stream_write:
0x0800D140: 6A43 LDR R3, [R0, #36]
0x0800D142: 4608 MOV R0, R1
0x0800D144: 2101 MOVS R1, #1
- 0x0800D146: F7FF BF9C B.W fwrite ; 0x0800D082
+ 0x0800D146: F7FF BF9C B.W fwrite ; 0x0800D082
Section .text.libc.printf from prinops.o (libc_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=42, align=2
-
printf:
+
printf:
0x0800D14A: B083 SUB SP, SP, #12
0x0800D14C: B500 PUSH {LR}
@@ -43413,6 +43178,5 @@
0x0800D162: 9201 STR R2, [SP, #4]
0x0800D164: 4661 MOV R1, R12
- 0x0800D166: F003 FA1F BL vfprintf ; 0x080105A8
+ 0x0800D166: F003 FA1F BL vfprintf ; 0x080105A8
0x0800D16A: B002 ADD SP, SP, #8
0x0800D16C: F85D EB04 POP.W {LR}
@@ -43422,11 +43186,12 @@
Section .text.libc.__SEGGER_RTL_X_file_write from prinops_rtt.o (prinops_rtt_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=6, align=2
-
__SEGGER_RTL_X_file_write:
+
__SEGGER_RTL_X_file_write:
0x0800D174: 6800 LDR R0, [R0]
- 0x0800D176: F000 B896 B.W SEGGER_RTT_Write ; 0x0800D2A6
+ 0x0800D176: F000 B896 B.W SEGGER_RTT_Write ; 0x0800D2A6
Section .text.libc._DoInit from SEGGER_RTT.o (prinops_rtt_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=102, align=2
-
_DoInit:
+
_DoInit:
0x0800D17A: F240 0000 MOVW R0, #0 ; 0x24000000 = _SEGGER_RTT
0x0800D17E: F2C2 4000 MOVT R0, #0x2400 ; 0x24000000 = _SEGGER_RTT
@@ -43470,5 +43235,5 @@
Section .text.libc._GetAvailWriteSpace from SEGGER_RTT.o (prinops_rtt_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=22, align=2
-
_GetAvailWriteSpace:
+
_GetAvailWriteSpace:
0x0800D1E0: 4601 MOV R1, R0
0x0800D1E2: 68C0 LDR R0, [R0, #12]
@@ -43484,5 +43249,5 @@
Section .text.libc._WriteBlocking from SEGGER_RTT.o (prinops_rtt_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=86, align=2
-
_WriteBlocking:
+
_WriteBlocking:
0x0800D1F6: E92D 43F8 PUSH.W {R3-R9, LR}
0x0800D1FA: 4614 MOV R4, R2
@@ -43510,6 +43275,5 @@
0x0800D226: 4641 MOV R1, R8
0x0800D228: 4632 MOV R2, R6
- 0x0800D22A: F7F6 FA19 BL memcpy ; 0x08003660
+ 0x0800D22A: F7F6 FA19 BL memcpy ; 0x08003660
0x0800D22E: 68A8 LDR R0, [R5, #8]
0x0800D230: 19F1 ADDS R1, R6, R7
@@ -43529,5 +43293,5 @@
SEGGER_RTT_WriteNoLock:
+Ý&">SEGGER_RTT_WriteNoLock:
0x0800D24C: B570 PUSH {R4-R6, LR}
0x0800D24E: 460D MOV R5, R1
@@ -43545,5 +43309,6 @@
0x0800D270: B920 CBNZ R0, .L1 ; 0x0800D27C
0x0800D272: 4630 MOV R0, R6
- 0x0800D274: F7FF FFB4 BL _GetAvailWriteSpace ; 0x0800D1E0
+ 0x0800D274: F7FF FFB4 BL _GetAvailWriteSpace ; 0x0800D1E0
0x0800D278: 42A0 CMP R0, R4
0x0800D27A: D207 BCS .L3 ; 0x0800D28C
@@ -43553,5 +43318,6 @@
.L2:
0x0800D280: 4630 MOV R0, R6
- 0x0800D282: F7FF FFAD BL _GetAvailWriteSpace ; 0x0800D1E0
+ 0x0800D282: F7FF FFAD BL _GetAvailWriteSpace ; 0x0800D1E0
0x0800D286: 42A0 CMP R0, R4
0x0800D288: BF38 IT CC
@@ -43561,6 +43327,5 @@
0x0800D28E: 4629 MOV R1, R5
0x0800D290: 4622 MOV R2, R4
- 0x0800D292: F003 F9EB BL _WriteNoCheck ; 0x0801066C
+ 0x0800D292: F003 F9EB BL _WriteNoCheck ; 0x0801066C
.L4:
0x0800D296: 4620 MOV R0, R4
@@ -43570,10 +43335,9 @@
0x0800D29C: 4629 MOV R1, R5
0x0800D29E: E8BD 4070 POP.W {R4-R6, LR}
- 0x0800D2A2: F7FF BFA8 B.W _WriteBlocking ; 0x0800D1F6
+ 0x0800D2A2: F7FF BFA8 B.W _WriteBlocking ; 0x0800D1F6
Section .text.libc.SEGGER_RTT_Write from SEGGER_RTT.o (prinops_rtt_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=54, align=2
-
SEGGER_RTT_Write:
+
SEGGER_RTT_Write:
0x0800D2A6: B5F8 PUSH {R3-R7, LR}
0x0800D2A8: 4614 MOV R4, R2
@@ -43585,6 +43349,5 @@
0x0800D2B8: 2800 CMP R0, #0
0x0800D2BA: BF08 IT EQ
- 0x0800D2BC: F7FF FF5D BLEQ _DoInit ; 0x0800D17A
+ 0x0800D2BC: F7FF FF5D BLEQ _DoInit ; 0x0800D17A
0x0800D2C0: F3EF 8711 MRS R7, BASEPRI
0x0800D2C4: F04F 0120 MOV.W R1, #32
@@ -43593,5 +43356,6 @@
0x0800D2CE: 4629 MOV R1, R5
0x0800D2D0: 4622 MOV R2, R4
- 0x0800D2D2: F7FF FFBB BL SEGGER_RTT_WriteNoLock ; 0x0800D24C
+ 0x0800D2D2: F7FF FFBB BL SEGGER_RTT_WriteNoLock ; 0x0800D24C
0x0800D2D6: F387 8811 MSR BASEPRI, R7
0x0800D2DA: BDF8 POP {R3-R7, PC}
@@ -43599,5 +43363,5 @@
Section .text.libc.__SEGGER_RTL_ascii_wctomb from mbops.o (mbops_timeops_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=14, align=2
-
__SEGGER_RTL_ascii_wctomb:
+
__SEGGER_RTL_ascii_wctomb:
0x0800D2DC: 297F CMP R1, #127
0x0800D2DE: BF8E ITEE HI
@@ -43609,6 +43373,6 @@
Section .text.libc.__SEGGER_RTL_ascii_tolower from mbops.o (mbops_timeops_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=14, align=2
-
__SEGGER_RTL_ascii_tolower:
-__SEGGER_RTL_ascii_towlower:
+
__SEGGER_RTL_ascii_tolower:
+__SEGGER_RTL_ascii_towlower:
0x0800D2EA: F1A0 0141 SUB.W R1, R0, #65 ; Dedupe identical section .text.libc.__SEGGER_RTL_ascii_towlower
0x0800D2EE: 291A CMP R1, #26
@@ -43619,11 +43383,10 @@
Section .text.SystemClock_Config() from charger_lto.o, size=208, align=2
-
SystemClock_Config():
+
SystemClock_Config():
0x0800D2F8: B580 PUSH {R7, LR}
0x0800D2FA: B09E SUB SP, SP, #120
0x0800D2FC: A80B ADD R0, SP, #44
0x0800D2FE: 214C MOVS R1, #76
- 0x0800D300: F7F6 F9DC BL __aeabi_memclr ; 0x080036BC
+ 0x0800D300: F7F6 F9DC BL __aeabi_memclr ; 0x080036BC
0x0800D304: 2000 MOVS R0, #0
0x0800D306: 9001 STR R0, [SP, #4]
@@ -43637,5 +43400,5 @@
0x0800D316: 9003 STR R0, [SP, #12]
0x0800D318: 2002 MOVS R0, #2
- 0x0800D31A: F001 FFBB BL HAL_PWREx_ConfigSupply ; 0x0800F294
+ 0x0800D31A: F001 FFBB BL HAL_PWREx_ConfigSupply ; 0x0800F294
0x0800D31E: 2000 MOVS R0, #0
0x0800D320: 9002 STR R0, [SP, #8]
@@ -43659,5 +43422,6 @@
0x0800D352: E7F4 B .L1 ; 0x0800D33E
.L2:
- 0x0800D354: F7F9 FC77 BL HAL_PWR_EnableBkUpAccess ; 0x08006C46
+ 0x0800D354: F7F9 FC77 BL HAL_PWR_EnableBkUpAccess ; 0x08006C46
0x0800D358: F244 4170 MOVW R1, #0x4470
0x0800D35C: F6C5 0102 MOVT R1, #0x5802
@@ -43687,8 +43451,8 @@
0x0800D392: 901D STR R0, [SP, #116]
0x0800D394: A80B ADD R0, SP, #44
- 0x0800D396: F7F9 FC5F BL HAL_RCC_OscConfig ; 0x08006C58
+ 0x0800D396: F7F9 FC5F BL HAL_RCC_OscConfig ; 0x08006C58
0x0800D39A: B108 CBZ R0, .L3 ; 0x0800D3A0
- 0x0800D39C: F000 F814 BL Error_Handler ; 0x0800D3C8
+ 0x0800D39C: F000 F814 BL Error_Handler ; 0x0800D3C8
.L3:
0x0800D3A0: 203F MOVS R0, #63
@@ -43705,8 +43469,8 @@
0x0800D3B6: A803 ADD R0, SP, #12
0x0800D3B8: 2101 MOVS R1, #1
- 0x0800D3BA: F7FA FA1C BL HAL_RCC_ClockConfig ; 0x080077F6
+ 0x0800D3BA: F7FA FA1C BL HAL_RCC_ClockConfig ; 0x080077F6
0x0800D3BE: B108 CBZ R0, .L4 ; 0x0800D3C4
- 0x0800D3C0: F000 F802 BL Error_Handler ; 0x0800D3C8
+ 0x0800D3C0: F000 F802 BL Error_Handler ; 0x0800D3C8
.L4:
0x0800D3C4: B01E ADD SP, SP, #120
@@ -43715,5 +43479,5 @@
Section .text.Error_Handler from charger_lto.o, size=4, align=2
-
Error_Handler:
+
Error_Handler:
0x0800D3C8: B672 CPSID i
.L1:
@@ -43722,5 +43486,5 @@
Section .text.HAL_SPI_MspInit from charger_lto.o, size=260, align=2
-
HAL_SPI_MspInit:
+
HAL_SPI_MspInit:
0x0800D3CC: B580 PUSH {R7, LR}
0x0800D3CE: B0BA SUB SP, SP, #232
@@ -43734,6 +43498,5 @@
0x0800D3DE: A806 ADD R0, SP, #24
0x0800D3E0: 21B8 MOVS R1, #184
- 0x0800D3E2: F7F6 F96B BL __aeabi_memclr ; 0x080036BC
+ 0x0800D3E2: F7F6 F96B BL __aeabi_memclr ; 0x080036BC
0x0800D3E6: 9839 LDR R0, [SP, #228]
0x0800D3E8: 6800 LDR R0, [R0]
@@ -43749,8 +43512,8 @@
0x0800D404: 901E STR R0, [SP, #120]
0x0800D406: A806 ADD R0, SP, #24
- 0x0800D408: F7F4 F8D0 BL HAL_RCCEx_PeriphCLKConfig ; 0x080015AC
+ 0x0800D408: F7F4 F8D0 BL HAL_RCCEx_PeriphCLKConfig ; 0x080015AC
0x0800D40C: B108 CBZ R0, .L1 ; 0x0800D412
- 0x0800D40E: F7FF FFDB BL Error_Handler ; 0x0800D3C8
+ 0x0800D40E: F7FF FFDB BL Error_Handler ; 0x0800D3C8
.L1:
0x0800D412: F244 40F0 MOVW R0, #0x44F0
@@ -43785,6 +43548,5 @@
0x0800D460: F6C5 0002 MOVT R0, #0x5802
0x0800D464: A934 ADD R1, SP, #208
- 0x0800D466: F7F9 F925 BL HAL_GPIO_Init ; 0x080066B4
+ 0x0800D466: F7F9 F925 BL HAL_GPIO_Init ; 0x080066B4
0x0800D46A: 9902 LDR R1, [SP, #8]
0x0800D46C: F240 3030 MOVW R0, #0x0330 ; 0x24000330 = hdma_spi4_tx
@@ -43808,9 +43570,7 @@
0x0800D49C: 6201 STR R1, [R0, #32]
0x0800D49E: 6241 STR R1, [R0, #36]
- 0x0800D4A0: F7F7 FD46 BL HAL_DMA_Init ; 0x08004F30
+ 0x0800D4A0: F7F7 FD46 BL HAL_DMA_Init ; 0x08004F30
0x0800D4A4: B108 CBZ R0, .L2 ; 0x0800D4AA
- 0x0800D4A6: F7FF FF8F BL Error_Handler ; 0x0800D3C8
+ 0x0800D4A6: F7FF FF8F BL Error_Handler ; 0x0800D3C8
.L2:
0x0800D4AA: 9839 LDR R0, [SP, #228]
@@ -43824,7 +43584,8 @@
0x0800D4BE: 2200 MOVS R2, #0
0x0800D4C0: 4611 MOV R1, R2
- 0x0800D4C2: F7F7 FCD8 BL HAL_NVIC_SetPriority ; 0x08004E76
+ 0x0800D4C2: F7F7 FCD8 BL HAL_NVIC_SetPriority ; 0x08004E76
0x0800D4C6: 9801 LDR R0, [SP, #4]
- 0x0800D4C8: F000 F9AA BL HAL_NVIC_EnableIRQ ; 0x0800D820
+ 0x0800D4C8: F000 F9AA BL HAL_NVIC_EnableIRQ ; 0x0800D820
.L3:
0x0800D4CC: B03A ADD SP, SP, #232
@@ -43833,5 +43594,5 @@
Section .text.HAL_MspInit from charger_lto.o, size=32, align=2
-
HAL_MspInit:
+
HAL_MspInit:
0x0800D4D0: B081 SUB SP, SP, #4
0x0800D4D2: F244 40F4 MOVW R0, #0x44F4
@@ -43849,45 +43610,50 @@
Section .text.DMA1_Stream0_IRQHandler from charger_lto.o, size=16, align=2
-
DMA1_Stream0_IRQHandler:
+
DMA1_Stream0_IRQHandler:
0x0800D4F0: B580 PUSH {R7, LR}
0x0800D4F2: F240 3030 MOVW R0, #0x0330 ; 0x24000330 = hdma_spi4_tx
0x0800D4F6: F2C2 4000 MOVT R0, #0x2400 ; 0x24000330 = hdma_spi4_tx
- 0x0800D4FA: F000 FEE5 BL HAL_DMA_IRQHandler ; 0x0800E2C8
+ 0x0800D4FA: F000 FEE5 BL HAL_DMA_IRQHandler ; 0x0800E2C8
0x0800D4FE: BD80 POP {R7, PC}
Section .text.DMA1_Stream1_IRQHandler from charger_lto.o, size=16, align=2
-
DMA1_Stream1_IRQHandler:
+
DMA1_Stream1_IRQHandler:
0x0800D500: B580 PUSH {R7, LR}
0x0800D502: F240 20B8 MOVW R0, #0x02B8 ; 0x240002B8 = hdma_usart3_rx
0x0800D506: F2C2 4000 MOVT R0, #0x2400 ; 0x240002B8 = hdma_usart3_rx
- 0x0800D50A: F000 FEDD BL HAL_DMA_IRQHandler ; 0x0800E2C8
+ 0x0800D50A: F000 FEDD BL HAL_DMA_IRQHandler ; 0x0800E2C8
0x0800D50E: BD80 POP {R7, PC}
Section .text.DMA1_Stream2_IRQHandler from charger_lto.o, size=16, align=2
-
DMA1_Stream2_IRQHandler:
+
DMA1_Stream2_IRQHandler:
0x0800D510: B580 PUSH {R7, LR}
0x0800D512: F240 2040 MOVW R0, #0x0240 ; 0x24000240 = hdma_usart3_tx
0x0800D516: F2C2 4000 MOVT R0, #0x2400 ; 0x24000240 = hdma_usart3_tx
- 0x0800D51A: F000 FED5 BL HAL_DMA_IRQHandler ; 0x0800E2C8
+ 0x0800D51A: F000 FED5 BL HAL_DMA_IRQHandler ; 0x0800E2C8
0x0800D51E: BD80 POP {R7, PC}
Section .text.TIM3_IRQHandler from charger_lto.o, size=16, align=2
-
TIM3_IRQHandler:
+
TIM3_IRQHandler:
0x0800D520: B580 PUSH {R7, LR}
0x0800D522: F240 4040 MOVW R0, #0x0440 ; 0x24000440 = htim3
0x0800D526: F2C2 4000 MOVT R0, #0x2400 ; 0x24000440 = htim3
- 0x0800D52A: F7FC FB8E BL HAL_TIM_IRQHandler ; 0x08009C4A
+ 0x0800D52A: F7FC FB8E BL HAL_TIM_IRQHandler ; 0x08009C4A
0x0800D52E: BD80 POP {R7, PC}
Section .text.USART3_IRQHandler from charger_lto.o, size=16, align=2
-
USART3_IRQHandler:
+
USART3_IRQHandler:
0x0800D530: B580 PUSH {R7, LR}
0x0800D532: F240 00A8 MOVW R0, #168 ; 0x240000A8 = huart3
0x0800D536: F2C2 4000 MOVT R0, #0x2400 ; 0x240000A8 = huart3
- 0x0800D53A: F7FE FE11 BL HAL_UART_IRQHandler ; 0x0800C160
+ 0x0800D53A: F7FE FE11 BL HAL_UART_IRQHandler ; 0x0800C160
0x0800D53E: BD80 POP {R7, PC}
@@ -43895,41 +43661,45 @@
TIM8_CC_IRQHandler:
+yÝ$">TIM8_CC_IRQHandler:
0x0800D540: B580 PUSH {R7, LR}
0x0800D542: F240 30A8 MOVW R0, #0x03A8 ; 0x240003A8 = htim8
0x0800D546: F2C2 4000 MOVT R0, #0x2400 ; 0x240003A8 = htim8
- 0x0800D54A: F7FC FB7E BL HAL_TIM_IRQHandler ; 0x08009C4A
+ 0x0800D54A: F7FC FB7E BL HAL_TIM_IRQHandler ; 0x08009C4A
0x0800D54E: BD80 POP {R7, PC}
Section .text.SDMMC1_IRQHandler from charger_lto.o, size=16, align=2
-
SDMMC1_IRQHandler:
+
SDMMC1_IRQHandler:
0x0800D550: B580 PUSH {R7, LR}
0x0800D552: F240 10C4 MOVW R0, #0x01C4 ; 0x240001C4 = hsd1
0x0800D556: F2C2 4000 MOVT R0, #0x2400 ; 0x240001C4 = hsd1
- 0x0800D55A: F7FB F9A4 BL HAL_SD_IRQHandler ; 0x080088A6
+ 0x0800D55A: F7FB F9A4 BL HAL_SD_IRQHandler ; 0x080088A6
0x0800D55E: BD80 POP {R7, PC}
Section .text.TIM7_IRQHandler from charger_lto.o, size=16, align=2
-
TIM7_IRQHandler:
+
TIM7_IRQHandler:
0x0800D560: B580 PUSH {R7, LR}
0x0800D562: F240 30F4 MOVW R0, #0x03F4 ; 0x240003F4 = htim7
0x0800D566: F2C2 4000 MOVT R0, #0x2400 ; 0x240003F4 = htim7
- 0x0800D56A: F7FC FB6E BL HAL_TIM_IRQHandler ; 0x08009C4A
+ 0x0800D56A: F7FC FB6E BL HAL_TIM_IRQHandler ; 0x08009C4A
0x0800D56E: BD80 POP {R7, PC}
Section .text.SPI4_IRQHandler from charger_lto.o, size=16, align=2
-
SPI4_IRQHandler:
+
SPI4_IRQHandler:
0x0800D570: B580 PUSH {R7, LR}
0x0800D572: F240 103C MOVW R0, #0x013C ; 0x2400013C = hspi4
0x0800D576: F2C2 4000 MOVT R0, #0x2400 ; 0x2400013C = hspi4
- 0x0800D57A: F001 FFC7 BL HAL_SPI_IRQHandler ; 0x0800F50C
+ 0x0800D57A: F001 FFC7 BL HAL_SPI_IRQHandler ; 0x0800F50C
0x0800D57E: BD80 POP {R7, PC}
Section .text.HAL_UARTEx_RxEventCallback from charger_lto.o, size=12, align=2
-
HAL_UARTEx_RxEventCallback:
+
HAL_UARTEx_RxEventCallback:
0x0800D580: B082 SUB SP, SP, #8
0x0800D582: 9001 STR R0, [SP, #4]
@@ -43940,31 +43710,33 @@
Section .text.HAL_TIM_IC_CaptureCallback from charger_lto.o, size=8, align=2
-
HAL_TIM_IC_CaptureCallback:
-HAL_SD_ErrorCallback:
-HAL_SD_RxCpltCallback:
-HAL_SD_TxCpltCallback:
-HAL_SDEx_Write_DMADoubleBuf1CpltCallback:
-HAL_SDEx_Read_DMADoubleBuf1CpltCallback:
-HAL_SDEx_Write_DMADoubleBuf0CpltCallback:
-HAL_SDEx_Read_DMADoubleBuf0CpltCallback:
-HAL_SPI_TxCpltCallback:
-HAL_SPI_ErrorCallback:
-HAL_SPI_RxCpltCallback:
-HAL_SPI_TxRxCpltCallback:
-HAL_SPI_SuspendCallback:
-HAL_TIM_PWM_PulseFinishedCallback:
-HAL_TIM_PWM_MspInit:
-HAL_TIM_IC_MspInit:
-HAL_TIM_OC_DelayElapsedCallback:
-HAL_TIMEx_BreakCallback:
-HAL_TIMEx_Break2Callback:
-HAL_TIM_TriggerCallback:
-HAL_TIMEx_CommutCallback:
-HAL_UART_ErrorCallback:
-HAL_UART_TxCpltCallback:
-HAL_UARTEx_WakeupCallback:
+
HAL_TIM_IC_CaptureCallback:
+HAL_SD_ErrorCallback:
+HAL_SD_RxCpltCallback:
+HAL_SD_TxCpltCallback:
+HAL_SDEx_Write_DMADoubleBuf1CpltCallback:
+HAL_SDEx_Read_DMADoubleBuf1CpltCallback:
+HAL_SDEx_Write_DMADoubleBuf0CpltCallback:
+HAL_SDEx_Read_DMADoubleBuf0CpltCallback:
+HAL_SPI_TxCpltCallback:
+HAL_SPI_ErrorCallback:
+HAL_SPI_RxCpltCallback:
+HAL_SPI_TxRxCpltCallback:
+HAL_SPI_SuspendCallback:
+HAL_TIM_PWM_PulseFinishedCallback:
+HAL_TIM_PWM_MspInit:
+HAL_TIM_IC_MspInit:
+HAL_TIM_OC_DelayElapsedCallback:
+HAL_TIMEx_BreakCallback:
+HAL_TIMEx_Break2Callback:
+HAL_TIM_TriggerCallback:
+HAL_TIMEx_CommutCallback:
+HAL_UART_ErrorCallback:
+HAL_UART_TxCpltCallback:
+HAL_UARTEx_WakeupCallback:
HAL_UARTEx_TxFifoEmptyCallback:
-HAL_UARTEx_RxFifoFullCallback:
+
+Ý$">HAL_UARTEx_TxFifoEmptyCallback:
+HAL_UARTEx_RxFifoFullCallback:
0x0800D58C: B081 SUB SP, SP, #4 ; Dedupe identical section .text.HAL_UARTEx_TxFifoEmptyCallback
0x0800D58E: 9000 STR R0, [SP, #0]
@@ -43974,5 +43746,5 @@
Section .text.MX_TIM8_Init from charger_lto.o, size=236, align=2
-
MX_TIM8_Init:
+
MX_TIM8_Init:
0x0800D594: B580 PUSH {R7, LR}
0x0800D596: B092 SUB SP, SP, #72
@@ -44010,8 +43782,8 @@
0x0800D5E0: 2180 MOVS R1, #128
0x0800D5E2: 6181 STR R1, [R0, #24]
- 0x0800D5E4: F7FB FE75 BL HAL_TIM_Base_Init ; 0x080092D2
+ 0x0800D5E4: F7FB FE75 BL HAL_TIM_Base_Init ; 0x080092D2
0x0800D5E8: B108 CBZ R0, .L1 ; 0x0800D5EE
- 0x0800D5EA: F7FF FEED BL Error_Handler ; 0x0800D3C8
+ 0x0800D5EA: F7FF FEED BL Error_Handler ; 0x0800D3C8
.L1:
0x0800D5EE: F44F 5080 MOV.W R0, #0x1000
@@ -44020,16 +43792,14 @@
0x0800D5F8: F2C2 4000 MOVT R0, #0x2400 ; 0x240003A8 = htim8
0x0800D5FC: A90E ADD R1, SP, #56
- 0x0800D5FE: F7FD F996 BL HAL_TIM_ConfigClockSource ; 0x0800A92E
+ 0x0800D5FE: F7FD F996 BL HAL_TIM_ConfigClockSource ; 0x0800A92E
0x0800D602: B108 CBZ R0, .L2 ; 0x0800D608
- 0x0800D604: F7FF FEE0 BL Error_Handler ; 0x0800D3C8
+ 0x0800D604: F7FF FEE0 BL Error_Handler ; 0x0800D3C8
.L2:
0x0800D608: F240 30A8 MOVW R0, #0x03A8 ; 0x240003A8 = htim8
0x0800D60C: F2C2 4000 MOVT R0, #0x2400 ; 0x240003A8 = htim8
- 0x0800D610: F7FC F9CA BL HAL_TIM_IC_Init ; 0x080099A8
+ 0x0800D610: F7FC F9CA BL HAL_TIM_IC_Init ; 0x080099A8
0x0800D614: B108 CBZ R0, .L3 ; 0x0800D61A
- 0x0800D616: F7FF FED7 BL Error_Handler ; 0x0800D3C8
+ 0x0800D616: F7FF FED7 BL Error_Handler ; 0x0800D3C8
.L3:
0x0800D61A: 2004 MOVS R0, #4
@@ -44044,8 +43814,8 @@
0x0800D62E: F2C2 4000 MOVT R0, #0x2400 ; 0x240003A8 = htim8
0x0800D632: A909 ADD R1, SP, #36
- 0x0800D634: F7FD FE19 BL HAL_TIM_SlaveConfigSynchro ; 0x0800B26A
+ 0x0800D634: F7FD FE19 BL HAL_TIM_SlaveConfigSynchro ; 0x0800B26A
0x0800D638: B108 CBZ R0, .L4 ; 0x0800D63E
- 0x0800D63A: F7FF FEC5 BL Error_Handler ; 0x0800D3C8
+ 0x0800D63A: F7FF FEC5 BL Error_Handler ; 0x0800D3C8
.L4:
0x0800D63E: 2000 MOVS R0, #0
@@ -44056,8 +43826,7 @@
0x0800D64A: F2C2 4000 MOVT R0, #0x2400 ; 0x240003A8 = htim8
0x0800D64E: A906 ADD R1, SP, #24
- 0x0800D650: F002 FC10 BL HAL_TIMEx_MasterConfigSynchronization ; 0x0800FE74
+ 0x0800D650: F002 FC10 BL HAL_TIMEx_MasterConfigSynchronization ; 0x0800FE74
0x0800D654: B108 CBZ R0, .L5 ; 0x0800D65A
- 0x0800D656: F7FF FEB7 BL Error_Handler ; 0x0800D3C8
+ 0x0800D656: F7FF FEB7 BL Error_Handler ; 0x0800D3C8
.L5:
0x0800D65A: 200A MOVS R0, #10
@@ -44071,8 +43840,8 @@
0x0800D66C: F2C2 4000 MOVT R0, #0x2400 ; 0x240003A8 = htim8
0x0800D670: A902 ADD R1, SP, #8
- 0x0800D672: F7FC FE69 BL HAL_TIM_IC_ConfigChannel ; 0x0800A348
+ 0x0800D672: F7FC FE69 BL HAL_TIM_IC_ConfigChannel ; 0x0800A348
0x0800D676: B108 CBZ R0, .L6 ; 0x0800D67C
- 0x0800D678: F7FF FEA6 BL Error_Handler ; 0x0800D3C8
+ 0x0800D678: F7FF FEA6 BL Error_Handler ; 0x0800D3C8
.L6:
0x0800D67C: B012 ADD SP, SP, #72
@@ -44081,5 +43850,5 @@
Section .text.HAL_TIM_Base_MspInit from charger_lto.o, size=228, align=2
-
HAL_TIM_Base_MspInit:
+
HAL_TIM_Base_MspInit:
0x0800D680: B580 PUSH {R7, LR}
0x0800D682: B08E SUB SP, SP, #56
@@ -44110,7 +43879,7 @@
0x0800D6C0: 2200 MOVS R2, #0
0x0800D6C2: 4611 MOV R1, R2
- 0x0800D6C4: F7F7 FBD7 BL HAL_NVIC_SetPriority ; 0x08004E76
+ 0x0800D6C4: F7F7 FBD7 BL HAL_NVIC_SetPriority ; 0x08004E76
0x0800D6C8: 9804 LDR R0, [SP, #16]
- 0x0800D6CA: F000 F8A9 BL HAL_NVIC_EnableIRQ ; 0x0800D820
+ 0x0800D6CA: F000 F8A9 BL HAL_NVIC_EnableIRQ ; 0x0800D820
0x0800D6CE: E047 B .L2 ; 0x0800D760
.L1:
@@ -44153,22 +43922,21 @@
0x0800D72E: F6C5 0002 MOVT R0, #0x5802
0x0800D732: A908 ADD R1, SP, #32
- 0x0800D734: F7F8 FFBE BL HAL_GPIO_Init ; 0x080066B4
+ 0x0800D734: F7F8 FFBE BL HAL_GPIO_Init ; 0x080066B4
0x0800D738: 9A03 LDR R2, [SP, #12]
0x0800D73A: 202E MOVS R0, #46
0x0800D73C: 9001 STR R0, [SP, #4]
0x0800D73E: 4611 MOV R1, R2
- 0x0800D740: F7F7 FB99 BL HAL_NVIC_SetPriority ; 0x08004E76
+ 0x0800D740: F7F7 FB99 BL HAL_NVIC_SetPriority ; 0x08004E76
0x0800D744: 9801 LDR R0, [SP, #4]
- 0x0800D746: F000 F86B BL HAL_NVIC_EnableIRQ ; 0x0800D820
+ 0x0800D746: F000 F86B BL HAL_NVIC_EnableIRQ ; 0x0800D820
0x0800D74A: 9801 LDR R0, [SP, #4]
0x0800D74C: 9A03 LDR R2, [SP, #12]
0x0800D74E: 210F MOVS R1, #15
0x0800D750: 9102 STR R1, [SP, #8]
- 0x0800D752: F7F7 FB90 BL HAL_NVIC_SetPriority ; 0x08004E76
+ 0x0800D752: F7F7 FB90 BL HAL_NVIC_SetPriority ; 0x08004E76
0x0800D756: 9902 LDR R1, [SP, #8]
0x0800D758: 9A03 LDR R2, [SP, #12]
0x0800D75A: 202C MOVS R0, #44
- 0x0800D75C: F7F7 FB8B BL HAL_NVIC_SetPriority ; 0x08004E76
+ 0x0800D75C: F7F7 FB8B BL HAL_NVIC_SetPriority ; 0x08004E76
.L2:
0x0800D760: B00E ADD SP, SP, #56
@@ -44177,5 +43945,6 @@
Section .text.HAL_GetTick from charger_lto.o, size=12, align=2
-
HAL_GetTick:
+
HAL_GetTick:
0x0800D764: F240 40B0 MOVW R0, #0x04B0 ; 0x240004B0 = uwTick
0x0800D768: F2C2 4000 MOVT R0, #0x2400 ; 0x240004B0 = uwTick
@@ -44185,5 +43954,5 @@
Section .text.__NVIC_SetPriorityGrouping from charger_lto.o, size=60, align=2
-
__NVIC_SetPriorityGrouping:
+
__NVIC_SetPriorityGrouping:
0x0800D770: B083 SUB SP, SP, #12
0x0800D772: 9002 STR R0, [SP, #8]
@@ -44213,5 +43982,5 @@
Section .text.__NVIC_GetPriorityGrouping from charger_lto.o, size=16, align=2
-
__NVIC_GetPriorityGrouping:
+
__NVIC_GetPriorityGrouping:
0x0800D7AC: F64E 500C MOVW R0, #0xED0C
0x0800D7B0: F2CE 0000 MOVT R0, #0xE000
@@ -44222,5 +43991,5 @@
Section .text.NVIC_EncodePriority from charger_lto.o, size=100, align=2
-
NVIC_EncodePriority:
+
NVIC_EncodePriority:
0x0800D7BC: B088 SUB SP, SP, #32
0x0800D7BE: 9007 STR R0, [SP, #28]
@@ -44276,5 +44045,5 @@
Section .text.HAL_NVIC_EnableIRQ from charger_lto.o, size=44, align=2
-
HAL_NVIC_EnableIRQ:
+
HAL_NVIC_EnableIRQ:
0x0800D820: B580 PUSH {R7, LR}
0x0800D822: B082 SUB SP, SP, #8
@@ -44288,9 +44057,9 @@
0x0800D836: F6C0 0001 MOVT R0, #0x0801 ; 0x08010AA2 = .rodata..L.str.32
0x0800D83A: 21BD MOVS R1, #189
- 0x0800D83C: F7F6 FFAC BL assert_failed ; 0x08004798
+ 0x0800D83C: F7F6 FFAC BL assert_failed ; 0x08004798
.L2:
0x0800D840: F9BD 0006 LDRSH.W R0, [SP, #6]
- 0x0800D844: F000 F802 BL __NVIC_EnableIRQ ; 0x0800D84C
+ 0x0800D844: F000 F802 BL __NVIC_EnableIRQ ; 0x0800D84C
0x0800D848: B002 ADD SP, SP, #8
0x0800D84A: BD80 POP {R7, PC}
@@ -44298,5 +44067,5 @@
Section .text.__NVIC_EnableIRQ from charger_lto.o, size=44, align=2
-
__NVIC_EnableIRQ:
+
__NVIC_EnableIRQ:
0x0800D84C: B081 SUB SP, SP, #4
0x0800D84E: F8AD 0002 STRH.W R0, [SP, #2]
@@ -44318,5 +44087,5 @@
Section .text.HAL_MPU_Enable from charger_lto.o, size=48, align=2
-
HAL_MPU_Enable:
+
HAL_MPU_Enable:
0x0800D878: B081 SUB SP, SP, #4
0x0800D87A: 9000 STR R0, [SP, #0]
@@ -44338,5 +44107,5 @@
Section .text.HAL_MPU_ConfigRegion from charger_lto.o, size=804, align=2
-
HAL_MPU_ConfigRegion:
+
HAL_MPU_ConfigRegion:
0x0800D8A8: B510 PUSH {R4, LR}
0x0800D8AA: B082 SUB SP, SP, #8
@@ -44411,6 +44180,5 @@
0x0800D932: F6C0 0001 MOVT R0, #0x0801 ; 0x08010AA2 = .rodata..L.str.32
0x0800D936: F240 114D MOVW R1, #0x014D
- 0x0800D93A: F7F6 FF2D BL assert_failed ; 0x08004798
+ 0x0800D93A: F7F6 FF2D BL assert_failed ; 0x08004798
.L3:
0x0800D93E: 9801 LDR R0, [SP, #4]
@@ -44427,6 +44195,5 @@
0x0800D952: F6C0 0001 MOVT R0, #0x0801 ; 0x08010AA2 = .rodata..L.str.32
0x0800D956: F44F 71A7 MOV.W R1, #0x014E
- 0x0800D95A: F7F6 FF1D BL assert_failed ; 0x08004798
+ 0x0800D95A: F7F6 FF1D BL assert_failed ; 0x08004798
.L6:
0x0800D95E: 9801 LDR R0, [SP, #4]
@@ -44443,6 +44210,5 @@
0x0800D972: F6C0 0001 MOVT R0, #0x0801 ; 0x08010AA2 = .rodata..L.str.32
0x0800D976: F240 114F MOVW R1, #0x014F
- 0x0800D97A: F7F6 FF0D BL assert_failed ; 0x08004798
+ 0x0800D97A: F7F6 FF0D BL assert_failed ; 0x08004798
.L9:
0x0800D97E: 9801 LDR R0, [SP, #4]
@@ -44475,6 +44241,5 @@
0x0800D9B2: F6C0 0001 MOVT R0, #0x0801 ; 0x08010AA2 = .rodata..L.str.32
0x0800D9B6: F44F 71A8 MOV.W R1, #0x0150
- 0x0800D9BA: F7F6 FEED BL assert_failed ; 0x08004798
+ 0x0800D9BA: F7F6 FEED BL assert_failed ; 0x08004798
.L12:
0x0800D9BE: 9801 LDR R0, [SP, #4]
@@ -44495,6 +44260,5 @@
0x0800D9DA: F6C0 0001 MOVT R0, #0x0801 ; 0x08010AA2 = .rodata..L.str.32
0x0800D9DE: F240 1151 MOVW R1, #0x0151
- 0x0800D9E2: F7F6 FED9 BL assert_failed ; 0x08004798
+ 0x0800D9E2: F7F6 FED9 BL assert_failed ; 0x08004798
.L15:
0x0800D9E6: 9801 LDR R0, [SP, #4]
@@ -44511,6 +44275,5 @@
0x0800D9FA: F6C0 0001 MOVT R0, #0x0801 ; 0x08010AA2 = .rodata..L.str.32
0x0800D9FE: F44F 71A9 MOV.W R1, #0x0152
- 0x0800DA02: F7F6 FEC9 BL assert_failed ; 0x08004798
+ 0x0800DA02: F7F6 FEC9 BL assert_failed ; 0x08004798
.L18:
0x0800DA06: 9801 LDR R0, [SP, #4]
@@ -44527,6 +44290,5 @@
0x0800DA1A: F6C0 0001 MOVT R0, #0x0801 ; 0x08010AA2 = .rodata..L.str.32
0x0800DA1E: F240 1153 MOVW R1, #0x0153
- 0x0800DA22: F7F6 FEB9 BL assert_failed ; 0x08004798
+ 0x0800DA22: F7F6 FEB9 BL assert_failed ; 0x08004798
.L21:
0x0800DA26: 9801 LDR R0, [SP, #4]
@@ -44543,6 +44305,5 @@
0x0800DA3A: F6C0 0001 MOVT R0, #0x0801 ; 0x08010AA2 = .rodata..L.str.32
0x0800DA3E: F44F 71AA MOV.W R1, #0x0154
- 0x0800DA42: F7F6 FEA9 BL assert_failed ; 0x08004798
+ 0x0800DA42: F7F6 FEA9 BL assert_failed ; 0x08004798
.L24:
0x0800DA46: 9801 LDR R0, [SP, #4]
@@ -44555,6 +44316,5 @@
0x0800DA54: F6C0 0001 MOVT R0, #0x0801 ; 0x08010AA2 = .rodata..L.str.32
0x0800DA58: F240 1155 MOVW R1, #0x0155
- 0x0800DA5C: F7F6 FE9C BL assert_failed ; 0x08004798
+ 0x0800DA5C: F7F6 FE9C BL assert_failed ; 0x08004798
.L26:
0x0800DA60: 9801 LDR R0, [SP, #4]
@@ -44676,6 +44436,5 @@
0x0800DB46: F6C0 0001 MOVT R0, #0x0801 ; 0x08010AA2 = .rodata..L.str.32
0x0800DB4A: F44F 71AB MOV.W R1, #0x0156
- 0x0800DB4E: F7F6 FE23 BL assert_failed ; 0x08004798
+ 0x0800DB4E: F7F6 FE23 BL assert_failed ; 0x08004798
.L29:
0x0800DB52: 9801 LDR R0, [SP, #4]
@@ -44719,5 +44478,5 @@
Section .text.DMA_CalcDMAMUXRequestGenBaseAndMask from charger_lto.o, size=268, align=2
-
DMA_CalcDMAMUXRequestGenBaseAndMask:
+
DMA_CalcDMAMUXRequestGenBaseAndMask:
0x0800DBCC: B083 SUB SP, SP, #12
0x0800DBCE: 9002 STR R0, [SP, #8]
@@ -44834,5 +44593,5 @@
Section .text.HAL_DMA_Abort_IT from charger_lto.o, size=1520, align=2
-
HAL_DMA_Abort_IT:
+
HAL_DMA_Abort_IT:
0x0800DCD8: B580 PUSH {R7, LR}
0x0800DCDA: B086 SUB SP, SP, #24
@@ -45468,5 +45227,5 @@
Section .text.HAL_DMA_IRQHandler from charger_lto.o, size=3940, align=2
-
HAL_DMA_IRQHandler:
+
HAL_DMA_IRQHandler:
0x0800E2C8: B580 PUSH {R7, LR}
0x0800E2CA: B090 SUB SP, SP, #64
@@ -47166,5 +46925,5 @@
Section .text.HAL_GPIO_WritePin from charger_lto.o, size=104, align=2
-
HAL_GPIO_WritePin:
+
HAL_GPIO_WritePin:
0x0800F22C: B580 PUSH {R7, LR}
0x0800F22E: B082 SUB SP, SP, #8
@@ -47181,6 +46940,5 @@
0x0800F24A: F6C0 0001 MOVT R0, #0x0801 ; 0x08010D5A = .rodata..L.str.54
0x0800F24E: F44F 71D5 MOV.W R1, #0x01AA
- 0x0800F252: F7F5 FAA1 BL assert_failed ; 0x08004798
+ 0x0800F252: F7F5 FAA1 BL assert_failed ; 0x08004798
.L2:
0x0800F256: F89D 0001 LDRB.W R0, [SP, #1]
@@ -47195,6 +46953,5 @@
0x0800F26A: F6C0 0001 MOVT R0, #0x0801 ; 0x08010D5A = .rodata..L.str.54
0x0800F26E: F240 11AB MOVW R1, #0x01AB
- 0x0800F272: F7F5 FA91 BL assert_failed ; 0x08004798
+ 0x0800F272: F7F5 FA91 BL assert_failed ; 0x08004798
.L5:
0x0800F276: F89D 0001 LDRB.W R0, [SP, #1]
@@ -47215,5 +46972,5 @@
Section .text.HAL_PWREx_ConfigSupply from charger_lto.o, size=168, align=2
-
HAL_PWREx_ConfigSupply:
+
HAL_PWREx_ConfigSupply:
0x0800F294: B580 PUSH {R7, LR}
0x0800F296: B084 SUB SP, SP, #16
@@ -47231,6 +46988,5 @@
0x0800F2AC: F6C0 0001 MOVT R0, #0x0801 ; 0x08010B0C = .rodata..L.str.64
0x0800F2B0: F44F 71A1 MOV.W R1, #0x0142
- 0x0800F2B4: F7F5 FA70 BL assert_failed ; 0x08004798
+ 0x0800F2B4: F7F5 FA70 BL assert_failed ; 0x08004798
.L3:
0x0800F2B8: F644 000C MOVW R0, #0x480C
@@ -47261,6 +47017,5 @@
0x0800F2FC: 4310 ORRS R0, R2
0x0800F2FE: 6008 STR R0, [R1]
- 0x0800F300: F7FE FA30 BL HAL_GetTick ; 0x0800D764
+ 0x0800F300: F7FE FA30 BL HAL_GetTick ; 0x0800D764
0x0800F304: 9001 STR R0, [SP, #4]
.L6:
@@ -47270,6 +47025,5 @@
0x0800F310: F3C0 3040 UBFX R0, R0, #13, #1
0x0800F314: B958 CBNZ R0, .L8 ; 0x0800F32E
- 0x0800F316: F7FE FA25 BL HAL_GetTick ; 0x0800D764
+ 0x0800F316: F7FE FA25 BL HAL_GetTick ; 0x0800D764
0x0800F31A: 9901 LDR R1, [SP, #4]
0x0800F31C: 1A40 SUBS R0, R0, R1
@@ -47291,5 +47045,5 @@
Section .text.HAL_RCC_GetClockConfig from charger_lto.o, size=136, align=2
-
HAL_RCC_GetClockConfig:
+
HAL_RCC_GetClockConfig:
0x0800F33C: B082 SUB SP, SP, #8
0x0800F33E: 9001 STR R0, [SP, #4]
@@ -47345,5 +47099,5 @@
Section .text.HAL_RTC_WaitForSynchro from charger_lto.o, size=76, align=2
-
HAL_RTC_WaitForSynchro:
+
HAL_RTC_WaitForSynchro:
0x0800F3C4: B580 PUSH {R7, LR}
0x0800F3C6: B084 SUB SP, SP, #16
@@ -47354,6 +47108,5 @@
0x0800F3D2: F2C0 0003 MOVT R0, #3
0x0800F3D6: 60C8 STR R0, [R1, #12]
- 0x0800F3D8: F7FE F9C4 BL HAL_GetTick ; 0x0800D764
+ 0x0800F3D8: F7FE F9C4 BL HAL_GetTick ; 0x0800D764
0x0800F3DC: 9001 STR R0, [SP, #4]
.L1:
@@ -47364,6 +47117,5 @@
0x0800F3E6: 2800 CMP R0, #0
0x0800F3E8: D40B BMI .L3 ; 0x0800F402
- 0x0800F3EA: F7FE F9BB BL HAL_GetTick ; 0x0800D764
+ 0x0800F3EA: F7FE F9BB BL HAL_GetTick ; 0x0800D764
0x0800F3EE: 9901 LDR R1, [SP, #4]
0x0800F3F0: 1A40 SUBS R0, R0, R1
@@ -47385,5 +47137,5 @@
Section .text.SD_Read_IT from charger_lto.o, size=120, align=2
-
SD_Read_IT:
+
SD_Read_IT:
0x0800F410: B580 PUSH {R7, LR}
0x0800F412: B084 SUB SP, SP, #16
@@ -47404,6 +47156,5 @@
0x0800F42E: 9803 LDR R0, [SP, #12]
0x0800F430: 6800 LDR R0, [R0]
- 0x0800F432: F7FD FC78 BL SDMMC_ReadFIFO ; 0x0800CD26
+ 0x0800F432: F7FD FC78 BL SDMMC_ReadFIFO ; 0x0800CD26
0x0800F436: 9001 STR R0, [SP, #4]
0x0800F438: 9801 LDR R0, [SP, #4]
@@ -47450,5 +47201,5 @@
Section .text.SD_Write_IT from charger_lto.o, size=132, align=2
-
SD_Write_IT:
+
SD_Write_IT:
0x0800F488: B580 PUSH {R7, LR}
0x0800F48A: B084 SUB SP, SP, #16
@@ -47500,6 +47251,5 @@
0x0800F4EA: 6800 LDR R0, [R0]
0x0800F4EC: A901 ADD R1, SP, #4
- 0x0800F4EE: F7FD FC21 BL SDMMC_WriteFIFO ; 0x0800CD34
+ 0x0800F4EE: F7FD FC21 BL SDMMC_WriteFIFO ; 0x0800CD34
0x0800F4F2: 9802 LDR R0, [SP, #8]
0x0800F4F4: 3001 ADDS R0, #1
@@ -47520,5 +47270,5 @@
Section .text.HAL_SPI_IRQHandler from charger_lto.o, size=804, align=2
-
HAL_SPI_IRQHandler:
+
HAL_SPI_IRQHandler:
0x0800F50C: B580 PUSH {R7, LR}
0x0800F50E: B088 SUB SP, SP, #32
@@ -47563,5 +47313,6 @@
0x0800F566: 6188 STR R0, [R1, #24]
0x0800F568: 9807 LDR R0, [SP, #28]
- 0x0800F56A: F7FE F80F BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
+ 0x0800F56A: F7FE F80F BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
0x0800F56E: E15D B .L23 ; 0x0800F82C
.L1:
@@ -47708,5 +47459,7 @@
.L10:
0x0800F69E: 9807 LDR R0, [SP, #28]
- 0x0800F6A0: F7F9 FD98 BL SPI_CloseTransfer ; 0x080091D4
+ 0x0800F6A0: F7F9 FD98 BL SPI_CloseTransfer ; 0x080091D4
0x0800F6A4: 9907 LDR R1, [SP, #28]
0x0800F6A6: 2001 MOVS R0, #1
@@ -47716,5 +47469,7 @@
0x0800F6B2: B118 CBZ R0, .L11 ; 0x0800F6BC
0x0800F6B4: 9807 LDR R0, [SP, #28]
- 0x0800F6B6: F7FD FF69 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
+ 0x0800F6B6: F7FD FF69 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
0x0800F6BA: E0B7 B .L23 ; 0x0800F82C
.L11:
@@ -47723,5 +47478,6 @@
0x0800F6C2: D103 BNE .L12 ; 0x0800F6CC
0x0800F6C4: 9807 LDR R0, [SP, #28]
- 0x0800F6C6: F7FD FF61 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
+ 0x0800F6C6: F7FD FF61 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
0x0800F6CA: E00F B .L14 ; 0x0800F6EC
.L12:
@@ -47730,5 +47486,6 @@
0x0800F6D2: D103 BNE .L13 ; 0x0800F6DC
0x0800F6D4: 9807 LDR R0, [SP, #28]
- 0x0800F6D6: F7FD FF59 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
+ 0x0800F6D6: F7FD FF59 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
0x0800F6DA: E007 B .L14 ; 0x0800F6EC
.L13:
@@ -47737,5 +47494,7 @@
0x0800F6E2: D103 BNE .L14 ; 0x0800F6EC
0x0800F6E4: 9807 LDR R0, [SP, #28]
- 0x0800F6E6: F7FD FF51 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
+ 0x0800F6E6: F7FD FF51 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
0x0800F6EA: E7FF B .L14 ; 0x0800F6EC
.L14:
@@ -47834,5 +47593,6 @@
0x0800F7D8: 9807 LDR R0, [SP, #28]
0x0800F7DA: 6FC0 LDR R0, [R0, #124]
- 0x0800F7DC: F7FE FA7C BL HAL_DMA_Abort_IT ; 0x0800DCD8
+ 0x0800F7DC: F7FE FA7C BL HAL_DMA_Abort_IT ; 0x0800DCD8
0x0800F7E0: B130 CBZ R0, .L20 ; 0x0800F7F0
0x0800F7E2: 9907 LDR R1, [SP, #28]
@@ -47851,5 +47611,7 @@
0x0800F804: 9807 LDR R0, [SP, #28]
0x0800F806: 6F80 LDR R0, [R0, #120]
- 0x0800F808: F7FE FA66 BL HAL_DMA_Abort_IT ; 0x0800DCD8
+ 0x0800F808: F7FE FA66 BL HAL_DMA_Abort_IT ; 0x0800DCD8
0x0800F80C: B130 CBZ R0, .L21 ; 0x0800F81C
0x0800F80E: 9907 LDR R1, [SP, #28]
@@ -47864,5 +47626,6 @@
0x0800F822: F881 0081 STRB.W R0, [R1, #129]
0x0800F826: 9807 LDR R0, [SP, #28]
- 0x0800F828: F7FD FEB0 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
+ 0x0800F828: F7FD FEB0 BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
.L23:
0x0800F82C: B008 ADD SP, SP, #32
@@ -47871,5 +47634,5 @@
Section .text.SPI_DMAAbortOnError from charger_lto.o, size=44, align=2
-
SPI_DMAAbortOnError:
+
SPI_DMAAbortOnError:
0x0800F830: B580 PUSH {R7, LR}
0x0800F832: B082 SUB SP, SP, #8
@@ -47887,5 +47650,6 @@
0x0800F84E: F881 0081 STRB.W R0, [R1, #129]
0x0800F852: 9800 LDR R0, [SP, #0]
- 0x0800F854: F7FD FE9A BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
+ 0x0800F854: F7FD FE9A BL HAL_TIM_IC_CaptureCallback ; 0x0800D58C
0x0800F858: B002 ADD SP, SP, #8
0x0800F85A: BD80 POP {R7, PC}
@@ -47893,5 +47657,5 @@
Section .text.HAL_TIM_Base_Start_IT from charger_lto.o, size=532, align=2
-
HAL_TIM_Base_Start_IT:
+
HAL_TIM_Base_Start_IT:
0x0800F85C: B580 PUSH {R7, LR}
0x0800F85E: B084 SUB SP, SP, #16
@@ -47997,6 +47761,5 @@
0x0800F960: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800F964: F240 11D3 MOVW R1, #0x01D3
- 0x0800F968: F7F4 FF16 BL assert_failed ; 0x08004798
+ 0x0800F968: F7F4 FF16 BL assert_failed ; 0x08004798
.L3:
0x0800F96C: 9802 LDR R0, [SP, #8]
@@ -48111,5 +47874,5 @@
Section .text.TIM_OC2_SetConfig from charger_lto.o, size=436, align=2
-
TIM_OC2_SetConfig:
+
TIM_OC2_SetConfig:
0x0800FA70: B580 PUSH {R7, LR}
0x0800FA72: B086 SUB SP, SP, #24
@@ -48197,6 +47960,5 @@
0x0800FB2E: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800FB32: F641 31B7 MOVW R1, #0x1BB7
- 0x0800FB36: F7F4 FE2F BL assert_failed ; 0x08004798
+ 0x0800FB36: F7F4 FE2F BL assert_failed ; 0x08004798
.L6:
0x0800FB3A: 9802 LDR R0, [SP, #8]
@@ -48251,6 +48013,5 @@
0x0800FBB0: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800FBB4: F641 31C4 MOVW R1, #0x1BC4
- 0x0800FBB8: F7F4 FDEE BL assert_failed ; 0x08004798
+ 0x0800FBB8: F7F4 FDEE BL assert_failed ; 0x08004798
.L11:
0x0800FBBC: 9804 LDR R0, [SP, #16]
@@ -48267,6 +48028,5 @@
0x0800FBD2: F6C0 0001 MOVT R0, #0x0801 ; 0x0801095C = .rodata..L.str.96
0x0800FBD6: F641 31C5 MOVW R1, #0x1BC5
- 0x0800FBDA: F7F4 FDDD BL assert_failed ; 0x08004798
+ 0x0800FBDA: F7F4 FDDD BL assert_failed ; 0x08004798
.L14:
0x0800FBDE: 9801 LDR R0, [SP, #4]
@@ -48305,5 +48065,5 @@
Section .text.TIM_OC5_SetConfig from charger_lto.o, size=196, align=2
-
TIM_OC5_SetConfig:
+
TIM_OC5_SetConfig:
0x0800FC24: B085 SUB SP, SP, #20
0x0800FC26: 9004 STR R0, [SP, #16]
@@ -48393,5 +48153,5 @@
Section .text.TIM_TI2_SetConfig from charger_lto.o, size=108, align=2
-
TIM_TI2_SetConfig:
+
TIM_TI2_SetConfig:
0x0800FCE8: B086 SUB SP, SP, #24
0x0800FCEA: 9005 STR R0, [SP, #20]
@@ -48444,5 +48204,5 @@
Section .text.TIM_TI4_SetConfig from charger_lto.o, size=108, align=2
-
TIM_TI4_SetConfig:
+
TIM_TI4_SetConfig:
0x0800FD54: B086 SUB SP, SP, #24
0x0800FD56: 9005 STR R0, [SP, #20]
@@ -48495,5 +48255,5 @@
Section .text.TIM_ETR_SetConfig from charger_lto.o, size=52, align=2
-
TIM_ETR_SetConfig:
+
TIM_ETR_SetConfig:
0x0800FDC0: B085 SUB SP, SP, #20
0x0800FDC2: 9004 STR R0, [SP, #16]
@@ -48523,5 +48283,5 @@
Section .text.TIM_TI1_ConfigInputStage from charger_lto.o, size=80, align=2
-
TIM_TI1_ConfigInputStage:
+
TIM_TI1_ConfigInputStage:
0x0800FDF4: B085 SUB SP, SP, #20
0x0800FDF6: 9004 STR R0, [SP, #16]
@@ -48563,5 +48323,5 @@
Section .text.TIM_ITRx_SetConfig from charger_lto.o, size=48, align=2
-
TIM_ITRx_SetConfig:
+
TIM_ITRx_SetConfig:
0x0800FE44: B083 SUB SP, SP, #12
0x0800FE46: 9002 STR R0, [SP, #8]
@@ -48588,5 +48348,5 @@
Section .text.HAL_TIMEx_MasterConfigSynchronization from charger_lto.o, size=840, align=2
-
HAL_TIMEx_MasterConfigSynchronization:
+
HAL_TIMEx_MasterConfigSynchronization:
0x0800FE74: B580 PUSH {R7, LR}
0x0800FE76: B086 SUB SP, SP, #24
@@ -48669,6 +48429,5 @@
0x0800FF3A: F6C0 0001 MOVT R0, #0x0801 ; 0x08010BE0 = .rodata..L.str.113
0x0800FF3E: F240 71CB MOVW R1, #0x07CB
- 0x0800FF42: F7F4 FC29 BL assert_failed ; 0x08004798
+ 0x0800FF42: F7F4 FC29 BL assert_failed ; 0x08004798
.L3:
0x0800FF46: 9803 LDR R0, [SP, #12]
@@ -48709,6 +48468,5 @@
0x0800FF8A: F6C0 0001 MOVT R0, #0x0801 ; 0x08010BE0 = .rodata..L.str.113
0x0800FF8E: F240 71CC MOVW R1, #0x07CC
- 0x0800FF92: F7F4 FC01 BL assert_failed ; 0x08004798
+ 0x0800FF92: F7F4 FC01 BL assert_failed ; 0x08004798
.L6:
0x0800FF96: 9803 LDR R0, [SP, #12]
@@ -48725,6 +48483,5 @@
0x0800FFAA: F6C0 0001 MOVT R0, #0x0801 ; 0x08010BE0 = .rodata..L.str.113
0x0800FFAE: F240 71CD MOVW R1, #0x07CD
- 0x0800FFB2: F7F4 FBF1 BL assert_failed ; 0x08004798
+ 0x0800FFB2: F7F4 FBF1 BL assert_failed ; 0x08004798
.L9:
0x0800FFB6: 9804 LDR R0, [SP, #16]
@@ -48837,6 +48594,5 @@
0x080100B4: F6C0 0001 MOVT R0, #0x0801 ; 0x08010BE0 = .rodata..L.str.113
0x080100B8: F240 71DF MOVW R1, #0x07DF
- 0x080100BC: F7F4 FB6C BL assert_failed ; 0x08004798
+ 0x080100BC: F7F4 FB6C BL assert_failed ; 0x08004798
.L14:
0x080100C0: 9802 LDR R0, [SP, #8]
@@ -48948,5 +48704,5 @@
Section .text.UART_CheckIdleState from charger_lto.o, size=336, align=2
-
UART_CheckIdleState:
+
UART_CheckIdleState:
0x080101BC: B580 PUSH {R7, LR}
0x080101BE: B096 SUB SP, SP, #88
@@ -48955,6 +48711,5 @@
0x080101C4: 2000 MOVS R0, #0
0x080101C6: F8C1 0090 STR.W R0, [R1, #144]
- 0x080101CA: F7FD FACB BL HAL_GetTick ; 0x0800D764
+ 0x080101CA: F7FD FACB BL HAL_GetTick ; 0x0800D764
0x080101CE: 9004 STR R0, [SP, #16]
0x080101D0: 9805 LDR R0, [SP, #20]
@@ -48971,5 +48726,7 @@
0x080101E8: F44F 1100 MOV.W R1, #0x200000
0x080101EC: 2200 MOVS R2, #0
- 0x080101EE: F7FB FF46 BL UART_WaitOnFlagUntilTimeout ; 0x0800C07E
+ 0x080101EE: F7FB FF46 BL UART_WaitOnFlagUntilTimeout ; 0x0800C07E
0x080101F2: B318 CBZ R0, .L2 ; 0x0801023C
.L1:
@@ -49018,5 +48775,7 @@
0x08010254: F44F 0180 MOV.W R1, #0x400000
0x08010258: 2200 MOVS R2, #0
- 0x0801025A: F7FB FF10 BL UART_WaitOnFlagUntilTimeout ; 0x0800C07E
+ 0x0801025A: F7FB FF10 BL UART_WaitOnFlagUntilTimeout ; 0x0800C07E
0x0801025E: 2800 CMP R0, #0
0x08010260: D03D BEQ .L5 ; 0x080102DE
@@ -49099,5 +48858,5 @@
Section .text.UART_EndRxTransfer from charger_lto.o, size=188, align=2
-
UART_EndRxTransfer:
+
UART_EndRxTransfer:
0x0801030C: B093 SUB SP, SP, #76
0x0801030E: 9003 STR R0, [SP, #12]
@@ -49190,5 +48949,5 @@
Section .text.SDMMC_CmdStopTransfer from charger_lto.o, size=104, align=2
-
SDMMC_CmdStopTransfer:
+
SDMMC_CmdStopTransfer:
0x080103C8: B580 PUSH {R7, LR}
0x080103CA: B088 SUB SP, SP, #32
@@ -49214,10 +48973,12 @@
0x080103FA: 9807 LDR R0, [SP, #28]
0x080103FC: A902 ADD R1, SP, #8
- 0x080103FE: F7FC FCA4 BL SDMMC_SendCommand ; 0x0800CD4A
+ 0x080103FE: F7FC FCA4 BL SDMMC_SendCommand ; 0x0800CD4A
0x08010402: 9900 LDR R1, [SP, #0]
0x08010404: 9807 LDR R0, [SP, #28]
0x08010406: F24E 1200 MOVW R2, #0xE100
0x0801040A: F2C0 52F5 MOVT R2, #0x05F5
- 0x0801040E: F7FC FD31 BL SDMMC_GetCmdResp1 ; 0x0800CE74
+ 0x0801040E: F7FC FD31 BL SDMMC_GetCmdResp1 ; 0x0800CE74
0x08010412: 9001 STR R0, [SP, #4]
0x08010414: 9907 LDR R1, [SP, #28]
@@ -49237,5 +48998,5 @@
Section .rodata.UARTPrescTable from charger_lto.o, size=24, align=2
-
UARTPrescTable:
+
UARTPrescTable:
0x08010430: 01 DC.B 0x01 ; '\x01'
0x08010431: 00 DC.B 0x00 ; '\0'
@@ -49265,8 +49026,7 @@
Section .init.Reset_Handler from Cortex_M_Startup.o, size=24, align=2
-
Reset_Handler:
-reset_handler:
- 0x08010448: F7F4 FA8B BL SystemInit ; 0x08004962
+
Reset_Handler:
+reset_handler:
+ 0x08010448: F7F4 FA8B BL SystemInit ; 0x08004962
0x0801044C: F64E 5088 MOVW R0, #0xED88
0x08010450: F2CE 0000 MOVT R0, #0xE000
@@ -49274,10 +49034,9 @@
0x08010456: F451 0170 ORRS R1, R1, #0xF00000
0x0801045A: 6001 STR R1, [R0]
- 0x0801045C: F7F3 F810 BL _start ; 0x08003480
+ 0x0801045C: F7F3 F810 BL _start ; 0x08003480
Section .text.libc.__SEGGER_RTL_float64_isnan from floatops.o (libc_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=16, align=2
-
__SEGGER_RTL_float64_isnan:
+
__SEGGER_RTL_float64_isnan:
0x08010460: 2000 MOVS R0, #0
0x08010462: EEB4 0B40 VCMP.F64 D0, D0
@@ -49289,5 +49048,5 @@
Section .text.libc.__SEGGER_RTL_float64_signbit from floatops.o (libc_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=8, align=2
-
__SEGGER_RTL_float64_signbit:
+
__SEGGER_RTL_float64_signbit:
0x08010470: EC51 0B10 VMOV R0, R1, D0
0x08010474: 0FC8 LSRS R0, R1, #31
@@ -49296,10 +49055,10 @@
Section .text.libc.frexp from floatops.o (libc_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=4, align=2
-
frexp:
- 0x08010478: F000 B800 B.W __SEGGER_RTL_float64_frexp_inline ; 0x0801047C
+
frexp:
+ 0x08010478: F000 B800 B.W __SEGGER_RTL_float64_frexp_inline ; 0x0801047C
Section .text.libc.__SEGGER_RTL_float64_frexp_inline from floatops.o (libc_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=44, align=2
-
__SEGGER_RTL_float64_frexp_inline:
+
__SEGGER_RTL_float64_frexp_inline:
0x0801047C: EC52 CB10 VMOV R12, R2, D0
0x08010480: F3C2 530A UBFX R3, R2, #20, #11
@@ -49320,5 +49079,5 @@
Section .text.libc.abs from intops.o (libc_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=8, align=2
-
abs:
+
abs:
0x080104A8: 2800 CMP R0, #0
0x080104AA: BF48 IT MI
@@ -49328,5 +49087,5 @@
Section .text.libc.__SEGGER_RTL_pow10 from utilops.o (libc_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=60, align=2
-
__SEGGER_RTL_pow10:
+
__SEGGER_RTL_pow10:
0x080104B0: EEB7 0B00 VMOV.F64 D0, #1
0x080104B4: 2800 CMP R0, #0
@@ -49355,5 +49114,5 @@
Section .text.libc.__SEGGER_RTL_putc from prinops.o (libc_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=132, align=2
-
__SEGGER_RTL_putc:
+
__SEGGER_RTL_putc:
0x080104EC: B510 PUSH {R4, LR}
0x080104EE: B082 SUB SP, SP, #8
@@ -49373,5 +49132,6 @@
0x08010510: D129 BNE .L4 ; 0x08010566
0x08010512: 4620 MOV R0, R4
- 0x08010514: F000 F82C BL __SEGGER_RTL_prin_flush ; 0x08010570
+ 0x08010514: F000 F82C BL __SEGGER_RTL_prin_flush ; 0x08010570
0x08010518: E025 B .L4 ; 0x08010566
.L1:
@@ -49418,5 +49178,5 @@
Section .text.libc.__SEGGER_RTL_prin_flush from prinops.o (libc_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=28, align=2
-
__SEGGER_RTL_prin_flush:
+
__SEGGER_RTL_prin_flush:
0x08010570: 6942 LDR R2, [R0, #20]
0x08010572: 2A00 CMP R2, #0
@@ -49436,5 +49196,5 @@
Section .text.libc.__SEGGER_RTL_print_padding from prinops.o (libc_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=28, align=2
-
__SEGGER_RTL_print_padding:
+
__SEGGER_RTL_print_padding:
0x0801058C: 2A01 CMP R2, #1
0x0801058E: BFB8 IT LT
@@ -49447,5 +49207,7 @@
0x0801059A: 4630 MOV R0, R6
0x0801059C: 4629 MOV R1, R5
- 0x0801059E: F7FF FFA5 BL __SEGGER_RTL_putc ; 0x080104EC
+ 0x0801059E: F7FF FFA5 BL __SEGGER_RTL_putc ; 0x080104EC
0x080105A2: 3C01 SUBS R4, #1
0x080105A4: D8F9 BHI .L1 ; 0x0801059A
@@ -49454,10 +49216,11 @@
Section .text.libc.vfprintf from prinops.o (libc_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=28, align=2
-
vfprintf:
+
vfprintf:
0x080105A8: B570 PUSH {R4-R6, LR}
0x080105AA: 4614 MOV R4, R2
0x080105AC: 460D MOV R5, R1
0x080105AE: 4606 MOV R6, R0
- 0x080105B0: F000 F8BA BL __SEGGER_RTL_current_locale ; 0x08010728
+ 0x080105B0: F000 F8BA BL __SEGGER_RTL_current_locale ; 0x08010728
0x080105B4: 4601 MOV R1, R0
0x080105B6: 4630 MOV R0, R6
@@ -49465,10 +49228,9 @@
0x080105BA: 4623 MOV R3, R4
0x080105BC: E8BD 4070 POP.W {R4-R6, LR}
- 0x080105C0: F000 B800 B.W vfprintf_l ; 0x080105C4
+ 0x080105C0: F000 B800 B.W vfprintf_l ; 0x080105C4
Section .text.libc.vfprintf_l from prinops.o (libc_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=108, align=2
-
vfprintf_l:
+
vfprintf_l:
0x080105C4: E92D 4FF0 PUSH.W {R4-R11, LR}
0x080105C8: AF03 ADD R7, SP, #12
@@ -49478,5 +49240,7 @@
0x080105D2: 460C MOV R4, R1
0x080105D4: 4606 MOV R6, R0
- 0x080105D6: F000 F847 BL __SEGGER_RTL_X_file_bufsize ; 0x08010668
+ 0x080105D6: F000 F847 BL __SEGGER_RTL_X_file_bufsize ; 0x08010668
0x080105DA: 4605 MOV R5, R0
0x080105DC: 46EB MOV R11, SP
@@ -49489,6 +49253,5 @@
0x080105F0: 2100 MOVS R1, #0
0x080105F2: 2224 MOVS R2, #36
- 0x080105F4: F7F3 F866 BL memset ; 0x080036C4
+ 0x080105F4: F7F3 F866 BL memset ; 0x080036C4
0x080105F8: F24D 1041 MOVW R0, #0xD141 ; 0x0800D141 = __SEGGER_RTL_stream_write
0x080105FC: F6C0 0000 MOVT R0, #0x0800 ; 0x0800D141 = __SEGGER_RTL_stream_write
@@ -49502,6 +49265,5 @@
0x0801061A: 4649 MOV R1, R9
0x0801061C: F857 2C3C LDR R2, [R7, #-60]
- 0x08010620: F7EF FFD6 BL __SEGGER_RTL_vfprintf_float_long_long ; 0x080005D0
+ 0x08010620: F7EF FFD6 BL __SEGGER_RTL_vfprintf_float_long_long ; 0x080005D0
0x08010624: 46DD MOV SP, R11
0x08010626: F1A7 040C SUB.W R4, R7, #12
@@ -49511,5 +49273,5 @@
Section .text.libc.__SEGGER_RTL_X_file_stat from prinops_rtt.o (prinops_rtt_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=56, align=2
-
__SEGGER_RTL_X_file_stat:
+
__SEGGER_RTL_X_file_stat:
0x08010630: F640 01EC MOVW R1, #0x08EC ; 0x240008EC = stdout
0x08010634: F2C2 4100 MOVT R1, #0x2400 ; 0x240008EC = stdout
@@ -49537,5 +49299,5 @@
Section .text.libc.__SEGGER_RTL_X_file_bufsize from prinops_rtt.o (prinops_rtt_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=4, align=2
-
__SEGGER_RTL_X_file_bufsize:
+
__SEGGER_RTL_X_file_bufsize:
0x08010668: 2040 MOVS R0, #64
0x0801066A: 4770 BX LR
@@ -49543,5 +49305,5 @@
Section .text.libc._WriteNoCheck from SEGGER_RTT.o (prinops_rtt_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=68, align=2
-
_WriteNoCheck:
+
_WriteNoCheck:
0x0801066C: E92D 41F0 PUSH.W {R4-R8, LR}
0x08010670: 4615 MOV R5, R2
@@ -49555,6 +49317,5 @@
0x08010682: 4641 MOV R1, R8
0x08010684: D205 BCS .L1 ; 0x08010692
- 0x08010686: F7F2 FFEB BL memcpy ; 0x08003660
+ 0x08010686: F7F2 FFEB BL memcpy ; 0x08003660
0x0801068A: 4435 ADD R5, R6
0x0801068C: F3BF 8F5F DMB SY
@@ -49562,12 +49323,10 @@
.L1:
0x08010692: 463A MOV R2, R7
- 0x08010694: F7F2 FFE4 BL memcpy ; 0x08003660
+ 0x08010694: F7F2 FFE4 BL memcpy ; 0x08003660
0x08010698: EB08 0107 ADD.W R1, R8, R7
0x0801069C: 1BED SUBS R5, R5, R7
0x0801069E: 6860 LDR R0, [R4, #4]
0x080106A0: 462A MOV R2, R5
- 0x080106A2: F7F2 FFDD BL memcpy ; 0x08003660
+ 0x080106A2: F7F2 FFDD BL memcpy ; 0x08003660
0x080106A6: F3BF 8F5F DMB SY
.L2:
@@ -49577,5 +49336,5 @@
Section .text.libc.strlen from strops.o (strops_unaligned_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=44, align=2
-
strlen:
+
strlen:
0x080106B0: 7801 LDRB R1, [R0]
0x080106B2: 2900 CMP R1, #0
@@ -49599,5 +49358,5 @@
Section .text.libc.strnlen from strops.o (strops_unaligned_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=76, align=2
-
strnlen:
+
strnlen:
0x080106DC: 2900 CMP R1, #0
0x080106DE: BF1C ITT NE
@@ -49635,5 +49394,5 @@
Section .text.libc.__SEGGER_RTL_current_locale from mbops.o (mbops_timeops_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=24, align=2
-
__SEGGER_RTL_current_locale:
+
__SEGGER_RTL_current_locale:
0x08010728: F240 40C0 MOVW R0, #0x04C0 ; 0x240004C0 = __SEGGER_RTL_locale_ptr
0x0801072C: F2C2 4000 MOVT R0, #0x2400 ; 0x240004C0 = __SEGGER_RTL_locale_ptr
@@ -49647,5 +49406,5 @@
Section .text.libc.__SEGGER_RTL_ascii_mbtowc from mbops.o (mbops_timeops_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=52, align=2
-
__SEGGER_RTL_ascii_mbtowc:
+
__SEGGER_RTL_ascii_mbtowc:
0x08010740: 4684 MOV R12, R0
0x08010742: 2000 MOVS R0, #0
@@ -49674,5 +49433,5 @@
Section .text.libc.__SEGGER_RTL_ascii_isctype from mbops.o (mbops_timeops_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=32, align=2
-
__SEGGER_RTL_ascii_isctype:
+
__SEGGER_RTL_ascii_isctype:
0x08010774: 287F CMP R0, #127
0x08010776: BF84 ITT HI
@@ -49690,6 +49449,6 @@
Section .text.libc.__SEGGER_RTL_ascii_toupper from mbops.o (mbops_timeops_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=12, align=2
-
__SEGGER_RTL_ascii_toupper:
-__SEGGER_RTL_ascii_towupper:
+
__SEGGER_RTL_ascii_toupper:
+__SEGGER_RTL_ascii_towupper:
0x08010794: F1A0 0161 SUB.W R1, R0, #97 ; Dedupe identical section .text.libc.__SEGGER_RTL_ascii_towupper
0x08010798: 291A CMP R1, #26
@@ -49700,5 +49459,5 @@
Section .text.libc.__SEGGER_RTL_ascii_iswctype from mbops.o (mbops_timeops_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=32, align=2
-
__SEGGER_RTL_ascii_iswctype:
+
__SEGGER_RTL_ascii_iswctype:
0x080107A0: 287F CMP R0, #127
0x080107A2: BF84 ITT HI
@@ -50366,5 +50125,6 @@
Section .rodata.libc.__SEGGER_RTL_c_locale_month_names from mbops.o (mbops_timeops_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=87, align=1
-
__SEGGER_RTL_c_locale_month_names:
+
__SEGGER_RTL_c_locale_month_names:
0x08010A35: 4A DC.B 0x4A ; 'J'
0x08010A36: 61 DC.B 0x61 ; 'a'
@@ -50457,5 +50217,5 @@
Section .rodata.libc.__SEGGER_RTL_c_locale_am_pm_indicator from mbops.o (mbops_timeops_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=7, align=1
-
__SEGGER_RTL_c_locale_am_pm_indicator:
+
__SEGGER_RTL_c_locale_am_pm_indicator:
0x08010A8C: 41 DC.B 0x41 ; 'A'
0x08010A8D: 4D DC.B 0x4D ; 'M'
@@ -50468,5 +50228,5 @@
-
__SEGGER_RTL_c_locale_date_time_format:
+
__SEGGER_RTL_c_locale_date_time_format:
0x08010A93: 25 DC.B 0x25 ; '%'
0x08010A94: 61 DC.B 0x61 ; 'a'
@@ -50923,5 +50683,6 @@
Section .rodata.libc.__SEGGER_RTL_c_locale_day_names from mbops.o (mbops_timeops_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=58, align=1
-
__SEGGER_RTL_c_locale_day_names:
+
__SEGGER_RTL_c_locale_day_names:
0x08010C4A: 53 DC.B 0x53 ; 'S'
0x08010C4B: 75 DC.B 0x75 ; 'u'
@@ -50990,5 +50751,5 @@
Section .rodata.libc.__SEGGER_RTL_data_utf8_period from mbops.o (mbops_timeops_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=2, align=1
-
__SEGGER_RTL_data_utf8_period:
+
__SEGGER_RTL_data_utf8_period:
0x08010C86: 2E DC.B 0x2E ; '.'
0x08010C87: 00 DC.B 0x00 ; '\0'
@@ -51028,8 +50789,8 @@
0x08010CA3: 3A DC.B 0x3A ; ':'
0x08010CA4: 31 DC.B 0x31 ; '1'
- 0x08010CA5: 30 DC.B 0x30 ; '0'
+ 0x08010CA5: 33 DC.B 0x33 ; '3'
0x08010CA6: 3A DC.B 0x3A ; ':'
- 0x08010CA7: 31 DC.B 0x31 ; '1'
- 0x08010CA8: 39 DC.B 0x39 ; '9'
+ 0x08010CA7: 32 DC.B 0x32 ; '2'
+ 0x08010CA8: 37 DC.B 0x37 ; '7'
0x08010CA9: 00 DC.B 0x00 ; '\0'
@@ -51068,5 +50829,5 @@
Section .rodata.libc._DoInit._aInitStr from SEGGER_RTT.o (prinops_rtt_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=17, align=1
-
_DoInit._aInitStr:
+
_DoInit._aInitStr:
0x08010CBE: 00 DC.B 0x00 ; '\0'
0x08010CBF: 00 DC.B 0x00 ; '\0'
@@ -51101,5 +50862,5 @@
-
__SEGGER_RTL_c_locale_date_format:
+
__SEGGER_RTL_c_locale_date_format:
0x08010CD8: 25 DC.B 0x25 ; '%'
0x08010CD9: 6D DC.B 0x6D ; 'm'
@@ -51114,5 +50875,5 @@
-
__SEGGER_RTL_c_locale_time_format:
+
__SEGGER_RTL_c_locale_time_format:
0x08010CE1: 25 DC.B 0x25 ; '%'
0x08010CE2: 48 DC.B 0x48 ; 'H'
@@ -51127,6 +50888,6 @@
Section .rodata.libc.__SEGGER_RTL_c_locale_abbrev_day_names from mbops.o (mbops_timeops_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=29, align=1
-
__SEGGER_RTL_c_locale_abbrev_day_names:
+
__SEGGER_RTL_c_locale_abbrev_day_names:
0x08010CEA: 53 DC.B 0x53 ; 'S'
0x08010CEB: 75 DC.B 0x75 ; 'u'
@@ -51161,5 +50922,6 @@
Section .rodata.libc.__SEGGER_RTL_c_locale_abbrev_month_names from mbops.o (mbops_timeops_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=49, align=1
-
__SEGGER_RTL_c_locale_abbrev_month_names:
+
__SEGGER_RTL_c_locale_abbrev_month_names:
0x08010D07: 4A DC.B 0x4A ; 'J'
0x08010D08: 61 DC.B 0x61 ; 'a'
@@ -51214,10 +50976,10 @@
Section .rodata.libc.__SEGGER_RTL_data_empty_string from mbops.o (mbops_timeops_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=1, align=1
-
__SEGGER_RTL_data_empty_string:
+
__SEGGER_RTL_data_empty_string:
0x08010D38: 00 DC.B 0x00 ; '\0'
Section .rodata.libc.__SEGGER_RTL_ascii_ctype_mask from mbops.o (mbops_timeops_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=13, align=1
-
__SEGGER_RTL_ascii_ctype_mask:
+
__SEGGER_RTL_ascii_ctype_mask:
0x08010D39: 00 DC.B 0x00 ; '\0'
0x08010D3A: 07 DC.B 0x07 ; '\x07'
@@ -51251,5 +51013,5 @@
Section .rodata.DMA_CalcBaseAndBitshift.flagBitshiftOffset from charger_lto.o, size=8, align=1
-
DMA_CalcBaseAndBitshift.flagBitshiftOffset:
+
DMA_CalcBaseAndBitshift.flagBitshiftOffset:
0x08010D52: 00 DC.B 0x00 ; '\0'
0x08010D53: 06 DC.B 0x06 ; '\x06'
@@ -51370,5 +51132,5 @@
Section .rodata.D1CorePrescTable from charger_lto.o, size=16, align=1
-
D1CorePrescTable:
+
D1CorePrescTable:
0x08010DC2: 00 DC.B 0x00 ; '\0'
0x08010DC3: 00 DC.B 0x00 ; '\0'
@@ -51497,5 +51259,5 @@
Section .rodata.UARTEx_SetNbDataToProcess.numerator from charger_lto.o, size=8, align=1
-
UARTEx_SetNbDataToProcess.numerator:
+
UARTEx_SetNbDataToProcess.numerator:
0x08010E3A: 01 DC.B 0x01 ; '\x01'
0x08010E3B: 01 DC.B 0x01 ; '\x01'
@@ -51509,5 +51271,5 @@
Section .rodata.UARTEx_SetNbDataToProcess.denominator from charger_lto.o, size=8, align=1
-
UARTEx_SetNbDataToProcess.denominator:
+
UARTEx_SetNbDataToProcess.denominator:
0x08010E42: 08 DC.B 0x08 ; '\b'
0x08010E43: 04 DC.B 0x04 ; '\x04'
@@ -51629,5 +51391,5 @@
__SEGGER_RTL_hex_uc:
+ò&">__SEGGER_RTL_hex_uc:
0x08010EB2: 30 DC.B 0x30 ; '0'
0x08010EB3: 31 DC.B 0x31 ; '1'
@@ -51649,5 +51411,5 @@
Section .rodata.libc.__SEGGER_RTL_hex_lc from prinops.o (libc_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=16, align=1
-
__SEGGER_RTL_hex_lc:
+
__SEGGER_RTL_hex_lc:
0x08010EC2: 30 DC.B 0x30 ; '0'
0x08010EC3: 31 DC.B 0x31 ; '1'
@@ -51683,5 +51445,5 @@
Section .rodata.libc.__SEGGER_RTL_ascii_ctype_map from mbops.o (mbops_timeops_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=128, align=1
-
__SEGGER_RTL_ascii_ctype_map:
+
__SEGGER_RTL_ascii_ctype_map:
0x08010EDA: 20 DC.B 0x20 ; ' '
0x08010EDB: 20 DC.B 0x20 ; ' '
@@ -51815,5 +51577,6 @@
Section .segger.init.table from [ Linker created ], size=32, align=4
- 0x08010F5C: 08010FAD DC.W __SEGGER_init_zero
+ 0x08010F5C: 08010FAD DC.W __SEGGER_init_zero
0x08010F60: 00 DC.B 0x00 ; '\0'
0x08010F61: 00 DC.B 0x00 ; '\0'
@@ -51824,5 +51587,6 @@
0x08010F66: 00 DC.B 0x00 ; '\0'
0x08010F67: 00 DC.B 0x00 ; '\0'
- 0x08010F68: 08010FBF DC.W __SEGGER_init_copy
+ 0x08010F68: 08010FBF DC.W __SEGGER_init_copy
0x08010F6C: D4 DC.B 0xD4 ; '\xD4'
0x08010F6D: 08 DC.B 0x08 ; '\b'
@@ -51834,5 +51598,6 @@
0x08010F76: 00 DC.B 0x00 ; '\0'
0x08010F77: 00 DC.B 0x00 ; '\0'
- 0x08010F78: 0800348B DC.W __SEGGER_init_done
+ 0x08010F78: 0800348B DC.W __SEGGER_init_done
Section .segger.init.data from [ Linker created ], size=48, align=4
@@ -51889,6 +51654,5 @@
Section .segger.init.__SEGGER_init_zero from SEGGER_crtinit.o (SEGGER_crtinit_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=18, align=2
-
__SEGGER_init_zero:
+
__SEGGER_init_zero:
0x08010FAC: 6820 LDR R0, [R4]
0x08010FAE: 6861 LDR R1, [R4, #4]
@@ -51905,6 +51669,5 @@
Section .segger.init.__SEGGER_init_copy from SEGGER_crtinit.o (SEGGER_crtinit_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=20, align=2
-
__SEGGER_init_copy:
+
__SEGGER_init_copy:
0x08010FBE: 6820 LDR R0, [R4]
0x08010FC0: 6861 LDR R1, [R4, #4]
@@ -51926,5 +51689,5 @@
Section .bss.libc._SEGGER_RTT from SEGGER_RTT.o (prinops_rtt_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=168, align=4
-
_SEGGER_RTT:
+
_SEGGER_RTT:
0x24000000: 30 DC.B 0x30 ; '0'
0x24000001: 31 DC.B 0x31 ; '1'
@@ -52098,5 +51861,5 @@
Section .bss.huart3 from charger_lto.o, size=148, align=4
-
huart3:
+
huart3:
0x240000A8: 01 DC.B 0x01 ; '\x01'
0x240000A9: 00 DC.B 0x00 ; '\0'
@@ -52250,5 +52013,5 @@
Section .bss.hspi4 from charger_lto.o, size=136, align=4
-
hspi4:
+
hspi4:
0x2400013C: 01 DC.B 0x01 ; '\x01'
0x2400013D: 00 DC.B 0x00 ; '\0'
@@ -52518,5 +52281,5 @@
Section .bss.hdma_usart3_tx from charger_lto.o, size=120, align=4
-
hdma_usart3_tx:
+
hdma_usart3_tx:
0x24000240: 01 DC.B 0x01 ; '\x01'
0x24000241: 00 DC.B 0x00 ; '\0'
@@ -52642,5 +52405,5 @@
Section .bss.hdma_usart3_rx from charger_lto.o, size=120, align=4
-
hdma_usart3_rx:
+
hdma_usart3_rx:
0x240002B8: 01 DC.B 0x01 ; '\x01'
0x240002B9: 00 DC.B 0x00 ; '\0'
@@ -52766,5 +52529,5 @@
Section .bss.hdma_spi4_tx from charger_lto.o, size=120, align=4
-
hdma_spi4_tx:
+
hdma_spi4_tx:
0x24000330: 01 DC.B 0x01 ; '\x01'
0x24000331: 00 DC.B 0x00 ; '\0'
@@ -52890,5 +52653,5 @@
Section .bss.htim8 from charger_lto.o, size=76, align=4
-
htim8:
+
htim8:
0x240003A8: 01 DC.B 0x01 ; '\x01'
0x240003A9: 00 DC.B 0x00 ; '\0'
@@ -52970,5 +52733,5 @@
Section .bss.htim7 from charger_lto.o, size=76, align=4
-
htim7:
+
htim7:
0x240003F4: 01 DC.B 0x01 ; '\x01'
0x240003F5: 00 DC.B 0x00 ; '\0'
@@ -53050,5 +52813,5 @@
Section .bss.htim3 from charger_lto.o, size=76, align=4
-
htim3:
+
htim3:
0x24000440: 01 DC.B 0x01 ; '\x01'
0x24000441: 00 DC.B 0x00 ; '\0'
@@ -53131,5 +52894,5 @@
hrtc:
+¥Ý$">hrtc:
0x2400048C: 01 DC.B 0x01 ; '\x01'
0x2400048D: 00 DC.B 0x00 ; '\0'
@@ -53171,5 +52934,5 @@
Section .bss.uwTick from charger_lto.o, size=4, align=4
-
uwTick:
+
uwTick:
0x240004B0: 44 DC.B 0x44 ; 'D'
0x240004B1: 3A DC.B 0x3A ; ':'
@@ -53179,5 +52942,5 @@
Section .bss.libc.__SEGGER_RTL_stdout_file from prinops_rtt.o (prinops_rtt_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=4, align=4
-
__SEGGER_RTL_stdout_file:
+
__SEGGER_RTL_stdout_file:
0x240004B4: 00 DC.B 0x00 ; '\0'
0x240004B5: 00 DC.B 0x00 ; '\0'
@@ -53187,5 +52950,5 @@
Section .bss.libc.__SEGGER_RTL_stdin_file from prinops_rtt.o (prinops_rtt_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=4, align=4
-
__SEGGER_RTL_stdin_file:
+
__SEGGER_RTL_stdin_file:
0x240004B8: 00 DC.B 0x00 ; '\0'
0x240004B9: 00 DC.B 0x00 ; '\0'
@@ -53195,5 +52958,5 @@
Section .bss.libc.__SEGGER_RTL_stderr_file from prinops_rtt.o (prinops_rtt_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=4, align=4
-
__SEGGER_RTL_stderr_file:
+
__SEGGER_RTL_stderr_file:
0x240004BC: 00 DC.B 0x00 ; '\0'
0x240004BD: 00 DC.B 0x00 ; '\0'
@@ -53203,5 +52966,5 @@
Section .bss.libc.__SEGGER_RTL_locale_ptr from mbops.o (mbops_timeops_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=4, align=4
-
__SEGGER_RTL_locale_ptr:
+
__SEGGER_RTL_locale_ptr:
0x240004C0: 43 DC.B 0x43 ; 'C'
0x240004C1: 00 DC.B 0x00 ; '\0'
@@ -53211,5 +52974,6 @@
Section .bss.libc._acUpBuffer from SEGGER_RTT.o (prinops_rtt_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=1024, align=1
-
_acUpBuffer:
+
_acUpBuffer:
0x240004C4: 00 DC.B 0x00 ; '\0'
0x240004C5: 53 DC.B 0x53 ; 'S'
@@ -54239,5 +54003,5 @@
Section .bss.libc._acDownBuffer from SEGGER_RTT.o (prinops_rtt_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=16, align=1
-
_acDownBuffer:
+
_acDownBuffer:
0x240008C4: 00 DC.B 0x00 ; '\0'
0x240008C5: 53 DC.B 0x53 ; 'S'
@@ -54259,15 +54023,21 @@
Section .data.libc.__SEGGER_RTL_global_locale from mbops.o (mbops_timeops_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=20, align=4
-
__SEGGER_RTL_global_locale:
-__RAL_global_locale:
- 0x240008D4: 08003724 DC.W __SEGGER_RTL_c_locale
- 0x240008D8: 08003724 DC.W __SEGGER_RTL_c_locale
- 0x240008DC: 08003724 DC.W __SEGGER_RTL_c_locale
- 0x240008E0: 08003724 DC.W __SEGGER_RTL_c_locale
- 0x240008E4: 08003724 DC.W __SEGGER_RTL_c_locale
+
__SEGGER_RTL_global_locale:
+__RAL_global_locale:
+ 0x240008D4: 08003724 DC.W __SEGGER_RTL_c_locale
+ 0x240008D8: 08003724 DC.W __SEGGER_RTL_c_locale
+ 0x240008DC: 08003724 DC.W __SEGGER_RTL_c_locale
+ 0x240008E0: 08003724 DC.W __SEGGER_RTL_c_locale
+ 0x240008E4: 08003724 DC.W __SEGGER_RTL_c_locale
Section .data.uwTickPrio from charger_lto.o, size=4, align=4
-
uwTickPrio:
+
uwTickPrio:
0x240008E8: 10 DC.B 0x10 ; '\x10'
0x240008E9: 00 DC.B 0x00 ; '\0'
@@ -54277,20 +54047,24 @@
Section .data.libc.stdout from prinops_rtt.o (prinops_rtt_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=4, align=4
-
stdout:
- 0x240008EC: 240004B4 DC.W __SEGGER_RTL_stdout_file
+
stdout:
+ 0x240008EC: 240004B4 DC.W __SEGGER_RTL_stdout_file
Section .data.libc.stdin from prinops_rtt.o (prinops_rtt_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=4, align=4
-
stdin:
- 0x240008F0: 240004B8 DC.W __SEGGER_RTL_stdin_file
+
stdin:
+ 0x240008F0: 240004B8 DC.W __SEGGER_RTL_stdin_file
Section .data.libc.stderr from prinops_rtt.o (prinops_rtt_v7em_fpv5_d16_hard_t_le_eabi_balanced.a), size=4, align=4
-
stderr:
- 0x240008F4: 240004BC DC.W __SEGGER_RTL_stderr_file
+
stderr:
+ 0x240008F4: 240004BC DC.W __SEGGER_RTL_stderr_file
Section .data.SystemD2Clock from charger_lto.o, size=4, align=4
-
SystemD2Clock:
+
SystemD2Clock:
0x240008F8: 00 DC.B 0x00 ; '\0'
0x240008F9: 90 DC.B 0x90 ; '\x90'
@@ -54300,5 +54074,5 @@
Section .data.SystemCoreClock from charger_lto.o, size=4, align=4
-
SystemCoreClock:
+
SystemCoreClock:
0x240008FC: 00 DC.B 0x00 ; '\0'
0x240008FD: 90 DC.B 0x90 ; '\x90'
@@ -54308,5 +54082,5 @@
Section .data.uwTickFreq from charger_lto.o, size=1, align=1
-
uwTickFreq:
+
uwTickFreq:
0x24000900: 01 DC.B 0x01 ; '\x01'