Changeset 59 for ctrl/firmware/Main/CubeMX
- Timestamp:
- Jan 10, 2025, 4:18:37 PM (5 days ago)
- Location:
- ctrl/firmware/Main/CubeMX
- Files:
-
- 11 edited
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Core/Src/gpio.c (modified) (1 diff)
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Core/Src/main.c (modified) (3 diffs)
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Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h723xx.h (modified) (4 diffs)
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Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h7xx.h (modified) (1 diff)
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Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_hsem.h (modified) (5 diffs)
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Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rtc.h (modified) (2 diffs)
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Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rtc_ex.h (modified) (19 diffs)
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Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.c (modified) (1 diff)
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Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr_ex.c (modified) (1 diff)
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Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rtc.c (modified) (7 diffs)
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charger.ioc (modified) (4 diffs)
Legend:
- Unmodified
- Added
- Removed
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ctrl/firmware/Main/CubeMX/Core/Src/gpio.c
r58 r59 174 174 GPIO_InitStruct.Pin = SD_DETECT_Pin; 175 175 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 176 GPIO_InitStruct.Pull = GPIO_PULL DOWN;176 GPIO_InitStruct.Pull = GPIO_PULLUP; 177 177 HAL_GPIO_Init(SD_DETECT_GPIO_Port, &GPIO_InitStruct); 178 178 -
ctrl/firmware/Main/CubeMX/Core/Src/main.c
r54 r59 62 62 void SPI_WriteComm(uint8_t); 63 63 void SPI_WriteData(uint8_t); 64 void DoNothing(void) {}; 64 65 65 66 … … 110 111 111 112 /* USER CODE END SysInit */ 112 113 #define MX_SDMMC1_SD_Init DoNothing 113 114 /* Initialize all configured peripherals */ 114 115 MX_GPIO_Init(); … … 118 119 MX_SDMMC1_SD_Init(); 119 120 /* USER CODE BEGIN 2 */ 120 121 #undef MX_SDMMC1_SD_Init 121 122 /* USER CODE END 2 */ 122 123 -
ctrl/firmware/Main/CubeMX/Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h723xx.h
r17 r59 1322 1322 __IO uint32_t TSSSR; /*!< RTC time-stamp sub second register, Address offset: 0x38 */ 1323 1323 __IO uint32_t CALR; /*!< RTC calibration register, Address offset: 0x3C */ 1324 __IO uint32_t TA MPCR; /*!< RTC tamper configuration register,Address offset: 0x40 */1324 __IO uint32_t TAFCR; /*!< RTC tamper and alternate function configuration register, Address offset: 0x40 */ 1325 1325 __IO uint32_t ALRMASSR; /*!< RTC alarm A sub second register, Address offset: 0x44 */ 1326 1326 __IO uint32_t ALRMBSSR; /*!< RTC alarm B sub second register, Address offset: 0x48 */ … … 16974 16974 #define RTC_CALR_CALM_8 (0x100UL << RTC_CALR_CALM_Pos) /*!< 0x00000100 */ 16975 16975 16976 /******************** Bits definition for RTC_TAMPCR register ***************/ 16976 /******************** Bits definition for RTC_TAFCR register ***************/ 16977 #define RTC_TAFCR_PC15MODE_Pos (23U) 16978 #define RTC_TAFCR_PC15MODE_Msk (0x1UL << RTC_TAFCR_PC15MODE_Pos) /*!< 0x00800000 */ 16979 #define RTC_TAFCR_PC15MODE RTC_TAFCR_PC15MODE_Msk 16980 #define RTC_TAFCR_PC15VALUE_Pos (22U) 16981 #define RTC_TAFCR_PC15VALUE_Msk (0x1UL << RTC_TAFCR_PC15VALUE_Pos) /*!< 0x00400000 */ 16982 #define RTC_TAFCR_PC15VALUE RTC_TAFCR_PC15VALUE_Msk 16983 #define RTC_TAFCR_PC14MODE_Pos (21U) 16984 #define RTC_TAFCR_PC14MODE_Msk (0x1UL << RTC_TAFCR_PC14MODE_Pos) /*!< 0x00200000 */ 16985 #define RTC_TAFCR_PC14MODE RTC_TAFCR_PC14MODE_Msk 16986 #define RTC_TAFCR_PC14VALUE_Pos (20U) 16987 #define RTC_TAFCR_PC14VALUE_Msk (0x1UL << RTC_TAFCR_PC14VALUE_Pos) /*!< 0x00100000 */ 16988 #define RTC_TAFCR_PC14VALUE RTC_TAFCR_PC14VALUE_Msk 16989 #define RTC_TAFCR_PC13MODE_Pos (19U) 16990 #define RTC_TAFCR_PC13MODE_Msk (0x1UL << RTC_TAFCR_PC13MODE_Pos) /*!< 0x00080000 */ 16991 #define RTC_TAFCR_PC13MODE RTC_TAFCR_PC13MODE_Msk 16992 #define RTC_TAFCR_PC13VALUE_Pos (18U) 16993 #define RTC_TAFCR_PC13VALUE_Msk (0x1UL << RTC_TAFCR_PC13VALUE_Pos) /*!< 0x00040000 */ 16994 #define RTC_TAFCR_PC13VALUE RTC_TAFCR_PC13VALUE_Msk 16995 #define RTC_TAFCR_TAMPPUDIS_Pos (15U) 16996 #define RTC_TAFCR_TAMPPUDIS_Msk (0x1UL << RTC_TAFCR_TAMPPUDIS_Pos) /*!< 0x00008000 */ 16997 #define RTC_TAFCR_TAMPPUDIS RTC_TAFCR_TAMPPUDIS_Msk 16998 #define RTC_TAFCR_TAMPPRCH_Pos (13U) 16999 #define RTC_TAFCR_TAMPPRCH_Msk (0x3UL << RTC_TAFCR_TAMPPRCH_Pos) /*!< 0x00006000 */ 17000 #define RTC_TAFCR_TAMPPRCH RTC_TAFCR_TAMPPRCH_Msk 17001 #define RTC_TAFCR_TAMPPRCH_0 (0x1UL << RTC_TAFCR_TAMPPRCH_Pos) /*!< 0x00002000 */ 17002 #define RTC_TAFCR_TAMPPRCH_1 (0x2UL << RTC_TAFCR_TAMPPRCH_Pos) /*!< 0x00004000 */ 17003 #define RTC_TAFCR_TAMPFLT_Pos (11U) 17004 #define RTC_TAFCR_TAMPFLT_Msk (0x3UL << RTC_TAFCR_TAMPFLT_Pos) /*!< 0x00001800 */ 17005 #define RTC_TAFCR_TAMPFLT RTC_TAFCR_TAMPFLT_Msk 17006 #define RTC_TAFCR_TAMPFLT_0 (0x1UL << RTC_TAFCR_TAMPFLT_Pos) /*!< 0x00000800 */ 17007 #define RTC_TAFCR_TAMPFLT_1 (0x2UL << RTC_TAFCR_TAMPFLT_Pos) /*!< 0x00001000 */ 17008 #define RTC_TAFCR_TAMPFREQ_Pos (8U) 17009 #define RTC_TAFCR_TAMPFREQ_Msk (0x7UL << RTC_TAFCR_TAMPFREQ_Pos) /*!< 0x00000700 */ 17010 #define RTC_TAFCR_TAMPFREQ RTC_TAFCR_TAMPFREQ_Msk 17011 #define RTC_TAFCR_TAMPFREQ_0 (0x1UL << RTC_TAFCR_TAMPFREQ_Pos) /*!< 0x00000100 */ 17012 #define RTC_TAFCR_TAMPFREQ_1 (0x2UL << RTC_TAFCR_TAMPFREQ_Pos) /*!< 0x00000200 */ 17013 #define RTC_TAFCR_TAMPFREQ_2 (0x4UL << RTC_TAFCR_TAMPFREQ_Pos) /*!< 0x00000400 */ 17014 #define RTC_TAFCR_TAMPTS_Pos (7U) 17015 #define RTC_TAFCR_TAMPTS_Msk (0x1UL << RTC_TAFCR_TAMPTS_Pos) /*!< 0x00000080 */ 17016 #define RTC_TAFCR_TAMPTS RTC_TAFCR_TAMPTS_Msk 17017 #define RTC_TAFCR_TAMP3TRG_Pos (6U) 17018 #define RTC_TAFCR_TAMP3TRG_Msk (0x1UL << RTC_TAFCR_TAMP3TRG_Pos) /*!< 0x00000040 */ 17019 #define RTC_TAFCR_TAMP3TRG RTC_TAFCR_TAMP3TRG_Msk 17020 #define RTC_TAFCR_TAMP3E_Pos (5U) 17021 #define RTC_TAFCR_TAMP3E_Msk (0x1UL << RTC_TAFCR_TAMP3E_Pos) /*!< 0x00000020 */ 17022 #define RTC_TAFCR_TAMP3E RTC_TAFCR_TAMP3E_Msk 17023 #define RTC_TAFCR_TAMPIE_Pos (2U) 17024 #define RTC_TAFCR_TAMPIE_Msk (0x1UL << RTC_TAFCR_TAMPIE_Pos) /*!< 0x00000004 */ 17025 #define RTC_TAFCR_TAMPIE RTC_TAFCR_TAMPIE_Msk 17026 #define RTC_TAFCR_TAMP1TRG_Pos (1U) 17027 #define RTC_TAFCR_TAMP1TRG_Msk (0x1UL << RTC_TAFCR_TAMP1TRG_Pos) /*!< 0x00000002 */ 17028 #define RTC_TAFCR_TAMP1TRG RTC_TAFCR_TAMP1TRG_Msk 17029 #define RTC_TAFCR_TAMP1E_Pos (0U) 17030 #define RTC_TAFCR_TAMP1E_Msk (0x1UL << RTC_TAFCR_TAMP1E_Pos) /*!< 0x00000001 */ 17031 #define RTC_TAFCR_TAMP1E RTC_TAFCR_TAMP1E_Msk 17032 17033 /* Aliases for RTC TAFCR */ 17034 #define TAMPCR TAFCR 17035 #define RTC_TAMPCR_TAMPPUDIS_Pos RTC_TAFCR_TAMPPUDIS_Pos 17036 #define RTC_TAMPCR_TAMPPUDIS_Msk RTC_TAFCR_TAMPPUDIS_Msk 17037 #define RTC_TAMPCR_TAMPPUDIS RTC_TAFCR_TAMPPUDIS 17038 #define RTC_TAMPCR_TAMPPRCH_Pos RTC_TAFCR_TAMPPRCH_Pos 17039 #define RTC_TAMPCR_TAMPPRCH_Msk RTC_TAFCR_TAMPPRCH_Msk 17040 #define RTC_TAMPCR_TAMPPRCH RTC_TAFCR_TAMPPRCH 17041 #define RTC_TAMPCR_TAMPPRCH_0 RTC_TAFCR_TAMPPRCH_0 17042 #define RTC_TAMPCR_TAMPPRCH_1 RTC_TAFCR_TAMPPRCH_1 17043 #define RTC_TAMPCR_TAMPFLT_Pos RTC_TAFCR_TAMPFLT_Pos 17044 #define RTC_TAMPCR_TAMPFLT_Msk RTC_TAFCR_TAMPFLT_Msk 17045 #define RTC_TAMPCR_TAMPFLT RTC_TAFCR_TAMPFLT 17046 #define RTC_TAMPCR_TAMPFLT_0 RTC_TAFCR_TAMPFLT_0 17047 #define RTC_TAMPCR_TAMPFLT_1 RTC_TAFCR_TAMPFLT_1 17048 #define RTC_TAMPCR_TAMPFREQ_Pos RTC_TAFCR_TAMPFREQ_Pos 17049 #define RTC_TAMPCR_TAMPFREQ_Msk RTC_TAFCR_TAMPFREQ_Msk 17050 #define RTC_TAMPCR_TAMPFREQ RTC_TAFCR_TAMPFREQ 17051 #define RTC_TAMPCR_TAMPFREQ_0 RTC_TAFCR_TAMPFREQ_0 17052 #define RTC_TAMPCR_TAMPFREQ_1 RTC_TAFCR_TAMPFREQ_1 17053 #define RTC_TAMPCR_TAMPFREQ_2 RTC_TAFCR_TAMPFREQ_2 17054 #define RTC_TAMPCR_TAMPTS_Pos RTC_TAFCR_TAMPTS_Pos 17055 #define RTC_TAMPCR_TAMPTS_Msk RTC_TAFCR_TAMPTS_Msk 17056 #define RTC_TAMPCR_TAMPTS RTC_TAFCR_TAMPTS 17057 #define RTC_TAMPCR_TAMP3TRG_Pos RTC_TAFCR_TAMP3TRG_Pos 17058 #define RTC_TAMPCR_TAMP3TRG_Msk RTC_TAFCR_TAMP3TRG_Msk 17059 #define RTC_TAMPCR_TAMP3TRG RTC_TAFCR_TAMP3TRG 17060 #define RTC_TAMPCR_TAMP3E_Pos RTC_TAFCR_TAMP3E_Pos 17061 #define RTC_TAMPCR_TAMP3E_Msk RTC_TAFCR_TAMP3E_Msk 17062 #define RTC_TAMPCR_TAMP3E RTC_TAFCR_TAMP3E 17063 #define RTC_TAMPCR_TAMPIE_Pos RTC_TAFCR_TAMPIE_Pos 17064 #define RTC_TAMPCR_TAMPIE_Msk RTC_TAFCR_TAMPIE_Msk 17065 #define RTC_TAMPCR_TAMPIE RTC_TAFCR_TAMPIE 17066 #define RTC_TAMPCR_TAMP1TRG_Pos RTC_TAFCR_TAMP1TRG_Pos 17067 #define RTC_TAMPCR_TAMP1TRG_Msk RTC_TAFCR_TAMP1TRG_Msk 17068 #define RTC_TAMPCR_TAMP1TRG RTC_TAFCR_TAMP1TRG 17069 #define RTC_TAMPCR_TAMP1E_Pos RTC_TAFCR_TAMP1E_Pos 17070 #define RTC_TAMPCR_TAMP1E_Msk RTC_TAFCR_TAMP1E_Msk 17071 #define RTC_TAMPCR_TAMP1E RTC_TAFCR_TAMP1E 17072 17073 /* Legacy defines for backward compatibility */ 16977 17074 #define RTC_TAMPCR_TAMP3MF_Pos (24U) 16978 17075 #define RTC_TAMPCR_TAMP3MF_Msk (0x1UL << RTC_TAMPCR_TAMP3MF_Pos) /*!< 0x01000000 */ … … 17002 17099 #define RTC_TAMPCR_TAMP1IE_Msk (0x1UL << RTC_TAMPCR_TAMP1IE_Pos) /*!< 0x00010000 */ 17003 17100 #define RTC_TAMPCR_TAMP1IE RTC_TAMPCR_TAMP1IE_Msk 17004 #define RTC_TAMPCR_TAMPPUDIS_Pos (15U)17005 #define RTC_TAMPCR_TAMPPUDIS_Msk (0x1UL << RTC_TAMPCR_TAMPPUDIS_Pos) /*!< 0x00008000 */17006 #define RTC_TAMPCR_TAMPPUDIS RTC_TAMPCR_TAMPPUDIS_Msk17007 #define RTC_TAMPCR_TAMPPRCH_Pos (13U)17008 #define RTC_TAMPCR_TAMPPRCH_Msk (0x3UL << RTC_TAMPCR_TAMPPRCH_Pos) /*!< 0x00006000 */17009 #define RTC_TAMPCR_TAMPPRCH RTC_TAMPCR_TAMPPRCH_Msk17010 #define RTC_TAMPCR_TAMPPRCH_0 (0x1UL << RTC_TAMPCR_TAMPPRCH_Pos) /*!< 0x00002000 */17011 #define RTC_TAMPCR_TAMPPRCH_1 (0x2UL << RTC_TAMPCR_TAMPPRCH_Pos) /*!< 0x00004000 */17012 #define RTC_TAMPCR_TAMPFLT_Pos (11U)17013 #define RTC_TAMPCR_TAMPFLT_Msk (0x3UL << RTC_TAMPCR_TAMPFLT_Pos) /*!< 0x00001800 */17014 #define RTC_TAMPCR_TAMPFLT RTC_TAMPCR_TAMPFLT_Msk17015 #define RTC_TAMPCR_TAMPFLT_0 (0x1UL << RTC_TAMPCR_TAMPFLT_Pos) /*!< 0x00000800 */17016 #define RTC_TAMPCR_TAMPFLT_1 (0x2UL << RTC_TAMPCR_TAMPFLT_Pos) /*!< 0x00001000 */17017 #define RTC_TAMPCR_TAMPFREQ_Pos (8U)17018 #define RTC_TAMPCR_TAMPFREQ_Msk (0x7UL << RTC_TAMPCR_TAMPFREQ_Pos) /*!< 0x00000700 */17019 #define RTC_TAMPCR_TAMPFREQ RTC_TAMPCR_TAMPFREQ_Msk17020 #define RTC_TAMPCR_TAMPFREQ_0 (0x1UL << RTC_TAMPCR_TAMPFREQ_Pos) /*!< 0x00000100 */17021 #define RTC_TAMPCR_TAMPFREQ_1 (0x2UL << RTC_TAMPCR_TAMPFREQ_Pos) /*!< 0x00000200 */17022 #define RTC_TAMPCR_TAMPFREQ_2 (0x4UL << RTC_TAMPCR_TAMPFREQ_Pos) /*!< 0x00000400 */17023 #define RTC_TAMPCR_TAMPTS_Pos (7U)17024 #define RTC_TAMPCR_TAMPTS_Msk (0x1UL << RTC_TAMPCR_TAMPTS_Pos) /*!< 0x00000080 */17025 #define RTC_TAMPCR_TAMPTS RTC_TAMPCR_TAMPTS_Msk17026 #define RTC_TAMPCR_TAMP3TRG_Pos (6U)17027 #define RTC_TAMPCR_TAMP3TRG_Msk (0x1UL << RTC_TAMPCR_TAMP3TRG_Pos) /*!< 0x00000040 */17028 #define RTC_TAMPCR_TAMP3TRG RTC_TAMPCR_TAMP3TRG_Msk17029 #define RTC_TAMPCR_TAMP3E_Pos (5U)17030 #define RTC_TAMPCR_TAMP3E_Msk (0x1UL << RTC_TAMPCR_TAMP3E_Pos) /*!< 0x00000020 */17031 #define RTC_TAMPCR_TAMP3E RTC_TAMPCR_TAMP3E_Msk17032 17101 #define RTC_TAMPCR_TAMP2TRG_Pos (4U) 17033 17102 #define RTC_TAMPCR_TAMP2TRG_Msk (0x1UL << RTC_TAMPCR_TAMP2TRG_Pos) /*!< 0x00000010 */ … … 17036 17105 #define RTC_TAMPCR_TAMP2E_Msk (0x1UL << RTC_TAMPCR_TAMP2E_Pos) /*!< 0x00000008 */ 17037 17106 #define RTC_TAMPCR_TAMP2E RTC_TAMPCR_TAMP2E_Msk 17038 #define RTC_TAMPCR_TAMPIE_Pos (2U)17039 #define RTC_TAMPCR_TAMPIE_Msk (0x1UL << RTC_TAMPCR_TAMPIE_Pos) /*!< 0x00000004 */17040 #define RTC_TAMPCR_TAMPIE RTC_TAMPCR_TAMPIE_Msk17041 #define RTC_TAMPCR_TAMP1TRG_Pos (1U)17042 #define RTC_TAMPCR_TAMP1TRG_Msk (0x1UL << RTC_TAMPCR_TAMP1TRG_Pos) /*!< 0x00000002 */17043 #define RTC_TAMPCR_TAMP1TRG RTC_TAMPCR_TAMP1TRG_Msk17044 #define RTC_TAMPCR_TAMP1E_Pos (0U)17045 #define RTC_TAMPCR_TAMP1E_Msk (0x1UL << RTC_TAMPCR_TAMP1E_Pos) /*!< 0x00000001 */17046 #define RTC_TAMPCR_TAMP1E RTC_TAMPCR_TAMP1E_Msk17047 17107 17048 17108 /******************** Bits definition for RTC_ALRMASSR register *************/ -
ctrl/firmware/Main/CubeMX/Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h7xx.h
r16 r59 104 104 105 105 /** 106 * @brief CMSIS Device version number V1.10. 5106 * @brief CMSIS Device version number V1.10.6 107 107 */ 108 108 #define __STM32H7xx_CMSIS_DEVICE_VERSION_MAIN (0x01) /*!< [31:24] main version */ 109 109 #define __STM32H7xx_CMSIS_DEVICE_VERSION_SUB1 (0x0A) /*!< [23:16] sub1 version */ 110 #define __STM32H7xx_CMSIS_DEVICE_VERSION_SUB2 (0x0 5) /*!< [15:8] sub2 version */110 #define __STM32H7xx_CMSIS_DEVICE_VERSION_SUB2 (0x06) /*!< [15:8] sub2 version */ 111 111 #define __STM32H7xx_CMSIS_DEVICE_VERSION_RC (0x00) /*!< [7:0] release candidate */ 112 112 #define __STM32H7xx_CMSIS_DEVICE_VERSION ((__STM32H7xx_CMSIS_DEVICE_VERSION_MAIN << 24)\ -
ctrl/firmware/Main/CubeMX/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_hsem.h
r34 r59 58 58 (HSEM->C2IER |= (__SEM_MASK__))) 59 59 #else 60 #define __HAL_HSEM_ENABLE_IT(__SEM_MASK__) (HSEM-> IER |= (__SEM_MASK__))60 #define __HAL_HSEM_ENABLE_IT(__SEM_MASK__) (HSEM->C1IER |= (__SEM_MASK__)) 61 61 #endif /* DUAL_CORE */ 62 62 /** … … 70 70 (HSEM->C2IER &= ~(__SEM_MASK__))) 71 71 #else 72 #define __HAL_HSEM_DISABLE_IT(__SEM_MASK__) (HSEM-> IER &= ~(__SEM_MASK__))72 #define __HAL_HSEM_DISABLE_IT(__SEM_MASK__) (HSEM->C1IER &= ~(__SEM_MASK__)) 73 73 #endif /* DUAL_CORE */ 74 74 … … 81 81 #define __HAL_HSEM_GET_IT(__SEM_MASK__) ((((SCB->CPUID & 0x000000F0) >> 4 )== 0x7) ? \ 82 82 ((__SEM_MASK__) & HSEM->C1MISR) : \ 83 ((__SEM_MASK__) & HSEM->C2MISR 1))84 #else 85 #define __HAL_HSEM_GET_IT(__SEM_MASK__) ((__SEM_MASK__) & HSEM-> MISR)83 ((__SEM_MASK__) & HSEM->C2MISR)) 84 #else 85 #define __HAL_HSEM_GET_IT(__SEM_MASK__) ((__SEM_MASK__) & HSEM->C1MISR) 86 86 #endif /* DUAL_CORE */ 87 87 … … 96 96 (__SEM_MASK__) & HSEM->C2ISR) 97 97 #else 98 #define __HAL_HSEM_GET_FLAG(__SEM_MASK__) ((__SEM_MASK__) & HSEM-> ISR)98 #define __HAL_HSEM_GET_FLAG(__SEM_MASK__) ((__SEM_MASK__) & HSEM->C1ISR) 99 99 #endif /* DUAL_CORE */ 100 100 … … 109 109 (HSEM->C2ICR |= (__SEM_MASK__))) 110 110 #else 111 #define __HAL_HSEM_CLEAR_FLAG(__SEM_MASK__) (HSEM-> ICR |= (__SEM_MASK__))111 #define __HAL_HSEM_CLEAR_FLAG(__SEM_MASK__) (HSEM->C1ICR |= (__SEM_MASK__)) 112 112 #endif /* DUAL_CORE */ 113 113 -
ctrl/firmware/Main/CubeMX/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rtc.h
r40 r59 182 182 183 183 #if (USE_HAL_RTC_REGISTER_CALLBACKS == 1) 184 void (* AlarmAEventCallback)(struct __RTC_HandleTypeDef *hrtc); /*!< RTC Alarm A Event callback */ 185 186 void (* AlarmBEventCallback)(struct __RTC_HandleTypeDef *hrtc); /*!< RTC Alarm B Event callback */ 187 188 void (* TimeStampEventCallback)(struct __RTC_HandleTypeDef *hrtc); /*!< RTC TimeStamp Event callback */ 189 190 void (* WakeUpTimerEventCallback)(struct __RTC_HandleTypeDef *hrtc); /*!< RTC WakeUpTimer Event callback */ 191 192 void (* Tamper1EventCallback)(struct __RTC_HandleTypeDef *hrtc); /*!< RTC Tamper 1 Event callback */ 193 194 void (* Tamper2EventCallback)(struct __RTC_HandleTypeDef *hrtc); /*!< RTC Tamper 2 Event callback */ 195 196 void (* Tamper3EventCallback)(struct __RTC_HandleTypeDef *hrtc); /*!< RTC Tamper 3 Event callback */ 197 198 #if defined(TAMP) 199 void (* InternalTamper1EventCallback)(struct __RTC_HandleTypeDef *hrtc); /*!< RTC Internal Tamper 1 Event callback */ 200 201 void (* InternalTamper2EventCallback)(struct __RTC_HandleTypeDef *hrtc); /*!< RTC Internal Tamper 2 Event callback */ 202 203 void (* InternalTamper3EventCallback)(struct __RTC_HandleTypeDef *hrtc); /*!< RTC Internal Tamper 3 Event callback */ 204 205 void (* InternalTamper4EventCallback)(struct __RTC_HandleTypeDef *hrtc); /*!< RTC Internal Tamper 4 Event callback */ 206 207 void (* InternalTamper5EventCallback)(struct __RTC_HandleTypeDef *hrtc); /*!< RTC Internal Tamper 5 Event callback */ 208 209 void (* InternalTamper6EventCallback)(struct __RTC_HandleTypeDef *hrtc); /*!< RTC Internal Tamper 6 Event callback */ 210 211 void (* InternalTamper8EventCallback)(struct __RTC_HandleTypeDef *hrtc); /*!< RTC Internal Tamper 8 Event callback */ 212 #endif /* TAMP */ 213 214 void (* MspInitCallback)(struct __RTC_HandleTypeDef *hrtc); /*!< RTC Msp Init callback */ 215 216 void (* MspDeInitCallback)(struct __RTC_HandleTypeDef *hrtc); /*!< RTC Msp DeInit callback */ 184 void (* AlarmAEventCallback)(struct __RTC_HandleTypeDef *hrtc); /*!< RTC Alarm A Event callback */ 185 186 void (* AlarmBEventCallback)(struct __RTC_HandleTypeDef *hrtc); /*!< RTC Alarm B Event callback */ 187 188 void (* TimeStampEventCallback)(struct __RTC_HandleTypeDef *hrtc); /*!< RTC TimeStamp Event callback */ 189 190 void (* WakeUpTimerEventCallback)(struct __RTC_HandleTypeDef *hrtc); /*!< RTC WakeUpTimer Event callback */ 191 192 void (* Tamper1EventCallback)(struct __RTC_HandleTypeDef *hrtc); /*!< RTC Tamper 1 Event callback */ 193 194 #if defined(RTC_TAMPER2_SUPPORT) 195 void (* Tamper2EventCallback)(struct __RTC_HandleTypeDef *hrtc); /*!< RTC Tamper 2 Event callback */ 196 #endif /* RTC_TAMPER2_SUPPORT */ 197 198 void (* Tamper3EventCallback)(struct __RTC_HandleTypeDef *hrtc); /*!< RTC Tamper 3 Event callback */ 199 200 #if defined(TAMP) 201 void (* InternalTamper1EventCallback)(struct __RTC_HandleTypeDef *hrtc); /*!< RTC Internal Tamper 1 Event callback */ 202 203 void (* InternalTamper2EventCallback)(struct __RTC_HandleTypeDef *hrtc); /*!< RTC Internal Tamper 2 Event callback */ 204 205 void (* InternalTamper3EventCallback)(struct __RTC_HandleTypeDef *hrtc); /*!< RTC Internal Tamper 3 Event callback */ 206 207 void (* InternalTamper4EventCallback)(struct __RTC_HandleTypeDef *hrtc); /*!< RTC Internal Tamper 4 Event callback */ 208 209 void (* InternalTamper5EventCallback)(struct __RTC_HandleTypeDef *hrtc); /*!< RTC Internal Tamper 5 Event callback */ 210 211 void (* InternalTamper6EventCallback)(struct __RTC_HandleTypeDef *hrtc); /*!< RTC Internal Tamper 6 Event callback */ 212 213 void (* InternalTamper8EventCallback)(struct __RTC_HandleTypeDef *hrtc); /*!< RTC Internal Tamper 8 Event callback */ 214 #endif /* TAMP */ 215 216 void (* MspInitCallback)(struct __RTC_HandleTypeDef *hrtc); /*!< RTC Msp Init callback */ 217 218 void (* MspDeInitCallback)(struct __RTC_HandleTypeDef *hrtc); /*!< RTC Msp DeInit callback */ 217 219 218 220 #endif /* (USE_HAL_RTC_REGISTER_CALLBACKS == 1) */ … … 231 233 HAL_RTC_WAKEUPTIMER_EVENT_CB_ID = 3u, /*!< RTC WakeUp Timer Event Callback ID */ 232 234 HAL_RTC_TAMPER1_EVENT_CB_ID = 4u, /*!< RTC Tamper 1 Callback ID */ 235 #if defined(RTC_TAMPER2_SUPPORT) 233 236 HAL_RTC_TAMPER2_EVENT_CB_ID = 5u, /*!< RTC Tamper 2 Callback ID */ 237 #endif /* RTC_TAMPER2_SUPPORT */ 234 238 HAL_RTC_TAMPER3_EVENT_CB_ID = 6u, /*!< RTC Tamper 3 Callback ID */ 235 239 #if defined(TAMP) -
ctrl/firmware/Main/CubeMX/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rtc_ex.h
r41 r59 57 57 58 58 uint32_t NoErase; /*!< Specifies the Tamper no erase mode. 59 This parameter can be a value of @ref RTCEx_Tamper_EraseBackUp_Definitions */ 60 61 uint32_t MaskFlag; /*!< Specifies the Tamper Flag masking. 62 This parameter can be a value of @ref RTCEx_Tamper_MaskFlag_Definitions */ 59 This parameter can be a value of @ref RTCEx_Tamper_EraseBackUp_Definitions 60 This parameter is not applicable to the STM32H723/33, STM32H725/35 and STM32H730 61 devices, and has been kept for backward compatibility */ 62 63 uint32_t MaskFlag; /*!< Specifies the Tamper Flag masking. 64 This parameter can be a value of @ref RTCEx_Tamper_MaskFlag_Definitions 65 This parameter is not applicable to the STM32H723/33, STM32H725/35 and STM32H730 66 devices, and has been kept for backward compatibility */ 63 67 64 68 uint32_t Filter; /*!< Specifies the TAMP Filter Tamper. … … 266 270 #else 267 271 #define RTC_TAMPER_1 RTC_TAMPCR_TAMP1E 272 #if defined(RTC_TAMPER2_SUPPORT) 268 273 #define RTC_TAMPER_2 RTC_TAMPCR_TAMP2E 274 #endif /* RTC_TAMPER2_SUPPORT */ 269 275 #define RTC_TAMPER_3 RTC_TAMPCR_TAMP3E 270 276 #endif /* TAMP */ 271 277 278 #if defined(RTC_TAMPER2_SUPPORT) 272 279 #define RTC_TAMPER_ALL (RTC_TAMPER_1 | RTC_TAMPER_2 | RTC_TAMPER_3) 280 #else 281 #define RTC_TAMPER_ALL (RTC_TAMPER_1 | RTC_TAMPER_3) 282 #endif /* RTC_TAMPER2_SUPPORT */ 273 283 /** 274 284 * @} … … 283 293 #define RTC_IT_TAMP3 TAMP_IER_TAMP3IE /*!< Enable Tamper 3 Interrupt */ 284 294 #else 295 #if defined(RTC_TAMPxIE_SUPPORT) 285 296 #define RTC_IT_TAMP1 RTC_TAMPCR_TAMP1IE /*!< Enable Tamper 1 Interrupt */ 286 297 #define RTC_IT_TAMP2 RTC_TAMPCR_TAMP2IE /*!< Enable Tamper 2 Interrupt */ 287 298 #define RTC_IT_TAMP3 RTC_TAMPCR_TAMP3IE /*!< Enable Tamper 3 Interrupt */ 299 #else 300 #define RTC_IT_TAMP1 RTC_TAFCR_TAMPIE /*!< Enable Tamper Interrupt */ 301 #endif /* RTC_TAMPxIE_SUPPORT */ 288 302 #endif /* TAMP */ 289 303 … … 350 364 #else 351 365 #define RTC_TAMPER_1_TRIGGER RTC_TAMPCR_TAMP1TRG 366 #if defined(RTC_TAMPER2_SUPPORT) 352 367 #define RTC_TAMPER_2_TRIGGER RTC_TAMPCR_TAMP2TRG 368 #endif /* RTC_TAMPER2_SUPPORT */ 353 369 #define RTC_TAMPER_3_TRIGGER RTC_TAMPCR_TAMP3TRG 354 370 #endif /* TAMP */ 355 371 372 #if defined(RTC_TAMPER2_SUPPORT) 356 373 #define RTC_TAMPER_X_TRIGGER (RTC_TAMPER_1_TRIGGER |\ 357 374 RTC_TAMPER_2_TRIGGER |\ 358 375 RTC_TAMPER_3_TRIGGER) 376 #else 377 #define RTC_TAMPER_X_TRIGGER (RTC_TAMPER_1_TRIGGER |\ 378 RTC_TAMPER_3_TRIGGER) 379 #endif /* RTC_TAMPER2_SUPPORT */ 359 380 /** 360 381 * @} … … 368 389 #define RTC_TAMPER_ERASE_BACKUP_DISABLE 0x01u 369 390 #else 370 #define RTC_TAMPER_ERASE_BACKUP_ENABLE 0x00000000u 391 #if defined(RTC_TAMPNOERASE_SUPPORT) 392 #define RTC_TAMPER_ERASE_BACKUP_ENABLE 0x00u 371 393 #define RTC_TAMPER_ERASE_BACKUP_DISABLE RTC_TAMPCR_TAMP1NOERASE 394 #else 395 /*!< These values are not applicable to the STM32H723/33, STM32H725/35 and STM32H730 396 devices, and have been kept for backward compatibility */ 397 #define RTC_TAMPER_ERASE_BACKUP_ENABLE 0x00u 398 #define RTC_TAMPER_ERASE_BACKUP_DISABLE 0x01u 399 #endif /* RTC_TAMPNOERASE_SUPPORT */ 372 400 #endif /* TAMP */ 373 401 … … 377 405 #define RTC_DISABLE_BKP_ERASE_ON_TAMPER_3 TAMP_CR2_TAMP3NOERASE 378 406 #else 407 #if defined(RTC_TAMPNOERASE_SUPPORT) 379 408 #define RTC_DISABLE_BKP_ERASE_ON_TAMPER_1 RTC_TAMPCR_TAMP1NOERASE 380 409 #define RTC_DISABLE_BKP_ERASE_ON_TAMPER_2 RTC_TAMPCR_TAMP2NOERASE 381 410 #define RTC_DISABLE_BKP_ERASE_ON_TAMPER_3 RTC_TAMPCR_TAMP3NOERASE 382 #endif /* TAMP */ 383 411 #endif /* RTC_TAMPNOERASE_SUPPORT */ 412 #endif /* TAMP */ 413 414 #if defined(RTC_TAMPNOERASE_SUPPORT) 384 415 #define RTC_DISABLE_BKP_ERASE_ON_TAMPER_MASK (RTC_DISABLE_BKP_ERASE_ON_TAMPER_1 |\ 385 416 RTC_DISABLE_BKP_ERASE_ON_TAMPER_2 |\ 386 417 RTC_DISABLE_BKP_ERASE_ON_TAMPER_3) 418 #endif /* RTC_TAMPNOERASE_SUPPORT */ 387 419 /** 388 420 * @} … … 396 428 #define RTC_TAMPERMASK_FLAG_ENABLE 0x01u 397 429 #else 398 #define RTC_TAMPERMASK_FLAG_DISABLE 0x00000000u 430 #if defined(RTC_TAMPMASKFLAG_SUPPORT) 431 #define RTC_TAMPERMASK_FLAG_DISABLE 0x00u 399 432 #define RTC_TAMPERMASK_FLAG_ENABLE RTC_TAMPCR_TAMP1MF 433 #else 434 /*!< These values are not applicable to the STM32H723/33, STM32H725/35 and STM32H730 435 devices, and have been kept for backward compatibility */ 436 #define RTC_TAMPERMASK_FLAG_DISABLE 0x00u 437 #define RTC_TAMPERMASK_FLAG_ENABLE 0x01u 438 #endif /* RTC_TAMPMASKFLAG_SUPPORT */ 400 439 #endif /* TAMP */ 401 440 … … 405 444 #define RTC_TAMPER_3_MASK_FLAG TAMP_CR2_TAMP3MSK 406 445 #else 446 #if defined(RTC_TAMPMASKFLAG_SUPPORT) 407 447 #define RTC_TAMPER_1_MASK_FLAG RTC_TAMPCR_TAMP1MF 408 448 #define RTC_TAMPER_2_MASK_FLAG RTC_TAMPCR_TAMP2MF 409 449 #define RTC_TAMPER_3_MASK_FLAG RTC_TAMPCR_TAMP3MF 410 #endif /* TAMP */ 411 450 #endif /* RTC_TAMPMASKFLAG_SUPPORT */ 451 #endif /* TAMP */ 452 453 #if defined(RTC_TAMPMASKFLAG_SUPPORT) 412 454 #define RTC_TAMPER_X_MASK_FLAG (RTC_TAMPER_1_MASK_FLAG |\ 413 455 RTC_TAMPER_2_MASK_FLAG |\ 414 456 RTC_TAMPER_3_MASK_FLAG) 457 #endif /* RTC_TAMPMASKFLAG_SUPPORT */ 415 458 /** 416 459 * @} … … 576 619 #else 577 620 #define RTC_FLAG_TAMP1F RTC_ISR_TAMP1F 621 #if defined(RTC_TAMPER2_SUPPORT) 578 622 #define RTC_FLAG_TAMP2F RTC_ISR_TAMP2F 623 #endif /* RTC_TAMPER2_SUPPORT */ 579 624 #define RTC_FLAG_TAMP3F RTC_ISR_TAMP3F 580 625 #endif /* TAMP */ … … 866 911 #define __HAL_RTC_TAMPER2_ENABLE(__HANDLE__) (((TAMP_TypeDef *)((uint32_t)((__HANDLE__)->Instance) + TAMP_OFFSET))->CR1 |= (TAMP_CR1_TAMP2E)) 867 912 #else 913 #if defined(RTC_TAMPER2_SUPPORT) 868 914 #define __HAL_RTC_TAMPER2_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->TAMPCR |= (RTC_TAMPCR_TAMP2E)) 915 #endif /* RTC_TAMPER2_SUPPORT */ 869 916 #endif /* TAMP */ 870 917 … … 877 924 #define __HAL_RTC_TAMPER2_DISABLE(__HANDLE__) (((TAMP_TypeDef *)((uint32_t)((__HANDLE__)->Instance) + (TAMP_OFFSET))->CR1 &= ~(RTC_TAMPCR_TAMP2E)) 878 925 #else 926 #if defined(RTC_TAMPER2_SUPPORT) 879 927 #define __HAL_RTC_TAMPER2_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->TAMPCR &= ~(RTC_TAMPCR_TAMP2E)) 928 #endif /* RTC_TAMPER2_SUPPORT */ 880 929 #endif /* TAMP */ 881 930 … … 909 958 * @arg RTC_IT_TAMPALL: All tampers interrupts 910 959 * @arg RTC_IT_TAMP1: Tamper1 interrupt 911 * @arg RTC_IT_TAMP2: Tamper2 interrupt 960 * @arg RTC_IT_TAMP2: Tamper2 interrupt (*) 912 961 * @arg RTC_IT_TAMP3: Tamper3 interrupt 962 * (*) Not applicable to all devices. 913 963 * @retval None 914 964 */ … … 926 976 * @arg RTC_IT_TAMP: All tampers interrupts 927 977 * @arg RTC_IT_TAMP1: Tamper1 interrupt 928 * @arg RTC_IT_TAMP2: Tamper2 interrupt 978 * @arg RTC_IT_TAMP2: Tamper2 interrupt (*) 929 979 * @arg RTC_IT_TAMP3: Tamper3 interrupt 980 * (*) Not applicable to all devices. 930 981 * @retval None 931 982 */ … … 943 994 * @arg RTC_IT_TAMPALL: All tampers interrupts 944 995 * @arg RTC_IT_TAMP1: Tamper1 interrupt 945 * @arg RTC_IT_TAMP2: Tamper2 interrupt 996 * @arg RTC_IT_TAMP2: Tamper2 interrupt (*) 946 997 * @arg RTC_IT_TAMP3: Tamper3 interrupt 998 * (*) Not applicable to all devices. 947 999 * @retval Flag status 948 1000 */ … … 959 1011 * This parameter can be: 960 1012 * @arg RTC_FLAG_TAMP1F: Tamper1 flag 961 * @arg RTC_FLAG_TAMP2F: Tamper2 flag 1013 * @arg RTC_FLAG_TAMP2F: Tamper2 flag (*) 962 1014 * @arg RTC_FLAG_TAMP3F: Tamper3 flag 1015 * (*) Not applicable to all devices. 963 1016 * @retval Flag status 964 1017 */ … … 975 1028 * This parameter can be: 976 1029 * @arg RTC_FLAG_TAMP1F: Tamper1 flag 977 * @arg RTC_FLAG_TAMP2F: Tamper2 flag 1030 * @arg RTC_FLAG_TAMP2F: Tamper2 flag (*) 978 1031 * @arg RTC_FLAG_TAMP3F: Tamper3 flag 1032 * (*) Not applicable to all devices. 979 1033 * @retval None 980 1034 */ … … 1663 1717 HAL_StatusTypeDef HAL_RTCEx_DeactivateTamper(RTC_HandleTypeDef *hrtc, uint32_t Tamper); 1664 1718 HAL_StatusTypeDef HAL_RTCEx_PollForTamper1Event(RTC_HandleTypeDef *hrtc, uint32_t Timeout); 1719 #if defined(RTC_TAMPER2_SUPPORT) 1665 1720 HAL_StatusTypeDef HAL_RTCEx_PollForTamper2Event(RTC_HandleTypeDef *hrtc, uint32_t Timeout); 1721 #endif /* RTC_TAMPER2_SUPPORT */ 1666 1722 HAL_StatusTypeDef HAL_RTCEx_PollForTamper3Event(RTC_HandleTypeDef *hrtc, uint32_t Timeout); 1667 1723 void HAL_RTCEx_Tamper1EventCallback(RTC_HandleTypeDef *hrtc); 1724 #if defined(RTC_TAMPER2_SUPPORT) 1668 1725 void HAL_RTCEx_Tamper2EventCallback(RTC_HandleTypeDef *hrtc); 1726 #endif /* RTC_TAMPER2_SUPPORT */ 1669 1727 void HAL_RTCEx_Tamper3EventCallback(RTC_HandleTypeDef *hrtc); 1670 1728 #if defined(TAMP) … … 1775 1833 1776 1834 /* Masks Definition */ 1835 #if defined(RTC_TAMPER2_SUPPORT) 1777 1836 #define RTC_TAMPER_X ((uint32_t) (RTC_TAMPER_1 | RTC_TAMPER_2 | RTC_TAMPER_3)) 1837 #else 1838 #define RTC_TAMPER_X ((uint32_t) (RTC_TAMPER_1 | RTC_TAMPER_3)) 1839 #endif /* RTC_TAMPER2_SUPPORT */ 1840 1841 #if defined(RTC_TAMPxIE_SUPPORT) 1778 1842 #define RTC_TAMPER_X_INTERRUPT ((uint32_t) (RTC_IT_TAMP1 | RTC_IT_TAMP2 | RTC_IT_TAMP3)) 1843 #else 1844 #define RTC_TAMPER_X_INTERRUPT RTC_IT_TAMPALL 1845 #endif /* RTC_TAMPxIE_SUPPORT */ 1779 1846 1780 1847 /** … … 1851 1918 (((__TAMPER__) & ~RTC_TAMPER_X) == 0x00U)) 1852 1919 1853 #define IS_RTC_TAMPER_INTERRUPT(__INTERRUPT__) 1920 #define IS_RTC_TAMPER_INTERRUPT(__INTERRUPT__) \ 1854 1921 ((((__INTERRUPT__) & ( RTC_TAMPER_X_INTERRUPT | RTC_IT_TAMPALL )) != 0x00U) && \ 1855 1922 (((__INTERRUPT__) & (~(RTC_TAMPER_X_INTERRUPT | RTC_IT_TAMPALL))) == 0x00U)) -
ctrl/firmware/Main/CubeMX/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.c
r11 r59 52 52 #define __STM32H7xx_HAL_VERSION_MAIN (0x01UL) /*!< [31:24] main version */ 53 53 #define __STM32H7xx_HAL_VERSION_SUB1 (0x0BUL) /*!< [23:16] sub1 version */ 54 #define __STM32H7xx_HAL_VERSION_SUB2 (0x0 4UL) /*!< [15:8] sub2 version */54 #define __STM32H7xx_HAL_VERSION_SUB2 (0x05UL) /*!< [15:8] sub2 version */ 55 55 #define __STM32H7xx_HAL_VERSION_RC (0x00UL) /*!< [7:0] release candidate */ 56 56 #define __STM32H7xx_HAL_VERSION ((__STM32H7xx_HAL_VERSION_MAIN << 24)\ -
ctrl/firmware/Main/CubeMX/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr_ex.c
r11 r59 309 309 * PWR_SMPS_2V5_SUPPLIES_EXT are used only for lines that supports SMPS 310 310 * regulator. 311 * @note This API is deprecated and is kept only for backward compatibility's sake. 312 * The power supply configuration is handled as part of the system initialization 313 * process during startup. 314 * For more details, please refer to the power control chapter in the reference manual 311 315 * @retval HAL status. 312 316 */ -
ctrl/firmware/Main/CubeMX/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rtc.c
r43 r59 113 113 (+) WakeUpTimerEventCallback : RTC WakeUpTimer Event callback. 114 114 (+) Tamper1EventCallback : RTC Tamper 1 Event callback. 115 (+) Tamper2EventCallback : RTC Tamper 2 Event callback. 115 (+) Tamper2EventCallback : RTC Tamper 2 Event callback. (*) 116 116 (+) Tamper3EventCallback : RTC Tamper 3 Event callback. 117 (+) InternalTamper1EventCallback : RTC Internal Tamper 1 Callback ID (*) 118 (+) InternalTamper2EventCallback : RTC Internal Tamper 2 Callback ID (*) 119 (+) InternalTamper3EventCallback : RTC Internal Tamper 3 Callback ID (*) 120 (+) InternalTamper4EventCallback : RTC Internal Tamper 4 Callback ID (*) 121 (+) InternalTamper5EventCallback : RTC Internal Tamper 5 Callback ID (*) 122 (+) InternalTamper6EventCallback : RTC Internal Tamper 6 Callback ID (*) 123 (+) InternalTamper8EventCallback : RTC Internal Tamper 8 Callback ID (*) 117 124 (+) MspInitCallback : RTC MspInit callback. 118 125 (+) MspDeInitCallback : RTC MspDeInit callback. 126 127 (*) Not applicable to all devices. 128 119 129 This function takes as parameters the HAL peripheral handle, the Callback ID 120 130 and a pointer to the user callback function. … … 130 140 (+) WakeUpTimerEventCallback : RTC WakeUpTimer Event callback. 131 141 (+) Tamper1EventCallback : RTC Tamper 1 Event callback. 132 (+) Tamper2EventCallback : RTC Tamper 2 Event callback. 142 (+) Tamper2EventCallback : RTC Tamper 2 Event callback. (*) 133 143 (+) Tamper3EventCallback : RTC Tamper 3 Event callback. 144 (+) InternalTamper1EventCallback : RTC Internal Tamper 1 Callback ID (*) 145 (+) InternalTamper2EventCallback : RTC Internal Tamper 2 Callback ID (*) 146 (+) InternalTamper3EventCallback : RTC Internal Tamper 3 Callback ID (*) 147 (+) InternalTamper4EventCallback : RTC Internal Tamper 4 Callback ID (*) 148 (+) InternalTamper5EventCallback : RTC Internal Tamper 5 Callback ID (*) 149 (+) InternalTamper6EventCallback : RTC Internal Tamper 6 Callback ID (*) 150 (+) InternalTamper8EventCallback : RTC Internal Tamper 8 Callback ID (*) 134 151 (+) MspInitCallback : RTC MspInit callback. 135 152 (+) MspDeInitCallback : RTC MspDeInit callback. 153 154 (*) Not applicable to all devices. 136 155 137 156 By default, after the HAL_RTC_Init() and when the state is HAL_RTC_STATE_RESET, … … 255 274 hrtc->WakeUpTimerEventCallback = HAL_RTCEx_WakeUpTimerEventCallback; /* Legacy weak WakeUpTimerEventCallback */ 256 275 hrtc->Tamper1EventCallback = HAL_RTCEx_Tamper1EventCallback; /* Legacy weak Tamper1EventCallback */ 276 #if defined(RTC_TAMPER2_SUPPORT) 257 277 hrtc->Tamper2EventCallback = HAL_RTCEx_Tamper2EventCallback; /* Legacy weak Tamper2EventCallback */ 278 #endif /* RTC_TAMPER2_SUPPORT */ 258 279 hrtc->Tamper3EventCallback = HAL_RTCEx_Tamper3EventCallback; /* Legacy weak Tamper3EventCallback */ 259 280 … … 484 505 * @arg @ref HAL_RTC_WAKEUPTIMER_EVENT_CB_ID WakeUp Timer Event Callback ID 485 506 * @arg @ref HAL_RTC_TAMPER1_EVENT_CB_ID Tamper 1 Callback ID 486 * @arg @ref HAL_RTC_TAMPER2_EVENT_CB_ID Tamper 2 Callback ID 507 * @arg @ref HAL_RTC_TAMPER2_EVENT_CB_ID Tamper 2 Callback ID (*) 487 508 * @arg @ref HAL_RTC_TAMPER3_EVENT_CB_ID Tamper 3 Callback ID 488 * @arg @ref HAL_RTC_INTERNAL_TAMPER1_EVENT_CB_ID Internal Tamper 1 Callback ID 489 * @arg @ref HAL_RTC_INTERNAL_TAMPER2_EVENT_CB_ID Internal Tamper 2 Callback ID 490 * @arg @ref HAL_RTC_INTERNAL_TAMPER3_EVENT_CB_ID Internal Tamper 3 Callback ID 491 * @arg @ref HAL_RTC_INTERNAL_TAMPER4_EVENT_CB_ID Internal Tamper 4 Callback ID 492 * @arg @ref HAL_RTC_INTERNAL_TAMPER5_EVENT_CB_ID Internal Tamper 5 Callback ID 493 * @arg @ref HAL_RTC_INTERNAL_TAMPER6_EVENT_CB_ID Internal Tamper 6 Callback ID 494 * @arg @ref HAL_RTC_INTERNAL_TAMPER8_EVENT_CB_ID Internal Tamper 8 Callback ID 509 * @arg @ref HAL_RTC_INTERNAL_TAMPER1_EVENT_CB_ID Internal Tamper 1 Callback ID (*) 510 * @arg @ref HAL_RTC_INTERNAL_TAMPER2_EVENT_CB_ID Internal Tamper 2 Callback ID (*) 511 * @arg @ref HAL_RTC_INTERNAL_TAMPER3_EVENT_CB_ID Internal Tamper 3 Callback ID (*) 512 * @arg @ref HAL_RTC_INTERNAL_TAMPER4_EVENT_CB_ID Internal Tamper 4 Callback ID (*) 513 * @arg @ref HAL_RTC_INTERNAL_TAMPER5_EVENT_CB_ID Internal Tamper 5 Callback ID (*) 514 * @arg @ref HAL_RTC_INTERNAL_TAMPER6_EVENT_CB_ID Internal Tamper 6 Callback ID (*) 515 * @arg @ref HAL_RTC_INTERNAL_TAMPER8_EVENT_CB_ID Internal Tamper 8 Callback ID (*) 495 516 * @arg @ref HAL_RTC_MSPINIT_CB_ID Msp Init callback ID 496 517 * @arg @ref HAL_RTC_MSPDEINIT_CB_ID Msp DeInit callback ID 518 * (*) Not applicable to all devices. 497 519 * @param pCallback pointer to the Callback function 498 520 * @retval HAL status … … 534 556 break; 535 557 558 #if defined(RTC_TAMPER2_SUPPORT) 536 559 case HAL_RTC_TAMPER2_EVENT_CB_ID : 537 560 hrtc->Tamper2EventCallback = pCallback; 538 561 break; 562 #endif /* RTC_TAMPER2_SUPPORT */ 539 563 540 564 case HAL_RTC_TAMPER3_EVENT_CB_ID : … … 627 651 * @arg @ref HAL_RTC_WAKEUPTIMER_EVENT_CB_ID WakeUp Timer Event Callback ID 628 652 * @arg @ref HAL_RTC_TAMPER1_EVENT_CB_ID Tamper 1 Callback ID 629 * @arg @ref HAL_RTC_TAMPER2_EVENT_CB_ID Tamper 2 Callback ID 653 * @arg @ref HAL_RTC_TAMPER2_EVENT_CB_ID Tamper 2 Callback ID (*) 630 654 * @arg @ref HAL_RTC_TAMPER3_EVENT_CB_ID Tamper 3 Callback ID 631 * @arg @ref HAL_RTC_INTERNAL_TAMPER1_EVENT_CB_ID Internal Tamper 1 Callback ID 632 * @arg @ref HAL_RTC_INTERNAL_TAMPER2_EVENT_CB_ID Internal Tamper 2 Callback ID 633 * @arg @ref HAL_RTC_INTERNAL_TAMPER3_EVENT_CB_ID Internal Tamper 3 Callback ID 634 * @arg @ref HAL_RTC_INTERNAL_TAMPER4_EVENT_CB_ID Internal Tamper 4 Callback ID 635 * @arg @ref HAL_RTC_INTERNAL_TAMPER5_EVENT_CB_ID Internal Tamper 5 Callback ID 636 * @arg @ref HAL_RTC_INTERNAL_TAMPER6_EVENT_CB_ID Internal Tamper 6 Callback ID 637 * @arg @ref HAL_RTC_INTERNAL_TAMPER8_EVENT_CB_ID Internal Tamper 8 Callback ID 655 * @arg @ref HAL_RTC_INTERNAL_TAMPER1_EVENT_CB_ID Internal Tamper 1 Callback ID (*) 656 * @arg @ref HAL_RTC_INTERNAL_TAMPER2_EVENT_CB_ID Internal Tamper 2 Callback ID (*) 657 * @arg @ref HAL_RTC_INTERNAL_TAMPER3_EVENT_CB_ID Internal Tamper 3 Callback ID (*) 658 * @arg @ref HAL_RTC_INTERNAL_TAMPER4_EVENT_CB_ID Internal Tamper 4 Callback ID (*) 659 * @arg @ref HAL_RTC_INTERNAL_TAMPER5_EVENT_CB_ID Internal Tamper 5 Callback ID (*) 660 * @arg @ref HAL_RTC_INTERNAL_TAMPER6_EVENT_CB_ID Internal Tamper 6 Callback ID (*) 661 * @arg @ref HAL_RTC_INTERNAL_TAMPER8_EVENT_CB_ID Internal Tamper 8 Callback ID (*) 638 662 * @arg @ref HAL_RTC_MSPINIT_CB_ID Msp Init callback ID 639 663 * @arg @ref HAL_RTC_MSPDEINIT_CB_ID Msp DeInit callback ID 664 * (*) Not applicable to all devices. 640 665 * @retval HAL status 641 666 */ … … 671 696 break; 672 697 698 #if defined(RTC_TAMPER2_SUPPORT) 673 699 case HAL_RTC_TAMPER2_EVENT_CB_ID : 674 700 hrtc->Tamper2EventCallback = HAL_RTCEx_Tamper2EventCallback; /* Legacy weak Tamper2EventCallback */ 675 701 break; 702 #endif /* RTC_TAMPER2_SUPPORT */ 676 703 677 704 case HAL_RTC_TAMPER3_EVENT_CB_ID : -
ctrl/firmware/Main/CubeMX/charger.ioc
r58 r59 115 115 PA8.GPIOParameters=GPIO_PuPd,GPIO_Label 116 116 PA8.GPIO_Label=SD_DETECT 117 PA8.GPIO_PuPd=GPIO_PULL DOWN117 PA8.GPIO_PuPd=GPIO_PULLUP 118 118 PA8.Locked=true 119 119 PA8.Signal=GPIO_Input … … 217 217 ProjectManager.DeletePrevious=true 218 218 ProjectManager.DeviceId=STM32H723ZETx 219 ProjectManager.FirmwarePackage=STM32Cube FW_H7 V1.12. 0219 ProjectManager.FirmwarePackage=STM32Cube FW_H7 V1.12.1 220 220 ProjectManager.FreePins=true 221 221 ProjectManager.HalAssertFull=true … … 330 330 SPI4.VirtualType=VM_MASTER 331 331 STMicroelectronics.X-CUBE-AZRTOS-H7.3.3.0.FX_APP_MEM_POOL_SIZE=8192 332 STMicroelectronics.X-CUBE-AZRTOS-H7.3.3.0.FX_DRIVER_SD_INIT= 0332 STMicroelectronics.X-CUBE-AZRTOS-H7.3.3.0.FX_DRIVER_SD_INIT=1 333 333 STMicroelectronics.X-CUBE-AZRTOS-H7.3.3.0.FX_ENABLE_EXFAT=1 334 334 STMicroelectronics.X-CUBE-AZRTOS-H7.3.3.0.FX_ENABLE_FAULT_TOLERANT=1 … … 338 338 STMicroelectronics.X-CUBE-AZRTOS-H7.3.3.0.FileOoSystemJjInterfaces_Checked=true 339 339 STMicroelectronics.X-CUBE-AZRTOS-H7.3.3.0.FileXCcFileOoSystemJjFileXJjCore=true 340 STMicroelectronics.X-CUBE-AZRTOS-H7.3.3.0.IPParameters=TX_APP_MEM_POOL_SIZE,FX_APP_MEM_POOL_SIZE,TX_APP_GENERATE_INIT_CODE,TX_APP_CREATION,TX_ENABLE_STACK_CHECKING,TX_NO_FILEX_POINTER,TX_LOW_POWER,FX_ENABLE_EXFAT,FX_ENABLE_FAULT_TOLERANT,FX_FAULT_TOLERANT,FX_FAULT_TOLERANT_DATA,FX_DRIVER_SD_INIT,T hreadXCcRTOSJjThreadXJjCore,ThreadXCcRTOSJjThreadXJjLowOoPowerOosupport,FileXCcFileOoSystemJjFileXJjCore,InterfacesCcFileOoSystemJjFileXOoSDOointerface,TX_TIMER_TICKS_PER_SECOND340 STMicroelectronics.X-CUBE-AZRTOS-H7.3.3.0.IPParameters=TX_APP_MEM_POOL_SIZE,FX_APP_MEM_POOL_SIZE,TX_APP_GENERATE_INIT_CODE,TX_APP_CREATION,TX_ENABLE_STACK_CHECKING,TX_NO_FILEX_POINTER,TX_LOW_POWER,FX_ENABLE_EXFAT,FX_ENABLE_FAULT_TOLERANT,FX_FAULT_TOLERANT,FX_FAULT_TOLERANT_DATA,FX_DRIVER_SD_INIT,TX_TIMER_TICKS_PER_SECOND,ThreadXCcRTOSJjThreadXJjCore,ThreadXCcRTOSJjThreadXJjLowOoPowerOosupport,FileXCcFileOoSystemJjFileXJjCore,InterfacesCcFileOoSystemJjFileXOoSDOointerface 341 341 STMicroelectronics.X-CUBE-AZRTOS-H7.3.3.0.InterfacesCcFileOoSystemJjFileXOoSDOointerface=true 342 342 STMicroelectronics.X-CUBE-AZRTOS-H7.3.3.0.RTOSJjThreadX_Checked=true
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