| 1 | /* USER CODE BEGIN Header */ |
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| 2 | /** |
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| 3 | ****************************************************************************** |
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| 4 | * @file spi.c |
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| 5 | * @brief This file provides code for the configuration |
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| 6 | * of the SPI instances. |
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| 7 | ****************************************************************************** |
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| 8 | * @attention |
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| 9 | * |
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| 10 | * Copyright (c) 2024 STMicroelectronics. |
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| 11 | * All rights reserved. |
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| 12 | * |
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| 13 | * This software is licensed under terms that can be found in the LICENSE file |
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| 14 | * in the root directory of this software component. |
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| 15 | * If no LICENSE file comes with this software, it is provided AS-IS. |
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| 16 | * |
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| 17 | ****************************************************************************** |
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| 18 | */ |
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| 19 | /* USER CODE END Header */ |
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| 20 | /* Includes ------------------------------------------------------------------*/ |
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| 21 | #include "spi.h" |
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| 22 | |
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| 23 | /* USER CODE BEGIN 0 */ |
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| 24 | |
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| 25 | /* USER CODE END 0 */ |
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| 26 | |
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| 27 | SPI_HandleTypeDef hspi2; |
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| 28 | SPI_HandleTypeDef hspi4; |
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| 29 | DMA_HandleTypeDef hdma_spi2_rx; |
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| 30 | DMA_HandleTypeDef hdma_spi2_tx; |
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| 31 | DMA_HandleTypeDef hdma_spi4_tx; |
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| 32 | |
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| 33 | /* SPI2 init function */ |
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| 34 | void MX_SPI2_Init(void) |
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| 35 | { |
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| 36 | |
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| 37 | /* USER CODE BEGIN SPI2_Init 0 */ |
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| 38 | |
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| 39 | /* USER CODE END SPI2_Init 0 */ |
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| 40 | |
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| 41 | /* USER CODE BEGIN SPI2_Init 1 */ |
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| 42 | |
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| 43 | /* USER CODE END SPI2_Init 1 */ |
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| 44 | hspi2.Instance = SPI2; |
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| 45 | hspi2.Init.Mode = SPI_MODE_MASTER; |
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| 46 | hspi2.Init.Direction = SPI_DIRECTION_2LINES; |
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| 47 | hspi2.Init.DataSize = SPI_DATASIZE_8BIT; |
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| 48 | hspi2.Init.CLKPolarity = SPI_POLARITY_LOW; |
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| 49 | hspi2.Init.CLKPhase = SPI_PHASE_1EDGE; |
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| 50 | hspi2.Init.NSS = SPI_NSS_SOFT; |
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| 51 | hspi2.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_256; |
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| 52 | hspi2.Init.FirstBit = SPI_FIRSTBIT_MSB; |
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| 53 | hspi2.Init.TIMode = SPI_TIMODE_DISABLE; |
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| 54 | hspi2.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; |
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| 55 | hspi2.Init.CRCPolynomial = 0x0; |
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| 56 | hspi2.Init.NSSPMode = SPI_NSS_PULSE_ENABLE; |
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| 57 | hspi2.Init.NSSPolarity = SPI_NSS_POLARITY_LOW; |
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| 58 | hspi2.Init.FifoThreshold = SPI_FIFO_THRESHOLD_01DATA; |
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| 59 | hspi2.Init.TxCRCInitializationPattern = SPI_CRC_INITIALIZATION_ALL_ZERO_PATTERN; |
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| 60 | hspi2.Init.RxCRCInitializationPattern = SPI_CRC_INITIALIZATION_ALL_ZERO_PATTERN; |
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| 61 | hspi2.Init.MasterSSIdleness = SPI_MASTER_SS_IDLENESS_00CYCLE; |
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| 62 | hspi2.Init.MasterInterDataIdleness = SPI_MASTER_INTERDATA_IDLENESS_01CYCLE; |
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| 63 | hspi2.Init.MasterReceiverAutoSusp = SPI_MASTER_RX_AUTOSUSP_DISABLE; |
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| 64 | hspi2.Init.MasterKeepIOState = SPI_MASTER_KEEP_IO_STATE_ENABLE; |
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| 65 | hspi2.Init.IOSwap = SPI_IO_SWAP_DISABLE; |
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| 66 | if (HAL_SPI_Init(&hspi2) != HAL_OK) |
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| 67 | { |
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| 68 | Error_Handler(); |
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| 69 | } |
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| 70 | /* USER CODE BEGIN SPI2_Init 2 */ |
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| 71 | |
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| 72 | /* USER CODE END SPI2_Init 2 */ |
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| 73 | |
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| 74 | } |
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| 75 | /* SPI4 init function */ |
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| 76 | void MX_SPI4_Init(void) |
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| 77 | { |
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| 78 | |
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| 79 | /* USER CODE BEGIN SPI4_Init 0 */ |
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| 80 | |
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| 81 | // This SPI module is used to control the Display |
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| 82 | |
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| 83 | /* USER CODE END SPI4_Init 0 */ |
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| 84 | |
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| 85 | /* USER CODE BEGIN SPI4_Init 1 */ |
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| 86 | |
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| 87 | /* USER CODE END SPI4_Init 1 */ |
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| 88 | hspi4.Instance = SPI4; |
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| 89 | hspi4.Init.Mode = SPI_MODE_MASTER; |
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| 90 | hspi4.Init.Direction = SPI_DIRECTION_1LINE; |
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| 91 | hspi4.Init.DataSize = SPI_DATASIZE_9BIT; |
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| 92 | hspi4.Init.CLKPolarity = SPI_POLARITY_LOW; |
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| 93 | hspi4.Init.CLKPhase = SPI_PHASE_1EDGE; |
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| 94 | hspi4.Init.NSS = SPI_NSS_HARD_OUTPUT; |
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| 95 | hspi4.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; |
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| 96 | hspi4.Init.FirstBit = SPI_FIRSTBIT_MSB; |
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| 97 | hspi4.Init.TIMode = SPI_TIMODE_DISABLE; |
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| 98 | hspi4.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; |
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| 99 | hspi4.Init.CRCPolynomial = 0x0; |
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| 100 | hspi4.Init.NSSPMode = SPI_NSS_PULSE_ENABLE; |
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| 101 | hspi4.Init.NSSPolarity = SPI_NSS_POLARITY_LOW; |
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| 102 | hspi4.Init.FifoThreshold = SPI_FIFO_THRESHOLD_01DATA; |
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| 103 | hspi4.Init.TxCRCInitializationPattern = SPI_CRC_INITIALIZATION_ALL_ZERO_PATTERN; |
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| 104 | hspi4.Init.RxCRCInitializationPattern = SPI_CRC_INITIALIZATION_ALL_ZERO_PATTERN; |
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| 105 | hspi4.Init.MasterSSIdleness = SPI_MASTER_SS_IDLENESS_00CYCLE; |
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| 106 | hspi4.Init.MasterInterDataIdleness = SPI_MASTER_INTERDATA_IDLENESS_02CYCLE; |
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| 107 | hspi4.Init.MasterReceiverAutoSusp = SPI_MASTER_RX_AUTOSUSP_DISABLE; |
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| 108 | hspi4.Init.MasterKeepIOState = SPI_MASTER_KEEP_IO_STATE_ENABLE; |
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| 109 | hspi4.Init.IOSwap = SPI_IO_SWAP_DISABLE; |
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| 110 | if (HAL_SPI_Init(&hspi4) != HAL_OK) |
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| 111 | { |
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| 112 | Error_Handler(); |
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| 113 | } |
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| 114 | /* USER CODE BEGIN SPI4_Init 2 */ |
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| 115 | |
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| 116 | /* USER CODE END SPI4_Init 2 */ |
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| 117 | |
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| 118 | } |
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| 119 | |
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| 120 | void HAL_SPI_MspInit(SPI_HandleTypeDef* spiHandle) |
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| 121 | { |
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| 122 | |
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| 123 | GPIO_InitTypeDef GPIO_InitStruct = {0}; |
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| 124 | RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; |
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| 125 | if(spiHandle->Instance==SPI2) |
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| 126 | { |
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| 127 | /* USER CODE BEGIN SPI2_MspInit 0 */ |
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| 128 | |
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| 129 | /* USER CODE END SPI2_MspInit 0 */ |
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| 130 | |
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| 131 | /* SPI2 clock enable */ |
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| 132 | __HAL_RCC_SPI2_CLK_ENABLE(); |
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| 133 | |
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| 134 | __HAL_RCC_GPIOB_CLK_ENABLE(); |
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| 135 | /**SPI2 GPIO Configuration |
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| 136 | PB10 ------> SPI2_SCK |
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| 137 | PB14 ------> SPI2_MISO |
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| 138 | PB15 ------> SPI2_MOSI |
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| 139 | */ |
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| 140 | GPIO_InitStruct.Pin = ETH_SPI_SCK_Pin|ETH_SPI_MISO_Pin|ETH_SPI_MOSI_Pin; |
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| 141 | GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; |
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| 142 | GPIO_InitStruct.Pull = GPIO_NOPULL; |
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| 143 | GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; |
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| 144 | GPIO_InitStruct.Alternate = GPIO_AF5_SPI2; |
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| 145 | HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); |
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| 146 | |
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| 147 | /* SPI2 DMA Init */ |
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| 148 | /* SPI2_RX Init */ |
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| 149 | hdma_spi2_rx.Instance = DMA1_Stream3; |
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| 150 | hdma_spi2_rx.Init.Request = DMA_REQUEST_SPI2_RX; |
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| 151 | hdma_spi2_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; |
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| 152 | hdma_spi2_rx.Init.PeriphInc = DMA_PINC_DISABLE; |
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| 153 | hdma_spi2_rx.Init.MemInc = DMA_MINC_ENABLE; |
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| 154 | hdma_spi2_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; |
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| 155 | hdma_spi2_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; |
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| 156 | hdma_spi2_rx.Init.Mode = DMA_NORMAL; |
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| 157 | hdma_spi2_rx.Init.Priority = DMA_PRIORITY_HIGH; |
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| 158 | hdma_spi2_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; |
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| 159 | if (HAL_DMA_Init(&hdma_spi2_rx) != HAL_OK) |
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| 160 | { |
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| 161 | Error_Handler(); |
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| 162 | } |
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| 163 | |
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| 164 | __HAL_LINKDMA(spiHandle,hdmarx,hdma_spi2_rx); |
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| 165 | |
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| 166 | /* SPI2_TX Init */ |
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| 167 | hdma_spi2_tx.Instance = DMA1_Stream4; |
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| 168 | hdma_spi2_tx.Init.Request = DMA_REQUEST_SPI2_TX; |
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| 169 | hdma_spi2_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; |
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| 170 | hdma_spi2_tx.Init.PeriphInc = DMA_PINC_DISABLE; |
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| 171 | hdma_spi2_tx.Init.MemInc = DMA_MINC_ENABLE; |
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| 172 | hdma_spi2_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; |
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| 173 | hdma_spi2_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; |
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| 174 | hdma_spi2_tx.Init.Mode = DMA_NORMAL; |
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| 175 | hdma_spi2_tx.Init.Priority = DMA_PRIORITY_HIGH; |
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| 176 | hdma_spi2_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; |
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| 177 | if (HAL_DMA_Init(&hdma_spi2_tx) != HAL_OK) |
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| 178 | { |
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| 179 | Error_Handler(); |
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| 180 | } |
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| 181 | |
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| 182 | __HAL_LINKDMA(spiHandle,hdmatx,hdma_spi2_tx); |
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| 183 | |
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| 184 | /* SPI2 interrupt Init */ |
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| 185 | HAL_NVIC_SetPriority(SPI2_IRQn, 5, 0); |
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| 186 | HAL_NVIC_EnableIRQ(SPI2_IRQn); |
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| 187 | /* USER CODE BEGIN SPI2_MspInit 1 */ |
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| 188 | |
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| 189 | /* USER CODE END SPI2_MspInit 1 */ |
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| 190 | } |
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| 191 | else if(spiHandle->Instance==SPI4) |
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| 192 | { |
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| 193 | /* USER CODE BEGIN SPI4_MspInit 0 */ |
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| 194 | |
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| 195 | /* USER CODE END SPI4_MspInit 0 */ |
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| 196 | |
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| 197 | /** Initializes the peripherals clock |
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| 198 | */ |
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| 199 | PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SPI4; |
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| 200 | PeriphClkInitStruct.Spi45ClockSelection = RCC_SPI45CLKSOURCE_HSE; |
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| 201 | if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) |
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| 202 | { |
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| 203 | Error_Handler(); |
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| 204 | } |
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| 205 | |
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| 206 | /* SPI4 clock enable */ |
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| 207 | __HAL_RCC_SPI4_CLK_ENABLE(); |
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| 208 | |
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| 209 | __HAL_RCC_GPIOE_CLK_ENABLE(); |
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| 210 | /**SPI4 GPIO Configuration |
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| 211 | PE11 ------> SPI4_NSS |
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| 212 | PE12 ------> SPI4_SCK |
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| 213 | PE14 ------> SPI4_MOSI |
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| 214 | */ |
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| 215 | GPIO_InitStruct.Pin = DISPLAY_SPI_CS_Pin|DISPLAY_SPI_SCK_Pin|DISPLAY_SPI_MOSI_Pin; |
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| 216 | GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; |
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| 217 | GPIO_InitStruct.Pull = GPIO_NOPULL; |
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| 218 | GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; |
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| 219 | GPIO_InitStruct.Alternate = GPIO_AF5_SPI4; |
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| 220 | HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); |
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| 221 | |
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| 222 | /* SPI4 DMA Init */ |
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| 223 | /* SPI4_TX Init */ |
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| 224 | hdma_spi4_tx.Instance = DMA1_Stream0; |
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| 225 | hdma_spi4_tx.Init.Request = DMA_REQUEST_SPI4_TX; |
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| 226 | hdma_spi4_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; |
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| 227 | hdma_spi4_tx.Init.PeriphInc = DMA_PINC_DISABLE; |
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| 228 | hdma_spi4_tx.Init.MemInc = DMA_MINC_ENABLE; |
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| 229 | hdma_spi4_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD; |
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| 230 | hdma_spi4_tx.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD; |
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| 231 | hdma_spi4_tx.Init.Mode = DMA_NORMAL; |
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| 232 | hdma_spi4_tx.Init.Priority = DMA_PRIORITY_LOW; |
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| 233 | hdma_spi4_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; |
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| 234 | if (HAL_DMA_Init(&hdma_spi4_tx) != HAL_OK) |
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| 235 | { |
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| 236 | Error_Handler(); |
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| 237 | } |
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| 238 | |
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| 239 | __HAL_LINKDMA(spiHandle,hdmatx,hdma_spi4_tx); |
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| 240 | |
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| 241 | /* SPI4 interrupt Init */ |
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| 242 | HAL_NVIC_SetPriority(SPI4_IRQn, 5, 0); |
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| 243 | HAL_NVIC_EnableIRQ(SPI4_IRQn); |
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| 244 | /* USER CODE BEGIN SPI4_MspInit 1 */ |
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| 245 | |
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| 246 | /* USER CODE END SPI4_MspInit 1 */ |
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| 247 | } |
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| 248 | } |
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| 249 | |
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| 250 | void HAL_SPI_MspDeInit(SPI_HandleTypeDef* spiHandle) |
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| 251 | { |
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| 252 | |
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| 253 | if(spiHandle->Instance==SPI2) |
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| 254 | { |
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| 255 | /* USER CODE BEGIN SPI2_MspDeInit 0 */ |
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| 256 | |
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| 257 | /* USER CODE END SPI2_MspDeInit 0 */ |
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| 258 | /* Peripheral clock disable */ |
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| 259 | __HAL_RCC_SPI2_CLK_DISABLE(); |
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| 260 | |
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| 261 | /**SPI2 GPIO Configuration |
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| 262 | PB10 ------> SPI2_SCK |
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| 263 | PB14 ------> SPI2_MISO |
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| 264 | PB15 ------> SPI2_MOSI |
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| 265 | */ |
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| 266 | HAL_GPIO_DeInit(GPIOB, ETH_SPI_SCK_Pin|ETH_SPI_MISO_Pin|ETH_SPI_MOSI_Pin); |
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| 267 | |
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| 268 | /* SPI2 DMA DeInit */ |
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| 269 | HAL_DMA_DeInit(spiHandle->hdmarx); |
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| 270 | HAL_DMA_DeInit(spiHandle->hdmatx); |
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| 271 | |
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| 272 | /* SPI2 interrupt Deinit */ |
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| 273 | HAL_NVIC_DisableIRQ(SPI2_IRQn); |
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| 274 | /* USER CODE BEGIN SPI2_MspDeInit 1 */ |
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| 275 | |
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| 276 | /* USER CODE END SPI2_MspDeInit 1 */ |
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| 277 | } |
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| 278 | else if(spiHandle->Instance==SPI4) |
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| 279 | { |
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| 280 | /* USER CODE BEGIN SPI4_MspDeInit 0 */ |
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| 281 | |
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| 282 | /* USER CODE END SPI4_MspDeInit 0 */ |
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| 283 | /* Peripheral clock disable */ |
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| 284 | __HAL_RCC_SPI4_CLK_DISABLE(); |
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| 285 | |
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| 286 | /**SPI4 GPIO Configuration |
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| 287 | PE11 ------> SPI4_NSS |
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| 288 | PE12 ------> SPI4_SCK |
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| 289 | PE14 ------> SPI4_MOSI |
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| 290 | */ |
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| 291 | HAL_GPIO_DeInit(GPIOE, DISPLAY_SPI_CS_Pin|DISPLAY_SPI_SCK_Pin|DISPLAY_SPI_MOSI_Pin); |
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| 292 | |
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| 293 | /* SPI4 DMA DeInit */ |
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| 294 | HAL_DMA_DeInit(spiHandle->hdmatx); |
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| 295 | |
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| 296 | /* SPI4 interrupt Deinit */ |
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| 297 | HAL_NVIC_DisableIRQ(SPI4_IRQn); |
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| 298 | /* USER CODE BEGIN SPI4_MspDeInit 1 */ |
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| 299 | |
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| 300 | /* USER CODE END SPI4_MspDeInit 1 */ |
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| 301 | } |
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| 302 | } |
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| 303 | |
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| 304 | /* USER CODE BEGIN 1 */ |
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| 305 | |
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| 306 | /* USER CODE END 1 */ |
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